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scsi: lpfc: small sg cnt cleanup
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CommitLineData
dea3101e
JB
1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS
4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB
10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e
JB
22 *******************************************************************/
23
dea3101e
JB
24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e
JB
30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
286871a6 40#include <linux/bitops.h>
dea3101e 41
91886523 42#include <scsi/scsi.h>
dea3101e
JB
43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
45#include <scsi/scsi_transport_fc.h>
86c67379
JS
46#include <scsi/scsi_tcq.h>
47#include <scsi/fc/fc_fs.h>
48
49#include <linux/nvme-fc-driver.h>
dea3101e 50
da0436e9 51#include "lpfc_hw4.h"
dea3101e
JB
52#include "lpfc_hw.h"
53#include "lpfc_sli.h"
da0436e9 54#include "lpfc_sli4.h"
ea2151b4 55#include "lpfc_nl.h"
dea3101e 56#include "lpfc_disc.h"
dea3101e 57#include "lpfc.h"
895427bd
JS
58#include "lpfc_scsi.h"
59#include "lpfc_nvme.h"
86c67379 60#include "lpfc_nvmet.h"
dea3101e
JB
61#include "lpfc_logmsg.h"
62#include "lpfc_crtn.h"
92d7f7b0 63#include "lpfc_vport.h"
dea3101e 64#include "lpfc_version.h"
12f44457 65#include "lpfc_ids.h"
dea3101e 66
81301a9b
JS
67char *_dump_buf_data;
68unsigned long _dump_buf_data_order;
69char *_dump_buf_dif;
70unsigned long _dump_buf_dif_order;
71spinlock_t _dump_buf_lock;
72
7bb03bbf 73/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS
74uint16_t *lpfc_used_cpu;
75uint32_t lpfc_present_cpu;
7bb03bbf 76
dea3101e
JB
77static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
78static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 79static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS
80static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
81static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 82static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 83static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 84static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 85static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS
86static int lpfc_init_active_sgl_array(struct lpfc_hba *);
87static void lpfc_free_active_sgl(struct lpfc_hba *);
88static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
89static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
90static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
91static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
92static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS
93static void lpfc_sli4_disable_intr(struct lpfc_hba *);
94static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 95static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e
JB
96
97static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 98static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 99static DEFINE_IDR(lpfc_hba_index);
f358dd0c 100#define LPFC_NVMET_BUF_POST 254
dea3101e 101
e59058c4 102/**
3621a710 103 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS
104 * @phba: pointer to lpfc hba data structure.
105 *
106 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
107 * mailbox command. It retrieves the revision information from the HBA and
108 * collects the Vital Product Data (VPD) about the HBA for preparing the
109 * configuration of the HBA.
110 *
111 * Return codes:
112 * 0 - success.
113 * -ERESTART - requests the SLI layer to reset the HBA and try again.
114 * Any other value - indicates an error.
115 **/
dea3101e 116int
2e0fef85 117lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e
JB
118{
119 lpfc_vpd_t *vp = &phba->vpd;
120 int i = 0, rc;
121 LPFC_MBOXQ_t *pmb;
122 MAILBOX_t *mb;
123 char *lpfc_vpd_data = NULL;
124 uint16_t offset = 0;
125 static char licensed[56] =
126 "key unlock for use with gnu public licensed code only\0";
65a29c16 127 static int init_key = 1;
dea3101e
JB
128
129 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
130 if (!pmb) {
2e0fef85 131 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
132 return -ENOMEM;
133 }
134
04c68496 135 mb = &pmb->u.mb;
2e0fef85 136 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
137
138 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS
139 if (init_key) {
140 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 141
65a29c16
JS
142 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
143 *ptext = cpu_to_be32(*ptext);
144 init_key = 0;
145 }
dea3101e
JB
146
147 lpfc_read_nv(phba, pmb);
148 memset((char*)mb->un.varRDnvp.rsvd3, 0,
149 sizeof (mb->un.varRDnvp.rsvd3));
150 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
151 sizeof (licensed));
152
153 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
154
155 if (rc != MBX_SUCCESS) {
ed957684 156 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 157 "0324 Config Port initialization "
dea3101e
JB
158 "error, mbxCmd x%x READ_NVPARM, "
159 "mbxStatus x%x\n",
dea3101e
JB
160 mb->mbxCommand, mb->mbxStatus);
161 mempool_free(pmb, phba->mbox_mem_pool);
162 return -ERESTART;
163 }
164 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS
165 sizeof(phba->wwnn));
166 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
167 sizeof(phba->wwpn));
dea3101e
JB
168 }
169
92d7f7b0
JS
170 phba->sli3_options = 0x0;
171
dea3101e
JB
172 /* Setup and issue mailbox READ REV command */
173 lpfc_read_rev(phba, pmb);
174 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
175 if (rc != MBX_SUCCESS) {
ed957684 176 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 177 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 178 "READ_REV, mbxStatus x%x\n",
dea3101e
JB
179 mb->mbxCommand, mb->mbxStatus);
180 mempool_free( pmb, phba->mbox_mem_pool);
181 return -ERESTART;
182 }
183
92d7f7b0 184
1de933f3
JSEC
185 /*
186 * The value of rr must be 1 since the driver set the cv field to 1.
187 * This setting requires the FW to set all revision fields.
dea3101e 188 */
1de933f3 189 if (mb->un.varRdRev.rr == 0) {
dea3101e 190 vp->rev.rBit = 0;
1de933f3 191 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS
192 "0440 Adapter failed to init, READ_REV has "
193 "missing revision information.\n");
dea3101e
JB
194 mempool_free(pmb, phba->mbox_mem_pool);
195 return -ERESTART;
dea3101e
JB
196 }
197
495a714c
JS
198 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
199 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 200 return -EINVAL;
495a714c 201 }
ed957684 202
dea3101e 203 /* Save information as VPD data */
1de933f3 204 vp->rev.rBit = 1;
92d7f7b0 205 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC
206 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
207 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
208 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
209 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e
JB
210 vp->rev.biuRev = mb->un.varRdRev.biuRev;
211 vp->rev.smRev = mb->un.varRdRev.smRev;
212 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
213 vp->rev.endecRev = mb->un.varRdRev.endecRev;
214 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
215 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
216 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
217 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
218 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
219 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
220
92d7f7b0
JS
221 /* If the sli feature level is less then 9, we must
222 * tear down all RPIs and VPIs on link down if NPIV
223 * is enabled.
224 */
225 if (vp->rev.feaLevelHigh < 9)
226 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
227
dea3101e
JB
228 if (lpfc_is_LC_HBA(phba->pcidev->device))
229 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
230 sizeof (phba->RandomData));
231
dea3101e 232 /* Get adapter VPD information */
dea3101e
JB
233 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
234 if (!lpfc_vpd_data)
d7c255b2 235 goto out_free_mbox;
dea3101e 236 do {
a0c87cbd 237 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e
JB
238 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
239
240 if (rc != MBX_SUCCESS) {
241 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 242 "0441 VPD not present on adapter, "
dea3101e 243 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 244 mb->mbxCommand, mb->mbxStatus);
74b72a59 245 mb->un.varDmp.word_cnt = 0;
dea3101e 246 }
04c68496
JS
247 /* dump mem may return a zero when finished or we got a
248 * mailbox error, either way we are done.
249 */
250 if (mb->un.varDmp.word_cnt == 0)
251 break;
74b72a59
JW
252 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
253 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS
254 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
255 lpfc_vpd_data + offset,
92d7f7b0 256 mb->un.varDmp.word_cnt);
dea3101e 257 offset += mb->un.varDmp.word_cnt;
74b72a59
JW
258 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
259 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e
JB
260
261 kfree(lpfc_vpd_data);
dea3101e
JB
262out_free_mbox:
263 mempool_free(pmb, phba->mbox_mem_pool);
264 return 0;
265}
266
e59058c4 267/**
3621a710 268 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS
269 * @phba: pointer to lpfc hba data structure.
270 * @pmboxq: pointer to the driver internal queue element for mailbox command.
271 *
272 * This is the completion handler for driver's configuring asynchronous event
273 * mailbox command to the device. If the mailbox command returns successfully,
274 * it will set internal async event support flag to 1; otherwise, it will
275 * set internal async event support flag to 0.
276 **/
57127f15
JS
277static void
278lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
279{
04c68496 280 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS
281 phba->temp_sensor_support = 1;
282 else
283 phba->temp_sensor_support = 0;
284 mempool_free(pmboxq, phba->mbox_mem_pool);
285 return;
286}
287
97207482 288/**
3621a710 289 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS
290 * @phba: pointer to lpfc hba data structure.
291 * @pmboxq: pointer to the driver internal queue element for mailbox command.
292 *
293 * This is the completion handler for dump mailbox command for getting
294 * wake up parameters. When this command complete, the response contain
295 * Option rom version of the HBA. This function translate the version number
296 * into a human readable string and store it in OptionROMVersion.
297 **/
298static void
299lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
300{
301 struct prog_id *prg;
302 uint32_t prog_id_word;
303 char dist = ' ';
304 /* character array used for decoding dist type. */
305 char dist_char[] = "nabx";
306
04c68496 307 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 308 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 309 return;
9f1e1b50 310 }
97207482
JS
311
312 prg = (struct prog_id *) &prog_id_word;
313
314 /* word 7 contain option rom version */
04c68496 315 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS
316
317 /* Decode the Option rom version word to a readable string */
318 if (prg->dist < 4)
319 dist = dist_char[prg->dist];
320
321 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 322 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS
323 prg->ver, prg->rev, prg->lev);
324 else
a2fc4aef 325 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS
326 prg->ver, prg->rev, prg->lev,
327 dist, prg->num);
9f1e1b50 328 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS
329 return;
330}
331
0558056c
JS
332/**
333 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
334 * cfg_soft_wwnn, cfg_soft_wwpn
335 * @vport: pointer to lpfc vport data structure.
336 *
337 *
338 * Return codes
339 * None.
340 **/
341void
342lpfc_update_vport_wwn(struct lpfc_vport *vport)
343{
aeb3c817
JS
344 uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
345 u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0];
346
0558056c
JS
347 /* If the soft name exists then update it using the service params */
348 if (vport->phba->cfg_soft_wwnn)
349 u64_to_wwn(vport->phba->cfg_soft_wwnn,
350 vport->fc_sparam.nodeName.u.wwn);
351 if (vport->phba->cfg_soft_wwpn)
352 u64_to_wwn(vport->phba->cfg_soft_wwpn,
353 vport->fc_sparam.portName.u.wwn);
354
355 /*
356 * If the name is empty or there exists a soft name
357 * then copy the service params name, otherwise use the fc name
358 */
359 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
360 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
361 sizeof(struct lpfc_name));
362 else
363 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
364 sizeof(struct lpfc_name));
365
aeb3c817
JS
366 /*
367 * If the port name has changed, then set the Param changes flag
368 * to unreg the login
369 */
370 if (vport->fc_portname.u.wwn[0] != 0 &&
371 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
372 sizeof(struct lpfc_name)))
373 vport->vport_flag |= FAWWPN_PARAM_CHG;
374
375 if (vport->fc_portname.u.wwn[0] == 0 ||
376 vport->phba->cfg_soft_wwpn ||
377 (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) ||
378 vport->vport_flag & FAWWPN_SET) {
0558056c
JS
379 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
380 sizeof(struct lpfc_name));
aeb3c817
JS
381 vport->vport_flag &= ~FAWWPN_SET;
382 if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR)
383 vport->vport_flag |= FAWWPN_SET;
384 }
0558056c
JS
385 else
386 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
387 sizeof(struct lpfc_name));
388}
389
e59058c4 390/**
3621a710 391 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS
392 * @phba: pointer to lpfc hba data structure.
393 *
394 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
395 * command call. It performs all internal resource and state setups on the
396 * port: post IOCB buffers, enable appropriate host interrupt attentions,
397 * ELS ring timers, etc.
398 *
399 * Return codes
400 * 0 - success.
401 * Any other value - error.
402 **/
dea3101e 403int
2e0fef85 404lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 405{
2e0fef85 406 struct lpfc_vport *vport = phba->pport;
a257bf90 407 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e
JB
408 LPFC_MBOXQ_t *pmb;
409 MAILBOX_t *mb;
410 struct lpfc_dmabuf *mp;
411 struct lpfc_sli *psli = &phba->sli;
412 uint32_t status, timeout;
2e0fef85
JS
413 int i, j;
414 int rc;
dea3101e 415
7af67051
JS
416 spin_lock_irq(&phba->hbalock);
417 /*
418 * If the Config port completed correctly the HBA is not
419 * over heated any more.
420 */
421 if (phba->over_temp_state == HBA_OVER_TEMP)
422 phba->over_temp_state = HBA_NORMAL_TEMP;
423 spin_unlock_irq(&phba->hbalock);
424
dea3101e
JB
425 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
426 if (!pmb) {
2e0fef85 427 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
428 return -ENOMEM;
429 }
04c68496 430 mb = &pmb->u.mb;
dea3101e 431
dea3101e 432 /* Get login parameters for NID. */
9f1177a3
JS
433 rc = lpfc_read_sparam(phba, pmb, 0);
434 if (rc) {
435 mempool_free(pmb, phba->mbox_mem_pool);
436 return -ENOMEM;
437 }
438
ed957684 439 pmb->vport = vport;
dea3101e 440 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 441 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 442 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 443 "READ_SPARM mbxStatus x%x\n",
dea3101e 444 mb->mbxCommand, mb->mbxStatus);
2e0fef85 445 phba->link_state = LPFC_HBA_ERROR;
dea3101e 446 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 447 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
448 lpfc_mbuf_free(phba, mp->virt, mp->phys);
449 kfree(mp);
450 return -EIO;
451 }
452
453 mp = (struct lpfc_dmabuf *) pmb->context1;
454
2e0fef85 455 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e
JB
456 lpfc_mbuf_free(phba, mp->virt, mp->phys);
457 kfree(mp);
458 pmb->context1 = NULL;
0558056c 459 lpfc_update_vport_wwn(vport);
a257bf90
JS
460
461 /* Update the fc_host data structures with new wwn. */
462 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
463 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 464 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 465
dea3101e
JB
466 /* If no serial number in VPD data, use low 6 bytes of WWNN */
467 /* This should be consolidated into parse_vpd ? - mr */
468 if (phba->SerialNumber[0] == 0) {
469 uint8_t *outptr;
470
2e0fef85 471 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e
JB
472 for (i = 0; i < 12; i++) {
473 status = *outptr++;
474 j = ((status & 0xf0) >> 4);
475 if (j <= 9)
476 phba->SerialNumber[i] =
477 (char)((uint8_t) 0x30 + (uint8_t) j);
478 else
479 phba->SerialNumber[i] =
480 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
481 i++;
482 j = (status & 0xf);
483 if (j <= 9)
484 phba->SerialNumber[i] =
485 (char)((uint8_t) 0x30 + (uint8_t) j);
486 else
487 phba->SerialNumber[i] =
488 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
489 }
490 }
491
dea3101e 492 lpfc_read_config(phba, pmb);
ed957684 493 pmb->vport = vport;
dea3101e 494 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 495 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 496 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 497 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 498 mb->mbxCommand, mb->mbxStatus);
2e0fef85 499 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
500 mempool_free( pmb, phba->mbox_mem_pool);
501 return -EIO;
502 }
503
a0c87cbd
JS
504 /* Check if the port is disabled */
505 lpfc_sli_read_link_ste(phba);
506
dea3101e 507 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
508 i = (mb->un.varRdConfig.max_xri + 1);
509 if (phba->cfg_hba_queue_depth > i) {
510 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
511 "3359 HBA queue depth changed from %d to %d\n",
512 phba->cfg_hba_queue_depth, i);
513 phba->cfg_hba_queue_depth = i;
514 }
515
516 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
517 i = (mb->un.varRdConfig.max_xri >> 3);
518 if (phba->pport->cfg_lun_queue_depth > i) {
519 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
520 "3360 LUN queue depth changed from %d to %d\n",
521 phba->pport->cfg_lun_queue_depth, i);
522 phba->pport->cfg_lun_queue_depth = i;
523 }
dea3101e
JB
524
525 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW
526
527 /* Get the default values for Model Name and Description */
528 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
529
2e0fef85 530 phba->link_state = LPFC_LINK_DOWN;
dea3101e 531
0b727fea 532 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS
533 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
534 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
535 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
536 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e
JB
537
538 /* Post receive buffers for desired rings */
ed957684
JS
539 if (phba->sli_rev != 3)
540 lpfc_post_rcv_buf(phba);
dea3101e 541
9399627f
JS
542 /*
543 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
544 */
545 if (phba->intr_type == MSIX) {
546 rc = lpfc_config_msi(phba, pmb);
547 if (rc) {
548 mempool_free(pmb, phba->mbox_mem_pool);
549 return -EIO;
550 }
551 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
552 if (rc != MBX_SUCCESS) {
553 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
554 "0352 Config MSI mailbox command "
555 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS
556 pmb->u.mb.mbxCommand,
557 pmb->u.mb.mbxStatus);
9399627f
JS
558 mempool_free(pmb, phba->mbox_mem_pool);
559 return -EIO;
560 }
561 }
562
04c68496 563 spin_lock_irq(&phba->hbalock);
9399627f
JS
564 /* Initialize ERATT handling flag */
565 phba->hba_flag &= ~HBA_ERATT_HANDLED;
566
dea3101e 567 /* Enable appropriate host interrupts */
9940b97b
JS
568 if (lpfc_readl(phba->HCregaddr, &status)) {
569 spin_unlock_irq(&phba->hbalock);
570 return -EIO;
571 }
dea3101e
JB
572 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
573 if (psli->num_rings > 0)
574 status |= HC_R0INT_ENA;
575 if (psli->num_rings > 1)
576 status |= HC_R1INT_ENA;
577 if (psli->num_rings > 2)
578 status |= HC_R2INT_ENA;
579 if (psli->num_rings > 3)
580 status |= HC_R3INT_ENA;
581
875fbdfe
JSEC
582 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
583 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 584 status &= ~(HC_R0INT_ENA);
875fbdfe 585
dea3101e
JB
586 writel(status, phba->HCregaddr);
587 readl(phba->HCregaddr); /* flush */
2e0fef85 588 spin_unlock_irq(&phba->hbalock);
dea3101e 589
9399627f
JS
590 /* Set up ring-0 (ELS) timer */
591 timeout = phba->fc_ratov * 2;
256ec0d0
JS
592 mod_timer(&vport->els_tmofunc,
593 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 594 /* Set up heart beat (HB) timer */
256ec0d0
JS
595 mod_timer(&phba->hb_tmofunc,
596 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
597 phba->hb_outstanding = 0;
598 phba->last_completion_time = jiffies;
9399627f 599 /* Set up error attention (ERATT) polling timer */
256ec0d0 600 mod_timer(&phba->eratt_poll,
65791f1f 601 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 602
a0c87cbd
JS
603 if (phba->hba_flag & LINK_DISABLED) {
604 lpfc_printf_log(phba,
605 KERN_ERR, LOG_INIT,
606 "2598 Adapter Link is disabled.\n");
607 lpfc_down_link(phba, pmb);
608 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
609 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
610 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
611 lpfc_printf_log(phba,
612 KERN_ERR, LOG_INIT,
613 "2599 Adapter failed to issue DOWN_LINK"
614 " mbox command rc 0x%x\n", rc);
615
616 mempool_free(pmb, phba->mbox_mem_pool);
617 return -EIO;
618 }
e40a02c1 619 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS
620 mempool_free(pmb, phba->mbox_mem_pool);
621 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
622 if (rc)
623 return rc;
dea3101e
JB
624 }
625 /* MBOX buffer will be freed in mbox compl */
57127f15 626 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
627 if (!pmb) {
628 phba->link_state = LPFC_HBA_ERROR;
629 return -ENOMEM;
630 }
631
57127f15
JS
632 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
633 pmb->mbox_cmpl = lpfc_config_async_cmpl;
634 pmb->vport = phba->pport;
635 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 636
57127f15
JS
637 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
638 lpfc_printf_log(phba,
639 KERN_ERR,
640 LOG_INIT,
641 "0456 Adapter failed to issue "
e4e74273 642 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS
643 rc);
644 mempool_free(pmb, phba->mbox_mem_pool);
645 }
97207482
JS
646
647 /* Get Option rom version */
648 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
649 if (!pmb) {
650 phba->link_state = LPFC_HBA_ERROR;
651 return -ENOMEM;
652 }
653
97207482
JS
654 lpfc_dump_wakeup_param(phba, pmb);
655 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
656 pmb->vport = phba->pport;
657 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
658
659 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
660 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 661 "to get Option ROM version status x%x\n", rc);
97207482
JS
662 mempool_free(pmb, phba->mbox_mem_pool);
663 }
664
d7c255b2 665 return 0;
ce8b3ce5
JS
666}
667
84d1b006
JS
668/**
669 * lpfc_hba_init_link - Initialize the FC link
670 * @phba: pointer to lpfc hba data structure.
6e7288d9 671 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
672 *
673 * This routine will issue the INIT_LINK mailbox command call.
674 * It is available to other drivers through the lpfc_hba data
675 * structure for use as a delayed link up mechanism with the
676 * module parameter lpfc_suppress_link_up.
677 *
678 * Return code
679 * 0 - success
680 * Any other value - error
681 **/
e399b228 682static int
6e7288d9 683lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS
684{
685 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
686}
687
688/**
689 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
690 * @phba: pointer to lpfc hba data structure.
691 * @fc_topology: desired fc topology.
692 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
693 *
694 * This routine will issue the INIT_LINK mailbox command call.
695 * It is available to other drivers through the lpfc_hba data
696 * structure for use as a delayed link up mechanism with the
697 * module parameter lpfc_suppress_link_up.
698 *
699 * Return code
700 * 0 - success
701 * Any other value - error
702 **/
703int
704lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
705 uint32_t flag)
84d1b006
JS
706{
707 struct lpfc_vport *vport = phba->pport;
708 LPFC_MBOXQ_t *pmb;
709 MAILBOX_t *mb;
710 int rc;
711
712 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
713 if (!pmb) {
714 phba->link_state = LPFC_HBA_ERROR;
715 return -ENOMEM;
716 }
717 mb = &pmb->u.mb;
718 pmb->vport = vport;
719
026abb87
JS
720 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
721 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
722 !(phba->lmt & LMT_1Gb)) ||
723 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
724 !(phba->lmt & LMT_2Gb)) ||
725 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
726 !(phba->lmt & LMT_4Gb)) ||
727 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
728 !(phba->lmt & LMT_8Gb)) ||
729 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
730 !(phba->lmt & LMT_10Gb)) ||
731 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS
732 !(phba->lmt & LMT_16Gb)) ||
733 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
734 !(phba->lmt & LMT_32Gb))) {
026abb87
JS
735 /* Reset link speed to auto */
736 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
737 "1302 Invalid speed for this board:%d "
738 "Reset link speed to auto.\n",
739 phba->cfg_link_speed);
740 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
741 }
1b51197d 742 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 743 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS
744 if (phba->sli_rev < LPFC_SLI_REV4)
745 lpfc_set_loopback_flag(phba);
6e7288d9 746 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 747 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS
748 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
749 "0498 Adapter failed to init, mbxCmd x%x "
750 "INIT_LINK, mbxStatus x%x\n",
751 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS
752 if (phba->sli_rev <= LPFC_SLI_REV3) {
753 /* Clear all interrupt enable conditions */
754 writel(0, phba->HCregaddr);
755 readl(phba->HCregaddr); /* flush */
756 /* Clear all pending interrupts */
757 writel(0xffffffff, phba->HAregaddr);
758 readl(phba->HAregaddr); /* flush */
759 }
84d1b006 760 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 761 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS
762 mempool_free(pmb, phba->mbox_mem_pool);
763 return -EIO;
764 }
e40a02c1 765 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS
766 if (flag == MBX_POLL)
767 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS
768
769 return 0;
770}
771
772/**
773 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS
774 * @phba: pointer to lpfc hba data structure.
775 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
776 *
777 * This routine will issue the DOWN_LINK mailbox command call.
778 * It is available to other drivers through the lpfc_hba data
779 * structure for use to stop the link.
780 *
781 * Return code
782 * 0 - success
783 * Any other value - error
784 **/
e399b228 785static int
6e7288d9 786lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS
787{
788 LPFC_MBOXQ_t *pmb;
789 int rc;
790
791 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
792 if (!pmb) {
793 phba->link_state = LPFC_HBA_ERROR;
794 return -ENOMEM;
795 }
796
797 lpfc_printf_log(phba,
798 KERN_ERR, LOG_INIT,
799 "0491 Adapter Link is disabled.\n");
800 lpfc_down_link(phba, pmb);
801 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 802 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS
803 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
804 lpfc_printf_log(phba,
805 KERN_ERR, LOG_INIT,
806 "2522 Adapter failed to issue DOWN_LINK"
807 " mbox command rc 0x%x\n", rc);
808
809 mempool_free(pmb, phba->mbox_mem_pool);
810 return -EIO;
811 }
6e7288d9
JS
812 if (flag == MBX_POLL)
813 mempool_free(pmb, phba->mbox_mem_pool);
814
84d1b006
JS
815 return 0;
816}
817
e59058c4 818/**
3621a710 819 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS
820 * @phba: pointer to lpfc HBA data structure.
821 *
822 * This routine will do LPFC uninitialization before the HBA is reset when
823 * bringing down the SLI Layer.
824 *
825 * Return codes
826 * 0 - success.
827 * Any other value - error.
828 **/
dea3101e 829int
2e0fef85 830lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 831{
1b32f6aa
JS
832 struct lpfc_vport **vports;
833 int i;
3772a991
JS
834
835 if (phba->sli_rev <= LPFC_SLI_REV3) {
836 /* Disable interrupts */
837 writel(0, phba->HCregaddr);
838 readl(phba->HCregaddr); /* flush */
839 }
dea3101e 840
1b32f6aa
JS
841 if (phba->pport->load_flag & FC_UNLOADING)
842 lpfc_cleanup_discovery_resources(phba->pport);
843 else {
844 vports = lpfc_create_vport_work_array(phba);
845 if (vports != NULL)
3772a991
JS
846 for (i = 0; i <= phba->max_vports &&
847 vports[i] != NULL; i++)
1b32f6aa
JS
848 lpfc_cleanup_discovery_resources(vports[i]);
849 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS
850 }
851 return 0;
dea3101e
JB
852}
853
68e814f5
JS
854/**
855 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
856 * rspiocb which got deferred
857 *
858 * @phba: pointer to lpfc HBA data structure.
859 *
860 * This routine will cleanup completed slow path events after HBA is reset
861 * when bringing down the SLI Layer.
862 *
863 *
864 * Return codes
865 * void.
866 **/
867static void
868lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
869{
870 struct lpfc_iocbq *rspiocbq;
871 struct hbq_dmabuf *dmabuf;
872 struct lpfc_cq_event *cq_event;
873
874 spin_lock_irq(&phba->hbalock);
875 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
876 spin_unlock_irq(&phba->hbalock);
877
878 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
879 /* Get the response iocb from the head of work queue */
880 spin_lock_irq(&phba->hbalock);
881 list_remove_head(&phba->sli4_hba.sp_queue_event,
882 cq_event, struct lpfc_cq_event, list);
883 spin_unlock_irq(&phba->hbalock);
884
885 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
886 case CQE_CODE_COMPL_WQE:
887 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
888 cq_event);
889 lpfc_sli_release_iocbq(phba, rspiocbq);
890 break;
891 case CQE_CODE_RECEIVE:
892 case CQE_CODE_RECEIVE_V1:
893 dmabuf = container_of(cq_event, struct hbq_dmabuf,
894 cq_event);
895 lpfc_in_buf_free(phba, &dmabuf->dbuf);
896 }
897 }
898}
899
e59058c4 900/**
bcece5f5 901 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS
902 * @phba: pointer to lpfc HBA data structure.
903 *
bcece5f5
JS
904 * This routine will cleanup posted ELS buffers after the HBA is reset
905 * when bringing down the SLI Layer.
906 *
e59058c4
JS
907 *
908 * Return codes
bcece5f5 909 * void.
e59058c4 910 **/
bcece5f5
JS
911static void
912lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW
913{
914 struct lpfc_sli *psli = &phba->sli;
915 struct lpfc_sli_ring *pring;
916 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS
917 LIST_HEAD(buflist);
918 int count;
41415862 919
92d7f7b0
JS
920 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
921 lpfc_sli_hbqbuf_free_all(phba);
922 else {
923 /* Cleanup preposted buffers on the ELS ring */
895427bd 924 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS
925 spin_lock_irq(&phba->hbalock);
926 list_splice_init(&pring->postbufq, &buflist);
927 spin_unlock_irq(&phba->hbalock);
928
929 count = 0;
930 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 931 list_del(&mp->list);
07eab624 932 count++;
92d7f7b0
JS
933 lpfc_mbuf_free(phba, mp->virt, mp->phys);
934 kfree(mp);
935 }
07eab624
JS
936
937 spin_lock_irq(&phba->hbalock);
938 pring->postbufq_cnt -= count;
bcece5f5 939 spin_unlock_irq(&phba->hbalock);
41415862 940 }
bcece5f5
JS
941}
942
943/**
944 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
945 * @phba: pointer to lpfc HBA data structure.
946 *
947 * This routine will cleanup the txcmplq after the HBA is reset when bringing
948 * down the SLI Layer.
949 *
950 * Return codes
951 * void
952 **/
953static void
954lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
955{
956 struct lpfc_sli *psli = &phba->sli;
895427bd 957 struct lpfc_queue *qp = NULL;
bcece5f5
JS
958 struct lpfc_sli_ring *pring;
959 LIST_HEAD(completions);
960 int i;
961
895427bd
JS
962 if (phba->sli_rev != LPFC_SLI_REV4) {
963 for (i = 0; i < psli->num_rings; i++) {
964 pring = &psli->sli3_ring[i];
bcece5f5 965 spin_lock_irq(&phba->hbalock);
895427bd
JS
966 /* At this point in time the HBA is either reset or DOA
967 * Nothing should be on txcmplq as it will
968 * NEVER complete.
969 */
970 list_splice_init(&pring->txcmplq, &completions);
971 pring->txcmplq_cnt = 0;
bcece5f5 972 spin_unlock_irq(&phba->hbalock);
09372820 973
895427bd
JS
974 lpfc_sli_abort_iocb_ring(phba, pring);
975 }
a257bf90 976 /* Cancel all the IOCBs from the completions list */
895427bd
JS
977 lpfc_sli_cancel_iocbs(phba, &completions,
978 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
979 return;
980 }
981 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
982 pring = qp->pring;
983 if (!pring)
984 continue;
985 spin_lock_irq(&pring->ring_lock);
986 list_splice_init(&pring->txcmplq, &completions);
987 pring->txcmplq_cnt = 0;
988 spin_unlock_irq(&pring->ring_lock);
41415862
JW
989 lpfc_sli_abort_iocb_ring(phba, pring);
990 }
895427bd
JS
991 /* Cancel all the IOCBs from the completions list */
992 lpfc_sli_cancel_iocbs(phba, &completions,
993 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 994}
41415862 995
bcece5f5
JS
996/**
997 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
998 int i;
999 * @phba: pointer to lpfc HBA data structure.
1000 *
1001 * This routine will do uninitialization after the HBA is reset when bring
1002 * down the SLI Layer.
1003 *
1004 * Return codes
1005 * 0 - success.
1006 * Any other value - error.
1007 **/
1008static int
1009lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1010{
1011 lpfc_hba_free_post_buf(phba);
1012 lpfc_hba_clean_txcmplq(phba);
41415862
JW
1013 return 0;
1014}
5af5eee7 1015
da0436e9
JS
1016/**
1017 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1018 * @phba: pointer to lpfc HBA data structure.
1019 *
1020 * This routine will do uninitialization after the HBA is reset when bring
1021 * down the SLI Layer.
1022 *
1023 * Return codes
af901ca1 1024 * 0 - success.
da0436e9
JS
1025 * Any other value - error.
1026 **/
1027static int
1028lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1029{
1030 struct lpfc_scsi_buf *psb, *psb_next;
86c67379 1031 struct lpfc_nvmet_rcv_ctx *ctxp, *ctxp_next;
da0436e9 1032 LIST_HEAD(aborts);
895427bd 1033 LIST_HEAD(nvme_aborts);
86c67379 1034 LIST_HEAD(nvmet_aborts);
da0436e9 1035 unsigned long iflag = 0;
0f65ff68
JS
1036 struct lpfc_sglq *sglq_entry = NULL;
1037
895427bd
JS
1038
1039 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS
1040 lpfc_hba_clean_txcmplq(phba);
1041
da0436e9
JS
1042 /* At this point in time the HBA is either reset or DOA. Either
1043 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1044 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS
1045 * driver is unloading or reposted if the driver is restarting
1046 * the port.
1047 */
895427bd 1048 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1049 /* scsl_buf_list */
895427bd 1050 /* sgl_list_lock required because worker thread uses this
da0436e9
JS
1051 * list.
1052 */
895427bd 1053 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS
1054 list_for_each_entry(sglq_entry,
1055 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1056 sglq_entry->state = SGL_FREED;
1057
da0436e9 1058 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS
1059 &phba->sli4_hba.lpfc_els_sgl_list);
1060
f358dd0c 1061
895427bd 1062 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1063 /* abts_scsi_buf_list_lock required because worker thread uses this
1064 * list.
1065 */
895427bd
JS
1066 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1067 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1068 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1069 &aborts);
1070 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1071 }
1072
1073 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1074 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1075 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1076 &nvme_aborts);
86c67379
JS
1077 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1078 &nvmet_aborts);
895427bd
JS
1079 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1080 }
1081
da0436e9
JS
1082 spin_unlock_irq(&phba->hbalock);
1083
1084 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1085 psb->pCmd = NULL;
1086 psb->status = IOSTAT_SUCCESS;
1087 }
a40fc5f0
JS
1088 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1089 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1090 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1091
86c67379
JS
1092 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1093 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1094 psb->pCmd = NULL;
1095 psb->status = IOSTAT_SUCCESS;
1096 }
1097 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
1098 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1099 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1100
1101 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1102 ctxp->flag &= ~(LPFC_NVMET_XBUSY | LPFC_NVMET_ABORT_OP);
6c621a22 1103 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
86c67379 1104 }
895427bd 1105 }
895427bd 1106
68e814f5 1107 lpfc_sli4_free_sp_events(phba);
da0436e9
JS
1108 return 0;
1109}
1110
1111/**
1112 * lpfc_hba_down_post - Wrapper func for hba down post routine
1113 * @phba: pointer to lpfc HBA data structure.
1114 *
1115 * This routine wraps the actual SLI3 or SLI4 routine for performing
1116 * uninitialization after the HBA is reset when bring down the SLI Layer.
1117 *
1118 * Return codes
af901ca1 1119 * 0 - success.
da0436e9
JS
1120 * Any other value - error.
1121 **/
1122int
1123lpfc_hba_down_post(struct lpfc_hba *phba)
1124{
1125 return (*phba->lpfc_hba_down_post)(phba);
1126}
41415862 1127
e59058c4 1128/**
3621a710 1129 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS
1130 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1131 *
1132 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1133 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1134 * work-port-events bitmap and the worker thread is notified. This timeout
1135 * event will be used by the worker thread to invoke the actual timeout
1136 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1137 * be performed in the timeout handler and the HBA timeout event bit shall
1138 * be cleared by the worker thread after it has taken the event bitmap out.
1139 **/
a6ababd2 1140static void
f22eb4d3 1141lpfc_hb_timeout(struct timer_list *t)
858c9f6c
JS
1142{
1143 struct lpfc_hba *phba;
5e9d9b82 1144 uint32_t tmo_posted;
858c9f6c
JS
1145 unsigned long iflag;
1146
f22eb4d3 1147 phba = from_timer(phba, t, hb_tmofunc);
9399627f
JS
1148
1149 /* Check for heart beat timeout conditions */
858c9f6c 1150 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS
1151 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1152 if (!tmo_posted)
858c9f6c
JS
1153 phba->pport->work_port_events |= WORKER_HB_TMO;
1154 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1155
9399627f 1156 /* Tell the worker thread there is work to do */
5e9d9b82
JS
1157 if (!tmo_posted)
1158 lpfc_worker_wake_up(phba);
858c9f6c
JS
1159 return;
1160}
1161
19ca7609
JS
1162/**
1163 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1164 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1165 *
1166 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1167 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1168 * work-port-events bitmap and the worker thread is notified. This timeout
1169 * event will be used by the worker thread to invoke the actual timeout
1170 * handler routine, lpfc_rrq_handler. Any periodical operations will
1171 * be performed in the timeout handler and the RRQ timeout event bit shall
1172 * be cleared by the worker thread after it has taken the event bitmap out.
1173 **/
1174static void
f22eb4d3 1175lpfc_rrq_timeout(struct timer_list *t)
19ca7609
JS
1176{
1177 struct lpfc_hba *phba;
19ca7609
JS
1178 unsigned long iflag;
1179
f22eb4d3 1180 phba = from_timer(phba, t, rrq_tmr);
19ca7609 1181 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1182 if (!(phba->pport->load_flag & FC_UNLOADING))
1183 phba->hba_flag |= HBA_RRQ_ACTIVE;
1184 else
1185 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1186 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1187
1188 if (!(phba->pport->load_flag & FC_UNLOADING))
1189 lpfc_worker_wake_up(phba);
19ca7609
JS
1190}
1191
e59058c4 1192/**
3621a710 1193 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS
1194 * @phba: pointer to lpfc hba data structure.
1195 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1196 *
1197 * This is the callback function to the lpfc heart-beat mailbox command.
1198 * If configured, the lpfc driver issues the heart-beat mailbox command to
1199 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1200 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1201 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1202 * heart-beat outstanding state. Once the mailbox command comes back and
1203 * no error conditions detected, the heart-beat mailbox command timer is
1204 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1205 * state is cleared for the next heart-beat. If the timer expired with the
1206 * heart-beat outstanding state set, the driver will put the HBA offline.
1207 **/
858c9f6c
JS
1208static void
1209lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1210{
1211 unsigned long drvr_flag;
1212
1213 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1214 phba->hb_outstanding = 0;
1215 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1216
9399627f 1217 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS
1218 mempool_free(pmboxq, phba->mbox_mem_pool);
1219 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1220 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1221 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1222 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1223 jiffies +
1224 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1225 return;
1226}
1227
e59058c4 1228/**
3621a710 1229 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS
1230 * @phba: pointer to lpfc hba data structure.
1231 *
1232 * This is the actual HBA-timer timeout handler to be invoked by the worker
1233 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1234 * handler performs any periodic operations needed for the device. If such
1235 * periodic event has already been attended to either in the interrupt handler
1236 * or by processing slow-ring or fast-ring events within the HBA-timer
1237 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1238 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1239 * is configured and there is no heart-beat mailbox command outstanding, a
1240 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1241 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1242 * to offline.
1243 **/
858c9f6c
JS
1244void
1245lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1246{
45ed1190 1247 struct lpfc_vport **vports;
858c9f6c 1248 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1249 struct lpfc_dmabuf *buf_ptr;
45ed1190 1250 int retval, i;
858c9f6c 1251 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1252 LIST_HEAD(completions);
0cf07f84
JS
1253 struct lpfc_queue *qp;
1254 unsigned long time_elapsed;
1255 uint32_t tick_cqe, max_cqe, val;
1256 uint64_t tot, data1, data2, data3;
66d7ce93 1257 struct lpfc_nvmet_tgtport *tgtp;
0cf07f84
JS
1258 struct lpfc_register reg_data;
1259 void __iomem *eqdreg = phba->sli4_hba.u.if_type2.EQDregaddr;
858c9f6c 1260
45ed1190
JS
1261 vports = lpfc_create_vport_work_array(phba);
1262 if (vports != NULL)
4258e98e 1263 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1264 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS
1265 lpfc_fdmi_num_disc_check(vports[i]);
1266 }
45ed1190
JS
1267 lpfc_destroy_vport_work_array(phba, vports);
1268
858c9f6c 1269 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1270 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS
1271 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1272 return;
1273
0cf07f84
JS
1274 if (phba->cfg_auto_imax) {
1275 if (!phba->last_eqdelay_time) {
1276 phba->last_eqdelay_time = jiffies;
1277 goto skip_eqdelay;
1278 }
1279 time_elapsed = jiffies - phba->last_eqdelay_time;
1280 phba->last_eqdelay_time = jiffies;
1281
1282 tot = 0xffff;
1283 /* Check outstanding IO count */
1284 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1285 if (phba->nvmet_support) {
66d7ce93
DK
1286 tgtp = phba->targetport->private;
1287 /* Calculate outstanding IOs */
1288 tot = atomic_read(&tgtp->rcv_fcp_cmd_drop);
1289 tot += atomic_read(&tgtp->xmt_fcp_release);
1290 tot = atomic_read(&tgtp->rcv_fcp_cmd_in) - tot;
0cf07f84
JS
1291 } else {
1292 tot = atomic_read(&phba->fc4NvmeIoCmpls);
1293 data1 = atomic_read(
1294 &phba->fc4NvmeInputRequests);
1295 data2 = atomic_read(
1296 &phba->fc4NvmeOutputRequests);
1297 data3 = atomic_read(
1298 &phba->fc4NvmeControlRequests);
1299 tot = (data1 + data2 + data3) - tot;
1300 }
1301 }
1302
1303 /* Interrupts per sec per EQ */
1304 val = phba->cfg_fcp_imax / phba->io_channel_irqs;
1305 tick_cqe = val / CONFIG_HZ; /* Per tick per EQ */
1306
1307 /* Assume 1 CQE/ISR, calc max CQEs allowed for time duration */
1308 max_cqe = time_elapsed * tick_cqe;
1309
1310 for (i = 0; i < phba->io_channel_irqs; i++) {
1311 /* Fast-path EQ */
1312 qp = phba->sli4_hba.hba_eq[i];
1313 if (!qp)
1314 continue;
1315
1316 /* Use no EQ delay if we don't have many outstanding
1317 * IOs, or if we are only processing 1 CQE/ISR or less.
1318 * Otherwise, assume we can process up to lpfc_fcp_imax
1319 * interrupts per HBA.
1320 */
1321 if (tot < LPFC_NODELAY_MAX_IO ||
1322 qp->EQ_cqe_cnt <= max_cqe)
1323 val = 0;
1324 else
1325 val = phba->cfg_fcp_imax;
1326
1327 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
1328 /* Use EQ Delay Register method */
1329
1330 /* Convert for EQ Delay register */
1331 if (val) {
1332 /* First, interrupts per sec per EQ */
1333 val = phba->cfg_fcp_imax /
1334 phba->io_channel_irqs;
1335
1336 /* us delay between each interrupt */
1337 val = LPFC_SEC_TO_USEC / val;
1338 }
1339 if (val != qp->q_mode) {
1340 reg_data.word0 = 0;
1341 bf_set(lpfc_sliport_eqdelay_id,
1342 &reg_data, qp->queue_id);
1343 bf_set(lpfc_sliport_eqdelay_delay,
1344 &reg_data, val);
1345 writel(reg_data.word0, eqdreg);
1346 }
1347 } else {
1348 /* Use mbox command method */
1349 if (val != qp->q_mode)
1350 lpfc_modify_hba_eq_delay(phba, i,
1351 1, val);
1352 }
1353
1354 /*
1355 * val is cfg_fcp_imax or 0 for mbox delay or us delay
1356 * between interrupts for EQDR.
1357 */
1358 qp->q_mode = val;
1359 qp->EQ_cqe_cnt = 0;
1360 }
1361 }
1362
1363skip_eqdelay:
858c9f6c 1364 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1365
256ec0d0
JS
1366 if (time_after(phba->last_completion_time +
1367 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1368 jiffies)) {
858c9f6c
JS
1369 spin_unlock_irq(&phba->pport->work_port_lock);
1370 if (!phba->hb_outstanding)
1371 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1372 jiffies +
1373 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1374 else
1375 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1376 jiffies +
1377 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS
1378 return;
1379 }
1380 spin_unlock_irq(&phba->pport->work_port_lock);
1381
0ff10d46
JS
1382 if (phba->elsbuf_cnt &&
1383 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1384 spin_lock_irq(&phba->hbalock);
1385 list_splice_init(&phba->elsbuf, &completions);
1386 phba->elsbuf_cnt = 0;
1387 phba->elsbuf_prev_cnt = 0;
1388 spin_unlock_irq(&phba->hbalock);
1389
1390 while (!list_empty(&completions)) {
1391 list_remove_head(&completions, buf_ptr,
1392 struct lpfc_dmabuf, list);
1393 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1394 kfree(buf_ptr);
1395 }
1396 }
1397 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1398
858c9f6c 1399 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS
1400 if (phba->cfg_enable_hba_heartbeat) {
1401 if (!phba->hb_outstanding) {
bc73905a
JS
1402 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1403 (list_empty(&psli->mboxq))) {
1404 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1405 GFP_KERNEL);
1406 if (!pmboxq) {
1407 mod_timer(&phba->hb_tmofunc,
1408 jiffies +
256ec0d0
JS
1409 msecs_to_jiffies(1000 *
1410 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1411 return;
1412 }
1413
1414 lpfc_heart_beat(phba, pmboxq);
1415 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1416 pmboxq->vport = phba->pport;
1417 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1418 MBX_NOWAIT);
1419
1420 if (retval != MBX_BUSY &&
1421 retval != MBX_SUCCESS) {
1422 mempool_free(pmboxq,
1423 phba->mbox_mem_pool);
1424 mod_timer(&phba->hb_tmofunc,
1425 jiffies +
256ec0d0
JS
1426 msecs_to_jiffies(1000 *
1427 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1428 return;
1429 }
1430 phba->skipped_hb = 0;
1431 phba->hb_outstanding = 1;
1432 } else if (time_before_eq(phba->last_completion_time,
1433 phba->skipped_hb)) {
1434 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1435 "2857 Last completion time not "
1436 " updated in %d ms\n",
1437 jiffies_to_msecs(jiffies
1438 - phba->last_completion_time));
1439 } else
1440 phba->skipped_hb = jiffies;
1441
858c9f6c 1442 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1443 jiffies +
1444 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1445 return;
13815c83
JS
1446 } else {
1447 /*
1448 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS
1449 * we need to give the hb mailbox cmd a chance to
1450 * complete or TMO.
13815c83 1451 */
dcf2a4e0
JS
1452 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1453 "0459 Adapter heartbeat still out"
1454 "standing:last compl time was %d ms.\n",
1455 jiffies_to_msecs(jiffies
1456 - phba->last_completion_time));
1457 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1458 jiffies +
1459 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1460 }
4258e98e
JS
1461 } else {
1462 mod_timer(&phba->hb_tmofunc,
1463 jiffies +
1464 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1465 }
1466}
1467
e59058c4 1468/**
3621a710 1469 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS
1470 * @phba: pointer to lpfc hba data structure.
1471 *
1472 * This routine is called to bring the HBA offline when HBA hardware error
1473 * other than Port Error 6 has been detected.
1474 **/
09372820
JS
1475static void
1476lpfc_offline_eratt(struct lpfc_hba *phba)
1477{
1478 struct lpfc_sli *psli = &phba->sli;
1479
1480 spin_lock_irq(&phba->hbalock);
f4b4c68f 1481 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1482 spin_unlock_irq(&phba->hbalock);
618a5230 1483 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS
1484
1485 lpfc_offline(phba);
1486 lpfc_reset_barrier(phba);
f4b4c68f 1487 spin_lock_irq(&phba->hbalock);
09372820 1488 lpfc_sli_brdreset(phba);
f4b4c68f 1489 spin_unlock_irq(&phba->hbalock);
09372820
JS
1490 lpfc_hba_down_post(phba);
1491 lpfc_sli_brdready(phba, HS_MBRDY);
1492 lpfc_unblock_mgmt_io(phba);
1493 phba->link_state = LPFC_HBA_ERROR;
1494 return;
1495}
1496
da0436e9
JS
1497/**
1498 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1499 * @phba: pointer to lpfc hba data structure.
1500 *
1501 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1502 * other than Port Error 6 has been detected.
1503 **/
a88dbb6a 1504void
da0436e9
JS
1505lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1506{
946727dc
JS
1507 spin_lock_irq(&phba->hbalock);
1508 phba->link_state = LPFC_HBA_ERROR;
1509 spin_unlock_irq(&phba->hbalock);
1510
618a5230 1511 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1512 lpfc_offline(phba);
da0436e9 1513 lpfc_hba_down_post(phba);
da0436e9 1514 lpfc_unblock_mgmt_io(phba);
da0436e9
JS
1515}
1516
a257bf90
JS
1517/**
1518 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1519 * @phba: pointer to lpfc hba data structure.
1520 *
1521 * This routine is invoked to handle the deferred HBA hardware error
1522 * conditions. This type of error is indicated by HBA by setting ER1
1523 * and another ER bit in the host status register. The driver will
1524 * wait until the ER1 bit clears before handling the error condition.
1525 **/
1526static void
1527lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1528{
1529 uint32_t old_host_status = phba->work_hs;
a257bf90
JS
1530 struct lpfc_sli *psli = &phba->sli;
1531
f4b4c68f
JS
1532 /* If the pci channel is offline, ignore possible errors,
1533 * since we cannot communicate with the pci card anyway.
1534 */
1535 if (pci_channel_offline(phba->pcidev)) {
1536 spin_lock_irq(&phba->hbalock);
1537 phba->hba_flag &= ~DEFER_ERATT;
1538 spin_unlock_irq(&phba->hbalock);
1539 return;
1540 }
1541
a257bf90
JS
1542 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1543 "0479 Deferred Adapter Hardware Error "
1544 "Data: x%x x%x x%x\n",
1545 phba->work_hs,
1546 phba->work_status[0], phba->work_status[1]);
1547
1548 spin_lock_irq(&phba->hbalock);
f4b4c68f 1549 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS
1550 spin_unlock_irq(&phba->hbalock);
1551
1552
1553 /*
1554 * Firmware stops when it triggred erratt. That could cause the I/Os
1555 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1556 * SCSI layer retry it after re-establishing link.
1557 */
db55fba8 1558 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS
1559
1560 /*
1561 * There was a firmware error. Take the hba offline and then
1562 * attempt to restart it.
1563 */
618a5230 1564 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS
1565 lpfc_offline(phba);
1566
1567 /* Wait for the ER1 bit to clear.*/
1568 while (phba->work_hs & HS_FFER1) {
1569 msleep(100);
9940b97b
JS
1570 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1571 phba->work_hs = UNPLUG_ERR ;
1572 break;
1573 }
a257bf90
JS
1574 /* If driver is unloading let the worker thread continue */
1575 if (phba->pport->load_flag & FC_UNLOADING) {
1576 phba->work_hs = 0;
1577 break;
1578 }
1579 }
1580
1581 /*
1582 * This is to ptrotect against a race condition in which
1583 * first write to the host attention register clear the
1584 * host status register.
1585 */
1586 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1587 phba->work_hs = old_host_status & ~HS_FFER1;
1588
3772a991 1589 spin_lock_irq(&phba->hbalock);
a257bf90 1590 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1591 spin_unlock_irq(&phba->hbalock);
a257bf90
JS
1592 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1593 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1594}
1595
3772a991
JS
1596static void
1597lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1598{
1599 struct lpfc_board_event_header board_event;
1600 struct Scsi_Host *shost;
1601
1602 board_event.event_type = FC_REG_BOARD_EVENT;
1603 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1604 shost = lpfc_shost_from_vport(phba->pport);
1605 fc_host_post_vendor_event(shost, fc_get_event_number(),
1606 sizeof(board_event),
1607 (char *) &board_event,
1608 LPFC_NL_VENDOR_ID);
1609}
1610
e59058c4 1611/**
3772a991 1612 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS
1613 * @phba: pointer to lpfc hba data structure.
1614 *
1615 * This routine is invoked to handle the following HBA hardware error
1616 * conditions:
1617 * 1 - HBA error attention interrupt
1618 * 2 - DMA ring index out of range
1619 * 3 - Mailbox command came back as unknown
1620 **/
3772a991
JS
1621static void
1622lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1623{
2e0fef85 1624 struct lpfc_vport *vport = phba->pport;
2e0fef85 1625 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1626 uint32_t event_data;
57127f15
JS
1627 unsigned long temperature;
1628 struct temp_event temp_event_data;
92d7f7b0 1629 struct Scsi_Host *shost;
2e0fef85 1630
8d63f375 1631 /* If the pci channel is offline, ignore possible errors,
3772a991
JS
1632 * since we cannot communicate with the pci card anyway.
1633 */
1634 if (pci_channel_offline(phba->pcidev)) {
1635 spin_lock_irq(&phba->hbalock);
1636 phba->hba_flag &= ~DEFER_ERATT;
1637 spin_unlock_irq(&phba->hbalock);
8d63f375 1638 return;
3772a991
JS
1639 }
1640
13815c83
JS
1641 /* If resets are disabled then leave the HBA alone and return */
1642 if (!phba->cfg_enable_hba_reset)
1643 return;
dea3101e 1644
ea2151b4 1645 /* Send an internal error event to mgmt application */
3772a991 1646 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1647
a257bf90
JS
1648 if (phba->hba_flag & DEFER_ERATT)
1649 lpfc_handle_deferred_eratt(phba);
1650
dcf2a4e0
JS
1651 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1652 if (phba->work_hs & HS_FFER6)
1653 /* Re-establishing Link */
1654 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1655 "1301 Re-establishing Link "
1656 "Data: x%x x%x x%x\n",
1657 phba->work_hs, phba->work_status[0],
1658 phba->work_status[1]);
1659 if (phba->work_hs & HS_FFER8)
1660 /* Device Zeroization */
1661 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1662 "2861 Host Authentication device "
1663 "zeroization Data:x%x x%x x%x\n",
1664 phba->work_hs, phba->work_status[0],
1665 phba->work_status[1]);
58da1ffb 1666
92d7f7b0 1667 spin_lock_irq(&phba->hbalock);
f4b4c68f 1668 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1669 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1670
1671 /*
1672 * Firmware stops when it triggled erratt with HS_FFER6.
1673 * That could cause the I/Os dropped by the firmware.
1674 * Error iocb (I/O) on txcmplq and let the SCSI layer
1675 * retry it after re-establishing link.
1676 */
db55fba8 1677 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1678
dea3101e
JB
1679 /*
1680 * There was a firmware error. Take the hba offline and then
1681 * attempt to restart it.
1682 */
618a5230 1683 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1684 lpfc_offline(phba);
41415862 1685 lpfc_sli_brdrestart(phba);
dea3101e 1686 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1687 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
1688 return;
1689 }
46fa311e 1690 lpfc_unblock_mgmt_io(phba);
57127f15
JS
1691 } else if (phba->work_hs & HS_CRIT_TEMP) {
1692 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1693 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1694 temp_event_data.event_code = LPFC_CRIT_TEMP;
1695 temp_event_data.data = (uint32_t)temperature;
1696
1697 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1698 "0406 Adapter maximum temperature exceeded "
57127f15
JS
1699 "(%ld), taking this port offline "
1700 "Data: x%x x%x x%x\n",
1701 temperature, phba->work_hs,
1702 phba->work_status[0], phba->work_status[1]);
1703
1704 shost = lpfc_shost_from_vport(phba->pport);
1705 fc_host_post_vendor_event(shost, fc_get_event_number(),
1706 sizeof(temp_event_data),
1707 (char *) &temp_event_data,
1708 SCSI_NL_VID_TYPE_PCI
1709 | PCI_VENDOR_ID_EMULEX);
1710
7af67051 1711 spin_lock_irq(&phba->hbalock);
7af67051
JS
1712 phba->over_temp_state = HBA_OVER_TEMP;
1713 spin_unlock_irq(&phba->hbalock);
09372820 1714 lpfc_offline_eratt(phba);
57127f15 1715
dea3101e
JB
1716 } else {
1717 /* The if clause above forces this code path when the status
9399627f
JS
1718 * failure is a value other than FFER6. Do not call the offline
1719 * twice. This is the adapter hardware error path.
dea3101e
JB
1720 */
1721 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1722 "0457 Adapter Hardware Error "
dea3101e 1723 "Data: x%x x%x x%x\n",
e8b62011 1724 phba->work_hs,
dea3101e
JB
1725 phba->work_status[0], phba->work_status[1]);
1726
d2873e4c 1727 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1728 shost = lpfc_shost_from_vport(vport);
2e0fef85 1729 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS
1730 sizeof(event_data), (char *) &event_data,
1731 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1732
09372820 1733 lpfc_offline_eratt(phba);
dea3101e 1734 }
9399627f 1735 return;
dea3101e
JB
1736}
1737
618a5230
JS
1738/**
1739 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1740 * @phba: pointer to lpfc hba data structure.
1741 * @mbx_action: flag for mailbox shutdown action.
1742 *
1743 * This routine is invoked to perform an SLI4 port PCI function reset in
1744 * response to port status register polling attention. It waits for port
1745 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1746 * During this process, interrupt vectors are freed and later requested
1747 * for handling possible port resource change.
1748 **/
1749static int
e10b2022
JS
1750lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1751 bool en_rn_msg)
618a5230
JS
1752{
1753 int rc;
1754 uint32_t intr_mode;
1755
65791f1f
JS
1756 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1757 LPFC_SLI_INTF_IF_TYPE_2) {
1758 /*
1759 * On error status condition, driver need to wait for port
1760 * ready before performing reset.
1761 */
1762 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1763 if (rc)
65791f1f
JS
1764 return rc;
1765 }
0e916ee7 1766
65791f1f
JS
1767 /* need reset: attempt for port recovery */
1768 if (en_rn_msg)
1769 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1770 "2887 Reset Needed: Attempting Port "
1771 "Recovery...\n");
1772 lpfc_offline_prep(phba, mbx_action);
1773 lpfc_offline(phba);
1774 /* release interrupt for possible resource change */
1775 lpfc_sli4_disable_intr(phba);
1776 lpfc_sli_brdrestart(phba);
1777 /* request and enable interrupt */
1778 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1779 if (intr_mode == LPFC_INTR_ERROR) {
1780 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1781 "3175 Failed to enable interrupt\n");
1782 return -EIO;
618a5230 1783 }
65791f1f
JS
1784 phba->intr_mode = intr_mode;
1785 rc = lpfc_online(phba);
1786 if (rc == 0)
1787 lpfc_unblock_mgmt_io(phba);
1788
618a5230
JS
1789 return rc;
1790}
1791
da0436e9
JS
1792/**
1793 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1794 * @phba: pointer to lpfc hba data structure.
1795 *
1796 * This routine is invoked to handle the SLI4 HBA hardware error attention
1797 * conditions.
1798 **/
1799static void
1800lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1801{
1802 struct lpfc_vport *vport = phba->pport;
1803 uint32_t event_data;
1804 struct Scsi_Host *shost;
2fcee4bf 1805 uint32_t if_type;
2e90f4b5
JS
1806 struct lpfc_register portstat_reg = {0};
1807 uint32_t reg_err1, reg_err2;
1808 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1809 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1810 bool en_rn_msg = true;
946727dc 1811 struct temp_event temp_event_data;
65791f1f
JS
1812 struct lpfc_register portsmphr_reg;
1813 int rc, i;
da0436e9
JS
1814
1815 /* If the pci channel is offline, ignore possible errors, since
1816 * we cannot communicate with the pci card anyway.
1817 */
1818 if (pci_channel_offline(phba->pcidev))
1819 return;
da0436e9 1820
65791f1f 1821 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS
1822 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1823 switch (if_type) {
1824 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS
1825 pci_rd_rc1 = lpfc_readl(
1826 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1827 &uerrlo_reg);
1828 pci_rd_rc2 = lpfc_readl(
1829 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1830 &uemasklo_reg);
1831 /* consider PCI bus read error as pci_channel_offline */
1832 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1833 return;
65791f1f
JS
1834 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1835 lpfc_sli4_offline_eratt(phba);
1836 return;
1837 }
1838 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1839 "7623 Checking UE recoverable");
1840
1841 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1842 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1843 &portsmphr_reg.word0))
1844 continue;
1845
1846 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1847 &portsmphr_reg);
1848 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1849 LPFC_PORT_SEM_UE_RECOVERABLE)
1850 break;
1851 /*Sleep for 1Sec, before checking SEMAPHORE */
1852 msleep(1000);
1853 }
1854
1855 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1856 "4827 smphr_port_status x%x : Waited %dSec",
1857 smphr_port_status, i);
1858
1859 /* Recoverable UE, reset the HBA device */
1860 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1861 LPFC_PORT_SEM_UE_RECOVERABLE) {
1862 for (i = 0; i < 20; i++) {
1863 msleep(1000);
1864 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1865 &portsmphr_reg.word0) &&
1866 (LPFC_POST_STAGE_PORT_READY ==
1867 bf_get(lpfc_port_smphr_port_status,
1868 &portsmphr_reg))) {
1869 rc = lpfc_sli4_port_sta_fn_reset(phba,
1870 LPFC_MBX_NO_WAIT, en_rn_msg);
1871 if (rc == 0)
1872 return;
1873 lpfc_printf_log(phba,
1874 KERN_ERR, LOG_INIT,
1875 "4215 Failed to recover UE");
1876 break;
1877 }
1878 }
1879 }
1880 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1881 "7624 Firmware not ready: Failing UE recovery,"
1882 " waited %dSec", i);
2fcee4bf
JS
1883 lpfc_sli4_offline_eratt(phba);
1884 break;
946727dc 1885
2fcee4bf 1886 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS
1887 pci_rd_rc1 = lpfc_readl(
1888 phba->sli4_hba.u.if_type2.STATUSregaddr,
1889 &portstat_reg.word0);
1890 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS
1891 if (pci_rd_rc1 == -EIO) {
1892 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1893 "3151 PCI bus read access failure: x%x\n",
1894 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1895 return;
6b5151fd 1896 }
2e90f4b5
JS
1897 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1898 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1899 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS
1900 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1901 "2889 Port Overtemperature event, "
946727dc
JS
1902 "taking port offline Data: x%x x%x\n",
1903 reg_err1, reg_err2);
1904
310429ef 1905 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
1906 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1907 temp_event_data.event_code = LPFC_CRIT_TEMP;
1908 temp_event_data.data = 0xFFFFFFFF;
1909
1910 shost = lpfc_shost_from_vport(phba->pport);
1911 fc_host_post_vendor_event(shost, fc_get_event_number(),
1912 sizeof(temp_event_data),
1913 (char *)&temp_event_data,
1914 SCSI_NL_VID_TYPE_PCI
1915 | PCI_VENDOR_ID_EMULEX);
1916
2fcee4bf
JS
1917 spin_lock_irq(&phba->hbalock);
1918 phba->over_temp_state = HBA_OVER_TEMP;
1919 spin_unlock_irq(&phba->hbalock);
1920 lpfc_sli4_offline_eratt(phba);
946727dc 1921 return;
2fcee4bf 1922 }
2e90f4b5 1923 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1924 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1925 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS
1926 "3143 Port Down: Firmware Update "
1927 "Detected\n");
1928 en_rn_msg = false;
1929 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS
1930 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1931 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1932 "3144 Port Down: Debug Dump\n");
1933 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1934 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1935 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1936 "3145 Port Down: Provisioning\n");
618a5230 1937
946727dc
JS
1938 /* If resets are disabled then leave the HBA alone and return */
1939 if (!phba->cfg_enable_hba_reset)
1940 return;
1941
618a5230 1942 /* Check port status register for function reset */
e10b2022
JS
1943 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1944 en_rn_msg);
618a5230
JS
1945 if (rc == 0) {
1946 /* don't report event on forced debug dump */
1947 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1948 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1949 return;
1950 else
1951 break;
2fcee4bf 1952 }
618a5230 1953 /* fall through for not able to recover */
6b5151fd
JS
1954 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1955 "3152 Unrecoverable error, bring the port "
1956 "offline\n");
2fcee4bf
JS
1957 lpfc_sli4_offline_eratt(phba);
1958 break;
1959 case LPFC_SLI_INTF_IF_TYPE_1:
1960 default:
1961 break;
1962 }
2e90f4b5
JS
1963 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1964 "3123 Report dump event to upper layer\n");
1965 /* Send an internal error event to mgmt application */
1966 lpfc_board_errevt_to_mgmt(phba);
1967
1968 event_data = FC_REG_DUMP_EVENT;
1969 shost = lpfc_shost_from_vport(vport);
1970 fc_host_post_vendor_event(shost, fc_get_event_number(),
1971 sizeof(event_data), (char *) &event_data,
1972 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS
1973}
1974
1975/**
1976 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1977 * @phba: pointer to lpfc HBA data structure.
1978 *
1979 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1980 * routine from the API jump table function pointer from the lpfc_hba struct.
1981 *
1982 * Return codes
af901ca1 1983 * 0 - success.
da0436e9
JS
1984 * Any other value - error.
1985 **/
1986void
1987lpfc_handle_eratt(struct lpfc_hba *phba)
1988{
1989 (*phba->lpfc_handle_eratt)(phba);
1990}
1991
e59058c4 1992/**
3621a710 1993 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS
1994 * @phba: pointer to lpfc hba data structure.
1995 *
1996 * This routine is invoked from the worker thread to handle a HBA host
895427bd 1997 * attention link event. SLI3 only.
e59058c4 1998 **/
dea3101e 1999void
2e0fef85 2000lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 2001{
2e0fef85
JS
2002 struct lpfc_vport *vport = phba->pport;
2003 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB
2004 LPFC_MBOXQ_t *pmb;
2005 volatile uint32_t control;
2006 struct lpfc_dmabuf *mp;
09372820 2007 int rc = 0;
dea3101e
JB
2008
2009 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS
2010 if (!pmb) {
2011 rc = 1;
dea3101e 2012 goto lpfc_handle_latt_err_exit;
09372820 2013 }
dea3101e
JB
2014
2015 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS
2016 if (!mp) {
2017 rc = 2;
dea3101e 2018 goto lpfc_handle_latt_free_pmb;
09372820 2019 }
dea3101e
JB
2020
2021 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS
2022 if (!mp->virt) {
2023 rc = 3;
dea3101e 2024 goto lpfc_handle_latt_free_mp;
09372820 2025 }
dea3101e 2026
6281bfe0 2027 /* Cleanup any outstanding ELS commands */
549e55cd 2028 lpfc_els_flush_all_cmd(phba);
dea3101e
JB
2029
2030 psli->slistat.link_event++;
76a95d75
JS
2031 lpfc_read_topology(phba, pmb, mp);
2032 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 2033 pmb->vport = vport;
0d2b6b83 2034 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 2035 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 2036 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS
2037 if (rc == MBX_NOT_FINISHED) {
2038 rc = 4;
14691150 2039 goto lpfc_handle_latt_free_mbuf;
09372820 2040 }
dea3101e
JB
2041
2042 /* Clear Link Attention in HA REG */
2e0fef85 2043 spin_lock_irq(&phba->hbalock);
dea3101e
JB
2044 writel(HA_LATT, phba->HAregaddr);
2045 readl(phba->HAregaddr); /* flush */
2e0fef85 2046 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
2047
2048 return;
2049
14691150 2050lpfc_handle_latt_free_mbuf:
895427bd 2051 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 2052 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e
JB
2053lpfc_handle_latt_free_mp:
2054 kfree(mp);
2055lpfc_handle_latt_free_pmb:
1dcb58e5 2056 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
2057lpfc_handle_latt_err_exit:
2058 /* Enable Link attention interrupts */
2e0fef85 2059 spin_lock_irq(&phba->hbalock);
dea3101e
JB
2060 psli->sli_flag |= LPFC_PROCESS_LA;
2061 control = readl(phba->HCregaddr);
2062 control |= HC_LAINT_ENA;
2063 writel(control, phba->HCregaddr);
2064 readl(phba->HCregaddr); /* flush */
2065
2066 /* Clear Link Attention in HA REG */
2067 writel(HA_LATT, phba->HAregaddr);
2068 readl(phba->HAregaddr); /* flush */
2e0fef85 2069 spin_unlock_irq(&phba->hbalock);
dea3101e 2070 lpfc_linkdown(phba);
2e0fef85 2071 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2072
09372820
JS
2073 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
2074 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e
JB
2075
2076 return;
2077}
2078
e59058c4 2079/**
3621a710 2080 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS
2081 * @phba: pointer to lpfc hba data structure.
2082 * @vpd: pointer to the vital product data.
2083 * @len: length of the vital product data in bytes.
2084 *
2085 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2086 * an array of characters. In this routine, the ModelName, ProgramType, and
2087 * ModelDesc, etc. fields of the phba data structure will be populated.
2088 *
2089 * Return codes
2090 * 0 - pointer to the VPD passed in is NULL
2091 * 1 - success
2092 **/
3772a991 2093int
2e0fef85 2094lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e
JB
2095{
2096 uint8_t lenlo, lenhi;
07da60c1 2097 int Length;
dea3101e
JB
2098 int i, j;
2099 int finished = 0;
2100 int index = 0;
2101
2102 if (!vpd)
2103 return 0;
2104
2105 /* Vital Product */
ed957684 2106 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2107 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e
JB
2108 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2109 (uint32_t) vpd[3]);
74b72a59 2110 while (!finished && (index < (len - 4))) {
dea3101e
JB
2111 switch (vpd[index]) {
2112 case 0x82:
74b72a59 2113 case 0x91:
dea3101e
JB
2114 index += 1;
2115 lenlo = vpd[index];
2116 index += 1;
2117 lenhi = vpd[index];
2118 index += 1;
2119 i = ((((unsigned short)lenhi) << 8) + lenlo);
2120 index += i;
2121 break;
2122 case 0x90:
2123 index += 1;
2124 lenlo = vpd[index];
2125 index += 1;
2126 lenhi = vpd[index];
2127 index += 1;
2128 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW
2129 if (Length > len - index)
2130 Length = len - index;
dea3101e
JB
2131 while (Length > 0) {
2132 /* Look for Serial Number */
2133 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2134 index += 2;
2135 i = vpd[index];
2136 index += 1;
2137 j = 0;
2138 Length -= (3+i);
2139 while(i--) {
2140 phba->SerialNumber[j++] = vpd[index++];
2141 if (j == 31)
2142 break;
2143 }
2144 phba->SerialNumber[j] = 0;
2145 continue;
2146 }
2147 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2148 phba->vpd_flag |= VPD_MODEL_DESC;
2149 index += 2;
2150 i = vpd[index];
2151 index += 1;
2152 j = 0;
2153 Length -= (3+i);
2154 while(i--) {
2155 phba->ModelDesc[j++] = vpd[index++];
2156 if (j == 255)
2157 break;
2158 }
2159 phba->ModelDesc[j] = 0;
2160 continue;
2161 }
2162 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2163 phba->vpd_flag |= VPD_MODEL_NAME;
2164 index += 2;
2165 i = vpd[index];
2166 index += 1;
2167 j = 0;
2168 Length -= (3+i);
2169 while(i--) {
2170 phba->ModelName[j++] = vpd[index++];
2171 if (j == 79)
2172 break;
2173 }
2174 phba->ModelName[j] = 0;
2175 continue;
2176 }
2177 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2178 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2179 index += 2;
2180 i = vpd[index];
2181 index += 1;
2182 j = 0;
2183 Length -= (3+i);
2184 while(i--) {
2185 phba->ProgramType[j++] = vpd[index++];
2186 if (j == 255)
2187 break;
2188 }
2189 phba->ProgramType[j] = 0;
2190 continue;
2191 }
2192 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2193 phba->vpd_flag |= VPD_PORT;
2194 index += 2;
2195 i = vpd[index];
2196 index += 1;
2197 j = 0;
2198 Length -= (3+i);
2199 while(i--) {
cd1c8301
JS
2200 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2201 (phba->sli4_hba.pport_name_sta ==
2202 LPFC_SLI4_PPNAME_GET)) {
2203 j++;
2204 index++;
2205 } else
2206 phba->Port[j++] = vpd[index++];
2207 if (j == 19)
2208 break;
dea3101e 2209 }
cd1c8301
JS
2210 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2211 (phba->sli4_hba.pport_name_sta ==
2212 LPFC_SLI4_PPNAME_NON))
2213 phba->Port[j] = 0;
dea3101e
JB
2214 continue;
2215 }
2216 else {
2217 index += 2;
2218 i = vpd[index];
2219 index += 1;
2220 index += i;
2221 Length -= (3 + i);
2222 }
2223 }
2224 finished = 0;
2225 break;
2226 case 0x78:
2227 finished = 1;
2228 break;
2229 default:
2230 index ++;
2231 break;
2232 }
74b72a59 2233 }
dea3101e
JB
2234
2235 return(1);
2236}
2237
e59058c4 2238/**
3621a710 2239 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS
2240 * @phba: pointer to lpfc hba data structure.
2241 * @mdp: pointer to the data structure to hold the derived model name.
2242 * @descp: pointer to the data structure to hold the derived description.
2243 *
2244 * This routine retrieves HBA's description based on its registered PCI device
2245 * ID. The @descp passed into this function points to an array of 256 chars. It
2246 * shall be returned with the model name, maximum speed, and the host bus type.
2247 * The @mdp passed into this function points to an array of 80 chars. When the
2248 * function returns, the @mdp will be filled with the model name.
2249 **/
dea3101e 2250static void
2e0fef85 2251lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e
JB
2252{
2253 lpfc_vpd_t *vp;
fefcb2b6 2254 uint16_t dev_id = phba->pcidev->device;
74b72a59 2255 int max_speed;
84774a4d 2256 int GE = 0;
da0436e9 2257 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2258 struct {
a747c9ce
JS
2259 char *name;
2260 char *bus;
2261 char *function;
2262 } m = {"<Unknown>", "", ""};
74b72a59
JW
2263
2264 if (mdp && mdp[0] != '\0'
2265 && descp && descp[0] != '\0')
2266 return;
2267
d38dd52c
JS
2268 if (phba->lmt & LMT_32Gb)
2269 max_speed = 32;
2270 else if (phba->lmt & LMT_16Gb)
c0c11512
JS
2271 max_speed = 16;
2272 else if (phba->lmt & LMT_10Gb)
74b72a59
JW
2273 max_speed = 10;
2274 else if (phba->lmt & LMT_8Gb)
2275 max_speed = 8;
2276 else if (phba->lmt & LMT_4Gb)
2277 max_speed = 4;
2278 else if (phba->lmt & LMT_2Gb)
2279 max_speed = 2;
4169d868 2280 else if (phba->lmt & LMT_1Gb)
74b72a59 2281 max_speed = 1;
4169d868
JS
2282 else
2283 max_speed = 0;
dea3101e
JB
2284
2285 vp = &phba->vpd;
dea3101e 2286
e4adb204 2287 switch (dev_id) {
06325e74 2288 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS
2289 m = (typeof(m)){"LP6000", "PCI",
2290 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2291 break;
dea3101e
JB
2292 case PCI_DEVICE_ID_SUPERFLY:
2293 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2294 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2295 else
12222f4f
JS
2296 m = (typeof(m)){"LP7000E", "PCI", ""};
2297 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2298 break;
2299 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2300 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2301 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2302 break;
2303 case PCI_DEVICE_ID_CENTAUR:
2304 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2305 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2306 else
12222f4f
JS
2307 m = (typeof(m)){"LP9000", "PCI", ""};
2308 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2309 break;
2310 case PCI_DEVICE_ID_RFLY:
a747c9ce 2311 m = (typeof(m)){"LP952", "PCI",
12222f4f 2312 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2313 break;
2314 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2315 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2316 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2317 break;
2318 case PCI_DEVICE_ID_THOR:
a747c9ce 2319 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2320 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2321 break;
2322 case PCI_DEVICE_ID_VIPER:
a747c9ce 2323 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2324 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2325 break;
2326 case PCI_DEVICE_ID_PFLY:
a747c9ce 2327 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2328 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2329 break;
2330 case PCI_DEVICE_ID_TFLY:
a747c9ce 2331 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2332 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2333 break;
2334 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2335 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2336 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2337 break;
e4adb204 2338 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2339 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2340 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2341 break;
2342 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2343 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2344 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2345 break;
2346 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS
2347 m = (typeof(m)){"LPe1000", "PCIe",
2348 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2349 break;
2350 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS
2351 m = (typeof(m)){"LPe1000-SP", "PCIe",
2352 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2353 break;
2354 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS
2355 m = (typeof(m)){"LPe1002-SP", "PCIe",
2356 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2357 break;
dea3101e 2358 case PCI_DEVICE_ID_BMID:
a747c9ce 2359 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e
JB
2360 break;
2361 case PCI_DEVICE_ID_BSMB:
12222f4f
JS
2362 m = (typeof(m)){"LP111", "PCI-X2",
2363 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2364 break;
2365 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2366 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2367 break;
e4adb204 2368 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2369 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC
2370 break;
2371 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2372 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2373 GE = 1;
e4adb204 2374 break;
dea3101e 2375 case PCI_DEVICE_ID_ZMID:
a747c9ce 2376 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2377 break;
2378 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2379 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2380 break;
2381 case PCI_DEVICE_ID_LP101:
12222f4f
JS
2382 m = (typeof(m)){"LP101", "PCI-X",
2383 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2384 break;
2385 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS
2386 m = (typeof(m)){"LP10000-S", "PCI",
2387 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2388 break;
e4adb204 2389 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS
2390 m = (typeof(m)){"LP11000-S", "PCI-X2",
2391 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2392 break;
e4adb204 2393 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS
2394 m = (typeof(m)){"LPe11000-S", "PCIe",
2395 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2396 break;
b87eab38 2397 case PCI_DEVICE_ID_SAT:
a747c9ce 2398 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2399 break;
2400 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2401 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2402 break;
2403 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2404 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2405 break;
2406 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2407 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2408 break;
2409 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2410 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2411 break;
2412 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2413 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2414 break;
84774a4d 2415 case PCI_DEVICE_ID_HORNET:
12222f4f
JS
2416 m = (typeof(m)){"LP21000", "PCIe",
2417 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS
2418 GE = 1;
2419 break;
2420 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2421 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2422 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2423 break;
2424 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2425 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2426 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2427 break;
2428 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2429 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2430 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2431 break;
da0436e9
JS
2432 case PCI_DEVICE_ID_TIGERSHARK:
2433 oneConnect = 1;
a747c9ce 2434 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2435 break;
a747c9ce 2436 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2437 oneConnect = 1;
a747c9ce
JS
2438 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2439 break;
2440 case PCI_DEVICE_ID_FALCON:
2441 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2442 "EmulexSecure Fibre"};
6669f9bb 2443 break;
98fc5dd9
JS
2444 case PCI_DEVICE_ID_BALIUS:
2445 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2446 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2447 break;
085c647c 2448 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2449 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2450 break;
12222f4f
JS
2451 case PCI_DEVICE_ID_LANCER_FC_VF:
2452 m = (typeof(m)){"LPe16000", "PCIe",
2453 "Obsolete, Unsupported Fibre Channel Adapter"};
2454 break;
085c647c
JS
2455 case PCI_DEVICE_ID_LANCER_FCOE:
2456 oneConnect = 1;
079b5c91 2457 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2458 break;
12222f4f
JS
2459 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2460 oneConnect = 1;
2461 m = (typeof(m)){"OCe15100", "PCIe",
2462 "Obsolete, Unsupported FCoE"};
2463 break;
d38dd52c
JS
2464 case PCI_DEVICE_ID_LANCER_G6_FC:
2465 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2466 break;
f8cafd38
JS
2467 case PCI_DEVICE_ID_SKYHAWK:
2468 case PCI_DEVICE_ID_SKYHAWK_VF:
2469 oneConnect = 1;
2470 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2471 break;
5cc36b3c 2472 default:
a747c9ce 2473 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2474 break;
dea3101e 2475 }
74b72a59
JW
2476
2477 if (mdp && mdp[0] == '\0')
2478 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS
2479 /*
2480 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS
2481 * and we put the port number on the end
2482 */
2483 if (descp && descp[0] == '\0') {
2484 if (oneConnect)
2485 snprintf(descp, 255,
4169d868 2486 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2487 m.name, m.function,
da0436e9 2488 phba->Port);
4169d868
JS
2489 else if (max_speed == 0)
2490 snprintf(descp, 255,
290237d2 2491 "Emulex %s %s %s",
4169d868 2492 m.name, m.bus, m.function);
da0436e9
JS
2493 else
2494 snprintf(descp, 255,
2495 "Emulex %s %d%s %s %s",
a747c9ce
JS
2496 m.name, max_speed, (GE) ? "GE" : "Gb",
2497 m.bus, m.function);
da0436e9 2498 }
dea3101e
JB
2499}
2500
e59058c4 2501/**
3621a710 2502 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS
2503 * @phba: pointer to lpfc hba data structure.
2504 * @pring: pointer to a IOCB ring.
2505 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2506 *
2507 * This routine posts a given number of IOCBs with the associated DMA buffer
2508 * descriptors specified by the cnt argument to the given IOCB ring.
2509 *
2510 * Return codes
2511 * The number of IOCBs NOT able to be posted to the IOCB ring.
2512 **/
dea3101e 2513int
495a714c 2514lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e
JB
2515{
2516 IOCB_t *icmd;
0bd4ca25 2517 struct lpfc_iocbq *iocb;
dea3101e
JB
2518 struct lpfc_dmabuf *mp1, *mp2;
2519
2520 cnt += pring->missbufcnt;
2521
2522 /* While there are buffers to post */
2523 while (cnt > 0) {
2524 /* Allocate buffer for command iocb */
0bd4ca25 2525 iocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
2526 if (iocb == NULL) {
2527 pring->missbufcnt = cnt;
2528 return cnt;
2529 }
dea3101e
JB
2530 icmd = &iocb->iocb;
2531
2532 /* 2 buffers can be posted per command */
2533 /* Allocate buffer to post */
2534 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2535 if (mp1)
98c9ea5c
JS
2536 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2537 if (!mp1 || !mp1->virt) {
c9475cb0 2538 kfree(mp1);
604a3e30 2539 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2540 pring->missbufcnt = cnt;
2541 return cnt;
2542 }
2543
2544 INIT_LIST_HEAD(&mp1->list);
2545 /* Allocate buffer to post */
2546 if (cnt > 1) {
2547 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2548 if (mp2)
2549 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2550 &mp2->phys);
98c9ea5c 2551 if (!mp2 || !mp2->virt) {
c9475cb0 2552 kfree(mp2);
dea3101e
JB
2553 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2554 kfree(mp1);
604a3e30 2555 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2556 pring->missbufcnt = cnt;
2557 return cnt;
2558 }
2559
2560 INIT_LIST_HEAD(&mp2->list);
2561 } else {
2562 mp2 = NULL;
2563 }
2564
2565 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2566 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2567 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2568 icmd->ulpBdeCount = 1;
2569 cnt--;
2570 if (mp2) {
2571 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2572 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2573 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2574 cnt--;
2575 icmd->ulpBdeCount = 2;
2576 }
2577
2578 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2579 icmd->ulpLe = 1;
2580
3772a991
JS
2581 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2582 IOCB_ERROR) {
dea3101e
JB
2583 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2584 kfree(mp1);
2585 cnt++;
2586 if (mp2) {
2587 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2588 kfree(mp2);
2589 cnt++;
2590 }
604a3e30 2591 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2592 pring->missbufcnt = cnt;
dea3101e
JB
2593 return cnt;
2594 }
dea3101e 2595 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2596 if (mp2)
dea3101e 2597 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e
JB
2598 }
2599 pring->missbufcnt = 0;
2600 return 0;
2601}
2602
e59058c4 2603/**
3621a710 2604 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS
2605 * @phba: pointer to lpfc hba data structure.
2606 *
2607 * This routine posts initial receive IOCB buffers to the ELS ring. The
2608 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2609 * set to 64 IOCBs. SLI3 only.
e59058c4
JS
2610 *
2611 * Return codes
2612 * 0 - success (currently always success)
2613 **/
dea3101e 2614static int
2e0fef85 2615lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e
JB
2616{
2617 struct lpfc_sli *psli = &phba->sli;
2618
2619 /* Ring 0, ELS / CT buffers */
895427bd 2620 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e
JB
2621 /* Ring 2 - FCP no buffers needed */
2622
2623 return 0;
2624}
2625
2626#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2627
e59058c4 2628/**
3621a710 2629 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS
2630 * @HashResultPointer: pointer to an array as hash table.
2631 *
2632 * This routine sets up the initial values to the array of hash table entries
2633 * for the LC HBAs.
2634 **/
dea3101e
JB
2635static void
2636lpfc_sha_init(uint32_t * HashResultPointer)
2637{
2638 HashResultPointer[0] = 0x67452301;
2639 HashResultPointer[1] = 0xEFCDAB89;
2640 HashResultPointer[2] = 0x98BADCFE;
2641 HashResultPointer[3] = 0x10325476;
2642 HashResultPointer[4] = 0xC3D2E1F0;
2643}
2644
e59058c4 2645/**
3621a710 2646 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS
2647 * @HashResultPointer: pointer to an initial/result hash table.
2648 * @HashWorkingPointer: pointer to an working hash table.
2649 *
2650 * This routine iterates an initial hash table pointed by @HashResultPointer
2651 * with the values from the working hash table pointeed by @HashWorkingPointer.
2652 * The results are putting back to the initial hash table, returned through
2653 * the @HashResultPointer as the result hash table.
2654 **/
dea3101e
JB
2655static void
2656lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2657{
2658 int t;
2659 uint32_t TEMP;
2660 uint32_t A, B, C, D, E;
2661 t = 16;
2662 do {
2663 HashWorkingPointer[t] =
2664 S(1,
2665 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2666 8] ^
2667 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2668 } while (++t <= 79);
2669 t = 0;
2670 A = HashResultPointer[0];
2671 B = HashResultPointer[1];
2672 C = HashResultPointer[2];
2673 D = HashResultPointer[3];
2674 E = HashResultPointer[4];
2675
2676 do {
2677 if (t < 20) {
2678 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2679 } else if (t < 40) {
2680 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2681 } else if (t < 60) {
2682 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2683 } else {
2684 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2685 }
2686 TEMP += S(5, A) + E + HashWorkingPointer[t];
2687 E = D;
2688 D = C;
2689 C = S(30, B);
2690 B = A;
2691 A = TEMP;
2692 } while (++t <= 79);
2693
2694 HashResultPointer[0] += A;
2695 HashResultPointer[1] += B;
2696 HashResultPointer[2] += C;
2697 HashResultPointer[3] += D;
2698 HashResultPointer[4] += E;
2699
2700}
2701
e59058c4 2702/**
3621a710 2703 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS
2704 * @RandomChallenge: pointer to the entry of host challenge random number array.
2705 * @HashWorking: pointer to the entry of the working hash array.
2706 *
2707 * This routine calculates the working hash array referred by @HashWorking
2708 * from the challenge random numbers associated with the host, referred by
2709 * @RandomChallenge. The result is put into the entry of the working hash
2710 * array and returned by reference through @HashWorking.
2711 **/
dea3101e
JB
2712static void
2713lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2714{
2715 *HashWorking = (*RandomChallenge ^ *HashWorking);
2716}
2717
e59058c4 2718/**
3621a710 2719 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS
2720 * @phba: pointer to lpfc hba data structure.
2721 * @hbainit: pointer to an array of unsigned 32-bit integers.
2722 *
2723 * This routine performs the special handling for LC HBA initialization.
2724 **/
dea3101e
JB
2725void
2726lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2727{
2728 int t;
2729 uint32_t *HashWorking;
2e0fef85 2730 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2731
bbfbbbc1 2732 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e
JB
2733 if (!HashWorking)
2734 return;
2735
dea3101e
JB
2736 HashWorking[0] = HashWorking[78] = *pwwnn++;
2737 HashWorking[1] = HashWorking[79] = *pwwnn;
2738
2739 for (t = 0; t < 7; t++)
2740 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2741
2742 lpfc_sha_init(hbainit);
2743 lpfc_sha_iterate(hbainit, HashWorking);
2744 kfree(HashWorking);
2745}
2746
e59058c4 2747/**
3621a710 2748 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS
2749 * @vport: pointer to a virtual N_Port data structure.
2750 *
2751 * This routine performs the necessary cleanups before deleting the @vport.
2752 * It invokes the discovery state machine to perform necessary state
2753 * transitions and to release the ndlps associated with the @vport. Note,
2754 * the physical port is treated as @vport 0.
2755 **/
87af33fe 2756void
2e0fef85 2757lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2758{
87af33fe 2759 struct lpfc_hba *phba = vport->phba;
dea3101e 2760 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2761 int i = 0;
dea3101e 2762
87af33fe
JS
2763 if (phba->link_state > LPFC_LINK_DOWN)
2764 lpfc_port_link_failure(vport);
2765
2766 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS
2767 if (!NLP_CHK_NODE_ACT(ndlp)) {
2768 ndlp = lpfc_enable_node(vport, ndlp,
2769 NLP_STE_UNUSED_NODE);
2770 if (!ndlp)
2771 continue;
2772 spin_lock_irq(&phba->ndlp_lock);
2773 NLP_SET_FREE_REQ(ndlp);
2774 spin_unlock_irq(&phba->ndlp_lock);
2775 /* Trigger the release of the ndlp memory */
2776 lpfc_nlp_put(ndlp);
2777 continue;
2778 }
2779 spin_lock_irq(&phba->ndlp_lock);
2780 if (NLP_CHK_FREE_REQ(ndlp)) {
2781 /* The ndlp should not be in memory free mode already */
2782 spin_unlock_irq(&phba->ndlp_lock);
2783 continue;
2784 } else
2785 /* Indicate request for freeing ndlp memory */
2786 NLP_SET_FREE_REQ(ndlp);
2787 spin_unlock_irq(&phba->ndlp_lock);
2788
58da1ffb
JS
2789 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2790 ndlp->nlp_DID == Fabric_DID) {
2791 /* Just free up ndlp with Fabric_DID for vports */
2792 lpfc_nlp_put(ndlp);
2793 continue;
2794 }
2795
eff4a01b
JS
2796 /* take care of nodes in unused state before the state
2797 * machine taking action.
2798 */
2799 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2800 lpfc_nlp_put(ndlp);
2801 continue;
2802 }
2803
87af33fe
JS
2804 if (ndlp->nlp_type & NLP_FABRIC)
2805 lpfc_disc_state_machine(vport, ndlp, NULL,
2806 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2807
87af33fe
JS
2808 lpfc_disc_state_machine(vport, ndlp, NULL,
2809 NLP_EVT_DEVICE_RM);
2810 }
2811
a8adb832
JS
2812 /* At this point, ALL ndlp's should be gone
2813 * because of the previous NLP_EVT_DEVICE_RM.
2814 * Lets wait for this to happen, if needed.
2815 */
87af33fe 2816 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2817 if (i++ > 3000) {
87af33fe 2818 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2819 "0233 Nodelist not empty\n");
e47c9093
JS
2820 list_for_each_entry_safe(ndlp, next_ndlp,
2821 &vport->fc_nodes, nlp_listp) {
2822 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2823 LOG_NODE,
d7c255b2 2824 "0282 did:x%x ndlp:x%p "
e47c9093
JS
2825 "usgmap:x%x refcnt:%d\n",
2826 ndlp->nlp_DID, (void *)ndlp,
2827 ndlp->nlp_usg_map,
2c935bc5 2828 kref_read(&ndlp->kref));
e47c9093 2829 }
a8adb832 2830 break;
87af33fe 2831 }
a8adb832
JS
2832
2833 /* Wait for any activity on ndlps to settle */
2834 msleep(10);
87af33fe 2835 }
1151e3ec 2836 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e
JB
2837}
2838
e59058c4 2839/**
3621a710 2840 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS
2841 * @vport: pointer to a virtual N_Port data structure.
2842 *
2843 * This routine stops all the timers associated with a @vport. This function
2844 * is invoked before disabling or deleting a @vport. Note that the physical
2845 * port is treated as @vport 0.
2846 **/
92d7f7b0
JS
2847void
2848lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2849{
92d7f7b0 2850 del_timer_sync(&vport->els_tmofunc);
92494144 2851 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS
2852 lpfc_can_disctmo(vport);
2853 return;
dea3101e
JB
2854}
2855
ecfd03c6
JS
2856/**
2857 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2858 * @phba: pointer to lpfc hba data structure.
2859 *
2860 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2861 * caller of this routine should already hold the host lock.
2862 **/
2863void
2864__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2865{
5ac6b303
JS
2866 /* Clear pending FCF rediscovery wait flag */
2867 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2868
ecfd03c6
JS
2869 /* Now, try to stop the timer */
2870 del_timer(&phba->fcf.redisc_wait);
2871}
2872
2873/**
2874 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2875 * @phba: pointer to lpfc hba data structure.
2876 *
2877 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2878 * checks whether the FCF rediscovery wait timer is pending with the host
2879 * lock held before proceeding with disabling the timer and clearing the
2880 * wait timer pendig flag.
2881 **/
2882void
2883lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2884{
2885 spin_lock_irq(&phba->hbalock);
2886 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2887 /* FCF rediscovery timer already fired or stopped */
2888 spin_unlock_irq(&phba->hbalock);
2889 return;
2890 }
2891 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS
2892 /* Clear failover in progress flags */
2893 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS
2894 spin_unlock_irq(&phba->hbalock);
2895}
2896
e59058c4 2897/**
3772a991 2898 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS
2899 * @phba: pointer to lpfc hba data structure.
2900 *
2901 * This routine stops all the timers associated with a HBA. This function is
2902 * invoked before either putting a HBA offline or unloading the driver.
2903 **/
3772a991
JS
2904void
2905lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2906{
51ef4c26 2907 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2908 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2909 del_timer_sync(&phba->fabric_block_timer);
9399627f 2910 del_timer_sync(&phba->eratt_poll);
3772a991 2911 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS
2912 if (phba->sli_rev == LPFC_SLI_REV4) {
2913 del_timer_sync(&phba->rrq_tmr);
2914 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2915 }
3772a991
JS
2916 phba->hb_outstanding = 0;
2917
2918 switch (phba->pci_dev_grp) {
2919 case LPFC_PCI_DEV_LP:
2920 /* Stop any LightPulse device specific driver timers */
2921 del_timer_sync(&phba->fcp_poll_timer);
2922 break;
2923 case LPFC_PCI_DEV_OC:
2924 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2925 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS
2926 break;
2927 default:
2928 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2929 "0297 Invalid device group (x%x)\n",
2930 phba->pci_dev_grp);
2931 break;
2932 }
2e0fef85 2933 return;
dea3101e
JB
2934}
2935
e59058c4 2936/**
3621a710 2937 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS
2938 * @phba: pointer to lpfc hba data structure.
2939 *
2940 * This routine marks a HBA's management interface as blocked. Once the HBA's
2941 * management interface is marked as blocked, all the user space access to
2942 * the HBA, whether they are from sysfs interface or libdfc interface will
2943 * all be blocked. The HBA is set to block the management interface when the
2944 * driver prepares the HBA interface for online or offline.
2945 **/
a6ababd2 2946static void
618a5230 2947lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB
2948{
2949 unsigned long iflag;
6e7288d9
JS
2950 uint8_t actcmd = MBX_HEARTBEAT;
2951 unsigned long timeout;
2952
a6ababd2
AB
2953 spin_lock_irqsave(&phba->hbalock, iflag);
2954 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS
2955 spin_unlock_irqrestore(&phba->hbalock, iflag);
2956 if (mbx_action == LPFC_MBX_NO_WAIT)
2957 return;
2958 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2959 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2960 if (phba->sli.mbox_active) {
6e7288d9 2961 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS
2962 /* Determine how long we might wait for the active mailbox
2963 * command to be gracefully completed by firmware.
2964 */
2965 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2966 phba->sli.mbox_active) * 1000) + jiffies;
2967 }
a6ababd2 2968 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2969
6e7288d9
JS
2970 /* Wait for the outstnading mailbox command to complete */
2971 while (phba->sli.mbox_active) {
2972 /* Check active mailbox complete status every 2ms */
2973 msleep(2);
2974 if (time_after(jiffies, timeout)) {
2975 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2976 "2813 Mgmt IO is Blocked %x "
2977 "- mbox cmd %x still active\n",
2978 phba->sli.sli_flag, actcmd);
2979 break;
2980 }
2981 }
a6ababd2
AB
2982}
2983
6b5151fd
JS
2984/**
2985 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2986 * @phba: pointer to lpfc hba data structure.
2987 *
2988 * Allocate RPIs for all active remote nodes. This is needed whenever
2989 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2990 * is to fixup the temporary rpi assignments.
2991 **/
2992void
2993lpfc_sli4_node_prep(struct lpfc_hba *phba)
2994{
2995 struct lpfc_nodelist *ndlp, *next_ndlp;
2996 struct lpfc_vport **vports;
9d3d340d
JS
2997 int i, rpi;
2998 unsigned long flags;
6b5151fd
JS
2999
3000 if (phba->sli_rev != LPFC_SLI_REV4)
3001 return;
3002
3003 vports = lpfc_create_vport_work_array(phba);
9d3d340d
JS
3004 if (vports == NULL)
3005 return;
6b5151fd 3006
9d3d340d
JS
3007 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3008 if (vports[i]->load_flag & FC_UNLOADING)
3009 continue;
3010
3011 list_for_each_entry_safe(ndlp, next_ndlp,
3012 &vports[i]->fc_nodes,
3013 nlp_listp) {
3014 if (!NLP_CHK_NODE_ACT(ndlp))
3015 continue;
3016 rpi = lpfc_sli4_alloc_rpi(phba);
3017 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3018 spin_lock_irqsave(&phba->ndlp_lock, flags);
3019 NLP_CLR_NODE_ACT(ndlp);
3020 spin_unlock_irqrestore(&phba->ndlp_lock, flags);
3021 continue;
6b5151fd 3022 }
9d3d340d
JS
3023 ndlp->nlp_rpi = rpi;
3024 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
3025 "0009 rpi:%x DID:%x "
3026 "flg:%x map:%x %p\n", ndlp->nlp_rpi,
3027 ndlp->nlp_DID, ndlp->nlp_flag,
3028 ndlp->nlp_usg_map, ndlp);
6b5151fd
JS
3029 }
3030 }
3031 lpfc_destroy_vport_work_array(phba, vports);
3032}
3033
e59058c4 3034/**
3621a710 3035 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS
3036 * @phba: pointer to lpfc hba data structure.
3037 *
3038 * This routine initializes the HBA and brings a HBA online. During this
3039 * process, the management interface is blocked to prevent user space access
3040 * to the HBA interfering with the driver initialization.
3041 *
3042 * Return codes
3043 * 0 - successful
3044 * 1 - failed
3045 **/
dea3101e 3046int
2e0fef85 3047lpfc_online(struct lpfc_hba *phba)
dea3101e 3048{
372bd282 3049 struct lpfc_vport *vport;
549e55cd 3050 struct lpfc_vport **vports;
a145fda3 3051 int i, error = 0;
16a3a208 3052 bool vpis_cleared = false;
2e0fef85 3053
dea3101e
JB
3054 if (!phba)
3055 return 0;
372bd282 3056 vport = phba->pport;
dea3101e 3057
2e0fef85 3058 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e
JB
3059 return 0;
3060
ed957684 3061 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3062 "0458 Bring Adapter online\n");
dea3101e 3063
618a5230 3064 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 3065
da0436e9
JS
3066 if (phba->sli_rev == LPFC_SLI_REV4) {
3067 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3068 lpfc_unblock_mgmt_io(phba);
3069 return 1;
3070 }
16a3a208
JS
3071 spin_lock_irq(&phba->hbalock);
3072 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3073 vpis_cleared = true;
3074 spin_unlock_irq(&phba->hbalock);
a145fda3
DK
3075
3076 /* Reestablish the local initiator port.
3077 * The offline process destroyed the previous lport.
3078 */
3079 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3080 !phba->nvmet_support) {
3081 error = lpfc_nvme_create_localport(phba->pport);
3082 if (error)
3083 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3084 "6132 NVME restore reg failed "
3085 "on nvmei error x%x\n", error);
3086 }
da0436e9 3087 } else {
895427bd 3088 lpfc_sli_queue_init(phba);
da0436e9
JS
3089 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3090 lpfc_unblock_mgmt_io(phba);
3091 return 1;
3092 }
46fa311e 3093 }
dea3101e 3094
549e55cd 3095 vports = lpfc_create_vport_work_array(phba);
aeb6641f 3096 if (vports != NULL) {
da0436e9 3097 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS
3098 struct Scsi_Host *shost;
3099 shost = lpfc_shost_from_vport(vports[i]);
3100 spin_lock_irq(shost->host_lock);
3101 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
3102 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3103 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 3104 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 3105 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS
3106 if ((vpis_cleared) &&
3107 (vports[i]->port_type !=
3108 LPFC_PHYSICAL_PORT))
3109 vports[i]->vpi = 0;
3110 }
549e55cd
JS
3111 spin_unlock_irq(shost->host_lock);
3112 }
aeb6641f
AB
3113 }
3114 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3115
46fa311e 3116 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
3117 return 0;
3118}
3119
e59058c4 3120/**
3621a710 3121 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS
3122 * @phba: pointer to lpfc hba data structure.
3123 *
3124 * This routine marks a HBA's management interface as not blocked. Once the
3125 * HBA's management interface is marked as not blocked, all the user space
3126 * access to the HBA, whether they are from sysfs interface or libdfc
3127 * interface will be allowed. The HBA is set to block the management interface
3128 * when the driver prepares the HBA interface for online or offline and then
3129 * set to unblock the management interface afterwards.
3130 **/
46fa311e
JS
3131void
3132lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3133{
3134 unsigned long iflag;
3135
2e0fef85
JS
3136 spin_lock_irqsave(&phba->hbalock, iflag);
3137 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3138 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS
3139}
3140
e59058c4 3141/**
3621a710 3142 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS
3143 * @phba: pointer to lpfc hba data structure.
3144 *
3145 * This routine is invoked to prepare a HBA to be brought offline. It performs
3146 * unregistration login to all the nodes on all vports and flushes the mailbox
3147 * queue to make it ready to be brought offline.
3148 **/
46fa311e 3149void
618a5230 3150lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3151{
2e0fef85 3152 struct lpfc_vport *vport = phba->pport;
46fa311e 3153 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3154 struct lpfc_vport **vports;
72100cc4 3155 struct Scsi_Host *shost;
87af33fe 3156 int i;
dea3101e 3157
2e0fef85 3158 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3159 return;
dea3101e 3160
618a5230 3161 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e
JB
3162
3163 lpfc_linkdown(phba);
3164
87af33fe
JS
3165 /* Issue an unreg_login to all nodes on all vports */
3166 vports = lpfc_create_vport_work_array(phba);
3167 if (vports != NULL) {
da0436e9 3168 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS
3169 if (vports[i]->load_flag & FC_UNLOADING)
3170 continue;
72100cc4
JS
3171 shost = lpfc_shost_from_vport(vports[i]);
3172 spin_lock_irq(shost->host_lock);
c868595d 3173 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS
3174 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3175 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3176 spin_unlock_irq(shost->host_lock);
695a814e 3177
87af33fe
JS
3178 shost = lpfc_shost_from_vport(vports[i]);
3179 list_for_each_entry_safe(ndlp, next_ndlp,
3180 &vports[i]->fc_nodes,
3181 nlp_listp) {
e47c9093
JS
3182 if (!NLP_CHK_NODE_ACT(ndlp))
3183 continue;
87af33fe
JS
3184 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3185 continue;
3186 if (ndlp->nlp_type & NLP_FABRIC) {
3187 lpfc_disc_state_machine(vports[i], ndlp,
3188 NULL, NLP_EVT_DEVICE_RECOVERY);
3189 lpfc_disc_state_machine(vports[i], ndlp,
3190 NULL, NLP_EVT_DEVICE_RM);
3191 }
3192 spin_lock_irq(shost->host_lock);
3193 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3194 spin_unlock_irq(shost->host_lock);
6b5151fd
JS
3195 /*
3196 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS
3197 * RPI. Get a new RPI when the adapter port
3198 * comes back online.
6b5151fd 3199 */
be6bb941
JS
3200 if (phba->sli_rev == LPFC_SLI_REV4) {
3201 lpfc_printf_vlog(ndlp->vport,
3202 KERN_INFO, LOG_NODE,
3203 "0011 lpfc_offline: "
3204 "ndlp:x%p did %x "
3205 "usgmap:x%x rpi:%x\n",
3206 ndlp, ndlp->nlp_DID,
3207 ndlp->nlp_usg_map,
3208 ndlp->nlp_rpi);
3209
6b5151fd 3210 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3211 }
87af33fe
JS
3212 lpfc_unreg_rpi(vports[i], ndlp);
3213 }
3214 }
3215 }
09372820 3216 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3217
618a5230 3218 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
f485c18d
DK
3219
3220 if (phba->wq)
3221 flush_workqueue(phba->wq);
46fa311e
JS
3222}
3223
e59058c4 3224/**
3621a710 3225 * lpfc_offline - Bring a HBA offline
e59058c4
JS
3226 * @phba: pointer to lpfc hba data structure.
3227 *
3228 * This routine actually brings a HBA offline. It stops all the timers
3229 * associated with the HBA, brings down the SLI layer, and eventually
3230 * marks the HBA as in offline state for the upper layer protocol.
3231 **/
46fa311e 3232void
2e0fef85 3233lpfc_offline(struct lpfc_hba *phba)
46fa311e 3234{
549e55cd
JS
3235 struct Scsi_Host *shost;
3236 struct lpfc_vport **vports;
3237 int i;
46fa311e 3238
549e55cd 3239 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3240 return;
688a8863 3241
da0436e9
JS
3242 /* stop port and all timers associated with this hba */
3243 lpfc_stop_port(phba);
4b40d02b
DK
3244
3245 /* Tear down the local and target port registrations. The
3246 * nvme transports need to cleanup.
3247 */
3248 lpfc_nvmet_destroy_targetport(phba);
3249 lpfc_nvme_destroy_localport(phba->pport);
3250
51ef4c26
JS
3251 vports = lpfc_create_vport_work_array(phba);
3252 if (vports != NULL)
da0436e9 3253 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3254 lpfc_stop_vport_timers(vports[i]);
09372820 3255 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3256 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3257 "0460 Bring Adapter offline\n");
dea3101e
JB
3258 /* Bring down the SLI Layer and cleanup. The HBA is offline
3259 now. */
3260 lpfc_sli_hba_down(phba);
92d7f7b0 3261 spin_lock_irq(&phba->hbalock);
7054a606 3262 phba->work_ha = 0;
92d7f7b0 3263 spin_unlock_irq(&phba->hbalock);
549e55cd
JS
3264 vports = lpfc_create_vport_work_array(phba);
3265 if (vports != NULL)
da0436e9 3266 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3267 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS
3268 spin_lock_irq(shost->host_lock);
3269 vports[i]->work_port_events = 0;
3270 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3271 spin_unlock_irq(shost->host_lock);
3272 }
09372820 3273 lpfc_destroy_vport_work_array(phba, vports);
dea3101e
JB
3274}
3275
e59058c4 3276/**
3621a710 3277 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS
3278 * @phba: pointer to lpfc hba data structure.
3279 *
3280 * This routine is to free all the SCSI buffers and IOCBs from the driver
3281 * list back to kernel. It is called from lpfc_pci_remove_one to free
3282 * the internal resources before the device is removed from the system.
e59058c4 3283 **/
8a9d2e80 3284static void
2e0fef85 3285lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e
JB
3286{
3287 struct lpfc_scsi_buf *sb, *sb_next;
dea3101e 3288
895427bd
JS
3289 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3290 return;
3291
2e0fef85 3292 spin_lock_irq(&phba->hbalock);
a40fc5f0 3293
dea3101e 3294 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS
3295
3296 spin_lock(&phba->scsi_buf_list_put_lock);
3297 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3298 list) {
dea3101e 3299 list_del(&sb->list);
771db5c0 3300 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3301 sb->dma_handle);
dea3101e
JB
3302 kfree(sb);
3303 phba->total_scsi_bufs--;
3304 }
a40fc5f0
JS
3305 spin_unlock(&phba->scsi_buf_list_put_lock);
3306
3307 spin_lock(&phba->scsi_buf_list_get_lock);
3308 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3309 list) {
dea3101e 3310 list_del(&sb->list);
771db5c0 3311 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3312 sb->dma_handle);
dea3101e
JB
3313 kfree(sb);
3314 phba->total_scsi_bufs--;
3315 }
a40fc5f0 3316 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3317 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3318}
895427bd
JS
3319/**
3320 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3321 * @phba: pointer to lpfc hba data structure.
3322 *
3323 * This routine is to free all the NVME buffers and IOCBs from the driver
3324 * list back to kernel. It is called from lpfc_pci_remove_one to free
3325 * the internal resources before the device is removed from the system.
3326 **/
3327static void
3328lpfc_nvme_free(struct lpfc_hba *phba)
3329{
3330 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
895427bd
JS
3331
3332 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3333 return;
3334
3335 spin_lock_irq(&phba->hbalock);
3336
3337 /* Release all the lpfc_nvme_bufs maintained by this host. */
3338 spin_lock(&phba->nvme_buf_list_put_lock);
3339 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3340 &phba->lpfc_nvme_buf_list_put, list) {
3341 list_del(&lpfc_ncmd->list);
771db5c0 3342 dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
895427bd
JS
3343 lpfc_ncmd->dma_handle);
3344 kfree(lpfc_ncmd);
3345 phba->total_nvme_bufs--;
3346 }
3347 spin_unlock(&phba->nvme_buf_list_put_lock);
3348
3349 spin_lock(&phba->nvme_buf_list_get_lock);
3350 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3351 &phba->lpfc_nvme_buf_list_get, list) {
3352 list_del(&lpfc_ncmd->list);
771db5c0 3353 dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
895427bd
JS
3354 lpfc_ncmd->dma_handle);
3355 kfree(lpfc_ncmd);
3356 phba->total_nvme_bufs--;
3357 }
3358 spin_unlock(&phba->nvme_buf_list_get_lock);
895427bd
JS
3359 spin_unlock_irq(&phba->hbalock);
3360}
8a9d2e80 3361/**
895427bd 3362 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS
3363 * @phba: pointer to lpfc hba data structure.
3364 *
3365 * This routine first calculates the sizes of the current els and allocated
3366 * scsi sgl lists, and then goes through all sgls to updates the physical
3367 * XRIs assigned due to port function reset. During port initialization, the
3368 * current els and allocated scsi sgl lists are 0s.
3369 *
3370 * Return codes
3371 * 0 - successful (for now, it always returns 0)
3372 **/
3373int
895427bd 3374lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS
3375{
3376 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3377 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3378 LIST_HEAD(els_sgl_list);
8a9d2e80
JS
3379 int rc;
3380
3381 /*
3382 * update on pci function's els xri-sgl list
3383 */
3384 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3385
8a9d2e80
JS
3386 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3387 /* els xri-sgl expanded */
3388 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3389 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3390 "3157 ELS xri-sgl count increased from "
3391 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3392 els_xri_cnt);
3393 /* allocate the additional els sgls */
3394 for (i = 0; i < xri_cnt; i++) {
3395 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3396 GFP_KERNEL);
3397 if (sglq_entry == NULL) {
3398 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3399 "2562 Failure to allocate an "
3400 "ELS sgl entry:%d\n", i);
3401 rc = -ENOMEM;
3402 goto out_free_mem;
3403 }
3404 sglq_entry->buff_type = GEN_BUFF_TYPE;
3405 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3406 &sglq_entry->phys);
3407 if (sglq_entry->virt == NULL) {
3408 kfree(sglq_entry);
3409 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3410 "2563 Failure to allocate an "
3411 "ELS mbuf:%d\n", i);
3412 rc = -ENOMEM;
3413 goto out_free_mem;
3414 }
3415 sglq_entry->sgl = sglq_entry->virt;
3416 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3417 sglq_entry->state = SGL_FREED;
3418 list_add_tail(&sglq_entry->list, &els_sgl_list);
3419 }
38c20673 3420 spin_lock_irq(&phba->hbalock);
895427bd
JS
3421 spin_lock(&phba->sli4_hba.sgl_list_lock);
3422 list_splice_init(&els_sgl_list,
3423 &phba->sli4_hba.lpfc_els_sgl_list);
3424 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3425 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
3426 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3427 /* els xri-sgl shrinked */
3428 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3429 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3430 "3158 ELS xri-sgl count decreased from "
3431 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3432 els_xri_cnt);
3433 spin_lock_irq(&phba->hbalock);
895427bd
JS
3434 spin_lock(&phba->sli4_hba.sgl_list_lock);
3435 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3436 &els_sgl_list);
8a9d2e80
JS
3437 /* release extra els sgls from list */
3438 for (i = 0; i < xri_cnt; i++) {
3439 list_remove_head(&els_sgl_list,
3440 sglq_entry, struct lpfc_sglq, list);
3441 if (sglq_entry) {
895427bd
JS
3442 __lpfc_mbuf_free(phba, sglq_entry->virt,
3443 sglq_entry->phys);
8a9d2e80
JS
3444 kfree(sglq_entry);
3445 }
3446 }
895427bd
JS
3447 list_splice_init(&els_sgl_list,
3448 &phba->sli4_hba.lpfc_els_sgl_list);
3449 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS
3450 spin_unlock_irq(&phba->hbalock);
3451 } else
3452 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3453 "3163 ELS xri-sgl count unchanged: %d\n",
3454 els_xri_cnt);
3455 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3456
3457 /* update xris to els sgls on the list */
3458 sglq_entry = NULL;
3459 sglq_entry_next = NULL;
3460 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3461 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS
3462 lxri = lpfc_sli4_next_xritag(phba);
3463 if (lxri == NO_XRI) {
3464 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3465 "2400 Failed to allocate xri for "
3466 "ELS sgl\n");
3467 rc = -ENOMEM;
3468 goto out_free_mem;
3469 }
3470 sglq_entry->sli4_lxritag = lxri;
3471 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3472 }
895427bd
JS
3473 return 0;
3474
3475out_free_mem:
3476 lpfc_free_els_sgl_list(phba);
3477 return rc;
3478}
3479
f358dd0c
JS
3480/**
3481 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3482 * @phba: pointer to lpfc hba data structure.
3483 *
3484 * This routine first calculates the sizes of the current els and allocated
3485 * scsi sgl lists, and then goes through all sgls to updates the physical
3486 * XRIs assigned due to port function reset. During port initialization, the
3487 * current els and allocated scsi sgl lists are 0s.
3488 *
3489 * Return codes
3490 * 0 - successful (for now, it always returns 0)
3491 **/
3492int
3493lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3494{
3495 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3496 uint16_t i, lxri, xri_cnt, els_xri_cnt;
6c621a22 3497 uint16_t nvmet_xri_cnt;
f358dd0c
JS
3498 LIST_HEAD(nvmet_sgl_list);
3499 int rc;
3500
3501 /*
3502 * update on pci function's nvmet xri-sgl list
3503 */
3504 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
61f3d4bf 3505
6c621a22
JS
3506 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
3507 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
f358dd0c
JS
3508 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3509 /* els xri-sgl expanded */
3510 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3511 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3512 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3513 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3514 /* allocate the additional nvmet sgls */
3515 for (i = 0; i < xri_cnt; i++) {
3516 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3517 GFP_KERNEL);
3518 if (sglq_entry == NULL) {
3519 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3520 "6303 Failure to allocate an "
3521 "NVMET sgl entry:%d\n", i);
3522 rc = -ENOMEM;
3523 goto out_free_mem;
3524 }
3525 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3526 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3527 &sglq_entry->phys);
3528 if (sglq_entry->virt == NULL) {
3529 kfree(sglq_entry);
3530 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3531 "6304 Failure to allocate an "
3532 "NVMET buf:%d\n", i);
3533 rc = -ENOMEM;
3534 goto out_free_mem;
3535 }
3536 sglq_entry->sgl = sglq_entry->virt;
3537 memset(sglq_entry->sgl, 0,
3538 phba->cfg_sg_dma_buf_size);
3539 sglq_entry->state = SGL_FREED;
3540 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3541 }
3542 spin_lock_irq(&phba->hbalock);
3543 spin_lock(&phba->sli4_hba.sgl_list_lock);
3544 list_splice_init(&nvmet_sgl_list,
3545 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3546 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3547 spin_unlock_irq(&phba->hbalock);
3548 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3549 /* nvmet xri-sgl shrunk */
3550 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3551 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3552 "6305 NVMET xri-sgl count decreased from "
3553 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3554 nvmet_xri_cnt);
3555 spin_lock_irq(&phba->hbalock);
3556 spin_lock(&phba->sli4_hba.sgl_list_lock);
3557 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3558 &nvmet_sgl_list);
3559 /* release extra nvmet sgls from list */
3560 for (i = 0; i < xri_cnt; i++) {
3561 list_remove_head(&nvmet_sgl_list,
3562 sglq_entry, struct lpfc_sglq, list);
3563 if (sglq_entry) {
3564 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3565 sglq_entry->phys);
3566 kfree(sglq_entry);
3567 }
3568 }
3569 list_splice_init(&nvmet_sgl_list,
3570 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3571 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3572 spin_unlock_irq(&phba->hbalock);
3573 } else
3574 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3575 "6306 NVMET xri-sgl count unchanged: %d\n",
3576 nvmet_xri_cnt);
3577 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3578
3579 /* update xris to nvmet sgls on the list */
3580 sglq_entry = NULL;
3581 sglq_entry_next = NULL;
3582 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3583 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3584 lxri = lpfc_sli4_next_xritag(phba);
3585 if (lxri == NO_XRI) {
3586 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3587 "6307 Failed to allocate xri for "
3588 "NVMET sgl\n");
3589 rc = -ENOMEM;
3590 goto out_free_mem;
3591 }
3592 sglq_entry->sli4_lxritag = lxri;
3593 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3594 }
3595 return 0;
3596
3597out_free_mem:
3598 lpfc_free_nvmet_sgl_list(phba);
3599 return rc;
3600}
3601
895427bd
JS
3602/**
3603 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3604 * @phba: pointer to lpfc hba data structure.
3605 *
3606 * This routine first calculates the sizes of the current els and allocated
3607 * scsi sgl lists, and then goes through all sgls to updates the physical
3608 * XRIs assigned due to port function reset. During port initialization, the
3609 * current els and allocated scsi sgl lists are 0s.
3610 *
3611 * Return codes
3612 * 0 - successful (for now, it always returns 0)
3613 **/
3614int
3615lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3616{
3617 struct lpfc_scsi_buf *psb, *psb_next;
3618 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3619 LIST_HEAD(scsi_sgl_list);
3620 int rc;
8a9d2e80
JS
3621
3622 /*
895427bd 3623 * update on pci function's els xri-sgl list
8a9d2e80 3624 */
895427bd 3625 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS
3626 phba->total_scsi_bufs = 0;
3627
895427bd
JS
3628 /*
3629 * update on pci function's allocated scsi xri-sgl list
3630 */
8a9d2e80
JS
3631 /* maximum number of xris available for scsi buffers */
3632 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3633 els_xri_cnt;
3634
895427bd
JS
3635 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3636 return 0;
3637
3638 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3639 phba->sli4_hba.scsi_xri_max = /* Split them up */
3640 (phba->sli4_hba.scsi_xri_max *
3641 phba->cfg_xri_split) / 100;
8a9d2e80 3642
a40fc5f0 3643 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3644 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3645 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3646 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3647 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3648 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3649
e8c0a779
JS
3650 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3651 "6060 Current allocated SCSI xri-sgl count:%d, "
3652 "maximum SCSI xri count:%d (split:%d)\n",
3653 phba->sli4_hba.scsi_xri_cnt,
3654 phba->sli4_hba.scsi_xri_max, phba->cfg_xri_split);
3655
8a9d2e80
JS
3656 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3657 /* max scsi xri shrinked below the allocated scsi buffers */
3658 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3659 phba->sli4_hba.scsi_xri_max;
3660 /* release the extra allocated scsi buffers */
3661 for (i = 0; i < scsi_xri_cnt; i++) {
3662 list_remove_head(&scsi_sgl_list, psb,
3663 struct lpfc_scsi_buf, list);
a2fc4aef 3664 if (psb) {
771db5c0 3665 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS
3666 psb->data, psb->dma_handle);
3667 kfree(psb);
3668 }
8a9d2e80 3669 }
a40fc5f0 3670 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3671 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3672 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS
3673 }
3674
3675 /* update xris associated to remaining allocated scsi buffers */
3676 psb = NULL;
3677 psb_next = NULL;
3678 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3679 lxri = lpfc_sli4_next_xritag(phba);
3680 if (lxri == NO_XRI) {
3681 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3682 "2560 Failed to allocate xri for "
3683 "scsi buffer\n");
3684 rc = -ENOMEM;
3685 goto out_free_mem;
3686 }
3687 psb->cur_iocbq.sli4_lxritag = lxri;
3688 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3689 }
a40fc5f0 3690 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3691 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3692 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3693 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3694 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3695 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3696 return 0;
8a9d2e80
JS
3697
3698out_free_mem:
8a9d2e80
JS
3699 lpfc_scsi_free(phba);
3700 return rc;
dea3101e
JB
3701}
3702
96418b5e
JS
3703static uint64_t
3704lpfc_get_wwpn(struct lpfc_hba *phba)
3705{
3706 uint64_t wwn;
3707 int rc;
3708 LPFC_MBOXQ_t *mboxq;
3709 MAILBOX_t *mb;
3710
96418b5e
JS
3711 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3712 GFP_KERNEL);
3713 if (!mboxq)
3714 return (uint64_t)-1;
3715
3716 /* First get WWN of HBA instance */
3717 lpfc_read_nv(phba, mboxq);
3718 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3719 if (rc != MBX_SUCCESS) {
3720 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3721 "6019 Mailbox failed , mbxCmd x%x "
3722 "READ_NV, mbxStatus x%x\n",
3723 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
3724 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
3725 mempool_free(mboxq, phba->mbox_mem_pool);
3726 return (uint64_t) -1;
3727 }
3728 mb = &mboxq->u.mb;
3729 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
3730 /* wwn is WWPN of HBA instance */
3731 mempool_free(mboxq, phba->mbox_mem_pool);
3732 if (phba->sli_rev == LPFC_SLI_REV4)
3733 return be64_to_cpu(wwn);
3734 else
286871a6 3735 return rol64(wwn, 32);
96418b5e
JS
3736}
3737
895427bd
JS
3738/**
3739 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3740 * @phba: pointer to lpfc hba data structure.
3741 *
3742 * This routine first calculates the sizes of the current els and allocated
3743 * scsi sgl lists, and then goes through all sgls to updates the physical
3744 * XRIs assigned due to port function reset. During port initialization, the
3745 * current els and allocated scsi sgl lists are 0s.
3746 *
3747 * Return codes
3748 * 0 - successful (for now, it always returns 0)
3749 **/
3750int
3751lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3752{
3753 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3754 uint16_t i, lxri, els_xri_cnt;
3755 uint16_t nvme_xri_cnt, nvme_xri_max;
3756 LIST_HEAD(nvme_sgl_list);
3757 int rc;
3758
3759 phba->total_nvme_bufs = 0;
3760
3761 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3762 return 0;
3763 /*
3764 * update on pci function's allocated nvme xri-sgl list
3765 */
3766
3767 /* maximum number of xris available for nvme buffers */
3768 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3769 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3770 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3771 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3772
3773 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3774 "6074 Current allocated NVME xri-sgl count:%d, "
3775 "maximum NVME xri count:%d\n",
3776 phba->sli4_hba.nvme_xri_cnt,
3777 phba->sli4_hba.nvme_xri_max);
3778
3779 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3780 spin_lock(&phba->nvme_buf_list_put_lock);
3781 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3782 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
3783 spin_unlock(&phba->nvme_buf_list_put_lock);
3784 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3785
3786 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3787 /* max nvme xri shrunk below the allocated nvme buffers */
3788 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3789 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3790 phba->sli4_hba.nvme_xri_max;
3791 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3792 /* release the extra allocated nvme buffers */
3793 for (i = 0; i < nvme_xri_cnt; i++) {
3794 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3795 struct lpfc_nvme_buf, list);
3796 if (lpfc_ncmd) {
771db5c0 3797 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
895427bd
JS
3798 lpfc_ncmd->data,
3799 lpfc_ncmd->dma_handle);
3800 kfree(lpfc_ncmd);
3801 }
3802 }
3803 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3804 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3805 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3806 }
3807
3808 /* update xris associated to remaining allocated nvme buffers */
3809 lpfc_ncmd = NULL;
3810 lpfc_ncmd_next = NULL;
3811 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3812 &nvme_sgl_list, list) {
3813 lxri = lpfc_sli4_next_xritag(phba);
3814 if (lxri == NO_XRI) {
3815 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3816 "6075 Failed to allocate xri for "
3817 "nvme buffer\n");
3818 rc = -ENOMEM;
3819 goto out_free_mem;
3820 }
3821 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3822 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3823 }
3824 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3825 spin_lock(&phba->nvme_buf_list_put_lock);
3826 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
3827 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3828 spin_unlock(&phba->nvme_buf_list_put_lock);
3829 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3830 return 0;
3831
3832out_free_mem:
3833 lpfc_nvme_free(phba);
3834 return rc;
3835}
3836
e59058c4 3837/**
3621a710 3838 * lpfc_create_port - Create an FC port
e59058c4
JS
3839 * @phba: pointer to lpfc hba data structure.
3840 * @instance: a unique integer ID to this FC port.
3841 * @dev: pointer to the device data structure.
3842 *
3843 * This routine creates a FC port for the upper layer protocol. The FC port
3844 * can be created on top of either a physical port or a virtual port provided
3845 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3846 * and associates the FC port created before adding the shost into the SCSI
3847 * layer.
3848 *
3849 * Return codes
3850 * @vport - pointer to the virtual N_Port data structure.
3851 * NULL - port create failed.
3852 **/
2e0fef85 3853struct lpfc_vport *
3de2a653 3854lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3855{
2e0fef85 3856 struct lpfc_vport *vport;
895427bd 3857 struct Scsi_Host *shost = NULL;
2e0fef85 3858 int error = 0;
96418b5e
JS
3859 int i;
3860 uint64_t wwn;
3861 bool use_no_reset_hba = false;
56bc8028 3862 int rc;
96418b5e 3863
56bc8028
JS
3864 if (lpfc_no_hba_reset_cnt) {
3865 if (phba->sli_rev < LPFC_SLI_REV4 &&
3866 dev == &phba->pcidev->dev) {
3867 /* Reset the port first */
3868 lpfc_sli_brdrestart(phba);
3869 rc = lpfc_sli_chipset_init(phba);
3870 if (rc)
3871 return NULL;
3872 }
3873 wwn = lpfc_get_wwpn(phba);
3874 }
96418b5e
JS
3875
3876 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
3877 if (wwn == lpfc_no_hba_reset[i]) {
3878 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3879 "6020 Setting use_no_reset port=%llx\n",
3880 wwn);
3881 use_no_reset_hba = true;
3882 break;
3883 }
3884 }
47a8617c 3885
895427bd
JS
3886 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3887 if (dev != &phba->pcidev->dev) {
3888 shost = scsi_host_alloc(&lpfc_vport_template,
3889 sizeof(struct lpfc_vport));
3890 } else {
96418b5e 3891 if (!use_no_reset_hba)
895427bd
JS
3892 shost = scsi_host_alloc(&lpfc_template,
3893 sizeof(struct lpfc_vport));
3894 else
96418b5e 3895 shost = scsi_host_alloc(&lpfc_template_no_hr,
895427bd
JS
3896 sizeof(struct lpfc_vport));
3897 }
3898 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3899 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS
3900 sizeof(struct lpfc_vport));
3901 }
2e0fef85
JS
3902 if (!shost)
3903 goto out;
47a8617c 3904
2e0fef85
JS
3905 vport = (struct lpfc_vport *) shost->hostdata;
3906 vport->phba = phba;
2e0fef85 3907 vport->load_flag |= FC_LOADING;
92d7f7b0 3908 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3909 vport->fc_rscn_flush = 0;
3de2a653 3910 lpfc_get_vport_cfgparam(vport);
895427bd 3911
2e0fef85
JS
3912 shost->unique_id = instance;
3913 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3914 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS
3915 shost->this_id = -1;
3916 shost->max_cmd_len = 16;
8b0dff14 3917 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3918 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3919 shost->dma_boundary =
cb5172ea 3920 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS
3921 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3922 }
81301a9b 3923
47a8617c 3924 /*
2e0fef85
JS
3925 * Set initial can_queue value since 0 is no longer supported and
3926 * scsi_add_host will fail. This will be adjusted later based on the
3927 * max xri value determined in hba setup.
47a8617c 3928 */
2e0fef85 3929 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3930 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS
3931 shost->transportt = lpfc_vport_transport_template;
3932 vport->port_type = LPFC_NPIV_PORT;
3933 } else {
3934 shost->transportt = lpfc_transport_template;
3935 vport->port_type = LPFC_PHYSICAL_PORT;
3936 }
47a8617c 3937
2e0fef85
JS
3938 /* Initialize all internally managed lists. */
3939 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3940 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3941 spin_lock_init(&vport->work_port_lock);
47a8617c 3942
f22eb4d3 3943 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
47a8617c 3944
f22eb4d3 3945 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
92494144 3946
f22eb4d3 3947 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
92494144 3948
d139b9bd 3949 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS
3950 if (error)
3951 goto out_put_shost;
47a8617c 3952
549e55cd 3953 spin_lock_irq(&phba->hbalock);
2e0fef85 3954 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3955 spin_unlock_irq(&phba->hbalock);
2e0fef85 3956 return vport;
47a8617c 3957
2e0fef85
JS
3958out_put_shost:
3959 scsi_host_put(shost);
3960out:
3961 return NULL;
47a8617c
JS
3962}
3963
e59058c4 3964/**
3621a710 3965 * destroy_port - destroy an FC port
e59058c4
JS
3966 * @vport: pointer to an lpfc virtual N_Port data structure.
3967 *
3968 * This routine destroys a FC port from the upper layer protocol. All the
3969 * resources associated with the port are released.
3970 **/
2e0fef85
JS
3971void
3972destroy_port(struct lpfc_vport *vport)
47a8617c 3973{
92d7f7b0
JS
3974 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3975 struct lpfc_hba *phba = vport->phba;
47a8617c 3976
858c9f6c 3977 lpfc_debugfs_terminate(vport);
92d7f7b0
JS
3978 fc_remove_host(shost);
3979 scsi_remove_host(shost);
47a8617c 3980
92d7f7b0
JS
3981 spin_lock_irq(&phba->hbalock);
3982 list_del_init(&vport->listentry);
3983 spin_unlock_irq(&phba->hbalock);
47a8617c 3984
92d7f7b0 3985 lpfc_cleanup(vport);
47a8617c 3986 return;
47a8617c
JS
3987}
3988
e59058c4 3989/**
3621a710 3990 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS
3991 *
3992 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
3993 * uses the kernel idr facility to perform the task.
3994 *
3995 * Return codes:
3996 * instance - a unique integer ID allocated as the new instance.
3997 * -1 - lpfc get instance failed.
3998 **/
92d7f7b0
JS
3999int
4000lpfc_get_instance(void)
4001{
ab516036
TH
4002 int ret;
4003
4004 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4005 return ret < 0 ? -1 : ret;
47a8617c
JS
4006}
4007
e59058c4 4008/**
3621a710 4009 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS
4010 * @shost: pointer to SCSI host data structure.
4011 * @time: elapsed time of the scan in jiffies.
4012 *
4013 * This routine is called by the SCSI layer with a SCSI host to determine
4014 * whether the scan host is finished.
4015 *
4016 * Note: there is no scan_start function as adapter initialization will have
4017 * asynchronously kicked off the link initialization.
4018 *
4019 * Return codes
4020 * 0 - SCSI host scan is not over yet.
4021 * 1 - SCSI host scan is over.
4022 **/
47a8617c
JS
4023int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4024{
2e0fef85
JS
4025 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4026 struct lpfc_hba *phba = vport->phba;
858c9f6c 4027 int stat = 0;
47a8617c 4028
858c9f6c
JS
4029 spin_lock_irq(shost->host_lock);
4030
51ef4c26 4031 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS
4032 stat = 1;
4033 goto finished;
4034 }
256ec0d0 4035 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 4036 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
4037 "0461 Scanning longer than 30 "
4038 "seconds. Continuing initialization\n");
858c9f6c 4039 stat = 1;
47a8617c 4040 goto finished;
2e0fef85 4041 }
256ec0d0
JS
4042 if (time >= msecs_to_jiffies(15 * 1000) &&
4043 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 4044 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
4045 "0465 Link down longer than 15 "
4046 "seconds. Continuing initialization\n");
858c9f6c 4047 stat = 1;
47a8617c 4048 goto finished;
2e0fef85 4049 }
47a8617c 4050
2e0fef85 4051 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 4052 goto finished;
2e0fef85 4053 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 4054 goto finished;
256ec0d0 4055 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 4056 goto finished;
2e0fef85 4057 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS
4058 goto finished;
4059
4060 stat = 1;
47a8617c
JS
4061
4062finished:
858c9f6c
JS
4063 spin_unlock_irq(shost->host_lock);
4064 return stat;
92d7f7b0 4065}
47a8617c 4066
e59058c4 4067/**
3621a710 4068 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS
4069 * @shost: pointer to SCSI host data structure.
4070 *
4071 * This routine initializes a given SCSI host attributes on a FC port. The
4072 * SCSI host can be either on top of a physical port or a virtual port.
4073 **/
92d7f7b0
JS
4074void lpfc_host_attrib_init(struct Scsi_Host *shost)
4075{
4076 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4077 struct lpfc_hba *phba = vport->phba;
47a8617c 4078 /*
2e0fef85 4079 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS
4080 */
4081
2e0fef85
JS
4082 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
4083 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS
4084 fc_host_supported_classes(shost) = FC_COS_CLASS3;
4085
4086 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 4087 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS
4088 fc_host_supported_fc4s(shost)[2] = 1;
4089 fc_host_supported_fc4s(shost)[7] = 1;
4090
92d7f7b0
JS
4091 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
4092 sizeof fc_host_symbolic_name(shost));
47a8617c
JS
4093
4094 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS
4095 if (phba->lmt & LMT_32Gb)
4096 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS
4097 if (phba->lmt & LMT_16Gb)
4098 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS
4099 if (phba->lmt & LMT_10Gb)
4100 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS
4101 if (phba->lmt & LMT_8Gb)
4102 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS
4103 if (phba->lmt & LMT_4Gb)
4104 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4105 if (phba->lmt & LMT_2Gb)
4106 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4107 if (phba->lmt & LMT_1Gb)
4108 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4109
4110 fc_host_maxframe_size(shost) =
2e0fef85
JS
4111 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
4112 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 4113
0af5d708
MC
4114 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
4115
47a8617c
JS
4116 /* This value is also unchanging */
4117 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 4118 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS
4119 fc_host_active_fc4s(shost)[2] = 1;
4120 fc_host_active_fc4s(shost)[7] = 1;
4121
92d7f7b0 4122 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 4123 spin_lock_irq(shost->host_lock);
51ef4c26 4124 vport->load_flag &= ~FC_LOADING;
47a8617c 4125 spin_unlock_irq(shost->host_lock);
47a8617c 4126}
dea3101e 4127
e59058c4 4128/**
da0436e9 4129 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS
4130 * @phba: pointer to lpfc hba data structure.
4131 *
da0436e9
JS
4132 * This routine is invoked to stop an SLI3 device port, it stops the device
4133 * from generating interrupts and stops the device driver's timers for the
4134 * device.
e59058c4 4135 **/
da0436e9
JS
4136static void
4137lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 4138{
da0436e9
JS
4139 /* Clear all interrupt enable conditions */
4140 writel(0, phba->HCregaddr);
4141 readl(phba->HCregaddr); /* flush */
4142 /* Clear all pending interrupts */
4143 writel(0xffffffff, phba->HAregaddr);
4144 readl(phba->HAregaddr); /* flush */
db2378e0 4145
da0436e9
JS
4146 /* Reset some HBA SLI setup states */
4147 lpfc_stop_hba_timers(phba);
4148 phba->pport->work_port_events = 0;
4149}
db2378e0 4150
da0436e9
JS
4151/**
4152 * lpfc_stop_port_s4 - Stop SLI4 device port
4153 * @phba: pointer to lpfc hba data structure.
4154 *
4155 * This routine is invoked to stop an SLI4 device port, it stops the device
4156 * from generating interrupts and stops the device driver's timers for the
4157 * device.
4158 **/
4159static void
4160lpfc_stop_port_s4(struct lpfc_hba *phba)
4161{
4162 /* Reset some HBA SLI4 setup states */
4163 lpfc_stop_hba_timers(phba);
4164 phba->pport->work_port_events = 0;
4165 phba->sli4_hba.intr_enable = 0;
da0436e9 4166}
9399627f 4167
da0436e9
JS
4168/**
4169 * lpfc_stop_port - Wrapper function for stopping hba port
4170 * @phba: Pointer to HBA context object.
4171 *
4172 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4173 * the API jump table function pointer from the lpfc_hba struct.
4174 **/
4175void
4176lpfc_stop_port(struct lpfc_hba *phba)
4177{
4178 phba->lpfc_stop_port(phba);
f485c18d
DK
4179
4180 if (phba->wq)
4181 flush_workqueue(phba->wq);
da0436e9 4182}
db2378e0 4183
ecfd03c6
JS
4184/**
4185 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4186 * @phba: Pointer to hba for which this call is being executed.
4187 *
4188 * This routine starts the timer waiting for the FCF rediscovery to complete.
4189 **/
4190void
4191lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4192{
4193 unsigned long fcf_redisc_wait_tmo =
4194 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4195 /* Start fcf rediscovery wait period timer */
4196 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4197 spin_lock_irq(&phba->hbalock);
4198 /* Allow action to new fcf asynchronous event */
4199 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4200 /* Mark the FCF rediscovery pending state */
4201 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4202 spin_unlock_irq(&phba->hbalock);
4203}
4204
4205/**
4206 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4207 * @ptr: Map to lpfc_hba data structure pointer.
4208 *
4209 * This routine is invoked when waiting for FCF table rediscover has been
4210 * timed out. If new FCF record(s) has (have) been discovered during the
4211 * wait period, a new FCF event shall be added to the FCOE async event
4212 * list, and then worker thread shall be waked up for processing from the
4213 * worker thread context.
4214 **/
e399b228 4215static void
f22eb4d3 4216lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
ecfd03c6 4217{
f22eb4d3 4218 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait);
ecfd03c6
JS
4219
4220 /* Don't send FCF rediscovery event if timer cancelled */
4221 spin_lock_irq(&phba->hbalock);
4222 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4223 spin_unlock_irq(&phba->hbalock);
4224 return;
4225 }
4226 /* Clear FCF rediscovery timer pending flag */
4227 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4228 /* FCF rediscovery event to worker thread */
4229 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4230 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4231 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4232 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS
4233 /* wake up worker thread */
4234 lpfc_worker_wake_up(phba);
4235}
4236
e59058c4 4237/**
da0436e9 4238 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4239 * @phba: pointer to lpfc hba data structure.
da0436e9 4240 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4241 *
da0436e9
JS
4242 * This routine is to parse the SLI4 link-attention link fault code and
4243 * translate it into the base driver's read link attention mailbox command
4244 * status.
4245 *
4246 * Return: Link-attention status in terms of base driver's coding.
e59058c4 4247 **/
da0436e9
JS
4248static uint16_t
4249lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4250 struct lpfc_acqe_link *acqe_link)
db2378e0 4251{
da0436e9 4252 uint16_t latt_fault;
9399627f 4253
da0436e9
JS
4254 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4255 case LPFC_ASYNC_LINK_FAULT_NONE:
4256 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4257 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4258 latt_fault = 0;
4259 break;
4260 default:
4261 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4262 "0398 Invalid link fault code: x%x\n",
4263 bf_get(lpfc_acqe_link_fault, acqe_link));
4264 latt_fault = MBXERR_ERROR;
4265 break;
4266 }
4267 return latt_fault;
db2378e0
JS
4268}
4269
5b75da2f 4270/**
da0436e9 4271 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4272 * @phba: pointer to lpfc hba data structure.
da0436e9 4273 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4274 *
da0436e9
JS
4275 * This routine is to parse the SLI4 link attention type and translate it
4276 * into the base driver's link attention type coding.
5b75da2f 4277 *
da0436e9
JS
4278 * Return: Link attention type in terms of base driver's coding.
4279 **/
4280static uint8_t
4281lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4282 struct lpfc_acqe_link *acqe_link)
5b75da2f 4283{
da0436e9 4284 uint8_t att_type;
5b75da2f 4285
da0436e9
JS
4286 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4287 case LPFC_ASYNC_LINK_STATUS_DOWN:
4288 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4289 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS
4290 break;
4291 case LPFC_ASYNC_LINK_STATUS_UP:
4292 /* Ignore physical link up events - wait for logical link up */
76a95d75 4293 att_type = LPFC_ATT_RESERVED;
da0436e9
JS
4294 break;
4295 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4296 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS
4297 break;
4298 default:
4299 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4300 "0399 Invalid link attention type: x%x\n",
4301 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4302 att_type = LPFC_ATT_RESERVED;
da0436e9 4303 break;
5b75da2f 4304 }
da0436e9 4305 return att_type;
5b75da2f
JS
4306}
4307
8b68cd52
JS
4308/**
4309 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4310 * @phba: pointer to lpfc hba data structure.
4311 *
4312 * This routine is to get an SLI3 FC port's link speed in Mbps.
4313 *
4314 * Return: link speed in terms of Mbps.
4315 **/
4316uint32_t
4317lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4318{
4319 uint32_t link_speed;
4320
4321 if (!lpfc_is_link_up(phba))
4322 return 0;
4323
a085e87c
JS
4324 if (phba->sli_rev <= LPFC_SLI_REV3) {
4325 switch (phba->fc_linkspeed) {
4326 case LPFC_LINK_SPEED_1GHZ:
4327 link_speed = 1000;
4328 break;
4329 case LPFC_LINK_SPEED_2GHZ:
4330 link_speed = 2000;
4331 break;
4332 case LPFC_LINK_SPEED_4GHZ:
4333 link_speed = 4000;
4334 break;
4335 case LPFC_LINK_SPEED_8GHZ:
4336 link_speed = 8000;
4337 break;
4338 case LPFC_LINK_SPEED_10GHZ:
4339 link_speed = 10000;
4340 break;
4341 case LPFC_LINK_SPEED_16GHZ:
4342 link_speed = 16000;
4343 break;
4344 default:
4345 link_speed = 0;
4346 }
4347 } else {
4348 if (phba->sli4_hba.link_state.logical_speed)
4349 link_speed =
4350 phba->sli4_hba.link_state.logical_speed;
4351 else
4352 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS
4353 }
4354 return link_speed;
4355}
4356
4357/**
4358 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4359 * @phba: pointer to lpfc hba data structure.
4360 * @evt_code: asynchronous event code.
4361 * @speed_code: asynchronous event link speed code.
4362 *
4363 * This routine is to parse the giving SLI4 async event link speed code into
4364 * value of Mbps for the link speed.
4365 *
4366 * Return: link speed in terms of Mbps.
4367 **/
4368static uint32_t
4369lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4370 uint8_t speed_code)
4371{
4372 uint32_t port_speed;
4373
4374 switch (evt_code) {
4375 case LPFC_TRAILER_CODE_LINK:
4376 switch (speed_code) {
26d830ec 4377 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS
4378 port_speed = 0;
4379 break;
26d830ec 4380 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS
4381 port_speed = 10;
4382 break;
26d830ec 4383 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS
4384 port_speed = 100;
4385 break;
26d830ec 4386 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS
4387 port_speed = 1000;
4388 break;
26d830ec 4389 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS
4390 port_speed = 10000;
4391 break;
26d830ec
JS
4392 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4393 port_speed = 20000;
4394 break;
4395 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4396 port_speed = 25000;
4397 break;
4398 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4399 port_speed = 40000;
4400 break;
8b68cd52
JS
4401 default:
4402 port_speed = 0;
4403 }
4404 break;
4405 case LPFC_TRAILER_CODE_FC:
4406 switch (speed_code) {
26d830ec 4407 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS
4408 port_speed = 0;
4409 break;
26d830ec 4410 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS
4411 port_speed = 1000;
4412 break;
26d830ec 4413 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS
4414 port_speed = 2000;
4415 break;
26d830ec 4416 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS
4417 port_speed = 4000;
4418 break;
26d830ec 4419 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS
4420 port_speed = 8000;
4421 break;
26d830ec 4422 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS
4423 port_speed = 10000;
4424 break;
26d830ec 4425 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS
4426 port_speed = 16000;
4427 break;
d38dd52c
JS
4428 case LPFC_FC_LA_SPEED_32G:
4429 port_speed = 32000;
4430 break;
8b68cd52
JS
4431 default:
4432 port_speed = 0;
4433 }
4434 break;
4435 default:
4436 port_speed = 0;
4437 }
4438 return port_speed;
4439}
4440
da0436e9 4441/**
70f3c073 4442 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS
4443 * @phba: pointer to lpfc hba data structure.
4444 * @acqe_link: pointer to the async link completion queue entry.
4445 *
70f3c073 4446 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS
4447 **/
4448static void
4449lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4450 struct lpfc_acqe_link *acqe_link)
4451{
4452 struct lpfc_dmabuf *mp;
4453 LPFC_MBOXQ_t *pmb;
4454 MAILBOX_t *mb;
76a95d75 4455 struct lpfc_mbx_read_top *la;
da0436e9 4456 uint8_t att_type;
76a95d75 4457 int rc;
da0436e9
JS
4458
4459 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4460 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4461 return;
32b9793f 4462 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS
4463 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4464 if (!pmb) {
4465 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4466 "0395 The mboxq allocation failed\n");
4467 return;
4468 }
4469 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4470 if (!mp) {
4471 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4472 "0396 The lpfc_dmabuf allocation failed\n");
4473 goto out_free_pmb;
4474 }
4475 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4476 if (!mp->virt) {
4477 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4478 "0397 The mbuf allocation failed\n");
4479 goto out_free_dmabuf;
4480 }
4481
4482 /* Cleanup any outstanding ELS commands */
4483 lpfc_els_flush_all_cmd(phba);
4484
4485 /* Block ELS IOCBs until we have done process link event */
895427bd 4486 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS
4487
4488 /* Update link event statistics */
4489 phba->sli.slistat.link_event++;
4490
76a95d75
JS
4491 /* Create lpfc_handle_latt mailbox command from link ACQE */
4492 lpfc_read_topology(phba, pmb, mp);
4493 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS
4494 pmb->vport = phba->pport;
4495
da0436e9
JS
4496 /* Keep the link status for extra SLI4 state machine reference */
4497 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4498 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4499 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS
4500 phba->sli4_hba.link_state.duplex =
4501 bf_get(lpfc_acqe_link_duplex, acqe_link);
4502 phba->sli4_hba.link_state.status =
4503 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS
4504 phba->sli4_hba.link_state.type =
4505 bf_get(lpfc_acqe_link_type, acqe_link);
4506 phba->sli4_hba.link_state.number =
4507 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS
4508 phba->sli4_hba.link_state.fault =
4509 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4510 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS
4511 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4512
70f3c073 4513 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS
4514 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4515 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4516 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS
4517 phba->sli4_hba.link_state.speed,
4518 phba->sli4_hba.link_state.topology,
4519 phba->sli4_hba.link_state.status,
4520 phba->sli4_hba.link_state.type,
4521 phba->sli4_hba.link_state.number,
8b68cd52 4522 phba->sli4_hba.link_state.logical_speed,
70f3c073 4523 phba->sli4_hba.link_state.fault);
76a95d75
JS
4524 /*
4525 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4526 * topology info. Note: Optional for non FC-AL ports.
4527 */
4528 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4529 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4530 if (rc == MBX_NOT_FINISHED)
4531 goto out_free_dmabuf;
4532 return;
4533 }
4534 /*
4535 * For FCoE Mode: fill in all the topology information we need and call
4536 * the READ_TOPOLOGY completion routine to continue without actually
4537 * sending the READ_TOPOLOGY mailbox command to the port.
4538 */
4539 /* Parse and translate status field */
4540 mb = &pmb->u.mb;
4541 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4542
4543 /* Parse and translate link attention fields */
4544 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4545 la->eventTag = acqe_link->event_tag;
4546 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4547 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4548 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS
4549
4550 /* Fake the the following irrelvant fields */
4551 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4552 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4553 bf_set(lpfc_mbx_read_top_il, la, 0);
4554 bf_set(lpfc_mbx_read_top_pb, la, 0);
4555 bf_set(lpfc_mbx_read_top_fa, la, 0);
4556 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS
4557
4558 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4559 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4560
5b75da2f 4561 return;
da0436e9
JS
4562
4563out_free_dmabuf:
4564 kfree(mp);
4565out_free_pmb:
4566 mempool_free(pmb, phba->mbox_mem_pool);
4567}
4568
70f3c073
JS
4569/**
4570 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4571 * @phba: pointer to lpfc hba data structure.
4572 * @acqe_fc: pointer to the async fc completion queue entry.
4573 *
4574 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4575 * that the event was received and then issue a read_topology mailbox command so
4576 * that the rest of the driver will treat it the same as SLI3.
4577 **/
4578static void
4579lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4580{
4581 struct lpfc_dmabuf *mp;
4582 LPFC_MBOXQ_t *pmb;
7bdedb34
JS
4583 MAILBOX_t *mb;
4584 struct lpfc_mbx_read_top *la;
70f3c073
JS
4585 int rc;
4586
4587 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4588 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4589 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4590 "2895 Non FC link Event detected.(%d)\n",
4591 bf_get(lpfc_trailer_type, acqe_fc));
4592 return;
4593 }
4594 /* Keep the link status for extra SLI4 state machine reference */
4595 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4596 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4597 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS
4598 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4599 phba->sli4_hba.link_state.topology =
4600 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4601 phba->sli4_hba.link_state.status =
4602 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4603 phba->sli4_hba.link_state.type =
4604 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4605 phba->sli4_hba.link_state.number =
4606 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4607 phba->sli4_hba.link_state.fault =
4608 bf_get(lpfc_acqe_link_fault, acqe_fc);
4609 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4610 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS
4611 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4612 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4613 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4614 "%dMbps Fault:%d\n",
4615 phba->sli4_hba.link_state.speed,
4616 phba->sli4_hba.link_state.topology,
4617 phba->sli4_hba.link_state.status,
4618 phba->sli4_hba.link_state.type,
4619 phba->sli4_hba.link_state.number,
8b68cd52 4620 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS
4621 phba->sli4_hba.link_state.fault);
4622 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4623 if (!pmb) {
4624 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4625 "2897 The mboxq allocation failed\n");
4626 return;
4627 }
4628 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4629 if (!mp) {
4630 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4631 "2898 The lpfc_dmabuf allocation failed\n");
4632 goto out_free_pmb;
4633 }
4634 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4635 if (!mp->virt) {
4636 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4637 "2899 The mbuf allocation failed\n");
4638 goto out_free_dmabuf;
4639 }
4640
4641 /* Cleanup any outstanding ELS commands */
4642 lpfc_els_flush_all_cmd(phba);
4643
4644 /* Block ELS IOCBs until we have done process link event */
895427bd 4645 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS
4646
4647 /* Update link event statistics */
4648 phba->sli.slistat.link_event++;
4649
4650 /* Create lpfc_handle_latt mailbox command from link ACQE */
4651 lpfc_read_topology(phba, pmb, mp);
4652 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4653 pmb->vport = phba->pport;
4654
7bdedb34 4655 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
ae9e28f3
JS
4656 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
4657
4658 switch (phba->sli4_hba.link_state.status) {
4659 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
4660 phba->link_flag |= LS_MDS_LINK_DOWN;
4661 break;
4662 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
4663 phba->link_flag |= LS_MDS_LOOPBACK;
4664 break;
4665 default:
4666 break;
4667 }
4668
7bdedb34
JS
4669 /* Parse and translate status field */
4670 mb = &pmb->u.mb;
4671 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4672 (void *)acqe_fc);
4673
4674 /* Parse and translate link attention fields */
4675 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4676 la->eventTag = acqe_fc->event_tag;
7bdedb34 4677
aeb3c817
JS
4678 if (phba->sli4_hba.link_state.status ==
4679 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
4680 bf_set(lpfc_mbx_read_top_att_type, la,
4681 LPFC_FC_LA_TYPE_UNEXP_WWPN);
4682 } else {
4683 bf_set(lpfc_mbx_read_top_att_type, la,
4684 LPFC_FC_LA_TYPE_LINK_DOWN);
4685 }
7bdedb34
JS
4686 /* Invoke the mailbox command callback function */
4687 lpfc_mbx_cmpl_read_topology(phba, pmb);
4688
4689 return;
4690 }
4691
70f3c073
JS
4692 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4693 if (rc == MBX_NOT_FINISHED)
4694 goto out_free_dmabuf;
4695 return;
4696
4697out_free_dmabuf:
4698 kfree(mp);
4699out_free_pmb:
4700 mempool_free(pmb, phba->mbox_mem_pool);
4701}
4702
4703/**
4704 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4705 * @phba: pointer to lpfc hba data structure.
4706 * @acqe_fc: pointer to the async SLI completion queue entry.
4707 *
4708 * This routine is to handle the SLI4 asynchronous SLI events.
4709 **/
4710static void
4711lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4712{
4b8bae08 4713 char port_name;
8c1312e1 4714 char message[128];
4b8bae08 4715 uint8_t status;
946727dc 4716 uint8_t evt_type;
448193b5 4717 uint8_t operational = 0;
946727dc 4718 struct temp_event temp_event_data;
4b8bae08 4719 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS
4720 struct Scsi_Host *shost;
4721
4722 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4723
448193b5
JS
4724 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4725 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4726 "x%08x SLI Event Type:%d\n",
4727 acqe_sli->event_data1, acqe_sli->event_data2,
4728 evt_type);
4b8bae08
JS
4729
4730 port_name = phba->Port[0];
4731 if (port_name == 0x00)
4732 port_name = '?'; /* get port name is empty */
4733
946727dc
JS
4734 switch (evt_type) {
4735 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4736 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4737 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4738 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4739
4740 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4741 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4742 acqe_sli->event_data1, port_name);
4743
310429ef 4744 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
4745 shost = lpfc_shost_from_vport(phba->pport);
4746 fc_host_post_vendor_event(shost, fc_get_event_number(),
4747 sizeof(temp_event_data),
4748 (char *)&temp_event_data,
4749 SCSI_NL_VID_TYPE_PCI
4750 | PCI_VENDOR_ID_EMULEX);
4751 break;
4752 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4753 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4754 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4755 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4756
4757 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4758 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4759 acqe_sli->event_data1, port_name);
4760
4761 shost = lpfc_shost_from_vport(phba->pport);
4762 fc_host_post_vendor_event(shost, fc_get_event_number(),
4763 sizeof(temp_event_data),
4764 (char *)&temp_event_data,
4765 SCSI_NL_VID_TYPE_PCI
4766 | PCI_VENDOR_ID_EMULEX);
4767 break;
4768 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4769 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS
4770 &acqe_sli->event_data1;
4771
946727dc
JS
4772 /* fetch the status for this port */
4773 switch (phba->sli4_hba.lnk_info.lnk_no) {
4774 case LPFC_LINK_NUMBER_0:
448193b5
JS
4775 status = bf_get(lpfc_sli_misconfigured_port0_state,
4776 &misconfigured->theEvent);
4777 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4778 &misconfigured->theEvent);
946727dc
JS
4779 break;
4780 case LPFC_LINK_NUMBER_1:
448193b5
JS
4781 status = bf_get(lpfc_sli_misconfigured_port1_state,
4782 &misconfigured->theEvent);
4783 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4784 &misconfigured->theEvent);
946727dc
JS
4785 break;
4786 case LPFC_LINK_NUMBER_2:
448193b5
JS
4787 status = bf_get(lpfc_sli_misconfigured_port2_state,
4788 &misconfigured->theEvent);
4789 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4790 &misconfigured->theEvent);
946727dc
JS
4791 break;
4792 case LPFC_LINK_NUMBER_3:
448193b5
JS
4793 status = bf_get(lpfc_sli_misconfigured_port3_state,
4794 &misconfigured->theEvent);
4795 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4796 &misconfigured->theEvent);
946727dc
JS
4797 break;
4798 default:
448193b5
JS
4799 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4800 "3296 "
4801 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4802 "event: Invalid link %d",
4803 phba->sli4_hba.lnk_info.lnk_no);
4804 return;
946727dc 4805 }
4b8bae08 4806
448193b5
JS
4807 /* Skip if optic state unchanged */
4808 if (phba->sli4_hba.lnk_info.optic_state == status)
4809 return;
4810
946727dc
JS
4811 switch (status) {
4812 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS
4813 sprintf(message, "Physical Link is functional");
4814 break;
946727dc
JS
4815 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4816 sprintf(message, "Optics faulted/incorrectly "
4817 "installed/not installed - Reseat optics, "
4818 "if issue not resolved, replace.");
4819 break;
4820 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4821 sprintf(message,
4822 "Optics of two types installed - Remove one "
4823 "optic or install matching pair of optics.");
4824 break;
4825 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4826 sprintf(message, "Incompatible optics - Replace with "
292098be 4827 "compatible optics for card to function.");
946727dc 4828 break;
448193b5
JS
4829 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4830 sprintf(message, "Unqualified optics - Replace with "
4831 "Avago optics for Warranty and Technical "
4832 "Support - Link is%s operational",
2ea259ee 4833 (operational) ? " not" : "");
448193b5
JS
4834 break;
4835 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4836 sprintf(message, "Uncertified optics - Replace with "
4837 "Avago-certified optics to enable link "
4838 "operation - Link is%s operational",
2ea259ee 4839 (operational) ? " not" : "");
448193b5 4840 break;
946727dc
JS
4841 default:
4842 /* firmware is reporting a status we don't know about */
4843 sprintf(message, "Unknown event status x%02x", status);
4844 break;
4845 }
448193b5 4846 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4847 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4848 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS
4849 break;
4850 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4851 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4852 "3192 Remote DPort Test Initiated - "
4853 "Event Data1:x%08x Event Data2: x%08x\n",
4854 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS
4855 break;
4856 default:
946727dc
JS
4857 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4858 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4859 "x%08x SLI Event Type:%d\n",
4860 acqe_sli->event_data1, acqe_sli->event_data2,
4861 evt_type);
4b8bae08
JS
4862 break;
4863 }
70f3c073
JS
4864}
4865
fc2b989b
JS
4866/**
4867 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4868 * @vport: pointer to vport data structure.
4869 *
4870 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4871 * response to a CVL event.
4872 *
4873 * Return the pointer to the ndlp with the vport if successful, otherwise
4874 * return NULL.
4875 **/
4876static struct lpfc_nodelist *
4877lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4878{
4879 struct lpfc_nodelist *ndlp;
4880 struct Scsi_Host *shost;
4881 struct lpfc_hba *phba;
4882
4883 if (!vport)
4884 return NULL;
fc2b989b
JS
4885 phba = vport->phba;
4886 if (!phba)
4887 return NULL;
78730cfe
JS
4888 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4889 if (!ndlp) {
4890 /* Cannot find existing Fabric ndlp, so allocate a new one */
9d3d340d 4891 ndlp = lpfc_nlp_init(vport, Fabric_DID);
78730cfe
JS
4892 if (!ndlp)
4893 return 0;
78730cfe
JS
4894 /* Set the node type */
4895 ndlp->nlp_type |= NLP_FABRIC;
4896 /* Put ndlp onto node list */
4897 lpfc_enqueue_node(vport, ndlp);
4898 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4899 /* re-setup ndlp without removing from node list */
4900 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4901 if (!ndlp)
4902 return 0;
4903 }
63e801ce
JS
4904 if ((phba->pport->port_state < LPFC_FLOGI) &&
4905 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4906 return NULL;
4907 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS
4908 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4909 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4910 return NULL;
4911 shost = lpfc_shost_from_vport(vport);
4912 if (!shost)
4913 return NULL;
4914 lpfc_linkdown_port(vport);
4915 lpfc_cleanup_pending_mbox(vport);
4916 spin_lock_irq(shost->host_lock);
4917 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4918 spin_unlock_irq(shost->host_lock);
4919
4920 return ndlp;
4921}
4922
4923/**
4924 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4925 * @vport: pointer to lpfc hba data structure.
4926 *
4927 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4928 * response to a FCF dead event.
4929 **/
4930static void
4931lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4932{
4933 struct lpfc_vport **vports;
4934 int i;
4935
4936 vports = lpfc_create_vport_work_array(phba);
4937 if (vports)
4938 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4939 lpfc_sli4_perform_vport_cvl(vports[i]);
4940 lpfc_destroy_vport_work_array(phba, vports);
4941}
4942
da0436e9 4943/**
76a95d75 4944 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS
4945 * @phba: pointer to lpfc hba data structure.
4946 * @acqe_link: pointer to the async fcoe completion queue entry.
4947 *
4948 * This routine is to handle the SLI4 asynchronous fcoe event.
4949 **/
4950static void
76a95d75 4951lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4952 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4953{
70f3c073 4954 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4955 int rc;
6669f9bb
JS
4956 struct lpfc_vport *vport;
4957 struct lpfc_nodelist *ndlp;
4958 struct Scsi_Host *shost;
695a814e
JS
4959 int active_vlink_present;
4960 struct lpfc_vport **vports;
4961 int i;
da0436e9 4962
70f3c073
JS
4963 phba->fc_eventTag = acqe_fip->event_tag;
4964 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4965 switch (event_type) {
70f3c073
JS
4966 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4967 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4968 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS
4969 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4970 LOG_DISCOVERY,
a93ff37a
JS
4971 "2546 New FCF event, evt_tag:x%x, "
4972 "index:x%x\n",
70f3c073
JS
4973 acqe_fip->event_tag,
4974 acqe_fip->index);
999d813f
JS
4975 else
4976 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4977 LOG_DISCOVERY,
a93ff37a
JS
4978 "2788 FCF param modified event, "
4979 "evt_tag:x%x, index:x%x\n",
70f3c073
JS
4980 acqe_fip->event_tag,
4981 acqe_fip->index);
38b92ef8 4982 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS
4983 /*
4984 * During period of FCF discovery, read the FCF
4985 * table record indexed by the event to update
a93ff37a 4986 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS
4987 */
4988 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4989 LOG_DISCOVERY,
a93ff37a
JS
4990 "2779 Read FCF (x%x) for updating "
4991 "roundrobin FCF failover bmask\n",
70f3c073
JS
4992 acqe_fip->index);
4993 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 4994 }
38b92ef8
JS
4995
4996 /* If the FCF discovery is in progress, do nothing. */
3804dc84 4997 spin_lock_irq(&phba->hbalock);
a93ff37a 4998 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS
4999 spin_unlock_irq(&phba->hbalock);
5000 break;
5001 }
5002 /* If fast FCF failover rescan event is pending, do nothing */
5003 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
5004 spin_unlock_irq(&phba->hbalock);
5005 break;
5006 }
5007
c2b9712e
JS
5008 /* If the FCF has been in discovered state, do nothing. */
5009 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS
5010 spin_unlock_irq(&phba->hbalock);
5011 break;
5012 }
5013 spin_unlock_irq(&phba->hbalock);
38b92ef8 5014
0c9ab6f5
JS
5015 /* Otherwise, scan the entire FCF table and re-discover SAN */
5016 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS
5017 "2770 Start FCF table scan per async FCF "
5018 "event, evt_tag:x%x, index:x%x\n",
70f3c073 5019 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS
5020 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
5021 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 5022 if (rc)
0c9ab6f5
JS
5023 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5024 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 5025 "command failed (x%x)\n", rc);
da0436e9
JS
5026 break;
5027
70f3c073 5028 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 5029 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 5030 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS
5031 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
5032 acqe_fip->event_tag);
da0436e9
JS
5033 break;
5034
70f3c073 5035 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 5036 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5037 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5038 "2549 FCF (x%x) disconnected from network, "
70f3c073 5039 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS
5040 /*
5041 * If we are in the middle of FCF failover process, clear
5042 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 5043 */
fc2b989b 5044 spin_lock_irq(&phba->hbalock);
a1cadfef
JS
5045 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
5046 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 5047 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 5048 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 5049 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS
5050 break;
5051 }
38b92ef8
JS
5052 spin_unlock_irq(&phba->hbalock);
5053
5054 /* If the event is not for currently used fcf do nothing */
70f3c073 5055 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS
5056 break;
5057
5058 /*
5059 * Otherwise, request the port to rediscover the entire FCF
5060 * table for a fast recovery from case that the current FCF
5061 * is no longer valid as we are not in the middle of FCF
5062 * failover process already.
5063 */
c2b9712e
JS
5064 spin_lock_irq(&phba->hbalock);
5065 /* Mark the fast failover process in progress */
5066 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
5067 spin_unlock_irq(&phba->hbalock);
5068
5069 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
5070 "2771 Start FCF fast failover process due to "
5071 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
5072 "\n", acqe_fip->event_tag, acqe_fip->index);
5073 rc = lpfc_sli4_redisc_fcf_table(phba);
5074 if (rc) {
5075 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5076 LOG_DISCOVERY,
5077 "2772 Issue FCF rediscover mabilbox "
5078 "command failed, fail through to FCF "
5079 "dead event\n");
5080 spin_lock_irq(&phba->hbalock);
5081 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
5082 spin_unlock_irq(&phba->hbalock);
5083 /*
5084 * Last resort will fail over by treating this
5085 * as a link down to FCF registration.
5086 */
5087 lpfc_sli4_fcf_dead_failthrough(phba);
5088 } else {
5089 /* Reset FCF roundrobin bmask for new discovery */
5090 lpfc_sli4_clear_fcf_rr_bmask(phba);
5091 /*
5092 * Handling fast FCF failover to a DEAD FCF event is
5093 * considered equalivant to receiving CVL to all vports.
5094 */
5095 lpfc_sli4_perform_all_vport_cvl(phba);
5096 }
da0436e9 5097 break;
70f3c073 5098 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 5099 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5100 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 5101 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 5102 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 5103
6669f9bb 5104 vport = lpfc_find_vport_by_vpid(phba,
5248a749 5105 acqe_fip->index);
fc2b989b 5106 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS
5107 if (!ndlp)
5108 break;
695a814e
JS
5109 active_vlink_present = 0;
5110
5111 vports = lpfc_create_vport_work_array(phba);
5112 if (vports) {
5113 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
5114 i++) {
5115 if ((!(vports[i]->fc_flag &
5116 FC_VPORT_CVL_RCVD)) &&
5117 (vports[i]->port_state > LPFC_FDISC)) {
5118 active_vlink_present = 1;
5119 break;
5120 }
5121 }
5122 lpfc_destroy_vport_work_array(phba, vports);
5123 }
5124
cc82355a
JS
5125 /*
5126 * Don't re-instantiate if vport is marked for deletion.
5127 * If we are here first then vport_delete is going to wait
5128 * for discovery to complete.
5129 */
5130 if (!(vport->load_flag & FC_UNLOADING) &&
5131 active_vlink_present) {
695a814e
JS
5132 /*
5133 * If there are other active VLinks present,
5134 * re-instantiate the Vlink using FDISC.
5135 */
256ec0d0
JS
5136 mod_timer(&ndlp->nlp_delayfunc,
5137 jiffies + msecs_to_jiffies(1000));
fc2b989b 5138 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS
5139 spin_lock_irq(shost->host_lock);
5140 ndlp->nlp_flag |= NLP_DELAY_TMO;
5141 spin_unlock_irq(shost->host_lock);
695a814e
JS
5142 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
5143 vport->port_state = LPFC_FDISC;
5144 } else {
ecfd03c6
JS
5145 /*
5146 * Otherwise, we request port to rediscover
5147 * the entire FCF table for a fast recovery
5148 * from possible case that the current FCF
0c9ab6f5
JS
5149 * is no longer valid if we are not already
5150 * in the FCF failover process.
ecfd03c6 5151 */
fc2b989b 5152 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5153 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS
5154 spin_unlock_irq(&phba->hbalock);
5155 break;
5156 }
5157 /* Mark the fast failover process in progress */
0c9ab6f5 5158 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 5159 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS
5160 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5161 LOG_DISCOVERY,
a93ff37a 5162 "2773 Start FCF failover per CVL, "
70f3c073 5163 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 5164 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 5165 if (rc) {
0c9ab6f5
JS
5166 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5167 LOG_DISCOVERY,
5168 "2774 Issue FCF rediscover "
5169 "mabilbox command failed, "
5170 "through to CVL event\n");
fc2b989b 5171 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5172 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 5173 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS
5174 /*
5175 * Last resort will be re-try on the
5176 * the current registered FCF entry.
5177 */
5178 lpfc_retry_pport_discovery(phba);
38b92ef8
JS
5179 } else
5180 /*
5181 * Reset FCF roundrobin bmask for new
5182 * discovery.
5183 */
7d791df7 5184 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS
5185 }
5186 break;
da0436e9
JS
5187 default:
5188 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5189 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 5190 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS
5191 break;
5192 }
5193}
5194
5195/**
5196 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5197 * @phba: pointer to lpfc hba data structure.
5198 * @acqe_link: pointer to the async dcbx completion queue entry.
5199 *
5200 * This routine is to handle the SLI4 asynchronous dcbx event.
5201 **/
5202static void
5203lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5204 struct lpfc_acqe_dcbx *acqe_dcbx)
5205{
4d9ab994 5206 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS
5207 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5208 "0290 The SLI4 DCBX asynchronous event is not "
5209 "handled yet\n");
5210}
5211
b19a061a
JS
5212/**
5213 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5214 * @phba: pointer to lpfc hba data structure.
5215 * @acqe_link: pointer to the async grp5 completion queue entry.
5216 *
5217 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5218 * is an asynchronous notified of a logical link speed change. The Port
5219 * reports the logical link speed in units of 10Mbps.
5220 **/
5221static void
5222lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5223 struct lpfc_acqe_grp5 *acqe_grp5)
5224{
5225 uint16_t prev_ll_spd;
5226
5227 phba->fc_eventTag = acqe_grp5->event_tag;
5228 phba->fcoe_eventtag = acqe_grp5->event_tag;
5229 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5230 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5231 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS
5232 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5233 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS
5234 "from %dMbps to %dMbps\n", prev_ll_spd,
5235 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS
5236}
5237
da0436e9
JS
5238/**
5239 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5240 * @phba: pointer to lpfc hba data structure.
5241 *
5242 * This routine is invoked by the worker thread to process all the pending
5243 * SLI4 asynchronous events.
5244 **/
5245void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5246{
5247 struct lpfc_cq_event *cq_event;
5248
5249 /* First, declare the async event has been handled */
5250 spin_lock_irq(&phba->hbalock);
5251 phba->hba_flag &= ~ASYNC_EVENT;
5252 spin_unlock_irq(&phba->hbalock);
5253 /* Now, handle all the async events */
5254 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5255 /* Get the first event from the head of the event queue */
5256 spin_lock_irq(&phba->hbalock);
5257 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5258 cq_event, struct lpfc_cq_event, list);
5259 spin_unlock_irq(&phba->hbalock);
5260 /* Process the asynchronous event */
5261 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5262 case LPFC_TRAILER_CODE_LINK:
5263 lpfc_sli4_async_link_evt(phba,
5264 &cq_event->cqe.acqe_link);
5265 break;
5266 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5267 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS
5268 break;
5269 case LPFC_TRAILER_CODE_DCBX:
5270 lpfc_sli4_async_dcbx_evt(phba,
5271 &cq_event->cqe.acqe_dcbx);
5272 break;
b19a061a
JS
5273 case LPFC_TRAILER_CODE_GRP5:
5274 lpfc_sli4_async_grp5_evt(phba,
5275 &cq_event->cqe.acqe_grp5);
5276 break;
70f3c073
JS
5277 case LPFC_TRAILER_CODE_FC:
5278 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5279 break;
5280 case LPFC_TRAILER_CODE_SLI:
5281 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5282 break;
da0436e9
JS
5283 default:
5284 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5285 "1804 Invalid asynchrous event code: "
5286 "x%x\n", bf_get(lpfc_trailer_code,
5287 &cq_event->cqe.mcqe_cmpl));
5288 break;
5289 }
5290 /* Free the completion event processed to the free pool */
5291 lpfc_sli4_cq_event_release(phba, cq_event);
5292 }
5293}
5294
ecfd03c6
JS
5295/**
5296 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5297 * @phba: pointer to lpfc hba data structure.
5298 *
5299 * This routine is invoked by the worker thread to process FCF table
5300 * rediscovery pending completion event.
5301 **/
5302void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5303{
5304 int rc;
5305
5306 spin_lock_irq(&phba->hbalock);
5307 /* Clear FCF rediscovery timeout event */
5308 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5309 /* Clear driver fast failover FCF record flag */
5310 phba->fcf.failover_rec.flag = 0;
5311 /* Set state for FCF fast failover */
5312 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5313 spin_unlock_irq(&phba->hbalock);
5314
5315 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5316 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5317 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5318 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5319 if (rc)
0c9ab6f5
JS
5320 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5321 "2747 Issue FCF scan read FCF mailbox "
5322 "command failed 0x%x\n", rc);
ecfd03c6
JS
5323}
5324
da0436e9
JS
5325/**
5326 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5327 * @phba: pointer to lpfc hba data structure.
5328 * @dev_grp: The HBA PCI-Device group number.
5329 *
5330 * This routine is invoked to set up the per HBA PCI-Device group function
5331 * API jump table entries.
5332 *
5333 * Return: 0 if success, otherwise -ENODEV
5334 **/
5335int
5336lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5337{
5338 int rc;
5339
5340 /* Set up lpfc PCI-device group */
5341 phba->pci_dev_grp = dev_grp;
5342
5343 /* The LPFC_PCI_DEV_OC uses SLI4 */
5344 if (dev_grp == LPFC_PCI_DEV_OC)
5345 phba->sli_rev = LPFC_SLI_REV4;
5346
5347 /* Set up device INIT API function jump table */
5348 rc = lpfc_init_api_table_setup(phba, dev_grp);
5349 if (rc)
5350 return -ENODEV;
5351 /* Set up SCSI API function jump table */
5352 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5353 if (rc)
5354 return -ENODEV;
5355 /* Set up SLI API function jump table */
5356 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5357 if (rc)
5358 return -ENODEV;
5359 /* Set up MBOX API function jump table */
5360 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5361 if (rc)
5362 return -ENODEV;
5363
5364 return 0;
5b75da2f
JS
5365}
5366
5367/**
3621a710 5368 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS
5369 * @phba: pointer to lpfc hba data structure.
5370 * @intr_mode: active interrupt mode adopted.
5371 *
5372 * This routine it invoked to log the currently used active interrupt mode
5373 * to the device.
3772a991
JS
5374 **/
5375static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS
5376{
5377 switch (intr_mode) {
5378 case 0:
5379 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5380 "0470 Enable INTx interrupt mode.\n");
5381 break;
5382 case 1:
5383 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5384 "0481 Enabled MSI interrupt mode.\n");
5385 break;
5386 case 2:
5387 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5388 "0480 Enabled MSI-X interrupt mode.\n");
5389 break;
5390 default:
5391 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5392 "0482 Illegal interrupt mode.\n");
5393 break;
5394 }
5395 return;
5396}
5397
5b75da2f 5398/**
3772a991 5399 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS
5400 * @phba: pointer to lpfc hba data structure.
5401 *
3772a991
JS
5402 * This routine is invoked to enable the PCI device that is common to all
5403 * PCI devices.
5b75da2f
JS
5404 *
5405 * Return codes
af901ca1 5406 * 0 - successful
3772a991 5407 * other values - error
5b75da2f 5408 **/
3772a991
JS
5409static int
5410lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5411{
3772a991 5412 struct pci_dev *pdev;
5b75da2f 5413
3772a991
JS
5414 /* Obtain PCI device reference */
5415 if (!phba->pcidev)
5416 goto out_error;
5417 else
5418 pdev = phba->pcidev;
3772a991
JS
5419 /* Enable PCI device */
5420 if (pci_enable_device_mem(pdev))
5421 goto out_error;
5422 /* Request PCI resource for the device */
e0c0483c 5423 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS
5424 goto out_disable_device;
5425 /* Set up device as PCI master and save state for EEH */
5426 pci_set_master(pdev);
5427 pci_try_set_mwi(pdev);
5428 pci_save_state(pdev);
5b75da2f 5429
0558056c 5430 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5431 if (pci_is_pcie(pdev))
0558056c
JS
5432 pdev->needs_freset = 1;
5433
3772a991 5434 return 0;
5b75da2f 5435
3772a991
JS
5436out_disable_device:
5437 pci_disable_device(pdev);
5438out_error:
079b5c91 5439 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5440 "1401 Failed to enable pci device\n");
3772a991 5441 return -ENODEV;
5b75da2f
JS
5442}
5443
5444/**
3772a991 5445 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS
5446 * @phba: pointer to lpfc hba data structure.
5447 *
3772a991
JS
5448 * This routine is invoked to disable the PCI device that is common to all
5449 * PCI devices.
5b75da2f
JS
5450 **/
5451static void
3772a991 5452lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5453{
3772a991 5454 struct pci_dev *pdev;
5b75da2f 5455
3772a991
JS
5456 /* Obtain PCI device reference */
5457 if (!phba->pcidev)
5458 return;
5459 else
5460 pdev = phba->pcidev;
3772a991 5461 /* Release PCI resource and disable PCI device */
e0c0483c 5462 pci_release_mem_regions(pdev);
3772a991 5463 pci_disable_device(pdev);
5b75da2f
JS
5464
5465 return;
5466}
5467
e59058c4 5468/**
3772a991
JS
5469 * lpfc_reset_hba - Reset a hba
5470 * @phba: pointer to lpfc hba data structure.
e59058c4 5471 *
3772a991
JS
5472 * This routine is invoked to reset a hba device. It brings the HBA
5473 * offline, performs a board restart, and then brings the board back
5474 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5475 * on outstanding mailbox commands.
e59058c4 5476 **/
3772a991
JS
5477void
5478lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5479{
3772a991
JS
5480 /* If resets are disabled then set error state and return. */
5481 if (!phba->cfg_enable_hba_reset) {
5482 phba->link_state = LPFC_HBA_ERROR;
5483 return;
5484 }
ee62021a
JS
5485 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5486 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5487 else
5488 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS
5489 lpfc_offline(phba);
5490 lpfc_sli_brdrestart(phba);
5491 lpfc_online(phba);
5492 lpfc_unblock_mgmt_io(phba);
5493}
dea3101e 5494
0a96e975
JS
5495/**
5496 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5497 * @phba: pointer to lpfc hba data structure.
5498 *
5499 * This function enables the PCI SR-IOV virtual functions to a physical
5500 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5501 * enable the number of virtual functions to the physical function. As
5502 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5503 * API call does not considered as an error condition for most of the device.
5504 **/
5505uint16_t
5506lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5507{
5508 struct pci_dev *pdev = phba->pcidev;
5509 uint16_t nr_virtfn;
5510 int pos;
5511
0a96e975
JS
5512 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5513 if (pos == 0)
5514 return 0;
5515
5516 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5517 return nr_virtfn;
5518}
5519
912e3acd
JS
5520/**
5521 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5522 * @phba: pointer to lpfc hba data structure.
5523 * @nr_vfn: number of virtual functions to be enabled.
5524 *
5525 * This function enables the PCI SR-IOV virtual functions to a physical
5526 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5527 * enable the number of virtual functions to the physical function. As
5528 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5529 * API call does not considered as an error condition for most of the device.
5530 **/
5531int
5532lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5533{
5534 struct pci_dev *pdev = phba->pcidev;
0a96e975 5535 uint16_t max_nr_vfn;
912e3acd
JS
5536 int rc;
5537
0a96e975
JS
5538 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5539 if (nr_vfn > max_nr_vfn) {
5540 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5541 "3057 Requested vfs (%d) greater than "
5542 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5543 return -EINVAL;
5544 }
5545
912e3acd
JS
5546 rc = pci_enable_sriov(pdev, nr_vfn);
5547 if (rc) {
5548 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5549 "2806 Failed to enable sriov on this device "
5550 "with vfn number nr_vf:%d, rc:%d\n",
5551 nr_vfn, rc);
5552 } else
5553 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5554 "2807 Successful enable sriov on this device "
5555 "with vfn number nr_vf:%d\n", nr_vfn);
5556 return rc;
5557}
5558
3772a991 5559/**
895427bd 5560 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS
5561 * @phba: pointer to lpfc hba data structure.
5562 *
895427bd
JS
5563 * This routine is invoked to set up the driver internal resources before the
5564 * device specific resource setup to support the HBA device it attached to.
3772a991
JS
5565 *
5566 * Return codes
895427bd
JS
5567 * 0 - successful
5568 * other values - error
3772a991
JS
5569 **/
5570static int
895427bd 5571lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5572{
895427bd 5573 struct lpfc_sli *psli = &phba->sli;
dea3101e 5574
2e0fef85 5575 /*
895427bd 5576 * Driver resources common to all SLI revisions
2e0fef85 5577 */
895427bd
JS
5578 atomic_set(&phba->fast_event_count, 0);
5579 spin_lock_init(&phba->hbalock);
dea3101e 5580
895427bd
JS
5581 /* Initialize ndlp management spinlock */
5582 spin_lock_init(&phba->ndlp_lock);
5583
5584 INIT_LIST_HEAD(&phba->port_list);
5585 INIT_LIST_HEAD(&phba->work_list);
5586 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5587
5588 /* Initialize the wait queue head for the kernel thread */
5589 init_waitqueue_head(&phba->work_waitq);
5590
5591 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 5592 "1403 Protocols supported %s %s %s\n",
895427bd
JS
5593 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5594 "SCSI" : " "),
5595 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS
5596 "NVME" : " "),
5597 (phba->nvmet_support ? "NVMET" : " "));
895427bd
JS
5598
5599 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5600 /* Initialize the scsi buffer list used by driver for scsi IO */
5601 spin_lock_init(&phba->scsi_buf_list_get_lock);
5602 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5603 spin_lock_init(&phba->scsi_buf_list_put_lock);
5604 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5605 }
5606
5607 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5608 (phba->nvmet_support == 0)) {
5609 /* Initialize the NVME buffer list used by driver for NVME IO */
5610 spin_lock_init(&phba->nvme_buf_list_get_lock);
5611 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
5612 spin_lock_init(&phba->nvme_buf_list_put_lock);
5613 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
5614 }
5615
5616 /* Initialize the fabric iocb list */
5617 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5618
5619 /* Initialize list to save ELS buffers */
5620 INIT_LIST_HEAD(&phba->elsbuf);
5621
5622 /* Initialize FCF connection rec list */
5623 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5624
5625 /* Initialize OAS configuration list */
5626 spin_lock_init(&phba->devicelock);
5627 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5628
3772a991 5629 /* MBOX heartbeat timer */
f22eb4d3 5630 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
3772a991 5631 /* Fabric block timer */
f22eb4d3 5632 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
3772a991 5633 /* EA polling mode timer */
f22eb4d3 5634 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
895427bd 5635 /* Heartbeat timer */
f22eb4d3 5636 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
895427bd
JS
5637
5638 return 0;
5639}
5640
5641/**
5642 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5643 * @phba: pointer to lpfc hba data structure.
5644 *
5645 * This routine is invoked to set up the driver internal resources specific to
5646 * support the SLI-3 HBA device it attached to.
5647 *
5648 * Return codes
5649 * 0 - successful
5650 * other values - error
5651 **/
5652static int
5653lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5654{
5655 int rc;
5656
5657 /*
5658 * Initialize timers used by driver
5659 */
5660
5661 /* FCP polling mode timer */
f22eb4d3 5662 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
dea3101e 5663
3772a991
JS
5664 /* Host attention work mask setup */
5665 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5666 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5667
3772a991
JS
5668 /* Get all the module params for configuring this host */
5669 lpfc_get_cfgparam(phba);
895427bd
JS
5670 /* Set up phase-1 common device driver resources */
5671
5672 rc = lpfc_setup_driver_resource_phase1(phba);
5673 if (rc)
5674 return -ENODEV;
5675
49198b37
JS
5676 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5677 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5678 /* check for menlo minimum sg count */
5679 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5680 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5681 }
5682
895427bd
JS
5683 if (!phba->sli.sli3_ring)
5684 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5685 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5686 if (!phba->sli.sli3_ring)
2a76a283
JS
5687 return -ENOMEM;
5688
dea3101e 5689 /*
96f7077f 5690 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5691 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5692 */
3772a991 5693
96f7077f
JS
5694 /* Initialize the host templates the configured values. */
5695 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e
JS
5696 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
5697 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5698
5699 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5700 if (phba->cfg_enable_bg) {
96f7077f
JS
5701 /*
5702 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5703 * the FCP rsp, and a BDE for each. Sice we have no control
5704 * over how many protection data segments the SCSI Layer
5705 * will hand us (ie: there could be one for every block
5706 * in the IO), we just allocate enough BDEs to accomidate
5707 * our max amount and we need to limit lpfc_sg_seg_cnt to
5708 * minimize the risk of running out.
5709 */
5710 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5711 sizeof(struct fcp_rsp) +
5712 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5713
5714 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5715 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5716
5717 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5718 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5719 } else {
5720 /*
5721 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5722 * the FCP rsp, a BDE for each, and a BDE for up to
5723 * cfg_sg_seg_cnt data segments.
5724 */
5725 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5726 sizeof(struct fcp_rsp) +
5727 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5728
5729 /* Total BDEs in BPL for scsi_sg_list */
5730 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5731 }
dea3101e 5732
96f7077f
JS
5733 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5734 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5735 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5736 phba->cfg_total_seg_cnt);
dea3101e 5737
3772a991
JS
5738 phba->max_vpi = LPFC_MAX_VPI;
5739 /* This will be set to correct value after config_port mbox */
5740 phba->max_vports = 0;
dea3101e 5741
3772a991
JS
5742 /*
5743 * Initialize the SLI Layer to run with lpfc HBAs.
5744 */
5745 lpfc_sli_setup(phba);
895427bd 5746 lpfc_sli_queue_init(phba);
ed957684 5747
3772a991
JS
5748 /* Allocate device driver memory */
5749 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5750 return -ENOMEM;
51ef4c26 5751
912e3acd
JS
5752 /*
5753 * Enable sr-iov virtual functions if supported and configured
5754 * through the module parameter.
5755 */
5756 if (phba->cfg_sriov_nr_virtfn > 0) {
5757 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5758 phba->cfg_sriov_nr_virtfn);
5759 if (rc) {
5760 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5761 "2808 Requested number of SR-IOV "
5762 "virtual functions (%d) is not "
5763 "supported\n",
5764 phba->cfg_sriov_nr_virtfn);
5765 phba->cfg_sriov_nr_virtfn = 0;
5766 }
5767 }
5768
3772a991
JS
5769 return 0;
5770}
ed957684 5771
3772a991
JS
5772/**
5773 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5774 * @phba: pointer to lpfc hba data structure.
5775 *
5776 * This routine is invoked to unset the driver internal resources set up
5777 * specific for supporting the SLI-3 HBA device it attached to.
5778 **/
5779static void
5780lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5781{
5782 /* Free device driver memory allocated */
5783 lpfc_mem_free_all(phba);
3163f725 5784
3772a991
JS
5785 return;
5786}
dea3101e 5787
3772a991 5788/**
da0436e9 5789 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS
5790 * @phba: pointer to lpfc hba data structure.
5791 *
da0436e9
JS
5792 * This routine is invoked to set up the driver internal resources specific to
5793 * support the SLI-4 HBA device it attached to.
3772a991
JS
5794 *
5795 * Return codes
af901ca1 5796 * 0 - successful
da0436e9 5797 * other values - error
3772a991
JS
5798 **/
5799static int
da0436e9 5800lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5801{
28baac74 5802 LPFC_MBOXQ_t *mboxq;
f358dd0c 5803 MAILBOX_t *mb;
895427bd 5804 int rc, i, max_buf_size;
28baac74
JS
5805 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5806 struct lpfc_mqe *mqe;
09294d46 5807 int longs;
1ba981fd 5808 int fof_vectors = 0;
7683ec66 5809 int extra;
f358dd0c 5810 uint64_t wwn;
da0436e9 5811
895427bd
JS
5812 phba->sli4_hba.num_online_cpu = num_online_cpus();
5813 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5814 phba->sli4_hba.curr_disp_cpu = 0;
5815
716d3bc5
JS
5816 /* Get all the module params for configuring this host */
5817 lpfc_get_cfgparam(phba);
5818
895427bd
JS
5819 /* Set up phase-1 common device driver resources */
5820 rc = lpfc_setup_driver_resource_phase1(phba);
5821 if (rc)
5822 return -ENODEV;
5823
da0436e9
JS
5824 /* Before proceed, wait for POST done and device ready */
5825 rc = lpfc_sli4_post_status_check(phba);
5826 if (rc)
5827 return -ENODEV;
5828
3772a991 5829 /*
da0436e9 5830 * Initialize timers used by driver
3772a991 5831 */
3772a991 5832
f22eb4d3 5833 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
3772a991 5834
ecfd03c6 5835 /* FCF rediscover timer */
f22eb4d3 5836 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
ecfd03c6 5837
7ad20aa9
JS
5838 /*
5839 * Control structure for handling external multi-buffer mailbox
5840 * command pass-through.
5841 */
5842 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5843 sizeof(struct lpfc_mbox_ext_buf_ctx));
5844 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5845
da0436e9 5846 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5847
da0436e9
JS
5848 /* This will be set to correct value after the read_config mbox */
5849 phba->max_vports = 0;
3772a991 5850
da0436e9
JS
5851 /* Program the default value of vlan_id and fc_map */
5852 phba->valid_vlan = 0;
5853 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5854 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5855 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5856
2a76a283
JS
5857 /*
5858 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS
5859 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5860 * The WQ create will allocate the ring.
2a76a283 5861 */
09294d46 5862
7683ec66
JS
5863 /*
5864 * 1 for cmd, 1 for rsp, NVME adds an extra one
5865 * for boundary conditions in its max_sgl_segment template.
5866 */
5867 extra = 2;
5868 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
5869 extra++;
5870
da0436e9 5871 /*
09294d46
JS
5872 * It doesn't matter what family our adapter is in, we are
5873 * limited to 2 Pages, 512 SGEs, for our SGL.
5874 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5875 */
5876 max_buf_size = (2 * SLI4_PAGE_SIZE);
7683ec66
JS
5877 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - extra)
5878 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - extra;
09294d46 5879
da0436e9 5880 /*
895427bd
JS
5881 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5882 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5883 */
96f7077f
JS
5884 if (phba->cfg_enable_bg) {
5885 /*
895427bd
JS
5886 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5887 * the FCP rsp, and a SGE. Sice we have no control
5888 * over how many protection segments the SCSI Layer
96f7077f 5889 * will hand us (ie: there could be one for every block
895427bd
JS
5890 * in the IO), just allocate enough SGEs to accomidate
5891 * our max amount and we need to limit lpfc_sg_seg_cnt
5892 * to minimize the risk of running out.
96f7077f
JS
5893 */
5894 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5895 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS
5896
5897 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5898 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5899
5900 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS
5901 phba->cfg_sg_seg_cnt =
5902 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS
5903 } else {
5904 /*
895427bd 5905 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS
5906 * the FCP rsp, a SGE for each, and a SGE for up to
5907 * cfg_sg_seg_cnt data segments.
5908 */
5909 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5910 sizeof(struct fcp_rsp) +
7683ec66 5911 ((phba->cfg_sg_seg_cnt + extra) *
895427bd 5912 sizeof(struct sli4_sge));
96f7077f
JS
5913
5914 /* Total SGEs for scsi_sg_list */
7683ec66 5915 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra;
895427bd 5916
96f7077f 5917 /*
7683ec66 5918 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only
895427bd 5919 * need to post 1 page for the SGL.
96f7077f 5920 */
085c647c 5921 }
acd6859b 5922
96f7077f
JS
5923 /* Initialize the host templates with the updated values. */
5924 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5925 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e 5926 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5927
5928 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5929 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5930 else
5931 phba->cfg_sg_dma_buf_size =
5932 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5933
5934 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5935 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5936 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5937 phba->cfg_total_seg_cnt);
3772a991 5938
da0436e9 5939 /* Initialize buffer queue management fields */
895427bd 5940 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS
5941 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5942 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5943
da0436e9
JS
5944 /*
5945 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5946 */
895427bd
JS
5947 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5948 /* Initialize the Abort scsi buffer list used by driver */
5949 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5950 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5951 }
5952
5953 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5954 /* Initialize the Abort nvme buffer list used by driver */
5955 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5956 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379 5957 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
a8cf5dfe 5958 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
895427bd
JS
5959 }
5960
da0436e9 5961 /* This abort list used by worker thread */
895427bd 5962 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
a8cf5dfe 5963 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
3772a991 5964
da0436e9 5965 /*
6d368e53 5966 * Initialize driver internal slow-path work queues
da0436e9 5967 */
3772a991 5968
da0436e9
JS
5969 /* Driver internel slow-path CQ Event pool */
5970 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5971 /* Response IOCB work queue list */
45ed1190 5972 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS
5973 /* Asynchronous event CQ Event work queue list */
5974 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5975 /* Fast-path XRI aborted CQ Event work queue list */
5976 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5977 /* Slow-path XRI aborted CQ Event work queue list */
5978 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5979 /* Receive queue CQ Event work queue list */
5980 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5981
6d368e53
JS
5982 /* Initialize extent block lists. */
5983 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5984 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5985 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
5986 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
5987
d1f525aa
JS
5988 /* Initialize mboxq lists. If the early init routines fail
5989 * these lists need to be correctly initialized.
5990 */
5991 INIT_LIST_HEAD(&phba->sli.mboxq);
5992 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
5993
448193b5
JS
5994 /* initialize optic_state to 0xFF */
5995 phba->sli4_hba.lnk_info.optic_state = 0xff;
5996
da0436e9
JS
5997 /* Allocate device driver memory */
5998 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
5999 if (rc)
6000 return -ENOMEM;
6001
2fcee4bf
JS
6002 /* IF Type 2 ports get initialized now. */
6003 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6004 LPFC_SLI_INTF_IF_TYPE_2) {
6005 rc = lpfc_pci_function_reset(phba);
895427bd
JS
6006 if (unlikely(rc)) {
6007 rc = -ENODEV;
6008 goto out_free_mem;
6009 }
946727dc 6010 phba->temp_sensor_support = 1;
2fcee4bf
JS
6011 }
6012
da0436e9
JS
6013 /* Create the bootstrap mailbox command */
6014 rc = lpfc_create_bootstrap_mbox(phba);
6015 if (unlikely(rc))
6016 goto out_free_mem;
6017
6018 /* Set up the host's endian order with the device. */
6019 rc = lpfc_setup_endian_order(phba);
6020 if (unlikely(rc))
6021 goto out_free_bsmbx;
6022
6023 /* Set up the hba's configuration parameters. */
6024 rc = lpfc_sli4_read_config(phba);
cff261f6
JS
6025 if (unlikely(rc))
6026 goto out_free_bsmbx;
6027 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS
6028 if (unlikely(rc))
6029 goto out_free_bsmbx;
6030
2fcee4bf
JS
6031 /* IF Type 0 ports get initialized now. */
6032 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6033 LPFC_SLI_INTF_IF_TYPE_0) {
6034 rc = lpfc_pci_function_reset(phba);
6035 if (unlikely(rc))
6036 goto out_free_bsmbx;
6037 }
da0436e9 6038
cb5172ea
JS
6039 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
6040 GFP_KERNEL);
6041 if (!mboxq) {
6042 rc = -ENOMEM;
6043 goto out_free_bsmbx;
6044 }
6045
f358dd0c 6046 /* Check for NVMET being configured */
895427bd 6047 phba->nvmet_support = 0;
f358dd0c
JS
6048 if (lpfc_enable_nvmet_cnt) {
6049
6050 /* First get WWN of HBA instance */
6051 lpfc_read_nv(phba, mboxq);
6052 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6053 if (rc != MBX_SUCCESS) {
6054 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6055 "6016 Mailbox failed , mbxCmd x%x "
6056 "READ_NV, mbxStatus x%x\n",
6057 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
6058 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
d1f525aa 6059 mempool_free(mboxq, phba->mbox_mem_pool);
f358dd0c
JS
6060 rc = -EIO;
6061 goto out_free_bsmbx;
6062 }
6063 mb = &mboxq->u.mb;
6064 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
6065 sizeof(uint64_t));
6066 wwn = cpu_to_be64(wwn);
6067 phba->sli4_hba.wwnn.u.name = wwn;
6068 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
6069 sizeof(uint64_t));
6070 /* wwn is WWPN of HBA instance */
6071 wwn = cpu_to_be64(wwn);
6072 phba->sli4_hba.wwpn.u.name = wwn;
6073
6074 /* Check to see if it matches any module parameter */
6075 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
6076 if (wwn == lpfc_enable_nvmet[i]) {
7d708033 6077#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
3c603be9
JS
6078 if (lpfc_nvmet_mem_alloc(phba))
6079 break;
6080
6081 phba->nvmet_support = 1; /* a match */
6082
f358dd0c
JS
6083 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6084 "6017 NVME Target %016llx\n",
6085 wwn);
7d708033
JS
6086#else
6087 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6088 "6021 Can't enable NVME Target."
6089 " NVME_TARGET_FC infrastructure"
6090 " is not in kernel\n");
6091#endif
3c603be9 6092 break;
f358dd0c
JS
6093 }
6094 }
6095 }
895427bd
JS
6096
6097 lpfc_nvme_mod_param_dep(phba);
6098
fedd3b7b 6099 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS
6100 lpfc_supported_pages(mboxq);
6101 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS
6102 if (!rc) {
6103 mqe = &mboxq->u.mqe;
6104 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
6105 LPFC_MAX_SUPPORTED_PAGES);
6106 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
6107 switch (pn_page[i]) {
6108 case LPFC_SLI4_PARAMETERS:
6109 phba->sli4_hba.pc_sli4_params.supported = 1;
6110 break;
6111 default:
6112 break;
6113 }
6114 }
6115 /* Read the port's SLI4 Parameters capabilities if supported. */
6116 if (phba->sli4_hba.pc_sli4_params.supported)
6117 rc = lpfc_pc_sli4_params_get(phba, mboxq);
6118 if (rc) {
6119 mempool_free(mboxq, phba->mbox_mem_pool);
6120 rc = -EIO;
6121 goto out_free_bsmbx;
cb5172ea
JS
6122 }
6123 }
65791f1f 6124
fedd3b7b
JS
6125 /*
6126 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS
6127 * If this call fails, it isn't critical unless the SLI4 parameters come
6128 * back in conflict.
fedd3b7b 6129 */
6d368e53
JS
6130 rc = lpfc_get_sli4_parameters(phba, mboxq);
6131 if (rc) {
6132 if (phba->sli4_hba.extents_in_use &&
6133 phba->sli4_hba.rpi_hdrs_in_use) {
6134 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6135 "2999 Unsupported SLI4 Parameters "
6136 "Extents and RPI headers enabled.\n");
6d368e53 6137 }
895427bd 6138 mempool_free(mboxq, phba->mbox_mem_pool);
5c756065 6139 rc = -EIO;
895427bd 6140 goto out_free_bsmbx;
6d368e53 6141 }
895427bd 6142
cb5172ea 6143 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS
6144
6145 /* Verify OAS is supported */
6146 lpfc_sli4_oas_verify(phba);
6147 if (phba->cfg_fof)
6148 fof_vectors = 1;
6149
5350d872
JS
6150 /* Verify all the SLI4 queues */
6151 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS
6152 if (rc)
6153 goto out_free_bsmbx;
6154
6155 /* Create driver internal CQE event pool */
6156 rc = lpfc_sli4_cq_event_pool_create(phba);
6157 if (rc)
5350d872 6158 goto out_free_bsmbx;
da0436e9 6159
8a9d2e80
JS
6160 /* Initialize sgl lists per host */
6161 lpfc_init_sgl_list(phba);
6162
6163 /* Allocate and initialize active sgl array */
da0436e9
JS
6164 rc = lpfc_init_active_sgl_array(phba);
6165 if (rc) {
6166 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6167 "1430 Failed to initialize sgl list.\n");
8a9d2e80 6168 goto out_destroy_cq_event_pool;
da0436e9 6169 }
da0436e9
JS
6170 rc = lpfc_sli4_init_rpi_hdrs(phba);
6171 if (rc) {
6172 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6173 "1432 Failed to initialize rpi headers.\n");
6174 goto out_free_active_sgl;
6175 }
6176
a93ff37a 6177 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS
6178 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
6179 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
6180 GFP_KERNEL);
6181 if (!phba->fcf.fcf_rr_bmask) {
6182 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6183 "2759 Failed allocate memory for FCF round "
6184 "robin failover bmask\n");
0558056c 6185 rc = -ENOMEM;
0c9ab6f5
JS
6186 goto out_remove_rpi_hdrs;
6187 }
6188
895427bd
JS
6189 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
6190 sizeof(struct lpfc_hba_eq_hdl),
6191 GFP_KERNEL);
6192 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS
6193 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6194 "2572 Failed allocate memory for "
6195 "fast-path per-EQ handle array\n");
6196 rc = -ENOMEM;
6197 goto out_free_fcf_rr_bmask;
da0436e9
JS
6198 }
6199
895427bd
JS
6200 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
6201 sizeof(struct lpfc_vector_map_info),
6202 GFP_KERNEL);
7bb03bbf
JS
6203 if (!phba->sli4_hba.cpu_map) {
6204 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6205 "3327 Failed allocate memory for msi-x "
6206 "interrupt vector mapping\n");
6207 rc = -ENOMEM;
895427bd 6208 goto out_free_hba_eq_hdl;
7bb03bbf 6209 }
b246de17 6210 if (lpfc_used_cpu == NULL) {
895427bd
JS
6211 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
6212 GFP_KERNEL);
b246de17
JS
6213 if (!lpfc_used_cpu) {
6214 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6215 "3335 Failed allocate memory for msi-x "
6216 "interrupt vector mapping\n");
6217 kfree(phba->sli4_hba.cpu_map);
6218 rc = -ENOMEM;
895427bd 6219 goto out_free_hba_eq_hdl;
b246de17
JS
6220 }
6221 for (i = 0; i < lpfc_present_cpu; i++)
6222 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
6223 }
6224
912e3acd
JS
6225 /*
6226 * Enable sr-iov virtual functions if supported and configured
6227 * through the module parameter.
6228 */
6229 if (phba->cfg_sriov_nr_virtfn > 0) {
6230 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6231 phba->cfg_sriov_nr_virtfn);
6232 if (rc) {
6233 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6234 "3020 Requested number of SR-IOV "
6235 "virtual functions (%d) is not "
6236 "supported\n",
6237 phba->cfg_sriov_nr_virtfn);
6238 phba->cfg_sriov_nr_virtfn = 0;
6239 }
6240 }
6241
5248a749 6242 return 0;
da0436e9 6243
895427bd
JS
6244out_free_hba_eq_hdl:
6245 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS
6246out_free_fcf_rr_bmask:
6247 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS
6248out_remove_rpi_hdrs:
6249 lpfc_sli4_remove_rpi_hdrs(phba);
6250out_free_active_sgl:
6251 lpfc_free_active_sgl(phba);
da0436e9
JS
6252out_destroy_cq_event_pool:
6253 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS
6254out_free_bsmbx:
6255 lpfc_destroy_bootstrap_mbox(phba);
6256out_free_mem:
6257 lpfc_mem_free(phba);
6258 return rc;
6259}
6260
6261/**
6262 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6263 * @phba: pointer to lpfc hba data structure.
6264 *
6265 * This routine is invoked to unset the driver internal resources set up
6266 * specific for supporting the SLI-4 HBA device it attached to.
6267 **/
6268static void
6269lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6270{
6271 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6272
7bb03bbf
JS
6273 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6274 kfree(phba->sli4_hba.cpu_map);
6275 phba->sli4_hba.num_present_cpu = 0;
6276 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6277 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6278
da0436e9 6279 /* Free memory allocated for fast-path work queue handles */
895427bd 6280 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS
6281
6282 /* Free the allocated rpi headers. */
6283 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6284 lpfc_sli4_remove_rpis(phba);
da0436e9 6285
0c9ab6f5
JS
6286 /* Free eligible FCF index bmask */
6287 kfree(phba->fcf.fcf_rr_bmask);
6288
da0436e9
JS
6289 /* Free the ELS sgl list */
6290 lpfc_free_active_sgl(phba);
8a9d2e80 6291 lpfc_free_els_sgl_list(phba);
f358dd0c 6292 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6293
da0436e9
JS
6294 /* Free the completion queue EQ event pool */
6295 lpfc_sli4_cq_event_release_all(phba);
6296 lpfc_sli4_cq_event_pool_destroy(phba);
6297
6d368e53
JS
6298 /* Release resource identifiers. */
6299 lpfc_sli4_dealloc_resource_identifiers(phba);
6300
da0436e9
JS
6301 /* Free the bsmbx region. */
6302 lpfc_destroy_bootstrap_mbox(phba);
6303
6304 /* Free the SLI Layer memory with SLI4 HBAs */
6305 lpfc_mem_free_all(phba);
6306
6307 /* Free the current connect table */
6308 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS
6309 &phba->fcf_conn_rec_list, list) {
6310 list_del_init(&conn_entry->list);
da0436e9 6311 kfree(conn_entry);
4d9ab994 6312 }
da0436e9
JS
6313
6314 return;
6315}
6316
6317/**
25985edc 6318 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS
6319 * @phba: The hba struct for which this call is being executed.
6320 * @dev_grp: The HBA PCI-Device group number.
6321 *
6322 * This routine sets up the device INIT interface API function jump table
6323 * in @phba struct.
6324 *
6325 * Returns: 0 - success, -ENODEV - failure.
6326 **/
6327int
6328lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6329{
84d1b006
JS
6330 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6331 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6332 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS
6333 switch (dev_grp) {
6334 case LPFC_PCI_DEV_LP:
6335 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6336 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6337 phba->lpfc_stop_port = lpfc_stop_port_s3;
6338 break;
6339 case LPFC_PCI_DEV_OC:
6340 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6341 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6342 phba->lpfc_stop_port = lpfc_stop_port_s4;
6343 break;
6344 default:
6345 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6346 "1431 Invalid HBA PCI-device group: 0x%x\n",
6347 dev_grp);
6348 return -ENODEV;
6349 break;
6350 }
6351 return 0;
6352}
6353
da0436e9
JS
6354/**
6355 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6356 * @phba: pointer to lpfc hba data structure.
6357 *
6358 * This routine is invoked to set up the driver internal resources after the
6359 * device specific resource setup to support the HBA device it attached to.
6360 *
6361 * Return codes
af901ca1 6362 * 0 - successful
da0436e9
JS
6363 * other values - error
6364 **/
6365static int
6366lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6367{
6368 int error;
6369
6370 /* Startup the kernel thread for this host adapter. */
6371 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6372 "lpfc_worker_%d", phba->brd_no);
6373 if (IS_ERR(phba->worker_thread)) {
6374 error = PTR_ERR(phba->worker_thread);
6375 return error;
3772a991
JS
6376 }
6377
f485c18d
DK
6378 /* workqueue for deferred irq use */
6379 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0);
6380
3772a991
JS
6381 return 0;
6382}
6383
6384/**
6385 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6386 * @phba: pointer to lpfc hba data structure.
6387 *
6388 * This routine is invoked to unset the driver internal resources set up after
6389 * the device specific resource setup for supporting the HBA device it
6390 * attached to.
6391 **/
6392static void
6393lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6394{
f485c18d
DK
6395 if (phba->wq) {
6396 flush_workqueue(phba->wq);
6397 destroy_workqueue(phba->wq);
6398 phba->wq = NULL;
6399 }
6400
3772a991
JS
6401 /* Stop kernel worker thread */
6402 kthread_stop(phba->worker_thread);
6403}
6404
6405/**
6406 * lpfc_free_iocb_list - Free iocb list.
6407 * @phba: pointer to lpfc hba data structure.
6408 *
6409 * This routine is invoked to free the driver's IOCB list and memory.
6410 **/
6c621a22 6411void
3772a991
JS
6412lpfc_free_iocb_list(struct lpfc_hba *phba)
6413{
6414 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6415
6416 spin_lock_irq(&phba->hbalock);
6417 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6418 &phba->lpfc_iocb_list, list) {
6419 list_del(&iocbq_entry->list);
6420 kfree(iocbq_entry);
6421 phba->total_iocbq_bufs--;
98c9ea5c 6422 }
3772a991
JS
6423 spin_unlock_irq(&phba->hbalock);
6424
6425 return;
6426}
6427
6428/**
6429 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6430 * @phba: pointer to lpfc hba data structure.
6431 *
6432 * This routine is invoked to allocate and initizlize the driver's IOCB
6433 * list and set up the IOCB tag array accordingly.
6434 *
6435 * Return codes
af901ca1 6436 * 0 - successful
3772a991
JS
6437 * other values - error
6438 **/
6c621a22 6439int
3772a991
JS
6440lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6441{
6442 struct lpfc_iocbq *iocbq_entry = NULL;
6443 uint16_t iotag;
6444 int i;
dea3101e
JB
6445
6446 /* Initialize and populate the iocb list per host. */
6447 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6448 for (i = 0; i < iocb_count; i++) {
dd00cc48 6449 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e
JB
6450 if (iocbq_entry == NULL) {
6451 printk(KERN_ERR "%s: only allocated %d iocbs of "
6452 "expected %d count. Unloading driver.\n",
cadbd4a5 6453 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e
JB
6454 goto out_free_iocbq;
6455 }
6456
604a3e30
JB
6457 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6458 if (iotag == 0) {
3772a991 6459 kfree(iocbq_entry);
604a3e30 6460 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6461 "Unloading driver.\n", __func__);
604a3e30
JB
6462 goto out_free_iocbq;
6463 }
6d368e53 6464 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6465 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS
6466
6467 spin_lock_irq(&phba->hbalock);
dea3101e
JB
6468 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6469 phba->total_iocbq_bufs++;
2e0fef85 6470 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
6471 }
6472
3772a991 6473 return 0;
dea3101e 6474
3772a991
JS
6475out_free_iocbq:
6476 lpfc_free_iocb_list(phba);
dea3101e 6477
3772a991
JS
6478 return -ENOMEM;
6479}
5e9d9b82 6480
3772a991 6481/**
8a9d2e80 6482 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6483 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6484 * @sglq_list: pointer to the head of sgl list.
3772a991 6485 *
8a9d2e80 6486 * This routine is invoked to free a give sgl list and memory.
3772a991 6487 **/
8a9d2e80
JS
6488void
6489lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6490{
da0436e9 6491 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS
6492
6493 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6494 list_del(&sglq_entry->list);
6495 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6496 kfree(sglq_entry);
6497 }
6498}
6499
6500/**
6501 * lpfc_free_els_sgl_list - Free els sgl list.
6502 * @phba: pointer to lpfc hba data structure.
6503 *
6504 * This routine is invoked to free the driver's els sgl list and memory.
6505 **/
6506static void
6507lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6508{
da0436e9 6509 LIST_HEAD(sglq_list);
dea3101e 6510
8a9d2e80 6511 /* Retrieve all els sgls from driver list */
da0436e9 6512 spin_lock_irq(&phba->hbalock);
895427bd
JS
6513 spin_lock(&phba->sli4_hba.sgl_list_lock);
6514 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6515 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6516 spin_unlock_irq(&phba->hbalock);
dea3101e 6517
8a9d2e80
JS
6518 /* Now free the sgl list */
6519 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6520}
92d7f7b0 6521
f358dd0c
JS
6522/**
6523 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
6524 * @phba: pointer to lpfc hba data structure.
6525 *
6526 * This routine is invoked to free the driver's nvmet sgl list and memory.
6527 **/
6528static void
6529lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
6530{
6531 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
6532 LIST_HEAD(sglq_list);
6533
6534 /* Retrieve all nvmet sgls from driver list */
6535 spin_lock_irq(&phba->hbalock);
6536 spin_lock(&phba->sli4_hba.sgl_list_lock);
6537 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
6538 spin_unlock(&phba->sli4_hba.sgl_list_lock);
6539 spin_unlock_irq(&phba->hbalock);
6540
6541 /* Now free the sgl list */
6542 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
6543 list_del(&sglq_entry->list);
6544 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
6545 kfree(sglq_entry);
6546 }
4b40d02b
DK
6547
6548 /* Update the nvmet_xri_cnt to reflect no current sgls.
6549 * The next initialization cycle sets the count and allocates
6550 * the sgls over again.
6551 */
6552 phba->sli4_hba.nvmet_xri_cnt = 0;
f358dd0c
JS
6553}
6554
da0436e9
JS
6555/**
6556 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6557 * @phba: pointer to lpfc hba data structure.
6558 *
6559 * This routine is invoked to allocate the driver's active sgl memory.
6560 * This array will hold the sglq_entry's for active IOs.
6561 **/
6562static int
6563lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6564{
6565 int size;
6566 size = sizeof(struct lpfc_sglq *);
6567 size *= phba->sli4_hba.max_cfg_param.max_xri;
6568
6569 phba->sli4_hba.lpfc_sglq_active_list =
6570 kzalloc(size, GFP_KERNEL);
6571 if (!phba->sli4_hba.lpfc_sglq_active_list)
6572 return -ENOMEM;
6573 return 0;
3772a991
JS
6574}
6575
6576/**
da0436e9 6577 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS
6578 * @phba: pointer to lpfc hba data structure.
6579 *
da0436e9
JS
6580 * This routine is invoked to walk through the array of active sglq entries
6581 * and free all of the resources.
6582 * This is just a place holder for now.
3772a991
JS
6583 **/
6584static void
da0436e9 6585lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6586{
da0436e9 6587 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS
6588}
6589
6590/**
da0436e9 6591 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS
6592 * @phba: pointer to lpfc hba data structure.
6593 *
da0436e9
JS
6594 * This routine is invoked to allocate and initizlize the driver's sgl
6595 * list and set up the sgl xritag tag array accordingly.
3772a991 6596 *
3772a991 6597 **/
8a9d2e80 6598static void
da0436e9 6599lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6600{
da0436e9 6601 /* Initialize and populate the sglq list per host/VF. */
895427bd 6602 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 6603 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 6604 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
86c67379 6605 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
da0436e9 6606
8a9d2e80
JS
6607 /* els xri-sgl book keeping */
6608 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6609
8a9d2e80 6610 /* scsi xri-buffer book keeping */
da0436e9 6611 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS
6612
6613 /* nvme xri-buffer book keeping */
6614 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS
6615}
6616
6617/**
6618 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6619 * @phba: pointer to lpfc hba data structure.
6620 *
6621 * This routine is invoked to post rpi header templates to the
88a2cfbb 6622 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6623 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS
6624 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6625 * and should be called only when interrupts are disabled.
da0436e9
JS
6626 *
6627 * Return codes
af901ca1 6628 * 0 - successful
88a2cfbb 6629 * -ERROR - otherwise.
da0436e9
JS
6630 **/
6631int
6632lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6633{
6634 int rc = 0;
da0436e9
JS
6635 struct lpfc_rpi_hdr *rpi_hdr;
6636
6637 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6638 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6639 return rc;
6d368e53
JS
6640 if (phba->sli4_hba.extents_in_use)
6641 return -EIO;
da0436e9
JS
6642
6643 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6644 if (!rpi_hdr) {
6645 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6646 "0391 Error during rpi post operation\n");
6647 lpfc_sli4_remove_rpis(phba);
6648 rc = -ENODEV;
6649 }
6650
6651 return rc;
6652}
6653
6654/**
6655 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6656 * @phba: pointer to lpfc hba data structure.
6657 *
6658 * This routine is invoked to allocate a single 4KB memory region to
6659 * support rpis and stores them in the phba. This single region
6660 * provides support for up to 64 rpis. The region is used globally
6661 * by the device.
6662 *
6663 * Returns:
6664 * A valid rpi hdr on success.
6665 * A NULL pointer on any failure.
6666 **/
6667struct lpfc_rpi_hdr *
6668lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6669{
6670 uint16_t rpi_limit, curr_rpi_range;
6671 struct lpfc_dmabuf *dmabuf;
6672 struct lpfc_rpi_hdr *rpi_hdr;
6673
6d368e53
JS
6674 /*
6675 * If the SLI4 port supports extents, posting the rpi header isn't
6676 * required. Set the expected maximum count and let the actual value
6677 * get set when extents are fully allocated.
6678 */
6679 if (!phba->sli4_hba.rpi_hdrs_in_use)
6680 return NULL;
6681 if (phba->sli4_hba.extents_in_use)
6682 return NULL;
6683
6684 /* The limit on the logical index is just the max_rpi count. */
845d9e8d 6685 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
da0436e9
JS
6686
6687 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6688 /*
6689 * Establish the starting RPI in this header block. The starting
6690 * rpi is normalized to a zero base because the physical rpi is
6691 * port based.
6692 */
97f2ecf1 6693 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS
6694 spin_unlock_irq(&phba->hbalock);
6695
845d9e8d
JS
6696 /* Reached full RPI range */
6697 if (curr_rpi_range == rpi_limit)
6d368e53 6698 return NULL;
845d9e8d 6699
da0436e9
JS
6700 /*
6701 * First allocate the protocol header region for the port. The
6702 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6703 */
6704 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6705 if (!dmabuf)
6706 return NULL;
6707
1aee383d
JP
6708 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6709 LPFC_HDR_TEMPLATE_SIZE,
6710 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
6711 if (!dmabuf->virt) {
6712 rpi_hdr = NULL;
6713 goto err_free_dmabuf;
6714 }
6715
da0436e9
JS
6716 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6717 rpi_hdr = NULL;
6718 goto err_free_coherent;
6719 }
6720
6721 /* Save the rpi header data for cleanup later. */
6722 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6723 if (!rpi_hdr)
6724 goto err_free_coherent;
6725
6726 rpi_hdr->dmabuf = dmabuf;
6727 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6728 rpi_hdr->page_count = 1;
6729 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6730
6731 /* The rpi_hdr stores the logical index only. */
6732 rpi_hdr->start_rpi = curr_rpi_range;
845d9e8d 6733 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
da0436e9
JS
6734 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6735
da0436e9
JS
6736 spin_unlock_irq(&phba->hbalock);
6737 return rpi_hdr;
6738
6739 err_free_coherent:
6740 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6741 dmabuf->virt, dmabuf->phys);
6742 err_free_dmabuf:
6743 kfree(dmabuf);
6744 return NULL;
6745}
6746
6747/**
6748 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6749 * @phba: pointer to lpfc hba data structure.
6750 *
6751 * This routine is invoked to remove all memory resources allocated
6d368e53
JS
6752 * to support rpis for SLI4 ports not supporting extents. This routine
6753 * presumes the caller has released all rpis consumed by fabric or port
6754 * logins and is prepared to have the header pages removed.
da0436e9
JS
6755 **/
6756void
6757lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6758{
6759 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6760
6d368e53
JS
6761 if (!phba->sli4_hba.rpi_hdrs_in_use)
6762 goto exit;
6763
da0436e9
JS
6764 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6765 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6766 list_del(&rpi_hdr->list);
6767 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6768 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6769 kfree(rpi_hdr->dmabuf);
6770 kfree(rpi_hdr);
6771 }
6d368e53
JS
6772 exit:
6773 /* There are no rpis available to the port now. */
6774 phba->sli4_hba.next_rpi = 0;
da0436e9
JS
6775}
6776
6777/**
6778 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6779 * @pdev: pointer to pci device data structure.
6780 *
6781 * This routine is invoked to allocate the driver hba data structure for an
6782 * HBA device. If the allocation is successful, the phba reference to the
6783 * PCI device data structure is set.
6784 *
6785 * Return codes
af901ca1 6786 * pointer to @phba - successful
da0436e9
JS
6787 * NULL - error
6788 **/
6789static struct lpfc_hba *
6790lpfc_hba_alloc(struct pci_dev *pdev)
6791{
6792 struct lpfc_hba *phba;
6793
6794 /* Allocate memory for HBA structure */
6795 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6796 if (!phba) {
e34ccdfe 6797 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS
6798 return NULL;
6799 }
6800
6801 /* Set reference to PCI device in HBA structure */
6802 phba->pcidev = pdev;
6803
6804 /* Assign an unused board number */
6805 phba->brd_no = lpfc_get_instance();
6806 if (phba->brd_no < 0) {
6807 kfree(phba);
6808 return NULL;
6809 }
65791f1f 6810 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6811
4fede78f 6812 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS
6813 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6814
da0436e9
JS
6815 return phba;
6816}
6817
6818/**
6819 * lpfc_hba_free - Free driver hba data structure with a device.
6820 * @phba: pointer to lpfc hba data structure.
6821 *
6822 * This routine is invoked to free the driver hba data structure with an
6823 * HBA device.
6824 **/
6825static void
6826lpfc_hba_free(struct lpfc_hba *phba)
6827{
6828 /* Release the driver assigned board number */
6829 idr_remove(&lpfc_hba_index, phba->brd_no);
6830
895427bd
JS
6831 /* Free memory allocated with sli3 rings */
6832 kfree(phba->sli.sli3_ring);
6833 phba->sli.sli3_ring = NULL;
2a76a283 6834
da0436e9
JS
6835 kfree(phba);
6836 return;
6837}
6838
6839/**
6840 * lpfc_create_shost - Create hba physical port with associated scsi host.
6841 * @phba: pointer to lpfc hba data structure.
6842 *
6843 * This routine is invoked to create HBA physical port and associate a SCSI
6844 * host with it.
6845 *
6846 * Return codes
af901ca1 6847 * 0 - successful
da0436e9
JS
6848 * other values - error
6849 **/
6850static int
6851lpfc_create_shost(struct lpfc_hba *phba)
6852{
6853 struct lpfc_vport *vport;
6854 struct Scsi_Host *shost;
6855
6856 /* Initialize HBA FC structure */
6857 phba->fc_edtov = FF_DEF_EDTOV;
6858 phba->fc_ratov = FF_DEF_RATOV;
6859 phba->fc_altov = FF_DEF_ALTOV;
6860 phba->fc_arbtov = FF_DEF_ARBTOV;
6861
d7c47992 6862 atomic_set(&phba->sdev_cnt, 0);
2cee7808
JS
6863 atomic_set(&phba->fc4ScsiInputRequests, 0);
6864 atomic_set(&phba->fc4ScsiOutputRequests, 0);
6865 atomic_set(&phba->fc4ScsiControlRequests, 0);
6866 atomic_set(&phba->fc4ScsiIoCmpls, 0);
6867 atomic_set(&phba->fc4NvmeInputRequests, 0);
6868 atomic_set(&phba->fc4NvmeOutputRequests, 0);
6869 atomic_set(&phba->fc4NvmeControlRequests, 0);
6870 atomic_set(&phba->fc4NvmeIoCmpls, 0);
6871 atomic_set(&phba->fc4NvmeLsRequests, 0);
6872 atomic_set(&phba->fc4NvmeLsCmpls, 0);
da0436e9
JS
6873 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6874 if (!vport)
6875 return -ENODEV;
6876
6877 shost = lpfc_shost_from_vport(vport);
6878 phba->pport = vport;
2ea259ee 6879
f358dd0c
JS
6880 if (phba->nvmet_support) {
6881 /* Only 1 vport (pport) will support NVME target */
6882 if (phba->txrdy_payload_pool == NULL) {
771db5c0
RP
6883 phba->txrdy_payload_pool = dma_pool_create(
6884 "txrdy_pool", &phba->pcidev->dev,
f358dd0c
JS
6885 TXRDY_PAYLOAD_LEN, 16, 0);
6886 if (phba->txrdy_payload_pool) {
6887 phba->targetport = NULL;
6888 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
6889 lpfc_printf_log(phba, KERN_INFO,
6890 LOG_INIT | LOG_NVME_DISC,
6891 "6076 NVME Target Found\n");
6892 }
6893 }
6894 }
6895
da0436e9
JS
6896 lpfc_debugfs_initialize(vport);
6897 /* Put reference to SCSI host to driver's device private data */
6898 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6899
4258e98e
JS
6900 /*
6901 * At this point we are fully registered with PSA. In addition,
6902 * any initial discovery should be completed.
6903 */
6904 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS
6905 if (phba->cfg_enable_SmartSAN ||
6906 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS
6907
6908 /* Setup appropriate attribute masks */
6909 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6910 if (phba->cfg_enable_SmartSAN)
4258e98e
JS
6911 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6912 else
6913 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6914 }
3772a991
JS
6915 return 0;
6916}
db2378e0 6917
3772a991
JS
6918/**
6919 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6920 * @phba: pointer to lpfc hba data structure.
6921 *
6922 * This routine is invoked to destroy HBA physical port and the associated
6923 * SCSI host.
6924 **/
6925static void
6926lpfc_destroy_shost(struct lpfc_hba *phba)
6927{
6928 struct lpfc_vport *vport = phba->pport;
6929
6930 /* Destroy physical port that associated with the SCSI host */
6931 destroy_port(vport);
6932
6933 return;
6934}
6935
6936/**
6937 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6938 * @phba: pointer to lpfc hba data structure.
6939 * @shost: the shost to be used to detect Block guard settings.
6940 *
6941 * This routine sets up the local Block guard protocol settings for @shost.
6942 * This routine also allocates memory for debugging bg buffers.
6943 **/
6944static void
6945lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6946{
bbeb79b9
JS
6947 uint32_t old_mask;
6948 uint32_t old_guard;
6949
3772a991 6950 int pagecnt = 10;
b3b98b74 6951 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS
6952 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6953 "1478 Registering BlockGuard with the "
6954 "SCSI layer\n");
bbeb79b9 6955
b3b98b74
JS
6956 old_mask = phba->cfg_prot_mask;
6957 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS
6958
6959 /* Only allow supported values */
b3b98b74 6960 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS
6961 SHOST_DIX_TYPE0_PROTECTION |
6962 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS
6963 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6964 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS
6965
6966 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS
6967 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6968 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6969
b3b98b74
JS
6970 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6971 if ((old_mask != phba->cfg_prot_mask) ||
6972 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS
6973 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6974 "1475 Registering BlockGuard with the "
6975 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS
6976 phba->cfg_prot_mask,
6977 phba->cfg_prot_guard);
bbeb79b9 6978
b3b98b74
JS
6979 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6980 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS
6981 } else
6982 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6983 "1479 Not Registering BlockGuard with the SCSI "
6984 "layer, Bad protection parameters: %d %d\n",
6985 old_mask, old_guard);
3772a991 6986 }
bbeb79b9 6987
3772a991
JS
6988 if (!_dump_buf_data) {
6989 while (pagecnt) {
6990 spin_lock_init(&_dump_buf_lock);
6991 _dump_buf_data =
6992 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6993 if (_dump_buf_data) {
6a9c52cf
JS
6994 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6995 "9043 BLKGRD: allocated %d pages for "
3772a991
JS
6996 "_dump_buf_data at 0x%p\n",
6997 (1 << pagecnt), _dump_buf_data);
6998 _dump_buf_data_order = pagecnt;
6999 memset(_dump_buf_data, 0,
7000 ((1 << PAGE_SHIFT) << pagecnt));
7001 break;
7002 } else
7003 --pagecnt;
7004 }
7005 if (!_dump_buf_data_order)
6a9c52cf
JS
7006 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7007 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS
7008 "memory for hexdump\n");
7009 } else
6a9c52cf
JS
7010 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7011 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS
7012 "\n", _dump_buf_data);
7013 if (!_dump_buf_dif) {
7014 while (pagecnt) {
7015 _dump_buf_dif =
7016 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
7017 if (_dump_buf_dif) {
6a9c52cf
JS
7018 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7019 "9046 BLKGRD: allocated %d pages for "
3772a991
JS
7020 "_dump_buf_dif at 0x%p\n",
7021 (1 << pagecnt), _dump_buf_dif);
7022 _dump_buf_dif_order = pagecnt;
7023 memset(_dump_buf_dif, 0,
7024 ((1 << PAGE_SHIFT) << pagecnt));
7025 break;
7026 } else
7027 --pagecnt;
7028 }
7029 if (!_dump_buf_dif_order)
6a9c52cf
JS
7030 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7031 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS
7032 "memory for hexdump\n");
7033 } else
6a9c52cf
JS
7034 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7035 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS
7036 _dump_buf_dif);
7037}
7038
7039/**
7040 * lpfc_post_init_setup - Perform necessary device post initialization setup.
7041 * @phba: pointer to lpfc hba data structure.
7042 *
7043 * This routine is invoked to perform all the necessary post initialization
7044 * setup for the device.
7045 **/
7046static void
7047lpfc_post_init_setup(struct lpfc_hba *phba)
7048{
7049 struct Scsi_Host *shost;
7050 struct lpfc_adapter_event_header adapter_event;
7051
7052 /* Get the default values for Model Name and Description */
7053 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
7054
7055 /*
7056 * hba setup may have changed the hba_queue_depth so we need to
7057 * adjust the value of can_queue.
7058 */
7059 shost = pci_get_drvdata(phba->pcidev);
7060 shost->can_queue = phba->cfg_hba_queue_depth - 10;
7061 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
7062 lpfc_setup_bg(phba, shost);
7063
7064 lpfc_host_attrib_init(shost);
7065
7066 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
7067 spin_lock_irq(shost->host_lock);
7068 lpfc_poll_start_timer(phba);
7069 spin_unlock_irq(shost->host_lock);
7070 }
7071
7072 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7073 "0428 Perform SCSI scan\n");
7074 /* Send board arrival event to upper layer */
7075 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
7076 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
7077 fc_host_post_vendor_event(shost, fc_get_event_number(),
7078 sizeof(adapter_event),
7079 (char *) &adapter_event,
7080 LPFC_NL_VENDOR_ID);
7081 return;
7082}
7083
7084/**
7085 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
7086 * @phba: pointer to lpfc hba data structure.
7087 *
7088 * This routine is invoked to set up the PCI device memory space for device
7089 * with SLI-3 interface spec.
7090 *
7091 * Return codes
af901ca1 7092 * 0 - successful
3772a991
JS
7093 * other values - error
7094 **/
7095static int
7096lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
7097{
7098 struct pci_dev *pdev;
7099 unsigned long bar0map_len, bar2map_len;
7100 int i, hbq_count;
7101 void *ptr;
7102 int error = -ENODEV;
7103
7104 /* Obtain PCI device reference */
7105 if (!phba->pcidev)
7106 return error;
7107 else
7108 pdev = phba->pcidev;
7109
7110 /* Set the device DMA mask size */
8e68597d
MR
7111 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
7112 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
7113 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
7114 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 7115 return error;
8e68597d
MR
7116 }
7117 }
3772a991
JS
7118
7119 /* Get the bus address of Bar0 and Bar2 and the number of bytes
7120 * required by each mapping.
7121 */
7122 phba->pci_bar0_map = pci_resource_start(pdev, 0);
7123 bar0map_len = pci_resource_len(pdev, 0);
7124
7125 phba->pci_bar2_map = pci_resource_start(pdev, 2);
7126 bar2map_len = pci_resource_len(pdev, 2);
7127
7128 /* Map HBA SLIM to a kernel virtual address. */
7129 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
7130 if (!phba->slim_memmap_p) {
7131 dev_printk(KERN_ERR, &pdev->dev,
7132 "ioremap failed for SLIM memory.\n");
7133 goto out;
7134 }
7135
7136 /* Map HBA Control Registers to a kernel virtual address. */
7137 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
7138 if (!phba->ctrl_regs_memmap_p) {
7139 dev_printk(KERN_ERR, &pdev->dev,
7140 "ioremap failed for HBA control registers.\n");
7141 goto out_iounmap_slim;
7142 }
7143
7144 /* Allocate memory for SLI-2 structures */
1aee383d
JP
7145 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7146 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS
7147 if (!phba->slim2p.virt)
7148 goto out_iounmap;
7149
3772a991 7150 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS
7151 phba->mbox_ext = (phba->slim2p.virt +
7152 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS
7153 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
7154 phba->IOCBs = (phba->slim2p.virt +
7155 offsetof(struct lpfc_sli2_slim, IOCBs));
7156
7157 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
7158 lpfc_sli_hbq_size(),
7159 &phba->hbqslimp.phys,
7160 GFP_KERNEL);
7161 if (!phba->hbqslimp.virt)
7162 goto out_free_slim;
7163
7164 hbq_count = lpfc_sli_hbq_count();
7165 ptr = phba->hbqslimp.virt;
7166 for (i = 0; i < hbq_count; ++i) {
7167 phba->hbqs[i].hbq_virt = ptr;
7168 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
7169 ptr += (lpfc_hbq_defs[i]->entry_count *
7170 sizeof(struct lpfc_hbq_entry));
7171 }
7172 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
7173 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
7174
7175 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
7176
3772a991
JS
7177 phba->MBslimaddr = phba->slim_memmap_p;
7178 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
7179 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
7180 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
7181 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
7182
7183 return 0;
7184
7185out_free_slim:
7186 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7187 phba->slim2p.virt, phba->slim2p.phys);
7188out_iounmap:
7189 iounmap(phba->ctrl_regs_memmap_p);
7190out_iounmap_slim:
7191 iounmap(phba->slim_memmap_p);
7192out:
7193 return error;
7194}
7195
7196/**
7197 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
7198 * @phba: pointer to lpfc hba data structure.
7199 *
7200 * This routine is invoked to unset the PCI device memory space for device
7201 * with SLI-3 interface spec.
7202 **/
7203static void
7204lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7205{
7206 struct pci_dev *pdev;
7207
7208 /* Obtain PCI device reference */
7209 if (!phba->pcidev)
7210 return;
7211 else
7212 pdev = phba->pcidev;
7213
7214 /* Free coherent DMA memory allocated */
7215 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7216 phba->hbqslimp.virt, phba->hbqslimp.phys);
7217 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7218 phba->slim2p.virt, phba->slim2p.phys);
7219
7220 /* I/O memory unmap */
7221 iounmap(phba->ctrl_regs_memmap_p);
7222 iounmap(phba->slim_memmap_p);
7223
7224 return;
7225}
7226
7227/**
da0436e9 7228 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS
7229 * @phba: pointer to lpfc hba data structure.
7230 *
da0436e9
JS
7231 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7232 * done and check status.
3772a991 7233 *
da0436e9 7234 * Return 0 if successful, otherwise -ENODEV.
3772a991 7235 **/
da0436e9
JS
7236int
7237lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 7238{
2fcee4bf
JS
7239 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7240 struct lpfc_register reg_data;
7241 int i, port_error = 0;
7242 uint32_t if_type;
3772a991 7243
9940b97b
JS
7244 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7245 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 7246 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 7247 return -ENODEV;
3772a991 7248
da0436e9
JS
7249 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7250 for (i = 0; i < 3000; i++) {
9940b97b
JS
7251 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7252 &portsmphr_reg.word0) ||
7253 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 7254 /* Port has a fatal POST error, break out */
da0436e9
JS
7255 port_error = -ENODEV;
7256 break;
7257 }
2fcee4bf
JS
7258 if (LPFC_POST_STAGE_PORT_READY ==
7259 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 7260 break;
da0436e9 7261 msleep(10);
3772a991
JS
7262 }
7263
2fcee4bf
JS
7264 /*
7265 * If there was a port error during POST, then don't proceed with
7266 * other register reads as the data may not be valid. Just exit.
7267 */
7268 if (port_error) {
da0436e9 7269 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
7270 "1408 Port Failed POST - portsmphr=0x%x, "
7271 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7272 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7273 portsmphr_reg.word0,
7274 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7275 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7276 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7277 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7278 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7279 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7280 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7281 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7282 } else {
28baac74 7283 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS
7284 "2534 Device Info: SLIFamily=0x%x, "
7285 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7286 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS
7287 bf_get(lpfc_sli_intf_sli_family,
7288 &phba->sli4_hba.sli_intf),
7289 bf_get(lpfc_sli_intf_slirev,
7290 &phba->sli4_hba.sli_intf),
085c647c
JS
7291 bf_get(lpfc_sli_intf_if_type,
7292 &phba->sli4_hba.sli_intf),
7293 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7294 &phba->sli4_hba.sli_intf),
085c647c
JS
7295 bf_get(lpfc_sli_intf_sli_hint2,
7296 &phba->sli4_hba.sli_intf),
7297 bf_get(lpfc_sli_intf_func_type,
28baac74 7298 &phba->sli4_hba.sli_intf));
2fcee4bf
JS
7299 /*
7300 * Check for other Port errors during the initialization
7301 * process. Fail the load if the port did not come up
7302 * correctly.
7303 */
7304 if_type = bf_get(lpfc_sli_intf_if_type,
7305 &phba->sli4_hba.sli_intf);
7306 switch (if_type) {
7307 case LPFC_SLI_INTF_IF_TYPE_0:
7308 phba->sli4_hba.ue_mask_lo =
7309 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7310 phba->sli4_hba.ue_mask_hi =
7311 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7312 uerrlo_reg.word0 =
7313 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7314 uerrhi_reg.word0 =
7315 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7316 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7317 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7318 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7319 "1422 Unrecoverable Error "
7320 "Detected during POST "
7321 "uerr_lo_reg=0x%x, "
7322 "uerr_hi_reg=0x%x, "
7323 "ue_mask_lo_reg=0x%x, "
7324 "ue_mask_hi_reg=0x%x\n",
7325 uerrlo_reg.word0,
7326 uerrhi_reg.word0,
7327 phba->sli4_hba.ue_mask_lo,
7328 phba->sli4_hba.ue_mask_hi);
7329 port_error = -ENODEV;
7330 }
7331 break;
7332 case LPFC_SLI_INTF_IF_TYPE_2:
7333 /* Final checks. The port status should be clean. */
9940b97b
JS
7334 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7335 &reg_data.word0) ||
0558056c
JS
7336 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7337 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS
7338 phba->work_status[0] =
7339 readl(phba->sli4_hba.u.if_type2.
7340 ERR1regaddr);
7341 phba->work_status[1] =
7342 readl(phba->sli4_hba.u.if_type2.
7343 ERR2regaddr);
7344 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS
7345 "2888 Unrecoverable port error "
7346 "following POST: port status reg "
7347 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS
7348 "error 1=0x%x, error 2=0x%x\n",
7349 reg_data.word0,
7350 portsmphr_reg.word0,
7351 phba->work_status[0],
7352 phba->work_status[1]);
7353 port_error = -ENODEV;
7354 }
7355 break;
7356 case LPFC_SLI_INTF_IF_TYPE_1:
7357 default:
7358 break;
7359 }
28baac74 7360 }
da0436e9
JS
7361 return port_error;
7362}
3772a991 7363
da0436e9
JS
7364/**
7365 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7366 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7367 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS
7368 *
7369 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7370 * memory map.
7371 **/
7372static void
2fcee4bf
JS
7373lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7374{
7375 switch (if_type) {
7376 case LPFC_SLI_INTF_IF_TYPE_0:
7377 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7378 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7379 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7380 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7381 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7382 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7383 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7384 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7385 phba->sli4_hba.SLIINTFregaddr =
7386 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7387 break;
7388 case LPFC_SLI_INTF_IF_TYPE_2:
0cf07f84
JS
7389 phba->sli4_hba.u.if_type2.EQDregaddr =
7390 phba->sli4_hba.conf_regs_memmap_p +
7391 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
2fcee4bf 7392 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS
7393 phba->sli4_hba.conf_regs_memmap_p +
7394 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7395 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS
7396 phba->sli4_hba.conf_regs_memmap_p +
7397 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7398 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS
7399 phba->sli4_hba.conf_regs_memmap_p +
7400 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7401 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS
7402 phba->sli4_hba.conf_regs_memmap_p +
7403 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS
7404 phba->sli4_hba.SLIINTFregaddr =
7405 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7406 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS
7407 phba->sli4_hba.conf_regs_memmap_p +
7408 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7409 phba->sli4_hba.RQDBregaddr =
962bc51b
JS
7410 phba->sli4_hba.conf_regs_memmap_p +
7411 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7412 phba->sli4_hba.WQDBregaddr =
962bc51b
JS
7413 phba->sli4_hba.conf_regs_memmap_p +
7414 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS
7415 phba->sli4_hba.EQCQDBregaddr =
7416 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
7417 phba->sli4_hba.MQDBregaddr =
7418 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
7419 phba->sli4_hba.BMBXregaddr =
7420 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
7421 break;
7422 case LPFC_SLI_INTF_IF_TYPE_1:
7423 default:
7424 dev_printk(KERN_ERR, &phba->pcidev->dev,
7425 "FATAL - unsupported SLI4 interface type - %d\n",
7426 if_type);
7427 break;
7428 }
da0436e9 7429}
3772a991 7430
da0436e9
JS
7431/**
7432 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
7433 * @phba: pointer to lpfc hba data structure.
7434 *
7435 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
7436 * memory map.
7437 **/
7438static void
7439lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
7440{
2fcee4bf
JS
7441 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
7442 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 7443 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7444 LPFC_HST_ISR0;
da0436e9 7445 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7446 LPFC_HST_IMR0;
da0436e9 7447 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7448 LPFC_HST_ISCR0;
3772a991
JS
7449}
7450
7451/**
da0436e9 7452 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 7453 * @phba: pointer to lpfc hba data structure.
da0436e9 7454 * @vf: virtual function number
3772a991 7455 *
da0436e9
JS
7456 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
7457 * based on the given viftual function number, @vf.
7458 *
7459 * Return 0 if successful, otherwise -ENODEV.
3772a991 7460 **/
da0436e9
JS
7461static int
7462lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7463{
da0436e9
JS
7464 if (vf > LPFC_VIR_FUNC_MAX)
7465 return -ENODEV;
3772a991 7466
da0436e9 7467 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7468 vf * LPFC_VFR_PAGE_SIZE +
7469 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7470 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7471 vf * LPFC_VFR_PAGE_SIZE +
7472 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS
7473 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7474 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7475 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7476 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7477 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7478 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7479 return 0;
3772a991
JS
7480}
7481
7482/**
da0436e9 7483 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS
7484 * @phba: pointer to lpfc hba data structure.
7485 *
da0436e9
JS
7486 * This routine is invoked to create the bootstrap mailbox
7487 * region consistent with the SLI-4 interface spec. This
7488 * routine allocates all memory necessary to communicate
7489 * mailbox commands to the port and sets up all alignment
7490 * needs. No locks are expected to be held when calling
7491 * this routine.
3772a991
JS
7492 *
7493 * Return codes
af901ca1 7494 * 0 - successful
d439d286 7495 * -ENOMEM - could not allocated memory.
da0436e9 7496 **/
3772a991 7497static int
da0436e9 7498lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7499{
da0436e9
JS
7500 uint32_t bmbx_size;
7501 struct lpfc_dmabuf *dmabuf;
7502 struct dma_address *dma_address;
7503 uint32_t pa_addr;
7504 uint64_t phys_addr;
7505
7506 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7507 if (!dmabuf)
7508 return -ENOMEM;
3772a991 7509
da0436e9
JS
7510 /*
7511 * The bootstrap mailbox region is comprised of 2 parts
7512 * plus an alignment restriction of 16 bytes.
7513 */
7514 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP
7515 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7516 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
7517 if (!dmabuf->virt) {
7518 kfree(dmabuf);
7519 return -ENOMEM;
3772a991
JS
7520 }
7521
da0436e9
JS
7522 /*
7523 * Initialize the bootstrap mailbox pointers now so that the register
7524 * operations are simple later. The mailbox dma address is required
7525 * to be 16-byte aligned. Also align the virtual memory as each
7526 * maibox is copied into the bmbx mailbox region before issuing the
7527 * command to the port.
7528 */
7529 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7530 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7531
7532 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7533 LPFC_ALIGN_16_BYTE);
7534 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7535 LPFC_ALIGN_16_BYTE);
7536
7537 /*
7538 * Set the high and low physical addresses now. The SLI4 alignment
7539 * requirement is 16 bytes and the mailbox is posted to the port
7540 * as two 30-bit addresses. The other data is a bit marking whether
7541 * the 30-bit address is the high or low address.
7542 * Upcast bmbx aphys to 64bits so shift instruction compiles
7543 * clean on 32 bit machines.
7544 */
7545 dma_address = &phba->sli4_hba.bmbx.dma_address;
7546 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7547 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7548 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7549 LPFC_BMBX_BIT1_ADDR_HI);
7550
7551 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7552 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7553 LPFC_BMBX_BIT1_ADDR_LO);
7554 return 0;
3772a991
JS
7555}
7556
7557/**
da0436e9 7558 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS
7559 * @phba: pointer to lpfc hba data structure.
7560 *
da0436e9
JS
7561 * This routine is invoked to teardown the bootstrap mailbox
7562 * region and release all host resources. This routine requires
7563 * the caller to ensure all mailbox commands recovered, no
7564 * additional mailbox comands are sent, and interrupts are disabled
7565 * before calling this routine.
7566 *
7567 **/
3772a991 7568static void
da0436e9 7569lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7570{
da0436e9
JS
7571 dma_free_coherent(&phba->pcidev->dev,
7572 phba->sli4_hba.bmbx.bmbx_size,
7573 phba->sli4_hba.bmbx.dmabuf->virt,
7574 phba->sli4_hba.bmbx.dmabuf->phys);
7575
7576 kfree(phba->sli4_hba.bmbx.dmabuf);
7577 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS
7578}
7579
7580/**
da0436e9 7581 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS
7582 * @phba: pointer to lpfc hba data structure.
7583 *
da0436e9
JS
7584 * This routine is invoked to read the configuration parameters from the HBA.
7585 * The configuration parameters are used to set the base and maximum values
7586 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7587 * allocation for the port.
3772a991
JS
7588 *
7589 * Return codes
af901ca1 7590 * 0 - successful
25985edc 7591 * -ENOMEM - No available memory
d439d286 7592 * -EIO - The mailbox failed to complete successfully.
3772a991 7593 **/
ff78d8f9 7594int
da0436e9 7595lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7596{
da0436e9
JS
7597 LPFC_MBOXQ_t *pmb;
7598 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS
7599 union lpfc_sli4_cfg_shdr *shdr;
7600 uint32_t shdr_status, shdr_add_status;
7601 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7602 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7603 char *pdesc_0;
c691816e
JS
7604 uint16_t forced_link_speed;
7605 uint32_t if_type;
8aa134a8 7606 int length, i, rc = 0, rc2;
3772a991 7607
da0436e9
JS
7608 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7609 if (!pmb) {
7610 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7611 "2011 Unable to allocate memory for issuing "
7612 "SLI_CONFIG_SPECIAL mailbox command\n");
7613 return -ENOMEM;
3772a991
JS
7614 }
7615
da0436e9 7616 lpfc_read_config(phba, pmb);
3772a991 7617
da0436e9
JS
7618 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7619 if (rc != MBX_SUCCESS) {
7620 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7621 "2012 Mailbox failed , mbxCmd x%x "
7622 "READ_CONFIG, mbxStatus x%x\n",
7623 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7624 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7625 rc = -EIO;
7626 } else {
7627 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS
7628 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7629 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7630 phba->sli4_hba.lnk_info.lnk_tp =
7631 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7632 phba->sli4_hba.lnk_info.lnk_no =
7633 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7634 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7635 "3081 lnk_type:%d, lnk_numb:%d\n",
7636 phba->sli4_hba.lnk_info.lnk_tp,
7637 phba->sli4_hba.lnk_info.lnk_no);
7638 } else
7639 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7640 "3082 Mailbox (x%x) returned ldv:x0\n",
7641 bf_get(lpfc_mqe_command, &pmb->u.mqe));
44fd7fe3
JS
7642 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
7643 phba->bbcredit_support = 1;
7644 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
7645 }
7646
6d368e53
JS
7647 phba->sli4_hba.extents_in_use =
7648 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS
7649 phba->sli4_hba.max_cfg_param.max_xri =
7650 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7651 phba->sli4_hba.max_cfg_param.xri_base =
7652 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7653 phba->sli4_hba.max_cfg_param.max_vpi =
7654 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7655 phba->sli4_hba.max_cfg_param.vpi_base =
7656 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7657 phba->sli4_hba.max_cfg_param.max_rpi =
7658 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7659 phba->sli4_hba.max_cfg_param.rpi_base =
7660 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7661 phba->sli4_hba.max_cfg_param.max_vfi =
7662 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7663 phba->sli4_hba.max_cfg_param.vfi_base =
7664 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7665 phba->sli4_hba.max_cfg_param.max_fcfi =
7666 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS
7667 phba->sli4_hba.max_cfg_param.max_eq =
7668 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7669 phba->sli4_hba.max_cfg_param.max_rq =
7670 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7671 phba->sli4_hba.max_cfg_param.max_wq =
7672 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7673 phba->sli4_hba.max_cfg_param.max_cq =
7674 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7675 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7676 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7677 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7678 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS
7679 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7680 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS
7681 phba->max_vports = phba->max_vpi;
7682 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS
7683 "2003 cfg params Extents? %d "
7684 "XRI(B:%d M:%d), "
da0436e9
JS
7685 "VPI(B:%d M:%d) "
7686 "VFI(B:%d M:%d) "
7687 "RPI(B:%d M:%d) "
2ea259ee 7688 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7689 phba->sli4_hba.extents_in_use,
da0436e9
JS
7690 phba->sli4_hba.max_cfg_param.xri_base,
7691 phba->sli4_hba.max_cfg_param.max_xri,
7692 phba->sli4_hba.max_cfg_param.vpi_base,
7693 phba->sli4_hba.max_cfg_param.max_vpi,
7694 phba->sli4_hba.max_cfg_param.vfi_base,
7695 phba->sli4_hba.max_cfg_param.max_vfi,
7696 phba->sli4_hba.max_cfg_param.rpi_base,
7697 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS
7698 phba->sli4_hba.max_cfg_param.max_fcfi,
7699 phba->sli4_hba.max_cfg_param.max_eq,
7700 phba->sli4_hba.max_cfg_param.max_cq,
7701 phba->sli4_hba.max_cfg_param.max_wq,
7702 phba->sli4_hba.max_cfg_param.max_rq);
7703
3772a991 7704 }
912e3acd
JS
7705
7706 if (rc)
7707 goto read_cfg_out;
da0436e9 7708
c691816e
JS
7709 /* Update link speed if forced link speed is supported */
7710 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7711 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7712 forced_link_speed =
7713 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7714 if (forced_link_speed) {
7715 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7716
7717 switch (forced_link_speed) {
7718 case LINK_SPEED_1G:
7719 phba->cfg_link_speed =
7720 LPFC_USER_LINK_SPEED_1G;
7721 break;
7722 case LINK_SPEED_2G:
7723 phba->cfg_link_speed =
7724 LPFC_USER_LINK_SPEED_2G;
7725 break;
7726 case LINK_SPEED_4G:
7727 phba->cfg_link_speed =
7728 LPFC_USER_LINK_SPEED_4G;
7729 break;
7730 case LINK_SPEED_8G:
7731 phba->cfg_link_speed =
7732 LPFC_USER_LINK_SPEED_8G;
7733 break;
7734 case LINK_SPEED_10G:
7735 phba->cfg_link_speed =
7736 LPFC_USER_LINK_SPEED_10G;
7737 break;
7738 case LINK_SPEED_16G:
7739 phba->cfg_link_speed =
7740 LPFC_USER_LINK_SPEED_16G;
7741 break;
7742 case LINK_SPEED_32G:
7743 phba->cfg_link_speed =
7744 LPFC_USER_LINK_SPEED_32G;
7745 break;
7746 case 0xffff:
7747 phba->cfg_link_speed =
7748 LPFC_USER_LINK_SPEED_AUTO;
7749 break;
7750 default:
7751 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7752 "0047 Unrecognized link "
7753 "speed : %d\n",
7754 forced_link_speed);
7755 phba->cfg_link_speed =
7756 LPFC_USER_LINK_SPEED_AUTO;
7757 }
7758 }
7759 }
7760
da0436e9 7761 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
7762 length = phba->sli4_hba.max_cfg_param.max_xri -
7763 lpfc_sli4_get_els_iocb_cnt(phba);
7764 if (phba->cfg_hba_queue_depth > length) {
7765 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7766 "3361 HBA queue depth changed from %d to %d\n",
7767 phba->cfg_hba_queue_depth, length);
7768 phba->cfg_hba_queue_depth = length;
7769 }
912e3acd
JS
7770
7771 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7772 LPFC_SLI_INTF_IF_TYPE_2)
7773 goto read_cfg_out;
7774
7775 /* get the pf# and vf# for SLI4 if_type 2 port */
7776 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7777 sizeof(struct lpfc_sli4_cfg_mhdr));
7778 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7779 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7780 length, LPFC_SLI4_MBX_EMBED);
7781
8aa134a8 7782 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS
7783 shdr = (union lpfc_sli4_cfg_shdr *)
7784 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7785 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7786 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7787 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS
7788 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7789 "3026 Mailbox failed , mbxCmd x%x "
7790 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7791 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7792 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS
7793 goto read_cfg_out;
7794 }
7795
7796 /* search for fc_fcoe resrouce descriptor */
7797 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7798
8aa134a8
JS
7799 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7800 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7801 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7802 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7803 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7804 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7805 goto read_cfg_out;
7806
912e3acd 7807 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7808 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7809 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7810 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS
7811 phba->sli4_hba.iov.pf_number =
7812 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7813 phba->sli4_hba.iov.vf_number =
7814 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7815 break;
7816 }
7817 }
7818
7819 if (i < LPFC_RSRC_DESC_MAX_NUM)
7820 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7821 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7822 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7823 phba->sli4_hba.iov.vf_number);
8aa134a8 7824 else
912e3acd
JS
7825 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7826 "3028 GET_FUNCTION_CONFIG: failed to find "
7827 "Resrouce Descriptor:x%x\n",
7828 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS
7829
7830read_cfg_out:
7831 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7832 return rc;
3772a991
JS
7833}
7834
7835/**
2fcee4bf 7836 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS
7837 * @phba: pointer to lpfc hba data structure.
7838 *
2fcee4bf
JS
7839 * This routine is invoked to setup the port-side endian order when
7840 * the port if_type is 0. This routine has no function for other
7841 * if_types.
da0436e9
JS
7842 *
7843 * Return codes
af901ca1 7844 * 0 - successful
25985edc 7845 * -ENOMEM - No available memory
d439d286 7846 * -EIO - The mailbox failed to complete successfully.
3772a991 7847 **/
da0436e9
JS
7848static int
7849lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7850{
da0436e9 7851 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7852 uint32_t if_type, rc = 0;
da0436e9
JS
7853 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7854 HOST_ENDIAN_HIGH_WORD1};
3772a991 7855
2fcee4bf
JS
7856 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7857 switch (if_type) {
7858 case LPFC_SLI_INTF_IF_TYPE_0:
7859 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7860 GFP_KERNEL);
7861 if (!mboxq) {
7862 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7863 "0492 Unable to allocate memory for "
7864 "issuing SLI_CONFIG_SPECIAL mailbox "
7865 "command\n");
7866 return -ENOMEM;
7867 }
3772a991 7868
2fcee4bf
JS
7869 /*
7870 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7871 * two words to contain special data values and no other data.
7872 */
7873 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7874 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7875 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7876 if (rc != MBX_SUCCESS) {
7877 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7878 "0493 SLI_CONFIG_SPECIAL mailbox "
7879 "failed with status x%x\n",
7880 rc);
7881 rc = -EIO;
7882 }
7883 mempool_free(mboxq, phba->mbox_mem_pool);
7884 break;
7885 case LPFC_SLI_INTF_IF_TYPE_2:
7886 case LPFC_SLI_INTF_IF_TYPE_1:
7887 default:
7888 break;
da0436e9 7889 }
da0436e9 7890 return rc;
3772a991
JS
7891}
7892
7893/**
895427bd 7894 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS
7895 * @phba: pointer to lpfc hba data structure.
7896 *
895427bd
JS
7897 * This routine is invoked to check the user settable queue counts for EQs.
7898 * After this routine is called the counts will be set to valid values that
5350d872
JS
7899 * adhere to the constraints of the system's interrupt vectors and the port's
7900 * queue resources.
da0436e9
JS
7901 *
7902 * Return codes
af901ca1 7903 * 0 - successful
25985edc 7904 * -ENOMEM - No available memory
3772a991 7905 **/
da0436e9 7906static int
5350d872 7907lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7908{
895427bd 7909 int io_channel;
1ba981fd 7910 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7911
da0436e9 7912 /*
67d12733 7913 * Sanity check for configured queue parameters against the run-time
da0436e9
JS
7914 * device parameters
7915 */
3772a991 7916
67d12733 7917 /* Sanity check on HBA EQ parameters */
895427bd 7918 io_channel = phba->io_channel_irqs;
67d12733 7919
895427bd 7920 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS
7921 lpfc_printf_log(phba,
7922 KERN_ERR, LOG_INIT,
90695ee0 7923 "3188 Reducing IO channels to match number of "
7bb03bbf 7924 "online CPUs: from %d to %d\n",
895427bd
JS
7925 io_channel, phba->sli4_hba.num_online_cpu);
7926 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS
7927 }
7928
895427bd 7929 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS
7930 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7931 "2575 Reducing IO channels to match number of "
7932 "available EQs: from %d to %d\n",
895427bd 7933 io_channel,
82c3e9ba 7934 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7935 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7936 }
67d12733 7937
895427bd
JS
7938 /* The actual number of FCP / NVME event queues adopted */
7939 if (io_channel != phba->io_channel_irqs)
7940 phba->io_channel_irqs = io_channel;
7941 if (phba->cfg_fcp_io_channel > io_channel)
7942 phba->cfg_fcp_io_channel = io_channel;
7943 if (phba->cfg_nvme_io_channel > io_channel)
7944 phba->cfg_nvme_io_channel = io_channel;
0eeaf17f
JS
7945 if (phba->nvmet_support) {
7946 if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq)
7947 phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
7948 }
7949 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
7950 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
895427bd
JS
7951
7952 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2d7dbc4c 7953 "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n",
895427bd 7954 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
2d7dbc4c 7955 phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq);
3772a991 7956
da0436e9
JS
7957 /* Get EQ depth from module parameter, fake the default for now */
7958 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7959 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7960
5350d872
JS
7961 /* Get CQ depth from module parameter, fake the default for now */
7962 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7963 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS
7964 return 0;
7965}
7966
7967static int
7968lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7969{
7970 struct lpfc_queue *qdesc;
5350d872 7971
7fdcdd24
JS
7972 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_NVME_PAGE_SIZE,
7973 phba->sli4_hba.cq_esize,
7974 LPFC_NVME_CQSIZE);
895427bd
JS
7975 if (!qdesc) {
7976 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7977 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7978 wqidx);
7979 return 1;
7980 }
7981 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
7982
7fdcdd24
JS
7983 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_NVME_PAGE_SIZE,
7984 LPFC_WQE128_SIZE, LPFC_NVME_WQSIZE);
895427bd
JS
7985 if (!qdesc) {
7986 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7987 "0509 Failed allocate fast-path NVME WQ (%d)\n",
7988 wqidx);
7989 return 1;
7990 }
7991 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
7992 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7993 return 0;
7994}
7995
7996static int
7997lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
7998{
7999 struct lpfc_queue *qdesc;
8000 uint32_t wqesize;
8001
8002 /* Create Fast Path FCP CQs */
7fdcdd24
JS
8003 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8004 phba->sli4_hba.cq_esize,
8005 phba->sli4_hba.cq_ecount);
895427bd
JS
8006 if (!qdesc) {
8007 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8008 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
8009 return 1;
8010 }
8011 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
8012
8013 /* Create Fast Path FCP WQs */
8014 wqesize = (phba->fcp_embed_io) ?
d1f525aa 8015 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
7fdcdd24
JS
8016 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8017 wqesize, phba->sli4_hba.wq_ecount);
895427bd
JS
8018 if (!qdesc) {
8019 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8020 "0503 Failed allocate fast-path FCP WQ (%d)\n",
8021 wqidx);
8022 return 1;
8023 }
8024 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
8025 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 8026 return 0;
5350d872
JS
8027}
8028
8029/**
8030 * lpfc_sli4_queue_create - Create all the SLI4 queues
8031 * @phba: pointer to lpfc hba data structure.
8032 *
8033 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
8034 * operation. For each SLI4 queue type, the parameters such as queue entry
8035 * count (queue depth) shall be taken from the module parameter. For now,
8036 * we just use some constant number as place holder.
8037 *
8038 * Return codes
4907cb7b 8039 * 0 - successful
5350d872
JS
8040 * -ENOMEM - No availble memory
8041 * -EIO - The mailbox failed to complete successfully.
8042 **/
8043int
8044lpfc_sli4_queue_create(struct lpfc_hba *phba)
8045{
8046 struct lpfc_queue *qdesc;
d1f525aa 8047 int idx, io_channel;
5350d872
JS
8048
8049 /*
67d12733 8050 * Create HBA Record arrays.
895427bd 8051 * Both NVME and FCP will share that same vectors / EQs
5350d872 8052 */
895427bd
JS
8053 io_channel = phba->io_channel_irqs;
8054 if (!io_channel)
67d12733 8055 return -ERANGE;
5350d872 8056
67d12733
JS
8057 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
8058 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
8059 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
8060 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
8061 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
8062 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS
8063 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8064 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
8065 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8066 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 8067
895427bd
JS
8068 phba->sli4_hba.hba_eq = kcalloc(io_channel,
8069 sizeof(struct lpfc_queue *),
8070 GFP_KERNEL);
67d12733
JS
8071 if (!phba->sli4_hba.hba_eq) {
8072 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8073 "2576 Failed allocate memory for "
8074 "fast-path EQ record array\n");
8075 goto out_error;
8076 }
8077
895427bd
JS
8078 if (phba->cfg_fcp_io_channel) {
8079 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
8080 sizeof(struct lpfc_queue *),
8081 GFP_KERNEL);
8082 if (!phba->sli4_hba.fcp_cq) {
8083 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8084 "2577 Failed allocate memory for "
8085 "fast-path CQ record array\n");
8086 goto out_error;
8087 }
8088 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
8089 sizeof(struct lpfc_queue *),
8090 GFP_KERNEL);
8091 if (!phba->sli4_hba.fcp_wq) {
8092 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8093 "2578 Failed allocate memory for "
8094 "fast-path FCP WQ record array\n");
8095 goto out_error;
8096 }
8097 /*
8098 * Since the first EQ can have multiple CQs associated with it,
8099 * this array is used to quickly see if we have a FCP fast-path
8100 * CQ match.
8101 */
8102 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
8103 sizeof(uint16_t),
8104 GFP_KERNEL);
8105 if (!phba->sli4_hba.fcp_cq_map) {
8106 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8107 "2545 Failed allocate memory for "
8108 "fast-path CQ map\n");
8109 goto out_error;
8110 }
67d12733
JS
8111 }
8112
895427bd
JS
8113 if (phba->cfg_nvme_io_channel) {
8114 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
8115 sizeof(struct lpfc_queue *),
8116 GFP_KERNEL);
8117 if (!phba->sli4_hba.nvme_cq) {
8118 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8119 "6077 Failed allocate memory for "
8120 "fast-path CQ record array\n");
8121 goto out_error;
8122 }
da0436e9 8123
895427bd
JS
8124 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
8125 sizeof(struct lpfc_queue *),
8126 GFP_KERNEL);
8127 if (!phba->sli4_hba.nvme_wq) {
8128 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8129 "2581 Failed allocate memory for "
8130 "fast-path NVME WQ record array\n");
8131 goto out_error;
8132 }
8133
8134 /*
8135 * Since the first EQ can have multiple CQs associated with it,
8136 * this array is used to quickly see if we have a NVME fast-path
8137 * CQ match.
8138 */
8139 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
8140 sizeof(uint16_t),
8141 GFP_KERNEL);
8142 if (!phba->sli4_hba.nvme_cq_map) {
8143 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8144 "6078 Failed allocate memory for "
8145 "fast-path CQ map\n");
8146 goto out_error;
8147 }
2d7dbc4c
JS
8148
8149 if (phba->nvmet_support) {
8150 phba->sli4_hba.nvmet_cqset = kcalloc(
8151 phba->cfg_nvmet_mrq,
8152 sizeof(struct lpfc_queue *),
8153 GFP_KERNEL);
8154 if (!phba->sli4_hba.nvmet_cqset) {
8155 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8156 "3121 Fail allocate memory for "
8157 "fast-path CQ set array\n");
8158 goto out_error;
8159 }
8160 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
8161 phba->cfg_nvmet_mrq,
8162 sizeof(struct lpfc_queue *),
8163 GFP_KERNEL);
8164 if (!phba->sli4_hba.nvmet_mrq_hdr) {
8165 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8166 "3122 Fail allocate memory for "
8167 "fast-path RQ set hdr array\n");
8168 goto out_error;
8169 }
8170 phba->sli4_hba.nvmet_mrq_data = kcalloc(
8171 phba->cfg_nvmet_mrq,
8172 sizeof(struct lpfc_queue *),
8173 GFP_KERNEL);
8174 if (!phba->sli4_hba.nvmet_mrq_data) {
8175 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8176 "3124 Fail allocate memory for "
8177 "fast-path RQ set data array\n");
8178 goto out_error;
8179 }
8180 }
da0436e9 8181 }
67d12733 8182
895427bd 8183 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 8184
895427bd
JS
8185 /* Create HBA Event Queues (EQs) */
8186 for (idx = 0; idx < io_channel; idx++) {
67d12733 8187 /* Create EQs */
7fdcdd24
JS
8188 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8189 phba->sli4_hba.eq_esize,
da0436e9
JS
8190 phba->sli4_hba.eq_ecount);
8191 if (!qdesc) {
8192 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS
8193 "0497 Failed allocate EQ (%d)\n", idx);
8194 goto out_error;
da0436e9 8195 }
67d12733 8196 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 8197 }
67d12733 8198
895427bd 8199 /* FCP and NVME io channels are not required to be balanced */
67d12733 8200
895427bd
JS
8201 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
8202 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 8203 goto out_error;
da0436e9 8204
895427bd
JS
8205 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
8206 if (lpfc_alloc_nvme_wq_cq(phba, idx))
8207 goto out_error;
67d12733 8208
2d7dbc4c
JS
8209 if (phba->nvmet_support) {
8210 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8211 qdesc = lpfc_sli4_queue_alloc(phba,
7fdcdd24
JS
8212 LPFC_DEFAULT_PAGE_SIZE,
8213 phba->sli4_hba.cq_esize,
8214 phba->sli4_hba.cq_ecount);
2d7dbc4c
JS
8215 if (!qdesc) {
8216 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8217 "3142 Failed allocate NVME "
8218 "CQ Set (%d)\n", idx);
8219 goto out_error;
8220 }
8221 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
8222 }
8223 }
8224
da0436e9 8225 /*
67d12733 8226 * Create Slow Path Completion Queues (CQs)
da0436e9
JS
8227 */
8228
da0436e9 8229 /* Create slow-path Mailbox Command Complete Queue */
7fdcdd24
JS
8230 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8231 phba->sli4_hba.cq_esize,
da0436e9
JS
8232 phba->sli4_hba.cq_ecount);
8233 if (!qdesc) {
8234 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8235 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 8236 goto out_error;
da0436e9
JS
8237 }
8238 phba->sli4_hba.mbx_cq = qdesc;
8239
8240 /* Create slow-path ELS Complete Queue */
7fdcdd24
JS
8241 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8242 phba->sli4_hba.cq_esize,
da0436e9
JS
8243 phba->sli4_hba.cq_ecount);
8244 if (!qdesc) {
8245 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8246 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 8247 goto out_error;
da0436e9
JS
8248 }
8249 phba->sli4_hba.els_cq = qdesc;
8250
da0436e9 8251
5350d872 8252 /*
67d12733 8253 * Create Slow Path Work Queues (WQs)
5350d872 8254 */
da0436e9
JS
8255
8256 /* Create Mailbox Command Queue */
da0436e9 8257
7fdcdd24
JS
8258 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8259 phba->sli4_hba.mq_esize,
da0436e9
JS
8260 phba->sli4_hba.mq_ecount);
8261 if (!qdesc) {
8262 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8263 "0505 Failed allocate slow-path MQ\n");
67d12733 8264 goto out_error;
da0436e9
JS
8265 }
8266 phba->sli4_hba.mbx_wq = qdesc;
8267
8268 /*
67d12733 8269 * Create ELS Work Queues
da0436e9 8270 */
da0436e9
JS
8271
8272 /* Create slow-path ELS Work Queue */
7fdcdd24
JS
8273 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8274 phba->sli4_hba.wq_esize,
da0436e9
JS
8275 phba->sli4_hba.wq_ecount);
8276 if (!qdesc) {
8277 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8278 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8279 goto out_error;
da0436e9
JS
8280 }
8281 phba->sli4_hba.els_wq = qdesc;
895427bd
JS
8282 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8283
8284 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8285 /* Create NVME LS Complete Queue */
7fdcdd24
JS
8286 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8287 phba->sli4_hba.cq_esize,
895427bd
JS
8288 phba->sli4_hba.cq_ecount);
8289 if (!qdesc) {
8290 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8291 "6079 Failed allocate NVME LS CQ\n");
8292 goto out_error;
8293 }
8294 phba->sli4_hba.nvmels_cq = qdesc;
8295
8296 /* Create NVME LS Work Queue */
7fdcdd24
JS
8297 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8298 phba->sli4_hba.wq_esize,
895427bd
JS
8299 phba->sli4_hba.wq_ecount);
8300 if (!qdesc) {
8301 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8302 "6080 Failed allocate NVME LS WQ\n");
8303 goto out_error;
8304 }
8305 phba->sli4_hba.nvmels_wq = qdesc;
8306 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8307 }
da0436e9 8308
da0436e9
JS
8309 /*
8310 * Create Receive Queue (RQ)
8311 */
da0436e9
JS
8312
8313 /* Create Receive Queue for header */
7fdcdd24
JS
8314 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8315 phba->sli4_hba.rq_esize,
da0436e9
JS
8316 phba->sli4_hba.rq_ecount);
8317 if (!qdesc) {
8318 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8319 "0506 Failed allocate receive HRQ\n");
67d12733 8320 goto out_error;
da0436e9
JS
8321 }
8322 phba->sli4_hba.hdr_rq = qdesc;
8323
8324 /* Create Receive Queue for data */
7fdcdd24
JS
8325 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8326 phba->sli4_hba.rq_esize,
da0436e9
JS
8327 phba->sli4_hba.rq_ecount);
8328 if (!qdesc) {
8329 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8330 "0507 Failed allocate receive DRQ\n");
67d12733 8331 goto out_error;
da0436e9
JS
8332 }
8333 phba->sli4_hba.dat_rq = qdesc;
8334
2d7dbc4c
JS
8335 if (phba->nvmet_support) {
8336 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8337 /* Create NVMET Receive Queue for header */
8338 qdesc = lpfc_sli4_queue_alloc(phba,
7fdcdd24 8339 LPFC_DEFAULT_PAGE_SIZE,
2d7dbc4c 8340 phba->sli4_hba.rq_esize,
61f3d4bf 8341 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS
8342 if (!qdesc) {
8343 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8344 "3146 Failed allocate "
8345 "receive HRQ\n");
8346 goto out_error;
8347 }
8348 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
8349
8350 /* Only needed for header of RQ pair */
8351 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
8352 GFP_KERNEL);
8353 if (qdesc->rqbp == NULL) {
8354 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8355 "6131 Failed allocate "
8356 "Header RQBP\n");
8357 goto out_error;
8358 }
8359
4b40d02b
DK
8360 /* Put list in known state in case driver load fails. */
8361 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
8362
2d7dbc4c
JS
8363 /* Create NVMET Receive Queue for data */
8364 qdesc = lpfc_sli4_queue_alloc(phba,
7fdcdd24 8365 LPFC_DEFAULT_PAGE_SIZE,
2d7dbc4c 8366 phba->sli4_hba.rq_esize,
61f3d4bf 8367 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS
8368 if (!qdesc) {
8369 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8370 "3156 Failed allocate "
8371 "receive DRQ\n");
8372 goto out_error;
8373 }
8374 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
8375 }
8376 }
8377
1ba981fd
JS
8378 /* Create the Queues needed for Flash Optimized Fabric operations */
8379 if (phba->cfg_fof)
8380 lpfc_fof_queue_create(phba);
da0436e9
JS
8381 return 0;
8382
da0436e9 8383out_error:
67d12733 8384 lpfc_sli4_queue_destroy(phba);
da0436e9
JS
8385 return -ENOMEM;
8386}
8387
895427bd
JS
8388static inline void
8389__lpfc_sli4_release_queue(struct lpfc_queue **qp)
8390{
8391 if (*qp != NULL) {
8392 lpfc_sli4_queue_free(*qp);
8393 *qp = NULL;
8394 }
8395}
8396
8397static inline void
8398lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
8399{
8400 int idx;
8401
8402 if (*qs == NULL)
8403 return;
8404
8405 for (idx = 0; idx < max; idx++)
8406 __lpfc_sli4_release_queue(&(*qs)[idx]);
8407
8408 kfree(*qs);
8409 *qs = NULL;
8410}
8411
8412static inline void
8413lpfc_sli4_release_queue_map(uint16_t **qmap)
8414{
8415 if (*qmap != NULL) {
8416 kfree(*qmap);
8417 *qmap = NULL;
8418 }
8419}
8420
da0436e9
JS
8421/**
8422 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
8423 * @phba: pointer to lpfc hba data structure.
8424 *
8425 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
8426 * operation.
8427 *
8428 * Return codes
af901ca1 8429 * 0 - successful
25985edc 8430 * -ENOMEM - No available memory
d439d286 8431 * -EIO - The mailbox failed to complete successfully.
da0436e9 8432 **/
5350d872 8433void
da0436e9
JS
8434lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
8435{
1ba981fd
JS
8436 if (phba->cfg_fof)
8437 lpfc_fof_queue_destroy(phba);
8438
895427bd
JS
8439 /* Release HBA eqs */
8440 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
8441
8442 /* Release FCP cqs */
8443 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
d1f525aa 8444 phba->cfg_fcp_io_channel);
895427bd
JS
8445
8446 /* Release FCP wqs */
8447 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
d1f525aa 8448 phba->cfg_fcp_io_channel);
895427bd
JS
8449
8450 /* Release FCP CQ mapping array */
8451 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
8452
8453 /* Release NVME cqs */
8454 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
8455 phba->cfg_nvme_io_channel);
8456
8457 /* Release NVME wqs */
8458 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
8459 phba->cfg_nvme_io_channel);
8460
8461 /* Release NVME CQ mapping array */
8462 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
8463
0eeaf17f
JS
8464 if (phba->nvmet_support) {
8465 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
8466 phba->cfg_nvmet_mrq);
2d7dbc4c 8467
0eeaf17f
JS
8468 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
8469 phba->cfg_nvmet_mrq);
8470 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
8471 phba->cfg_nvmet_mrq);
8472 }
2d7dbc4c 8473
895427bd
JS
8474 /* Release mailbox command work queue */
8475 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
8476
8477 /* Release ELS work queue */
8478 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
8479
8480 /* Release ELS work queue */
8481 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
8482
8483 /* Release unsolicited receive queue */
8484 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
8485 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
8486
8487 /* Release ELS complete queue */
8488 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
8489
8490 /* Release NVME LS complete queue */
8491 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
8492
8493 /* Release mailbox command complete queue */
8494 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
8495
8496 /* Everything on this list has been freed */
8497 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8498}
8499
895427bd
JS
8500int
8501lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
8502{
8503 struct lpfc_rqb *rqbp;
8504 struct lpfc_dmabuf *h_buf;
8505 struct rqb_dmabuf *rqb_buffer;
8506
8507 rqbp = rq->rqbp;
8508 while (!list_empty(&rqbp->rqb_buffer_list)) {
8509 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
8510 struct lpfc_dmabuf, list);
8511
8512 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
8513 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8514 rqbp->buffer_count--;
67d12733 8515 }
895427bd
JS
8516 return 1;
8517}
67d12733 8518
895427bd
JS
8519static int
8520lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
8521 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
8522 int qidx, uint32_t qtype)
8523{
8524 struct lpfc_sli_ring *pring;
8525 int rc;
8526
8527 if (!eq || !cq || !wq) {
8528 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8529 "6085 Fast-path %s (%d) not allocated\n",
8530 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
8531 return -ENOMEM;
8532 }
8533
8534 /* create the Cq first */
8535 rc = lpfc_cq_create(phba, cq, eq,
8536 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
8537 if (rc) {
8538 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8539 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
8540 qidx, (uint32_t)rc);
8541 return rc;
67d12733 8542 }
7fdcdd24 8543 cq->chann = qidx;
67d12733 8544
895427bd
JS
8545 if (qtype != LPFC_MBOX) {
8546 /* Setup nvme_cq_map for fast lookup */
8547 if (cq_map)
8548 *cq_map = cq->queue_id;
da0436e9 8549
895427bd
JS
8550 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8551 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8552 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8553
895427bd
JS
8554 /* create the wq */
8555 rc = lpfc_wq_create(phba, wq, cq, qtype);
8556 if (rc) {
8557 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8558 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8559 qidx, (uint32_t)rc);
8560 /* no need to tear down cq - caller will do so */
8561 return rc;
8562 }
7fdcdd24 8563 wq->chann = qidx;
da0436e9 8564
895427bd
JS
8565 /* Bind this CQ/WQ to the NVME ring */
8566 pring = wq->pring;
8567 pring->sli.sli4.wqp = (void *)wq;
8568 cq->pring = pring;
da0436e9 8569
895427bd
JS
8570 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8571 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8572 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8573 } else {
8574 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8575 if (rc) {
8576 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8577 "0539 Failed setup of slow-path MQ: "
8578 "rc = 0x%x\n", rc);
8579 /* no need to tear down cq - caller will do so */
8580 return rc;
8581 }
da0436e9 8582
895427bd
JS
8583 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8584 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8585 phba->sli4_hba.mbx_wq->queue_id,
8586 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8587 }
da0436e9 8588
895427bd 8589 return 0;
da0436e9
JS
8590}
8591
8592/**
8593 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8594 * @phba: pointer to lpfc hba data structure.
8595 *
8596 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8597 * operation.
8598 *
8599 * Return codes
af901ca1 8600 * 0 - successful
25985edc 8601 * -ENOMEM - No available memory
d439d286 8602 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8603 **/
8604int
8605lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8606{
962bc51b
JS
8607 uint32_t shdr_status, shdr_add_status;
8608 union lpfc_sli4_cfg_shdr *shdr;
8609 LPFC_MBOXQ_t *mboxq;
895427bd
JS
8610 int qidx;
8611 uint32_t length, io_channel;
8612 int rc = -ENOMEM;
962bc51b
JS
8613
8614 /* Check for dual-ULP support */
8615 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8616 if (!mboxq) {
8617 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8618 "3249 Unable to allocate memory for "
8619 "QUERY_FW_CFG mailbox command\n");
8620 return -ENOMEM;
8621 }
8622 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8623 sizeof(struct lpfc_sli4_cfg_mhdr));
8624 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8625 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8626 length, LPFC_SLI4_MBX_EMBED);
8627
8628 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8629
8630 shdr = (union lpfc_sli4_cfg_shdr *)
8631 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8632 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8633 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8634 if (shdr_status || shdr_add_status || rc) {
8635 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8636 "3250 QUERY_FW_CFG mailbox failed with status "
8637 "x%x add_status x%x, mbx status x%x\n",
8638 shdr_status, shdr_add_status, rc);
8639 if (rc != MBX_TIMEOUT)
8640 mempool_free(mboxq, phba->mbox_mem_pool);
8641 rc = -ENXIO;
8642 goto out_error;
8643 }
8644
8645 phba->sli4_hba.fw_func_mode =
8646 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8647 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8648 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS
8649 phba->sli4_hba.physical_port =
8650 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS
8651 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8652 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8653 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8654 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8655
8656 if (rc != MBX_TIMEOUT)
8657 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS
8658
8659 /*
67d12733 8660 * Set up HBA Event Queues (EQs)
da0436e9 8661 */
895427bd 8662 io_channel = phba->io_channel_irqs;
da0436e9 8663
67d12733 8664 /* Set up HBA event queue */
895427bd 8665 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS
8666 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8667 "3147 Fast-path EQs not allocated\n");
1b51197d 8668 rc = -ENOMEM;
67d12733 8669 goto out_error;
2e90f4b5 8670 }
895427bd
JS
8671 for (qidx = 0; qidx < io_channel; qidx++) {
8672 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS
8673 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8674 "0522 Fast-path EQ (%d) not "
895427bd 8675 "allocated\n", qidx);
1b51197d 8676 rc = -ENOMEM;
895427bd 8677 goto out_destroy;
da0436e9 8678 }
895427bd
JS
8679 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8680 phba->cfg_fcp_imax);
da0436e9
JS
8681 if (rc) {
8682 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8683 "0523 Failed setup of fast-path EQ "
895427bd 8684 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8685 (uint32_t)rc);
895427bd 8686 goto out_destroy;
da0436e9
JS
8687 }
8688 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS
8689 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8690 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS
8691 }
8692
895427bd
JS
8693 if (phba->cfg_nvme_io_channel) {
8694 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8695 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8696 "6084 Fast-path NVME %s array not allocated\n",
8697 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8698 rc = -ENOMEM;
895427bd 8699 goto out_destroy;
67d12733
JS
8700 }
8701
895427bd
JS
8702 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8703 rc = lpfc_create_wq_cq(phba,
8704 phba->sli4_hba.hba_eq[
8705 qidx % io_channel],
8706 phba->sli4_hba.nvme_cq[qidx],
8707 phba->sli4_hba.nvme_wq[qidx],
8708 &phba->sli4_hba.nvme_cq_map[qidx],
8709 qidx, LPFC_NVME);
8710 if (rc) {
8711 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8712 "6123 Failed to setup fastpath "
8713 "NVME WQ/CQ (%d), rc = 0x%x\n",
8714 qidx, (uint32_t)rc);
8715 goto out_destroy;
8716 }
8717 }
67d12733
JS
8718 }
8719
895427bd
JS
8720 if (phba->cfg_fcp_io_channel) {
8721 /* Set up fast-path FCP Response Complete Queue */
8722 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8723 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8724 "3148 Fast-path FCP %s array not allocated\n",
8725 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8726 rc = -ENOMEM;
895427bd 8727 goto out_destroy;
67d12733
JS
8728 }
8729
895427bd
JS
8730 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8731 rc = lpfc_create_wq_cq(phba,
8732 phba->sli4_hba.hba_eq[
8733 qidx % io_channel],
8734 phba->sli4_hba.fcp_cq[qidx],
8735 phba->sli4_hba.fcp_wq[qidx],
8736 &phba->sli4_hba.fcp_cq_map[qidx],
8737 qidx, LPFC_FCP);
8738 if (rc) {
8739 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8740 "0535 Failed to setup fastpath "
8741 "FCP WQ/CQ (%d), rc = 0x%x\n",
8742 qidx, (uint32_t)rc);
8743 goto out_destroy;
8744 }
8745 }
67d12733 8746 }
895427bd 8747
da0436e9 8748 /*
895427bd 8749 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS
8750 */
8751
895427bd 8752 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8753
895427bd 8754 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8755 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8756 "0528 %s not allocated\n",
8757 phba->sli4_hba.mbx_cq ?
d1f525aa 8758 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8759 rc = -ENOMEM;
895427bd 8760 goto out_destroy;
da0436e9 8761 }
da0436e9 8762
895427bd 8763 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
d1f525aa
JS
8764 phba->sli4_hba.mbx_cq,
8765 phba->sli4_hba.mbx_wq,
8766 NULL, 0, LPFC_MBOX);
da0436e9
JS
8767 if (rc) {
8768 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8769 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8770 (uint32_t)rc);
8771 goto out_destroy;
da0436e9 8772 }
2d7dbc4c
JS
8773 if (phba->nvmet_support) {
8774 if (!phba->sli4_hba.nvmet_cqset) {
8775 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8776 "3165 Fast-path NVME CQ Set "
8777 "array not allocated\n");
8778 rc = -ENOMEM;
8779 goto out_destroy;
8780 }
8781 if (phba->cfg_nvmet_mrq > 1) {
8782 rc = lpfc_cq_create_set(phba,
8783 phba->sli4_hba.nvmet_cqset,
8784 phba->sli4_hba.hba_eq,
8785 LPFC_WCQ, LPFC_NVMET);
8786 if (rc) {
8787 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8788 "3164 Failed setup of NVME CQ "
8789 "Set, rc = 0x%x\n",
8790 (uint32_t)rc);
8791 goto out_destroy;
8792 }
8793 } else {
8794 /* Set up NVMET Receive Complete Queue */
8795 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
8796 phba->sli4_hba.hba_eq[0],
8797 LPFC_WCQ, LPFC_NVMET);
8798 if (rc) {
8799 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8800 "6089 Failed setup NVMET CQ: "
8801 "rc = 0x%x\n", (uint32_t)rc);
8802 goto out_destroy;
8803 }
7fdcdd24
JS
8804 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
8805
2d7dbc4c
JS
8806 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8807 "6090 NVMET CQ setup: cq-id=%d, "
8808 "parent eq-id=%d\n",
8809 phba->sli4_hba.nvmet_cqset[0]->queue_id,
8810 phba->sli4_hba.hba_eq[0]->queue_id);
8811 }
8812 }
da0436e9 8813
895427bd
JS
8814 /* Set up slow-path ELS WQ/CQ */
8815 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8816 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8817 "0530 ELS %s not allocated\n",
8818 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8819 rc = -ENOMEM;
895427bd 8820 goto out_destroy;
da0436e9 8821 }
895427bd
JS
8822 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8823 phba->sli4_hba.els_cq,
8824 phba->sli4_hba.els_wq,
8825 NULL, 0, LPFC_ELS);
da0436e9
JS
8826 if (rc) {
8827 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8828 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8829 (uint32_t)rc);
8830 goto out_destroy;
da0436e9
JS
8831 }
8832 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8833 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8834 phba->sli4_hba.els_wq->queue_id,
8835 phba->sli4_hba.els_cq->queue_id);
8836
895427bd
JS
8837 if (phba->cfg_nvme_io_channel) {
8838 /* Set up NVME LS Complete Queue */
8839 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8840 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8841 "6091 LS %s not allocated\n",
8842 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8843 rc = -ENOMEM;
8844 goto out_destroy;
8845 }
8846 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8847 phba->sli4_hba.nvmels_cq,
8848 phba->sli4_hba.nvmels_wq,
8849 NULL, 0, LPFC_NVME_LS);
8850 if (rc) {
8851 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8852 "0529 Failed setup of NVVME LS WQ/CQ: "
8853 "rc = 0x%x\n", (uint32_t)rc);
8854 goto out_destroy;
8855 }
8856
8857 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8858 "6096 ELS WQ setup: wq-id=%d, "
8859 "parent cq-id=%d\n",
8860 phba->sli4_hba.nvmels_wq->queue_id,
8861 phba->sli4_hba.nvmels_cq->queue_id);
8862 }
8863
2d7dbc4c
JS
8864 /*
8865 * Create NVMET Receive Queue (RQ)
8866 */
8867 if (phba->nvmet_support) {
8868 if ((!phba->sli4_hba.nvmet_cqset) ||
8869 (!phba->sli4_hba.nvmet_mrq_hdr) ||
8870 (!phba->sli4_hba.nvmet_mrq_data)) {
8871 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8872 "6130 MRQ CQ Queues not "
8873 "allocated\n");
8874 rc = -ENOMEM;
8875 goto out_destroy;
8876 }
8877 if (phba->cfg_nvmet_mrq > 1) {
8878 rc = lpfc_mrq_create(phba,
8879 phba->sli4_hba.nvmet_mrq_hdr,
8880 phba->sli4_hba.nvmet_mrq_data,
8881 phba->sli4_hba.nvmet_cqset,
8882 LPFC_NVMET);
8883 if (rc) {
8884 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8885 "6098 Failed setup of NVMET "
8886 "MRQ: rc = 0x%x\n",
8887 (uint32_t)rc);
8888 goto out_destroy;
8889 }
8890
8891 } else {
8892 rc = lpfc_rq_create(phba,
8893 phba->sli4_hba.nvmet_mrq_hdr[0],
8894 phba->sli4_hba.nvmet_mrq_data[0],
8895 phba->sli4_hba.nvmet_cqset[0],
8896 LPFC_NVMET);
8897 if (rc) {
8898 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8899 "6057 Failed setup of NVMET "
8900 "Receive Queue: rc = 0x%x\n",
8901 (uint32_t)rc);
8902 goto out_destroy;
8903 }
8904
8905 lpfc_printf_log(
8906 phba, KERN_INFO, LOG_INIT,
8907 "6099 NVMET RQ setup: hdr-rq-id=%d, "
8908 "dat-rq-id=%d parent cq-id=%d\n",
8909 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
8910 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
8911 phba->sli4_hba.nvmet_cqset[0]->queue_id);
8912
8913 }
8914 }
8915
da0436e9
JS
8916 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8917 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8918 "0540 Receive Queue not allocated\n");
1b51197d 8919 rc = -ENOMEM;
895427bd 8920 goto out_destroy;
da0436e9 8921 }
73d91e50 8922
da0436e9 8923 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8924 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS
8925 if (rc) {
8926 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8927 "0541 Failed setup of Receive Queue: "
a2fc4aef 8928 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8929 goto out_destroy;
da0436e9 8930 }
73d91e50 8931
da0436e9
JS
8932 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8933 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8934 "parent cq-id=%d\n",
8935 phba->sli4_hba.hdr_rq->queue_id,
8936 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8937 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS
8938
8939 if (phba->cfg_fof) {
8940 rc = lpfc_fof_queue_setup(phba);
8941 if (rc) {
8942 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8943 "0549 Failed setup of FOF Queues: "
8944 "rc = 0x%x\n", rc);
895427bd 8945 goto out_destroy;
1ba981fd
JS
8946 }
8947 }
2c9c5a00 8948
43140ca6 8949 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
0cf07f84
JS
8950 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
8951 phba->cfg_fcp_imax);
43140ca6 8952
da0436e9
JS
8953 return 0;
8954
895427bd
JS
8955out_destroy:
8956 lpfc_sli4_queue_unset(phba);
da0436e9
JS
8957out_error:
8958 return rc;
8959}
8960
8961/**
8962 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8963 * @phba: pointer to lpfc hba data structure.
8964 *
8965 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8966 * operation.
8967 *
8968 * Return codes
af901ca1 8969 * 0 - successful
25985edc 8970 * -ENOMEM - No available memory
d439d286 8971 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8972 **/
8973void
8974lpfc_sli4_queue_unset(struct lpfc_hba *phba)
8975{
895427bd 8976 int qidx;
da0436e9 8977
1ba981fd
JS
8978 /* Unset the queues created for Flash Optimized Fabric operations */
8979 if (phba->cfg_fof)
8980 lpfc_fof_queue_destroy(phba);
895427bd 8981
da0436e9 8982 /* Unset mailbox command work queue */
895427bd
JS
8983 if (phba->sli4_hba.mbx_wq)
8984 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
8985
8986 /* Unset NVME LS work queue */
8987 if (phba->sli4_hba.nvmels_wq)
8988 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
8989
da0436e9 8990 /* Unset ELS work queue */
019c0d66 8991 if (phba->sli4_hba.els_wq)
895427bd
JS
8992 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
8993
da0436e9 8994 /* Unset unsolicited receive queue */
895427bd
JS
8995 if (phba->sli4_hba.hdr_rq)
8996 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
8997 phba->sli4_hba.dat_rq);
8998
da0436e9 8999 /* Unset FCP work queue */
895427bd
JS
9000 if (phba->sli4_hba.fcp_wq)
9001 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
9002 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
9003
9004 /* Unset NVME work queue */
9005 if (phba->sli4_hba.nvme_wq) {
9006 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
9007 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 9008 }
895427bd 9009
da0436e9 9010 /* Unset mailbox command complete queue */
895427bd
JS
9011 if (phba->sli4_hba.mbx_cq)
9012 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
9013
da0436e9 9014 /* Unset ELS complete queue */
895427bd
JS
9015 if (phba->sli4_hba.els_cq)
9016 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
9017
9018 /* Unset NVME LS complete queue */
9019 if (phba->sli4_hba.nvmels_cq)
9020 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
9021
9022 /* Unset NVME response complete queue */
9023 if (phba->sli4_hba.nvme_cq)
9024 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
9025 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
9026
0eeaf17f
JS
9027 if (phba->nvmet_support) {
9028 /* Unset NVMET MRQ queue */
9029 if (phba->sli4_hba.nvmet_mrq_hdr) {
9030 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
9031 lpfc_rq_destroy(
9032 phba,
2d7dbc4c
JS
9033 phba->sli4_hba.nvmet_mrq_hdr[qidx],
9034 phba->sli4_hba.nvmet_mrq_data[qidx]);
0eeaf17f 9035 }
2d7dbc4c 9036
0eeaf17f
JS
9037 /* Unset NVMET CQ Set complete queue */
9038 if (phba->sli4_hba.nvmet_cqset) {
9039 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
9040 lpfc_cq_destroy(
9041 phba, phba->sli4_hba.nvmet_cqset[qidx]);
9042 }
2d7dbc4c
JS
9043 }
9044
da0436e9 9045 /* Unset FCP response complete queue */
895427bd
JS
9046 if (phba->sli4_hba.fcp_cq)
9047 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
9048 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
9049
da0436e9 9050 /* Unset fast-path event queue */
895427bd
JS
9051 if (phba->sli4_hba.hba_eq)
9052 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
9053 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS
9054}
9055
9056/**
9057 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
9058 * @phba: pointer to lpfc hba data structure.
9059 *
9060 * This routine is invoked to allocate and set up a pool of completion queue
9061 * events. The body of the completion queue event is a completion queue entry
9062 * CQE. For now, this pool is used for the interrupt service routine to queue
9063 * the following HBA completion queue events for the worker thread to process:
9064 * - Mailbox asynchronous events
9065 * - Receive queue completion unsolicited events
9066 * Later, this can be used for all the slow-path events.
9067 *
9068 * Return codes
af901ca1 9069 * 0 - successful
25985edc 9070 * -ENOMEM - No available memory
da0436e9
JS
9071 **/
9072static int
9073lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
9074{
9075 struct lpfc_cq_event *cq_event;
9076 int i;
9077
9078 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
9079 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
9080 if (!cq_event)
9081 goto out_pool_create_fail;
9082 list_add_tail(&cq_event->list,
9083 &phba->sli4_hba.sp_cqe_event_pool);
9084 }
9085 return 0;
9086
9087out_pool_create_fail:
9088 lpfc_sli4_cq_event_pool_destroy(phba);
9089 return -ENOMEM;
9090}
9091
9092/**
9093 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
9094 * @phba: pointer to lpfc hba data structure.
9095 *
9096 * This routine is invoked to free the pool of completion queue events at
9097 * driver unload time. Note that, it is the responsibility of the driver
9098 * cleanup routine to free all the outstanding completion-queue events
9099 * allocated from this pool back into the pool before invoking this routine
9100 * to destroy the pool.
9101 **/
9102static void
9103lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
9104{
9105 struct lpfc_cq_event *cq_event, *next_cq_event;
9106
9107 list_for_each_entry_safe(cq_event, next_cq_event,
9108 &phba->sli4_hba.sp_cqe_event_pool, list) {
9109 list_del(&cq_event->list);
9110 kfree(cq_event);
9111 }
9112}
9113
9114/**
9115 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9116 * @phba: pointer to lpfc hba data structure.
9117 *
9118 * This routine is the lock free version of the API invoked to allocate a
9119 * completion-queue event from the free pool.
9120 *
9121 * Return: Pointer to the newly allocated completion-queue event if successful
9122 * NULL otherwise.
9123 **/
9124struct lpfc_cq_event *
9125__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9126{
9127 struct lpfc_cq_event *cq_event = NULL;
9128
9129 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
9130 struct lpfc_cq_event, list);
9131 return cq_event;
9132}
9133
9134/**
9135 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9136 * @phba: pointer to lpfc hba data structure.
9137 *
9138 * This routine is the lock version of the API invoked to allocate a
9139 * completion-queue event from the free pool.
9140 *
9141 * Return: Pointer to the newly allocated completion-queue event if successful
9142 * NULL otherwise.
9143 **/
9144struct lpfc_cq_event *
9145lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9146{
9147 struct lpfc_cq_event *cq_event;
9148 unsigned long iflags;
9149
9150 spin_lock_irqsave(&phba->hbalock, iflags);
9151 cq_event = __lpfc_sli4_cq_event_alloc(phba);
9152 spin_unlock_irqrestore(&phba->hbalock, iflags);
9153 return cq_event;
9154}
9155
9156/**
9157 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9158 * @phba: pointer to lpfc hba data structure.
9159 * @cq_event: pointer to the completion queue event to be freed.
9160 *
9161 * This routine is the lock free version of the API invoked to release a
9162 * completion-queue event back into the free pool.
9163 **/
9164void
9165__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9166 struct lpfc_cq_event *cq_event)
9167{
9168 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
9169}
9170
9171/**
9172 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9173 * @phba: pointer to lpfc hba data structure.
9174 * @cq_event: pointer to the completion queue event to be freed.
9175 *
9176 * This routine is the lock version of the API invoked to release a
9177 * completion-queue event back into the free pool.
9178 **/
9179void
9180lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9181 struct lpfc_cq_event *cq_event)
9182{
9183 unsigned long iflags;
9184 spin_lock_irqsave(&phba->hbalock, iflags);
9185 __lpfc_sli4_cq_event_release(phba, cq_event);
9186 spin_unlock_irqrestore(&phba->hbalock, iflags);
9187}
9188
9189/**
9190 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9191 * @phba: pointer to lpfc hba data structure.
9192 *
9193 * This routine is to free all the pending completion-queue events to the
9194 * back into the free pool for device reset.
9195 **/
9196static void
9197lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9198{
9199 LIST_HEAD(cqelist);
9200 struct lpfc_cq_event *cqe;
9201 unsigned long iflags;
9202
9203 /* Retrieve all the pending WCQEs from pending WCQE lists */
9204 spin_lock_irqsave(&phba->hbalock, iflags);
9205 /* Pending FCP XRI abort events */
9206 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9207 &cqelist);
9208 /* Pending ELS XRI abort events */
9209 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9210 &cqelist);
9211 /* Pending asynnc events */
9212 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9213 &cqelist);
9214 spin_unlock_irqrestore(&phba->hbalock, iflags);
9215
9216 while (!list_empty(&cqelist)) {
9217 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9218 lpfc_sli4_cq_event_release(phba, cqe);
9219 }
9220}
9221
9222/**
9223 * lpfc_pci_function_reset - Reset pci function.
9224 * @phba: pointer to lpfc hba data structure.
9225 *
9226 * This routine is invoked to request a PCI function reset. It will destroys
9227 * all resources assigned to the PCI function which originates this request.
9228 *
9229 * Return codes
af901ca1 9230 * 0 - successful
25985edc 9231 * -ENOMEM - No available memory
d439d286 9232 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
9233 **/
9234int
9235lpfc_pci_function_reset(struct lpfc_hba *phba)
9236{
9237 LPFC_MBOXQ_t *mboxq;
2fcee4bf 9238 uint32_t rc = 0, if_type;
da0436e9 9239 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS
9240 uint32_t rdy_chk;
9241 uint32_t port_reset = 0;
da0436e9 9242 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9243 struct lpfc_register reg_data;
2b81f942 9244 uint16_t devid;
da0436e9 9245
2fcee4bf
JS
9246 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9247 switch (if_type) {
9248 case LPFC_SLI_INTF_IF_TYPE_0:
9249 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9250 GFP_KERNEL);
9251 if (!mboxq) {
9252 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9253 "0494 Unable to allocate memory for "
9254 "issuing SLI_FUNCTION_RESET mailbox "
9255 "command\n");
9256 return -ENOMEM;
9257 }
da0436e9 9258
2fcee4bf
JS
9259 /* Setup PCI function reset mailbox-ioctl command */
9260 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9261 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9262 LPFC_SLI4_MBX_EMBED);
9263 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9264 shdr = (union lpfc_sli4_cfg_shdr *)
9265 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9266 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9267 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9268 &shdr->response);
9269 if (rc != MBX_TIMEOUT)
9270 mempool_free(mboxq, phba->mbox_mem_pool);
9271 if (shdr_status || shdr_add_status || rc) {
9272 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9273 "0495 SLI_FUNCTION_RESET mailbox "
9274 "failed with status x%x add_status x%x,"
9275 " mbx status x%x\n",
9276 shdr_status, shdr_add_status, rc);
9277 rc = -ENXIO;
9278 }
9279 break;
9280 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS
9281wait:
9282 /*
9283 * Poll the Port Status Register and wait for RDY for
9284 * up to 30 seconds. If the port doesn't respond, treat
9285 * it as an error.
9286 */
77d093fb 9287 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS
9288 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9289 STATUSregaddr, &reg_data.word0)) {
9290 rc = -ENODEV;
9291 goto out;
9292 }
9293 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9294 break;
9295 msleep(20);
9296 }
9297
9298 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9299 phba->work_status[0] = readl(
9300 phba->sli4_hba.u.if_type2.ERR1regaddr);
9301 phba->work_status[1] = readl(
9302 phba->sli4_hba.u.if_type2.ERR2regaddr);
9303 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9304 "2890 Port not ready, port status reg "
9305 "0x%x error 1=0x%x, error 2=0x%x\n",
9306 reg_data.word0,
9307 phba->work_status[0],
9308 phba->work_status[1]);
9309 rc = -ENODEV;
9310 goto out;
9311 }
9312
9313 if (!port_reset) {
9314 /*
9315 * Reset the port now
9316 */
2fcee4bf
JS
9317 reg_data.word0 = 0;
9318 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9319 LPFC_SLIPORT_LITTLE_ENDIAN);
9320 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9321 LPFC_SLIPORT_INIT_PORT);
9322 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
9323 CTRLregaddr);
8fcb8acd 9324 /* flush */
2b81f942
JS
9325 pci_read_config_word(phba->pcidev,
9326 PCI_DEVICE_ID, &devid);
2fcee4bf 9327
2f6fa2c9
JS
9328 port_reset = 1;
9329 msleep(20);
9330 goto wait;
9331 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
9332 rc = -ENODEV;
9333 goto out;
2fcee4bf
JS
9334 }
9335 break;
2f6fa2c9 9336
2fcee4bf
JS
9337 case LPFC_SLI_INTF_IF_TYPE_1:
9338 default:
9339 break;
da0436e9 9340 }
2fcee4bf 9341
73d91e50 9342out:
2fcee4bf 9343 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 9344 if (rc) {
229adb0e
JS
9345 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9346 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 9347 "try: echo fw_reset > board_mode\n");
2fcee4bf 9348 rc = -ENODEV;
229adb0e 9349 }
2fcee4bf 9350
da0436e9
JS
9351 return rc;
9352}
9353
da0436e9
JS
9354/**
9355 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
9356 * @phba: pointer to lpfc hba data structure.
9357 *
9358 * This routine is invoked to set up the PCI device memory space for device
9359 * with SLI-4 interface spec.
9360 *
9361 * Return codes
af901ca1 9362 * 0 - successful
da0436e9
JS
9363 * other values - error
9364 **/
9365static int
9366lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
9367{
9368 struct pci_dev *pdev;
9369 unsigned long bar0map_len, bar1map_len, bar2map_len;
9370 int error = -ENODEV;
2fcee4bf 9371 uint32_t if_type;
da0436e9
JS
9372
9373 /* Obtain PCI device reference */
9374 if (!phba->pcidev)
9375 return error;
9376 else
9377 pdev = phba->pcidev;
9378
9379 /* Set the device DMA mask size */
8e68597d
MR
9380 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
9381 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
9382 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
9383 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 9384 return error;
8e68597d
MR
9385 }
9386 }
da0436e9 9387
2fcee4bf
JS
9388 /*
9389 * The BARs and register set definitions and offset locations are
9390 * dependent on the if_type.
9391 */
9392 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
9393 &phba->sli4_hba.sli_intf.word0)) {
9394 return error;
9395 }
9396
9397 /* There is no SLI3 failback for SLI4 devices. */
9398 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
9399 LPFC_SLI_INTF_VALID) {
9400 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9401 "2894 SLI_INTF reg contents invalid "
9402 "sli_intf reg 0x%x\n",
9403 phba->sli4_hba.sli_intf.word0);
9404 return error;
9405 }
9406
9407 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9408 /*
9409 * Get the bus address of SLI4 device Bar regions and the
9410 * number of bytes required by each mapping. The mapping of the
9411 * particular PCI BARs regions is dependent on the type of
9412 * SLI4 device.
da0436e9 9413 */
f5ca6f2e
JS
9414 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
9415 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
9416 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS
9417
9418 /*
9419 * Map SLI4 PCI Config Space Register base to a kernel virtual
9420 * addr
9421 */
9422 phba->sli4_hba.conf_regs_memmap_p =
9423 ioremap(phba->pci_bar0_map, bar0map_len);
9424 if (!phba->sli4_hba.conf_regs_memmap_p) {
9425 dev_printk(KERN_ERR, &pdev->dev,
9426 "ioremap failed for SLI4 PCI config "
9427 "registers.\n");
9428 goto out;
9429 }
f5ca6f2e 9430 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS
9431 /* Set up BAR0 PCI config space register memory map */
9432 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS
9433 } else {
9434 phba->pci_bar0_map = pci_resource_start(pdev, 1);
9435 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS
9436 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
9437 dev_printk(KERN_ERR, &pdev->dev,
9438 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
9439 goto out;
9440 }
9441 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 9442 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS
9443 if (!phba->sli4_hba.conf_regs_memmap_p) {
9444 dev_printk(KERN_ERR, &pdev->dev,
9445 "ioremap failed for SLI4 PCI config "
9446 "registers.\n");
9447 goto out;
9448 }
9449 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS
9450 }
9451
9f7dc92e
JS
9452 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
9453 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
9454 /*
9455 * Map SLI4 if type 0 HBA Control Register base to a
9456 * kernel virtual address and setup the registers.
9457 */
9458 phba->pci_bar1_map = pci_resource_start(pdev,
9459 PCI_64BIT_BAR2);
9460 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
9461 phba->sli4_hba.ctrl_regs_memmap_p =
9462 ioremap(phba->pci_bar1_map,
9463 bar1map_len);
9464 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
9465 dev_err(&pdev->dev,
9466 "ioremap failed for SLI4 HBA "
9467 "control registers.\n");
9468 error = -ENOMEM;
9469 goto out_iounmap_conf;
9470 }
9471 phba->pci_bar2_memmap_p =
9472 phba->sli4_hba.ctrl_regs_memmap_p;
9473 lpfc_sli4_bar1_register_memmap(phba);
9474 } else {
9475 error = -ENOMEM;
2fcee4bf
JS
9476 goto out_iounmap_conf;
9477 }
da0436e9
JS
9478 }
9479
9f7dc92e
JS
9480 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
9481 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
9482 /*
9483 * Map SLI4 if type 0 HBA Doorbell Register base to
9484 * a kernel virtual address and setup the registers.
9485 */
9486 phba->pci_bar2_map = pci_resource_start(pdev,
9487 PCI_64BIT_BAR4);
9488 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
9489 phba->sli4_hba.drbl_regs_memmap_p =
9490 ioremap(phba->pci_bar2_map,
9491 bar2map_len);
9492 if (!phba->sli4_hba.drbl_regs_memmap_p) {
9493 dev_err(&pdev->dev,
9494 "ioremap failed for SLI4 HBA"
9495 " doorbell registers.\n");
9496 error = -ENOMEM;
9497 goto out_iounmap_ctrl;
9498 }
9499 phba->pci_bar4_memmap_p =
9500 phba->sli4_hba.drbl_regs_memmap_p;
9501 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
9502 if (error)
9503 goto out_iounmap_all;
9504 } else {
9505 error = -ENOMEM;
2fcee4bf 9506 goto out_iounmap_all;
9f7dc92e 9507 }
da0436e9
JS
9508 }
9509
da0436e9
JS
9510 return 0;
9511
9512out_iounmap_all:
9513 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9514out_iounmap_ctrl:
9515 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9516out_iounmap_conf:
9517 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9518out:
9519 return error;
9520}
9521
9522/**
9523 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
9524 * @phba: pointer to lpfc hba data structure.
9525 *
9526 * This routine is invoked to unset the PCI device memory space for device
9527 * with SLI-4 interface spec.
9528 **/
9529static void
9530lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
9531{
2e90f4b5
JS
9532 uint32_t if_type;
9533 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 9534
2e90f4b5
JS
9535 switch (if_type) {
9536 case LPFC_SLI_INTF_IF_TYPE_0:
9537 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9538 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9539 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9540 break;
9541 case LPFC_SLI_INTF_IF_TYPE_2:
9542 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9543 break;
9544 case LPFC_SLI_INTF_IF_TYPE_1:
9545 default:
9546 dev_printk(KERN_ERR, &phba->pcidev->dev,
9547 "FATAL - unsupported SLI4 interface type - %d\n",
9548 if_type);
9549 break;
9550 }
da0436e9
JS
9551}
9552
9553/**
9554 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
9555 * @phba: pointer to lpfc hba data structure.
9556 *
9557 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9558 * with SLI-3 interface specs.
da0436e9
JS
9559 *
9560 * Return codes
af901ca1 9561 * 0 - successful
da0436e9
JS
9562 * other values - error
9563 **/
9564static int
9565lpfc_sli_enable_msix(struct lpfc_hba *phba)
9566{
45ffac19 9567 int rc;
da0436e9
JS
9568 LPFC_MBOXQ_t *pmb;
9569
9570 /* Set up MSI-X multi-message vectors */
45ffac19
CH
9571 rc = pci_alloc_irq_vectors(phba->pcidev,
9572 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
9573 if (rc < 0) {
da0436e9
JS
9574 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9575 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9576 goto vec_fail_out;
da0436e9 9577 }
45ffac19 9578
da0436e9
JS
9579 /*
9580 * Assign MSI-X vectors to interrupt handlers
9581 */
9582
9583 /* vector-0 is associated to slow-path handler */
45ffac19 9584 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 9585 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS
9586 LPFC_SP_DRIVER_HANDLER_NAME, phba);
9587 if (rc) {
9588 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9589 "0421 MSI-X slow-path request_irq failed "
9590 "(%d)\n", rc);
9591 goto msi_fail_out;
9592 }
9593
9594 /* vector-1 is associated to fast-path handler */
45ffac19 9595 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 9596 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS
9597 LPFC_FP_DRIVER_HANDLER_NAME, phba);
9598
9599 if (rc) {
9600 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9601 "0429 MSI-X fast-path request_irq failed "
9602 "(%d)\n", rc);
9603 goto irq_fail_out;
9604 }
9605
9606 /*
9607 * Configure HBA MSI-X attention conditions to messages
9608 */
9609 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9610
9611 if (!pmb) {
9612 rc = -ENOMEM;
9613 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9614 "0474 Unable to allocate memory for issuing "
9615 "MBOX_CONFIG_MSI command\n");
9616 goto mem_fail_out;
9617 }
9618 rc = lpfc_config_msi(phba, pmb);
9619 if (rc)
9620 goto mbx_fail_out;
9621 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9622 if (rc != MBX_SUCCESS) {
9623 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
9624 "0351 Config MSI mailbox command failed, "
9625 "mbxCmd x%x, mbxStatus x%x\n",
9626 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
9627 goto mbx_fail_out;
9628 }
9629
9630 /* Free memory allocated for mailbox command */
9631 mempool_free(pmb, phba->mbox_mem_pool);
9632 return rc;
9633
9634mbx_fail_out:
9635 /* Free memory allocated for mailbox command */
9636 mempool_free(pmb, phba->mbox_mem_pool);
9637
9638mem_fail_out:
9639 /* free the irq already requested */
45ffac19 9640 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS
9641
9642irq_fail_out:
9643 /* free the irq already requested */
45ffac19 9644 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS
9645
9646msi_fail_out:
9647 /* Unconfigure MSI-X capability structure */
45ffac19 9648 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9649
9650vec_fail_out:
da0436e9
JS
9651 return rc;
9652}
9653
da0436e9
JS
9654/**
9655 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
9656 * @phba: pointer to lpfc hba data structure.
9657 *
9658 * This routine is invoked to enable the MSI interrupt mode to device with
9659 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
9660 * enable the MSI vector. The device driver is responsible for calling the
9661 * request_irq() to register MSI vector with a interrupt the handler, which
9662 * is done in this function.
9663 *
9664 * Return codes
af901ca1 9665 * 0 - successful
da0436e9
JS
9666 * other values - error
9667 */
9668static int
9669lpfc_sli_enable_msi(struct lpfc_hba *phba)
9670{
9671 int rc;
9672
9673 rc = pci_enable_msi(phba->pcidev);
9674 if (!rc)
9675 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9676 "0462 PCI enable MSI mode success.\n");
9677 else {
9678 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9679 "0471 PCI enable MSI mode failed (%d)\n", rc);
9680 return rc;
9681 }
9682
9683 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9684 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9685 if (rc) {
9686 pci_disable_msi(phba->pcidev);
9687 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9688 "0478 MSI request_irq failed (%d)\n", rc);
9689 }
9690 return rc;
9691}
9692
da0436e9
JS
9693/**
9694 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9695 * @phba: pointer to lpfc hba data structure.
9696 *
9697 * This routine is invoked to enable device interrupt and associate driver's
9698 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9699 * spec. Depends on the interrupt mode configured to the driver, the driver
9700 * will try to fallback from the configured interrupt mode to an interrupt
9701 * mode which is supported by the platform, kernel, and device in the order
9702 * of:
9703 * MSI-X -> MSI -> IRQ.
9704 *
9705 * Return codes
af901ca1 9706 * 0 - successful
da0436e9
JS
9707 * other values - error
9708 **/
9709static uint32_t
9710lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9711{
9712 uint32_t intr_mode = LPFC_INTR_ERROR;
9713 int retval;
9714
9715 if (cfg_mode == 2) {
9716 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9717 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9718 if (!retval) {
9719 /* Now, try to enable MSI-X interrupt mode */
9720 retval = lpfc_sli_enable_msix(phba);
9721 if (!retval) {
9722 /* Indicate initialization to MSI-X mode */
9723 phba->intr_type = MSIX;
9724 intr_mode = 2;
9725 }
9726 }
9727 }
9728
9729 /* Fallback to MSI if MSI-X initialization failed */
9730 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9731 retval = lpfc_sli_enable_msi(phba);
9732 if (!retval) {
9733 /* Indicate initialization to MSI mode */
9734 phba->intr_type = MSI;
9735 intr_mode = 1;
9736 }
9737 }
9738
9739 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9740 if (phba->intr_type == NONE) {
9741 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9742 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9743 if (!retval) {
9744 /* Indicate initialization to INTx mode */
9745 phba->intr_type = INTx;
9746 intr_mode = 0;
9747 }
9748 }
9749 return intr_mode;
9750}
9751
9752/**
9753 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9754 * @phba: pointer to lpfc hba data structure.
9755 *
9756 * This routine is invoked to disable device interrupt and disassociate the
9757 * driver's interrupt handler(s) from interrupt vector(s) to device with
9758 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9759 * release the interrupt vector(s) for the message signaled interrupt.
9760 **/
9761static void
9762lpfc_sli_disable_intr(struct lpfc_hba *phba)
9763{
45ffac19
CH
9764 int nr_irqs, i;
9765
da0436e9 9766 if (phba->intr_type == MSIX)
45ffac19
CH
9767 nr_irqs = LPFC_MSIX_VECTORS;
9768 else
9769 nr_irqs = 1;
9770
9771 for (i = 0; i < nr_irqs; i++)
9772 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9773 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9774
9775 /* Reset interrupt management states */
9776 phba->intr_type = NONE;
9777 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9778}
9779
7bb03bbf 9780/**
895427bd 9781 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9782 * @phba: pointer to lpfc hba data structure.
895427bd
JS
9783 * @vectors: number of msix vectors allocated.
9784 *
9785 * The routine will figure out the CPU affinity assignment for every
9786 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9787 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9788 * can be associated with. If the vector can be unquely associated with
9789 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9790 * In addition, the CPU to IO channel mapping will be calculated
9791 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9792 */
895427bd
JS
9793static void
9794lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS
9795{
9796 struct lpfc_vector_map_info *cpup;
895427bd
JS
9797 int index = 0;
9798 int vec = 0;
7bb03bbf 9799 int cpu;
7bb03bbf
JS
9800#ifdef CONFIG_X86
9801 struct cpuinfo_x86 *cpuinfo;
9802#endif
7bb03bbf
JS
9803
9804 /* Init cpu_map array */
9805 memset(phba->sli4_hba.cpu_map, 0xff,
9806 (sizeof(struct lpfc_vector_map_info) *
895427bd 9807 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS
9808
9809 /* Update CPU map with physical id and core id of each CPU */
9810 cpup = phba->sli4_hba.cpu_map;
9811 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9812#ifdef CONFIG_X86
9813 cpuinfo = &cpu_data(cpu);
9814 cpup->phys_id = cpuinfo->phys_proc_id;
9815 cpup->core_id = cpuinfo->cpu_core_id;
9816#else
9817 /* No distinction between CPUs for other platforms */
9818 cpup->phys_id = 0;
9819 cpup->core_id = 0;
9820#endif
895427bd
JS
9821 cpup->channel_id = index; /* For now round robin */
9822 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9823 vec++;
9824 if (vec >= vectors)
9825 vec = 0;
9826 index++;
9827 if (index >= phba->cfg_fcp_io_channel)
9828 index = 0;
7bb03bbf
JS
9829 cpup++;
9830 }
7bb03bbf
JS
9831}
9832
9833
da0436e9
JS
9834/**
9835 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9836 * @phba: pointer to lpfc hba data structure.
9837 *
9838 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9839 * with SLI-4 interface spec.
da0436e9
JS
9840 *
9841 * Return codes
af901ca1 9842 * 0 - successful
da0436e9
JS
9843 * other values - error
9844 **/
9845static int
9846lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9847{
75baf696 9848 int vectors, rc, index;
b83d005e 9849 char *name;
da0436e9
JS
9850
9851 /* Set up MSI-X multi-message vectors */
895427bd 9852 vectors = phba->io_channel_irqs;
45ffac19 9853 if (phba->cfg_fof)
1ba981fd 9854 vectors++;
45ffac19 9855
f358dd0c
JS
9856 rc = pci_alloc_irq_vectors(phba->pcidev,
9857 (phba->nvmet_support) ? 1 : 2,
9858 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9859 if (rc < 0) {
da0436e9
JS
9860 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9861 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9862 goto vec_fail_out;
da0436e9 9863 }
4f871e1b 9864 vectors = rc;
75baf696 9865
7bb03bbf 9866 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9867 for (index = 0; index < vectors; index++) {
b83d005e
JS
9868 name = phba->sli4_hba.hba_eq_hdl[index].handler_name;
9869 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
9870 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9871 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9872
895427bd
JS
9873 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9874 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9875 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9876 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9877 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9878 &lpfc_sli4_fof_intr_handler, 0,
b83d005e 9879 name,
895427bd 9880 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9881 else
45ffac19 9882 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9883 &lpfc_sli4_hba_intr_handler, 0,
b83d005e 9884 name,
895427bd 9885 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS
9886 if (rc) {
9887 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9888 "0486 MSI-X fast-path (%d) "
9889 "request_irq failed (%d)\n", index, rc);
9890 goto cfg_fail_out;
9891 }
9892 }
9893
1ba981fd
JS
9894 if (phba->cfg_fof)
9895 vectors--;
9896
895427bd 9897 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS
9898 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9899 "3238 Reducing IO channels to match number of "
9900 "MSI-X vectors, requested %d got %d\n",
895427bd
JS
9901 phba->io_channel_irqs, vectors);
9902 if (phba->cfg_fcp_io_channel > vectors)
9903 phba->cfg_fcp_io_channel = vectors;
9904 if (phba->cfg_nvme_io_channel > vectors)
9905 phba->cfg_nvme_io_channel = vectors;
9906 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9907 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9908 else
9909 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9910 }
895427bd 9911 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9912
da0436e9
JS
9913 return rc;
9914
9915cfg_fail_out:
9916 /* free the irq already requested */
895427bd
JS
9917 for (--index; index >= 0; index--)
9918 free_irq(pci_irq_vector(phba->pcidev, index),
9919 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9920
da0436e9 9921 /* Unconfigure MSI-X capability structure */
45ffac19 9922 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9923
9924vec_fail_out:
da0436e9
JS
9925 return rc;
9926}
9927
da0436e9
JS
9928/**
9929 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9930 * @phba: pointer to lpfc hba data structure.
9931 *
9932 * This routine is invoked to enable the MSI interrupt mode to device with
9933 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9934 * to enable the MSI vector. The device driver is responsible for calling
9935 * the request_irq() to register MSI vector with a interrupt the handler,
9936 * which is done in this function.
9937 *
9938 * Return codes
af901ca1 9939 * 0 - successful
da0436e9
JS
9940 * other values - error
9941 **/
9942static int
9943lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9944{
9945 int rc, index;
9946
9947 rc = pci_enable_msi(phba->pcidev);
9948 if (!rc)
9949 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9950 "0487 PCI enable MSI mode success.\n");
9951 else {
9952 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9953 "0488 PCI enable MSI mode failed (%d)\n", rc);
9954 return rc;
9955 }
9956
9957 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9958 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9959 if (rc) {
9960 pci_disable_msi(phba->pcidev);
9961 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9962 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9963 return rc;
da0436e9
JS
9964 }
9965
895427bd
JS
9966 for (index = 0; index < phba->io_channel_irqs; index++) {
9967 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9968 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS
9969 }
9970
1ba981fd 9971 if (phba->cfg_fof) {
895427bd
JS
9972 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9973 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 9974 }
75baf696 9975 return 0;
da0436e9
JS
9976}
9977
da0436e9
JS
9978/**
9979 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
9980 * @phba: pointer to lpfc hba data structure.
9981 *
9982 * This routine is invoked to enable device interrupt and associate driver's
9983 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
9984 * interface spec. Depends on the interrupt mode configured to the driver,
9985 * the driver will try to fallback from the configured interrupt mode to an
9986 * interrupt mode which is supported by the platform, kernel, and device in
9987 * the order of:
9988 * MSI-X -> MSI -> IRQ.
9989 *
9990 * Return codes
af901ca1 9991 * 0 - successful
da0436e9
JS
9992 * other values - error
9993 **/
9994static uint32_t
9995lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9996{
9997 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 9998 int retval, idx;
da0436e9
JS
9999
10000 if (cfg_mode == 2) {
10001 /* Preparation before conf_msi mbox cmd */
10002 retval = 0;
10003 if (!retval) {
10004 /* Now, try to enable MSI-X interrupt mode */
10005 retval = lpfc_sli4_enable_msix(phba);
10006 if (!retval) {
10007 /* Indicate initialization to MSI-X mode */
10008 phba->intr_type = MSIX;
10009 intr_mode = 2;
10010 }
10011 }
10012 }
10013
10014 /* Fallback to MSI if MSI-X initialization failed */
10015 if (cfg_mode >= 1 && phba->intr_type == NONE) {
10016 retval = lpfc_sli4_enable_msi(phba);
10017 if (!retval) {
10018 /* Indicate initialization to MSI mode */
10019 phba->intr_type = MSI;
10020 intr_mode = 1;
10021 }
10022 }
10023
10024 /* Fallback to INTx if both MSI-X/MSI initalization failed */
10025 if (phba->intr_type == NONE) {
10026 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
10027 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
10028 if (!retval) {
895427bd
JS
10029 struct lpfc_hba_eq_hdl *eqhdl;
10030
da0436e9
JS
10031 /* Indicate initialization to INTx mode */
10032 phba->intr_type = INTx;
10033 intr_mode = 0;
895427bd
JS
10034
10035 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
10036 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
10037 eqhdl->idx = idx;
10038 eqhdl->phba = phba;
10039 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 10040 }
1ba981fd 10041 if (phba->cfg_fof) {
895427bd
JS
10042 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
10043 eqhdl->idx = idx;
10044 eqhdl->phba = phba;
10045 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 10046 }
da0436e9
JS
10047 }
10048 }
10049 return intr_mode;
10050}
10051
10052/**
10053 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
10054 * @phba: pointer to lpfc hba data structure.
10055 *
10056 * This routine is invoked to disable device interrupt and disassociate
10057 * the driver's interrupt handler(s) from interrupt vector(s) to device
10058 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
10059 * will release the interrupt vector(s) for the message signaled interrupt.
10060 **/
10061static void
10062lpfc_sli4_disable_intr(struct lpfc_hba *phba)
10063{
10064 /* Disable the currently initialized interrupt mode */
45ffac19
CH
10065 if (phba->intr_type == MSIX) {
10066 int index;
10067
10068 /* Free up MSI-X multi-message vectors */
895427bd
JS
10069 for (index = 0; index < phba->io_channel_irqs; index++)
10070 free_irq(pci_irq_vector(phba->pcidev, index),
10071 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH
10072
10073 if (phba->cfg_fof)
895427bd
JS
10074 free_irq(pci_irq_vector(phba->pcidev, index),
10075 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 10076 } else {
da0436e9 10077 free_irq(phba->pcidev->irq, phba);
45ffac19
CH
10078 }
10079
10080 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
10081
10082 /* Reset interrupt management states */
10083 phba->intr_type = NONE;
10084 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
10085}
10086
10087/**
10088 * lpfc_unset_hba - Unset SLI3 hba device initialization
10089 * @phba: pointer to lpfc hba data structure.
10090 *
10091 * This routine is invoked to unset the HBA device initialization steps to
10092 * a device with SLI-3 interface spec.
10093 **/
10094static void
10095lpfc_unset_hba(struct lpfc_hba *phba)
10096{
10097 struct lpfc_vport *vport = phba->pport;
10098 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
10099
10100 spin_lock_irq(shost->host_lock);
10101 vport->load_flag |= FC_UNLOADING;
10102 spin_unlock_irq(shost->host_lock);
10103
72859909
JS
10104 kfree(phba->vpi_bmask);
10105 kfree(phba->vpi_ids);
10106
da0436e9
JS
10107 lpfc_stop_hba_timers(phba);
10108
10109 phba->pport->work_port_events = 0;
10110
10111 lpfc_sli_hba_down(phba);
10112
10113 lpfc_sli_brdrestart(phba);
10114
10115 lpfc_sli_disable_intr(phba);
10116
10117 return;
10118}
10119
5af5eee7
JS
10120/**
10121 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
10122 * @phba: Pointer to HBA context object.
10123 *
10124 * This function is called in the SLI4 code path to wait for completion
10125 * of device's XRIs exchange busy. It will check the XRI exchange busy
10126 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
10127 * that, it will check the XRI exchange busy on outstanding FCP and ELS
10128 * I/Os every 30 seconds, log error message, and wait forever. Only when
10129 * all XRI exchange busy complete, the driver unload shall proceed with
10130 * invoking the function reset ioctl mailbox command to the CNA and the
10131 * the rest of the driver unload resource release.
10132 **/
10133static void
10134lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
10135{
10136 int wait_time = 0;
895427bd 10137 int nvme_xri_cmpl = 1;
86c67379 10138 int nvmet_xri_cmpl = 1;
895427bd 10139 int fcp_xri_cmpl = 1;
5af5eee7
JS
10140 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
10141
d36f0170
JS
10142 /* Driver just aborted IOs during the hba_unset process. Pause
10143 * here to give the HBA time to complete the IO and get entries
10144 * into the abts lists.
10145 */
10146 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5);
10147
10148 /* Wait for NVME pending IO to flush back to transport. */
10149 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
10150 lpfc_nvme_wait_for_io_drain(phba);
10151
895427bd
JS
10152 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10153 fcp_xri_cmpl =
10154 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
86c67379 10155 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
10156 nvme_xri_cmpl =
10157 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS
10158 nvmet_xri_cmpl =
10159 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10160 }
895427bd 10161
f358dd0c
JS
10162 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl ||
10163 !nvmet_xri_cmpl) {
5af5eee7 10164 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS
10165 if (!nvme_xri_cmpl)
10166 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10167 "6100 NVME XRI exchange busy "
10168 "wait time: %d seconds.\n",
10169 wait_time/1000);
5af5eee7
JS
10170 if (!fcp_xri_cmpl)
10171 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10172 "2877 FCP XRI exchange busy "
10173 "wait time: %d seconds.\n",
10174 wait_time/1000);
10175 if (!els_xri_cmpl)
10176 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10177 "2878 ELS XRI exchange busy "
10178 "wait time: %d seconds.\n",
10179 wait_time/1000);
10180 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
10181 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
10182 } else {
10183 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
10184 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
10185 }
86c67379 10186 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
10187 nvme_xri_cmpl = list_empty(
10188 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS
10189 nvmet_xri_cmpl = list_empty(
10190 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10191 }
895427bd
JS
10192
10193 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10194 fcp_xri_cmpl = list_empty(
10195 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
10196
5af5eee7
JS
10197 els_xri_cmpl =
10198 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 10199
5af5eee7
JS
10200 }
10201}
10202
da0436e9
JS
10203/**
10204 * lpfc_sli4_hba_unset - Unset the fcoe hba
10205 * @phba: Pointer to HBA context object.
10206 *
10207 * This function is called in the SLI4 code path to reset the HBA's FCoE
10208 * function. The caller is not required to hold any lock. This routine
10209 * issues PCI function reset mailbox command to reset the FCoE function.
10210 * At the end of the function, it calls lpfc_hba_down_post function to
10211 * free any pending commands.
10212 **/
10213static void
10214lpfc_sli4_hba_unset(struct lpfc_hba *phba)
10215{
10216 int wait_cnt = 0;
10217 LPFC_MBOXQ_t *mboxq;
912e3acd 10218 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS
10219
10220 lpfc_stop_hba_timers(phba);
10221 phba->sli4_hba.intr_enable = 0;
10222
10223 /*
10224 * Gracefully wait out the potential current outstanding asynchronous
10225 * mailbox command.
10226 */
10227
10228 /* First, block any pending async mailbox command from posted */
10229 spin_lock_irq(&phba->hbalock);
10230 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
10231 spin_unlock_irq(&phba->hbalock);
10232 /* Now, trying to wait it out if we can */
10233 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10234 msleep(10);
10235 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
10236 break;
10237 }
10238 /* Forcefully release the outstanding mailbox command if timed out */
10239 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10240 spin_lock_irq(&phba->hbalock);
10241 mboxq = phba->sli.mbox_active;
10242 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
10243 __lpfc_mbox_cmpl_put(phba, mboxq);
10244 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10245 phba->sli.mbox_active = NULL;
10246 spin_unlock_irq(&phba->hbalock);
10247 }
10248
5af5eee7
JS
10249 /* Abort all iocbs associated with the hba */
10250 lpfc_sli_hba_iocb_abort(phba);
10251
10252 /* Wait for completion of device XRI exchange busy */
10253 lpfc_sli4_xri_exchange_busy_wait(phba);
10254
da0436e9
JS
10255 /* Disable PCI subsystem interrupt */
10256 lpfc_sli4_disable_intr(phba);
10257
912e3acd
JS
10258 /* Disable SR-IOV if enabled */
10259 if (phba->cfg_sriov_nr_virtfn)
10260 pci_disable_sriov(pdev);
10261
da0436e9
JS
10262 /* Stop kthread signal shall trigger work_done one more time */
10263 kthread_stop(phba->worker_thread);
10264
d1f525aa
JS
10265 /* Unset the queues shared with the hardware then release all
10266 * allocated resources.
10267 */
10268 lpfc_sli4_queue_unset(phba);
10269 lpfc_sli4_queue_destroy(phba);
10270
3677a3a7
JS
10271 /* Reset SLI4 HBA FCoE function */
10272 lpfc_pci_function_reset(phba);
10273
da0436e9
JS
10274 /* Stop the SLI4 device port */
10275 phba->pport->work_port_events = 0;
10276}
10277
28baac74
JS
10278 /**
10279 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
10280 * @phba: Pointer to HBA context object.
10281 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10282 *
10283 * This function is called in the SLI4 code path to read the port's
10284 * sli4 capabilities.
10285 *
10286 * This function may be be called from any context that can block-wait
10287 * for the completion. The expectation is that this routine is called
10288 * typically from probe_one or from the online routine.
10289 **/
10290int
10291lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10292{
10293 int rc;
10294 struct lpfc_mqe *mqe;
10295 struct lpfc_pc_sli4_params *sli4_params;
10296 uint32_t mbox_tmo;
10297
10298 rc = 0;
10299 mqe = &mboxq->u.mqe;
10300
10301 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 10302 lpfc_pc_sli4_params(mboxq);
28baac74
JS
10303 if (!phba->sli4_hba.intr_enable)
10304 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10305 else {
a183a15f 10306 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS
10307 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10308 }
10309
10310 if (unlikely(rc))
10311 return 1;
10312
10313 sli4_params = &phba->sli4_hba.pc_sli4_params;
10314 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
10315 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
10316 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
10317 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
10318 &mqe->un.sli4_params);
10319 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
10320 &mqe->un.sli4_params);
10321 sli4_params->proto_types = mqe->un.sli4_params.word3;
10322 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
10323 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
10324 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
10325 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
10326 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
10327 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
10328 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
10329 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
10330 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
10331 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
10332 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
10333 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
10334 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
10335 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
10336 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
10337 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
10338 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
10339 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
10340 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
10341 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS
10342
10343 /* Make sure that sge_supp_len can be handled by the driver */
10344 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10345 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10346
28baac74
JS
10347 return rc;
10348}
10349
fedd3b7b
JS
10350/**
10351 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
10352 * @phba: Pointer to HBA context object.
10353 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10354 *
10355 * This function is called in the SLI4 code path to read the port's
10356 * sli4 capabilities.
10357 *
10358 * This function may be be called from any context that can block-wait
10359 * for the completion. The expectation is that this routine is called
10360 * typically from probe_one or from the online routine.
10361 **/
10362int
10363lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10364{
10365 int rc;
10366 struct lpfc_mqe *mqe = &mboxq->u.mqe;
10367 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 10368 uint32_t mbox_tmo;
fedd3b7b
JS
10369 int length;
10370 struct lpfc_sli4_parameters *mbx_sli4_parameters;
10371
6d368e53
JS
10372 /*
10373 * By default, the driver assumes the SLI4 port requires RPI
10374 * header postings. The SLI4_PARAM response will correct this
10375 * assumption.
10376 */
10377 phba->sli4_hba.rpi_hdrs_in_use = 1;
10378
fedd3b7b
JS
10379 /* Read the port's SLI4 Config Parameters */
10380 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
10381 sizeof(struct lpfc_sli4_cfg_mhdr));
10382 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
10383 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
10384 length, LPFC_SLI4_MBX_EMBED);
10385 if (!phba->sli4_hba.intr_enable)
10386 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS
10387 else {
10388 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
10389 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10390 }
fedd3b7b
JS
10391 if (unlikely(rc))
10392 return rc;
10393 sli4_params = &phba->sli4_hba.pc_sli4_params;
10394 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
10395 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
10396 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
10397 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
10398 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
10399 mbx_sli4_parameters);
10400 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
10401 mbx_sli4_parameters);
10402 if (bf_get(cfg_phwq, mbx_sli4_parameters))
10403 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
10404 else
10405 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
10406 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
10407 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 10408 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS
10409 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
10410 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
10411 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
10412 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 10413 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS
10414 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
10415 mbx_sli4_parameters);
895427bd 10416 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS
10417 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
10418 mbx_sli4_parameters);
6d368e53
JS
10419 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
10420 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS
10421 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
10422 bf_get(cfg_xib, mbx_sli4_parameters));
10423
10424 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
10425 !phba->nvme_support) {
10426 phba->nvme_support = 0;
10427 phba->nvmet_support = 0;
0eeaf17f 10428 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_OFF;
895427bd
JS
10429 phba->cfg_nvme_io_channel = 0;
10430 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
10431 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
10432 "6101 Disabling NVME support: "
10433 "Not supported by firmware: %d %d\n",
10434 bf_get(cfg_nvme, mbx_sli4_parameters),
10435 bf_get(cfg_xib, mbx_sli4_parameters));
10436
10437 /* If firmware doesn't support NVME, just use SCSI support */
10438 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
10439 return -ENODEV;
10440 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
10441 }
0558056c 10442
f358dd0c
JS
10443 if (bf_get(cfg_xib, mbx_sli4_parameters) && phba->cfg_suppress_rsp)
10444 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
10445
0cf07f84
JS
10446 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
10447 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
10448
0558056c
JS
10449 /* Make sure that sge_supp_len can be handled by the driver */
10450 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10451 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10452
b5c53958
JS
10453 /*
10454 * Issue IOs with CDB embedded in WQE to minimized the number
10455 * of DMAs the firmware has to do. Setting this to 1 also forces
10456 * the driver to use 128 bytes WQEs for FCP IOs.
10457 */
10458 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
10459 phba->fcp_embed_io = 1;
10460 else
10461 phba->fcp_embed_io = 0;
7bdedb34
JS
10462
10463 /*
10464 * Check if the SLI port supports MDS Diagnostics
10465 */
10466 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
10467 phba->mds_diags_support = 1;
10468 else
10469 phba->mds_diags_support = 0;
fedd3b7b
JS
10470 return 0;
10471}
10472
da0436e9
JS
10473/**
10474 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
10475 * @pdev: pointer to PCI device
10476 * @pid: pointer to PCI device identifier
10477 *
10478 * This routine is to be called to attach a device with SLI-3 interface spec
10479 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10480 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
10481 * information of the device and driver to see if the driver state that it can
10482 * support this kind of device. If the match is successful, the driver core
10483 * invokes this routine. If this routine determines it can claim the HBA, it
10484 * does all the initialization that it needs to do to handle the HBA properly.
10485 *
10486 * Return code
10487 * 0 - driver can claim the device
10488 * negative value - driver can not claim the device
10489 **/
6f039790 10490static int
da0436e9
JS
10491lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
10492{
10493 struct lpfc_hba *phba;
10494 struct lpfc_vport *vport = NULL;
6669f9bb 10495 struct Scsi_Host *shost = NULL;
da0436e9
JS
10496 int error;
10497 uint32_t cfg_mode, intr_mode;
10498
10499 /* Allocate memory for HBA structure */
10500 phba = lpfc_hba_alloc(pdev);
10501 if (!phba)
10502 return -ENOMEM;
10503
10504 /* Perform generic PCI device enabling operation */
10505 error = lpfc_enable_pci_dev(phba);
079b5c91 10506 if (error)
da0436e9 10507 goto out_free_phba;
da0436e9
JS
10508
10509 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
10510 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
10511 if (error)
10512 goto out_disable_pci_dev;
10513
10514 /* Set up SLI-3 specific device PCI memory space */
10515 error = lpfc_sli_pci_mem_setup(phba);
10516 if (error) {
10517 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10518 "1402 Failed to set up pci memory space.\n");
10519 goto out_disable_pci_dev;
10520 }
10521
da0436e9
JS
10522 /* Set up SLI-3 specific device driver resources */
10523 error = lpfc_sli_driver_resource_setup(phba);
10524 if (error) {
10525 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10526 "1404 Failed to set up driver resource.\n");
10527 goto out_unset_pci_mem_s3;
10528 }
10529
10530 /* Initialize and populate the iocb list per host */
d1f525aa 10531
da0436e9
JS
10532 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
10533 if (error) {
10534 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10535 "1405 Failed to initialize iocb list.\n");
10536 goto out_unset_driver_resource_s3;
10537 }
10538
10539 /* Set up common device driver resources */
10540 error = lpfc_setup_driver_resource_phase2(phba);
10541 if (error) {
10542 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10543 "1406 Failed to set up driver resource.\n");
10544 goto out_free_iocb_list;
10545 }
10546
079b5c91
JS
10547 /* Get the default values for Model Name and Description */
10548 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10549
da0436e9
JS
10550 /* Create SCSI host to the physical port */
10551 error = lpfc_create_shost(phba);
10552 if (error) {
10553 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10554 "1407 Failed to create scsi host.\n");
10555 goto out_unset_driver_resource;
10556 }
10557
10558 /* Configure sysfs attributes */
10559 vport = phba->pport;
10560 error = lpfc_alloc_sysfs_attr(vport);
10561 if (error) {
10562 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10563 "1476 Failed to allocate sysfs attr\n");
10564 goto out_destroy_shost;
10565 }
10566
6669f9bb 10567 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS
10568 /* Now, trying to enable interrupt and bring up the device */
10569 cfg_mode = phba->cfg_use_msi;
10570 while (true) {
10571 /* Put device to a known state before enabling interrupt */
10572 lpfc_stop_port(phba);
10573 /* Configure and enable interrupt */
10574 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
10575 if (intr_mode == LPFC_INTR_ERROR) {
10576 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10577 "0431 Failed to enable interrupt.\n");
10578 error = -ENODEV;
10579 goto out_free_sysfs_attr;
10580 }
10581 /* SLI-3 HBA setup */
10582 if (lpfc_sli_hba_setup(phba)) {
10583 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10584 "1477 Failed to set up hba\n");
10585 error = -ENODEV;
10586 goto out_remove_device;
10587 }
10588
10589 /* Wait 50ms for the interrupts of previous mailbox commands */
10590 msleep(50);
10591 /* Check active interrupts on message signaled interrupts */
10592 if (intr_mode == 0 ||
10593 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
10594 /* Log the current active interrupt mode */
10595 phba->intr_mode = intr_mode;
10596 lpfc_log_intr_mode(phba, intr_mode);
10597 break;
10598 } else {
10599 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10600 "0447 Configure interrupt mode (%d) "
10601 "failed active interrupt test.\n",
10602 intr_mode);
10603 /* Disable the current interrupt mode */
10604 lpfc_sli_disable_intr(phba);
10605 /* Try next level of interrupt mode */
10606 cfg_mode = --intr_mode;
10607 }
10608 }
10609
10610 /* Perform post initialization setup */
10611 lpfc_post_init_setup(phba);
10612
10613 /* Check if there are static vports to be created. */
10614 lpfc_create_static_vport(phba);
10615
10616 return 0;
10617
10618out_remove_device:
10619 lpfc_unset_hba(phba);
10620out_free_sysfs_attr:
10621 lpfc_free_sysfs_attr(vport);
10622out_destroy_shost:
10623 lpfc_destroy_shost(phba);
10624out_unset_driver_resource:
10625 lpfc_unset_driver_resource_phase2(phba);
10626out_free_iocb_list:
10627 lpfc_free_iocb_list(phba);
10628out_unset_driver_resource_s3:
10629 lpfc_sli_driver_resource_unset(phba);
10630out_unset_pci_mem_s3:
10631 lpfc_sli_pci_mem_unset(phba);
10632out_disable_pci_dev:
10633 lpfc_disable_pci_dev(phba);
6669f9bb
JS
10634 if (shost)
10635 scsi_host_put(shost);
da0436e9
JS
10636out_free_phba:
10637 lpfc_hba_free(phba);
10638 return error;
10639}
10640
10641/**
10642 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
10643 * @pdev: pointer to PCI device
10644 *
10645 * This routine is to be called to disattach a device with SLI-3 interface
10646 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10647 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10648 * device to be removed from the PCI subsystem properly.
10649 **/
6f039790 10650static void
da0436e9
JS
10651lpfc_pci_remove_one_s3(struct pci_dev *pdev)
10652{
10653 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10654 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10655 struct lpfc_vport **vports;
10656 struct lpfc_hba *phba = vport->phba;
10657 int i;
da0436e9
JS
10658
10659 spin_lock_irq(&phba->hbalock);
10660 vport->load_flag |= FC_UNLOADING;
10661 spin_unlock_irq(&phba->hbalock);
10662
10663 lpfc_free_sysfs_attr(vport);
10664
10665 /* Release all the vports against this physical port */
10666 vports = lpfc_create_vport_work_array(phba);
10667 if (vports != NULL)
587a37f6
JS
10668 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10669 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10670 continue;
da0436e9 10671 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10672 }
da0436e9
JS
10673 lpfc_destroy_vport_work_array(phba, vports);
10674
10675 /* Remove FC host and then SCSI host with the physical port */
10676 fc_remove_host(shost);
10677 scsi_remove_host(shost);
d613b6a7 10678
da0436e9
JS
10679 lpfc_cleanup(vport);
10680
10681 /*
10682 * Bring down the SLI Layer. This step disable all interrupts,
10683 * clears the rings, discards all mailbox commands, and resets
10684 * the HBA.
10685 */
10686
48e34d0f 10687 /* HBA interrupt will be disabled after this call */
da0436e9
JS
10688 lpfc_sli_hba_down(phba);
10689 /* Stop kthread signal shall trigger work_done one more time */
10690 kthread_stop(phba->worker_thread);
10691 /* Final cleanup of txcmplq and reset the HBA */
10692 lpfc_sli_brdrestart(phba);
10693
72859909
JS
10694 kfree(phba->vpi_bmask);
10695 kfree(phba->vpi_ids);
10696
da0436e9
JS
10697 lpfc_stop_hba_timers(phba);
10698 spin_lock_irq(&phba->hbalock);
10699 list_del_init(&vport->listentry);
10700 spin_unlock_irq(&phba->hbalock);
10701
10702 lpfc_debugfs_terminate(vport);
10703
912e3acd
JS
10704 /* Disable SR-IOV if enabled */
10705 if (phba->cfg_sriov_nr_virtfn)
10706 pci_disable_sriov(pdev);
10707
da0436e9
JS
10708 /* Disable interrupt */
10709 lpfc_sli_disable_intr(phba);
10710
da0436e9
JS
10711 scsi_host_put(shost);
10712
10713 /*
10714 * Call scsi_free before mem_free since scsi bufs are released to their
10715 * corresponding pools here.
10716 */
10717 lpfc_scsi_free(phba);
10718 lpfc_mem_free_all(phba);
10719
10720 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10721 phba->hbqslimp.virt, phba->hbqslimp.phys);
10722
10723 /* Free resources associated with SLI2 interface */
10724 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10725 phba->slim2p.virt, phba->slim2p.phys);
10726
10727 /* unmap adapter SLIM and Control Registers */
10728 iounmap(phba->ctrl_regs_memmap_p);
10729 iounmap(phba->slim_memmap_p);
10730
10731 lpfc_hba_free(phba);
10732
e0c0483c 10733 pci_release_mem_regions(pdev);
da0436e9
JS
10734 pci_disable_device(pdev);
10735}
10736
10737/**
10738 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10739 * @pdev: pointer to PCI device
10740 * @msg: power management message
10741 *
10742 * This routine is to be called from the kernel's PCI subsystem to support
10743 * system Power Management (PM) to device with SLI-3 interface spec. When
10744 * PM invokes this method, it quiesces the device by stopping the driver's
10745 * worker thread for the device, turning off device's interrupt and DMA,
10746 * and bring the device offline. Note that as the driver implements the
10747 * minimum PM requirements to a power-aware driver's PM support for the
10748 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10749 * to the suspend() method call will be treated as SUSPEND and the driver will
10750 * fully reinitialize its device during resume() method call, the driver will
10751 * set device to PCI_D3hot state in PCI config space instead of setting it
10752 * according to the @msg provided by the PM.
10753 *
10754 * Return code
10755 * 0 - driver suspended the device
10756 * Error otherwise
10757 **/
10758static int
10759lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10760{
10761 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10762 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10763
10764 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10765 "0473 PCI device Power Management suspend.\n");
10766
10767 /* Bring down the device */
618a5230 10768 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10769 lpfc_offline(phba);
10770 kthread_stop(phba->worker_thread);
10771
10772 /* Disable interrupt from device */
10773 lpfc_sli_disable_intr(phba);
10774
10775 /* Save device state to PCI config space */
10776 pci_save_state(pdev);
10777 pci_set_power_state(pdev, PCI_D3hot);
10778
10779 return 0;
10780}
10781
10782/**
10783 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10784 * @pdev: pointer to PCI device
10785 *
10786 * This routine is to be called from the kernel's PCI subsystem to support
10787 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10788 * invokes this method, it restores the device's PCI config space state and
10789 * fully reinitializes the device and brings it online. Note that as the
10790 * driver implements the minimum PM requirements to a power-aware driver's
10791 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10792 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10793 * driver will fully reinitialize its device during resume() method call,
10794 * the device will be set to PCI_D0 directly in PCI config space before
10795 * restoring the state.
10796 *
10797 * Return code
10798 * 0 - driver suspended the device
10799 * Error otherwise
10800 **/
10801static int
10802lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10803{
10804 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10805 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10806 uint32_t intr_mode;
10807 int error;
10808
10809 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10810 "0452 PCI device Power Management resume.\n");
10811
10812 /* Restore device state from PCI config space */
10813 pci_set_power_state(pdev, PCI_D0);
10814 pci_restore_state(pdev);
0d878419 10815
1dfb5a47
JS
10816 /*
10817 * As the new kernel behavior of pci_restore_state() API call clears
10818 * device saved_state flag, need to save the restored state again.
10819 */
10820 pci_save_state(pdev);
10821
da0436e9
JS
10822 if (pdev->is_busmaster)
10823 pci_set_master(pdev);
10824
10825 /* Startup the kernel thread for this host adapter. */
10826 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10827 "lpfc_worker_%d", phba->brd_no);
10828 if (IS_ERR(phba->worker_thread)) {
10829 error = PTR_ERR(phba->worker_thread);
10830 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10831 "0434 PM resume failed to start worker "
10832 "thread: error=x%x.\n", error);
10833 return error;
10834 }
10835
10836 /* Configure and enable interrupt */
10837 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10838 if (intr_mode == LPFC_INTR_ERROR) {
10839 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10840 "0430 PM resume Failed to enable interrupt\n");
10841 return -EIO;
10842 } else
10843 phba->intr_mode = intr_mode;
10844
10845 /* Restart HBA and bring it online */
10846 lpfc_sli_brdrestart(phba);
10847 lpfc_online(phba);
10848
10849 /* Log the current active interrupt mode */
10850 lpfc_log_intr_mode(phba, phba->intr_mode);
10851
10852 return 0;
10853}
10854
891478a2
JS
10855/**
10856 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10857 * @phba: pointer to lpfc hba data structure.
10858 *
10859 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10860 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS
10861 **/
10862static void
10863lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10864{
10865 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10866 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS
10867
10868 /*
10869 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10870 * and let the SCSI mid-layer to retry them to recover.
10871 */
db55fba8 10872 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS
10873}
10874
0d878419
JS
10875/**
10876 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10877 * @phba: pointer to lpfc hba data structure.
10878 *
10879 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10880 * disables the device interrupt and pci device, and aborts the internal FCP
10881 * pending I/Os.
10882 **/
10883static void
10884lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10885{
0d878419 10886 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10887 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10888
75baf696 10889 /* Block any management I/Os to the device */
618a5230 10890 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10891
e2af0d2e
JS
10892 /* Block all SCSI devices' I/Os on the host */
10893 lpfc_scsi_dev_block(phba);
10894
ea714f3d
JS
10895 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10896 lpfc_sli_flush_fcp_rings(phba);
10897
e2af0d2e
JS
10898 /* stop all timers */
10899 lpfc_stop_hba_timers(phba);
10900
0d878419
JS
10901 /* Disable interrupt and pci device */
10902 lpfc_sli_disable_intr(phba);
10903 pci_disable_device(phba->pcidev);
0d878419
JS
10904}
10905
10906/**
10907 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10908 * @phba: pointer to lpfc hba data structure.
10909 *
10910 * This routine is called to prepare the SLI3 device for PCI slot permanently
10911 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10912 * pending I/Os.
10913 **/
10914static void
75baf696 10915lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS
10916{
10917 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10918 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS
10919 /* Block all SCSI devices' I/Os on the host */
10920 lpfc_scsi_dev_block(phba);
10921
10922 /* stop all timers */
10923 lpfc_stop_hba_timers(phba);
10924
0d878419
JS
10925 /* Clean up all driver's outstanding SCSI I/Os */
10926 lpfc_sli_flush_fcp_rings(phba);
10927}
10928
da0436e9
JS
10929/**
10930 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10931 * @pdev: pointer to PCI device.
10932 * @state: the current PCI connection state.
10933 *
10934 * This routine is called from the PCI subsystem for I/O error handling to
10935 * device with SLI-3 interface spec. This function is called by the PCI
10936 * subsystem after a PCI bus error affecting this device has been detected.
10937 * When this function is invoked, it will need to stop all the I/Os and
10938 * interrupt(s) to the device. Once that is done, it will return
10939 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10940 * as desired.
10941 *
10942 * Return codes
0d878419 10943 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS
10944 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10945 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10946 **/
10947static pci_ers_result_t
10948lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10949{
10950 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10951 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10952
0d878419
JS
10953 switch (state) {
10954 case pci_channel_io_normal:
891478a2
JS
10955 /* Non-fatal error, prepare for recovery */
10956 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS
10957 return PCI_ERS_RESULT_CAN_RECOVER;
10958 case pci_channel_io_frozen:
10959 /* Fatal error, prepare for slot reset */
10960 lpfc_sli_prep_dev_for_reset(phba);
10961 return PCI_ERS_RESULT_NEED_RESET;
10962 case pci_channel_io_perm_failure:
10963 /* Permanent failure, prepare for device down */
75baf696 10964 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 10965 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS
10966 default:
10967 /* Unknown state, prepare and request slot reset */
10968 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10969 "0472 Unknown PCI error state: x%x\n", state);
10970 lpfc_sli_prep_dev_for_reset(phba);
10971 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 10972 }
da0436e9
JS
10973}
10974
10975/**
10976 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
10977 * @pdev: pointer to PCI device.
10978 *
10979 * This routine is called from the PCI subsystem for error handling to
10980 * device with SLI-3 interface spec. This is called after PCI bus has been
10981 * reset to restart the PCI card from scratch, as if from a cold-boot.
10982 * During the PCI subsystem error recovery, after driver returns
10983 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
10984 * recovery and then call this routine before calling the .resume method
10985 * to recover the device. This function will initialize the HBA device,
10986 * enable the interrupt, but it will just put the HBA to offline state
10987 * without passing any I/O traffic.
10988 *
10989 * Return codes
10990 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
10991 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10992 */
10993static pci_ers_result_t
10994lpfc_io_slot_reset_s3(struct pci_dev *pdev)
10995{
10996 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10997 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10998 struct lpfc_sli *psli = &phba->sli;
10999 uint32_t intr_mode;
11000
11001 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11002 if (pci_enable_device_mem(pdev)) {
11003 printk(KERN_ERR "lpfc: Cannot re-enable "
11004 "PCI device after reset.\n");
11005 return PCI_ERS_RESULT_DISCONNECT;
11006 }
11007
11008 pci_restore_state(pdev);
1dfb5a47
JS
11009
11010 /*
11011 * As the new kernel behavior of pci_restore_state() API call clears
11012 * device saved_state flag, need to save the restored state again.
11013 */
11014 pci_save_state(pdev);
11015
da0436e9
JS
11016 if (pdev->is_busmaster)
11017 pci_set_master(pdev);
11018
11019 spin_lock_irq(&phba->hbalock);
11020 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11021 spin_unlock_irq(&phba->hbalock);
11022
11023 /* Configure and enable interrupt */
11024 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
11025 if (intr_mode == LPFC_INTR_ERROR) {
11026 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11027 "0427 Cannot re-enable interrupt after "
11028 "slot reset.\n");
11029 return PCI_ERS_RESULT_DISCONNECT;
11030 } else
11031 phba->intr_mode = intr_mode;
11032
75baf696 11033 /* Take device offline, it will perform cleanup */
618a5230 11034 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
11035 lpfc_offline(phba);
11036 lpfc_sli_brdrestart(phba);
11037
11038 /* Log the current active interrupt mode */
11039 lpfc_log_intr_mode(phba, phba->intr_mode);
11040
11041 return PCI_ERS_RESULT_RECOVERED;
11042}
11043
11044/**
11045 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
11046 * @pdev: pointer to PCI device
11047 *
11048 * This routine is called from the PCI subsystem for error handling to device
11049 * with SLI-3 interface spec. It is called when kernel error recovery tells
11050 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11051 * error recovery. After this call, traffic can start to flow from this device
11052 * again.
11053 */
11054static void
11055lpfc_io_resume_s3(struct pci_dev *pdev)
11056{
11057 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11058 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 11059
e2af0d2e 11060 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 11061 lpfc_online(phba);
0d878419
JS
11062
11063 /* Clean up Advanced Error Reporting (AER) if needed */
11064 if (phba->hba_flag & HBA_AER_ENABLED)
11065 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 11066}
3772a991 11067
da0436e9
JS
11068/**
11069 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
11070 * @phba: pointer to lpfc hba data structure.
11071 *
11072 * returns the number of ELS/CT IOCBs to reserve
11073 **/
11074int
11075lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
11076{
11077 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
11078
f1126688
JS
11079 if (phba->sli_rev == LPFC_SLI_REV4) {
11080 if (max_xri <= 100)
6a9c52cf 11081 return 10;
f1126688 11082 else if (max_xri <= 256)
6a9c52cf 11083 return 25;
f1126688 11084 else if (max_xri <= 512)
6a9c52cf 11085 return 50;
f1126688 11086 else if (max_xri <= 1024)
6a9c52cf 11087 return 100;
8a9d2e80 11088 else if (max_xri <= 1536)
6a9c52cf 11089 return 150;
8a9d2e80
JS
11090 else if (max_xri <= 2048)
11091 return 200;
11092 else
11093 return 250;
f1126688
JS
11094 } else
11095 return 0;
3772a991
JS
11096}
11097
895427bd
JS
11098/**
11099 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
11100 * @phba: pointer to lpfc hba data structure.
11101 *
f358dd0c 11102 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS
11103 **/
11104int
11105lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
11106{
11107 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
11108
f358dd0c
JS
11109 if (phba->nvmet_support)
11110 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS
11111 return max_xri;
11112}
11113
11114
52d52440
JS
11115/**
11116 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 11117 * @fw: pointer to firmware image returned from request_firmware.
ce396282 11118 * @phba: pointer to lpfc hba data structure.
52d52440 11119 *
52d52440 11120 **/
ce396282
JS
11121static void
11122lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 11123{
ce396282 11124 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 11125 char fwrev[FW_REV_STR_SIZE];
ce396282 11126 struct lpfc_grp_hdr *image;
52d52440
JS
11127 struct list_head dma_buffer_list;
11128 int i, rc = 0;
11129 struct lpfc_dmabuf *dmabuf, *next;
11130 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 11131 uint32_t magic_number, ftype, fid, fsize;
52d52440 11132
c71ab861 11133 /* It can be null in no-wait mode, sanity check */
ce396282
JS
11134 if (!fw) {
11135 rc = -ENXIO;
11136 goto out;
11137 }
11138 image = (struct lpfc_grp_hdr *)fw->data;
11139
6b6ef5db
JS
11140 magic_number = be32_to_cpu(image->magic_number);
11141 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
11142 fid = bf_get_be32(lpfc_grp_hdr_id, image),
11143 fsize = be32_to_cpu(image->size);
11144
52d52440 11145 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS
11146 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
11147 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
11148 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS
11149 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11150 "3022 Invalid FW image found. "
efe583c6 11151 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 11152 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS
11153 rc = -EINVAL;
11154 goto release_out;
52d52440
JS
11155 }
11156 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 11157 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 11158 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 11159 "3023 Updating Firmware, Current Version:%s "
52d52440 11160 "New Version:%s\n",
88a2cfbb 11161 fwrev, image->revision);
52d52440
JS
11162 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
11163 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
11164 GFP_KERNEL);
11165 if (!dmabuf) {
11166 rc = -ENOMEM;
ce396282 11167 goto release_out;
52d52440
JS
11168 }
11169 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
11170 SLI4_PAGE_SIZE,
11171 &dmabuf->phys,
11172 GFP_KERNEL);
11173 if (!dmabuf->virt) {
11174 kfree(dmabuf);
11175 rc = -ENOMEM;
ce396282 11176 goto release_out;
52d52440
JS
11177 }
11178 list_add_tail(&dmabuf->list, &dma_buffer_list);
11179 }
11180 while (offset < fw->size) {
11181 temp_offset = offset;
11182 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 11183 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS
11184 memcpy(dmabuf->virt,
11185 fw->data + temp_offset,
079b5c91
JS
11186 fw->size - temp_offset);
11187 temp_offset = fw->size;
52d52440
JS
11188 break;
11189 }
52d52440
JS
11190 memcpy(dmabuf->virt, fw->data + temp_offset,
11191 SLI4_PAGE_SIZE);
88a2cfbb 11192 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS
11193 }
11194 rc = lpfc_wr_object(phba, &dma_buffer_list,
11195 (fw->size - offset), &offset);
ce396282
JS
11196 if (rc)
11197 goto release_out;
52d52440
JS
11198 }
11199 rc = offset;
11200 }
ce396282
JS
11201
11202release_out:
52d52440
JS
11203 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
11204 list_del(&dmabuf->list);
11205 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
11206 dmabuf->virt, dmabuf->phys);
11207 kfree(dmabuf);
11208 }
ce396282
JS
11209 release_firmware(fw);
11210out:
11211 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 11212 "3024 Firmware update done: %d.\n", rc);
ce396282 11213 return;
52d52440
JS
11214}
11215
c71ab861
JS
11216/**
11217 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
11218 * @phba: pointer to lpfc hba data structure.
11219 *
11220 * This routine is called to perform Linux generic firmware upgrade on device
11221 * that supports such feature.
11222 **/
11223int
11224lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
11225{
11226 uint8_t file_name[ELX_MODEL_NAME_SIZE];
11227 int ret;
11228 const struct firmware *fw;
11229
11230 /* Only supported on SLI4 interface type 2 for now */
11231 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11232 LPFC_SLI_INTF_IF_TYPE_2)
11233 return -EPERM;
11234
11235 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
11236
11237 if (fw_upgrade == INT_FW_UPGRADE) {
11238 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
11239 file_name, &phba->pcidev->dev,
11240 GFP_KERNEL, (void *)phba,
11241 lpfc_write_firmware);
11242 } else if (fw_upgrade == RUN_FW_UPGRADE) {
11243 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
11244 if (!ret)
11245 lpfc_write_firmware(fw, (void *)phba);
11246 } else {
11247 ret = -EINVAL;
11248 }
11249
11250 return ret;
11251}
11252
3772a991 11253/**
da0436e9 11254 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS
11255 * @pdev: pointer to PCI device
11256 * @pid: pointer to PCI device identifier
11257 *
da0436e9
JS
11258 * This routine is called from the kernel's PCI subsystem to device with
11259 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 11260 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS
11261 * information of the device and driver to see if the driver state that it
11262 * can support this kind of device. If the match is successful, the driver
11263 * core invokes this routine. If this routine determines it can claim the HBA,
11264 * it does all the initialization that it needs to do to handle the HBA
11265 * properly.
3772a991
JS
11266 *
11267 * Return code
11268 * 0 - driver can claim the device
11269 * negative value - driver can not claim the device
11270 **/
6f039790 11271static int
da0436e9 11272lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS
11273{
11274 struct lpfc_hba *phba;
11275 struct lpfc_vport *vport = NULL;
6669f9bb 11276 struct Scsi_Host *shost = NULL;
6c621a22 11277 int error;
3772a991
JS
11278 uint32_t cfg_mode, intr_mode;
11279
11280 /* Allocate memory for HBA structure */
11281 phba = lpfc_hba_alloc(pdev);
11282 if (!phba)
11283 return -ENOMEM;
11284
11285 /* Perform generic PCI device enabling operation */
11286 error = lpfc_enable_pci_dev(phba);
079b5c91 11287 if (error)
3772a991 11288 goto out_free_phba;
3772a991 11289
da0436e9
JS
11290 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
11291 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS
11292 if (error)
11293 goto out_disable_pci_dev;
11294
da0436e9
JS
11295 /* Set up SLI-4 specific device PCI memory space */
11296 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS
11297 if (error) {
11298 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11299 "1410 Failed to set up pci memory space.\n");
3772a991
JS
11300 goto out_disable_pci_dev;
11301 }
11302
da0436e9
JS
11303 /* Set up SLI-4 Specific device driver resources */
11304 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS
11305 if (error) {
11306 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
11307 "1412 Failed to set up driver resource.\n");
11308 goto out_unset_pci_mem_s4;
3772a991
JS
11309 }
11310
19ca7609 11311 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 11312 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 11313
3772a991
JS
11314 /* Set up common device driver resources */
11315 error = lpfc_setup_driver_resource_phase2(phba);
11316 if (error) {
11317 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11318 "1414 Failed to set up driver resource.\n");
6c621a22 11319 goto out_unset_driver_resource_s4;
3772a991
JS
11320 }
11321
079b5c91
JS
11322 /* Get the default values for Model Name and Description */
11323 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11324
3772a991
JS
11325 /* Create SCSI host to the physical port */
11326 error = lpfc_create_shost(phba);
11327 if (error) {
11328 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11329 "1415 Failed to create scsi host.\n");
3772a991
JS
11330 goto out_unset_driver_resource;
11331 }
9399627f 11332
5b75da2f 11333 /* Configure sysfs attributes */
3772a991
JS
11334 vport = phba->pport;
11335 error = lpfc_alloc_sysfs_attr(vport);
11336 if (error) {
9399627f 11337 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11338 "1416 Failed to allocate sysfs attr\n");
3772a991 11339 goto out_destroy_shost;
98c9ea5c 11340 }
875fbdfe 11341
6669f9bb 11342 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 11343 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 11344 cfg_mode = phba->cfg_use_msi;
5b75da2f 11345
7b15db32
JS
11346 /* Put device to a known state before enabling interrupt */
11347 lpfc_stop_port(phba);
895427bd 11348
7b15db32
JS
11349 /* Configure and enable interrupt */
11350 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
11351 if (intr_mode == LPFC_INTR_ERROR) {
11352 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11353 "0426 Failed to enable interrupt.\n");
11354 error = -ENODEV;
11355 goto out_free_sysfs_attr;
11356 }
11357 /* Default to single EQ for non-MSI-X */
895427bd
JS
11358 if (phba->intr_type != MSIX) {
11359 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
11360 phba->cfg_fcp_io_channel = 1;
2d7dbc4c 11361 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd 11362 phba->cfg_nvme_io_channel = 1;
2d7dbc4c
JS
11363 if (phba->nvmet_support)
11364 phba->cfg_nvmet_mrq = 1;
11365 }
895427bd
JS
11366 phba->io_channel_irqs = 1;
11367 }
11368
7b15db32
JS
11369 /* Set up SLI-4 HBA */
11370 if (lpfc_sli4_hba_setup(phba)) {
11371 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11372 "1421 Failed to set up hba\n");
11373 error = -ENODEV;
11374 goto out_disable_intr;
98c9ea5c 11375 }
858c9f6c 11376
7b15db32
JS
11377 /* Log the current active interrupt mode */
11378 phba->intr_mode = intr_mode;
11379 lpfc_log_intr_mode(phba, intr_mode);
11380
3772a991
JS
11381 /* Perform post initialization setup */
11382 lpfc_post_init_setup(phba);
dea3101e 11383
01649561
JS
11384 /* NVME support in FW earlier in the driver load corrects the
11385 * FC4 type making a check for nvme_support unnecessary.
11386 */
11387 if ((phba->nvmet_support == 0) &&
11388 (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
11389 /* Create NVME binding with nvme_fc_transport. This
d1f525aa
JS
11390 * ensures the vport is initialized. If the localport
11391 * create fails, it should not unload the driver to
11392 * support field issues.
01649561
JS
11393 */
11394 error = lpfc_nvme_create_localport(vport);
11395 if (error) {
11396 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11397 "6004 NVME registration failed, "
11398 "error x%x\n",
11399 error);
01649561
JS
11400 }
11401 }
895427bd 11402
c71ab861
JS
11403 /* check for firmware upgrade or downgrade */
11404 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 11405 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 11406
1c6834a7
JS
11407 /* Check if there are static vports to be created. */
11408 lpfc_create_static_vport(phba);
dea3101e
JB
11409 return 0;
11410
da0436e9
JS
11411out_disable_intr:
11412 lpfc_sli4_disable_intr(phba);
5b75da2f
JS
11413out_free_sysfs_attr:
11414 lpfc_free_sysfs_attr(vport);
3772a991
JS
11415out_destroy_shost:
11416 lpfc_destroy_shost(phba);
11417out_unset_driver_resource:
11418 lpfc_unset_driver_resource_phase2(phba);
da0436e9
JS
11419out_unset_driver_resource_s4:
11420 lpfc_sli4_driver_resource_unset(phba);
11421out_unset_pci_mem_s4:
11422 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS
11423out_disable_pci_dev:
11424 lpfc_disable_pci_dev(phba);
6669f9bb
JS
11425 if (shost)
11426 scsi_host_put(shost);
2e0fef85 11427out_free_phba:
3772a991 11428 lpfc_hba_free(phba);
dea3101e
JB
11429 return error;
11430}
11431
e59058c4 11432/**
da0436e9 11433 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS
11434 * @pdev: pointer to PCI device
11435 *
da0436e9
JS
11436 * This routine is called from the kernel's PCI subsystem to device with
11437 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS
11438 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11439 * device to be removed from the PCI subsystem properly.
e59058c4 11440 **/
6f039790 11441static void
da0436e9 11442lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 11443{
da0436e9 11444 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 11445 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 11446 struct lpfc_vport **vports;
da0436e9 11447 struct lpfc_hba *phba = vport->phba;
eada272d 11448 int i;
8a4df120 11449
da0436e9 11450 /* Mark the device unloading flag */
549e55cd 11451 spin_lock_irq(&phba->hbalock);
51ef4c26 11452 vport->load_flag |= FC_UNLOADING;
549e55cd 11453 spin_unlock_irq(&phba->hbalock);
2e0fef85 11454
da0436e9 11455 /* Free the HBA sysfs attributes */
858c9f6c
JS
11456 lpfc_free_sysfs_attr(vport);
11457
eada272d
JS
11458 /* Release all the vports against this physical port */
11459 vports = lpfc_create_vport_work_array(phba);
11460 if (vports != NULL)
587a37f6
JS
11461 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11462 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11463 continue;
eada272d 11464 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11465 }
eada272d
JS
11466 lpfc_destroy_vport_work_array(phba, vports);
11467
11468 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS
11469 fc_remove_host(shost);
11470 scsi_remove_host(shost);
1234a6d5
DK
11471 /*
11472 * Bring down the SLI Layer. This step disables all interrupts,
11473 * clears the rings, discards all mailbox commands, and resets
11474 * the HBA FCoE function.
11475 */
11476 lpfc_debugfs_terminate(vport);
11477 lpfc_sli4_hba_unset(phba);
da0436e9 11478
d613b6a7
JS
11479 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
11480 * localports are destroyed after to cleanup all transport memory.
895427bd 11481 */
87af33fe 11482 lpfc_cleanup(vport);
d613b6a7
JS
11483 lpfc_nvmet_destroy_targetport(phba);
11484 lpfc_nvme_destroy_localport(vport);
87af33fe 11485
a257bf90 11486
1901762f 11487 lpfc_stop_hba_timers(phba);
858c9f6c
JS
11488 spin_lock_irq(&phba->hbalock);
11489 list_del_init(&vport->listentry);
11490 spin_unlock_irq(&phba->hbalock);
11491
3677a3a7 11492 /* Perform scsi free before driver resource_unset since scsi
da0436e9 11493 * buffers are released to their corresponding pools here.
2e0fef85
JS
11494 */
11495 lpfc_scsi_free(phba);
895427bd 11496 lpfc_nvme_free(phba);
01649561 11497 lpfc_free_iocb_list(phba);
67d12733 11498
da0436e9 11499 lpfc_sli4_driver_resource_unset(phba);
ed957684 11500
da0436e9
JS
11501 /* Unmap adapter Control and Doorbell registers */
11502 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 11503
da0436e9
JS
11504 /* Release PCI resources and disable device's PCI function */
11505 scsi_host_put(shost);
11506 lpfc_disable_pci_dev(phba);
2e0fef85 11507
da0436e9 11508 /* Finally, free the driver's device data structure */
3772a991 11509 lpfc_hba_free(phba);
2e0fef85 11510
da0436e9 11511 return;
dea3101e
JB
11512}
11513
3a55b532 11514/**
da0436e9 11515 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS
11516 * @pdev: pointer to PCI device
11517 * @msg: power management message
11518 *
da0436e9
JS
11519 * This routine is called from the kernel's PCI subsystem to support system
11520 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
11521 * this method, it quiesces the device by stopping the driver's worker
11522 * thread for the device, turning off device's interrupt and DMA, and bring
11523 * the device offline. Note that as the driver implements the minimum PM
11524 * requirements to a power-aware driver's PM support for suspend/resume -- all
11525 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
11526 * method call will be treated as SUSPEND and the driver will fully
11527 * reinitialize its device during resume() method call, the driver will set
11528 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 11529 * according to the @msg provided by the PM.
3a55b532
JS
11530 *
11531 * Return code
3772a991
JS
11532 * 0 - driver suspended the device
11533 * Error otherwise
3a55b532
JS
11534 **/
11535static int
da0436e9 11536lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS
11537{
11538 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11539 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11540
11541 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 11542 "2843 PCI device Power Management suspend.\n");
3a55b532
JS
11543
11544 /* Bring down the device */
618a5230 11545 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS
11546 lpfc_offline(phba);
11547 kthread_stop(phba->worker_thread);
11548
11549 /* Disable interrupt from device */
da0436e9 11550 lpfc_sli4_disable_intr(phba);
5350d872 11551 lpfc_sli4_queue_destroy(phba);
3a55b532
JS
11552
11553 /* Save device state to PCI config space */
11554 pci_save_state(pdev);
11555 pci_set_power_state(pdev, PCI_D3hot);
11556
11557 return 0;
11558}
11559
11560/**
da0436e9 11561 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS
11562 * @pdev: pointer to PCI device
11563 *
da0436e9
JS
11564 * This routine is called from the kernel's PCI subsystem to support system
11565 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
11566 * this method, it restores the device's PCI config space state and fully
11567 * reinitializes the device and brings it online. Note that as the driver
11568 * implements the minimum PM requirements to a power-aware driver's PM for
11569 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11570 * to the suspend() method call will be treated as SUSPEND and the driver
11571 * will fully reinitialize its device during resume() method call, the device
11572 * will be set to PCI_D0 directly in PCI config space before restoring the
11573 * state.
3a55b532
JS
11574 *
11575 * Return code
3772a991
JS
11576 * 0 - driver suspended the device
11577 * Error otherwise
3a55b532
JS
11578 **/
11579static int
da0436e9 11580lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS
11581{
11582 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11583 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 11584 uint32_t intr_mode;
3a55b532
JS
11585 int error;
11586
11587 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 11588 "0292 PCI device Power Management resume.\n");
3a55b532
JS
11589
11590 /* Restore device state from PCI config space */
11591 pci_set_power_state(pdev, PCI_D0);
11592 pci_restore_state(pdev);
1dfb5a47
JS
11593
11594 /*
11595 * As the new kernel behavior of pci_restore_state() API call clears
11596 * device saved_state flag, need to save the restored state again.
11597 */
11598 pci_save_state(pdev);
11599
3a55b532
JS
11600 if (pdev->is_busmaster)
11601 pci_set_master(pdev);
11602
da0436e9 11603 /* Startup the kernel thread for this host adapter. */
3a55b532
JS
11604 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11605 "lpfc_worker_%d", phba->brd_no);
11606 if (IS_ERR(phba->worker_thread)) {
11607 error = PTR_ERR(phba->worker_thread);
11608 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11609 "0293 PM resume failed to start worker "
3a55b532
JS
11610 "thread: error=x%x.\n", error);
11611 return error;
11612 }
11613
5b75da2f 11614 /* Configure and enable interrupt */
da0436e9 11615 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 11616 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 11617 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11618 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS
11619 return -EIO;
11620 } else
11621 phba->intr_mode = intr_mode;
3a55b532
JS
11622
11623 /* Restart HBA and bring it online */
11624 lpfc_sli_brdrestart(phba);
11625 lpfc_online(phba);
11626
5b75da2f
JS
11627 /* Log the current active interrupt mode */
11628 lpfc_log_intr_mode(phba, phba->intr_mode);
11629
3a55b532
JS
11630 return 0;
11631}
11632
75baf696
JS
11633/**
11634 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
11635 * @phba: pointer to lpfc hba data structure.
11636 *
11637 * This routine is called to prepare the SLI4 device for PCI slot recover. It
11638 * aborts all the outstanding SCSI I/Os to the pci device.
11639 **/
11640static void
11641lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
11642{
75baf696
JS
11643 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11644 "2828 PCI channel I/O abort preparing for recovery\n");
11645 /*
11646 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11647 * and let the SCSI mid-layer to retry them to recover.
11648 */
db55fba8 11649 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS
11650}
11651
11652/**
11653 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
11654 * @phba: pointer to lpfc hba data structure.
11655 *
11656 * This routine is called to prepare the SLI4 device for PCI slot reset. It
11657 * disables the device interrupt and pci device, and aborts the internal FCP
11658 * pending I/Os.
11659 **/
11660static void
11661lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
11662{
11663 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11664 "2826 PCI channel disable preparing for reset\n");
11665
11666 /* Block any management I/Os to the device */
618a5230 11667 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS
11668
11669 /* Block all SCSI devices' I/Os on the host */
11670 lpfc_scsi_dev_block(phba);
11671
ea714f3d
JS
11672 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11673 lpfc_sli_flush_fcp_rings(phba);
11674
d36f0170
JS
11675 /* Flush the outstanding NVME IOs if fc4 type enabled. */
11676 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
11677 lpfc_sli_flush_nvme_rings(phba);
11678
75baf696
JS
11679 /* stop all timers */
11680 lpfc_stop_hba_timers(phba);
11681
11682 /* Disable interrupt and pci device */
11683 lpfc_sli4_disable_intr(phba);
5350d872 11684 lpfc_sli4_queue_destroy(phba);
75baf696 11685 pci_disable_device(phba->pcidev);
75baf696
JS
11686}
11687
11688/**
11689 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
11690 * @phba: pointer to lpfc hba data structure.
11691 *
11692 * This routine is called to prepare the SLI4 device for PCI slot permanently
11693 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11694 * pending I/Os.
11695 **/
11696static void
11697lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
11698{
11699 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11700 "2827 PCI channel permanent disable for failure\n");
11701
11702 /* Block all SCSI devices' I/Os on the host */
11703 lpfc_scsi_dev_block(phba);
11704
11705 /* stop all timers */
11706 lpfc_stop_hba_timers(phba);
11707
11708 /* Clean up all driver's outstanding SCSI I/Os */
11709 lpfc_sli_flush_fcp_rings(phba);
d36f0170
JS
11710
11711 /* Flush the outstanding NVME IOs if fc4 type enabled. */
11712 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
11713 lpfc_sli_flush_nvme_rings(phba);
75baf696
JS
11714}
11715
8d63f375 11716/**
da0436e9 11717 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS
11718 * @pdev: pointer to PCI device.
11719 * @state: the current PCI connection state.
8d63f375 11720 *
da0436e9
JS
11721 * This routine is called from the PCI subsystem for error handling to device
11722 * with SLI-4 interface spec. This function is called by the PCI subsystem
11723 * after a PCI bus error affecting this device has been detected. When this
11724 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11725 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11726 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS
11727 *
11728 * Return codes
3772a991
JS
11729 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11730 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11731 **/
3772a991 11732static pci_ers_result_t
da0436e9 11733lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11734{
75baf696
JS
11735 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11736 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11737
11738 switch (state) {
11739 case pci_channel_io_normal:
11740 /* Non-fatal error, prepare for recovery */
11741 lpfc_sli4_prep_dev_for_recover(phba);
11742 return PCI_ERS_RESULT_CAN_RECOVER;
11743 case pci_channel_io_frozen:
11744 /* Fatal error, prepare for slot reset */
11745 lpfc_sli4_prep_dev_for_reset(phba);
11746 return PCI_ERS_RESULT_NEED_RESET;
11747 case pci_channel_io_perm_failure:
11748 /* Permanent failure, prepare for device down */
11749 lpfc_sli4_prep_dev_for_perm_failure(phba);
11750 return PCI_ERS_RESULT_DISCONNECT;
11751 default:
11752 /* Unknown state, prepare and request slot reset */
11753 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11754 "2825 Unknown PCI error state: x%x\n", state);
11755 lpfc_sli4_prep_dev_for_reset(phba);
11756 return PCI_ERS_RESULT_NEED_RESET;
11757 }
8d63f375
LV
11758}
11759
11760/**
da0436e9 11761 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS
11762 * @pdev: pointer to PCI device.
11763 *
da0436e9
JS
11764 * This routine is called from the PCI subsystem for error handling to device
11765 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11766 * restart the PCI card from scratch, as if from a cold-boot. During the
11767 * PCI subsystem error recovery, after the driver returns
3772a991 11768 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS
11769 * recovery and then call this routine before calling the .resume method to
11770 * recover the device. This function will initialize the HBA device, enable
11771 * the interrupt, but it will just put the HBA to offline state without
11772 * passing any I/O traffic.
8d63f375 11773 *
e59058c4 11774 * Return codes
3772a991
JS
11775 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11776 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11777 */
3772a991 11778static pci_ers_result_t
da0436e9 11779lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11780{
75baf696
JS
11781 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11782 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11783 struct lpfc_sli *psli = &phba->sli;
11784 uint32_t intr_mode;
11785
11786 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11787 if (pci_enable_device_mem(pdev)) {
11788 printk(KERN_ERR "lpfc: Cannot re-enable "
11789 "PCI device after reset.\n");
11790 return PCI_ERS_RESULT_DISCONNECT;
11791 }
11792
11793 pci_restore_state(pdev);
0a96e975
JS
11794
11795 /*
11796 * As the new kernel behavior of pci_restore_state() API call clears
11797 * device saved_state flag, need to save the restored state again.
11798 */
11799 pci_save_state(pdev);
11800
75baf696
JS
11801 if (pdev->is_busmaster)
11802 pci_set_master(pdev);
11803
11804 spin_lock_irq(&phba->hbalock);
11805 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11806 spin_unlock_irq(&phba->hbalock);
11807
11808 /* Configure and enable interrupt */
11809 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11810 if (intr_mode == LPFC_INTR_ERROR) {
11811 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11812 "2824 Cannot re-enable interrupt after "
11813 "slot reset.\n");
11814 return PCI_ERS_RESULT_DISCONNECT;
11815 } else
11816 phba->intr_mode = intr_mode;
11817
11818 /* Log the current active interrupt mode */
11819 lpfc_log_intr_mode(phba, phba->intr_mode);
11820
8d63f375
LV
11821 return PCI_ERS_RESULT_RECOVERED;
11822}
11823
11824/**
da0436e9 11825 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11826 * @pdev: pointer to PCI device
8d63f375 11827 *
3772a991 11828 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11829 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS
11830 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11831 * error recovery. After this call, traffic can start to flow from this device
11832 * again.
da0436e9 11833 **/
3772a991 11834static void
da0436e9 11835lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11836{
75baf696
JS
11837 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11838 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11839
11840 /*
11841 * In case of slot reset, as function reset is performed through
11842 * mailbox command which needs DMA to be enabled, this operation
11843 * has to be moved to the io resume phase. Taking device offline
11844 * will perform the necessary cleanup.
11845 */
11846 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11847 /* Perform device reset */
618a5230 11848 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS
11849 lpfc_offline(phba);
11850 lpfc_sli_brdrestart(phba);
11851 /* Bring the device back online */
11852 lpfc_online(phba);
11853 }
11854
11855 /* Clean up Advanced Error Reporting (AER) if needed */
11856 if (phba->hba_flag & HBA_AER_ENABLED)
11857 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV
11858}
11859
3772a991
JS
11860/**
11861 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11862 * @pdev: pointer to PCI device
11863 * @pid: pointer to PCI device identifier
11864 *
11865 * This routine is to be registered to the kernel's PCI subsystem. When an
11866 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11867 * at PCI device-specific information of the device and driver to see if the
11868 * driver state that it can support this kind of device. If the match is
11869 * successful, the driver core invokes this routine. This routine dispatches
11870 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11871 * do all the initialization that it needs to do to handle the HBA device
11872 * properly.
11873 *
11874 * Return code
11875 * 0 - driver can claim the device
11876 * negative value - driver can not claim the device
11877 **/
6f039790 11878static int
3772a991
JS
11879lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11880{
11881 int rc;
8fa38513 11882 struct lpfc_sli_intf intf;
3772a991 11883
28baac74 11884 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS
11885 return -ENODEV;
11886
8fa38513 11887 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11888 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11889 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11890 else
3772a991 11891 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11892
3772a991
JS
11893 return rc;
11894}
11895
11896/**
11897 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11898 * @pdev: pointer to PCI device
11899 *
11900 * This routine is to be registered to the kernel's PCI subsystem. When an
11901 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11902 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11903 * remove routine, which will perform all the necessary cleanup for the
11904 * device to be removed from the PCI subsystem properly.
11905 **/
6f039790 11906static void
3772a991
JS
11907lpfc_pci_remove_one(struct pci_dev *pdev)
11908{
11909 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11910 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11911
11912 switch (phba->pci_dev_grp) {
11913 case LPFC_PCI_DEV_LP:
11914 lpfc_pci_remove_one_s3(pdev);
11915 break;
da0436e9
JS
11916 case LPFC_PCI_DEV_OC:
11917 lpfc_pci_remove_one_s4(pdev);
11918 break;
3772a991
JS
11919 default:
11920 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11921 "1424 Invalid PCI device group: 0x%x\n",
11922 phba->pci_dev_grp);
11923 break;
11924 }
11925 return;
11926}
11927
11928/**
11929 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11930 * @pdev: pointer to PCI device
11931 * @msg: power management message
11932 *
11933 * This routine is to be registered to the kernel's PCI subsystem to support
11934 * system Power Management (PM). When PM invokes this method, it dispatches
11935 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11936 * suspend the device.
11937 *
11938 * Return code
11939 * 0 - driver suspended the device
11940 * Error otherwise
11941 **/
11942static int
11943lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11944{
11945 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11946 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11947 int rc = -ENODEV;
11948
11949 switch (phba->pci_dev_grp) {
11950 case LPFC_PCI_DEV_LP:
11951 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11952 break;
da0436e9
JS
11953 case LPFC_PCI_DEV_OC:
11954 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11955 break;
3772a991
JS
11956 default:
11957 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11958 "1425 Invalid PCI device group: 0x%x\n",
11959 phba->pci_dev_grp);
11960 break;
11961 }
11962 return rc;
11963}
11964
11965/**
11966 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
11967 * @pdev: pointer to PCI device
11968 *
11969 * This routine is to be registered to the kernel's PCI subsystem to support
11970 * system Power Management (PM). When PM invokes this method, it dispatches
11971 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
11972 * resume the device.
11973 *
11974 * Return code
11975 * 0 - driver suspended the device
11976 * Error otherwise
11977 **/
11978static int
11979lpfc_pci_resume_one(struct pci_dev *pdev)
11980{
11981 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11982 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11983 int rc = -ENODEV;
11984
11985 switch (phba->pci_dev_grp) {
11986 case LPFC_PCI_DEV_LP:
11987 rc = lpfc_pci_resume_one_s3(pdev);
11988 break;
da0436e9
JS
11989 case LPFC_PCI_DEV_OC:
11990 rc = lpfc_pci_resume_one_s4(pdev);
11991 break;
3772a991
JS
11992 default:
11993 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11994 "1426 Invalid PCI device group: 0x%x\n",
11995 phba->pci_dev_grp);
11996 break;
11997 }
11998 return rc;
11999}
12000
12001/**
12002 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
12003 * @pdev: pointer to PCI device.
12004 * @state: the current PCI connection state.
12005 *
12006 * This routine is registered to the PCI subsystem for error handling. This
12007 * function is called by the PCI subsystem after a PCI bus error affecting
12008 * this device has been detected. When this routine is invoked, it dispatches
12009 * the action to the proper SLI-3 or SLI-4 device error detected handling
12010 * routine, which will perform the proper error detected operation.
12011 *
12012 * Return codes
12013 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
12014 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
12015 **/
12016static pci_ers_result_t
12017lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
12018{
12019 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12020 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12021 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
12022
12023 switch (phba->pci_dev_grp) {
12024 case LPFC_PCI_DEV_LP:
12025 rc = lpfc_io_error_detected_s3(pdev, state);
12026 break;
da0436e9
JS
12027 case LPFC_PCI_DEV_OC:
12028 rc = lpfc_io_error_detected_s4(pdev, state);
12029 break;
3772a991
JS
12030 default:
12031 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12032 "1427 Invalid PCI device group: 0x%x\n",
12033 phba->pci_dev_grp);
12034 break;
12035 }
12036 return rc;
12037}
12038
12039/**
12040 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
12041 * @pdev: pointer to PCI device.
12042 *
12043 * This routine is registered to the PCI subsystem for error handling. This
12044 * function is called after PCI bus has been reset to restart the PCI card
12045 * from scratch, as if from a cold-boot. When this routine is invoked, it
12046 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
12047 * routine, which will perform the proper device reset.
12048 *
12049 * Return codes
12050 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
12051 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
12052 **/
12053static pci_ers_result_t
12054lpfc_io_slot_reset(struct pci_dev *pdev)
12055{
12056 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12057 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12058 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
12059
12060 switch (phba->pci_dev_grp) {
12061 case LPFC_PCI_DEV_LP:
12062 rc = lpfc_io_slot_reset_s3(pdev);
12063 break;
da0436e9
JS
12064 case LPFC_PCI_DEV_OC:
12065 rc = lpfc_io_slot_reset_s4(pdev);
12066 break;
3772a991
JS
12067 default:
12068 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12069 "1428 Invalid PCI device group: 0x%x\n",
12070 phba->pci_dev_grp);
12071 break;
12072 }
12073 return rc;
12074}
12075
12076/**
12077 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
12078 * @pdev: pointer to PCI device
12079 *
12080 * This routine is registered to the PCI subsystem for error handling. It
12081 * is called when kernel error recovery tells the lpfc driver that it is
12082 * OK to resume normal PCI operation after PCI bus error recovery. When
12083 * this routine is invoked, it dispatches the action to the proper SLI-3
12084 * or SLI-4 device io_resume routine, which will resume the device operation.
12085 **/
12086static void
12087lpfc_io_resume(struct pci_dev *pdev)
12088{
12089 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12090 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12091
12092 switch (phba->pci_dev_grp) {
12093 case LPFC_PCI_DEV_LP:
12094 lpfc_io_resume_s3(pdev);
12095 break;
da0436e9
JS
12096 case LPFC_PCI_DEV_OC:
12097 lpfc_io_resume_s4(pdev);
12098 break;
3772a991
JS
12099 default:
12100 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12101 "1429 Invalid PCI device group: 0x%x\n",
12102 phba->pci_dev_grp);
12103 break;
12104 }
12105 return;
12106}
12107
1ba981fd
JS
12108/**
12109 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
12110 * @phba: pointer to lpfc hba data structure.
12111 *
12112 * This routine checks to see if OAS is supported for this adapter. If
12113 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
12114 * the enable oas flag is cleared and the pool created for OAS device data
12115 * is destroyed.
12116 *
12117 **/
12118void
12119lpfc_sli4_oas_verify(struct lpfc_hba *phba)
12120{
12121
12122 if (!phba->cfg_EnableXLane)
12123 return;
12124
12125 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
12126 phba->cfg_fof = 1;
12127 } else {
f38fa0bb 12128 phba->cfg_fof = 0;
1ba981fd
JS
12129 if (phba->device_data_mem_pool)
12130 mempool_destroy(phba->device_data_mem_pool);
12131 phba->device_data_mem_pool = NULL;
12132 }
12133
12134 return;
12135}
12136
12137/**
12138 * lpfc_fof_queue_setup - Set up all the fof queues
12139 * @phba: pointer to lpfc hba data structure.
12140 *
12141 * This routine is invoked to set up all the fof queues for the FC HBA
12142 * operation.
12143 *
12144 * Return codes
12145 * 0 - successful
12146 * -ENOMEM - No available memory
12147 **/
12148int
12149lpfc_fof_queue_setup(struct lpfc_hba *phba)
12150{
895427bd 12151 struct lpfc_sli_ring *pring;
1ba981fd
JS
12152 int rc;
12153
12154 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
12155 if (rc)
12156 return -ENOMEM;
12157
f38fa0bb 12158 if (phba->cfg_fof) {
1ba981fd
JS
12159
12160 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
12161 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
12162 if (rc)
12163 goto out_oas_cq;
12164
12165 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
12166 phba->sli4_hba.oas_cq, LPFC_FCP);
12167 if (rc)
12168 goto out_oas_wq;
12169
895427bd
JS
12170 /* Bind this CQ/WQ to the NVME ring */
12171 pring = phba->sli4_hba.oas_wq->pring;
12172 pring->sli.sli4.wqp =
12173 (void *)phba->sli4_hba.oas_wq;
12174 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS
12175 }
12176
12177 return 0;
12178
12179out_oas_wq:
f38fa0bb 12180 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS
12181out_oas_cq:
12182 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
12183 return rc;
12184
12185}
12186
12187/**
12188 * lpfc_fof_queue_create - Create all the fof queues
12189 * @phba: pointer to lpfc hba data structure.
12190 *
12191 * This routine is invoked to allocate all the fof queues for the FC HBA
12192 * operation. For each SLI4 queue type, the parameters such as queue entry
12193 * count (queue depth) shall be taken from the module parameter. For now,
12194 * we just use some constant number as place holder.
12195 *
12196 * Return codes
12197 * 0 - successful
12198 * -ENOMEM - No availble memory
12199 * -EIO - The mailbox failed to complete successfully.
12200 **/
12201int
12202lpfc_fof_queue_create(struct lpfc_hba *phba)
12203{
12204 struct lpfc_queue *qdesc;
7e04e21a 12205 uint32_t wqesize;
1ba981fd
JS
12206
12207 /* Create FOF EQ */
7fdcdd24
JS
12208 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
12209 phba->sli4_hba.eq_esize,
1ba981fd
JS
12210 phba->sli4_hba.eq_ecount);
12211 if (!qdesc)
12212 goto out_error;
12213
12214 phba->sli4_hba.fof_eq = qdesc;
12215
f38fa0bb 12216 if (phba->cfg_fof) {
1ba981fd
JS
12217
12218 /* Create OAS CQ */
7fdcdd24
JS
12219 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
12220 phba->sli4_hba.cq_esize,
12221 phba->sli4_hba.cq_ecount);
1ba981fd
JS
12222 if (!qdesc)
12223 goto out_error;
12224
12225 phba->sli4_hba.oas_cq = qdesc;
12226
12227 /* Create OAS WQ */
7e04e21a
JS
12228 wqesize = (phba->fcp_embed_io) ?
12229 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
7fdcdd24
JS
12230 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
12231 wqesize,
1ba981fd 12232 phba->sli4_hba.wq_ecount);
7e04e21a 12233
1ba981fd
JS
12234 if (!qdesc)
12235 goto out_error;
12236
12237 phba->sli4_hba.oas_wq = qdesc;
895427bd 12238 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS
12239
12240 }
12241 return 0;
12242
12243out_error:
12244 lpfc_fof_queue_destroy(phba);
12245 return -ENOMEM;
12246}
12247
12248/**
12249 * lpfc_fof_queue_destroy - Destroy all the fof queues
12250 * @phba: pointer to lpfc hba data structure.
12251 *
12252 * This routine is invoked to release all the SLI4 queues with the FC HBA
12253 * operation.
12254 *
12255 * Return codes
12256 * 0 - successful
12257 **/
12258int
12259lpfc_fof_queue_destroy(struct lpfc_hba *phba)
12260{
12261 /* Release FOF Event queue */
12262 if (phba->sli4_hba.fof_eq != NULL) {
12263 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
12264 phba->sli4_hba.fof_eq = NULL;
12265 }
12266
12267 /* Release OAS Completion queue */
12268 if (phba->sli4_hba.oas_cq != NULL) {
12269 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
12270 phba->sli4_hba.oas_cq = NULL;
12271 }
12272
12273 /* Release OAS Work queue */
12274 if (phba->sli4_hba.oas_wq != NULL) {
12275 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
12276 phba->sli4_hba.oas_wq = NULL;
12277 }
12278 return 0;
12279}
12280
dea3101e
JB
12281MODULE_DEVICE_TABLE(pci, lpfc_id_table);
12282
a55b2d21 12283static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV
12284 .error_detected = lpfc_io_error_detected,
12285 .slot_reset = lpfc_io_slot_reset,
12286 .resume = lpfc_io_resume,
12287};
12288
dea3101e
JB
12289static struct pci_driver lpfc_driver = {
12290 .name = LPFC_DRIVER_NAME,
12291 .id_table = lpfc_id_table,
12292 .probe = lpfc_pci_probe_one,
6f039790 12293 .remove = lpfc_pci_remove_one,
85e8a239 12294 .shutdown = lpfc_pci_remove_one,
3a55b532 12295 .suspend = lpfc_pci_suspend_one,
3772a991 12296 .resume = lpfc_pci_resume_one,
2e0fef85 12297 .err_handler = &lpfc_err_handler,
dea3101e
JB
12298};
12299
3ef6d24c 12300static const struct file_operations lpfc_mgmt_fop = {
858feacd 12301 .owner = THIS_MODULE,
3ef6d24c
JS
12302};
12303
12304static struct miscdevice lpfc_mgmt_dev = {
12305 .minor = MISC_DYNAMIC_MINOR,
12306 .name = "lpfcmgmt",
12307 .fops = &lpfc_mgmt_fop,
12308};
12309
e59058c4 12310/**
3621a710 12311 * lpfc_init - lpfc module initialization routine
e59058c4
JS
12312 *
12313 * This routine is to be invoked when the lpfc module is loaded into the
12314 * kernel. The special kernel macro module_init() is used to indicate the
12315 * role of this routine to the kernel as lpfc module entry point.
12316 *
12317 * Return codes
12318 * 0 - successful
12319 * -ENOMEM - FC attach transport failed
12320 * all others - failed
12321 */
dea3101e
JB
12322static int __init
12323lpfc_init(void)
12324{
12325 int error = 0;
12326
12327 printk(LPFC_MODULE_DESC "\n");
c44ce173 12328 printk(LPFC_COPYRIGHT "\n");
dea3101e 12329
3ef6d24c
JS
12330 error = misc_register(&lpfc_mgmt_dev);
12331 if (error)
12332 printk(KERN_ERR "Could not register lpfcmgmt device, "
12333 "misc_register returned with status %d", error);
12334
458c083e
JS
12335 lpfc_transport_functions.vport_create = lpfc_vport_create;
12336 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e
JB
12337 lpfc_transport_template =
12338 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 12339 if (lpfc_transport_template == NULL)
dea3101e 12340 return -ENOMEM;
458c083e
JS
12341 lpfc_vport_transport_template =
12342 fc_attach_transport(&lpfc_vport_transport_functions);
12343 if (lpfc_vport_transport_template == NULL) {
12344 fc_release_transport(lpfc_transport_template);
12345 return -ENOMEM;
7ee5d43e 12346 }
7bb03bbf
JS
12347
12348 /* Initialize in case vector mapping is needed */
b246de17 12349 lpfc_used_cpu = NULL;
2ea259ee 12350 lpfc_present_cpu = num_present_cpus();
7bb03bbf 12351
dea3101e 12352 error = pci_register_driver(&lpfc_driver);
92d7f7b0 12353 if (error) {
dea3101e 12354 fc_release_transport(lpfc_transport_template);
458c083e 12355 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 12356 }
dea3101e
JB
12357
12358 return error;
12359}
12360
e59058c4 12361/**
3621a710 12362 * lpfc_exit - lpfc module removal routine
e59058c4
JS
12363 *
12364 * This routine is invoked when the lpfc module is removed from the kernel.
12365 * The special kernel macro module_exit() is used to indicate the role of
12366 * this routine to the kernel as lpfc module exit point.
12367 */
dea3101e
JB
12368static void __exit
12369lpfc_exit(void)
12370{
3ef6d24c 12371 misc_deregister(&lpfc_mgmt_dev);
dea3101e
JB
12372 pci_unregister_driver(&lpfc_driver);
12373 fc_release_transport(lpfc_transport_template);
458c083e 12374 fc_release_transport(lpfc_vport_transport_template);
81301a9b 12375 if (_dump_buf_data) {
6a9c52cf
JS
12376 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
12377 "_dump_buf_data at 0x%p\n",
81301a9b
JS
12378 (1L << _dump_buf_data_order), _dump_buf_data);
12379 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
12380 }
12381
12382 if (_dump_buf_dif) {
6a9c52cf
JS
12383 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
12384 "_dump_buf_dif at 0x%p\n",
81301a9b
JS
12385 (1L << _dump_buf_dif_order), _dump_buf_dif);
12386 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
12387 }
b246de17 12388 kfree(lpfc_used_cpu);
7973967f 12389 idr_destroy(&lpfc_hba_index);
dea3101e
JB
12390}
12391
12392module_init(lpfc_init);
12393module_exit(lpfc_exit);
12394MODULE_LICENSE("GPL");
12395MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 12396MODULE_AUTHOR("Broadcom");
dea3101e 12397MODULE_VERSION("0:" LPFC_DRIVER_VERSION);