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CommitLineData
dea3101e
JB
1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
50611577 4 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB
8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC
10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e
JB
20 *******************************************************************/
21
dea3101e
JB
22#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/idr.h>
26#include <linux/interrupt.h>
acf3368f 27#include <linux/module.h>
dea3101e
JB
28#include <linux/kthread.h>
29#include <linux/pci.h>
30#include <linux/spinlock.h>
92d7f7b0 31#include <linux/ctype.h>
0d878419 32#include <linux/aer.h>
5a0e3ad6 33#include <linux/slab.h>
52d52440 34#include <linux/firmware.h>
3ef6d24c 35#include <linux/miscdevice.h>
7bb03bbf 36#include <linux/percpu.h>
895427bd 37#include <linux/msi.h>
dea3101e 38
91886523 39#include <scsi/scsi.h>
dea3101e
JB
40#include <scsi/scsi_device.h>
41#include <scsi/scsi_host.h>
42#include <scsi/scsi_transport_fc.h>
43
da0436e9 44#include "lpfc_hw4.h"
dea3101e
JB
45#include "lpfc_hw.h"
46#include "lpfc_sli.h"
da0436e9 47#include "lpfc_sli4.h"
ea2151b4 48#include "lpfc_nl.h"
dea3101e 49#include "lpfc_disc.h"
dea3101e 50#include "lpfc.h"
895427bd
JS
51#include "lpfc_scsi.h"
52#include "lpfc_nvme.h"
dea3101e
JB
53#include "lpfc_logmsg.h"
54#include "lpfc_crtn.h"
92d7f7b0 55#include "lpfc_vport.h"
dea3101e 56#include "lpfc_version.h"
12f44457 57#include "lpfc_ids.h"
dea3101e 58
81301a9b
JS
59char *_dump_buf_data;
60unsigned long _dump_buf_data_order;
61char *_dump_buf_dif;
62unsigned long _dump_buf_dif_order;
63spinlock_t _dump_buf_lock;
64
7bb03bbf 65/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS
66uint16_t *lpfc_used_cpu;
67uint32_t lpfc_present_cpu;
7bb03bbf 68
dea3101e
JB
69static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
70static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 71static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS
72static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
73static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 74static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80
JS
75static void lpfc_free_els_sgl_list(struct lpfc_hba *);
76static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS
77static int lpfc_init_active_sgl_array(struct lpfc_hba *);
78static void lpfc_free_active_sgl(struct lpfc_hba *);
79static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
80static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
81static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
82static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
83static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS
84static void lpfc_sli4_disable_intr(struct lpfc_hba *);
85static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 86static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e
JB
87
88static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 89static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e
JB
90static DEFINE_IDR(lpfc_hba_index);
91
e59058c4 92/**
3621a710 93 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS
94 * @phba: pointer to lpfc hba data structure.
95 *
96 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
97 * mailbox command. It retrieves the revision information from the HBA and
98 * collects the Vital Product Data (VPD) about the HBA for preparing the
99 * configuration of the HBA.
100 *
101 * Return codes:
102 * 0 - success.
103 * -ERESTART - requests the SLI layer to reset the HBA and try again.
104 * Any other value - indicates an error.
105 **/
dea3101e 106int
2e0fef85 107lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e
JB
108{
109 lpfc_vpd_t *vp = &phba->vpd;
110 int i = 0, rc;
111 LPFC_MBOXQ_t *pmb;
112 MAILBOX_t *mb;
113 char *lpfc_vpd_data = NULL;
114 uint16_t offset = 0;
115 static char licensed[56] =
116 "key unlock for use with gnu public licensed code only\0";
65a29c16 117 static int init_key = 1;
dea3101e
JB
118
119 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
120 if (!pmb) {
2e0fef85 121 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
122 return -ENOMEM;
123 }
124
04c68496 125 mb = &pmb->u.mb;
2e0fef85 126 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
127
128 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS
129 if (init_key) {
130 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 131
65a29c16
JS
132 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
133 *ptext = cpu_to_be32(*ptext);
134 init_key = 0;
135 }
dea3101e
JB
136
137 lpfc_read_nv(phba, pmb);
138 memset((char*)mb->un.varRDnvp.rsvd3, 0,
139 sizeof (mb->un.varRDnvp.rsvd3));
140 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
141 sizeof (licensed));
142
143 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
144
145 if (rc != MBX_SUCCESS) {
ed957684 146 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 147 "0324 Config Port initialization "
dea3101e
JB
148 "error, mbxCmd x%x READ_NVPARM, "
149 "mbxStatus x%x\n",
dea3101e
JB
150 mb->mbxCommand, mb->mbxStatus);
151 mempool_free(pmb, phba->mbox_mem_pool);
152 return -ERESTART;
153 }
154 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS
155 sizeof(phba->wwnn));
156 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
157 sizeof(phba->wwpn));
dea3101e
JB
158 }
159
92d7f7b0
JS
160 phba->sli3_options = 0x0;
161
dea3101e
JB
162 /* Setup and issue mailbox READ REV command */
163 lpfc_read_rev(phba, pmb);
164 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
165 if (rc != MBX_SUCCESS) {
ed957684 166 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 167 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 168 "READ_REV, mbxStatus x%x\n",
dea3101e
JB
169 mb->mbxCommand, mb->mbxStatus);
170 mempool_free( pmb, phba->mbox_mem_pool);
171 return -ERESTART;
172 }
173
92d7f7b0 174
1de933f3
JSEC
175 /*
176 * The value of rr must be 1 since the driver set the cv field to 1.
177 * This setting requires the FW to set all revision fields.
dea3101e 178 */
1de933f3 179 if (mb->un.varRdRev.rr == 0) {
dea3101e 180 vp->rev.rBit = 0;
1de933f3 181 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS
182 "0440 Adapter failed to init, READ_REV has "
183 "missing revision information.\n");
dea3101e
JB
184 mempool_free(pmb, phba->mbox_mem_pool);
185 return -ERESTART;
dea3101e
JB
186 }
187
495a714c
JS
188 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
189 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 190 return -EINVAL;
495a714c 191 }
ed957684 192
dea3101e 193 /* Save information as VPD data */
1de933f3 194 vp->rev.rBit = 1;
92d7f7b0 195 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC
196 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
197 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
198 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
199 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e
JB
200 vp->rev.biuRev = mb->un.varRdRev.biuRev;
201 vp->rev.smRev = mb->un.varRdRev.smRev;
202 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
203 vp->rev.endecRev = mb->un.varRdRev.endecRev;
204 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
205 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
206 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
207 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
208 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
209 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
210
92d7f7b0
JS
211 /* If the sli feature level is less then 9, we must
212 * tear down all RPIs and VPIs on link down if NPIV
213 * is enabled.
214 */
215 if (vp->rev.feaLevelHigh < 9)
216 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
217
dea3101e
JB
218 if (lpfc_is_LC_HBA(phba->pcidev->device))
219 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
220 sizeof (phba->RandomData));
221
dea3101e 222 /* Get adapter VPD information */
dea3101e
JB
223 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
224 if (!lpfc_vpd_data)
d7c255b2 225 goto out_free_mbox;
dea3101e 226 do {
a0c87cbd 227 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e
JB
228 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
229
230 if (rc != MBX_SUCCESS) {
231 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 232 "0441 VPD not present on adapter, "
dea3101e 233 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 234 mb->mbxCommand, mb->mbxStatus);
74b72a59 235 mb->un.varDmp.word_cnt = 0;
dea3101e 236 }
04c68496
JS
237 /* dump mem may return a zero when finished or we got a
238 * mailbox error, either way we are done.
239 */
240 if (mb->un.varDmp.word_cnt == 0)
241 break;
74b72a59
JW
242 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
243 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS
244 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
245 lpfc_vpd_data + offset,
92d7f7b0 246 mb->un.varDmp.word_cnt);
dea3101e 247 offset += mb->un.varDmp.word_cnt;
74b72a59
JW
248 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
249 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e
JB
250
251 kfree(lpfc_vpd_data);
dea3101e
JB
252out_free_mbox:
253 mempool_free(pmb, phba->mbox_mem_pool);
254 return 0;
255}
256
e59058c4 257/**
3621a710 258 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS
259 * @phba: pointer to lpfc hba data structure.
260 * @pmboxq: pointer to the driver internal queue element for mailbox command.
261 *
262 * This is the completion handler for driver's configuring asynchronous event
263 * mailbox command to the device. If the mailbox command returns successfully,
264 * it will set internal async event support flag to 1; otherwise, it will
265 * set internal async event support flag to 0.
266 **/
57127f15
JS
267static void
268lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
269{
04c68496 270 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS
271 phba->temp_sensor_support = 1;
272 else
273 phba->temp_sensor_support = 0;
274 mempool_free(pmboxq, phba->mbox_mem_pool);
275 return;
276}
277
97207482 278/**
3621a710 279 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS
280 * @phba: pointer to lpfc hba data structure.
281 * @pmboxq: pointer to the driver internal queue element for mailbox command.
282 *
283 * This is the completion handler for dump mailbox command for getting
284 * wake up parameters. When this command complete, the response contain
285 * Option rom version of the HBA. This function translate the version number
286 * into a human readable string and store it in OptionROMVersion.
287 **/
288static void
289lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
290{
291 struct prog_id *prg;
292 uint32_t prog_id_word;
293 char dist = ' ';
294 /* character array used for decoding dist type. */
295 char dist_char[] = "nabx";
296
04c68496 297 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 298 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 299 return;
9f1e1b50 300 }
97207482
JS
301
302 prg = (struct prog_id *) &prog_id_word;
303
304 /* word 7 contain option rom version */
04c68496 305 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS
306
307 /* Decode the Option rom version word to a readable string */
308 if (prg->dist < 4)
309 dist = dist_char[prg->dist];
310
311 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 312 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS
313 prg->ver, prg->rev, prg->lev);
314 else
a2fc4aef 315 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS
316 prg->ver, prg->rev, prg->lev,
317 dist, prg->num);
9f1e1b50 318 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS
319 return;
320}
321
0558056c
JS
322/**
323 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
324 * cfg_soft_wwnn, cfg_soft_wwpn
325 * @vport: pointer to lpfc vport data structure.
326 *
327 *
328 * Return codes
329 * None.
330 **/
331void
332lpfc_update_vport_wwn(struct lpfc_vport *vport)
333{
334 /* If the soft name exists then update it using the service params */
335 if (vport->phba->cfg_soft_wwnn)
336 u64_to_wwn(vport->phba->cfg_soft_wwnn,
337 vport->fc_sparam.nodeName.u.wwn);
338 if (vport->phba->cfg_soft_wwpn)
339 u64_to_wwn(vport->phba->cfg_soft_wwpn,
340 vport->fc_sparam.portName.u.wwn);
341
342 /*
343 * If the name is empty or there exists a soft name
344 * then copy the service params name, otherwise use the fc name
345 */
346 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
347 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
348 sizeof(struct lpfc_name));
349 else
350 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
351 sizeof(struct lpfc_name));
352
353 if (vport->fc_portname.u.wwn[0] == 0 || vport->phba->cfg_soft_wwpn)
354 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
355 sizeof(struct lpfc_name));
356 else
357 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
358 sizeof(struct lpfc_name));
359}
360
e59058c4 361/**
3621a710 362 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS
363 * @phba: pointer to lpfc hba data structure.
364 *
365 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
366 * command call. It performs all internal resource and state setups on the
367 * port: post IOCB buffers, enable appropriate host interrupt attentions,
368 * ELS ring timers, etc.
369 *
370 * Return codes
371 * 0 - success.
372 * Any other value - error.
373 **/
dea3101e 374int
2e0fef85 375lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 376{
2e0fef85 377 struct lpfc_vport *vport = phba->pport;
a257bf90 378 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e
JB
379 LPFC_MBOXQ_t *pmb;
380 MAILBOX_t *mb;
381 struct lpfc_dmabuf *mp;
382 struct lpfc_sli *psli = &phba->sli;
383 uint32_t status, timeout;
2e0fef85
JS
384 int i, j;
385 int rc;
dea3101e 386
7af67051
JS
387 spin_lock_irq(&phba->hbalock);
388 /*
389 * If the Config port completed correctly the HBA is not
390 * over heated any more.
391 */
392 if (phba->over_temp_state == HBA_OVER_TEMP)
393 phba->over_temp_state = HBA_NORMAL_TEMP;
394 spin_unlock_irq(&phba->hbalock);
395
dea3101e
JB
396 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
397 if (!pmb) {
2e0fef85 398 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
399 return -ENOMEM;
400 }
04c68496 401 mb = &pmb->u.mb;
dea3101e 402
dea3101e 403 /* Get login parameters for NID. */
9f1177a3
JS
404 rc = lpfc_read_sparam(phba, pmb, 0);
405 if (rc) {
406 mempool_free(pmb, phba->mbox_mem_pool);
407 return -ENOMEM;
408 }
409
ed957684 410 pmb->vport = vport;
dea3101e 411 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 412 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 413 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 414 "READ_SPARM mbxStatus x%x\n",
dea3101e 415 mb->mbxCommand, mb->mbxStatus);
2e0fef85 416 phba->link_state = LPFC_HBA_ERROR;
dea3101e 417 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 418 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
419 lpfc_mbuf_free(phba, mp->virt, mp->phys);
420 kfree(mp);
421 return -EIO;
422 }
423
424 mp = (struct lpfc_dmabuf *) pmb->context1;
425
2e0fef85 426 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e
JB
427 lpfc_mbuf_free(phba, mp->virt, mp->phys);
428 kfree(mp);
429 pmb->context1 = NULL;
0558056c 430 lpfc_update_vport_wwn(vport);
a257bf90
JS
431
432 /* Update the fc_host data structures with new wwn. */
433 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
434 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 435 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 436
dea3101e
JB
437 /* If no serial number in VPD data, use low 6 bytes of WWNN */
438 /* This should be consolidated into parse_vpd ? - mr */
439 if (phba->SerialNumber[0] == 0) {
440 uint8_t *outptr;
441
2e0fef85 442 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e
JB
443 for (i = 0; i < 12; i++) {
444 status = *outptr++;
445 j = ((status & 0xf0) >> 4);
446 if (j <= 9)
447 phba->SerialNumber[i] =
448 (char)((uint8_t) 0x30 + (uint8_t) j);
449 else
450 phba->SerialNumber[i] =
451 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
452 i++;
453 j = (status & 0xf);
454 if (j <= 9)
455 phba->SerialNumber[i] =
456 (char)((uint8_t) 0x30 + (uint8_t) j);
457 else
458 phba->SerialNumber[i] =
459 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
460 }
461 }
462
dea3101e 463 lpfc_read_config(phba, pmb);
ed957684 464 pmb->vport = vport;
dea3101e 465 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 466 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 467 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 468 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 469 mb->mbxCommand, mb->mbxStatus);
2e0fef85 470 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
471 mempool_free( pmb, phba->mbox_mem_pool);
472 return -EIO;
473 }
474
a0c87cbd
JS
475 /* Check if the port is disabled */
476 lpfc_sli_read_link_ste(phba);
477
dea3101e 478 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
479 i = (mb->un.varRdConfig.max_xri + 1);
480 if (phba->cfg_hba_queue_depth > i) {
481 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
482 "3359 HBA queue depth changed from %d to %d\n",
483 phba->cfg_hba_queue_depth, i);
484 phba->cfg_hba_queue_depth = i;
485 }
486
487 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
488 i = (mb->un.varRdConfig.max_xri >> 3);
489 if (phba->pport->cfg_lun_queue_depth > i) {
490 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
491 "3360 LUN queue depth changed from %d to %d\n",
492 phba->pport->cfg_lun_queue_depth, i);
493 phba->pport->cfg_lun_queue_depth = i;
494 }
dea3101e
JB
495
496 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW
497
498 /* Get the default values for Model Name and Description */
499 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
500
2e0fef85 501 phba->link_state = LPFC_LINK_DOWN;
dea3101e 502
0b727fea 503 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS
504 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
505 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
506 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
507 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e
JB
508
509 /* Post receive buffers for desired rings */
ed957684
JS
510 if (phba->sli_rev != 3)
511 lpfc_post_rcv_buf(phba);
dea3101e 512
9399627f
JS
513 /*
514 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
515 */
516 if (phba->intr_type == MSIX) {
517 rc = lpfc_config_msi(phba, pmb);
518 if (rc) {
519 mempool_free(pmb, phba->mbox_mem_pool);
520 return -EIO;
521 }
522 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
523 if (rc != MBX_SUCCESS) {
524 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
525 "0352 Config MSI mailbox command "
526 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS
527 pmb->u.mb.mbxCommand,
528 pmb->u.mb.mbxStatus);
9399627f
JS
529 mempool_free(pmb, phba->mbox_mem_pool);
530 return -EIO;
531 }
532 }
533
04c68496 534 spin_lock_irq(&phba->hbalock);
9399627f
JS
535 /* Initialize ERATT handling flag */
536 phba->hba_flag &= ~HBA_ERATT_HANDLED;
537
dea3101e 538 /* Enable appropriate host interrupts */
9940b97b
JS
539 if (lpfc_readl(phba->HCregaddr, &status)) {
540 spin_unlock_irq(&phba->hbalock);
541 return -EIO;
542 }
dea3101e
JB
543 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
544 if (psli->num_rings > 0)
545 status |= HC_R0INT_ENA;
546 if (psli->num_rings > 1)
547 status |= HC_R1INT_ENA;
548 if (psli->num_rings > 2)
549 status |= HC_R2INT_ENA;
550 if (psli->num_rings > 3)
551 status |= HC_R3INT_ENA;
552
875fbdfe
JSEC
553 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
554 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 555 status &= ~(HC_R0INT_ENA);
875fbdfe 556
dea3101e
JB
557 writel(status, phba->HCregaddr);
558 readl(phba->HCregaddr); /* flush */
2e0fef85 559 spin_unlock_irq(&phba->hbalock);
dea3101e 560
9399627f
JS
561 /* Set up ring-0 (ELS) timer */
562 timeout = phba->fc_ratov * 2;
256ec0d0
JS
563 mod_timer(&vport->els_tmofunc,
564 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 565 /* Set up heart beat (HB) timer */
256ec0d0
JS
566 mod_timer(&phba->hb_tmofunc,
567 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
568 phba->hb_outstanding = 0;
569 phba->last_completion_time = jiffies;
9399627f 570 /* Set up error attention (ERATT) polling timer */
256ec0d0 571 mod_timer(&phba->eratt_poll,
65791f1f 572 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 573
a0c87cbd
JS
574 if (phba->hba_flag & LINK_DISABLED) {
575 lpfc_printf_log(phba,
576 KERN_ERR, LOG_INIT,
577 "2598 Adapter Link is disabled.\n");
578 lpfc_down_link(phba, pmb);
579 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
580 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
581 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
582 lpfc_printf_log(phba,
583 KERN_ERR, LOG_INIT,
584 "2599 Adapter failed to issue DOWN_LINK"
585 " mbox command rc 0x%x\n", rc);
586
587 mempool_free(pmb, phba->mbox_mem_pool);
588 return -EIO;
589 }
e40a02c1 590 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS
591 mempool_free(pmb, phba->mbox_mem_pool);
592 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
593 if (rc)
594 return rc;
dea3101e
JB
595 }
596 /* MBOX buffer will be freed in mbox compl */
57127f15 597 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
598 if (!pmb) {
599 phba->link_state = LPFC_HBA_ERROR;
600 return -ENOMEM;
601 }
602
57127f15
JS
603 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
604 pmb->mbox_cmpl = lpfc_config_async_cmpl;
605 pmb->vport = phba->pport;
606 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 607
57127f15
JS
608 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
609 lpfc_printf_log(phba,
610 KERN_ERR,
611 LOG_INIT,
612 "0456 Adapter failed to issue "
e4e74273 613 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS
614 rc);
615 mempool_free(pmb, phba->mbox_mem_pool);
616 }
97207482
JS
617
618 /* Get Option rom version */
619 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
620 if (!pmb) {
621 phba->link_state = LPFC_HBA_ERROR;
622 return -ENOMEM;
623 }
624
97207482
JS
625 lpfc_dump_wakeup_param(phba, pmb);
626 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
627 pmb->vport = phba->pport;
628 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
629
630 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
631 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 632 "to get Option ROM version status x%x\n", rc);
97207482
JS
633 mempool_free(pmb, phba->mbox_mem_pool);
634 }
635
d7c255b2 636 return 0;
ce8b3ce5
JS
637}
638
84d1b006
JS
639/**
640 * lpfc_hba_init_link - Initialize the FC link
641 * @phba: pointer to lpfc hba data structure.
6e7288d9 642 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
643 *
644 * This routine will issue the INIT_LINK mailbox command call.
645 * It is available to other drivers through the lpfc_hba data
646 * structure for use as a delayed link up mechanism with the
647 * module parameter lpfc_suppress_link_up.
648 *
649 * Return code
650 * 0 - success
651 * Any other value - error
652 **/
e399b228 653static int
6e7288d9 654lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS
655{
656 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
657}
658
659/**
660 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
661 * @phba: pointer to lpfc hba data structure.
662 * @fc_topology: desired fc topology.
663 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
664 *
665 * This routine will issue the INIT_LINK mailbox command call.
666 * It is available to other drivers through the lpfc_hba data
667 * structure for use as a delayed link up mechanism with the
668 * module parameter lpfc_suppress_link_up.
669 *
670 * Return code
671 * 0 - success
672 * Any other value - error
673 **/
674int
675lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
676 uint32_t flag)
84d1b006
JS
677{
678 struct lpfc_vport *vport = phba->pport;
679 LPFC_MBOXQ_t *pmb;
680 MAILBOX_t *mb;
681 int rc;
682
683 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
684 if (!pmb) {
685 phba->link_state = LPFC_HBA_ERROR;
686 return -ENOMEM;
687 }
688 mb = &pmb->u.mb;
689 pmb->vport = vport;
690
026abb87
JS
691 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
692 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
693 !(phba->lmt & LMT_1Gb)) ||
694 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
695 !(phba->lmt & LMT_2Gb)) ||
696 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
697 !(phba->lmt & LMT_4Gb)) ||
698 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
699 !(phba->lmt & LMT_8Gb)) ||
700 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
701 !(phba->lmt & LMT_10Gb)) ||
702 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS
703 !(phba->lmt & LMT_16Gb)) ||
704 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
705 !(phba->lmt & LMT_32Gb))) {
026abb87
JS
706 /* Reset link speed to auto */
707 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
708 "1302 Invalid speed for this board:%d "
709 "Reset link speed to auto.\n",
710 phba->cfg_link_speed);
711 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
712 }
1b51197d 713 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 714 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS
715 if (phba->sli_rev < LPFC_SLI_REV4)
716 lpfc_set_loopback_flag(phba);
6e7288d9 717 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 718 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS
719 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
720 "0498 Adapter failed to init, mbxCmd x%x "
721 "INIT_LINK, mbxStatus x%x\n",
722 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS
723 if (phba->sli_rev <= LPFC_SLI_REV3) {
724 /* Clear all interrupt enable conditions */
725 writel(0, phba->HCregaddr);
726 readl(phba->HCregaddr); /* flush */
727 /* Clear all pending interrupts */
728 writel(0xffffffff, phba->HAregaddr);
729 readl(phba->HAregaddr); /* flush */
730 }
84d1b006 731 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 732 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS
733 mempool_free(pmb, phba->mbox_mem_pool);
734 return -EIO;
735 }
e40a02c1 736 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS
737 if (flag == MBX_POLL)
738 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS
739
740 return 0;
741}
742
743/**
744 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS
745 * @phba: pointer to lpfc hba data structure.
746 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
747 *
748 * This routine will issue the DOWN_LINK mailbox command call.
749 * It is available to other drivers through the lpfc_hba data
750 * structure for use to stop the link.
751 *
752 * Return code
753 * 0 - success
754 * Any other value - error
755 **/
e399b228 756static int
6e7288d9 757lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS
758{
759 LPFC_MBOXQ_t *pmb;
760 int rc;
761
762 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
763 if (!pmb) {
764 phba->link_state = LPFC_HBA_ERROR;
765 return -ENOMEM;
766 }
767
768 lpfc_printf_log(phba,
769 KERN_ERR, LOG_INIT,
770 "0491 Adapter Link is disabled.\n");
771 lpfc_down_link(phba, pmb);
772 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 773 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS
774 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
775 lpfc_printf_log(phba,
776 KERN_ERR, LOG_INIT,
777 "2522 Adapter failed to issue DOWN_LINK"
778 " mbox command rc 0x%x\n", rc);
779
780 mempool_free(pmb, phba->mbox_mem_pool);
781 return -EIO;
782 }
6e7288d9
JS
783 if (flag == MBX_POLL)
784 mempool_free(pmb, phba->mbox_mem_pool);
785
84d1b006
JS
786 return 0;
787}
788
e59058c4 789/**
3621a710 790 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS
791 * @phba: pointer to lpfc HBA data structure.
792 *
793 * This routine will do LPFC uninitialization before the HBA is reset when
794 * bringing down the SLI Layer.
795 *
796 * Return codes
797 * 0 - success.
798 * Any other value - error.
799 **/
dea3101e 800int
2e0fef85 801lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 802{
1b32f6aa
JS
803 struct lpfc_vport **vports;
804 int i;
3772a991
JS
805
806 if (phba->sli_rev <= LPFC_SLI_REV3) {
807 /* Disable interrupts */
808 writel(0, phba->HCregaddr);
809 readl(phba->HCregaddr); /* flush */
810 }
dea3101e 811
1b32f6aa
JS
812 if (phba->pport->load_flag & FC_UNLOADING)
813 lpfc_cleanup_discovery_resources(phba->pport);
814 else {
815 vports = lpfc_create_vport_work_array(phba);
816 if (vports != NULL)
3772a991
JS
817 for (i = 0; i <= phba->max_vports &&
818 vports[i] != NULL; i++)
1b32f6aa
JS
819 lpfc_cleanup_discovery_resources(vports[i]);
820 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS
821 }
822 return 0;
dea3101e
JB
823}
824
68e814f5
JS
825/**
826 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
827 * rspiocb which got deferred
828 *
829 * @phba: pointer to lpfc HBA data structure.
830 *
831 * This routine will cleanup completed slow path events after HBA is reset
832 * when bringing down the SLI Layer.
833 *
834 *
835 * Return codes
836 * void.
837 **/
838static void
839lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
840{
841 struct lpfc_iocbq *rspiocbq;
842 struct hbq_dmabuf *dmabuf;
843 struct lpfc_cq_event *cq_event;
844
845 spin_lock_irq(&phba->hbalock);
846 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
847 spin_unlock_irq(&phba->hbalock);
848
849 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
850 /* Get the response iocb from the head of work queue */
851 spin_lock_irq(&phba->hbalock);
852 list_remove_head(&phba->sli4_hba.sp_queue_event,
853 cq_event, struct lpfc_cq_event, list);
854 spin_unlock_irq(&phba->hbalock);
855
856 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
857 case CQE_CODE_COMPL_WQE:
858 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
859 cq_event);
860 lpfc_sli_release_iocbq(phba, rspiocbq);
861 break;
862 case CQE_CODE_RECEIVE:
863 case CQE_CODE_RECEIVE_V1:
864 dmabuf = container_of(cq_event, struct hbq_dmabuf,
865 cq_event);
866 lpfc_in_buf_free(phba, &dmabuf->dbuf);
867 }
868 }
869}
870
e59058c4 871/**
bcece5f5 872 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS
873 * @phba: pointer to lpfc HBA data structure.
874 *
bcece5f5
JS
875 * This routine will cleanup posted ELS buffers after the HBA is reset
876 * when bringing down the SLI Layer.
877 *
e59058c4
JS
878 *
879 * Return codes
bcece5f5 880 * void.
e59058c4 881 **/
bcece5f5
JS
882static void
883lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW
884{
885 struct lpfc_sli *psli = &phba->sli;
886 struct lpfc_sli_ring *pring;
887 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS
888 LIST_HEAD(buflist);
889 int count;
41415862 890
92d7f7b0
JS
891 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
892 lpfc_sli_hbqbuf_free_all(phba);
893 else {
894 /* Cleanup preposted buffers on the ELS ring */
895427bd 895 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS
896 spin_lock_irq(&phba->hbalock);
897 list_splice_init(&pring->postbufq, &buflist);
898 spin_unlock_irq(&phba->hbalock);
899
900 count = 0;
901 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 902 list_del(&mp->list);
07eab624 903 count++;
92d7f7b0
JS
904 lpfc_mbuf_free(phba, mp->virt, mp->phys);
905 kfree(mp);
906 }
07eab624
JS
907
908 spin_lock_irq(&phba->hbalock);
909 pring->postbufq_cnt -= count;
bcece5f5 910 spin_unlock_irq(&phba->hbalock);
41415862 911 }
bcece5f5
JS
912}
913
914/**
915 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
916 * @phba: pointer to lpfc HBA data structure.
917 *
918 * This routine will cleanup the txcmplq after the HBA is reset when bringing
919 * down the SLI Layer.
920 *
921 * Return codes
922 * void
923 **/
924static void
925lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
926{
927 struct lpfc_sli *psli = &phba->sli;
895427bd 928 struct lpfc_queue *qp = NULL;
bcece5f5
JS
929 struct lpfc_sli_ring *pring;
930 LIST_HEAD(completions);
931 int i;
932
895427bd
JS
933 if (phba->sli_rev != LPFC_SLI_REV4) {
934 for (i = 0; i < psli->num_rings; i++) {
935 pring = &psli->sli3_ring[i];
bcece5f5 936 spin_lock_irq(&phba->hbalock);
895427bd
JS
937 /* At this point in time the HBA is either reset or DOA
938 * Nothing should be on txcmplq as it will
939 * NEVER complete.
940 */
941 list_splice_init(&pring->txcmplq, &completions);
942 pring->txcmplq_cnt = 0;
bcece5f5 943 spin_unlock_irq(&phba->hbalock);
09372820 944
895427bd
JS
945 lpfc_sli_abort_iocb_ring(phba, pring);
946 }
a257bf90 947 /* Cancel all the IOCBs from the completions list */
895427bd
JS
948 lpfc_sli_cancel_iocbs(phba, &completions,
949 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
950 return;
951 }
952 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
953 pring = qp->pring;
954 if (!pring)
955 continue;
956 spin_lock_irq(&pring->ring_lock);
957 list_splice_init(&pring->txcmplq, &completions);
958 pring->txcmplq_cnt = 0;
959 spin_unlock_irq(&pring->ring_lock);
41415862
JW
960 lpfc_sli_abort_iocb_ring(phba, pring);
961 }
895427bd
JS
962 /* Cancel all the IOCBs from the completions list */
963 lpfc_sli_cancel_iocbs(phba, &completions,
964 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 965}
41415862 966
bcece5f5
JS
967/**
968 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
969 int i;
970 * @phba: pointer to lpfc HBA data structure.
971 *
972 * This routine will do uninitialization after the HBA is reset when bring
973 * down the SLI Layer.
974 *
975 * Return codes
976 * 0 - success.
977 * Any other value - error.
978 **/
979static int
980lpfc_hba_down_post_s3(struct lpfc_hba *phba)
981{
982 lpfc_hba_free_post_buf(phba);
983 lpfc_hba_clean_txcmplq(phba);
41415862
JW
984 return 0;
985}
5af5eee7 986
da0436e9
JS
987/**
988 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
989 * @phba: pointer to lpfc HBA data structure.
990 *
991 * This routine will do uninitialization after the HBA is reset when bring
992 * down the SLI Layer.
993 *
994 * Return codes
af901ca1 995 * 0 - success.
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996 * Any other value - error.
997 **/
998static int
999lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1000{
1001 struct lpfc_scsi_buf *psb, *psb_next;
1002 LIST_HEAD(aborts);
895427bd 1003 LIST_HEAD(nvme_aborts);
da0436e9 1004 unsigned long iflag = 0;
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1005 struct lpfc_sglq *sglq_entry = NULL;
1006
895427bd
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1007
1008 lpfc_sli_hbqbuf_free_all(phba);
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1009 lpfc_hba_clean_txcmplq(phba);
1010
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1011 /* At this point in time the HBA is either reset or DOA. Either
1012 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1013 * on the lpfc_els_sgl_list so that it can either be freed if the
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1014 * driver is unloading or reposted if the driver is restarting
1015 * the port.
1016 */
895427bd 1017 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1018 /* scsl_buf_list */
895427bd 1019 /* sgl_list_lock required because worker thread uses this
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1020 * list.
1021 */
895427bd 1022 spin_lock(&phba->sli4_hba.sgl_list_lock);
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1023 list_for_each_entry(sglq_entry,
1024 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1025 sglq_entry->state = SGL_FREED;
1026
da0436e9 1027 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS
1028 &phba->sli4_hba.lpfc_els_sgl_list);
1029
1030 spin_unlock(&phba->sli4_hba.sgl_list_lock);
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1031 /* abts_scsi_buf_list_lock required because worker thread uses this
1032 * list.
1033 */
895427bd
JS
1034 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1035 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1036 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1037 &aborts);
1038 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1039 }
1040
1041 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1042 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1043 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1044 &nvme_aborts);
1045 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1046 }
1047
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1048 spin_unlock_irq(&phba->hbalock);
1049
1050 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1051 psb->pCmd = NULL;
1052 psb->status = IOSTAT_SUCCESS;
1053 }
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JS
1054 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1055 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1056 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1057
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JS
1058 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1059 psb->pCmd = NULL;
1060 psb->status = IOSTAT_SUCCESS;
1061 }
1062 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
1063 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1064 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1065
68e814f5 1066 lpfc_sli4_free_sp_events(phba);
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JS
1067 return 0;
1068}
1069
1070/**
1071 * lpfc_hba_down_post - Wrapper func for hba down post routine
1072 * @phba: pointer to lpfc HBA data structure.
1073 *
1074 * This routine wraps the actual SLI3 or SLI4 routine for performing
1075 * uninitialization after the HBA is reset when bring down the SLI Layer.
1076 *
1077 * Return codes
af901ca1 1078 * 0 - success.
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JS
1079 * Any other value - error.
1080 **/
1081int
1082lpfc_hba_down_post(struct lpfc_hba *phba)
1083{
1084 return (*phba->lpfc_hba_down_post)(phba);
1085}
41415862 1086
e59058c4 1087/**
3621a710 1088 * lpfc_hb_timeout - The HBA-timer timeout handler
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JS
1089 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1090 *
1091 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1092 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1093 * work-port-events bitmap and the worker thread is notified. This timeout
1094 * event will be used by the worker thread to invoke the actual timeout
1095 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1096 * be performed in the timeout handler and the HBA timeout event bit shall
1097 * be cleared by the worker thread after it has taken the event bitmap out.
1098 **/
a6ababd2 1099static void
858c9f6c
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1100lpfc_hb_timeout(unsigned long ptr)
1101{
1102 struct lpfc_hba *phba;
5e9d9b82 1103 uint32_t tmo_posted;
858c9f6c
JS
1104 unsigned long iflag;
1105
1106 phba = (struct lpfc_hba *)ptr;
9399627f
JS
1107
1108 /* Check for heart beat timeout conditions */
858c9f6c 1109 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS
1110 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1111 if (!tmo_posted)
858c9f6c
JS
1112 phba->pport->work_port_events |= WORKER_HB_TMO;
1113 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1114
9399627f 1115 /* Tell the worker thread there is work to do */
5e9d9b82
JS
1116 if (!tmo_posted)
1117 lpfc_worker_wake_up(phba);
858c9f6c
JS
1118 return;
1119}
1120
19ca7609
JS
1121/**
1122 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1123 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1124 *
1125 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1126 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1127 * work-port-events bitmap and the worker thread is notified. This timeout
1128 * event will be used by the worker thread to invoke the actual timeout
1129 * handler routine, lpfc_rrq_handler. Any periodical operations will
1130 * be performed in the timeout handler and the RRQ timeout event bit shall
1131 * be cleared by the worker thread after it has taken the event bitmap out.
1132 **/
1133static void
1134lpfc_rrq_timeout(unsigned long ptr)
1135{
1136 struct lpfc_hba *phba;
19ca7609
JS
1137 unsigned long iflag;
1138
1139 phba = (struct lpfc_hba *)ptr;
1140 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1141 if (!(phba->pport->load_flag & FC_UNLOADING))
1142 phba->hba_flag |= HBA_RRQ_ACTIVE;
1143 else
1144 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1145 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1146
1147 if (!(phba->pport->load_flag & FC_UNLOADING))
1148 lpfc_worker_wake_up(phba);
19ca7609
JS
1149}
1150
e59058c4 1151/**
3621a710 1152 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS
1153 * @phba: pointer to lpfc hba data structure.
1154 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1155 *
1156 * This is the callback function to the lpfc heart-beat mailbox command.
1157 * If configured, the lpfc driver issues the heart-beat mailbox command to
1158 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1159 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1160 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1161 * heart-beat outstanding state. Once the mailbox command comes back and
1162 * no error conditions detected, the heart-beat mailbox command timer is
1163 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1164 * state is cleared for the next heart-beat. If the timer expired with the
1165 * heart-beat outstanding state set, the driver will put the HBA offline.
1166 **/
858c9f6c
JS
1167static void
1168lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1169{
1170 unsigned long drvr_flag;
1171
1172 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1173 phba->hb_outstanding = 0;
1174 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1175
9399627f 1176 /* Check and reset heart-beat timer is necessary */
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JS
1177 mempool_free(pmboxq, phba->mbox_mem_pool);
1178 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1179 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1180 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1181 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1182 jiffies +
1183 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1184 return;
1185}
1186
e59058c4 1187/**
3621a710 1188 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS
1189 * @phba: pointer to lpfc hba data structure.
1190 *
1191 * This is the actual HBA-timer timeout handler to be invoked by the worker
1192 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1193 * handler performs any periodic operations needed for the device. If such
1194 * periodic event has already been attended to either in the interrupt handler
1195 * or by processing slow-ring or fast-ring events within the HBA-timer
1196 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1197 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1198 * is configured and there is no heart-beat mailbox command outstanding, a
1199 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1200 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1201 * to offline.
1202 **/
858c9f6c
JS
1203void
1204lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1205{
45ed1190 1206 struct lpfc_vport **vports;
858c9f6c 1207 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1208 struct lpfc_dmabuf *buf_ptr;
45ed1190 1209 int retval, i;
858c9f6c 1210 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1211 LIST_HEAD(completions);
858c9f6c 1212
45ed1190
JS
1213 vports = lpfc_create_vport_work_array(phba);
1214 if (vports != NULL)
4258e98e 1215 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1216 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS
1217 lpfc_fdmi_num_disc_check(vports[i]);
1218 }
45ed1190
JS
1219 lpfc_destroy_vport_work_array(phba, vports);
1220
858c9f6c 1221 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1222 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS
1223 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1224 return;
1225
1226 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1227
256ec0d0
JS
1228 if (time_after(phba->last_completion_time +
1229 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1230 jiffies)) {
858c9f6c
JS
1231 spin_unlock_irq(&phba->pport->work_port_lock);
1232 if (!phba->hb_outstanding)
1233 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1234 jiffies +
1235 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1236 else
1237 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1238 jiffies +
1239 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS
1240 return;
1241 }
1242 spin_unlock_irq(&phba->pport->work_port_lock);
1243
0ff10d46
JS
1244 if (phba->elsbuf_cnt &&
1245 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1246 spin_lock_irq(&phba->hbalock);
1247 list_splice_init(&phba->elsbuf, &completions);
1248 phba->elsbuf_cnt = 0;
1249 phba->elsbuf_prev_cnt = 0;
1250 spin_unlock_irq(&phba->hbalock);
1251
1252 while (!list_empty(&completions)) {
1253 list_remove_head(&completions, buf_ptr,
1254 struct lpfc_dmabuf, list);
1255 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1256 kfree(buf_ptr);
1257 }
1258 }
1259 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1260
858c9f6c 1261 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS
1262 if (phba->cfg_enable_hba_heartbeat) {
1263 if (!phba->hb_outstanding) {
bc73905a
JS
1264 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1265 (list_empty(&psli->mboxq))) {
1266 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1267 GFP_KERNEL);
1268 if (!pmboxq) {
1269 mod_timer(&phba->hb_tmofunc,
1270 jiffies +
256ec0d0
JS
1271 msecs_to_jiffies(1000 *
1272 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1273 return;
1274 }
1275
1276 lpfc_heart_beat(phba, pmboxq);
1277 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1278 pmboxq->vport = phba->pport;
1279 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1280 MBX_NOWAIT);
1281
1282 if (retval != MBX_BUSY &&
1283 retval != MBX_SUCCESS) {
1284 mempool_free(pmboxq,
1285 phba->mbox_mem_pool);
1286 mod_timer(&phba->hb_tmofunc,
1287 jiffies +
256ec0d0
JS
1288 msecs_to_jiffies(1000 *
1289 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1290 return;
1291 }
1292 phba->skipped_hb = 0;
1293 phba->hb_outstanding = 1;
1294 } else if (time_before_eq(phba->last_completion_time,
1295 phba->skipped_hb)) {
1296 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1297 "2857 Last completion time not "
1298 " updated in %d ms\n",
1299 jiffies_to_msecs(jiffies
1300 - phba->last_completion_time));
1301 } else
1302 phba->skipped_hb = jiffies;
1303
858c9f6c 1304 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1305 jiffies +
1306 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1307 return;
13815c83
JS
1308 } else {
1309 /*
1310 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS
1311 * we need to give the hb mailbox cmd a chance to
1312 * complete or TMO.
13815c83 1313 */
dcf2a4e0
JS
1314 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1315 "0459 Adapter heartbeat still out"
1316 "standing:last compl time was %d ms.\n",
1317 jiffies_to_msecs(jiffies
1318 - phba->last_completion_time));
1319 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1320 jiffies +
1321 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1322 }
4258e98e
JS
1323 } else {
1324 mod_timer(&phba->hb_tmofunc,
1325 jiffies +
1326 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1327 }
1328}
1329
e59058c4 1330/**
3621a710 1331 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS
1332 * @phba: pointer to lpfc hba data structure.
1333 *
1334 * This routine is called to bring the HBA offline when HBA hardware error
1335 * other than Port Error 6 has been detected.
1336 **/
09372820
JS
1337static void
1338lpfc_offline_eratt(struct lpfc_hba *phba)
1339{
1340 struct lpfc_sli *psli = &phba->sli;
1341
1342 spin_lock_irq(&phba->hbalock);
f4b4c68f 1343 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1344 spin_unlock_irq(&phba->hbalock);
618a5230 1345 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS
1346
1347 lpfc_offline(phba);
1348 lpfc_reset_barrier(phba);
f4b4c68f 1349 spin_lock_irq(&phba->hbalock);
09372820 1350 lpfc_sli_brdreset(phba);
f4b4c68f 1351 spin_unlock_irq(&phba->hbalock);
09372820
JS
1352 lpfc_hba_down_post(phba);
1353 lpfc_sli_brdready(phba, HS_MBRDY);
1354 lpfc_unblock_mgmt_io(phba);
1355 phba->link_state = LPFC_HBA_ERROR;
1356 return;
1357}
1358
da0436e9
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1359/**
1360 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1361 * @phba: pointer to lpfc hba data structure.
1362 *
1363 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1364 * other than Port Error 6 has been detected.
1365 **/
a88dbb6a 1366void
da0436e9
JS
1367lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1368{
946727dc
JS
1369 spin_lock_irq(&phba->hbalock);
1370 phba->link_state = LPFC_HBA_ERROR;
1371 spin_unlock_irq(&phba->hbalock);
1372
618a5230 1373 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1374 lpfc_offline(phba);
da0436e9 1375 lpfc_hba_down_post(phba);
da0436e9 1376 lpfc_unblock_mgmt_io(phba);
da0436e9
JS
1377}
1378
a257bf90
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1379/**
1380 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1381 * @phba: pointer to lpfc hba data structure.
1382 *
1383 * This routine is invoked to handle the deferred HBA hardware error
1384 * conditions. This type of error is indicated by HBA by setting ER1
1385 * and another ER bit in the host status register. The driver will
1386 * wait until the ER1 bit clears before handling the error condition.
1387 **/
1388static void
1389lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1390{
1391 uint32_t old_host_status = phba->work_hs;
a257bf90
JS
1392 struct lpfc_sli *psli = &phba->sli;
1393
f4b4c68f
JS
1394 /* If the pci channel is offline, ignore possible errors,
1395 * since we cannot communicate with the pci card anyway.
1396 */
1397 if (pci_channel_offline(phba->pcidev)) {
1398 spin_lock_irq(&phba->hbalock);
1399 phba->hba_flag &= ~DEFER_ERATT;
1400 spin_unlock_irq(&phba->hbalock);
1401 return;
1402 }
1403
a257bf90
JS
1404 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1405 "0479 Deferred Adapter Hardware Error "
1406 "Data: x%x x%x x%x\n",
1407 phba->work_hs,
1408 phba->work_status[0], phba->work_status[1]);
1409
1410 spin_lock_irq(&phba->hbalock);
f4b4c68f 1411 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS
1412 spin_unlock_irq(&phba->hbalock);
1413
1414
1415 /*
1416 * Firmware stops when it triggred erratt. That could cause the I/Os
1417 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1418 * SCSI layer retry it after re-establishing link.
1419 */
db55fba8 1420 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS
1421
1422 /*
1423 * There was a firmware error. Take the hba offline and then
1424 * attempt to restart it.
1425 */
618a5230 1426 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS
1427 lpfc_offline(phba);
1428
1429 /* Wait for the ER1 bit to clear.*/
1430 while (phba->work_hs & HS_FFER1) {
1431 msleep(100);
9940b97b
JS
1432 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1433 phba->work_hs = UNPLUG_ERR ;
1434 break;
1435 }
a257bf90
JS
1436 /* If driver is unloading let the worker thread continue */
1437 if (phba->pport->load_flag & FC_UNLOADING) {
1438 phba->work_hs = 0;
1439 break;
1440 }
1441 }
1442
1443 /*
1444 * This is to ptrotect against a race condition in which
1445 * first write to the host attention register clear the
1446 * host status register.
1447 */
1448 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1449 phba->work_hs = old_host_status & ~HS_FFER1;
1450
3772a991 1451 spin_lock_irq(&phba->hbalock);
a257bf90 1452 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1453 spin_unlock_irq(&phba->hbalock);
a257bf90
JS
1454 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1455 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1456}
1457
3772a991
JS
1458static void
1459lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1460{
1461 struct lpfc_board_event_header board_event;
1462 struct Scsi_Host *shost;
1463
1464 board_event.event_type = FC_REG_BOARD_EVENT;
1465 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1466 shost = lpfc_shost_from_vport(phba->pport);
1467 fc_host_post_vendor_event(shost, fc_get_event_number(),
1468 sizeof(board_event),
1469 (char *) &board_event,
1470 LPFC_NL_VENDOR_ID);
1471}
1472
e59058c4 1473/**
3772a991 1474 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS
1475 * @phba: pointer to lpfc hba data structure.
1476 *
1477 * This routine is invoked to handle the following HBA hardware error
1478 * conditions:
1479 * 1 - HBA error attention interrupt
1480 * 2 - DMA ring index out of range
1481 * 3 - Mailbox command came back as unknown
1482 **/
3772a991
JS
1483static void
1484lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1485{
2e0fef85 1486 struct lpfc_vport *vport = phba->pport;
2e0fef85 1487 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1488 uint32_t event_data;
57127f15
JS
1489 unsigned long temperature;
1490 struct temp_event temp_event_data;
92d7f7b0 1491 struct Scsi_Host *shost;
2e0fef85 1492
8d63f375 1493 /* If the pci channel is offline, ignore possible errors,
3772a991
JS
1494 * since we cannot communicate with the pci card anyway.
1495 */
1496 if (pci_channel_offline(phba->pcidev)) {
1497 spin_lock_irq(&phba->hbalock);
1498 phba->hba_flag &= ~DEFER_ERATT;
1499 spin_unlock_irq(&phba->hbalock);
8d63f375 1500 return;
3772a991
JS
1501 }
1502
13815c83
JS
1503 /* If resets are disabled then leave the HBA alone and return */
1504 if (!phba->cfg_enable_hba_reset)
1505 return;
dea3101e 1506
ea2151b4 1507 /* Send an internal error event to mgmt application */
3772a991 1508 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1509
a257bf90
JS
1510 if (phba->hba_flag & DEFER_ERATT)
1511 lpfc_handle_deferred_eratt(phba);
1512
dcf2a4e0
JS
1513 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1514 if (phba->work_hs & HS_FFER6)
1515 /* Re-establishing Link */
1516 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1517 "1301 Re-establishing Link "
1518 "Data: x%x x%x x%x\n",
1519 phba->work_hs, phba->work_status[0],
1520 phba->work_status[1]);
1521 if (phba->work_hs & HS_FFER8)
1522 /* Device Zeroization */
1523 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1524 "2861 Host Authentication device "
1525 "zeroization Data:x%x x%x x%x\n",
1526 phba->work_hs, phba->work_status[0],
1527 phba->work_status[1]);
58da1ffb 1528
92d7f7b0 1529 spin_lock_irq(&phba->hbalock);
f4b4c68f 1530 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1531 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1532
1533 /*
1534 * Firmware stops when it triggled erratt with HS_FFER6.
1535 * That could cause the I/Os dropped by the firmware.
1536 * Error iocb (I/O) on txcmplq and let the SCSI layer
1537 * retry it after re-establishing link.
1538 */
db55fba8 1539 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1540
dea3101e
JB
1541 /*
1542 * There was a firmware error. Take the hba offline and then
1543 * attempt to restart it.
1544 */
618a5230 1545 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1546 lpfc_offline(phba);
41415862 1547 lpfc_sli_brdrestart(phba);
dea3101e 1548 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1549 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
1550 return;
1551 }
46fa311e 1552 lpfc_unblock_mgmt_io(phba);
57127f15
JS
1553 } else if (phba->work_hs & HS_CRIT_TEMP) {
1554 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1555 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1556 temp_event_data.event_code = LPFC_CRIT_TEMP;
1557 temp_event_data.data = (uint32_t)temperature;
1558
1559 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1560 "0406 Adapter maximum temperature exceeded "
57127f15
JS
1561 "(%ld), taking this port offline "
1562 "Data: x%x x%x x%x\n",
1563 temperature, phba->work_hs,
1564 phba->work_status[0], phba->work_status[1]);
1565
1566 shost = lpfc_shost_from_vport(phba->pport);
1567 fc_host_post_vendor_event(shost, fc_get_event_number(),
1568 sizeof(temp_event_data),
1569 (char *) &temp_event_data,
1570 SCSI_NL_VID_TYPE_PCI
1571 | PCI_VENDOR_ID_EMULEX);
1572
7af67051 1573 spin_lock_irq(&phba->hbalock);
7af67051
JS
1574 phba->over_temp_state = HBA_OVER_TEMP;
1575 spin_unlock_irq(&phba->hbalock);
09372820 1576 lpfc_offline_eratt(phba);
57127f15 1577
dea3101e
JB
1578 } else {
1579 /* The if clause above forces this code path when the status
9399627f
JS
1580 * failure is a value other than FFER6. Do not call the offline
1581 * twice. This is the adapter hardware error path.
dea3101e
JB
1582 */
1583 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1584 "0457 Adapter Hardware Error "
dea3101e 1585 "Data: x%x x%x x%x\n",
e8b62011 1586 phba->work_hs,
dea3101e
JB
1587 phba->work_status[0], phba->work_status[1]);
1588
d2873e4c 1589 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1590 shost = lpfc_shost_from_vport(vport);
2e0fef85 1591 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS
1592 sizeof(event_data), (char *) &event_data,
1593 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1594
09372820 1595 lpfc_offline_eratt(phba);
dea3101e 1596 }
9399627f 1597 return;
dea3101e
JB
1598}
1599
618a5230
JS
1600/**
1601 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1602 * @phba: pointer to lpfc hba data structure.
1603 * @mbx_action: flag for mailbox shutdown action.
1604 *
1605 * This routine is invoked to perform an SLI4 port PCI function reset in
1606 * response to port status register polling attention. It waits for port
1607 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1608 * During this process, interrupt vectors are freed and later requested
1609 * for handling possible port resource change.
1610 **/
1611static int
e10b2022
JS
1612lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1613 bool en_rn_msg)
618a5230
JS
1614{
1615 int rc;
1616 uint32_t intr_mode;
1617
65791f1f
JS
1618 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1619 LPFC_SLI_INTF_IF_TYPE_2) {
1620 /*
1621 * On error status condition, driver need to wait for port
1622 * ready before performing reset.
1623 */
1624 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1625 if (rc)
65791f1f
JS
1626 return rc;
1627 }
0e916ee7 1628
65791f1f
JS
1629 /* need reset: attempt for port recovery */
1630 if (en_rn_msg)
1631 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1632 "2887 Reset Needed: Attempting Port "
1633 "Recovery...\n");
1634 lpfc_offline_prep(phba, mbx_action);
1635 lpfc_offline(phba);
1636 /* release interrupt for possible resource change */
1637 lpfc_sli4_disable_intr(phba);
1638 lpfc_sli_brdrestart(phba);
1639 /* request and enable interrupt */
1640 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1641 if (intr_mode == LPFC_INTR_ERROR) {
1642 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1643 "3175 Failed to enable interrupt\n");
1644 return -EIO;
618a5230 1645 }
65791f1f
JS
1646 phba->intr_mode = intr_mode;
1647 rc = lpfc_online(phba);
1648 if (rc == 0)
1649 lpfc_unblock_mgmt_io(phba);
1650
618a5230
JS
1651 return rc;
1652}
1653
da0436e9
JS
1654/**
1655 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1656 * @phba: pointer to lpfc hba data structure.
1657 *
1658 * This routine is invoked to handle the SLI4 HBA hardware error attention
1659 * conditions.
1660 **/
1661static void
1662lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1663{
1664 struct lpfc_vport *vport = phba->pport;
1665 uint32_t event_data;
1666 struct Scsi_Host *shost;
2fcee4bf 1667 uint32_t if_type;
2e90f4b5
JS
1668 struct lpfc_register portstat_reg = {0};
1669 uint32_t reg_err1, reg_err2;
1670 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1671 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1672 bool en_rn_msg = true;
946727dc 1673 struct temp_event temp_event_data;
65791f1f
JS
1674 struct lpfc_register portsmphr_reg;
1675 int rc, i;
da0436e9
JS
1676
1677 /* If the pci channel is offline, ignore possible errors, since
1678 * we cannot communicate with the pci card anyway.
1679 */
1680 if (pci_channel_offline(phba->pcidev))
1681 return;
da0436e9 1682
65791f1f 1683 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS
1684 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1685 switch (if_type) {
1686 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS
1687 pci_rd_rc1 = lpfc_readl(
1688 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1689 &uerrlo_reg);
1690 pci_rd_rc2 = lpfc_readl(
1691 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1692 &uemasklo_reg);
1693 /* consider PCI bus read error as pci_channel_offline */
1694 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1695 return;
65791f1f
JS
1696 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1697 lpfc_sli4_offline_eratt(phba);
1698 return;
1699 }
1700 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1701 "7623 Checking UE recoverable");
1702
1703 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1704 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1705 &portsmphr_reg.word0))
1706 continue;
1707
1708 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1709 &portsmphr_reg);
1710 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1711 LPFC_PORT_SEM_UE_RECOVERABLE)
1712 break;
1713 /*Sleep for 1Sec, before checking SEMAPHORE */
1714 msleep(1000);
1715 }
1716
1717 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1718 "4827 smphr_port_status x%x : Waited %dSec",
1719 smphr_port_status, i);
1720
1721 /* Recoverable UE, reset the HBA device */
1722 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1723 LPFC_PORT_SEM_UE_RECOVERABLE) {
1724 for (i = 0; i < 20; i++) {
1725 msleep(1000);
1726 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1727 &portsmphr_reg.word0) &&
1728 (LPFC_POST_STAGE_PORT_READY ==
1729 bf_get(lpfc_port_smphr_port_status,
1730 &portsmphr_reg))) {
1731 rc = lpfc_sli4_port_sta_fn_reset(phba,
1732 LPFC_MBX_NO_WAIT, en_rn_msg);
1733 if (rc == 0)
1734 return;
1735 lpfc_printf_log(phba,
1736 KERN_ERR, LOG_INIT,
1737 "4215 Failed to recover UE");
1738 break;
1739 }
1740 }
1741 }
1742 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1743 "7624 Firmware not ready: Failing UE recovery,"
1744 " waited %dSec", i);
2fcee4bf
JS
1745 lpfc_sli4_offline_eratt(phba);
1746 break;
946727dc 1747
2fcee4bf 1748 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS
1749 pci_rd_rc1 = lpfc_readl(
1750 phba->sli4_hba.u.if_type2.STATUSregaddr,
1751 &portstat_reg.word0);
1752 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS
1753 if (pci_rd_rc1 == -EIO) {
1754 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1755 "3151 PCI bus read access failure: x%x\n",
1756 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1757 return;
6b5151fd 1758 }
2e90f4b5
JS
1759 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1760 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1761 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS
1762 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1763 "2889 Port Overtemperature event, "
946727dc
JS
1764 "taking port offline Data: x%x x%x\n",
1765 reg_err1, reg_err2);
1766
310429ef 1767 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
1768 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1769 temp_event_data.event_code = LPFC_CRIT_TEMP;
1770 temp_event_data.data = 0xFFFFFFFF;
1771
1772 shost = lpfc_shost_from_vport(phba->pport);
1773 fc_host_post_vendor_event(shost, fc_get_event_number(),
1774 sizeof(temp_event_data),
1775 (char *)&temp_event_data,
1776 SCSI_NL_VID_TYPE_PCI
1777 | PCI_VENDOR_ID_EMULEX);
1778
2fcee4bf
JS
1779 spin_lock_irq(&phba->hbalock);
1780 phba->over_temp_state = HBA_OVER_TEMP;
1781 spin_unlock_irq(&phba->hbalock);
1782 lpfc_sli4_offline_eratt(phba);
946727dc 1783 return;
2fcee4bf 1784 }
2e90f4b5 1785 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1786 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1787 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS
1788 "3143 Port Down: Firmware Update "
1789 "Detected\n");
1790 en_rn_msg = false;
1791 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS
1792 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1793 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1794 "3144 Port Down: Debug Dump\n");
1795 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1796 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1797 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1798 "3145 Port Down: Provisioning\n");
618a5230 1799
946727dc
JS
1800 /* If resets are disabled then leave the HBA alone and return */
1801 if (!phba->cfg_enable_hba_reset)
1802 return;
1803
618a5230 1804 /* Check port status register for function reset */
e10b2022
JS
1805 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1806 en_rn_msg);
618a5230
JS
1807 if (rc == 0) {
1808 /* don't report event on forced debug dump */
1809 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1810 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1811 return;
1812 else
1813 break;
2fcee4bf 1814 }
618a5230 1815 /* fall through for not able to recover */
6b5151fd
JS
1816 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1817 "3152 Unrecoverable error, bring the port "
1818 "offline\n");
2fcee4bf
JS
1819 lpfc_sli4_offline_eratt(phba);
1820 break;
1821 case LPFC_SLI_INTF_IF_TYPE_1:
1822 default:
1823 break;
1824 }
2e90f4b5
JS
1825 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1826 "3123 Report dump event to upper layer\n");
1827 /* Send an internal error event to mgmt application */
1828 lpfc_board_errevt_to_mgmt(phba);
1829
1830 event_data = FC_REG_DUMP_EVENT;
1831 shost = lpfc_shost_from_vport(vport);
1832 fc_host_post_vendor_event(shost, fc_get_event_number(),
1833 sizeof(event_data), (char *) &event_data,
1834 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS
1835}
1836
1837/**
1838 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1839 * @phba: pointer to lpfc HBA data structure.
1840 *
1841 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1842 * routine from the API jump table function pointer from the lpfc_hba struct.
1843 *
1844 * Return codes
af901ca1 1845 * 0 - success.
da0436e9
JS
1846 * Any other value - error.
1847 **/
1848void
1849lpfc_handle_eratt(struct lpfc_hba *phba)
1850{
1851 (*phba->lpfc_handle_eratt)(phba);
1852}
1853
e59058c4 1854/**
3621a710 1855 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS
1856 * @phba: pointer to lpfc hba data structure.
1857 *
1858 * This routine is invoked from the worker thread to handle a HBA host
895427bd 1859 * attention link event. SLI3 only.
e59058c4 1860 **/
dea3101e 1861void
2e0fef85 1862lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 1863{
2e0fef85
JS
1864 struct lpfc_vport *vport = phba->pport;
1865 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB
1866 LPFC_MBOXQ_t *pmb;
1867 volatile uint32_t control;
1868 struct lpfc_dmabuf *mp;
09372820 1869 int rc = 0;
dea3101e
JB
1870
1871 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS
1872 if (!pmb) {
1873 rc = 1;
dea3101e 1874 goto lpfc_handle_latt_err_exit;
09372820 1875 }
dea3101e
JB
1876
1877 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS
1878 if (!mp) {
1879 rc = 2;
dea3101e 1880 goto lpfc_handle_latt_free_pmb;
09372820 1881 }
dea3101e
JB
1882
1883 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS
1884 if (!mp->virt) {
1885 rc = 3;
dea3101e 1886 goto lpfc_handle_latt_free_mp;
09372820 1887 }
dea3101e 1888
6281bfe0 1889 /* Cleanup any outstanding ELS commands */
549e55cd 1890 lpfc_els_flush_all_cmd(phba);
dea3101e
JB
1891
1892 psli->slistat.link_event++;
76a95d75
JS
1893 lpfc_read_topology(phba, pmb, mp);
1894 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 1895 pmb->vport = vport;
0d2b6b83 1896 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 1897 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 1898 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS
1899 if (rc == MBX_NOT_FINISHED) {
1900 rc = 4;
14691150 1901 goto lpfc_handle_latt_free_mbuf;
09372820 1902 }
dea3101e
JB
1903
1904 /* Clear Link Attention in HA REG */
2e0fef85 1905 spin_lock_irq(&phba->hbalock);
dea3101e
JB
1906 writel(HA_LATT, phba->HAregaddr);
1907 readl(phba->HAregaddr); /* flush */
2e0fef85 1908 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1909
1910 return;
1911
14691150 1912lpfc_handle_latt_free_mbuf:
895427bd 1913 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 1914 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e
JB
1915lpfc_handle_latt_free_mp:
1916 kfree(mp);
1917lpfc_handle_latt_free_pmb:
1dcb58e5 1918 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
1919lpfc_handle_latt_err_exit:
1920 /* Enable Link attention interrupts */
2e0fef85 1921 spin_lock_irq(&phba->hbalock);
dea3101e
JB
1922 psli->sli_flag |= LPFC_PROCESS_LA;
1923 control = readl(phba->HCregaddr);
1924 control |= HC_LAINT_ENA;
1925 writel(control, phba->HCregaddr);
1926 readl(phba->HCregaddr); /* flush */
1927
1928 /* Clear Link Attention in HA REG */
1929 writel(HA_LATT, phba->HAregaddr);
1930 readl(phba->HAregaddr); /* flush */
2e0fef85 1931 spin_unlock_irq(&phba->hbalock);
dea3101e 1932 lpfc_linkdown(phba);
2e0fef85 1933 phba->link_state = LPFC_HBA_ERROR;
dea3101e 1934
09372820
JS
1935 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
1936 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e
JB
1937
1938 return;
1939}
1940
e59058c4 1941/**
3621a710 1942 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS
1943 * @phba: pointer to lpfc hba data structure.
1944 * @vpd: pointer to the vital product data.
1945 * @len: length of the vital product data in bytes.
1946 *
1947 * This routine parses the Vital Product Data (VPD). The VPD is treated as
1948 * an array of characters. In this routine, the ModelName, ProgramType, and
1949 * ModelDesc, etc. fields of the phba data structure will be populated.
1950 *
1951 * Return codes
1952 * 0 - pointer to the VPD passed in is NULL
1953 * 1 - success
1954 **/
3772a991 1955int
2e0fef85 1956lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e
JB
1957{
1958 uint8_t lenlo, lenhi;
07da60c1 1959 int Length;
dea3101e
JB
1960 int i, j;
1961 int finished = 0;
1962 int index = 0;
1963
1964 if (!vpd)
1965 return 0;
1966
1967 /* Vital Product */
ed957684 1968 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 1969 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e
JB
1970 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
1971 (uint32_t) vpd[3]);
74b72a59 1972 while (!finished && (index < (len - 4))) {
dea3101e
JB
1973 switch (vpd[index]) {
1974 case 0x82:
74b72a59 1975 case 0x91:
dea3101e
JB
1976 index += 1;
1977 lenlo = vpd[index];
1978 index += 1;
1979 lenhi = vpd[index];
1980 index += 1;
1981 i = ((((unsigned short)lenhi) << 8) + lenlo);
1982 index += i;
1983 break;
1984 case 0x90:
1985 index += 1;
1986 lenlo = vpd[index];
1987 index += 1;
1988 lenhi = vpd[index];
1989 index += 1;
1990 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW
1991 if (Length > len - index)
1992 Length = len - index;
dea3101e
JB
1993 while (Length > 0) {
1994 /* Look for Serial Number */
1995 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
1996 index += 2;
1997 i = vpd[index];
1998 index += 1;
1999 j = 0;
2000 Length -= (3+i);
2001 while(i--) {
2002 phba->SerialNumber[j++] = vpd[index++];
2003 if (j == 31)
2004 break;
2005 }
2006 phba->SerialNumber[j] = 0;
2007 continue;
2008 }
2009 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2010 phba->vpd_flag |= VPD_MODEL_DESC;
2011 index += 2;
2012 i = vpd[index];
2013 index += 1;
2014 j = 0;
2015 Length -= (3+i);
2016 while(i--) {
2017 phba->ModelDesc[j++] = vpd[index++];
2018 if (j == 255)
2019 break;
2020 }
2021 phba->ModelDesc[j] = 0;
2022 continue;
2023 }
2024 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2025 phba->vpd_flag |= VPD_MODEL_NAME;
2026 index += 2;
2027 i = vpd[index];
2028 index += 1;
2029 j = 0;
2030 Length -= (3+i);
2031 while(i--) {
2032 phba->ModelName[j++] = vpd[index++];
2033 if (j == 79)
2034 break;
2035 }
2036 phba->ModelName[j] = 0;
2037 continue;
2038 }
2039 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2040 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2041 index += 2;
2042 i = vpd[index];
2043 index += 1;
2044 j = 0;
2045 Length -= (3+i);
2046 while(i--) {
2047 phba->ProgramType[j++] = vpd[index++];
2048 if (j == 255)
2049 break;
2050 }
2051 phba->ProgramType[j] = 0;
2052 continue;
2053 }
2054 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2055 phba->vpd_flag |= VPD_PORT;
2056 index += 2;
2057 i = vpd[index];
2058 index += 1;
2059 j = 0;
2060 Length -= (3+i);
2061 while(i--) {
cd1c8301
JS
2062 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2063 (phba->sli4_hba.pport_name_sta ==
2064 LPFC_SLI4_PPNAME_GET)) {
2065 j++;
2066 index++;
2067 } else
2068 phba->Port[j++] = vpd[index++];
2069 if (j == 19)
2070 break;
dea3101e 2071 }
cd1c8301
JS
2072 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2073 (phba->sli4_hba.pport_name_sta ==
2074 LPFC_SLI4_PPNAME_NON))
2075 phba->Port[j] = 0;
dea3101e
JB
2076 continue;
2077 }
2078 else {
2079 index += 2;
2080 i = vpd[index];
2081 index += 1;
2082 index += i;
2083 Length -= (3 + i);
2084 }
2085 }
2086 finished = 0;
2087 break;
2088 case 0x78:
2089 finished = 1;
2090 break;
2091 default:
2092 index ++;
2093 break;
2094 }
74b72a59 2095 }
dea3101e
JB
2096
2097 return(1);
2098}
2099
e59058c4 2100/**
3621a710 2101 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS
2102 * @phba: pointer to lpfc hba data structure.
2103 * @mdp: pointer to the data structure to hold the derived model name.
2104 * @descp: pointer to the data structure to hold the derived description.
2105 *
2106 * This routine retrieves HBA's description based on its registered PCI device
2107 * ID. The @descp passed into this function points to an array of 256 chars. It
2108 * shall be returned with the model name, maximum speed, and the host bus type.
2109 * The @mdp passed into this function points to an array of 80 chars. When the
2110 * function returns, the @mdp will be filled with the model name.
2111 **/
dea3101e 2112static void
2e0fef85 2113lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e
JB
2114{
2115 lpfc_vpd_t *vp;
fefcb2b6 2116 uint16_t dev_id = phba->pcidev->device;
74b72a59 2117 int max_speed;
84774a4d 2118 int GE = 0;
da0436e9 2119 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2120 struct {
a747c9ce
JS
2121 char *name;
2122 char *bus;
2123 char *function;
2124 } m = {"<Unknown>", "", ""};
74b72a59
JW
2125
2126 if (mdp && mdp[0] != '\0'
2127 && descp && descp[0] != '\0')
2128 return;
2129
d38dd52c
JS
2130 if (phba->lmt & LMT_32Gb)
2131 max_speed = 32;
2132 else if (phba->lmt & LMT_16Gb)
c0c11512
JS
2133 max_speed = 16;
2134 else if (phba->lmt & LMT_10Gb)
74b72a59
JW
2135 max_speed = 10;
2136 else if (phba->lmt & LMT_8Gb)
2137 max_speed = 8;
2138 else if (phba->lmt & LMT_4Gb)
2139 max_speed = 4;
2140 else if (phba->lmt & LMT_2Gb)
2141 max_speed = 2;
4169d868 2142 else if (phba->lmt & LMT_1Gb)
74b72a59 2143 max_speed = 1;
4169d868
JS
2144 else
2145 max_speed = 0;
dea3101e
JB
2146
2147 vp = &phba->vpd;
dea3101e 2148
e4adb204 2149 switch (dev_id) {
06325e74 2150 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS
2151 m = (typeof(m)){"LP6000", "PCI",
2152 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2153 break;
dea3101e
JB
2154 case PCI_DEVICE_ID_SUPERFLY:
2155 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2156 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2157 else
12222f4f
JS
2158 m = (typeof(m)){"LP7000E", "PCI", ""};
2159 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2160 break;
2161 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2162 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2163 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2164 break;
2165 case PCI_DEVICE_ID_CENTAUR:
2166 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2167 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2168 else
12222f4f
JS
2169 m = (typeof(m)){"LP9000", "PCI", ""};
2170 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2171 break;
2172 case PCI_DEVICE_ID_RFLY:
a747c9ce 2173 m = (typeof(m)){"LP952", "PCI",
12222f4f 2174 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2175 break;
2176 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2177 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2178 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2179 break;
2180 case PCI_DEVICE_ID_THOR:
a747c9ce 2181 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2182 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2183 break;
2184 case PCI_DEVICE_ID_VIPER:
a747c9ce 2185 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2186 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2187 break;
2188 case PCI_DEVICE_ID_PFLY:
a747c9ce 2189 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2190 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2191 break;
2192 case PCI_DEVICE_ID_TFLY:
a747c9ce 2193 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2194 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2195 break;
2196 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2197 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2198 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2199 break;
e4adb204 2200 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2201 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2202 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2203 break;
2204 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2205 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2206 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2207 break;
2208 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS
2209 m = (typeof(m)){"LPe1000", "PCIe",
2210 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2211 break;
2212 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS
2213 m = (typeof(m)){"LPe1000-SP", "PCIe",
2214 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2215 break;
2216 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS
2217 m = (typeof(m)){"LPe1002-SP", "PCIe",
2218 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2219 break;
dea3101e 2220 case PCI_DEVICE_ID_BMID:
a747c9ce 2221 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e
JB
2222 break;
2223 case PCI_DEVICE_ID_BSMB:
12222f4f
JS
2224 m = (typeof(m)){"LP111", "PCI-X2",
2225 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2226 break;
2227 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2228 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2229 break;
e4adb204 2230 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2231 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC
2232 break;
2233 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2234 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2235 GE = 1;
e4adb204 2236 break;
dea3101e 2237 case PCI_DEVICE_ID_ZMID:
a747c9ce 2238 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2239 break;
2240 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2241 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2242 break;
2243 case PCI_DEVICE_ID_LP101:
12222f4f
JS
2244 m = (typeof(m)){"LP101", "PCI-X",
2245 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2246 break;
2247 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS
2248 m = (typeof(m)){"LP10000-S", "PCI",
2249 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2250 break;
e4adb204 2251 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS
2252 m = (typeof(m)){"LP11000-S", "PCI-X2",
2253 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2254 break;
e4adb204 2255 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS
2256 m = (typeof(m)){"LPe11000-S", "PCIe",
2257 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2258 break;
b87eab38 2259 case PCI_DEVICE_ID_SAT:
a747c9ce 2260 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2261 break;
2262 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2263 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2264 break;
2265 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2266 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2267 break;
2268 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2269 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2270 break;
2271 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2272 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2273 break;
2274 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2275 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2276 break;
84774a4d 2277 case PCI_DEVICE_ID_HORNET:
12222f4f
JS
2278 m = (typeof(m)){"LP21000", "PCIe",
2279 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS
2280 GE = 1;
2281 break;
2282 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2283 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2284 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2285 break;
2286 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2287 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2288 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2289 break;
2290 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2291 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2292 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2293 break;
da0436e9
JS
2294 case PCI_DEVICE_ID_TIGERSHARK:
2295 oneConnect = 1;
a747c9ce 2296 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2297 break;
a747c9ce 2298 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2299 oneConnect = 1;
a747c9ce
JS
2300 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2301 break;
2302 case PCI_DEVICE_ID_FALCON:
2303 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2304 "EmulexSecure Fibre"};
6669f9bb 2305 break;
98fc5dd9
JS
2306 case PCI_DEVICE_ID_BALIUS:
2307 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2308 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2309 break;
085c647c 2310 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2311 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2312 break;
12222f4f
JS
2313 case PCI_DEVICE_ID_LANCER_FC_VF:
2314 m = (typeof(m)){"LPe16000", "PCIe",
2315 "Obsolete, Unsupported Fibre Channel Adapter"};
2316 break;
085c647c
JS
2317 case PCI_DEVICE_ID_LANCER_FCOE:
2318 oneConnect = 1;
079b5c91 2319 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2320 break;
12222f4f
JS
2321 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2322 oneConnect = 1;
2323 m = (typeof(m)){"OCe15100", "PCIe",
2324 "Obsolete, Unsupported FCoE"};
2325 break;
d38dd52c
JS
2326 case PCI_DEVICE_ID_LANCER_G6_FC:
2327 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2328 break;
f8cafd38
JS
2329 case PCI_DEVICE_ID_SKYHAWK:
2330 case PCI_DEVICE_ID_SKYHAWK_VF:
2331 oneConnect = 1;
2332 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2333 break;
5cc36b3c 2334 default:
a747c9ce 2335 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2336 break;
dea3101e 2337 }
74b72a59
JW
2338
2339 if (mdp && mdp[0] == '\0')
2340 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS
2341 /*
2342 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS
2343 * and we put the port number on the end
2344 */
2345 if (descp && descp[0] == '\0') {
2346 if (oneConnect)
2347 snprintf(descp, 255,
4169d868 2348 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2349 m.name, m.function,
da0436e9 2350 phba->Port);
4169d868
JS
2351 else if (max_speed == 0)
2352 snprintf(descp, 255,
290237d2 2353 "Emulex %s %s %s",
4169d868 2354 m.name, m.bus, m.function);
da0436e9
JS
2355 else
2356 snprintf(descp, 255,
2357 "Emulex %s %d%s %s %s",
a747c9ce
JS
2358 m.name, max_speed, (GE) ? "GE" : "Gb",
2359 m.bus, m.function);
da0436e9 2360 }
dea3101e
JB
2361}
2362
e59058c4 2363/**
3621a710 2364 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS
2365 * @phba: pointer to lpfc hba data structure.
2366 * @pring: pointer to a IOCB ring.
2367 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2368 *
2369 * This routine posts a given number of IOCBs with the associated DMA buffer
2370 * descriptors specified by the cnt argument to the given IOCB ring.
2371 *
2372 * Return codes
2373 * The number of IOCBs NOT able to be posted to the IOCB ring.
2374 **/
dea3101e 2375int
495a714c 2376lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e
JB
2377{
2378 IOCB_t *icmd;
0bd4ca25 2379 struct lpfc_iocbq *iocb;
dea3101e
JB
2380 struct lpfc_dmabuf *mp1, *mp2;
2381
2382 cnt += pring->missbufcnt;
2383
2384 /* While there are buffers to post */
2385 while (cnt > 0) {
2386 /* Allocate buffer for command iocb */
0bd4ca25 2387 iocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
2388 if (iocb == NULL) {
2389 pring->missbufcnt = cnt;
2390 return cnt;
2391 }
dea3101e
JB
2392 icmd = &iocb->iocb;
2393
2394 /* 2 buffers can be posted per command */
2395 /* Allocate buffer to post */
2396 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2397 if (mp1)
98c9ea5c
JS
2398 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2399 if (!mp1 || !mp1->virt) {
c9475cb0 2400 kfree(mp1);
604a3e30 2401 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2402 pring->missbufcnt = cnt;
2403 return cnt;
2404 }
2405
2406 INIT_LIST_HEAD(&mp1->list);
2407 /* Allocate buffer to post */
2408 if (cnt > 1) {
2409 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2410 if (mp2)
2411 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2412 &mp2->phys);
98c9ea5c 2413 if (!mp2 || !mp2->virt) {
c9475cb0 2414 kfree(mp2);
dea3101e
JB
2415 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2416 kfree(mp1);
604a3e30 2417 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2418 pring->missbufcnt = cnt;
2419 return cnt;
2420 }
2421
2422 INIT_LIST_HEAD(&mp2->list);
2423 } else {
2424 mp2 = NULL;
2425 }
2426
2427 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2428 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2429 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2430 icmd->ulpBdeCount = 1;
2431 cnt--;
2432 if (mp2) {
2433 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2434 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2435 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2436 cnt--;
2437 icmd->ulpBdeCount = 2;
2438 }
2439
2440 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2441 icmd->ulpLe = 1;
2442
3772a991
JS
2443 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2444 IOCB_ERROR) {
dea3101e
JB
2445 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2446 kfree(mp1);
2447 cnt++;
2448 if (mp2) {
2449 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2450 kfree(mp2);
2451 cnt++;
2452 }
604a3e30 2453 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2454 pring->missbufcnt = cnt;
dea3101e
JB
2455 return cnt;
2456 }
dea3101e 2457 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2458 if (mp2)
dea3101e 2459 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e
JB
2460 }
2461 pring->missbufcnt = 0;
2462 return 0;
2463}
2464
e59058c4 2465/**
3621a710 2466 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS
2467 * @phba: pointer to lpfc hba data structure.
2468 *
2469 * This routine posts initial receive IOCB buffers to the ELS ring. The
2470 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2471 * set to 64 IOCBs. SLI3 only.
e59058c4
JS
2472 *
2473 * Return codes
2474 * 0 - success (currently always success)
2475 **/
dea3101e 2476static int
2e0fef85 2477lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e
JB
2478{
2479 struct lpfc_sli *psli = &phba->sli;
2480
2481 /* Ring 0, ELS / CT buffers */
895427bd 2482 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e
JB
2483 /* Ring 2 - FCP no buffers needed */
2484
2485 return 0;
2486}
2487
2488#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2489
e59058c4 2490/**
3621a710 2491 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS
2492 * @HashResultPointer: pointer to an array as hash table.
2493 *
2494 * This routine sets up the initial values to the array of hash table entries
2495 * for the LC HBAs.
2496 **/
dea3101e
JB
2497static void
2498lpfc_sha_init(uint32_t * HashResultPointer)
2499{
2500 HashResultPointer[0] = 0x67452301;
2501 HashResultPointer[1] = 0xEFCDAB89;
2502 HashResultPointer[2] = 0x98BADCFE;
2503 HashResultPointer[3] = 0x10325476;
2504 HashResultPointer[4] = 0xC3D2E1F0;
2505}
2506
e59058c4 2507/**
3621a710 2508 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS
2509 * @HashResultPointer: pointer to an initial/result hash table.
2510 * @HashWorkingPointer: pointer to an working hash table.
2511 *
2512 * This routine iterates an initial hash table pointed by @HashResultPointer
2513 * with the values from the working hash table pointeed by @HashWorkingPointer.
2514 * The results are putting back to the initial hash table, returned through
2515 * the @HashResultPointer as the result hash table.
2516 **/
dea3101e
JB
2517static void
2518lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2519{
2520 int t;
2521 uint32_t TEMP;
2522 uint32_t A, B, C, D, E;
2523 t = 16;
2524 do {
2525 HashWorkingPointer[t] =
2526 S(1,
2527 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2528 8] ^
2529 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2530 } while (++t <= 79);
2531 t = 0;
2532 A = HashResultPointer[0];
2533 B = HashResultPointer[1];
2534 C = HashResultPointer[2];
2535 D = HashResultPointer[3];
2536 E = HashResultPointer[4];
2537
2538 do {
2539 if (t < 20) {
2540 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2541 } else if (t < 40) {
2542 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2543 } else if (t < 60) {
2544 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2545 } else {
2546 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2547 }
2548 TEMP += S(5, A) + E + HashWorkingPointer[t];
2549 E = D;
2550 D = C;
2551 C = S(30, B);
2552 B = A;
2553 A = TEMP;
2554 } while (++t <= 79);
2555
2556 HashResultPointer[0] += A;
2557 HashResultPointer[1] += B;
2558 HashResultPointer[2] += C;
2559 HashResultPointer[3] += D;
2560 HashResultPointer[4] += E;
2561
2562}
2563
e59058c4 2564/**
3621a710 2565 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS
2566 * @RandomChallenge: pointer to the entry of host challenge random number array.
2567 * @HashWorking: pointer to the entry of the working hash array.
2568 *
2569 * This routine calculates the working hash array referred by @HashWorking
2570 * from the challenge random numbers associated with the host, referred by
2571 * @RandomChallenge. The result is put into the entry of the working hash
2572 * array and returned by reference through @HashWorking.
2573 **/
dea3101e
JB
2574static void
2575lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2576{
2577 *HashWorking = (*RandomChallenge ^ *HashWorking);
2578}
2579
e59058c4 2580/**
3621a710 2581 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS
2582 * @phba: pointer to lpfc hba data structure.
2583 * @hbainit: pointer to an array of unsigned 32-bit integers.
2584 *
2585 * This routine performs the special handling for LC HBA initialization.
2586 **/
dea3101e
JB
2587void
2588lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2589{
2590 int t;
2591 uint32_t *HashWorking;
2e0fef85 2592 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2593
bbfbbbc1 2594 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e
JB
2595 if (!HashWorking)
2596 return;
2597
dea3101e
JB
2598 HashWorking[0] = HashWorking[78] = *pwwnn++;
2599 HashWorking[1] = HashWorking[79] = *pwwnn;
2600
2601 for (t = 0; t < 7; t++)
2602 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2603
2604 lpfc_sha_init(hbainit);
2605 lpfc_sha_iterate(hbainit, HashWorking);
2606 kfree(HashWorking);
2607}
2608
e59058c4 2609/**
3621a710 2610 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS
2611 * @vport: pointer to a virtual N_Port data structure.
2612 *
2613 * This routine performs the necessary cleanups before deleting the @vport.
2614 * It invokes the discovery state machine to perform necessary state
2615 * transitions and to release the ndlps associated with the @vport. Note,
2616 * the physical port is treated as @vport 0.
2617 **/
87af33fe 2618void
2e0fef85 2619lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2620{
87af33fe 2621 struct lpfc_hba *phba = vport->phba;
dea3101e 2622 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2623 int i = 0;
dea3101e 2624
87af33fe
JS
2625 if (phba->link_state > LPFC_LINK_DOWN)
2626 lpfc_port_link_failure(vport);
2627
2628 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS
2629 if (!NLP_CHK_NODE_ACT(ndlp)) {
2630 ndlp = lpfc_enable_node(vport, ndlp,
2631 NLP_STE_UNUSED_NODE);
2632 if (!ndlp)
2633 continue;
2634 spin_lock_irq(&phba->ndlp_lock);
2635 NLP_SET_FREE_REQ(ndlp);
2636 spin_unlock_irq(&phba->ndlp_lock);
2637 /* Trigger the release of the ndlp memory */
2638 lpfc_nlp_put(ndlp);
2639 continue;
2640 }
2641 spin_lock_irq(&phba->ndlp_lock);
2642 if (NLP_CHK_FREE_REQ(ndlp)) {
2643 /* The ndlp should not be in memory free mode already */
2644 spin_unlock_irq(&phba->ndlp_lock);
2645 continue;
2646 } else
2647 /* Indicate request for freeing ndlp memory */
2648 NLP_SET_FREE_REQ(ndlp);
2649 spin_unlock_irq(&phba->ndlp_lock);
2650
58da1ffb
JS
2651 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2652 ndlp->nlp_DID == Fabric_DID) {
2653 /* Just free up ndlp with Fabric_DID for vports */
2654 lpfc_nlp_put(ndlp);
2655 continue;
2656 }
2657
eff4a01b
JS
2658 /* take care of nodes in unused state before the state
2659 * machine taking action.
2660 */
2661 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2662 lpfc_nlp_put(ndlp);
2663 continue;
2664 }
2665
87af33fe
JS
2666 if (ndlp->nlp_type & NLP_FABRIC)
2667 lpfc_disc_state_machine(vport, ndlp, NULL,
2668 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2669
a0f2d3ef
JS
2670 if (ndlp->nlp_fc4_type & NLP_FC4_NVME) {
2671 /* Remove the NVME transport reference now and
2672 * continue to remove the node.
2673 */
2674 lpfc_nlp_put(ndlp);
2675 }
2676
87af33fe
JS
2677 lpfc_disc_state_machine(vport, ndlp, NULL,
2678 NLP_EVT_DEVICE_RM);
2679 }
2680
a8adb832
JS
2681 /* At this point, ALL ndlp's should be gone
2682 * because of the previous NLP_EVT_DEVICE_RM.
2683 * Lets wait for this to happen, if needed.
2684 */
87af33fe 2685 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2686 if (i++ > 3000) {
87af33fe 2687 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2688 "0233 Nodelist not empty\n");
e47c9093
JS
2689 list_for_each_entry_safe(ndlp, next_ndlp,
2690 &vport->fc_nodes, nlp_listp) {
2691 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2692 LOG_NODE,
d7c255b2 2693 "0282 did:x%x ndlp:x%p "
e47c9093
JS
2694 "usgmap:x%x refcnt:%d\n",
2695 ndlp->nlp_DID, (void *)ndlp,
2696 ndlp->nlp_usg_map,
2c935bc5 2697 kref_read(&ndlp->kref));
e47c9093 2698 }
a8adb832 2699 break;
87af33fe 2700 }
a8adb832
JS
2701
2702 /* Wait for any activity on ndlps to settle */
2703 msleep(10);
87af33fe 2704 }
1151e3ec 2705 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e
JB
2706}
2707
e59058c4 2708/**
3621a710 2709 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS
2710 * @vport: pointer to a virtual N_Port data structure.
2711 *
2712 * This routine stops all the timers associated with a @vport. This function
2713 * is invoked before disabling or deleting a @vport. Note that the physical
2714 * port is treated as @vport 0.
2715 **/
92d7f7b0
JS
2716void
2717lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2718{
92d7f7b0 2719 del_timer_sync(&vport->els_tmofunc);
92494144 2720 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS
2721 lpfc_can_disctmo(vport);
2722 return;
dea3101e
JB
2723}
2724
ecfd03c6
JS
2725/**
2726 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2727 * @phba: pointer to lpfc hba data structure.
2728 *
2729 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2730 * caller of this routine should already hold the host lock.
2731 **/
2732void
2733__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2734{
5ac6b303
JS
2735 /* Clear pending FCF rediscovery wait flag */
2736 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2737
ecfd03c6
JS
2738 /* Now, try to stop the timer */
2739 del_timer(&phba->fcf.redisc_wait);
2740}
2741
2742/**
2743 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2744 * @phba: pointer to lpfc hba data structure.
2745 *
2746 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2747 * checks whether the FCF rediscovery wait timer is pending with the host
2748 * lock held before proceeding with disabling the timer and clearing the
2749 * wait timer pendig flag.
2750 **/
2751void
2752lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2753{
2754 spin_lock_irq(&phba->hbalock);
2755 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2756 /* FCF rediscovery timer already fired or stopped */
2757 spin_unlock_irq(&phba->hbalock);
2758 return;
2759 }
2760 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS
2761 /* Clear failover in progress flags */
2762 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS
2763 spin_unlock_irq(&phba->hbalock);
2764}
2765
e59058c4 2766/**
3772a991 2767 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS
2768 * @phba: pointer to lpfc hba data structure.
2769 *
2770 * This routine stops all the timers associated with a HBA. This function is
2771 * invoked before either putting a HBA offline or unloading the driver.
2772 **/
3772a991
JS
2773void
2774lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2775{
51ef4c26 2776 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2777 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2778 del_timer_sync(&phba->fabric_block_timer);
9399627f 2779 del_timer_sync(&phba->eratt_poll);
3772a991 2780 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS
2781 if (phba->sli_rev == LPFC_SLI_REV4) {
2782 del_timer_sync(&phba->rrq_tmr);
2783 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2784 }
3772a991
JS
2785 phba->hb_outstanding = 0;
2786
2787 switch (phba->pci_dev_grp) {
2788 case LPFC_PCI_DEV_LP:
2789 /* Stop any LightPulse device specific driver timers */
2790 del_timer_sync(&phba->fcp_poll_timer);
2791 break;
2792 case LPFC_PCI_DEV_OC:
2793 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2794 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS
2795 break;
2796 default:
2797 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2798 "0297 Invalid device group (x%x)\n",
2799 phba->pci_dev_grp);
2800 break;
2801 }
2e0fef85 2802 return;
dea3101e
JB
2803}
2804
e59058c4 2805/**
3621a710 2806 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS
2807 * @phba: pointer to lpfc hba data structure.
2808 *
2809 * This routine marks a HBA's management interface as blocked. Once the HBA's
2810 * management interface is marked as blocked, all the user space access to
2811 * the HBA, whether they are from sysfs interface or libdfc interface will
2812 * all be blocked. The HBA is set to block the management interface when the
2813 * driver prepares the HBA interface for online or offline.
2814 **/
a6ababd2 2815static void
618a5230 2816lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB
2817{
2818 unsigned long iflag;
6e7288d9
JS
2819 uint8_t actcmd = MBX_HEARTBEAT;
2820 unsigned long timeout;
2821
a6ababd2
AB
2822 spin_lock_irqsave(&phba->hbalock, iflag);
2823 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS
2824 spin_unlock_irqrestore(&phba->hbalock, iflag);
2825 if (mbx_action == LPFC_MBX_NO_WAIT)
2826 return;
2827 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2828 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2829 if (phba->sli.mbox_active) {
6e7288d9 2830 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS
2831 /* Determine how long we might wait for the active mailbox
2832 * command to be gracefully completed by firmware.
2833 */
2834 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2835 phba->sli.mbox_active) * 1000) + jiffies;
2836 }
a6ababd2 2837 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2838
6e7288d9
JS
2839 /* Wait for the outstnading mailbox command to complete */
2840 while (phba->sli.mbox_active) {
2841 /* Check active mailbox complete status every 2ms */
2842 msleep(2);
2843 if (time_after(jiffies, timeout)) {
2844 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2845 "2813 Mgmt IO is Blocked %x "
2846 "- mbox cmd %x still active\n",
2847 phba->sli.sli_flag, actcmd);
2848 break;
2849 }
2850 }
a6ababd2
AB
2851}
2852
6b5151fd
JS
2853/**
2854 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2855 * @phba: pointer to lpfc hba data structure.
2856 *
2857 * Allocate RPIs for all active remote nodes. This is needed whenever
2858 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2859 * is to fixup the temporary rpi assignments.
2860 **/
2861void
2862lpfc_sli4_node_prep(struct lpfc_hba *phba)
2863{
2864 struct lpfc_nodelist *ndlp, *next_ndlp;
2865 struct lpfc_vport **vports;
2866 int i;
2867
2868 if (phba->sli_rev != LPFC_SLI_REV4)
2869 return;
2870
2871 vports = lpfc_create_vport_work_array(phba);
2872 if (vports != NULL) {
2873 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
2874 if (vports[i]->load_flag & FC_UNLOADING)
2875 continue;
2876
2877 list_for_each_entry_safe(ndlp, next_ndlp,
2878 &vports[i]->fc_nodes,
2879 nlp_listp) {
be6bb941 2880 if (NLP_CHK_NODE_ACT(ndlp)) {
6b5151fd
JS
2881 ndlp->nlp_rpi =
2882 lpfc_sli4_alloc_rpi(phba);
be6bb941
JS
2883 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
2884 LOG_NODE,
2885 "0009 rpi:%x DID:%x "
2886 "flg:%x map:%x %p\n",
2887 ndlp->nlp_rpi,
2888 ndlp->nlp_DID,
2889 ndlp->nlp_flag,
2890 ndlp->nlp_usg_map,
2891 ndlp);
2892 }
6b5151fd
JS
2893 }
2894 }
2895 }
2896 lpfc_destroy_vport_work_array(phba, vports);
2897}
2898
e59058c4 2899/**
3621a710 2900 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS
2901 * @phba: pointer to lpfc hba data structure.
2902 *
2903 * This routine initializes the HBA and brings a HBA online. During this
2904 * process, the management interface is blocked to prevent user space access
2905 * to the HBA interfering with the driver initialization.
2906 *
2907 * Return codes
2908 * 0 - successful
2909 * 1 - failed
2910 **/
dea3101e 2911int
2e0fef85 2912lpfc_online(struct lpfc_hba *phba)
dea3101e 2913{
372bd282 2914 struct lpfc_vport *vport;
549e55cd
JS
2915 struct lpfc_vport **vports;
2916 int i;
16a3a208 2917 bool vpis_cleared = false;
2e0fef85 2918
dea3101e
JB
2919 if (!phba)
2920 return 0;
372bd282 2921 vport = phba->pport;
dea3101e 2922
2e0fef85 2923 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e
JB
2924 return 0;
2925
ed957684 2926 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 2927 "0458 Bring Adapter online\n");
dea3101e 2928
618a5230 2929 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 2930
da0436e9
JS
2931 if (phba->sli_rev == LPFC_SLI_REV4) {
2932 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
2933 lpfc_unblock_mgmt_io(phba);
2934 return 1;
2935 }
16a3a208
JS
2936 spin_lock_irq(&phba->hbalock);
2937 if (!phba->sli4_hba.max_cfg_param.vpi_used)
2938 vpis_cleared = true;
2939 spin_unlock_irq(&phba->hbalock);
da0436e9 2940 } else {
895427bd 2941 lpfc_sli_queue_init(phba);
da0436e9
JS
2942 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
2943 lpfc_unblock_mgmt_io(phba);
2944 return 1;
2945 }
46fa311e 2946 }
dea3101e 2947
549e55cd 2948 vports = lpfc_create_vport_work_array(phba);
aeb6641f 2949 if (vports != NULL) {
da0436e9 2950 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS
2951 struct Scsi_Host *shost;
2952 shost = lpfc_shost_from_vport(vports[i]);
2953 spin_lock_irq(shost->host_lock);
2954 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
2955 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
2956 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 2957 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 2958 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS
2959 if ((vpis_cleared) &&
2960 (vports[i]->port_type !=
2961 LPFC_PHYSICAL_PORT))
2962 vports[i]->vpi = 0;
2963 }
549e55cd
JS
2964 spin_unlock_irq(shost->host_lock);
2965 }
aeb6641f
AB
2966 }
2967 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 2968
46fa311e 2969 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
2970 return 0;
2971}
2972
e59058c4 2973/**
3621a710 2974 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS
2975 * @phba: pointer to lpfc hba data structure.
2976 *
2977 * This routine marks a HBA's management interface as not blocked. Once the
2978 * HBA's management interface is marked as not blocked, all the user space
2979 * access to the HBA, whether they are from sysfs interface or libdfc
2980 * interface will be allowed. The HBA is set to block the management interface
2981 * when the driver prepares the HBA interface for online or offline and then
2982 * set to unblock the management interface afterwards.
2983 **/
46fa311e
JS
2984void
2985lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
2986{
2987 unsigned long iflag;
2988
2e0fef85
JS
2989 spin_lock_irqsave(&phba->hbalock, iflag);
2990 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
2991 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS
2992}
2993
e59058c4 2994/**
3621a710 2995 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS
2996 * @phba: pointer to lpfc hba data structure.
2997 *
2998 * This routine is invoked to prepare a HBA to be brought offline. It performs
2999 * unregistration login to all the nodes on all vports and flushes the mailbox
3000 * queue to make it ready to be brought offline.
3001 **/
46fa311e 3002void
618a5230 3003lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3004{
2e0fef85 3005 struct lpfc_vport *vport = phba->pport;
46fa311e 3006 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3007 struct lpfc_vport **vports;
72100cc4 3008 struct Scsi_Host *shost;
87af33fe 3009 int i;
dea3101e 3010
2e0fef85 3011 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3012 return;
dea3101e 3013
618a5230 3014 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e
JB
3015
3016 lpfc_linkdown(phba);
3017
87af33fe
JS
3018 /* Issue an unreg_login to all nodes on all vports */
3019 vports = lpfc_create_vport_work_array(phba);
3020 if (vports != NULL) {
da0436e9 3021 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS
3022 if (vports[i]->load_flag & FC_UNLOADING)
3023 continue;
72100cc4
JS
3024 shost = lpfc_shost_from_vport(vports[i]);
3025 spin_lock_irq(shost->host_lock);
c868595d 3026 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS
3027 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3028 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3029 spin_unlock_irq(shost->host_lock);
695a814e 3030
87af33fe
JS
3031 shost = lpfc_shost_from_vport(vports[i]);
3032 list_for_each_entry_safe(ndlp, next_ndlp,
3033 &vports[i]->fc_nodes,
3034 nlp_listp) {
e47c9093
JS
3035 if (!NLP_CHK_NODE_ACT(ndlp))
3036 continue;
87af33fe
JS
3037 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3038 continue;
3039 if (ndlp->nlp_type & NLP_FABRIC) {
3040 lpfc_disc_state_machine(vports[i], ndlp,
3041 NULL, NLP_EVT_DEVICE_RECOVERY);
3042 lpfc_disc_state_machine(vports[i], ndlp,
3043 NULL, NLP_EVT_DEVICE_RM);
3044 }
3045 spin_lock_irq(shost->host_lock);
3046 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3047 spin_unlock_irq(shost->host_lock);
6b5151fd
JS
3048 /*
3049 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS
3050 * RPI. Get a new RPI when the adapter port
3051 * comes back online.
6b5151fd 3052 */
be6bb941
JS
3053 if (phba->sli_rev == LPFC_SLI_REV4) {
3054 lpfc_printf_vlog(ndlp->vport,
3055 KERN_INFO, LOG_NODE,
3056 "0011 lpfc_offline: "
3057 "ndlp:x%p did %x "
3058 "usgmap:x%x rpi:%x\n",
3059 ndlp, ndlp->nlp_DID,
3060 ndlp->nlp_usg_map,
3061 ndlp->nlp_rpi);
3062
6b5151fd 3063 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3064 }
87af33fe
JS
3065 lpfc_unreg_rpi(vports[i], ndlp);
3066 }
3067 }
3068 }
09372820 3069 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3070
618a5230 3071 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
46fa311e
JS
3072}
3073
e59058c4 3074/**
3621a710 3075 * lpfc_offline - Bring a HBA offline
e59058c4
JS
3076 * @phba: pointer to lpfc hba data structure.
3077 *
3078 * This routine actually brings a HBA offline. It stops all the timers
3079 * associated with the HBA, brings down the SLI layer, and eventually
3080 * marks the HBA as in offline state for the upper layer protocol.
3081 **/
46fa311e 3082void
2e0fef85 3083lpfc_offline(struct lpfc_hba *phba)
46fa311e 3084{
549e55cd
JS
3085 struct Scsi_Host *shost;
3086 struct lpfc_vport **vports;
3087 int i;
46fa311e 3088
549e55cd 3089 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3090 return;
688a8863 3091
da0436e9
JS
3092 /* stop port and all timers associated with this hba */
3093 lpfc_stop_port(phba);
51ef4c26
JS
3094 vports = lpfc_create_vport_work_array(phba);
3095 if (vports != NULL)
da0436e9 3096 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3097 lpfc_stop_vport_timers(vports[i]);
09372820 3098 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3099 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3100 "0460 Bring Adapter offline\n");
dea3101e
JB
3101 /* Bring down the SLI Layer and cleanup. The HBA is offline
3102 now. */
3103 lpfc_sli_hba_down(phba);
92d7f7b0 3104 spin_lock_irq(&phba->hbalock);
7054a606 3105 phba->work_ha = 0;
92d7f7b0 3106 spin_unlock_irq(&phba->hbalock);
549e55cd
JS
3107 vports = lpfc_create_vport_work_array(phba);
3108 if (vports != NULL)
da0436e9 3109 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3110 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS
3111 spin_lock_irq(shost->host_lock);
3112 vports[i]->work_port_events = 0;
3113 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3114 spin_unlock_irq(shost->host_lock);
3115 }
09372820 3116 lpfc_destroy_vport_work_array(phba, vports);
dea3101e
JB
3117}
3118
e59058c4 3119/**
3621a710 3120 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS
3121 * @phba: pointer to lpfc hba data structure.
3122 *
3123 * This routine is to free all the SCSI buffers and IOCBs from the driver
3124 * list back to kernel. It is called from lpfc_pci_remove_one to free
3125 * the internal resources before the device is removed from the system.
e59058c4 3126 **/
8a9d2e80 3127static void
2e0fef85 3128lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e
JB
3129{
3130 struct lpfc_scsi_buf *sb, *sb_next;
3131 struct lpfc_iocbq *io, *io_next;
3132
895427bd
JS
3133 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3134 return;
3135
2e0fef85 3136 spin_lock_irq(&phba->hbalock);
a40fc5f0 3137
dea3101e 3138 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS
3139
3140 spin_lock(&phba->scsi_buf_list_put_lock);
3141 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3142 list) {
dea3101e 3143 list_del(&sb->list);
895427bd 3144 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3145 sb->dma_handle);
dea3101e
JB
3146 kfree(sb);
3147 phba->total_scsi_bufs--;
3148 }
a40fc5f0
JS
3149 spin_unlock(&phba->scsi_buf_list_put_lock);
3150
3151 spin_lock(&phba->scsi_buf_list_get_lock);
3152 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3153 list) {
dea3101e 3154 list_del(&sb->list);
895427bd 3155 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3156 sb->dma_handle);
dea3101e
JB
3157 kfree(sb);
3158 phba->total_scsi_bufs--;
3159 }
a40fc5f0 3160 spin_unlock(&phba->scsi_buf_list_get_lock);
dea3101e
JB
3161
3162 /* Release all the lpfc_iocbq entries maintained by this host. */
3163 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) {
3164 list_del(&io->list);
3165 kfree(io);
3166 phba->total_iocbq_bufs--;
3167 }
6d368e53 3168
2e0fef85 3169 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3170}
895427bd
JS
3171/**
3172 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3173 * @phba: pointer to lpfc hba data structure.
3174 *
3175 * This routine is to free all the NVME buffers and IOCBs from the driver
3176 * list back to kernel. It is called from lpfc_pci_remove_one to free
3177 * the internal resources before the device is removed from the system.
3178 **/
3179static void
3180lpfc_nvme_free(struct lpfc_hba *phba)
3181{
3182 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
3183 struct lpfc_iocbq *io, *io_next;
3184
3185 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3186 return;
3187
3188 spin_lock_irq(&phba->hbalock);
3189
3190 /* Release all the lpfc_nvme_bufs maintained by this host. */
3191 spin_lock(&phba->nvme_buf_list_put_lock);
3192 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3193 &phba->lpfc_nvme_buf_list_put, list) {
3194 list_del(&lpfc_ncmd->list);
3195 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3196 lpfc_ncmd->dma_handle);
3197 kfree(lpfc_ncmd);
3198 phba->total_nvme_bufs--;
3199 }
3200 spin_unlock(&phba->nvme_buf_list_put_lock);
3201
3202 spin_lock(&phba->nvme_buf_list_get_lock);
3203 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3204 &phba->lpfc_nvme_buf_list_get, list) {
3205 list_del(&lpfc_ncmd->list);
3206 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3207 lpfc_ncmd->dma_handle);
3208 kfree(lpfc_ncmd);
3209 phba->total_nvme_bufs--;
3210 }
3211 spin_unlock(&phba->nvme_buf_list_get_lock);
8a9d2e80 3212
895427bd
JS
3213 /* Release all the lpfc_iocbq entries maintained by this host. */
3214 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) {
3215 list_del(&io->list);
3216 kfree(io);
3217 phba->total_iocbq_bufs--;
3218 }
3219
3220 spin_unlock_irq(&phba->hbalock);
3221}
8a9d2e80 3222/**
895427bd 3223 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS
3224 * @phba: pointer to lpfc hba data structure.
3225 *
3226 * This routine first calculates the sizes of the current els and allocated
3227 * scsi sgl lists, and then goes through all sgls to updates the physical
3228 * XRIs assigned due to port function reset. During port initialization, the
3229 * current els and allocated scsi sgl lists are 0s.
3230 *
3231 * Return codes
3232 * 0 - successful (for now, it always returns 0)
3233 **/
3234int
895427bd 3235lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS
3236{
3237 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3238 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3239 LIST_HEAD(els_sgl_list);
8a9d2e80
JS
3240 int rc;
3241
3242 /*
3243 * update on pci function's els xri-sgl list
3244 */
3245 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3246
8a9d2e80
JS
3247 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3248 /* els xri-sgl expanded */
3249 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3250 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3251 "3157 ELS xri-sgl count increased from "
3252 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3253 els_xri_cnt);
3254 /* allocate the additional els sgls */
3255 for (i = 0; i < xri_cnt; i++) {
3256 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3257 GFP_KERNEL);
3258 if (sglq_entry == NULL) {
3259 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3260 "2562 Failure to allocate an "
3261 "ELS sgl entry:%d\n", i);
3262 rc = -ENOMEM;
3263 goto out_free_mem;
3264 }
3265 sglq_entry->buff_type = GEN_BUFF_TYPE;
3266 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3267 &sglq_entry->phys);
3268 if (sglq_entry->virt == NULL) {
3269 kfree(sglq_entry);
3270 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3271 "2563 Failure to allocate an "
3272 "ELS mbuf:%d\n", i);
3273 rc = -ENOMEM;
3274 goto out_free_mem;
3275 }
3276 sglq_entry->sgl = sglq_entry->virt;
3277 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3278 sglq_entry->state = SGL_FREED;
3279 list_add_tail(&sglq_entry->list, &els_sgl_list);
3280 }
38c20673 3281 spin_lock_irq(&phba->hbalock);
895427bd
JS
3282 spin_lock(&phba->sli4_hba.sgl_list_lock);
3283 list_splice_init(&els_sgl_list,
3284 &phba->sli4_hba.lpfc_els_sgl_list);
3285 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3286 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
3287 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3288 /* els xri-sgl shrinked */
3289 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3290 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3291 "3158 ELS xri-sgl count decreased from "
3292 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3293 els_xri_cnt);
3294 spin_lock_irq(&phba->hbalock);
895427bd
JS
3295 spin_lock(&phba->sli4_hba.sgl_list_lock);
3296 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3297 &els_sgl_list);
8a9d2e80
JS
3298 /* release extra els sgls from list */
3299 for (i = 0; i < xri_cnt; i++) {
3300 list_remove_head(&els_sgl_list,
3301 sglq_entry, struct lpfc_sglq, list);
3302 if (sglq_entry) {
895427bd
JS
3303 __lpfc_mbuf_free(phba, sglq_entry->virt,
3304 sglq_entry->phys);
8a9d2e80
JS
3305 kfree(sglq_entry);
3306 }
3307 }
895427bd
JS
3308 list_splice_init(&els_sgl_list,
3309 &phba->sli4_hba.lpfc_els_sgl_list);
3310 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS
3311 spin_unlock_irq(&phba->hbalock);
3312 } else
3313 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3314 "3163 ELS xri-sgl count unchanged: %d\n",
3315 els_xri_cnt);
3316 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3317
3318 /* update xris to els sgls on the list */
3319 sglq_entry = NULL;
3320 sglq_entry_next = NULL;
3321 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3322 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS
3323 lxri = lpfc_sli4_next_xritag(phba);
3324 if (lxri == NO_XRI) {
3325 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3326 "2400 Failed to allocate xri for "
3327 "ELS sgl\n");
3328 rc = -ENOMEM;
3329 goto out_free_mem;
3330 }
3331 sglq_entry->sli4_lxritag = lxri;
3332 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3333 }
895427bd
JS
3334 return 0;
3335
3336out_free_mem:
3337 lpfc_free_els_sgl_list(phba);
3338 return rc;
3339}
3340
3341/**
3342 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3343 * @phba: pointer to lpfc hba data structure.
3344 *
3345 * This routine first calculates the sizes of the current els and allocated
3346 * scsi sgl lists, and then goes through all sgls to updates the physical
3347 * XRIs assigned due to port function reset. During port initialization, the
3348 * current els and allocated scsi sgl lists are 0s.
3349 *
3350 * Return codes
3351 * 0 - successful (for now, it always returns 0)
3352 **/
3353int
3354lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3355{
3356 struct lpfc_scsi_buf *psb, *psb_next;
3357 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3358 LIST_HEAD(scsi_sgl_list);
3359 int rc;
8a9d2e80
JS
3360
3361 /*
895427bd 3362 * update on pci function's els xri-sgl list
8a9d2e80 3363 */
895427bd 3364 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS
3365 phba->total_scsi_bufs = 0;
3366
895427bd
JS
3367 /*
3368 * update on pci function's allocated scsi xri-sgl list
3369 */
8a9d2e80
JS
3370 /* maximum number of xris available for scsi buffers */
3371 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3372 els_xri_cnt;
3373
895427bd
JS
3374 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3375 return 0;
3376
3377 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3378 phba->sli4_hba.scsi_xri_max = /* Split them up */
3379 (phba->sli4_hba.scsi_xri_max *
3380 phba->cfg_xri_split) / 100;
8a9d2e80 3381
a40fc5f0 3382 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3383 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3384 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3385 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3386 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3387 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS
3388
3389 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3390 /* max scsi xri shrinked below the allocated scsi buffers */
3391 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3392 phba->sli4_hba.scsi_xri_max;
3393 /* release the extra allocated scsi buffers */
3394 for (i = 0; i < scsi_xri_cnt; i++) {
3395 list_remove_head(&scsi_sgl_list, psb,
3396 struct lpfc_scsi_buf, list);
a2fc4aef 3397 if (psb) {
895427bd 3398 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS
3399 psb->data, psb->dma_handle);
3400 kfree(psb);
3401 }
8a9d2e80 3402 }
a40fc5f0 3403 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3404 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3405 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS
3406 }
3407
3408 /* update xris associated to remaining allocated scsi buffers */
3409 psb = NULL;
3410 psb_next = NULL;
3411 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3412 lxri = lpfc_sli4_next_xritag(phba);
3413 if (lxri == NO_XRI) {
3414 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3415 "2560 Failed to allocate xri for "
3416 "scsi buffer\n");
3417 rc = -ENOMEM;
3418 goto out_free_mem;
3419 }
3420 psb->cur_iocbq.sli4_lxritag = lxri;
3421 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3422 }
a40fc5f0 3423 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3424 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3425 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3426 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3427 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3428 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3429 return 0;
8a9d2e80
JS
3430
3431out_free_mem:
8a9d2e80
JS
3432 lpfc_scsi_free(phba);
3433 return rc;
dea3101e
JB
3434}
3435
895427bd
JS
3436/**
3437 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3438 * @phba: pointer to lpfc hba data structure.
3439 *
3440 * This routine first calculates the sizes of the current els and allocated
3441 * scsi sgl lists, and then goes through all sgls to updates the physical
3442 * XRIs assigned due to port function reset. During port initialization, the
3443 * current els and allocated scsi sgl lists are 0s.
3444 *
3445 * Return codes
3446 * 0 - successful (for now, it always returns 0)
3447 **/
3448int
3449lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3450{
3451 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3452 uint16_t i, lxri, els_xri_cnt;
3453 uint16_t nvme_xri_cnt, nvme_xri_max;
3454 LIST_HEAD(nvme_sgl_list);
3455 int rc;
3456
3457 phba->total_nvme_bufs = 0;
3458
3459 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3460 return 0;
3461 /*
3462 * update on pci function's allocated nvme xri-sgl list
3463 */
3464
3465 /* maximum number of xris available for nvme buffers */
3466 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3467 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3468 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3469 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3470
3471 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3472 "6074 Current allocated NVME xri-sgl count:%d, "
3473 "maximum NVME xri count:%d\n",
3474 phba->sli4_hba.nvme_xri_cnt,
3475 phba->sli4_hba.nvme_xri_max);
3476
3477 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3478 spin_lock(&phba->nvme_buf_list_put_lock);
3479 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3480 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
3481 spin_unlock(&phba->nvme_buf_list_put_lock);
3482 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3483
3484 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3485 /* max nvme xri shrunk below the allocated nvme buffers */
3486 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3487 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3488 phba->sli4_hba.nvme_xri_max;
3489 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3490 /* release the extra allocated nvme buffers */
3491 for (i = 0; i < nvme_xri_cnt; i++) {
3492 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3493 struct lpfc_nvme_buf, list);
3494 if (lpfc_ncmd) {
3495 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
3496 lpfc_ncmd->data,
3497 lpfc_ncmd->dma_handle);
3498 kfree(lpfc_ncmd);
3499 }
3500 }
3501 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3502 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3503 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3504 }
3505
3506 /* update xris associated to remaining allocated nvme buffers */
3507 lpfc_ncmd = NULL;
3508 lpfc_ncmd_next = NULL;
3509 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3510 &nvme_sgl_list, list) {
3511 lxri = lpfc_sli4_next_xritag(phba);
3512 if (lxri == NO_XRI) {
3513 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3514 "6075 Failed to allocate xri for "
3515 "nvme buffer\n");
3516 rc = -ENOMEM;
3517 goto out_free_mem;
3518 }
3519 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3520 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3521 }
3522 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3523 spin_lock(&phba->nvme_buf_list_put_lock);
3524 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
3525 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3526 spin_unlock(&phba->nvme_buf_list_put_lock);
3527 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3528 return 0;
3529
3530out_free_mem:
3531 lpfc_nvme_free(phba);
3532 return rc;
3533}
3534
e59058c4 3535/**
3621a710 3536 * lpfc_create_port - Create an FC port
e59058c4
JS
3537 * @phba: pointer to lpfc hba data structure.
3538 * @instance: a unique integer ID to this FC port.
3539 * @dev: pointer to the device data structure.
3540 *
3541 * This routine creates a FC port for the upper layer protocol. The FC port
3542 * can be created on top of either a physical port or a virtual port provided
3543 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3544 * and associates the FC port created before adding the shost into the SCSI
3545 * layer.
3546 *
3547 * Return codes
3548 * @vport - pointer to the virtual N_Port data structure.
3549 * NULL - port create failed.
3550 **/
2e0fef85 3551struct lpfc_vport *
3de2a653 3552lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3553{
2e0fef85 3554 struct lpfc_vport *vport;
895427bd 3555 struct Scsi_Host *shost = NULL;
2e0fef85 3556 int error = 0;
47a8617c 3557
895427bd
JS
3558 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3559 if (dev != &phba->pcidev->dev) {
3560 shost = scsi_host_alloc(&lpfc_vport_template,
3561 sizeof(struct lpfc_vport));
3562 } else {
3563 if (phba->sli_rev == LPFC_SLI_REV4)
3564 shost = scsi_host_alloc(&lpfc_template,
3565 sizeof(struct lpfc_vport));
3566 else
3567 shost = scsi_host_alloc(&lpfc_template_s3,
3568 sizeof(struct lpfc_vport));
3569 }
3570 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3571 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS
3572 sizeof(struct lpfc_vport));
3573 }
2e0fef85
JS
3574 if (!shost)
3575 goto out;
47a8617c 3576
2e0fef85
JS
3577 vport = (struct lpfc_vport *) shost->hostdata;
3578 vport->phba = phba;
2e0fef85 3579 vport->load_flag |= FC_LOADING;
92d7f7b0 3580 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3581 vport->fc_rscn_flush = 0;
3de2a653 3582 lpfc_get_vport_cfgparam(vport);
895427bd 3583
2e0fef85
JS
3584 shost->unique_id = instance;
3585 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3586 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS
3587 shost->this_id = -1;
3588 shost->max_cmd_len = 16;
8b0dff14 3589 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3590 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3591 shost->dma_boundary =
cb5172ea 3592 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS
3593 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3594 }
81301a9b 3595
47a8617c 3596 /*
2e0fef85
JS
3597 * Set initial can_queue value since 0 is no longer supported and
3598 * scsi_add_host will fail. This will be adjusted later based on the
3599 * max xri value determined in hba setup.
47a8617c 3600 */
2e0fef85 3601 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3602 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS
3603 shost->transportt = lpfc_vport_transport_template;
3604 vport->port_type = LPFC_NPIV_PORT;
3605 } else {
3606 shost->transportt = lpfc_transport_template;
3607 vport->port_type = LPFC_PHYSICAL_PORT;
3608 }
47a8617c 3609
2e0fef85
JS
3610 /* Initialize all internally managed lists. */
3611 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3612 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3613 spin_lock_init(&vport->work_port_lock);
47a8617c 3614
2e0fef85
JS
3615 init_timer(&vport->fc_disctmo);
3616 vport->fc_disctmo.function = lpfc_disc_timeout;
92d7f7b0 3617 vport->fc_disctmo.data = (unsigned long)vport;
47a8617c 3618
2e0fef85
JS
3619 init_timer(&vport->els_tmofunc);
3620 vport->els_tmofunc.function = lpfc_els_timeout;
92d7f7b0 3621 vport->els_tmofunc.data = (unsigned long)vport;
92494144
JS
3622
3623 init_timer(&vport->delayed_disc_tmo);
3624 vport->delayed_disc_tmo.function = lpfc_delayed_disc_tmo;
3625 vport->delayed_disc_tmo.data = (unsigned long)vport;
3626
d139b9bd 3627 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS
3628 if (error)
3629 goto out_put_shost;
47a8617c 3630
549e55cd 3631 spin_lock_irq(&phba->hbalock);
2e0fef85 3632 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3633 spin_unlock_irq(&phba->hbalock);
2e0fef85 3634 return vport;
47a8617c 3635
2e0fef85
JS
3636out_put_shost:
3637 scsi_host_put(shost);
3638out:
3639 return NULL;
47a8617c
JS
3640}
3641
e59058c4 3642/**
3621a710 3643 * destroy_port - destroy an FC port
e59058c4
JS
3644 * @vport: pointer to an lpfc virtual N_Port data structure.
3645 *
3646 * This routine destroys a FC port from the upper layer protocol. All the
3647 * resources associated with the port are released.
3648 **/
2e0fef85
JS
3649void
3650destroy_port(struct lpfc_vport *vport)
47a8617c 3651{
92d7f7b0
JS
3652 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3653 struct lpfc_hba *phba = vport->phba;
47a8617c 3654
858c9f6c 3655 lpfc_debugfs_terminate(vport);
92d7f7b0
JS
3656 fc_remove_host(shost);
3657 scsi_remove_host(shost);
47a8617c 3658
92d7f7b0
JS
3659 spin_lock_irq(&phba->hbalock);
3660 list_del_init(&vport->listentry);
3661 spin_unlock_irq(&phba->hbalock);
47a8617c 3662
92d7f7b0 3663 lpfc_cleanup(vport);
47a8617c 3664 return;
47a8617c
JS
3665}
3666
e59058c4 3667/**
3621a710 3668 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS
3669 *
3670 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
3671 * uses the kernel idr facility to perform the task.
3672 *
3673 * Return codes:
3674 * instance - a unique integer ID allocated as the new instance.
3675 * -1 - lpfc get instance failed.
3676 **/
92d7f7b0
JS
3677int
3678lpfc_get_instance(void)
3679{
ab516036
TH
3680 int ret;
3681
3682 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
3683 return ret < 0 ? -1 : ret;
47a8617c
JS
3684}
3685
e59058c4 3686/**
3621a710 3687 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS
3688 * @shost: pointer to SCSI host data structure.
3689 * @time: elapsed time of the scan in jiffies.
3690 *
3691 * This routine is called by the SCSI layer with a SCSI host to determine
3692 * whether the scan host is finished.
3693 *
3694 * Note: there is no scan_start function as adapter initialization will have
3695 * asynchronously kicked off the link initialization.
3696 *
3697 * Return codes
3698 * 0 - SCSI host scan is not over yet.
3699 * 1 - SCSI host scan is over.
3700 **/
47a8617c
JS
3701int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
3702{
2e0fef85
JS
3703 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3704 struct lpfc_hba *phba = vport->phba;
858c9f6c 3705 int stat = 0;
47a8617c 3706
858c9f6c
JS
3707 spin_lock_irq(shost->host_lock);
3708
51ef4c26 3709 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS
3710 stat = 1;
3711 goto finished;
3712 }
256ec0d0 3713 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 3714 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
3715 "0461 Scanning longer than 30 "
3716 "seconds. Continuing initialization\n");
858c9f6c 3717 stat = 1;
47a8617c 3718 goto finished;
2e0fef85 3719 }
256ec0d0
JS
3720 if (time >= msecs_to_jiffies(15 * 1000) &&
3721 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 3722 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
3723 "0465 Link down longer than 15 "
3724 "seconds. Continuing initialization\n");
858c9f6c 3725 stat = 1;
47a8617c 3726 goto finished;
2e0fef85 3727 }
47a8617c 3728
2e0fef85 3729 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 3730 goto finished;
2e0fef85 3731 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 3732 goto finished;
256ec0d0 3733 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 3734 goto finished;
2e0fef85 3735 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS
3736 goto finished;
3737
3738 stat = 1;
47a8617c
JS
3739
3740finished:
858c9f6c
JS
3741 spin_unlock_irq(shost->host_lock);
3742 return stat;
92d7f7b0 3743}
47a8617c 3744
e59058c4 3745/**
3621a710 3746 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS
3747 * @shost: pointer to SCSI host data structure.
3748 *
3749 * This routine initializes a given SCSI host attributes on a FC port. The
3750 * SCSI host can be either on top of a physical port or a virtual port.
3751 **/
92d7f7b0
JS
3752void lpfc_host_attrib_init(struct Scsi_Host *shost)
3753{
3754 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3755 struct lpfc_hba *phba = vport->phba;
47a8617c 3756 /*
2e0fef85 3757 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS
3758 */
3759
2e0fef85
JS
3760 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
3761 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS
3762 fc_host_supported_classes(shost) = FC_COS_CLASS3;
3763
3764 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 3765 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS
3766 fc_host_supported_fc4s(shost)[2] = 1;
3767 fc_host_supported_fc4s(shost)[7] = 1;
3768
92d7f7b0
JS
3769 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
3770 sizeof fc_host_symbolic_name(shost));
47a8617c
JS
3771
3772 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS
3773 if (phba->lmt & LMT_32Gb)
3774 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS
3775 if (phba->lmt & LMT_16Gb)
3776 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS
3777 if (phba->lmt & LMT_10Gb)
3778 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS
3779 if (phba->lmt & LMT_8Gb)
3780 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS
3781 if (phba->lmt & LMT_4Gb)
3782 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
3783 if (phba->lmt & LMT_2Gb)
3784 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
3785 if (phba->lmt & LMT_1Gb)
3786 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
3787
3788 fc_host_maxframe_size(shost) =
2e0fef85
JS
3789 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
3790 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 3791
0af5d708
MC
3792 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
3793
47a8617c
JS
3794 /* This value is also unchanging */
3795 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 3796 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS
3797 fc_host_active_fc4s(shost)[2] = 1;
3798 fc_host_active_fc4s(shost)[7] = 1;
3799
92d7f7b0 3800 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 3801 spin_lock_irq(shost->host_lock);
51ef4c26 3802 vport->load_flag &= ~FC_LOADING;
47a8617c 3803 spin_unlock_irq(shost->host_lock);
47a8617c 3804}
dea3101e 3805
e59058c4 3806/**
da0436e9 3807 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS
3808 * @phba: pointer to lpfc hba data structure.
3809 *
da0436e9
JS
3810 * This routine is invoked to stop an SLI3 device port, it stops the device
3811 * from generating interrupts and stops the device driver's timers for the
3812 * device.
e59058c4 3813 **/
da0436e9
JS
3814static void
3815lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 3816{
da0436e9
JS
3817 /* Clear all interrupt enable conditions */
3818 writel(0, phba->HCregaddr);
3819 readl(phba->HCregaddr); /* flush */
3820 /* Clear all pending interrupts */
3821 writel(0xffffffff, phba->HAregaddr);
3822 readl(phba->HAregaddr); /* flush */
db2378e0 3823
da0436e9
JS
3824 /* Reset some HBA SLI setup states */
3825 lpfc_stop_hba_timers(phba);
3826 phba->pport->work_port_events = 0;
3827}
db2378e0 3828
da0436e9
JS
3829/**
3830 * lpfc_stop_port_s4 - Stop SLI4 device port
3831 * @phba: pointer to lpfc hba data structure.
3832 *
3833 * This routine is invoked to stop an SLI4 device port, it stops the device
3834 * from generating interrupts and stops the device driver's timers for the
3835 * device.
3836 **/
3837static void
3838lpfc_stop_port_s4(struct lpfc_hba *phba)
3839{
3840 /* Reset some HBA SLI4 setup states */
3841 lpfc_stop_hba_timers(phba);
3842 phba->pport->work_port_events = 0;
3843 phba->sli4_hba.intr_enable = 0;
da0436e9 3844}
9399627f 3845
da0436e9
JS
3846/**
3847 * lpfc_stop_port - Wrapper function for stopping hba port
3848 * @phba: Pointer to HBA context object.
3849 *
3850 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
3851 * the API jump table function pointer from the lpfc_hba struct.
3852 **/
3853void
3854lpfc_stop_port(struct lpfc_hba *phba)
3855{
3856 phba->lpfc_stop_port(phba);
3857}
db2378e0 3858
ecfd03c6
JS
3859/**
3860 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
3861 * @phba: Pointer to hba for which this call is being executed.
3862 *
3863 * This routine starts the timer waiting for the FCF rediscovery to complete.
3864 **/
3865void
3866lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
3867{
3868 unsigned long fcf_redisc_wait_tmo =
3869 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
3870 /* Start fcf rediscovery wait period timer */
3871 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
3872 spin_lock_irq(&phba->hbalock);
3873 /* Allow action to new fcf asynchronous event */
3874 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
3875 /* Mark the FCF rediscovery pending state */
3876 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
3877 spin_unlock_irq(&phba->hbalock);
3878}
3879
3880/**
3881 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
3882 * @ptr: Map to lpfc_hba data structure pointer.
3883 *
3884 * This routine is invoked when waiting for FCF table rediscover has been
3885 * timed out. If new FCF record(s) has (have) been discovered during the
3886 * wait period, a new FCF event shall be added to the FCOE async event
3887 * list, and then worker thread shall be waked up for processing from the
3888 * worker thread context.
3889 **/
e399b228 3890static void
ecfd03c6
JS
3891lpfc_sli4_fcf_redisc_wait_tmo(unsigned long ptr)
3892{
3893 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
3894
3895 /* Don't send FCF rediscovery event if timer cancelled */
3896 spin_lock_irq(&phba->hbalock);
3897 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
3898 spin_unlock_irq(&phba->hbalock);
3899 return;
3900 }
3901 /* Clear FCF rediscovery timer pending flag */
3902 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
3903 /* FCF rediscovery event to worker thread */
3904 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
3905 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 3906 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 3907 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS
3908 /* wake up worker thread */
3909 lpfc_worker_wake_up(phba);
3910}
3911
e59058c4 3912/**
da0436e9 3913 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 3914 * @phba: pointer to lpfc hba data structure.
da0436e9 3915 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 3916 *
da0436e9
JS
3917 * This routine is to parse the SLI4 link-attention link fault code and
3918 * translate it into the base driver's read link attention mailbox command
3919 * status.
3920 *
3921 * Return: Link-attention status in terms of base driver's coding.
e59058c4 3922 **/
da0436e9
JS
3923static uint16_t
3924lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
3925 struct lpfc_acqe_link *acqe_link)
db2378e0 3926{
da0436e9 3927 uint16_t latt_fault;
9399627f 3928
da0436e9
JS
3929 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
3930 case LPFC_ASYNC_LINK_FAULT_NONE:
3931 case LPFC_ASYNC_LINK_FAULT_LOCAL:
3932 case LPFC_ASYNC_LINK_FAULT_REMOTE:
3933 latt_fault = 0;
3934 break;
3935 default:
3936 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3937 "0398 Invalid link fault code: x%x\n",
3938 bf_get(lpfc_acqe_link_fault, acqe_link));
3939 latt_fault = MBXERR_ERROR;
3940 break;
3941 }
3942 return latt_fault;
db2378e0
JS
3943}
3944
5b75da2f 3945/**
da0436e9 3946 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 3947 * @phba: pointer to lpfc hba data structure.
da0436e9 3948 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 3949 *
da0436e9
JS
3950 * This routine is to parse the SLI4 link attention type and translate it
3951 * into the base driver's link attention type coding.
5b75da2f 3952 *
da0436e9
JS
3953 * Return: Link attention type in terms of base driver's coding.
3954 **/
3955static uint8_t
3956lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
3957 struct lpfc_acqe_link *acqe_link)
5b75da2f 3958{
da0436e9 3959 uint8_t att_type;
5b75da2f 3960
da0436e9
JS
3961 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
3962 case LPFC_ASYNC_LINK_STATUS_DOWN:
3963 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 3964 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS
3965 break;
3966 case LPFC_ASYNC_LINK_STATUS_UP:
3967 /* Ignore physical link up events - wait for logical link up */
76a95d75 3968 att_type = LPFC_ATT_RESERVED;
da0436e9
JS
3969 break;
3970 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 3971 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS
3972 break;
3973 default:
3974 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3975 "0399 Invalid link attention type: x%x\n",
3976 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 3977 att_type = LPFC_ATT_RESERVED;
da0436e9 3978 break;
5b75da2f 3979 }
da0436e9 3980 return att_type;
5b75da2f
JS
3981}
3982
8b68cd52
JS
3983/**
3984 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
3985 * @phba: pointer to lpfc hba data structure.
3986 *
3987 * This routine is to get an SLI3 FC port's link speed in Mbps.
3988 *
3989 * Return: link speed in terms of Mbps.
3990 **/
3991uint32_t
3992lpfc_sli_port_speed_get(struct lpfc_hba *phba)
3993{
3994 uint32_t link_speed;
3995
3996 if (!lpfc_is_link_up(phba))
3997 return 0;
3998
a085e87c
JS
3999 if (phba->sli_rev <= LPFC_SLI_REV3) {
4000 switch (phba->fc_linkspeed) {
4001 case LPFC_LINK_SPEED_1GHZ:
4002 link_speed = 1000;
4003 break;
4004 case LPFC_LINK_SPEED_2GHZ:
4005 link_speed = 2000;
4006 break;
4007 case LPFC_LINK_SPEED_4GHZ:
4008 link_speed = 4000;
4009 break;
4010 case LPFC_LINK_SPEED_8GHZ:
4011 link_speed = 8000;
4012 break;
4013 case LPFC_LINK_SPEED_10GHZ:
4014 link_speed = 10000;
4015 break;
4016 case LPFC_LINK_SPEED_16GHZ:
4017 link_speed = 16000;
4018 break;
4019 default:
4020 link_speed = 0;
4021 }
4022 } else {
4023 if (phba->sli4_hba.link_state.logical_speed)
4024 link_speed =
4025 phba->sli4_hba.link_state.logical_speed;
4026 else
4027 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS
4028 }
4029 return link_speed;
4030}
4031
4032/**
4033 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4034 * @phba: pointer to lpfc hba data structure.
4035 * @evt_code: asynchronous event code.
4036 * @speed_code: asynchronous event link speed code.
4037 *
4038 * This routine is to parse the giving SLI4 async event link speed code into
4039 * value of Mbps for the link speed.
4040 *
4041 * Return: link speed in terms of Mbps.
4042 **/
4043static uint32_t
4044lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4045 uint8_t speed_code)
4046{
4047 uint32_t port_speed;
4048
4049 switch (evt_code) {
4050 case LPFC_TRAILER_CODE_LINK:
4051 switch (speed_code) {
26d830ec 4052 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS
4053 port_speed = 0;
4054 break;
26d830ec 4055 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS
4056 port_speed = 10;
4057 break;
26d830ec 4058 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS
4059 port_speed = 100;
4060 break;
26d830ec 4061 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS
4062 port_speed = 1000;
4063 break;
26d830ec 4064 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS
4065 port_speed = 10000;
4066 break;
26d830ec
JS
4067 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4068 port_speed = 20000;
4069 break;
4070 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4071 port_speed = 25000;
4072 break;
4073 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4074 port_speed = 40000;
4075 break;
8b68cd52
JS
4076 default:
4077 port_speed = 0;
4078 }
4079 break;
4080 case LPFC_TRAILER_CODE_FC:
4081 switch (speed_code) {
26d830ec 4082 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS
4083 port_speed = 0;
4084 break;
26d830ec 4085 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS
4086 port_speed = 1000;
4087 break;
26d830ec 4088 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS
4089 port_speed = 2000;
4090 break;
26d830ec 4091 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS
4092 port_speed = 4000;
4093 break;
26d830ec 4094 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS
4095 port_speed = 8000;
4096 break;
26d830ec 4097 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS
4098 port_speed = 10000;
4099 break;
26d830ec 4100 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS
4101 port_speed = 16000;
4102 break;
d38dd52c
JS
4103 case LPFC_FC_LA_SPEED_32G:
4104 port_speed = 32000;
4105 break;
8b68cd52
JS
4106 default:
4107 port_speed = 0;
4108 }
4109 break;
4110 default:
4111 port_speed = 0;
4112 }
4113 return port_speed;
4114}
4115
da0436e9 4116/**
70f3c073 4117 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS
4118 * @phba: pointer to lpfc hba data structure.
4119 * @acqe_link: pointer to the async link completion queue entry.
4120 *
70f3c073 4121 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS
4122 **/
4123static void
4124lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4125 struct lpfc_acqe_link *acqe_link)
4126{
4127 struct lpfc_dmabuf *mp;
4128 LPFC_MBOXQ_t *pmb;
4129 MAILBOX_t *mb;
76a95d75 4130 struct lpfc_mbx_read_top *la;
da0436e9 4131 uint8_t att_type;
76a95d75 4132 int rc;
da0436e9
JS
4133
4134 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4135 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4136 return;
32b9793f 4137 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS
4138 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4139 if (!pmb) {
4140 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4141 "0395 The mboxq allocation failed\n");
4142 return;
4143 }
4144 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4145 if (!mp) {
4146 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4147 "0396 The lpfc_dmabuf allocation failed\n");
4148 goto out_free_pmb;
4149 }
4150 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4151 if (!mp->virt) {
4152 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4153 "0397 The mbuf allocation failed\n");
4154 goto out_free_dmabuf;
4155 }
4156
4157 /* Cleanup any outstanding ELS commands */
4158 lpfc_els_flush_all_cmd(phba);
4159
4160 /* Block ELS IOCBs until we have done process link event */
895427bd 4161 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS
4162
4163 /* Update link event statistics */
4164 phba->sli.slistat.link_event++;
4165
76a95d75
JS
4166 /* Create lpfc_handle_latt mailbox command from link ACQE */
4167 lpfc_read_topology(phba, pmb, mp);
4168 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS
4169 pmb->vport = phba->pport;
4170
da0436e9
JS
4171 /* Keep the link status for extra SLI4 state machine reference */
4172 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4173 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4174 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS
4175 phba->sli4_hba.link_state.duplex =
4176 bf_get(lpfc_acqe_link_duplex, acqe_link);
4177 phba->sli4_hba.link_state.status =
4178 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS
4179 phba->sli4_hba.link_state.type =
4180 bf_get(lpfc_acqe_link_type, acqe_link);
4181 phba->sli4_hba.link_state.number =
4182 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS
4183 phba->sli4_hba.link_state.fault =
4184 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4185 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS
4186 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4187
70f3c073 4188 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS
4189 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4190 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4191 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS
4192 phba->sli4_hba.link_state.speed,
4193 phba->sli4_hba.link_state.topology,
4194 phba->sli4_hba.link_state.status,
4195 phba->sli4_hba.link_state.type,
4196 phba->sli4_hba.link_state.number,
8b68cd52 4197 phba->sli4_hba.link_state.logical_speed,
70f3c073 4198 phba->sli4_hba.link_state.fault);
76a95d75
JS
4199 /*
4200 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4201 * topology info. Note: Optional for non FC-AL ports.
4202 */
4203 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4204 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4205 if (rc == MBX_NOT_FINISHED)
4206 goto out_free_dmabuf;
4207 return;
4208 }
4209 /*
4210 * For FCoE Mode: fill in all the topology information we need and call
4211 * the READ_TOPOLOGY completion routine to continue without actually
4212 * sending the READ_TOPOLOGY mailbox command to the port.
4213 */
4214 /* Parse and translate status field */
4215 mb = &pmb->u.mb;
4216 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4217
4218 /* Parse and translate link attention fields */
4219 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4220 la->eventTag = acqe_link->event_tag;
4221 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4222 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4223 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS
4224
4225 /* Fake the the following irrelvant fields */
4226 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4227 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4228 bf_set(lpfc_mbx_read_top_il, la, 0);
4229 bf_set(lpfc_mbx_read_top_pb, la, 0);
4230 bf_set(lpfc_mbx_read_top_fa, la, 0);
4231 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS
4232
4233 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4234 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4235
5b75da2f 4236 return;
da0436e9
JS
4237
4238out_free_dmabuf:
4239 kfree(mp);
4240out_free_pmb:
4241 mempool_free(pmb, phba->mbox_mem_pool);
4242}
4243
70f3c073
JS
4244/**
4245 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4246 * @phba: pointer to lpfc hba data structure.
4247 * @acqe_fc: pointer to the async fc completion queue entry.
4248 *
4249 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4250 * that the event was received and then issue a read_topology mailbox command so
4251 * that the rest of the driver will treat it the same as SLI3.
4252 **/
4253static void
4254lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4255{
4256 struct lpfc_dmabuf *mp;
4257 LPFC_MBOXQ_t *pmb;
7bdedb34
JS
4258 MAILBOX_t *mb;
4259 struct lpfc_mbx_read_top *la;
70f3c073
JS
4260 int rc;
4261
4262 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4263 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4264 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4265 "2895 Non FC link Event detected.(%d)\n",
4266 bf_get(lpfc_trailer_type, acqe_fc));
4267 return;
4268 }
4269 /* Keep the link status for extra SLI4 state machine reference */
4270 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4271 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4272 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS
4273 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4274 phba->sli4_hba.link_state.topology =
4275 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4276 phba->sli4_hba.link_state.status =
4277 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4278 phba->sli4_hba.link_state.type =
4279 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4280 phba->sli4_hba.link_state.number =
4281 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4282 phba->sli4_hba.link_state.fault =
4283 bf_get(lpfc_acqe_link_fault, acqe_fc);
4284 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4285 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS
4286 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4287 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4288 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4289 "%dMbps Fault:%d\n",
4290 phba->sli4_hba.link_state.speed,
4291 phba->sli4_hba.link_state.topology,
4292 phba->sli4_hba.link_state.status,
4293 phba->sli4_hba.link_state.type,
4294 phba->sli4_hba.link_state.number,
8b68cd52 4295 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS
4296 phba->sli4_hba.link_state.fault);
4297 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4298 if (!pmb) {
4299 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4300 "2897 The mboxq allocation failed\n");
4301 return;
4302 }
4303 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4304 if (!mp) {
4305 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4306 "2898 The lpfc_dmabuf allocation failed\n");
4307 goto out_free_pmb;
4308 }
4309 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4310 if (!mp->virt) {
4311 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4312 "2899 The mbuf allocation failed\n");
4313 goto out_free_dmabuf;
4314 }
4315
4316 /* Cleanup any outstanding ELS commands */
4317 lpfc_els_flush_all_cmd(phba);
4318
4319 /* Block ELS IOCBs until we have done process link event */
895427bd 4320 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS
4321
4322 /* Update link event statistics */
4323 phba->sli.slistat.link_event++;
4324
4325 /* Create lpfc_handle_latt mailbox command from link ACQE */
4326 lpfc_read_topology(phba, pmb, mp);
4327 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4328 pmb->vport = phba->pport;
4329
7bdedb34
JS
4330 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
4331 /* Parse and translate status field */
4332 mb = &pmb->u.mb;
4333 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4334 (void *)acqe_fc);
4335
4336 /* Parse and translate link attention fields */
4337 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4338 la->eventTag = acqe_fc->event_tag;
4339 bf_set(lpfc_mbx_read_top_att_type, la,
4340 LPFC_FC_LA_TYPE_LINK_DOWN);
4341
4342 /* Invoke the mailbox command callback function */
4343 lpfc_mbx_cmpl_read_topology(phba, pmb);
4344
4345 return;
4346 }
4347
70f3c073
JS
4348 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4349 if (rc == MBX_NOT_FINISHED)
4350 goto out_free_dmabuf;
4351 return;
4352
4353out_free_dmabuf:
4354 kfree(mp);
4355out_free_pmb:
4356 mempool_free(pmb, phba->mbox_mem_pool);
4357}
4358
4359/**
4360 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4361 * @phba: pointer to lpfc hba data structure.
4362 * @acqe_fc: pointer to the async SLI completion queue entry.
4363 *
4364 * This routine is to handle the SLI4 asynchronous SLI events.
4365 **/
4366static void
4367lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4368{
4b8bae08 4369 char port_name;
8c1312e1 4370 char message[128];
4b8bae08 4371 uint8_t status;
946727dc 4372 uint8_t evt_type;
448193b5 4373 uint8_t operational = 0;
946727dc 4374 struct temp_event temp_event_data;
4b8bae08 4375 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS
4376 struct Scsi_Host *shost;
4377
4378 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4379
448193b5
JS
4380 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4381 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4382 "x%08x SLI Event Type:%d\n",
4383 acqe_sli->event_data1, acqe_sli->event_data2,
4384 evt_type);
4b8bae08
JS
4385
4386 port_name = phba->Port[0];
4387 if (port_name == 0x00)
4388 port_name = '?'; /* get port name is empty */
4389
946727dc
JS
4390 switch (evt_type) {
4391 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4392 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4393 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4394 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4395
4396 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4397 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4398 acqe_sli->event_data1, port_name);
4399
310429ef 4400 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
4401 shost = lpfc_shost_from_vport(phba->pport);
4402 fc_host_post_vendor_event(shost, fc_get_event_number(),
4403 sizeof(temp_event_data),
4404 (char *)&temp_event_data,
4405 SCSI_NL_VID_TYPE_PCI
4406 | PCI_VENDOR_ID_EMULEX);
4407 break;
4408 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4409 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4410 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4411 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4412
4413 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4414 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4415 acqe_sli->event_data1, port_name);
4416
4417 shost = lpfc_shost_from_vport(phba->pport);
4418 fc_host_post_vendor_event(shost, fc_get_event_number(),
4419 sizeof(temp_event_data),
4420 (char *)&temp_event_data,
4421 SCSI_NL_VID_TYPE_PCI
4422 | PCI_VENDOR_ID_EMULEX);
4423 break;
4424 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4425 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS
4426 &acqe_sli->event_data1;
4427
946727dc
JS
4428 /* fetch the status for this port */
4429 switch (phba->sli4_hba.lnk_info.lnk_no) {
4430 case LPFC_LINK_NUMBER_0:
448193b5
JS
4431 status = bf_get(lpfc_sli_misconfigured_port0_state,
4432 &misconfigured->theEvent);
4433 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4434 &misconfigured->theEvent);
946727dc
JS
4435 break;
4436 case LPFC_LINK_NUMBER_1:
448193b5
JS
4437 status = bf_get(lpfc_sli_misconfigured_port1_state,
4438 &misconfigured->theEvent);
4439 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4440 &misconfigured->theEvent);
946727dc
JS
4441 break;
4442 case LPFC_LINK_NUMBER_2:
448193b5
JS
4443 status = bf_get(lpfc_sli_misconfigured_port2_state,
4444 &misconfigured->theEvent);
4445 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4446 &misconfigured->theEvent);
946727dc
JS
4447 break;
4448 case LPFC_LINK_NUMBER_3:
448193b5
JS
4449 status = bf_get(lpfc_sli_misconfigured_port3_state,
4450 &misconfigured->theEvent);
4451 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4452 &misconfigured->theEvent);
946727dc
JS
4453 break;
4454 default:
448193b5
JS
4455 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4456 "3296 "
4457 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4458 "event: Invalid link %d",
4459 phba->sli4_hba.lnk_info.lnk_no);
4460 return;
946727dc 4461 }
4b8bae08 4462
448193b5
JS
4463 /* Skip if optic state unchanged */
4464 if (phba->sli4_hba.lnk_info.optic_state == status)
4465 return;
4466
946727dc
JS
4467 switch (status) {
4468 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS
4469 sprintf(message, "Physical Link is functional");
4470 break;
946727dc
JS
4471 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4472 sprintf(message, "Optics faulted/incorrectly "
4473 "installed/not installed - Reseat optics, "
4474 "if issue not resolved, replace.");
4475 break;
4476 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4477 sprintf(message,
4478 "Optics of two types installed - Remove one "
4479 "optic or install matching pair of optics.");
4480 break;
4481 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4482 sprintf(message, "Incompatible optics - Replace with "
292098be 4483 "compatible optics for card to function.");
946727dc 4484 break;
448193b5
JS
4485 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4486 sprintf(message, "Unqualified optics - Replace with "
4487 "Avago optics for Warranty and Technical "
4488 "Support - Link is%s operational",
2ea259ee 4489 (operational) ? " not" : "");
448193b5
JS
4490 break;
4491 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4492 sprintf(message, "Uncertified optics - Replace with "
4493 "Avago-certified optics to enable link "
4494 "operation - Link is%s operational",
2ea259ee 4495 (operational) ? " not" : "");
448193b5 4496 break;
946727dc
JS
4497 default:
4498 /* firmware is reporting a status we don't know about */
4499 sprintf(message, "Unknown event status x%02x", status);
4500 break;
4501 }
448193b5 4502 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4503 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4504 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS
4505 break;
4506 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4507 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4508 "3192 Remote DPort Test Initiated - "
4509 "Event Data1:x%08x Event Data2: x%08x\n",
4510 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS
4511 break;
4512 default:
946727dc
JS
4513 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4514 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4515 "x%08x SLI Event Type:%d\n",
4516 acqe_sli->event_data1, acqe_sli->event_data2,
4517 evt_type);
4b8bae08
JS
4518 break;
4519 }
70f3c073
JS
4520}
4521
fc2b989b
JS
4522/**
4523 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4524 * @vport: pointer to vport data structure.
4525 *
4526 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4527 * response to a CVL event.
4528 *
4529 * Return the pointer to the ndlp with the vport if successful, otherwise
4530 * return NULL.
4531 **/
4532static struct lpfc_nodelist *
4533lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4534{
4535 struct lpfc_nodelist *ndlp;
4536 struct Scsi_Host *shost;
4537 struct lpfc_hba *phba;
4538
4539 if (!vport)
4540 return NULL;
fc2b989b
JS
4541 phba = vport->phba;
4542 if (!phba)
4543 return NULL;
78730cfe
JS
4544 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4545 if (!ndlp) {
4546 /* Cannot find existing Fabric ndlp, so allocate a new one */
4547 ndlp = mempool_alloc(phba->nlp_mem_pool, GFP_KERNEL);
4548 if (!ndlp)
4549 return 0;
4550 lpfc_nlp_init(vport, ndlp, Fabric_DID);
4551 /* Set the node type */
4552 ndlp->nlp_type |= NLP_FABRIC;
4553 /* Put ndlp onto node list */
4554 lpfc_enqueue_node(vport, ndlp);
4555 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4556 /* re-setup ndlp without removing from node list */
4557 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4558 if (!ndlp)
4559 return 0;
4560 }
63e801ce
JS
4561 if ((phba->pport->port_state < LPFC_FLOGI) &&
4562 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4563 return NULL;
4564 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS
4565 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4566 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4567 return NULL;
4568 shost = lpfc_shost_from_vport(vport);
4569 if (!shost)
4570 return NULL;
4571 lpfc_linkdown_port(vport);
4572 lpfc_cleanup_pending_mbox(vport);
4573 spin_lock_irq(shost->host_lock);
4574 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4575 spin_unlock_irq(shost->host_lock);
4576
4577 return ndlp;
4578}
4579
4580/**
4581 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4582 * @vport: pointer to lpfc hba data structure.
4583 *
4584 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4585 * response to a FCF dead event.
4586 **/
4587static void
4588lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4589{
4590 struct lpfc_vport **vports;
4591 int i;
4592
4593 vports = lpfc_create_vport_work_array(phba);
4594 if (vports)
4595 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4596 lpfc_sli4_perform_vport_cvl(vports[i]);
4597 lpfc_destroy_vport_work_array(phba, vports);
4598}
4599
da0436e9 4600/**
76a95d75 4601 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS
4602 * @phba: pointer to lpfc hba data structure.
4603 * @acqe_link: pointer to the async fcoe completion queue entry.
4604 *
4605 * This routine is to handle the SLI4 asynchronous fcoe event.
4606 **/
4607static void
76a95d75 4608lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4609 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4610{
70f3c073 4611 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4612 int rc;
6669f9bb
JS
4613 struct lpfc_vport *vport;
4614 struct lpfc_nodelist *ndlp;
4615 struct Scsi_Host *shost;
695a814e
JS
4616 int active_vlink_present;
4617 struct lpfc_vport **vports;
4618 int i;
da0436e9 4619
70f3c073
JS
4620 phba->fc_eventTag = acqe_fip->event_tag;
4621 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4622 switch (event_type) {
70f3c073
JS
4623 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4624 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4625 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS
4626 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4627 LOG_DISCOVERY,
a93ff37a
JS
4628 "2546 New FCF event, evt_tag:x%x, "
4629 "index:x%x\n",
70f3c073
JS
4630 acqe_fip->event_tag,
4631 acqe_fip->index);
999d813f
JS
4632 else
4633 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4634 LOG_DISCOVERY,
a93ff37a
JS
4635 "2788 FCF param modified event, "
4636 "evt_tag:x%x, index:x%x\n",
70f3c073
JS
4637 acqe_fip->event_tag,
4638 acqe_fip->index);
38b92ef8 4639 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS
4640 /*
4641 * During period of FCF discovery, read the FCF
4642 * table record indexed by the event to update
a93ff37a 4643 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS
4644 */
4645 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4646 LOG_DISCOVERY,
a93ff37a
JS
4647 "2779 Read FCF (x%x) for updating "
4648 "roundrobin FCF failover bmask\n",
70f3c073
JS
4649 acqe_fip->index);
4650 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 4651 }
38b92ef8
JS
4652
4653 /* If the FCF discovery is in progress, do nothing. */
3804dc84 4654 spin_lock_irq(&phba->hbalock);
a93ff37a 4655 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS
4656 spin_unlock_irq(&phba->hbalock);
4657 break;
4658 }
4659 /* If fast FCF failover rescan event is pending, do nothing */
4660 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
4661 spin_unlock_irq(&phba->hbalock);
4662 break;
4663 }
4664
c2b9712e
JS
4665 /* If the FCF has been in discovered state, do nothing. */
4666 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS
4667 spin_unlock_irq(&phba->hbalock);
4668 break;
4669 }
4670 spin_unlock_irq(&phba->hbalock);
38b92ef8 4671
0c9ab6f5
JS
4672 /* Otherwise, scan the entire FCF table and re-discover SAN */
4673 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS
4674 "2770 Start FCF table scan per async FCF "
4675 "event, evt_tag:x%x, index:x%x\n",
70f3c073 4676 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS
4677 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
4678 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 4679 if (rc)
0c9ab6f5
JS
4680 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
4681 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 4682 "command failed (x%x)\n", rc);
da0436e9
JS
4683 break;
4684
70f3c073 4685 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 4686 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 4687 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS
4688 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
4689 acqe_fip->event_tag);
da0436e9
JS
4690 break;
4691
70f3c073 4692 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 4693 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 4694 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 4695 "2549 FCF (x%x) disconnected from network, "
70f3c073 4696 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS
4697 /*
4698 * If we are in the middle of FCF failover process, clear
4699 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 4700 */
fc2b989b 4701 spin_lock_irq(&phba->hbalock);
a1cadfef
JS
4702 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
4703 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 4704 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4705 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 4706 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS
4707 break;
4708 }
38b92ef8
JS
4709 spin_unlock_irq(&phba->hbalock);
4710
4711 /* If the event is not for currently used fcf do nothing */
70f3c073 4712 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS
4713 break;
4714
4715 /*
4716 * Otherwise, request the port to rediscover the entire FCF
4717 * table for a fast recovery from case that the current FCF
4718 * is no longer valid as we are not in the middle of FCF
4719 * failover process already.
4720 */
c2b9712e
JS
4721 spin_lock_irq(&phba->hbalock);
4722 /* Mark the fast failover process in progress */
4723 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
4724 spin_unlock_irq(&phba->hbalock);
4725
4726 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
4727 "2771 Start FCF fast failover process due to "
4728 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
4729 "\n", acqe_fip->event_tag, acqe_fip->index);
4730 rc = lpfc_sli4_redisc_fcf_table(phba);
4731 if (rc) {
4732 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4733 LOG_DISCOVERY,
4734 "2772 Issue FCF rediscover mabilbox "
4735 "command failed, fail through to FCF "
4736 "dead event\n");
4737 spin_lock_irq(&phba->hbalock);
4738 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
4739 spin_unlock_irq(&phba->hbalock);
4740 /*
4741 * Last resort will fail over by treating this
4742 * as a link down to FCF registration.
4743 */
4744 lpfc_sli4_fcf_dead_failthrough(phba);
4745 } else {
4746 /* Reset FCF roundrobin bmask for new discovery */
4747 lpfc_sli4_clear_fcf_rr_bmask(phba);
4748 /*
4749 * Handling fast FCF failover to a DEAD FCF event is
4750 * considered equalivant to receiving CVL to all vports.
4751 */
4752 lpfc_sli4_perform_all_vport_cvl(phba);
4753 }
da0436e9 4754 break;
70f3c073 4755 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 4756 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 4757 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 4758 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 4759 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 4760
6669f9bb 4761 vport = lpfc_find_vport_by_vpid(phba,
5248a749 4762 acqe_fip->index);
fc2b989b 4763 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS
4764 if (!ndlp)
4765 break;
695a814e
JS
4766 active_vlink_present = 0;
4767
4768 vports = lpfc_create_vport_work_array(phba);
4769 if (vports) {
4770 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
4771 i++) {
4772 if ((!(vports[i]->fc_flag &
4773 FC_VPORT_CVL_RCVD)) &&
4774 (vports[i]->port_state > LPFC_FDISC)) {
4775 active_vlink_present = 1;
4776 break;
4777 }
4778 }
4779 lpfc_destroy_vport_work_array(phba, vports);
4780 }
4781
cc82355a
JS
4782 /*
4783 * Don't re-instantiate if vport is marked for deletion.
4784 * If we are here first then vport_delete is going to wait
4785 * for discovery to complete.
4786 */
4787 if (!(vport->load_flag & FC_UNLOADING) &&
4788 active_vlink_present) {
695a814e
JS
4789 /*
4790 * If there are other active VLinks present,
4791 * re-instantiate the Vlink using FDISC.
4792 */
256ec0d0
JS
4793 mod_timer(&ndlp->nlp_delayfunc,
4794 jiffies + msecs_to_jiffies(1000));
fc2b989b 4795 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS
4796 spin_lock_irq(shost->host_lock);
4797 ndlp->nlp_flag |= NLP_DELAY_TMO;
4798 spin_unlock_irq(shost->host_lock);
695a814e
JS
4799 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
4800 vport->port_state = LPFC_FDISC;
4801 } else {
ecfd03c6
JS
4802 /*
4803 * Otherwise, we request port to rediscover
4804 * the entire FCF table for a fast recovery
4805 * from possible case that the current FCF
0c9ab6f5
JS
4806 * is no longer valid if we are not already
4807 * in the FCF failover process.
ecfd03c6 4808 */
fc2b989b 4809 spin_lock_irq(&phba->hbalock);
0c9ab6f5 4810 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS
4811 spin_unlock_irq(&phba->hbalock);
4812 break;
4813 }
4814 /* Mark the fast failover process in progress */
0c9ab6f5 4815 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 4816 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS
4817 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4818 LOG_DISCOVERY,
a93ff37a 4819 "2773 Start FCF failover per CVL, "
70f3c073 4820 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 4821 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 4822 if (rc) {
0c9ab6f5
JS
4823 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4824 LOG_DISCOVERY,
4825 "2774 Issue FCF rediscover "
4826 "mabilbox command failed, "
4827 "through to CVL event\n");
fc2b989b 4828 spin_lock_irq(&phba->hbalock);
0c9ab6f5 4829 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 4830 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS
4831 /*
4832 * Last resort will be re-try on the
4833 * the current registered FCF entry.
4834 */
4835 lpfc_retry_pport_discovery(phba);
38b92ef8
JS
4836 } else
4837 /*
4838 * Reset FCF roundrobin bmask for new
4839 * discovery.
4840 */
7d791df7 4841 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS
4842 }
4843 break;
da0436e9
JS
4844 default:
4845 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4846 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 4847 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS
4848 break;
4849 }
4850}
4851
4852/**
4853 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
4854 * @phba: pointer to lpfc hba data structure.
4855 * @acqe_link: pointer to the async dcbx completion queue entry.
4856 *
4857 * This routine is to handle the SLI4 asynchronous dcbx event.
4858 **/
4859static void
4860lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
4861 struct lpfc_acqe_dcbx *acqe_dcbx)
4862{
4d9ab994 4863 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS
4864 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4865 "0290 The SLI4 DCBX asynchronous event is not "
4866 "handled yet\n");
4867}
4868
b19a061a
JS
4869/**
4870 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
4871 * @phba: pointer to lpfc hba data structure.
4872 * @acqe_link: pointer to the async grp5 completion queue entry.
4873 *
4874 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
4875 * is an asynchronous notified of a logical link speed change. The Port
4876 * reports the logical link speed in units of 10Mbps.
4877 **/
4878static void
4879lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
4880 struct lpfc_acqe_grp5 *acqe_grp5)
4881{
4882 uint16_t prev_ll_spd;
4883
4884 phba->fc_eventTag = acqe_grp5->event_tag;
4885 phba->fcoe_eventtag = acqe_grp5->event_tag;
4886 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
4887 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4888 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS
4889 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4890 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS
4891 "from %dMbps to %dMbps\n", prev_ll_spd,
4892 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS
4893}
4894
da0436e9
JS
4895/**
4896 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
4897 * @phba: pointer to lpfc hba data structure.
4898 *
4899 * This routine is invoked by the worker thread to process all the pending
4900 * SLI4 asynchronous events.
4901 **/
4902void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
4903{
4904 struct lpfc_cq_event *cq_event;
4905
4906 /* First, declare the async event has been handled */
4907 spin_lock_irq(&phba->hbalock);
4908 phba->hba_flag &= ~ASYNC_EVENT;
4909 spin_unlock_irq(&phba->hbalock);
4910 /* Now, handle all the async events */
4911 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
4912 /* Get the first event from the head of the event queue */
4913 spin_lock_irq(&phba->hbalock);
4914 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
4915 cq_event, struct lpfc_cq_event, list);
4916 spin_unlock_irq(&phba->hbalock);
4917 /* Process the asynchronous event */
4918 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
4919 case LPFC_TRAILER_CODE_LINK:
4920 lpfc_sli4_async_link_evt(phba,
4921 &cq_event->cqe.acqe_link);
4922 break;
4923 case LPFC_TRAILER_CODE_FCOE:
70f3c073 4924 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS
4925 break;
4926 case LPFC_TRAILER_CODE_DCBX:
4927 lpfc_sli4_async_dcbx_evt(phba,
4928 &cq_event->cqe.acqe_dcbx);
4929 break;
b19a061a
JS
4930 case LPFC_TRAILER_CODE_GRP5:
4931 lpfc_sli4_async_grp5_evt(phba,
4932 &cq_event->cqe.acqe_grp5);
4933 break;
70f3c073
JS
4934 case LPFC_TRAILER_CODE_FC:
4935 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
4936 break;
4937 case LPFC_TRAILER_CODE_SLI:
4938 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
4939 break;
da0436e9
JS
4940 default:
4941 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4942 "1804 Invalid asynchrous event code: "
4943 "x%x\n", bf_get(lpfc_trailer_code,
4944 &cq_event->cqe.mcqe_cmpl));
4945 break;
4946 }
4947 /* Free the completion event processed to the free pool */
4948 lpfc_sli4_cq_event_release(phba, cq_event);
4949 }
4950}
4951
ecfd03c6
JS
4952/**
4953 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
4954 * @phba: pointer to lpfc hba data structure.
4955 *
4956 * This routine is invoked by the worker thread to process FCF table
4957 * rediscovery pending completion event.
4958 **/
4959void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
4960{
4961 int rc;
4962
4963 spin_lock_irq(&phba->hbalock);
4964 /* Clear FCF rediscovery timeout event */
4965 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
4966 /* Clear driver fast failover FCF record flag */
4967 phba->fcf.failover_rec.flag = 0;
4968 /* Set state for FCF fast failover */
4969 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
4970 spin_unlock_irq(&phba->hbalock);
4971
4972 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 4973 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 4974 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 4975 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 4976 if (rc)
0c9ab6f5
JS
4977 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
4978 "2747 Issue FCF scan read FCF mailbox "
4979 "command failed 0x%x\n", rc);
ecfd03c6
JS
4980}
4981
da0436e9
JS
4982/**
4983 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
4984 * @phba: pointer to lpfc hba data structure.
4985 * @dev_grp: The HBA PCI-Device group number.
4986 *
4987 * This routine is invoked to set up the per HBA PCI-Device group function
4988 * API jump table entries.
4989 *
4990 * Return: 0 if success, otherwise -ENODEV
4991 **/
4992int
4993lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
4994{
4995 int rc;
4996
4997 /* Set up lpfc PCI-device group */
4998 phba->pci_dev_grp = dev_grp;
4999
5000 /* The LPFC_PCI_DEV_OC uses SLI4 */
5001 if (dev_grp == LPFC_PCI_DEV_OC)
5002 phba->sli_rev = LPFC_SLI_REV4;
5003
5004 /* Set up device INIT API function jump table */
5005 rc = lpfc_init_api_table_setup(phba, dev_grp);
5006 if (rc)
5007 return -ENODEV;
5008 /* Set up SCSI API function jump table */
5009 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5010 if (rc)
5011 return -ENODEV;
5012 /* Set up SLI API function jump table */
5013 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5014 if (rc)
5015 return -ENODEV;
5016 /* Set up MBOX API function jump table */
5017 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5018 if (rc)
5019 return -ENODEV;
5020
5021 return 0;
5b75da2f
JS
5022}
5023
5024/**
3621a710 5025 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS
5026 * @phba: pointer to lpfc hba data structure.
5027 * @intr_mode: active interrupt mode adopted.
5028 *
5029 * This routine it invoked to log the currently used active interrupt mode
5030 * to the device.
3772a991
JS
5031 **/
5032static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS
5033{
5034 switch (intr_mode) {
5035 case 0:
5036 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5037 "0470 Enable INTx interrupt mode.\n");
5038 break;
5039 case 1:
5040 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5041 "0481 Enabled MSI interrupt mode.\n");
5042 break;
5043 case 2:
5044 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5045 "0480 Enabled MSI-X interrupt mode.\n");
5046 break;
5047 default:
5048 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5049 "0482 Illegal interrupt mode.\n");
5050 break;
5051 }
5052 return;
5053}
5054
5b75da2f 5055/**
3772a991 5056 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS
5057 * @phba: pointer to lpfc hba data structure.
5058 *
3772a991
JS
5059 * This routine is invoked to enable the PCI device that is common to all
5060 * PCI devices.
5b75da2f
JS
5061 *
5062 * Return codes
af901ca1 5063 * 0 - successful
3772a991 5064 * other values - error
5b75da2f 5065 **/
3772a991
JS
5066static int
5067lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5068{
3772a991 5069 struct pci_dev *pdev;
5b75da2f 5070
3772a991
JS
5071 /* Obtain PCI device reference */
5072 if (!phba->pcidev)
5073 goto out_error;
5074 else
5075 pdev = phba->pcidev;
3772a991
JS
5076 /* Enable PCI device */
5077 if (pci_enable_device_mem(pdev))
5078 goto out_error;
5079 /* Request PCI resource for the device */
e0c0483c 5080 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS
5081 goto out_disable_device;
5082 /* Set up device as PCI master and save state for EEH */
5083 pci_set_master(pdev);
5084 pci_try_set_mwi(pdev);
5085 pci_save_state(pdev);
5b75da2f 5086
0558056c 5087 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5088 if (pci_is_pcie(pdev))
0558056c
JS
5089 pdev->needs_freset = 1;
5090
3772a991 5091 return 0;
5b75da2f 5092
3772a991
JS
5093out_disable_device:
5094 pci_disable_device(pdev);
5095out_error:
079b5c91 5096 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5097 "1401 Failed to enable pci device\n");
3772a991 5098 return -ENODEV;
5b75da2f
JS
5099}
5100
5101/**
3772a991 5102 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS
5103 * @phba: pointer to lpfc hba data structure.
5104 *
3772a991
JS
5105 * This routine is invoked to disable the PCI device that is common to all
5106 * PCI devices.
5b75da2f
JS
5107 **/
5108static void
3772a991 5109lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5110{
3772a991 5111 struct pci_dev *pdev;
5b75da2f 5112
3772a991
JS
5113 /* Obtain PCI device reference */
5114 if (!phba->pcidev)
5115 return;
5116 else
5117 pdev = phba->pcidev;
3772a991 5118 /* Release PCI resource and disable PCI device */
e0c0483c 5119 pci_release_mem_regions(pdev);
3772a991 5120 pci_disable_device(pdev);
5b75da2f
JS
5121
5122 return;
5123}
5124
e59058c4 5125/**
3772a991
JS
5126 * lpfc_reset_hba - Reset a hba
5127 * @phba: pointer to lpfc hba data structure.
e59058c4 5128 *
3772a991
JS
5129 * This routine is invoked to reset a hba device. It brings the HBA
5130 * offline, performs a board restart, and then brings the board back
5131 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5132 * on outstanding mailbox commands.
e59058c4 5133 **/
3772a991
JS
5134void
5135lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5136{
3772a991
JS
5137 /* If resets are disabled then set error state and return. */
5138 if (!phba->cfg_enable_hba_reset) {
5139 phba->link_state = LPFC_HBA_ERROR;
5140 return;
5141 }
ee62021a
JS
5142 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5143 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5144 else
5145 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS
5146 lpfc_offline(phba);
5147 lpfc_sli_brdrestart(phba);
5148 lpfc_online(phba);
5149 lpfc_unblock_mgmt_io(phba);
5150}
dea3101e 5151
0a96e975
JS
5152/**
5153 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5154 * @phba: pointer to lpfc hba data structure.
5155 *
5156 * This function enables the PCI SR-IOV virtual functions to a physical
5157 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5158 * enable the number of virtual functions to the physical function. As
5159 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5160 * API call does not considered as an error condition for most of the device.
5161 **/
5162uint16_t
5163lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5164{
5165 struct pci_dev *pdev = phba->pcidev;
5166 uint16_t nr_virtfn;
5167 int pos;
5168
0a96e975
JS
5169 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5170 if (pos == 0)
5171 return 0;
5172
5173 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5174 return nr_virtfn;
5175}
5176
912e3acd
JS
5177/**
5178 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5179 * @phba: pointer to lpfc hba data structure.
5180 * @nr_vfn: number of virtual functions to be enabled.
5181 *
5182 * This function enables the PCI SR-IOV virtual functions to a physical
5183 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5184 * enable the number of virtual functions to the physical function. As
5185 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5186 * API call does not considered as an error condition for most of the device.
5187 **/
5188int
5189lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5190{
5191 struct pci_dev *pdev = phba->pcidev;
0a96e975 5192 uint16_t max_nr_vfn;
912e3acd
JS
5193 int rc;
5194
0a96e975
JS
5195 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5196 if (nr_vfn > max_nr_vfn) {
5197 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5198 "3057 Requested vfs (%d) greater than "
5199 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5200 return -EINVAL;
5201 }
5202
912e3acd
JS
5203 rc = pci_enable_sriov(pdev, nr_vfn);
5204 if (rc) {
5205 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5206 "2806 Failed to enable sriov on this device "
5207 "with vfn number nr_vf:%d, rc:%d\n",
5208 nr_vfn, rc);
5209 } else
5210 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5211 "2807 Successful enable sriov on this device "
5212 "with vfn number nr_vf:%d\n", nr_vfn);
5213 return rc;
5214}
5215
3772a991 5216/**
895427bd 5217 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS
5218 * @phba: pointer to lpfc hba data structure.
5219 *
895427bd
JS
5220 * This routine is invoked to set up the driver internal resources before the
5221 * device specific resource setup to support the HBA device it attached to.
3772a991
JS
5222 *
5223 * Return codes
895427bd
JS
5224 * 0 - successful
5225 * other values - error
3772a991
JS
5226 **/
5227static int
895427bd 5228lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5229{
895427bd 5230 struct lpfc_sli *psli = &phba->sli;
dea3101e 5231
2e0fef85 5232 /*
895427bd 5233 * Driver resources common to all SLI revisions
2e0fef85 5234 */
895427bd
JS
5235 atomic_set(&phba->fast_event_count, 0);
5236 spin_lock_init(&phba->hbalock);
dea3101e 5237
895427bd
JS
5238 /* Initialize ndlp management spinlock */
5239 spin_lock_init(&phba->ndlp_lock);
5240
5241 INIT_LIST_HEAD(&phba->port_list);
5242 INIT_LIST_HEAD(&phba->work_list);
5243 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5244
5245 /* Initialize the wait queue head for the kernel thread */
5246 init_waitqueue_head(&phba->work_waitq);
5247
5248 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5249 "1403 Protocols supported %s %s\n",
5250 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5251 "SCSI" : " "),
5252 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
5253 "NVME" : " "));
5254
5255 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5256 /* Initialize the scsi buffer list used by driver for scsi IO */
5257 spin_lock_init(&phba->scsi_buf_list_get_lock);
5258 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5259 spin_lock_init(&phba->scsi_buf_list_put_lock);
5260 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5261 }
5262
5263 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5264 (phba->nvmet_support == 0)) {
5265 /* Initialize the NVME buffer list used by driver for NVME IO */
5266 spin_lock_init(&phba->nvme_buf_list_get_lock);
5267 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
5268 spin_lock_init(&phba->nvme_buf_list_put_lock);
5269 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
5270 }
5271
5272 /* Initialize the fabric iocb list */
5273 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5274
5275 /* Initialize list to save ELS buffers */
5276 INIT_LIST_HEAD(&phba->elsbuf);
5277
5278 /* Initialize FCF connection rec list */
5279 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5280
5281 /* Initialize OAS configuration list */
5282 spin_lock_init(&phba->devicelock);
5283 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5284
3772a991 5285 /* MBOX heartbeat timer */
dea3101e
JB
5286 init_timer(&psli->mbox_tmo);
5287 psli->mbox_tmo.function = lpfc_mbox_timeout;
2e0fef85 5288 psli->mbox_tmo.data = (unsigned long) phba;
3772a991 5289 /* Fabric block timer */
92d7f7b0
JS
5290 init_timer(&phba->fabric_block_timer);
5291 phba->fabric_block_timer.function = lpfc_fabric_block_timeout;
5292 phba->fabric_block_timer.data = (unsigned long) phba;
3772a991 5293 /* EA polling mode timer */
9399627f
JS
5294 init_timer(&phba->eratt_poll);
5295 phba->eratt_poll.function = lpfc_poll_eratt;
5296 phba->eratt_poll.data = (unsigned long) phba;
895427bd
JS
5297 /* Heartbeat timer */
5298 init_timer(&phba->hb_tmofunc);
5299 phba->hb_tmofunc.function = lpfc_hb_timeout;
5300 phba->hb_tmofunc.data = (unsigned long)phba;
5301
5302 return 0;
5303}
5304
5305/**
5306 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5307 * @phba: pointer to lpfc hba data structure.
5308 *
5309 * This routine is invoked to set up the driver internal resources specific to
5310 * support the SLI-3 HBA device it attached to.
5311 *
5312 * Return codes
5313 * 0 - successful
5314 * other values - error
5315 **/
5316static int
5317lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5318{
5319 int rc;
5320
5321 /*
5322 * Initialize timers used by driver
5323 */
5324
5325 /* FCP polling mode timer */
5326 init_timer(&phba->fcp_poll_timer);
5327 phba->fcp_poll_timer.function = lpfc_poll_timeout;
5328 phba->fcp_poll_timer.data = (unsigned long) phba;
dea3101e 5329
3772a991
JS
5330 /* Host attention work mask setup */
5331 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5332 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5333
3772a991
JS
5334 /* Get all the module params for configuring this host */
5335 lpfc_get_cfgparam(phba);
895427bd
JS
5336 /* Set up phase-1 common device driver resources */
5337
5338 rc = lpfc_setup_driver_resource_phase1(phba);
5339 if (rc)
5340 return -ENODEV;
5341
49198b37
JS
5342 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5343 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5344 /* check for menlo minimum sg count */
5345 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5346 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5347 }
5348
895427bd
JS
5349 if (!phba->sli.sli3_ring)
5350 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5351 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5352 if (!phba->sli.sli3_ring)
2a76a283
JS
5353 return -ENOMEM;
5354
dea3101e 5355 /*
96f7077f 5356 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5357 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5358 */
3772a991 5359
96f7077f
JS
5360 /* Initialize the host templates the configured values. */
5361 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5f406fae 5362 lpfc_template_s3.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5363
5364 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5365 if (phba->cfg_enable_bg) {
96f7077f
JS
5366 /*
5367 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5368 * the FCP rsp, and a BDE for each. Sice we have no control
5369 * over how many protection data segments the SCSI Layer
5370 * will hand us (ie: there could be one for every block
5371 * in the IO), we just allocate enough BDEs to accomidate
5372 * our max amount and we need to limit lpfc_sg_seg_cnt to
5373 * minimize the risk of running out.
5374 */
5375 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5376 sizeof(struct fcp_rsp) +
5377 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5378
5379 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5380 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5381
5382 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5383 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5384 } else {
5385 /*
5386 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5387 * the FCP rsp, a BDE for each, and a BDE for up to
5388 * cfg_sg_seg_cnt data segments.
5389 */
5390 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5391 sizeof(struct fcp_rsp) +
5392 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5393
5394 /* Total BDEs in BPL for scsi_sg_list */
5395 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5396 }
dea3101e 5397
96f7077f
JS
5398 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5399 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5400 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5401 phba->cfg_total_seg_cnt);
dea3101e 5402
3772a991
JS
5403 phba->max_vpi = LPFC_MAX_VPI;
5404 /* This will be set to correct value after config_port mbox */
5405 phba->max_vports = 0;
dea3101e 5406
3772a991
JS
5407 /*
5408 * Initialize the SLI Layer to run with lpfc HBAs.
5409 */
5410 lpfc_sli_setup(phba);
895427bd 5411 lpfc_sli_queue_init(phba);
ed957684 5412
3772a991
JS
5413 /* Allocate device driver memory */
5414 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5415 return -ENOMEM;
51ef4c26 5416
912e3acd
JS
5417 /*
5418 * Enable sr-iov virtual functions if supported and configured
5419 * through the module parameter.
5420 */
5421 if (phba->cfg_sriov_nr_virtfn > 0) {
5422 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5423 phba->cfg_sriov_nr_virtfn);
5424 if (rc) {
5425 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5426 "2808 Requested number of SR-IOV "
5427 "virtual functions (%d) is not "
5428 "supported\n",
5429 phba->cfg_sriov_nr_virtfn);
5430 phba->cfg_sriov_nr_virtfn = 0;
5431 }
5432 }
5433
3772a991
JS
5434 return 0;
5435}
ed957684 5436
3772a991
JS
5437/**
5438 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5439 * @phba: pointer to lpfc hba data structure.
5440 *
5441 * This routine is invoked to unset the driver internal resources set up
5442 * specific for supporting the SLI-3 HBA device it attached to.
5443 **/
5444static void
5445lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5446{
5447 /* Free device driver memory allocated */
5448 lpfc_mem_free_all(phba);
3163f725 5449
3772a991
JS
5450 return;
5451}
dea3101e 5452
3772a991 5453/**
da0436e9 5454 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS
5455 * @phba: pointer to lpfc hba data structure.
5456 *
da0436e9
JS
5457 * This routine is invoked to set up the driver internal resources specific to
5458 * support the SLI-4 HBA device it attached to.
3772a991
JS
5459 *
5460 * Return codes
af901ca1 5461 * 0 - successful
da0436e9 5462 * other values - error
3772a991
JS
5463 **/
5464static int
da0436e9 5465lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5466{
28baac74 5467 LPFC_MBOXQ_t *mboxq;
895427bd 5468 int rc, i, max_buf_size;
28baac74
JS
5469 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5470 struct lpfc_mqe *mqe;
09294d46 5471 int longs;
1ba981fd 5472 int fof_vectors = 0;
da0436e9 5473
895427bd
JS
5474 phba->sli4_hba.num_online_cpu = num_online_cpus();
5475 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5476 phba->sli4_hba.curr_disp_cpu = 0;
5477
716d3bc5
JS
5478 /* Get all the module params for configuring this host */
5479 lpfc_get_cfgparam(phba);
5480
895427bd
JS
5481 /* Set up phase-1 common device driver resources */
5482 rc = lpfc_setup_driver_resource_phase1(phba);
5483 if (rc)
5484 return -ENODEV;
5485
da0436e9
JS
5486 /* Before proceed, wait for POST done and device ready */
5487 rc = lpfc_sli4_post_status_check(phba);
5488 if (rc)
5489 return -ENODEV;
5490
3772a991 5491 /*
da0436e9 5492 * Initialize timers used by driver
3772a991 5493 */
3772a991 5494
19ca7609
JS
5495 init_timer(&phba->rrq_tmr);
5496 phba->rrq_tmr.function = lpfc_rrq_timeout;
5497 phba->rrq_tmr.data = (unsigned long)phba;
3772a991 5498
ecfd03c6
JS
5499 /* FCF rediscover timer */
5500 init_timer(&phba->fcf.redisc_wait);
5501 phba->fcf.redisc_wait.function = lpfc_sli4_fcf_redisc_wait_tmo;
5502 phba->fcf.redisc_wait.data = (unsigned long)phba;
5503
7ad20aa9
JS
5504 /*
5505 * Control structure for handling external multi-buffer mailbox
5506 * command pass-through.
5507 */
5508 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5509 sizeof(struct lpfc_mbox_ext_buf_ctx));
5510 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5511
da0436e9 5512 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5513
da0436e9
JS
5514 /* This will be set to correct value after the read_config mbox */
5515 phba->max_vports = 0;
3772a991 5516
da0436e9
JS
5517 /* Program the default value of vlan_id and fc_map */
5518 phba->valid_vlan = 0;
5519 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5520 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5521 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5522
2a76a283
JS
5523 /*
5524 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS
5525 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5526 * The WQ create will allocate the ring.
2a76a283 5527 */
09294d46 5528
da0436e9 5529 /*
09294d46
JS
5530 * It doesn't matter what family our adapter is in, we are
5531 * limited to 2 Pages, 512 SGEs, for our SGL.
5532 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5533 */
5534 max_buf_size = (2 * SLI4_PAGE_SIZE);
5535 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - 2)
5536 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - 2;
09294d46 5537
da0436e9 5538 /*
895427bd
JS
5539 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5540 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5541 */
96f7077f
JS
5542 if (phba->cfg_enable_bg) {
5543 /*
895427bd
JS
5544 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5545 * the FCP rsp, and a SGE. Sice we have no control
5546 * over how many protection segments the SCSI Layer
96f7077f 5547 * will hand us (ie: there could be one for every block
895427bd
JS
5548 * in the IO), just allocate enough SGEs to accomidate
5549 * our max amount and we need to limit lpfc_sg_seg_cnt
5550 * to minimize the risk of running out.
96f7077f
JS
5551 */
5552 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5553 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS
5554
5555 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5556 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5557
5558 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS
5559 phba->cfg_sg_seg_cnt =
5560 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS
5561 } else {
5562 /*
895427bd 5563 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS
5564 * the FCP rsp, a SGE for each, and a SGE for up to
5565 * cfg_sg_seg_cnt data segments.
5566 */
5567 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd
JS
5568 sizeof(struct fcp_rsp) +
5569 ((phba->cfg_sg_seg_cnt + 2) *
5570 sizeof(struct sli4_sge));
96f7077f
JS
5571
5572 /* Total SGEs for scsi_sg_list */
5573 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
895427bd 5574
96f7077f 5575 /*
895427bd
JS
5576 * NOTE: if (phba->cfg_sg_seg_cnt + 2) <= 256 we only
5577 * need to post 1 page for the SGL.
96f7077f 5578 */
085c647c 5579 }
acd6859b 5580
96f7077f
JS
5581 /* Initialize the host templates with the updated values. */
5582 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5583 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5584
5585 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5586 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5587 else
5588 phba->cfg_sg_dma_buf_size =
5589 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5590
5591 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5592 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5593 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5594 phba->cfg_total_seg_cnt);
3772a991 5595
da0436e9 5596 /* Initialize buffer queue management fields */
895427bd 5597 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS
5598 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5599 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5600
da0436e9
JS
5601 /*
5602 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5603 */
895427bd
JS
5604 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5605 /* Initialize the Abort scsi buffer list used by driver */
5606 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5607 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5608 }
5609
5610 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5611 /* Initialize the Abort nvme buffer list used by driver */
5612 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5613 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
5614 }
5615
da0436e9 5616 /* This abort list used by worker thread */
895427bd 5617 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
3772a991 5618
da0436e9 5619 /*
6d368e53 5620 * Initialize driver internal slow-path work queues
da0436e9 5621 */
3772a991 5622
da0436e9
JS
5623 /* Driver internel slow-path CQ Event pool */
5624 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5625 /* Response IOCB work queue list */
45ed1190 5626 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS
5627 /* Asynchronous event CQ Event work queue list */
5628 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5629 /* Fast-path XRI aborted CQ Event work queue list */
5630 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5631 /* Slow-path XRI aborted CQ Event work queue list */
5632 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5633 /* Receive queue CQ Event work queue list */
5634 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5635
6d368e53
JS
5636 /* Initialize extent block lists. */
5637 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5638 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5639 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
5640 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
5641
448193b5
JS
5642 /* initialize optic_state to 0xFF */
5643 phba->sli4_hba.lnk_info.optic_state = 0xff;
5644
da0436e9
JS
5645 /* Allocate device driver memory */
5646 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
5647 if (rc)
5648 return -ENOMEM;
5649
2fcee4bf
JS
5650 /* IF Type 2 ports get initialized now. */
5651 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5652 LPFC_SLI_INTF_IF_TYPE_2) {
5653 rc = lpfc_pci_function_reset(phba);
895427bd
JS
5654 if (unlikely(rc)) {
5655 rc = -ENODEV;
5656 goto out_free_mem;
5657 }
946727dc 5658 phba->temp_sensor_support = 1;
2fcee4bf
JS
5659 }
5660
da0436e9
JS
5661 /* Create the bootstrap mailbox command */
5662 rc = lpfc_create_bootstrap_mbox(phba);
5663 if (unlikely(rc))
5664 goto out_free_mem;
5665
5666 /* Set up the host's endian order with the device. */
5667 rc = lpfc_setup_endian_order(phba);
5668 if (unlikely(rc))
5669 goto out_free_bsmbx;
5670
5671 /* Set up the hba's configuration parameters. */
5672 rc = lpfc_sli4_read_config(phba);
cff261f6
JS
5673 if (unlikely(rc))
5674 goto out_free_bsmbx;
5675 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS
5676 if (unlikely(rc))
5677 goto out_free_bsmbx;
5678
2fcee4bf
JS
5679 /* IF Type 0 ports get initialized now. */
5680 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5681 LPFC_SLI_INTF_IF_TYPE_0) {
5682 rc = lpfc_pci_function_reset(phba);
5683 if (unlikely(rc))
5684 goto out_free_bsmbx;
5685 }
da0436e9 5686
cb5172ea
JS
5687 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
5688 GFP_KERNEL);
5689 if (!mboxq) {
5690 rc = -ENOMEM;
5691 goto out_free_bsmbx;
5692 }
5693
895427bd
JS
5694 phba->nvmet_support = 0;
5695
5696 lpfc_nvme_mod_param_dep(phba);
5697
fedd3b7b 5698 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS
5699 lpfc_supported_pages(mboxq);
5700 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS
5701 if (!rc) {
5702 mqe = &mboxq->u.mqe;
5703 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
5704 LPFC_MAX_SUPPORTED_PAGES);
5705 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
5706 switch (pn_page[i]) {
5707 case LPFC_SLI4_PARAMETERS:
5708 phba->sli4_hba.pc_sli4_params.supported = 1;
5709 break;
5710 default:
5711 break;
5712 }
5713 }
5714 /* Read the port's SLI4 Parameters capabilities if supported. */
5715 if (phba->sli4_hba.pc_sli4_params.supported)
5716 rc = lpfc_pc_sli4_params_get(phba, mboxq);
5717 if (rc) {
5718 mempool_free(mboxq, phba->mbox_mem_pool);
5719 rc = -EIO;
5720 goto out_free_bsmbx;
cb5172ea
JS
5721 }
5722 }
65791f1f 5723
fedd3b7b
JS
5724 /*
5725 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS
5726 * If this call fails, it isn't critical unless the SLI4 parameters come
5727 * back in conflict.
fedd3b7b 5728 */
6d368e53
JS
5729 rc = lpfc_get_sli4_parameters(phba, mboxq);
5730 if (rc) {
5731 if (phba->sli4_hba.extents_in_use &&
5732 phba->sli4_hba.rpi_hdrs_in_use) {
5733 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5734 "2999 Unsupported SLI4 Parameters "
5735 "Extents and RPI headers enabled.\n");
6d368e53 5736 }
895427bd
JS
5737 mempool_free(mboxq, phba->mbox_mem_pool);
5738 goto out_free_bsmbx;
6d368e53 5739 }
895427bd 5740
cb5172ea 5741 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS
5742
5743 /* Verify OAS is supported */
5744 lpfc_sli4_oas_verify(phba);
5745 if (phba->cfg_fof)
5746 fof_vectors = 1;
5747
5350d872
JS
5748 /* Verify all the SLI4 queues */
5749 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS
5750 if (rc)
5751 goto out_free_bsmbx;
5752
5753 /* Create driver internal CQE event pool */
5754 rc = lpfc_sli4_cq_event_pool_create(phba);
5755 if (rc)
5350d872 5756 goto out_free_bsmbx;
da0436e9 5757
8a9d2e80
JS
5758 /* Initialize sgl lists per host */
5759 lpfc_init_sgl_list(phba);
5760
5761 /* Allocate and initialize active sgl array */
da0436e9
JS
5762 rc = lpfc_init_active_sgl_array(phba);
5763 if (rc) {
5764 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5765 "1430 Failed to initialize sgl list.\n");
8a9d2e80 5766 goto out_destroy_cq_event_pool;
da0436e9 5767 }
da0436e9
JS
5768 rc = lpfc_sli4_init_rpi_hdrs(phba);
5769 if (rc) {
5770 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5771 "1432 Failed to initialize rpi headers.\n");
5772 goto out_free_active_sgl;
5773 }
5774
a93ff37a 5775 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS
5776 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
5777 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
5778 GFP_KERNEL);
5779 if (!phba->fcf.fcf_rr_bmask) {
5780 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5781 "2759 Failed allocate memory for FCF round "
5782 "robin failover bmask\n");
0558056c 5783 rc = -ENOMEM;
0c9ab6f5
JS
5784 goto out_remove_rpi_hdrs;
5785 }
5786
895427bd
JS
5787 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
5788 sizeof(struct lpfc_hba_eq_hdl),
5789 GFP_KERNEL);
5790 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS
5791 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5792 "2572 Failed allocate memory for "
5793 "fast-path per-EQ handle array\n");
5794 rc = -ENOMEM;
5795 goto out_free_fcf_rr_bmask;
da0436e9
JS
5796 }
5797
895427bd
JS
5798 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
5799 sizeof(struct lpfc_vector_map_info),
5800 GFP_KERNEL);
7bb03bbf
JS
5801 if (!phba->sli4_hba.cpu_map) {
5802 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5803 "3327 Failed allocate memory for msi-x "
5804 "interrupt vector mapping\n");
5805 rc = -ENOMEM;
895427bd 5806 goto out_free_hba_eq_hdl;
7bb03bbf 5807 }
b246de17 5808 if (lpfc_used_cpu == NULL) {
895427bd
JS
5809 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
5810 GFP_KERNEL);
b246de17
JS
5811 if (!lpfc_used_cpu) {
5812 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5813 "3335 Failed allocate memory for msi-x "
5814 "interrupt vector mapping\n");
5815 kfree(phba->sli4_hba.cpu_map);
5816 rc = -ENOMEM;
895427bd 5817 goto out_free_hba_eq_hdl;
b246de17
JS
5818 }
5819 for (i = 0; i < lpfc_present_cpu; i++)
5820 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
5821 }
5822
912e3acd
JS
5823 /*
5824 * Enable sr-iov virtual functions if supported and configured
5825 * through the module parameter.
5826 */
5827 if (phba->cfg_sriov_nr_virtfn > 0) {
5828 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5829 phba->cfg_sriov_nr_virtfn);
5830 if (rc) {
5831 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5832 "3020 Requested number of SR-IOV "
5833 "virtual functions (%d) is not "
5834 "supported\n",
5835 phba->cfg_sriov_nr_virtfn);
5836 phba->cfg_sriov_nr_virtfn = 0;
5837 }
5838 }
5839
5248a749 5840 return 0;
da0436e9 5841
895427bd
JS
5842out_free_hba_eq_hdl:
5843 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS
5844out_free_fcf_rr_bmask:
5845 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS
5846out_remove_rpi_hdrs:
5847 lpfc_sli4_remove_rpi_hdrs(phba);
5848out_free_active_sgl:
5849 lpfc_free_active_sgl(phba);
da0436e9
JS
5850out_destroy_cq_event_pool:
5851 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS
5852out_free_bsmbx:
5853 lpfc_destroy_bootstrap_mbox(phba);
5854out_free_mem:
5855 lpfc_mem_free(phba);
5856 return rc;
5857}
5858
5859/**
5860 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
5861 * @phba: pointer to lpfc hba data structure.
5862 *
5863 * This routine is invoked to unset the driver internal resources set up
5864 * specific for supporting the SLI-4 HBA device it attached to.
5865 **/
5866static void
5867lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
5868{
5869 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
5870
7bb03bbf
JS
5871 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
5872 kfree(phba->sli4_hba.cpu_map);
5873 phba->sli4_hba.num_present_cpu = 0;
5874 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 5875 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 5876
da0436e9 5877 /* Free memory allocated for fast-path work queue handles */
895427bd 5878 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS
5879
5880 /* Free the allocated rpi headers. */
5881 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 5882 lpfc_sli4_remove_rpis(phba);
da0436e9 5883
0c9ab6f5
JS
5884 /* Free eligible FCF index bmask */
5885 kfree(phba->fcf.fcf_rr_bmask);
5886
da0436e9
JS
5887 /* Free the ELS sgl list */
5888 lpfc_free_active_sgl(phba);
8a9d2e80 5889 lpfc_free_els_sgl_list(phba);
da0436e9 5890
da0436e9
JS
5891 /* Free the completion queue EQ event pool */
5892 lpfc_sli4_cq_event_release_all(phba);
5893 lpfc_sli4_cq_event_pool_destroy(phba);
5894
6d368e53
JS
5895 /* Release resource identifiers. */
5896 lpfc_sli4_dealloc_resource_identifiers(phba);
5897
da0436e9
JS
5898 /* Free the bsmbx region. */
5899 lpfc_destroy_bootstrap_mbox(phba);
5900
5901 /* Free the SLI Layer memory with SLI4 HBAs */
5902 lpfc_mem_free_all(phba);
5903
5904 /* Free the current connect table */
5905 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS
5906 &phba->fcf_conn_rec_list, list) {
5907 list_del_init(&conn_entry->list);
da0436e9 5908 kfree(conn_entry);
4d9ab994 5909 }
da0436e9
JS
5910
5911 return;
5912}
5913
5914/**
25985edc 5915 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS
5916 * @phba: The hba struct for which this call is being executed.
5917 * @dev_grp: The HBA PCI-Device group number.
5918 *
5919 * This routine sets up the device INIT interface API function jump table
5920 * in @phba struct.
5921 *
5922 * Returns: 0 - success, -ENODEV - failure.
5923 **/
5924int
5925lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5926{
84d1b006
JS
5927 phba->lpfc_hba_init_link = lpfc_hba_init_link;
5928 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 5929 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS
5930 switch (dev_grp) {
5931 case LPFC_PCI_DEV_LP:
5932 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
5933 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
5934 phba->lpfc_stop_port = lpfc_stop_port_s3;
5935 break;
5936 case LPFC_PCI_DEV_OC:
5937 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
5938 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
5939 phba->lpfc_stop_port = lpfc_stop_port_s4;
5940 break;
5941 default:
5942 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5943 "1431 Invalid HBA PCI-device group: 0x%x\n",
5944 dev_grp);
5945 return -ENODEV;
5946 break;
5947 }
5948 return 0;
5949}
5950
da0436e9
JS
5951/**
5952 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
5953 * @phba: pointer to lpfc hba data structure.
5954 *
5955 * This routine is invoked to set up the driver internal resources after the
5956 * device specific resource setup to support the HBA device it attached to.
5957 *
5958 * Return codes
af901ca1 5959 * 0 - successful
da0436e9
JS
5960 * other values - error
5961 **/
5962static int
5963lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
5964{
5965 int error;
5966
5967 /* Startup the kernel thread for this host adapter. */
5968 phba->worker_thread = kthread_run(lpfc_do_work, phba,
5969 "lpfc_worker_%d", phba->brd_no);
5970 if (IS_ERR(phba->worker_thread)) {
5971 error = PTR_ERR(phba->worker_thread);
5972 return error;
3772a991
JS
5973 }
5974
5975 return 0;
5976}
5977
5978/**
5979 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
5980 * @phba: pointer to lpfc hba data structure.
5981 *
5982 * This routine is invoked to unset the driver internal resources set up after
5983 * the device specific resource setup for supporting the HBA device it
5984 * attached to.
5985 **/
5986static void
5987lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
5988{
5989 /* Stop kernel worker thread */
5990 kthread_stop(phba->worker_thread);
5991}
5992
5993/**
5994 * lpfc_free_iocb_list - Free iocb list.
5995 * @phba: pointer to lpfc hba data structure.
5996 *
5997 * This routine is invoked to free the driver's IOCB list and memory.
5998 **/
5999static void
6000lpfc_free_iocb_list(struct lpfc_hba *phba)
6001{
6002 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6003
6004 spin_lock_irq(&phba->hbalock);
6005 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6006 &phba->lpfc_iocb_list, list) {
6007 list_del(&iocbq_entry->list);
6008 kfree(iocbq_entry);
6009 phba->total_iocbq_bufs--;
98c9ea5c 6010 }
3772a991
JS
6011 spin_unlock_irq(&phba->hbalock);
6012
6013 return;
6014}
6015
6016/**
6017 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6018 * @phba: pointer to lpfc hba data structure.
6019 *
6020 * This routine is invoked to allocate and initizlize the driver's IOCB
6021 * list and set up the IOCB tag array accordingly.
6022 *
6023 * Return codes
af901ca1 6024 * 0 - successful
3772a991
JS
6025 * other values - error
6026 **/
6027static int
6028lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6029{
6030 struct lpfc_iocbq *iocbq_entry = NULL;
6031 uint16_t iotag;
6032 int i;
dea3101e
JB
6033
6034 /* Initialize and populate the iocb list per host. */
6035 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6036 for (i = 0; i < iocb_count; i++) {
dd00cc48 6037 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e
JB
6038 if (iocbq_entry == NULL) {
6039 printk(KERN_ERR "%s: only allocated %d iocbs of "
6040 "expected %d count. Unloading driver.\n",
cadbd4a5 6041 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e
JB
6042 goto out_free_iocbq;
6043 }
6044
604a3e30
JB
6045 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6046 if (iotag == 0) {
3772a991 6047 kfree(iocbq_entry);
604a3e30 6048 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6049 "Unloading driver.\n", __func__);
604a3e30
JB
6050 goto out_free_iocbq;
6051 }
6d368e53 6052 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6053 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS
6054
6055 spin_lock_irq(&phba->hbalock);
dea3101e
JB
6056 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6057 phba->total_iocbq_bufs++;
2e0fef85 6058 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
6059 }
6060
3772a991 6061 return 0;
dea3101e 6062
3772a991
JS
6063out_free_iocbq:
6064 lpfc_free_iocb_list(phba);
dea3101e 6065
3772a991
JS
6066 return -ENOMEM;
6067}
5e9d9b82 6068
3772a991 6069/**
8a9d2e80 6070 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6071 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6072 * @sglq_list: pointer to the head of sgl list.
3772a991 6073 *
8a9d2e80 6074 * This routine is invoked to free a give sgl list and memory.
3772a991 6075 **/
8a9d2e80
JS
6076void
6077lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6078{
da0436e9 6079 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS
6080
6081 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6082 list_del(&sglq_entry->list);
6083 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6084 kfree(sglq_entry);
6085 }
6086}
6087
6088/**
6089 * lpfc_free_els_sgl_list - Free els sgl list.
6090 * @phba: pointer to lpfc hba data structure.
6091 *
6092 * This routine is invoked to free the driver's els sgl list and memory.
6093 **/
6094static void
6095lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6096{
da0436e9 6097 LIST_HEAD(sglq_list);
dea3101e 6098
8a9d2e80 6099 /* Retrieve all els sgls from driver list */
da0436e9 6100 spin_lock_irq(&phba->hbalock);
895427bd
JS
6101 spin_lock(&phba->sli4_hba.sgl_list_lock);
6102 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6103 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6104 spin_unlock_irq(&phba->hbalock);
dea3101e 6105
8a9d2e80
JS
6106 /* Now free the sgl list */
6107 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6108}
92d7f7b0 6109
da0436e9
JS
6110/**
6111 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6112 * @phba: pointer to lpfc hba data structure.
6113 *
6114 * This routine is invoked to allocate the driver's active sgl memory.
6115 * This array will hold the sglq_entry's for active IOs.
6116 **/
6117static int
6118lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6119{
6120 int size;
6121 size = sizeof(struct lpfc_sglq *);
6122 size *= phba->sli4_hba.max_cfg_param.max_xri;
6123
6124 phba->sli4_hba.lpfc_sglq_active_list =
6125 kzalloc(size, GFP_KERNEL);
6126 if (!phba->sli4_hba.lpfc_sglq_active_list)
6127 return -ENOMEM;
6128 return 0;
3772a991
JS
6129}
6130
6131/**
da0436e9 6132 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS
6133 * @phba: pointer to lpfc hba data structure.
6134 *
da0436e9
JS
6135 * This routine is invoked to walk through the array of active sglq entries
6136 * and free all of the resources.
6137 * This is just a place holder for now.
3772a991
JS
6138 **/
6139static void
da0436e9 6140lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6141{
da0436e9 6142 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS
6143}
6144
6145/**
da0436e9 6146 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS
6147 * @phba: pointer to lpfc hba data structure.
6148 *
da0436e9
JS
6149 * This routine is invoked to allocate and initizlize the driver's sgl
6150 * list and set up the sgl xritag tag array accordingly.
3772a991 6151 *
3772a991 6152 **/
8a9d2e80 6153static void
da0436e9 6154lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6155{
da0436e9 6156 /* Initialize and populate the sglq list per host/VF. */
895427bd 6157 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9
JS
6158 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
6159
8a9d2e80
JS
6160 /* els xri-sgl book keeping */
6161 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6162
8a9d2e80 6163 /* scsi xri-buffer book keeping */
da0436e9 6164 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS
6165
6166 /* nvme xri-buffer book keeping */
6167 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS
6168}
6169
6170/**
6171 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6172 * @phba: pointer to lpfc hba data structure.
6173 *
6174 * This routine is invoked to post rpi header templates to the
88a2cfbb 6175 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6176 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS
6177 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6178 * and should be called only when interrupts are disabled.
da0436e9
JS
6179 *
6180 * Return codes
af901ca1 6181 * 0 - successful
88a2cfbb 6182 * -ERROR - otherwise.
da0436e9
JS
6183 **/
6184int
6185lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6186{
6187 int rc = 0;
da0436e9
JS
6188 struct lpfc_rpi_hdr *rpi_hdr;
6189
6190 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6191 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6192 return rc;
6d368e53
JS
6193 if (phba->sli4_hba.extents_in_use)
6194 return -EIO;
da0436e9
JS
6195
6196 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6197 if (!rpi_hdr) {
6198 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6199 "0391 Error during rpi post operation\n");
6200 lpfc_sli4_remove_rpis(phba);
6201 rc = -ENODEV;
6202 }
6203
6204 return rc;
6205}
6206
6207/**
6208 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6209 * @phba: pointer to lpfc hba data structure.
6210 *
6211 * This routine is invoked to allocate a single 4KB memory region to
6212 * support rpis and stores them in the phba. This single region
6213 * provides support for up to 64 rpis. The region is used globally
6214 * by the device.
6215 *
6216 * Returns:
6217 * A valid rpi hdr on success.
6218 * A NULL pointer on any failure.
6219 **/
6220struct lpfc_rpi_hdr *
6221lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6222{
6223 uint16_t rpi_limit, curr_rpi_range;
6224 struct lpfc_dmabuf *dmabuf;
6225 struct lpfc_rpi_hdr *rpi_hdr;
9589b062 6226 uint32_t rpi_count;
da0436e9 6227
6d368e53
JS
6228 /*
6229 * If the SLI4 port supports extents, posting the rpi header isn't
6230 * required. Set the expected maximum count and let the actual value
6231 * get set when extents are fully allocated.
6232 */
6233 if (!phba->sli4_hba.rpi_hdrs_in_use)
6234 return NULL;
6235 if (phba->sli4_hba.extents_in_use)
6236 return NULL;
6237
6238 /* The limit on the logical index is just the max_rpi count. */
da0436e9 6239 rpi_limit = phba->sli4_hba.max_cfg_param.rpi_base +
6d368e53 6240 phba->sli4_hba.max_cfg_param.max_rpi - 1;
da0436e9
JS
6241
6242 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6243 /*
6244 * Establish the starting RPI in this header block. The starting
6245 * rpi is normalized to a zero base because the physical rpi is
6246 * port based.
6247 */
97f2ecf1 6248 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS
6249 spin_unlock_irq(&phba->hbalock);
6250
6251 /*
6252 * The port has a limited number of rpis. The increment here
6253 * is LPFC_RPI_HDR_COUNT - 1 to account for the starting value
6254 * and to allow the full max_rpi range per port.
6255 */
6256 if ((curr_rpi_range + (LPFC_RPI_HDR_COUNT - 1)) > rpi_limit)
9589b062
JS
6257 rpi_count = rpi_limit - curr_rpi_range;
6258 else
6259 rpi_count = LPFC_RPI_HDR_COUNT;
da0436e9 6260
6d368e53
JS
6261 if (!rpi_count)
6262 return NULL;
da0436e9
JS
6263 /*
6264 * First allocate the protocol header region for the port. The
6265 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6266 */
6267 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6268 if (!dmabuf)
6269 return NULL;
6270
1aee383d
JP
6271 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6272 LPFC_HDR_TEMPLATE_SIZE,
6273 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
6274 if (!dmabuf->virt) {
6275 rpi_hdr = NULL;
6276 goto err_free_dmabuf;
6277 }
6278
da0436e9
JS
6279 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6280 rpi_hdr = NULL;
6281 goto err_free_coherent;
6282 }
6283
6284 /* Save the rpi header data for cleanup later. */
6285 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6286 if (!rpi_hdr)
6287 goto err_free_coherent;
6288
6289 rpi_hdr->dmabuf = dmabuf;
6290 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6291 rpi_hdr->page_count = 1;
6292 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6293
6294 /* The rpi_hdr stores the logical index only. */
6295 rpi_hdr->start_rpi = curr_rpi_range;
da0436e9
JS
6296 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6297
6298 /*
6d368e53
JS
6299 * The next_rpi stores the next logical module-64 rpi value used
6300 * to post physical rpis in subsequent rpi postings.
da0436e9 6301 */
9589b062 6302 phba->sli4_hba.next_rpi += rpi_count;
da0436e9
JS
6303 spin_unlock_irq(&phba->hbalock);
6304 return rpi_hdr;
6305
6306 err_free_coherent:
6307 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6308 dmabuf->virt, dmabuf->phys);
6309 err_free_dmabuf:
6310 kfree(dmabuf);
6311 return NULL;
6312}
6313
6314/**
6315 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6316 * @phba: pointer to lpfc hba data structure.
6317 *
6318 * This routine is invoked to remove all memory resources allocated
6d368e53
JS
6319 * to support rpis for SLI4 ports not supporting extents. This routine
6320 * presumes the caller has released all rpis consumed by fabric or port
6321 * logins and is prepared to have the header pages removed.
da0436e9
JS
6322 **/
6323void
6324lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6325{
6326 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6327
6d368e53
JS
6328 if (!phba->sli4_hba.rpi_hdrs_in_use)
6329 goto exit;
6330
da0436e9
JS
6331 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6332 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6333 list_del(&rpi_hdr->list);
6334 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6335 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6336 kfree(rpi_hdr->dmabuf);
6337 kfree(rpi_hdr);
6338 }
6d368e53
JS
6339 exit:
6340 /* There are no rpis available to the port now. */
6341 phba->sli4_hba.next_rpi = 0;
da0436e9
JS
6342}
6343
6344/**
6345 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6346 * @pdev: pointer to pci device data structure.
6347 *
6348 * This routine is invoked to allocate the driver hba data structure for an
6349 * HBA device. If the allocation is successful, the phba reference to the
6350 * PCI device data structure is set.
6351 *
6352 * Return codes
af901ca1 6353 * pointer to @phba - successful
da0436e9
JS
6354 * NULL - error
6355 **/
6356static struct lpfc_hba *
6357lpfc_hba_alloc(struct pci_dev *pdev)
6358{
6359 struct lpfc_hba *phba;
6360
6361 /* Allocate memory for HBA structure */
6362 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6363 if (!phba) {
e34ccdfe 6364 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS
6365 return NULL;
6366 }
6367
6368 /* Set reference to PCI device in HBA structure */
6369 phba->pcidev = pdev;
6370
6371 /* Assign an unused board number */
6372 phba->brd_no = lpfc_get_instance();
6373 if (phba->brd_no < 0) {
6374 kfree(phba);
6375 return NULL;
6376 }
65791f1f 6377 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6378
4fede78f 6379 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS
6380 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6381
da0436e9
JS
6382 return phba;
6383}
6384
6385/**
6386 * lpfc_hba_free - Free driver hba data structure with a device.
6387 * @phba: pointer to lpfc hba data structure.
6388 *
6389 * This routine is invoked to free the driver hba data structure with an
6390 * HBA device.
6391 **/
6392static void
6393lpfc_hba_free(struct lpfc_hba *phba)
6394{
6395 /* Release the driver assigned board number */
6396 idr_remove(&lpfc_hba_index, phba->brd_no);
6397
895427bd
JS
6398 /* Free memory allocated with sli3 rings */
6399 kfree(phba->sli.sli3_ring);
6400 phba->sli.sli3_ring = NULL;
2a76a283 6401
da0436e9
JS
6402 kfree(phba);
6403 return;
6404}
6405
6406/**
6407 * lpfc_create_shost - Create hba physical port with associated scsi host.
6408 * @phba: pointer to lpfc hba data structure.
6409 *
6410 * This routine is invoked to create HBA physical port and associate a SCSI
6411 * host with it.
6412 *
6413 * Return codes
af901ca1 6414 * 0 - successful
da0436e9
JS
6415 * other values - error
6416 **/
6417static int
6418lpfc_create_shost(struct lpfc_hba *phba)
6419{
6420 struct lpfc_vport *vport;
6421 struct Scsi_Host *shost;
6422
6423 /* Initialize HBA FC structure */
6424 phba->fc_edtov = FF_DEF_EDTOV;
6425 phba->fc_ratov = FF_DEF_RATOV;
6426 phba->fc_altov = FF_DEF_ALTOV;
6427 phba->fc_arbtov = FF_DEF_ARBTOV;
6428
d7c47992 6429 atomic_set(&phba->sdev_cnt, 0);
da0436e9
JS
6430 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6431 if (!vport)
6432 return -ENODEV;
6433
6434 shost = lpfc_shost_from_vport(vport);
6435 phba->pport = vport;
2ea259ee 6436
da0436e9
JS
6437 lpfc_debugfs_initialize(vport);
6438 /* Put reference to SCSI host to driver's device private data */
6439 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6440
4258e98e
JS
6441 /*
6442 * At this point we are fully registered with PSA. In addition,
6443 * any initial discovery should be completed.
6444 */
6445 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS
6446 if (phba->cfg_enable_SmartSAN ||
6447 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS
6448
6449 /* Setup appropriate attribute masks */
6450 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6451 if (phba->cfg_enable_SmartSAN)
4258e98e
JS
6452 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6453 else
6454 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6455 }
3772a991
JS
6456 return 0;
6457}
db2378e0 6458
3772a991
JS
6459/**
6460 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6461 * @phba: pointer to lpfc hba data structure.
6462 *
6463 * This routine is invoked to destroy HBA physical port and the associated
6464 * SCSI host.
6465 **/
6466static void
6467lpfc_destroy_shost(struct lpfc_hba *phba)
6468{
6469 struct lpfc_vport *vport = phba->pport;
6470
6471 /* Destroy physical port that associated with the SCSI host */
6472 destroy_port(vport);
6473
6474 return;
6475}
6476
6477/**
6478 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6479 * @phba: pointer to lpfc hba data structure.
6480 * @shost: the shost to be used to detect Block guard settings.
6481 *
6482 * This routine sets up the local Block guard protocol settings for @shost.
6483 * This routine also allocates memory for debugging bg buffers.
6484 **/
6485static void
6486lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6487{
bbeb79b9
JS
6488 uint32_t old_mask;
6489 uint32_t old_guard;
6490
3772a991 6491 int pagecnt = 10;
b3b98b74 6492 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS
6493 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6494 "1478 Registering BlockGuard with the "
6495 "SCSI layer\n");
bbeb79b9 6496
b3b98b74
JS
6497 old_mask = phba->cfg_prot_mask;
6498 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS
6499
6500 /* Only allow supported values */
b3b98b74 6501 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS
6502 SHOST_DIX_TYPE0_PROTECTION |
6503 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS
6504 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6505 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS
6506
6507 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS
6508 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6509 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6510
b3b98b74
JS
6511 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6512 if ((old_mask != phba->cfg_prot_mask) ||
6513 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS
6514 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6515 "1475 Registering BlockGuard with the "
6516 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS
6517 phba->cfg_prot_mask,
6518 phba->cfg_prot_guard);
bbeb79b9 6519
b3b98b74
JS
6520 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6521 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS
6522 } else
6523 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6524 "1479 Not Registering BlockGuard with the SCSI "
6525 "layer, Bad protection parameters: %d %d\n",
6526 old_mask, old_guard);
3772a991 6527 }
bbeb79b9 6528
3772a991
JS
6529 if (!_dump_buf_data) {
6530 while (pagecnt) {
6531 spin_lock_init(&_dump_buf_lock);
6532 _dump_buf_data =
6533 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6534 if (_dump_buf_data) {
6a9c52cf
JS
6535 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6536 "9043 BLKGRD: allocated %d pages for "
3772a991
JS
6537 "_dump_buf_data at 0x%p\n",
6538 (1 << pagecnt), _dump_buf_data);
6539 _dump_buf_data_order = pagecnt;
6540 memset(_dump_buf_data, 0,
6541 ((1 << PAGE_SHIFT) << pagecnt));
6542 break;
6543 } else
6544 --pagecnt;
6545 }
6546 if (!_dump_buf_data_order)
6a9c52cf
JS
6547 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6548 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS
6549 "memory for hexdump\n");
6550 } else
6a9c52cf
JS
6551 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6552 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS
6553 "\n", _dump_buf_data);
6554 if (!_dump_buf_dif) {
6555 while (pagecnt) {
6556 _dump_buf_dif =
6557 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6558 if (_dump_buf_dif) {
6a9c52cf
JS
6559 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6560 "9046 BLKGRD: allocated %d pages for "
3772a991
JS
6561 "_dump_buf_dif at 0x%p\n",
6562 (1 << pagecnt), _dump_buf_dif);
6563 _dump_buf_dif_order = pagecnt;
6564 memset(_dump_buf_dif, 0,
6565 ((1 << PAGE_SHIFT) << pagecnt));
6566 break;
6567 } else
6568 --pagecnt;
6569 }
6570 if (!_dump_buf_dif_order)
6a9c52cf
JS
6571 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6572 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS
6573 "memory for hexdump\n");
6574 } else
6a9c52cf
JS
6575 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6576 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS
6577 _dump_buf_dif);
6578}
6579
6580/**
6581 * lpfc_post_init_setup - Perform necessary device post initialization setup.
6582 * @phba: pointer to lpfc hba data structure.
6583 *
6584 * This routine is invoked to perform all the necessary post initialization
6585 * setup for the device.
6586 **/
6587static void
6588lpfc_post_init_setup(struct lpfc_hba *phba)
6589{
6590 struct Scsi_Host *shost;
6591 struct lpfc_adapter_event_header adapter_event;
6592
6593 /* Get the default values for Model Name and Description */
6594 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
6595
6596 /*
6597 * hba setup may have changed the hba_queue_depth so we need to
6598 * adjust the value of can_queue.
6599 */
6600 shost = pci_get_drvdata(phba->pcidev);
6601 shost->can_queue = phba->cfg_hba_queue_depth - 10;
6602 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
6603 lpfc_setup_bg(phba, shost);
6604
6605 lpfc_host_attrib_init(shost);
6606
6607 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
6608 spin_lock_irq(shost->host_lock);
6609 lpfc_poll_start_timer(phba);
6610 spin_unlock_irq(shost->host_lock);
6611 }
6612
6613 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6614 "0428 Perform SCSI scan\n");
6615 /* Send board arrival event to upper layer */
6616 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
6617 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
6618 fc_host_post_vendor_event(shost, fc_get_event_number(),
6619 sizeof(adapter_event),
6620 (char *) &adapter_event,
6621 LPFC_NL_VENDOR_ID);
6622 return;
6623}
6624
6625/**
6626 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
6627 * @phba: pointer to lpfc hba data structure.
6628 *
6629 * This routine is invoked to set up the PCI device memory space for device
6630 * with SLI-3 interface spec.
6631 *
6632 * Return codes
af901ca1 6633 * 0 - successful
3772a991
JS
6634 * other values - error
6635 **/
6636static int
6637lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
6638{
6639 struct pci_dev *pdev;
6640 unsigned long bar0map_len, bar2map_len;
6641 int i, hbq_count;
6642 void *ptr;
6643 int error = -ENODEV;
6644
6645 /* Obtain PCI device reference */
6646 if (!phba->pcidev)
6647 return error;
6648 else
6649 pdev = phba->pcidev;
6650
6651 /* Set the device DMA mask size */
8e68597d
MR
6652 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
6653 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
6654 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
6655 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 6656 return error;
8e68597d
MR
6657 }
6658 }
3772a991
JS
6659
6660 /* Get the bus address of Bar0 and Bar2 and the number of bytes
6661 * required by each mapping.
6662 */
6663 phba->pci_bar0_map = pci_resource_start(pdev, 0);
6664 bar0map_len = pci_resource_len(pdev, 0);
6665
6666 phba->pci_bar2_map = pci_resource_start(pdev, 2);
6667 bar2map_len = pci_resource_len(pdev, 2);
6668
6669 /* Map HBA SLIM to a kernel virtual address. */
6670 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
6671 if (!phba->slim_memmap_p) {
6672 dev_printk(KERN_ERR, &pdev->dev,
6673 "ioremap failed for SLIM memory.\n");
6674 goto out;
6675 }
6676
6677 /* Map HBA Control Registers to a kernel virtual address. */
6678 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
6679 if (!phba->ctrl_regs_memmap_p) {
6680 dev_printk(KERN_ERR, &pdev->dev,
6681 "ioremap failed for HBA control registers.\n");
6682 goto out_iounmap_slim;
6683 }
6684
6685 /* Allocate memory for SLI-2 structures */
1aee383d
JP
6686 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6687 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS
6688 if (!phba->slim2p.virt)
6689 goto out_iounmap;
6690
3772a991 6691 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS
6692 phba->mbox_ext = (phba->slim2p.virt +
6693 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS
6694 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
6695 phba->IOCBs = (phba->slim2p.virt +
6696 offsetof(struct lpfc_sli2_slim, IOCBs));
6697
6698 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
6699 lpfc_sli_hbq_size(),
6700 &phba->hbqslimp.phys,
6701 GFP_KERNEL);
6702 if (!phba->hbqslimp.virt)
6703 goto out_free_slim;
6704
6705 hbq_count = lpfc_sli_hbq_count();
6706 ptr = phba->hbqslimp.virt;
6707 for (i = 0; i < hbq_count; ++i) {
6708 phba->hbqs[i].hbq_virt = ptr;
6709 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
6710 ptr += (lpfc_hbq_defs[i]->entry_count *
6711 sizeof(struct lpfc_hbq_entry));
6712 }
6713 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
6714 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
6715
6716 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
6717
3772a991
JS
6718 phba->MBslimaddr = phba->slim_memmap_p;
6719 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
6720 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
6721 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
6722 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
6723
6724 return 0;
6725
6726out_free_slim:
6727 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6728 phba->slim2p.virt, phba->slim2p.phys);
6729out_iounmap:
6730 iounmap(phba->ctrl_regs_memmap_p);
6731out_iounmap_slim:
6732 iounmap(phba->slim_memmap_p);
6733out:
6734 return error;
6735}
6736
6737/**
6738 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
6739 * @phba: pointer to lpfc hba data structure.
6740 *
6741 * This routine is invoked to unset the PCI device memory space for device
6742 * with SLI-3 interface spec.
6743 **/
6744static void
6745lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
6746{
6747 struct pci_dev *pdev;
6748
6749 /* Obtain PCI device reference */
6750 if (!phba->pcidev)
6751 return;
6752 else
6753 pdev = phba->pcidev;
6754
6755 /* Free coherent DMA memory allocated */
6756 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
6757 phba->hbqslimp.virt, phba->hbqslimp.phys);
6758 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6759 phba->slim2p.virt, phba->slim2p.phys);
6760
6761 /* I/O memory unmap */
6762 iounmap(phba->ctrl_regs_memmap_p);
6763 iounmap(phba->slim_memmap_p);
6764
6765 return;
6766}
6767
6768/**
da0436e9 6769 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS
6770 * @phba: pointer to lpfc hba data structure.
6771 *
da0436e9
JS
6772 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
6773 * done and check status.
3772a991 6774 *
da0436e9 6775 * Return 0 if successful, otherwise -ENODEV.
3772a991 6776 **/
da0436e9
JS
6777int
6778lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 6779{
2fcee4bf
JS
6780 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
6781 struct lpfc_register reg_data;
6782 int i, port_error = 0;
6783 uint32_t if_type;
3772a991 6784
9940b97b
JS
6785 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
6786 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 6787 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 6788 return -ENODEV;
3772a991 6789
da0436e9
JS
6790 /* Wait up to 30 seconds for the SLI Port POST done and ready */
6791 for (i = 0; i < 3000; i++) {
9940b97b
JS
6792 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
6793 &portsmphr_reg.word0) ||
6794 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 6795 /* Port has a fatal POST error, break out */
da0436e9
JS
6796 port_error = -ENODEV;
6797 break;
6798 }
2fcee4bf
JS
6799 if (LPFC_POST_STAGE_PORT_READY ==
6800 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 6801 break;
da0436e9 6802 msleep(10);
3772a991
JS
6803 }
6804
2fcee4bf
JS
6805 /*
6806 * If there was a port error during POST, then don't proceed with
6807 * other register reads as the data may not be valid. Just exit.
6808 */
6809 if (port_error) {
da0436e9 6810 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
6811 "1408 Port Failed POST - portsmphr=0x%x, "
6812 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
6813 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
6814 portsmphr_reg.word0,
6815 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
6816 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
6817 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
6818 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
6819 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
6820 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
6821 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
6822 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
6823 } else {
28baac74 6824 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS
6825 "2534 Device Info: SLIFamily=0x%x, "
6826 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
6827 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS
6828 bf_get(lpfc_sli_intf_sli_family,
6829 &phba->sli4_hba.sli_intf),
6830 bf_get(lpfc_sli_intf_slirev,
6831 &phba->sli4_hba.sli_intf),
085c647c
JS
6832 bf_get(lpfc_sli_intf_if_type,
6833 &phba->sli4_hba.sli_intf),
6834 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 6835 &phba->sli4_hba.sli_intf),
085c647c
JS
6836 bf_get(lpfc_sli_intf_sli_hint2,
6837 &phba->sli4_hba.sli_intf),
6838 bf_get(lpfc_sli_intf_func_type,
28baac74 6839 &phba->sli4_hba.sli_intf));
2fcee4bf
JS
6840 /*
6841 * Check for other Port errors during the initialization
6842 * process. Fail the load if the port did not come up
6843 * correctly.
6844 */
6845 if_type = bf_get(lpfc_sli_intf_if_type,
6846 &phba->sli4_hba.sli_intf);
6847 switch (if_type) {
6848 case LPFC_SLI_INTF_IF_TYPE_0:
6849 phba->sli4_hba.ue_mask_lo =
6850 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
6851 phba->sli4_hba.ue_mask_hi =
6852 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
6853 uerrlo_reg.word0 =
6854 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
6855 uerrhi_reg.word0 =
6856 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
6857 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
6858 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
6859 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6860 "1422 Unrecoverable Error "
6861 "Detected during POST "
6862 "uerr_lo_reg=0x%x, "
6863 "uerr_hi_reg=0x%x, "
6864 "ue_mask_lo_reg=0x%x, "
6865 "ue_mask_hi_reg=0x%x\n",
6866 uerrlo_reg.word0,
6867 uerrhi_reg.word0,
6868 phba->sli4_hba.ue_mask_lo,
6869 phba->sli4_hba.ue_mask_hi);
6870 port_error = -ENODEV;
6871 }
6872 break;
6873 case LPFC_SLI_INTF_IF_TYPE_2:
6874 /* Final checks. The port status should be clean. */
9940b97b
JS
6875 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
6876 &reg_data.word0) ||
0558056c
JS
6877 (bf_get(lpfc_sliport_status_err, &reg_data) &&
6878 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS
6879 phba->work_status[0] =
6880 readl(phba->sli4_hba.u.if_type2.
6881 ERR1regaddr);
6882 phba->work_status[1] =
6883 readl(phba->sli4_hba.u.if_type2.
6884 ERR2regaddr);
6885 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS
6886 "2888 Unrecoverable port error "
6887 "following POST: port status reg "
6888 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS
6889 "error 1=0x%x, error 2=0x%x\n",
6890 reg_data.word0,
6891 portsmphr_reg.word0,
6892 phba->work_status[0],
6893 phba->work_status[1]);
6894 port_error = -ENODEV;
6895 }
6896 break;
6897 case LPFC_SLI_INTF_IF_TYPE_1:
6898 default:
6899 break;
6900 }
28baac74 6901 }
da0436e9
JS
6902 return port_error;
6903}
3772a991 6904
da0436e9
JS
6905/**
6906 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
6907 * @phba: pointer to lpfc hba data structure.
2fcee4bf 6908 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS
6909 *
6910 * This routine is invoked to set up SLI4 BAR0 PCI config space register
6911 * memory map.
6912 **/
6913static void
2fcee4bf
JS
6914lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
6915{
6916 switch (if_type) {
6917 case LPFC_SLI_INTF_IF_TYPE_0:
6918 phba->sli4_hba.u.if_type0.UERRLOregaddr =
6919 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
6920 phba->sli4_hba.u.if_type0.UERRHIregaddr =
6921 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
6922 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
6923 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
6924 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
6925 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
6926 phba->sli4_hba.SLIINTFregaddr =
6927 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
6928 break;
6929 case LPFC_SLI_INTF_IF_TYPE_2:
6930 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS
6931 phba->sli4_hba.conf_regs_memmap_p +
6932 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 6933 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS
6934 phba->sli4_hba.conf_regs_memmap_p +
6935 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 6936 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS
6937 phba->sli4_hba.conf_regs_memmap_p +
6938 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 6939 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS
6940 phba->sli4_hba.conf_regs_memmap_p +
6941 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS
6942 phba->sli4_hba.SLIINTFregaddr =
6943 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
6944 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS
6945 phba->sli4_hba.conf_regs_memmap_p +
6946 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 6947 phba->sli4_hba.RQDBregaddr =
962bc51b
JS
6948 phba->sli4_hba.conf_regs_memmap_p +
6949 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 6950 phba->sli4_hba.WQDBregaddr =
962bc51b
JS
6951 phba->sli4_hba.conf_regs_memmap_p +
6952 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS
6953 phba->sli4_hba.EQCQDBregaddr =
6954 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
6955 phba->sli4_hba.MQDBregaddr =
6956 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
6957 phba->sli4_hba.BMBXregaddr =
6958 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
6959 break;
6960 case LPFC_SLI_INTF_IF_TYPE_1:
6961 default:
6962 dev_printk(KERN_ERR, &phba->pcidev->dev,
6963 "FATAL - unsupported SLI4 interface type - %d\n",
6964 if_type);
6965 break;
6966 }
da0436e9 6967}
3772a991 6968
da0436e9
JS
6969/**
6970 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
6971 * @phba: pointer to lpfc hba data structure.
6972 *
6973 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
6974 * memory map.
6975 **/
6976static void
6977lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
6978{
2fcee4bf
JS
6979 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
6980 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 6981 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 6982 LPFC_HST_ISR0;
da0436e9 6983 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 6984 LPFC_HST_IMR0;
da0436e9 6985 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 6986 LPFC_HST_ISCR0;
3772a991
JS
6987}
6988
6989/**
da0436e9 6990 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 6991 * @phba: pointer to lpfc hba data structure.
da0436e9 6992 * @vf: virtual function number
3772a991 6993 *
da0436e9
JS
6994 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
6995 * based on the given viftual function number, @vf.
6996 *
6997 * Return 0 if successful, otherwise -ENODEV.
3772a991 6998 **/
da0436e9
JS
6999static int
7000lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7001{
da0436e9
JS
7002 if (vf > LPFC_VIR_FUNC_MAX)
7003 return -ENODEV;
3772a991 7004
da0436e9 7005 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7006 vf * LPFC_VFR_PAGE_SIZE +
7007 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7008 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7009 vf * LPFC_VFR_PAGE_SIZE +
7010 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS
7011 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7012 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7013 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7014 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7015 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7016 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7017 return 0;
3772a991
JS
7018}
7019
7020/**
da0436e9 7021 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS
7022 * @phba: pointer to lpfc hba data structure.
7023 *
da0436e9
JS
7024 * This routine is invoked to create the bootstrap mailbox
7025 * region consistent with the SLI-4 interface spec. This
7026 * routine allocates all memory necessary to communicate
7027 * mailbox commands to the port and sets up all alignment
7028 * needs. No locks are expected to be held when calling
7029 * this routine.
3772a991
JS
7030 *
7031 * Return codes
af901ca1 7032 * 0 - successful
d439d286 7033 * -ENOMEM - could not allocated memory.
da0436e9 7034 **/
3772a991 7035static int
da0436e9 7036lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7037{
da0436e9
JS
7038 uint32_t bmbx_size;
7039 struct lpfc_dmabuf *dmabuf;
7040 struct dma_address *dma_address;
7041 uint32_t pa_addr;
7042 uint64_t phys_addr;
7043
7044 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7045 if (!dmabuf)
7046 return -ENOMEM;
3772a991 7047
da0436e9
JS
7048 /*
7049 * The bootstrap mailbox region is comprised of 2 parts
7050 * plus an alignment restriction of 16 bytes.
7051 */
7052 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP
7053 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7054 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
7055 if (!dmabuf->virt) {
7056 kfree(dmabuf);
7057 return -ENOMEM;
3772a991
JS
7058 }
7059
da0436e9
JS
7060 /*
7061 * Initialize the bootstrap mailbox pointers now so that the register
7062 * operations are simple later. The mailbox dma address is required
7063 * to be 16-byte aligned. Also align the virtual memory as each
7064 * maibox is copied into the bmbx mailbox region before issuing the
7065 * command to the port.
7066 */
7067 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7068 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7069
7070 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7071 LPFC_ALIGN_16_BYTE);
7072 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7073 LPFC_ALIGN_16_BYTE);
7074
7075 /*
7076 * Set the high and low physical addresses now. The SLI4 alignment
7077 * requirement is 16 bytes and the mailbox is posted to the port
7078 * as two 30-bit addresses. The other data is a bit marking whether
7079 * the 30-bit address is the high or low address.
7080 * Upcast bmbx aphys to 64bits so shift instruction compiles
7081 * clean on 32 bit machines.
7082 */
7083 dma_address = &phba->sli4_hba.bmbx.dma_address;
7084 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7085 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7086 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7087 LPFC_BMBX_BIT1_ADDR_HI);
7088
7089 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7090 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7091 LPFC_BMBX_BIT1_ADDR_LO);
7092 return 0;
3772a991
JS
7093}
7094
7095/**
da0436e9 7096 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS
7097 * @phba: pointer to lpfc hba data structure.
7098 *
da0436e9
JS
7099 * This routine is invoked to teardown the bootstrap mailbox
7100 * region and release all host resources. This routine requires
7101 * the caller to ensure all mailbox commands recovered, no
7102 * additional mailbox comands are sent, and interrupts are disabled
7103 * before calling this routine.
7104 *
7105 **/
3772a991 7106static void
da0436e9 7107lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7108{
da0436e9
JS
7109 dma_free_coherent(&phba->pcidev->dev,
7110 phba->sli4_hba.bmbx.bmbx_size,
7111 phba->sli4_hba.bmbx.dmabuf->virt,
7112 phba->sli4_hba.bmbx.dmabuf->phys);
7113
7114 kfree(phba->sli4_hba.bmbx.dmabuf);
7115 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS
7116}
7117
7118/**
da0436e9 7119 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS
7120 * @phba: pointer to lpfc hba data structure.
7121 *
da0436e9
JS
7122 * This routine is invoked to read the configuration parameters from the HBA.
7123 * The configuration parameters are used to set the base and maximum values
7124 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7125 * allocation for the port.
3772a991
JS
7126 *
7127 * Return codes
af901ca1 7128 * 0 - successful
25985edc 7129 * -ENOMEM - No available memory
d439d286 7130 * -EIO - The mailbox failed to complete successfully.
3772a991 7131 **/
ff78d8f9 7132int
da0436e9 7133lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7134{
da0436e9
JS
7135 LPFC_MBOXQ_t *pmb;
7136 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS
7137 union lpfc_sli4_cfg_shdr *shdr;
7138 uint32_t shdr_status, shdr_add_status;
7139 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7140 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7141 char *pdesc_0;
c691816e
JS
7142 uint16_t forced_link_speed;
7143 uint32_t if_type;
8aa134a8 7144 int length, i, rc = 0, rc2;
3772a991 7145
da0436e9
JS
7146 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7147 if (!pmb) {
7148 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7149 "2011 Unable to allocate memory for issuing "
7150 "SLI_CONFIG_SPECIAL mailbox command\n");
7151 return -ENOMEM;
3772a991
JS
7152 }
7153
da0436e9 7154 lpfc_read_config(phba, pmb);
3772a991 7155
da0436e9
JS
7156 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7157 if (rc != MBX_SUCCESS) {
7158 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7159 "2012 Mailbox failed , mbxCmd x%x "
7160 "READ_CONFIG, mbxStatus x%x\n",
7161 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7162 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7163 rc = -EIO;
7164 } else {
7165 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS
7166 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7167 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7168 phba->sli4_hba.lnk_info.lnk_tp =
7169 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7170 phba->sli4_hba.lnk_info.lnk_no =
7171 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7172 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7173 "3081 lnk_type:%d, lnk_numb:%d\n",
7174 phba->sli4_hba.lnk_info.lnk_tp,
7175 phba->sli4_hba.lnk_info.lnk_no);
7176 } else
7177 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7178 "3082 Mailbox (x%x) returned ldv:x0\n",
7179 bf_get(lpfc_mqe_command, &pmb->u.mqe));
6d368e53
JS
7180 phba->sli4_hba.extents_in_use =
7181 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS
7182 phba->sli4_hba.max_cfg_param.max_xri =
7183 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7184 phba->sli4_hba.max_cfg_param.xri_base =
7185 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7186 phba->sli4_hba.max_cfg_param.max_vpi =
7187 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7188 phba->sli4_hba.max_cfg_param.vpi_base =
7189 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7190 phba->sli4_hba.max_cfg_param.max_rpi =
7191 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7192 phba->sli4_hba.max_cfg_param.rpi_base =
7193 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7194 phba->sli4_hba.max_cfg_param.max_vfi =
7195 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7196 phba->sli4_hba.max_cfg_param.vfi_base =
7197 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7198 phba->sli4_hba.max_cfg_param.max_fcfi =
7199 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS
7200 phba->sli4_hba.max_cfg_param.max_eq =
7201 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7202 phba->sli4_hba.max_cfg_param.max_rq =
7203 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7204 phba->sli4_hba.max_cfg_param.max_wq =
7205 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7206 phba->sli4_hba.max_cfg_param.max_cq =
7207 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7208 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7209 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7210 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7211 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS
7212 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7213 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS
7214 phba->max_vports = phba->max_vpi;
7215 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS
7216 "2003 cfg params Extents? %d "
7217 "XRI(B:%d M:%d), "
da0436e9
JS
7218 "VPI(B:%d M:%d) "
7219 "VFI(B:%d M:%d) "
7220 "RPI(B:%d M:%d) "
2ea259ee 7221 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7222 phba->sli4_hba.extents_in_use,
da0436e9
JS
7223 phba->sli4_hba.max_cfg_param.xri_base,
7224 phba->sli4_hba.max_cfg_param.max_xri,
7225 phba->sli4_hba.max_cfg_param.vpi_base,
7226 phba->sli4_hba.max_cfg_param.max_vpi,
7227 phba->sli4_hba.max_cfg_param.vfi_base,
7228 phba->sli4_hba.max_cfg_param.max_vfi,
7229 phba->sli4_hba.max_cfg_param.rpi_base,
7230 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS
7231 phba->sli4_hba.max_cfg_param.max_fcfi,
7232 phba->sli4_hba.max_cfg_param.max_eq,
7233 phba->sli4_hba.max_cfg_param.max_cq,
7234 phba->sli4_hba.max_cfg_param.max_wq,
7235 phba->sli4_hba.max_cfg_param.max_rq);
7236
3772a991 7237 }
912e3acd
JS
7238
7239 if (rc)
7240 goto read_cfg_out;
da0436e9 7241
c691816e
JS
7242 /* Update link speed if forced link speed is supported */
7243 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7244 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7245 forced_link_speed =
7246 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7247 if (forced_link_speed) {
7248 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7249
7250 switch (forced_link_speed) {
7251 case LINK_SPEED_1G:
7252 phba->cfg_link_speed =
7253 LPFC_USER_LINK_SPEED_1G;
7254 break;
7255 case LINK_SPEED_2G:
7256 phba->cfg_link_speed =
7257 LPFC_USER_LINK_SPEED_2G;
7258 break;
7259 case LINK_SPEED_4G:
7260 phba->cfg_link_speed =
7261 LPFC_USER_LINK_SPEED_4G;
7262 break;
7263 case LINK_SPEED_8G:
7264 phba->cfg_link_speed =
7265 LPFC_USER_LINK_SPEED_8G;
7266 break;
7267 case LINK_SPEED_10G:
7268 phba->cfg_link_speed =
7269 LPFC_USER_LINK_SPEED_10G;
7270 break;
7271 case LINK_SPEED_16G:
7272 phba->cfg_link_speed =
7273 LPFC_USER_LINK_SPEED_16G;
7274 break;
7275 case LINK_SPEED_32G:
7276 phba->cfg_link_speed =
7277 LPFC_USER_LINK_SPEED_32G;
7278 break;
7279 case 0xffff:
7280 phba->cfg_link_speed =
7281 LPFC_USER_LINK_SPEED_AUTO;
7282 break;
7283 default:
7284 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7285 "0047 Unrecognized link "
7286 "speed : %d\n",
7287 forced_link_speed);
7288 phba->cfg_link_speed =
7289 LPFC_USER_LINK_SPEED_AUTO;
7290 }
7291 }
7292 }
7293
da0436e9 7294 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
7295 length = phba->sli4_hba.max_cfg_param.max_xri -
7296 lpfc_sli4_get_els_iocb_cnt(phba);
7297 if (phba->cfg_hba_queue_depth > length) {
7298 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7299 "3361 HBA queue depth changed from %d to %d\n",
7300 phba->cfg_hba_queue_depth, length);
7301 phba->cfg_hba_queue_depth = length;
7302 }
912e3acd
JS
7303
7304 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7305 LPFC_SLI_INTF_IF_TYPE_2)
7306 goto read_cfg_out;
7307
7308 /* get the pf# and vf# for SLI4 if_type 2 port */
7309 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7310 sizeof(struct lpfc_sli4_cfg_mhdr));
7311 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7312 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7313 length, LPFC_SLI4_MBX_EMBED);
7314
8aa134a8 7315 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS
7316 shdr = (union lpfc_sli4_cfg_shdr *)
7317 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7318 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7319 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7320 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS
7321 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7322 "3026 Mailbox failed , mbxCmd x%x "
7323 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7324 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7325 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS
7326 goto read_cfg_out;
7327 }
7328
7329 /* search for fc_fcoe resrouce descriptor */
7330 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7331
8aa134a8
JS
7332 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7333 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7334 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7335 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7336 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7337 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7338 goto read_cfg_out;
7339
912e3acd 7340 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7341 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7342 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7343 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS
7344 phba->sli4_hba.iov.pf_number =
7345 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7346 phba->sli4_hba.iov.vf_number =
7347 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7348 break;
7349 }
7350 }
7351
7352 if (i < LPFC_RSRC_DESC_MAX_NUM)
7353 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7354 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7355 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7356 phba->sli4_hba.iov.vf_number);
8aa134a8 7357 else
912e3acd
JS
7358 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7359 "3028 GET_FUNCTION_CONFIG: failed to find "
7360 "Resrouce Descriptor:x%x\n",
7361 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS
7362
7363read_cfg_out:
7364 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7365 return rc;
3772a991
JS
7366}
7367
7368/**
2fcee4bf 7369 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS
7370 * @phba: pointer to lpfc hba data structure.
7371 *
2fcee4bf
JS
7372 * This routine is invoked to setup the port-side endian order when
7373 * the port if_type is 0. This routine has no function for other
7374 * if_types.
da0436e9
JS
7375 *
7376 * Return codes
af901ca1 7377 * 0 - successful
25985edc 7378 * -ENOMEM - No available memory
d439d286 7379 * -EIO - The mailbox failed to complete successfully.
3772a991 7380 **/
da0436e9
JS
7381static int
7382lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7383{
da0436e9 7384 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7385 uint32_t if_type, rc = 0;
da0436e9
JS
7386 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7387 HOST_ENDIAN_HIGH_WORD1};
3772a991 7388
2fcee4bf
JS
7389 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7390 switch (if_type) {
7391 case LPFC_SLI_INTF_IF_TYPE_0:
7392 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7393 GFP_KERNEL);
7394 if (!mboxq) {
7395 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7396 "0492 Unable to allocate memory for "
7397 "issuing SLI_CONFIG_SPECIAL mailbox "
7398 "command\n");
7399 return -ENOMEM;
7400 }
3772a991 7401
2fcee4bf
JS
7402 /*
7403 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7404 * two words to contain special data values and no other data.
7405 */
7406 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7407 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7408 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7409 if (rc != MBX_SUCCESS) {
7410 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7411 "0493 SLI_CONFIG_SPECIAL mailbox "
7412 "failed with status x%x\n",
7413 rc);
7414 rc = -EIO;
7415 }
7416 mempool_free(mboxq, phba->mbox_mem_pool);
7417 break;
7418 case LPFC_SLI_INTF_IF_TYPE_2:
7419 case LPFC_SLI_INTF_IF_TYPE_1:
7420 default:
7421 break;
da0436e9 7422 }
da0436e9 7423 return rc;
3772a991
JS
7424}
7425
7426/**
895427bd 7427 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS
7428 * @phba: pointer to lpfc hba data structure.
7429 *
895427bd
JS
7430 * This routine is invoked to check the user settable queue counts for EQs.
7431 * After this routine is called the counts will be set to valid values that
5350d872
JS
7432 * adhere to the constraints of the system's interrupt vectors and the port's
7433 * queue resources.
da0436e9
JS
7434 *
7435 * Return codes
af901ca1 7436 * 0 - successful
25985edc 7437 * -ENOMEM - No available memory
3772a991 7438 **/
da0436e9 7439static int
5350d872 7440lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7441{
895427bd 7442 int io_channel;
1ba981fd 7443 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7444
da0436e9 7445 /*
67d12733 7446 * Sanity check for configured queue parameters against the run-time
da0436e9
JS
7447 * device parameters
7448 */
3772a991 7449
67d12733 7450 /* Sanity check on HBA EQ parameters */
895427bd 7451 io_channel = phba->io_channel_irqs;
67d12733 7452
895427bd 7453 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS
7454 lpfc_printf_log(phba,
7455 KERN_ERR, LOG_INIT,
90695ee0 7456 "3188 Reducing IO channels to match number of "
7bb03bbf 7457 "online CPUs: from %d to %d\n",
895427bd
JS
7458 io_channel, phba->sli4_hba.num_online_cpu);
7459 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS
7460 }
7461
895427bd 7462 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS
7463 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7464 "2575 Reducing IO channels to match number of "
7465 "available EQs: from %d to %d\n",
895427bd 7466 io_channel,
82c3e9ba 7467 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7468 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7469 }
67d12733 7470
895427bd
JS
7471 /* The actual number of FCP / NVME event queues adopted */
7472 if (io_channel != phba->io_channel_irqs)
7473 phba->io_channel_irqs = io_channel;
7474 if (phba->cfg_fcp_io_channel > io_channel)
7475 phba->cfg_fcp_io_channel = io_channel;
7476 if (phba->cfg_nvme_io_channel > io_channel)
7477 phba->cfg_nvme_io_channel = io_channel;
7478
7479 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7480 "2574 IRQs: %d, IO Channels: fcp %d nvme %d\n",
7481 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
7482 phba->cfg_nvme_io_channel);
3772a991 7483
da0436e9
JS
7484 /* Get EQ depth from module parameter, fake the default for now */
7485 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7486 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7487
5350d872
JS
7488 /* Get CQ depth from module parameter, fake the default for now */
7489 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7490 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS
7491 return 0;
7492}
7493
7494static int
7495lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7496{
7497 struct lpfc_queue *qdesc;
7498 int cnt;
5350d872 7499
895427bd
JS
7500 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7501 phba->sli4_hba.cq_ecount);
7502 if (!qdesc) {
7503 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7504 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7505 wqidx);
7506 return 1;
7507 }
7508 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
7509
7510 cnt = LPFC_NVME_WQSIZE;
7511 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_WQE128_SIZE, cnt);
7512 if (!qdesc) {
7513 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7514 "0509 Failed allocate fast-path NVME WQ (%d)\n",
7515 wqidx);
7516 return 1;
7517 }
7518 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
7519 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7520 return 0;
7521}
7522
7523static int
7524lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
7525{
7526 struct lpfc_queue *qdesc;
7527 uint32_t wqesize;
7528
7529 /* Create Fast Path FCP CQs */
7530 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7531 phba->sli4_hba.cq_ecount);
7532 if (!qdesc) {
7533 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7534 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
7535 return 1;
7536 }
7537 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
7538
7539 /* Create Fast Path FCP WQs */
7540 wqesize = (phba->fcp_embed_io) ?
7541 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
7542 qdesc = lpfc_sli4_queue_alloc(phba, wqesize, phba->sli4_hba.wq_ecount);
7543 if (!qdesc) {
7544 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7545 "0503 Failed allocate fast-path FCP WQ (%d)\n",
7546 wqidx);
7547 return 1;
7548 }
7549 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
7550 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 7551 return 0;
5350d872
JS
7552}
7553
7554/**
7555 * lpfc_sli4_queue_create - Create all the SLI4 queues
7556 * @phba: pointer to lpfc hba data structure.
7557 *
7558 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
7559 * operation. For each SLI4 queue type, the parameters such as queue entry
7560 * count (queue depth) shall be taken from the module parameter. For now,
7561 * we just use some constant number as place holder.
7562 *
7563 * Return codes
4907cb7b 7564 * 0 - successful
5350d872
JS
7565 * -ENOMEM - No availble memory
7566 * -EIO - The mailbox failed to complete successfully.
7567 **/
7568int
7569lpfc_sli4_queue_create(struct lpfc_hba *phba)
7570{
7571 struct lpfc_queue *qdesc;
895427bd 7572 int idx, io_channel;
5350d872
JS
7573
7574 /*
67d12733 7575 * Create HBA Record arrays.
895427bd 7576 * Both NVME and FCP will share that same vectors / EQs
5350d872 7577 */
895427bd
JS
7578 io_channel = phba->io_channel_irqs;
7579 if (!io_channel)
67d12733 7580 return -ERANGE;
5350d872 7581
67d12733
JS
7582 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
7583 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
7584 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
7585 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
7586 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
7587 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS
7588 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7589 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
7590 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7591 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 7592
895427bd
JS
7593 phba->sli4_hba.hba_eq = kcalloc(io_channel,
7594 sizeof(struct lpfc_queue *),
7595 GFP_KERNEL);
67d12733
JS
7596 if (!phba->sli4_hba.hba_eq) {
7597 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7598 "2576 Failed allocate memory for "
7599 "fast-path EQ record array\n");
7600 goto out_error;
7601 }
7602
895427bd
JS
7603 if (phba->cfg_fcp_io_channel) {
7604 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
7605 sizeof(struct lpfc_queue *),
7606 GFP_KERNEL);
7607 if (!phba->sli4_hba.fcp_cq) {
7608 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7609 "2577 Failed allocate memory for "
7610 "fast-path CQ record array\n");
7611 goto out_error;
7612 }
7613 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
7614 sizeof(struct lpfc_queue *),
7615 GFP_KERNEL);
7616 if (!phba->sli4_hba.fcp_wq) {
7617 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7618 "2578 Failed allocate memory for "
7619 "fast-path FCP WQ record array\n");
7620 goto out_error;
7621 }
7622 /*
7623 * Since the first EQ can have multiple CQs associated with it,
7624 * this array is used to quickly see if we have a FCP fast-path
7625 * CQ match.
7626 */
7627 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
7628 sizeof(uint16_t),
7629 GFP_KERNEL);
7630 if (!phba->sli4_hba.fcp_cq_map) {
7631 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7632 "2545 Failed allocate memory for "
7633 "fast-path CQ map\n");
7634 goto out_error;
7635 }
67d12733
JS
7636 }
7637
895427bd
JS
7638 if (phba->cfg_nvme_io_channel) {
7639 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
7640 sizeof(struct lpfc_queue *),
7641 GFP_KERNEL);
7642 if (!phba->sli4_hba.nvme_cq) {
7643 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7644 "6077 Failed allocate memory for "
7645 "fast-path CQ record array\n");
7646 goto out_error;
7647 }
da0436e9 7648
895427bd
JS
7649
7650 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
7651 sizeof(struct lpfc_queue *),
7652 GFP_KERNEL);
7653 if (!phba->sli4_hba.nvme_wq) {
7654 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7655 "2581 Failed allocate memory for "
7656 "fast-path NVME WQ record array\n");
7657 goto out_error;
7658 }
7659
7660 /*
7661 * Since the first EQ can have multiple CQs associated with it,
7662 * this array is used to quickly see if we have a NVME fast-path
7663 * CQ match.
7664 */
7665 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
7666 sizeof(uint16_t),
7667 GFP_KERNEL);
7668 if (!phba->sli4_hba.nvme_cq_map) {
7669 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7670 "6078 Failed allocate memory for "
7671 "fast-path CQ map\n");
7672 goto out_error;
7673 }
da0436e9 7674 }
67d12733 7675
895427bd 7676 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 7677
895427bd
JS
7678 /* Create HBA Event Queues (EQs) */
7679 for (idx = 0; idx < io_channel; idx++) {
67d12733 7680 /* Create EQs */
da0436e9
JS
7681 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
7682 phba->sli4_hba.eq_ecount);
7683 if (!qdesc) {
7684 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS
7685 "0497 Failed allocate EQ (%d)\n", idx);
7686 goto out_error;
da0436e9 7687 }
67d12733 7688 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 7689 }
67d12733 7690
895427bd 7691 /* FCP and NVME io channels are not required to be balanced */
67d12733 7692
895427bd
JS
7693 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
7694 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 7695 goto out_error;
da0436e9 7696
895427bd
JS
7697 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
7698 if (lpfc_alloc_nvme_wq_cq(phba, idx))
7699 goto out_error;
67d12733 7700
da0436e9 7701 /*
67d12733 7702 * Create Slow Path Completion Queues (CQs)
da0436e9
JS
7703 */
7704
da0436e9
JS
7705 /* Create slow-path Mailbox Command Complete Queue */
7706 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7707 phba->sli4_hba.cq_ecount);
7708 if (!qdesc) {
7709 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7710 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 7711 goto out_error;
da0436e9
JS
7712 }
7713 phba->sli4_hba.mbx_cq = qdesc;
7714
7715 /* Create slow-path ELS Complete Queue */
7716 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7717 phba->sli4_hba.cq_ecount);
7718 if (!qdesc) {
7719 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7720 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 7721 goto out_error;
da0436e9
JS
7722 }
7723 phba->sli4_hba.els_cq = qdesc;
7724
da0436e9 7725
5350d872 7726 /*
67d12733 7727 * Create Slow Path Work Queues (WQs)
5350d872 7728 */
da0436e9
JS
7729
7730 /* Create Mailbox Command Queue */
da0436e9
JS
7731
7732 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.mq_esize,
7733 phba->sli4_hba.mq_ecount);
7734 if (!qdesc) {
7735 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7736 "0505 Failed allocate slow-path MQ\n");
67d12733 7737 goto out_error;
da0436e9
JS
7738 }
7739 phba->sli4_hba.mbx_wq = qdesc;
7740
7741 /*
67d12733 7742 * Create ELS Work Queues
da0436e9 7743 */
da0436e9
JS
7744
7745 /* Create slow-path ELS Work Queue */
7746 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
7747 phba->sli4_hba.wq_ecount);
7748 if (!qdesc) {
7749 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7750 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 7751 goto out_error;
da0436e9
JS
7752 }
7753 phba->sli4_hba.els_wq = qdesc;
895427bd
JS
7754 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7755
7756 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
7757 /* Create NVME LS Complete Queue */
7758 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7759 phba->sli4_hba.cq_ecount);
7760 if (!qdesc) {
7761 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7762 "6079 Failed allocate NVME LS CQ\n");
7763 goto out_error;
7764 }
7765 phba->sli4_hba.nvmels_cq = qdesc;
7766
7767 /* Create NVME LS Work Queue */
7768 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
7769 phba->sli4_hba.wq_ecount);
7770 if (!qdesc) {
7771 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7772 "6080 Failed allocate NVME LS WQ\n");
7773 goto out_error;
7774 }
7775 phba->sli4_hba.nvmels_wq = qdesc;
7776 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7777 }
da0436e9 7778
da0436e9
JS
7779 /*
7780 * Create Receive Queue (RQ)
7781 */
da0436e9
JS
7782
7783 /* Create Receive Queue for header */
7784 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
7785 phba->sli4_hba.rq_ecount);
7786 if (!qdesc) {
7787 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7788 "0506 Failed allocate receive HRQ\n");
67d12733 7789 goto out_error;
da0436e9
JS
7790 }
7791 phba->sli4_hba.hdr_rq = qdesc;
7792
7793 /* Create Receive Queue for data */
7794 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
7795 phba->sli4_hba.rq_ecount);
7796 if (!qdesc) {
7797 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7798 "0507 Failed allocate receive DRQ\n");
67d12733 7799 goto out_error;
da0436e9
JS
7800 }
7801 phba->sli4_hba.dat_rq = qdesc;
7802
1ba981fd
JS
7803 /* Create the Queues needed for Flash Optimized Fabric operations */
7804 if (phba->cfg_fof)
7805 lpfc_fof_queue_create(phba);
da0436e9
JS
7806 return 0;
7807
da0436e9 7808out_error:
67d12733 7809 lpfc_sli4_queue_destroy(phba);
da0436e9
JS
7810 return -ENOMEM;
7811}
7812
895427bd
JS
7813static inline void
7814__lpfc_sli4_release_queue(struct lpfc_queue **qp)
7815{
7816 if (*qp != NULL) {
7817 lpfc_sli4_queue_free(*qp);
7818 *qp = NULL;
7819 }
7820}
7821
7822static inline void
7823lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
7824{
7825 int idx;
7826
7827 if (*qs == NULL)
7828 return;
7829
7830 for (idx = 0; idx < max; idx++)
7831 __lpfc_sli4_release_queue(&(*qs)[idx]);
7832
7833 kfree(*qs);
7834 *qs = NULL;
7835}
7836
7837static inline void
7838lpfc_sli4_release_queue_map(uint16_t **qmap)
7839{
7840 if (*qmap != NULL) {
7841 kfree(*qmap);
7842 *qmap = NULL;
7843 }
7844}
7845
da0436e9
JS
7846/**
7847 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
7848 * @phba: pointer to lpfc hba data structure.
7849 *
7850 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
7851 * operation.
7852 *
7853 * Return codes
af901ca1 7854 * 0 - successful
25985edc 7855 * -ENOMEM - No available memory
d439d286 7856 * -EIO - The mailbox failed to complete successfully.
da0436e9 7857 **/
5350d872 7858void
da0436e9
JS
7859lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
7860{
1ba981fd
JS
7861 if (phba->cfg_fof)
7862 lpfc_fof_queue_destroy(phba);
7863
895427bd
JS
7864 /* Release HBA eqs */
7865 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
7866
7867 /* Release FCP cqs */
7868 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
7869 phba->cfg_fcp_io_channel);
7870
7871 /* Release FCP wqs */
7872 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
7873 phba->cfg_fcp_io_channel);
7874
7875 /* Release FCP CQ mapping array */
7876 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
7877
7878 /* Release NVME cqs */
7879 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
7880 phba->cfg_nvme_io_channel);
7881
7882 /* Release NVME wqs */
7883 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
7884 phba->cfg_nvme_io_channel);
7885
7886 /* Release NVME CQ mapping array */
7887 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
7888
7889 /* Release mailbox command work queue */
7890 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
7891
7892 /* Release ELS work queue */
7893 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
7894
7895 /* Release ELS work queue */
7896 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
7897
7898 /* Release unsolicited receive queue */
7899 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
7900 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
7901
7902 /* Release ELS complete queue */
7903 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
7904
7905 /* Release NVME LS complete queue */
7906 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
7907
7908 /* Release mailbox command complete queue */
7909 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
7910
7911 /* Everything on this list has been freed */
7912 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
7913}
7914
7915int
7916lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
7917 struct lpfc_queue *drq, int count)
7918{
7919 int rc, i;
7920 struct lpfc_rqe hrqe;
7921 struct lpfc_rqe drqe;
7922 struct lpfc_rqb *rqbp;
7923 struct rqb_dmabuf *rqb_buffer;
7924 LIST_HEAD(rqb_buf_list);
7925
7926 rqbp = hrq->rqbp;
7927 for (i = 0; i < count; i++) {
7928 rqb_buffer = (rqbp->rqb_alloc_buffer)(phba);
7929 if (!rqb_buffer)
7930 break;
7931 rqb_buffer->hrq = hrq;
7932 rqb_buffer->drq = drq;
7933 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
7934 }
7935 while (!list_empty(&rqb_buf_list)) {
7936 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
7937 hbuf.list);
7938
7939 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
7940 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
7941 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
7942 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
7943 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
7944 if (rc < 0) {
7945 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
7946 } else {
7947 list_add_tail(&rqb_buffer->hbuf.list,
7948 &rqbp->rqb_buffer_list);
7949 rqbp->buffer_count++;
67d12733 7950 }
67d12733 7951 }
895427bd
JS
7952 return 1;
7953}
67d12733 7954
895427bd
JS
7955int
7956lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
7957{
7958 struct lpfc_rqb *rqbp;
7959 struct lpfc_dmabuf *h_buf;
7960 struct rqb_dmabuf *rqb_buffer;
7961
7962 rqbp = rq->rqbp;
7963 while (!list_empty(&rqbp->rqb_buffer_list)) {
7964 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
7965 struct lpfc_dmabuf, list);
7966
7967 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
7968 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
7969 rqbp->buffer_count--;
67d12733 7970 }
895427bd
JS
7971 return 1;
7972}
67d12733 7973
895427bd
JS
7974static int
7975lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
7976 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
7977 int qidx, uint32_t qtype)
7978{
7979 struct lpfc_sli_ring *pring;
7980 int rc;
7981
7982 if (!eq || !cq || !wq) {
7983 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7984 "6085 Fast-path %s (%d) not allocated\n",
7985 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
7986 return -ENOMEM;
7987 }
7988
7989 /* create the Cq first */
7990 rc = lpfc_cq_create(phba, cq, eq,
7991 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
7992 if (rc) {
7993 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7994 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
7995 qidx, (uint32_t)rc);
7996 return rc;
67d12733
JS
7997 }
7998
895427bd
JS
7999 if (qtype != LPFC_MBOX) {
8000 /* Setup nvme_cq_map for fast lookup */
8001 if (cq_map)
8002 *cq_map = cq->queue_id;
da0436e9 8003
895427bd
JS
8004 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8005 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8006 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8007
895427bd
JS
8008 /* create the wq */
8009 rc = lpfc_wq_create(phba, wq, cq, qtype);
8010 if (rc) {
8011 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8012 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8013 qidx, (uint32_t)rc);
8014 /* no need to tear down cq - caller will do so */
8015 return rc;
8016 }
da0436e9 8017
895427bd
JS
8018 /* Bind this CQ/WQ to the NVME ring */
8019 pring = wq->pring;
8020 pring->sli.sli4.wqp = (void *)wq;
8021 cq->pring = pring;
da0436e9 8022
895427bd
JS
8023 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8024 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8025 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8026 } else {
8027 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8028 if (rc) {
8029 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8030 "0539 Failed setup of slow-path MQ: "
8031 "rc = 0x%x\n", rc);
8032 /* no need to tear down cq - caller will do so */
8033 return rc;
8034 }
da0436e9 8035
895427bd
JS
8036 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8037 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8038 phba->sli4_hba.mbx_wq->queue_id,
8039 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8040 }
da0436e9 8041
895427bd 8042 return 0;
da0436e9
JS
8043}
8044
8045/**
8046 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8047 * @phba: pointer to lpfc hba data structure.
8048 *
8049 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8050 * operation.
8051 *
8052 * Return codes
af901ca1 8053 * 0 - successful
25985edc 8054 * -ENOMEM - No available memory
d439d286 8055 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8056 **/
8057int
8058lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8059{
962bc51b
JS
8060 uint32_t shdr_status, shdr_add_status;
8061 union lpfc_sli4_cfg_shdr *shdr;
8062 LPFC_MBOXQ_t *mboxq;
895427bd
JS
8063 int qidx;
8064 uint32_t length, io_channel;
8065 int rc = -ENOMEM;
962bc51b
JS
8066
8067 /* Check for dual-ULP support */
8068 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8069 if (!mboxq) {
8070 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8071 "3249 Unable to allocate memory for "
8072 "QUERY_FW_CFG mailbox command\n");
8073 return -ENOMEM;
8074 }
8075 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8076 sizeof(struct lpfc_sli4_cfg_mhdr));
8077 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8078 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8079 length, LPFC_SLI4_MBX_EMBED);
8080
8081 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8082
8083 shdr = (union lpfc_sli4_cfg_shdr *)
8084 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8085 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8086 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8087 if (shdr_status || shdr_add_status || rc) {
8088 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8089 "3250 QUERY_FW_CFG mailbox failed with status "
8090 "x%x add_status x%x, mbx status x%x\n",
8091 shdr_status, shdr_add_status, rc);
8092 if (rc != MBX_TIMEOUT)
8093 mempool_free(mboxq, phba->mbox_mem_pool);
8094 rc = -ENXIO;
8095 goto out_error;
8096 }
8097
8098 phba->sli4_hba.fw_func_mode =
8099 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8100 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8101 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS
8102 phba->sli4_hba.physical_port =
8103 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS
8104 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8105 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8106 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8107 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8108
8109 if (rc != MBX_TIMEOUT)
8110 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS
8111
8112 /*
67d12733 8113 * Set up HBA Event Queues (EQs)
da0436e9 8114 */
895427bd 8115 io_channel = phba->io_channel_irqs;
da0436e9 8116
67d12733 8117 /* Set up HBA event queue */
895427bd 8118 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS
8119 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8120 "3147 Fast-path EQs not allocated\n");
1b51197d 8121 rc = -ENOMEM;
67d12733 8122 goto out_error;
2e90f4b5 8123 }
895427bd
JS
8124 for (qidx = 0; qidx < io_channel; qidx++) {
8125 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS
8126 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8127 "0522 Fast-path EQ (%d) not "
895427bd 8128 "allocated\n", qidx);
1b51197d 8129 rc = -ENOMEM;
895427bd 8130 goto out_destroy;
da0436e9 8131 }
895427bd
JS
8132 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8133 phba->cfg_fcp_imax);
da0436e9
JS
8134 if (rc) {
8135 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8136 "0523 Failed setup of fast-path EQ "
895427bd 8137 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8138 (uint32_t)rc);
895427bd 8139 goto out_destroy;
da0436e9
JS
8140 }
8141 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS
8142 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8143 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS
8144 }
8145
895427bd
JS
8146 if (phba->cfg_nvme_io_channel) {
8147 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8148 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8149 "6084 Fast-path NVME %s array not allocated\n",
8150 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8151 rc = -ENOMEM;
895427bd 8152 goto out_destroy;
67d12733
JS
8153 }
8154
895427bd
JS
8155 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8156 rc = lpfc_create_wq_cq(phba,
8157 phba->sli4_hba.hba_eq[
8158 qidx % io_channel],
8159 phba->sli4_hba.nvme_cq[qidx],
8160 phba->sli4_hba.nvme_wq[qidx],
8161 &phba->sli4_hba.nvme_cq_map[qidx],
8162 qidx, LPFC_NVME);
8163 if (rc) {
8164 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8165 "6123 Failed to setup fastpath "
8166 "NVME WQ/CQ (%d), rc = 0x%x\n",
8167 qidx, (uint32_t)rc);
8168 goto out_destroy;
8169 }
8170 }
67d12733
JS
8171 }
8172
895427bd
JS
8173 if (phba->cfg_fcp_io_channel) {
8174 /* Set up fast-path FCP Response Complete Queue */
8175 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8176 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8177 "3148 Fast-path FCP %s array not allocated\n",
8178 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8179 rc = -ENOMEM;
895427bd 8180 goto out_destroy;
67d12733
JS
8181 }
8182
895427bd
JS
8183 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8184 rc = lpfc_create_wq_cq(phba,
8185 phba->sli4_hba.hba_eq[
8186 qidx % io_channel],
8187 phba->sli4_hba.fcp_cq[qidx],
8188 phba->sli4_hba.fcp_wq[qidx],
8189 &phba->sli4_hba.fcp_cq_map[qidx],
8190 qidx, LPFC_FCP);
8191 if (rc) {
8192 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8193 "0535 Failed to setup fastpath "
8194 "FCP WQ/CQ (%d), rc = 0x%x\n",
8195 qidx, (uint32_t)rc);
8196 goto out_destroy;
8197 }
8198 }
67d12733 8199 }
895427bd 8200
da0436e9 8201 /*
895427bd 8202 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS
8203 */
8204
895427bd 8205 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8206
895427bd 8207 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8208 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8209 "0528 %s not allocated\n",
8210 phba->sli4_hba.mbx_cq ?
8211 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8212 rc = -ENOMEM;
895427bd 8213 goto out_destroy;
da0436e9 8214 }
da0436e9 8215
895427bd
JS
8216 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8217 phba->sli4_hba.mbx_cq,
8218 phba->sli4_hba.mbx_wq,
8219 NULL, 0, LPFC_MBOX);
da0436e9
JS
8220 if (rc) {
8221 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8222 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8223 (uint32_t)rc);
8224 goto out_destroy;
da0436e9 8225 }
da0436e9 8226
895427bd
JS
8227 /* Set up slow-path ELS WQ/CQ */
8228 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8229 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8230 "0530 ELS %s not allocated\n",
8231 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8232 rc = -ENOMEM;
895427bd 8233 goto out_destroy;
da0436e9 8234 }
895427bd
JS
8235 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8236 phba->sli4_hba.els_cq,
8237 phba->sli4_hba.els_wq,
8238 NULL, 0, LPFC_ELS);
da0436e9
JS
8239 if (rc) {
8240 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8241 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8242 (uint32_t)rc);
8243 goto out_destroy;
da0436e9
JS
8244 }
8245 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8246 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8247 phba->sli4_hba.els_wq->queue_id,
8248 phba->sli4_hba.els_cq->queue_id);
8249
895427bd
JS
8250 if (phba->cfg_nvme_io_channel) {
8251 /* Set up NVME LS Complete Queue */
8252 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8253 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8254 "6091 LS %s not allocated\n",
8255 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8256 rc = -ENOMEM;
8257 goto out_destroy;
8258 }
8259 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8260 phba->sli4_hba.nvmels_cq,
8261 phba->sli4_hba.nvmels_wq,
8262 NULL, 0, LPFC_NVME_LS);
8263 if (rc) {
8264 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8265 "0529 Failed setup of NVVME LS WQ/CQ: "
8266 "rc = 0x%x\n", (uint32_t)rc);
8267 goto out_destroy;
8268 }
8269
8270 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8271 "6096 ELS WQ setup: wq-id=%d, "
8272 "parent cq-id=%d\n",
8273 phba->sli4_hba.nvmels_wq->queue_id,
8274 phba->sli4_hba.nvmels_cq->queue_id);
8275 }
8276
da0436e9
JS
8277 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8278 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8279 "0540 Receive Queue not allocated\n");
1b51197d 8280 rc = -ENOMEM;
895427bd 8281 goto out_destroy;
da0436e9 8282 }
73d91e50
JS
8283
8284 lpfc_rq_adjust_repost(phba, phba->sli4_hba.hdr_rq, LPFC_ELS_HBQ);
8285 lpfc_rq_adjust_repost(phba, phba->sli4_hba.dat_rq, LPFC_ELS_HBQ);
8286
da0436e9 8287 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8288 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS
8289 if (rc) {
8290 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8291 "0541 Failed setup of Receive Queue: "
a2fc4aef 8292 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8293 goto out_destroy;
da0436e9 8294 }
73d91e50 8295
da0436e9
JS
8296 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8297 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8298 "parent cq-id=%d\n",
8299 phba->sli4_hba.hdr_rq->queue_id,
8300 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8301 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS
8302
8303 if (phba->cfg_fof) {
8304 rc = lpfc_fof_queue_setup(phba);
8305 if (rc) {
8306 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8307 "0549 Failed setup of FOF Queues: "
8308 "rc = 0x%x\n", rc);
895427bd 8309 goto out_destroy;
1ba981fd
JS
8310 }
8311 }
2c9c5a00
JS
8312
8313 /*
8314 * Configure EQ delay multipier for interrupt coalescing using
8315 * MODIFY_EQ_DELAY for all EQs created, LPFC_MAX_EQ_DELAY at a time.
8316 */
895427bd
JS
8317 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY)
8318 lpfc_modify_hba_eq_delay(phba, qidx);
da0436e9
JS
8319 return 0;
8320
895427bd
JS
8321out_destroy:
8322 lpfc_sli4_queue_unset(phba);
da0436e9
JS
8323out_error:
8324 return rc;
8325}
8326
8327/**
8328 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8329 * @phba: pointer to lpfc hba data structure.
8330 *
8331 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8332 * operation.
8333 *
8334 * Return codes
af901ca1 8335 * 0 - successful
25985edc 8336 * -ENOMEM - No available memory
d439d286 8337 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8338 **/
8339void
8340lpfc_sli4_queue_unset(struct lpfc_hba *phba)
8341{
895427bd 8342 int qidx;
da0436e9 8343
1ba981fd
JS
8344 /* Unset the queues created for Flash Optimized Fabric operations */
8345 if (phba->cfg_fof)
8346 lpfc_fof_queue_destroy(phba);
895427bd 8347
da0436e9 8348 /* Unset mailbox command work queue */
895427bd
JS
8349 if (phba->sli4_hba.mbx_wq)
8350 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
8351
8352 /* Unset NVME LS work queue */
8353 if (phba->sli4_hba.nvmels_wq)
8354 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
8355
da0436e9 8356 /* Unset ELS work queue */
895427bd
JS
8357 if (phba->sli4_hba.els_cq)
8358 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
8359
da0436e9 8360 /* Unset unsolicited receive queue */
895427bd
JS
8361 if (phba->sli4_hba.hdr_rq)
8362 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
8363 phba->sli4_hba.dat_rq);
8364
da0436e9 8365 /* Unset FCP work queue */
895427bd
JS
8366 if (phba->sli4_hba.fcp_wq)
8367 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8368 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
8369
8370 /* Unset NVME work queue */
8371 if (phba->sli4_hba.nvme_wq) {
8372 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8373 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 8374 }
895427bd 8375
da0436e9 8376 /* Unset mailbox command complete queue */
895427bd
JS
8377 if (phba->sli4_hba.mbx_cq)
8378 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
8379
da0436e9 8380 /* Unset ELS complete queue */
895427bd
JS
8381 if (phba->sli4_hba.els_cq)
8382 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
8383
8384 /* Unset NVME LS complete queue */
8385 if (phba->sli4_hba.nvmels_cq)
8386 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
8387
8388 /* Unset NVME response complete queue */
8389 if (phba->sli4_hba.nvme_cq)
8390 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8391 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
8392
da0436e9 8393 /* Unset FCP response complete queue */
895427bd
JS
8394 if (phba->sli4_hba.fcp_cq)
8395 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8396 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
8397
da0436e9 8398 /* Unset fast-path event queue */
895427bd
JS
8399 if (phba->sli4_hba.hba_eq)
8400 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
8401 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS
8402}
8403
8404/**
8405 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
8406 * @phba: pointer to lpfc hba data structure.
8407 *
8408 * This routine is invoked to allocate and set up a pool of completion queue
8409 * events. The body of the completion queue event is a completion queue entry
8410 * CQE. For now, this pool is used for the interrupt service routine to queue
8411 * the following HBA completion queue events for the worker thread to process:
8412 * - Mailbox asynchronous events
8413 * - Receive queue completion unsolicited events
8414 * Later, this can be used for all the slow-path events.
8415 *
8416 * Return codes
af901ca1 8417 * 0 - successful
25985edc 8418 * -ENOMEM - No available memory
da0436e9
JS
8419 **/
8420static int
8421lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
8422{
8423 struct lpfc_cq_event *cq_event;
8424 int i;
8425
8426 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
8427 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
8428 if (!cq_event)
8429 goto out_pool_create_fail;
8430 list_add_tail(&cq_event->list,
8431 &phba->sli4_hba.sp_cqe_event_pool);
8432 }
8433 return 0;
8434
8435out_pool_create_fail:
8436 lpfc_sli4_cq_event_pool_destroy(phba);
8437 return -ENOMEM;
8438}
8439
8440/**
8441 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
8442 * @phba: pointer to lpfc hba data structure.
8443 *
8444 * This routine is invoked to free the pool of completion queue events at
8445 * driver unload time. Note that, it is the responsibility of the driver
8446 * cleanup routine to free all the outstanding completion-queue events
8447 * allocated from this pool back into the pool before invoking this routine
8448 * to destroy the pool.
8449 **/
8450static void
8451lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
8452{
8453 struct lpfc_cq_event *cq_event, *next_cq_event;
8454
8455 list_for_each_entry_safe(cq_event, next_cq_event,
8456 &phba->sli4_hba.sp_cqe_event_pool, list) {
8457 list_del(&cq_event->list);
8458 kfree(cq_event);
8459 }
8460}
8461
8462/**
8463 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
8464 * @phba: pointer to lpfc hba data structure.
8465 *
8466 * This routine is the lock free version of the API invoked to allocate a
8467 * completion-queue event from the free pool.
8468 *
8469 * Return: Pointer to the newly allocated completion-queue event if successful
8470 * NULL otherwise.
8471 **/
8472struct lpfc_cq_event *
8473__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8474{
8475 struct lpfc_cq_event *cq_event = NULL;
8476
8477 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
8478 struct lpfc_cq_event, list);
8479 return cq_event;
8480}
8481
8482/**
8483 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
8484 * @phba: pointer to lpfc hba data structure.
8485 *
8486 * This routine is the lock version of the API invoked to allocate a
8487 * completion-queue event from the free pool.
8488 *
8489 * Return: Pointer to the newly allocated completion-queue event if successful
8490 * NULL otherwise.
8491 **/
8492struct lpfc_cq_event *
8493lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8494{
8495 struct lpfc_cq_event *cq_event;
8496 unsigned long iflags;
8497
8498 spin_lock_irqsave(&phba->hbalock, iflags);
8499 cq_event = __lpfc_sli4_cq_event_alloc(phba);
8500 spin_unlock_irqrestore(&phba->hbalock, iflags);
8501 return cq_event;
8502}
8503
8504/**
8505 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
8506 * @phba: pointer to lpfc hba data structure.
8507 * @cq_event: pointer to the completion queue event to be freed.
8508 *
8509 * This routine is the lock free version of the API invoked to release a
8510 * completion-queue event back into the free pool.
8511 **/
8512void
8513__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8514 struct lpfc_cq_event *cq_event)
8515{
8516 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
8517}
8518
8519/**
8520 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
8521 * @phba: pointer to lpfc hba data structure.
8522 * @cq_event: pointer to the completion queue event to be freed.
8523 *
8524 * This routine is the lock version of the API invoked to release a
8525 * completion-queue event back into the free pool.
8526 **/
8527void
8528lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8529 struct lpfc_cq_event *cq_event)
8530{
8531 unsigned long iflags;
8532 spin_lock_irqsave(&phba->hbalock, iflags);
8533 __lpfc_sli4_cq_event_release(phba, cq_event);
8534 spin_unlock_irqrestore(&phba->hbalock, iflags);
8535}
8536
8537/**
8538 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
8539 * @phba: pointer to lpfc hba data structure.
8540 *
8541 * This routine is to free all the pending completion-queue events to the
8542 * back into the free pool for device reset.
8543 **/
8544static void
8545lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
8546{
8547 LIST_HEAD(cqelist);
8548 struct lpfc_cq_event *cqe;
8549 unsigned long iflags;
8550
8551 /* Retrieve all the pending WCQEs from pending WCQE lists */
8552 spin_lock_irqsave(&phba->hbalock, iflags);
8553 /* Pending FCP XRI abort events */
8554 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
8555 &cqelist);
8556 /* Pending ELS XRI abort events */
8557 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
8558 &cqelist);
8559 /* Pending asynnc events */
8560 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
8561 &cqelist);
8562 spin_unlock_irqrestore(&phba->hbalock, iflags);
8563
8564 while (!list_empty(&cqelist)) {
8565 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
8566 lpfc_sli4_cq_event_release(phba, cqe);
8567 }
8568}
8569
8570/**
8571 * lpfc_pci_function_reset - Reset pci function.
8572 * @phba: pointer to lpfc hba data structure.
8573 *
8574 * This routine is invoked to request a PCI function reset. It will destroys
8575 * all resources assigned to the PCI function which originates this request.
8576 *
8577 * Return codes
af901ca1 8578 * 0 - successful
25985edc 8579 * -ENOMEM - No available memory
d439d286 8580 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8581 **/
8582int
8583lpfc_pci_function_reset(struct lpfc_hba *phba)
8584{
8585 LPFC_MBOXQ_t *mboxq;
2fcee4bf 8586 uint32_t rc = 0, if_type;
da0436e9 8587 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS
8588 uint32_t rdy_chk;
8589 uint32_t port_reset = 0;
da0436e9 8590 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 8591 struct lpfc_register reg_data;
2b81f942 8592 uint16_t devid;
da0436e9 8593
2fcee4bf
JS
8594 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
8595 switch (if_type) {
8596 case LPFC_SLI_INTF_IF_TYPE_0:
8597 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
8598 GFP_KERNEL);
8599 if (!mboxq) {
8600 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8601 "0494 Unable to allocate memory for "
8602 "issuing SLI_FUNCTION_RESET mailbox "
8603 "command\n");
8604 return -ENOMEM;
8605 }
da0436e9 8606
2fcee4bf
JS
8607 /* Setup PCI function reset mailbox-ioctl command */
8608 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8609 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
8610 LPFC_SLI4_MBX_EMBED);
8611 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8612 shdr = (union lpfc_sli4_cfg_shdr *)
8613 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8614 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8615 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
8616 &shdr->response);
8617 if (rc != MBX_TIMEOUT)
8618 mempool_free(mboxq, phba->mbox_mem_pool);
8619 if (shdr_status || shdr_add_status || rc) {
8620 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8621 "0495 SLI_FUNCTION_RESET mailbox "
8622 "failed with status x%x add_status x%x,"
8623 " mbx status x%x\n",
8624 shdr_status, shdr_add_status, rc);
8625 rc = -ENXIO;
8626 }
8627 break;
8628 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS
8629wait:
8630 /*
8631 * Poll the Port Status Register and wait for RDY for
8632 * up to 30 seconds. If the port doesn't respond, treat
8633 * it as an error.
8634 */
77d093fb 8635 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS
8636 if (lpfc_readl(phba->sli4_hba.u.if_type2.
8637 STATUSregaddr, &reg_data.word0)) {
8638 rc = -ENODEV;
8639 goto out;
8640 }
8641 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
8642 break;
8643 msleep(20);
8644 }
8645
8646 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
8647 phba->work_status[0] = readl(
8648 phba->sli4_hba.u.if_type2.ERR1regaddr);
8649 phba->work_status[1] = readl(
8650 phba->sli4_hba.u.if_type2.ERR2regaddr);
8651 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8652 "2890 Port not ready, port status reg "
8653 "0x%x error 1=0x%x, error 2=0x%x\n",
8654 reg_data.word0,
8655 phba->work_status[0],
8656 phba->work_status[1]);
8657 rc = -ENODEV;
8658 goto out;
8659 }
8660
8661 if (!port_reset) {
8662 /*
8663 * Reset the port now
8664 */
2fcee4bf
JS
8665 reg_data.word0 = 0;
8666 bf_set(lpfc_sliport_ctrl_end, &reg_data,
8667 LPFC_SLIPORT_LITTLE_ENDIAN);
8668 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
8669 LPFC_SLIPORT_INIT_PORT);
8670 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
8671 CTRLregaddr);
8fcb8acd 8672 /* flush */
2b81f942
JS
8673 pci_read_config_word(phba->pcidev,
8674 PCI_DEVICE_ID, &devid);
2fcee4bf 8675
2f6fa2c9
JS
8676 port_reset = 1;
8677 msleep(20);
8678 goto wait;
8679 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
8680 rc = -ENODEV;
8681 goto out;
2fcee4bf
JS
8682 }
8683 break;
2f6fa2c9 8684
2fcee4bf
JS
8685 case LPFC_SLI_INTF_IF_TYPE_1:
8686 default:
8687 break;
da0436e9 8688 }
2fcee4bf 8689
73d91e50 8690out:
2fcee4bf 8691 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 8692 if (rc) {
229adb0e
JS
8693 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8694 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 8695 "try: echo fw_reset > board_mode\n");
2fcee4bf 8696 rc = -ENODEV;
229adb0e 8697 }
2fcee4bf 8698
da0436e9
JS
8699 return rc;
8700}
8701
da0436e9
JS
8702/**
8703 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
8704 * @phba: pointer to lpfc hba data structure.
8705 *
8706 * This routine is invoked to set up the PCI device memory space for device
8707 * with SLI-4 interface spec.
8708 *
8709 * Return codes
af901ca1 8710 * 0 - successful
da0436e9
JS
8711 * other values - error
8712 **/
8713static int
8714lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
8715{
8716 struct pci_dev *pdev;
8717 unsigned long bar0map_len, bar1map_len, bar2map_len;
8718 int error = -ENODEV;
2fcee4bf 8719 uint32_t if_type;
da0436e9
JS
8720
8721 /* Obtain PCI device reference */
8722 if (!phba->pcidev)
8723 return error;
8724 else
8725 pdev = phba->pcidev;
8726
8727 /* Set the device DMA mask size */
8e68597d
MR
8728 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
8729 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
8730 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
8731 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 8732 return error;
8e68597d
MR
8733 }
8734 }
da0436e9 8735
2fcee4bf
JS
8736 /*
8737 * The BARs and register set definitions and offset locations are
8738 * dependent on the if_type.
8739 */
8740 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
8741 &phba->sli4_hba.sli_intf.word0)) {
8742 return error;
8743 }
8744
8745 /* There is no SLI3 failback for SLI4 devices. */
8746 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
8747 LPFC_SLI_INTF_VALID) {
8748 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8749 "2894 SLI_INTF reg contents invalid "
8750 "sli_intf reg 0x%x\n",
8751 phba->sli4_hba.sli_intf.word0);
8752 return error;
8753 }
8754
8755 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
8756 /*
8757 * Get the bus address of SLI4 device Bar regions and the
8758 * number of bytes required by each mapping. The mapping of the
8759 * particular PCI BARs regions is dependent on the type of
8760 * SLI4 device.
da0436e9 8761 */
f5ca6f2e
JS
8762 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
8763 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
8764 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS
8765
8766 /*
8767 * Map SLI4 PCI Config Space Register base to a kernel virtual
8768 * addr
8769 */
8770 phba->sli4_hba.conf_regs_memmap_p =
8771 ioremap(phba->pci_bar0_map, bar0map_len);
8772 if (!phba->sli4_hba.conf_regs_memmap_p) {
8773 dev_printk(KERN_ERR, &pdev->dev,
8774 "ioremap failed for SLI4 PCI config "
8775 "registers.\n");
8776 goto out;
8777 }
f5ca6f2e 8778 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS
8779 /* Set up BAR0 PCI config space register memory map */
8780 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS
8781 } else {
8782 phba->pci_bar0_map = pci_resource_start(pdev, 1);
8783 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS
8784 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
8785 dev_printk(KERN_ERR, &pdev->dev,
8786 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
8787 goto out;
8788 }
8789 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 8790 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS
8791 if (!phba->sli4_hba.conf_regs_memmap_p) {
8792 dev_printk(KERN_ERR, &pdev->dev,
8793 "ioremap failed for SLI4 PCI config "
8794 "registers.\n");
8795 goto out;
8796 }
8797 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS
8798 }
8799
c31098ce 8800 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 8801 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
2fcee4bf
JS
8802 /*
8803 * Map SLI4 if type 0 HBA Control Register base to a kernel
8804 * virtual address and setup the registers.
8805 */
f5ca6f2e
JS
8806 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
8807 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
2fcee4bf 8808 phba->sli4_hba.ctrl_regs_memmap_p =
da0436e9 8809 ioremap(phba->pci_bar1_map, bar1map_len);
2fcee4bf
JS
8810 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
8811 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 8812 "ioremap failed for SLI4 HBA control registers.\n");
2fcee4bf
JS
8813 goto out_iounmap_conf;
8814 }
f5ca6f2e 8815 phba->pci_bar2_memmap_p = phba->sli4_hba.ctrl_regs_memmap_p;
2fcee4bf 8816 lpfc_sli4_bar1_register_memmap(phba);
da0436e9
JS
8817 }
8818
c31098ce 8819 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 8820 (pci_resource_start(pdev, PCI_64BIT_BAR4))) {
2fcee4bf
JS
8821 /*
8822 * Map SLI4 if type 0 HBA Doorbell Register base to a kernel
8823 * virtual address and setup the registers.
8824 */
f5ca6f2e
JS
8825 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
8826 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
2fcee4bf 8827 phba->sli4_hba.drbl_regs_memmap_p =
da0436e9 8828 ioremap(phba->pci_bar2_map, bar2map_len);
2fcee4bf
JS
8829 if (!phba->sli4_hba.drbl_regs_memmap_p) {
8830 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 8831 "ioremap failed for SLI4 HBA doorbell registers.\n");
2fcee4bf
JS
8832 goto out_iounmap_ctrl;
8833 }
f5ca6f2e 8834 phba->pci_bar4_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
2fcee4bf
JS
8835 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
8836 if (error)
8837 goto out_iounmap_all;
da0436e9
JS
8838 }
8839
da0436e9
JS
8840 return 0;
8841
8842out_iounmap_all:
8843 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
8844out_iounmap_ctrl:
8845 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
8846out_iounmap_conf:
8847 iounmap(phba->sli4_hba.conf_regs_memmap_p);
8848out:
8849 return error;
8850}
8851
8852/**
8853 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
8854 * @phba: pointer to lpfc hba data structure.
8855 *
8856 * This routine is invoked to unset the PCI device memory space for device
8857 * with SLI-4 interface spec.
8858 **/
8859static void
8860lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
8861{
2e90f4b5
JS
8862 uint32_t if_type;
8863 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 8864
2e90f4b5
JS
8865 switch (if_type) {
8866 case LPFC_SLI_INTF_IF_TYPE_0:
8867 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
8868 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
8869 iounmap(phba->sli4_hba.conf_regs_memmap_p);
8870 break;
8871 case LPFC_SLI_INTF_IF_TYPE_2:
8872 iounmap(phba->sli4_hba.conf_regs_memmap_p);
8873 break;
8874 case LPFC_SLI_INTF_IF_TYPE_1:
8875 default:
8876 dev_printk(KERN_ERR, &phba->pcidev->dev,
8877 "FATAL - unsupported SLI4 interface type - %d\n",
8878 if_type);
8879 break;
8880 }
da0436e9
JS
8881}
8882
8883/**
8884 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
8885 * @phba: pointer to lpfc hba data structure.
8886 *
8887 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 8888 * with SLI-3 interface specs.
da0436e9
JS
8889 *
8890 * Return codes
af901ca1 8891 * 0 - successful
da0436e9
JS
8892 * other values - error
8893 **/
8894static int
8895lpfc_sli_enable_msix(struct lpfc_hba *phba)
8896{
45ffac19 8897 int rc;
da0436e9
JS
8898 LPFC_MBOXQ_t *pmb;
8899
8900 /* Set up MSI-X multi-message vectors */
45ffac19
CH
8901 rc = pci_alloc_irq_vectors(phba->pcidev,
8902 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
8903 if (rc < 0) {
da0436e9
JS
8904 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8905 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 8906 goto vec_fail_out;
da0436e9 8907 }
45ffac19 8908
da0436e9
JS
8909 /*
8910 * Assign MSI-X vectors to interrupt handlers
8911 */
8912
8913 /* vector-0 is associated to slow-path handler */
45ffac19 8914 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 8915 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS
8916 LPFC_SP_DRIVER_HANDLER_NAME, phba);
8917 if (rc) {
8918 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8919 "0421 MSI-X slow-path request_irq failed "
8920 "(%d)\n", rc);
8921 goto msi_fail_out;
8922 }
8923
8924 /* vector-1 is associated to fast-path handler */
45ffac19 8925 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 8926 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS
8927 LPFC_FP_DRIVER_HANDLER_NAME, phba);
8928
8929 if (rc) {
8930 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8931 "0429 MSI-X fast-path request_irq failed "
8932 "(%d)\n", rc);
8933 goto irq_fail_out;
8934 }
8935
8936 /*
8937 * Configure HBA MSI-X attention conditions to messages
8938 */
8939 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8940
8941 if (!pmb) {
8942 rc = -ENOMEM;
8943 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8944 "0474 Unable to allocate memory for issuing "
8945 "MBOX_CONFIG_MSI command\n");
8946 goto mem_fail_out;
8947 }
8948 rc = lpfc_config_msi(phba, pmb);
8949 if (rc)
8950 goto mbx_fail_out;
8951 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
8952 if (rc != MBX_SUCCESS) {
8953 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
8954 "0351 Config MSI mailbox command failed, "
8955 "mbxCmd x%x, mbxStatus x%x\n",
8956 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
8957 goto mbx_fail_out;
8958 }
8959
8960 /* Free memory allocated for mailbox command */
8961 mempool_free(pmb, phba->mbox_mem_pool);
8962 return rc;
8963
8964mbx_fail_out:
8965 /* Free memory allocated for mailbox command */
8966 mempool_free(pmb, phba->mbox_mem_pool);
8967
8968mem_fail_out:
8969 /* free the irq already requested */
45ffac19 8970 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS
8971
8972irq_fail_out:
8973 /* free the irq already requested */
45ffac19 8974 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS
8975
8976msi_fail_out:
8977 /* Unconfigure MSI-X capability structure */
45ffac19 8978 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
8979
8980vec_fail_out:
da0436e9
JS
8981 return rc;
8982}
8983
da0436e9
JS
8984/**
8985 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
8986 * @phba: pointer to lpfc hba data structure.
8987 *
8988 * This routine is invoked to enable the MSI interrupt mode to device with
8989 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
8990 * enable the MSI vector. The device driver is responsible for calling the
8991 * request_irq() to register MSI vector with a interrupt the handler, which
8992 * is done in this function.
8993 *
8994 * Return codes
af901ca1 8995 * 0 - successful
da0436e9
JS
8996 * other values - error
8997 */
8998static int
8999lpfc_sli_enable_msi(struct lpfc_hba *phba)
9000{
9001 int rc;
9002
9003 rc = pci_enable_msi(phba->pcidev);
9004 if (!rc)
9005 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9006 "0462 PCI enable MSI mode success.\n");
9007 else {
9008 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9009 "0471 PCI enable MSI mode failed (%d)\n", rc);
9010 return rc;
9011 }
9012
9013 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9014 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9015 if (rc) {
9016 pci_disable_msi(phba->pcidev);
9017 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9018 "0478 MSI request_irq failed (%d)\n", rc);
9019 }
9020 return rc;
9021}
9022
da0436e9
JS
9023/**
9024 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9025 * @phba: pointer to lpfc hba data structure.
9026 *
9027 * This routine is invoked to enable device interrupt and associate driver's
9028 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9029 * spec. Depends on the interrupt mode configured to the driver, the driver
9030 * will try to fallback from the configured interrupt mode to an interrupt
9031 * mode which is supported by the platform, kernel, and device in the order
9032 * of:
9033 * MSI-X -> MSI -> IRQ.
9034 *
9035 * Return codes
af901ca1 9036 * 0 - successful
da0436e9
JS
9037 * other values - error
9038 **/
9039static uint32_t
9040lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9041{
9042 uint32_t intr_mode = LPFC_INTR_ERROR;
9043 int retval;
9044
9045 if (cfg_mode == 2) {
9046 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9047 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9048 if (!retval) {
9049 /* Now, try to enable MSI-X interrupt mode */
9050 retval = lpfc_sli_enable_msix(phba);
9051 if (!retval) {
9052 /* Indicate initialization to MSI-X mode */
9053 phba->intr_type = MSIX;
9054 intr_mode = 2;
9055 }
9056 }
9057 }
9058
9059 /* Fallback to MSI if MSI-X initialization failed */
9060 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9061 retval = lpfc_sli_enable_msi(phba);
9062 if (!retval) {
9063 /* Indicate initialization to MSI mode */
9064 phba->intr_type = MSI;
9065 intr_mode = 1;
9066 }
9067 }
9068
9069 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9070 if (phba->intr_type == NONE) {
9071 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9072 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9073 if (!retval) {
9074 /* Indicate initialization to INTx mode */
9075 phba->intr_type = INTx;
9076 intr_mode = 0;
9077 }
9078 }
9079 return intr_mode;
9080}
9081
9082/**
9083 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9084 * @phba: pointer to lpfc hba data structure.
9085 *
9086 * This routine is invoked to disable device interrupt and disassociate the
9087 * driver's interrupt handler(s) from interrupt vector(s) to device with
9088 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9089 * release the interrupt vector(s) for the message signaled interrupt.
9090 **/
9091static void
9092lpfc_sli_disable_intr(struct lpfc_hba *phba)
9093{
45ffac19
CH
9094 int nr_irqs, i;
9095
da0436e9 9096 if (phba->intr_type == MSIX)
45ffac19
CH
9097 nr_irqs = LPFC_MSIX_VECTORS;
9098 else
9099 nr_irqs = 1;
9100
9101 for (i = 0; i < nr_irqs; i++)
9102 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9103 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9104
9105 /* Reset interrupt management states */
9106 phba->intr_type = NONE;
9107 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9108}
9109
7bb03bbf 9110/**
895427bd 9111 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9112 * @phba: pointer to lpfc hba data structure.
895427bd
JS
9113 * @vectors: number of msix vectors allocated.
9114 *
9115 * The routine will figure out the CPU affinity assignment for every
9116 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9117 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9118 * can be associated with. If the vector can be unquely associated with
9119 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9120 * In addition, the CPU to IO channel mapping will be calculated
9121 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9122 */
895427bd
JS
9123static void
9124lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS
9125{
9126 struct lpfc_vector_map_info *cpup;
895427bd
JS
9127 int index = 0;
9128 int vec = 0;
7bb03bbf 9129 int cpu;
7bb03bbf
JS
9130#ifdef CONFIG_X86
9131 struct cpuinfo_x86 *cpuinfo;
9132#endif
7bb03bbf
JS
9133
9134 /* Init cpu_map array */
9135 memset(phba->sli4_hba.cpu_map, 0xff,
9136 (sizeof(struct lpfc_vector_map_info) *
895427bd 9137 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS
9138
9139 /* Update CPU map with physical id and core id of each CPU */
9140 cpup = phba->sli4_hba.cpu_map;
9141 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9142#ifdef CONFIG_X86
9143 cpuinfo = &cpu_data(cpu);
9144 cpup->phys_id = cpuinfo->phys_proc_id;
9145 cpup->core_id = cpuinfo->cpu_core_id;
9146#else
9147 /* No distinction between CPUs for other platforms */
9148 cpup->phys_id = 0;
9149 cpup->core_id = 0;
9150#endif
895427bd
JS
9151 cpup->channel_id = index; /* For now round robin */
9152 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9153 vec++;
9154 if (vec >= vectors)
9155 vec = 0;
9156 index++;
9157 if (index >= phba->cfg_fcp_io_channel)
9158 index = 0;
7bb03bbf
JS
9159 cpup++;
9160 }
7bb03bbf
JS
9161}
9162
9163
da0436e9
JS
9164/**
9165 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9166 * @phba: pointer to lpfc hba data structure.
9167 *
9168 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9169 * with SLI-4 interface spec.
da0436e9
JS
9170 *
9171 * Return codes
af901ca1 9172 * 0 - successful
da0436e9
JS
9173 * other values - error
9174 **/
9175static int
9176lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9177{
75baf696 9178 int vectors, rc, index;
da0436e9
JS
9179
9180 /* Set up MSI-X multi-message vectors */
895427bd 9181 vectors = phba->io_channel_irqs;
45ffac19 9182 if (phba->cfg_fof)
1ba981fd 9183 vectors++;
45ffac19 9184
895427bd
JS
9185 rc = pci_alloc_irq_vectors(phba->pcidev, 2, vectors,
9186 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9187 if (rc < 0) {
da0436e9
JS
9188 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9189 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9190 goto vec_fail_out;
da0436e9 9191 }
4f871e1b 9192 vectors = rc;
75baf696 9193
7bb03bbf 9194 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9195 for (index = 0; index < vectors; index++) {
4305f183 9196 memset(&phba->sli4_hba.handler_name[index], 0, 16);
a2fc4aef
JS
9197 snprintf((char *)&phba->sli4_hba.handler_name[index],
9198 LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9199 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9200
895427bd
JS
9201 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9202 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9203 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9204 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9205 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9206 &lpfc_sli4_fof_intr_handler, 0,
1ba981fd 9207 (char *)&phba->sli4_hba.handler_name[index],
895427bd 9208 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9209 else
45ffac19 9210 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9211 &lpfc_sli4_hba_intr_handler, 0,
4305f183 9212 (char *)&phba->sli4_hba.handler_name[index],
895427bd 9213 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS
9214 if (rc) {
9215 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9216 "0486 MSI-X fast-path (%d) "
9217 "request_irq failed (%d)\n", index, rc);
9218 goto cfg_fail_out;
9219 }
9220 }
9221
1ba981fd
JS
9222 if (phba->cfg_fof)
9223 vectors--;
9224
895427bd 9225 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS
9226 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9227 "3238 Reducing IO channels to match number of "
9228 "MSI-X vectors, requested %d got %d\n",
895427bd
JS
9229 phba->io_channel_irqs, vectors);
9230 if (phba->cfg_fcp_io_channel > vectors)
9231 phba->cfg_fcp_io_channel = vectors;
9232 if (phba->cfg_nvme_io_channel > vectors)
9233 phba->cfg_nvme_io_channel = vectors;
9234 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9235 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9236 else
9237 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9238 }
895427bd 9239 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9240
da0436e9
JS
9241 return rc;
9242
9243cfg_fail_out:
9244 /* free the irq already requested */
895427bd
JS
9245 for (--index; index >= 0; index--)
9246 free_irq(pci_irq_vector(phba->pcidev, index),
9247 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9248
da0436e9 9249 /* Unconfigure MSI-X capability structure */
45ffac19 9250 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9251
9252vec_fail_out:
da0436e9
JS
9253 return rc;
9254}
9255
da0436e9
JS
9256/**
9257 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9258 * @phba: pointer to lpfc hba data structure.
9259 *
9260 * This routine is invoked to enable the MSI interrupt mode to device with
9261 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9262 * to enable the MSI vector. The device driver is responsible for calling
9263 * the request_irq() to register MSI vector with a interrupt the handler,
9264 * which is done in this function.
9265 *
9266 * Return codes
af901ca1 9267 * 0 - successful
da0436e9
JS
9268 * other values - error
9269 **/
9270static int
9271lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9272{
9273 int rc, index;
9274
9275 rc = pci_enable_msi(phba->pcidev);
9276 if (!rc)
9277 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9278 "0487 PCI enable MSI mode success.\n");
9279 else {
9280 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9281 "0488 PCI enable MSI mode failed (%d)\n", rc);
9282 return rc;
9283 }
9284
9285 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9286 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9287 if (rc) {
9288 pci_disable_msi(phba->pcidev);
9289 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9290 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9291 return rc;
da0436e9
JS
9292 }
9293
895427bd
JS
9294 for (index = 0; index < phba->io_channel_irqs; index++) {
9295 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9296 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS
9297 }
9298
1ba981fd 9299 if (phba->cfg_fof) {
895427bd
JS
9300 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9301 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 9302 }
75baf696 9303 return 0;
da0436e9
JS
9304}
9305
da0436e9
JS
9306/**
9307 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
9308 * @phba: pointer to lpfc hba data structure.
9309 *
9310 * This routine is invoked to enable device interrupt and associate driver's
9311 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
9312 * interface spec. Depends on the interrupt mode configured to the driver,
9313 * the driver will try to fallback from the configured interrupt mode to an
9314 * interrupt mode which is supported by the platform, kernel, and device in
9315 * the order of:
9316 * MSI-X -> MSI -> IRQ.
9317 *
9318 * Return codes
af901ca1 9319 * 0 - successful
da0436e9
JS
9320 * other values - error
9321 **/
9322static uint32_t
9323lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9324{
9325 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 9326 int retval, idx;
da0436e9
JS
9327
9328 if (cfg_mode == 2) {
9329 /* Preparation before conf_msi mbox cmd */
9330 retval = 0;
9331 if (!retval) {
9332 /* Now, try to enable MSI-X interrupt mode */
9333 retval = lpfc_sli4_enable_msix(phba);
9334 if (!retval) {
9335 /* Indicate initialization to MSI-X mode */
9336 phba->intr_type = MSIX;
9337 intr_mode = 2;
9338 }
9339 }
9340 }
9341
9342 /* Fallback to MSI if MSI-X initialization failed */
9343 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9344 retval = lpfc_sli4_enable_msi(phba);
9345 if (!retval) {
9346 /* Indicate initialization to MSI mode */
9347 phba->intr_type = MSI;
9348 intr_mode = 1;
9349 }
9350 }
9351
9352 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9353 if (phba->intr_type == NONE) {
9354 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
9355 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9356 if (!retval) {
895427bd
JS
9357 struct lpfc_hba_eq_hdl *eqhdl;
9358
da0436e9
JS
9359 /* Indicate initialization to INTx mode */
9360 phba->intr_type = INTx;
9361 intr_mode = 0;
895427bd
JS
9362
9363 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
9364 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9365 eqhdl->idx = idx;
9366 eqhdl->phba = phba;
9367 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 9368 }
1ba981fd 9369 if (phba->cfg_fof) {
895427bd
JS
9370 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9371 eqhdl->idx = idx;
9372 eqhdl->phba = phba;
9373 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 9374 }
da0436e9
JS
9375 }
9376 }
9377 return intr_mode;
9378}
9379
9380/**
9381 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
9382 * @phba: pointer to lpfc hba data structure.
9383 *
9384 * This routine is invoked to disable device interrupt and disassociate
9385 * the driver's interrupt handler(s) from interrupt vector(s) to device
9386 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
9387 * will release the interrupt vector(s) for the message signaled interrupt.
9388 **/
9389static void
9390lpfc_sli4_disable_intr(struct lpfc_hba *phba)
9391{
9392 /* Disable the currently initialized interrupt mode */
45ffac19
CH
9393 if (phba->intr_type == MSIX) {
9394 int index;
9395
9396 /* Free up MSI-X multi-message vectors */
895427bd
JS
9397 for (index = 0; index < phba->io_channel_irqs; index++)
9398 free_irq(pci_irq_vector(phba->pcidev, index),
9399 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH
9400
9401 if (phba->cfg_fof)
895427bd
JS
9402 free_irq(pci_irq_vector(phba->pcidev, index),
9403 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 9404 } else {
da0436e9 9405 free_irq(phba->pcidev->irq, phba);
45ffac19
CH
9406 }
9407
9408 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9409
9410 /* Reset interrupt management states */
9411 phba->intr_type = NONE;
9412 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9413}
9414
9415/**
9416 * lpfc_unset_hba - Unset SLI3 hba device initialization
9417 * @phba: pointer to lpfc hba data structure.
9418 *
9419 * This routine is invoked to unset the HBA device initialization steps to
9420 * a device with SLI-3 interface spec.
9421 **/
9422static void
9423lpfc_unset_hba(struct lpfc_hba *phba)
9424{
9425 struct lpfc_vport *vport = phba->pport;
9426 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
9427
9428 spin_lock_irq(shost->host_lock);
9429 vport->load_flag |= FC_UNLOADING;
9430 spin_unlock_irq(shost->host_lock);
9431
72859909
JS
9432 kfree(phba->vpi_bmask);
9433 kfree(phba->vpi_ids);
9434
da0436e9
JS
9435 lpfc_stop_hba_timers(phba);
9436
9437 phba->pport->work_port_events = 0;
9438
9439 lpfc_sli_hba_down(phba);
9440
9441 lpfc_sli_brdrestart(phba);
9442
9443 lpfc_sli_disable_intr(phba);
9444
9445 return;
9446}
9447
5af5eee7
JS
9448/**
9449 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
9450 * @phba: Pointer to HBA context object.
9451 *
9452 * This function is called in the SLI4 code path to wait for completion
9453 * of device's XRIs exchange busy. It will check the XRI exchange busy
9454 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
9455 * that, it will check the XRI exchange busy on outstanding FCP and ELS
9456 * I/Os every 30 seconds, log error message, and wait forever. Only when
9457 * all XRI exchange busy complete, the driver unload shall proceed with
9458 * invoking the function reset ioctl mailbox command to the CNA and the
9459 * the rest of the driver unload resource release.
9460 **/
9461static void
9462lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
9463{
9464 int wait_time = 0;
895427bd
JS
9465 int nvme_xri_cmpl = 1;
9466 int fcp_xri_cmpl = 1;
5af5eee7
JS
9467 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
9468
895427bd
JS
9469 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
9470 fcp_xri_cmpl =
9471 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
9472 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
9473 nvme_xri_cmpl =
9474 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
9475
9476 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl) {
5af5eee7 9477 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS
9478 if (!nvme_xri_cmpl)
9479 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9480 "6100 NVME XRI exchange busy "
9481 "wait time: %d seconds.\n",
9482 wait_time/1000);
5af5eee7
JS
9483 if (!fcp_xri_cmpl)
9484 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9485 "2877 FCP XRI exchange busy "
9486 "wait time: %d seconds.\n",
9487 wait_time/1000);
9488 if (!els_xri_cmpl)
9489 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9490 "2878 ELS XRI exchange busy "
9491 "wait time: %d seconds.\n",
9492 wait_time/1000);
9493 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
9494 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
9495 } else {
9496 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
9497 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
9498 }
895427bd
JS
9499 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
9500 nvme_xri_cmpl = list_empty(
9501 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
9502
9503 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
9504 fcp_xri_cmpl = list_empty(
9505 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
9506
5af5eee7
JS
9507 els_xri_cmpl =
9508 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
9509 }
9510}
9511
da0436e9
JS
9512/**
9513 * lpfc_sli4_hba_unset - Unset the fcoe hba
9514 * @phba: Pointer to HBA context object.
9515 *
9516 * This function is called in the SLI4 code path to reset the HBA's FCoE
9517 * function. The caller is not required to hold any lock. This routine
9518 * issues PCI function reset mailbox command to reset the FCoE function.
9519 * At the end of the function, it calls lpfc_hba_down_post function to
9520 * free any pending commands.
9521 **/
9522static void
9523lpfc_sli4_hba_unset(struct lpfc_hba *phba)
9524{
9525 int wait_cnt = 0;
9526 LPFC_MBOXQ_t *mboxq;
912e3acd 9527 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS
9528
9529 lpfc_stop_hba_timers(phba);
9530 phba->sli4_hba.intr_enable = 0;
9531
9532 /*
9533 * Gracefully wait out the potential current outstanding asynchronous
9534 * mailbox command.
9535 */
9536
9537 /* First, block any pending async mailbox command from posted */
9538 spin_lock_irq(&phba->hbalock);
9539 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
9540 spin_unlock_irq(&phba->hbalock);
9541 /* Now, trying to wait it out if we can */
9542 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
9543 msleep(10);
9544 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
9545 break;
9546 }
9547 /* Forcefully release the outstanding mailbox command if timed out */
9548 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
9549 spin_lock_irq(&phba->hbalock);
9550 mboxq = phba->sli.mbox_active;
9551 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
9552 __lpfc_mbox_cmpl_put(phba, mboxq);
9553 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
9554 phba->sli.mbox_active = NULL;
9555 spin_unlock_irq(&phba->hbalock);
9556 }
9557
5af5eee7
JS
9558 /* Abort all iocbs associated with the hba */
9559 lpfc_sli_hba_iocb_abort(phba);
9560
9561 /* Wait for completion of device XRI exchange busy */
9562 lpfc_sli4_xri_exchange_busy_wait(phba);
9563
da0436e9
JS
9564 /* Disable PCI subsystem interrupt */
9565 lpfc_sli4_disable_intr(phba);
9566
912e3acd
JS
9567 /* Disable SR-IOV if enabled */
9568 if (phba->cfg_sriov_nr_virtfn)
9569 pci_disable_sriov(pdev);
9570
da0436e9
JS
9571 /* Stop kthread signal shall trigger work_done one more time */
9572 kthread_stop(phba->worker_thread);
9573
3677a3a7
JS
9574 /* Reset SLI4 HBA FCoE function */
9575 lpfc_pci_function_reset(phba);
5350d872 9576 lpfc_sli4_queue_destroy(phba);
3677a3a7 9577
da0436e9
JS
9578 /* Stop the SLI4 device port */
9579 phba->pport->work_port_events = 0;
9580}
9581
28baac74
JS
9582 /**
9583 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
9584 * @phba: Pointer to HBA context object.
9585 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
9586 *
9587 * This function is called in the SLI4 code path to read the port's
9588 * sli4 capabilities.
9589 *
9590 * This function may be be called from any context that can block-wait
9591 * for the completion. The expectation is that this routine is called
9592 * typically from probe_one or from the online routine.
9593 **/
9594int
9595lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
9596{
9597 int rc;
9598 struct lpfc_mqe *mqe;
9599 struct lpfc_pc_sli4_params *sli4_params;
9600 uint32_t mbox_tmo;
9601
9602 rc = 0;
9603 mqe = &mboxq->u.mqe;
9604
9605 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 9606 lpfc_pc_sli4_params(mboxq);
28baac74
JS
9607 if (!phba->sli4_hba.intr_enable)
9608 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9609 else {
a183a15f 9610 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS
9611 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
9612 }
9613
9614 if (unlikely(rc))
9615 return 1;
9616
9617 sli4_params = &phba->sli4_hba.pc_sli4_params;
9618 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
9619 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
9620 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
9621 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
9622 &mqe->un.sli4_params);
9623 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
9624 &mqe->un.sli4_params);
9625 sli4_params->proto_types = mqe->un.sli4_params.word3;
9626 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
9627 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
9628 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
9629 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
9630 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
9631 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
9632 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
9633 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
9634 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
9635 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
9636 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
9637 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
9638 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
9639 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
9640 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
9641 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
9642 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
9643 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
9644 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
9645 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS
9646
9647 /* Make sure that sge_supp_len can be handled by the driver */
9648 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
9649 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
9650
28baac74
JS
9651 return rc;
9652}
9653
fedd3b7b
JS
9654/**
9655 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
9656 * @phba: Pointer to HBA context object.
9657 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
9658 *
9659 * This function is called in the SLI4 code path to read the port's
9660 * sli4 capabilities.
9661 *
9662 * This function may be be called from any context that can block-wait
9663 * for the completion. The expectation is that this routine is called
9664 * typically from probe_one or from the online routine.
9665 **/
9666int
9667lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
9668{
9669 int rc;
9670 struct lpfc_mqe *mqe = &mboxq->u.mqe;
9671 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 9672 uint32_t mbox_tmo;
fedd3b7b
JS
9673 int length;
9674 struct lpfc_sli4_parameters *mbx_sli4_parameters;
9675
6d368e53
JS
9676 /*
9677 * By default, the driver assumes the SLI4 port requires RPI
9678 * header postings. The SLI4_PARAM response will correct this
9679 * assumption.
9680 */
9681 phba->sli4_hba.rpi_hdrs_in_use = 1;
9682
fedd3b7b
JS
9683 /* Read the port's SLI4 Config Parameters */
9684 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
9685 sizeof(struct lpfc_sli4_cfg_mhdr));
9686 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9687 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
9688 length, LPFC_SLI4_MBX_EMBED);
9689 if (!phba->sli4_hba.intr_enable)
9690 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS
9691 else {
9692 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
9693 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
9694 }
fedd3b7b
JS
9695 if (unlikely(rc))
9696 return rc;
9697 sli4_params = &phba->sli4_hba.pc_sli4_params;
9698 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
9699 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
9700 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
9701 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
9702 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
9703 mbx_sli4_parameters);
9704 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
9705 mbx_sli4_parameters);
9706 if (bf_get(cfg_phwq, mbx_sli4_parameters))
9707 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
9708 else
9709 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
9710 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
9711 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 9712 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS
9713 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
9714 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
9715 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
9716 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 9717 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS
9718 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
9719 mbx_sli4_parameters);
895427bd 9720 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS
9721 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
9722 mbx_sli4_parameters);
6d368e53
JS
9723 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
9724 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS
9725 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
9726 bf_get(cfg_xib, mbx_sli4_parameters));
9727
9728 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
9729 !phba->nvme_support) {
9730 phba->nvme_support = 0;
9731 phba->nvmet_support = 0;
9732 phba->cfg_nvme_io_channel = 0;
9733 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9734 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
9735 "6101 Disabling NVME support: "
9736 "Not supported by firmware: %d %d\n",
9737 bf_get(cfg_nvme, mbx_sli4_parameters),
9738 bf_get(cfg_xib, mbx_sli4_parameters));
9739
9740 /* If firmware doesn't support NVME, just use SCSI support */
9741 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
9742 return -ENODEV;
9743 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
9744 }
0558056c
JS
9745
9746 /* Make sure that sge_supp_len can be handled by the driver */
9747 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
9748 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
9749
b5c53958
JS
9750 /*
9751 * Issue IOs with CDB embedded in WQE to minimized the number
9752 * of DMAs the firmware has to do. Setting this to 1 also forces
9753 * the driver to use 128 bytes WQEs for FCP IOs.
9754 */
9755 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
9756 phba->fcp_embed_io = 1;
9757 else
9758 phba->fcp_embed_io = 0;
7bdedb34
JS
9759
9760 /*
9761 * Check if the SLI port supports MDS Diagnostics
9762 */
9763 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
9764 phba->mds_diags_support = 1;
9765 else
9766 phba->mds_diags_support = 0;
fedd3b7b
JS
9767 return 0;
9768}
9769
da0436e9
JS
9770/**
9771 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
9772 * @pdev: pointer to PCI device
9773 * @pid: pointer to PCI device identifier
9774 *
9775 * This routine is to be called to attach a device with SLI-3 interface spec
9776 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
9777 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
9778 * information of the device and driver to see if the driver state that it can
9779 * support this kind of device. If the match is successful, the driver core
9780 * invokes this routine. If this routine determines it can claim the HBA, it
9781 * does all the initialization that it needs to do to handle the HBA properly.
9782 *
9783 * Return code
9784 * 0 - driver can claim the device
9785 * negative value - driver can not claim the device
9786 **/
6f039790 9787static int
da0436e9
JS
9788lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
9789{
9790 struct lpfc_hba *phba;
9791 struct lpfc_vport *vport = NULL;
6669f9bb 9792 struct Scsi_Host *shost = NULL;
da0436e9
JS
9793 int error;
9794 uint32_t cfg_mode, intr_mode;
9795
9796 /* Allocate memory for HBA structure */
9797 phba = lpfc_hba_alloc(pdev);
9798 if (!phba)
9799 return -ENOMEM;
9800
9801 /* Perform generic PCI device enabling operation */
9802 error = lpfc_enable_pci_dev(phba);
079b5c91 9803 if (error)
da0436e9 9804 goto out_free_phba;
da0436e9
JS
9805
9806 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
9807 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
9808 if (error)
9809 goto out_disable_pci_dev;
9810
9811 /* Set up SLI-3 specific device PCI memory space */
9812 error = lpfc_sli_pci_mem_setup(phba);
9813 if (error) {
9814 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9815 "1402 Failed to set up pci memory space.\n");
9816 goto out_disable_pci_dev;
9817 }
9818
da0436e9
JS
9819 /* Set up SLI-3 specific device driver resources */
9820 error = lpfc_sli_driver_resource_setup(phba);
9821 if (error) {
9822 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9823 "1404 Failed to set up driver resource.\n");
9824 goto out_unset_pci_mem_s3;
9825 }
9826
9827 /* Initialize and populate the iocb list per host */
9828 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
9829 if (error) {
9830 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9831 "1405 Failed to initialize iocb list.\n");
9832 goto out_unset_driver_resource_s3;
9833 }
9834
9835 /* Set up common device driver resources */
9836 error = lpfc_setup_driver_resource_phase2(phba);
9837 if (error) {
9838 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9839 "1406 Failed to set up driver resource.\n");
9840 goto out_free_iocb_list;
9841 }
9842
079b5c91
JS
9843 /* Get the default values for Model Name and Description */
9844 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
9845
da0436e9
JS
9846 /* Create SCSI host to the physical port */
9847 error = lpfc_create_shost(phba);
9848 if (error) {
9849 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9850 "1407 Failed to create scsi host.\n");
9851 goto out_unset_driver_resource;
9852 }
9853
9854 /* Configure sysfs attributes */
9855 vport = phba->pport;
9856 error = lpfc_alloc_sysfs_attr(vport);
9857 if (error) {
9858 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9859 "1476 Failed to allocate sysfs attr\n");
9860 goto out_destroy_shost;
9861 }
9862
6669f9bb 9863 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS
9864 /* Now, trying to enable interrupt and bring up the device */
9865 cfg_mode = phba->cfg_use_msi;
9866 while (true) {
9867 /* Put device to a known state before enabling interrupt */
9868 lpfc_stop_port(phba);
9869 /* Configure and enable interrupt */
9870 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
9871 if (intr_mode == LPFC_INTR_ERROR) {
9872 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9873 "0431 Failed to enable interrupt.\n");
9874 error = -ENODEV;
9875 goto out_free_sysfs_attr;
9876 }
9877 /* SLI-3 HBA setup */
9878 if (lpfc_sli_hba_setup(phba)) {
9879 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9880 "1477 Failed to set up hba\n");
9881 error = -ENODEV;
9882 goto out_remove_device;
9883 }
9884
9885 /* Wait 50ms for the interrupts of previous mailbox commands */
9886 msleep(50);
9887 /* Check active interrupts on message signaled interrupts */
9888 if (intr_mode == 0 ||
9889 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
9890 /* Log the current active interrupt mode */
9891 phba->intr_mode = intr_mode;
9892 lpfc_log_intr_mode(phba, intr_mode);
9893 break;
9894 } else {
9895 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9896 "0447 Configure interrupt mode (%d) "
9897 "failed active interrupt test.\n",
9898 intr_mode);
9899 /* Disable the current interrupt mode */
9900 lpfc_sli_disable_intr(phba);
9901 /* Try next level of interrupt mode */
9902 cfg_mode = --intr_mode;
9903 }
9904 }
9905
9906 /* Perform post initialization setup */
9907 lpfc_post_init_setup(phba);
9908
9909 /* Check if there are static vports to be created. */
9910 lpfc_create_static_vport(phba);
9911
9912 return 0;
9913
9914out_remove_device:
9915 lpfc_unset_hba(phba);
9916out_free_sysfs_attr:
9917 lpfc_free_sysfs_attr(vport);
9918out_destroy_shost:
9919 lpfc_destroy_shost(phba);
9920out_unset_driver_resource:
9921 lpfc_unset_driver_resource_phase2(phba);
9922out_free_iocb_list:
9923 lpfc_free_iocb_list(phba);
9924out_unset_driver_resource_s3:
9925 lpfc_sli_driver_resource_unset(phba);
9926out_unset_pci_mem_s3:
9927 lpfc_sli_pci_mem_unset(phba);
9928out_disable_pci_dev:
9929 lpfc_disable_pci_dev(phba);
6669f9bb
JS
9930 if (shost)
9931 scsi_host_put(shost);
da0436e9
JS
9932out_free_phba:
9933 lpfc_hba_free(phba);
9934 return error;
9935}
9936
9937/**
9938 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
9939 * @pdev: pointer to PCI device
9940 *
9941 * This routine is to be called to disattach a device with SLI-3 interface
9942 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
9943 * removed from PCI bus, it performs all the necessary cleanup for the HBA
9944 * device to be removed from the PCI subsystem properly.
9945 **/
6f039790 9946static void
da0436e9
JS
9947lpfc_pci_remove_one_s3(struct pci_dev *pdev)
9948{
9949 struct Scsi_Host *shost = pci_get_drvdata(pdev);
9950 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
9951 struct lpfc_vport **vports;
9952 struct lpfc_hba *phba = vport->phba;
9953 int i;
da0436e9
JS
9954
9955 spin_lock_irq(&phba->hbalock);
9956 vport->load_flag |= FC_UNLOADING;
9957 spin_unlock_irq(&phba->hbalock);
9958
9959 lpfc_free_sysfs_attr(vport);
9960
9961 /* Release all the vports against this physical port */
9962 vports = lpfc_create_vport_work_array(phba);
9963 if (vports != NULL)
587a37f6
JS
9964 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
9965 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
9966 continue;
da0436e9 9967 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 9968 }
da0436e9
JS
9969 lpfc_destroy_vport_work_array(phba, vports);
9970
9971 /* Remove FC host and then SCSI host with the physical port */
9972 fc_remove_host(shost);
9973 scsi_remove_host(shost);
9974 lpfc_cleanup(vport);
9975
9976 /*
9977 * Bring down the SLI Layer. This step disable all interrupts,
9978 * clears the rings, discards all mailbox commands, and resets
9979 * the HBA.
9980 */
9981
48e34d0f 9982 /* HBA interrupt will be disabled after this call */
da0436e9
JS
9983 lpfc_sli_hba_down(phba);
9984 /* Stop kthread signal shall trigger work_done one more time */
9985 kthread_stop(phba->worker_thread);
9986 /* Final cleanup of txcmplq and reset the HBA */
9987 lpfc_sli_brdrestart(phba);
9988
72859909
JS
9989 kfree(phba->vpi_bmask);
9990 kfree(phba->vpi_ids);
9991
da0436e9
JS
9992 lpfc_stop_hba_timers(phba);
9993 spin_lock_irq(&phba->hbalock);
9994 list_del_init(&vport->listentry);
9995 spin_unlock_irq(&phba->hbalock);
9996
9997 lpfc_debugfs_terminate(vport);
9998
912e3acd
JS
9999 /* Disable SR-IOV if enabled */
10000 if (phba->cfg_sriov_nr_virtfn)
10001 pci_disable_sriov(pdev);
10002
da0436e9
JS
10003 /* Disable interrupt */
10004 lpfc_sli_disable_intr(phba);
10005
da0436e9
JS
10006 scsi_host_put(shost);
10007
10008 /*
10009 * Call scsi_free before mem_free since scsi bufs are released to their
10010 * corresponding pools here.
10011 */
10012 lpfc_scsi_free(phba);
10013 lpfc_mem_free_all(phba);
10014
10015 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10016 phba->hbqslimp.virt, phba->hbqslimp.phys);
10017
10018 /* Free resources associated with SLI2 interface */
10019 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10020 phba->slim2p.virt, phba->slim2p.phys);
10021
10022 /* unmap adapter SLIM and Control Registers */
10023 iounmap(phba->ctrl_regs_memmap_p);
10024 iounmap(phba->slim_memmap_p);
10025
10026 lpfc_hba_free(phba);
10027
e0c0483c 10028 pci_release_mem_regions(pdev);
da0436e9
JS
10029 pci_disable_device(pdev);
10030}
10031
10032/**
10033 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10034 * @pdev: pointer to PCI device
10035 * @msg: power management message
10036 *
10037 * This routine is to be called from the kernel's PCI subsystem to support
10038 * system Power Management (PM) to device with SLI-3 interface spec. When
10039 * PM invokes this method, it quiesces the device by stopping the driver's
10040 * worker thread for the device, turning off device's interrupt and DMA,
10041 * and bring the device offline. Note that as the driver implements the
10042 * minimum PM requirements to a power-aware driver's PM support for the
10043 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10044 * to the suspend() method call will be treated as SUSPEND and the driver will
10045 * fully reinitialize its device during resume() method call, the driver will
10046 * set device to PCI_D3hot state in PCI config space instead of setting it
10047 * according to the @msg provided by the PM.
10048 *
10049 * Return code
10050 * 0 - driver suspended the device
10051 * Error otherwise
10052 **/
10053static int
10054lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10055{
10056 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10057 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10058
10059 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10060 "0473 PCI device Power Management suspend.\n");
10061
10062 /* Bring down the device */
618a5230 10063 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10064 lpfc_offline(phba);
10065 kthread_stop(phba->worker_thread);
10066
10067 /* Disable interrupt from device */
10068 lpfc_sli_disable_intr(phba);
10069
10070 /* Save device state to PCI config space */
10071 pci_save_state(pdev);
10072 pci_set_power_state(pdev, PCI_D3hot);
10073
10074 return 0;
10075}
10076
10077/**
10078 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10079 * @pdev: pointer to PCI device
10080 *
10081 * This routine is to be called from the kernel's PCI subsystem to support
10082 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10083 * invokes this method, it restores the device's PCI config space state and
10084 * fully reinitializes the device and brings it online. Note that as the
10085 * driver implements the minimum PM requirements to a power-aware driver's
10086 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10087 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10088 * driver will fully reinitialize its device during resume() method call,
10089 * the device will be set to PCI_D0 directly in PCI config space before
10090 * restoring the state.
10091 *
10092 * Return code
10093 * 0 - driver suspended the device
10094 * Error otherwise
10095 **/
10096static int
10097lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10098{
10099 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10100 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10101 uint32_t intr_mode;
10102 int error;
10103
10104 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10105 "0452 PCI device Power Management resume.\n");
10106
10107 /* Restore device state from PCI config space */
10108 pci_set_power_state(pdev, PCI_D0);
10109 pci_restore_state(pdev);
0d878419 10110
1dfb5a47
JS
10111 /*
10112 * As the new kernel behavior of pci_restore_state() API call clears
10113 * device saved_state flag, need to save the restored state again.
10114 */
10115 pci_save_state(pdev);
10116
da0436e9
JS
10117 if (pdev->is_busmaster)
10118 pci_set_master(pdev);
10119
10120 /* Startup the kernel thread for this host adapter. */
10121 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10122 "lpfc_worker_%d", phba->brd_no);
10123 if (IS_ERR(phba->worker_thread)) {
10124 error = PTR_ERR(phba->worker_thread);
10125 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10126 "0434 PM resume failed to start worker "
10127 "thread: error=x%x.\n", error);
10128 return error;
10129 }
10130
10131 /* Configure and enable interrupt */
10132 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10133 if (intr_mode == LPFC_INTR_ERROR) {
10134 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10135 "0430 PM resume Failed to enable interrupt\n");
10136 return -EIO;
10137 } else
10138 phba->intr_mode = intr_mode;
10139
10140 /* Restart HBA and bring it online */
10141 lpfc_sli_brdrestart(phba);
10142 lpfc_online(phba);
10143
10144 /* Log the current active interrupt mode */
10145 lpfc_log_intr_mode(phba, phba->intr_mode);
10146
10147 return 0;
10148}
10149
891478a2
JS
10150/**
10151 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10152 * @phba: pointer to lpfc hba data structure.
10153 *
10154 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10155 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS
10156 **/
10157static void
10158lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10159{
10160 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10161 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS
10162
10163 /*
10164 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10165 * and let the SCSI mid-layer to retry them to recover.
10166 */
db55fba8 10167 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS
10168}
10169
0d878419
JS
10170/**
10171 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10172 * @phba: pointer to lpfc hba data structure.
10173 *
10174 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10175 * disables the device interrupt and pci device, and aborts the internal FCP
10176 * pending I/Os.
10177 **/
10178static void
10179lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10180{
0d878419 10181 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10182 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10183
75baf696 10184 /* Block any management I/Os to the device */
618a5230 10185 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10186
e2af0d2e
JS
10187 /* Block all SCSI devices' I/Os on the host */
10188 lpfc_scsi_dev_block(phba);
10189
ea714f3d
JS
10190 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10191 lpfc_sli_flush_fcp_rings(phba);
10192
e2af0d2e
JS
10193 /* stop all timers */
10194 lpfc_stop_hba_timers(phba);
10195
0d878419
JS
10196 /* Disable interrupt and pci device */
10197 lpfc_sli_disable_intr(phba);
10198 pci_disable_device(phba->pcidev);
0d878419
JS
10199}
10200
10201/**
10202 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10203 * @phba: pointer to lpfc hba data structure.
10204 *
10205 * This routine is called to prepare the SLI3 device for PCI slot permanently
10206 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10207 * pending I/Os.
10208 **/
10209static void
75baf696 10210lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS
10211{
10212 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10213 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS
10214 /* Block all SCSI devices' I/Os on the host */
10215 lpfc_scsi_dev_block(phba);
10216
10217 /* stop all timers */
10218 lpfc_stop_hba_timers(phba);
10219
0d878419
JS
10220 /* Clean up all driver's outstanding SCSI I/Os */
10221 lpfc_sli_flush_fcp_rings(phba);
10222}
10223
da0436e9
JS
10224/**
10225 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10226 * @pdev: pointer to PCI device.
10227 * @state: the current PCI connection state.
10228 *
10229 * This routine is called from the PCI subsystem for I/O error handling to
10230 * device with SLI-3 interface spec. This function is called by the PCI
10231 * subsystem after a PCI bus error affecting this device has been detected.
10232 * When this function is invoked, it will need to stop all the I/Os and
10233 * interrupt(s) to the device. Once that is done, it will return
10234 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10235 * as desired.
10236 *
10237 * Return codes
0d878419 10238 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS
10239 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10240 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10241 **/
10242static pci_ers_result_t
10243lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10244{
10245 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10246 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10247
0d878419
JS
10248 switch (state) {
10249 case pci_channel_io_normal:
891478a2
JS
10250 /* Non-fatal error, prepare for recovery */
10251 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS
10252 return PCI_ERS_RESULT_CAN_RECOVER;
10253 case pci_channel_io_frozen:
10254 /* Fatal error, prepare for slot reset */
10255 lpfc_sli_prep_dev_for_reset(phba);
10256 return PCI_ERS_RESULT_NEED_RESET;
10257 case pci_channel_io_perm_failure:
10258 /* Permanent failure, prepare for device down */
75baf696 10259 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 10260 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS
10261 default:
10262 /* Unknown state, prepare and request slot reset */
10263 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10264 "0472 Unknown PCI error state: x%x\n", state);
10265 lpfc_sli_prep_dev_for_reset(phba);
10266 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 10267 }
da0436e9
JS
10268}
10269
10270/**
10271 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
10272 * @pdev: pointer to PCI device.
10273 *
10274 * This routine is called from the PCI subsystem for error handling to
10275 * device with SLI-3 interface spec. This is called after PCI bus has been
10276 * reset to restart the PCI card from scratch, as if from a cold-boot.
10277 * During the PCI subsystem error recovery, after driver returns
10278 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
10279 * recovery and then call this routine before calling the .resume method
10280 * to recover the device. This function will initialize the HBA device,
10281 * enable the interrupt, but it will just put the HBA to offline state
10282 * without passing any I/O traffic.
10283 *
10284 * Return codes
10285 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
10286 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10287 */
10288static pci_ers_result_t
10289lpfc_io_slot_reset_s3(struct pci_dev *pdev)
10290{
10291 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10292 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10293 struct lpfc_sli *psli = &phba->sli;
10294 uint32_t intr_mode;
10295
10296 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
10297 if (pci_enable_device_mem(pdev)) {
10298 printk(KERN_ERR "lpfc: Cannot re-enable "
10299 "PCI device after reset.\n");
10300 return PCI_ERS_RESULT_DISCONNECT;
10301 }
10302
10303 pci_restore_state(pdev);
1dfb5a47
JS
10304
10305 /*
10306 * As the new kernel behavior of pci_restore_state() API call clears
10307 * device saved_state flag, need to save the restored state again.
10308 */
10309 pci_save_state(pdev);
10310
da0436e9
JS
10311 if (pdev->is_busmaster)
10312 pci_set_master(pdev);
10313
10314 spin_lock_irq(&phba->hbalock);
10315 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
10316 spin_unlock_irq(&phba->hbalock);
10317
10318 /* Configure and enable interrupt */
10319 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10320 if (intr_mode == LPFC_INTR_ERROR) {
10321 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10322 "0427 Cannot re-enable interrupt after "
10323 "slot reset.\n");
10324 return PCI_ERS_RESULT_DISCONNECT;
10325 } else
10326 phba->intr_mode = intr_mode;
10327
75baf696 10328 /* Take device offline, it will perform cleanup */
618a5230 10329 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10330 lpfc_offline(phba);
10331 lpfc_sli_brdrestart(phba);
10332
10333 /* Log the current active interrupt mode */
10334 lpfc_log_intr_mode(phba, phba->intr_mode);
10335
10336 return PCI_ERS_RESULT_RECOVERED;
10337}
10338
10339/**
10340 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
10341 * @pdev: pointer to PCI device
10342 *
10343 * This routine is called from the PCI subsystem for error handling to device
10344 * with SLI-3 interface spec. It is called when kernel error recovery tells
10345 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
10346 * error recovery. After this call, traffic can start to flow from this device
10347 * again.
10348 */
10349static void
10350lpfc_io_resume_s3(struct pci_dev *pdev)
10351{
10352 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10353 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 10354
e2af0d2e 10355 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 10356 lpfc_online(phba);
0d878419
JS
10357
10358 /* Clean up Advanced Error Reporting (AER) if needed */
10359 if (phba->hba_flag & HBA_AER_ENABLED)
10360 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 10361}
3772a991 10362
da0436e9
JS
10363/**
10364 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
10365 * @phba: pointer to lpfc hba data structure.
10366 *
10367 * returns the number of ELS/CT IOCBs to reserve
10368 **/
10369int
10370lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
10371{
10372 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
10373
f1126688
JS
10374 if (phba->sli_rev == LPFC_SLI_REV4) {
10375 if (max_xri <= 100)
6a9c52cf 10376 return 10;
f1126688 10377 else if (max_xri <= 256)
6a9c52cf 10378 return 25;
f1126688 10379 else if (max_xri <= 512)
6a9c52cf 10380 return 50;
f1126688 10381 else if (max_xri <= 1024)
6a9c52cf 10382 return 100;
8a9d2e80 10383 else if (max_xri <= 1536)
6a9c52cf 10384 return 150;
8a9d2e80
JS
10385 else if (max_xri <= 2048)
10386 return 200;
10387 else
10388 return 250;
f1126688
JS
10389 } else
10390 return 0;
3772a991
JS
10391}
10392
895427bd
JS
10393/**
10394 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
10395 * @phba: pointer to lpfc hba data structure.
10396 *
10397 * returns the number of ELS/CT
10398 **/
10399int
10400lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
10401{
10402 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
10403
10404 return max_xri;
10405}
10406
10407
52d52440
JS
10408/**
10409 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 10410 * @fw: pointer to firmware image returned from request_firmware.
ce396282 10411 * @phba: pointer to lpfc hba data structure.
52d52440 10412 *
52d52440 10413 **/
ce396282
JS
10414static void
10415lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 10416{
ce396282 10417 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 10418 char fwrev[FW_REV_STR_SIZE];
ce396282 10419 struct lpfc_grp_hdr *image;
52d52440
JS
10420 struct list_head dma_buffer_list;
10421 int i, rc = 0;
10422 struct lpfc_dmabuf *dmabuf, *next;
10423 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 10424 uint32_t magic_number, ftype, fid, fsize;
52d52440 10425
c71ab861 10426 /* It can be null in no-wait mode, sanity check */
ce396282
JS
10427 if (!fw) {
10428 rc = -ENXIO;
10429 goto out;
10430 }
10431 image = (struct lpfc_grp_hdr *)fw->data;
10432
6b6ef5db
JS
10433 magic_number = be32_to_cpu(image->magic_number);
10434 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
10435 fid = bf_get_be32(lpfc_grp_hdr_id, image),
10436 fsize = be32_to_cpu(image->size);
10437
52d52440 10438 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS
10439 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
10440 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
10441 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS
10442 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10443 "3022 Invalid FW image found. "
efe583c6 10444 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 10445 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS
10446 rc = -EINVAL;
10447 goto release_out;
52d52440
JS
10448 }
10449 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 10450 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 10451 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 10452 "3023 Updating Firmware, Current Version:%s "
52d52440 10453 "New Version:%s\n",
88a2cfbb 10454 fwrev, image->revision);
52d52440
JS
10455 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
10456 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
10457 GFP_KERNEL);
10458 if (!dmabuf) {
10459 rc = -ENOMEM;
ce396282 10460 goto release_out;
52d52440
JS
10461 }
10462 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
10463 SLI4_PAGE_SIZE,
10464 &dmabuf->phys,
10465 GFP_KERNEL);
10466 if (!dmabuf->virt) {
10467 kfree(dmabuf);
10468 rc = -ENOMEM;
ce396282 10469 goto release_out;
52d52440
JS
10470 }
10471 list_add_tail(&dmabuf->list, &dma_buffer_list);
10472 }
10473 while (offset < fw->size) {
10474 temp_offset = offset;
10475 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 10476 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS
10477 memcpy(dmabuf->virt,
10478 fw->data + temp_offset,
079b5c91
JS
10479 fw->size - temp_offset);
10480 temp_offset = fw->size;
52d52440
JS
10481 break;
10482 }
52d52440
JS
10483 memcpy(dmabuf->virt, fw->data + temp_offset,
10484 SLI4_PAGE_SIZE);
88a2cfbb 10485 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS
10486 }
10487 rc = lpfc_wr_object(phba, &dma_buffer_list,
10488 (fw->size - offset), &offset);
ce396282
JS
10489 if (rc)
10490 goto release_out;
52d52440
JS
10491 }
10492 rc = offset;
10493 }
ce396282
JS
10494
10495release_out:
52d52440
JS
10496 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
10497 list_del(&dmabuf->list);
10498 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
10499 dmabuf->virt, dmabuf->phys);
10500 kfree(dmabuf);
10501 }
ce396282
JS
10502 release_firmware(fw);
10503out:
10504 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 10505 "3024 Firmware update done: %d.\n", rc);
ce396282 10506 return;
52d52440
JS
10507}
10508
c71ab861
JS
10509/**
10510 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
10511 * @phba: pointer to lpfc hba data structure.
10512 *
10513 * This routine is called to perform Linux generic firmware upgrade on device
10514 * that supports such feature.
10515 **/
10516int
10517lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
10518{
10519 uint8_t file_name[ELX_MODEL_NAME_SIZE];
10520 int ret;
10521 const struct firmware *fw;
10522
10523 /* Only supported on SLI4 interface type 2 for now */
10524 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
10525 LPFC_SLI_INTF_IF_TYPE_2)
10526 return -EPERM;
10527
10528 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
10529
10530 if (fw_upgrade == INT_FW_UPGRADE) {
10531 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
10532 file_name, &phba->pcidev->dev,
10533 GFP_KERNEL, (void *)phba,
10534 lpfc_write_firmware);
10535 } else if (fw_upgrade == RUN_FW_UPGRADE) {
10536 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
10537 if (!ret)
10538 lpfc_write_firmware(fw, (void *)phba);
10539 } else {
10540 ret = -EINVAL;
10541 }
10542
10543 return ret;
10544}
10545
3772a991 10546/**
da0436e9 10547 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS
10548 * @pdev: pointer to PCI device
10549 * @pid: pointer to PCI device identifier
10550 *
da0436e9
JS
10551 * This routine is called from the kernel's PCI subsystem to device with
10552 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 10553 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS
10554 * information of the device and driver to see if the driver state that it
10555 * can support this kind of device. If the match is successful, the driver
10556 * core invokes this routine. If this routine determines it can claim the HBA,
10557 * it does all the initialization that it needs to do to handle the HBA
10558 * properly.
3772a991
JS
10559 *
10560 * Return code
10561 * 0 - driver can claim the device
10562 * negative value - driver can not claim the device
10563 **/
6f039790 10564static int
da0436e9 10565lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS
10566{
10567 struct lpfc_hba *phba;
10568 struct lpfc_vport *vport = NULL;
6669f9bb 10569 struct Scsi_Host *shost = NULL;
db6f1c2f 10570 int error;
3772a991
JS
10571 uint32_t cfg_mode, intr_mode;
10572
10573 /* Allocate memory for HBA structure */
10574 phba = lpfc_hba_alloc(pdev);
10575 if (!phba)
10576 return -ENOMEM;
10577
10578 /* Perform generic PCI device enabling operation */
10579 error = lpfc_enable_pci_dev(phba);
079b5c91 10580 if (error)
3772a991 10581 goto out_free_phba;
3772a991 10582
da0436e9
JS
10583 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
10584 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS
10585 if (error)
10586 goto out_disable_pci_dev;
10587
da0436e9
JS
10588 /* Set up SLI-4 specific device PCI memory space */
10589 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS
10590 if (error) {
10591 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 10592 "1410 Failed to set up pci memory space.\n");
3772a991
JS
10593 goto out_disable_pci_dev;
10594 }
10595
da0436e9
JS
10596 /* Set up SLI-4 Specific device driver resources */
10597 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS
10598 if (error) {
10599 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
10600 "1412 Failed to set up driver resource.\n");
10601 goto out_unset_pci_mem_s4;
3772a991
JS
10602 }
10603
10604 /* Initialize and populate the iocb list per host */
2a9bf3d0
JS
10605
10606 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10607 "2821 initialize iocb list %d.\n",
10608 phba->cfg_iocb_cnt*1024);
10609 error = lpfc_init_iocb_list(phba, phba->cfg_iocb_cnt*1024);
10610
3772a991
JS
10611 if (error) {
10612 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
10613 "1413 Failed to initialize iocb list.\n");
10614 goto out_unset_driver_resource_s4;
3772a991
JS
10615 }
10616
19ca7609 10617 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 10618 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 10619
3772a991
JS
10620 /* Set up common device driver resources */
10621 error = lpfc_setup_driver_resource_phase2(phba);
10622 if (error) {
10623 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 10624 "1414 Failed to set up driver resource.\n");
3772a991
JS
10625 goto out_free_iocb_list;
10626 }
10627
079b5c91
JS
10628 /* Get the default values for Model Name and Description */
10629 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10630
3772a991
JS
10631 /* Create SCSI host to the physical port */
10632 error = lpfc_create_shost(phba);
10633 if (error) {
10634 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 10635 "1415 Failed to create scsi host.\n");
3772a991
JS
10636 goto out_unset_driver_resource;
10637 }
9399627f 10638
5b75da2f 10639 /* Configure sysfs attributes */
3772a991
JS
10640 vport = phba->pport;
10641 error = lpfc_alloc_sysfs_attr(vport);
10642 if (error) {
9399627f 10643 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 10644 "1416 Failed to allocate sysfs attr\n");
3772a991 10645 goto out_destroy_shost;
98c9ea5c 10646 }
875fbdfe 10647
6669f9bb 10648 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 10649 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 10650 cfg_mode = phba->cfg_use_msi;
5b75da2f 10651
7b15db32
JS
10652 /* Put device to a known state before enabling interrupt */
10653 lpfc_stop_port(phba);
895427bd 10654
7b15db32
JS
10655 /* Configure and enable interrupt */
10656 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
10657 if (intr_mode == LPFC_INTR_ERROR) {
10658 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10659 "0426 Failed to enable interrupt.\n");
10660 error = -ENODEV;
10661 goto out_free_sysfs_attr;
10662 }
10663 /* Default to single EQ for non-MSI-X */
895427bd
JS
10664 if (phba->intr_type != MSIX) {
10665 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10666 phba->cfg_fcp_io_channel = 1;
10667 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
10668 phba->cfg_nvme_io_channel = 1;
10669 phba->io_channel_irqs = 1;
10670 }
10671
10672
7b15db32
JS
10673 /* Set up SLI-4 HBA */
10674 if (lpfc_sli4_hba_setup(phba)) {
10675 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10676 "1421 Failed to set up hba\n");
10677 error = -ENODEV;
10678 goto out_disable_intr;
98c9ea5c 10679 }
858c9f6c 10680
7b15db32
JS
10681 /* Log the current active interrupt mode */
10682 phba->intr_mode = intr_mode;
10683 lpfc_log_intr_mode(phba, intr_mode);
10684
3772a991
JS
10685 /* Perform post initialization setup */
10686 lpfc_post_init_setup(phba);
dea3101e 10687
895427bd
JS
10688 /* todo: init: register port with nvme */
10689
c71ab861
JS
10690 /* check for firmware upgrade or downgrade */
10691 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 10692 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 10693
1c6834a7
JS
10694 /* Check if there are static vports to be created. */
10695 lpfc_create_static_vport(phba);
dea3101e
JB
10696 return 0;
10697
da0436e9
JS
10698out_disable_intr:
10699 lpfc_sli4_disable_intr(phba);
5b75da2f
JS
10700out_free_sysfs_attr:
10701 lpfc_free_sysfs_attr(vport);
3772a991
JS
10702out_destroy_shost:
10703 lpfc_destroy_shost(phba);
10704out_unset_driver_resource:
10705 lpfc_unset_driver_resource_phase2(phba);
10706out_free_iocb_list:
10707 lpfc_free_iocb_list(phba);
da0436e9
JS
10708out_unset_driver_resource_s4:
10709 lpfc_sli4_driver_resource_unset(phba);
10710out_unset_pci_mem_s4:
10711 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS
10712out_disable_pci_dev:
10713 lpfc_disable_pci_dev(phba);
6669f9bb
JS
10714 if (shost)
10715 scsi_host_put(shost);
2e0fef85 10716out_free_phba:
3772a991 10717 lpfc_hba_free(phba);
dea3101e
JB
10718 return error;
10719}
10720
e59058c4 10721/**
da0436e9 10722 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS
10723 * @pdev: pointer to PCI device
10724 *
da0436e9
JS
10725 * This routine is called from the kernel's PCI subsystem to device with
10726 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS
10727 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10728 * device to be removed from the PCI subsystem properly.
e59058c4 10729 **/
6f039790 10730static void
da0436e9 10731lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 10732{
da0436e9 10733 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 10734 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 10735 struct lpfc_vport **vports;
da0436e9 10736 struct lpfc_hba *phba = vport->phba;
eada272d 10737 int i;
8a4df120 10738
da0436e9 10739 /* Mark the device unloading flag */
549e55cd 10740 spin_lock_irq(&phba->hbalock);
51ef4c26 10741 vport->load_flag |= FC_UNLOADING;
549e55cd 10742 spin_unlock_irq(&phba->hbalock);
2e0fef85 10743
da0436e9 10744 /* Free the HBA sysfs attributes */
858c9f6c
JS
10745 lpfc_free_sysfs_attr(vport);
10746
eada272d
JS
10747 /* Release all the vports against this physical port */
10748 vports = lpfc_create_vport_work_array(phba);
10749 if (vports != NULL)
587a37f6
JS
10750 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10751 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10752 continue;
eada272d 10753 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10754 }
eada272d
JS
10755 lpfc_destroy_vport_work_array(phba, vports);
10756
10757 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS
10758 fc_remove_host(shost);
10759 scsi_remove_host(shost);
da0436e9 10760
895427bd
JS
10761 /* Perform ndlp cleanup on the physical port. The nvme localport
10762 * is destroyed after to ensure all rports are io-disabled.
10763 */
87af33fe 10764 lpfc_cleanup(vport);
895427bd 10765 /* todo: init: unregister port with nvme */
87af33fe 10766
2e0fef85 10767 /*
da0436e9 10768 * Bring down the SLI Layer. This step disables all interrupts,
2e0fef85 10769 * clears the rings, discards all mailbox commands, and resets
da0436e9 10770 * the HBA FCoE function.
2e0fef85 10771 */
da0436e9
JS
10772 lpfc_debugfs_terminate(vport);
10773 lpfc_sli4_hba_unset(phba);
a257bf90 10774
858c9f6c
JS
10775 spin_lock_irq(&phba->hbalock);
10776 list_del_init(&vport->listentry);
10777 spin_unlock_irq(&phba->hbalock);
10778
3677a3a7 10779 /* Perform scsi free before driver resource_unset since scsi
da0436e9 10780 * buffers are released to their corresponding pools here.
2e0fef85
JS
10781 */
10782 lpfc_scsi_free(phba);
895427bd 10783 lpfc_nvme_free(phba);
67d12733 10784
da0436e9 10785 lpfc_sli4_driver_resource_unset(phba);
ed957684 10786
da0436e9
JS
10787 /* Unmap adapter Control and Doorbell registers */
10788 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 10789
da0436e9
JS
10790 /* Release PCI resources and disable device's PCI function */
10791 scsi_host_put(shost);
10792 lpfc_disable_pci_dev(phba);
2e0fef85 10793
da0436e9 10794 /* Finally, free the driver's device data structure */
3772a991 10795 lpfc_hba_free(phba);
2e0fef85 10796
da0436e9 10797 return;
dea3101e
JB
10798}
10799
3a55b532 10800/**
da0436e9 10801 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS
10802 * @pdev: pointer to PCI device
10803 * @msg: power management message
10804 *
da0436e9
JS
10805 * This routine is called from the kernel's PCI subsystem to support system
10806 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
10807 * this method, it quiesces the device by stopping the driver's worker
10808 * thread for the device, turning off device's interrupt and DMA, and bring
10809 * the device offline. Note that as the driver implements the minimum PM
10810 * requirements to a power-aware driver's PM support for suspend/resume -- all
10811 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
10812 * method call will be treated as SUSPEND and the driver will fully
10813 * reinitialize its device during resume() method call, the driver will set
10814 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 10815 * according to the @msg provided by the PM.
3a55b532
JS
10816 *
10817 * Return code
3772a991
JS
10818 * 0 - driver suspended the device
10819 * Error otherwise
3a55b532
JS
10820 **/
10821static int
da0436e9 10822lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS
10823{
10824 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10825 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10826
10827 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 10828 "2843 PCI device Power Management suspend.\n");
3a55b532
JS
10829
10830 /* Bring down the device */
618a5230 10831 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS
10832 lpfc_offline(phba);
10833 kthread_stop(phba->worker_thread);
10834
10835 /* Disable interrupt from device */
da0436e9 10836 lpfc_sli4_disable_intr(phba);
5350d872 10837 lpfc_sli4_queue_destroy(phba);
3a55b532
JS
10838
10839 /* Save device state to PCI config space */
10840 pci_save_state(pdev);
10841 pci_set_power_state(pdev, PCI_D3hot);
10842
10843 return 0;
10844}
10845
10846/**
da0436e9 10847 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS
10848 * @pdev: pointer to PCI device
10849 *
da0436e9
JS
10850 * This routine is called from the kernel's PCI subsystem to support system
10851 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
10852 * this method, it restores the device's PCI config space state and fully
10853 * reinitializes the device and brings it online. Note that as the driver
10854 * implements the minimum PM requirements to a power-aware driver's PM for
10855 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10856 * to the suspend() method call will be treated as SUSPEND and the driver
10857 * will fully reinitialize its device during resume() method call, the device
10858 * will be set to PCI_D0 directly in PCI config space before restoring the
10859 * state.
3a55b532
JS
10860 *
10861 * Return code
3772a991
JS
10862 * 0 - driver suspended the device
10863 * Error otherwise
3a55b532
JS
10864 **/
10865static int
da0436e9 10866lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS
10867{
10868 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10869 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 10870 uint32_t intr_mode;
3a55b532
JS
10871 int error;
10872
10873 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 10874 "0292 PCI device Power Management resume.\n");
3a55b532
JS
10875
10876 /* Restore device state from PCI config space */
10877 pci_set_power_state(pdev, PCI_D0);
10878 pci_restore_state(pdev);
1dfb5a47
JS
10879
10880 /*
10881 * As the new kernel behavior of pci_restore_state() API call clears
10882 * device saved_state flag, need to save the restored state again.
10883 */
10884 pci_save_state(pdev);
10885
3a55b532
JS
10886 if (pdev->is_busmaster)
10887 pci_set_master(pdev);
10888
da0436e9 10889 /* Startup the kernel thread for this host adapter. */
3a55b532
JS
10890 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10891 "lpfc_worker_%d", phba->brd_no);
10892 if (IS_ERR(phba->worker_thread)) {
10893 error = PTR_ERR(phba->worker_thread);
10894 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 10895 "0293 PM resume failed to start worker "
3a55b532
JS
10896 "thread: error=x%x.\n", error);
10897 return error;
10898 }
10899
5b75da2f 10900 /* Configure and enable interrupt */
da0436e9 10901 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 10902 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 10903 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 10904 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS
10905 return -EIO;
10906 } else
10907 phba->intr_mode = intr_mode;
3a55b532
JS
10908
10909 /* Restart HBA and bring it online */
10910 lpfc_sli_brdrestart(phba);
10911 lpfc_online(phba);
10912
5b75da2f
JS
10913 /* Log the current active interrupt mode */
10914 lpfc_log_intr_mode(phba, phba->intr_mode);
10915
3a55b532
JS
10916 return 0;
10917}
10918
75baf696
JS
10919/**
10920 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
10921 * @phba: pointer to lpfc hba data structure.
10922 *
10923 * This routine is called to prepare the SLI4 device for PCI slot recover. It
10924 * aborts all the outstanding SCSI I/Os to the pci device.
10925 **/
10926static void
10927lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
10928{
75baf696
JS
10929 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10930 "2828 PCI channel I/O abort preparing for recovery\n");
10931 /*
10932 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10933 * and let the SCSI mid-layer to retry them to recover.
10934 */
db55fba8 10935 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS
10936}
10937
10938/**
10939 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
10940 * @phba: pointer to lpfc hba data structure.
10941 *
10942 * This routine is called to prepare the SLI4 device for PCI slot reset. It
10943 * disables the device interrupt and pci device, and aborts the internal FCP
10944 * pending I/Os.
10945 **/
10946static void
10947lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
10948{
10949 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10950 "2826 PCI channel disable preparing for reset\n");
10951
10952 /* Block any management I/Os to the device */
618a5230 10953 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS
10954
10955 /* Block all SCSI devices' I/Os on the host */
10956 lpfc_scsi_dev_block(phba);
10957
ea714f3d
JS
10958 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10959 lpfc_sli_flush_fcp_rings(phba);
10960
75baf696
JS
10961 /* stop all timers */
10962 lpfc_stop_hba_timers(phba);
10963
10964 /* Disable interrupt and pci device */
10965 lpfc_sli4_disable_intr(phba);
5350d872 10966 lpfc_sli4_queue_destroy(phba);
75baf696 10967 pci_disable_device(phba->pcidev);
75baf696
JS
10968}
10969
10970/**
10971 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
10972 * @phba: pointer to lpfc hba data structure.
10973 *
10974 * This routine is called to prepare the SLI4 device for PCI slot permanently
10975 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10976 * pending I/Os.
10977 **/
10978static void
10979lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
10980{
10981 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10982 "2827 PCI channel permanent disable for failure\n");
10983
10984 /* Block all SCSI devices' I/Os on the host */
10985 lpfc_scsi_dev_block(phba);
10986
10987 /* stop all timers */
10988 lpfc_stop_hba_timers(phba);
10989
10990 /* Clean up all driver's outstanding SCSI I/Os */
10991 lpfc_sli_flush_fcp_rings(phba);
10992}
10993
8d63f375 10994/**
da0436e9 10995 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS
10996 * @pdev: pointer to PCI device.
10997 * @state: the current PCI connection state.
8d63f375 10998 *
da0436e9
JS
10999 * This routine is called from the PCI subsystem for error handling to device
11000 * with SLI-4 interface spec. This function is called by the PCI subsystem
11001 * after a PCI bus error affecting this device has been detected. When this
11002 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11003 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11004 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS
11005 *
11006 * Return codes
3772a991
JS
11007 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11008 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11009 **/
3772a991 11010static pci_ers_result_t
da0436e9 11011lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11012{
75baf696
JS
11013 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11014 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11015
11016 switch (state) {
11017 case pci_channel_io_normal:
11018 /* Non-fatal error, prepare for recovery */
11019 lpfc_sli4_prep_dev_for_recover(phba);
11020 return PCI_ERS_RESULT_CAN_RECOVER;
11021 case pci_channel_io_frozen:
11022 /* Fatal error, prepare for slot reset */
11023 lpfc_sli4_prep_dev_for_reset(phba);
11024 return PCI_ERS_RESULT_NEED_RESET;
11025 case pci_channel_io_perm_failure:
11026 /* Permanent failure, prepare for device down */
11027 lpfc_sli4_prep_dev_for_perm_failure(phba);
11028 return PCI_ERS_RESULT_DISCONNECT;
11029 default:
11030 /* Unknown state, prepare and request slot reset */
11031 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11032 "2825 Unknown PCI error state: x%x\n", state);
11033 lpfc_sli4_prep_dev_for_reset(phba);
11034 return PCI_ERS_RESULT_NEED_RESET;
11035 }
8d63f375
LV
11036}
11037
11038/**
da0436e9 11039 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS
11040 * @pdev: pointer to PCI device.
11041 *
da0436e9
JS
11042 * This routine is called from the PCI subsystem for error handling to device
11043 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11044 * restart the PCI card from scratch, as if from a cold-boot. During the
11045 * PCI subsystem error recovery, after the driver returns
3772a991 11046 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS
11047 * recovery and then call this routine before calling the .resume method to
11048 * recover the device. This function will initialize the HBA device, enable
11049 * the interrupt, but it will just put the HBA to offline state without
11050 * passing any I/O traffic.
8d63f375 11051 *
e59058c4 11052 * Return codes
3772a991
JS
11053 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11054 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11055 */
3772a991 11056static pci_ers_result_t
da0436e9 11057lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11058{
75baf696
JS
11059 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11060 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11061 struct lpfc_sli *psli = &phba->sli;
11062 uint32_t intr_mode;
11063
11064 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11065 if (pci_enable_device_mem(pdev)) {
11066 printk(KERN_ERR "lpfc: Cannot re-enable "
11067 "PCI device after reset.\n");
11068 return PCI_ERS_RESULT_DISCONNECT;
11069 }
11070
11071 pci_restore_state(pdev);
0a96e975
JS
11072
11073 /*
11074 * As the new kernel behavior of pci_restore_state() API call clears
11075 * device saved_state flag, need to save the restored state again.
11076 */
11077 pci_save_state(pdev);
11078
75baf696
JS
11079 if (pdev->is_busmaster)
11080 pci_set_master(pdev);
11081
11082 spin_lock_irq(&phba->hbalock);
11083 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11084 spin_unlock_irq(&phba->hbalock);
11085
11086 /* Configure and enable interrupt */
11087 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11088 if (intr_mode == LPFC_INTR_ERROR) {
11089 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11090 "2824 Cannot re-enable interrupt after "
11091 "slot reset.\n");
11092 return PCI_ERS_RESULT_DISCONNECT;
11093 } else
11094 phba->intr_mode = intr_mode;
11095
11096 /* Log the current active interrupt mode */
11097 lpfc_log_intr_mode(phba, phba->intr_mode);
11098
8d63f375
LV
11099 return PCI_ERS_RESULT_RECOVERED;
11100}
11101
11102/**
da0436e9 11103 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11104 * @pdev: pointer to PCI device
8d63f375 11105 *
3772a991 11106 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11107 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS
11108 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11109 * error recovery. After this call, traffic can start to flow from this device
11110 * again.
da0436e9 11111 **/
3772a991 11112static void
da0436e9 11113lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11114{
75baf696
JS
11115 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11116 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11117
11118 /*
11119 * In case of slot reset, as function reset is performed through
11120 * mailbox command which needs DMA to be enabled, this operation
11121 * has to be moved to the io resume phase. Taking device offline
11122 * will perform the necessary cleanup.
11123 */
11124 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11125 /* Perform device reset */
618a5230 11126 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS
11127 lpfc_offline(phba);
11128 lpfc_sli_brdrestart(phba);
11129 /* Bring the device back online */
11130 lpfc_online(phba);
11131 }
11132
11133 /* Clean up Advanced Error Reporting (AER) if needed */
11134 if (phba->hba_flag & HBA_AER_ENABLED)
11135 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV
11136}
11137
3772a991
JS
11138/**
11139 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11140 * @pdev: pointer to PCI device
11141 * @pid: pointer to PCI device identifier
11142 *
11143 * This routine is to be registered to the kernel's PCI subsystem. When an
11144 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11145 * at PCI device-specific information of the device and driver to see if the
11146 * driver state that it can support this kind of device. If the match is
11147 * successful, the driver core invokes this routine. This routine dispatches
11148 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11149 * do all the initialization that it needs to do to handle the HBA device
11150 * properly.
11151 *
11152 * Return code
11153 * 0 - driver can claim the device
11154 * negative value - driver can not claim the device
11155 **/
6f039790 11156static int
3772a991
JS
11157lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11158{
11159 int rc;
8fa38513 11160 struct lpfc_sli_intf intf;
3772a991 11161
28baac74 11162 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS
11163 return -ENODEV;
11164
8fa38513 11165 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11166 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11167 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11168 else
3772a991 11169 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11170
3772a991
JS
11171 return rc;
11172}
11173
11174/**
11175 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11176 * @pdev: pointer to PCI device
11177 *
11178 * This routine is to be registered to the kernel's PCI subsystem. When an
11179 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11180 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11181 * remove routine, which will perform all the necessary cleanup for the
11182 * device to be removed from the PCI subsystem properly.
11183 **/
6f039790 11184static void
3772a991
JS
11185lpfc_pci_remove_one(struct pci_dev *pdev)
11186{
11187 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11188 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11189
11190 switch (phba->pci_dev_grp) {
11191 case LPFC_PCI_DEV_LP:
11192 lpfc_pci_remove_one_s3(pdev);
11193 break;
da0436e9
JS
11194 case LPFC_PCI_DEV_OC:
11195 lpfc_pci_remove_one_s4(pdev);
11196 break;
3772a991
JS
11197 default:
11198 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11199 "1424 Invalid PCI device group: 0x%x\n",
11200 phba->pci_dev_grp);
11201 break;
11202 }
11203 return;
11204}
11205
11206/**
11207 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11208 * @pdev: pointer to PCI device
11209 * @msg: power management message
11210 *
11211 * This routine is to be registered to the kernel's PCI subsystem to support
11212 * system Power Management (PM). When PM invokes this method, it dispatches
11213 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11214 * suspend the device.
11215 *
11216 * Return code
11217 * 0 - driver suspended the device
11218 * Error otherwise
11219 **/
11220static int
11221lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11222{
11223 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11224 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11225 int rc = -ENODEV;
11226
11227 switch (phba->pci_dev_grp) {
11228 case LPFC_PCI_DEV_LP:
11229 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11230 break;
da0436e9
JS
11231 case LPFC_PCI_DEV_OC:
11232 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11233 break;
3772a991
JS
11234 default:
11235 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11236 "1425 Invalid PCI device group: 0x%x\n",
11237 phba->pci_dev_grp);
11238 break;
11239 }
11240 return rc;
11241}
11242
11243/**
11244 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
11245 * @pdev: pointer to PCI device
11246 *
11247 * This routine is to be registered to the kernel's PCI subsystem to support
11248 * system Power Management (PM). When PM invokes this method, it dispatches
11249 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
11250 * resume the device.
11251 *
11252 * Return code
11253 * 0 - driver suspended the device
11254 * Error otherwise
11255 **/
11256static int
11257lpfc_pci_resume_one(struct pci_dev *pdev)
11258{
11259 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11260 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11261 int rc = -ENODEV;
11262
11263 switch (phba->pci_dev_grp) {
11264 case LPFC_PCI_DEV_LP:
11265 rc = lpfc_pci_resume_one_s3(pdev);
11266 break;
da0436e9
JS
11267 case LPFC_PCI_DEV_OC:
11268 rc = lpfc_pci_resume_one_s4(pdev);
11269 break;
3772a991
JS
11270 default:
11271 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11272 "1426 Invalid PCI device group: 0x%x\n",
11273 phba->pci_dev_grp);
11274 break;
11275 }
11276 return rc;
11277}
11278
11279/**
11280 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
11281 * @pdev: pointer to PCI device.
11282 * @state: the current PCI connection state.
11283 *
11284 * This routine is registered to the PCI subsystem for error handling. This
11285 * function is called by the PCI subsystem after a PCI bus error affecting
11286 * this device has been detected. When this routine is invoked, it dispatches
11287 * the action to the proper SLI-3 or SLI-4 device error detected handling
11288 * routine, which will perform the proper error detected operation.
11289 *
11290 * Return codes
11291 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11292 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11293 **/
11294static pci_ers_result_t
11295lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
11296{
11297 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11298 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11299 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11300
11301 switch (phba->pci_dev_grp) {
11302 case LPFC_PCI_DEV_LP:
11303 rc = lpfc_io_error_detected_s3(pdev, state);
11304 break;
da0436e9
JS
11305 case LPFC_PCI_DEV_OC:
11306 rc = lpfc_io_error_detected_s4(pdev, state);
11307 break;
3772a991
JS
11308 default:
11309 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11310 "1427 Invalid PCI device group: 0x%x\n",
11311 phba->pci_dev_grp);
11312 break;
11313 }
11314 return rc;
11315}
11316
11317/**
11318 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
11319 * @pdev: pointer to PCI device.
11320 *
11321 * This routine is registered to the PCI subsystem for error handling. This
11322 * function is called after PCI bus has been reset to restart the PCI card
11323 * from scratch, as if from a cold-boot. When this routine is invoked, it
11324 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
11325 * routine, which will perform the proper device reset.
11326 *
11327 * Return codes
11328 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11329 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11330 **/
11331static pci_ers_result_t
11332lpfc_io_slot_reset(struct pci_dev *pdev)
11333{
11334 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11335 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11336 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11337
11338 switch (phba->pci_dev_grp) {
11339 case LPFC_PCI_DEV_LP:
11340 rc = lpfc_io_slot_reset_s3(pdev);
11341 break;
da0436e9
JS
11342 case LPFC_PCI_DEV_OC:
11343 rc = lpfc_io_slot_reset_s4(pdev);
11344 break;
3772a991
JS
11345 default:
11346 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11347 "1428 Invalid PCI device group: 0x%x\n",
11348 phba->pci_dev_grp);
11349 break;
11350 }
11351 return rc;
11352}
11353
11354/**
11355 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
11356 * @pdev: pointer to PCI device
11357 *
11358 * This routine is registered to the PCI subsystem for error handling. It
11359 * is called when kernel error recovery tells the lpfc driver that it is
11360 * OK to resume normal PCI operation after PCI bus error recovery. When
11361 * this routine is invoked, it dispatches the action to the proper SLI-3
11362 * or SLI-4 device io_resume routine, which will resume the device operation.
11363 **/
11364static void
11365lpfc_io_resume(struct pci_dev *pdev)
11366{
11367 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11368 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11369
11370 switch (phba->pci_dev_grp) {
11371 case LPFC_PCI_DEV_LP:
11372 lpfc_io_resume_s3(pdev);
11373 break;
da0436e9
JS
11374 case LPFC_PCI_DEV_OC:
11375 lpfc_io_resume_s4(pdev);
11376 break;
3772a991
JS
11377 default:
11378 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11379 "1429 Invalid PCI device group: 0x%x\n",
11380 phba->pci_dev_grp);
11381 break;
11382 }
11383 return;
11384}
11385
1ba981fd
JS
11386/**
11387 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
11388 * @phba: pointer to lpfc hba data structure.
11389 *
11390 * This routine checks to see if OAS is supported for this adapter. If
11391 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
11392 * the enable oas flag is cleared and the pool created for OAS device data
11393 * is destroyed.
11394 *
11395 **/
11396void
11397lpfc_sli4_oas_verify(struct lpfc_hba *phba)
11398{
11399
11400 if (!phba->cfg_EnableXLane)
11401 return;
11402
11403 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
11404 phba->cfg_fof = 1;
11405 } else {
f38fa0bb 11406 phba->cfg_fof = 0;
1ba981fd
JS
11407 if (phba->device_data_mem_pool)
11408 mempool_destroy(phba->device_data_mem_pool);
11409 phba->device_data_mem_pool = NULL;
11410 }
11411
11412 return;
11413}
11414
11415/**
11416 * lpfc_fof_queue_setup - Set up all the fof queues
11417 * @phba: pointer to lpfc hba data structure.
11418 *
11419 * This routine is invoked to set up all the fof queues for the FC HBA
11420 * operation.
11421 *
11422 * Return codes
11423 * 0 - successful
11424 * -ENOMEM - No available memory
11425 **/
11426int
11427lpfc_fof_queue_setup(struct lpfc_hba *phba)
11428{
895427bd 11429 struct lpfc_sli_ring *pring;
1ba981fd
JS
11430 int rc;
11431
11432 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
11433 if (rc)
11434 return -ENOMEM;
11435
f38fa0bb 11436 if (phba->cfg_fof) {
1ba981fd
JS
11437
11438 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
11439 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
11440 if (rc)
11441 goto out_oas_cq;
11442
11443 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
11444 phba->sli4_hba.oas_cq, LPFC_FCP);
11445 if (rc)
11446 goto out_oas_wq;
11447
895427bd
JS
11448 /* Bind this CQ/WQ to the NVME ring */
11449 pring = phba->sli4_hba.oas_wq->pring;
11450 pring->sli.sli4.wqp =
11451 (void *)phba->sli4_hba.oas_wq;
11452 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS
11453 }
11454
11455 return 0;
11456
11457out_oas_wq:
f38fa0bb 11458 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS
11459out_oas_cq:
11460 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
11461 return rc;
11462
11463}
11464
11465/**
11466 * lpfc_fof_queue_create - Create all the fof queues
11467 * @phba: pointer to lpfc hba data structure.
11468 *
11469 * This routine is invoked to allocate all the fof queues for the FC HBA
11470 * operation. For each SLI4 queue type, the parameters such as queue entry
11471 * count (queue depth) shall be taken from the module parameter. For now,
11472 * we just use some constant number as place holder.
11473 *
11474 * Return codes
11475 * 0 - successful
11476 * -ENOMEM - No availble memory
11477 * -EIO - The mailbox failed to complete successfully.
11478 **/
11479int
11480lpfc_fof_queue_create(struct lpfc_hba *phba)
11481{
11482 struct lpfc_queue *qdesc;
11483
11484 /* Create FOF EQ */
11485 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
11486 phba->sli4_hba.eq_ecount);
11487 if (!qdesc)
11488 goto out_error;
11489
11490 phba->sli4_hba.fof_eq = qdesc;
11491
f38fa0bb 11492 if (phba->cfg_fof) {
1ba981fd
JS
11493
11494 /* Create OAS CQ */
11495 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
11496 phba->sli4_hba.cq_ecount);
11497 if (!qdesc)
11498 goto out_error;
11499
11500 phba->sli4_hba.oas_cq = qdesc;
11501
11502 /* Create OAS WQ */
11503 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
11504 phba->sli4_hba.wq_ecount);
11505 if (!qdesc)
11506 goto out_error;
11507
11508 phba->sli4_hba.oas_wq = qdesc;
895427bd 11509 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS
11510
11511 }
11512 return 0;
11513
11514out_error:
11515 lpfc_fof_queue_destroy(phba);
11516 return -ENOMEM;
11517}
11518
11519/**
11520 * lpfc_fof_queue_destroy - Destroy all the fof queues
11521 * @phba: pointer to lpfc hba data structure.
11522 *
11523 * This routine is invoked to release all the SLI4 queues with the FC HBA
11524 * operation.
11525 *
11526 * Return codes
11527 * 0 - successful
11528 **/
11529int
11530lpfc_fof_queue_destroy(struct lpfc_hba *phba)
11531{
11532 /* Release FOF Event queue */
11533 if (phba->sli4_hba.fof_eq != NULL) {
11534 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
11535 phba->sli4_hba.fof_eq = NULL;
11536 }
11537
11538 /* Release OAS Completion queue */
11539 if (phba->sli4_hba.oas_cq != NULL) {
11540 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
11541 phba->sli4_hba.oas_cq = NULL;
11542 }
11543
11544 /* Release OAS Work queue */
11545 if (phba->sli4_hba.oas_wq != NULL) {
11546 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
11547 phba->sli4_hba.oas_wq = NULL;
11548 }
11549 return 0;
11550}
11551
dea3101e
JB
11552MODULE_DEVICE_TABLE(pci, lpfc_id_table);
11553
a55b2d21 11554static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV
11555 .error_detected = lpfc_io_error_detected,
11556 .slot_reset = lpfc_io_slot_reset,
11557 .resume = lpfc_io_resume,
11558};
11559
dea3101e
JB
11560static struct pci_driver lpfc_driver = {
11561 .name = LPFC_DRIVER_NAME,
11562 .id_table = lpfc_id_table,
11563 .probe = lpfc_pci_probe_one,
6f039790 11564 .remove = lpfc_pci_remove_one,
3a55b532 11565 .suspend = lpfc_pci_suspend_one,
3772a991 11566 .resume = lpfc_pci_resume_one,
2e0fef85 11567 .err_handler = &lpfc_err_handler,
dea3101e
JB
11568};
11569
3ef6d24c 11570static const struct file_operations lpfc_mgmt_fop = {
858feacd 11571 .owner = THIS_MODULE,
3ef6d24c
JS
11572};
11573
11574static struct miscdevice lpfc_mgmt_dev = {
11575 .minor = MISC_DYNAMIC_MINOR,
11576 .name = "lpfcmgmt",
11577 .fops = &lpfc_mgmt_fop,
11578};
11579
e59058c4 11580/**
3621a710 11581 * lpfc_init - lpfc module initialization routine
e59058c4
JS
11582 *
11583 * This routine is to be invoked when the lpfc module is loaded into the
11584 * kernel. The special kernel macro module_init() is used to indicate the
11585 * role of this routine to the kernel as lpfc module entry point.
11586 *
11587 * Return codes
11588 * 0 - successful
11589 * -ENOMEM - FC attach transport failed
11590 * all others - failed
11591 */
dea3101e
JB
11592static int __init
11593lpfc_init(void)
11594{
11595 int error = 0;
11596
11597 printk(LPFC_MODULE_DESC "\n");
c44ce173 11598 printk(LPFC_COPYRIGHT "\n");
dea3101e 11599
3ef6d24c
JS
11600 error = misc_register(&lpfc_mgmt_dev);
11601 if (error)
11602 printk(KERN_ERR "Could not register lpfcmgmt device, "
11603 "misc_register returned with status %d", error);
11604
458c083e
JS
11605 lpfc_transport_functions.vport_create = lpfc_vport_create;
11606 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e
JB
11607 lpfc_transport_template =
11608 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 11609 if (lpfc_transport_template == NULL)
dea3101e 11610 return -ENOMEM;
458c083e
JS
11611 lpfc_vport_transport_template =
11612 fc_attach_transport(&lpfc_vport_transport_functions);
11613 if (lpfc_vport_transport_template == NULL) {
11614 fc_release_transport(lpfc_transport_template);
11615 return -ENOMEM;
7ee5d43e 11616 }
7bb03bbf
JS
11617
11618 /* Initialize in case vector mapping is needed */
b246de17 11619 lpfc_used_cpu = NULL;
2ea259ee 11620 lpfc_present_cpu = num_present_cpus();
7bb03bbf 11621
dea3101e 11622 error = pci_register_driver(&lpfc_driver);
92d7f7b0 11623 if (error) {
dea3101e 11624 fc_release_transport(lpfc_transport_template);
458c083e 11625 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 11626 }
dea3101e
JB
11627
11628 return error;
11629}
11630
e59058c4 11631/**
3621a710 11632 * lpfc_exit - lpfc module removal routine
e59058c4
JS
11633 *
11634 * This routine is invoked when the lpfc module is removed from the kernel.
11635 * The special kernel macro module_exit() is used to indicate the role of
11636 * this routine to the kernel as lpfc module exit point.
11637 */
dea3101e
JB
11638static void __exit
11639lpfc_exit(void)
11640{
3ef6d24c 11641 misc_deregister(&lpfc_mgmt_dev);
dea3101e
JB
11642 pci_unregister_driver(&lpfc_driver);
11643 fc_release_transport(lpfc_transport_template);
458c083e 11644 fc_release_transport(lpfc_vport_transport_template);
81301a9b 11645 if (_dump_buf_data) {
6a9c52cf
JS
11646 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
11647 "_dump_buf_data at 0x%p\n",
81301a9b
JS
11648 (1L << _dump_buf_data_order), _dump_buf_data);
11649 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
11650 }
11651
11652 if (_dump_buf_dif) {
6a9c52cf
JS
11653 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
11654 "_dump_buf_dif at 0x%p\n",
81301a9b
JS
11655 (1L << _dump_buf_dif_order), _dump_buf_dif);
11656 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
11657 }
b246de17 11658 kfree(lpfc_used_cpu);
7973967f 11659 idr_destroy(&lpfc_hba_index);
dea3101e
JB
11660}
11661
11662module_init(lpfc_init);
11663module_exit(lpfc_exit);
11664MODULE_LICENSE("GPL");
11665MODULE_DESCRIPTION(LPFC_MODULE_DESC);
11666MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com");
11667MODULE_VERSION("0:" LPFC_DRIVER_VERSION);