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CommitLineData
dea3101e
JB
1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS
4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB
10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e
JB
22 *******************************************************************/
23
dea3101e
JB
24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e
JB
30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
dea3101e 40
91886523 41#include <scsi/scsi.h>
dea3101e
JB
42#include <scsi/scsi_device.h>
43#include <scsi/scsi_host.h>
44#include <scsi/scsi_transport_fc.h>
45
da0436e9 46#include "lpfc_hw4.h"
dea3101e
JB
47#include "lpfc_hw.h"
48#include "lpfc_sli.h"
da0436e9 49#include "lpfc_sli4.h"
ea2151b4 50#include "lpfc_nl.h"
dea3101e 51#include "lpfc_disc.h"
dea3101e 52#include "lpfc.h"
895427bd
JS
53#include "lpfc_scsi.h"
54#include "lpfc_nvme.h"
dea3101e
JB
55#include "lpfc_logmsg.h"
56#include "lpfc_crtn.h"
92d7f7b0 57#include "lpfc_vport.h"
dea3101e 58#include "lpfc_version.h"
12f44457 59#include "lpfc_ids.h"
dea3101e 60
81301a9b
JS
61char *_dump_buf_data;
62unsigned long _dump_buf_data_order;
63char *_dump_buf_dif;
64unsigned long _dump_buf_dif_order;
65spinlock_t _dump_buf_lock;
66
7bb03bbf 67/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS
68uint16_t *lpfc_used_cpu;
69uint32_t lpfc_present_cpu;
7bb03bbf 70
dea3101e
JB
71static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
72static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 73static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS
74static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
75static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 76static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 77static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 78static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 79static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS
80static int lpfc_init_active_sgl_array(struct lpfc_hba *);
81static void lpfc_free_active_sgl(struct lpfc_hba *);
82static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
83static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
84static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
85static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
86static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS
87static void lpfc_sli4_disable_intr(struct lpfc_hba *);
88static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 89static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e
JB
90
91static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 92static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 93static DEFINE_IDR(lpfc_hba_index);
f358dd0c 94#define LPFC_NVMET_BUF_POST 254
dea3101e 95
e59058c4 96/**
3621a710 97 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS
98 * @phba: pointer to lpfc hba data structure.
99 *
100 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
101 * mailbox command. It retrieves the revision information from the HBA and
102 * collects the Vital Product Data (VPD) about the HBA for preparing the
103 * configuration of the HBA.
104 *
105 * Return codes:
106 * 0 - success.
107 * -ERESTART - requests the SLI layer to reset the HBA and try again.
108 * Any other value - indicates an error.
109 **/
dea3101e 110int
2e0fef85 111lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e
JB
112{
113 lpfc_vpd_t *vp = &phba->vpd;
114 int i = 0, rc;
115 LPFC_MBOXQ_t *pmb;
116 MAILBOX_t *mb;
117 char *lpfc_vpd_data = NULL;
118 uint16_t offset = 0;
119 static char licensed[56] =
120 "key unlock for use with gnu public licensed code only\0";
65a29c16 121 static int init_key = 1;
dea3101e
JB
122
123 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
124 if (!pmb) {
2e0fef85 125 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
126 return -ENOMEM;
127 }
128
04c68496 129 mb = &pmb->u.mb;
2e0fef85 130 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
131
132 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS
133 if (init_key) {
134 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 135
65a29c16
JS
136 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
137 *ptext = cpu_to_be32(*ptext);
138 init_key = 0;
139 }
dea3101e
JB
140
141 lpfc_read_nv(phba, pmb);
142 memset((char*)mb->un.varRDnvp.rsvd3, 0,
143 sizeof (mb->un.varRDnvp.rsvd3));
144 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
145 sizeof (licensed));
146
147 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
148
149 if (rc != MBX_SUCCESS) {
ed957684 150 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 151 "0324 Config Port initialization "
dea3101e
JB
152 "error, mbxCmd x%x READ_NVPARM, "
153 "mbxStatus x%x\n",
dea3101e
JB
154 mb->mbxCommand, mb->mbxStatus);
155 mempool_free(pmb, phba->mbox_mem_pool);
156 return -ERESTART;
157 }
158 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS
159 sizeof(phba->wwnn));
160 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
161 sizeof(phba->wwpn));
dea3101e
JB
162 }
163
92d7f7b0
JS
164 phba->sli3_options = 0x0;
165
dea3101e
JB
166 /* Setup and issue mailbox READ REV command */
167 lpfc_read_rev(phba, pmb);
168 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
169 if (rc != MBX_SUCCESS) {
ed957684 170 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 171 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 172 "READ_REV, mbxStatus x%x\n",
dea3101e
JB
173 mb->mbxCommand, mb->mbxStatus);
174 mempool_free( pmb, phba->mbox_mem_pool);
175 return -ERESTART;
176 }
177
92d7f7b0 178
1de933f3
JSEC
179 /*
180 * The value of rr must be 1 since the driver set the cv field to 1.
181 * This setting requires the FW to set all revision fields.
dea3101e 182 */
1de933f3 183 if (mb->un.varRdRev.rr == 0) {
dea3101e 184 vp->rev.rBit = 0;
1de933f3 185 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS
186 "0440 Adapter failed to init, READ_REV has "
187 "missing revision information.\n");
dea3101e
JB
188 mempool_free(pmb, phba->mbox_mem_pool);
189 return -ERESTART;
dea3101e
JB
190 }
191
495a714c
JS
192 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
193 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 194 return -EINVAL;
495a714c 195 }
ed957684 196
dea3101e 197 /* Save information as VPD data */
1de933f3 198 vp->rev.rBit = 1;
92d7f7b0 199 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC
200 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
201 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
202 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
203 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e
JB
204 vp->rev.biuRev = mb->un.varRdRev.biuRev;
205 vp->rev.smRev = mb->un.varRdRev.smRev;
206 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
207 vp->rev.endecRev = mb->un.varRdRev.endecRev;
208 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
209 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
210 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
211 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
212 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
213 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
214
92d7f7b0
JS
215 /* If the sli feature level is less then 9, we must
216 * tear down all RPIs and VPIs on link down if NPIV
217 * is enabled.
218 */
219 if (vp->rev.feaLevelHigh < 9)
220 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
221
dea3101e
JB
222 if (lpfc_is_LC_HBA(phba->pcidev->device))
223 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
224 sizeof (phba->RandomData));
225
dea3101e 226 /* Get adapter VPD information */
dea3101e
JB
227 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
228 if (!lpfc_vpd_data)
d7c255b2 229 goto out_free_mbox;
dea3101e 230 do {
a0c87cbd 231 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e
JB
232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
233
234 if (rc != MBX_SUCCESS) {
235 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 236 "0441 VPD not present on adapter, "
dea3101e 237 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 238 mb->mbxCommand, mb->mbxStatus);
74b72a59 239 mb->un.varDmp.word_cnt = 0;
dea3101e 240 }
04c68496
JS
241 /* dump mem may return a zero when finished or we got a
242 * mailbox error, either way we are done.
243 */
244 if (mb->un.varDmp.word_cnt == 0)
245 break;
74b72a59
JW
246 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
247 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS
248 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
249 lpfc_vpd_data + offset,
92d7f7b0 250 mb->un.varDmp.word_cnt);
dea3101e 251 offset += mb->un.varDmp.word_cnt;
74b72a59
JW
252 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
253 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e
JB
254
255 kfree(lpfc_vpd_data);
dea3101e
JB
256out_free_mbox:
257 mempool_free(pmb, phba->mbox_mem_pool);
258 return 0;
259}
260
e59058c4 261/**
3621a710 262 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS
263 * @phba: pointer to lpfc hba data structure.
264 * @pmboxq: pointer to the driver internal queue element for mailbox command.
265 *
266 * This is the completion handler for driver's configuring asynchronous event
267 * mailbox command to the device. If the mailbox command returns successfully,
268 * it will set internal async event support flag to 1; otherwise, it will
269 * set internal async event support flag to 0.
270 **/
57127f15
JS
271static void
272lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
273{
04c68496 274 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS
275 phba->temp_sensor_support = 1;
276 else
277 phba->temp_sensor_support = 0;
278 mempool_free(pmboxq, phba->mbox_mem_pool);
279 return;
280}
281
97207482 282/**
3621a710 283 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS
284 * @phba: pointer to lpfc hba data structure.
285 * @pmboxq: pointer to the driver internal queue element for mailbox command.
286 *
287 * This is the completion handler for dump mailbox command for getting
288 * wake up parameters. When this command complete, the response contain
289 * Option rom version of the HBA. This function translate the version number
290 * into a human readable string and store it in OptionROMVersion.
291 **/
292static void
293lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
294{
295 struct prog_id *prg;
296 uint32_t prog_id_word;
297 char dist = ' ';
298 /* character array used for decoding dist type. */
299 char dist_char[] = "nabx";
300
04c68496 301 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 302 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 303 return;
9f1e1b50 304 }
97207482
JS
305
306 prg = (struct prog_id *) &prog_id_word;
307
308 /* word 7 contain option rom version */
04c68496 309 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS
310
311 /* Decode the Option rom version word to a readable string */
312 if (prg->dist < 4)
313 dist = dist_char[prg->dist];
314
315 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 316 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS
317 prg->ver, prg->rev, prg->lev);
318 else
a2fc4aef 319 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS
320 prg->ver, prg->rev, prg->lev,
321 dist, prg->num);
9f1e1b50 322 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS
323 return;
324}
325
0558056c
JS
326/**
327 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
328 * cfg_soft_wwnn, cfg_soft_wwpn
329 * @vport: pointer to lpfc vport data structure.
330 *
331 *
332 * Return codes
333 * None.
334 **/
335void
336lpfc_update_vport_wwn(struct lpfc_vport *vport)
337{
338 /* If the soft name exists then update it using the service params */
339 if (vport->phba->cfg_soft_wwnn)
340 u64_to_wwn(vport->phba->cfg_soft_wwnn,
341 vport->fc_sparam.nodeName.u.wwn);
342 if (vport->phba->cfg_soft_wwpn)
343 u64_to_wwn(vport->phba->cfg_soft_wwpn,
344 vport->fc_sparam.portName.u.wwn);
345
346 /*
347 * If the name is empty or there exists a soft name
348 * then copy the service params name, otherwise use the fc name
349 */
350 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
351 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
352 sizeof(struct lpfc_name));
353 else
354 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
355 sizeof(struct lpfc_name));
356
357 if (vport->fc_portname.u.wwn[0] == 0 || vport->phba->cfg_soft_wwpn)
358 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
359 sizeof(struct lpfc_name));
360 else
361 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
362 sizeof(struct lpfc_name));
363}
364
e59058c4 365/**
3621a710 366 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS
367 * @phba: pointer to lpfc hba data structure.
368 *
369 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
370 * command call. It performs all internal resource and state setups on the
371 * port: post IOCB buffers, enable appropriate host interrupt attentions,
372 * ELS ring timers, etc.
373 *
374 * Return codes
375 * 0 - success.
376 * Any other value - error.
377 **/
dea3101e 378int
2e0fef85 379lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 380{
2e0fef85 381 struct lpfc_vport *vport = phba->pport;
a257bf90 382 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e
JB
383 LPFC_MBOXQ_t *pmb;
384 MAILBOX_t *mb;
385 struct lpfc_dmabuf *mp;
386 struct lpfc_sli *psli = &phba->sli;
387 uint32_t status, timeout;
2e0fef85
JS
388 int i, j;
389 int rc;
dea3101e 390
7af67051
JS
391 spin_lock_irq(&phba->hbalock);
392 /*
393 * If the Config port completed correctly the HBA is not
394 * over heated any more.
395 */
396 if (phba->over_temp_state == HBA_OVER_TEMP)
397 phba->over_temp_state = HBA_NORMAL_TEMP;
398 spin_unlock_irq(&phba->hbalock);
399
dea3101e
JB
400 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
401 if (!pmb) {
2e0fef85 402 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
403 return -ENOMEM;
404 }
04c68496 405 mb = &pmb->u.mb;
dea3101e 406
dea3101e 407 /* Get login parameters for NID. */
9f1177a3
JS
408 rc = lpfc_read_sparam(phba, pmb, 0);
409 if (rc) {
410 mempool_free(pmb, phba->mbox_mem_pool);
411 return -ENOMEM;
412 }
413
ed957684 414 pmb->vport = vport;
dea3101e 415 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 416 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 417 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 418 "READ_SPARM mbxStatus x%x\n",
dea3101e 419 mb->mbxCommand, mb->mbxStatus);
2e0fef85 420 phba->link_state = LPFC_HBA_ERROR;
dea3101e 421 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 422 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
423 lpfc_mbuf_free(phba, mp->virt, mp->phys);
424 kfree(mp);
425 return -EIO;
426 }
427
428 mp = (struct lpfc_dmabuf *) pmb->context1;
429
2e0fef85 430 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e
JB
431 lpfc_mbuf_free(phba, mp->virt, mp->phys);
432 kfree(mp);
433 pmb->context1 = NULL;
0558056c 434 lpfc_update_vport_wwn(vport);
a257bf90
JS
435
436 /* Update the fc_host data structures with new wwn. */
437 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
438 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 439 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 440
dea3101e
JB
441 /* If no serial number in VPD data, use low 6 bytes of WWNN */
442 /* This should be consolidated into parse_vpd ? - mr */
443 if (phba->SerialNumber[0] == 0) {
444 uint8_t *outptr;
445
2e0fef85 446 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e
JB
447 for (i = 0; i < 12; i++) {
448 status = *outptr++;
449 j = ((status & 0xf0) >> 4);
450 if (j <= 9)
451 phba->SerialNumber[i] =
452 (char)((uint8_t) 0x30 + (uint8_t) j);
453 else
454 phba->SerialNumber[i] =
455 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
456 i++;
457 j = (status & 0xf);
458 if (j <= 9)
459 phba->SerialNumber[i] =
460 (char)((uint8_t) 0x30 + (uint8_t) j);
461 else
462 phba->SerialNumber[i] =
463 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
464 }
465 }
466
dea3101e 467 lpfc_read_config(phba, pmb);
ed957684 468 pmb->vport = vport;
dea3101e 469 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 470 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 471 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 472 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 473 mb->mbxCommand, mb->mbxStatus);
2e0fef85 474 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
475 mempool_free( pmb, phba->mbox_mem_pool);
476 return -EIO;
477 }
478
a0c87cbd
JS
479 /* Check if the port is disabled */
480 lpfc_sli_read_link_ste(phba);
481
dea3101e 482 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
483 i = (mb->un.varRdConfig.max_xri + 1);
484 if (phba->cfg_hba_queue_depth > i) {
485 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
486 "3359 HBA queue depth changed from %d to %d\n",
487 phba->cfg_hba_queue_depth, i);
488 phba->cfg_hba_queue_depth = i;
489 }
490
491 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
492 i = (mb->un.varRdConfig.max_xri >> 3);
493 if (phba->pport->cfg_lun_queue_depth > i) {
494 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
495 "3360 LUN queue depth changed from %d to %d\n",
496 phba->pport->cfg_lun_queue_depth, i);
497 phba->pport->cfg_lun_queue_depth = i;
498 }
dea3101e
JB
499
500 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW
501
502 /* Get the default values for Model Name and Description */
503 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
504
2e0fef85 505 phba->link_state = LPFC_LINK_DOWN;
dea3101e 506
0b727fea 507 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS
508 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
509 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
510 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
511 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e
JB
512
513 /* Post receive buffers for desired rings */
ed957684
JS
514 if (phba->sli_rev != 3)
515 lpfc_post_rcv_buf(phba);
dea3101e 516
9399627f
JS
517 /*
518 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
519 */
520 if (phba->intr_type == MSIX) {
521 rc = lpfc_config_msi(phba, pmb);
522 if (rc) {
523 mempool_free(pmb, phba->mbox_mem_pool);
524 return -EIO;
525 }
526 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
527 if (rc != MBX_SUCCESS) {
528 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
529 "0352 Config MSI mailbox command "
530 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS
531 pmb->u.mb.mbxCommand,
532 pmb->u.mb.mbxStatus);
9399627f
JS
533 mempool_free(pmb, phba->mbox_mem_pool);
534 return -EIO;
535 }
536 }
537
04c68496 538 spin_lock_irq(&phba->hbalock);
9399627f
JS
539 /* Initialize ERATT handling flag */
540 phba->hba_flag &= ~HBA_ERATT_HANDLED;
541
dea3101e 542 /* Enable appropriate host interrupts */
9940b97b
JS
543 if (lpfc_readl(phba->HCregaddr, &status)) {
544 spin_unlock_irq(&phba->hbalock);
545 return -EIO;
546 }
dea3101e
JB
547 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
548 if (psli->num_rings > 0)
549 status |= HC_R0INT_ENA;
550 if (psli->num_rings > 1)
551 status |= HC_R1INT_ENA;
552 if (psli->num_rings > 2)
553 status |= HC_R2INT_ENA;
554 if (psli->num_rings > 3)
555 status |= HC_R3INT_ENA;
556
875fbdfe
JSEC
557 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
558 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 559 status &= ~(HC_R0INT_ENA);
875fbdfe 560
dea3101e
JB
561 writel(status, phba->HCregaddr);
562 readl(phba->HCregaddr); /* flush */
2e0fef85 563 spin_unlock_irq(&phba->hbalock);
dea3101e 564
9399627f
JS
565 /* Set up ring-0 (ELS) timer */
566 timeout = phba->fc_ratov * 2;
256ec0d0
JS
567 mod_timer(&vport->els_tmofunc,
568 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 569 /* Set up heart beat (HB) timer */
256ec0d0
JS
570 mod_timer(&phba->hb_tmofunc,
571 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
572 phba->hb_outstanding = 0;
573 phba->last_completion_time = jiffies;
9399627f 574 /* Set up error attention (ERATT) polling timer */
256ec0d0 575 mod_timer(&phba->eratt_poll,
65791f1f 576 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 577
a0c87cbd
JS
578 if (phba->hba_flag & LINK_DISABLED) {
579 lpfc_printf_log(phba,
580 KERN_ERR, LOG_INIT,
581 "2598 Adapter Link is disabled.\n");
582 lpfc_down_link(phba, pmb);
583 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
584 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
585 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
586 lpfc_printf_log(phba,
587 KERN_ERR, LOG_INIT,
588 "2599 Adapter failed to issue DOWN_LINK"
589 " mbox command rc 0x%x\n", rc);
590
591 mempool_free(pmb, phba->mbox_mem_pool);
592 return -EIO;
593 }
e40a02c1 594 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS
595 mempool_free(pmb, phba->mbox_mem_pool);
596 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
597 if (rc)
598 return rc;
dea3101e
JB
599 }
600 /* MBOX buffer will be freed in mbox compl */
57127f15 601 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
602 if (!pmb) {
603 phba->link_state = LPFC_HBA_ERROR;
604 return -ENOMEM;
605 }
606
57127f15
JS
607 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
608 pmb->mbox_cmpl = lpfc_config_async_cmpl;
609 pmb->vport = phba->pport;
610 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 611
57127f15
JS
612 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
613 lpfc_printf_log(phba,
614 KERN_ERR,
615 LOG_INIT,
616 "0456 Adapter failed to issue "
e4e74273 617 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS
618 rc);
619 mempool_free(pmb, phba->mbox_mem_pool);
620 }
97207482
JS
621
622 /* Get Option rom version */
623 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
624 if (!pmb) {
625 phba->link_state = LPFC_HBA_ERROR;
626 return -ENOMEM;
627 }
628
97207482
JS
629 lpfc_dump_wakeup_param(phba, pmb);
630 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
631 pmb->vport = phba->pport;
632 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
633
634 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
635 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 636 "to get Option ROM version status x%x\n", rc);
97207482
JS
637 mempool_free(pmb, phba->mbox_mem_pool);
638 }
639
d7c255b2 640 return 0;
ce8b3ce5
JS
641}
642
84d1b006
JS
643/**
644 * lpfc_hba_init_link - Initialize the FC link
645 * @phba: pointer to lpfc hba data structure.
6e7288d9 646 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
647 *
648 * This routine will issue the INIT_LINK mailbox command call.
649 * It is available to other drivers through the lpfc_hba data
650 * structure for use as a delayed link up mechanism with the
651 * module parameter lpfc_suppress_link_up.
652 *
653 * Return code
654 * 0 - success
655 * Any other value - error
656 **/
e399b228 657static int
6e7288d9 658lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS
659{
660 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
661}
662
663/**
664 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
665 * @phba: pointer to lpfc hba data structure.
666 * @fc_topology: desired fc topology.
667 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
668 *
669 * This routine will issue the INIT_LINK mailbox command call.
670 * It is available to other drivers through the lpfc_hba data
671 * structure for use as a delayed link up mechanism with the
672 * module parameter lpfc_suppress_link_up.
673 *
674 * Return code
675 * 0 - success
676 * Any other value - error
677 **/
678int
679lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
680 uint32_t flag)
84d1b006
JS
681{
682 struct lpfc_vport *vport = phba->pport;
683 LPFC_MBOXQ_t *pmb;
684 MAILBOX_t *mb;
685 int rc;
686
687 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
688 if (!pmb) {
689 phba->link_state = LPFC_HBA_ERROR;
690 return -ENOMEM;
691 }
692 mb = &pmb->u.mb;
693 pmb->vport = vport;
694
026abb87
JS
695 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
696 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
697 !(phba->lmt & LMT_1Gb)) ||
698 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
699 !(phba->lmt & LMT_2Gb)) ||
700 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
701 !(phba->lmt & LMT_4Gb)) ||
702 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
703 !(phba->lmt & LMT_8Gb)) ||
704 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
705 !(phba->lmt & LMT_10Gb)) ||
706 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS
707 !(phba->lmt & LMT_16Gb)) ||
708 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
709 !(phba->lmt & LMT_32Gb))) {
026abb87
JS
710 /* Reset link speed to auto */
711 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
712 "1302 Invalid speed for this board:%d "
713 "Reset link speed to auto.\n",
714 phba->cfg_link_speed);
715 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
716 }
1b51197d 717 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 718 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS
719 if (phba->sli_rev < LPFC_SLI_REV4)
720 lpfc_set_loopback_flag(phba);
6e7288d9 721 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 722 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS
723 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
724 "0498 Adapter failed to init, mbxCmd x%x "
725 "INIT_LINK, mbxStatus x%x\n",
726 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS
727 if (phba->sli_rev <= LPFC_SLI_REV3) {
728 /* Clear all interrupt enable conditions */
729 writel(0, phba->HCregaddr);
730 readl(phba->HCregaddr); /* flush */
731 /* Clear all pending interrupts */
732 writel(0xffffffff, phba->HAregaddr);
733 readl(phba->HAregaddr); /* flush */
734 }
84d1b006 735 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 736 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS
737 mempool_free(pmb, phba->mbox_mem_pool);
738 return -EIO;
739 }
e40a02c1 740 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS
741 if (flag == MBX_POLL)
742 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS
743
744 return 0;
745}
746
747/**
748 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS
749 * @phba: pointer to lpfc hba data structure.
750 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
751 *
752 * This routine will issue the DOWN_LINK mailbox command call.
753 * It is available to other drivers through the lpfc_hba data
754 * structure for use to stop the link.
755 *
756 * Return code
757 * 0 - success
758 * Any other value - error
759 **/
e399b228 760static int
6e7288d9 761lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS
762{
763 LPFC_MBOXQ_t *pmb;
764 int rc;
765
766 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
767 if (!pmb) {
768 phba->link_state = LPFC_HBA_ERROR;
769 return -ENOMEM;
770 }
771
772 lpfc_printf_log(phba,
773 KERN_ERR, LOG_INIT,
774 "0491 Adapter Link is disabled.\n");
775 lpfc_down_link(phba, pmb);
776 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 777 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS
778 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
779 lpfc_printf_log(phba,
780 KERN_ERR, LOG_INIT,
781 "2522 Adapter failed to issue DOWN_LINK"
782 " mbox command rc 0x%x\n", rc);
783
784 mempool_free(pmb, phba->mbox_mem_pool);
785 return -EIO;
786 }
6e7288d9
JS
787 if (flag == MBX_POLL)
788 mempool_free(pmb, phba->mbox_mem_pool);
789
84d1b006
JS
790 return 0;
791}
792
e59058c4 793/**
3621a710 794 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS
795 * @phba: pointer to lpfc HBA data structure.
796 *
797 * This routine will do LPFC uninitialization before the HBA is reset when
798 * bringing down the SLI Layer.
799 *
800 * Return codes
801 * 0 - success.
802 * Any other value - error.
803 **/
dea3101e 804int
2e0fef85 805lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 806{
1b32f6aa
JS
807 struct lpfc_vport **vports;
808 int i;
3772a991
JS
809
810 if (phba->sli_rev <= LPFC_SLI_REV3) {
811 /* Disable interrupts */
812 writel(0, phba->HCregaddr);
813 readl(phba->HCregaddr); /* flush */
814 }
dea3101e 815
1b32f6aa
JS
816 if (phba->pport->load_flag & FC_UNLOADING)
817 lpfc_cleanup_discovery_resources(phba->pport);
818 else {
819 vports = lpfc_create_vport_work_array(phba);
820 if (vports != NULL)
3772a991
JS
821 for (i = 0; i <= phba->max_vports &&
822 vports[i] != NULL; i++)
1b32f6aa
JS
823 lpfc_cleanup_discovery_resources(vports[i]);
824 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS
825 }
826 return 0;
dea3101e
JB
827}
828
68e814f5
JS
829/**
830 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
831 * rspiocb which got deferred
832 *
833 * @phba: pointer to lpfc HBA data structure.
834 *
835 * This routine will cleanup completed slow path events after HBA is reset
836 * when bringing down the SLI Layer.
837 *
838 *
839 * Return codes
840 * void.
841 **/
842static void
843lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
844{
845 struct lpfc_iocbq *rspiocbq;
846 struct hbq_dmabuf *dmabuf;
847 struct lpfc_cq_event *cq_event;
848
849 spin_lock_irq(&phba->hbalock);
850 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
851 spin_unlock_irq(&phba->hbalock);
852
853 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
854 /* Get the response iocb from the head of work queue */
855 spin_lock_irq(&phba->hbalock);
856 list_remove_head(&phba->sli4_hba.sp_queue_event,
857 cq_event, struct lpfc_cq_event, list);
858 spin_unlock_irq(&phba->hbalock);
859
860 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
861 case CQE_CODE_COMPL_WQE:
862 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
863 cq_event);
864 lpfc_sli_release_iocbq(phba, rspiocbq);
865 break;
866 case CQE_CODE_RECEIVE:
867 case CQE_CODE_RECEIVE_V1:
868 dmabuf = container_of(cq_event, struct hbq_dmabuf,
869 cq_event);
870 lpfc_in_buf_free(phba, &dmabuf->dbuf);
871 }
872 }
873}
874
e59058c4 875/**
bcece5f5 876 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS
877 * @phba: pointer to lpfc HBA data structure.
878 *
bcece5f5
JS
879 * This routine will cleanup posted ELS buffers after the HBA is reset
880 * when bringing down the SLI Layer.
881 *
e59058c4
JS
882 *
883 * Return codes
bcece5f5 884 * void.
e59058c4 885 **/
bcece5f5
JS
886static void
887lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW
888{
889 struct lpfc_sli *psli = &phba->sli;
890 struct lpfc_sli_ring *pring;
891 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS
892 LIST_HEAD(buflist);
893 int count;
41415862 894
92d7f7b0
JS
895 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
896 lpfc_sli_hbqbuf_free_all(phba);
897 else {
898 /* Cleanup preposted buffers on the ELS ring */
895427bd 899 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS
900 spin_lock_irq(&phba->hbalock);
901 list_splice_init(&pring->postbufq, &buflist);
902 spin_unlock_irq(&phba->hbalock);
903
904 count = 0;
905 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 906 list_del(&mp->list);
07eab624 907 count++;
92d7f7b0
JS
908 lpfc_mbuf_free(phba, mp->virt, mp->phys);
909 kfree(mp);
910 }
07eab624
JS
911
912 spin_lock_irq(&phba->hbalock);
913 pring->postbufq_cnt -= count;
bcece5f5 914 spin_unlock_irq(&phba->hbalock);
41415862 915 }
bcece5f5
JS
916}
917
918/**
919 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
920 * @phba: pointer to lpfc HBA data structure.
921 *
922 * This routine will cleanup the txcmplq after the HBA is reset when bringing
923 * down the SLI Layer.
924 *
925 * Return codes
926 * void
927 **/
928static void
929lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
930{
931 struct lpfc_sli *psli = &phba->sli;
895427bd 932 struct lpfc_queue *qp = NULL;
bcece5f5
JS
933 struct lpfc_sli_ring *pring;
934 LIST_HEAD(completions);
935 int i;
936
895427bd
JS
937 if (phba->sli_rev != LPFC_SLI_REV4) {
938 for (i = 0; i < psli->num_rings; i++) {
939 pring = &psli->sli3_ring[i];
bcece5f5 940 spin_lock_irq(&phba->hbalock);
895427bd
JS
941 /* At this point in time the HBA is either reset or DOA
942 * Nothing should be on txcmplq as it will
943 * NEVER complete.
944 */
945 list_splice_init(&pring->txcmplq, &completions);
946 pring->txcmplq_cnt = 0;
bcece5f5 947 spin_unlock_irq(&phba->hbalock);
09372820 948
895427bd
JS
949 lpfc_sli_abort_iocb_ring(phba, pring);
950 }
a257bf90 951 /* Cancel all the IOCBs from the completions list */
895427bd
JS
952 lpfc_sli_cancel_iocbs(phba, &completions,
953 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
954 return;
955 }
956 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
957 pring = qp->pring;
958 if (!pring)
959 continue;
960 spin_lock_irq(&pring->ring_lock);
961 list_splice_init(&pring->txcmplq, &completions);
962 pring->txcmplq_cnt = 0;
963 spin_unlock_irq(&pring->ring_lock);
41415862
JW
964 lpfc_sli_abort_iocb_ring(phba, pring);
965 }
895427bd
JS
966 /* Cancel all the IOCBs from the completions list */
967 lpfc_sli_cancel_iocbs(phba, &completions,
968 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 969}
41415862 970
bcece5f5
JS
971/**
972 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
973 int i;
974 * @phba: pointer to lpfc HBA data structure.
975 *
976 * This routine will do uninitialization after the HBA is reset when bring
977 * down the SLI Layer.
978 *
979 * Return codes
980 * 0 - success.
981 * Any other value - error.
982 **/
983static int
984lpfc_hba_down_post_s3(struct lpfc_hba *phba)
985{
986 lpfc_hba_free_post_buf(phba);
987 lpfc_hba_clean_txcmplq(phba);
41415862
JW
988 return 0;
989}
5af5eee7 990
da0436e9
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991/**
992 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
993 * @phba: pointer to lpfc HBA data structure.
994 *
995 * This routine will do uninitialization after the HBA is reset when bring
996 * down the SLI Layer.
997 *
998 * Return codes
af901ca1 999 * 0 - success.
da0436e9
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1000 * Any other value - error.
1001 **/
1002static int
1003lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1004{
1005 struct lpfc_scsi_buf *psb, *psb_next;
1006 LIST_HEAD(aborts);
895427bd 1007 LIST_HEAD(nvme_aborts);
da0436e9 1008 unsigned long iflag = 0;
0f65ff68
JS
1009 struct lpfc_sglq *sglq_entry = NULL;
1010
895427bd
JS
1011
1012 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS
1013 lpfc_hba_clean_txcmplq(phba);
1014
da0436e9
JS
1015 /* At this point in time the HBA is either reset or DOA. Either
1016 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1017 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS
1018 * driver is unloading or reposted if the driver is restarting
1019 * the port.
1020 */
895427bd 1021 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1022 /* scsl_buf_list */
895427bd 1023 /* sgl_list_lock required because worker thread uses this
da0436e9
JS
1024 * list.
1025 */
895427bd 1026 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS
1027 list_for_each_entry(sglq_entry,
1028 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1029 sglq_entry->state = SGL_FREED;
f358dd0c
JS
1030 list_for_each_entry(sglq_entry,
1031 &phba->sli4_hba.lpfc_abts_nvmet_sgl_list, list)
1032 sglq_entry->state = SGL_FREED;
0f65ff68 1033
da0436e9 1034 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS
1035 &phba->sli4_hba.lpfc_els_sgl_list);
1036
f358dd0c
JS
1037 if (phba->sli4_hba.nvme_wq)
1038 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list,
1039 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1040
895427bd 1041 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1042 /* abts_scsi_buf_list_lock required because worker thread uses this
1043 * list.
1044 */
895427bd
JS
1045 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1046 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1047 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1048 &aborts);
1049 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1050 }
1051
1052 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1053 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1054 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1055 &nvme_aborts);
1056 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1057 }
1058
da0436e9
JS
1059 spin_unlock_irq(&phba->hbalock);
1060
1061 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1062 psb->pCmd = NULL;
1063 psb->status = IOSTAT_SUCCESS;
1064 }
a40fc5f0
JS
1065 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1066 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1067 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1068
895427bd
JS
1069 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1070 psb->pCmd = NULL;
1071 psb->status = IOSTAT_SUCCESS;
1072 }
1073 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
1074 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1075 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1076
68e814f5 1077 lpfc_sli4_free_sp_events(phba);
da0436e9
JS
1078 return 0;
1079}
1080
1081/**
1082 * lpfc_hba_down_post - Wrapper func for hba down post routine
1083 * @phba: pointer to lpfc HBA data structure.
1084 *
1085 * This routine wraps the actual SLI3 or SLI4 routine for performing
1086 * uninitialization after the HBA is reset when bring down the SLI Layer.
1087 *
1088 * Return codes
af901ca1 1089 * 0 - success.
da0436e9
JS
1090 * Any other value - error.
1091 **/
1092int
1093lpfc_hba_down_post(struct lpfc_hba *phba)
1094{
1095 return (*phba->lpfc_hba_down_post)(phba);
1096}
41415862 1097
e59058c4 1098/**
3621a710 1099 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS
1100 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1101 *
1102 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1103 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1104 * work-port-events bitmap and the worker thread is notified. This timeout
1105 * event will be used by the worker thread to invoke the actual timeout
1106 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1107 * be performed in the timeout handler and the HBA timeout event bit shall
1108 * be cleared by the worker thread after it has taken the event bitmap out.
1109 **/
a6ababd2 1110static void
858c9f6c
JS
1111lpfc_hb_timeout(unsigned long ptr)
1112{
1113 struct lpfc_hba *phba;
5e9d9b82 1114 uint32_t tmo_posted;
858c9f6c
JS
1115 unsigned long iflag;
1116
1117 phba = (struct lpfc_hba *)ptr;
9399627f
JS
1118
1119 /* Check for heart beat timeout conditions */
858c9f6c 1120 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS
1121 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1122 if (!tmo_posted)
858c9f6c
JS
1123 phba->pport->work_port_events |= WORKER_HB_TMO;
1124 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1125
9399627f 1126 /* Tell the worker thread there is work to do */
5e9d9b82
JS
1127 if (!tmo_posted)
1128 lpfc_worker_wake_up(phba);
858c9f6c
JS
1129 return;
1130}
1131
19ca7609
JS
1132/**
1133 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1134 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1135 *
1136 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1137 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1138 * work-port-events bitmap and the worker thread is notified. This timeout
1139 * event will be used by the worker thread to invoke the actual timeout
1140 * handler routine, lpfc_rrq_handler. Any periodical operations will
1141 * be performed in the timeout handler and the RRQ timeout event bit shall
1142 * be cleared by the worker thread after it has taken the event bitmap out.
1143 **/
1144static void
1145lpfc_rrq_timeout(unsigned long ptr)
1146{
1147 struct lpfc_hba *phba;
19ca7609
JS
1148 unsigned long iflag;
1149
1150 phba = (struct lpfc_hba *)ptr;
1151 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1152 if (!(phba->pport->load_flag & FC_UNLOADING))
1153 phba->hba_flag |= HBA_RRQ_ACTIVE;
1154 else
1155 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1156 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1157
1158 if (!(phba->pport->load_flag & FC_UNLOADING))
1159 lpfc_worker_wake_up(phba);
19ca7609
JS
1160}
1161
e59058c4 1162/**
3621a710 1163 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS
1164 * @phba: pointer to lpfc hba data structure.
1165 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1166 *
1167 * This is the callback function to the lpfc heart-beat mailbox command.
1168 * If configured, the lpfc driver issues the heart-beat mailbox command to
1169 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1170 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1171 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1172 * heart-beat outstanding state. Once the mailbox command comes back and
1173 * no error conditions detected, the heart-beat mailbox command timer is
1174 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1175 * state is cleared for the next heart-beat. If the timer expired with the
1176 * heart-beat outstanding state set, the driver will put the HBA offline.
1177 **/
858c9f6c
JS
1178static void
1179lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1180{
1181 unsigned long drvr_flag;
1182
1183 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1184 phba->hb_outstanding = 0;
1185 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1186
9399627f 1187 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS
1188 mempool_free(pmboxq, phba->mbox_mem_pool);
1189 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1190 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1191 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1192 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1193 jiffies +
1194 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1195 return;
1196}
1197
e59058c4 1198/**
3621a710 1199 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS
1200 * @phba: pointer to lpfc hba data structure.
1201 *
1202 * This is the actual HBA-timer timeout handler to be invoked by the worker
1203 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1204 * handler performs any periodic operations needed for the device. If such
1205 * periodic event has already been attended to either in the interrupt handler
1206 * or by processing slow-ring or fast-ring events within the HBA-timer
1207 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1208 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1209 * is configured and there is no heart-beat mailbox command outstanding, a
1210 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1211 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1212 * to offline.
1213 **/
858c9f6c
JS
1214void
1215lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1216{
45ed1190 1217 struct lpfc_vport **vports;
858c9f6c 1218 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1219 struct lpfc_dmabuf *buf_ptr;
45ed1190 1220 int retval, i;
858c9f6c 1221 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1222 LIST_HEAD(completions);
858c9f6c 1223
45ed1190
JS
1224 vports = lpfc_create_vport_work_array(phba);
1225 if (vports != NULL)
4258e98e 1226 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1227 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS
1228 lpfc_fdmi_num_disc_check(vports[i]);
1229 }
45ed1190
JS
1230 lpfc_destroy_vport_work_array(phba, vports);
1231
858c9f6c 1232 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1233 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS
1234 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1235 return;
1236
1237 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1238
256ec0d0
JS
1239 if (time_after(phba->last_completion_time +
1240 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1241 jiffies)) {
858c9f6c
JS
1242 spin_unlock_irq(&phba->pport->work_port_lock);
1243 if (!phba->hb_outstanding)
1244 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1245 jiffies +
1246 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1247 else
1248 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1249 jiffies +
1250 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS
1251 return;
1252 }
1253 spin_unlock_irq(&phba->pport->work_port_lock);
1254
0ff10d46
JS
1255 if (phba->elsbuf_cnt &&
1256 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1257 spin_lock_irq(&phba->hbalock);
1258 list_splice_init(&phba->elsbuf, &completions);
1259 phba->elsbuf_cnt = 0;
1260 phba->elsbuf_prev_cnt = 0;
1261 spin_unlock_irq(&phba->hbalock);
1262
1263 while (!list_empty(&completions)) {
1264 list_remove_head(&completions, buf_ptr,
1265 struct lpfc_dmabuf, list);
1266 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1267 kfree(buf_ptr);
1268 }
1269 }
1270 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1271
858c9f6c 1272 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS
1273 if (phba->cfg_enable_hba_heartbeat) {
1274 if (!phba->hb_outstanding) {
bc73905a
JS
1275 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1276 (list_empty(&psli->mboxq))) {
1277 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1278 GFP_KERNEL);
1279 if (!pmboxq) {
1280 mod_timer(&phba->hb_tmofunc,
1281 jiffies +
256ec0d0
JS
1282 msecs_to_jiffies(1000 *
1283 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1284 return;
1285 }
1286
1287 lpfc_heart_beat(phba, pmboxq);
1288 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1289 pmboxq->vport = phba->pport;
1290 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1291 MBX_NOWAIT);
1292
1293 if (retval != MBX_BUSY &&
1294 retval != MBX_SUCCESS) {
1295 mempool_free(pmboxq,
1296 phba->mbox_mem_pool);
1297 mod_timer(&phba->hb_tmofunc,
1298 jiffies +
256ec0d0
JS
1299 msecs_to_jiffies(1000 *
1300 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1301 return;
1302 }
1303 phba->skipped_hb = 0;
1304 phba->hb_outstanding = 1;
1305 } else if (time_before_eq(phba->last_completion_time,
1306 phba->skipped_hb)) {
1307 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1308 "2857 Last completion time not "
1309 " updated in %d ms\n",
1310 jiffies_to_msecs(jiffies
1311 - phba->last_completion_time));
1312 } else
1313 phba->skipped_hb = jiffies;
1314
858c9f6c 1315 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1316 jiffies +
1317 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1318 return;
13815c83
JS
1319 } else {
1320 /*
1321 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS
1322 * we need to give the hb mailbox cmd a chance to
1323 * complete or TMO.
13815c83 1324 */
dcf2a4e0
JS
1325 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1326 "0459 Adapter heartbeat still out"
1327 "standing:last compl time was %d ms.\n",
1328 jiffies_to_msecs(jiffies
1329 - phba->last_completion_time));
1330 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1331 jiffies +
1332 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1333 }
4258e98e
JS
1334 } else {
1335 mod_timer(&phba->hb_tmofunc,
1336 jiffies +
1337 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1338 }
1339}
1340
e59058c4 1341/**
3621a710 1342 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS
1343 * @phba: pointer to lpfc hba data structure.
1344 *
1345 * This routine is called to bring the HBA offline when HBA hardware error
1346 * other than Port Error 6 has been detected.
1347 **/
09372820
JS
1348static void
1349lpfc_offline_eratt(struct lpfc_hba *phba)
1350{
1351 struct lpfc_sli *psli = &phba->sli;
1352
1353 spin_lock_irq(&phba->hbalock);
f4b4c68f 1354 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1355 spin_unlock_irq(&phba->hbalock);
618a5230 1356 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS
1357
1358 lpfc_offline(phba);
1359 lpfc_reset_barrier(phba);
f4b4c68f 1360 spin_lock_irq(&phba->hbalock);
09372820 1361 lpfc_sli_brdreset(phba);
f4b4c68f 1362 spin_unlock_irq(&phba->hbalock);
09372820
JS
1363 lpfc_hba_down_post(phba);
1364 lpfc_sli_brdready(phba, HS_MBRDY);
1365 lpfc_unblock_mgmt_io(phba);
1366 phba->link_state = LPFC_HBA_ERROR;
1367 return;
1368}
1369
da0436e9
JS
1370/**
1371 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1372 * @phba: pointer to lpfc hba data structure.
1373 *
1374 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1375 * other than Port Error 6 has been detected.
1376 **/
a88dbb6a 1377void
da0436e9
JS
1378lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1379{
946727dc
JS
1380 spin_lock_irq(&phba->hbalock);
1381 phba->link_state = LPFC_HBA_ERROR;
1382 spin_unlock_irq(&phba->hbalock);
1383
618a5230 1384 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1385 lpfc_offline(phba);
da0436e9 1386 lpfc_hba_down_post(phba);
da0436e9 1387 lpfc_unblock_mgmt_io(phba);
da0436e9
JS
1388}
1389
a257bf90
JS
1390/**
1391 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1392 * @phba: pointer to lpfc hba data structure.
1393 *
1394 * This routine is invoked to handle the deferred HBA hardware error
1395 * conditions. This type of error is indicated by HBA by setting ER1
1396 * and another ER bit in the host status register. The driver will
1397 * wait until the ER1 bit clears before handling the error condition.
1398 **/
1399static void
1400lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1401{
1402 uint32_t old_host_status = phba->work_hs;
a257bf90
JS
1403 struct lpfc_sli *psli = &phba->sli;
1404
f4b4c68f
JS
1405 /* If the pci channel is offline, ignore possible errors,
1406 * since we cannot communicate with the pci card anyway.
1407 */
1408 if (pci_channel_offline(phba->pcidev)) {
1409 spin_lock_irq(&phba->hbalock);
1410 phba->hba_flag &= ~DEFER_ERATT;
1411 spin_unlock_irq(&phba->hbalock);
1412 return;
1413 }
1414
a257bf90
JS
1415 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1416 "0479 Deferred Adapter Hardware Error "
1417 "Data: x%x x%x x%x\n",
1418 phba->work_hs,
1419 phba->work_status[0], phba->work_status[1]);
1420
1421 spin_lock_irq(&phba->hbalock);
f4b4c68f 1422 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS
1423 spin_unlock_irq(&phba->hbalock);
1424
1425
1426 /*
1427 * Firmware stops when it triggred erratt. That could cause the I/Os
1428 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1429 * SCSI layer retry it after re-establishing link.
1430 */
db55fba8 1431 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS
1432
1433 /*
1434 * There was a firmware error. Take the hba offline and then
1435 * attempt to restart it.
1436 */
618a5230 1437 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS
1438 lpfc_offline(phba);
1439
1440 /* Wait for the ER1 bit to clear.*/
1441 while (phba->work_hs & HS_FFER1) {
1442 msleep(100);
9940b97b
JS
1443 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1444 phba->work_hs = UNPLUG_ERR ;
1445 break;
1446 }
a257bf90
JS
1447 /* If driver is unloading let the worker thread continue */
1448 if (phba->pport->load_flag & FC_UNLOADING) {
1449 phba->work_hs = 0;
1450 break;
1451 }
1452 }
1453
1454 /*
1455 * This is to ptrotect against a race condition in which
1456 * first write to the host attention register clear the
1457 * host status register.
1458 */
1459 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1460 phba->work_hs = old_host_status & ~HS_FFER1;
1461
3772a991 1462 spin_lock_irq(&phba->hbalock);
a257bf90 1463 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1464 spin_unlock_irq(&phba->hbalock);
a257bf90
JS
1465 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1466 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1467}
1468
3772a991
JS
1469static void
1470lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1471{
1472 struct lpfc_board_event_header board_event;
1473 struct Scsi_Host *shost;
1474
1475 board_event.event_type = FC_REG_BOARD_EVENT;
1476 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1477 shost = lpfc_shost_from_vport(phba->pport);
1478 fc_host_post_vendor_event(shost, fc_get_event_number(),
1479 sizeof(board_event),
1480 (char *) &board_event,
1481 LPFC_NL_VENDOR_ID);
1482}
1483
e59058c4 1484/**
3772a991 1485 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS
1486 * @phba: pointer to lpfc hba data structure.
1487 *
1488 * This routine is invoked to handle the following HBA hardware error
1489 * conditions:
1490 * 1 - HBA error attention interrupt
1491 * 2 - DMA ring index out of range
1492 * 3 - Mailbox command came back as unknown
1493 **/
3772a991
JS
1494static void
1495lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1496{
2e0fef85 1497 struct lpfc_vport *vport = phba->pport;
2e0fef85 1498 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1499 uint32_t event_data;
57127f15
JS
1500 unsigned long temperature;
1501 struct temp_event temp_event_data;
92d7f7b0 1502 struct Scsi_Host *shost;
2e0fef85 1503
8d63f375 1504 /* If the pci channel is offline, ignore possible errors,
3772a991
JS
1505 * since we cannot communicate with the pci card anyway.
1506 */
1507 if (pci_channel_offline(phba->pcidev)) {
1508 spin_lock_irq(&phba->hbalock);
1509 phba->hba_flag &= ~DEFER_ERATT;
1510 spin_unlock_irq(&phba->hbalock);
8d63f375 1511 return;
3772a991
JS
1512 }
1513
13815c83
JS
1514 /* If resets are disabled then leave the HBA alone and return */
1515 if (!phba->cfg_enable_hba_reset)
1516 return;
dea3101e 1517
ea2151b4 1518 /* Send an internal error event to mgmt application */
3772a991 1519 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1520
a257bf90
JS
1521 if (phba->hba_flag & DEFER_ERATT)
1522 lpfc_handle_deferred_eratt(phba);
1523
dcf2a4e0
JS
1524 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1525 if (phba->work_hs & HS_FFER6)
1526 /* Re-establishing Link */
1527 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1528 "1301 Re-establishing Link "
1529 "Data: x%x x%x x%x\n",
1530 phba->work_hs, phba->work_status[0],
1531 phba->work_status[1]);
1532 if (phba->work_hs & HS_FFER8)
1533 /* Device Zeroization */
1534 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1535 "2861 Host Authentication device "
1536 "zeroization Data:x%x x%x x%x\n",
1537 phba->work_hs, phba->work_status[0],
1538 phba->work_status[1]);
58da1ffb 1539
92d7f7b0 1540 spin_lock_irq(&phba->hbalock);
f4b4c68f 1541 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1542 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1543
1544 /*
1545 * Firmware stops when it triggled erratt with HS_FFER6.
1546 * That could cause the I/Os dropped by the firmware.
1547 * Error iocb (I/O) on txcmplq and let the SCSI layer
1548 * retry it after re-establishing link.
1549 */
db55fba8 1550 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1551
dea3101e
JB
1552 /*
1553 * There was a firmware error. Take the hba offline and then
1554 * attempt to restart it.
1555 */
618a5230 1556 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1557 lpfc_offline(phba);
41415862 1558 lpfc_sli_brdrestart(phba);
dea3101e 1559 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1560 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
1561 return;
1562 }
46fa311e 1563 lpfc_unblock_mgmt_io(phba);
57127f15
JS
1564 } else if (phba->work_hs & HS_CRIT_TEMP) {
1565 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1566 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1567 temp_event_data.event_code = LPFC_CRIT_TEMP;
1568 temp_event_data.data = (uint32_t)temperature;
1569
1570 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1571 "0406 Adapter maximum temperature exceeded "
57127f15
JS
1572 "(%ld), taking this port offline "
1573 "Data: x%x x%x x%x\n",
1574 temperature, phba->work_hs,
1575 phba->work_status[0], phba->work_status[1]);
1576
1577 shost = lpfc_shost_from_vport(phba->pport);
1578 fc_host_post_vendor_event(shost, fc_get_event_number(),
1579 sizeof(temp_event_data),
1580 (char *) &temp_event_data,
1581 SCSI_NL_VID_TYPE_PCI
1582 | PCI_VENDOR_ID_EMULEX);
1583
7af67051 1584 spin_lock_irq(&phba->hbalock);
7af67051
JS
1585 phba->over_temp_state = HBA_OVER_TEMP;
1586 spin_unlock_irq(&phba->hbalock);
09372820 1587 lpfc_offline_eratt(phba);
57127f15 1588
dea3101e
JB
1589 } else {
1590 /* The if clause above forces this code path when the status
9399627f
JS
1591 * failure is a value other than FFER6. Do not call the offline
1592 * twice. This is the adapter hardware error path.
dea3101e
JB
1593 */
1594 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1595 "0457 Adapter Hardware Error "
dea3101e 1596 "Data: x%x x%x x%x\n",
e8b62011 1597 phba->work_hs,
dea3101e
JB
1598 phba->work_status[0], phba->work_status[1]);
1599
d2873e4c 1600 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1601 shost = lpfc_shost_from_vport(vport);
2e0fef85 1602 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS
1603 sizeof(event_data), (char *) &event_data,
1604 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1605
09372820 1606 lpfc_offline_eratt(phba);
dea3101e 1607 }
9399627f 1608 return;
dea3101e
JB
1609}
1610
618a5230
JS
1611/**
1612 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1613 * @phba: pointer to lpfc hba data structure.
1614 * @mbx_action: flag for mailbox shutdown action.
1615 *
1616 * This routine is invoked to perform an SLI4 port PCI function reset in
1617 * response to port status register polling attention. It waits for port
1618 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1619 * During this process, interrupt vectors are freed and later requested
1620 * for handling possible port resource change.
1621 **/
1622static int
e10b2022
JS
1623lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1624 bool en_rn_msg)
618a5230
JS
1625{
1626 int rc;
1627 uint32_t intr_mode;
1628
65791f1f
JS
1629 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1630 LPFC_SLI_INTF_IF_TYPE_2) {
1631 /*
1632 * On error status condition, driver need to wait for port
1633 * ready before performing reset.
1634 */
1635 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1636 if (rc)
65791f1f
JS
1637 return rc;
1638 }
0e916ee7 1639
65791f1f
JS
1640 /* need reset: attempt for port recovery */
1641 if (en_rn_msg)
1642 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1643 "2887 Reset Needed: Attempting Port "
1644 "Recovery...\n");
1645 lpfc_offline_prep(phba, mbx_action);
1646 lpfc_offline(phba);
1647 /* release interrupt for possible resource change */
1648 lpfc_sli4_disable_intr(phba);
1649 lpfc_sli_brdrestart(phba);
1650 /* request and enable interrupt */
1651 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1652 if (intr_mode == LPFC_INTR_ERROR) {
1653 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1654 "3175 Failed to enable interrupt\n");
1655 return -EIO;
618a5230 1656 }
65791f1f
JS
1657 phba->intr_mode = intr_mode;
1658 rc = lpfc_online(phba);
1659 if (rc == 0)
1660 lpfc_unblock_mgmt_io(phba);
1661
618a5230
JS
1662 return rc;
1663}
1664
da0436e9
JS
1665/**
1666 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1667 * @phba: pointer to lpfc hba data structure.
1668 *
1669 * This routine is invoked to handle the SLI4 HBA hardware error attention
1670 * conditions.
1671 **/
1672static void
1673lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1674{
1675 struct lpfc_vport *vport = phba->pport;
1676 uint32_t event_data;
1677 struct Scsi_Host *shost;
2fcee4bf 1678 uint32_t if_type;
2e90f4b5
JS
1679 struct lpfc_register portstat_reg = {0};
1680 uint32_t reg_err1, reg_err2;
1681 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1682 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1683 bool en_rn_msg = true;
946727dc 1684 struct temp_event temp_event_data;
65791f1f
JS
1685 struct lpfc_register portsmphr_reg;
1686 int rc, i;
da0436e9
JS
1687
1688 /* If the pci channel is offline, ignore possible errors, since
1689 * we cannot communicate with the pci card anyway.
1690 */
1691 if (pci_channel_offline(phba->pcidev))
1692 return;
da0436e9 1693
65791f1f 1694 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS
1695 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1696 switch (if_type) {
1697 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS
1698 pci_rd_rc1 = lpfc_readl(
1699 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1700 &uerrlo_reg);
1701 pci_rd_rc2 = lpfc_readl(
1702 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1703 &uemasklo_reg);
1704 /* consider PCI bus read error as pci_channel_offline */
1705 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1706 return;
65791f1f
JS
1707 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1708 lpfc_sli4_offline_eratt(phba);
1709 return;
1710 }
1711 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1712 "7623 Checking UE recoverable");
1713
1714 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1715 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1716 &portsmphr_reg.word0))
1717 continue;
1718
1719 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1720 &portsmphr_reg);
1721 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1722 LPFC_PORT_SEM_UE_RECOVERABLE)
1723 break;
1724 /*Sleep for 1Sec, before checking SEMAPHORE */
1725 msleep(1000);
1726 }
1727
1728 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1729 "4827 smphr_port_status x%x : Waited %dSec",
1730 smphr_port_status, i);
1731
1732 /* Recoverable UE, reset the HBA device */
1733 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1734 LPFC_PORT_SEM_UE_RECOVERABLE) {
1735 for (i = 0; i < 20; i++) {
1736 msleep(1000);
1737 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1738 &portsmphr_reg.word0) &&
1739 (LPFC_POST_STAGE_PORT_READY ==
1740 bf_get(lpfc_port_smphr_port_status,
1741 &portsmphr_reg))) {
1742 rc = lpfc_sli4_port_sta_fn_reset(phba,
1743 LPFC_MBX_NO_WAIT, en_rn_msg);
1744 if (rc == 0)
1745 return;
1746 lpfc_printf_log(phba,
1747 KERN_ERR, LOG_INIT,
1748 "4215 Failed to recover UE");
1749 break;
1750 }
1751 }
1752 }
1753 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1754 "7624 Firmware not ready: Failing UE recovery,"
1755 " waited %dSec", i);
2fcee4bf
JS
1756 lpfc_sli4_offline_eratt(phba);
1757 break;
946727dc 1758
2fcee4bf 1759 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS
1760 pci_rd_rc1 = lpfc_readl(
1761 phba->sli4_hba.u.if_type2.STATUSregaddr,
1762 &portstat_reg.word0);
1763 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS
1764 if (pci_rd_rc1 == -EIO) {
1765 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1766 "3151 PCI bus read access failure: x%x\n",
1767 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1768 return;
6b5151fd 1769 }
2e90f4b5
JS
1770 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1771 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1772 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS
1773 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1774 "2889 Port Overtemperature event, "
946727dc
JS
1775 "taking port offline Data: x%x x%x\n",
1776 reg_err1, reg_err2);
1777
310429ef 1778 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
1779 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1780 temp_event_data.event_code = LPFC_CRIT_TEMP;
1781 temp_event_data.data = 0xFFFFFFFF;
1782
1783 shost = lpfc_shost_from_vport(phba->pport);
1784 fc_host_post_vendor_event(shost, fc_get_event_number(),
1785 sizeof(temp_event_data),
1786 (char *)&temp_event_data,
1787 SCSI_NL_VID_TYPE_PCI
1788 | PCI_VENDOR_ID_EMULEX);
1789
2fcee4bf
JS
1790 spin_lock_irq(&phba->hbalock);
1791 phba->over_temp_state = HBA_OVER_TEMP;
1792 spin_unlock_irq(&phba->hbalock);
1793 lpfc_sli4_offline_eratt(phba);
946727dc 1794 return;
2fcee4bf 1795 }
2e90f4b5 1796 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1797 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1798 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS
1799 "3143 Port Down: Firmware Update "
1800 "Detected\n");
1801 en_rn_msg = false;
1802 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS
1803 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1804 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1805 "3144 Port Down: Debug Dump\n");
1806 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1807 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1808 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1809 "3145 Port Down: Provisioning\n");
618a5230 1810
946727dc
JS
1811 /* If resets are disabled then leave the HBA alone and return */
1812 if (!phba->cfg_enable_hba_reset)
1813 return;
1814
618a5230 1815 /* Check port status register for function reset */
e10b2022
JS
1816 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1817 en_rn_msg);
618a5230
JS
1818 if (rc == 0) {
1819 /* don't report event on forced debug dump */
1820 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1821 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1822 return;
1823 else
1824 break;
2fcee4bf 1825 }
618a5230 1826 /* fall through for not able to recover */
6b5151fd
JS
1827 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1828 "3152 Unrecoverable error, bring the port "
1829 "offline\n");
2fcee4bf
JS
1830 lpfc_sli4_offline_eratt(phba);
1831 break;
1832 case LPFC_SLI_INTF_IF_TYPE_1:
1833 default:
1834 break;
1835 }
2e90f4b5
JS
1836 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1837 "3123 Report dump event to upper layer\n");
1838 /* Send an internal error event to mgmt application */
1839 lpfc_board_errevt_to_mgmt(phba);
1840
1841 event_data = FC_REG_DUMP_EVENT;
1842 shost = lpfc_shost_from_vport(vport);
1843 fc_host_post_vendor_event(shost, fc_get_event_number(),
1844 sizeof(event_data), (char *) &event_data,
1845 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS
1846}
1847
1848/**
1849 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1850 * @phba: pointer to lpfc HBA data structure.
1851 *
1852 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1853 * routine from the API jump table function pointer from the lpfc_hba struct.
1854 *
1855 * Return codes
af901ca1 1856 * 0 - success.
da0436e9
JS
1857 * Any other value - error.
1858 **/
1859void
1860lpfc_handle_eratt(struct lpfc_hba *phba)
1861{
1862 (*phba->lpfc_handle_eratt)(phba);
1863}
1864
e59058c4 1865/**
3621a710 1866 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS
1867 * @phba: pointer to lpfc hba data structure.
1868 *
1869 * This routine is invoked from the worker thread to handle a HBA host
895427bd 1870 * attention link event. SLI3 only.
e59058c4 1871 **/
dea3101e 1872void
2e0fef85 1873lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 1874{
2e0fef85
JS
1875 struct lpfc_vport *vport = phba->pport;
1876 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB
1877 LPFC_MBOXQ_t *pmb;
1878 volatile uint32_t control;
1879 struct lpfc_dmabuf *mp;
09372820 1880 int rc = 0;
dea3101e
JB
1881
1882 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS
1883 if (!pmb) {
1884 rc = 1;
dea3101e 1885 goto lpfc_handle_latt_err_exit;
09372820 1886 }
dea3101e
JB
1887
1888 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS
1889 if (!mp) {
1890 rc = 2;
dea3101e 1891 goto lpfc_handle_latt_free_pmb;
09372820 1892 }
dea3101e
JB
1893
1894 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS
1895 if (!mp->virt) {
1896 rc = 3;
dea3101e 1897 goto lpfc_handle_latt_free_mp;
09372820 1898 }
dea3101e 1899
6281bfe0 1900 /* Cleanup any outstanding ELS commands */
549e55cd 1901 lpfc_els_flush_all_cmd(phba);
dea3101e
JB
1902
1903 psli->slistat.link_event++;
76a95d75
JS
1904 lpfc_read_topology(phba, pmb, mp);
1905 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 1906 pmb->vport = vport;
0d2b6b83 1907 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 1908 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 1909 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS
1910 if (rc == MBX_NOT_FINISHED) {
1911 rc = 4;
14691150 1912 goto lpfc_handle_latt_free_mbuf;
09372820 1913 }
dea3101e
JB
1914
1915 /* Clear Link Attention in HA REG */
2e0fef85 1916 spin_lock_irq(&phba->hbalock);
dea3101e
JB
1917 writel(HA_LATT, phba->HAregaddr);
1918 readl(phba->HAregaddr); /* flush */
2e0fef85 1919 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1920
1921 return;
1922
14691150 1923lpfc_handle_latt_free_mbuf:
895427bd 1924 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 1925 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e
JB
1926lpfc_handle_latt_free_mp:
1927 kfree(mp);
1928lpfc_handle_latt_free_pmb:
1dcb58e5 1929 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
1930lpfc_handle_latt_err_exit:
1931 /* Enable Link attention interrupts */
2e0fef85 1932 spin_lock_irq(&phba->hbalock);
dea3101e
JB
1933 psli->sli_flag |= LPFC_PROCESS_LA;
1934 control = readl(phba->HCregaddr);
1935 control |= HC_LAINT_ENA;
1936 writel(control, phba->HCregaddr);
1937 readl(phba->HCregaddr); /* flush */
1938
1939 /* Clear Link Attention in HA REG */
1940 writel(HA_LATT, phba->HAregaddr);
1941 readl(phba->HAregaddr); /* flush */
2e0fef85 1942 spin_unlock_irq(&phba->hbalock);
dea3101e 1943 lpfc_linkdown(phba);
2e0fef85 1944 phba->link_state = LPFC_HBA_ERROR;
dea3101e 1945
09372820
JS
1946 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
1947 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e
JB
1948
1949 return;
1950}
1951
e59058c4 1952/**
3621a710 1953 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS
1954 * @phba: pointer to lpfc hba data structure.
1955 * @vpd: pointer to the vital product data.
1956 * @len: length of the vital product data in bytes.
1957 *
1958 * This routine parses the Vital Product Data (VPD). The VPD is treated as
1959 * an array of characters. In this routine, the ModelName, ProgramType, and
1960 * ModelDesc, etc. fields of the phba data structure will be populated.
1961 *
1962 * Return codes
1963 * 0 - pointer to the VPD passed in is NULL
1964 * 1 - success
1965 **/
3772a991 1966int
2e0fef85 1967lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e
JB
1968{
1969 uint8_t lenlo, lenhi;
07da60c1 1970 int Length;
dea3101e
JB
1971 int i, j;
1972 int finished = 0;
1973 int index = 0;
1974
1975 if (!vpd)
1976 return 0;
1977
1978 /* Vital Product */
ed957684 1979 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 1980 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e
JB
1981 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
1982 (uint32_t) vpd[3]);
74b72a59 1983 while (!finished && (index < (len - 4))) {
dea3101e
JB
1984 switch (vpd[index]) {
1985 case 0x82:
74b72a59 1986 case 0x91:
dea3101e
JB
1987 index += 1;
1988 lenlo = vpd[index];
1989 index += 1;
1990 lenhi = vpd[index];
1991 index += 1;
1992 i = ((((unsigned short)lenhi) << 8) + lenlo);
1993 index += i;
1994 break;
1995 case 0x90:
1996 index += 1;
1997 lenlo = vpd[index];
1998 index += 1;
1999 lenhi = vpd[index];
2000 index += 1;
2001 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW
2002 if (Length > len - index)
2003 Length = len - index;
dea3101e
JB
2004 while (Length > 0) {
2005 /* Look for Serial Number */
2006 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2007 index += 2;
2008 i = vpd[index];
2009 index += 1;
2010 j = 0;
2011 Length -= (3+i);
2012 while(i--) {
2013 phba->SerialNumber[j++] = vpd[index++];
2014 if (j == 31)
2015 break;
2016 }
2017 phba->SerialNumber[j] = 0;
2018 continue;
2019 }
2020 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2021 phba->vpd_flag |= VPD_MODEL_DESC;
2022 index += 2;
2023 i = vpd[index];
2024 index += 1;
2025 j = 0;
2026 Length -= (3+i);
2027 while(i--) {
2028 phba->ModelDesc[j++] = vpd[index++];
2029 if (j == 255)
2030 break;
2031 }
2032 phba->ModelDesc[j] = 0;
2033 continue;
2034 }
2035 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2036 phba->vpd_flag |= VPD_MODEL_NAME;
2037 index += 2;
2038 i = vpd[index];
2039 index += 1;
2040 j = 0;
2041 Length -= (3+i);
2042 while(i--) {
2043 phba->ModelName[j++] = vpd[index++];
2044 if (j == 79)
2045 break;
2046 }
2047 phba->ModelName[j] = 0;
2048 continue;
2049 }
2050 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2051 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2052 index += 2;
2053 i = vpd[index];
2054 index += 1;
2055 j = 0;
2056 Length -= (3+i);
2057 while(i--) {
2058 phba->ProgramType[j++] = vpd[index++];
2059 if (j == 255)
2060 break;
2061 }
2062 phba->ProgramType[j] = 0;
2063 continue;
2064 }
2065 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2066 phba->vpd_flag |= VPD_PORT;
2067 index += 2;
2068 i = vpd[index];
2069 index += 1;
2070 j = 0;
2071 Length -= (3+i);
2072 while(i--) {
cd1c8301
JS
2073 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2074 (phba->sli4_hba.pport_name_sta ==
2075 LPFC_SLI4_PPNAME_GET)) {
2076 j++;
2077 index++;
2078 } else
2079 phba->Port[j++] = vpd[index++];
2080 if (j == 19)
2081 break;
dea3101e 2082 }
cd1c8301
JS
2083 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2084 (phba->sli4_hba.pport_name_sta ==
2085 LPFC_SLI4_PPNAME_NON))
2086 phba->Port[j] = 0;
dea3101e
JB
2087 continue;
2088 }
2089 else {
2090 index += 2;
2091 i = vpd[index];
2092 index += 1;
2093 index += i;
2094 Length -= (3 + i);
2095 }
2096 }
2097 finished = 0;
2098 break;
2099 case 0x78:
2100 finished = 1;
2101 break;
2102 default:
2103 index ++;
2104 break;
2105 }
74b72a59 2106 }
dea3101e
JB
2107
2108 return(1);
2109}
2110
e59058c4 2111/**
3621a710 2112 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS
2113 * @phba: pointer to lpfc hba data structure.
2114 * @mdp: pointer to the data structure to hold the derived model name.
2115 * @descp: pointer to the data structure to hold the derived description.
2116 *
2117 * This routine retrieves HBA's description based on its registered PCI device
2118 * ID. The @descp passed into this function points to an array of 256 chars. It
2119 * shall be returned with the model name, maximum speed, and the host bus type.
2120 * The @mdp passed into this function points to an array of 80 chars. When the
2121 * function returns, the @mdp will be filled with the model name.
2122 **/
dea3101e 2123static void
2e0fef85 2124lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e
JB
2125{
2126 lpfc_vpd_t *vp;
fefcb2b6 2127 uint16_t dev_id = phba->pcidev->device;
74b72a59 2128 int max_speed;
84774a4d 2129 int GE = 0;
da0436e9 2130 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2131 struct {
a747c9ce
JS
2132 char *name;
2133 char *bus;
2134 char *function;
2135 } m = {"<Unknown>", "", ""};
74b72a59
JW
2136
2137 if (mdp && mdp[0] != '\0'
2138 && descp && descp[0] != '\0')
2139 return;
2140
d38dd52c
JS
2141 if (phba->lmt & LMT_32Gb)
2142 max_speed = 32;
2143 else if (phba->lmt & LMT_16Gb)
c0c11512
JS
2144 max_speed = 16;
2145 else if (phba->lmt & LMT_10Gb)
74b72a59
JW
2146 max_speed = 10;
2147 else if (phba->lmt & LMT_8Gb)
2148 max_speed = 8;
2149 else if (phba->lmt & LMT_4Gb)
2150 max_speed = 4;
2151 else if (phba->lmt & LMT_2Gb)
2152 max_speed = 2;
4169d868 2153 else if (phba->lmt & LMT_1Gb)
74b72a59 2154 max_speed = 1;
4169d868
JS
2155 else
2156 max_speed = 0;
dea3101e
JB
2157
2158 vp = &phba->vpd;
dea3101e 2159
e4adb204 2160 switch (dev_id) {
06325e74 2161 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS
2162 m = (typeof(m)){"LP6000", "PCI",
2163 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2164 break;
dea3101e
JB
2165 case PCI_DEVICE_ID_SUPERFLY:
2166 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2167 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2168 else
12222f4f
JS
2169 m = (typeof(m)){"LP7000E", "PCI", ""};
2170 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2171 break;
2172 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2173 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2174 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2175 break;
2176 case PCI_DEVICE_ID_CENTAUR:
2177 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2178 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2179 else
12222f4f
JS
2180 m = (typeof(m)){"LP9000", "PCI", ""};
2181 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2182 break;
2183 case PCI_DEVICE_ID_RFLY:
a747c9ce 2184 m = (typeof(m)){"LP952", "PCI",
12222f4f 2185 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2186 break;
2187 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2188 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2189 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2190 break;
2191 case PCI_DEVICE_ID_THOR:
a747c9ce 2192 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2193 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2194 break;
2195 case PCI_DEVICE_ID_VIPER:
a747c9ce 2196 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2197 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2198 break;
2199 case PCI_DEVICE_ID_PFLY:
a747c9ce 2200 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2201 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2202 break;
2203 case PCI_DEVICE_ID_TFLY:
a747c9ce 2204 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2205 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2206 break;
2207 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2208 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2209 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2210 break;
e4adb204 2211 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2212 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2213 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2214 break;
2215 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2216 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2217 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2218 break;
2219 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS
2220 m = (typeof(m)){"LPe1000", "PCIe",
2221 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2222 break;
2223 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS
2224 m = (typeof(m)){"LPe1000-SP", "PCIe",
2225 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2226 break;
2227 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS
2228 m = (typeof(m)){"LPe1002-SP", "PCIe",
2229 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2230 break;
dea3101e 2231 case PCI_DEVICE_ID_BMID:
a747c9ce 2232 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e
JB
2233 break;
2234 case PCI_DEVICE_ID_BSMB:
12222f4f
JS
2235 m = (typeof(m)){"LP111", "PCI-X2",
2236 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2237 break;
2238 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2239 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2240 break;
e4adb204 2241 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2242 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC
2243 break;
2244 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2245 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2246 GE = 1;
e4adb204 2247 break;
dea3101e 2248 case PCI_DEVICE_ID_ZMID:
a747c9ce 2249 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2250 break;
2251 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2252 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2253 break;
2254 case PCI_DEVICE_ID_LP101:
12222f4f
JS
2255 m = (typeof(m)){"LP101", "PCI-X",
2256 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2257 break;
2258 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS
2259 m = (typeof(m)){"LP10000-S", "PCI",
2260 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2261 break;
e4adb204 2262 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS
2263 m = (typeof(m)){"LP11000-S", "PCI-X2",
2264 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2265 break;
e4adb204 2266 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS
2267 m = (typeof(m)){"LPe11000-S", "PCIe",
2268 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2269 break;
b87eab38 2270 case PCI_DEVICE_ID_SAT:
a747c9ce 2271 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2272 break;
2273 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2274 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2275 break;
2276 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2277 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2278 break;
2279 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2280 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2281 break;
2282 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2283 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2284 break;
2285 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2286 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2287 break;
84774a4d 2288 case PCI_DEVICE_ID_HORNET:
12222f4f
JS
2289 m = (typeof(m)){"LP21000", "PCIe",
2290 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS
2291 GE = 1;
2292 break;
2293 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2294 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2295 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2296 break;
2297 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2298 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2299 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2300 break;
2301 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2302 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2303 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2304 break;
da0436e9
JS
2305 case PCI_DEVICE_ID_TIGERSHARK:
2306 oneConnect = 1;
a747c9ce 2307 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2308 break;
a747c9ce 2309 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2310 oneConnect = 1;
a747c9ce
JS
2311 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2312 break;
2313 case PCI_DEVICE_ID_FALCON:
2314 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2315 "EmulexSecure Fibre"};
6669f9bb 2316 break;
98fc5dd9
JS
2317 case PCI_DEVICE_ID_BALIUS:
2318 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2319 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2320 break;
085c647c 2321 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2322 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2323 break;
12222f4f
JS
2324 case PCI_DEVICE_ID_LANCER_FC_VF:
2325 m = (typeof(m)){"LPe16000", "PCIe",
2326 "Obsolete, Unsupported Fibre Channel Adapter"};
2327 break;
085c647c
JS
2328 case PCI_DEVICE_ID_LANCER_FCOE:
2329 oneConnect = 1;
079b5c91 2330 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2331 break;
12222f4f
JS
2332 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2333 oneConnect = 1;
2334 m = (typeof(m)){"OCe15100", "PCIe",
2335 "Obsolete, Unsupported FCoE"};
2336 break;
d38dd52c
JS
2337 case PCI_DEVICE_ID_LANCER_G6_FC:
2338 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2339 break;
f8cafd38
JS
2340 case PCI_DEVICE_ID_SKYHAWK:
2341 case PCI_DEVICE_ID_SKYHAWK_VF:
2342 oneConnect = 1;
2343 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2344 break;
5cc36b3c 2345 default:
a747c9ce 2346 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2347 break;
dea3101e 2348 }
74b72a59
JW
2349
2350 if (mdp && mdp[0] == '\0')
2351 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS
2352 /*
2353 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS
2354 * and we put the port number on the end
2355 */
2356 if (descp && descp[0] == '\0') {
2357 if (oneConnect)
2358 snprintf(descp, 255,
4169d868 2359 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2360 m.name, m.function,
da0436e9 2361 phba->Port);
4169d868
JS
2362 else if (max_speed == 0)
2363 snprintf(descp, 255,
290237d2 2364 "Emulex %s %s %s",
4169d868 2365 m.name, m.bus, m.function);
da0436e9
JS
2366 else
2367 snprintf(descp, 255,
2368 "Emulex %s %d%s %s %s",
a747c9ce
JS
2369 m.name, max_speed, (GE) ? "GE" : "Gb",
2370 m.bus, m.function);
da0436e9 2371 }
dea3101e
JB
2372}
2373
e59058c4 2374/**
3621a710 2375 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS
2376 * @phba: pointer to lpfc hba data structure.
2377 * @pring: pointer to a IOCB ring.
2378 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2379 *
2380 * This routine posts a given number of IOCBs with the associated DMA buffer
2381 * descriptors specified by the cnt argument to the given IOCB ring.
2382 *
2383 * Return codes
2384 * The number of IOCBs NOT able to be posted to the IOCB ring.
2385 **/
dea3101e 2386int
495a714c 2387lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e
JB
2388{
2389 IOCB_t *icmd;
0bd4ca25 2390 struct lpfc_iocbq *iocb;
dea3101e
JB
2391 struct lpfc_dmabuf *mp1, *mp2;
2392
2393 cnt += pring->missbufcnt;
2394
2395 /* While there are buffers to post */
2396 while (cnt > 0) {
2397 /* Allocate buffer for command iocb */
0bd4ca25 2398 iocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
2399 if (iocb == NULL) {
2400 pring->missbufcnt = cnt;
2401 return cnt;
2402 }
dea3101e
JB
2403 icmd = &iocb->iocb;
2404
2405 /* 2 buffers can be posted per command */
2406 /* Allocate buffer to post */
2407 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2408 if (mp1)
98c9ea5c
JS
2409 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2410 if (!mp1 || !mp1->virt) {
c9475cb0 2411 kfree(mp1);
604a3e30 2412 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2413 pring->missbufcnt = cnt;
2414 return cnt;
2415 }
2416
2417 INIT_LIST_HEAD(&mp1->list);
2418 /* Allocate buffer to post */
2419 if (cnt > 1) {
2420 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2421 if (mp2)
2422 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2423 &mp2->phys);
98c9ea5c 2424 if (!mp2 || !mp2->virt) {
c9475cb0 2425 kfree(mp2);
dea3101e
JB
2426 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2427 kfree(mp1);
604a3e30 2428 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2429 pring->missbufcnt = cnt;
2430 return cnt;
2431 }
2432
2433 INIT_LIST_HEAD(&mp2->list);
2434 } else {
2435 mp2 = NULL;
2436 }
2437
2438 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2439 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2440 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2441 icmd->ulpBdeCount = 1;
2442 cnt--;
2443 if (mp2) {
2444 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2445 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2446 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2447 cnt--;
2448 icmd->ulpBdeCount = 2;
2449 }
2450
2451 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2452 icmd->ulpLe = 1;
2453
3772a991
JS
2454 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2455 IOCB_ERROR) {
dea3101e
JB
2456 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2457 kfree(mp1);
2458 cnt++;
2459 if (mp2) {
2460 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2461 kfree(mp2);
2462 cnt++;
2463 }
604a3e30 2464 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2465 pring->missbufcnt = cnt;
dea3101e
JB
2466 return cnt;
2467 }
dea3101e 2468 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2469 if (mp2)
dea3101e 2470 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e
JB
2471 }
2472 pring->missbufcnt = 0;
2473 return 0;
2474}
2475
e59058c4 2476/**
3621a710 2477 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS
2478 * @phba: pointer to lpfc hba data structure.
2479 *
2480 * This routine posts initial receive IOCB buffers to the ELS ring. The
2481 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2482 * set to 64 IOCBs. SLI3 only.
e59058c4
JS
2483 *
2484 * Return codes
2485 * 0 - success (currently always success)
2486 **/
dea3101e 2487static int
2e0fef85 2488lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e
JB
2489{
2490 struct lpfc_sli *psli = &phba->sli;
2491
2492 /* Ring 0, ELS / CT buffers */
895427bd 2493 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e
JB
2494 /* Ring 2 - FCP no buffers needed */
2495
2496 return 0;
2497}
2498
2499#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2500
e59058c4 2501/**
3621a710 2502 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS
2503 * @HashResultPointer: pointer to an array as hash table.
2504 *
2505 * This routine sets up the initial values to the array of hash table entries
2506 * for the LC HBAs.
2507 **/
dea3101e
JB
2508static void
2509lpfc_sha_init(uint32_t * HashResultPointer)
2510{
2511 HashResultPointer[0] = 0x67452301;
2512 HashResultPointer[1] = 0xEFCDAB89;
2513 HashResultPointer[2] = 0x98BADCFE;
2514 HashResultPointer[3] = 0x10325476;
2515 HashResultPointer[4] = 0xC3D2E1F0;
2516}
2517
e59058c4 2518/**
3621a710 2519 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS
2520 * @HashResultPointer: pointer to an initial/result hash table.
2521 * @HashWorkingPointer: pointer to an working hash table.
2522 *
2523 * This routine iterates an initial hash table pointed by @HashResultPointer
2524 * with the values from the working hash table pointeed by @HashWorkingPointer.
2525 * The results are putting back to the initial hash table, returned through
2526 * the @HashResultPointer as the result hash table.
2527 **/
dea3101e
JB
2528static void
2529lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2530{
2531 int t;
2532 uint32_t TEMP;
2533 uint32_t A, B, C, D, E;
2534 t = 16;
2535 do {
2536 HashWorkingPointer[t] =
2537 S(1,
2538 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2539 8] ^
2540 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2541 } while (++t <= 79);
2542 t = 0;
2543 A = HashResultPointer[0];
2544 B = HashResultPointer[1];
2545 C = HashResultPointer[2];
2546 D = HashResultPointer[3];
2547 E = HashResultPointer[4];
2548
2549 do {
2550 if (t < 20) {
2551 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2552 } else if (t < 40) {
2553 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2554 } else if (t < 60) {
2555 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2556 } else {
2557 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2558 }
2559 TEMP += S(5, A) + E + HashWorkingPointer[t];
2560 E = D;
2561 D = C;
2562 C = S(30, B);
2563 B = A;
2564 A = TEMP;
2565 } while (++t <= 79);
2566
2567 HashResultPointer[0] += A;
2568 HashResultPointer[1] += B;
2569 HashResultPointer[2] += C;
2570 HashResultPointer[3] += D;
2571 HashResultPointer[4] += E;
2572
2573}
2574
e59058c4 2575/**
3621a710 2576 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS
2577 * @RandomChallenge: pointer to the entry of host challenge random number array.
2578 * @HashWorking: pointer to the entry of the working hash array.
2579 *
2580 * This routine calculates the working hash array referred by @HashWorking
2581 * from the challenge random numbers associated with the host, referred by
2582 * @RandomChallenge. The result is put into the entry of the working hash
2583 * array and returned by reference through @HashWorking.
2584 **/
dea3101e
JB
2585static void
2586lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2587{
2588 *HashWorking = (*RandomChallenge ^ *HashWorking);
2589}
2590
e59058c4 2591/**
3621a710 2592 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS
2593 * @phba: pointer to lpfc hba data structure.
2594 * @hbainit: pointer to an array of unsigned 32-bit integers.
2595 *
2596 * This routine performs the special handling for LC HBA initialization.
2597 **/
dea3101e
JB
2598void
2599lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2600{
2601 int t;
2602 uint32_t *HashWorking;
2e0fef85 2603 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2604
bbfbbbc1 2605 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e
JB
2606 if (!HashWorking)
2607 return;
2608
dea3101e
JB
2609 HashWorking[0] = HashWorking[78] = *pwwnn++;
2610 HashWorking[1] = HashWorking[79] = *pwwnn;
2611
2612 for (t = 0; t < 7; t++)
2613 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2614
2615 lpfc_sha_init(hbainit);
2616 lpfc_sha_iterate(hbainit, HashWorking);
2617 kfree(HashWorking);
2618}
2619
e59058c4 2620/**
3621a710 2621 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS
2622 * @vport: pointer to a virtual N_Port data structure.
2623 *
2624 * This routine performs the necessary cleanups before deleting the @vport.
2625 * It invokes the discovery state machine to perform necessary state
2626 * transitions and to release the ndlps associated with the @vport. Note,
2627 * the physical port is treated as @vport 0.
2628 **/
87af33fe 2629void
2e0fef85 2630lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2631{
87af33fe 2632 struct lpfc_hba *phba = vport->phba;
dea3101e 2633 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2634 int i = 0;
dea3101e 2635
87af33fe
JS
2636 if (phba->link_state > LPFC_LINK_DOWN)
2637 lpfc_port_link_failure(vport);
2638
2639 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS
2640 if (!NLP_CHK_NODE_ACT(ndlp)) {
2641 ndlp = lpfc_enable_node(vport, ndlp,
2642 NLP_STE_UNUSED_NODE);
2643 if (!ndlp)
2644 continue;
2645 spin_lock_irq(&phba->ndlp_lock);
2646 NLP_SET_FREE_REQ(ndlp);
2647 spin_unlock_irq(&phba->ndlp_lock);
2648 /* Trigger the release of the ndlp memory */
2649 lpfc_nlp_put(ndlp);
2650 continue;
2651 }
2652 spin_lock_irq(&phba->ndlp_lock);
2653 if (NLP_CHK_FREE_REQ(ndlp)) {
2654 /* The ndlp should not be in memory free mode already */
2655 spin_unlock_irq(&phba->ndlp_lock);
2656 continue;
2657 } else
2658 /* Indicate request for freeing ndlp memory */
2659 NLP_SET_FREE_REQ(ndlp);
2660 spin_unlock_irq(&phba->ndlp_lock);
2661
58da1ffb
JS
2662 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2663 ndlp->nlp_DID == Fabric_DID) {
2664 /* Just free up ndlp with Fabric_DID for vports */
2665 lpfc_nlp_put(ndlp);
2666 continue;
2667 }
2668
eff4a01b
JS
2669 /* take care of nodes in unused state before the state
2670 * machine taking action.
2671 */
2672 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2673 lpfc_nlp_put(ndlp);
2674 continue;
2675 }
2676
87af33fe
JS
2677 if (ndlp->nlp_type & NLP_FABRIC)
2678 lpfc_disc_state_machine(vport, ndlp, NULL,
2679 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2680
a0f2d3ef
JS
2681 if (ndlp->nlp_fc4_type & NLP_FC4_NVME) {
2682 /* Remove the NVME transport reference now and
2683 * continue to remove the node.
2684 */
2685 lpfc_nlp_put(ndlp);
2686 }
2687
87af33fe
JS
2688 lpfc_disc_state_machine(vport, ndlp, NULL,
2689 NLP_EVT_DEVICE_RM);
2690 }
2691
a8adb832
JS
2692 /* At this point, ALL ndlp's should be gone
2693 * because of the previous NLP_EVT_DEVICE_RM.
2694 * Lets wait for this to happen, if needed.
2695 */
87af33fe 2696 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2697 if (i++ > 3000) {
87af33fe 2698 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2699 "0233 Nodelist not empty\n");
e47c9093
JS
2700 list_for_each_entry_safe(ndlp, next_ndlp,
2701 &vport->fc_nodes, nlp_listp) {
2702 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2703 LOG_NODE,
d7c255b2 2704 "0282 did:x%x ndlp:x%p "
e47c9093
JS
2705 "usgmap:x%x refcnt:%d\n",
2706 ndlp->nlp_DID, (void *)ndlp,
2707 ndlp->nlp_usg_map,
2c935bc5 2708 kref_read(&ndlp->kref));
e47c9093 2709 }
a8adb832 2710 break;
87af33fe 2711 }
a8adb832
JS
2712
2713 /* Wait for any activity on ndlps to settle */
2714 msleep(10);
87af33fe 2715 }
1151e3ec 2716 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e
JB
2717}
2718
e59058c4 2719/**
3621a710 2720 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS
2721 * @vport: pointer to a virtual N_Port data structure.
2722 *
2723 * This routine stops all the timers associated with a @vport. This function
2724 * is invoked before disabling or deleting a @vport. Note that the physical
2725 * port is treated as @vport 0.
2726 **/
92d7f7b0
JS
2727void
2728lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2729{
92d7f7b0 2730 del_timer_sync(&vport->els_tmofunc);
92494144 2731 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS
2732 lpfc_can_disctmo(vport);
2733 return;
dea3101e
JB
2734}
2735
ecfd03c6
JS
2736/**
2737 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2738 * @phba: pointer to lpfc hba data structure.
2739 *
2740 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2741 * caller of this routine should already hold the host lock.
2742 **/
2743void
2744__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2745{
5ac6b303
JS
2746 /* Clear pending FCF rediscovery wait flag */
2747 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2748
ecfd03c6
JS
2749 /* Now, try to stop the timer */
2750 del_timer(&phba->fcf.redisc_wait);
2751}
2752
2753/**
2754 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2755 * @phba: pointer to lpfc hba data structure.
2756 *
2757 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2758 * checks whether the FCF rediscovery wait timer is pending with the host
2759 * lock held before proceeding with disabling the timer and clearing the
2760 * wait timer pendig flag.
2761 **/
2762void
2763lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2764{
2765 spin_lock_irq(&phba->hbalock);
2766 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2767 /* FCF rediscovery timer already fired or stopped */
2768 spin_unlock_irq(&phba->hbalock);
2769 return;
2770 }
2771 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS
2772 /* Clear failover in progress flags */
2773 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS
2774 spin_unlock_irq(&phba->hbalock);
2775}
2776
e59058c4 2777/**
3772a991 2778 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS
2779 * @phba: pointer to lpfc hba data structure.
2780 *
2781 * This routine stops all the timers associated with a HBA. This function is
2782 * invoked before either putting a HBA offline or unloading the driver.
2783 **/
3772a991
JS
2784void
2785lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2786{
51ef4c26 2787 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2788 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2789 del_timer_sync(&phba->fabric_block_timer);
9399627f 2790 del_timer_sync(&phba->eratt_poll);
3772a991 2791 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS
2792 if (phba->sli_rev == LPFC_SLI_REV4) {
2793 del_timer_sync(&phba->rrq_tmr);
2794 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2795 }
3772a991
JS
2796 phba->hb_outstanding = 0;
2797
2798 switch (phba->pci_dev_grp) {
2799 case LPFC_PCI_DEV_LP:
2800 /* Stop any LightPulse device specific driver timers */
2801 del_timer_sync(&phba->fcp_poll_timer);
2802 break;
2803 case LPFC_PCI_DEV_OC:
2804 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2805 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS
2806 break;
2807 default:
2808 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2809 "0297 Invalid device group (x%x)\n",
2810 phba->pci_dev_grp);
2811 break;
2812 }
2e0fef85 2813 return;
dea3101e
JB
2814}
2815
e59058c4 2816/**
3621a710 2817 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS
2818 * @phba: pointer to lpfc hba data structure.
2819 *
2820 * This routine marks a HBA's management interface as blocked. Once the HBA's
2821 * management interface is marked as blocked, all the user space access to
2822 * the HBA, whether they are from sysfs interface or libdfc interface will
2823 * all be blocked. The HBA is set to block the management interface when the
2824 * driver prepares the HBA interface for online or offline.
2825 **/
a6ababd2 2826static void
618a5230 2827lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB
2828{
2829 unsigned long iflag;
6e7288d9
JS
2830 uint8_t actcmd = MBX_HEARTBEAT;
2831 unsigned long timeout;
2832
a6ababd2
AB
2833 spin_lock_irqsave(&phba->hbalock, iflag);
2834 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS
2835 spin_unlock_irqrestore(&phba->hbalock, iflag);
2836 if (mbx_action == LPFC_MBX_NO_WAIT)
2837 return;
2838 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2839 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2840 if (phba->sli.mbox_active) {
6e7288d9 2841 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS
2842 /* Determine how long we might wait for the active mailbox
2843 * command to be gracefully completed by firmware.
2844 */
2845 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2846 phba->sli.mbox_active) * 1000) + jiffies;
2847 }
a6ababd2 2848 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2849
6e7288d9
JS
2850 /* Wait for the outstnading mailbox command to complete */
2851 while (phba->sli.mbox_active) {
2852 /* Check active mailbox complete status every 2ms */
2853 msleep(2);
2854 if (time_after(jiffies, timeout)) {
2855 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2856 "2813 Mgmt IO is Blocked %x "
2857 "- mbox cmd %x still active\n",
2858 phba->sli.sli_flag, actcmd);
2859 break;
2860 }
2861 }
a6ababd2
AB
2862}
2863
6b5151fd
JS
2864/**
2865 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2866 * @phba: pointer to lpfc hba data structure.
2867 *
2868 * Allocate RPIs for all active remote nodes. This is needed whenever
2869 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2870 * is to fixup the temporary rpi assignments.
2871 **/
2872void
2873lpfc_sli4_node_prep(struct lpfc_hba *phba)
2874{
2875 struct lpfc_nodelist *ndlp, *next_ndlp;
2876 struct lpfc_vport **vports;
2877 int i;
2878
2879 if (phba->sli_rev != LPFC_SLI_REV4)
2880 return;
2881
2882 vports = lpfc_create_vport_work_array(phba);
2883 if (vports != NULL) {
2884 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
2885 if (vports[i]->load_flag & FC_UNLOADING)
2886 continue;
2887
2888 list_for_each_entry_safe(ndlp, next_ndlp,
2889 &vports[i]->fc_nodes,
2890 nlp_listp) {
be6bb941 2891 if (NLP_CHK_NODE_ACT(ndlp)) {
6b5151fd
JS
2892 ndlp->nlp_rpi =
2893 lpfc_sli4_alloc_rpi(phba);
be6bb941
JS
2894 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
2895 LOG_NODE,
2896 "0009 rpi:%x DID:%x "
2897 "flg:%x map:%x %p\n",
2898 ndlp->nlp_rpi,
2899 ndlp->nlp_DID,
2900 ndlp->nlp_flag,
2901 ndlp->nlp_usg_map,
2902 ndlp);
2903 }
6b5151fd
JS
2904 }
2905 }
2906 }
2907 lpfc_destroy_vport_work_array(phba, vports);
2908}
2909
e59058c4 2910/**
3621a710 2911 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS
2912 * @phba: pointer to lpfc hba data structure.
2913 *
2914 * This routine initializes the HBA and brings a HBA online. During this
2915 * process, the management interface is blocked to prevent user space access
2916 * to the HBA interfering with the driver initialization.
2917 *
2918 * Return codes
2919 * 0 - successful
2920 * 1 - failed
2921 **/
dea3101e 2922int
2e0fef85 2923lpfc_online(struct lpfc_hba *phba)
dea3101e 2924{
372bd282 2925 struct lpfc_vport *vport;
549e55cd
JS
2926 struct lpfc_vport **vports;
2927 int i;
16a3a208 2928 bool vpis_cleared = false;
2e0fef85 2929
dea3101e
JB
2930 if (!phba)
2931 return 0;
372bd282 2932 vport = phba->pport;
dea3101e 2933
2e0fef85 2934 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e
JB
2935 return 0;
2936
ed957684 2937 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 2938 "0458 Bring Adapter online\n");
dea3101e 2939
618a5230 2940 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 2941
da0436e9
JS
2942 if (phba->sli_rev == LPFC_SLI_REV4) {
2943 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
2944 lpfc_unblock_mgmt_io(phba);
2945 return 1;
2946 }
16a3a208
JS
2947 spin_lock_irq(&phba->hbalock);
2948 if (!phba->sli4_hba.max_cfg_param.vpi_used)
2949 vpis_cleared = true;
2950 spin_unlock_irq(&phba->hbalock);
da0436e9 2951 } else {
895427bd 2952 lpfc_sli_queue_init(phba);
da0436e9
JS
2953 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
2954 lpfc_unblock_mgmt_io(phba);
2955 return 1;
2956 }
46fa311e 2957 }
dea3101e 2958
549e55cd 2959 vports = lpfc_create_vport_work_array(phba);
aeb6641f 2960 if (vports != NULL) {
da0436e9 2961 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS
2962 struct Scsi_Host *shost;
2963 shost = lpfc_shost_from_vport(vports[i]);
2964 spin_lock_irq(shost->host_lock);
2965 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
2966 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
2967 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 2968 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 2969 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS
2970 if ((vpis_cleared) &&
2971 (vports[i]->port_type !=
2972 LPFC_PHYSICAL_PORT))
2973 vports[i]->vpi = 0;
2974 }
549e55cd
JS
2975 spin_unlock_irq(shost->host_lock);
2976 }
aeb6641f
AB
2977 }
2978 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 2979
46fa311e 2980 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
2981 return 0;
2982}
2983
e59058c4 2984/**
3621a710 2985 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS
2986 * @phba: pointer to lpfc hba data structure.
2987 *
2988 * This routine marks a HBA's management interface as not blocked. Once the
2989 * HBA's management interface is marked as not blocked, all the user space
2990 * access to the HBA, whether they are from sysfs interface or libdfc
2991 * interface will be allowed. The HBA is set to block the management interface
2992 * when the driver prepares the HBA interface for online or offline and then
2993 * set to unblock the management interface afterwards.
2994 **/
46fa311e
JS
2995void
2996lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
2997{
2998 unsigned long iflag;
2999
2e0fef85
JS
3000 spin_lock_irqsave(&phba->hbalock, iflag);
3001 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3002 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS
3003}
3004
e59058c4 3005/**
3621a710 3006 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS
3007 * @phba: pointer to lpfc hba data structure.
3008 *
3009 * This routine is invoked to prepare a HBA to be brought offline. It performs
3010 * unregistration login to all the nodes on all vports and flushes the mailbox
3011 * queue to make it ready to be brought offline.
3012 **/
46fa311e 3013void
618a5230 3014lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3015{
2e0fef85 3016 struct lpfc_vport *vport = phba->pport;
46fa311e 3017 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3018 struct lpfc_vport **vports;
72100cc4 3019 struct Scsi_Host *shost;
87af33fe 3020 int i;
dea3101e 3021
2e0fef85 3022 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3023 return;
dea3101e 3024
618a5230 3025 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e
JB
3026
3027 lpfc_linkdown(phba);
3028
87af33fe
JS
3029 /* Issue an unreg_login to all nodes on all vports */
3030 vports = lpfc_create_vport_work_array(phba);
3031 if (vports != NULL) {
da0436e9 3032 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS
3033 if (vports[i]->load_flag & FC_UNLOADING)
3034 continue;
72100cc4
JS
3035 shost = lpfc_shost_from_vport(vports[i]);
3036 spin_lock_irq(shost->host_lock);
c868595d 3037 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS
3038 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3039 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3040 spin_unlock_irq(shost->host_lock);
695a814e 3041
87af33fe
JS
3042 shost = lpfc_shost_from_vport(vports[i]);
3043 list_for_each_entry_safe(ndlp, next_ndlp,
3044 &vports[i]->fc_nodes,
3045 nlp_listp) {
e47c9093
JS
3046 if (!NLP_CHK_NODE_ACT(ndlp))
3047 continue;
87af33fe
JS
3048 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3049 continue;
3050 if (ndlp->nlp_type & NLP_FABRIC) {
3051 lpfc_disc_state_machine(vports[i], ndlp,
3052 NULL, NLP_EVT_DEVICE_RECOVERY);
3053 lpfc_disc_state_machine(vports[i], ndlp,
3054 NULL, NLP_EVT_DEVICE_RM);
3055 }
3056 spin_lock_irq(shost->host_lock);
3057 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3058 spin_unlock_irq(shost->host_lock);
6b5151fd
JS
3059 /*
3060 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS
3061 * RPI. Get a new RPI when the adapter port
3062 * comes back online.
6b5151fd 3063 */
be6bb941
JS
3064 if (phba->sli_rev == LPFC_SLI_REV4) {
3065 lpfc_printf_vlog(ndlp->vport,
3066 KERN_INFO, LOG_NODE,
3067 "0011 lpfc_offline: "
3068 "ndlp:x%p did %x "
3069 "usgmap:x%x rpi:%x\n",
3070 ndlp, ndlp->nlp_DID,
3071 ndlp->nlp_usg_map,
3072 ndlp->nlp_rpi);
3073
6b5151fd 3074 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3075 }
87af33fe
JS
3076 lpfc_unreg_rpi(vports[i], ndlp);
3077 }
3078 }
3079 }
09372820 3080 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3081
618a5230 3082 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
46fa311e
JS
3083}
3084
e59058c4 3085/**
3621a710 3086 * lpfc_offline - Bring a HBA offline
e59058c4
JS
3087 * @phba: pointer to lpfc hba data structure.
3088 *
3089 * This routine actually brings a HBA offline. It stops all the timers
3090 * associated with the HBA, brings down the SLI layer, and eventually
3091 * marks the HBA as in offline state for the upper layer protocol.
3092 **/
46fa311e 3093void
2e0fef85 3094lpfc_offline(struct lpfc_hba *phba)
46fa311e 3095{
549e55cd
JS
3096 struct Scsi_Host *shost;
3097 struct lpfc_vport **vports;
3098 int i;
46fa311e 3099
549e55cd 3100 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3101 return;
688a8863 3102
da0436e9
JS
3103 /* stop port and all timers associated with this hba */
3104 lpfc_stop_port(phba);
51ef4c26
JS
3105 vports = lpfc_create_vport_work_array(phba);
3106 if (vports != NULL)
da0436e9 3107 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3108 lpfc_stop_vport_timers(vports[i]);
09372820 3109 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3110 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3111 "0460 Bring Adapter offline\n");
dea3101e
JB
3112 /* Bring down the SLI Layer and cleanup. The HBA is offline
3113 now. */
3114 lpfc_sli_hba_down(phba);
92d7f7b0 3115 spin_lock_irq(&phba->hbalock);
7054a606 3116 phba->work_ha = 0;
92d7f7b0 3117 spin_unlock_irq(&phba->hbalock);
549e55cd
JS
3118 vports = lpfc_create_vport_work_array(phba);
3119 if (vports != NULL)
da0436e9 3120 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3121 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS
3122 spin_lock_irq(shost->host_lock);
3123 vports[i]->work_port_events = 0;
3124 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3125 spin_unlock_irq(shost->host_lock);
3126 }
09372820 3127 lpfc_destroy_vport_work_array(phba, vports);
dea3101e
JB
3128}
3129
e59058c4 3130/**
3621a710 3131 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS
3132 * @phba: pointer to lpfc hba data structure.
3133 *
3134 * This routine is to free all the SCSI buffers and IOCBs from the driver
3135 * list back to kernel. It is called from lpfc_pci_remove_one to free
3136 * the internal resources before the device is removed from the system.
e59058c4 3137 **/
8a9d2e80 3138static void
2e0fef85 3139lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e
JB
3140{
3141 struct lpfc_scsi_buf *sb, *sb_next;
dea3101e 3142
895427bd
JS
3143 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3144 return;
3145
2e0fef85 3146 spin_lock_irq(&phba->hbalock);
a40fc5f0 3147
dea3101e 3148 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS
3149
3150 spin_lock(&phba->scsi_buf_list_put_lock);
3151 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3152 list) {
dea3101e 3153 list_del(&sb->list);
895427bd 3154 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3155 sb->dma_handle);
dea3101e
JB
3156 kfree(sb);
3157 phba->total_scsi_bufs--;
3158 }
a40fc5f0
JS
3159 spin_unlock(&phba->scsi_buf_list_put_lock);
3160
3161 spin_lock(&phba->scsi_buf_list_get_lock);
3162 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3163 list) {
dea3101e 3164 list_del(&sb->list);
895427bd 3165 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3166 sb->dma_handle);
dea3101e
JB
3167 kfree(sb);
3168 phba->total_scsi_bufs--;
3169 }
a40fc5f0 3170 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3171 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3172}
895427bd
JS
3173/**
3174 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3175 * @phba: pointer to lpfc hba data structure.
3176 *
3177 * This routine is to free all the NVME buffers and IOCBs from the driver
3178 * list back to kernel. It is called from lpfc_pci_remove_one to free
3179 * the internal resources before the device is removed from the system.
3180 **/
3181static void
3182lpfc_nvme_free(struct lpfc_hba *phba)
3183{
3184 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
895427bd
JS
3185
3186 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3187 return;
3188
3189 spin_lock_irq(&phba->hbalock);
3190
3191 /* Release all the lpfc_nvme_bufs maintained by this host. */
3192 spin_lock(&phba->nvme_buf_list_put_lock);
3193 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3194 &phba->lpfc_nvme_buf_list_put, list) {
3195 list_del(&lpfc_ncmd->list);
3196 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3197 lpfc_ncmd->dma_handle);
3198 kfree(lpfc_ncmd);
3199 phba->total_nvme_bufs--;
3200 }
3201 spin_unlock(&phba->nvme_buf_list_put_lock);
3202
3203 spin_lock(&phba->nvme_buf_list_get_lock);
3204 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3205 &phba->lpfc_nvme_buf_list_get, list) {
3206 list_del(&lpfc_ncmd->list);
3207 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3208 lpfc_ncmd->dma_handle);
3209 kfree(lpfc_ncmd);
3210 phba->total_nvme_bufs--;
3211 }
3212 spin_unlock(&phba->nvme_buf_list_get_lock);
895427bd
JS
3213 spin_unlock_irq(&phba->hbalock);
3214}
8a9d2e80 3215/**
895427bd 3216 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS
3217 * @phba: pointer to lpfc hba data structure.
3218 *
3219 * This routine first calculates the sizes of the current els and allocated
3220 * scsi sgl lists, and then goes through all sgls to updates the physical
3221 * XRIs assigned due to port function reset. During port initialization, the
3222 * current els and allocated scsi sgl lists are 0s.
3223 *
3224 * Return codes
3225 * 0 - successful (for now, it always returns 0)
3226 **/
3227int
895427bd 3228lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS
3229{
3230 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3231 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3232 LIST_HEAD(els_sgl_list);
8a9d2e80
JS
3233 int rc;
3234
3235 /*
3236 * update on pci function's els xri-sgl list
3237 */
3238 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3239
8a9d2e80
JS
3240 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3241 /* els xri-sgl expanded */
3242 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3243 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3244 "3157 ELS xri-sgl count increased from "
3245 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3246 els_xri_cnt);
3247 /* allocate the additional els sgls */
3248 for (i = 0; i < xri_cnt; i++) {
3249 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3250 GFP_KERNEL);
3251 if (sglq_entry == NULL) {
3252 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3253 "2562 Failure to allocate an "
3254 "ELS sgl entry:%d\n", i);
3255 rc = -ENOMEM;
3256 goto out_free_mem;
3257 }
3258 sglq_entry->buff_type = GEN_BUFF_TYPE;
3259 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3260 &sglq_entry->phys);
3261 if (sglq_entry->virt == NULL) {
3262 kfree(sglq_entry);
3263 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3264 "2563 Failure to allocate an "
3265 "ELS mbuf:%d\n", i);
3266 rc = -ENOMEM;
3267 goto out_free_mem;
3268 }
3269 sglq_entry->sgl = sglq_entry->virt;
3270 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3271 sglq_entry->state = SGL_FREED;
3272 list_add_tail(&sglq_entry->list, &els_sgl_list);
3273 }
38c20673 3274 spin_lock_irq(&phba->hbalock);
895427bd
JS
3275 spin_lock(&phba->sli4_hba.sgl_list_lock);
3276 list_splice_init(&els_sgl_list,
3277 &phba->sli4_hba.lpfc_els_sgl_list);
3278 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3279 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
3280 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3281 /* els xri-sgl shrinked */
3282 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3283 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3284 "3158 ELS xri-sgl count decreased from "
3285 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3286 els_xri_cnt);
3287 spin_lock_irq(&phba->hbalock);
895427bd
JS
3288 spin_lock(&phba->sli4_hba.sgl_list_lock);
3289 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3290 &els_sgl_list);
8a9d2e80
JS
3291 /* release extra els sgls from list */
3292 for (i = 0; i < xri_cnt; i++) {
3293 list_remove_head(&els_sgl_list,
3294 sglq_entry, struct lpfc_sglq, list);
3295 if (sglq_entry) {
895427bd
JS
3296 __lpfc_mbuf_free(phba, sglq_entry->virt,
3297 sglq_entry->phys);
8a9d2e80
JS
3298 kfree(sglq_entry);
3299 }
3300 }
895427bd
JS
3301 list_splice_init(&els_sgl_list,
3302 &phba->sli4_hba.lpfc_els_sgl_list);
3303 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS
3304 spin_unlock_irq(&phba->hbalock);
3305 } else
3306 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3307 "3163 ELS xri-sgl count unchanged: %d\n",
3308 els_xri_cnt);
3309 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3310
3311 /* update xris to els sgls on the list */
3312 sglq_entry = NULL;
3313 sglq_entry_next = NULL;
3314 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3315 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS
3316 lxri = lpfc_sli4_next_xritag(phba);
3317 if (lxri == NO_XRI) {
3318 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3319 "2400 Failed to allocate xri for "
3320 "ELS sgl\n");
3321 rc = -ENOMEM;
3322 goto out_free_mem;
3323 }
3324 sglq_entry->sli4_lxritag = lxri;
3325 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3326 }
895427bd
JS
3327 return 0;
3328
3329out_free_mem:
3330 lpfc_free_els_sgl_list(phba);
3331 return rc;
3332}
3333
f358dd0c
JS
3334/**
3335 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3336 * @phba: pointer to lpfc hba data structure.
3337 *
3338 * This routine first calculates the sizes of the current els and allocated
3339 * scsi sgl lists, and then goes through all sgls to updates the physical
3340 * XRIs assigned due to port function reset. During port initialization, the
3341 * current els and allocated scsi sgl lists are 0s.
3342 *
3343 * Return codes
3344 * 0 - successful (for now, it always returns 0)
3345 **/
3346int
3347lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3348{
3349 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3350 uint16_t i, lxri, xri_cnt, els_xri_cnt;
3351 uint16_t nvmet_xri_cnt, tot_cnt;
3352 LIST_HEAD(nvmet_sgl_list);
3353 int rc;
3354
3355 /*
3356 * update on pci function's nvmet xri-sgl list
3357 */
3358 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
2d7dbc4c 3359 nvmet_xri_cnt = phba->cfg_nvmet_mrq * phba->cfg_nvmet_mrq_post;
f358dd0c 3360 tot_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
2d7dbc4c
JS
3361 if (nvmet_xri_cnt > tot_cnt) {
3362 phba->cfg_nvmet_mrq_post = tot_cnt / phba->cfg_nvmet_mrq;
3363 nvmet_xri_cnt = phba->cfg_nvmet_mrq * phba->cfg_nvmet_mrq_post;
3364 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3365 "6301 NVMET post-sgl count changed to %d\n",
3366 phba->cfg_nvmet_mrq_post);
3367 }
f358dd0c
JS
3368
3369 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3370 /* els xri-sgl expanded */
3371 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3372 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3373 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3374 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3375 /* allocate the additional nvmet sgls */
3376 for (i = 0; i < xri_cnt; i++) {
3377 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3378 GFP_KERNEL);
3379 if (sglq_entry == NULL) {
3380 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3381 "6303 Failure to allocate an "
3382 "NVMET sgl entry:%d\n", i);
3383 rc = -ENOMEM;
3384 goto out_free_mem;
3385 }
3386 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3387 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3388 &sglq_entry->phys);
3389 if (sglq_entry->virt == NULL) {
3390 kfree(sglq_entry);
3391 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3392 "6304 Failure to allocate an "
3393 "NVMET buf:%d\n", i);
3394 rc = -ENOMEM;
3395 goto out_free_mem;
3396 }
3397 sglq_entry->sgl = sglq_entry->virt;
3398 memset(sglq_entry->sgl, 0,
3399 phba->cfg_sg_dma_buf_size);
3400 sglq_entry->state = SGL_FREED;
3401 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3402 }
3403 spin_lock_irq(&phba->hbalock);
3404 spin_lock(&phba->sli4_hba.sgl_list_lock);
3405 list_splice_init(&nvmet_sgl_list,
3406 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3407 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3408 spin_unlock_irq(&phba->hbalock);
3409 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3410 /* nvmet xri-sgl shrunk */
3411 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3412 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3413 "6305 NVMET xri-sgl count decreased from "
3414 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3415 nvmet_xri_cnt);
3416 spin_lock_irq(&phba->hbalock);
3417 spin_lock(&phba->sli4_hba.sgl_list_lock);
3418 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3419 &nvmet_sgl_list);
3420 /* release extra nvmet sgls from list */
3421 for (i = 0; i < xri_cnt; i++) {
3422 list_remove_head(&nvmet_sgl_list,
3423 sglq_entry, struct lpfc_sglq, list);
3424 if (sglq_entry) {
3425 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3426 sglq_entry->phys);
3427 kfree(sglq_entry);
3428 }
3429 }
3430 list_splice_init(&nvmet_sgl_list,
3431 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3432 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3433 spin_unlock_irq(&phba->hbalock);
3434 } else
3435 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3436 "6306 NVMET xri-sgl count unchanged: %d\n",
3437 nvmet_xri_cnt);
3438 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3439
3440 /* update xris to nvmet sgls on the list */
3441 sglq_entry = NULL;
3442 sglq_entry_next = NULL;
3443 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3444 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3445 lxri = lpfc_sli4_next_xritag(phba);
3446 if (lxri == NO_XRI) {
3447 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3448 "6307 Failed to allocate xri for "
3449 "NVMET sgl\n");
3450 rc = -ENOMEM;
3451 goto out_free_mem;
3452 }
3453 sglq_entry->sli4_lxritag = lxri;
3454 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3455 }
3456 return 0;
3457
3458out_free_mem:
3459 lpfc_free_nvmet_sgl_list(phba);
3460 return rc;
3461}
3462
895427bd
JS
3463/**
3464 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3465 * @phba: pointer to lpfc hba data structure.
3466 *
3467 * This routine first calculates the sizes of the current els and allocated
3468 * scsi sgl lists, and then goes through all sgls to updates the physical
3469 * XRIs assigned due to port function reset. During port initialization, the
3470 * current els and allocated scsi sgl lists are 0s.
3471 *
3472 * Return codes
3473 * 0 - successful (for now, it always returns 0)
3474 **/
3475int
3476lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3477{
3478 struct lpfc_scsi_buf *psb, *psb_next;
3479 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3480 LIST_HEAD(scsi_sgl_list);
3481 int rc;
8a9d2e80
JS
3482
3483 /*
895427bd 3484 * update on pci function's els xri-sgl list
8a9d2e80 3485 */
895427bd 3486 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS
3487 phba->total_scsi_bufs = 0;
3488
895427bd
JS
3489 /*
3490 * update on pci function's allocated scsi xri-sgl list
3491 */
8a9d2e80
JS
3492 /* maximum number of xris available for scsi buffers */
3493 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3494 els_xri_cnt;
3495
895427bd
JS
3496 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3497 return 0;
3498
3499 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3500 phba->sli4_hba.scsi_xri_max = /* Split them up */
3501 (phba->sli4_hba.scsi_xri_max *
3502 phba->cfg_xri_split) / 100;
8a9d2e80 3503
a40fc5f0 3504 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3505 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3506 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3507 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3508 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3509 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS
3510
3511 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3512 /* max scsi xri shrinked below the allocated scsi buffers */
3513 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3514 phba->sli4_hba.scsi_xri_max;
3515 /* release the extra allocated scsi buffers */
3516 for (i = 0; i < scsi_xri_cnt; i++) {
3517 list_remove_head(&scsi_sgl_list, psb,
3518 struct lpfc_scsi_buf, list);
a2fc4aef 3519 if (psb) {
895427bd 3520 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS
3521 psb->data, psb->dma_handle);
3522 kfree(psb);
3523 }
8a9d2e80 3524 }
a40fc5f0 3525 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3526 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3527 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS
3528 }
3529
3530 /* update xris associated to remaining allocated scsi buffers */
3531 psb = NULL;
3532 psb_next = NULL;
3533 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3534 lxri = lpfc_sli4_next_xritag(phba);
3535 if (lxri == NO_XRI) {
3536 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3537 "2560 Failed to allocate xri for "
3538 "scsi buffer\n");
3539 rc = -ENOMEM;
3540 goto out_free_mem;
3541 }
3542 psb->cur_iocbq.sli4_lxritag = lxri;
3543 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3544 }
a40fc5f0 3545 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3546 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3547 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3548 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3549 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3550 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3551 return 0;
8a9d2e80
JS
3552
3553out_free_mem:
8a9d2e80
JS
3554 lpfc_scsi_free(phba);
3555 return rc;
dea3101e
JB
3556}
3557
96418b5e
JS
3558static uint64_t
3559lpfc_get_wwpn(struct lpfc_hba *phba)
3560{
3561 uint64_t wwn;
3562 int rc;
3563 LPFC_MBOXQ_t *mboxq;
3564 MAILBOX_t *mb;
3565
3566
3567 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3568 GFP_KERNEL);
3569 if (!mboxq)
3570 return (uint64_t)-1;
3571
3572 /* First get WWN of HBA instance */
3573 lpfc_read_nv(phba, mboxq);
3574 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3575 if (rc != MBX_SUCCESS) {
3576 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3577 "6019 Mailbox failed , mbxCmd x%x "
3578 "READ_NV, mbxStatus x%x\n",
3579 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
3580 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
3581 mempool_free(mboxq, phba->mbox_mem_pool);
3582 return (uint64_t) -1;
3583 }
3584 mb = &mboxq->u.mb;
3585 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
3586 /* wwn is WWPN of HBA instance */
3587 mempool_free(mboxq, phba->mbox_mem_pool);
3588 if (phba->sli_rev == LPFC_SLI_REV4)
3589 return be64_to_cpu(wwn);
3590 else
3591 return (((wwn & 0xffffffff00000000) >> 32) |
3592 ((wwn & 0x00000000ffffffff) << 32));
3593
3594}
3595
895427bd
JS
3596/**
3597 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3598 * @phba: pointer to lpfc hba data structure.
3599 *
3600 * This routine first calculates the sizes of the current els and allocated
3601 * scsi sgl lists, and then goes through all sgls to updates the physical
3602 * XRIs assigned due to port function reset. During port initialization, the
3603 * current els and allocated scsi sgl lists are 0s.
3604 *
3605 * Return codes
3606 * 0 - successful (for now, it always returns 0)
3607 **/
3608int
3609lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3610{
3611 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3612 uint16_t i, lxri, els_xri_cnt;
3613 uint16_t nvme_xri_cnt, nvme_xri_max;
3614 LIST_HEAD(nvme_sgl_list);
3615 int rc;
3616
3617 phba->total_nvme_bufs = 0;
3618
3619 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3620 return 0;
3621 /*
3622 * update on pci function's allocated nvme xri-sgl list
3623 */
3624
3625 /* maximum number of xris available for nvme buffers */
3626 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3627 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3628 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3629 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3630
3631 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3632 "6074 Current allocated NVME xri-sgl count:%d, "
3633 "maximum NVME xri count:%d\n",
3634 phba->sli4_hba.nvme_xri_cnt,
3635 phba->sli4_hba.nvme_xri_max);
3636
3637 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3638 spin_lock(&phba->nvme_buf_list_put_lock);
3639 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3640 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
3641 spin_unlock(&phba->nvme_buf_list_put_lock);
3642 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3643
3644 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3645 /* max nvme xri shrunk below the allocated nvme buffers */
3646 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3647 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3648 phba->sli4_hba.nvme_xri_max;
3649 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3650 /* release the extra allocated nvme buffers */
3651 for (i = 0; i < nvme_xri_cnt; i++) {
3652 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3653 struct lpfc_nvme_buf, list);
3654 if (lpfc_ncmd) {
3655 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
3656 lpfc_ncmd->data,
3657 lpfc_ncmd->dma_handle);
3658 kfree(lpfc_ncmd);
3659 }
3660 }
3661 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3662 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3663 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3664 }
3665
3666 /* update xris associated to remaining allocated nvme buffers */
3667 lpfc_ncmd = NULL;
3668 lpfc_ncmd_next = NULL;
3669 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3670 &nvme_sgl_list, list) {
3671 lxri = lpfc_sli4_next_xritag(phba);
3672 if (lxri == NO_XRI) {
3673 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3674 "6075 Failed to allocate xri for "
3675 "nvme buffer\n");
3676 rc = -ENOMEM;
3677 goto out_free_mem;
3678 }
3679 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3680 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3681 }
3682 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3683 spin_lock(&phba->nvme_buf_list_put_lock);
3684 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
3685 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3686 spin_unlock(&phba->nvme_buf_list_put_lock);
3687 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3688 return 0;
3689
3690out_free_mem:
3691 lpfc_nvme_free(phba);
3692 return rc;
3693}
3694
e59058c4 3695/**
3621a710 3696 * lpfc_create_port - Create an FC port
e59058c4
JS
3697 * @phba: pointer to lpfc hba data structure.
3698 * @instance: a unique integer ID to this FC port.
3699 * @dev: pointer to the device data structure.
3700 *
3701 * This routine creates a FC port for the upper layer protocol. The FC port
3702 * can be created on top of either a physical port or a virtual port provided
3703 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3704 * and associates the FC port created before adding the shost into the SCSI
3705 * layer.
3706 *
3707 * Return codes
3708 * @vport - pointer to the virtual N_Port data structure.
3709 * NULL - port create failed.
3710 **/
2e0fef85 3711struct lpfc_vport *
3de2a653 3712lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3713{
2e0fef85 3714 struct lpfc_vport *vport;
895427bd 3715 struct Scsi_Host *shost = NULL;
2e0fef85 3716 int error = 0;
96418b5e
JS
3717 int i;
3718 uint64_t wwn;
3719 bool use_no_reset_hba = false;
3720
3721 wwn = lpfc_get_wwpn(phba);
3722
3723 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
3724 if (wwn == lpfc_no_hba_reset[i]) {
3725 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3726 "6020 Setting use_no_reset port=%llx\n",
3727 wwn);
3728 use_no_reset_hba = true;
3729 break;
3730 }
3731 }
47a8617c 3732
895427bd
JS
3733 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3734 if (dev != &phba->pcidev->dev) {
3735 shost = scsi_host_alloc(&lpfc_vport_template,
3736 sizeof(struct lpfc_vport));
3737 } else {
96418b5e 3738 if (!use_no_reset_hba)
895427bd
JS
3739 shost = scsi_host_alloc(&lpfc_template,
3740 sizeof(struct lpfc_vport));
3741 else
96418b5e 3742 shost = scsi_host_alloc(&lpfc_template_no_hr,
895427bd
JS
3743 sizeof(struct lpfc_vport));
3744 }
3745 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3746 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS
3747 sizeof(struct lpfc_vport));
3748 }
2e0fef85
JS
3749 if (!shost)
3750 goto out;
47a8617c 3751
2e0fef85
JS
3752 vport = (struct lpfc_vport *) shost->hostdata;
3753 vport->phba = phba;
2e0fef85 3754 vport->load_flag |= FC_LOADING;
92d7f7b0 3755 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3756 vport->fc_rscn_flush = 0;
3de2a653 3757 lpfc_get_vport_cfgparam(vport);
895427bd 3758
2e0fef85
JS
3759 shost->unique_id = instance;
3760 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3761 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS
3762 shost->this_id = -1;
3763 shost->max_cmd_len = 16;
8b0dff14 3764 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3765 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3766 shost->dma_boundary =
cb5172ea 3767 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS
3768 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3769 }
81301a9b 3770
47a8617c 3771 /*
2e0fef85
JS
3772 * Set initial can_queue value since 0 is no longer supported and
3773 * scsi_add_host will fail. This will be adjusted later based on the
3774 * max xri value determined in hba setup.
47a8617c 3775 */
2e0fef85 3776 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3777 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS
3778 shost->transportt = lpfc_vport_transport_template;
3779 vport->port_type = LPFC_NPIV_PORT;
3780 } else {
3781 shost->transportt = lpfc_transport_template;
3782 vport->port_type = LPFC_PHYSICAL_PORT;
3783 }
47a8617c 3784
2e0fef85
JS
3785 /* Initialize all internally managed lists. */
3786 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3787 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3788 spin_lock_init(&vport->work_port_lock);
47a8617c 3789
33cc559a
TJ
3790 setup_timer(&vport->fc_disctmo, lpfc_disc_timeout,
3791 (unsigned long)vport);
47a8617c 3792
33cc559a
TJ
3793 setup_timer(&vport->els_tmofunc, lpfc_els_timeout,
3794 (unsigned long)vport);
92494144 3795
33cc559a
TJ
3796 setup_timer(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo,
3797 (unsigned long)vport);
92494144 3798
d139b9bd 3799 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS
3800 if (error)
3801 goto out_put_shost;
47a8617c 3802
549e55cd 3803 spin_lock_irq(&phba->hbalock);
2e0fef85 3804 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3805 spin_unlock_irq(&phba->hbalock);
2e0fef85 3806 return vport;
47a8617c 3807
2e0fef85
JS
3808out_put_shost:
3809 scsi_host_put(shost);
3810out:
3811 return NULL;
47a8617c
JS
3812}
3813
e59058c4 3814/**
3621a710 3815 * destroy_port - destroy an FC port
e59058c4
JS
3816 * @vport: pointer to an lpfc virtual N_Port data structure.
3817 *
3818 * This routine destroys a FC port from the upper layer protocol. All the
3819 * resources associated with the port are released.
3820 **/
2e0fef85
JS
3821void
3822destroy_port(struct lpfc_vport *vport)
47a8617c 3823{
92d7f7b0
JS
3824 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3825 struct lpfc_hba *phba = vport->phba;
47a8617c 3826
858c9f6c 3827 lpfc_debugfs_terminate(vport);
92d7f7b0
JS
3828 fc_remove_host(shost);
3829 scsi_remove_host(shost);
47a8617c 3830
92d7f7b0
JS
3831 spin_lock_irq(&phba->hbalock);
3832 list_del_init(&vport->listentry);
3833 spin_unlock_irq(&phba->hbalock);
47a8617c 3834
92d7f7b0 3835 lpfc_cleanup(vport);
47a8617c 3836 return;
47a8617c
JS
3837}
3838
e59058c4 3839/**
3621a710 3840 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS
3841 *
3842 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
3843 * uses the kernel idr facility to perform the task.
3844 *
3845 * Return codes:
3846 * instance - a unique integer ID allocated as the new instance.
3847 * -1 - lpfc get instance failed.
3848 **/
92d7f7b0
JS
3849int
3850lpfc_get_instance(void)
3851{
ab516036
TH
3852 int ret;
3853
3854 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
3855 return ret < 0 ? -1 : ret;
47a8617c
JS
3856}
3857
e59058c4 3858/**
3621a710 3859 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS
3860 * @shost: pointer to SCSI host data structure.
3861 * @time: elapsed time of the scan in jiffies.
3862 *
3863 * This routine is called by the SCSI layer with a SCSI host to determine
3864 * whether the scan host is finished.
3865 *
3866 * Note: there is no scan_start function as adapter initialization will have
3867 * asynchronously kicked off the link initialization.
3868 *
3869 * Return codes
3870 * 0 - SCSI host scan is not over yet.
3871 * 1 - SCSI host scan is over.
3872 **/
47a8617c
JS
3873int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
3874{
2e0fef85
JS
3875 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3876 struct lpfc_hba *phba = vport->phba;
858c9f6c 3877 int stat = 0;
47a8617c 3878
858c9f6c
JS
3879 spin_lock_irq(shost->host_lock);
3880
51ef4c26 3881 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS
3882 stat = 1;
3883 goto finished;
3884 }
256ec0d0 3885 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 3886 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
3887 "0461 Scanning longer than 30 "
3888 "seconds. Continuing initialization\n");
858c9f6c 3889 stat = 1;
47a8617c 3890 goto finished;
2e0fef85 3891 }
256ec0d0
JS
3892 if (time >= msecs_to_jiffies(15 * 1000) &&
3893 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 3894 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
3895 "0465 Link down longer than 15 "
3896 "seconds. Continuing initialization\n");
858c9f6c 3897 stat = 1;
47a8617c 3898 goto finished;
2e0fef85 3899 }
47a8617c 3900
2e0fef85 3901 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 3902 goto finished;
2e0fef85 3903 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 3904 goto finished;
256ec0d0 3905 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 3906 goto finished;
2e0fef85 3907 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS
3908 goto finished;
3909
3910 stat = 1;
47a8617c
JS
3911
3912finished:
858c9f6c
JS
3913 spin_unlock_irq(shost->host_lock);
3914 return stat;
92d7f7b0 3915}
47a8617c 3916
e59058c4 3917/**
3621a710 3918 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS
3919 * @shost: pointer to SCSI host data structure.
3920 *
3921 * This routine initializes a given SCSI host attributes on a FC port. The
3922 * SCSI host can be either on top of a physical port or a virtual port.
3923 **/
92d7f7b0
JS
3924void lpfc_host_attrib_init(struct Scsi_Host *shost)
3925{
3926 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3927 struct lpfc_hba *phba = vport->phba;
47a8617c 3928 /*
2e0fef85 3929 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS
3930 */
3931
2e0fef85
JS
3932 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
3933 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS
3934 fc_host_supported_classes(shost) = FC_COS_CLASS3;
3935
3936 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 3937 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS
3938 fc_host_supported_fc4s(shost)[2] = 1;
3939 fc_host_supported_fc4s(shost)[7] = 1;
3940
92d7f7b0
JS
3941 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
3942 sizeof fc_host_symbolic_name(shost));
47a8617c
JS
3943
3944 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS
3945 if (phba->lmt & LMT_32Gb)
3946 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS
3947 if (phba->lmt & LMT_16Gb)
3948 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS
3949 if (phba->lmt & LMT_10Gb)
3950 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS
3951 if (phba->lmt & LMT_8Gb)
3952 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS
3953 if (phba->lmt & LMT_4Gb)
3954 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
3955 if (phba->lmt & LMT_2Gb)
3956 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
3957 if (phba->lmt & LMT_1Gb)
3958 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
3959
3960 fc_host_maxframe_size(shost) =
2e0fef85
JS
3961 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
3962 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 3963
0af5d708
MC
3964 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
3965
47a8617c
JS
3966 /* This value is also unchanging */
3967 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 3968 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS
3969 fc_host_active_fc4s(shost)[2] = 1;
3970 fc_host_active_fc4s(shost)[7] = 1;
3971
92d7f7b0 3972 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 3973 spin_lock_irq(shost->host_lock);
51ef4c26 3974 vport->load_flag &= ~FC_LOADING;
47a8617c 3975 spin_unlock_irq(shost->host_lock);
47a8617c 3976}
dea3101e 3977
e59058c4 3978/**
da0436e9 3979 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS
3980 * @phba: pointer to lpfc hba data structure.
3981 *
da0436e9
JS
3982 * This routine is invoked to stop an SLI3 device port, it stops the device
3983 * from generating interrupts and stops the device driver's timers for the
3984 * device.
e59058c4 3985 **/
da0436e9
JS
3986static void
3987lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 3988{
da0436e9
JS
3989 /* Clear all interrupt enable conditions */
3990 writel(0, phba->HCregaddr);
3991 readl(phba->HCregaddr); /* flush */
3992 /* Clear all pending interrupts */
3993 writel(0xffffffff, phba->HAregaddr);
3994 readl(phba->HAregaddr); /* flush */
db2378e0 3995
da0436e9
JS
3996 /* Reset some HBA SLI setup states */
3997 lpfc_stop_hba_timers(phba);
3998 phba->pport->work_port_events = 0;
3999}
db2378e0 4000
da0436e9
JS
4001/**
4002 * lpfc_stop_port_s4 - Stop SLI4 device port
4003 * @phba: pointer to lpfc hba data structure.
4004 *
4005 * This routine is invoked to stop an SLI4 device port, it stops the device
4006 * from generating interrupts and stops the device driver's timers for the
4007 * device.
4008 **/
4009static void
4010lpfc_stop_port_s4(struct lpfc_hba *phba)
4011{
4012 /* Reset some HBA SLI4 setup states */
4013 lpfc_stop_hba_timers(phba);
4014 phba->pport->work_port_events = 0;
4015 phba->sli4_hba.intr_enable = 0;
da0436e9 4016}
9399627f 4017
da0436e9
JS
4018/**
4019 * lpfc_stop_port - Wrapper function for stopping hba port
4020 * @phba: Pointer to HBA context object.
4021 *
4022 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4023 * the API jump table function pointer from the lpfc_hba struct.
4024 **/
4025void
4026lpfc_stop_port(struct lpfc_hba *phba)
4027{
4028 phba->lpfc_stop_port(phba);
4029}
db2378e0 4030
ecfd03c6
JS
4031/**
4032 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4033 * @phba: Pointer to hba for which this call is being executed.
4034 *
4035 * This routine starts the timer waiting for the FCF rediscovery to complete.
4036 **/
4037void
4038lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4039{
4040 unsigned long fcf_redisc_wait_tmo =
4041 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4042 /* Start fcf rediscovery wait period timer */
4043 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4044 spin_lock_irq(&phba->hbalock);
4045 /* Allow action to new fcf asynchronous event */
4046 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4047 /* Mark the FCF rediscovery pending state */
4048 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4049 spin_unlock_irq(&phba->hbalock);
4050}
4051
4052/**
4053 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4054 * @ptr: Map to lpfc_hba data structure pointer.
4055 *
4056 * This routine is invoked when waiting for FCF table rediscover has been
4057 * timed out. If new FCF record(s) has (have) been discovered during the
4058 * wait period, a new FCF event shall be added to the FCOE async event
4059 * list, and then worker thread shall be waked up for processing from the
4060 * worker thread context.
4061 **/
e399b228 4062static void
ecfd03c6
JS
4063lpfc_sli4_fcf_redisc_wait_tmo(unsigned long ptr)
4064{
4065 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
4066
4067 /* Don't send FCF rediscovery event if timer cancelled */
4068 spin_lock_irq(&phba->hbalock);
4069 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4070 spin_unlock_irq(&phba->hbalock);
4071 return;
4072 }
4073 /* Clear FCF rediscovery timer pending flag */
4074 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4075 /* FCF rediscovery event to worker thread */
4076 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4077 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4078 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4079 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS
4080 /* wake up worker thread */
4081 lpfc_worker_wake_up(phba);
4082}
4083
e59058c4 4084/**
da0436e9 4085 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4086 * @phba: pointer to lpfc hba data structure.
da0436e9 4087 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4088 *
da0436e9
JS
4089 * This routine is to parse the SLI4 link-attention link fault code and
4090 * translate it into the base driver's read link attention mailbox command
4091 * status.
4092 *
4093 * Return: Link-attention status in terms of base driver's coding.
e59058c4 4094 **/
da0436e9
JS
4095static uint16_t
4096lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4097 struct lpfc_acqe_link *acqe_link)
db2378e0 4098{
da0436e9 4099 uint16_t latt_fault;
9399627f 4100
da0436e9
JS
4101 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4102 case LPFC_ASYNC_LINK_FAULT_NONE:
4103 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4104 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4105 latt_fault = 0;
4106 break;
4107 default:
4108 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4109 "0398 Invalid link fault code: x%x\n",
4110 bf_get(lpfc_acqe_link_fault, acqe_link));
4111 latt_fault = MBXERR_ERROR;
4112 break;
4113 }
4114 return latt_fault;
db2378e0
JS
4115}
4116
5b75da2f 4117/**
da0436e9 4118 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4119 * @phba: pointer to lpfc hba data structure.
da0436e9 4120 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4121 *
da0436e9
JS
4122 * This routine is to parse the SLI4 link attention type and translate it
4123 * into the base driver's link attention type coding.
5b75da2f 4124 *
da0436e9
JS
4125 * Return: Link attention type in terms of base driver's coding.
4126 **/
4127static uint8_t
4128lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4129 struct lpfc_acqe_link *acqe_link)
5b75da2f 4130{
da0436e9 4131 uint8_t att_type;
5b75da2f 4132
da0436e9
JS
4133 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4134 case LPFC_ASYNC_LINK_STATUS_DOWN:
4135 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4136 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS
4137 break;
4138 case LPFC_ASYNC_LINK_STATUS_UP:
4139 /* Ignore physical link up events - wait for logical link up */
76a95d75 4140 att_type = LPFC_ATT_RESERVED;
da0436e9
JS
4141 break;
4142 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4143 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS
4144 break;
4145 default:
4146 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4147 "0399 Invalid link attention type: x%x\n",
4148 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4149 att_type = LPFC_ATT_RESERVED;
da0436e9 4150 break;
5b75da2f 4151 }
da0436e9 4152 return att_type;
5b75da2f
JS
4153}
4154
8b68cd52
JS
4155/**
4156 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4157 * @phba: pointer to lpfc hba data structure.
4158 *
4159 * This routine is to get an SLI3 FC port's link speed in Mbps.
4160 *
4161 * Return: link speed in terms of Mbps.
4162 **/
4163uint32_t
4164lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4165{
4166 uint32_t link_speed;
4167
4168 if (!lpfc_is_link_up(phba))
4169 return 0;
4170
a085e87c
JS
4171 if (phba->sli_rev <= LPFC_SLI_REV3) {
4172 switch (phba->fc_linkspeed) {
4173 case LPFC_LINK_SPEED_1GHZ:
4174 link_speed = 1000;
4175 break;
4176 case LPFC_LINK_SPEED_2GHZ:
4177 link_speed = 2000;
4178 break;
4179 case LPFC_LINK_SPEED_4GHZ:
4180 link_speed = 4000;
4181 break;
4182 case LPFC_LINK_SPEED_8GHZ:
4183 link_speed = 8000;
4184 break;
4185 case LPFC_LINK_SPEED_10GHZ:
4186 link_speed = 10000;
4187 break;
4188 case LPFC_LINK_SPEED_16GHZ:
4189 link_speed = 16000;
4190 break;
4191 default:
4192 link_speed = 0;
4193 }
4194 } else {
4195 if (phba->sli4_hba.link_state.logical_speed)
4196 link_speed =
4197 phba->sli4_hba.link_state.logical_speed;
4198 else
4199 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS
4200 }
4201 return link_speed;
4202}
4203
4204/**
4205 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4206 * @phba: pointer to lpfc hba data structure.
4207 * @evt_code: asynchronous event code.
4208 * @speed_code: asynchronous event link speed code.
4209 *
4210 * This routine is to parse the giving SLI4 async event link speed code into
4211 * value of Mbps for the link speed.
4212 *
4213 * Return: link speed in terms of Mbps.
4214 **/
4215static uint32_t
4216lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4217 uint8_t speed_code)
4218{
4219 uint32_t port_speed;
4220
4221 switch (evt_code) {
4222 case LPFC_TRAILER_CODE_LINK:
4223 switch (speed_code) {
26d830ec 4224 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS
4225 port_speed = 0;
4226 break;
26d830ec 4227 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS
4228 port_speed = 10;
4229 break;
26d830ec 4230 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS
4231 port_speed = 100;
4232 break;
26d830ec 4233 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS
4234 port_speed = 1000;
4235 break;
26d830ec 4236 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS
4237 port_speed = 10000;
4238 break;
26d830ec
JS
4239 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4240 port_speed = 20000;
4241 break;
4242 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4243 port_speed = 25000;
4244 break;
4245 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4246 port_speed = 40000;
4247 break;
8b68cd52
JS
4248 default:
4249 port_speed = 0;
4250 }
4251 break;
4252 case LPFC_TRAILER_CODE_FC:
4253 switch (speed_code) {
26d830ec 4254 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS
4255 port_speed = 0;
4256 break;
26d830ec 4257 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS
4258 port_speed = 1000;
4259 break;
26d830ec 4260 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS
4261 port_speed = 2000;
4262 break;
26d830ec 4263 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS
4264 port_speed = 4000;
4265 break;
26d830ec 4266 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS
4267 port_speed = 8000;
4268 break;
26d830ec 4269 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS
4270 port_speed = 10000;
4271 break;
26d830ec 4272 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS
4273 port_speed = 16000;
4274 break;
d38dd52c
JS
4275 case LPFC_FC_LA_SPEED_32G:
4276 port_speed = 32000;
4277 break;
8b68cd52
JS
4278 default:
4279 port_speed = 0;
4280 }
4281 break;
4282 default:
4283 port_speed = 0;
4284 }
4285 return port_speed;
4286}
4287
da0436e9 4288/**
70f3c073 4289 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS
4290 * @phba: pointer to lpfc hba data structure.
4291 * @acqe_link: pointer to the async link completion queue entry.
4292 *
70f3c073 4293 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS
4294 **/
4295static void
4296lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4297 struct lpfc_acqe_link *acqe_link)
4298{
4299 struct lpfc_dmabuf *mp;
4300 LPFC_MBOXQ_t *pmb;
4301 MAILBOX_t *mb;
76a95d75 4302 struct lpfc_mbx_read_top *la;
da0436e9 4303 uint8_t att_type;
76a95d75 4304 int rc;
da0436e9
JS
4305
4306 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4307 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4308 return;
32b9793f 4309 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS
4310 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4311 if (!pmb) {
4312 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4313 "0395 The mboxq allocation failed\n");
4314 return;
4315 }
4316 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4317 if (!mp) {
4318 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4319 "0396 The lpfc_dmabuf allocation failed\n");
4320 goto out_free_pmb;
4321 }
4322 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4323 if (!mp->virt) {
4324 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4325 "0397 The mbuf allocation failed\n");
4326 goto out_free_dmabuf;
4327 }
4328
4329 /* Cleanup any outstanding ELS commands */
4330 lpfc_els_flush_all_cmd(phba);
4331
4332 /* Block ELS IOCBs until we have done process link event */
895427bd 4333 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS
4334
4335 /* Update link event statistics */
4336 phba->sli.slistat.link_event++;
4337
76a95d75
JS
4338 /* Create lpfc_handle_latt mailbox command from link ACQE */
4339 lpfc_read_topology(phba, pmb, mp);
4340 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS
4341 pmb->vport = phba->pport;
4342
da0436e9
JS
4343 /* Keep the link status for extra SLI4 state machine reference */
4344 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4345 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4346 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS
4347 phba->sli4_hba.link_state.duplex =
4348 bf_get(lpfc_acqe_link_duplex, acqe_link);
4349 phba->sli4_hba.link_state.status =
4350 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS
4351 phba->sli4_hba.link_state.type =
4352 bf_get(lpfc_acqe_link_type, acqe_link);
4353 phba->sli4_hba.link_state.number =
4354 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS
4355 phba->sli4_hba.link_state.fault =
4356 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4357 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS
4358 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4359
70f3c073 4360 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS
4361 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4362 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4363 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS
4364 phba->sli4_hba.link_state.speed,
4365 phba->sli4_hba.link_state.topology,
4366 phba->sli4_hba.link_state.status,
4367 phba->sli4_hba.link_state.type,
4368 phba->sli4_hba.link_state.number,
8b68cd52 4369 phba->sli4_hba.link_state.logical_speed,
70f3c073 4370 phba->sli4_hba.link_state.fault);
76a95d75
JS
4371 /*
4372 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4373 * topology info. Note: Optional for non FC-AL ports.
4374 */
4375 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4376 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4377 if (rc == MBX_NOT_FINISHED)
4378 goto out_free_dmabuf;
4379 return;
4380 }
4381 /*
4382 * For FCoE Mode: fill in all the topology information we need and call
4383 * the READ_TOPOLOGY completion routine to continue without actually
4384 * sending the READ_TOPOLOGY mailbox command to the port.
4385 */
4386 /* Parse and translate status field */
4387 mb = &pmb->u.mb;
4388 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4389
4390 /* Parse and translate link attention fields */
4391 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4392 la->eventTag = acqe_link->event_tag;
4393 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4394 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4395 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS
4396
4397 /* Fake the the following irrelvant fields */
4398 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4399 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4400 bf_set(lpfc_mbx_read_top_il, la, 0);
4401 bf_set(lpfc_mbx_read_top_pb, la, 0);
4402 bf_set(lpfc_mbx_read_top_fa, la, 0);
4403 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS
4404
4405 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4406 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4407
5b75da2f 4408 return;
da0436e9
JS
4409
4410out_free_dmabuf:
4411 kfree(mp);
4412out_free_pmb:
4413 mempool_free(pmb, phba->mbox_mem_pool);
4414}
4415
70f3c073
JS
4416/**
4417 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4418 * @phba: pointer to lpfc hba data structure.
4419 * @acqe_fc: pointer to the async fc completion queue entry.
4420 *
4421 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4422 * that the event was received and then issue a read_topology mailbox command so
4423 * that the rest of the driver will treat it the same as SLI3.
4424 **/
4425static void
4426lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4427{
4428 struct lpfc_dmabuf *mp;
4429 LPFC_MBOXQ_t *pmb;
7bdedb34
JS
4430 MAILBOX_t *mb;
4431 struct lpfc_mbx_read_top *la;
70f3c073
JS
4432 int rc;
4433
4434 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4435 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4436 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4437 "2895 Non FC link Event detected.(%d)\n",
4438 bf_get(lpfc_trailer_type, acqe_fc));
4439 return;
4440 }
4441 /* Keep the link status for extra SLI4 state machine reference */
4442 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4443 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4444 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS
4445 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4446 phba->sli4_hba.link_state.topology =
4447 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4448 phba->sli4_hba.link_state.status =
4449 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4450 phba->sli4_hba.link_state.type =
4451 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4452 phba->sli4_hba.link_state.number =
4453 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4454 phba->sli4_hba.link_state.fault =
4455 bf_get(lpfc_acqe_link_fault, acqe_fc);
4456 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4457 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS
4458 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4459 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4460 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4461 "%dMbps Fault:%d\n",
4462 phba->sli4_hba.link_state.speed,
4463 phba->sli4_hba.link_state.topology,
4464 phba->sli4_hba.link_state.status,
4465 phba->sli4_hba.link_state.type,
4466 phba->sli4_hba.link_state.number,
8b68cd52 4467 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS
4468 phba->sli4_hba.link_state.fault);
4469 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4470 if (!pmb) {
4471 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4472 "2897 The mboxq allocation failed\n");
4473 return;
4474 }
4475 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4476 if (!mp) {
4477 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4478 "2898 The lpfc_dmabuf allocation failed\n");
4479 goto out_free_pmb;
4480 }
4481 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4482 if (!mp->virt) {
4483 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4484 "2899 The mbuf allocation failed\n");
4485 goto out_free_dmabuf;
4486 }
4487
4488 /* Cleanup any outstanding ELS commands */
4489 lpfc_els_flush_all_cmd(phba);
4490
4491 /* Block ELS IOCBs until we have done process link event */
895427bd 4492 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS
4493
4494 /* Update link event statistics */
4495 phba->sli.slistat.link_event++;
4496
4497 /* Create lpfc_handle_latt mailbox command from link ACQE */
4498 lpfc_read_topology(phba, pmb, mp);
4499 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4500 pmb->vport = phba->pport;
4501
7bdedb34
JS
4502 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
4503 /* Parse and translate status field */
4504 mb = &pmb->u.mb;
4505 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4506 (void *)acqe_fc);
4507
4508 /* Parse and translate link attention fields */
4509 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4510 la->eventTag = acqe_fc->event_tag;
4511 bf_set(lpfc_mbx_read_top_att_type, la,
4512 LPFC_FC_LA_TYPE_LINK_DOWN);
4513
4514 /* Invoke the mailbox command callback function */
4515 lpfc_mbx_cmpl_read_topology(phba, pmb);
4516
4517 return;
4518 }
4519
70f3c073
JS
4520 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4521 if (rc == MBX_NOT_FINISHED)
4522 goto out_free_dmabuf;
4523 return;
4524
4525out_free_dmabuf:
4526 kfree(mp);
4527out_free_pmb:
4528 mempool_free(pmb, phba->mbox_mem_pool);
4529}
4530
4531/**
4532 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4533 * @phba: pointer to lpfc hba data structure.
4534 * @acqe_fc: pointer to the async SLI completion queue entry.
4535 *
4536 * This routine is to handle the SLI4 asynchronous SLI events.
4537 **/
4538static void
4539lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4540{
4b8bae08 4541 char port_name;
8c1312e1 4542 char message[128];
4b8bae08 4543 uint8_t status;
946727dc 4544 uint8_t evt_type;
448193b5 4545 uint8_t operational = 0;
946727dc 4546 struct temp_event temp_event_data;
4b8bae08 4547 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS
4548 struct Scsi_Host *shost;
4549
4550 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4551
448193b5
JS
4552 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4553 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4554 "x%08x SLI Event Type:%d\n",
4555 acqe_sli->event_data1, acqe_sli->event_data2,
4556 evt_type);
4b8bae08
JS
4557
4558 port_name = phba->Port[0];
4559 if (port_name == 0x00)
4560 port_name = '?'; /* get port name is empty */
4561
946727dc
JS
4562 switch (evt_type) {
4563 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4564 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4565 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4566 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4567
4568 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4569 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4570 acqe_sli->event_data1, port_name);
4571
310429ef 4572 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
4573 shost = lpfc_shost_from_vport(phba->pport);
4574 fc_host_post_vendor_event(shost, fc_get_event_number(),
4575 sizeof(temp_event_data),
4576 (char *)&temp_event_data,
4577 SCSI_NL_VID_TYPE_PCI
4578 | PCI_VENDOR_ID_EMULEX);
4579 break;
4580 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4581 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4582 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4583 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4584
4585 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4586 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4587 acqe_sli->event_data1, port_name);
4588
4589 shost = lpfc_shost_from_vport(phba->pport);
4590 fc_host_post_vendor_event(shost, fc_get_event_number(),
4591 sizeof(temp_event_data),
4592 (char *)&temp_event_data,
4593 SCSI_NL_VID_TYPE_PCI
4594 | PCI_VENDOR_ID_EMULEX);
4595 break;
4596 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4597 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS
4598 &acqe_sli->event_data1;
4599
946727dc
JS
4600 /* fetch the status for this port */
4601 switch (phba->sli4_hba.lnk_info.lnk_no) {
4602 case LPFC_LINK_NUMBER_0:
448193b5
JS
4603 status = bf_get(lpfc_sli_misconfigured_port0_state,
4604 &misconfigured->theEvent);
4605 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4606 &misconfigured->theEvent);
946727dc
JS
4607 break;
4608 case LPFC_LINK_NUMBER_1:
448193b5
JS
4609 status = bf_get(lpfc_sli_misconfigured_port1_state,
4610 &misconfigured->theEvent);
4611 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4612 &misconfigured->theEvent);
946727dc
JS
4613 break;
4614 case LPFC_LINK_NUMBER_2:
448193b5
JS
4615 status = bf_get(lpfc_sli_misconfigured_port2_state,
4616 &misconfigured->theEvent);
4617 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4618 &misconfigured->theEvent);
946727dc
JS
4619 break;
4620 case LPFC_LINK_NUMBER_3:
448193b5
JS
4621 status = bf_get(lpfc_sli_misconfigured_port3_state,
4622 &misconfigured->theEvent);
4623 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4624 &misconfigured->theEvent);
946727dc
JS
4625 break;
4626 default:
448193b5
JS
4627 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4628 "3296 "
4629 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4630 "event: Invalid link %d",
4631 phba->sli4_hba.lnk_info.lnk_no);
4632 return;
946727dc 4633 }
4b8bae08 4634
448193b5
JS
4635 /* Skip if optic state unchanged */
4636 if (phba->sli4_hba.lnk_info.optic_state == status)
4637 return;
4638
946727dc
JS
4639 switch (status) {
4640 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS
4641 sprintf(message, "Physical Link is functional");
4642 break;
946727dc
JS
4643 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4644 sprintf(message, "Optics faulted/incorrectly "
4645 "installed/not installed - Reseat optics, "
4646 "if issue not resolved, replace.");
4647 break;
4648 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4649 sprintf(message,
4650 "Optics of two types installed - Remove one "
4651 "optic or install matching pair of optics.");
4652 break;
4653 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4654 sprintf(message, "Incompatible optics - Replace with "
292098be 4655 "compatible optics for card to function.");
946727dc 4656 break;
448193b5
JS
4657 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4658 sprintf(message, "Unqualified optics - Replace with "
4659 "Avago optics for Warranty and Technical "
4660 "Support - Link is%s operational",
2ea259ee 4661 (operational) ? " not" : "");
448193b5
JS
4662 break;
4663 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4664 sprintf(message, "Uncertified optics - Replace with "
4665 "Avago-certified optics to enable link "
4666 "operation - Link is%s operational",
2ea259ee 4667 (operational) ? " not" : "");
448193b5 4668 break;
946727dc
JS
4669 default:
4670 /* firmware is reporting a status we don't know about */
4671 sprintf(message, "Unknown event status x%02x", status);
4672 break;
4673 }
448193b5 4674 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4675 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4676 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS
4677 break;
4678 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4679 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4680 "3192 Remote DPort Test Initiated - "
4681 "Event Data1:x%08x Event Data2: x%08x\n",
4682 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS
4683 break;
4684 default:
946727dc
JS
4685 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4686 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4687 "x%08x SLI Event Type:%d\n",
4688 acqe_sli->event_data1, acqe_sli->event_data2,
4689 evt_type);
4b8bae08
JS
4690 break;
4691 }
70f3c073
JS
4692}
4693
fc2b989b
JS
4694/**
4695 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4696 * @vport: pointer to vport data structure.
4697 *
4698 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4699 * response to a CVL event.
4700 *
4701 * Return the pointer to the ndlp with the vport if successful, otherwise
4702 * return NULL.
4703 **/
4704static struct lpfc_nodelist *
4705lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4706{
4707 struct lpfc_nodelist *ndlp;
4708 struct Scsi_Host *shost;
4709 struct lpfc_hba *phba;
4710
4711 if (!vport)
4712 return NULL;
fc2b989b
JS
4713 phba = vport->phba;
4714 if (!phba)
4715 return NULL;
78730cfe
JS
4716 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4717 if (!ndlp) {
4718 /* Cannot find existing Fabric ndlp, so allocate a new one */
4719 ndlp = mempool_alloc(phba->nlp_mem_pool, GFP_KERNEL);
4720 if (!ndlp)
4721 return 0;
4722 lpfc_nlp_init(vport, ndlp, Fabric_DID);
4723 /* Set the node type */
4724 ndlp->nlp_type |= NLP_FABRIC;
4725 /* Put ndlp onto node list */
4726 lpfc_enqueue_node(vport, ndlp);
4727 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4728 /* re-setup ndlp without removing from node list */
4729 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4730 if (!ndlp)
4731 return 0;
4732 }
63e801ce
JS
4733 if ((phba->pport->port_state < LPFC_FLOGI) &&
4734 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4735 return NULL;
4736 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS
4737 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4738 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4739 return NULL;
4740 shost = lpfc_shost_from_vport(vport);
4741 if (!shost)
4742 return NULL;
4743 lpfc_linkdown_port(vport);
4744 lpfc_cleanup_pending_mbox(vport);
4745 spin_lock_irq(shost->host_lock);
4746 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4747 spin_unlock_irq(shost->host_lock);
4748
4749 return ndlp;
4750}
4751
4752/**
4753 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4754 * @vport: pointer to lpfc hba data structure.
4755 *
4756 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4757 * response to a FCF dead event.
4758 **/
4759static void
4760lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4761{
4762 struct lpfc_vport **vports;
4763 int i;
4764
4765 vports = lpfc_create_vport_work_array(phba);
4766 if (vports)
4767 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4768 lpfc_sli4_perform_vport_cvl(vports[i]);
4769 lpfc_destroy_vport_work_array(phba, vports);
4770}
4771
da0436e9 4772/**
76a95d75 4773 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS
4774 * @phba: pointer to lpfc hba data structure.
4775 * @acqe_link: pointer to the async fcoe completion queue entry.
4776 *
4777 * This routine is to handle the SLI4 asynchronous fcoe event.
4778 **/
4779static void
76a95d75 4780lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4781 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4782{
70f3c073 4783 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4784 int rc;
6669f9bb
JS
4785 struct lpfc_vport *vport;
4786 struct lpfc_nodelist *ndlp;
4787 struct Scsi_Host *shost;
695a814e
JS
4788 int active_vlink_present;
4789 struct lpfc_vport **vports;
4790 int i;
da0436e9 4791
70f3c073
JS
4792 phba->fc_eventTag = acqe_fip->event_tag;
4793 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4794 switch (event_type) {
70f3c073
JS
4795 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4796 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4797 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS
4798 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4799 LOG_DISCOVERY,
a93ff37a
JS
4800 "2546 New FCF event, evt_tag:x%x, "
4801 "index:x%x\n",
70f3c073
JS
4802 acqe_fip->event_tag,
4803 acqe_fip->index);
999d813f
JS
4804 else
4805 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4806 LOG_DISCOVERY,
a93ff37a
JS
4807 "2788 FCF param modified event, "
4808 "evt_tag:x%x, index:x%x\n",
70f3c073
JS
4809 acqe_fip->event_tag,
4810 acqe_fip->index);
38b92ef8 4811 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS
4812 /*
4813 * During period of FCF discovery, read the FCF
4814 * table record indexed by the event to update
a93ff37a 4815 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS
4816 */
4817 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4818 LOG_DISCOVERY,
a93ff37a
JS
4819 "2779 Read FCF (x%x) for updating "
4820 "roundrobin FCF failover bmask\n",
70f3c073
JS
4821 acqe_fip->index);
4822 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 4823 }
38b92ef8
JS
4824
4825 /* If the FCF discovery is in progress, do nothing. */
3804dc84 4826 spin_lock_irq(&phba->hbalock);
a93ff37a 4827 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS
4828 spin_unlock_irq(&phba->hbalock);
4829 break;
4830 }
4831 /* If fast FCF failover rescan event is pending, do nothing */
4832 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
4833 spin_unlock_irq(&phba->hbalock);
4834 break;
4835 }
4836
c2b9712e
JS
4837 /* If the FCF has been in discovered state, do nothing. */
4838 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS
4839 spin_unlock_irq(&phba->hbalock);
4840 break;
4841 }
4842 spin_unlock_irq(&phba->hbalock);
38b92ef8 4843
0c9ab6f5
JS
4844 /* Otherwise, scan the entire FCF table and re-discover SAN */
4845 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS
4846 "2770 Start FCF table scan per async FCF "
4847 "event, evt_tag:x%x, index:x%x\n",
70f3c073 4848 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS
4849 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
4850 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 4851 if (rc)
0c9ab6f5
JS
4852 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
4853 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 4854 "command failed (x%x)\n", rc);
da0436e9
JS
4855 break;
4856
70f3c073 4857 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 4858 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 4859 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS
4860 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
4861 acqe_fip->event_tag);
da0436e9
JS
4862 break;
4863
70f3c073 4864 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 4865 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 4866 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 4867 "2549 FCF (x%x) disconnected from network, "
70f3c073 4868 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS
4869 /*
4870 * If we are in the middle of FCF failover process, clear
4871 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 4872 */
fc2b989b 4873 spin_lock_irq(&phba->hbalock);
a1cadfef
JS
4874 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
4875 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 4876 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4877 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 4878 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS
4879 break;
4880 }
38b92ef8
JS
4881 spin_unlock_irq(&phba->hbalock);
4882
4883 /* If the event is not for currently used fcf do nothing */
70f3c073 4884 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS
4885 break;
4886
4887 /*
4888 * Otherwise, request the port to rediscover the entire FCF
4889 * table for a fast recovery from case that the current FCF
4890 * is no longer valid as we are not in the middle of FCF
4891 * failover process already.
4892 */
c2b9712e
JS
4893 spin_lock_irq(&phba->hbalock);
4894 /* Mark the fast failover process in progress */
4895 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
4896 spin_unlock_irq(&phba->hbalock);
4897
4898 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
4899 "2771 Start FCF fast failover process due to "
4900 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
4901 "\n", acqe_fip->event_tag, acqe_fip->index);
4902 rc = lpfc_sli4_redisc_fcf_table(phba);
4903 if (rc) {
4904 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4905 LOG_DISCOVERY,
4906 "2772 Issue FCF rediscover mabilbox "
4907 "command failed, fail through to FCF "
4908 "dead event\n");
4909 spin_lock_irq(&phba->hbalock);
4910 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
4911 spin_unlock_irq(&phba->hbalock);
4912 /*
4913 * Last resort will fail over by treating this
4914 * as a link down to FCF registration.
4915 */
4916 lpfc_sli4_fcf_dead_failthrough(phba);
4917 } else {
4918 /* Reset FCF roundrobin bmask for new discovery */
4919 lpfc_sli4_clear_fcf_rr_bmask(phba);
4920 /*
4921 * Handling fast FCF failover to a DEAD FCF event is
4922 * considered equalivant to receiving CVL to all vports.
4923 */
4924 lpfc_sli4_perform_all_vport_cvl(phba);
4925 }
da0436e9 4926 break;
70f3c073 4927 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 4928 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 4929 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 4930 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 4931 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 4932
6669f9bb 4933 vport = lpfc_find_vport_by_vpid(phba,
5248a749 4934 acqe_fip->index);
fc2b989b 4935 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS
4936 if (!ndlp)
4937 break;
695a814e
JS
4938 active_vlink_present = 0;
4939
4940 vports = lpfc_create_vport_work_array(phba);
4941 if (vports) {
4942 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
4943 i++) {
4944 if ((!(vports[i]->fc_flag &
4945 FC_VPORT_CVL_RCVD)) &&
4946 (vports[i]->port_state > LPFC_FDISC)) {
4947 active_vlink_present = 1;
4948 break;
4949 }
4950 }
4951 lpfc_destroy_vport_work_array(phba, vports);
4952 }
4953
cc82355a
JS
4954 /*
4955 * Don't re-instantiate if vport is marked for deletion.
4956 * If we are here first then vport_delete is going to wait
4957 * for discovery to complete.
4958 */
4959 if (!(vport->load_flag & FC_UNLOADING) &&
4960 active_vlink_present) {
695a814e
JS
4961 /*
4962 * If there are other active VLinks present,
4963 * re-instantiate the Vlink using FDISC.
4964 */
256ec0d0
JS
4965 mod_timer(&ndlp->nlp_delayfunc,
4966 jiffies + msecs_to_jiffies(1000));
fc2b989b 4967 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS
4968 spin_lock_irq(shost->host_lock);
4969 ndlp->nlp_flag |= NLP_DELAY_TMO;
4970 spin_unlock_irq(shost->host_lock);
695a814e
JS
4971 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
4972 vport->port_state = LPFC_FDISC;
4973 } else {
ecfd03c6
JS
4974 /*
4975 * Otherwise, we request port to rediscover
4976 * the entire FCF table for a fast recovery
4977 * from possible case that the current FCF
0c9ab6f5
JS
4978 * is no longer valid if we are not already
4979 * in the FCF failover process.
ecfd03c6 4980 */
fc2b989b 4981 spin_lock_irq(&phba->hbalock);
0c9ab6f5 4982 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS
4983 spin_unlock_irq(&phba->hbalock);
4984 break;
4985 }
4986 /* Mark the fast failover process in progress */
0c9ab6f5 4987 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 4988 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS
4989 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4990 LOG_DISCOVERY,
a93ff37a 4991 "2773 Start FCF failover per CVL, "
70f3c073 4992 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 4993 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 4994 if (rc) {
0c9ab6f5
JS
4995 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4996 LOG_DISCOVERY,
4997 "2774 Issue FCF rediscover "
4998 "mabilbox command failed, "
4999 "through to CVL event\n");
fc2b989b 5000 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5001 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 5002 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS
5003 /*
5004 * Last resort will be re-try on the
5005 * the current registered FCF entry.
5006 */
5007 lpfc_retry_pport_discovery(phba);
38b92ef8
JS
5008 } else
5009 /*
5010 * Reset FCF roundrobin bmask for new
5011 * discovery.
5012 */
7d791df7 5013 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS
5014 }
5015 break;
da0436e9
JS
5016 default:
5017 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5018 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 5019 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS
5020 break;
5021 }
5022}
5023
5024/**
5025 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5026 * @phba: pointer to lpfc hba data structure.
5027 * @acqe_link: pointer to the async dcbx completion queue entry.
5028 *
5029 * This routine is to handle the SLI4 asynchronous dcbx event.
5030 **/
5031static void
5032lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5033 struct lpfc_acqe_dcbx *acqe_dcbx)
5034{
4d9ab994 5035 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS
5036 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5037 "0290 The SLI4 DCBX asynchronous event is not "
5038 "handled yet\n");
5039}
5040
b19a061a
JS
5041/**
5042 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5043 * @phba: pointer to lpfc hba data structure.
5044 * @acqe_link: pointer to the async grp5 completion queue entry.
5045 *
5046 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5047 * is an asynchronous notified of a logical link speed change. The Port
5048 * reports the logical link speed in units of 10Mbps.
5049 **/
5050static void
5051lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5052 struct lpfc_acqe_grp5 *acqe_grp5)
5053{
5054 uint16_t prev_ll_spd;
5055
5056 phba->fc_eventTag = acqe_grp5->event_tag;
5057 phba->fcoe_eventtag = acqe_grp5->event_tag;
5058 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5059 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5060 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS
5061 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5062 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS
5063 "from %dMbps to %dMbps\n", prev_ll_spd,
5064 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS
5065}
5066
da0436e9
JS
5067/**
5068 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5069 * @phba: pointer to lpfc hba data structure.
5070 *
5071 * This routine is invoked by the worker thread to process all the pending
5072 * SLI4 asynchronous events.
5073 **/
5074void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5075{
5076 struct lpfc_cq_event *cq_event;
5077
5078 /* First, declare the async event has been handled */
5079 spin_lock_irq(&phba->hbalock);
5080 phba->hba_flag &= ~ASYNC_EVENT;
5081 spin_unlock_irq(&phba->hbalock);
5082 /* Now, handle all the async events */
5083 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5084 /* Get the first event from the head of the event queue */
5085 spin_lock_irq(&phba->hbalock);
5086 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5087 cq_event, struct lpfc_cq_event, list);
5088 spin_unlock_irq(&phba->hbalock);
5089 /* Process the asynchronous event */
5090 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5091 case LPFC_TRAILER_CODE_LINK:
5092 lpfc_sli4_async_link_evt(phba,
5093 &cq_event->cqe.acqe_link);
5094 break;
5095 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5096 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS
5097 break;
5098 case LPFC_TRAILER_CODE_DCBX:
5099 lpfc_sli4_async_dcbx_evt(phba,
5100 &cq_event->cqe.acqe_dcbx);
5101 break;
b19a061a
JS
5102 case LPFC_TRAILER_CODE_GRP5:
5103 lpfc_sli4_async_grp5_evt(phba,
5104 &cq_event->cqe.acqe_grp5);
5105 break;
70f3c073
JS
5106 case LPFC_TRAILER_CODE_FC:
5107 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5108 break;
5109 case LPFC_TRAILER_CODE_SLI:
5110 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5111 break;
da0436e9
JS
5112 default:
5113 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5114 "1804 Invalid asynchrous event code: "
5115 "x%x\n", bf_get(lpfc_trailer_code,
5116 &cq_event->cqe.mcqe_cmpl));
5117 break;
5118 }
5119 /* Free the completion event processed to the free pool */
5120 lpfc_sli4_cq_event_release(phba, cq_event);
5121 }
5122}
5123
ecfd03c6
JS
5124/**
5125 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5126 * @phba: pointer to lpfc hba data structure.
5127 *
5128 * This routine is invoked by the worker thread to process FCF table
5129 * rediscovery pending completion event.
5130 **/
5131void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5132{
5133 int rc;
5134
5135 spin_lock_irq(&phba->hbalock);
5136 /* Clear FCF rediscovery timeout event */
5137 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5138 /* Clear driver fast failover FCF record flag */
5139 phba->fcf.failover_rec.flag = 0;
5140 /* Set state for FCF fast failover */
5141 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5142 spin_unlock_irq(&phba->hbalock);
5143
5144 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5145 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5146 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5147 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5148 if (rc)
0c9ab6f5
JS
5149 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5150 "2747 Issue FCF scan read FCF mailbox "
5151 "command failed 0x%x\n", rc);
ecfd03c6
JS
5152}
5153
da0436e9
JS
5154/**
5155 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5156 * @phba: pointer to lpfc hba data structure.
5157 * @dev_grp: The HBA PCI-Device group number.
5158 *
5159 * This routine is invoked to set up the per HBA PCI-Device group function
5160 * API jump table entries.
5161 *
5162 * Return: 0 if success, otherwise -ENODEV
5163 **/
5164int
5165lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5166{
5167 int rc;
5168
5169 /* Set up lpfc PCI-device group */
5170 phba->pci_dev_grp = dev_grp;
5171
5172 /* The LPFC_PCI_DEV_OC uses SLI4 */
5173 if (dev_grp == LPFC_PCI_DEV_OC)
5174 phba->sli_rev = LPFC_SLI_REV4;
5175
5176 /* Set up device INIT API function jump table */
5177 rc = lpfc_init_api_table_setup(phba, dev_grp);
5178 if (rc)
5179 return -ENODEV;
5180 /* Set up SCSI API function jump table */
5181 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5182 if (rc)
5183 return -ENODEV;
5184 /* Set up SLI API function jump table */
5185 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5186 if (rc)
5187 return -ENODEV;
5188 /* Set up MBOX API function jump table */
5189 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5190 if (rc)
5191 return -ENODEV;
5192
5193 return 0;
5b75da2f
JS
5194}
5195
5196/**
3621a710 5197 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS
5198 * @phba: pointer to lpfc hba data structure.
5199 * @intr_mode: active interrupt mode adopted.
5200 *
5201 * This routine it invoked to log the currently used active interrupt mode
5202 * to the device.
3772a991
JS
5203 **/
5204static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS
5205{
5206 switch (intr_mode) {
5207 case 0:
5208 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5209 "0470 Enable INTx interrupt mode.\n");
5210 break;
5211 case 1:
5212 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5213 "0481 Enabled MSI interrupt mode.\n");
5214 break;
5215 case 2:
5216 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5217 "0480 Enabled MSI-X interrupt mode.\n");
5218 break;
5219 default:
5220 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5221 "0482 Illegal interrupt mode.\n");
5222 break;
5223 }
5224 return;
5225}
5226
5b75da2f 5227/**
3772a991 5228 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS
5229 * @phba: pointer to lpfc hba data structure.
5230 *
3772a991
JS
5231 * This routine is invoked to enable the PCI device that is common to all
5232 * PCI devices.
5b75da2f
JS
5233 *
5234 * Return codes
af901ca1 5235 * 0 - successful
3772a991 5236 * other values - error
5b75da2f 5237 **/
3772a991
JS
5238static int
5239lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5240{
3772a991 5241 struct pci_dev *pdev;
5b75da2f 5242
3772a991
JS
5243 /* Obtain PCI device reference */
5244 if (!phba->pcidev)
5245 goto out_error;
5246 else
5247 pdev = phba->pcidev;
3772a991
JS
5248 /* Enable PCI device */
5249 if (pci_enable_device_mem(pdev))
5250 goto out_error;
5251 /* Request PCI resource for the device */
e0c0483c 5252 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS
5253 goto out_disable_device;
5254 /* Set up device as PCI master and save state for EEH */
5255 pci_set_master(pdev);
5256 pci_try_set_mwi(pdev);
5257 pci_save_state(pdev);
5b75da2f 5258
0558056c 5259 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5260 if (pci_is_pcie(pdev))
0558056c
JS
5261 pdev->needs_freset = 1;
5262
3772a991 5263 return 0;
5b75da2f 5264
3772a991
JS
5265out_disable_device:
5266 pci_disable_device(pdev);
5267out_error:
079b5c91 5268 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5269 "1401 Failed to enable pci device\n");
3772a991 5270 return -ENODEV;
5b75da2f
JS
5271}
5272
5273/**
3772a991 5274 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS
5275 * @phba: pointer to lpfc hba data structure.
5276 *
3772a991
JS
5277 * This routine is invoked to disable the PCI device that is common to all
5278 * PCI devices.
5b75da2f
JS
5279 **/
5280static void
3772a991 5281lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5282{
3772a991 5283 struct pci_dev *pdev;
5b75da2f 5284
3772a991
JS
5285 /* Obtain PCI device reference */
5286 if (!phba->pcidev)
5287 return;
5288 else
5289 pdev = phba->pcidev;
3772a991 5290 /* Release PCI resource and disable PCI device */
e0c0483c 5291 pci_release_mem_regions(pdev);
3772a991 5292 pci_disable_device(pdev);
5b75da2f
JS
5293
5294 return;
5295}
5296
e59058c4 5297/**
3772a991
JS
5298 * lpfc_reset_hba - Reset a hba
5299 * @phba: pointer to lpfc hba data structure.
e59058c4 5300 *
3772a991
JS
5301 * This routine is invoked to reset a hba device. It brings the HBA
5302 * offline, performs a board restart, and then brings the board back
5303 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5304 * on outstanding mailbox commands.
e59058c4 5305 **/
3772a991
JS
5306void
5307lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5308{
3772a991
JS
5309 /* If resets are disabled then set error state and return. */
5310 if (!phba->cfg_enable_hba_reset) {
5311 phba->link_state = LPFC_HBA_ERROR;
5312 return;
5313 }
ee62021a
JS
5314 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5315 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5316 else
5317 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS
5318 lpfc_offline(phba);
5319 lpfc_sli_brdrestart(phba);
5320 lpfc_online(phba);
5321 lpfc_unblock_mgmt_io(phba);
5322}
dea3101e 5323
0a96e975
JS
5324/**
5325 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5326 * @phba: pointer to lpfc hba data structure.
5327 *
5328 * This function enables the PCI SR-IOV virtual functions to a physical
5329 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5330 * enable the number of virtual functions to the physical function. As
5331 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5332 * API call does not considered as an error condition for most of the device.
5333 **/
5334uint16_t
5335lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5336{
5337 struct pci_dev *pdev = phba->pcidev;
5338 uint16_t nr_virtfn;
5339 int pos;
5340
0a96e975
JS
5341 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5342 if (pos == 0)
5343 return 0;
5344
5345 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5346 return nr_virtfn;
5347}
5348
912e3acd
JS
5349/**
5350 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5351 * @phba: pointer to lpfc hba data structure.
5352 * @nr_vfn: number of virtual functions to be enabled.
5353 *
5354 * This function enables the PCI SR-IOV virtual functions to a physical
5355 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5356 * enable the number of virtual functions to the physical function. As
5357 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5358 * API call does not considered as an error condition for most of the device.
5359 **/
5360int
5361lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5362{
5363 struct pci_dev *pdev = phba->pcidev;
0a96e975 5364 uint16_t max_nr_vfn;
912e3acd
JS
5365 int rc;
5366
0a96e975
JS
5367 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5368 if (nr_vfn > max_nr_vfn) {
5369 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5370 "3057 Requested vfs (%d) greater than "
5371 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5372 return -EINVAL;
5373 }
5374
912e3acd
JS
5375 rc = pci_enable_sriov(pdev, nr_vfn);
5376 if (rc) {
5377 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5378 "2806 Failed to enable sriov on this device "
5379 "with vfn number nr_vf:%d, rc:%d\n",
5380 nr_vfn, rc);
5381 } else
5382 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5383 "2807 Successful enable sriov on this device "
5384 "with vfn number nr_vf:%d\n", nr_vfn);
5385 return rc;
5386}
5387
3772a991 5388/**
895427bd 5389 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS
5390 * @phba: pointer to lpfc hba data structure.
5391 *
895427bd
JS
5392 * This routine is invoked to set up the driver internal resources before the
5393 * device specific resource setup to support the HBA device it attached to.
3772a991
JS
5394 *
5395 * Return codes
895427bd
JS
5396 * 0 - successful
5397 * other values - error
3772a991
JS
5398 **/
5399static int
895427bd 5400lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5401{
895427bd 5402 struct lpfc_sli *psli = &phba->sli;
dea3101e 5403
2e0fef85 5404 /*
895427bd 5405 * Driver resources common to all SLI revisions
2e0fef85 5406 */
895427bd
JS
5407 atomic_set(&phba->fast_event_count, 0);
5408 spin_lock_init(&phba->hbalock);
dea3101e 5409
895427bd
JS
5410 /* Initialize ndlp management spinlock */
5411 spin_lock_init(&phba->ndlp_lock);
5412
5413 INIT_LIST_HEAD(&phba->port_list);
5414 INIT_LIST_HEAD(&phba->work_list);
5415 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5416
5417 /* Initialize the wait queue head for the kernel thread */
5418 init_waitqueue_head(&phba->work_waitq);
5419
5420 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 5421 "1403 Protocols supported %s %s %s\n",
895427bd
JS
5422 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5423 "SCSI" : " "),
5424 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS
5425 "NVME" : " "),
5426 (phba->nvmet_support ? "NVMET" : " "));
895427bd
JS
5427
5428 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5429 /* Initialize the scsi buffer list used by driver for scsi IO */
5430 spin_lock_init(&phba->scsi_buf_list_get_lock);
5431 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5432 spin_lock_init(&phba->scsi_buf_list_put_lock);
5433 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5434 }
5435
5436 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5437 (phba->nvmet_support == 0)) {
5438 /* Initialize the NVME buffer list used by driver for NVME IO */
5439 spin_lock_init(&phba->nvme_buf_list_get_lock);
5440 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
5441 spin_lock_init(&phba->nvme_buf_list_put_lock);
5442 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
5443 }
5444
5445 /* Initialize the fabric iocb list */
5446 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5447
5448 /* Initialize list to save ELS buffers */
5449 INIT_LIST_HEAD(&phba->elsbuf);
5450
5451 /* Initialize FCF connection rec list */
5452 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5453
5454 /* Initialize OAS configuration list */
5455 spin_lock_init(&phba->devicelock);
5456 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5457
3772a991 5458 /* MBOX heartbeat timer */
33cc559a 5459 setup_timer(&psli->mbox_tmo, lpfc_mbox_timeout, (unsigned long)phba);
3772a991 5460 /* Fabric block timer */
33cc559a
TJ
5461 setup_timer(&phba->fabric_block_timer, lpfc_fabric_block_timeout,
5462 (unsigned long)phba);
3772a991 5463 /* EA polling mode timer */
33cc559a
TJ
5464 setup_timer(&phba->eratt_poll, lpfc_poll_eratt,
5465 (unsigned long)phba);
895427bd 5466 /* Heartbeat timer */
33cc559a 5467 setup_timer(&phba->hb_tmofunc, lpfc_hb_timeout, (unsigned long)phba);
895427bd
JS
5468
5469 return 0;
5470}
5471
5472/**
5473 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5474 * @phba: pointer to lpfc hba data structure.
5475 *
5476 * This routine is invoked to set up the driver internal resources specific to
5477 * support the SLI-3 HBA device it attached to.
5478 *
5479 * Return codes
5480 * 0 - successful
5481 * other values - error
5482 **/
5483static int
5484lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5485{
5486 int rc;
5487
5488 /*
5489 * Initialize timers used by driver
5490 */
5491
5492 /* FCP polling mode timer */
33cc559a
TJ
5493 setup_timer(&phba->fcp_poll_timer, lpfc_poll_timeout,
5494 (unsigned long)phba);
dea3101e 5495
3772a991
JS
5496 /* Host attention work mask setup */
5497 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5498 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5499
3772a991
JS
5500 /* Get all the module params for configuring this host */
5501 lpfc_get_cfgparam(phba);
895427bd
JS
5502 /* Set up phase-1 common device driver resources */
5503
5504 rc = lpfc_setup_driver_resource_phase1(phba);
5505 if (rc)
5506 return -ENODEV;
5507
49198b37
JS
5508 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5509 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5510 /* check for menlo minimum sg count */
5511 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5512 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5513 }
5514
895427bd
JS
5515 if (!phba->sli.sli3_ring)
5516 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5517 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5518 if (!phba->sli.sli3_ring)
2a76a283
JS
5519 return -ENOMEM;
5520
dea3101e 5521 /*
96f7077f 5522 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5523 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5524 */
3772a991 5525
96f7077f
JS
5526 /* Initialize the host templates the configured values. */
5527 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e
JS
5528 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
5529 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5530
5531 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5532 if (phba->cfg_enable_bg) {
96f7077f
JS
5533 /*
5534 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5535 * the FCP rsp, and a BDE for each. Sice we have no control
5536 * over how many protection data segments the SCSI Layer
5537 * will hand us (ie: there could be one for every block
5538 * in the IO), we just allocate enough BDEs to accomidate
5539 * our max amount and we need to limit lpfc_sg_seg_cnt to
5540 * minimize the risk of running out.
5541 */
5542 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5543 sizeof(struct fcp_rsp) +
5544 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5545
5546 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5547 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5548
5549 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5550 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5551 } else {
5552 /*
5553 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5554 * the FCP rsp, a BDE for each, and a BDE for up to
5555 * cfg_sg_seg_cnt data segments.
5556 */
5557 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5558 sizeof(struct fcp_rsp) +
5559 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5560
5561 /* Total BDEs in BPL for scsi_sg_list */
5562 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5563 }
dea3101e 5564
96f7077f
JS
5565 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5566 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5567 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5568 phba->cfg_total_seg_cnt);
dea3101e 5569
3772a991
JS
5570 phba->max_vpi = LPFC_MAX_VPI;
5571 /* This will be set to correct value after config_port mbox */
5572 phba->max_vports = 0;
dea3101e 5573
3772a991
JS
5574 /*
5575 * Initialize the SLI Layer to run with lpfc HBAs.
5576 */
5577 lpfc_sli_setup(phba);
895427bd 5578 lpfc_sli_queue_init(phba);
ed957684 5579
3772a991
JS
5580 /* Allocate device driver memory */
5581 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5582 return -ENOMEM;
51ef4c26 5583
912e3acd
JS
5584 /*
5585 * Enable sr-iov virtual functions if supported and configured
5586 * through the module parameter.
5587 */
5588 if (phba->cfg_sriov_nr_virtfn > 0) {
5589 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5590 phba->cfg_sriov_nr_virtfn);
5591 if (rc) {
5592 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5593 "2808 Requested number of SR-IOV "
5594 "virtual functions (%d) is not "
5595 "supported\n",
5596 phba->cfg_sriov_nr_virtfn);
5597 phba->cfg_sriov_nr_virtfn = 0;
5598 }
5599 }
5600
3772a991
JS
5601 return 0;
5602}
ed957684 5603
3772a991
JS
5604/**
5605 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5606 * @phba: pointer to lpfc hba data structure.
5607 *
5608 * This routine is invoked to unset the driver internal resources set up
5609 * specific for supporting the SLI-3 HBA device it attached to.
5610 **/
5611static void
5612lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5613{
5614 /* Free device driver memory allocated */
5615 lpfc_mem_free_all(phba);
3163f725 5616
3772a991
JS
5617 return;
5618}
dea3101e 5619
3772a991 5620/**
da0436e9 5621 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS
5622 * @phba: pointer to lpfc hba data structure.
5623 *
da0436e9
JS
5624 * This routine is invoked to set up the driver internal resources specific to
5625 * support the SLI-4 HBA device it attached to.
3772a991
JS
5626 *
5627 * Return codes
af901ca1 5628 * 0 - successful
da0436e9 5629 * other values - error
3772a991
JS
5630 **/
5631static int
da0436e9 5632lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5633{
28baac74 5634 LPFC_MBOXQ_t *mboxq;
f358dd0c 5635 MAILBOX_t *mb;
895427bd 5636 int rc, i, max_buf_size;
28baac74
JS
5637 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5638 struct lpfc_mqe *mqe;
09294d46 5639 int longs;
1ba981fd 5640 int fof_vectors = 0;
f358dd0c 5641 uint64_t wwn;
da0436e9 5642
895427bd
JS
5643 phba->sli4_hba.num_online_cpu = num_online_cpus();
5644 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5645 phba->sli4_hba.curr_disp_cpu = 0;
5646
716d3bc5
JS
5647 /* Get all the module params for configuring this host */
5648 lpfc_get_cfgparam(phba);
5649
895427bd
JS
5650 /* Set up phase-1 common device driver resources */
5651 rc = lpfc_setup_driver_resource_phase1(phba);
5652 if (rc)
5653 return -ENODEV;
5654
da0436e9
JS
5655 /* Before proceed, wait for POST done and device ready */
5656 rc = lpfc_sli4_post_status_check(phba);
5657 if (rc)
5658 return -ENODEV;
5659
3772a991 5660 /*
da0436e9 5661 * Initialize timers used by driver
3772a991 5662 */
3772a991 5663
33cc559a 5664 setup_timer(&phba->rrq_tmr, lpfc_rrq_timeout, (unsigned long)phba);
3772a991 5665
ecfd03c6 5666 /* FCF rediscover timer */
33cc559a
TJ
5667 setup_timer(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo,
5668 (unsigned long)phba);
ecfd03c6 5669
7ad20aa9
JS
5670 /*
5671 * Control structure for handling external multi-buffer mailbox
5672 * command pass-through.
5673 */
5674 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5675 sizeof(struct lpfc_mbox_ext_buf_ctx));
5676 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5677
da0436e9 5678 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5679
da0436e9
JS
5680 /* This will be set to correct value after the read_config mbox */
5681 phba->max_vports = 0;
3772a991 5682
da0436e9
JS
5683 /* Program the default value of vlan_id and fc_map */
5684 phba->valid_vlan = 0;
5685 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5686 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5687 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5688
2a76a283
JS
5689 /*
5690 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS
5691 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5692 * The WQ create will allocate the ring.
2a76a283 5693 */
09294d46 5694
da0436e9 5695 /*
09294d46
JS
5696 * It doesn't matter what family our adapter is in, we are
5697 * limited to 2 Pages, 512 SGEs, for our SGL.
5698 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5699 */
5700 max_buf_size = (2 * SLI4_PAGE_SIZE);
5701 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - 2)
5702 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - 2;
09294d46 5703
da0436e9 5704 /*
895427bd
JS
5705 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5706 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5707 */
96f7077f
JS
5708 if (phba->cfg_enable_bg) {
5709 /*
895427bd
JS
5710 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5711 * the FCP rsp, and a SGE. Sice we have no control
5712 * over how many protection segments the SCSI Layer
96f7077f 5713 * will hand us (ie: there could be one for every block
895427bd
JS
5714 * in the IO), just allocate enough SGEs to accomidate
5715 * our max amount and we need to limit lpfc_sg_seg_cnt
5716 * to minimize the risk of running out.
96f7077f
JS
5717 */
5718 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5719 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS
5720
5721 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5722 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5723
5724 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS
5725 phba->cfg_sg_seg_cnt =
5726 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS
5727 } else {
5728 /*
895427bd 5729 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS
5730 * the FCP rsp, a SGE for each, and a SGE for up to
5731 * cfg_sg_seg_cnt data segments.
5732 */
5733 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd
JS
5734 sizeof(struct fcp_rsp) +
5735 ((phba->cfg_sg_seg_cnt + 2) *
5736 sizeof(struct sli4_sge));
96f7077f
JS
5737
5738 /* Total SGEs for scsi_sg_list */
5739 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
895427bd 5740
96f7077f 5741 /*
895427bd
JS
5742 * NOTE: if (phba->cfg_sg_seg_cnt + 2) <= 256 we only
5743 * need to post 1 page for the SGL.
96f7077f 5744 */
085c647c 5745 }
acd6859b 5746
96f7077f
JS
5747 /* Initialize the host templates with the updated values. */
5748 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5749 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e 5750 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5751
5752 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5753 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5754 else
5755 phba->cfg_sg_dma_buf_size =
5756 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5757
5758 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5759 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5760 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5761 phba->cfg_total_seg_cnt);
3772a991 5762
da0436e9 5763 /* Initialize buffer queue management fields */
895427bd 5764 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS
5765 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5766 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5767
da0436e9
JS
5768 /*
5769 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5770 */
895427bd
JS
5771 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5772 /* Initialize the Abort scsi buffer list used by driver */
5773 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5774 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5775 }
5776
5777 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5778 /* Initialize the Abort nvme buffer list used by driver */
5779 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5780 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
318083ad
JS
5781 /* Fast-path XRI aborted CQ Event work queue list */
5782 INIT_LIST_HEAD(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue);
895427bd
JS
5783 }
5784
da0436e9 5785 /* This abort list used by worker thread */
895427bd 5786 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
f358dd0c 5787 spin_lock_init(&phba->sli4_hba.nvmet_io_lock);
3772a991 5788
da0436e9 5789 /*
6d368e53 5790 * Initialize driver internal slow-path work queues
da0436e9 5791 */
3772a991 5792
da0436e9
JS
5793 /* Driver internel slow-path CQ Event pool */
5794 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5795 /* Response IOCB work queue list */
45ed1190 5796 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS
5797 /* Asynchronous event CQ Event work queue list */
5798 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5799 /* Fast-path XRI aborted CQ Event work queue list */
5800 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5801 /* Slow-path XRI aborted CQ Event work queue list */
5802 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5803 /* Receive queue CQ Event work queue list */
5804 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5805
6d368e53
JS
5806 /* Initialize extent block lists. */
5807 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5808 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5809 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
5810 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
5811
448193b5
JS
5812 /* initialize optic_state to 0xFF */
5813 phba->sli4_hba.lnk_info.optic_state = 0xff;
5814
da0436e9
JS
5815 /* Allocate device driver memory */
5816 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
5817 if (rc)
5818 return -ENOMEM;
5819
2fcee4bf
JS
5820 /* IF Type 2 ports get initialized now. */
5821 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5822 LPFC_SLI_INTF_IF_TYPE_2) {
5823 rc = lpfc_pci_function_reset(phba);
895427bd
JS
5824 if (unlikely(rc)) {
5825 rc = -ENODEV;
5826 goto out_free_mem;
5827 }
946727dc 5828 phba->temp_sensor_support = 1;
2fcee4bf
JS
5829 }
5830
da0436e9
JS
5831 /* Create the bootstrap mailbox command */
5832 rc = lpfc_create_bootstrap_mbox(phba);
5833 if (unlikely(rc))
5834 goto out_free_mem;
5835
5836 /* Set up the host's endian order with the device. */
5837 rc = lpfc_setup_endian_order(phba);
5838 if (unlikely(rc))
5839 goto out_free_bsmbx;
5840
5841 /* Set up the hba's configuration parameters. */
5842 rc = lpfc_sli4_read_config(phba);
cff261f6
JS
5843 if (unlikely(rc))
5844 goto out_free_bsmbx;
5845 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS
5846 if (unlikely(rc))
5847 goto out_free_bsmbx;
5848
2fcee4bf
JS
5849 /* IF Type 0 ports get initialized now. */
5850 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5851 LPFC_SLI_INTF_IF_TYPE_0) {
5852 rc = lpfc_pci_function_reset(phba);
5853 if (unlikely(rc))
5854 goto out_free_bsmbx;
5855 }
da0436e9 5856
cb5172ea
JS
5857 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
5858 GFP_KERNEL);
5859 if (!mboxq) {
5860 rc = -ENOMEM;
5861 goto out_free_bsmbx;
5862 }
5863
f358dd0c 5864 /* Check for NVMET being configured */
895427bd 5865 phba->nvmet_support = 0;
f358dd0c
JS
5866 if (lpfc_enable_nvmet_cnt) {
5867
5868 /* First get WWN of HBA instance */
5869 lpfc_read_nv(phba, mboxq);
5870 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5871 if (rc != MBX_SUCCESS) {
5872 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5873 "6016 Mailbox failed , mbxCmd x%x "
5874 "READ_NV, mbxStatus x%x\n",
5875 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5876 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
5877 rc = -EIO;
5878 goto out_free_bsmbx;
5879 }
5880 mb = &mboxq->u.mb;
5881 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
5882 sizeof(uint64_t));
5883 wwn = cpu_to_be64(wwn);
5884 phba->sli4_hba.wwnn.u.name = wwn;
5885 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
5886 sizeof(uint64_t));
5887 /* wwn is WWPN of HBA instance */
5888 wwn = cpu_to_be64(wwn);
5889 phba->sli4_hba.wwpn.u.name = wwn;
5890
5891 /* Check to see if it matches any module parameter */
5892 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
5893 if (wwn == lpfc_enable_nvmet[i]) {
7d708033 5894#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
f358dd0c
JS
5895 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5896 "6017 NVME Target %016llx\n",
5897 wwn);
5898 phba->nvmet_support = 1; /* a match */
7d708033
JS
5899#else
5900 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5901 "6021 Can't enable NVME Target."
5902 " NVME_TARGET_FC infrastructure"
5903 " is not in kernel\n");
5904#endif
f358dd0c
JS
5905 }
5906 }
5907 }
895427bd
JS
5908
5909 lpfc_nvme_mod_param_dep(phba);
5910
fedd3b7b 5911 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS
5912 lpfc_supported_pages(mboxq);
5913 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS
5914 if (!rc) {
5915 mqe = &mboxq->u.mqe;
5916 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
5917 LPFC_MAX_SUPPORTED_PAGES);
5918 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
5919 switch (pn_page[i]) {
5920 case LPFC_SLI4_PARAMETERS:
5921 phba->sli4_hba.pc_sli4_params.supported = 1;
5922 break;
5923 default:
5924 break;
5925 }
5926 }
5927 /* Read the port's SLI4 Parameters capabilities if supported. */
5928 if (phba->sli4_hba.pc_sli4_params.supported)
5929 rc = lpfc_pc_sli4_params_get(phba, mboxq);
5930 if (rc) {
5931 mempool_free(mboxq, phba->mbox_mem_pool);
5932 rc = -EIO;
5933 goto out_free_bsmbx;
cb5172ea
JS
5934 }
5935 }
65791f1f 5936
fedd3b7b
JS
5937 /*
5938 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS
5939 * If this call fails, it isn't critical unless the SLI4 parameters come
5940 * back in conflict.
fedd3b7b 5941 */
6d368e53
JS
5942 rc = lpfc_get_sli4_parameters(phba, mboxq);
5943 if (rc) {
5944 if (phba->sli4_hba.extents_in_use &&
5945 phba->sli4_hba.rpi_hdrs_in_use) {
5946 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5947 "2999 Unsupported SLI4 Parameters "
5948 "Extents and RPI headers enabled.\n");
6d368e53 5949 }
895427bd
JS
5950 mempool_free(mboxq, phba->mbox_mem_pool);
5951 goto out_free_bsmbx;
6d368e53 5952 }
895427bd 5953
cb5172ea 5954 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS
5955
5956 /* Verify OAS is supported */
5957 lpfc_sli4_oas_verify(phba);
5958 if (phba->cfg_fof)
5959 fof_vectors = 1;
5960
5350d872
JS
5961 /* Verify all the SLI4 queues */
5962 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS
5963 if (rc)
5964 goto out_free_bsmbx;
5965
5966 /* Create driver internal CQE event pool */
5967 rc = lpfc_sli4_cq_event_pool_create(phba);
5968 if (rc)
5350d872 5969 goto out_free_bsmbx;
da0436e9 5970
8a9d2e80
JS
5971 /* Initialize sgl lists per host */
5972 lpfc_init_sgl_list(phba);
5973
5974 /* Allocate and initialize active sgl array */
da0436e9
JS
5975 rc = lpfc_init_active_sgl_array(phba);
5976 if (rc) {
5977 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5978 "1430 Failed to initialize sgl list.\n");
8a9d2e80 5979 goto out_destroy_cq_event_pool;
da0436e9 5980 }
da0436e9
JS
5981 rc = lpfc_sli4_init_rpi_hdrs(phba);
5982 if (rc) {
5983 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5984 "1432 Failed to initialize rpi headers.\n");
5985 goto out_free_active_sgl;
5986 }
5987
a93ff37a 5988 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS
5989 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
5990 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
5991 GFP_KERNEL);
5992 if (!phba->fcf.fcf_rr_bmask) {
5993 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5994 "2759 Failed allocate memory for FCF round "
5995 "robin failover bmask\n");
0558056c 5996 rc = -ENOMEM;
0c9ab6f5
JS
5997 goto out_remove_rpi_hdrs;
5998 }
5999
895427bd
JS
6000 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
6001 sizeof(struct lpfc_hba_eq_hdl),
6002 GFP_KERNEL);
6003 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS
6004 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6005 "2572 Failed allocate memory for "
6006 "fast-path per-EQ handle array\n");
6007 rc = -ENOMEM;
6008 goto out_free_fcf_rr_bmask;
da0436e9
JS
6009 }
6010
895427bd
JS
6011 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
6012 sizeof(struct lpfc_vector_map_info),
6013 GFP_KERNEL);
7bb03bbf
JS
6014 if (!phba->sli4_hba.cpu_map) {
6015 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6016 "3327 Failed allocate memory for msi-x "
6017 "interrupt vector mapping\n");
6018 rc = -ENOMEM;
895427bd 6019 goto out_free_hba_eq_hdl;
7bb03bbf 6020 }
b246de17 6021 if (lpfc_used_cpu == NULL) {
895427bd
JS
6022 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
6023 GFP_KERNEL);
b246de17
JS
6024 if (!lpfc_used_cpu) {
6025 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6026 "3335 Failed allocate memory for msi-x "
6027 "interrupt vector mapping\n");
6028 kfree(phba->sli4_hba.cpu_map);
6029 rc = -ENOMEM;
895427bd 6030 goto out_free_hba_eq_hdl;
b246de17
JS
6031 }
6032 for (i = 0; i < lpfc_present_cpu; i++)
6033 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
6034 }
6035
912e3acd
JS
6036 /*
6037 * Enable sr-iov virtual functions if supported and configured
6038 * through the module parameter.
6039 */
6040 if (phba->cfg_sriov_nr_virtfn > 0) {
6041 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6042 phba->cfg_sriov_nr_virtfn);
6043 if (rc) {
6044 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6045 "3020 Requested number of SR-IOV "
6046 "virtual functions (%d) is not "
6047 "supported\n",
6048 phba->cfg_sriov_nr_virtfn);
6049 phba->cfg_sriov_nr_virtfn = 0;
6050 }
6051 }
6052
5248a749 6053 return 0;
da0436e9 6054
895427bd
JS
6055out_free_hba_eq_hdl:
6056 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS
6057out_free_fcf_rr_bmask:
6058 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS
6059out_remove_rpi_hdrs:
6060 lpfc_sli4_remove_rpi_hdrs(phba);
6061out_free_active_sgl:
6062 lpfc_free_active_sgl(phba);
da0436e9
JS
6063out_destroy_cq_event_pool:
6064 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS
6065out_free_bsmbx:
6066 lpfc_destroy_bootstrap_mbox(phba);
6067out_free_mem:
6068 lpfc_mem_free(phba);
6069 return rc;
6070}
6071
6072/**
6073 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6074 * @phba: pointer to lpfc hba data structure.
6075 *
6076 * This routine is invoked to unset the driver internal resources set up
6077 * specific for supporting the SLI-4 HBA device it attached to.
6078 **/
6079static void
6080lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6081{
6082 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6083
7bb03bbf
JS
6084 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6085 kfree(phba->sli4_hba.cpu_map);
6086 phba->sli4_hba.num_present_cpu = 0;
6087 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6088 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6089
da0436e9 6090 /* Free memory allocated for fast-path work queue handles */
895427bd 6091 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS
6092
6093 /* Free the allocated rpi headers. */
6094 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6095 lpfc_sli4_remove_rpis(phba);
da0436e9 6096
0c9ab6f5
JS
6097 /* Free eligible FCF index bmask */
6098 kfree(phba->fcf.fcf_rr_bmask);
6099
da0436e9
JS
6100 /* Free the ELS sgl list */
6101 lpfc_free_active_sgl(phba);
8a9d2e80 6102 lpfc_free_els_sgl_list(phba);
f358dd0c 6103 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6104
da0436e9
JS
6105 /* Free the completion queue EQ event pool */
6106 lpfc_sli4_cq_event_release_all(phba);
6107 lpfc_sli4_cq_event_pool_destroy(phba);
6108
6d368e53
JS
6109 /* Release resource identifiers. */
6110 lpfc_sli4_dealloc_resource_identifiers(phba);
6111
da0436e9
JS
6112 /* Free the bsmbx region. */
6113 lpfc_destroy_bootstrap_mbox(phba);
6114
6115 /* Free the SLI Layer memory with SLI4 HBAs */
6116 lpfc_mem_free_all(phba);
6117
6118 /* Free the current connect table */
6119 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS
6120 &phba->fcf_conn_rec_list, list) {
6121 list_del_init(&conn_entry->list);
da0436e9 6122 kfree(conn_entry);
4d9ab994 6123 }
da0436e9
JS
6124
6125 return;
6126}
6127
6128/**
25985edc 6129 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS
6130 * @phba: The hba struct for which this call is being executed.
6131 * @dev_grp: The HBA PCI-Device group number.
6132 *
6133 * This routine sets up the device INIT interface API function jump table
6134 * in @phba struct.
6135 *
6136 * Returns: 0 - success, -ENODEV - failure.
6137 **/
6138int
6139lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6140{
84d1b006
JS
6141 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6142 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6143 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS
6144 switch (dev_grp) {
6145 case LPFC_PCI_DEV_LP:
6146 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6147 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6148 phba->lpfc_stop_port = lpfc_stop_port_s3;
6149 break;
6150 case LPFC_PCI_DEV_OC:
6151 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6152 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6153 phba->lpfc_stop_port = lpfc_stop_port_s4;
6154 break;
6155 default:
6156 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6157 "1431 Invalid HBA PCI-device group: 0x%x\n",
6158 dev_grp);
6159 return -ENODEV;
6160 break;
6161 }
6162 return 0;
6163}
6164
da0436e9
JS
6165/**
6166 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6167 * @phba: pointer to lpfc hba data structure.
6168 *
6169 * This routine is invoked to set up the driver internal resources after the
6170 * device specific resource setup to support the HBA device it attached to.
6171 *
6172 * Return codes
af901ca1 6173 * 0 - successful
da0436e9
JS
6174 * other values - error
6175 **/
6176static int
6177lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6178{
6179 int error;
6180
6181 /* Startup the kernel thread for this host adapter. */
6182 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6183 "lpfc_worker_%d", phba->brd_no);
6184 if (IS_ERR(phba->worker_thread)) {
6185 error = PTR_ERR(phba->worker_thread);
6186 return error;
3772a991
JS
6187 }
6188
6189 return 0;
6190}
6191
6192/**
6193 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6194 * @phba: pointer to lpfc hba data structure.
6195 *
6196 * This routine is invoked to unset the driver internal resources set up after
6197 * the device specific resource setup for supporting the HBA device it
6198 * attached to.
6199 **/
6200static void
6201lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6202{
6203 /* Stop kernel worker thread */
6204 kthread_stop(phba->worker_thread);
6205}
6206
6207/**
6208 * lpfc_free_iocb_list - Free iocb list.
6209 * @phba: pointer to lpfc hba data structure.
6210 *
6211 * This routine is invoked to free the driver's IOCB list and memory.
6212 **/
6213static void
6214lpfc_free_iocb_list(struct lpfc_hba *phba)
6215{
6216 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6217
6218 spin_lock_irq(&phba->hbalock);
6219 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6220 &phba->lpfc_iocb_list, list) {
6221 list_del(&iocbq_entry->list);
6222 kfree(iocbq_entry);
6223 phba->total_iocbq_bufs--;
98c9ea5c 6224 }
3772a991
JS
6225 spin_unlock_irq(&phba->hbalock);
6226
6227 return;
6228}
6229
6230/**
6231 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6232 * @phba: pointer to lpfc hba data structure.
6233 *
6234 * This routine is invoked to allocate and initizlize the driver's IOCB
6235 * list and set up the IOCB tag array accordingly.
6236 *
6237 * Return codes
af901ca1 6238 * 0 - successful
3772a991
JS
6239 * other values - error
6240 **/
6241static int
6242lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6243{
6244 struct lpfc_iocbq *iocbq_entry = NULL;
6245 uint16_t iotag;
6246 int i;
dea3101e
JB
6247
6248 /* Initialize and populate the iocb list per host. */
6249 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6250 for (i = 0; i < iocb_count; i++) {
dd00cc48 6251 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e
JB
6252 if (iocbq_entry == NULL) {
6253 printk(KERN_ERR "%s: only allocated %d iocbs of "
6254 "expected %d count. Unloading driver.\n",
cadbd4a5 6255 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e
JB
6256 goto out_free_iocbq;
6257 }
6258
604a3e30
JB
6259 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6260 if (iotag == 0) {
3772a991 6261 kfree(iocbq_entry);
604a3e30 6262 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6263 "Unloading driver.\n", __func__);
604a3e30
JB
6264 goto out_free_iocbq;
6265 }
6d368e53 6266 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6267 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS
6268
6269 spin_lock_irq(&phba->hbalock);
dea3101e
JB
6270 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6271 phba->total_iocbq_bufs++;
2e0fef85 6272 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
6273 }
6274
3772a991 6275 return 0;
dea3101e 6276
3772a991
JS
6277out_free_iocbq:
6278 lpfc_free_iocb_list(phba);
dea3101e 6279
3772a991
JS
6280 return -ENOMEM;
6281}
5e9d9b82 6282
3772a991 6283/**
8a9d2e80 6284 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6285 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6286 * @sglq_list: pointer to the head of sgl list.
3772a991 6287 *
8a9d2e80 6288 * This routine is invoked to free a give sgl list and memory.
3772a991 6289 **/
8a9d2e80
JS
6290void
6291lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6292{
da0436e9 6293 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS
6294
6295 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6296 list_del(&sglq_entry->list);
6297 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6298 kfree(sglq_entry);
6299 }
6300}
6301
6302/**
6303 * lpfc_free_els_sgl_list - Free els sgl list.
6304 * @phba: pointer to lpfc hba data structure.
6305 *
6306 * This routine is invoked to free the driver's els sgl list and memory.
6307 **/
6308static void
6309lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6310{
da0436e9 6311 LIST_HEAD(sglq_list);
dea3101e 6312
8a9d2e80 6313 /* Retrieve all els sgls from driver list */
da0436e9 6314 spin_lock_irq(&phba->hbalock);
895427bd
JS
6315 spin_lock(&phba->sli4_hba.sgl_list_lock);
6316 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6317 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6318 spin_unlock_irq(&phba->hbalock);
dea3101e 6319
8a9d2e80
JS
6320 /* Now free the sgl list */
6321 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6322}
92d7f7b0 6323
f358dd0c
JS
6324/**
6325 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
6326 * @phba: pointer to lpfc hba data structure.
6327 *
6328 * This routine is invoked to free the driver's nvmet sgl list and memory.
6329 **/
6330static void
6331lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
6332{
6333 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
6334 LIST_HEAD(sglq_list);
6335
6336 /* Retrieve all nvmet sgls from driver list */
6337 spin_lock_irq(&phba->hbalock);
6338 spin_lock(&phba->sli4_hba.sgl_list_lock);
6339 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
6340 spin_unlock(&phba->sli4_hba.sgl_list_lock);
6341 spin_unlock_irq(&phba->hbalock);
6342
6343 /* Now free the sgl list */
6344 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
6345 list_del(&sglq_entry->list);
6346 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
6347 kfree(sglq_entry);
6348 }
6349}
6350
da0436e9
JS
6351/**
6352 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6353 * @phba: pointer to lpfc hba data structure.
6354 *
6355 * This routine is invoked to allocate the driver's active sgl memory.
6356 * This array will hold the sglq_entry's for active IOs.
6357 **/
6358static int
6359lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6360{
6361 int size;
6362 size = sizeof(struct lpfc_sglq *);
6363 size *= phba->sli4_hba.max_cfg_param.max_xri;
6364
6365 phba->sli4_hba.lpfc_sglq_active_list =
6366 kzalloc(size, GFP_KERNEL);
6367 if (!phba->sli4_hba.lpfc_sglq_active_list)
6368 return -ENOMEM;
6369 return 0;
3772a991
JS
6370}
6371
6372/**
da0436e9 6373 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS
6374 * @phba: pointer to lpfc hba data structure.
6375 *
da0436e9
JS
6376 * This routine is invoked to walk through the array of active sglq entries
6377 * and free all of the resources.
6378 * This is just a place holder for now.
3772a991
JS
6379 **/
6380static void
da0436e9 6381lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6382{
da0436e9 6383 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS
6384}
6385
6386/**
da0436e9 6387 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS
6388 * @phba: pointer to lpfc hba data structure.
6389 *
da0436e9
JS
6390 * This routine is invoked to allocate and initizlize the driver's sgl
6391 * list and set up the sgl xritag tag array accordingly.
3772a991 6392 *
3772a991 6393 **/
8a9d2e80 6394static void
da0436e9 6395lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6396{
da0436e9 6397 /* Initialize and populate the sglq list per host/VF. */
895427bd 6398 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 6399 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c
JS
6400 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
6401 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list);
da0436e9 6402
8a9d2e80
JS
6403 /* els xri-sgl book keeping */
6404 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6405
8a9d2e80 6406 /* scsi xri-buffer book keeping */
da0436e9 6407 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS
6408
6409 /* nvme xri-buffer book keeping */
6410 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS
6411}
6412
6413/**
6414 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6415 * @phba: pointer to lpfc hba data structure.
6416 *
6417 * This routine is invoked to post rpi header templates to the
88a2cfbb 6418 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6419 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS
6420 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6421 * and should be called only when interrupts are disabled.
da0436e9
JS
6422 *
6423 * Return codes
af901ca1 6424 * 0 - successful
88a2cfbb 6425 * -ERROR - otherwise.
da0436e9
JS
6426 **/
6427int
6428lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6429{
6430 int rc = 0;
da0436e9
JS
6431 struct lpfc_rpi_hdr *rpi_hdr;
6432
6433 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6434 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6435 return rc;
6d368e53
JS
6436 if (phba->sli4_hba.extents_in_use)
6437 return -EIO;
da0436e9
JS
6438
6439 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6440 if (!rpi_hdr) {
6441 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6442 "0391 Error during rpi post operation\n");
6443 lpfc_sli4_remove_rpis(phba);
6444 rc = -ENODEV;
6445 }
6446
6447 return rc;
6448}
6449
6450/**
6451 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6452 * @phba: pointer to lpfc hba data structure.
6453 *
6454 * This routine is invoked to allocate a single 4KB memory region to
6455 * support rpis and stores them in the phba. This single region
6456 * provides support for up to 64 rpis. The region is used globally
6457 * by the device.
6458 *
6459 * Returns:
6460 * A valid rpi hdr on success.
6461 * A NULL pointer on any failure.
6462 **/
6463struct lpfc_rpi_hdr *
6464lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6465{
6466 uint16_t rpi_limit, curr_rpi_range;
6467 struct lpfc_dmabuf *dmabuf;
6468 struct lpfc_rpi_hdr *rpi_hdr;
9589b062 6469 uint32_t rpi_count;
da0436e9 6470
6d368e53
JS
6471 /*
6472 * If the SLI4 port supports extents, posting the rpi header isn't
6473 * required. Set the expected maximum count and let the actual value
6474 * get set when extents are fully allocated.
6475 */
6476 if (!phba->sli4_hba.rpi_hdrs_in_use)
6477 return NULL;
6478 if (phba->sli4_hba.extents_in_use)
6479 return NULL;
6480
6481 /* The limit on the logical index is just the max_rpi count. */
da0436e9 6482 rpi_limit = phba->sli4_hba.max_cfg_param.rpi_base +
6d368e53 6483 phba->sli4_hba.max_cfg_param.max_rpi - 1;
da0436e9
JS
6484
6485 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6486 /*
6487 * Establish the starting RPI in this header block. The starting
6488 * rpi is normalized to a zero base because the physical rpi is
6489 * port based.
6490 */
97f2ecf1 6491 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS
6492 spin_unlock_irq(&phba->hbalock);
6493
6494 /*
6495 * The port has a limited number of rpis. The increment here
6496 * is LPFC_RPI_HDR_COUNT - 1 to account for the starting value
6497 * and to allow the full max_rpi range per port.
6498 */
6499 if ((curr_rpi_range + (LPFC_RPI_HDR_COUNT - 1)) > rpi_limit)
9589b062
JS
6500 rpi_count = rpi_limit - curr_rpi_range;
6501 else
6502 rpi_count = LPFC_RPI_HDR_COUNT;
da0436e9 6503
6d368e53
JS
6504 if (!rpi_count)
6505 return NULL;
da0436e9
JS
6506 /*
6507 * First allocate the protocol header region for the port. The
6508 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6509 */
6510 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6511 if (!dmabuf)
6512 return NULL;
6513
1aee383d
JP
6514 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6515 LPFC_HDR_TEMPLATE_SIZE,
6516 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
6517 if (!dmabuf->virt) {
6518 rpi_hdr = NULL;
6519 goto err_free_dmabuf;
6520 }
6521
da0436e9
JS
6522 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6523 rpi_hdr = NULL;
6524 goto err_free_coherent;
6525 }
6526
6527 /* Save the rpi header data for cleanup later. */
6528 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6529 if (!rpi_hdr)
6530 goto err_free_coherent;
6531
6532 rpi_hdr->dmabuf = dmabuf;
6533 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6534 rpi_hdr->page_count = 1;
6535 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6536
6537 /* The rpi_hdr stores the logical index only. */
6538 rpi_hdr->start_rpi = curr_rpi_range;
da0436e9
JS
6539 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6540
6541 /*
6d368e53
JS
6542 * The next_rpi stores the next logical module-64 rpi value used
6543 * to post physical rpis in subsequent rpi postings.
da0436e9 6544 */
9589b062 6545 phba->sli4_hba.next_rpi += rpi_count;
da0436e9
JS
6546 spin_unlock_irq(&phba->hbalock);
6547 return rpi_hdr;
6548
6549 err_free_coherent:
6550 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6551 dmabuf->virt, dmabuf->phys);
6552 err_free_dmabuf:
6553 kfree(dmabuf);
6554 return NULL;
6555}
6556
6557/**
6558 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6559 * @phba: pointer to lpfc hba data structure.
6560 *
6561 * This routine is invoked to remove all memory resources allocated
6d368e53
JS
6562 * to support rpis for SLI4 ports not supporting extents. This routine
6563 * presumes the caller has released all rpis consumed by fabric or port
6564 * logins and is prepared to have the header pages removed.
da0436e9
JS
6565 **/
6566void
6567lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6568{
6569 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6570
6d368e53
JS
6571 if (!phba->sli4_hba.rpi_hdrs_in_use)
6572 goto exit;
6573
da0436e9
JS
6574 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6575 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6576 list_del(&rpi_hdr->list);
6577 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6578 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6579 kfree(rpi_hdr->dmabuf);
6580 kfree(rpi_hdr);
6581 }
6d368e53
JS
6582 exit:
6583 /* There are no rpis available to the port now. */
6584 phba->sli4_hba.next_rpi = 0;
da0436e9
JS
6585}
6586
6587/**
6588 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6589 * @pdev: pointer to pci device data structure.
6590 *
6591 * This routine is invoked to allocate the driver hba data structure for an
6592 * HBA device. If the allocation is successful, the phba reference to the
6593 * PCI device data structure is set.
6594 *
6595 * Return codes
af901ca1 6596 * pointer to @phba - successful
da0436e9
JS
6597 * NULL - error
6598 **/
6599static struct lpfc_hba *
6600lpfc_hba_alloc(struct pci_dev *pdev)
6601{
6602 struct lpfc_hba *phba;
6603
6604 /* Allocate memory for HBA structure */
6605 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6606 if (!phba) {
e34ccdfe 6607 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS
6608 return NULL;
6609 }
6610
6611 /* Set reference to PCI device in HBA structure */
6612 phba->pcidev = pdev;
6613
6614 /* Assign an unused board number */
6615 phba->brd_no = lpfc_get_instance();
6616 if (phba->brd_no < 0) {
6617 kfree(phba);
6618 return NULL;
6619 }
65791f1f 6620 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6621
4fede78f 6622 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS
6623 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6624
da0436e9
JS
6625 return phba;
6626}
6627
6628/**
6629 * lpfc_hba_free - Free driver hba data structure with a device.
6630 * @phba: pointer to lpfc hba data structure.
6631 *
6632 * This routine is invoked to free the driver hba data structure with an
6633 * HBA device.
6634 **/
6635static void
6636lpfc_hba_free(struct lpfc_hba *phba)
6637{
6638 /* Release the driver assigned board number */
6639 idr_remove(&lpfc_hba_index, phba->brd_no);
6640
895427bd
JS
6641 /* Free memory allocated with sli3 rings */
6642 kfree(phba->sli.sli3_ring);
6643 phba->sli.sli3_ring = NULL;
2a76a283 6644
da0436e9
JS
6645 kfree(phba);
6646 return;
6647}
6648
6649/**
6650 * lpfc_create_shost - Create hba physical port with associated scsi host.
6651 * @phba: pointer to lpfc hba data structure.
6652 *
6653 * This routine is invoked to create HBA physical port and associate a SCSI
6654 * host with it.
6655 *
6656 * Return codes
af901ca1 6657 * 0 - successful
da0436e9
JS
6658 * other values - error
6659 **/
6660static int
6661lpfc_create_shost(struct lpfc_hba *phba)
6662{
6663 struct lpfc_vport *vport;
6664 struct Scsi_Host *shost;
6665
6666 /* Initialize HBA FC structure */
6667 phba->fc_edtov = FF_DEF_EDTOV;
6668 phba->fc_ratov = FF_DEF_RATOV;
6669 phba->fc_altov = FF_DEF_ALTOV;
6670 phba->fc_arbtov = FF_DEF_ARBTOV;
6671
d7c47992 6672 atomic_set(&phba->sdev_cnt, 0);
da0436e9
JS
6673 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6674 if (!vport)
6675 return -ENODEV;
6676
6677 shost = lpfc_shost_from_vport(vport);
6678 phba->pport = vport;
2ea259ee 6679
f358dd0c
JS
6680 if (phba->nvmet_support) {
6681 /* Only 1 vport (pport) will support NVME target */
6682 if (phba->txrdy_payload_pool == NULL) {
6683 phba->txrdy_payload_pool = pci_pool_create(
6684 "txrdy_pool", phba->pcidev,
6685 TXRDY_PAYLOAD_LEN, 16, 0);
6686 if (phba->txrdy_payload_pool) {
6687 phba->targetport = NULL;
6688 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
6689 lpfc_printf_log(phba, KERN_INFO,
6690 LOG_INIT | LOG_NVME_DISC,
6691 "6076 NVME Target Found\n");
6692 }
6693 }
6694 }
6695
da0436e9
JS
6696 lpfc_debugfs_initialize(vport);
6697 /* Put reference to SCSI host to driver's device private data */
6698 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6699
4258e98e
JS
6700 /*
6701 * At this point we are fully registered with PSA. In addition,
6702 * any initial discovery should be completed.
6703 */
6704 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS
6705 if (phba->cfg_enable_SmartSAN ||
6706 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS
6707
6708 /* Setup appropriate attribute masks */
6709 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6710 if (phba->cfg_enable_SmartSAN)
4258e98e
JS
6711 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6712 else
6713 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6714 }
3772a991
JS
6715 return 0;
6716}
db2378e0 6717
3772a991
JS
6718/**
6719 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6720 * @phba: pointer to lpfc hba data structure.
6721 *
6722 * This routine is invoked to destroy HBA physical port and the associated
6723 * SCSI host.
6724 **/
6725static void
6726lpfc_destroy_shost(struct lpfc_hba *phba)
6727{
6728 struct lpfc_vport *vport = phba->pport;
6729
6730 /* Destroy physical port that associated with the SCSI host */
6731 destroy_port(vport);
6732
6733 return;
6734}
6735
6736/**
6737 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6738 * @phba: pointer to lpfc hba data structure.
6739 * @shost: the shost to be used to detect Block guard settings.
6740 *
6741 * This routine sets up the local Block guard protocol settings for @shost.
6742 * This routine also allocates memory for debugging bg buffers.
6743 **/
6744static void
6745lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6746{
bbeb79b9
JS
6747 uint32_t old_mask;
6748 uint32_t old_guard;
6749
3772a991 6750 int pagecnt = 10;
b3b98b74 6751 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS
6752 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6753 "1478 Registering BlockGuard with the "
6754 "SCSI layer\n");
bbeb79b9 6755
b3b98b74
JS
6756 old_mask = phba->cfg_prot_mask;
6757 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS
6758
6759 /* Only allow supported values */
b3b98b74 6760 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS
6761 SHOST_DIX_TYPE0_PROTECTION |
6762 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS
6763 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6764 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS
6765
6766 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS
6767 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6768 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6769
b3b98b74
JS
6770 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6771 if ((old_mask != phba->cfg_prot_mask) ||
6772 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS
6773 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6774 "1475 Registering BlockGuard with the "
6775 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS
6776 phba->cfg_prot_mask,
6777 phba->cfg_prot_guard);
bbeb79b9 6778
b3b98b74
JS
6779 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6780 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS
6781 } else
6782 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6783 "1479 Not Registering BlockGuard with the SCSI "
6784 "layer, Bad protection parameters: %d %d\n",
6785 old_mask, old_guard);
3772a991 6786 }
bbeb79b9 6787
3772a991
JS
6788 if (!_dump_buf_data) {
6789 while (pagecnt) {
6790 spin_lock_init(&_dump_buf_lock);
6791 _dump_buf_data =
6792 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6793 if (_dump_buf_data) {
6a9c52cf
JS
6794 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6795 "9043 BLKGRD: allocated %d pages for "
3772a991
JS
6796 "_dump_buf_data at 0x%p\n",
6797 (1 << pagecnt), _dump_buf_data);
6798 _dump_buf_data_order = pagecnt;
6799 memset(_dump_buf_data, 0,
6800 ((1 << PAGE_SHIFT) << pagecnt));
6801 break;
6802 } else
6803 --pagecnt;
6804 }
6805 if (!_dump_buf_data_order)
6a9c52cf
JS
6806 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6807 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS
6808 "memory for hexdump\n");
6809 } else
6a9c52cf
JS
6810 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6811 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS
6812 "\n", _dump_buf_data);
6813 if (!_dump_buf_dif) {
6814 while (pagecnt) {
6815 _dump_buf_dif =
6816 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6817 if (_dump_buf_dif) {
6a9c52cf
JS
6818 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6819 "9046 BLKGRD: allocated %d pages for "
3772a991
JS
6820 "_dump_buf_dif at 0x%p\n",
6821 (1 << pagecnt), _dump_buf_dif);
6822 _dump_buf_dif_order = pagecnt;
6823 memset(_dump_buf_dif, 0,
6824 ((1 << PAGE_SHIFT) << pagecnt));
6825 break;
6826 } else
6827 --pagecnt;
6828 }
6829 if (!_dump_buf_dif_order)
6a9c52cf
JS
6830 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6831 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS
6832 "memory for hexdump\n");
6833 } else
6a9c52cf
JS
6834 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6835 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS
6836 _dump_buf_dif);
6837}
6838
6839/**
6840 * lpfc_post_init_setup - Perform necessary device post initialization setup.
6841 * @phba: pointer to lpfc hba data structure.
6842 *
6843 * This routine is invoked to perform all the necessary post initialization
6844 * setup for the device.
6845 **/
6846static void
6847lpfc_post_init_setup(struct lpfc_hba *phba)
6848{
6849 struct Scsi_Host *shost;
6850 struct lpfc_adapter_event_header adapter_event;
6851
6852 /* Get the default values for Model Name and Description */
6853 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
6854
6855 /*
6856 * hba setup may have changed the hba_queue_depth so we need to
6857 * adjust the value of can_queue.
6858 */
6859 shost = pci_get_drvdata(phba->pcidev);
6860 shost->can_queue = phba->cfg_hba_queue_depth - 10;
6861 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
6862 lpfc_setup_bg(phba, shost);
6863
6864 lpfc_host_attrib_init(shost);
6865
6866 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
6867 spin_lock_irq(shost->host_lock);
6868 lpfc_poll_start_timer(phba);
6869 spin_unlock_irq(shost->host_lock);
6870 }
6871
6872 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6873 "0428 Perform SCSI scan\n");
6874 /* Send board arrival event to upper layer */
6875 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
6876 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
6877 fc_host_post_vendor_event(shost, fc_get_event_number(),
6878 sizeof(adapter_event),
6879 (char *) &adapter_event,
6880 LPFC_NL_VENDOR_ID);
6881 return;
6882}
6883
6884/**
6885 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
6886 * @phba: pointer to lpfc hba data structure.
6887 *
6888 * This routine is invoked to set up the PCI device memory space for device
6889 * with SLI-3 interface spec.
6890 *
6891 * Return codes
af901ca1 6892 * 0 - successful
3772a991
JS
6893 * other values - error
6894 **/
6895static int
6896lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
6897{
6898 struct pci_dev *pdev;
6899 unsigned long bar0map_len, bar2map_len;
6900 int i, hbq_count;
6901 void *ptr;
6902 int error = -ENODEV;
6903
6904 /* Obtain PCI device reference */
6905 if (!phba->pcidev)
6906 return error;
6907 else
6908 pdev = phba->pcidev;
6909
6910 /* Set the device DMA mask size */
8e68597d
MR
6911 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
6912 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
6913 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
6914 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 6915 return error;
8e68597d
MR
6916 }
6917 }
3772a991
JS
6918
6919 /* Get the bus address of Bar0 and Bar2 and the number of bytes
6920 * required by each mapping.
6921 */
6922 phba->pci_bar0_map = pci_resource_start(pdev, 0);
6923 bar0map_len = pci_resource_len(pdev, 0);
6924
6925 phba->pci_bar2_map = pci_resource_start(pdev, 2);
6926 bar2map_len = pci_resource_len(pdev, 2);
6927
6928 /* Map HBA SLIM to a kernel virtual address. */
6929 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
6930 if (!phba->slim_memmap_p) {
6931 dev_printk(KERN_ERR, &pdev->dev,
6932 "ioremap failed for SLIM memory.\n");
6933 goto out;
6934 }
6935
6936 /* Map HBA Control Registers to a kernel virtual address. */
6937 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
6938 if (!phba->ctrl_regs_memmap_p) {
6939 dev_printk(KERN_ERR, &pdev->dev,
6940 "ioremap failed for HBA control registers.\n");
6941 goto out_iounmap_slim;
6942 }
6943
6944 /* Allocate memory for SLI-2 structures */
1aee383d
JP
6945 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6946 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS
6947 if (!phba->slim2p.virt)
6948 goto out_iounmap;
6949
3772a991 6950 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS
6951 phba->mbox_ext = (phba->slim2p.virt +
6952 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS
6953 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
6954 phba->IOCBs = (phba->slim2p.virt +
6955 offsetof(struct lpfc_sli2_slim, IOCBs));
6956
6957 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
6958 lpfc_sli_hbq_size(),
6959 &phba->hbqslimp.phys,
6960 GFP_KERNEL);
6961 if (!phba->hbqslimp.virt)
6962 goto out_free_slim;
6963
6964 hbq_count = lpfc_sli_hbq_count();
6965 ptr = phba->hbqslimp.virt;
6966 for (i = 0; i < hbq_count; ++i) {
6967 phba->hbqs[i].hbq_virt = ptr;
6968 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
6969 ptr += (lpfc_hbq_defs[i]->entry_count *
6970 sizeof(struct lpfc_hbq_entry));
6971 }
6972 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
6973 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
6974
6975 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
6976
3772a991
JS
6977 phba->MBslimaddr = phba->slim_memmap_p;
6978 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
6979 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
6980 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
6981 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
6982
6983 return 0;
6984
6985out_free_slim:
6986 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6987 phba->slim2p.virt, phba->slim2p.phys);
6988out_iounmap:
6989 iounmap(phba->ctrl_regs_memmap_p);
6990out_iounmap_slim:
6991 iounmap(phba->slim_memmap_p);
6992out:
6993 return error;
6994}
6995
6996/**
6997 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
6998 * @phba: pointer to lpfc hba data structure.
6999 *
7000 * This routine is invoked to unset the PCI device memory space for device
7001 * with SLI-3 interface spec.
7002 **/
7003static void
7004lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7005{
7006 struct pci_dev *pdev;
7007
7008 /* Obtain PCI device reference */
7009 if (!phba->pcidev)
7010 return;
7011 else
7012 pdev = phba->pcidev;
7013
7014 /* Free coherent DMA memory allocated */
7015 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7016 phba->hbqslimp.virt, phba->hbqslimp.phys);
7017 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7018 phba->slim2p.virt, phba->slim2p.phys);
7019
7020 /* I/O memory unmap */
7021 iounmap(phba->ctrl_regs_memmap_p);
7022 iounmap(phba->slim_memmap_p);
7023
7024 return;
7025}
7026
7027/**
da0436e9 7028 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS
7029 * @phba: pointer to lpfc hba data structure.
7030 *
da0436e9
JS
7031 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7032 * done and check status.
3772a991 7033 *
da0436e9 7034 * Return 0 if successful, otherwise -ENODEV.
3772a991 7035 **/
da0436e9
JS
7036int
7037lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 7038{
2fcee4bf
JS
7039 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7040 struct lpfc_register reg_data;
7041 int i, port_error = 0;
7042 uint32_t if_type;
3772a991 7043
9940b97b
JS
7044 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7045 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 7046 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 7047 return -ENODEV;
3772a991 7048
da0436e9
JS
7049 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7050 for (i = 0; i < 3000; i++) {
9940b97b
JS
7051 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7052 &portsmphr_reg.word0) ||
7053 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 7054 /* Port has a fatal POST error, break out */
da0436e9
JS
7055 port_error = -ENODEV;
7056 break;
7057 }
2fcee4bf
JS
7058 if (LPFC_POST_STAGE_PORT_READY ==
7059 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 7060 break;
da0436e9 7061 msleep(10);
3772a991
JS
7062 }
7063
2fcee4bf
JS
7064 /*
7065 * If there was a port error during POST, then don't proceed with
7066 * other register reads as the data may not be valid. Just exit.
7067 */
7068 if (port_error) {
da0436e9 7069 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
7070 "1408 Port Failed POST - portsmphr=0x%x, "
7071 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7072 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7073 portsmphr_reg.word0,
7074 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7075 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7076 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7077 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7078 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7079 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7080 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7081 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7082 } else {
28baac74 7083 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS
7084 "2534 Device Info: SLIFamily=0x%x, "
7085 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7086 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS
7087 bf_get(lpfc_sli_intf_sli_family,
7088 &phba->sli4_hba.sli_intf),
7089 bf_get(lpfc_sli_intf_slirev,
7090 &phba->sli4_hba.sli_intf),
085c647c
JS
7091 bf_get(lpfc_sli_intf_if_type,
7092 &phba->sli4_hba.sli_intf),
7093 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7094 &phba->sli4_hba.sli_intf),
085c647c
JS
7095 bf_get(lpfc_sli_intf_sli_hint2,
7096 &phba->sli4_hba.sli_intf),
7097 bf_get(lpfc_sli_intf_func_type,
28baac74 7098 &phba->sli4_hba.sli_intf));
2fcee4bf
JS
7099 /*
7100 * Check for other Port errors during the initialization
7101 * process. Fail the load if the port did not come up
7102 * correctly.
7103 */
7104 if_type = bf_get(lpfc_sli_intf_if_type,
7105 &phba->sli4_hba.sli_intf);
7106 switch (if_type) {
7107 case LPFC_SLI_INTF_IF_TYPE_0:
7108 phba->sli4_hba.ue_mask_lo =
7109 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7110 phba->sli4_hba.ue_mask_hi =
7111 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7112 uerrlo_reg.word0 =
7113 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7114 uerrhi_reg.word0 =
7115 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7116 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7117 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7118 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7119 "1422 Unrecoverable Error "
7120 "Detected during POST "
7121 "uerr_lo_reg=0x%x, "
7122 "uerr_hi_reg=0x%x, "
7123 "ue_mask_lo_reg=0x%x, "
7124 "ue_mask_hi_reg=0x%x\n",
7125 uerrlo_reg.word0,
7126 uerrhi_reg.word0,
7127 phba->sli4_hba.ue_mask_lo,
7128 phba->sli4_hba.ue_mask_hi);
7129 port_error = -ENODEV;
7130 }
7131 break;
7132 case LPFC_SLI_INTF_IF_TYPE_2:
7133 /* Final checks. The port status should be clean. */
9940b97b
JS
7134 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7135 &reg_data.word0) ||
0558056c
JS
7136 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7137 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS
7138 phba->work_status[0] =
7139 readl(phba->sli4_hba.u.if_type2.
7140 ERR1regaddr);
7141 phba->work_status[1] =
7142 readl(phba->sli4_hba.u.if_type2.
7143 ERR2regaddr);
7144 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS
7145 "2888 Unrecoverable port error "
7146 "following POST: port status reg "
7147 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS
7148 "error 1=0x%x, error 2=0x%x\n",
7149 reg_data.word0,
7150 portsmphr_reg.word0,
7151 phba->work_status[0],
7152 phba->work_status[1]);
7153 port_error = -ENODEV;
7154 }
7155 break;
7156 case LPFC_SLI_INTF_IF_TYPE_1:
7157 default:
7158 break;
7159 }
28baac74 7160 }
da0436e9
JS
7161 return port_error;
7162}
3772a991 7163
da0436e9
JS
7164/**
7165 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7166 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7167 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS
7168 *
7169 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7170 * memory map.
7171 **/
7172static void
2fcee4bf
JS
7173lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7174{
7175 switch (if_type) {
7176 case LPFC_SLI_INTF_IF_TYPE_0:
7177 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7178 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7179 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7180 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7181 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7182 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7183 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7184 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7185 phba->sli4_hba.SLIINTFregaddr =
7186 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7187 break;
7188 case LPFC_SLI_INTF_IF_TYPE_2:
7189 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS
7190 phba->sli4_hba.conf_regs_memmap_p +
7191 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7192 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS
7193 phba->sli4_hba.conf_regs_memmap_p +
7194 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7195 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS
7196 phba->sli4_hba.conf_regs_memmap_p +
7197 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7198 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS
7199 phba->sli4_hba.conf_regs_memmap_p +
7200 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS
7201 phba->sli4_hba.SLIINTFregaddr =
7202 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7203 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS
7204 phba->sli4_hba.conf_regs_memmap_p +
7205 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7206 phba->sli4_hba.RQDBregaddr =
962bc51b
JS
7207 phba->sli4_hba.conf_regs_memmap_p +
7208 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7209 phba->sli4_hba.WQDBregaddr =
962bc51b
JS
7210 phba->sli4_hba.conf_regs_memmap_p +
7211 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS
7212 phba->sli4_hba.EQCQDBregaddr =
7213 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
7214 phba->sli4_hba.MQDBregaddr =
7215 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
7216 phba->sli4_hba.BMBXregaddr =
7217 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
7218 break;
7219 case LPFC_SLI_INTF_IF_TYPE_1:
7220 default:
7221 dev_printk(KERN_ERR, &phba->pcidev->dev,
7222 "FATAL - unsupported SLI4 interface type - %d\n",
7223 if_type);
7224 break;
7225 }
da0436e9 7226}
3772a991 7227
da0436e9
JS
7228/**
7229 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
7230 * @phba: pointer to lpfc hba data structure.
7231 *
7232 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
7233 * memory map.
7234 **/
7235static void
7236lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
7237{
2fcee4bf
JS
7238 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
7239 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 7240 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7241 LPFC_HST_ISR0;
da0436e9 7242 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7243 LPFC_HST_IMR0;
da0436e9 7244 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7245 LPFC_HST_ISCR0;
3772a991
JS
7246}
7247
7248/**
da0436e9 7249 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 7250 * @phba: pointer to lpfc hba data structure.
da0436e9 7251 * @vf: virtual function number
3772a991 7252 *
da0436e9
JS
7253 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
7254 * based on the given viftual function number, @vf.
7255 *
7256 * Return 0 if successful, otherwise -ENODEV.
3772a991 7257 **/
da0436e9
JS
7258static int
7259lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7260{
da0436e9
JS
7261 if (vf > LPFC_VIR_FUNC_MAX)
7262 return -ENODEV;
3772a991 7263
da0436e9 7264 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7265 vf * LPFC_VFR_PAGE_SIZE +
7266 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7267 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7268 vf * LPFC_VFR_PAGE_SIZE +
7269 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS
7270 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7271 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7272 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7273 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7274 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7275 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7276 return 0;
3772a991
JS
7277}
7278
7279/**
da0436e9 7280 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS
7281 * @phba: pointer to lpfc hba data structure.
7282 *
da0436e9
JS
7283 * This routine is invoked to create the bootstrap mailbox
7284 * region consistent with the SLI-4 interface spec. This
7285 * routine allocates all memory necessary to communicate
7286 * mailbox commands to the port and sets up all alignment
7287 * needs. No locks are expected to be held when calling
7288 * this routine.
3772a991
JS
7289 *
7290 * Return codes
af901ca1 7291 * 0 - successful
d439d286 7292 * -ENOMEM - could not allocated memory.
da0436e9 7293 **/
3772a991 7294static int
da0436e9 7295lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7296{
da0436e9
JS
7297 uint32_t bmbx_size;
7298 struct lpfc_dmabuf *dmabuf;
7299 struct dma_address *dma_address;
7300 uint32_t pa_addr;
7301 uint64_t phys_addr;
7302
7303 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7304 if (!dmabuf)
7305 return -ENOMEM;
3772a991 7306
da0436e9
JS
7307 /*
7308 * The bootstrap mailbox region is comprised of 2 parts
7309 * plus an alignment restriction of 16 bytes.
7310 */
7311 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP
7312 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7313 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
7314 if (!dmabuf->virt) {
7315 kfree(dmabuf);
7316 return -ENOMEM;
3772a991
JS
7317 }
7318
da0436e9
JS
7319 /*
7320 * Initialize the bootstrap mailbox pointers now so that the register
7321 * operations are simple later. The mailbox dma address is required
7322 * to be 16-byte aligned. Also align the virtual memory as each
7323 * maibox is copied into the bmbx mailbox region before issuing the
7324 * command to the port.
7325 */
7326 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7327 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7328
7329 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7330 LPFC_ALIGN_16_BYTE);
7331 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7332 LPFC_ALIGN_16_BYTE);
7333
7334 /*
7335 * Set the high and low physical addresses now. The SLI4 alignment
7336 * requirement is 16 bytes and the mailbox is posted to the port
7337 * as two 30-bit addresses. The other data is a bit marking whether
7338 * the 30-bit address is the high or low address.
7339 * Upcast bmbx aphys to 64bits so shift instruction compiles
7340 * clean on 32 bit machines.
7341 */
7342 dma_address = &phba->sli4_hba.bmbx.dma_address;
7343 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7344 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7345 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7346 LPFC_BMBX_BIT1_ADDR_HI);
7347
7348 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7349 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7350 LPFC_BMBX_BIT1_ADDR_LO);
7351 return 0;
3772a991
JS
7352}
7353
7354/**
da0436e9 7355 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS
7356 * @phba: pointer to lpfc hba data structure.
7357 *
da0436e9
JS
7358 * This routine is invoked to teardown the bootstrap mailbox
7359 * region and release all host resources. This routine requires
7360 * the caller to ensure all mailbox commands recovered, no
7361 * additional mailbox comands are sent, and interrupts are disabled
7362 * before calling this routine.
7363 *
7364 **/
3772a991 7365static void
da0436e9 7366lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7367{
da0436e9
JS
7368 dma_free_coherent(&phba->pcidev->dev,
7369 phba->sli4_hba.bmbx.bmbx_size,
7370 phba->sli4_hba.bmbx.dmabuf->virt,
7371 phba->sli4_hba.bmbx.dmabuf->phys);
7372
7373 kfree(phba->sli4_hba.bmbx.dmabuf);
7374 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS
7375}
7376
7377/**
da0436e9 7378 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS
7379 * @phba: pointer to lpfc hba data structure.
7380 *
da0436e9
JS
7381 * This routine is invoked to read the configuration parameters from the HBA.
7382 * The configuration parameters are used to set the base and maximum values
7383 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7384 * allocation for the port.
3772a991
JS
7385 *
7386 * Return codes
af901ca1 7387 * 0 - successful
25985edc 7388 * -ENOMEM - No available memory
d439d286 7389 * -EIO - The mailbox failed to complete successfully.
3772a991 7390 **/
ff78d8f9 7391int
da0436e9 7392lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7393{
da0436e9
JS
7394 LPFC_MBOXQ_t *pmb;
7395 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS
7396 union lpfc_sli4_cfg_shdr *shdr;
7397 uint32_t shdr_status, shdr_add_status;
7398 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7399 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7400 char *pdesc_0;
c691816e
JS
7401 uint16_t forced_link_speed;
7402 uint32_t if_type;
8aa134a8 7403 int length, i, rc = 0, rc2;
3772a991 7404
da0436e9
JS
7405 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7406 if (!pmb) {
7407 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7408 "2011 Unable to allocate memory for issuing "
7409 "SLI_CONFIG_SPECIAL mailbox command\n");
7410 return -ENOMEM;
3772a991
JS
7411 }
7412
da0436e9 7413 lpfc_read_config(phba, pmb);
3772a991 7414
da0436e9
JS
7415 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7416 if (rc != MBX_SUCCESS) {
7417 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7418 "2012 Mailbox failed , mbxCmd x%x "
7419 "READ_CONFIG, mbxStatus x%x\n",
7420 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7421 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7422 rc = -EIO;
7423 } else {
7424 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS
7425 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7426 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7427 phba->sli4_hba.lnk_info.lnk_tp =
7428 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7429 phba->sli4_hba.lnk_info.lnk_no =
7430 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7431 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7432 "3081 lnk_type:%d, lnk_numb:%d\n",
7433 phba->sli4_hba.lnk_info.lnk_tp,
7434 phba->sli4_hba.lnk_info.lnk_no);
7435 } else
7436 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7437 "3082 Mailbox (x%x) returned ldv:x0\n",
7438 bf_get(lpfc_mqe_command, &pmb->u.mqe));
6d368e53
JS
7439 phba->sli4_hba.extents_in_use =
7440 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS
7441 phba->sli4_hba.max_cfg_param.max_xri =
7442 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7443 phba->sli4_hba.max_cfg_param.xri_base =
7444 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7445 phba->sli4_hba.max_cfg_param.max_vpi =
7446 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7447 phba->sli4_hba.max_cfg_param.vpi_base =
7448 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7449 phba->sli4_hba.max_cfg_param.max_rpi =
7450 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7451 phba->sli4_hba.max_cfg_param.rpi_base =
7452 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7453 phba->sli4_hba.max_cfg_param.max_vfi =
7454 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7455 phba->sli4_hba.max_cfg_param.vfi_base =
7456 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7457 phba->sli4_hba.max_cfg_param.max_fcfi =
7458 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS
7459 phba->sli4_hba.max_cfg_param.max_eq =
7460 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7461 phba->sli4_hba.max_cfg_param.max_rq =
7462 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7463 phba->sli4_hba.max_cfg_param.max_wq =
7464 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7465 phba->sli4_hba.max_cfg_param.max_cq =
7466 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7467 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7468 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7469 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7470 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS
7471 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7472 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS
7473 phba->max_vports = phba->max_vpi;
7474 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS
7475 "2003 cfg params Extents? %d "
7476 "XRI(B:%d M:%d), "
da0436e9
JS
7477 "VPI(B:%d M:%d) "
7478 "VFI(B:%d M:%d) "
7479 "RPI(B:%d M:%d) "
2ea259ee 7480 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7481 phba->sli4_hba.extents_in_use,
da0436e9
JS
7482 phba->sli4_hba.max_cfg_param.xri_base,
7483 phba->sli4_hba.max_cfg_param.max_xri,
7484 phba->sli4_hba.max_cfg_param.vpi_base,
7485 phba->sli4_hba.max_cfg_param.max_vpi,
7486 phba->sli4_hba.max_cfg_param.vfi_base,
7487 phba->sli4_hba.max_cfg_param.max_vfi,
7488 phba->sli4_hba.max_cfg_param.rpi_base,
7489 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS
7490 phba->sli4_hba.max_cfg_param.max_fcfi,
7491 phba->sli4_hba.max_cfg_param.max_eq,
7492 phba->sli4_hba.max_cfg_param.max_cq,
7493 phba->sli4_hba.max_cfg_param.max_wq,
7494 phba->sli4_hba.max_cfg_param.max_rq);
7495
3772a991 7496 }
912e3acd
JS
7497
7498 if (rc)
7499 goto read_cfg_out;
da0436e9 7500
c691816e
JS
7501 /* Update link speed if forced link speed is supported */
7502 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7503 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7504 forced_link_speed =
7505 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7506 if (forced_link_speed) {
7507 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7508
7509 switch (forced_link_speed) {
7510 case LINK_SPEED_1G:
7511 phba->cfg_link_speed =
7512 LPFC_USER_LINK_SPEED_1G;
7513 break;
7514 case LINK_SPEED_2G:
7515 phba->cfg_link_speed =
7516 LPFC_USER_LINK_SPEED_2G;
7517 break;
7518 case LINK_SPEED_4G:
7519 phba->cfg_link_speed =
7520 LPFC_USER_LINK_SPEED_4G;
7521 break;
7522 case LINK_SPEED_8G:
7523 phba->cfg_link_speed =
7524 LPFC_USER_LINK_SPEED_8G;
7525 break;
7526 case LINK_SPEED_10G:
7527 phba->cfg_link_speed =
7528 LPFC_USER_LINK_SPEED_10G;
7529 break;
7530 case LINK_SPEED_16G:
7531 phba->cfg_link_speed =
7532 LPFC_USER_LINK_SPEED_16G;
7533 break;
7534 case LINK_SPEED_32G:
7535 phba->cfg_link_speed =
7536 LPFC_USER_LINK_SPEED_32G;
7537 break;
7538 case 0xffff:
7539 phba->cfg_link_speed =
7540 LPFC_USER_LINK_SPEED_AUTO;
7541 break;
7542 default:
7543 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7544 "0047 Unrecognized link "
7545 "speed : %d\n",
7546 forced_link_speed);
7547 phba->cfg_link_speed =
7548 LPFC_USER_LINK_SPEED_AUTO;
7549 }
7550 }
7551 }
7552
da0436e9 7553 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
7554 length = phba->sli4_hba.max_cfg_param.max_xri -
7555 lpfc_sli4_get_els_iocb_cnt(phba);
7556 if (phba->cfg_hba_queue_depth > length) {
7557 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7558 "3361 HBA queue depth changed from %d to %d\n",
7559 phba->cfg_hba_queue_depth, length);
7560 phba->cfg_hba_queue_depth = length;
7561 }
912e3acd
JS
7562
7563 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7564 LPFC_SLI_INTF_IF_TYPE_2)
7565 goto read_cfg_out;
7566
7567 /* get the pf# and vf# for SLI4 if_type 2 port */
7568 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7569 sizeof(struct lpfc_sli4_cfg_mhdr));
7570 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7571 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7572 length, LPFC_SLI4_MBX_EMBED);
7573
8aa134a8 7574 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS
7575 shdr = (union lpfc_sli4_cfg_shdr *)
7576 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7577 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7578 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7579 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS
7580 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7581 "3026 Mailbox failed , mbxCmd x%x "
7582 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7583 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7584 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS
7585 goto read_cfg_out;
7586 }
7587
7588 /* search for fc_fcoe resrouce descriptor */
7589 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7590
8aa134a8
JS
7591 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7592 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7593 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7594 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7595 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7596 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7597 goto read_cfg_out;
7598
912e3acd 7599 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7600 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7601 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7602 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS
7603 phba->sli4_hba.iov.pf_number =
7604 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7605 phba->sli4_hba.iov.vf_number =
7606 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7607 break;
7608 }
7609 }
7610
7611 if (i < LPFC_RSRC_DESC_MAX_NUM)
7612 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7613 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7614 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7615 phba->sli4_hba.iov.vf_number);
8aa134a8 7616 else
912e3acd
JS
7617 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7618 "3028 GET_FUNCTION_CONFIG: failed to find "
7619 "Resrouce Descriptor:x%x\n",
7620 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS
7621
7622read_cfg_out:
7623 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7624 return rc;
3772a991
JS
7625}
7626
7627/**
2fcee4bf 7628 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS
7629 * @phba: pointer to lpfc hba data structure.
7630 *
2fcee4bf
JS
7631 * This routine is invoked to setup the port-side endian order when
7632 * the port if_type is 0. This routine has no function for other
7633 * if_types.
da0436e9
JS
7634 *
7635 * Return codes
af901ca1 7636 * 0 - successful
25985edc 7637 * -ENOMEM - No available memory
d439d286 7638 * -EIO - The mailbox failed to complete successfully.
3772a991 7639 **/
da0436e9
JS
7640static int
7641lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7642{
da0436e9 7643 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7644 uint32_t if_type, rc = 0;
da0436e9
JS
7645 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7646 HOST_ENDIAN_HIGH_WORD1};
3772a991 7647
2fcee4bf
JS
7648 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7649 switch (if_type) {
7650 case LPFC_SLI_INTF_IF_TYPE_0:
7651 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7652 GFP_KERNEL);
7653 if (!mboxq) {
7654 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7655 "0492 Unable to allocate memory for "
7656 "issuing SLI_CONFIG_SPECIAL mailbox "
7657 "command\n");
7658 return -ENOMEM;
7659 }
3772a991 7660
2fcee4bf
JS
7661 /*
7662 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7663 * two words to contain special data values and no other data.
7664 */
7665 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7666 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7667 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7668 if (rc != MBX_SUCCESS) {
7669 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7670 "0493 SLI_CONFIG_SPECIAL mailbox "
7671 "failed with status x%x\n",
7672 rc);
7673 rc = -EIO;
7674 }
7675 mempool_free(mboxq, phba->mbox_mem_pool);
7676 break;
7677 case LPFC_SLI_INTF_IF_TYPE_2:
7678 case LPFC_SLI_INTF_IF_TYPE_1:
7679 default:
7680 break;
da0436e9 7681 }
da0436e9 7682 return rc;
3772a991
JS
7683}
7684
7685/**
895427bd 7686 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS
7687 * @phba: pointer to lpfc hba data structure.
7688 *
895427bd
JS
7689 * This routine is invoked to check the user settable queue counts for EQs.
7690 * After this routine is called the counts will be set to valid values that
5350d872
JS
7691 * adhere to the constraints of the system's interrupt vectors and the port's
7692 * queue resources.
da0436e9
JS
7693 *
7694 * Return codes
af901ca1 7695 * 0 - successful
25985edc 7696 * -ENOMEM - No available memory
3772a991 7697 **/
da0436e9 7698static int
5350d872 7699lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7700{
895427bd 7701 int io_channel;
1ba981fd 7702 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7703
da0436e9 7704 /*
67d12733 7705 * Sanity check for configured queue parameters against the run-time
da0436e9
JS
7706 * device parameters
7707 */
3772a991 7708
67d12733 7709 /* Sanity check on HBA EQ parameters */
895427bd 7710 io_channel = phba->io_channel_irqs;
67d12733 7711
895427bd 7712 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS
7713 lpfc_printf_log(phba,
7714 KERN_ERR, LOG_INIT,
90695ee0 7715 "3188 Reducing IO channels to match number of "
7bb03bbf 7716 "online CPUs: from %d to %d\n",
895427bd
JS
7717 io_channel, phba->sli4_hba.num_online_cpu);
7718 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS
7719 }
7720
895427bd 7721 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS
7722 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7723 "2575 Reducing IO channels to match number of "
7724 "available EQs: from %d to %d\n",
895427bd 7725 io_channel,
82c3e9ba 7726 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7727 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7728 }
67d12733 7729
895427bd
JS
7730 /* The actual number of FCP / NVME event queues adopted */
7731 if (io_channel != phba->io_channel_irqs)
7732 phba->io_channel_irqs = io_channel;
7733 if (phba->cfg_fcp_io_channel > io_channel)
7734 phba->cfg_fcp_io_channel = io_channel;
7735 if (phba->cfg_nvme_io_channel > io_channel)
7736 phba->cfg_nvme_io_channel = io_channel;
2d7dbc4c
JS
7737 if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq)
7738 phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
895427bd
JS
7739
7740 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2d7dbc4c 7741 "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n",
895427bd 7742 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
2d7dbc4c 7743 phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq);
3772a991 7744
da0436e9
JS
7745 /* Get EQ depth from module parameter, fake the default for now */
7746 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7747 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7748
5350d872
JS
7749 /* Get CQ depth from module parameter, fake the default for now */
7750 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7751 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS
7752 return 0;
7753}
7754
7755static int
7756lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7757{
7758 struct lpfc_queue *qdesc;
7759 int cnt;
5350d872 7760
895427bd
JS
7761 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7762 phba->sli4_hba.cq_ecount);
7763 if (!qdesc) {
7764 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7765 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7766 wqidx);
7767 return 1;
7768 }
7769 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
7770
7771 cnt = LPFC_NVME_WQSIZE;
7772 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_WQE128_SIZE, cnt);
7773 if (!qdesc) {
7774 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7775 "0509 Failed allocate fast-path NVME WQ (%d)\n",
7776 wqidx);
7777 return 1;
7778 }
7779 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
7780 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7781 return 0;
7782}
7783
7784static int
7785lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
7786{
7787 struct lpfc_queue *qdesc;
7788 uint32_t wqesize;
7789
7790 /* Create Fast Path FCP CQs */
7791 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7792 phba->sli4_hba.cq_ecount);
7793 if (!qdesc) {
7794 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7795 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
7796 return 1;
7797 }
7798 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
7799
7800 /* Create Fast Path FCP WQs */
7801 wqesize = (phba->fcp_embed_io) ?
7802 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
7803 qdesc = lpfc_sli4_queue_alloc(phba, wqesize, phba->sli4_hba.wq_ecount);
7804 if (!qdesc) {
7805 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7806 "0503 Failed allocate fast-path FCP WQ (%d)\n",
7807 wqidx);
7808 return 1;
7809 }
7810 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
7811 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 7812 return 0;
5350d872
JS
7813}
7814
7815/**
7816 * lpfc_sli4_queue_create - Create all the SLI4 queues
7817 * @phba: pointer to lpfc hba data structure.
7818 *
7819 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
7820 * operation. For each SLI4 queue type, the parameters such as queue entry
7821 * count (queue depth) shall be taken from the module parameter. For now,
7822 * we just use some constant number as place holder.
7823 *
7824 * Return codes
4907cb7b 7825 * 0 - successful
5350d872
JS
7826 * -ENOMEM - No availble memory
7827 * -EIO - The mailbox failed to complete successfully.
7828 **/
7829int
7830lpfc_sli4_queue_create(struct lpfc_hba *phba)
7831{
7832 struct lpfc_queue *qdesc;
2d7dbc4c 7833 int idx, io_channel, max;
5350d872
JS
7834
7835 /*
67d12733 7836 * Create HBA Record arrays.
895427bd 7837 * Both NVME and FCP will share that same vectors / EQs
5350d872 7838 */
895427bd
JS
7839 io_channel = phba->io_channel_irqs;
7840 if (!io_channel)
67d12733 7841 return -ERANGE;
5350d872 7842
67d12733
JS
7843 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
7844 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
7845 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
7846 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
7847 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
7848 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS
7849 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7850 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
7851 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7852 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 7853
895427bd
JS
7854 phba->sli4_hba.hba_eq = kcalloc(io_channel,
7855 sizeof(struct lpfc_queue *),
7856 GFP_KERNEL);
67d12733
JS
7857 if (!phba->sli4_hba.hba_eq) {
7858 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7859 "2576 Failed allocate memory for "
7860 "fast-path EQ record array\n");
7861 goto out_error;
7862 }
7863
895427bd
JS
7864 if (phba->cfg_fcp_io_channel) {
7865 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
7866 sizeof(struct lpfc_queue *),
7867 GFP_KERNEL);
7868 if (!phba->sli4_hba.fcp_cq) {
7869 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7870 "2577 Failed allocate memory for "
7871 "fast-path CQ record array\n");
7872 goto out_error;
7873 }
7874 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
7875 sizeof(struct lpfc_queue *),
7876 GFP_KERNEL);
7877 if (!phba->sli4_hba.fcp_wq) {
7878 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7879 "2578 Failed allocate memory for "
7880 "fast-path FCP WQ record array\n");
7881 goto out_error;
7882 }
7883 /*
7884 * Since the first EQ can have multiple CQs associated with it,
7885 * this array is used to quickly see if we have a FCP fast-path
7886 * CQ match.
7887 */
7888 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
7889 sizeof(uint16_t),
7890 GFP_KERNEL);
7891 if (!phba->sli4_hba.fcp_cq_map) {
7892 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7893 "2545 Failed allocate memory for "
7894 "fast-path CQ map\n");
7895 goto out_error;
7896 }
67d12733
JS
7897 }
7898
895427bd
JS
7899 if (phba->cfg_nvme_io_channel) {
7900 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
7901 sizeof(struct lpfc_queue *),
7902 GFP_KERNEL);
7903 if (!phba->sli4_hba.nvme_cq) {
7904 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7905 "6077 Failed allocate memory for "
7906 "fast-path CQ record array\n");
7907 goto out_error;
7908 }
da0436e9 7909
895427bd
JS
7910 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
7911 sizeof(struct lpfc_queue *),
7912 GFP_KERNEL);
7913 if (!phba->sli4_hba.nvme_wq) {
7914 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7915 "2581 Failed allocate memory for "
7916 "fast-path NVME WQ record array\n");
7917 goto out_error;
7918 }
7919
7920 /*
7921 * Since the first EQ can have multiple CQs associated with it,
7922 * this array is used to quickly see if we have a NVME fast-path
7923 * CQ match.
7924 */
7925 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
7926 sizeof(uint16_t),
7927 GFP_KERNEL);
7928 if (!phba->sli4_hba.nvme_cq_map) {
7929 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7930 "6078 Failed allocate memory for "
7931 "fast-path CQ map\n");
7932 goto out_error;
7933 }
2d7dbc4c
JS
7934
7935 if (phba->nvmet_support) {
7936 phba->sli4_hba.nvmet_cqset = kcalloc(
7937 phba->cfg_nvmet_mrq,
7938 sizeof(struct lpfc_queue *),
7939 GFP_KERNEL);
7940 if (!phba->sli4_hba.nvmet_cqset) {
7941 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7942 "3121 Fail allocate memory for "
7943 "fast-path CQ set array\n");
7944 goto out_error;
7945 }
7946 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
7947 phba->cfg_nvmet_mrq,
7948 sizeof(struct lpfc_queue *),
7949 GFP_KERNEL);
7950 if (!phba->sli4_hba.nvmet_mrq_hdr) {
7951 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7952 "3122 Fail allocate memory for "
7953 "fast-path RQ set hdr array\n");
7954 goto out_error;
7955 }
7956 phba->sli4_hba.nvmet_mrq_data = kcalloc(
7957 phba->cfg_nvmet_mrq,
7958 sizeof(struct lpfc_queue *),
7959 GFP_KERNEL);
7960 if (!phba->sli4_hba.nvmet_mrq_data) {
7961 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7962 "3124 Fail allocate memory for "
7963 "fast-path RQ set data array\n");
7964 goto out_error;
7965 }
7966 }
da0436e9 7967 }
67d12733 7968
895427bd 7969 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 7970
895427bd
JS
7971 /* Create HBA Event Queues (EQs) */
7972 for (idx = 0; idx < io_channel; idx++) {
67d12733 7973 /* Create EQs */
da0436e9
JS
7974 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
7975 phba->sli4_hba.eq_ecount);
7976 if (!qdesc) {
7977 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS
7978 "0497 Failed allocate EQ (%d)\n", idx);
7979 goto out_error;
da0436e9 7980 }
67d12733 7981 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 7982 }
67d12733 7983
895427bd 7984 /* FCP and NVME io channels are not required to be balanced */
67d12733 7985
895427bd
JS
7986 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
7987 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 7988 goto out_error;
da0436e9 7989
895427bd
JS
7990 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
7991 if (lpfc_alloc_nvme_wq_cq(phba, idx))
7992 goto out_error;
67d12733 7993
2d7dbc4c
JS
7994 /* allocate MRQ CQs */
7995 max = phba->cfg_nvme_io_channel;
7996 if (max < phba->cfg_nvmet_mrq)
7997 max = phba->cfg_nvmet_mrq;
7998
7999 for (idx = 0; idx < max; idx++)
8000 if (lpfc_alloc_nvme_wq_cq(phba, idx))
8001 goto out_error;
8002
8003 if (phba->nvmet_support) {
8004 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8005 qdesc = lpfc_sli4_queue_alloc(phba,
8006 phba->sli4_hba.cq_esize,
8007 phba->sli4_hba.cq_ecount);
8008 if (!qdesc) {
8009 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8010 "3142 Failed allocate NVME "
8011 "CQ Set (%d)\n", idx);
8012 goto out_error;
8013 }
8014 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
8015 }
8016 }
8017
da0436e9 8018 /*
67d12733 8019 * Create Slow Path Completion Queues (CQs)
da0436e9
JS
8020 */
8021
da0436e9
JS
8022 /* Create slow-path Mailbox Command Complete Queue */
8023 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8024 phba->sli4_hba.cq_ecount);
8025 if (!qdesc) {
8026 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8027 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 8028 goto out_error;
da0436e9
JS
8029 }
8030 phba->sli4_hba.mbx_cq = qdesc;
8031
8032 /* Create slow-path ELS Complete Queue */
8033 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8034 phba->sli4_hba.cq_ecount);
8035 if (!qdesc) {
8036 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8037 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 8038 goto out_error;
da0436e9
JS
8039 }
8040 phba->sli4_hba.els_cq = qdesc;
8041
da0436e9 8042
5350d872 8043 /*
67d12733 8044 * Create Slow Path Work Queues (WQs)
5350d872 8045 */
da0436e9
JS
8046
8047 /* Create Mailbox Command Queue */
da0436e9
JS
8048
8049 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.mq_esize,
8050 phba->sli4_hba.mq_ecount);
8051 if (!qdesc) {
8052 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8053 "0505 Failed allocate slow-path MQ\n");
67d12733 8054 goto out_error;
da0436e9
JS
8055 }
8056 phba->sli4_hba.mbx_wq = qdesc;
8057
8058 /*
67d12733 8059 * Create ELS Work Queues
da0436e9 8060 */
da0436e9
JS
8061
8062 /* Create slow-path ELS Work Queue */
8063 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8064 phba->sli4_hba.wq_ecount);
8065 if (!qdesc) {
8066 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8067 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8068 goto out_error;
da0436e9
JS
8069 }
8070 phba->sli4_hba.els_wq = qdesc;
895427bd
JS
8071 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8072
8073 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8074 /* Create NVME LS Complete Queue */
8075 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8076 phba->sli4_hba.cq_ecount);
8077 if (!qdesc) {
8078 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8079 "6079 Failed allocate NVME LS CQ\n");
8080 goto out_error;
8081 }
8082 phba->sli4_hba.nvmels_cq = qdesc;
8083
8084 /* Create NVME LS Work Queue */
8085 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8086 phba->sli4_hba.wq_ecount);
8087 if (!qdesc) {
8088 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8089 "6080 Failed allocate NVME LS WQ\n");
8090 goto out_error;
8091 }
8092 phba->sli4_hba.nvmels_wq = qdesc;
8093 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8094 }
da0436e9 8095
da0436e9
JS
8096 /*
8097 * Create Receive Queue (RQ)
8098 */
da0436e9
JS
8099
8100 /* Create Receive Queue for header */
8101 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8102 phba->sli4_hba.rq_ecount);
8103 if (!qdesc) {
8104 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8105 "0506 Failed allocate receive HRQ\n");
67d12733 8106 goto out_error;
da0436e9
JS
8107 }
8108 phba->sli4_hba.hdr_rq = qdesc;
8109
8110 /* Create Receive Queue for data */
8111 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8112 phba->sli4_hba.rq_ecount);
8113 if (!qdesc) {
8114 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8115 "0507 Failed allocate receive DRQ\n");
67d12733 8116 goto out_error;
da0436e9
JS
8117 }
8118 phba->sli4_hba.dat_rq = qdesc;
8119
2d7dbc4c
JS
8120 if (phba->nvmet_support) {
8121 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8122 /* Create NVMET Receive Queue for header */
8123 qdesc = lpfc_sli4_queue_alloc(phba,
8124 phba->sli4_hba.rq_esize,
8125 phba->sli4_hba.rq_ecount);
8126 if (!qdesc) {
8127 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8128 "3146 Failed allocate "
8129 "receive HRQ\n");
8130 goto out_error;
8131 }
8132 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
8133
8134 /* Only needed for header of RQ pair */
8135 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
8136 GFP_KERNEL);
8137 if (qdesc->rqbp == NULL) {
8138 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8139 "6131 Failed allocate "
8140 "Header RQBP\n");
8141 goto out_error;
8142 }
8143
8144 /* Create NVMET Receive Queue for data */
8145 qdesc = lpfc_sli4_queue_alloc(phba,
8146 phba->sli4_hba.rq_esize,
8147 phba->sli4_hba.rq_ecount);
8148 if (!qdesc) {
8149 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8150 "3156 Failed allocate "
8151 "receive DRQ\n");
8152 goto out_error;
8153 }
8154 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
8155 }
8156 }
8157
1ba981fd
JS
8158 /* Create the Queues needed for Flash Optimized Fabric operations */
8159 if (phba->cfg_fof)
8160 lpfc_fof_queue_create(phba);
da0436e9
JS
8161 return 0;
8162
da0436e9 8163out_error:
67d12733 8164 lpfc_sli4_queue_destroy(phba);
da0436e9
JS
8165 return -ENOMEM;
8166}
8167
895427bd
JS
8168static inline void
8169__lpfc_sli4_release_queue(struct lpfc_queue **qp)
8170{
8171 if (*qp != NULL) {
8172 lpfc_sli4_queue_free(*qp);
8173 *qp = NULL;
8174 }
8175}
8176
8177static inline void
8178lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
8179{
8180 int idx;
8181
8182 if (*qs == NULL)
8183 return;
8184
8185 for (idx = 0; idx < max; idx++)
8186 __lpfc_sli4_release_queue(&(*qs)[idx]);
8187
8188 kfree(*qs);
8189 *qs = NULL;
8190}
8191
8192static inline void
8193lpfc_sli4_release_queue_map(uint16_t **qmap)
8194{
8195 if (*qmap != NULL) {
8196 kfree(*qmap);
8197 *qmap = NULL;
8198 }
8199}
8200
da0436e9
JS
8201/**
8202 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
8203 * @phba: pointer to lpfc hba data structure.
8204 *
8205 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
8206 * operation.
8207 *
8208 * Return codes
af901ca1 8209 * 0 - successful
25985edc 8210 * -ENOMEM - No available memory
d439d286 8211 * -EIO - The mailbox failed to complete successfully.
da0436e9 8212 **/
5350d872 8213void
da0436e9
JS
8214lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
8215{
1ba981fd
JS
8216 if (phba->cfg_fof)
8217 lpfc_fof_queue_destroy(phba);
8218
895427bd
JS
8219 /* Release HBA eqs */
8220 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
8221
8222 /* Release FCP cqs */
8223 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
8224 phba->cfg_fcp_io_channel);
8225
8226 /* Release FCP wqs */
8227 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
8228 phba->cfg_fcp_io_channel);
8229
8230 /* Release FCP CQ mapping array */
8231 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
8232
8233 /* Release NVME cqs */
8234 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
8235 phba->cfg_nvme_io_channel);
8236
8237 /* Release NVME wqs */
8238 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
8239 phba->cfg_nvme_io_channel);
8240
8241 /* Release NVME CQ mapping array */
8242 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
8243
2d7dbc4c
JS
8244 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
8245 phba->cfg_nvmet_mrq);
8246
8247 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
8248 phba->cfg_nvmet_mrq);
8249 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
8250 phba->cfg_nvmet_mrq);
8251
895427bd
JS
8252 /* Release mailbox command work queue */
8253 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
8254
8255 /* Release ELS work queue */
8256 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
8257
8258 /* Release ELS work queue */
8259 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
8260
8261 /* Release unsolicited receive queue */
8262 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
8263 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
8264
8265 /* Release ELS complete queue */
8266 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
8267
8268 /* Release NVME LS complete queue */
8269 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
8270
8271 /* Release mailbox command complete queue */
8272 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
8273
8274 /* Everything on this list has been freed */
8275 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8276}
8277
8278int
8279lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
8280 struct lpfc_queue *drq, int count)
8281{
8282 int rc, i;
8283 struct lpfc_rqe hrqe;
8284 struct lpfc_rqe drqe;
8285 struct lpfc_rqb *rqbp;
8286 struct rqb_dmabuf *rqb_buffer;
8287 LIST_HEAD(rqb_buf_list);
8288
8289 rqbp = hrq->rqbp;
8290 for (i = 0; i < count; i++) {
8291 rqb_buffer = (rqbp->rqb_alloc_buffer)(phba);
8292 if (!rqb_buffer)
8293 break;
8294 rqb_buffer->hrq = hrq;
8295 rqb_buffer->drq = drq;
8296 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
8297 }
8298 while (!list_empty(&rqb_buf_list)) {
8299 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
8300 hbuf.list);
8301
8302 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
8303 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
8304 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
8305 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
8306 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
8307 if (rc < 0) {
8308 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8309 } else {
8310 list_add_tail(&rqb_buffer->hbuf.list,
8311 &rqbp->rqb_buffer_list);
8312 rqbp->buffer_count++;
67d12733 8313 }
67d12733 8314 }
895427bd
JS
8315 return 1;
8316}
67d12733 8317
895427bd
JS
8318int
8319lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
8320{
8321 struct lpfc_rqb *rqbp;
8322 struct lpfc_dmabuf *h_buf;
8323 struct rqb_dmabuf *rqb_buffer;
8324
8325 rqbp = rq->rqbp;
8326 while (!list_empty(&rqbp->rqb_buffer_list)) {
8327 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
8328 struct lpfc_dmabuf, list);
8329
8330 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
8331 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8332 rqbp->buffer_count--;
67d12733 8333 }
895427bd
JS
8334 return 1;
8335}
67d12733 8336
895427bd
JS
8337static int
8338lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
8339 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
8340 int qidx, uint32_t qtype)
8341{
8342 struct lpfc_sli_ring *pring;
8343 int rc;
8344
8345 if (!eq || !cq || !wq) {
8346 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8347 "6085 Fast-path %s (%d) not allocated\n",
8348 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
8349 return -ENOMEM;
8350 }
8351
8352 /* create the Cq first */
8353 rc = lpfc_cq_create(phba, cq, eq,
8354 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
8355 if (rc) {
8356 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8357 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
8358 qidx, (uint32_t)rc);
8359 return rc;
67d12733
JS
8360 }
8361
895427bd
JS
8362 if (qtype != LPFC_MBOX) {
8363 /* Setup nvme_cq_map for fast lookup */
8364 if (cq_map)
8365 *cq_map = cq->queue_id;
da0436e9 8366
895427bd
JS
8367 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8368 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8369 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8370
895427bd
JS
8371 /* create the wq */
8372 rc = lpfc_wq_create(phba, wq, cq, qtype);
8373 if (rc) {
8374 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8375 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8376 qidx, (uint32_t)rc);
8377 /* no need to tear down cq - caller will do so */
8378 return rc;
8379 }
da0436e9 8380
895427bd
JS
8381 /* Bind this CQ/WQ to the NVME ring */
8382 pring = wq->pring;
8383 pring->sli.sli4.wqp = (void *)wq;
8384 cq->pring = pring;
da0436e9 8385
895427bd
JS
8386 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8387 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8388 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8389 } else {
8390 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8391 if (rc) {
8392 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8393 "0539 Failed setup of slow-path MQ: "
8394 "rc = 0x%x\n", rc);
8395 /* no need to tear down cq - caller will do so */
8396 return rc;
8397 }
da0436e9 8398
895427bd
JS
8399 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8400 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8401 phba->sli4_hba.mbx_wq->queue_id,
8402 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8403 }
da0436e9 8404
895427bd 8405 return 0;
da0436e9
JS
8406}
8407
8408/**
8409 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8410 * @phba: pointer to lpfc hba data structure.
8411 *
8412 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8413 * operation.
8414 *
8415 * Return codes
af901ca1 8416 * 0 - successful
25985edc 8417 * -ENOMEM - No available memory
d439d286 8418 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8419 **/
8420int
8421lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8422{
962bc51b
JS
8423 uint32_t shdr_status, shdr_add_status;
8424 union lpfc_sli4_cfg_shdr *shdr;
8425 LPFC_MBOXQ_t *mboxq;
895427bd
JS
8426 int qidx;
8427 uint32_t length, io_channel;
8428 int rc = -ENOMEM;
962bc51b
JS
8429
8430 /* Check for dual-ULP support */
8431 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8432 if (!mboxq) {
8433 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8434 "3249 Unable to allocate memory for "
8435 "QUERY_FW_CFG mailbox command\n");
8436 return -ENOMEM;
8437 }
8438 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8439 sizeof(struct lpfc_sli4_cfg_mhdr));
8440 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8441 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8442 length, LPFC_SLI4_MBX_EMBED);
8443
8444 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8445
8446 shdr = (union lpfc_sli4_cfg_shdr *)
8447 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8448 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8449 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8450 if (shdr_status || shdr_add_status || rc) {
8451 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8452 "3250 QUERY_FW_CFG mailbox failed with status "
8453 "x%x add_status x%x, mbx status x%x\n",
8454 shdr_status, shdr_add_status, rc);
8455 if (rc != MBX_TIMEOUT)
8456 mempool_free(mboxq, phba->mbox_mem_pool);
8457 rc = -ENXIO;
8458 goto out_error;
8459 }
8460
8461 phba->sli4_hba.fw_func_mode =
8462 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8463 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8464 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS
8465 phba->sli4_hba.physical_port =
8466 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS
8467 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8468 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8469 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8470 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8471
8472 if (rc != MBX_TIMEOUT)
8473 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS
8474
8475 /*
67d12733 8476 * Set up HBA Event Queues (EQs)
da0436e9 8477 */
895427bd 8478 io_channel = phba->io_channel_irqs;
da0436e9 8479
67d12733 8480 /* Set up HBA event queue */
895427bd 8481 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS
8482 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8483 "3147 Fast-path EQs not allocated\n");
1b51197d 8484 rc = -ENOMEM;
67d12733 8485 goto out_error;
2e90f4b5 8486 }
895427bd
JS
8487 for (qidx = 0; qidx < io_channel; qidx++) {
8488 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS
8489 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8490 "0522 Fast-path EQ (%d) not "
895427bd 8491 "allocated\n", qidx);
1b51197d 8492 rc = -ENOMEM;
895427bd 8493 goto out_destroy;
da0436e9 8494 }
895427bd
JS
8495 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8496 phba->cfg_fcp_imax);
da0436e9
JS
8497 if (rc) {
8498 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8499 "0523 Failed setup of fast-path EQ "
895427bd 8500 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8501 (uint32_t)rc);
895427bd 8502 goto out_destroy;
da0436e9
JS
8503 }
8504 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS
8505 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8506 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS
8507 }
8508
895427bd
JS
8509 if (phba->cfg_nvme_io_channel) {
8510 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8511 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8512 "6084 Fast-path NVME %s array not allocated\n",
8513 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8514 rc = -ENOMEM;
895427bd 8515 goto out_destroy;
67d12733
JS
8516 }
8517
895427bd
JS
8518 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8519 rc = lpfc_create_wq_cq(phba,
8520 phba->sli4_hba.hba_eq[
8521 qidx % io_channel],
8522 phba->sli4_hba.nvme_cq[qidx],
8523 phba->sli4_hba.nvme_wq[qidx],
8524 &phba->sli4_hba.nvme_cq_map[qidx],
8525 qidx, LPFC_NVME);
8526 if (rc) {
8527 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8528 "6123 Failed to setup fastpath "
8529 "NVME WQ/CQ (%d), rc = 0x%x\n",
8530 qidx, (uint32_t)rc);
8531 goto out_destroy;
8532 }
8533 }
67d12733
JS
8534 }
8535
895427bd
JS
8536 if (phba->cfg_fcp_io_channel) {
8537 /* Set up fast-path FCP Response Complete Queue */
8538 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8539 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8540 "3148 Fast-path FCP %s array not allocated\n",
8541 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8542 rc = -ENOMEM;
895427bd 8543 goto out_destroy;
67d12733
JS
8544 }
8545
895427bd
JS
8546 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8547 rc = lpfc_create_wq_cq(phba,
8548 phba->sli4_hba.hba_eq[
8549 qidx % io_channel],
8550 phba->sli4_hba.fcp_cq[qidx],
8551 phba->sli4_hba.fcp_wq[qidx],
8552 &phba->sli4_hba.fcp_cq_map[qidx],
8553 qidx, LPFC_FCP);
8554 if (rc) {
8555 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8556 "0535 Failed to setup fastpath "
8557 "FCP WQ/CQ (%d), rc = 0x%x\n",
8558 qidx, (uint32_t)rc);
8559 goto out_destroy;
8560 }
8561 }
67d12733 8562 }
895427bd 8563
da0436e9 8564 /*
895427bd 8565 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS
8566 */
8567
895427bd 8568 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8569
895427bd 8570 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8571 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8572 "0528 %s not allocated\n",
8573 phba->sli4_hba.mbx_cq ?
8574 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8575 rc = -ENOMEM;
895427bd 8576 goto out_destroy;
da0436e9 8577 }
da0436e9 8578
895427bd
JS
8579 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8580 phba->sli4_hba.mbx_cq,
8581 phba->sli4_hba.mbx_wq,
8582 NULL, 0, LPFC_MBOX);
da0436e9
JS
8583 if (rc) {
8584 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8585 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8586 (uint32_t)rc);
8587 goto out_destroy;
da0436e9 8588 }
2d7dbc4c
JS
8589 if (phba->nvmet_support) {
8590 if (!phba->sli4_hba.nvmet_cqset) {
8591 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8592 "3165 Fast-path NVME CQ Set "
8593 "array not allocated\n");
8594 rc = -ENOMEM;
8595 goto out_destroy;
8596 }
8597 if (phba->cfg_nvmet_mrq > 1) {
8598 rc = lpfc_cq_create_set(phba,
8599 phba->sli4_hba.nvmet_cqset,
8600 phba->sli4_hba.hba_eq,
8601 LPFC_WCQ, LPFC_NVMET);
8602 if (rc) {
8603 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8604 "3164 Failed setup of NVME CQ "
8605 "Set, rc = 0x%x\n",
8606 (uint32_t)rc);
8607 goto out_destroy;
8608 }
8609 } else {
8610 /* Set up NVMET Receive Complete Queue */
8611 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
8612 phba->sli4_hba.hba_eq[0],
8613 LPFC_WCQ, LPFC_NVMET);
8614 if (rc) {
8615 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8616 "6089 Failed setup NVMET CQ: "
8617 "rc = 0x%x\n", (uint32_t)rc);
8618 goto out_destroy;
8619 }
8620 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8621 "6090 NVMET CQ setup: cq-id=%d, "
8622 "parent eq-id=%d\n",
8623 phba->sli4_hba.nvmet_cqset[0]->queue_id,
8624 phba->sli4_hba.hba_eq[0]->queue_id);
8625 }
8626 }
da0436e9 8627
895427bd
JS
8628 /* Set up slow-path ELS WQ/CQ */
8629 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8630 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8631 "0530 ELS %s not allocated\n",
8632 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8633 rc = -ENOMEM;
895427bd 8634 goto out_destroy;
da0436e9 8635 }
895427bd
JS
8636 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8637 phba->sli4_hba.els_cq,
8638 phba->sli4_hba.els_wq,
8639 NULL, 0, LPFC_ELS);
da0436e9
JS
8640 if (rc) {
8641 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8642 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8643 (uint32_t)rc);
8644 goto out_destroy;
da0436e9
JS
8645 }
8646 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8647 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8648 phba->sli4_hba.els_wq->queue_id,
8649 phba->sli4_hba.els_cq->queue_id);
8650
895427bd
JS
8651 if (phba->cfg_nvme_io_channel) {
8652 /* Set up NVME LS Complete Queue */
8653 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8654 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8655 "6091 LS %s not allocated\n",
8656 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8657 rc = -ENOMEM;
8658 goto out_destroy;
8659 }
8660 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8661 phba->sli4_hba.nvmels_cq,
8662 phba->sli4_hba.nvmels_wq,
8663 NULL, 0, LPFC_NVME_LS);
8664 if (rc) {
8665 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8666 "0529 Failed setup of NVVME LS WQ/CQ: "
8667 "rc = 0x%x\n", (uint32_t)rc);
8668 goto out_destroy;
8669 }
8670
8671 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8672 "6096 ELS WQ setup: wq-id=%d, "
8673 "parent cq-id=%d\n",
8674 phba->sli4_hba.nvmels_wq->queue_id,
8675 phba->sli4_hba.nvmels_cq->queue_id);
8676 }
8677
2d7dbc4c
JS
8678 /*
8679 * Create NVMET Receive Queue (RQ)
8680 */
8681 if (phba->nvmet_support) {
8682 if ((!phba->sli4_hba.nvmet_cqset) ||
8683 (!phba->sli4_hba.nvmet_mrq_hdr) ||
8684 (!phba->sli4_hba.nvmet_mrq_data)) {
8685 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8686 "6130 MRQ CQ Queues not "
8687 "allocated\n");
8688 rc = -ENOMEM;
8689 goto out_destroy;
8690 }
8691 if (phba->cfg_nvmet_mrq > 1) {
8692 rc = lpfc_mrq_create(phba,
8693 phba->sli4_hba.nvmet_mrq_hdr,
8694 phba->sli4_hba.nvmet_mrq_data,
8695 phba->sli4_hba.nvmet_cqset,
8696 LPFC_NVMET);
8697 if (rc) {
8698 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8699 "6098 Failed setup of NVMET "
8700 "MRQ: rc = 0x%x\n",
8701 (uint32_t)rc);
8702 goto out_destroy;
8703 }
8704
8705 } else {
8706 rc = lpfc_rq_create(phba,
8707 phba->sli4_hba.nvmet_mrq_hdr[0],
8708 phba->sli4_hba.nvmet_mrq_data[0],
8709 phba->sli4_hba.nvmet_cqset[0],
8710 LPFC_NVMET);
8711 if (rc) {
8712 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8713 "6057 Failed setup of NVMET "
8714 "Receive Queue: rc = 0x%x\n",
8715 (uint32_t)rc);
8716 goto out_destroy;
8717 }
8718
8719 lpfc_printf_log(
8720 phba, KERN_INFO, LOG_INIT,
8721 "6099 NVMET RQ setup: hdr-rq-id=%d, "
8722 "dat-rq-id=%d parent cq-id=%d\n",
8723 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
8724 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
8725 phba->sli4_hba.nvmet_cqset[0]->queue_id);
8726
8727 }
8728 }
8729
da0436e9
JS
8730 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8731 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8732 "0540 Receive Queue not allocated\n");
1b51197d 8733 rc = -ENOMEM;
895427bd 8734 goto out_destroy;
da0436e9 8735 }
73d91e50
JS
8736
8737 lpfc_rq_adjust_repost(phba, phba->sli4_hba.hdr_rq, LPFC_ELS_HBQ);
8738 lpfc_rq_adjust_repost(phba, phba->sli4_hba.dat_rq, LPFC_ELS_HBQ);
8739
da0436e9 8740 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8741 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS
8742 if (rc) {
8743 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8744 "0541 Failed setup of Receive Queue: "
a2fc4aef 8745 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8746 goto out_destroy;
da0436e9 8747 }
73d91e50 8748
da0436e9
JS
8749 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8750 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8751 "parent cq-id=%d\n",
8752 phba->sli4_hba.hdr_rq->queue_id,
8753 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8754 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS
8755
8756 if (phba->cfg_fof) {
8757 rc = lpfc_fof_queue_setup(phba);
8758 if (rc) {
8759 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8760 "0549 Failed setup of FOF Queues: "
8761 "rc = 0x%x\n", rc);
895427bd 8762 goto out_destroy;
1ba981fd
JS
8763 }
8764 }
2c9c5a00 8765
43140ca6 8766 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
895427bd 8767 lpfc_modify_hba_eq_delay(phba, qidx);
43140ca6 8768
da0436e9
JS
8769 return 0;
8770
895427bd
JS
8771out_destroy:
8772 lpfc_sli4_queue_unset(phba);
da0436e9
JS
8773out_error:
8774 return rc;
8775}
8776
8777/**
8778 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8779 * @phba: pointer to lpfc hba data structure.
8780 *
8781 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8782 * operation.
8783 *
8784 * Return codes
af901ca1 8785 * 0 - successful
25985edc 8786 * -ENOMEM - No available memory
d439d286 8787 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8788 **/
8789void
8790lpfc_sli4_queue_unset(struct lpfc_hba *phba)
8791{
895427bd 8792 int qidx;
da0436e9 8793
1ba981fd
JS
8794 /* Unset the queues created for Flash Optimized Fabric operations */
8795 if (phba->cfg_fof)
8796 lpfc_fof_queue_destroy(phba);
895427bd 8797
da0436e9 8798 /* Unset mailbox command work queue */
895427bd
JS
8799 if (phba->sli4_hba.mbx_wq)
8800 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
8801
8802 /* Unset NVME LS work queue */
8803 if (phba->sli4_hba.nvmels_wq)
8804 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
8805
da0436e9 8806 /* Unset ELS work queue */
895427bd
JS
8807 if (phba->sli4_hba.els_cq)
8808 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
8809
da0436e9 8810 /* Unset unsolicited receive queue */
895427bd
JS
8811 if (phba->sli4_hba.hdr_rq)
8812 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
8813 phba->sli4_hba.dat_rq);
8814
da0436e9 8815 /* Unset FCP work queue */
895427bd
JS
8816 if (phba->sli4_hba.fcp_wq)
8817 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8818 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
8819
8820 /* Unset NVME work queue */
8821 if (phba->sli4_hba.nvme_wq) {
8822 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8823 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 8824 }
895427bd 8825
da0436e9 8826 /* Unset mailbox command complete queue */
895427bd
JS
8827 if (phba->sli4_hba.mbx_cq)
8828 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
8829
da0436e9 8830 /* Unset ELS complete queue */
895427bd
JS
8831 if (phba->sli4_hba.els_cq)
8832 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
8833
8834 /* Unset NVME LS complete queue */
8835 if (phba->sli4_hba.nvmels_cq)
8836 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
8837
8838 /* Unset NVME response complete queue */
8839 if (phba->sli4_hba.nvme_cq)
8840 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8841 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
8842
2d7dbc4c
JS
8843 /* Unset NVMET MRQ queue */
8844 if (phba->sli4_hba.nvmet_mrq_hdr) {
8845 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8846 lpfc_rq_destroy(phba,
8847 phba->sli4_hba.nvmet_mrq_hdr[qidx],
8848 phba->sli4_hba.nvmet_mrq_data[qidx]);
8849 }
8850
8851 /* Unset NVMET CQ Set complete queue */
8852 if (phba->sli4_hba.nvmet_cqset) {
8853 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8854 lpfc_cq_destroy(phba,
8855 phba->sli4_hba.nvmet_cqset[qidx]);
8856 }
8857
da0436e9 8858 /* Unset FCP response complete queue */
895427bd
JS
8859 if (phba->sli4_hba.fcp_cq)
8860 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8861 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
8862
da0436e9 8863 /* Unset fast-path event queue */
895427bd
JS
8864 if (phba->sli4_hba.hba_eq)
8865 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
8866 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS
8867}
8868
8869/**
8870 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
8871 * @phba: pointer to lpfc hba data structure.
8872 *
8873 * This routine is invoked to allocate and set up a pool of completion queue
8874 * events. The body of the completion queue event is a completion queue entry
8875 * CQE. For now, this pool is used for the interrupt service routine to queue
8876 * the following HBA completion queue events for the worker thread to process:
8877 * - Mailbox asynchronous events
8878 * - Receive queue completion unsolicited events
8879 * Later, this can be used for all the slow-path events.
8880 *
8881 * Return codes
af901ca1 8882 * 0 - successful
25985edc 8883 * -ENOMEM - No available memory
da0436e9
JS
8884 **/
8885static int
8886lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
8887{
8888 struct lpfc_cq_event *cq_event;
8889 int i;
8890
8891 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
8892 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
8893 if (!cq_event)
8894 goto out_pool_create_fail;
8895 list_add_tail(&cq_event->list,
8896 &phba->sli4_hba.sp_cqe_event_pool);
8897 }
8898 return 0;
8899
8900out_pool_create_fail:
8901 lpfc_sli4_cq_event_pool_destroy(phba);
8902 return -ENOMEM;
8903}
8904
8905/**
8906 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
8907 * @phba: pointer to lpfc hba data structure.
8908 *
8909 * This routine is invoked to free the pool of completion queue events at
8910 * driver unload time. Note that, it is the responsibility of the driver
8911 * cleanup routine to free all the outstanding completion-queue events
8912 * allocated from this pool back into the pool before invoking this routine
8913 * to destroy the pool.
8914 **/
8915static void
8916lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
8917{
8918 struct lpfc_cq_event *cq_event, *next_cq_event;
8919
8920 list_for_each_entry_safe(cq_event, next_cq_event,
8921 &phba->sli4_hba.sp_cqe_event_pool, list) {
8922 list_del(&cq_event->list);
8923 kfree(cq_event);
8924 }
8925}
8926
8927/**
8928 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
8929 * @phba: pointer to lpfc hba data structure.
8930 *
8931 * This routine is the lock free version of the API invoked to allocate a
8932 * completion-queue event from the free pool.
8933 *
8934 * Return: Pointer to the newly allocated completion-queue event if successful
8935 * NULL otherwise.
8936 **/
8937struct lpfc_cq_event *
8938__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8939{
8940 struct lpfc_cq_event *cq_event = NULL;
8941
8942 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
8943 struct lpfc_cq_event, list);
8944 return cq_event;
8945}
8946
8947/**
8948 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
8949 * @phba: pointer to lpfc hba data structure.
8950 *
8951 * This routine is the lock version of the API invoked to allocate a
8952 * completion-queue event from the free pool.
8953 *
8954 * Return: Pointer to the newly allocated completion-queue event if successful
8955 * NULL otherwise.
8956 **/
8957struct lpfc_cq_event *
8958lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8959{
8960 struct lpfc_cq_event *cq_event;
8961 unsigned long iflags;
8962
8963 spin_lock_irqsave(&phba->hbalock, iflags);
8964 cq_event = __lpfc_sli4_cq_event_alloc(phba);
8965 spin_unlock_irqrestore(&phba->hbalock, iflags);
8966 return cq_event;
8967}
8968
8969/**
8970 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
8971 * @phba: pointer to lpfc hba data structure.
8972 * @cq_event: pointer to the completion queue event to be freed.
8973 *
8974 * This routine is the lock free version of the API invoked to release a
8975 * completion-queue event back into the free pool.
8976 **/
8977void
8978__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8979 struct lpfc_cq_event *cq_event)
8980{
8981 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
8982}
8983
8984/**
8985 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
8986 * @phba: pointer to lpfc hba data structure.
8987 * @cq_event: pointer to the completion queue event to be freed.
8988 *
8989 * This routine is the lock version of the API invoked to release a
8990 * completion-queue event back into the free pool.
8991 **/
8992void
8993lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8994 struct lpfc_cq_event *cq_event)
8995{
8996 unsigned long iflags;
8997 spin_lock_irqsave(&phba->hbalock, iflags);
8998 __lpfc_sli4_cq_event_release(phba, cq_event);
8999 spin_unlock_irqrestore(&phba->hbalock, iflags);
9000}
9001
9002/**
9003 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9004 * @phba: pointer to lpfc hba data structure.
9005 *
9006 * This routine is to free all the pending completion-queue events to the
9007 * back into the free pool for device reset.
9008 **/
9009static void
9010lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9011{
9012 LIST_HEAD(cqelist);
9013 struct lpfc_cq_event *cqe;
9014 unsigned long iflags;
9015
9016 /* Retrieve all the pending WCQEs from pending WCQE lists */
9017 spin_lock_irqsave(&phba->hbalock, iflags);
9018 /* Pending FCP XRI abort events */
9019 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9020 &cqelist);
9021 /* Pending ELS XRI abort events */
9022 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9023 &cqelist);
318083ad
JS
9024 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
9025 /* Pending NVME XRI abort events */
9026 list_splice_init(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue,
9027 &cqelist);
9028 }
da0436e9
JS
9029 /* Pending asynnc events */
9030 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9031 &cqelist);
9032 spin_unlock_irqrestore(&phba->hbalock, iflags);
9033
9034 while (!list_empty(&cqelist)) {
9035 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9036 lpfc_sli4_cq_event_release(phba, cqe);
9037 }
9038}
9039
9040/**
9041 * lpfc_pci_function_reset - Reset pci function.
9042 * @phba: pointer to lpfc hba data structure.
9043 *
9044 * This routine is invoked to request a PCI function reset. It will destroys
9045 * all resources assigned to the PCI function which originates this request.
9046 *
9047 * Return codes
af901ca1 9048 * 0 - successful
25985edc 9049 * -ENOMEM - No available memory
d439d286 9050 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
9051 **/
9052int
9053lpfc_pci_function_reset(struct lpfc_hba *phba)
9054{
9055 LPFC_MBOXQ_t *mboxq;
2fcee4bf 9056 uint32_t rc = 0, if_type;
da0436e9 9057 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS
9058 uint32_t rdy_chk;
9059 uint32_t port_reset = 0;
da0436e9 9060 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9061 struct lpfc_register reg_data;
2b81f942 9062 uint16_t devid;
da0436e9 9063
2fcee4bf
JS
9064 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9065 switch (if_type) {
9066 case LPFC_SLI_INTF_IF_TYPE_0:
9067 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9068 GFP_KERNEL);
9069 if (!mboxq) {
9070 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9071 "0494 Unable to allocate memory for "
9072 "issuing SLI_FUNCTION_RESET mailbox "
9073 "command\n");
9074 return -ENOMEM;
9075 }
da0436e9 9076
2fcee4bf
JS
9077 /* Setup PCI function reset mailbox-ioctl command */
9078 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9079 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9080 LPFC_SLI4_MBX_EMBED);
9081 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9082 shdr = (union lpfc_sli4_cfg_shdr *)
9083 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9084 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9085 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9086 &shdr->response);
9087 if (rc != MBX_TIMEOUT)
9088 mempool_free(mboxq, phba->mbox_mem_pool);
9089 if (shdr_status || shdr_add_status || rc) {
9090 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9091 "0495 SLI_FUNCTION_RESET mailbox "
9092 "failed with status x%x add_status x%x,"
9093 " mbx status x%x\n",
9094 shdr_status, shdr_add_status, rc);
9095 rc = -ENXIO;
9096 }
9097 break;
9098 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS
9099wait:
9100 /*
9101 * Poll the Port Status Register and wait for RDY for
9102 * up to 30 seconds. If the port doesn't respond, treat
9103 * it as an error.
9104 */
77d093fb 9105 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS
9106 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9107 STATUSregaddr, &reg_data.word0)) {
9108 rc = -ENODEV;
9109 goto out;
9110 }
9111 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9112 break;
9113 msleep(20);
9114 }
9115
9116 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9117 phba->work_status[0] = readl(
9118 phba->sli4_hba.u.if_type2.ERR1regaddr);
9119 phba->work_status[1] = readl(
9120 phba->sli4_hba.u.if_type2.ERR2regaddr);
9121 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9122 "2890 Port not ready, port status reg "
9123 "0x%x error 1=0x%x, error 2=0x%x\n",
9124 reg_data.word0,
9125 phba->work_status[0],
9126 phba->work_status[1]);
9127 rc = -ENODEV;
9128 goto out;
9129 }
9130
9131 if (!port_reset) {
9132 /*
9133 * Reset the port now
9134 */
2fcee4bf
JS
9135 reg_data.word0 = 0;
9136 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9137 LPFC_SLIPORT_LITTLE_ENDIAN);
9138 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9139 LPFC_SLIPORT_INIT_PORT);
9140 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
9141 CTRLregaddr);
8fcb8acd 9142 /* flush */
2b81f942
JS
9143 pci_read_config_word(phba->pcidev,
9144 PCI_DEVICE_ID, &devid);
2fcee4bf 9145
2f6fa2c9
JS
9146 port_reset = 1;
9147 msleep(20);
9148 goto wait;
9149 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
9150 rc = -ENODEV;
9151 goto out;
2fcee4bf
JS
9152 }
9153 break;
2f6fa2c9 9154
2fcee4bf
JS
9155 case LPFC_SLI_INTF_IF_TYPE_1:
9156 default:
9157 break;
da0436e9 9158 }
2fcee4bf 9159
73d91e50 9160out:
2fcee4bf 9161 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 9162 if (rc) {
229adb0e
JS
9163 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9164 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 9165 "try: echo fw_reset > board_mode\n");
2fcee4bf 9166 rc = -ENODEV;
229adb0e 9167 }
2fcee4bf 9168
da0436e9
JS
9169 return rc;
9170}
9171
da0436e9
JS
9172/**
9173 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
9174 * @phba: pointer to lpfc hba data structure.
9175 *
9176 * This routine is invoked to set up the PCI device memory space for device
9177 * with SLI-4 interface spec.
9178 *
9179 * Return codes
af901ca1 9180 * 0 - successful
da0436e9
JS
9181 * other values - error
9182 **/
9183static int
9184lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
9185{
9186 struct pci_dev *pdev;
9187 unsigned long bar0map_len, bar1map_len, bar2map_len;
9188 int error = -ENODEV;
2fcee4bf 9189 uint32_t if_type;
da0436e9
JS
9190
9191 /* Obtain PCI device reference */
9192 if (!phba->pcidev)
9193 return error;
9194 else
9195 pdev = phba->pcidev;
9196
9197 /* Set the device DMA mask size */
8e68597d
MR
9198 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
9199 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
9200 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
9201 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 9202 return error;
8e68597d
MR
9203 }
9204 }
da0436e9 9205
2fcee4bf
JS
9206 /*
9207 * The BARs and register set definitions and offset locations are
9208 * dependent on the if_type.
9209 */
9210 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
9211 &phba->sli4_hba.sli_intf.word0)) {
9212 return error;
9213 }
9214
9215 /* There is no SLI3 failback for SLI4 devices. */
9216 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
9217 LPFC_SLI_INTF_VALID) {
9218 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9219 "2894 SLI_INTF reg contents invalid "
9220 "sli_intf reg 0x%x\n",
9221 phba->sli4_hba.sli_intf.word0);
9222 return error;
9223 }
9224
9225 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9226 /*
9227 * Get the bus address of SLI4 device Bar regions and the
9228 * number of bytes required by each mapping. The mapping of the
9229 * particular PCI BARs regions is dependent on the type of
9230 * SLI4 device.
da0436e9 9231 */
f5ca6f2e
JS
9232 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
9233 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
9234 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS
9235
9236 /*
9237 * Map SLI4 PCI Config Space Register base to a kernel virtual
9238 * addr
9239 */
9240 phba->sli4_hba.conf_regs_memmap_p =
9241 ioremap(phba->pci_bar0_map, bar0map_len);
9242 if (!phba->sli4_hba.conf_regs_memmap_p) {
9243 dev_printk(KERN_ERR, &pdev->dev,
9244 "ioremap failed for SLI4 PCI config "
9245 "registers.\n");
9246 goto out;
9247 }
f5ca6f2e 9248 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS
9249 /* Set up BAR0 PCI config space register memory map */
9250 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS
9251 } else {
9252 phba->pci_bar0_map = pci_resource_start(pdev, 1);
9253 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS
9254 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
9255 dev_printk(KERN_ERR, &pdev->dev,
9256 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
9257 goto out;
9258 }
9259 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 9260 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS
9261 if (!phba->sli4_hba.conf_regs_memmap_p) {
9262 dev_printk(KERN_ERR, &pdev->dev,
9263 "ioremap failed for SLI4 PCI config "
9264 "registers.\n");
9265 goto out;
9266 }
9267 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS
9268 }
9269
c31098ce 9270 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9271 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
2fcee4bf
JS
9272 /*
9273 * Map SLI4 if type 0 HBA Control Register base to a kernel
9274 * virtual address and setup the registers.
9275 */
f5ca6f2e
JS
9276 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
9277 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
2fcee4bf 9278 phba->sli4_hba.ctrl_regs_memmap_p =
da0436e9 9279 ioremap(phba->pci_bar1_map, bar1map_len);
2fcee4bf
JS
9280 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
9281 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9282 "ioremap failed for SLI4 HBA control registers.\n");
2fcee4bf
JS
9283 goto out_iounmap_conf;
9284 }
f5ca6f2e 9285 phba->pci_bar2_memmap_p = phba->sli4_hba.ctrl_regs_memmap_p;
2fcee4bf 9286 lpfc_sli4_bar1_register_memmap(phba);
da0436e9
JS
9287 }
9288
c31098ce 9289 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9290 (pci_resource_start(pdev, PCI_64BIT_BAR4))) {
2fcee4bf
JS
9291 /*
9292 * Map SLI4 if type 0 HBA Doorbell Register base to a kernel
9293 * virtual address and setup the registers.
9294 */
f5ca6f2e
JS
9295 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
9296 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
2fcee4bf 9297 phba->sli4_hba.drbl_regs_memmap_p =
da0436e9 9298 ioremap(phba->pci_bar2_map, bar2map_len);
2fcee4bf
JS
9299 if (!phba->sli4_hba.drbl_regs_memmap_p) {
9300 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9301 "ioremap failed for SLI4 HBA doorbell registers.\n");
2fcee4bf
JS
9302 goto out_iounmap_ctrl;
9303 }
f5ca6f2e 9304 phba->pci_bar4_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
2fcee4bf
JS
9305 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
9306 if (error)
9307 goto out_iounmap_all;
da0436e9
JS
9308 }
9309
da0436e9
JS
9310 return 0;
9311
9312out_iounmap_all:
9313 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9314out_iounmap_ctrl:
9315 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9316out_iounmap_conf:
9317 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9318out:
9319 return error;
9320}
9321
9322/**
9323 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
9324 * @phba: pointer to lpfc hba data structure.
9325 *
9326 * This routine is invoked to unset the PCI device memory space for device
9327 * with SLI-4 interface spec.
9328 **/
9329static void
9330lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
9331{
2e90f4b5
JS
9332 uint32_t if_type;
9333 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 9334
2e90f4b5
JS
9335 switch (if_type) {
9336 case LPFC_SLI_INTF_IF_TYPE_0:
9337 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9338 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9339 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9340 break;
9341 case LPFC_SLI_INTF_IF_TYPE_2:
9342 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9343 break;
9344 case LPFC_SLI_INTF_IF_TYPE_1:
9345 default:
9346 dev_printk(KERN_ERR, &phba->pcidev->dev,
9347 "FATAL - unsupported SLI4 interface type - %d\n",
9348 if_type);
9349 break;
9350 }
da0436e9
JS
9351}
9352
9353/**
9354 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
9355 * @phba: pointer to lpfc hba data structure.
9356 *
9357 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9358 * with SLI-3 interface specs.
da0436e9
JS
9359 *
9360 * Return codes
af901ca1 9361 * 0 - successful
da0436e9
JS
9362 * other values - error
9363 **/
9364static int
9365lpfc_sli_enable_msix(struct lpfc_hba *phba)
9366{
45ffac19 9367 int rc;
da0436e9
JS
9368 LPFC_MBOXQ_t *pmb;
9369
9370 /* Set up MSI-X multi-message vectors */
45ffac19
CH
9371 rc = pci_alloc_irq_vectors(phba->pcidev,
9372 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
9373 if (rc < 0) {
da0436e9
JS
9374 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9375 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9376 goto vec_fail_out;
da0436e9 9377 }
45ffac19 9378
da0436e9
JS
9379 /*
9380 * Assign MSI-X vectors to interrupt handlers
9381 */
9382
9383 /* vector-0 is associated to slow-path handler */
45ffac19 9384 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 9385 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS
9386 LPFC_SP_DRIVER_HANDLER_NAME, phba);
9387 if (rc) {
9388 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9389 "0421 MSI-X slow-path request_irq failed "
9390 "(%d)\n", rc);
9391 goto msi_fail_out;
9392 }
9393
9394 /* vector-1 is associated to fast-path handler */
45ffac19 9395 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 9396 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS
9397 LPFC_FP_DRIVER_HANDLER_NAME, phba);
9398
9399 if (rc) {
9400 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9401 "0429 MSI-X fast-path request_irq failed "
9402 "(%d)\n", rc);
9403 goto irq_fail_out;
9404 }
9405
9406 /*
9407 * Configure HBA MSI-X attention conditions to messages
9408 */
9409 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9410
9411 if (!pmb) {
9412 rc = -ENOMEM;
9413 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9414 "0474 Unable to allocate memory for issuing "
9415 "MBOX_CONFIG_MSI command\n");
9416 goto mem_fail_out;
9417 }
9418 rc = lpfc_config_msi(phba, pmb);
9419 if (rc)
9420 goto mbx_fail_out;
9421 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9422 if (rc != MBX_SUCCESS) {
9423 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
9424 "0351 Config MSI mailbox command failed, "
9425 "mbxCmd x%x, mbxStatus x%x\n",
9426 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
9427 goto mbx_fail_out;
9428 }
9429
9430 /* Free memory allocated for mailbox command */
9431 mempool_free(pmb, phba->mbox_mem_pool);
9432 return rc;
9433
9434mbx_fail_out:
9435 /* Free memory allocated for mailbox command */
9436 mempool_free(pmb, phba->mbox_mem_pool);
9437
9438mem_fail_out:
9439 /* free the irq already requested */
45ffac19 9440 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS
9441
9442irq_fail_out:
9443 /* free the irq already requested */
45ffac19 9444 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS
9445
9446msi_fail_out:
9447 /* Unconfigure MSI-X capability structure */
45ffac19 9448 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9449
9450vec_fail_out:
da0436e9
JS
9451 return rc;
9452}
9453
da0436e9
JS
9454/**
9455 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
9456 * @phba: pointer to lpfc hba data structure.
9457 *
9458 * This routine is invoked to enable the MSI interrupt mode to device with
9459 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
9460 * enable the MSI vector. The device driver is responsible for calling the
9461 * request_irq() to register MSI vector with a interrupt the handler, which
9462 * is done in this function.
9463 *
9464 * Return codes
af901ca1 9465 * 0 - successful
da0436e9
JS
9466 * other values - error
9467 */
9468static int
9469lpfc_sli_enable_msi(struct lpfc_hba *phba)
9470{
9471 int rc;
9472
9473 rc = pci_enable_msi(phba->pcidev);
9474 if (!rc)
9475 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9476 "0462 PCI enable MSI mode success.\n");
9477 else {
9478 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9479 "0471 PCI enable MSI mode failed (%d)\n", rc);
9480 return rc;
9481 }
9482
9483 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9484 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9485 if (rc) {
9486 pci_disable_msi(phba->pcidev);
9487 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9488 "0478 MSI request_irq failed (%d)\n", rc);
9489 }
9490 return rc;
9491}
9492
da0436e9
JS
9493/**
9494 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9495 * @phba: pointer to lpfc hba data structure.
9496 *
9497 * This routine is invoked to enable device interrupt and associate driver's
9498 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9499 * spec. Depends on the interrupt mode configured to the driver, the driver
9500 * will try to fallback from the configured interrupt mode to an interrupt
9501 * mode which is supported by the platform, kernel, and device in the order
9502 * of:
9503 * MSI-X -> MSI -> IRQ.
9504 *
9505 * Return codes
af901ca1 9506 * 0 - successful
da0436e9
JS
9507 * other values - error
9508 **/
9509static uint32_t
9510lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9511{
9512 uint32_t intr_mode = LPFC_INTR_ERROR;
9513 int retval;
9514
9515 if (cfg_mode == 2) {
9516 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9517 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9518 if (!retval) {
9519 /* Now, try to enable MSI-X interrupt mode */
9520 retval = lpfc_sli_enable_msix(phba);
9521 if (!retval) {
9522 /* Indicate initialization to MSI-X mode */
9523 phba->intr_type = MSIX;
9524 intr_mode = 2;
9525 }
9526 }
9527 }
9528
9529 /* Fallback to MSI if MSI-X initialization failed */
9530 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9531 retval = lpfc_sli_enable_msi(phba);
9532 if (!retval) {
9533 /* Indicate initialization to MSI mode */
9534 phba->intr_type = MSI;
9535 intr_mode = 1;
9536 }
9537 }
9538
9539 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9540 if (phba->intr_type == NONE) {
9541 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9542 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9543 if (!retval) {
9544 /* Indicate initialization to INTx mode */
9545 phba->intr_type = INTx;
9546 intr_mode = 0;
9547 }
9548 }
9549 return intr_mode;
9550}
9551
9552/**
9553 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9554 * @phba: pointer to lpfc hba data structure.
9555 *
9556 * This routine is invoked to disable device interrupt and disassociate the
9557 * driver's interrupt handler(s) from interrupt vector(s) to device with
9558 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9559 * release the interrupt vector(s) for the message signaled interrupt.
9560 **/
9561static void
9562lpfc_sli_disable_intr(struct lpfc_hba *phba)
9563{
45ffac19
CH
9564 int nr_irqs, i;
9565
da0436e9 9566 if (phba->intr_type == MSIX)
45ffac19
CH
9567 nr_irqs = LPFC_MSIX_VECTORS;
9568 else
9569 nr_irqs = 1;
9570
9571 for (i = 0; i < nr_irqs; i++)
9572 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9573 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9574
9575 /* Reset interrupt management states */
9576 phba->intr_type = NONE;
9577 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9578}
9579
7bb03bbf 9580/**
895427bd 9581 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9582 * @phba: pointer to lpfc hba data structure.
895427bd
JS
9583 * @vectors: number of msix vectors allocated.
9584 *
9585 * The routine will figure out the CPU affinity assignment for every
9586 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9587 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9588 * can be associated with. If the vector can be unquely associated with
9589 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9590 * In addition, the CPU to IO channel mapping will be calculated
9591 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9592 */
895427bd
JS
9593static void
9594lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS
9595{
9596 struct lpfc_vector_map_info *cpup;
895427bd
JS
9597 int index = 0;
9598 int vec = 0;
7bb03bbf 9599 int cpu;
7bb03bbf
JS
9600#ifdef CONFIG_X86
9601 struct cpuinfo_x86 *cpuinfo;
9602#endif
7bb03bbf
JS
9603
9604 /* Init cpu_map array */
9605 memset(phba->sli4_hba.cpu_map, 0xff,
9606 (sizeof(struct lpfc_vector_map_info) *
895427bd 9607 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS
9608
9609 /* Update CPU map with physical id and core id of each CPU */
9610 cpup = phba->sli4_hba.cpu_map;
9611 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9612#ifdef CONFIG_X86
9613 cpuinfo = &cpu_data(cpu);
9614 cpup->phys_id = cpuinfo->phys_proc_id;
9615 cpup->core_id = cpuinfo->cpu_core_id;
9616#else
9617 /* No distinction between CPUs for other platforms */
9618 cpup->phys_id = 0;
9619 cpup->core_id = 0;
9620#endif
895427bd
JS
9621 cpup->channel_id = index; /* For now round robin */
9622 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9623 vec++;
9624 if (vec >= vectors)
9625 vec = 0;
9626 index++;
9627 if (index >= phba->cfg_fcp_io_channel)
9628 index = 0;
7bb03bbf
JS
9629 cpup++;
9630 }
7bb03bbf
JS
9631}
9632
9633
da0436e9
JS
9634/**
9635 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9636 * @phba: pointer to lpfc hba data structure.
9637 *
9638 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9639 * with SLI-4 interface spec.
da0436e9
JS
9640 *
9641 * Return codes
af901ca1 9642 * 0 - successful
da0436e9
JS
9643 * other values - error
9644 **/
9645static int
9646lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9647{
75baf696 9648 int vectors, rc, index;
da0436e9
JS
9649
9650 /* Set up MSI-X multi-message vectors */
895427bd 9651 vectors = phba->io_channel_irqs;
45ffac19 9652 if (phba->cfg_fof)
1ba981fd 9653 vectors++;
45ffac19 9654
f358dd0c
JS
9655 rc = pci_alloc_irq_vectors(phba->pcidev,
9656 (phba->nvmet_support) ? 1 : 2,
9657 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9658 if (rc < 0) {
da0436e9
JS
9659 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9660 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9661 goto vec_fail_out;
da0436e9 9662 }
4f871e1b 9663 vectors = rc;
75baf696 9664
7bb03bbf 9665 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9666 for (index = 0; index < vectors; index++) {
4305f183 9667 memset(&phba->sli4_hba.handler_name[index], 0, 16);
a2fc4aef
JS
9668 snprintf((char *)&phba->sli4_hba.handler_name[index],
9669 LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9670 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9671
895427bd
JS
9672 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9673 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9674 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9675 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9676 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9677 &lpfc_sli4_fof_intr_handler, 0,
1ba981fd 9678 (char *)&phba->sli4_hba.handler_name[index],
895427bd 9679 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9680 else
45ffac19 9681 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9682 &lpfc_sli4_hba_intr_handler, 0,
4305f183 9683 (char *)&phba->sli4_hba.handler_name[index],
895427bd 9684 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS
9685 if (rc) {
9686 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9687 "0486 MSI-X fast-path (%d) "
9688 "request_irq failed (%d)\n", index, rc);
9689 goto cfg_fail_out;
9690 }
9691 }
9692
1ba981fd
JS
9693 if (phba->cfg_fof)
9694 vectors--;
9695
895427bd 9696 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS
9697 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9698 "3238 Reducing IO channels to match number of "
9699 "MSI-X vectors, requested %d got %d\n",
895427bd
JS
9700 phba->io_channel_irqs, vectors);
9701 if (phba->cfg_fcp_io_channel > vectors)
9702 phba->cfg_fcp_io_channel = vectors;
9703 if (phba->cfg_nvme_io_channel > vectors)
9704 phba->cfg_nvme_io_channel = vectors;
9705 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9706 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9707 else
9708 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9709 }
895427bd 9710 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9711
da0436e9
JS
9712 return rc;
9713
9714cfg_fail_out:
9715 /* free the irq already requested */
895427bd
JS
9716 for (--index; index >= 0; index--)
9717 free_irq(pci_irq_vector(phba->pcidev, index),
9718 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9719
da0436e9 9720 /* Unconfigure MSI-X capability structure */
45ffac19 9721 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9722
9723vec_fail_out:
da0436e9
JS
9724 return rc;
9725}
9726
da0436e9
JS
9727/**
9728 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9729 * @phba: pointer to lpfc hba data structure.
9730 *
9731 * This routine is invoked to enable the MSI interrupt mode to device with
9732 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9733 * to enable the MSI vector. The device driver is responsible for calling
9734 * the request_irq() to register MSI vector with a interrupt the handler,
9735 * which is done in this function.
9736 *
9737 * Return codes
af901ca1 9738 * 0 - successful
da0436e9
JS
9739 * other values - error
9740 **/
9741static int
9742lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9743{
9744 int rc, index;
9745
9746 rc = pci_enable_msi(phba->pcidev);
9747 if (!rc)
9748 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9749 "0487 PCI enable MSI mode success.\n");
9750 else {
9751 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9752 "0488 PCI enable MSI mode failed (%d)\n", rc);
9753 return rc;
9754 }
9755
9756 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9757 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9758 if (rc) {
9759 pci_disable_msi(phba->pcidev);
9760 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9761 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9762 return rc;
da0436e9
JS
9763 }
9764
895427bd
JS
9765 for (index = 0; index < phba->io_channel_irqs; index++) {
9766 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9767 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS
9768 }
9769
1ba981fd 9770 if (phba->cfg_fof) {
895427bd
JS
9771 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9772 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 9773 }
75baf696 9774 return 0;
da0436e9
JS
9775}
9776
da0436e9
JS
9777/**
9778 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
9779 * @phba: pointer to lpfc hba data structure.
9780 *
9781 * This routine is invoked to enable device interrupt and associate driver's
9782 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
9783 * interface spec. Depends on the interrupt mode configured to the driver,
9784 * the driver will try to fallback from the configured interrupt mode to an
9785 * interrupt mode which is supported by the platform, kernel, and device in
9786 * the order of:
9787 * MSI-X -> MSI -> IRQ.
9788 *
9789 * Return codes
af901ca1 9790 * 0 - successful
da0436e9
JS
9791 * other values - error
9792 **/
9793static uint32_t
9794lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9795{
9796 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 9797 int retval, idx;
da0436e9
JS
9798
9799 if (cfg_mode == 2) {
9800 /* Preparation before conf_msi mbox cmd */
9801 retval = 0;
9802 if (!retval) {
9803 /* Now, try to enable MSI-X interrupt mode */
9804 retval = lpfc_sli4_enable_msix(phba);
9805 if (!retval) {
9806 /* Indicate initialization to MSI-X mode */
9807 phba->intr_type = MSIX;
9808 intr_mode = 2;
9809 }
9810 }
9811 }
9812
9813 /* Fallback to MSI if MSI-X initialization failed */
9814 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9815 retval = lpfc_sli4_enable_msi(phba);
9816 if (!retval) {
9817 /* Indicate initialization to MSI mode */
9818 phba->intr_type = MSI;
9819 intr_mode = 1;
9820 }
9821 }
9822
9823 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9824 if (phba->intr_type == NONE) {
9825 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
9826 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9827 if (!retval) {
895427bd
JS
9828 struct lpfc_hba_eq_hdl *eqhdl;
9829
da0436e9
JS
9830 /* Indicate initialization to INTx mode */
9831 phba->intr_type = INTx;
9832 intr_mode = 0;
895427bd
JS
9833
9834 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
9835 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9836 eqhdl->idx = idx;
9837 eqhdl->phba = phba;
9838 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 9839 }
1ba981fd 9840 if (phba->cfg_fof) {
895427bd
JS
9841 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9842 eqhdl->idx = idx;
9843 eqhdl->phba = phba;
9844 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 9845 }
da0436e9
JS
9846 }
9847 }
9848 return intr_mode;
9849}
9850
9851/**
9852 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
9853 * @phba: pointer to lpfc hba data structure.
9854 *
9855 * This routine is invoked to disable device interrupt and disassociate
9856 * the driver's interrupt handler(s) from interrupt vector(s) to device
9857 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
9858 * will release the interrupt vector(s) for the message signaled interrupt.
9859 **/
9860static void
9861lpfc_sli4_disable_intr(struct lpfc_hba *phba)
9862{
9863 /* Disable the currently initialized interrupt mode */
45ffac19
CH
9864 if (phba->intr_type == MSIX) {
9865 int index;
9866
9867 /* Free up MSI-X multi-message vectors */
895427bd
JS
9868 for (index = 0; index < phba->io_channel_irqs; index++)
9869 free_irq(pci_irq_vector(phba->pcidev, index),
9870 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH
9871
9872 if (phba->cfg_fof)
895427bd
JS
9873 free_irq(pci_irq_vector(phba->pcidev, index),
9874 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 9875 } else {
da0436e9 9876 free_irq(phba->pcidev->irq, phba);
45ffac19
CH
9877 }
9878
9879 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9880
9881 /* Reset interrupt management states */
9882 phba->intr_type = NONE;
9883 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9884}
9885
9886/**
9887 * lpfc_unset_hba - Unset SLI3 hba device initialization
9888 * @phba: pointer to lpfc hba data structure.
9889 *
9890 * This routine is invoked to unset the HBA device initialization steps to
9891 * a device with SLI-3 interface spec.
9892 **/
9893static void
9894lpfc_unset_hba(struct lpfc_hba *phba)
9895{
9896 struct lpfc_vport *vport = phba->pport;
9897 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
9898
9899 spin_lock_irq(shost->host_lock);
9900 vport->load_flag |= FC_UNLOADING;
9901 spin_unlock_irq(shost->host_lock);
9902
72859909
JS
9903 kfree(phba->vpi_bmask);
9904 kfree(phba->vpi_ids);
9905
da0436e9
JS
9906 lpfc_stop_hba_timers(phba);
9907
9908 phba->pport->work_port_events = 0;
9909
9910 lpfc_sli_hba_down(phba);
9911
9912 lpfc_sli_brdrestart(phba);
9913
9914 lpfc_sli_disable_intr(phba);
9915
9916 return;
9917}
9918
5af5eee7
JS
9919/**
9920 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
9921 * @phba: Pointer to HBA context object.
9922 *
9923 * This function is called in the SLI4 code path to wait for completion
9924 * of device's XRIs exchange busy. It will check the XRI exchange busy
9925 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
9926 * that, it will check the XRI exchange busy on outstanding FCP and ELS
9927 * I/Os every 30 seconds, log error message, and wait forever. Only when
9928 * all XRI exchange busy complete, the driver unload shall proceed with
9929 * invoking the function reset ioctl mailbox command to the CNA and the
9930 * the rest of the driver unload resource release.
9931 **/
9932static void
9933lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
9934{
9935 int wait_time = 0;
895427bd
JS
9936 int nvme_xri_cmpl = 1;
9937 int fcp_xri_cmpl = 1;
5af5eee7 9938 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c
JS
9939 int nvmet_xri_cmpl =
9940 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list);
5af5eee7 9941
895427bd
JS
9942 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
9943 fcp_xri_cmpl =
9944 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
9945 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
9946 nvme_xri_cmpl =
9947 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
9948
f358dd0c
JS
9949 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl ||
9950 !nvmet_xri_cmpl) {
5af5eee7 9951 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS
9952 if (!nvme_xri_cmpl)
9953 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9954 "6100 NVME XRI exchange busy "
9955 "wait time: %d seconds.\n",
9956 wait_time/1000);
5af5eee7
JS
9957 if (!fcp_xri_cmpl)
9958 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9959 "2877 FCP XRI exchange busy "
9960 "wait time: %d seconds.\n",
9961 wait_time/1000);
9962 if (!els_xri_cmpl)
9963 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9964 "2878 ELS XRI exchange busy "
9965 "wait time: %d seconds.\n",
9966 wait_time/1000);
9967 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
9968 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
9969 } else {
9970 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
9971 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
9972 }
895427bd
JS
9973 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
9974 nvme_xri_cmpl = list_empty(
9975 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
9976
9977 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
9978 fcp_xri_cmpl = list_empty(
9979 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
9980
5af5eee7
JS
9981 els_xri_cmpl =
9982 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c
JS
9983
9984 nvmet_xri_cmpl =
9985 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list);
5af5eee7
JS
9986 }
9987}
9988
da0436e9
JS
9989/**
9990 * lpfc_sli4_hba_unset - Unset the fcoe hba
9991 * @phba: Pointer to HBA context object.
9992 *
9993 * This function is called in the SLI4 code path to reset the HBA's FCoE
9994 * function. The caller is not required to hold any lock. This routine
9995 * issues PCI function reset mailbox command to reset the FCoE function.
9996 * At the end of the function, it calls lpfc_hba_down_post function to
9997 * free any pending commands.
9998 **/
9999static void
10000lpfc_sli4_hba_unset(struct lpfc_hba *phba)
10001{
10002 int wait_cnt = 0;
10003 LPFC_MBOXQ_t *mboxq;
912e3acd 10004 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS
10005
10006 lpfc_stop_hba_timers(phba);
10007 phba->sli4_hba.intr_enable = 0;
10008
10009 /*
10010 * Gracefully wait out the potential current outstanding asynchronous
10011 * mailbox command.
10012 */
10013
10014 /* First, block any pending async mailbox command from posted */
10015 spin_lock_irq(&phba->hbalock);
10016 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
10017 spin_unlock_irq(&phba->hbalock);
10018 /* Now, trying to wait it out if we can */
10019 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10020 msleep(10);
10021 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
10022 break;
10023 }
10024 /* Forcefully release the outstanding mailbox command if timed out */
10025 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10026 spin_lock_irq(&phba->hbalock);
10027 mboxq = phba->sli.mbox_active;
10028 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
10029 __lpfc_mbox_cmpl_put(phba, mboxq);
10030 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10031 phba->sli.mbox_active = NULL;
10032 spin_unlock_irq(&phba->hbalock);
10033 }
10034
5af5eee7
JS
10035 /* Abort all iocbs associated with the hba */
10036 lpfc_sli_hba_iocb_abort(phba);
10037
10038 /* Wait for completion of device XRI exchange busy */
10039 lpfc_sli4_xri_exchange_busy_wait(phba);
10040
da0436e9
JS
10041 /* Disable PCI subsystem interrupt */
10042 lpfc_sli4_disable_intr(phba);
10043
912e3acd
JS
10044 /* Disable SR-IOV if enabled */
10045 if (phba->cfg_sriov_nr_virtfn)
10046 pci_disable_sriov(pdev);
10047
da0436e9
JS
10048 /* Stop kthread signal shall trigger work_done one more time */
10049 kthread_stop(phba->worker_thread);
10050
3677a3a7
JS
10051 /* Reset SLI4 HBA FCoE function */
10052 lpfc_pci_function_reset(phba);
5350d872 10053 lpfc_sli4_queue_destroy(phba);
3677a3a7 10054
da0436e9
JS
10055 /* Stop the SLI4 device port */
10056 phba->pport->work_port_events = 0;
10057}
10058
28baac74
JS
10059 /**
10060 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
10061 * @phba: Pointer to HBA context object.
10062 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10063 *
10064 * This function is called in the SLI4 code path to read the port's
10065 * sli4 capabilities.
10066 *
10067 * This function may be be called from any context that can block-wait
10068 * for the completion. The expectation is that this routine is called
10069 * typically from probe_one or from the online routine.
10070 **/
10071int
10072lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10073{
10074 int rc;
10075 struct lpfc_mqe *mqe;
10076 struct lpfc_pc_sli4_params *sli4_params;
10077 uint32_t mbox_tmo;
10078
10079 rc = 0;
10080 mqe = &mboxq->u.mqe;
10081
10082 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 10083 lpfc_pc_sli4_params(mboxq);
28baac74
JS
10084 if (!phba->sli4_hba.intr_enable)
10085 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10086 else {
a183a15f 10087 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS
10088 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10089 }
10090
10091 if (unlikely(rc))
10092 return 1;
10093
10094 sli4_params = &phba->sli4_hba.pc_sli4_params;
10095 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
10096 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
10097 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
10098 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
10099 &mqe->un.sli4_params);
10100 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
10101 &mqe->un.sli4_params);
10102 sli4_params->proto_types = mqe->un.sli4_params.word3;
10103 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
10104 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
10105 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
10106 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
10107 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
10108 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
10109 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
10110 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
10111 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
10112 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
10113 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
10114 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
10115 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
10116 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
10117 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
10118 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
10119 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
10120 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
10121 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
10122 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS
10123
10124 /* Make sure that sge_supp_len can be handled by the driver */
10125 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10126 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10127
28baac74
JS
10128 return rc;
10129}
10130
fedd3b7b
JS
10131/**
10132 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
10133 * @phba: Pointer to HBA context object.
10134 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10135 *
10136 * This function is called in the SLI4 code path to read the port's
10137 * sli4 capabilities.
10138 *
10139 * This function may be be called from any context that can block-wait
10140 * for the completion. The expectation is that this routine is called
10141 * typically from probe_one or from the online routine.
10142 **/
10143int
10144lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10145{
10146 int rc;
10147 struct lpfc_mqe *mqe = &mboxq->u.mqe;
10148 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 10149 uint32_t mbox_tmo;
fedd3b7b
JS
10150 int length;
10151 struct lpfc_sli4_parameters *mbx_sli4_parameters;
10152
6d368e53
JS
10153 /*
10154 * By default, the driver assumes the SLI4 port requires RPI
10155 * header postings. The SLI4_PARAM response will correct this
10156 * assumption.
10157 */
10158 phba->sli4_hba.rpi_hdrs_in_use = 1;
10159
fedd3b7b
JS
10160 /* Read the port's SLI4 Config Parameters */
10161 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
10162 sizeof(struct lpfc_sli4_cfg_mhdr));
10163 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
10164 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
10165 length, LPFC_SLI4_MBX_EMBED);
10166 if (!phba->sli4_hba.intr_enable)
10167 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS
10168 else {
10169 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
10170 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10171 }
fedd3b7b
JS
10172 if (unlikely(rc))
10173 return rc;
10174 sli4_params = &phba->sli4_hba.pc_sli4_params;
10175 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
10176 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
10177 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
10178 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
10179 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
10180 mbx_sli4_parameters);
10181 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
10182 mbx_sli4_parameters);
10183 if (bf_get(cfg_phwq, mbx_sli4_parameters))
10184 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
10185 else
10186 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
10187 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
10188 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 10189 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS
10190 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
10191 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
10192 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
10193 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 10194 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS
10195 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
10196 mbx_sli4_parameters);
895427bd 10197 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS
10198 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
10199 mbx_sli4_parameters);
6d368e53
JS
10200 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
10201 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS
10202 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
10203 bf_get(cfg_xib, mbx_sli4_parameters));
10204
10205 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
10206 !phba->nvme_support) {
10207 phba->nvme_support = 0;
10208 phba->nvmet_support = 0;
2d7dbc4c 10209 phba->cfg_nvmet_mrq = 0;
895427bd
JS
10210 phba->cfg_nvme_io_channel = 0;
10211 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
10212 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
10213 "6101 Disabling NVME support: "
10214 "Not supported by firmware: %d %d\n",
10215 bf_get(cfg_nvme, mbx_sli4_parameters),
10216 bf_get(cfg_xib, mbx_sli4_parameters));
10217
10218 /* If firmware doesn't support NVME, just use SCSI support */
10219 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
10220 return -ENODEV;
10221 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
10222 }
0558056c 10223
f358dd0c
JS
10224 if (bf_get(cfg_xib, mbx_sli4_parameters) && phba->cfg_suppress_rsp)
10225 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
10226
0558056c
JS
10227 /* Make sure that sge_supp_len can be handled by the driver */
10228 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10229 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10230
b5c53958
JS
10231 /*
10232 * Issue IOs with CDB embedded in WQE to minimized the number
10233 * of DMAs the firmware has to do. Setting this to 1 also forces
10234 * the driver to use 128 bytes WQEs for FCP IOs.
10235 */
10236 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
10237 phba->fcp_embed_io = 1;
10238 else
10239 phba->fcp_embed_io = 0;
7bdedb34
JS
10240
10241 /*
10242 * Check if the SLI port supports MDS Diagnostics
10243 */
10244 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
10245 phba->mds_diags_support = 1;
10246 else
10247 phba->mds_diags_support = 0;
fedd3b7b
JS
10248 return 0;
10249}
10250
da0436e9
JS
10251/**
10252 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
10253 * @pdev: pointer to PCI device
10254 * @pid: pointer to PCI device identifier
10255 *
10256 * This routine is to be called to attach a device with SLI-3 interface spec
10257 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10258 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
10259 * information of the device and driver to see if the driver state that it can
10260 * support this kind of device. If the match is successful, the driver core
10261 * invokes this routine. If this routine determines it can claim the HBA, it
10262 * does all the initialization that it needs to do to handle the HBA properly.
10263 *
10264 * Return code
10265 * 0 - driver can claim the device
10266 * negative value - driver can not claim the device
10267 **/
6f039790 10268static int
da0436e9
JS
10269lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
10270{
10271 struct lpfc_hba *phba;
10272 struct lpfc_vport *vport = NULL;
6669f9bb 10273 struct Scsi_Host *shost = NULL;
da0436e9
JS
10274 int error;
10275 uint32_t cfg_mode, intr_mode;
10276
10277 /* Allocate memory for HBA structure */
10278 phba = lpfc_hba_alloc(pdev);
10279 if (!phba)
10280 return -ENOMEM;
10281
10282 /* Perform generic PCI device enabling operation */
10283 error = lpfc_enable_pci_dev(phba);
079b5c91 10284 if (error)
da0436e9 10285 goto out_free_phba;
da0436e9
JS
10286
10287 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
10288 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
10289 if (error)
10290 goto out_disable_pci_dev;
10291
10292 /* Set up SLI-3 specific device PCI memory space */
10293 error = lpfc_sli_pci_mem_setup(phba);
10294 if (error) {
10295 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10296 "1402 Failed to set up pci memory space.\n");
10297 goto out_disable_pci_dev;
10298 }
10299
da0436e9
JS
10300 /* Set up SLI-3 specific device driver resources */
10301 error = lpfc_sli_driver_resource_setup(phba);
10302 if (error) {
10303 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10304 "1404 Failed to set up driver resource.\n");
10305 goto out_unset_pci_mem_s3;
10306 }
10307
10308 /* Initialize and populate the iocb list per host */
10309 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
10310 if (error) {
10311 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10312 "1405 Failed to initialize iocb list.\n");
10313 goto out_unset_driver_resource_s3;
10314 }
10315
10316 /* Set up common device driver resources */
10317 error = lpfc_setup_driver_resource_phase2(phba);
10318 if (error) {
10319 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10320 "1406 Failed to set up driver resource.\n");
10321 goto out_free_iocb_list;
10322 }
10323
079b5c91
JS
10324 /* Get the default values for Model Name and Description */
10325 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10326
da0436e9
JS
10327 /* Create SCSI host to the physical port */
10328 error = lpfc_create_shost(phba);
10329 if (error) {
10330 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10331 "1407 Failed to create scsi host.\n");
10332 goto out_unset_driver_resource;
10333 }
10334
10335 /* Configure sysfs attributes */
10336 vport = phba->pport;
10337 error = lpfc_alloc_sysfs_attr(vport);
10338 if (error) {
10339 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10340 "1476 Failed to allocate sysfs attr\n");
10341 goto out_destroy_shost;
10342 }
10343
6669f9bb 10344 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS
10345 /* Now, trying to enable interrupt and bring up the device */
10346 cfg_mode = phba->cfg_use_msi;
10347 while (true) {
10348 /* Put device to a known state before enabling interrupt */
10349 lpfc_stop_port(phba);
10350 /* Configure and enable interrupt */
10351 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
10352 if (intr_mode == LPFC_INTR_ERROR) {
10353 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10354 "0431 Failed to enable interrupt.\n");
10355 error = -ENODEV;
10356 goto out_free_sysfs_attr;
10357 }
10358 /* SLI-3 HBA setup */
10359 if (lpfc_sli_hba_setup(phba)) {
10360 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10361 "1477 Failed to set up hba\n");
10362 error = -ENODEV;
10363 goto out_remove_device;
10364 }
10365
10366 /* Wait 50ms for the interrupts of previous mailbox commands */
10367 msleep(50);
10368 /* Check active interrupts on message signaled interrupts */
10369 if (intr_mode == 0 ||
10370 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
10371 /* Log the current active interrupt mode */
10372 phba->intr_mode = intr_mode;
10373 lpfc_log_intr_mode(phba, intr_mode);
10374 break;
10375 } else {
10376 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10377 "0447 Configure interrupt mode (%d) "
10378 "failed active interrupt test.\n",
10379 intr_mode);
10380 /* Disable the current interrupt mode */
10381 lpfc_sli_disable_intr(phba);
10382 /* Try next level of interrupt mode */
10383 cfg_mode = --intr_mode;
10384 }
10385 }
10386
10387 /* Perform post initialization setup */
10388 lpfc_post_init_setup(phba);
10389
10390 /* Check if there are static vports to be created. */
10391 lpfc_create_static_vport(phba);
10392
10393 return 0;
10394
10395out_remove_device:
10396 lpfc_unset_hba(phba);
10397out_free_sysfs_attr:
10398 lpfc_free_sysfs_attr(vport);
10399out_destroy_shost:
10400 lpfc_destroy_shost(phba);
10401out_unset_driver_resource:
10402 lpfc_unset_driver_resource_phase2(phba);
10403out_free_iocb_list:
10404 lpfc_free_iocb_list(phba);
10405out_unset_driver_resource_s3:
10406 lpfc_sli_driver_resource_unset(phba);
10407out_unset_pci_mem_s3:
10408 lpfc_sli_pci_mem_unset(phba);
10409out_disable_pci_dev:
10410 lpfc_disable_pci_dev(phba);
6669f9bb
JS
10411 if (shost)
10412 scsi_host_put(shost);
da0436e9
JS
10413out_free_phba:
10414 lpfc_hba_free(phba);
10415 return error;
10416}
10417
10418/**
10419 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
10420 * @pdev: pointer to PCI device
10421 *
10422 * This routine is to be called to disattach a device with SLI-3 interface
10423 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10424 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10425 * device to be removed from the PCI subsystem properly.
10426 **/
6f039790 10427static void
da0436e9
JS
10428lpfc_pci_remove_one_s3(struct pci_dev *pdev)
10429{
10430 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10431 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10432 struct lpfc_vport **vports;
10433 struct lpfc_hba *phba = vport->phba;
10434 int i;
da0436e9
JS
10435
10436 spin_lock_irq(&phba->hbalock);
10437 vport->load_flag |= FC_UNLOADING;
10438 spin_unlock_irq(&phba->hbalock);
10439
10440 lpfc_free_sysfs_attr(vport);
10441
10442 /* Release all the vports against this physical port */
10443 vports = lpfc_create_vport_work_array(phba);
10444 if (vports != NULL)
587a37f6
JS
10445 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10446 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10447 continue;
da0436e9 10448 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10449 }
da0436e9
JS
10450 lpfc_destroy_vport_work_array(phba, vports);
10451
10452 /* Remove FC host and then SCSI host with the physical port */
10453 fc_remove_host(shost);
10454 scsi_remove_host(shost);
d613b6a7 10455
da0436e9
JS
10456 lpfc_cleanup(vport);
10457
10458 /*
10459 * Bring down the SLI Layer. This step disable all interrupts,
10460 * clears the rings, discards all mailbox commands, and resets
10461 * the HBA.
10462 */
10463
48e34d0f 10464 /* HBA interrupt will be disabled after this call */
da0436e9
JS
10465 lpfc_sli_hba_down(phba);
10466 /* Stop kthread signal shall trigger work_done one more time */
10467 kthread_stop(phba->worker_thread);
10468 /* Final cleanup of txcmplq and reset the HBA */
10469 lpfc_sli_brdrestart(phba);
10470
72859909
JS
10471 kfree(phba->vpi_bmask);
10472 kfree(phba->vpi_ids);
10473
da0436e9
JS
10474 lpfc_stop_hba_timers(phba);
10475 spin_lock_irq(&phba->hbalock);
10476 list_del_init(&vport->listentry);
10477 spin_unlock_irq(&phba->hbalock);
10478
10479 lpfc_debugfs_terminate(vport);
10480
912e3acd
JS
10481 /* Disable SR-IOV if enabled */
10482 if (phba->cfg_sriov_nr_virtfn)
10483 pci_disable_sriov(pdev);
10484
da0436e9
JS
10485 /* Disable interrupt */
10486 lpfc_sli_disable_intr(phba);
10487
da0436e9
JS
10488 scsi_host_put(shost);
10489
10490 /*
10491 * Call scsi_free before mem_free since scsi bufs are released to their
10492 * corresponding pools here.
10493 */
10494 lpfc_scsi_free(phba);
10495 lpfc_mem_free_all(phba);
10496
10497 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10498 phba->hbqslimp.virt, phba->hbqslimp.phys);
10499
10500 /* Free resources associated with SLI2 interface */
10501 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10502 phba->slim2p.virt, phba->slim2p.phys);
10503
10504 /* unmap adapter SLIM and Control Registers */
10505 iounmap(phba->ctrl_regs_memmap_p);
10506 iounmap(phba->slim_memmap_p);
10507
10508 lpfc_hba_free(phba);
10509
e0c0483c 10510 pci_release_mem_regions(pdev);
da0436e9
JS
10511 pci_disable_device(pdev);
10512}
10513
10514/**
10515 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10516 * @pdev: pointer to PCI device
10517 * @msg: power management message
10518 *
10519 * This routine is to be called from the kernel's PCI subsystem to support
10520 * system Power Management (PM) to device with SLI-3 interface spec. When
10521 * PM invokes this method, it quiesces the device by stopping the driver's
10522 * worker thread for the device, turning off device's interrupt and DMA,
10523 * and bring the device offline. Note that as the driver implements the
10524 * minimum PM requirements to a power-aware driver's PM support for the
10525 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10526 * to the suspend() method call will be treated as SUSPEND and the driver will
10527 * fully reinitialize its device during resume() method call, the driver will
10528 * set device to PCI_D3hot state in PCI config space instead of setting it
10529 * according to the @msg provided by the PM.
10530 *
10531 * Return code
10532 * 0 - driver suspended the device
10533 * Error otherwise
10534 **/
10535static int
10536lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10537{
10538 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10539 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10540
10541 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10542 "0473 PCI device Power Management suspend.\n");
10543
10544 /* Bring down the device */
618a5230 10545 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10546 lpfc_offline(phba);
10547 kthread_stop(phba->worker_thread);
10548
10549 /* Disable interrupt from device */
10550 lpfc_sli_disable_intr(phba);
10551
10552 /* Save device state to PCI config space */
10553 pci_save_state(pdev);
10554 pci_set_power_state(pdev, PCI_D3hot);
10555
10556 return 0;
10557}
10558
10559/**
10560 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10561 * @pdev: pointer to PCI device
10562 *
10563 * This routine is to be called from the kernel's PCI subsystem to support
10564 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10565 * invokes this method, it restores the device's PCI config space state and
10566 * fully reinitializes the device and brings it online. Note that as the
10567 * driver implements the minimum PM requirements to a power-aware driver's
10568 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10569 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10570 * driver will fully reinitialize its device during resume() method call,
10571 * the device will be set to PCI_D0 directly in PCI config space before
10572 * restoring the state.
10573 *
10574 * Return code
10575 * 0 - driver suspended the device
10576 * Error otherwise
10577 **/
10578static int
10579lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10580{
10581 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10582 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10583 uint32_t intr_mode;
10584 int error;
10585
10586 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10587 "0452 PCI device Power Management resume.\n");
10588
10589 /* Restore device state from PCI config space */
10590 pci_set_power_state(pdev, PCI_D0);
10591 pci_restore_state(pdev);
0d878419 10592
1dfb5a47
JS
10593 /*
10594 * As the new kernel behavior of pci_restore_state() API call clears
10595 * device saved_state flag, need to save the restored state again.
10596 */
10597 pci_save_state(pdev);
10598
da0436e9
JS
10599 if (pdev->is_busmaster)
10600 pci_set_master(pdev);
10601
10602 /* Startup the kernel thread for this host adapter. */
10603 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10604 "lpfc_worker_%d", phba->brd_no);
10605 if (IS_ERR(phba->worker_thread)) {
10606 error = PTR_ERR(phba->worker_thread);
10607 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10608 "0434 PM resume failed to start worker "
10609 "thread: error=x%x.\n", error);
10610 return error;
10611 }
10612
10613 /* Configure and enable interrupt */
10614 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10615 if (intr_mode == LPFC_INTR_ERROR) {
10616 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10617 "0430 PM resume Failed to enable interrupt\n");
10618 return -EIO;
10619 } else
10620 phba->intr_mode = intr_mode;
10621
10622 /* Restart HBA and bring it online */
10623 lpfc_sli_brdrestart(phba);
10624 lpfc_online(phba);
10625
10626 /* Log the current active interrupt mode */
10627 lpfc_log_intr_mode(phba, phba->intr_mode);
10628
10629 return 0;
10630}
10631
891478a2
JS
10632/**
10633 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10634 * @phba: pointer to lpfc hba data structure.
10635 *
10636 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10637 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS
10638 **/
10639static void
10640lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10641{
10642 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10643 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS
10644
10645 /*
10646 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10647 * and let the SCSI mid-layer to retry them to recover.
10648 */
db55fba8 10649 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS
10650}
10651
0d878419
JS
10652/**
10653 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10654 * @phba: pointer to lpfc hba data structure.
10655 *
10656 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10657 * disables the device interrupt and pci device, and aborts the internal FCP
10658 * pending I/Os.
10659 **/
10660static void
10661lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10662{
0d878419 10663 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10664 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10665
75baf696 10666 /* Block any management I/Os to the device */
618a5230 10667 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10668
e2af0d2e
JS
10669 /* Block all SCSI devices' I/Os on the host */
10670 lpfc_scsi_dev_block(phba);
10671
ea714f3d
JS
10672 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10673 lpfc_sli_flush_fcp_rings(phba);
10674
e2af0d2e
JS
10675 /* stop all timers */
10676 lpfc_stop_hba_timers(phba);
10677
0d878419
JS
10678 /* Disable interrupt and pci device */
10679 lpfc_sli_disable_intr(phba);
10680 pci_disable_device(phba->pcidev);
0d878419
JS
10681}
10682
10683/**
10684 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10685 * @phba: pointer to lpfc hba data structure.
10686 *
10687 * This routine is called to prepare the SLI3 device for PCI slot permanently
10688 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10689 * pending I/Os.
10690 **/
10691static void
75baf696 10692lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS
10693{
10694 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10695 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS
10696 /* Block all SCSI devices' I/Os on the host */
10697 lpfc_scsi_dev_block(phba);
10698
10699 /* stop all timers */
10700 lpfc_stop_hba_timers(phba);
10701
0d878419
JS
10702 /* Clean up all driver's outstanding SCSI I/Os */
10703 lpfc_sli_flush_fcp_rings(phba);
10704}
10705
da0436e9
JS
10706/**
10707 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10708 * @pdev: pointer to PCI device.
10709 * @state: the current PCI connection state.
10710 *
10711 * This routine is called from the PCI subsystem for I/O error handling to
10712 * device with SLI-3 interface spec. This function is called by the PCI
10713 * subsystem after a PCI bus error affecting this device has been detected.
10714 * When this function is invoked, it will need to stop all the I/Os and
10715 * interrupt(s) to the device. Once that is done, it will return
10716 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10717 * as desired.
10718 *
10719 * Return codes
0d878419 10720 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS
10721 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10722 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10723 **/
10724static pci_ers_result_t
10725lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10726{
10727 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10728 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10729
0d878419
JS
10730 switch (state) {
10731 case pci_channel_io_normal:
891478a2
JS
10732 /* Non-fatal error, prepare for recovery */
10733 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS
10734 return PCI_ERS_RESULT_CAN_RECOVER;
10735 case pci_channel_io_frozen:
10736 /* Fatal error, prepare for slot reset */
10737 lpfc_sli_prep_dev_for_reset(phba);
10738 return PCI_ERS_RESULT_NEED_RESET;
10739 case pci_channel_io_perm_failure:
10740 /* Permanent failure, prepare for device down */
75baf696 10741 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 10742 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS
10743 default:
10744 /* Unknown state, prepare and request slot reset */
10745 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10746 "0472 Unknown PCI error state: x%x\n", state);
10747 lpfc_sli_prep_dev_for_reset(phba);
10748 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 10749 }
da0436e9
JS
10750}
10751
10752/**
10753 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
10754 * @pdev: pointer to PCI device.
10755 *
10756 * This routine is called from the PCI subsystem for error handling to
10757 * device with SLI-3 interface spec. This is called after PCI bus has been
10758 * reset to restart the PCI card from scratch, as if from a cold-boot.
10759 * During the PCI subsystem error recovery, after driver returns
10760 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
10761 * recovery and then call this routine before calling the .resume method
10762 * to recover the device. This function will initialize the HBA device,
10763 * enable the interrupt, but it will just put the HBA to offline state
10764 * without passing any I/O traffic.
10765 *
10766 * Return codes
10767 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
10768 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10769 */
10770static pci_ers_result_t
10771lpfc_io_slot_reset_s3(struct pci_dev *pdev)
10772{
10773 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10774 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10775 struct lpfc_sli *psli = &phba->sli;
10776 uint32_t intr_mode;
10777
10778 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
10779 if (pci_enable_device_mem(pdev)) {
10780 printk(KERN_ERR "lpfc: Cannot re-enable "
10781 "PCI device after reset.\n");
10782 return PCI_ERS_RESULT_DISCONNECT;
10783 }
10784
10785 pci_restore_state(pdev);
1dfb5a47
JS
10786
10787 /*
10788 * As the new kernel behavior of pci_restore_state() API call clears
10789 * device saved_state flag, need to save the restored state again.
10790 */
10791 pci_save_state(pdev);
10792
da0436e9
JS
10793 if (pdev->is_busmaster)
10794 pci_set_master(pdev);
10795
10796 spin_lock_irq(&phba->hbalock);
10797 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
10798 spin_unlock_irq(&phba->hbalock);
10799
10800 /* Configure and enable interrupt */
10801 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10802 if (intr_mode == LPFC_INTR_ERROR) {
10803 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10804 "0427 Cannot re-enable interrupt after "
10805 "slot reset.\n");
10806 return PCI_ERS_RESULT_DISCONNECT;
10807 } else
10808 phba->intr_mode = intr_mode;
10809
75baf696 10810 /* Take device offline, it will perform cleanup */
618a5230 10811 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10812 lpfc_offline(phba);
10813 lpfc_sli_brdrestart(phba);
10814
10815 /* Log the current active interrupt mode */
10816 lpfc_log_intr_mode(phba, phba->intr_mode);
10817
10818 return PCI_ERS_RESULT_RECOVERED;
10819}
10820
10821/**
10822 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
10823 * @pdev: pointer to PCI device
10824 *
10825 * This routine is called from the PCI subsystem for error handling to device
10826 * with SLI-3 interface spec. It is called when kernel error recovery tells
10827 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
10828 * error recovery. After this call, traffic can start to flow from this device
10829 * again.
10830 */
10831static void
10832lpfc_io_resume_s3(struct pci_dev *pdev)
10833{
10834 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10835 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 10836
e2af0d2e 10837 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 10838 lpfc_online(phba);
0d878419
JS
10839
10840 /* Clean up Advanced Error Reporting (AER) if needed */
10841 if (phba->hba_flag & HBA_AER_ENABLED)
10842 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 10843}
3772a991 10844
da0436e9
JS
10845/**
10846 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
10847 * @phba: pointer to lpfc hba data structure.
10848 *
10849 * returns the number of ELS/CT IOCBs to reserve
10850 **/
10851int
10852lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
10853{
10854 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
10855
f1126688
JS
10856 if (phba->sli_rev == LPFC_SLI_REV4) {
10857 if (max_xri <= 100)
6a9c52cf 10858 return 10;
f1126688 10859 else if (max_xri <= 256)
6a9c52cf 10860 return 25;
f1126688 10861 else if (max_xri <= 512)
6a9c52cf 10862 return 50;
f1126688 10863 else if (max_xri <= 1024)
6a9c52cf 10864 return 100;
8a9d2e80 10865 else if (max_xri <= 1536)
6a9c52cf 10866 return 150;
8a9d2e80
JS
10867 else if (max_xri <= 2048)
10868 return 200;
10869 else
10870 return 250;
f1126688
JS
10871 } else
10872 return 0;
3772a991
JS
10873}
10874
895427bd
JS
10875/**
10876 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
10877 * @phba: pointer to lpfc hba data structure.
10878 *
f358dd0c 10879 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS
10880 **/
10881int
10882lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
10883{
10884 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
10885
f358dd0c
JS
10886 if (phba->nvmet_support)
10887 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS
10888 return max_xri;
10889}
10890
10891
52d52440
JS
10892/**
10893 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 10894 * @fw: pointer to firmware image returned from request_firmware.
ce396282 10895 * @phba: pointer to lpfc hba data structure.
52d52440 10896 *
52d52440 10897 **/
ce396282
JS
10898static void
10899lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 10900{
ce396282 10901 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 10902 char fwrev[FW_REV_STR_SIZE];
ce396282 10903 struct lpfc_grp_hdr *image;
52d52440
JS
10904 struct list_head dma_buffer_list;
10905 int i, rc = 0;
10906 struct lpfc_dmabuf *dmabuf, *next;
10907 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 10908 uint32_t magic_number, ftype, fid, fsize;
52d52440 10909
c71ab861 10910 /* It can be null in no-wait mode, sanity check */
ce396282
JS
10911 if (!fw) {
10912 rc = -ENXIO;
10913 goto out;
10914 }
10915 image = (struct lpfc_grp_hdr *)fw->data;
10916
6b6ef5db
JS
10917 magic_number = be32_to_cpu(image->magic_number);
10918 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
10919 fid = bf_get_be32(lpfc_grp_hdr_id, image),
10920 fsize = be32_to_cpu(image->size);
10921
52d52440 10922 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS
10923 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
10924 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
10925 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS
10926 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10927 "3022 Invalid FW image found. "
efe583c6 10928 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 10929 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS
10930 rc = -EINVAL;
10931 goto release_out;
52d52440
JS
10932 }
10933 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 10934 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 10935 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 10936 "3023 Updating Firmware, Current Version:%s "
52d52440 10937 "New Version:%s\n",
88a2cfbb 10938 fwrev, image->revision);
52d52440
JS
10939 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
10940 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
10941 GFP_KERNEL);
10942 if (!dmabuf) {
10943 rc = -ENOMEM;
ce396282 10944 goto release_out;
52d52440
JS
10945 }
10946 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
10947 SLI4_PAGE_SIZE,
10948 &dmabuf->phys,
10949 GFP_KERNEL);
10950 if (!dmabuf->virt) {
10951 kfree(dmabuf);
10952 rc = -ENOMEM;
ce396282 10953 goto release_out;
52d52440
JS
10954 }
10955 list_add_tail(&dmabuf->list, &dma_buffer_list);
10956 }
10957 while (offset < fw->size) {
10958 temp_offset = offset;
10959 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 10960 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS
10961 memcpy(dmabuf->virt,
10962 fw->data + temp_offset,
079b5c91
JS
10963 fw->size - temp_offset);
10964 temp_offset = fw->size;
52d52440
JS
10965 break;
10966 }
52d52440
JS
10967 memcpy(dmabuf->virt, fw->data + temp_offset,
10968 SLI4_PAGE_SIZE);
88a2cfbb 10969 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS
10970 }
10971 rc = lpfc_wr_object(phba, &dma_buffer_list,
10972 (fw->size - offset), &offset);
ce396282
JS
10973 if (rc)
10974 goto release_out;
52d52440
JS
10975 }
10976 rc = offset;
10977 }
ce396282
JS
10978
10979release_out:
52d52440
JS
10980 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
10981 list_del(&dmabuf->list);
10982 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
10983 dmabuf->virt, dmabuf->phys);
10984 kfree(dmabuf);
10985 }
ce396282
JS
10986 release_firmware(fw);
10987out:
10988 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 10989 "3024 Firmware update done: %d.\n", rc);
ce396282 10990 return;
52d52440
JS
10991}
10992
c71ab861
JS
10993/**
10994 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
10995 * @phba: pointer to lpfc hba data structure.
10996 *
10997 * This routine is called to perform Linux generic firmware upgrade on device
10998 * that supports such feature.
10999 **/
11000int
11001lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
11002{
11003 uint8_t file_name[ELX_MODEL_NAME_SIZE];
11004 int ret;
11005 const struct firmware *fw;
11006
11007 /* Only supported on SLI4 interface type 2 for now */
11008 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11009 LPFC_SLI_INTF_IF_TYPE_2)
11010 return -EPERM;
11011
11012 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
11013
11014 if (fw_upgrade == INT_FW_UPGRADE) {
11015 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
11016 file_name, &phba->pcidev->dev,
11017 GFP_KERNEL, (void *)phba,
11018 lpfc_write_firmware);
11019 } else if (fw_upgrade == RUN_FW_UPGRADE) {
11020 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
11021 if (!ret)
11022 lpfc_write_firmware(fw, (void *)phba);
11023 } else {
11024 ret = -EINVAL;
11025 }
11026
11027 return ret;
11028}
11029
3772a991 11030/**
da0436e9 11031 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS
11032 * @pdev: pointer to PCI device
11033 * @pid: pointer to PCI device identifier
11034 *
da0436e9
JS
11035 * This routine is called from the kernel's PCI subsystem to device with
11036 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 11037 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS
11038 * information of the device and driver to see if the driver state that it
11039 * can support this kind of device. If the match is successful, the driver
11040 * core invokes this routine. If this routine determines it can claim the HBA,
11041 * it does all the initialization that it needs to do to handle the HBA
11042 * properly.
3772a991
JS
11043 *
11044 * Return code
11045 * 0 - driver can claim the device
11046 * negative value - driver can not claim the device
11047 **/
6f039790 11048static int
da0436e9 11049lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS
11050{
11051 struct lpfc_hba *phba;
11052 struct lpfc_vport *vport = NULL;
6669f9bb 11053 struct Scsi_Host *shost = NULL;
db6f1c2f 11054 int error;
3772a991
JS
11055 uint32_t cfg_mode, intr_mode;
11056
11057 /* Allocate memory for HBA structure */
11058 phba = lpfc_hba_alloc(pdev);
11059 if (!phba)
11060 return -ENOMEM;
11061
11062 /* Perform generic PCI device enabling operation */
11063 error = lpfc_enable_pci_dev(phba);
079b5c91 11064 if (error)
3772a991 11065 goto out_free_phba;
3772a991 11066
da0436e9
JS
11067 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
11068 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS
11069 if (error)
11070 goto out_disable_pci_dev;
11071
da0436e9
JS
11072 /* Set up SLI-4 specific device PCI memory space */
11073 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS
11074 if (error) {
11075 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11076 "1410 Failed to set up pci memory space.\n");
3772a991
JS
11077 goto out_disable_pci_dev;
11078 }
11079
da0436e9
JS
11080 /* Set up SLI-4 Specific device driver resources */
11081 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS
11082 if (error) {
11083 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
11084 "1412 Failed to set up driver resource.\n");
11085 goto out_unset_pci_mem_s4;
3772a991
JS
11086 }
11087
11088 /* Initialize and populate the iocb list per host */
2a9bf3d0
JS
11089
11090 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11091 "2821 initialize iocb list %d.\n",
11092 phba->cfg_iocb_cnt*1024);
11093 error = lpfc_init_iocb_list(phba, phba->cfg_iocb_cnt*1024);
11094
3772a991
JS
11095 if (error) {
11096 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
11097 "1413 Failed to initialize iocb list.\n");
11098 goto out_unset_driver_resource_s4;
3772a991
JS
11099 }
11100
19ca7609 11101 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 11102 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 11103
3772a991
JS
11104 /* Set up common device driver resources */
11105 error = lpfc_setup_driver_resource_phase2(phba);
11106 if (error) {
11107 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11108 "1414 Failed to set up driver resource.\n");
3772a991
JS
11109 goto out_free_iocb_list;
11110 }
11111
079b5c91
JS
11112 /* Get the default values for Model Name and Description */
11113 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11114
3772a991
JS
11115 /* Create SCSI host to the physical port */
11116 error = lpfc_create_shost(phba);
11117 if (error) {
11118 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11119 "1415 Failed to create scsi host.\n");
3772a991
JS
11120 goto out_unset_driver_resource;
11121 }
9399627f 11122
5b75da2f 11123 /* Configure sysfs attributes */
3772a991
JS
11124 vport = phba->pport;
11125 error = lpfc_alloc_sysfs_attr(vport);
11126 if (error) {
9399627f 11127 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11128 "1416 Failed to allocate sysfs attr\n");
3772a991 11129 goto out_destroy_shost;
98c9ea5c 11130 }
875fbdfe 11131
6669f9bb 11132 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 11133 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 11134 cfg_mode = phba->cfg_use_msi;
5b75da2f 11135
7b15db32
JS
11136 /* Put device to a known state before enabling interrupt */
11137 lpfc_stop_port(phba);
895427bd 11138
7b15db32
JS
11139 /* Configure and enable interrupt */
11140 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
11141 if (intr_mode == LPFC_INTR_ERROR) {
11142 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11143 "0426 Failed to enable interrupt.\n");
11144 error = -ENODEV;
11145 goto out_free_sysfs_attr;
11146 }
11147 /* Default to single EQ for non-MSI-X */
895427bd
JS
11148 if (phba->intr_type != MSIX) {
11149 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
11150 phba->cfg_fcp_io_channel = 1;
2d7dbc4c 11151 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd 11152 phba->cfg_nvme_io_channel = 1;
2d7dbc4c
JS
11153 if (phba->nvmet_support)
11154 phba->cfg_nvmet_mrq = 1;
11155 }
895427bd
JS
11156 phba->io_channel_irqs = 1;
11157 }
11158
7b15db32
JS
11159 /* Set up SLI-4 HBA */
11160 if (lpfc_sli4_hba_setup(phba)) {
11161 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11162 "1421 Failed to set up hba\n");
11163 error = -ENODEV;
11164 goto out_disable_intr;
98c9ea5c 11165 }
858c9f6c 11166
7b15db32
JS
11167 /* Log the current active interrupt mode */
11168 phba->intr_mode = intr_mode;
11169 lpfc_log_intr_mode(phba, intr_mode);
11170
3772a991
JS
11171 /* Perform post initialization setup */
11172 lpfc_post_init_setup(phba);
dea3101e 11173
01649561
JS
11174 /* NVME support in FW earlier in the driver load corrects the
11175 * FC4 type making a check for nvme_support unnecessary.
11176 */
11177 if ((phba->nvmet_support == 0) &&
11178 (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
11179 /* Create NVME binding with nvme_fc_transport. This
11180 * ensures the vport is initialized.
11181 */
11182 error = lpfc_nvme_create_localport(vport);
11183 if (error) {
11184 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11185 "6004 NVME registration failed, "
11186 "error x%x\n",
11187 error);
11188 goto out_disable_intr;
11189 }
11190 }
895427bd 11191
c71ab861
JS
11192 /* check for firmware upgrade or downgrade */
11193 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 11194 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 11195
1c6834a7
JS
11196 /* Check if there are static vports to be created. */
11197 lpfc_create_static_vport(phba);
dea3101e
JB
11198 return 0;
11199
da0436e9
JS
11200out_disable_intr:
11201 lpfc_sli4_disable_intr(phba);
5b75da2f
JS
11202out_free_sysfs_attr:
11203 lpfc_free_sysfs_attr(vport);
3772a991
JS
11204out_destroy_shost:
11205 lpfc_destroy_shost(phba);
11206out_unset_driver_resource:
11207 lpfc_unset_driver_resource_phase2(phba);
11208out_free_iocb_list:
11209 lpfc_free_iocb_list(phba);
da0436e9
JS
11210out_unset_driver_resource_s4:
11211 lpfc_sli4_driver_resource_unset(phba);
11212out_unset_pci_mem_s4:
11213 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS
11214out_disable_pci_dev:
11215 lpfc_disable_pci_dev(phba);
6669f9bb
JS
11216 if (shost)
11217 scsi_host_put(shost);
2e0fef85 11218out_free_phba:
3772a991 11219 lpfc_hba_free(phba);
dea3101e
JB
11220 return error;
11221}
11222
e59058c4 11223/**
da0436e9 11224 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS
11225 * @pdev: pointer to PCI device
11226 *
da0436e9
JS
11227 * This routine is called from the kernel's PCI subsystem to device with
11228 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS
11229 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11230 * device to be removed from the PCI subsystem properly.
e59058c4 11231 **/
6f039790 11232static void
da0436e9 11233lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 11234{
da0436e9 11235 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 11236 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 11237 struct lpfc_vport **vports;
da0436e9 11238 struct lpfc_hba *phba = vport->phba;
eada272d 11239 int i;
8a4df120 11240
da0436e9 11241 /* Mark the device unloading flag */
549e55cd 11242 spin_lock_irq(&phba->hbalock);
51ef4c26 11243 vport->load_flag |= FC_UNLOADING;
549e55cd 11244 spin_unlock_irq(&phba->hbalock);
2e0fef85 11245
da0436e9 11246 /* Free the HBA sysfs attributes */
858c9f6c
JS
11247 lpfc_free_sysfs_attr(vport);
11248
eada272d
JS
11249 /* Release all the vports against this physical port */
11250 vports = lpfc_create_vport_work_array(phba);
11251 if (vports != NULL)
587a37f6
JS
11252 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11253 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11254 continue;
eada272d 11255 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11256 }
eada272d
JS
11257 lpfc_destroy_vport_work_array(phba, vports);
11258
11259 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS
11260 fc_remove_host(shost);
11261 scsi_remove_host(shost);
da0436e9 11262
d613b6a7
JS
11263 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
11264 * localports are destroyed after to cleanup all transport memory.
895427bd 11265 */
87af33fe 11266 lpfc_cleanup(vport);
d613b6a7
JS
11267 lpfc_nvmet_destroy_targetport(phba);
11268 lpfc_nvme_destroy_localport(vport);
87af33fe 11269
2e0fef85 11270 /*
da0436e9 11271 * Bring down the SLI Layer. This step disables all interrupts,
2e0fef85 11272 * clears the rings, discards all mailbox commands, and resets
da0436e9 11273 * the HBA FCoE function.
2e0fef85 11274 */
da0436e9
JS
11275 lpfc_debugfs_terminate(vport);
11276 lpfc_sli4_hba_unset(phba);
a257bf90 11277
858c9f6c
JS
11278 spin_lock_irq(&phba->hbalock);
11279 list_del_init(&vport->listentry);
11280 spin_unlock_irq(&phba->hbalock);
11281
3677a3a7 11282 /* Perform scsi free before driver resource_unset since scsi
da0436e9 11283 * buffers are released to their corresponding pools here.
2e0fef85
JS
11284 */
11285 lpfc_scsi_free(phba);
895427bd 11286 lpfc_nvme_free(phba);
01649561 11287 lpfc_free_iocb_list(phba);
67d12733 11288
da0436e9 11289 lpfc_sli4_driver_resource_unset(phba);
ed957684 11290
da0436e9
JS
11291 /* Unmap adapter Control and Doorbell registers */
11292 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 11293
da0436e9
JS
11294 /* Release PCI resources and disable device's PCI function */
11295 scsi_host_put(shost);
11296 lpfc_disable_pci_dev(phba);
2e0fef85 11297
da0436e9 11298 /* Finally, free the driver's device data structure */
3772a991 11299 lpfc_hba_free(phba);
2e0fef85 11300
da0436e9 11301 return;
dea3101e
JB
11302}
11303
3a55b532 11304/**
da0436e9 11305 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS
11306 * @pdev: pointer to PCI device
11307 * @msg: power management message
11308 *
da0436e9
JS
11309 * This routine is called from the kernel's PCI subsystem to support system
11310 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
11311 * this method, it quiesces the device by stopping the driver's worker
11312 * thread for the device, turning off device's interrupt and DMA, and bring
11313 * the device offline. Note that as the driver implements the minimum PM
11314 * requirements to a power-aware driver's PM support for suspend/resume -- all
11315 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
11316 * method call will be treated as SUSPEND and the driver will fully
11317 * reinitialize its device during resume() method call, the driver will set
11318 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 11319 * according to the @msg provided by the PM.
3a55b532
JS
11320 *
11321 * Return code
3772a991
JS
11322 * 0 - driver suspended the device
11323 * Error otherwise
3a55b532
JS
11324 **/
11325static int
da0436e9 11326lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS
11327{
11328 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11329 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11330
11331 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 11332 "2843 PCI device Power Management suspend.\n");
3a55b532
JS
11333
11334 /* Bring down the device */
618a5230 11335 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS
11336 lpfc_offline(phba);
11337 kthread_stop(phba->worker_thread);
11338
11339 /* Disable interrupt from device */
da0436e9 11340 lpfc_sli4_disable_intr(phba);
5350d872 11341 lpfc_sli4_queue_destroy(phba);
3a55b532
JS
11342
11343 /* Save device state to PCI config space */
11344 pci_save_state(pdev);
11345 pci_set_power_state(pdev, PCI_D3hot);
11346
11347 return 0;
11348}
11349
11350/**
da0436e9 11351 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS
11352 * @pdev: pointer to PCI device
11353 *
da0436e9
JS
11354 * This routine is called from the kernel's PCI subsystem to support system
11355 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
11356 * this method, it restores the device's PCI config space state and fully
11357 * reinitializes the device and brings it online. Note that as the driver
11358 * implements the minimum PM requirements to a power-aware driver's PM for
11359 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11360 * to the suspend() method call will be treated as SUSPEND and the driver
11361 * will fully reinitialize its device during resume() method call, the device
11362 * will be set to PCI_D0 directly in PCI config space before restoring the
11363 * state.
3a55b532
JS
11364 *
11365 * Return code
3772a991
JS
11366 * 0 - driver suspended the device
11367 * Error otherwise
3a55b532
JS
11368 **/
11369static int
da0436e9 11370lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS
11371{
11372 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11373 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 11374 uint32_t intr_mode;
3a55b532
JS
11375 int error;
11376
11377 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 11378 "0292 PCI device Power Management resume.\n");
3a55b532
JS
11379
11380 /* Restore device state from PCI config space */
11381 pci_set_power_state(pdev, PCI_D0);
11382 pci_restore_state(pdev);
1dfb5a47
JS
11383
11384 /*
11385 * As the new kernel behavior of pci_restore_state() API call clears
11386 * device saved_state flag, need to save the restored state again.
11387 */
11388 pci_save_state(pdev);
11389
3a55b532
JS
11390 if (pdev->is_busmaster)
11391 pci_set_master(pdev);
11392
da0436e9 11393 /* Startup the kernel thread for this host adapter. */
3a55b532
JS
11394 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11395 "lpfc_worker_%d", phba->brd_no);
11396 if (IS_ERR(phba->worker_thread)) {
11397 error = PTR_ERR(phba->worker_thread);
11398 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11399 "0293 PM resume failed to start worker "
3a55b532
JS
11400 "thread: error=x%x.\n", error);
11401 return error;
11402 }
11403
5b75da2f 11404 /* Configure and enable interrupt */
da0436e9 11405 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 11406 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 11407 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11408 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS
11409 return -EIO;
11410 } else
11411 phba->intr_mode = intr_mode;
3a55b532
JS
11412
11413 /* Restart HBA and bring it online */
11414 lpfc_sli_brdrestart(phba);
11415 lpfc_online(phba);
11416
5b75da2f
JS
11417 /* Log the current active interrupt mode */
11418 lpfc_log_intr_mode(phba, phba->intr_mode);
11419
3a55b532
JS
11420 return 0;
11421}
11422
75baf696
JS
11423/**
11424 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
11425 * @phba: pointer to lpfc hba data structure.
11426 *
11427 * This routine is called to prepare the SLI4 device for PCI slot recover. It
11428 * aborts all the outstanding SCSI I/Os to the pci device.
11429 **/
11430static void
11431lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
11432{
75baf696
JS
11433 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11434 "2828 PCI channel I/O abort preparing for recovery\n");
11435 /*
11436 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11437 * and let the SCSI mid-layer to retry them to recover.
11438 */
db55fba8 11439 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS
11440}
11441
11442/**
11443 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
11444 * @phba: pointer to lpfc hba data structure.
11445 *
11446 * This routine is called to prepare the SLI4 device for PCI slot reset. It
11447 * disables the device interrupt and pci device, and aborts the internal FCP
11448 * pending I/Os.
11449 **/
11450static void
11451lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
11452{
11453 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11454 "2826 PCI channel disable preparing for reset\n");
11455
11456 /* Block any management I/Os to the device */
618a5230 11457 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS
11458
11459 /* Block all SCSI devices' I/Os on the host */
11460 lpfc_scsi_dev_block(phba);
11461
ea714f3d
JS
11462 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11463 lpfc_sli_flush_fcp_rings(phba);
11464
75baf696
JS
11465 /* stop all timers */
11466 lpfc_stop_hba_timers(phba);
11467
11468 /* Disable interrupt and pci device */
11469 lpfc_sli4_disable_intr(phba);
5350d872 11470 lpfc_sli4_queue_destroy(phba);
75baf696 11471 pci_disable_device(phba->pcidev);
75baf696
JS
11472}
11473
11474/**
11475 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
11476 * @phba: pointer to lpfc hba data structure.
11477 *
11478 * This routine is called to prepare the SLI4 device for PCI slot permanently
11479 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11480 * pending I/Os.
11481 **/
11482static void
11483lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
11484{
11485 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11486 "2827 PCI channel permanent disable for failure\n");
11487
11488 /* Block all SCSI devices' I/Os on the host */
11489 lpfc_scsi_dev_block(phba);
11490
11491 /* stop all timers */
11492 lpfc_stop_hba_timers(phba);
11493
11494 /* Clean up all driver's outstanding SCSI I/Os */
11495 lpfc_sli_flush_fcp_rings(phba);
11496}
11497
8d63f375 11498/**
da0436e9 11499 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS
11500 * @pdev: pointer to PCI device.
11501 * @state: the current PCI connection state.
8d63f375 11502 *
da0436e9
JS
11503 * This routine is called from the PCI subsystem for error handling to device
11504 * with SLI-4 interface spec. This function is called by the PCI subsystem
11505 * after a PCI bus error affecting this device has been detected. When this
11506 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11507 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11508 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS
11509 *
11510 * Return codes
3772a991
JS
11511 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11512 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11513 **/
3772a991 11514static pci_ers_result_t
da0436e9 11515lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11516{
75baf696
JS
11517 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11518 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11519
11520 switch (state) {
11521 case pci_channel_io_normal:
11522 /* Non-fatal error, prepare for recovery */
11523 lpfc_sli4_prep_dev_for_recover(phba);
11524 return PCI_ERS_RESULT_CAN_RECOVER;
11525 case pci_channel_io_frozen:
11526 /* Fatal error, prepare for slot reset */
11527 lpfc_sli4_prep_dev_for_reset(phba);
11528 return PCI_ERS_RESULT_NEED_RESET;
11529 case pci_channel_io_perm_failure:
11530 /* Permanent failure, prepare for device down */
11531 lpfc_sli4_prep_dev_for_perm_failure(phba);
11532 return PCI_ERS_RESULT_DISCONNECT;
11533 default:
11534 /* Unknown state, prepare and request slot reset */
11535 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11536 "2825 Unknown PCI error state: x%x\n", state);
11537 lpfc_sli4_prep_dev_for_reset(phba);
11538 return PCI_ERS_RESULT_NEED_RESET;
11539 }
8d63f375
LV
11540}
11541
11542/**
da0436e9 11543 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS
11544 * @pdev: pointer to PCI device.
11545 *
da0436e9
JS
11546 * This routine is called from the PCI subsystem for error handling to device
11547 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11548 * restart the PCI card from scratch, as if from a cold-boot. During the
11549 * PCI subsystem error recovery, after the driver returns
3772a991 11550 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS
11551 * recovery and then call this routine before calling the .resume method to
11552 * recover the device. This function will initialize the HBA device, enable
11553 * the interrupt, but it will just put the HBA to offline state without
11554 * passing any I/O traffic.
8d63f375 11555 *
e59058c4 11556 * Return codes
3772a991
JS
11557 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11558 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11559 */
3772a991 11560static pci_ers_result_t
da0436e9 11561lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11562{
75baf696
JS
11563 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11564 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11565 struct lpfc_sli *psli = &phba->sli;
11566 uint32_t intr_mode;
11567
11568 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11569 if (pci_enable_device_mem(pdev)) {
11570 printk(KERN_ERR "lpfc: Cannot re-enable "
11571 "PCI device after reset.\n");
11572 return PCI_ERS_RESULT_DISCONNECT;
11573 }
11574
11575 pci_restore_state(pdev);
0a96e975
JS
11576
11577 /*
11578 * As the new kernel behavior of pci_restore_state() API call clears
11579 * device saved_state flag, need to save the restored state again.
11580 */
11581 pci_save_state(pdev);
11582
75baf696
JS
11583 if (pdev->is_busmaster)
11584 pci_set_master(pdev);
11585
11586 spin_lock_irq(&phba->hbalock);
11587 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11588 spin_unlock_irq(&phba->hbalock);
11589
11590 /* Configure and enable interrupt */
11591 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11592 if (intr_mode == LPFC_INTR_ERROR) {
11593 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11594 "2824 Cannot re-enable interrupt after "
11595 "slot reset.\n");
11596 return PCI_ERS_RESULT_DISCONNECT;
11597 } else
11598 phba->intr_mode = intr_mode;
11599
11600 /* Log the current active interrupt mode */
11601 lpfc_log_intr_mode(phba, phba->intr_mode);
11602
8d63f375
LV
11603 return PCI_ERS_RESULT_RECOVERED;
11604}
11605
11606/**
da0436e9 11607 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11608 * @pdev: pointer to PCI device
8d63f375 11609 *
3772a991 11610 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11611 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS
11612 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11613 * error recovery. After this call, traffic can start to flow from this device
11614 * again.
da0436e9 11615 **/
3772a991 11616static void
da0436e9 11617lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11618{
75baf696
JS
11619 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11620 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11621
11622 /*
11623 * In case of slot reset, as function reset is performed through
11624 * mailbox command which needs DMA to be enabled, this operation
11625 * has to be moved to the io resume phase. Taking device offline
11626 * will perform the necessary cleanup.
11627 */
11628 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11629 /* Perform device reset */
618a5230 11630 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS
11631 lpfc_offline(phba);
11632 lpfc_sli_brdrestart(phba);
11633 /* Bring the device back online */
11634 lpfc_online(phba);
11635 }
11636
11637 /* Clean up Advanced Error Reporting (AER) if needed */
11638 if (phba->hba_flag & HBA_AER_ENABLED)
11639 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV
11640}
11641
3772a991
JS
11642/**
11643 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11644 * @pdev: pointer to PCI device
11645 * @pid: pointer to PCI device identifier
11646 *
11647 * This routine is to be registered to the kernel's PCI subsystem. When an
11648 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11649 * at PCI device-specific information of the device and driver to see if the
11650 * driver state that it can support this kind of device. If the match is
11651 * successful, the driver core invokes this routine. This routine dispatches
11652 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11653 * do all the initialization that it needs to do to handle the HBA device
11654 * properly.
11655 *
11656 * Return code
11657 * 0 - driver can claim the device
11658 * negative value - driver can not claim the device
11659 **/
6f039790 11660static int
3772a991
JS
11661lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11662{
11663 int rc;
8fa38513 11664 struct lpfc_sli_intf intf;
3772a991 11665
28baac74 11666 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS
11667 return -ENODEV;
11668
8fa38513 11669 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11670 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11671 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11672 else
3772a991 11673 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11674
3772a991
JS
11675 return rc;
11676}
11677
11678/**
11679 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11680 * @pdev: pointer to PCI device
11681 *
11682 * This routine is to be registered to the kernel's PCI subsystem. When an
11683 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11684 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11685 * remove routine, which will perform all the necessary cleanup for the
11686 * device to be removed from the PCI subsystem properly.
11687 **/
6f039790 11688static void
3772a991
JS
11689lpfc_pci_remove_one(struct pci_dev *pdev)
11690{
11691 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11692 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11693
11694 switch (phba->pci_dev_grp) {
11695 case LPFC_PCI_DEV_LP:
11696 lpfc_pci_remove_one_s3(pdev);
11697 break;
da0436e9
JS
11698 case LPFC_PCI_DEV_OC:
11699 lpfc_pci_remove_one_s4(pdev);
11700 break;
3772a991
JS
11701 default:
11702 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11703 "1424 Invalid PCI device group: 0x%x\n",
11704 phba->pci_dev_grp);
11705 break;
11706 }
11707 return;
11708}
11709
11710/**
11711 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11712 * @pdev: pointer to PCI device
11713 * @msg: power management message
11714 *
11715 * This routine is to be registered to the kernel's PCI subsystem to support
11716 * system Power Management (PM). When PM invokes this method, it dispatches
11717 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11718 * suspend the device.
11719 *
11720 * Return code
11721 * 0 - driver suspended the device
11722 * Error otherwise
11723 **/
11724static int
11725lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11726{
11727 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11728 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11729 int rc = -ENODEV;
11730
11731 switch (phba->pci_dev_grp) {
11732 case LPFC_PCI_DEV_LP:
11733 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11734 break;
da0436e9
JS
11735 case LPFC_PCI_DEV_OC:
11736 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11737 break;
3772a991
JS
11738 default:
11739 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11740 "1425 Invalid PCI device group: 0x%x\n",
11741 phba->pci_dev_grp);
11742 break;
11743 }
11744 return rc;
11745}
11746
11747/**
11748 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
11749 * @pdev: pointer to PCI device
11750 *
11751 * This routine is to be registered to the kernel's PCI subsystem to support
11752 * system Power Management (PM). When PM invokes this method, it dispatches
11753 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
11754 * resume the device.
11755 *
11756 * Return code
11757 * 0 - driver suspended the device
11758 * Error otherwise
11759 **/
11760static int
11761lpfc_pci_resume_one(struct pci_dev *pdev)
11762{
11763 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11764 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11765 int rc = -ENODEV;
11766
11767 switch (phba->pci_dev_grp) {
11768 case LPFC_PCI_DEV_LP:
11769 rc = lpfc_pci_resume_one_s3(pdev);
11770 break;
da0436e9
JS
11771 case LPFC_PCI_DEV_OC:
11772 rc = lpfc_pci_resume_one_s4(pdev);
11773 break;
3772a991
JS
11774 default:
11775 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11776 "1426 Invalid PCI device group: 0x%x\n",
11777 phba->pci_dev_grp);
11778 break;
11779 }
11780 return rc;
11781}
11782
11783/**
11784 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
11785 * @pdev: pointer to PCI device.
11786 * @state: the current PCI connection state.
11787 *
11788 * This routine is registered to the PCI subsystem for error handling. This
11789 * function is called by the PCI subsystem after a PCI bus error affecting
11790 * this device has been detected. When this routine is invoked, it dispatches
11791 * the action to the proper SLI-3 or SLI-4 device error detected handling
11792 * routine, which will perform the proper error detected operation.
11793 *
11794 * Return codes
11795 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11796 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11797 **/
11798static pci_ers_result_t
11799lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
11800{
11801 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11802 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11803 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11804
11805 switch (phba->pci_dev_grp) {
11806 case LPFC_PCI_DEV_LP:
11807 rc = lpfc_io_error_detected_s3(pdev, state);
11808 break;
da0436e9
JS
11809 case LPFC_PCI_DEV_OC:
11810 rc = lpfc_io_error_detected_s4(pdev, state);
11811 break;
3772a991
JS
11812 default:
11813 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11814 "1427 Invalid PCI device group: 0x%x\n",
11815 phba->pci_dev_grp);
11816 break;
11817 }
11818 return rc;
11819}
11820
11821/**
11822 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
11823 * @pdev: pointer to PCI device.
11824 *
11825 * This routine is registered to the PCI subsystem for error handling. This
11826 * function is called after PCI bus has been reset to restart the PCI card
11827 * from scratch, as if from a cold-boot. When this routine is invoked, it
11828 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
11829 * routine, which will perform the proper device reset.
11830 *
11831 * Return codes
11832 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11833 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11834 **/
11835static pci_ers_result_t
11836lpfc_io_slot_reset(struct pci_dev *pdev)
11837{
11838 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11839 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11840 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11841
11842 switch (phba->pci_dev_grp) {
11843 case LPFC_PCI_DEV_LP:
11844 rc = lpfc_io_slot_reset_s3(pdev);
11845 break;
da0436e9
JS
11846 case LPFC_PCI_DEV_OC:
11847 rc = lpfc_io_slot_reset_s4(pdev);
11848 break;
3772a991
JS
11849 default:
11850 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11851 "1428 Invalid PCI device group: 0x%x\n",
11852 phba->pci_dev_grp);
11853 break;
11854 }
11855 return rc;
11856}
11857
11858/**
11859 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
11860 * @pdev: pointer to PCI device
11861 *
11862 * This routine is registered to the PCI subsystem for error handling. It
11863 * is called when kernel error recovery tells the lpfc driver that it is
11864 * OK to resume normal PCI operation after PCI bus error recovery. When
11865 * this routine is invoked, it dispatches the action to the proper SLI-3
11866 * or SLI-4 device io_resume routine, which will resume the device operation.
11867 **/
11868static void
11869lpfc_io_resume(struct pci_dev *pdev)
11870{
11871 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11872 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11873
11874 switch (phba->pci_dev_grp) {
11875 case LPFC_PCI_DEV_LP:
11876 lpfc_io_resume_s3(pdev);
11877 break;
da0436e9
JS
11878 case LPFC_PCI_DEV_OC:
11879 lpfc_io_resume_s4(pdev);
11880 break;
3772a991
JS
11881 default:
11882 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11883 "1429 Invalid PCI device group: 0x%x\n",
11884 phba->pci_dev_grp);
11885 break;
11886 }
11887 return;
11888}
11889
1ba981fd
JS
11890/**
11891 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
11892 * @phba: pointer to lpfc hba data structure.
11893 *
11894 * This routine checks to see if OAS is supported for this adapter. If
11895 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
11896 * the enable oas flag is cleared and the pool created for OAS device data
11897 * is destroyed.
11898 *
11899 **/
11900void
11901lpfc_sli4_oas_verify(struct lpfc_hba *phba)
11902{
11903
11904 if (!phba->cfg_EnableXLane)
11905 return;
11906
11907 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
11908 phba->cfg_fof = 1;
11909 } else {
f38fa0bb 11910 phba->cfg_fof = 0;
1ba981fd
JS
11911 if (phba->device_data_mem_pool)
11912 mempool_destroy(phba->device_data_mem_pool);
11913 phba->device_data_mem_pool = NULL;
11914 }
11915
11916 return;
11917}
11918
11919/**
11920 * lpfc_fof_queue_setup - Set up all the fof queues
11921 * @phba: pointer to lpfc hba data structure.
11922 *
11923 * This routine is invoked to set up all the fof queues for the FC HBA
11924 * operation.
11925 *
11926 * Return codes
11927 * 0 - successful
11928 * -ENOMEM - No available memory
11929 **/
11930int
11931lpfc_fof_queue_setup(struct lpfc_hba *phba)
11932{
895427bd 11933 struct lpfc_sli_ring *pring;
1ba981fd
JS
11934 int rc;
11935
11936 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
11937 if (rc)
11938 return -ENOMEM;
11939
f38fa0bb 11940 if (phba->cfg_fof) {
1ba981fd
JS
11941
11942 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
11943 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
11944 if (rc)
11945 goto out_oas_cq;
11946
11947 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
11948 phba->sli4_hba.oas_cq, LPFC_FCP);
11949 if (rc)
11950 goto out_oas_wq;
11951
895427bd
JS
11952 /* Bind this CQ/WQ to the NVME ring */
11953 pring = phba->sli4_hba.oas_wq->pring;
11954 pring->sli.sli4.wqp =
11955 (void *)phba->sli4_hba.oas_wq;
11956 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS
11957 }
11958
11959 return 0;
11960
11961out_oas_wq:
f38fa0bb 11962 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS
11963out_oas_cq:
11964 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
11965 return rc;
11966
11967}
11968
11969/**
11970 * lpfc_fof_queue_create - Create all the fof queues
11971 * @phba: pointer to lpfc hba data structure.
11972 *
11973 * This routine is invoked to allocate all the fof queues for the FC HBA
11974 * operation. For each SLI4 queue type, the parameters such as queue entry
11975 * count (queue depth) shall be taken from the module parameter. For now,
11976 * we just use some constant number as place holder.
11977 *
11978 * Return codes
11979 * 0 - successful
11980 * -ENOMEM - No availble memory
11981 * -EIO - The mailbox failed to complete successfully.
11982 **/
11983int
11984lpfc_fof_queue_create(struct lpfc_hba *phba)
11985{
11986 struct lpfc_queue *qdesc;
11987
11988 /* Create FOF EQ */
11989 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
11990 phba->sli4_hba.eq_ecount);
11991 if (!qdesc)
11992 goto out_error;
11993
11994 phba->sli4_hba.fof_eq = qdesc;
11995
f38fa0bb 11996 if (phba->cfg_fof) {
1ba981fd
JS
11997
11998 /* Create OAS CQ */
11999 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
12000 phba->sli4_hba.cq_ecount);
12001 if (!qdesc)
12002 goto out_error;
12003
12004 phba->sli4_hba.oas_cq = qdesc;
12005
12006 /* Create OAS WQ */
12007 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
12008 phba->sli4_hba.wq_ecount);
12009 if (!qdesc)
12010 goto out_error;
12011
12012 phba->sli4_hba.oas_wq = qdesc;
895427bd 12013 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS
12014
12015 }
12016 return 0;
12017
12018out_error:
12019 lpfc_fof_queue_destroy(phba);
12020 return -ENOMEM;
12021}
12022
12023/**
12024 * lpfc_fof_queue_destroy - Destroy all the fof queues
12025 * @phba: pointer to lpfc hba data structure.
12026 *
12027 * This routine is invoked to release all the SLI4 queues with the FC HBA
12028 * operation.
12029 *
12030 * Return codes
12031 * 0 - successful
12032 **/
12033int
12034lpfc_fof_queue_destroy(struct lpfc_hba *phba)
12035{
12036 /* Release FOF Event queue */
12037 if (phba->sli4_hba.fof_eq != NULL) {
12038 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
12039 phba->sli4_hba.fof_eq = NULL;
12040 }
12041
12042 /* Release OAS Completion queue */
12043 if (phba->sli4_hba.oas_cq != NULL) {
12044 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
12045 phba->sli4_hba.oas_cq = NULL;
12046 }
12047
12048 /* Release OAS Work queue */
12049 if (phba->sli4_hba.oas_wq != NULL) {
12050 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
12051 phba->sli4_hba.oas_wq = NULL;
12052 }
12053 return 0;
12054}
12055
dea3101e
JB
12056MODULE_DEVICE_TABLE(pci, lpfc_id_table);
12057
a55b2d21 12058static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV
12059 .error_detected = lpfc_io_error_detected,
12060 .slot_reset = lpfc_io_slot_reset,
12061 .resume = lpfc_io_resume,
12062};
12063
dea3101e
JB
12064static struct pci_driver lpfc_driver = {
12065 .name = LPFC_DRIVER_NAME,
12066 .id_table = lpfc_id_table,
12067 .probe = lpfc_pci_probe_one,
6f039790 12068 .remove = lpfc_pci_remove_one,
85e8a239 12069 .shutdown = lpfc_pci_remove_one,
3a55b532 12070 .suspend = lpfc_pci_suspend_one,
3772a991 12071 .resume = lpfc_pci_resume_one,
2e0fef85 12072 .err_handler = &lpfc_err_handler,
dea3101e
JB
12073};
12074
3ef6d24c 12075static const struct file_operations lpfc_mgmt_fop = {
858feacd 12076 .owner = THIS_MODULE,
3ef6d24c
JS
12077};
12078
12079static struct miscdevice lpfc_mgmt_dev = {
12080 .minor = MISC_DYNAMIC_MINOR,
12081 .name = "lpfcmgmt",
12082 .fops = &lpfc_mgmt_fop,
12083};
12084
e59058c4 12085/**
3621a710 12086 * lpfc_init - lpfc module initialization routine
e59058c4
JS
12087 *
12088 * This routine is to be invoked when the lpfc module is loaded into the
12089 * kernel. The special kernel macro module_init() is used to indicate the
12090 * role of this routine to the kernel as lpfc module entry point.
12091 *
12092 * Return codes
12093 * 0 - successful
12094 * -ENOMEM - FC attach transport failed
12095 * all others - failed
12096 */
dea3101e
JB
12097static int __init
12098lpfc_init(void)
12099{
12100 int error = 0;
12101
12102 printk(LPFC_MODULE_DESC "\n");
c44ce173 12103 printk(LPFC_COPYRIGHT "\n");
dea3101e 12104
3ef6d24c
JS
12105 error = misc_register(&lpfc_mgmt_dev);
12106 if (error)
12107 printk(KERN_ERR "Could not register lpfcmgmt device, "
12108 "misc_register returned with status %d", error);
12109
458c083e
JS
12110 lpfc_transport_functions.vport_create = lpfc_vport_create;
12111 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e
JB
12112 lpfc_transport_template =
12113 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 12114 if (lpfc_transport_template == NULL)
dea3101e 12115 return -ENOMEM;
458c083e
JS
12116 lpfc_vport_transport_template =
12117 fc_attach_transport(&lpfc_vport_transport_functions);
12118 if (lpfc_vport_transport_template == NULL) {
12119 fc_release_transport(lpfc_transport_template);
12120 return -ENOMEM;
7ee5d43e 12121 }
7bb03bbf
JS
12122
12123 /* Initialize in case vector mapping is needed */
b246de17 12124 lpfc_used_cpu = NULL;
2ea259ee 12125 lpfc_present_cpu = num_present_cpus();
7bb03bbf 12126
dea3101e 12127 error = pci_register_driver(&lpfc_driver);
92d7f7b0 12128 if (error) {
dea3101e 12129 fc_release_transport(lpfc_transport_template);
458c083e 12130 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 12131 }
dea3101e
JB
12132
12133 return error;
12134}
12135
e59058c4 12136/**
3621a710 12137 * lpfc_exit - lpfc module removal routine
e59058c4
JS
12138 *
12139 * This routine is invoked when the lpfc module is removed from the kernel.
12140 * The special kernel macro module_exit() is used to indicate the role of
12141 * this routine to the kernel as lpfc module exit point.
12142 */
dea3101e
JB
12143static void __exit
12144lpfc_exit(void)
12145{
3ef6d24c 12146 misc_deregister(&lpfc_mgmt_dev);
dea3101e
JB
12147 pci_unregister_driver(&lpfc_driver);
12148 fc_release_transport(lpfc_transport_template);
458c083e 12149 fc_release_transport(lpfc_vport_transport_template);
81301a9b 12150 if (_dump_buf_data) {
6a9c52cf
JS
12151 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
12152 "_dump_buf_data at 0x%p\n",
81301a9b
JS
12153 (1L << _dump_buf_data_order), _dump_buf_data);
12154 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
12155 }
12156
12157 if (_dump_buf_dif) {
6a9c52cf
JS
12158 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
12159 "_dump_buf_dif at 0x%p\n",
81301a9b
JS
12160 (1L << _dump_buf_dif_order), _dump_buf_dif);
12161 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
12162 }
b246de17 12163 kfree(lpfc_used_cpu);
7973967f 12164 idr_destroy(&lpfc_hba_index);
dea3101e
JB
12165}
12166
12167module_init(lpfc_init);
12168module_exit(lpfc_exit);
12169MODULE_LICENSE("GPL");
12170MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 12171MODULE_AUTHOR("Broadcom");
dea3101e 12172MODULE_VERSION("0:" LPFC_DRIVER_VERSION);