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scsi: lpfc: remove console log clutter
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CommitLineData
dea3101e
JB
1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS
4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB
10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e
JB
22 *******************************************************************/
23
dea3101e
JB
24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e
JB
30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
dea3101e 40
91886523 41#include <scsi/scsi.h>
dea3101e
JB
42#include <scsi/scsi_device.h>
43#include <scsi/scsi_host.h>
44#include <scsi/scsi_transport_fc.h>
86c67379
JS
45#include <scsi/scsi_tcq.h>
46#include <scsi/fc/fc_fs.h>
47
48#include <linux/nvme-fc-driver.h>
dea3101e 49
da0436e9 50#include "lpfc_hw4.h"
dea3101e
JB
51#include "lpfc_hw.h"
52#include "lpfc_sli.h"
da0436e9 53#include "lpfc_sli4.h"
ea2151b4 54#include "lpfc_nl.h"
dea3101e 55#include "lpfc_disc.h"
dea3101e 56#include "lpfc.h"
895427bd
JS
57#include "lpfc_scsi.h"
58#include "lpfc_nvme.h"
86c67379 59#include "lpfc_nvmet.h"
dea3101e
JB
60#include "lpfc_logmsg.h"
61#include "lpfc_crtn.h"
92d7f7b0 62#include "lpfc_vport.h"
dea3101e 63#include "lpfc_version.h"
12f44457 64#include "lpfc_ids.h"
dea3101e 65
81301a9b
JS
66char *_dump_buf_data;
67unsigned long _dump_buf_data_order;
68char *_dump_buf_dif;
69unsigned long _dump_buf_dif_order;
70spinlock_t _dump_buf_lock;
71
7bb03bbf 72/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS
73uint16_t *lpfc_used_cpu;
74uint32_t lpfc_present_cpu;
7bb03bbf 75
dea3101e
JB
76static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
77static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 78static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS
79static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
80static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 81static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 82static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 83static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 84static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS
85static int lpfc_init_active_sgl_array(struct lpfc_hba *);
86static void lpfc_free_active_sgl(struct lpfc_hba *);
87static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
88static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
89static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
90static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
91static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS
92static void lpfc_sli4_disable_intr(struct lpfc_hba *);
93static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 94static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e
JB
95
96static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 97static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 98static DEFINE_IDR(lpfc_hba_index);
f358dd0c 99#define LPFC_NVMET_BUF_POST 254
dea3101e 100
e59058c4 101/**
3621a710 102 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS
103 * @phba: pointer to lpfc hba data structure.
104 *
105 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
106 * mailbox command. It retrieves the revision information from the HBA and
107 * collects the Vital Product Data (VPD) about the HBA for preparing the
108 * configuration of the HBA.
109 *
110 * Return codes:
111 * 0 - success.
112 * -ERESTART - requests the SLI layer to reset the HBA and try again.
113 * Any other value - indicates an error.
114 **/
dea3101e 115int
2e0fef85 116lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e
JB
117{
118 lpfc_vpd_t *vp = &phba->vpd;
119 int i = 0, rc;
120 LPFC_MBOXQ_t *pmb;
121 MAILBOX_t *mb;
122 char *lpfc_vpd_data = NULL;
123 uint16_t offset = 0;
124 static char licensed[56] =
125 "key unlock for use with gnu public licensed code only\0";
65a29c16 126 static int init_key = 1;
dea3101e
JB
127
128 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
129 if (!pmb) {
2e0fef85 130 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
131 return -ENOMEM;
132 }
133
04c68496 134 mb = &pmb->u.mb;
2e0fef85 135 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
136
137 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS
138 if (init_key) {
139 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 140
65a29c16
JS
141 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
142 *ptext = cpu_to_be32(*ptext);
143 init_key = 0;
144 }
dea3101e
JB
145
146 lpfc_read_nv(phba, pmb);
147 memset((char*)mb->un.varRDnvp.rsvd3, 0,
148 sizeof (mb->un.varRDnvp.rsvd3));
149 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
150 sizeof (licensed));
151
152 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
153
154 if (rc != MBX_SUCCESS) {
ed957684 155 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 156 "0324 Config Port initialization "
dea3101e
JB
157 "error, mbxCmd x%x READ_NVPARM, "
158 "mbxStatus x%x\n",
dea3101e
JB
159 mb->mbxCommand, mb->mbxStatus);
160 mempool_free(pmb, phba->mbox_mem_pool);
161 return -ERESTART;
162 }
163 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS
164 sizeof(phba->wwnn));
165 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
166 sizeof(phba->wwpn));
dea3101e
JB
167 }
168
92d7f7b0
JS
169 phba->sli3_options = 0x0;
170
dea3101e
JB
171 /* Setup and issue mailbox READ REV command */
172 lpfc_read_rev(phba, pmb);
173 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
174 if (rc != MBX_SUCCESS) {
ed957684 175 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 176 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 177 "READ_REV, mbxStatus x%x\n",
dea3101e
JB
178 mb->mbxCommand, mb->mbxStatus);
179 mempool_free( pmb, phba->mbox_mem_pool);
180 return -ERESTART;
181 }
182
92d7f7b0 183
1de933f3
JSEC
184 /*
185 * The value of rr must be 1 since the driver set the cv field to 1.
186 * This setting requires the FW to set all revision fields.
dea3101e 187 */
1de933f3 188 if (mb->un.varRdRev.rr == 0) {
dea3101e 189 vp->rev.rBit = 0;
1de933f3 190 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS
191 "0440 Adapter failed to init, READ_REV has "
192 "missing revision information.\n");
dea3101e
JB
193 mempool_free(pmb, phba->mbox_mem_pool);
194 return -ERESTART;
dea3101e
JB
195 }
196
495a714c
JS
197 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
198 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 199 return -EINVAL;
495a714c 200 }
ed957684 201
dea3101e 202 /* Save information as VPD data */
1de933f3 203 vp->rev.rBit = 1;
92d7f7b0 204 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC
205 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
206 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
207 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
208 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e
JB
209 vp->rev.biuRev = mb->un.varRdRev.biuRev;
210 vp->rev.smRev = mb->un.varRdRev.smRev;
211 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
212 vp->rev.endecRev = mb->un.varRdRev.endecRev;
213 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
214 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
215 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
216 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
217 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
218 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
219
92d7f7b0
JS
220 /* If the sli feature level is less then 9, we must
221 * tear down all RPIs and VPIs on link down if NPIV
222 * is enabled.
223 */
224 if (vp->rev.feaLevelHigh < 9)
225 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
226
dea3101e
JB
227 if (lpfc_is_LC_HBA(phba->pcidev->device))
228 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
229 sizeof (phba->RandomData));
230
dea3101e 231 /* Get adapter VPD information */
dea3101e
JB
232 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
233 if (!lpfc_vpd_data)
d7c255b2 234 goto out_free_mbox;
dea3101e 235 do {
a0c87cbd 236 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e
JB
237 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
238
239 if (rc != MBX_SUCCESS) {
240 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 241 "0441 VPD not present on adapter, "
dea3101e 242 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 243 mb->mbxCommand, mb->mbxStatus);
74b72a59 244 mb->un.varDmp.word_cnt = 0;
dea3101e 245 }
04c68496
JS
246 /* dump mem may return a zero when finished or we got a
247 * mailbox error, either way we are done.
248 */
249 if (mb->un.varDmp.word_cnt == 0)
250 break;
74b72a59
JW
251 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
252 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS
253 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
254 lpfc_vpd_data + offset,
92d7f7b0 255 mb->un.varDmp.word_cnt);
dea3101e 256 offset += mb->un.varDmp.word_cnt;
74b72a59
JW
257 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
258 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e
JB
259
260 kfree(lpfc_vpd_data);
dea3101e
JB
261out_free_mbox:
262 mempool_free(pmb, phba->mbox_mem_pool);
263 return 0;
264}
265
e59058c4 266/**
3621a710 267 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS
268 * @phba: pointer to lpfc hba data structure.
269 * @pmboxq: pointer to the driver internal queue element for mailbox command.
270 *
271 * This is the completion handler for driver's configuring asynchronous event
272 * mailbox command to the device. If the mailbox command returns successfully,
273 * it will set internal async event support flag to 1; otherwise, it will
274 * set internal async event support flag to 0.
275 **/
57127f15
JS
276static void
277lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
278{
04c68496 279 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS
280 phba->temp_sensor_support = 1;
281 else
282 phba->temp_sensor_support = 0;
283 mempool_free(pmboxq, phba->mbox_mem_pool);
284 return;
285}
286
97207482 287/**
3621a710 288 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS
289 * @phba: pointer to lpfc hba data structure.
290 * @pmboxq: pointer to the driver internal queue element for mailbox command.
291 *
292 * This is the completion handler for dump mailbox command for getting
293 * wake up parameters. When this command complete, the response contain
294 * Option rom version of the HBA. This function translate the version number
295 * into a human readable string and store it in OptionROMVersion.
296 **/
297static void
298lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
299{
300 struct prog_id *prg;
301 uint32_t prog_id_word;
302 char dist = ' ';
303 /* character array used for decoding dist type. */
304 char dist_char[] = "nabx";
305
04c68496 306 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 307 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 308 return;
9f1e1b50 309 }
97207482
JS
310
311 prg = (struct prog_id *) &prog_id_word;
312
313 /* word 7 contain option rom version */
04c68496 314 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS
315
316 /* Decode the Option rom version word to a readable string */
317 if (prg->dist < 4)
318 dist = dist_char[prg->dist];
319
320 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 321 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS
322 prg->ver, prg->rev, prg->lev);
323 else
a2fc4aef 324 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS
325 prg->ver, prg->rev, prg->lev,
326 dist, prg->num);
9f1e1b50 327 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS
328 return;
329}
330
0558056c
JS
331/**
332 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
333 * cfg_soft_wwnn, cfg_soft_wwpn
334 * @vport: pointer to lpfc vport data structure.
335 *
336 *
337 * Return codes
338 * None.
339 **/
340void
341lpfc_update_vport_wwn(struct lpfc_vport *vport)
342{
aeb3c817
JS
343 uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
344 u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0];
345
0558056c
JS
346 /* If the soft name exists then update it using the service params */
347 if (vport->phba->cfg_soft_wwnn)
348 u64_to_wwn(vport->phba->cfg_soft_wwnn,
349 vport->fc_sparam.nodeName.u.wwn);
350 if (vport->phba->cfg_soft_wwpn)
351 u64_to_wwn(vport->phba->cfg_soft_wwpn,
352 vport->fc_sparam.portName.u.wwn);
353
354 /*
355 * If the name is empty or there exists a soft name
356 * then copy the service params name, otherwise use the fc name
357 */
358 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
359 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
360 sizeof(struct lpfc_name));
361 else
362 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
363 sizeof(struct lpfc_name));
364
aeb3c817
JS
365 /*
366 * If the port name has changed, then set the Param changes flag
367 * to unreg the login
368 */
369 if (vport->fc_portname.u.wwn[0] != 0 &&
370 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
371 sizeof(struct lpfc_name)))
372 vport->vport_flag |= FAWWPN_PARAM_CHG;
373
374 if (vport->fc_portname.u.wwn[0] == 0 ||
375 vport->phba->cfg_soft_wwpn ||
376 (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) ||
377 vport->vport_flag & FAWWPN_SET) {
0558056c
JS
378 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
379 sizeof(struct lpfc_name));
aeb3c817
JS
380 vport->vport_flag &= ~FAWWPN_SET;
381 if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR)
382 vport->vport_flag |= FAWWPN_SET;
383 }
0558056c
JS
384 else
385 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
386 sizeof(struct lpfc_name));
387}
388
e59058c4 389/**
3621a710 390 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS
391 * @phba: pointer to lpfc hba data structure.
392 *
393 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
394 * command call. It performs all internal resource and state setups on the
395 * port: post IOCB buffers, enable appropriate host interrupt attentions,
396 * ELS ring timers, etc.
397 *
398 * Return codes
399 * 0 - success.
400 * Any other value - error.
401 **/
dea3101e 402int
2e0fef85 403lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 404{
2e0fef85 405 struct lpfc_vport *vport = phba->pport;
a257bf90 406 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e
JB
407 LPFC_MBOXQ_t *pmb;
408 MAILBOX_t *mb;
409 struct lpfc_dmabuf *mp;
410 struct lpfc_sli *psli = &phba->sli;
411 uint32_t status, timeout;
2e0fef85
JS
412 int i, j;
413 int rc;
dea3101e 414
7af67051
JS
415 spin_lock_irq(&phba->hbalock);
416 /*
417 * If the Config port completed correctly the HBA is not
418 * over heated any more.
419 */
420 if (phba->over_temp_state == HBA_OVER_TEMP)
421 phba->over_temp_state = HBA_NORMAL_TEMP;
422 spin_unlock_irq(&phba->hbalock);
423
dea3101e
JB
424 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
425 if (!pmb) {
2e0fef85 426 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
427 return -ENOMEM;
428 }
04c68496 429 mb = &pmb->u.mb;
dea3101e 430
dea3101e 431 /* Get login parameters for NID. */
9f1177a3
JS
432 rc = lpfc_read_sparam(phba, pmb, 0);
433 if (rc) {
434 mempool_free(pmb, phba->mbox_mem_pool);
435 return -ENOMEM;
436 }
437
ed957684 438 pmb->vport = vport;
dea3101e 439 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 440 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 441 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 442 "READ_SPARM mbxStatus x%x\n",
dea3101e 443 mb->mbxCommand, mb->mbxStatus);
2e0fef85 444 phba->link_state = LPFC_HBA_ERROR;
dea3101e 445 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 446 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
447 lpfc_mbuf_free(phba, mp->virt, mp->phys);
448 kfree(mp);
449 return -EIO;
450 }
451
452 mp = (struct lpfc_dmabuf *) pmb->context1;
453
2e0fef85 454 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e
JB
455 lpfc_mbuf_free(phba, mp->virt, mp->phys);
456 kfree(mp);
457 pmb->context1 = NULL;
0558056c 458 lpfc_update_vport_wwn(vport);
a257bf90
JS
459
460 /* Update the fc_host data structures with new wwn. */
461 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
462 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 463 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 464
dea3101e
JB
465 /* If no serial number in VPD data, use low 6 bytes of WWNN */
466 /* This should be consolidated into parse_vpd ? - mr */
467 if (phba->SerialNumber[0] == 0) {
468 uint8_t *outptr;
469
2e0fef85 470 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e
JB
471 for (i = 0; i < 12; i++) {
472 status = *outptr++;
473 j = ((status & 0xf0) >> 4);
474 if (j <= 9)
475 phba->SerialNumber[i] =
476 (char)((uint8_t) 0x30 + (uint8_t) j);
477 else
478 phba->SerialNumber[i] =
479 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
480 i++;
481 j = (status & 0xf);
482 if (j <= 9)
483 phba->SerialNumber[i] =
484 (char)((uint8_t) 0x30 + (uint8_t) j);
485 else
486 phba->SerialNumber[i] =
487 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
488 }
489 }
490
dea3101e 491 lpfc_read_config(phba, pmb);
ed957684 492 pmb->vport = vport;
dea3101e 493 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 494 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 495 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 496 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 497 mb->mbxCommand, mb->mbxStatus);
2e0fef85 498 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
499 mempool_free( pmb, phba->mbox_mem_pool);
500 return -EIO;
501 }
502
a0c87cbd
JS
503 /* Check if the port is disabled */
504 lpfc_sli_read_link_ste(phba);
505
dea3101e 506 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
507 i = (mb->un.varRdConfig.max_xri + 1);
508 if (phba->cfg_hba_queue_depth > i) {
509 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
510 "3359 HBA queue depth changed from %d to %d\n",
511 phba->cfg_hba_queue_depth, i);
512 phba->cfg_hba_queue_depth = i;
513 }
514
515 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
516 i = (mb->un.varRdConfig.max_xri >> 3);
517 if (phba->pport->cfg_lun_queue_depth > i) {
518 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
519 "3360 LUN queue depth changed from %d to %d\n",
520 phba->pport->cfg_lun_queue_depth, i);
521 phba->pport->cfg_lun_queue_depth = i;
522 }
dea3101e
JB
523
524 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW
525
526 /* Get the default values for Model Name and Description */
527 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
528
2e0fef85 529 phba->link_state = LPFC_LINK_DOWN;
dea3101e 530
0b727fea 531 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS
532 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
533 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
534 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
535 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e
JB
536
537 /* Post receive buffers for desired rings */
ed957684
JS
538 if (phba->sli_rev != 3)
539 lpfc_post_rcv_buf(phba);
dea3101e 540
9399627f
JS
541 /*
542 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
543 */
544 if (phba->intr_type == MSIX) {
545 rc = lpfc_config_msi(phba, pmb);
546 if (rc) {
547 mempool_free(pmb, phba->mbox_mem_pool);
548 return -EIO;
549 }
550 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
551 if (rc != MBX_SUCCESS) {
552 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
553 "0352 Config MSI mailbox command "
554 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS
555 pmb->u.mb.mbxCommand,
556 pmb->u.mb.mbxStatus);
9399627f
JS
557 mempool_free(pmb, phba->mbox_mem_pool);
558 return -EIO;
559 }
560 }
561
04c68496 562 spin_lock_irq(&phba->hbalock);
9399627f
JS
563 /* Initialize ERATT handling flag */
564 phba->hba_flag &= ~HBA_ERATT_HANDLED;
565
dea3101e 566 /* Enable appropriate host interrupts */
9940b97b
JS
567 if (lpfc_readl(phba->HCregaddr, &status)) {
568 spin_unlock_irq(&phba->hbalock);
569 return -EIO;
570 }
dea3101e
JB
571 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
572 if (psli->num_rings > 0)
573 status |= HC_R0INT_ENA;
574 if (psli->num_rings > 1)
575 status |= HC_R1INT_ENA;
576 if (psli->num_rings > 2)
577 status |= HC_R2INT_ENA;
578 if (psli->num_rings > 3)
579 status |= HC_R3INT_ENA;
580
875fbdfe
JSEC
581 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
582 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 583 status &= ~(HC_R0INT_ENA);
875fbdfe 584
dea3101e
JB
585 writel(status, phba->HCregaddr);
586 readl(phba->HCregaddr); /* flush */
2e0fef85 587 spin_unlock_irq(&phba->hbalock);
dea3101e 588
9399627f
JS
589 /* Set up ring-0 (ELS) timer */
590 timeout = phba->fc_ratov * 2;
256ec0d0
JS
591 mod_timer(&vport->els_tmofunc,
592 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 593 /* Set up heart beat (HB) timer */
256ec0d0
JS
594 mod_timer(&phba->hb_tmofunc,
595 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
596 phba->hb_outstanding = 0;
597 phba->last_completion_time = jiffies;
9399627f 598 /* Set up error attention (ERATT) polling timer */
256ec0d0 599 mod_timer(&phba->eratt_poll,
65791f1f 600 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 601
a0c87cbd
JS
602 if (phba->hba_flag & LINK_DISABLED) {
603 lpfc_printf_log(phba,
604 KERN_ERR, LOG_INIT,
605 "2598 Adapter Link is disabled.\n");
606 lpfc_down_link(phba, pmb);
607 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
608 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
609 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
610 lpfc_printf_log(phba,
611 KERN_ERR, LOG_INIT,
612 "2599 Adapter failed to issue DOWN_LINK"
613 " mbox command rc 0x%x\n", rc);
614
615 mempool_free(pmb, phba->mbox_mem_pool);
616 return -EIO;
617 }
e40a02c1 618 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS
619 mempool_free(pmb, phba->mbox_mem_pool);
620 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
621 if (rc)
622 return rc;
dea3101e
JB
623 }
624 /* MBOX buffer will be freed in mbox compl */
57127f15 625 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
626 if (!pmb) {
627 phba->link_state = LPFC_HBA_ERROR;
628 return -ENOMEM;
629 }
630
57127f15
JS
631 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
632 pmb->mbox_cmpl = lpfc_config_async_cmpl;
633 pmb->vport = phba->pport;
634 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 635
57127f15
JS
636 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
637 lpfc_printf_log(phba,
638 KERN_ERR,
639 LOG_INIT,
640 "0456 Adapter failed to issue "
e4e74273 641 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS
642 rc);
643 mempool_free(pmb, phba->mbox_mem_pool);
644 }
97207482
JS
645
646 /* Get Option rom version */
647 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
648 if (!pmb) {
649 phba->link_state = LPFC_HBA_ERROR;
650 return -ENOMEM;
651 }
652
97207482
JS
653 lpfc_dump_wakeup_param(phba, pmb);
654 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
655 pmb->vport = phba->pport;
656 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
657
658 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
659 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 660 "to get Option ROM version status x%x\n", rc);
97207482
JS
661 mempool_free(pmb, phba->mbox_mem_pool);
662 }
663
d7c255b2 664 return 0;
ce8b3ce5
JS
665}
666
84d1b006
JS
667/**
668 * lpfc_hba_init_link - Initialize the FC link
669 * @phba: pointer to lpfc hba data structure.
6e7288d9 670 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
671 *
672 * This routine will issue the INIT_LINK mailbox command call.
673 * It is available to other drivers through the lpfc_hba data
674 * structure for use as a delayed link up mechanism with the
675 * module parameter lpfc_suppress_link_up.
676 *
677 * Return code
678 * 0 - success
679 * Any other value - error
680 **/
e399b228 681static int
6e7288d9 682lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS
683{
684 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
685}
686
687/**
688 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
689 * @phba: pointer to lpfc hba data structure.
690 * @fc_topology: desired fc topology.
691 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
692 *
693 * This routine will issue the INIT_LINK mailbox command call.
694 * It is available to other drivers through the lpfc_hba data
695 * structure for use as a delayed link up mechanism with the
696 * module parameter lpfc_suppress_link_up.
697 *
698 * Return code
699 * 0 - success
700 * Any other value - error
701 **/
702int
703lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
704 uint32_t flag)
84d1b006
JS
705{
706 struct lpfc_vport *vport = phba->pport;
707 LPFC_MBOXQ_t *pmb;
708 MAILBOX_t *mb;
709 int rc;
710
711 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
712 if (!pmb) {
713 phba->link_state = LPFC_HBA_ERROR;
714 return -ENOMEM;
715 }
716 mb = &pmb->u.mb;
717 pmb->vport = vport;
718
026abb87
JS
719 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
720 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
721 !(phba->lmt & LMT_1Gb)) ||
722 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
723 !(phba->lmt & LMT_2Gb)) ||
724 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
725 !(phba->lmt & LMT_4Gb)) ||
726 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
727 !(phba->lmt & LMT_8Gb)) ||
728 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
729 !(phba->lmt & LMT_10Gb)) ||
730 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS
731 !(phba->lmt & LMT_16Gb)) ||
732 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
733 !(phba->lmt & LMT_32Gb))) {
026abb87
JS
734 /* Reset link speed to auto */
735 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
736 "1302 Invalid speed for this board:%d "
737 "Reset link speed to auto.\n",
738 phba->cfg_link_speed);
739 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
740 }
1b51197d 741 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 742 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS
743 if (phba->sli_rev < LPFC_SLI_REV4)
744 lpfc_set_loopback_flag(phba);
6e7288d9 745 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 746 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS
747 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
748 "0498 Adapter failed to init, mbxCmd x%x "
749 "INIT_LINK, mbxStatus x%x\n",
750 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS
751 if (phba->sli_rev <= LPFC_SLI_REV3) {
752 /* Clear all interrupt enable conditions */
753 writel(0, phba->HCregaddr);
754 readl(phba->HCregaddr); /* flush */
755 /* Clear all pending interrupts */
756 writel(0xffffffff, phba->HAregaddr);
757 readl(phba->HAregaddr); /* flush */
758 }
84d1b006 759 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 760 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS
761 mempool_free(pmb, phba->mbox_mem_pool);
762 return -EIO;
763 }
e40a02c1 764 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS
765 if (flag == MBX_POLL)
766 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS
767
768 return 0;
769}
770
771/**
772 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS
773 * @phba: pointer to lpfc hba data structure.
774 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
775 *
776 * This routine will issue the DOWN_LINK mailbox command call.
777 * It is available to other drivers through the lpfc_hba data
778 * structure for use to stop the link.
779 *
780 * Return code
781 * 0 - success
782 * Any other value - error
783 **/
e399b228 784static int
6e7288d9 785lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS
786{
787 LPFC_MBOXQ_t *pmb;
788 int rc;
789
790 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
791 if (!pmb) {
792 phba->link_state = LPFC_HBA_ERROR;
793 return -ENOMEM;
794 }
795
796 lpfc_printf_log(phba,
797 KERN_ERR, LOG_INIT,
798 "0491 Adapter Link is disabled.\n");
799 lpfc_down_link(phba, pmb);
800 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 801 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS
802 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
803 lpfc_printf_log(phba,
804 KERN_ERR, LOG_INIT,
805 "2522 Adapter failed to issue DOWN_LINK"
806 " mbox command rc 0x%x\n", rc);
807
808 mempool_free(pmb, phba->mbox_mem_pool);
809 return -EIO;
810 }
6e7288d9
JS
811 if (flag == MBX_POLL)
812 mempool_free(pmb, phba->mbox_mem_pool);
813
84d1b006
JS
814 return 0;
815}
816
e59058c4 817/**
3621a710 818 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS
819 * @phba: pointer to lpfc HBA data structure.
820 *
821 * This routine will do LPFC uninitialization before the HBA is reset when
822 * bringing down the SLI Layer.
823 *
824 * Return codes
825 * 0 - success.
826 * Any other value - error.
827 **/
dea3101e 828int
2e0fef85 829lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 830{
1b32f6aa
JS
831 struct lpfc_vport **vports;
832 int i;
3772a991
JS
833
834 if (phba->sli_rev <= LPFC_SLI_REV3) {
835 /* Disable interrupts */
836 writel(0, phba->HCregaddr);
837 readl(phba->HCregaddr); /* flush */
838 }
dea3101e 839
1b32f6aa
JS
840 if (phba->pport->load_flag & FC_UNLOADING)
841 lpfc_cleanup_discovery_resources(phba->pport);
842 else {
843 vports = lpfc_create_vport_work_array(phba);
844 if (vports != NULL)
3772a991
JS
845 for (i = 0; i <= phba->max_vports &&
846 vports[i] != NULL; i++)
1b32f6aa
JS
847 lpfc_cleanup_discovery_resources(vports[i]);
848 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS
849 }
850 return 0;
dea3101e
JB
851}
852
68e814f5
JS
853/**
854 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
855 * rspiocb which got deferred
856 *
857 * @phba: pointer to lpfc HBA data structure.
858 *
859 * This routine will cleanup completed slow path events after HBA is reset
860 * when bringing down the SLI Layer.
861 *
862 *
863 * Return codes
864 * void.
865 **/
866static void
867lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
868{
869 struct lpfc_iocbq *rspiocbq;
870 struct hbq_dmabuf *dmabuf;
871 struct lpfc_cq_event *cq_event;
872
873 spin_lock_irq(&phba->hbalock);
874 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
875 spin_unlock_irq(&phba->hbalock);
876
877 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
878 /* Get the response iocb from the head of work queue */
879 spin_lock_irq(&phba->hbalock);
880 list_remove_head(&phba->sli4_hba.sp_queue_event,
881 cq_event, struct lpfc_cq_event, list);
882 spin_unlock_irq(&phba->hbalock);
883
884 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
885 case CQE_CODE_COMPL_WQE:
886 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
887 cq_event);
888 lpfc_sli_release_iocbq(phba, rspiocbq);
889 break;
890 case CQE_CODE_RECEIVE:
891 case CQE_CODE_RECEIVE_V1:
892 dmabuf = container_of(cq_event, struct hbq_dmabuf,
893 cq_event);
894 lpfc_in_buf_free(phba, &dmabuf->dbuf);
895 }
896 }
897}
898
e59058c4 899/**
bcece5f5 900 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS
901 * @phba: pointer to lpfc HBA data structure.
902 *
bcece5f5
JS
903 * This routine will cleanup posted ELS buffers after the HBA is reset
904 * when bringing down the SLI Layer.
905 *
e59058c4
JS
906 *
907 * Return codes
bcece5f5 908 * void.
e59058c4 909 **/
bcece5f5
JS
910static void
911lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW
912{
913 struct lpfc_sli *psli = &phba->sli;
914 struct lpfc_sli_ring *pring;
915 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS
916 LIST_HEAD(buflist);
917 int count;
41415862 918
92d7f7b0
JS
919 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
920 lpfc_sli_hbqbuf_free_all(phba);
921 else {
922 /* Cleanup preposted buffers on the ELS ring */
895427bd 923 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS
924 spin_lock_irq(&phba->hbalock);
925 list_splice_init(&pring->postbufq, &buflist);
926 spin_unlock_irq(&phba->hbalock);
927
928 count = 0;
929 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 930 list_del(&mp->list);
07eab624 931 count++;
92d7f7b0
JS
932 lpfc_mbuf_free(phba, mp->virt, mp->phys);
933 kfree(mp);
934 }
07eab624
JS
935
936 spin_lock_irq(&phba->hbalock);
937 pring->postbufq_cnt -= count;
bcece5f5 938 spin_unlock_irq(&phba->hbalock);
41415862 939 }
bcece5f5
JS
940}
941
942/**
943 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
944 * @phba: pointer to lpfc HBA data structure.
945 *
946 * This routine will cleanup the txcmplq after the HBA is reset when bringing
947 * down the SLI Layer.
948 *
949 * Return codes
950 * void
951 **/
952static void
953lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
954{
955 struct lpfc_sli *psli = &phba->sli;
895427bd 956 struct lpfc_queue *qp = NULL;
bcece5f5
JS
957 struct lpfc_sli_ring *pring;
958 LIST_HEAD(completions);
959 int i;
960
895427bd
JS
961 if (phba->sli_rev != LPFC_SLI_REV4) {
962 for (i = 0; i < psli->num_rings; i++) {
963 pring = &psli->sli3_ring[i];
bcece5f5 964 spin_lock_irq(&phba->hbalock);
895427bd
JS
965 /* At this point in time the HBA is either reset or DOA
966 * Nothing should be on txcmplq as it will
967 * NEVER complete.
968 */
969 list_splice_init(&pring->txcmplq, &completions);
970 pring->txcmplq_cnt = 0;
bcece5f5 971 spin_unlock_irq(&phba->hbalock);
09372820 972
895427bd
JS
973 lpfc_sli_abort_iocb_ring(phba, pring);
974 }
a257bf90 975 /* Cancel all the IOCBs from the completions list */
895427bd
JS
976 lpfc_sli_cancel_iocbs(phba, &completions,
977 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
978 return;
979 }
980 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
981 pring = qp->pring;
982 if (!pring)
983 continue;
984 spin_lock_irq(&pring->ring_lock);
985 list_splice_init(&pring->txcmplq, &completions);
986 pring->txcmplq_cnt = 0;
987 spin_unlock_irq(&pring->ring_lock);
41415862
JW
988 lpfc_sli_abort_iocb_ring(phba, pring);
989 }
895427bd
JS
990 /* Cancel all the IOCBs from the completions list */
991 lpfc_sli_cancel_iocbs(phba, &completions,
992 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 993}
41415862 994
bcece5f5
JS
995/**
996 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
997 int i;
998 * @phba: pointer to lpfc HBA data structure.
999 *
1000 * This routine will do uninitialization after the HBA is reset when bring
1001 * down the SLI Layer.
1002 *
1003 * Return codes
1004 * 0 - success.
1005 * Any other value - error.
1006 **/
1007static int
1008lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1009{
1010 lpfc_hba_free_post_buf(phba);
1011 lpfc_hba_clean_txcmplq(phba);
41415862
JW
1012 return 0;
1013}
5af5eee7 1014
da0436e9
JS
1015/**
1016 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1017 * @phba: pointer to lpfc HBA data structure.
1018 *
1019 * This routine will do uninitialization after the HBA is reset when bring
1020 * down the SLI Layer.
1021 *
1022 * Return codes
af901ca1 1023 * 0 - success.
da0436e9
JS
1024 * Any other value - error.
1025 **/
1026static int
1027lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1028{
1029 struct lpfc_scsi_buf *psb, *psb_next;
86c67379 1030 struct lpfc_nvmet_rcv_ctx *ctxp, *ctxp_next;
da0436e9 1031 LIST_HEAD(aborts);
895427bd 1032 LIST_HEAD(nvme_aborts);
86c67379 1033 LIST_HEAD(nvmet_aborts);
da0436e9 1034 unsigned long iflag = 0;
0f65ff68
JS
1035 struct lpfc_sglq *sglq_entry = NULL;
1036
895427bd
JS
1037
1038 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS
1039 lpfc_hba_clean_txcmplq(phba);
1040
da0436e9
JS
1041 /* At this point in time the HBA is either reset or DOA. Either
1042 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1043 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS
1044 * driver is unloading or reposted if the driver is restarting
1045 * the port.
1046 */
895427bd 1047 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1048 /* scsl_buf_list */
895427bd 1049 /* sgl_list_lock required because worker thread uses this
da0436e9
JS
1050 * list.
1051 */
895427bd 1052 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS
1053 list_for_each_entry(sglq_entry,
1054 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1055 sglq_entry->state = SGL_FREED;
1056
da0436e9 1057 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS
1058 &phba->sli4_hba.lpfc_els_sgl_list);
1059
f358dd0c 1060
895427bd 1061 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1062 /* abts_scsi_buf_list_lock required because worker thread uses this
1063 * list.
1064 */
895427bd
JS
1065 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1066 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1067 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1068 &aborts);
1069 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1070 }
1071
1072 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1073 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1074 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1075 &nvme_aborts);
86c67379
JS
1076 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1077 &nvmet_aborts);
895427bd
JS
1078 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1079 }
1080
da0436e9
JS
1081 spin_unlock_irq(&phba->hbalock);
1082
1083 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1084 psb->pCmd = NULL;
1085 psb->status = IOSTAT_SUCCESS;
1086 }
a40fc5f0
JS
1087 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1088 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1089 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1090
86c67379
JS
1091 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1092 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1093 psb->pCmd = NULL;
1094 psb->status = IOSTAT_SUCCESS;
1095 }
1096 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
1097 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1098 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1099
1100 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1101 ctxp->flag &= ~(LPFC_NVMET_XBUSY | LPFC_NVMET_ABORT_OP);
6c621a22 1102 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
86c67379 1103 }
895427bd 1104 }
895427bd 1105
68e814f5 1106 lpfc_sli4_free_sp_events(phba);
da0436e9
JS
1107 return 0;
1108}
1109
1110/**
1111 * lpfc_hba_down_post - Wrapper func for hba down post routine
1112 * @phba: pointer to lpfc HBA data structure.
1113 *
1114 * This routine wraps the actual SLI3 or SLI4 routine for performing
1115 * uninitialization after the HBA is reset when bring down the SLI Layer.
1116 *
1117 * Return codes
af901ca1 1118 * 0 - success.
da0436e9
JS
1119 * Any other value - error.
1120 **/
1121int
1122lpfc_hba_down_post(struct lpfc_hba *phba)
1123{
1124 return (*phba->lpfc_hba_down_post)(phba);
1125}
41415862 1126
e59058c4 1127/**
3621a710 1128 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS
1129 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1130 *
1131 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1132 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1133 * work-port-events bitmap and the worker thread is notified. This timeout
1134 * event will be used by the worker thread to invoke the actual timeout
1135 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1136 * be performed in the timeout handler and the HBA timeout event bit shall
1137 * be cleared by the worker thread after it has taken the event bitmap out.
1138 **/
a6ababd2 1139static void
858c9f6c
JS
1140lpfc_hb_timeout(unsigned long ptr)
1141{
1142 struct lpfc_hba *phba;
5e9d9b82 1143 uint32_t tmo_posted;
858c9f6c
JS
1144 unsigned long iflag;
1145
1146 phba = (struct lpfc_hba *)ptr;
9399627f
JS
1147
1148 /* Check for heart beat timeout conditions */
858c9f6c 1149 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS
1150 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1151 if (!tmo_posted)
858c9f6c
JS
1152 phba->pport->work_port_events |= WORKER_HB_TMO;
1153 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1154
9399627f 1155 /* Tell the worker thread there is work to do */
5e9d9b82
JS
1156 if (!tmo_posted)
1157 lpfc_worker_wake_up(phba);
858c9f6c
JS
1158 return;
1159}
1160
19ca7609
JS
1161/**
1162 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1163 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1164 *
1165 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1166 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1167 * work-port-events bitmap and the worker thread is notified. This timeout
1168 * event will be used by the worker thread to invoke the actual timeout
1169 * handler routine, lpfc_rrq_handler. Any periodical operations will
1170 * be performed in the timeout handler and the RRQ timeout event bit shall
1171 * be cleared by the worker thread after it has taken the event bitmap out.
1172 **/
1173static void
1174lpfc_rrq_timeout(unsigned long ptr)
1175{
1176 struct lpfc_hba *phba;
19ca7609
JS
1177 unsigned long iflag;
1178
1179 phba = (struct lpfc_hba *)ptr;
1180 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1181 if (!(phba->pport->load_flag & FC_UNLOADING))
1182 phba->hba_flag |= HBA_RRQ_ACTIVE;
1183 else
1184 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1185 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1186
1187 if (!(phba->pport->load_flag & FC_UNLOADING))
1188 lpfc_worker_wake_up(phba);
19ca7609
JS
1189}
1190
e59058c4 1191/**
3621a710 1192 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS
1193 * @phba: pointer to lpfc hba data structure.
1194 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1195 *
1196 * This is the callback function to the lpfc heart-beat mailbox command.
1197 * If configured, the lpfc driver issues the heart-beat mailbox command to
1198 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1199 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1200 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1201 * heart-beat outstanding state. Once the mailbox command comes back and
1202 * no error conditions detected, the heart-beat mailbox command timer is
1203 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1204 * state is cleared for the next heart-beat. If the timer expired with the
1205 * heart-beat outstanding state set, the driver will put the HBA offline.
1206 **/
858c9f6c
JS
1207static void
1208lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1209{
1210 unsigned long drvr_flag;
1211
1212 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1213 phba->hb_outstanding = 0;
1214 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1215
9399627f 1216 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS
1217 mempool_free(pmboxq, phba->mbox_mem_pool);
1218 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1219 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1220 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1221 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1222 jiffies +
1223 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1224 return;
1225}
1226
e59058c4 1227/**
3621a710 1228 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS
1229 * @phba: pointer to lpfc hba data structure.
1230 *
1231 * This is the actual HBA-timer timeout handler to be invoked by the worker
1232 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1233 * handler performs any periodic operations needed for the device. If such
1234 * periodic event has already been attended to either in the interrupt handler
1235 * or by processing slow-ring or fast-ring events within the HBA-timer
1236 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1237 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1238 * is configured and there is no heart-beat mailbox command outstanding, a
1239 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1240 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1241 * to offline.
1242 **/
858c9f6c
JS
1243void
1244lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1245{
45ed1190 1246 struct lpfc_vport **vports;
858c9f6c 1247 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1248 struct lpfc_dmabuf *buf_ptr;
45ed1190 1249 int retval, i;
858c9f6c 1250 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1251 LIST_HEAD(completions);
0cf07f84
JS
1252 struct lpfc_queue *qp;
1253 unsigned long time_elapsed;
1254 uint32_t tick_cqe, max_cqe, val;
1255 uint64_t tot, data1, data2, data3;
66d7ce93 1256 struct lpfc_nvmet_tgtport *tgtp;
0cf07f84
JS
1257 struct lpfc_register reg_data;
1258 void __iomem *eqdreg = phba->sli4_hba.u.if_type2.EQDregaddr;
858c9f6c 1259
45ed1190
JS
1260 vports = lpfc_create_vport_work_array(phba);
1261 if (vports != NULL)
4258e98e 1262 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1263 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS
1264 lpfc_fdmi_num_disc_check(vports[i]);
1265 }
45ed1190
JS
1266 lpfc_destroy_vport_work_array(phba, vports);
1267
858c9f6c 1268 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1269 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS
1270 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1271 return;
1272
0cf07f84
JS
1273 if (phba->cfg_auto_imax) {
1274 if (!phba->last_eqdelay_time) {
1275 phba->last_eqdelay_time = jiffies;
1276 goto skip_eqdelay;
1277 }
1278 time_elapsed = jiffies - phba->last_eqdelay_time;
1279 phba->last_eqdelay_time = jiffies;
1280
1281 tot = 0xffff;
1282 /* Check outstanding IO count */
1283 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1284 if (phba->nvmet_support) {
66d7ce93
DK
1285 tgtp = phba->targetport->private;
1286 /* Calculate outstanding IOs */
1287 tot = atomic_read(&tgtp->rcv_fcp_cmd_drop);
1288 tot += atomic_read(&tgtp->xmt_fcp_release);
1289 tot = atomic_read(&tgtp->rcv_fcp_cmd_in) - tot;
0cf07f84
JS
1290 } else {
1291 tot = atomic_read(&phba->fc4NvmeIoCmpls);
1292 data1 = atomic_read(
1293 &phba->fc4NvmeInputRequests);
1294 data2 = atomic_read(
1295 &phba->fc4NvmeOutputRequests);
1296 data3 = atomic_read(
1297 &phba->fc4NvmeControlRequests);
1298 tot = (data1 + data2 + data3) - tot;
1299 }
1300 }
1301
1302 /* Interrupts per sec per EQ */
1303 val = phba->cfg_fcp_imax / phba->io_channel_irqs;
1304 tick_cqe = val / CONFIG_HZ; /* Per tick per EQ */
1305
1306 /* Assume 1 CQE/ISR, calc max CQEs allowed for time duration */
1307 max_cqe = time_elapsed * tick_cqe;
1308
1309 for (i = 0; i < phba->io_channel_irqs; i++) {
1310 /* Fast-path EQ */
1311 qp = phba->sli4_hba.hba_eq[i];
1312 if (!qp)
1313 continue;
1314
1315 /* Use no EQ delay if we don't have many outstanding
1316 * IOs, or if we are only processing 1 CQE/ISR or less.
1317 * Otherwise, assume we can process up to lpfc_fcp_imax
1318 * interrupts per HBA.
1319 */
1320 if (tot < LPFC_NODELAY_MAX_IO ||
1321 qp->EQ_cqe_cnt <= max_cqe)
1322 val = 0;
1323 else
1324 val = phba->cfg_fcp_imax;
1325
1326 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
1327 /* Use EQ Delay Register method */
1328
1329 /* Convert for EQ Delay register */
1330 if (val) {
1331 /* First, interrupts per sec per EQ */
1332 val = phba->cfg_fcp_imax /
1333 phba->io_channel_irqs;
1334
1335 /* us delay between each interrupt */
1336 val = LPFC_SEC_TO_USEC / val;
1337 }
1338 if (val != qp->q_mode) {
1339 reg_data.word0 = 0;
1340 bf_set(lpfc_sliport_eqdelay_id,
1341 &reg_data, qp->queue_id);
1342 bf_set(lpfc_sliport_eqdelay_delay,
1343 &reg_data, val);
1344 writel(reg_data.word0, eqdreg);
1345 }
1346 } else {
1347 /* Use mbox command method */
1348 if (val != qp->q_mode)
1349 lpfc_modify_hba_eq_delay(phba, i,
1350 1, val);
1351 }
1352
1353 /*
1354 * val is cfg_fcp_imax or 0 for mbox delay or us delay
1355 * between interrupts for EQDR.
1356 */
1357 qp->q_mode = val;
1358 qp->EQ_cqe_cnt = 0;
1359 }
1360 }
1361
1362skip_eqdelay:
858c9f6c 1363 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1364
256ec0d0
JS
1365 if (time_after(phba->last_completion_time +
1366 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1367 jiffies)) {
858c9f6c
JS
1368 spin_unlock_irq(&phba->pport->work_port_lock);
1369 if (!phba->hb_outstanding)
1370 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1371 jiffies +
1372 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1373 else
1374 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1375 jiffies +
1376 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS
1377 return;
1378 }
1379 spin_unlock_irq(&phba->pport->work_port_lock);
1380
0ff10d46
JS
1381 if (phba->elsbuf_cnt &&
1382 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1383 spin_lock_irq(&phba->hbalock);
1384 list_splice_init(&phba->elsbuf, &completions);
1385 phba->elsbuf_cnt = 0;
1386 phba->elsbuf_prev_cnt = 0;
1387 spin_unlock_irq(&phba->hbalock);
1388
1389 while (!list_empty(&completions)) {
1390 list_remove_head(&completions, buf_ptr,
1391 struct lpfc_dmabuf, list);
1392 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1393 kfree(buf_ptr);
1394 }
1395 }
1396 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1397
858c9f6c 1398 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS
1399 if (phba->cfg_enable_hba_heartbeat) {
1400 if (!phba->hb_outstanding) {
bc73905a
JS
1401 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1402 (list_empty(&psli->mboxq))) {
1403 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1404 GFP_KERNEL);
1405 if (!pmboxq) {
1406 mod_timer(&phba->hb_tmofunc,
1407 jiffies +
256ec0d0
JS
1408 msecs_to_jiffies(1000 *
1409 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1410 return;
1411 }
1412
1413 lpfc_heart_beat(phba, pmboxq);
1414 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1415 pmboxq->vport = phba->pport;
1416 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1417 MBX_NOWAIT);
1418
1419 if (retval != MBX_BUSY &&
1420 retval != MBX_SUCCESS) {
1421 mempool_free(pmboxq,
1422 phba->mbox_mem_pool);
1423 mod_timer(&phba->hb_tmofunc,
1424 jiffies +
256ec0d0
JS
1425 msecs_to_jiffies(1000 *
1426 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1427 return;
1428 }
1429 phba->skipped_hb = 0;
1430 phba->hb_outstanding = 1;
1431 } else if (time_before_eq(phba->last_completion_time,
1432 phba->skipped_hb)) {
1433 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1434 "2857 Last completion time not "
1435 " updated in %d ms\n",
1436 jiffies_to_msecs(jiffies
1437 - phba->last_completion_time));
1438 } else
1439 phba->skipped_hb = jiffies;
1440
858c9f6c 1441 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1442 jiffies +
1443 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1444 return;
13815c83
JS
1445 } else {
1446 /*
1447 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS
1448 * we need to give the hb mailbox cmd a chance to
1449 * complete or TMO.
13815c83 1450 */
dcf2a4e0
JS
1451 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1452 "0459 Adapter heartbeat still out"
1453 "standing:last compl time was %d ms.\n",
1454 jiffies_to_msecs(jiffies
1455 - phba->last_completion_time));
1456 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1457 jiffies +
1458 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1459 }
4258e98e
JS
1460 } else {
1461 mod_timer(&phba->hb_tmofunc,
1462 jiffies +
1463 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1464 }
1465}
1466
e59058c4 1467/**
3621a710 1468 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS
1469 * @phba: pointer to lpfc hba data structure.
1470 *
1471 * This routine is called to bring the HBA offline when HBA hardware error
1472 * other than Port Error 6 has been detected.
1473 **/
09372820
JS
1474static void
1475lpfc_offline_eratt(struct lpfc_hba *phba)
1476{
1477 struct lpfc_sli *psli = &phba->sli;
1478
1479 spin_lock_irq(&phba->hbalock);
f4b4c68f 1480 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1481 spin_unlock_irq(&phba->hbalock);
618a5230 1482 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS
1483
1484 lpfc_offline(phba);
1485 lpfc_reset_barrier(phba);
f4b4c68f 1486 spin_lock_irq(&phba->hbalock);
09372820 1487 lpfc_sli_brdreset(phba);
f4b4c68f 1488 spin_unlock_irq(&phba->hbalock);
09372820
JS
1489 lpfc_hba_down_post(phba);
1490 lpfc_sli_brdready(phba, HS_MBRDY);
1491 lpfc_unblock_mgmt_io(phba);
1492 phba->link_state = LPFC_HBA_ERROR;
1493 return;
1494}
1495
da0436e9
JS
1496/**
1497 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1498 * @phba: pointer to lpfc hba data structure.
1499 *
1500 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1501 * other than Port Error 6 has been detected.
1502 **/
a88dbb6a 1503void
da0436e9
JS
1504lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1505{
946727dc
JS
1506 spin_lock_irq(&phba->hbalock);
1507 phba->link_state = LPFC_HBA_ERROR;
1508 spin_unlock_irq(&phba->hbalock);
1509
618a5230 1510 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1511 lpfc_offline(phba);
da0436e9 1512 lpfc_hba_down_post(phba);
da0436e9 1513 lpfc_unblock_mgmt_io(phba);
da0436e9
JS
1514}
1515
a257bf90
JS
1516/**
1517 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1518 * @phba: pointer to lpfc hba data structure.
1519 *
1520 * This routine is invoked to handle the deferred HBA hardware error
1521 * conditions. This type of error is indicated by HBA by setting ER1
1522 * and another ER bit in the host status register. The driver will
1523 * wait until the ER1 bit clears before handling the error condition.
1524 **/
1525static void
1526lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1527{
1528 uint32_t old_host_status = phba->work_hs;
a257bf90
JS
1529 struct lpfc_sli *psli = &phba->sli;
1530
f4b4c68f
JS
1531 /* If the pci channel is offline, ignore possible errors,
1532 * since we cannot communicate with the pci card anyway.
1533 */
1534 if (pci_channel_offline(phba->pcidev)) {
1535 spin_lock_irq(&phba->hbalock);
1536 phba->hba_flag &= ~DEFER_ERATT;
1537 spin_unlock_irq(&phba->hbalock);
1538 return;
1539 }
1540
a257bf90
JS
1541 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1542 "0479 Deferred Adapter Hardware Error "
1543 "Data: x%x x%x x%x\n",
1544 phba->work_hs,
1545 phba->work_status[0], phba->work_status[1]);
1546
1547 spin_lock_irq(&phba->hbalock);
f4b4c68f 1548 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS
1549 spin_unlock_irq(&phba->hbalock);
1550
1551
1552 /*
1553 * Firmware stops when it triggred erratt. That could cause the I/Os
1554 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1555 * SCSI layer retry it after re-establishing link.
1556 */
db55fba8 1557 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS
1558
1559 /*
1560 * There was a firmware error. Take the hba offline and then
1561 * attempt to restart it.
1562 */
618a5230 1563 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS
1564 lpfc_offline(phba);
1565
1566 /* Wait for the ER1 bit to clear.*/
1567 while (phba->work_hs & HS_FFER1) {
1568 msleep(100);
9940b97b
JS
1569 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1570 phba->work_hs = UNPLUG_ERR ;
1571 break;
1572 }
a257bf90
JS
1573 /* If driver is unloading let the worker thread continue */
1574 if (phba->pport->load_flag & FC_UNLOADING) {
1575 phba->work_hs = 0;
1576 break;
1577 }
1578 }
1579
1580 /*
1581 * This is to ptrotect against a race condition in which
1582 * first write to the host attention register clear the
1583 * host status register.
1584 */
1585 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1586 phba->work_hs = old_host_status & ~HS_FFER1;
1587
3772a991 1588 spin_lock_irq(&phba->hbalock);
a257bf90 1589 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1590 spin_unlock_irq(&phba->hbalock);
a257bf90
JS
1591 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1592 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1593}
1594
3772a991
JS
1595static void
1596lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1597{
1598 struct lpfc_board_event_header board_event;
1599 struct Scsi_Host *shost;
1600
1601 board_event.event_type = FC_REG_BOARD_EVENT;
1602 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1603 shost = lpfc_shost_from_vport(phba->pport);
1604 fc_host_post_vendor_event(shost, fc_get_event_number(),
1605 sizeof(board_event),
1606 (char *) &board_event,
1607 LPFC_NL_VENDOR_ID);
1608}
1609
e59058c4 1610/**
3772a991 1611 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS
1612 * @phba: pointer to lpfc hba data structure.
1613 *
1614 * This routine is invoked to handle the following HBA hardware error
1615 * conditions:
1616 * 1 - HBA error attention interrupt
1617 * 2 - DMA ring index out of range
1618 * 3 - Mailbox command came back as unknown
1619 **/
3772a991
JS
1620static void
1621lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1622{
2e0fef85 1623 struct lpfc_vport *vport = phba->pport;
2e0fef85 1624 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1625 uint32_t event_data;
57127f15
JS
1626 unsigned long temperature;
1627 struct temp_event temp_event_data;
92d7f7b0 1628 struct Scsi_Host *shost;
2e0fef85 1629
8d63f375 1630 /* If the pci channel is offline, ignore possible errors,
3772a991
JS
1631 * since we cannot communicate with the pci card anyway.
1632 */
1633 if (pci_channel_offline(phba->pcidev)) {
1634 spin_lock_irq(&phba->hbalock);
1635 phba->hba_flag &= ~DEFER_ERATT;
1636 spin_unlock_irq(&phba->hbalock);
8d63f375 1637 return;
3772a991
JS
1638 }
1639
13815c83
JS
1640 /* If resets are disabled then leave the HBA alone and return */
1641 if (!phba->cfg_enable_hba_reset)
1642 return;
dea3101e 1643
ea2151b4 1644 /* Send an internal error event to mgmt application */
3772a991 1645 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1646
a257bf90
JS
1647 if (phba->hba_flag & DEFER_ERATT)
1648 lpfc_handle_deferred_eratt(phba);
1649
dcf2a4e0
JS
1650 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1651 if (phba->work_hs & HS_FFER6)
1652 /* Re-establishing Link */
1653 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1654 "1301 Re-establishing Link "
1655 "Data: x%x x%x x%x\n",
1656 phba->work_hs, phba->work_status[0],
1657 phba->work_status[1]);
1658 if (phba->work_hs & HS_FFER8)
1659 /* Device Zeroization */
1660 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1661 "2861 Host Authentication device "
1662 "zeroization Data:x%x x%x x%x\n",
1663 phba->work_hs, phba->work_status[0],
1664 phba->work_status[1]);
58da1ffb 1665
92d7f7b0 1666 spin_lock_irq(&phba->hbalock);
f4b4c68f 1667 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1668 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1669
1670 /*
1671 * Firmware stops when it triggled erratt with HS_FFER6.
1672 * That could cause the I/Os dropped by the firmware.
1673 * Error iocb (I/O) on txcmplq and let the SCSI layer
1674 * retry it after re-establishing link.
1675 */
db55fba8 1676 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1677
dea3101e
JB
1678 /*
1679 * There was a firmware error. Take the hba offline and then
1680 * attempt to restart it.
1681 */
618a5230 1682 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1683 lpfc_offline(phba);
41415862 1684 lpfc_sli_brdrestart(phba);
dea3101e 1685 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1686 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
1687 return;
1688 }
46fa311e 1689 lpfc_unblock_mgmt_io(phba);
57127f15
JS
1690 } else if (phba->work_hs & HS_CRIT_TEMP) {
1691 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1692 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1693 temp_event_data.event_code = LPFC_CRIT_TEMP;
1694 temp_event_data.data = (uint32_t)temperature;
1695
1696 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1697 "0406 Adapter maximum temperature exceeded "
57127f15
JS
1698 "(%ld), taking this port offline "
1699 "Data: x%x x%x x%x\n",
1700 temperature, phba->work_hs,
1701 phba->work_status[0], phba->work_status[1]);
1702
1703 shost = lpfc_shost_from_vport(phba->pport);
1704 fc_host_post_vendor_event(shost, fc_get_event_number(),
1705 sizeof(temp_event_data),
1706 (char *) &temp_event_data,
1707 SCSI_NL_VID_TYPE_PCI
1708 | PCI_VENDOR_ID_EMULEX);
1709
7af67051 1710 spin_lock_irq(&phba->hbalock);
7af67051
JS
1711 phba->over_temp_state = HBA_OVER_TEMP;
1712 spin_unlock_irq(&phba->hbalock);
09372820 1713 lpfc_offline_eratt(phba);
57127f15 1714
dea3101e
JB
1715 } else {
1716 /* The if clause above forces this code path when the status
9399627f
JS
1717 * failure is a value other than FFER6. Do not call the offline
1718 * twice. This is the adapter hardware error path.
dea3101e
JB
1719 */
1720 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1721 "0457 Adapter Hardware Error "
dea3101e 1722 "Data: x%x x%x x%x\n",
e8b62011 1723 phba->work_hs,
dea3101e
JB
1724 phba->work_status[0], phba->work_status[1]);
1725
d2873e4c 1726 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1727 shost = lpfc_shost_from_vport(vport);
2e0fef85 1728 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS
1729 sizeof(event_data), (char *) &event_data,
1730 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1731
09372820 1732 lpfc_offline_eratt(phba);
dea3101e 1733 }
9399627f 1734 return;
dea3101e
JB
1735}
1736
618a5230
JS
1737/**
1738 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1739 * @phba: pointer to lpfc hba data structure.
1740 * @mbx_action: flag for mailbox shutdown action.
1741 *
1742 * This routine is invoked to perform an SLI4 port PCI function reset in
1743 * response to port status register polling attention. It waits for port
1744 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1745 * During this process, interrupt vectors are freed and later requested
1746 * for handling possible port resource change.
1747 **/
1748static int
e10b2022
JS
1749lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1750 bool en_rn_msg)
618a5230
JS
1751{
1752 int rc;
1753 uint32_t intr_mode;
1754
65791f1f
JS
1755 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1756 LPFC_SLI_INTF_IF_TYPE_2) {
1757 /*
1758 * On error status condition, driver need to wait for port
1759 * ready before performing reset.
1760 */
1761 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1762 if (rc)
65791f1f
JS
1763 return rc;
1764 }
0e916ee7 1765
65791f1f
JS
1766 /* need reset: attempt for port recovery */
1767 if (en_rn_msg)
1768 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1769 "2887 Reset Needed: Attempting Port "
1770 "Recovery...\n");
1771 lpfc_offline_prep(phba, mbx_action);
1772 lpfc_offline(phba);
1773 /* release interrupt for possible resource change */
1774 lpfc_sli4_disable_intr(phba);
1775 lpfc_sli_brdrestart(phba);
1776 /* request and enable interrupt */
1777 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1778 if (intr_mode == LPFC_INTR_ERROR) {
1779 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1780 "3175 Failed to enable interrupt\n");
1781 return -EIO;
618a5230 1782 }
65791f1f
JS
1783 phba->intr_mode = intr_mode;
1784 rc = lpfc_online(phba);
1785 if (rc == 0)
1786 lpfc_unblock_mgmt_io(phba);
1787
618a5230
JS
1788 return rc;
1789}
1790
da0436e9
JS
1791/**
1792 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1793 * @phba: pointer to lpfc hba data structure.
1794 *
1795 * This routine is invoked to handle the SLI4 HBA hardware error attention
1796 * conditions.
1797 **/
1798static void
1799lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1800{
1801 struct lpfc_vport *vport = phba->pport;
1802 uint32_t event_data;
1803 struct Scsi_Host *shost;
2fcee4bf 1804 uint32_t if_type;
2e90f4b5
JS
1805 struct lpfc_register portstat_reg = {0};
1806 uint32_t reg_err1, reg_err2;
1807 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1808 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1809 bool en_rn_msg = true;
946727dc 1810 struct temp_event temp_event_data;
65791f1f
JS
1811 struct lpfc_register portsmphr_reg;
1812 int rc, i;
da0436e9
JS
1813
1814 /* If the pci channel is offline, ignore possible errors, since
1815 * we cannot communicate with the pci card anyway.
1816 */
1817 if (pci_channel_offline(phba->pcidev))
1818 return;
da0436e9 1819
65791f1f 1820 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS
1821 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1822 switch (if_type) {
1823 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS
1824 pci_rd_rc1 = lpfc_readl(
1825 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1826 &uerrlo_reg);
1827 pci_rd_rc2 = lpfc_readl(
1828 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1829 &uemasklo_reg);
1830 /* consider PCI bus read error as pci_channel_offline */
1831 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1832 return;
65791f1f
JS
1833 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1834 lpfc_sli4_offline_eratt(phba);
1835 return;
1836 }
1837 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1838 "7623 Checking UE recoverable");
1839
1840 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1841 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1842 &portsmphr_reg.word0))
1843 continue;
1844
1845 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1846 &portsmphr_reg);
1847 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1848 LPFC_PORT_SEM_UE_RECOVERABLE)
1849 break;
1850 /*Sleep for 1Sec, before checking SEMAPHORE */
1851 msleep(1000);
1852 }
1853
1854 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1855 "4827 smphr_port_status x%x : Waited %dSec",
1856 smphr_port_status, i);
1857
1858 /* Recoverable UE, reset the HBA device */
1859 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1860 LPFC_PORT_SEM_UE_RECOVERABLE) {
1861 for (i = 0; i < 20; i++) {
1862 msleep(1000);
1863 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1864 &portsmphr_reg.word0) &&
1865 (LPFC_POST_STAGE_PORT_READY ==
1866 bf_get(lpfc_port_smphr_port_status,
1867 &portsmphr_reg))) {
1868 rc = lpfc_sli4_port_sta_fn_reset(phba,
1869 LPFC_MBX_NO_WAIT, en_rn_msg);
1870 if (rc == 0)
1871 return;
1872 lpfc_printf_log(phba,
1873 KERN_ERR, LOG_INIT,
1874 "4215 Failed to recover UE");
1875 break;
1876 }
1877 }
1878 }
1879 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1880 "7624 Firmware not ready: Failing UE recovery,"
1881 " waited %dSec", i);
2fcee4bf
JS
1882 lpfc_sli4_offline_eratt(phba);
1883 break;
946727dc 1884
2fcee4bf 1885 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS
1886 pci_rd_rc1 = lpfc_readl(
1887 phba->sli4_hba.u.if_type2.STATUSregaddr,
1888 &portstat_reg.word0);
1889 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS
1890 if (pci_rd_rc1 == -EIO) {
1891 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1892 "3151 PCI bus read access failure: x%x\n",
1893 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1894 return;
6b5151fd 1895 }
2e90f4b5
JS
1896 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1897 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1898 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS
1899 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1900 "2889 Port Overtemperature event, "
946727dc
JS
1901 "taking port offline Data: x%x x%x\n",
1902 reg_err1, reg_err2);
1903
310429ef 1904 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
1905 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1906 temp_event_data.event_code = LPFC_CRIT_TEMP;
1907 temp_event_data.data = 0xFFFFFFFF;
1908
1909 shost = lpfc_shost_from_vport(phba->pport);
1910 fc_host_post_vendor_event(shost, fc_get_event_number(),
1911 sizeof(temp_event_data),
1912 (char *)&temp_event_data,
1913 SCSI_NL_VID_TYPE_PCI
1914 | PCI_VENDOR_ID_EMULEX);
1915
2fcee4bf
JS
1916 spin_lock_irq(&phba->hbalock);
1917 phba->over_temp_state = HBA_OVER_TEMP;
1918 spin_unlock_irq(&phba->hbalock);
1919 lpfc_sli4_offline_eratt(phba);
946727dc 1920 return;
2fcee4bf 1921 }
2e90f4b5 1922 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1923 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1924 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS
1925 "3143 Port Down: Firmware Update "
1926 "Detected\n");
1927 en_rn_msg = false;
1928 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS
1929 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1930 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1931 "3144 Port Down: Debug Dump\n");
1932 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1933 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1934 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1935 "3145 Port Down: Provisioning\n");
618a5230 1936
946727dc
JS
1937 /* If resets are disabled then leave the HBA alone and return */
1938 if (!phba->cfg_enable_hba_reset)
1939 return;
1940
618a5230 1941 /* Check port status register for function reset */
e10b2022
JS
1942 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1943 en_rn_msg);
618a5230
JS
1944 if (rc == 0) {
1945 /* don't report event on forced debug dump */
1946 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1947 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1948 return;
1949 else
1950 break;
2fcee4bf 1951 }
618a5230 1952 /* fall through for not able to recover */
6b5151fd
JS
1953 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1954 "3152 Unrecoverable error, bring the port "
1955 "offline\n");
2fcee4bf
JS
1956 lpfc_sli4_offline_eratt(phba);
1957 break;
1958 case LPFC_SLI_INTF_IF_TYPE_1:
1959 default:
1960 break;
1961 }
2e90f4b5
JS
1962 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1963 "3123 Report dump event to upper layer\n");
1964 /* Send an internal error event to mgmt application */
1965 lpfc_board_errevt_to_mgmt(phba);
1966
1967 event_data = FC_REG_DUMP_EVENT;
1968 shost = lpfc_shost_from_vport(vport);
1969 fc_host_post_vendor_event(shost, fc_get_event_number(),
1970 sizeof(event_data), (char *) &event_data,
1971 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS
1972}
1973
1974/**
1975 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1976 * @phba: pointer to lpfc HBA data structure.
1977 *
1978 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1979 * routine from the API jump table function pointer from the lpfc_hba struct.
1980 *
1981 * Return codes
af901ca1 1982 * 0 - success.
da0436e9
JS
1983 * Any other value - error.
1984 **/
1985void
1986lpfc_handle_eratt(struct lpfc_hba *phba)
1987{
1988 (*phba->lpfc_handle_eratt)(phba);
1989}
1990
e59058c4 1991/**
3621a710 1992 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS
1993 * @phba: pointer to lpfc hba data structure.
1994 *
1995 * This routine is invoked from the worker thread to handle a HBA host
895427bd 1996 * attention link event. SLI3 only.
e59058c4 1997 **/
dea3101e 1998void
2e0fef85 1999lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 2000{
2e0fef85
JS
2001 struct lpfc_vport *vport = phba->pport;
2002 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB
2003 LPFC_MBOXQ_t *pmb;
2004 volatile uint32_t control;
2005 struct lpfc_dmabuf *mp;
09372820 2006 int rc = 0;
dea3101e
JB
2007
2008 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS
2009 if (!pmb) {
2010 rc = 1;
dea3101e 2011 goto lpfc_handle_latt_err_exit;
09372820 2012 }
dea3101e
JB
2013
2014 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS
2015 if (!mp) {
2016 rc = 2;
dea3101e 2017 goto lpfc_handle_latt_free_pmb;
09372820 2018 }
dea3101e
JB
2019
2020 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS
2021 if (!mp->virt) {
2022 rc = 3;
dea3101e 2023 goto lpfc_handle_latt_free_mp;
09372820 2024 }
dea3101e 2025
6281bfe0 2026 /* Cleanup any outstanding ELS commands */
549e55cd 2027 lpfc_els_flush_all_cmd(phba);
dea3101e
JB
2028
2029 psli->slistat.link_event++;
76a95d75
JS
2030 lpfc_read_topology(phba, pmb, mp);
2031 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 2032 pmb->vport = vport;
0d2b6b83 2033 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 2034 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 2035 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS
2036 if (rc == MBX_NOT_FINISHED) {
2037 rc = 4;
14691150 2038 goto lpfc_handle_latt_free_mbuf;
09372820 2039 }
dea3101e
JB
2040
2041 /* Clear Link Attention in HA REG */
2e0fef85 2042 spin_lock_irq(&phba->hbalock);
dea3101e
JB
2043 writel(HA_LATT, phba->HAregaddr);
2044 readl(phba->HAregaddr); /* flush */
2e0fef85 2045 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
2046
2047 return;
2048
14691150 2049lpfc_handle_latt_free_mbuf:
895427bd 2050 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 2051 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e
JB
2052lpfc_handle_latt_free_mp:
2053 kfree(mp);
2054lpfc_handle_latt_free_pmb:
1dcb58e5 2055 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
2056lpfc_handle_latt_err_exit:
2057 /* Enable Link attention interrupts */
2e0fef85 2058 spin_lock_irq(&phba->hbalock);
dea3101e
JB
2059 psli->sli_flag |= LPFC_PROCESS_LA;
2060 control = readl(phba->HCregaddr);
2061 control |= HC_LAINT_ENA;
2062 writel(control, phba->HCregaddr);
2063 readl(phba->HCregaddr); /* flush */
2064
2065 /* Clear Link Attention in HA REG */
2066 writel(HA_LATT, phba->HAregaddr);
2067 readl(phba->HAregaddr); /* flush */
2e0fef85 2068 spin_unlock_irq(&phba->hbalock);
dea3101e 2069 lpfc_linkdown(phba);
2e0fef85 2070 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2071
09372820
JS
2072 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
2073 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e
JB
2074
2075 return;
2076}
2077
e59058c4 2078/**
3621a710 2079 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS
2080 * @phba: pointer to lpfc hba data structure.
2081 * @vpd: pointer to the vital product data.
2082 * @len: length of the vital product data in bytes.
2083 *
2084 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2085 * an array of characters. In this routine, the ModelName, ProgramType, and
2086 * ModelDesc, etc. fields of the phba data structure will be populated.
2087 *
2088 * Return codes
2089 * 0 - pointer to the VPD passed in is NULL
2090 * 1 - success
2091 **/
3772a991 2092int
2e0fef85 2093lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e
JB
2094{
2095 uint8_t lenlo, lenhi;
07da60c1 2096 int Length;
dea3101e
JB
2097 int i, j;
2098 int finished = 0;
2099 int index = 0;
2100
2101 if (!vpd)
2102 return 0;
2103
2104 /* Vital Product */
ed957684 2105 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2106 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e
JB
2107 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2108 (uint32_t) vpd[3]);
74b72a59 2109 while (!finished && (index < (len - 4))) {
dea3101e
JB
2110 switch (vpd[index]) {
2111 case 0x82:
74b72a59 2112 case 0x91:
dea3101e
JB
2113 index += 1;
2114 lenlo = vpd[index];
2115 index += 1;
2116 lenhi = vpd[index];
2117 index += 1;
2118 i = ((((unsigned short)lenhi) << 8) + lenlo);
2119 index += i;
2120 break;
2121 case 0x90:
2122 index += 1;
2123 lenlo = vpd[index];
2124 index += 1;
2125 lenhi = vpd[index];
2126 index += 1;
2127 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW
2128 if (Length > len - index)
2129 Length = len - index;
dea3101e
JB
2130 while (Length > 0) {
2131 /* Look for Serial Number */
2132 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2133 index += 2;
2134 i = vpd[index];
2135 index += 1;
2136 j = 0;
2137 Length -= (3+i);
2138 while(i--) {
2139 phba->SerialNumber[j++] = vpd[index++];
2140 if (j == 31)
2141 break;
2142 }
2143 phba->SerialNumber[j] = 0;
2144 continue;
2145 }
2146 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2147 phba->vpd_flag |= VPD_MODEL_DESC;
2148 index += 2;
2149 i = vpd[index];
2150 index += 1;
2151 j = 0;
2152 Length -= (3+i);
2153 while(i--) {
2154 phba->ModelDesc[j++] = vpd[index++];
2155 if (j == 255)
2156 break;
2157 }
2158 phba->ModelDesc[j] = 0;
2159 continue;
2160 }
2161 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2162 phba->vpd_flag |= VPD_MODEL_NAME;
2163 index += 2;
2164 i = vpd[index];
2165 index += 1;
2166 j = 0;
2167 Length -= (3+i);
2168 while(i--) {
2169 phba->ModelName[j++] = vpd[index++];
2170 if (j == 79)
2171 break;
2172 }
2173 phba->ModelName[j] = 0;
2174 continue;
2175 }
2176 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2177 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2178 index += 2;
2179 i = vpd[index];
2180 index += 1;
2181 j = 0;
2182 Length -= (3+i);
2183 while(i--) {
2184 phba->ProgramType[j++] = vpd[index++];
2185 if (j == 255)
2186 break;
2187 }
2188 phba->ProgramType[j] = 0;
2189 continue;
2190 }
2191 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2192 phba->vpd_flag |= VPD_PORT;
2193 index += 2;
2194 i = vpd[index];
2195 index += 1;
2196 j = 0;
2197 Length -= (3+i);
2198 while(i--) {
cd1c8301
JS
2199 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2200 (phba->sli4_hba.pport_name_sta ==
2201 LPFC_SLI4_PPNAME_GET)) {
2202 j++;
2203 index++;
2204 } else
2205 phba->Port[j++] = vpd[index++];
2206 if (j == 19)
2207 break;
dea3101e 2208 }
cd1c8301
JS
2209 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2210 (phba->sli4_hba.pport_name_sta ==
2211 LPFC_SLI4_PPNAME_NON))
2212 phba->Port[j] = 0;
dea3101e
JB
2213 continue;
2214 }
2215 else {
2216 index += 2;
2217 i = vpd[index];
2218 index += 1;
2219 index += i;
2220 Length -= (3 + i);
2221 }
2222 }
2223 finished = 0;
2224 break;
2225 case 0x78:
2226 finished = 1;
2227 break;
2228 default:
2229 index ++;
2230 break;
2231 }
74b72a59 2232 }
dea3101e
JB
2233
2234 return(1);
2235}
2236
e59058c4 2237/**
3621a710 2238 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS
2239 * @phba: pointer to lpfc hba data structure.
2240 * @mdp: pointer to the data structure to hold the derived model name.
2241 * @descp: pointer to the data structure to hold the derived description.
2242 *
2243 * This routine retrieves HBA's description based on its registered PCI device
2244 * ID. The @descp passed into this function points to an array of 256 chars. It
2245 * shall be returned with the model name, maximum speed, and the host bus type.
2246 * The @mdp passed into this function points to an array of 80 chars. When the
2247 * function returns, the @mdp will be filled with the model name.
2248 **/
dea3101e 2249static void
2e0fef85 2250lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e
JB
2251{
2252 lpfc_vpd_t *vp;
fefcb2b6 2253 uint16_t dev_id = phba->pcidev->device;
74b72a59 2254 int max_speed;
84774a4d 2255 int GE = 0;
da0436e9 2256 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2257 struct {
a747c9ce
JS
2258 char *name;
2259 char *bus;
2260 char *function;
2261 } m = {"<Unknown>", "", ""};
74b72a59
JW
2262
2263 if (mdp && mdp[0] != '\0'
2264 && descp && descp[0] != '\0')
2265 return;
2266
d38dd52c
JS
2267 if (phba->lmt & LMT_32Gb)
2268 max_speed = 32;
2269 else if (phba->lmt & LMT_16Gb)
c0c11512
JS
2270 max_speed = 16;
2271 else if (phba->lmt & LMT_10Gb)
74b72a59
JW
2272 max_speed = 10;
2273 else if (phba->lmt & LMT_8Gb)
2274 max_speed = 8;
2275 else if (phba->lmt & LMT_4Gb)
2276 max_speed = 4;
2277 else if (phba->lmt & LMT_2Gb)
2278 max_speed = 2;
4169d868 2279 else if (phba->lmt & LMT_1Gb)
74b72a59 2280 max_speed = 1;
4169d868
JS
2281 else
2282 max_speed = 0;
dea3101e
JB
2283
2284 vp = &phba->vpd;
dea3101e 2285
e4adb204 2286 switch (dev_id) {
06325e74 2287 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS
2288 m = (typeof(m)){"LP6000", "PCI",
2289 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2290 break;
dea3101e
JB
2291 case PCI_DEVICE_ID_SUPERFLY:
2292 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2293 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2294 else
12222f4f
JS
2295 m = (typeof(m)){"LP7000E", "PCI", ""};
2296 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2297 break;
2298 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2299 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2300 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2301 break;
2302 case PCI_DEVICE_ID_CENTAUR:
2303 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2304 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2305 else
12222f4f
JS
2306 m = (typeof(m)){"LP9000", "PCI", ""};
2307 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2308 break;
2309 case PCI_DEVICE_ID_RFLY:
a747c9ce 2310 m = (typeof(m)){"LP952", "PCI",
12222f4f 2311 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2312 break;
2313 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2314 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2315 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2316 break;
2317 case PCI_DEVICE_ID_THOR:
a747c9ce 2318 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2319 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2320 break;
2321 case PCI_DEVICE_ID_VIPER:
a747c9ce 2322 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2323 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2324 break;
2325 case PCI_DEVICE_ID_PFLY:
a747c9ce 2326 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2327 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2328 break;
2329 case PCI_DEVICE_ID_TFLY:
a747c9ce 2330 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2331 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2332 break;
2333 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2334 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2335 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2336 break;
e4adb204 2337 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2338 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2339 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2340 break;
2341 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2342 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2343 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2344 break;
2345 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS
2346 m = (typeof(m)){"LPe1000", "PCIe",
2347 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2348 break;
2349 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS
2350 m = (typeof(m)){"LPe1000-SP", "PCIe",
2351 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2352 break;
2353 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS
2354 m = (typeof(m)){"LPe1002-SP", "PCIe",
2355 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2356 break;
dea3101e 2357 case PCI_DEVICE_ID_BMID:
a747c9ce 2358 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e
JB
2359 break;
2360 case PCI_DEVICE_ID_BSMB:
12222f4f
JS
2361 m = (typeof(m)){"LP111", "PCI-X2",
2362 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2363 break;
2364 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2365 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2366 break;
e4adb204 2367 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2368 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC
2369 break;
2370 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2371 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2372 GE = 1;
e4adb204 2373 break;
dea3101e 2374 case PCI_DEVICE_ID_ZMID:
a747c9ce 2375 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2376 break;
2377 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2378 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2379 break;
2380 case PCI_DEVICE_ID_LP101:
12222f4f
JS
2381 m = (typeof(m)){"LP101", "PCI-X",
2382 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2383 break;
2384 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS
2385 m = (typeof(m)){"LP10000-S", "PCI",
2386 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2387 break;
e4adb204 2388 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS
2389 m = (typeof(m)){"LP11000-S", "PCI-X2",
2390 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2391 break;
e4adb204 2392 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS
2393 m = (typeof(m)){"LPe11000-S", "PCIe",
2394 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2395 break;
b87eab38 2396 case PCI_DEVICE_ID_SAT:
a747c9ce 2397 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2398 break;
2399 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2400 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2401 break;
2402 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2403 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2404 break;
2405 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2406 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2407 break;
2408 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2409 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2410 break;
2411 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2412 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2413 break;
84774a4d 2414 case PCI_DEVICE_ID_HORNET:
12222f4f
JS
2415 m = (typeof(m)){"LP21000", "PCIe",
2416 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS
2417 GE = 1;
2418 break;
2419 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2420 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2421 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2422 break;
2423 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2424 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2425 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2426 break;
2427 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2428 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2429 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2430 break;
da0436e9
JS
2431 case PCI_DEVICE_ID_TIGERSHARK:
2432 oneConnect = 1;
a747c9ce 2433 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2434 break;
a747c9ce 2435 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2436 oneConnect = 1;
a747c9ce
JS
2437 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2438 break;
2439 case PCI_DEVICE_ID_FALCON:
2440 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2441 "EmulexSecure Fibre"};
6669f9bb 2442 break;
98fc5dd9
JS
2443 case PCI_DEVICE_ID_BALIUS:
2444 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2445 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2446 break;
085c647c 2447 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2448 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2449 break;
12222f4f
JS
2450 case PCI_DEVICE_ID_LANCER_FC_VF:
2451 m = (typeof(m)){"LPe16000", "PCIe",
2452 "Obsolete, Unsupported Fibre Channel Adapter"};
2453 break;
085c647c
JS
2454 case PCI_DEVICE_ID_LANCER_FCOE:
2455 oneConnect = 1;
079b5c91 2456 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2457 break;
12222f4f
JS
2458 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2459 oneConnect = 1;
2460 m = (typeof(m)){"OCe15100", "PCIe",
2461 "Obsolete, Unsupported FCoE"};
2462 break;
d38dd52c
JS
2463 case PCI_DEVICE_ID_LANCER_G6_FC:
2464 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2465 break;
f8cafd38
JS
2466 case PCI_DEVICE_ID_SKYHAWK:
2467 case PCI_DEVICE_ID_SKYHAWK_VF:
2468 oneConnect = 1;
2469 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2470 break;
5cc36b3c 2471 default:
a747c9ce 2472 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2473 break;
dea3101e 2474 }
74b72a59
JW
2475
2476 if (mdp && mdp[0] == '\0')
2477 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS
2478 /*
2479 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS
2480 * and we put the port number on the end
2481 */
2482 if (descp && descp[0] == '\0') {
2483 if (oneConnect)
2484 snprintf(descp, 255,
4169d868 2485 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2486 m.name, m.function,
da0436e9 2487 phba->Port);
4169d868
JS
2488 else if (max_speed == 0)
2489 snprintf(descp, 255,
290237d2 2490 "Emulex %s %s %s",
4169d868 2491 m.name, m.bus, m.function);
da0436e9
JS
2492 else
2493 snprintf(descp, 255,
2494 "Emulex %s %d%s %s %s",
a747c9ce
JS
2495 m.name, max_speed, (GE) ? "GE" : "Gb",
2496 m.bus, m.function);
da0436e9 2497 }
dea3101e
JB
2498}
2499
e59058c4 2500/**
3621a710 2501 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS
2502 * @phba: pointer to lpfc hba data structure.
2503 * @pring: pointer to a IOCB ring.
2504 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2505 *
2506 * This routine posts a given number of IOCBs with the associated DMA buffer
2507 * descriptors specified by the cnt argument to the given IOCB ring.
2508 *
2509 * Return codes
2510 * The number of IOCBs NOT able to be posted to the IOCB ring.
2511 **/
dea3101e 2512int
495a714c 2513lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e
JB
2514{
2515 IOCB_t *icmd;
0bd4ca25 2516 struct lpfc_iocbq *iocb;
dea3101e
JB
2517 struct lpfc_dmabuf *mp1, *mp2;
2518
2519 cnt += pring->missbufcnt;
2520
2521 /* While there are buffers to post */
2522 while (cnt > 0) {
2523 /* Allocate buffer for command iocb */
0bd4ca25 2524 iocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
2525 if (iocb == NULL) {
2526 pring->missbufcnt = cnt;
2527 return cnt;
2528 }
dea3101e
JB
2529 icmd = &iocb->iocb;
2530
2531 /* 2 buffers can be posted per command */
2532 /* Allocate buffer to post */
2533 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2534 if (mp1)
98c9ea5c
JS
2535 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2536 if (!mp1 || !mp1->virt) {
c9475cb0 2537 kfree(mp1);
604a3e30 2538 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2539 pring->missbufcnt = cnt;
2540 return cnt;
2541 }
2542
2543 INIT_LIST_HEAD(&mp1->list);
2544 /* Allocate buffer to post */
2545 if (cnt > 1) {
2546 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2547 if (mp2)
2548 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2549 &mp2->phys);
98c9ea5c 2550 if (!mp2 || !mp2->virt) {
c9475cb0 2551 kfree(mp2);
dea3101e
JB
2552 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2553 kfree(mp1);
604a3e30 2554 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2555 pring->missbufcnt = cnt;
2556 return cnt;
2557 }
2558
2559 INIT_LIST_HEAD(&mp2->list);
2560 } else {
2561 mp2 = NULL;
2562 }
2563
2564 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2565 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2566 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2567 icmd->ulpBdeCount = 1;
2568 cnt--;
2569 if (mp2) {
2570 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2571 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2572 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2573 cnt--;
2574 icmd->ulpBdeCount = 2;
2575 }
2576
2577 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2578 icmd->ulpLe = 1;
2579
3772a991
JS
2580 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2581 IOCB_ERROR) {
dea3101e
JB
2582 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2583 kfree(mp1);
2584 cnt++;
2585 if (mp2) {
2586 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2587 kfree(mp2);
2588 cnt++;
2589 }
604a3e30 2590 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2591 pring->missbufcnt = cnt;
dea3101e
JB
2592 return cnt;
2593 }
dea3101e 2594 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2595 if (mp2)
dea3101e 2596 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e
JB
2597 }
2598 pring->missbufcnt = 0;
2599 return 0;
2600}
2601
e59058c4 2602/**
3621a710 2603 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS
2604 * @phba: pointer to lpfc hba data structure.
2605 *
2606 * This routine posts initial receive IOCB buffers to the ELS ring. The
2607 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2608 * set to 64 IOCBs. SLI3 only.
e59058c4
JS
2609 *
2610 * Return codes
2611 * 0 - success (currently always success)
2612 **/
dea3101e 2613static int
2e0fef85 2614lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e
JB
2615{
2616 struct lpfc_sli *psli = &phba->sli;
2617
2618 /* Ring 0, ELS / CT buffers */
895427bd 2619 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e
JB
2620 /* Ring 2 - FCP no buffers needed */
2621
2622 return 0;
2623}
2624
2625#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2626
e59058c4 2627/**
3621a710 2628 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS
2629 * @HashResultPointer: pointer to an array as hash table.
2630 *
2631 * This routine sets up the initial values to the array of hash table entries
2632 * for the LC HBAs.
2633 **/
dea3101e
JB
2634static void
2635lpfc_sha_init(uint32_t * HashResultPointer)
2636{
2637 HashResultPointer[0] = 0x67452301;
2638 HashResultPointer[1] = 0xEFCDAB89;
2639 HashResultPointer[2] = 0x98BADCFE;
2640 HashResultPointer[3] = 0x10325476;
2641 HashResultPointer[4] = 0xC3D2E1F0;
2642}
2643
e59058c4 2644/**
3621a710 2645 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS
2646 * @HashResultPointer: pointer to an initial/result hash table.
2647 * @HashWorkingPointer: pointer to an working hash table.
2648 *
2649 * This routine iterates an initial hash table pointed by @HashResultPointer
2650 * with the values from the working hash table pointeed by @HashWorkingPointer.
2651 * The results are putting back to the initial hash table, returned through
2652 * the @HashResultPointer as the result hash table.
2653 **/
dea3101e
JB
2654static void
2655lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2656{
2657 int t;
2658 uint32_t TEMP;
2659 uint32_t A, B, C, D, E;
2660 t = 16;
2661 do {
2662 HashWorkingPointer[t] =
2663 S(1,
2664 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2665 8] ^
2666 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2667 } while (++t <= 79);
2668 t = 0;
2669 A = HashResultPointer[0];
2670 B = HashResultPointer[1];
2671 C = HashResultPointer[2];
2672 D = HashResultPointer[3];
2673 E = HashResultPointer[4];
2674
2675 do {
2676 if (t < 20) {
2677 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2678 } else if (t < 40) {
2679 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2680 } else if (t < 60) {
2681 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2682 } else {
2683 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2684 }
2685 TEMP += S(5, A) + E + HashWorkingPointer[t];
2686 E = D;
2687 D = C;
2688 C = S(30, B);
2689 B = A;
2690 A = TEMP;
2691 } while (++t <= 79);
2692
2693 HashResultPointer[0] += A;
2694 HashResultPointer[1] += B;
2695 HashResultPointer[2] += C;
2696 HashResultPointer[3] += D;
2697 HashResultPointer[4] += E;
2698
2699}
2700
e59058c4 2701/**
3621a710 2702 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS
2703 * @RandomChallenge: pointer to the entry of host challenge random number array.
2704 * @HashWorking: pointer to the entry of the working hash array.
2705 *
2706 * This routine calculates the working hash array referred by @HashWorking
2707 * from the challenge random numbers associated with the host, referred by
2708 * @RandomChallenge. The result is put into the entry of the working hash
2709 * array and returned by reference through @HashWorking.
2710 **/
dea3101e
JB
2711static void
2712lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2713{
2714 *HashWorking = (*RandomChallenge ^ *HashWorking);
2715}
2716
e59058c4 2717/**
3621a710 2718 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS
2719 * @phba: pointer to lpfc hba data structure.
2720 * @hbainit: pointer to an array of unsigned 32-bit integers.
2721 *
2722 * This routine performs the special handling for LC HBA initialization.
2723 **/
dea3101e
JB
2724void
2725lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2726{
2727 int t;
2728 uint32_t *HashWorking;
2e0fef85 2729 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2730
bbfbbbc1 2731 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e
JB
2732 if (!HashWorking)
2733 return;
2734
dea3101e
JB
2735 HashWorking[0] = HashWorking[78] = *pwwnn++;
2736 HashWorking[1] = HashWorking[79] = *pwwnn;
2737
2738 for (t = 0; t < 7; t++)
2739 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2740
2741 lpfc_sha_init(hbainit);
2742 lpfc_sha_iterate(hbainit, HashWorking);
2743 kfree(HashWorking);
2744}
2745
e59058c4 2746/**
3621a710 2747 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS
2748 * @vport: pointer to a virtual N_Port data structure.
2749 *
2750 * This routine performs the necessary cleanups before deleting the @vport.
2751 * It invokes the discovery state machine to perform necessary state
2752 * transitions and to release the ndlps associated with the @vport. Note,
2753 * the physical port is treated as @vport 0.
2754 **/
87af33fe 2755void
2e0fef85 2756lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2757{
87af33fe 2758 struct lpfc_hba *phba = vport->phba;
dea3101e 2759 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2760 int i = 0;
dea3101e 2761
87af33fe
JS
2762 if (phba->link_state > LPFC_LINK_DOWN)
2763 lpfc_port_link_failure(vport);
2764
2765 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS
2766 if (!NLP_CHK_NODE_ACT(ndlp)) {
2767 ndlp = lpfc_enable_node(vport, ndlp,
2768 NLP_STE_UNUSED_NODE);
2769 if (!ndlp)
2770 continue;
2771 spin_lock_irq(&phba->ndlp_lock);
2772 NLP_SET_FREE_REQ(ndlp);
2773 spin_unlock_irq(&phba->ndlp_lock);
2774 /* Trigger the release of the ndlp memory */
2775 lpfc_nlp_put(ndlp);
2776 continue;
2777 }
2778 spin_lock_irq(&phba->ndlp_lock);
2779 if (NLP_CHK_FREE_REQ(ndlp)) {
2780 /* The ndlp should not be in memory free mode already */
2781 spin_unlock_irq(&phba->ndlp_lock);
2782 continue;
2783 } else
2784 /* Indicate request for freeing ndlp memory */
2785 NLP_SET_FREE_REQ(ndlp);
2786 spin_unlock_irq(&phba->ndlp_lock);
2787
58da1ffb
JS
2788 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2789 ndlp->nlp_DID == Fabric_DID) {
2790 /* Just free up ndlp with Fabric_DID for vports */
2791 lpfc_nlp_put(ndlp);
2792 continue;
2793 }
2794
eff4a01b
JS
2795 /* take care of nodes in unused state before the state
2796 * machine taking action.
2797 */
2798 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2799 lpfc_nlp_put(ndlp);
2800 continue;
2801 }
2802
87af33fe
JS
2803 if (ndlp->nlp_type & NLP_FABRIC)
2804 lpfc_disc_state_machine(vport, ndlp, NULL,
2805 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2806
87af33fe
JS
2807 lpfc_disc_state_machine(vport, ndlp, NULL,
2808 NLP_EVT_DEVICE_RM);
2809 }
2810
a8adb832
JS
2811 /* At this point, ALL ndlp's should be gone
2812 * because of the previous NLP_EVT_DEVICE_RM.
2813 * Lets wait for this to happen, if needed.
2814 */
87af33fe 2815 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2816 if (i++ > 3000) {
87af33fe 2817 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2818 "0233 Nodelist not empty\n");
e47c9093
JS
2819 list_for_each_entry_safe(ndlp, next_ndlp,
2820 &vport->fc_nodes, nlp_listp) {
2821 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2822 LOG_NODE,
d7c255b2 2823 "0282 did:x%x ndlp:x%p "
e47c9093
JS
2824 "usgmap:x%x refcnt:%d\n",
2825 ndlp->nlp_DID, (void *)ndlp,
2826 ndlp->nlp_usg_map,
2c935bc5 2827 kref_read(&ndlp->kref));
e47c9093 2828 }
a8adb832 2829 break;
87af33fe 2830 }
a8adb832
JS
2831
2832 /* Wait for any activity on ndlps to settle */
2833 msleep(10);
87af33fe 2834 }
1151e3ec 2835 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e
JB
2836}
2837
e59058c4 2838/**
3621a710 2839 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS
2840 * @vport: pointer to a virtual N_Port data structure.
2841 *
2842 * This routine stops all the timers associated with a @vport. This function
2843 * is invoked before disabling or deleting a @vport. Note that the physical
2844 * port is treated as @vport 0.
2845 **/
92d7f7b0
JS
2846void
2847lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2848{
92d7f7b0 2849 del_timer_sync(&vport->els_tmofunc);
92494144 2850 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS
2851 lpfc_can_disctmo(vport);
2852 return;
dea3101e
JB
2853}
2854
ecfd03c6
JS
2855/**
2856 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2857 * @phba: pointer to lpfc hba data structure.
2858 *
2859 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2860 * caller of this routine should already hold the host lock.
2861 **/
2862void
2863__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2864{
5ac6b303
JS
2865 /* Clear pending FCF rediscovery wait flag */
2866 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2867
ecfd03c6
JS
2868 /* Now, try to stop the timer */
2869 del_timer(&phba->fcf.redisc_wait);
2870}
2871
2872/**
2873 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2874 * @phba: pointer to lpfc hba data structure.
2875 *
2876 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2877 * checks whether the FCF rediscovery wait timer is pending with the host
2878 * lock held before proceeding with disabling the timer and clearing the
2879 * wait timer pendig flag.
2880 **/
2881void
2882lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2883{
2884 spin_lock_irq(&phba->hbalock);
2885 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2886 /* FCF rediscovery timer already fired or stopped */
2887 spin_unlock_irq(&phba->hbalock);
2888 return;
2889 }
2890 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS
2891 /* Clear failover in progress flags */
2892 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS
2893 spin_unlock_irq(&phba->hbalock);
2894}
2895
e59058c4 2896/**
3772a991 2897 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS
2898 * @phba: pointer to lpfc hba data structure.
2899 *
2900 * This routine stops all the timers associated with a HBA. This function is
2901 * invoked before either putting a HBA offline or unloading the driver.
2902 **/
3772a991
JS
2903void
2904lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2905{
51ef4c26 2906 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2907 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2908 del_timer_sync(&phba->fabric_block_timer);
9399627f 2909 del_timer_sync(&phba->eratt_poll);
3772a991 2910 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS
2911 if (phba->sli_rev == LPFC_SLI_REV4) {
2912 del_timer_sync(&phba->rrq_tmr);
2913 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2914 }
3772a991
JS
2915 phba->hb_outstanding = 0;
2916
2917 switch (phba->pci_dev_grp) {
2918 case LPFC_PCI_DEV_LP:
2919 /* Stop any LightPulse device specific driver timers */
2920 del_timer_sync(&phba->fcp_poll_timer);
2921 break;
2922 case LPFC_PCI_DEV_OC:
2923 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2924 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS
2925 break;
2926 default:
2927 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2928 "0297 Invalid device group (x%x)\n",
2929 phba->pci_dev_grp);
2930 break;
2931 }
2e0fef85 2932 return;
dea3101e
JB
2933}
2934
e59058c4 2935/**
3621a710 2936 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS
2937 * @phba: pointer to lpfc hba data structure.
2938 *
2939 * This routine marks a HBA's management interface as blocked. Once the HBA's
2940 * management interface is marked as blocked, all the user space access to
2941 * the HBA, whether they are from sysfs interface or libdfc interface will
2942 * all be blocked. The HBA is set to block the management interface when the
2943 * driver prepares the HBA interface for online or offline.
2944 **/
a6ababd2 2945static void
618a5230 2946lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB
2947{
2948 unsigned long iflag;
6e7288d9
JS
2949 uint8_t actcmd = MBX_HEARTBEAT;
2950 unsigned long timeout;
2951
a6ababd2
AB
2952 spin_lock_irqsave(&phba->hbalock, iflag);
2953 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS
2954 spin_unlock_irqrestore(&phba->hbalock, iflag);
2955 if (mbx_action == LPFC_MBX_NO_WAIT)
2956 return;
2957 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2958 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2959 if (phba->sli.mbox_active) {
6e7288d9 2960 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS
2961 /* Determine how long we might wait for the active mailbox
2962 * command to be gracefully completed by firmware.
2963 */
2964 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2965 phba->sli.mbox_active) * 1000) + jiffies;
2966 }
a6ababd2 2967 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2968
6e7288d9
JS
2969 /* Wait for the outstnading mailbox command to complete */
2970 while (phba->sli.mbox_active) {
2971 /* Check active mailbox complete status every 2ms */
2972 msleep(2);
2973 if (time_after(jiffies, timeout)) {
2974 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2975 "2813 Mgmt IO is Blocked %x "
2976 "- mbox cmd %x still active\n",
2977 phba->sli.sli_flag, actcmd);
2978 break;
2979 }
2980 }
a6ababd2
AB
2981}
2982
6b5151fd
JS
2983/**
2984 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2985 * @phba: pointer to lpfc hba data structure.
2986 *
2987 * Allocate RPIs for all active remote nodes. This is needed whenever
2988 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2989 * is to fixup the temporary rpi assignments.
2990 **/
2991void
2992lpfc_sli4_node_prep(struct lpfc_hba *phba)
2993{
2994 struct lpfc_nodelist *ndlp, *next_ndlp;
2995 struct lpfc_vport **vports;
9d3d340d
JS
2996 int i, rpi;
2997 unsigned long flags;
6b5151fd
JS
2998
2999 if (phba->sli_rev != LPFC_SLI_REV4)
3000 return;
3001
3002 vports = lpfc_create_vport_work_array(phba);
9d3d340d
JS
3003 if (vports == NULL)
3004 return;
6b5151fd 3005
9d3d340d
JS
3006 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3007 if (vports[i]->load_flag & FC_UNLOADING)
3008 continue;
3009
3010 list_for_each_entry_safe(ndlp, next_ndlp,
3011 &vports[i]->fc_nodes,
3012 nlp_listp) {
3013 if (!NLP_CHK_NODE_ACT(ndlp))
3014 continue;
3015 rpi = lpfc_sli4_alloc_rpi(phba);
3016 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3017 spin_lock_irqsave(&phba->ndlp_lock, flags);
3018 NLP_CLR_NODE_ACT(ndlp);
3019 spin_unlock_irqrestore(&phba->ndlp_lock, flags);
3020 continue;
6b5151fd 3021 }
9d3d340d
JS
3022 ndlp->nlp_rpi = rpi;
3023 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
3024 "0009 rpi:%x DID:%x "
3025 "flg:%x map:%x %p\n", ndlp->nlp_rpi,
3026 ndlp->nlp_DID, ndlp->nlp_flag,
3027 ndlp->nlp_usg_map, ndlp);
6b5151fd
JS
3028 }
3029 }
3030 lpfc_destroy_vport_work_array(phba, vports);
3031}
3032
e59058c4 3033/**
3621a710 3034 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS
3035 * @phba: pointer to lpfc hba data structure.
3036 *
3037 * This routine initializes the HBA and brings a HBA online. During this
3038 * process, the management interface is blocked to prevent user space access
3039 * to the HBA interfering with the driver initialization.
3040 *
3041 * Return codes
3042 * 0 - successful
3043 * 1 - failed
3044 **/
dea3101e 3045int
2e0fef85 3046lpfc_online(struct lpfc_hba *phba)
dea3101e 3047{
372bd282 3048 struct lpfc_vport *vport;
549e55cd 3049 struct lpfc_vport **vports;
a145fda3 3050 int i, error = 0;
16a3a208 3051 bool vpis_cleared = false;
2e0fef85 3052
dea3101e
JB
3053 if (!phba)
3054 return 0;
372bd282 3055 vport = phba->pport;
dea3101e 3056
2e0fef85 3057 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e
JB
3058 return 0;
3059
ed957684 3060 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3061 "0458 Bring Adapter online\n");
dea3101e 3062
618a5230 3063 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 3064
da0436e9
JS
3065 if (phba->sli_rev == LPFC_SLI_REV4) {
3066 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3067 lpfc_unblock_mgmt_io(phba);
3068 return 1;
3069 }
16a3a208
JS
3070 spin_lock_irq(&phba->hbalock);
3071 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3072 vpis_cleared = true;
3073 spin_unlock_irq(&phba->hbalock);
a145fda3
DK
3074
3075 /* Reestablish the local initiator port.
3076 * The offline process destroyed the previous lport.
3077 */
3078 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3079 !phba->nvmet_support) {
3080 error = lpfc_nvme_create_localport(phba->pport);
3081 if (error)
3082 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3083 "6132 NVME restore reg failed "
3084 "on nvmei error x%x\n", error);
3085 }
da0436e9 3086 } else {
895427bd 3087 lpfc_sli_queue_init(phba);
da0436e9
JS
3088 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3089 lpfc_unblock_mgmt_io(phba);
3090 return 1;
3091 }
46fa311e 3092 }
dea3101e 3093
549e55cd 3094 vports = lpfc_create_vport_work_array(phba);
aeb6641f 3095 if (vports != NULL) {
da0436e9 3096 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS
3097 struct Scsi_Host *shost;
3098 shost = lpfc_shost_from_vport(vports[i]);
3099 spin_lock_irq(shost->host_lock);
3100 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
3101 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3102 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 3103 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 3104 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS
3105 if ((vpis_cleared) &&
3106 (vports[i]->port_type !=
3107 LPFC_PHYSICAL_PORT))
3108 vports[i]->vpi = 0;
3109 }
549e55cd
JS
3110 spin_unlock_irq(shost->host_lock);
3111 }
aeb6641f
AB
3112 }
3113 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3114
46fa311e 3115 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
3116 return 0;
3117}
3118
e59058c4 3119/**
3621a710 3120 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS
3121 * @phba: pointer to lpfc hba data structure.
3122 *
3123 * This routine marks a HBA's management interface as not blocked. Once the
3124 * HBA's management interface is marked as not blocked, all the user space
3125 * access to the HBA, whether they are from sysfs interface or libdfc
3126 * interface will be allowed. The HBA is set to block the management interface
3127 * when the driver prepares the HBA interface for online or offline and then
3128 * set to unblock the management interface afterwards.
3129 **/
46fa311e
JS
3130void
3131lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3132{
3133 unsigned long iflag;
3134
2e0fef85
JS
3135 spin_lock_irqsave(&phba->hbalock, iflag);
3136 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3137 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS
3138}
3139
e59058c4 3140/**
3621a710 3141 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS
3142 * @phba: pointer to lpfc hba data structure.
3143 *
3144 * This routine is invoked to prepare a HBA to be brought offline. It performs
3145 * unregistration login to all the nodes on all vports and flushes the mailbox
3146 * queue to make it ready to be brought offline.
3147 **/
46fa311e 3148void
618a5230 3149lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3150{
2e0fef85 3151 struct lpfc_vport *vport = phba->pport;
46fa311e 3152 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3153 struct lpfc_vport **vports;
72100cc4 3154 struct Scsi_Host *shost;
87af33fe 3155 int i;
dea3101e 3156
2e0fef85 3157 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3158 return;
dea3101e 3159
618a5230 3160 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e
JB
3161
3162 lpfc_linkdown(phba);
3163
87af33fe
JS
3164 /* Issue an unreg_login to all nodes on all vports */
3165 vports = lpfc_create_vport_work_array(phba);
3166 if (vports != NULL) {
da0436e9 3167 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS
3168 if (vports[i]->load_flag & FC_UNLOADING)
3169 continue;
72100cc4
JS
3170 shost = lpfc_shost_from_vport(vports[i]);
3171 spin_lock_irq(shost->host_lock);
c868595d 3172 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS
3173 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3174 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3175 spin_unlock_irq(shost->host_lock);
695a814e 3176
87af33fe
JS
3177 shost = lpfc_shost_from_vport(vports[i]);
3178 list_for_each_entry_safe(ndlp, next_ndlp,
3179 &vports[i]->fc_nodes,
3180 nlp_listp) {
e47c9093
JS
3181 if (!NLP_CHK_NODE_ACT(ndlp))
3182 continue;
87af33fe
JS
3183 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3184 continue;
3185 if (ndlp->nlp_type & NLP_FABRIC) {
3186 lpfc_disc_state_machine(vports[i], ndlp,
3187 NULL, NLP_EVT_DEVICE_RECOVERY);
3188 lpfc_disc_state_machine(vports[i], ndlp,
3189 NULL, NLP_EVT_DEVICE_RM);
3190 }
3191 spin_lock_irq(shost->host_lock);
3192 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3193 spin_unlock_irq(shost->host_lock);
6b5151fd
JS
3194 /*
3195 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS
3196 * RPI. Get a new RPI when the adapter port
3197 * comes back online.
6b5151fd 3198 */
be6bb941
JS
3199 if (phba->sli_rev == LPFC_SLI_REV4) {
3200 lpfc_printf_vlog(ndlp->vport,
3201 KERN_INFO, LOG_NODE,
3202 "0011 lpfc_offline: "
3203 "ndlp:x%p did %x "
3204 "usgmap:x%x rpi:%x\n",
3205 ndlp, ndlp->nlp_DID,
3206 ndlp->nlp_usg_map,
3207 ndlp->nlp_rpi);
3208
6b5151fd 3209 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3210 }
87af33fe
JS
3211 lpfc_unreg_rpi(vports[i], ndlp);
3212 }
3213 }
3214 }
09372820 3215 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3216
618a5230 3217 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
46fa311e
JS
3218}
3219
e59058c4 3220/**
3621a710 3221 * lpfc_offline - Bring a HBA offline
e59058c4
JS
3222 * @phba: pointer to lpfc hba data structure.
3223 *
3224 * This routine actually brings a HBA offline. It stops all the timers
3225 * associated with the HBA, brings down the SLI layer, and eventually
3226 * marks the HBA as in offline state for the upper layer protocol.
3227 **/
46fa311e 3228void
2e0fef85 3229lpfc_offline(struct lpfc_hba *phba)
46fa311e 3230{
549e55cd
JS
3231 struct Scsi_Host *shost;
3232 struct lpfc_vport **vports;
3233 int i;
46fa311e 3234
549e55cd 3235 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3236 return;
688a8863 3237
da0436e9
JS
3238 /* stop port and all timers associated with this hba */
3239 lpfc_stop_port(phba);
4b40d02b
DK
3240
3241 /* Tear down the local and target port registrations. The
3242 * nvme transports need to cleanup.
3243 */
3244 lpfc_nvmet_destroy_targetport(phba);
3245 lpfc_nvme_destroy_localport(phba->pport);
3246
51ef4c26
JS
3247 vports = lpfc_create_vport_work_array(phba);
3248 if (vports != NULL)
da0436e9 3249 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3250 lpfc_stop_vport_timers(vports[i]);
09372820 3251 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3252 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3253 "0460 Bring Adapter offline\n");
dea3101e
JB
3254 /* Bring down the SLI Layer and cleanup. The HBA is offline
3255 now. */
3256 lpfc_sli_hba_down(phba);
92d7f7b0 3257 spin_lock_irq(&phba->hbalock);
7054a606 3258 phba->work_ha = 0;
92d7f7b0 3259 spin_unlock_irq(&phba->hbalock);
549e55cd
JS
3260 vports = lpfc_create_vport_work_array(phba);
3261 if (vports != NULL)
da0436e9 3262 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3263 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS
3264 spin_lock_irq(shost->host_lock);
3265 vports[i]->work_port_events = 0;
3266 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3267 spin_unlock_irq(shost->host_lock);
3268 }
09372820 3269 lpfc_destroy_vport_work_array(phba, vports);
dea3101e
JB
3270}
3271
e59058c4 3272/**
3621a710 3273 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS
3274 * @phba: pointer to lpfc hba data structure.
3275 *
3276 * This routine is to free all the SCSI buffers and IOCBs from the driver
3277 * list back to kernel. It is called from lpfc_pci_remove_one to free
3278 * the internal resources before the device is removed from the system.
e59058c4 3279 **/
8a9d2e80 3280static void
2e0fef85 3281lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e
JB
3282{
3283 struct lpfc_scsi_buf *sb, *sb_next;
dea3101e 3284
895427bd
JS
3285 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3286 return;
3287
2e0fef85 3288 spin_lock_irq(&phba->hbalock);
a40fc5f0 3289
dea3101e 3290 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS
3291
3292 spin_lock(&phba->scsi_buf_list_put_lock);
3293 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3294 list) {
dea3101e 3295 list_del(&sb->list);
771db5c0 3296 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3297 sb->dma_handle);
dea3101e
JB
3298 kfree(sb);
3299 phba->total_scsi_bufs--;
3300 }
a40fc5f0
JS
3301 spin_unlock(&phba->scsi_buf_list_put_lock);
3302
3303 spin_lock(&phba->scsi_buf_list_get_lock);
3304 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3305 list) {
dea3101e 3306 list_del(&sb->list);
771db5c0 3307 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3308 sb->dma_handle);
dea3101e
JB
3309 kfree(sb);
3310 phba->total_scsi_bufs--;
3311 }
a40fc5f0 3312 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3313 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3314}
895427bd
JS
3315/**
3316 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3317 * @phba: pointer to lpfc hba data structure.
3318 *
3319 * This routine is to free all the NVME buffers and IOCBs from the driver
3320 * list back to kernel. It is called from lpfc_pci_remove_one to free
3321 * the internal resources before the device is removed from the system.
3322 **/
3323static void
3324lpfc_nvme_free(struct lpfc_hba *phba)
3325{
3326 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
895427bd
JS
3327
3328 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3329 return;
3330
3331 spin_lock_irq(&phba->hbalock);
3332
3333 /* Release all the lpfc_nvme_bufs maintained by this host. */
3334 spin_lock(&phba->nvme_buf_list_put_lock);
3335 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3336 &phba->lpfc_nvme_buf_list_put, list) {
3337 list_del(&lpfc_ncmd->list);
771db5c0 3338 dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
895427bd
JS
3339 lpfc_ncmd->dma_handle);
3340 kfree(lpfc_ncmd);
3341 phba->total_nvme_bufs--;
3342 }
3343 spin_unlock(&phba->nvme_buf_list_put_lock);
3344
3345 spin_lock(&phba->nvme_buf_list_get_lock);
3346 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3347 &phba->lpfc_nvme_buf_list_get, list) {
3348 list_del(&lpfc_ncmd->list);
771db5c0 3349 dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
895427bd
JS
3350 lpfc_ncmd->dma_handle);
3351 kfree(lpfc_ncmd);
3352 phba->total_nvme_bufs--;
3353 }
3354 spin_unlock(&phba->nvme_buf_list_get_lock);
895427bd
JS
3355 spin_unlock_irq(&phba->hbalock);
3356}
8a9d2e80 3357/**
895427bd 3358 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS
3359 * @phba: pointer to lpfc hba data structure.
3360 *
3361 * This routine first calculates the sizes of the current els and allocated
3362 * scsi sgl lists, and then goes through all sgls to updates the physical
3363 * XRIs assigned due to port function reset. During port initialization, the
3364 * current els and allocated scsi sgl lists are 0s.
3365 *
3366 * Return codes
3367 * 0 - successful (for now, it always returns 0)
3368 **/
3369int
895427bd 3370lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS
3371{
3372 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3373 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3374 LIST_HEAD(els_sgl_list);
8a9d2e80
JS
3375 int rc;
3376
3377 /*
3378 * update on pci function's els xri-sgl list
3379 */
3380 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3381
8a9d2e80
JS
3382 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3383 /* els xri-sgl expanded */
3384 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3385 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3386 "3157 ELS xri-sgl count increased from "
3387 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3388 els_xri_cnt);
3389 /* allocate the additional els sgls */
3390 for (i = 0; i < xri_cnt; i++) {
3391 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3392 GFP_KERNEL);
3393 if (sglq_entry == NULL) {
3394 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3395 "2562 Failure to allocate an "
3396 "ELS sgl entry:%d\n", i);
3397 rc = -ENOMEM;
3398 goto out_free_mem;
3399 }
3400 sglq_entry->buff_type = GEN_BUFF_TYPE;
3401 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3402 &sglq_entry->phys);
3403 if (sglq_entry->virt == NULL) {
3404 kfree(sglq_entry);
3405 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3406 "2563 Failure to allocate an "
3407 "ELS mbuf:%d\n", i);
3408 rc = -ENOMEM;
3409 goto out_free_mem;
3410 }
3411 sglq_entry->sgl = sglq_entry->virt;
3412 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3413 sglq_entry->state = SGL_FREED;
3414 list_add_tail(&sglq_entry->list, &els_sgl_list);
3415 }
38c20673 3416 spin_lock_irq(&phba->hbalock);
895427bd
JS
3417 spin_lock(&phba->sli4_hba.sgl_list_lock);
3418 list_splice_init(&els_sgl_list,
3419 &phba->sli4_hba.lpfc_els_sgl_list);
3420 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3421 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
3422 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3423 /* els xri-sgl shrinked */
3424 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3425 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3426 "3158 ELS xri-sgl count decreased from "
3427 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3428 els_xri_cnt);
3429 spin_lock_irq(&phba->hbalock);
895427bd
JS
3430 spin_lock(&phba->sli4_hba.sgl_list_lock);
3431 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3432 &els_sgl_list);
8a9d2e80
JS
3433 /* release extra els sgls from list */
3434 for (i = 0; i < xri_cnt; i++) {
3435 list_remove_head(&els_sgl_list,
3436 sglq_entry, struct lpfc_sglq, list);
3437 if (sglq_entry) {
895427bd
JS
3438 __lpfc_mbuf_free(phba, sglq_entry->virt,
3439 sglq_entry->phys);
8a9d2e80
JS
3440 kfree(sglq_entry);
3441 }
3442 }
895427bd
JS
3443 list_splice_init(&els_sgl_list,
3444 &phba->sli4_hba.lpfc_els_sgl_list);
3445 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS
3446 spin_unlock_irq(&phba->hbalock);
3447 } else
3448 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3449 "3163 ELS xri-sgl count unchanged: %d\n",
3450 els_xri_cnt);
3451 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3452
3453 /* update xris to els sgls on the list */
3454 sglq_entry = NULL;
3455 sglq_entry_next = NULL;
3456 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3457 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS
3458 lxri = lpfc_sli4_next_xritag(phba);
3459 if (lxri == NO_XRI) {
3460 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3461 "2400 Failed to allocate xri for "
3462 "ELS sgl\n");
3463 rc = -ENOMEM;
3464 goto out_free_mem;
3465 }
3466 sglq_entry->sli4_lxritag = lxri;
3467 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3468 }
895427bd
JS
3469 return 0;
3470
3471out_free_mem:
3472 lpfc_free_els_sgl_list(phba);
3473 return rc;
3474}
3475
f358dd0c
JS
3476/**
3477 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3478 * @phba: pointer to lpfc hba data structure.
3479 *
3480 * This routine first calculates the sizes of the current els and allocated
3481 * scsi sgl lists, and then goes through all sgls to updates the physical
3482 * XRIs assigned due to port function reset. During port initialization, the
3483 * current els and allocated scsi sgl lists are 0s.
3484 *
3485 * Return codes
3486 * 0 - successful (for now, it always returns 0)
3487 **/
3488int
3489lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3490{
3491 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3492 uint16_t i, lxri, xri_cnt, els_xri_cnt;
6c621a22 3493 uint16_t nvmet_xri_cnt;
f358dd0c
JS
3494 LIST_HEAD(nvmet_sgl_list);
3495 int rc;
3496
3497 /*
3498 * update on pci function's nvmet xri-sgl list
3499 */
3500 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
61f3d4bf 3501
6c621a22
JS
3502 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
3503 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
f358dd0c
JS
3504 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3505 /* els xri-sgl expanded */
3506 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3507 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3508 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3509 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3510 /* allocate the additional nvmet sgls */
3511 for (i = 0; i < xri_cnt; i++) {
3512 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3513 GFP_KERNEL);
3514 if (sglq_entry == NULL) {
3515 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3516 "6303 Failure to allocate an "
3517 "NVMET sgl entry:%d\n", i);
3518 rc = -ENOMEM;
3519 goto out_free_mem;
3520 }
3521 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3522 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3523 &sglq_entry->phys);
3524 if (sglq_entry->virt == NULL) {
3525 kfree(sglq_entry);
3526 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3527 "6304 Failure to allocate an "
3528 "NVMET buf:%d\n", i);
3529 rc = -ENOMEM;
3530 goto out_free_mem;
3531 }
3532 sglq_entry->sgl = sglq_entry->virt;
3533 memset(sglq_entry->sgl, 0,
3534 phba->cfg_sg_dma_buf_size);
3535 sglq_entry->state = SGL_FREED;
3536 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3537 }
3538 spin_lock_irq(&phba->hbalock);
3539 spin_lock(&phba->sli4_hba.sgl_list_lock);
3540 list_splice_init(&nvmet_sgl_list,
3541 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3542 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3543 spin_unlock_irq(&phba->hbalock);
3544 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3545 /* nvmet xri-sgl shrunk */
3546 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3547 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3548 "6305 NVMET xri-sgl count decreased from "
3549 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3550 nvmet_xri_cnt);
3551 spin_lock_irq(&phba->hbalock);
3552 spin_lock(&phba->sli4_hba.sgl_list_lock);
3553 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3554 &nvmet_sgl_list);
3555 /* release extra nvmet sgls from list */
3556 for (i = 0; i < xri_cnt; i++) {
3557 list_remove_head(&nvmet_sgl_list,
3558 sglq_entry, struct lpfc_sglq, list);
3559 if (sglq_entry) {
3560 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3561 sglq_entry->phys);
3562 kfree(sglq_entry);
3563 }
3564 }
3565 list_splice_init(&nvmet_sgl_list,
3566 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3567 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3568 spin_unlock_irq(&phba->hbalock);
3569 } else
3570 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3571 "6306 NVMET xri-sgl count unchanged: %d\n",
3572 nvmet_xri_cnt);
3573 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3574
3575 /* update xris to nvmet sgls on the list */
3576 sglq_entry = NULL;
3577 sglq_entry_next = NULL;
3578 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3579 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3580 lxri = lpfc_sli4_next_xritag(phba);
3581 if (lxri == NO_XRI) {
3582 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3583 "6307 Failed to allocate xri for "
3584 "NVMET sgl\n");
3585 rc = -ENOMEM;
3586 goto out_free_mem;
3587 }
3588 sglq_entry->sli4_lxritag = lxri;
3589 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3590 }
3591 return 0;
3592
3593out_free_mem:
3594 lpfc_free_nvmet_sgl_list(phba);
3595 return rc;
3596}
3597
895427bd
JS
3598/**
3599 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3600 * @phba: pointer to lpfc hba data structure.
3601 *
3602 * This routine first calculates the sizes of the current els and allocated
3603 * scsi sgl lists, and then goes through all sgls to updates the physical
3604 * XRIs assigned due to port function reset. During port initialization, the
3605 * current els and allocated scsi sgl lists are 0s.
3606 *
3607 * Return codes
3608 * 0 - successful (for now, it always returns 0)
3609 **/
3610int
3611lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3612{
3613 struct lpfc_scsi_buf *psb, *psb_next;
3614 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3615 LIST_HEAD(scsi_sgl_list);
3616 int rc;
8a9d2e80
JS
3617
3618 /*
895427bd 3619 * update on pci function's els xri-sgl list
8a9d2e80 3620 */
895427bd 3621 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS
3622 phba->total_scsi_bufs = 0;
3623
895427bd
JS
3624 /*
3625 * update on pci function's allocated scsi xri-sgl list
3626 */
8a9d2e80
JS
3627 /* maximum number of xris available for scsi buffers */
3628 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3629 els_xri_cnt;
3630
895427bd
JS
3631 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3632 return 0;
3633
3634 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3635 phba->sli4_hba.scsi_xri_max = /* Split them up */
3636 (phba->sli4_hba.scsi_xri_max *
3637 phba->cfg_xri_split) / 100;
8a9d2e80 3638
a40fc5f0 3639 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3640 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3641 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3642 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3643 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3644 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3645
e8c0a779
JS
3646 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3647 "6060 Current allocated SCSI xri-sgl count:%d, "
3648 "maximum SCSI xri count:%d (split:%d)\n",
3649 phba->sli4_hba.scsi_xri_cnt,
3650 phba->sli4_hba.scsi_xri_max, phba->cfg_xri_split);
3651
8a9d2e80
JS
3652 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3653 /* max scsi xri shrinked below the allocated scsi buffers */
3654 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3655 phba->sli4_hba.scsi_xri_max;
3656 /* release the extra allocated scsi buffers */
3657 for (i = 0; i < scsi_xri_cnt; i++) {
3658 list_remove_head(&scsi_sgl_list, psb,
3659 struct lpfc_scsi_buf, list);
a2fc4aef 3660 if (psb) {
771db5c0 3661 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS
3662 psb->data, psb->dma_handle);
3663 kfree(psb);
3664 }
8a9d2e80 3665 }
a40fc5f0 3666 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3667 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3668 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS
3669 }
3670
3671 /* update xris associated to remaining allocated scsi buffers */
3672 psb = NULL;
3673 psb_next = NULL;
3674 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3675 lxri = lpfc_sli4_next_xritag(phba);
3676 if (lxri == NO_XRI) {
3677 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3678 "2560 Failed to allocate xri for "
3679 "scsi buffer\n");
3680 rc = -ENOMEM;
3681 goto out_free_mem;
3682 }
3683 psb->cur_iocbq.sli4_lxritag = lxri;
3684 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3685 }
a40fc5f0 3686 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3687 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3688 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3689 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3690 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3691 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3692 return 0;
8a9d2e80
JS
3693
3694out_free_mem:
8a9d2e80
JS
3695 lpfc_scsi_free(phba);
3696 return rc;
dea3101e
JB
3697}
3698
96418b5e
JS
3699static uint64_t
3700lpfc_get_wwpn(struct lpfc_hba *phba)
3701{
3702 uint64_t wwn;
3703 int rc;
3704 LPFC_MBOXQ_t *mboxq;
3705 MAILBOX_t *mb;
3706
96418b5e
JS
3707 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3708 GFP_KERNEL);
3709 if (!mboxq)
3710 return (uint64_t)-1;
3711
3712 /* First get WWN of HBA instance */
3713 lpfc_read_nv(phba, mboxq);
3714 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3715 if (rc != MBX_SUCCESS) {
3716 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3717 "6019 Mailbox failed , mbxCmd x%x "
3718 "READ_NV, mbxStatus x%x\n",
3719 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
3720 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
3721 mempool_free(mboxq, phba->mbox_mem_pool);
3722 return (uint64_t) -1;
3723 }
3724 mb = &mboxq->u.mb;
3725 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
3726 /* wwn is WWPN of HBA instance */
3727 mempool_free(mboxq, phba->mbox_mem_pool);
3728 if (phba->sli_rev == LPFC_SLI_REV4)
3729 return be64_to_cpu(wwn);
3730 else
3731 return (((wwn & 0xffffffff00000000) >> 32) |
3732 ((wwn & 0x00000000ffffffff) << 32));
3733
3734}
3735
895427bd
JS
3736/**
3737 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3738 * @phba: pointer to lpfc hba data structure.
3739 *
3740 * This routine first calculates the sizes of the current els and allocated
3741 * scsi sgl lists, and then goes through all sgls to updates the physical
3742 * XRIs assigned due to port function reset. During port initialization, the
3743 * current els and allocated scsi sgl lists are 0s.
3744 *
3745 * Return codes
3746 * 0 - successful (for now, it always returns 0)
3747 **/
3748int
3749lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3750{
3751 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3752 uint16_t i, lxri, els_xri_cnt;
3753 uint16_t nvme_xri_cnt, nvme_xri_max;
3754 LIST_HEAD(nvme_sgl_list);
3755 int rc;
3756
3757 phba->total_nvme_bufs = 0;
3758
3759 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3760 return 0;
3761 /*
3762 * update on pci function's allocated nvme xri-sgl list
3763 */
3764
3765 /* maximum number of xris available for nvme buffers */
3766 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3767 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3768 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3769 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3770
3771 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3772 "6074 Current allocated NVME xri-sgl count:%d, "
3773 "maximum NVME xri count:%d\n",
3774 phba->sli4_hba.nvme_xri_cnt,
3775 phba->sli4_hba.nvme_xri_max);
3776
3777 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3778 spin_lock(&phba->nvme_buf_list_put_lock);
3779 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3780 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
3781 spin_unlock(&phba->nvme_buf_list_put_lock);
3782 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3783
3784 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3785 /* max nvme xri shrunk below the allocated nvme buffers */
3786 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3787 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3788 phba->sli4_hba.nvme_xri_max;
3789 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3790 /* release the extra allocated nvme buffers */
3791 for (i = 0; i < nvme_xri_cnt; i++) {
3792 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3793 struct lpfc_nvme_buf, list);
3794 if (lpfc_ncmd) {
771db5c0 3795 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
895427bd
JS
3796 lpfc_ncmd->data,
3797 lpfc_ncmd->dma_handle);
3798 kfree(lpfc_ncmd);
3799 }
3800 }
3801 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3802 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3803 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3804 }
3805
3806 /* update xris associated to remaining allocated nvme buffers */
3807 lpfc_ncmd = NULL;
3808 lpfc_ncmd_next = NULL;
3809 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3810 &nvme_sgl_list, list) {
3811 lxri = lpfc_sli4_next_xritag(phba);
3812 if (lxri == NO_XRI) {
3813 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3814 "6075 Failed to allocate xri for "
3815 "nvme buffer\n");
3816 rc = -ENOMEM;
3817 goto out_free_mem;
3818 }
3819 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3820 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3821 }
3822 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3823 spin_lock(&phba->nvme_buf_list_put_lock);
3824 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
3825 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3826 spin_unlock(&phba->nvme_buf_list_put_lock);
3827 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3828 return 0;
3829
3830out_free_mem:
3831 lpfc_nvme_free(phba);
3832 return rc;
3833}
3834
e59058c4 3835/**
3621a710 3836 * lpfc_create_port - Create an FC port
e59058c4
JS
3837 * @phba: pointer to lpfc hba data structure.
3838 * @instance: a unique integer ID to this FC port.
3839 * @dev: pointer to the device data structure.
3840 *
3841 * This routine creates a FC port for the upper layer protocol. The FC port
3842 * can be created on top of either a physical port or a virtual port provided
3843 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3844 * and associates the FC port created before adding the shost into the SCSI
3845 * layer.
3846 *
3847 * Return codes
3848 * @vport - pointer to the virtual N_Port data structure.
3849 * NULL - port create failed.
3850 **/
2e0fef85 3851struct lpfc_vport *
3de2a653 3852lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3853{
2e0fef85 3854 struct lpfc_vport *vport;
895427bd 3855 struct Scsi_Host *shost = NULL;
2e0fef85 3856 int error = 0;
96418b5e
JS
3857 int i;
3858 uint64_t wwn;
3859 bool use_no_reset_hba = false;
56bc8028 3860 int rc;
96418b5e 3861
56bc8028
JS
3862 if (lpfc_no_hba_reset_cnt) {
3863 if (phba->sli_rev < LPFC_SLI_REV4 &&
3864 dev == &phba->pcidev->dev) {
3865 /* Reset the port first */
3866 lpfc_sli_brdrestart(phba);
3867 rc = lpfc_sli_chipset_init(phba);
3868 if (rc)
3869 return NULL;
3870 }
3871 wwn = lpfc_get_wwpn(phba);
3872 }
96418b5e
JS
3873
3874 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
3875 if (wwn == lpfc_no_hba_reset[i]) {
3876 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3877 "6020 Setting use_no_reset port=%llx\n",
3878 wwn);
3879 use_no_reset_hba = true;
3880 break;
3881 }
3882 }
47a8617c 3883
895427bd
JS
3884 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3885 if (dev != &phba->pcidev->dev) {
3886 shost = scsi_host_alloc(&lpfc_vport_template,
3887 sizeof(struct lpfc_vport));
3888 } else {
96418b5e 3889 if (!use_no_reset_hba)
895427bd
JS
3890 shost = scsi_host_alloc(&lpfc_template,
3891 sizeof(struct lpfc_vport));
3892 else
96418b5e 3893 shost = scsi_host_alloc(&lpfc_template_no_hr,
895427bd
JS
3894 sizeof(struct lpfc_vport));
3895 }
3896 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3897 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS
3898 sizeof(struct lpfc_vport));
3899 }
2e0fef85
JS
3900 if (!shost)
3901 goto out;
47a8617c 3902
2e0fef85
JS
3903 vport = (struct lpfc_vport *) shost->hostdata;
3904 vport->phba = phba;
2e0fef85 3905 vport->load_flag |= FC_LOADING;
92d7f7b0 3906 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3907 vport->fc_rscn_flush = 0;
3de2a653 3908 lpfc_get_vport_cfgparam(vport);
895427bd 3909
2e0fef85
JS
3910 shost->unique_id = instance;
3911 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3912 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS
3913 shost->this_id = -1;
3914 shost->max_cmd_len = 16;
8b0dff14 3915 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3916 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3917 shost->dma_boundary =
cb5172ea 3918 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS
3919 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3920 }
81301a9b 3921
47a8617c 3922 /*
2e0fef85
JS
3923 * Set initial can_queue value since 0 is no longer supported and
3924 * scsi_add_host will fail. This will be adjusted later based on the
3925 * max xri value determined in hba setup.
47a8617c 3926 */
2e0fef85 3927 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3928 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS
3929 shost->transportt = lpfc_vport_transport_template;
3930 vport->port_type = LPFC_NPIV_PORT;
3931 } else {
3932 shost->transportt = lpfc_transport_template;
3933 vport->port_type = LPFC_PHYSICAL_PORT;
3934 }
47a8617c 3935
2e0fef85
JS
3936 /* Initialize all internally managed lists. */
3937 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3938 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3939 spin_lock_init(&vport->work_port_lock);
47a8617c 3940
33cc559a
TJ
3941 setup_timer(&vport->fc_disctmo, lpfc_disc_timeout,
3942 (unsigned long)vport);
47a8617c 3943
33cc559a
TJ
3944 setup_timer(&vport->els_tmofunc, lpfc_els_timeout,
3945 (unsigned long)vport);
92494144 3946
33cc559a
TJ
3947 setup_timer(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo,
3948 (unsigned long)vport);
92494144 3949
d139b9bd 3950 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS
3951 if (error)
3952 goto out_put_shost;
47a8617c 3953
549e55cd 3954 spin_lock_irq(&phba->hbalock);
2e0fef85 3955 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3956 spin_unlock_irq(&phba->hbalock);
2e0fef85 3957 return vport;
47a8617c 3958
2e0fef85
JS
3959out_put_shost:
3960 scsi_host_put(shost);
3961out:
3962 return NULL;
47a8617c
JS
3963}
3964
e59058c4 3965/**
3621a710 3966 * destroy_port - destroy an FC port
e59058c4
JS
3967 * @vport: pointer to an lpfc virtual N_Port data structure.
3968 *
3969 * This routine destroys a FC port from the upper layer protocol. All the
3970 * resources associated with the port are released.
3971 **/
2e0fef85
JS
3972void
3973destroy_port(struct lpfc_vport *vport)
47a8617c 3974{
92d7f7b0
JS
3975 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3976 struct lpfc_hba *phba = vport->phba;
47a8617c 3977
858c9f6c 3978 lpfc_debugfs_terminate(vport);
92d7f7b0
JS
3979 fc_remove_host(shost);
3980 scsi_remove_host(shost);
47a8617c 3981
92d7f7b0
JS
3982 spin_lock_irq(&phba->hbalock);
3983 list_del_init(&vport->listentry);
3984 spin_unlock_irq(&phba->hbalock);
47a8617c 3985
92d7f7b0 3986 lpfc_cleanup(vport);
47a8617c 3987 return;
47a8617c
JS
3988}
3989
e59058c4 3990/**
3621a710 3991 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS
3992 *
3993 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
3994 * uses the kernel idr facility to perform the task.
3995 *
3996 * Return codes:
3997 * instance - a unique integer ID allocated as the new instance.
3998 * -1 - lpfc get instance failed.
3999 **/
92d7f7b0
JS
4000int
4001lpfc_get_instance(void)
4002{
ab516036
TH
4003 int ret;
4004
4005 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4006 return ret < 0 ? -1 : ret;
47a8617c
JS
4007}
4008
e59058c4 4009/**
3621a710 4010 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS
4011 * @shost: pointer to SCSI host data structure.
4012 * @time: elapsed time of the scan in jiffies.
4013 *
4014 * This routine is called by the SCSI layer with a SCSI host to determine
4015 * whether the scan host is finished.
4016 *
4017 * Note: there is no scan_start function as adapter initialization will have
4018 * asynchronously kicked off the link initialization.
4019 *
4020 * Return codes
4021 * 0 - SCSI host scan is not over yet.
4022 * 1 - SCSI host scan is over.
4023 **/
47a8617c
JS
4024int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4025{
2e0fef85
JS
4026 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4027 struct lpfc_hba *phba = vport->phba;
858c9f6c 4028 int stat = 0;
47a8617c 4029
858c9f6c
JS
4030 spin_lock_irq(shost->host_lock);
4031
51ef4c26 4032 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS
4033 stat = 1;
4034 goto finished;
4035 }
256ec0d0 4036 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 4037 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
4038 "0461 Scanning longer than 30 "
4039 "seconds. Continuing initialization\n");
858c9f6c 4040 stat = 1;
47a8617c 4041 goto finished;
2e0fef85 4042 }
256ec0d0
JS
4043 if (time >= msecs_to_jiffies(15 * 1000) &&
4044 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 4045 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
4046 "0465 Link down longer than 15 "
4047 "seconds. Continuing initialization\n");
858c9f6c 4048 stat = 1;
47a8617c 4049 goto finished;
2e0fef85 4050 }
47a8617c 4051
2e0fef85 4052 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 4053 goto finished;
2e0fef85 4054 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 4055 goto finished;
256ec0d0 4056 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 4057 goto finished;
2e0fef85 4058 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS
4059 goto finished;
4060
4061 stat = 1;
47a8617c
JS
4062
4063finished:
858c9f6c
JS
4064 spin_unlock_irq(shost->host_lock);
4065 return stat;
92d7f7b0 4066}
47a8617c 4067
e59058c4 4068/**
3621a710 4069 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS
4070 * @shost: pointer to SCSI host data structure.
4071 *
4072 * This routine initializes a given SCSI host attributes on a FC port. The
4073 * SCSI host can be either on top of a physical port or a virtual port.
4074 **/
92d7f7b0
JS
4075void lpfc_host_attrib_init(struct Scsi_Host *shost)
4076{
4077 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4078 struct lpfc_hba *phba = vport->phba;
47a8617c 4079 /*
2e0fef85 4080 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS
4081 */
4082
2e0fef85
JS
4083 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
4084 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS
4085 fc_host_supported_classes(shost) = FC_COS_CLASS3;
4086
4087 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 4088 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS
4089 fc_host_supported_fc4s(shost)[2] = 1;
4090 fc_host_supported_fc4s(shost)[7] = 1;
4091
92d7f7b0
JS
4092 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
4093 sizeof fc_host_symbolic_name(shost));
47a8617c
JS
4094
4095 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS
4096 if (phba->lmt & LMT_32Gb)
4097 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS
4098 if (phba->lmt & LMT_16Gb)
4099 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS
4100 if (phba->lmt & LMT_10Gb)
4101 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS
4102 if (phba->lmt & LMT_8Gb)
4103 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS
4104 if (phba->lmt & LMT_4Gb)
4105 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4106 if (phba->lmt & LMT_2Gb)
4107 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4108 if (phba->lmt & LMT_1Gb)
4109 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4110
4111 fc_host_maxframe_size(shost) =
2e0fef85
JS
4112 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
4113 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 4114
0af5d708
MC
4115 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
4116
47a8617c
JS
4117 /* This value is also unchanging */
4118 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 4119 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS
4120 fc_host_active_fc4s(shost)[2] = 1;
4121 fc_host_active_fc4s(shost)[7] = 1;
4122
92d7f7b0 4123 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 4124 spin_lock_irq(shost->host_lock);
51ef4c26 4125 vport->load_flag &= ~FC_LOADING;
47a8617c 4126 spin_unlock_irq(shost->host_lock);
47a8617c 4127}
dea3101e 4128
e59058c4 4129/**
da0436e9 4130 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS
4131 * @phba: pointer to lpfc hba data structure.
4132 *
da0436e9
JS
4133 * This routine is invoked to stop an SLI3 device port, it stops the device
4134 * from generating interrupts and stops the device driver's timers for the
4135 * device.
e59058c4 4136 **/
da0436e9
JS
4137static void
4138lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 4139{
da0436e9
JS
4140 /* Clear all interrupt enable conditions */
4141 writel(0, phba->HCregaddr);
4142 readl(phba->HCregaddr); /* flush */
4143 /* Clear all pending interrupts */
4144 writel(0xffffffff, phba->HAregaddr);
4145 readl(phba->HAregaddr); /* flush */
db2378e0 4146
da0436e9
JS
4147 /* Reset some HBA SLI setup states */
4148 lpfc_stop_hba_timers(phba);
4149 phba->pport->work_port_events = 0;
4150}
db2378e0 4151
da0436e9
JS
4152/**
4153 * lpfc_stop_port_s4 - Stop SLI4 device port
4154 * @phba: pointer to lpfc hba data structure.
4155 *
4156 * This routine is invoked to stop an SLI4 device port, it stops the device
4157 * from generating interrupts and stops the device driver's timers for the
4158 * device.
4159 **/
4160static void
4161lpfc_stop_port_s4(struct lpfc_hba *phba)
4162{
4163 /* Reset some HBA SLI4 setup states */
4164 lpfc_stop_hba_timers(phba);
4165 phba->pport->work_port_events = 0;
4166 phba->sli4_hba.intr_enable = 0;
da0436e9 4167}
9399627f 4168
da0436e9
JS
4169/**
4170 * lpfc_stop_port - Wrapper function for stopping hba port
4171 * @phba: Pointer to HBA context object.
4172 *
4173 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4174 * the API jump table function pointer from the lpfc_hba struct.
4175 **/
4176void
4177lpfc_stop_port(struct lpfc_hba *phba)
4178{
4179 phba->lpfc_stop_port(phba);
4180}
db2378e0 4181
ecfd03c6
JS
4182/**
4183 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4184 * @phba: Pointer to hba for which this call is being executed.
4185 *
4186 * This routine starts the timer waiting for the FCF rediscovery to complete.
4187 **/
4188void
4189lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4190{
4191 unsigned long fcf_redisc_wait_tmo =
4192 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4193 /* Start fcf rediscovery wait period timer */
4194 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4195 spin_lock_irq(&phba->hbalock);
4196 /* Allow action to new fcf asynchronous event */
4197 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4198 /* Mark the FCF rediscovery pending state */
4199 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4200 spin_unlock_irq(&phba->hbalock);
4201}
4202
4203/**
4204 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4205 * @ptr: Map to lpfc_hba data structure pointer.
4206 *
4207 * This routine is invoked when waiting for FCF table rediscover has been
4208 * timed out. If new FCF record(s) has (have) been discovered during the
4209 * wait period, a new FCF event shall be added to the FCOE async event
4210 * list, and then worker thread shall be waked up for processing from the
4211 * worker thread context.
4212 **/
e399b228 4213static void
ecfd03c6
JS
4214lpfc_sli4_fcf_redisc_wait_tmo(unsigned long ptr)
4215{
4216 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
4217
4218 /* Don't send FCF rediscovery event if timer cancelled */
4219 spin_lock_irq(&phba->hbalock);
4220 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4221 spin_unlock_irq(&phba->hbalock);
4222 return;
4223 }
4224 /* Clear FCF rediscovery timer pending flag */
4225 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4226 /* FCF rediscovery event to worker thread */
4227 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4228 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4229 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4230 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS
4231 /* wake up worker thread */
4232 lpfc_worker_wake_up(phba);
4233}
4234
e59058c4 4235/**
da0436e9 4236 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4237 * @phba: pointer to lpfc hba data structure.
da0436e9 4238 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4239 *
da0436e9
JS
4240 * This routine is to parse the SLI4 link-attention link fault code and
4241 * translate it into the base driver's read link attention mailbox command
4242 * status.
4243 *
4244 * Return: Link-attention status in terms of base driver's coding.
e59058c4 4245 **/
da0436e9
JS
4246static uint16_t
4247lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4248 struct lpfc_acqe_link *acqe_link)
db2378e0 4249{
da0436e9 4250 uint16_t latt_fault;
9399627f 4251
da0436e9
JS
4252 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4253 case LPFC_ASYNC_LINK_FAULT_NONE:
4254 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4255 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4256 latt_fault = 0;
4257 break;
4258 default:
4259 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4260 "0398 Invalid link fault code: x%x\n",
4261 bf_get(lpfc_acqe_link_fault, acqe_link));
4262 latt_fault = MBXERR_ERROR;
4263 break;
4264 }
4265 return latt_fault;
db2378e0
JS
4266}
4267
5b75da2f 4268/**
da0436e9 4269 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4270 * @phba: pointer to lpfc hba data structure.
da0436e9 4271 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4272 *
da0436e9
JS
4273 * This routine is to parse the SLI4 link attention type and translate it
4274 * into the base driver's link attention type coding.
5b75da2f 4275 *
da0436e9
JS
4276 * Return: Link attention type in terms of base driver's coding.
4277 **/
4278static uint8_t
4279lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4280 struct lpfc_acqe_link *acqe_link)
5b75da2f 4281{
da0436e9 4282 uint8_t att_type;
5b75da2f 4283
da0436e9
JS
4284 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4285 case LPFC_ASYNC_LINK_STATUS_DOWN:
4286 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4287 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS
4288 break;
4289 case LPFC_ASYNC_LINK_STATUS_UP:
4290 /* Ignore physical link up events - wait for logical link up */
76a95d75 4291 att_type = LPFC_ATT_RESERVED;
da0436e9
JS
4292 break;
4293 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4294 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS
4295 break;
4296 default:
4297 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4298 "0399 Invalid link attention type: x%x\n",
4299 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4300 att_type = LPFC_ATT_RESERVED;
da0436e9 4301 break;
5b75da2f 4302 }
da0436e9 4303 return att_type;
5b75da2f
JS
4304}
4305
8b68cd52
JS
4306/**
4307 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4308 * @phba: pointer to lpfc hba data structure.
4309 *
4310 * This routine is to get an SLI3 FC port's link speed in Mbps.
4311 *
4312 * Return: link speed in terms of Mbps.
4313 **/
4314uint32_t
4315lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4316{
4317 uint32_t link_speed;
4318
4319 if (!lpfc_is_link_up(phba))
4320 return 0;
4321
a085e87c
JS
4322 if (phba->sli_rev <= LPFC_SLI_REV3) {
4323 switch (phba->fc_linkspeed) {
4324 case LPFC_LINK_SPEED_1GHZ:
4325 link_speed = 1000;
4326 break;
4327 case LPFC_LINK_SPEED_2GHZ:
4328 link_speed = 2000;
4329 break;
4330 case LPFC_LINK_SPEED_4GHZ:
4331 link_speed = 4000;
4332 break;
4333 case LPFC_LINK_SPEED_8GHZ:
4334 link_speed = 8000;
4335 break;
4336 case LPFC_LINK_SPEED_10GHZ:
4337 link_speed = 10000;
4338 break;
4339 case LPFC_LINK_SPEED_16GHZ:
4340 link_speed = 16000;
4341 break;
4342 default:
4343 link_speed = 0;
4344 }
4345 } else {
4346 if (phba->sli4_hba.link_state.logical_speed)
4347 link_speed =
4348 phba->sli4_hba.link_state.logical_speed;
4349 else
4350 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS
4351 }
4352 return link_speed;
4353}
4354
4355/**
4356 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4357 * @phba: pointer to lpfc hba data structure.
4358 * @evt_code: asynchronous event code.
4359 * @speed_code: asynchronous event link speed code.
4360 *
4361 * This routine is to parse the giving SLI4 async event link speed code into
4362 * value of Mbps for the link speed.
4363 *
4364 * Return: link speed in terms of Mbps.
4365 **/
4366static uint32_t
4367lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4368 uint8_t speed_code)
4369{
4370 uint32_t port_speed;
4371
4372 switch (evt_code) {
4373 case LPFC_TRAILER_CODE_LINK:
4374 switch (speed_code) {
26d830ec 4375 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS
4376 port_speed = 0;
4377 break;
26d830ec 4378 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS
4379 port_speed = 10;
4380 break;
26d830ec 4381 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS
4382 port_speed = 100;
4383 break;
26d830ec 4384 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS
4385 port_speed = 1000;
4386 break;
26d830ec 4387 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS
4388 port_speed = 10000;
4389 break;
26d830ec
JS
4390 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4391 port_speed = 20000;
4392 break;
4393 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4394 port_speed = 25000;
4395 break;
4396 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4397 port_speed = 40000;
4398 break;
8b68cd52
JS
4399 default:
4400 port_speed = 0;
4401 }
4402 break;
4403 case LPFC_TRAILER_CODE_FC:
4404 switch (speed_code) {
26d830ec 4405 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS
4406 port_speed = 0;
4407 break;
26d830ec 4408 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS
4409 port_speed = 1000;
4410 break;
26d830ec 4411 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS
4412 port_speed = 2000;
4413 break;
26d830ec 4414 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS
4415 port_speed = 4000;
4416 break;
26d830ec 4417 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS
4418 port_speed = 8000;
4419 break;
26d830ec 4420 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS
4421 port_speed = 10000;
4422 break;
26d830ec 4423 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS
4424 port_speed = 16000;
4425 break;
d38dd52c
JS
4426 case LPFC_FC_LA_SPEED_32G:
4427 port_speed = 32000;
4428 break;
8b68cd52
JS
4429 default:
4430 port_speed = 0;
4431 }
4432 break;
4433 default:
4434 port_speed = 0;
4435 }
4436 return port_speed;
4437}
4438
da0436e9 4439/**
70f3c073 4440 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS
4441 * @phba: pointer to lpfc hba data structure.
4442 * @acqe_link: pointer to the async link completion queue entry.
4443 *
70f3c073 4444 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS
4445 **/
4446static void
4447lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4448 struct lpfc_acqe_link *acqe_link)
4449{
4450 struct lpfc_dmabuf *mp;
4451 LPFC_MBOXQ_t *pmb;
4452 MAILBOX_t *mb;
76a95d75 4453 struct lpfc_mbx_read_top *la;
da0436e9 4454 uint8_t att_type;
76a95d75 4455 int rc;
da0436e9
JS
4456
4457 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4458 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4459 return;
32b9793f 4460 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS
4461 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4462 if (!pmb) {
4463 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4464 "0395 The mboxq allocation failed\n");
4465 return;
4466 }
4467 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4468 if (!mp) {
4469 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4470 "0396 The lpfc_dmabuf allocation failed\n");
4471 goto out_free_pmb;
4472 }
4473 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4474 if (!mp->virt) {
4475 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4476 "0397 The mbuf allocation failed\n");
4477 goto out_free_dmabuf;
4478 }
4479
4480 /* Cleanup any outstanding ELS commands */
4481 lpfc_els_flush_all_cmd(phba);
4482
4483 /* Block ELS IOCBs until we have done process link event */
895427bd 4484 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS
4485
4486 /* Update link event statistics */
4487 phba->sli.slistat.link_event++;
4488
76a95d75
JS
4489 /* Create lpfc_handle_latt mailbox command from link ACQE */
4490 lpfc_read_topology(phba, pmb, mp);
4491 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS
4492 pmb->vport = phba->pport;
4493
da0436e9
JS
4494 /* Keep the link status for extra SLI4 state machine reference */
4495 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4496 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4497 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS
4498 phba->sli4_hba.link_state.duplex =
4499 bf_get(lpfc_acqe_link_duplex, acqe_link);
4500 phba->sli4_hba.link_state.status =
4501 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS
4502 phba->sli4_hba.link_state.type =
4503 bf_get(lpfc_acqe_link_type, acqe_link);
4504 phba->sli4_hba.link_state.number =
4505 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS
4506 phba->sli4_hba.link_state.fault =
4507 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4508 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS
4509 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4510
70f3c073 4511 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS
4512 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4513 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4514 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS
4515 phba->sli4_hba.link_state.speed,
4516 phba->sli4_hba.link_state.topology,
4517 phba->sli4_hba.link_state.status,
4518 phba->sli4_hba.link_state.type,
4519 phba->sli4_hba.link_state.number,
8b68cd52 4520 phba->sli4_hba.link_state.logical_speed,
70f3c073 4521 phba->sli4_hba.link_state.fault);
76a95d75
JS
4522 /*
4523 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4524 * topology info. Note: Optional for non FC-AL ports.
4525 */
4526 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4527 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4528 if (rc == MBX_NOT_FINISHED)
4529 goto out_free_dmabuf;
4530 return;
4531 }
4532 /*
4533 * For FCoE Mode: fill in all the topology information we need and call
4534 * the READ_TOPOLOGY completion routine to continue without actually
4535 * sending the READ_TOPOLOGY mailbox command to the port.
4536 */
4537 /* Parse and translate status field */
4538 mb = &pmb->u.mb;
4539 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4540
4541 /* Parse and translate link attention fields */
4542 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4543 la->eventTag = acqe_link->event_tag;
4544 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4545 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4546 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS
4547
4548 /* Fake the the following irrelvant fields */
4549 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4550 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4551 bf_set(lpfc_mbx_read_top_il, la, 0);
4552 bf_set(lpfc_mbx_read_top_pb, la, 0);
4553 bf_set(lpfc_mbx_read_top_fa, la, 0);
4554 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS
4555
4556 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4557 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4558
5b75da2f 4559 return;
da0436e9
JS
4560
4561out_free_dmabuf:
4562 kfree(mp);
4563out_free_pmb:
4564 mempool_free(pmb, phba->mbox_mem_pool);
4565}
4566
70f3c073
JS
4567/**
4568 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4569 * @phba: pointer to lpfc hba data structure.
4570 * @acqe_fc: pointer to the async fc completion queue entry.
4571 *
4572 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4573 * that the event was received and then issue a read_topology mailbox command so
4574 * that the rest of the driver will treat it the same as SLI3.
4575 **/
4576static void
4577lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4578{
4579 struct lpfc_dmabuf *mp;
4580 LPFC_MBOXQ_t *pmb;
7bdedb34
JS
4581 MAILBOX_t *mb;
4582 struct lpfc_mbx_read_top *la;
70f3c073
JS
4583 int rc;
4584
4585 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4586 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4587 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4588 "2895 Non FC link Event detected.(%d)\n",
4589 bf_get(lpfc_trailer_type, acqe_fc));
4590 return;
4591 }
4592 /* Keep the link status for extra SLI4 state machine reference */
4593 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4594 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4595 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS
4596 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4597 phba->sli4_hba.link_state.topology =
4598 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4599 phba->sli4_hba.link_state.status =
4600 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4601 phba->sli4_hba.link_state.type =
4602 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4603 phba->sli4_hba.link_state.number =
4604 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4605 phba->sli4_hba.link_state.fault =
4606 bf_get(lpfc_acqe_link_fault, acqe_fc);
4607 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4608 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS
4609 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4610 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4611 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4612 "%dMbps Fault:%d\n",
4613 phba->sli4_hba.link_state.speed,
4614 phba->sli4_hba.link_state.topology,
4615 phba->sli4_hba.link_state.status,
4616 phba->sli4_hba.link_state.type,
4617 phba->sli4_hba.link_state.number,
8b68cd52 4618 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS
4619 phba->sli4_hba.link_state.fault);
4620 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4621 if (!pmb) {
4622 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4623 "2897 The mboxq allocation failed\n");
4624 return;
4625 }
4626 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4627 if (!mp) {
4628 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4629 "2898 The lpfc_dmabuf allocation failed\n");
4630 goto out_free_pmb;
4631 }
4632 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4633 if (!mp->virt) {
4634 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4635 "2899 The mbuf allocation failed\n");
4636 goto out_free_dmabuf;
4637 }
4638
4639 /* Cleanup any outstanding ELS commands */
4640 lpfc_els_flush_all_cmd(phba);
4641
4642 /* Block ELS IOCBs until we have done process link event */
895427bd 4643 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS
4644
4645 /* Update link event statistics */
4646 phba->sli.slistat.link_event++;
4647
4648 /* Create lpfc_handle_latt mailbox command from link ACQE */
4649 lpfc_read_topology(phba, pmb, mp);
4650 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4651 pmb->vport = phba->pport;
4652
7bdedb34 4653 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
ae9e28f3
JS
4654 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
4655
4656 switch (phba->sli4_hba.link_state.status) {
4657 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
4658 phba->link_flag |= LS_MDS_LINK_DOWN;
4659 break;
4660 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
4661 phba->link_flag |= LS_MDS_LOOPBACK;
4662 break;
4663 default:
4664 break;
4665 }
4666
7bdedb34
JS
4667 /* Parse and translate status field */
4668 mb = &pmb->u.mb;
4669 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4670 (void *)acqe_fc);
4671
4672 /* Parse and translate link attention fields */
4673 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4674 la->eventTag = acqe_fc->event_tag;
7bdedb34 4675
aeb3c817
JS
4676 if (phba->sli4_hba.link_state.status ==
4677 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
4678 bf_set(lpfc_mbx_read_top_att_type, la,
4679 LPFC_FC_LA_TYPE_UNEXP_WWPN);
4680 } else {
4681 bf_set(lpfc_mbx_read_top_att_type, la,
4682 LPFC_FC_LA_TYPE_LINK_DOWN);
4683 }
7bdedb34
JS
4684 /* Invoke the mailbox command callback function */
4685 lpfc_mbx_cmpl_read_topology(phba, pmb);
4686
4687 return;
4688 }
4689
70f3c073
JS
4690 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4691 if (rc == MBX_NOT_FINISHED)
4692 goto out_free_dmabuf;
4693 return;
4694
4695out_free_dmabuf:
4696 kfree(mp);
4697out_free_pmb:
4698 mempool_free(pmb, phba->mbox_mem_pool);
4699}
4700
4701/**
4702 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4703 * @phba: pointer to lpfc hba data structure.
4704 * @acqe_fc: pointer to the async SLI completion queue entry.
4705 *
4706 * This routine is to handle the SLI4 asynchronous SLI events.
4707 **/
4708static void
4709lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4710{
4b8bae08 4711 char port_name;
8c1312e1 4712 char message[128];
4b8bae08 4713 uint8_t status;
946727dc 4714 uint8_t evt_type;
448193b5 4715 uint8_t operational = 0;
946727dc 4716 struct temp_event temp_event_data;
4b8bae08 4717 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS
4718 struct Scsi_Host *shost;
4719
4720 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4721
448193b5
JS
4722 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4723 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4724 "x%08x SLI Event Type:%d\n",
4725 acqe_sli->event_data1, acqe_sli->event_data2,
4726 evt_type);
4b8bae08
JS
4727
4728 port_name = phba->Port[0];
4729 if (port_name == 0x00)
4730 port_name = '?'; /* get port name is empty */
4731
946727dc
JS
4732 switch (evt_type) {
4733 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4734 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4735 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4736 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4737
4738 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4739 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4740 acqe_sli->event_data1, port_name);
4741
310429ef 4742 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
4743 shost = lpfc_shost_from_vport(phba->pport);
4744 fc_host_post_vendor_event(shost, fc_get_event_number(),
4745 sizeof(temp_event_data),
4746 (char *)&temp_event_data,
4747 SCSI_NL_VID_TYPE_PCI
4748 | PCI_VENDOR_ID_EMULEX);
4749 break;
4750 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4751 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4752 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4753 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4754
4755 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4756 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4757 acqe_sli->event_data1, port_name);
4758
4759 shost = lpfc_shost_from_vport(phba->pport);
4760 fc_host_post_vendor_event(shost, fc_get_event_number(),
4761 sizeof(temp_event_data),
4762 (char *)&temp_event_data,
4763 SCSI_NL_VID_TYPE_PCI
4764 | PCI_VENDOR_ID_EMULEX);
4765 break;
4766 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4767 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS
4768 &acqe_sli->event_data1;
4769
946727dc
JS
4770 /* fetch the status for this port */
4771 switch (phba->sli4_hba.lnk_info.lnk_no) {
4772 case LPFC_LINK_NUMBER_0:
448193b5
JS
4773 status = bf_get(lpfc_sli_misconfigured_port0_state,
4774 &misconfigured->theEvent);
4775 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4776 &misconfigured->theEvent);
946727dc
JS
4777 break;
4778 case LPFC_LINK_NUMBER_1:
448193b5
JS
4779 status = bf_get(lpfc_sli_misconfigured_port1_state,
4780 &misconfigured->theEvent);
4781 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4782 &misconfigured->theEvent);
946727dc
JS
4783 break;
4784 case LPFC_LINK_NUMBER_2:
448193b5
JS
4785 status = bf_get(lpfc_sli_misconfigured_port2_state,
4786 &misconfigured->theEvent);
4787 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4788 &misconfigured->theEvent);
946727dc
JS
4789 break;
4790 case LPFC_LINK_NUMBER_3:
448193b5
JS
4791 status = bf_get(lpfc_sli_misconfigured_port3_state,
4792 &misconfigured->theEvent);
4793 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4794 &misconfigured->theEvent);
946727dc
JS
4795 break;
4796 default:
448193b5
JS
4797 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4798 "3296 "
4799 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4800 "event: Invalid link %d",
4801 phba->sli4_hba.lnk_info.lnk_no);
4802 return;
946727dc 4803 }
4b8bae08 4804
448193b5
JS
4805 /* Skip if optic state unchanged */
4806 if (phba->sli4_hba.lnk_info.optic_state == status)
4807 return;
4808
946727dc
JS
4809 switch (status) {
4810 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS
4811 sprintf(message, "Physical Link is functional");
4812 break;
946727dc
JS
4813 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4814 sprintf(message, "Optics faulted/incorrectly "
4815 "installed/not installed - Reseat optics, "
4816 "if issue not resolved, replace.");
4817 break;
4818 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4819 sprintf(message,
4820 "Optics of two types installed - Remove one "
4821 "optic or install matching pair of optics.");
4822 break;
4823 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4824 sprintf(message, "Incompatible optics - Replace with "
292098be 4825 "compatible optics for card to function.");
946727dc 4826 break;
448193b5
JS
4827 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4828 sprintf(message, "Unqualified optics - Replace with "
4829 "Avago optics for Warranty and Technical "
4830 "Support - Link is%s operational",
2ea259ee 4831 (operational) ? " not" : "");
448193b5
JS
4832 break;
4833 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4834 sprintf(message, "Uncertified optics - Replace with "
4835 "Avago-certified optics to enable link "
4836 "operation - Link is%s operational",
2ea259ee 4837 (operational) ? " not" : "");
448193b5 4838 break;
946727dc
JS
4839 default:
4840 /* firmware is reporting a status we don't know about */
4841 sprintf(message, "Unknown event status x%02x", status);
4842 break;
4843 }
448193b5 4844 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4845 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4846 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS
4847 break;
4848 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4849 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4850 "3192 Remote DPort Test Initiated - "
4851 "Event Data1:x%08x Event Data2: x%08x\n",
4852 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS
4853 break;
4854 default:
946727dc
JS
4855 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4856 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4857 "x%08x SLI Event Type:%d\n",
4858 acqe_sli->event_data1, acqe_sli->event_data2,
4859 evt_type);
4b8bae08
JS
4860 break;
4861 }
70f3c073
JS
4862}
4863
fc2b989b
JS
4864/**
4865 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4866 * @vport: pointer to vport data structure.
4867 *
4868 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4869 * response to a CVL event.
4870 *
4871 * Return the pointer to the ndlp with the vport if successful, otherwise
4872 * return NULL.
4873 **/
4874static struct lpfc_nodelist *
4875lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4876{
4877 struct lpfc_nodelist *ndlp;
4878 struct Scsi_Host *shost;
4879 struct lpfc_hba *phba;
4880
4881 if (!vport)
4882 return NULL;
fc2b989b
JS
4883 phba = vport->phba;
4884 if (!phba)
4885 return NULL;
78730cfe
JS
4886 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4887 if (!ndlp) {
4888 /* Cannot find existing Fabric ndlp, so allocate a new one */
9d3d340d 4889 ndlp = lpfc_nlp_init(vport, Fabric_DID);
78730cfe
JS
4890 if (!ndlp)
4891 return 0;
78730cfe
JS
4892 /* Set the node type */
4893 ndlp->nlp_type |= NLP_FABRIC;
4894 /* Put ndlp onto node list */
4895 lpfc_enqueue_node(vport, ndlp);
4896 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4897 /* re-setup ndlp without removing from node list */
4898 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4899 if (!ndlp)
4900 return 0;
4901 }
63e801ce
JS
4902 if ((phba->pport->port_state < LPFC_FLOGI) &&
4903 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4904 return NULL;
4905 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS
4906 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4907 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4908 return NULL;
4909 shost = lpfc_shost_from_vport(vport);
4910 if (!shost)
4911 return NULL;
4912 lpfc_linkdown_port(vport);
4913 lpfc_cleanup_pending_mbox(vport);
4914 spin_lock_irq(shost->host_lock);
4915 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4916 spin_unlock_irq(shost->host_lock);
4917
4918 return ndlp;
4919}
4920
4921/**
4922 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4923 * @vport: pointer to lpfc hba data structure.
4924 *
4925 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4926 * response to a FCF dead event.
4927 **/
4928static void
4929lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4930{
4931 struct lpfc_vport **vports;
4932 int i;
4933
4934 vports = lpfc_create_vport_work_array(phba);
4935 if (vports)
4936 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4937 lpfc_sli4_perform_vport_cvl(vports[i]);
4938 lpfc_destroy_vport_work_array(phba, vports);
4939}
4940
da0436e9 4941/**
76a95d75 4942 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS
4943 * @phba: pointer to lpfc hba data structure.
4944 * @acqe_link: pointer to the async fcoe completion queue entry.
4945 *
4946 * This routine is to handle the SLI4 asynchronous fcoe event.
4947 **/
4948static void
76a95d75 4949lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4950 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4951{
70f3c073 4952 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4953 int rc;
6669f9bb
JS
4954 struct lpfc_vport *vport;
4955 struct lpfc_nodelist *ndlp;
4956 struct Scsi_Host *shost;
695a814e
JS
4957 int active_vlink_present;
4958 struct lpfc_vport **vports;
4959 int i;
da0436e9 4960
70f3c073
JS
4961 phba->fc_eventTag = acqe_fip->event_tag;
4962 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4963 switch (event_type) {
70f3c073
JS
4964 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4965 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4966 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS
4967 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4968 LOG_DISCOVERY,
a93ff37a
JS
4969 "2546 New FCF event, evt_tag:x%x, "
4970 "index:x%x\n",
70f3c073
JS
4971 acqe_fip->event_tag,
4972 acqe_fip->index);
999d813f
JS
4973 else
4974 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4975 LOG_DISCOVERY,
a93ff37a
JS
4976 "2788 FCF param modified event, "
4977 "evt_tag:x%x, index:x%x\n",
70f3c073
JS
4978 acqe_fip->event_tag,
4979 acqe_fip->index);
38b92ef8 4980 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS
4981 /*
4982 * During period of FCF discovery, read the FCF
4983 * table record indexed by the event to update
a93ff37a 4984 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS
4985 */
4986 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4987 LOG_DISCOVERY,
a93ff37a
JS
4988 "2779 Read FCF (x%x) for updating "
4989 "roundrobin FCF failover bmask\n",
70f3c073
JS
4990 acqe_fip->index);
4991 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 4992 }
38b92ef8
JS
4993
4994 /* If the FCF discovery is in progress, do nothing. */
3804dc84 4995 spin_lock_irq(&phba->hbalock);
a93ff37a 4996 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS
4997 spin_unlock_irq(&phba->hbalock);
4998 break;
4999 }
5000 /* If fast FCF failover rescan event is pending, do nothing */
5001 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
5002 spin_unlock_irq(&phba->hbalock);
5003 break;
5004 }
5005
c2b9712e
JS
5006 /* If the FCF has been in discovered state, do nothing. */
5007 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS
5008 spin_unlock_irq(&phba->hbalock);
5009 break;
5010 }
5011 spin_unlock_irq(&phba->hbalock);
38b92ef8 5012
0c9ab6f5
JS
5013 /* Otherwise, scan the entire FCF table and re-discover SAN */
5014 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS
5015 "2770 Start FCF table scan per async FCF "
5016 "event, evt_tag:x%x, index:x%x\n",
70f3c073 5017 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS
5018 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
5019 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 5020 if (rc)
0c9ab6f5
JS
5021 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5022 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 5023 "command failed (x%x)\n", rc);
da0436e9
JS
5024 break;
5025
70f3c073 5026 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 5027 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 5028 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS
5029 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
5030 acqe_fip->event_tag);
da0436e9
JS
5031 break;
5032
70f3c073 5033 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 5034 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5035 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5036 "2549 FCF (x%x) disconnected from network, "
70f3c073 5037 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS
5038 /*
5039 * If we are in the middle of FCF failover process, clear
5040 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 5041 */
fc2b989b 5042 spin_lock_irq(&phba->hbalock);
a1cadfef
JS
5043 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
5044 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 5045 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 5046 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 5047 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS
5048 break;
5049 }
38b92ef8
JS
5050 spin_unlock_irq(&phba->hbalock);
5051
5052 /* If the event is not for currently used fcf do nothing */
70f3c073 5053 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS
5054 break;
5055
5056 /*
5057 * Otherwise, request the port to rediscover the entire FCF
5058 * table for a fast recovery from case that the current FCF
5059 * is no longer valid as we are not in the middle of FCF
5060 * failover process already.
5061 */
c2b9712e
JS
5062 spin_lock_irq(&phba->hbalock);
5063 /* Mark the fast failover process in progress */
5064 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
5065 spin_unlock_irq(&phba->hbalock);
5066
5067 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
5068 "2771 Start FCF fast failover process due to "
5069 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
5070 "\n", acqe_fip->event_tag, acqe_fip->index);
5071 rc = lpfc_sli4_redisc_fcf_table(phba);
5072 if (rc) {
5073 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5074 LOG_DISCOVERY,
5075 "2772 Issue FCF rediscover mabilbox "
5076 "command failed, fail through to FCF "
5077 "dead event\n");
5078 spin_lock_irq(&phba->hbalock);
5079 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
5080 spin_unlock_irq(&phba->hbalock);
5081 /*
5082 * Last resort will fail over by treating this
5083 * as a link down to FCF registration.
5084 */
5085 lpfc_sli4_fcf_dead_failthrough(phba);
5086 } else {
5087 /* Reset FCF roundrobin bmask for new discovery */
5088 lpfc_sli4_clear_fcf_rr_bmask(phba);
5089 /*
5090 * Handling fast FCF failover to a DEAD FCF event is
5091 * considered equalivant to receiving CVL to all vports.
5092 */
5093 lpfc_sli4_perform_all_vport_cvl(phba);
5094 }
da0436e9 5095 break;
70f3c073 5096 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 5097 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5098 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 5099 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 5100 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 5101
6669f9bb 5102 vport = lpfc_find_vport_by_vpid(phba,
5248a749 5103 acqe_fip->index);
fc2b989b 5104 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS
5105 if (!ndlp)
5106 break;
695a814e
JS
5107 active_vlink_present = 0;
5108
5109 vports = lpfc_create_vport_work_array(phba);
5110 if (vports) {
5111 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
5112 i++) {
5113 if ((!(vports[i]->fc_flag &
5114 FC_VPORT_CVL_RCVD)) &&
5115 (vports[i]->port_state > LPFC_FDISC)) {
5116 active_vlink_present = 1;
5117 break;
5118 }
5119 }
5120 lpfc_destroy_vport_work_array(phba, vports);
5121 }
5122
cc82355a
JS
5123 /*
5124 * Don't re-instantiate if vport is marked for deletion.
5125 * If we are here first then vport_delete is going to wait
5126 * for discovery to complete.
5127 */
5128 if (!(vport->load_flag & FC_UNLOADING) &&
5129 active_vlink_present) {
695a814e
JS
5130 /*
5131 * If there are other active VLinks present,
5132 * re-instantiate the Vlink using FDISC.
5133 */
256ec0d0
JS
5134 mod_timer(&ndlp->nlp_delayfunc,
5135 jiffies + msecs_to_jiffies(1000));
fc2b989b 5136 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS
5137 spin_lock_irq(shost->host_lock);
5138 ndlp->nlp_flag |= NLP_DELAY_TMO;
5139 spin_unlock_irq(shost->host_lock);
695a814e
JS
5140 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
5141 vport->port_state = LPFC_FDISC;
5142 } else {
ecfd03c6
JS
5143 /*
5144 * Otherwise, we request port to rediscover
5145 * the entire FCF table for a fast recovery
5146 * from possible case that the current FCF
0c9ab6f5
JS
5147 * is no longer valid if we are not already
5148 * in the FCF failover process.
ecfd03c6 5149 */
fc2b989b 5150 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5151 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS
5152 spin_unlock_irq(&phba->hbalock);
5153 break;
5154 }
5155 /* Mark the fast failover process in progress */
0c9ab6f5 5156 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 5157 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS
5158 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5159 LOG_DISCOVERY,
a93ff37a 5160 "2773 Start FCF failover per CVL, "
70f3c073 5161 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 5162 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 5163 if (rc) {
0c9ab6f5
JS
5164 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5165 LOG_DISCOVERY,
5166 "2774 Issue FCF rediscover "
5167 "mabilbox command failed, "
5168 "through to CVL event\n");
fc2b989b 5169 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5170 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 5171 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS
5172 /*
5173 * Last resort will be re-try on the
5174 * the current registered FCF entry.
5175 */
5176 lpfc_retry_pport_discovery(phba);
38b92ef8
JS
5177 } else
5178 /*
5179 * Reset FCF roundrobin bmask for new
5180 * discovery.
5181 */
7d791df7 5182 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS
5183 }
5184 break;
da0436e9
JS
5185 default:
5186 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5187 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 5188 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS
5189 break;
5190 }
5191}
5192
5193/**
5194 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5195 * @phba: pointer to lpfc hba data structure.
5196 * @acqe_link: pointer to the async dcbx completion queue entry.
5197 *
5198 * This routine is to handle the SLI4 asynchronous dcbx event.
5199 **/
5200static void
5201lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5202 struct lpfc_acqe_dcbx *acqe_dcbx)
5203{
4d9ab994 5204 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS
5205 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5206 "0290 The SLI4 DCBX asynchronous event is not "
5207 "handled yet\n");
5208}
5209
b19a061a
JS
5210/**
5211 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5212 * @phba: pointer to lpfc hba data structure.
5213 * @acqe_link: pointer to the async grp5 completion queue entry.
5214 *
5215 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5216 * is an asynchronous notified of a logical link speed change. The Port
5217 * reports the logical link speed in units of 10Mbps.
5218 **/
5219static void
5220lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5221 struct lpfc_acqe_grp5 *acqe_grp5)
5222{
5223 uint16_t prev_ll_spd;
5224
5225 phba->fc_eventTag = acqe_grp5->event_tag;
5226 phba->fcoe_eventtag = acqe_grp5->event_tag;
5227 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5228 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5229 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS
5230 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5231 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS
5232 "from %dMbps to %dMbps\n", prev_ll_spd,
5233 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS
5234}
5235
da0436e9
JS
5236/**
5237 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5238 * @phba: pointer to lpfc hba data structure.
5239 *
5240 * This routine is invoked by the worker thread to process all the pending
5241 * SLI4 asynchronous events.
5242 **/
5243void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5244{
5245 struct lpfc_cq_event *cq_event;
5246
5247 /* First, declare the async event has been handled */
5248 spin_lock_irq(&phba->hbalock);
5249 phba->hba_flag &= ~ASYNC_EVENT;
5250 spin_unlock_irq(&phba->hbalock);
5251 /* Now, handle all the async events */
5252 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5253 /* Get the first event from the head of the event queue */
5254 spin_lock_irq(&phba->hbalock);
5255 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5256 cq_event, struct lpfc_cq_event, list);
5257 spin_unlock_irq(&phba->hbalock);
5258 /* Process the asynchronous event */
5259 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5260 case LPFC_TRAILER_CODE_LINK:
5261 lpfc_sli4_async_link_evt(phba,
5262 &cq_event->cqe.acqe_link);
5263 break;
5264 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5265 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS
5266 break;
5267 case LPFC_TRAILER_CODE_DCBX:
5268 lpfc_sli4_async_dcbx_evt(phba,
5269 &cq_event->cqe.acqe_dcbx);
5270 break;
b19a061a
JS
5271 case LPFC_TRAILER_CODE_GRP5:
5272 lpfc_sli4_async_grp5_evt(phba,
5273 &cq_event->cqe.acqe_grp5);
5274 break;
70f3c073
JS
5275 case LPFC_TRAILER_CODE_FC:
5276 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5277 break;
5278 case LPFC_TRAILER_CODE_SLI:
5279 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5280 break;
da0436e9
JS
5281 default:
5282 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5283 "1804 Invalid asynchrous event code: "
5284 "x%x\n", bf_get(lpfc_trailer_code,
5285 &cq_event->cqe.mcqe_cmpl));
5286 break;
5287 }
5288 /* Free the completion event processed to the free pool */
5289 lpfc_sli4_cq_event_release(phba, cq_event);
5290 }
5291}
5292
ecfd03c6
JS
5293/**
5294 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5295 * @phba: pointer to lpfc hba data structure.
5296 *
5297 * This routine is invoked by the worker thread to process FCF table
5298 * rediscovery pending completion event.
5299 **/
5300void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5301{
5302 int rc;
5303
5304 spin_lock_irq(&phba->hbalock);
5305 /* Clear FCF rediscovery timeout event */
5306 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5307 /* Clear driver fast failover FCF record flag */
5308 phba->fcf.failover_rec.flag = 0;
5309 /* Set state for FCF fast failover */
5310 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5311 spin_unlock_irq(&phba->hbalock);
5312
5313 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5314 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5315 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5316 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5317 if (rc)
0c9ab6f5
JS
5318 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5319 "2747 Issue FCF scan read FCF mailbox "
5320 "command failed 0x%x\n", rc);
ecfd03c6
JS
5321}
5322
da0436e9
JS
5323/**
5324 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5325 * @phba: pointer to lpfc hba data structure.
5326 * @dev_grp: The HBA PCI-Device group number.
5327 *
5328 * This routine is invoked to set up the per HBA PCI-Device group function
5329 * API jump table entries.
5330 *
5331 * Return: 0 if success, otherwise -ENODEV
5332 **/
5333int
5334lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5335{
5336 int rc;
5337
5338 /* Set up lpfc PCI-device group */
5339 phba->pci_dev_grp = dev_grp;
5340
5341 /* The LPFC_PCI_DEV_OC uses SLI4 */
5342 if (dev_grp == LPFC_PCI_DEV_OC)
5343 phba->sli_rev = LPFC_SLI_REV4;
5344
5345 /* Set up device INIT API function jump table */
5346 rc = lpfc_init_api_table_setup(phba, dev_grp);
5347 if (rc)
5348 return -ENODEV;
5349 /* Set up SCSI API function jump table */
5350 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5351 if (rc)
5352 return -ENODEV;
5353 /* Set up SLI API function jump table */
5354 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5355 if (rc)
5356 return -ENODEV;
5357 /* Set up MBOX API function jump table */
5358 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5359 if (rc)
5360 return -ENODEV;
5361
5362 return 0;
5b75da2f
JS
5363}
5364
5365/**
3621a710 5366 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS
5367 * @phba: pointer to lpfc hba data structure.
5368 * @intr_mode: active interrupt mode adopted.
5369 *
5370 * This routine it invoked to log the currently used active interrupt mode
5371 * to the device.
3772a991
JS
5372 **/
5373static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS
5374{
5375 switch (intr_mode) {
5376 case 0:
5377 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5378 "0470 Enable INTx interrupt mode.\n");
5379 break;
5380 case 1:
5381 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5382 "0481 Enabled MSI interrupt mode.\n");
5383 break;
5384 case 2:
5385 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5386 "0480 Enabled MSI-X interrupt mode.\n");
5387 break;
5388 default:
5389 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5390 "0482 Illegal interrupt mode.\n");
5391 break;
5392 }
5393 return;
5394}
5395
5b75da2f 5396/**
3772a991 5397 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS
5398 * @phba: pointer to lpfc hba data structure.
5399 *
3772a991
JS
5400 * This routine is invoked to enable the PCI device that is common to all
5401 * PCI devices.
5b75da2f
JS
5402 *
5403 * Return codes
af901ca1 5404 * 0 - successful
3772a991 5405 * other values - error
5b75da2f 5406 **/
3772a991
JS
5407static int
5408lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5409{
3772a991 5410 struct pci_dev *pdev;
5b75da2f 5411
3772a991
JS
5412 /* Obtain PCI device reference */
5413 if (!phba->pcidev)
5414 goto out_error;
5415 else
5416 pdev = phba->pcidev;
3772a991
JS
5417 /* Enable PCI device */
5418 if (pci_enable_device_mem(pdev))
5419 goto out_error;
5420 /* Request PCI resource for the device */
e0c0483c 5421 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS
5422 goto out_disable_device;
5423 /* Set up device as PCI master and save state for EEH */
5424 pci_set_master(pdev);
5425 pci_try_set_mwi(pdev);
5426 pci_save_state(pdev);
5b75da2f 5427
0558056c 5428 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5429 if (pci_is_pcie(pdev))
0558056c
JS
5430 pdev->needs_freset = 1;
5431
3772a991 5432 return 0;
5b75da2f 5433
3772a991
JS
5434out_disable_device:
5435 pci_disable_device(pdev);
5436out_error:
079b5c91 5437 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5438 "1401 Failed to enable pci device\n");
3772a991 5439 return -ENODEV;
5b75da2f
JS
5440}
5441
5442/**
3772a991 5443 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS
5444 * @phba: pointer to lpfc hba data structure.
5445 *
3772a991
JS
5446 * This routine is invoked to disable the PCI device that is common to all
5447 * PCI devices.
5b75da2f
JS
5448 **/
5449static void
3772a991 5450lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5451{
3772a991 5452 struct pci_dev *pdev;
5b75da2f 5453
3772a991
JS
5454 /* Obtain PCI device reference */
5455 if (!phba->pcidev)
5456 return;
5457 else
5458 pdev = phba->pcidev;
3772a991 5459 /* Release PCI resource and disable PCI device */
e0c0483c 5460 pci_release_mem_regions(pdev);
3772a991 5461 pci_disable_device(pdev);
5b75da2f
JS
5462
5463 return;
5464}
5465
e59058c4 5466/**
3772a991
JS
5467 * lpfc_reset_hba - Reset a hba
5468 * @phba: pointer to lpfc hba data structure.
e59058c4 5469 *
3772a991
JS
5470 * This routine is invoked to reset a hba device. It brings the HBA
5471 * offline, performs a board restart, and then brings the board back
5472 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5473 * on outstanding mailbox commands.
e59058c4 5474 **/
3772a991
JS
5475void
5476lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5477{
3772a991
JS
5478 /* If resets are disabled then set error state and return. */
5479 if (!phba->cfg_enable_hba_reset) {
5480 phba->link_state = LPFC_HBA_ERROR;
5481 return;
5482 }
ee62021a
JS
5483 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5484 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5485 else
5486 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS
5487 lpfc_offline(phba);
5488 lpfc_sli_brdrestart(phba);
5489 lpfc_online(phba);
5490 lpfc_unblock_mgmt_io(phba);
5491}
dea3101e 5492
0a96e975
JS
5493/**
5494 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5495 * @phba: pointer to lpfc hba data structure.
5496 *
5497 * This function enables the PCI SR-IOV virtual functions to a physical
5498 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5499 * enable the number of virtual functions to the physical function. As
5500 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5501 * API call does not considered as an error condition for most of the device.
5502 **/
5503uint16_t
5504lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5505{
5506 struct pci_dev *pdev = phba->pcidev;
5507 uint16_t nr_virtfn;
5508 int pos;
5509
0a96e975
JS
5510 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5511 if (pos == 0)
5512 return 0;
5513
5514 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5515 return nr_virtfn;
5516}
5517
912e3acd
JS
5518/**
5519 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5520 * @phba: pointer to lpfc hba data structure.
5521 * @nr_vfn: number of virtual functions to be enabled.
5522 *
5523 * This function enables the PCI SR-IOV virtual functions to a physical
5524 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5525 * enable the number of virtual functions to the physical function. As
5526 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5527 * API call does not considered as an error condition for most of the device.
5528 **/
5529int
5530lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5531{
5532 struct pci_dev *pdev = phba->pcidev;
0a96e975 5533 uint16_t max_nr_vfn;
912e3acd
JS
5534 int rc;
5535
0a96e975
JS
5536 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5537 if (nr_vfn > max_nr_vfn) {
5538 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5539 "3057 Requested vfs (%d) greater than "
5540 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5541 return -EINVAL;
5542 }
5543
912e3acd
JS
5544 rc = pci_enable_sriov(pdev, nr_vfn);
5545 if (rc) {
5546 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5547 "2806 Failed to enable sriov on this device "
5548 "with vfn number nr_vf:%d, rc:%d\n",
5549 nr_vfn, rc);
5550 } else
5551 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5552 "2807 Successful enable sriov on this device "
5553 "with vfn number nr_vf:%d\n", nr_vfn);
5554 return rc;
5555}
5556
3772a991 5557/**
895427bd 5558 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS
5559 * @phba: pointer to lpfc hba data structure.
5560 *
895427bd
JS
5561 * This routine is invoked to set up the driver internal resources before the
5562 * device specific resource setup to support the HBA device it attached to.
3772a991
JS
5563 *
5564 * Return codes
895427bd
JS
5565 * 0 - successful
5566 * other values - error
3772a991
JS
5567 **/
5568static int
895427bd 5569lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5570{
895427bd 5571 struct lpfc_sli *psli = &phba->sli;
dea3101e 5572
2e0fef85 5573 /*
895427bd 5574 * Driver resources common to all SLI revisions
2e0fef85 5575 */
895427bd
JS
5576 atomic_set(&phba->fast_event_count, 0);
5577 spin_lock_init(&phba->hbalock);
dea3101e 5578
895427bd
JS
5579 /* Initialize ndlp management spinlock */
5580 spin_lock_init(&phba->ndlp_lock);
5581
5582 INIT_LIST_HEAD(&phba->port_list);
5583 INIT_LIST_HEAD(&phba->work_list);
5584 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5585
5586 /* Initialize the wait queue head for the kernel thread */
5587 init_waitqueue_head(&phba->work_waitq);
5588
5589 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 5590 "1403 Protocols supported %s %s %s\n",
895427bd
JS
5591 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5592 "SCSI" : " "),
5593 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS
5594 "NVME" : " "),
5595 (phba->nvmet_support ? "NVMET" : " "));
895427bd
JS
5596
5597 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5598 /* Initialize the scsi buffer list used by driver for scsi IO */
5599 spin_lock_init(&phba->scsi_buf_list_get_lock);
5600 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5601 spin_lock_init(&phba->scsi_buf_list_put_lock);
5602 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5603 }
5604
5605 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5606 (phba->nvmet_support == 0)) {
5607 /* Initialize the NVME buffer list used by driver for NVME IO */
5608 spin_lock_init(&phba->nvme_buf_list_get_lock);
5609 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
5610 spin_lock_init(&phba->nvme_buf_list_put_lock);
5611 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
5612 }
5613
5614 /* Initialize the fabric iocb list */
5615 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5616
5617 /* Initialize list to save ELS buffers */
5618 INIT_LIST_HEAD(&phba->elsbuf);
5619
5620 /* Initialize FCF connection rec list */
5621 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5622
5623 /* Initialize OAS configuration list */
5624 spin_lock_init(&phba->devicelock);
5625 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5626
3772a991 5627 /* MBOX heartbeat timer */
33cc559a 5628 setup_timer(&psli->mbox_tmo, lpfc_mbox_timeout, (unsigned long)phba);
3772a991 5629 /* Fabric block timer */
33cc559a
TJ
5630 setup_timer(&phba->fabric_block_timer, lpfc_fabric_block_timeout,
5631 (unsigned long)phba);
3772a991 5632 /* EA polling mode timer */
33cc559a
TJ
5633 setup_timer(&phba->eratt_poll, lpfc_poll_eratt,
5634 (unsigned long)phba);
895427bd 5635 /* Heartbeat timer */
33cc559a 5636 setup_timer(&phba->hb_tmofunc, lpfc_hb_timeout, (unsigned long)phba);
895427bd
JS
5637
5638 return 0;
5639}
5640
5641/**
5642 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5643 * @phba: pointer to lpfc hba data structure.
5644 *
5645 * This routine is invoked to set up the driver internal resources specific to
5646 * support the SLI-3 HBA device it attached to.
5647 *
5648 * Return codes
5649 * 0 - successful
5650 * other values - error
5651 **/
5652static int
5653lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5654{
5655 int rc;
5656
5657 /*
5658 * Initialize timers used by driver
5659 */
5660
5661 /* FCP polling mode timer */
33cc559a
TJ
5662 setup_timer(&phba->fcp_poll_timer, lpfc_poll_timeout,
5663 (unsigned long)phba);
dea3101e 5664
3772a991
JS
5665 /* Host attention work mask setup */
5666 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5667 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5668
3772a991
JS
5669 /* Get all the module params for configuring this host */
5670 lpfc_get_cfgparam(phba);
895427bd
JS
5671 /* Set up phase-1 common device driver resources */
5672
5673 rc = lpfc_setup_driver_resource_phase1(phba);
5674 if (rc)
5675 return -ENODEV;
5676
49198b37
JS
5677 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5678 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5679 /* check for menlo minimum sg count */
5680 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5681 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5682 }
5683
895427bd
JS
5684 if (!phba->sli.sli3_ring)
5685 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5686 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5687 if (!phba->sli.sli3_ring)
2a76a283
JS
5688 return -ENOMEM;
5689
dea3101e 5690 /*
96f7077f 5691 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5692 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5693 */
3772a991 5694
96f7077f
JS
5695 /* Initialize the host templates the configured values. */
5696 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e
JS
5697 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
5698 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5699
5700 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5701 if (phba->cfg_enable_bg) {
96f7077f
JS
5702 /*
5703 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5704 * the FCP rsp, and a BDE for each. Sice we have no control
5705 * over how many protection data segments the SCSI Layer
5706 * will hand us (ie: there could be one for every block
5707 * in the IO), we just allocate enough BDEs to accomidate
5708 * our max amount and we need to limit lpfc_sg_seg_cnt to
5709 * minimize the risk of running out.
5710 */
5711 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5712 sizeof(struct fcp_rsp) +
5713 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5714
5715 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5716 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5717
5718 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5719 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5720 } else {
5721 /*
5722 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5723 * the FCP rsp, a BDE for each, and a BDE for up to
5724 * cfg_sg_seg_cnt data segments.
5725 */
5726 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5727 sizeof(struct fcp_rsp) +
5728 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5729
5730 /* Total BDEs in BPL for scsi_sg_list */
5731 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5732 }
dea3101e 5733
96f7077f
JS
5734 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5735 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5736 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5737 phba->cfg_total_seg_cnt);
dea3101e 5738
3772a991
JS
5739 phba->max_vpi = LPFC_MAX_VPI;
5740 /* This will be set to correct value after config_port mbox */
5741 phba->max_vports = 0;
dea3101e 5742
3772a991
JS
5743 /*
5744 * Initialize the SLI Layer to run with lpfc HBAs.
5745 */
5746 lpfc_sli_setup(phba);
895427bd 5747 lpfc_sli_queue_init(phba);
ed957684 5748
3772a991
JS
5749 /* Allocate device driver memory */
5750 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5751 return -ENOMEM;
51ef4c26 5752
912e3acd
JS
5753 /*
5754 * Enable sr-iov virtual functions if supported and configured
5755 * through the module parameter.
5756 */
5757 if (phba->cfg_sriov_nr_virtfn > 0) {
5758 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5759 phba->cfg_sriov_nr_virtfn);
5760 if (rc) {
5761 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5762 "2808 Requested number of SR-IOV "
5763 "virtual functions (%d) is not "
5764 "supported\n",
5765 phba->cfg_sriov_nr_virtfn);
5766 phba->cfg_sriov_nr_virtfn = 0;
5767 }
5768 }
5769
3772a991
JS
5770 return 0;
5771}
ed957684 5772
3772a991
JS
5773/**
5774 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5775 * @phba: pointer to lpfc hba data structure.
5776 *
5777 * This routine is invoked to unset the driver internal resources set up
5778 * specific for supporting the SLI-3 HBA device it attached to.
5779 **/
5780static void
5781lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5782{
5783 /* Free device driver memory allocated */
5784 lpfc_mem_free_all(phba);
3163f725 5785
3772a991
JS
5786 return;
5787}
dea3101e 5788
3772a991 5789/**
da0436e9 5790 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS
5791 * @phba: pointer to lpfc hba data structure.
5792 *
da0436e9
JS
5793 * This routine is invoked to set up the driver internal resources specific to
5794 * support the SLI-4 HBA device it attached to.
3772a991
JS
5795 *
5796 * Return codes
af901ca1 5797 * 0 - successful
da0436e9 5798 * other values - error
3772a991
JS
5799 **/
5800static int
da0436e9 5801lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5802{
28baac74 5803 LPFC_MBOXQ_t *mboxq;
f358dd0c 5804 MAILBOX_t *mb;
895427bd 5805 int rc, i, max_buf_size;
28baac74
JS
5806 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5807 struct lpfc_mqe *mqe;
09294d46 5808 int longs;
1ba981fd 5809 int fof_vectors = 0;
f358dd0c 5810 uint64_t wwn;
da0436e9 5811
895427bd
JS
5812 phba->sli4_hba.num_online_cpu = num_online_cpus();
5813 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5814 phba->sli4_hba.curr_disp_cpu = 0;
5815
716d3bc5
JS
5816 /* Get all the module params for configuring this host */
5817 lpfc_get_cfgparam(phba);
5818
895427bd
JS
5819 /* Set up phase-1 common device driver resources */
5820 rc = lpfc_setup_driver_resource_phase1(phba);
5821 if (rc)
5822 return -ENODEV;
5823
da0436e9
JS
5824 /* Before proceed, wait for POST done and device ready */
5825 rc = lpfc_sli4_post_status_check(phba);
5826 if (rc)
5827 return -ENODEV;
5828
3772a991 5829 /*
da0436e9 5830 * Initialize timers used by driver
3772a991 5831 */
3772a991 5832
33cc559a 5833 setup_timer(&phba->rrq_tmr, lpfc_rrq_timeout, (unsigned long)phba);
3772a991 5834
ecfd03c6 5835 /* FCF rediscover timer */
33cc559a
TJ
5836 setup_timer(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo,
5837 (unsigned long)phba);
ecfd03c6 5838
7ad20aa9
JS
5839 /*
5840 * Control structure for handling external multi-buffer mailbox
5841 * command pass-through.
5842 */
5843 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5844 sizeof(struct lpfc_mbox_ext_buf_ctx));
5845 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5846
da0436e9 5847 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5848
da0436e9
JS
5849 /* This will be set to correct value after the read_config mbox */
5850 phba->max_vports = 0;
3772a991 5851
da0436e9
JS
5852 /* Program the default value of vlan_id and fc_map */
5853 phba->valid_vlan = 0;
5854 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5855 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5856 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5857
2a76a283
JS
5858 /*
5859 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS
5860 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5861 * The WQ create will allocate the ring.
2a76a283 5862 */
09294d46 5863
da0436e9 5864 /*
09294d46
JS
5865 * It doesn't matter what family our adapter is in, we are
5866 * limited to 2 Pages, 512 SGEs, for our SGL.
5867 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5868 */
5869 max_buf_size = (2 * SLI4_PAGE_SIZE);
5870 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - 2)
5871 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - 2;
09294d46 5872
da0436e9 5873 /*
895427bd
JS
5874 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5875 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5876 */
96f7077f
JS
5877 if (phba->cfg_enable_bg) {
5878 /*
895427bd
JS
5879 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5880 * the FCP rsp, and a SGE. Sice we have no control
5881 * over how many protection segments the SCSI Layer
96f7077f 5882 * will hand us (ie: there could be one for every block
895427bd
JS
5883 * in the IO), just allocate enough SGEs to accomidate
5884 * our max amount and we need to limit lpfc_sg_seg_cnt
5885 * to minimize the risk of running out.
96f7077f
JS
5886 */
5887 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5888 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS
5889
5890 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5891 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5892
5893 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS
5894 phba->cfg_sg_seg_cnt =
5895 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS
5896 } else {
5897 /*
895427bd 5898 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS
5899 * the FCP rsp, a SGE for each, and a SGE for up to
5900 * cfg_sg_seg_cnt data segments.
5901 */
5902 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd
JS
5903 sizeof(struct fcp_rsp) +
5904 ((phba->cfg_sg_seg_cnt + 2) *
5905 sizeof(struct sli4_sge));
96f7077f
JS
5906
5907 /* Total SGEs for scsi_sg_list */
5908 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
895427bd 5909
96f7077f 5910 /*
895427bd
JS
5911 * NOTE: if (phba->cfg_sg_seg_cnt + 2) <= 256 we only
5912 * need to post 1 page for the SGL.
96f7077f 5913 */
085c647c 5914 }
acd6859b 5915
96f7077f
JS
5916 /* Initialize the host templates with the updated values. */
5917 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5918 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e 5919 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5920
5921 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5922 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5923 else
5924 phba->cfg_sg_dma_buf_size =
5925 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5926
5927 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5928 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5929 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5930 phba->cfg_total_seg_cnt);
3772a991 5931
da0436e9 5932 /* Initialize buffer queue management fields */
895427bd 5933 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS
5934 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5935 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5936
da0436e9
JS
5937 /*
5938 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5939 */
895427bd
JS
5940 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5941 /* Initialize the Abort scsi buffer list used by driver */
5942 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5943 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5944 }
5945
5946 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5947 /* Initialize the Abort nvme buffer list used by driver */
5948 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5949 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379 5950 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
a8cf5dfe 5951 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
6c621a22 5952
318083ad
JS
5953 /* Fast-path XRI aborted CQ Event work queue list */
5954 INIT_LIST_HEAD(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue);
895427bd
JS
5955 }
5956
da0436e9 5957 /* This abort list used by worker thread */
895427bd 5958 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
a8cf5dfe 5959 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
3772a991 5960
da0436e9 5961 /*
6d368e53 5962 * Initialize driver internal slow-path work queues
da0436e9 5963 */
3772a991 5964
da0436e9
JS
5965 /* Driver internel slow-path CQ Event pool */
5966 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5967 /* Response IOCB work queue list */
45ed1190 5968 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS
5969 /* Asynchronous event CQ Event work queue list */
5970 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5971 /* Fast-path XRI aborted CQ Event work queue list */
5972 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5973 /* Slow-path XRI aborted CQ Event work queue list */
5974 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5975 /* Receive queue CQ Event work queue list */
5976 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5977
6d368e53
JS
5978 /* Initialize extent block lists. */
5979 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5980 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5981 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
5982 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
5983
d1f525aa
JS
5984 /* Initialize mboxq lists. If the early init routines fail
5985 * these lists need to be correctly initialized.
5986 */
5987 INIT_LIST_HEAD(&phba->sli.mboxq);
5988 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
5989
448193b5
JS
5990 /* initialize optic_state to 0xFF */
5991 phba->sli4_hba.lnk_info.optic_state = 0xff;
5992
da0436e9
JS
5993 /* Allocate device driver memory */
5994 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
5995 if (rc)
5996 return -ENOMEM;
5997
2fcee4bf
JS
5998 /* IF Type 2 ports get initialized now. */
5999 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6000 LPFC_SLI_INTF_IF_TYPE_2) {
6001 rc = lpfc_pci_function_reset(phba);
895427bd
JS
6002 if (unlikely(rc)) {
6003 rc = -ENODEV;
6004 goto out_free_mem;
6005 }
946727dc 6006 phba->temp_sensor_support = 1;
2fcee4bf
JS
6007 }
6008
da0436e9
JS
6009 /* Create the bootstrap mailbox command */
6010 rc = lpfc_create_bootstrap_mbox(phba);
6011 if (unlikely(rc))
6012 goto out_free_mem;
6013
6014 /* Set up the host's endian order with the device. */
6015 rc = lpfc_setup_endian_order(phba);
6016 if (unlikely(rc))
6017 goto out_free_bsmbx;
6018
6019 /* Set up the hba's configuration parameters. */
6020 rc = lpfc_sli4_read_config(phba);
cff261f6
JS
6021 if (unlikely(rc))
6022 goto out_free_bsmbx;
6023 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS
6024 if (unlikely(rc))
6025 goto out_free_bsmbx;
6026
2fcee4bf
JS
6027 /* IF Type 0 ports get initialized now. */
6028 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6029 LPFC_SLI_INTF_IF_TYPE_0) {
6030 rc = lpfc_pci_function_reset(phba);
6031 if (unlikely(rc))
6032 goto out_free_bsmbx;
6033 }
da0436e9 6034
cb5172ea
JS
6035 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
6036 GFP_KERNEL);
6037 if (!mboxq) {
6038 rc = -ENOMEM;
6039 goto out_free_bsmbx;
6040 }
6041
f358dd0c 6042 /* Check for NVMET being configured */
895427bd 6043 phba->nvmet_support = 0;
f358dd0c
JS
6044 if (lpfc_enable_nvmet_cnt) {
6045
6046 /* First get WWN of HBA instance */
6047 lpfc_read_nv(phba, mboxq);
6048 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6049 if (rc != MBX_SUCCESS) {
6050 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6051 "6016 Mailbox failed , mbxCmd x%x "
6052 "READ_NV, mbxStatus x%x\n",
6053 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
6054 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
d1f525aa 6055 mempool_free(mboxq, phba->mbox_mem_pool);
f358dd0c
JS
6056 rc = -EIO;
6057 goto out_free_bsmbx;
6058 }
6059 mb = &mboxq->u.mb;
6060 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
6061 sizeof(uint64_t));
6062 wwn = cpu_to_be64(wwn);
6063 phba->sli4_hba.wwnn.u.name = wwn;
6064 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
6065 sizeof(uint64_t));
6066 /* wwn is WWPN of HBA instance */
6067 wwn = cpu_to_be64(wwn);
6068 phba->sli4_hba.wwpn.u.name = wwn;
6069
6070 /* Check to see if it matches any module parameter */
6071 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
6072 if (wwn == lpfc_enable_nvmet[i]) {
7d708033 6073#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
3c603be9
JS
6074 if (lpfc_nvmet_mem_alloc(phba))
6075 break;
6076
6077 phba->nvmet_support = 1; /* a match */
6078
f358dd0c
JS
6079 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6080 "6017 NVME Target %016llx\n",
6081 wwn);
7d708033
JS
6082#else
6083 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6084 "6021 Can't enable NVME Target."
6085 " NVME_TARGET_FC infrastructure"
6086 " is not in kernel\n");
6087#endif
3c603be9 6088 break;
f358dd0c
JS
6089 }
6090 }
6091 }
895427bd
JS
6092
6093 lpfc_nvme_mod_param_dep(phba);
6094
fedd3b7b 6095 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS
6096 lpfc_supported_pages(mboxq);
6097 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS
6098 if (!rc) {
6099 mqe = &mboxq->u.mqe;
6100 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
6101 LPFC_MAX_SUPPORTED_PAGES);
6102 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
6103 switch (pn_page[i]) {
6104 case LPFC_SLI4_PARAMETERS:
6105 phba->sli4_hba.pc_sli4_params.supported = 1;
6106 break;
6107 default:
6108 break;
6109 }
6110 }
6111 /* Read the port's SLI4 Parameters capabilities if supported. */
6112 if (phba->sli4_hba.pc_sli4_params.supported)
6113 rc = lpfc_pc_sli4_params_get(phba, mboxq);
6114 if (rc) {
6115 mempool_free(mboxq, phba->mbox_mem_pool);
6116 rc = -EIO;
6117 goto out_free_bsmbx;
cb5172ea
JS
6118 }
6119 }
65791f1f 6120
fedd3b7b
JS
6121 /*
6122 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS
6123 * If this call fails, it isn't critical unless the SLI4 parameters come
6124 * back in conflict.
fedd3b7b 6125 */
6d368e53
JS
6126 rc = lpfc_get_sli4_parameters(phba, mboxq);
6127 if (rc) {
6128 if (phba->sli4_hba.extents_in_use &&
6129 phba->sli4_hba.rpi_hdrs_in_use) {
6130 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6131 "2999 Unsupported SLI4 Parameters "
6132 "Extents and RPI headers enabled.\n");
6d368e53 6133 }
895427bd
JS
6134 mempool_free(mboxq, phba->mbox_mem_pool);
6135 goto out_free_bsmbx;
6d368e53 6136 }
895427bd 6137
cb5172ea 6138 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS
6139
6140 /* Verify OAS is supported */
6141 lpfc_sli4_oas_verify(phba);
6142 if (phba->cfg_fof)
6143 fof_vectors = 1;
6144
5350d872
JS
6145 /* Verify all the SLI4 queues */
6146 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS
6147 if (rc)
6148 goto out_free_bsmbx;
6149
6150 /* Create driver internal CQE event pool */
6151 rc = lpfc_sli4_cq_event_pool_create(phba);
6152 if (rc)
5350d872 6153 goto out_free_bsmbx;
da0436e9 6154
8a9d2e80
JS
6155 /* Initialize sgl lists per host */
6156 lpfc_init_sgl_list(phba);
6157
6158 /* Allocate and initialize active sgl array */
da0436e9
JS
6159 rc = lpfc_init_active_sgl_array(phba);
6160 if (rc) {
6161 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6162 "1430 Failed to initialize sgl list.\n");
8a9d2e80 6163 goto out_destroy_cq_event_pool;
da0436e9 6164 }
da0436e9
JS
6165 rc = lpfc_sli4_init_rpi_hdrs(phba);
6166 if (rc) {
6167 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6168 "1432 Failed to initialize rpi headers.\n");
6169 goto out_free_active_sgl;
6170 }
6171
a93ff37a 6172 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS
6173 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
6174 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
6175 GFP_KERNEL);
6176 if (!phba->fcf.fcf_rr_bmask) {
6177 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6178 "2759 Failed allocate memory for FCF round "
6179 "robin failover bmask\n");
0558056c 6180 rc = -ENOMEM;
0c9ab6f5
JS
6181 goto out_remove_rpi_hdrs;
6182 }
6183
895427bd
JS
6184 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
6185 sizeof(struct lpfc_hba_eq_hdl),
6186 GFP_KERNEL);
6187 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS
6188 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6189 "2572 Failed allocate memory for "
6190 "fast-path per-EQ handle array\n");
6191 rc = -ENOMEM;
6192 goto out_free_fcf_rr_bmask;
da0436e9
JS
6193 }
6194
895427bd
JS
6195 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
6196 sizeof(struct lpfc_vector_map_info),
6197 GFP_KERNEL);
7bb03bbf
JS
6198 if (!phba->sli4_hba.cpu_map) {
6199 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6200 "3327 Failed allocate memory for msi-x "
6201 "interrupt vector mapping\n");
6202 rc = -ENOMEM;
895427bd 6203 goto out_free_hba_eq_hdl;
7bb03bbf 6204 }
b246de17 6205 if (lpfc_used_cpu == NULL) {
895427bd
JS
6206 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
6207 GFP_KERNEL);
b246de17
JS
6208 if (!lpfc_used_cpu) {
6209 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6210 "3335 Failed allocate memory for msi-x "
6211 "interrupt vector mapping\n");
6212 kfree(phba->sli4_hba.cpu_map);
6213 rc = -ENOMEM;
895427bd 6214 goto out_free_hba_eq_hdl;
b246de17
JS
6215 }
6216 for (i = 0; i < lpfc_present_cpu; i++)
6217 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
6218 }
6219
912e3acd
JS
6220 /*
6221 * Enable sr-iov virtual functions if supported and configured
6222 * through the module parameter.
6223 */
6224 if (phba->cfg_sriov_nr_virtfn > 0) {
6225 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6226 phba->cfg_sriov_nr_virtfn);
6227 if (rc) {
6228 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6229 "3020 Requested number of SR-IOV "
6230 "virtual functions (%d) is not "
6231 "supported\n",
6232 phba->cfg_sriov_nr_virtfn);
6233 phba->cfg_sriov_nr_virtfn = 0;
6234 }
6235 }
6236
5248a749 6237 return 0;
da0436e9 6238
895427bd
JS
6239out_free_hba_eq_hdl:
6240 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS
6241out_free_fcf_rr_bmask:
6242 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS
6243out_remove_rpi_hdrs:
6244 lpfc_sli4_remove_rpi_hdrs(phba);
6245out_free_active_sgl:
6246 lpfc_free_active_sgl(phba);
da0436e9
JS
6247out_destroy_cq_event_pool:
6248 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS
6249out_free_bsmbx:
6250 lpfc_destroy_bootstrap_mbox(phba);
6251out_free_mem:
6252 lpfc_mem_free(phba);
6253 return rc;
6254}
6255
6256/**
6257 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6258 * @phba: pointer to lpfc hba data structure.
6259 *
6260 * This routine is invoked to unset the driver internal resources set up
6261 * specific for supporting the SLI-4 HBA device it attached to.
6262 **/
6263static void
6264lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6265{
6266 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6267
7bb03bbf
JS
6268 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6269 kfree(phba->sli4_hba.cpu_map);
6270 phba->sli4_hba.num_present_cpu = 0;
6271 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6272 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6273
da0436e9 6274 /* Free memory allocated for fast-path work queue handles */
895427bd 6275 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS
6276
6277 /* Free the allocated rpi headers. */
6278 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6279 lpfc_sli4_remove_rpis(phba);
da0436e9 6280
0c9ab6f5
JS
6281 /* Free eligible FCF index bmask */
6282 kfree(phba->fcf.fcf_rr_bmask);
6283
da0436e9
JS
6284 /* Free the ELS sgl list */
6285 lpfc_free_active_sgl(phba);
8a9d2e80 6286 lpfc_free_els_sgl_list(phba);
f358dd0c 6287 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6288
da0436e9
JS
6289 /* Free the completion queue EQ event pool */
6290 lpfc_sli4_cq_event_release_all(phba);
6291 lpfc_sli4_cq_event_pool_destroy(phba);
6292
6d368e53
JS
6293 /* Release resource identifiers. */
6294 lpfc_sli4_dealloc_resource_identifiers(phba);
6295
da0436e9
JS
6296 /* Free the bsmbx region. */
6297 lpfc_destroy_bootstrap_mbox(phba);
6298
6299 /* Free the SLI Layer memory with SLI4 HBAs */
6300 lpfc_mem_free_all(phba);
6301
6302 /* Free the current connect table */
6303 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS
6304 &phba->fcf_conn_rec_list, list) {
6305 list_del_init(&conn_entry->list);
da0436e9 6306 kfree(conn_entry);
4d9ab994 6307 }
da0436e9
JS
6308
6309 return;
6310}
6311
6312/**
25985edc 6313 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS
6314 * @phba: The hba struct for which this call is being executed.
6315 * @dev_grp: The HBA PCI-Device group number.
6316 *
6317 * This routine sets up the device INIT interface API function jump table
6318 * in @phba struct.
6319 *
6320 * Returns: 0 - success, -ENODEV - failure.
6321 **/
6322int
6323lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6324{
84d1b006
JS
6325 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6326 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6327 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS
6328 switch (dev_grp) {
6329 case LPFC_PCI_DEV_LP:
6330 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6331 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6332 phba->lpfc_stop_port = lpfc_stop_port_s3;
6333 break;
6334 case LPFC_PCI_DEV_OC:
6335 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6336 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6337 phba->lpfc_stop_port = lpfc_stop_port_s4;
6338 break;
6339 default:
6340 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6341 "1431 Invalid HBA PCI-device group: 0x%x\n",
6342 dev_grp);
6343 return -ENODEV;
6344 break;
6345 }
6346 return 0;
6347}
6348
da0436e9
JS
6349/**
6350 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6351 * @phba: pointer to lpfc hba data structure.
6352 *
6353 * This routine is invoked to set up the driver internal resources after the
6354 * device specific resource setup to support the HBA device it attached to.
6355 *
6356 * Return codes
af901ca1 6357 * 0 - successful
da0436e9
JS
6358 * other values - error
6359 **/
6360static int
6361lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6362{
6363 int error;
6364
6365 /* Startup the kernel thread for this host adapter. */
6366 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6367 "lpfc_worker_%d", phba->brd_no);
6368 if (IS_ERR(phba->worker_thread)) {
6369 error = PTR_ERR(phba->worker_thread);
6370 return error;
3772a991
JS
6371 }
6372
6373 return 0;
6374}
6375
6376/**
6377 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6378 * @phba: pointer to lpfc hba data structure.
6379 *
6380 * This routine is invoked to unset the driver internal resources set up after
6381 * the device specific resource setup for supporting the HBA device it
6382 * attached to.
6383 **/
6384static void
6385lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6386{
6387 /* Stop kernel worker thread */
6388 kthread_stop(phba->worker_thread);
6389}
6390
6391/**
6392 * lpfc_free_iocb_list - Free iocb list.
6393 * @phba: pointer to lpfc hba data structure.
6394 *
6395 * This routine is invoked to free the driver's IOCB list and memory.
6396 **/
6c621a22 6397void
3772a991
JS
6398lpfc_free_iocb_list(struct lpfc_hba *phba)
6399{
6400 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6401
6402 spin_lock_irq(&phba->hbalock);
6403 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6404 &phba->lpfc_iocb_list, list) {
6405 list_del(&iocbq_entry->list);
6406 kfree(iocbq_entry);
6407 phba->total_iocbq_bufs--;
98c9ea5c 6408 }
3772a991
JS
6409 spin_unlock_irq(&phba->hbalock);
6410
6411 return;
6412}
6413
6414/**
6415 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6416 * @phba: pointer to lpfc hba data structure.
6417 *
6418 * This routine is invoked to allocate and initizlize the driver's IOCB
6419 * list and set up the IOCB tag array accordingly.
6420 *
6421 * Return codes
af901ca1 6422 * 0 - successful
3772a991
JS
6423 * other values - error
6424 **/
6c621a22 6425int
3772a991
JS
6426lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6427{
6428 struct lpfc_iocbq *iocbq_entry = NULL;
6429 uint16_t iotag;
6430 int i;
dea3101e
JB
6431
6432 /* Initialize and populate the iocb list per host. */
6433 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6434 for (i = 0; i < iocb_count; i++) {
dd00cc48 6435 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e
JB
6436 if (iocbq_entry == NULL) {
6437 printk(KERN_ERR "%s: only allocated %d iocbs of "
6438 "expected %d count. Unloading driver.\n",
cadbd4a5 6439 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e
JB
6440 goto out_free_iocbq;
6441 }
6442
604a3e30
JB
6443 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6444 if (iotag == 0) {
3772a991 6445 kfree(iocbq_entry);
604a3e30 6446 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6447 "Unloading driver.\n", __func__);
604a3e30
JB
6448 goto out_free_iocbq;
6449 }
6d368e53 6450 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6451 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS
6452
6453 spin_lock_irq(&phba->hbalock);
dea3101e
JB
6454 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6455 phba->total_iocbq_bufs++;
2e0fef85 6456 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
6457 }
6458
3772a991 6459 return 0;
dea3101e 6460
3772a991
JS
6461out_free_iocbq:
6462 lpfc_free_iocb_list(phba);
dea3101e 6463
3772a991
JS
6464 return -ENOMEM;
6465}
5e9d9b82 6466
3772a991 6467/**
8a9d2e80 6468 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6469 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6470 * @sglq_list: pointer to the head of sgl list.
3772a991 6471 *
8a9d2e80 6472 * This routine is invoked to free a give sgl list and memory.
3772a991 6473 **/
8a9d2e80
JS
6474void
6475lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6476{
da0436e9 6477 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS
6478
6479 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6480 list_del(&sglq_entry->list);
6481 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6482 kfree(sglq_entry);
6483 }
6484}
6485
6486/**
6487 * lpfc_free_els_sgl_list - Free els sgl list.
6488 * @phba: pointer to lpfc hba data structure.
6489 *
6490 * This routine is invoked to free the driver's els sgl list and memory.
6491 **/
6492static void
6493lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6494{
da0436e9 6495 LIST_HEAD(sglq_list);
dea3101e 6496
8a9d2e80 6497 /* Retrieve all els sgls from driver list */
da0436e9 6498 spin_lock_irq(&phba->hbalock);
895427bd
JS
6499 spin_lock(&phba->sli4_hba.sgl_list_lock);
6500 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6501 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6502 spin_unlock_irq(&phba->hbalock);
dea3101e 6503
8a9d2e80
JS
6504 /* Now free the sgl list */
6505 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6506}
92d7f7b0 6507
f358dd0c
JS
6508/**
6509 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
6510 * @phba: pointer to lpfc hba data structure.
6511 *
6512 * This routine is invoked to free the driver's nvmet sgl list and memory.
6513 **/
6514static void
6515lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
6516{
6517 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
6518 LIST_HEAD(sglq_list);
6519
6520 /* Retrieve all nvmet sgls from driver list */
6521 spin_lock_irq(&phba->hbalock);
6522 spin_lock(&phba->sli4_hba.sgl_list_lock);
6523 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
6524 spin_unlock(&phba->sli4_hba.sgl_list_lock);
6525 spin_unlock_irq(&phba->hbalock);
6526
6527 /* Now free the sgl list */
6528 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
6529 list_del(&sglq_entry->list);
6530 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
6531 kfree(sglq_entry);
6532 }
4b40d02b
DK
6533
6534 /* Update the nvmet_xri_cnt to reflect no current sgls.
6535 * The next initialization cycle sets the count and allocates
6536 * the sgls over again.
6537 */
6538 phba->sli4_hba.nvmet_xri_cnt = 0;
f358dd0c
JS
6539}
6540
da0436e9
JS
6541/**
6542 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6543 * @phba: pointer to lpfc hba data structure.
6544 *
6545 * This routine is invoked to allocate the driver's active sgl memory.
6546 * This array will hold the sglq_entry's for active IOs.
6547 **/
6548static int
6549lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6550{
6551 int size;
6552 size = sizeof(struct lpfc_sglq *);
6553 size *= phba->sli4_hba.max_cfg_param.max_xri;
6554
6555 phba->sli4_hba.lpfc_sglq_active_list =
6556 kzalloc(size, GFP_KERNEL);
6557 if (!phba->sli4_hba.lpfc_sglq_active_list)
6558 return -ENOMEM;
6559 return 0;
3772a991
JS
6560}
6561
6562/**
da0436e9 6563 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS
6564 * @phba: pointer to lpfc hba data structure.
6565 *
da0436e9
JS
6566 * This routine is invoked to walk through the array of active sglq entries
6567 * and free all of the resources.
6568 * This is just a place holder for now.
3772a991
JS
6569 **/
6570static void
da0436e9 6571lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6572{
da0436e9 6573 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS
6574}
6575
6576/**
da0436e9 6577 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS
6578 * @phba: pointer to lpfc hba data structure.
6579 *
da0436e9
JS
6580 * This routine is invoked to allocate and initizlize the driver's sgl
6581 * list and set up the sgl xritag tag array accordingly.
3772a991 6582 *
3772a991 6583 **/
8a9d2e80 6584static void
da0436e9 6585lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6586{
da0436e9 6587 /* Initialize and populate the sglq list per host/VF. */
895427bd 6588 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 6589 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 6590 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
86c67379 6591 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
da0436e9 6592
8a9d2e80
JS
6593 /* els xri-sgl book keeping */
6594 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6595
8a9d2e80 6596 /* scsi xri-buffer book keeping */
da0436e9 6597 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS
6598
6599 /* nvme xri-buffer book keeping */
6600 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS
6601}
6602
6603/**
6604 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6605 * @phba: pointer to lpfc hba data structure.
6606 *
6607 * This routine is invoked to post rpi header templates to the
88a2cfbb 6608 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6609 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS
6610 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6611 * and should be called only when interrupts are disabled.
da0436e9
JS
6612 *
6613 * Return codes
af901ca1 6614 * 0 - successful
88a2cfbb 6615 * -ERROR - otherwise.
da0436e9
JS
6616 **/
6617int
6618lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6619{
6620 int rc = 0;
da0436e9
JS
6621 struct lpfc_rpi_hdr *rpi_hdr;
6622
6623 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6624 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6625 return rc;
6d368e53
JS
6626 if (phba->sli4_hba.extents_in_use)
6627 return -EIO;
da0436e9
JS
6628
6629 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6630 if (!rpi_hdr) {
6631 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6632 "0391 Error during rpi post operation\n");
6633 lpfc_sli4_remove_rpis(phba);
6634 rc = -ENODEV;
6635 }
6636
6637 return rc;
6638}
6639
6640/**
6641 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6642 * @phba: pointer to lpfc hba data structure.
6643 *
6644 * This routine is invoked to allocate a single 4KB memory region to
6645 * support rpis and stores them in the phba. This single region
6646 * provides support for up to 64 rpis. The region is used globally
6647 * by the device.
6648 *
6649 * Returns:
6650 * A valid rpi hdr on success.
6651 * A NULL pointer on any failure.
6652 **/
6653struct lpfc_rpi_hdr *
6654lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6655{
6656 uint16_t rpi_limit, curr_rpi_range;
6657 struct lpfc_dmabuf *dmabuf;
6658 struct lpfc_rpi_hdr *rpi_hdr;
6659
6d368e53
JS
6660 /*
6661 * If the SLI4 port supports extents, posting the rpi header isn't
6662 * required. Set the expected maximum count and let the actual value
6663 * get set when extents are fully allocated.
6664 */
6665 if (!phba->sli4_hba.rpi_hdrs_in_use)
6666 return NULL;
6667 if (phba->sli4_hba.extents_in_use)
6668 return NULL;
6669
6670 /* The limit on the logical index is just the max_rpi count. */
845d9e8d 6671 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
da0436e9
JS
6672
6673 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6674 /*
6675 * Establish the starting RPI in this header block. The starting
6676 * rpi is normalized to a zero base because the physical rpi is
6677 * port based.
6678 */
97f2ecf1 6679 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS
6680 spin_unlock_irq(&phba->hbalock);
6681
845d9e8d
JS
6682 /* Reached full RPI range */
6683 if (curr_rpi_range == rpi_limit)
6d368e53 6684 return NULL;
845d9e8d 6685
da0436e9
JS
6686 /*
6687 * First allocate the protocol header region for the port. The
6688 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6689 */
6690 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6691 if (!dmabuf)
6692 return NULL;
6693
1aee383d
JP
6694 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6695 LPFC_HDR_TEMPLATE_SIZE,
6696 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
6697 if (!dmabuf->virt) {
6698 rpi_hdr = NULL;
6699 goto err_free_dmabuf;
6700 }
6701
da0436e9
JS
6702 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6703 rpi_hdr = NULL;
6704 goto err_free_coherent;
6705 }
6706
6707 /* Save the rpi header data for cleanup later. */
6708 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6709 if (!rpi_hdr)
6710 goto err_free_coherent;
6711
6712 rpi_hdr->dmabuf = dmabuf;
6713 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6714 rpi_hdr->page_count = 1;
6715 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6716
6717 /* The rpi_hdr stores the logical index only. */
6718 rpi_hdr->start_rpi = curr_rpi_range;
845d9e8d 6719 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
da0436e9
JS
6720 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6721
da0436e9
JS
6722 spin_unlock_irq(&phba->hbalock);
6723 return rpi_hdr;
6724
6725 err_free_coherent:
6726 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6727 dmabuf->virt, dmabuf->phys);
6728 err_free_dmabuf:
6729 kfree(dmabuf);
6730 return NULL;
6731}
6732
6733/**
6734 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6735 * @phba: pointer to lpfc hba data structure.
6736 *
6737 * This routine is invoked to remove all memory resources allocated
6d368e53
JS
6738 * to support rpis for SLI4 ports not supporting extents. This routine
6739 * presumes the caller has released all rpis consumed by fabric or port
6740 * logins and is prepared to have the header pages removed.
da0436e9
JS
6741 **/
6742void
6743lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6744{
6745 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6746
6d368e53
JS
6747 if (!phba->sli4_hba.rpi_hdrs_in_use)
6748 goto exit;
6749
da0436e9
JS
6750 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6751 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6752 list_del(&rpi_hdr->list);
6753 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6754 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6755 kfree(rpi_hdr->dmabuf);
6756 kfree(rpi_hdr);
6757 }
6d368e53
JS
6758 exit:
6759 /* There are no rpis available to the port now. */
6760 phba->sli4_hba.next_rpi = 0;
da0436e9
JS
6761}
6762
6763/**
6764 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6765 * @pdev: pointer to pci device data structure.
6766 *
6767 * This routine is invoked to allocate the driver hba data structure for an
6768 * HBA device. If the allocation is successful, the phba reference to the
6769 * PCI device data structure is set.
6770 *
6771 * Return codes
af901ca1 6772 * pointer to @phba - successful
da0436e9
JS
6773 * NULL - error
6774 **/
6775static struct lpfc_hba *
6776lpfc_hba_alloc(struct pci_dev *pdev)
6777{
6778 struct lpfc_hba *phba;
6779
6780 /* Allocate memory for HBA structure */
6781 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6782 if (!phba) {
e34ccdfe 6783 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS
6784 return NULL;
6785 }
6786
6787 /* Set reference to PCI device in HBA structure */
6788 phba->pcidev = pdev;
6789
6790 /* Assign an unused board number */
6791 phba->brd_no = lpfc_get_instance();
6792 if (phba->brd_no < 0) {
6793 kfree(phba);
6794 return NULL;
6795 }
65791f1f 6796 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6797
4fede78f 6798 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS
6799 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6800
da0436e9
JS
6801 return phba;
6802}
6803
6804/**
6805 * lpfc_hba_free - Free driver hba data structure with a device.
6806 * @phba: pointer to lpfc hba data structure.
6807 *
6808 * This routine is invoked to free the driver hba data structure with an
6809 * HBA device.
6810 **/
6811static void
6812lpfc_hba_free(struct lpfc_hba *phba)
6813{
6814 /* Release the driver assigned board number */
6815 idr_remove(&lpfc_hba_index, phba->brd_no);
6816
895427bd
JS
6817 /* Free memory allocated with sli3 rings */
6818 kfree(phba->sli.sli3_ring);
6819 phba->sli.sli3_ring = NULL;
2a76a283 6820
da0436e9
JS
6821 kfree(phba);
6822 return;
6823}
6824
6825/**
6826 * lpfc_create_shost - Create hba physical port with associated scsi host.
6827 * @phba: pointer to lpfc hba data structure.
6828 *
6829 * This routine is invoked to create HBA physical port and associate a SCSI
6830 * host with it.
6831 *
6832 * Return codes
af901ca1 6833 * 0 - successful
da0436e9
JS
6834 * other values - error
6835 **/
6836static int
6837lpfc_create_shost(struct lpfc_hba *phba)
6838{
6839 struct lpfc_vport *vport;
6840 struct Scsi_Host *shost;
6841
6842 /* Initialize HBA FC structure */
6843 phba->fc_edtov = FF_DEF_EDTOV;
6844 phba->fc_ratov = FF_DEF_RATOV;
6845 phba->fc_altov = FF_DEF_ALTOV;
6846 phba->fc_arbtov = FF_DEF_ARBTOV;
6847
d7c47992 6848 atomic_set(&phba->sdev_cnt, 0);
2cee7808
JS
6849 atomic_set(&phba->fc4ScsiInputRequests, 0);
6850 atomic_set(&phba->fc4ScsiOutputRequests, 0);
6851 atomic_set(&phba->fc4ScsiControlRequests, 0);
6852 atomic_set(&phba->fc4ScsiIoCmpls, 0);
6853 atomic_set(&phba->fc4NvmeInputRequests, 0);
6854 atomic_set(&phba->fc4NvmeOutputRequests, 0);
6855 atomic_set(&phba->fc4NvmeControlRequests, 0);
6856 atomic_set(&phba->fc4NvmeIoCmpls, 0);
6857 atomic_set(&phba->fc4NvmeLsRequests, 0);
6858 atomic_set(&phba->fc4NvmeLsCmpls, 0);
da0436e9
JS
6859 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6860 if (!vport)
6861 return -ENODEV;
6862
6863 shost = lpfc_shost_from_vport(vport);
6864 phba->pport = vport;
2ea259ee 6865
f358dd0c
JS
6866 if (phba->nvmet_support) {
6867 /* Only 1 vport (pport) will support NVME target */
6868 if (phba->txrdy_payload_pool == NULL) {
771db5c0
RP
6869 phba->txrdy_payload_pool = dma_pool_create(
6870 "txrdy_pool", &phba->pcidev->dev,
f358dd0c
JS
6871 TXRDY_PAYLOAD_LEN, 16, 0);
6872 if (phba->txrdy_payload_pool) {
6873 phba->targetport = NULL;
6874 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
6875 lpfc_printf_log(phba, KERN_INFO,
6876 LOG_INIT | LOG_NVME_DISC,
6877 "6076 NVME Target Found\n");
6878 }
6879 }
6880 }
6881
da0436e9
JS
6882 lpfc_debugfs_initialize(vport);
6883 /* Put reference to SCSI host to driver's device private data */
6884 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6885
4258e98e
JS
6886 /*
6887 * At this point we are fully registered with PSA. In addition,
6888 * any initial discovery should be completed.
6889 */
6890 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS
6891 if (phba->cfg_enable_SmartSAN ||
6892 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS
6893
6894 /* Setup appropriate attribute masks */
6895 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6896 if (phba->cfg_enable_SmartSAN)
4258e98e
JS
6897 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6898 else
6899 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6900 }
3772a991
JS
6901 return 0;
6902}
db2378e0 6903
3772a991
JS
6904/**
6905 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6906 * @phba: pointer to lpfc hba data structure.
6907 *
6908 * This routine is invoked to destroy HBA physical port and the associated
6909 * SCSI host.
6910 **/
6911static void
6912lpfc_destroy_shost(struct lpfc_hba *phba)
6913{
6914 struct lpfc_vport *vport = phba->pport;
6915
6916 /* Destroy physical port that associated with the SCSI host */
6917 destroy_port(vport);
6918
6919 return;
6920}
6921
6922/**
6923 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6924 * @phba: pointer to lpfc hba data structure.
6925 * @shost: the shost to be used to detect Block guard settings.
6926 *
6927 * This routine sets up the local Block guard protocol settings for @shost.
6928 * This routine also allocates memory for debugging bg buffers.
6929 **/
6930static void
6931lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6932{
bbeb79b9
JS
6933 uint32_t old_mask;
6934 uint32_t old_guard;
6935
3772a991 6936 int pagecnt = 10;
b3b98b74 6937 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS
6938 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6939 "1478 Registering BlockGuard with the "
6940 "SCSI layer\n");
bbeb79b9 6941
b3b98b74
JS
6942 old_mask = phba->cfg_prot_mask;
6943 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS
6944
6945 /* Only allow supported values */
b3b98b74 6946 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS
6947 SHOST_DIX_TYPE0_PROTECTION |
6948 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS
6949 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6950 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS
6951
6952 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS
6953 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6954 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6955
b3b98b74
JS
6956 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6957 if ((old_mask != phba->cfg_prot_mask) ||
6958 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS
6959 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6960 "1475 Registering BlockGuard with the "
6961 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS
6962 phba->cfg_prot_mask,
6963 phba->cfg_prot_guard);
bbeb79b9 6964
b3b98b74
JS
6965 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6966 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS
6967 } else
6968 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6969 "1479 Not Registering BlockGuard with the SCSI "
6970 "layer, Bad protection parameters: %d %d\n",
6971 old_mask, old_guard);
3772a991 6972 }
bbeb79b9 6973
3772a991
JS
6974 if (!_dump_buf_data) {
6975 while (pagecnt) {
6976 spin_lock_init(&_dump_buf_lock);
6977 _dump_buf_data =
6978 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6979 if (_dump_buf_data) {
6a9c52cf
JS
6980 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6981 "9043 BLKGRD: allocated %d pages for "
3772a991
JS
6982 "_dump_buf_data at 0x%p\n",
6983 (1 << pagecnt), _dump_buf_data);
6984 _dump_buf_data_order = pagecnt;
6985 memset(_dump_buf_data, 0,
6986 ((1 << PAGE_SHIFT) << pagecnt));
6987 break;
6988 } else
6989 --pagecnt;
6990 }
6991 if (!_dump_buf_data_order)
6a9c52cf
JS
6992 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6993 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS
6994 "memory for hexdump\n");
6995 } else
6a9c52cf
JS
6996 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6997 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS
6998 "\n", _dump_buf_data);
6999 if (!_dump_buf_dif) {
7000 while (pagecnt) {
7001 _dump_buf_dif =
7002 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
7003 if (_dump_buf_dif) {
6a9c52cf
JS
7004 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7005 "9046 BLKGRD: allocated %d pages for "
3772a991
JS
7006 "_dump_buf_dif at 0x%p\n",
7007 (1 << pagecnt), _dump_buf_dif);
7008 _dump_buf_dif_order = pagecnt;
7009 memset(_dump_buf_dif, 0,
7010 ((1 << PAGE_SHIFT) << pagecnt));
7011 break;
7012 } else
7013 --pagecnt;
7014 }
7015 if (!_dump_buf_dif_order)
6a9c52cf
JS
7016 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7017 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS
7018 "memory for hexdump\n");
7019 } else
6a9c52cf
JS
7020 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7021 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS
7022 _dump_buf_dif);
7023}
7024
7025/**
7026 * lpfc_post_init_setup - Perform necessary device post initialization setup.
7027 * @phba: pointer to lpfc hba data structure.
7028 *
7029 * This routine is invoked to perform all the necessary post initialization
7030 * setup for the device.
7031 **/
7032static void
7033lpfc_post_init_setup(struct lpfc_hba *phba)
7034{
7035 struct Scsi_Host *shost;
7036 struct lpfc_adapter_event_header adapter_event;
7037
7038 /* Get the default values for Model Name and Description */
7039 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
7040
7041 /*
7042 * hba setup may have changed the hba_queue_depth so we need to
7043 * adjust the value of can_queue.
7044 */
7045 shost = pci_get_drvdata(phba->pcidev);
7046 shost->can_queue = phba->cfg_hba_queue_depth - 10;
7047 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
7048 lpfc_setup_bg(phba, shost);
7049
7050 lpfc_host_attrib_init(shost);
7051
7052 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
7053 spin_lock_irq(shost->host_lock);
7054 lpfc_poll_start_timer(phba);
7055 spin_unlock_irq(shost->host_lock);
7056 }
7057
7058 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7059 "0428 Perform SCSI scan\n");
7060 /* Send board arrival event to upper layer */
7061 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
7062 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
7063 fc_host_post_vendor_event(shost, fc_get_event_number(),
7064 sizeof(adapter_event),
7065 (char *) &adapter_event,
7066 LPFC_NL_VENDOR_ID);
7067 return;
7068}
7069
7070/**
7071 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
7072 * @phba: pointer to lpfc hba data structure.
7073 *
7074 * This routine is invoked to set up the PCI device memory space for device
7075 * with SLI-3 interface spec.
7076 *
7077 * Return codes
af901ca1 7078 * 0 - successful
3772a991
JS
7079 * other values - error
7080 **/
7081static int
7082lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
7083{
7084 struct pci_dev *pdev;
7085 unsigned long bar0map_len, bar2map_len;
7086 int i, hbq_count;
7087 void *ptr;
7088 int error = -ENODEV;
7089
7090 /* Obtain PCI device reference */
7091 if (!phba->pcidev)
7092 return error;
7093 else
7094 pdev = phba->pcidev;
7095
7096 /* Set the device DMA mask size */
8e68597d
MR
7097 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
7098 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
7099 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
7100 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 7101 return error;
8e68597d
MR
7102 }
7103 }
3772a991
JS
7104
7105 /* Get the bus address of Bar0 and Bar2 and the number of bytes
7106 * required by each mapping.
7107 */
7108 phba->pci_bar0_map = pci_resource_start(pdev, 0);
7109 bar0map_len = pci_resource_len(pdev, 0);
7110
7111 phba->pci_bar2_map = pci_resource_start(pdev, 2);
7112 bar2map_len = pci_resource_len(pdev, 2);
7113
7114 /* Map HBA SLIM to a kernel virtual address. */
7115 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
7116 if (!phba->slim_memmap_p) {
7117 dev_printk(KERN_ERR, &pdev->dev,
7118 "ioremap failed for SLIM memory.\n");
7119 goto out;
7120 }
7121
7122 /* Map HBA Control Registers to a kernel virtual address. */
7123 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
7124 if (!phba->ctrl_regs_memmap_p) {
7125 dev_printk(KERN_ERR, &pdev->dev,
7126 "ioremap failed for HBA control registers.\n");
7127 goto out_iounmap_slim;
7128 }
7129
7130 /* Allocate memory for SLI-2 structures */
1aee383d
JP
7131 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7132 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS
7133 if (!phba->slim2p.virt)
7134 goto out_iounmap;
7135
3772a991 7136 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS
7137 phba->mbox_ext = (phba->slim2p.virt +
7138 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS
7139 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
7140 phba->IOCBs = (phba->slim2p.virt +
7141 offsetof(struct lpfc_sli2_slim, IOCBs));
7142
7143 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
7144 lpfc_sli_hbq_size(),
7145 &phba->hbqslimp.phys,
7146 GFP_KERNEL);
7147 if (!phba->hbqslimp.virt)
7148 goto out_free_slim;
7149
7150 hbq_count = lpfc_sli_hbq_count();
7151 ptr = phba->hbqslimp.virt;
7152 for (i = 0; i < hbq_count; ++i) {
7153 phba->hbqs[i].hbq_virt = ptr;
7154 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
7155 ptr += (lpfc_hbq_defs[i]->entry_count *
7156 sizeof(struct lpfc_hbq_entry));
7157 }
7158 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
7159 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
7160
7161 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
7162
3772a991
JS
7163 phba->MBslimaddr = phba->slim_memmap_p;
7164 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
7165 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
7166 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
7167 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
7168
7169 return 0;
7170
7171out_free_slim:
7172 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7173 phba->slim2p.virt, phba->slim2p.phys);
7174out_iounmap:
7175 iounmap(phba->ctrl_regs_memmap_p);
7176out_iounmap_slim:
7177 iounmap(phba->slim_memmap_p);
7178out:
7179 return error;
7180}
7181
7182/**
7183 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
7184 * @phba: pointer to lpfc hba data structure.
7185 *
7186 * This routine is invoked to unset the PCI device memory space for device
7187 * with SLI-3 interface spec.
7188 **/
7189static void
7190lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7191{
7192 struct pci_dev *pdev;
7193
7194 /* Obtain PCI device reference */
7195 if (!phba->pcidev)
7196 return;
7197 else
7198 pdev = phba->pcidev;
7199
7200 /* Free coherent DMA memory allocated */
7201 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7202 phba->hbqslimp.virt, phba->hbqslimp.phys);
7203 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7204 phba->slim2p.virt, phba->slim2p.phys);
7205
7206 /* I/O memory unmap */
7207 iounmap(phba->ctrl_regs_memmap_p);
7208 iounmap(phba->slim_memmap_p);
7209
7210 return;
7211}
7212
7213/**
da0436e9 7214 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS
7215 * @phba: pointer to lpfc hba data structure.
7216 *
da0436e9
JS
7217 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7218 * done and check status.
3772a991 7219 *
da0436e9 7220 * Return 0 if successful, otherwise -ENODEV.
3772a991 7221 **/
da0436e9
JS
7222int
7223lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 7224{
2fcee4bf
JS
7225 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7226 struct lpfc_register reg_data;
7227 int i, port_error = 0;
7228 uint32_t if_type;
3772a991 7229
9940b97b
JS
7230 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7231 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 7232 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 7233 return -ENODEV;
3772a991 7234
da0436e9
JS
7235 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7236 for (i = 0; i < 3000; i++) {
9940b97b
JS
7237 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7238 &portsmphr_reg.word0) ||
7239 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 7240 /* Port has a fatal POST error, break out */
da0436e9
JS
7241 port_error = -ENODEV;
7242 break;
7243 }
2fcee4bf
JS
7244 if (LPFC_POST_STAGE_PORT_READY ==
7245 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 7246 break;
da0436e9 7247 msleep(10);
3772a991
JS
7248 }
7249
2fcee4bf
JS
7250 /*
7251 * If there was a port error during POST, then don't proceed with
7252 * other register reads as the data may not be valid. Just exit.
7253 */
7254 if (port_error) {
da0436e9 7255 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
7256 "1408 Port Failed POST - portsmphr=0x%x, "
7257 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7258 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7259 portsmphr_reg.word0,
7260 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7261 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7262 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7263 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7264 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7265 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7266 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7267 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7268 } else {
28baac74 7269 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS
7270 "2534 Device Info: SLIFamily=0x%x, "
7271 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7272 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS
7273 bf_get(lpfc_sli_intf_sli_family,
7274 &phba->sli4_hba.sli_intf),
7275 bf_get(lpfc_sli_intf_slirev,
7276 &phba->sli4_hba.sli_intf),
085c647c
JS
7277 bf_get(lpfc_sli_intf_if_type,
7278 &phba->sli4_hba.sli_intf),
7279 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7280 &phba->sli4_hba.sli_intf),
085c647c
JS
7281 bf_get(lpfc_sli_intf_sli_hint2,
7282 &phba->sli4_hba.sli_intf),
7283 bf_get(lpfc_sli_intf_func_type,
28baac74 7284 &phba->sli4_hba.sli_intf));
2fcee4bf
JS
7285 /*
7286 * Check for other Port errors during the initialization
7287 * process. Fail the load if the port did not come up
7288 * correctly.
7289 */
7290 if_type = bf_get(lpfc_sli_intf_if_type,
7291 &phba->sli4_hba.sli_intf);
7292 switch (if_type) {
7293 case LPFC_SLI_INTF_IF_TYPE_0:
7294 phba->sli4_hba.ue_mask_lo =
7295 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7296 phba->sli4_hba.ue_mask_hi =
7297 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7298 uerrlo_reg.word0 =
7299 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7300 uerrhi_reg.word0 =
7301 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7302 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7303 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7304 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7305 "1422 Unrecoverable Error "
7306 "Detected during POST "
7307 "uerr_lo_reg=0x%x, "
7308 "uerr_hi_reg=0x%x, "
7309 "ue_mask_lo_reg=0x%x, "
7310 "ue_mask_hi_reg=0x%x\n",
7311 uerrlo_reg.word0,
7312 uerrhi_reg.word0,
7313 phba->sli4_hba.ue_mask_lo,
7314 phba->sli4_hba.ue_mask_hi);
7315 port_error = -ENODEV;
7316 }
7317 break;
7318 case LPFC_SLI_INTF_IF_TYPE_2:
7319 /* Final checks. The port status should be clean. */
9940b97b
JS
7320 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7321 &reg_data.word0) ||
0558056c
JS
7322 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7323 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS
7324 phba->work_status[0] =
7325 readl(phba->sli4_hba.u.if_type2.
7326 ERR1regaddr);
7327 phba->work_status[1] =
7328 readl(phba->sli4_hba.u.if_type2.
7329 ERR2regaddr);
7330 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS
7331 "2888 Unrecoverable port error "
7332 "following POST: port status reg "
7333 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS
7334 "error 1=0x%x, error 2=0x%x\n",
7335 reg_data.word0,
7336 portsmphr_reg.word0,
7337 phba->work_status[0],
7338 phba->work_status[1]);
7339 port_error = -ENODEV;
7340 }
7341 break;
7342 case LPFC_SLI_INTF_IF_TYPE_1:
7343 default:
7344 break;
7345 }
28baac74 7346 }
da0436e9
JS
7347 return port_error;
7348}
3772a991 7349
da0436e9
JS
7350/**
7351 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7352 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7353 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS
7354 *
7355 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7356 * memory map.
7357 **/
7358static void
2fcee4bf
JS
7359lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7360{
7361 switch (if_type) {
7362 case LPFC_SLI_INTF_IF_TYPE_0:
7363 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7364 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7365 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7366 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7367 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7368 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7369 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7370 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7371 phba->sli4_hba.SLIINTFregaddr =
7372 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7373 break;
7374 case LPFC_SLI_INTF_IF_TYPE_2:
0cf07f84
JS
7375 phba->sli4_hba.u.if_type2.EQDregaddr =
7376 phba->sli4_hba.conf_regs_memmap_p +
7377 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
2fcee4bf 7378 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS
7379 phba->sli4_hba.conf_regs_memmap_p +
7380 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7381 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS
7382 phba->sli4_hba.conf_regs_memmap_p +
7383 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7384 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS
7385 phba->sli4_hba.conf_regs_memmap_p +
7386 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7387 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS
7388 phba->sli4_hba.conf_regs_memmap_p +
7389 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS
7390 phba->sli4_hba.SLIINTFregaddr =
7391 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7392 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS
7393 phba->sli4_hba.conf_regs_memmap_p +
7394 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7395 phba->sli4_hba.RQDBregaddr =
962bc51b
JS
7396 phba->sli4_hba.conf_regs_memmap_p +
7397 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7398 phba->sli4_hba.WQDBregaddr =
962bc51b
JS
7399 phba->sli4_hba.conf_regs_memmap_p +
7400 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS
7401 phba->sli4_hba.EQCQDBregaddr =
7402 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
7403 phba->sli4_hba.MQDBregaddr =
7404 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
7405 phba->sli4_hba.BMBXregaddr =
7406 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
7407 break;
7408 case LPFC_SLI_INTF_IF_TYPE_1:
7409 default:
7410 dev_printk(KERN_ERR, &phba->pcidev->dev,
7411 "FATAL - unsupported SLI4 interface type - %d\n",
7412 if_type);
7413 break;
7414 }
da0436e9 7415}
3772a991 7416
da0436e9
JS
7417/**
7418 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
7419 * @phba: pointer to lpfc hba data structure.
7420 *
7421 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
7422 * memory map.
7423 **/
7424static void
7425lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
7426{
2fcee4bf
JS
7427 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
7428 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 7429 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7430 LPFC_HST_ISR0;
da0436e9 7431 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7432 LPFC_HST_IMR0;
da0436e9 7433 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7434 LPFC_HST_ISCR0;
3772a991
JS
7435}
7436
7437/**
da0436e9 7438 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 7439 * @phba: pointer to lpfc hba data structure.
da0436e9 7440 * @vf: virtual function number
3772a991 7441 *
da0436e9
JS
7442 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
7443 * based on the given viftual function number, @vf.
7444 *
7445 * Return 0 if successful, otherwise -ENODEV.
3772a991 7446 **/
da0436e9
JS
7447static int
7448lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7449{
da0436e9
JS
7450 if (vf > LPFC_VIR_FUNC_MAX)
7451 return -ENODEV;
3772a991 7452
da0436e9 7453 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7454 vf * LPFC_VFR_PAGE_SIZE +
7455 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7456 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7457 vf * LPFC_VFR_PAGE_SIZE +
7458 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS
7459 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7460 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7461 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7462 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7463 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7464 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7465 return 0;
3772a991
JS
7466}
7467
7468/**
da0436e9 7469 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS
7470 * @phba: pointer to lpfc hba data structure.
7471 *
da0436e9
JS
7472 * This routine is invoked to create the bootstrap mailbox
7473 * region consistent with the SLI-4 interface spec. This
7474 * routine allocates all memory necessary to communicate
7475 * mailbox commands to the port and sets up all alignment
7476 * needs. No locks are expected to be held when calling
7477 * this routine.
3772a991
JS
7478 *
7479 * Return codes
af901ca1 7480 * 0 - successful
d439d286 7481 * -ENOMEM - could not allocated memory.
da0436e9 7482 **/
3772a991 7483static int
da0436e9 7484lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7485{
da0436e9
JS
7486 uint32_t bmbx_size;
7487 struct lpfc_dmabuf *dmabuf;
7488 struct dma_address *dma_address;
7489 uint32_t pa_addr;
7490 uint64_t phys_addr;
7491
7492 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7493 if (!dmabuf)
7494 return -ENOMEM;
3772a991 7495
da0436e9
JS
7496 /*
7497 * The bootstrap mailbox region is comprised of 2 parts
7498 * plus an alignment restriction of 16 bytes.
7499 */
7500 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP
7501 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7502 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
7503 if (!dmabuf->virt) {
7504 kfree(dmabuf);
7505 return -ENOMEM;
3772a991
JS
7506 }
7507
da0436e9
JS
7508 /*
7509 * Initialize the bootstrap mailbox pointers now so that the register
7510 * operations are simple later. The mailbox dma address is required
7511 * to be 16-byte aligned. Also align the virtual memory as each
7512 * maibox is copied into the bmbx mailbox region before issuing the
7513 * command to the port.
7514 */
7515 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7516 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7517
7518 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7519 LPFC_ALIGN_16_BYTE);
7520 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7521 LPFC_ALIGN_16_BYTE);
7522
7523 /*
7524 * Set the high and low physical addresses now. The SLI4 alignment
7525 * requirement is 16 bytes and the mailbox is posted to the port
7526 * as two 30-bit addresses. The other data is a bit marking whether
7527 * the 30-bit address is the high or low address.
7528 * Upcast bmbx aphys to 64bits so shift instruction compiles
7529 * clean on 32 bit machines.
7530 */
7531 dma_address = &phba->sli4_hba.bmbx.dma_address;
7532 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7533 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7534 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7535 LPFC_BMBX_BIT1_ADDR_HI);
7536
7537 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7538 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7539 LPFC_BMBX_BIT1_ADDR_LO);
7540 return 0;
3772a991
JS
7541}
7542
7543/**
da0436e9 7544 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS
7545 * @phba: pointer to lpfc hba data structure.
7546 *
da0436e9
JS
7547 * This routine is invoked to teardown the bootstrap mailbox
7548 * region and release all host resources. This routine requires
7549 * the caller to ensure all mailbox commands recovered, no
7550 * additional mailbox comands are sent, and interrupts are disabled
7551 * before calling this routine.
7552 *
7553 **/
3772a991 7554static void
da0436e9 7555lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7556{
da0436e9
JS
7557 dma_free_coherent(&phba->pcidev->dev,
7558 phba->sli4_hba.bmbx.bmbx_size,
7559 phba->sli4_hba.bmbx.dmabuf->virt,
7560 phba->sli4_hba.bmbx.dmabuf->phys);
7561
7562 kfree(phba->sli4_hba.bmbx.dmabuf);
7563 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS
7564}
7565
7566/**
da0436e9 7567 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS
7568 * @phba: pointer to lpfc hba data structure.
7569 *
da0436e9
JS
7570 * This routine is invoked to read the configuration parameters from the HBA.
7571 * The configuration parameters are used to set the base and maximum values
7572 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7573 * allocation for the port.
3772a991
JS
7574 *
7575 * Return codes
af901ca1 7576 * 0 - successful
25985edc 7577 * -ENOMEM - No available memory
d439d286 7578 * -EIO - The mailbox failed to complete successfully.
3772a991 7579 **/
ff78d8f9 7580int
da0436e9 7581lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7582{
da0436e9
JS
7583 LPFC_MBOXQ_t *pmb;
7584 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS
7585 union lpfc_sli4_cfg_shdr *shdr;
7586 uint32_t shdr_status, shdr_add_status;
7587 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7588 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7589 char *pdesc_0;
c691816e
JS
7590 uint16_t forced_link_speed;
7591 uint32_t if_type;
8aa134a8 7592 int length, i, rc = 0, rc2;
3772a991 7593
da0436e9
JS
7594 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7595 if (!pmb) {
7596 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7597 "2011 Unable to allocate memory for issuing "
7598 "SLI_CONFIG_SPECIAL mailbox command\n");
7599 return -ENOMEM;
3772a991
JS
7600 }
7601
da0436e9 7602 lpfc_read_config(phba, pmb);
3772a991 7603
da0436e9
JS
7604 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7605 if (rc != MBX_SUCCESS) {
7606 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7607 "2012 Mailbox failed , mbxCmd x%x "
7608 "READ_CONFIG, mbxStatus x%x\n",
7609 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7610 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7611 rc = -EIO;
7612 } else {
7613 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS
7614 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7615 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7616 phba->sli4_hba.lnk_info.lnk_tp =
7617 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7618 phba->sli4_hba.lnk_info.lnk_no =
7619 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7620 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7621 "3081 lnk_type:%d, lnk_numb:%d\n",
7622 phba->sli4_hba.lnk_info.lnk_tp,
7623 phba->sli4_hba.lnk_info.lnk_no);
7624 } else
7625 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7626 "3082 Mailbox (x%x) returned ldv:x0\n",
7627 bf_get(lpfc_mqe_command, &pmb->u.mqe));
6d368e53
JS
7628 phba->sli4_hba.extents_in_use =
7629 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS
7630 phba->sli4_hba.max_cfg_param.max_xri =
7631 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7632 phba->sli4_hba.max_cfg_param.xri_base =
7633 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7634 phba->sli4_hba.max_cfg_param.max_vpi =
7635 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7636 phba->sli4_hba.max_cfg_param.vpi_base =
7637 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7638 phba->sli4_hba.max_cfg_param.max_rpi =
7639 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7640 phba->sli4_hba.max_cfg_param.rpi_base =
7641 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7642 phba->sli4_hba.max_cfg_param.max_vfi =
7643 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7644 phba->sli4_hba.max_cfg_param.vfi_base =
7645 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7646 phba->sli4_hba.max_cfg_param.max_fcfi =
7647 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS
7648 phba->sli4_hba.max_cfg_param.max_eq =
7649 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7650 phba->sli4_hba.max_cfg_param.max_rq =
7651 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7652 phba->sli4_hba.max_cfg_param.max_wq =
7653 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7654 phba->sli4_hba.max_cfg_param.max_cq =
7655 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7656 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7657 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7658 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7659 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS
7660 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7661 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS
7662 phba->max_vports = phba->max_vpi;
7663 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS
7664 "2003 cfg params Extents? %d "
7665 "XRI(B:%d M:%d), "
da0436e9
JS
7666 "VPI(B:%d M:%d) "
7667 "VFI(B:%d M:%d) "
7668 "RPI(B:%d M:%d) "
2ea259ee 7669 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7670 phba->sli4_hba.extents_in_use,
da0436e9
JS
7671 phba->sli4_hba.max_cfg_param.xri_base,
7672 phba->sli4_hba.max_cfg_param.max_xri,
7673 phba->sli4_hba.max_cfg_param.vpi_base,
7674 phba->sli4_hba.max_cfg_param.max_vpi,
7675 phba->sli4_hba.max_cfg_param.vfi_base,
7676 phba->sli4_hba.max_cfg_param.max_vfi,
7677 phba->sli4_hba.max_cfg_param.rpi_base,
7678 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS
7679 phba->sli4_hba.max_cfg_param.max_fcfi,
7680 phba->sli4_hba.max_cfg_param.max_eq,
7681 phba->sli4_hba.max_cfg_param.max_cq,
7682 phba->sli4_hba.max_cfg_param.max_wq,
7683 phba->sli4_hba.max_cfg_param.max_rq);
7684
3772a991 7685 }
912e3acd
JS
7686
7687 if (rc)
7688 goto read_cfg_out;
da0436e9 7689
c691816e
JS
7690 /* Update link speed if forced link speed is supported */
7691 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7692 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7693 forced_link_speed =
7694 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7695 if (forced_link_speed) {
7696 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7697
7698 switch (forced_link_speed) {
7699 case LINK_SPEED_1G:
7700 phba->cfg_link_speed =
7701 LPFC_USER_LINK_SPEED_1G;
7702 break;
7703 case LINK_SPEED_2G:
7704 phba->cfg_link_speed =
7705 LPFC_USER_LINK_SPEED_2G;
7706 break;
7707 case LINK_SPEED_4G:
7708 phba->cfg_link_speed =
7709 LPFC_USER_LINK_SPEED_4G;
7710 break;
7711 case LINK_SPEED_8G:
7712 phba->cfg_link_speed =
7713 LPFC_USER_LINK_SPEED_8G;
7714 break;
7715 case LINK_SPEED_10G:
7716 phba->cfg_link_speed =
7717 LPFC_USER_LINK_SPEED_10G;
7718 break;
7719 case LINK_SPEED_16G:
7720 phba->cfg_link_speed =
7721 LPFC_USER_LINK_SPEED_16G;
7722 break;
7723 case LINK_SPEED_32G:
7724 phba->cfg_link_speed =
7725 LPFC_USER_LINK_SPEED_32G;
7726 break;
7727 case 0xffff:
7728 phba->cfg_link_speed =
7729 LPFC_USER_LINK_SPEED_AUTO;
7730 break;
7731 default:
7732 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7733 "0047 Unrecognized link "
7734 "speed : %d\n",
7735 forced_link_speed);
7736 phba->cfg_link_speed =
7737 LPFC_USER_LINK_SPEED_AUTO;
7738 }
7739 }
7740 }
7741
da0436e9 7742 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
7743 length = phba->sli4_hba.max_cfg_param.max_xri -
7744 lpfc_sli4_get_els_iocb_cnt(phba);
7745 if (phba->cfg_hba_queue_depth > length) {
7746 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7747 "3361 HBA queue depth changed from %d to %d\n",
7748 phba->cfg_hba_queue_depth, length);
7749 phba->cfg_hba_queue_depth = length;
7750 }
912e3acd
JS
7751
7752 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7753 LPFC_SLI_INTF_IF_TYPE_2)
7754 goto read_cfg_out;
7755
7756 /* get the pf# and vf# for SLI4 if_type 2 port */
7757 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7758 sizeof(struct lpfc_sli4_cfg_mhdr));
7759 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7760 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7761 length, LPFC_SLI4_MBX_EMBED);
7762
8aa134a8 7763 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS
7764 shdr = (union lpfc_sli4_cfg_shdr *)
7765 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7766 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7767 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7768 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS
7769 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7770 "3026 Mailbox failed , mbxCmd x%x "
7771 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7772 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7773 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS
7774 goto read_cfg_out;
7775 }
7776
7777 /* search for fc_fcoe resrouce descriptor */
7778 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7779
8aa134a8
JS
7780 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7781 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7782 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7783 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7784 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7785 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7786 goto read_cfg_out;
7787
912e3acd 7788 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7789 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7790 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7791 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS
7792 phba->sli4_hba.iov.pf_number =
7793 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7794 phba->sli4_hba.iov.vf_number =
7795 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7796 break;
7797 }
7798 }
7799
7800 if (i < LPFC_RSRC_DESC_MAX_NUM)
7801 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7802 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7803 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7804 phba->sli4_hba.iov.vf_number);
8aa134a8 7805 else
912e3acd
JS
7806 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7807 "3028 GET_FUNCTION_CONFIG: failed to find "
7808 "Resrouce Descriptor:x%x\n",
7809 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS
7810
7811read_cfg_out:
7812 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7813 return rc;
3772a991
JS
7814}
7815
7816/**
2fcee4bf 7817 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS
7818 * @phba: pointer to lpfc hba data structure.
7819 *
2fcee4bf
JS
7820 * This routine is invoked to setup the port-side endian order when
7821 * the port if_type is 0. This routine has no function for other
7822 * if_types.
da0436e9
JS
7823 *
7824 * Return codes
af901ca1 7825 * 0 - successful
25985edc 7826 * -ENOMEM - No available memory
d439d286 7827 * -EIO - The mailbox failed to complete successfully.
3772a991 7828 **/
da0436e9
JS
7829static int
7830lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7831{
da0436e9 7832 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7833 uint32_t if_type, rc = 0;
da0436e9
JS
7834 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7835 HOST_ENDIAN_HIGH_WORD1};
3772a991 7836
2fcee4bf
JS
7837 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7838 switch (if_type) {
7839 case LPFC_SLI_INTF_IF_TYPE_0:
7840 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7841 GFP_KERNEL);
7842 if (!mboxq) {
7843 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7844 "0492 Unable to allocate memory for "
7845 "issuing SLI_CONFIG_SPECIAL mailbox "
7846 "command\n");
7847 return -ENOMEM;
7848 }
3772a991 7849
2fcee4bf
JS
7850 /*
7851 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7852 * two words to contain special data values and no other data.
7853 */
7854 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7855 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7856 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7857 if (rc != MBX_SUCCESS) {
7858 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7859 "0493 SLI_CONFIG_SPECIAL mailbox "
7860 "failed with status x%x\n",
7861 rc);
7862 rc = -EIO;
7863 }
7864 mempool_free(mboxq, phba->mbox_mem_pool);
7865 break;
7866 case LPFC_SLI_INTF_IF_TYPE_2:
7867 case LPFC_SLI_INTF_IF_TYPE_1:
7868 default:
7869 break;
da0436e9 7870 }
da0436e9 7871 return rc;
3772a991
JS
7872}
7873
7874/**
895427bd 7875 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS
7876 * @phba: pointer to lpfc hba data structure.
7877 *
895427bd
JS
7878 * This routine is invoked to check the user settable queue counts for EQs.
7879 * After this routine is called the counts will be set to valid values that
5350d872
JS
7880 * adhere to the constraints of the system's interrupt vectors and the port's
7881 * queue resources.
da0436e9
JS
7882 *
7883 * Return codes
af901ca1 7884 * 0 - successful
25985edc 7885 * -ENOMEM - No available memory
3772a991 7886 **/
da0436e9 7887static int
5350d872 7888lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7889{
895427bd 7890 int io_channel;
1ba981fd 7891 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7892
da0436e9 7893 /*
67d12733 7894 * Sanity check for configured queue parameters against the run-time
da0436e9
JS
7895 * device parameters
7896 */
3772a991 7897
67d12733 7898 /* Sanity check on HBA EQ parameters */
895427bd 7899 io_channel = phba->io_channel_irqs;
67d12733 7900
895427bd 7901 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS
7902 lpfc_printf_log(phba,
7903 KERN_ERR, LOG_INIT,
90695ee0 7904 "3188 Reducing IO channels to match number of "
7bb03bbf 7905 "online CPUs: from %d to %d\n",
895427bd
JS
7906 io_channel, phba->sli4_hba.num_online_cpu);
7907 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS
7908 }
7909
895427bd 7910 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS
7911 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7912 "2575 Reducing IO channels to match number of "
7913 "available EQs: from %d to %d\n",
895427bd 7914 io_channel,
82c3e9ba 7915 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7916 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7917 }
67d12733 7918
895427bd
JS
7919 /* The actual number of FCP / NVME event queues adopted */
7920 if (io_channel != phba->io_channel_irqs)
7921 phba->io_channel_irqs = io_channel;
7922 if (phba->cfg_fcp_io_channel > io_channel)
7923 phba->cfg_fcp_io_channel = io_channel;
7924 if (phba->cfg_nvme_io_channel > io_channel)
7925 phba->cfg_nvme_io_channel = io_channel;
2d7dbc4c
JS
7926 if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq)
7927 phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
895427bd
JS
7928
7929 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2d7dbc4c 7930 "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n",
895427bd 7931 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
2d7dbc4c 7932 phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq);
3772a991 7933
da0436e9
JS
7934 /* Get EQ depth from module parameter, fake the default for now */
7935 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7936 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7937
5350d872
JS
7938 /* Get CQ depth from module parameter, fake the default for now */
7939 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7940 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS
7941 return 0;
7942}
7943
7944static int
7945lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7946{
7947 struct lpfc_queue *qdesc;
7948 int cnt;
5350d872 7949
895427bd
JS
7950 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7951 phba->sli4_hba.cq_ecount);
7952 if (!qdesc) {
7953 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7954 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7955 wqidx);
7956 return 1;
7957 }
7958 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
7959
7960 cnt = LPFC_NVME_WQSIZE;
7961 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_WQE128_SIZE, cnt);
7962 if (!qdesc) {
7963 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7964 "0509 Failed allocate fast-path NVME WQ (%d)\n",
7965 wqidx);
7966 return 1;
7967 }
7968 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
7969 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7970 return 0;
7971}
7972
7973static int
7974lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
7975{
7976 struct lpfc_queue *qdesc;
7977 uint32_t wqesize;
7978
7979 /* Create Fast Path FCP CQs */
7980 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7981 phba->sli4_hba.cq_ecount);
7982 if (!qdesc) {
7983 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7984 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
7985 return 1;
7986 }
7987 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
7988
7989 /* Create Fast Path FCP WQs */
7990 wqesize = (phba->fcp_embed_io) ?
d1f525aa 7991 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
895427bd
JS
7992 qdesc = lpfc_sli4_queue_alloc(phba, wqesize, phba->sli4_hba.wq_ecount);
7993 if (!qdesc) {
7994 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7995 "0503 Failed allocate fast-path FCP WQ (%d)\n",
7996 wqidx);
7997 return 1;
7998 }
7999 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
8000 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 8001 return 0;
5350d872
JS
8002}
8003
8004/**
8005 * lpfc_sli4_queue_create - Create all the SLI4 queues
8006 * @phba: pointer to lpfc hba data structure.
8007 *
8008 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
8009 * operation. For each SLI4 queue type, the parameters such as queue entry
8010 * count (queue depth) shall be taken from the module parameter. For now,
8011 * we just use some constant number as place holder.
8012 *
8013 * Return codes
4907cb7b 8014 * 0 - successful
5350d872
JS
8015 * -ENOMEM - No availble memory
8016 * -EIO - The mailbox failed to complete successfully.
8017 **/
8018int
8019lpfc_sli4_queue_create(struct lpfc_hba *phba)
8020{
8021 struct lpfc_queue *qdesc;
d1f525aa 8022 int idx, io_channel;
5350d872
JS
8023
8024 /*
67d12733 8025 * Create HBA Record arrays.
895427bd 8026 * Both NVME and FCP will share that same vectors / EQs
5350d872 8027 */
895427bd
JS
8028 io_channel = phba->io_channel_irqs;
8029 if (!io_channel)
67d12733 8030 return -ERANGE;
5350d872 8031
67d12733
JS
8032 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
8033 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
8034 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
8035 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
8036 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
8037 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS
8038 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8039 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
8040 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8041 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 8042
895427bd
JS
8043 phba->sli4_hba.hba_eq = kcalloc(io_channel,
8044 sizeof(struct lpfc_queue *),
8045 GFP_KERNEL);
67d12733
JS
8046 if (!phba->sli4_hba.hba_eq) {
8047 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8048 "2576 Failed allocate memory for "
8049 "fast-path EQ record array\n");
8050 goto out_error;
8051 }
8052
895427bd
JS
8053 if (phba->cfg_fcp_io_channel) {
8054 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
8055 sizeof(struct lpfc_queue *),
8056 GFP_KERNEL);
8057 if (!phba->sli4_hba.fcp_cq) {
8058 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8059 "2577 Failed allocate memory for "
8060 "fast-path CQ record array\n");
8061 goto out_error;
8062 }
8063 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
8064 sizeof(struct lpfc_queue *),
8065 GFP_KERNEL);
8066 if (!phba->sli4_hba.fcp_wq) {
8067 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8068 "2578 Failed allocate memory for "
8069 "fast-path FCP WQ record array\n");
8070 goto out_error;
8071 }
8072 /*
8073 * Since the first EQ can have multiple CQs associated with it,
8074 * this array is used to quickly see if we have a FCP fast-path
8075 * CQ match.
8076 */
8077 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
8078 sizeof(uint16_t),
8079 GFP_KERNEL);
8080 if (!phba->sli4_hba.fcp_cq_map) {
8081 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8082 "2545 Failed allocate memory for "
8083 "fast-path CQ map\n");
8084 goto out_error;
8085 }
67d12733
JS
8086 }
8087
895427bd
JS
8088 if (phba->cfg_nvme_io_channel) {
8089 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
8090 sizeof(struct lpfc_queue *),
8091 GFP_KERNEL);
8092 if (!phba->sli4_hba.nvme_cq) {
8093 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8094 "6077 Failed allocate memory for "
8095 "fast-path CQ record array\n");
8096 goto out_error;
8097 }
da0436e9 8098
895427bd
JS
8099 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
8100 sizeof(struct lpfc_queue *),
8101 GFP_KERNEL);
8102 if (!phba->sli4_hba.nvme_wq) {
8103 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8104 "2581 Failed allocate memory for "
8105 "fast-path NVME WQ record array\n");
8106 goto out_error;
8107 }
8108
8109 /*
8110 * Since the first EQ can have multiple CQs associated with it,
8111 * this array is used to quickly see if we have a NVME fast-path
8112 * CQ match.
8113 */
8114 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
8115 sizeof(uint16_t),
8116 GFP_KERNEL);
8117 if (!phba->sli4_hba.nvme_cq_map) {
8118 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8119 "6078 Failed allocate memory for "
8120 "fast-path CQ map\n");
8121 goto out_error;
8122 }
2d7dbc4c
JS
8123
8124 if (phba->nvmet_support) {
8125 phba->sli4_hba.nvmet_cqset = kcalloc(
8126 phba->cfg_nvmet_mrq,
8127 sizeof(struct lpfc_queue *),
8128 GFP_KERNEL);
8129 if (!phba->sli4_hba.nvmet_cqset) {
8130 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8131 "3121 Fail allocate memory for "
8132 "fast-path CQ set array\n");
8133 goto out_error;
8134 }
8135 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
8136 phba->cfg_nvmet_mrq,
8137 sizeof(struct lpfc_queue *),
8138 GFP_KERNEL);
8139 if (!phba->sli4_hba.nvmet_mrq_hdr) {
8140 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8141 "3122 Fail allocate memory for "
8142 "fast-path RQ set hdr array\n");
8143 goto out_error;
8144 }
8145 phba->sli4_hba.nvmet_mrq_data = kcalloc(
8146 phba->cfg_nvmet_mrq,
8147 sizeof(struct lpfc_queue *),
8148 GFP_KERNEL);
8149 if (!phba->sli4_hba.nvmet_mrq_data) {
8150 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8151 "3124 Fail allocate memory for "
8152 "fast-path RQ set data array\n");
8153 goto out_error;
8154 }
8155 }
da0436e9 8156 }
67d12733 8157
895427bd 8158 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 8159
895427bd
JS
8160 /* Create HBA Event Queues (EQs) */
8161 for (idx = 0; idx < io_channel; idx++) {
67d12733 8162 /* Create EQs */
da0436e9
JS
8163 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
8164 phba->sli4_hba.eq_ecount);
8165 if (!qdesc) {
8166 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS
8167 "0497 Failed allocate EQ (%d)\n", idx);
8168 goto out_error;
da0436e9 8169 }
67d12733 8170 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 8171 }
67d12733 8172
895427bd 8173 /* FCP and NVME io channels are not required to be balanced */
67d12733 8174
895427bd
JS
8175 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
8176 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 8177 goto out_error;
da0436e9 8178
895427bd
JS
8179 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
8180 if (lpfc_alloc_nvme_wq_cq(phba, idx))
8181 goto out_error;
67d12733 8182
2d7dbc4c
JS
8183 if (phba->nvmet_support) {
8184 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8185 qdesc = lpfc_sli4_queue_alloc(phba,
8186 phba->sli4_hba.cq_esize,
8187 phba->sli4_hba.cq_ecount);
8188 if (!qdesc) {
8189 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8190 "3142 Failed allocate NVME "
8191 "CQ Set (%d)\n", idx);
8192 goto out_error;
8193 }
8194 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
8195 }
8196 }
8197
da0436e9 8198 /*
67d12733 8199 * Create Slow Path Completion Queues (CQs)
da0436e9
JS
8200 */
8201
da0436e9
JS
8202 /* Create slow-path Mailbox Command Complete Queue */
8203 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8204 phba->sli4_hba.cq_ecount);
8205 if (!qdesc) {
8206 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8207 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 8208 goto out_error;
da0436e9
JS
8209 }
8210 phba->sli4_hba.mbx_cq = qdesc;
8211
8212 /* Create slow-path ELS Complete Queue */
8213 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8214 phba->sli4_hba.cq_ecount);
8215 if (!qdesc) {
8216 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8217 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 8218 goto out_error;
da0436e9
JS
8219 }
8220 phba->sli4_hba.els_cq = qdesc;
8221
da0436e9 8222
5350d872 8223 /*
67d12733 8224 * Create Slow Path Work Queues (WQs)
5350d872 8225 */
da0436e9
JS
8226
8227 /* Create Mailbox Command Queue */
da0436e9
JS
8228
8229 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.mq_esize,
8230 phba->sli4_hba.mq_ecount);
8231 if (!qdesc) {
8232 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8233 "0505 Failed allocate slow-path MQ\n");
67d12733 8234 goto out_error;
da0436e9
JS
8235 }
8236 phba->sli4_hba.mbx_wq = qdesc;
8237
8238 /*
67d12733 8239 * Create ELS Work Queues
da0436e9 8240 */
da0436e9
JS
8241
8242 /* Create slow-path ELS Work Queue */
8243 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8244 phba->sli4_hba.wq_ecount);
8245 if (!qdesc) {
8246 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8247 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8248 goto out_error;
da0436e9
JS
8249 }
8250 phba->sli4_hba.els_wq = qdesc;
895427bd
JS
8251 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8252
8253 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8254 /* Create NVME LS Complete Queue */
8255 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8256 phba->sli4_hba.cq_ecount);
8257 if (!qdesc) {
8258 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8259 "6079 Failed allocate NVME LS CQ\n");
8260 goto out_error;
8261 }
8262 phba->sli4_hba.nvmels_cq = qdesc;
8263
8264 /* Create NVME LS Work Queue */
8265 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8266 phba->sli4_hba.wq_ecount);
8267 if (!qdesc) {
8268 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8269 "6080 Failed allocate NVME LS WQ\n");
8270 goto out_error;
8271 }
8272 phba->sli4_hba.nvmels_wq = qdesc;
8273 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8274 }
da0436e9 8275
da0436e9
JS
8276 /*
8277 * Create Receive Queue (RQ)
8278 */
da0436e9
JS
8279
8280 /* Create Receive Queue for header */
8281 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8282 phba->sli4_hba.rq_ecount);
8283 if (!qdesc) {
8284 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8285 "0506 Failed allocate receive HRQ\n");
67d12733 8286 goto out_error;
da0436e9
JS
8287 }
8288 phba->sli4_hba.hdr_rq = qdesc;
8289
8290 /* Create Receive Queue for data */
8291 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8292 phba->sli4_hba.rq_ecount);
8293 if (!qdesc) {
8294 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8295 "0507 Failed allocate receive DRQ\n");
67d12733 8296 goto out_error;
da0436e9
JS
8297 }
8298 phba->sli4_hba.dat_rq = qdesc;
8299
2d7dbc4c
JS
8300 if (phba->nvmet_support) {
8301 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8302 /* Create NVMET Receive Queue for header */
8303 qdesc = lpfc_sli4_queue_alloc(phba,
8304 phba->sli4_hba.rq_esize,
61f3d4bf 8305 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS
8306 if (!qdesc) {
8307 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8308 "3146 Failed allocate "
8309 "receive HRQ\n");
8310 goto out_error;
8311 }
8312 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
8313
8314 /* Only needed for header of RQ pair */
8315 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
8316 GFP_KERNEL);
8317 if (qdesc->rqbp == NULL) {
8318 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8319 "6131 Failed allocate "
8320 "Header RQBP\n");
8321 goto out_error;
8322 }
8323
4b40d02b
DK
8324 /* Put list in known state in case driver load fails. */
8325 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
8326
2d7dbc4c
JS
8327 /* Create NVMET Receive Queue for data */
8328 qdesc = lpfc_sli4_queue_alloc(phba,
8329 phba->sli4_hba.rq_esize,
61f3d4bf 8330 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS
8331 if (!qdesc) {
8332 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8333 "3156 Failed allocate "
8334 "receive DRQ\n");
8335 goto out_error;
8336 }
8337 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
8338 }
8339 }
8340
1ba981fd
JS
8341 /* Create the Queues needed for Flash Optimized Fabric operations */
8342 if (phba->cfg_fof)
8343 lpfc_fof_queue_create(phba);
da0436e9
JS
8344 return 0;
8345
da0436e9 8346out_error:
67d12733 8347 lpfc_sli4_queue_destroy(phba);
da0436e9
JS
8348 return -ENOMEM;
8349}
8350
895427bd
JS
8351static inline void
8352__lpfc_sli4_release_queue(struct lpfc_queue **qp)
8353{
8354 if (*qp != NULL) {
8355 lpfc_sli4_queue_free(*qp);
8356 *qp = NULL;
8357 }
8358}
8359
8360static inline void
8361lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
8362{
8363 int idx;
8364
8365 if (*qs == NULL)
8366 return;
8367
8368 for (idx = 0; idx < max; idx++)
8369 __lpfc_sli4_release_queue(&(*qs)[idx]);
8370
8371 kfree(*qs);
8372 *qs = NULL;
8373}
8374
8375static inline void
8376lpfc_sli4_release_queue_map(uint16_t **qmap)
8377{
8378 if (*qmap != NULL) {
8379 kfree(*qmap);
8380 *qmap = NULL;
8381 }
8382}
8383
da0436e9
JS
8384/**
8385 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
8386 * @phba: pointer to lpfc hba data structure.
8387 *
8388 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
8389 * operation.
8390 *
8391 * Return codes
af901ca1 8392 * 0 - successful
25985edc 8393 * -ENOMEM - No available memory
d439d286 8394 * -EIO - The mailbox failed to complete successfully.
da0436e9 8395 **/
5350d872 8396void
da0436e9
JS
8397lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
8398{
1ba981fd
JS
8399 if (phba->cfg_fof)
8400 lpfc_fof_queue_destroy(phba);
8401
895427bd
JS
8402 /* Release HBA eqs */
8403 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
8404
8405 /* Release FCP cqs */
8406 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
d1f525aa 8407 phba->cfg_fcp_io_channel);
895427bd
JS
8408
8409 /* Release FCP wqs */
8410 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
d1f525aa 8411 phba->cfg_fcp_io_channel);
895427bd
JS
8412
8413 /* Release FCP CQ mapping array */
8414 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
8415
8416 /* Release NVME cqs */
8417 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
8418 phba->cfg_nvme_io_channel);
8419
8420 /* Release NVME wqs */
8421 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
8422 phba->cfg_nvme_io_channel);
8423
8424 /* Release NVME CQ mapping array */
8425 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
8426
2d7dbc4c
JS
8427 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
8428 phba->cfg_nvmet_mrq);
8429
8430 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
8431 phba->cfg_nvmet_mrq);
8432 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
8433 phba->cfg_nvmet_mrq);
8434
895427bd
JS
8435 /* Release mailbox command work queue */
8436 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
8437
8438 /* Release ELS work queue */
8439 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
8440
8441 /* Release ELS work queue */
8442 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
8443
8444 /* Release unsolicited receive queue */
8445 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
8446 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
8447
8448 /* Release ELS complete queue */
8449 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
8450
8451 /* Release NVME LS complete queue */
8452 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
8453
8454 /* Release mailbox command complete queue */
8455 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
8456
8457 /* Everything on this list has been freed */
8458 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8459}
8460
895427bd
JS
8461int
8462lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
8463{
8464 struct lpfc_rqb *rqbp;
8465 struct lpfc_dmabuf *h_buf;
8466 struct rqb_dmabuf *rqb_buffer;
8467
8468 rqbp = rq->rqbp;
8469 while (!list_empty(&rqbp->rqb_buffer_list)) {
8470 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
8471 struct lpfc_dmabuf, list);
8472
8473 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
8474 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8475 rqbp->buffer_count--;
67d12733 8476 }
895427bd
JS
8477 return 1;
8478}
67d12733 8479
895427bd
JS
8480static int
8481lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
8482 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
8483 int qidx, uint32_t qtype)
8484{
8485 struct lpfc_sli_ring *pring;
8486 int rc;
8487
8488 if (!eq || !cq || !wq) {
8489 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8490 "6085 Fast-path %s (%d) not allocated\n",
8491 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
8492 return -ENOMEM;
8493 }
8494
8495 /* create the Cq first */
8496 rc = lpfc_cq_create(phba, cq, eq,
8497 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
8498 if (rc) {
8499 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8500 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
8501 qidx, (uint32_t)rc);
8502 return rc;
67d12733
JS
8503 }
8504
895427bd
JS
8505 if (qtype != LPFC_MBOX) {
8506 /* Setup nvme_cq_map for fast lookup */
8507 if (cq_map)
8508 *cq_map = cq->queue_id;
da0436e9 8509
895427bd
JS
8510 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8511 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8512 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8513
895427bd
JS
8514 /* create the wq */
8515 rc = lpfc_wq_create(phba, wq, cq, qtype);
8516 if (rc) {
8517 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8518 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8519 qidx, (uint32_t)rc);
8520 /* no need to tear down cq - caller will do so */
8521 return rc;
8522 }
da0436e9 8523
895427bd
JS
8524 /* Bind this CQ/WQ to the NVME ring */
8525 pring = wq->pring;
8526 pring->sli.sli4.wqp = (void *)wq;
8527 cq->pring = pring;
da0436e9 8528
895427bd
JS
8529 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8530 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8531 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8532 } else {
8533 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8534 if (rc) {
8535 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8536 "0539 Failed setup of slow-path MQ: "
8537 "rc = 0x%x\n", rc);
8538 /* no need to tear down cq - caller will do so */
8539 return rc;
8540 }
da0436e9 8541
895427bd
JS
8542 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8543 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8544 phba->sli4_hba.mbx_wq->queue_id,
8545 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8546 }
da0436e9 8547
895427bd 8548 return 0;
da0436e9
JS
8549}
8550
8551/**
8552 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8553 * @phba: pointer to lpfc hba data structure.
8554 *
8555 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8556 * operation.
8557 *
8558 * Return codes
af901ca1 8559 * 0 - successful
25985edc 8560 * -ENOMEM - No available memory
d439d286 8561 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8562 **/
8563int
8564lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8565{
962bc51b
JS
8566 uint32_t shdr_status, shdr_add_status;
8567 union lpfc_sli4_cfg_shdr *shdr;
8568 LPFC_MBOXQ_t *mboxq;
895427bd
JS
8569 int qidx;
8570 uint32_t length, io_channel;
8571 int rc = -ENOMEM;
962bc51b
JS
8572
8573 /* Check for dual-ULP support */
8574 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8575 if (!mboxq) {
8576 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8577 "3249 Unable to allocate memory for "
8578 "QUERY_FW_CFG mailbox command\n");
8579 return -ENOMEM;
8580 }
8581 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8582 sizeof(struct lpfc_sli4_cfg_mhdr));
8583 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8584 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8585 length, LPFC_SLI4_MBX_EMBED);
8586
8587 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8588
8589 shdr = (union lpfc_sli4_cfg_shdr *)
8590 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8591 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8592 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8593 if (shdr_status || shdr_add_status || rc) {
8594 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8595 "3250 QUERY_FW_CFG mailbox failed with status "
8596 "x%x add_status x%x, mbx status x%x\n",
8597 shdr_status, shdr_add_status, rc);
8598 if (rc != MBX_TIMEOUT)
8599 mempool_free(mboxq, phba->mbox_mem_pool);
8600 rc = -ENXIO;
8601 goto out_error;
8602 }
8603
8604 phba->sli4_hba.fw_func_mode =
8605 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8606 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8607 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS
8608 phba->sli4_hba.physical_port =
8609 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS
8610 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8611 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8612 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8613 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8614
8615 if (rc != MBX_TIMEOUT)
8616 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS
8617
8618 /*
67d12733 8619 * Set up HBA Event Queues (EQs)
da0436e9 8620 */
895427bd 8621 io_channel = phba->io_channel_irqs;
da0436e9 8622
67d12733 8623 /* Set up HBA event queue */
895427bd 8624 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS
8625 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8626 "3147 Fast-path EQs not allocated\n");
1b51197d 8627 rc = -ENOMEM;
67d12733 8628 goto out_error;
2e90f4b5 8629 }
895427bd
JS
8630 for (qidx = 0; qidx < io_channel; qidx++) {
8631 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS
8632 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8633 "0522 Fast-path EQ (%d) not "
895427bd 8634 "allocated\n", qidx);
1b51197d 8635 rc = -ENOMEM;
895427bd 8636 goto out_destroy;
da0436e9 8637 }
895427bd
JS
8638 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8639 phba->cfg_fcp_imax);
da0436e9
JS
8640 if (rc) {
8641 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8642 "0523 Failed setup of fast-path EQ "
895427bd 8643 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8644 (uint32_t)rc);
895427bd 8645 goto out_destroy;
da0436e9
JS
8646 }
8647 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS
8648 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8649 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS
8650 }
8651
895427bd
JS
8652 if (phba->cfg_nvme_io_channel) {
8653 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8654 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8655 "6084 Fast-path NVME %s array not allocated\n",
8656 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8657 rc = -ENOMEM;
895427bd 8658 goto out_destroy;
67d12733
JS
8659 }
8660
895427bd
JS
8661 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8662 rc = lpfc_create_wq_cq(phba,
8663 phba->sli4_hba.hba_eq[
8664 qidx % io_channel],
8665 phba->sli4_hba.nvme_cq[qidx],
8666 phba->sli4_hba.nvme_wq[qidx],
8667 &phba->sli4_hba.nvme_cq_map[qidx],
8668 qidx, LPFC_NVME);
8669 if (rc) {
8670 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8671 "6123 Failed to setup fastpath "
8672 "NVME WQ/CQ (%d), rc = 0x%x\n",
8673 qidx, (uint32_t)rc);
8674 goto out_destroy;
8675 }
8676 }
67d12733
JS
8677 }
8678
895427bd
JS
8679 if (phba->cfg_fcp_io_channel) {
8680 /* Set up fast-path FCP Response Complete Queue */
8681 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8682 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8683 "3148 Fast-path FCP %s array not allocated\n",
8684 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8685 rc = -ENOMEM;
895427bd 8686 goto out_destroy;
67d12733
JS
8687 }
8688
895427bd
JS
8689 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8690 rc = lpfc_create_wq_cq(phba,
8691 phba->sli4_hba.hba_eq[
8692 qidx % io_channel],
8693 phba->sli4_hba.fcp_cq[qidx],
8694 phba->sli4_hba.fcp_wq[qidx],
8695 &phba->sli4_hba.fcp_cq_map[qidx],
8696 qidx, LPFC_FCP);
8697 if (rc) {
8698 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8699 "0535 Failed to setup fastpath "
8700 "FCP WQ/CQ (%d), rc = 0x%x\n",
8701 qidx, (uint32_t)rc);
8702 goto out_destroy;
8703 }
8704 }
67d12733 8705 }
895427bd 8706
da0436e9 8707 /*
895427bd 8708 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS
8709 */
8710
895427bd 8711 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8712
895427bd 8713 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8714 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8715 "0528 %s not allocated\n",
8716 phba->sli4_hba.mbx_cq ?
d1f525aa 8717 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8718 rc = -ENOMEM;
895427bd 8719 goto out_destroy;
da0436e9 8720 }
da0436e9 8721
895427bd 8722 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
d1f525aa
JS
8723 phba->sli4_hba.mbx_cq,
8724 phba->sli4_hba.mbx_wq,
8725 NULL, 0, LPFC_MBOX);
da0436e9
JS
8726 if (rc) {
8727 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8728 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8729 (uint32_t)rc);
8730 goto out_destroy;
da0436e9 8731 }
2d7dbc4c
JS
8732 if (phba->nvmet_support) {
8733 if (!phba->sli4_hba.nvmet_cqset) {
8734 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8735 "3165 Fast-path NVME CQ Set "
8736 "array not allocated\n");
8737 rc = -ENOMEM;
8738 goto out_destroy;
8739 }
8740 if (phba->cfg_nvmet_mrq > 1) {
8741 rc = lpfc_cq_create_set(phba,
8742 phba->sli4_hba.nvmet_cqset,
8743 phba->sli4_hba.hba_eq,
8744 LPFC_WCQ, LPFC_NVMET);
8745 if (rc) {
8746 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8747 "3164 Failed setup of NVME CQ "
8748 "Set, rc = 0x%x\n",
8749 (uint32_t)rc);
8750 goto out_destroy;
8751 }
8752 } else {
8753 /* Set up NVMET Receive Complete Queue */
8754 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
8755 phba->sli4_hba.hba_eq[0],
8756 LPFC_WCQ, LPFC_NVMET);
8757 if (rc) {
8758 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8759 "6089 Failed setup NVMET CQ: "
8760 "rc = 0x%x\n", (uint32_t)rc);
8761 goto out_destroy;
8762 }
8763 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8764 "6090 NVMET CQ setup: cq-id=%d, "
8765 "parent eq-id=%d\n",
8766 phba->sli4_hba.nvmet_cqset[0]->queue_id,
8767 phba->sli4_hba.hba_eq[0]->queue_id);
8768 }
8769 }
da0436e9 8770
895427bd
JS
8771 /* Set up slow-path ELS WQ/CQ */
8772 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8773 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8774 "0530 ELS %s not allocated\n",
8775 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8776 rc = -ENOMEM;
895427bd 8777 goto out_destroy;
da0436e9 8778 }
895427bd
JS
8779 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8780 phba->sli4_hba.els_cq,
8781 phba->sli4_hba.els_wq,
8782 NULL, 0, LPFC_ELS);
da0436e9
JS
8783 if (rc) {
8784 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8785 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8786 (uint32_t)rc);
8787 goto out_destroy;
da0436e9
JS
8788 }
8789 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8790 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8791 phba->sli4_hba.els_wq->queue_id,
8792 phba->sli4_hba.els_cq->queue_id);
8793
895427bd
JS
8794 if (phba->cfg_nvme_io_channel) {
8795 /* Set up NVME LS Complete Queue */
8796 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8797 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8798 "6091 LS %s not allocated\n",
8799 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8800 rc = -ENOMEM;
8801 goto out_destroy;
8802 }
8803 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8804 phba->sli4_hba.nvmels_cq,
8805 phba->sli4_hba.nvmels_wq,
8806 NULL, 0, LPFC_NVME_LS);
8807 if (rc) {
8808 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8809 "0529 Failed setup of NVVME LS WQ/CQ: "
8810 "rc = 0x%x\n", (uint32_t)rc);
8811 goto out_destroy;
8812 }
8813
8814 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8815 "6096 ELS WQ setup: wq-id=%d, "
8816 "parent cq-id=%d\n",
8817 phba->sli4_hba.nvmels_wq->queue_id,
8818 phba->sli4_hba.nvmels_cq->queue_id);
8819 }
8820
2d7dbc4c
JS
8821 /*
8822 * Create NVMET Receive Queue (RQ)
8823 */
8824 if (phba->nvmet_support) {
8825 if ((!phba->sli4_hba.nvmet_cqset) ||
8826 (!phba->sli4_hba.nvmet_mrq_hdr) ||
8827 (!phba->sli4_hba.nvmet_mrq_data)) {
8828 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8829 "6130 MRQ CQ Queues not "
8830 "allocated\n");
8831 rc = -ENOMEM;
8832 goto out_destroy;
8833 }
8834 if (phba->cfg_nvmet_mrq > 1) {
8835 rc = lpfc_mrq_create(phba,
8836 phba->sli4_hba.nvmet_mrq_hdr,
8837 phba->sli4_hba.nvmet_mrq_data,
8838 phba->sli4_hba.nvmet_cqset,
8839 LPFC_NVMET);
8840 if (rc) {
8841 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8842 "6098 Failed setup of NVMET "
8843 "MRQ: rc = 0x%x\n",
8844 (uint32_t)rc);
8845 goto out_destroy;
8846 }
8847
8848 } else {
8849 rc = lpfc_rq_create(phba,
8850 phba->sli4_hba.nvmet_mrq_hdr[0],
8851 phba->sli4_hba.nvmet_mrq_data[0],
8852 phba->sli4_hba.nvmet_cqset[0],
8853 LPFC_NVMET);
8854 if (rc) {
8855 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8856 "6057 Failed setup of NVMET "
8857 "Receive Queue: rc = 0x%x\n",
8858 (uint32_t)rc);
8859 goto out_destroy;
8860 }
8861
8862 lpfc_printf_log(
8863 phba, KERN_INFO, LOG_INIT,
8864 "6099 NVMET RQ setup: hdr-rq-id=%d, "
8865 "dat-rq-id=%d parent cq-id=%d\n",
8866 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
8867 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
8868 phba->sli4_hba.nvmet_cqset[0]->queue_id);
8869
8870 }
8871 }
8872
da0436e9
JS
8873 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8874 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8875 "0540 Receive Queue not allocated\n");
1b51197d 8876 rc = -ENOMEM;
895427bd 8877 goto out_destroy;
da0436e9 8878 }
73d91e50 8879
da0436e9 8880 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8881 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS
8882 if (rc) {
8883 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8884 "0541 Failed setup of Receive Queue: "
a2fc4aef 8885 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8886 goto out_destroy;
da0436e9 8887 }
73d91e50 8888
da0436e9
JS
8889 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8890 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8891 "parent cq-id=%d\n",
8892 phba->sli4_hba.hdr_rq->queue_id,
8893 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8894 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS
8895
8896 if (phba->cfg_fof) {
8897 rc = lpfc_fof_queue_setup(phba);
8898 if (rc) {
8899 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8900 "0549 Failed setup of FOF Queues: "
8901 "rc = 0x%x\n", rc);
895427bd 8902 goto out_destroy;
1ba981fd
JS
8903 }
8904 }
2c9c5a00 8905
43140ca6 8906 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
0cf07f84
JS
8907 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
8908 phba->cfg_fcp_imax);
43140ca6 8909
da0436e9
JS
8910 return 0;
8911
895427bd
JS
8912out_destroy:
8913 lpfc_sli4_queue_unset(phba);
da0436e9
JS
8914out_error:
8915 return rc;
8916}
8917
8918/**
8919 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8920 * @phba: pointer to lpfc hba data structure.
8921 *
8922 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8923 * operation.
8924 *
8925 * Return codes
af901ca1 8926 * 0 - successful
25985edc 8927 * -ENOMEM - No available memory
d439d286 8928 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8929 **/
8930void
8931lpfc_sli4_queue_unset(struct lpfc_hba *phba)
8932{
895427bd 8933 int qidx;
da0436e9 8934
1ba981fd
JS
8935 /* Unset the queues created for Flash Optimized Fabric operations */
8936 if (phba->cfg_fof)
8937 lpfc_fof_queue_destroy(phba);
895427bd 8938
da0436e9 8939 /* Unset mailbox command work queue */
895427bd
JS
8940 if (phba->sli4_hba.mbx_wq)
8941 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
8942
8943 /* Unset NVME LS work queue */
8944 if (phba->sli4_hba.nvmels_wq)
8945 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
8946
da0436e9 8947 /* Unset ELS work queue */
019c0d66 8948 if (phba->sli4_hba.els_wq)
895427bd
JS
8949 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
8950
da0436e9 8951 /* Unset unsolicited receive queue */
895427bd
JS
8952 if (phba->sli4_hba.hdr_rq)
8953 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
8954 phba->sli4_hba.dat_rq);
8955
da0436e9 8956 /* Unset FCP work queue */
895427bd
JS
8957 if (phba->sli4_hba.fcp_wq)
8958 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8959 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
8960
8961 /* Unset NVME work queue */
8962 if (phba->sli4_hba.nvme_wq) {
8963 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8964 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 8965 }
895427bd 8966
da0436e9 8967 /* Unset mailbox command complete queue */
895427bd
JS
8968 if (phba->sli4_hba.mbx_cq)
8969 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
8970
da0436e9 8971 /* Unset ELS complete queue */
895427bd
JS
8972 if (phba->sli4_hba.els_cq)
8973 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
8974
8975 /* Unset NVME LS complete queue */
8976 if (phba->sli4_hba.nvmels_cq)
8977 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
8978
8979 /* Unset NVME response complete queue */
8980 if (phba->sli4_hba.nvme_cq)
8981 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8982 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
8983
2d7dbc4c
JS
8984 /* Unset NVMET MRQ queue */
8985 if (phba->sli4_hba.nvmet_mrq_hdr) {
8986 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8987 lpfc_rq_destroy(phba,
8988 phba->sli4_hba.nvmet_mrq_hdr[qidx],
8989 phba->sli4_hba.nvmet_mrq_data[qidx]);
8990 }
8991
8992 /* Unset NVMET CQ Set complete queue */
8993 if (phba->sli4_hba.nvmet_cqset) {
8994 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8995 lpfc_cq_destroy(phba,
8996 phba->sli4_hba.nvmet_cqset[qidx]);
8997 }
8998
da0436e9 8999 /* Unset FCP response complete queue */
895427bd
JS
9000 if (phba->sli4_hba.fcp_cq)
9001 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
9002 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
9003
da0436e9 9004 /* Unset fast-path event queue */
895427bd
JS
9005 if (phba->sli4_hba.hba_eq)
9006 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
9007 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS
9008}
9009
9010/**
9011 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
9012 * @phba: pointer to lpfc hba data structure.
9013 *
9014 * This routine is invoked to allocate and set up a pool of completion queue
9015 * events. The body of the completion queue event is a completion queue entry
9016 * CQE. For now, this pool is used for the interrupt service routine to queue
9017 * the following HBA completion queue events for the worker thread to process:
9018 * - Mailbox asynchronous events
9019 * - Receive queue completion unsolicited events
9020 * Later, this can be used for all the slow-path events.
9021 *
9022 * Return codes
af901ca1 9023 * 0 - successful
25985edc 9024 * -ENOMEM - No available memory
da0436e9
JS
9025 **/
9026static int
9027lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
9028{
9029 struct lpfc_cq_event *cq_event;
9030 int i;
9031
9032 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
9033 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
9034 if (!cq_event)
9035 goto out_pool_create_fail;
9036 list_add_tail(&cq_event->list,
9037 &phba->sli4_hba.sp_cqe_event_pool);
9038 }
9039 return 0;
9040
9041out_pool_create_fail:
9042 lpfc_sli4_cq_event_pool_destroy(phba);
9043 return -ENOMEM;
9044}
9045
9046/**
9047 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
9048 * @phba: pointer to lpfc hba data structure.
9049 *
9050 * This routine is invoked to free the pool of completion queue events at
9051 * driver unload time. Note that, it is the responsibility of the driver
9052 * cleanup routine to free all the outstanding completion-queue events
9053 * allocated from this pool back into the pool before invoking this routine
9054 * to destroy the pool.
9055 **/
9056static void
9057lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
9058{
9059 struct lpfc_cq_event *cq_event, *next_cq_event;
9060
9061 list_for_each_entry_safe(cq_event, next_cq_event,
9062 &phba->sli4_hba.sp_cqe_event_pool, list) {
9063 list_del(&cq_event->list);
9064 kfree(cq_event);
9065 }
9066}
9067
9068/**
9069 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9070 * @phba: pointer to lpfc hba data structure.
9071 *
9072 * This routine is the lock free version of the API invoked to allocate a
9073 * completion-queue event from the free pool.
9074 *
9075 * Return: Pointer to the newly allocated completion-queue event if successful
9076 * NULL otherwise.
9077 **/
9078struct lpfc_cq_event *
9079__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9080{
9081 struct lpfc_cq_event *cq_event = NULL;
9082
9083 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
9084 struct lpfc_cq_event, list);
9085 return cq_event;
9086}
9087
9088/**
9089 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9090 * @phba: pointer to lpfc hba data structure.
9091 *
9092 * This routine is the lock version of the API invoked to allocate a
9093 * completion-queue event from the free pool.
9094 *
9095 * Return: Pointer to the newly allocated completion-queue event if successful
9096 * NULL otherwise.
9097 **/
9098struct lpfc_cq_event *
9099lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9100{
9101 struct lpfc_cq_event *cq_event;
9102 unsigned long iflags;
9103
9104 spin_lock_irqsave(&phba->hbalock, iflags);
9105 cq_event = __lpfc_sli4_cq_event_alloc(phba);
9106 spin_unlock_irqrestore(&phba->hbalock, iflags);
9107 return cq_event;
9108}
9109
9110/**
9111 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9112 * @phba: pointer to lpfc hba data structure.
9113 * @cq_event: pointer to the completion queue event to be freed.
9114 *
9115 * This routine is the lock free version of the API invoked to release a
9116 * completion-queue event back into the free pool.
9117 **/
9118void
9119__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9120 struct lpfc_cq_event *cq_event)
9121{
9122 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
9123}
9124
9125/**
9126 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9127 * @phba: pointer to lpfc hba data structure.
9128 * @cq_event: pointer to the completion queue event to be freed.
9129 *
9130 * This routine is the lock version of the API invoked to release a
9131 * completion-queue event back into the free pool.
9132 **/
9133void
9134lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9135 struct lpfc_cq_event *cq_event)
9136{
9137 unsigned long iflags;
9138 spin_lock_irqsave(&phba->hbalock, iflags);
9139 __lpfc_sli4_cq_event_release(phba, cq_event);
9140 spin_unlock_irqrestore(&phba->hbalock, iflags);
9141}
9142
9143/**
9144 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9145 * @phba: pointer to lpfc hba data structure.
9146 *
9147 * This routine is to free all the pending completion-queue events to the
9148 * back into the free pool for device reset.
9149 **/
9150static void
9151lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9152{
9153 LIST_HEAD(cqelist);
9154 struct lpfc_cq_event *cqe;
9155 unsigned long iflags;
9156
9157 /* Retrieve all the pending WCQEs from pending WCQE lists */
9158 spin_lock_irqsave(&phba->hbalock, iflags);
9159 /* Pending FCP XRI abort events */
9160 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9161 &cqelist);
9162 /* Pending ELS XRI abort events */
9163 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9164 &cqelist);
318083ad
JS
9165 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
9166 /* Pending NVME XRI abort events */
9167 list_splice_init(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue,
9168 &cqelist);
9169 }
da0436e9
JS
9170 /* Pending asynnc events */
9171 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9172 &cqelist);
9173 spin_unlock_irqrestore(&phba->hbalock, iflags);
9174
9175 while (!list_empty(&cqelist)) {
9176 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9177 lpfc_sli4_cq_event_release(phba, cqe);
9178 }
9179}
9180
9181/**
9182 * lpfc_pci_function_reset - Reset pci function.
9183 * @phba: pointer to lpfc hba data structure.
9184 *
9185 * This routine is invoked to request a PCI function reset. It will destroys
9186 * all resources assigned to the PCI function which originates this request.
9187 *
9188 * Return codes
af901ca1 9189 * 0 - successful
25985edc 9190 * -ENOMEM - No available memory
d439d286 9191 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
9192 **/
9193int
9194lpfc_pci_function_reset(struct lpfc_hba *phba)
9195{
9196 LPFC_MBOXQ_t *mboxq;
2fcee4bf 9197 uint32_t rc = 0, if_type;
da0436e9 9198 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS
9199 uint32_t rdy_chk;
9200 uint32_t port_reset = 0;
da0436e9 9201 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9202 struct lpfc_register reg_data;
2b81f942 9203 uint16_t devid;
da0436e9 9204
2fcee4bf
JS
9205 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9206 switch (if_type) {
9207 case LPFC_SLI_INTF_IF_TYPE_0:
9208 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9209 GFP_KERNEL);
9210 if (!mboxq) {
9211 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9212 "0494 Unable to allocate memory for "
9213 "issuing SLI_FUNCTION_RESET mailbox "
9214 "command\n");
9215 return -ENOMEM;
9216 }
da0436e9 9217
2fcee4bf
JS
9218 /* Setup PCI function reset mailbox-ioctl command */
9219 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9220 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9221 LPFC_SLI4_MBX_EMBED);
9222 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9223 shdr = (union lpfc_sli4_cfg_shdr *)
9224 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9225 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9226 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9227 &shdr->response);
9228 if (rc != MBX_TIMEOUT)
9229 mempool_free(mboxq, phba->mbox_mem_pool);
9230 if (shdr_status || shdr_add_status || rc) {
9231 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9232 "0495 SLI_FUNCTION_RESET mailbox "
9233 "failed with status x%x add_status x%x,"
9234 " mbx status x%x\n",
9235 shdr_status, shdr_add_status, rc);
9236 rc = -ENXIO;
9237 }
9238 break;
9239 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS
9240wait:
9241 /*
9242 * Poll the Port Status Register and wait for RDY for
9243 * up to 30 seconds. If the port doesn't respond, treat
9244 * it as an error.
9245 */
77d093fb 9246 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS
9247 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9248 STATUSregaddr, &reg_data.word0)) {
9249 rc = -ENODEV;
9250 goto out;
9251 }
9252 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9253 break;
9254 msleep(20);
9255 }
9256
9257 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9258 phba->work_status[0] = readl(
9259 phba->sli4_hba.u.if_type2.ERR1regaddr);
9260 phba->work_status[1] = readl(
9261 phba->sli4_hba.u.if_type2.ERR2regaddr);
9262 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9263 "2890 Port not ready, port status reg "
9264 "0x%x error 1=0x%x, error 2=0x%x\n",
9265 reg_data.word0,
9266 phba->work_status[0],
9267 phba->work_status[1]);
9268 rc = -ENODEV;
9269 goto out;
9270 }
9271
9272 if (!port_reset) {
9273 /*
9274 * Reset the port now
9275 */
2fcee4bf
JS
9276 reg_data.word0 = 0;
9277 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9278 LPFC_SLIPORT_LITTLE_ENDIAN);
9279 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9280 LPFC_SLIPORT_INIT_PORT);
9281 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
9282 CTRLregaddr);
8fcb8acd 9283 /* flush */
2b81f942
JS
9284 pci_read_config_word(phba->pcidev,
9285 PCI_DEVICE_ID, &devid);
2fcee4bf 9286
2f6fa2c9
JS
9287 port_reset = 1;
9288 msleep(20);
9289 goto wait;
9290 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
9291 rc = -ENODEV;
9292 goto out;
2fcee4bf
JS
9293 }
9294 break;
2f6fa2c9 9295
2fcee4bf
JS
9296 case LPFC_SLI_INTF_IF_TYPE_1:
9297 default:
9298 break;
da0436e9 9299 }
2fcee4bf 9300
73d91e50 9301out:
2fcee4bf 9302 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 9303 if (rc) {
229adb0e
JS
9304 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9305 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 9306 "try: echo fw_reset > board_mode\n");
2fcee4bf 9307 rc = -ENODEV;
229adb0e 9308 }
2fcee4bf 9309
da0436e9
JS
9310 return rc;
9311}
9312
da0436e9
JS
9313/**
9314 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
9315 * @phba: pointer to lpfc hba data structure.
9316 *
9317 * This routine is invoked to set up the PCI device memory space for device
9318 * with SLI-4 interface spec.
9319 *
9320 * Return codes
af901ca1 9321 * 0 - successful
da0436e9
JS
9322 * other values - error
9323 **/
9324static int
9325lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
9326{
9327 struct pci_dev *pdev;
9328 unsigned long bar0map_len, bar1map_len, bar2map_len;
9329 int error = -ENODEV;
2fcee4bf 9330 uint32_t if_type;
da0436e9
JS
9331
9332 /* Obtain PCI device reference */
9333 if (!phba->pcidev)
9334 return error;
9335 else
9336 pdev = phba->pcidev;
9337
9338 /* Set the device DMA mask size */
8e68597d
MR
9339 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
9340 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
9341 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
9342 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 9343 return error;
8e68597d
MR
9344 }
9345 }
da0436e9 9346
2fcee4bf
JS
9347 /*
9348 * The BARs and register set definitions and offset locations are
9349 * dependent on the if_type.
9350 */
9351 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
9352 &phba->sli4_hba.sli_intf.word0)) {
9353 return error;
9354 }
9355
9356 /* There is no SLI3 failback for SLI4 devices. */
9357 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
9358 LPFC_SLI_INTF_VALID) {
9359 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9360 "2894 SLI_INTF reg contents invalid "
9361 "sli_intf reg 0x%x\n",
9362 phba->sli4_hba.sli_intf.word0);
9363 return error;
9364 }
9365
9366 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9367 /*
9368 * Get the bus address of SLI4 device Bar regions and the
9369 * number of bytes required by each mapping. The mapping of the
9370 * particular PCI BARs regions is dependent on the type of
9371 * SLI4 device.
da0436e9 9372 */
f5ca6f2e
JS
9373 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
9374 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
9375 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS
9376
9377 /*
9378 * Map SLI4 PCI Config Space Register base to a kernel virtual
9379 * addr
9380 */
9381 phba->sli4_hba.conf_regs_memmap_p =
9382 ioremap(phba->pci_bar0_map, bar0map_len);
9383 if (!phba->sli4_hba.conf_regs_memmap_p) {
9384 dev_printk(KERN_ERR, &pdev->dev,
9385 "ioremap failed for SLI4 PCI config "
9386 "registers.\n");
9387 goto out;
9388 }
f5ca6f2e 9389 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS
9390 /* Set up BAR0 PCI config space register memory map */
9391 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS
9392 } else {
9393 phba->pci_bar0_map = pci_resource_start(pdev, 1);
9394 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS
9395 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
9396 dev_printk(KERN_ERR, &pdev->dev,
9397 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
9398 goto out;
9399 }
9400 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 9401 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS
9402 if (!phba->sli4_hba.conf_regs_memmap_p) {
9403 dev_printk(KERN_ERR, &pdev->dev,
9404 "ioremap failed for SLI4 PCI config "
9405 "registers.\n");
9406 goto out;
9407 }
9408 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS
9409 }
9410
c31098ce 9411 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9412 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
2fcee4bf
JS
9413 /*
9414 * Map SLI4 if type 0 HBA Control Register base to a kernel
9415 * virtual address and setup the registers.
9416 */
f5ca6f2e
JS
9417 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
9418 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
2fcee4bf 9419 phba->sli4_hba.ctrl_regs_memmap_p =
da0436e9 9420 ioremap(phba->pci_bar1_map, bar1map_len);
2fcee4bf
JS
9421 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
9422 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9423 "ioremap failed for SLI4 HBA control registers.\n");
2fcee4bf
JS
9424 goto out_iounmap_conf;
9425 }
f5ca6f2e 9426 phba->pci_bar2_memmap_p = phba->sli4_hba.ctrl_regs_memmap_p;
2fcee4bf 9427 lpfc_sli4_bar1_register_memmap(phba);
da0436e9
JS
9428 }
9429
c31098ce 9430 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9431 (pci_resource_start(pdev, PCI_64BIT_BAR4))) {
2fcee4bf
JS
9432 /*
9433 * Map SLI4 if type 0 HBA Doorbell Register base to a kernel
9434 * virtual address and setup the registers.
9435 */
f5ca6f2e
JS
9436 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
9437 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
2fcee4bf 9438 phba->sli4_hba.drbl_regs_memmap_p =
da0436e9 9439 ioremap(phba->pci_bar2_map, bar2map_len);
2fcee4bf
JS
9440 if (!phba->sli4_hba.drbl_regs_memmap_p) {
9441 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9442 "ioremap failed for SLI4 HBA doorbell registers.\n");
2fcee4bf
JS
9443 goto out_iounmap_ctrl;
9444 }
f5ca6f2e 9445 phba->pci_bar4_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
2fcee4bf
JS
9446 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
9447 if (error)
9448 goto out_iounmap_all;
da0436e9
JS
9449 }
9450
da0436e9
JS
9451 return 0;
9452
9453out_iounmap_all:
9454 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9455out_iounmap_ctrl:
9456 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9457out_iounmap_conf:
9458 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9459out:
9460 return error;
9461}
9462
9463/**
9464 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
9465 * @phba: pointer to lpfc hba data structure.
9466 *
9467 * This routine is invoked to unset the PCI device memory space for device
9468 * with SLI-4 interface spec.
9469 **/
9470static void
9471lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
9472{
2e90f4b5
JS
9473 uint32_t if_type;
9474 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 9475
2e90f4b5
JS
9476 switch (if_type) {
9477 case LPFC_SLI_INTF_IF_TYPE_0:
9478 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9479 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9480 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9481 break;
9482 case LPFC_SLI_INTF_IF_TYPE_2:
9483 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9484 break;
9485 case LPFC_SLI_INTF_IF_TYPE_1:
9486 default:
9487 dev_printk(KERN_ERR, &phba->pcidev->dev,
9488 "FATAL - unsupported SLI4 interface type - %d\n",
9489 if_type);
9490 break;
9491 }
da0436e9
JS
9492}
9493
9494/**
9495 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
9496 * @phba: pointer to lpfc hba data structure.
9497 *
9498 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9499 * with SLI-3 interface specs.
da0436e9
JS
9500 *
9501 * Return codes
af901ca1 9502 * 0 - successful
da0436e9
JS
9503 * other values - error
9504 **/
9505static int
9506lpfc_sli_enable_msix(struct lpfc_hba *phba)
9507{
45ffac19 9508 int rc;
da0436e9
JS
9509 LPFC_MBOXQ_t *pmb;
9510
9511 /* Set up MSI-X multi-message vectors */
45ffac19
CH
9512 rc = pci_alloc_irq_vectors(phba->pcidev,
9513 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
9514 if (rc < 0) {
da0436e9
JS
9515 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9516 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9517 goto vec_fail_out;
da0436e9 9518 }
45ffac19 9519
da0436e9
JS
9520 /*
9521 * Assign MSI-X vectors to interrupt handlers
9522 */
9523
9524 /* vector-0 is associated to slow-path handler */
45ffac19 9525 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 9526 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS
9527 LPFC_SP_DRIVER_HANDLER_NAME, phba);
9528 if (rc) {
9529 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9530 "0421 MSI-X slow-path request_irq failed "
9531 "(%d)\n", rc);
9532 goto msi_fail_out;
9533 }
9534
9535 /* vector-1 is associated to fast-path handler */
45ffac19 9536 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 9537 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS
9538 LPFC_FP_DRIVER_HANDLER_NAME, phba);
9539
9540 if (rc) {
9541 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9542 "0429 MSI-X fast-path request_irq failed "
9543 "(%d)\n", rc);
9544 goto irq_fail_out;
9545 }
9546
9547 /*
9548 * Configure HBA MSI-X attention conditions to messages
9549 */
9550 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9551
9552 if (!pmb) {
9553 rc = -ENOMEM;
9554 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9555 "0474 Unable to allocate memory for issuing "
9556 "MBOX_CONFIG_MSI command\n");
9557 goto mem_fail_out;
9558 }
9559 rc = lpfc_config_msi(phba, pmb);
9560 if (rc)
9561 goto mbx_fail_out;
9562 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9563 if (rc != MBX_SUCCESS) {
9564 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
9565 "0351 Config MSI mailbox command failed, "
9566 "mbxCmd x%x, mbxStatus x%x\n",
9567 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
9568 goto mbx_fail_out;
9569 }
9570
9571 /* Free memory allocated for mailbox command */
9572 mempool_free(pmb, phba->mbox_mem_pool);
9573 return rc;
9574
9575mbx_fail_out:
9576 /* Free memory allocated for mailbox command */
9577 mempool_free(pmb, phba->mbox_mem_pool);
9578
9579mem_fail_out:
9580 /* free the irq already requested */
45ffac19 9581 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS
9582
9583irq_fail_out:
9584 /* free the irq already requested */
45ffac19 9585 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS
9586
9587msi_fail_out:
9588 /* Unconfigure MSI-X capability structure */
45ffac19 9589 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9590
9591vec_fail_out:
da0436e9
JS
9592 return rc;
9593}
9594
da0436e9
JS
9595/**
9596 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
9597 * @phba: pointer to lpfc hba data structure.
9598 *
9599 * This routine is invoked to enable the MSI interrupt mode to device with
9600 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
9601 * enable the MSI vector. The device driver is responsible for calling the
9602 * request_irq() to register MSI vector with a interrupt the handler, which
9603 * is done in this function.
9604 *
9605 * Return codes
af901ca1 9606 * 0 - successful
da0436e9
JS
9607 * other values - error
9608 */
9609static int
9610lpfc_sli_enable_msi(struct lpfc_hba *phba)
9611{
9612 int rc;
9613
9614 rc = pci_enable_msi(phba->pcidev);
9615 if (!rc)
9616 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9617 "0462 PCI enable MSI mode success.\n");
9618 else {
9619 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9620 "0471 PCI enable MSI mode failed (%d)\n", rc);
9621 return rc;
9622 }
9623
9624 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9625 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9626 if (rc) {
9627 pci_disable_msi(phba->pcidev);
9628 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9629 "0478 MSI request_irq failed (%d)\n", rc);
9630 }
9631 return rc;
9632}
9633
da0436e9
JS
9634/**
9635 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9636 * @phba: pointer to lpfc hba data structure.
9637 *
9638 * This routine is invoked to enable device interrupt and associate driver's
9639 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9640 * spec. Depends on the interrupt mode configured to the driver, the driver
9641 * will try to fallback from the configured interrupt mode to an interrupt
9642 * mode which is supported by the platform, kernel, and device in the order
9643 * of:
9644 * MSI-X -> MSI -> IRQ.
9645 *
9646 * Return codes
af901ca1 9647 * 0 - successful
da0436e9
JS
9648 * other values - error
9649 **/
9650static uint32_t
9651lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9652{
9653 uint32_t intr_mode = LPFC_INTR_ERROR;
9654 int retval;
9655
9656 if (cfg_mode == 2) {
9657 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9658 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9659 if (!retval) {
9660 /* Now, try to enable MSI-X interrupt mode */
9661 retval = lpfc_sli_enable_msix(phba);
9662 if (!retval) {
9663 /* Indicate initialization to MSI-X mode */
9664 phba->intr_type = MSIX;
9665 intr_mode = 2;
9666 }
9667 }
9668 }
9669
9670 /* Fallback to MSI if MSI-X initialization failed */
9671 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9672 retval = lpfc_sli_enable_msi(phba);
9673 if (!retval) {
9674 /* Indicate initialization to MSI mode */
9675 phba->intr_type = MSI;
9676 intr_mode = 1;
9677 }
9678 }
9679
9680 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9681 if (phba->intr_type == NONE) {
9682 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9683 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9684 if (!retval) {
9685 /* Indicate initialization to INTx mode */
9686 phba->intr_type = INTx;
9687 intr_mode = 0;
9688 }
9689 }
9690 return intr_mode;
9691}
9692
9693/**
9694 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9695 * @phba: pointer to lpfc hba data structure.
9696 *
9697 * This routine is invoked to disable device interrupt and disassociate the
9698 * driver's interrupt handler(s) from interrupt vector(s) to device with
9699 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9700 * release the interrupt vector(s) for the message signaled interrupt.
9701 **/
9702static void
9703lpfc_sli_disable_intr(struct lpfc_hba *phba)
9704{
45ffac19
CH
9705 int nr_irqs, i;
9706
da0436e9 9707 if (phba->intr_type == MSIX)
45ffac19
CH
9708 nr_irqs = LPFC_MSIX_VECTORS;
9709 else
9710 nr_irqs = 1;
9711
9712 for (i = 0; i < nr_irqs; i++)
9713 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9714 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9715
9716 /* Reset interrupt management states */
9717 phba->intr_type = NONE;
9718 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9719}
9720
7bb03bbf 9721/**
895427bd 9722 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9723 * @phba: pointer to lpfc hba data structure.
895427bd
JS
9724 * @vectors: number of msix vectors allocated.
9725 *
9726 * The routine will figure out the CPU affinity assignment for every
9727 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9728 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9729 * can be associated with. If the vector can be unquely associated with
9730 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9731 * In addition, the CPU to IO channel mapping will be calculated
9732 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9733 */
895427bd
JS
9734static void
9735lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS
9736{
9737 struct lpfc_vector_map_info *cpup;
895427bd
JS
9738 int index = 0;
9739 int vec = 0;
7bb03bbf 9740 int cpu;
7bb03bbf
JS
9741#ifdef CONFIG_X86
9742 struct cpuinfo_x86 *cpuinfo;
9743#endif
7bb03bbf
JS
9744
9745 /* Init cpu_map array */
9746 memset(phba->sli4_hba.cpu_map, 0xff,
9747 (sizeof(struct lpfc_vector_map_info) *
895427bd 9748 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS
9749
9750 /* Update CPU map with physical id and core id of each CPU */
9751 cpup = phba->sli4_hba.cpu_map;
9752 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9753#ifdef CONFIG_X86
9754 cpuinfo = &cpu_data(cpu);
9755 cpup->phys_id = cpuinfo->phys_proc_id;
9756 cpup->core_id = cpuinfo->cpu_core_id;
9757#else
9758 /* No distinction between CPUs for other platforms */
9759 cpup->phys_id = 0;
9760 cpup->core_id = 0;
9761#endif
895427bd
JS
9762 cpup->channel_id = index; /* For now round robin */
9763 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9764 vec++;
9765 if (vec >= vectors)
9766 vec = 0;
9767 index++;
9768 if (index >= phba->cfg_fcp_io_channel)
9769 index = 0;
7bb03bbf
JS
9770 cpup++;
9771 }
7bb03bbf
JS
9772}
9773
9774
da0436e9
JS
9775/**
9776 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9777 * @phba: pointer to lpfc hba data structure.
9778 *
9779 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9780 * with SLI-4 interface spec.
da0436e9
JS
9781 *
9782 * Return codes
af901ca1 9783 * 0 - successful
da0436e9
JS
9784 * other values - error
9785 **/
9786static int
9787lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9788{
75baf696 9789 int vectors, rc, index;
b83d005e 9790 char *name;
da0436e9
JS
9791
9792 /* Set up MSI-X multi-message vectors */
895427bd 9793 vectors = phba->io_channel_irqs;
45ffac19 9794 if (phba->cfg_fof)
1ba981fd 9795 vectors++;
45ffac19 9796
f358dd0c
JS
9797 rc = pci_alloc_irq_vectors(phba->pcidev,
9798 (phba->nvmet_support) ? 1 : 2,
9799 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9800 if (rc < 0) {
da0436e9
JS
9801 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9802 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9803 goto vec_fail_out;
da0436e9 9804 }
4f871e1b 9805 vectors = rc;
75baf696 9806
7bb03bbf 9807 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9808 for (index = 0; index < vectors; index++) {
b83d005e
JS
9809 name = phba->sli4_hba.hba_eq_hdl[index].handler_name;
9810 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
9811 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9812 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9813
895427bd
JS
9814 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9815 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9816 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9817 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9818 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9819 &lpfc_sli4_fof_intr_handler, 0,
b83d005e 9820 name,
895427bd 9821 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9822 else
45ffac19 9823 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9824 &lpfc_sli4_hba_intr_handler, 0,
b83d005e 9825 name,
895427bd 9826 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS
9827 if (rc) {
9828 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9829 "0486 MSI-X fast-path (%d) "
9830 "request_irq failed (%d)\n", index, rc);
9831 goto cfg_fail_out;
9832 }
9833 }
9834
1ba981fd
JS
9835 if (phba->cfg_fof)
9836 vectors--;
9837
895427bd 9838 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS
9839 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9840 "3238 Reducing IO channels to match number of "
9841 "MSI-X vectors, requested %d got %d\n",
895427bd
JS
9842 phba->io_channel_irqs, vectors);
9843 if (phba->cfg_fcp_io_channel > vectors)
9844 phba->cfg_fcp_io_channel = vectors;
9845 if (phba->cfg_nvme_io_channel > vectors)
9846 phba->cfg_nvme_io_channel = vectors;
9847 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9848 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9849 else
9850 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9851 }
895427bd 9852 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9853
da0436e9
JS
9854 return rc;
9855
9856cfg_fail_out:
9857 /* free the irq already requested */
895427bd
JS
9858 for (--index; index >= 0; index--)
9859 free_irq(pci_irq_vector(phba->pcidev, index),
9860 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9861
da0436e9 9862 /* Unconfigure MSI-X capability structure */
45ffac19 9863 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9864
9865vec_fail_out:
da0436e9
JS
9866 return rc;
9867}
9868
da0436e9
JS
9869/**
9870 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9871 * @phba: pointer to lpfc hba data structure.
9872 *
9873 * This routine is invoked to enable the MSI interrupt mode to device with
9874 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9875 * to enable the MSI vector. The device driver is responsible for calling
9876 * the request_irq() to register MSI vector with a interrupt the handler,
9877 * which is done in this function.
9878 *
9879 * Return codes
af901ca1 9880 * 0 - successful
da0436e9
JS
9881 * other values - error
9882 **/
9883static int
9884lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9885{
9886 int rc, index;
9887
9888 rc = pci_enable_msi(phba->pcidev);
9889 if (!rc)
9890 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9891 "0487 PCI enable MSI mode success.\n");
9892 else {
9893 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9894 "0488 PCI enable MSI mode failed (%d)\n", rc);
9895 return rc;
9896 }
9897
9898 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9899 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9900 if (rc) {
9901 pci_disable_msi(phba->pcidev);
9902 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9903 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9904 return rc;
da0436e9
JS
9905 }
9906
895427bd
JS
9907 for (index = 0; index < phba->io_channel_irqs; index++) {
9908 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9909 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS
9910 }
9911
1ba981fd 9912 if (phba->cfg_fof) {
895427bd
JS
9913 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9914 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 9915 }
75baf696 9916 return 0;
da0436e9
JS
9917}
9918
da0436e9
JS
9919/**
9920 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
9921 * @phba: pointer to lpfc hba data structure.
9922 *
9923 * This routine is invoked to enable device interrupt and associate driver's
9924 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
9925 * interface spec. Depends on the interrupt mode configured to the driver,
9926 * the driver will try to fallback from the configured interrupt mode to an
9927 * interrupt mode which is supported by the platform, kernel, and device in
9928 * the order of:
9929 * MSI-X -> MSI -> IRQ.
9930 *
9931 * Return codes
af901ca1 9932 * 0 - successful
da0436e9
JS
9933 * other values - error
9934 **/
9935static uint32_t
9936lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9937{
9938 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 9939 int retval, idx;
da0436e9
JS
9940
9941 if (cfg_mode == 2) {
9942 /* Preparation before conf_msi mbox cmd */
9943 retval = 0;
9944 if (!retval) {
9945 /* Now, try to enable MSI-X interrupt mode */
9946 retval = lpfc_sli4_enable_msix(phba);
9947 if (!retval) {
9948 /* Indicate initialization to MSI-X mode */
9949 phba->intr_type = MSIX;
9950 intr_mode = 2;
9951 }
9952 }
9953 }
9954
9955 /* Fallback to MSI if MSI-X initialization failed */
9956 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9957 retval = lpfc_sli4_enable_msi(phba);
9958 if (!retval) {
9959 /* Indicate initialization to MSI mode */
9960 phba->intr_type = MSI;
9961 intr_mode = 1;
9962 }
9963 }
9964
9965 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9966 if (phba->intr_type == NONE) {
9967 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
9968 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9969 if (!retval) {
895427bd
JS
9970 struct lpfc_hba_eq_hdl *eqhdl;
9971
da0436e9
JS
9972 /* Indicate initialization to INTx mode */
9973 phba->intr_type = INTx;
9974 intr_mode = 0;
895427bd
JS
9975
9976 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
9977 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9978 eqhdl->idx = idx;
9979 eqhdl->phba = phba;
9980 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 9981 }
1ba981fd 9982 if (phba->cfg_fof) {
895427bd
JS
9983 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9984 eqhdl->idx = idx;
9985 eqhdl->phba = phba;
9986 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 9987 }
da0436e9
JS
9988 }
9989 }
9990 return intr_mode;
9991}
9992
9993/**
9994 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
9995 * @phba: pointer to lpfc hba data structure.
9996 *
9997 * This routine is invoked to disable device interrupt and disassociate
9998 * the driver's interrupt handler(s) from interrupt vector(s) to device
9999 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
10000 * will release the interrupt vector(s) for the message signaled interrupt.
10001 **/
10002static void
10003lpfc_sli4_disable_intr(struct lpfc_hba *phba)
10004{
10005 /* Disable the currently initialized interrupt mode */
45ffac19
CH
10006 if (phba->intr_type == MSIX) {
10007 int index;
10008
10009 /* Free up MSI-X multi-message vectors */
895427bd
JS
10010 for (index = 0; index < phba->io_channel_irqs; index++)
10011 free_irq(pci_irq_vector(phba->pcidev, index),
10012 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH
10013
10014 if (phba->cfg_fof)
895427bd
JS
10015 free_irq(pci_irq_vector(phba->pcidev, index),
10016 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 10017 } else {
da0436e9 10018 free_irq(phba->pcidev->irq, phba);
45ffac19
CH
10019 }
10020
10021 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
10022
10023 /* Reset interrupt management states */
10024 phba->intr_type = NONE;
10025 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
10026}
10027
10028/**
10029 * lpfc_unset_hba - Unset SLI3 hba device initialization
10030 * @phba: pointer to lpfc hba data structure.
10031 *
10032 * This routine is invoked to unset the HBA device initialization steps to
10033 * a device with SLI-3 interface spec.
10034 **/
10035static void
10036lpfc_unset_hba(struct lpfc_hba *phba)
10037{
10038 struct lpfc_vport *vport = phba->pport;
10039 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
10040
10041 spin_lock_irq(shost->host_lock);
10042 vport->load_flag |= FC_UNLOADING;
10043 spin_unlock_irq(shost->host_lock);
10044
72859909
JS
10045 kfree(phba->vpi_bmask);
10046 kfree(phba->vpi_ids);
10047
da0436e9
JS
10048 lpfc_stop_hba_timers(phba);
10049
10050 phba->pport->work_port_events = 0;
10051
10052 lpfc_sli_hba_down(phba);
10053
10054 lpfc_sli_brdrestart(phba);
10055
10056 lpfc_sli_disable_intr(phba);
10057
10058 return;
10059}
10060
5af5eee7
JS
10061/**
10062 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
10063 * @phba: Pointer to HBA context object.
10064 *
10065 * This function is called in the SLI4 code path to wait for completion
10066 * of device's XRIs exchange busy. It will check the XRI exchange busy
10067 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
10068 * that, it will check the XRI exchange busy on outstanding FCP and ELS
10069 * I/Os every 30 seconds, log error message, and wait forever. Only when
10070 * all XRI exchange busy complete, the driver unload shall proceed with
10071 * invoking the function reset ioctl mailbox command to the CNA and the
10072 * the rest of the driver unload resource release.
10073 **/
10074static void
10075lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
10076{
10077 int wait_time = 0;
895427bd 10078 int nvme_xri_cmpl = 1;
86c67379 10079 int nvmet_xri_cmpl = 1;
895427bd 10080 int fcp_xri_cmpl = 1;
5af5eee7
JS
10081 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
10082
895427bd
JS
10083 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10084 fcp_xri_cmpl =
10085 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
86c67379 10086 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
10087 nvme_xri_cmpl =
10088 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS
10089 nvmet_xri_cmpl =
10090 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10091 }
895427bd 10092
f358dd0c
JS
10093 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl ||
10094 !nvmet_xri_cmpl) {
5af5eee7 10095 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS
10096 if (!nvme_xri_cmpl)
10097 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10098 "6100 NVME XRI exchange busy "
10099 "wait time: %d seconds.\n",
10100 wait_time/1000);
5af5eee7
JS
10101 if (!fcp_xri_cmpl)
10102 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10103 "2877 FCP XRI exchange busy "
10104 "wait time: %d seconds.\n",
10105 wait_time/1000);
10106 if (!els_xri_cmpl)
10107 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10108 "2878 ELS XRI exchange busy "
10109 "wait time: %d seconds.\n",
10110 wait_time/1000);
10111 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
10112 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
10113 } else {
10114 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
10115 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
10116 }
86c67379 10117 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
10118 nvme_xri_cmpl = list_empty(
10119 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS
10120 nvmet_xri_cmpl = list_empty(
10121 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10122 }
895427bd
JS
10123
10124 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10125 fcp_xri_cmpl = list_empty(
10126 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
10127
5af5eee7
JS
10128 els_xri_cmpl =
10129 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 10130
5af5eee7
JS
10131 }
10132}
10133
da0436e9
JS
10134/**
10135 * lpfc_sli4_hba_unset - Unset the fcoe hba
10136 * @phba: Pointer to HBA context object.
10137 *
10138 * This function is called in the SLI4 code path to reset the HBA's FCoE
10139 * function. The caller is not required to hold any lock. This routine
10140 * issues PCI function reset mailbox command to reset the FCoE function.
10141 * At the end of the function, it calls lpfc_hba_down_post function to
10142 * free any pending commands.
10143 **/
10144static void
10145lpfc_sli4_hba_unset(struct lpfc_hba *phba)
10146{
10147 int wait_cnt = 0;
10148 LPFC_MBOXQ_t *mboxq;
912e3acd 10149 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS
10150
10151 lpfc_stop_hba_timers(phba);
10152 phba->sli4_hba.intr_enable = 0;
10153
10154 /*
10155 * Gracefully wait out the potential current outstanding asynchronous
10156 * mailbox command.
10157 */
10158
10159 /* First, block any pending async mailbox command from posted */
10160 spin_lock_irq(&phba->hbalock);
10161 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
10162 spin_unlock_irq(&phba->hbalock);
10163 /* Now, trying to wait it out if we can */
10164 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10165 msleep(10);
10166 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
10167 break;
10168 }
10169 /* Forcefully release the outstanding mailbox command if timed out */
10170 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10171 spin_lock_irq(&phba->hbalock);
10172 mboxq = phba->sli.mbox_active;
10173 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
10174 __lpfc_mbox_cmpl_put(phba, mboxq);
10175 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10176 phba->sli.mbox_active = NULL;
10177 spin_unlock_irq(&phba->hbalock);
10178 }
10179
5af5eee7
JS
10180 /* Abort all iocbs associated with the hba */
10181 lpfc_sli_hba_iocb_abort(phba);
10182
10183 /* Wait for completion of device XRI exchange busy */
10184 lpfc_sli4_xri_exchange_busy_wait(phba);
10185
da0436e9
JS
10186 /* Disable PCI subsystem interrupt */
10187 lpfc_sli4_disable_intr(phba);
10188
912e3acd
JS
10189 /* Disable SR-IOV if enabled */
10190 if (phba->cfg_sriov_nr_virtfn)
10191 pci_disable_sriov(pdev);
10192
da0436e9
JS
10193 /* Stop kthread signal shall trigger work_done one more time */
10194 kthread_stop(phba->worker_thread);
10195
d1f525aa
JS
10196 /* Unset the queues shared with the hardware then release all
10197 * allocated resources.
10198 */
10199 lpfc_sli4_queue_unset(phba);
10200 lpfc_sli4_queue_destroy(phba);
10201
3677a3a7
JS
10202 /* Reset SLI4 HBA FCoE function */
10203 lpfc_pci_function_reset(phba);
10204
da0436e9
JS
10205 /* Stop the SLI4 device port */
10206 phba->pport->work_port_events = 0;
10207}
10208
28baac74
JS
10209 /**
10210 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
10211 * @phba: Pointer to HBA context object.
10212 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10213 *
10214 * This function is called in the SLI4 code path to read the port's
10215 * sli4 capabilities.
10216 *
10217 * This function may be be called from any context that can block-wait
10218 * for the completion. The expectation is that this routine is called
10219 * typically from probe_one or from the online routine.
10220 **/
10221int
10222lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10223{
10224 int rc;
10225 struct lpfc_mqe *mqe;
10226 struct lpfc_pc_sli4_params *sli4_params;
10227 uint32_t mbox_tmo;
10228
10229 rc = 0;
10230 mqe = &mboxq->u.mqe;
10231
10232 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 10233 lpfc_pc_sli4_params(mboxq);
28baac74
JS
10234 if (!phba->sli4_hba.intr_enable)
10235 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10236 else {
a183a15f 10237 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS
10238 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10239 }
10240
10241 if (unlikely(rc))
10242 return 1;
10243
10244 sli4_params = &phba->sli4_hba.pc_sli4_params;
10245 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
10246 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
10247 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
10248 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
10249 &mqe->un.sli4_params);
10250 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
10251 &mqe->un.sli4_params);
10252 sli4_params->proto_types = mqe->un.sli4_params.word3;
10253 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
10254 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
10255 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
10256 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
10257 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
10258 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
10259 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
10260 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
10261 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
10262 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
10263 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
10264 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
10265 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
10266 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
10267 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
10268 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
10269 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
10270 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
10271 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
10272 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS
10273
10274 /* Make sure that sge_supp_len can be handled by the driver */
10275 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10276 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10277
28baac74
JS
10278 return rc;
10279}
10280
fedd3b7b
JS
10281/**
10282 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
10283 * @phba: Pointer to HBA context object.
10284 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10285 *
10286 * This function is called in the SLI4 code path to read the port's
10287 * sli4 capabilities.
10288 *
10289 * This function may be be called from any context that can block-wait
10290 * for the completion. The expectation is that this routine is called
10291 * typically from probe_one or from the online routine.
10292 **/
10293int
10294lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10295{
10296 int rc;
10297 struct lpfc_mqe *mqe = &mboxq->u.mqe;
10298 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 10299 uint32_t mbox_tmo;
fedd3b7b
JS
10300 int length;
10301 struct lpfc_sli4_parameters *mbx_sli4_parameters;
10302
6d368e53
JS
10303 /*
10304 * By default, the driver assumes the SLI4 port requires RPI
10305 * header postings. The SLI4_PARAM response will correct this
10306 * assumption.
10307 */
10308 phba->sli4_hba.rpi_hdrs_in_use = 1;
10309
fedd3b7b
JS
10310 /* Read the port's SLI4 Config Parameters */
10311 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
10312 sizeof(struct lpfc_sli4_cfg_mhdr));
10313 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
10314 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
10315 length, LPFC_SLI4_MBX_EMBED);
10316 if (!phba->sli4_hba.intr_enable)
10317 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS
10318 else {
10319 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
10320 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10321 }
fedd3b7b
JS
10322 if (unlikely(rc))
10323 return rc;
10324 sli4_params = &phba->sli4_hba.pc_sli4_params;
10325 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
10326 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
10327 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
10328 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
10329 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
10330 mbx_sli4_parameters);
10331 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
10332 mbx_sli4_parameters);
10333 if (bf_get(cfg_phwq, mbx_sli4_parameters))
10334 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
10335 else
10336 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
10337 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
10338 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 10339 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS
10340 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
10341 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
10342 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
10343 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 10344 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS
10345 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
10346 mbx_sli4_parameters);
895427bd 10347 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS
10348 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
10349 mbx_sli4_parameters);
6d368e53
JS
10350 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
10351 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS
10352 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
10353 bf_get(cfg_xib, mbx_sli4_parameters));
10354
10355 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
10356 !phba->nvme_support) {
10357 phba->nvme_support = 0;
10358 phba->nvmet_support = 0;
2d7dbc4c 10359 phba->cfg_nvmet_mrq = 0;
895427bd
JS
10360 phba->cfg_nvme_io_channel = 0;
10361 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
10362 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
10363 "6101 Disabling NVME support: "
10364 "Not supported by firmware: %d %d\n",
10365 bf_get(cfg_nvme, mbx_sli4_parameters),
10366 bf_get(cfg_xib, mbx_sli4_parameters));
10367
10368 /* If firmware doesn't support NVME, just use SCSI support */
10369 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
10370 return -ENODEV;
10371 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
10372 }
0558056c 10373
f358dd0c
JS
10374 if (bf_get(cfg_xib, mbx_sli4_parameters) && phba->cfg_suppress_rsp)
10375 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
10376
0cf07f84
JS
10377 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
10378 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
10379
0558056c
JS
10380 /* Make sure that sge_supp_len can be handled by the driver */
10381 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10382 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10383
b5c53958
JS
10384 /*
10385 * Issue IOs with CDB embedded in WQE to minimized the number
10386 * of DMAs the firmware has to do. Setting this to 1 also forces
10387 * the driver to use 128 bytes WQEs for FCP IOs.
10388 */
10389 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
10390 phba->fcp_embed_io = 1;
10391 else
10392 phba->fcp_embed_io = 0;
7bdedb34
JS
10393
10394 /*
10395 * Check if the SLI port supports MDS Diagnostics
10396 */
10397 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
10398 phba->mds_diags_support = 1;
10399 else
10400 phba->mds_diags_support = 0;
fedd3b7b
JS
10401 return 0;
10402}
10403
da0436e9
JS
10404/**
10405 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
10406 * @pdev: pointer to PCI device
10407 * @pid: pointer to PCI device identifier
10408 *
10409 * This routine is to be called to attach a device with SLI-3 interface spec
10410 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10411 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
10412 * information of the device and driver to see if the driver state that it can
10413 * support this kind of device. If the match is successful, the driver core
10414 * invokes this routine. If this routine determines it can claim the HBA, it
10415 * does all the initialization that it needs to do to handle the HBA properly.
10416 *
10417 * Return code
10418 * 0 - driver can claim the device
10419 * negative value - driver can not claim the device
10420 **/
6f039790 10421static int
da0436e9
JS
10422lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
10423{
10424 struct lpfc_hba *phba;
10425 struct lpfc_vport *vport = NULL;
6669f9bb 10426 struct Scsi_Host *shost = NULL;
da0436e9
JS
10427 int error;
10428 uint32_t cfg_mode, intr_mode;
10429
10430 /* Allocate memory for HBA structure */
10431 phba = lpfc_hba_alloc(pdev);
10432 if (!phba)
10433 return -ENOMEM;
10434
10435 /* Perform generic PCI device enabling operation */
10436 error = lpfc_enable_pci_dev(phba);
079b5c91 10437 if (error)
da0436e9 10438 goto out_free_phba;
da0436e9
JS
10439
10440 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
10441 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
10442 if (error)
10443 goto out_disable_pci_dev;
10444
10445 /* Set up SLI-3 specific device PCI memory space */
10446 error = lpfc_sli_pci_mem_setup(phba);
10447 if (error) {
10448 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10449 "1402 Failed to set up pci memory space.\n");
10450 goto out_disable_pci_dev;
10451 }
10452
da0436e9
JS
10453 /* Set up SLI-3 specific device driver resources */
10454 error = lpfc_sli_driver_resource_setup(phba);
10455 if (error) {
10456 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10457 "1404 Failed to set up driver resource.\n");
10458 goto out_unset_pci_mem_s3;
10459 }
10460
10461 /* Initialize and populate the iocb list per host */
d1f525aa 10462
da0436e9
JS
10463 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
10464 if (error) {
10465 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10466 "1405 Failed to initialize iocb list.\n");
10467 goto out_unset_driver_resource_s3;
10468 }
10469
10470 /* Set up common device driver resources */
10471 error = lpfc_setup_driver_resource_phase2(phba);
10472 if (error) {
10473 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10474 "1406 Failed to set up driver resource.\n");
10475 goto out_free_iocb_list;
10476 }
10477
079b5c91
JS
10478 /* Get the default values for Model Name and Description */
10479 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10480
da0436e9
JS
10481 /* Create SCSI host to the physical port */
10482 error = lpfc_create_shost(phba);
10483 if (error) {
10484 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10485 "1407 Failed to create scsi host.\n");
10486 goto out_unset_driver_resource;
10487 }
10488
10489 /* Configure sysfs attributes */
10490 vport = phba->pport;
10491 error = lpfc_alloc_sysfs_attr(vport);
10492 if (error) {
10493 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10494 "1476 Failed to allocate sysfs attr\n");
10495 goto out_destroy_shost;
10496 }
10497
6669f9bb 10498 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS
10499 /* Now, trying to enable interrupt and bring up the device */
10500 cfg_mode = phba->cfg_use_msi;
10501 while (true) {
10502 /* Put device to a known state before enabling interrupt */
10503 lpfc_stop_port(phba);
10504 /* Configure and enable interrupt */
10505 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
10506 if (intr_mode == LPFC_INTR_ERROR) {
10507 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10508 "0431 Failed to enable interrupt.\n");
10509 error = -ENODEV;
10510 goto out_free_sysfs_attr;
10511 }
10512 /* SLI-3 HBA setup */
10513 if (lpfc_sli_hba_setup(phba)) {
10514 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10515 "1477 Failed to set up hba\n");
10516 error = -ENODEV;
10517 goto out_remove_device;
10518 }
10519
10520 /* Wait 50ms for the interrupts of previous mailbox commands */
10521 msleep(50);
10522 /* Check active interrupts on message signaled interrupts */
10523 if (intr_mode == 0 ||
10524 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
10525 /* Log the current active interrupt mode */
10526 phba->intr_mode = intr_mode;
10527 lpfc_log_intr_mode(phba, intr_mode);
10528 break;
10529 } else {
10530 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10531 "0447 Configure interrupt mode (%d) "
10532 "failed active interrupt test.\n",
10533 intr_mode);
10534 /* Disable the current interrupt mode */
10535 lpfc_sli_disable_intr(phba);
10536 /* Try next level of interrupt mode */
10537 cfg_mode = --intr_mode;
10538 }
10539 }
10540
10541 /* Perform post initialization setup */
10542 lpfc_post_init_setup(phba);
10543
10544 /* Check if there are static vports to be created. */
10545 lpfc_create_static_vport(phba);
10546
10547 return 0;
10548
10549out_remove_device:
10550 lpfc_unset_hba(phba);
10551out_free_sysfs_attr:
10552 lpfc_free_sysfs_attr(vport);
10553out_destroy_shost:
10554 lpfc_destroy_shost(phba);
10555out_unset_driver_resource:
10556 lpfc_unset_driver_resource_phase2(phba);
10557out_free_iocb_list:
10558 lpfc_free_iocb_list(phba);
10559out_unset_driver_resource_s3:
10560 lpfc_sli_driver_resource_unset(phba);
10561out_unset_pci_mem_s3:
10562 lpfc_sli_pci_mem_unset(phba);
10563out_disable_pci_dev:
10564 lpfc_disable_pci_dev(phba);
6669f9bb
JS
10565 if (shost)
10566 scsi_host_put(shost);
da0436e9
JS
10567out_free_phba:
10568 lpfc_hba_free(phba);
10569 return error;
10570}
10571
10572/**
10573 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
10574 * @pdev: pointer to PCI device
10575 *
10576 * This routine is to be called to disattach a device with SLI-3 interface
10577 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10578 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10579 * device to be removed from the PCI subsystem properly.
10580 **/
6f039790 10581static void
da0436e9
JS
10582lpfc_pci_remove_one_s3(struct pci_dev *pdev)
10583{
10584 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10585 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10586 struct lpfc_vport **vports;
10587 struct lpfc_hba *phba = vport->phba;
10588 int i;
da0436e9
JS
10589
10590 spin_lock_irq(&phba->hbalock);
10591 vport->load_flag |= FC_UNLOADING;
10592 spin_unlock_irq(&phba->hbalock);
10593
10594 lpfc_free_sysfs_attr(vport);
10595
10596 /* Release all the vports against this physical port */
10597 vports = lpfc_create_vport_work_array(phba);
10598 if (vports != NULL)
587a37f6
JS
10599 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10600 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10601 continue;
da0436e9 10602 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10603 }
da0436e9
JS
10604 lpfc_destroy_vport_work_array(phba, vports);
10605
10606 /* Remove FC host and then SCSI host with the physical port */
10607 fc_remove_host(shost);
10608 scsi_remove_host(shost);
d613b6a7 10609
da0436e9
JS
10610 lpfc_cleanup(vport);
10611
10612 /*
10613 * Bring down the SLI Layer. This step disable all interrupts,
10614 * clears the rings, discards all mailbox commands, and resets
10615 * the HBA.
10616 */
10617
48e34d0f 10618 /* HBA interrupt will be disabled after this call */
da0436e9
JS
10619 lpfc_sli_hba_down(phba);
10620 /* Stop kthread signal shall trigger work_done one more time */
10621 kthread_stop(phba->worker_thread);
10622 /* Final cleanup of txcmplq and reset the HBA */
10623 lpfc_sli_brdrestart(phba);
10624
72859909
JS
10625 kfree(phba->vpi_bmask);
10626 kfree(phba->vpi_ids);
10627
da0436e9
JS
10628 lpfc_stop_hba_timers(phba);
10629 spin_lock_irq(&phba->hbalock);
10630 list_del_init(&vport->listentry);
10631 spin_unlock_irq(&phba->hbalock);
10632
10633 lpfc_debugfs_terminate(vport);
10634
912e3acd
JS
10635 /* Disable SR-IOV if enabled */
10636 if (phba->cfg_sriov_nr_virtfn)
10637 pci_disable_sriov(pdev);
10638
da0436e9
JS
10639 /* Disable interrupt */
10640 lpfc_sli_disable_intr(phba);
10641
da0436e9
JS
10642 scsi_host_put(shost);
10643
10644 /*
10645 * Call scsi_free before mem_free since scsi bufs are released to their
10646 * corresponding pools here.
10647 */
10648 lpfc_scsi_free(phba);
10649 lpfc_mem_free_all(phba);
10650
10651 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10652 phba->hbqslimp.virt, phba->hbqslimp.phys);
10653
10654 /* Free resources associated with SLI2 interface */
10655 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10656 phba->slim2p.virt, phba->slim2p.phys);
10657
10658 /* unmap adapter SLIM and Control Registers */
10659 iounmap(phba->ctrl_regs_memmap_p);
10660 iounmap(phba->slim_memmap_p);
10661
10662 lpfc_hba_free(phba);
10663
e0c0483c 10664 pci_release_mem_regions(pdev);
da0436e9
JS
10665 pci_disable_device(pdev);
10666}
10667
10668/**
10669 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10670 * @pdev: pointer to PCI device
10671 * @msg: power management message
10672 *
10673 * This routine is to be called from the kernel's PCI subsystem to support
10674 * system Power Management (PM) to device with SLI-3 interface spec. When
10675 * PM invokes this method, it quiesces the device by stopping the driver's
10676 * worker thread for the device, turning off device's interrupt and DMA,
10677 * and bring the device offline. Note that as the driver implements the
10678 * minimum PM requirements to a power-aware driver's PM support for the
10679 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10680 * to the suspend() method call will be treated as SUSPEND and the driver will
10681 * fully reinitialize its device during resume() method call, the driver will
10682 * set device to PCI_D3hot state in PCI config space instead of setting it
10683 * according to the @msg provided by the PM.
10684 *
10685 * Return code
10686 * 0 - driver suspended the device
10687 * Error otherwise
10688 **/
10689static int
10690lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10691{
10692 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10693 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10694
10695 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10696 "0473 PCI device Power Management suspend.\n");
10697
10698 /* Bring down the device */
618a5230 10699 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10700 lpfc_offline(phba);
10701 kthread_stop(phba->worker_thread);
10702
10703 /* Disable interrupt from device */
10704 lpfc_sli_disable_intr(phba);
10705
10706 /* Save device state to PCI config space */
10707 pci_save_state(pdev);
10708 pci_set_power_state(pdev, PCI_D3hot);
10709
10710 return 0;
10711}
10712
10713/**
10714 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10715 * @pdev: pointer to PCI device
10716 *
10717 * This routine is to be called from the kernel's PCI subsystem to support
10718 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10719 * invokes this method, it restores the device's PCI config space state and
10720 * fully reinitializes the device and brings it online. Note that as the
10721 * driver implements the minimum PM requirements to a power-aware driver's
10722 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10723 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10724 * driver will fully reinitialize its device during resume() method call,
10725 * the device will be set to PCI_D0 directly in PCI config space before
10726 * restoring the state.
10727 *
10728 * Return code
10729 * 0 - driver suspended the device
10730 * Error otherwise
10731 **/
10732static int
10733lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10734{
10735 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10736 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10737 uint32_t intr_mode;
10738 int error;
10739
10740 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10741 "0452 PCI device Power Management resume.\n");
10742
10743 /* Restore device state from PCI config space */
10744 pci_set_power_state(pdev, PCI_D0);
10745 pci_restore_state(pdev);
0d878419 10746
1dfb5a47
JS
10747 /*
10748 * As the new kernel behavior of pci_restore_state() API call clears
10749 * device saved_state flag, need to save the restored state again.
10750 */
10751 pci_save_state(pdev);
10752
da0436e9
JS
10753 if (pdev->is_busmaster)
10754 pci_set_master(pdev);
10755
10756 /* Startup the kernel thread for this host adapter. */
10757 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10758 "lpfc_worker_%d", phba->brd_no);
10759 if (IS_ERR(phba->worker_thread)) {
10760 error = PTR_ERR(phba->worker_thread);
10761 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10762 "0434 PM resume failed to start worker "
10763 "thread: error=x%x.\n", error);
10764 return error;
10765 }
10766
10767 /* Configure and enable interrupt */
10768 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10769 if (intr_mode == LPFC_INTR_ERROR) {
10770 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10771 "0430 PM resume Failed to enable interrupt\n");
10772 return -EIO;
10773 } else
10774 phba->intr_mode = intr_mode;
10775
10776 /* Restart HBA and bring it online */
10777 lpfc_sli_brdrestart(phba);
10778 lpfc_online(phba);
10779
10780 /* Log the current active interrupt mode */
10781 lpfc_log_intr_mode(phba, phba->intr_mode);
10782
10783 return 0;
10784}
10785
891478a2
JS
10786/**
10787 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10788 * @phba: pointer to lpfc hba data structure.
10789 *
10790 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10791 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS
10792 **/
10793static void
10794lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10795{
10796 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10797 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS
10798
10799 /*
10800 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10801 * and let the SCSI mid-layer to retry them to recover.
10802 */
db55fba8 10803 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS
10804}
10805
0d878419
JS
10806/**
10807 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10808 * @phba: pointer to lpfc hba data structure.
10809 *
10810 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10811 * disables the device interrupt and pci device, and aborts the internal FCP
10812 * pending I/Os.
10813 **/
10814static void
10815lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10816{
0d878419 10817 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10818 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10819
75baf696 10820 /* Block any management I/Os to the device */
618a5230 10821 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10822
e2af0d2e
JS
10823 /* Block all SCSI devices' I/Os on the host */
10824 lpfc_scsi_dev_block(phba);
10825
ea714f3d
JS
10826 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10827 lpfc_sli_flush_fcp_rings(phba);
10828
e2af0d2e
JS
10829 /* stop all timers */
10830 lpfc_stop_hba_timers(phba);
10831
0d878419
JS
10832 /* Disable interrupt and pci device */
10833 lpfc_sli_disable_intr(phba);
10834 pci_disable_device(phba->pcidev);
0d878419
JS
10835}
10836
10837/**
10838 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10839 * @phba: pointer to lpfc hba data structure.
10840 *
10841 * This routine is called to prepare the SLI3 device for PCI slot permanently
10842 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10843 * pending I/Os.
10844 **/
10845static void
75baf696 10846lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS
10847{
10848 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10849 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS
10850 /* Block all SCSI devices' I/Os on the host */
10851 lpfc_scsi_dev_block(phba);
10852
10853 /* stop all timers */
10854 lpfc_stop_hba_timers(phba);
10855
0d878419
JS
10856 /* Clean up all driver's outstanding SCSI I/Os */
10857 lpfc_sli_flush_fcp_rings(phba);
10858}
10859
da0436e9
JS
10860/**
10861 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10862 * @pdev: pointer to PCI device.
10863 * @state: the current PCI connection state.
10864 *
10865 * This routine is called from the PCI subsystem for I/O error handling to
10866 * device with SLI-3 interface spec. This function is called by the PCI
10867 * subsystem after a PCI bus error affecting this device has been detected.
10868 * When this function is invoked, it will need to stop all the I/Os and
10869 * interrupt(s) to the device. Once that is done, it will return
10870 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10871 * as desired.
10872 *
10873 * Return codes
0d878419 10874 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS
10875 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10876 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10877 **/
10878static pci_ers_result_t
10879lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10880{
10881 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10882 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10883
0d878419
JS
10884 switch (state) {
10885 case pci_channel_io_normal:
891478a2
JS
10886 /* Non-fatal error, prepare for recovery */
10887 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS
10888 return PCI_ERS_RESULT_CAN_RECOVER;
10889 case pci_channel_io_frozen:
10890 /* Fatal error, prepare for slot reset */
10891 lpfc_sli_prep_dev_for_reset(phba);
10892 return PCI_ERS_RESULT_NEED_RESET;
10893 case pci_channel_io_perm_failure:
10894 /* Permanent failure, prepare for device down */
75baf696 10895 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 10896 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS
10897 default:
10898 /* Unknown state, prepare and request slot reset */
10899 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10900 "0472 Unknown PCI error state: x%x\n", state);
10901 lpfc_sli_prep_dev_for_reset(phba);
10902 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 10903 }
da0436e9
JS
10904}
10905
10906/**
10907 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
10908 * @pdev: pointer to PCI device.
10909 *
10910 * This routine is called from the PCI subsystem for error handling to
10911 * device with SLI-3 interface spec. This is called after PCI bus has been
10912 * reset to restart the PCI card from scratch, as if from a cold-boot.
10913 * During the PCI subsystem error recovery, after driver returns
10914 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
10915 * recovery and then call this routine before calling the .resume method
10916 * to recover the device. This function will initialize the HBA device,
10917 * enable the interrupt, but it will just put the HBA to offline state
10918 * without passing any I/O traffic.
10919 *
10920 * Return codes
10921 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
10922 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10923 */
10924static pci_ers_result_t
10925lpfc_io_slot_reset_s3(struct pci_dev *pdev)
10926{
10927 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10928 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10929 struct lpfc_sli *psli = &phba->sli;
10930 uint32_t intr_mode;
10931
10932 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
10933 if (pci_enable_device_mem(pdev)) {
10934 printk(KERN_ERR "lpfc: Cannot re-enable "
10935 "PCI device after reset.\n");
10936 return PCI_ERS_RESULT_DISCONNECT;
10937 }
10938
10939 pci_restore_state(pdev);
1dfb5a47
JS
10940
10941 /*
10942 * As the new kernel behavior of pci_restore_state() API call clears
10943 * device saved_state flag, need to save the restored state again.
10944 */
10945 pci_save_state(pdev);
10946
da0436e9
JS
10947 if (pdev->is_busmaster)
10948 pci_set_master(pdev);
10949
10950 spin_lock_irq(&phba->hbalock);
10951 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
10952 spin_unlock_irq(&phba->hbalock);
10953
10954 /* Configure and enable interrupt */
10955 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10956 if (intr_mode == LPFC_INTR_ERROR) {
10957 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10958 "0427 Cannot re-enable interrupt after "
10959 "slot reset.\n");
10960 return PCI_ERS_RESULT_DISCONNECT;
10961 } else
10962 phba->intr_mode = intr_mode;
10963
75baf696 10964 /* Take device offline, it will perform cleanup */
618a5230 10965 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10966 lpfc_offline(phba);
10967 lpfc_sli_brdrestart(phba);
10968
10969 /* Log the current active interrupt mode */
10970 lpfc_log_intr_mode(phba, phba->intr_mode);
10971
10972 return PCI_ERS_RESULT_RECOVERED;
10973}
10974
10975/**
10976 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
10977 * @pdev: pointer to PCI device
10978 *
10979 * This routine is called from the PCI subsystem for error handling to device
10980 * with SLI-3 interface spec. It is called when kernel error recovery tells
10981 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
10982 * error recovery. After this call, traffic can start to flow from this device
10983 * again.
10984 */
10985static void
10986lpfc_io_resume_s3(struct pci_dev *pdev)
10987{
10988 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10989 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 10990
e2af0d2e 10991 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 10992 lpfc_online(phba);
0d878419
JS
10993
10994 /* Clean up Advanced Error Reporting (AER) if needed */
10995 if (phba->hba_flag & HBA_AER_ENABLED)
10996 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 10997}
3772a991 10998
da0436e9
JS
10999/**
11000 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
11001 * @phba: pointer to lpfc hba data structure.
11002 *
11003 * returns the number of ELS/CT IOCBs to reserve
11004 **/
11005int
11006lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
11007{
11008 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
11009
f1126688
JS
11010 if (phba->sli_rev == LPFC_SLI_REV4) {
11011 if (max_xri <= 100)
6a9c52cf 11012 return 10;
f1126688 11013 else if (max_xri <= 256)
6a9c52cf 11014 return 25;
f1126688 11015 else if (max_xri <= 512)
6a9c52cf 11016 return 50;
f1126688 11017 else if (max_xri <= 1024)
6a9c52cf 11018 return 100;
8a9d2e80 11019 else if (max_xri <= 1536)
6a9c52cf 11020 return 150;
8a9d2e80
JS
11021 else if (max_xri <= 2048)
11022 return 200;
11023 else
11024 return 250;
f1126688
JS
11025 } else
11026 return 0;
3772a991
JS
11027}
11028
895427bd
JS
11029/**
11030 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
11031 * @phba: pointer to lpfc hba data structure.
11032 *
f358dd0c 11033 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS
11034 **/
11035int
11036lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
11037{
11038 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
11039
f358dd0c
JS
11040 if (phba->nvmet_support)
11041 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS
11042 return max_xri;
11043}
11044
11045
52d52440
JS
11046/**
11047 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 11048 * @fw: pointer to firmware image returned from request_firmware.
ce396282 11049 * @phba: pointer to lpfc hba data structure.
52d52440 11050 *
52d52440 11051 **/
ce396282
JS
11052static void
11053lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 11054{
ce396282 11055 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 11056 char fwrev[FW_REV_STR_SIZE];
ce396282 11057 struct lpfc_grp_hdr *image;
52d52440
JS
11058 struct list_head dma_buffer_list;
11059 int i, rc = 0;
11060 struct lpfc_dmabuf *dmabuf, *next;
11061 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 11062 uint32_t magic_number, ftype, fid, fsize;
52d52440 11063
c71ab861 11064 /* It can be null in no-wait mode, sanity check */
ce396282
JS
11065 if (!fw) {
11066 rc = -ENXIO;
11067 goto out;
11068 }
11069 image = (struct lpfc_grp_hdr *)fw->data;
11070
6b6ef5db
JS
11071 magic_number = be32_to_cpu(image->magic_number);
11072 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
11073 fid = bf_get_be32(lpfc_grp_hdr_id, image),
11074 fsize = be32_to_cpu(image->size);
11075
52d52440 11076 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS
11077 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
11078 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
11079 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS
11080 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11081 "3022 Invalid FW image found. "
efe583c6 11082 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 11083 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS
11084 rc = -EINVAL;
11085 goto release_out;
52d52440
JS
11086 }
11087 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 11088 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 11089 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 11090 "3023 Updating Firmware, Current Version:%s "
52d52440 11091 "New Version:%s\n",
88a2cfbb 11092 fwrev, image->revision);
52d52440
JS
11093 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
11094 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
11095 GFP_KERNEL);
11096 if (!dmabuf) {
11097 rc = -ENOMEM;
ce396282 11098 goto release_out;
52d52440
JS
11099 }
11100 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
11101 SLI4_PAGE_SIZE,
11102 &dmabuf->phys,
11103 GFP_KERNEL);
11104 if (!dmabuf->virt) {
11105 kfree(dmabuf);
11106 rc = -ENOMEM;
ce396282 11107 goto release_out;
52d52440
JS
11108 }
11109 list_add_tail(&dmabuf->list, &dma_buffer_list);
11110 }
11111 while (offset < fw->size) {
11112 temp_offset = offset;
11113 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 11114 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS
11115 memcpy(dmabuf->virt,
11116 fw->data + temp_offset,
079b5c91
JS
11117 fw->size - temp_offset);
11118 temp_offset = fw->size;
52d52440
JS
11119 break;
11120 }
52d52440
JS
11121 memcpy(dmabuf->virt, fw->data + temp_offset,
11122 SLI4_PAGE_SIZE);
88a2cfbb 11123 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS
11124 }
11125 rc = lpfc_wr_object(phba, &dma_buffer_list,
11126 (fw->size - offset), &offset);
ce396282
JS
11127 if (rc)
11128 goto release_out;
52d52440
JS
11129 }
11130 rc = offset;
11131 }
ce396282
JS
11132
11133release_out:
52d52440
JS
11134 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
11135 list_del(&dmabuf->list);
11136 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
11137 dmabuf->virt, dmabuf->phys);
11138 kfree(dmabuf);
11139 }
ce396282
JS
11140 release_firmware(fw);
11141out:
11142 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 11143 "3024 Firmware update done: %d.\n", rc);
ce396282 11144 return;
52d52440
JS
11145}
11146
c71ab861
JS
11147/**
11148 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
11149 * @phba: pointer to lpfc hba data structure.
11150 *
11151 * This routine is called to perform Linux generic firmware upgrade on device
11152 * that supports such feature.
11153 **/
11154int
11155lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
11156{
11157 uint8_t file_name[ELX_MODEL_NAME_SIZE];
11158 int ret;
11159 const struct firmware *fw;
11160
11161 /* Only supported on SLI4 interface type 2 for now */
11162 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11163 LPFC_SLI_INTF_IF_TYPE_2)
11164 return -EPERM;
11165
11166 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
11167
11168 if (fw_upgrade == INT_FW_UPGRADE) {
11169 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
11170 file_name, &phba->pcidev->dev,
11171 GFP_KERNEL, (void *)phba,
11172 lpfc_write_firmware);
11173 } else if (fw_upgrade == RUN_FW_UPGRADE) {
11174 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
11175 if (!ret)
11176 lpfc_write_firmware(fw, (void *)phba);
11177 } else {
11178 ret = -EINVAL;
11179 }
11180
11181 return ret;
11182}
11183
3772a991 11184/**
da0436e9 11185 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS
11186 * @pdev: pointer to PCI device
11187 * @pid: pointer to PCI device identifier
11188 *
da0436e9
JS
11189 * This routine is called from the kernel's PCI subsystem to device with
11190 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 11191 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS
11192 * information of the device and driver to see if the driver state that it
11193 * can support this kind of device. If the match is successful, the driver
11194 * core invokes this routine. If this routine determines it can claim the HBA,
11195 * it does all the initialization that it needs to do to handle the HBA
11196 * properly.
3772a991
JS
11197 *
11198 * Return code
11199 * 0 - driver can claim the device
11200 * negative value - driver can not claim the device
11201 **/
6f039790 11202static int
da0436e9 11203lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS
11204{
11205 struct lpfc_hba *phba;
11206 struct lpfc_vport *vport = NULL;
6669f9bb 11207 struct Scsi_Host *shost = NULL;
6c621a22 11208 int error;
3772a991
JS
11209 uint32_t cfg_mode, intr_mode;
11210
11211 /* Allocate memory for HBA structure */
11212 phba = lpfc_hba_alloc(pdev);
11213 if (!phba)
11214 return -ENOMEM;
11215
11216 /* Perform generic PCI device enabling operation */
11217 error = lpfc_enable_pci_dev(phba);
079b5c91 11218 if (error)
3772a991 11219 goto out_free_phba;
3772a991 11220
da0436e9
JS
11221 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
11222 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS
11223 if (error)
11224 goto out_disable_pci_dev;
11225
da0436e9
JS
11226 /* Set up SLI-4 specific device PCI memory space */
11227 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS
11228 if (error) {
11229 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11230 "1410 Failed to set up pci memory space.\n");
3772a991
JS
11231 goto out_disable_pci_dev;
11232 }
11233
da0436e9
JS
11234 /* Set up SLI-4 Specific device driver resources */
11235 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS
11236 if (error) {
11237 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
11238 "1412 Failed to set up driver resource.\n");
11239 goto out_unset_pci_mem_s4;
3772a991
JS
11240 }
11241
19ca7609 11242 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 11243 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 11244
3772a991
JS
11245 /* Set up common device driver resources */
11246 error = lpfc_setup_driver_resource_phase2(phba);
11247 if (error) {
11248 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11249 "1414 Failed to set up driver resource.\n");
6c621a22 11250 goto out_unset_driver_resource_s4;
3772a991
JS
11251 }
11252
079b5c91
JS
11253 /* Get the default values for Model Name and Description */
11254 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11255
3772a991
JS
11256 /* Create SCSI host to the physical port */
11257 error = lpfc_create_shost(phba);
11258 if (error) {
11259 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11260 "1415 Failed to create scsi host.\n");
3772a991
JS
11261 goto out_unset_driver_resource;
11262 }
9399627f 11263
5b75da2f 11264 /* Configure sysfs attributes */
3772a991
JS
11265 vport = phba->pport;
11266 error = lpfc_alloc_sysfs_attr(vport);
11267 if (error) {
9399627f 11268 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11269 "1416 Failed to allocate sysfs attr\n");
3772a991 11270 goto out_destroy_shost;
98c9ea5c 11271 }
875fbdfe 11272
6669f9bb 11273 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 11274 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 11275 cfg_mode = phba->cfg_use_msi;
5b75da2f 11276
7b15db32
JS
11277 /* Put device to a known state before enabling interrupt */
11278 lpfc_stop_port(phba);
895427bd 11279
7b15db32
JS
11280 /* Configure and enable interrupt */
11281 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
11282 if (intr_mode == LPFC_INTR_ERROR) {
11283 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11284 "0426 Failed to enable interrupt.\n");
11285 error = -ENODEV;
11286 goto out_free_sysfs_attr;
11287 }
11288 /* Default to single EQ for non-MSI-X */
895427bd
JS
11289 if (phba->intr_type != MSIX) {
11290 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
11291 phba->cfg_fcp_io_channel = 1;
2d7dbc4c 11292 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd 11293 phba->cfg_nvme_io_channel = 1;
2d7dbc4c
JS
11294 if (phba->nvmet_support)
11295 phba->cfg_nvmet_mrq = 1;
11296 }
895427bd
JS
11297 phba->io_channel_irqs = 1;
11298 }
11299
7b15db32
JS
11300 /* Set up SLI-4 HBA */
11301 if (lpfc_sli4_hba_setup(phba)) {
11302 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11303 "1421 Failed to set up hba\n");
11304 error = -ENODEV;
11305 goto out_disable_intr;
98c9ea5c 11306 }
858c9f6c 11307
7b15db32
JS
11308 /* Log the current active interrupt mode */
11309 phba->intr_mode = intr_mode;
11310 lpfc_log_intr_mode(phba, intr_mode);
11311
3772a991
JS
11312 /* Perform post initialization setup */
11313 lpfc_post_init_setup(phba);
dea3101e 11314
01649561
JS
11315 /* NVME support in FW earlier in the driver load corrects the
11316 * FC4 type making a check for nvme_support unnecessary.
11317 */
11318 if ((phba->nvmet_support == 0) &&
11319 (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
11320 /* Create NVME binding with nvme_fc_transport. This
d1f525aa
JS
11321 * ensures the vport is initialized. If the localport
11322 * create fails, it should not unload the driver to
11323 * support field issues.
01649561
JS
11324 */
11325 error = lpfc_nvme_create_localport(vport);
11326 if (error) {
11327 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11328 "6004 NVME registration failed, "
11329 "error x%x\n",
11330 error);
01649561
JS
11331 }
11332 }
895427bd 11333
c71ab861
JS
11334 /* check for firmware upgrade or downgrade */
11335 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 11336 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 11337
1c6834a7
JS
11338 /* Check if there are static vports to be created. */
11339 lpfc_create_static_vport(phba);
dea3101e
JB
11340 return 0;
11341
da0436e9
JS
11342out_disable_intr:
11343 lpfc_sli4_disable_intr(phba);
5b75da2f
JS
11344out_free_sysfs_attr:
11345 lpfc_free_sysfs_attr(vport);
3772a991
JS
11346out_destroy_shost:
11347 lpfc_destroy_shost(phba);
11348out_unset_driver_resource:
11349 lpfc_unset_driver_resource_phase2(phba);
da0436e9
JS
11350out_unset_driver_resource_s4:
11351 lpfc_sli4_driver_resource_unset(phba);
11352out_unset_pci_mem_s4:
11353 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS
11354out_disable_pci_dev:
11355 lpfc_disable_pci_dev(phba);
6669f9bb
JS
11356 if (shost)
11357 scsi_host_put(shost);
2e0fef85 11358out_free_phba:
3772a991 11359 lpfc_hba_free(phba);
dea3101e
JB
11360 return error;
11361}
11362
e59058c4 11363/**
da0436e9 11364 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS
11365 * @pdev: pointer to PCI device
11366 *
da0436e9
JS
11367 * This routine is called from the kernel's PCI subsystem to device with
11368 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS
11369 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11370 * device to be removed from the PCI subsystem properly.
e59058c4 11371 **/
6f039790 11372static void
da0436e9 11373lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 11374{
da0436e9 11375 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 11376 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 11377 struct lpfc_vport **vports;
da0436e9 11378 struct lpfc_hba *phba = vport->phba;
eada272d 11379 int i;
8a4df120 11380
da0436e9 11381 /* Mark the device unloading flag */
549e55cd 11382 spin_lock_irq(&phba->hbalock);
51ef4c26 11383 vport->load_flag |= FC_UNLOADING;
549e55cd 11384 spin_unlock_irq(&phba->hbalock);
2e0fef85 11385
da0436e9 11386 /* Free the HBA sysfs attributes */
858c9f6c
JS
11387 lpfc_free_sysfs_attr(vport);
11388
eada272d
JS
11389 /* Release all the vports against this physical port */
11390 vports = lpfc_create_vport_work_array(phba);
11391 if (vports != NULL)
587a37f6
JS
11392 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11393 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11394 continue;
eada272d 11395 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11396 }
eada272d
JS
11397 lpfc_destroy_vport_work_array(phba, vports);
11398
11399 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS
11400 fc_remove_host(shost);
11401 scsi_remove_host(shost);
da0436e9 11402
d613b6a7
JS
11403 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
11404 * localports are destroyed after to cleanup all transport memory.
895427bd 11405 */
87af33fe 11406 lpfc_cleanup(vport);
d613b6a7
JS
11407 lpfc_nvmet_destroy_targetport(phba);
11408 lpfc_nvme_destroy_localport(vport);
87af33fe 11409
2e0fef85 11410 /*
da0436e9 11411 * Bring down the SLI Layer. This step disables all interrupts,
2e0fef85 11412 * clears the rings, discards all mailbox commands, and resets
da0436e9 11413 * the HBA FCoE function.
2e0fef85 11414 */
da0436e9
JS
11415 lpfc_debugfs_terminate(vport);
11416 lpfc_sli4_hba_unset(phba);
a257bf90 11417
858c9f6c
JS
11418 spin_lock_irq(&phba->hbalock);
11419 list_del_init(&vport->listentry);
11420 spin_unlock_irq(&phba->hbalock);
11421
3677a3a7 11422 /* Perform scsi free before driver resource_unset since scsi
da0436e9 11423 * buffers are released to their corresponding pools here.
2e0fef85
JS
11424 */
11425 lpfc_scsi_free(phba);
895427bd 11426 lpfc_nvme_free(phba);
01649561 11427 lpfc_free_iocb_list(phba);
67d12733 11428
da0436e9 11429 lpfc_sli4_driver_resource_unset(phba);
ed957684 11430
da0436e9
JS
11431 /* Unmap adapter Control and Doorbell registers */
11432 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 11433
da0436e9
JS
11434 /* Release PCI resources and disable device's PCI function */
11435 scsi_host_put(shost);
11436 lpfc_disable_pci_dev(phba);
2e0fef85 11437
da0436e9 11438 /* Finally, free the driver's device data structure */
3772a991 11439 lpfc_hba_free(phba);
2e0fef85 11440
da0436e9 11441 return;
dea3101e
JB
11442}
11443
3a55b532 11444/**
da0436e9 11445 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS
11446 * @pdev: pointer to PCI device
11447 * @msg: power management message
11448 *
da0436e9
JS
11449 * This routine is called from the kernel's PCI subsystem to support system
11450 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
11451 * this method, it quiesces the device by stopping the driver's worker
11452 * thread for the device, turning off device's interrupt and DMA, and bring
11453 * the device offline. Note that as the driver implements the minimum PM
11454 * requirements to a power-aware driver's PM support for suspend/resume -- all
11455 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
11456 * method call will be treated as SUSPEND and the driver will fully
11457 * reinitialize its device during resume() method call, the driver will set
11458 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 11459 * according to the @msg provided by the PM.
3a55b532
JS
11460 *
11461 * Return code
3772a991
JS
11462 * 0 - driver suspended the device
11463 * Error otherwise
3a55b532
JS
11464 **/
11465static int
da0436e9 11466lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS
11467{
11468 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11469 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11470
11471 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 11472 "2843 PCI device Power Management suspend.\n");
3a55b532
JS
11473
11474 /* Bring down the device */
618a5230 11475 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS
11476 lpfc_offline(phba);
11477 kthread_stop(phba->worker_thread);
11478
11479 /* Disable interrupt from device */
da0436e9 11480 lpfc_sli4_disable_intr(phba);
5350d872 11481 lpfc_sli4_queue_destroy(phba);
3a55b532
JS
11482
11483 /* Save device state to PCI config space */
11484 pci_save_state(pdev);
11485 pci_set_power_state(pdev, PCI_D3hot);
11486
11487 return 0;
11488}
11489
11490/**
da0436e9 11491 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS
11492 * @pdev: pointer to PCI device
11493 *
da0436e9
JS
11494 * This routine is called from the kernel's PCI subsystem to support system
11495 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
11496 * this method, it restores the device's PCI config space state and fully
11497 * reinitializes the device and brings it online. Note that as the driver
11498 * implements the minimum PM requirements to a power-aware driver's PM for
11499 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11500 * to the suspend() method call will be treated as SUSPEND and the driver
11501 * will fully reinitialize its device during resume() method call, the device
11502 * will be set to PCI_D0 directly in PCI config space before restoring the
11503 * state.
3a55b532
JS
11504 *
11505 * Return code
3772a991
JS
11506 * 0 - driver suspended the device
11507 * Error otherwise
3a55b532
JS
11508 **/
11509static int
da0436e9 11510lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS
11511{
11512 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11513 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 11514 uint32_t intr_mode;
3a55b532
JS
11515 int error;
11516
11517 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 11518 "0292 PCI device Power Management resume.\n");
3a55b532
JS
11519
11520 /* Restore device state from PCI config space */
11521 pci_set_power_state(pdev, PCI_D0);
11522 pci_restore_state(pdev);
1dfb5a47
JS
11523
11524 /*
11525 * As the new kernel behavior of pci_restore_state() API call clears
11526 * device saved_state flag, need to save the restored state again.
11527 */
11528 pci_save_state(pdev);
11529
3a55b532
JS
11530 if (pdev->is_busmaster)
11531 pci_set_master(pdev);
11532
da0436e9 11533 /* Startup the kernel thread for this host adapter. */
3a55b532
JS
11534 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11535 "lpfc_worker_%d", phba->brd_no);
11536 if (IS_ERR(phba->worker_thread)) {
11537 error = PTR_ERR(phba->worker_thread);
11538 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11539 "0293 PM resume failed to start worker "
3a55b532
JS
11540 "thread: error=x%x.\n", error);
11541 return error;
11542 }
11543
5b75da2f 11544 /* Configure and enable interrupt */
da0436e9 11545 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 11546 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 11547 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11548 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS
11549 return -EIO;
11550 } else
11551 phba->intr_mode = intr_mode;
3a55b532
JS
11552
11553 /* Restart HBA and bring it online */
11554 lpfc_sli_brdrestart(phba);
11555 lpfc_online(phba);
11556
5b75da2f
JS
11557 /* Log the current active interrupt mode */
11558 lpfc_log_intr_mode(phba, phba->intr_mode);
11559
3a55b532
JS
11560 return 0;
11561}
11562
75baf696
JS
11563/**
11564 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
11565 * @phba: pointer to lpfc hba data structure.
11566 *
11567 * This routine is called to prepare the SLI4 device for PCI slot recover. It
11568 * aborts all the outstanding SCSI I/Os to the pci device.
11569 **/
11570static void
11571lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
11572{
75baf696
JS
11573 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11574 "2828 PCI channel I/O abort preparing for recovery\n");
11575 /*
11576 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11577 * and let the SCSI mid-layer to retry them to recover.
11578 */
db55fba8 11579 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS
11580}
11581
11582/**
11583 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
11584 * @phba: pointer to lpfc hba data structure.
11585 *
11586 * This routine is called to prepare the SLI4 device for PCI slot reset. It
11587 * disables the device interrupt and pci device, and aborts the internal FCP
11588 * pending I/Os.
11589 **/
11590static void
11591lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
11592{
11593 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11594 "2826 PCI channel disable preparing for reset\n");
11595
11596 /* Block any management I/Os to the device */
618a5230 11597 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS
11598
11599 /* Block all SCSI devices' I/Os on the host */
11600 lpfc_scsi_dev_block(phba);
11601
ea714f3d
JS
11602 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11603 lpfc_sli_flush_fcp_rings(phba);
11604
75baf696
JS
11605 /* stop all timers */
11606 lpfc_stop_hba_timers(phba);
11607
11608 /* Disable interrupt and pci device */
11609 lpfc_sli4_disable_intr(phba);
5350d872 11610 lpfc_sli4_queue_destroy(phba);
75baf696 11611 pci_disable_device(phba->pcidev);
75baf696
JS
11612}
11613
11614/**
11615 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
11616 * @phba: pointer to lpfc hba data structure.
11617 *
11618 * This routine is called to prepare the SLI4 device for PCI slot permanently
11619 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11620 * pending I/Os.
11621 **/
11622static void
11623lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
11624{
11625 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11626 "2827 PCI channel permanent disable for failure\n");
11627
11628 /* Block all SCSI devices' I/Os on the host */
11629 lpfc_scsi_dev_block(phba);
11630
11631 /* stop all timers */
11632 lpfc_stop_hba_timers(phba);
11633
11634 /* Clean up all driver's outstanding SCSI I/Os */
11635 lpfc_sli_flush_fcp_rings(phba);
11636}
11637
8d63f375 11638/**
da0436e9 11639 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS
11640 * @pdev: pointer to PCI device.
11641 * @state: the current PCI connection state.
8d63f375 11642 *
da0436e9
JS
11643 * This routine is called from the PCI subsystem for error handling to device
11644 * with SLI-4 interface spec. This function is called by the PCI subsystem
11645 * after a PCI bus error affecting this device has been detected. When this
11646 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11647 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11648 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS
11649 *
11650 * Return codes
3772a991
JS
11651 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11652 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11653 **/
3772a991 11654static pci_ers_result_t
da0436e9 11655lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11656{
75baf696
JS
11657 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11658 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11659
11660 switch (state) {
11661 case pci_channel_io_normal:
11662 /* Non-fatal error, prepare for recovery */
11663 lpfc_sli4_prep_dev_for_recover(phba);
11664 return PCI_ERS_RESULT_CAN_RECOVER;
11665 case pci_channel_io_frozen:
11666 /* Fatal error, prepare for slot reset */
11667 lpfc_sli4_prep_dev_for_reset(phba);
11668 return PCI_ERS_RESULT_NEED_RESET;
11669 case pci_channel_io_perm_failure:
11670 /* Permanent failure, prepare for device down */
11671 lpfc_sli4_prep_dev_for_perm_failure(phba);
11672 return PCI_ERS_RESULT_DISCONNECT;
11673 default:
11674 /* Unknown state, prepare and request slot reset */
11675 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11676 "2825 Unknown PCI error state: x%x\n", state);
11677 lpfc_sli4_prep_dev_for_reset(phba);
11678 return PCI_ERS_RESULT_NEED_RESET;
11679 }
8d63f375
LV
11680}
11681
11682/**
da0436e9 11683 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS
11684 * @pdev: pointer to PCI device.
11685 *
da0436e9
JS
11686 * This routine is called from the PCI subsystem for error handling to device
11687 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11688 * restart the PCI card from scratch, as if from a cold-boot. During the
11689 * PCI subsystem error recovery, after the driver returns
3772a991 11690 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS
11691 * recovery and then call this routine before calling the .resume method to
11692 * recover the device. This function will initialize the HBA device, enable
11693 * the interrupt, but it will just put the HBA to offline state without
11694 * passing any I/O traffic.
8d63f375 11695 *
e59058c4 11696 * Return codes
3772a991
JS
11697 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11698 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11699 */
3772a991 11700static pci_ers_result_t
da0436e9 11701lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11702{
75baf696
JS
11703 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11704 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11705 struct lpfc_sli *psli = &phba->sli;
11706 uint32_t intr_mode;
11707
11708 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11709 if (pci_enable_device_mem(pdev)) {
11710 printk(KERN_ERR "lpfc: Cannot re-enable "
11711 "PCI device after reset.\n");
11712 return PCI_ERS_RESULT_DISCONNECT;
11713 }
11714
11715 pci_restore_state(pdev);
0a96e975
JS
11716
11717 /*
11718 * As the new kernel behavior of pci_restore_state() API call clears
11719 * device saved_state flag, need to save the restored state again.
11720 */
11721 pci_save_state(pdev);
11722
75baf696
JS
11723 if (pdev->is_busmaster)
11724 pci_set_master(pdev);
11725
11726 spin_lock_irq(&phba->hbalock);
11727 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11728 spin_unlock_irq(&phba->hbalock);
11729
11730 /* Configure and enable interrupt */
11731 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11732 if (intr_mode == LPFC_INTR_ERROR) {
11733 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11734 "2824 Cannot re-enable interrupt after "
11735 "slot reset.\n");
11736 return PCI_ERS_RESULT_DISCONNECT;
11737 } else
11738 phba->intr_mode = intr_mode;
11739
11740 /* Log the current active interrupt mode */
11741 lpfc_log_intr_mode(phba, phba->intr_mode);
11742
8d63f375
LV
11743 return PCI_ERS_RESULT_RECOVERED;
11744}
11745
11746/**
da0436e9 11747 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11748 * @pdev: pointer to PCI device
8d63f375 11749 *
3772a991 11750 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11751 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS
11752 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11753 * error recovery. After this call, traffic can start to flow from this device
11754 * again.
da0436e9 11755 **/
3772a991 11756static void
da0436e9 11757lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11758{
75baf696
JS
11759 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11760 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11761
11762 /*
11763 * In case of slot reset, as function reset is performed through
11764 * mailbox command which needs DMA to be enabled, this operation
11765 * has to be moved to the io resume phase. Taking device offline
11766 * will perform the necessary cleanup.
11767 */
11768 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11769 /* Perform device reset */
618a5230 11770 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS
11771 lpfc_offline(phba);
11772 lpfc_sli_brdrestart(phba);
11773 /* Bring the device back online */
11774 lpfc_online(phba);
11775 }
11776
11777 /* Clean up Advanced Error Reporting (AER) if needed */
11778 if (phba->hba_flag & HBA_AER_ENABLED)
11779 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV
11780}
11781
3772a991
JS
11782/**
11783 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11784 * @pdev: pointer to PCI device
11785 * @pid: pointer to PCI device identifier
11786 *
11787 * This routine is to be registered to the kernel's PCI subsystem. When an
11788 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11789 * at PCI device-specific information of the device and driver to see if the
11790 * driver state that it can support this kind of device. If the match is
11791 * successful, the driver core invokes this routine. This routine dispatches
11792 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11793 * do all the initialization that it needs to do to handle the HBA device
11794 * properly.
11795 *
11796 * Return code
11797 * 0 - driver can claim the device
11798 * negative value - driver can not claim the device
11799 **/
6f039790 11800static int
3772a991
JS
11801lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11802{
11803 int rc;
8fa38513 11804 struct lpfc_sli_intf intf;
3772a991 11805
28baac74 11806 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS
11807 return -ENODEV;
11808
8fa38513 11809 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11810 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11811 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11812 else
3772a991 11813 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11814
3772a991
JS
11815 return rc;
11816}
11817
11818/**
11819 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11820 * @pdev: pointer to PCI device
11821 *
11822 * This routine is to be registered to the kernel's PCI subsystem. When an
11823 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11824 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11825 * remove routine, which will perform all the necessary cleanup for the
11826 * device to be removed from the PCI subsystem properly.
11827 **/
6f039790 11828static void
3772a991
JS
11829lpfc_pci_remove_one(struct pci_dev *pdev)
11830{
11831 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11832 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11833
11834 switch (phba->pci_dev_grp) {
11835 case LPFC_PCI_DEV_LP:
11836 lpfc_pci_remove_one_s3(pdev);
11837 break;
da0436e9
JS
11838 case LPFC_PCI_DEV_OC:
11839 lpfc_pci_remove_one_s4(pdev);
11840 break;
3772a991
JS
11841 default:
11842 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11843 "1424 Invalid PCI device group: 0x%x\n",
11844 phba->pci_dev_grp);
11845 break;
11846 }
11847 return;
11848}
11849
11850/**
11851 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11852 * @pdev: pointer to PCI device
11853 * @msg: power management message
11854 *
11855 * This routine is to be registered to the kernel's PCI subsystem to support
11856 * system Power Management (PM). When PM invokes this method, it dispatches
11857 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11858 * suspend the device.
11859 *
11860 * Return code
11861 * 0 - driver suspended the device
11862 * Error otherwise
11863 **/
11864static int
11865lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11866{
11867 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11868 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11869 int rc = -ENODEV;
11870
11871 switch (phba->pci_dev_grp) {
11872 case LPFC_PCI_DEV_LP:
11873 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11874 break;
da0436e9
JS
11875 case LPFC_PCI_DEV_OC:
11876 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11877 break;
3772a991
JS
11878 default:
11879 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11880 "1425 Invalid PCI device group: 0x%x\n",
11881 phba->pci_dev_grp);
11882 break;
11883 }
11884 return rc;
11885}
11886
11887/**
11888 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
11889 * @pdev: pointer to PCI device
11890 *
11891 * This routine is to be registered to the kernel's PCI subsystem to support
11892 * system Power Management (PM). When PM invokes this method, it dispatches
11893 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
11894 * resume the device.
11895 *
11896 * Return code
11897 * 0 - driver suspended the device
11898 * Error otherwise
11899 **/
11900static int
11901lpfc_pci_resume_one(struct pci_dev *pdev)
11902{
11903 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11904 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11905 int rc = -ENODEV;
11906
11907 switch (phba->pci_dev_grp) {
11908 case LPFC_PCI_DEV_LP:
11909 rc = lpfc_pci_resume_one_s3(pdev);
11910 break;
da0436e9
JS
11911 case LPFC_PCI_DEV_OC:
11912 rc = lpfc_pci_resume_one_s4(pdev);
11913 break;
3772a991
JS
11914 default:
11915 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11916 "1426 Invalid PCI device group: 0x%x\n",
11917 phba->pci_dev_grp);
11918 break;
11919 }
11920 return rc;
11921}
11922
11923/**
11924 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
11925 * @pdev: pointer to PCI device.
11926 * @state: the current PCI connection state.
11927 *
11928 * This routine is registered to the PCI subsystem for error handling. This
11929 * function is called by the PCI subsystem after a PCI bus error affecting
11930 * this device has been detected. When this routine is invoked, it dispatches
11931 * the action to the proper SLI-3 or SLI-4 device error detected handling
11932 * routine, which will perform the proper error detected operation.
11933 *
11934 * Return codes
11935 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11936 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11937 **/
11938static pci_ers_result_t
11939lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
11940{
11941 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11942 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11943 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11944
11945 switch (phba->pci_dev_grp) {
11946 case LPFC_PCI_DEV_LP:
11947 rc = lpfc_io_error_detected_s3(pdev, state);
11948 break;
da0436e9
JS
11949 case LPFC_PCI_DEV_OC:
11950 rc = lpfc_io_error_detected_s4(pdev, state);
11951 break;
3772a991
JS
11952 default:
11953 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11954 "1427 Invalid PCI device group: 0x%x\n",
11955 phba->pci_dev_grp);
11956 break;
11957 }
11958 return rc;
11959}
11960
11961/**
11962 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
11963 * @pdev: pointer to PCI device.
11964 *
11965 * This routine is registered to the PCI subsystem for error handling. This
11966 * function is called after PCI bus has been reset to restart the PCI card
11967 * from scratch, as if from a cold-boot. When this routine is invoked, it
11968 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
11969 * routine, which will perform the proper device reset.
11970 *
11971 * Return codes
11972 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11973 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11974 **/
11975static pci_ers_result_t
11976lpfc_io_slot_reset(struct pci_dev *pdev)
11977{
11978 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11979 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11980 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11981
11982 switch (phba->pci_dev_grp) {
11983 case LPFC_PCI_DEV_LP:
11984 rc = lpfc_io_slot_reset_s3(pdev);
11985 break;
da0436e9
JS
11986 case LPFC_PCI_DEV_OC:
11987 rc = lpfc_io_slot_reset_s4(pdev);
11988 break;
3772a991
JS
11989 default:
11990 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11991 "1428 Invalid PCI device group: 0x%x\n",
11992 phba->pci_dev_grp);
11993 break;
11994 }
11995 return rc;
11996}
11997
11998/**
11999 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
12000 * @pdev: pointer to PCI device
12001 *
12002 * This routine is registered to the PCI subsystem for error handling. It
12003 * is called when kernel error recovery tells the lpfc driver that it is
12004 * OK to resume normal PCI operation after PCI bus error recovery. When
12005 * this routine is invoked, it dispatches the action to the proper SLI-3
12006 * or SLI-4 device io_resume routine, which will resume the device operation.
12007 **/
12008static void
12009lpfc_io_resume(struct pci_dev *pdev)
12010{
12011 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12012 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12013
12014 switch (phba->pci_dev_grp) {
12015 case LPFC_PCI_DEV_LP:
12016 lpfc_io_resume_s3(pdev);
12017 break;
da0436e9
JS
12018 case LPFC_PCI_DEV_OC:
12019 lpfc_io_resume_s4(pdev);
12020 break;
3772a991
JS
12021 default:
12022 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12023 "1429 Invalid PCI device group: 0x%x\n",
12024 phba->pci_dev_grp);
12025 break;
12026 }
12027 return;
12028}
12029
1ba981fd
JS
12030/**
12031 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
12032 * @phba: pointer to lpfc hba data structure.
12033 *
12034 * This routine checks to see if OAS is supported for this adapter. If
12035 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
12036 * the enable oas flag is cleared and the pool created for OAS device data
12037 * is destroyed.
12038 *
12039 **/
12040void
12041lpfc_sli4_oas_verify(struct lpfc_hba *phba)
12042{
12043
12044 if (!phba->cfg_EnableXLane)
12045 return;
12046
12047 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
12048 phba->cfg_fof = 1;
12049 } else {
f38fa0bb 12050 phba->cfg_fof = 0;
1ba981fd
JS
12051 if (phba->device_data_mem_pool)
12052 mempool_destroy(phba->device_data_mem_pool);
12053 phba->device_data_mem_pool = NULL;
12054 }
12055
12056 return;
12057}
12058
12059/**
12060 * lpfc_fof_queue_setup - Set up all the fof queues
12061 * @phba: pointer to lpfc hba data structure.
12062 *
12063 * This routine is invoked to set up all the fof queues for the FC HBA
12064 * operation.
12065 *
12066 * Return codes
12067 * 0 - successful
12068 * -ENOMEM - No available memory
12069 **/
12070int
12071lpfc_fof_queue_setup(struct lpfc_hba *phba)
12072{
895427bd 12073 struct lpfc_sli_ring *pring;
1ba981fd
JS
12074 int rc;
12075
12076 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
12077 if (rc)
12078 return -ENOMEM;
12079
f38fa0bb 12080 if (phba->cfg_fof) {
1ba981fd
JS
12081
12082 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
12083 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
12084 if (rc)
12085 goto out_oas_cq;
12086
12087 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
12088 phba->sli4_hba.oas_cq, LPFC_FCP);
12089 if (rc)
12090 goto out_oas_wq;
12091
895427bd
JS
12092 /* Bind this CQ/WQ to the NVME ring */
12093 pring = phba->sli4_hba.oas_wq->pring;
12094 pring->sli.sli4.wqp =
12095 (void *)phba->sli4_hba.oas_wq;
12096 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS
12097 }
12098
12099 return 0;
12100
12101out_oas_wq:
f38fa0bb 12102 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS
12103out_oas_cq:
12104 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
12105 return rc;
12106
12107}
12108
12109/**
12110 * lpfc_fof_queue_create - Create all the fof queues
12111 * @phba: pointer to lpfc hba data structure.
12112 *
12113 * This routine is invoked to allocate all the fof queues for the FC HBA
12114 * operation. For each SLI4 queue type, the parameters such as queue entry
12115 * count (queue depth) shall be taken from the module parameter. For now,
12116 * we just use some constant number as place holder.
12117 *
12118 * Return codes
12119 * 0 - successful
12120 * -ENOMEM - No availble memory
12121 * -EIO - The mailbox failed to complete successfully.
12122 **/
12123int
12124lpfc_fof_queue_create(struct lpfc_hba *phba)
12125{
12126 struct lpfc_queue *qdesc;
7e04e21a 12127 uint32_t wqesize;
1ba981fd
JS
12128
12129 /* Create FOF EQ */
12130 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
12131 phba->sli4_hba.eq_ecount);
12132 if (!qdesc)
12133 goto out_error;
12134
12135 phba->sli4_hba.fof_eq = qdesc;
12136
f38fa0bb 12137 if (phba->cfg_fof) {
1ba981fd
JS
12138
12139 /* Create OAS CQ */
12140 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
12141 phba->sli4_hba.cq_ecount);
12142 if (!qdesc)
12143 goto out_error;
12144
12145 phba->sli4_hba.oas_cq = qdesc;
12146
12147 /* Create OAS WQ */
7e04e21a
JS
12148 wqesize = (phba->fcp_embed_io) ?
12149 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
12150 qdesc = lpfc_sli4_queue_alloc(phba, wqesize,
1ba981fd 12151 phba->sli4_hba.wq_ecount);
7e04e21a 12152
1ba981fd
JS
12153 if (!qdesc)
12154 goto out_error;
12155
12156 phba->sli4_hba.oas_wq = qdesc;
895427bd 12157 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS
12158
12159 }
12160 return 0;
12161
12162out_error:
12163 lpfc_fof_queue_destroy(phba);
12164 return -ENOMEM;
12165}
12166
12167/**
12168 * lpfc_fof_queue_destroy - Destroy all the fof queues
12169 * @phba: pointer to lpfc hba data structure.
12170 *
12171 * This routine is invoked to release all the SLI4 queues with the FC HBA
12172 * operation.
12173 *
12174 * Return codes
12175 * 0 - successful
12176 **/
12177int
12178lpfc_fof_queue_destroy(struct lpfc_hba *phba)
12179{
12180 /* Release FOF Event queue */
12181 if (phba->sli4_hba.fof_eq != NULL) {
12182 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
12183 phba->sli4_hba.fof_eq = NULL;
12184 }
12185
12186 /* Release OAS Completion queue */
12187 if (phba->sli4_hba.oas_cq != NULL) {
12188 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
12189 phba->sli4_hba.oas_cq = NULL;
12190 }
12191
12192 /* Release OAS Work queue */
12193 if (phba->sli4_hba.oas_wq != NULL) {
12194 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
12195 phba->sli4_hba.oas_wq = NULL;
12196 }
12197 return 0;
12198}
12199
dea3101e
JB
12200MODULE_DEVICE_TABLE(pci, lpfc_id_table);
12201
a55b2d21 12202static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV
12203 .error_detected = lpfc_io_error_detected,
12204 .slot_reset = lpfc_io_slot_reset,
12205 .resume = lpfc_io_resume,
12206};
12207
dea3101e
JB
12208static struct pci_driver lpfc_driver = {
12209 .name = LPFC_DRIVER_NAME,
12210 .id_table = lpfc_id_table,
12211 .probe = lpfc_pci_probe_one,
6f039790 12212 .remove = lpfc_pci_remove_one,
85e8a239 12213 .shutdown = lpfc_pci_remove_one,
3a55b532 12214 .suspend = lpfc_pci_suspend_one,
3772a991 12215 .resume = lpfc_pci_resume_one,
2e0fef85 12216 .err_handler = &lpfc_err_handler,
dea3101e
JB
12217};
12218
3ef6d24c 12219static const struct file_operations lpfc_mgmt_fop = {
858feacd 12220 .owner = THIS_MODULE,
3ef6d24c
JS
12221};
12222
12223static struct miscdevice lpfc_mgmt_dev = {
12224 .minor = MISC_DYNAMIC_MINOR,
12225 .name = "lpfcmgmt",
12226 .fops = &lpfc_mgmt_fop,
12227};
12228
e59058c4 12229/**
3621a710 12230 * lpfc_init - lpfc module initialization routine
e59058c4
JS
12231 *
12232 * This routine is to be invoked when the lpfc module is loaded into the
12233 * kernel. The special kernel macro module_init() is used to indicate the
12234 * role of this routine to the kernel as lpfc module entry point.
12235 *
12236 * Return codes
12237 * 0 - successful
12238 * -ENOMEM - FC attach transport failed
12239 * all others - failed
12240 */
dea3101e
JB
12241static int __init
12242lpfc_init(void)
12243{
12244 int error = 0;
12245
12246 printk(LPFC_MODULE_DESC "\n");
c44ce173 12247 printk(LPFC_COPYRIGHT "\n");
dea3101e 12248
3ef6d24c
JS
12249 error = misc_register(&lpfc_mgmt_dev);
12250 if (error)
12251 printk(KERN_ERR "Could not register lpfcmgmt device, "
12252 "misc_register returned with status %d", error);
12253
458c083e
JS
12254 lpfc_transport_functions.vport_create = lpfc_vport_create;
12255 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e
JB
12256 lpfc_transport_template =
12257 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 12258 if (lpfc_transport_template == NULL)
dea3101e 12259 return -ENOMEM;
458c083e
JS
12260 lpfc_vport_transport_template =
12261 fc_attach_transport(&lpfc_vport_transport_functions);
12262 if (lpfc_vport_transport_template == NULL) {
12263 fc_release_transport(lpfc_transport_template);
12264 return -ENOMEM;
7ee5d43e 12265 }
7bb03bbf
JS
12266
12267 /* Initialize in case vector mapping is needed */
b246de17 12268 lpfc_used_cpu = NULL;
2ea259ee 12269 lpfc_present_cpu = num_present_cpus();
7bb03bbf 12270
dea3101e 12271 error = pci_register_driver(&lpfc_driver);
92d7f7b0 12272 if (error) {
dea3101e 12273 fc_release_transport(lpfc_transport_template);
458c083e 12274 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 12275 }
dea3101e
JB
12276
12277 return error;
12278}
12279
e59058c4 12280/**
3621a710 12281 * lpfc_exit - lpfc module removal routine
e59058c4
JS
12282 *
12283 * This routine is invoked when the lpfc module is removed from the kernel.
12284 * The special kernel macro module_exit() is used to indicate the role of
12285 * this routine to the kernel as lpfc module exit point.
12286 */
dea3101e
JB
12287static void __exit
12288lpfc_exit(void)
12289{
3ef6d24c 12290 misc_deregister(&lpfc_mgmt_dev);
dea3101e
JB
12291 pci_unregister_driver(&lpfc_driver);
12292 fc_release_transport(lpfc_transport_template);
458c083e 12293 fc_release_transport(lpfc_vport_transport_template);
81301a9b 12294 if (_dump_buf_data) {
6a9c52cf
JS
12295 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
12296 "_dump_buf_data at 0x%p\n",
81301a9b
JS
12297 (1L << _dump_buf_data_order), _dump_buf_data);
12298 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
12299 }
12300
12301 if (_dump_buf_dif) {
6a9c52cf
JS
12302 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
12303 "_dump_buf_dif at 0x%p\n",
81301a9b
JS
12304 (1L << _dump_buf_dif_order), _dump_buf_dif);
12305 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
12306 }
b246de17 12307 kfree(lpfc_used_cpu);
7973967f 12308 idr_destroy(&lpfc_hba_index);
dea3101e
JB
12309}
12310
12311module_init(lpfc_init);
12312module_exit(lpfc_exit);
12313MODULE_LICENSE("GPL");
12314MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 12315MODULE_AUTHOR("Broadcom");
dea3101e 12316MODULE_VERSION("0:" LPFC_DRIVER_VERSION);