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scsi: lpfc: Fix NVMEI's handling of NVMET's PRLI response attributes
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CommitLineData
dea3101e
JB
1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS
4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB
10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e
JB
22 *******************************************************************/
23
dea3101e
JB
24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e
JB
30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
dea3101e 40
91886523 41#include <scsi/scsi.h>
dea3101e
JB
42#include <scsi/scsi_device.h>
43#include <scsi/scsi_host.h>
44#include <scsi/scsi_transport_fc.h>
86c67379
JS
45#include <scsi/scsi_tcq.h>
46#include <scsi/fc/fc_fs.h>
47
48#include <linux/nvme-fc-driver.h>
dea3101e 49
da0436e9 50#include "lpfc_hw4.h"
dea3101e
JB
51#include "lpfc_hw.h"
52#include "lpfc_sli.h"
da0436e9 53#include "lpfc_sli4.h"
ea2151b4 54#include "lpfc_nl.h"
dea3101e 55#include "lpfc_disc.h"
dea3101e 56#include "lpfc.h"
895427bd
JS
57#include "lpfc_scsi.h"
58#include "lpfc_nvme.h"
86c67379 59#include "lpfc_nvmet.h"
dea3101e
JB
60#include "lpfc_logmsg.h"
61#include "lpfc_crtn.h"
92d7f7b0 62#include "lpfc_vport.h"
dea3101e 63#include "lpfc_version.h"
12f44457 64#include "lpfc_ids.h"
dea3101e 65
81301a9b
JS
66char *_dump_buf_data;
67unsigned long _dump_buf_data_order;
68char *_dump_buf_dif;
69unsigned long _dump_buf_dif_order;
70spinlock_t _dump_buf_lock;
71
7bb03bbf 72/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS
73uint16_t *lpfc_used_cpu;
74uint32_t lpfc_present_cpu;
7bb03bbf 75
dea3101e
JB
76static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
77static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 78static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS
79static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
80static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 81static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 82static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 83static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 84static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS
85static int lpfc_init_active_sgl_array(struct lpfc_hba *);
86static void lpfc_free_active_sgl(struct lpfc_hba *);
87static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
88static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
89static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
90static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
91static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS
92static void lpfc_sli4_disable_intr(struct lpfc_hba *);
93static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 94static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e
JB
95
96static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 97static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 98static DEFINE_IDR(lpfc_hba_index);
f358dd0c 99#define LPFC_NVMET_BUF_POST 254
dea3101e 100
e59058c4 101/**
3621a710 102 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS
103 * @phba: pointer to lpfc hba data structure.
104 *
105 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
106 * mailbox command. It retrieves the revision information from the HBA and
107 * collects the Vital Product Data (VPD) about the HBA for preparing the
108 * configuration of the HBA.
109 *
110 * Return codes:
111 * 0 - success.
112 * -ERESTART - requests the SLI layer to reset the HBA and try again.
113 * Any other value - indicates an error.
114 **/
dea3101e 115int
2e0fef85 116lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e
JB
117{
118 lpfc_vpd_t *vp = &phba->vpd;
119 int i = 0, rc;
120 LPFC_MBOXQ_t *pmb;
121 MAILBOX_t *mb;
122 char *lpfc_vpd_data = NULL;
123 uint16_t offset = 0;
124 static char licensed[56] =
125 "key unlock for use with gnu public licensed code only\0";
65a29c16 126 static int init_key = 1;
dea3101e
JB
127
128 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
129 if (!pmb) {
2e0fef85 130 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
131 return -ENOMEM;
132 }
133
04c68496 134 mb = &pmb->u.mb;
2e0fef85 135 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
136
137 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS
138 if (init_key) {
139 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 140
65a29c16
JS
141 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
142 *ptext = cpu_to_be32(*ptext);
143 init_key = 0;
144 }
dea3101e
JB
145
146 lpfc_read_nv(phba, pmb);
147 memset((char*)mb->un.varRDnvp.rsvd3, 0,
148 sizeof (mb->un.varRDnvp.rsvd3));
149 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
150 sizeof (licensed));
151
152 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
153
154 if (rc != MBX_SUCCESS) {
ed957684 155 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 156 "0324 Config Port initialization "
dea3101e
JB
157 "error, mbxCmd x%x READ_NVPARM, "
158 "mbxStatus x%x\n",
dea3101e
JB
159 mb->mbxCommand, mb->mbxStatus);
160 mempool_free(pmb, phba->mbox_mem_pool);
161 return -ERESTART;
162 }
163 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS
164 sizeof(phba->wwnn));
165 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
166 sizeof(phba->wwpn));
dea3101e
JB
167 }
168
92d7f7b0
JS
169 phba->sli3_options = 0x0;
170
dea3101e
JB
171 /* Setup and issue mailbox READ REV command */
172 lpfc_read_rev(phba, pmb);
173 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
174 if (rc != MBX_SUCCESS) {
ed957684 175 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 176 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 177 "READ_REV, mbxStatus x%x\n",
dea3101e
JB
178 mb->mbxCommand, mb->mbxStatus);
179 mempool_free( pmb, phba->mbox_mem_pool);
180 return -ERESTART;
181 }
182
92d7f7b0 183
1de933f3
JSEC
184 /*
185 * The value of rr must be 1 since the driver set the cv field to 1.
186 * This setting requires the FW to set all revision fields.
dea3101e 187 */
1de933f3 188 if (mb->un.varRdRev.rr == 0) {
dea3101e 189 vp->rev.rBit = 0;
1de933f3 190 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS
191 "0440 Adapter failed to init, READ_REV has "
192 "missing revision information.\n");
dea3101e
JB
193 mempool_free(pmb, phba->mbox_mem_pool);
194 return -ERESTART;
dea3101e
JB
195 }
196
495a714c
JS
197 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
198 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 199 return -EINVAL;
495a714c 200 }
ed957684 201
dea3101e 202 /* Save information as VPD data */
1de933f3 203 vp->rev.rBit = 1;
92d7f7b0 204 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC
205 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
206 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
207 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
208 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e
JB
209 vp->rev.biuRev = mb->un.varRdRev.biuRev;
210 vp->rev.smRev = mb->un.varRdRev.smRev;
211 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
212 vp->rev.endecRev = mb->un.varRdRev.endecRev;
213 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
214 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
215 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
216 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
217 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
218 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
219
92d7f7b0
JS
220 /* If the sli feature level is less then 9, we must
221 * tear down all RPIs and VPIs on link down if NPIV
222 * is enabled.
223 */
224 if (vp->rev.feaLevelHigh < 9)
225 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
226
dea3101e
JB
227 if (lpfc_is_LC_HBA(phba->pcidev->device))
228 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
229 sizeof (phba->RandomData));
230
dea3101e 231 /* Get adapter VPD information */
dea3101e
JB
232 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
233 if (!lpfc_vpd_data)
d7c255b2 234 goto out_free_mbox;
dea3101e 235 do {
a0c87cbd 236 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e
JB
237 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
238
239 if (rc != MBX_SUCCESS) {
240 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 241 "0441 VPD not present on adapter, "
dea3101e 242 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 243 mb->mbxCommand, mb->mbxStatus);
74b72a59 244 mb->un.varDmp.word_cnt = 0;
dea3101e 245 }
04c68496
JS
246 /* dump mem may return a zero when finished or we got a
247 * mailbox error, either way we are done.
248 */
249 if (mb->un.varDmp.word_cnt == 0)
250 break;
74b72a59
JW
251 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
252 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS
253 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
254 lpfc_vpd_data + offset,
92d7f7b0 255 mb->un.varDmp.word_cnt);
dea3101e 256 offset += mb->un.varDmp.word_cnt;
74b72a59
JW
257 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
258 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e
JB
259
260 kfree(lpfc_vpd_data);
dea3101e
JB
261out_free_mbox:
262 mempool_free(pmb, phba->mbox_mem_pool);
263 return 0;
264}
265
e59058c4 266/**
3621a710 267 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS
268 * @phba: pointer to lpfc hba data structure.
269 * @pmboxq: pointer to the driver internal queue element for mailbox command.
270 *
271 * This is the completion handler for driver's configuring asynchronous event
272 * mailbox command to the device. If the mailbox command returns successfully,
273 * it will set internal async event support flag to 1; otherwise, it will
274 * set internal async event support flag to 0.
275 **/
57127f15
JS
276static void
277lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
278{
04c68496 279 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS
280 phba->temp_sensor_support = 1;
281 else
282 phba->temp_sensor_support = 0;
283 mempool_free(pmboxq, phba->mbox_mem_pool);
284 return;
285}
286
97207482 287/**
3621a710 288 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS
289 * @phba: pointer to lpfc hba data structure.
290 * @pmboxq: pointer to the driver internal queue element for mailbox command.
291 *
292 * This is the completion handler for dump mailbox command for getting
293 * wake up parameters. When this command complete, the response contain
294 * Option rom version of the HBA. This function translate the version number
295 * into a human readable string and store it in OptionROMVersion.
296 **/
297static void
298lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
299{
300 struct prog_id *prg;
301 uint32_t prog_id_word;
302 char dist = ' ';
303 /* character array used for decoding dist type. */
304 char dist_char[] = "nabx";
305
04c68496 306 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 307 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 308 return;
9f1e1b50 309 }
97207482
JS
310
311 prg = (struct prog_id *) &prog_id_word;
312
313 /* word 7 contain option rom version */
04c68496 314 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS
315
316 /* Decode the Option rom version word to a readable string */
317 if (prg->dist < 4)
318 dist = dist_char[prg->dist];
319
320 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 321 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS
322 prg->ver, prg->rev, prg->lev);
323 else
a2fc4aef 324 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS
325 prg->ver, prg->rev, prg->lev,
326 dist, prg->num);
9f1e1b50 327 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS
328 return;
329}
330
0558056c
JS
331/**
332 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
333 * cfg_soft_wwnn, cfg_soft_wwpn
334 * @vport: pointer to lpfc vport data structure.
335 *
336 *
337 * Return codes
338 * None.
339 **/
340void
341lpfc_update_vport_wwn(struct lpfc_vport *vport)
342{
aeb3c817
JS
343 uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
344 u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0];
345
0558056c
JS
346 /* If the soft name exists then update it using the service params */
347 if (vport->phba->cfg_soft_wwnn)
348 u64_to_wwn(vport->phba->cfg_soft_wwnn,
349 vport->fc_sparam.nodeName.u.wwn);
350 if (vport->phba->cfg_soft_wwpn)
351 u64_to_wwn(vport->phba->cfg_soft_wwpn,
352 vport->fc_sparam.portName.u.wwn);
353
354 /*
355 * If the name is empty or there exists a soft name
356 * then copy the service params name, otherwise use the fc name
357 */
358 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
359 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
360 sizeof(struct lpfc_name));
361 else
362 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
363 sizeof(struct lpfc_name));
364
aeb3c817
JS
365 /*
366 * If the port name has changed, then set the Param changes flag
367 * to unreg the login
368 */
369 if (vport->fc_portname.u.wwn[0] != 0 &&
370 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
371 sizeof(struct lpfc_name)))
372 vport->vport_flag |= FAWWPN_PARAM_CHG;
373
374 if (vport->fc_portname.u.wwn[0] == 0 ||
375 vport->phba->cfg_soft_wwpn ||
376 (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) ||
377 vport->vport_flag & FAWWPN_SET) {
0558056c
JS
378 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
379 sizeof(struct lpfc_name));
aeb3c817
JS
380 vport->vport_flag &= ~FAWWPN_SET;
381 if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR)
382 vport->vport_flag |= FAWWPN_SET;
383 }
0558056c
JS
384 else
385 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
386 sizeof(struct lpfc_name));
387}
388
e59058c4 389/**
3621a710 390 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS
391 * @phba: pointer to lpfc hba data structure.
392 *
393 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
394 * command call. It performs all internal resource and state setups on the
395 * port: post IOCB buffers, enable appropriate host interrupt attentions,
396 * ELS ring timers, etc.
397 *
398 * Return codes
399 * 0 - success.
400 * Any other value - error.
401 **/
dea3101e 402int
2e0fef85 403lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 404{
2e0fef85 405 struct lpfc_vport *vport = phba->pport;
a257bf90 406 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e
JB
407 LPFC_MBOXQ_t *pmb;
408 MAILBOX_t *mb;
409 struct lpfc_dmabuf *mp;
410 struct lpfc_sli *psli = &phba->sli;
411 uint32_t status, timeout;
2e0fef85
JS
412 int i, j;
413 int rc;
dea3101e 414
7af67051
JS
415 spin_lock_irq(&phba->hbalock);
416 /*
417 * If the Config port completed correctly the HBA is not
418 * over heated any more.
419 */
420 if (phba->over_temp_state == HBA_OVER_TEMP)
421 phba->over_temp_state = HBA_NORMAL_TEMP;
422 spin_unlock_irq(&phba->hbalock);
423
dea3101e
JB
424 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
425 if (!pmb) {
2e0fef85 426 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
427 return -ENOMEM;
428 }
04c68496 429 mb = &pmb->u.mb;
dea3101e 430
dea3101e 431 /* Get login parameters for NID. */
9f1177a3
JS
432 rc = lpfc_read_sparam(phba, pmb, 0);
433 if (rc) {
434 mempool_free(pmb, phba->mbox_mem_pool);
435 return -ENOMEM;
436 }
437
ed957684 438 pmb->vport = vport;
dea3101e 439 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 440 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 441 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 442 "READ_SPARM mbxStatus x%x\n",
dea3101e 443 mb->mbxCommand, mb->mbxStatus);
2e0fef85 444 phba->link_state = LPFC_HBA_ERROR;
dea3101e 445 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 446 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
447 lpfc_mbuf_free(phba, mp->virt, mp->phys);
448 kfree(mp);
449 return -EIO;
450 }
451
452 mp = (struct lpfc_dmabuf *) pmb->context1;
453
2e0fef85 454 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e
JB
455 lpfc_mbuf_free(phba, mp->virt, mp->phys);
456 kfree(mp);
457 pmb->context1 = NULL;
0558056c 458 lpfc_update_vport_wwn(vport);
a257bf90
JS
459
460 /* Update the fc_host data structures with new wwn. */
461 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
462 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 463 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 464
dea3101e
JB
465 /* If no serial number in VPD data, use low 6 bytes of WWNN */
466 /* This should be consolidated into parse_vpd ? - mr */
467 if (phba->SerialNumber[0] == 0) {
468 uint8_t *outptr;
469
2e0fef85 470 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e
JB
471 for (i = 0; i < 12; i++) {
472 status = *outptr++;
473 j = ((status & 0xf0) >> 4);
474 if (j <= 9)
475 phba->SerialNumber[i] =
476 (char)((uint8_t) 0x30 + (uint8_t) j);
477 else
478 phba->SerialNumber[i] =
479 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
480 i++;
481 j = (status & 0xf);
482 if (j <= 9)
483 phba->SerialNumber[i] =
484 (char)((uint8_t) 0x30 + (uint8_t) j);
485 else
486 phba->SerialNumber[i] =
487 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
488 }
489 }
490
dea3101e 491 lpfc_read_config(phba, pmb);
ed957684 492 pmb->vport = vport;
dea3101e 493 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 494 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 495 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 496 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 497 mb->mbxCommand, mb->mbxStatus);
2e0fef85 498 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
499 mempool_free( pmb, phba->mbox_mem_pool);
500 return -EIO;
501 }
502
a0c87cbd
JS
503 /* Check if the port is disabled */
504 lpfc_sli_read_link_ste(phba);
505
dea3101e 506 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
507 i = (mb->un.varRdConfig.max_xri + 1);
508 if (phba->cfg_hba_queue_depth > i) {
509 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
510 "3359 HBA queue depth changed from %d to %d\n",
511 phba->cfg_hba_queue_depth, i);
512 phba->cfg_hba_queue_depth = i;
513 }
514
515 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
516 i = (mb->un.varRdConfig.max_xri >> 3);
517 if (phba->pport->cfg_lun_queue_depth > i) {
518 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
519 "3360 LUN queue depth changed from %d to %d\n",
520 phba->pport->cfg_lun_queue_depth, i);
521 phba->pport->cfg_lun_queue_depth = i;
522 }
dea3101e
JB
523
524 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW
525
526 /* Get the default values for Model Name and Description */
527 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
528
2e0fef85 529 phba->link_state = LPFC_LINK_DOWN;
dea3101e 530
0b727fea 531 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS
532 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
533 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
534 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
535 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e
JB
536
537 /* Post receive buffers for desired rings */
ed957684
JS
538 if (phba->sli_rev != 3)
539 lpfc_post_rcv_buf(phba);
dea3101e 540
9399627f
JS
541 /*
542 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
543 */
544 if (phba->intr_type == MSIX) {
545 rc = lpfc_config_msi(phba, pmb);
546 if (rc) {
547 mempool_free(pmb, phba->mbox_mem_pool);
548 return -EIO;
549 }
550 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
551 if (rc != MBX_SUCCESS) {
552 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
553 "0352 Config MSI mailbox command "
554 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS
555 pmb->u.mb.mbxCommand,
556 pmb->u.mb.mbxStatus);
9399627f
JS
557 mempool_free(pmb, phba->mbox_mem_pool);
558 return -EIO;
559 }
560 }
561
04c68496 562 spin_lock_irq(&phba->hbalock);
9399627f
JS
563 /* Initialize ERATT handling flag */
564 phba->hba_flag &= ~HBA_ERATT_HANDLED;
565
dea3101e 566 /* Enable appropriate host interrupts */
9940b97b
JS
567 if (lpfc_readl(phba->HCregaddr, &status)) {
568 spin_unlock_irq(&phba->hbalock);
569 return -EIO;
570 }
dea3101e
JB
571 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
572 if (psli->num_rings > 0)
573 status |= HC_R0INT_ENA;
574 if (psli->num_rings > 1)
575 status |= HC_R1INT_ENA;
576 if (psli->num_rings > 2)
577 status |= HC_R2INT_ENA;
578 if (psli->num_rings > 3)
579 status |= HC_R3INT_ENA;
580
875fbdfe
JSEC
581 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
582 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 583 status &= ~(HC_R0INT_ENA);
875fbdfe 584
dea3101e
JB
585 writel(status, phba->HCregaddr);
586 readl(phba->HCregaddr); /* flush */
2e0fef85 587 spin_unlock_irq(&phba->hbalock);
dea3101e 588
9399627f
JS
589 /* Set up ring-0 (ELS) timer */
590 timeout = phba->fc_ratov * 2;
256ec0d0
JS
591 mod_timer(&vport->els_tmofunc,
592 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 593 /* Set up heart beat (HB) timer */
256ec0d0
JS
594 mod_timer(&phba->hb_tmofunc,
595 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
596 phba->hb_outstanding = 0;
597 phba->last_completion_time = jiffies;
9399627f 598 /* Set up error attention (ERATT) polling timer */
256ec0d0 599 mod_timer(&phba->eratt_poll,
65791f1f 600 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 601
a0c87cbd
JS
602 if (phba->hba_flag & LINK_DISABLED) {
603 lpfc_printf_log(phba,
604 KERN_ERR, LOG_INIT,
605 "2598 Adapter Link is disabled.\n");
606 lpfc_down_link(phba, pmb);
607 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
608 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
609 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
610 lpfc_printf_log(phba,
611 KERN_ERR, LOG_INIT,
612 "2599 Adapter failed to issue DOWN_LINK"
613 " mbox command rc 0x%x\n", rc);
614
615 mempool_free(pmb, phba->mbox_mem_pool);
616 return -EIO;
617 }
e40a02c1 618 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS
619 mempool_free(pmb, phba->mbox_mem_pool);
620 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
621 if (rc)
622 return rc;
dea3101e
JB
623 }
624 /* MBOX buffer will be freed in mbox compl */
57127f15 625 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
626 if (!pmb) {
627 phba->link_state = LPFC_HBA_ERROR;
628 return -ENOMEM;
629 }
630
57127f15
JS
631 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
632 pmb->mbox_cmpl = lpfc_config_async_cmpl;
633 pmb->vport = phba->pport;
634 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 635
57127f15
JS
636 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
637 lpfc_printf_log(phba,
638 KERN_ERR,
639 LOG_INIT,
640 "0456 Adapter failed to issue "
e4e74273 641 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS
642 rc);
643 mempool_free(pmb, phba->mbox_mem_pool);
644 }
97207482
JS
645
646 /* Get Option rom version */
647 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
648 if (!pmb) {
649 phba->link_state = LPFC_HBA_ERROR;
650 return -ENOMEM;
651 }
652
97207482
JS
653 lpfc_dump_wakeup_param(phba, pmb);
654 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
655 pmb->vport = phba->pport;
656 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
657
658 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
659 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 660 "to get Option ROM version status x%x\n", rc);
97207482
JS
661 mempool_free(pmb, phba->mbox_mem_pool);
662 }
663
d7c255b2 664 return 0;
ce8b3ce5
JS
665}
666
84d1b006
JS
667/**
668 * lpfc_hba_init_link - Initialize the FC link
669 * @phba: pointer to lpfc hba data structure.
6e7288d9 670 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
671 *
672 * This routine will issue the INIT_LINK mailbox command call.
673 * It is available to other drivers through the lpfc_hba data
674 * structure for use as a delayed link up mechanism with the
675 * module parameter lpfc_suppress_link_up.
676 *
677 * Return code
678 * 0 - success
679 * Any other value - error
680 **/
e399b228 681static int
6e7288d9 682lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS
683{
684 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
685}
686
687/**
688 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
689 * @phba: pointer to lpfc hba data structure.
690 * @fc_topology: desired fc topology.
691 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
692 *
693 * This routine will issue the INIT_LINK mailbox command call.
694 * It is available to other drivers through the lpfc_hba data
695 * structure for use as a delayed link up mechanism with the
696 * module parameter lpfc_suppress_link_up.
697 *
698 * Return code
699 * 0 - success
700 * Any other value - error
701 **/
702int
703lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
704 uint32_t flag)
84d1b006
JS
705{
706 struct lpfc_vport *vport = phba->pport;
707 LPFC_MBOXQ_t *pmb;
708 MAILBOX_t *mb;
709 int rc;
710
711 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
712 if (!pmb) {
713 phba->link_state = LPFC_HBA_ERROR;
714 return -ENOMEM;
715 }
716 mb = &pmb->u.mb;
717 pmb->vport = vport;
718
026abb87
JS
719 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
720 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
721 !(phba->lmt & LMT_1Gb)) ||
722 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
723 !(phba->lmt & LMT_2Gb)) ||
724 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
725 !(phba->lmt & LMT_4Gb)) ||
726 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
727 !(phba->lmt & LMT_8Gb)) ||
728 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
729 !(phba->lmt & LMT_10Gb)) ||
730 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS
731 !(phba->lmt & LMT_16Gb)) ||
732 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
733 !(phba->lmt & LMT_32Gb))) {
026abb87
JS
734 /* Reset link speed to auto */
735 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
736 "1302 Invalid speed for this board:%d "
737 "Reset link speed to auto.\n",
738 phba->cfg_link_speed);
739 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
740 }
1b51197d 741 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 742 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS
743 if (phba->sli_rev < LPFC_SLI_REV4)
744 lpfc_set_loopback_flag(phba);
6e7288d9 745 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 746 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS
747 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
748 "0498 Adapter failed to init, mbxCmd x%x "
749 "INIT_LINK, mbxStatus x%x\n",
750 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS
751 if (phba->sli_rev <= LPFC_SLI_REV3) {
752 /* Clear all interrupt enable conditions */
753 writel(0, phba->HCregaddr);
754 readl(phba->HCregaddr); /* flush */
755 /* Clear all pending interrupts */
756 writel(0xffffffff, phba->HAregaddr);
757 readl(phba->HAregaddr); /* flush */
758 }
84d1b006 759 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 760 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS
761 mempool_free(pmb, phba->mbox_mem_pool);
762 return -EIO;
763 }
e40a02c1 764 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS
765 if (flag == MBX_POLL)
766 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS
767
768 return 0;
769}
770
771/**
772 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS
773 * @phba: pointer to lpfc hba data structure.
774 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
775 *
776 * This routine will issue the DOWN_LINK mailbox command call.
777 * It is available to other drivers through the lpfc_hba data
778 * structure for use to stop the link.
779 *
780 * Return code
781 * 0 - success
782 * Any other value - error
783 **/
e399b228 784static int
6e7288d9 785lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS
786{
787 LPFC_MBOXQ_t *pmb;
788 int rc;
789
790 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
791 if (!pmb) {
792 phba->link_state = LPFC_HBA_ERROR;
793 return -ENOMEM;
794 }
795
796 lpfc_printf_log(phba,
797 KERN_ERR, LOG_INIT,
798 "0491 Adapter Link is disabled.\n");
799 lpfc_down_link(phba, pmb);
800 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 801 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS
802 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
803 lpfc_printf_log(phba,
804 KERN_ERR, LOG_INIT,
805 "2522 Adapter failed to issue DOWN_LINK"
806 " mbox command rc 0x%x\n", rc);
807
808 mempool_free(pmb, phba->mbox_mem_pool);
809 return -EIO;
810 }
6e7288d9
JS
811 if (flag == MBX_POLL)
812 mempool_free(pmb, phba->mbox_mem_pool);
813
84d1b006
JS
814 return 0;
815}
816
e59058c4 817/**
3621a710 818 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS
819 * @phba: pointer to lpfc HBA data structure.
820 *
821 * This routine will do LPFC uninitialization before the HBA is reset when
822 * bringing down the SLI Layer.
823 *
824 * Return codes
825 * 0 - success.
826 * Any other value - error.
827 **/
dea3101e 828int
2e0fef85 829lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 830{
1b32f6aa
JS
831 struct lpfc_vport **vports;
832 int i;
3772a991
JS
833
834 if (phba->sli_rev <= LPFC_SLI_REV3) {
835 /* Disable interrupts */
836 writel(0, phba->HCregaddr);
837 readl(phba->HCregaddr); /* flush */
838 }
dea3101e 839
1b32f6aa
JS
840 if (phba->pport->load_flag & FC_UNLOADING)
841 lpfc_cleanup_discovery_resources(phba->pport);
842 else {
843 vports = lpfc_create_vport_work_array(phba);
844 if (vports != NULL)
3772a991
JS
845 for (i = 0; i <= phba->max_vports &&
846 vports[i] != NULL; i++)
1b32f6aa
JS
847 lpfc_cleanup_discovery_resources(vports[i]);
848 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS
849 }
850 return 0;
dea3101e
JB
851}
852
68e814f5
JS
853/**
854 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
855 * rspiocb which got deferred
856 *
857 * @phba: pointer to lpfc HBA data structure.
858 *
859 * This routine will cleanup completed slow path events after HBA is reset
860 * when bringing down the SLI Layer.
861 *
862 *
863 * Return codes
864 * void.
865 **/
866static void
867lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
868{
869 struct lpfc_iocbq *rspiocbq;
870 struct hbq_dmabuf *dmabuf;
871 struct lpfc_cq_event *cq_event;
872
873 spin_lock_irq(&phba->hbalock);
874 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
875 spin_unlock_irq(&phba->hbalock);
876
877 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
878 /* Get the response iocb from the head of work queue */
879 spin_lock_irq(&phba->hbalock);
880 list_remove_head(&phba->sli4_hba.sp_queue_event,
881 cq_event, struct lpfc_cq_event, list);
882 spin_unlock_irq(&phba->hbalock);
883
884 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
885 case CQE_CODE_COMPL_WQE:
886 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
887 cq_event);
888 lpfc_sli_release_iocbq(phba, rspiocbq);
889 break;
890 case CQE_CODE_RECEIVE:
891 case CQE_CODE_RECEIVE_V1:
892 dmabuf = container_of(cq_event, struct hbq_dmabuf,
893 cq_event);
894 lpfc_in_buf_free(phba, &dmabuf->dbuf);
895 }
896 }
897}
898
e59058c4 899/**
bcece5f5 900 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS
901 * @phba: pointer to lpfc HBA data structure.
902 *
bcece5f5
JS
903 * This routine will cleanup posted ELS buffers after the HBA is reset
904 * when bringing down the SLI Layer.
905 *
e59058c4
JS
906 *
907 * Return codes
bcece5f5 908 * void.
e59058c4 909 **/
bcece5f5
JS
910static void
911lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW
912{
913 struct lpfc_sli *psli = &phba->sli;
914 struct lpfc_sli_ring *pring;
915 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS
916 LIST_HEAD(buflist);
917 int count;
41415862 918
92d7f7b0
JS
919 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
920 lpfc_sli_hbqbuf_free_all(phba);
921 else {
922 /* Cleanup preposted buffers on the ELS ring */
895427bd 923 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS
924 spin_lock_irq(&phba->hbalock);
925 list_splice_init(&pring->postbufq, &buflist);
926 spin_unlock_irq(&phba->hbalock);
927
928 count = 0;
929 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 930 list_del(&mp->list);
07eab624 931 count++;
92d7f7b0
JS
932 lpfc_mbuf_free(phba, mp->virt, mp->phys);
933 kfree(mp);
934 }
07eab624
JS
935
936 spin_lock_irq(&phba->hbalock);
937 pring->postbufq_cnt -= count;
bcece5f5 938 spin_unlock_irq(&phba->hbalock);
41415862 939 }
bcece5f5
JS
940}
941
942/**
943 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
944 * @phba: pointer to lpfc HBA data structure.
945 *
946 * This routine will cleanup the txcmplq after the HBA is reset when bringing
947 * down the SLI Layer.
948 *
949 * Return codes
950 * void
951 **/
952static void
953lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
954{
955 struct lpfc_sli *psli = &phba->sli;
895427bd 956 struct lpfc_queue *qp = NULL;
bcece5f5
JS
957 struct lpfc_sli_ring *pring;
958 LIST_HEAD(completions);
959 int i;
960
895427bd
JS
961 if (phba->sli_rev != LPFC_SLI_REV4) {
962 for (i = 0; i < psli->num_rings; i++) {
963 pring = &psli->sli3_ring[i];
bcece5f5 964 spin_lock_irq(&phba->hbalock);
895427bd
JS
965 /* At this point in time the HBA is either reset or DOA
966 * Nothing should be on txcmplq as it will
967 * NEVER complete.
968 */
969 list_splice_init(&pring->txcmplq, &completions);
970 pring->txcmplq_cnt = 0;
bcece5f5 971 spin_unlock_irq(&phba->hbalock);
09372820 972
895427bd
JS
973 lpfc_sli_abort_iocb_ring(phba, pring);
974 }
a257bf90 975 /* Cancel all the IOCBs from the completions list */
895427bd
JS
976 lpfc_sli_cancel_iocbs(phba, &completions,
977 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
978 return;
979 }
980 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
981 pring = qp->pring;
982 if (!pring)
983 continue;
984 spin_lock_irq(&pring->ring_lock);
985 list_splice_init(&pring->txcmplq, &completions);
986 pring->txcmplq_cnt = 0;
987 spin_unlock_irq(&pring->ring_lock);
41415862
JW
988 lpfc_sli_abort_iocb_ring(phba, pring);
989 }
895427bd
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990 /* Cancel all the IOCBs from the completions list */
991 lpfc_sli_cancel_iocbs(phba, &completions,
992 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 993}
41415862 994
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995/**
996 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
997 int i;
998 * @phba: pointer to lpfc HBA data structure.
999 *
1000 * This routine will do uninitialization after the HBA is reset when bring
1001 * down the SLI Layer.
1002 *
1003 * Return codes
1004 * 0 - success.
1005 * Any other value - error.
1006 **/
1007static int
1008lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1009{
1010 lpfc_hba_free_post_buf(phba);
1011 lpfc_hba_clean_txcmplq(phba);
41415862
JW
1012 return 0;
1013}
5af5eee7 1014
da0436e9
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1015/**
1016 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1017 * @phba: pointer to lpfc HBA data structure.
1018 *
1019 * This routine will do uninitialization after the HBA is reset when bring
1020 * down the SLI Layer.
1021 *
1022 * Return codes
af901ca1 1023 * 0 - success.
da0436e9
JS
1024 * Any other value - error.
1025 **/
1026static int
1027lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1028{
1029 struct lpfc_scsi_buf *psb, *psb_next;
86c67379 1030 struct lpfc_nvmet_rcv_ctx *ctxp, *ctxp_next;
da0436e9 1031 LIST_HEAD(aborts);
895427bd 1032 LIST_HEAD(nvme_aborts);
86c67379 1033 LIST_HEAD(nvmet_aborts);
da0436e9 1034 unsigned long iflag = 0;
0f65ff68
JS
1035 struct lpfc_sglq *sglq_entry = NULL;
1036
895427bd
JS
1037
1038 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS
1039 lpfc_hba_clean_txcmplq(phba);
1040
da0436e9
JS
1041 /* At this point in time the HBA is either reset or DOA. Either
1042 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1043 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS
1044 * driver is unloading or reposted if the driver is restarting
1045 * the port.
1046 */
895427bd 1047 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1048 /* scsl_buf_list */
895427bd 1049 /* sgl_list_lock required because worker thread uses this
da0436e9
JS
1050 * list.
1051 */
895427bd 1052 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS
1053 list_for_each_entry(sglq_entry,
1054 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1055 sglq_entry->state = SGL_FREED;
1056
da0436e9 1057 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS
1058 &phba->sli4_hba.lpfc_els_sgl_list);
1059
f358dd0c 1060
895427bd 1061 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1062 /* abts_scsi_buf_list_lock required because worker thread uses this
1063 * list.
1064 */
895427bd
JS
1065 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1066 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1067 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1068 &aborts);
1069 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1070 }
1071
1072 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1073 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1074 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1075 &nvme_aborts);
86c67379
JS
1076 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1077 &nvmet_aborts);
895427bd
JS
1078 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1079 }
1080
da0436e9
JS
1081 spin_unlock_irq(&phba->hbalock);
1082
1083 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1084 psb->pCmd = NULL;
1085 psb->status = IOSTAT_SUCCESS;
1086 }
a40fc5f0
JS
1087 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1088 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1089 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1090
86c67379
JS
1091 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1092 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1093 psb->pCmd = NULL;
1094 psb->status = IOSTAT_SUCCESS;
1095 }
1096 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
1097 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1098 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1099
1100 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1101 ctxp->flag &= ~(LPFC_NVMET_XBUSY | LPFC_NVMET_ABORT_OP);
6c621a22 1102 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
86c67379 1103 }
895427bd 1104 }
895427bd 1105
68e814f5 1106 lpfc_sli4_free_sp_events(phba);
da0436e9
JS
1107 return 0;
1108}
1109
1110/**
1111 * lpfc_hba_down_post - Wrapper func for hba down post routine
1112 * @phba: pointer to lpfc HBA data structure.
1113 *
1114 * This routine wraps the actual SLI3 or SLI4 routine for performing
1115 * uninitialization after the HBA is reset when bring down the SLI Layer.
1116 *
1117 * Return codes
af901ca1 1118 * 0 - success.
da0436e9
JS
1119 * Any other value - error.
1120 **/
1121int
1122lpfc_hba_down_post(struct lpfc_hba *phba)
1123{
1124 return (*phba->lpfc_hba_down_post)(phba);
1125}
41415862 1126
e59058c4 1127/**
3621a710 1128 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS
1129 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1130 *
1131 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1132 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1133 * work-port-events bitmap and the worker thread is notified. This timeout
1134 * event will be used by the worker thread to invoke the actual timeout
1135 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1136 * be performed in the timeout handler and the HBA timeout event bit shall
1137 * be cleared by the worker thread after it has taken the event bitmap out.
1138 **/
a6ababd2 1139static void
858c9f6c
JS
1140lpfc_hb_timeout(unsigned long ptr)
1141{
1142 struct lpfc_hba *phba;
5e9d9b82 1143 uint32_t tmo_posted;
858c9f6c
JS
1144 unsigned long iflag;
1145
1146 phba = (struct lpfc_hba *)ptr;
9399627f
JS
1147
1148 /* Check for heart beat timeout conditions */
858c9f6c 1149 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS
1150 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1151 if (!tmo_posted)
858c9f6c
JS
1152 phba->pport->work_port_events |= WORKER_HB_TMO;
1153 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1154
9399627f 1155 /* Tell the worker thread there is work to do */
5e9d9b82
JS
1156 if (!tmo_posted)
1157 lpfc_worker_wake_up(phba);
858c9f6c
JS
1158 return;
1159}
1160
19ca7609
JS
1161/**
1162 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1163 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1164 *
1165 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1166 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1167 * work-port-events bitmap and the worker thread is notified. This timeout
1168 * event will be used by the worker thread to invoke the actual timeout
1169 * handler routine, lpfc_rrq_handler. Any periodical operations will
1170 * be performed in the timeout handler and the RRQ timeout event bit shall
1171 * be cleared by the worker thread after it has taken the event bitmap out.
1172 **/
1173static void
1174lpfc_rrq_timeout(unsigned long ptr)
1175{
1176 struct lpfc_hba *phba;
19ca7609
JS
1177 unsigned long iflag;
1178
1179 phba = (struct lpfc_hba *)ptr;
1180 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1181 if (!(phba->pport->load_flag & FC_UNLOADING))
1182 phba->hba_flag |= HBA_RRQ_ACTIVE;
1183 else
1184 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1185 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1186
1187 if (!(phba->pport->load_flag & FC_UNLOADING))
1188 lpfc_worker_wake_up(phba);
19ca7609
JS
1189}
1190
e59058c4 1191/**
3621a710 1192 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS
1193 * @phba: pointer to lpfc hba data structure.
1194 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1195 *
1196 * This is the callback function to the lpfc heart-beat mailbox command.
1197 * If configured, the lpfc driver issues the heart-beat mailbox command to
1198 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1199 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1200 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1201 * heart-beat outstanding state. Once the mailbox command comes back and
1202 * no error conditions detected, the heart-beat mailbox command timer is
1203 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1204 * state is cleared for the next heart-beat. If the timer expired with the
1205 * heart-beat outstanding state set, the driver will put the HBA offline.
1206 **/
858c9f6c
JS
1207static void
1208lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1209{
1210 unsigned long drvr_flag;
1211
1212 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1213 phba->hb_outstanding = 0;
1214 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1215
9399627f 1216 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS
1217 mempool_free(pmboxq, phba->mbox_mem_pool);
1218 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1219 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1220 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1221 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1222 jiffies +
1223 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1224 return;
1225}
1226
e59058c4 1227/**
3621a710 1228 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS
1229 * @phba: pointer to lpfc hba data structure.
1230 *
1231 * This is the actual HBA-timer timeout handler to be invoked by the worker
1232 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1233 * handler performs any periodic operations needed for the device. If such
1234 * periodic event has already been attended to either in the interrupt handler
1235 * or by processing slow-ring or fast-ring events within the HBA-timer
1236 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1237 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1238 * is configured and there is no heart-beat mailbox command outstanding, a
1239 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1240 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1241 * to offline.
1242 **/
858c9f6c
JS
1243void
1244lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1245{
45ed1190 1246 struct lpfc_vport **vports;
858c9f6c 1247 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1248 struct lpfc_dmabuf *buf_ptr;
45ed1190 1249 int retval, i;
858c9f6c 1250 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1251 LIST_HEAD(completions);
858c9f6c 1252
45ed1190
JS
1253 vports = lpfc_create_vport_work_array(phba);
1254 if (vports != NULL)
4258e98e 1255 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1256 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS
1257 lpfc_fdmi_num_disc_check(vports[i]);
1258 }
45ed1190
JS
1259 lpfc_destroy_vport_work_array(phba, vports);
1260
858c9f6c 1261 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1262 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS
1263 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1264 return;
1265
1266 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1267
256ec0d0
JS
1268 if (time_after(phba->last_completion_time +
1269 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1270 jiffies)) {
858c9f6c
JS
1271 spin_unlock_irq(&phba->pport->work_port_lock);
1272 if (!phba->hb_outstanding)
1273 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1274 jiffies +
1275 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1276 else
1277 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1278 jiffies +
1279 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS
1280 return;
1281 }
1282 spin_unlock_irq(&phba->pport->work_port_lock);
1283
0ff10d46
JS
1284 if (phba->elsbuf_cnt &&
1285 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1286 spin_lock_irq(&phba->hbalock);
1287 list_splice_init(&phba->elsbuf, &completions);
1288 phba->elsbuf_cnt = 0;
1289 phba->elsbuf_prev_cnt = 0;
1290 spin_unlock_irq(&phba->hbalock);
1291
1292 while (!list_empty(&completions)) {
1293 list_remove_head(&completions, buf_ptr,
1294 struct lpfc_dmabuf, list);
1295 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1296 kfree(buf_ptr);
1297 }
1298 }
1299 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1300
858c9f6c 1301 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS
1302 if (phba->cfg_enable_hba_heartbeat) {
1303 if (!phba->hb_outstanding) {
bc73905a
JS
1304 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1305 (list_empty(&psli->mboxq))) {
1306 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1307 GFP_KERNEL);
1308 if (!pmboxq) {
1309 mod_timer(&phba->hb_tmofunc,
1310 jiffies +
256ec0d0
JS
1311 msecs_to_jiffies(1000 *
1312 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1313 return;
1314 }
1315
1316 lpfc_heart_beat(phba, pmboxq);
1317 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1318 pmboxq->vport = phba->pport;
1319 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1320 MBX_NOWAIT);
1321
1322 if (retval != MBX_BUSY &&
1323 retval != MBX_SUCCESS) {
1324 mempool_free(pmboxq,
1325 phba->mbox_mem_pool);
1326 mod_timer(&phba->hb_tmofunc,
1327 jiffies +
256ec0d0
JS
1328 msecs_to_jiffies(1000 *
1329 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1330 return;
1331 }
1332 phba->skipped_hb = 0;
1333 phba->hb_outstanding = 1;
1334 } else if (time_before_eq(phba->last_completion_time,
1335 phba->skipped_hb)) {
1336 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1337 "2857 Last completion time not "
1338 " updated in %d ms\n",
1339 jiffies_to_msecs(jiffies
1340 - phba->last_completion_time));
1341 } else
1342 phba->skipped_hb = jiffies;
1343
858c9f6c 1344 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1345 jiffies +
1346 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1347 return;
13815c83
JS
1348 } else {
1349 /*
1350 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS
1351 * we need to give the hb mailbox cmd a chance to
1352 * complete or TMO.
13815c83 1353 */
dcf2a4e0
JS
1354 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1355 "0459 Adapter heartbeat still out"
1356 "standing:last compl time was %d ms.\n",
1357 jiffies_to_msecs(jiffies
1358 - phba->last_completion_time));
1359 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1360 jiffies +
1361 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1362 }
4258e98e
JS
1363 } else {
1364 mod_timer(&phba->hb_tmofunc,
1365 jiffies +
1366 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1367 }
1368}
1369
e59058c4 1370/**
3621a710 1371 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS
1372 * @phba: pointer to lpfc hba data structure.
1373 *
1374 * This routine is called to bring the HBA offline when HBA hardware error
1375 * other than Port Error 6 has been detected.
1376 **/
09372820
JS
1377static void
1378lpfc_offline_eratt(struct lpfc_hba *phba)
1379{
1380 struct lpfc_sli *psli = &phba->sli;
1381
1382 spin_lock_irq(&phba->hbalock);
f4b4c68f 1383 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1384 spin_unlock_irq(&phba->hbalock);
618a5230 1385 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS
1386
1387 lpfc_offline(phba);
1388 lpfc_reset_barrier(phba);
f4b4c68f 1389 spin_lock_irq(&phba->hbalock);
09372820 1390 lpfc_sli_brdreset(phba);
f4b4c68f 1391 spin_unlock_irq(&phba->hbalock);
09372820
JS
1392 lpfc_hba_down_post(phba);
1393 lpfc_sli_brdready(phba, HS_MBRDY);
1394 lpfc_unblock_mgmt_io(phba);
1395 phba->link_state = LPFC_HBA_ERROR;
1396 return;
1397}
1398
da0436e9
JS
1399/**
1400 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1401 * @phba: pointer to lpfc hba data structure.
1402 *
1403 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1404 * other than Port Error 6 has been detected.
1405 **/
a88dbb6a 1406void
da0436e9
JS
1407lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1408{
946727dc
JS
1409 spin_lock_irq(&phba->hbalock);
1410 phba->link_state = LPFC_HBA_ERROR;
1411 spin_unlock_irq(&phba->hbalock);
1412
618a5230 1413 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1414 lpfc_offline(phba);
da0436e9 1415 lpfc_hba_down_post(phba);
da0436e9 1416 lpfc_unblock_mgmt_io(phba);
da0436e9
JS
1417}
1418
a257bf90
JS
1419/**
1420 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1421 * @phba: pointer to lpfc hba data structure.
1422 *
1423 * This routine is invoked to handle the deferred HBA hardware error
1424 * conditions. This type of error is indicated by HBA by setting ER1
1425 * and another ER bit in the host status register. The driver will
1426 * wait until the ER1 bit clears before handling the error condition.
1427 **/
1428static void
1429lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1430{
1431 uint32_t old_host_status = phba->work_hs;
a257bf90
JS
1432 struct lpfc_sli *psli = &phba->sli;
1433
f4b4c68f
JS
1434 /* If the pci channel is offline, ignore possible errors,
1435 * since we cannot communicate with the pci card anyway.
1436 */
1437 if (pci_channel_offline(phba->pcidev)) {
1438 spin_lock_irq(&phba->hbalock);
1439 phba->hba_flag &= ~DEFER_ERATT;
1440 spin_unlock_irq(&phba->hbalock);
1441 return;
1442 }
1443
a257bf90
JS
1444 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1445 "0479 Deferred Adapter Hardware Error "
1446 "Data: x%x x%x x%x\n",
1447 phba->work_hs,
1448 phba->work_status[0], phba->work_status[1]);
1449
1450 spin_lock_irq(&phba->hbalock);
f4b4c68f 1451 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS
1452 spin_unlock_irq(&phba->hbalock);
1453
1454
1455 /*
1456 * Firmware stops when it triggred erratt. That could cause the I/Os
1457 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1458 * SCSI layer retry it after re-establishing link.
1459 */
db55fba8 1460 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS
1461
1462 /*
1463 * There was a firmware error. Take the hba offline and then
1464 * attempt to restart it.
1465 */
618a5230 1466 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS
1467 lpfc_offline(phba);
1468
1469 /* Wait for the ER1 bit to clear.*/
1470 while (phba->work_hs & HS_FFER1) {
1471 msleep(100);
9940b97b
JS
1472 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1473 phba->work_hs = UNPLUG_ERR ;
1474 break;
1475 }
a257bf90
JS
1476 /* If driver is unloading let the worker thread continue */
1477 if (phba->pport->load_flag & FC_UNLOADING) {
1478 phba->work_hs = 0;
1479 break;
1480 }
1481 }
1482
1483 /*
1484 * This is to ptrotect against a race condition in which
1485 * first write to the host attention register clear the
1486 * host status register.
1487 */
1488 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1489 phba->work_hs = old_host_status & ~HS_FFER1;
1490
3772a991 1491 spin_lock_irq(&phba->hbalock);
a257bf90 1492 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1493 spin_unlock_irq(&phba->hbalock);
a257bf90
JS
1494 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1495 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1496}
1497
3772a991
JS
1498static void
1499lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1500{
1501 struct lpfc_board_event_header board_event;
1502 struct Scsi_Host *shost;
1503
1504 board_event.event_type = FC_REG_BOARD_EVENT;
1505 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1506 shost = lpfc_shost_from_vport(phba->pport);
1507 fc_host_post_vendor_event(shost, fc_get_event_number(),
1508 sizeof(board_event),
1509 (char *) &board_event,
1510 LPFC_NL_VENDOR_ID);
1511}
1512
e59058c4 1513/**
3772a991 1514 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS
1515 * @phba: pointer to lpfc hba data structure.
1516 *
1517 * This routine is invoked to handle the following HBA hardware error
1518 * conditions:
1519 * 1 - HBA error attention interrupt
1520 * 2 - DMA ring index out of range
1521 * 3 - Mailbox command came back as unknown
1522 **/
3772a991
JS
1523static void
1524lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1525{
2e0fef85 1526 struct lpfc_vport *vport = phba->pport;
2e0fef85 1527 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1528 uint32_t event_data;
57127f15
JS
1529 unsigned long temperature;
1530 struct temp_event temp_event_data;
92d7f7b0 1531 struct Scsi_Host *shost;
2e0fef85 1532
8d63f375 1533 /* If the pci channel is offline, ignore possible errors,
3772a991
JS
1534 * since we cannot communicate with the pci card anyway.
1535 */
1536 if (pci_channel_offline(phba->pcidev)) {
1537 spin_lock_irq(&phba->hbalock);
1538 phba->hba_flag &= ~DEFER_ERATT;
1539 spin_unlock_irq(&phba->hbalock);
8d63f375 1540 return;
3772a991
JS
1541 }
1542
13815c83
JS
1543 /* If resets are disabled then leave the HBA alone and return */
1544 if (!phba->cfg_enable_hba_reset)
1545 return;
dea3101e 1546
ea2151b4 1547 /* Send an internal error event to mgmt application */
3772a991 1548 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1549
a257bf90
JS
1550 if (phba->hba_flag & DEFER_ERATT)
1551 lpfc_handle_deferred_eratt(phba);
1552
dcf2a4e0
JS
1553 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1554 if (phba->work_hs & HS_FFER6)
1555 /* Re-establishing Link */
1556 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1557 "1301 Re-establishing Link "
1558 "Data: x%x x%x x%x\n",
1559 phba->work_hs, phba->work_status[0],
1560 phba->work_status[1]);
1561 if (phba->work_hs & HS_FFER8)
1562 /* Device Zeroization */
1563 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1564 "2861 Host Authentication device "
1565 "zeroization Data:x%x x%x x%x\n",
1566 phba->work_hs, phba->work_status[0],
1567 phba->work_status[1]);
58da1ffb 1568
92d7f7b0 1569 spin_lock_irq(&phba->hbalock);
f4b4c68f 1570 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1571 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1572
1573 /*
1574 * Firmware stops when it triggled erratt with HS_FFER6.
1575 * That could cause the I/Os dropped by the firmware.
1576 * Error iocb (I/O) on txcmplq and let the SCSI layer
1577 * retry it after re-establishing link.
1578 */
db55fba8 1579 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1580
dea3101e
JB
1581 /*
1582 * There was a firmware error. Take the hba offline and then
1583 * attempt to restart it.
1584 */
618a5230 1585 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1586 lpfc_offline(phba);
41415862 1587 lpfc_sli_brdrestart(phba);
dea3101e 1588 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1589 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
1590 return;
1591 }
46fa311e 1592 lpfc_unblock_mgmt_io(phba);
57127f15
JS
1593 } else if (phba->work_hs & HS_CRIT_TEMP) {
1594 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1595 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1596 temp_event_data.event_code = LPFC_CRIT_TEMP;
1597 temp_event_data.data = (uint32_t)temperature;
1598
1599 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1600 "0406 Adapter maximum temperature exceeded "
57127f15
JS
1601 "(%ld), taking this port offline "
1602 "Data: x%x x%x x%x\n",
1603 temperature, phba->work_hs,
1604 phba->work_status[0], phba->work_status[1]);
1605
1606 shost = lpfc_shost_from_vport(phba->pport);
1607 fc_host_post_vendor_event(shost, fc_get_event_number(),
1608 sizeof(temp_event_data),
1609 (char *) &temp_event_data,
1610 SCSI_NL_VID_TYPE_PCI
1611 | PCI_VENDOR_ID_EMULEX);
1612
7af67051 1613 spin_lock_irq(&phba->hbalock);
7af67051
JS
1614 phba->over_temp_state = HBA_OVER_TEMP;
1615 spin_unlock_irq(&phba->hbalock);
09372820 1616 lpfc_offline_eratt(phba);
57127f15 1617
dea3101e
JB
1618 } else {
1619 /* The if clause above forces this code path when the status
9399627f
JS
1620 * failure is a value other than FFER6. Do not call the offline
1621 * twice. This is the adapter hardware error path.
dea3101e
JB
1622 */
1623 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1624 "0457 Adapter Hardware Error "
dea3101e 1625 "Data: x%x x%x x%x\n",
e8b62011 1626 phba->work_hs,
dea3101e
JB
1627 phba->work_status[0], phba->work_status[1]);
1628
d2873e4c 1629 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1630 shost = lpfc_shost_from_vport(vport);
2e0fef85 1631 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS
1632 sizeof(event_data), (char *) &event_data,
1633 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1634
09372820 1635 lpfc_offline_eratt(phba);
dea3101e 1636 }
9399627f 1637 return;
dea3101e
JB
1638}
1639
618a5230
JS
1640/**
1641 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1642 * @phba: pointer to lpfc hba data structure.
1643 * @mbx_action: flag for mailbox shutdown action.
1644 *
1645 * This routine is invoked to perform an SLI4 port PCI function reset in
1646 * response to port status register polling attention. It waits for port
1647 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1648 * During this process, interrupt vectors are freed and later requested
1649 * for handling possible port resource change.
1650 **/
1651static int
e10b2022
JS
1652lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1653 bool en_rn_msg)
618a5230
JS
1654{
1655 int rc;
1656 uint32_t intr_mode;
1657
65791f1f
JS
1658 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1659 LPFC_SLI_INTF_IF_TYPE_2) {
1660 /*
1661 * On error status condition, driver need to wait for port
1662 * ready before performing reset.
1663 */
1664 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1665 if (rc)
65791f1f
JS
1666 return rc;
1667 }
0e916ee7 1668
65791f1f
JS
1669 /* need reset: attempt for port recovery */
1670 if (en_rn_msg)
1671 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1672 "2887 Reset Needed: Attempting Port "
1673 "Recovery...\n");
1674 lpfc_offline_prep(phba, mbx_action);
1675 lpfc_offline(phba);
1676 /* release interrupt for possible resource change */
1677 lpfc_sli4_disable_intr(phba);
1678 lpfc_sli_brdrestart(phba);
1679 /* request and enable interrupt */
1680 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1681 if (intr_mode == LPFC_INTR_ERROR) {
1682 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1683 "3175 Failed to enable interrupt\n");
1684 return -EIO;
618a5230 1685 }
65791f1f
JS
1686 phba->intr_mode = intr_mode;
1687 rc = lpfc_online(phba);
1688 if (rc == 0)
1689 lpfc_unblock_mgmt_io(phba);
1690
618a5230
JS
1691 return rc;
1692}
1693
da0436e9
JS
1694/**
1695 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1696 * @phba: pointer to lpfc hba data structure.
1697 *
1698 * This routine is invoked to handle the SLI4 HBA hardware error attention
1699 * conditions.
1700 **/
1701static void
1702lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1703{
1704 struct lpfc_vport *vport = phba->pport;
1705 uint32_t event_data;
1706 struct Scsi_Host *shost;
2fcee4bf 1707 uint32_t if_type;
2e90f4b5
JS
1708 struct lpfc_register portstat_reg = {0};
1709 uint32_t reg_err1, reg_err2;
1710 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1711 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1712 bool en_rn_msg = true;
946727dc 1713 struct temp_event temp_event_data;
65791f1f
JS
1714 struct lpfc_register portsmphr_reg;
1715 int rc, i;
da0436e9
JS
1716
1717 /* If the pci channel is offline, ignore possible errors, since
1718 * we cannot communicate with the pci card anyway.
1719 */
1720 if (pci_channel_offline(phba->pcidev))
1721 return;
da0436e9 1722
65791f1f 1723 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS
1724 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1725 switch (if_type) {
1726 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS
1727 pci_rd_rc1 = lpfc_readl(
1728 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1729 &uerrlo_reg);
1730 pci_rd_rc2 = lpfc_readl(
1731 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1732 &uemasklo_reg);
1733 /* consider PCI bus read error as pci_channel_offline */
1734 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1735 return;
65791f1f
JS
1736 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1737 lpfc_sli4_offline_eratt(phba);
1738 return;
1739 }
1740 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1741 "7623 Checking UE recoverable");
1742
1743 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1744 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1745 &portsmphr_reg.word0))
1746 continue;
1747
1748 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1749 &portsmphr_reg);
1750 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1751 LPFC_PORT_SEM_UE_RECOVERABLE)
1752 break;
1753 /*Sleep for 1Sec, before checking SEMAPHORE */
1754 msleep(1000);
1755 }
1756
1757 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1758 "4827 smphr_port_status x%x : Waited %dSec",
1759 smphr_port_status, i);
1760
1761 /* Recoverable UE, reset the HBA device */
1762 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1763 LPFC_PORT_SEM_UE_RECOVERABLE) {
1764 for (i = 0; i < 20; i++) {
1765 msleep(1000);
1766 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1767 &portsmphr_reg.word0) &&
1768 (LPFC_POST_STAGE_PORT_READY ==
1769 bf_get(lpfc_port_smphr_port_status,
1770 &portsmphr_reg))) {
1771 rc = lpfc_sli4_port_sta_fn_reset(phba,
1772 LPFC_MBX_NO_WAIT, en_rn_msg);
1773 if (rc == 0)
1774 return;
1775 lpfc_printf_log(phba,
1776 KERN_ERR, LOG_INIT,
1777 "4215 Failed to recover UE");
1778 break;
1779 }
1780 }
1781 }
1782 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1783 "7624 Firmware not ready: Failing UE recovery,"
1784 " waited %dSec", i);
2fcee4bf
JS
1785 lpfc_sli4_offline_eratt(phba);
1786 break;
946727dc 1787
2fcee4bf 1788 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS
1789 pci_rd_rc1 = lpfc_readl(
1790 phba->sli4_hba.u.if_type2.STATUSregaddr,
1791 &portstat_reg.word0);
1792 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS
1793 if (pci_rd_rc1 == -EIO) {
1794 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1795 "3151 PCI bus read access failure: x%x\n",
1796 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1797 return;
6b5151fd 1798 }
2e90f4b5
JS
1799 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1800 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1801 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS
1802 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1803 "2889 Port Overtemperature event, "
946727dc
JS
1804 "taking port offline Data: x%x x%x\n",
1805 reg_err1, reg_err2);
1806
310429ef 1807 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
1808 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1809 temp_event_data.event_code = LPFC_CRIT_TEMP;
1810 temp_event_data.data = 0xFFFFFFFF;
1811
1812 shost = lpfc_shost_from_vport(phba->pport);
1813 fc_host_post_vendor_event(shost, fc_get_event_number(),
1814 sizeof(temp_event_data),
1815 (char *)&temp_event_data,
1816 SCSI_NL_VID_TYPE_PCI
1817 | PCI_VENDOR_ID_EMULEX);
1818
2fcee4bf
JS
1819 spin_lock_irq(&phba->hbalock);
1820 phba->over_temp_state = HBA_OVER_TEMP;
1821 spin_unlock_irq(&phba->hbalock);
1822 lpfc_sli4_offline_eratt(phba);
946727dc 1823 return;
2fcee4bf 1824 }
2e90f4b5 1825 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1826 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1827 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS
1828 "3143 Port Down: Firmware Update "
1829 "Detected\n");
1830 en_rn_msg = false;
1831 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS
1832 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1833 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1834 "3144 Port Down: Debug Dump\n");
1835 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1836 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1837 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1838 "3145 Port Down: Provisioning\n");
618a5230 1839
946727dc
JS
1840 /* If resets are disabled then leave the HBA alone and return */
1841 if (!phba->cfg_enable_hba_reset)
1842 return;
1843
618a5230 1844 /* Check port status register for function reset */
e10b2022
JS
1845 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1846 en_rn_msg);
618a5230
JS
1847 if (rc == 0) {
1848 /* don't report event on forced debug dump */
1849 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1850 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1851 return;
1852 else
1853 break;
2fcee4bf 1854 }
618a5230 1855 /* fall through for not able to recover */
6b5151fd
JS
1856 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1857 "3152 Unrecoverable error, bring the port "
1858 "offline\n");
2fcee4bf
JS
1859 lpfc_sli4_offline_eratt(phba);
1860 break;
1861 case LPFC_SLI_INTF_IF_TYPE_1:
1862 default:
1863 break;
1864 }
2e90f4b5
JS
1865 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1866 "3123 Report dump event to upper layer\n");
1867 /* Send an internal error event to mgmt application */
1868 lpfc_board_errevt_to_mgmt(phba);
1869
1870 event_data = FC_REG_DUMP_EVENT;
1871 shost = lpfc_shost_from_vport(vport);
1872 fc_host_post_vendor_event(shost, fc_get_event_number(),
1873 sizeof(event_data), (char *) &event_data,
1874 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS
1875}
1876
1877/**
1878 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1879 * @phba: pointer to lpfc HBA data structure.
1880 *
1881 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1882 * routine from the API jump table function pointer from the lpfc_hba struct.
1883 *
1884 * Return codes
af901ca1 1885 * 0 - success.
da0436e9
JS
1886 * Any other value - error.
1887 **/
1888void
1889lpfc_handle_eratt(struct lpfc_hba *phba)
1890{
1891 (*phba->lpfc_handle_eratt)(phba);
1892}
1893
e59058c4 1894/**
3621a710 1895 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS
1896 * @phba: pointer to lpfc hba data structure.
1897 *
1898 * This routine is invoked from the worker thread to handle a HBA host
895427bd 1899 * attention link event. SLI3 only.
e59058c4 1900 **/
dea3101e 1901void
2e0fef85 1902lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 1903{
2e0fef85
JS
1904 struct lpfc_vport *vport = phba->pport;
1905 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB
1906 LPFC_MBOXQ_t *pmb;
1907 volatile uint32_t control;
1908 struct lpfc_dmabuf *mp;
09372820 1909 int rc = 0;
dea3101e
JB
1910
1911 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS
1912 if (!pmb) {
1913 rc = 1;
dea3101e 1914 goto lpfc_handle_latt_err_exit;
09372820 1915 }
dea3101e
JB
1916
1917 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS
1918 if (!mp) {
1919 rc = 2;
dea3101e 1920 goto lpfc_handle_latt_free_pmb;
09372820 1921 }
dea3101e
JB
1922
1923 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS
1924 if (!mp->virt) {
1925 rc = 3;
dea3101e 1926 goto lpfc_handle_latt_free_mp;
09372820 1927 }
dea3101e 1928
6281bfe0 1929 /* Cleanup any outstanding ELS commands */
549e55cd 1930 lpfc_els_flush_all_cmd(phba);
dea3101e
JB
1931
1932 psli->slistat.link_event++;
76a95d75
JS
1933 lpfc_read_topology(phba, pmb, mp);
1934 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 1935 pmb->vport = vport;
0d2b6b83 1936 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 1937 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 1938 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS
1939 if (rc == MBX_NOT_FINISHED) {
1940 rc = 4;
14691150 1941 goto lpfc_handle_latt_free_mbuf;
09372820 1942 }
dea3101e
JB
1943
1944 /* Clear Link Attention in HA REG */
2e0fef85 1945 spin_lock_irq(&phba->hbalock);
dea3101e
JB
1946 writel(HA_LATT, phba->HAregaddr);
1947 readl(phba->HAregaddr); /* flush */
2e0fef85 1948 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1949
1950 return;
1951
14691150 1952lpfc_handle_latt_free_mbuf:
895427bd 1953 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 1954 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e
JB
1955lpfc_handle_latt_free_mp:
1956 kfree(mp);
1957lpfc_handle_latt_free_pmb:
1dcb58e5 1958 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
1959lpfc_handle_latt_err_exit:
1960 /* Enable Link attention interrupts */
2e0fef85 1961 spin_lock_irq(&phba->hbalock);
dea3101e
JB
1962 psli->sli_flag |= LPFC_PROCESS_LA;
1963 control = readl(phba->HCregaddr);
1964 control |= HC_LAINT_ENA;
1965 writel(control, phba->HCregaddr);
1966 readl(phba->HCregaddr); /* flush */
1967
1968 /* Clear Link Attention in HA REG */
1969 writel(HA_LATT, phba->HAregaddr);
1970 readl(phba->HAregaddr); /* flush */
2e0fef85 1971 spin_unlock_irq(&phba->hbalock);
dea3101e 1972 lpfc_linkdown(phba);
2e0fef85 1973 phba->link_state = LPFC_HBA_ERROR;
dea3101e 1974
09372820
JS
1975 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
1976 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e
JB
1977
1978 return;
1979}
1980
e59058c4 1981/**
3621a710 1982 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS
1983 * @phba: pointer to lpfc hba data structure.
1984 * @vpd: pointer to the vital product data.
1985 * @len: length of the vital product data in bytes.
1986 *
1987 * This routine parses the Vital Product Data (VPD). The VPD is treated as
1988 * an array of characters. In this routine, the ModelName, ProgramType, and
1989 * ModelDesc, etc. fields of the phba data structure will be populated.
1990 *
1991 * Return codes
1992 * 0 - pointer to the VPD passed in is NULL
1993 * 1 - success
1994 **/
3772a991 1995int
2e0fef85 1996lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e
JB
1997{
1998 uint8_t lenlo, lenhi;
07da60c1 1999 int Length;
dea3101e
JB
2000 int i, j;
2001 int finished = 0;
2002 int index = 0;
2003
2004 if (!vpd)
2005 return 0;
2006
2007 /* Vital Product */
ed957684 2008 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2009 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e
JB
2010 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2011 (uint32_t) vpd[3]);
74b72a59 2012 while (!finished && (index < (len - 4))) {
dea3101e
JB
2013 switch (vpd[index]) {
2014 case 0x82:
74b72a59 2015 case 0x91:
dea3101e
JB
2016 index += 1;
2017 lenlo = vpd[index];
2018 index += 1;
2019 lenhi = vpd[index];
2020 index += 1;
2021 i = ((((unsigned short)lenhi) << 8) + lenlo);
2022 index += i;
2023 break;
2024 case 0x90:
2025 index += 1;
2026 lenlo = vpd[index];
2027 index += 1;
2028 lenhi = vpd[index];
2029 index += 1;
2030 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW
2031 if (Length > len - index)
2032 Length = len - index;
dea3101e
JB
2033 while (Length > 0) {
2034 /* Look for Serial Number */
2035 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2036 index += 2;
2037 i = vpd[index];
2038 index += 1;
2039 j = 0;
2040 Length -= (3+i);
2041 while(i--) {
2042 phba->SerialNumber[j++] = vpd[index++];
2043 if (j == 31)
2044 break;
2045 }
2046 phba->SerialNumber[j] = 0;
2047 continue;
2048 }
2049 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2050 phba->vpd_flag |= VPD_MODEL_DESC;
2051 index += 2;
2052 i = vpd[index];
2053 index += 1;
2054 j = 0;
2055 Length -= (3+i);
2056 while(i--) {
2057 phba->ModelDesc[j++] = vpd[index++];
2058 if (j == 255)
2059 break;
2060 }
2061 phba->ModelDesc[j] = 0;
2062 continue;
2063 }
2064 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2065 phba->vpd_flag |= VPD_MODEL_NAME;
2066 index += 2;
2067 i = vpd[index];
2068 index += 1;
2069 j = 0;
2070 Length -= (3+i);
2071 while(i--) {
2072 phba->ModelName[j++] = vpd[index++];
2073 if (j == 79)
2074 break;
2075 }
2076 phba->ModelName[j] = 0;
2077 continue;
2078 }
2079 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2080 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2081 index += 2;
2082 i = vpd[index];
2083 index += 1;
2084 j = 0;
2085 Length -= (3+i);
2086 while(i--) {
2087 phba->ProgramType[j++] = vpd[index++];
2088 if (j == 255)
2089 break;
2090 }
2091 phba->ProgramType[j] = 0;
2092 continue;
2093 }
2094 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2095 phba->vpd_flag |= VPD_PORT;
2096 index += 2;
2097 i = vpd[index];
2098 index += 1;
2099 j = 0;
2100 Length -= (3+i);
2101 while(i--) {
cd1c8301
JS
2102 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2103 (phba->sli4_hba.pport_name_sta ==
2104 LPFC_SLI4_PPNAME_GET)) {
2105 j++;
2106 index++;
2107 } else
2108 phba->Port[j++] = vpd[index++];
2109 if (j == 19)
2110 break;
dea3101e 2111 }
cd1c8301
JS
2112 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2113 (phba->sli4_hba.pport_name_sta ==
2114 LPFC_SLI4_PPNAME_NON))
2115 phba->Port[j] = 0;
dea3101e
JB
2116 continue;
2117 }
2118 else {
2119 index += 2;
2120 i = vpd[index];
2121 index += 1;
2122 index += i;
2123 Length -= (3 + i);
2124 }
2125 }
2126 finished = 0;
2127 break;
2128 case 0x78:
2129 finished = 1;
2130 break;
2131 default:
2132 index ++;
2133 break;
2134 }
74b72a59 2135 }
dea3101e
JB
2136
2137 return(1);
2138}
2139
e59058c4 2140/**
3621a710 2141 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS
2142 * @phba: pointer to lpfc hba data structure.
2143 * @mdp: pointer to the data structure to hold the derived model name.
2144 * @descp: pointer to the data structure to hold the derived description.
2145 *
2146 * This routine retrieves HBA's description based on its registered PCI device
2147 * ID. The @descp passed into this function points to an array of 256 chars. It
2148 * shall be returned with the model name, maximum speed, and the host bus type.
2149 * The @mdp passed into this function points to an array of 80 chars. When the
2150 * function returns, the @mdp will be filled with the model name.
2151 **/
dea3101e 2152static void
2e0fef85 2153lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e
JB
2154{
2155 lpfc_vpd_t *vp;
fefcb2b6 2156 uint16_t dev_id = phba->pcidev->device;
74b72a59 2157 int max_speed;
84774a4d 2158 int GE = 0;
da0436e9 2159 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2160 struct {
a747c9ce
JS
2161 char *name;
2162 char *bus;
2163 char *function;
2164 } m = {"<Unknown>", "", ""};
74b72a59
JW
2165
2166 if (mdp && mdp[0] != '\0'
2167 && descp && descp[0] != '\0')
2168 return;
2169
d38dd52c
JS
2170 if (phba->lmt & LMT_32Gb)
2171 max_speed = 32;
2172 else if (phba->lmt & LMT_16Gb)
c0c11512
JS
2173 max_speed = 16;
2174 else if (phba->lmt & LMT_10Gb)
74b72a59
JW
2175 max_speed = 10;
2176 else if (phba->lmt & LMT_8Gb)
2177 max_speed = 8;
2178 else if (phba->lmt & LMT_4Gb)
2179 max_speed = 4;
2180 else if (phba->lmt & LMT_2Gb)
2181 max_speed = 2;
4169d868 2182 else if (phba->lmt & LMT_1Gb)
74b72a59 2183 max_speed = 1;
4169d868
JS
2184 else
2185 max_speed = 0;
dea3101e
JB
2186
2187 vp = &phba->vpd;
dea3101e 2188
e4adb204 2189 switch (dev_id) {
06325e74 2190 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS
2191 m = (typeof(m)){"LP6000", "PCI",
2192 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2193 break;
dea3101e
JB
2194 case PCI_DEVICE_ID_SUPERFLY:
2195 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2196 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2197 else
12222f4f
JS
2198 m = (typeof(m)){"LP7000E", "PCI", ""};
2199 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2200 break;
2201 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2202 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2203 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2204 break;
2205 case PCI_DEVICE_ID_CENTAUR:
2206 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2207 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2208 else
12222f4f
JS
2209 m = (typeof(m)){"LP9000", "PCI", ""};
2210 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2211 break;
2212 case PCI_DEVICE_ID_RFLY:
a747c9ce 2213 m = (typeof(m)){"LP952", "PCI",
12222f4f 2214 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2215 break;
2216 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2217 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2218 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2219 break;
2220 case PCI_DEVICE_ID_THOR:
a747c9ce 2221 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2222 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2223 break;
2224 case PCI_DEVICE_ID_VIPER:
a747c9ce 2225 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2226 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2227 break;
2228 case PCI_DEVICE_ID_PFLY:
a747c9ce 2229 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2230 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2231 break;
2232 case PCI_DEVICE_ID_TFLY:
a747c9ce 2233 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2234 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2235 break;
2236 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2237 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2238 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2239 break;
e4adb204 2240 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2241 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2242 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2243 break;
2244 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2245 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2246 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2247 break;
2248 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS
2249 m = (typeof(m)){"LPe1000", "PCIe",
2250 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2251 break;
2252 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS
2253 m = (typeof(m)){"LPe1000-SP", "PCIe",
2254 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2255 break;
2256 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS
2257 m = (typeof(m)){"LPe1002-SP", "PCIe",
2258 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2259 break;
dea3101e 2260 case PCI_DEVICE_ID_BMID:
a747c9ce 2261 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e
JB
2262 break;
2263 case PCI_DEVICE_ID_BSMB:
12222f4f
JS
2264 m = (typeof(m)){"LP111", "PCI-X2",
2265 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2266 break;
2267 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2268 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2269 break;
e4adb204 2270 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2271 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC
2272 break;
2273 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2274 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2275 GE = 1;
e4adb204 2276 break;
dea3101e 2277 case PCI_DEVICE_ID_ZMID:
a747c9ce 2278 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2279 break;
2280 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2281 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2282 break;
2283 case PCI_DEVICE_ID_LP101:
12222f4f
JS
2284 m = (typeof(m)){"LP101", "PCI-X",
2285 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2286 break;
2287 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS
2288 m = (typeof(m)){"LP10000-S", "PCI",
2289 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2290 break;
e4adb204 2291 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS
2292 m = (typeof(m)){"LP11000-S", "PCI-X2",
2293 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2294 break;
e4adb204 2295 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS
2296 m = (typeof(m)){"LPe11000-S", "PCIe",
2297 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2298 break;
b87eab38 2299 case PCI_DEVICE_ID_SAT:
a747c9ce 2300 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2301 break;
2302 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2303 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2304 break;
2305 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2306 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2307 break;
2308 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2309 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2310 break;
2311 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2312 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2313 break;
2314 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2315 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2316 break;
84774a4d 2317 case PCI_DEVICE_ID_HORNET:
12222f4f
JS
2318 m = (typeof(m)){"LP21000", "PCIe",
2319 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS
2320 GE = 1;
2321 break;
2322 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2323 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2324 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2325 break;
2326 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2327 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2328 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2329 break;
2330 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2331 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2332 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2333 break;
da0436e9
JS
2334 case PCI_DEVICE_ID_TIGERSHARK:
2335 oneConnect = 1;
a747c9ce 2336 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2337 break;
a747c9ce 2338 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2339 oneConnect = 1;
a747c9ce
JS
2340 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2341 break;
2342 case PCI_DEVICE_ID_FALCON:
2343 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2344 "EmulexSecure Fibre"};
6669f9bb 2345 break;
98fc5dd9
JS
2346 case PCI_DEVICE_ID_BALIUS:
2347 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2348 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2349 break;
085c647c 2350 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2351 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2352 break;
12222f4f
JS
2353 case PCI_DEVICE_ID_LANCER_FC_VF:
2354 m = (typeof(m)){"LPe16000", "PCIe",
2355 "Obsolete, Unsupported Fibre Channel Adapter"};
2356 break;
085c647c
JS
2357 case PCI_DEVICE_ID_LANCER_FCOE:
2358 oneConnect = 1;
079b5c91 2359 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2360 break;
12222f4f
JS
2361 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2362 oneConnect = 1;
2363 m = (typeof(m)){"OCe15100", "PCIe",
2364 "Obsolete, Unsupported FCoE"};
2365 break;
d38dd52c
JS
2366 case PCI_DEVICE_ID_LANCER_G6_FC:
2367 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2368 break;
f8cafd38
JS
2369 case PCI_DEVICE_ID_SKYHAWK:
2370 case PCI_DEVICE_ID_SKYHAWK_VF:
2371 oneConnect = 1;
2372 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2373 break;
5cc36b3c 2374 default:
a747c9ce 2375 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2376 break;
dea3101e 2377 }
74b72a59
JW
2378
2379 if (mdp && mdp[0] == '\0')
2380 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS
2381 /*
2382 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS
2383 * and we put the port number on the end
2384 */
2385 if (descp && descp[0] == '\0') {
2386 if (oneConnect)
2387 snprintf(descp, 255,
4169d868 2388 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2389 m.name, m.function,
da0436e9 2390 phba->Port);
4169d868
JS
2391 else if (max_speed == 0)
2392 snprintf(descp, 255,
290237d2 2393 "Emulex %s %s %s",
4169d868 2394 m.name, m.bus, m.function);
da0436e9
JS
2395 else
2396 snprintf(descp, 255,
2397 "Emulex %s %d%s %s %s",
a747c9ce
JS
2398 m.name, max_speed, (GE) ? "GE" : "Gb",
2399 m.bus, m.function);
da0436e9 2400 }
dea3101e
JB
2401}
2402
e59058c4 2403/**
3621a710 2404 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS
2405 * @phba: pointer to lpfc hba data structure.
2406 * @pring: pointer to a IOCB ring.
2407 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2408 *
2409 * This routine posts a given number of IOCBs with the associated DMA buffer
2410 * descriptors specified by the cnt argument to the given IOCB ring.
2411 *
2412 * Return codes
2413 * The number of IOCBs NOT able to be posted to the IOCB ring.
2414 **/
dea3101e 2415int
495a714c 2416lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e
JB
2417{
2418 IOCB_t *icmd;
0bd4ca25 2419 struct lpfc_iocbq *iocb;
dea3101e
JB
2420 struct lpfc_dmabuf *mp1, *mp2;
2421
2422 cnt += pring->missbufcnt;
2423
2424 /* While there are buffers to post */
2425 while (cnt > 0) {
2426 /* Allocate buffer for command iocb */
0bd4ca25 2427 iocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
2428 if (iocb == NULL) {
2429 pring->missbufcnt = cnt;
2430 return cnt;
2431 }
dea3101e
JB
2432 icmd = &iocb->iocb;
2433
2434 /* 2 buffers can be posted per command */
2435 /* Allocate buffer to post */
2436 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2437 if (mp1)
98c9ea5c
JS
2438 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2439 if (!mp1 || !mp1->virt) {
c9475cb0 2440 kfree(mp1);
604a3e30 2441 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2442 pring->missbufcnt = cnt;
2443 return cnt;
2444 }
2445
2446 INIT_LIST_HEAD(&mp1->list);
2447 /* Allocate buffer to post */
2448 if (cnt > 1) {
2449 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2450 if (mp2)
2451 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2452 &mp2->phys);
98c9ea5c 2453 if (!mp2 || !mp2->virt) {
c9475cb0 2454 kfree(mp2);
dea3101e
JB
2455 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2456 kfree(mp1);
604a3e30 2457 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2458 pring->missbufcnt = cnt;
2459 return cnt;
2460 }
2461
2462 INIT_LIST_HEAD(&mp2->list);
2463 } else {
2464 mp2 = NULL;
2465 }
2466
2467 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2468 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2469 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2470 icmd->ulpBdeCount = 1;
2471 cnt--;
2472 if (mp2) {
2473 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2474 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2475 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2476 cnt--;
2477 icmd->ulpBdeCount = 2;
2478 }
2479
2480 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2481 icmd->ulpLe = 1;
2482
3772a991
JS
2483 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2484 IOCB_ERROR) {
dea3101e
JB
2485 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2486 kfree(mp1);
2487 cnt++;
2488 if (mp2) {
2489 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2490 kfree(mp2);
2491 cnt++;
2492 }
604a3e30 2493 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2494 pring->missbufcnt = cnt;
dea3101e
JB
2495 return cnt;
2496 }
dea3101e 2497 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2498 if (mp2)
dea3101e 2499 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e
JB
2500 }
2501 pring->missbufcnt = 0;
2502 return 0;
2503}
2504
e59058c4 2505/**
3621a710 2506 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS
2507 * @phba: pointer to lpfc hba data structure.
2508 *
2509 * This routine posts initial receive IOCB buffers to the ELS ring. The
2510 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2511 * set to 64 IOCBs. SLI3 only.
e59058c4
JS
2512 *
2513 * Return codes
2514 * 0 - success (currently always success)
2515 **/
dea3101e 2516static int
2e0fef85 2517lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e
JB
2518{
2519 struct lpfc_sli *psli = &phba->sli;
2520
2521 /* Ring 0, ELS / CT buffers */
895427bd 2522 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e
JB
2523 /* Ring 2 - FCP no buffers needed */
2524
2525 return 0;
2526}
2527
2528#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2529
e59058c4 2530/**
3621a710 2531 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS
2532 * @HashResultPointer: pointer to an array as hash table.
2533 *
2534 * This routine sets up the initial values to the array of hash table entries
2535 * for the LC HBAs.
2536 **/
dea3101e
JB
2537static void
2538lpfc_sha_init(uint32_t * HashResultPointer)
2539{
2540 HashResultPointer[0] = 0x67452301;
2541 HashResultPointer[1] = 0xEFCDAB89;
2542 HashResultPointer[2] = 0x98BADCFE;
2543 HashResultPointer[3] = 0x10325476;
2544 HashResultPointer[4] = 0xC3D2E1F0;
2545}
2546
e59058c4 2547/**
3621a710 2548 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS
2549 * @HashResultPointer: pointer to an initial/result hash table.
2550 * @HashWorkingPointer: pointer to an working hash table.
2551 *
2552 * This routine iterates an initial hash table pointed by @HashResultPointer
2553 * with the values from the working hash table pointeed by @HashWorkingPointer.
2554 * The results are putting back to the initial hash table, returned through
2555 * the @HashResultPointer as the result hash table.
2556 **/
dea3101e
JB
2557static void
2558lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2559{
2560 int t;
2561 uint32_t TEMP;
2562 uint32_t A, B, C, D, E;
2563 t = 16;
2564 do {
2565 HashWorkingPointer[t] =
2566 S(1,
2567 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2568 8] ^
2569 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2570 } while (++t <= 79);
2571 t = 0;
2572 A = HashResultPointer[0];
2573 B = HashResultPointer[1];
2574 C = HashResultPointer[2];
2575 D = HashResultPointer[3];
2576 E = HashResultPointer[4];
2577
2578 do {
2579 if (t < 20) {
2580 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2581 } else if (t < 40) {
2582 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2583 } else if (t < 60) {
2584 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2585 } else {
2586 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2587 }
2588 TEMP += S(5, A) + E + HashWorkingPointer[t];
2589 E = D;
2590 D = C;
2591 C = S(30, B);
2592 B = A;
2593 A = TEMP;
2594 } while (++t <= 79);
2595
2596 HashResultPointer[0] += A;
2597 HashResultPointer[1] += B;
2598 HashResultPointer[2] += C;
2599 HashResultPointer[3] += D;
2600 HashResultPointer[4] += E;
2601
2602}
2603
e59058c4 2604/**
3621a710 2605 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS
2606 * @RandomChallenge: pointer to the entry of host challenge random number array.
2607 * @HashWorking: pointer to the entry of the working hash array.
2608 *
2609 * This routine calculates the working hash array referred by @HashWorking
2610 * from the challenge random numbers associated with the host, referred by
2611 * @RandomChallenge. The result is put into the entry of the working hash
2612 * array and returned by reference through @HashWorking.
2613 **/
dea3101e
JB
2614static void
2615lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2616{
2617 *HashWorking = (*RandomChallenge ^ *HashWorking);
2618}
2619
e59058c4 2620/**
3621a710 2621 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS
2622 * @phba: pointer to lpfc hba data structure.
2623 * @hbainit: pointer to an array of unsigned 32-bit integers.
2624 *
2625 * This routine performs the special handling for LC HBA initialization.
2626 **/
dea3101e
JB
2627void
2628lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2629{
2630 int t;
2631 uint32_t *HashWorking;
2e0fef85 2632 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2633
bbfbbbc1 2634 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e
JB
2635 if (!HashWorking)
2636 return;
2637
dea3101e
JB
2638 HashWorking[0] = HashWorking[78] = *pwwnn++;
2639 HashWorking[1] = HashWorking[79] = *pwwnn;
2640
2641 for (t = 0; t < 7; t++)
2642 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2643
2644 lpfc_sha_init(hbainit);
2645 lpfc_sha_iterate(hbainit, HashWorking);
2646 kfree(HashWorking);
2647}
2648
e59058c4 2649/**
3621a710 2650 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS
2651 * @vport: pointer to a virtual N_Port data structure.
2652 *
2653 * This routine performs the necessary cleanups before deleting the @vport.
2654 * It invokes the discovery state machine to perform necessary state
2655 * transitions and to release the ndlps associated with the @vport. Note,
2656 * the physical port is treated as @vport 0.
2657 **/
87af33fe 2658void
2e0fef85 2659lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2660{
87af33fe 2661 struct lpfc_hba *phba = vport->phba;
dea3101e 2662 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2663 int i = 0;
dea3101e 2664
87af33fe
JS
2665 if (phba->link_state > LPFC_LINK_DOWN)
2666 lpfc_port_link_failure(vport);
2667
2668 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS
2669 if (!NLP_CHK_NODE_ACT(ndlp)) {
2670 ndlp = lpfc_enable_node(vport, ndlp,
2671 NLP_STE_UNUSED_NODE);
2672 if (!ndlp)
2673 continue;
2674 spin_lock_irq(&phba->ndlp_lock);
2675 NLP_SET_FREE_REQ(ndlp);
2676 spin_unlock_irq(&phba->ndlp_lock);
2677 /* Trigger the release of the ndlp memory */
2678 lpfc_nlp_put(ndlp);
2679 continue;
2680 }
2681 spin_lock_irq(&phba->ndlp_lock);
2682 if (NLP_CHK_FREE_REQ(ndlp)) {
2683 /* The ndlp should not be in memory free mode already */
2684 spin_unlock_irq(&phba->ndlp_lock);
2685 continue;
2686 } else
2687 /* Indicate request for freeing ndlp memory */
2688 NLP_SET_FREE_REQ(ndlp);
2689 spin_unlock_irq(&phba->ndlp_lock);
2690
58da1ffb
JS
2691 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2692 ndlp->nlp_DID == Fabric_DID) {
2693 /* Just free up ndlp with Fabric_DID for vports */
2694 lpfc_nlp_put(ndlp);
2695 continue;
2696 }
2697
eff4a01b
JS
2698 /* take care of nodes in unused state before the state
2699 * machine taking action.
2700 */
2701 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2702 lpfc_nlp_put(ndlp);
2703 continue;
2704 }
2705
87af33fe
JS
2706 if (ndlp->nlp_type & NLP_FABRIC)
2707 lpfc_disc_state_machine(vport, ndlp, NULL,
2708 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2709
a0f2d3ef
JS
2710 if (ndlp->nlp_fc4_type & NLP_FC4_NVME) {
2711 /* Remove the NVME transport reference now and
2712 * continue to remove the node.
2713 */
2714 lpfc_nlp_put(ndlp);
2715 }
2716
87af33fe
JS
2717 lpfc_disc_state_machine(vport, ndlp, NULL,
2718 NLP_EVT_DEVICE_RM);
2719 }
2720
a8adb832
JS
2721 /* At this point, ALL ndlp's should be gone
2722 * because of the previous NLP_EVT_DEVICE_RM.
2723 * Lets wait for this to happen, if needed.
2724 */
87af33fe 2725 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2726 if (i++ > 3000) {
87af33fe 2727 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2728 "0233 Nodelist not empty\n");
e47c9093
JS
2729 list_for_each_entry_safe(ndlp, next_ndlp,
2730 &vport->fc_nodes, nlp_listp) {
2731 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2732 LOG_NODE,
d7c255b2 2733 "0282 did:x%x ndlp:x%p "
e47c9093
JS
2734 "usgmap:x%x refcnt:%d\n",
2735 ndlp->nlp_DID, (void *)ndlp,
2736 ndlp->nlp_usg_map,
2c935bc5 2737 kref_read(&ndlp->kref));
e47c9093 2738 }
a8adb832 2739 break;
87af33fe 2740 }
a8adb832
JS
2741
2742 /* Wait for any activity on ndlps to settle */
2743 msleep(10);
87af33fe 2744 }
1151e3ec 2745 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e
JB
2746}
2747
e59058c4 2748/**
3621a710 2749 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS
2750 * @vport: pointer to a virtual N_Port data structure.
2751 *
2752 * This routine stops all the timers associated with a @vport. This function
2753 * is invoked before disabling or deleting a @vport. Note that the physical
2754 * port is treated as @vport 0.
2755 **/
92d7f7b0
JS
2756void
2757lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2758{
92d7f7b0 2759 del_timer_sync(&vport->els_tmofunc);
92494144 2760 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS
2761 lpfc_can_disctmo(vport);
2762 return;
dea3101e
JB
2763}
2764
ecfd03c6
JS
2765/**
2766 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2767 * @phba: pointer to lpfc hba data structure.
2768 *
2769 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2770 * caller of this routine should already hold the host lock.
2771 **/
2772void
2773__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2774{
5ac6b303
JS
2775 /* Clear pending FCF rediscovery wait flag */
2776 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2777
ecfd03c6
JS
2778 /* Now, try to stop the timer */
2779 del_timer(&phba->fcf.redisc_wait);
2780}
2781
2782/**
2783 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2784 * @phba: pointer to lpfc hba data structure.
2785 *
2786 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2787 * checks whether the FCF rediscovery wait timer is pending with the host
2788 * lock held before proceeding with disabling the timer and clearing the
2789 * wait timer pendig flag.
2790 **/
2791void
2792lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2793{
2794 spin_lock_irq(&phba->hbalock);
2795 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2796 /* FCF rediscovery timer already fired or stopped */
2797 spin_unlock_irq(&phba->hbalock);
2798 return;
2799 }
2800 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS
2801 /* Clear failover in progress flags */
2802 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS
2803 spin_unlock_irq(&phba->hbalock);
2804}
2805
e59058c4 2806/**
3772a991 2807 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS
2808 * @phba: pointer to lpfc hba data structure.
2809 *
2810 * This routine stops all the timers associated with a HBA. This function is
2811 * invoked before either putting a HBA offline or unloading the driver.
2812 **/
3772a991
JS
2813void
2814lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2815{
51ef4c26 2816 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2817 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2818 del_timer_sync(&phba->fabric_block_timer);
9399627f 2819 del_timer_sync(&phba->eratt_poll);
3772a991 2820 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS
2821 if (phba->sli_rev == LPFC_SLI_REV4) {
2822 del_timer_sync(&phba->rrq_tmr);
2823 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2824 }
3772a991
JS
2825 phba->hb_outstanding = 0;
2826
2827 switch (phba->pci_dev_grp) {
2828 case LPFC_PCI_DEV_LP:
2829 /* Stop any LightPulse device specific driver timers */
2830 del_timer_sync(&phba->fcp_poll_timer);
2831 break;
2832 case LPFC_PCI_DEV_OC:
2833 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2834 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS
2835 break;
2836 default:
2837 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2838 "0297 Invalid device group (x%x)\n",
2839 phba->pci_dev_grp);
2840 break;
2841 }
2e0fef85 2842 return;
dea3101e
JB
2843}
2844
e59058c4 2845/**
3621a710 2846 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS
2847 * @phba: pointer to lpfc hba data structure.
2848 *
2849 * This routine marks a HBA's management interface as blocked. Once the HBA's
2850 * management interface is marked as blocked, all the user space access to
2851 * the HBA, whether they are from sysfs interface or libdfc interface will
2852 * all be blocked. The HBA is set to block the management interface when the
2853 * driver prepares the HBA interface for online or offline.
2854 **/
a6ababd2 2855static void
618a5230 2856lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB
2857{
2858 unsigned long iflag;
6e7288d9
JS
2859 uint8_t actcmd = MBX_HEARTBEAT;
2860 unsigned long timeout;
2861
a6ababd2
AB
2862 spin_lock_irqsave(&phba->hbalock, iflag);
2863 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS
2864 spin_unlock_irqrestore(&phba->hbalock, iflag);
2865 if (mbx_action == LPFC_MBX_NO_WAIT)
2866 return;
2867 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2868 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2869 if (phba->sli.mbox_active) {
6e7288d9 2870 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS
2871 /* Determine how long we might wait for the active mailbox
2872 * command to be gracefully completed by firmware.
2873 */
2874 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2875 phba->sli.mbox_active) * 1000) + jiffies;
2876 }
a6ababd2 2877 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2878
6e7288d9
JS
2879 /* Wait for the outstnading mailbox command to complete */
2880 while (phba->sli.mbox_active) {
2881 /* Check active mailbox complete status every 2ms */
2882 msleep(2);
2883 if (time_after(jiffies, timeout)) {
2884 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2885 "2813 Mgmt IO is Blocked %x "
2886 "- mbox cmd %x still active\n",
2887 phba->sli.sli_flag, actcmd);
2888 break;
2889 }
2890 }
a6ababd2
AB
2891}
2892
6b5151fd
JS
2893/**
2894 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2895 * @phba: pointer to lpfc hba data structure.
2896 *
2897 * Allocate RPIs for all active remote nodes. This is needed whenever
2898 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2899 * is to fixup the temporary rpi assignments.
2900 **/
2901void
2902lpfc_sli4_node_prep(struct lpfc_hba *phba)
2903{
2904 struct lpfc_nodelist *ndlp, *next_ndlp;
2905 struct lpfc_vport **vports;
9d3d340d
JS
2906 int i, rpi;
2907 unsigned long flags;
6b5151fd
JS
2908
2909 if (phba->sli_rev != LPFC_SLI_REV4)
2910 return;
2911
2912 vports = lpfc_create_vport_work_array(phba);
9d3d340d
JS
2913 if (vports == NULL)
2914 return;
6b5151fd 2915
9d3d340d
JS
2916 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
2917 if (vports[i]->load_flag & FC_UNLOADING)
2918 continue;
2919
2920 list_for_each_entry_safe(ndlp, next_ndlp,
2921 &vports[i]->fc_nodes,
2922 nlp_listp) {
2923 if (!NLP_CHK_NODE_ACT(ndlp))
2924 continue;
2925 rpi = lpfc_sli4_alloc_rpi(phba);
2926 if (rpi == LPFC_RPI_ALLOC_ERROR) {
2927 spin_lock_irqsave(&phba->ndlp_lock, flags);
2928 NLP_CLR_NODE_ACT(ndlp);
2929 spin_unlock_irqrestore(&phba->ndlp_lock, flags);
2930 continue;
6b5151fd 2931 }
9d3d340d
JS
2932 ndlp->nlp_rpi = rpi;
2933 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
2934 "0009 rpi:%x DID:%x "
2935 "flg:%x map:%x %p\n", ndlp->nlp_rpi,
2936 ndlp->nlp_DID, ndlp->nlp_flag,
2937 ndlp->nlp_usg_map, ndlp);
6b5151fd
JS
2938 }
2939 }
2940 lpfc_destroy_vport_work_array(phba, vports);
2941}
2942
e59058c4 2943/**
3621a710 2944 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS
2945 * @phba: pointer to lpfc hba data structure.
2946 *
2947 * This routine initializes the HBA and brings a HBA online. During this
2948 * process, the management interface is blocked to prevent user space access
2949 * to the HBA interfering with the driver initialization.
2950 *
2951 * Return codes
2952 * 0 - successful
2953 * 1 - failed
2954 **/
dea3101e 2955int
2e0fef85 2956lpfc_online(struct lpfc_hba *phba)
dea3101e 2957{
372bd282 2958 struct lpfc_vport *vport;
549e55cd
JS
2959 struct lpfc_vport **vports;
2960 int i;
16a3a208 2961 bool vpis_cleared = false;
2e0fef85 2962
dea3101e
JB
2963 if (!phba)
2964 return 0;
372bd282 2965 vport = phba->pport;
dea3101e 2966
2e0fef85 2967 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e
JB
2968 return 0;
2969
ed957684 2970 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 2971 "0458 Bring Adapter online\n");
dea3101e 2972
618a5230 2973 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 2974
da0436e9
JS
2975 if (phba->sli_rev == LPFC_SLI_REV4) {
2976 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
2977 lpfc_unblock_mgmt_io(phba);
2978 return 1;
2979 }
16a3a208
JS
2980 spin_lock_irq(&phba->hbalock);
2981 if (!phba->sli4_hba.max_cfg_param.vpi_used)
2982 vpis_cleared = true;
2983 spin_unlock_irq(&phba->hbalock);
da0436e9 2984 } else {
895427bd 2985 lpfc_sli_queue_init(phba);
da0436e9
JS
2986 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
2987 lpfc_unblock_mgmt_io(phba);
2988 return 1;
2989 }
46fa311e 2990 }
dea3101e 2991
549e55cd 2992 vports = lpfc_create_vport_work_array(phba);
aeb6641f 2993 if (vports != NULL) {
da0436e9 2994 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS
2995 struct Scsi_Host *shost;
2996 shost = lpfc_shost_from_vport(vports[i]);
2997 spin_lock_irq(shost->host_lock);
2998 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
2999 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3000 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 3001 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 3002 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS
3003 if ((vpis_cleared) &&
3004 (vports[i]->port_type !=
3005 LPFC_PHYSICAL_PORT))
3006 vports[i]->vpi = 0;
3007 }
549e55cd
JS
3008 spin_unlock_irq(shost->host_lock);
3009 }
aeb6641f
AB
3010 }
3011 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3012
46fa311e 3013 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
3014 return 0;
3015}
3016
e59058c4 3017/**
3621a710 3018 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS
3019 * @phba: pointer to lpfc hba data structure.
3020 *
3021 * This routine marks a HBA's management interface as not blocked. Once the
3022 * HBA's management interface is marked as not blocked, all the user space
3023 * access to the HBA, whether they are from sysfs interface or libdfc
3024 * interface will be allowed. The HBA is set to block the management interface
3025 * when the driver prepares the HBA interface for online or offline and then
3026 * set to unblock the management interface afterwards.
3027 **/
46fa311e
JS
3028void
3029lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3030{
3031 unsigned long iflag;
3032
2e0fef85
JS
3033 spin_lock_irqsave(&phba->hbalock, iflag);
3034 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3035 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS
3036}
3037
e59058c4 3038/**
3621a710 3039 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS
3040 * @phba: pointer to lpfc hba data structure.
3041 *
3042 * This routine is invoked to prepare a HBA to be brought offline. It performs
3043 * unregistration login to all the nodes on all vports and flushes the mailbox
3044 * queue to make it ready to be brought offline.
3045 **/
46fa311e 3046void
618a5230 3047lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3048{
2e0fef85 3049 struct lpfc_vport *vport = phba->pport;
46fa311e 3050 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3051 struct lpfc_vport **vports;
72100cc4 3052 struct Scsi_Host *shost;
87af33fe 3053 int i;
dea3101e 3054
2e0fef85 3055 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3056 return;
dea3101e 3057
618a5230 3058 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e
JB
3059
3060 lpfc_linkdown(phba);
3061
87af33fe
JS
3062 /* Issue an unreg_login to all nodes on all vports */
3063 vports = lpfc_create_vport_work_array(phba);
3064 if (vports != NULL) {
da0436e9 3065 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS
3066 if (vports[i]->load_flag & FC_UNLOADING)
3067 continue;
72100cc4
JS
3068 shost = lpfc_shost_from_vport(vports[i]);
3069 spin_lock_irq(shost->host_lock);
c868595d 3070 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS
3071 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3072 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3073 spin_unlock_irq(shost->host_lock);
695a814e 3074
87af33fe
JS
3075 shost = lpfc_shost_from_vport(vports[i]);
3076 list_for_each_entry_safe(ndlp, next_ndlp,
3077 &vports[i]->fc_nodes,
3078 nlp_listp) {
e47c9093
JS
3079 if (!NLP_CHK_NODE_ACT(ndlp))
3080 continue;
87af33fe
JS
3081 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3082 continue;
3083 if (ndlp->nlp_type & NLP_FABRIC) {
3084 lpfc_disc_state_machine(vports[i], ndlp,
3085 NULL, NLP_EVT_DEVICE_RECOVERY);
3086 lpfc_disc_state_machine(vports[i], ndlp,
3087 NULL, NLP_EVT_DEVICE_RM);
3088 }
3089 spin_lock_irq(shost->host_lock);
3090 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3091 spin_unlock_irq(shost->host_lock);
6b5151fd
JS
3092 /*
3093 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS
3094 * RPI. Get a new RPI when the adapter port
3095 * comes back online.
6b5151fd 3096 */
be6bb941
JS
3097 if (phba->sli_rev == LPFC_SLI_REV4) {
3098 lpfc_printf_vlog(ndlp->vport,
3099 KERN_INFO, LOG_NODE,
3100 "0011 lpfc_offline: "
3101 "ndlp:x%p did %x "
3102 "usgmap:x%x rpi:%x\n",
3103 ndlp, ndlp->nlp_DID,
3104 ndlp->nlp_usg_map,
3105 ndlp->nlp_rpi);
3106
6b5151fd 3107 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3108 }
87af33fe
JS
3109 lpfc_unreg_rpi(vports[i], ndlp);
3110 }
3111 }
3112 }
09372820 3113 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3114
618a5230 3115 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
46fa311e
JS
3116}
3117
e59058c4 3118/**
3621a710 3119 * lpfc_offline - Bring a HBA offline
e59058c4
JS
3120 * @phba: pointer to lpfc hba data structure.
3121 *
3122 * This routine actually brings a HBA offline. It stops all the timers
3123 * associated with the HBA, brings down the SLI layer, and eventually
3124 * marks the HBA as in offline state for the upper layer protocol.
3125 **/
46fa311e 3126void
2e0fef85 3127lpfc_offline(struct lpfc_hba *phba)
46fa311e 3128{
549e55cd
JS
3129 struct Scsi_Host *shost;
3130 struct lpfc_vport **vports;
3131 int i;
46fa311e 3132
549e55cd 3133 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3134 return;
688a8863 3135
da0436e9
JS
3136 /* stop port and all timers associated with this hba */
3137 lpfc_stop_port(phba);
51ef4c26
JS
3138 vports = lpfc_create_vport_work_array(phba);
3139 if (vports != NULL)
da0436e9 3140 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3141 lpfc_stop_vport_timers(vports[i]);
09372820 3142 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3143 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3144 "0460 Bring Adapter offline\n");
dea3101e
JB
3145 /* Bring down the SLI Layer and cleanup. The HBA is offline
3146 now. */
3147 lpfc_sli_hba_down(phba);
92d7f7b0 3148 spin_lock_irq(&phba->hbalock);
7054a606 3149 phba->work_ha = 0;
92d7f7b0 3150 spin_unlock_irq(&phba->hbalock);
549e55cd
JS
3151 vports = lpfc_create_vport_work_array(phba);
3152 if (vports != NULL)
da0436e9 3153 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3154 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS
3155 spin_lock_irq(shost->host_lock);
3156 vports[i]->work_port_events = 0;
3157 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3158 spin_unlock_irq(shost->host_lock);
3159 }
09372820 3160 lpfc_destroy_vport_work_array(phba, vports);
dea3101e
JB
3161}
3162
e59058c4 3163/**
3621a710 3164 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS
3165 * @phba: pointer to lpfc hba data structure.
3166 *
3167 * This routine is to free all the SCSI buffers and IOCBs from the driver
3168 * list back to kernel. It is called from lpfc_pci_remove_one to free
3169 * the internal resources before the device is removed from the system.
e59058c4 3170 **/
8a9d2e80 3171static void
2e0fef85 3172lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e
JB
3173{
3174 struct lpfc_scsi_buf *sb, *sb_next;
dea3101e 3175
895427bd
JS
3176 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3177 return;
3178
2e0fef85 3179 spin_lock_irq(&phba->hbalock);
a40fc5f0 3180
dea3101e 3181 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS
3182
3183 spin_lock(&phba->scsi_buf_list_put_lock);
3184 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3185 list) {
dea3101e 3186 list_del(&sb->list);
895427bd 3187 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3188 sb->dma_handle);
dea3101e
JB
3189 kfree(sb);
3190 phba->total_scsi_bufs--;
3191 }
a40fc5f0
JS
3192 spin_unlock(&phba->scsi_buf_list_put_lock);
3193
3194 spin_lock(&phba->scsi_buf_list_get_lock);
3195 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3196 list) {
dea3101e 3197 list_del(&sb->list);
895427bd 3198 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3199 sb->dma_handle);
dea3101e
JB
3200 kfree(sb);
3201 phba->total_scsi_bufs--;
3202 }
a40fc5f0 3203 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3204 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3205}
895427bd
JS
3206/**
3207 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3208 * @phba: pointer to lpfc hba data structure.
3209 *
3210 * This routine is to free all the NVME buffers and IOCBs from the driver
3211 * list back to kernel. It is called from lpfc_pci_remove_one to free
3212 * the internal resources before the device is removed from the system.
3213 **/
3214static void
3215lpfc_nvme_free(struct lpfc_hba *phba)
3216{
3217 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
895427bd
JS
3218
3219 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3220 return;
3221
3222 spin_lock_irq(&phba->hbalock);
3223
3224 /* Release all the lpfc_nvme_bufs maintained by this host. */
3225 spin_lock(&phba->nvme_buf_list_put_lock);
3226 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3227 &phba->lpfc_nvme_buf_list_put, list) {
3228 list_del(&lpfc_ncmd->list);
3229 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3230 lpfc_ncmd->dma_handle);
3231 kfree(lpfc_ncmd);
3232 phba->total_nvme_bufs--;
3233 }
3234 spin_unlock(&phba->nvme_buf_list_put_lock);
3235
3236 spin_lock(&phba->nvme_buf_list_get_lock);
3237 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3238 &phba->lpfc_nvme_buf_list_get, list) {
3239 list_del(&lpfc_ncmd->list);
3240 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3241 lpfc_ncmd->dma_handle);
3242 kfree(lpfc_ncmd);
3243 phba->total_nvme_bufs--;
3244 }
3245 spin_unlock(&phba->nvme_buf_list_get_lock);
895427bd
JS
3246 spin_unlock_irq(&phba->hbalock);
3247}
8a9d2e80 3248/**
895427bd 3249 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS
3250 * @phba: pointer to lpfc hba data structure.
3251 *
3252 * This routine first calculates the sizes of the current els and allocated
3253 * scsi sgl lists, and then goes through all sgls to updates the physical
3254 * XRIs assigned due to port function reset. During port initialization, the
3255 * current els and allocated scsi sgl lists are 0s.
3256 *
3257 * Return codes
3258 * 0 - successful (for now, it always returns 0)
3259 **/
3260int
895427bd 3261lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS
3262{
3263 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3264 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3265 LIST_HEAD(els_sgl_list);
8a9d2e80
JS
3266 int rc;
3267
3268 /*
3269 * update on pci function's els xri-sgl list
3270 */
3271 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3272
8a9d2e80
JS
3273 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3274 /* els xri-sgl expanded */
3275 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3276 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3277 "3157 ELS xri-sgl count increased from "
3278 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3279 els_xri_cnt);
3280 /* allocate the additional els sgls */
3281 for (i = 0; i < xri_cnt; i++) {
3282 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3283 GFP_KERNEL);
3284 if (sglq_entry == NULL) {
3285 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3286 "2562 Failure to allocate an "
3287 "ELS sgl entry:%d\n", i);
3288 rc = -ENOMEM;
3289 goto out_free_mem;
3290 }
3291 sglq_entry->buff_type = GEN_BUFF_TYPE;
3292 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3293 &sglq_entry->phys);
3294 if (sglq_entry->virt == NULL) {
3295 kfree(sglq_entry);
3296 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3297 "2563 Failure to allocate an "
3298 "ELS mbuf:%d\n", i);
3299 rc = -ENOMEM;
3300 goto out_free_mem;
3301 }
3302 sglq_entry->sgl = sglq_entry->virt;
3303 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3304 sglq_entry->state = SGL_FREED;
3305 list_add_tail(&sglq_entry->list, &els_sgl_list);
3306 }
38c20673 3307 spin_lock_irq(&phba->hbalock);
895427bd
JS
3308 spin_lock(&phba->sli4_hba.sgl_list_lock);
3309 list_splice_init(&els_sgl_list,
3310 &phba->sli4_hba.lpfc_els_sgl_list);
3311 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3312 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
3313 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3314 /* els xri-sgl shrinked */
3315 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3316 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3317 "3158 ELS xri-sgl count decreased from "
3318 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3319 els_xri_cnt);
3320 spin_lock_irq(&phba->hbalock);
895427bd
JS
3321 spin_lock(&phba->sli4_hba.sgl_list_lock);
3322 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3323 &els_sgl_list);
8a9d2e80
JS
3324 /* release extra els sgls from list */
3325 for (i = 0; i < xri_cnt; i++) {
3326 list_remove_head(&els_sgl_list,
3327 sglq_entry, struct lpfc_sglq, list);
3328 if (sglq_entry) {
895427bd
JS
3329 __lpfc_mbuf_free(phba, sglq_entry->virt,
3330 sglq_entry->phys);
8a9d2e80
JS
3331 kfree(sglq_entry);
3332 }
3333 }
895427bd
JS
3334 list_splice_init(&els_sgl_list,
3335 &phba->sli4_hba.lpfc_els_sgl_list);
3336 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS
3337 spin_unlock_irq(&phba->hbalock);
3338 } else
3339 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3340 "3163 ELS xri-sgl count unchanged: %d\n",
3341 els_xri_cnt);
3342 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3343
3344 /* update xris to els sgls on the list */
3345 sglq_entry = NULL;
3346 sglq_entry_next = NULL;
3347 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3348 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS
3349 lxri = lpfc_sli4_next_xritag(phba);
3350 if (lxri == NO_XRI) {
3351 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3352 "2400 Failed to allocate xri for "
3353 "ELS sgl\n");
3354 rc = -ENOMEM;
3355 goto out_free_mem;
3356 }
3357 sglq_entry->sli4_lxritag = lxri;
3358 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3359 }
895427bd
JS
3360 return 0;
3361
3362out_free_mem:
3363 lpfc_free_els_sgl_list(phba);
3364 return rc;
3365}
3366
f358dd0c
JS
3367/**
3368 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3369 * @phba: pointer to lpfc hba data structure.
3370 *
3371 * This routine first calculates the sizes of the current els and allocated
3372 * scsi sgl lists, and then goes through all sgls to updates the physical
3373 * XRIs assigned due to port function reset. During port initialization, the
3374 * current els and allocated scsi sgl lists are 0s.
3375 *
3376 * Return codes
3377 * 0 - successful (for now, it always returns 0)
3378 **/
3379int
3380lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3381{
3382 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3383 uint16_t i, lxri, xri_cnt, els_xri_cnt;
6c621a22 3384 uint16_t nvmet_xri_cnt;
f358dd0c
JS
3385 LIST_HEAD(nvmet_sgl_list);
3386 int rc;
3387
3388 /*
3389 * update on pci function's nvmet xri-sgl list
3390 */
3391 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
61f3d4bf 3392
6c621a22
JS
3393 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
3394 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
f358dd0c
JS
3395
3396 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3397 /* els xri-sgl expanded */
3398 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3399 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3400 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3401 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3402 /* allocate the additional nvmet sgls */
3403 for (i = 0; i < xri_cnt; i++) {
3404 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3405 GFP_KERNEL);
3406 if (sglq_entry == NULL) {
3407 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3408 "6303 Failure to allocate an "
3409 "NVMET sgl entry:%d\n", i);
3410 rc = -ENOMEM;
3411 goto out_free_mem;
3412 }
3413 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3414 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3415 &sglq_entry->phys);
3416 if (sglq_entry->virt == NULL) {
3417 kfree(sglq_entry);
3418 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3419 "6304 Failure to allocate an "
3420 "NVMET buf:%d\n", i);
3421 rc = -ENOMEM;
3422 goto out_free_mem;
3423 }
3424 sglq_entry->sgl = sglq_entry->virt;
3425 memset(sglq_entry->sgl, 0,
3426 phba->cfg_sg_dma_buf_size);
3427 sglq_entry->state = SGL_FREED;
3428 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3429 }
3430 spin_lock_irq(&phba->hbalock);
3431 spin_lock(&phba->sli4_hba.sgl_list_lock);
3432 list_splice_init(&nvmet_sgl_list,
3433 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3434 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3435 spin_unlock_irq(&phba->hbalock);
3436 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3437 /* nvmet xri-sgl shrunk */
3438 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3439 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3440 "6305 NVMET xri-sgl count decreased from "
3441 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3442 nvmet_xri_cnt);
3443 spin_lock_irq(&phba->hbalock);
3444 spin_lock(&phba->sli4_hba.sgl_list_lock);
3445 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3446 &nvmet_sgl_list);
3447 /* release extra nvmet sgls from list */
3448 for (i = 0; i < xri_cnt; i++) {
3449 list_remove_head(&nvmet_sgl_list,
3450 sglq_entry, struct lpfc_sglq, list);
3451 if (sglq_entry) {
3452 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3453 sglq_entry->phys);
3454 kfree(sglq_entry);
3455 }
3456 }
3457 list_splice_init(&nvmet_sgl_list,
3458 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3459 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3460 spin_unlock_irq(&phba->hbalock);
3461 } else
3462 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3463 "6306 NVMET xri-sgl count unchanged: %d\n",
3464 nvmet_xri_cnt);
3465 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3466
3467 /* update xris to nvmet sgls on the list */
3468 sglq_entry = NULL;
3469 sglq_entry_next = NULL;
3470 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3471 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3472 lxri = lpfc_sli4_next_xritag(phba);
3473 if (lxri == NO_XRI) {
3474 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3475 "6307 Failed to allocate xri for "
3476 "NVMET sgl\n");
3477 rc = -ENOMEM;
3478 goto out_free_mem;
3479 }
3480 sglq_entry->sli4_lxritag = lxri;
3481 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3482 }
3483 return 0;
3484
3485out_free_mem:
3486 lpfc_free_nvmet_sgl_list(phba);
3487 return rc;
3488}
3489
895427bd
JS
3490/**
3491 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3492 * @phba: pointer to lpfc hba data structure.
3493 *
3494 * This routine first calculates the sizes of the current els and allocated
3495 * scsi sgl lists, and then goes through all sgls to updates the physical
3496 * XRIs assigned due to port function reset. During port initialization, the
3497 * current els and allocated scsi sgl lists are 0s.
3498 *
3499 * Return codes
3500 * 0 - successful (for now, it always returns 0)
3501 **/
3502int
3503lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3504{
3505 struct lpfc_scsi_buf *psb, *psb_next;
3506 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3507 LIST_HEAD(scsi_sgl_list);
3508 int rc;
8a9d2e80
JS
3509
3510 /*
895427bd 3511 * update on pci function's els xri-sgl list
8a9d2e80 3512 */
895427bd 3513 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS
3514 phba->total_scsi_bufs = 0;
3515
895427bd
JS
3516 /*
3517 * update on pci function's allocated scsi xri-sgl list
3518 */
8a9d2e80
JS
3519 /* maximum number of xris available for scsi buffers */
3520 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3521 els_xri_cnt;
3522
895427bd
JS
3523 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3524 return 0;
3525
3526 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3527 phba->sli4_hba.scsi_xri_max = /* Split them up */
3528 (phba->sli4_hba.scsi_xri_max *
3529 phba->cfg_xri_split) / 100;
8a9d2e80 3530
a40fc5f0 3531 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3532 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3533 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3534 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3535 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3536 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3537
e8c0a779
JS
3538 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3539 "6060 Current allocated SCSI xri-sgl count:%d, "
3540 "maximum SCSI xri count:%d (split:%d)\n",
3541 phba->sli4_hba.scsi_xri_cnt,
3542 phba->sli4_hba.scsi_xri_max, phba->cfg_xri_split);
3543
8a9d2e80
JS
3544 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3545 /* max scsi xri shrinked below the allocated scsi buffers */
3546 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3547 phba->sli4_hba.scsi_xri_max;
3548 /* release the extra allocated scsi buffers */
3549 for (i = 0; i < scsi_xri_cnt; i++) {
3550 list_remove_head(&scsi_sgl_list, psb,
3551 struct lpfc_scsi_buf, list);
a2fc4aef 3552 if (psb) {
895427bd 3553 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS
3554 psb->data, psb->dma_handle);
3555 kfree(psb);
3556 }
8a9d2e80 3557 }
a40fc5f0 3558 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3559 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3560 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS
3561 }
3562
3563 /* update xris associated to remaining allocated scsi buffers */
3564 psb = NULL;
3565 psb_next = NULL;
3566 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3567 lxri = lpfc_sli4_next_xritag(phba);
3568 if (lxri == NO_XRI) {
3569 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3570 "2560 Failed to allocate xri for "
3571 "scsi buffer\n");
3572 rc = -ENOMEM;
3573 goto out_free_mem;
3574 }
3575 psb->cur_iocbq.sli4_lxritag = lxri;
3576 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3577 }
a40fc5f0 3578 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3579 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3580 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3581 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3582 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3583 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3584 return 0;
8a9d2e80
JS
3585
3586out_free_mem:
8a9d2e80
JS
3587 lpfc_scsi_free(phba);
3588 return rc;
dea3101e
JB
3589}
3590
96418b5e
JS
3591static uint64_t
3592lpfc_get_wwpn(struct lpfc_hba *phba)
3593{
3594 uint64_t wwn;
3595 int rc;
3596 LPFC_MBOXQ_t *mboxq;
3597 MAILBOX_t *mb;
3598
4492b739
JS
3599 if (phba->sli_rev < LPFC_SLI_REV4) {
3600 /* Reset the port first */
3601 lpfc_sli_brdrestart(phba);
3602 rc = lpfc_sli_chipset_init(phba);
3603 if (rc)
3604 return (uint64_t)-1;
3605 }
96418b5e
JS
3606
3607 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3608 GFP_KERNEL);
3609 if (!mboxq)
3610 return (uint64_t)-1;
3611
3612 /* First get WWN of HBA instance */
3613 lpfc_read_nv(phba, mboxq);
3614 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3615 if (rc != MBX_SUCCESS) {
3616 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3617 "6019 Mailbox failed , mbxCmd x%x "
3618 "READ_NV, mbxStatus x%x\n",
3619 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
3620 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
3621 mempool_free(mboxq, phba->mbox_mem_pool);
3622 return (uint64_t) -1;
3623 }
3624 mb = &mboxq->u.mb;
3625 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
3626 /* wwn is WWPN of HBA instance */
3627 mempool_free(mboxq, phba->mbox_mem_pool);
3628 if (phba->sli_rev == LPFC_SLI_REV4)
3629 return be64_to_cpu(wwn);
3630 else
3631 return (((wwn & 0xffffffff00000000) >> 32) |
3632 ((wwn & 0x00000000ffffffff) << 32));
3633
3634}
3635
895427bd
JS
3636/**
3637 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3638 * @phba: pointer to lpfc hba data structure.
3639 *
3640 * This routine first calculates the sizes of the current els and allocated
3641 * scsi sgl lists, and then goes through all sgls to updates the physical
3642 * XRIs assigned due to port function reset. During port initialization, the
3643 * current els and allocated scsi sgl lists are 0s.
3644 *
3645 * Return codes
3646 * 0 - successful (for now, it always returns 0)
3647 **/
3648int
3649lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3650{
3651 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3652 uint16_t i, lxri, els_xri_cnt;
3653 uint16_t nvme_xri_cnt, nvme_xri_max;
3654 LIST_HEAD(nvme_sgl_list);
3655 int rc;
3656
3657 phba->total_nvme_bufs = 0;
3658
3659 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3660 return 0;
3661 /*
3662 * update on pci function's allocated nvme xri-sgl list
3663 */
3664
3665 /* maximum number of xris available for nvme buffers */
3666 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3667 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3668 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3669 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3670
3671 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3672 "6074 Current allocated NVME xri-sgl count:%d, "
3673 "maximum NVME xri count:%d\n",
3674 phba->sli4_hba.nvme_xri_cnt,
3675 phba->sli4_hba.nvme_xri_max);
3676
3677 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3678 spin_lock(&phba->nvme_buf_list_put_lock);
3679 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3680 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
3681 spin_unlock(&phba->nvme_buf_list_put_lock);
3682 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3683
3684 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3685 /* max nvme xri shrunk below the allocated nvme buffers */
3686 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3687 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3688 phba->sli4_hba.nvme_xri_max;
3689 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3690 /* release the extra allocated nvme buffers */
3691 for (i = 0; i < nvme_xri_cnt; i++) {
3692 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3693 struct lpfc_nvme_buf, list);
3694 if (lpfc_ncmd) {
3695 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
3696 lpfc_ncmd->data,
3697 lpfc_ncmd->dma_handle);
3698 kfree(lpfc_ncmd);
3699 }
3700 }
3701 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3702 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3703 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3704 }
3705
3706 /* update xris associated to remaining allocated nvme buffers */
3707 lpfc_ncmd = NULL;
3708 lpfc_ncmd_next = NULL;
3709 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3710 &nvme_sgl_list, list) {
3711 lxri = lpfc_sli4_next_xritag(phba);
3712 if (lxri == NO_XRI) {
3713 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3714 "6075 Failed to allocate xri for "
3715 "nvme buffer\n");
3716 rc = -ENOMEM;
3717 goto out_free_mem;
3718 }
3719 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3720 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3721 }
3722 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3723 spin_lock(&phba->nvme_buf_list_put_lock);
3724 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
3725 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3726 spin_unlock(&phba->nvme_buf_list_put_lock);
3727 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3728 return 0;
3729
3730out_free_mem:
3731 lpfc_nvme_free(phba);
3732 return rc;
3733}
3734
e59058c4 3735/**
3621a710 3736 * lpfc_create_port - Create an FC port
e59058c4
JS
3737 * @phba: pointer to lpfc hba data structure.
3738 * @instance: a unique integer ID to this FC port.
3739 * @dev: pointer to the device data structure.
3740 *
3741 * This routine creates a FC port for the upper layer protocol. The FC port
3742 * can be created on top of either a physical port or a virtual port provided
3743 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3744 * and associates the FC port created before adding the shost into the SCSI
3745 * layer.
3746 *
3747 * Return codes
3748 * @vport - pointer to the virtual N_Port data structure.
3749 * NULL - port create failed.
3750 **/
2e0fef85 3751struct lpfc_vport *
3de2a653 3752lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3753{
2e0fef85 3754 struct lpfc_vport *vport;
895427bd 3755 struct Scsi_Host *shost = NULL;
2e0fef85 3756 int error = 0;
96418b5e
JS
3757 int i;
3758 uint64_t wwn;
3759 bool use_no_reset_hba = false;
3760
3761 wwn = lpfc_get_wwpn(phba);
3762
3763 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
3764 if (wwn == lpfc_no_hba_reset[i]) {
3765 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3766 "6020 Setting use_no_reset port=%llx\n",
3767 wwn);
3768 use_no_reset_hba = true;
3769 break;
3770 }
3771 }
47a8617c 3772
895427bd
JS
3773 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3774 if (dev != &phba->pcidev->dev) {
3775 shost = scsi_host_alloc(&lpfc_vport_template,
3776 sizeof(struct lpfc_vport));
3777 } else {
96418b5e 3778 if (!use_no_reset_hba)
895427bd
JS
3779 shost = scsi_host_alloc(&lpfc_template,
3780 sizeof(struct lpfc_vport));
3781 else
96418b5e 3782 shost = scsi_host_alloc(&lpfc_template_no_hr,
895427bd
JS
3783 sizeof(struct lpfc_vport));
3784 }
3785 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3786 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS
3787 sizeof(struct lpfc_vport));
3788 }
2e0fef85
JS
3789 if (!shost)
3790 goto out;
47a8617c 3791
2e0fef85
JS
3792 vport = (struct lpfc_vport *) shost->hostdata;
3793 vport->phba = phba;
2e0fef85 3794 vport->load_flag |= FC_LOADING;
92d7f7b0 3795 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3796 vport->fc_rscn_flush = 0;
3de2a653 3797 lpfc_get_vport_cfgparam(vport);
895427bd 3798
2e0fef85
JS
3799 shost->unique_id = instance;
3800 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3801 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS
3802 shost->this_id = -1;
3803 shost->max_cmd_len = 16;
8b0dff14 3804 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3805 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3806 shost->dma_boundary =
cb5172ea 3807 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS
3808 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3809 }
81301a9b 3810
47a8617c 3811 /*
2e0fef85
JS
3812 * Set initial can_queue value since 0 is no longer supported and
3813 * scsi_add_host will fail. This will be adjusted later based on the
3814 * max xri value determined in hba setup.
47a8617c 3815 */
2e0fef85 3816 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3817 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS
3818 shost->transportt = lpfc_vport_transport_template;
3819 vport->port_type = LPFC_NPIV_PORT;
3820 } else {
3821 shost->transportt = lpfc_transport_template;
3822 vport->port_type = LPFC_PHYSICAL_PORT;
3823 }
47a8617c 3824
2e0fef85
JS
3825 /* Initialize all internally managed lists. */
3826 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3827 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3828 spin_lock_init(&vport->work_port_lock);
47a8617c 3829
33cc559a
TJ
3830 setup_timer(&vport->fc_disctmo, lpfc_disc_timeout,
3831 (unsigned long)vport);
47a8617c 3832
33cc559a
TJ
3833 setup_timer(&vport->els_tmofunc, lpfc_els_timeout,
3834 (unsigned long)vport);
92494144 3835
33cc559a
TJ
3836 setup_timer(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo,
3837 (unsigned long)vport);
92494144 3838
d139b9bd 3839 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS
3840 if (error)
3841 goto out_put_shost;
47a8617c 3842
549e55cd 3843 spin_lock_irq(&phba->hbalock);
2e0fef85 3844 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3845 spin_unlock_irq(&phba->hbalock);
2e0fef85 3846 return vport;
47a8617c 3847
2e0fef85
JS
3848out_put_shost:
3849 scsi_host_put(shost);
3850out:
3851 return NULL;
47a8617c
JS
3852}
3853
e59058c4 3854/**
3621a710 3855 * destroy_port - destroy an FC port
e59058c4
JS
3856 * @vport: pointer to an lpfc virtual N_Port data structure.
3857 *
3858 * This routine destroys a FC port from the upper layer protocol. All the
3859 * resources associated with the port are released.
3860 **/
2e0fef85
JS
3861void
3862destroy_port(struct lpfc_vport *vport)
47a8617c 3863{
92d7f7b0
JS
3864 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3865 struct lpfc_hba *phba = vport->phba;
47a8617c 3866
858c9f6c 3867 lpfc_debugfs_terminate(vport);
92d7f7b0
JS
3868 fc_remove_host(shost);
3869 scsi_remove_host(shost);
47a8617c 3870
92d7f7b0
JS
3871 spin_lock_irq(&phba->hbalock);
3872 list_del_init(&vport->listentry);
3873 spin_unlock_irq(&phba->hbalock);
47a8617c 3874
92d7f7b0 3875 lpfc_cleanup(vport);
47a8617c 3876 return;
47a8617c
JS
3877}
3878
e59058c4 3879/**
3621a710 3880 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS
3881 *
3882 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
3883 * uses the kernel idr facility to perform the task.
3884 *
3885 * Return codes:
3886 * instance - a unique integer ID allocated as the new instance.
3887 * -1 - lpfc get instance failed.
3888 **/
92d7f7b0
JS
3889int
3890lpfc_get_instance(void)
3891{
ab516036
TH
3892 int ret;
3893
3894 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
3895 return ret < 0 ? -1 : ret;
47a8617c
JS
3896}
3897
e59058c4 3898/**
3621a710 3899 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS
3900 * @shost: pointer to SCSI host data structure.
3901 * @time: elapsed time of the scan in jiffies.
3902 *
3903 * This routine is called by the SCSI layer with a SCSI host to determine
3904 * whether the scan host is finished.
3905 *
3906 * Note: there is no scan_start function as adapter initialization will have
3907 * asynchronously kicked off the link initialization.
3908 *
3909 * Return codes
3910 * 0 - SCSI host scan is not over yet.
3911 * 1 - SCSI host scan is over.
3912 **/
47a8617c
JS
3913int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
3914{
2e0fef85
JS
3915 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3916 struct lpfc_hba *phba = vport->phba;
858c9f6c 3917 int stat = 0;
47a8617c 3918
858c9f6c
JS
3919 spin_lock_irq(shost->host_lock);
3920
51ef4c26 3921 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS
3922 stat = 1;
3923 goto finished;
3924 }
256ec0d0 3925 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 3926 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
3927 "0461 Scanning longer than 30 "
3928 "seconds. Continuing initialization\n");
858c9f6c 3929 stat = 1;
47a8617c 3930 goto finished;
2e0fef85 3931 }
256ec0d0
JS
3932 if (time >= msecs_to_jiffies(15 * 1000) &&
3933 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 3934 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
3935 "0465 Link down longer than 15 "
3936 "seconds. Continuing initialization\n");
858c9f6c 3937 stat = 1;
47a8617c 3938 goto finished;
2e0fef85 3939 }
47a8617c 3940
2e0fef85 3941 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 3942 goto finished;
2e0fef85 3943 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 3944 goto finished;
256ec0d0 3945 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 3946 goto finished;
2e0fef85 3947 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS
3948 goto finished;
3949
3950 stat = 1;
47a8617c
JS
3951
3952finished:
858c9f6c
JS
3953 spin_unlock_irq(shost->host_lock);
3954 return stat;
92d7f7b0 3955}
47a8617c 3956
e59058c4 3957/**
3621a710 3958 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS
3959 * @shost: pointer to SCSI host data structure.
3960 *
3961 * This routine initializes a given SCSI host attributes on a FC port. The
3962 * SCSI host can be either on top of a physical port or a virtual port.
3963 **/
92d7f7b0
JS
3964void lpfc_host_attrib_init(struct Scsi_Host *shost)
3965{
3966 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3967 struct lpfc_hba *phba = vport->phba;
47a8617c 3968 /*
2e0fef85 3969 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS
3970 */
3971
2e0fef85
JS
3972 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
3973 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS
3974 fc_host_supported_classes(shost) = FC_COS_CLASS3;
3975
3976 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 3977 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS
3978 fc_host_supported_fc4s(shost)[2] = 1;
3979 fc_host_supported_fc4s(shost)[7] = 1;
3980
92d7f7b0
JS
3981 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
3982 sizeof fc_host_symbolic_name(shost));
47a8617c
JS
3983
3984 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS
3985 if (phba->lmt & LMT_32Gb)
3986 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS
3987 if (phba->lmt & LMT_16Gb)
3988 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS
3989 if (phba->lmt & LMT_10Gb)
3990 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS
3991 if (phba->lmt & LMT_8Gb)
3992 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS
3993 if (phba->lmt & LMT_4Gb)
3994 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
3995 if (phba->lmt & LMT_2Gb)
3996 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
3997 if (phba->lmt & LMT_1Gb)
3998 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
3999
4000 fc_host_maxframe_size(shost) =
2e0fef85
JS
4001 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
4002 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 4003
0af5d708
MC
4004 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
4005
47a8617c
JS
4006 /* This value is also unchanging */
4007 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 4008 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS
4009 fc_host_active_fc4s(shost)[2] = 1;
4010 fc_host_active_fc4s(shost)[7] = 1;
4011
92d7f7b0 4012 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 4013 spin_lock_irq(shost->host_lock);
51ef4c26 4014 vport->load_flag &= ~FC_LOADING;
47a8617c 4015 spin_unlock_irq(shost->host_lock);
47a8617c 4016}
dea3101e 4017
e59058c4 4018/**
da0436e9 4019 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS
4020 * @phba: pointer to lpfc hba data structure.
4021 *
da0436e9
JS
4022 * This routine is invoked to stop an SLI3 device port, it stops the device
4023 * from generating interrupts and stops the device driver's timers for the
4024 * device.
e59058c4 4025 **/
da0436e9
JS
4026static void
4027lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 4028{
da0436e9
JS
4029 /* Clear all interrupt enable conditions */
4030 writel(0, phba->HCregaddr);
4031 readl(phba->HCregaddr); /* flush */
4032 /* Clear all pending interrupts */
4033 writel(0xffffffff, phba->HAregaddr);
4034 readl(phba->HAregaddr); /* flush */
db2378e0 4035
da0436e9
JS
4036 /* Reset some HBA SLI setup states */
4037 lpfc_stop_hba_timers(phba);
4038 phba->pport->work_port_events = 0;
4039}
db2378e0 4040
da0436e9
JS
4041/**
4042 * lpfc_stop_port_s4 - Stop SLI4 device port
4043 * @phba: pointer to lpfc hba data structure.
4044 *
4045 * This routine is invoked to stop an SLI4 device port, it stops the device
4046 * from generating interrupts and stops the device driver's timers for the
4047 * device.
4048 **/
4049static void
4050lpfc_stop_port_s4(struct lpfc_hba *phba)
4051{
4052 /* Reset some HBA SLI4 setup states */
4053 lpfc_stop_hba_timers(phba);
4054 phba->pport->work_port_events = 0;
4055 phba->sli4_hba.intr_enable = 0;
da0436e9 4056}
9399627f 4057
da0436e9
JS
4058/**
4059 * lpfc_stop_port - Wrapper function for stopping hba port
4060 * @phba: Pointer to HBA context object.
4061 *
4062 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4063 * the API jump table function pointer from the lpfc_hba struct.
4064 **/
4065void
4066lpfc_stop_port(struct lpfc_hba *phba)
4067{
4068 phba->lpfc_stop_port(phba);
4069}
db2378e0 4070
ecfd03c6
JS
4071/**
4072 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4073 * @phba: Pointer to hba for which this call is being executed.
4074 *
4075 * This routine starts the timer waiting for the FCF rediscovery to complete.
4076 **/
4077void
4078lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4079{
4080 unsigned long fcf_redisc_wait_tmo =
4081 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4082 /* Start fcf rediscovery wait period timer */
4083 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4084 spin_lock_irq(&phba->hbalock);
4085 /* Allow action to new fcf asynchronous event */
4086 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4087 /* Mark the FCF rediscovery pending state */
4088 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4089 spin_unlock_irq(&phba->hbalock);
4090}
4091
4092/**
4093 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4094 * @ptr: Map to lpfc_hba data structure pointer.
4095 *
4096 * This routine is invoked when waiting for FCF table rediscover has been
4097 * timed out. If new FCF record(s) has (have) been discovered during the
4098 * wait period, a new FCF event shall be added to the FCOE async event
4099 * list, and then worker thread shall be waked up for processing from the
4100 * worker thread context.
4101 **/
e399b228 4102static void
ecfd03c6
JS
4103lpfc_sli4_fcf_redisc_wait_tmo(unsigned long ptr)
4104{
4105 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
4106
4107 /* Don't send FCF rediscovery event if timer cancelled */
4108 spin_lock_irq(&phba->hbalock);
4109 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4110 spin_unlock_irq(&phba->hbalock);
4111 return;
4112 }
4113 /* Clear FCF rediscovery timer pending flag */
4114 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4115 /* FCF rediscovery event to worker thread */
4116 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4117 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4118 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4119 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS
4120 /* wake up worker thread */
4121 lpfc_worker_wake_up(phba);
4122}
4123
e59058c4 4124/**
da0436e9 4125 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4126 * @phba: pointer to lpfc hba data structure.
da0436e9 4127 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4128 *
da0436e9
JS
4129 * This routine is to parse the SLI4 link-attention link fault code and
4130 * translate it into the base driver's read link attention mailbox command
4131 * status.
4132 *
4133 * Return: Link-attention status in terms of base driver's coding.
e59058c4 4134 **/
da0436e9
JS
4135static uint16_t
4136lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4137 struct lpfc_acqe_link *acqe_link)
db2378e0 4138{
da0436e9 4139 uint16_t latt_fault;
9399627f 4140
da0436e9
JS
4141 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4142 case LPFC_ASYNC_LINK_FAULT_NONE:
4143 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4144 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4145 latt_fault = 0;
4146 break;
4147 default:
4148 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4149 "0398 Invalid link fault code: x%x\n",
4150 bf_get(lpfc_acqe_link_fault, acqe_link));
4151 latt_fault = MBXERR_ERROR;
4152 break;
4153 }
4154 return latt_fault;
db2378e0
JS
4155}
4156
5b75da2f 4157/**
da0436e9 4158 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4159 * @phba: pointer to lpfc hba data structure.
da0436e9 4160 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4161 *
da0436e9
JS
4162 * This routine is to parse the SLI4 link attention type and translate it
4163 * into the base driver's link attention type coding.
5b75da2f 4164 *
da0436e9
JS
4165 * Return: Link attention type in terms of base driver's coding.
4166 **/
4167static uint8_t
4168lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4169 struct lpfc_acqe_link *acqe_link)
5b75da2f 4170{
da0436e9 4171 uint8_t att_type;
5b75da2f 4172
da0436e9
JS
4173 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4174 case LPFC_ASYNC_LINK_STATUS_DOWN:
4175 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4176 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS
4177 break;
4178 case LPFC_ASYNC_LINK_STATUS_UP:
4179 /* Ignore physical link up events - wait for logical link up */
76a95d75 4180 att_type = LPFC_ATT_RESERVED;
da0436e9
JS
4181 break;
4182 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4183 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS
4184 break;
4185 default:
4186 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4187 "0399 Invalid link attention type: x%x\n",
4188 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4189 att_type = LPFC_ATT_RESERVED;
da0436e9 4190 break;
5b75da2f 4191 }
da0436e9 4192 return att_type;
5b75da2f
JS
4193}
4194
8b68cd52
JS
4195/**
4196 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4197 * @phba: pointer to lpfc hba data structure.
4198 *
4199 * This routine is to get an SLI3 FC port's link speed in Mbps.
4200 *
4201 * Return: link speed in terms of Mbps.
4202 **/
4203uint32_t
4204lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4205{
4206 uint32_t link_speed;
4207
4208 if (!lpfc_is_link_up(phba))
4209 return 0;
4210
a085e87c
JS
4211 if (phba->sli_rev <= LPFC_SLI_REV3) {
4212 switch (phba->fc_linkspeed) {
4213 case LPFC_LINK_SPEED_1GHZ:
4214 link_speed = 1000;
4215 break;
4216 case LPFC_LINK_SPEED_2GHZ:
4217 link_speed = 2000;
4218 break;
4219 case LPFC_LINK_SPEED_4GHZ:
4220 link_speed = 4000;
4221 break;
4222 case LPFC_LINK_SPEED_8GHZ:
4223 link_speed = 8000;
4224 break;
4225 case LPFC_LINK_SPEED_10GHZ:
4226 link_speed = 10000;
4227 break;
4228 case LPFC_LINK_SPEED_16GHZ:
4229 link_speed = 16000;
4230 break;
4231 default:
4232 link_speed = 0;
4233 }
4234 } else {
4235 if (phba->sli4_hba.link_state.logical_speed)
4236 link_speed =
4237 phba->sli4_hba.link_state.logical_speed;
4238 else
4239 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS
4240 }
4241 return link_speed;
4242}
4243
4244/**
4245 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4246 * @phba: pointer to lpfc hba data structure.
4247 * @evt_code: asynchronous event code.
4248 * @speed_code: asynchronous event link speed code.
4249 *
4250 * This routine is to parse the giving SLI4 async event link speed code into
4251 * value of Mbps for the link speed.
4252 *
4253 * Return: link speed in terms of Mbps.
4254 **/
4255static uint32_t
4256lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4257 uint8_t speed_code)
4258{
4259 uint32_t port_speed;
4260
4261 switch (evt_code) {
4262 case LPFC_TRAILER_CODE_LINK:
4263 switch (speed_code) {
26d830ec 4264 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS
4265 port_speed = 0;
4266 break;
26d830ec 4267 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS
4268 port_speed = 10;
4269 break;
26d830ec 4270 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS
4271 port_speed = 100;
4272 break;
26d830ec 4273 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS
4274 port_speed = 1000;
4275 break;
26d830ec 4276 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS
4277 port_speed = 10000;
4278 break;
26d830ec
JS
4279 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4280 port_speed = 20000;
4281 break;
4282 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4283 port_speed = 25000;
4284 break;
4285 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4286 port_speed = 40000;
4287 break;
8b68cd52
JS
4288 default:
4289 port_speed = 0;
4290 }
4291 break;
4292 case LPFC_TRAILER_CODE_FC:
4293 switch (speed_code) {
26d830ec 4294 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS
4295 port_speed = 0;
4296 break;
26d830ec 4297 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS
4298 port_speed = 1000;
4299 break;
26d830ec 4300 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS
4301 port_speed = 2000;
4302 break;
26d830ec 4303 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS
4304 port_speed = 4000;
4305 break;
26d830ec 4306 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS
4307 port_speed = 8000;
4308 break;
26d830ec 4309 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS
4310 port_speed = 10000;
4311 break;
26d830ec 4312 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS
4313 port_speed = 16000;
4314 break;
d38dd52c
JS
4315 case LPFC_FC_LA_SPEED_32G:
4316 port_speed = 32000;
4317 break;
8b68cd52
JS
4318 default:
4319 port_speed = 0;
4320 }
4321 break;
4322 default:
4323 port_speed = 0;
4324 }
4325 return port_speed;
4326}
4327
da0436e9 4328/**
70f3c073 4329 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS
4330 * @phba: pointer to lpfc hba data structure.
4331 * @acqe_link: pointer to the async link completion queue entry.
4332 *
70f3c073 4333 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS
4334 **/
4335static void
4336lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4337 struct lpfc_acqe_link *acqe_link)
4338{
4339 struct lpfc_dmabuf *mp;
4340 LPFC_MBOXQ_t *pmb;
4341 MAILBOX_t *mb;
76a95d75 4342 struct lpfc_mbx_read_top *la;
da0436e9 4343 uint8_t att_type;
76a95d75 4344 int rc;
da0436e9
JS
4345
4346 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4347 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4348 return;
32b9793f 4349 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS
4350 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4351 if (!pmb) {
4352 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4353 "0395 The mboxq allocation failed\n");
4354 return;
4355 }
4356 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4357 if (!mp) {
4358 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4359 "0396 The lpfc_dmabuf allocation failed\n");
4360 goto out_free_pmb;
4361 }
4362 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4363 if (!mp->virt) {
4364 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4365 "0397 The mbuf allocation failed\n");
4366 goto out_free_dmabuf;
4367 }
4368
4369 /* Cleanup any outstanding ELS commands */
4370 lpfc_els_flush_all_cmd(phba);
4371
4372 /* Block ELS IOCBs until we have done process link event */
895427bd 4373 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS
4374
4375 /* Update link event statistics */
4376 phba->sli.slistat.link_event++;
4377
76a95d75
JS
4378 /* Create lpfc_handle_latt mailbox command from link ACQE */
4379 lpfc_read_topology(phba, pmb, mp);
4380 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS
4381 pmb->vport = phba->pport;
4382
da0436e9
JS
4383 /* Keep the link status for extra SLI4 state machine reference */
4384 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4385 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4386 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS
4387 phba->sli4_hba.link_state.duplex =
4388 bf_get(lpfc_acqe_link_duplex, acqe_link);
4389 phba->sli4_hba.link_state.status =
4390 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS
4391 phba->sli4_hba.link_state.type =
4392 bf_get(lpfc_acqe_link_type, acqe_link);
4393 phba->sli4_hba.link_state.number =
4394 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS
4395 phba->sli4_hba.link_state.fault =
4396 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4397 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS
4398 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4399
70f3c073 4400 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS
4401 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4402 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4403 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS
4404 phba->sli4_hba.link_state.speed,
4405 phba->sli4_hba.link_state.topology,
4406 phba->sli4_hba.link_state.status,
4407 phba->sli4_hba.link_state.type,
4408 phba->sli4_hba.link_state.number,
8b68cd52 4409 phba->sli4_hba.link_state.logical_speed,
70f3c073 4410 phba->sli4_hba.link_state.fault);
76a95d75
JS
4411 /*
4412 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4413 * topology info. Note: Optional for non FC-AL ports.
4414 */
4415 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4416 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4417 if (rc == MBX_NOT_FINISHED)
4418 goto out_free_dmabuf;
4419 return;
4420 }
4421 /*
4422 * For FCoE Mode: fill in all the topology information we need and call
4423 * the READ_TOPOLOGY completion routine to continue without actually
4424 * sending the READ_TOPOLOGY mailbox command to the port.
4425 */
4426 /* Parse and translate status field */
4427 mb = &pmb->u.mb;
4428 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4429
4430 /* Parse and translate link attention fields */
4431 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4432 la->eventTag = acqe_link->event_tag;
4433 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4434 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4435 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS
4436
4437 /* Fake the the following irrelvant fields */
4438 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4439 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4440 bf_set(lpfc_mbx_read_top_il, la, 0);
4441 bf_set(lpfc_mbx_read_top_pb, la, 0);
4442 bf_set(lpfc_mbx_read_top_fa, la, 0);
4443 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS
4444
4445 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4446 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4447
5b75da2f 4448 return;
da0436e9
JS
4449
4450out_free_dmabuf:
4451 kfree(mp);
4452out_free_pmb:
4453 mempool_free(pmb, phba->mbox_mem_pool);
4454}
4455
70f3c073
JS
4456/**
4457 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4458 * @phba: pointer to lpfc hba data structure.
4459 * @acqe_fc: pointer to the async fc completion queue entry.
4460 *
4461 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4462 * that the event was received and then issue a read_topology mailbox command so
4463 * that the rest of the driver will treat it the same as SLI3.
4464 **/
4465static void
4466lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4467{
4468 struct lpfc_dmabuf *mp;
4469 LPFC_MBOXQ_t *pmb;
7bdedb34
JS
4470 MAILBOX_t *mb;
4471 struct lpfc_mbx_read_top *la;
70f3c073
JS
4472 int rc;
4473
4474 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4475 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4476 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4477 "2895 Non FC link Event detected.(%d)\n",
4478 bf_get(lpfc_trailer_type, acqe_fc));
4479 return;
4480 }
4481 /* Keep the link status for extra SLI4 state machine reference */
4482 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4483 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4484 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS
4485 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4486 phba->sli4_hba.link_state.topology =
4487 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4488 phba->sli4_hba.link_state.status =
4489 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4490 phba->sli4_hba.link_state.type =
4491 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4492 phba->sli4_hba.link_state.number =
4493 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4494 phba->sli4_hba.link_state.fault =
4495 bf_get(lpfc_acqe_link_fault, acqe_fc);
4496 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4497 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS
4498 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4499 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4500 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4501 "%dMbps Fault:%d\n",
4502 phba->sli4_hba.link_state.speed,
4503 phba->sli4_hba.link_state.topology,
4504 phba->sli4_hba.link_state.status,
4505 phba->sli4_hba.link_state.type,
4506 phba->sli4_hba.link_state.number,
8b68cd52 4507 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS
4508 phba->sli4_hba.link_state.fault);
4509 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4510 if (!pmb) {
4511 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4512 "2897 The mboxq allocation failed\n");
4513 return;
4514 }
4515 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4516 if (!mp) {
4517 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4518 "2898 The lpfc_dmabuf allocation failed\n");
4519 goto out_free_pmb;
4520 }
4521 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4522 if (!mp->virt) {
4523 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4524 "2899 The mbuf allocation failed\n");
4525 goto out_free_dmabuf;
4526 }
4527
4528 /* Cleanup any outstanding ELS commands */
4529 lpfc_els_flush_all_cmd(phba);
4530
4531 /* Block ELS IOCBs until we have done process link event */
895427bd 4532 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS
4533
4534 /* Update link event statistics */
4535 phba->sli.slistat.link_event++;
4536
4537 /* Create lpfc_handle_latt mailbox command from link ACQE */
4538 lpfc_read_topology(phba, pmb, mp);
4539 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4540 pmb->vport = phba->pport;
4541
7bdedb34
JS
4542 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
4543 /* Parse and translate status field */
4544 mb = &pmb->u.mb;
4545 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4546 (void *)acqe_fc);
4547
4548 /* Parse and translate link attention fields */
4549 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4550 la->eventTag = acqe_fc->event_tag;
7bdedb34 4551
aeb3c817
JS
4552 if (phba->sli4_hba.link_state.status ==
4553 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
4554 bf_set(lpfc_mbx_read_top_att_type, la,
4555 LPFC_FC_LA_TYPE_UNEXP_WWPN);
4556 } else {
4557 bf_set(lpfc_mbx_read_top_att_type, la,
4558 LPFC_FC_LA_TYPE_LINK_DOWN);
4559 }
7bdedb34
JS
4560 /* Invoke the mailbox command callback function */
4561 lpfc_mbx_cmpl_read_topology(phba, pmb);
4562
4563 return;
4564 }
4565
70f3c073
JS
4566 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4567 if (rc == MBX_NOT_FINISHED)
4568 goto out_free_dmabuf;
4569 return;
4570
4571out_free_dmabuf:
4572 kfree(mp);
4573out_free_pmb:
4574 mempool_free(pmb, phba->mbox_mem_pool);
4575}
4576
4577/**
4578 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4579 * @phba: pointer to lpfc hba data structure.
4580 * @acqe_fc: pointer to the async SLI completion queue entry.
4581 *
4582 * This routine is to handle the SLI4 asynchronous SLI events.
4583 **/
4584static void
4585lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4586{
4b8bae08 4587 char port_name;
8c1312e1 4588 char message[128];
4b8bae08 4589 uint8_t status;
946727dc 4590 uint8_t evt_type;
448193b5 4591 uint8_t operational = 0;
946727dc 4592 struct temp_event temp_event_data;
4b8bae08 4593 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS
4594 struct Scsi_Host *shost;
4595
4596 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4597
448193b5
JS
4598 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4599 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4600 "x%08x SLI Event Type:%d\n",
4601 acqe_sli->event_data1, acqe_sli->event_data2,
4602 evt_type);
4b8bae08
JS
4603
4604 port_name = phba->Port[0];
4605 if (port_name == 0x00)
4606 port_name = '?'; /* get port name is empty */
4607
946727dc
JS
4608 switch (evt_type) {
4609 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4610 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4611 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4612 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4613
4614 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4615 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4616 acqe_sli->event_data1, port_name);
4617
310429ef 4618 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
4619 shost = lpfc_shost_from_vport(phba->pport);
4620 fc_host_post_vendor_event(shost, fc_get_event_number(),
4621 sizeof(temp_event_data),
4622 (char *)&temp_event_data,
4623 SCSI_NL_VID_TYPE_PCI
4624 | PCI_VENDOR_ID_EMULEX);
4625 break;
4626 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4627 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4628 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4629 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4630
4631 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4632 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4633 acqe_sli->event_data1, port_name);
4634
4635 shost = lpfc_shost_from_vport(phba->pport);
4636 fc_host_post_vendor_event(shost, fc_get_event_number(),
4637 sizeof(temp_event_data),
4638 (char *)&temp_event_data,
4639 SCSI_NL_VID_TYPE_PCI
4640 | PCI_VENDOR_ID_EMULEX);
4641 break;
4642 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4643 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS
4644 &acqe_sli->event_data1;
4645
946727dc
JS
4646 /* fetch the status for this port */
4647 switch (phba->sli4_hba.lnk_info.lnk_no) {
4648 case LPFC_LINK_NUMBER_0:
448193b5
JS
4649 status = bf_get(lpfc_sli_misconfigured_port0_state,
4650 &misconfigured->theEvent);
4651 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4652 &misconfigured->theEvent);
946727dc
JS
4653 break;
4654 case LPFC_LINK_NUMBER_1:
448193b5
JS
4655 status = bf_get(lpfc_sli_misconfigured_port1_state,
4656 &misconfigured->theEvent);
4657 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4658 &misconfigured->theEvent);
946727dc
JS
4659 break;
4660 case LPFC_LINK_NUMBER_2:
448193b5
JS
4661 status = bf_get(lpfc_sli_misconfigured_port2_state,
4662 &misconfigured->theEvent);
4663 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4664 &misconfigured->theEvent);
946727dc
JS
4665 break;
4666 case LPFC_LINK_NUMBER_3:
448193b5
JS
4667 status = bf_get(lpfc_sli_misconfigured_port3_state,
4668 &misconfigured->theEvent);
4669 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4670 &misconfigured->theEvent);
946727dc
JS
4671 break;
4672 default:
448193b5
JS
4673 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4674 "3296 "
4675 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4676 "event: Invalid link %d",
4677 phba->sli4_hba.lnk_info.lnk_no);
4678 return;
946727dc 4679 }
4b8bae08 4680
448193b5
JS
4681 /* Skip if optic state unchanged */
4682 if (phba->sli4_hba.lnk_info.optic_state == status)
4683 return;
4684
946727dc
JS
4685 switch (status) {
4686 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS
4687 sprintf(message, "Physical Link is functional");
4688 break;
946727dc
JS
4689 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4690 sprintf(message, "Optics faulted/incorrectly "
4691 "installed/not installed - Reseat optics, "
4692 "if issue not resolved, replace.");
4693 break;
4694 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4695 sprintf(message,
4696 "Optics of two types installed - Remove one "
4697 "optic or install matching pair of optics.");
4698 break;
4699 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4700 sprintf(message, "Incompatible optics - Replace with "
292098be 4701 "compatible optics for card to function.");
946727dc 4702 break;
448193b5
JS
4703 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4704 sprintf(message, "Unqualified optics - Replace with "
4705 "Avago optics for Warranty and Technical "
4706 "Support - Link is%s operational",
2ea259ee 4707 (operational) ? " not" : "");
448193b5
JS
4708 break;
4709 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4710 sprintf(message, "Uncertified optics - Replace with "
4711 "Avago-certified optics to enable link "
4712 "operation - Link is%s operational",
2ea259ee 4713 (operational) ? " not" : "");
448193b5 4714 break;
946727dc
JS
4715 default:
4716 /* firmware is reporting a status we don't know about */
4717 sprintf(message, "Unknown event status x%02x", status);
4718 break;
4719 }
448193b5 4720 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4721 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4722 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS
4723 break;
4724 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4725 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4726 "3192 Remote DPort Test Initiated - "
4727 "Event Data1:x%08x Event Data2: x%08x\n",
4728 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS
4729 break;
4730 default:
946727dc
JS
4731 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4732 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4733 "x%08x SLI Event Type:%d\n",
4734 acqe_sli->event_data1, acqe_sli->event_data2,
4735 evt_type);
4b8bae08
JS
4736 break;
4737 }
70f3c073
JS
4738}
4739
fc2b989b
JS
4740/**
4741 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4742 * @vport: pointer to vport data structure.
4743 *
4744 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4745 * response to a CVL event.
4746 *
4747 * Return the pointer to the ndlp with the vport if successful, otherwise
4748 * return NULL.
4749 **/
4750static struct lpfc_nodelist *
4751lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4752{
4753 struct lpfc_nodelist *ndlp;
4754 struct Scsi_Host *shost;
4755 struct lpfc_hba *phba;
4756
4757 if (!vport)
4758 return NULL;
fc2b989b
JS
4759 phba = vport->phba;
4760 if (!phba)
4761 return NULL;
78730cfe
JS
4762 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4763 if (!ndlp) {
4764 /* Cannot find existing Fabric ndlp, so allocate a new one */
9d3d340d 4765 ndlp = lpfc_nlp_init(vport, Fabric_DID);
78730cfe
JS
4766 if (!ndlp)
4767 return 0;
78730cfe
JS
4768 /* Set the node type */
4769 ndlp->nlp_type |= NLP_FABRIC;
4770 /* Put ndlp onto node list */
4771 lpfc_enqueue_node(vport, ndlp);
4772 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4773 /* re-setup ndlp without removing from node list */
4774 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4775 if (!ndlp)
4776 return 0;
4777 }
63e801ce
JS
4778 if ((phba->pport->port_state < LPFC_FLOGI) &&
4779 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4780 return NULL;
4781 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS
4782 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4783 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4784 return NULL;
4785 shost = lpfc_shost_from_vport(vport);
4786 if (!shost)
4787 return NULL;
4788 lpfc_linkdown_port(vport);
4789 lpfc_cleanup_pending_mbox(vport);
4790 spin_lock_irq(shost->host_lock);
4791 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4792 spin_unlock_irq(shost->host_lock);
4793
4794 return ndlp;
4795}
4796
4797/**
4798 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4799 * @vport: pointer to lpfc hba data structure.
4800 *
4801 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4802 * response to a FCF dead event.
4803 **/
4804static void
4805lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4806{
4807 struct lpfc_vport **vports;
4808 int i;
4809
4810 vports = lpfc_create_vport_work_array(phba);
4811 if (vports)
4812 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4813 lpfc_sli4_perform_vport_cvl(vports[i]);
4814 lpfc_destroy_vport_work_array(phba, vports);
4815}
4816
da0436e9 4817/**
76a95d75 4818 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS
4819 * @phba: pointer to lpfc hba data structure.
4820 * @acqe_link: pointer to the async fcoe completion queue entry.
4821 *
4822 * This routine is to handle the SLI4 asynchronous fcoe event.
4823 **/
4824static void
76a95d75 4825lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4826 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4827{
70f3c073 4828 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4829 int rc;
6669f9bb
JS
4830 struct lpfc_vport *vport;
4831 struct lpfc_nodelist *ndlp;
4832 struct Scsi_Host *shost;
695a814e
JS
4833 int active_vlink_present;
4834 struct lpfc_vport **vports;
4835 int i;
da0436e9 4836
70f3c073
JS
4837 phba->fc_eventTag = acqe_fip->event_tag;
4838 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4839 switch (event_type) {
70f3c073
JS
4840 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4841 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4842 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS
4843 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4844 LOG_DISCOVERY,
a93ff37a
JS
4845 "2546 New FCF event, evt_tag:x%x, "
4846 "index:x%x\n",
70f3c073
JS
4847 acqe_fip->event_tag,
4848 acqe_fip->index);
999d813f
JS
4849 else
4850 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4851 LOG_DISCOVERY,
a93ff37a
JS
4852 "2788 FCF param modified event, "
4853 "evt_tag:x%x, index:x%x\n",
70f3c073
JS
4854 acqe_fip->event_tag,
4855 acqe_fip->index);
38b92ef8 4856 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS
4857 /*
4858 * During period of FCF discovery, read the FCF
4859 * table record indexed by the event to update
a93ff37a 4860 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS
4861 */
4862 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4863 LOG_DISCOVERY,
a93ff37a
JS
4864 "2779 Read FCF (x%x) for updating "
4865 "roundrobin FCF failover bmask\n",
70f3c073
JS
4866 acqe_fip->index);
4867 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 4868 }
38b92ef8
JS
4869
4870 /* If the FCF discovery is in progress, do nothing. */
3804dc84 4871 spin_lock_irq(&phba->hbalock);
a93ff37a 4872 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS
4873 spin_unlock_irq(&phba->hbalock);
4874 break;
4875 }
4876 /* If fast FCF failover rescan event is pending, do nothing */
4877 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
4878 spin_unlock_irq(&phba->hbalock);
4879 break;
4880 }
4881
c2b9712e
JS
4882 /* If the FCF has been in discovered state, do nothing. */
4883 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS
4884 spin_unlock_irq(&phba->hbalock);
4885 break;
4886 }
4887 spin_unlock_irq(&phba->hbalock);
38b92ef8 4888
0c9ab6f5
JS
4889 /* Otherwise, scan the entire FCF table and re-discover SAN */
4890 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS
4891 "2770 Start FCF table scan per async FCF "
4892 "event, evt_tag:x%x, index:x%x\n",
70f3c073 4893 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS
4894 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
4895 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 4896 if (rc)
0c9ab6f5
JS
4897 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
4898 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 4899 "command failed (x%x)\n", rc);
da0436e9
JS
4900 break;
4901
70f3c073 4902 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 4903 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 4904 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS
4905 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
4906 acqe_fip->event_tag);
da0436e9
JS
4907 break;
4908
70f3c073 4909 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 4910 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 4911 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 4912 "2549 FCF (x%x) disconnected from network, "
70f3c073 4913 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS
4914 /*
4915 * If we are in the middle of FCF failover process, clear
4916 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 4917 */
fc2b989b 4918 spin_lock_irq(&phba->hbalock);
a1cadfef
JS
4919 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
4920 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 4921 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4922 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 4923 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS
4924 break;
4925 }
38b92ef8
JS
4926 spin_unlock_irq(&phba->hbalock);
4927
4928 /* If the event is not for currently used fcf do nothing */
70f3c073 4929 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS
4930 break;
4931
4932 /*
4933 * Otherwise, request the port to rediscover the entire FCF
4934 * table for a fast recovery from case that the current FCF
4935 * is no longer valid as we are not in the middle of FCF
4936 * failover process already.
4937 */
c2b9712e
JS
4938 spin_lock_irq(&phba->hbalock);
4939 /* Mark the fast failover process in progress */
4940 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
4941 spin_unlock_irq(&phba->hbalock);
4942
4943 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
4944 "2771 Start FCF fast failover process due to "
4945 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
4946 "\n", acqe_fip->event_tag, acqe_fip->index);
4947 rc = lpfc_sli4_redisc_fcf_table(phba);
4948 if (rc) {
4949 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4950 LOG_DISCOVERY,
4951 "2772 Issue FCF rediscover mabilbox "
4952 "command failed, fail through to FCF "
4953 "dead event\n");
4954 spin_lock_irq(&phba->hbalock);
4955 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
4956 spin_unlock_irq(&phba->hbalock);
4957 /*
4958 * Last resort will fail over by treating this
4959 * as a link down to FCF registration.
4960 */
4961 lpfc_sli4_fcf_dead_failthrough(phba);
4962 } else {
4963 /* Reset FCF roundrobin bmask for new discovery */
4964 lpfc_sli4_clear_fcf_rr_bmask(phba);
4965 /*
4966 * Handling fast FCF failover to a DEAD FCF event is
4967 * considered equalivant to receiving CVL to all vports.
4968 */
4969 lpfc_sli4_perform_all_vport_cvl(phba);
4970 }
da0436e9 4971 break;
70f3c073 4972 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 4973 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 4974 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 4975 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 4976 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 4977
6669f9bb 4978 vport = lpfc_find_vport_by_vpid(phba,
5248a749 4979 acqe_fip->index);
fc2b989b 4980 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS
4981 if (!ndlp)
4982 break;
695a814e
JS
4983 active_vlink_present = 0;
4984
4985 vports = lpfc_create_vport_work_array(phba);
4986 if (vports) {
4987 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
4988 i++) {
4989 if ((!(vports[i]->fc_flag &
4990 FC_VPORT_CVL_RCVD)) &&
4991 (vports[i]->port_state > LPFC_FDISC)) {
4992 active_vlink_present = 1;
4993 break;
4994 }
4995 }
4996 lpfc_destroy_vport_work_array(phba, vports);
4997 }
4998
cc82355a
JS
4999 /*
5000 * Don't re-instantiate if vport is marked for deletion.
5001 * If we are here first then vport_delete is going to wait
5002 * for discovery to complete.
5003 */
5004 if (!(vport->load_flag & FC_UNLOADING) &&
5005 active_vlink_present) {
695a814e
JS
5006 /*
5007 * If there are other active VLinks present,
5008 * re-instantiate the Vlink using FDISC.
5009 */
256ec0d0
JS
5010 mod_timer(&ndlp->nlp_delayfunc,
5011 jiffies + msecs_to_jiffies(1000));
fc2b989b 5012 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS
5013 spin_lock_irq(shost->host_lock);
5014 ndlp->nlp_flag |= NLP_DELAY_TMO;
5015 spin_unlock_irq(shost->host_lock);
695a814e
JS
5016 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
5017 vport->port_state = LPFC_FDISC;
5018 } else {
ecfd03c6
JS
5019 /*
5020 * Otherwise, we request port to rediscover
5021 * the entire FCF table for a fast recovery
5022 * from possible case that the current FCF
0c9ab6f5
JS
5023 * is no longer valid if we are not already
5024 * in the FCF failover process.
ecfd03c6 5025 */
fc2b989b 5026 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5027 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS
5028 spin_unlock_irq(&phba->hbalock);
5029 break;
5030 }
5031 /* Mark the fast failover process in progress */
0c9ab6f5 5032 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 5033 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS
5034 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5035 LOG_DISCOVERY,
a93ff37a 5036 "2773 Start FCF failover per CVL, "
70f3c073 5037 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 5038 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 5039 if (rc) {
0c9ab6f5
JS
5040 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5041 LOG_DISCOVERY,
5042 "2774 Issue FCF rediscover "
5043 "mabilbox command failed, "
5044 "through to CVL event\n");
fc2b989b 5045 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5046 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 5047 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS
5048 /*
5049 * Last resort will be re-try on the
5050 * the current registered FCF entry.
5051 */
5052 lpfc_retry_pport_discovery(phba);
38b92ef8
JS
5053 } else
5054 /*
5055 * Reset FCF roundrobin bmask for new
5056 * discovery.
5057 */
7d791df7 5058 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS
5059 }
5060 break;
da0436e9
JS
5061 default:
5062 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5063 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 5064 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS
5065 break;
5066 }
5067}
5068
5069/**
5070 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5071 * @phba: pointer to lpfc hba data structure.
5072 * @acqe_link: pointer to the async dcbx completion queue entry.
5073 *
5074 * This routine is to handle the SLI4 asynchronous dcbx event.
5075 **/
5076static void
5077lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5078 struct lpfc_acqe_dcbx *acqe_dcbx)
5079{
4d9ab994 5080 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS
5081 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5082 "0290 The SLI4 DCBX asynchronous event is not "
5083 "handled yet\n");
5084}
5085
b19a061a
JS
5086/**
5087 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5088 * @phba: pointer to lpfc hba data structure.
5089 * @acqe_link: pointer to the async grp5 completion queue entry.
5090 *
5091 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5092 * is an asynchronous notified of a logical link speed change. The Port
5093 * reports the logical link speed in units of 10Mbps.
5094 **/
5095static void
5096lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5097 struct lpfc_acqe_grp5 *acqe_grp5)
5098{
5099 uint16_t prev_ll_spd;
5100
5101 phba->fc_eventTag = acqe_grp5->event_tag;
5102 phba->fcoe_eventtag = acqe_grp5->event_tag;
5103 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5104 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5105 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS
5106 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5107 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS
5108 "from %dMbps to %dMbps\n", prev_ll_spd,
5109 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS
5110}
5111
da0436e9
JS
5112/**
5113 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5114 * @phba: pointer to lpfc hba data structure.
5115 *
5116 * This routine is invoked by the worker thread to process all the pending
5117 * SLI4 asynchronous events.
5118 **/
5119void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5120{
5121 struct lpfc_cq_event *cq_event;
5122
5123 /* First, declare the async event has been handled */
5124 spin_lock_irq(&phba->hbalock);
5125 phba->hba_flag &= ~ASYNC_EVENT;
5126 spin_unlock_irq(&phba->hbalock);
5127 /* Now, handle all the async events */
5128 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5129 /* Get the first event from the head of the event queue */
5130 spin_lock_irq(&phba->hbalock);
5131 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5132 cq_event, struct lpfc_cq_event, list);
5133 spin_unlock_irq(&phba->hbalock);
5134 /* Process the asynchronous event */
5135 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5136 case LPFC_TRAILER_CODE_LINK:
5137 lpfc_sli4_async_link_evt(phba,
5138 &cq_event->cqe.acqe_link);
5139 break;
5140 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5141 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS
5142 break;
5143 case LPFC_TRAILER_CODE_DCBX:
5144 lpfc_sli4_async_dcbx_evt(phba,
5145 &cq_event->cqe.acqe_dcbx);
5146 break;
b19a061a
JS
5147 case LPFC_TRAILER_CODE_GRP5:
5148 lpfc_sli4_async_grp5_evt(phba,
5149 &cq_event->cqe.acqe_grp5);
5150 break;
70f3c073
JS
5151 case LPFC_TRAILER_CODE_FC:
5152 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5153 break;
5154 case LPFC_TRAILER_CODE_SLI:
5155 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5156 break;
da0436e9
JS
5157 default:
5158 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5159 "1804 Invalid asynchrous event code: "
5160 "x%x\n", bf_get(lpfc_trailer_code,
5161 &cq_event->cqe.mcqe_cmpl));
5162 break;
5163 }
5164 /* Free the completion event processed to the free pool */
5165 lpfc_sli4_cq_event_release(phba, cq_event);
5166 }
5167}
5168
ecfd03c6
JS
5169/**
5170 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5171 * @phba: pointer to lpfc hba data structure.
5172 *
5173 * This routine is invoked by the worker thread to process FCF table
5174 * rediscovery pending completion event.
5175 **/
5176void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5177{
5178 int rc;
5179
5180 spin_lock_irq(&phba->hbalock);
5181 /* Clear FCF rediscovery timeout event */
5182 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5183 /* Clear driver fast failover FCF record flag */
5184 phba->fcf.failover_rec.flag = 0;
5185 /* Set state for FCF fast failover */
5186 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5187 spin_unlock_irq(&phba->hbalock);
5188
5189 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5190 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5191 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5192 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5193 if (rc)
0c9ab6f5
JS
5194 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5195 "2747 Issue FCF scan read FCF mailbox "
5196 "command failed 0x%x\n", rc);
ecfd03c6
JS
5197}
5198
da0436e9
JS
5199/**
5200 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5201 * @phba: pointer to lpfc hba data structure.
5202 * @dev_grp: The HBA PCI-Device group number.
5203 *
5204 * This routine is invoked to set up the per HBA PCI-Device group function
5205 * API jump table entries.
5206 *
5207 * Return: 0 if success, otherwise -ENODEV
5208 **/
5209int
5210lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5211{
5212 int rc;
5213
5214 /* Set up lpfc PCI-device group */
5215 phba->pci_dev_grp = dev_grp;
5216
5217 /* The LPFC_PCI_DEV_OC uses SLI4 */
5218 if (dev_grp == LPFC_PCI_DEV_OC)
5219 phba->sli_rev = LPFC_SLI_REV4;
5220
5221 /* Set up device INIT API function jump table */
5222 rc = lpfc_init_api_table_setup(phba, dev_grp);
5223 if (rc)
5224 return -ENODEV;
5225 /* Set up SCSI API function jump table */
5226 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5227 if (rc)
5228 return -ENODEV;
5229 /* Set up SLI API function jump table */
5230 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5231 if (rc)
5232 return -ENODEV;
5233 /* Set up MBOX API function jump table */
5234 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5235 if (rc)
5236 return -ENODEV;
5237
5238 return 0;
5b75da2f
JS
5239}
5240
5241/**
3621a710 5242 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS
5243 * @phba: pointer to lpfc hba data structure.
5244 * @intr_mode: active interrupt mode adopted.
5245 *
5246 * This routine it invoked to log the currently used active interrupt mode
5247 * to the device.
3772a991
JS
5248 **/
5249static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS
5250{
5251 switch (intr_mode) {
5252 case 0:
5253 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5254 "0470 Enable INTx interrupt mode.\n");
5255 break;
5256 case 1:
5257 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5258 "0481 Enabled MSI interrupt mode.\n");
5259 break;
5260 case 2:
5261 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5262 "0480 Enabled MSI-X interrupt mode.\n");
5263 break;
5264 default:
5265 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5266 "0482 Illegal interrupt mode.\n");
5267 break;
5268 }
5269 return;
5270}
5271
5b75da2f 5272/**
3772a991 5273 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS
5274 * @phba: pointer to lpfc hba data structure.
5275 *
3772a991
JS
5276 * This routine is invoked to enable the PCI device that is common to all
5277 * PCI devices.
5b75da2f
JS
5278 *
5279 * Return codes
af901ca1 5280 * 0 - successful
3772a991 5281 * other values - error
5b75da2f 5282 **/
3772a991
JS
5283static int
5284lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5285{
3772a991 5286 struct pci_dev *pdev;
5b75da2f 5287
3772a991
JS
5288 /* Obtain PCI device reference */
5289 if (!phba->pcidev)
5290 goto out_error;
5291 else
5292 pdev = phba->pcidev;
3772a991
JS
5293 /* Enable PCI device */
5294 if (pci_enable_device_mem(pdev))
5295 goto out_error;
5296 /* Request PCI resource for the device */
e0c0483c 5297 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS
5298 goto out_disable_device;
5299 /* Set up device as PCI master and save state for EEH */
5300 pci_set_master(pdev);
5301 pci_try_set_mwi(pdev);
5302 pci_save_state(pdev);
5b75da2f 5303
0558056c 5304 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5305 if (pci_is_pcie(pdev))
0558056c
JS
5306 pdev->needs_freset = 1;
5307
3772a991 5308 return 0;
5b75da2f 5309
3772a991
JS
5310out_disable_device:
5311 pci_disable_device(pdev);
5312out_error:
079b5c91 5313 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5314 "1401 Failed to enable pci device\n");
3772a991 5315 return -ENODEV;
5b75da2f
JS
5316}
5317
5318/**
3772a991 5319 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS
5320 * @phba: pointer to lpfc hba data structure.
5321 *
3772a991
JS
5322 * This routine is invoked to disable the PCI device that is common to all
5323 * PCI devices.
5b75da2f
JS
5324 **/
5325static void
3772a991 5326lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5327{
3772a991 5328 struct pci_dev *pdev;
5b75da2f 5329
3772a991
JS
5330 /* Obtain PCI device reference */
5331 if (!phba->pcidev)
5332 return;
5333 else
5334 pdev = phba->pcidev;
3772a991 5335 /* Release PCI resource and disable PCI device */
e0c0483c 5336 pci_release_mem_regions(pdev);
3772a991 5337 pci_disable_device(pdev);
5b75da2f
JS
5338
5339 return;
5340}
5341
e59058c4 5342/**
3772a991
JS
5343 * lpfc_reset_hba - Reset a hba
5344 * @phba: pointer to lpfc hba data structure.
e59058c4 5345 *
3772a991
JS
5346 * This routine is invoked to reset a hba device. It brings the HBA
5347 * offline, performs a board restart, and then brings the board back
5348 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5349 * on outstanding mailbox commands.
e59058c4 5350 **/
3772a991
JS
5351void
5352lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5353{
3772a991
JS
5354 /* If resets are disabled then set error state and return. */
5355 if (!phba->cfg_enable_hba_reset) {
5356 phba->link_state = LPFC_HBA_ERROR;
5357 return;
5358 }
ee62021a
JS
5359 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5360 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5361 else
5362 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS
5363 lpfc_offline(phba);
5364 lpfc_sli_brdrestart(phba);
5365 lpfc_online(phba);
5366 lpfc_unblock_mgmt_io(phba);
5367}
dea3101e 5368
0a96e975
JS
5369/**
5370 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5371 * @phba: pointer to lpfc hba data structure.
5372 *
5373 * This function enables the PCI SR-IOV virtual functions to a physical
5374 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5375 * enable the number of virtual functions to the physical function. As
5376 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5377 * API call does not considered as an error condition for most of the device.
5378 **/
5379uint16_t
5380lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5381{
5382 struct pci_dev *pdev = phba->pcidev;
5383 uint16_t nr_virtfn;
5384 int pos;
5385
0a96e975
JS
5386 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5387 if (pos == 0)
5388 return 0;
5389
5390 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5391 return nr_virtfn;
5392}
5393
912e3acd
JS
5394/**
5395 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5396 * @phba: pointer to lpfc hba data structure.
5397 * @nr_vfn: number of virtual functions to be enabled.
5398 *
5399 * This function enables the PCI SR-IOV virtual functions to a physical
5400 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5401 * enable the number of virtual functions to the physical function. As
5402 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5403 * API call does not considered as an error condition for most of the device.
5404 **/
5405int
5406lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5407{
5408 struct pci_dev *pdev = phba->pcidev;
0a96e975 5409 uint16_t max_nr_vfn;
912e3acd
JS
5410 int rc;
5411
0a96e975
JS
5412 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5413 if (nr_vfn > max_nr_vfn) {
5414 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5415 "3057 Requested vfs (%d) greater than "
5416 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5417 return -EINVAL;
5418 }
5419
912e3acd
JS
5420 rc = pci_enable_sriov(pdev, nr_vfn);
5421 if (rc) {
5422 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5423 "2806 Failed to enable sriov on this device "
5424 "with vfn number nr_vf:%d, rc:%d\n",
5425 nr_vfn, rc);
5426 } else
5427 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5428 "2807 Successful enable sriov on this device "
5429 "with vfn number nr_vf:%d\n", nr_vfn);
5430 return rc;
5431}
5432
3772a991 5433/**
895427bd 5434 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS
5435 * @phba: pointer to lpfc hba data structure.
5436 *
895427bd
JS
5437 * This routine is invoked to set up the driver internal resources before the
5438 * device specific resource setup to support the HBA device it attached to.
3772a991
JS
5439 *
5440 * Return codes
895427bd
JS
5441 * 0 - successful
5442 * other values - error
3772a991
JS
5443 **/
5444static int
895427bd 5445lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5446{
895427bd 5447 struct lpfc_sli *psli = &phba->sli;
dea3101e 5448
2e0fef85 5449 /*
895427bd 5450 * Driver resources common to all SLI revisions
2e0fef85 5451 */
895427bd
JS
5452 atomic_set(&phba->fast_event_count, 0);
5453 spin_lock_init(&phba->hbalock);
dea3101e 5454
895427bd
JS
5455 /* Initialize ndlp management spinlock */
5456 spin_lock_init(&phba->ndlp_lock);
5457
5458 INIT_LIST_HEAD(&phba->port_list);
5459 INIT_LIST_HEAD(&phba->work_list);
5460 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5461
5462 /* Initialize the wait queue head for the kernel thread */
5463 init_waitqueue_head(&phba->work_waitq);
5464
5465 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 5466 "1403 Protocols supported %s %s %s\n",
895427bd
JS
5467 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5468 "SCSI" : " "),
5469 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS
5470 "NVME" : " "),
5471 (phba->nvmet_support ? "NVMET" : " "));
895427bd
JS
5472
5473 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5474 /* Initialize the scsi buffer list used by driver for scsi IO */
5475 spin_lock_init(&phba->scsi_buf_list_get_lock);
5476 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5477 spin_lock_init(&phba->scsi_buf_list_put_lock);
5478 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5479 }
5480
5481 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5482 (phba->nvmet_support == 0)) {
5483 /* Initialize the NVME buffer list used by driver for NVME IO */
5484 spin_lock_init(&phba->nvme_buf_list_get_lock);
5485 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
5486 spin_lock_init(&phba->nvme_buf_list_put_lock);
5487 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
5488 }
5489
5490 /* Initialize the fabric iocb list */
5491 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5492
5493 /* Initialize list to save ELS buffers */
5494 INIT_LIST_HEAD(&phba->elsbuf);
5495
5496 /* Initialize FCF connection rec list */
5497 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5498
5499 /* Initialize OAS configuration list */
5500 spin_lock_init(&phba->devicelock);
5501 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5502
3772a991 5503 /* MBOX heartbeat timer */
33cc559a 5504 setup_timer(&psli->mbox_tmo, lpfc_mbox_timeout, (unsigned long)phba);
3772a991 5505 /* Fabric block timer */
33cc559a
TJ
5506 setup_timer(&phba->fabric_block_timer, lpfc_fabric_block_timeout,
5507 (unsigned long)phba);
3772a991 5508 /* EA polling mode timer */
33cc559a
TJ
5509 setup_timer(&phba->eratt_poll, lpfc_poll_eratt,
5510 (unsigned long)phba);
895427bd 5511 /* Heartbeat timer */
33cc559a 5512 setup_timer(&phba->hb_tmofunc, lpfc_hb_timeout, (unsigned long)phba);
895427bd
JS
5513
5514 return 0;
5515}
5516
5517/**
5518 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5519 * @phba: pointer to lpfc hba data structure.
5520 *
5521 * This routine is invoked to set up the driver internal resources specific to
5522 * support the SLI-3 HBA device it attached to.
5523 *
5524 * Return codes
5525 * 0 - successful
5526 * other values - error
5527 **/
5528static int
5529lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5530{
5531 int rc;
5532
5533 /*
5534 * Initialize timers used by driver
5535 */
5536
5537 /* FCP polling mode timer */
33cc559a
TJ
5538 setup_timer(&phba->fcp_poll_timer, lpfc_poll_timeout,
5539 (unsigned long)phba);
dea3101e 5540
3772a991
JS
5541 /* Host attention work mask setup */
5542 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5543 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5544
3772a991
JS
5545 /* Get all the module params for configuring this host */
5546 lpfc_get_cfgparam(phba);
895427bd
JS
5547 /* Set up phase-1 common device driver resources */
5548
5549 rc = lpfc_setup_driver_resource_phase1(phba);
5550 if (rc)
5551 return -ENODEV;
5552
49198b37
JS
5553 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5554 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5555 /* check for menlo minimum sg count */
5556 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5557 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5558 }
5559
895427bd
JS
5560 if (!phba->sli.sli3_ring)
5561 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5562 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5563 if (!phba->sli.sli3_ring)
2a76a283
JS
5564 return -ENOMEM;
5565
dea3101e 5566 /*
96f7077f 5567 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5568 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5569 */
3772a991 5570
96f7077f
JS
5571 /* Initialize the host templates the configured values. */
5572 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e
JS
5573 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
5574 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5575
5576 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5577 if (phba->cfg_enable_bg) {
96f7077f
JS
5578 /*
5579 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5580 * the FCP rsp, and a BDE for each. Sice we have no control
5581 * over how many protection data segments the SCSI Layer
5582 * will hand us (ie: there could be one for every block
5583 * in the IO), we just allocate enough BDEs to accomidate
5584 * our max amount and we need to limit lpfc_sg_seg_cnt to
5585 * minimize the risk of running out.
5586 */
5587 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5588 sizeof(struct fcp_rsp) +
5589 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5590
5591 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5592 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5593
5594 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5595 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5596 } else {
5597 /*
5598 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5599 * the FCP rsp, a BDE for each, and a BDE for up to
5600 * cfg_sg_seg_cnt data segments.
5601 */
5602 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5603 sizeof(struct fcp_rsp) +
5604 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5605
5606 /* Total BDEs in BPL for scsi_sg_list */
5607 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5608 }
dea3101e 5609
96f7077f
JS
5610 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5611 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5612 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5613 phba->cfg_total_seg_cnt);
dea3101e 5614
3772a991
JS
5615 phba->max_vpi = LPFC_MAX_VPI;
5616 /* This will be set to correct value after config_port mbox */
5617 phba->max_vports = 0;
dea3101e 5618
3772a991
JS
5619 /*
5620 * Initialize the SLI Layer to run with lpfc HBAs.
5621 */
5622 lpfc_sli_setup(phba);
895427bd 5623 lpfc_sli_queue_init(phba);
ed957684 5624
3772a991
JS
5625 /* Allocate device driver memory */
5626 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5627 return -ENOMEM;
51ef4c26 5628
912e3acd
JS
5629 /*
5630 * Enable sr-iov virtual functions if supported and configured
5631 * through the module parameter.
5632 */
5633 if (phba->cfg_sriov_nr_virtfn > 0) {
5634 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5635 phba->cfg_sriov_nr_virtfn);
5636 if (rc) {
5637 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5638 "2808 Requested number of SR-IOV "
5639 "virtual functions (%d) is not "
5640 "supported\n",
5641 phba->cfg_sriov_nr_virtfn);
5642 phba->cfg_sriov_nr_virtfn = 0;
5643 }
5644 }
5645
3772a991
JS
5646 return 0;
5647}
ed957684 5648
3772a991
JS
5649/**
5650 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5651 * @phba: pointer to lpfc hba data structure.
5652 *
5653 * This routine is invoked to unset the driver internal resources set up
5654 * specific for supporting the SLI-3 HBA device it attached to.
5655 **/
5656static void
5657lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5658{
5659 /* Free device driver memory allocated */
5660 lpfc_mem_free_all(phba);
3163f725 5661
3772a991
JS
5662 return;
5663}
dea3101e 5664
3772a991 5665/**
da0436e9 5666 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS
5667 * @phba: pointer to lpfc hba data structure.
5668 *
da0436e9
JS
5669 * This routine is invoked to set up the driver internal resources specific to
5670 * support the SLI-4 HBA device it attached to.
3772a991
JS
5671 *
5672 * Return codes
af901ca1 5673 * 0 - successful
da0436e9 5674 * other values - error
3772a991
JS
5675 **/
5676static int
da0436e9 5677lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5678{
28baac74 5679 LPFC_MBOXQ_t *mboxq;
f358dd0c 5680 MAILBOX_t *mb;
895427bd 5681 int rc, i, max_buf_size;
28baac74
JS
5682 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5683 struct lpfc_mqe *mqe;
09294d46 5684 int longs;
1ba981fd 5685 int fof_vectors = 0;
f358dd0c 5686 uint64_t wwn;
da0436e9 5687
895427bd
JS
5688 phba->sli4_hba.num_online_cpu = num_online_cpus();
5689 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5690 phba->sli4_hba.curr_disp_cpu = 0;
5691
716d3bc5
JS
5692 /* Get all the module params for configuring this host */
5693 lpfc_get_cfgparam(phba);
5694
895427bd
JS
5695 /* Set up phase-1 common device driver resources */
5696 rc = lpfc_setup_driver_resource_phase1(phba);
5697 if (rc)
5698 return -ENODEV;
5699
da0436e9
JS
5700 /* Before proceed, wait for POST done and device ready */
5701 rc = lpfc_sli4_post_status_check(phba);
5702 if (rc)
5703 return -ENODEV;
5704
3772a991 5705 /*
da0436e9 5706 * Initialize timers used by driver
3772a991 5707 */
3772a991 5708
33cc559a 5709 setup_timer(&phba->rrq_tmr, lpfc_rrq_timeout, (unsigned long)phba);
3772a991 5710
ecfd03c6 5711 /* FCF rediscover timer */
33cc559a
TJ
5712 setup_timer(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo,
5713 (unsigned long)phba);
ecfd03c6 5714
7ad20aa9
JS
5715 /*
5716 * Control structure for handling external multi-buffer mailbox
5717 * command pass-through.
5718 */
5719 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5720 sizeof(struct lpfc_mbox_ext_buf_ctx));
5721 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5722
da0436e9 5723 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5724
da0436e9
JS
5725 /* This will be set to correct value after the read_config mbox */
5726 phba->max_vports = 0;
3772a991 5727
da0436e9
JS
5728 /* Program the default value of vlan_id and fc_map */
5729 phba->valid_vlan = 0;
5730 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5731 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5732 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5733
2a76a283
JS
5734 /*
5735 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS
5736 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5737 * The WQ create will allocate the ring.
2a76a283 5738 */
09294d46 5739
da0436e9 5740 /*
09294d46
JS
5741 * It doesn't matter what family our adapter is in, we are
5742 * limited to 2 Pages, 512 SGEs, for our SGL.
5743 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5744 */
5745 max_buf_size = (2 * SLI4_PAGE_SIZE);
5746 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - 2)
5747 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - 2;
09294d46 5748
da0436e9 5749 /*
895427bd
JS
5750 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5751 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5752 */
96f7077f
JS
5753 if (phba->cfg_enable_bg) {
5754 /*
895427bd
JS
5755 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5756 * the FCP rsp, and a SGE. Sice we have no control
5757 * over how many protection segments the SCSI Layer
96f7077f 5758 * will hand us (ie: there could be one for every block
895427bd
JS
5759 * in the IO), just allocate enough SGEs to accomidate
5760 * our max amount and we need to limit lpfc_sg_seg_cnt
5761 * to minimize the risk of running out.
96f7077f
JS
5762 */
5763 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5764 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS
5765
5766 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5767 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5768
5769 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS
5770 phba->cfg_sg_seg_cnt =
5771 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS
5772 } else {
5773 /*
895427bd 5774 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS
5775 * the FCP rsp, a SGE for each, and a SGE for up to
5776 * cfg_sg_seg_cnt data segments.
5777 */
5778 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd
JS
5779 sizeof(struct fcp_rsp) +
5780 ((phba->cfg_sg_seg_cnt + 2) *
5781 sizeof(struct sli4_sge));
96f7077f
JS
5782
5783 /* Total SGEs for scsi_sg_list */
5784 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
895427bd 5785
96f7077f 5786 /*
895427bd
JS
5787 * NOTE: if (phba->cfg_sg_seg_cnt + 2) <= 256 we only
5788 * need to post 1 page for the SGL.
96f7077f 5789 */
085c647c 5790 }
acd6859b 5791
96f7077f
JS
5792 /* Initialize the host templates with the updated values. */
5793 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5794 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e 5795 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5796
5797 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5798 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5799 else
5800 phba->cfg_sg_dma_buf_size =
5801 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5802
5803 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5804 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5805 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5806 phba->cfg_total_seg_cnt);
3772a991 5807
da0436e9 5808 /* Initialize buffer queue management fields */
895427bd 5809 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS
5810 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5811 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5812
da0436e9
JS
5813 /*
5814 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5815 */
895427bd
JS
5816 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5817 /* Initialize the Abort scsi buffer list used by driver */
5818 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5819 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5820 }
5821
5822 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5823 /* Initialize the Abort nvme buffer list used by driver */
5824 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5825 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379 5826 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
6c621a22 5827 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_ctx_list);
a8cf5dfe 5828 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
6c621a22 5829
318083ad
JS
5830 /* Fast-path XRI aborted CQ Event work queue list */
5831 INIT_LIST_HEAD(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue);
895427bd
JS
5832 }
5833
da0436e9 5834 /* This abort list used by worker thread */
895427bd 5835 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
f358dd0c 5836 spin_lock_init(&phba->sli4_hba.nvmet_io_lock);
a8cf5dfe 5837 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
3772a991 5838
da0436e9 5839 /*
6d368e53 5840 * Initialize driver internal slow-path work queues
da0436e9 5841 */
3772a991 5842
da0436e9
JS
5843 /* Driver internel slow-path CQ Event pool */
5844 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5845 /* Response IOCB work queue list */
45ed1190 5846 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS
5847 /* Asynchronous event CQ Event work queue list */
5848 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5849 /* Fast-path XRI aborted CQ Event work queue list */
5850 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5851 /* Slow-path XRI aborted CQ Event work queue list */
5852 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5853 /* Receive queue CQ Event work queue list */
5854 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5855
6d368e53
JS
5856 /* Initialize extent block lists. */
5857 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5858 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5859 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
5860 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
5861
d1f525aa
JS
5862 /* Initialize mboxq lists. If the early init routines fail
5863 * these lists need to be correctly initialized.
5864 */
5865 INIT_LIST_HEAD(&phba->sli.mboxq);
5866 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
5867
448193b5
JS
5868 /* initialize optic_state to 0xFF */
5869 phba->sli4_hba.lnk_info.optic_state = 0xff;
5870
da0436e9
JS
5871 /* Allocate device driver memory */
5872 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
5873 if (rc)
5874 return -ENOMEM;
5875
2fcee4bf
JS
5876 /* IF Type 2 ports get initialized now. */
5877 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5878 LPFC_SLI_INTF_IF_TYPE_2) {
5879 rc = lpfc_pci_function_reset(phba);
895427bd
JS
5880 if (unlikely(rc)) {
5881 rc = -ENODEV;
5882 goto out_free_mem;
5883 }
946727dc 5884 phba->temp_sensor_support = 1;
2fcee4bf
JS
5885 }
5886
da0436e9
JS
5887 /* Create the bootstrap mailbox command */
5888 rc = lpfc_create_bootstrap_mbox(phba);
5889 if (unlikely(rc))
5890 goto out_free_mem;
5891
5892 /* Set up the host's endian order with the device. */
5893 rc = lpfc_setup_endian_order(phba);
5894 if (unlikely(rc))
5895 goto out_free_bsmbx;
5896
5897 /* Set up the hba's configuration parameters. */
5898 rc = lpfc_sli4_read_config(phba);
cff261f6
JS
5899 if (unlikely(rc))
5900 goto out_free_bsmbx;
5901 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS
5902 if (unlikely(rc))
5903 goto out_free_bsmbx;
5904
2fcee4bf
JS
5905 /* IF Type 0 ports get initialized now. */
5906 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5907 LPFC_SLI_INTF_IF_TYPE_0) {
5908 rc = lpfc_pci_function_reset(phba);
5909 if (unlikely(rc))
5910 goto out_free_bsmbx;
5911 }
da0436e9 5912
cb5172ea
JS
5913 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
5914 GFP_KERNEL);
5915 if (!mboxq) {
5916 rc = -ENOMEM;
5917 goto out_free_bsmbx;
5918 }
5919
f358dd0c 5920 /* Check for NVMET being configured */
895427bd 5921 phba->nvmet_support = 0;
f358dd0c
JS
5922 if (lpfc_enable_nvmet_cnt) {
5923
5924 /* First get WWN of HBA instance */
5925 lpfc_read_nv(phba, mboxq);
5926 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5927 if (rc != MBX_SUCCESS) {
5928 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5929 "6016 Mailbox failed , mbxCmd x%x "
5930 "READ_NV, mbxStatus x%x\n",
5931 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5932 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
d1f525aa 5933 mempool_free(mboxq, phba->mbox_mem_pool);
f358dd0c
JS
5934 rc = -EIO;
5935 goto out_free_bsmbx;
5936 }
5937 mb = &mboxq->u.mb;
5938 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
5939 sizeof(uint64_t));
5940 wwn = cpu_to_be64(wwn);
5941 phba->sli4_hba.wwnn.u.name = wwn;
5942 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
5943 sizeof(uint64_t));
5944 /* wwn is WWPN of HBA instance */
5945 wwn = cpu_to_be64(wwn);
5946 phba->sli4_hba.wwpn.u.name = wwn;
5947
5948 /* Check to see if it matches any module parameter */
5949 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
5950 if (wwn == lpfc_enable_nvmet[i]) {
7d708033 5951#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
3c603be9
JS
5952 if (lpfc_nvmet_mem_alloc(phba))
5953 break;
5954
5955 phba->nvmet_support = 1; /* a match */
5956
f358dd0c
JS
5957 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5958 "6017 NVME Target %016llx\n",
5959 wwn);
7d708033
JS
5960#else
5961 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5962 "6021 Can't enable NVME Target."
5963 " NVME_TARGET_FC infrastructure"
5964 " is not in kernel\n");
5965#endif
3c603be9 5966 break;
f358dd0c
JS
5967 }
5968 }
5969 }
895427bd
JS
5970
5971 lpfc_nvme_mod_param_dep(phba);
5972
fedd3b7b 5973 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS
5974 lpfc_supported_pages(mboxq);
5975 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS
5976 if (!rc) {
5977 mqe = &mboxq->u.mqe;
5978 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
5979 LPFC_MAX_SUPPORTED_PAGES);
5980 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
5981 switch (pn_page[i]) {
5982 case LPFC_SLI4_PARAMETERS:
5983 phba->sli4_hba.pc_sli4_params.supported = 1;
5984 break;
5985 default:
5986 break;
5987 }
5988 }
5989 /* Read the port's SLI4 Parameters capabilities if supported. */
5990 if (phba->sli4_hba.pc_sli4_params.supported)
5991 rc = lpfc_pc_sli4_params_get(phba, mboxq);
5992 if (rc) {
5993 mempool_free(mboxq, phba->mbox_mem_pool);
5994 rc = -EIO;
5995 goto out_free_bsmbx;
cb5172ea
JS
5996 }
5997 }
65791f1f 5998
fedd3b7b
JS
5999 /*
6000 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS
6001 * If this call fails, it isn't critical unless the SLI4 parameters come
6002 * back in conflict.
fedd3b7b 6003 */
6d368e53
JS
6004 rc = lpfc_get_sli4_parameters(phba, mboxq);
6005 if (rc) {
6006 if (phba->sli4_hba.extents_in_use &&
6007 phba->sli4_hba.rpi_hdrs_in_use) {
6008 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6009 "2999 Unsupported SLI4 Parameters "
6010 "Extents and RPI headers enabled.\n");
6d368e53 6011 }
895427bd
JS
6012 mempool_free(mboxq, phba->mbox_mem_pool);
6013 goto out_free_bsmbx;
6d368e53 6014 }
895427bd 6015
cb5172ea 6016 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS
6017
6018 /* Verify OAS is supported */
6019 lpfc_sli4_oas_verify(phba);
6020 if (phba->cfg_fof)
6021 fof_vectors = 1;
6022
5350d872
JS
6023 /* Verify all the SLI4 queues */
6024 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS
6025 if (rc)
6026 goto out_free_bsmbx;
6027
6028 /* Create driver internal CQE event pool */
6029 rc = lpfc_sli4_cq_event_pool_create(phba);
6030 if (rc)
5350d872 6031 goto out_free_bsmbx;
da0436e9 6032
8a9d2e80
JS
6033 /* Initialize sgl lists per host */
6034 lpfc_init_sgl_list(phba);
6035
6036 /* Allocate and initialize active sgl array */
da0436e9
JS
6037 rc = lpfc_init_active_sgl_array(phba);
6038 if (rc) {
6039 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6040 "1430 Failed to initialize sgl list.\n");
8a9d2e80 6041 goto out_destroy_cq_event_pool;
da0436e9 6042 }
da0436e9
JS
6043 rc = lpfc_sli4_init_rpi_hdrs(phba);
6044 if (rc) {
6045 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6046 "1432 Failed to initialize rpi headers.\n");
6047 goto out_free_active_sgl;
6048 }
6049
a93ff37a 6050 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS
6051 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
6052 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
6053 GFP_KERNEL);
6054 if (!phba->fcf.fcf_rr_bmask) {
6055 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6056 "2759 Failed allocate memory for FCF round "
6057 "robin failover bmask\n");
0558056c 6058 rc = -ENOMEM;
0c9ab6f5
JS
6059 goto out_remove_rpi_hdrs;
6060 }
6061
895427bd
JS
6062 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
6063 sizeof(struct lpfc_hba_eq_hdl),
6064 GFP_KERNEL);
6065 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS
6066 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6067 "2572 Failed allocate memory for "
6068 "fast-path per-EQ handle array\n");
6069 rc = -ENOMEM;
6070 goto out_free_fcf_rr_bmask;
da0436e9
JS
6071 }
6072
895427bd
JS
6073 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
6074 sizeof(struct lpfc_vector_map_info),
6075 GFP_KERNEL);
7bb03bbf
JS
6076 if (!phba->sli4_hba.cpu_map) {
6077 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6078 "3327 Failed allocate memory for msi-x "
6079 "interrupt vector mapping\n");
6080 rc = -ENOMEM;
895427bd 6081 goto out_free_hba_eq_hdl;
7bb03bbf 6082 }
b246de17 6083 if (lpfc_used_cpu == NULL) {
895427bd
JS
6084 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
6085 GFP_KERNEL);
b246de17
JS
6086 if (!lpfc_used_cpu) {
6087 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6088 "3335 Failed allocate memory for msi-x "
6089 "interrupt vector mapping\n");
6090 kfree(phba->sli4_hba.cpu_map);
6091 rc = -ENOMEM;
895427bd 6092 goto out_free_hba_eq_hdl;
b246de17
JS
6093 }
6094 for (i = 0; i < lpfc_present_cpu; i++)
6095 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
6096 }
6097
912e3acd
JS
6098 /*
6099 * Enable sr-iov virtual functions if supported and configured
6100 * through the module parameter.
6101 */
6102 if (phba->cfg_sriov_nr_virtfn > 0) {
6103 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6104 phba->cfg_sriov_nr_virtfn);
6105 if (rc) {
6106 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6107 "3020 Requested number of SR-IOV "
6108 "virtual functions (%d) is not "
6109 "supported\n",
6110 phba->cfg_sriov_nr_virtfn);
6111 phba->cfg_sriov_nr_virtfn = 0;
6112 }
6113 }
6114
5248a749 6115 return 0;
da0436e9 6116
895427bd
JS
6117out_free_hba_eq_hdl:
6118 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS
6119out_free_fcf_rr_bmask:
6120 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS
6121out_remove_rpi_hdrs:
6122 lpfc_sli4_remove_rpi_hdrs(phba);
6123out_free_active_sgl:
6124 lpfc_free_active_sgl(phba);
da0436e9
JS
6125out_destroy_cq_event_pool:
6126 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS
6127out_free_bsmbx:
6128 lpfc_destroy_bootstrap_mbox(phba);
6129out_free_mem:
6130 lpfc_mem_free(phba);
6131 return rc;
6132}
6133
6134/**
6135 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6136 * @phba: pointer to lpfc hba data structure.
6137 *
6138 * This routine is invoked to unset the driver internal resources set up
6139 * specific for supporting the SLI-4 HBA device it attached to.
6140 **/
6141static void
6142lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6143{
6144 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6145
7bb03bbf
JS
6146 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6147 kfree(phba->sli4_hba.cpu_map);
6148 phba->sli4_hba.num_present_cpu = 0;
6149 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6150 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6151
da0436e9 6152 /* Free memory allocated for fast-path work queue handles */
895427bd 6153 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS
6154
6155 /* Free the allocated rpi headers. */
6156 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6157 lpfc_sli4_remove_rpis(phba);
da0436e9 6158
0c9ab6f5
JS
6159 /* Free eligible FCF index bmask */
6160 kfree(phba->fcf.fcf_rr_bmask);
6161
da0436e9
JS
6162 /* Free the ELS sgl list */
6163 lpfc_free_active_sgl(phba);
8a9d2e80 6164 lpfc_free_els_sgl_list(phba);
f358dd0c 6165 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6166
da0436e9
JS
6167 /* Free the completion queue EQ event pool */
6168 lpfc_sli4_cq_event_release_all(phba);
6169 lpfc_sli4_cq_event_pool_destroy(phba);
6170
6d368e53
JS
6171 /* Release resource identifiers. */
6172 lpfc_sli4_dealloc_resource_identifiers(phba);
6173
da0436e9
JS
6174 /* Free the bsmbx region. */
6175 lpfc_destroy_bootstrap_mbox(phba);
6176
6177 /* Free the SLI Layer memory with SLI4 HBAs */
6178 lpfc_mem_free_all(phba);
6179
6180 /* Free the current connect table */
6181 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS
6182 &phba->fcf_conn_rec_list, list) {
6183 list_del_init(&conn_entry->list);
da0436e9 6184 kfree(conn_entry);
4d9ab994 6185 }
da0436e9
JS
6186
6187 return;
6188}
6189
6190/**
25985edc 6191 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS
6192 * @phba: The hba struct for which this call is being executed.
6193 * @dev_grp: The HBA PCI-Device group number.
6194 *
6195 * This routine sets up the device INIT interface API function jump table
6196 * in @phba struct.
6197 *
6198 * Returns: 0 - success, -ENODEV - failure.
6199 **/
6200int
6201lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6202{
84d1b006
JS
6203 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6204 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6205 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS
6206 switch (dev_grp) {
6207 case LPFC_PCI_DEV_LP:
6208 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6209 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6210 phba->lpfc_stop_port = lpfc_stop_port_s3;
6211 break;
6212 case LPFC_PCI_DEV_OC:
6213 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6214 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6215 phba->lpfc_stop_port = lpfc_stop_port_s4;
6216 break;
6217 default:
6218 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6219 "1431 Invalid HBA PCI-device group: 0x%x\n",
6220 dev_grp);
6221 return -ENODEV;
6222 break;
6223 }
6224 return 0;
6225}
6226
da0436e9
JS
6227/**
6228 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6229 * @phba: pointer to lpfc hba data structure.
6230 *
6231 * This routine is invoked to set up the driver internal resources after the
6232 * device specific resource setup to support the HBA device it attached to.
6233 *
6234 * Return codes
af901ca1 6235 * 0 - successful
da0436e9
JS
6236 * other values - error
6237 **/
6238static int
6239lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6240{
6241 int error;
6242
6243 /* Startup the kernel thread for this host adapter. */
6244 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6245 "lpfc_worker_%d", phba->brd_no);
6246 if (IS_ERR(phba->worker_thread)) {
6247 error = PTR_ERR(phba->worker_thread);
6248 return error;
3772a991
JS
6249 }
6250
6251 return 0;
6252}
6253
6254/**
6255 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6256 * @phba: pointer to lpfc hba data structure.
6257 *
6258 * This routine is invoked to unset the driver internal resources set up after
6259 * the device specific resource setup for supporting the HBA device it
6260 * attached to.
6261 **/
6262static void
6263lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6264{
6265 /* Stop kernel worker thread */
6266 kthread_stop(phba->worker_thread);
6267}
6268
6269/**
6270 * lpfc_free_iocb_list - Free iocb list.
6271 * @phba: pointer to lpfc hba data structure.
6272 *
6273 * This routine is invoked to free the driver's IOCB list and memory.
6274 **/
6c621a22 6275void
3772a991
JS
6276lpfc_free_iocb_list(struct lpfc_hba *phba)
6277{
6278 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6279
6280 spin_lock_irq(&phba->hbalock);
6281 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6282 &phba->lpfc_iocb_list, list) {
6283 list_del(&iocbq_entry->list);
6284 kfree(iocbq_entry);
6285 phba->total_iocbq_bufs--;
98c9ea5c 6286 }
3772a991
JS
6287 spin_unlock_irq(&phba->hbalock);
6288
6289 return;
6290}
6291
6292/**
6293 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6294 * @phba: pointer to lpfc hba data structure.
6295 *
6296 * This routine is invoked to allocate and initizlize the driver's IOCB
6297 * list and set up the IOCB tag array accordingly.
6298 *
6299 * Return codes
af901ca1 6300 * 0 - successful
3772a991
JS
6301 * other values - error
6302 **/
6c621a22 6303int
3772a991
JS
6304lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6305{
6306 struct lpfc_iocbq *iocbq_entry = NULL;
6307 uint16_t iotag;
6308 int i;
dea3101e
JB
6309
6310 /* Initialize and populate the iocb list per host. */
6311 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6312 for (i = 0; i < iocb_count; i++) {
dd00cc48 6313 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e
JB
6314 if (iocbq_entry == NULL) {
6315 printk(KERN_ERR "%s: only allocated %d iocbs of "
6316 "expected %d count. Unloading driver.\n",
cadbd4a5 6317 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e
JB
6318 goto out_free_iocbq;
6319 }
6320
604a3e30
JB
6321 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6322 if (iotag == 0) {
3772a991 6323 kfree(iocbq_entry);
604a3e30 6324 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6325 "Unloading driver.\n", __func__);
604a3e30
JB
6326 goto out_free_iocbq;
6327 }
6d368e53 6328 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6329 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS
6330
6331 spin_lock_irq(&phba->hbalock);
dea3101e
JB
6332 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6333 phba->total_iocbq_bufs++;
2e0fef85 6334 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
6335 }
6336
3772a991 6337 return 0;
dea3101e 6338
3772a991
JS
6339out_free_iocbq:
6340 lpfc_free_iocb_list(phba);
dea3101e 6341
3772a991
JS
6342 return -ENOMEM;
6343}
5e9d9b82 6344
3772a991 6345/**
8a9d2e80 6346 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6347 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6348 * @sglq_list: pointer to the head of sgl list.
3772a991 6349 *
8a9d2e80 6350 * This routine is invoked to free a give sgl list and memory.
3772a991 6351 **/
8a9d2e80
JS
6352void
6353lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6354{
da0436e9 6355 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS
6356
6357 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6358 list_del(&sglq_entry->list);
6359 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6360 kfree(sglq_entry);
6361 }
6362}
6363
6364/**
6365 * lpfc_free_els_sgl_list - Free els sgl list.
6366 * @phba: pointer to lpfc hba data structure.
6367 *
6368 * This routine is invoked to free the driver's els sgl list and memory.
6369 **/
6370static void
6371lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6372{
da0436e9 6373 LIST_HEAD(sglq_list);
dea3101e 6374
8a9d2e80 6375 /* Retrieve all els sgls from driver list */
da0436e9 6376 spin_lock_irq(&phba->hbalock);
895427bd
JS
6377 spin_lock(&phba->sli4_hba.sgl_list_lock);
6378 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6379 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6380 spin_unlock_irq(&phba->hbalock);
dea3101e 6381
8a9d2e80
JS
6382 /* Now free the sgl list */
6383 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6384}
92d7f7b0 6385
f358dd0c
JS
6386/**
6387 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
6388 * @phba: pointer to lpfc hba data structure.
6389 *
6390 * This routine is invoked to free the driver's nvmet sgl list and memory.
6391 **/
6392static void
6393lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
6394{
6395 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
6396 LIST_HEAD(sglq_list);
6397
6398 /* Retrieve all nvmet sgls from driver list */
6399 spin_lock_irq(&phba->hbalock);
6400 spin_lock(&phba->sli4_hba.sgl_list_lock);
6401 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
6402 spin_unlock(&phba->sli4_hba.sgl_list_lock);
6403 spin_unlock_irq(&phba->hbalock);
6404
6405 /* Now free the sgl list */
6406 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
6407 list_del(&sglq_entry->list);
6408 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
6409 kfree(sglq_entry);
6410 }
6411}
6412
da0436e9
JS
6413/**
6414 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6415 * @phba: pointer to lpfc hba data structure.
6416 *
6417 * This routine is invoked to allocate the driver's active sgl memory.
6418 * This array will hold the sglq_entry's for active IOs.
6419 **/
6420static int
6421lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6422{
6423 int size;
6424 size = sizeof(struct lpfc_sglq *);
6425 size *= phba->sli4_hba.max_cfg_param.max_xri;
6426
6427 phba->sli4_hba.lpfc_sglq_active_list =
6428 kzalloc(size, GFP_KERNEL);
6429 if (!phba->sli4_hba.lpfc_sglq_active_list)
6430 return -ENOMEM;
6431 return 0;
3772a991
JS
6432}
6433
6434/**
da0436e9 6435 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS
6436 * @phba: pointer to lpfc hba data structure.
6437 *
da0436e9
JS
6438 * This routine is invoked to walk through the array of active sglq entries
6439 * and free all of the resources.
6440 * This is just a place holder for now.
3772a991
JS
6441 **/
6442static void
da0436e9 6443lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6444{
da0436e9 6445 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS
6446}
6447
6448/**
da0436e9 6449 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS
6450 * @phba: pointer to lpfc hba data structure.
6451 *
da0436e9
JS
6452 * This routine is invoked to allocate and initizlize the driver's sgl
6453 * list and set up the sgl xritag tag array accordingly.
3772a991 6454 *
3772a991 6455 **/
8a9d2e80 6456static void
da0436e9 6457lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6458{
da0436e9 6459 /* Initialize and populate the sglq list per host/VF. */
895427bd 6460 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 6461 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 6462 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
86c67379 6463 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
da0436e9 6464
8a9d2e80
JS
6465 /* els xri-sgl book keeping */
6466 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6467
8a9d2e80 6468 /* scsi xri-buffer book keeping */
da0436e9 6469 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS
6470
6471 /* nvme xri-buffer book keeping */
6472 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS
6473}
6474
6475/**
6476 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6477 * @phba: pointer to lpfc hba data structure.
6478 *
6479 * This routine is invoked to post rpi header templates to the
88a2cfbb 6480 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6481 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS
6482 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6483 * and should be called only when interrupts are disabled.
da0436e9
JS
6484 *
6485 * Return codes
af901ca1 6486 * 0 - successful
88a2cfbb 6487 * -ERROR - otherwise.
da0436e9
JS
6488 **/
6489int
6490lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6491{
6492 int rc = 0;
da0436e9
JS
6493 struct lpfc_rpi_hdr *rpi_hdr;
6494
6495 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6496 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6497 return rc;
6d368e53
JS
6498 if (phba->sli4_hba.extents_in_use)
6499 return -EIO;
da0436e9
JS
6500
6501 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6502 if (!rpi_hdr) {
6503 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6504 "0391 Error during rpi post operation\n");
6505 lpfc_sli4_remove_rpis(phba);
6506 rc = -ENODEV;
6507 }
6508
6509 return rc;
6510}
6511
6512/**
6513 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6514 * @phba: pointer to lpfc hba data structure.
6515 *
6516 * This routine is invoked to allocate a single 4KB memory region to
6517 * support rpis and stores them in the phba. This single region
6518 * provides support for up to 64 rpis. The region is used globally
6519 * by the device.
6520 *
6521 * Returns:
6522 * A valid rpi hdr on success.
6523 * A NULL pointer on any failure.
6524 **/
6525struct lpfc_rpi_hdr *
6526lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6527{
6528 uint16_t rpi_limit, curr_rpi_range;
6529 struct lpfc_dmabuf *dmabuf;
6530 struct lpfc_rpi_hdr *rpi_hdr;
6531
6d368e53
JS
6532 /*
6533 * If the SLI4 port supports extents, posting the rpi header isn't
6534 * required. Set the expected maximum count and let the actual value
6535 * get set when extents are fully allocated.
6536 */
6537 if (!phba->sli4_hba.rpi_hdrs_in_use)
6538 return NULL;
6539 if (phba->sli4_hba.extents_in_use)
6540 return NULL;
6541
6542 /* The limit on the logical index is just the max_rpi count. */
845d9e8d 6543 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
da0436e9
JS
6544
6545 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6546 /*
6547 * Establish the starting RPI in this header block. The starting
6548 * rpi is normalized to a zero base because the physical rpi is
6549 * port based.
6550 */
97f2ecf1 6551 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS
6552 spin_unlock_irq(&phba->hbalock);
6553
845d9e8d
JS
6554 /* Reached full RPI range */
6555 if (curr_rpi_range == rpi_limit)
6d368e53 6556 return NULL;
845d9e8d 6557
da0436e9
JS
6558 /*
6559 * First allocate the protocol header region for the port. The
6560 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6561 */
6562 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6563 if (!dmabuf)
6564 return NULL;
6565
1aee383d
JP
6566 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6567 LPFC_HDR_TEMPLATE_SIZE,
6568 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
6569 if (!dmabuf->virt) {
6570 rpi_hdr = NULL;
6571 goto err_free_dmabuf;
6572 }
6573
da0436e9
JS
6574 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6575 rpi_hdr = NULL;
6576 goto err_free_coherent;
6577 }
6578
6579 /* Save the rpi header data for cleanup later. */
6580 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6581 if (!rpi_hdr)
6582 goto err_free_coherent;
6583
6584 rpi_hdr->dmabuf = dmabuf;
6585 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6586 rpi_hdr->page_count = 1;
6587 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6588
6589 /* The rpi_hdr stores the logical index only. */
6590 rpi_hdr->start_rpi = curr_rpi_range;
845d9e8d 6591 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
da0436e9
JS
6592 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6593
da0436e9
JS
6594 spin_unlock_irq(&phba->hbalock);
6595 return rpi_hdr;
6596
6597 err_free_coherent:
6598 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6599 dmabuf->virt, dmabuf->phys);
6600 err_free_dmabuf:
6601 kfree(dmabuf);
6602 return NULL;
6603}
6604
6605/**
6606 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6607 * @phba: pointer to lpfc hba data structure.
6608 *
6609 * This routine is invoked to remove all memory resources allocated
6d368e53
JS
6610 * to support rpis for SLI4 ports not supporting extents. This routine
6611 * presumes the caller has released all rpis consumed by fabric or port
6612 * logins and is prepared to have the header pages removed.
da0436e9
JS
6613 **/
6614void
6615lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6616{
6617 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6618
6d368e53
JS
6619 if (!phba->sli4_hba.rpi_hdrs_in_use)
6620 goto exit;
6621
da0436e9
JS
6622 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6623 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6624 list_del(&rpi_hdr->list);
6625 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6626 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6627 kfree(rpi_hdr->dmabuf);
6628 kfree(rpi_hdr);
6629 }
6d368e53
JS
6630 exit:
6631 /* There are no rpis available to the port now. */
6632 phba->sli4_hba.next_rpi = 0;
da0436e9
JS
6633}
6634
6635/**
6636 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6637 * @pdev: pointer to pci device data structure.
6638 *
6639 * This routine is invoked to allocate the driver hba data structure for an
6640 * HBA device. If the allocation is successful, the phba reference to the
6641 * PCI device data structure is set.
6642 *
6643 * Return codes
af901ca1 6644 * pointer to @phba - successful
da0436e9
JS
6645 * NULL - error
6646 **/
6647static struct lpfc_hba *
6648lpfc_hba_alloc(struct pci_dev *pdev)
6649{
6650 struct lpfc_hba *phba;
6651
6652 /* Allocate memory for HBA structure */
6653 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6654 if (!phba) {
e34ccdfe 6655 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS
6656 return NULL;
6657 }
6658
6659 /* Set reference to PCI device in HBA structure */
6660 phba->pcidev = pdev;
6661
6662 /* Assign an unused board number */
6663 phba->brd_no = lpfc_get_instance();
6664 if (phba->brd_no < 0) {
6665 kfree(phba);
6666 return NULL;
6667 }
65791f1f 6668 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6669
4fede78f 6670 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS
6671 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6672
da0436e9
JS
6673 return phba;
6674}
6675
6676/**
6677 * lpfc_hba_free - Free driver hba data structure with a device.
6678 * @phba: pointer to lpfc hba data structure.
6679 *
6680 * This routine is invoked to free the driver hba data structure with an
6681 * HBA device.
6682 **/
6683static void
6684lpfc_hba_free(struct lpfc_hba *phba)
6685{
6686 /* Release the driver assigned board number */
6687 idr_remove(&lpfc_hba_index, phba->brd_no);
6688
895427bd
JS
6689 /* Free memory allocated with sli3 rings */
6690 kfree(phba->sli.sli3_ring);
6691 phba->sli.sli3_ring = NULL;
2a76a283 6692
da0436e9
JS
6693 kfree(phba);
6694 return;
6695}
6696
6697/**
6698 * lpfc_create_shost - Create hba physical port with associated scsi host.
6699 * @phba: pointer to lpfc hba data structure.
6700 *
6701 * This routine is invoked to create HBA physical port and associate a SCSI
6702 * host with it.
6703 *
6704 * Return codes
af901ca1 6705 * 0 - successful
da0436e9
JS
6706 * other values - error
6707 **/
6708static int
6709lpfc_create_shost(struct lpfc_hba *phba)
6710{
6711 struct lpfc_vport *vport;
6712 struct Scsi_Host *shost;
6713
6714 /* Initialize HBA FC structure */
6715 phba->fc_edtov = FF_DEF_EDTOV;
6716 phba->fc_ratov = FF_DEF_RATOV;
6717 phba->fc_altov = FF_DEF_ALTOV;
6718 phba->fc_arbtov = FF_DEF_ARBTOV;
6719
d7c47992 6720 atomic_set(&phba->sdev_cnt, 0);
da0436e9
JS
6721 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6722 if (!vport)
6723 return -ENODEV;
6724
6725 shost = lpfc_shost_from_vport(vport);
6726 phba->pport = vport;
2ea259ee 6727
f358dd0c
JS
6728 if (phba->nvmet_support) {
6729 /* Only 1 vport (pport) will support NVME target */
6730 if (phba->txrdy_payload_pool == NULL) {
6731 phba->txrdy_payload_pool = pci_pool_create(
6732 "txrdy_pool", phba->pcidev,
6733 TXRDY_PAYLOAD_LEN, 16, 0);
6734 if (phba->txrdy_payload_pool) {
6735 phba->targetport = NULL;
6736 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
6737 lpfc_printf_log(phba, KERN_INFO,
6738 LOG_INIT | LOG_NVME_DISC,
6739 "6076 NVME Target Found\n");
6740 }
6741 }
6742 }
6743
da0436e9
JS
6744 lpfc_debugfs_initialize(vport);
6745 /* Put reference to SCSI host to driver's device private data */
6746 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6747
4258e98e
JS
6748 /*
6749 * At this point we are fully registered with PSA. In addition,
6750 * any initial discovery should be completed.
6751 */
6752 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS
6753 if (phba->cfg_enable_SmartSAN ||
6754 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS
6755
6756 /* Setup appropriate attribute masks */
6757 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6758 if (phba->cfg_enable_SmartSAN)
4258e98e
JS
6759 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6760 else
6761 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6762 }
3772a991
JS
6763 return 0;
6764}
db2378e0 6765
3772a991
JS
6766/**
6767 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6768 * @phba: pointer to lpfc hba data structure.
6769 *
6770 * This routine is invoked to destroy HBA physical port and the associated
6771 * SCSI host.
6772 **/
6773static void
6774lpfc_destroy_shost(struct lpfc_hba *phba)
6775{
6776 struct lpfc_vport *vport = phba->pport;
6777
6778 /* Destroy physical port that associated with the SCSI host */
6779 destroy_port(vport);
6780
6781 return;
6782}
6783
6784/**
6785 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6786 * @phba: pointer to lpfc hba data structure.
6787 * @shost: the shost to be used to detect Block guard settings.
6788 *
6789 * This routine sets up the local Block guard protocol settings for @shost.
6790 * This routine also allocates memory for debugging bg buffers.
6791 **/
6792static void
6793lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6794{
bbeb79b9
JS
6795 uint32_t old_mask;
6796 uint32_t old_guard;
6797
3772a991 6798 int pagecnt = 10;
b3b98b74 6799 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS
6800 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6801 "1478 Registering BlockGuard with the "
6802 "SCSI layer\n");
bbeb79b9 6803
b3b98b74
JS
6804 old_mask = phba->cfg_prot_mask;
6805 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS
6806
6807 /* Only allow supported values */
b3b98b74 6808 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS
6809 SHOST_DIX_TYPE0_PROTECTION |
6810 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS
6811 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6812 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS
6813
6814 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS
6815 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6816 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6817
b3b98b74
JS
6818 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6819 if ((old_mask != phba->cfg_prot_mask) ||
6820 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS
6821 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6822 "1475 Registering BlockGuard with the "
6823 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS
6824 phba->cfg_prot_mask,
6825 phba->cfg_prot_guard);
bbeb79b9 6826
b3b98b74
JS
6827 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6828 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS
6829 } else
6830 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6831 "1479 Not Registering BlockGuard with the SCSI "
6832 "layer, Bad protection parameters: %d %d\n",
6833 old_mask, old_guard);
3772a991 6834 }
bbeb79b9 6835
3772a991
JS
6836 if (!_dump_buf_data) {
6837 while (pagecnt) {
6838 spin_lock_init(&_dump_buf_lock);
6839 _dump_buf_data =
6840 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6841 if (_dump_buf_data) {
6a9c52cf
JS
6842 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6843 "9043 BLKGRD: allocated %d pages for "
3772a991
JS
6844 "_dump_buf_data at 0x%p\n",
6845 (1 << pagecnt), _dump_buf_data);
6846 _dump_buf_data_order = pagecnt;
6847 memset(_dump_buf_data, 0,
6848 ((1 << PAGE_SHIFT) << pagecnt));
6849 break;
6850 } else
6851 --pagecnt;
6852 }
6853 if (!_dump_buf_data_order)
6a9c52cf
JS
6854 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6855 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS
6856 "memory for hexdump\n");
6857 } else
6a9c52cf
JS
6858 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6859 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS
6860 "\n", _dump_buf_data);
6861 if (!_dump_buf_dif) {
6862 while (pagecnt) {
6863 _dump_buf_dif =
6864 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6865 if (_dump_buf_dif) {
6a9c52cf
JS
6866 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6867 "9046 BLKGRD: allocated %d pages for "
3772a991
JS
6868 "_dump_buf_dif at 0x%p\n",
6869 (1 << pagecnt), _dump_buf_dif);
6870 _dump_buf_dif_order = pagecnt;
6871 memset(_dump_buf_dif, 0,
6872 ((1 << PAGE_SHIFT) << pagecnt));
6873 break;
6874 } else
6875 --pagecnt;
6876 }
6877 if (!_dump_buf_dif_order)
6a9c52cf
JS
6878 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6879 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS
6880 "memory for hexdump\n");
6881 } else
6a9c52cf
JS
6882 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6883 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS
6884 _dump_buf_dif);
6885}
6886
6887/**
6888 * lpfc_post_init_setup - Perform necessary device post initialization setup.
6889 * @phba: pointer to lpfc hba data structure.
6890 *
6891 * This routine is invoked to perform all the necessary post initialization
6892 * setup for the device.
6893 **/
6894static void
6895lpfc_post_init_setup(struct lpfc_hba *phba)
6896{
6897 struct Scsi_Host *shost;
6898 struct lpfc_adapter_event_header adapter_event;
6899
6900 /* Get the default values for Model Name and Description */
6901 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
6902
6903 /*
6904 * hba setup may have changed the hba_queue_depth so we need to
6905 * adjust the value of can_queue.
6906 */
6907 shost = pci_get_drvdata(phba->pcidev);
6908 shost->can_queue = phba->cfg_hba_queue_depth - 10;
6909 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
6910 lpfc_setup_bg(phba, shost);
6911
6912 lpfc_host_attrib_init(shost);
6913
6914 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
6915 spin_lock_irq(shost->host_lock);
6916 lpfc_poll_start_timer(phba);
6917 spin_unlock_irq(shost->host_lock);
6918 }
6919
6920 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6921 "0428 Perform SCSI scan\n");
6922 /* Send board arrival event to upper layer */
6923 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
6924 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
6925 fc_host_post_vendor_event(shost, fc_get_event_number(),
6926 sizeof(adapter_event),
6927 (char *) &adapter_event,
6928 LPFC_NL_VENDOR_ID);
6929 return;
6930}
6931
6932/**
6933 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
6934 * @phba: pointer to lpfc hba data structure.
6935 *
6936 * This routine is invoked to set up the PCI device memory space for device
6937 * with SLI-3 interface spec.
6938 *
6939 * Return codes
af901ca1 6940 * 0 - successful
3772a991
JS
6941 * other values - error
6942 **/
6943static int
6944lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
6945{
6946 struct pci_dev *pdev;
6947 unsigned long bar0map_len, bar2map_len;
6948 int i, hbq_count;
6949 void *ptr;
6950 int error = -ENODEV;
6951
6952 /* Obtain PCI device reference */
6953 if (!phba->pcidev)
6954 return error;
6955 else
6956 pdev = phba->pcidev;
6957
6958 /* Set the device DMA mask size */
8e68597d
MR
6959 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
6960 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
6961 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
6962 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 6963 return error;
8e68597d
MR
6964 }
6965 }
3772a991
JS
6966
6967 /* Get the bus address of Bar0 and Bar2 and the number of bytes
6968 * required by each mapping.
6969 */
6970 phba->pci_bar0_map = pci_resource_start(pdev, 0);
6971 bar0map_len = pci_resource_len(pdev, 0);
6972
6973 phba->pci_bar2_map = pci_resource_start(pdev, 2);
6974 bar2map_len = pci_resource_len(pdev, 2);
6975
6976 /* Map HBA SLIM to a kernel virtual address. */
6977 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
6978 if (!phba->slim_memmap_p) {
6979 dev_printk(KERN_ERR, &pdev->dev,
6980 "ioremap failed for SLIM memory.\n");
6981 goto out;
6982 }
6983
6984 /* Map HBA Control Registers to a kernel virtual address. */
6985 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
6986 if (!phba->ctrl_regs_memmap_p) {
6987 dev_printk(KERN_ERR, &pdev->dev,
6988 "ioremap failed for HBA control registers.\n");
6989 goto out_iounmap_slim;
6990 }
6991
6992 /* Allocate memory for SLI-2 structures */
1aee383d
JP
6993 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6994 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS
6995 if (!phba->slim2p.virt)
6996 goto out_iounmap;
6997
3772a991 6998 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS
6999 phba->mbox_ext = (phba->slim2p.virt +
7000 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS
7001 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
7002 phba->IOCBs = (phba->slim2p.virt +
7003 offsetof(struct lpfc_sli2_slim, IOCBs));
7004
7005 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
7006 lpfc_sli_hbq_size(),
7007 &phba->hbqslimp.phys,
7008 GFP_KERNEL);
7009 if (!phba->hbqslimp.virt)
7010 goto out_free_slim;
7011
7012 hbq_count = lpfc_sli_hbq_count();
7013 ptr = phba->hbqslimp.virt;
7014 for (i = 0; i < hbq_count; ++i) {
7015 phba->hbqs[i].hbq_virt = ptr;
7016 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
7017 ptr += (lpfc_hbq_defs[i]->entry_count *
7018 sizeof(struct lpfc_hbq_entry));
7019 }
7020 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
7021 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
7022
7023 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
7024
3772a991
JS
7025 phba->MBslimaddr = phba->slim_memmap_p;
7026 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
7027 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
7028 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
7029 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
7030
7031 return 0;
7032
7033out_free_slim:
7034 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7035 phba->slim2p.virt, phba->slim2p.phys);
7036out_iounmap:
7037 iounmap(phba->ctrl_regs_memmap_p);
7038out_iounmap_slim:
7039 iounmap(phba->slim_memmap_p);
7040out:
7041 return error;
7042}
7043
7044/**
7045 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
7046 * @phba: pointer to lpfc hba data structure.
7047 *
7048 * This routine is invoked to unset the PCI device memory space for device
7049 * with SLI-3 interface spec.
7050 **/
7051static void
7052lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7053{
7054 struct pci_dev *pdev;
7055
7056 /* Obtain PCI device reference */
7057 if (!phba->pcidev)
7058 return;
7059 else
7060 pdev = phba->pcidev;
7061
7062 /* Free coherent DMA memory allocated */
7063 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7064 phba->hbqslimp.virt, phba->hbqslimp.phys);
7065 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7066 phba->slim2p.virt, phba->slim2p.phys);
7067
7068 /* I/O memory unmap */
7069 iounmap(phba->ctrl_regs_memmap_p);
7070 iounmap(phba->slim_memmap_p);
7071
7072 return;
7073}
7074
7075/**
da0436e9 7076 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS
7077 * @phba: pointer to lpfc hba data structure.
7078 *
da0436e9
JS
7079 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7080 * done and check status.
3772a991 7081 *
da0436e9 7082 * Return 0 if successful, otherwise -ENODEV.
3772a991 7083 **/
da0436e9
JS
7084int
7085lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 7086{
2fcee4bf
JS
7087 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7088 struct lpfc_register reg_data;
7089 int i, port_error = 0;
7090 uint32_t if_type;
3772a991 7091
9940b97b
JS
7092 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7093 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 7094 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 7095 return -ENODEV;
3772a991 7096
da0436e9
JS
7097 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7098 for (i = 0; i < 3000; i++) {
9940b97b
JS
7099 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7100 &portsmphr_reg.word0) ||
7101 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 7102 /* Port has a fatal POST error, break out */
da0436e9
JS
7103 port_error = -ENODEV;
7104 break;
7105 }
2fcee4bf
JS
7106 if (LPFC_POST_STAGE_PORT_READY ==
7107 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 7108 break;
da0436e9 7109 msleep(10);
3772a991
JS
7110 }
7111
2fcee4bf
JS
7112 /*
7113 * If there was a port error during POST, then don't proceed with
7114 * other register reads as the data may not be valid. Just exit.
7115 */
7116 if (port_error) {
da0436e9 7117 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
7118 "1408 Port Failed POST - portsmphr=0x%x, "
7119 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7120 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7121 portsmphr_reg.word0,
7122 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7123 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7124 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7125 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7126 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7127 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7128 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7129 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7130 } else {
28baac74 7131 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS
7132 "2534 Device Info: SLIFamily=0x%x, "
7133 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7134 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS
7135 bf_get(lpfc_sli_intf_sli_family,
7136 &phba->sli4_hba.sli_intf),
7137 bf_get(lpfc_sli_intf_slirev,
7138 &phba->sli4_hba.sli_intf),
085c647c
JS
7139 bf_get(lpfc_sli_intf_if_type,
7140 &phba->sli4_hba.sli_intf),
7141 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7142 &phba->sli4_hba.sli_intf),
085c647c
JS
7143 bf_get(lpfc_sli_intf_sli_hint2,
7144 &phba->sli4_hba.sli_intf),
7145 bf_get(lpfc_sli_intf_func_type,
28baac74 7146 &phba->sli4_hba.sli_intf));
2fcee4bf
JS
7147 /*
7148 * Check for other Port errors during the initialization
7149 * process. Fail the load if the port did not come up
7150 * correctly.
7151 */
7152 if_type = bf_get(lpfc_sli_intf_if_type,
7153 &phba->sli4_hba.sli_intf);
7154 switch (if_type) {
7155 case LPFC_SLI_INTF_IF_TYPE_0:
7156 phba->sli4_hba.ue_mask_lo =
7157 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7158 phba->sli4_hba.ue_mask_hi =
7159 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7160 uerrlo_reg.word0 =
7161 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7162 uerrhi_reg.word0 =
7163 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7164 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7165 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7166 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7167 "1422 Unrecoverable Error "
7168 "Detected during POST "
7169 "uerr_lo_reg=0x%x, "
7170 "uerr_hi_reg=0x%x, "
7171 "ue_mask_lo_reg=0x%x, "
7172 "ue_mask_hi_reg=0x%x\n",
7173 uerrlo_reg.word0,
7174 uerrhi_reg.word0,
7175 phba->sli4_hba.ue_mask_lo,
7176 phba->sli4_hba.ue_mask_hi);
7177 port_error = -ENODEV;
7178 }
7179 break;
7180 case LPFC_SLI_INTF_IF_TYPE_2:
7181 /* Final checks. The port status should be clean. */
9940b97b
JS
7182 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7183 &reg_data.word0) ||
0558056c
JS
7184 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7185 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS
7186 phba->work_status[0] =
7187 readl(phba->sli4_hba.u.if_type2.
7188 ERR1regaddr);
7189 phba->work_status[1] =
7190 readl(phba->sli4_hba.u.if_type2.
7191 ERR2regaddr);
7192 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS
7193 "2888 Unrecoverable port error "
7194 "following POST: port status reg "
7195 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS
7196 "error 1=0x%x, error 2=0x%x\n",
7197 reg_data.word0,
7198 portsmphr_reg.word0,
7199 phba->work_status[0],
7200 phba->work_status[1]);
7201 port_error = -ENODEV;
7202 }
7203 break;
7204 case LPFC_SLI_INTF_IF_TYPE_1:
7205 default:
7206 break;
7207 }
28baac74 7208 }
da0436e9
JS
7209 return port_error;
7210}
3772a991 7211
da0436e9
JS
7212/**
7213 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7214 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7215 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS
7216 *
7217 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7218 * memory map.
7219 **/
7220static void
2fcee4bf
JS
7221lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7222{
7223 switch (if_type) {
7224 case LPFC_SLI_INTF_IF_TYPE_0:
7225 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7226 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7227 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7228 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7229 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7230 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7231 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7232 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7233 phba->sli4_hba.SLIINTFregaddr =
7234 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7235 break;
7236 case LPFC_SLI_INTF_IF_TYPE_2:
7237 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS
7238 phba->sli4_hba.conf_regs_memmap_p +
7239 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7240 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS
7241 phba->sli4_hba.conf_regs_memmap_p +
7242 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7243 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS
7244 phba->sli4_hba.conf_regs_memmap_p +
7245 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7246 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS
7247 phba->sli4_hba.conf_regs_memmap_p +
7248 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS
7249 phba->sli4_hba.SLIINTFregaddr =
7250 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7251 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS
7252 phba->sli4_hba.conf_regs_memmap_p +
7253 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7254 phba->sli4_hba.RQDBregaddr =
962bc51b
JS
7255 phba->sli4_hba.conf_regs_memmap_p +
7256 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7257 phba->sli4_hba.WQDBregaddr =
962bc51b
JS
7258 phba->sli4_hba.conf_regs_memmap_p +
7259 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS
7260 phba->sli4_hba.EQCQDBregaddr =
7261 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
7262 phba->sli4_hba.MQDBregaddr =
7263 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
7264 phba->sli4_hba.BMBXregaddr =
7265 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
7266 break;
7267 case LPFC_SLI_INTF_IF_TYPE_1:
7268 default:
7269 dev_printk(KERN_ERR, &phba->pcidev->dev,
7270 "FATAL - unsupported SLI4 interface type - %d\n",
7271 if_type);
7272 break;
7273 }
da0436e9 7274}
3772a991 7275
da0436e9
JS
7276/**
7277 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
7278 * @phba: pointer to lpfc hba data structure.
7279 *
7280 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
7281 * memory map.
7282 **/
7283static void
7284lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
7285{
2fcee4bf
JS
7286 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
7287 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 7288 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7289 LPFC_HST_ISR0;
da0436e9 7290 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7291 LPFC_HST_IMR0;
da0436e9 7292 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7293 LPFC_HST_ISCR0;
3772a991
JS
7294}
7295
7296/**
da0436e9 7297 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 7298 * @phba: pointer to lpfc hba data structure.
da0436e9 7299 * @vf: virtual function number
3772a991 7300 *
da0436e9
JS
7301 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
7302 * based on the given viftual function number, @vf.
7303 *
7304 * Return 0 if successful, otherwise -ENODEV.
3772a991 7305 **/
da0436e9
JS
7306static int
7307lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7308{
da0436e9
JS
7309 if (vf > LPFC_VIR_FUNC_MAX)
7310 return -ENODEV;
3772a991 7311
da0436e9 7312 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7313 vf * LPFC_VFR_PAGE_SIZE +
7314 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7315 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7316 vf * LPFC_VFR_PAGE_SIZE +
7317 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS
7318 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7319 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7320 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7321 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7322 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7323 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7324 return 0;
3772a991
JS
7325}
7326
7327/**
da0436e9 7328 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS
7329 * @phba: pointer to lpfc hba data structure.
7330 *
da0436e9
JS
7331 * This routine is invoked to create the bootstrap mailbox
7332 * region consistent with the SLI-4 interface spec. This
7333 * routine allocates all memory necessary to communicate
7334 * mailbox commands to the port and sets up all alignment
7335 * needs. No locks are expected to be held when calling
7336 * this routine.
3772a991
JS
7337 *
7338 * Return codes
af901ca1 7339 * 0 - successful
d439d286 7340 * -ENOMEM - could not allocated memory.
da0436e9 7341 **/
3772a991 7342static int
da0436e9 7343lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7344{
da0436e9
JS
7345 uint32_t bmbx_size;
7346 struct lpfc_dmabuf *dmabuf;
7347 struct dma_address *dma_address;
7348 uint32_t pa_addr;
7349 uint64_t phys_addr;
7350
7351 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7352 if (!dmabuf)
7353 return -ENOMEM;
3772a991 7354
da0436e9
JS
7355 /*
7356 * The bootstrap mailbox region is comprised of 2 parts
7357 * plus an alignment restriction of 16 bytes.
7358 */
7359 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP
7360 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7361 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
7362 if (!dmabuf->virt) {
7363 kfree(dmabuf);
7364 return -ENOMEM;
3772a991
JS
7365 }
7366
da0436e9
JS
7367 /*
7368 * Initialize the bootstrap mailbox pointers now so that the register
7369 * operations are simple later. The mailbox dma address is required
7370 * to be 16-byte aligned. Also align the virtual memory as each
7371 * maibox is copied into the bmbx mailbox region before issuing the
7372 * command to the port.
7373 */
7374 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7375 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7376
7377 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7378 LPFC_ALIGN_16_BYTE);
7379 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7380 LPFC_ALIGN_16_BYTE);
7381
7382 /*
7383 * Set the high and low physical addresses now. The SLI4 alignment
7384 * requirement is 16 bytes and the mailbox is posted to the port
7385 * as two 30-bit addresses. The other data is a bit marking whether
7386 * the 30-bit address is the high or low address.
7387 * Upcast bmbx aphys to 64bits so shift instruction compiles
7388 * clean on 32 bit machines.
7389 */
7390 dma_address = &phba->sli4_hba.bmbx.dma_address;
7391 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7392 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7393 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7394 LPFC_BMBX_BIT1_ADDR_HI);
7395
7396 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7397 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7398 LPFC_BMBX_BIT1_ADDR_LO);
7399 return 0;
3772a991
JS
7400}
7401
7402/**
da0436e9 7403 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS
7404 * @phba: pointer to lpfc hba data structure.
7405 *
da0436e9
JS
7406 * This routine is invoked to teardown the bootstrap mailbox
7407 * region and release all host resources. This routine requires
7408 * the caller to ensure all mailbox commands recovered, no
7409 * additional mailbox comands are sent, and interrupts are disabled
7410 * before calling this routine.
7411 *
7412 **/
3772a991 7413static void
da0436e9 7414lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7415{
da0436e9
JS
7416 dma_free_coherent(&phba->pcidev->dev,
7417 phba->sli4_hba.bmbx.bmbx_size,
7418 phba->sli4_hba.bmbx.dmabuf->virt,
7419 phba->sli4_hba.bmbx.dmabuf->phys);
7420
7421 kfree(phba->sli4_hba.bmbx.dmabuf);
7422 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS
7423}
7424
7425/**
da0436e9 7426 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS
7427 * @phba: pointer to lpfc hba data structure.
7428 *
da0436e9
JS
7429 * This routine is invoked to read the configuration parameters from the HBA.
7430 * The configuration parameters are used to set the base and maximum values
7431 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7432 * allocation for the port.
3772a991
JS
7433 *
7434 * Return codes
af901ca1 7435 * 0 - successful
25985edc 7436 * -ENOMEM - No available memory
d439d286 7437 * -EIO - The mailbox failed to complete successfully.
3772a991 7438 **/
ff78d8f9 7439int
da0436e9 7440lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7441{
da0436e9
JS
7442 LPFC_MBOXQ_t *pmb;
7443 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS
7444 union lpfc_sli4_cfg_shdr *shdr;
7445 uint32_t shdr_status, shdr_add_status;
7446 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7447 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7448 char *pdesc_0;
c691816e
JS
7449 uint16_t forced_link_speed;
7450 uint32_t if_type;
8aa134a8 7451 int length, i, rc = 0, rc2;
3772a991 7452
da0436e9
JS
7453 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7454 if (!pmb) {
7455 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7456 "2011 Unable to allocate memory for issuing "
7457 "SLI_CONFIG_SPECIAL mailbox command\n");
7458 return -ENOMEM;
3772a991
JS
7459 }
7460
da0436e9 7461 lpfc_read_config(phba, pmb);
3772a991 7462
da0436e9
JS
7463 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7464 if (rc != MBX_SUCCESS) {
7465 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7466 "2012 Mailbox failed , mbxCmd x%x "
7467 "READ_CONFIG, mbxStatus x%x\n",
7468 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7469 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7470 rc = -EIO;
7471 } else {
7472 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS
7473 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7474 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7475 phba->sli4_hba.lnk_info.lnk_tp =
7476 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7477 phba->sli4_hba.lnk_info.lnk_no =
7478 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7479 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7480 "3081 lnk_type:%d, lnk_numb:%d\n",
7481 phba->sli4_hba.lnk_info.lnk_tp,
7482 phba->sli4_hba.lnk_info.lnk_no);
7483 } else
7484 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7485 "3082 Mailbox (x%x) returned ldv:x0\n",
7486 bf_get(lpfc_mqe_command, &pmb->u.mqe));
6d368e53
JS
7487 phba->sli4_hba.extents_in_use =
7488 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS
7489 phba->sli4_hba.max_cfg_param.max_xri =
7490 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7491 phba->sli4_hba.max_cfg_param.xri_base =
7492 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7493 phba->sli4_hba.max_cfg_param.max_vpi =
7494 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7495 phba->sli4_hba.max_cfg_param.vpi_base =
7496 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7497 phba->sli4_hba.max_cfg_param.max_rpi =
7498 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7499 phba->sli4_hba.max_cfg_param.rpi_base =
7500 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7501 phba->sli4_hba.max_cfg_param.max_vfi =
7502 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7503 phba->sli4_hba.max_cfg_param.vfi_base =
7504 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7505 phba->sli4_hba.max_cfg_param.max_fcfi =
7506 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS
7507 phba->sli4_hba.max_cfg_param.max_eq =
7508 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7509 phba->sli4_hba.max_cfg_param.max_rq =
7510 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7511 phba->sli4_hba.max_cfg_param.max_wq =
7512 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7513 phba->sli4_hba.max_cfg_param.max_cq =
7514 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7515 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7516 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7517 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7518 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS
7519 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7520 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS
7521 phba->max_vports = phba->max_vpi;
7522 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS
7523 "2003 cfg params Extents? %d "
7524 "XRI(B:%d M:%d), "
da0436e9
JS
7525 "VPI(B:%d M:%d) "
7526 "VFI(B:%d M:%d) "
7527 "RPI(B:%d M:%d) "
2ea259ee 7528 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7529 phba->sli4_hba.extents_in_use,
da0436e9
JS
7530 phba->sli4_hba.max_cfg_param.xri_base,
7531 phba->sli4_hba.max_cfg_param.max_xri,
7532 phba->sli4_hba.max_cfg_param.vpi_base,
7533 phba->sli4_hba.max_cfg_param.max_vpi,
7534 phba->sli4_hba.max_cfg_param.vfi_base,
7535 phba->sli4_hba.max_cfg_param.max_vfi,
7536 phba->sli4_hba.max_cfg_param.rpi_base,
7537 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS
7538 phba->sli4_hba.max_cfg_param.max_fcfi,
7539 phba->sli4_hba.max_cfg_param.max_eq,
7540 phba->sli4_hba.max_cfg_param.max_cq,
7541 phba->sli4_hba.max_cfg_param.max_wq,
7542 phba->sli4_hba.max_cfg_param.max_rq);
7543
3772a991 7544 }
912e3acd
JS
7545
7546 if (rc)
7547 goto read_cfg_out;
da0436e9 7548
c691816e
JS
7549 /* Update link speed if forced link speed is supported */
7550 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7551 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7552 forced_link_speed =
7553 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7554 if (forced_link_speed) {
7555 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7556
7557 switch (forced_link_speed) {
7558 case LINK_SPEED_1G:
7559 phba->cfg_link_speed =
7560 LPFC_USER_LINK_SPEED_1G;
7561 break;
7562 case LINK_SPEED_2G:
7563 phba->cfg_link_speed =
7564 LPFC_USER_LINK_SPEED_2G;
7565 break;
7566 case LINK_SPEED_4G:
7567 phba->cfg_link_speed =
7568 LPFC_USER_LINK_SPEED_4G;
7569 break;
7570 case LINK_SPEED_8G:
7571 phba->cfg_link_speed =
7572 LPFC_USER_LINK_SPEED_8G;
7573 break;
7574 case LINK_SPEED_10G:
7575 phba->cfg_link_speed =
7576 LPFC_USER_LINK_SPEED_10G;
7577 break;
7578 case LINK_SPEED_16G:
7579 phba->cfg_link_speed =
7580 LPFC_USER_LINK_SPEED_16G;
7581 break;
7582 case LINK_SPEED_32G:
7583 phba->cfg_link_speed =
7584 LPFC_USER_LINK_SPEED_32G;
7585 break;
7586 case 0xffff:
7587 phba->cfg_link_speed =
7588 LPFC_USER_LINK_SPEED_AUTO;
7589 break;
7590 default:
7591 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7592 "0047 Unrecognized link "
7593 "speed : %d\n",
7594 forced_link_speed);
7595 phba->cfg_link_speed =
7596 LPFC_USER_LINK_SPEED_AUTO;
7597 }
7598 }
7599 }
7600
da0436e9 7601 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
7602 length = phba->sli4_hba.max_cfg_param.max_xri -
7603 lpfc_sli4_get_els_iocb_cnt(phba);
7604 if (phba->cfg_hba_queue_depth > length) {
7605 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7606 "3361 HBA queue depth changed from %d to %d\n",
7607 phba->cfg_hba_queue_depth, length);
7608 phba->cfg_hba_queue_depth = length;
7609 }
912e3acd
JS
7610
7611 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7612 LPFC_SLI_INTF_IF_TYPE_2)
7613 goto read_cfg_out;
7614
7615 /* get the pf# and vf# for SLI4 if_type 2 port */
7616 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7617 sizeof(struct lpfc_sli4_cfg_mhdr));
7618 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7619 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7620 length, LPFC_SLI4_MBX_EMBED);
7621
8aa134a8 7622 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS
7623 shdr = (union lpfc_sli4_cfg_shdr *)
7624 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7625 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7626 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7627 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS
7628 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7629 "3026 Mailbox failed , mbxCmd x%x "
7630 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7631 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7632 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS
7633 goto read_cfg_out;
7634 }
7635
7636 /* search for fc_fcoe resrouce descriptor */
7637 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7638
8aa134a8
JS
7639 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7640 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7641 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7642 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7643 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7644 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7645 goto read_cfg_out;
7646
912e3acd 7647 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7648 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7649 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7650 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS
7651 phba->sli4_hba.iov.pf_number =
7652 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7653 phba->sli4_hba.iov.vf_number =
7654 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7655 break;
7656 }
7657 }
7658
7659 if (i < LPFC_RSRC_DESC_MAX_NUM)
7660 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7661 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7662 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7663 phba->sli4_hba.iov.vf_number);
8aa134a8 7664 else
912e3acd
JS
7665 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7666 "3028 GET_FUNCTION_CONFIG: failed to find "
7667 "Resrouce Descriptor:x%x\n",
7668 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS
7669
7670read_cfg_out:
7671 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7672 return rc;
3772a991
JS
7673}
7674
7675/**
2fcee4bf 7676 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS
7677 * @phba: pointer to lpfc hba data structure.
7678 *
2fcee4bf
JS
7679 * This routine is invoked to setup the port-side endian order when
7680 * the port if_type is 0. This routine has no function for other
7681 * if_types.
da0436e9
JS
7682 *
7683 * Return codes
af901ca1 7684 * 0 - successful
25985edc 7685 * -ENOMEM - No available memory
d439d286 7686 * -EIO - The mailbox failed to complete successfully.
3772a991 7687 **/
da0436e9
JS
7688static int
7689lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7690{
da0436e9 7691 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7692 uint32_t if_type, rc = 0;
da0436e9
JS
7693 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7694 HOST_ENDIAN_HIGH_WORD1};
3772a991 7695
2fcee4bf
JS
7696 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7697 switch (if_type) {
7698 case LPFC_SLI_INTF_IF_TYPE_0:
7699 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7700 GFP_KERNEL);
7701 if (!mboxq) {
7702 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7703 "0492 Unable to allocate memory for "
7704 "issuing SLI_CONFIG_SPECIAL mailbox "
7705 "command\n");
7706 return -ENOMEM;
7707 }
3772a991 7708
2fcee4bf
JS
7709 /*
7710 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7711 * two words to contain special data values and no other data.
7712 */
7713 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7714 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7715 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7716 if (rc != MBX_SUCCESS) {
7717 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7718 "0493 SLI_CONFIG_SPECIAL mailbox "
7719 "failed with status x%x\n",
7720 rc);
7721 rc = -EIO;
7722 }
7723 mempool_free(mboxq, phba->mbox_mem_pool);
7724 break;
7725 case LPFC_SLI_INTF_IF_TYPE_2:
7726 case LPFC_SLI_INTF_IF_TYPE_1:
7727 default:
7728 break;
da0436e9 7729 }
da0436e9 7730 return rc;
3772a991
JS
7731}
7732
7733/**
895427bd 7734 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS
7735 * @phba: pointer to lpfc hba data structure.
7736 *
895427bd
JS
7737 * This routine is invoked to check the user settable queue counts for EQs.
7738 * After this routine is called the counts will be set to valid values that
5350d872
JS
7739 * adhere to the constraints of the system's interrupt vectors and the port's
7740 * queue resources.
da0436e9
JS
7741 *
7742 * Return codes
af901ca1 7743 * 0 - successful
25985edc 7744 * -ENOMEM - No available memory
3772a991 7745 **/
da0436e9 7746static int
5350d872 7747lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7748{
895427bd 7749 int io_channel;
1ba981fd 7750 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7751
da0436e9 7752 /*
67d12733 7753 * Sanity check for configured queue parameters against the run-time
da0436e9
JS
7754 * device parameters
7755 */
3772a991 7756
67d12733 7757 /* Sanity check on HBA EQ parameters */
895427bd 7758 io_channel = phba->io_channel_irqs;
67d12733 7759
895427bd 7760 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS
7761 lpfc_printf_log(phba,
7762 KERN_ERR, LOG_INIT,
90695ee0 7763 "3188 Reducing IO channels to match number of "
7bb03bbf 7764 "online CPUs: from %d to %d\n",
895427bd
JS
7765 io_channel, phba->sli4_hba.num_online_cpu);
7766 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS
7767 }
7768
895427bd 7769 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS
7770 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7771 "2575 Reducing IO channels to match number of "
7772 "available EQs: from %d to %d\n",
895427bd 7773 io_channel,
82c3e9ba 7774 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7775 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7776 }
67d12733 7777
895427bd
JS
7778 /* The actual number of FCP / NVME event queues adopted */
7779 if (io_channel != phba->io_channel_irqs)
7780 phba->io_channel_irqs = io_channel;
7781 if (phba->cfg_fcp_io_channel > io_channel)
7782 phba->cfg_fcp_io_channel = io_channel;
7783 if (phba->cfg_nvme_io_channel > io_channel)
7784 phba->cfg_nvme_io_channel = io_channel;
2d7dbc4c
JS
7785 if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq)
7786 phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
895427bd
JS
7787
7788 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2d7dbc4c 7789 "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n",
895427bd 7790 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
2d7dbc4c 7791 phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq);
3772a991 7792
da0436e9
JS
7793 /* Get EQ depth from module parameter, fake the default for now */
7794 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7795 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7796
5350d872
JS
7797 /* Get CQ depth from module parameter, fake the default for now */
7798 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7799 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS
7800 return 0;
7801}
7802
7803static int
7804lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7805{
7806 struct lpfc_queue *qdesc;
7807 int cnt;
5350d872 7808
895427bd
JS
7809 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7810 phba->sli4_hba.cq_ecount);
7811 if (!qdesc) {
7812 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7813 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7814 wqidx);
7815 return 1;
7816 }
7817 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
7818
7819 cnt = LPFC_NVME_WQSIZE;
7820 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_WQE128_SIZE, cnt);
7821 if (!qdesc) {
7822 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7823 "0509 Failed allocate fast-path NVME WQ (%d)\n",
7824 wqidx);
7825 return 1;
7826 }
7827 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
7828 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7829 return 0;
7830}
7831
7832static int
7833lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
7834{
7835 struct lpfc_queue *qdesc;
7836 uint32_t wqesize;
7837
7838 /* Create Fast Path FCP CQs */
7839 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7840 phba->sli4_hba.cq_ecount);
7841 if (!qdesc) {
7842 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7843 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
7844 return 1;
7845 }
7846 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
7847
7848 /* Create Fast Path FCP WQs */
7849 wqesize = (phba->fcp_embed_io) ?
d1f525aa 7850 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
895427bd
JS
7851 qdesc = lpfc_sli4_queue_alloc(phba, wqesize, phba->sli4_hba.wq_ecount);
7852 if (!qdesc) {
7853 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7854 "0503 Failed allocate fast-path FCP WQ (%d)\n",
7855 wqidx);
7856 return 1;
7857 }
7858 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
7859 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 7860 return 0;
5350d872
JS
7861}
7862
7863/**
7864 * lpfc_sli4_queue_create - Create all the SLI4 queues
7865 * @phba: pointer to lpfc hba data structure.
7866 *
7867 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
7868 * operation. For each SLI4 queue type, the parameters such as queue entry
7869 * count (queue depth) shall be taken from the module parameter. For now,
7870 * we just use some constant number as place holder.
7871 *
7872 * Return codes
4907cb7b 7873 * 0 - successful
5350d872
JS
7874 * -ENOMEM - No availble memory
7875 * -EIO - The mailbox failed to complete successfully.
7876 **/
7877int
7878lpfc_sli4_queue_create(struct lpfc_hba *phba)
7879{
7880 struct lpfc_queue *qdesc;
d1f525aa 7881 int idx, io_channel;
5350d872
JS
7882
7883 /*
67d12733 7884 * Create HBA Record arrays.
895427bd 7885 * Both NVME and FCP will share that same vectors / EQs
5350d872 7886 */
895427bd
JS
7887 io_channel = phba->io_channel_irqs;
7888 if (!io_channel)
67d12733 7889 return -ERANGE;
5350d872 7890
67d12733
JS
7891 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
7892 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
7893 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
7894 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
7895 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
7896 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS
7897 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7898 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
7899 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7900 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 7901
895427bd
JS
7902 phba->sli4_hba.hba_eq = kcalloc(io_channel,
7903 sizeof(struct lpfc_queue *),
7904 GFP_KERNEL);
67d12733
JS
7905 if (!phba->sli4_hba.hba_eq) {
7906 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7907 "2576 Failed allocate memory for "
7908 "fast-path EQ record array\n");
7909 goto out_error;
7910 }
7911
895427bd
JS
7912 if (phba->cfg_fcp_io_channel) {
7913 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
7914 sizeof(struct lpfc_queue *),
7915 GFP_KERNEL);
7916 if (!phba->sli4_hba.fcp_cq) {
7917 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7918 "2577 Failed allocate memory for "
7919 "fast-path CQ record array\n");
7920 goto out_error;
7921 }
7922 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
7923 sizeof(struct lpfc_queue *),
7924 GFP_KERNEL);
7925 if (!phba->sli4_hba.fcp_wq) {
7926 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7927 "2578 Failed allocate memory for "
7928 "fast-path FCP WQ record array\n");
7929 goto out_error;
7930 }
7931 /*
7932 * Since the first EQ can have multiple CQs associated with it,
7933 * this array is used to quickly see if we have a FCP fast-path
7934 * CQ match.
7935 */
7936 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
7937 sizeof(uint16_t),
7938 GFP_KERNEL);
7939 if (!phba->sli4_hba.fcp_cq_map) {
7940 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7941 "2545 Failed allocate memory for "
7942 "fast-path CQ map\n");
7943 goto out_error;
7944 }
67d12733
JS
7945 }
7946
895427bd
JS
7947 if (phba->cfg_nvme_io_channel) {
7948 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
7949 sizeof(struct lpfc_queue *),
7950 GFP_KERNEL);
7951 if (!phba->sli4_hba.nvme_cq) {
7952 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7953 "6077 Failed allocate memory for "
7954 "fast-path CQ record array\n");
7955 goto out_error;
7956 }
da0436e9 7957
895427bd
JS
7958 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
7959 sizeof(struct lpfc_queue *),
7960 GFP_KERNEL);
7961 if (!phba->sli4_hba.nvme_wq) {
7962 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7963 "2581 Failed allocate memory for "
7964 "fast-path NVME WQ record array\n");
7965 goto out_error;
7966 }
7967
7968 /*
7969 * Since the first EQ can have multiple CQs associated with it,
7970 * this array is used to quickly see if we have a NVME fast-path
7971 * CQ match.
7972 */
7973 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
7974 sizeof(uint16_t),
7975 GFP_KERNEL);
7976 if (!phba->sli4_hba.nvme_cq_map) {
7977 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7978 "6078 Failed allocate memory for "
7979 "fast-path CQ map\n");
7980 goto out_error;
7981 }
2d7dbc4c
JS
7982
7983 if (phba->nvmet_support) {
7984 phba->sli4_hba.nvmet_cqset = kcalloc(
7985 phba->cfg_nvmet_mrq,
7986 sizeof(struct lpfc_queue *),
7987 GFP_KERNEL);
7988 if (!phba->sli4_hba.nvmet_cqset) {
7989 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7990 "3121 Fail allocate memory for "
7991 "fast-path CQ set array\n");
7992 goto out_error;
7993 }
7994 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
7995 phba->cfg_nvmet_mrq,
7996 sizeof(struct lpfc_queue *),
7997 GFP_KERNEL);
7998 if (!phba->sli4_hba.nvmet_mrq_hdr) {
7999 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8000 "3122 Fail allocate memory for "
8001 "fast-path RQ set hdr array\n");
8002 goto out_error;
8003 }
8004 phba->sli4_hba.nvmet_mrq_data = kcalloc(
8005 phba->cfg_nvmet_mrq,
8006 sizeof(struct lpfc_queue *),
8007 GFP_KERNEL);
8008 if (!phba->sli4_hba.nvmet_mrq_data) {
8009 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8010 "3124 Fail allocate memory for "
8011 "fast-path RQ set data array\n");
8012 goto out_error;
8013 }
8014 }
da0436e9 8015 }
67d12733 8016
895427bd 8017 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 8018
895427bd
JS
8019 /* Create HBA Event Queues (EQs) */
8020 for (idx = 0; idx < io_channel; idx++) {
67d12733 8021 /* Create EQs */
da0436e9
JS
8022 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
8023 phba->sli4_hba.eq_ecount);
8024 if (!qdesc) {
8025 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS
8026 "0497 Failed allocate EQ (%d)\n", idx);
8027 goto out_error;
da0436e9 8028 }
67d12733 8029 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 8030 }
67d12733 8031
895427bd 8032 /* FCP and NVME io channels are not required to be balanced */
67d12733 8033
895427bd
JS
8034 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
8035 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 8036 goto out_error;
da0436e9 8037
895427bd
JS
8038 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
8039 if (lpfc_alloc_nvme_wq_cq(phba, idx))
8040 goto out_error;
67d12733 8041
2d7dbc4c
JS
8042 if (phba->nvmet_support) {
8043 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8044 qdesc = lpfc_sli4_queue_alloc(phba,
8045 phba->sli4_hba.cq_esize,
8046 phba->sli4_hba.cq_ecount);
8047 if (!qdesc) {
8048 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8049 "3142 Failed allocate NVME "
8050 "CQ Set (%d)\n", idx);
8051 goto out_error;
8052 }
8053 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
8054 }
8055 }
8056
da0436e9 8057 /*
67d12733 8058 * Create Slow Path Completion Queues (CQs)
da0436e9
JS
8059 */
8060
da0436e9
JS
8061 /* Create slow-path Mailbox Command Complete Queue */
8062 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8063 phba->sli4_hba.cq_ecount);
8064 if (!qdesc) {
8065 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8066 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 8067 goto out_error;
da0436e9
JS
8068 }
8069 phba->sli4_hba.mbx_cq = qdesc;
8070
8071 /* Create slow-path ELS Complete Queue */
8072 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8073 phba->sli4_hba.cq_ecount);
8074 if (!qdesc) {
8075 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8076 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 8077 goto out_error;
da0436e9
JS
8078 }
8079 phba->sli4_hba.els_cq = qdesc;
8080
da0436e9 8081
5350d872 8082 /*
67d12733 8083 * Create Slow Path Work Queues (WQs)
5350d872 8084 */
da0436e9
JS
8085
8086 /* Create Mailbox Command Queue */
da0436e9
JS
8087
8088 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.mq_esize,
8089 phba->sli4_hba.mq_ecount);
8090 if (!qdesc) {
8091 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8092 "0505 Failed allocate slow-path MQ\n");
67d12733 8093 goto out_error;
da0436e9
JS
8094 }
8095 phba->sli4_hba.mbx_wq = qdesc;
8096
8097 /*
67d12733 8098 * Create ELS Work Queues
da0436e9 8099 */
da0436e9
JS
8100
8101 /* Create slow-path ELS Work Queue */
8102 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8103 phba->sli4_hba.wq_ecount);
8104 if (!qdesc) {
8105 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8106 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8107 goto out_error;
da0436e9
JS
8108 }
8109 phba->sli4_hba.els_wq = qdesc;
895427bd
JS
8110 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8111
8112 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8113 /* Create NVME LS Complete Queue */
8114 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8115 phba->sli4_hba.cq_ecount);
8116 if (!qdesc) {
8117 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8118 "6079 Failed allocate NVME LS CQ\n");
8119 goto out_error;
8120 }
8121 phba->sli4_hba.nvmels_cq = qdesc;
8122
8123 /* Create NVME LS Work Queue */
8124 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8125 phba->sli4_hba.wq_ecount);
8126 if (!qdesc) {
8127 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8128 "6080 Failed allocate NVME LS WQ\n");
8129 goto out_error;
8130 }
8131 phba->sli4_hba.nvmels_wq = qdesc;
8132 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8133 }
da0436e9 8134
da0436e9
JS
8135 /*
8136 * Create Receive Queue (RQ)
8137 */
da0436e9
JS
8138
8139 /* Create Receive Queue for header */
8140 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8141 phba->sli4_hba.rq_ecount);
8142 if (!qdesc) {
8143 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8144 "0506 Failed allocate receive HRQ\n");
67d12733 8145 goto out_error;
da0436e9
JS
8146 }
8147 phba->sli4_hba.hdr_rq = qdesc;
8148
8149 /* Create Receive Queue for data */
8150 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8151 phba->sli4_hba.rq_ecount);
8152 if (!qdesc) {
8153 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8154 "0507 Failed allocate receive DRQ\n");
67d12733 8155 goto out_error;
da0436e9
JS
8156 }
8157 phba->sli4_hba.dat_rq = qdesc;
8158
2d7dbc4c
JS
8159 if (phba->nvmet_support) {
8160 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8161 /* Create NVMET Receive Queue for header */
8162 qdesc = lpfc_sli4_queue_alloc(phba,
8163 phba->sli4_hba.rq_esize,
61f3d4bf 8164 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS
8165 if (!qdesc) {
8166 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8167 "3146 Failed allocate "
8168 "receive HRQ\n");
8169 goto out_error;
8170 }
8171 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
8172
8173 /* Only needed for header of RQ pair */
8174 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
8175 GFP_KERNEL);
8176 if (qdesc->rqbp == NULL) {
8177 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8178 "6131 Failed allocate "
8179 "Header RQBP\n");
8180 goto out_error;
8181 }
8182
8183 /* Create NVMET Receive Queue for data */
8184 qdesc = lpfc_sli4_queue_alloc(phba,
8185 phba->sli4_hba.rq_esize,
61f3d4bf 8186 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS
8187 if (!qdesc) {
8188 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8189 "3156 Failed allocate "
8190 "receive DRQ\n");
8191 goto out_error;
8192 }
8193 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
8194 }
8195 }
8196
1ba981fd
JS
8197 /* Create the Queues needed for Flash Optimized Fabric operations */
8198 if (phba->cfg_fof)
8199 lpfc_fof_queue_create(phba);
da0436e9
JS
8200 return 0;
8201
da0436e9 8202out_error:
67d12733 8203 lpfc_sli4_queue_destroy(phba);
da0436e9
JS
8204 return -ENOMEM;
8205}
8206
895427bd
JS
8207static inline void
8208__lpfc_sli4_release_queue(struct lpfc_queue **qp)
8209{
8210 if (*qp != NULL) {
8211 lpfc_sli4_queue_free(*qp);
8212 *qp = NULL;
8213 }
8214}
8215
8216static inline void
8217lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
8218{
8219 int idx;
8220
8221 if (*qs == NULL)
8222 return;
8223
8224 for (idx = 0; idx < max; idx++)
8225 __lpfc_sli4_release_queue(&(*qs)[idx]);
8226
8227 kfree(*qs);
8228 *qs = NULL;
8229}
8230
8231static inline void
8232lpfc_sli4_release_queue_map(uint16_t **qmap)
8233{
8234 if (*qmap != NULL) {
8235 kfree(*qmap);
8236 *qmap = NULL;
8237 }
8238}
8239
da0436e9
JS
8240/**
8241 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
8242 * @phba: pointer to lpfc hba data structure.
8243 *
8244 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
8245 * operation.
8246 *
8247 * Return codes
af901ca1 8248 * 0 - successful
25985edc 8249 * -ENOMEM - No available memory
d439d286 8250 * -EIO - The mailbox failed to complete successfully.
da0436e9 8251 **/
5350d872 8252void
da0436e9
JS
8253lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
8254{
1ba981fd
JS
8255 if (phba->cfg_fof)
8256 lpfc_fof_queue_destroy(phba);
8257
895427bd
JS
8258 /* Release HBA eqs */
8259 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
8260
8261 /* Release FCP cqs */
8262 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
d1f525aa 8263 phba->cfg_fcp_io_channel);
895427bd
JS
8264
8265 /* Release FCP wqs */
8266 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
d1f525aa 8267 phba->cfg_fcp_io_channel);
895427bd
JS
8268
8269 /* Release FCP CQ mapping array */
8270 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
8271
8272 /* Release NVME cqs */
8273 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
8274 phba->cfg_nvme_io_channel);
8275
8276 /* Release NVME wqs */
8277 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
8278 phba->cfg_nvme_io_channel);
8279
8280 /* Release NVME CQ mapping array */
8281 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
8282
2d7dbc4c
JS
8283 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
8284 phba->cfg_nvmet_mrq);
8285
8286 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
8287 phba->cfg_nvmet_mrq);
8288 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
8289 phba->cfg_nvmet_mrq);
8290
895427bd
JS
8291 /* Release mailbox command work queue */
8292 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
8293
8294 /* Release ELS work queue */
8295 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
8296
8297 /* Release ELS work queue */
8298 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
8299
8300 /* Release unsolicited receive queue */
8301 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
8302 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
8303
8304 /* Release ELS complete queue */
8305 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
8306
8307 /* Release NVME LS complete queue */
8308 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
8309
8310 /* Release mailbox command complete queue */
8311 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
8312
8313 /* Everything on this list has been freed */
8314 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8315}
8316
895427bd
JS
8317int
8318lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
8319{
8320 struct lpfc_rqb *rqbp;
8321 struct lpfc_dmabuf *h_buf;
8322 struct rqb_dmabuf *rqb_buffer;
8323
8324 rqbp = rq->rqbp;
8325 while (!list_empty(&rqbp->rqb_buffer_list)) {
8326 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
8327 struct lpfc_dmabuf, list);
8328
8329 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
8330 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8331 rqbp->buffer_count--;
67d12733 8332 }
895427bd
JS
8333 return 1;
8334}
67d12733 8335
895427bd
JS
8336static int
8337lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
8338 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
8339 int qidx, uint32_t qtype)
8340{
8341 struct lpfc_sli_ring *pring;
8342 int rc;
8343
8344 if (!eq || !cq || !wq) {
8345 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8346 "6085 Fast-path %s (%d) not allocated\n",
8347 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
8348 return -ENOMEM;
8349 }
8350
8351 /* create the Cq first */
8352 rc = lpfc_cq_create(phba, cq, eq,
8353 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
8354 if (rc) {
8355 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8356 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
8357 qidx, (uint32_t)rc);
8358 return rc;
67d12733
JS
8359 }
8360
895427bd
JS
8361 if (qtype != LPFC_MBOX) {
8362 /* Setup nvme_cq_map for fast lookup */
8363 if (cq_map)
8364 *cq_map = cq->queue_id;
da0436e9 8365
895427bd
JS
8366 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8367 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8368 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8369
895427bd
JS
8370 /* create the wq */
8371 rc = lpfc_wq_create(phba, wq, cq, qtype);
8372 if (rc) {
8373 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8374 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8375 qidx, (uint32_t)rc);
8376 /* no need to tear down cq - caller will do so */
8377 return rc;
8378 }
da0436e9 8379
895427bd
JS
8380 /* Bind this CQ/WQ to the NVME ring */
8381 pring = wq->pring;
8382 pring->sli.sli4.wqp = (void *)wq;
8383 cq->pring = pring;
da0436e9 8384
895427bd
JS
8385 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8386 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8387 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8388 } else {
8389 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8390 if (rc) {
8391 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8392 "0539 Failed setup of slow-path MQ: "
8393 "rc = 0x%x\n", rc);
8394 /* no need to tear down cq - caller will do so */
8395 return rc;
8396 }
da0436e9 8397
895427bd
JS
8398 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8399 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8400 phba->sli4_hba.mbx_wq->queue_id,
8401 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8402 }
da0436e9 8403
895427bd 8404 return 0;
da0436e9
JS
8405}
8406
8407/**
8408 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8409 * @phba: pointer to lpfc hba data structure.
8410 *
8411 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8412 * operation.
8413 *
8414 * Return codes
af901ca1 8415 * 0 - successful
25985edc 8416 * -ENOMEM - No available memory
d439d286 8417 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8418 **/
8419int
8420lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8421{
962bc51b
JS
8422 uint32_t shdr_status, shdr_add_status;
8423 union lpfc_sli4_cfg_shdr *shdr;
8424 LPFC_MBOXQ_t *mboxq;
895427bd
JS
8425 int qidx;
8426 uint32_t length, io_channel;
8427 int rc = -ENOMEM;
962bc51b
JS
8428
8429 /* Check for dual-ULP support */
8430 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8431 if (!mboxq) {
8432 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8433 "3249 Unable to allocate memory for "
8434 "QUERY_FW_CFG mailbox command\n");
8435 return -ENOMEM;
8436 }
8437 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8438 sizeof(struct lpfc_sli4_cfg_mhdr));
8439 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8440 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8441 length, LPFC_SLI4_MBX_EMBED);
8442
8443 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8444
8445 shdr = (union lpfc_sli4_cfg_shdr *)
8446 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8447 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8448 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8449 if (shdr_status || shdr_add_status || rc) {
8450 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8451 "3250 QUERY_FW_CFG mailbox failed with status "
8452 "x%x add_status x%x, mbx status x%x\n",
8453 shdr_status, shdr_add_status, rc);
8454 if (rc != MBX_TIMEOUT)
8455 mempool_free(mboxq, phba->mbox_mem_pool);
8456 rc = -ENXIO;
8457 goto out_error;
8458 }
8459
8460 phba->sli4_hba.fw_func_mode =
8461 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8462 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8463 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS
8464 phba->sli4_hba.physical_port =
8465 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS
8466 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8467 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8468 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8469 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8470
8471 if (rc != MBX_TIMEOUT)
8472 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS
8473
8474 /*
67d12733 8475 * Set up HBA Event Queues (EQs)
da0436e9 8476 */
895427bd 8477 io_channel = phba->io_channel_irqs;
da0436e9 8478
67d12733 8479 /* Set up HBA event queue */
895427bd 8480 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS
8481 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8482 "3147 Fast-path EQs not allocated\n");
1b51197d 8483 rc = -ENOMEM;
67d12733 8484 goto out_error;
2e90f4b5 8485 }
895427bd
JS
8486 for (qidx = 0; qidx < io_channel; qidx++) {
8487 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS
8488 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8489 "0522 Fast-path EQ (%d) not "
895427bd 8490 "allocated\n", qidx);
1b51197d 8491 rc = -ENOMEM;
895427bd 8492 goto out_destroy;
da0436e9 8493 }
895427bd
JS
8494 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8495 phba->cfg_fcp_imax);
da0436e9
JS
8496 if (rc) {
8497 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8498 "0523 Failed setup of fast-path EQ "
895427bd 8499 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8500 (uint32_t)rc);
895427bd 8501 goto out_destroy;
da0436e9
JS
8502 }
8503 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS
8504 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8505 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS
8506 }
8507
895427bd
JS
8508 if (phba->cfg_nvme_io_channel) {
8509 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8510 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8511 "6084 Fast-path NVME %s array not allocated\n",
8512 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8513 rc = -ENOMEM;
895427bd 8514 goto out_destroy;
67d12733
JS
8515 }
8516
895427bd
JS
8517 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8518 rc = lpfc_create_wq_cq(phba,
8519 phba->sli4_hba.hba_eq[
8520 qidx % io_channel],
8521 phba->sli4_hba.nvme_cq[qidx],
8522 phba->sli4_hba.nvme_wq[qidx],
8523 &phba->sli4_hba.nvme_cq_map[qidx],
8524 qidx, LPFC_NVME);
8525 if (rc) {
8526 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8527 "6123 Failed to setup fastpath "
8528 "NVME WQ/CQ (%d), rc = 0x%x\n",
8529 qidx, (uint32_t)rc);
8530 goto out_destroy;
8531 }
8532 }
67d12733
JS
8533 }
8534
895427bd
JS
8535 if (phba->cfg_fcp_io_channel) {
8536 /* Set up fast-path FCP Response Complete Queue */
8537 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8538 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8539 "3148 Fast-path FCP %s array not allocated\n",
8540 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8541 rc = -ENOMEM;
895427bd 8542 goto out_destroy;
67d12733
JS
8543 }
8544
895427bd
JS
8545 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8546 rc = lpfc_create_wq_cq(phba,
8547 phba->sli4_hba.hba_eq[
8548 qidx % io_channel],
8549 phba->sli4_hba.fcp_cq[qidx],
8550 phba->sli4_hba.fcp_wq[qidx],
8551 &phba->sli4_hba.fcp_cq_map[qidx],
8552 qidx, LPFC_FCP);
8553 if (rc) {
8554 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8555 "0535 Failed to setup fastpath "
8556 "FCP WQ/CQ (%d), rc = 0x%x\n",
8557 qidx, (uint32_t)rc);
8558 goto out_destroy;
8559 }
8560 }
67d12733 8561 }
895427bd 8562
da0436e9 8563 /*
895427bd 8564 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS
8565 */
8566
895427bd 8567 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8568
895427bd 8569 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8570 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8571 "0528 %s not allocated\n",
8572 phba->sli4_hba.mbx_cq ?
d1f525aa 8573 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8574 rc = -ENOMEM;
895427bd 8575 goto out_destroy;
da0436e9 8576 }
da0436e9 8577
895427bd 8578 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
d1f525aa
JS
8579 phba->sli4_hba.mbx_cq,
8580 phba->sli4_hba.mbx_wq,
8581 NULL, 0, LPFC_MBOX);
da0436e9
JS
8582 if (rc) {
8583 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8584 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8585 (uint32_t)rc);
8586 goto out_destroy;
da0436e9 8587 }
2d7dbc4c
JS
8588 if (phba->nvmet_support) {
8589 if (!phba->sli4_hba.nvmet_cqset) {
8590 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8591 "3165 Fast-path NVME CQ Set "
8592 "array not allocated\n");
8593 rc = -ENOMEM;
8594 goto out_destroy;
8595 }
8596 if (phba->cfg_nvmet_mrq > 1) {
8597 rc = lpfc_cq_create_set(phba,
8598 phba->sli4_hba.nvmet_cqset,
8599 phba->sli4_hba.hba_eq,
8600 LPFC_WCQ, LPFC_NVMET);
8601 if (rc) {
8602 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8603 "3164 Failed setup of NVME CQ "
8604 "Set, rc = 0x%x\n",
8605 (uint32_t)rc);
8606 goto out_destroy;
8607 }
8608 } else {
8609 /* Set up NVMET Receive Complete Queue */
8610 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
8611 phba->sli4_hba.hba_eq[0],
8612 LPFC_WCQ, LPFC_NVMET);
8613 if (rc) {
8614 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8615 "6089 Failed setup NVMET CQ: "
8616 "rc = 0x%x\n", (uint32_t)rc);
8617 goto out_destroy;
8618 }
8619 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8620 "6090 NVMET CQ setup: cq-id=%d, "
8621 "parent eq-id=%d\n",
8622 phba->sli4_hba.nvmet_cqset[0]->queue_id,
8623 phba->sli4_hba.hba_eq[0]->queue_id);
8624 }
8625 }
da0436e9 8626
895427bd
JS
8627 /* Set up slow-path ELS WQ/CQ */
8628 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8629 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8630 "0530 ELS %s not allocated\n",
8631 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8632 rc = -ENOMEM;
895427bd 8633 goto out_destroy;
da0436e9 8634 }
895427bd
JS
8635 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8636 phba->sli4_hba.els_cq,
8637 phba->sli4_hba.els_wq,
8638 NULL, 0, LPFC_ELS);
da0436e9
JS
8639 if (rc) {
8640 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8641 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8642 (uint32_t)rc);
8643 goto out_destroy;
da0436e9
JS
8644 }
8645 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8646 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8647 phba->sli4_hba.els_wq->queue_id,
8648 phba->sli4_hba.els_cq->queue_id);
8649
895427bd
JS
8650 if (phba->cfg_nvme_io_channel) {
8651 /* Set up NVME LS Complete Queue */
8652 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8653 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8654 "6091 LS %s not allocated\n",
8655 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8656 rc = -ENOMEM;
8657 goto out_destroy;
8658 }
8659 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8660 phba->sli4_hba.nvmels_cq,
8661 phba->sli4_hba.nvmels_wq,
8662 NULL, 0, LPFC_NVME_LS);
8663 if (rc) {
8664 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8665 "0529 Failed setup of NVVME LS WQ/CQ: "
8666 "rc = 0x%x\n", (uint32_t)rc);
8667 goto out_destroy;
8668 }
8669
8670 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8671 "6096 ELS WQ setup: wq-id=%d, "
8672 "parent cq-id=%d\n",
8673 phba->sli4_hba.nvmels_wq->queue_id,
8674 phba->sli4_hba.nvmels_cq->queue_id);
8675 }
8676
2d7dbc4c
JS
8677 /*
8678 * Create NVMET Receive Queue (RQ)
8679 */
8680 if (phba->nvmet_support) {
8681 if ((!phba->sli4_hba.nvmet_cqset) ||
8682 (!phba->sli4_hba.nvmet_mrq_hdr) ||
8683 (!phba->sli4_hba.nvmet_mrq_data)) {
8684 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8685 "6130 MRQ CQ Queues not "
8686 "allocated\n");
8687 rc = -ENOMEM;
8688 goto out_destroy;
8689 }
8690 if (phba->cfg_nvmet_mrq > 1) {
8691 rc = lpfc_mrq_create(phba,
8692 phba->sli4_hba.nvmet_mrq_hdr,
8693 phba->sli4_hba.nvmet_mrq_data,
8694 phba->sli4_hba.nvmet_cqset,
8695 LPFC_NVMET);
8696 if (rc) {
8697 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8698 "6098 Failed setup of NVMET "
8699 "MRQ: rc = 0x%x\n",
8700 (uint32_t)rc);
8701 goto out_destroy;
8702 }
8703
8704 } else {
8705 rc = lpfc_rq_create(phba,
8706 phba->sli4_hba.nvmet_mrq_hdr[0],
8707 phba->sli4_hba.nvmet_mrq_data[0],
8708 phba->sli4_hba.nvmet_cqset[0],
8709 LPFC_NVMET);
8710 if (rc) {
8711 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8712 "6057 Failed setup of NVMET "
8713 "Receive Queue: rc = 0x%x\n",
8714 (uint32_t)rc);
8715 goto out_destroy;
8716 }
8717
8718 lpfc_printf_log(
8719 phba, KERN_INFO, LOG_INIT,
8720 "6099 NVMET RQ setup: hdr-rq-id=%d, "
8721 "dat-rq-id=%d parent cq-id=%d\n",
8722 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
8723 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
8724 phba->sli4_hba.nvmet_cqset[0]->queue_id);
8725
8726 }
8727 }
8728
da0436e9
JS
8729 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8730 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8731 "0540 Receive Queue not allocated\n");
1b51197d 8732 rc = -ENOMEM;
895427bd 8733 goto out_destroy;
da0436e9 8734 }
73d91e50 8735
da0436e9 8736 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8737 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS
8738 if (rc) {
8739 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8740 "0541 Failed setup of Receive Queue: "
a2fc4aef 8741 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8742 goto out_destroy;
da0436e9 8743 }
73d91e50 8744
da0436e9
JS
8745 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8746 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8747 "parent cq-id=%d\n",
8748 phba->sli4_hba.hdr_rq->queue_id,
8749 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8750 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS
8751
8752 if (phba->cfg_fof) {
8753 rc = lpfc_fof_queue_setup(phba);
8754 if (rc) {
8755 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8756 "0549 Failed setup of FOF Queues: "
8757 "rc = 0x%x\n", rc);
895427bd 8758 goto out_destroy;
1ba981fd
JS
8759 }
8760 }
2c9c5a00 8761
43140ca6 8762 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
895427bd 8763 lpfc_modify_hba_eq_delay(phba, qidx);
43140ca6 8764
da0436e9
JS
8765 return 0;
8766
895427bd
JS
8767out_destroy:
8768 lpfc_sli4_queue_unset(phba);
da0436e9
JS
8769out_error:
8770 return rc;
8771}
8772
8773/**
8774 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8775 * @phba: pointer to lpfc hba data structure.
8776 *
8777 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8778 * operation.
8779 *
8780 * Return codes
af901ca1 8781 * 0 - successful
25985edc 8782 * -ENOMEM - No available memory
d439d286 8783 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8784 **/
8785void
8786lpfc_sli4_queue_unset(struct lpfc_hba *phba)
8787{
895427bd 8788 int qidx;
da0436e9 8789
1ba981fd
JS
8790 /* Unset the queues created for Flash Optimized Fabric operations */
8791 if (phba->cfg_fof)
8792 lpfc_fof_queue_destroy(phba);
895427bd 8793
da0436e9 8794 /* Unset mailbox command work queue */
895427bd
JS
8795 if (phba->sli4_hba.mbx_wq)
8796 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
8797
8798 /* Unset NVME LS work queue */
8799 if (phba->sli4_hba.nvmels_wq)
8800 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
8801
da0436e9 8802 /* Unset ELS work queue */
019c0d66 8803 if (phba->sli4_hba.els_wq)
895427bd
JS
8804 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
8805
da0436e9 8806 /* Unset unsolicited receive queue */
895427bd
JS
8807 if (phba->sli4_hba.hdr_rq)
8808 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
8809 phba->sli4_hba.dat_rq);
8810
da0436e9 8811 /* Unset FCP work queue */
895427bd
JS
8812 if (phba->sli4_hba.fcp_wq)
8813 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8814 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
8815
8816 /* Unset NVME work queue */
8817 if (phba->sli4_hba.nvme_wq) {
8818 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8819 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 8820 }
895427bd 8821
da0436e9 8822 /* Unset mailbox command complete queue */
895427bd
JS
8823 if (phba->sli4_hba.mbx_cq)
8824 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
8825
da0436e9 8826 /* Unset ELS complete queue */
895427bd
JS
8827 if (phba->sli4_hba.els_cq)
8828 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
8829
8830 /* Unset NVME LS complete queue */
8831 if (phba->sli4_hba.nvmels_cq)
8832 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
8833
8834 /* Unset NVME response complete queue */
8835 if (phba->sli4_hba.nvme_cq)
8836 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8837 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
8838
2d7dbc4c
JS
8839 /* Unset NVMET MRQ queue */
8840 if (phba->sli4_hba.nvmet_mrq_hdr) {
8841 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8842 lpfc_rq_destroy(phba,
8843 phba->sli4_hba.nvmet_mrq_hdr[qidx],
8844 phba->sli4_hba.nvmet_mrq_data[qidx]);
8845 }
8846
8847 /* Unset NVMET CQ Set complete queue */
8848 if (phba->sli4_hba.nvmet_cqset) {
8849 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8850 lpfc_cq_destroy(phba,
8851 phba->sli4_hba.nvmet_cqset[qidx]);
8852 }
8853
da0436e9 8854 /* Unset FCP response complete queue */
895427bd
JS
8855 if (phba->sli4_hba.fcp_cq)
8856 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8857 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
8858
da0436e9 8859 /* Unset fast-path event queue */
895427bd
JS
8860 if (phba->sli4_hba.hba_eq)
8861 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
8862 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS
8863}
8864
8865/**
8866 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
8867 * @phba: pointer to lpfc hba data structure.
8868 *
8869 * This routine is invoked to allocate and set up a pool of completion queue
8870 * events. The body of the completion queue event is a completion queue entry
8871 * CQE. For now, this pool is used for the interrupt service routine to queue
8872 * the following HBA completion queue events for the worker thread to process:
8873 * - Mailbox asynchronous events
8874 * - Receive queue completion unsolicited events
8875 * Later, this can be used for all the slow-path events.
8876 *
8877 * Return codes
af901ca1 8878 * 0 - successful
25985edc 8879 * -ENOMEM - No available memory
da0436e9
JS
8880 **/
8881static int
8882lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
8883{
8884 struct lpfc_cq_event *cq_event;
8885 int i;
8886
8887 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
8888 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
8889 if (!cq_event)
8890 goto out_pool_create_fail;
8891 list_add_tail(&cq_event->list,
8892 &phba->sli4_hba.sp_cqe_event_pool);
8893 }
8894 return 0;
8895
8896out_pool_create_fail:
8897 lpfc_sli4_cq_event_pool_destroy(phba);
8898 return -ENOMEM;
8899}
8900
8901/**
8902 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
8903 * @phba: pointer to lpfc hba data structure.
8904 *
8905 * This routine is invoked to free the pool of completion queue events at
8906 * driver unload time. Note that, it is the responsibility of the driver
8907 * cleanup routine to free all the outstanding completion-queue events
8908 * allocated from this pool back into the pool before invoking this routine
8909 * to destroy the pool.
8910 **/
8911static void
8912lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
8913{
8914 struct lpfc_cq_event *cq_event, *next_cq_event;
8915
8916 list_for_each_entry_safe(cq_event, next_cq_event,
8917 &phba->sli4_hba.sp_cqe_event_pool, list) {
8918 list_del(&cq_event->list);
8919 kfree(cq_event);
8920 }
8921}
8922
8923/**
8924 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
8925 * @phba: pointer to lpfc hba data structure.
8926 *
8927 * This routine is the lock free version of the API invoked to allocate a
8928 * completion-queue event from the free pool.
8929 *
8930 * Return: Pointer to the newly allocated completion-queue event if successful
8931 * NULL otherwise.
8932 **/
8933struct lpfc_cq_event *
8934__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8935{
8936 struct lpfc_cq_event *cq_event = NULL;
8937
8938 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
8939 struct lpfc_cq_event, list);
8940 return cq_event;
8941}
8942
8943/**
8944 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
8945 * @phba: pointer to lpfc hba data structure.
8946 *
8947 * This routine is the lock version of the API invoked to allocate a
8948 * completion-queue event from the free pool.
8949 *
8950 * Return: Pointer to the newly allocated completion-queue event if successful
8951 * NULL otherwise.
8952 **/
8953struct lpfc_cq_event *
8954lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8955{
8956 struct lpfc_cq_event *cq_event;
8957 unsigned long iflags;
8958
8959 spin_lock_irqsave(&phba->hbalock, iflags);
8960 cq_event = __lpfc_sli4_cq_event_alloc(phba);
8961 spin_unlock_irqrestore(&phba->hbalock, iflags);
8962 return cq_event;
8963}
8964
8965/**
8966 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
8967 * @phba: pointer to lpfc hba data structure.
8968 * @cq_event: pointer to the completion queue event to be freed.
8969 *
8970 * This routine is the lock free version of the API invoked to release a
8971 * completion-queue event back into the free pool.
8972 **/
8973void
8974__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8975 struct lpfc_cq_event *cq_event)
8976{
8977 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
8978}
8979
8980/**
8981 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
8982 * @phba: pointer to lpfc hba data structure.
8983 * @cq_event: pointer to the completion queue event to be freed.
8984 *
8985 * This routine is the lock version of the API invoked to release a
8986 * completion-queue event back into the free pool.
8987 **/
8988void
8989lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8990 struct lpfc_cq_event *cq_event)
8991{
8992 unsigned long iflags;
8993 spin_lock_irqsave(&phba->hbalock, iflags);
8994 __lpfc_sli4_cq_event_release(phba, cq_event);
8995 spin_unlock_irqrestore(&phba->hbalock, iflags);
8996}
8997
8998/**
8999 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9000 * @phba: pointer to lpfc hba data structure.
9001 *
9002 * This routine is to free all the pending completion-queue events to the
9003 * back into the free pool for device reset.
9004 **/
9005static void
9006lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9007{
9008 LIST_HEAD(cqelist);
9009 struct lpfc_cq_event *cqe;
9010 unsigned long iflags;
9011
9012 /* Retrieve all the pending WCQEs from pending WCQE lists */
9013 spin_lock_irqsave(&phba->hbalock, iflags);
9014 /* Pending FCP XRI abort events */
9015 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9016 &cqelist);
9017 /* Pending ELS XRI abort events */
9018 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9019 &cqelist);
318083ad
JS
9020 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
9021 /* Pending NVME XRI abort events */
9022 list_splice_init(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue,
9023 &cqelist);
9024 }
da0436e9
JS
9025 /* Pending asynnc events */
9026 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9027 &cqelist);
9028 spin_unlock_irqrestore(&phba->hbalock, iflags);
9029
9030 while (!list_empty(&cqelist)) {
9031 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9032 lpfc_sli4_cq_event_release(phba, cqe);
9033 }
9034}
9035
9036/**
9037 * lpfc_pci_function_reset - Reset pci function.
9038 * @phba: pointer to lpfc hba data structure.
9039 *
9040 * This routine is invoked to request a PCI function reset. It will destroys
9041 * all resources assigned to the PCI function which originates this request.
9042 *
9043 * Return codes
af901ca1 9044 * 0 - successful
25985edc 9045 * -ENOMEM - No available memory
d439d286 9046 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
9047 **/
9048int
9049lpfc_pci_function_reset(struct lpfc_hba *phba)
9050{
9051 LPFC_MBOXQ_t *mboxq;
2fcee4bf 9052 uint32_t rc = 0, if_type;
da0436e9 9053 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS
9054 uint32_t rdy_chk;
9055 uint32_t port_reset = 0;
da0436e9 9056 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9057 struct lpfc_register reg_data;
2b81f942 9058 uint16_t devid;
da0436e9 9059
2fcee4bf
JS
9060 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9061 switch (if_type) {
9062 case LPFC_SLI_INTF_IF_TYPE_0:
9063 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9064 GFP_KERNEL);
9065 if (!mboxq) {
9066 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9067 "0494 Unable to allocate memory for "
9068 "issuing SLI_FUNCTION_RESET mailbox "
9069 "command\n");
9070 return -ENOMEM;
9071 }
da0436e9 9072
2fcee4bf
JS
9073 /* Setup PCI function reset mailbox-ioctl command */
9074 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9075 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9076 LPFC_SLI4_MBX_EMBED);
9077 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9078 shdr = (union lpfc_sli4_cfg_shdr *)
9079 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9080 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9081 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9082 &shdr->response);
9083 if (rc != MBX_TIMEOUT)
9084 mempool_free(mboxq, phba->mbox_mem_pool);
9085 if (shdr_status || shdr_add_status || rc) {
9086 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9087 "0495 SLI_FUNCTION_RESET mailbox "
9088 "failed with status x%x add_status x%x,"
9089 " mbx status x%x\n",
9090 shdr_status, shdr_add_status, rc);
9091 rc = -ENXIO;
9092 }
9093 break;
9094 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS
9095wait:
9096 /*
9097 * Poll the Port Status Register and wait for RDY for
9098 * up to 30 seconds. If the port doesn't respond, treat
9099 * it as an error.
9100 */
77d093fb 9101 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS
9102 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9103 STATUSregaddr, &reg_data.word0)) {
9104 rc = -ENODEV;
9105 goto out;
9106 }
9107 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9108 break;
9109 msleep(20);
9110 }
9111
9112 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9113 phba->work_status[0] = readl(
9114 phba->sli4_hba.u.if_type2.ERR1regaddr);
9115 phba->work_status[1] = readl(
9116 phba->sli4_hba.u.if_type2.ERR2regaddr);
9117 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9118 "2890 Port not ready, port status reg "
9119 "0x%x error 1=0x%x, error 2=0x%x\n",
9120 reg_data.word0,
9121 phba->work_status[0],
9122 phba->work_status[1]);
9123 rc = -ENODEV;
9124 goto out;
9125 }
9126
9127 if (!port_reset) {
9128 /*
9129 * Reset the port now
9130 */
2fcee4bf
JS
9131 reg_data.word0 = 0;
9132 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9133 LPFC_SLIPORT_LITTLE_ENDIAN);
9134 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9135 LPFC_SLIPORT_INIT_PORT);
9136 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
9137 CTRLregaddr);
8fcb8acd 9138 /* flush */
2b81f942
JS
9139 pci_read_config_word(phba->pcidev,
9140 PCI_DEVICE_ID, &devid);
2fcee4bf 9141
2f6fa2c9
JS
9142 port_reset = 1;
9143 msleep(20);
9144 goto wait;
9145 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
9146 rc = -ENODEV;
9147 goto out;
2fcee4bf
JS
9148 }
9149 break;
2f6fa2c9 9150
2fcee4bf
JS
9151 case LPFC_SLI_INTF_IF_TYPE_1:
9152 default:
9153 break;
da0436e9 9154 }
2fcee4bf 9155
73d91e50 9156out:
2fcee4bf 9157 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 9158 if (rc) {
229adb0e
JS
9159 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9160 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 9161 "try: echo fw_reset > board_mode\n");
2fcee4bf 9162 rc = -ENODEV;
229adb0e 9163 }
2fcee4bf 9164
da0436e9
JS
9165 return rc;
9166}
9167
da0436e9
JS
9168/**
9169 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
9170 * @phba: pointer to lpfc hba data structure.
9171 *
9172 * This routine is invoked to set up the PCI device memory space for device
9173 * with SLI-4 interface spec.
9174 *
9175 * Return codes
af901ca1 9176 * 0 - successful
da0436e9
JS
9177 * other values - error
9178 **/
9179static int
9180lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
9181{
9182 struct pci_dev *pdev;
9183 unsigned long bar0map_len, bar1map_len, bar2map_len;
9184 int error = -ENODEV;
2fcee4bf 9185 uint32_t if_type;
da0436e9
JS
9186
9187 /* Obtain PCI device reference */
9188 if (!phba->pcidev)
9189 return error;
9190 else
9191 pdev = phba->pcidev;
9192
9193 /* Set the device DMA mask size */
8e68597d
MR
9194 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
9195 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
9196 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
9197 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 9198 return error;
8e68597d
MR
9199 }
9200 }
da0436e9 9201
2fcee4bf
JS
9202 /*
9203 * The BARs and register set definitions and offset locations are
9204 * dependent on the if_type.
9205 */
9206 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
9207 &phba->sli4_hba.sli_intf.word0)) {
9208 return error;
9209 }
9210
9211 /* There is no SLI3 failback for SLI4 devices. */
9212 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
9213 LPFC_SLI_INTF_VALID) {
9214 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9215 "2894 SLI_INTF reg contents invalid "
9216 "sli_intf reg 0x%x\n",
9217 phba->sli4_hba.sli_intf.word0);
9218 return error;
9219 }
9220
9221 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9222 /*
9223 * Get the bus address of SLI4 device Bar regions and the
9224 * number of bytes required by each mapping. The mapping of the
9225 * particular PCI BARs regions is dependent on the type of
9226 * SLI4 device.
da0436e9 9227 */
f5ca6f2e
JS
9228 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
9229 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
9230 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS
9231
9232 /*
9233 * Map SLI4 PCI Config Space Register base to a kernel virtual
9234 * addr
9235 */
9236 phba->sli4_hba.conf_regs_memmap_p =
9237 ioremap(phba->pci_bar0_map, bar0map_len);
9238 if (!phba->sli4_hba.conf_regs_memmap_p) {
9239 dev_printk(KERN_ERR, &pdev->dev,
9240 "ioremap failed for SLI4 PCI config "
9241 "registers.\n");
9242 goto out;
9243 }
f5ca6f2e 9244 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS
9245 /* Set up BAR0 PCI config space register memory map */
9246 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS
9247 } else {
9248 phba->pci_bar0_map = pci_resource_start(pdev, 1);
9249 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS
9250 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
9251 dev_printk(KERN_ERR, &pdev->dev,
9252 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
9253 goto out;
9254 }
9255 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 9256 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS
9257 if (!phba->sli4_hba.conf_regs_memmap_p) {
9258 dev_printk(KERN_ERR, &pdev->dev,
9259 "ioremap failed for SLI4 PCI config "
9260 "registers.\n");
9261 goto out;
9262 }
9263 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS
9264 }
9265
c31098ce 9266 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9267 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
2fcee4bf
JS
9268 /*
9269 * Map SLI4 if type 0 HBA Control Register base to a kernel
9270 * virtual address and setup the registers.
9271 */
f5ca6f2e
JS
9272 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
9273 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
2fcee4bf 9274 phba->sli4_hba.ctrl_regs_memmap_p =
da0436e9 9275 ioremap(phba->pci_bar1_map, bar1map_len);
2fcee4bf
JS
9276 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
9277 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9278 "ioremap failed for SLI4 HBA control registers.\n");
2fcee4bf
JS
9279 goto out_iounmap_conf;
9280 }
f5ca6f2e 9281 phba->pci_bar2_memmap_p = phba->sli4_hba.ctrl_regs_memmap_p;
2fcee4bf 9282 lpfc_sli4_bar1_register_memmap(phba);
da0436e9
JS
9283 }
9284
c31098ce 9285 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9286 (pci_resource_start(pdev, PCI_64BIT_BAR4))) {
2fcee4bf
JS
9287 /*
9288 * Map SLI4 if type 0 HBA Doorbell Register base to a kernel
9289 * virtual address and setup the registers.
9290 */
f5ca6f2e
JS
9291 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
9292 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
2fcee4bf 9293 phba->sli4_hba.drbl_regs_memmap_p =
da0436e9 9294 ioremap(phba->pci_bar2_map, bar2map_len);
2fcee4bf
JS
9295 if (!phba->sli4_hba.drbl_regs_memmap_p) {
9296 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9297 "ioremap failed for SLI4 HBA doorbell registers.\n");
2fcee4bf
JS
9298 goto out_iounmap_ctrl;
9299 }
f5ca6f2e 9300 phba->pci_bar4_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
2fcee4bf
JS
9301 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
9302 if (error)
9303 goto out_iounmap_all;
da0436e9
JS
9304 }
9305
da0436e9
JS
9306 return 0;
9307
9308out_iounmap_all:
9309 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9310out_iounmap_ctrl:
9311 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9312out_iounmap_conf:
9313 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9314out:
9315 return error;
9316}
9317
9318/**
9319 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
9320 * @phba: pointer to lpfc hba data structure.
9321 *
9322 * This routine is invoked to unset the PCI device memory space for device
9323 * with SLI-4 interface spec.
9324 **/
9325static void
9326lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
9327{
2e90f4b5
JS
9328 uint32_t if_type;
9329 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 9330
2e90f4b5
JS
9331 switch (if_type) {
9332 case LPFC_SLI_INTF_IF_TYPE_0:
9333 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9334 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9335 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9336 break;
9337 case LPFC_SLI_INTF_IF_TYPE_2:
9338 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9339 break;
9340 case LPFC_SLI_INTF_IF_TYPE_1:
9341 default:
9342 dev_printk(KERN_ERR, &phba->pcidev->dev,
9343 "FATAL - unsupported SLI4 interface type - %d\n",
9344 if_type);
9345 break;
9346 }
da0436e9
JS
9347}
9348
9349/**
9350 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
9351 * @phba: pointer to lpfc hba data structure.
9352 *
9353 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9354 * with SLI-3 interface specs.
da0436e9
JS
9355 *
9356 * Return codes
af901ca1 9357 * 0 - successful
da0436e9
JS
9358 * other values - error
9359 **/
9360static int
9361lpfc_sli_enable_msix(struct lpfc_hba *phba)
9362{
45ffac19 9363 int rc;
da0436e9
JS
9364 LPFC_MBOXQ_t *pmb;
9365
9366 /* Set up MSI-X multi-message vectors */
45ffac19
CH
9367 rc = pci_alloc_irq_vectors(phba->pcidev,
9368 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
9369 if (rc < 0) {
da0436e9
JS
9370 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9371 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9372 goto vec_fail_out;
da0436e9 9373 }
45ffac19 9374
da0436e9
JS
9375 /*
9376 * Assign MSI-X vectors to interrupt handlers
9377 */
9378
9379 /* vector-0 is associated to slow-path handler */
45ffac19 9380 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 9381 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS
9382 LPFC_SP_DRIVER_HANDLER_NAME, phba);
9383 if (rc) {
9384 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9385 "0421 MSI-X slow-path request_irq failed "
9386 "(%d)\n", rc);
9387 goto msi_fail_out;
9388 }
9389
9390 /* vector-1 is associated to fast-path handler */
45ffac19 9391 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 9392 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS
9393 LPFC_FP_DRIVER_HANDLER_NAME, phba);
9394
9395 if (rc) {
9396 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9397 "0429 MSI-X fast-path request_irq failed "
9398 "(%d)\n", rc);
9399 goto irq_fail_out;
9400 }
9401
9402 /*
9403 * Configure HBA MSI-X attention conditions to messages
9404 */
9405 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9406
9407 if (!pmb) {
9408 rc = -ENOMEM;
9409 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9410 "0474 Unable to allocate memory for issuing "
9411 "MBOX_CONFIG_MSI command\n");
9412 goto mem_fail_out;
9413 }
9414 rc = lpfc_config_msi(phba, pmb);
9415 if (rc)
9416 goto mbx_fail_out;
9417 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9418 if (rc != MBX_SUCCESS) {
9419 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
9420 "0351 Config MSI mailbox command failed, "
9421 "mbxCmd x%x, mbxStatus x%x\n",
9422 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
9423 goto mbx_fail_out;
9424 }
9425
9426 /* Free memory allocated for mailbox command */
9427 mempool_free(pmb, phba->mbox_mem_pool);
9428 return rc;
9429
9430mbx_fail_out:
9431 /* Free memory allocated for mailbox command */
9432 mempool_free(pmb, phba->mbox_mem_pool);
9433
9434mem_fail_out:
9435 /* free the irq already requested */
45ffac19 9436 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS
9437
9438irq_fail_out:
9439 /* free the irq already requested */
45ffac19 9440 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS
9441
9442msi_fail_out:
9443 /* Unconfigure MSI-X capability structure */
45ffac19 9444 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9445
9446vec_fail_out:
da0436e9
JS
9447 return rc;
9448}
9449
da0436e9
JS
9450/**
9451 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
9452 * @phba: pointer to lpfc hba data structure.
9453 *
9454 * This routine is invoked to enable the MSI interrupt mode to device with
9455 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
9456 * enable the MSI vector. The device driver is responsible for calling the
9457 * request_irq() to register MSI vector with a interrupt the handler, which
9458 * is done in this function.
9459 *
9460 * Return codes
af901ca1 9461 * 0 - successful
da0436e9
JS
9462 * other values - error
9463 */
9464static int
9465lpfc_sli_enable_msi(struct lpfc_hba *phba)
9466{
9467 int rc;
9468
9469 rc = pci_enable_msi(phba->pcidev);
9470 if (!rc)
9471 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9472 "0462 PCI enable MSI mode success.\n");
9473 else {
9474 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9475 "0471 PCI enable MSI mode failed (%d)\n", rc);
9476 return rc;
9477 }
9478
9479 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9480 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9481 if (rc) {
9482 pci_disable_msi(phba->pcidev);
9483 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9484 "0478 MSI request_irq failed (%d)\n", rc);
9485 }
9486 return rc;
9487}
9488
da0436e9
JS
9489/**
9490 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9491 * @phba: pointer to lpfc hba data structure.
9492 *
9493 * This routine is invoked to enable device interrupt and associate driver's
9494 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9495 * spec. Depends on the interrupt mode configured to the driver, the driver
9496 * will try to fallback from the configured interrupt mode to an interrupt
9497 * mode which is supported by the platform, kernel, and device in the order
9498 * of:
9499 * MSI-X -> MSI -> IRQ.
9500 *
9501 * Return codes
af901ca1 9502 * 0 - successful
da0436e9
JS
9503 * other values - error
9504 **/
9505static uint32_t
9506lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9507{
9508 uint32_t intr_mode = LPFC_INTR_ERROR;
9509 int retval;
9510
9511 if (cfg_mode == 2) {
9512 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9513 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9514 if (!retval) {
9515 /* Now, try to enable MSI-X interrupt mode */
9516 retval = lpfc_sli_enable_msix(phba);
9517 if (!retval) {
9518 /* Indicate initialization to MSI-X mode */
9519 phba->intr_type = MSIX;
9520 intr_mode = 2;
9521 }
9522 }
9523 }
9524
9525 /* Fallback to MSI if MSI-X initialization failed */
9526 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9527 retval = lpfc_sli_enable_msi(phba);
9528 if (!retval) {
9529 /* Indicate initialization to MSI mode */
9530 phba->intr_type = MSI;
9531 intr_mode = 1;
9532 }
9533 }
9534
9535 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9536 if (phba->intr_type == NONE) {
9537 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9538 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9539 if (!retval) {
9540 /* Indicate initialization to INTx mode */
9541 phba->intr_type = INTx;
9542 intr_mode = 0;
9543 }
9544 }
9545 return intr_mode;
9546}
9547
9548/**
9549 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9550 * @phba: pointer to lpfc hba data structure.
9551 *
9552 * This routine is invoked to disable device interrupt and disassociate the
9553 * driver's interrupt handler(s) from interrupt vector(s) to device with
9554 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9555 * release the interrupt vector(s) for the message signaled interrupt.
9556 **/
9557static void
9558lpfc_sli_disable_intr(struct lpfc_hba *phba)
9559{
45ffac19
CH
9560 int nr_irqs, i;
9561
da0436e9 9562 if (phba->intr_type == MSIX)
45ffac19
CH
9563 nr_irqs = LPFC_MSIX_VECTORS;
9564 else
9565 nr_irqs = 1;
9566
9567 for (i = 0; i < nr_irqs; i++)
9568 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9569 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9570
9571 /* Reset interrupt management states */
9572 phba->intr_type = NONE;
9573 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9574}
9575
7bb03bbf 9576/**
895427bd 9577 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9578 * @phba: pointer to lpfc hba data structure.
895427bd
JS
9579 * @vectors: number of msix vectors allocated.
9580 *
9581 * The routine will figure out the CPU affinity assignment for every
9582 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9583 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9584 * can be associated with. If the vector can be unquely associated with
9585 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9586 * In addition, the CPU to IO channel mapping will be calculated
9587 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9588 */
895427bd
JS
9589static void
9590lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS
9591{
9592 struct lpfc_vector_map_info *cpup;
895427bd
JS
9593 int index = 0;
9594 int vec = 0;
7bb03bbf 9595 int cpu;
7bb03bbf
JS
9596#ifdef CONFIG_X86
9597 struct cpuinfo_x86 *cpuinfo;
9598#endif
7bb03bbf
JS
9599
9600 /* Init cpu_map array */
9601 memset(phba->sli4_hba.cpu_map, 0xff,
9602 (sizeof(struct lpfc_vector_map_info) *
895427bd 9603 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS
9604
9605 /* Update CPU map with physical id and core id of each CPU */
9606 cpup = phba->sli4_hba.cpu_map;
9607 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9608#ifdef CONFIG_X86
9609 cpuinfo = &cpu_data(cpu);
9610 cpup->phys_id = cpuinfo->phys_proc_id;
9611 cpup->core_id = cpuinfo->cpu_core_id;
9612#else
9613 /* No distinction between CPUs for other platforms */
9614 cpup->phys_id = 0;
9615 cpup->core_id = 0;
9616#endif
895427bd
JS
9617 cpup->channel_id = index; /* For now round robin */
9618 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9619 vec++;
9620 if (vec >= vectors)
9621 vec = 0;
9622 index++;
9623 if (index >= phba->cfg_fcp_io_channel)
9624 index = 0;
7bb03bbf
JS
9625 cpup++;
9626 }
7bb03bbf
JS
9627}
9628
9629
da0436e9
JS
9630/**
9631 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9632 * @phba: pointer to lpfc hba data structure.
9633 *
9634 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9635 * with SLI-4 interface spec.
da0436e9
JS
9636 *
9637 * Return codes
af901ca1 9638 * 0 - successful
da0436e9
JS
9639 * other values - error
9640 **/
9641static int
9642lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9643{
75baf696 9644 int vectors, rc, index;
da0436e9
JS
9645
9646 /* Set up MSI-X multi-message vectors */
895427bd 9647 vectors = phba->io_channel_irqs;
45ffac19 9648 if (phba->cfg_fof)
1ba981fd 9649 vectors++;
45ffac19 9650
f358dd0c
JS
9651 rc = pci_alloc_irq_vectors(phba->pcidev,
9652 (phba->nvmet_support) ? 1 : 2,
9653 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9654 if (rc < 0) {
da0436e9
JS
9655 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9656 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9657 goto vec_fail_out;
da0436e9 9658 }
4f871e1b 9659 vectors = rc;
75baf696 9660
7bb03bbf 9661 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9662 for (index = 0; index < vectors; index++) {
4305f183 9663 memset(&phba->sli4_hba.handler_name[index], 0, 16);
a2fc4aef
JS
9664 snprintf((char *)&phba->sli4_hba.handler_name[index],
9665 LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9666 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9667
895427bd
JS
9668 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9669 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9670 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9671 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9672 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9673 &lpfc_sli4_fof_intr_handler, 0,
1ba981fd 9674 (char *)&phba->sli4_hba.handler_name[index],
895427bd 9675 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9676 else
45ffac19 9677 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9678 &lpfc_sli4_hba_intr_handler, 0,
4305f183 9679 (char *)&phba->sli4_hba.handler_name[index],
895427bd 9680 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS
9681 if (rc) {
9682 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9683 "0486 MSI-X fast-path (%d) "
9684 "request_irq failed (%d)\n", index, rc);
9685 goto cfg_fail_out;
9686 }
9687 }
9688
1ba981fd
JS
9689 if (phba->cfg_fof)
9690 vectors--;
9691
895427bd 9692 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS
9693 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9694 "3238 Reducing IO channels to match number of "
9695 "MSI-X vectors, requested %d got %d\n",
895427bd
JS
9696 phba->io_channel_irqs, vectors);
9697 if (phba->cfg_fcp_io_channel > vectors)
9698 phba->cfg_fcp_io_channel = vectors;
9699 if (phba->cfg_nvme_io_channel > vectors)
9700 phba->cfg_nvme_io_channel = vectors;
9701 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9702 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9703 else
9704 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9705 }
895427bd 9706 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9707
da0436e9
JS
9708 return rc;
9709
9710cfg_fail_out:
9711 /* free the irq already requested */
895427bd
JS
9712 for (--index; index >= 0; index--)
9713 free_irq(pci_irq_vector(phba->pcidev, index),
9714 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9715
da0436e9 9716 /* Unconfigure MSI-X capability structure */
45ffac19 9717 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9718
9719vec_fail_out:
da0436e9
JS
9720 return rc;
9721}
9722
da0436e9
JS
9723/**
9724 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9725 * @phba: pointer to lpfc hba data structure.
9726 *
9727 * This routine is invoked to enable the MSI interrupt mode to device with
9728 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9729 * to enable the MSI vector. The device driver is responsible for calling
9730 * the request_irq() to register MSI vector with a interrupt the handler,
9731 * which is done in this function.
9732 *
9733 * Return codes
af901ca1 9734 * 0 - successful
da0436e9
JS
9735 * other values - error
9736 **/
9737static int
9738lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9739{
9740 int rc, index;
9741
9742 rc = pci_enable_msi(phba->pcidev);
9743 if (!rc)
9744 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9745 "0487 PCI enable MSI mode success.\n");
9746 else {
9747 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9748 "0488 PCI enable MSI mode failed (%d)\n", rc);
9749 return rc;
9750 }
9751
9752 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9753 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9754 if (rc) {
9755 pci_disable_msi(phba->pcidev);
9756 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9757 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9758 return rc;
da0436e9
JS
9759 }
9760
895427bd
JS
9761 for (index = 0; index < phba->io_channel_irqs; index++) {
9762 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9763 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS
9764 }
9765
1ba981fd 9766 if (phba->cfg_fof) {
895427bd
JS
9767 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9768 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 9769 }
75baf696 9770 return 0;
da0436e9
JS
9771}
9772
da0436e9
JS
9773/**
9774 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
9775 * @phba: pointer to lpfc hba data structure.
9776 *
9777 * This routine is invoked to enable device interrupt and associate driver's
9778 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
9779 * interface spec. Depends on the interrupt mode configured to the driver,
9780 * the driver will try to fallback from the configured interrupt mode to an
9781 * interrupt mode which is supported by the platform, kernel, and device in
9782 * the order of:
9783 * MSI-X -> MSI -> IRQ.
9784 *
9785 * Return codes
af901ca1 9786 * 0 - successful
da0436e9
JS
9787 * other values - error
9788 **/
9789static uint32_t
9790lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9791{
9792 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 9793 int retval, idx;
da0436e9
JS
9794
9795 if (cfg_mode == 2) {
9796 /* Preparation before conf_msi mbox cmd */
9797 retval = 0;
9798 if (!retval) {
9799 /* Now, try to enable MSI-X interrupt mode */
9800 retval = lpfc_sli4_enable_msix(phba);
9801 if (!retval) {
9802 /* Indicate initialization to MSI-X mode */
9803 phba->intr_type = MSIX;
9804 intr_mode = 2;
9805 }
9806 }
9807 }
9808
9809 /* Fallback to MSI if MSI-X initialization failed */
9810 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9811 retval = lpfc_sli4_enable_msi(phba);
9812 if (!retval) {
9813 /* Indicate initialization to MSI mode */
9814 phba->intr_type = MSI;
9815 intr_mode = 1;
9816 }
9817 }
9818
9819 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9820 if (phba->intr_type == NONE) {
9821 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
9822 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9823 if (!retval) {
895427bd
JS
9824 struct lpfc_hba_eq_hdl *eqhdl;
9825
da0436e9
JS
9826 /* Indicate initialization to INTx mode */
9827 phba->intr_type = INTx;
9828 intr_mode = 0;
895427bd
JS
9829
9830 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
9831 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9832 eqhdl->idx = idx;
9833 eqhdl->phba = phba;
9834 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 9835 }
1ba981fd 9836 if (phba->cfg_fof) {
895427bd
JS
9837 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9838 eqhdl->idx = idx;
9839 eqhdl->phba = phba;
9840 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 9841 }
da0436e9
JS
9842 }
9843 }
9844 return intr_mode;
9845}
9846
9847/**
9848 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
9849 * @phba: pointer to lpfc hba data structure.
9850 *
9851 * This routine is invoked to disable device interrupt and disassociate
9852 * the driver's interrupt handler(s) from interrupt vector(s) to device
9853 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
9854 * will release the interrupt vector(s) for the message signaled interrupt.
9855 **/
9856static void
9857lpfc_sli4_disable_intr(struct lpfc_hba *phba)
9858{
9859 /* Disable the currently initialized interrupt mode */
45ffac19
CH
9860 if (phba->intr_type == MSIX) {
9861 int index;
9862
9863 /* Free up MSI-X multi-message vectors */
895427bd
JS
9864 for (index = 0; index < phba->io_channel_irqs; index++)
9865 free_irq(pci_irq_vector(phba->pcidev, index),
9866 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH
9867
9868 if (phba->cfg_fof)
895427bd
JS
9869 free_irq(pci_irq_vector(phba->pcidev, index),
9870 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 9871 } else {
da0436e9 9872 free_irq(phba->pcidev->irq, phba);
45ffac19
CH
9873 }
9874
9875 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9876
9877 /* Reset interrupt management states */
9878 phba->intr_type = NONE;
9879 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9880}
9881
9882/**
9883 * lpfc_unset_hba - Unset SLI3 hba device initialization
9884 * @phba: pointer to lpfc hba data structure.
9885 *
9886 * This routine is invoked to unset the HBA device initialization steps to
9887 * a device with SLI-3 interface spec.
9888 **/
9889static void
9890lpfc_unset_hba(struct lpfc_hba *phba)
9891{
9892 struct lpfc_vport *vport = phba->pport;
9893 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
9894
9895 spin_lock_irq(shost->host_lock);
9896 vport->load_flag |= FC_UNLOADING;
9897 spin_unlock_irq(shost->host_lock);
9898
72859909
JS
9899 kfree(phba->vpi_bmask);
9900 kfree(phba->vpi_ids);
9901
da0436e9
JS
9902 lpfc_stop_hba_timers(phba);
9903
9904 phba->pport->work_port_events = 0;
9905
9906 lpfc_sli_hba_down(phba);
9907
9908 lpfc_sli_brdrestart(phba);
9909
9910 lpfc_sli_disable_intr(phba);
9911
9912 return;
9913}
9914
5af5eee7
JS
9915/**
9916 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
9917 * @phba: Pointer to HBA context object.
9918 *
9919 * This function is called in the SLI4 code path to wait for completion
9920 * of device's XRIs exchange busy. It will check the XRI exchange busy
9921 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
9922 * that, it will check the XRI exchange busy on outstanding FCP and ELS
9923 * I/Os every 30 seconds, log error message, and wait forever. Only when
9924 * all XRI exchange busy complete, the driver unload shall proceed with
9925 * invoking the function reset ioctl mailbox command to the CNA and the
9926 * the rest of the driver unload resource release.
9927 **/
9928static void
9929lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
9930{
9931 int wait_time = 0;
895427bd 9932 int nvme_xri_cmpl = 1;
86c67379 9933 int nvmet_xri_cmpl = 1;
895427bd 9934 int fcp_xri_cmpl = 1;
5af5eee7
JS
9935 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
9936
895427bd
JS
9937 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
9938 fcp_xri_cmpl =
9939 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
86c67379 9940 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
9941 nvme_xri_cmpl =
9942 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS
9943 nvmet_xri_cmpl =
9944 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
9945 }
895427bd 9946
f358dd0c
JS
9947 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl ||
9948 !nvmet_xri_cmpl) {
5af5eee7 9949 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS
9950 if (!nvme_xri_cmpl)
9951 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9952 "6100 NVME XRI exchange busy "
9953 "wait time: %d seconds.\n",
9954 wait_time/1000);
5af5eee7
JS
9955 if (!fcp_xri_cmpl)
9956 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9957 "2877 FCP XRI exchange busy "
9958 "wait time: %d seconds.\n",
9959 wait_time/1000);
9960 if (!els_xri_cmpl)
9961 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9962 "2878 ELS XRI exchange busy "
9963 "wait time: %d seconds.\n",
9964 wait_time/1000);
9965 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
9966 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
9967 } else {
9968 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
9969 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
9970 }
86c67379 9971 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
9972 nvme_xri_cmpl = list_empty(
9973 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS
9974 nvmet_xri_cmpl = list_empty(
9975 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
9976 }
895427bd
JS
9977
9978 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
9979 fcp_xri_cmpl = list_empty(
9980 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
9981
5af5eee7
JS
9982 els_xri_cmpl =
9983 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 9984
5af5eee7
JS
9985 }
9986}
9987
da0436e9
JS
9988/**
9989 * lpfc_sli4_hba_unset - Unset the fcoe hba
9990 * @phba: Pointer to HBA context object.
9991 *
9992 * This function is called in the SLI4 code path to reset the HBA's FCoE
9993 * function. The caller is not required to hold any lock. This routine
9994 * issues PCI function reset mailbox command to reset the FCoE function.
9995 * At the end of the function, it calls lpfc_hba_down_post function to
9996 * free any pending commands.
9997 **/
9998static void
9999lpfc_sli4_hba_unset(struct lpfc_hba *phba)
10000{
10001 int wait_cnt = 0;
10002 LPFC_MBOXQ_t *mboxq;
912e3acd 10003 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS
10004
10005 lpfc_stop_hba_timers(phba);
10006 phba->sli4_hba.intr_enable = 0;
10007
10008 /*
10009 * Gracefully wait out the potential current outstanding asynchronous
10010 * mailbox command.
10011 */
10012
10013 /* First, block any pending async mailbox command from posted */
10014 spin_lock_irq(&phba->hbalock);
10015 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
10016 spin_unlock_irq(&phba->hbalock);
10017 /* Now, trying to wait it out if we can */
10018 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10019 msleep(10);
10020 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
10021 break;
10022 }
10023 /* Forcefully release the outstanding mailbox command if timed out */
10024 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10025 spin_lock_irq(&phba->hbalock);
10026 mboxq = phba->sli.mbox_active;
10027 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
10028 __lpfc_mbox_cmpl_put(phba, mboxq);
10029 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10030 phba->sli.mbox_active = NULL;
10031 spin_unlock_irq(&phba->hbalock);
10032 }
10033
5af5eee7
JS
10034 /* Abort all iocbs associated with the hba */
10035 lpfc_sli_hba_iocb_abort(phba);
10036
10037 /* Wait for completion of device XRI exchange busy */
10038 lpfc_sli4_xri_exchange_busy_wait(phba);
10039
da0436e9
JS
10040 /* Disable PCI subsystem interrupt */
10041 lpfc_sli4_disable_intr(phba);
10042
912e3acd
JS
10043 /* Disable SR-IOV if enabled */
10044 if (phba->cfg_sriov_nr_virtfn)
10045 pci_disable_sriov(pdev);
10046
da0436e9
JS
10047 /* Stop kthread signal shall trigger work_done one more time */
10048 kthread_stop(phba->worker_thread);
10049
d1f525aa
JS
10050 /* Unset the queues shared with the hardware then release all
10051 * allocated resources.
10052 */
10053 lpfc_sli4_queue_unset(phba);
10054 lpfc_sli4_queue_destroy(phba);
10055
3677a3a7
JS
10056 /* Reset SLI4 HBA FCoE function */
10057 lpfc_pci_function_reset(phba);
10058
da0436e9
JS
10059 /* Stop the SLI4 device port */
10060 phba->pport->work_port_events = 0;
10061}
10062
28baac74
JS
10063 /**
10064 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
10065 * @phba: Pointer to HBA context object.
10066 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10067 *
10068 * This function is called in the SLI4 code path to read the port's
10069 * sli4 capabilities.
10070 *
10071 * This function may be be called from any context that can block-wait
10072 * for the completion. The expectation is that this routine is called
10073 * typically from probe_one or from the online routine.
10074 **/
10075int
10076lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10077{
10078 int rc;
10079 struct lpfc_mqe *mqe;
10080 struct lpfc_pc_sli4_params *sli4_params;
10081 uint32_t mbox_tmo;
10082
10083 rc = 0;
10084 mqe = &mboxq->u.mqe;
10085
10086 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 10087 lpfc_pc_sli4_params(mboxq);
28baac74
JS
10088 if (!phba->sli4_hba.intr_enable)
10089 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10090 else {
a183a15f 10091 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS
10092 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10093 }
10094
10095 if (unlikely(rc))
10096 return 1;
10097
10098 sli4_params = &phba->sli4_hba.pc_sli4_params;
10099 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
10100 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
10101 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
10102 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
10103 &mqe->un.sli4_params);
10104 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
10105 &mqe->un.sli4_params);
10106 sli4_params->proto_types = mqe->un.sli4_params.word3;
10107 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
10108 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
10109 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
10110 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
10111 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
10112 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
10113 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
10114 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
10115 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
10116 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
10117 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
10118 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
10119 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
10120 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
10121 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
10122 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
10123 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
10124 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
10125 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
10126 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS
10127
10128 /* Make sure that sge_supp_len can be handled by the driver */
10129 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10130 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10131
28baac74
JS
10132 return rc;
10133}
10134
fedd3b7b
JS
10135/**
10136 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
10137 * @phba: Pointer to HBA context object.
10138 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10139 *
10140 * This function is called in the SLI4 code path to read the port's
10141 * sli4 capabilities.
10142 *
10143 * This function may be be called from any context that can block-wait
10144 * for the completion. The expectation is that this routine is called
10145 * typically from probe_one or from the online routine.
10146 **/
10147int
10148lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10149{
10150 int rc;
10151 struct lpfc_mqe *mqe = &mboxq->u.mqe;
10152 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 10153 uint32_t mbox_tmo;
fedd3b7b
JS
10154 int length;
10155 struct lpfc_sli4_parameters *mbx_sli4_parameters;
10156
6d368e53
JS
10157 /*
10158 * By default, the driver assumes the SLI4 port requires RPI
10159 * header postings. The SLI4_PARAM response will correct this
10160 * assumption.
10161 */
10162 phba->sli4_hba.rpi_hdrs_in_use = 1;
10163
fedd3b7b
JS
10164 /* Read the port's SLI4 Config Parameters */
10165 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
10166 sizeof(struct lpfc_sli4_cfg_mhdr));
10167 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
10168 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
10169 length, LPFC_SLI4_MBX_EMBED);
10170 if (!phba->sli4_hba.intr_enable)
10171 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS
10172 else {
10173 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
10174 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10175 }
fedd3b7b
JS
10176 if (unlikely(rc))
10177 return rc;
10178 sli4_params = &phba->sli4_hba.pc_sli4_params;
10179 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
10180 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
10181 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
10182 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
10183 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
10184 mbx_sli4_parameters);
10185 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
10186 mbx_sli4_parameters);
10187 if (bf_get(cfg_phwq, mbx_sli4_parameters))
10188 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
10189 else
10190 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
10191 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
10192 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 10193 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS
10194 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
10195 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
10196 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
10197 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 10198 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS
10199 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
10200 mbx_sli4_parameters);
895427bd 10201 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS
10202 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
10203 mbx_sli4_parameters);
6d368e53
JS
10204 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
10205 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS
10206 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
10207 bf_get(cfg_xib, mbx_sli4_parameters));
10208
10209 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
10210 !phba->nvme_support) {
10211 phba->nvme_support = 0;
10212 phba->nvmet_support = 0;
2d7dbc4c 10213 phba->cfg_nvmet_mrq = 0;
895427bd
JS
10214 phba->cfg_nvme_io_channel = 0;
10215 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
10216 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
10217 "6101 Disabling NVME support: "
10218 "Not supported by firmware: %d %d\n",
10219 bf_get(cfg_nvme, mbx_sli4_parameters),
10220 bf_get(cfg_xib, mbx_sli4_parameters));
10221
10222 /* If firmware doesn't support NVME, just use SCSI support */
10223 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
10224 return -ENODEV;
10225 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
10226 }
0558056c 10227
f358dd0c
JS
10228 if (bf_get(cfg_xib, mbx_sli4_parameters) && phba->cfg_suppress_rsp)
10229 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
10230
0558056c
JS
10231 /* Make sure that sge_supp_len can be handled by the driver */
10232 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10233 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10234
b5c53958
JS
10235 /*
10236 * Issue IOs with CDB embedded in WQE to minimized the number
10237 * of DMAs the firmware has to do. Setting this to 1 also forces
10238 * the driver to use 128 bytes WQEs for FCP IOs.
10239 */
10240 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
10241 phba->fcp_embed_io = 1;
10242 else
10243 phba->fcp_embed_io = 0;
7bdedb34
JS
10244
10245 /*
10246 * Check if the SLI port supports MDS Diagnostics
10247 */
10248 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
10249 phba->mds_diags_support = 1;
10250 else
10251 phba->mds_diags_support = 0;
fedd3b7b
JS
10252 return 0;
10253}
10254
da0436e9
JS
10255/**
10256 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
10257 * @pdev: pointer to PCI device
10258 * @pid: pointer to PCI device identifier
10259 *
10260 * This routine is to be called to attach a device with SLI-3 interface spec
10261 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10262 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
10263 * information of the device and driver to see if the driver state that it can
10264 * support this kind of device. If the match is successful, the driver core
10265 * invokes this routine. If this routine determines it can claim the HBA, it
10266 * does all the initialization that it needs to do to handle the HBA properly.
10267 *
10268 * Return code
10269 * 0 - driver can claim the device
10270 * negative value - driver can not claim the device
10271 **/
6f039790 10272static int
da0436e9
JS
10273lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
10274{
10275 struct lpfc_hba *phba;
10276 struct lpfc_vport *vport = NULL;
6669f9bb 10277 struct Scsi_Host *shost = NULL;
da0436e9
JS
10278 int error;
10279 uint32_t cfg_mode, intr_mode;
10280
10281 /* Allocate memory for HBA structure */
10282 phba = lpfc_hba_alloc(pdev);
10283 if (!phba)
10284 return -ENOMEM;
10285
10286 /* Perform generic PCI device enabling operation */
10287 error = lpfc_enable_pci_dev(phba);
079b5c91 10288 if (error)
da0436e9 10289 goto out_free_phba;
da0436e9
JS
10290
10291 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
10292 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
10293 if (error)
10294 goto out_disable_pci_dev;
10295
10296 /* Set up SLI-3 specific device PCI memory space */
10297 error = lpfc_sli_pci_mem_setup(phba);
10298 if (error) {
10299 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10300 "1402 Failed to set up pci memory space.\n");
10301 goto out_disable_pci_dev;
10302 }
10303
da0436e9
JS
10304 /* Set up SLI-3 specific device driver resources */
10305 error = lpfc_sli_driver_resource_setup(phba);
10306 if (error) {
10307 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10308 "1404 Failed to set up driver resource.\n");
10309 goto out_unset_pci_mem_s3;
10310 }
10311
10312 /* Initialize and populate the iocb list per host */
d1f525aa 10313
da0436e9
JS
10314 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
10315 if (error) {
10316 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10317 "1405 Failed to initialize iocb list.\n");
10318 goto out_unset_driver_resource_s3;
10319 }
10320
10321 /* Set up common device driver resources */
10322 error = lpfc_setup_driver_resource_phase2(phba);
10323 if (error) {
10324 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10325 "1406 Failed to set up driver resource.\n");
10326 goto out_free_iocb_list;
10327 }
10328
079b5c91
JS
10329 /* Get the default values for Model Name and Description */
10330 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10331
da0436e9
JS
10332 /* Create SCSI host to the physical port */
10333 error = lpfc_create_shost(phba);
10334 if (error) {
10335 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10336 "1407 Failed to create scsi host.\n");
10337 goto out_unset_driver_resource;
10338 }
10339
10340 /* Configure sysfs attributes */
10341 vport = phba->pport;
10342 error = lpfc_alloc_sysfs_attr(vport);
10343 if (error) {
10344 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10345 "1476 Failed to allocate sysfs attr\n");
10346 goto out_destroy_shost;
10347 }
10348
6669f9bb 10349 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS
10350 /* Now, trying to enable interrupt and bring up the device */
10351 cfg_mode = phba->cfg_use_msi;
10352 while (true) {
10353 /* Put device to a known state before enabling interrupt */
10354 lpfc_stop_port(phba);
10355 /* Configure and enable interrupt */
10356 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
10357 if (intr_mode == LPFC_INTR_ERROR) {
10358 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10359 "0431 Failed to enable interrupt.\n");
10360 error = -ENODEV;
10361 goto out_free_sysfs_attr;
10362 }
10363 /* SLI-3 HBA setup */
10364 if (lpfc_sli_hba_setup(phba)) {
10365 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10366 "1477 Failed to set up hba\n");
10367 error = -ENODEV;
10368 goto out_remove_device;
10369 }
10370
10371 /* Wait 50ms for the interrupts of previous mailbox commands */
10372 msleep(50);
10373 /* Check active interrupts on message signaled interrupts */
10374 if (intr_mode == 0 ||
10375 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
10376 /* Log the current active interrupt mode */
10377 phba->intr_mode = intr_mode;
10378 lpfc_log_intr_mode(phba, intr_mode);
10379 break;
10380 } else {
10381 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10382 "0447 Configure interrupt mode (%d) "
10383 "failed active interrupt test.\n",
10384 intr_mode);
10385 /* Disable the current interrupt mode */
10386 lpfc_sli_disable_intr(phba);
10387 /* Try next level of interrupt mode */
10388 cfg_mode = --intr_mode;
10389 }
10390 }
10391
10392 /* Perform post initialization setup */
10393 lpfc_post_init_setup(phba);
10394
10395 /* Check if there are static vports to be created. */
10396 lpfc_create_static_vport(phba);
10397
10398 return 0;
10399
10400out_remove_device:
10401 lpfc_unset_hba(phba);
10402out_free_sysfs_attr:
10403 lpfc_free_sysfs_attr(vport);
10404out_destroy_shost:
10405 lpfc_destroy_shost(phba);
10406out_unset_driver_resource:
10407 lpfc_unset_driver_resource_phase2(phba);
10408out_free_iocb_list:
10409 lpfc_free_iocb_list(phba);
10410out_unset_driver_resource_s3:
10411 lpfc_sli_driver_resource_unset(phba);
10412out_unset_pci_mem_s3:
10413 lpfc_sli_pci_mem_unset(phba);
10414out_disable_pci_dev:
10415 lpfc_disable_pci_dev(phba);
6669f9bb
JS
10416 if (shost)
10417 scsi_host_put(shost);
da0436e9
JS
10418out_free_phba:
10419 lpfc_hba_free(phba);
10420 return error;
10421}
10422
10423/**
10424 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
10425 * @pdev: pointer to PCI device
10426 *
10427 * This routine is to be called to disattach a device with SLI-3 interface
10428 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10429 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10430 * device to be removed from the PCI subsystem properly.
10431 **/
6f039790 10432static void
da0436e9
JS
10433lpfc_pci_remove_one_s3(struct pci_dev *pdev)
10434{
10435 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10436 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10437 struct lpfc_vport **vports;
10438 struct lpfc_hba *phba = vport->phba;
10439 int i;
da0436e9
JS
10440
10441 spin_lock_irq(&phba->hbalock);
10442 vport->load_flag |= FC_UNLOADING;
10443 spin_unlock_irq(&phba->hbalock);
10444
10445 lpfc_free_sysfs_attr(vport);
10446
10447 /* Release all the vports against this physical port */
10448 vports = lpfc_create_vport_work_array(phba);
10449 if (vports != NULL)
587a37f6
JS
10450 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10451 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10452 continue;
da0436e9 10453 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10454 }
da0436e9
JS
10455 lpfc_destroy_vport_work_array(phba, vports);
10456
10457 /* Remove FC host and then SCSI host with the physical port */
10458 fc_remove_host(shost);
10459 scsi_remove_host(shost);
d613b6a7 10460
da0436e9
JS
10461 lpfc_cleanup(vport);
10462
10463 /*
10464 * Bring down the SLI Layer. This step disable all interrupts,
10465 * clears the rings, discards all mailbox commands, and resets
10466 * the HBA.
10467 */
10468
48e34d0f 10469 /* HBA interrupt will be disabled after this call */
da0436e9
JS
10470 lpfc_sli_hba_down(phba);
10471 /* Stop kthread signal shall trigger work_done one more time */
10472 kthread_stop(phba->worker_thread);
10473 /* Final cleanup of txcmplq and reset the HBA */
10474 lpfc_sli_brdrestart(phba);
10475
72859909
JS
10476 kfree(phba->vpi_bmask);
10477 kfree(phba->vpi_ids);
10478
da0436e9
JS
10479 lpfc_stop_hba_timers(phba);
10480 spin_lock_irq(&phba->hbalock);
10481 list_del_init(&vport->listentry);
10482 spin_unlock_irq(&phba->hbalock);
10483
10484 lpfc_debugfs_terminate(vport);
10485
912e3acd
JS
10486 /* Disable SR-IOV if enabled */
10487 if (phba->cfg_sriov_nr_virtfn)
10488 pci_disable_sriov(pdev);
10489
da0436e9
JS
10490 /* Disable interrupt */
10491 lpfc_sli_disable_intr(phba);
10492
da0436e9
JS
10493 scsi_host_put(shost);
10494
10495 /*
10496 * Call scsi_free before mem_free since scsi bufs are released to their
10497 * corresponding pools here.
10498 */
10499 lpfc_scsi_free(phba);
10500 lpfc_mem_free_all(phba);
10501
10502 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10503 phba->hbqslimp.virt, phba->hbqslimp.phys);
10504
10505 /* Free resources associated with SLI2 interface */
10506 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10507 phba->slim2p.virt, phba->slim2p.phys);
10508
10509 /* unmap adapter SLIM and Control Registers */
10510 iounmap(phba->ctrl_regs_memmap_p);
10511 iounmap(phba->slim_memmap_p);
10512
10513 lpfc_hba_free(phba);
10514
e0c0483c 10515 pci_release_mem_regions(pdev);
da0436e9
JS
10516 pci_disable_device(pdev);
10517}
10518
10519/**
10520 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10521 * @pdev: pointer to PCI device
10522 * @msg: power management message
10523 *
10524 * This routine is to be called from the kernel's PCI subsystem to support
10525 * system Power Management (PM) to device with SLI-3 interface spec. When
10526 * PM invokes this method, it quiesces the device by stopping the driver's
10527 * worker thread for the device, turning off device's interrupt and DMA,
10528 * and bring the device offline. Note that as the driver implements the
10529 * minimum PM requirements to a power-aware driver's PM support for the
10530 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10531 * to the suspend() method call will be treated as SUSPEND and the driver will
10532 * fully reinitialize its device during resume() method call, the driver will
10533 * set device to PCI_D3hot state in PCI config space instead of setting it
10534 * according to the @msg provided by the PM.
10535 *
10536 * Return code
10537 * 0 - driver suspended the device
10538 * Error otherwise
10539 **/
10540static int
10541lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10542{
10543 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10544 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10545
10546 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10547 "0473 PCI device Power Management suspend.\n");
10548
10549 /* Bring down the device */
618a5230 10550 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10551 lpfc_offline(phba);
10552 kthread_stop(phba->worker_thread);
10553
10554 /* Disable interrupt from device */
10555 lpfc_sli_disable_intr(phba);
10556
10557 /* Save device state to PCI config space */
10558 pci_save_state(pdev);
10559 pci_set_power_state(pdev, PCI_D3hot);
10560
10561 return 0;
10562}
10563
10564/**
10565 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10566 * @pdev: pointer to PCI device
10567 *
10568 * This routine is to be called from the kernel's PCI subsystem to support
10569 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10570 * invokes this method, it restores the device's PCI config space state and
10571 * fully reinitializes the device and brings it online. Note that as the
10572 * driver implements the minimum PM requirements to a power-aware driver's
10573 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10574 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10575 * driver will fully reinitialize its device during resume() method call,
10576 * the device will be set to PCI_D0 directly in PCI config space before
10577 * restoring the state.
10578 *
10579 * Return code
10580 * 0 - driver suspended the device
10581 * Error otherwise
10582 **/
10583static int
10584lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10585{
10586 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10587 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10588 uint32_t intr_mode;
10589 int error;
10590
10591 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10592 "0452 PCI device Power Management resume.\n");
10593
10594 /* Restore device state from PCI config space */
10595 pci_set_power_state(pdev, PCI_D0);
10596 pci_restore_state(pdev);
0d878419 10597
1dfb5a47
JS
10598 /*
10599 * As the new kernel behavior of pci_restore_state() API call clears
10600 * device saved_state flag, need to save the restored state again.
10601 */
10602 pci_save_state(pdev);
10603
da0436e9
JS
10604 if (pdev->is_busmaster)
10605 pci_set_master(pdev);
10606
10607 /* Startup the kernel thread for this host adapter. */
10608 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10609 "lpfc_worker_%d", phba->brd_no);
10610 if (IS_ERR(phba->worker_thread)) {
10611 error = PTR_ERR(phba->worker_thread);
10612 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10613 "0434 PM resume failed to start worker "
10614 "thread: error=x%x.\n", error);
10615 return error;
10616 }
10617
10618 /* Configure and enable interrupt */
10619 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10620 if (intr_mode == LPFC_INTR_ERROR) {
10621 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10622 "0430 PM resume Failed to enable interrupt\n");
10623 return -EIO;
10624 } else
10625 phba->intr_mode = intr_mode;
10626
10627 /* Restart HBA and bring it online */
10628 lpfc_sli_brdrestart(phba);
10629 lpfc_online(phba);
10630
10631 /* Log the current active interrupt mode */
10632 lpfc_log_intr_mode(phba, phba->intr_mode);
10633
10634 return 0;
10635}
10636
891478a2
JS
10637/**
10638 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10639 * @phba: pointer to lpfc hba data structure.
10640 *
10641 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10642 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS
10643 **/
10644static void
10645lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10646{
10647 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10648 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS
10649
10650 /*
10651 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10652 * and let the SCSI mid-layer to retry them to recover.
10653 */
db55fba8 10654 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS
10655}
10656
0d878419
JS
10657/**
10658 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10659 * @phba: pointer to lpfc hba data structure.
10660 *
10661 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10662 * disables the device interrupt and pci device, and aborts the internal FCP
10663 * pending I/Os.
10664 **/
10665static void
10666lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10667{
0d878419 10668 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10669 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10670
75baf696 10671 /* Block any management I/Os to the device */
618a5230 10672 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10673
e2af0d2e
JS
10674 /* Block all SCSI devices' I/Os on the host */
10675 lpfc_scsi_dev_block(phba);
10676
ea714f3d
JS
10677 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10678 lpfc_sli_flush_fcp_rings(phba);
10679
e2af0d2e
JS
10680 /* stop all timers */
10681 lpfc_stop_hba_timers(phba);
10682
0d878419
JS
10683 /* Disable interrupt and pci device */
10684 lpfc_sli_disable_intr(phba);
10685 pci_disable_device(phba->pcidev);
0d878419
JS
10686}
10687
10688/**
10689 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10690 * @phba: pointer to lpfc hba data structure.
10691 *
10692 * This routine is called to prepare the SLI3 device for PCI slot permanently
10693 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10694 * pending I/Os.
10695 **/
10696static void
75baf696 10697lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS
10698{
10699 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10700 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS
10701 /* Block all SCSI devices' I/Os on the host */
10702 lpfc_scsi_dev_block(phba);
10703
10704 /* stop all timers */
10705 lpfc_stop_hba_timers(phba);
10706
0d878419
JS
10707 /* Clean up all driver's outstanding SCSI I/Os */
10708 lpfc_sli_flush_fcp_rings(phba);
10709}
10710
da0436e9
JS
10711/**
10712 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10713 * @pdev: pointer to PCI device.
10714 * @state: the current PCI connection state.
10715 *
10716 * This routine is called from the PCI subsystem for I/O error handling to
10717 * device with SLI-3 interface spec. This function is called by the PCI
10718 * subsystem after a PCI bus error affecting this device has been detected.
10719 * When this function is invoked, it will need to stop all the I/Os and
10720 * interrupt(s) to the device. Once that is done, it will return
10721 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10722 * as desired.
10723 *
10724 * Return codes
0d878419 10725 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS
10726 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10727 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10728 **/
10729static pci_ers_result_t
10730lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10731{
10732 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10733 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10734
0d878419
JS
10735 switch (state) {
10736 case pci_channel_io_normal:
891478a2
JS
10737 /* Non-fatal error, prepare for recovery */
10738 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS
10739 return PCI_ERS_RESULT_CAN_RECOVER;
10740 case pci_channel_io_frozen:
10741 /* Fatal error, prepare for slot reset */
10742 lpfc_sli_prep_dev_for_reset(phba);
10743 return PCI_ERS_RESULT_NEED_RESET;
10744 case pci_channel_io_perm_failure:
10745 /* Permanent failure, prepare for device down */
75baf696 10746 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 10747 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS
10748 default:
10749 /* Unknown state, prepare and request slot reset */
10750 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10751 "0472 Unknown PCI error state: x%x\n", state);
10752 lpfc_sli_prep_dev_for_reset(phba);
10753 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 10754 }
da0436e9
JS
10755}
10756
10757/**
10758 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
10759 * @pdev: pointer to PCI device.
10760 *
10761 * This routine is called from the PCI subsystem for error handling to
10762 * device with SLI-3 interface spec. This is called after PCI bus has been
10763 * reset to restart the PCI card from scratch, as if from a cold-boot.
10764 * During the PCI subsystem error recovery, after driver returns
10765 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
10766 * recovery and then call this routine before calling the .resume method
10767 * to recover the device. This function will initialize the HBA device,
10768 * enable the interrupt, but it will just put the HBA to offline state
10769 * without passing any I/O traffic.
10770 *
10771 * Return codes
10772 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
10773 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10774 */
10775static pci_ers_result_t
10776lpfc_io_slot_reset_s3(struct pci_dev *pdev)
10777{
10778 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10779 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10780 struct lpfc_sli *psli = &phba->sli;
10781 uint32_t intr_mode;
10782
10783 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
10784 if (pci_enable_device_mem(pdev)) {
10785 printk(KERN_ERR "lpfc: Cannot re-enable "
10786 "PCI device after reset.\n");
10787 return PCI_ERS_RESULT_DISCONNECT;
10788 }
10789
10790 pci_restore_state(pdev);
1dfb5a47
JS
10791
10792 /*
10793 * As the new kernel behavior of pci_restore_state() API call clears
10794 * device saved_state flag, need to save the restored state again.
10795 */
10796 pci_save_state(pdev);
10797
da0436e9
JS
10798 if (pdev->is_busmaster)
10799 pci_set_master(pdev);
10800
10801 spin_lock_irq(&phba->hbalock);
10802 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
10803 spin_unlock_irq(&phba->hbalock);
10804
10805 /* Configure and enable interrupt */
10806 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10807 if (intr_mode == LPFC_INTR_ERROR) {
10808 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10809 "0427 Cannot re-enable interrupt after "
10810 "slot reset.\n");
10811 return PCI_ERS_RESULT_DISCONNECT;
10812 } else
10813 phba->intr_mode = intr_mode;
10814
75baf696 10815 /* Take device offline, it will perform cleanup */
618a5230 10816 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10817 lpfc_offline(phba);
10818 lpfc_sli_brdrestart(phba);
10819
10820 /* Log the current active interrupt mode */
10821 lpfc_log_intr_mode(phba, phba->intr_mode);
10822
10823 return PCI_ERS_RESULT_RECOVERED;
10824}
10825
10826/**
10827 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
10828 * @pdev: pointer to PCI device
10829 *
10830 * This routine is called from the PCI subsystem for error handling to device
10831 * with SLI-3 interface spec. It is called when kernel error recovery tells
10832 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
10833 * error recovery. After this call, traffic can start to flow from this device
10834 * again.
10835 */
10836static void
10837lpfc_io_resume_s3(struct pci_dev *pdev)
10838{
10839 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10840 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 10841
e2af0d2e 10842 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 10843 lpfc_online(phba);
0d878419
JS
10844
10845 /* Clean up Advanced Error Reporting (AER) if needed */
10846 if (phba->hba_flag & HBA_AER_ENABLED)
10847 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 10848}
3772a991 10849
da0436e9
JS
10850/**
10851 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
10852 * @phba: pointer to lpfc hba data structure.
10853 *
10854 * returns the number of ELS/CT IOCBs to reserve
10855 **/
10856int
10857lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
10858{
10859 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
10860
f1126688
JS
10861 if (phba->sli_rev == LPFC_SLI_REV4) {
10862 if (max_xri <= 100)
6a9c52cf 10863 return 10;
f1126688 10864 else if (max_xri <= 256)
6a9c52cf 10865 return 25;
f1126688 10866 else if (max_xri <= 512)
6a9c52cf 10867 return 50;
f1126688 10868 else if (max_xri <= 1024)
6a9c52cf 10869 return 100;
8a9d2e80 10870 else if (max_xri <= 1536)
6a9c52cf 10871 return 150;
8a9d2e80
JS
10872 else if (max_xri <= 2048)
10873 return 200;
10874 else
10875 return 250;
f1126688
JS
10876 } else
10877 return 0;
3772a991
JS
10878}
10879
895427bd
JS
10880/**
10881 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
10882 * @phba: pointer to lpfc hba data structure.
10883 *
f358dd0c 10884 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS
10885 **/
10886int
10887lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
10888{
10889 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
10890
f358dd0c
JS
10891 if (phba->nvmet_support)
10892 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS
10893 return max_xri;
10894}
10895
10896
52d52440
JS
10897/**
10898 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 10899 * @fw: pointer to firmware image returned from request_firmware.
ce396282 10900 * @phba: pointer to lpfc hba data structure.
52d52440 10901 *
52d52440 10902 **/
ce396282
JS
10903static void
10904lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 10905{
ce396282 10906 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 10907 char fwrev[FW_REV_STR_SIZE];
ce396282 10908 struct lpfc_grp_hdr *image;
52d52440
JS
10909 struct list_head dma_buffer_list;
10910 int i, rc = 0;
10911 struct lpfc_dmabuf *dmabuf, *next;
10912 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 10913 uint32_t magic_number, ftype, fid, fsize;
52d52440 10914
c71ab861 10915 /* It can be null in no-wait mode, sanity check */
ce396282
JS
10916 if (!fw) {
10917 rc = -ENXIO;
10918 goto out;
10919 }
10920 image = (struct lpfc_grp_hdr *)fw->data;
10921
6b6ef5db
JS
10922 magic_number = be32_to_cpu(image->magic_number);
10923 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
10924 fid = bf_get_be32(lpfc_grp_hdr_id, image),
10925 fsize = be32_to_cpu(image->size);
10926
52d52440 10927 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS
10928 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
10929 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
10930 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS
10931 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10932 "3022 Invalid FW image found. "
efe583c6 10933 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 10934 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS
10935 rc = -EINVAL;
10936 goto release_out;
52d52440
JS
10937 }
10938 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 10939 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 10940 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 10941 "3023 Updating Firmware, Current Version:%s "
52d52440 10942 "New Version:%s\n",
88a2cfbb 10943 fwrev, image->revision);
52d52440
JS
10944 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
10945 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
10946 GFP_KERNEL);
10947 if (!dmabuf) {
10948 rc = -ENOMEM;
ce396282 10949 goto release_out;
52d52440
JS
10950 }
10951 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
10952 SLI4_PAGE_SIZE,
10953 &dmabuf->phys,
10954 GFP_KERNEL);
10955 if (!dmabuf->virt) {
10956 kfree(dmabuf);
10957 rc = -ENOMEM;
ce396282 10958 goto release_out;
52d52440
JS
10959 }
10960 list_add_tail(&dmabuf->list, &dma_buffer_list);
10961 }
10962 while (offset < fw->size) {
10963 temp_offset = offset;
10964 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 10965 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS
10966 memcpy(dmabuf->virt,
10967 fw->data + temp_offset,
079b5c91
JS
10968 fw->size - temp_offset);
10969 temp_offset = fw->size;
52d52440
JS
10970 break;
10971 }
52d52440
JS
10972 memcpy(dmabuf->virt, fw->data + temp_offset,
10973 SLI4_PAGE_SIZE);
88a2cfbb 10974 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS
10975 }
10976 rc = lpfc_wr_object(phba, &dma_buffer_list,
10977 (fw->size - offset), &offset);
ce396282
JS
10978 if (rc)
10979 goto release_out;
52d52440
JS
10980 }
10981 rc = offset;
10982 }
ce396282
JS
10983
10984release_out:
52d52440
JS
10985 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
10986 list_del(&dmabuf->list);
10987 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
10988 dmabuf->virt, dmabuf->phys);
10989 kfree(dmabuf);
10990 }
ce396282
JS
10991 release_firmware(fw);
10992out:
10993 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 10994 "3024 Firmware update done: %d.\n", rc);
ce396282 10995 return;
52d52440
JS
10996}
10997
c71ab861
JS
10998/**
10999 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
11000 * @phba: pointer to lpfc hba data structure.
11001 *
11002 * This routine is called to perform Linux generic firmware upgrade on device
11003 * that supports such feature.
11004 **/
11005int
11006lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
11007{
11008 uint8_t file_name[ELX_MODEL_NAME_SIZE];
11009 int ret;
11010 const struct firmware *fw;
11011
11012 /* Only supported on SLI4 interface type 2 for now */
11013 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11014 LPFC_SLI_INTF_IF_TYPE_2)
11015 return -EPERM;
11016
11017 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
11018
11019 if (fw_upgrade == INT_FW_UPGRADE) {
11020 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
11021 file_name, &phba->pcidev->dev,
11022 GFP_KERNEL, (void *)phba,
11023 lpfc_write_firmware);
11024 } else if (fw_upgrade == RUN_FW_UPGRADE) {
11025 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
11026 if (!ret)
11027 lpfc_write_firmware(fw, (void *)phba);
11028 } else {
11029 ret = -EINVAL;
11030 }
11031
11032 return ret;
11033}
11034
3772a991 11035/**
da0436e9 11036 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS
11037 * @pdev: pointer to PCI device
11038 * @pid: pointer to PCI device identifier
11039 *
da0436e9
JS
11040 * This routine is called from the kernel's PCI subsystem to device with
11041 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 11042 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS
11043 * information of the device and driver to see if the driver state that it
11044 * can support this kind of device. If the match is successful, the driver
11045 * core invokes this routine. If this routine determines it can claim the HBA,
11046 * it does all the initialization that it needs to do to handle the HBA
11047 * properly.
3772a991
JS
11048 *
11049 * Return code
11050 * 0 - driver can claim the device
11051 * negative value - driver can not claim the device
11052 **/
6f039790 11053static int
da0436e9 11054lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS
11055{
11056 struct lpfc_hba *phba;
11057 struct lpfc_vport *vport = NULL;
6669f9bb 11058 struct Scsi_Host *shost = NULL;
6c621a22 11059 int error;
3772a991
JS
11060 uint32_t cfg_mode, intr_mode;
11061
11062 /* Allocate memory for HBA structure */
11063 phba = lpfc_hba_alloc(pdev);
11064 if (!phba)
11065 return -ENOMEM;
11066
11067 /* Perform generic PCI device enabling operation */
11068 error = lpfc_enable_pci_dev(phba);
079b5c91 11069 if (error)
3772a991 11070 goto out_free_phba;
3772a991 11071
da0436e9
JS
11072 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
11073 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS
11074 if (error)
11075 goto out_disable_pci_dev;
11076
da0436e9
JS
11077 /* Set up SLI-4 specific device PCI memory space */
11078 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS
11079 if (error) {
11080 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11081 "1410 Failed to set up pci memory space.\n");
3772a991
JS
11082 goto out_disable_pci_dev;
11083 }
11084
da0436e9
JS
11085 /* Set up SLI-4 Specific device driver resources */
11086 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS
11087 if (error) {
11088 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
11089 "1412 Failed to set up driver resource.\n");
11090 goto out_unset_pci_mem_s4;
3772a991
JS
11091 }
11092
19ca7609 11093 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 11094 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 11095
3772a991
JS
11096 /* Set up common device driver resources */
11097 error = lpfc_setup_driver_resource_phase2(phba);
11098 if (error) {
11099 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11100 "1414 Failed to set up driver resource.\n");
6c621a22 11101 goto out_unset_driver_resource_s4;
3772a991
JS
11102 }
11103
079b5c91
JS
11104 /* Get the default values for Model Name and Description */
11105 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11106
3772a991
JS
11107 /* Create SCSI host to the physical port */
11108 error = lpfc_create_shost(phba);
11109 if (error) {
11110 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11111 "1415 Failed to create scsi host.\n");
3772a991
JS
11112 goto out_unset_driver_resource;
11113 }
9399627f 11114
5b75da2f 11115 /* Configure sysfs attributes */
3772a991
JS
11116 vport = phba->pport;
11117 error = lpfc_alloc_sysfs_attr(vport);
11118 if (error) {
9399627f 11119 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11120 "1416 Failed to allocate sysfs attr\n");
3772a991 11121 goto out_destroy_shost;
98c9ea5c 11122 }
875fbdfe 11123
6669f9bb 11124 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 11125 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 11126 cfg_mode = phba->cfg_use_msi;
5b75da2f 11127
7b15db32
JS
11128 /* Put device to a known state before enabling interrupt */
11129 lpfc_stop_port(phba);
895427bd 11130
7b15db32
JS
11131 /* Configure and enable interrupt */
11132 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
11133 if (intr_mode == LPFC_INTR_ERROR) {
11134 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11135 "0426 Failed to enable interrupt.\n");
11136 error = -ENODEV;
11137 goto out_free_sysfs_attr;
11138 }
11139 /* Default to single EQ for non-MSI-X */
895427bd
JS
11140 if (phba->intr_type != MSIX) {
11141 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
11142 phba->cfg_fcp_io_channel = 1;
2d7dbc4c 11143 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd 11144 phba->cfg_nvme_io_channel = 1;
2d7dbc4c
JS
11145 if (phba->nvmet_support)
11146 phba->cfg_nvmet_mrq = 1;
11147 }
895427bd
JS
11148 phba->io_channel_irqs = 1;
11149 }
11150
7b15db32
JS
11151 /* Set up SLI-4 HBA */
11152 if (lpfc_sli4_hba_setup(phba)) {
11153 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11154 "1421 Failed to set up hba\n");
11155 error = -ENODEV;
11156 goto out_disable_intr;
98c9ea5c 11157 }
858c9f6c 11158
7b15db32
JS
11159 /* Log the current active interrupt mode */
11160 phba->intr_mode = intr_mode;
11161 lpfc_log_intr_mode(phba, intr_mode);
11162
3772a991
JS
11163 /* Perform post initialization setup */
11164 lpfc_post_init_setup(phba);
dea3101e 11165
01649561
JS
11166 /* NVME support in FW earlier in the driver load corrects the
11167 * FC4 type making a check for nvme_support unnecessary.
11168 */
11169 if ((phba->nvmet_support == 0) &&
11170 (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
11171 /* Create NVME binding with nvme_fc_transport. This
d1f525aa
JS
11172 * ensures the vport is initialized. If the localport
11173 * create fails, it should not unload the driver to
11174 * support field issues.
01649561
JS
11175 */
11176 error = lpfc_nvme_create_localport(vport);
11177 if (error) {
11178 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11179 "6004 NVME registration failed, "
11180 "error x%x\n",
11181 error);
01649561
JS
11182 }
11183 }
895427bd 11184
c71ab861
JS
11185 /* check for firmware upgrade or downgrade */
11186 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 11187 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 11188
1c6834a7
JS
11189 /* Check if there are static vports to be created. */
11190 lpfc_create_static_vport(phba);
dea3101e
JB
11191 return 0;
11192
da0436e9
JS
11193out_disable_intr:
11194 lpfc_sli4_disable_intr(phba);
5b75da2f
JS
11195out_free_sysfs_attr:
11196 lpfc_free_sysfs_attr(vport);
3772a991
JS
11197out_destroy_shost:
11198 lpfc_destroy_shost(phba);
11199out_unset_driver_resource:
11200 lpfc_unset_driver_resource_phase2(phba);
da0436e9
JS
11201out_unset_driver_resource_s4:
11202 lpfc_sli4_driver_resource_unset(phba);
11203out_unset_pci_mem_s4:
11204 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS
11205out_disable_pci_dev:
11206 lpfc_disable_pci_dev(phba);
6669f9bb
JS
11207 if (shost)
11208 scsi_host_put(shost);
2e0fef85 11209out_free_phba:
3772a991 11210 lpfc_hba_free(phba);
dea3101e
JB
11211 return error;
11212}
11213
e59058c4 11214/**
da0436e9 11215 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS
11216 * @pdev: pointer to PCI device
11217 *
da0436e9
JS
11218 * This routine is called from the kernel's PCI subsystem to device with
11219 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS
11220 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11221 * device to be removed from the PCI subsystem properly.
e59058c4 11222 **/
6f039790 11223static void
da0436e9 11224lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 11225{
da0436e9 11226 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 11227 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 11228 struct lpfc_vport **vports;
da0436e9 11229 struct lpfc_hba *phba = vport->phba;
eada272d 11230 int i;
8a4df120 11231
da0436e9 11232 /* Mark the device unloading flag */
549e55cd 11233 spin_lock_irq(&phba->hbalock);
51ef4c26 11234 vport->load_flag |= FC_UNLOADING;
549e55cd 11235 spin_unlock_irq(&phba->hbalock);
2e0fef85 11236
da0436e9 11237 /* Free the HBA sysfs attributes */
858c9f6c
JS
11238 lpfc_free_sysfs_attr(vport);
11239
eada272d
JS
11240 /* Release all the vports against this physical port */
11241 vports = lpfc_create_vport_work_array(phba);
11242 if (vports != NULL)
587a37f6
JS
11243 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11244 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11245 continue;
eada272d 11246 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11247 }
eada272d
JS
11248 lpfc_destroy_vport_work_array(phba, vports);
11249
11250 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS
11251 fc_remove_host(shost);
11252 scsi_remove_host(shost);
da0436e9 11253
d613b6a7
JS
11254 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
11255 * localports are destroyed after to cleanup all transport memory.
895427bd 11256 */
87af33fe 11257 lpfc_cleanup(vport);
d613b6a7
JS
11258 lpfc_nvmet_destroy_targetport(phba);
11259 lpfc_nvme_destroy_localport(vport);
87af33fe 11260
2e0fef85 11261 /*
da0436e9 11262 * Bring down the SLI Layer. This step disables all interrupts,
2e0fef85 11263 * clears the rings, discards all mailbox commands, and resets
da0436e9 11264 * the HBA FCoE function.
2e0fef85 11265 */
da0436e9
JS
11266 lpfc_debugfs_terminate(vport);
11267 lpfc_sli4_hba_unset(phba);
a257bf90 11268
858c9f6c
JS
11269 spin_lock_irq(&phba->hbalock);
11270 list_del_init(&vport->listentry);
11271 spin_unlock_irq(&phba->hbalock);
11272
3677a3a7 11273 /* Perform scsi free before driver resource_unset since scsi
da0436e9 11274 * buffers are released to their corresponding pools here.
2e0fef85
JS
11275 */
11276 lpfc_scsi_free(phba);
895427bd 11277 lpfc_nvme_free(phba);
01649561 11278 lpfc_free_iocb_list(phba);
67d12733 11279
da0436e9 11280 lpfc_sli4_driver_resource_unset(phba);
ed957684 11281
da0436e9
JS
11282 /* Unmap adapter Control and Doorbell registers */
11283 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 11284
da0436e9
JS
11285 /* Release PCI resources and disable device's PCI function */
11286 scsi_host_put(shost);
11287 lpfc_disable_pci_dev(phba);
2e0fef85 11288
da0436e9 11289 /* Finally, free the driver's device data structure */
3772a991 11290 lpfc_hba_free(phba);
2e0fef85 11291
da0436e9 11292 return;
dea3101e
JB
11293}
11294
3a55b532 11295/**
da0436e9 11296 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS
11297 * @pdev: pointer to PCI device
11298 * @msg: power management message
11299 *
da0436e9
JS
11300 * This routine is called from the kernel's PCI subsystem to support system
11301 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
11302 * this method, it quiesces the device by stopping the driver's worker
11303 * thread for the device, turning off device's interrupt and DMA, and bring
11304 * the device offline. Note that as the driver implements the minimum PM
11305 * requirements to a power-aware driver's PM support for suspend/resume -- all
11306 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
11307 * method call will be treated as SUSPEND and the driver will fully
11308 * reinitialize its device during resume() method call, the driver will set
11309 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 11310 * according to the @msg provided by the PM.
3a55b532
JS
11311 *
11312 * Return code
3772a991
JS
11313 * 0 - driver suspended the device
11314 * Error otherwise
3a55b532
JS
11315 **/
11316static int
da0436e9 11317lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS
11318{
11319 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11320 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11321
11322 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 11323 "2843 PCI device Power Management suspend.\n");
3a55b532
JS
11324
11325 /* Bring down the device */
618a5230 11326 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS
11327 lpfc_offline(phba);
11328 kthread_stop(phba->worker_thread);
11329
11330 /* Disable interrupt from device */
da0436e9 11331 lpfc_sli4_disable_intr(phba);
5350d872 11332 lpfc_sli4_queue_destroy(phba);
3a55b532
JS
11333
11334 /* Save device state to PCI config space */
11335 pci_save_state(pdev);
11336 pci_set_power_state(pdev, PCI_D3hot);
11337
11338 return 0;
11339}
11340
11341/**
da0436e9 11342 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS
11343 * @pdev: pointer to PCI device
11344 *
da0436e9
JS
11345 * This routine is called from the kernel's PCI subsystem to support system
11346 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
11347 * this method, it restores the device's PCI config space state and fully
11348 * reinitializes the device and brings it online. Note that as the driver
11349 * implements the minimum PM requirements to a power-aware driver's PM for
11350 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11351 * to the suspend() method call will be treated as SUSPEND and the driver
11352 * will fully reinitialize its device during resume() method call, the device
11353 * will be set to PCI_D0 directly in PCI config space before restoring the
11354 * state.
3a55b532
JS
11355 *
11356 * Return code
3772a991
JS
11357 * 0 - driver suspended the device
11358 * Error otherwise
3a55b532
JS
11359 **/
11360static int
da0436e9 11361lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS
11362{
11363 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11364 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 11365 uint32_t intr_mode;
3a55b532
JS
11366 int error;
11367
11368 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 11369 "0292 PCI device Power Management resume.\n");
3a55b532
JS
11370
11371 /* Restore device state from PCI config space */
11372 pci_set_power_state(pdev, PCI_D0);
11373 pci_restore_state(pdev);
1dfb5a47
JS
11374
11375 /*
11376 * As the new kernel behavior of pci_restore_state() API call clears
11377 * device saved_state flag, need to save the restored state again.
11378 */
11379 pci_save_state(pdev);
11380
3a55b532
JS
11381 if (pdev->is_busmaster)
11382 pci_set_master(pdev);
11383
da0436e9 11384 /* Startup the kernel thread for this host adapter. */
3a55b532
JS
11385 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11386 "lpfc_worker_%d", phba->brd_no);
11387 if (IS_ERR(phba->worker_thread)) {
11388 error = PTR_ERR(phba->worker_thread);
11389 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11390 "0293 PM resume failed to start worker "
3a55b532
JS
11391 "thread: error=x%x.\n", error);
11392 return error;
11393 }
11394
5b75da2f 11395 /* Configure and enable interrupt */
da0436e9 11396 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 11397 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 11398 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11399 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS
11400 return -EIO;
11401 } else
11402 phba->intr_mode = intr_mode;
3a55b532
JS
11403
11404 /* Restart HBA and bring it online */
11405 lpfc_sli_brdrestart(phba);
11406 lpfc_online(phba);
11407
5b75da2f
JS
11408 /* Log the current active interrupt mode */
11409 lpfc_log_intr_mode(phba, phba->intr_mode);
11410
3a55b532
JS
11411 return 0;
11412}
11413
75baf696
JS
11414/**
11415 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
11416 * @phba: pointer to lpfc hba data structure.
11417 *
11418 * This routine is called to prepare the SLI4 device for PCI slot recover. It
11419 * aborts all the outstanding SCSI I/Os to the pci device.
11420 **/
11421static void
11422lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
11423{
75baf696
JS
11424 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11425 "2828 PCI channel I/O abort preparing for recovery\n");
11426 /*
11427 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11428 * and let the SCSI mid-layer to retry them to recover.
11429 */
db55fba8 11430 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS
11431}
11432
11433/**
11434 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
11435 * @phba: pointer to lpfc hba data structure.
11436 *
11437 * This routine is called to prepare the SLI4 device for PCI slot reset. It
11438 * disables the device interrupt and pci device, and aborts the internal FCP
11439 * pending I/Os.
11440 **/
11441static void
11442lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
11443{
11444 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11445 "2826 PCI channel disable preparing for reset\n");
11446
11447 /* Block any management I/Os to the device */
618a5230 11448 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS
11449
11450 /* Block all SCSI devices' I/Os on the host */
11451 lpfc_scsi_dev_block(phba);
11452
ea714f3d
JS
11453 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11454 lpfc_sli_flush_fcp_rings(phba);
11455
75baf696
JS
11456 /* stop all timers */
11457 lpfc_stop_hba_timers(phba);
11458
11459 /* Disable interrupt and pci device */
11460 lpfc_sli4_disable_intr(phba);
5350d872 11461 lpfc_sli4_queue_destroy(phba);
75baf696 11462 pci_disable_device(phba->pcidev);
75baf696
JS
11463}
11464
11465/**
11466 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
11467 * @phba: pointer to lpfc hba data structure.
11468 *
11469 * This routine is called to prepare the SLI4 device for PCI slot permanently
11470 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11471 * pending I/Os.
11472 **/
11473static void
11474lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
11475{
11476 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11477 "2827 PCI channel permanent disable for failure\n");
11478
11479 /* Block all SCSI devices' I/Os on the host */
11480 lpfc_scsi_dev_block(phba);
11481
11482 /* stop all timers */
11483 lpfc_stop_hba_timers(phba);
11484
11485 /* Clean up all driver's outstanding SCSI I/Os */
11486 lpfc_sli_flush_fcp_rings(phba);
11487}
11488
8d63f375 11489/**
da0436e9 11490 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS
11491 * @pdev: pointer to PCI device.
11492 * @state: the current PCI connection state.
8d63f375 11493 *
da0436e9
JS
11494 * This routine is called from the PCI subsystem for error handling to device
11495 * with SLI-4 interface spec. This function is called by the PCI subsystem
11496 * after a PCI bus error affecting this device has been detected. When this
11497 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11498 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11499 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS
11500 *
11501 * Return codes
3772a991
JS
11502 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11503 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11504 **/
3772a991 11505static pci_ers_result_t
da0436e9 11506lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11507{
75baf696
JS
11508 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11509 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11510
11511 switch (state) {
11512 case pci_channel_io_normal:
11513 /* Non-fatal error, prepare for recovery */
11514 lpfc_sli4_prep_dev_for_recover(phba);
11515 return PCI_ERS_RESULT_CAN_RECOVER;
11516 case pci_channel_io_frozen:
11517 /* Fatal error, prepare for slot reset */
11518 lpfc_sli4_prep_dev_for_reset(phba);
11519 return PCI_ERS_RESULT_NEED_RESET;
11520 case pci_channel_io_perm_failure:
11521 /* Permanent failure, prepare for device down */
11522 lpfc_sli4_prep_dev_for_perm_failure(phba);
11523 return PCI_ERS_RESULT_DISCONNECT;
11524 default:
11525 /* Unknown state, prepare and request slot reset */
11526 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11527 "2825 Unknown PCI error state: x%x\n", state);
11528 lpfc_sli4_prep_dev_for_reset(phba);
11529 return PCI_ERS_RESULT_NEED_RESET;
11530 }
8d63f375
LV
11531}
11532
11533/**
da0436e9 11534 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS
11535 * @pdev: pointer to PCI device.
11536 *
da0436e9
JS
11537 * This routine is called from the PCI subsystem for error handling to device
11538 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11539 * restart the PCI card from scratch, as if from a cold-boot. During the
11540 * PCI subsystem error recovery, after the driver returns
3772a991 11541 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS
11542 * recovery and then call this routine before calling the .resume method to
11543 * recover the device. This function will initialize the HBA device, enable
11544 * the interrupt, but it will just put the HBA to offline state without
11545 * passing any I/O traffic.
8d63f375 11546 *
e59058c4 11547 * Return codes
3772a991
JS
11548 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11549 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11550 */
3772a991 11551static pci_ers_result_t
da0436e9 11552lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11553{
75baf696
JS
11554 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11555 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11556 struct lpfc_sli *psli = &phba->sli;
11557 uint32_t intr_mode;
11558
11559 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11560 if (pci_enable_device_mem(pdev)) {
11561 printk(KERN_ERR "lpfc: Cannot re-enable "
11562 "PCI device after reset.\n");
11563 return PCI_ERS_RESULT_DISCONNECT;
11564 }
11565
11566 pci_restore_state(pdev);
0a96e975
JS
11567
11568 /*
11569 * As the new kernel behavior of pci_restore_state() API call clears
11570 * device saved_state flag, need to save the restored state again.
11571 */
11572 pci_save_state(pdev);
11573
75baf696
JS
11574 if (pdev->is_busmaster)
11575 pci_set_master(pdev);
11576
11577 spin_lock_irq(&phba->hbalock);
11578 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11579 spin_unlock_irq(&phba->hbalock);
11580
11581 /* Configure and enable interrupt */
11582 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11583 if (intr_mode == LPFC_INTR_ERROR) {
11584 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11585 "2824 Cannot re-enable interrupt after "
11586 "slot reset.\n");
11587 return PCI_ERS_RESULT_DISCONNECT;
11588 } else
11589 phba->intr_mode = intr_mode;
11590
11591 /* Log the current active interrupt mode */
11592 lpfc_log_intr_mode(phba, phba->intr_mode);
11593
8d63f375
LV
11594 return PCI_ERS_RESULT_RECOVERED;
11595}
11596
11597/**
da0436e9 11598 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11599 * @pdev: pointer to PCI device
8d63f375 11600 *
3772a991 11601 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11602 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS
11603 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11604 * error recovery. After this call, traffic can start to flow from this device
11605 * again.
da0436e9 11606 **/
3772a991 11607static void
da0436e9 11608lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11609{
75baf696
JS
11610 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11611 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11612
11613 /*
11614 * In case of slot reset, as function reset is performed through
11615 * mailbox command which needs DMA to be enabled, this operation
11616 * has to be moved to the io resume phase. Taking device offline
11617 * will perform the necessary cleanup.
11618 */
11619 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11620 /* Perform device reset */
618a5230 11621 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS
11622 lpfc_offline(phba);
11623 lpfc_sli_brdrestart(phba);
11624 /* Bring the device back online */
11625 lpfc_online(phba);
11626 }
11627
11628 /* Clean up Advanced Error Reporting (AER) if needed */
11629 if (phba->hba_flag & HBA_AER_ENABLED)
11630 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV
11631}
11632
3772a991
JS
11633/**
11634 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11635 * @pdev: pointer to PCI device
11636 * @pid: pointer to PCI device identifier
11637 *
11638 * This routine is to be registered to the kernel's PCI subsystem. When an
11639 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11640 * at PCI device-specific information of the device and driver to see if the
11641 * driver state that it can support this kind of device. If the match is
11642 * successful, the driver core invokes this routine. This routine dispatches
11643 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11644 * do all the initialization that it needs to do to handle the HBA device
11645 * properly.
11646 *
11647 * Return code
11648 * 0 - driver can claim the device
11649 * negative value - driver can not claim the device
11650 **/
6f039790 11651static int
3772a991
JS
11652lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11653{
11654 int rc;
8fa38513 11655 struct lpfc_sli_intf intf;
3772a991 11656
28baac74 11657 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS
11658 return -ENODEV;
11659
8fa38513 11660 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11661 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11662 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11663 else
3772a991 11664 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11665
3772a991
JS
11666 return rc;
11667}
11668
11669/**
11670 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11671 * @pdev: pointer to PCI device
11672 *
11673 * This routine is to be registered to the kernel's PCI subsystem. When an
11674 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11675 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11676 * remove routine, which will perform all the necessary cleanup for the
11677 * device to be removed from the PCI subsystem properly.
11678 **/
6f039790 11679static void
3772a991
JS
11680lpfc_pci_remove_one(struct pci_dev *pdev)
11681{
11682 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11683 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11684
11685 switch (phba->pci_dev_grp) {
11686 case LPFC_PCI_DEV_LP:
11687 lpfc_pci_remove_one_s3(pdev);
11688 break;
da0436e9
JS
11689 case LPFC_PCI_DEV_OC:
11690 lpfc_pci_remove_one_s4(pdev);
11691 break;
3772a991
JS
11692 default:
11693 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11694 "1424 Invalid PCI device group: 0x%x\n",
11695 phba->pci_dev_grp);
11696 break;
11697 }
11698 return;
11699}
11700
11701/**
11702 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11703 * @pdev: pointer to PCI device
11704 * @msg: power management message
11705 *
11706 * This routine is to be registered to the kernel's PCI subsystem to support
11707 * system Power Management (PM). When PM invokes this method, it dispatches
11708 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11709 * suspend the device.
11710 *
11711 * Return code
11712 * 0 - driver suspended the device
11713 * Error otherwise
11714 **/
11715static int
11716lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11717{
11718 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11719 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11720 int rc = -ENODEV;
11721
11722 switch (phba->pci_dev_grp) {
11723 case LPFC_PCI_DEV_LP:
11724 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11725 break;
da0436e9
JS
11726 case LPFC_PCI_DEV_OC:
11727 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11728 break;
3772a991
JS
11729 default:
11730 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11731 "1425 Invalid PCI device group: 0x%x\n",
11732 phba->pci_dev_grp);
11733 break;
11734 }
11735 return rc;
11736}
11737
11738/**
11739 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
11740 * @pdev: pointer to PCI device
11741 *
11742 * This routine is to be registered to the kernel's PCI subsystem to support
11743 * system Power Management (PM). When PM invokes this method, it dispatches
11744 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
11745 * resume the device.
11746 *
11747 * Return code
11748 * 0 - driver suspended the device
11749 * Error otherwise
11750 **/
11751static int
11752lpfc_pci_resume_one(struct pci_dev *pdev)
11753{
11754 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11755 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11756 int rc = -ENODEV;
11757
11758 switch (phba->pci_dev_grp) {
11759 case LPFC_PCI_DEV_LP:
11760 rc = lpfc_pci_resume_one_s3(pdev);
11761 break;
da0436e9
JS
11762 case LPFC_PCI_DEV_OC:
11763 rc = lpfc_pci_resume_one_s4(pdev);
11764 break;
3772a991
JS
11765 default:
11766 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11767 "1426 Invalid PCI device group: 0x%x\n",
11768 phba->pci_dev_grp);
11769 break;
11770 }
11771 return rc;
11772}
11773
11774/**
11775 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
11776 * @pdev: pointer to PCI device.
11777 * @state: the current PCI connection state.
11778 *
11779 * This routine is registered to the PCI subsystem for error handling. This
11780 * function is called by the PCI subsystem after a PCI bus error affecting
11781 * this device has been detected. When this routine is invoked, it dispatches
11782 * the action to the proper SLI-3 or SLI-4 device error detected handling
11783 * routine, which will perform the proper error detected operation.
11784 *
11785 * Return codes
11786 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11787 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11788 **/
11789static pci_ers_result_t
11790lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
11791{
11792 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11793 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11794 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11795
11796 switch (phba->pci_dev_grp) {
11797 case LPFC_PCI_DEV_LP:
11798 rc = lpfc_io_error_detected_s3(pdev, state);
11799 break;
da0436e9
JS
11800 case LPFC_PCI_DEV_OC:
11801 rc = lpfc_io_error_detected_s4(pdev, state);
11802 break;
3772a991
JS
11803 default:
11804 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11805 "1427 Invalid PCI device group: 0x%x\n",
11806 phba->pci_dev_grp);
11807 break;
11808 }
11809 return rc;
11810}
11811
11812/**
11813 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
11814 * @pdev: pointer to PCI device.
11815 *
11816 * This routine is registered to the PCI subsystem for error handling. This
11817 * function is called after PCI bus has been reset to restart the PCI card
11818 * from scratch, as if from a cold-boot. When this routine is invoked, it
11819 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
11820 * routine, which will perform the proper device reset.
11821 *
11822 * Return codes
11823 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11824 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11825 **/
11826static pci_ers_result_t
11827lpfc_io_slot_reset(struct pci_dev *pdev)
11828{
11829 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11830 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11831 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11832
11833 switch (phba->pci_dev_grp) {
11834 case LPFC_PCI_DEV_LP:
11835 rc = lpfc_io_slot_reset_s3(pdev);
11836 break;
da0436e9
JS
11837 case LPFC_PCI_DEV_OC:
11838 rc = lpfc_io_slot_reset_s4(pdev);
11839 break;
3772a991
JS
11840 default:
11841 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11842 "1428 Invalid PCI device group: 0x%x\n",
11843 phba->pci_dev_grp);
11844 break;
11845 }
11846 return rc;
11847}
11848
11849/**
11850 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
11851 * @pdev: pointer to PCI device
11852 *
11853 * This routine is registered to the PCI subsystem for error handling. It
11854 * is called when kernel error recovery tells the lpfc driver that it is
11855 * OK to resume normal PCI operation after PCI bus error recovery. When
11856 * this routine is invoked, it dispatches the action to the proper SLI-3
11857 * or SLI-4 device io_resume routine, which will resume the device operation.
11858 **/
11859static void
11860lpfc_io_resume(struct pci_dev *pdev)
11861{
11862 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11863 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11864
11865 switch (phba->pci_dev_grp) {
11866 case LPFC_PCI_DEV_LP:
11867 lpfc_io_resume_s3(pdev);
11868 break;
da0436e9
JS
11869 case LPFC_PCI_DEV_OC:
11870 lpfc_io_resume_s4(pdev);
11871 break;
3772a991
JS
11872 default:
11873 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11874 "1429 Invalid PCI device group: 0x%x\n",
11875 phba->pci_dev_grp);
11876 break;
11877 }
11878 return;
11879}
11880
1ba981fd
JS
11881/**
11882 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
11883 * @phba: pointer to lpfc hba data structure.
11884 *
11885 * This routine checks to see if OAS is supported for this adapter. If
11886 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
11887 * the enable oas flag is cleared and the pool created for OAS device data
11888 * is destroyed.
11889 *
11890 **/
11891void
11892lpfc_sli4_oas_verify(struct lpfc_hba *phba)
11893{
11894
11895 if (!phba->cfg_EnableXLane)
11896 return;
11897
11898 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
11899 phba->cfg_fof = 1;
11900 } else {
f38fa0bb 11901 phba->cfg_fof = 0;
1ba981fd
JS
11902 if (phba->device_data_mem_pool)
11903 mempool_destroy(phba->device_data_mem_pool);
11904 phba->device_data_mem_pool = NULL;
11905 }
11906
11907 return;
11908}
11909
11910/**
11911 * lpfc_fof_queue_setup - Set up all the fof queues
11912 * @phba: pointer to lpfc hba data structure.
11913 *
11914 * This routine is invoked to set up all the fof queues for the FC HBA
11915 * operation.
11916 *
11917 * Return codes
11918 * 0 - successful
11919 * -ENOMEM - No available memory
11920 **/
11921int
11922lpfc_fof_queue_setup(struct lpfc_hba *phba)
11923{
895427bd 11924 struct lpfc_sli_ring *pring;
1ba981fd
JS
11925 int rc;
11926
11927 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
11928 if (rc)
11929 return -ENOMEM;
11930
f38fa0bb 11931 if (phba->cfg_fof) {
1ba981fd
JS
11932
11933 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
11934 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
11935 if (rc)
11936 goto out_oas_cq;
11937
11938 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
11939 phba->sli4_hba.oas_cq, LPFC_FCP);
11940 if (rc)
11941 goto out_oas_wq;
11942
895427bd
JS
11943 /* Bind this CQ/WQ to the NVME ring */
11944 pring = phba->sli4_hba.oas_wq->pring;
11945 pring->sli.sli4.wqp =
11946 (void *)phba->sli4_hba.oas_wq;
11947 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS
11948 }
11949
11950 return 0;
11951
11952out_oas_wq:
f38fa0bb 11953 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS
11954out_oas_cq:
11955 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
11956 return rc;
11957
11958}
11959
11960/**
11961 * lpfc_fof_queue_create - Create all the fof queues
11962 * @phba: pointer to lpfc hba data structure.
11963 *
11964 * This routine is invoked to allocate all the fof queues for the FC HBA
11965 * operation. For each SLI4 queue type, the parameters such as queue entry
11966 * count (queue depth) shall be taken from the module parameter. For now,
11967 * we just use some constant number as place holder.
11968 *
11969 * Return codes
11970 * 0 - successful
11971 * -ENOMEM - No availble memory
11972 * -EIO - The mailbox failed to complete successfully.
11973 **/
11974int
11975lpfc_fof_queue_create(struct lpfc_hba *phba)
11976{
11977 struct lpfc_queue *qdesc;
7e04e21a 11978 uint32_t wqesize;
1ba981fd
JS
11979
11980 /* Create FOF EQ */
11981 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
11982 phba->sli4_hba.eq_ecount);
11983 if (!qdesc)
11984 goto out_error;
11985
11986 phba->sli4_hba.fof_eq = qdesc;
11987
f38fa0bb 11988 if (phba->cfg_fof) {
1ba981fd
JS
11989
11990 /* Create OAS CQ */
11991 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
11992 phba->sli4_hba.cq_ecount);
11993 if (!qdesc)
11994 goto out_error;
11995
11996 phba->sli4_hba.oas_cq = qdesc;
11997
11998 /* Create OAS WQ */
7e04e21a
JS
11999 wqesize = (phba->fcp_embed_io) ?
12000 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
12001 qdesc = lpfc_sli4_queue_alloc(phba, wqesize,
1ba981fd 12002 phba->sli4_hba.wq_ecount);
7e04e21a 12003
1ba981fd
JS
12004 if (!qdesc)
12005 goto out_error;
12006
12007 phba->sli4_hba.oas_wq = qdesc;
895427bd 12008 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS
12009
12010 }
12011 return 0;
12012
12013out_error:
12014 lpfc_fof_queue_destroy(phba);
12015 return -ENOMEM;
12016}
12017
12018/**
12019 * lpfc_fof_queue_destroy - Destroy all the fof queues
12020 * @phba: pointer to lpfc hba data structure.
12021 *
12022 * This routine is invoked to release all the SLI4 queues with the FC HBA
12023 * operation.
12024 *
12025 * Return codes
12026 * 0 - successful
12027 **/
12028int
12029lpfc_fof_queue_destroy(struct lpfc_hba *phba)
12030{
12031 /* Release FOF Event queue */
12032 if (phba->sli4_hba.fof_eq != NULL) {
12033 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
12034 phba->sli4_hba.fof_eq = NULL;
12035 }
12036
12037 /* Release OAS Completion queue */
12038 if (phba->sli4_hba.oas_cq != NULL) {
12039 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
12040 phba->sli4_hba.oas_cq = NULL;
12041 }
12042
12043 /* Release OAS Work queue */
12044 if (phba->sli4_hba.oas_wq != NULL) {
12045 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
12046 phba->sli4_hba.oas_wq = NULL;
12047 }
12048 return 0;
12049}
12050
dea3101e
JB
12051MODULE_DEVICE_TABLE(pci, lpfc_id_table);
12052
a55b2d21 12053static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV
12054 .error_detected = lpfc_io_error_detected,
12055 .slot_reset = lpfc_io_slot_reset,
12056 .resume = lpfc_io_resume,
12057};
12058
dea3101e
JB
12059static struct pci_driver lpfc_driver = {
12060 .name = LPFC_DRIVER_NAME,
12061 .id_table = lpfc_id_table,
12062 .probe = lpfc_pci_probe_one,
6f039790 12063 .remove = lpfc_pci_remove_one,
85e8a239 12064 .shutdown = lpfc_pci_remove_one,
3a55b532 12065 .suspend = lpfc_pci_suspend_one,
3772a991 12066 .resume = lpfc_pci_resume_one,
2e0fef85 12067 .err_handler = &lpfc_err_handler,
dea3101e
JB
12068};
12069
3ef6d24c 12070static const struct file_operations lpfc_mgmt_fop = {
858feacd 12071 .owner = THIS_MODULE,
3ef6d24c
JS
12072};
12073
12074static struct miscdevice lpfc_mgmt_dev = {
12075 .minor = MISC_DYNAMIC_MINOR,
12076 .name = "lpfcmgmt",
12077 .fops = &lpfc_mgmt_fop,
12078};
12079
e59058c4 12080/**
3621a710 12081 * lpfc_init - lpfc module initialization routine
e59058c4
JS
12082 *
12083 * This routine is to be invoked when the lpfc module is loaded into the
12084 * kernel. The special kernel macro module_init() is used to indicate the
12085 * role of this routine to the kernel as lpfc module entry point.
12086 *
12087 * Return codes
12088 * 0 - successful
12089 * -ENOMEM - FC attach transport failed
12090 * all others - failed
12091 */
dea3101e
JB
12092static int __init
12093lpfc_init(void)
12094{
12095 int error = 0;
12096
12097 printk(LPFC_MODULE_DESC "\n");
c44ce173 12098 printk(LPFC_COPYRIGHT "\n");
dea3101e 12099
3ef6d24c
JS
12100 error = misc_register(&lpfc_mgmt_dev);
12101 if (error)
12102 printk(KERN_ERR "Could not register lpfcmgmt device, "
12103 "misc_register returned with status %d", error);
12104
458c083e
JS
12105 lpfc_transport_functions.vport_create = lpfc_vport_create;
12106 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e
JB
12107 lpfc_transport_template =
12108 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 12109 if (lpfc_transport_template == NULL)
dea3101e 12110 return -ENOMEM;
458c083e
JS
12111 lpfc_vport_transport_template =
12112 fc_attach_transport(&lpfc_vport_transport_functions);
12113 if (lpfc_vport_transport_template == NULL) {
12114 fc_release_transport(lpfc_transport_template);
12115 return -ENOMEM;
7ee5d43e 12116 }
7bb03bbf
JS
12117
12118 /* Initialize in case vector mapping is needed */
b246de17 12119 lpfc_used_cpu = NULL;
2ea259ee 12120 lpfc_present_cpu = num_present_cpus();
7bb03bbf 12121
dea3101e 12122 error = pci_register_driver(&lpfc_driver);
92d7f7b0 12123 if (error) {
dea3101e 12124 fc_release_transport(lpfc_transport_template);
458c083e 12125 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 12126 }
dea3101e
JB
12127
12128 return error;
12129}
12130
e59058c4 12131/**
3621a710 12132 * lpfc_exit - lpfc module removal routine
e59058c4
JS
12133 *
12134 * This routine is invoked when the lpfc module is removed from the kernel.
12135 * The special kernel macro module_exit() is used to indicate the role of
12136 * this routine to the kernel as lpfc module exit point.
12137 */
dea3101e
JB
12138static void __exit
12139lpfc_exit(void)
12140{
3ef6d24c 12141 misc_deregister(&lpfc_mgmt_dev);
dea3101e
JB
12142 pci_unregister_driver(&lpfc_driver);
12143 fc_release_transport(lpfc_transport_template);
458c083e 12144 fc_release_transport(lpfc_vport_transport_template);
81301a9b 12145 if (_dump_buf_data) {
6a9c52cf
JS
12146 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
12147 "_dump_buf_data at 0x%p\n",
81301a9b
JS
12148 (1L << _dump_buf_data_order), _dump_buf_data);
12149 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
12150 }
12151
12152 if (_dump_buf_dif) {
6a9c52cf
JS
12153 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
12154 "_dump_buf_dif at 0x%p\n",
81301a9b
JS
12155 (1L << _dump_buf_dif_order), _dump_buf_dif);
12156 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
12157 }
b246de17 12158 kfree(lpfc_used_cpu);
7973967f 12159 idr_destroy(&lpfc_hba_index);
dea3101e
JB
12160}
12161
12162module_init(lpfc_init);
12163module_exit(lpfc_exit);
12164MODULE_LICENSE("GPL");
12165MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 12166MODULE_AUTHOR("Broadcom");
dea3101e 12167MODULE_VERSION("0:" LPFC_DRIVER_VERSION);