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scsi: lpfc: Limit amount of work processed in IRQ
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CommitLineData
dea3101e
JB
1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS
4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB
10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e
JB
22 *******************************************************************/
23
dea3101e
JB
24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e
JB
30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
dea3101e 40
91886523 41#include <scsi/scsi.h>
dea3101e
JB
42#include <scsi/scsi_device.h>
43#include <scsi/scsi_host.h>
44#include <scsi/scsi_transport_fc.h>
86c67379
JS
45#include <scsi/scsi_tcq.h>
46#include <scsi/fc/fc_fs.h>
47
48#include <linux/nvme-fc-driver.h>
dea3101e 49
da0436e9 50#include "lpfc_hw4.h"
dea3101e
JB
51#include "lpfc_hw.h"
52#include "lpfc_sli.h"
da0436e9 53#include "lpfc_sli4.h"
ea2151b4 54#include "lpfc_nl.h"
dea3101e 55#include "lpfc_disc.h"
dea3101e 56#include "lpfc.h"
895427bd
JS
57#include "lpfc_scsi.h"
58#include "lpfc_nvme.h"
86c67379 59#include "lpfc_nvmet.h"
dea3101e
JB
60#include "lpfc_logmsg.h"
61#include "lpfc_crtn.h"
92d7f7b0 62#include "lpfc_vport.h"
dea3101e 63#include "lpfc_version.h"
12f44457 64#include "lpfc_ids.h"
dea3101e 65
81301a9b
JS
66char *_dump_buf_data;
67unsigned long _dump_buf_data_order;
68char *_dump_buf_dif;
69unsigned long _dump_buf_dif_order;
70spinlock_t _dump_buf_lock;
71
7bb03bbf 72/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS
73uint16_t *lpfc_used_cpu;
74uint32_t lpfc_present_cpu;
7bb03bbf 75
dea3101e
JB
76static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
77static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 78static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS
79static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
80static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 81static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 82static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 83static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 84static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS
85static int lpfc_init_active_sgl_array(struct lpfc_hba *);
86static void lpfc_free_active_sgl(struct lpfc_hba *);
87static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
88static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
89static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
90static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
91static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS
92static void lpfc_sli4_disable_intr(struct lpfc_hba *);
93static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 94static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e
JB
95
96static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 97static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 98static DEFINE_IDR(lpfc_hba_index);
f358dd0c 99#define LPFC_NVMET_BUF_POST 254
dea3101e 100
e59058c4 101/**
3621a710 102 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS
103 * @phba: pointer to lpfc hba data structure.
104 *
105 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
106 * mailbox command. It retrieves the revision information from the HBA and
107 * collects the Vital Product Data (VPD) about the HBA for preparing the
108 * configuration of the HBA.
109 *
110 * Return codes:
111 * 0 - success.
112 * -ERESTART - requests the SLI layer to reset the HBA and try again.
113 * Any other value - indicates an error.
114 **/
dea3101e 115int
2e0fef85 116lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e
JB
117{
118 lpfc_vpd_t *vp = &phba->vpd;
119 int i = 0, rc;
120 LPFC_MBOXQ_t *pmb;
121 MAILBOX_t *mb;
122 char *lpfc_vpd_data = NULL;
123 uint16_t offset = 0;
124 static char licensed[56] =
125 "key unlock for use with gnu public licensed code only\0";
65a29c16 126 static int init_key = 1;
dea3101e
JB
127
128 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
129 if (!pmb) {
2e0fef85 130 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
131 return -ENOMEM;
132 }
133
04c68496 134 mb = &pmb->u.mb;
2e0fef85 135 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
136
137 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS
138 if (init_key) {
139 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 140
65a29c16
JS
141 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
142 *ptext = cpu_to_be32(*ptext);
143 init_key = 0;
144 }
dea3101e
JB
145
146 lpfc_read_nv(phba, pmb);
147 memset((char*)mb->un.varRDnvp.rsvd3, 0,
148 sizeof (mb->un.varRDnvp.rsvd3));
149 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
150 sizeof (licensed));
151
152 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
153
154 if (rc != MBX_SUCCESS) {
ed957684 155 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 156 "0324 Config Port initialization "
dea3101e
JB
157 "error, mbxCmd x%x READ_NVPARM, "
158 "mbxStatus x%x\n",
dea3101e
JB
159 mb->mbxCommand, mb->mbxStatus);
160 mempool_free(pmb, phba->mbox_mem_pool);
161 return -ERESTART;
162 }
163 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS
164 sizeof(phba->wwnn));
165 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
166 sizeof(phba->wwpn));
dea3101e
JB
167 }
168
92d7f7b0
JS
169 phba->sli3_options = 0x0;
170
dea3101e
JB
171 /* Setup and issue mailbox READ REV command */
172 lpfc_read_rev(phba, pmb);
173 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
174 if (rc != MBX_SUCCESS) {
ed957684 175 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 176 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 177 "READ_REV, mbxStatus x%x\n",
dea3101e
JB
178 mb->mbxCommand, mb->mbxStatus);
179 mempool_free( pmb, phba->mbox_mem_pool);
180 return -ERESTART;
181 }
182
92d7f7b0 183
1de933f3
JSEC
184 /*
185 * The value of rr must be 1 since the driver set the cv field to 1.
186 * This setting requires the FW to set all revision fields.
dea3101e 187 */
1de933f3 188 if (mb->un.varRdRev.rr == 0) {
dea3101e 189 vp->rev.rBit = 0;
1de933f3 190 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS
191 "0440 Adapter failed to init, READ_REV has "
192 "missing revision information.\n");
dea3101e
JB
193 mempool_free(pmb, phba->mbox_mem_pool);
194 return -ERESTART;
dea3101e
JB
195 }
196
495a714c
JS
197 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
198 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 199 return -EINVAL;
495a714c 200 }
ed957684 201
dea3101e 202 /* Save information as VPD data */
1de933f3 203 vp->rev.rBit = 1;
92d7f7b0 204 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC
205 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
206 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
207 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
208 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e
JB
209 vp->rev.biuRev = mb->un.varRdRev.biuRev;
210 vp->rev.smRev = mb->un.varRdRev.smRev;
211 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
212 vp->rev.endecRev = mb->un.varRdRev.endecRev;
213 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
214 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
215 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
216 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
217 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
218 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
219
92d7f7b0
JS
220 /* If the sli feature level is less then 9, we must
221 * tear down all RPIs and VPIs on link down if NPIV
222 * is enabled.
223 */
224 if (vp->rev.feaLevelHigh < 9)
225 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
226
dea3101e
JB
227 if (lpfc_is_LC_HBA(phba->pcidev->device))
228 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
229 sizeof (phba->RandomData));
230
dea3101e 231 /* Get adapter VPD information */
dea3101e
JB
232 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
233 if (!lpfc_vpd_data)
d7c255b2 234 goto out_free_mbox;
dea3101e 235 do {
a0c87cbd 236 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e
JB
237 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
238
239 if (rc != MBX_SUCCESS) {
240 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 241 "0441 VPD not present on adapter, "
dea3101e 242 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 243 mb->mbxCommand, mb->mbxStatus);
74b72a59 244 mb->un.varDmp.word_cnt = 0;
dea3101e 245 }
04c68496
JS
246 /* dump mem may return a zero when finished or we got a
247 * mailbox error, either way we are done.
248 */
249 if (mb->un.varDmp.word_cnt == 0)
250 break;
74b72a59
JW
251 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
252 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS
253 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
254 lpfc_vpd_data + offset,
92d7f7b0 255 mb->un.varDmp.word_cnt);
dea3101e 256 offset += mb->un.varDmp.word_cnt;
74b72a59
JW
257 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
258 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e
JB
259
260 kfree(lpfc_vpd_data);
dea3101e
JB
261out_free_mbox:
262 mempool_free(pmb, phba->mbox_mem_pool);
263 return 0;
264}
265
e59058c4 266/**
3621a710 267 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS
268 * @phba: pointer to lpfc hba data structure.
269 * @pmboxq: pointer to the driver internal queue element for mailbox command.
270 *
271 * This is the completion handler for driver's configuring asynchronous event
272 * mailbox command to the device. If the mailbox command returns successfully,
273 * it will set internal async event support flag to 1; otherwise, it will
274 * set internal async event support flag to 0.
275 **/
57127f15
JS
276static void
277lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
278{
04c68496 279 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS
280 phba->temp_sensor_support = 1;
281 else
282 phba->temp_sensor_support = 0;
283 mempool_free(pmboxq, phba->mbox_mem_pool);
284 return;
285}
286
97207482 287/**
3621a710 288 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS
289 * @phba: pointer to lpfc hba data structure.
290 * @pmboxq: pointer to the driver internal queue element for mailbox command.
291 *
292 * This is the completion handler for dump mailbox command for getting
293 * wake up parameters. When this command complete, the response contain
294 * Option rom version of the HBA. This function translate the version number
295 * into a human readable string and store it in OptionROMVersion.
296 **/
297static void
298lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
299{
300 struct prog_id *prg;
301 uint32_t prog_id_word;
302 char dist = ' ';
303 /* character array used for decoding dist type. */
304 char dist_char[] = "nabx";
305
04c68496 306 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 307 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 308 return;
9f1e1b50 309 }
97207482
JS
310
311 prg = (struct prog_id *) &prog_id_word;
312
313 /* word 7 contain option rom version */
04c68496 314 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS
315
316 /* Decode the Option rom version word to a readable string */
317 if (prg->dist < 4)
318 dist = dist_char[prg->dist];
319
320 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 321 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS
322 prg->ver, prg->rev, prg->lev);
323 else
a2fc4aef 324 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS
325 prg->ver, prg->rev, prg->lev,
326 dist, prg->num);
9f1e1b50 327 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS
328 return;
329}
330
0558056c
JS
331/**
332 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
333 * cfg_soft_wwnn, cfg_soft_wwpn
334 * @vport: pointer to lpfc vport data structure.
335 *
336 *
337 * Return codes
338 * None.
339 **/
340void
341lpfc_update_vport_wwn(struct lpfc_vport *vport)
342{
aeb3c817
JS
343 uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
344 u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0];
345
0558056c
JS
346 /* If the soft name exists then update it using the service params */
347 if (vport->phba->cfg_soft_wwnn)
348 u64_to_wwn(vport->phba->cfg_soft_wwnn,
349 vport->fc_sparam.nodeName.u.wwn);
350 if (vport->phba->cfg_soft_wwpn)
351 u64_to_wwn(vport->phba->cfg_soft_wwpn,
352 vport->fc_sparam.portName.u.wwn);
353
354 /*
355 * If the name is empty or there exists a soft name
356 * then copy the service params name, otherwise use the fc name
357 */
358 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
359 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
360 sizeof(struct lpfc_name));
361 else
362 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
363 sizeof(struct lpfc_name));
364
aeb3c817
JS
365 /*
366 * If the port name has changed, then set the Param changes flag
367 * to unreg the login
368 */
369 if (vport->fc_portname.u.wwn[0] != 0 &&
370 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
371 sizeof(struct lpfc_name)))
372 vport->vport_flag |= FAWWPN_PARAM_CHG;
373
374 if (vport->fc_portname.u.wwn[0] == 0 ||
375 vport->phba->cfg_soft_wwpn ||
376 (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) ||
377 vport->vport_flag & FAWWPN_SET) {
0558056c
JS
378 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
379 sizeof(struct lpfc_name));
aeb3c817
JS
380 vport->vport_flag &= ~FAWWPN_SET;
381 if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR)
382 vport->vport_flag |= FAWWPN_SET;
383 }
0558056c
JS
384 else
385 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
386 sizeof(struct lpfc_name));
387}
388
e59058c4 389/**
3621a710 390 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS
391 * @phba: pointer to lpfc hba data structure.
392 *
393 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
394 * command call. It performs all internal resource and state setups on the
395 * port: post IOCB buffers, enable appropriate host interrupt attentions,
396 * ELS ring timers, etc.
397 *
398 * Return codes
399 * 0 - success.
400 * Any other value - error.
401 **/
dea3101e 402int
2e0fef85 403lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 404{
2e0fef85 405 struct lpfc_vport *vport = phba->pport;
a257bf90 406 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e
JB
407 LPFC_MBOXQ_t *pmb;
408 MAILBOX_t *mb;
409 struct lpfc_dmabuf *mp;
410 struct lpfc_sli *psli = &phba->sli;
411 uint32_t status, timeout;
2e0fef85
JS
412 int i, j;
413 int rc;
dea3101e 414
7af67051
JS
415 spin_lock_irq(&phba->hbalock);
416 /*
417 * If the Config port completed correctly the HBA is not
418 * over heated any more.
419 */
420 if (phba->over_temp_state == HBA_OVER_TEMP)
421 phba->over_temp_state = HBA_NORMAL_TEMP;
422 spin_unlock_irq(&phba->hbalock);
423
dea3101e
JB
424 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
425 if (!pmb) {
2e0fef85 426 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
427 return -ENOMEM;
428 }
04c68496 429 mb = &pmb->u.mb;
dea3101e 430
dea3101e 431 /* Get login parameters for NID. */
9f1177a3
JS
432 rc = lpfc_read_sparam(phba, pmb, 0);
433 if (rc) {
434 mempool_free(pmb, phba->mbox_mem_pool);
435 return -ENOMEM;
436 }
437
ed957684 438 pmb->vport = vport;
dea3101e 439 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 440 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 441 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 442 "READ_SPARM mbxStatus x%x\n",
dea3101e 443 mb->mbxCommand, mb->mbxStatus);
2e0fef85 444 phba->link_state = LPFC_HBA_ERROR;
dea3101e 445 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 446 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
447 lpfc_mbuf_free(phba, mp->virt, mp->phys);
448 kfree(mp);
449 return -EIO;
450 }
451
452 mp = (struct lpfc_dmabuf *) pmb->context1;
453
2e0fef85 454 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e
JB
455 lpfc_mbuf_free(phba, mp->virt, mp->phys);
456 kfree(mp);
457 pmb->context1 = NULL;
0558056c 458 lpfc_update_vport_wwn(vport);
a257bf90
JS
459
460 /* Update the fc_host data structures with new wwn. */
461 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
462 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 463 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 464
dea3101e
JB
465 /* If no serial number in VPD data, use low 6 bytes of WWNN */
466 /* This should be consolidated into parse_vpd ? - mr */
467 if (phba->SerialNumber[0] == 0) {
468 uint8_t *outptr;
469
2e0fef85 470 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e
JB
471 for (i = 0; i < 12; i++) {
472 status = *outptr++;
473 j = ((status & 0xf0) >> 4);
474 if (j <= 9)
475 phba->SerialNumber[i] =
476 (char)((uint8_t) 0x30 + (uint8_t) j);
477 else
478 phba->SerialNumber[i] =
479 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
480 i++;
481 j = (status & 0xf);
482 if (j <= 9)
483 phba->SerialNumber[i] =
484 (char)((uint8_t) 0x30 + (uint8_t) j);
485 else
486 phba->SerialNumber[i] =
487 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
488 }
489 }
490
dea3101e 491 lpfc_read_config(phba, pmb);
ed957684 492 pmb->vport = vport;
dea3101e 493 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 494 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 495 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 496 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 497 mb->mbxCommand, mb->mbxStatus);
2e0fef85 498 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
499 mempool_free( pmb, phba->mbox_mem_pool);
500 return -EIO;
501 }
502
a0c87cbd
JS
503 /* Check if the port is disabled */
504 lpfc_sli_read_link_ste(phba);
505
dea3101e 506 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
507 i = (mb->un.varRdConfig.max_xri + 1);
508 if (phba->cfg_hba_queue_depth > i) {
509 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
510 "3359 HBA queue depth changed from %d to %d\n",
511 phba->cfg_hba_queue_depth, i);
512 phba->cfg_hba_queue_depth = i;
513 }
514
515 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
516 i = (mb->un.varRdConfig.max_xri >> 3);
517 if (phba->pport->cfg_lun_queue_depth > i) {
518 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
519 "3360 LUN queue depth changed from %d to %d\n",
520 phba->pport->cfg_lun_queue_depth, i);
521 phba->pport->cfg_lun_queue_depth = i;
522 }
dea3101e
JB
523
524 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW
525
526 /* Get the default values for Model Name and Description */
527 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
528
2e0fef85 529 phba->link_state = LPFC_LINK_DOWN;
dea3101e 530
0b727fea 531 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS
532 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
533 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
534 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
535 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e
JB
536
537 /* Post receive buffers for desired rings */
ed957684
JS
538 if (phba->sli_rev != 3)
539 lpfc_post_rcv_buf(phba);
dea3101e 540
9399627f
JS
541 /*
542 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
543 */
544 if (phba->intr_type == MSIX) {
545 rc = lpfc_config_msi(phba, pmb);
546 if (rc) {
547 mempool_free(pmb, phba->mbox_mem_pool);
548 return -EIO;
549 }
550 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
551 if (rc != MBX_SUCCESS) {
552 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
553 "0352 Config MSI mailbox command "
554 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS
555 pmb->u.mb.mbxCommand,
556 pmb->u.mb.mbxStatus);
9399627f
JS
557 mempool_free(pmb, phba->mbox_mem_pool);
558 return -EIO;
559 }
560 }
561
04c68496 562 spin_lock_irq(&phba->hbalock);
9399627f
JS
563 /* Initialize ERATT handling flag */
564 phba->hba_flag &= ~HBA_ERATT_HANDLED;
565
dea3101e 566 /* Enable appropriate host interrupts */
9940b97b
JS
567 if (lpfc_readl(phba->HCregaddr, &status)) {
568 spin_unlock_irq(&phba->hbalock);
569 return -EIO;
570 }
dea3101e
JB
571 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
572 if (psli->num_rings > 0)
573 status |= HC_R0INT_ENA;
574 if (psli->num_rings > 1)
575 status |= HC_R1INT_ENA;
576 if (psli->num_rings > 2)
577 status |= HC_R2INT_ENA;
578 if (psli->num_rings > 3)
579 status |= HC_R3INT_ENA;
580
875fbdfe
JSEC
581 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
582 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 583 status &= ~(HC_R0INT_ENA);
875fbdfe 584
dea3101e
JB
585 writel(status, phba->HCregaddr);
586 readl(phba->HCregaddr); /* flush */
2e0fef85 587 spin_unlock_irq(&phba->hbalock);
dea3101e 588
9399627f
JS
589 /* Set up ring-0 (ELS) timer */
590 timeout = phba->fc_ratov * 2;
256ec0d0
JS
591 mod_timer(&vport->els_tmofunc,
592 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 593 /* Set up heart beat (HB) timer */
256ec0d0
JS
594 mod_timer(&phba->hb_tmofunc,
595 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
596 phba->hb_outstanding = 0;
597 phba->last_completion_time = jiffies;
9399627f 598 /* Set up error attention (ERATT) polling timer */
256ec0d0 599 mod_timer(&phba->eratt_poll,
65791f1f 600 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 601
a0c87cbd
JS
602 if (phba->hba_flag & LINK_DISABLED) {
603 lpfc_printf_log(phba,
604 KERN_ERR, LOG_INIT,
605 "2598 Adapter Link is disabled.\n");
606 lpfc_down_link(phba, pmb);
607 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
608 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
609 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
610 lpfc_printf_log(phba,
611 KERN_ERR, LOG_INIT,
612 "2599 Adapter failed to issue DOWN_LINK"
613 " mbox command rc 0x%x\n", rc);
614
615 mempool_free(pmb, phba->mbox_mem_pool);
616 return -EIO;
617 }
e40a02c1 618 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS
619 mempool_free(pmb, phba->mbox_mem_pool);
620 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
621 if (rc)
622 return rc;
dea3101e
JB
623 }
624 /* MBOX buffer will be freed in mbox compl */
57127f15 625 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
626 if (!pmb) {
627 phba->link_state = LPFC_HBA_ERROR;
628 return -ENOMEM;
629 }
630
57127f15
JS
631 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
632 pmb->mbox_cmpl = lpfc_config_async_cmpl;
633 pmb->vport = phba->pport;
634 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 635
57127f15
JS
636 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
637 lpfc_printf_log(phba,
638 KERN_ERR,
639 LOG_INIT,
640 "0456 Adapter failed to issue "
e4e74273 641 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS
642 rc);
643 mempool_free(pmb, phba->mbox_mem_pool);
644 }
97207482
JS
645
646 /* Get Option rom version */
647 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
648 if (!pmb) {
649 phba->link_state = LPFC_HBA_ERROR;
650 return -ENOMEM;
651 }
652
97207482
JS
653 lpfc_dump_wakeup_param(phba, pmb);
654 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
655 pmb->vport = phba->pport;
656 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
657
658 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
659 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 660 "to get Option ROM version status x%x\n", rc);
97207482
JS
661 mempool_free(pmb, phba->mbox_mem_pool);
662 }
663
d7c255b2 664 return 0;
ce8b3ce5
JS
665}
666
84d1b006
JS
667/**
668 * lpfc_hba_init_link - Initialize the FC link
669 * @phba: pointer to lpfc hba data structure.
6e7288d9 670 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
671 *
672 * This routine will issue the INIT_LINK mailbox command call.
673 * It is available to other drivers through the lpfc_hba data
674 * structure for use as a delayed link up mechanism with the
675 * module parameter lpfc_suppress_link_up.
676 *
677 * Return code
678 * 0 - success
679 * Any other value - error
680 **/
e399b228 681static int
6e7288d9 682lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS
683{
684 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
685}
686
687/**
688 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
689 * @phba: pointer to lpfc hba data structure.
690 * @fc_topology: desired fc topology.
691 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
692 *
693 * This routine will issue the INIT_LINK mailbox command call.
694 * It is available to other drivers through the lpfc_hba data
695 * structure for use as a delayed link up mechanism with the
696 * module parameter lpfc_suppress_link_up.
697 *
698 * Return code
699 * 0 - success
700 * Any other value - error
701 **/
702int
703lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
704 uint32_t flag)
84d1b006
JS
705{
706 struct lpfc_vport *vport = phba->pport;
707 LPFC_MBOXQ_t *pmb;
708 MAILBOX_t *mb;
709 int rc;
710
711 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
712 if (!pmb) {
713 phba->link_state = LPFC_HBA_ERROR;
714 return -ENOMEM;
715 }
716 mb = &pmb->u.mb;
717 pmb->vport = vport;
718
026abb87
JS
719 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
720 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
721 !(phba->lmt & LMT_1Gb)) ||
722 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
723 !(phba->lmt & LMT_2Gb)) ||
724 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
725 !(phba->lmt & LMT_4Gb)) ||
726 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
727 !(phba->lmt & LMT_8Gb)) ||
728 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
729 !(phba->lmt & LMT_10Gb)) ||
730 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS
731 !(phba->lmt & LMT_16Gb)) ||
732 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
733 !(phba->lmt & LMT_32Gb))) {
026abb87
JS
734 /* Reset link speed to auto */
735 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
736 "1302 Invalid speed for this board:%d "
737 "Reset link speed to auto.\n",
738 phba->cfg_link_speed);
739 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
740 }
1b51197d 741 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 742 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS
743 if (phba->sli_rev < LPFC_SLI_REV4)
744 lpfc_set_loopback_flag(phba);
6e7288d9 745 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 746 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS
747 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
748 "0498 Adapter failed to init, mbxCmd x%x "
749 "INIT_LINK, mbxStatus x%x\n",
750 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS
751 if (phba->sli_rev <= LPFC_SLI_REV3) {
752 /* Clear all interrupt enable conditions */
753 writel(0, phba->HCregaddr);
754 readl(phba->HCregaddr); /* flush */
755 /* Clear all pending interrupts */
756 writel(0xffffffff, phba->HAregaddr);
757 readl(phba->HAregaddr); /* flush */
758 }
84d1b006 759 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 760 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS
761 mempool_free(pmb, phba->mbox_mem_pool);
762 return -EIO;
763 }
e40a02c1 764 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS
765 if (flag == MBX_POLL)
766 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS
767
768 return 0;
769}
770
771/**
772 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS
773 * @phba: pointer to lpfc hba data structure.
774 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
775 *
776 * This routine will issue the DOWN_LINK mailbox command call.
777 * It is available to other drivers through the lpfc_hba data
778 * structure for use to stop the link.
779 *
780 * Return code
781 * 0 - success
782 * Any other value - error
783 **/
e399b228 784static int
6e7288d9 785lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS
786{
787 LPFC_MBOXQ_t *pmb;
788 int rc;
789
790 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
791 if (!pmb) {
792 phba->link_state = LPFC_HBA_ERROR;
793 return -ENOMEM;
794 }
795
796 lpfc_printf_log(phba,
797 KERN_ERR, LOG_INIT,
798 "0491 Adapter Link is disabled.\n");
799 lpfc_down_link(phba, pmb);
800 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 801 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS
802 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
803 lpfc_printf_log(phba,
804 KERN_ERR, LOG_INIT,
805 "2522 Adapter failed to issue DOWN_LINK"
806 " mbox command rc 0x%x\n", rc);
807
808 mempool_free(pmb, phba->mbox_mem_pool);
809 return -EIO;
810 }
6e7288d9
JS
811 if (flag == MBX_POLL)
812 mempool_free(pmb, phba->mbox_mem_pool);
813
84d1b006
JS
814 return 0;
815}
816
e59058c4 817/**
3621a710 818 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS
819 * @phba: pointer to lpfc HBA data structure.
820 *
821 * This routine will do LPFC uninitialization before the HBA is reset when
822 * bringing down the SLI Layer.
823 *
824 * Return codes
825 * 0 - success.
826 * Any other value - error.
827 **/
dea3101e 828int
2e0fef85 829lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 830{
1b32f6aa
JS
831 struct lpfc_vport **vports;
832 int i;
3772a991
JS
833
834 if (phba->sli_rev <= LPFC_SLI_REV3) {
835 /* Disable interrupts */
836 writel(0, phba->HCregaddr);
837 readl(phba->HCregaddr); /* flush */
838 }
dea3101e 839
1b32f6aa
JS
840 if (phba->pport->load_flag & FC_UNLOADING)
841 lpfc_cleanup_discovery_resources(phba->pport);
842 else {
843 vports = lpfc_create_vport_work_array(phba);
844 if (vports != NULL)
3772a991
JS
845 for (i = 0; i <= phba->max_vports &&
846 vports[i] != NULL; i++)
1b32f6aa
JS
847 lpfc_cleanup_discovery_resources(vports[i]);
848 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS
849 }
850 return 0;
dea3101e
JB
851}
852
68e814f5
JS
853/**
854 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
855 * rspiocb which got deferred
856 *
857 * @phba: pointer to lpfc HBA data structure.
858 *
859 * This routine will cleanup completed slow path events after HBA is reset
860 * when bringing down the SLI Layer.
861 *
862 *
863 * Return codes
864 * void.
865 **/
866static void
867lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
868{
869 struct lpfc_iocbq *rspiocbq;
870 struct hbq_dmabuf *dmabuf;
871 struct lpfc_cq_event *cq_event;
872
873 spin_lock_irq(&phba->hbalock);
874 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
875 spin_unlock_irq(&phba->hbalock);
876
877 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
878 /* Get the response iocb from the head of work queue */
879 spin_lock_irq(&phba->hbalock);
880 list_remove_head(&phba->sli4_hba.sp_queue_event,
881 cq_event, struct lpfc_cq_event, list);
882 spin_unlock_irq(&phba->hbalock);
883
884 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
885 case CQE_CODE_COMPL_WQE:
886 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
887 cq_event);
888 lpfc_sli_release_iocbq(phba, rspiocbq);
889 break;
890 case CQE_CODE_RECEIVE:
891 case CQE_CODE_RECEIVE_V1:
892 dmabuf = container_of(cq_event, struct hbq_dmabuf,
893 cq_event);
894 lpfc_in_buf_free(phba, &dmabuf->dbuf);
895 }
896 }
897}
898
e59058c4 899/**
bcece5f5 900 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS
901 * @phba: pointer to lpfc HBA data structure.
902 *
bcece5f5
JS
903 * This routine will cleanup posted ELS buffers after the HBA is reset
904 * when bringing down the SLI Layer.
905 *
e59058c4
JS
906 *
907 * Return codes
bcece5f5 908 * void.
e59058c4 909 **/
bcece5f5
JS
910static void
911lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW
912{
913 struct lpfc_sli *psli = &phba->sli;
914 struct lpfc_sli_ring *pring;
915 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS
916 LIST_HEAD(buflist);
917 int count;
41415862 918
92d7f7b0
JS
919 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
920 lpfc_sli_hbqbuf_free_all(phba);
921 else {
922 /* Cleanup preposted buffers on the ELS ring */
895427bd 923 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS
924 spin_lock_irq(&phba->hbalock);
925 list_splice_init(&pring->postbufq, &buflist);
926 spin_unlock_irq(&phba->hbalock);
927
928 count = 0;
929 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 930 list_del(&mp->list);
07eab624 931 count++;
92d7f7b0
JS
932 lpfc_mbuf_free(phba, mp->virt, mp->phys);
933 kfree(mp);
934 }
07eab624
JS
935
936 spin_lock_irq(&phba->hbalock);
937 pring->postbufq_cnt -= count;
bcece5f5 938 spin_unlock_irq(&phba->hbalock);
41415862 939 }
bcece5f5
JS
940}
941
942/**
943 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
944 * @phba: pointer to lpfc HBA data structure.
945 *
946 * This routine will cleanup the txcmplq after the HBA is reset when bringing
947 * down the SLI Layer.
948 *
949 * Return codes
950 * void
951 **/
952static void
953lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
954{
955 struct lpfc_sli *psli = &phba->sli;
895427bd 956 struct lpfc_queue *qp = NULL;
bcece5f5
JS
957 struct lpfc_sli_ring *pring;
958 LIST_HEAD(completions);
959 int i;
960
895427bd
JS
961 if (phba->sli_rev != LPFC_SLI_REV4) {
962 for (i = 0; i < psli->num_rings; i++) {
963 pring = &psli->sli3_ring[i];
bcece5f5 964 spin_lock_irq(&phba->hbalock);
895427bd
JS
965 /* At this point in time the HBA is either reset or DOA
966 * Nothing should be on txcmplq as it will
967 * NEVER complete.
968 */
969 list_splice_init(&pring->txcmplq, &completions);
970 pring->txcmplq_cnt = 0;
bcece5f5 971 spin_unlock_irq(&phba->hbalock);
09372820 972
895427bd
JS
973 lpfc_sli_abort_iocb_ring(phba, pring);
974 }
a257bf90 975 /* Cancel all the IOCBs from the completions list */
895427bd
JS
976 lpfc_sli_cancel_iocbs(phba, &completions,
977 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
978 return;
979 }
980 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
981 pring = qp->pring;
982 if (!pring)
983 continue;
984 spin_lock_irq(&pring->ring_lock);
985 list_splice_init(&pring->txcmplq, &completions);
986 pring->txcmplq_cnt = 0;
987 spin_unlock_irq(&pring->ring_lock);
41415862
JW
988 lpfc_sli_abort_iocb_ring(phba, pring);
989 }
895427bd
JS
990 /* Cancel all the IOCBs from the completions list */
991 lpfc_sli_cancel_iocbs(phba, &completions,
992 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 993}
41415862 994
bcece5f5
JS
995/**
996 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
997 int i;
998 * @phba: pointer to lpfc HBA data structure.
999 *
1000 * This routine will do uninitialization after the HBA is reset when bring
1001 * down the SLI Layer.
1002 *
1003 * Return codes
1004 * 0 - success.
1005 * Any other value - error.
1006 **/
1007static int
1008lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1009{
1010 lpfc_hba_free_post_buf(phba);
1011 lpfc_hba_clean_txcmplq(phba);
41415862
JW
1012 return 0;
1013}
5af5eee7 1014
da0436e9
JS
1015/**
1016 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1017 * @phba: pointer to lpfc HBA data structure.
1018 *
1019 * This routine will do uninitialization after the HBA is reset when bring
1020 * down the SLI Layer.
1021 *
1022 * Return codes
af901ca1 1023 * 0 - success.
da0436e9
JS
1024 * Any other value - error.
1025 **/
1026static int
1027lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1028{
1029 struct lpfc_scsi_buf *psb, *psb_next;
86c67379 1030 struct lpfc_nvmet_rcv_ctx *ctxp, *ctxp_next;
da0436e9 1031 LIST_HEAD(aborts);
895427bd 1032 LIST_HEAD(nvme_aborts);
86c67379 1033 LIST_HEAD(nvmet_aborts);
da0436e9 1034 unsigned long iflag = 0;
0f65ff68
JS
1035 struct lpfc_sglq *sglq_entry = NULL;
1036
895427bd
JS
1037
1038 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS
1039 lpfc_hba_clean_txcmplq(phba);
1040
da0436e9
JS
1041 /* At this point in time the HBA is either reset or DOA. Either
1042 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1043 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS
1044 * driver is unloading or reposted if the driver is restarting
1045 * the port.
1046 */
895427bd 1047 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1048 /* scsl_buf_list */
895427bd 1049 /* sgl_list_lock required because worker thread uses this
da0436e9
JS
1050 * list.
1051 */
895427bd 1052 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS
1053 list_for_each_entry(sglq_entry,
1054 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1055 sglq_entry->state = SGL_FREED;
1056
da0436e9 1057 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS
1058 &phba->sli4_hba.lpfc_els_sgl_list);
1059
f358dd0c 1060
895427bd 1061 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1062 /* abts_scsi_buf_list_lock required because worker thread uses this
1063 * list.
1064 */
895427bd
JS
1065 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1066 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1067 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1068 &aborts);
1069 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1070 }
1071
1072 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1073 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1074 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1075 &nvme_aborts);
86c67379
JS
1076 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1077 &nvmet_aborts);
895427bd
JS
1078 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1079 }
1080
da0436e9
JS
1081 spin_unlock_irq(&phba->hbalock);
1082
1083 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1084 psb->pCmd = NULL;
1085 psb->status = IOSTAT_SUCCESS;
1086 }
a40fc5f0
JS
1087 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1088 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1089 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1090
86c67379
JS
1091 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1092 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1093 psb->pCmd = NULL;
1094 psb->status = IOSTAT_SUCCESS;
1095 }
1096 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
1097 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1098 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1099
1100 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1101 ctxp->flag &= ~(LPFC_NVMET_XBUSY | LPFC_NVMET_ABORT_OP);
6c621a22 1102 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
86c67379 1103 }
895427bd 1104 }
895427bd 1105
68e814f5 1106 lpfc_sli4_free_sp_events(phba);
da0436e9
JS
1107 return 0;
1108}
1109
1110/**
1111 * lpfc_hba_down_post - Wrapper func for hba down post routine
1112 * @phba: pointer to lpfc HBA data structure.
1113 *
1114 * This routine wraps the actual SLI3 or SLI4 routine for performing
1115 * uninitialization after the HBA is reset when bring down the SLI Layer.
1116 *
1117 * Return codes
af901ca1 1118 * 0 - success.
da0436e9
JS
1119 * Any other value - error.
1120 **/
1121int
1122lpfc_hba_down_post(struct lpfc_hba *phba)
1123{
1124 return (*phba->lpfc_hba_down_post)(phba);
1125}
41415862 1126
e59058c4 1127/**
3621a710 1128 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS
1129 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1130 *
1131 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1132 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1133 * work-port-events bitmap and the worker thread is notified. This timeout
1134 * event will be used by the worker thread to invoke the actual timeout
1135 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1136 * be performed in the timeout handler and the HBA timeout event bit shall
1137 * be cleared by the worker thread after it has taken the event bitmap out.
1138 **/
a6ababd2 1139static void
858c9f6c
JS
1140lpfc_hb_timeout(unsigned long ptr)
1141{
1142 struct lpfc_hba *phba;
5e9d9b82 1143 uint32_t tmo_posted;
858c9f6c
JS
1144 unsigned long iflag;
1145
1146 phba = (struct lpfc_hba *)ptr;
9399627f
JS
1147
1148 /* Check for heart beat timeout conditions */
858c9f6c 1149 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS
1150 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1151 if (!tmo_posted)
858c9f6c
JS
1152 phba->pport->work_port_events |= WORKER_HB_TMO;
1153 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1154
9399627f 1155 /* Tell the worker thread there is work to do */
5e9d9b82
JS
1156 if (!tmo_posted)
1157 lpfc_worker_wake_up(phba);
858c9f6c
JS
1158 return;
1159}
1160
19ca7609
JS
1161/**
1162 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1163 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1164 *
1165 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1166 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1167 * work-port-events bitmap and the worker thread is notified. This timeout
1168 * event will be used by the worker thread to invoke the actual timeout
1169 * handler routine, lpfc_rrq_handler. Any periodical operations will
1170 * be performed in the timeout handler and the RRQ timeout event bit shall
1171 * be cleared by the worker thread after it has taken the event bitmap out.
1172 **/
1173static void
1174lpfc_rrq_timeout(unsigned long ptr)
1175{
1176 struct lpfc_hba *phba;
19ca7609
JS
1177 unsigned long iflag;
1178
1179 phba = (struct lpfc_hba *)ptr;
1180 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1181 if (!(phba->pport->load_flag & FC_UNLOADING))
1182 phba->hba_flag |= HBA_RRQ_ACTIVE;
1183 else
1184 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1185 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1186
1187 if (!(phba->pport->load_flag & FC_UNLOADING))
1188 lpfc_worker_wake_up(phba);
19ca7609
JS
1189}
1190
e59058c4 1191/**
3621a710 1192 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS
1193 * @phba: pointer to lpfc hba data structure.
1194 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1195 *
1196 * This is the callback function to the lpfc heart-beat mailbox command.
1197 * If configured, the lpfc driver issues the heart-beat mailbox command to
1198 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1199 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1200 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1201 * heart-beat outstanding state. Once the mailbox command comes back and
1202 * no error conditions detected, the heart-beat mailbox command timer is
1203 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1204 * state is cleared for the next heart-beat. If the timer expired with the
1205 * heart-beat outstanding state set, the driver will put the HBA offline.
1206 **/
858c9f6c
JS
1207static void
1208lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1209{
1210 unsigned long drvr_flag;
1211
1212 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1213 phba->hb_outstanding = 0;
1214 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1215
9399627f 1216 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS
1217 mempool_free(pmboxq, phba->mbox_mem_pool);
1218 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1219 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1220 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1221 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1222 jiffies +
1223 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1224 return;
1225}
1226
e59058c4 1227/**
3621a710 1228 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS
1229 * @phba: pointer to lpfc hba data structure.
1230 *
1231 * This is the actual HBA-timer timeout handler to be invoked by the worker
1232 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1233 * handler performs any periodic operations needed for the device. If such
1234 * periodic event has already been attended to either in the interrupt handler
1235 * or by processing slow-ring or fast-ring events within the HBA-timer
1236 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1237 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1238 * is configured and there is no heart-beat mailbox command outstanding, a
1239 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1240 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1241 * to offline.
1242 **/
858c9f6c
JS
1243void
1244lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1245{
45ed1190 1246 struct lpfc_vport **vports;
858c9f6c 1247 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1248 struct lpfc_dmabuf *buf_ptr;
45ed1190 1249 int retval, i;
858c9f6c 1250 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1251 LIST_HEAD(completions);
0cf07f84
JS
1252 struct lpfc_queue *qp;
1253 unsigned long time_elapsed;
1254 uint32_t tick_cqe, max_cqe, val;
1255 uint64_t tot, data1, data2, data3;
1256 struct lpfc_register reg_data;
1257 void __iomem *eqdreg = phba->sli4_hba.u.if_type2.EQDregaddr;
858c9f6c 1258
45ed1190
JS
1259 vports = lpfc_create_vport_work_array(phba);
1260 if (vports != NULL)
4258e98e 1261 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1262 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS
1263 lpfc_fdmi_num_disc_check(vports[i]);
1264 }
45ed1190
JS
1265 lpfc_destroy_vport_work_array(phba, vports);
1266
858c9f6c 1267 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1268 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS
1269 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1270 return;
1271
0cf07f84
JS
1272 if (phba->cfg_auto_imax) {
1273 if (!phba->last_eqdelay_time) {
1274 phba->last_eqdelay_time = jiffies;
1275 goto skip_eqdelay;
1276 }
1277 time_elapsed = jiffies - phba->last_eqdelay_time;
1278 phba->last_eqdelay_time = jiffies;
1279
1280 tot = 0xffff;
1281 /* Check outstanding IO count */
1282 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1283 if (phba->nvmet_support) {
966bb5b7
JS
1284 spin_lock(&phba->sli4_hba.nvmet_ctx_get_lock);
1285 spin_lock(&phba->sli4_hba.nvmet_ctx_put_lock);
0cf07f84 1286 tot = phba->sli4_hba.nvmet_xri_cnt -
966bb5b7
JS
1287 (phba->sli4_hba.nvmet_ctx_get_cnt +
1288 phba->sli4_hba.nvmet_ctx_put_cnt);
1289 spin_unlock(&phba->sli4_hba.nvmet_ctx_put_lock);
1290 spin_unlock(&phba->sli4_hba.nvmet_ctx_get_lock);
0cf07f84
JS
1291 } else {
1292 tot = atomic_read(&phba->fc4NvmeIoCmpls);
1293 data1 = atomic_read(
1294 &phba->fc4NvmeInputRequests);
1295 data2 = atomic_read(
1296 &phba->fc4NvmeOutputRequests);
1297 data3 = atomic_read(
1298 &phba->fc4NvmeControlRequests);
1299 tot = (data1 + data2 + data3) - tot;
1300 }
1301 }
1302
1303 /* Interrupts per sec per EQ */
1304 val = phba->cfg_fcp_imax / phba->io_channel_irqs;
1305 tick_cqe = val / CONFIG_HZ; /* Per tick per EQ */
1306
1307 /* Assume 1 CQE/ISR, calc max CQEs allowed for time duration */
1308 max_cqe = time_elapsed * tick_cqe;
1309
1310 for (i = 0; i < phba->io_channel_irqs; i++) {
1311 /* Fast-path EQ */
1312 qp = phba->sli4_hba.hba_eq[i];
1313 if (!qp)
1314 continue;
1315
1316 /* Use no EQ delay if we don't have many outstanding
1317 * IOs, or if we are only processing 1 CQE/ISR or less.
1318 * Otherwise, assume we can process up to lpfc_fcp_imax
1319 * interrupts per HBA.
1320 */
1321 if (tot < LPFC_NODELAY_MAX_IO ||
1322 qp->EQ_cqe_cnt <= max_cqe)
1323 val = 0;
1324 else
1325 val = phba->cfg_fcp_imax;
1326
1327 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
1328 /* Use EQ Delay Register method */
1329
1330 /* Convert for EQ Delay register */
1331 if (val) {
1332 /* First, interrupts per sec per EQ */
1333 val = phba->cfg_fcp_imax /
1334 phba->io_channel_irqs;
1335
1336 /* us delay between each interrupt */
1337 val = LPFC_SEC_TO_USEC / val;
1338 }
1339 if (val != qp->q_mode) {
1340 reg_data.word0 = 0;
1341 bf_set(lpfc_sliport_eqdelay_id,
1342 &reg_data, qp->queue_id);
1343 bf_set(lpfc_sliport_eqdelay_delay,
1344 &reg_data, val);
1345 writel(reg_data.word0, eqdreg);
1346 }
1347 } else {
1348 /* Use mbox command method */
1349 if (val != qp->q_mode)
1350 lpfc_modify_hba_eq_delay(phba, i,
1351 1, val);
1352 }
1353
1354 /*
1355 * val is cfg_fcp_imax or 0 for mbox delay or us delay
1356 * between interrupts for EQDR.
1357 */
1358 qp->q_mode = val;
1359 qp->EQ_cqe_cnt = 0;
1360 }
1361 }
1362
1363skip_eqdelay:
858c9f6c 1364 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1365
256ec0d0
JS
1366 if (time_after(phba->last_completion_time +
1367 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1368 jiffies)) {
858c9f6c
JS
1369 spin_unlock_irq(&phba->pport->work_port_lock);
1370 if (!phba->hb_outstanding)
1371 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1372 jiffies +
1373 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1374 else
1375 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1376 jiffies +
1377 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS
1378 return;
1379 }
1380 spin_unlock_irq(&phba->pport->work_port_lock);
1381
0ff10d46
JS
1382 if (phba->elsbuf_cnt &&
1383 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1384 spin_lock_irq(&phba->hbalock);
1385 list_splice_init(&phba->elsbuf, &completions);
1386 phba->elsbuf_cnt = 0;
1387 phba->elsbuf_prev_cnt = 0;
1388 spin_unlock_irq(&phba->hbalock);
1389
1390 while (!list_empty(&completions)) {
1391 list_remove_head(&completions, buf_ptr,
1392 struct lpfc_dmabuf, list);
1393 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1394 kfree(buf_ptr);
1395 }
1396 }
1397 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1398
858c9f6c 1399 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS
1400 if (phba->cfg_enable_hba_heartbeat) {
1401 if (!phba->hb_outstanding) {
bc73905a
JS
1402 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1403 (list_empty(&psli->mboxq))) {
1404 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1405 GFP_KERNEL);
1406 if (!pmboxq) {
1407 mod_timer(&phba->hb_tmofunc,
1408 jiffies +
256ec0d0
JS
1409 msecs_to_jiffies(1000 *
1410 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1411 return;
1412 }
1413
1414 lpfc_heart_beat(phba, pmboxq);
1415 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1416 pmboxq->vport = phba->pport;
1417 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1418 MBX_NOWAIT);
1419
1420 if (retval != MBX_BUSY &&
1421 retval != MBX_SUCCESS) {
1422 mempool_free(pmboxq,
1423 phba->mbox_mem_pool);
1424 mod_timer(&phba->hb_tmofunc,
1425 jiffies +
256ec0d0
JS
1426 msecs_to_jiffies(1000 *
1427 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1428 return;
1429 }
1430 phba->skipped_hb = 0;
1431 phba->hb_outstanding = 1;
1432 } else if (time_before_eq(phba->last_completion_time,
1433 phba->skipped_hb)) {
1434 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1435 "2857 Last completion time not "
1436 " updated in %d ms\n",
1437 jiffies_to_msecs(jiffies
1438 - phba->last_completion_time));
1439 } else
1440 phba->skipped_hb = jiffies;
1441
858c9f6c 1442 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1443 jiffies +
1444 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1445 return;
13815c83
JS
1446 } else {
1447 /*
1448 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS
1449 * we need to give the hb mailbox cmd a chance to
1450 * complete or TMO.
13815c83 1451 */
dcf2a4e0
JS
1452 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1453 "0459 Adapter heartbeat still out"
1454 "standing:last compl time was %d ms.\n",
1455 jiffies_to_msecs(jiffies
1456 - phba->last_completion_time));
1457 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1458 jiffies +
1459 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1460 }
4258e98e
JS
1461 } else {
1462 mod_timer(&phba->hb_tmofunc,
1463 jiffies +
1464 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1465 }
1466}
1467
e59058c4 1468/**
3621a710 1469 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS
1470 * @phba: pointer to lpfc hba data structure.
1471 *
1472 * This routine is called to bring the HBA offline when HBA hardware error
1473 * other than Port Error 6 has been detected.
1474 **/
09372820
JS
1475static void
1476lpfc_offline_eratt(struct lpfc_hba *phba)
1477{
1478 struct lpfc_sli *psli = &phba->sli;
1479
1480 spin_lock_irq(&phba->hbalock);
f4b4c68f 1481 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1482 spin_unlock_irq(&phba->hbalock);
618a5230 1483 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS
1484
1485 lpfc_offline(phba);
1486 lpfc_reset_barrier(phba);
f4b4c68f 1487 spin_lock_irq(&phba->hbalock);
09372820 1488 lpfc_sli_brdreset(phba);
f4b4c68f 1489 spin_unlock_irq(&phba->hbalock);
09372820
JS
1490 lpfc_hba_down_post(phba);
1491 lpfc_sli_brdready(phba, HS_MBRDY);
1492 lpfc_unblock_mgmt_io(phba);
1493 phba->link_state = LPFC_HBA_ERROR;
1494 return;
1495}
1496
da0436e9
JS
1497/**
1498 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1499 * @phba: pointer to lpfc hba data structure.
1500 *
1501 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1502 * other than Port Error 6 has been detected.
1503 **/
a88dbb6a 1504void
da0436e9
JS
1505lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1506{
946727dc
JS
1507 spin_lock_irq(&phba->hbalock);
1508 phba->link_state = LPFC_HBA_ERROR;
1509 spin_unlock_irq(&phba->hbalock);
1510
618a5230 1511 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1512 lpfc_offline(phba);
da0436e9 1513 lpfc_hba_down_post(phba);
da0436e9 1514 lpfc_unblock_mgmt_io(phba);
da0436e9
JS
1515}
1516
a257bf90
JS
1517/**
1518 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1519 * @phba: pointer to lpfc hba data structure.
1520 *
1521 * This routine is invoked to handle the deferred HBA hardware error
1522 * conditions. This type of error is indicated by HBA by setting ER1
1523 * and another ER bit in the host status register. The driver will
1524 * wait until the ER1 bit clears before handling the error condition.
1525 **/
1526static void
1527lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1528{
1529 uint32_t old_host_status = phba->work_hs;
a257bf90
JS
1530 struct lpfc_sli *psli = &phba->sli;
1531
f4b4c68f
JS
1532 /* If the pci channel is offline, ignore possible errors,
1533 * since we cannot communicate with the pci card anyway.
1534 */
1535 if (pci_channel_offline(phba->pcidev)) {
1536 spin_lock_irq(&phba->hbalock);
1537 phba->hba_flag &= ~DEFER_ERATT;
1538 spin_unlock_irq(&phba->hbalock);
1539 return;
1540 }
1541
a257bf90
JS
1542 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1543 "0479 Deferred Adapter Hardware Error "
1544 "Data: x%x x%x x%x\n",
1545 phba->work_hs,
1546 phba->work_status[0], phba->work_status[1]);
1547
1548 spin_lock_irq(&phba->hbalock);
f4b4c68f 1549 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS
1550 spin_unlock_irq(&phba->hbalock);
1551
1552
1553 /*
1554 * Firmware stops when it triggred erratt. That could cause the I/Os
1555 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1556 * SCSI layer retry it after re-establishing link.
1557 */
db55fba8 1558 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS
1559
1560 /*
1561 * There was a firmware error. Take the hba offline and then
1562 * attempt to restart it.
1563 */
618a5230 1564 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS
1565 lpfc_offline(phba);
1566
1567 /* Wait for the ER1 bit to clear.*/
1568 while (phba->work_hs & HS_FFER1) {
1569 msleep(100);
9940b97b
JS
1570 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1571 phba->work_hs = UNPLUG_ERR ;
1572 break;
1573 }
a257bf90
JS
1574 /* If driver is unloading let the worker thread continue */
1575 if (phba->pport->load_flag & FC_UNLOADING) {
1576 phba->work_hs = 0;
1577 break;
1578 }
1579 }
1580
1581 /*
1582 * This is to ptrotect against a race condition in which
1583 * first write to the host attention register clear the
1584 * host status register.
1585 */
1586 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1587 phba->work_hs = old_host_status & ~HS_FFER1;
1588
3772a991 1589 spin_lock_irq(&phba->hbalock);
a257bf90 1590 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1591 spin_unlock_irq(&phba->hbalock);
a257bf90
JS
1592 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1593 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1594}
1595
3772a991
JS
1596static void
1597lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1598{
1599 struct lpfc_board_event_header board_event;
1600 struct Scsi_Host *shost;
1601
1602 board_event.event_type = FC_REG_BOARD_EVENT;
1603 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1604 shost = lpfc_shost_from_vport(phba->pport);
1605 fc_host_post_vendor_event(shost, fc_get_event_number(),
1606 sizeof(board_event),
1607 (char *) &board_event,
1608 LPFC_NL_VENDOR_ID);
1609}
1610
e59058c4 1611/**
3772a991 1612 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS
1613 * @phba: pointer to lpfc hba data structure.
1614 *
1615 * This routine is invoked to handle the following HBA hardware error
1616 * conditions:
1617 * 1 - HBA error attention interrupt
1618 * 2 - DMA ring index out of range
1619 * 3 - Mailbox command came back as unknown
1620 **/
3772a991
JS
1621static void
1622lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1623{
2e0fef85 1624 struct lpfc_vport *vport = phba->pport;
2e0fef85 1625 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1626 uint32_t event_data;
57127f15
JS
1627 unsigned long temperature;
1628 struct temp_event temp_event_data;
92d7f7b0 1629 struct Scsi_Host *shost;
2e0fef85 1630
8d63f375 1631 /* If the pci channel is offline, ignore possible errors,
3772a991
JS
1632 * since we cannot communicate with the pci card anyway.
1633 */
1634 if (pci_channel_offline(phba->pcidev)) {
1635 spin_lock_irq(&phba->hbalock);
1636 phba->hba_flag &= ~DEFER_ERATT;
1637 spin_unlock_irq(&phba->hbalock);
8d63f375 1638 return;
3772a991
JS
1639 }
1640
13815c83
JS
1641 /* If resets are disabled then leave the HBA alone and return */
1642 if (!phba->cfg_enable_hba_reset)
1643 return;
dea3101e 1644
ea2151b4 1645 /* Send an internal error event to mgmt application */
3772a991 1646 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1647
a257bf90
JS
1648 if (phba->hba_flag & DEFER_ERATT)
1649 lpfc_handle_deferred_eratt(phba);
1650
dcf2a4e0
JS
1651 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1652 if (phba->work_hs & HS_FFER6)
1653 /* Re-establishing Link */
1654 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1655 "1301 Re-establishing Link "
1656 "Data: x%x x%x x%x\n",
1657 phba->work_hs, phba->work_status[0],
1658 phba->work_status[1]);
1659 if (phba->work_hs & HS_FFER8)
1660 /* Device Zeroization */
1661 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1662 "2861 Host Authentication device "
1663 "zeroization Data:x%x x%x x%x\n",
1664 phba->work_hs, phba->work_status[0],
1665 phba->work_status[1]);
58da1ffb 1666
92d7f7b0 1667 spin_lock_irq(&phba->hbalock);
f4b4c68f 1668 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1669 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1670
1671 /*
1672 * Firmware stops when it triggled erratt with HS_FFER6.
1673 * That could cause the I/Os dropped by the firmware.
1674 * Error iocb (I/O) on txcmplq and let the SCSI layer
1675 * retry it after re-establishing link.
1676 */
db55fba8 1677 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1678
dea3101e
JB
1679 /*
1680 * There was a firmware error. Take the hba offline and then
1681 * attempt to restart it.
1682 */
618a5230 1683 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1684 lpfc_offline(phba);
41415862 1685 lpfc_sli_brdrestart(phba);
dea3101e 1686 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1687 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
1688 return;
1689 }
46fa311e 1690 lpfc_unblock_mgmt_io(phba);
57127f15
JS
1691 } else if (phba->work_hs & HS_CRIT_TEMP) {
1692 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1693 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1694 temp_event_data.event_code = LPFC_CRIT_TEMP;
1695 temp_event_data.data = (uint32_t)temperature;
1696
1697 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1698 "0406 Adapter maximum temperature exceeded "
57127f15
JS
1699 "(%ld), taking this port offline "
1700 "Data: x%x x%x x%x\n",
1701 temperature, phba->work_hs,
1702 phba->work_status[0], phba->work_status[1]);
1703
1704 shost = lpfc_shost_from_vport(phba->pport);
1705 fc_host_post_vendor_event(shost, fc_get_event_number(),
1706 sizeof(temp_event_data),
1707 (char *) &temp_event_data,
1708 SCSI_NL_VID_TYPE_PCI
1709 | PCI_VENDOR_ID_EMULEX);
1710
7af67051 1711 spin_lock_irq(&phba->hbalock);
7af67051
JS
1712 phba->over_temp_state = HBA_OVER_TEMP;
1713 spin_unlock_irq(&phba->hbalock);
09372820 1714 lpfc_offline_eratt(phba);
57127f15 1715
dea3101e
JB
1716 } else {
1717 /* The if clause above forces this code path when the status
9399627f
JS
1718 * failure is a value other than FFER6. Do not call the offline
1719 * twice. This is the adapter hardware error path.
dea3101e
JB
1720 */
1721 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1722 "0457 Adapter Hardware Error "
dea3101e 1723 "Data: x%x x%x x%x\n",
e8b62011 1724 phba->work_hs,
dea3101e
JB
1725 phba->work_status[0], phba->work_status[1]);
1726
d2873e4c 1727 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1728 shost = lpfc_shost_from_vport(vport);
2e0fef85 1729 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS
1730 sizeof(event_data), (char *) &event_data,
1731 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1732
09372820 1733 lpfc_offline_eratt(phba);
dea3101e 1734 }
9399627f 1735 return;
dea3101e
JB
1736}
1737
618a5230
JS
1738/**
1739 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1740 * @phba: pointer to lpfc hba data structure.
1741 * @mbx_action: flag for mailbox shutdown action.
1742 *
1743 * This routine is invoked to perform an SLI4 port PCI function reset in
1744 * response to port status register polling attention. It waits for port
1745 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1746 * During this process, interrupt vectors are freed and later requested
1747 * for handling possible port resource change.
1748 **/
1749static int
e10b2022
JS
1750lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1751 bool en_rn_msg)
618a5230
JS
1752{
1753 int rc;
1754 uint32_t intr_mode;
1755
65791f1f
JS
1756 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1757 LPFC_SLI_INTF_IF_TYPE_2) {
1758 /*
1759 * On error status condition, driver need to wait for port
1760 * ready before performing reset.
1761 */
1762 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1763 if (rc)
65791f1f
JS
1764 return rc;
1765 }
0e916ee7 1766
65791f1f
JS
1767 /* need reset: attempt for port recovery */
1768 if (en_rn_msg)
1769 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1770 "2887 Reset Needed: Attempting Port "
1771 "Recovery...\n");
1772 lpfc_offline_prep(phba, mbx_action);
1773 lpfc_offline(phba);
1774 /* release interrupt for possible resource change */
1775 lpfc_sli4_disable_intr(phba);
1776 lpfc_sli_brdrestart(phba);
1777 /* request and enable interrupt */
1778 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1779 if (intr_mode == LPFC_INTR_ERROR) {
1780 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1781 "3175 Failed to enable interrupt\n");
1782 return -EIO;
618a5230 1783 }
65791f1f
JS
1784 phba->intr_mode = intr_mode;
1785 rc = lpfc_online(phba);
1786 if (rc == 0)
1787 lpfc_unblock_mgmt_io(phba);
1788
618a5230
JS
1789 return rc;
1790}
1791
da0436e9
JS
1792/**
1793 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1794 * @phba: pointer to lpfc hba data structure.
1795 *
1796 * This routine is invoked to handle the SLI4 HBA hardware error attention
1797 * conditions.
1798 **/
1799static void
1800lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1801{
1802 struct lpfc_vport *vport = phba->pport;
1803 uint32_t event_data;
1804 struct Scsi_Host *shost;
2fcee4bf 1805 uint32_t if_type;
2e90f4b5
JS
1806 struct lpfc_register portstat_reg = {0};
1807 uint32_t reg_err1, reg_err2;
1808 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1809 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1810 bool en_rn_msg = true;
946727dc 1811 struct temp_event temp_event_data;
65791f1f
JS
1812 struct lpfc_register portsmphr_reg;
1813 int rc, i;
da0436e9
JS
1814
1815 /* If the pci channel is offline, ignore possible errors, since
1816 * we cannot communicate with the pci card anyway.
1817 */
1818 if (pci_channel_offline(phba->pcidev))
1819 return;
da0436e9 1820
65791f1f 1821 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS
1822 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1823 switch (if_type) {
1824 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS
1825 pci_rd_rc1 = lpfc_readl(
1826 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1827 &uerrlo_reg);
1828 pci_rd_rc2 = lpfc_readl(
1829 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1830 &uemasklo_reg);
1831 /* consider PCI bus read error as pci_channel_offline */
1832 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1833 return;
65791f1f
JS
1834 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1835 lpfc_sli4_offline_eratt(phba);
1836 return;
1837 }
1838 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1839 "7623 Checking UE recoverable");
1840
1841 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1842 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1843 &portsmphr_reg.word0))
1844 continue;
1845
1846 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1847 &portsmphr_reg);
1848 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1849 LPFC_PORT_SEM_UE_RECOVERABLE)
1850 break;
1851 /*Sleep for 1Sec, before checking SEMAPHORE */
1852 msleep(1000);
1853 }
1854
1855 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1856 "4827 smphr_port_status x%x : Waited %dSec",
1857 smphr_port_status, i);
1858
1859 /* Recoverable UE, reset the HBA device */
1860 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1861 LPFC_PORT_SEM_UE_RECOVERABLE) {
1862 for (i = 0; i < 20; i++) {
1863 msleep(1000);
1864 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1865 &portsmphr_reg.word0) &&
1866 (LPFC_POST_STAGE_PORT_READY ==
1867 bf_get(lpfc_port_smphr_port_status,
1868 &portsmphr_reg))) {
1869 rc = lpfc_sli4_port_sta_fn_reset(phba,
1870 LPFC_MBX_NO_WAIT, en_rn_msg);
1871 if (rc == 0)
1872 return;
1873 lpfc_printf_log(phba,
1874 KERN_ERR, LOG_INIT,
1875 "4215 Failed to recover UE");
1876 break;
1877 }
1878 }
1879 }
1880 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1881 "7624 Firmware not ready: Failing UE recovery,"
1882 " waited %dSec", i);
2fcee4bf
JS
1883 lpfc_sli4_offline_eratt(phba);
1884 break;
946727dc 1885
2fcee4bf 1886 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS
1887 pci_rd_rc1 = lpfc_readl(
1888 phba->sli4_hba.u.if_type2.STATUSregaddr,
1889 &portstat_reg.word0);
1890 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS
1891 if (pci_rd_rc1 == -EIO) {
1892 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1893 "3151 PCI bus read access failure: x%x\n",
1894 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1895 return;
6b5151fd 1896 }
2e90f4b5
JS
1897 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1898 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1899 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS
1900 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1901 "2889 Port Overtemperature event, "
946727dc
JS
1902 "taking port offline Data: x%x x%x\n",
1903 reg_err1, reg_err2);
1904
310429ef 1905 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
1906 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1907 temp_event_data.event_code = LPFC_CRIT_TEMP;
1908 temp_event_data.data = 0xFFFFFFFF;
1909
1910 shost = lpfc_shost_from_vport(phba->pport);
1911 fc_host_post_vendor_event(shost, fc_get_event_number(),
1912 sizeof(temp_event_data),
1913 (char *)&temp_event_data,
1914 SCSI_NL_VID_TYPE_PCI
1915 | PCI_VENDOR_ID_EMULEX);
1916
2fcee4bf
JS
1917 spin_lock_irq(&phba->hbalock);
1918 phba->over_temp_state = HBA_OVER_TEMP;
1919 spin_unlock_irq(&phba->hbalock);
1920 lpfc_sli4_offline_eratt(phba);
946727dc 1921 return;
2fcee4bf 1922 }
2e90f4b5 1923 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1924 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1925 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS
1926 "3143 Port Down: Firmware Update "
1927 "Detected\n");
1928 en_rn_msg = false;
1929 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS
1930 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1931 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1932 "3144 Port Down: Debug Dump\n");
1933 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1934 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1935 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1936 "3145 Port Down: Provisioning\n");
618a5230 1937
946727dc
JS
1938 /* If resets are disabled then leave the HBA alone and return */
1939 if (!phba->cfg_enable_hba_reset)
1940 return;
1941
618a5230 1942 /* Check port status register for function reset */
e10b2022
JS
1943 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1944 en_rn_msg);
618a5230
JS
1945 if (rc == 0) {
1946 /* don't report event on forced debug dump */
1947 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1948 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1949 return;
1950 else
1951 break;
2fcee4bf 1952 }
618a5230 1953 /* fall through for not able to recover */
6b5151fd
JS
1954 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1955 "3152 Unrecoverable error, bring the port "
1956 "offline\n");
2fcee4bf
JS
1957 lpfc_sli4_offline_eratt(phba);
1958 break;
1959 case LPFC_SLI_INTF_IF_TYPE_1:
1960 default:
1961 break;
1962 }
2e90f4b5
JS
1963 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1964 "3123 Report dump event to upper layer\n");
1965 /* Send an internal error event to mgmt application */
1966 lpfc_board_errevt_to_mgmt(phba);
1967
1968 event_data = FC_REG_DUMP_EVENT;
1969 shost = lpfc_shost_from_vport(vport);
1970 fc_host_post_vendor_event(shost, fc_get_event_number(),
1971 sizeof(event_data), (char *) &event_data,
1972 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS
1973}
1974
1975/**
1976 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1977 * @phba: pointer to lpfc HBA data structure.
1978 *
1979 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1980 * routine from the API jump table function pointer from the lpfc_hba struct.
1981 *
1982 * Return codes
af901ca1 1983 * 0 - success.
da0436e9
JS
1984 * Any other value - error.
1985 **/
1986void
1987lpfc_handle_eratt(struct lpfc_hba *phba)
1988{
1989 (*phba->lpfc_handle_eratt)(phba);
1990}
1991
e59058c4 1992/**
3621a710 1993 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS
1994 * @phba: pointer to lpfc hba data structure.
1995 *
1996 * This routine is invoked from the worker thread to handle a HBA host
895427bd 1997 * attention link event. SLI3 only.
e59058c4 1998 **/
dea3101e 1999void
2e0fef85 2000lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 2001{
2e0fef85
JS
2002 struct lpfc_vport *vport = phba->pport;
2003 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB
2004 LPFC_MBOXQ_t *pmb;
2005 volatile uint32_t control;
2006 struct lpfc_dmabuf *mp;
09372820 2007 int rc = 0;
dea3101e
JB
2008
2009 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS
2010 if (!pmb) {
2011 rc = 1;
dea3101e 2012 goto lpfc_handle_latt_err_exit;
09372820 2013 }
dea3101e
JB
2014
2015 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS
2016 if (!mp) {
2017 rc = 2;
dea3101e 2018 goto lpfc_handle_latt_free_pmb;
09372820 2019 }
dea3101e
JB
2020
2021 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS
2022 if (!mp->virt) {
2023 rc = 3;
dea3101e 2024 goto lpfc_handle_latt_free_mp;
09372820 2025 }
dea3101e 2026
6281bfe0 2027 /* Cleanup any outstanding ELS commands */
549e55cd 2028 lpfc_els_flush_all_cmd(phba);
dea3101e
JB
2029
2030 psli->slistat.link_event++;
76a95d75
JS
2031 lpfc_read_topology(phba, pmb, mp);
2032 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 2033 pmb->vport = vport;
0d2b6b83 2034 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 2035 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 2036 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS
2037 if (rc == MBX_NOT_FINISHED) {
2038 rc = 4;
14691150 2039 goto lpfc_handle_latt_free_mbuf;
09372820 2040 }
dea3101e
JB
2041
2042 /* Clear Link Attention in HA REG */
2e0fef85 2043 spin_lock_irq(&phba->hbalock);
dea3101e
JB
2044 writel(HA_LATT, phba->HAregaddr);
2045 readl(phba->HAregaddr); /* flush */
2e0fef85 2046 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
2047
2048 return;
2049
14691150 2050lpfc_handle_latt_free_mbuf:
895427bd 2051 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 2052 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e
JB
2053lpfc_handle_latt_free_mp:
2054 kfree(mp);
2055lpfc_handle_latt_free_pmb:
1dcb58e5 2056 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
2057lpfc_handle_latt_err_exit:
2058 /* Enable Link attention interrupts */
2e0fef85 2059 spin_lock_irq(&phba->hbalock);
dea3101e
JB
2060 psli->sli_flag |= LPFC_PROCESS_LA;
2061 control = readl(phba->HCregaddr);
2062 control |= HC_LAINT_ENA;
2063 writel(control, phba->HCregaddr);
2064 readl(phba->HCregaddr); /* flush */
2065
2066 /* Clear Link Attention in HA REG */
2067 writel(HA_LATT, phba->HAregaddr);
2068 readl(phba->HAregaddr); /* flush */
2e0fef85 2069 spin_unlock_irq(&phba->hbalock);
dea3101e 2070 lpfc_linkdown(phba);
2e0fef85 2071 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2072
09372820
JS
2073 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
2074 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e
JB
2075
2076 return;
2077}
2078
e59058c4 2079/**
3621a710 2080 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS
2081 * @phba: pointer to lpfc hba data structure.
2082 * @vpd: pointer to the vital product data.
2083 * @len: length of the vital product data in bytes.
2084 *
2085 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2086 * an array of characters. In this routine, the ModelName, ProgramType, and
2087 * ModelDesc, etc. fields of the phba data structure will be populated.
2088 *
2089 * Return codes
2090 * 0 - pointer to the VPD passed in is NULL
2091 * 1 - success
2092 **/
3772a991 2093int
2e0fef85 2094lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e
JB
2095{
2096 uint8_t lenlo, lenhi;
07da60c1 2097 int Length;
dea3101e
JB
2098 int i, j;
2099 int finished = 0;
2100 int index = 0;
2101
2102 if (!vpd)
2103 return 0;
2104
2105 /* Vital Product */
ed957684 2106 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2107 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e
JB
2108 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2109 (uint32_t) vpd[3]);
74b72a59 2110 while (!finished && (index < (len - 4))) {
dea3101e
JB
2111 switch (vpd[index]) {
2112 case 0x82:
74b72a59 2113 case 0x91:
dea3101e
JB
2114 index += 1;
2115 lenlo = vpd[index];
2116 index += 1;
2117 lenhi = vpd[index];
2118 index += 1;
2119 i = ((((unsigned short)lenhi) << 8) + lenlo);
2120 index += i;
2121 break;
2122 case 0x90:
2123 index += 1;
2124 lenlo = vpd[index];
2125 index += 1;
2126 lenhi = vpd[index];
2127 index += 1;
2128 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW
2129 if (Length > len - index)
2130 Length = len - index;
dea3101e
JB
2131 while (Length > 0) {
2132 /* Look for Serial Number */
2133 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2134 index += 2;
2135 i = vpd[index];
2136 index += 1;
2137 j = 0;
2138 Length -= (3+i);
2139 while(i--) {
2140 phba->SerialNumber[j++] = vpd[index++];
2141 if (j == 31)
2142 break;
2143 }
2144 phba->SerialNumber[j] = 0;
2145 continue;
2146 }
2147 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2148 phba->vpd_flag |= VPD_MODEL_DESC;
2149 index += 2;
2150 i = vpd[index];
2151 index += 1;
2152 j = 0;
2153 Length -= (3+i);
2154 while(i--) {
2155 phba->ModelDesc[j++] = vpd[index++];
2156 if (j == 255)
2157 break;
2158 }
2159 phba->ModelDesc[j] = 0;
2160 continue;
2161 }
2162 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2163 phba->vpd_flag |= VPD_MODEL_NAME;
2164 index += 2;
2165 i = vpd[index];
2166 index += 1;
2167 j = 0;
2168 Length -= (3+i);
2169 while(i--) {
2170 phba->ModelName[j++] = vpd[index++];
2171 if (j == 79)
2172 break;
2173 }
2174 phba->ModelName[j] = 0;
2175 continue;
2176 }
2177 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2178 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2179 index += 2;
2180 i = vpd[index];
2181 index += 1;
2182 j = 0;
2183 Length -= (3+i);
2184 while(i--) {
2185 phba->ProgramType[j++] = vpd[index++];
2186 if (j == 255)
2187 break;
2188 }
2189 phba->ProgramType[j] = 0;
2190 continue;
2191 }
2192 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2193 phba->vpd_flag |= VPD_PORT;
2194 index += 2;
2195 i = vpd[index];
2196 index += 1;
2197 j = 0;
2198 Length -= (3+i);
2199 while(i--) {
cd1c8301
JS
2200 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2201 (phba->sli4_hba.pport_name_sta ==
2202 LPFC_SLI4_PPNAME_GET)) {
2203 j++;
2204 index++;
2205 } else
2206 phba->Port[j++] = vpd[index++];
2207 if (j == 19)
2208 break;
dea3101e 2209 }
cd1c8301
JS
2210 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2211 (phba->sli4_hba.pport_name_sta ==
2212 LPFC_SLI4_PPNAME_NON))
2213 phba->Port[j] = 0;
dea3101e
JB
2214 continue;
2215 }
2216 else {
2217 index += 2;
2218 i = vpd[index];
2219 index += 1;
2220 index += i;
2221 Length -= (3 + i);
2222 }
2223 }
2224 finished = 0;
2225 break;
2226 case 0x78:
2227 finished = 1;
2228 break;
2229 default:
2230 index ++;
2231 break;
2232 }
74b72a59 2233 }
dea3101e
JB
2234
2235 return(1);
2236}
2237
e59058c4 2238/**
3621a710 2239 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS
2240 * @phba: pointer to lpfc hba data structure.
2241 * @mdp: pointer to the data structure to hold the derived model name.
2242 * @descp: pointer to the data structure to hold the derived description.
2243 *
2244 * This routine retrieves HBA's description based on its registered PCI device
2245 * ID. The @descp passed into this function points to an array of 256 chars. It
2246 * shall be returned with the model name, maximum speed, and the host bus type.
2247 * The @mdp passed into this function points to an array of 80 chars. When the
2248 * function returns, the @mdp will be filled with the model name.
2249 **/
dea3101e 2250static void
2e0fef85 2251lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e
JB
2252{
2253 lpfc_vpd_t *vp;
fefcb2b6 2254 uint16_t dev_id = phba->pcidev->device;
74b72a59 2255 int max_speed;
84774a4d 2256 int GE = 0;
da0436e9 2257 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2258 struct {
a747c9ce
JS
2259 char *name;
2260 char *bus;
2261 char *function;
2262 } m = {"<Unknown>", "", ""};
74b72a59
JW
2263
2264 if (mdp && mdp[0] != '\0'
2265 && descp && descp[0] != '\0')
2266 return;
2267
d38dd52c
JS
2268 if (phba->lmt & LMT_32Gb)
2269 max_speed = 32;
2270 else if (phba->lmt & LMT_16Gb)
c0c11512
JS
2271 max_speed = 16;
2272 else if (phba->lmt & LMT_10Gb)
74b72a59
JW
2273 max_speed = 10;
2274 else if (phba->lmt & LMT_8Gb)
2275 max_speed = 8;
2276 else if (phba->lmt & LMT_4Gb)
2277 max_speed = 4;
2278 else if (phba->lmt & LMT_2Gb)
2279 max_speed = 2;
4169d868 2280 else if (phba->lmt & LMT_1Gb)
74b72a59 2281 max_speed = 1;
4169d868
JS
2282 else
2283 max_speed = 0;
dea3101e
JB
2284
2285 vp = &phba->vpd;
dea3101e 2286
e4adb204 2287 switch (dev_id) {
06325e74 2288 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS
2289 m = (typeof(m)){"LP6000", "PCI",
2290 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2291 break;
dea3101e
JB
2292 case PCI_DEVICE_ID_SUPERFLY:
2293 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2294 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2295 else
12222f4f
JS
2296 m = (typeof(m)){"LP7000E", "PCI", ""};
2297 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2298 break;
2299 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2300 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2301 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2302 break;
2303 case PCI_DEVICE_ID_CENTAUR:
2304 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2305 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2306 else
12222f4f
JS
2307 m = (typeof(m)){"LP9000", "PCI", ""};
2308 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2309 break;
2310 case PCI_DEVICE_ID_RFLY:
a747c9ce 2311 m = (typeof(m)){"LP952", "PCI",
12222f4f 2312 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2313 break;
2314 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2315 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2316 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2317 break;
2318 case PCI_DEVICE_ID_THOR:
a747c9ce 2319 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2320 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2321 break;
2322 case PCI_DEVICE_ID_VIPER:
a747c9ce 2323 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2324 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2325 break;
2326 case PCI_DEVICE_ID_PFLY:
a747c9ce 2327 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2328 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2329 break;
2330 case PCI_DEVICE_ID_TFLY:
a747c9ce 2331 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2332 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2333 break;
2334 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2335 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2336 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2337 break;
e4adb204 2338 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2339 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2340 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2341 break;
2342 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2343 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2344 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2345 break;
2346 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS
2347 m = (typeof(m)){"LPe1000", "PCIe",
2348 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2349 break;
2350 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS
2351 m = (typeof(m)){"LPe1000-SP", "PCIe",
2352 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2353 break;
2354 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS
2355 m = (typeof(m)){"LPe1002-SP", "PCIe",
2356 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2357 break;
dea3101e 2358 case PCI_DEVICE_ID_BMID:
a747c9ce 2359 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e
JB
2360 break;
2361 case PCI_DEVICE_ID_BSMB:
12222f4f
JS
2362 m = (typeof(m)){"LP111", "PCI-X2",
2363 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2364 break;
2365 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2366 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2367 break;
e4adb204 2368 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2369 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC
2370 break;
2371 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2372 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2373 GE = 1;
e4adb204 2374 break;
dea3101e 2375 case PCI_DEVICE_ID_ZMID:
a747c9ce 2376 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2377 break;
2378 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2379 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2380 break;
2381 case PCI_DEVICE_ID_LP101:
12222f4f
JS
2382 m = (typeof(m)){"LP101", "PCI-X",
2383 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2384 break;
2385 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS
2386 m = (typeof(m)){"LP10000-S", "PCI",
2387 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2388 break;
e4adb204 2389 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS
2390 m = (typeof(m)){"LP11000-S", "PCI-X2",
2391 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2392 break;
e4adb204 2393 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS
2394 m = (typeof(m)){"LPe11000-S", "PCIe",
2395 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2396 break;
b87eab38 2397 case PCI_DEVICE_ID_SAT:
a747c9ce 2398 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2399 break;
2400 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2401 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2402 break;
2403 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2404 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2405 break;
2406 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2407 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2408 break;
2409 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2410 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2411 break;
2412 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2413 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2414 break;
84774a4d 2415 case PCI_DEVICE_ID_HORNET:
12222f4f
JS
2416 m = (typeof(m)){"LP21000", "PCIe",
2417 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS
2418 GE = 1;
2419 break;
2420 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2421 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2422 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2423 break;
2424 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2425 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2426 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2427 break;
2428 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2429 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2430 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2431 break;
da0436e9
JS
2432 case PCI_DEVICE_ID_TIGERSHARK:
2433 oneConnect = 1;
a747c9ce 2434 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2435 break;
a747c9ce 2436 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2437 oneConnect = 1;
a747c9ce
JS
2438 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2439 break;
2440 case PCI_DEVICE_ID_FALCON:
2441 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2442 "EmulexSecure Fibre"};
6669f9bb 2443 break;
98fc5dd9
JS
2444 case PCI_DEVICE_ID_BALIUS:
2445 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2446 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2447 break;
085c647c 2448 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2449 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2450 break;
12222f4f
JS
2451 case PCI_DEVICE_ID_LANCER_FC_VF:
2452 m = (typeof(m)){"LPe16000", "PCIe",
2453 "Obsolete, Unsupported Fibre Channel Adapter"};
2454 break;
085c647c
JS
2455 case PCI_DEVICE_ID_LANCER_FCOE:
2456 oneConnect = 1;
079b5c91 2457 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2458 break;
12222f4f
JS
2459 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2460 oneConnect = 1;
2461 m = (typeof(m)){"OCe15100", "PCIe",
2462 "Obsolete, Unsupported FCoE"};
2463 break;
d38dd52c
JS
2464 case PCI_DEVICE_ID_LANCER_G6_FC:
2465 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2466 break;
f8cafd38
JS
2467 case PCI_DEVICE_ID_SKYHAWK:
2468 case PCI_DEVICE_ID_SKYHAWK_VF:
2469 oneConnect = 1;
2470 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2471 break;
5cc36b3c 2472 default:
a747c9ce 2473 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2474 break;
dea3101e 2475 }
74b72a59
JW
2476
2477 if (mdp && mdp[0] == '\0')
2478 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS
2479 /*
2480 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS
2481 * and we put the port number on the end
2482 */
2483 if (descp && descp[0] == '\0') {
2484 if (oneConnect)
2485 snprintf(descp, 255,
4169d868 2486 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2487 m.name, m.function,
da0436e9 2488 phba->Port);
4169d868
JS
2489 else if (max_speed == 0)
2490 snprintf(descp, 255,
290237d2 2491 "Emulex %s %s %s",
4169d868 2492 m.name, m.bus, m.function);
da0436e9
JS
2493 else
2494 snprintf(descp, 255,
2495 "Emulex %s %d%s %s %s",
a747c9ce
JS
2496 m.name, max_speed, (GE) ? "GE" : "Gb",
2497 m.bus, m.function);
da0436e9 2498 }
dea3101e
JB
2499}
2500
e59058c4 2501/**
3621a710 2502 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS
2503 * @phba: pointer to lpfc hba data structure.
2504 * @pring: pointer to a IOCB ring.
2505 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2506 *
2507 * This routine posts a given number of IOCBs with the associated DMA buffer
2508 * descriptors specified by the cnt argument to the given IOCB ring.
2509 *
2510 * Return codes
2511 * The number of IOCBs NOT able to be posted to the IOCB ring.
2512 **/
dea3101e 2513int
495a714c 2514lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e
JB
2515{
2516 IOCB_t *icmd;
0bd4ca25 2517 struct lpfc_iocbq *iocb;
dea3101e
JB
2518 struct lpfc_dmabuf *mp1, *mp2;
2519
2520 cnt += pring->missbufcnt;
2521
2522 /* While there are buffers to post */
2523 while (cnt > 0) {
2524 /* Allocate buffer for command iocb */
0bd4ca25 2525 iocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
2526 if (iocb == NULL) {
2527 pring->missbufcnt = cnt;
2528 return cnt;
2529 }
dea3101e
JB
2530 icmd = &iocb->iocb;
2531
2532 /* 2 buffers can be posted per command */
2533 /* Allocate buffer to post */
2534 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2535 if (mp1)
98c9ea5c
JS
2536 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2537 if (!mp1 || !mp1->virt) {
c9475cb0 2538 kfree(mp1);
604a3e30 2539 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2540 pring->missbufcnt = cnt;
2541 return cnt;
2542 }
2543
2544 INIT_LIST_HEAD(&mp1->list);
2545 /* Allocate buffer to post */
2546 if (cnt > 1) {
2547 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2548 if (mp2)
2549 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2550 &mp2->phys);
98c9ea5c 2551 if (!mp2 || !mp2->virt) {
c9475cb0 2552 kfree(mp2);
dea3101e
JB
2553 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2554 kfree(mp1);
604a3e30 2555 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2556 pring->missbufcnt = cnt;
2557 return cnt;
2558 }
2559
2560 INIT_LIST_HEAD(&mp2->list);
2561 } else {
2562 mp2 = NULL;
2563 }
2564
2565 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2566 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2567 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2568 icmd->ulpBdeCount = 1;
2569 cnt--;
2570 if (mp2) {
2571 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2572 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2573 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2574 cnt--;
2575 icmd->ulpBdeCount = 2;
2576 }
2577
2578 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2579 icmd->ulpLe = 1;
2580
3772a991
JS
2581 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2582 IOCB_ERROR) {
dea3101e
JB
2583 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2584 kfree(mp1);
2585 cnt++;
2586 if (mp2) {
2587 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2588 kfree(mp2);
2589 cnt++;
2590 }
604a3e30 2591 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2592 pring->missbufcnt = cnt;
dea3101e
JB
2593 return cnt;
2594 }
dea3101e 2595 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2596 if (mp2)
dea3101e 2597 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e
JB
2598 }
2599 pring->missbufcnt = 0;
2600 return 0;
2601}
2602
e59058c4 2603/**
3621a710 2604 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS
2605 * @phba: pointer to lpfc hba data structure.
2606 *
2607 * This routine posts initial receive IOCB buffers to the ELS ring. The
2608 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2609 * set to 64 IOCBs. SLI3 only.
e59058c4
JS
2610 *
2611 * Return codes
2612 * 0 - success (currently always success)
2613 **/
dea3101e 2614static int
2e0fef85 2615lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e
JB
2616{
2617 struct lpfc_sli *psli = &phba->sli;
2618
2619 /* Ring 0, ELS / CT buffers */
895427bd 2620 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e
JB
2621 /* Ring 2 - FCP no buffers needed */
2622
2623 return 0;
2624}
2625
2626#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2627
e59058c4 2628/**
3621a710 2629 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS
2630 * @HashResultPointer: pointer to an array as hash table.
2631 *
2632 * This routine sets up the initial values to the array of hash table entries
2633 * for the LC HBAs.
2634 **/
dea3101e
JB
2635static void
2636lpfc_sha_init(uint32_t * HashResultPointer)
2637{
2638 HashResultPointer[0] = 0x67452301;
2639 HashResultPointer[1] = 0xEFCDAB89;
2640 HashResultPointer[2] = 0x98BADCFE;
2641 HashResultPointer[3] = 0x10325476;
2642 HashResultPointer[4] = 0xC3D2E1F0;
2643}
2644
e59058c4 2645/**
3621a710 2646 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS
2647 * @HashResultPointer: pointer to an initial/result hash table.
2648 * @HashWorkingPointer: pointer to an working hash table.
2649 *
2650 * This routine iterates an initial hash table pointed by @HashResultPointer
2651 * with the values from the working hash table pointeed by @HashWorkingPointer.
2652 * The results are putting back to the initial hash table, returned through
2653 * the @HashResultPointer as the result hash table.
2654 **/
dea3101e
JB
2655static void
2656lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2657{
2658 int t;
2659 uint32_t TEMP;
2660 uint32_t A, B, C, D, E;
2661 t = 16;
2662 do {
2663 HashWorkingPointer[t] =
2664 S(1,
2665 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2666 8] ^
2667 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2668 } while (++t <= 79);
2669 t = 0;
2670 A = HashResultPointer[0];
2671 B = HashResultPointer[1];
2672 C = HashResultPointer[2];
2673 D = HashResultPointer[3];
2674 E = HashResultPointer[4];
2675
2676 do {
2677 if (t < 20) {
2678 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2679 } else if (t < 40) {
2680 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2681 } else if (t < 60) {
2682 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2683 } else {
2684 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2685 }
2686 TEMP += S(5, A) + E + HashWorkingPointer[t];
2687 E = D;
2688 D = C;
2689 C = S(30, B);
2690 B = A;
2691 A = TEMP;
2692 } while (++t <= 79);
2693
2694 HashResultPointer[0] += A;
2695 HashResultPointer[1] += B;
2696 HashResultPointer[2] += C;
2697 HashResultPointer[3] += D;
2698 HashResultPointer[4] += E;
2699
2700}
2701
e59058c4 2702/**
3621a710 2703 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS
2704 * @RandomChallenge: pointer to the entry of host challenge random number array.
2705 * @HashWorking: pointer to the entry of the working hash array.
2706 *
2707 * This routine calculates the working hash array referred by @HashWorking
2708 * from the challenge random numbers associated with the host, referred by
2709 * @RandomChallenge. The result is put into the entry of the working hash
2710 * array and returned by reference through @HashWorking.
2711 **/
dea3101e
JB
2712static void
2713lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2714{
2715 *HashWorking = (*RandomChallenge ^ *HashWorking);
2716}
2717
e59058c4 2718/**
3621a710 2719 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS
2720 * @phba: pointer to lpfc hba data structure.
2721 * @hbainit: pointer to an array of unsigned 32-bit integers.
2722 *
2723 * This routine performs the special handling for LC HBA initialization.
2724 **/
dea3101e
JB
2725void
2726lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2727{
2728 int t;
2729 uint32_t *HashWorking;
2e0fef85 2730 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2731
bbfbbbc1 2732 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e
JB
2733 if (!HashWorking)
2734 return;
2735
dea3101e
JB
2736 HashWorking[0] = HashWorking[78] = *pwwnn++;
2737 HashWorking[1] = HashWorking[79] = *pwwnn;
2738
2739 for (t = 0; t < 7; t++)
2740 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2741
2742 lpfc_sha_init(hbainit);
2743 lpfc_sha_iterate(hbainit, HashWorking);
2744 kfree(HashWorking);
2745}
2746
e59058c4 2747/**
3621a710 2748 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS
2749 * @vport: pointer to a virtual N_Port data structure.
2750 *
2751 * This routine performs the necessary cleanups before deleting the @vport.
2752 * It invokes the discovery state machine to perform necessary state
2753 * transitions and to release the ndlps associated with the @vport. Note,
2754 * the physical port is treated as @vport 0.
2755 **/
87af33fe 2756void
2e0fef85 2757lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2758{
87af33fe 2759 struct lpfc_hba *phba = vport->phba;
dea3101e 2760 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2761 int i = 0;
dea3101e 2762
87af33fe
JS
2763 if (phba->link_state > LPFC_LINK_DOWN)
2764 lpfc_port_link_failure(vport);
2765
2766 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS
2767 if (!NLP_CHK_NODE_ACT(ndlp)) {
2768 ndlp = lpfc_enable_node(vport, ndlp,
2769 NLP_STE_UNUSED_NODE);
2770 if (!ndlp)
2771 continue;
2772 spin_lock_irq(&phba->ndlp_lock);
2773 NLP_SET_FREE_REQ(ndlp);
2774 spin_unlock_irq(&phba->ndlp_lock);
2775 /* Trigger the release of the ndlp memory */
2776 lpfc_nlp_put(ndlp);
2777 continue;
2778 }
2779 spin_lock_irq(&phba->ndlp_lock);
2780 if (NLP_CHK_FREE_REQ(ndlp)) {
2781 /* The ndlp should not be in memory free mode already */
2782 spin_unlock_irq(&phba->ndlp_lock);
2783 continue;
2784 } else
2785 /* Indicate request for freeing ndlp memory */
2786 NLP_SET_FREE_REQ(ndlp);
2787 spin_unlock_irq(&phba->ndlp_lock);
2788
58da1ffb
JS
2789 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2790 ndlp->nlp_DID == Fabric_DID) {
2791 /* Just free up ndlp with Fabric_DID for vports */
2792 lpfc_nlp_put(ndlp);
2793 continue;
2794 }
2795
eff4a01b
JS
2796 /* take care of nodes in unused state before the state
2797 * machine taking action.
2798 */
2799 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2800 lpfc_nlp_put(ndlp);
2801 continue;
2802 }
2803
87af33fe
JS
2804 if (ndlp->nlp_type & NLP_FABRIC)
2805 lpfc_disc_state_machine(vport, ndlp, NULL,
2806 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2807
87af33fe
JS
2808 lpfc_disc_state_machine(vport, ndlp, NULL,
2809 NLP_EVT_DEVICE_RM);
2810 }
2811
a8adb832
JS
2812 /* At this point, ALL ndlp's should be gone
2813 * because of the previous NLP_EVT_DEVICE_RM.
2814 * Lets wait for this to happen, if needed.
2815 */
87af33fe 2816 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2817 if (i++ > 3000) {
87af33fe 2818 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2819 "0233 Nodelist not empty\n");
e47c9093
JS
2820 list_for_each_entry_safe(ndlp, next_ndlp,
2821 &vport->fc_nodes, nlp_listp) {
2822 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2823 LOG_NODE,
d7c255b2 2824 "0282 did:x%x ndlp:x%p "
e47c9093
JS
2825 "usgmap:x%x refcnt:%d\n",
2826 ndlp->nlp_DID, (void *)ndlp,
2827 ndlp->nlp_usg_map,
2c935bc5 2828 kref_read(&ndlp->kref));
e47c9093 2829 }
a8adb832 2830 break;
87af33fe 2831 }
a8adb832
JS
2832
2833 /* Wait for any activity on ndlps to settle */
2834 msleep(10);
87af33fe 2835 }
1151e3ec 2836 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e
JB
2837}
2838
e59058c4 2839/**
3621a710 2840 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS
2841 * @vport: pointer to a virtual N_Port data structure.
2842 *
2843 * This routine stops all the timers associated with a @vport. This function
2844 * is invoked before disabling or deleting a @vport. Note that the physical
2845 * port is treated as @vport 0.
2846 **/
92d7f7b0
JS
2847void
2848lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2849{
92d7f7b0 2850 del_timer_sync(&vport->els_tmofunc);
92494144 2851 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS
2852 lpfc_can_disctmo(vport);
2853 return;
dea3101e
JB
2854}
2855
ecfd03c6
JS
2856/**
2857 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2858 * @phba: pointer to lpfc hba data structure.
2859 *
2860 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2861 * caller of this routine should already hold the host lock.
2862 **/
2863void
2864__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2865{
5ac6b303
JS
2866 /* Clear pending FCF rediscovery wait flag */
2867 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2868
ecfd03c6
JS
2869 /* Now, try to stop the timer */
2870 del_timer(&phba->fcf.redisc_wait);
2871}
2872
2873/**
2874 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2875 * @phba: pointer to lpfc hba data structure.
2876 *
2877 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2878 * checks whether the FCF rediscovery wait timer is pending with the host
2879 * lock held before proceeding with disabling the timer and clearing the
2880 * wait timer pendig flag.
2881 **/
2882void
2883lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2884{
2885 spin_lock_irq(&phba->hbalock);
2886 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2887 /* FCF rediscovery timer already fired or stopped */
2888 spin_unlock_irq(&phba->hbalock);
2889 return;
2890 }
2891 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS
2892 /* Clear failover in progress flags */
2893 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS
2894 spin_unlock_irq(&phba->hbalock);
2895}
2896
e59058c4 2897/**
3772a991 2898 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS
2899 * @phba: pointer to lpfc hba data structure.
2900 *
2901 * This routine stops all the timers associated with a HBA. This function is
2902 * invoked before either putting a HBA offline or unloading the driver.
2903 **/
3772a991
JS
2904void
2905lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2906{
51ef4c26 2907 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2908 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2909 del_timer_sync(&phba->fabric_block_timer);
9399627f 2910 del_timer_sync(&phba->eratt_poll);
3772a991 2911 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS
2912 if (phba->sli_rev == LPFC_SLI_REV4) {
2913 del_timer_sync(&phba->rrq_tmr);
2914 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2915 }
3772a991
JS
2916 phba->hb_outstanding = 0;
2917
2918 switch (phba->pci_dev_grp) {
2919 case LPFC_PCI_DEV_LP:
2920 /* Stop any LightPulse device specific driver timers */
2921 del_timer_sync(&phba->fcp_poll_timer);
2922 break;
2923 case LPFC_PCI_DEV_OC:
2924 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2925 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS
2926 break;
2927 default:
2928 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2929 "0297 Invalid device group (x%x)\n",
2930 phba->pci_dev_grp);
2931 break;
2932 }
2e0fef85 2933 return;
dea3101e
JB
2934}
2935
e59058c4 2936/**
3621a710 2937 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS
2938 * @phba: pointer to lpfc hba data structure.
2939 *
2940 * This routine marks a HBA's management interface as blocked. Once the HBA's
2941 * management interface is marked as blocked, all the user space access to
2942 * the HBA, whether they are from sysfs interface or libdfc interface will
2943 * all be blocked. The HBA is set to block the management interface when the
2944 * driver prepares the HBA interface for online or offline.
2945 **/
a6ababd2 2946static void
618a5230 2947lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB
2948{
2949 unsigned long iflag;
6e7288d9
JS
2950 uint8_t actcmd = MBX_HEARTBEAT;
2951 unsigned long timeout;
2952
a6ababd2
AB
2953 spin_lock_irqsave(&phba->hbalock, iflag);
2954 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS
2955 spin_unlock_irqrestore(&phba->hbalock, iflag);
2956 if (mbx_action == LPFC_MBX_NO_WAIT)
2957 return;
2958 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2959 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2960 if (phba->sli.mbox_active) {
6e7288d9 2961 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS
2962 /* Determine how long we might wait for the active mailbox
2963 * command to be gracefully completed by firmware.
2964 */
2965 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2966 phba->sli.mbox_active) * 1000) + jiffies;
2967 }
a6ababd2 2968 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2969
6e7288d9
JS
2970 /* Wait for the outstnading mailbox command to complete */
2971 while (phba->sli.mbox_active) {
2972 /* Check active mailbox complete status every 2ms */
2973 msleep(2);
2974 if (time_after(jiffies, timeout)) {
2975 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2976 "2813 Mgmt IO is Blocked %x "
2977 "- mbox cmd %x still active\n",
2978 phba->sli.sli_flag, actcmd);
2979 break;
2980 }
2981 }
a6ababd2
AB
2982}
2983
6b5151fd
JS
2984/**
2985 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2986 * @phba: pointer to lpfc hba data structure.
2987 *
2988 * Allocate RPIs for all active remote nodes. This is needed whenever
2989 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2990 * is to fixup the temporary rpi assignments.
2991 **/
2992void
2993lpfc_sli4_node_prep(struct lpfc_hba *phba)
2994{
2995 struct lpfc_nodelist *ndlp, *next_ndlp;
2996 struct lpfc_vport **vports;
9d3d340d
JS
2997 int i, rpi;
2998 unsigned long flags;
6b5151fd
JS
2999
3000 if (phba->sli_rev != LPFC_SLI_REV4)
3001 return;
3002
3003 vports = lpfc_create_vport_work_array(phba);
9d3d340d
JS
3004 if (vports == NULL)
3005 return;
6b5151fd 3006
9d3d340d
JS
3007 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3008 if (vports[i]->load_flag & FC_UNLOADING)
3009 continue;
3010
3011 list_for_each_entry_safe(ndlp, next_ndlp,
3012 &vports[i]->fc_nodes,
3013 nlp_listp) {
3014 if (!NLP_CHK_NODE_ACT(ndlp))
3015 continue;
3016 rpi = lpfc_sli4_alloc_rpi(phba);
3017 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3018 spin_lock_irqsave(&phba->ndlp_lock, flags);
3019 NLP_CLR_NODE_ACT(ndlp);
3020 spin_unlock_irqrestore(&phba->ndlp_lock, flags);
3021 continue;
6b5151fd 3022 }
9d3d340d
JS
3023 ndlp->nlp_rpi = rpi;
3024 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
3025 "0009 rpi:%x DID:%x "
3026 "flg:%x map:%x %p\n", ndlp->nlp_rpi,
3027 ndlp->nlp_DID, ndlp->nlp_flag,
3028 ndlp->nlp_usg_map, ndlp);
6b5151fd
JS
3029 }
3030 }
3031 lpfc_destroy_vport_work_array(phba, vports);
3032}
3033
e59058c4 3034/**
3621a710 3035 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS
3036 * @phba: pointer to lpfc hba data structure.
3037 *
3038 * This routine initializes the HBA and brings a HBA online. During this
3039 * process, the management interface is blocked to prevent user space access
3040 * to the HBA interfering with the driver initialization.
3041 *
3042 * Return codes
3043 * 0 - successful
3044 * 1 - failed
3045 **/
dea3101e 3046int
2e0fef85 3047lpfc_online(struct lpfc_hba *phba)
dea3101e 3048{
372bd282 3049 struct lpfc_vport *vport;
549e55cd
JS
3050 struct lpfc_vport **vports;
3051 int i;
16a3a208 3052 bool vpis_cleared = false;
2e0fef85 3053
dea3101e
JB
3054 if (!phba)
3055 return 0;
372bd282 3056 vport = phba->pport;
dea3101e 3057
2e0fef85 3058 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e
JB
3059 return 0;
3060
ed957684 3061 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3062 "0458 Bring Adapter online\n");
dea3101e 3063
618a5230 3064 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 3065
da0436e9
JS
3066 if (phba->sli_rev == LPFC_SLI_REV4) {
3067 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3068 lpfc_unblock_mgmt_io(phba);
3069 return 1;
3070 }
16a3a208
JS
3071 spin_lock_irq(&phba->hbalock);
3072 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3073 vpis_cleared = true;
3074 spin_unlock_irq(&phba->hbalock);
da0436e9 3075 } else {
895427bd 3076 lpfc_sli_queue_init(phba);
da0436e9
JS
3077 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3078 lpfc_unblock_mgmt_io(phba);
3079 return 1;
3080 }
46fa311e 3081 }
dea3101e 3082
549e55cd 3083 vports = lpfc_create_vport_work_array(phba);
aeb6641f 3084 if (vports != NULL) {
da0436e9 3085 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS
3086 struct Scsi_Host *shost;
3087 shost = lpfc_shost_from_vport(vports[i]);
3088 spin_lock_irq(shost->host_lock);
3089 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
3090 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3091 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 3092 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 3093 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS
3094 if ((vpis_cleared) &&
3095 (vports[i]->port_type !=
3096 LPFC_PHYSICAL_PORT))
3097 vports[i]->vpi = 0;
3098 }
549e55cd
JS
3099 spin_unlock_irq(shost->host_lock);
3100 }
aeb6641f
AB
3101 }
3102 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3103
46fa311e 3104 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
3105 return 0;
3106}
3107
e59058c4 3108/**
3621a710 3109 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS
3110 * @phba: pointer to lpfc hba data structure.
3111 *
3112 * This routine marks a HBA's management interface as not blocked. Once the
3113 * HBA's management interface is marked as not blocked, all the user space
3114 * access to the HBA, whether they are from sysfs interface or libdfc
3115 * interface will be allowed. The HBA is set to block the management interface
3116 * when the driver prepares the HBA interface for online or offline and then
3117 * set to unblock the management interface afterwards.
3118 **/
46fa311e
JS
3119void
3120lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3121{
3122 unsigned long iflag;
3123
2e0fef85
JS
3124 spin_lock_irqsave(&phba->hbalock, iflag);
3125 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3126 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS
3127}
3128
e59058c4 3129/**
3621a710 3130 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS
3131 * @phba: pointer to lpfc hba data structure.
3132 *
3133 * This routine is invoked to prepare a HBA to be brought offline. It performs
3134 * unregistration login to all the nodes on all vports and flushes the mailbox
3135 * queue to make it ready to be brought offline.
3136 **/
46fa311e 3137void
618a5230 3138lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3139{
2e0fef85 3140 struct lpfc_vport *vport = phba->pport;
46fa311e 3141 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3142 struct lpfc_vport **vports;
72100cc4 3143 struct Scsi_Host *shost;
87af33fe 3144 int i;
dea3101e 3145
2e0fef85 3146 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3147 return;
dea3101e 3148
618a5230 3149 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e
JB
3150
3151 lpfc_linkdown(phba);
3152
87af33fe
JS
3153 /* Issue an unreg_login to all nodes on all vports */
3154 vports = lpfc_create_vport_work_array(phba);
3155 if (vports != NULL) {
da0436e9 3156 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS
3157 if (vports[i]->load_flag & FC_UNLOADING)
3158 continue;
72100cc4
JS
3159 shost = lpfc_shost_from_vport(vports[i]);
3160 spin_lock_irq(shost->host_lock);
c868595d 3161 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS
3162 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3163 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3164 spin_unlock_irq(shost->host_lock);
695a814e 3165
87af33fe
JS
3166 shost = lpfc_shost_from_vport(vports[i]);
3167 list_for_each_entry_safe(ndlp, next_ndlp,
3168 &vports[i]->fc_nodes,
3169 nlp_listp) {
e47c9093
JS
3170 if (!NLP_CHK_NODE_ACT(ndlp))
3171 continue;
87af33fe
JS
3172 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3173 continue;
3174 if (ndlp->nlp_type & NLP_FABRIC) {
3175 lpfc_disc_state_machine(vports[i], ndlp,
3176 NULL, NLP_EVT_DEVICE_RECOVERY);
3177 lpfc_disc_state_machine(vports[i], ndlp,
3178 NULL, NLP_EVT_DEVICE_RM);
3179 }
3180 spin_lock_irq(shost->host_lock);
3181 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3182 spin_unlock_irq(shost->host_lock);
6b5151fd
JS
3183 /*
3184 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS
3185 * RPI. Get a new RPI when the adapter port
3186 * comes back online.
6b5151fd 3187 */
be6bb941
JS
3188 if (phba->sli_rev == LPFC_SLI_REV4) {
3189 lpfc_printf_vlog(ndlp->vport,
3190 KERN_INFO, LOG_NODE,
3191 "0011 lpfc_offline: "
3192 "ndlp:x%p did %x "
3193 "usgmap:x%x rpi:%x\n",
3194 ndlp, ndlp->nlp_DID,
3195 ndlp->nlp_usg_map,
3196 ndlp->nlp_rpi);
3197
6b5151fd 3198 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3199 }
87af33fe
JS
3200 lpfc_unreg_rpi(vports[i], ndlp);
3201 }
3202 }
3203 }
09372820 3204 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3205
618a5230 3206 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
46fa311e
JS
3207}
3208
e59058c4 3209/**
3621a710 3210 * lpfc_offline - Bring a HBA offline
e59058c4
JS
3211 * @phba: pointer to lpfc hba data structure.
3212 *
3213 * This routine actually brings a HBA offline. It stops all the timers
3214 * associated with the HBA, brings down the SLI layer, and eventually
3215 * marks the HBA as in offline state for the upper layer protocol.
3216 **/
46fa311e 3217void
2e0fef85 3218lpfc_offline(struct lpfc_hba *phba)
46fa311e 3219{
549e55cd
JS
3220 struct Scsi_Host *shost;
3221 struct lpfc_vport **vports;
3222 int i;
46fa311e 3223
549e55cd 3224 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3225 return;
688a8863 3226
da0436e9
JS
3227 /* stop port and all timers associated with this hba */
3228 lpfc_stop_port(phba);
4b40d02b
DK
3229
3230 /* Tear down the local and target port registrations. The
3231 * nvme transports need to cleanup.
3232 */
3233 lpfc_nvmet_destroy_targetport(phba);
3234 lpfc_nvme_destroy_localport(phba->pport);
3235
51ef4c26
JS
3236 vports = lpfc_create_vport_work_array(phba);
3237 if (vports != NULL)
da0436e9 3238 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3239 lpfc_stop_vport_timers(vports[i]);
09372820 3240 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3241 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3242 "0460 Bring Adapter offline\n");
dea3101e
JB
3243 /* Bring down the SLI Layer and cleanup. The HBA is offline
3244 now. */
3245 lpfc_sli_hba_down(phba);
92d7f7b0 3246 spin_lock_irq(&phba->hbalock);
7054a606 3247 phba->work_ha = 0;
92d7f7b0 3248 spin_unlock_irq(&phba->hbalock);
549e55cd
JS
3249 vports = lpfc_create_vport_work_array(phba);
3250 if (vports != NULL)
da0436e9 3251 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3252 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS
3253 spin_lock_irq(shost->host_lock);
3254 vports[i]->work_port_events = 0;
3255 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3256 spin_unlock_irq(shost->host_lock);
3257 }
09372820 3258 lpfc_destroy_vport_work_array(phba, vports);
dea3101e
JB
3259}
3260
e59058c4 3261/**
3621a710 3262 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS
3263 * @phba: pointer to lpfc hba data structure.
3264 *
3265 * This routine is to free all the SCSI buffers and IOCBs from the driver
3266 * list back to kernel. It is called from lpfc_pci_remove_one to free
3267 * the internal resources before the device is removed from the system.
e59058c4 3268 **/
8a9d2e80 3269static void
2e0fef85 3270lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e
JB
3271{
3272 struct lpfc_scsi_buf *sb, *sb_next;
dea3101e 3273
895427bd
JS
3274 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3275 return;
3276
2e0fef85 3277 spin_lock_irq(&phba->hbalock);
a40fc5f0 3278
dea3101e 3279 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS
3280
3281 spin_lock(&phba->scsi_buf_list_put_lock);
3282 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3283 list) {
dea3101e 3284 list_del(&sb->list);
771db5c0 3285 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3286 sb->dma_handle);
dea3101e
JB
3287 kfree(sb);
3288 phba->total_scsi_bufs--;
3289 }
a40fc5f0
JS
3290 spin_unlock(&phba->scsi_buf_list_put_lock);
3291
3292 spin_lock(&phba->scsi_buf_list_get_lock);
3293 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3294 list) {
dea3101e 3295 list_del(&sb->list);
771db5c0 3296 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3297 sb->dma_handle);
dea3101e
JB
3298 kfree(sb);
3299 phba->total_scsi_bufs--;
3300 }
a40fc5f0 3301 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3302 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3303}
895427bd
JS
3304/**
3305 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3306 * @phba: pointer to lpfc hba data structure.
3307 *
3308 * This routine is to free all the NVME buffers and IOCBs from the driver
3309 * list back to kernel. It is called from lpfc_pci_remove_one to free
3310 * the internal resources before the device is removed from the system.
3311 **/
3312static void
3313lpfc_nvme_free(struct lpfc_hba *phba)
3314{
3315 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
895427bd
JS
3316
3317 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3318 return;
3319
3320 spin_lock_irq(&phba->hbalock);
3321
3322 /* Release all the lpfc_nvme_bufs maintained by this host. */
3323 spin_lock(&phba->nvme_buf_list_put_lock);
3324 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3325 &phba->lpfc_nvme_buf_list_put, list) {
3326 list_del(&lpfc_ncmd->list);
771db5c0 3327 dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
895427bd
JS
3328 lpfc_ncmd->dma_handle);
3329 kfree(lpfc_ncmd);
3330 phba->total_nvme_bufs--;
3331 }
3332 spin_unlock(&phba->nvme_buf_list_put_lock);
3333
3334 spin_lock(&phba->nvme_buf_list_get_lock);
3335 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3336 &phba->lpfc_nvme_buf_list_get, list) {
3337 list_del(&lpfc_ncmd->list);
771db5c0 3338 dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
895427bd
JS
3339 lpfc_ncmd->dma_handle);
3340 kfree(lpfc_ncmd);
3341 phba->total_nvme_bufs--;
3342 }
3343 spin_unlock(&phba->nvme_buf_list_get_lock);
895427bd
JS
3344 spin_unlock_irq(&phba->hbalock);
3345}
8a9d2e80 3346/**
895427bd 3347 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS
3348 * @phba: pointer to lpfc hba data structure.
3349 *
3350 * This routine first calculates the sizes of the current els and allocated
3351 * scsi sgl lists, and then goes through all sgls to updates the physical
3352 * XRIs assigned due to port function reset. During port initialization, the
3353 * current els and allocated scsi sgl lists are 0s.
3354 *
3355 * Return codes
3356 * 0 - successful (for now, it always returns 0)
3357 **/
3358int
895427bd 3359lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS
3360{
3361 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3362 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3363 LIST_HEAD(els_sgl_list);
8a9d2e80
JS
3364 int rc;
3365
3366 /*
3367 * update on pci function's els xri-sgl list
3368 */
3369 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3370
8a9d2e80
JS
3371 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3372 /* els xri-sgl expanded */
3373 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3374 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3375 "3157 ELS xri-sgl count increased from "
3376 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3377 els_xri_cnt);
3378 /* allocate the additional els sgls */
3379 for (i = 0; i < xri_cnt; i++) {
3380 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3381 GFP_KERNEL);
3382 if (sglq_entry == NULL) {
3383 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3384 "2562 Failure to allocate an "
3385 "ELS sgl entry:%d\n", i);
3386 rc = -ENOMEM;
3387 goto out_free_mem;
3388 }
3389 sglq_entry->buff_type = GEN_BUFF_TYPE;
3390 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3391 &sglq_entry->phys);
3392 if (sglq_entry->virt == NULL) {
3393 kfree(sglq_entry);
3394 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3395 "2563 Failure to allocate an "
3396 "ELS mbuf:%d\n", i);
3397 rc = -ENOMEM;
3398 goto out_free_mem;
3399 }
3400 sglq_entry->sgl = sglq_entry->virt;
3401 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3402 sglq_entry->state = SGL_FREED;
3403 list_add_tail(&sglq_entry->list, &els_sgl_list);
3404 }
38c20673 3405 spin_lock_irq(&phba->hbalock);
895427bd
JS
3406 spin_lock(&phba->sli4_hba.sgl_list_lock);
3407 list_splice_init(&els_sgl_list,
3408 &phba->sli4_hba.lpfc_els_sgl_list);
3409 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3410 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
3411 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3412 /* els xri-sgl shrinked */
3413 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3414 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3415 "3158 ELS xri-sgl count decreased from "
3416 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3417 els_xri_cnt);
3418 spin_lock_irq(&phba->hbalock);
895427bd
JS
3419 spin_lock(&phba->sli4_hba.sgl_list_lock);
3420 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3421 &els_sgl_list);
8a9d2e80
JS
3422 /* release extra els sgls from list */
3423 for (i = 0; i < xri_cnt; i++) {
3424 list_remove_head(&els_sgl_list,
3425 sglq_entry, struct lpfc_sglq, list);
3426 if (sglq_entry) {
895427bd
JS
3427 __lpfc_mbuf_free(phba, sglq_entry->virt,
3428 sglq_entry->phys);
8a9d2e80
JS
3429 kfree(sglq_entry);
3430 }
3431 }
895427bd
JS
3432 list_splice_init(&els_sgl_list,
3433 &phba->sli4_hba.lpfc_els_sgl_list);
3434 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS
3435 spin_unlock_irq(&phba->hbalock);
3436 } else
3437 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3438 "3163 ELS xri-sgl count unchanged: %d\n",
3439 els_xri_cnt);
3440 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3441
3442 /* update xris to els sgls on the list */
3443 sglq_entry = NULL;
3444 sglq_entry_next = NULL;
3445 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3446 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS
3447 lxri = lpfc_sli4_next_xritag(phba);
3448 if (lxri == NO_XRI) {
3449 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3450 "2400 Failed to allocate xri for "
3451 "ELS sgl\n");
3452 rc = -ENOMEM;
3453 goto out_free_mem;
3454 }
3455 sglq_entry->sli4_lxritag = lxri;
3456 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3457 }
895427bd
JS
3458 return 0;
3459
3460out_free_mem:
3461 lpfc_free_els_sgl_list(phba);
3462 return rc;
3463}
3464
f358dd0c
JS
3465/**
3466 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3467 * @phba: pointer to lpfc hba data structure.
3468 *
3469 * This routine first calculates the sizes of the current els and allocated
3470 * scsi sgl lists, and then goes through all sgls to updates the physical
3471 * XRIs assigned due to port function reset. During port initialization, the
3472 * current els and allocated scsi sgl lists are 0s.
3473 *
3474 * Return codes
3475 * 0 - successful (for now, it always returns 0)
3476 **/
3477int
3478lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3479{
3480 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3481 uint16_t i, lxri, xri_cnt, els_xri_cnt;
6c621a22 3482 uint16_t nvmet_xri_cnt;
f358dd0c
JS
3483 LIST_HEAD(nvmet_sgl_list);
3484 int rc;
3485
3486 /*
3487 * update on pci function's nvmet xri-sgl list
3488 */
3489 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
61f3d4bf 3490
6c621a22
JS
3491 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
3492 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
f358dd0c
JS
3493 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3494 /* els xri-sgl expanded */
3495 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3496 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3497 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3498 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3499 /* allocate the additional nvmet sgls */
3500 for (i = 0; i < xri_cnt; i++) {
3501 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3502 GFP_KERNEL);
3503 if (sglq_entry == NULL) {
3504 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3505 "6303 Failure to allocate an "
3506 "NVMET sgl entry:%d\n", i);
3507 rc = -ENOMEM;
3508 goto out_free_mem;
3509 }
3510 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3511 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3512 &sglq_entry->phys);
3513 if (sglq_entry->virt == NULL) {
3514 kfree(sglq_entry);
3515 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3516 "6304 Failure to allocate an "
3517 "NVMET buf:%d\n", i);
3518 rc = -ENOMEM;
3519 goto out_free_mem;
3520 }
3521 sglq_entry->sgl = sglq_entry->virt;
3522 memset(sglq_entry->sgl, 0,
3523 phba->cfg_sg_dma_buf_size);
3524 sglq_entry->state = SGL_FREED;
3525 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3526 }
3527 spin_lock_irq(&phba->hbalock);
3528 spin_lock(&phba->sli4_hba.sgl_list_lock);
3529 list_splice_init(&nvmet_sgl_list,
3530 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3531 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3532 spin_unlock_irq(&phba->hbalock);
3533 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3534 /* nvmet xri-sgl shrunk */
3535 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3536 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3537 "6305 NVMET xri-sgl count decreased from "
3538 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3539 nvmet_xri_cnt);
3540 spin_lock_irq(&phba->hbalock);
3541 spin_lock(&phba->sli4_hba.sgl_list_lock);
3542 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3543 &nvmet_sgl_list);
3544 /* release extra nvmet sgls from list */
3545 for (i = 0; i < xri_cnt; i++) {
3546 list_remove_head(&nvmet_sgl_list,
3547 sglq_entry, struct lpfc_sglq, list);
3548 if (sglq_entry) {
3549 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3550 sglq_entry->phys);
3551 kfree(sglq_entry);
3552 }
3553 }
3554 list_splice_init(&nvmet_sgl_list,
3555 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3556 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3557 spin_unlock_irq(&phba->hbalock);
3558 } else
3559 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3560 "6306 NVMET xri-sgl count unchanged: %d\n",
3561 nvmet_xri_cnt);
3562 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3563
3564 /* update xris to nvmet sgls on the list */
3565 sglq_entry = NULL;
3566 sglq_entry_next = NULL;
3567 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3568 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3569 lxri = lpfc_sli4_next_xritag(phba);
3570 if (lxri == NO_XRI) {
3571 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3572 "6307 Failed to allocate xri for "
3573 "NVMET sgl\n");
3574 rc = -ENOMEM;
3575 goto out_free_mem;
3576 }
3577 sglq_entry->sli4_lxritag = lxri;
3578 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3579 }
3580 return 0;
3581
3582out_free_mem:
3583 lpfc_free_nvmet_sgl_list(phba);
3584 return rc;
3585}
3586
895427bd
JS
3587/**
3588 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3589 * @phba: pointer to lpfc hba data structure.
3590 *
3591 * This routine first calculates the sizes of the current els and allocated
3592 * scsi sgl lists, and then goes through all sgls to updates the physical
3593 * XRIs assigned due to port function reset. During port initialization, the
3594 * current els and allocated scsi sgl lists are 0s.
3595 *
3596 * Return codes
3597 * 0 - successful (for now, it always returns 0)
3598 **/
3599int
3600lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3601{
3602 struct lpfc_scsi_buf *psb, *psb_next;
3603 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3604 LIST_HEAD(scsi_sgl_list);
3605 int rc;
8a9d2e80
JS
3606
3607 /*
895427bd 3608 * update on pci function's els xri-sgl list
8a9d2e80 3609 */
895427bd 3610 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS
3611 phba->total_scsi_bufs = 0;
3612
895427bd
JS
3613 /*
3614 * update on pci function's allocated scsi xri-sgl list
3615 */
8a9d2e80
JS
3616 /* maximum number of xris available for scsi buffers */
3617 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3618 els_xri_cnt;
3619
895427bd
JS
3620 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3621 return 0;
3622
3623 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3624 phba->sli4_hba.scsi_xri_max = /* Split them up */
3625 (phba->sli4_hba.scsi_xri_max *
3626 phba->cfg_xri_split) / 100;
8a9d2e80 3627
a40fc5f0 3628 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3629 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3630 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3631 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3632 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3633 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3634
e8c0a779
JS
3635 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3636 "6060 Current allocated SCSI xri-sgl count:%d, "
3637 "maximum SCSI xri count:%d (split:%d)\n",
3638 phba->sli4_hba.scsi_xri_cnt,
3639 phba->sli4_hba.scsi_xri_max, phba->cfg_xri_split);
3640
8a9d2e80
JS
3641 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3642 /* max scsi xri shrinked below the allocated scsi buffers */
3643 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3644 phba->sli4_hba.scsi_xri_max;
3645 /* release the extra allocated scsi buffers */
3646 for (i = 0; i < scsi_xri_cnt; i++) {
3647 list_remove_head(&scsi_sgl_list, psb,
3648 struct lpfc_scsi_buf, list);
a2fc4aef 3649 if (psb) {
771db5c0 3650 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS
3651 psb->data, psb->dma_handle);
3652 kfree(psb);
3653 }
8a9d2e80 3654 }
a40fc5f0 3655 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3656 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3657 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS
3658 }
3659
3660 /* update xris associated to remaining allocated scsi buffers */
3661 psb = NULL;
3662 psb_next = NULL;
3663 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3664 lxri = lpfc_sli4_next_xritag(phba);
3665 if (lxri == NO_XRI) {
3666 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3667 "2560 Failed to allocate xri for "
3668 "scsi buffer\n");
3669 rc = -ENOMEM;
3670 goto out_free_mem;
3671 }
3672 psb->cur_iocbq.sli4_lxritag = lxri;
3673 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3674 }
a40fc5f0 3675 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3676 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3677 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3678 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3679 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3680 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3681 return 0;
8a9d2e80
JS
3682
3683out_free_mem:
8a9d2e80
JS
3684 lpfc_scsi_free(phba);
3685 return rc;
dea3101e
JB
3686}
3687
96418b5e
JS
3688static uint64_t
3689lpfc_get_wwpn(struct lpfc_hba *phba)
3690{
3691 uint64_t wwn;
3692 int rc;
3693 LPFC_MBOXQ_t *mboxq;
3694 MAILBOX_t *mb;
3695
96418b5e
JS
3696 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3697 GFP_KERNEL);
3698 if (!mboxq)
3699 return (uint64_t)-1;
3700
3701 /* First get WWN of HBA instance */
3702 lpfc_read_nv(phba, mboxq);
3703 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3704 if (rc != MBX_SUCCESS) {
3705 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3706 "6019 Mailbox failed , mbxCmd x%x "
3707 "READ_NV, mbxStatus x%x\n",
3708 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
3709 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
3710 mempool_free(mboxq, phba->mbox_mem_pool);
3711 return (uint64_t) -1;
3712 }
3713 mb = &mboxq->u.mb;
3714 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
3715 /* wwn is WWPN of HBA instance */
3716 mempool_free(mboxq, phba->mbox_mem_pool);
3717 if (phba->sli_rev == LPFC_SLI_REV4)
3718 return be64_to_cpu(wwn);
3719 else
3720 return (((wwn & 0xffffffff00000000) >> 32) |
3721 ((wwn & 0x00000000ffffffff) << 32));
3722
3723}
3724
895427bd
JS
3725/**
3726 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3727 * @phba: pointer to lpfc hba data structure.
3728 *
3729 * This routine first calculates the sizes of the current els and allocated
3730 * scsi sgl lists, and then goes through all sgls to updates the physical
3731 * XRIs assigned due to port function reset. During port initialization, the
3732 * current els and allocated scsi sgl lists are 0s.
3733 *
3734 * Return codes
3735 * 0 - successful (for now, it always returns 0)
3736 **/
3737int
3738lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3739{
3740 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3741 uint16_t i, lxri, els_xri_cnt;
3742 uint16_t nvme_xri_cnt, nvme_xri_max;
3743 LIST_HEAD(nvme_sgl_list);
3744 int rc;
3745
3746 phba->total_nvme_bufs = 0;
3747
3748 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3749 return 0;
3750 /*
3751 * update on pci function's allocated nvme xri-sgl list
3752 */
3753
3754 /* maximum number of xris available for nvme buffers */
3755 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3756 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3757 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3758 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3759
3760 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3761 "6074 Current allocated NVME xri-sgl count:%d, "
3762 "maximum NVME xri count:%d\n",
3763 phba->sli4_hba.nvme_xri_cnt,
3764 phba->sli4_hba.nvme_xri_max);
3765
3766 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3767 spin_lock(&phba->nvme_buf_list_put_lock);
3768 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3769 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
3770 spin_unlock(&phba->nvme_buf_list_put_lock);
3771 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3772
3773 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3774 /* max nvme xri shrunk below the allocated nvme buffers */
3775 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3776 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3777 phba->sli4_hba.nvme_xri_max;
3778 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3779 /* release the extra allocated nvme buffers */
3780 for (i = 0; i < nvme_xri_cnt; i++) {
3781 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3782 struct lpfc_nvme_buf, list);
3783 if (lpfc_ncmd) {
771db5c0 3784 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
895427bd
JS
3785 lpfc_ncmd->data,
3786 lpfc_ncmd->dma_handle);
3787 kfree(lpfc_ncmd);
3788 }
3789 }
3790 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3791 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3792 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3793 }
3794
3795 /* update xris associated to remaining allocated nvme buffers */
3796 lpfc_ncmd = NULL;
3797 lpfc_ncmd_next = NULL;
3798 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3799 &nvme_sgl_list, list) {
3800 lxri = lpfc_sli4_next_xritag(phba);
3801 if (lxri == NO_XRI) {
3802 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3803 "6075 Failed to allocate xri for "
3804 "nvme buffer\n");
3805 rc = -ENOMEM;
3806 goto out_free_mem;
3807 }
3808 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3809 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3810 }
3811 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3812 spin_lock(&phba->nvme_buf_list_put_lock);
3813 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
3814 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3815 spin_unlock(&phba->nvme_buf_list_put_lock);
3816 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3817 return 0;
3818
3819out_free_mem:
3820 lpfc_nvme_free(phba);
3821 return rc;
3822}
3823
e59058c4 3824/**
3621a710 3825 * lpfc_create_port - Create an FC port
e59058c4
JS
3826 * @phba: pointer to lpfc hba data structure.
3827 * @instance: a unique integer ID to this FC port.
3828 * @dev: pointer to the device data structure.
3829 *
3830 * This routine creates a FC port for the upper layer protocol. The FC port
3831 * can be created on top of either a physical port or a virtual port provided
3832 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3833 * and associates the FC port created before adding the shost into the SCSI
3834 * layer.
3835 *
3836 * Return codes
3837 * @vport - pointer to the virtual N_Port data structure.
3838 * NULL - port create failed.
3839 **/
2e0fef85 3840struct lpfc_vport *
3de2a653 3841lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3842{
2e0fef85 3843 struct lpfc_vport *vport;
895427bd 3844 struct Scsi_Host *shost = NULL;
2e0fef85 3845 int error = 0;
96418b5e
JS
3846 int i;
3847 uint64_t wwn;
3848 bool use_no_reset_hba = false;
56bc8028 3849 int rc;
96418b5e 3850
56bc8028
JS
3851 if (lpfc_no_hba_reset_cnt) {
3852 if (phba->sli_rev < LPFC_SLI_REV4 &&
3853 dev == &phba->pcidev->dev) {
3854 /* Reset the port first */
3855 lpfc_sli_brdrestart(phba);
3856 rc = lpfc_sli_chipset_init(phba);
3857 if (rc)
3858 return NULL;
3859 }
3860 wwn = lpfc_get_wwpn(phba);
3861 }
96418b5e
JS
3862
3863 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
3864 if (wwn == lpfc_no_hba_reset[i]) {
3865 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3866 "6020 Setting use_no_reset port=%llx\n",
3867 wwn);
3868 use_no_reset_hba = true;
3869 break;
3870 }
3871 }
47a8617c 3872
895427bd
JS
3873 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3874 if (dev != &phba->pcidev->dev) {
3875 shost = scsi_host_alloc(&lpfc_vport_template,
3876 sizeof(struct lpfc_vport));
3877 } else {
96418b5e 3878 if (!use_no_reset_hba)
895427bd
JS
3879 shost = scsi_host_alloc(&lpfc_template,
3880 sizeof(struct lpfc_vport));
3881 else
96418b5e 3882 shost = scsi_host_alloc(&lpfc_template_no_hr,
895427bd
JS
3883 sizeof(struct lpfc_vport));
3884 }
3885 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3886 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS
3887 sizeof(struct lpfc_vport));
3888 }
2e0fef85
JS
3889 if (!shost)
3890 goto out;
47a8617c 3891
2e0fef85
JS
3892 vport = (struct lpfc_vport *) shost->hostdata;
3893 vport->phba = phba;
2e0fef85 3894 vport->load_flag |= FC_LOADING;
92d7f7b0 3895 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3896 vport->fc_rscn_flush = 0;
3de2a653 3897 lpfc_get_vport_cfgparam(vport);
895427bd 3898
2e0fef85
JS
3899 shost->unique_id = instance;
3900 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3901 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS
3902 shost->this_id = -1;
3903 shost->max_cmd_len = 16;
8b0dff14 3904 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3905 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3906 shost->dma_boundary =
cb5172ea 3907 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS
3908 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3909 }
81301a9b 3910
47a8617c 3911 /*
2e0fef85
JS
3912 * Set initial can_queue value since 0 is no longer supported and
3913 * scsi_add_host will fail. This will be adjusted later based on the
3914 * max xri value determined in hba setup.
47a8617c 3915 */
2e0fef85 3916 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3917 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS
3918 shost->transportt = lpfc_vport_transport_template;
3919 vport->port_type = LPFC_NPIV_PORT;
3920 } else {
3921 shost->transportt = lpfc_transport_template;
3922 vport->port_type = LPFC_PHYSICAL_PORT;
3923 }
47a8617c 3924
2e0fef85
JS
3925 /* Initialize all internally managed lists. */
3926 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3927 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3928 spin_lock_init(&vport->work_port_lock);
47a8617c 3929
33cc559a
TJ
3930 setup_timer(&vport->fc_disctmo, lpfc_disc_timeout,
3931 (unsigned long)vport);
47a8617c 3932
33cc559a
TJ
3933 setup_timer(&vport->els_tmofunc, lpfc_els_timeout,
3934 (unsigned long)vport);
92494144 3935
33cc559a
TJ
3936 setup_timer(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo,
3937 (unsigned long)vport);
92494144 3938
d139b9bd 3939 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS
3940 if (error)
3941 goto out_put_shost;
47a8617c 3942
549e55cd 3943 spin_lock_irq(&phba->hbalock);
2e0fef85 3944 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3945 spin_unlock_irq(&phba->hbalock);
2e0fef85 3946 return vport;
47a8617c 3947
2e0fef85
JS
3948out_put_shost:
3949 scsi_host_put(shost);
3950out:
3951 return NULL;
47a8617c
JS
3952}
3953
e59058c4 3954/**
3621a710 3955 * destroy_port - destroy an FC port
e59058c4
JS
3956 * @vport: pointer to an lpfc virtual N_Port data structure.
3957 *
3958 * This routine destroys a FC port from the upper layer protocol. All the
3959 * resources associated with the port are released.
3960 **/
2e0fef85
JS
3961void
3962destroy_port(struct lpfc_vport *vport)
47a8617c 3963{
92d7f7b0
JS
3964 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3965 struct lpfc_hba *phba = vport->phba;
47a8617c 3966
858c9f6c 3967 lpfc_debugfs_terminate(vport);
92d7f7b0
JS
3968 fc_remove_host(shost);
3969 scsi_remove_host(shost);
47a8617c 3970
92d7f7b0
JS
3971 spin_lock_irq(&phba->hbalock);
3972 list_del_init(&vport->listentry);
3973 spin_unlock_irq(&phba->hbalock);
47a8617c 3974
92d7f7b0 3975 lpfc_cleanup(vport);
47a8617c 3976 return;
47a8617c
JS
3977}
3978
e59058c4 3979/**
3621a710 3980 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS
3981 *
3982 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
3983 * uses the kernel idr facility to perform the task.
3984 *
3985 * Return codes:
3986 * instance - a unique integer ID allocated as the new instance.
3987 * -1 - lpfc get instance failed.
3988 **/
92d7f7b0
JS
3989int
3990lpfc_get_instance(void)
3991{
ab516036
TH
3992 int ret;
3993
3994 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
3995 return ret < 0 ? -1 : ret;
47a8617c
JS
3996}
3997
e59058c4 3998/**
3621a710 3999 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS
4000 * @shost: pointer to SCSI host data structure.
4001 * @time: elapsed time of the scan in jiffies.
4002 *
4003 * This routine is called by the SCSI layer with a SCSI host to determine
4004 * whether the scan host is finished.
4005 *
4006 * Note: there is no scan_start function as adapter initialization will have
4007 * asynchronously kicked off the link initialization.
4008 *
4009 * Return codes
4010 * 0 - SCSI host scan is not over yet.
4011 * 1 - SCSI host scan is over.
4012 **/
47a8617c
JS
4013int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4014{
2e0fef85
JS
4015 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4016 struct lpfc_hba *phba = vport->phba;
858c9f6c 4017 int stat = 0;
47a8617c 4018
858c9f6c
JS
4019 spin_lock_irq(shost->host_lock);
4020
51ef4c26 4021 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS
4022 stat = 1;
4023 goto finished;
4024 }
256ec0d0 4025 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 4026 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
4027 "0461 Scanning longer than 30 "
4028 "seconds. Continuing initialization\n");
858c9f6c 4029 stat = 1;
47a8617c 4030 goto finished;
2e0fef85 4031 }
256ec0d0
JS
4032 if (time >= msecs_to_jiffies(15 * 1000) &&
4033 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 4034 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
4035 "0465 Link down longer than 15 "
4036 "seconds. Continuing initialization\n");
858c9f6c 4037 stat = 1;
47a8617c 4038 goto finished;
2e0fef85 4039 }
47a8617c 4040
2e0fef85 4041 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 4042 goto finished;
2e0fef85 4043 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 4044 goto finished;
256ec0d0 4045 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 4046 goto finished;
2e0fef85 4047 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS
4048 goto finished;
4049
4050 stat = 1;
47a8617c
JS
4051
4052finished:
858c9f6c
JS
4053 spin_unlock_irq(shost->host_lock);
4054 return stat;
92d7f7b0 4055}
47a8617c 4056
e59058c4 4057/**
3621a710 4058 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS
4059 * @shost: pointer to SCSI host data structure.
4060 *
4061 * This routine initializes a given SCSI host attributes on a FC port. The
4062 * SCSI host can be either on top of a physical port or a virtual port.
4063 **/
92d7f7b0
JS
4064void lpfc_host_attrib_init(struct Scsi_Host *shost)
4065{
4066 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4067 struct lpfc_hba *phba = vport->phba;
47a8617c 4068 /*
2e0fef85 4069 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS
4070 */
4071
2e0fef85
JS
4072 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
4073 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS
4074 fc_host_supported_classes(shost) = FC_COS_CLASS3;
4075
4076 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 4077 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS
4078 fc_host_supported_fc4s(shost)[2] = 1;
4079 fc_host_supported_fc4s(shost)[7] = 1;
4080
92d7f7b0
JS
4081 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
4082 sizeof fc_host_symbolic_name(shost));
47a8617c
JS
4083
4084 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS
4085 if (phba->lmt & LMT_32Gb)
4086 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS
4087 if (phba->lmt & LMT_16Gb)
4088 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS
4089 if (phba->lmt & LMT_10Gb)
4090 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS
4091 if (phba->lmt & LMT_8Gb)
4092 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS
4093 if (phba->lmt & LMT_4Gb)
4094 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4095 if (phba->lmt & LMT_2Gb)
4096 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4097 if (phba->lmt & LMT_1Gb)
4098 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4099
4100 fc_host_maxframe_size(shost) =
2e0fef85
JS
4101 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
4102 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 4103
0af5d708
MC
4104 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
4105
47a8617c
JS
4106 /* This value is also unchanging */
4107 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 4108 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS
4109 fc_host_active_fc4s(shost)[2] = 1;
4110 fc_host_active_fc4s(shost)[7] = 1;
4111
92d7f7b0 4112 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 4113 spin_lock_irq(shost->host_lock);
51ef4c26 4114 vport->load_flag &= ~FC_LOADING;
47a8617c 4115 spin_unlock_irq(shost->host_lock);
47a8617c 4116}
dea3101e 4117
e59058c4 4118/**
da0436e9 4119 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS
4120 * @phba: pointer to lpfc hba data structure.
4121 *
da0436e9
JS
4122 * This routine is invoked to stop an SLI3 device port, it stops the device
4123 * from generating interrupts and stops the device driver's timers for the
4124 * device.
e59058c4 4125 **/
da0436e9
JS
4126static void
4127lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 4128{
da0436e9
JS
4129 /* Clear all interrupt enable conditions */
4130 writel(0, phba->HCregaddr);
4131 readl(phba->HCregaddr); /* flush */
4132 /* Clear all pending interrupts */
4133 writel(0xffffffff, phba->HAregaddr);
4134 readl(phba->HAregaddr); /* flush */
db2378e0 4135
da0436e9
JS
4136 /* Reset some HBA SLI setup states */
4137 lpfc_stop_hba_timers(phba);
4138 phba->pport->work_port_events = 0;
4139}
db2378e0 4140
da0436e9
JS
4141/**
4142 * lpfc_stop_port_s4 - Stop SLI4 device port
4143 * @phba: pointer to lpfc hba data structure.
4144 *
4145 * This routine is invoked to stop an SLI4 device port, it stops the device
4146 * from generating interrupts and stops the device driver's timers for the
4147 * device.
4148 **/
4149static void
4150lpfc_stop_port_s4(struct lpfc_hba *phba)
4151{
4152 /* Reset some HBA SLI4 setup states */
4153 lpfc_stop_hba_timers(phba);
4154 phba->pport->work_port_events = 0;
4155 phba->sli4_hba.intr_enable = 0;
da0436e9 4156}
9399627f 4157
da0436e9
JS
4158/**
4159 * lpfc_stop_port - Wrapper function for stopping hba port
4160 * @phba: Pointer to HBA context object.
4161 *
4162 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4163 * the API jump table function pointer from the lpfc_hba struct.
4164 **/
4165void
4166lpfc_stop_port(struct lpfc_hba *phba)
4167{
4168 phba->lpfc_stop_port(phba);
4169}
db2378e0 4170
ecfd03c6
JS
4171/**
4172 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4173 * @phba: Pointer to hba for which this call is being executed.
4174 *
4175 * This routine starts the timer waiting for the FCF rediscovery to complete.
4176 **/
4177void
4178lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4179{
4180 unsigned long fcf_redisc_wait_tmo =
4181 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4182 /* Start fcf rediscovery wait period timer */
4183 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4184 spin_lock_irq(&phba->hbalock);
4185 /* Allow action to new fcf asynchronous event */
4186 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4187 /* Mark the FCF rediscovery pending state */
4188 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4189 spin_unlock_irq(&phba->hbalock);
4190}
4191
4192/**
4193 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4194 * @ptr: Map to lpfc_hba data structure pointer.
4195 *
4196 * This routine is invoked when waiting for FCF table rediscover has been
4197 * timed out. If new FCF record(s) has (have) been discovered during the
4198 * wait period, a new FCF event shall be added to the FCOE async event
4199 * list, and then worker thread shall be waked up for processing from the
4200 * worker thread context.
4201 **/
e399b228 4202static void
ecfd03c6
JS
4203lpfc_sli4_fcf_redisc_wait_tmo(unsigned long ptr)
4204{
4205 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
4206
4207 /* Don't send FCF rediscovery event if timer cancelled */
4208 spin_lock_irq(&phba->hbalock);
4209 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4210 spin_unlock_irq(&phba->hbalock);
4211 return;
4212 }
4213 /* Clear FCF rediscovery timer pending flag */
4214 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4215 /* FCF rediscovery event to worker thread */
4216 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4217 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4218 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4219 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS
4220 /* wake up worker thread */
4221 lpfc_worker_wake_up(phba);
4222}
4223
e59058c4 4224/**
da0436e9 4225 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4226 * @phba: pointer to lpfc hba data structure.
da0436e9 4227 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4228 *
da0436e9
JS
4229 * This routine is to parse the SLI4 link-attention link fault code and
4230 * translate it into the base driver's read link attention mailbox command
4231 * status.
4232 *
4233 * Return: Link-attention status in terms of base driver's coding.
e59058c4 4234 **/
da0436e9
JS
4235static uint16_t
4236lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4237 struct lpfc_acqe_link *acqe_link)
db2378e0 4238{
da0436e9 4239 uint16_t latt_fault;
9399627f 4240
da0436e9
JS
4241 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4242 case LPFC_ASYNC_LINK_FAULT_NONE:
4243 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4244 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4245 latt_fault = 0;
4246 break;
4247 default:
4248 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4249 "0398 Invalid link fault code: x%x\n",
4250 bf_get(lpfc_acqe_link_fault, acqe_link));
4251 latt_fault = MBXERR_ERROR;
4252 break;
4253 }
4254 return latt_fault;
db2378e0
JS
4255}
4256
5b75da2f 4257/**
da0436e9 4258 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4259 * @phba: pointer to lpfc hba data structure.
da0436e9 4260 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4261 *
da0436e9
JS
4262 * This routine is to parse the SLI4 link attention type and translate it
4263 * into the base driver's link attention type coding.
5b75da2f 4264 *
da0436e9
JS
4265 * Return: Link attention type in terms of base driver's coding.
4266 **/
4267static uint8_t
4268lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4269 struct lpfc_acqe_link *acqe_link)
5b75da2f 4270{
da0436e9 4271 uint8_t att_type;
5b75da2f 4272
da0436e9
JS
4273 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4274 case LPFC_ASYNC_LINK_STATUS_DOWN:
4275 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4276 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS
4277 break;
4278 case LPFC_ASYNC_LINK_STATUS_UP:
4279 /* Ignore physical link up events - wait for logical link up */
76a95d75 4280 att_type = LPFC_ATT_RESERVED;
da0436e9
JS
4281 break;
4282 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4283 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS
4284 break;
4285 default:
4286 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4287 "0399 Invalid link attention type: x%x\n",
4288 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4289 att_type = LPFC_ATT_RESERVED;
da0436e9 4290 break;
5b75da2f 4291 }
da0436e9 4292 return att_type;
5b75da2f
JS
4293}
4294
8b68cd52
JS
4295/**
4296 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4297 * @phba: pointer to lpfc hba data structure.
4298 *
4299 * This routine is to get an SLI3 FC port's link speed in Mbps.
4300 *
4301 * Return: link speed in terms of Mbps.
4302 **/
4303uint32_t
4304lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4305{
4306 uint32_t link_speed;
4307
4308 if (!lpfc_is_link_up(phba))
4309 return 0;
4310
a085e87c
JS
4311 if (phba->sli_rev <= LPFC_SLI_REV3) {
4312 switch (phba->fc_linkspeed) {
4313 case LPFC_LINK_SPEED_1GHZ:
4314 link_speed = 1000;
4315 break;
4316 case LPFC_LINK_SPEED_2GHZ:
4317 link_speed = 2000;
4318 break;
4319 case LPFC_LINK_SPEED_4GHZ:
4320 link_speed = 4000;
4321 break;
4322 case LPFC_LINK_SPEED_8GHZ:
4323 link_speed = 8000;
4324 break;
4325 case LPFC_LINK_SPEED_10GHZ:
4326 link_speed = 10000;
4327 break;
4328 case LPFC_LINK_SPEED_16GHZ:
4329 link_speed = 16000;
4330 break;
4331 default:
4332 link_speed = 0;
4333 }
4334 } else {
4335 if (phba->sli4_hba.link_state.logical_speed)
4336 link_speed =
4337 phba->sli4_hba.link_state.logical_speed;
4338 else
4339 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS
4340 }
4341 return link_speed;
4342}
4343
4344/**
4345 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4346 * @phba: pointer to lpfc hba data structure.
4347 * @evt_code: asynchronous event code.
4348 * @speed_code: asynchronous event link speed code.
4349 *
4350 * This routine is to parse the giving SLI4 async event link speed code into
4351 * value of Mbps for the link speed.
4352 *
4353 * Return: link speed in terms of Mbps.
4354 **/
4355static uint32_t
4356lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4357 uint8_t speed_code)
4358{
4359 uint32_t port_speed;
4360
4361 switch (evt_code) {
4362 case LPFC_TRAILER_CODE_LINK:
4363 switch (speed_code) {
26d830ec 4364 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS
4365 port_speed = 0;
4366 break;
26d830ec 4367 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS
4368 port_speed = 10;
4369 break;
26d830ec 4370 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS
4371 port_speed = 100;
4372 break;
26d830ec 4373 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS
4374 port_speed = 1000;
4375 break;
26d830ec 4376 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS
4377 port_speed = 10000;
4378 break;
26d830ec
JS
4379 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4380 port_speed = 20000;
4381 break;
4382 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4383 port_speed = 25000;
4384 break;
4385 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4386 port_speed = 40000;
4387 break;
8b68cd52
JS
4388 default:
4389 port_speed = 0;
4390 }
4391 break;
4392 case LPFC_TRAILER_CODE_FC:
4393 switch (speed_code) {
26d830ec 4394 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS
4395 port_speed = 0;
4396 break;
26d830ec 4397 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS
4398 port_speed = 1000;
4399 break;
26d830ec 4400 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS
4401 port_speed = 2000;
4402 break;
26d830ec 4403 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS
4404 port_speed = 4000;
4405 break;
26d830ec 4406 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS
4407 port_speed = 8000;
4408 break;
26d830ec 4409 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS
4410 port_speed = 10000;
4411 break;
26d830ec 4412 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS
4413 port_speed = 16000;
4414 break;
d38dd52c
JS
4415 case LPFC_FC_LA_SPEED_32G:
4416 port_speed = 32000;
4417 break;
8b68cd52
JS
4418 default:
4419 port_speed = 0;
4420 }
4421 break;
4422 default:
4423 port_speed = 0;
4424 }
4425 return port_speed;
4426}
4427
da0436e9 4428/**
70f3c073 4429 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS
4430 * @phba: pointer to lpfc hba data structure.
4431 * @acqe_link: pointer to the async link completion queue entry.
4432 *
70f3c073 4433 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS
4434 **/
4435static void
4436lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4437 struct lpfc_acqe_link *acqe_link)
4438{
4439 struct lpfc_dmabuf *mp;
4440 LPFC_MBOXQ_t *pmb;
4441 MAILBOX_t *mb;
76a95d75 4442 struct lpfc_mbx_read_top *la;
da0436e9 4443 uint8_t att_type;
76a95d75 4444 int rc;
da0436e9
JS
4445
4446 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4447 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4448 return;
32b9793f 4449 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS
4450 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4451 if (!pmb) {
4452 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4453 "0395 The mboxq allocation failed\n");
4454 return;
4455 }
4456 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4457 if (!mp) {
4458 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4459 "0396 The lpfc_dmabuf allocation failed\n");
4460 goto out_free_pmb;
4461 }
4462 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4463 if (!mp->virt) {
4464 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4465 "0397 The mbuf allocation failed\n");
4466 goto out_free_dmabuf;
4467 }
4468
4469 /* Cleanup any outstanding ELS commands */
4470 lpfc_els_flush_all_cmd(phba);
4471
4472 /* Block ELS IOCBs until we have done process link event */
895427bd 4473 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS
4474
4475 /* Update link event statistics */
4476 phba->sli.slistat.link_event++;
4477
76a95d75
JS
4478 /* Create lpfc_handle_latt mailbox command from link ACQE */
4479 lpfc_read_topology(phba, pmb, mp);
4480 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS
4481 pmb->vport = phba->pport;
4482
da0436e9
JS
4483 /* Keep the link status for extra SLI4 state machine reference */
4484 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4485 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4486 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS
4487 phba->sli4_hba.link_state.duplex =
4488 bf_get(lpfc_acqe_link_duplex, acqe_link);
4489 phba->sli4_hba.link_state.status =
4490 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS
4491 phba->sli4_hba.link_state.type =
4492 bf_get(lpfc_acqe_link_type, acqe_link);
4493 phba->sli4_hba.link_state.number =
4494 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS
4495 phba->sli4_hba.link_state.fault =
4496 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4497 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS
4498 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4499
70f3c073 4500 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS
4501 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4502 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4503 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS
4504 phba->sli4_hba.link_state.speed,
4505 phba->sli4_hba.link_state.topology,
4506 phba->sli4_hba.link_state.status,
4507 phba->sli4_hba.link_state.type,
4508 phba->sli4_hba.link_state.number,
8b68cd52 4509 phba->sli4_hba.link_state.logical_speed,
70f3c073 4510 phba->sli4_hba.link_state.fault);
76a95d75
JS
4511 /*
4512 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4513 * topology info. Note: Optional for non FC-AL ports.
4514 */
4515 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4516 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4517 if (rc == MBX_NOT_FINISHED)
4518 goto out_free_dmabuf;
4519 return;
4520 }
4521 /*
4522 * For FCoE Mode: fill in all the topology information we need and call
4523 * the READ_TOPOLOGY completion routine to continue without actually
4524 * sending the READ_TOPOLOGY mailbox command to the port.
4525 */
4526 /* Parse and translate status field */
4527 mb = &pmb->u.mb;
4528 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4529
4530 /* Parse and translate link attention fields */
4531 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4532 la->eventTag = acqe_link->event_tag;
4533 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4534 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4535 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS
4536
4537 /* Fake the the following irrelvant fields */
4538 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4539 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4540 bf_set(lpfc_mbx_read_top_il, la, 0);
4541 bf_set(lpfc_mbx_read_top_pb, la, 0);
4542 bf_set(lpfc_mbx_read_top_fa, la, 0);
4543 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS
4544
4545 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4546 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4547
5b75da2f 4548 return;
da0436e9
JS
4549
4550out_free_dmabuf:
4551 kfree(mp);
4552out_free_pmb:
4553 mempool_free(pmb, phba->mbox_mem_pool);
4554}
4555
70f3c073
JS
4556/**
4557 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4558 * @phba: pointer to lpfc hba data structure.
4559 * @acqe_fc: pointer to the async fc completion queue entry.
4560 *
4561 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4562 * that the event was received and then issue a read_topology mailbox command so
4563 * that the rest of the driver will treat it the same as SLI3.
4564 **/
4565static void
4566lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4567{
4568 struct lpfc_dmabuf *mp;
4569 LPFC_MBOXQ_t *pmb;
7bdedb34
JS
4570 MAILBOX_t *mb;
4571 struct lpfc_mbx_read_top *la;
70f3c073
JS
4572 int rc;
4573
4574 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4575 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4576 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4577 "2895 Non FC link Event detected.(%d)\n",
4578 bf_get(lpfc_trailer_type, acqe_fc));
4579 return;
4580 }
4581 /* Keep the link status for extra SLI4 state machine reference */
4582 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4583 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4584 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS
4585 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4586 phba->sli4_hba.link_state.topology =
4587 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4588 phba->sli4_hba.link_state.status =
4589 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4590 phba->sli4_hba.link_state.type =
4591 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4592 phba->sli4_hba.link_state.number =
4593 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4594 phba->sli4_hba.link_state.fault =
4595 bf_get(lpfc_acqe_link_fault, acqe_fc);
4596 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4597 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS
4598 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4599 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4600 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4601 "%dMbps Fault:%d\n",
4602 phba->sli4_hba.link_state.speed,
4603 phba->sli4_hba.link_state.topology,
4604 phba->sli4_hba.link_state.status,
4605 phba->sli4_hba.link_state.type,
4606 phba->sli4_hba.link_state.number,
8b68cd52 4607 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS
4608 phba->sli4_hba.link_state.fault);
4609 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4610 if (!pmb) {
4611 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4612 "2897 The mboxq allocation failed\n");
4613 return;
4614 }
4615 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4616 if (!mp) {
4617 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4618 "2898 The lpfc_dmabuf allocation failed\n");
4619 goto out_free_pmb;
4620 }
4621 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4622 if (!mp->virt) {
4623 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4624 "2899 The mbuf allocation failed\n");
4625 goto out_free_dmabuf;
4626 }
4627
4628 /* Cleanup any outstanding ELS commands */
4629 lpfc_els_flush_all_cmd(phba);
4630
4631 /* Block ELS IOCBs until we have done process link event */
895427bd 4632 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS
4633
4634 /* Update link event statistics */
4635 phba->sli.slistat.link_event++;
4636
4637 /* Create lpfc_handle_latt mailbox command from link ACQE */
4638 lpfc_read_topology(phba, pmb, mp);
4639 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4640 pmb->vport = phba->pport;
4641
7bdedb34 4642 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
ae9e28f3
JS
4643 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
4644
4645 switch (phba->sli4_hba.link_state.status) {
4646 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
4647 phba->link_flag |= LS_MDS_LINK_DOWN;
4648 break;
4649 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
4650 phba->link_flag |= LS_MDS_LOOPBACK;
4651 break;
4652 default:
4653 break;
4654 }
4655
7bdedb34
JS
4656 /* Parse and translate status field */
4657 mb = &pmb->u.mb;
4658 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4659 (void *)acqe_fc);
4660
4661 /* Parse and translate link attention fields */
4662 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4663 la->eventTag = acqe_fc->event_tag;
7bdedb34 4664
aeb3c817
JS
4665 if (phba->sli4_hba.link_state.status ==
4666 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
4667 bf_set(lpfc_mbx_read_top_att_type, la,
4668 LPFC_FC_LA_TYPE_UNEXP_WWPN);
4669 } else {
4670 bf_set(lpfc_mbx_read_top_att_type, la,
4671 LPFC_FC_LA_TYPE_LINK_DOWN);
4672 }
7bdedb34
JS
4673 /* Invoke the mailbox command callback function */
4674 lpfc_mbx_cmpl_read_topology(phba, pmb);
4675
4676 return;
4677 }
4678
70f3c073
JS
4679 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4680 if (rc == MBX_NOT_FINISHED)
4681 goto out_free_dmabuf;
4682 return;
4683
4684out_free_dmabuf:
4685 kfree(mp);
4686out_free_pmb:
4687 mempool_free(pmb, phba->mbox_mem_pool);
4688}
4689
4690/**
4691 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4692 * @phba: pointer to lpfc hba data structure.
4693 * @acqe_fc: pointer to the async SLI completion queue entry.
4694 *
4695 * This routine is to handle the SLI4 asynchronous SLI events.
4696 **/
4697static void
4698lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4699{
4b8bae08 4700 char port_name;
8c1312e1 4701 char message[128];
4b8bae08 4702 uint8_t status;
946727dc 4703 uint8_t evt_type;
448193b5 4704 uint8_t operational = 0;
946727dc 4705 struct temp_event temp_event_data;
4b8bae08 4706 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS
4707 struct Scsi_Host *shost;
4708
4709 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4710
448193b5
JS
4711 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4712 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4713 "x%08x SLI Event Type:%d\n",
4714 acqe_sli->event_data1, acqe_sli->event_data2,
4715 evt_type);
4b8bae08
JS
4716
4717 port_name = phba->Port[0];
4718 if (port_name == 0x00)
4719 port_name = '?'; /* get port name is empty */
4720
946727dc
JS
4721 switch (evt_type) {
4722 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4723 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4724 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4725 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4726
4727 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4728 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4729 acqe_sli->event_data1, port_name);
4730
310429ef 4731 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
4732 shost = lpfc_shost_from_vport(phba->pport);
4733 fc_host_post_vendor_event(shost, fc_get_event_number(),
4734 sizeof(temp_event_data),
4735 (char *)&temp_event_data,
4736 SCSI_NL_VID_TYPE_PCI
4737 | PCI_VENDOR_ID_EMULEX);
4738 break;
4739 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4740 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4741 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4742 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4743
4744 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4745 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4746 acqe_sli->event_data1, port_name);
4747
4748 shost = lpfc_shost_from_vport(phba->pport);
4749 fc_host_post_vendor_event(shost, fc_get_event_number(),
4750 sizeof(temp_event_data),
4751 (char *)&temp_event_data,
4752 SCSI_NL_VID_TYPE_PCI
4753 | PCI_VENDOR_ID_EMULEX);
4754 break;
4755 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4756 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS
4757 &acqe_sli->event_data1;
4758
946727dc
JS
4759 /* fetch the status for this port */
4760 switch (phba->sli4_hba.lnk_info.lnk_no) {
4761 case LPFC_LINK_NUMBER_0:
448193b5
JS
4762 status = bf_get(lpfc_sli_misconfigured_port0_state,
4763 &misconfigured->theEvent);
4764 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4765 &misconfigured->theEvent);
946727dc
JS
4766 break;
4767 case LPFC_LINK_NUMBER_1:
448193b5
JS
4768 status = bf_get(lpfc_sli_misconfigured_port1_state,
4769 &misconfigured->theEvent);
4770 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4771 &misconfigured->theEvent);
946727dc
JS
4772 break;
4773 case LPFC_LINK_NUMBER_2:
448193b5
JS
4774 status = bf_get(lpfc_sli_misconfigured_port2_state,
4775 &misconfigured->theEvent);
4776 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4777 &misconfigured->theEvent);
946727dc
JS
4778 break;
4779 case LPFC_LINK_NUMBER_3:
448193b5
JS
4780 status = bf_get(lpfc_sli_misconfigured_port3_state,
4781 &misconfigured->theEvent);
4782 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4783 &misconfigured->theEvent);
946727dc
JS
4784 break;
4785 default:
448193b5
JS
4786 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4787 "3296 "
4788 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4789 "event: Invalid link %d",
4790 phba->sli4_hba.lnk_info.lnk_no);
4791 return;
946727dc 4792 }
4b8bae08 4793
448193b5
JS
4794 /* Skip if optic state unchanged */
4795 if (phba->sli4_hba.lnk_info.optic_state == status)
4796 return;
4797
946727dc
JS
4798 switch (status) {
4799 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS
4800 sprintf(message, "Physical Link is functional");
4801 break;
946727dc
JS
4802 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4803 sprintf(message, "Optics faulted/incorrectly "
4804 "installed/not installed - Reseat optics, "
4805 "if issue not resolved, replace.");
4806 break;
4807 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4808 sprintf(message,
4809 "Optics of two types installed - Remove one "
4810 "optic or install matching pair of optics.");
4811 break;
4812 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4813 sprintf(message, "Incompatible optics - Replace with "
292098be 4814 "compatible optics for card to function.");
946727dc 4815 break;
448193b5
JS
4816 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4817 sprintf(message, "Unqualified optics - Replace with "
4818 "Avago optics for Warranty and Technical "
4819 "Support - Link is%s operational",
2ea259ee 4820 (operational) ? " not" : "");
448193b5
JS
4821 break;
4822 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4823 sprintf(message, "Uncertified optics - Replace with "
4824 "Avago-certified optics to enable link "
4825 "operation - Link is%s operational",
2ea259ee 4826 (operational) ? " not" : "");
448193b5 4827 break;
946727dc
JS
4828 default:
4829 /* firmware is reporting a status we don't know about */
4830 sprintf(message, "Unknown event status x%02x", status);
4831 break;
4832 }
448193b5 4833 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4834 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4835 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS
4836 break;
4837 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4838 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4839 "3192 Remote DPort Test Initiated - "
4840 "Event Data1:x%08x Event Data2: x%08x\n",
4841 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS
4842 break;
4843 default:
946727dc
JS
4844 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4845 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4846 "x%08x SLI Event Type:%d\n",
4847 acqe_sli->event_data1, acqe_sli->event_data2,
4848 evt_type);
4b8bae08
JS
4849 break;
4850 }
70f3c073
JS
4851}
4852
fc2b989b
JS
4853/**
4854 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4855 * @vport: pointer to vport data structure.
4856 *
4857 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4858 * response to a CVL event.
4859 *
4860 * Return the pointer to the ndlp with the vport if successful, otherwise
4861 * return NULL.
4862 **/
4863static struct lpfc_nodelist *
4864lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4865{
4866 struct lpfc_nodelist *ndlp;
4867 struct Scsi_Host *shost;
4868 struct lpfc_hba *phba;
4869
4870 if (!vport)
4871 return NULL;
fc2b989b
JS
4872 phba = vport->phba;
4873 if (!phba)
4874 return NULL;
78730cfe
JS
4875 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4876 if (!ndlp) {
4877 /* Cannot find existing Fabric ndlp, so allocate a new one */
9d3d340d 4878 ndlp = lpfc_nlp_init(vport, Fabric_DID);
78730cfe
JS
4879 if (!ndlp)
4880 return 0;
78730cfe
JS
4881 /* Set the node type */
4882 ndlp->nlp_type |= NLP_FABRIC;
4883 /* Put ndlp onto node list */
4884 lpfc_enqueue_node(vport, ndlp);
4885 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4886 /* re-setup ndlp without removing from node list */
4887 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4888 if (!ndlp)
4889 return 0;
4890 }
63e801ce
JS
4891 if ((phba->pport->port_state < LPFC_FLOGI) &&
4892 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4893 return NULL;
4894 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS
4895 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4896 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4897 return NULL;
4898 shost = lpfc_shost_from_vport(vport);
4899 if (!shost)
4900 return NULL;
4901 lpfc_linkdown_port(vport);
4902 lpfc_cleanup_pending_mbox(vport);
4903 spin_lock_irq(shost->host_lock);
4904 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4905 spin_unlock_irq(shost->host_lock);
4906
4907 return ndlp;
4908}
4909
4910/**
4911 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4912 * @vport: pointer to lpfc hba data structure.
4913 *
4914 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4915 * response to a FCF dead event.
4916 **/
4917static void
4918lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4919{
4920 struct lpfc_vport **vports;
4921 int i;
4922
4923 vports = lpfc_create_vport_work_array(phba);
4924 if (vports)
4925 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4926 lpfc_sli4_perform_vport_cvl(vports[i]);
4927 lpfc_destroy_vport_work_array(phba, vports);
4928}
4929
da0436e9 4930/**
76a95d75 4931 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS
4932 * @phba: pointer to lpfc hba data structure.
4933 * @acqe_link: pointer to the async fcoe completion queue entry.
4934 *
4935 * This routine is to handle the SLI4 asynchronous fcoe event.
4936 **/
4937static void
76a95d75 4938lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4939 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4940{
70f3c073 4941 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4942 int rc;
6669f9bb
JS
4943 struct lpfc_vport *vport;
4944 struct lpfc_nodelist *ndlp;
4945 struct Scsi_Host *shost;
695a814e
JS
4946 int active_vlink_present;
4947 struct lpfc_vport **vports;
4948 int i;
da0436e9 4949
70f3c073
JS
4950 phba->fc_eventTag = acqe_fip->event_tag;
4951 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4952 switch (event_type) {
70f3c073
JS
4953 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4954 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4955 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS
4956 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4957 LOG_DISCOVERY,
a93ff37a
JS
4958 "2546 New FCF event, evt_tag:x%x, "
4959 "index:x%x\n",
70f3c073
JS
4960 acqe_fip->event_tag,
4961 acqe_fip->index);
999d813f
JS
4962 else
4963 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4964 LOG_DISCOVERY,
a93ff37a
JS
4965 "2788 FCF param modified event, "
4966 "evt_tag:x%x, index:x%x\n",
70f3c073
JS
4967 acqe_fip->event_tag,
4968 acqe_fip->index);
38b92ef8 4969 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS
4970 /*
4971 * During period of FCF discovery, read the FCF
4972 * table record indexed by the event to update
a93ff37a 4973 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS
4974 */
4975 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4976 LOG_DISCOVERY,
a93ff37a
JS
4977 "2779 Read FCF (x%x) for updating "
4978 "roundrobin FCF failover bmask\n",
70f3c073
JS
4979 acqe_fip->index);
4980 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 4981 }
38b92ef8
JS
4982
4983 /* If the FCF discovery is in progress, do nothing. */
3804dc84 4984 spin_lock_irq(&phba->hbalock);
a93ff37a 4985 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS
4986 spin_unlock_irq(&phba->hbalock);
4987 break;
4988 }
4989 /* If fast FCF failover rescan event is pending, do nothing */
4990 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
4991 spin_unlock_irq(&phba->hbalock);
4992 break;
4993 }
4994
c2b9712e
JS
4995 /* If the FCF has been in discovered state, do nothing. */
4996 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS
4997 spin_unlock_irq(&phba->hbalock);
4998 break;
4999 }
5000 spin_unlock_irq(&phba->hbalock);
38b92ef8 5001
0c9ab6f5
JS
5002 /* Otherwise, scan the entire FCF table and re-discover SAN */
5003 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS
5004 "2770 Start FCF table scan per async FCF "
5005 "event, evt_tag:x%x, index:x%x\n",
70f3c073 5006 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS
5007 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
5008 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 5009 if (rc)
0c9ab6f5
JS
5010 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5011 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 5012 "command failed (x%x)\n", rc);
da0436e9
JS
5013 break;
5014
70f3c073 5015 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 5016 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 5017 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS
5018 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
5019 acqe_fip->event_tag);
da0436e9
JS
5020 break;
5021
70f3c073 5022 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 5023 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5024 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5025 "2549 FCF (x%x) disconnected from network, "
70f3c073 5026 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS
5027 /*
5028 * If we are in the middle of FCF failover process, clear
5029 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 5030 */
fc2b989b 5031 spin_lock_irq(&phba->hbalock);
a1cadfef
JS
5032 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
5033 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 5034 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 5035 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 5036 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS
5037 break;
5038 }
38b92ef8
JS
5039 spin_unlock_irq(&phba->hbalock);
5040
5041 /* If the event is not for currently used fcf do nothing */
70f3c073 5042 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS
5043 break;
5044
5045 /*
5046 * Otherwise, request the port to rediscover the entire FCF
5047 * table for a fast recovery from case that the current FCF
5048 * is no longer valid as we are not in the middle of FCF
5049 * failover process already.
5050 */
c2b9712e
JS
5051 spin_lock_irq(&phba->hbalock);
5052 /* Mark the fast failover process in progress */
5053 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
5054 spin_unlock_irq(&phba->hbalock);
5055
5056 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
5057 "2771 Start FCF fast failover process due to "
5058 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
5059 "\n", acqe_fip->event_tag, acqe_fip->index);
5060 rc = lpfc_sli4_redisc_fcf_table(phba);
5061 if (rc) {
5062 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5063 LOG_DISCOVERY,
5064 "2772 Issue FCF rediscover mabilbox "
5065 "command failed, fail through to FCF "
5066 "dead event\n");
5067 spin_lock_irq(&phba->hbalock);
5068 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
5069 spin_unlock_irq(&phba->hbalock);
5070 /*
5071 * Last resort will fail over by treating this
5072 * as a link down to FCF registration.
5073 */
5074 lpfc_sli4_fcf_dead_failthrough(phba);
5075 } else {
5076 /* Reset FCF roundrobin bmask for new discovery */
5077 lpfc_sli4_clear_fcf_rr_bmask(phba);
5078 /*
5079 * Handling fast FCF failover to a DEAD FCF event is
5080 * considered equalivant to receiving CVL to all vports.
5081 */
5082 lpfc_sli4_perform_all_vport_cvl(phba);
5083 }
da0436e9 5084 break;
70f3c073 5085 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 5086 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5087 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 5088 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 5089 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 5090
6669f9bb 5091 vport = lpfc_find_vport_by_vpid(phba,
5248a749 5092 acqe_fip->index);
fc2b989b 5093 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS
5094 if (!ndlp)
5095 break;
695a814e
JS
5096 active_vlink_present = 0;
5097
5098 vports = lpfc_create_vport_work_array(phba);
5099 if (vports) {
5100 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
5101 i++) {
5102 if ((!(vports[i]->fc_flag &
5103 FC_VPORT_CVL_RCVD)) &&
5104 (vports[i]->port_state > LPFC_FDISC)) {
5105 active_vlink_present = 1;
5106 break;
5107 }
5108 }
5109 lpfc_destroy_vport_work_array(phba, vports);
5110 }
5111
cc82355a
JS
5112 /*
5113 * Don't re-instantiate if vport is marked for deletion.
5114 * If we are here first then vport_delete is going to wait
5115 * for discovery to complete.
5116 */
5117 if (!(vport->load_flag & FC_UNLOADING) &&
5118 active_vlink_present) {
695a814e
JS
5119 /*
5120 * If there are other active VLinks present,
5121 * re-instantiate the Vlink using FDISC.
5122 */
256ec0d0
JS
5123 mod_timer(&ndlp->nlp_delayfunc,
5124 jiffies + msecs_to_jiffies(1000));
fc2b989b 5125 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS
5126 spin_lock_irq(shost->host_lock);
5127 ndlp->nlp_flag |= NLP_DELAY_TMO;
5128 spin_unlock_irq(shost->host_lock);
695a814e
JS
5129 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
5130 vport->port_state = LPFC_FDISC;
5131 } else {
ecfd03c6
JS
5132 /*
5133 * Otherwise, we request port to rediscover
5134 * the entire FCF table for a fast recovery
5135 * from possible case that the current FCF
0c9ab6f5
JS
5136 * is no longer valid if we are not already
5137 * in the FCF failover process.
ecfd03c6 5138 */
fc2b989b 5139 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5140 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS
5141 spin_unlock_irq(&phba->hbalock);
5142 break;
5143 }
5144 /* Mark the fast failover process in progress */
0c9ab6f5 5145 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 5146 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS
5147 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5148 LOG_DISCOVERY,
a93ff37a 5149 "2773 Start FCF failover per CVL, "
70f3c073 5150 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 5151 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 5152 if (rc) {
0c9ab6f5
JS
5153 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5154 LOG_DISCOVERY,
5155 "2774 Issue FCF rediscover "
5156 "mabilbox command failed, "
5157 "through to CVL event\n");
fc2b989b 5158 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5159 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 5160 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS
5161 /*
5162 * Last resort will be re-try on the
5163 * the current registered FCF entry.
5164 */
5165 lpfc_retry_pport_discovery(phba);
38b92ef8
JS
5166 } else
5167 /*
5168 * Reset FCF roundrobin bmask for new
5169 * discovery.
5170 */
7d791df7 5171 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS
5172 }
5173 break;
da0436e9
JS
5174 default:
5175 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5176 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 5177 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS
5178 break;
5179 }
5180}
5181
5182/**
5183 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5184 * @phba: pointer to lpfc hba data structure.
5185 * @acqe_link: pointer to the async dcbx completion queue entry.
5186 *
5187 * This routine is to handle the SLI4 asynchronous dcbx event.
5188 **/
5189static void
5190lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5191 struct lpfc_acqe_dcbx *acqe_dcbx)
5192{
4d9ab994 5193 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS
5194 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5195 "0290 The SLI4 DCBX asynchronous event is not "
5196 "handled yet\n");
5197}
5198
b19a061a
JS
5199/**
5200 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5201 * @phba: pointer to lpfc hba data structure.
5202 * @acqe_link: pointer to the async grp5 completion queue entry.
5203 *
5204 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5205 * is an asynchronous notified of a logical link speed change. The Port
5206 * reports the logical link speed in units of 10Mbps.
5207 **/
5208static void
5209lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5210 struct lpfc_acqe_grp5 *acqe_grp5)
5211{
5212 uint16_t prev_ll_spd;
5213
5214 phba->fc_eventTag = acqe_grp5->event_tag;
5215 phba->fcoe_eventtag = acqe_grp5->event_tag;
5216 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5217 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5218 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS
5219 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5220 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS
5221 "from %dMbps to %dMbps\n", prev_ll_spd,
5222 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS
5223}
5224
da0436e9
JS
5225/**
5226 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5227 * @phba: pointer to lpfc hba data structure.
5228 *
5229 * This routine is invoked by the worker thread to process all the pending
5230 * SLI4 asynchronous events.
5231 **/
5232void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5233{
5234 struct lpfc_cq_event *cq_event;
5235
5236 /* First, declare the async event has been handled */
5237 spin_lock_irq(&phba->hbalock);
5238 phba->hba_flag &= ~ASYNC_EVENT;
5239 spin_unlock_irq(&phba->hbalock);
5240 /* Now, handle all the async events */
5241 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5242 /* Get the first event from the head of the event queue */
5243 spin_lock_irq(&phba->hbalock);
5244 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5245 cq_event, struct lpfc_cq_event, list);
5246 spin_unlock_irq(&phba->hbalock);
5247 /* Process the asynchronous event */
5248 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5249 case LPFC_TRAILER_CODE_LINK:
5250 lpfc_sli4_async_link_evt(phba,
5251 &cq_event->cqe.acqe_link);
5252 break;
5253 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5254 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS
5255 break;
5256 case LPFC_TRAILER_CODE_DCBX:
5257 lpfc_sli4_async_dcbx_evt(phba,
5258 &cq_event->cqe.acqe_dcbx);
5259 break;
b19a061a
JS
5260 case LPFC_TRAILER_CODE_GRP5:
5261 lpfc_sli4_async_grp5_evt(phba,
5262 &cq_event->cqe.acqe_grp5);
5263 break;
70f3c073
JS
5264 case LPFC_TRAILER_CODE_FC:
5265 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5266 break;
5267 case LPFC_TRAILER_CODE_SLI:
5268 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5269 break;
da0436e9
JS
5270 default:
5271 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5272 "1804 Invalid asynchrous event code: "
5273 "x%x\n", bf_get(lpfc_trailer_code,
5274 &cq_event->cqe.mcqe_cmpl));
5275 break;
5276 }
5277 /* Free the completion event processed to the free pool */
5278 lpfc_sli4_cq_event_release(phba, cq_event);
5279 }
5280}
5281
ecfd03c6
JS
5282/**
5283 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5284 * @phba: pointer to lpfc hba data structure.
5285 *
5286 * This routine is invoked by the worker thread to process FCF table
5287 * rediscovery pending completion event.
5288 **/
5289void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5290{
5291 int rc;
5292
5293 spin_lock_irq(&phba->hbalock);
5294 /* Clear FCF rediscovery timeout event */
5295 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5296 /* Clear driver fast failover FCF record flag */
5297 phba->fcf.failover_rec.flag = 0;
5298 /* Set state for FCF fast failover */
5299 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5300 spin_unlock_irq(&phba->hbalock);
5301
5302 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5303 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5304 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5305 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5306 if (rc)
0c9ab6f5
JS
5307 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5308 "2747 Issue FCF scan read FCF mailbox "
5309 "command failed 0x%x\n", rc);
ecfd03c6
JS
5310}
5311
da0436e9
JS
5312/**
5313 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5314 * @phba: pointer to lpfc hba data structure.
5315 * @dev_grp: The HBA PCI-Device group number.
5316 *
5317 * This routine is invoked to set up the per HBA PCI-Device group function
5318 * API jump table entries.
5319 *
5320 * Return: 0 if success, otherwise -ENODEV
5321 **/
5322int
5323lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5324{
5325 int rc;
5326
5327 /* Set up lpfc PCI-device group */
5328 phba->pci_dev_grp = dev_grp;
5329
5330 /* The LPFC_PCI_DEV_OC uses SLI4 */
5331 if (dev_grp == LPFC_PCI_DEV_OC)
5332 phba->sli_rev = LPFC_SLI_REV4;
5333
5334 /* Set up device INIT API function jump table */
5335 rc = lpfc_init_api_table_setup(phba, dev_grp);
5336 if (rc)
5337 return -ENODEV;
5338 /* Set up SCSI API function jump table */
5339 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5340 if (rc)
5341 return -ENODEV;
5342 /* Set up SLI API function jump table */
5343 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5344 if (rc)
5345 return -ENODEV;
5346 /* Set up MBOX API function jump table */
5347 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5348 if (rc)
5349 return -ENODEV;
5350
5351 return 0;
5b75da2f
JS
5352}
5353
5354/**
3621a710 5355 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS
5356 * @phba: pointer to lpfc hba data structure.
5357 * @intr_mode: active interrupt mode adopted.
5358 *
5359 * This routine it invoked to log the currently used active interrupt mode
5360 * to the device.
3772a991
JS
5361 **/
5362static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS
5363{
5364 switch (intr_mode) {
5365 case 0:
5366 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5367 "0470 Enable INTx interrupt mode.\n");
5368 break;
5369 case 1:
5370 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5371 "0481 Enabled MSI interrupt mode.\n");
5372 break;
5373 case 2:
5374 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5375 "0480 Enabled MSI-X interrupt mode.\n");
5376 break;
5377 default:
5378 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5379 "0482 Illegal interrupt mode.\n");
5380 break;
5381 }
5382 return;
5383}
5384
5b75da2f 5385/**
3772a991 5386 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS
5387 * @phba: pointer to lpfc hba data structure.
5388 *
3772a991
JS
5389 * This routine is invoked to enable the PCI device that is common to all
5390 * PCI devices.
5b75da2f
JS
5391 *
5392 * Return codes
af901ca1 5393 * 0 - successful
3772a991 5394 * other values - error
5b75da2f 5395 **/
3772a991
JS
5396static int
5397lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5398{
3772a991 5399 struct pci_dev *pdev;
5b75da2f 5400
3772a991
JS
5401 /* Obtain PCI device reference */
5402 if (!phba->pcidev)
5403 goto out_error;
5404 else
5405 pdev = phba->pcidev;
3772a991
JS
5406 /* Enable PCI device */
5407 if (pci_enable_device_mem(pdev))
5408 goto out_error;
5409 /* Request PCI resource for the device */
e0c0483c 5410 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS
5411 goto out_disable_device;
5412 /* Set up device as PCI master and save state for EEH */
5413 pci_set_master(pdev);
5414 pci_try_set_mwi(pdev);
5415 pci_save_state(pdev);
5b75da2f 5416
0558056c 5417 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5418 if (pci_is_pcie(pdev))
0558056c
JS
5419 pdev->needs_freset = 1;
5420
3772a991 5421 return 0;
5b75da2f 5422
3772a991
JS
5423out_disable_device:
5424 pci_disable_device(pdev);
5425out_error:
079b5c91 5426 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5427 "1401 Failed to enable pci device\n");
3772a991 5428 return -ENODEV;
5b75da2f
JS
5429}
5430
5431/**
3772a991 5432 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS
5433 * @phba: pointer to lpfc hba data structure.
5434 *
3772a991
JS
5435 * This routine is invoked to disable the PCI device that is common to all
5436 * PCI devices.
5b75da2f
JS
5437 **/
5438static void
3772a991 5439lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5440{
3772a991 5441 struct pci_dev *pdev;
5b75da2f 5442
3772a991
JS
5443 /* Obtain PCI device reference */
5444 if (!phba->pcidev)
5445 return;
5446 else
5447 pdev = phba->pcidev;
3772a991 5448 /* Release PCI resource and disable PCI device */
e0c0483c 5449 pci_release_mem_regions(pdev);
3772a991 5450 pci_disable_device(pdev);
5b75da2f
JS
5451
5452 return;
5453}
5454
e59058c4 5455/**
3772a991
JS
5456 * lpfc_reset_hba - Reset a hba
5457 * @phba: pointer to lpfc hba data structure.
e59058c4 5458 *
3772a991
JS
5459 * This routine is invoked to reset a hba device. It brings the HBA
5460 * offline, performs a board restart, and then brings the board back
5461 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5462 * on outstanding mailbox commands.
e59058c4 5463 **/
3772a991
JS
5464void
5465lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5466{
3772a991
JS
5467 /* If resets are disabled then set error state and return. */
5468 if (!phba->cfg_enable_hba_reset) {
5469 phba->link_state = LPFC_HBA_ERROR;
5470 return;
5471 }
ee62021a
JS
5472 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5473 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5474 else
5475 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS
5476 lpfc_offline(phba);
5477 lpfc_sli_brdrestart(phba);
5478 lpfc_online(phba);
5479 lpfc_unblock_mgmt_io(phba);
5480}
dea3101e 5481
0a96e975
JS
5482/**
5483 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5484 * @phba: pointer to lpfc hba data structure.
5485 *
5486 * This function enables the PCI SR-IOV virtual functions to a physical
5487 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5488 * enable the number of virtual functions to the physical function. As
5489 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5490 * API call does not considered as an error condition for most of the device.
5491 **/
5492uint16_t
5493lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5494{
5495 struct pci_dev *pdev = phba->pcidev;
5496 uint16_t nr_virtfn;
5497 int pos;
5498
0a96e975
JS
5499 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5500 if (pos == 0)
5501 return 0;
5502
5503 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5504 return nr_virtfn;
5505}
5506
912e3acd
JS
5507/**
5508 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5509 * @phba: pointer to lpfc hba data structure.
5510 * @nr_vfn: number of virtual functions to be enabled.
5511 *
5512 * This function enables the PCI SR-IOV virtual functions to a physical
5513 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5514 * enable the number of virtual functions to the physical function. As
5515 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5516 * API call does not considered as an error condition for most of the device.
5517 **/
5518int
5519lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5520{
5521 struct pci_dev *pdev = phba->pcidev;
0a96e975 5522 uint16_t max_nr_vfn;
912e3acd
JS
5523 int rc;
5524
0a96e975
JS
5525 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5526 if (nr_vfn > max_nr_vfn) {
5527 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5528 "3057 Requested vfs (%d) greater than "
5529 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5530 return -EINVAL;
5531 }
5532
912e3acd
JS
5533 rc = pci_enable_sriov(pdev, nr_vfn);
5534 if (rc) {
5535 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5536 "2806 Failed to enable sriov on this device "
5537 "with vfn number nr_vf:%d, rc:%d\n",
5538 nr_vfn, rc);
5539 } else
5540 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5541 "2807 Successful enable sriov on this device "
5542 "with vfn number nr_vf:%d\n", nr_vfn);
5543 return rc;
5544}
5545
3772a991 5546/**
895427bd 5547 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS
5548 * @phba: pointer to lpfc hba data structure.
5549 *
895427bd
JS
5550 * This routine is invoked to set up the driver internal resources before the
5551 * device specific resource setup to support the HBA device it attached to.
3772a991
JS
5552 *
5553 * Return codes
895427bd
JS
5554 * 0 - successful
5555 * other values - error
3772a991
JS
5556 **/
5557static int
895427bd 5558lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5559{
895427bd 5560 struct lpfc_sli *psli = &phba->sli;
dea3101e 5561
2e0fef85 5562 /*
895427bd 5563 * Driver resources common to all SLI revisions
2e0fef85 5564 */
895427bd
JS
5565 atomic_set(&phba->fast_event_count, 0);
5566 spin_lock_init(&phba->hbalock);
dea3101e 5567
895427bd
JS
5568 /* Initialize ndlp management spinlock */
5569 spin_lock_init(&phba->ndlp_lock);
5570
5571 INIT_LIST_HEAD(&phba->port_list);
5572 INIT_LIST_HEAD(&phba->work_list);
5573 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5574
5575 /* Initialize the wait queue head for the kernel thread */
5576 init_waitqueue_head(&phba->work_waitq);
5577
5578 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 5579 "1403 Protocols supported %s %s %s\n",
895427bd
JS
5580 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5581 "SCSI" : " "),
5582 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS
5583 "NVME" : " "),
5584 (phba->nvmet_support ? "NVMET" : " "));
895427bd
JS
5585
5586 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5587 /* Initialize the scsi buffer list used by driver for scsi IO */
5588 spin_lock_init(&phba->scsi_buf_list_get_lock);
5589 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5590 spin_lock_init(&phba->scsi_buf_list_put_lock);
5591 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5592 }
5593
5594 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5595 (phba->nvmet_support == 0)) {
5596 /* Initialize the NVME buffer list used by driver for NVME IO */
5597 spin_lock_init(&phba->nvme_buf_list_get_lock);
5598 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
5599 spin_lock_init(&phba->nvme_buf_list_put_lock);
5600 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
5601 }
5602
5603 /* Initialize the fabric iocb list */
5604 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5605
5606 /* Initialize list to save ELS buffers */
5607 INIT_LIST_HEAD(&phba->elsbuf);
5608
5609 /* Initialize FCF connection rec list */
5610 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5611
5612 /* Initialize OAS configuration list */
5613 spin_lock_init(&phba->devicelock);
5614 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5615
3772a991 5616 /* MBOX heartbeat timer */
33cc559a 5617 setup_timer(&psli->mbox_tmo, lpfc_mbox_timeout, (unsigned long)phba);
3772a991 5618 /* Fabric block timer */
33cc559a
TJ
5619 setup_timer(&phba->fabric_block_timer, lpfc_fabric_block_timeout,
5620 (unsigned long)phba);
3772a991 5621 /* EA polling mode timer */
33cc559a
TJ
5622 setup_timer(&phba->eratt_poll, lpfc_poll_eratt,
5623 (unsigned long)phba);
895427bd 5624 /* Heartbeat timer */
33cc559a 5625 setup_timer(&phba->hb_tmofunc, lpfc_hb_timeout, (unsigned long)phba);
895427bd
JS
5626
5627 return 0;
5628}
5629
5630/**
5631 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5632 * @phba: pointer to lpfc hba data structure.
5633 *
5634 * This routine is invoked to set up the driver internal resources specific to
5635 * support the SLI-3 HBA device it attached to.
5636 *
5637 * Return codes
5638 * 0 - successful
5639 * other values - error
5640 **/
5641static int
5642lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5643{
5644 int rc;
5645
5646 /*
5647 * Initialize timers used by driver
5648 */
5649
5650 /* FCP polling mode timer */
33cc559a
TJ
5651 setup_timer(&phba->fcp_poll_timer, lpfc_poll_timeout,
5652 (unsigned long)phba);
dea3101e 5653
3772a991
JS
5654 /* Host attention work mask setup */
5655 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5656 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5657
3772a991
JS
5658 /* Get all the module params for configuring this host */
5659 lpfc_get_cfgparam(phba);
895427bd
JS
5660 /* Set up phase-1 common device driver resources */
5661
5662 rc = lpfc_setup_driver_resource_phase1(phba);
5663 if (rc)
5664 return -ENODEV;
5665
49198b37
JS
5666 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5667 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5668 /* check for menlo minimum sg count */
5669 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5670 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5671 }
5672
895427bd
JS
5673 if (!phba->sli.sli3_ring)
5674 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5675 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5676 if (!phba->sli.sli3_ring)
2a76a283
JS
5677 return -ENOMEM;
5678
dea3101e 5679 /*
96f7077f 5680 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5681 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5682 */
3772a991 5683
96f7077f
JS
5684 /* Initialize the host templates the configured values. */
5685 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e
JS
5686 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
5687 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5688
5689 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5690 if (phba->cfg_enable_bg) {
96f7077f
JS
5691 /*
5692 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5693 * the FCP rsp, and a BDE for each. Sice we have no control
5694 * over how many protection data segments the SCSI Layer
5695 * will hand us (ie: there could be one for every block
5696 * in the IO), we just allocate enough BDEs to accomidate
5697 * our max amount and we need to limit lpfc_sg_seg_cnt to
5698 * minimize the risk of running out.
5699 */
5700 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5701 sizeof(struct fcp_rsp) +
5702 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5703
5704 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5705 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5706
5707 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5708 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5709 } else {
5710 /*
5711 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5712 * the FCP rsp, a BDE for each, and a BDE for up to
5713 * cfg_sg_seg_cnt data segments.
5714 */
5715 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5716 sizeof(struct fcp_rsp) +
5717 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5718
5719 /* Total BDEs in BPL for scsi_sg_list */
5720 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5721 }
dea3101e 5722
96f7077f
JS
5723 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5724 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5725 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5726 phba->cfg_total_seg_cnt);
dea3101e 5727
3772a991
JS
5728 phba->max_vpi = LPFC_MAX_VPI;
5729 /* This will be set to correct value after config_port mbox */
5730 phba->max_vports = 0;
dea3101e 5731
3772a991
JS
5732 /*
5733 * Initialize the SLI Layer to run with lpfc HBAs.
5734 */
5735 lpfc_sli_setup(phba);
895427bd 5736 lpfc_sli_queue_init(phba);
ed957684 5737
3772a991
JS
5738 /* Allocate device driver memory */
5739 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5740 return -ENOMEM;
51ef4c26 5741
912e3acd
JS
5742 /*
5743 * Enable sr-iov virtual functions if supported and configured
5744 * through the module parameter.
5745 */
5746 if (phba->cfg_sriov_nr_virtfn > 0) {
5747 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5748 phba->cfg_sriov_nr_virtfn);
5749 if (rc) {
5750 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5751 "2808 Requested number of SR-IOV "
5752 "virtual functions (%d) is not "
5753 "supported\n",
5754 phba->cfg_sriov_nr_virtfn);
5755 phba->cfg_sriov_nr_virtfn = 0;
5756 }
5757 }
5758
3772a991
JS
5759 return 0;
5760}
ed957684 5761
3772a991
JS
5762/**
5763 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5764 * @phba: pointer to lpfc hba data structure.
5765 *
5766 * This routine is invoked to unset the driver internal resources set up
5767 * specific for supporting the SLI-3 HBA device it attached to.
5768 **/
5769static void
5770lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5771{
5772 /* Free device driver memory allocated */
5773 lpfc_mem_free_all(phba);
3163f725 5774
3772a991
JS
5775 return;
5776}
dea3101e 5777
3772a991 5778/**
da0436e9 5779 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS
5780 * @phba: pointer to lpfc hba data structure.
5781 *
da0436e9
JS
5782 * This routine is invoked to set up the driver internal resources specific to
5783 * support the SLI-4 HBA device it attached to.
3772a991
JS
5784 *
5785 * Return codes
af901ca1 5786 * 0 - successful
da0436e9 5787 * other values - error
3772a991
JS
5788 **/
5789static int
da0436e9 5790lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5791{
28baac74 5792 LPFC_MBOXQ_t *mboxq;
f358dd0c 5793 MAILBOX_t *mb;
895427bd 5794 int rc, i, max_buf_size;
28baac74
JS
5795 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5796 struct lpfc_mqe *mqe;
09294d46 5797 int longs;
1ba981fd 5798 int fof_vectors = 0;
f358dd0c 5799 uint64_t wwn;
da0436e9 5800
895427bd
JS
5801 phba->sli4_hba.num_online_cpu = num_online_cpus();
5802 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5803 phba->sli4_hba.curr_disp_cpu = 0;
5804
716d3bc5
JS
5805 /* Get all the module params for configuring this host */
5806 lpfc_get_cfgparam(phba);
5807
895427bd
JS
5808 /* Set up phase-1 common device driver resources */
5809 rc = lpfc_setup_driver_resource_phase1(phba);
5810 if (rc)
5811 return -ENODEV;
5812
da0436e9
JS
5813 /* Before proceed, wait for POST done and device ready */
5814 rc = lpfc_sli4_post_status_check(phba);
5815 if (rc)
5816 return -ENODEV;
5817
3772a991 5818 /*
da0436e9 5819 * Initialize timers used by driver
3772a991 5820 */
3772a991 5821
33cc559a 5822 setup_timer(&phba->rrq_tmr, lpfc_rrq_timeout, (unsigned long)phba);
3772a991 5823
ecfd03c6 5824 /* FCF rediscover timer */
33cc559a
TJ
5825 setup_timer(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo,
5826 (unsigned long)phba);
ecfd03c6 5827
7ad20aa9
JS
5828 /*
5829 * Control structure for handling external multi-buffer mailbox
5830 * command pass-through.
5831 */
5832 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5833 sizeof(struct lpfc_mbox_ext_buf_ctx));
5834 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5835
da0436e9 5836 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5837
da0436e9
JS
5838 /* This will be set to correct value after the read_config mbox */
5839 phba->max_vports = 0;
3772a991 5840
da0436e9
JS
5841 /* Program the default value of vlan_id and fc_map */
5842 phba->valid_vlan = 0;
5843 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5844 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5845 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5846
2a76a283
JS
5847 /*
5848 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS
5849 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5850 * The WQ create will allocate the ring.
2a76a283 5851 */
09294d46 5852
da0436e9 5853 /*
09294d46
JS
5854 * It doesn't matter what family our adapter is in, we are
5855 * limited to 2 Pages, 512 SGEs, for our SGL.
5856 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5857 */
5858 max_buf_size = (2 * SLI4_PAGE_SIZE);
5859 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - 2)
5860 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - 2;
09294d46 5861
da0436e9 5862 /*
895427bd
JS
5863 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5864 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5865 */
96f7077f
JS
5866 if (phba->cfg_enable_bg) {
5867 /*
895427bd
JS
5868 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5869 * the FCP rsp, and a SGE. Sice we have no control
5870 * over how many protection segments the SCSI Layer
96f7077f 5871 * will hand us (ie: there could be one for every block
895427bd
JS
5872 * in the IO), just allocate enough SGEs to accomidate
5873 * our max amount and we need to limit lpfc_sg_seg_cnt
5874 * to minimize the risk of running out.
96f7077f
JS
5875 */
5876 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5877 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS
5878
5879 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5880 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5881
5882 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS
5883 phba->cfg_sg_seg_cnt =
5884 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS
5885 } else {
5886 /*
895427bd 5887 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS
5888 * the FCP rsp, a SGE for each, and a SGE for up to
5889 * cfg_sg_seg_cnt data segments.
5890 */
5891 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd
JS
5892 sizeof(struct fcp_rsp) +
5893 ((phba->cfg_sg_seg_cnt + 2) *
5894 sizeof(struct sli4_sge));
96f7077f
JS
5895
5896 /* Total SGEs for scsi_sg_list */
5897 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
895427bd 5898
96f7077f 5899 /*
895427bd
JS
5900 * NOTE: if (phba->cfg_sg_seg_cnt + 2) <= 256 we only
5901 * need to post 1 page for the SGL.
96f7077f 5902 */
085c647c 5903 }
acd6859b 5904
96f7077f
JS
5905 /* Initialize the host templates with the updated values. */
5906 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5907 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e 5908 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5909
5910 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5911 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5912 else
5913 phba->cfg_sg_dma_buf_size =
5914 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5915
5916 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5917 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5918 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5919 phba->cfg_total_seg_cnt);
3772a991 5920
da0436e9 5921 /* Initialize buffer queue management fields */
895427bd 5922 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS
5923 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5924 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5925
da0436e9
JS
5926 /*
5927 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5928 */
895427bd
JS
5929 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5930 /* Initialize the Abort scsi buffer list used by driver */
5931 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5932 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5933 }
5934
5935 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5936 /* Initialize the Abort nvme buffer list used by driver */
5937 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5938 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379 5939 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
966bb5b7
JS
5940 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_ctx_get_list);
5941 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_ctx_put_list);
a8cf5dfe 5942 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
6c621a22 5943
318083ad
JS
5944 /* Fast-path XRI aborted CQ Event work queue list */
5945 INIT_LIST_HEAD(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue);
895427bd
JS
5946 }
5947
da0436e9 5948 /* This abort list used by worker thread */
895427bd 5949 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
966bb5b7
JS
5950 spin_lock_init(&phba->sli4_hba.nvmet_ctx_get_lock);
5951 spin_lock_init(&phba->sli4_hba.nvmet_ctx_put_lock);
a8cf5dfe 5952 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
3772a991 5953
da0436e9 5954 /*
6d368e53 5955 * Initialize driver internal slow-path work queues
da0436e9 5956 */
3772a991 5957
da0436e9
JS
5958 /* Driver internel slow-path CQ Event pool */
5959 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5960 /* Response IOCB work queue list */
45ed1190 5961 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS
5962 /* Asynchronous event CQ Event work queue list */
5963 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5964 /* Fast-path XRI aborted CQ Event work queue list */
5965 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5966 /* Slow-path XRI aborted CQ Event work queue list */
5967 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5968 /* Receive queue CQ Event work queue list */
5969 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5970
6d368e53
JS
5971 /* Initialize extent block lists. */
5972 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5973 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5974 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
5975 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
5976
d1f525aa
JS
5977 /* Initialize mboxq lists. If the early init routines fail
5978 * these lists need to be correctly initialized.
5979 */
5980 INIT_LIST_HEAD(&phba->sli.mboxq);
5981 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
5982
448193b5
JS
5983 /* initialize optic_state to 0xFF */
5984 phba->sli4_hba.lnk_info.optic_state = 0xff;
5985
da0436e9
JS
5986 /* Allocate device driver memory */
5987 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
5988 if (rc)
5989 return -ENOMEM;
5990
2fcee4bf
JS
5991 /* IF Type 2 ports get initialized now. */
5992 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5993 LPFC_SLI_INTF_IF_TYPE_2) {
5994 rc = lpfc_pci_function_reset(phba);
895427bd
JS
5995 if (unlikely(rc)) {
5996 rc = -ENODEV;
5997 goto out_free_mem;
5998 }
946727dc 5999 phba->temp_sensor_support = 1;
2fcee4bf
JS
6000 }
6001
da0436e9
JS
6002 /* Create the bootstrap mailbox command */
6003 rc = lpfc_create_bootstrap_mbox(phba);
6004 if (unlikely(rc))
6005 goto out_free_mem;
6006
6007 /* Set up the host's endian order with the device. */
6008 rc = lpfc_setup_endian_order(phba);
6009 if (unlikely(rc))
6010 goto out_free_bsmbx;
6011
6012 /* Set up the hba's configuration parameters. */
6013 rc = lpfc_sli4_read_config(phba);
cff261f6
JS
6014 if (unlikely(rc))
6015 goto out_free_bsmbx;
6016 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS
6017 if (unlikely(rc))
6018 goto out_free_bsmbx;
6019
2fcee4bf
JS
6020 /* IF Type 0 ports get initialized now. */
6021 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6022 LPFC_SLI_INTF_IF_TYPE_0) {
6023 rc = lpfc_pci_function_reset(phba);
6024 if (unlikely(rc))
6025 goto out_free_bsmbx;
6026 }
da0436e9 6027
cb5172ea
JS
6028 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
6029 GFP_KERNEL);
6030 if (!mboxq) {
6031 rc = -ENOMEM;
6032 goto out_free_bsmbx;
6033 }
6034
f358dd0c 6035 /* Check for NVMET being configured */
895427bd 6036 phba->nvmet_support = 0;
f358dd0c
JS
6037 if (lpfc_enable_nvmet_cnt) {
6038
6039 /* First get WWN of HBA instance */
6040 lpfc_read_nv(phba, mboxq);
6041 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6042 if (rc != MBX_SUCCESS) {
6043 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6044 "6016 Mailbox failed , mbxCmd x%x "
6045 "READ_NV, mbxStatus x%x\n",
6046 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
6047 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
d1f525aa 6048 mempool_free(mboxq, phba->mbox_mem_pool);
f358dd0c
JS
6049 rc = -EIO;
6050 goto out_free_bsmbx;
6051 }
6052 mb = &mboxq->u.mb;
6053 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
6054 sizeof(uint64_t));
6055 wwn = cpu_to_be64(wwn);
6056 phba->sli4_hba.wwnn.u.name = wwn;
6057 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
6058 sizeof(uint64_t));
6059 /* wwn is WWPN of HBA instance */
6060 wwn = cpu_to_be64(wwn);
6061 phba->sli4_hba.wwpn.u.name = wwn;
6062
6063 /* Check to see if it matches any module parameter */
6064 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
6065 if (wwn == lpfc_enable_nvmet[i]) {
7d708033 6066#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
3c603be9
JS
6067 if (lpfc_nvmet_mem_alloc(phba))
6068 break;
6069
6070 phba->nvmet_support = 1; /* a match */
6071
f358dd0c
JS
6072 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6073 "6017 NVME Target %016llx\n",
6074 wwn);
7d708033
JS
6075#else
6076 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6077 "6021 Can't enable NVME Target."
6078 " NVME_TARGET_FC infrastructure"
6079 " is not in kernel\n");
6080#endif
3c603be9 6081 break;
f358dd0c
JS
6082 }
6083 }
6084 }
895427bd
JS
6085
6086 lpfc_nvme_mod_param_dep(phba);
6087
fedd3b7b 6088 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS
6089 lpfc_supported_pages(mboxq);
6090 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS
6091 if (!rc) {
6092 mqe = &mboxq->u.mqe;
6093 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
6094 LPFC_MAX_SUPPORTED_PAGES);
6095 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
6096 switch (pn_page[i]) {
6097 case LPFC_SLI4_PARAMETERS:
6098 phba->sli4_hba.pc_sli4_params.supported = 1;
6099 break;
6100 default:
6101 break;
6102 }
6103 }
6104 /* Read the port's SLI4 Parameters capabilities if supported. */
6105 if (phba->sli4_hba.pc_sli4_params.supported)
6106 rc = lpfc_pc_sli4_params_get(phba, mboxq);
6107 if (rc) {
6108 mempool_free(mboxq, phba->mbox_mem_pool);
6109 rc = -EIO;
6110 goto out_free_bsmbx;
cb5172ea
JS
6111 }
6112 }
65791f1f 6113
fedd3b7b
JS
6114 /*
6115 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS
6116 * If this call fails, it isn't critical unless the SLI4 parameters come
6117 * back in conflict.
fedd3b7b 6118 */
6d368e53
JS
6119 rc = lpfc_get_sli4_parameters(phba, mboxq);
6120 if (rc) {
6121 if (phba->sli4_hba.extents_in_use &&
6122 phba->sli4_hba.rpi_hdrs_in_use) {
6123 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6124 "2999 Unsupported SLI4 Parameters "
6125 "Extents and RPI headers enabled.\n");
6d368e53 6126 }
895427bd
JS
6127 mempool_free(mboxq, phba->mbox_mem_pool);
6128 goto out_free_bsmbx;
6d368e53 6129 }
895427bd 6130
cb5172ea 6131 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS
6132
6133 /* Verify OAS is supported */
6134 lpfc_sli4_oas_verify(phba);
6135 if (phba->cfg_fof)
6136 fof_vectors = 1;
6137
5350d872
JS
6138 /* Verify all the SLI4 queues */
6139 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS
6140 if (rc)
6141 goto out_free_bsmbx;
6142
6143 /* Create driver internal CQE event pool */
6144 rc = lpfc_sli4_cq_event_pool_create(phba);
6145 if (rc)
5350d872 6146 goto out_free_bsmbx;
da0436e9 6147
8a9d2e80
JS
6148 /* Initialize sgl lists per host */
6149 lpfc_init_sgl_list(phba);
6150
6151 /* Allocate and initialize active sgl array */
da0436e9
JS
6152 rc = lpfc_init_active_sgl_array(phba);
6153 if (rc) {
6154 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6155 "1430 Failed to initialize sgl list.\n");
8a9d2e80 6156 goto out_destroy_cq_event_pool;
da0436e9 6157 }
da0436e9
JS
6158 rc = lpfc_sli4_init_rpi_hdrs(phba);
6159 if (rc) {
6160 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6161 "1432 Failed to initialize rpi headers.\n");
6162 goto out_free_active_sgl;
6163 }
6164
a93ff37a 6165 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS
6166 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
6167 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
6168 GFP_KERNEL);
6169 if (!phba->fcf.fcf_rr_bmask) {
6170 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6171 "2759 Failed allocate memory for FCF round "
6172 "robin failover bmask\n");
0558056c 6173 rc = -ENOMEM;
0c9ab6f5
JS
6174 goto out_remove_rpi_hdrs;
6175 }
6176
895427bd
JS
6177 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
6178 sizeof(struct lpfc_hba_eq_hdl),
6179 GFP_KERNEL);
6180 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS
6181 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6182 "2572 Failed allocate memory for "
6183 "fast-path per-EQ handle array\n");
6184 rc = -ENOMEM;
6185 goto out_free_fcf_rr_bmask;
da0436e9
JS
6186 }
6187
895427bd
JS
6188 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
6189 sizeof(struct lpfc_vector_map_info),
6190 GFP_KERNEL);
7bb03bbf
JS
6191 if (!phba->sli4_hba.cpu_map) {
6192 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6193 "3327 Failed allocate memory for msi-x "
6194 "interrupt vector mapping\n");
6195 rc = -ENOMEM;
895427bd 6196 goto out_free_hba_eq_hdl;
7bb03bbf 6197 }
b246de17 6198 if (lpfc_used_cpu == NULL) {
895427bd
JS
6199 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
6200 GFP_KERNEL);
b246de17
JS
6201 if (!lpfc_used_cpu) {
6202 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6203 "3335 Failed allocate memory for msi-x "
6204 "interrupt vector mapping\n");
6205 kfree(phba->sli4_hba.cpu_map);
6206 rc = -ENOMEM;
895427bd 6207 goto out_free_hba_eq_hdl;
b246de17
JS
6208 }
6209 for (i = 0; i < lpfc_present_cpu; i++)
6210 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
6211 }
6212
912e3acd
JS
6213 /*
6214 * Enable sr-iov virtual functions if supported and configured
6215 * through the module parameter.
6216 */
6217 if (phba->cfg_sriov_nr_virtfn > 0) {
6218 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6219 phba->cfg_sriov_nr_virtfn);
6220 if (rc) {
6221 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6222 "3020 Requested number of SR-IOV "
6223 "virtual functions (%d) is not "
6224 "supported\n",
6225 phba->cfg_sriov_nr_virtfn);
6226 phba->cfg_sriov_nr_virtfn = 0;
6227 }
6228 }
6229
5248a749 6230 return 0;
da0436e9 6231
895427bd
JS
6232out_free_hba_eq_hdl:
6233 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS
6234out_free_fcf_rr_bmask:
6235 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS
6236out_remove_rpi_hdrs:
6237 lpfc_sli4_remove_rpi_hdrs(phba);
6238out_free_active_sgl:
6239 lpfc_free_active_sgl(phba);
da0436e9
JS
6240out_destroy_cq_event_pool:
6241 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS
6242out_free_bsmbx:
6243 lpfc_destroy_bootstrap_mbox(phba);
6244out_free_mem:
6245 lpfc_mem_free(phba);
6246 return rc;
6247}
6248
6249/**
6250 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6251 * @phba: pointer to lpfc hba data structure.
6252 *
6253 * This routine is invoked to unset the driver internal resources set up
6254 * specific for supporting the SLI-4 HBA device it attached to.
6255 **/
6256static void
6257lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6258{
6259 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6260
7bb03bbf
JS
6261 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6262 kfree(phba->sli4_hba.cpu_map);
6263 phba->sli4_hba.num_present_cpu = 0;
6264 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6265 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6266
da0436e9 6267 /* Free memory allocated for fast-path work queue handles */
895427bd 6268 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS
6269
6270 /* Free the allocated rpi headers. */
6271 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6272 lpfc_sli4_remove_rpis(phba);
da0436e9 6273
0c9ab6f5
JS
6274 /* Free eligible FCF index bmask */
6275 kfree(phba->fcf.fcf_rr_bmask);
6276
da0436e9
JS
6277 /* Free the ELS sgl list */
6278 lpfc_free_active_sgl(phba);
8a9d2e80 6279 lpfc_free_els_sgl_list(phba);
f358dd0c 6280 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6281
da0436e9
JS
6282 /* Free the completion queue EQ event pool */
6283 lpfc_sli4_cq_event_release_all(phba);
6284 lpfc_sli4_cq_event_pool_destroy(phba);
6285
6d368e53
JS
6286 /* Release resource identifiers. */
6287 lpfc_sli4_dealloc_resource_identifiers(phba);
6288
da0436e9
JS
6289 /* Free the bsmbx region. */
6290 lpfc_destroy_bootstrap_mbox(phba);
6291
6292 /* Free the SLI Layer memory with SLI4 HBAs */
6293 lpfc_mem_free_all(phba);
6294
6295 /* Free the current connect table */
6296 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS
6297 &phba->fcf_conn_rec_list, list) {
6298 list_del_init(&conn_entry->list);
da0436e9 6299 kfree(conn_entry);
4d9ab994 6300 }
da0436e9
JS
6301
6302 return;
6303}
6304
6305/**
25985edc 6306 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS
6307 * @phba: The hba struct for which this call is being executed.
6308 * @dev_grp: The HBA PCI-Device group number.
6309 *
6310 * This routine sets up the device INIT interface API function jump table
6311 * in @phba struct.
6312 *
6313 * Returns: 0 - success, -ENODEV - failure.
6314 **/
6315int
6316lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6317{
84d1b006
JS
6318 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6319 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6320 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS
6321 switch (dev_grp) {
6322 case LPFC_PCI_DEV_LP:
6323 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6324 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6325 phba->lpfc_stop_port = lpfc_stop_port_s3;
6326 break;
6327 case LPFC_PCI_DEV_OC:
6328 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6329 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6330 phba->lpfc_stop_port = lpfc_stop_port_s4;
6331 break;
6332 default:
6333 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6334 "1431 Invalid HBA PCI-device group: 0x%x\n",
6335 dev_grp);
6336 return -ENODEV;
6337 break;
6338 }
6339 return 0;
6340}
6341
da0436e9
JS
6342/**
6343 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6344 * @phba: pointer to lpfc hba data structure.
6345 *
6346 * This routine is invoked to set up the driver internal resources after the
6347 * device specific resource setup to support the HBA device it attached to.
6348 *
6349 * Return codes
af901ca1 6350 * 0 - successful
da0436e9
JS
6351 * other values - error
6352 **/
6353static int
6354lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6355{
6356 int error;
6357
6358 /* Startup the kernel thread for this host adapter. */
6359 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6360 "lpfc_worker_%d", phba->brd_no);
6361 if (IS_ERR(phba->worker_thread)) {
6362 error = PTR_ERR(phba->worker_thread);
6363 return error;
3772a991
JS
6364 }
6365
6366 return 0;
6367}
6368
6369/**
6370 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6371 * @phba: pointer to lpfc hba data structure.
6372 *
6373 * This routine is invoked to unset the driver internal resources set up after
6374 * the device specific resource setup for supporting the HBA device it
6375 * attached to.
6376 **/
6377static void
6378lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6379{
6380 /* Stop kernel worker thread */
6381 kthread_stop(phba->worker_thread);
6382}
6383
6384/**
6385 * lpfc_free_iocb_list - Free iocb list.
6386 * @phba: pointer to lpfc hba data structure.
6387 *
6388 * This routine is invoked to free the driver's IOCB list and memory.
6389 **/
6c621a22 6390void
3772a991
JS
6391lpfc_free_iocb_list(struct lpfc_hba *phba)
6392{
6393 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6394
6395 spin_lock_irq(&phba->hbalock);
6396 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6397 &phba->lpfc_iocb_list, list) {
6398 list_del(&iocbq_entry->list);
6399 kfree(iocbq_entry);
6400 phba->total_iocbq_bufs--;
98c9ea5c 6401 }
3772a991
JS
6402 spin_unlock_irq(&phba->hbalock);
6403
6404 return;
6405}
6406
6407/**
6408 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6409 * @phba: pointer to lpfc hba data structure.
6410 *
6411 * This routine is invoked to allocate and initizlize the driver's IOCB
6412 * list and set up the IOCB tag array accordingly.
6413 *
6414 * Return codes
af901ca1 6415 * 0 - successful
3772a991
JS
6416 * other values - error
6417 **/
6c621a22 6418int
3772a991
JS
6419lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6420{
6421 struct lpfc_iocbq *iocbq_entry = NULL;
6422 uint16_t iotag;
6423 int i;
dea3101e
JB
6424
6425 /* Initialize and populate the iocb list per host. */
6426 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6427 for (i = 0; i < iocb_count; i++) {
dd00cc48 6428 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e
JB
6429 if (iocbq_entry == NULL) {
6430 printk(KERN_ERR "%s: only allocated %d iocbs of "
6431 "expected %d count. Unloading driver.\n",
cadbd4a5 6432 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e
JB
6433 goto out_free_iocbq;
6434 }
6435
604a3e30
JB
6436 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6437 if (iotag == 0) {
3772a991 6438 kfree(iocbq_entry);
604a3e30 6439 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6440 "Unloading driver.\n", __func__);
604a3e30
JB
6441 goto out_free_iocbq;
6442 }
6d368e53 6443 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6444 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS
6445
6446 spin_lock_irq(&phba->hbalock);
dea3101e
JB
6447 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6448 phba->total_iocbq_bufs++;
2e0fef85 6449 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
6450 }
6451
3772a991 6452 return 0;
dea3101e 6453
3772a991
JS
6454out_free_iocbq:
6455 lpfc_free_iocb_list(phba);
dea3101e 6456
3772a991
JS
6457 return -ENOMEM;
6458}
5e9d9b82 6459
3772a991 6460/**
8a9d2e80 6461 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6462 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6463 * @sglq_list: pointer to the head of sgl list.
3772a991 6464 *
8a9d2e80 6465 * This routine is invoked to free a give sgl list and memory.
3772a991 6466 **/
8a9d2e80
JS
6467void
6468lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6469{
da0436e9 6470 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS
6471
6472 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6473 list_del(&sglq_entry->list);
6474 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6475 kfree(sglq_entry);
6476 }
6477}
6478
6479/**
6480 * lpfc_free_els_sgl_list - Free els sgl list.
6481 * @phba: pointer to lpfc hba data structure.
6482 *
6483 * This routine is invoked to free the driver's els sgl list and memory.
6484 **/
6485static void
6486lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6487{
da0436e9 6488 LIST_HEAD(sglq_list);
dea3101e 6489
8a9d2e80 6490 /* Retrieve all els sgls from driver list */
da0436e9 6491 spin_lock_irq(&phba->hbalock);
895427bd
JS
6492 spin_lock(&phba->sli4_hba.sgl_list_lock);
6493 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6494 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6495 spin_unlock_irq(&phba->hbalock);
dea3101e 6496
8a9d2e80
JS
6497 /* Now free the sgl list */
6498 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6499}
92d7f7b0 6500
f358dd0c
JS
6501/**
6502 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
6503 * @phba: pointer to lpfc hba data structure.
6504 *
6505 * This routine is invoked to free the driver's nvmet sgl list and memory.
6506 **/
6507static void
6508lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
6509{
6510 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
6511 LIST_HEAD(sglq_list);
6512
6513 /* Retrieve all nvmet sgls from driver list */
6514 spin_lock_irq(&phba->hbalock);
6515 spin_lock(&phba->sli4_hba.sgl_list_lock);
6516 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
6517 spin_unlock(&phba->sli4_hba.sgl_list_lock);
6518 spin_unlock_irq(&phba->hbalock);
6519
6520 /* Now free the sgl list */
6521 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
6522 list_del(&sglq_entry->list);
6523 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
6524 kfree(sglq_entry);
6525 }
4b40d02b
DK
6526
6527 /* Update the nvmet_xri_cnt to reflect no current sgls.
6528 * The next initialization cycle sets the count and allocates
6529 * the sgls over again.
6530 */
6531 phba->sli4_hba.nvmet_xri_cnt = 0;
f358dd0c
JS
6532}
6533
da0436e9
JS
6534/**
6535 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6536 * @phba: pointer to lpfc hba data structure.
6537 *
6538 * This routine is invoked to allocate the driver's active sgl memory.
6539 * This array will hold the sglq_entry's for active IOs.
6540 **/
6541static int
6542lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6543{
6544 int size;
6545 size = sizeof(struct lpfc_sglq *);
6546 size *= phba->sli4_hba.max_cfg_param.max_xri;
6547
6548 phba->sli4_hba.lpfc_sglq_active_list =
6549 kzalloc(size, GFP_KERNEL);
6550 if (!phba->sli4_hba.lpfc_sglq_active_list)
6551 return -ENOMEM;
6552 return 0;
3772a991
JS
6553}
6554
6555/**
da0436e9 6556 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS
6557 * @phba: pointer to lpfc hba data structure.
6558 *
da0436e9
JS
6559 * This routine is invoked to walk through the array of active sglq entries
6560 * and free all of the resources.
6561 * This is just a place holder for now.
3772a991
JS
6562 **/
6563static void
da0436e9 6564lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6565{
da0436e9 6566 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS
6567}
6568
6569/**
da0436e9 6570 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS
6571 * @phba: pointer to lpfc hba data structure.
6572 *
da0436e9
JS
6573 * This routine is invoked to allocate and initizlize the driver's sgl
6574 * list and set up the sgl xritag tag array accordingly.
3772a991 6575 *
3772a991 6576 **/
8a9d2e80 6577static void
da0436e9 6578lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6579{
da0436e9 6580 /* Initialize and populate the sglq list per host/VF. */
895427bd 6581 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 6582 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 6583 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
86c67379 6584 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
da0436e9 6585
8a9d2e80
JS
6586 /* els xri-sgl book keeping */
6587 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6588
8a9d2e80 6589 /* scsi xri-buffer book keeping */
da0436e9 6590 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS
6591
6592 /* nvme xri-buffer book keeping */
6593 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS
6594}
6595
6596/**
6597 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6598 * @phba: pointer to lpfc hba data structure.
6599 *
6600 * This routine is invoked to post rpi header templates to the
88a2cfbb 6601 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6602 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS
6603 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6604 * and should be called only when interrupts are disabled.
da0436e9
JS
6605 *
6606 * Return codes
af901ca1 6607 * 0 - successful
88a2cfbb 6608 * -ERROR - otherwise.
da0436e9
JS
6609 **/
6610int
6611lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6612{
6613 int rc = 0;
da0436e9
JS
6614 struct lpfc_rpi_hdr *rpi_hdr;
6615
6616 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6617 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6618 return rc;
6d368e53
JS
6619 if (phba->sli4_hba.extents_in_use)
6620 return -EIO;
da0436e9
JS
6621
6622 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6623 if (!rpi_hdr) {
6624 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6625 "0391 Error during rpi post operation\n");
6626 lpfc_sli4_remove_rpis(phba);
6627 rc = -ENODEV;
6628 }
6629
6630 return rc;
6631}
6632
6633/**
6634 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6635 * @phba: pointer to lpfc hba data structure.
6636 *
6637 * This routine is invoked to allocate a single 4KB memory region to
6638 * support rpis and stores them in the phba. This single region
6639 * provides support for up to 64 rpis. The region is used globally
6640 * by the device.
6641 *
6642 * Returns:
6643 * A valid rpi hdr on success.
6644 * A NULL pointer on any failure.
6645 **/
6646struct lpfc_rpi_hdr *
6647lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6648{
6649 uint16_t rpi_limit, curr_rpi_range;
6650 struct lpfc_dmabuf *dmabuf;
6651 struct lpfc_rpi_hdr *rpi_hdr;
6652
6d368e53
JS
6653 /*
6654 * If the SLI4 port supports extents, posting the rpi header isn't
6655 * required. Set the expected maximum count and let the actual value
6656 * get set when extents are fully allocated.
6657 */
6658 if (!phba->sli4_hba.rpi_hdrs_in_use)
6659 return NULL;
6660 if (phba->sli4_hba.extents_in_use)
6661 return NULL;
6662
6663 /* The limit on the logical index is just the max_rpi count. */
845d9e8d 6664 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
da0436e9
JS
6665
6666 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6667 /*
6668 * Establish the starting RPI in this header block. The starting
6669 * rpi is normalized to a zero base because the physical rpi is
6670 * port based.
6671 */
97f2ecf1 6672 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS
6673 spin_unlock_irq(&phba->hbalock);
6674
845d9e8d
JS
6675 /* Reached full RPI range */
6676 if (curr_rpi_range == rpi_limit)
6d368e53 6677 return NULL;
845d9e8d 6678
da0436e9
JS
6679 /*
6680 * First allocate the protocol header region for the port. The
6681 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6682 */
6683 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6684 if (!dmabuf)
6685 return NULL;
6686
1aee383d
JP
6687 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6688 LPFC_HDR_TEMPLATE_SIZE,
6689 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
6690 if (!dmabuf->virt) {
6691 rpi_hdr = NULL;
6692 goto err_free_dmabuf;
6693 }
6694
da0436e9
JS
6695 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6696 rpi_hdr = NULL;
6697 goto err_free_coherent;
6698 }
6699
6700 /* Save the rpi header data for cleanup later. */
6701 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6702 if (!rpi_hdr)
6703 goto err_free_coherent;
6704
6705 rpi_hdr->dmabuf = dmabuf;
6706 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6707 rpi_hdr->page_count = 1;
6708 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6709
6710 /* The rpi_hdr stores the logical index only. */
6711 rpi_hdr->start_rpi = curr_rpi_range;
845d9e8d 6712 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
da0436e9
JS
6713 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6714
da0436e9
JS
6715 spin_unlock_irq(&phba->hbalock);
6716 return rpi_hdr;
6717
6718 err_free_coherent:
6719 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6720 dmabuf->virt, dmabuf->phys);
6721 err_free_dmabuf:
6722 kfree(dmabuf);
6723 return NULL;
6724}
6725
6726/**
6727 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6728 * @phba: pointer to lpfc hba data structure.
6729 *
6730 * This routine is invoked to remove all memory resources allocated
6d368e53
JS
6731 * to support rpis for SLI4 ports not supporting extents. This routine
6732 * presumes the caller has released all rpis consumed by fabric or port
6733 * logins and is prepared to have the header pages removed.
da0436e9
JS
6734 **/
6735void
6736lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6737{
6738 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6739
6d368e53
JS
6740 if (!phba->sli4_hba.rpi_hdrs_in_use)
6741 goto exit;
6742
da0436e9
JS
6743 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6744 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6745 list_del(&rpi_hdr->list);
6746 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6747 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6748 kfree(rpi_hdr->dmabuf);
6749 kfree(rpi_hdr);
6750 }
6d368e53
JS
6751 exit:
6752 /* There are no rpis available to the port now. */
6753 phba->sli4_hba.next_rpi = 0;
da0436e9
JS
6754}
6755
6756/**
6757 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6758 * @pdev: pointer to pci device data structure.
6759 *
6760 * This routine is invoked to allocate the driver hba data structure for an
6761 * HBA device. If the allocation is successful, the phba reference to the
6762 * PCI device data structure is set.
6763 *
6764 * Return codes
af901ca1 6765 * pointer to @phba - successful
da0436e9
JS
6766 * NULL - error
6767 **/
6768static struct lpfc_hba *
6769lpfc_hba_alloc(struct pci_dev *pdev)
6770{
6771 struct lpfc_hba *phba;
6772
6773 /* Allocate memory for HBA structure */
6774 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6775 if (!phba) {
e34ccdfe 6776 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS
6777 return NULL;
6778 }
6779
6780 /* Set reference to PCI device in HBA structure */
6781 phba->pcidev = pdev;
6782
6783 /* Assign an unused board number */
6784 phba->brd_no = lpfc_get_instance();
6785 if (phba->brd_no < 0) {
6786 kfree(phba);
6787 return NULL;
6788 }
65791f1f 6789 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6790
4fede78f 6791 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS
6792 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6793
da0436e9
JS
6794 return phba;
6795}
6796
6797/**
6798 * lpfc_hba_free - Free driver hba data structure with a device.
6799 * @phba: pointer to lpfc hba data structure.
6800 *
6801 * This routine is invoked to free the driver hba data structure with an
6802 * HBA device.
6803 **/
6804static void
6805lpfc_hba_free(struct lpfc_hba *phba)
6806{
6807 /* Release the driver assigned board number */
6808 idr_remove(&lpfc_hba_index, phba->brd_no);
6809
895427bd
JS
6810 /* Free memory allocated with sli3 rings */
6811 kfree(phba->sli.sli3_ring);
6812 phba->sli.sli3_ring = NULL;
2a76a283 6813
da0436e9
JS
6814 kfree(phba);
6815 return;
6816}
6817
6818/**
6819 * lpfc_create_shost - Create hba physical port with associated scsi host.
6820 * @phba: pointer to lpfc hba data structure.
6821 *
6822 * This routine is invoked to create HBA physical port and associate a SCSI
6823 * host with it.
6824 *
6825 * Return codes
af901ca1 6826 * 0 - successful
da0436e9
JS
6827 * other values - error
6828 **/
6829static int
6830lpfc_create_shost(struct lpfc_hba *phba)
6831{
6832 struct lpfc_vport *vport;
6833 struct Scsi_Host *shost;
6834
6835 /* Initialize HBA FC structure */
6836 phba->fc_edtov = FF_DEF_EDTOV;
6837 phba->fc_ratov = FF_DEF_RATOV;
6838 phba->fc_altov = FF_DEF_ALTOV;
6839 phba->fc_arbtov = FF_DEF_ARBTOV;
6840
d7c47992 6841 atomic_set(&phba->sdev_cnt, 0);
2cee7808
JS
6842 atomic_set(&phba->fc4ScsiInputRequests, 0);
6843 atomic_set(&phba->fc4ScsiOutputRequests, 0);
6844 atomic_set(&phba->fc4ScsiControlRequests, 0);
6845 atomic_set(&phba->fc4ScsiIoCmpls, 0);
6846 atomic_set(&phba->fc4NvmeInputRequests, 0);
6847 atomic_set(&phba->fc4NvmeOutputRequests, 0);
6848 atomic_set(&phba->fc4NvmeControlRequests, 0);
6849 atomic_set(&phba->fc4NvmeIoCmpls, 0);
6850 atomic_set(&phba->fc4NvmeLsRequests, 0);
6851 atomic_set(&phba->fc4NvmeLsCmpls, 0);
da0436e9
JS
6852 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6853 if (!vport)
6854 return -ENODEV;
6855
6856 shost = lpfc_shost_from_vport(vport);
6857 phba->pport = vport;
2ea259ee 6858
f358dd0c
JS
6859 if (phba->nvmet_support) {
6860 /* Only 1 vport (pport) will support NVME target */
6861 if (phba->txrdy_payload_pool == NULL) {
771db5c0
RP
6862 phba->txrdy_payload_pool = dma_pool_create(
6863 "txrdy_pool", &phba->pcidev->dev,
f358dd0c
JS
6864 TXRDY_PAYLOAD_LEN, 16, 0);
6865 if (phba->txrdy_payload_pool) {
6866 phba->targetport = NULL;
6867 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
6868 lpfc_printf_log(phba, KERN_INFO,
6869 LOG_INIT | LOG_NVME_DISC,
6870 "6076 NVME Target Found\n");
6871 }
6872 }
6873 }
6874
da0436e9
JS
6875 lpfc_debugfs_initialize(vport);
6876 /* Put reference to SCSI host to driver's device private data */
6877 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6878
4258e98e
JS
6879 /*
6880 * At this point we are fully registered with PSA. In addition,
6881 * any initial discovery should be completed.
6882 */
6883 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS
6884 if (phba->cfg_enable_SmartSAN ||
6885 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS
6886
6887 /* Setup appropriate attribute masks */
6888 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6889 if (phba->cfg_enable_SmartSAN)
4258e98e
JS
6890 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6891 else
6892 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6893 }
3772a991
JS
6894 return 0;
6895}
db2378e0 6896
3772a991
JS
6897/**
6898 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6899 * @phba: pointer to lpfc hba data structure.
6900 *
6901 * This routine is invoked to destroy HBA physical port and the associated
6902 * SCSI host.
6903 **/
6904static void
6905lpfc_destroy_shost(struct lpfc_hba *phba)
6906{
6907 struct lpfc_vport *vport = phba->pport;
6908
6909 /* Destroy physical port that associated with the SCSI host */
6910 destroy_port(vport);
6911
6912 return;
6913}
6914
6915/**
6916 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6917 * @phba: pointer to lpfc hba data structure.
6918 * @shost: the shost to be used to detect Block guard settings.
6919 *
6920 * This routine sets up the local Block guard protocol settings for @shost.
6921 * This routine also allocates memory for debugging bg buffers.
6922 **/
6923static void
6924lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6925{
bbeb79b9
JS
6926 uint32_t old_mask;
6927 uint32_t old_guard;
6928
3772a991 6929 int pagecnt = 10;
b3b98b74 6930 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS
6931 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6932 "1478 Registering BlockGuard with the "
6933 "SCSI layer\n");
bbeb79b9 6934
b3b98b74
JS
6935 old_mask = phba->cfg_prot_mask;
6936 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS
6937
6938 /* Only allow supported values */
b3b98b74 6939 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS
6940 SHOST_DIX_TYPE0_PROTECTION |
6941 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS
6942 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6943 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS
6944
6945 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS
6946 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6947 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6948
b3b98b74
JS
6949 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6950 if ((old_mask != phba->cfg_prot_mask) ||
6951 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS
6952 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6953 "1475 Registering BlockGuard with the "
6954 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS
6955 phba->cfg_prot_mask,
6956 phba->cfg_prot_guard);
bbeb79b9 6957
b3b98b74
JS
6958 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6959 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS
6960 } else
6961 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6962 "1479 Not Registering BlockGuard with the SCSI "
6963 "layer, Bad protection parameters: %d %d\n",
6964 old_mask, old_guard);
3772a991 6965 }
bbeb79b9 6966
3772a991
JS
6967 if (!_dump_buf_data) {
6968 while (pagecnt) {
6969 spin_lock_init(&_dump_buf_lock);
6970 _dump_buf_data =
6971 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6972 if (_dump_buf_data) {
6a9c52cf
JS
6973 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6974 "9043 BLKGRD: allocated %d pages for "
3772a991
JS
6975 "_dump_buf_data at 0x%p\n",
6976 (1 << pagecnt), _dump_buf_data);
6977 _dump_buf_data_order = pagecnt;
6978 memset(_dump_buf_data, 0,
6979 ((1 << PAGE_SHIFT) << pagecnt));
6980 break;
6981 } else
6982 --pagecnt;
6983 }
6984 if (!_dump_buf_data_order)
6a9c52cf
JS
6985 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6986 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS
6987 "memory for hexdump\n");
6988 } else
6a9c52cf
JS
6989 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6990 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS
6991 "\n", _dump_buf_data);
6992 if (!_dump_buf_dif) {
6993 while (pagecnt) {
6994 _dump_buf_dif =
6995 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6996 if (_dump_buf_dif) {
6a9c52cf
JS
6997 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6998 "9046 BLKGRD: allocated %d pages for "
3772a991
JS
6999 "_dump_buf_dif at 0x%p\n",
7000 (1 << pagecnt), _dump_buf_dif);
7001 _dump_buf_dif_order = pagecnt;
7002 memset(_dump_buf_dif, 0,
7003 ((1 << PAGE_SHIFT) << pagecnt));
7004 break;
7005 } else
7006 --pagecnt;
7007 }
7008 if (!_dump_buf_dif_order)
6a9c52cf
JS
7009 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7010 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS
7011 "memory for hexdump\n");
7012 } else
6a9c52cf
JS
7013 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7014 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS
7015 _dump_buf_dif);
7016}
7017
7018/**
7019 * lpfc_post_init_setup - Perform necessary device post initialization setup.
7020 * @phba: pointer to lpfc hba data structure.
7021 *
7022 * This routine is invoked to perform all the necessary post initialization
7023 * setup for the device.
7024 **/
7025static void
7026lpfc_post_init_setup(struct lpfc_hba *phba)
7027{
7028 struct Scsi_Host *shost;
7029 struct lpfc_adapter_event_header adapter_event;
7030
7031 /* Get the default values for Model Name and Description */
7032 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
7033
7034 /*
7035 * hba setup may have changed the hba_queue_depth so we need to
7036 * adjust the value of can_queue.
7037 */
7038 shost = pci_get_drvdata(phba->pcidev);
7039 shost->can_queue = phba->cfg_hba_queue_depth - 10;
7040 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
7041 lpfc_setup_bg(phba, shost);
7042
7043 lpfc_host_attrib_init(shost);
7044
7045 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
7046 spin_lock_irq(shost->host_lock);
7047 lpfc_poll_start_timer(phba);
7048 spin_unlock_irq(shost->host_lock);
7049 }
7050
7051 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7052 "0428 Perform SCSI scan\n");
7053 /* Send board arrival event to upper layer */
7054 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
7055 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
7056 fc_host_post_vendor_event(shost, fc_get_event_number(),
7057 sizeof(adapter_event),
7058 (char *) &adapter_event,
7059 LPFC_NL_VENDOR_ID);
7060 return;
7061}
7062
7063/**
7064 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
7065 * @phba: pointer to lpfc hba data structure.
7066 *
7067 * This routine is invoked to set up the PCI device memory space for device
7068 * with SLI-3 interface spec.
7069 *
7070 * Return codes
af901ca1 7071 * 0 - successful
3772a991
JS
7072 * other values - error
7073 **/
7074static int
7075lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
7076{
7077 struct pci_dev *pdev;
7078 unsigned long bar0map_len, bar2map_len;
7079 int i, hbq_count;
7080 void *ptr;
7081 int error = -ENODEV;
7082
7083 /* Obtain PCI device reference */
7084 if (!phba->pcidev)
7085 return error;
7086 else
7087 pdev = phba->pcidev;
7088
7089 /* Set the device DMA mask size */
8e68597d
MR
7090 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
7091 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
7092 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
7093 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 7094 return error;
8e68597d
MR
7095 }
7096 }
3772a991
JS
7097
7098 /* Get the bus address of Bar0 and Bar2 and the number of bytes
7099 * required by each mapping.
7100 */
7101 phba->pci_bar0_map = pci_resource_start(pdev, 0);
7102 bar0map_len = pci_resource_len(pdev, 0);
7103
7104 phba->pci_bar2_map = pci_resource_start(pdev, 2);
7105 bar2map_len = pci_resource_len(pdev, 2);
7106
7107 /* Map HBA SLIM to a kernel virtual address. */
7108 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
7109 if (!phba->slim_memmap_p) {
7110 dev_printk(KERN_ERR, &pdev->dev,
7111 "ioremap failed for SLIM memory.\n");
7112 goto out;
7113 }
7114
7115 /* Map HBA Control Registers to a kernel virtual address. */
7116 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
7117 if (!phba->ctrl_regs_memmap_p) {
7118 dev_printk(KERN_ERR, &pdev->dev,
7119 "ioremap failed for HBA control registers.\n");
7120 goto out_iounmap_slim;
7121 }
7122
7123 /* Allocate memory for SLI-2 structures */
1aee383d
JP
7124 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7125 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS
7126 if (!phba->slim2p.virt)
7127 goto out_iounmap;
7128
3772a991 7129 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS
7130 phba->mbox_ext = (phba->slim2p.virt +
7131 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS
7132 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
7133 phba->IOCBs = (phba->slim2p.virt +
7134 offsetof(struct lpfc_sli2_slim, IOCBs));
7135
7136 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
7137 lpfc_sli_hbq_size(),
7138 &phba->hbqslimp.phys,
7139 GFP_KERNEL);
7140 if (!phba->hbqslimp.virt)
7141 goto out_free_slim;
7142
7143 hbq_count = lpfc_sli_hbq_count();
7144 ptr = phba->hbqslimp.virt;
7145 for (i = 0; i < hbq_count; ++i) {
7146 phba->hbqs[i].hbq_virt = ptr;
7147 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
7148 ptr += (lpfc_hbq_defs[i]->entry_count *
7149 sizeof(struct lpfc_hbq_entry));
7150 }
7151 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
7152 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
7153
7154 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
7155
3772a991
JS
7156 phba->MBslimaddr = phba->slim_memmap_p;
7157 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
7158 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
7159 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
7160 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
7161
7162 return 0;
7163
7164out_free_slim:
7165 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7166 phba->slim2p.virt, phba->slim2p.phys);
7167out_iounmap:
7168 iounmap(phba->ctrl_regs_memmap_p);
7169out_iounmap_slim:
7170 iounmap(phba->slim_memmap_p);
7171out:
7172 return error;
7173}
7174
7175/**
7176 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
7177 * @phba: pointer to lpfc hba data structure.
7178 *
7179 * This routine is invoked to unset the PCI device memory space for device
7180 * with SLI-3 interface spec.
7181 **/
7182static void
7183lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7184{
7185 struct pci_dev *pdev;
7186
7187 /* Obtain PCI device reference */
7188 if (!phba->pcidev)
7189 return;
7190 else
7191 pdev = phba->pcidev;
7192
7193 /* Free coherent DMA memory allocated */
7194 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7195 phba->hbqslimp.virt, phba->hbqslimp.phys);
7196 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7197 phba->slim2p.virt, phba->slim2p.phys);
7198
7199 /* I/O memory unmap */
7200 iounmap(phba->ctrl_regs_memmap_p);
7201 iounmap(phba->slim_memmap_p);
7202
7203 return;
7204}
7205
7206/**
da0436e9 7207 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS
7208 * @phba: pointer to lpfc hba data structure.
7209 *
da0436e9
JS
7210 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7211 * done and check status.
3772a991 7212 *
da0436e9 7213 * Return 0 if successful, otherwise -ENODEV.
3772a991 7214 **/
da0436e9
JS
7215int
7216lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 7217{
2fcee4bf
JS
7218 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7219 struct lpfc_register reg_data;
7220 int i, port_error = 0;
7221 uint32_t if_type;
3772a991 7222
9940b97b
JS
7223 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7224 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 7225 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 7226 return -ENODEV;
3772a991 7227
da0436e9
JS
7228 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7229 for (i = 0; i < 3000; i++) {
9940b97b
JS
7230 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7231 &portsmphr_reg.word0) ||
7232 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 7233 /* Port has a fatal POST error, break out */
da0436e9
JS
7234 port_error = -ENODEV;
7235 break;
7236 }
2fcee4bf
JS
7237 if (LPFC_POST_STAGE_PORT_READY ==
7238 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 7239 break;
da0436e9 7240 msleep(10);
3772a991
JS
7241 }
7242
2fcee4bf
JS
7243 /*
7244 * If there was a port error during POST, then don't proceed with
7245 * other register reads as the data may not be valid. Just exit.
7246 */
7247 if (port_error) {
da0436e9 7248 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
7249 "1408 Port Failed POST - portsmphr=0x%x, "
7250 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7251 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7252 portsmphr_reg.word0,
7253 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7254 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7255 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7256 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7257 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7258 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7259 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7260 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7261 } else {
28baac74 7262 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS
7263 "2534 Device Info: SLIFamily=0x%x, "
7264 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7265 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS
7266 bf_get(lpfc_sli_intf_sli_family,
7267 &phba->sli4_hba.sli_intf),
7268 bf_get(lpfc_sli_intf_slirev,
7269 &phba->sli4_hba.sli_intf),
085c647c
JS
7270 bf_get(lpfc_sli_intf_if_type,
7271 &phba->sli4_hba.sli_intf),
7272 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7273 &phba->sli4_hba.sli_intf),
085c647c
JS
7274 bf_get(lpfc_sli_intf_sli_hint2,
7275 &phba->sli4_hba.sli_intf),
7276 bf_get(lpfc_sli_intf_func_type,
28baac74 7277 &phba->sli4_hba.sli_intf));
2fcee4bf
JS
7278 /*
7279 * Check for other Port errors during the initialization
7280 * process. Fail the load if the port did not come up
7281 * correctly.
7282 */
7283 if_type = bf_get(lpfc_sli_intf_if_type,
7284 &phba->sli4_hba.sli_intf);
7285 switch (if_type) {
7286 case LPFC_SLI_INTF_IF_TYPE_0:
7287 phba->sli4_hba.ue_mask_lo =
7288 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7289 phba->sli4_hba.ue_mask_hi =
7290 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7291 uerrlo_reg.word0 =
7292 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7293 uerrhi_reg.word0 =
7294 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7295 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7296 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7297 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7298 "1422 Unrecoverable Error "
7299 "Detected during POST "
7300 "uerr_lo_reg=0x%x, "
7301 "uerr_hi_reg=0x%x, "
7302 "ue_mask_lo_reg=0x%x, "
7303 "ue_mask_hi_reg=0x%x\n",
7304 uerrlo_reg.word0,
7305 uerrhi_reg.word0,
7306 phba->sli4_hba.ue_mask_lo,
7307 phba->sli4_hba.ue_mask_hi);
7308 port_error = -ENODEV;
7309 }
7310 break;
7311 case LPFC_SLI_INTF_IF_TYPE_2:
7312 /* Final checks. The port status should be clean. */
9940b97b
JS
7313 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7314 &reg_data.word0) ||
0558056c
JS
7315 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7316 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS
7317 phba->work_status[0] =
7318 readl(phba->sli4_hba.u.if_type2.
7319 ERR1regaddr);
7320 phba->work_status[1] =
7321 readl(phba->sli4_hba.u.if_type2.
7322 ERR2regaddr);
7323 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS
7324 "2888 Unrecoverable port error "
7325 "following POST: port status reg "
7326 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS
7327 "error 1=0x%x, error 2=0x%x\n",
7328 reg_data.word0,
7329 portsmphr_reg.word0,
7330 phba->work_status[0],
7331 phba->work_status[1]);
7332 port_error = -ENODEV;
7333 }
7334 break;
7335 case LPFC_SLI_INTF_IF_TYPE_1:
7336 default:
7337 break;
7338 }
28baac74 7339 }
da0436e9
JS
7340 return port_error;
7341}
3772a991 7342
da0436e9
JS
7343/**
7344 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7345 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7346 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS
7347 *
7348 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7349 * memory map.
7350 **/
7351static void
2fcee4bf
JS
7352lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7353{
7354 switch (if_type) {
7355 case LPFC_SLI_INTF_IF_TYPE_0:
7356 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7357 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7358 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7359 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7360 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7361 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7362 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7363 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7364 phba->sli4_hba.SLIINTFregaddr =
7365 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7366 break;
7367 case LPFC_SLI_INTF_IF_TYPE_2:
0cf07f84
JS
7368 phba->sli4_hba.u.if_type2.EQDregaddr =
7369 phba->sli4_hba.conf_regs_memmap_p +
7370 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
2fcee4bf 7371 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS
7372 phba->sli4_hba.conf_regs_memmap_p +
7373 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7374 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS
7375 phba->sli4_hba.conf_regs_memmap_p +
7376 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7377 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS
7378 phba->sli4_hba.conf_regs_memmap_p +
7379 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7380 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS
7381 phba->sli4_hba.conf_regs_memmap_p +
7382 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS
7383 phba->sli4_hba.SLIINTFregaddr =
7384 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7385 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS
7386 phba->sli4_hba.conf_regs_memmap_p +
7387 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7388 phba->sli4_hba.RQDBregaddr =
962bc51b
JS
7389 phba->sli4_hba.conf_regs_memmap_p +
7390 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7391 phba->sli4_hba.WQDBregaddr =
962bc51b
JS
7392 phba->sli4_hba.conf_regs_memmap_p +
7393 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS
7394 phba->sli4_hba.EQCQDBregaddr =
7395 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
7396 phba->sli4_hba.MQDBregaddr =
7397 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
7398 phba->sli4_hba.BMBXregaddr =
7399 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
7400 break;
7401 case LPFC_SLI_INTF_IF_TYPE_1:
7402 default:
7403 dev_printk(KERN_ERR, &phba->pcidev->dev,
7404 "FATAL - unsupported SLI4 interface type - %d\n",
7405 if_type);
7406 break;
7407 }
da0436e9 7408}
3772a991 7409
da0436e9
JS
7410/**
7411 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
7412 * @phba: pointer to lpfc hba data structure.
7413 *
7414 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
7415 * memory map.
7416 **/
7417static void
7418lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
7419{
2fcee4bf
JS
7420 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
7421 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 7422 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7423 LPFC_HST_ISR0;
da0436e9 7424 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7425 LPFC_HST_IMR0;
da0436e9 7426 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7427 LPFC_HST_ISCR0;
3772a991
JS
7428}
7429
7430/**
da0436e9 7431 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 7432 * @phba: pointer to lpfc hba data structure.
da0436e9 7433 * @vf: virtual function number
3772a991 7434 *
da0436e9
JS
7435 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
7436 * based on the given viftual function number, @vf.
7437 *
7438 * Return 0 if successful, otherwise -ENODEV.
3772a991 7439 **/
da0436e9
JS
7440static int
7441lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7442{
da0436e9
JS
7443 if (vf > LPFC_VIR_FUNC_MAX)
7444 return -ENODEV;
3772a991 7445
da0436e9 7446 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7447 vf * LPFC_VFR_PAGE_SIZE +
7448 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7449 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7450 vf * LPFC_VFR_PAGE_SIZE +
7451 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS
7452 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7453 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7454 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7455 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7456 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7457 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7458 return 0;
3772a991
JS
7459}
7460
7461/**
da0436e9 7462 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS
7463 * @phba: pointer to lpfc hba data structure.
7464 *
da0436e9
JS
7465 * This routine is invoked to create the bootstrap mailbox
7466 * region consistent with the SLI-4 interface spec. This
7467 * routine allocates all memory necessary to communicate
7468 * mailbox commands to the port and sets up all alignment
7469 * needs. No locks are expected to be held when calling
7470 * this routine.
3772a991
JS
7471 *
7472 * Return codes
af901ca1 7473 * 0 - successful
d439d286 7474 * -ENOMEM - could not allocated memory.
da0436e9 7475 **/
3772a991 7476static int
da0436e9 7477lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7478{
da0436e9
JS
7479 uint32_t bmbx_size;
7480 struct lpfc_dmabuf *dmabuf;
7481 struct dma_address *dma_address;
7482 uint32_t pa_addr;
7483 uint64_t phys_addr;
7484
7485 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7486 if (!dmabuf)
7487 return -ENOMEM;
3772a991 7488
da0436e9
JS
7489 /*
7490 * The bootstrap mailbox region is comprised of 2 parts
7491 * plus an alignment restriction of 16 bytes.
7492 */
7493 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP
7494 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7495 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
7496 if (!dmabuf->virt) {
7497 kfree(dmabuf);
7498 return -ENOMEM;
3772a991
JS
7499 }
7500
da0436e9
JS
7501 /*
7502 * Initialize the bootstrap mailbox pointers now so that the register
7503 * operations are simple later. The mailbox dma address is required
7504 * to be 16-byte aligned. Also align the virtual memory as each
7505 * maibox is copied into the bmbx mailbox region before issuing the
7506 * command to the port.
7507 */
7508 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7509 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7510
7511 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7512 LPFC_ALIGN_16_BYTE);
7513 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7514 LPFC_ALIGN_16_BYTE);
7515
7516 /*
7517 * Set the high and low physical addresses now. The SLI4 alignment
7518 * requirement is 16 bytes and the mailbox is posted to the port
7519 * as two 30-bit addresses. The other data is a bit marking whether
7520 * the 30-bit address is the high or low address.
7521 * Upcast bmbx aphys to 64bits so shift instruction compiles
7522 * clean on 32 bit machines.
7523 */
7524 dma_address = &phba->sli4_hba.bmbx.dma_address;
7525 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7526 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7527 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7528 LPFC_BMBX_BIT1_ADDR_HI);
7529
7530 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7531 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7532 LPFC_BMBX_BIT1_ADDR_LO);
7533 return 0;
3772a991
JS
7534}
7535
7536/**
da0436e9 7537 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS
7538 * @phba: pointer to lpfc hba data structure.
7539 *
da0436e9
JS
7540 * This routine is invoked to teardown the bootstrap mailbox
7541 * region and release all host resources. This routine requires
7542 * the caller to ensure all mailbox commands recovered, no
7543 * additional mailbox comands are sent, and interrupts are disabled
7544 * before calling this routine.
7545 *
7546 **/
3772a991 7547static void
da0436e9 7548lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7549{
da0436e9
JS
7550 dma_free_coherent(&phba->pcidev->dev,
7551 phba->sli4_hba.bmbx.bmbx_size,
7552 phba->sli4_hba.bmbx.dmabuf->virt,
7553 phba->sli4_hba.bmbx.dmabuf->phys);
7554
7555 kfree(phba->sli4_hba.bmbx.dmabuf);
7556 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS
7557}
7558
7559/**
da0436e9 7560 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS
7561 * @phba: pointer to lpfc hba data structure.
7562 *
da0436e9
JS
7563 * This routine is invoked to read the configuration parameters from the HBA.
7564 * The configuration parameters are used to set the base and maximum values
7565 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7566 * allocation for the port.
3772a991
JS
7567 *
7568 * Return codes
af901ca1 7569 * 0 - successful
25985edc 7570 * -ENOMEM - No available memory
d439d286 7571 * -EIO - The mailbox failed to complete successfully.
3772a991 7572 **/
ff78d8f9 7573int
da0436e9 7574lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7575{
da0436e9
JS
7576 LPFC_MBOXQ_t *pmb;
7577 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS
7578 union lpfc_sli4_cfg_shdr *shdr;
7579 uint32_t shdr_status, shdr_add_status;
7580 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7581 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7582 char *pdesc_0;
c691816e
JS
7583 uint16_t forced_link_speed;
7584 uint32_t if_type;
8aa134a8 7585 int length, i, rc = 0, rc2;
3772a991 7586
da0436e9
JS
7587 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7588 if (!pmb) {
7589 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7590 "2011 Unable to allocate memory for issuing "
7591 "SLI_CONFIG_SPECIAL mailbox command\n");
7592 return -ENOMEM;
3772a991
JS
7593 }
7594
da0436e9 7595 lpfc_read_config(phba, pmb);
3772a991 7596
da0436e9
JS
7597 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7598 if (rc != MBX_SUCCESS) {
7599 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7600 "2012 Mailbox failed , mbxCmd x%x "
7601 "READ_CONFIG, mbxStatus x%x\n",
7602 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7603 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7604 rc = -EIO;
7605 } else {
7606 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS
7607 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7608 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7609 phba->sli4_hba.lnk_info.lnk_tp =
7610 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7611 phba->sli4_hba.lnk_info.lnk_no =
7612 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7613 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7614 "3081 lnk_type:%d, lnk_numb:%d\n",
7615 phba->sli4_hba.lnk_info.lnk_tp,
7616 phba->sli4_hba.lnk_info.lnk_no);
7617 } else
7618 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7619 "3082 Mailbox (x%x) returned ldv:x0\n",
7620 bf_get(lpfc_mqe_command, &pmb->u.mqe));
6d368e53
JS
7621 phba->sli4_hba.extents_in_use =
7622 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS
7623 phba->sli4_hba.max_cfg_param.max_xri =
7624 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7625 phba->sli4_hba.max_cfg_param.xri_base =
7626 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7627 phba->sli4_hba.max_cfg_param.max_vpi =
7628 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7629 phba->sli4_hba.max_cfg_param.vpi_base =
7630 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7631 phba->sli4_hba.max_cfg_param.max_rpi =
7632 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7633 phba->sli4_hba.max_cfg_param.rpi_base =
7634 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7635 phba->sli4_hba.max_cfg_param.max_vfi =
7636 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7637 phba->sli4_hba.max_cfg_param.vfi_base =
7638 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7639 phba->sli4_hba.max_cfg_param.max_fcfi =
7640 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS
7641 phba->sli4_hba.max_cfg_param.max_eq =
7642 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7643 phba->sli4_hba.max_cfg_param.max_rq =
7644 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7645 phba->sli4_hba.max_cfg_param.max_wq =
7646 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7647 phba->sli4_hba.max_cfg_param.max_cq =
7648 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7649 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7650 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7651 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7652 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS
7653 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7654 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS
7655 phba->max_vports = phba->max_vpi;
7656 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS
7657 "2003 cfg params Extents? %d "
7658 "XRI(B:%d M:%d), "
da0436e9
JS
7659 "VPI(B:%d M:%d) "
7660 "VFI(B:%d M:%d) "
7661 "RPI(B:%d M:%d) "
2ea259ee 7662 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7663 phba->sli4_hba.extents_in_use,
da0436e9
JS
7664 phba->sli4_hba.max_cfg_param.xri_base,
7665 phba->sli4_hba.max_cfg_param.max_xri,
7666 phba->sli4_hba.max_cfg_param.vpi_base,
7667 phba->sli4_hba.max_cfg_param.max_vpi,
7668 phba->sli4_hba.max_cfg_param.vfi_base,
7669 phba->sli4_hba.max_cfg_param.max_vfi,
7670 phba->sli4_hba.max_cfg_param.rpi_base,
7671 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS
7672 phba->sli4_hba.max_cfg_param.max_fcfi,
7673 phba->sli4_hba.max_cfg_param.max_eq,
7674 phba->sli4_hba.max_cfg_param.max_cq,
7675 phba->sli4_hba.max_cfg_param.max_wq,
7676 phba->sli4_hba.max_cfg_param.max_rq);
7677
3772a991 7678 }
912e3acd
JS
7679
7680 if (rc)
7681 goto read_cfg_out;
da0436e9 7682
c691816e
JS
7683 /* Update link speed if forced link speed is supported */
7684 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7685 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7686 forced_link_speed =
7687 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7688 if (forced_link_speed) {
7689 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7690
7691 switch (forced_link_speed) {
7692 case LINK_SPEED_1G:
7693 phba->cfg_link_speed =
7694 LPFC_USER_LINK_SPEED_1G;
7695 break;
7696 case LINK_SPEED_2G:
7697 phba->cfg_link_speed =
7698 LPFC_USER_LINK_SPEED_2G;
7699 break;
7700 case LINK_SPEED_4G:
7701 phba->cfg_link_speed =
7702 LPFC_USER_LINK_SPEED_4G;
7703 break;
7704 case LINK_SPEED_8G:
7705 phba->cfg_link_speed =
7706 LPFC_USER_LINK_SPEED_8G;
7707 break;
7708 case LINK_SPEED_10G:
7709 phba->cfg_link_speed =
7710 LPFC_USER_LINK_SPEED_10G;
7711 break;
7712 case LINK_SPEED_16G:
7713 phba->cfg_link_speed =
7714 LPFC_USER_LINK_SPEED_16G;
7715 break;
7716 case LINK_SPEED_32G:
7717 phba->cfg_link_speed =
7718 LPFC_USER_LINK_SPEED_32G;
7719 break;
7720 case 0xffff:
7721 phba->cfg_link_speed =
7722 LPFC_USER_LINK_SPEED_AUTO;
7723 break;
7724 default:
7725 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7726 "0047 Unrecognized link "
7727 "speed : %d\n",
7728 forced_link_speed);
7729 phba->cfg_link_speed =
7730 LPFC_USER_LINK_SPEED_AUTO;
7731 }
7732 }
7733 }
7734
da0436e9 7735 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
7736 length = phba->sli4_hba.max_cfg_param.max_xri -
7737 lpfc_sli4_get_els_iocb_cnt(phba);
7738 if (phba->cfg_hba_queue_depth > length) {
7739 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7740 "3361 HBA queue depth changed from %d to %d\n",
7741 phba->cfg_hba_queue_depth, length);
7742 phba->cfg_hba_queue_depth = length;
7743 }
912e3acd
JS
7744
7745 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7746 LPFC_SLI_INTF_IF_TYPE_2)
7747 goto read_cfg_out;
7748
7749 /* get the pf# and vf# for SLI4 if_type 2 port */
7750 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7751 sizeof(struct lpfc_sli4_cfg_mhdr));
7752 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7753 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7754 length, LPFC_SLI4_MBX_EMBED);
7755
8aa134a8 7756 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS
7757 shdr = (union lpfc_sli4_cfg_shdr *)
7758 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7759 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7760 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7761 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS
7762 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7763 "3026 Mailbox failed , mbxCmd x%x "
7764 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7765 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7766 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS
7767 goto read_cfg_out;
7768 }
7769
7770 /* search for fc_fcoe resrouce descriptor */
7771 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7772
8aa134a8
JS
7773 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7774 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7775 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7776 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7777 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7778 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7779 goto read_cfg_out;
7780
912e3acd 7781 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7782 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7783 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7784 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS
7785 phba->sli4_hba.iov.pf_number =
7786 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7787 phba->sli4_hba.iov.vf_number =
7788 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7789 break;
7790 }
7791 }
7792
7793 if (i < LPFC_RSRC_DESC_MAX_NUM)
7794 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7795 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7796 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7797 phba->sli4_hba.iov.vf_number);
8aa134a8 7798 else
912e3acd
JS
7799 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7800 "3028 GET_FUNCTION_CONFIG: failed to find "
7801 "Resrouce Descriptor:x%x\n",
7802 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS
7803
7804read_cfg_out:
7805 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7806 return rc;
3772a991
JS
7807}
7808
7809/**
2fcee4bf 7810 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS
7811 * @phba: pointer to lpfc hba data structure.
7812 *
2fcee4bf
JS
7813 * This routine is invoked to setup the port-side endian order when
7814 * the port if_type is 0. This routine has no function for other
7815 * if_types.
da0436e9
JS
7816 *
7817 * Return codes
af901ca1 7818 * 0 - successful
25985edc 7819 * -ENOMEM - No available memory
d439d286 7820 * -EIO - The mailbox failed to complete successfully.
3772a991 7821 **/
da0436e9
JS
7822static int
7823lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7824{
da0436e9 7825 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7826 uint32_t if_type, rc = 0;
da0436e9
JS
7827 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7828 HOST_ENDIAN_HIGH_WORD1};
3772a991 7829
2fcee4bf
JS
7830 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7831 switch (if_type) {
7832 case LPFC_SLI_INTF_IF_TYPE_0:
7833 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7834 GFP_KERNEL);
7835 if (!mboxq) {
7836 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7837 "0492 Unable to allocate memory for "
7838 "issuing SLI_CONFIG_SPECIAL mailbox "
7839 "command\n");
7840 return -ENOMEM;
7841 }
3772a991 7842
2fcee4bf
JS
7843 /*
7844 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7845 * two words to contain special data values and no other data.
7846 */
7847 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7848 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7849 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7850 if (rc != MBX_SUCCESS) {
7851 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7852 "0493 SLI_CONFIG_SPECIAL mailbox "
7853 "failed with status x%x\n",
7854 rc);
7855 rc = -EIO;
7856 }
7857 mempool_free(mboxq, phba->mbox_mem_pool);
7858 break;
7859 case LPFC_SLI_INTF_IF_TYPE_2:
7860 case LPFC_SLI_INTF_IF_TYPE_1:
7861 default:
7862 break;
da0436e9 7863 }
da0436e9 7864 return rc;
3772a991
JS
7865}
7866
7867/**
895427bd 7868 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS
7869 * @phba: pointer to lpfc hba data structure.
7870 *
895427bd
JS
7871 * This routine is invoked to check the user settable queue counts for EQs.
7872 * After this routine is called the counts will be set to valid values that
5350d872
JS
7873 * adhere to the constraints of the system's interrupt vectors and the port's
7874 * queue resources.
da0436e9
JS
7875 *
7876 * Return codes
af901ca1 7877 * 0 - successful
25985edc 7878 * -ENOMEM - No available memory
3772a991 7879 **/
da0436e9 7880static int
5350d872 7881lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7882{
895427bd 7883 int io_channel;
1ba981fd 7884 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7885
da0436e9 7886 /*
67d12733 7887 * Sanity check for configured queue parameters against the run-time
da0436e9
JS
7888 * device parameters
7889 */
3772a991 7890
67d12733 7891 /* Sanity check on HBA EQ parameters */
895427bd 7892 io_channel = phba->io_channel_irqs;
67d12733 7893
895427bd 7894 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS
7895 lpfc_printf_log(phba,
7896 KERN_ERR, LOG_INIT,
90695ee0 7897 "3188 Reducing IO channels to match number of "
7bb03bbf 7898 "online CPUs: from %d to %d\n",
895427bd
JS
7899 io_channel, phba->sli4_hba.num_online_cpu);
7900 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS
7901 }
7902
895427bd 7903 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS
7904 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7905 "2575 Reducing IO channels to match number of "
7906 "available EQs: from %d to %d\n",
895427bd 7907 io_channel,
82c3e9ba 7908 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7909 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7910 }
67d12733 7911
895427bd
JS
7912 /* The actual number of FCP / NVME event queues adopted */
7913 if (io_channel != phba->io_channel_irqs)
7914 phba->io_channel_irqs = io_channel;
7915 if (phba->cfg_fcp_io_channel > io_channel)
7916 phba->cfg_fcp_io_channel = io_channel;
7917 if (phba->cfg_nvme_io_channel > io_channel)
7918 phba->cfg_nvme_io_channel = io_channel;
2d7dbc4c
JS
7919 if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq)
7920 phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
895427bd
JS
7921
7922 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2d7dbc4c 7923 "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n",
895427bd 7924 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
2d7dbc4c 7925 phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq);
3772a991 7926
da0436e9
JS
7927 /* Get EQ depth from module parameter, fake the default for now */
7928 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7929 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7930
5350d872
JS
7931 /* Get CQ depth from module parameter, fake the default for now */
7932 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7933 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS
7934 return 0;
7935}
7936
7937static int
7938lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7939{
7940 struct lpfc_queue *qdesc;
7941 int cnt;
5350d872 7942
895427bd
JS
7943 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7944 phba->sli4_hba.cq_ecount);
7945 if (!qdesc) {
7946 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7947 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7948 wqidx);
7949 return 1;
7950 }
7951 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
7952
7953 cnt = LPFC_NVME_WQSIZE;
7954 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_WQE128_SIZE, cnt);
7955 if (!qdesc) {
7956 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7957 "0509 Failed allocate fast-path NVME WQ (%d)\n",
7958 wqidx);
7959 return 1;
7960 }
7961 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
7962 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7963 return 0;
7964}
7965
7966static int
7967lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
7968{
7969 struct lpfc_queue *qdesc;
7970 uint32_t wqesize;
7971
7972 /* Create Fast Path FCP CQs */
7973 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7974 phba->sli4_hba.cq_ecount);
7975 if (!qdesc) {
7976 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7977 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
7978 return 1;
7979 }
7980 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
7981
7982 /* Create Fast Path FCP WQs */
7983 wqesize = (phba->fcp_embed_io) ?
d1f525aa 7984 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
895427bd
JS
7985 qdesc = lpfc_sli4_queue_alloc(phba, wqesize, phba->sli4_hba.wq_ecount);
7986 if (!qdesc) {
7987 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7988 "0503 Failed allocate fast-path FCP WQ (%d)\n",
7989 wqidx);
7990 return 1;
7991 }
7992 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
7993 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 7994 return 0;
5350d872
JS
7995}
7996
7997/**
7998 * lpfc_sli4_queue_create - Create all the SLI4 queues
7999 * @phba: pointer to lpfc hba data structure.
8000 *
8001 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
8002 * operation. For each SLI4 queue type, the parameters such as queue entry
8003 * count (queue depth) shall be taken from the module parameter. For now,
8004 * we just use some constant number as place holder.
8005 *
8006 * Return codes
4907cb7b 8007 * 0 - successful
5350d872
JS
8008 * -ENOMEM - No availble memory
8009 * -EIO - The mailbox failed to complete successfully.
8010 **/
8011int
8012lpfc_sli4_queue_create(struct lpfc_hba *phba)
8013{
8014 struct lpfc_queue *qdesc;
d1f525aa 8015 int idx, io_channel;
5350d872
JS
8016
8017 /*
67d12733 8018 * Create HBA Record arrays.
895427bd 8019 * Both NVME and FCP will share that same vectors / EQs
5350d872 8020 */
895427bd
JS
8021 io_channel = phba->io_channel_irqs;
8022 if (!io_channel)
67d12733 8023 return -ERANGE;
5350d872 8024
67d12733
JS
8025 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
8026 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
8027 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
8028 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
8029 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
8030 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS
8031 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8032 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
8033 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8034 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 8035
895427bd
JS
8036 phba->sli4_hba.hba_eq = kcalloc(io_channel,
8037 sizeof(struct lpfc_queue *),
8038 GFP_KERNEL);
67d12733
JS
8039 if (!phba->sli4_hba.hba_eq) {
8040 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8041 "2576 Failed allocate memory for "
8042 "fast-path EQ record array\n");
8043 goto out_error;
8044 }
8045
895427bd
JS
8046 if (phba->cfg_fcp_io_channel) {
8047 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
8048 sizeof(struct lpfc_queue *),
8049 GFP_KERNEL);
8050 if (!phba->sli4_hba.fcp_cq) {
8051 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8052 "2577 Failed allocate memory for "
8053 "fast-path CQ record array\n");
8054 goto out_error;
8055 }
8056 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
8057 sizeof(struct lpfc_queue *),
8058 GFP_KERNEL);
8059 if (!phba->sli4_hba.fcp_wq) {
8060 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8061 "2578 Failed allocate memory for "
8062 "fast-path FCP WQ record array\n");
8063 goto out_error;
8064 }
8065 /*
8066 * Since the first EQ can have multiple CQs associated with it,
8067 * this array is used to quickly see if we have a FCP fast-path
8068 * CQ match.
8069 */
8070 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
8071 sizeof(uint16_t),
8072 GFP_KERNEL);
8073 if (!phba->sli4_hba.fcp_cq_map) {
8074 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8075 "2545 Failed allocate memory for "
8076 "fast-path CQ map\n");
8077 goto out_error;
8078 }
67d12733
JS
8079 }
8080
895427bd
JS
8081 if (phba->cfg_nvme_io_channel) {
8082 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
8083 sizeof(struct lpfc_queue *),
8084 GFP_KERNEL);
8085 if (!phba->sli4_hba.nvme_cq) {
8086 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8087 "6077 Failed allocate memory for "
8088 "fast-path CQ record array\n");
8089 goto out_error;
8090 }
da0436e9 8091
895427bd
JS
8092 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
8093 sizeof(struct lpfc_queue *),
8094 GFP_KERNEL);
8095 if (!phba->sli4_hba.nvme_wq) {
8096 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8097 "2581 Failed allocate memory for "
8098 "fast-path NVME WQ record array\n");
8099 goto out_error;
8100 }
8101
8102 /*
8103 * Since the first EQ can have multiple CQs associated with it,
8104 * this array is used to quickly see if we have a NVME fast-path
8105 * CQ match.
8106 */
8107 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
8108 sizeof(uint16_t),
8109 GFP_KERNEL);
8110 if (!phba->sli4_hba.nvme_cq_map) {
8111 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8112 "6078 Failed allocate memory for "
8113 "fast-path CQ map\n");
8114 goto out_error;
8115 }
2d7dbc4c
JS
8116
8117 if (phba->nvmet_support) {
8118 phba->sli4_hba.nvmet_cqset = kcalloc(
8119 phba->cfg_nvmet_mrq,
8120 sizeof(struct lpfc_queue *),
8121 GFP_KERNEL);
8122 if (!phba->sli4_hba.nvmet_cqset) {
8123 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8124 "3121 Fail allocate memory for "
8125 "fast-path CQ set array\n");
8126 goto out_error;
8127 }
8128 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
8129 phba->cfg_nvmet_mrq,
8130 sizeof(struct lpfc_queue *),
8131 GFP_KERNEL);
8132 if (!phba->sli4_hba.nvmet_mrq_hdr) {
8133 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8134 "3122 Fail allocate memory for "
8135 "fast-path RQ set hdr array\n");
8136 goto out_error;
8137 }
8138 phba->sli4_hba.nvmet_mrq_data = kcalloc(
8139 phba->cfg_nvmet_mrq,
8140 sizeof(struct lpfc_queue *),
8141 GFP_KERNEL);
8142 if (!phba->sli4_hba.nvmet_mrq_data) {
8143 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8144 "3124 Fail allocate memory for "
8145 "fast-path RQ set data array\n");
8146 goto out_error;
8147 }
8148 }
da0436e9 8149 }
67d12733 8150
895427bd 8151 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 8152
895427bd
JS
8153 /* Create HBA Event Queues (EQs) */
8154 for (idx = 0; idx < io_channel; idx++) {
67d12733 8155 /* Create EQs */
da0436e9
JS
8156 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
8157 phba->sli4_hba.eq_ecount);
8158 if (!qdesc) {
8159 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS
8160 "0497 Failed allocate EQ (%d)\n", idx);
8161 goto out_error;
da0436e9 8162 }
67d12733 8163 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 8164 }
67d12733 8165
895427bd 8166 /* FCP and NVME io channels are not required to be balanced */
67d12733 8167
895427bd
JS
8168 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
8169 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 8170 goto out_error;
da0436e9 8171
895427bd
JS
8172 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
8173 if (lpfc_alloc_nvme_wq_cq(phba, idx))
8174 goto out_error;
67d12733 8175
2d7dbc4c
JS
8176 if (phba->nvmet_support) {
8177 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8178 qdesc = lpfc_sli4_queue_alloc(phba,
8179 phba->sli4_hba.cq_esize,
8180 phba->sli4_hba.cq_ecount);
8181 if (!qdesc) {
8182 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8183 "3142 Failed allocate NVME "
8184 "CQ Set (%d)\n", idx);
8185 goto out_error;
8186 }
8187 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
8188 }
8189 }
8190
da0436e9 8191 /*
67d12733 8192 * Create Slow Path Completion Queues (CQs)
da0436e9
JS
8193 */
8194
da0436e9
JS
8195 /* Create slow-path Mailbox Command Complete Queue */
8196 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8197 phba->sli4_hba.cq_ecount);
8198 if (!qdesc) {
8199 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8200 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 8201 goto out_error;
da0436e9
JS
8202 }
8203 phba->sli4_hba.mbx_cq = qdesc;
8204
8205 /* Create slow-path ELS Complete Queue */
8206 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8207 phba->sli4_hba.cq_ecount);
8208 if (!qdesc) {
8209 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8210 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 8211 goto out_error;
da0436e9
JS
8212 }
8213 phba->sli4_hba.els_cq = qdesc;
8214
da0436e9 8215
5350d872 8216 /*
67d12733 8217 * Create Slow Path Work Queues (WQs)
5350d872 8218 */
da0436e9
JS
8219
8220 /* Create Mailbox Command Queue */
da0436e9
JS
8221
8222 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.mq_esize,
8223 phba->sli4_hba.mq_ecount);
8224 if (!qdesc) {
8225 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8226 "0505 Failed allocate slow-path MQ\n");
67d12733 8227 goto out_error;
da0436e9
JS
8228 }
8229 phba->sli4_hba.mbx_wq = qdesc;
8230
8231 /*
67d12733 8232 * Create ELS Work Queues
da0436e9 8233 */
da0436e9
JS
8234
8235 /* Create slow-path ELS Work Queue */
8236 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8237 phba->sli4_hba.wq_ecount);
8238 if (!qdesc) {
8239 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8240 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8241 goto out_error;
da0436e9
JS
8242 }
8243 phba->sli4_hba.els_wq = qdesc;
895427bd
JS
8244 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8245
8246 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8247 /* Create NVME LS Complete Queue */
8248 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8249 phba->sli4_hba.cq_ecount);
8250 if (!qdesc) {
8251 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8252 "6079 Failed allocate NVME LS CQ\n");
8253 goto out_error;
8254 }
8255 phba->sli4_hba.nvmels_cq = qdesc;
8256
8257 /* Create NVME LS Work Queue */
8258 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8259 phba->sli4_hba.wq_ecount);
8260 if (!qdesc) {
8261 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8262 "6080 Failed allocate NVME LS WQ\n");
8263 goto out_error;
8264 }
8265 phba->sli4_hba.nvmels_wq = qdesc;
8266 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8267 }
da0436e9 8268
da0436e9
JS
8269 /*
8270 * Create Receive Queue (RQ)
8271 */
da0436e9
JS
8272
8273 /* Create Receive Queue for header */
8274 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8275 phba->sli4_hba.rq_ecount);
8276 if (!qdesc) {
8277 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8278 "0506 Failed allocate receive HRQ\n");
67d12733 8279 goto out_error;
da0436e9
JS
8280 }
8281 phba->sli4_hba.hdr_rq = qdesc;
8282
8283 /* Create Receive Queue for data */
8284 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8285 phba->sli4_hba.rq_ecount);
8286 if (!qdesc) {
8287 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8288 "0507 Failed allocate receive DRQ\n");
67d12733 8289 goto out_error;
da0436e9
JS
8290 }
8291 phba->sli4_hba.dat_rq = qdesc;
8292
2d7dbc4c
JS
8293 if (phba->nvmet_support) {
8294 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8295 /* Create NVMET Receive Queue for header */
8296 qdesc = lpfc_sli4_queue_alloc(phba,
8297 phba->sli4_hba.rq_esize,
61f3d4bf 8298 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS
8299 if (!qdesc) {
8300 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8301 "3146 Failed allocate "
8302 "receive HRQ\n");
8303 goto out_error;
8304 }
8305 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
8306
8307 /* Only needed for header of RQ pair */
8308 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
8309 GFP_KERNEL);
8310 if (qdesc->rqbp == NULL) {
8311 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8312 "6131 Failed allocate "
8313 "Header RQBP\n");
8314 goto out_error;
8315 }
8316
4b40d02b
DK
8317 /* Put list in known state in case driver load fails. */
8318 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
8319
2d7dbc4c
JS
8320 /* Create NVMET Receive Queue for data */
8321 qdesc = lpfc_sli4_queue_alloc(phba,
8322 phba->sli4_hba.rq_esize,
61f3d4bf 8323 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS
8324 if (!qdesc) {
8325 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8326 "3156 Failed allocate "
8327 "receive DRQ\n");
8328 goto out_error;
8329 }
8330 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
8331 }
8332 }
8333
1ba981fd
JS
8334 /* Create the Queues needed for Flash Optimized Fabric operations */
8335 if (phba->cfg_fof)
8336 lpfc_fof_queue_create(phba);
da0436e9
JS
8337 return 0;
8338
da0436e9 8339out_error:
67d12733 8340 lpfc_sli4_queue_destroy(phba);
da0436e9
JS
8341 return -ENOMEM;
8342}
8343
895427bd
JS
8344static inline void
8345__lpfc_sli4_release_queue(struct lpfc_queue **qp)
8346{
8347 if (*qp != NULL) {
8348 lpfc_sli4_queue_free(*qp);
8349 *qp = NULL;
8350 }
8351}
8352
8353static inline void
8354lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
8355{
8356 int idx;
8357
8358 if (*qs == NULL)
8359 return;
8360
8361 for (idx = 0; idx < max; idx++)
8362 __lpfc_sli4_release_queue(&(*qs)[idx]);
8363
8364 kfree(*qs);
8365 *qs = NULL;
8366}
8367
8368static inline void
8369lpfc_sli4_release_queue_map(uint16_t **qmap)
8370{
8371 if (*qmap != NULL) {
8372 kfree(*qmap);
8373 *qmap = NULL;
8374 }
8375}
8376
da0436e9
JS
8377/**
8378 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
8379 * @phba: pointer to lpfc hba data structure.
8380 *
8381 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
8382 * operation.
8383 *
8384 * Return codes
af901ca1 8385 * 0 - successful
25985edc 8386 * -ENOMEM - No available memory
d439d286 8387 * -EIO - The mailbox failed to complete successfully.
da0436e9 8388 **/
5350d872 8389void
da0436e9
JS
8390lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
8391{
1ba981fd
JS
8392 if (phba->cfg_fof)
8393 lpfc_fof_queue_destroy(phba);
8394
895427bd
JS
8395 /* Release HBA eqs */
8396 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
8397
8398 /* Release FCP cqs */
8399 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
d1f525aa 8400 phba->cfg_fcp_io_channel);
895427bd
JS
8401
8402 /* Release FCP wqs */
8403 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
d1f525aa 8404 phba->cfg_fcp_io_channel);
895427bd
JS
8405
8406 /* Release FCP CQ mapping array */
8407 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
8408
8409 /* Release NVME cqs */
8410 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
8411 phba->cfg_nvme_io_channel);
8412
8413 /* Release NVME wqs */
8414 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
8415 phba->cfg_nvme_io_channel);
8416
8417 /* Release NVME CQ mapping array */
8418 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
8419
2d7dbc4c
JS
8420 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
8421 phba->cfg_nvmet_mrq);
8422
8423 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
8424 phba->cfg_nvmet_mrq);
8425 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
8426 phba->cfg_nvmet_mrq);
8427
895427bd
JS
8428 /* Release mailbox command work queue */
8429 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
8430
8431 /* Release ELS work queue */
8432 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
8433
8434 /* Release ELS work queue */
8435 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
8436
8437 /* Release unsolicited receive queue */
8438 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
8439 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
8440
8441 /* Release ELS complete queue */
8442 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
8443
8444 /* Release NVME LS complete queue */
8445 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
8446
8447 /* Release mailbox command complete queue */
8448 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
8449
8450 /* Everything on this list has been freed */
8451 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8452}
8453
895427bd
JS
8454int
8455lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
8456{
8457 struct lpfc_rqb *rqbp;
8458 struct lpfc_dmabuf *h_buf;
8459 struct rqb_dmabuf *rqb_buffer;
8460
8461 rqbp = rq->rqbp;
8462 while (!list_empty(&rqbp->rqb_buffer_list)) {
8463 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
8464 struct lpfc_dmabuf, list);
8465
8466 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
8467 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8468 rqbp->buffer_count--;
67d12733 8469 }
895427bd
JS
8470 return 1;
8471}
67d12733 8472
895427bd
JS
8473static int
8474lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
8475 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
8476 int qidx, uint32_t qtype)
8477{
8478 struct lpfc_sli_ring *pring;
8479 int rc;
8480
8481 if (!eq || !cq || !wq) {
8482 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8483 "6085 Fast-path %s (%d) not allocated\n",
8484 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
8485 return -ENOMEM;
8486 }
8487
8488 /* create the Cq first */
8489 rc = lpfc_cq_create(phba, cq, eq,
8490 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
8491 if (rc) {
8492 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8493 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
8494 qidx, (uint32_t)rc);
8495 return rc;
67d12733
JS
8496 }
8497
895427bd
JS
8498 if (qtype != LPFC_MBOX) {
8499 /* Setup nvme_cq_map for fast lookup */
8500 if (cq_map)
8501 *cq_map = cq->queue_id;
da0436e9 8502
895427bd
JS
8503 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8504 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8505 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8506
895427bd
JS
8507 /* create the wq */
8508 rc = lpfc_wq_create(phba, wq, cq, qtype);
8509 if (rc) {
8510 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8511 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8512 qidx, (uint32_t)rc);
8513 /* no need to tear down cq - caller will do so */
8514 return rc;
8515 }
da0436e9 8516
895427bd
JS
8517 /* Bind this CQ/WQ to the NVME ring */
8518 pring = wq->pring;
8519 pring->sli.sli4.wqp = (void *)wq;
8520 cq->pring = pring;
da0436e9 8521
895427bd
JS
8522 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8523 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8524 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8525 } else {
8526 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8527 if (rc) {
8528 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8529 "0539 Failed setup of slow-path MQ: "
8530 "rc = 0x%x\n", rc);
8531 /* no need to tear down cq - caller will do so */
8532 return rc;
8533 }
da0436e9 8534
895427bd
JS
8535 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8536 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8537 phba->sli4_hba.mbx_wq->queue_id,
8538 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8539 }
da0436e9 8540
895427bd 8541 return 0;
da0436e9
JS
8542}
8543
8544/**
8545 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8546 * @phba: pointer to lpfc hba data structure.
8547 *
8548 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8549 * operation.
8550 *
8551 * Return codes
af901ca1 8552 * 0 - successful
25985edc 8553 * -ENOMEM - No available memory
d439d286 8554 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8555 **/
8556int
8557lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8558{
962bc51b
JS
8559 uint32_t shdr_status, shdr_add_status;
8560 union lpfc_sli4_cfg_shdr *shdr;
8561 LPFC_MBOXQ_t *mboxq;
895427bd
JS
8562 int qidx;
8563 uint32_t length, io_channel;
8564 int rc = -ENOMEM;
962bc51b
JS
8565
8566 /* Check for dual-ULP support */
8567 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8568 if (!mboxq) {
8569 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8570 "3249 Unable to allocate memory for "
8571 "QUERY_FW_CFG mailbox command\n");
8572 return -ENOMEM;
8573 }
8574 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8575 sizeof(struct lpfc_sli4_cfg_mhdr));
8576 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8577 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8578 length, LPFC_SLI4_MBX_EMBED);
8579
8580 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8581
8582 shdr = (union lpfc_sli4_cfg_shdr *)
8583 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8584 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8585 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8586 if (shdr_status || shdr_add_status || rc) {
8587 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8588 "3250 QUERY_FW_CFG mailbox failed with status "
8589 "x%x add_status x%x, mbx status x%x\n",
8590 shdr_status, shdr_add_status, rc);
8591 if (rc != MBX_TIMEOUT)
8592 mempool_free(mboxq, phba->mbox_mem_pool);
8593 rc = -ENXIO;
8594 goto out_error;
8595 }
8596
8597 phba->sli4_hba.fw_func_mode =
8598 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8599 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8600 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS
8601 phba->sli4_hba.physical_port =
8602 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS
8603 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8604 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8605 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8606 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8607
8608 if (rc != MBX_TIMEOUT)
8609 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS
8610
8611 /*
67d12733 8612 * Set up HBA Event Queues (EQs)
da0436e9 8613 */
895427bd 8614 io_channel = phba->io_channel_irqs;
da0436e9 8615
67d12733 8616 /* Set up HBA event queue */
895427bd 8617 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS
8618 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8619 "3147 Fast-path EQs not allocated\n");
1b51197d 8620 rc = -ENOMEM;
67d12733 8621 goto out_error;
2e90f4b5 8622 }
895427bd
JS
8623 for (qidx = 0; qidx < io_channel; qidx++) {
8624 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS
8625 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8626 "0522 Fast-path EQ (%d) not "
895427bd 8627 "allocated\n", qidx);
1b51197d 8628 rc = -ENOMEM;
895427bd 8629 goto out_destroy;
da0436e9 8630 }
895427bd
JS
8631 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8632 phba->cfg_fcp_imax);
da0436e9
JS
8633 if (rc) {
8634 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8635 "0523 Failed setup of fast-path EQ "
895427bd 8636 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8637 (uint32_t)rc);
895427bd 8638 goto out_destroy;
da0436e9
JS
8639 }
8640 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS
8641 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8642 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS
8643 }
8644
895427bd
JS
8645 if (phba->cfg_nvme_io_channel) {
8646 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8647 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8648 "6084 Fast-path NVME %s array not allocated\n",
8649 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8650 rc = -ENOMEM;
895427bd 8651 goto out_destroy;
67d12733
JS
8652 }
8653
895427bd
JS
8654 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8655 rc = lpfc_create_wq_cq(phba,
8656 phba->sli4_hba.hba_eq[
8657 qidx % io_channel],
8658 phba->sli4_hba.nvme_cq[qidx],
8659 phba->sli4_hba.nvme_wq[qidx],
8660 &phba->sli4_hba.nvme_cq_map[qidx],
8661 qidx, LPFC_NVME);
8662 if (rc) {
8663 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8664 "6123 Failed to setup fastpath "
8665 "NVME WQ/CQ (%d), rc = 0x%x\n",
8666 qidx, (uint32_t)rc);
8667 goto out_destroy;
8668 }
8669 }
67d12733
JS
8670 }
8671
895427bd
JS
8672 if (phba->cfg_fcp_io_channel) {
8673 /* Set up fast-path FCP Response Complete Queue */
8674 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8675 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8676 "3148 Fast-path FCP %s array not allocated\n",
8677 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8678 rc = -ENOMEM;
895427bd 8679 goto out_destroy;
67d12733
JS
8680 }
8681
895427bd
JS
8682 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8683 rc = lpfc_create_wq_cq(phba,
8684 phba->sli4_hba.hba_eq[
8685 qidx % io_channel],
8686 phba->sli4_hba.fcp_cq[qidx],
8687 phba->sli4_hba.fcp_wq[qidx],
8688 &phba->sli4_hba.fcp_cq_map[qidx],
8689 qidx, LPFC_FCP);
8690 if (rc) {
8691 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8692 "0535 Failed to setup fastpath "
8693 "FCP WQ/CQ (%d), rc = 0x%x\n",
8694 qidx, (uint32_t)rc);
8695 goto out_destroy;
8696 }
8697 }
67d12733 8698 }
895427bd 8699
da0436e9 8700 /*
895427bd 8701 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS
8702 */
8703
895427bd 8704 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8705
895427bd 8706 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8707 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8708 "0528 %s not allocated\n",
8709 phba->sli4_hba.mbx_cq ?
d1f525aa 8710 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8711 rc = -ENOMEM;
895427bd 8712 goto out_destroy;
da0436e9 8713 }
da0436e9 8714
895427bd 8715 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
d1f525aa
JS
8716 phba->sli4_hba.mbx_cq,
8717 phba->sli4_hba.mbx_wq,
8718 NULL, 0, LPFC_MBOX);
da0436e9
JS
8719 if (rc) {
8720 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8721 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8722 (uint32_t)rc);
8723 goto out_destroy;
da0436e9 8724 }
2d7dbc4c
JS
8725 if (phba->nvmet_support) {
8726 if (!phba->sli4_hba.nvmet_cqset) {
8727 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8728 "3165 Fast-path NVME CQ Set "
8729 "array not allocated\n");
8730 rc = -ENOMEM;
8731 goto out_destroy;
8732 }
8733 if (phba->cfg_nvmet_mrq > 1) {
8734 rc = lpfc_cq_create_set(phba,
8735 phba->sli4_hba.nvmet_cqset,
8736 phba->sli4_hba.hba_eq,
8737 LPFC_WCQ, LPFC_NVMET);
8738 if (rc) {
8739 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8740 "3164 Failed setup of NVME CQ "
8741 "Set, rc = 0x%x\n",
8742 (uint32_t)rc);
8743 goto out_destroy;
8744 }
8745 } else {
8746 /* Set up NVMET Receive Complete Queue */
8747 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
8748 phba->sli4_hba.hba_eq[0],
8749 LPFC_WCQ, LPFC_NVMET);
8750 if (rc) {
8751 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8752 "6089 Failed setup NVMET CQ: "
8753 "rc = 0x%x\n", (uint32_t)rc);
8754 goto out_destroy;
8755 }
8756 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8757 "6090 NVMET CQ setup: cq-id=%d, "
8758 "parent eq-id=%d\n",
8759 phba->sli4_hba.nvmet_cqset[0]->queue_id,
8760 phba->sli4_hba.hba_eq[0]->queue_id);
8761 }
8762 }
da0436e9 8763
895427bd
JS
8764 /* Set up slow-path ELS WQ/CQ */
8765 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8766 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8767 "0530 ELS %s not allocated\n",
8768 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8769 rc = -ENOMEM;
895427bd 8770 goto out_destroy;
da0436e9 8771 }
895427bd
JS
8772 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8773 phba->sli4_hba.els_cq,
8774 phba->sli4_hba.els_wq,
8775 NULL, 0, LPFC_ELS);
da0436e9
JS
8776 if (rc) {
8777 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8778 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8779 (uint32_t)rc);
8780 goto out_destroy;
da0436e9
JS
8781 }
8782 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8783 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8784 phba->sli4_hba.els_wq->queue_id,
8785 phba->sli4_hba.els_cq->queue_id);
8786
895427bd
JS
8787 if (phba->cfg_nvme_io_channel) {
8788 /* Set up NVME LS Complete Queue */
8789 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8790 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8791 "6091 LS %s not allocated\n",
8792 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8793 rc = -ENOMEM;
8794 goto out_destroy;
8795 }
8796 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8797 phba->sli4_hba.nvmels_cq,
8798 phba->sli4_hba.nvmels_wq,
8799 NULL, 0, LPFC_NVME_LS);
8800 if (rc) {
8801 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8802 "0529 Failed setup of NVVME LS WQ/CQ: "
8803 "rc = 0x%x\n", (uint32_t)rc);
8804 goto out_destroy;
8805 }
8806
8807 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8808 "6096 ELS WQ setup: wq-id=%d, "
8809 "parent cq-id=%d\n",
8810 phba->sli4_hba.nvmels_wq->queue_id,
8811 phba->sli4_hba.nvmels_cq->queue_id);
8812 }
8813
2d7dbc4c
JS
8814 /*
8815 * Create NVMET Receive Queue (RQ)
8816 */
8817 if (phba->nvmet_support) {
8818 if ((!phba->sli4_hba.nvmet_cqset) ||
8819 (!phba->sli4_hba.nvmet_mrq_hdr) ||
8820 (!phba->sli4_hba.nvmet_mrq_data)) {
8821 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8822 "6130 MRQ CQ Queues not "
8823 "allocated\n");
8824 rc = -ENOMEM;
8825 goto out_destroy;
8826 }
8827 if (phba->cfg_nvmet_mrq > 1) {
8828 rc = lpfc_mrq_create(phba,
8829 phba->sli4_hba.nvmet_mrq_hdr,
8830 phba->sli4_hba.nvmet_mrq_data,
8831 phba->sli4_hba.nvmet_cqset,
8832 LPFC_NVMET);
8833 if (rc) {
8834 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8835 "6098 Failed setup of NVMET "
8836 "MRQ: rc = 0x%x\n",
8837 (uint32_t)rc);
8838 goto out_destroy;
8839 }
8840
8841 } else {
8842 rc = lpfc_rq_create(phba,
8843 phba->sli4_hba.nvmet_mrq_hdr[0],
8844 phba->sli4_hba.nvmet_mrq_data[0],
8845 phba->sli4_hba.nvmet_cqset[0],
8846 LPFC_NVMET);
8847 if (rc) {
8848 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8849 "6057 Failed setup of NVMET "
8850 "Receive Queue: rc = 0x%x\n",
8851 (uint32_t)rc);
8852 goto out_destroy;
8853 }
8854
8855 lpfc_printf_log(
8856 phba, KERN_INFO, LOG_INIT,
8857 "6099 NVMET RQ setup: hdr-rq-id=%d, "
8858 "dat-rq-id=%d parent cq-id=%d\n",
8859 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
8860 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
8861 phba->sli4_hba.nvmet_cqset[0]->queue_id);
8862
8863 }
8864 }
8865
da0436e9
JS
8866 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8867 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8868 "0540 Receive Queue not allocated\n");
1b51197d 8869 rc = -ENOMEM;
895427bd 8870 goto out_destroy;
da0436e9 8871 }
73d91e50 8872
da0436e9 8873 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8874 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS
8875 if (rc) {
8876 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8877 "0541 Failed setup of Receive Queue: "
a2fc4aef 8878 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8879 goto out_destroy;
da0436e9 8880 }
73d91e50 8881
da0436e9
JS
8882 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8883 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8884 "parent cq-id=%d\n",
8885 phba->sli4_hba.hdr_rq->queue_id,
8886 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8887 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS
8888
8889 if (phba->cfg_fof) {
8890 rc = lpfc_fof_queue_setup(phba);
8891 if (rc) {
8892 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8893 "0549 Failed setup of FOF Queues: "
8894 "rc = 0x%x\n", rc);
895427bd 8895 goto out_destroy;
1ba981fd
JS
8896 }
8897 }
2c9c5a00 8898
43140ca6 8899 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
0cf07f84
JS
8900 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
8901 phba->cfg_fcp_imax);
43140ca6 8902
da0436e9
JS
8903 return 0;
8904
895427bd
JS
8905out_destroy:
8906 lpfc_sli4_queue_unset(phba);
da0436e9
JS
8907out_error:
8908 return rc;
8909}
8910
8911/**
8912 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8913 * @phba: pointer to lpfc hba data structure.
8914 *
8915 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8916 * operation.
8917 *
8918 * Return codes
af901ca1 8919 * 0 - successful
25985edc 8920 * -ENOMEM - No available memory
d439d286 8921 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8922 **/
8923void
8924lpfc_sli4_queue_unset(struct lpfc_hba *phba)
8925{
895427bd 8926 int qidx;
da0436e9 8927
1ba981fd
JS
8928 /* Unset the queues created for Flash Optimized Fabric operations */
8929 if (phba->cfg_fof)
8930 lpfc_fof_queue_destroy(phba);
895427bd 8931
da0436e9 8932 /* Unset mailbox command work queue */
895427bd
JS
8933 if (phba->sli4_hba.mbx_wq)
8934 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
8935
8936 /* Unset NVME LS work queue */
8937 if (phba->sli4_hba.nvmels_wq)
8938 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
8939
da0436e9 8940 /* Unset ELS work queue */
019c0d66 8941 if (phba->sli4_hba.els_wq)
895427bd
JS
8942 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
8943
da0436e9 8944 /* Unset unsolicited receive queue */
895427bd
JS
8945 if (phba->sli4_hba.hdr_rq)
8946 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
8947 phba->sli4_hba.dat_rq);
8948
da0436e9 8949 /* Unset FCP work queue */
895427bd
JS
8950 if (phba->sli4_hba.fcp_wq)
8951 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8952 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
8953
8954 /* Unset NVME work queue */
8955 if (phba->sli4_hba.nvme_wq) {
8956 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8957 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 8958 }
895427bd 8959
da0436e9 8960 /* Unset mailbox command complete queue */
895427bd
JS
8961 if (phba->sli4_hba.mbx_cq)
8962 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
8963
da0436e9 8964 /* Unset ELS complete queue */
895427bd
JS
8965 if (phba->sli4_hba.els_cq)
8966 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
8967
8968 /* Unset NVME LS complete queue */
8969 if (phba->sli4_hba.nvmels_cq)
8970 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
8971
8972 /* Unset NVME response complete queue */
8973 if (phba->sli4_hba.nvme_cq)
8974 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8975 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
8976
2d7dbc4c
JS
8977 /* Unset NVMET MRQ queue */
8978 if (phba->sli4_hba.nvmet_mrq_hdr) {
8979 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8980 lpfc_rq_destroy(phba,
8981 phba->sli4_hba.nvmet_mrq_hdr[qidx],
8982 phba->sli4_hba.nvmet_mrq_data[qidx]);
8983 }
8984
8985 /* Unset NVMET CQ Set complete queue */
8986 if (phba->sli4_hba.nvmet_cqset) {
8987 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8988 lpfc_cq_destroy(phba,
8989 phba->sli4_hba.nvmet_cqset[qidx]);
8990 }
8991
da0436e9 8992 /* Unset FCP response complete queue */
895427bd
JS
8993 if (phba->sli4_hba.fcp_cq)
8994 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8995 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
8996
da0436e9 8997 /* Unset fast-path event queue */
895427bd
JS
8998 if (phba->sli4_hba.hba_eq)
8999 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
9000 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS
9001}
9002
9003/**
9004 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
9005 * @phba: pointer to lpfc hba data structure.
9006 *
9007 * This routine is invoked to allocate and set up a pool of completion queue
9008 * events. The body of the completion queue event is a completion queue entry
9009 * CQE. For now, this pool is used for the interrupt service routine to queue
9010 * the following HBA completion queue events for the worker thread to process:
9011 * - Mailbox asynchronous events
9012 * - Receive queue completion unsolicited events
9013 * Later, this can be used for all the slow-path events.
9014 *
9015 * Return codes
af901ca1 9016 * 0 - successful
25985edc 9017 * -ENOMEM - No available memory
da0436e9
JS
9018 **/
9019static int
9020lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
9021{
9022 struct lpfc_cq_event *cq_event;
9023 int i;
9024
9025 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
9026 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
9027 if (!cq_event)
9028 goto out_pool_create_fail;
9029 list_add_tail(&cq_event->list,
9030 &phba->sli4_hba.sp_cqe_event_pool);
9031 }
9032 return 0;
9033
9034out_pool_create_fail:
9035 lpfc_sli4_cq_event_pool_destroy(phba);
9036 return -ENOMEM;
9037}
9038
9039/**
9040 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
9041 * @phba: pointer to lpfc hba data structure.
9042 *
9043 * This routine is invoked to free the pool of completion queue events at
9044 * driver unload time. Note that, it is the responsibility of the driver
9045 * cleanup routine to free all the outstanding completion-queue events
9046 * allocated from this pool back into the pool before invoking this routine
9047 * to destroy the pool.
9048 **/
9049static void
9050lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
9051{
9052 struct lpfc_cq_event *cq_event, *next_cq_event;
9053
9054 list_for_each_entry_safe(cq_event, next_cq_event,
9055 &phba->sli4_hba.sp_cqe_event_pool, list) {
9056 list_del(&cq_event->list);
9057 kfree(cq_event);
9058 }
9059}
9060
9061/**
9062 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9063 * @phba: pointer to lpfc hba data structure.
9064 *
9065 * This routine is the lock free version of the API invoked to allocate a
9066 * completion-queue event from the free pool.
9067 *
9068 * Return: Pointer to the newly allocated completion-queue event if successful
9069 * NULL otherwise.
9070 **/
9071struct lpfc_cq_event *
9072__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9073{
9074 struct lpfc_cq_event *cq_event = NULL;
9075
9076 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
9077 struct lpfc_cq_event, list);
9078 return cq_event;
9079}
9080
9081/**
9082 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9083 * @phba: pointer to lpfc hba data structure.
9084 *
9085 * This routine is the lock version of the API invoked to allocate a
9086 * completion-queue event from the free pool.
9087 *
9088 * Return: Pointer to the newly allocated completion-queue event if successful
9089 * NULL otherwise.
9090 **/
9091struct lpfc_cq_event *
9092lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9093{
9094 struct lpfc_cq_event *cq_event;
9095 unsigned long iflags;
9096
9097 spin_lock_irqsave(&phba->hbalock, iflags);
9098 cq_event = __lpfc_sli4_cq_event_alloc(phba);
9099 spin_unlock_irqrestore(&phba->hbalock, iflags);
9100 return cq_event;
9101}
9102
9103/**
9104 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9105 * @phba: pointer to lpfc hba data structure.
9106 * @cq_event: pointer to the completion queue event to be freed.
9107 *
9108 * This routine is the lock free version of the API invoked to release a
9109 * completion-queue event back into the free pool.
9110 **/
9111void
9112__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9113 struct lpfc_cq_event *cq_event)
9114{
9115 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
9116}
9117
9118/**
9119 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9120 * @phba: pointer to lpfc hba data structure.
9121 * @cq_event: pointer to the completion queue event to be freed.
9122 *
9123 * This routine is the lock version of the API invoked to release a
9124 * completion-queue event back into the free pool.
9125 **/
9126void
9127lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9128 struct lpfc_cq_event *cq_event)
9129{
9130 unsigned long iflags;
9131 spin_lock_irqsave(&phba->hbalock, iflags);
9132 __lpfc_sli4_cq_event_release(phba, cq_event);
9133 spin_unlock_irqrestore(&phba->hbalock, iflags);
9134}
9135
9136/**
9137 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9138 * @phba: pointer to lpfc hba data structure.
9139 *
9140 * This routine is to free all the pending completion-queue events to the
9141 * back into the free pool for device reset.
9142 **/
9143static void
9144lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9145{
9146 LIST_HEAD(cqelist);
9147 struct lpfc_cq_event *cqe;
9148 unsigned long iflags;
9149
9150 /* Retrieve all the pending WCQEs from pending WCQE lists */
9151 spin_lock_irqsave(&phba->hbalock, iflags);
9152 /* Pending FCP XRI abort events */
9153 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9154 &cqelist);
9155 /* Pending ELS XRI abort events */
9156 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9157 &cqelist);
318083ad
JS
9158 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
9159 /* Pending NVME XRI abort events */
9160 list_splice_init(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue,
9161 &cqelist);
9162 }
da0436e9
JS
9163 /* Pending asynnc events */
9164 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9165 &cqelist);
9166 spin_unlock_irqrestore(&phba->hbalock, iflags);
9167
9168 while (!list_empty(&cqelist)) {
9169 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9170 lpfc_sli4_cq_event_release(phba, cqe);
9171 }
9172}
9173
9174/**
9175 * lpfc_pci_function_reset - Reset pci function.
9176 * @phba: pointer to lpfc hba data structure.
9177 *
9178 * This routine is invoked to request a PCI function reset. It will destroys
9179 * all resources assigned to the PCI function which originates this request.
9180 *
9181 * Return codes
af901ca1 9182 * 0 - successful
25985edc 9183 * -ENOMEM - No available memory
d439d286 9184 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
9185 **/
9186int
9187lpfc_pci_function_reset(struct lpfc_hba *phba)
9188{
9189 LPFC_MBOXQ_t *mboxq;
2fcee4bf 9190 uint32_t rc = 0, if_type;
da0436e9 9191 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS
9192 uint32_t rdy_chk;
9193 uint32_t port_reset = 0;
da0436e9 9194 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9195 struct lpfc_register reg_data;
2b81f942 9196 uint16_t devid;
da0436e9 9197
2fcee4bf
JS
9198 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9199 switch (if_type) {
9200 case LPFC_SLI_INTF_IF_TYPE_0:
9201 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9202 GFP_KERNEL);
9203 if (!mboxq) {
9204 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9205 "0494 Unable to allocate memory for "
9206 "issuing SLI_FUNCTION_RESET mailbox "
9207 "command\n");
9208 return -ENOMEM;
9209 }
da0436e9 9210
2fcee4bf
JS
9211 /* Setup PCI function reset mailbox-ioctl command */
9212 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9213 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9214 LPFC_SLI4_MBX_EMBED);
9215 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9216 shdr = (union lpfc_sli4_cfg_shdr *)
9217 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9218 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9219 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9220 &shdr->response);
9221 if (rc != MBX_TIMEOUT)
9222 mempool_free(mboxq, phba->mbox_mem_pool);
9223 if (shdr_status || shdr_add_status || rc) {
9224 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9225 "0495 SLI_FUNCTION_RESET mailbox "
9226 "failed with status x%x add_status x%x,"
9227 " mbx status x%x\n",
9228 shdr_status, shdr_add_status, rc);
9229 rc = -ENXIO;
9230 }
9231 break;
9232 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS
9233wait:
9234 /*
9235 * Poll the Port Status Register and wait for RDY for
9236 * up to 30 seconds. If the port doesn't respond, treat
9237 * it as an error.
9238 */
77d093fb 9239 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS
9240 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9241 STATUSregaddr, &reg_data.word0)) {
9242 rc = -ENODEV;
9243 goto out;
9244 }
9245 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9246 break;
9247 msleep(20);
9248 }
9249
9250 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9251 phba->work_status[0] = readl(
9252 phba->sli4_hba.u.if_type2.ERR1regaddr);
9253 phba->work_status[1] = readl(
9254 phba->sli4_hba.u.if_type2.ERR2regaddr);
9255 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9256 "2890 Port not ready, port status reg "
9257 "0x%x error 1=0x%x, error 2=0x%x\n",
9258 reg_data.word0,
9259 phba->work_status[0],
9260 phba->work_status[1]);
9261 rc = -ENODEV;
9262 goto out;
9263 }
9264
9265 if (!port_reset) {
9266 /*
9267 * Reset the port now
9268 */
2fcee4bf
JS
9269 reg_data.word0 = 0;
9270 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9271 LPFC_SLIPORT_LITTLE_ENDIAN);
9272 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9273 LPFC_SLIPORT_INIT_PORT);
9274 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
9275 CTRLregaddr);
8fcb8acd 9276 /* flush */
2b81f942
JS
9277 pci_read_config_word(phba->pcidev,
9278 PCI_DEVICE_ID, &devid);
2fcee4bf 9279
2f6fa2c9
JS
9280 port_reset = 1;
9281 msleep(20);
9282 goto wait;
9283 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
9284 rc = -ENODEV;
9285 goto out;
2fcee4bf
JS
9286 }
9287 break;
2f6fa2c9 9288
2fcee4bf
JS
9289 case LPFC_SLI_INTF_IF_TYPE_1:
9290 default:
9291 break;
da0436e9 9292 }
2fcee4bf 9293
73d91e50 9294out:
2fcee4bf 9295 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 9296 if (rc) {
229adb0e
JS
9297 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9298 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 9299 "try: echo fw_reset > board_mode\n");
2fcee4bf 9300 rc = -ENODEV;
229adb0e 9301 }
2fcee4bf 9302
da0436e9
JS
9303 return rc;
9304}
9305
da0436e9
JS
9306/**
9307 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
9308 * @phba: pointer to lpfc hba data structure.
9309 *
9310 * This routine is invoked to set up the PCI device memory space for device
9311 * with SLI-4 interface spec.
9312 *
9313 * Return codes
af901ca1 9314 * 0 - successful
da0436e9
JS
9315 * other values - error
9316 **/
9317static int
9318lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
9319{
9320 struct pci_dev *pdev;
9321 unsigned long bar0map_len, bar1map_len, bar2map_len;
9322 int error = -ENODEV;
2fcee4bf 9323 uint32_t if_type;
da0436e9
JS
9324
9325 /* Obtain PCI device reference */
9326 if (!phba->pcidev)
9327 return error;
9328 else
9329 pdev = phba->pcidev;
9330
9331 /* Set the device DMA mask size */
8e68597d
MR
9332 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
9333 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
9334 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
9335 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 9336 return error;
8e68597d
MR
9337 }
9338 }
da0436e9 9339
2fcee4bf
JS
9340 /*
9341 * The BARs and register set definitions and offset locations are
9342 * dependent on the if_type.
9343 */
9344 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
9345 &phba->sli4_hba.sli_intf.word0)) {
9346 return error;
9347 }
9348
9349 /* There is no SLI3 failback for SLI4 devices. */
9350 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
9351 LPFC_SLI_INTF_VALID) {
9352 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9353 "2894 SLI_INTF reg contents invalid "
9354 "sli_intf reg 0x%x\n",
9355 phba->sli4_hba.sli_intf.word0);
9356 return error;
9357 }
9358
9359 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9360 /*
9361 * Get the bus address of SLI4 device Bar regions and the
9362 * number of bytes required by each mapping. The mapping of the
9363 * particular PCI BARs regions is dependent on the type of
9364 * SLI4 device.
da0436e9 9365 */
f5ca6f2e
JS
9366 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
9367 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
9368 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS
9369
9370 /*
9371 * Map SLI4 PCI Config Space Register base to a kernel virtual
9372 * addr
9373 */
9374 phba->sli4_hba.conf_regs_memmap_p =
9375 ioremap(phba->pci_bar0_map, bar0map_len);
9376 if (!phba->sli4_hba.conf_regs_memmap_p) {
9377 dev_printk(KERN_ERR, &pdev->dev,
9378 "ioremap failed for SLI4 PCI config "
9379 "registers.\n");
9380 goto out;
9381 }
f5ca6f2e 9382 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS
9383 /* Set up BAR0 PCI config space register memory map */
9384 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS
9385 } else {
9386 phba->pci_bar0_map = pci_resource_start(pdev, 1);
9387 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS
9388 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
9389 dev_printk(KERN_ERR, &pdev->dev,
9390 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
9391 goto out;
9392 }
9393 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 9394 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS
9395 if (!phba->sli4_hba.conf_regs_memmap_p) {
9396 dev_printk(KERN_ERR, &pdev->dev,
9397 "ioremap failed for SLI4 PCI config "
9398 "registers.\n");
9399 goto out;
9400 }
9401 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS
9402 }
9403
c31098ce 9404 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9405 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
2fcee4bf
JS
9406 /*
9407 * Map SLI4 if type 0 HBA Control Register base to a kernel
9408 * virtual address and setup the registers.
9409 */
f5ca6f2e
JS
9410 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
9411 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
2fcee4bf 9412 phba->sli4_hba.ctrl_regs_memmap_p =
da0436e9 9413 ioremap(phba->pci_bar1_map, bar1map_len);
2fcee4bf
JS
9414 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
9415 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9416 "ioremap failed for SLI4 HBA control registers.\n");
2fcee4bf
JS
9417 goto out_iounmap_conf;
9418 }
f5ca6f2e 9419 phba->pci_bar2_memmap_p = phba->sli4_hba.ctrl_regs_memmap_p;
2fcee4bf 9420 lpfc_sli4_bar1_register_memmap(phba);
da0436e9
JS
9421 }
9422
c31098ce 9423 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9424 (pci_resource_start(pdev, PCI_64BIT_BAR4))) {
2fcee4bf
JS
9425 /*
9426 * Map SLI4 if type 0 HBA Doorbell Register base to a kernel
9427 * virtual address and setup the registers.
9428 */
f5ca6f2e
JS
9429 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
9430 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
2fcee4bf 9431 phba->sli4_hba.drbl_regs_memmap_p =
da0436e9 9432 ioremap(phba->pci_bar2_map, bar2map_len);
2fcee4bf
JS
9433 if (!phba->sli4_hba.drbl_regs_memmap_p) {
9434 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9435 "ioremap failed for SLI4 HBA doorbell registers.\n");
2fcee4bf
JS
9436 goto out_iounmap_ctrl;
9437 }
f5ca6f2e 9438 phba->pci_bar4_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
2fcee4bf
JS
9439 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
9440 if (error)
9441 goto out_iounmap_all;
da0436e9
JS
9442 }
9443
da0436e9
JS
9444 return 0;
9445
9446out_iounmap_all:
9447 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9448out_iounmap_ctrl:
9449 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9450out_iounmap_conf:
9451 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9452out:
9453 return error;
9454}
9455
9456/**
9457 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
9458 * @phba: pointer to lpfc hba data structure.
9459 *
9460 * This routine is invoked to unset the PCI device memory space for device
9461 * with SLI-4 interface spec.
9462 **/
9463static void
9464lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
9465{
2e90f4b5
JS
9466 uint32_t if_type;
9467 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 9468
2e90f4b5
JS
9469 switch (if_type) {
9470 case LPFC_SLI_INTF_IF_TYPE_0:
9471 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9472 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9473 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9474 break;
9475 case LPFC_SLI_INTF_IF_TYPE_2:
9476 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9477 break;
9478 case LPFC_SLI_INTF_IF_TYPE_1:
9479 default:
9480 dev_printk(KERN_ERR, &phba->pcidev->dev,
9481 "FATAL - unsupported SLI4 interface type - %d\n",
9482 if_type);
9483 break;
9484 }
da0436e9
JS
9485}
9486
9487/**
9488 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
9489 * @phba: pointer to lpfc hba data structure.
9490 *
9491 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9492 * with SLI-3 interface specs.
da0436e9
JS
9493 *
9494 * Return codes
af901ca1 9495 * 0 - successful
da0436e9
JS
9496 * other values - error
9497 **/
9498static int
9499lpfc_sli_enable_msix(struct lpfc_hba *phba)
9500{
45ffac19 9501 int rc;
da0436e9
JS
9502 LPFC_MBOXQ_t *pmb;
9503
9504 /* Set up MSI-X multi-message vectors */
45ffac19
CH
9505 rc = pci_alloc_irq_vectors(phba->pcidev,
9506 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
9507 if (rc < 0) {
da0436e9
JS
9508 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9509 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9510 goto vec_fail_out;
da0436e9 9511 }
45ffac19 9512
da0436e9
JS
9513 /*
9514 * Assign MSI-X vectors to interrupt handlers
9515 */
9516
9517 /* vector-0 is associated to slow-path handler */
45ffac19 9518 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 9519 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS
9520 LPFC_SP_DRIVER_HANDLER_NAME, phba);
9521 if (rc) {
9522 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9523 "0421 MSI-X slow-path request_irq failed "
9524 "(%d)\n", rc);
9525 goto msi_fail_out;
9526 }
9527
9528 /* vector-1 is associated to fast-path handler */
45ffac19 9529 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 9530 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS
9531 LPFC_FP_DRIVER_HANDLER_NAME, phba);
9532
9533 if (rc) {
9534 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9535 "0429 MSI-X fast-path request_irq failed "
9536 "(%d)\n", rc);
9537 goto irq_fail_out;
9538 }
9539
9540 /*
9541 * Configure HBA MSI-X attention conditions to messages
9542 */
9543 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9544
9545 if (!pmb) {
9546 rc = -ENOMEM;
9547 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9548 "0474 Unable to allocate memory for issuing "
9549 "MBOX_CONFIG_MSI command\n");
9550 goto mem_fail_out;
9551 }
9552 rc = lpfc_config_msi(phba, pmb);
9553 if (rc)
9554 goto mbx_fail_out;
9555 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9556 if (rc != MBX_SUCCESS) {
9557 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
9558 "0351 Config MSI mailbox command failed, "
9559 "mbxCmd x%x, mbxStatus x%x\n",
9560 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
9561 goto mbx_fail_out;
9562 }
9563
9564 /* Free memory allocated for mailbox command */
9565 mempool_free(pmb, phba->mbox_mem_pool);
9566 return rc;
9567
9568mbx_fail_out:
9569 /* Free memory allocated for mailbox command */
9570 mempool_free(pmb, phba->mbox_mem_pool);
9571
9572mem_fail_out:
9573 /* free the irq already requested */
45ffac19 9574 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS
9575
9576irq_fail_out:
9577 /* free the irq already requested */
45ffac19 9578 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS
9579
9580msi_fail_out:
9581 /* Unconfigure MSI-X capability structure */
45ffac19 9582 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9583
9584vec_fail_out:
da0436e9
JS
9585 return rc;
9586}
9587
da0436e9
JS
9588/**
9589 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
9590 * @phba: pointer to lpfc hba data structure.
9591 *
9592 * This routine is invoked to enable the MSI interrupt mode to device with
9593 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
9594 * enable the MSI vector. The device driver is responsible for calling the
9595 * request_irq() to register MSI vector with a interrupt the handler, which
9596 * is done in this function.
9597 *
9598 * Return codes
af901ca1 9599 * 0 - successful
da0436e9
JS
9600 * other values - error
9601 */
9602static int
9603lpfc_sli_enable_msi(struct lpfc_hba *phba)
9604{
9605 int rc;
9606
9607 rc = pci_enable_msi(phba->pcidev);
9608 if (!rc)
9609 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9610 "0462 PCI enable MSI mode success.\n");
9611 else {
9612 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9613 "0471 PCI enable MSI mode failed (%d)\n", rc);
9614 return rc;
9615 }
9616
9617 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9618 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9619 if (rc) {
9620 pci_disable_msi(phba->pcidev);
9621 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9622 "0478 MSI request_irq failed (%d)\n", rc);
9623 }
9624 return rc;
9625}
9626
da0436e9
JS
9627/**
9628 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9629 * @phba: pointer to lpfc hba data structure.
9630 *
9631 * This routine is invoked to enable device interrupt and associate driver's
9632 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9633 * spec. Depends on the interrupt mode configured to the driver, the driver
9634 * will try to fallback from the configured interrupt mode to an interrupt
9635 * mode which is supported by the platform, kernel, and device in the order
9636 * of:
9637 * MSI-X -> MSI -> IRQ.
9638 *
9639 * Return codes
af901ca1 9640 * 0 - successful
da0436e9
JS
9641 * other values - error
9642 **/
9643static uint32_t
9644lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9645{
9646 uint32_t intr_mode = LPFC_INTR_ERROR;
9647 int retval;
9648
9649 if (cfg_mode == 2) {
9650 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9651 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9652 if (!retval) {
9653 /* Now, try to enable MSI-X interrupt mode */
9654 retval = lpfc_sli_enable_msix(phba);
9655 if (!retval) {
9656 /* Indicate initialization to MSI-X mode */
9657 phba->intr_type = MSIX;
9658 intr_mode = 2;
9659 }
9660 }
9661 }
9662
9663 /* Fallback to MSI if MSI-X initialization failed */
9664 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9665 retval = lpfc_sli_enable_msi(phba);
9666 if (!retval) {
9667 /* Indicate initialization to MSI mode */
9668 phba->intr_type = MSI;
9669 intr_mode = 1;
9670 }
9671 }
9672
9673 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9674 if (phba->intr_type == NONE) {
9675 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9676 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9677 if (!retval) {
9678 /* Indicate initialization to INTx mode */
9679 phba->intr_type = INTx;
9680 intr_mode = 0;
9681 }
9682 }
9683 return intr_mode;
9684}
9685
9686/**
9687 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9688 * @phba: pointer to lpfc hba data structure.
9689 *
9690 * This routine is invoked to disable device interrupt and disassociate the
9691 * driver's interrupt handler(s) from interrupt vector(s) to device with
9692 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9693 * release the interrupt vector(s) for the message signaled interrupt.
9694 **/
9695static void
9696lpfc_sli_disable_intr(struct lpfc_hba *phba)
9697{
45ffac19
CH
9698 int nr_irqs, i;
9699
da0436e9 9700 if (phba->intr_type == MSIX)
45ffac19
CH
9701 nr_irqs = LPFC_MSIX_VECTORS;
9702 else
9703 nr_irqs = 1;
9704
9705 for (i = 0; i < nr_irqs; i++)
9706 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9707 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9708
9709 /* Reset interrupt management states */
9710 phba->intr_type = NONE;
9711 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9712}
9713
7bb03bbf 9714/**
895427bd 9715 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9716 * @phba: pointer to lpfc hba data structure.
895427bd
JS
9717 * @vectors: number of msix vectors allocated.
9718 *
9719 * The routine will figure out the CPU affinity assignment for every
9720 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9721 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9722 * can be associated with. If the vector can be unquely associated with
9723 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9724 * In addition, the CPU to IO channel mapping will be calculated
9725 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9726 */
895427bd
JS
9727static void
9728lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS
9729{
9730 struct lpfc_vector_map_info *cpup;
895427bd
JS
9731 int index = 0;
9732 int vec = 0;
7bb03bbf 9733 int cpu;
7bb03bbf
JS
9734#ifdef CONFIG_X86
9735 struct cpuinfo_x86 *cpuinfo;
9736#endif
7bb03bbf
JS
9737
9738 /* Init cpu_map array */
9739 memset(phba->sli4_hba.cpu_map, 0xff,
9740 (sizeof(struct lpfc_vector_map_info) *
895427bd 9741 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS
9742
9743 /* Update CPU map with physical id and core id of each CPU */
9744 cpup = phba->sli4_hba.cpu_map;
9745 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9746#ifdef CONFIG_X86
9747 cpuinfo = &cpu_data(cpu);
9748 cpup->phys_id = cpuinfo->phys_proc_id;
9749 cpup->core_id = cpuinfo->cpu_core_id;
9750#else
9751 /* No distinction between CPUs for other platforms */
9752 cpup->phys_id = 0;
9753 cpup->core_id = 0;
9754#endif
895427bd
JS
9755 cpup->channel_id = index; /* For now round robin */
9756 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9757 vec++;
9758 if (vec >= vectors)
9759 vec = 0;
9760 index++;
9761 if (index >= phba->cfg_fcp_io_channel)
9762 index = 0;
7bb03bbf
JS
9763 cpup++;
9764 }
7bb03bbf
JS
9765}
9766
9767
da0436e9
JS
9768/**
9769 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9770 * @phba: pointer to lpfc hba data structure.
9771 *
9772 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9773 * with SLI-4 interface spec.
da0436e9
JS
9774 *
9775 * Return codes
af901ca1 9776 * 0 - successful
da0436e9
JS
9777 * other values - error
9778 **/
9779static int
9780lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9781{
75baf696 9782 int vectors, rc, index;
b83d005e 9783 char *name;
da0436e9
JS
9784
9785 /* Set up MSI-X multi-message vectors */
895427bd 9786 vectors = phba->io_channel_irqs;
45ffac19 9787 if (phba->cfg_fof)
1ba981fd 9788 vectors++;
45ffac19 9789
f358dd0c
JS
9790 rc = pci_alloc_irq_vectors(phba->pcidev,
9791 (phba->nvmet_support) ? 1 : 2,
9792 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9793 if (rc < 0) {
da0436e9
JS
9794 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9795 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9796 goto vec_fail_out;
da0436e9 9797 }
4f871e1b 9798 vectors = rc;
75baf696 9799
7bb03bbf 9800 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9801 for (index = 0; index < vectors; index++) {
b83d005e
JS
9802 name = phba->sli4_hba.hba_eq_hdl[index].handler_name;
9803 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
9804 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9805 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9806
895427bd
JS
9807 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9808 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9809 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9810 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9811 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9812 &lpfc_sli4_fof_intr_handler, 0,
b83d005e 9813 name,
895427bd 9814 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9815 else
45ffac19 9816 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9817 &lpfc_sli4_hba_intr_handler, 0,
b83d005e 9818 name,
895427bd 9819 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS
9820 if (rc) {
9821 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9822 "0486 MSI-X fast-path (%d) "
9823 "request_irq failed (%d)\n", index, rc);
9824 goto cfg_fail_out;
9825 }
9826 }
9827
1ba981fd
JS
9828 if (phba->cfg_fof)
9829 vectors--;
9830
895427bd 9831 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS
9832 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9833 "3238 Reducing IO channels to match number of "
9834 "MSI-X vectors, requested %d got %d\n",
895427bd
JS
9835 phba->io_channel_irqs, vectors);
9836 if (phba->cfg_fcp_io_channel > vectors)
9837 phba->cfg_fcp_io_channel = vectors;
9838 if (phba->cfg_nvme_io_channel > vectors)
9839 phba->cfg_nvme_io_channel = vectors;
9840 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9841 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9842 else
9843 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9844 }
895427bd 9845 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9846
da0436e9
JS
9847 return rc;
9848
9849cfg_fail_out:
9850 /* free the irq already requested */
895427bd
JS
9851 for (--index; index >= 0; index--)
9852 free_irq(pci_irq_vector(phba->pcidev, index),
9853 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9854
da0436e9 9855 /* Unconfigure MSI-X capability structure */
45ffac19 9856 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9857
9858vec_fail_out:
da0436e9
JS
9859 return rc;
9860}
9861
da0436e9
JS
9862/**
9863 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9864 * @phba: pointer to lpfc hba data structure.
9865 *
9866 * This routine is invoked to enable the MSI interrupt mode to device with
9867 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9868 * to enable the MSI vector. The device driver is responsible for calling
9869 * the request_irq() to register MSI vector with a interrupt the handler,
9870 * which is done in this function.
9871 *
9872 * Return codes
af901ca1 9873 * 0 - successful
da0436e9
JS
9874 * other values - error
9875 **/
9876static int
9877lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9878{
9879 int rc, index;
9880
9881 rc = pci_enable_msi(phba->pcidev);
9882 if (!rc)
9883 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9884 "0487 PCI enable MSI mode success.\n");
9885 else {
9886 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9887 "0488 PCI enable MSI mode failed (%d)\n", rc);
9888 return rc;
9889 }
9890
9891 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9892 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9893 if (rc) {
9894 pci_disable_msi(phba->pcidev);
9895 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9896 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9897 return rc;
da0436e9
JS
9898 }
9899
895427bd
JS
9900 for (index = 0; index < phba->io_channel_irqs; index++) {
9901 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9902 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS
9903 }
9904
1ba981fd 9905 if (phba->cfg_fof) {
895427bd
JS
9906 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9907 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 9908 }
75baf696 9909 return 0;
da0436e9
JS
9910}
9911
da0436e9
JS
9912/**
9913 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
9914 * @phba: pointer to lpfc hba data structure.
9915 *
9916 * This routine is invoked to enable device interrupt and associate driver's
9917 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
9918 * interface spec. Depends on the interrupt mode configured to the driver,
9919 * the driver will try to fallback from the configured interrupt mode to an
9920 * interrupt mode which is supported by the platform, kernel, and device in
9921 * the order of:
9922 * MSI-X -> MSI -> IRQ.
9923 *
9924 * Return codes
af901ca1 9925 * 0 - successful
da0436e9
JS
9926 * other values - error
9927 **/
9928static uint32_t
9929lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9930{
9931 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 9932 int retval, idx;
da0436e9
JS
9933
9934 if (cfg_mode == 2) {
9935 /* Preparation before conf_msi mbox cmd */
9936 retval = 0;
9937 if (!retval) {
9938 /* Now, try to enable MSI-X interrupt mode */
9939 retval = lpfc_sli4_enable_msix(phba);
9940 if (!retval) {
9941 /* Indicate initialization to MSI-X mode */
9942 phba->intr_type = MSIX;
9943 intr_mode = 2;
9944 }
9945 }
9946 }
9947
9948 /* Fallback to MSI if MSI-X initialization failed */
9949 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9950 retval = lpfc_sli4_enable_msi(phba);
9951 if (!retval) {
9952 /* Indicate initialization to MSI mode */
9953 phba->intr_type = MSI;
9954 intr_mode = 1;
9955 }
9956 }
9957
9958 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9959 if (phba->intr_type == NONE) {
9960 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
9961 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9962 if (!retval) {
895427bd
JS
9963 struct lpfc_hba_eq_hdl *eqhdl;
9964
da0436e9
JS
9965 /* Indicate initialization to INTx mode */
9966 phba->intr_type = INTx;
9967 intr_mode = 0;
895427bd
JS
9968
9969 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
9970 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9971 eqhdl->idx = idx;
9972 eqhdl->phba = phba;
9973 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 9974 }
1ba981fd 9975 if (phba->cfg_fof) {
895427bd
JS
9976 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9977 eqhdl->idx = idx;
9978 eqhdl->phba = phba;
9979 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 9980 }
da0436e9
JS
9981 }
9982 }
9983 return intr_mode;
9984}
9985
9986/**
9987 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
9988 * @phba: pointer to lpfc hba data structure.
9989 *
9990 * This routine is invoked to disable device interrupt and disassociate
9991 * the driver's interrupt handler(s) from interrupt vector(s) to device
9992 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
9993 * will release the interrupt vector(s) for the message signaled interrupt.
9994 **/
9995static void
9996lpfc_sli4_disable_intr(struct lpfc_hba *phba)
9997{
9998 /* Disable the currently initialized interrupt mode */
45ffac19
CH
9999 if (phba->intr_type == MSIX) {
10000 int index;
10001
10002 /* Free up MSI-X multi-message vectors */
895427bd
JS
10003 for (index = 0; index < phba->io_channel_irqs; index++)
10004 free_irq(pci_irq_vector(phba->pcidev, index),
10005 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH
10006
10007 if (phba->cfg_fof)
895427bd
JS
10008 free_irq(pci_irq_vector(phba->pcidev, index),
10009 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 10010 } else {
da0436e9 10011 free_irq(phba->pcidev->irq, phba);
45ffac19
CH
10012 }
10013
10014 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
10015
10016 /* Reset interrupt management states */
10017 phba->intr_type = NONE;
10018 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
10019}
10020
10021/**
10022 * lpfc_unset_hba - Unset SLI3 hba device initialization
10023 * @phba: pointer to lpfc hba data structure.
10024 *
10025 * This routine is invoked to unset the HBA device initialization steps to
10026 * a device with SLI-3 interface spec.
10027 **/
10028static void
10029lpfc_unset_hba(struct lpfc_hba *phba)
10030{
10031 struct lpfc_vport *vport = phba->pport;
10032 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
10033
10034 spin_lock_irq(shost->host_lock);
10035 vport->load_flag |= FC_UNLOADING;
10036 spin_unlock_irq(shost->host_lock);
10037
72859909
JS
10038 kfree(phba->vpi_bmask);
10039 kfree(phba->vpi_ids);
10040
da0436e9
JS
10041 lpfc_stop_hba_timers(phba);
10042
10043 phba->pport->work_port_events = 0;
10044
10045 lpfc_sli_hba_down(phba);
10046
10047 lpfc_sli_brdrestart(phba);
10048
10049 lpfc_sli_disable_intr(phba);
10050
10051 return;
10052}
10053
5af5eee7
JS
10054/**
10055 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
10056 * @phba: Pointer to HBA context object.
10057 *
10058 * This function is called in the SLI4 code path to wait for completion
10059 * of device's XRIs exchange busy. It will check the XRI exchange busy
10060 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
10061 * that, it will check the XRI exchange busy on outstanding FCP and ELS
10062 * I/Os every 30 seconds, log error message, and wait forever. Only when
10063 * all XRI exchange busy complete, the driver unload shall proceed with
10064 * invoking the function reset ioctl mailbox command to the CNA and the
10065 * the rest of the driver unload resource release.
10066 **/
10067static void
10068lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
10069{
10070 int wait_time = 0;
895427bd 10071 int nvme_xri_cmpl = 1;
86c67379 10072 int nvmet_xri_cmpl = 1;
895427bd 10073 int fcp_xri_cmpl = 1;
5af5eee7
JS
10074 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
10075
895427bd
JS
10076 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10077 fcp_xri_cmpl =
10078 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
86c67379 10079 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
10080 nvme_xri_cmpl =
10081 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS
10082 nvmet_xri_cmpl =
10083 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10084 }
895427bd 10085
f358dd0c
JS
10086 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl ||
10087 !nvmet_xri_cmpl) {
5af5eee7 10088 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS
10089 if (!nvme_xri_cmpl)
10090 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10091 "6100 NVME XRI exchange busy "
10092 "wait time: %d seconds.\n",
10093 wait_time/1000);
5af5eee7
JS
10094 if (!fcp_xri_cmpl)
10095 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10096 "2877 FCP XRI exchange busy "
10097 "wait time: %d seconds.\n",
10098 wait_time/1000);
10099 if (!els_xri_cmpl)
10100 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10101 "2878 ELS XRI exchange busy "
10102 "wait time: %d seconds.\n",
10103 wait_time/1000);
10104 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
10105 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
10106 } else {
10107 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
10108 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
10109 }
86c67379 10110 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
10111 nvme_xri_cmpl = list_empty(
10112 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS
10113 nvmet_xri_cmpl = list_empty(
10114 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10115 }
895427bd
JS
10116
10117 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10118 fcp_xri_cmpl = list_empty(
10119 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
10120
5af5eee7
JS
10121 els_xri_cmpl =
10122 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 10123
5af5eee7
JS
10124 }
10125}
10126
da0436e9
JS
10127/**
10128 * lpfc_sli4_hba_unset - Unset the fcoe hba
10129 * @phba: Pointer to HBA context object.
10130 *
10131 * This function is called in the SLI4 code path to reset the HBA's FCoE
10132 * function. The caller is not required to hold any lock. This routine
10133 * issues PCI function reset mailbox command to reset the FCoE function.
10134 * At the end of the function, it calls lpfc_hba_down_post function to
10135 * free any pending commands.
10136 **/
10137static void
10138lpfc_sli4_hba_unset(struct lpfc_hba *phba)
10139{
10140 int wait_cnt = 0;
10141 LPFC_MBOXQ_t *mboxq;
912e3acd 10142 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS
10143
10144 lpfc_stop_hba_timers(phba);
10145 phba->sli4_hba.intr_enable = 0;
10146
10147 /*
10148 * Gracefully wait out the potential current outstanding asynchronous
10149 * mailbox command.
10150 */
10151
10152 /* First, block any pending async mailbox command from posted */
10153 spin_lock_irq(&phba->hbalock);
10154 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
10155 spin_unlock_irq(&phba->hbalock);
10156 /* Now, trying to wait it out if we can */
10157 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10158 msleep(10);
10159 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
10160 break;
10161 }
10162 /* Forcefully release the outstanding mailbox command if timed out */
10163 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10164 spin_lock_irq(&phba->hbalock);
10165 mboxq = phba->sli.mbox_active;
10166 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
10167 __lpfc_mbox_cmpl_put(phba, mboxq);
10168 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10169 phba->sli.mbox_active = NULL;
10170 spin_unlock_irq(&phba->hbalock);
10171 }
10172
5af5eee7
JS
10173 /* Abort all iocbs associated with the hba */
10174 lpfc_sli_hba_iocb_abort(phba);
10175
10176 /* Wait for completion of device XRI exchange busy */
10177 lpfc_sli4_xri_exchange_busy_wait(phba);
10178
da0436e9
JS
10179 /* Disable PCI subsystem interrupt */
10180 lpfc_sli4_disable_intr(phba);
10181
912e3acd
JS
10182 /* Disable SR-IOV if enabled */
10183 if (phba->cfg_sriov_nr_virtfn)
10184 pci_disable_sriov(pdev);
10185
da0436e9
JS
10186 /* Stop kthread signal shall trigger work_done one more time */
10187 kthread_stop(phba->worker_thread);
10188
d1f525aa
JS
10189 /* Unset the queues shared with the hardware then release all
10190 * allocated resources.
10191 */
10192 lpfc_sli4_queue_unset(phba);
10193 lpfc_sli4_queue_destroy(phba);
10194
3677a3a7
JS
10195 /* Reset SLI4 HBA FCoE function */
10196 lpfc_pci_function_reset(phba);
10197
da0436e9
JS
10198 /* Stop the SLI4 device port */
10199 phba->pport->work_port_events = 0;
10200}
10201
28baac74
JS
10202 /**
10203 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
10204 * @phba: Pointer to HBA context object.
10205 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10206 *
10207 * This function is called in the SLI4 code path to read the port's
10208 * sli4 capabilities.
10209 *
10210 * This function may be be called from any context that can block-wait
10211 * for the completion. The expectation is that this routine is called
10212 * typically from probe_one or from the online routine.
10213 **/
10214int
10215lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10216{
10217 int rc;
10218 struct lpfc_mqe *mqe;
10219 struct lpfc_pc_sli4_params *sli4_params;
10220 uint32_t mbox_tmo;
10221
10222 rc = 0;
10223 mqe = &mboxq->u.mqe;
10224
10225 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 10226 lpfc_pc_sli4_params(mboxq);
28baac74
JS
10227 if (!phba->sli4_hba.intr_enable)
10228 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10229 else {
a183a15f 10230 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS
10231 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10232 }
10233
10234 if (unlikely(rc))
10235 return 1;
10236
10237 sli4_params = &phba->sli4_hba.pc_sli4_params;
10238 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
10239 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
10240 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
10241 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
10242 &mqe->un.sli4_params);
10243 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
10244 &mqe->un.sli4_params);
10245 sli4_params->proto_types = mqe->un.sli4_params.word3;
10246 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
10247 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
10248 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
10249 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
10250 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
10251 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
10252 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
10253 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
10254 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
10255 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
10256 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
10257 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
10258 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
10259 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
10260 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
10261 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
10262 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
10263 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
10264 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
10265 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS
10266
10267 /* Make sure that sge_supp_len can be handled by the driver */
10268 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10269 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10270
28baac74
JS
10271 return rc;
10272}
10273
fedd3b7b
JS
10274/**
10275 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
10276 * @phba: Pointer to HBA context object.
10277 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10278 *
10279 * This function is called in the SLI4 code path to read the port's
10280 * sli4 capabilities.
10281 *
10282 * This function may be be called from any context that can block-wait
10283 * for the completion. The expectation is that this routine is called
10284 * typically from probe_one or from the online routine.
10285 **/
10286int
10287lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10288{
10289 int rc;
10290 struct lpfc_mqe *mqe = &mboxq->u.mqe;
10291 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 10292 uint32_t mbox_tmo;
fedd3b7b
JS
10293 int length;
10294 struct lpfc_sli4_parameters *mbx_sli4_parameters;
10295
6d368e53
JS
10296 /*
10297 * By default, the driver assumes the SLI4 port requires RPI
10298 * header postings. The SLI4_PARAM response will correct this
10299 * assumption.
10300 */
10301 phba->sli4_hba.rpi_hdrs_in_use = 1;
10302
fedd3b7b
JS
10303 /* Read the port's SLI4 Config Parameters */
10304 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
10305 sizeof(struct lpfc_sli4_cfg_mhdr));
10306 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
10307 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
10308 length, LPFC_SLI4_MBX_EMBED);
10309 if (!phba->sli4_hba.intr_enable)
10310 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS
10311 else {
10312 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
10313 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10314 }
fedd3b7b
JS
10315 if (unlikely(rc))
10316 return rc;
10317 sli4_params = &phba->sli4_hba.pc_sli4_params;
10318 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
10319 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
10320 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
10321 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
10322 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
10323 mbx_sli4_parameters);
10324 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
10325 mbx_sli4_parameters);
10326 if (bf_get(cfg_phwq, mbx_sli4_parameters))
10327 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
10328 else
10329 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
10330 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
10331 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 10332 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS
10333 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
10334 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
10335 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
10336 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 10337 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS
10338 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
10339 mbx_sli4_parameters);
895427bd 10340 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS
10341 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
10342 mbx_sli4_parameters);
6d368e53
JS
10343 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
10344 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS
10345 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
10346 bf_get(cfg_xib, mbx_sli4_parameters));
10347
10348 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
10349 !phba->nvme_support) {
10350 phba->nvme_support = 0;
10351 phba->nvmet_support = 0;
2d7dbc4c 10352 phba->cfg_nvmet_mrq = 0;
895427bd
JS
10353 phba->cfg_nvme_io_channel = 0;
10354 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
10355 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
10356 "6101 Disabling NVME support: "
10357 "Not supported by firmware: %d %d\n",
10358 bf_get(cfg_nvme, mbx_sli4_parameters),
10359 bf_get(cfg_xib, mbx_sli4_parameters));
10360
10361 /* If firmware doesn't support NVME, just use SCSI support */
10362 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
10363 return -ENODEV;
10364 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
10365 }
0558056c 10366
f358dd0c
JS
10367 if (bf_get(cfg_xib, mbx_sli4_parameters) && phba->cfg_suppress_rsp)
10368 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
10369
0cf07f84
JS
10370 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
10371 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
10372
0558056c
JS
10373 /* Make sure that sge_supp_len can be handled by the driver */
10374 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10375 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10376
b5c53958
JS
10377 /*
10378 * Issue IOs with CDB embedded in WQE to minimized the number
10379 * of DMAs the firmware has to do. Setting this to 1 also forces
10380 * the driver to use 128 bytes WQEs for FCP IOs.
10381 */
10382 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
10383 phba->fcp_embed_io = 1;
10384 else
10385 phba->fcp_embed_io = 0;
7bdedb34
JS
10386
10387 /*
10388 * Check if the SLI port supports MDS Diagnostics
10389 */
10390 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
10391 phba->mds_diags_support = 1;
10392 else
10393 phba->mds_diags_support = 0;
fedd3b7b
JS
10394 return 0;
10395}
10396
da0436e9
JS
10397/**
10398 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
10399 * @pdev: pointer to PCI device
10400 * @pid: pointer to PCI device identifier
10401 *
10402 * This routine is to be called to attach a device with SLI-3 interface spec
10403 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10404 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
10405 * information of the device and driver to see if the driver state that it can
10406 * support this kind of device. If the match is successful, the driver core
10407 * invokes this routine. If this routine determines it can claim the HBA, it
10408 * does all the initialization that it needs to do to handle the HBA properly.
10409 *
10410 * Return code
10411 * 0 - driver can claim the device
10412 * negative value - driver can not claim the device
10413 **/
6f039790 10414static int
da0436e9
JS
10415lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
10416{
10417 struct lpfc_hba *phba;
10418 struct lpfc_vport *vport = NULL;
6669f9bb 10419 struct Scsi_Host *shost = NULL;
da0436e9
JS
10420 int error;
10421 uint32_t cfg_mode, intr_mode;
10422
10423 /* Allocate memory for HBA structure */
10424 phba = lpfc_hba_alloc(pdev);
10425 if (!phba)
10426 return -ENOMEM;
10427
10428 /* Perform generic PCI device enabling operation */
10429 error = lpfc_enable_pci_dev(phba);
079b5c91 10430 if (error)
da0436e9 10431 goto out_free_phba;
da0436e9
JS
10432
10433 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
10434 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
10435 if (error)
10436 goto out_disable_pci_dev;
10437
10438 /* Set up SLI-3 specific device PCI memory space */
10439 error = lpfc_sli_pci_mem_setup(phba);
10440 if (error) {
10441 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10442 "1402 Failed to set up pci memory space.\n");
10443 goto out_disable_pci_dev;
10444 }
10445
da0436e9
JS
10446 /* Set up SLI-3 specific device driver resources */
10447 error = lpfc_sli_driver_resource_setup(phba);
10448 if (error) {
10449 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10450 "1404 Failed to set up driver resource.\n");
10451 goto out_unset_pci_mem_s3;
10452 }
10453
10454 /* Initialize and populate the iocb list per host */
d1f525aa 10455
da0436e9
JS
10456 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
10457 if (error) {
10458 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10459 "1405 Failed to initialize iocb list.\n");
10460 goto out_unset_driver_resource_s3;
10461 }
10462
10463 /* Set up common device driver resources */
10464 error = lpfc_setup_driver_resource_phase2(phba);
10465 if (error) {
10466 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10467 "1406 Failed to set up driver resource.\n");
10468 goto out_free_iocb_list;
10469 }
10470
079b5c91
JS
10471 /* Get the default values for Model Name and Description */
10472 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10473
da0436e9
JS
10474 /* Create SCSI host to the physical port */
10475 error = lpfc_create_shost(phba);
10476 if (error) {
10477 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10478 "1407 Failed to create scsi host.\n");
10479 goto out_unset_driver_resource;
10480 }
10481
10482 /* Configure sysfs attributes */
10483 vport = phba->pport;
10484 error = lpfc_alloc_sysfs_attr(vport);
10485 if (error) {
10486 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10487 "1476 Failed to allocate sysfs attr\n");
10488 goto out_destroy_shost;
10489 }
10490
6669f9bb 10491 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS
10492 /* Now, trying to enable interrupt and bring up the device */
10493 cfg_mode = phba->cfg_use_msi;
10494 while (true) {
10495 /* Put device to a known state before enabling interrupt */
10496 lpfc_stop_port(phba);
10497 /* Configure and enable interrupt */
10498 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
10499 if (intr_mode == LPFC_INTR_ERROR) {
10500 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10501 "0431 Failed to enable interrupt.\n");
10502 error = -ENODEV;
10503 goto out_free_sysfs_attr;
10504 }
10505 /* SLI-3 HBA setup */
10506 if (lpfc_sli_hba_setup(phba)) {
10507 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10508 "1477 Failed to set up hba\n");
10509 error = -ENODEV;
10510 goto out_remove_device;
10511 }
10512
10513 /* Wait 50ms for the interrupts of previous mailbox commands */
10514 msleep(50);
10515 /* Check active interrupts on message signaled interrupts */
10516 if (intr_mode == 0 ||
10517 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
10518 /* Log the current active interrupt mode */
10519 phba->intr_mode = intr_mode;
10520 lpfc_log_intr_mode(phba, intr_mode);
10521 break;
10522 } else {
10523 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10524 "0447 Configure interrupt mode (%d) "
10525 "failed active interrupt test.\n",
10526 intr_mode);
10527 /* Disable the current interrupt mode */
10528 lpfc_sli_disable_intr(phba);
10529 /* Try next level of interrupt mode */
10530 cfg_mode = --intr_mode;
10531 }
10532 }
10533
10534 /* Perform post initialization setup */
10535 lpfc_post_init_setup(phba);
10536
10537 /* Check if there are static vports to be created. */
10538 lpfc_create_static_vport(phba);
10539
10540 return 0;
10541
10542out_remove_device:
10543 lpfc_unset_hba(phba);
10544out_free_sysfs_attr:
10545 lpfc_free_sysfs_attr(vport);
10546out_destroy_shost:
10547 lpfc_destroy_shost(phba);
10548out_unset_driver_resource:
10549 lpfc_unset_driver_resource_phase2(phba);
10550out_free_iocb_list:
10551 lpfc_free_iocb_list(phba);
10552out_unset_driver_resource_s3:
10553 lpfc_sli_driver_resource_unset(phba);
10554out_unset_pci_mem_s3:
10555 lpfc_sli_pci_mem_unset(phba);
10556out_disable_pci_dev:
10557 lpfc_disable_pci_dev(phba);
6669f9bb
JS
10558 if (shost)
10559 scsi_host_put(shost);
da0436e9
JS
10560out_free_phba:
10561 lpfc_hba_free(phba);
10562 return error;
10563}
10564
10565/**
10566 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
10567 * @pdev: pointer to PCI device
10568 *
10569 * This routine is to be called to disattach a device with SLI-3 interface
10570 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10571 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10572 * device to be removed from the PCI subsystem properly.
10573 **/
6f039790 10574static void
da0436e9
JS
10575lpfc_pci_remove_one_s3(struct pci_dev *pdev)
10576{
10577 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10578 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10579 struct lpfc_vport **vports;
10580 struct lpfc_hba *phba = vport->phba;
10581 int i;
da0436e9
JS
10582
10583 spin_lock_irq(&phba->hbalock);
10584 vport->load_flag |= FC_UNLOADING;
10585 spin_unlock_irq(&phba->hbalock);
10586
10587 lpfc_free_sysfs_attr(vport);
10588
10589 /* Release all the vports against this physical port */
10590 vports = lpfc_create_vport_work_array(phba);
10591 if (vports != NULL)
587a37f6
JS
10592 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10593 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10594 continue;
da0436e9 10595 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10596 }
da0436e9
JS
10597 lpfc_destroy_vport_work_array(phba, vports);
10598
10599 /* Remove FC host and then SCSI host with the physical port */
10600 fc_remove_host(shost);
10601 scsi_remove_host(shost);
d613b6a7 10602
da0436e9
JS
10603 lpfc_cleanup(vport);
10604
10605 /*
10606 * Bring down the SLI Layer. This step disable all interrupts,
10607 * clears the rings, discards all mailbox commands, and resets
10608 * the HBA.
10609 */
10610
48e34d0f 10611 /* HBA interrupt will be disabled after this call */
da0436e9
JS
10612 lpfc_sli_hba_down(phba);
10613 /* Stop kthread signal shall trigger work_done one more time */
10614 kthread_stop(phba->worker_thread);
10615 /* Final cleanup of txcmplq and reset the HBA */
10616 lpfc_sli_brdrestart(phba);
10617
72859909
JS
10618 kfree(phba->vpi_bmask);
10619 kfree(phba->vpi_ids);
10620
da0436e9
JS
10621 lpfc_stop_hba_timers(phba);
10622 spin_lock_irq(&phba->hbalock);
10623 list_del_init(&vport->listentry);
10624 spin_unlock_irq(&phba->hbalock);
10625
10626 lpfc_debugfs_terminate(vport);
10627
912e3acd
JS
10628 /* Disable SR-IOV if enabled */
10629 if (phba->cfg_sriov_nr_virtfn)
10630 pci_disable_sriov(pdev);
10631
da0436e9
JS
10632 /* Disable interrupt */
10633 lpfc_sli_disable_intr(phba);
10634
da0436e9
JS
10635 scsi_host_put(shost);
10636
10637 /*
10638 * Call scsi_free before mem_free since scsi bufs are released to their
10639 * corresponding pools here.
10640 */
10641 lpfc_scsi_free(phba);
10642 lpfc_mem_free_all(phba);
10643
10644 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10645 phba->hbqslimp.virt, phba->hbqslimp.phys);
10646
10647 /* Free resources associated with SLI2 interface */
10648 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10649 phba->slim2p.virt, phba->slim2p.phys);
10650
10651 /* unmap adapter SLIM and Control Registers */
10652 iounmap(phba->ctrl_regs_memmap_p);
10653 iounmap(phba->slim_memmap_p);
10654
10655 lpfc_hba_free(phba);
10656
e0c0483c 10657 pci_release_mem_regions(pdev);
da0436e9
JS
10658 pci_disable_device(pdev);
10659}
10660
10661/**
10662 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10663 * @pdev: pointer to PCI device
10664 * @msg: power management message
10665 *
10666 * This routine is to be called from the kernel's PCI subsystem to support
10667 * system Power Management (PM) to device with SLI-3 interface spec. When
10668 * PM invokes this method, it quiesces the device by stopping the driver's
10669 * worker thread for the device, turning off device's interrupt and DMA,
10670 * and bring the device offline. Note that as the driver implements the
10671 * minimum PM requirements to a power-aware driver's PM support for the
10672 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10673 * to the suspend() method call will be treated as SUSPEND and the driver will
10674 * fully reinitialize its device during resume() method call, the driver will
10675 * set device to PCI_D3hot state in PCI config space instead of setting it
10676 * according to the @msg provided by the PM.
10677 *
10678 * Return code
10679 * 0 - driver suspended the device
10680 * Error otherwise
10681 **/
10682static int
10683lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10684{
10685 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10686 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10687
10688 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10689 "0473 PCI device Power Management suspend.\n");
10690
10691 /* Bring down the device */
618a5230 10692 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10693 lpfc_offline(phba);
10694 kthread_stop(phba->worker_thread);
10695
10696 /* Disable interrupt from device */
10697 lpfc_sli_disable_intr(phba);
10698
10699 /* Save device state to PCI config space */
10700 pci_save_state(pdev);
10701 pci_set_power_state(pdev, PCI_D3hot);
10702
10703 return 0;
10704}
10705
10706/**
10707 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10708 * @pdev: pointer to PCI device
10709 *
10710 * This routine is to be called from the kernel's PCI subsystem to support
10711 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10712 * invokes this method, it restores the device's PCI config space state and
10713 * fully reinitializes the device and brings it online. Note that as the
10714 * driver implements the minimum PM requirements to a power-aware driver's
10715 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10716 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10717 * driver will fully reinitialize its device during resume() method call,
10718 * the device will be set to PCI_D0 directly in PCI config space before
10719 * restoring the state.
10720 *
10721 * Return code
10722 * 0 - driver suspended the device
10723 * Error otherwise
10724 **/
10725static int
10726lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10727{
10728 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10729 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10730 uint32_t intr_mode;
10731 int error;
10732
10733 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10734 "0452 PCI device Power Management resume.\n");
10735
10736 /* Restore device state from PCI config space */
10737 pci_set_power_state(pdev, PCI_D0);
10738 pci_restore_state(pdev);
0d878419 10739
1dfb5a47
JS
10740 /*
10741 * As the new kernel behavior of pci_restore_state() API call clears
10742 * device saved_state flag, need to save the restored state again.
10743 */
10744 pci_save_state(pdev);
10745
da0436e9
JS
10746 if (pdev->is_busmaster)
10747 pci_set_master(pdev);
10748
10749 /* Startup the kernel thread for this host adapter. */
10750 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10751 "lpfc_worker_%d", phba->brd_no);
10752 if (IS_ERR(phba->worker_thread)) {
10753 error = PTR_ERR(phba->worker_thread);
10754 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10755 "0434 PM resume failed to start worker "
10756 "thread: error=x%x.\n", error);
10757 return error;
10758 }
10759
10760 /* Configure and enable interrupt */
10761 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10762 if (intr_mode == LPFC_INTR_ERROR) {
10763 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10764 "0430 PM resume Failed to enable interrupt\n");
10765 return -EIO;
10766 } else
10767 phba->intr_mode = intr_mode;
10768
10769 /* Restart HBA and bring it online */
10770 lpfc_sli_brdrestart(phba);
10771 lpfc_online(phba);
10772
10773 /* Log the current active interrupt mode */
10774 lpfc_log_intr_mode(phba, phba->intr_mode);
10775
10776 return 0;
10777}
10778
891478a2
JS
10779/**
10780 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10781 * @phba: pointer to lpfc hba data structure.
10782 *
10783 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10784 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS
10785 **/
10786static void
10787lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10788{
10789 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10790 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS
10791
10792 /*
10793 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10794 * and let the SCSI mid-layer to retry them to recover.
10795 */
db55fba8 10796 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS
10797}
10798
0d878419
JS
10799/**
10800 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10801 * @phba: pointer to lpfc hba data structure.
10802 *
10803 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10804 * disables the device interrupt and pci device, and aborts the internal FCP
10805 * pending I/Os.
10806 **/
10807static void
10808lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10809{
0d878419 10810 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10811 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10812
75baf696 10813 /* Block any management I/Os to the device */
618a5230 10814 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10815
e2af0d2e
JS
10816 /* Block all SCSI devices' I/Os on the host */
10817 lpfc_scsi_dev_block(phba);
10818
ea714f3d
JS
10819 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10820 lpfc_sli_flush_fcp_rings(phba);
10821
e2af0d2e
JS
10822 /* stop all timers */
10823 lpfc_stop_hba_timers(phba);
10824
0d878419
JS
10825 /* Disable interrupt and pci device */
10826 lpfc_sli_disable_intr(phba);
10827 pci_disable_device(phba->pcidev);
0d878419
JS
10828}
10829
10830/**
10831 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10832 * @phba: pointer to lpfc hba data structure.
10833 *
10834 * This routine is called to prepare the SLI3 device for PCI slot permanently
10835 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10836 * pending I/Os.
10837 **/
10838static void
75baf696 10839lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS
10840{
10841 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10842 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS
10843 /* Block all SCSI devices' I/Os on the host */
10844 lpfc_scsi_dev_block(phba);
10845
10846 /* stop all timers */
10847 lpfc_stop_hba_timers(phba);
10848
0d878419
JS
10849 /* Clean up all driver's outstanding SCSI I/Os */
10850 lpfc_sli_flush_fcp_rings(phba);
10851}
10852
da0436e9
JS
10853/**
10854 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10855 * @pdev: pointer to PCI device.
10856 * @state: the current PCI connection state.
10857 *
10858 * This routine is called from the PCI subsystem for I/O error handling to
10859 * device with SLI-3 interface spec. This function is called by the PCI
10860 * subsystem after a PCI bus error affecting this device has been detected.
10861 * When this function is invoked, it will need to stop all the I/Os and
10862 * interrupt(s) to the device. Once that is done, it will return
10863 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10864 * as desired.
10865 *
10866 * Return codes
0d878419 10867 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS
10868 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10869 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10870 **/
10871static pci_ers_result_t
10872lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10873{
10874 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10875 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10876
0d878419
JS
10877 switch (state) {
10878 case pci_channel_io_normal:
891478a2
JS
10879 /* Non-fatal error, prepare for recovery */
10880 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS
10881 return PCI_ERS_RESULT_CAN_RECOVER;
10882 case pci_channel_io_frozen:
10883 /* Fatal error, prepare for slot reset */
10884 lpfc_sli_prep_dev_for_reset(phba);
10885 return PCI_ERS_RESULT_NEED_RESET;
10886 case pci_channel_io_perm_failure:
10887 /* Permanent failure, prepare for device down */
75baf696 10888 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 10889 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS
10890 default:
10891 /* Unknown state, prepare and request slot reset */
10892 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10893 "0472 Unknown PCI error state: x%x\n", state);
10894 lpfc_sli_prep_dev_for_reset(phba);
10895 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 10896 }
da0436e9
JS
10897}
10898
10899/**
10900 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
10901 * @pdev: pointer to PCI device.
10902 *
10903 * This routine is called from the PCI subsystem for error handling to
10904 * device with SLI-3 interface spec. This is called after PCI bus has been
10905 * reset to restart the PCI card from scratch, as if from a cold-boot.
10906 * During the PCI subsystem error recovery, after driver returns
10907 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
10908 * recovery and then call this routine before calling the .resume method
10909 * to recover the device. This function will initialize the HBA device,
10910 * enable the interrupt, but it will just put the HBA to offline state
10911 * without passing any I/O traffic.
10912 *
10913 * Return codes
10914 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
10915 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10916 */
10917static pci_ers_result_t
10918lpfc_io_slot_reset_s3(struct pci_dev *pdev)
10919{
10920 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10921 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10922 struct lpfc_sli *psli = &phba->sli;
10923 uint32_t intr_mode;
10924
10925 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
10926 if (pci_enable_device_mem(pdev)) {
10927 printk(KERN_ERR "lpfc: Cannot re-enable "
10928 "PCI device after reset.\n");
10929 return PCI_ERS_RESULT_DISCONNECT;
10930 }
10931
10932 pci_restore_state(pdev);
1dfb5a47
JS
10933
10934 /*
10935 * As the new kernel behavior of pci_restore_state() API call clears
10936 * device saved_state flag, need to save the restored state again.
10937 */
10938 pci_save_state(pdev);
10939
da0436e9
JS
10940 if (pdev->is_busmaster)
10941 pci_set_master(pdev);
10942
10943 spin_lock_irq(&phba->hbalock);
10944 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
10945 spin_unlock_irq(&phba->hbalock);
10946
10947 /* Configure and enable interrupt */
10948 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10949 if (intr_mode == LPFC_INTR_ERROR) {
10950 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10951 "0427 Cannot re-enable interrupt after "
10952 "slot reset.\n");
10953 return PCI_ERS_RESULT_DISCONNECT;
10954 } else
10955 phba->intr_mode = intr_mode;
10956
75baf696 10957 /* Take device offline, it will perform cleanup */
618a5230 10958 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10959 lpfc_offline(phba);
10960 lpfc_sli_brdrestart(phba);
10961
10962 /* Log the current active interrupt mode */
10963 lpfc_log_intr_mode(phba, phba->intr_mode);
10964
10965 return PCI_ERS_RESULT_RECOVERED;
10966}
10967
10968/**
10969 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
10970 * @pdev: pointer to PCI device
10971 *
10972 * This routine is called from the PCI subsystem for error handling to device
10973 * with SLI-3 interface spec. It is called when kernel error recovery tells
10974 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
10975 * error recovery. After this call, traffic can start to flow from this device
10976 * again.
10977 */
10978static void
10979lpfc_io_resume_s3(struct pci_dev *pdev)
10980{
10981 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10982 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 10983
e2af0d2e 10984 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 10985 lpfc_online(phba);
0d878419
JS
10986
10987 /* Clean up Advanced Error Reporting (AER) if needed */
10988 if (phba->hba_flag & HBA_AER_ENABLED)
10989 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 10990}
3772a991 10991
da0436e9
JS
10992/**
10993 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
10994 * @phba: pointer to lpfc hba data structure.
10995 *
10996 * returns the number of ELS/CT IOCBs to reserve
10997 **/
10998int
10999lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
11000{
11001 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
11002
f1126688
JS
11003 if (phba->sli_rev == LPFC_SLI_REV4) {
11004 if (max_xri <= 100)
6a9c52cf 11005 return 10;
f1126688 11006 else if (max_xri <= 256)
6a9c52cf 11007 return 25;
f1126688 11008 else if (max_xri <= 512)
6a9c52cf 11009 return 50;
f1126688 11010 else if (max_xri <= 1024)
6a9c52cf 11011 return 100;
8a9d2e80 11012 else if (max_xri <= 1536)
6a9c52cf 11013 return 150;
8a9d2e80
JS
11014 else if (max_xri <= 2048)
11015 return 200;
11016 else
11017 return 250;
f1126688
JS
11018 } else
11019 return 0;
3772a991
JS
11020}
11021
895427bd
JS
11022/**
11023 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
11024 * @phba: pointer to lpfc hba data structure.
11025 *
f358dd0c 11026 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS
11027 **/
11028int
11029lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
11030{
11031 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
11032
f358dd0c
JS
11033 if (phba->nvmet_support)
11034 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS
11035 return max_xri;
11036}
11037
11038
52d52440
JS
11039/**
11040 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 11041 * @fw: pointer to firmware image returned from request_firmware.
ce396282 11042 * @phba: pointer to lpfc hba data structure.
52d52440 11043 *
52d52440 11044 **/
ce396282
JS
11045static void
11046lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 11047{
ce396282 11048 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 11049 char fwrev[FW_REV_STR_SIZE];
ce396282 11050 struct lpfc_grp_hdr *image;
52d52440
JS
11051 struct list_head dma_buffer_list;
11052 int i, rc = 0;
11053 struct lpfc_dmabuf *dmabuf, *next;
11054 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 11055 uint32_t magic_number, ftype, fid, fsize;
52d52440 11056
c71ab861 11057 /* It can be null in no-wait mode, sanity check */
ce396282
JS
11058 if (!fw) {
11059 rc = -ENXIO;
11060 goto out;
11061 }
11062 image = (struct lpfc_grp_hdr *)fw->data;
11063
6b6ef5db
JS
11064 magic_number = be32_to_cpu(image->magic_number);
11065 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
11066 fid = bf_get_be32(lpfc_grp_hdr_id, image),
11067 fsize = be32_to_cpu(image->size);
11068
52d52440 11069 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS
11070 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
11071 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
11072 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS
11073 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11074 "3022 Invalid FW image found. "
efe583c6 11075 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 11076 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS
11077 rc = -EINVAL;
11078 goto release_out;
52d52440
JS
11079 }
11080 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 11081 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 11082 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 11083 "3023 Updating Firmware, Current Version:%s "
52d52440 11084 "New Version:%s\n",
88a2cfbb 11085 fwrev, image->revision);
52d52440
JS
11086 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
11087 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
11088 GFP_KERNEL);
11089 if (!dmabuf) {
11090 rc = -ENOMEM;
ce396282 11091 goto release_out;
52d52440
JS
11092 }
11093 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
11094 SLI4_PAGE_SIZE,
11095 &dmabuf->phys,
11096 GFP_KERNEL);
11097 if (!dmabuf->virt) {
11098 kfree(dmabuf);
11099 rc = -ENOMEM;
ce396282 11100 goto release_out;
52d52440
JS
11101 }
11102 list_add_tail(&dmabuf->list, &dma_buffer_list);
11103 }
11104 while (offset < fw->size) {
11105 temp_offset = offset;
11106 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 11107 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS
11108 memcpy(dmabuf->virt,
11109 fw->data + temp_offset,
079b5c91
JS
11110 fw->size - temp_offset);
11111 temp_offset = fw->size;
52d52440
JS
11112 break;
11113 }
52d52440
JS
11114 memcpy(dmabuf->virt, fw->data + temp_offset,
11115 SLI4_PAGE_SIZE);
88a2cfbb 11116 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS
11117 }
11118 rc = lpfc_wr_object(phba, &dma_buffer_list,
11119 (fw->size - offset), &offset);
ce396282
JS
11120 if (rc)
11121 goto release_out;
52d52440
JS
11122 }
11123 rc = offset;
11124 }
ce396282
JS
11125
11126release_out:
52d52440
JS
11127 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
11128 list_del(&dmabuf->list);
11129 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
11130 dmabuf->virt, dmabuf->phys);
11131 kfree(dmabuf);
11132 }
ce396282
JS
11133 release_firmware(fw);
11134out:
11135 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 11136 "3024 Firmware update done: %d.\n", rc);
ce396282 11137 return;
52d52440
JS
11138}
11139
c71ab861
JS
11140/**
11141 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
11142 * @phba: pointer to lpfc hba data structure.
11143 *
11144 * This routine is called to perform Linux generic firmware upgrade on device
11145 * that supports such feature.
11146 **/
11147int
11148lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
11149{
11150 uint8_t file_name[ELX_MODEL_NAME_SIZE];
11151 int ret;
11152 const struct firmware *fw;
11153
11154 /* Only supported on SLI4 interface type 2 for now */
11155 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11156 LPFC_SLI_INTF_IF_TYPE_2)
11157 return -EPERM;
11158
11159 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
11160
11161 if (fw_upgrade == INT_FW_UPGRADE) {
11162 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
11163 file_name, &phba->pcidev->dev,
11164 GFP_KERNEL, (void *)phba,
11165 lpfc_write_firmware);
11166 } else if (fw_upgrade == RUN_FW_UPGRADE) {
11167 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
11168 if (!ret)
11169 lpfc_write_firmware(fw, (void *)phba);
11170 } else {
11171 ret = -EINVAL;
11172 }
11173
11174 return ret;
11175}
11176
3772a991 11177/**
da0436e9 11178 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS
11179 * @pdev: pointer to PCI device
11180 * @pid: pointer to PCI device identifier
11181 *
da0436e9
JS
11182 * This routine is called from the kernel's PCI subsystem to device with
11183 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 11184 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS
11185 * information of the device and driver to see if the driver state that it
11186 * can support this kind of device. If the match is successful, the driver
11187 * core invokes this routine. If this routine determines it can claim the HBA,
11188 * it does all the initialization that it needs to do to handle the HBA
11189 * properly.
3772a991
JS
11190 *
11191 * Return code
11192 * 0 - driver can claim the device
11193 * negative value - driver can not claim the device
11194 **/
6f039790 11195static int
da0436e9 11196lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS
11197{
11198 struct lpfc_hba *phba;
11199 struct lpfc_vport *vport = NULL;
6669f9bb 11200 struct Scsi_Host *shost = NULL;
6c621a22 11201 int error;
3772a991
JS
11202 uint32_t cfg_mode, intr_mode;
11203
11204 /* Allocate memory for HBA structure */
11205 phba = lpfc_hba_alloc(pdev);
11206 if (!phba)
11207 return -ENOMEM;
11208
11209 /* Perform generic PCI device enabling operation */
11210 error = lpfc_enable_pci_dev(phba);
079b5c91 11211 if (error)
3772a991 11212 goto out_free_phba;
3772a991 11213
da0436e9
JS
11214 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
11215 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS
11216 if (error)
11217 goto out_disable_pci_dev;
11218
da0436e9
JS
11219 /* Set up SLI-4 specific device PCI memory space */
11220 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS
11221 if (error) {
11222 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11223 "1410 Failed to set up pci memory space.\n");
3772a991
JS
11224 goto out_disable_pci_dev;
11225 }
11226
da0436e9
JS
11227 /* Set up SLI-4 Specific device driver resources */
11228 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS
11229 if (error) {
11230 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
11231 "1412 Failed to set up driver resource.\n");
11232 goto out_unset_pci_mem_s4;
3772a991
JS
11233 }
11234
19ca7609 11235 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 11236 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 11237
3772a991
JS
11238 /* Set up common device driver resources */
11239 error = lpfc_setup_driver_resource_phase2(phba);
11240 if (error) {
11241 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11242 "1414 Failed to set up driver resource.\n");
6c621a22 11243 goto out_unset_driver_resource_s4;
3772a991
JS
11244 }
11245
079b5c91
JS
11246 /* Get the default values for Model Name and Description */
11247 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11248
3772a991
JS
11249 /* Create SCSI host to the physical port */
11250 error = lpfc_create_shost(phba);
11251 if (error) {
11252 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11253 "1415 Failed to create scsi host.\n");
3772a991
JS
11254 goto out_unset_driver_resource;
11255 }
9399627f 11256
5b75da2f 11257 /* Configure sysfs attributes */
3772a991
JS
11258 vport = phba->pport;
11259 error = lpfc_alloc_sysfs_attr(vport);
11260 if (error) {
9399627f 11261 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11262 "1416 Failed to allocate sysfs attr\n");
3772a991 11263 goto out_destroy_shost;
98c9ea5c 11264 }
875fbdfe 11265
6669f9bb 11266 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 11267 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 11268 cfg_mode = phba->cfg_use_msi;
5b75da2f 11269
7b15db32
JS
11270 /* Put device to a known state before enabling interrupt */
11271 lpfc_stop_port(phba);
895427bd 11272
7b15db32
JS
11273 /* Configure and enable interrupt */
11274 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
11275 if (intr_mode == LPFC_INTR_ERROR) {
11276 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11277 "0426 Failed to enable interrupt.\n");
11278 error = -ENODEV;
11279 goto out_free_sysfs_attr;
11280 }
11281 /* Default to single EQ for non-MSI-X */
895427bd
JS
11282 if (phba->intr_type != MSIX) {
11283 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
11284 phba->cfg_fcp_io_channel = 1;
2d7dbc4c 11285 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd 11286 phba->cfg_nvme_io_channel = 1;
2d7dbc4c
JS
11287 if (phba->nvmet_support)
11288 phba->cfg_nvmet_mrq = 1;
11289 }
895427bd
JS
11290 phba->io_channel_irqs = 1;
11291 }
11292
7b15db32
JS
11293 /* Set up SLI-4 HBA */
11294 if (lpfc_sli4_hba_setup(phba)) {
11295 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11296 "1421 Failed to set up hba\n");
11297 error = -ENODEV;
11298 goto out_disable_intr;
98c9ea5c 11299 }
858c9f6c 11300
7b15db32
JS
11301 /* Log the current active interrupt mode */
11302 phba->intr_mode = intr_mode;
11303 lpfc_log_intr_mode(phba, intr_mode);
11304
3772a991
JS
11305 /* Perform post initialization setup */
11306 lpfc_post_init_setup(phba);
dea3101e 11307
01649561
JS
11308 /* NVME support in FW earlier in the driver load corrects the
11309 * FC4 type making a check for nvme_support unnecessary.
11310 */
11311 if ((phba->nvmet_support == 0) &&
11312 (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
11313 /* Create NVME binding with nvme_fc_transport. This
d1f525aa
JS
11314 * ensures the vport is initialized. If the localport
11315 * create fails, it should not unload the driver to
11316 * support field issues.
01649561
JS
11317 */
11318 error = lpfc_nvme_create_localport(vport);
11319 if (error) {
11320 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11321 "6004 NVME registration failed, "
11322 "error x%x\n",
11323 error);
01649561
JS
11324 }
11325 }
895427bd 11326
c71ab861
JS
11327 /* check for firmware upgrade or downgrade */
11328 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 11329 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 11330
1c6834a7
JS
11331 /* Check if there are static vports to be created. */
11332 lpfc_create_static_vport(phba);
dea3101e
JB
11333 return 0;
11334
da0436e9
JS
11335out_disable_intr:
11336 lpfc_sli4_disable_intr(phba);
5b75da2f
JS
11337out_free_sysfs_attr:
11338 lpfc_free_sysfs_attr(vport);
3772a991
JS
11339out_destroy_shost:
11340 lpfc_destroy_shost(phba);
11341out_unset_driver_resource:
11342 lpfc_unset_driver_resource_phase2(phba);
da0436e9
JS
11343out_unset_driver_resource_s4:
11344 lpfc_sli4_driver_resource_unset(phba);
11345out_unset_pci_mem_s4:
11346 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS
11347out_disable_pci_dev:
11348 lpfc_disable_pci_dev(phba);
6669f9bb
JS
11349 if (shost)
11350 scsi_host_put(shost);
2e0fef85 11351out_free_phba:
3772a991 11352 lpfc_hba_free(phba);
dea3101e
JB
11353 return error;
11354}
11355
e59058c4 11356/**
da0436e9 11357 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS
11358 * @pdev: pointer to PCI device
11359 *
da0436e9
JS
11360 * This routine is called from the kernel's PCI subsystem to device with
11361 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS
11362 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11363 * device to be removed from the PCI subsystem properly.
e59058c4 11364 **/
6f039790 11365static void
da0436e9 11366lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 11367{
da0436e9 11368 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 11369 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 11370 struct lpfc_vport **vports;
da0436e9 11371 struct lpfc_hba *phba = vport->phba;
eada272d 11372 int i;
8a4df120 11373
da0436e9 11374 /* Mark the device unloading flag */
549e55cd 11375 spin_lock_irq(&phba->hbalock);
51ef4c26 11376 vport->load_flag |= FC_UNLOADING;
549e55cd 11377 spin_unlock_irq(&phba->hbalock);
2e0fef85 11378
da0436e9 11379 /* Free the HBA sysfs attributes */
858c9f6c
JS
11380 lpfc_free_sysfs_attr(vport);
11381
eada272d
JS
11382 /* Release all the vports against this physical port */
11383 vports = lpfc_create_vport_work_array(phba);
11384 if (vports != NULL)
587a37f6
JS
11385 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11386 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11387 continue;
eada272d 11388 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11389 }
eada272d
JS
11390 lpfc_destroy_vport_work_array(phba, vports);
11391
11392 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS
11393 fc_remove_host(shost);
11394 scsi_remove_host(shost);
da0436e9 11395
d613b6a7
JS
11396 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
11397 * localports are destroyed after to cleanup all transport memory.
895427bd 11398 */
87af33fe 11399 lpfc_cleanup(vport);
d613b6a7
JS
11400 lpfc_nvmet_destroy_targetport(phba);
11401 lpfc_nvme_destroy_localport(vport);
87af33fe 11402
2e0fef85 11403 /*
da0436e9 11404 * Bring down the SLI Layer. This step disables all interrupts,
2e0fef85 11405 * clears the rings, discards all mailbox commands, and resets
da0436e9 11406 * the HBA FCoE function.
2e0fef85 11407 */
da0436e9
JS
11408 lpfc_debugfs_terminate(vport);
11409 lpfc_sli4_hba_unset(phba);
a257bf90 11410
858c9f6c
JS
11411 spin_lock_irq(&phba->hbalock);
11412 list_del_init(&vport->listentry);
11413 spin_unlock_irq(&phba->hbalock);
11414
3677a3a7 11415 /* Perform scsi free before driver resource_unset since scsi
da0436e9 11416 * buffers are released to their corresponding pools here.
2e0fef85
JS
11417 */
11418 lpfc_scsi_free(phba);
895427bd 11419 lpfc_nvme_free(phba);
01649561 11420 lpfc_free_iocb_list(phba);
67d12733 11421
da0436e9 11422 lpfc_sli4_driver_resource_unset(phba);
ed957684 11423
da0436e9
JS
11424 /* Unmap adapter Control and Doorbell registers */
11425 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 11426
da0436e9
JS
11427 /* Release PCI resources and disable device's PCI function */
11428 scsi_host_put(shost);
11429 lpfc_disable_pci_dev(phba);
2e0fef85 11430
da0436e9 11431 /* Finally, free the driver's device data structure */
3772a991 11432 lpfc_hba_free(phba);
2e0fef85 11433
da0436e9 11434 return;
dea3101e
JB
11435}
11436
3a55b532 11437/**
da0436e9 11438 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS
11439 * @pdev: pointer to PCI device
11440 * @msg: power management message
11441 *
da0436e9
JS
11442 * This routine is called from the kernel's PCI subsystem to support system
11443 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
11444 * this method, it quiesces the device by stopping the driver's worker
11445 * thread for the device, turning off device's interrupt and DMA, and bring
11446 * the device offline. Note that as the driver implements the minimum PM
11447 * requirements to a power-aware driver's PM support for suspend/resume -- all
11448 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
11449 * method call will be treated as SUSPEND and the driver will fully
11450 * reinitialize its device during resume() method call, the driver will set
11451 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 11452 * according to the @msg provided by the PM.
3a55b532
JS
11453 *
11454 * Return code
3772a991
JS
11455 * 0 - driver suspended the device
11456 * Error otherwise
3a55b532
JS
11457 **/
11458static int
da0436e9 11459lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS
11460{
11461 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11462 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11463
11464 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 11465 "2843 PCI device Power Management suspend.\n");
3a55b532
JS
11466
11467 /* Bring down the device */
618a5230 11468 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS
11469 lpfc_offline(phba);
11470 kthread_stop(phba->worker_thread);
11471
11472 /* Disable interrupt from device */
da0436e9 11473 lpfc_sli4_disable_intr(phba);
5350d872 11474 lpfc_sli4_queue_destroy(phba);
3a55b532
JS
11475
11476 /* Save device state to PCI config space */
11477 pci_save_state(pdev);
11478 pci_set_power_state(pdev, PCI_D3hot);
11479
11480 return 0;
11481}
11482
11483/**
da0436e9 11484 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS
11485 * @pdev: pointer to PCI device
11486 *
da0436e9
JS
11487 * This routine is called from the kernel's PCI subsystem to support system
11488 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
11489 * this method, it restores the device's PCI config space state and fully
11490 * reinitializes the device and brings it online. Note that as the driver
11491 * implements the minimum PM requirements to a power-aware driver's PM for
11492 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11493 * to the suspend() method call will be treated as SUSPEND and the driver
11494 * will fully reinitialize its device during resume() method call, the device
11495 * will be set to PCI_D0 directly in PCI config space before restoring the
11496 * state.
3a55b532
JS
11497 *
11498 * Return code
3772a991
JS
11499 * 0 - driver suspended the device
11500 * Error otherwise
3a55b532
JS
11501 **/
11502static int
da0436e9 11503lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS
11504{
11505 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11506 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 11507 uint32_t intr_mode;
3a55b532
JS
11508 int error;
11509
11510 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 11511 "0292 PCI device Power Management resume.\n");
3a55b532
JS
11512
11513 /* Restore device state from PCI config space */
11514 pci_set_power_state(pdev, PCI_D0);
11515 pci_restore_state(pdev);
1dfb5a47
JS
11516
11517 /*
11518 * As the new kernel behavior of pci_restore_state() API call clears
11519 * device saved_state flag, need to save the restored state again.
11520 */
11521 pci_save_state(pdev);
11522
3a55b532
JS
11523 if (pdev->is_busmaster)
11524 pci_set_master(pdev);
11525
da0436e9 11526 /* Startup the kernel thread for this host adapter. */
3a55b532
JS
11527 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11528 "lpfc_worker_%d", phba->brd_no);
11529 if (IS_ERR(phba->worker_thread)) {
11530 error = PTR_ERR(phba->worker_thread);
11531 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11532 "0293 PM resume failed to start worker "
3a55b532
JS
11533 "thread: error=x%x.\n", error);
11534 return error;
11535 }
11536
5b75da2f 11537 /* Configure and enable interrupt */
da0436e9 11538 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 11539 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 11540 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11541 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS
11542 return -EIO;
11543 } else
11544 phba->intr_mode = intr_mode;
3a55b532
JS
11545
11546 /* Restart HBA and bring it online */
11547 lpfc_sli_brdrestart(phba);
11548 lpfc_online(phba);
11549
5b75da2f
JS
11550 /* Log the current active interrupt mode */
11551 lpfc_log_intr_mode(phba, phba->intr_mode);
11552
3a55b532
JS
11553 return 0;
11554}
11555
75baf696
JS
11556/**
11557 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
11558 * @phba: pointer to lpfc hba data structure.
11559 *
11560 * This routine is called to prepare the SLI4 device for PCI slot recover. It
11561 * aborts all the outstanding SCSI I/Os to the pci device.
11562 **/
11563static void
11564lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
11565{
75baf696
JS
11566 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11567 "2828 PCI channel I/O abort preparing for recovery\n");
11568 /*
11569 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11570 * and let the SCSI mid-layer to retry them to recover.
11571 */
db55fba8 11572 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS
11573}
11574
11575/**
11576 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
11577 * @phba: pointer to lpfc hba data structure.
11578 *
11579 * This routine is called to prepare the SLI4 device for PCI slot reset. It
11580 * disables the device interrupt and pci device, and aborts the internal FCP
11581 * pending I/Os.
11582 **/
11583static void
11584lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
11585{
11586 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11587 "2826 PCI channel disable preparing for reset\n");
11588
11589 /* Block any management I/Os to the device */
618a5230 11590 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS
11591
11592 /* Block all SCSI devices' I/Os on the host */
11593 lpfc_scsi_dev_block(phba);
11594
ea714f3d
JS
11595 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11596 lpfc_sli_flush_fcp_rings(phba);
11597
75baf696
JS
11598 /* stop all timers */
11599 lpfc_stop_hba_timers(phba);
11600
11601 /* Disable interrupt and pci device */
11602 lpfc_sli4_disable_intr(phba);
5350d872 11603 lpfc_sli4_queue_destroy(phba);
75baf696 11604 pci_disable_device(phba->pcidev);
75baf696
JS
11605}
11606
11607/**
11608 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
11609 * @phba: pointer to lpfc hba data structure.
11610 *
11611 * This routine is called to prepare the SLI4 device for PCI slot permanently
11612 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11613 * pending I/Os.
11614 **/
11615static void
11616lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
11617{
11618 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11619 "2827 PCI channel permanent disable for failure\n");
11620
11621 /* Block all SCSI devices' I/Os on the host */
11622 lpfc_scsi_dev_block(phba);
11623
11624 /* stop all timers */
11625 lpfc_stop_hba_timers(phba);
11626
11627 /* Clean up all driver's outstanding SCSI I/Os */
11628 lpfc_sli_flush_fcp_rings(phba);
11629}
11630
8d63f375 11631/**
da0436e9 11632 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS
11633 * @pdev: pointer to PCI device.
11634 * @state: the current PCI connection state.
8d63f375 11635 *
da0436e9
JS
11636 * This routine is called from the PCI subsystem for error handling to device
11637 * with SLI-4 interface spec. This function is called by the PCI subsystem
11638 * after a PCI bus error affecting this device has been detected. When this
11639 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11640 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11641 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS
11642 *
11643 * Return codes
3772a991
JS
11644 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11645 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11646 **/
3772a991 11647static pci_ers_result_t
da0436e9 11648lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11649{
75baf696
JS
11650 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11651 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11652
11653 switch (state) {
11654 case pci_channel_io_normal:
11655 /* Non-fatal error, prepare for recovery */
11656 lpfc_sli4_prep_dev_for_recover(phba);
11657 return PCI_ERS_RESULT_CAN_RECOVER;
11658 case pci_channel_io_frozen:
11659 /* Fatal error, prepare for slot reset */
11660 lpfc_sli4_prep_dev_for_reset(phba);
11661 return PCI_ERS_RESULT_NEED_RESET;
11662 case pci_channel_io_perm_failure:
11663 /* Permanent failure, prepare for device down */
11664 lpfc_sli4_prep_dev_for_perm_failure(phba);
11665 return PCI_ERS_RESULT_DISCONNECT;
11666 default:
11667 /* Unknown state, prepare and request slot reset */
11668 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11669 "2825 Unknown PCI error state: x%x\n", state);
11670 lpfc_sli4_prep_dev_for_reset(phba);
11671 return PCI_ERS_RESULT_NEED_RESET;
11672 }
8d63f375
LV
11673}
11674
11675/**
da0436e9 11676 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS
11677 * @pdev: pointer to PCI device.
11678 *
da0436e9
JS
11679 * This routine is called from the PCI subsystem for error handling to device
11680 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11681 * restart the PCI card from scratch, as if from a cold-boot. During the
11682 * PCI subsystem error recovery, after the driver returns
3772a991 11683 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS
11684 * recovery and then call this routine before calling the .resume method to
11685 * recover the device. This function will initialize the HBA device, enable
11686 * the interrupt, but it will just put the HBA to offline state without
11687 * passing any I/O traffic.
8d63f375 11688 *
e59058c4 11689 * Return codes
3772a991
JS
11690 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11691 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11692 */
3772a991 11693static pci_ers_result_t
da0436e9 11694lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11695{
75baf696
JS
11696 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11697 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11698 struct lpfc_sli *psli = &phba->sli;
11699 uint32_t intr_mode;
11700
11701 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11702 if (pci_enable_device_mem(pdev)) {
11703 printk(KERN_ERR "lpfc: Cannot re-enable "
11704 "PCI device after reset.\n");
11705 return PCI_ERS_RESULT_DISCONNECT;
11706 }
11707
11708 pci_restore_state(pdev);
0a96e975
JS
11709
11710 /*
11711 * As the new kernel behavior of pci_restore_state() API call clears
11712 * device saved_state flag, need to save the restored state again.
11713 */
11714 pci_save_state(pdev);
11715
75baf696
JS
11716 if (pdev->is_busmaster)
11717 pci_set_master(pdev);
11718
11719 spin_lock_irq(&phba->hbalock);
11720 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11721 spin_unlock_irq(&phba->hbalock);
11722
11723 /* Configure and enable interrupt */
11724 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11725 if (intr_mode == LPFC_INTR_ERROR) {
11726 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11727 "2824 Cannot re-enable interrupt after "
11728 "slot reset.\n");
11729 return PCI_ERS_RESULT_DISCONNECT;
11730 } else
11731 phba->intr_mode = intr_mode;
11732
11733 /* Log the current active interrupt mode */
11734 lpfc_log_intr_mode(phba, phba->intr_mode);
11735
8d63f375
LV
11736 return PCI_ERS_RESULT_RECOVERED;
11737}
11738
11739/**
da0436e9 11740 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11741 * @pdev: pointer to PCI device
8d63f375 11742 *
3772a991 11743 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11744 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS
11745 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11746 * error recovery. After this call, traffic can start to flow from this device
11747 * again.
da0436e9 11748 **/
3772a991 11749static void
da0436e9 11750lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11751{
75baf696
JS
11752 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11753 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11754
11755 /*
11756 * In case of slot reset, as function reset is performed through
11757 * mailbox command which needs DMA to be enabled, this operation
11758 * has to be moved to the io resume phase. Taking device offline
11759 * will perform the necessary cleanup.
11760 */
11761 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11762 /* Perform device reset */
618a5230 11763 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS
11764 lpfc_offline(phba);
11765 lpfc_sli_brdrestart(phba);
11766 /* Bring the device back online */
11767 lpfc_online(phba);
11768 }
11769
11770 /* Clean up Advanced Error Reporting (AER) if needed */
11771 if (phba->hba_flag & HBA_AER_ENABLED)
11772 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV
11773}
11774
3772a991
JS
11775/**
11776 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11777 * @pdev: pointer to PCI device
11778 * @pid: pointer to PCI device identifier
11779 *
11780 * This routine is to be registered to the kernel's PCI subsystem. When an
11781 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11782 * at PCI device-specific information of the device and driver to see if the
11783 * driver state that it can support this kind of device. If the match is
11784 * successful, the driver core invokes this routine. This routine dispatches
11785 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11786 * do all the initialization that it needs to do to handle the HBA device
11787 * properly.
11788 *
11789 * Return code
11790 * 0 - driver can claim the device
11791 * negative value - driver can not claim the device
11792 **/
6f039790 11793static int
3772a991
JS
11794lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11795{
11796 int rc;
8fa38513 11797 struct lpfc_sli_intf intf;
3772a991 11798
28baac74 11799 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS
11800 return -ENODEV;
11801
8fa38513 11802 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11803 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11804 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11805 else
3772a991 11806 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11807
3772a991
JS
11808 return rc;
11809}
11810
11811/**
11812 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11813 * @pdev: pointer to PCI device
11814 *
11815 * This routine is to be registered to the kernel's PCI subsystem. When an
11816 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11817 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11818 * remove routine, which will perform all the necessary cleanup for the
11819 * device to be removed from the PCI subsystem properly.
11820 **/
6f039790 11821static void
3772a991
JS
11822lpfc_pci_remove_one(struct pci_dev *pdev)
11823{
11824 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11825 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11826
11827 switch (phba->pci_dev_grp) {
11828 case LPFC_PCI_DEV_LP:
11829 lpfc_pci_remove_one_s3(pdev);
11830 break;
da0436e9
JS
11831 case LPFC_PCI_DEV_OC:
11832 lpfc_pci_remove_one_s4(pdev);
11833 break;
3772a991
JS
11834 default:
11835 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11836 "1424 Invalid PCI device group: 0x%x\n",
11837 phba->pci_dev_grp);
11838 break;
11839 }
11840 return;
11841}
11842
11843/**
11844 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11845 * @pdev: pointer to PCI device
11846 * @msg: power management message
11847 *
11848 * This routine is to be registered to the kernel's PCI subsystem to support
11849 * system Power Management (PM). When PM invokes this method, it dispatches
11850 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11851 * suspend the device.
11852 *
11853 * Return code
11854 * 0 - driver suspended the device
11855 * Error otherwise
11856 **/
11857static int
11858lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11859{
11860 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11861 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11862 int rc = -ENODEV;
11863
11864 switch (phba->pci_dev_grp) {
11865 case LPFC_PCI_DEV_LP:
11866 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11867 break;
da0436e9
JS
11868 case LPFC_PCI_DEV_OC:
11869 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11870 break;
3772a991
JS
11871 default:
11872 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11873 "1425 Invalid PCI device group: 0x%x\n",
11874 phba->pci_dev_grp);
11875 break;
11876 }
11877 return rc;
11878}
11879
11880/**
11881 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
11882 * @pdev: pointer to PCI device
11883 *
11884 * This routine is to be registered to the kernel's PCI subsystem to support
11885 * system Power Management (PM). When PM invokes this method, it dispatches
11886 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
11887 * resume the device.
11888 *
11889 * Return code
11890 * 0 - driver suspended the device
11891 * Error otherwise
11892 **/
11893static int
11894lpfc_pci_resume_one(struct pci_dev *pdev)
11895{
11896 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11897 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11898 int rc = -ENODEV;
11899
11900 switch (phba->pci_dev_grp) {
11901 case LPFC_PCI_DEV_LP:
11902 rc = lpfc_pci_resume_one_s3(pdev);
11903 break;
da0436e9
JS
11904 case LPFC_PCI_DEV_OC:
11905 rc = lpfc_pci_resume_one_s4(pdev);
11906 break;
3772a991
JS
11907 default:
11908 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11909 "1426 Invalid PCI device group: 0x%x\n",
11910 phba->pci_dev_grp);
11911 break;
11912 }
11913 return rc;
11914}
11915
11916/**
11917 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
11918 * @pdev: pointer to PCI device.
11919 * @state: the current PCI connection state.
11920 *
11921 * This routine is registered to the PCI subsystem for error handling. This
11922 * function is called by the PCI subsystem after a PCI bus error affecting
11923 * this device has been detected. When this routine is invoked, it dispatches
11924 * the action to the proper SLI-3 or SLI-4 device error detected handling
11925 * routine, which will perform the proper error detected operation.
11926 *
11927 * Return codes
11928 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11929 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11930 **/
11931static pci_ers_result_t
11932lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
11933{
11934 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11935 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11936 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11937
11938 switch (phba->pci_dev_grp) {
11939 case LPFC_PCI_DEV_LP:
11940 rc = lpfc_io_error_detected_s3(pdev, state);
11941 break;
da0436e9
JS
11942 case LPFC_PCI_DEV_OC:
11943 rc = lpfc_io_error_detected_s4(pdev, state);
11944 break;
3772a991
JS
11945 default:
11946 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11947 "1427 Invalid PCI device group: 0x%x\n",
11948 phba->pci_dev_grp);
11949 break;
11950 }
11951 return rc;
11952}
11953
11954/**
11955 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
11956 * @pdev: pointer to PCI device.
11957 *
11958 * This routine is registered to the PCI subsystem for error handling. This
11959 * function is called after PCI bus has been reset to restart the PCI card
11960 * from scratch, as if from a cold-boot. When this routine is invoked, it
11961 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
11962 * routine, which will perform the proper device reset.
11963 *
11964 * Return codes
11965 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11966 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11967 **/
11968static pci_ers_result_t
11969lpfc_io_slot_reset(struct pci_dev *pdev)
11970{
11971 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11972 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11973 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11974
11975 switch (phba->pci_dev_grp) {
11976 case LPFC_PCI_DEV_LP:
11977 rc = lpfc_io_slot_reset_s3(pdev);
11978 break;
da0436e9
JS
11979 case LPFC_PCI_DEV_OC:
11980 rc = lpfc_io_slot_reset_s4(pdev);
11981 break;
3772a991
JS
11982 default:
11983 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11984 "1428 Invalid PCI device group: 0x%x\n",
11985 phba->pci_dev_grp);
11986 break;
11987 }
11988 return rc;
11989}
11990
11991/**
11992 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
11993 * @pdev: pointer to PCI device
11994 *
11995 * This routine is registered to the PCI subsystem for error handling. It
11996 * is called when kernel error recovery tells the lpfc driver that it is
11997 * OK to resume normal PCI operation after PCI bus error recovery. When
11998 * this routine is invoked, it dispatches the action to the proper SLI-3
11999 * or SLI-4 device io_resume routine, which will resume the device operation.
12000 **/
12001static void
12002lpfc_io_resume(struct pci_dev *pdev)
12003{
12004 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12005 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12006
12007 switch (phba->pci_dev_grp) {
12008 case LPFC_PCI_DEV_LP:
12009 lpfc_io_resume_s3(pdev);
12010 break;
da0436e9
JS
12011 case LPFC_PCI_DEV_OC:
12012 lpfc_io_resume_s4(pdev);
12013 break;
3772a991
JS
12014 default:
12015 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12016 "1429 Invalid PCI device group: 0x%x\n",
12017 phba->pci_dev_grp);
12018 break;
12019 }
12020 return;
12021}
12022
1ba981fd
JS
12023/**
12024 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
12025 * @phba: pointer to lpfc hba data structure.
12026 *
12027 * This routine checks to see if OAS is supported for this adapter. If
12028 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
12029 * the enable oas flag is cleared and the pool created for OAS device data
12030 * is destroyed.
12031 *
12032 **/
12033void
12034lpfc_sli4_oas_verify(struct lpfc_hba *phba)
12035{
12036
12037 if (!phba->cfg_EnableXLane)
12038 return;
12039
12040 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
12041 phba->cfg_fof = 1;
12042 } else {
f38fa0bb 12043 phba->cfg_fof = 0;
1ba981fd
JS
12044 if (phba->device_data_mem_pool)
12045 mempool_destroy(phba->device_data_mem_pool);
12046 phba->device_data_mem_pool = NULL;
12047 }
12048
12049 return;
12050}
12051
12052/**
12053 * lpfc_fof_queue_setup - Set up all the fof queues
12054 * @phba: pointer to lpfc hba data structure.
12055 *
12056 * This routine is invoked to set up all the fof queues for the FC HBA
12057 * operation.
12058 *
12059 * Return codes
12060 * 0 - successful
12061 * -ENOMEM - No available memory
12062 **/
12063int
12064lpfc_fof_queue_setup(struct lpfc_hba *phba)
12065{
895427bd 12066 struct lpfc_sli_ring *pring;
1ba981fd
JS
12067 int rc;
12068
12069 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
12070 if (rc)
12071 return -ENOMEM;
12072
f38fa0bb 12073 if (phba->cfg_fof) {
1ba981fd
JS
12074
12075 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
12076 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
12077 if (rc)
12078 goto out_oas_cq;
12079
12080 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
12081 phba->sli4_hba.oas_cq, LPFC_FCP);
12082 if (rc)
12083 goto out_oas_wq;
12084
895427bd
JS
12085 /* Bind this CQ/WQ to the NVME ring */
12086 pring = phba->sli4_hba.oas_wq->pring;
12087 pring->sli.sli4.wqp =
12088 (void *)phba->sli4_hba.oas_wq;
12089 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS
12090 }
12091
12092 return 0;
12093
12094out_oas_wq:
f38fa0bb 12095 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS
12096out_oas_cq:
12097 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
12098 return rc;
12099
12100}
12101
12102/**
12103 * lpfc_fof_queue_create - Create all the fof queues
12104 * @phba: pointer to lpfc hba data structure.
12105 *
12106 * This routine is invoked to allocate all the fof queues for the FC HBA
12107 * operation. For each SLI4 queue type, the parameters such as queue entry
12108 * count (queue depth) shall be taken from the module parameter. For now,
12109 * we just use some constant number as place holder.
12110 *
12111 * Return codes
12112 * 0 - successful
12113 * -ENOMEM - No availble memory
12114 * -EIO - The mailbox failed to complete successfully.
12115 **/
12116int
12117lpfc_fof_queue_create(struct lpfc_hba *phba)
12118{
12119 struct lpfc_queue *qdesc;
7e04e21a 12120 uint32_t wqesize;
1ba981fd
JS
12121
12122 /* Create FOF EQ */
12123 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
12124 phba->sli4_hba.eq_ecount);
12125 if (!qdesc)
12126 goto out_error;
12127
12128 phba->sli4_hba.fof_eq = qdesc;
12129
f38fa0bb 12130 if (phba->cfg_fof) {
1ba981fd
JS
12131
12132 /* Create OAS CQ */
12133 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
12134 phba->sli4_hba.cq_ecount);
12135 if (!qdesc)
12136 goto out_error;
12137
12138 phba->sli4_hba.oas_cq = qdesc;
12139
12140 /* Create OAS WQ */
7e04e21a
JS
12141 wqesize = (phba->fcp_embed_io) ?
12142 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
12143 qdesc = lpfc_sli4_queue_alloc(phba, wqesize,
1ba981fd 12144 phba->sli4_hba.wq_ecount);
7e04e21a 12145
1ba981fd
JS
12146 if (!qdesc)
12147 goto out_error;
12148
12149 phba->sli4_hba.oas_wq = qdesc;
895427bd 12150 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS
12151
12152 }
12153 return 0;
12154
12155out_error:
12156 lpfc_fof_queue_destroy(phba);
12157 return -ENOMEM;
12158}
12159
12160/**
12161 * lpfc_fof_queue_destroy - Destroy all the fof queues
12162 * @phba: pointer to lpfc hba data structure.
12163 *
12164 * This routine is invoked to release all the SLI4 queues with the FC HBA
12165 * operation.
12166 *
12167 * Return codes
12168 * 0 - successful
12169 **/
12170int
12171lpfc_fof_queue_destroy(struct lpfc_hba *phba)
12172{
12173 /* Release FOF Event queue */
12174 if (phba->sli4_hba.fof_eq != NULL) {
12175 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
12176 phba->sli4_hba.fof_eq = NULL;
12177 }
12178
12179 /* Release OAS Completion queue */
12180 if (phba->sli4_hba.oas_cq != NULL) {
12181 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
12182 phba->sli4_hba.oas_cq = NULL;
12183 }
12184
12185 /* Release OAS Work queue */
12186 if (phba->sli4_hba.oas_wq != NULL) {
12187 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
12188 phba->sli4_hba.oas_wq = NULL;
12189 }
12190 return 0;
12191}
12192
dea3101e
JB
12193MODULE_DEVICE_TABLE(pci, lpfc_id_table);
12194
a55b2d21 12195static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV
12196 .error_detected = lpfc_io_error_detected,
12197 .slot_reset = lpfc_io_slot_reset,
12198 .resume = lpfc_io_resume,
12199};
12200
dea3101e
JB
12201static struct pci_driver lpfc_driver = {
12202 .name = LPFC_DRIVER_NAME,
12203 .id_table = lpfc_id_table,
12204 .probe = lpfc_pci_probe_one,
6f039790 12205 .remove = lpfc_pci_remove_one,
85e8a239 12206 .shutdown = lpfc_pci_remove_one,
3a55b532 12207 .suspend = lpfc_pci_suspend_one,
3772a991 12208 .resume = lpfc_pci_resume_one,
2e0fef85 12209 .err_handler = &lpfc_err_handler,
dea3101e
JB
12210};
12211
3ef6d24c 12212static const struct file_operations lpfc_mgmt_fop = {
858feacd 12213 .owner = THIS_MODULE,
3ef6d24c
JS
12214};
12215
12216static struct miscdevice lpfc_mgmt_dev = {
12217 .minor = MISC_DYNAMIC_MINOR,
12218 .name = "lpfcmgmt",
12219 .fops = &lpfc_mgmt_fop,
12220};
12221
e59058c4 12222/**
3621a710 12223 * lpfc_init - lpfc module initialization routine
e59058c4
JS
12224 *
12225 * This routine is to be invoked when the lpfc module is loaded into the
12226 * kernel. The special kernel macro module_init() is used to indicate the
12227 * role of this routine to the kernel as lpfc module entry point.
12228 *
12229 * Return codes
12230 * 0 - successful
12231 * -ENOMEM - FC attach transport failed
12232 * all others - failed
12233 */
dea3101e
JB
12234static int __init
12235lpfc_init(void)
12236{
12237 int error = 0;
12238
12239 printk(LPFC_MODULE_DESC "\n");
c44ce173 12240 printk(LPFC_COPYRIGHT "\n");
dea3101e 12241
3ef6d24c
JS
12242 error = misc_register(&lpfc_mgmt_dev);
12243 if (error)
12244 printk(KERN_ERR "Could not register lpfcmgmt device, "
12245 "misc_register returned with status %d", error);
12246
458c083e
JS
12247 lpfc_transport_functions.vport_create = lpfc_vport_create;
12248 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e
JB
12249 lpfc_transport_template =
12250 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 12251 if (lpfc_transport_template == NULL)
dea3101e 12252 return -ENOMEM;
458c083e
JS
12253 lpfc_vport_transport_template =
12254 fc_attach_transport(&lpfc_vport_transport_functions);
12255 if (lpfc_vport_transport_template == NULL) {
12256 fc_release_transport(lpfc_transport_template);
12257 return -ENOMEM;
7ee5d43e 12258 }
7bb03bbf
JS
12259
12260 /* Initialize in case vector mapping is needed */
b246de17 12261 lpfc_used_cpu = NULL;
2ea259ee 12262 lpfc_present_cpu = num_present_cpus();
7bb03bbf 12263
dea3101e 12264 error = pci_register_driver(&lpfc_driver);
92d7f7b0 12265 if (error) {
dea3101e 12266 fc_release_transport(lpfc_transport_template);
458c083e 12267 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 12268 }
dea3101e
JB
12269
12270 return error;
12271}
12272
e59058c4 12273/**
3621a710 12274 * lpfc_exit - lpfc module removal routine
e59058c4
JS
12275 *
12276 * This routine is invoked when the lpfc module is removed from the kernel.
12277 * The special kernel macro module_exit() is used to indicate the role of
12278 * this routine to the kernel as lpfc module exit point.
12279 */
dea3101e
JB
12280static void __exit
12281lpfc_exit(void)
12282{
3ef6d24c 12283 misc_deregister(&lpfc_mgmt_dev);
dea3101e
JB
12284 pci_unregister_driver(&lpfc_driver);
12285 fc_release_transport(lpfc_transport_template);
458c083e 12286 fc_release_transport(lpfc_vport_transport_template);
81301a9b 12287 if (_dump_buf_data) {
6a9c52cf
JS
12288 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
12289 "_dump_buf_data at 0x%p\n",
81301a9b
JS
12290 (1L << _dump_buf_data_order), _dump_buf_data);
12291 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
12292 }
12293
12294 if (_dump_buf_dif) {
6a9c52cf
JS
12295 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
12296 "_dump_buf_dif at 0x%p\n",
81301a9b
JS
12297 (1L << _dump_buf_dif_order), _dump_buf_dif);
12298 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
12299 }
b246de17 12300 kfree(lpfc_used_cpu);
7973967f 12301 idr_destroy(&lpfc_hba_index);
dea3101e
JB
12302}
12303
12304module_init(lpfc_init);
12305module_exit(lpfc_exit);
12306MODULE_LICENSE("GPL");
12307MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 12308MODULE_AUTHOR("Broadcom");
dea3101e 12309MODULE_VERSION("0:" LPFC_DRIVER_VERSION);