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scsi: lpfc: Fix unmap of dpp bars affecting next driver load
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1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
0d041215 4 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term *
3e21d1cb 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
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10 * *
11 * This program is free software; you can redistribute it and/or *
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12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
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22 *******************************************************************/
23
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24#include <linux/blkdev.h>
25#include <linux/pci.h>
26#include <linux/interrupt.h>
27#include <linux/delay.h>
5a0e3ad6 28#include <linux/slab.h>
1c2ba475 29#include <linux/lockdep.h>
dea3101e 30
91886523 31#include <scsi/scsi.h>
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32#include <scsi/scsi_cmnd.h>
33#include <scsi/scsi_device.h>
34#include <scsi/scsi_host.h>
f888ba3c 35#include <scsi/scsi_transport_fc.h>
da0436e9 36#include <scsi/fc/fc_fs.h>
0d878419 37#include <linux/aer.h>
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38#ifdef CONFIG_X86
39#include <asm/set_memory.h>
40#endif
dea3101e 41
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42#include <linux/nvme-fc-driver.h>
43
da0436e9 44#include "lpfc_hw4.h"
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45#include "lpfc_hw.h"
46#include "lpfc_sli.h"
da0436e9 47#include "lpfc_sli4.h"
ea2151b4 48#include "lpfc_nl.h"
dea3101e 49#include "lpfc_disc.h"
dea3101e 50#include "lpfc.h"
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51#include "lpfc_scsi.h"
52#include "lpfc_nvme.h"
f358dd0c 53#include "lpfc_nvmet.h"
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54#include "lpfc_crtn.h"
55#include "lpfc_logmsg.h"
56#include "lpfc_compat.h"
858c9f6c 57#include "lpfc_debugfs.h"
04c68496 58#include "lpfc_vport.h"
61bda8f7 59#include "lpfc_version.h"
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60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
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69
70/* Provide function prototypes local to this module. */
71static int lpfc_sli_issue_mbox_s4(struct lpfc_hba *, LPFC_MBOXQ_t *,
72 uint32_t);
73static int lpfc_sli4_read_rev(struct lpfc_hba *, LPFC_MBOXQ_t *,
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74 uint8_t *, uint32_t *);
75static struct lpfc_iocbq *lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *,
76 struct lpfc_iocbq *);
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77static void lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *,
78 struct hbq_dmabuf *);
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79static void lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
80 struct hbq_dmabuf *dmabuf);
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81static bool lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba,
82 struct lpfc_queue *cq, struct lpfc_cqe *cqe);
895427bd 83static int lpfc_sli4_post_sgl_list(struct lpfc_hba *, struct list_head *,
8a9d2e80 84 int);
f485c18d 85static void lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba,
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86 struct lpfc_queue *eq,
87 struct lpfc_eqe *eqe);
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88static bool lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba);
89static bool lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba);
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90static struct lpfc_cqe *lpfc_sli4_cq_get(struct lpfc_queue *q);
91static void __lpfc_sli4_consume_cqe(struct lpfc_hba *phba,
92 struct lpfc_queue *cq,
93 struct lpfc_cqe *cqe);
0558056c 94
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95static IOCB_t *
96lpfc_get_iocb_from_iocbq(struct lpfc_iocbq *iocbq)
97{
98 return &iocbq->iocb;
99}
100
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101#if defined(CONFIG_64BIT) && defined(__LITTLE_ENDIAN)
102/**
103 * lpfc_sli4_pcimem_bcopy - SLI4 memory copy function
104 * @srcp: Source memory pointer.
105 * @destp: Destination memory pointer.
106 * @cnt: Number of words required to be copied.
107 * Must be a multiple of sizeof(uint64_t)
108 *
109 * This function is used for copying data between driver memory
110 * and the SLI WQ. This function also changes the endianness
111 * of each word if native endianness is different from SLI
112 * endianness. This function can be called with or without
113 * lock.
114 **/
d7b761b0 115static void
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116lpfc_sli4_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
117{
118 uint64_t *src = srcp;
119 uint64_t *dest = destp;
120 int i;
121
122 for (i = 0; i < (int)cnt; i += sizeof(uint64_t))
123 *dest++ = *src++;
124}
125#else
126#define lpfc_sli4_pcimem_bcopy(a, b, c) lpfc_sli_pcimem_bcopy(a, b, c)
127#endif
128
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129/**
130 * lpfc_sli4_wq_put - Put a Work Queue Entry on an Work Queue
131 * @q: The Work Queue to operate on.
132 * @wqe: The work Queue Entry to put on the Work queue.
133 *
134 * This routine will copy the contents of @wqe to the next available entry on
135 * the @q. This function will then ring the Work Queue Doorbell to signal the
136 * HBA to start processing the Work Queue Entry. This function returns 0 if
137 * successful. If no entries are available on @q then this function will return
138 * -ENOMEM.
139 * The caller is expected to hold the hbalock when calling this routine.
140 **/
cd22d605 141static int
205e8240 142lpfc_sli4_wq_put(struct lpfc_queue *q, union lpfc_wqe128 *wqe)
4f774513 143{
2e90f4b5 144 union lpfc_wqe *temp_wqe;
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145 struct lpfc_register doorbell;
146 uint32_t host_index;
027140ea 147 uint32_t idx;
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148 uint32_t i = 0;
149 uint8_t *tmp;
5cc167dd 150 u32 if_type;
4f774513 151
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152 /* sanity check on queue memory */
153 if (unlikely(!q))
154 return -ENOMEM;
9afbee3d 155 temp_wqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 156
4f774513 157 /* If the host has not yet processed the next entry then we are done */
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158 idx = ((q->host_index + 1) % q->entry_count);
159 if (idx == q->hba_index) {
b84daac9 160 q->WQ_overflow++;
cd22d605 161 return -EBUSY;
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162 }
163 q->WQ_posted++;
4f774513 164 /* set consumption flag every once in a while */
32517fc0 165 if (!((q->host_index + 1) % q->notify_interval))
f0d9bccc 166 bf_set(wqe_wqec, &wqe->generic.wqe_com, 1);
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167 else
168 bf_set(wqe_wqec, &wqe->generic.wqe_com, 0);
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169 if (q->phba->sli3_options & LPFC_SLI4_PHWQ_ENABLED)
170 bf_set(wqe_wqid, &wqe->generic.wqe_com, q->queue_id);
48f8fdb4 171 lpfc_sli4_pcimem_bcopy(wqe, temp_wqe, q->entry_size);
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172 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
173 /* write to DPP aperture taking advatage of Combined Writes */
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174 tmp = (uint8_t *)temp_wqe;
175#ifdef __raw_writeq
1351e69f 176 for (i = 0; i < q->entry_size; i += sizeof(uint64_t))
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177 __raw_writeq(*((uint64_t *)(tmp + i)),
178 q->dpp_regaddr + i);
179#else
180 for (i = 0; i < q->entry_size; i += sizeof(uint32_t))
181 __raw_writel(*((uint32_t *)(tmp + i)),
182 q->dpp_regaddr + i);
183#endif
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184 }
185 /* ensure WQE bcopy and DPP flushed before doorbell write */
6b3b3bdb 186 wmb();
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187
188 /* Update the host index before invoking device */
189 host_index = q->host_index;
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190
191 q->host_index = idx;
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192
193 /* Ring Doorbell */
194 doorbell.word0 = 0;
962bc51b 195 if (q->db_format == LPFC_DB_LIST_FORMAT) {
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196 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
197 bf_set(lpfc_if6_wq_db_list_fm_num_posted, &doorbell, 1);
198 bf_set(lpfc_if6_wq_db_list_fm_dpp, &doorbell, 1);
199 bf_set(lpfc_if6_wq_db_list_fm_dpp_id, &doorbell,
200 q->dpp_id);
201 bf_set(lpfc_if6_wq_db_list_fm_id, &doorbell,
202 q->queue_id);
203 } else {
204 bf_set(lpfc_wq_db_list_fm_num_posted, &doorbell, 1);
1351e69f 205 bf_set(lpfc_wq_db_list_fm_id, &doorbell, q->queue_id);
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206
207 /* Leave bits <23:16> clear for if_type 6 dpp */
208 if_type = bf_get(lpfc_sli_intf_if_type,
209 &q->phba->sli4_hba.sli_intf);
210 if (if_type != LPFC_SLI_INTF_IF_TYPE_6)
211 bf_set(lpfc_wq_db_list_fm_index, &doorbell,
212 host_index);
1351e69f 213 }
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214 } else if (q->db_format == LPFC_DB_RING_FORMAT) {
215 bf_set(lpfc_wq_db_ring_fm_num_posted, &doorbell, 1);
216 bf_set(lpfc_wq_db_ring_fm_id, &doorbell, q->queue_id);
217 } else {
218 return -EINVAL;
219 }
220 writel(doorbell.word0, q->db_regaddr);
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221
222 return 0;
223}
224
225/**
226 * lpfc_sli4_wq_release - Updates internal hba index for WQ
227 * @q: The Work Queue to operate on.
228 * @index: The index to advance the hba index to.
229 *
230 * This routine will update the HBA index of a queue to reflect consumption of
231 * Work Queue Entries by the HBA. When the HBA indicates that it has consumed
232 * an entry the host calls this function to update the queue's internal
233 * pointers. This routine returns the number of entries that were consumed by
234 * the HBA.
235 **/
236static uint32_t
237lpfc_sli4_wq_release(struct lpfc_queue *q, uint32_t index)
238{
239 uint32_t released = 0;
240
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241 /* sanity check on queue memory */
242 if (unlikely(!q))
243 return 0;
244
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245 if (q->hba_index == index)
246 return 0;
247 do {
248 q->hba_index = ((q->hba_index + 1) % q->entry_count);
249 released++;
250 } while (q->hba_index != index);
251 return released;
252}
253
254/**
255 * lpfc_sli4_mq_put - Put a Mailbox Queue Entry on an Mailbox Queue
256 * @q: The Mailbox Queue to operate on.
257 * @wqe: The Mailbox Queue Entry to put on the Work queue.
258 *
259 * This routine will copy the contents of @mqe to the next available entry on
260 * the @q. This function will then ring the Work Queue Doorbell to signal the
261 * HBA to start processing the Work Queue Entry. This function returns 0 if
262 * successful. If no entries are available on @q then this function will return
263 * -ENOMEM.
264 * The caller is expected to hold the hbalock when calling this routine.
265 **/
266static uint32_t
267lpfc_sli4_mq_put(struct lpfc_queue *q, struct lpfc_mqe *mqe)
268{
2e90f4b5 269 struct lpfc_mqe *temp_mqe;
4f774513 270 struct lpfc_register doorbell;
4f774513 271
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272 /* sanity check on queue memory */
273 if (unlikely(!q))
274 return -ENOMEM;
9afbee3d 275 temp_mqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 276
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277 /* If the host has not yet processed the next entry then we are done */
278 if (((q->host_index + 1) % q->entry_count) == q->hba_index)
279 return -ENOMEM;
48f8fdb4 280 lpfc_sli4_pcimem_bcopy(mqe, temp_mqe, q->entry_size);
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281 /* Save off the mailbox pointer for completion */
282 q->phba->mbox = (MAILBOX_t *)temp_mqe;
283
284 /* Update the host index before invoking device */
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285 q->host_index = ((q->host_index + 1) % q->entry_count);
286
287 /* Ring Doorbell */
288 doorbell.word0 = 0;
289 bf_set(lpfc_mq_doorbell_num_posted, &doorbell, 1);
290 bf_set(lpfc_mq_doorbell_id, &doorbell, q->queue_id);
291 writel(doorbell.word0, q->phba->sli4_hba.MQDBregaddr);
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292 return 0;
293}
294
295/**
296 * lpfc_sli4_mq_release - Updates internal hba index for MQ
297 * @q: The Mailbox Queue to operate on.
298 *
299 * This routine will update the HBA index of a queue to reflect consumption of
300 * a Mailbox Queue Entry by the HBA. When the HBA indicates that it has consumed
301 * an entry the host calls this function to update the queue's internal
302 * pointers. This routine returns the number of entries that were consumed by
303 * the HBA.
304 **/
305static uint32_t
306lpfc_sli4_mq_release(struct lpfc_queue *q)
307{
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308 /* sanity check on queue memory */
309 if (unlikely(!q))
310 return 0;
311
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312 /* Clear the mailbox pointer for completion */
313 q->phba->mbox = NULL;
314 q->hba_index = ((q->hba_index + 1) % q->entry_count);
315 return 1;
316}
317
318/**
319 * lpfc_sli4_eq_get - Gets the next valid EQE from a EQ
320 * @q: The Event Queue to get the first valid EQE from
321 *
322 * This routine will get the first valid Event Queue Entry from @q, update
323 * the queue's internal hba index, and return the EQE. If no valid EQEs are in
324 * the Queue (no more work to do), or the Queue is full of EQEs that have been
325 * processed, but not popped back to the HBA then this routine will return NULL.
326 **/
327static struct lpfc_eqe *
328lpfc_sli4_eq_get(struct lpfc_queue *q)
329{
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330 struct lpfc_eqe *eqe;
331
332 /* sanity check on queue memory */
333 if (unlikely(!q))
334 return NULL;
9afbee3d 335 eqe = lpfc_sli4_qe(q, q->host_index);
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336
337 /* If the next EQE is not valid then we are done */
7365f6fd 338 if (bf_get_le32(lpfc_eqe_valid, eqe) != q->qe_valid)
4f774513 339 return NULL;
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340
341 /*
342 * insert barrier for instruction interlock : data from the hardware
343 * must have the valid bit checked before it can be copied and acted
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344 * upon. Speculative instructions were allowing a bcopy at the start
345 * of lpfc_sli4_fp_handle_wcqe(), which is called immediately
346 * after our return, to copy data before the valid bit check above
347 * was done. As such, some of the copied data was stale. The barrier
348 * ensures the check is before any data is copied.
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349 */
350 mb();
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351 return eqe;
352}
353
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354/**
355 * lpfc_sli4_eq_clr_intr - Turn off interrupts from this EQ
356 * @q: The Event Queue to disable interrupts
357 *
358 **/
92f3b327 359void
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360lpfc_sli4_eq_clr_intr(struct lpfc_queue *q)
361{
362 struct lpfc_register doorbell;
363
364 doorbell.word0 = 0;
365 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
366 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
367 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
368 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
369 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 370 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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371}
372
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373/**
374 * lpfc_sli4_if6_eq_clr_intr - Turn off interrupts from this EQ
375 * @q: The Event Queue to disable interrupts
376 *
377 **/
92f3b327 378void
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379lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q)
380{
381 struct lpfc_register doorbell;
382
383 doorbell.word0 = 0;
aad59d5d 384 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
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385 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
386}
387
4f774513 388/**
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389 * lpfc_sli4_write_eq_db - write EQ DB for eqe's consumed or arm state
390 * @phba: adapter with EQ
4f774513 391 * @q: The Event Queue that the host has completed processing for.
32517fc0 392 * @count: Number of elements that have been consumed
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393 * @arm: Indicates whether the host wants to arms this CQ.
394 *
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395 * This routine will notify the HBA, by ringing the doorbell, that count
396 * number of EQEs have been processed. The @arm parameter indicates whether
397 * the queue should be rearmed when ringing the doorbell.
4f774513 398 **/
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399void
400lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
401 uint32_t count, bool arm)
4f774513 402{
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403 struct lpfc_register doorbell;
404
2e90f4b5 405 /* sanity check on queue memory */
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406 if (unlikely(!q || (count == 0 && !arm)))
407 return;
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408
409 /* ring doorbell for number popped */
410 doorbell.word0 = 0;
411 if (arm) {
412 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
413 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
414 }
32517fc0 415 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, count);
4f774513 416 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
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417 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
418 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
419 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 420 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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421 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
422 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
9dd35425 423 readl(q->phba->sli4_hba.EQDBregaddr);
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424}
425
27d6ac0a 426/**
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427 * lpfc_sli4_if6_write_eq_db - write EQ DB for eqe's consumed or arm state
428 * @phba: adapter with EQ
27d6ac0a 429 * @q: The Event Queue that the host has completed processing for.
32517fc0 430 * @count: Number of elements that have been consumed
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431 * @arm: Indicates whether the host wants to arms this CQ.
432 *
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433 * This routine will notify the HBA, by ringing the doorbell, that count
434 * number of EQEs have been processed. The @arm parameter indicates whether
435 * the queue should be rearmed when ringing the doorbell.
27d6ac0a 436 **/
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437void
438lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
439 uint32_t count, bool arm)
27d6ac0a 440{
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441 struct lpfc_register doorbell;
442
443 /* sanity check on queue memory */
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444 if (unlikely(!q || (count == 0 && !arm)))
445 return;
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446
447 /* ring doorbell for number popped */
448 doorbell.word0 = 0;
449 if (arm)
450 bf_set(lpfc_if6_eq_doorbell_arm, &doorbell, 1);
32517fc0 451 bf_set(lpfc_if6_eq_doorbell_num_released, &doorbell, count);
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452 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
453 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
454 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
455 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
456 readl(q->phba->sli4_hba.EQDBregaddr);
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457}
458
459static void
460__lpfc_sli4_consume_eqe(struct lpfc_hba *phba, struct lpfc_queue *eq,
461 struct lpfc_eqe *eqe)
462{
463 if (!phba->sli4_hba.pc_sli4_params.eqav)
464 bf_set_le32(lpfc_eqe_valid, eqe, 0);
465
466 eq->host_index = ((eq->host_index + 1) % eq->entry_count);
467
468 /* if the index wrapped around, toggle the valid bit */
469 if (phba->sli4_hba.pc_sli4_params.eqav && !eq->host_index)
470 eq->qe_valid = (eq->qe_valid) ? 0 : 1;
471}
472
473static void
24c7c0a6 474lpfc_sli4_eqcq_flush(struct lpfc_hba *phba, struct lpfc_queue *eq)
32517fc0 475{
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JS
476 struct lpfc_eqe *eqe = NULL;
477 u32 eq_count = 0, cq_count = 0;
478 struct lpfc_cqe *cqe = NULL;
479 struct lpfc_queue *cq = NULL, *childq = NULL;
480 int cqid = 0;
32517fc0
JS
481
482 /* walk all the EQ entries and drop on the floor */
483 eqe = lpfc_sli4_eq_get(eq);
484 while (eqe) {
24c7c0a6
JS
485 /* Get the reference to the corresponding CQ */
486 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
487 cq = NULL;
488
489 list_for_each_entry(childq, &eq->child_list, list) {
490 if (childq->queue_id == cqid) {
491 cq = childq;
492 break;
493 }
494 }
495 /* If CQ is valid, iterate through it and drop all the CQEs */
496 if (cq) {
497 cqe = lpfc_sli4_cq_get(cq);
498 while (cqe) {
499 __lpfc_sli4_consume_cqe(phba, cq, cqe);
500 cq_count++;
501 cqe = lpfc_sli4_cq_get(cq);
502 }
503 /* Clear and re-arm the CQ */
504 phba->sli4_hba.sli4_write_cq_db(phba, cq, cq_count,
505 LPFC_QUEUE_REARM);
506 cq_count = 0;
507 }
32517fc0 508 __lpfc_sli4_consume_eqe(phba, eq, eqe);
24c7c0a6 509 eq_count++;
32517fc0
JS
510 eqe = lpfc_sli4_eq_get(eq);
511 }
512
513 /* Clear and re-arm the EQ */
24c7c0a6 514 phba->sli4_hba.sli4_write_eq_db(phba, eq, eq_count, LPFC_QUEUE_REARM);
32517fc0
JS
515}
516
517static int
93a4d6f4
JS
518lpfc_sli4_process_eq(struct lpfc_hba *phba, struct lpfc_queue *eq,
519 uint8_t rearm)
32517fc0
JS
520{
521 struct lpfc_eqe *eqe;
522 int count = 0, consumed = 0;
523
524 if (cmpxchg(&eq->queue_claimed, 0, 1) != 0)
525 goto rearm_and_exit;
526
527 eqe = lpfc_sli4_eq_get(eq);
528 while (eqe) {
529 lpfc_sli4_hba_handle_eqe(phba, eq, eqe);
530 __lpfc_sli4_consume_eqe(phba, eq, eqe);
531
532 consumed++;
533 if (!(++count % eq->max_proc_limit))
534 break;
535
536 if (!(count % eq->notify_interval)) {
537 phba->sli4_hba.sli4_write_eq_db(phba, eq, consumed,
538 LPFC_QUEUE_NOARM);
539 consumed = 0;
540 }
541
542 eqe = lpfc_sli4_eq_get(eq);
543 }
544 eq->EQ_processed += count;
545
546 /* Track the max number of EQEs processed in 1 intr */
547 if (count > eq->EQ_max_eqe)
548 eq->EQ_max_eqe = count;
549
550 eq->queue_claimed = 0;
551
552rearm_and_exit:
93a4d6f4
JS
553 /* Always clear the EQ. */
554 phba->sli4_hba.sli4_write_eq_db(phba, eq, consumed, rearm);
32517fc0
JS
555
556 return count;
27d6ac0a
JS
557}
558
4f774513
JS
559/**
560 * lpfc_sli4_cq_get - Gets the next valid CQE from a CQ
561 * @q: The Completion Queue to get the first valid CQE from
562 *
563 * This routine will get the first valid Completion Queue Entry from @q, update
564 * the queue's internal hba index, and return the CQE. If no valid CQEs are in
565 * the Queue (no more work to do), or the Queue is full of CQEs that have been
566 * processed, but not popped back to the HBA then this routine will return NULL.
567 **/
568static struct lpfc_cqe *
569lpfc_sli4_cq_get(struct lpfc_queue *q)
570{
571 struct lpfc_cqe *cqe;
572
2e90f4b5
JS
573 /* sanity check on queue memory */
574 if (unlikely(!q))
575 return NULL;
9afbee3d 576 cqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 577
4f774513 578 /* If the next CQE is not valid then we are done */
7365f6fd 579 if (bf_get_le32(lpfc_cqe_valid, cqe) != q->qe_valid)
4f774513 580 return NULL;
27f344eb
JS
581
582 /*
583 * insert barrier for instruction interlock : data from the hardware
584 * must have the valid bit checked before it can be copied and acted
2ea259ee
JS
585 * upon. Given what was seen in lpfc_sli4_cq_get() of speculative
586 * instructions allowing action on content before valid bit checked,
587 * add barrier here as well. May not be needed as "content" is a
588 * single 32-bit entity here (vs multi word structure for cq's).
27f344eb
JS
589 */
590 mb();
4f774513
JS
591 return cqe;
592}
593
32517fc0
JS
594static void
595__lpfc_sli4_consume_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
596 struct lpfc_cqe *cqe)
597{
598 if (!phba->sli4_hba.pc_sli4_params.cqav)
599 bf_set_le32(lpfc_cqe_valid, cqe, 0);
600
601 cq->host_index = ((cq->host_index + 1) % cq->entry_count);
602
603 /* if the index wrapped around, toggle the valid bit */
604 if (phba->sli4_hba.pc_sli4_params.cqav && !cq->host_index)
605 cq->qe_valid = (cq->qe_valid) ? 0 : 1;
606}
607
4f774513 608/**
32517fc0
JS
609 * lpfc_sli4_write_cq_db - write cq DB for entries consumed or arm state.
610 * @phba: the adapter with the CQ
4f774513 611 * @q: The Completion Queue that the host has completed processing for.
32517fc0 612 * @count: the number of elements that were consumed
4f774513
JS
613 * @arm: Indicates whether the host wants to arms this CQ.
614 *
32517fc0
JS
615 * This routine will notify the HBA, by ringing the doorbell, that the
616 * CQEs have been processed. The @arm parameter specifies whether the
617 * queue should be rearmed when ringing the doorbell.
4f774513 618 **/
32517fc0
JS
619void
620lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
621 uint32_t count, bool arm)
4f774513 622{
4f774513
JS
623 struct lpfc_register doorbell;
624
2e90f4b5 625 /* sanity check on queue memory */
32517fc0
JS
626 if (unlikely(!q || (count == 0 && !arm)))
627 return;
4f774513
JS
628
629 /* ring doorbell for number popped */
630 doorbell.word0 = 0;
631 if (arm)
632 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
32517fc0 633 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, count);
4f774513 634 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_COMPLETION);
6b5151fd
JS
635 bf_set(lpfc_eqcq_doorbell_cqid_hi, &doorbell,
636 (q->queue_id >> LPFC_CQID_HI_FIELD_SHIFT));
637 bf_set(lpfc_eqcq_doorbell_cqid_lo, &doorbell, q->queue_id);
9dd35425 638 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
4f774513
JS
639}
640
27d6ac0a 641/**
32517fc0
JS
642 * lpfc_sli4_if6_write_cq_db - write cq DB for entries consumed or arm state.
643 * @phba: the adapter with the CQ
27d6ac0a 644 * @q: The Completion Queue that the host has completed processing for.
32517fc0 645 * @count: the number of elements that were consumed
27d6ac0a
JS
646 * @arm: Indicates whether the host wants to arms this CQ.
647 *
32517fc0
JS
648 * This routine will notify the HBA, by ringing the doorbell, that the
649 * CQEs have been processed. The @arm parameter specifies whether the
650 * queue should be rearmed when ringing the doorbell.
27d6ac0a 651 **/
32517fc0
JS
652void
653lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
654 uint32_t count, bool arm)
27d6ac0a 655{
27d6ac0a
JS
656 struct lpfc_register doorbell;
657
658 /* sanity check on queue memory */
32517fc0
JS
659 if (unlikely(!q || (count == 0 && !arm)))
660 return;
27d6ac0a
JS
661
662 /* ring doorbell for number popped */
663 doorbell.word0 = 0;
664 if (arm)
665 bf_set(lpfc_if6_cq_doorbell_arm, &doorbell, 1);
32517fc0 666 bf_set(lpfc_if6_cq_doorbell_num_released, &doorbell, count);
27d6ac0a
JS
667 bf_set(lpfc_if6_cq_doorbell_cqid, &doorbell, q->queue_id);
668 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
27d6ac0a
JS
669}
670
4f774513
JS
671/**
672 * lpfc_sli4_rq_put - Put a Receive Buffer Queue Entry on a Receive Queue
673 * @q: The Header Receive Queue to operate on.
674 * @wqe: The Receive Queue Entry to put on the Receive queue.
675 *
676 * This routine will copy the contents of @wqe to the next available entry on
677 * the @q. This function will then ring the Receive Queue Doorbell to signal the
678 * HBA to start processing the Receive Queue Entry. This function returns the
679 * index that the rqe was copied to if successful. If no entries are available
680 * on @q then this function will return -ENOMEM.
681 * The caller is expected to hold the hbalock when calling this routine.
682 **/
895427bd 683int
4f774513
JS
684lpfc_sli4_rq_put(struct lpfc_queue *hq, struct lpfc_queue *dq,
685 struct lpfc_rqe *hrqe, struct lpfc_rqe *drqe)
686{
2e90f4b5
JS
687 struct lpfc_rqe *temp_hrqe;
688 struct lpfc_rqe *temp_drqe;
4f774513 689 struct lpfc_register doorbell;
cbc5de1b
JS
690 int hq_put_index;
691 int dq_put_index;
4f774513 692
2e90f4b5
JS
693 /* sanity check on queue memory */
694 if (unlikely(!hq) || unlikely(!dq))
695 return -ENOMEM;
cbc5de1b
JS
696 hq_put_index = hq->host_index;
697 dq_put_index = dq->host_index;
9afbee3d
JS
698 temp_hrqe = lpfc_sli4_qe(hq, hq_put_index);
699 temp_drqe = lpfc_sli4_qe(dq, dq_put_index);
2e90f4b5 700
4f774513
JS
701 if (hq->type != LPFC_HRQ || dq->type != LPFC_DRQ)
702 return -EINVAL;
cbc5de1b 703 if (hq_put_index != dq_put_index)
4f774513
JS
704 return -EINVAL;
705 /* If the host has not yet processed the next entry then we are done */
cbc5de1b 706 if (((hq_put_index + 1) % hq->entry_count) == hq->hba_index)
4f774513 707 return -EBUSY;
48f8fdb4
JS
708 lpfc_sli4_pcimem_bcopy(hrqe, temp_hrqe, hq->entry_size);
709 lpfc_sli4_pcimem_bcopy(drqe, temp_drqe, dq->entry_size);
4f774513
JS
710
711 /* Update the host index to point to the next slot */
cbc5de1b
JS
712 hq->host_index = ((hq_put_index + 1) % hq->entry_count);
713 dq->host_index = ((dq_put_index + 1) % dq->entry_count);
61f3d4bf 714 hq->RQ_buf_posted++;
4f774513
JS
715
716 /* Ring The Header Receive Queue Doorbell */
32517fc0 717 if (!(hq->host_index % hq->notify_interval)) {
4f774513 718 doorbell.word0 = 0;
962bc51b
JS
719 if (hq->db_format == LPFC_DB_RING_FORMAT) {
720 bf_set(lpfc_rq_db_ring_fm_num_posted, &doorbell,
32517fc0 721 hq->notify_interval);
962bc51b
JS
722 bf_set(lpfc_rq_db_ring_fm_id, &doorbell, hq->queue_id);
723 } else if (hq->db_format == LPFC_DB_LIST_FORMAT) {
724 bf_set(lpfc_rq_db_list_fm_num_posted, &doorbell,
32517fc0 725 hq->notify_interval);
962bc51b
JS
726 bf_set(lpfc_rq_db_list_fm_index, &doorbell,
727 hq->host_index);
728 bf_set(lpfc_rq_db_list_fm_id, &doorbell, hq->queue_id);
729 } else {
730 return -EINVAL;
731 }
732 writel(doorbell.word0, hq->db_regaddr);
4f774513 733 }
cbc5de1b 734 return hq_put_index;
4f774513
JS
735}
736
737/**
738 * lpfc_sli4_rq_release - Updates internal hba index for RQ
739 * @q: The Header Receive Queue to operate on.
740 *
741 * This routine will update the HBA index of a queue to reflect consumption of
742 * one Receive Queue Entry by the HBA. When the HBA indicates that it has
743 * consumed an entry the host calls this function to update the queue's
744 * internal pointers. This routine returns the number of entries that were
745 * consumed by the HBA.
746 **/
747static uint32_t
748lpfc_sli4_rq_release(struct lpfc_queue *hq, struct lpfc_queue *dq)
749{
2e90f4b5
JS
750 /* sanity check on queue memory */
751 if (unlikely(!hq) || unlikely(!dq))
752 return 0;
753
4f774513
JS
754 if ((hq->type != LPFC_HRQ) || (dq->type != LPFC_DRQ))
755 return 0;
756 hq->hba_index = ((hq->hba_index + 1) % hq->entry_count);
757 dq->hba_index = ((dq->hba_index + 1) % dq->entry_count);
758 return 1;
759}
760
e59058c4 761/**
3621a710 762 * lpfc_cmd_iocb - Get next command iocb entry in the ring
e59058c4
JS
763 * @phba: Pointer to HBA context object.
764 * @pring: Pointer to driver SLI ring object.
765 *
766 * This function returns pointer to next command iocb entry
767 * in the command ring. The caller must hold hbalock to prevent
768 * other threads consume the next command iocb.
769 * SLI-2/SLI-3 provide different sized iocbs.
770 **/
ed957684
JS
771static inline IOCB_t *
772lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
773{
7e56aa25
JS
774 return (IOCB_t *) (((char *) pring->sli.sli3.cmdringaddr) +
775 pring->sli.sli3.cmdidx * phba->iocb_cmd_size);
ed957684
JS
776}
777
e59058c4 778/**
3621a710 779 * lpfc_resp_iocb - Get next response iocb entry in the ring
e59058c4
JS
780 * @phba: Pointer to HBA context object.
781 * @pring: Pointer to driver SLI ring object.
782 *
783 * This function returns pointer to next response iocb entry
784 * in the response ring. The caller must hold hbalock to make sure
785 * that no other thread consume the next response iocb.
786 * SLI-2/SLI-3 provide different sized iocbs.
787 **/
ed957684
JS
788static inline IOCB_t *
789lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
790{
7e56aa25
JS
791 return (IOCB_t *) (((char *) pring->sli.sli3.rspringaddr) +
792 pring->sli.sli3.rspidx * phba->iocb_rsp_size);
ed957684
JS
793}
794
e59058c4 795/**
3621a710 796 * __lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
797 * @phba: Pointer to HBA context object.
798 *
799 * This function is called with hbalock held. This function
800 * allocates a new driver iocb object from the iocb pool. If the
801 * allocation is successful, it returns pointer to the newly
802 * allocated iocb object else it returns NULL.
803 **/
4f2e66c6 804struct lpfc_iocbq *
2e0fef85 805__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC
806{
807 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
808 struct lpfc_iocbq * iocbq = NULL;
809
1c2ba475
JT
810 lockdep_assert_held(&phba->hbalock);
811
0bd4ca25 812 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
2a9bf3d0
JS
813 if (iocbq)
814 phba->iocb_cnt++;
815 if (phba->iocb_cnt > phba->iocb_max)
816 phba->iocb_max = phba->iocb_cnt;
0bd4ca25
JSEC
817 return iocbq;
818}
819
da0436e9
JS
820/**
821 * __lpfc_clear_active_sglq - Remove the active sglq for this XRI.
822 * @phba: Pointer to HBA context object.
823 * @xritag: XRI value.
824 *
825 * This function clears the sglq pointer from the array of acive
826 * sglq's. The xritag that is passed in is used to index into the
827 * array. Before the xritag can be used it needs to be adjusted
828 * by subtracting the xribase.
829 *
830 * Returns sglq ponter = success, NULL = Failure.
831 **/
895427bd 832struct lpfc_sglq *
da0436e9
JS
833__lpfc_clear_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
834{
da0436e9 835 struct lpfc_sglq *sglq;
6d368e53
JS
836
837 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
838 phba->sli4_hba.lpfc_sglq_active_list[xritag] = NULL;
da0436e9
JS
839 return sglq;
840}
841
842/**
843 * __lpfc_get_active_sglq - Get the active sglq for this XRI.
844 * @phba: Pointer to HBA context object.
845 * @xritag: XRI value.
846 *
847 * This function returns the sglq pointer from the array of acive
848 * sglq's. The xritag that is passed in is used to index into the
849 * array. Before the xritag can be used it needs to be adjusted
850 * by subtracting the xribase.
851 *
852 * Returns sglq ponter = success, NULL = Failure.
853 **/
0f65ff68 854struct lpfc_sglq *
da0436e9
JS
855__lpfc_get_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
856{
da0436e9 857 struct lpfc_sglq *sglq;
6d368e53
JS
858
859 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
da0436e9
JS
860 return sglq;
861}
862
19ca7609 863/**
1151e3ec 864 * lpfc_clr_rrq_active - Clears RRQ active bit in xri_bitmap.
19ca7609
JS
865 * @phba: Pointer to HBA context object.
866 * @xritag: xri used in this exchange.
867 * @rrq: The RRQ to be cleared.
868 *
19ca7609 869 **/
1151e3ec
JS
870void
871lpfc_clr_rrq_active(struct lpfc_hba *phba,
872 uint16_t xritag,
873 struct lpfc_node_rrq *rrq)
19ca7609 874{
1151e3ec 875 struct lpfc_nodelist *ndlp = NULL;
19ca7609 876
1151e3ec
JS
877 if ((rrq->vport) && NLP_CHK_NODE_ACT(rrq->ndlp))
878 ndlp = lpfc_findnode_did(rrq->vport, rrq->nlp_DID);
19ca7609
JS
879
880 /* The target DID could have been swapped (cable swap)
881 * we should use the ndlp from the findnode if it is
882 * available.
883 */
1151e3ec 884 if ((!ndlp) && rrq->ndlp)
19ca7609
JS
885 ndlp = rrq->ndlp;
886
1151e3ec
JS
887 if (!ndlp)
888 goto out;
889
cff261f6 890 if (test_and_clear_bit(xritag, ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
891 rrq->send_rrq = 0;
892 rrq->xritag = 0;
893 rrq->rrq_stop_time = 0;
894 }
1151e3ec 895out:
19ca7609
JS
896 mempool_free(rrq, phba->rrq_pool);
897}
898
899/**
900 * lpfc_handle_rrq_active - Checks if RRQ has waithed RATOV.
901 * @phba: Pointer to HBA context object.
902 *
903 * This function is called with hbalock held. This function
904 * Checks if stop_time (ratov from setting rrq active) has
905 * been reached, if it has and the send_rrq flag is set then
906 * it will call lpfc_send_rrq. If the send_rrq flag is not set
907 * then it will just call the routine to clear the rrq and
908 * free the rrq resource.
909 * The timer is set to the next rrq that is going to expire before
910 * leaving the routine.
911 *
912 **/
913void
914lpfc_handle_rrq_active(struct lpfc_hba *phba)
915{
916 struct lpfc_node_rrq *rrq;
917 struct lpfc_node_rrq *nextrrq;
918 unsigned long next_time;
919 unsigned long iflags;
1151e3ec 920 LIST_HEAD(send_rrq);
19ca7609
JS
921
922 spin_lock_irqsave(&phba->hbalock, iflags);
923 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
256ec0d0 924 next_time = jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
19ca7609 925 list_for_each_entry_safe(rrq, nextrrq,
1151e3ec
JS
926 &phba->active_rrq_list, list) {
927 if (time_after(jiffies, rrq->rrq_stop_time))
928 list_move(&rrq->list, &send_rrq);
929 else if (time_before(rrq->rrq_stop_time, next_time))
19ca7609
JS
930 next_time = rrq->rrq_stop_time;
931 }
932 spin_unlock_irqrestore(&phba->hbalock, iflags);
06918ac5
JS
933 if ((!list_empty(&phba->active_rrq_list)) &&
934 (!(phba->pport->load_flag & FC_UNLOADING)))
19ca7609 935 mod_timer(&phba->rrq_tmr, next_time);
1151e3ec
JS
936 list_for_each_entry_safe(rrq, nextrrq, &send_rrq, list) {
937 list_del(&rrq->list);
ffd43814 938 if (!rrq->send_rrq) {
1151e3ec 939 /* this call will free the rrq */
ffd43814
BVA
940 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
941 } else if (lpfc_send_rrq(phba, rrq)) {
1151e3ec
JS
942 /* if we send the rrq then the completion handler
943 * will clear the bit in the xribitmap.
944 */
945 lpfc_clr_rrq_active(phba, rrq->xritag,
946 rrq);
947 }
948 }
19ca7609
JS
949}
950
951/**
952 * lpfc_get_active_rrq - Get the active RRQ for this exchange.
953 * @vport: Pointer to vport context object.
954 * @xri: The xri used in the exchange.
955 * @did: The targets DID for this exchange.
956 *
957 * returns NULL = rrq not found in the phba->active_rrq_list.
958 * rrq = rrq for this xri and target.
959 **/
960struct lpfc_node_rrq *
961lpfc_get_active_rrq(struct lpfc_vport *vport, uint16_t xri, uint32_t did)
962{
963 struct lpfc_hba *phba = vport->phba;
964 struct lpfc_node_rrq *rrq;
965 struct lpfc_node_rrq *nextrrq;
966 unsigned long iflags;
967
968 if (phba->sli_rev != LPFC_SLI_REV4)
969 return NULL;
970 spin_lock_irqsave(&phba->hbalock, iflags);
971 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list) {
972 if (rrq->vport == vport && rrq->xritag == xri &&
973 rrq->nlp_DID == did){
974 list_del(&rrq->list);
975 spin_unlock_irqrestore(&phba->hbalock, iflags);
976 return rrq;
977 }
978 }
979 spin_unlock_irqrestore(&phba->hbalock, iflags);
980 return NULL;
981}
982
983/**
984 * lpfc_cleanup_vports_rrqs - Remove and clear the active RRQ for this vport.
985 * @vport: Pointer to vport context object.
1151e3ec
JS
986 * @ndlp: Pointer to the lpfc_node_list structure.
987 * If ndlp is NULL Remove all active RRQs for this vport from the
988 * phba->active_rrq_list and clear the rrq.
989 * If ndlp is not NULL then only remove rrqs for this vport & this ndlp.
19ca7609
JS
990 **/
991void
1151e3ec 992lpfc_cleanup_vports_rrqs(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
19ca7609
JS
993
994{
995 struct lpfc_hba *phba = vport->phba;
996 struct lpfc_node_rrq *rrq;
997 struct lpfc_node_rrq *nextrrq;
998 unsigned long iflags;
1151e3ec 999 LIST_HEAD(rrq_list);
19ca7609
JS
1000
1001 if (phba->sli_rev != LPFC_SLI_REV4)
1002 return;
1151e3ec
JS
1003 if (!ndlp) {
1004 lpfc_sli4_vport_delete_els_xri_aborted(vport);
1005 lpfc_sli4_vport_delete_fcp_xri_aborted(vport);
19ca7609 1006 }
1151e3ec
JS
1007 spin_lock_irqsave(&phba->hbalock, iflags);
1008 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list)
1009 if ((rrq->vport == vport) && (!ndlp || rrq->ndlp == ndlp))
1010 list_move(&rrq->list, &rrq_list);
19ca7609 1011 spin_unlock_irqrestore(&phba->hbalock, iflags);
1151e3ec
JS
1012
1013 list_for_each_entry_safe(rrq, nextrrq, &rrq_list, list) {
1014 list_del(&rrq->list);
1015 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
1016 }
19ca7609
JS
1017}
1018
19ca7609 1019/**
1151e3ec 1020 * lpfc_test_rrq_active - Test RRQ bit in xri_bitmap.
19ca7609
JS
1021 * @phba: Pointer to HBA context object.
1022 * @ndlp: Targets nodelist pointer for this exchange.
1023 * @xritag the xri in the bitmap to test.
1024 *
e2a8be56
JS
1025 * This function returns:
1026 * 0 = rrq not active for this xri
1027 * 1 = rrq is valid for this xri.
19ca7609 1028 **/
1151e3ec
JS
1029int
1030lpfc_test_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
19ca7609
JS
1031 uint16_t xritag)
1032{
19ca7609
JS
1033 if (!ndlp)
1034 return 0;
cff261f6
JS
1035 if (!ndlp->active_rrqs_xri_bitmap)
1036 return 0;
1037 if (test_bit(xritag, ndlp->active_rrqs_xri_bitmap))
258f84fa 1038 return 1;
19ca7609
JS
1039 else
1040 return 0;
1041}
1042
1043/**
1044 * lpfc_set_rrq_active - set RRQ active bit in xri_bitmap.
1045 * @phba: Pointer to HBA context object.
1046 * @ndlp: nodelist pointer for this target.
1047 * @xritag: xri used in this exchange.
1048 * @rxid: Remote Exchange ID.
1049 * @send_rrq: Flag used to determine if we should send rrq els cmd.
1050 *
1051 * This function takes the hbalock.
1052 * The active bit is always set in the active rrq xri_bitmap even
1053 * if there is no slot avaiable for the other rrq information.
1054 *
1055 * returns 0 rrq actived for this xri
1056 * < 0 No memory or invalid ndlp.
1057 **/
1058int
1059lpfc_set_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
b42c07c8 1060 uint16_t xritag, uint16_t rxid, uint16_t send_rrq)
19ca7609 1061{
19ca7609 1062 unsigned long iflags;
b42c07c8
JS
1063 struct lpfc_node_rrq *rrq;
1064 int empty;
1065
1066 if (!ndlp)
1067 return -EINVAL;
1068
1069 if (!phba->cfg_enable_rrq)
1070 return -EINVAL;
19ca7609
JS
1071
1072 spin_lock_irqsave(&phba->hbalock, iflags);
b42c07c8
JS
1073 if (phba->pport->load_flag & FC_UNLOADING) {
1074 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
1075 goto out;
1076 }
1077
1078 /*
1079 * set the active bit even if there is no mem available.
1080 */
1081 if (NLP_CHK_FREE_REQ(ndlp))
1082 goto out;
1083
1084 if (ndlp->vport && (ndlp->vport->load_flag & FC_UNLOADING))
1085 goto out;
1086
cff261f6
JS
1087 if (!ndlp->active_rrqs_xri_bitmap)
1088 goto out;
1089
1090 if (test_and_set_bit(xritag, ndlp->active_rrqs_xri_bitmap))
b42c07c8
JS
1091 goto out;
1092
19ca7609 1093 spin_unlock_irqrestore(&phba->hbalock, iflags);
b42c07c8
JS
1094 rrq = mempool_alloc(phba->rrq_pool, GFP_KERNEL);
1095 if (!rrq) {
1096 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1097 "3155 Unable to allocate RRQ xri:0x%x rxid:0x%x"
1098 " DID:0x%x Send:%d\n",
1099 xritag, rxid, ndlp->nlp_DID, send_rrq);
1100 return -EINVAL;
1101 }
e5771b4d
JS
1102 if (phba->cfg_enable_rrq == 1)
1103 rrq->send_rrq = send_rrq;
1104 else
1105 rrq->send_rrq = 0;
b42c07c8 1106 rrq->xritag = xritag;
256ec0d0
JS
1107 rrq->rrq_stop_time = jiffies +
1108 msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
b42c07c8
JS
1109 rrq->ndlp = ndlp;
1110 rrq->nlp_DID = ndlp->nlp_DID;
1111 rrq->vport = ndlp->vport;
1112 rrq->rxid = rxid;
b42c07c8
JS
1113 spin_lock_irqsave(&phba->hbalock, iflags);
1114 empty = list_empty(&phba->active_rrq_list);
1115 list_add_tail(&rrq->list, &phba->active_rrq_list);
1116 phba->hba_flag |= HBA_RRQ_ACTIVE;
1117 if (empty)
1118 lpfc_worker_wake_up(phba);
1119 spin_unlock_irqrestore(&phba->hbalock, iflags);
1120 return 0;
1121out:
1122 spin_unlock_irqrestore(&phba->hbalock, iflags);
1123 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1124 "2921 Can't set rrq active xri:0x%x rxid:0x%x"
1125 " DID:0x%x Send:%d\n",
1126 xritag, rxid, ndlp->nlp_DID, send_rrq);
1127 return -EINVAL;
19ca7609
JS
1128}
1129
da0436e9 1130/**
895427bd 1131 * __lpfc_sli_get_els_sglq - Allocates an iocb object from sgl pool
da0436e9 1132 * @phba: Pointer to HBA context object.
19ca7609 1133 * @piocb: Pointer to the iocbq.
da0436e9 1134 *
e2a8be56
JS
1135 * The driver calls this function with either the nvme ls ring lock
1136 * or the fc els ring lock held depending on the iocb usage. This function
1137 * gets a new driver sglq object from the sglq list. If the list is not empty
1138 * then it is successful, it returns pointer to the newly allocated sglq
1139 * object else it returns NULL.
da0436e9
JS
1140 **/
1141static struct lpfc_sglq *
895427bd 1142__lpfc_sli_get_els_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
da0436e9 1143{
895427bd 1144 struct list_head *lpfc_els_sgl_list = &phba->sli4_hba.lpfc_els_sgl_list;
da0436e9 1145 struct lpfc_sglq *sglq = NULL;
19ca7609 1146 struct lpfc_sglq *start_sglq = NULL;
c490850a 1147 struct lpfc_io_buf *lpfc_cmd;
19ca7609 1148 struct lpfc_nodelist *ndlp;
e2a8be56 1149 struct lpfc_sli_ring *pring = NULL;
19ca7609
JS
1150 int found = 0;
1151
e2a8be56
JS
1152 if (piocbq->iocb_flag & LPFC_IO_NVME_LS)
1153 pring = phba->sli4_hba.nvmels_wq->pring;
1154 else
1155 pring = lpfc_phba_elsring(phba);
1156
1157 lockdep_assert_held(&pring->ring_lock);
1c2ba475 1158
19ca7609 1159 if (piocbq->iocb_flag & LPFC_IO_FCP) {
c490850a 1160 lpfc_cmd = (struct lpfc_io_buf *) piocbq->context1;
19ca7609 1161 ndlp = lpfc_cmd->rdata->pnode;
be858b65 1162 } else if ((piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) &&
6c7cf486 1163 !(piocbq->iocb_flag & LPFC_IO_LIBDFC)) {
19ca7609 1164 ndlp = piocbq->context_un.ndlp;
6c7cf486
JS
1165 } else if (piocbq->iocb_flag & LPFC_IO_LIBDFC) {
1166 if (piocbq->iocb_flag & LPFC_IO_LOOPBACK)
1167 ndlp = NULL;
1168 else
1169 ndlp = piocbq->context_un.ndlp;
1170 } else {
19ca7609 1171 ndlp = piocbq->context1;
6c7cf486 1172 }
19ca7609 1173
895427bd
JS
1174 spin_lock(&phba->sli4_hba.sgl_list_lock);
1175 list_remove_head(lpfc_els_sgl_list, sglq, struct lpfc_sglq, list);
19ca7609
JS
1176 start_sglq = sglq;
1177 while (!found) {
1178 if (!sglq)
d11f54b7 1179 break;
895427bd
JS
1180 if (ndlp && ndlp->active_rrqs_xri_bitmap &&
1181 test_bit(sglq->sli4_lxritag,
1182 ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
1183 /* This xri has an rrq outstanding for this DID.
1184 * put it back in the list and get another xri.
1185 */
895427bd 1186 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609 1187 sglq = NULL;
895427bd 1188 list_remove_head(lpfc_els_sgl_list, sglq,
19ca7609
JS
1189 struct lpfc_sglq, list);
1190 if (sglq == start_sglq) {
14041bd1 1191 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609
JS
1192 sglq = NULL;
1193 break;
1194 } else
1195 continue;
1196 }
1197 sglq->ndlp = ndlp;
1198 found = 1;
6d368e53 1199 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
19ca7609
JS
1200 sglq->state = SGL_ALLOCATED;
1201 }
895427bd 1202 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1203 return sglq;
1204}
1205
f358dd0c
JS
1206/**
1207 * __lpfc_sli_get_nvmet_sglq - Allocates an iocb object from sgl pool
1208 * @phba: Pointer to HBA context object.
1209 * @piocb: Pointer to the iocbq.
1210 *
1211 * This function is called with the sgl_list lock held. This function
1212 * gets a new driver sglq object from the sglq list. If the
1213 * list is not empty then it is successful, it returns pointer to the newly
1214 * allocated sglq object else it returns NULL.
1215 **/
1216struct lpfc_sglq *
1217__lpfc_sli_get_nvmet_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
1218{
1219 struct list_head *lpfc_nvmet_sgl_list;
1220 struct lpfc_sglq *sglq = NULL;
1221
1222 lpfc_nvmet_sgl_list = &phba->sli4_hba.lpfc_nvmet_sgl_list;
1223
1224 lockdep_assert_held(&phba->sli4_hba.sgl_list_lock);
1225
1226 list_remove_head(lpfc_nvmet_sgl_list, sglq, struct lpfc_sglq, list);
1227 if (!sglq)
1228 return NULL;
1229 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
1230 sglq->state = SGL_ALLOCATED;
da0436e9
JS
1231 return sglq;
1232}
1233
e59058c4 1234/**
3621a710 1235 * lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
1236 * @phba: Pointer to HBA context object.
1237 *
1238 * This function is called with no lock held. This function
1239 * allocates a new driver iocb object from the iocb pool. If the
1240 * allocation is successful, it returns pointer to the newly
1241 * allocated iocb object else it returns NULL.
1242 **/
2e0fef85
JS
1243struct lpfc_iocbq *
1244lpfc_sli_get_iocbq(struct lpfc_hba *phba)
1245{
1246 struct lpfc_iocbq * iocbq = NULL;
1247 unsigned long iflags;
1248
1249 spin_lock_irqsave(&phba->hbalock, iflags);
1250 iocbq = __lpfc_sli_get_iocbq(phba);
1251 spin_unlock_irqrestore(&phba->hbalock, iflags);
1252 return iocbq;
1253}
1254
4f774513
JS
1255/**
1256 * __lpfc_sli_release_iocbq_s4 - Release iocb to the iocb pool
1257 * @phba: Pointer to HBA context object.
1258 * @iocbq: Pointer to driver iocb object.
1259 *
1260 * This function is called with hbalock held to release driver
1261 * iocb object to the iocb pool. The iotag in the iocb object
1262 * does not change for each use of the iocb object. This function
1263 * clears all other fields of the iocb object when it is freed.
1264 * The sqlq structure that holds the xritag and phys and virtual
1265 * mappings for the scatter gather list is retrieved from the
1266 * active array of sglq. The get of the sglq pointer also clears
1267 * the entry in the array. If the status of the IO indiactes that
1268 * this IO was aborted then the sglq entry it put on the
1269 * lpfc_abts_els_sgl_list until the CQ_ABORTED_XRI is received. If the
1270 * IO has good status or fails for any other reason then the sglq
895427bd 1271 * entry is added to the free list (lpfc_els_sgl_list).
4f774513
JS
1272 **/
1273static void
1274__lpfc_sli_release_iocbq_s4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1275{
1276 struct lpfc_sglq *sglq;
1277 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
2a9bf3d0 1278 unsigned long iflag = 0;
895427bd 1279 struct lpfc_sli_ring *pring;
4f774513 1280
1c2ba475
JT
1281 lockdep_assert_held(&phba->hbalock);
1282
4f774513
JS
1283 if (iocbq->sli4_xritag == NO_XRI)
1284 sglq = NULL;
1285 else
6d368e53
JS
1286 sglq = __lpfc_clear_active_sglq(phba, iocbq->sli4_lxritag);
1287
0e9bb8d7 1288
4f774513 1289 if (sglq) {
f358dd0c
JS
1290 if (iocbq->iocb_flag & LPFC_IO_NVMET) {
1291 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1292 iflag);
1293 sglq->state = SGL_FREED;
1294 sglq->ndlp = NULL;
1295 list_add_tail(&sglq->list,
1296 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1297 spin_unlock_irqrestore(
1298 &phba->sli4_hba.sgl_list_lock, iflag);
1299 goto out;
1300 }
1301
895427bd 1302 pring = phba->sli4_hba.els_wq->pring;
0f65ff68
JS
1303 if ((iocbq->iocb_flag & LPFC_EXCHANGE_BUSY) &&
1304 (sglq->state != SGL_XRI_ABORTED)) {
895427bd
JS
1305 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1306 iflag);
4f774513 1307 list_add(&sglq->list,
895427bd 1308 &phba->sli4_hba.lpfc_abts_els_sgl_list);
4f774513 1309 spin_unlock_irqrestore(
895427bd 1310 &phba->sli4_hba.sgl_list_lock, iflag);
0f65ff68 1311 } else {
895427bd
JS
1312 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1313 iflag);
0f65ff68 1314 sglq->state = SGL_FREED;
19ca7609 1315 sglq->ndlp = NULL;
fedd3b7b 1316 list_add_tail(&sglq->list,
895427bd
JS
1317 &phba->sli4_hba.lpfc_els_sgl_list);
1318 spin_unlock_irqrestore(
1319 &phba->sli4_hba.sgl_list_lock, iflag);
2a9bf3d0
JS
1320
1321 /* Check if TXQ queue needs to be serviced */
0e9bb8d7 1322 if (!list_empty(&pring->txq))
2a9bf3d0 1323 lpfc_worker_wake_up(phba);
0f65ff68 1324 }
4f774513
JS
1325 }
1326
f358dd0c 1327out:
4f774513
JS
1328 /*
1329 * Clean all volatile data fields, preserve iotag and node struct.
1330 */
1331 memset((char *)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
6d368e53 1332 iocbq->sli4_lxritag = NO_XRI;
4f774513 1333 iocbq->sli4_xritag = NO_XRI;
f358dd0c
JS
1334 iocbq->iocb_flag &= ~(LPFC_IO_NVME | LPFC_IO_NVMET |
1335 LPFC_IO_NVME_LS);
4f774513
JS
1336 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1337}
1338
2a9bf3d0 1339
e59058c4 1340/**
3772a991 1341 * __lpfc_sli_release_iocbq_s3 - Release iocb to the iocb pool
e59058c4
JS
1342 * @phba: Pointer to HBA context object.
1343 * @iocbq: Pointer to driver iocb object.
1344 *
1345 * This function is called with hbalock held to release driver
1346 * iocb object to the iocb pool. The iotag in the iocb object
1347 * does not change for each use of the iocb object. This function
1348 * clears all other fields of the iocb object when it is freed.
1349 **/
a6ababd2 1350static void
3772a991 1351__lpfc_sli_release_iocbq_s3(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 1352{
2e0fef85 1353 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30 1354
1c2ba475 1355 lockdep_assert_held(&phba->hbalock);
0e9bb8d7 1356
604a3e30
JB
1357 /*
1358 * Clean all volatile data fields, preserve iotag and node struct.
1359 */
1360 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
3772a991 1361 iocbq->sli4_xritag = NO_XRI;
604a3e30
JB
1362 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1363}
1364
3772a991
JS
1365/**
1366 * __lpfc_sli_release_iocbq - Release iocb to the iocb pool
1367 * @phba: Pointer to HBA context object.
1368 * @iocbq: Pointer to driver iocb object.
1369 *
1370 * This function is called with hbalock held to release driver
1371 * iocb object to the iocb pool. The iotag in the iocb object
1372 * does not change for each use of the iocb object. This function
1373 * clears all other fields of the iocb object when it is freed.
1374 **/
1375static void
1376__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1377{
1c2ba475
JT
1378 lockdep_assert_held(&phba->hbalock);
1379
3772a991 1380 phba->__lpfc_sli_release_iocbq(phba, iocbq);
2a9bf3d0 1381 phba->iocb_cnt--;
3772a991
JS
1382}
1383
e59058c4 1384/**
3621a710 1385 * lpfc_sli_release_iocbq - Release iocb to the iocb pool
e59058c4
JS
1386 * @phba: Pointer to HBA context object.
1387 * @iocbq: Pointer to driver iocb object.
1388 *
1389 * This function is called with no lock held to release the iocb to
1390 * iocb pool.
1391 **/
2e0fef85
JS
1392void
1393lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1394{
1395 unsigned long iflags;
1396
1397 /*
1398 * Clean all volatile data fields, preserve iotag and node struct.
1399 */
1400 spin_lock_irqsave(&phba->hbalock, iflags);
1401 __lpfc_sli_release_iocbq(phba, iocbq);
1402 spin_unlock_irqrestore(&phba->hbalock, iflags);
1403}
1404
a257bf90
JS
1405/**
1406 * lpfc_sli_cancel_iocbs - Cancel all iocbs from a list.
1407 * @phba: Pointer to HBA context object.
1408 * @iocblist: List of IOCBs.
1409 * @ulpstatus: ULP status in IOCB command field.
1410 * @ulpWord4: ULP word-4 in IOCB command field.
1411 *
1412 * This function is called with a list of IOCBs to cancel. It cancels the IOCB
1413 * on the list by invoking the complete callback function associated with the
1414 * IOCB with the provided @ulpstatus and @ulpword4 set to the IOCB commond
1415 * fields.
1416 **/
1417void
1418lpfc_sli_cancel_iocbs(struct lpfc_hba *phba, struct list_head *iocblist,
1419 uint32_t ulpstatus, uint32_t ulpWord4)
1420{
1421 struct lpfc_iocbq *piocb;
1422
1423 while (!list_empty(iocblist)) {
1424 list_remove_head(iocblist, piocb, struct lpfc_iocbq, list);
84f2ddf8
JS
1425 if (!piocb->iocb_cmpl) {
1426 if (piocb->iocb_flag & LPFC_IO_NVME)
1427 lpfc_nvme_cancel_iocb(phba, piocb);
1428 else
1429 lpfc_sli_release_iocbq(phba, piocb);
1430 } else {
a257bf90
JS
1431 piocb->iocb.ulpStatus = ulpstatus;
1432 piocb->iocb.un.ulpWord[4] = ulpWord4;
1433 (piocb->iocb_cmpl) (phba, piocb, piocb);
1434 }
1435 }
1436 return;
1437}
1438
e59058c4 1439/**
3621a710
JS
1440 * lpfc_sli_iocb_cmd_type - Get the iocb type
1441 * @iocb_cmnd: iocb command code.
e59058c4
JS
1442 *
1443 * This function is called by ring event handler function to get the iocb type.
1444 * This function translates the iocb command to an iocb command type used to
1445 * decide the final disposition of each completed IOCB.
1446 * The function returns
1447 * LPFC_UNKNOWN_IOCB if it is an unsupported iocb
1448 * LPFC_SOL_IOCB if it is a solicited iocb completion
1449 * LPFC_ABORT_IOCB if it is an abort iocb
1450 * LPFC_UNSOL_IOCB if it is an unsolicited iocb
1451 *
1452 * The caller is not required to hold any lock.
1453 **/
dea3101e
JB
1454static lpfc_iocb_type
1455lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
1456{
1457 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
1458
1459 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
1460 return 0;
1461
1462 switch (iocb_cmnd) {
1463 case CMD_XMIT_SEQUENCE_CR:
1464 case CMD_XMIT_SEQUENCE_CX:
1465 case CMD_XMIT_BCAST_CN:
1466 case CMD_XMIT_BCAST_CX:
1467 case CMD_ELS_REQUEST_CR:
1468 case CMD_ELS_REQUEST_CX:
1469 case CMD_CREATE_XRI_CR:
1470 case CMD_CREATE_XRI_CX:
1471 case CMD_GET_RPI_CN:
1472 case CMD_XMIT_ELS_RSP_CX:
1473 case CMD_GET_RPI_CR:
1474 case CMD_FCP_IWRITE_CR:
1475 case CMD_FCP_IWRITE_CX:
1476 case CMD_FCP_IREAD_CR:
1477 case CMD_FCP_IREAD_CX:
1478 case CMD_FCP_ICMND_CR:
1479 case CMD_FCP_ICMND_CX:
f5603511
JS
1480 case CMD_FCP_TSEND_CX:
1481 case CMD_FCP_TRSP_CX:
1482 case CMD_FCP_TRECEIVE_CX:
1483 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB
1484 case CMD_ADAPTER_MSG:
1485 case CMD_ADAPTER_DUMP:
1486 case CMD_XMIT_SEQUENCE64_CR:
1487 case CMD_XMIT_SEQUENCE64_CX:
1488 case CMD_XMIT_BCAST64_CN:
1489 case CMD_XMIT_BCAST64_CX:
1490 case CMD_ELS_REQUEST64_CR:
1491 case CMD_ELS_REQUEST64_CX:
1492 case CMD_FCP_IWRITE64_CR:
1493 case CMD_FCP_IWRITE64_CX:
1494 case CMD_FCP_IREAD64_CR:
1495 case CMD_FCP_IREAD64_CX:
1496 case CMD_FCP_ICMND64_CR:
1497 case CMD_FCP_ICMND64_CX:
f5603511
JS
1498 case CMD_FCP_TSEND64_CX:
1499 case CMD_FCP_TRSP64_CX:
1500 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB
1501 case CMD_GEN_REQUEST64_CR:
1502 case CMD_GEN_REQUEST64_CX:
1503 case CMD_XMIT_ELS_RSP64_CX:
da0436e9
JS
1504 case DSSCMD_IWRITE64_CR:
1505 case DSSCMD_IWRITE64_CX:
1506 case DSSCMD_IREAD64_CR:
1507 case DSSCMD_IREAD64_CX:
dea3101e
JB
1508 type = LPFC_SOL_IOCB;
1509 break;
1510 case CMD_ABORT_XRI_CN:
1511 case CMD_ABORT_XRI_CX:
1512 case CMD_CLOSE_XRI_CN:
1513 case CMD_CLOSE_XRI_CX:
1514 case CMD_XRI_ABORTED_CX:
1515 case CMD_ABORT_MXRI64_CN:
6669f9bb 1516 case CMD_XMIT_BLS_RSP64_CX:
dea3101e
JB
1517 type = LPFC_ABORT_IOCB;
1518 break;
1519 case CMD_RCV_SEQUENCE_CX:
1520 case CMD_RCV_ELS_REQ_CX:
1521 case CMD_RCV_SEQUENCE64_CX:
1522 case CMD_RCV_ELS_REQ64_CX:
57127f15 1523 case CMD_ASYNC_STATUS:
ed957684
JS
1524 case CMD_IOCB_RCV_SEQ64_CX:
1525 case CMD_IOCB_RCV_ELS64_CX:
1526 case CMD_IOCB_RCV_CONT64_CX:
3163f725 1527 case CMD_IOCB_RET_XRI64_CX:
dea3101e
JB
1528 type = LPFC_UNSOL_IOCB;
1529 break;
3163f725
JS
1530 case CMD_IOCB_XMIT_MSEQ64_CR:
1531 case CMD_IOCB_XMIT_MSEQ64_CX:
1532 case CMD_IOCB_RCV_SEQ_LIST64_CX:
1533 case CMD_IOCB_RCV_ELS_LIST64_CX:
1534 case CMD_IOCB_CLOSE_EXTENDED_CN:
1535 case CMD_IOCB_ABORT_EXTENDED_CN:
1536 case CMD_IOCB_RET_HBQE64_CN:
1537 case CMD_IOCB_FCP_IBIDIR64_CR:
1538 case CMD_IOCB_FCP_IBIDIR64_CX:
1539 case CMD_IOCB_FCP_ITASKMGT64_CX:
1540 case CMD_IOCB_LOGENTRY_CN:
1541 case CMD_IOCB_LOGENTRY_ASYNC_CN:
1542 printk("%s - Unhandled SLI-3 Command x%x\n",
cadbd4a5 1543 __func__, iocb_cmnd);
3163f725
JS
1544 type = LPFC_UNKNOWN_IOCB;
1545 break;
dea3101e
JB
1546 default:
1547 type = LPFC_UNKNOWN_IOCB;
1548 break;
1549 }
1550
1551 return type;
1552}
1553
e59058c4 1554/**
3621a710 1555 * lpfc_sli_ring_map - Issue config_ring mbox for all rings
e59058c4
JS
1556 * @phba: Pointer to HBA context object.
1557 *
1558 * This function is called from SLI initialization code
1559 * to configure every ring of the HBA's SLI interface. The
1560 * caller is not required to hold any lock. This function issues
1561 * a config_ring mailbox command for each ring.
1562 * This function returns zero if successful else returns a negative
1563 * error code.
1564 **/
dea3101e 1565static int
ed957684 1566lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB
1567{
1568 struct lpfc_sli *psli = &phba->sli;
ed957684
JS
1569 LPFC_MBOXQ_t *pmb;
1570 MAILBOX_t *pmbox;
1571 int i, rc, ret = 0;
dea3101e 1572
ed957684
JS
1573 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1574 if (!pmb)
1575 return -ENOMEM;
04c68496 1576 pmbox = &pmb->u.mb;
ed957684 1577 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 1578 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB
1579 lpfc_config_ring(phba, i, pmb);
1580 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1581 if (rc != MBX_SUCCESS) {
92d7f7b0 1582 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1583 "0446 Adapter failed to init (%d), "
dea3101e
JB
1584 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
1585 "ring %d\n",
e8b62011
JS
1586 rc, pmbox->mbxCommand,
1587 pmbox->mbxStatus, i);
2e0fef85 1588 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS
1589 ret = -ENXIO;
1590 break;
dea3101e
JB
1591 }
1592 }
ed957684
JS
1593 mempool_free(pmb, phba->mbox_mem_pool);
1594 return ret;
dea3101e
JB
1595}
1596
e59058c4 1597/**
3621a710 1598 * lpfc_sli_ringtxcmpl_put - Adds new iocb to the txcmplq
e59058c4
JS
1599 * @phba: Pointer to HBA context object.
1600 * @pring: Pointer to driver SLI ring object.
1601 * @piocb: Pointer to the driver iocb object.
1602 *
e2a8be56
JS
1603 * The driver calls this function with the hbalock held for SLI3 ports or
1604 * the ring lock held for SLI4 ports. The function adds the
e59058c4
JS
1605 * new iocb to txcmplq of the given ring. This function always returns
1606 * 0. If this function is called for ELS ring, this function checks if
1607 * there is a vport associated with the ELS command. This function also
1608 * starts els_tmofunc timer if this is an ELS command.
1609 **/
dea3101e 1610static int
2e0fef85
JS
1611lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1612 struct lpfc_iocbq *piocb)
dea3101e 1613{
e2a8be56
JS
1614 if (phba->sli_rev == LPFC_SLI_REV4)
1615 lockdep_assert_held(&pring->ring_lock);
1616 else
1617 lockdep_assert_held(&phba->hbalock);
1c2ba475 1618
2319f847 1619 BUG_ON(!piocb);
22466da5 1620
dea3101e 1621 list_add_tail(&piocb->list, &pring->txcmplq);
4f2e66c6 1622 piocb->iocb_flag |= LPFC_IO_ON_TXCMPLQ;
c490850a 1623 pring->txcmplq_cnt++;
2a9bf3d0 1624
92d7f7b0
JS
1625 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
1626 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2319f847
MFO
1627 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
1628 BUG_ON(!piocb->vport);
1629 if (!(piocb->vport->load_flag & FC_UNLOADING))
1630 mod_timer(&piocb->vport->els_tmofunc,
1631 jiffies +
1632 msecs_to_jiffies(1000 * (phba->fc_ratov << 1)));
1633 }
dea3101e 1634
2e0fef85 1635 return 0;
dea3101e
JB
1636}
1637
e59058c4 1638/**
3621a710 1639 * lpfc_sli_ringtx_get - Get first element of the txq
e59058c4
JS
1640 * @phba: Pointer to HBA context object.
1641 * @pring: Pointer to driver SLI ring object.
1642 *
1643 * This function is called with hbalock held to get next
1644 * iocb in txq of the given ring. If there is any iocb in
1645 * the txq, the function returns first iocb in the list after
1646 * removing the iocb from the list, else it returns NULL.
1647 **/
2a9bf3d0 1648struct lpfc_iocbq *
2e0fef85 1649lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 1650{
dea3101e
JB
1651 struct lpfc_iocbq *cmd_iocb;
1652
1c2ba475
JT
1653 lockdep_assert_held(&phba->hbalock);
1654
858c9f6c 1655 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
2e0fef85 1656 return cmd_iocb;
dea3101e
JB
1657}
1658
e59058c4 1659/**
3621a710 1660 * lpfc_sli_next_iocb_slot - Get next iocb slot in the ring
e59058c4
JS
1661 * @phba: Pointer to HBA context object.
1662 * @pring: Pointer to driver SLI ring object.
1663 *
1664 * This function is called with hbalock held and the caller must post the
1665 * iocb without releasing the lock. If the caller releases the lock,
1666 * iocb slot returned by the function is not guaranteed to be available.
1667 * The function returns pointer to the next available iocb slot if there
1668 * is available slot in the ring, else it returns NULL.
1669 * If the get index of the ring is ahead of the put index, the function
1670 * will post an error attention event to the worker thread to take the
1671 * HBA to offline state.
1672 **/
dea3101e
JB
1673static IOCB_t *
1674lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1675{
34b02dcd 1676 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
7e56aa25 1677 uint32_t max_cmd_idx = pring->sli.sli3.numCiocb;
1c2ba475
JT
1678
1679 lockdep_assert_held(&phba->hbalock);
1680
7e56aa25
JS
1681 if ((pring->sli.sli3.next_cmdidx == pring->sli.sli3.cmdidx) &&
1682 (++pring->sli.sli3.next_cmdidx >= max_cmd_idx))
1683 pring->sli.sli3.next_cmdidx = 0;
dea3101e 1684
7e56aa25
JS
1685 if (unlikely(pring->sli.sli3.local_getidx ==
1686 pring->sli.sli3.next_cmdidx)) {
dea3101e 1687
7e56aa25 1688 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e 1689
7e56aa25 1690 if (unlikely(pring->sli.sli3.local_getidx >= max_cmd_idx)) {
dea3101e 1691 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1692 "0315 Ring %d issue: portCmdGet %d "
025dfdaf 1693 "is bigger than cmd ring %d\n",
e8b62011 1694 pring->ringno,
7e56aa25
JS
1695 pring->sli.sli3.local_getidx,
1696 max_cmd_idx);
dea3101e 1697
2e0fef85 1698 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
1699 /*
1700 * All error attention handlers are posted to
1701 * worker thread
1702 */
1703 phba->work_ha |= HA_ERATT;
1704 phba->work_hs = HS_FFER3;
92d7f7b0 1705
5e9d9b82 1706 lpfc_worker_wake_up(phba);
dea3101e
JB
1707
1708 return NULL;
1709 }
1710
7e56aa25 1711 if (pring->sli.sli3.local_getidx == pring->sli.sli3.next_cmdidx)
dea3101e
JB
1712 return NULL;
1713 }
1714
ed957684 1715 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB
1716}
1717
e59058c4 1718/**
3621a710 1719 * lpfc_sli_next_iotag - Get an iotag for the iocb
e59058c4
JS
1720 * @phba: Pointer to HBA context object.
1721 * @iocbq: Pointer to driver iocb object.
1722 *
1723 * This function gets an iotag for the iocb. If there is no unused iotag and
1724 * the iocbq_lookup_len < 0xffff, this function allocates a bigger iotag_lookup
1725 * array and assigns a new iotag.
1726 * The function returns the allocated iotag if successful, else returns zero.
1727 * Zero is not a valid iotag.
1728 * The caller is not required to hold any lock.
1729 **/
604a3e30 1730uint16_t
2e0fef85 1731lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 1732{
2e0fef85
JS
1733 struct lpfc_iocbq **new_arr;
1734 struct lpfc_iocbq **old_arr;
604a3e30
JB
1735 size_t new_len;
1736 struct lpfc_sli *psli = &phba->sli;
1737 uint16_t iotag;
dea3101e 1738
2e0fef85 1739 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1740 iotag = psli->last_iotag;
1741 if(++iotag < psli->iocbq_lookup_len) {
1742 psli->last_iotag = iotag;
1743 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1744 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1745 iocbq->iotag = iotag;
1746 return iotag;
2e0fef85 1747 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB
1748 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
1749 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85 1750 spin_unlock_irq(&phba->hbalock);
6396bb22 1751 new_arr = kcalloc(new_len, sizeof(struct lpfc_iocbq *),
604a3e30
JB
1752 GFP_KERNEL);
1753 if (new_arr) {
2e0fef85 1754 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1755 old_arr = psli->iocbq_lookup;
1756 if (new_len <= psli->iocbq_lookup_len) {
1757 /* highly unprobable case */
1758 kfree(new_arr);
1759 iotag = psli->last_iotag;
1760 if(++iotag < psli->iocbq_lookup_len) {
1761 psli->last_iotag = iotag;
1762 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1763 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1764 iocbq->iotag = iotag;
1765 return iotag;
1766 }
2e0fef85 1767 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1768 return 0;
1769 }
1770 if (psli->iocbq_lookup)
1771 memcpy(new_arr, old_arr,
1772 ((psli->last_iotag + 1) *
311464ec 1773 sizeof (struct lpfc_iocbq *)));
604a3e30
JB
1774 psli->iocbq_lookup = new_arr;
1775 psli->iocbq_lookup_len = new_len;
1776 psli->last_iotag = iotag;
1777 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1778 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1779 iocbq->iotag = iotag;
1780 kfree(old_arr);
1781 return iotag;
1782 }
8f6d98d2 1783 } else
2e0fef85 1784 spin_unlock_irq(&phba->hbalock);
dea3101e 1785
bc73905a 1786 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
1787 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
1788 psli->last_iotag);
dea3101e 1789
604a3e30 1790 return 0;
dea3101e
JB
1791}
1792
e59058c4 1793/**
3621a710 1794 * lpfc_sli_submit_iocb - Submit an iocb to the firmware
e59058c4
JS
1795 * @phba: Pointer to HBA context object.
1796 * @pring: Pointer to driver SLI ring object.
1797 * @iocb: Pointer to iocb slot in the ring.
1798 * @nextiocb: Pointer to driver iocb object which need to be
1799 * posted to firmware.
1800 *
1801 * This function is called with hbalock held to post a new iocb to
1802 * the firmware. This function copies the new iocb to ring iocb slot and
1803 * updates the ring pointers. It adds the new iocb to txcmplq if there is
1804 * a completion call back for this iocb else the function will free the
1805 * iocb object.
1806 **/
dea3101e
JB
1807static void
1808lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1809 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
1810{
1c2ba475 1811 lockdep_assert_held(&phba->hbalock);
dea3101e 1812 /*
604a3e30 1813 * Set up an iotag
dea3101e 1814 */
604a3e30 1815 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 1816
e2a0a9d6 1817
a58cbd52
JS
1818 if (pring->ringno == LPFC_ELS_RING) {
1819 lpfc_debugfs_slow_ring_trc(phba,
1820 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1821 *(((uint32_t *) &nextiocb->iocb) + 4),
1822 *(((uint32_t *) &nextiocb->iocb) + 6),
1823 *(((uint32_t *) &nextiocb->iocb) + 7));
1824 }
1825
dea3101e
JB
1826 /*
1827 * Issue iocb command to adapter
1828 */
92d7f7b0 1829 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB
1830 wmb();
1831 pring->stats.iocb_cmd++;
1832
1833 /*
1834 * If there is no completion routine to call, we can release the
1835 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
1836 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
1837 */
1838 if (nextiocb->iocb_cmpl)
1839 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 1840 else
2e0fef85 1841 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB
1842
1843 /*
1844 * Let the HBA know what IOCB slot will be the next one the
1845 * driver will put a command into.
1846 */
7e56aa25
JS
1847 pring->sli.sli3.cmdidx = pring->sli.sli3.next_cmdidx;
1848 writel(pring->sli.sli3.cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB
1849}
1850
e59058c4 1851/**
3621a710 1852 * lpfc_sli_update_full_ring - Update the chip attention register
e59058c4
JS
1853 * @phba: Pointer to HBA context object.
1854 * @pring: Pointer to driver SLI ring object.
1855 *
1856 * The caller is not required to hold any lock for calling this function.
1857 * This function updates the chip attention bits for the ring to inform firmware
1858 * that there are pending work to be done for this ring and requests an
1859 * interrupt when there is space available in the ring. This function is
1860 * called when the driver is unable to post more iocbs to the ring due
1861 * to unavailability of space in the ring.
1862 **/
dea3101e 1863static void
2e0fef85 1864lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1865{
1866 int ringno = pring->ringno;
1867
1868 pring->flag |= LPFC_CALL_RING_AVAILABLE;
1869
1870 wmb();
1871
1872 /*
1873 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
1874 * The HBA will tell us when an IOCB entry is available.
1875 */
1876 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
1877 readl(phba->CAregaddr); /* flush */
1878
1879 pring->stats.iocb_cmd_full++;
1880}
1881
e59058c4 1882/**
3621a710 1883 * lpfc_sli_update_ring - Update chip attention register
e59058c4
JS
1884 * @phba: Pointer to HBA context object.
1885 * @pring: Pointer to driver SLI ring object.
1886 *
1887 * This function updates the chip attention register bit for the
1888 * given ring to inform HBA that there is more work to be done
1889 * in this ring. The caller is not required to hold any lock.
1890 **/
dea3101e 1891static void
2e0fef85 1892lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1893{
1894 int ringno = pring->ringno;
1895
1896 /*
1897 * Tell the HBA that there is work to do in this ring.
1898 */
34b02dcd
JS
1899 if (!(phba->sli3_options & LPFC_SLI3_CRP_ENABLED)) {
1900 wmb();
1901 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
1902 readl(phba->CAregaddr); /* flush */
1903 }
dea3101e
JB
1904}
1905
e59058c4 1906/**
3621a710 1907 * lpfc_sli_resume_iocb - Process iocbs in the txq
e59058c4
JS
1908 * @phba: Pointer to HBA context object.
1909 * @pring: Pointer to driver SLI ring object.
1910 *
1911 * This function is called with hbalock held to post pending iocbs
1912 * in the txq to the firmware. This function is called when driver
1913 * detects space available in the ring.
1914 **/
dea3101e 1915static void
2e0fef85 1916lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1917{
1918 IOCB_t *iocb;
1919 struct lpfc_iocbq *nextiocb;
1920
1c2ba475
JT
1921 lockdep_assert_held(&phba->hbalock);
1922
dea3101e
JB
1923 /*
1924 * Check to see if:
1925 * (a) there is anything on the txq to send
1926 * (b) link is up
1927 * (c) link attention events can be processed (fcp ring only)
1928 * (d) IOCB processing is not blocked by the outstanding mbox command.
1929 */
0e9bb8d7
JS
1930
1931 if (lpfc_is_link_up(phba) &&
1932 (!list_empty(&pring->txq)) &&
895427bd 1933 (pring->ringno != LPFC_FCP_RING ||
0b727fea 1934 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e
JB
1935
1936 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
1937 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
1938 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
1939
1940 if (iocb)
1941 lpfc_sli_update_ring(phba, pring);
1942 else
1943 lpfc_sli_update_full_ring(phba, pring);
1944 }
1945
1946 return;
1947}
1948
e59058c4 1949/**
3621a710 1950 * lpfc_sli_next_hbq_slot - Get next hbq entry for the HBQ
e59058c4
JS
1951 * @phba: Pointer to HBA context object.
1952 * @hbqno: HBQ number.
1953 *
1954 * This function is called with hbalock held to get the next
1955 * available slot for the given HBQ. If there is free slot
1956 * available for the HBQ it will return pointer to the next available
1957 * HBQ entry else it will return NULL.
1958 **/
a6ababd2 1959static struct lpfc_hbq_entry *
ed957684
JS
1960lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
1961{
1962 struct hbq_s *hbqp = &phba->hbqs[hbqno];
1963
1c2ba475
JT
1964 lockdep_assert_held(&phba->hbalock);
1965
ed957684
JS
1966 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
1967 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
1968 hbqp->next_hbqPutIdx = 0;
1969
1970 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 1971 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS
1972 uint32_t getidx = le32_to_cpu(raw_index);
1973
1974 hbqp->local_hbqGetIdx = getidx;
1975
1976 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
1977 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 1978 LOG_SLI | LOG_VPORT,
e8b62011 1979 "1802 HBQ %d: local_hbqGetIdx "
ed957684 1980 "%u is > than hbqp->entry_count %u\n",
e8b62011 1981 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS
1982 hbqp->entry_count);
1983
1984 phba->link_state = LPFC_HBA_ERROR;
1985 return NULL;
1986 }
1987
1988 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
1989 return NULL;
1990 }
1991
51ef4c26
JS
1992 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
1993 hbqp->hbqPutIdx;
ed957684
JS
1994}
1995
e59058c4 1996/**
3621a710 1997 * lpfc_sli_hbqbuf_free_all - Free all the hbq buffers
e59058c4
JS
1998 * @phba: Pointer to HBA context object.
1999 *
2000 * This function is called with no lock held to free all the
2001 * hbq buffers while uninitializing the SLI interface. It also
2002 * frees the HBQ buffers returned by the firmware but not yet
2003 * processed by the upper layers.
2004 **/
ed957684
JS
2005void
2006lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
2007{
92d7f7b0
JS
2008 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
2009 struct hbq_dmabuf *hbq_buf;
3163f725 2010 unsigned long flags;
51ef4c26 2011 int i, hbq_count;
ed957684 2012
51ef4c26 2013 hbq_count = lpfc_sli_hbq_count();
ed957684 2014 /* Return all memory used by all HBQs */
3163f725 2015 spin_lock_irqsave(&phba->hbalock, flags);
51ef4c26
JS
2016 for (i = 0; i < hbq_count; ++i) {
2017 list_for_each_entry_safe(dmabuf, next_dmabuf,
2018 &phba->hbqs[i].hbq_buffer_list, list) {
2019 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
2020 list_del(&hbq_buf->dbuf.list);
2021 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
2022 }
a8adb832 2023 phba->hbqs[i].buffer_count = 0;
ed957684 2024 }
3163f725
JS
2025
2026 /* Mark the HBQs not in use */
2027 phba->hbq_in_use = 0;
2028 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684
JS
2029}
2030
e59058c4 2031/**
3621a710 2032 * lpfc_sli_hbq_to_firmware - Post the hbq buffer to firmware
e59058c4
JS
2033 * @phba: Pointer to HBA context object.
2034 * @hbqno: HBQ number.
2035 * @hbq_buf: Pointer to HBQ buffer.
2036 *
2037 * This function is called with the hbalock held to post a
2038 * hbq buffer to the firmware. If the function finds an empty
2039 * slot in the HBQ, it will post the buffer. The function will return
2040 * pointer to the hbq entry if it successfully post the buffer
2041 * else it will return NULL.
2042 **/
3772a991 2043static int
ed957684 2044lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 2045 struct hbq_dmabuf *hbq_buf)
3772a991 2046{
1c2ba475 2047 lockdep_assert_held(&phba->hbalock);
3772a991
JS
2048 return phba->lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buf);
2049}
2050
2051/**
2052 * lpfc_sli_hbq_to_firmware_s3 - Post the hbq buffer to SLI3 firmware
2053 * @phba: Pointer to HBA context object.
2054 * @hbqno: HBQ number.
2055 * @hbq_buf: Pointer to HBQ buffer.
2056 *
2057 * This function is called with the hbalock held to post a hbq buffer to the
2058 * firmware. If the function finds an empty slot in the HBQ, it will post the
2059 * buffer and place it on the hbq_buffer_list. The function will return zero if
2060 * it successfully post the buffer else it will return an error.
2061 **/
2062static int
2063lpfc_sli_hbq_to_firmware_s3(struct lpfc_hba *phba, uint32_t hbqno,
2064 struct hbq_dmabuf *hbq_buf)
ed957684
JS
2065{
2066 struct lpfc_hbq_entry *hbqe;
92d7f7b0 2067 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684 2068
1c2ba475 2069 lockdep_assert_held(&phba->hbalock);
ed957684
JS
2070 /* Get next HBQ entry slot to use */
2071 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
2072 if (hbqe) {
2073 struct hbq_s *hbqp = &phba->hbqs[hbqno];
2074
92d7f7b0
JS
2075 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
2076 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
895427bd 2077 hbqe->bde.tus.f.bdeSize = hbq_buf->total_size;
ed957684 2078 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS
2079 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
2080 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
2081 /* Sync SLIM */
ed957684
JS
2082 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
2083 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 2084 /* flush */
ed957684 2085 readl(phba->hbq_put + hbqno);
51ef4c26 2086 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
3772a991
JS
2087 return 0;
2088 } else
2089 return -ENOMEM;
ed957684
JS
2090}
2091
4f774513
JS
2092/**
2093 * lpfc_sli_hbq_to_firmware_s4 - Post the hbq buffer to SLI4 firmware
2094 * @phba: Pointer to HBA context object.
2095 * @hbqno: HBQ number.
2096 * @hbq_buf: Pointer to HBQ buffer.
2097 *
2098 * This function is called with the hbalock held to post an RQE to the SLI4
2099 * firmware. If able to post the RQE to the RQ it will queue the hbq entry to
2100 * the hbq_buffer_list and return zero, otherwise it will return an error.
2101 **/
2102static int
2103lpfc_sli_hbq_to_firmware_s4(struct lpfc_hba *phba, uint32_t hbqno,
2104 struct hbq_dmabuf *hbq_buf)
2105{
2106 int rc;
2107 struct lpfc_rqe hrqe;
2108 struct lpfc_rqe drqe;
895427bd
JS
2109 struct lpfc_queue *hrq;
2110 struct lpfc_queue *drq;
2111
2112 if (hbqno != LPFC_ELS_HBQ)
2113 return 1;
2114 hrq = phba->sli4_hba.hdr_rq;
2115 drq = phba->sli4_hba.dat_rq;
4f774513 2116
1c2ba475 2117 lockdep_assert_held(&phba->hbalock);
4f774513
JS
2118 hrqe.address_lo = putPaddrLow(hbq_buf->hbuf.phys);
2119 hrqe.address_hi = putPaddrHigh(hbq_buf->hbuf.phys);
2120 drqe.address_lo = putPaddrLow(hbq_buf->dbuf.phys);
2121 drqe.address_hi = putPaddrHigh(hbq_buf->dbuf.phys);
895427bd 2122 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
4f774513
JS
2123 if (rc < 0)
2124 return rc;
895427bd 2125 hbq_buf->tag = (rc | (hbqno << 16));
4f774513
JS
2126 list_add_tail(&hbq_buf->dbuf.list, &phba->hbqs[hbqno].hbq_buffer_list);
2127 return 0;
2128}
2129
e59058c4 2130/* HBQ for ELS and CT traffic. */
92d7f7b0
JS
2131static struct lpfc_hbq_init lpfc_els_hbq = {
2132 .rn = 1,
def9c7a9 2133 .entry_count = 256,
92d7f7b0
JS
2134 .mask_count = 0,
2135 .profile = 0,
51ef4c26 2136 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0 2137 .buffer_count = 0,
a257bf90
JS
2138 .init_count = 40,
2139 .add_count = 40,
92d7f7b0 2140};
ed957684 2141
e59058c4 2142/* Array of HBQs */
78b2d852 2143struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0
JS
2144 &lpfc_els_hbq,
2145};
ed957684 2146
e59058c4 2147/**
3621a710 2148 * lpfc_sli_hbqbuf_fill_hbqs - Post more hbq buffers to HBQ
e59058c4
JS
2149 * @phba: Pointer to HBA context object.
2150 * @hbqno: HBQ number.
2151 * @count: Number of HBQ buffers to be posted.
2152 *
d7c255b2
JS
2153 * This function is called with no lock held to post more hbq buffers to the
2154 * given HBQ. The function returns the number of HBQ buffers successfully
2155 * posted.
e59058c4 2156 **/
311464ec 2157static int
92d7f7b0 2158lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 2159{
d7c255b2 2160 uint32_t i, posted = 0;
3163f725 2161 unsigned long flags;
92d7f7b0 2162 struct hbq_dmabuf *hbq_buffer;
d7c255b2 2163 LIST_HEAD(hbq_buf_list);
eafe1df9 2164 if (!phba->hbqs[hbqno].hbq_alloc_buffer)
51ef4c26 2165 return 0;
51ef4c26 2166
d7c255b2
JS
2167 if ((phba->hbqs[hbqno].buffer_count + count) >
2168 lpfc_hbq_defs[hbqno]->entry_count)
2169 count = lpfc_hbq_defs[hbqno]->entry_count -
2170 phba->hbqs[hbqno].buffer_count;
2171 if (!count)
2172 return 0;
2173 /* Allocate HBQ entries */
2174 for (i = 0; i < count; i++) {
2175 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
2176 if (!hbq_buffer)
2177 break;
2178 list_add_tail(&hbq_buffer->dbuf.list, &hbq_buf_list);
2179 }
3163f725
JS
2180 /* Check whether HBQ is still in use */
2181 spin_lock_irqsave(&phba->hbalock, flags);
eafe1df9 2182 if (!phba->hbq_in_use)
d7c255b2
JS
2183 goto err;
2184 while (!list_empty(&hbq_buf_list)) {
2185 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2186 dbuf.list);
2187 hbq_buffer->tag = (phba->hbqs[hbqno].buffer_count |
2188 (hbqno << 16));
3772a991 2189 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
a8adb832 2190 phba->hbqs[hbqno].buffer_count++;
d7c255b2
JS
2191 posted++;
2192 } else
51ef4c26 2193 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684 2194 }
3163f725 2195 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2196 return posted;
2197err:
eafe1df9 2198 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2199 while (!list_empty(&hbq_buf_list)) {
2200 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2201 dbuf.list);
2202 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
2203 }
2204 return 0;
ed957684
JS
2205}
2206
e59058c4 2207/**
3621a710 2208 * lpfc_sli_hbqbuf_add_hbqs - Post more HBQ buffers to firmware
e59058c4
JS
2209 * @phba: Pointer to HBA context object.
2210 * @qno: HBQ number.
2211 *
2212 * This function posts more buffers to the HBQ. This function
d7c255b2
JS
2213 * is called with no lock held. The function returns the number of HBQ entries
2214 * successfully allocated.
e59058c4 2215 **/
92d7f7b0
JS
2216int
2217lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 2218{
def9c7a9
JS
2219 if (phba->sli_rev == LPFC_SLI_REV4)
2220 return 0;
2221 else
2222 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2223 lpfc_hbq_defs[qno]->add_count);
92d7f7b0 2224}
ed957684 2225
e59058c4 2226/**
3621a710 2227 * lpfc_sli_hbqbuf_init_hbqs - Post initial buffers to the HBQ
e59058c4
JS
2228 * @phba: Pointer to HBA context object.
2229 * @qno: HBQ queue number.
2230 *
2231 * This function is called from SLI initialization code path with
2232 * no lock held to post initial HBQ buffers to firmware. The
d7c255b2 2233 * function returns the number of HBQ entries successfully allocated.
e59058c4 2234 **/
a6ababd2 2235static int
92d7f7b0
JS
2236lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
2237{
def9c7a9
JS
2238 if (phba->sli_rev == LPFC_SLI_REV4)
2239 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
73d91e50 2240 lpfc_hbq_defs[qno]->entry_count);
def9c7a9
JS
2241 else
2242 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2243 lpfc_hbq_defs[qno]->init_count);
ed957684
JS
2244}
2245
3772a991
JS
2246/**
2247 * lpfc_sli_hbqbuf_get - Remove the first hbq off of an hbq list
2248 * @phba: Pointer to HBA context object.
2249 * @hbqno: HBQ number.
2250 *
2251 * This function removes the first hbq buffer on an hbq list and returns a
2252 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2253 **/
2254static struct hbq_dmabuf *
2255lpfc_sli_hbqbuf_get(struct list_head *rb_list)
2256{
2257 struct lpfc_dmabuf *d_buf;
2258
2259 list_remove_head(rb_list, d_buf, struct lpfc_dmabuf, list);
2260 if (!d_buf)
2261 return NULL;
2262 return container_of(d_buf, struct hbq_dmabuf, dbuf);
2263}
2264
2d7dbc4c
JS
2265/**
2266 * lpfc_sli_rqbuf_get - Remove the first dma buffer off of an RQ list
2267 * @phba: Pointer to HBA context object.
2268 * @hbqno: HBQ number.
2269 *
2270 * This function removes the first RQ buffer on an RQ buffer list and returns a
2271 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2272 **/
2273static struct rqb_dmabuf *
2274lpfc_sli_rqbuf_get(struct lpfc_hba *phba, struct lpfc_queue *hrq)
2275{
2276 struct lpfc_dmabuf *h_buf;
2277 struct lpfc_rqb *rqbp;
2278
2279 rqbp = hrq->rqbp;
2280 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
2281 struct lpfc_dmabuf, list);
2282 if (!h_buf)
2283 return NULL;
2284 rqbp->buffer_count--;
2285 return container_of(h_buf, struct rqb_dmabuf, hbuf);
2286}
2287
e59058c4 2288/**
3621a710 2289 * lpfc_sli_hbqbuf_find - Find the hbq buffer associated with a tag
e59058c4
JS
2290 * @phba: Pointer to HBA context object.
2291 * @tag: Tag of the hbq buffer.
2292 *
71892418
SH
2293 * This function searches for the hbq buffer associated with the given tag in
2294 * the hbq buffer list. If it finds the hbq buffer, it returns the hbq_buffer
2295 * otherwise it returns NULL.
e59058c4 2296 **/
a6ababd2 2297static struct hbq_dmabuf *
92d7f7b0 2298lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 2299{
92d7f7b0
JS
2300 struct lpfc_dmabuf *d_buf;
2301 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS
2302 uint32_t hbqno;
2303
2304 hbqno = tag >> 16;
a0a74e45 2305 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 2306 return NULL;
ed957684 2307
3772a991 2308 spin_lock_irq(&phba->hbalock);
51ef4c26 2309 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 2310 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 2311 if (hbq_buf->tag == tag) {
3772a991 2312 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2313 return hbq_buf;
ed957684
JS
2314 }
2315 }
3772a991 2316 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2317 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 2318 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 2319 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 2320 return NULL;
ed957684
JS
2321}
2322
e59058c4 2323/**
3621a710 2324 * lpfc_sli_free_hbq - Give back the hbq buffer to firmware
e59058c4
JS
2325 * @phba: Pointer to HBA context object.
2326 * @hbq_buffer: Pointer to HBQ buffer.
2327 *
2328 * This function is called with hbalock. This function gives back
2329 * the hbq buffer to firmware. If the HBQ does not have space to
2330 * post the buffer, it will free the buffer.
2331 **/
ed957684 2332void
51ef4c26 2333lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS
2334{
2335 uint32_t hbqno;
2336
51ef4c26
JS
2337 if (hbq_buffer) {
2338 hbqno = hbq_buffer->tag >> 16;
3772a991 2339 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
51ef4c26 2340 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS
2341 }
2342}
2343
e59058c4 2344/**
3621a710 2345 * lpfc_sli_chk_mbx_command - Check if the mailbox is a legitimate mailbox
e59058c4
JS
2346 * @mbxCommand: mailbox command code.
2347 *
2348 * This function is called by the mailbox event handler function to verify
2349 * that the completed mailbox command is a legitimate mailbox command. If the
2350 * completed mailbox is not known to the function, it will return MBX_SHUTDOWN
2351 * and the mailbox event handler will take the HBA offline.
2352 **/
dea3101e
JB
2353static int
2354lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
2355{
2356 uint8_t ret;
2357
2358 switch (mbxCommand) {
2359 case MBX_LOAD_SM:
2360 case MBX_READ_NV:
2361 case MBX_WRITE_NV:
a8adb832 2362 case MBX_WRITE_VPARMS:
dea3101e
JB
2363 case MBX_RUN_BIU_DIAG:
2364 case MBX_INIT_LINK:
2365 case MBX_DOWN_LINK:
2366 case MBX_CONFIG_LINK:
2367 case MBX_CONFIG_RING:
2368 case MBX_RESET_RING:
2369 case MBX_READ_CONFIG:
2370 case MBX_READ_RCONFIG:
2371 case MBX_READ_SPARM:
2372 case MBX_READ_STATUS:
2373 case MBX_READ_RPI:
2374 case MBX_READ_XRI:
2375 case MBX_READ_REV:
2376 case MBX_READ_LNK_STAT:
2377 case MBX_REG_LOGIN:
2378 case MBX_UNREG_LOGIN:
dea3101e
JB
2379 case MBX_CLEAR_LA:
2380 case MBX_DUMP_MEMORY:
2381 case MBX_DUMP_CONTEXT:
2382 case MBX_RUN_DIAGS:
2383 case MBX_RESTART:
2384 case MBX_UPDATE_CFG:
2385 case MBX_DOWN_LOAD:
2386 case MBX_DEL_LD_ENTRY:
2387 case MBX_RUN_PROGRAM:
2388 case MBX_SET_MASK:
09372820 2389 case MBX_SET_VARIABLE:
dea3101e 2390 case MBX_UNREG_D_ID:
41415862 2391 case MBX_KILL_BOARD:
dea3101e 2392 case MBX_CONFIG_FARP:
41415862 2393 case MBX_BEACON:
dea3101e
JB
2394 case MBX_LOAD_AREA:
2395 case MBX_RUN_BIU_DIAG64:
2396 case MBX_CONFIG_PORT:
2397 case MBX_READ_SPARM64:
2398 case MBX_READ_RPI64:
2399 case MBX_REG_LOGIN64:
76a95d75 2400 case MBX_READ_TOPOLOGY:
09372820 2401 case MBX_WRITE_WWN:
dea3101e
JB
2402 case MBX_SET_DEBUG:
2403 case MBX_LOAD_EXP_ROM:
57127f15 2404 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS
2405 case MBX_REG_VPI:
2406 case MBX_UNREG_VPI:
858c9f6c 2407 case MBX_HEARTBEAT:
84774a4d
JS
2408 case MBX_PORT_CAPABILITIES:
2409 case MBX_PORT_IOV_CONTROL:
04c68496
JS
2410 case MBX_SLI4_CONFIG:
2411 case MBX_SLI4_REQ_FTRS:
2412 case MBX_REG_FCFI:
2413 case MBX_UNREG_FCFI:
2414 case MBX_REG_VFI:
2415 case MBX_UNREG_VFI:
2416 case MBX_INIT_VPI:
2417 case MBX_INIT_VFI:
2418 case MBX_RESUME_RPI:
c7495937
JS
2419 case MBX_READ_EVENT_LOG_STATUS:
2420 case MBX_READ_EVENT_LOG:
dcf2a4e0
JS
2421 case MBX_SECURITY_MGMT:
2422 case MBX_AUTH_PORT:
940eb687 2423 case MBX_ACCESS_VDATA:
dea3101e
JB
2424 ret = mbxCommand;
2425 break;
2426 default:
2427 ret = MBX_SHUTDOWN;
2428 break;
2429 }
2e0fef85 2430 return ret;
dea3101e 2431}
e59058c4
JS
2432
2433/**
3621a710 2434 * lpfc_sli_wake_mbox_wait - lpfc_sli_issue_mbox_wait mbox completion handler
e59058c4
JS
2435 * @phba: Pointer to HBA context object.
2436 * @pmboxq: Pointer to mailbox command.
2437 *
2438 * This is completion handler function for mailbox commands issued from
2439 * lpfc_sli_issue_mbox_wait function. This function is called by the
2440 * mailbox event handler function with no lock held. This function
2441 * will wake up thread waiting on the wait queue pointed by context1
2442 * of the mailbox.
2443 **/
04c68496 2444void
2e0fef85 2445lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e 2446{
858c9f6c 2447 unsigned long drvr_flag;
e29d74f8 2448 struct completion *pmbox_done;
dea3101e
JB
2449
2450 /*
e29d74f8 2451 * If pmbox_done is empty, the driver thread gave up waiting and
dea3101e
JB
2452 * continued running.
2453 */
7054a606 2454 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 2455 spin_lock_irqsave(&phba->hbalock, drvr_flag);
e29d74f8
JS
2456 pmbox_done = (struct completion *)pmboxq->context3;
2457 if (pmbox_done)
2458 complete(pmbox_done);
858c9f6c 2459 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
2460 return;
2461}
2462
b95b2119
JS
2463static void
2464__lpfc_sli_rpi_release(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
2465{
2466 unsigned long iflags;
2467
2468 if (ndlp->nlp_flag & NLP_RELEASE_RPI) {
2469 lpfc_sli4_free_rpi(vport->phba, ndlp->nlp_rpi);
2470 spin_lock_irqsave(&vport->phba->ndlp_lock, iflags);
2471 ndlp->nlp_flag &= ~NLP_RELEASE_RPI;
2472 ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR;
2473 spin_unlock_irqrestore(&vport->phba->ndlp_lock, iflags);
2474 }
2475 ndlp->nlp_flag &= ~NLP_UNREG_INP;
2476}
e59058c4
JS
2477
2478/**
3621a710 2479 * lpfc_sli_def_mbox_cmpl - Default mailbox completion handler
e59058c4
JS
2480 * @phba: Pointer to HBA context object.
2481 * @pmb: Pointer to mailbox object.
2482 *
2483 * This function is the default mailbox completion handler. It
2484 * frees the memory resources associated with the completed mailbox
2485 * command. If the completed command is a REG_LOGIN mailbox command,
2486 * this function will issue a UREG_LOGIN to re-claim the RPI.
2487 **/
dea3101e 2488void
2e0fef85 2489lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e 2490{
d439d286 2491 struct lpfc_vport *vport = pmb->vport;
dea3101e 2492 struct lpfc_dmabuf *mp;
d439d286 2493 struct lpfc_nodelist *ndlp;
5af5eee7 2494 struct Scsi_Host *shost;
04c68496 2495 uint16_t rpi, vpi;
7054a606
JS
2496 int rc;
2497
3e1f0718 2498 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
7054a606 2499
dea3101e
JB
2500 if (mp) {
2501 lpfc_mbuf_free(phba, mp->virt, mp->phys);
2502 kfree(mp);
2503 }
7054a606
JS
2504
2505 /*
2506 * If a REG_LOGIN succeeded after node is destroyed or node
2507 * is in re-discovery driver need to cleanup the RPI.
2508 */
2e0fef85 2509 if (!(phba->pport->load_flag & FC_UNLOADING) &&
04c68496
JS
2510 pmb->u.mb.mbxCommand == MBX_REG_LOGIN64 &&
2511 !pmb->u.mb.mbxStatus) {
2512 rpi = pmb->u.mb.un.varWords[0];
6d368e53 2513 vpi = pmb->u.mb.un.varRegLogin.vpi;
04c68496 2514 lpfc_unreg_login(phba, vpi, rpi, pmb);
de96e9c5 2515 pmb->vport = vport;
92d7f7b0 2516 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS
2517 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2518 if (rc != MBX_NOT_FINISHED)
2519 return;
2520 }
2521
695a814e
JS
2522 if ((pmb->u.mb.mbxCommand == MBX_REG_VPI) &&
2523 !(phba->pport->load_flag & FC_UNLOADING) &&
2524 !pmb->u.mb.mbxStatus) {
5af5eee7
JS
2525 shost = lpfc_shost_from_vport(vport);
2526 spin_lock_irq(shost->host_lock);
2527 vport->vpi_state |= LPFC_VPI_REGISTERED;
2528 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI;
2529 spin_unlock_irq(shost->host_lock);
695a814e
JS
2530 }
2531
d439d286 2532 if (pmb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 2533 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
d439d286 2534 lpfc_nlp_put(ndlp);
dea16bda
JS
2535 pmb->ctx_buf = NULL;
2536 pmb->ctx_ndlp = NULL;
2537 }
2538
2539 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2540 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
2541
2542 /* Check to see if there are any deferred events to process */
2543 if (ndlp) {
2544 lpfc_printf_vlog(
2545 vport,
2546 KERN_INFO, LOG_MBOX | LOG_DISCOVERY,
2547 "1438 UNREG cmpl deferred mbox x%x "
32350664 2548 "on NPort x%x Data: x%x x%x %px\n",
dea16bda
JS
2549 ndlp->nlp_rpi, ndlp->nlp_DID,
2550 ndlp->nlp_flag, ndlp->nlp_defer_did, ndlp);
2551
2552 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2553 (ndlp->nlp_defer_did != NLP_EVT_NOTHING_PENDING)) {
00292e03 2554 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2555 ndlp->nlp_defer_did = NLP_EVT_NOTHING_PENDING;
2556 lpfc_issue_els_plogi(vport, ndlp->nlp_DID, 0);
00292e03 2557 } else {
b95b2119 2558 __lpfc_sli_rpi_release(vport, ndlp);
dea16bda 2559 }
97acd001
JS
2560 if (vport->load_flag & FC_UNLOADING)
2561 lpfc_nlp_put(ndlp);
9b164068 2562 pmb->ctx_ndlp = NULL;
dea16bda 2563 }
d439d286
JS
2564 }
2565
dcf2a4e0
JS
2566 /* Check security permission status on INIT_LINK mailbox command */
2567 if ((pmb->u.mb.mbxCommand == MBX_INIT_LINK) &&
2568 (pmb->u.mb.mbxStatus == MBXERR_SEC_NO_PERMISSION))
2569 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
2570 "2860 SLI authentication is required "
2571 "for INIT_LINK but has not done yet\n");
2572
04c68496
JS
2573 if (bf_get(lpfc_mqe_command, &pmb->u.mqe) == MBX_SLI4_CONFIG)
2574 lpfc_sli4_mbox_cmd_free(phba, pmb);
2575 else
2576 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2577}
be6bb941
JS
2578 /**
2579 * lpfc_sli4_unreg_rpi_cmpl_clr - mailbox completion handler
2580 * @phba: Pointer to HBA context object.
2581 * @pmb: Pointer to mailbox object.
2582 *
2583 * This function is the unreg rpi mailbox completion handler. It
2584 * frees the memory resources associated with the completed mailbox
2585 * command. An additional refrenece is put on the ndlp to prevent
2586 * lpfc_nlp_release from freeing the rpi bit in the bitmask before
2587 * the unreg mailbox command completes, this routine puts the
2588 * reference back.
2589 *
2590 **/
2591void
2592lpfc_sli4_unreg_rpi_cmpl_clr(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2593{
2594 struct lpfc_vport *vport = pmb->vport;
2595 struct lpfc_nodelist *ndlp;
2596
3e1f0718 2597 ndlp = pmb->ctx_ndlp;
be6bb941
JS
2598 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2599 if (phba->sli_rev == LPFC_SLI_REV4 &&
2600 (bf_get(lpfc_sli_intf_if_type,
27d6ac0a 2601 &phba->sli4_hba.sli_intf) >=
be6bb941
JS
2602 LPFC_SLI_INTF_IF_TYPE_2)) {
2603 if (ndlp) {
dea16bda
JS
2604 lpfc_printf_vlog(
2605 vport, KERN_INFO, LOG_MBOX | LOG_SLI,
2606 "0010 UNREG_LOGIN vpi:%x "
2607 "rpi:%x DID:%x defer x%x flg x%x "
32350664 2608 "map:%x %px\n",
dea16bda
JS
2609 vport->vpi, ndlp->nlp_rpi,
2610 ndlp->nlp_DID, ndlp->nlp_defer_did,
2611 ndlp->nlp_flag,
2612 ndlp->nlp_usg_map, ndlp);
7c5e518c 2613 ndlp->nlp_flag &= ~NLP_LOGO_ACC;
be6bb941 2614 lpfc_nlp_put(ndlp);
dea16bda
JS
2615
2616 /* Check to see if there are any deferred
2617 * events to process
2618 */
2619 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2620 (ndlp->nlp_defer_did !=
2621 NLP_EVT_NOTHING_PENDING)) {
2622 lpfc_printf_vlog(
2623 vport, KERN_INFO, LOG_DISCOVERY,
2624 "4111 UNREG cmpl deferred "
2625 "clr x%x on "
32350664 2626 "NPort x%x Data: x%x x%px\n",
dea16bda
JS
2627 ndlp->nlp_rpi, ndlp->nlp_DID,
2628 ndlp->nlp_defer_did, ndlp);
00292e03 2629 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2630 ndlp->nlp_defer_did =
2631 NLP_EVT_NOTHING_PENDING;
2632 lpfc_issue_els_plogi(
2633 vport, ndlp->nlp_DID, 0);
00292e03 2634 } else {
b95b2119 2635 __lpfc_sli_rpi_release(vport, ndlp);
dea16bda 2636 }
be6bb941
JS
2637 }
2638 }
2639 }
2640
2641 mempool_free(pmb, phba->mbox_mem_pool);
2642}
dea3101e 2643
e59058c4 2644/**
3621a710 2645 * lpfc_sli_handle_mb_event - Handle mailbox completions from firmware
e59058c4
JS
2646 * @phba: Pointer to HBA context object.
2647 *
2648 * This function is called with no lock held. This function processes all
2649 * the completed mailbox commands and gives it to upper layers. The interrupt
2650 * service routine processes mailbox completion interrupt and adds completed
2651 * mailbox commands to the mboxq_cmpl queue and signals the worker thread.
2652 * Worker thread call lpfc_sli_handle_mb_event, which will return the
2653 * completed mailbox commands in mboxq_cmpl queue to the upper layers. This
2654 * function returns the mailbox commands to the upper layer by calling the
2655 * completion handler function of each mailbox.
2656 **/
dea3101e 2657int
2e0fef85 2658lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 2659{
92d7f7b0 2660 MAILBOX_t *pmbox;
dea3101e 2661 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS
2662 int rc;
2663 LIST_HEAD(cmplq);
dea3101e
JB
2664
2665 phba->sli.slistat.mbox_event++;
2666
92d7f7b0
JS
2667 /* Get all completed mailboxe buffers into the cmplq */
2668 spin_lock_irq(&phba->hbalock);
2669 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
2670 spin_unlock_irq(&phba->hbalock);
dea3101e 2671
92d7f7b0
JS
2672 /* Get a Mailbox buffer to setup mailbox commands for callback */
2673 do {
2674 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
2675 if (pmb == NULL)
2676 break;
2e0fef85 2677
04c68496 2678 pmbox = &pmb->u.mb;
dea3101e 2679
858c9f6c
JS
2680 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
2681 if (pmb->vport) {
2682 lpfc_debugfs_disc_trc(pmb->vport,
2683 LPFC_DISC_TRC_MBOX_VPORT,
2684 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
2685 (uint32_t)pmbox->mbxCommand,
2686 pmbox->un.varWords[0],
2687 pmbox->un.varWords[1]);
2688 }
2689 else {
2690 lpfc_debugfs_disc_trc(phba->pport,
2691 LPFC_DISC_TRC_MBOX,
2692 "MBOX cmpl: cmd:x%x mb:x%x x%x",
2693 (uint32_t)pmbox->mbxCommand,
2694 pmbox->un.varWords[0],
2695 pmbox->un.varWords[1]);
2696 }
2697 }
2698
dea3101e
JB
2699 /*
2700 * It is a fatal error if unknown mbox command completion.
2701 */
2702 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
2703 MBX_SHUTDOWN) {
af901ca1 2704 /* Unknown mailbox command compl */
92d7f7b0 2705 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2706 "(%d):0323 Unknown Mailbox command "
a183a15f 2707 "x%x (x%x/x%x) Cmpl\n",
43bfea1b
JS
2708 pmb->vport ? pmb->vport->vpi :
2709 LPFC_VPORT_UNKNOWN,
04c68496 2710 pmbox->mbxCommand,
a183a15f
JS
2711 lpfc_sli_config_mbox_subsys_get(phba,
2712 pmb),
2713 lpfc_sli_config_mbox_opcode_get(phba,
2714 pmb));
2e0fef85 2715 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
2716 phba->work_hs = HS_FFER3;
2717 lpfc_handle_eratt(phba);
92d7f7b0 2718 continue;
dea3101e
JB
2719 }
2720
dea3101e
JB
2721 if (pmbox->mbxStatus) {
2722 phba->sli.slistat.mbox_stat_err++;
2723 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
2724 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0 2725 lpfc_printf_log(phba, KERN_INFO,
a183a15f
JS
2726 LOG_MBOX | LOG_SLI,
2727 "(%d):0305 Mbox cmd cmpl "
2728 "error - RETRYing Data: x%x "
2729 "(x%x/x%x) x%x x%x x%x\n",
43bfea1b
JS
2730 pmb->vport ? pmb->vport->vpi :
2731 LPFC_VPORT_UNKNOWN,
a183a15f
JS
2732 pmbox->mbxCommand,
2733 lpfc_sli_config_mbox_subsys_get(phba,
2734 pmb),
2735 lpfc_sli_config_mbox_opcode_get(phba,
2736 pmb),
2737 pmbox->mbxStatus,
2738 pmbox->un.varWords[0],
43bfea1b
JS
2739 pmb->vport ? pmb->vport->port_state :
2740 LPFC_VPORT_UNKNOWN);
dea3101e
JB
2741 pmbox->mbxStatus = 0;
2742 pmbox->mbxOwner = OWN_HOST;
dea3101e 2743 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
04c68496 2744 if (rc != MBX_NOT_FINISHED)
92d7f7b0 2745 continue;
dea3101e
JB
2746 }
2747 }
2748
2749 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 2750 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
2d44d165 2751 "(%d):0307 Mailbox cmd x%x (x%x/x%x) Cmpl %ps "
e74c03c8
JS
2752 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
2753 "x%x x%x x%x\n",
92d7f7b0 2754 pmb->vport ? pmb->vport->vpi : 0,
dea3101e 2755 pmbox->mbxCommand,
a183a15f
JS
2756 lpfc_sli_config_mbox_subsys_get(phba, pmb),
2757 lpfc_sli_config_mbox_opcode_get(phba, pmb),
dea3101e
JB
2758 pmb->mbox_cmpl,
2759 *((uint32_t *) pmbox),
2760 pmbox->un.varWords[0],
2761 pmbox->un.varWords[1],
2762 pmbox->un.varWords[2],
2763 pmbox->un.varWords[3],
2764 pmbox->un.varWords[4],
2765 pmbox->un.varWords[5],
2766 pmbox->un.varWords[6],
e74c03c8
JS
2767 pmbox->un.varWords[7],
2768 pmbox->un.varWords[8],
2769 pmbox->un.varWords[9],
2770 pmbox->un.varWords[10]);
dea3101e 2771
92d7f7b0 2772 if (pmb->mbox_cmpl)
dea3101e 2773 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS
2774 } while (1);
2775 return 0;
2776}
dea3101e 2777
e59058c4 2778/**
3621a710 2779 * lpfc_sli_get_buff - Get the buffer associated with the buffer tag
e59058c4
JS
2780 * @phba: Pointer to HBA context object.
2781 * @pring: Pointer to driver SLI ring object.
2782 * @tag: buffer tag.
2783 *
2784 * This function is called with no lock held. When QUE_BUFTAG_BIT bit
2785 * is set in the tag the buffer is posted for a particular exchange,
2786 * the function will return the buffer without replacing the buffer.
2787 * If the buffer is for unsolicited ELS or CT traffic, this function
2788 * returns the buffer and also posts another buffer to the firmware.
2789 **/
76bb24ef
JS
2790static struct lpfc_dmabuf *
2791lpfc_sli_get_buff(struct lpfc_hba *phba,
9f1e1b50
JS
2792 struct lpfc_sli_ring *pring,
2793 uint32_t tag)
76bb24ef 2794{
9f1e1b50
JS
2795 struct hbq_dmabuf *hbq_entry;
2796
76bb24ef
JS
2797 if (tag & QUE_BUFTAG_BIT)
2798 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
9f1e1b50
JS
2799 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
2800 if (!hbq_entry)
2801 return NULL;
2802 return &hbq_entry->dbuf;
76bb24ef 2803}
57127f15 2804
3772a991
JS
2805/**
2806 * lpfc_complete_unsol_iocb - Complete an unsolicited sequence
2807 * @phba: Pointer to HBA context object.
2808 * @pring: Pointer to driver SLI ring object.
2809 * @saveq: Pointer to the iocbq struct representing the sequence starting frame.
2810 * @fch_r_ctl: the r_ctl for the first frame of the sequence.
2811 * @fch_type: the type for the first frame of the sequence.
2812 *
2813 * This function is called with no lock held. This function uses the r_ctl and
2814 * type of the received sequence to find the correct callback function to call
2815 * to process the sequence.
2816 **/
2817static int
2818lpfc_complete_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2819 struct lpfc_iocbq *saveq, uint32_t fch_r_ctl,
2820 uint32_t fch_type)
2821{
2822 int i;
2823
f358dd0c
JS
2824 switch (fch_type) {
2825 case FC_TYPE_NVME:
d613b6a7 2826 lpfc_nvmet_unsol_ls_event(phba, pring, saveq);
f358dd0c
JS
2827 return 1;
2828 default:
2829 break;
2830 }
2831
3772a991
JS
2832 /* unSolicited Responses */
2833 if (pring->prt[0].profile) {
2834 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
2835 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
2836 saveq);
2837 return 1;
2838 }
2839 /* We must search, based on rctl / type
2840 for the right routine */
2841 for (i = 0; i < pring->num_mask; i++) {
2842 if ((pring->prt[i].rctl == fch_r_ctl) &&
2843 (pring->prt[i].type == fch_type)) {
2844 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
2845 (pring->prt[i].lpfc_sli_rcv_unsol_event)
2846 (phba, pring, saveq);
2847 return 1;
2848 }
2849 }
2850 return 0;
2851}
e59058c4
JS
2852
2853/**
3621a710 2854 * lpfc_sli_process_unsol_iocb - Unsolicited iocb handler
e59058c4
JS
2855 * @phba: Pointer to HBA context object.
2856 * @pring: Pointer to driver SLI ring object.
2857 * @saveq: Pointer to the unsolicited iocb.
2858 *
2859 * This function is called with no lock held by the ring event handler
2860 * when there is an unsolicited iocb posted to the response ring by the
2861 * firmware. This function gets the buffer associated with the iocbs
2862 * and calls the event handler for the ring. This function handles both
2863 * qring buffers and hbq buffers.
2864 * When the function returns 1 the caller can free the iocb object otherwise
2865 * upper layer functions will free the iocb objects.
2866 **/
dea3101e
JB
2867static int
2868lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2869 struct lpfc_iocbq *saveq)
2870{
2871 IOCB_t * irsp;
2872 WORD5 * w5p;
2873 uint32_t Rctl, Type;
76bb24ef 2874 struct lpfc_iocbq *iocbq;
3163f725 2875 struct lpfc_dmabuf *dmzbuf;
dea3101e 2876
dea3101e 2877 irsp = &(saveq->iocb);
57127f15
JS
2878
2879 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
2880 if (pring->lpfc_sli_rcv_async_status)
2881 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
2882 else
2883 lpfc_printf_log(phba,
2884 KERN_WARNING,
2885 LOG_SLI,
2886 "0316 Ring %d handler: unexpected "
2887 "ASYNC_STATUS iocb received evt_code "
2888 "0x%x\n",
2889 pring->ringno,
2890 irsp->un.asyncstat.evt_code);
2891 return 1;
2892 }
2893
3163f725
JS
2894 if ((irsp->ulpCommand == CMD_IOCB_RET_XRI64_CX) &&
2895 (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)) {
2896 if (irsp->ulpBdeCount > 0) {
2897 dmzbuf = lpfc_sli_get_buff(phba, pring,
2898 irsp->un.ulpWord[3]);
2899 lpfc_in_buf_free(phba, dmzbuf);
2900 }
2901
2902 if (irsp->ulpBdeCount > 1) {
2903 dmzbuf = lpfc_sli_get_buff(phba, pring,
2904 irsp->unsli3.sli3Words[3]);
2905 lpfc_in_buf_free(phba, dmzbuf);
2906 }
2907
2908 if (irsp->ulpBdeCount > 2) {
2909 dmzbuf = lpfc_sli_get_buff(phba, pring,
2910 irsp->unsli3.sli3Words[7]);
2911 lpfc_in_buf_free(phba, dmzbuf);
2912 }
2913
2914 return 1;
2915 }
2916
92d7f7b0 2917 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS
2918 if (irsp->ulpBdeCount != 0) {
2919 saveq->context2 = lpfc_sli_get_buff(phba, pring,
2920 irsp->un.ulpWord[3]);
2921 if (!saveq->context2)
2922 lpfc_printf_log(phba,
2923 KERN_ERR,
2924 LOG_SLI,
2925 "0341 Ring %d Cannot find buffer for "
2926 "an unsolicited iocb. tag 0x%x\n",
2927 pring->ringno,
2928 irsp->un.ulpWord[3]);
76bb24ef
JS
2929 }
2930 if (irsp->ulpBdeCount == 2) {
2931 saveq->context3 = lpfc_sli_get_buff(phba, pring,
2932 irsp->unsli3.sli3Words[7]);
2933 if (!saveq->context3)
2934 lpfc_printf_log(phba,
2935 KERN_ERR,
2936 LOG_SLI,
2937 "0342 Ring %d Cannot find buffer for an"
2938 " unsolicited iocb. tag 0x%x\n",
2939 pring->ringno,
2940 irsp->unsli3.sli3Words[7]);
2941 }
2942 list_for_each_entry(iocbq, &saveq->list, list) {
76bb24ef 2943 irsp = &(iocbq->iocb);
76bb24ef
JS
2944 if (irsp->ulpBdeCount != 0) {
2945 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
2946 irsp->un.ulpWord[3]);
9c2face6 2947 if (!iocbq->context2)
76bb24ef
JS
2948 lpfc_printf_log(phba,
2949 KERN_ERR,
2950 LOG_SLI,
2951 "0343 Ring %d Cannot find "
2952 "buffer for an unsolicited iocb"
2953 ". tag 0x%x\n", pring->ringno,
92d7f7b0 2954 irsp->un.ulpWord[3]);
76bb24ef
JS
2955 }
2956 if (irsp->ulpBdeCount == 2) {
2957 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 2958 irsp->unsli3.sli3Words[7]);
9c2face6 2959 if (!iocbq->context3)
76bb24ef
JS
2960 lpfc_printf_log(phba,
2961 KERN_ERR,
2962 LOG_SLI,
2963 "0344 Ring %d Cannot find "
2964 "buffer for an unsolicited "
2965 "iocb. tag 0x%x\n",
2966 pring->ringno,
2967 irsp->unsli3.sli3Words[7]);
2968 }
2969 }
92d7f7b0 2970 }
9c2face6
JS
2971 if (irsp->ulpBdeCount != 0 &&
2972 (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
2973 irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
2974 int found = 0;
2975
2976 /* search continue save q for same XRI */
2977 list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
7851fe2c
JS
2978 if (iocbq->iocb.unsli3.rcvsli3.ox_id ==
2979 saveq->iocb.unsli3.rcvsli3.ox_id) {
9c2face6
JS
2980 list_add_tail(&saveq->list, &iocbq->list);
2981 found = 1;
2982 break;
2983 }
2984 }
2985 if (!found)
2986 list_add_tail(&saveq->clist,
2987 &pring->iocb_continue_saveq);
2988 if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
2989 list_del_init(&iocbq->clist);
2990 saveq = iocbq;
2991 irsp = &(saveq->iocb);
2992 } else
2993 return 0;
2994 }
2995 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
2996 (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
2997 (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
6a9c52cf
JS
2998 Rctl = FC_RCTL_ELS_REQ;
2999 Type = FC_TYPE_ELS;
9c2face6
JS
3000 } else {
3001 w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
3002 Rctl = w5p->hcsw.Rctl;
3003 Type = w5p->hcsw.Type;
3004
3005 /* Firmware Workaround */
3006 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
3007 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
3008 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
6a9c52cf
JS
3009 Rctl = FC_RCTL_ELS_REQ;
3010 Type = FC_TYPE_ELS;
9c2face6
JS
3011 w5p->hcsw.Rctl = Rctl;
3012 w5p->hcsw.Type = Type;
3013 }
3014 }
92d7f7b0 3015
3772a991 3016 if (!lpfc_complete_unsol_iocb(phba, pring, saveq, Rctl, Type))
92d7f7b0 3017 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3018 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 3019 "Type x%x received\n",
e8b62011 3020 pring->ringno, Rctl, Type);
3772a991 3021
92d7f7b0 3022 return 1;
dea3101e
JB
3023}
3024
e59058c4 3025/**
3621a710 3026 * lpfc_sli_iocbq_lookup - Find command iocb for the given response iocb
e59058c4
JS
3027 * @phba: Pointer to HBA context object.
3028 * @pring: Pointer to driver SLI ring object.
3029 * @prspiocb: Pointer to response iocb object.
3030 *
3031 * This function looks up the iocb_lookup table to get the command iocb
3032 * corresponding to the given response iocb using the iotag of the
e2a8be56
JS
3033 * response iocb. The driver calls this function with the hbalock held
3034 * for SLI3 ports or the ring lock held for SLI4 ports.
e59058c4
JS
3035 * This function returns the command iocb object if it finds the command
3036 * iocb else returns NULL.
3037 **/
dea3101e 3038static struct lpfc_iocbq *
2e0fef85
JS
3039lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
3040 struct lpfc_sli_ring *pring,
3041 struct lpfc_iocbq *prspiocb)
dea3101e 3042{
dea3101e
JB
3043 struct lpfc_iocbq *cmd_iocb = NULL;
3044 uint16_t iotag;
e2a8be56
JS
3045 spinlock_t *temp_lock = NULL;
3046 unsigned long iflag = 0;
3047
3048 if (phba->sli_rev == LPFC_SLI_REV4)
3049 temp_lock = &pring->ring_lock;
3050 else
3051 temp_lock = &phba->hbalock;
dea3101e 3052
e2a8be56 3053 spin_lock_irqsave(temp_lock, iflag);
604a3e30
JB
3054 iotag = prspiocb->iocb.ulpIoTag;
3055
3056 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3057 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6 3058 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
89533e9b
JS
3059 /* remove from txcmpl queue list */
3060 list_del_init(&cmd_iocb->list);
4f2e66c6 3061 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
c490850a 3062 pring->txcmplq_cnt--;
e2a8be56 3063 spin_unlock_irqrestore(temp_lock, iflag);
89533e9b 3064 return cmd_iocb;
2a9bf3d0 3065 }
dea3101e
JB
3066 }
3067
e2a8be56 3068 spin_unlock_irqrestore(temp_lock, iflag);
dea3101e 3069 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
89533e9b 3070 "0317 iotag x%x is out of "
604a3e30 3071 "range: max iotag x%x wd0 x%x\n",
e8b62011 3072 iotag, phba->sli.last_iotag,
604a3e30 3073 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB
3074 return NULL;
3075}
3076
3772a991
JS
3077/**
3078 * lpfc_sli_iocbq_lookup_by_tag - Find command iocb for the iotag
3079 * @phba: Pointer to HBA context object.
3080 * @pring: Pointer to driver SLI ring object.
3081 * @iotag: IOCB tag.
3082 *
3083 * This function looks up the iocb_lookup table to get the command iocb
e2a8be56
JS
3084 * corresponding to the given iotag. The driver calls this function with
3085 * the ring lock held because this function is an SLI4 port only helper.
3772a991
JS
3086 * This function returns the command iocb object if it finds the command
3087 * iocb else returns NULL.
3088 **/
3089static struct lpfc_iocbq *
3090lpfc_sli_iocbq_lookup_by_tag(struct lpfc_hba *phba,
3091 struct lpfc_sli_ring *pring, uint16_t iotag)
3092{
895427bd 3093 struct lpfc_iocbq *cmd_iocb = NULL;
e2a8be56
JS
3094 spinlock_t *temp_lock = NULL;
3095 unsigned long iflag = 0;
3772a991 3096
e2a8be56
JS
3097 if (phba->sli_rev == LPFC_SLI_REV4)
3098 temp_lock = &pring->ring_lock;
3099 else
3100 temp_lock = &phba->hbalock;
3101
3102 spin_lock_irqsave(temp_lock, iflag);
3772a991
JS
3103 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3104 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6
JS
3105 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
3106 /* remove from txcmpl queue list */
3107 list_del_init(&cmd_iocb->list);
3108 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
c490850a 3109 pring->txcmplq_cnt--;
e2a8be56 3110 spin_unlock_irqrestore(temp_lock, iflag);
4f2e66c6 3111 return cmd_iocb;
2a9bf3d0 3112 }
3772a991 3113 }
89533e9b 3114
e2a8be56 3115 spin_unlock_irqrestore(temp_lock, iflag);
3772a991 3116 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd
JS
3117 "0372 iotag x%x lookup error: max iotag (x%x) "
3118 "iocb_flag x%x\n",
3119 iotag, phba->sli.last_iotag,
3120 cmd_iocb ? cmd_iocb->iocb_flag : 0xffff);
3772a991
JS
3121 return NULL;
3122}
3123
e59058c4 3124/**
3621a710 3125 * lpfc_sli_process_sol_iocb - process solicited iocb completion
e59058c4
JS
3126 * @phba: Pointer to HBA context object.
3127 * @pring: Pointer to driver SLI ring object.
3128 * @saveq: Pointer to the response iocb to be processed.
3129 *
3130 * This function is called by the ring event handler for non-fcp
3131 * rings when there is a new response iocb in the response ring.
3132 * The caller is not required to hold any locks. This function
3133 * gets the command iocb associated with the response iocb and
3134 * calls the completion handler for the command iocb. If there
3135 * is no completion handler, the function will free the resources
3136 * associated with command iocb. If the response iocb is for
3137 * an already aborted command iocb, the status of the completion
3138 * is changed to IOSTAT_LOCAL_REJECT/IOERR_SLI_ABORTED.
3139 * This function always returns 1.
3140 **/
dea3101e 3141static int
2e0fef85 3142lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB
3143 struct lpfc_iocbq *saveq)
3144{
2e0fef85 3145 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB
3146 int rc = 1;
3147 unsigned long iflag;
3148
604a3e30 3149 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
dea3101e
JB
3150 if (cmdiocbp) {
3151 if (cmdiocbp->iocb_cmpl) {
ea2151b4
JS
3152 /*
3153 * If an ELS command failed send an event to mgmt
3154 * application.
3155 */
3156 if (saveq->iocb.ulpStatus &&
3157 (pring->ringno == LPFC_ELS_RING) &&
3158 (cmdiocbp->iocb.ulpCommand ==
3159 CMD_ELS_REQUEST64_CR))
3160 lpfc_send_els_failure_event(phba,
3161 cmdiocbp, saveq);
3162
dea3101e
JB
3163 /*
3164 * Post all ELS completions to the worker thread.
3165 * All other are passed to the completion callback.
3166 */
3167 if (pring->ringno == LPFC_ELS_RING) {
341af102
JS
3168 if ((phba->sli_rev < LPFC_SLI_REV4) &&
3169 (cmdiocbp->iocb_flag &
3170 LPFC_DRIVER_ABORTED)) {
3171 spin_lock_irqsave(&phba->hbalock,
3172 iflag);
07951076
JS
3173 cmdiocbp->iocb_flag &=
3174 ~LPFC_DRIVER_ABORTED;
341af102
JS
3175 spin_unlock_irqrestore(&phba->hbalock,
3176 iflag);
07951076
JS
3177 saveq->iocb.ulpStatus =
3178 IOSTAT_LOCAL_REJECT;
3179 saveq->iocb.un.ulpWord[4] =
3180 IOERR_SLI_ABORTED;
0ff10d46
JS
3181
3182 /* Firmware could still be in progress
3183 * of DMAing payload, so don't free data
3184 * buffer till after a hbeat.
3185 */
341af102
JS
3186 spin_lock_irqsave(&phba->hbalock,
3187 iflag);
0ff10d46 3188 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
341af102
JS
3189 spin_unlock_irqrestore(&phba->hbalock,
3190 iflag);
3191 }
0f65ff68
JS
3192 if (phba->sli_rev == LPFC_SLI_REV4) {
3193 if (saveq->iocb_flag &
3194 LPFC_EXCHANGE_BUSY) {
3195 /* Set cmdiocb flag for the
3196 * exchange busy so sgl (xri)
3197 * will not be released until
3198 * the abort xri is received
3199 * from hba.
3200 */
3201 spin_lock_irqsave(
3202 &phba->hbalock, iflag);
3203 cmdiocbp->iocb_flag |=
3204 LPFC_EXCHANGE_BUSY;
3205 spin_unlock_irqrestore(
3206 &phba->hbalock, iflag);
3207 }
3208 if (cmdiocbp->iocb_flag &
3209 LPFC_DRIVER_ABORTED) {
3210 /*
3211 * Clear LPFC_DRIVER_ABORTED
3212 * bit in case it was driver
3213 * initiated abort.
3214 */
3215 spin_lock_irqsave(
3216 &phba->hbalock, iflag);
3217 cmdiocbp->iocb_flag &=
3218 ~LPFC_DRIVER_ABORTED;
3219 spin_unlock_irqrestore(
3220 &phba->hbalock, iflag);
3221 cmdiocbp->iocb.ulpStatus =
3222 IOSTAT_LOCAL_REJECT;
3223 cmdiocbp->iocb.un.ulpWord[4] =
3224 IOERR_ABORT_REQUESTED;
3225 /*
3226 * For SLI4, irsiocb contains
3227 * NO_XRI in sli_xritag, it
3228 * shall not affect releasing
3229 * sgl (xri) process.
3230 */
3231 saveq->iocb.ulpStatus =
3232 IOSTAT_LOCAL_REJECT;
3233 saveq->iocb.un.ulpWord[4] =
3234 IOERR_SLI_ABORTED;
3235 spin_lock_irqsave(
3236 &phba->hbalock, iflag);
3237 saveq->iocb_flag |=
3238 LPFC_DELAY_MEM_FREE;
3239 spin_unlock_irqrestore(
3240 &phba->hbalock, iflag);
3241 }
07951076 3242 }
dea3101e 3243 }
2e0fef85 3244 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB
3245 } else
3246 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB
3247 } else {
3248 /*
3249 * Unknown initiating command based on the response iotag.
3250 * This could be the case on the ELS ring because of
3251 * lpfc_els_abort().
3252 */
3253 if (pring->ringno != LPFC_ELS_RING) {
3254 /*
3255 * Ring <ringno> handler: unexpected completion IoTag
3256 * <IoTag>
3257 */
a257bf90 3258 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
3259 "0322 Ring %d handler: "
3260 "unexpected completion IoTag x%x "
3261 "Data: x%x x%x x%x x%x\n",
3262 pring->ringno,
3263 saveq->iocb.ulpIoTag,
3264 saveq->iocb.ulpStatus,
3265 saveq->iocb.un.ulpWord[4],
3266 saveq->iocb.ulpCommand,
3267 saveq->iocb.ulpContext);
dea3101e
JB
3268 }
3269 }
68876920 3270
dea3101e
JB
3271 return rc;
3272}
3273
e59058c4 3274/**
3621a710 3275 * lpfc_sli_rsp_pointers_error - Response ring pointer error handler
e59058c4
JS
3276 * @phba: Pointer to HBA context object.
3277 * @pring: Pointer to driver SLI ring object.
3278 *
3279 * This function is called from the iocb ring event handlers when
3280 * put pointer is ahead of the get pointer for a ring. This function signal
3281 * an error attention condition to the worker thread and the worker
3282 * thread will transition the HBA to offline state.
3283 **/
2e0fef85
JS
3284static void
3285lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 3286{
34b02dcd 3287 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
875fbdfe 3288 /*
025dfdaf 3289 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
875fbdfe
JSEC
3290 * rsp ring <portRspMax>
3291 */
3292 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3293 "0312 Ring %d handler: portRspPut %d "
025dfdaf 3294 "is bigger than rsp ring %d\n",
e8b62011 3295 pring->ringno, le32_to_cpu(pgp->rspPutInx),
7e56aa25 3296 pring->sli.sli3.numRiocb);
875fbdfe 3297
2e0fef85 3298 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC
3299
3300 /*
3301 * All error attention handlers are posted to
3302 * worker thread
3303 */
3304 phba->work_ha |= HA_ERATT;
3305 phba->work_hs = HS_FFER3;
92d7f7b0 3306
5e9d9b82 3307 lpfc_worker_wake_up(phba);
875fbdfe
JSEC
3308
3309 return;
3310}
3311
9399627f 3312/**
3621a710 3313 * lpfc_poll_eratt - Error attention polling timer timeout handler
9399627f
JS
3314 * @ptr: Pointer to address of HBA context object.
3315 *
3316 * This function is invoked by the Error Attention polling timer when the
3317 * timer times out. It will check the SLI Error Attention register for
3318 * possible attention events. If so, it will post an Error Attention event
3319 * and wake up worker thread to process it. Otherwise, it will set up the
3320 * Error Attention polling timer for the next poll.
3321 **/
f22eb4d3 3322void lpfc_poll_eratt(struct timer_list *t)
9399627f
JS
3323{
3324 struct lpfc_hba *phba;
eb016566 3325 uint32_t eratt = 0;
aa6fbb75 3326 uint64_t sli_intr, cnt;
9399627f 3327
f22eb4d3 3328 phba = from_timer(phba, t, eratt_poll);
9399627f 3329
aa6fbb75
JS
3330 /* Here we will also keep track of interrupts per sec of the hba */
3331 sli_intr = phba->sli.slistat.sli_intr;
3332
3333 if (phba->sli.slistat.sli_prev_intr > sli_intr)
3334 cnt = (((uint64_t)(-1) - phba->sli.slistat.sli_prev_intr) +
3335 sli_intr);
3336 else
3337 cnt = (sli_intr - phba->sli.slistat.sli_prev_intr);
3338
65791f1f
JS
3339 /* 64-bit integer division not supported on 32-bit x86 - use do_div */
3340 do_div(cnt, phba->eratt_poll_interval);
aa6fbb75
JS
3341 phba->sli.slistat.sli_ips = cnt;
3342
3343 phba->sli.slistat.sli_prev_intr = sli_intr;
3344
9399627f
JS
3345 /* Check chip HA register for error event */
3346 eratt = lpfc_sli_check_eratt(phba);
3347
3348 if (eratt)
3349 /* Tell the worker thread there is work to do */
3350 lpfc_worker_wake_up(phba);
3351 else
3352 /* Restart the timer for next eratt poll */
256ec0d0
JS
3353 mod_timer(&phba->eratt_poll,
3354 jiffies +
65791f1f 3355 msecs_to_jiffies(1000 * phba->eratt_poll_interval));
9399627f
JS
3356 return;
3357}
3358
875fbdfe 3359
e59058c4 3360/**
3621a710 3361 * lpfc_sli_handle_fast_ring_event - Handle ring events on FCP ring
e59058c4
JS
3362 * @phba: Pointer to HBA context object.
3363 * @pring: Pointer to driver SLI ring object.
3364 * @mask: Host attention register mask for this ring.
3365 *
3366 * This function is called from the interrupt context when there is a ring
3367 * event for the fcp ring. The caller does not hold any lock.
3368 * The function processes each response iocb in the response ring until it
25985edc 3369 * finds an iocb with LE bit set and chains all the iocbs up to the iocb with
e59058c4
JS
3370 * LE bit set. The function will call the completion handler of the command iocb
3371 * if the response iocb indicates a completion for a command iocb or it is
3372 * an abort completion. The function will call lpfc_sli_process_unsol_iocb
3373 * function if this is an unsolicited iocb.
dea3101e 3374 * This routine presumes LPFC_FCP_RING handling and doesn't bother
45ed1190
JS
3375 * to check it explicitly.
3376 */
3377int
2e0fef85
JS
3378lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
3379 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3380{
34b02dcd 3381 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
dea3101e 3382 IOCB_t *irsp = NULL;
87f6eaff 3383 IOCB_t *entry = NULL;
dea3101e
JB
3384 struct lpfc_iocbq *cmdiocbq = NULL;
3385 struct lpfc_iocbq rspiocbq;
dea3101e
JB
3386 uint32_t status;
3387 uint32_t portRspPut, portRspMax;
3388 int rc = 1;
3389 lpfc_iocb_type type;
3390 unsigned long iflag;
3391 uint32_t rsp_cmpl = 0;
dea3101e 3392
2e0fef85 3393 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3394 pring->stats.iocb_event++;
3395
dea3101e
JB
3396 /*
3397 * The next available response entry should never exceed the maximum
3398 * entries. If it does, treat it as an adapter hardware error.
3399 */
7e56aa25 3400 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3401 portRspPut = le32_to_cpu(pgp->rspPutInx);
3402 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 3403 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 3404 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3405 return 1;
3406 }
45ed1190
JS
3407 if (phba->fcp_ring_in_use) {
3408 spin_unlock_irqrestore(&phba->hbalock, iflag);
3409 return 1;
3410 } else
3411 phba->fcp_ring_in_use = 1;
dea3101e
JB
3412
3413 rmb();
7e56aa25 3414 while (pring->sli.sli3.rspidx != portRspPut) {
87f6eaff
JSEC
3415 /*
3416 * Fetch an entry off the ring and copy it into a local data
3417 * structure. The copy involves a byte-swap since the
3418 * network byte order and pci byte orders are different.
3419 */
ed957684 3420 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 3421 phba->last_completion_time = jiffies;
875fbdfe 3422
7e56aa25
JS
3423 if (++pring->sli.sli3.rspidx >= portRspMax)
3424 pring->sli.sli3.rspidx = 0;
875fbdfe 3425
87f6eaff
JSEC
3426 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
3427 (uint32_t *) &rspiocbq.iocb,
ed957684 3428 phba->iocb_rsp_size);
a4bc3379 3429 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC
3430 irsp = &rspiocbq.iocb;
3431
dea3101e
JB
3432 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
3433 pring->stats.iocb_rsp++;
3434 rsp_cmpl++;
3435
3436 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS
3437 /*
3438 * If resource errors reported from HBA, reduce
3439 * queuedepths of the SCSI device.
3440 */
3441 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3442 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3443 IOERR_NO_RESOURCES)) {
92d7f7b0 3444 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3445 phba->lpfc_rampdown_queue_depth(phba);
92d7f7b0
JS
3446 spin_lock_irqsave(&phba->hbalock, iflag);
3447 }
3448
dea3101e
JB
3449 /* Rsp ring <ringno> error: IOCB */
3450 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3451 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 3452 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 3453 pring->ringno,
92d7f7b0
JS
3454 irsp->un.ulpWord[0],
3455 irsp->un.ulpWord[1],
3456 irsp->un.ulpWord[2],
3457 irsp->un.ulpWord[3],
3458 irsp->un.ulpWord[4],
3459 irsp->un.ulpWord[5],
d7c255b2
JS
3460 *(uint32_t *)&irsp->un1,
3461 *((uint32_t *)&irsp->un1 + 1));
dea3101e
JB
3462 }
3463
3464 switch (type) {
3465 case LPFC_ABORT_IOCB:
3466 case LPFC_SOL_IOCB:
3467 /*
3468 * Idle exchange closed via ABTS from port. No iocb
3469 * resources need to be recovered.
3470 */
3471 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 3472 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3473 "0333 IOCB cmd 0x%x"
dca9479b 3474 " processed. Skipping"
92d7f7b0 3475 " completion\n",
dca9479b 3476 irsp->ulpCommand);
dea3101e
JB
3477 break;
3478 }
3479
e2a8be56 3480 spin_unlock_irqrestore(&phba->hbalock, iflag);
604a3e30
JB
3481 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
3482 &rspiocbq);
e2a8be56 3483 spin_lock_irqsave(&phba->hbalock, iflag);
0f65ff68
JS
3484 if (unlikely(!cmdiocbq))
3485 break;
3486 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED)
3487 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3488 if (cmdiocbq->iocb_cmpl) {
3489 spin_unlock_irqrestore(&phba->hbalock, iflag);
3490 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
3491 &rspiocbq);
3492 spin_lock_irqsave(&phba->hbalock, iflag);
3493 }
dea3101e 3494 break;
a4bc3379 3495 case LPFC_UNSOL_IOCB:
2e0fef85 3496 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 3497 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 3498 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 3499 break;
dea3101e
JB
3500 default:
3501 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3502 char adaptermsg[LPFC_MAX_ADPTMSG];
3503 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3504 memcpy(&adaptermsg[0], (uint8_t *) irsp,
3505 MAX_MSG_DATA);
898eb71c
JP
3506 dev_warn(&((phba->pcidev)->dev),
3507 "lpfc%d: %s\n",
dea3101e
JB
3508 phba->brd_no, adaptermsg);
3509 } else {
3510 /* Unknown IOCB command */
3511 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3512 "0334 Unknown IOCB command "
92d7f7b0 3513 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 3514 type, irsp->ulpCommand,
92d7f7b0
JS
3515 irsp->ulpStatus,
3516 irsp->ulpIoTag,
3517 irsp->ulpContext);
dea3101e
JB
3518 }
3519 break;
3520 }
3521
3522 /*
3523 * The response IOCB has been processed. Update the ring
3524 * pointer in SLIM. If the port response put pointer has not
3525 * been updated, sync the pgp->rspPutInx and fetch the new port
3526 * response put pointer.
3527 */
7e56aa25
JS
3528 writel(pring->sli.sli3.rspidx,
3529 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3530
7e56aa25 3531 if (pring->sli.sli3.rspidx == portRspPut)
dea3101e
JB
3532 portRspPut = le32_to_cpu(pgp->rspPutInx);
3533 }
3534
3535 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
3536 pring->stats.iocb_rsp_full++;
3537 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3538 writel(status, phba->CAregaddr);
3539 readl(phba->CAregaddr);
3540 }
3541 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3542 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3543 pring->stats.iocb_cmd_empty++;
3544
3545 /* Force update of the local copy of cmdGetInx */
7e56aa25 3546 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3547 lpfc_sli_resume_iocb(phba, pring);
3548
3549 if ((pring->lpfc_sli_cmd_available))
3550 (pring->lpfc_sli_cmd_available) (phba, pring);
3551
3552 }
3553
45ed1190 3554 phba->fcp_ring_in_use = 0;
2e0fef85 3555 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3556 return rc;
3557}
3558
e59058c4 3559/**
3772a991
JS
3560 * lpfc_sli_sp_handle_rspiocb - Handle slow-path response iocb
3561 * @phba: Pointer to HBA context object.
3562 * @pring: Pointer to driver SLI ring object.
3563 * @rspiocbp: Pointer to driver response IOCB object.
3564 *
3565 * This function is called from the worker thread when there is a slow-path
3566 * response IOCB to process. This function chains all the response iocbs until
3567 * seeing the iocb with the LE bit set. The function will call
3568 * lpfc_sli_process_sol_iocb function if the response iocb indicates a
3569 * completion of a command iocb. The function will call the
3570 * lpfc_sli_process_unsol_iocb function if this is an unsolicited iocb.
3571 * The function frees the resources or calls the completion handler if this
3572 * iocb is an abort completion. The function returns NULL when the response
3573 * iocb has the LE bit set and all the chained iocbs are processed, otherwise
3574 * this function shall chain the iocb on to the iocb_continueq and return the
3575 * response iocb passed in.
3576 **/
3577static struct lpfc_iocbq *
3578lpfc_sli_sp_handle_rspiocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3579 struct lpfc_iocbq *rspiocbp)
3580{
3581 struct lpfc_iocbq *saveq;
3582 struct lpfc_iocbq *cmdiocbp;
3583 struct lpfc_iocbq *next_iocb;
3584 IOCB_t *irsp = NULL;
3585 uint32_t free_saveq;
3586 uint8_t iocb_cmd_type;
3587 lpfc_iocb_type type;
3588 unsigned long iflag;
3589 int rc;
3590
3591 spin_lock_irqsave(&phba->hbalock, iflag);
3592 /* First add the response iocb to the countinueq list */
3593 list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
3594 pring->iocb_continueq_cnt++;
3595
70f23fd6 3596 /* Now, determine whether the list is completed for processing */
3772a991
JS
3597 irsp = &rspiocbp->iocb;
3598 if (irsp->ulpLe) {
3599 /*
3600 * By default, the driver expects to free all resources
3601 * associated with this iocb completion.
3602 */
3603 free_saveq = 1;
3604 saveq = list_get_first(&pring->iocb_continueq,
3605 struct lpfc_iocbq, list);
3606 irsp = &(saveq->iocb);
3607 list_del_init(&pring->iocb_continueq);
3608 pring->iocb_continueq_cnt = 0;
3609
3610 pring->stats.iocb_rsp++;
3611
3612 /*
3613 * If resource errors reported from HBA, reduce
3614 * queuedepths of the SCSI device.
3615 */
3616 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3617 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3618 IOERR_NO_RESOURCES)) {
3772a991
JS
3619 spin_unlock_irqrestore(&phba->hbalock, iflag);
3620 phba->lpfc_rampdown_queue_depth(phba);
3621 spin_lock_irqsave(&phba->hbalock, iflag);
3622 }
3623
3624 if (irsp->ulpStatus) {
3625 /* Rsp ring <ringno> error: IOCB */
3626 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
3627 "0328 Rsp Ring %d error: "
3628 "IOCB Data: "
3629 "x%x x%x x%x x%x "
3630 "x%x x%x x%x x%x "
3631 "x%x x%x x%x x%x "
3632 "x%x x%x x%x x%x\n",
3633 pring->ringno,
3634 irsp->un.ulpWord[0],
3635 irsp->un.ulpWord[1],
3636 irsp->un.ulpWord[2],
3637 irsp->un.ulpWord[3],
3638 irsp->un.ulpWord[4],
3639 irsp->un.ulpWord[5],
3640 *(((uint32_t *) irsp) + 6),
3641 *(((uint32_t *) irsp) + 7),
3642 *(((uint32_t *) irsp) + 8),
3643 *(((uint32_t *) irsp) + 9),
3644 *(((uint32_t *) irsp) + 10),
3645 *(((uint32_t *) irsp) + 11),
3646 *(((uint32_t *) irsp) + 12),
3647 *(((uint32_t *) irsp) + 13),
3648 *(((uint32_t *) irsp) + 14),
3649 *(((uint32_t *) irsp) + 15));
3650 }
3651
3652 /*
3653 * Fetch the IOCB command type and call the correct completion
3654 * routine. Solicited and Unsolicited IOCBs on the ELS ring
3655 * get freed back to the lpfc_iocb_list by the discovery
3656 * kernel thread.
3657 */
3658 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
3659 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
3660 switch (type) {
3661 case LPFC_SOL_IOCB:
3662 spin_unlock_irqrestore(&phba->hbalock, iflag);
3663 rc = lpfc_sli_process_sol_iocb(phba, pring, saveq);
3664 spin_lock_irqsave(&phba->hbalock, iflag);
3665 break;
3666
3667 case LPFC_UNSOL_IOCB:
3668 spin_unlock_irqrestore(&phba->hbalock, iflag);
3669 rc = lpfc_sli_process_unsol_iocb(phba, pring, saveq);
3670 spin_lock_irqsave(&phba->hbalock, iflag);
3671 if (!rc)
3672 free_saveq = 0;
3673 break;
3674
3675 case LPFC_ABORT_IOCB:
3676 cmdiocbp = NULL;
e2a8be56
JS
3677 if (irsp->ulpCommand != CMD_XRI_ABORTED_CX) {
3678 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991
JS
3679 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring,
3680 saveq);
e2a8be56
JS
3681 spin_lock_irqsave(&phba->hbalock, iflag);
3682 }
3772a991
JS
3683 if (cmdiocbp) {
3684 /* Call the specified completion routine */
3685 if (cmdiocbp->iocb_cmpl) {
3686 spin_unlock_irqrestore(&phba->hbalock,
3687 iflag);
3688 (cmdiocbp->iocb_cmpl)(phba, cmdiocbp,
3689 saveq);
3690 spin_lock_irqsave(&phba->hbalock,
3691 iflag);
3692 } else
3693 __lpfc_sli_release_iocbq(phba,
3694 cmdiocbp);
3695 }
3696 break;
3697
3698 case LPFC_UNKNOWN_IOCB:
3699 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3700 char adaptermsg[LPFC_MAX_ADPTMSG];
3701 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3702 memcpy(&adaptermsg[0], (uint8_t *)irsp,
3703 MAX_MSG_DATA);
3704 dev_warn(&((phba->pcidev)->dev),
3705 "lpfc%d: %s\n",
3706 phba->brd_no, adaptermsg);
3707 } else {
3708 /* Unknown IOCB command */
3709 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3710 "0335 Unknown IOCB "
3711 "command Data: x%x "
3712 "x%x x%x x%x\n",
3713 irsp->ulpCommand,
3714 irsp->ulpStatus,
3715 irsp->ulpIoTag,
3716 irsp->ulpContext);
3717 }
3718 break;
3719 }
3720
3721 if (free_saveq) {
3722 list_for_each_entry_safe(rspiocbp, next_iocb,
3723 &saveq->list, list) {
61f35bff 3724 list_del_init(&rspiocbp->list);
3772a991
JS
3725 __lpfc_sli_release_iocbq(phba, rspiocbp);
3726 }
3727 __lpfc_sli_release_iocbq(phba, saveq);
3728 }
3729 rspiocbp = NULL;
3730 }
3731 spin_unlock_irqrestore(&phba->hbalock, iflag);
3732 return rspiocbp;
3733}
3734
3735/**
3736 * lpfc_sli_handle_slow_ring_event - Wrapper func for handling slow-path iocbs
e59058c4
JS
3737 * @phba: Pointer to HBA context object.
3738 * @pring: Pointer to driver SLI ring object.
3739 * @mask: Host attention register mask for this ring.
3740 *
3772a991
JS
3741 * This routine wraps the actual slow_ring event process routine from the
3742 * API jump table function pointer from the lpfc_hba struct.
e59058c4 3743 **/
3772a991 3744void
2e0fef85
JS
3745lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
3746 struct lpfc_sli_ring *pring, uint32_t mask)
3772a991
JS
3747{
3748 phba->lpfc_sli_handle_slow_ring_event(phba, pring, mask);
3749}
3750
3751/**
3752 * lpfc_sli_handle_slow_ring_event_s3 - Handle SLI3 ring event for non-FCP rings
3753 * @phba: Pointer to HBA context object.
3754 * @pring: Pointer to driver SLI ring object.
3755 * @mask: Host attention register mask for this ring.
3756 *
3757 * This function is called from the worker thread when there is a ring event
3758 * for non-fcp rings. The caller does not hold any lock. The function will
3759 * remove each response iocb in the response ring and calls the handle
3760 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3761 **/
3762static void
3763lpfc_sli_handle_slow_ring_event_s3(struct lpfc_hba *phba,
3764 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3765{
34b02dcd 3766 struct lpfc_pgp *pgp;
dea3101e
JB
3767 IOCB_t *entry;
3768 IOCB_t *irsp = NULL;
3769 struct lpfc_iocbq *rspiocbp = NULL;
dea3101e 3770 uint32_t portRspPut, portRspMax;
dea3101e 3771 unsigned long iflag;
3772a991 3772 uint32_t status;
dea3101e 3773
34b02dcd 3774 pgp = &phba->port_gp[pring->ringno];
2e0fef85 3775 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3776 pring->stats.iocb_event++;
3777
dea3101e
JB
3778 /*
3779 * The next available response entry should never exceed the maximum
3780 * entries. If it does, treat it as an adapter hardware error.
3781 */
7e56aa25 3782 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3783 portRspPut = le32_to_cpu(pgp->rspPutInx);
3784 if (portRspPut >= portRspMax) {
3785 /*
025dfdaf 3786 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
dea3101e
JB
3787 * rsp ring <portRspMax>
3788 */
ed957684 3789 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3790 "0303 Ring %d handler: portRspPut %d "
025dfdaf 3791 "is bigger than rsp ring %d\n",
e8b62011 3792 pring->ringno, portRspPut, portRspMax);
dea3101e 3793
2e0fef85
JS
3794 phba->link_state = LPFC_HBA_ERROR;
3795 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3796
3797 phba->work_hs = HS_FFER3;
3798 lpfc_handle_eratt(phba);
3799
3772a991 3800 return;
dea3101e
JB
3801 }
3802
3803 rmb();
7e56aa25 3804 while (pring->sli.sli3.rspidx != portRspPut) {
dea3101e
JB
3805 /*
3806 * Build a completion list and call the appropriate handler.
3807 * The process is to get the next available response iocb, get
3808 * a free iocb from the list, copy the response data into the
3809 * free iocb, insert to the continuation list, and update the
3810 * next response index to slim. This process makes response
3811 * iocb's in the ring available to DMA as fast as possible but
3812 * pays a penalty for a copy operation. Since the iocb is
3813 * only 32 bytes, this penalty is considered small relative to
3814 * the PCI reads for register values and a slim write. When
3815 * the ulpLe field is set, the entire Command has been
3816 * received.
3817 */
ed957684
JS
3818 entry = lpfc_resp_iocb(phba, pring);
3819
858c9f6c 3820 phba->last_completion_time = jiffies;
2e0fef85 3821 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
3822 if (rspiocbp == NULL) {
3823 printk(KERN_ERR "%s: out of buffers! Failing "
cadbd4a5 3824 "completion.\n", __func__);
dea3101e
JB
3825 break;
3826 }
3827
ed957684
JS
3828 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
3829 phba->iocb_rsp_size);
dea3101e
JB
3830 irsp = &rspiocbp->iocb;
3831
7e56aa25
JS
3832 if (++pring->sli.sli3.rspidx >= portRspMax)
3833 pring->sli.sli3.rspidx = 0;
dea3101e 3834
a58cbd52
JS
3835 if (pring->ringno == LPFC_ELS_RING) {
3836 lpfc_debugfs_slow_ring_trc(phba,
3837 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
3838 *(((uint32_t *) irsp) + 4),
3839 *(((uint32_t *) irsp) + 6),
3840 *(((uint32_t *) irsp) + 7));
3841 }
3842
7e56aa25
JS
3843 writel(pring->sli.sli3.rspidx,
3844 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3845
3772a991
JS
3846 spin_unlock_irqrestore(&phba->hbalock, iflag);
3847 /* Handle the response IOCB */
3848 rspiocbp = lpfc_sli_sp_handle_rspiocb(phba, pring, rspiocbp);
3849 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3850
3851 /*
3852 * If the port response put pointer has not been updated, sync
3853 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
3854 * response put pointer.
3855 */
7e56aa25 3856 if (pring->sli.sli3.rspidx == portRspPut) {
dea3101e
JB
3857 portRspPut = le32_to_cpu(pgp->rspPutInx);
3858 }
7e56aa25 3859 } /* while (pring->sli.sli3.rspidx != portRspPut) */
dea3101e 3860
92d7f7b0 3861 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB
3862 /* At least one response entry has been freed */
3863 pring->stats.iocb_rsp_full++;
3864 /* SET RxRE_RSP in Chip Att register */
3865 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3866 writel(status, phba->CAregaddr);
3867 readl(phba->CAregaddr); /* flush */
3868 }
3869 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3870 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3871 pring->stats.iocb_cmd_empty++;
3872
3873 /* Force update of the local copy of cmdGetInx */
7e56aa25 3874 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3875 lpfc_sli_resume_iocb(phba, pring);
3876
3877 if ((pring->lpfc_sli_cmd_available))
3878 (pring->lpfc_sli_cmd_available) (phba, pring);
3879
3880 }
3881
2e0fef85 3882 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3883 return;
dea3101e
JB
3884}
3885
4f774513
JS
3886/**
3887 * lpfc_sli_handle_slow_ring_event_s4 - Handle SLI4 slow-path els events
3888 * @phba: Pointer to HBA context object.
3889 * @pring: Pointer to driver SLI ring object.
3890 * @mask: Host attention register mask for this ring.
3891 *
3892 * This function is called from the worker thread when there is a pending
3893 * ELS response iocb on the driver internal slow-path response iocb worker
3894 * queue. The caller does not hold any lock. The function will remove each
3895 * response iocb from the response worker queue and calls the handle
3896 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3897 **/
3898static void
3899lpfc_sli_handle_slow_ring_event_s4(struct lpfc_hba *phba,
3900 struct lpfc_sli_ring *pring, uint32_t mask)
3901{
3902 struct lpfc_iocbq *irspiocbq;
4d9ab994
JS
3903 struct hbq_dmabuf *dmabuf;
3904 struct lpfc_cq_event *cq_event;
4f774513 3905 unsigned long iflag;
0ef01a2d 3906 int count = 0;
4f774513 3907
45ed1190
JS
3908 spin_lock_irqsave(&phba->hbalock, iflag);
3909 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
3910 spin_unlock_irqrestore(&phba->hbalock, iflag);
3911 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
4f774513
JS
3912 /* Get the response iocb from the head of work queue */
3913 spin_lock_irqsave(&phba->hbalock, iflag);
45ed1190 3914 list_remove_head(&phba->sli4_hba.sp_queue_event,
4d9ab994 3915 cq_event, struct lpfc_cq_event, list);
4f774513 3916 spin_unlock_irqrestore(&phba->hbalock, iflag);
4d9ab994
JS
3917
3918 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
3919 case CQE_CODE_COMPL_WQE:
3920 irspiocbq = container_of(cq_event, struct lpfc_iocbq,
3921 cq_event);
45ed1190
JS
3922 /* Translate ELS WCQE to response IOCBQ */
3923 irspiocbq = lpfc_sli4_els_wcqe_to_rspiocbq(phba,
3924 irspiocbq);
3925 if (irspiocbq)
3926 lpfc_sli_sp_handle_rspiocb(phba, pring,
3927 irspiocbq);
0ef01a2d 3928 count++;
4d9ab994
JS
3929 break;
3930 case CQE_CODE_RECEIVE:
7851fe2c 3931 case CQE_CODE_RECEIVE_V1:
4d9ab994
JS
3932 dmabuf = container_of(cq_event, struct hbq_dmabuf,
3933 cq_event);
3934 lpfc_sli4_handle_received_buffer(phba, dmabuf);
0ef01a2d 3935 count++;
4d9ab994
JS
3936 break;
3937 default:
3938 break;
3939 }
0ef01a2d
JS
3940
3941 /* Limit the number of events to 64 to avoid soft lockups */
3942 if (count == 64)
3943 break;
4f774513
JS
3944 }
3945}
3946
e59058c4 3947/**
3621a710 3948 * lpfc_sli_abort_iocb_ring - Abort all iocbs in the ring
e59058c4
JS
3949 * @phba: Pointer to HBA context object.
3950 * @pring: Pointer to driver SLI ring object.
3951 *
3952 * This function aborts all iocbs in the given ring and frees all the iocb
3953 * objects in txq. This function issues an abort iocb for all the iocb commands
3954 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3955 * the return of this function. The caller is not required to hold any locks.
3956 **/
2e0fef85 3957void
dea3101e
JB
3958lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
3959{
2534ba75 3960 LIST_HEAD(completions);
dea3101e 3961 struct lpfc_iocbq *iocb, *next_iocb;
dea3101e 3962
92d7f7b0
JS
3963 if (pring->ringno == LPFC_ELS_RING) {
3964 lpfc_fabric_abort_hba(phba);
3965 }
3966
dea3101e
JB
3967 /* Error everything on txq and txcmplq
3968 * First do the txq.
3969 */
db55fba8
JS
3970 if (phba->sli_rev >= LPFC_SLI_REV4) {
3971 spin_lock_irq(&pring->ring_lock);
3972 list_splice_init(&pring->txq, &completions);
3973 pring->txq_cnt = 0;
3974 spin_unlock_irq(&pring->ring_lock);
dea3101e 3975
db55fba8
JS
3976 spin_lock_irq(&phba->hbalock);
3977 /* Next issue ABTS for everything on the txcmplq */
3978 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3979 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3980 spin_unlock_irq(&phba->hbalock);
3981 } else {
3982 spin_lock_irq(&phba->hbalock);
3983 list_splice_init(&pring->txq, &completions);
3984 pring->txq_cnt = 0;
dea3101e 3985
db55fba8
JS
3986 /* Next issue ABTS for everything on the txcmplq */
3987 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3988 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3989 spin_unlock_irq(&phba->hbalock);
3990 }
dea3101e 3991
a257bf90
JS
3992 /* Cancel all the IOCBs from the completions list */
3993 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
3994 IOERR_SLI_ABORTED);
dea3101e
JB
3995}
3996
db55fba8
JS
3997/**
3998 * lpfc_sli_abort_fcp_rings - Abort all iocbs in all FCP rings
3999 * @phba: Pointer to HBA context object.
4000 * @pring: Pointer to driver SLI ring object.
4001 *
4002 * This function aborts all iocbs in FCP rings and frees all the iocb
4003 * objects in txq. This function issues an abort iocb for all the iocb commands
4004 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
4005 * the return of this function. The caller is not required to hold any locks.
4006 **/
4007void
4008lpfc_sli_abort_fcp_rings(struct lpfc_hba *phba)
4009{
4010 struct lpfc_sli *psli = &phba->sli;
4011 struct lpfc_sli_ring *pring;
4012 uint32_t i;
4013
4014 /* Look on all the FCP Rings for the iotag */
4015 if (phba->sli_rev >= LPFC_SLI_REV4) {
cdb42bec 4016 for (i = 0; i < phba->cfg_hdw_queue; i++) {
c00f62e6 4017 pring = phba->sli4_hba.hdwq[i].io_wq->pring;
db55fba8
JS
4018 lpfc_sli_abort_iocb_ring(phba, pring);
4019 }
4020 } else {
895427bd 4021 pring = &psli->sli3_ring[LPFC_FCP_RING];
db55fba8
JS
4022 lpfc_sli_abort_iocb_ring(phba, pring);
4023 }
4024}
4025
a8e497d5 4026/**
c00f62e6 4027 * lpfc_sli_flush_io_rings - flush all iocbs in the IO ring
a8e497d5
JS
4028 * @phba: Pointer to HBA context object.
4029 *
c00f62e6 4030 * This function flushes all iocbs in the IO ring and frees all the iocb
a8e497d5
JS
4031 * objects in txq and txcmplq. This function will not issue abort iocbs
4032 * for all the iocb commands in txcmplq, they will just be returned with
4033 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
4034 * slot has been permanently disabled.
4035 **/
4036void
c00f62e6 4037lpfc_sli_flush_io_rings(struct lpfc_hba *phba)
a8e497d5
JS
4038{
4039 LIST_HEAD(txq);
4040 LIST_HEAD(txcmplq);
a8e497d5
JS
4041 struct lpfc_sli *psli = &phba->sli;
4042 struct lpfc_sli_ring *pring;
db55fba8 4043 uint32_t i;
c1dd9111 4044 struct lpfc_iocbq *piocb, *next_iocb;
a8e497d5
JS
4045
4046 spin_lock_irq(&phba->hbalock);
4f2e66c6 4047 /* Indicate the I/O queues are flushed */
c00f62e6 4048 phba->hba_flag |= HBA_IOQ_FLUSH;
a8e497d5
JS
4049 spin_unlock_irq(&phba->hbalock);
4050
db55fba8
JS
4051 /* Look on all the FCP Rings for the iotag */
4052 if (phba->sli_rev >= LPFC_SLI_REV4) {
cdb42bec 4053 for (i = 0; i < phba->cfg_hdw_queue; i++) {
c00f62e6 4054 pring = phba->sli4_hba.hdwq[i].io_wq->pring;
db55fba8
JS
4055
4056 spin_lock_irq(&pring->ring_lock);
4057 /* Retrieve everything on txq */
4058 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4059 list_for_each_entry_safe(piocb, next_iocb,
4060 &pring->txcmplq, list)
4061 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4062 /* Retrieve everything on the txcmplq */
4063 list_splice_init(&pring->txcmplq, &txcmplq);
4064 pring->txq_cnt = 0;
4065 pring->txcmplq_cnt = 0;
4066 spin_unlock_irq(&pring->ring_lock);
4067
4068 /* Flush the txq */
4069 lpfc_sli_cancel_iocbs(phba, &txq,
4070 IOSTAT_LOCAL_REJECT,
4071 IOERR_SLI_DOWN);
4072 /* Flush the txcmpq */
4073 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4074 IOSTAT_LOCAL_REJECT,
4075 IOERR_SLI_DOWN);
4076 }
4077 } else {
895427bd 4078 pring = &psli->sli3_ring[LPFC_FCP_RING];
a8e497d5 4079
db55fba8
JS
4080 spin_lock_irq(&phba->hbalock);
4081 /* Retrieve everything on txq */
4082 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4083 list_for_each_entry_safe(piocb, next_iocb,
4084 &pring->txcmplq, list)
4085 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4086 /* Retrieve everything on the txcmplq */
4087 list_splice_init(&pring->txcmplq, &txcmplq);
4088 pring->txq_cnt = 0;
4089 pring->txcmplq_cnt = 0;
4090 spin_unlock_irq(&phba->hbalock);
4091
4092 /* Flush the txq */
4093 lpfc_sli_cancel_iocbs(phba, &txq, IOSTAT_LOCAL_REJECT,
4094 IOERR_SLI_DOWN);
4095 /* Flush the txcmpq */
4096 lpfc_sli_cancel_iocbs(phba, &txcmplq, IOSTAT_LOCAL_REJECT,
4097 IOERR_SLI_DOWN);
4098 }
a8e497d5
JS
4099}
4100
e59058c4 4101/**
3772a991 4102 * lpfc_sli_brdready_s3 - Check for sli3 host ready status
e59058c4
JS
4103 * @phba: Pointer to HBA context object.
4104 * @mask: Bit mask to be checked.
4105 *
4106 * This function reads the host status register and compares
4107 * with the provided bit mask to check if HBA completed
4108 * the restart. This function will wait in a loop for the
4109 * HBA to complete restart. If the HBA does not restart within
4110 * 15 iterations, the function will reset the HBA again. The
4111 * function returns 1 when HBA fail to restart otherwise returns
4112 * zero.
4113 **/
3772a991
JS
4114static int
4115lpfc_sli_brdready_s3(struct lpfc_hba *phba, uint32_t mask)
dea3101e 4116{
41415862
JW
4117 uint32_t status;
4118 int i = 0;
4119 int retval = 0;
dea3101e 4120
41415862 4121 /* Read the HBA Host Status Register */
9940b97b
JS
4122 if (lpfc_readl(phba->HSregaddr, &status))
4123 return 1;
dea3101e 4124
41415862
JW
4125 /*
4126 * Check status register every 100ms for 5 retries, then every
4127 * 500ms for 5, then every 2.5 sec for 5, then reset board and
4128 * every 2.5 sec for 4.
4129 * Break our of the loop if errors occurred during init.
4130 */
4131 while (((status & mask) != mask) &&
4132 !(status & HS_FFERM) &&
4133 i++ < 20) {
dea3101e 4134
41415862
JW
4135 if (i <= 5)
4136 msleep(10);
4137 else if (i <= 10)
4138 msleep(500);
4139 else
4140 msleep(2500);
dea3101e 4141
41415862 4142 if (i == 15) {
2e0fef85 4143 /* Do post */
92d7f7b0 4144 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW
4145 lpfc_sli_brdrestart(phba);
4146 }
4147 /* Read the HBA Host Status Register */
9940b97b
JS
4148 if (lpfc_readl(phba->HSregaddr, &status)) {
4149 retval = 1;
4150 break;
4151 }
41415862 4152 }
dea3101e 4153
41415862
JW
4154 /* Check to see if any errors occurred during init */
4155 if ((status & HS_FFERM) || (i >= 20)) {
e40a02c1
JS
4156 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4157 "2751 Adapter failed to restart, "
4158 "status reg x%x, FW Data: A8 x%x AC x%x\n",
4159 status,
4160 readl(phba->MBslimaddr + 0xa8),
4161 readl(phba->MBslimaddr + 0xac));
2e0fef85 4162 phba->link_state = LPFC_HBA_ERROR;
41415862 4163 retval = 1;
dea3101e 4164 }
dea3101e 4165
41415862
JW
4166 return retval;
4167}
dea3101e 4168
da0436e9
JS
4169/**
4170 * lpfc_sli_brdready_s4 - Check for sli4 host ready status
4171 * @phba: Pointer to HBA context object.
4172 * @mask: Bit mask to be checked.
4173 *
4174 * This function checks the host status register to check if HBA is
4175 * ready. This function will wait in a loop for the HBA to be ready
4176 * If the HBA is not ready , the function will will reset the HBA PCI
4177 * function again. The function returns 1 when HBA fail to be ready
4178 * otherwise returns zero.
4179 **/
4180static int
4181lpfc_sli_brdready_s4(struct lpfc_hba *phba, uint32_t mask)
4182{
4183 uint32_t status;
4184 int retval = 0;
4185
4186 /* Read the HBA Host Status Register */
4187 status = lpfc_sli4_post_status_check(phba);
4188
4189 if (status) {
4190 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
4191 lpfc_sli_brdrestart(phba);
4192 status = lpfc_sli4_post_status_check(phba);
4193 }
4194
4195 /* Check to see if any errors occurred during init */
4196 if (status) {
4197 phba->link_state = LPFC_HBA_ERROR;
4198 retval = 1;
4199 } else
4200 phba->sli4_hba.intr_enable = 0;
4201
4202 return retval;
4203}
4204
4205/**
4206 * lpfc_sli_brdready - Wrapper func for checking the hba readyness
4207 * @phba: Pointer to HBA context object.
4208 * @mask: Bit mask to be checked.
4209 *
4210 * This routine wraps the actual SLI3 or SLI4 hba readyness check routine
4211 * from the API jump table function pointer from the lpfc_hba struct.
4212 **/
4213int
4214lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
4215{
4216 return phba->lpfc_sli_brdready(phba, mask);
4217}
4218
9290831f
JS
4219#define BARRIER_TEST_PATTERN (0xdeadbeef)
4220
e59058c4 4221/**
3621a710 4222 * lpfc_reset_barrier - Make HBA ready for HBA reset
e59058c4
JS
4223 * @phba: Pointer to HBA context object.
4224 *
1b51197d
JS
4225 * This function is called before resetting an HBA. This function is called
4226 * with hbalock held and requests HBA to quiesce DMAs before a reset.
e59058c4 4227 **/
2e0fef85 4228void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 4229{
65a29c16
JS
4230 uint32_t __iomem *resp_buf;
4231 uint32_t __iomem *mbox_buf;
9290831f 4232 volatile uint32_t mbox;
9940b97b 4233 uint32_t hc_copy, ha_copy, resp_data;
9290831f
JS
4234 int i;
4235 uint8_t hdrtype;
4236
1c2ba475
JT
4237 lockdep_assert_held(&phba->hbalock);
4238
9290831f
JS
4239 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
4240 if (hdrtype != 0x80 ||
4241 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
4242 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
4243 return;
4244
4245 /*
4246 * Tell the other part of the chip to suspend temporarily all
4247 * its DMA activity.
4248 */
65a29c16 4249 resp_buf = phba->MBslimaddr;
9290831f
JS
4250
4251 /* Disable the error attention */
9940b97b
JS
4252 if (lpfc_readl(phba->HCregaddr, &hc_copy))
4253 return;
9290831f
JS
4254 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
4255 readl(phba->HCregaddr); /* flush */
2e0fef85 4256 phba->link_flag |= LS_IGNORE_ERATT;
9290831f 4257
9940b97b
JS
4258 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4259 return;
4260 if (ha_copy & HA_ERATT) {
9290831f
JS
4261 /* Clear Chip error bit */
4262 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4263 phba->pport->stopped = 1;
9290831f
JS
4264 }
4265
4266 mbox = 0;
4267 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
4268 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
4269
4270 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 4271 mbox_buf = phba->MBslimaddr;
9290831f
JS
4272 writel(mbox, mbox_buf);
4273
9940b97b
JS
4274 for (i = 0; i < 50; i++) {
4275 if (lpfc_readl((resp_buf + 1), &resp_data))
4276 return;
4277 if (resp_data != ~(BARRIER_TEST_PATTERN))
4278 mdelay(1);
4279 else
4280 break;
4281 }
4282 resp_data = 0;
4283 if (lpfc_readl((resp_buf + 1), &resp_data))
4284 return;
4285 if (resp_data != ~(BARRIER_TEST_PATTERN)) {
f4b4c68f 4286 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE ||
2e0fef85 4287 phba->pport->stopped)
9290831f
JS
4288 goto restore_hc;
4289 else
4290 goto clear_errat;
4291 }
4292
4293 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
9940b97b
JS
4294 resp_data = 0;
4295 for (i = 0; i < 500; i++) {
4296 if (lpfc_readl(resp_buf, &resp_data))
4297 return;
4298 if (resp_data != mbox)
4299 mdelay(1);
4300 else
4301 break;
4302 }
9290831f
JS
4303
4304clear_errat:
4305
9940b97b
JS
4306 while (++i < 500) {
4307 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4308 return;
4309 if (!(ha_copy & HA_ERATT))
4310 mdelay(1);
4311 else
4312 break;
4313 }
9290831f
JS
4314
4315 if (readl(phba->HAregaddr) & HA_ERATT) {
4316 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4317 phba->pport->stopped = 1;
9290831f
JS
4318 }
4319
4320restore_hc:
2e0fef85 4321 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS
4322 writel(hc_copy, phba->HCregaddr);
4323 readl(phba->HCregaddr); /* flush */
4324}
4325
e59058c4 4326/**
3621a710 4327 * lpfc_sli_brdkill - Issue a kill_board mailbox command
e59058c4
JS
4328 * @phba: Pointer to HBA context object.
4329 *
4330 * This function issues a kill_board mailbox command and waits for
4331 * the error attention interrupt. This function is called for stopping
4332 * the firmware processing. The caller is not required to hold any
4333 * locks. This function calls lpfc_hba_down_post function to free
4334 * any pending commands after the kill. The function will return 1 when it
4335 * fails to kill the board else will return 0.
4336 **/
41415862 4337int
2e0fef85 4338lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW
4339{
4340 struct lpfc_sli *psli;
4341 LPFC_MBOXQ_t *pmb;
4342 uint32_t status;
4343 uint32_t ha_copy;
4344 int retval;
4345 int i = 0;
dea3101e 4346
41415862 4347 psli = &phba->sli;
dea3101e 4348
41415862 4349 /* Kill HBA */
ed957684 4350 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS
4351 "0329 Kill HBA Data: x%x x%x\n",
4352 phba->pport->port_state, psli->sli_flag);
41415862 4353
98c9ea5c
JS
4354 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4355 if (!pmb)
41415862 4356 return 1;
41415862
JW
4357
4358 /* Disable the error attention */
2e0fef85 4359 spin_lock_irq(&phba->hbalock);
9940b97b
JS
4360 if (lpfc_readl(phba->HCregaddr, &status)) {
4361 spin_unlock_irq(&phba->hbalock);
4362 mempool_free(pmb, phba->mbox_mem_pool);
4363 return 1;
4364 }
41415862
JW
4365 status &= ~HC_ERINT_ENA;
4366 writel(status, phba->HCregaddr);
4367 readl(phba->HCregaddr); /* flush */
2e0fef85
JS
4368 phba->link_flag |= LS_IGNORE_ERATT;
4369 spin_unlock_irq(&phba->hbalock);
41415862
JW
4370
4371 lpfc_kill_board(phba, pmb);
4372 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
4373 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4374
4375 if (retval != MBX_SUCCESS) {
4376 if (retval != MBX_BUSY)
4377 mempool_free(pmb, phba->mbox_mem_pool);
e40a02c1
JS
4378 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4379 "2752 KILL_BOARD command failed retval %d\n",
4380 retval);
2e0fef85
JS
4381 spin_lock_irq(&phba->hbalock);
4382 phba->link_flag &= ~LS_IGNORE_ERATT;
4383 spin_unlock_irq(&phba->hbalock);
41415862
JW
4384 return 1;
4385 }
4386
f4b4c68f
JS
4387 spin_lock_irq(&phba->hbalock);
4388 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
4389 spin_unlock_irq(&phba->hbalock);
9290831f 4390
41415862
JW
4391 mempool_free(pmb, phba->mbox_mem_pool);
4392
4393 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
4394 * attention every 100ms for 3 seconds. If we don't get ERATT after
4395 * 3 seconds we still set HBA_ERROR state because the status of the
4396 * board is now undefined.
4397 */
9940b97b
JS
4398 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4399 return 1;
41415862
JW
4400 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
4401 mdelay(100);
9940b97b
JS
4402 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4403 return 1;
41415862
JW
4404 }
4405
4406 del_timer_sync(&psli->mbox_tmo);
9290831f
JS
4407 if (ha_copy & HA_ERATT) {
4408 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4409 phba->pport->stopped = 1;
9290831f 4410 }
2e0fef85 4411 spin_lock_irq(&phba->hbalock);
41415862 4412 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
04c68496 4413 psli->mbox_active = NULL;
2e0fef85
JS
4414 phba->link_flag &= ~LS_IGNORE_ERATT;
4415 spin_unlock_irq(&phba->hbalock);
41415862 4416
41415862 4417 lpfc_hba_down_post(phba);
2e0fef85 4418 phba->link_state = LPFC_HBA_ERROR;
41415862 4419
2e0fef85 4420 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB
4421}
4422
e59058c4 4423/**
3772a991 4424 * lpfc_sli_brdreset - Reset a sli-2 or sli-3 HBA
e59058c4
JS
4425 * @phba: Pointer to HBA context object.
4426 *
4427 * This function resets the HBA by writing HC_INITFF to the control
4428 * register. After the HBA resets, this function resets all the iocb ring
4429 * indices. This function disables PCI layer parity checking during
4430 * the reset.
4431 * This function returns 0 always.
4432 * The caller is not required to hold any locks.
4433 **/
41415862 4434int
2e0fef85 4435lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 4436{
41415862 4437 struct lpfc_sli *psli;
dea3101e 4438 struct lpfc_sli_ring *pring;
41415862 4439 uint16_t cfg_value;
dea3101e 4440 int i;
dea3101e 4441
41415862 4442 psli = &phba->sli;
dea3101e 4443
41415862
JW
4444 /* Reset HBA */
4445 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4446 "0325 Reset HBA Data: x%x x%x\n",
4492b739
JS
4447 (phba->pport) ? phba->pport->port_state : 0,
4448 psli->sli_flag);
dea3101e
JB
4449
4450 /* perform board reset */
4451 phba->fc_eventTag = 0;
4d9ab994 4452 phba->link_events = 0;
4492b739
JS
4453 if (phba->pport) {
4454 phba->pport->fc_myDID = 0;
4455 phba->pport->fc_prevDID = 0;
4456 }
dea3101e 4457
41415862 4458 /* Turn off parity checking and serr during the physical reset */
32a93100
JS
4459 if (pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value))
4460 return -EIO;
4461
41415862
JW
4462 pci_write_config_word(phba->pcidev, PCI_COMMAND,
4463 (cfg_value &
4464 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4465
3772a991
JS
4466 psli->sli_flag &= ~(LPFC_SLI_ACTIVE | LPFC_PROCESS_LA);
4467
41415862
JW
4468 /* Now toggle INITFF bit in the Host Control Register */
4469 writel(HC_INITFF, phba->HCregaddr);
4470 mdelay(1);
4471 readl(phba->HCregaddr); /* flush */
4472 writel(0, phba->HCregaddr);
4473 readl(phba->HCregaddr); /* flush */
4474
4475 /* Restore PCI cmd register */
4476 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB
4477
4478 /* Initialize relevant SLI info */
41415862 4479 for (i = 0; i < psli->num_rings; i++) {
895427bd 4480 pring = &psli->sli3_ring[i];
dea3101e 4481 pring->flag = 0;
7e56aa25
JS
4482 pring->sli.sli3.rspidx = 0;
4483 pring->sli.sli3.next_cmdidx = 0;
4484 pring->sli.sli3.local_getidx = 0;
4485 pring->sli.sli3.cmdidx = 0;
dea3101e
JB
4486 pring->missbufcnt = 0;
4487 }
dea3101e 4488
2e0fef85 4489 phba->link_state = LPFC_WARM_START;
41415862
JW
4490 return 0;
4491}
4492
e59058c4 4493/**
da0436e9
JS
4494 * lpfc_sli4_brdreset - Reset a sli-4 HBA
4495 * @phba: Pointer to HBA context object.
4496 *
4497 * This function resets a SLI4 HBA. This function disables PCI layer parity
4498 * checking during resets the device. The caller is not required to hold
4499 * any locks.
4500 *
8c24a4f6 4501 * This function returns 0 on success else returns negative error code.
da0436e9
JS
4502 **/
4503int
4504lpfc_sli4_brdreset(struct lpfc_hba *phba)
4505{
4506 struct lpfc_sli *psli = &phba->sli;
4507 uint16_t cfg_value;
0293635e 4508 int rc = 0;
da0436e9
JS
4509
4510 /* Reset HBA */
4511 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
0293635e
JS
4512 "0295 Reset HBA Data: x%x x%x x%x\n",
4513 phba->pport->port_state, psli->sli_flag,
4514 phba->hba_flag);
da0436e9
JS
4515
4516 /* perform board reset */
4517 phba->fc_eventTag = 0;
4d9ab994 4518 phba->link_events = 0;
da0436e9
JS
4519 phba->pport->fc_myDID = 0;
4520 phba->pport->fc_prevDID = 0;
4521
da0436e9
JS
4522 spin_lock_irq(&phba->hbalock);
4523 psli->sli_flag &= ~(LPFC_PROCESS_LA);
4524 phba->fcf.fcf_flag = 0;
da0436e9
JS
4525 spin_unlock_irq(&phba->hbalock);
4526
0293635e
JS
4527 /* SLI4 INTF 2: if FW dump is being taken skip INIT_PORT */
4528 if (phba->hba_flag & HBA_FW_DUMP_OP) {
4529 phba->hba_flag &= ~HBA_FW_DUMP_OP;
4530 return rc;
4531 }
4532
da0436e9
JS
4533 /* Now physically reset the device */
4534 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4535 "0389 Performing PCI function reset!\n");
be858b65
JS
4536
4537 /* Turn off parity checking and serr during the physical reset */
32a93100
JS
4538 if (pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value)) {
4539 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4540 "3205 PCI read Config failed\n");
4541 return -EIO;
4542 }
4543
be858b65
JS
4544 pci_write_config_word(phba->pcidev, PCI_COMMAND, (cfg_value &
4545 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4546
88318816 4547 /* Perform FCoE PCI function reset before freeing queue memory */
27b01b82 4548 rc = lpfc_pci_function_reset(phba);
da0436e9 4549
be858b65
JS
4550 /* Restore PCI cmd register */
4551 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
4552
27b01b82 4553 return rc;
da0436e9
JS
4554}
4555
4556/**
4557 * lpfc_sli_brdrestart_s3 - Restart a sli-3 hba
e59058c4
JS
4558 * @phba: Pointer to HBA context object.
4559 *
4560 * This function is called in the SLI initialization code path to
4561 * restart the HBA. The caller is not required to hold any lock.
4562 * This function writes MBX_RESTART mailbox command to the SLIM and
4563 * resets the HBA. At the end of the function, it calls lpfc_hba_down_post
4564 * function to free any pending commands. The function enables
4565 * POST only during the first initialization. The function returns zero.
4566 * The function does not guarantee completion of MBX_RESTART mailbox
4567 * command before the return of this function.
4568 **/
da0436e9
JS
4569static int
4570lpfc_sli_brdrestart_s3(struct lpfc_hba *phba)
41415862
JW
4571{
4572 MAILBOX_t *mb;
4573 struct lpfc_sli *psli;
41415862
JW
4574 volatile uint32_t word0;
4575 void __iomem *to_slim;
0d878419 4576 uint32_t hba_aer_enabled;
41415862 4577
2e0fef85 4578 spin_lock_irq(&phba->hbalock);
41415862 4579
0d878419
JS
4580 /* Take PCIe device Advanced Error Reporting (AER) state */
4581 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4582
41415862
JW
4583 psli = &phba->sli;
4584
4585 /* Restart HBA */
4586 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4587 "0337 Restart HBA Data: x%x x%x\n",
4492b739
JS
4588 (phba->pport) ? phba->pport->port_state : 0,
4589 psli->sli_flag);
41415862
JW
4590
4591 word0 = 0;
4592 mb = (MAILBOX_t *) &word0;
4593 mb->mbxCommand = MBX_RESTART;
4594 mb->mbxHc = 1;
4595
9290831f
JS
4596 lpfc_reset_barrier(phba);
4597
41415862
JW
4598 to_slim = phba->MBslimaddr;
4599 writel(*(uint32_t *) mb, to_slim);
4600 readl(to_slim); /* flush */
4601
4602 /* Only skip post after fc_ffinit is completed */
4492b739 4603 if (phba->pport && phba->pport->port_state)
41415862 4604 word0 = 1; /* This is really setting up word1 */
eaf15d5b 4605 else
41415862 4606 word0 = 0; /* This is really setting up word1 */
65a29c16 4607 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW
4608 writel(*(uint32_t *) mb, to_slim);
4609 readl(to_slim); /* flush */
dea3101e 4610
41415862 4611 lpfc_sli_brdreset(phba);
4492b739
JS
4612 if (phba->pport)
4613 phba->pport->stopped = 0;
2e0fef85 4614 phba->link_state = LPFC_INIT_START;
da0436e9 4615 phba->hba_flag = 0;
2e0fef85 4616 spin_unlock_irq(&phba->hbalock);
41415862 4617
64ba8818 4618 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4619 psli->stats_start = ktime_get_seconds();
64ba8818 4620
eaf15d5b
JS
4621 /* Give the INITFF and Post time to settle. */
4622 mdelay(100);
41415862 4623
0d878419
JS
4624 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4625 if (hba_aer_enabled)
4626 pci_disable_pcie_error_reporting(phba->pcidev);
4627
41415862 4628 lpfc_hba_down_post(phba);
dea3101e
JB
4629
4630 return 0;
4631}
4632
da0436e9
JS
4633/**
4634 * lpfc_sli_brdrestart_s4 - Restart the sli-4 hba
4635 * @phba: Pointer to HBA context object.
4636 *
4637 * This function is called in the SLI initialization code path to restart
4638 * a SLI4 HBA. The caller is not required to hold any lock.
4639 * At the end of the function, it calls lpfc_hba_down_post function to
4640 * free any pending commands.
4641 **/
4642static int
4643lpfc_sli_brdrestart_s4(struct lpfc_hba *phba)
4644{
4645 struct lpfc_sli *psli = &phba->sli;
75baf696 4646 uint32_t hba_aer_enabled;
27b01b82 4647 int rc;
da0436e9
JS
4648
4649 /* Restart HBA */
4650 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4651 "0296 Restart HBA Data: x%x x%x\n",
4652 phba->pport->port_state, psli->sli_flag);
4653
75baf696
JS
4654 /* Take PCIe device Advanced Error Reporting (AER) state */
4655 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4656
27b01b82 4657 rc = lpfc_sli4_brdreset(phba);
4fb86a6b
JS
4658 if (rc) {
4659 phba->link_state = LPFC_HBA_ERROR;
4660 goto hba_down_queue;
4661 }
da0436e9
JS
4662
4663 spin_lock_irq(&phba->hbalock);
4664 phba->pport->stopped = 0;
4665 phba->link_state = LPFC_INIT_START;
4666 phba->hba_flag = 0;
4667 spin_unlock_irq(&phba->hbalock);
4668
4669 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4670 psli->stats_start = ktime_get_seconds();
da0436e9 4671
75baf696
JS
4672 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4673 if (hba_aer_enabled)
4674 pci_disable_pcie_error_reporting(phba->pcidev);
4675
4fb86a6b 4676hba_down_queue:
da0436e9 4677 lpfc_hba_down_post(phba);
569dbe84 4678 lpfc_sli4_queue_destroy(phba);
da0436e9 4679
27b01b82 4680 return rc;
da0436e9
JS
4681}
4682
4683/**
4684 * lpfc_sli_brdrestart - Wrapper func for restarting hba
4685 * @phba: Pointer to HBA context object.
4686 *
4687 * This routine wraps the actual SLI3 or SLI4 hba restart routine from the
4688 * API jump table function pointer from the lpfc_hba struct.
4689**/
4690int
4691lpfc_sli_brdrestart(struct lpfc_hba *phba)
4692{
4693 return phba->lpfc_sli_brdrestart(phba);
4694}
4695
e59058c4 4696/**
3621a710 4697 * lpfc_sli_chipset_init - Wait for the restart of the HBA after a restart
e59058c4
JS
4698 * @phba: Pointer to HBA context object.
4699 *
4700 * This function is called after a HBA restart to wait for successful
4701 * restart of the HBA. Successful restart of the HBA is indicated by
4702 * HS_FFRDY and HS_MBRDY bits. If the HBA fails to restart even after 15
4703 * iteration, the function will restart the HBA again. The function returns
4704 * zero if HBA successfully restarted else returns negative error code.
4705 **/
4492b739 4706int
dea3101e
JB
4707lpfc_sli_chipset_init(struct lpfc_hba *phba)
4708{
4709 uint32_t status, i = 0;
4710
4711 /* Read the HBA Host Status Register */
9940b97b
JS
4712 if (lpfc_readl(phba->HSregaddr, &status))
4713 return -EIO;
dea3101e
JB
4714
4715 /* Check status register to see what current state is */
4716 i = 0;
4717 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
4718
dcf2a4e0
JS
4719 /* Check every 10ms for 10 retries, then every 100ms for 90
4720 * retries, then every 1 sec for 50 retires for a total of
4721 * ~60 seconds before reset the board again and check every
4722 * 1 sec for 50 retries. The up to 60 seconds before the
4723 * board ready is required by the Falcon FIPS zeroization
4724 * complete, and any reset the board in between shall cause
4725 * restart of zeroization, further delay the board ready.
dea3101e 4726 */
dcf2a4e0 4727 if (i++ >= 200) {
dea3101e
JB
4728 /* Adapter failed to init, timeout, status reg
4729 <status> */
ed957684 4730 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4731 "0436 Adapter failed to init, "
09372820
JS
4732 "timeout, status reg x%x, "
4733 "FW Data: A8 x%x AC x%x\n", status,
4734 readl(phba->MBslimaddr + 0xa8),
4735 readl(phba->MBslimaddr + 0xac));
2e0fef85 4736 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4737 return -ETIMEDOUT;
4738 }
4739
4740 /* Check to see if any errors occurred during init */
4741 if (status & HS_FFERM) {
4742 /* ERROR: During chipset initialization */
4743 /* Adapter failed to init, chipset, status reg
4744 <status> */
ed957684 4745 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4746 "0437 Adapter failed to init, "
09372820
JS
4747 "chipset, status reg x%x, "
4748 "FW Data: A8 x%x AC x%x\n", status,
4749 readl(phba->MBslimaddr + 0xa8),
4750 readl(phba->MBslimaddr + 0xac));
2e0fef85 4751 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4752 return -EIO;
4753 }
4754
dcf2a4e0 4755 if (i <= 10)
dea3101e 4756 msleep(10);
dcf2a4e0
JS
4757 else if (i <= 100)
4758 msleep(100);
4759 else
4760 msleep(1000);
dea3101e 4761
dcf2a4e0
JS
4762 if (i == 150) {
4763 /* Do post */
92d7f7b0 4764 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4765 lpfc_sli_brdrestart(phba);
dea3101e
JB
4766 }
4767 /* Read the HBA Host Status Register */
9940b97b
JS
4768 if (lpfc_readl(phba->HSregaddr, &status))
4769 return -EIO;
dea3101e
JB
4770 }
4771
4772 /* Check to see if any errors occurred during init */
4773 if (status & HS_FFERM) {
4774 /* ERROR: During chipset initialization */
4775 /* Adapter failed to init, chipset, status reg <status> */
ed957684 4776 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4777 "0438 Adapter failed to init, chipset, "
09372820
JS
4778 "status reg x%x, "
4779 "FW Data: A8 x%x AC x%x\n", status,
4780 readl(phba->MBslimaddr + 0xa8),
4781 readl(phba->MBslimaddr + 0xac));
2e0fef85 4782 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4783 return -EIO;
4784 }
4785
4786 /* Clear all interrupt enable conditions */
4787 writel(0, phba->HCregaddr);
4788 readl(phba->HCregaddr); /* flush */
4789
4790 /* setup host attn register */
4791 writel(0xffffffff, phba->HAregaddr);
4792 readl(phba->HAregaddr); /* flush */
4793 return 0;
4794}
4795
e59058c4 4796/**
3621a710 4797 * lpfc_sli_hbq_count - Get the number of HBQs to be configured
e59058c4
JS
4798 *
4799 * This function calculates and returns the number of HBQs required to be
4800 * configured.
4801 **/
78b2d852 4802int
ed957684
JS
4803lpfc_sli_hbq_count(void)
4804{
92d7f7b0 4805 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS
4806}
4807
e59058c4 4808/**
3621a710 4809 * lpfc_sli_hbq_entry_count - Calculate total number of hbq entries
e59058c4
JS
4810 *
4811 * This function adds the number of hbq entries in every HBQ to get
4812 * the total number of hbq entries required for the HBA and returns
4813 * the total count.
4814 **/
ed957684
JS
4815static int
4816lpfc_sli_hbq_entry_count(void)
4817{
4818 int hbq_count = lpfc_sli_hbq_count();
4819 int count = 0;
4820 int i;
4821
4822 for (i = 0; i < hbq_count; ++i)
92d7f7b0 4823 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS
4824 return count;
4825}
4826
e59058c4 4827/**
3621a710 4828 * lpfc_sli_hbq_size - Calculate memory required for all hbq entries
e59058c4
JS
4829 *
4830 * This function calculates amount of memory required for all hbq entries
4831 * to be configured and returns the total memory required.
4832 **/
dea3101e 4833int
ed957684
JS
4834lpfc_sli_hbq_size(void)
4835{
4836 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
4837}
4838
e59058c4 4839/**
3621a710 4840 * lpfc_sli_hbq_setup - configure and initialize HBQs
e59058c4
JS
4841 * @phba: Pointer to HBA context object.
4842 *
4843 * This function is called during the SLI initialization to configure
4844 * all the HBQs and post buffers to the HBQ. The caller is not
4845 * required to hold any locks. This function will return zero if successful
4846 * else it will return negative error code.
4847 **/
ed957684
JS
4848static int
4849lpfc_sli_hbq_setup(struct lpfc_hba *phba)
4850{
4851 int hbq_count = lpfc_sli_hbq_count();
4852 LPFC_MBOXQ_t *pmb;
4853 MAILBOX_t *pmbox;
4854 uint32_t hbqno;
4855 uint32_t hbq_entry_index;
ed957684 4856
92d7f7b0
JS
4857 /* Get a Mailbox buffer to setup mailbox
4858 * commands for HBA initialization
4859 */
ed957684
JS
4860 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4861
4862 if (!pmb)
4863 return -ENOMEM;
4864
04c68496 4865 pmbox = &pmb->u.mb;
ed957684
JS
4866
4867 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
4868 phba->link_state = LPFC_INIT_MBX_CMDS;
3163f725 4869 phba->hbq_in_use = 1;
ed957684
JS
4870
4871 hbq_entry_index = 0;
4872 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
4873 phba->hbqs[hbqno].next_hbqPutIdx = 0;
4874 phba->hbqs[hbqno].hbqPutIdx = 0;
4875 phba->hbqs[hbqno].local_hbqGetIdx = 0;
4876 phba->hbqs[hbqno].entry_count =
92d7f7b0 4877 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS
4878 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
4879 hbq_entry_index, pmb);
ed957684
JS
4880 hbq_entry_index += phba->hbqs[hbqno].entry_count;
4881
4882 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
4883 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
4884 mbxStatus <status>, ring <num> */
4885
4886 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 4887 LOG_SLI | LOG_VPORT,
e8b62011 4888 "1805 Adapter failed to init. "
ed957684 4889 "Data: x%x x%x x%x\n",
e8b62011 4890 pmbox->mbxCommand,
ed957684
JS
4891 pmbox->mbxStatus, hbqno);
4892
4893 phba->link_state = LPFC_HBA_ERROR;
4894 mempool_free(pmb, phba->mbox_mem_pool);
6e7288d9 4895 return -ENXIO;
ed957684
JS
4896 }
4897 }
4898 phba->hbq_count = hbq_count;
4899
ed957684
JS
4900 mempool_free(pmb, phba->mbox_mem_pool);
4901
92d7f7b0 4902 /* Initially populate or replenish the HBQs */
d7c255b2
JS
4903 for (hbqno = 0; hbqno < hbq_count; ++hbqno)
4904 lpfc_sli_hbqbuf_init_hbqs(phba, hbqno);
ed957684
JS
4905 return 0;
4906}
4907
4f774513
JS
4908/**
4909 * lpfc_sli4_rb_setup - Initialize and post RBs to HBA
4910 * @phba: Pointer to HBA context object.
4911 *
4912 * This function is called during the SLI initialization to configure
4913 * all the HBQs and post buffers to the HBQ. The caller is not
4914 * required to hold any locks. This function will return zero if successful
4915 * else it will return negative error code.
4916 **/
4917static int
4918lpfc_sli4_rb_setup(struct lpfc_hba *phba)
4919{
4920 phba->hbq_in_use = 1;
895427bd
JS
4921 phba->hbqs[LPFC_ELS_HBQ].entry_count =
4922 lpfc_hbq_defs[LPFC_ELS_HBQ]->entry_count;
4f774513 4923 phba->hbq_count = 1;
895427bd 4924 lpfc_sli_hbqbuf_init_hbqs(phba, LPFC_ELS_HBQ);
4f774513 4925 /* Initially populate or replenish the HBQs */
4f774513
JS
4926 return 0;
4927}
4928
e59058c4 4929/**
3621a710 4930 * lpfc_sli_config_port - Issue config port mailbox command
e59058c4
JS
4931 * @phba: Pointer to HBA context object.
4932 * @sli_mode: sli mode - 2/3
4933 *
183b8021 4934 * This function is called by the sli initialization code path
e59058c4
JS
4935 * to issue config_port mailbox command. This function restarts the
4936 * HBA firmware and issues a config_port mailbox command to configure
4937 * the SLI interface in the sli mode specified by sli_mode
4938 * variable. The caller is not required to hold any locks.
4939 * The function returns 0 if successful, else returns negative error
4940 * code.
4941 **/
9399627f
JS
4942int
4943lpfc_sli_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB
4944{
4945 LPFC_MBOXQ_t *pmb;
4946 uint32_t resetcount = 0, rc = 0, done = 0;
4947
4948 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4949 if (!pmb) {
2e0fef85 4950 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4951 return -ENOMEM;
4952 }
4953
ed957684 4954 phba->sli_rev = sli_mode;
dea3101e 4955 while (resetcount < 2 && !done) {
2e0fef85 4956 spin_lock_irq(&phba->hbalock);
1c067a42 4957 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 4958 spin_unlock_irq(&phba->hbalock);
92d7f7b0 4959 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4960 lpfc_sli_brdrestart(phba);
dea3101e
JB
4961 rc = lpfc_sli_chipset_init(phba);
4962 if (rc)
4963 break;
4964
2e0fef85 4965 spin_lock_irq(&phba->hbalock);
1c067a42 4966 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 4967 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
4968 resetcount++;
4969
ed957684
JS
4970 /* Call pre CONFIG_PORT mailbox command initialization. A
4971 * value of 0 means the call was successful. Any other
4972 * nonzero value is a failure, but if ERESTART is returned,
4973 * the driver may reset the HBA and try again.
4974 */
dea3101e
JB
4975 rc = lpfc_config_port_prep(phba);
4976 if (rc == -ERESTART) {
ed957684 4977 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e 4978 continue;
34b02dcd 4979 } else if (rc)
dea3101e 4980 break;
6d368e53 4981
2e0fef85 4982 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
4983 lpfc_config_port(phba, pmb);
4984 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
34b02dcd
JS
4985 phba->sli3_options &= ~(LPFC_SLI3_NPIV_ENABLED |
4986 LPFC_SLI3_HBQ_ENABLED |
4987 LPFC_SLI3_CRP_ENABLED |
bc73905a 4988 LPFC_SLI3_DSS_ENABLED);
ed957684 4989 if (rc != MBX_SUCCESS) {
dea3101e 4990 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4991 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 4992 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
04c68496 4993 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus, 0);
2e0fef85 4994 spin_lock_irq(&phba->hbalock);
04c68496 4995 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
2e0fef85
JS
4996 spin_unlock_irq(&phba->hbalock);
4997 rc = -ENXIO;
04c68496
JS
4998 } else {
4999 /* Allow asynchronous mailbox command to go through */
5000 spin_lock_irq(&phba->hbalock);
5001 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
5002 spin_unlock_irq(&phba->hbalock);
ed957684 5003 done = 1;
cb69f7de
JS
5004
5005 if ((pmb->u.mb.un.varCfgPort.casabt == 1) &&
5006 (pmb->u.mb.un.varCfgPort.gasabt == 0))
5007 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5008 "3110 Port did not grant ASABT\n");
04c68496 5009 }
dea3101e 5010 }
ed957684
JS
5011 if (!done) {
5012 rc = -EINVAL;
5013 goto do_prep_failed;
5014 }
04c68496
JS
5015 if (pmb->u.mb.un.varCfgPort.sli_mode == 3) {
5016 if (!pmb->u.mb.un.varCfgPort.cMA) {
34b02dcd
JS
5017 rc = -ENXIO;
5018 goto do_prep_failed;
5019 }
04c68496 5020 if (phba->max_vpi && pmb->u.mb.un.varCfgPort.gmv) {
34b02dcd 5021 phba->sli3_options |= LPFC_SLI3_NPIV_ENABLED;
04c68496
JS
5022 phba->max_vpi = pmb->u.mb.un.varCfgPort.max_vpi;
5023 phba->max_vports = (phba->max_vpi > phba->max_vports) ?
5024 phba->max_vpi : phba->max_vports;
5025
34b02dcd
JS
5026 } else
5027 phba->max_vpi = 0;
bc73905a
JS
5028 phba->fips_level = 0;
5029 phba->fips_spec_rev = 0;
5030 if (pmb->u.mb.un.varCfgPort.gdss) {
04c68496 5031 phba->sli3_options |= LPFC_SLI3_DSS_ENABLED;
bc73905a
JS
5032 phba->fips_level = pmb->u.mb.un.varCfgPort.fips_level;
5033 phba->fips_spec_rev = pmb->u.mb.un.varCfgPort.fips_rev;
5034 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5035 "2850 Security Crypto Active. FIPS x%d "
5036 "(Spec Rev: x%d)",
5037 phba->fips_level, phba->fips_spec_rev);
5038 }
5039 if (pmb->u.mb.un.varCfgPort.sec_err) {
5040 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5041 "2856 Config Port Security Crypto "
5042 "Error: x%x ",
5043 pmb->u.mb.un.varCfgPort.sec_err);
5044 }
04c68496 5045 if (pmb->u.mb.un.varCfgPort.gerbm)
34b02dcd 5046 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
04c68496 5047 if (pmb->u.mb.un.varCfgPort.gcrp)
34b02dcd 5048 phba->sli3_options |= LPFC_SLI3_CRP_ENABLED;
6e7288d9
JS
5049
5050 phba->hbq_get = phba->mbox->us.s3_pgp.hbq_get;
5051 phba->port_gp = phba->mbox->us.s3_pgp.port;
e2a0a9d6 5052
f44ac12f
JS
5053 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
5054 if (pmb->u.mb.un.varCfgPort.gbg == 0) {
5055 phba->cfg_enable_bg = 0;
5056 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
e2a0a9d6
JS
5057 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5058 "0443 Adapter did not grant "
5059 "BlockGuard\n");
f44ac12f 5060 }
e2a0a9d6 5061 }
34b02dcd 5062 } else {
8f34f4ce 5063 phba->hbq_get = NULL;
34b02dcd 5064 phba->port_gp = phba->mbox->us.s2.port;
d7c255b2 5065 phba->max_vpi = 0;
ed957684 5066 }
92d7f7b0 5067do_prep_failed:
ed957684
JS
5068 mempool_free(pmb, phba->mbox_mem_pool);
5069 return rc;
5070}
5071
e59058c4
JS
5072
5073/**
183b8021 5074 * lpfc_sli_hba_setup - SLI initialization function
e59058c4
JS
5075 * @phba: Pointer to HBA context object.
5076 *
183b8021
MY
5077 * This function is the main SLI initialization function. This function
5078 * is called by the HBA initialization code, HBA reset code and HBA
e59058c4
JS
5079 * error attention handler code. Caller is not required to hold any
5080 * locks. This function issues config_port mailbox command to configure
5081 * the SLI, setup iocb rings and HBQ rings. In the end the function
5082 * calls the config_port_post function to issue init_link mailbox
5083 * command and to start the discovery. The function will return zero
5084 * if successful, else it will return negative error code.
5085 **/
ed957684
JS
5086int
5087lpfc_sli_hba_setup(struct lpfc_hba *phba)
5088{
5089 uint32_t rc;
6d368e53
JS
5090 int mode = 3, i;
5091 int longs;
ed957684 5092
12247e81 5093 switch (phba->cfg_sli_mode) {
ed957684 5094 case 2:
78b2d852 5095 if (phba->cfg_enable_npiv) {
92d7f7b0 5096 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81 5097 "1824 NPIV enabled: Override sli_mode "
92d7f7b0 5098 "parameter (%d) to auto (0).\n",
12247e81 5099 phba->cfg_sli_mode);
92d7f7b0
JS
5100 break;
5101 }
ed957684
JS
5102 mode = 2;
5103 break;
5104 case 0:
5105 case 3:
5106 break;
5107 default:
92d7f7b0 5108 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81
JS
5109 "1819 Unrecognized sli_mode parameter: %d.\n",
5110 phba->cfg_sli_mode);
ed957684
JS
5111
5112 break;
5113 }
b5c53958 5114 phba->fcp_embed_io = 0; /* SLI4 FC support only */
ed957684 5115
9399627f
JS
5116 rc = lpfc_sli_config_port(phba, mode);
5117
12247e81 5118 if (rc && phba->cfg_sli_mode == 3)
92d7f7b0 5119 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS
5120 "1820 Unable to select SLI-3. "
5121 "Not supported by adapter.\n");
ed957684 5122 if (rc && mode != 2)
9399627f 5123 rc = lpfc_sli_config_port(phba, 2);
4597663f
JS
5124 else if (rc && mode == 2)
5125 rc = lpfc_sli_config_port(phba, 3);
ed957684 5126 if (rc)
dea3101e
JB
5127 goto lpfc_sli_hba_setup_error;
5128
0d878419
JS
5129 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
5130 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
5131 rc = pci_enable_pcie_error_reporting(phba->pcidev);
5132 if (!rc) {
5133 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5134 "2709 This device supports "
5135 "Advanced Error Reporting (AER)\n");
5136 spin_lock_irq(&phba->hbalock);
5137 phba->hba_flag |= HBA_AER_ENABLED;
5138 spin_unlock_irq(&phba->hbalock);
5139 } else {
5140 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5141 "2708 This device does not support "
b069d7eb
JS
5142 "Advanced Error Reporting (AER): %d\n",
5143 rc);
0d878419
JS
5144 phba->cfg_aer_support = 0;
5145 }
5146 }
5147
ed957684
JS
5148 if (phba->sli_rev == 3) {
5149 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
5150 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
ed957684
JS
5151 } else {
5152 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
5153 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 5154 phba->sli3_options = 0;
ed957684
JS
5155 }
5156
5157 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
5158 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
5159 phba->sli_rev, phba->max_vpi);
ed957684 5160 rc = lpfc_sli_ring_map(phba);
dea3101e
JB
5161
5162 if (rc)
5163 goto lpfc_sli_hba_setup_error;
5164
6d368e53
JS
5165 /* Initialize VPIs. */
5166 if (phba->sli_rev == LPFC_SLI_REV3) {
5167 /*
5168 * The VPI bitmask and physical ID array are allocated
5169 * and initialized once only - at driver load. A port
5170 * reset doesn't need to reinitialize this memory.
5171 */
5172 if ((phba->vpi_bmask == NULL) && (phba->vpi_ids == NULL)) {
5173 longs = (phba->max_vpi + BITS_PER_LONG) / BITS_PER_LONG;
6396bb22
KC
5174 phba->vpi_bmask = kcalloc(longs,
5175 sizeof(unsigned long),
6d368e53
JS
5176 GFP_KERNEL);
5177 if (!phba->vpi_bmask) {
5178 rc = -ENOMEM;
5179 goto lpfc_sli_hba_setup_error;
5180 }
5181
6396bb22
KC
5182 phba->vpi_ids = kcalloc(phba->max_vpi + 1,
5183 sizeof(uint16_t),
5184 GFP_KERNEL);
6d368e53
JS
5185 if (!phba->vpi_ids) {
5186 kfree(phba->vpi_bmask);
5187 rc = -ENOMEM;
5188 goto lpfc_sli_hba_setup_error;
5189 }
5190 for (i = 0; i < phba->max_vpi; i++)
5191 phba->vpi_ids[i] = i;
5192 }
5193 }
5194
9399627f 5195 /* Init HBQs */
ed957684
JS
5196 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
5197 rc = lpfc_sli_hbq_setup(phba);
5198 if (rc)
5199 goto lpfc_sli_hba_setup_error;
5200 }
04c68496 5201 spin_lock_irq(&phba->hbalock);
dea3101e 5202 phba->sli.sli_flag |= LPFC_PROCESS_LA;
04c68496 5203 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
5204
5205 rc = lpfc_config_port_post(phba);
5206 if (rc)
5207 goto lpfc_sli_hba_setup_error;
5208
ed957684
JS
5209 return rc;
5210
92d7f7b0 5211lpfc_sli_hba_setup_error:
2e0fef85 5212 phba->link_state = LPFC_HBA_ERROR;
e40a02c1 5213 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 5214 "0445 Firmware initialization failed\n");
dea3101e
JB
5215 return rc;
5216}
5217
e59058c4 5218/**
da0436e9
JS
5219 * lpfc_sli4_read_fcoe_params - Read fcoe params from conf region
5220 * @phba: Pointer to HBA context object.
5221 * @mboxq: mailbox pointer.
5222 * This function issue a dump mailbox command to read config region
5223 * 23 and parse the records in the region and populate driver
5224 * data structure.
e59058c4 5225 **/
da0436e9 5226static int
ff78d8f9 5227lpfc_sli4_read_fcoe_params(struct lpfc_hba *phba)
dea3101e 5228{
ff78d8f9 5229 LPFC_MBOXQ_t *mboxq;
da0436e9
JS
5230 struct lpfc_dmabuf *mp;
5231 struct lpfc_mqe *mqe;
5232 uint32_t data_length;
5233 int rc;
dea3101e 5234
da0436e9
JS
5235 /* Program the default value of vlan_id and fc_map */
5236 phba->valid_vlan = 0;
5237 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5238 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5239 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
2e0fef85 5240
ff78d8f9
JS
5241 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5242 if (!mboxq)
da0436e9
JS
5243 return -ENOMEM;
5244
ff78d8f9
JS
5245 mqe = &mboxq->u.mqe;
5246 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq)) {
5247 rc = -ENOMEM;
5248 goto out_free_mboxq;
5249 }
5250
3e1f0718 5251 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
5252 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5253
5254 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
5255 "(%d):2571 Mailbox cmd x%x Status x%x "
5256 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5257 "x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5258 "CQ: x%x x%x x%x x%x\n",
5259 mboxq->vport ? mboxq->vport->vpi : 0,
5260 bf_get(lpfc_mqe_command, mqe),
5261 bf_get(lpfc_mqe_status, mqe),
5262 mqe->un.mb_words[0], mqe->un.mb_words[1],
5263 mqe->un.mb_words[2], mqe->un.mb_words[3],
5264 mqe->un.mb_words[4], mqe->un.mb_words[5],
5265 mqe->un.mb_words[6], mqe->un.mb_words[7],
5266 mqe->un.mb_words[8], mqe->un.mb_words[9],
5267 mqe->un.mb_words[10], mqe->un.mb_words[11],
5268 mqe->un.mb_words[12], mqe->un.mb_words[13],
5269 mqe->un.mb_words[14], mqe->un.mb_words[15],
5270 mqe->un.mb_words[16], mqe->un.mb_words[50],
5271 mboxq->mcqe.word0,
5272 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
5273 mboxq->mcqe.trailer);
5274
5275 if (rc) {
5276 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5277 kfree(mp);
ff78d8f9
JS
5278 rc = -EIO;
5279 goto out_free_mboxq;
da0436e9
JS
5280 }
5281 data_length = mqe->un.mb_words[5];
a0c87cbd 5282 if (data_length > DMP_RGN23_SIZE) {
d11e31dd
JS
5283 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5284 kfree(mp);
ff78d8f9
JS
5285 rc = -EIO;
5286 goto out_free_mboxq;
d11e31dd 5287 }
dea3101e 5288
da0436e9
JS
5289 lpfc_parse_fcoe_conf(phba, mp->virt, data_length);
5290 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5291 kfree(mp);
ff78d8f9
JS
5292 rc = 0;
5293
5294out_free_mboxq:
5295 mempool_free(mboxq, phba->mbox_mem_pool);
5296 return rc;
da0436e9 5297}
e59058c4
JS
5298
5299/**
da0436e9
JS
5300 * lpfc_sli4_read_rev - Issue READ_REV and collect vpd data
5301 * @phba: pointer to lpfc hba data structure.
5302 * @mboxq: pointer to the LPFC_MBOXQ_t structure.
5303 * @vpd: pointer to the memory to hold resulting port vpd data.
5304 * @vpd_size: On input, the number of bytes allocated to @vpd.
5305 * On output, the number of data bytes in @vpd.
e59058c4 5306 *
da0436e9
JS
5307 * This routine executes a READ_REV SLI4 mailbox command. In
5308 * addition, this routine gets the port vpd data.
5309 *
5310 * Return codes
af901ca1 5311 * 0 - successful
d439d286 5312 * -ENOMEM - could not allocated memory.
e59058c4 5313 **/
da0436e9
JS
5314static int
5315lpfc_sli4_read_rev(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
5316 uint8_t *vpd, uint32_t *vpd_size)
dea3101e 5317{
da0436e9
JS
5318 int rc = 0;
5319 uint32_t dma_size;
5320 struct lpfc_dmabuf *dmabuf;
5321 struct lpfc_mqe *mqe;
dea3101e 5322
da0436e9
JS
5323 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
5324 if (!dmabuf)
5325 return -ENOMEM;
5326
5327 /*
5328 * Get a DMA buffer for the vpd data resulting from the READ_REV
5329 * mailbox command.
a257bf90 5330 */
da0436e9 5331 dma_size = *vpd_size;
750afb08
LC
5332 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, dma_size,
5333 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
5334 if (!dmabuf->virt) {
5335 kfree(dmabuf);
5336 return -ENOMEM;
a257bf90
JS
5337 }
5338
da0436e9
JS
5339 /*
5340 * The SLI4 implementation of READ_REV conflicts at word1,
5341 * bits 31:16 and SLI4 adds vpd functionality not present
5342 * in SLI3. This code corrects the conflicts.
1dcb58e5 5343 */
da0436e9
JS
5344 lpfc_read_rev(phba, mboxq);
5345 mqe = &mboxq->u.mqe;
5346 mqe->un.read_rev.vpd_paddr_high = putPaddrHigh(dmabuf->phys);
5347 mqe->un.read_rev.vpd_paddr_low = putPaddrLow(dmabuf->phys);
5348 mqe->un.read_rev.word1 &= 0x0000FFFF;
5349 bf_set(lpfc_mbx_rd_rev_vpd, &mqe->un.read_rev, 1);
5350 bf_set(lpfc_mbx_rd_rev_avail_len, &mqe->un.read_rev, dma_size);
5351
5352 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5353 if (rc) {
5354 dma_free_coherent(&phba->pcidev->dev, dma_size,
5355 dmabuf->virt, dmabuf->phys);
def9c7a9 5356 kfree(dmabuf);
da0436e9
JS
5357 return -EIO;
5358 }
1dcb58e5 5359
da0436e9
JS
5360 /*
5361 * The available vpd length cannot be bigger than the
5362 * DMA buffer passed to the port. Catch the less than
5363 * case and update the caller's size.
5364 */
5365 if (mqe->un.read_rev.avail_vpd_len < *vpd_size)
5366 *vpd_size = mqe->un.read_rev.avail_vpd_len;
3772a991 5367
d7c47992
JS
5368 memcpy(vpd, dmabuf->virt, *vpd_size);
5369
da0436e9
JS
5370 dma_free_coherent(&phba->pcidev->dev, dma_size,
5371 dmabuf->virt, dmabuf->phys);
5372 kfree(dmabuf);
5373 return 0;
dea3101e
JB
5374}
5375
cd1c8301 5376/**
b3b4f3e1 5377 * lpfc_sli4_get_ctl_attr - Retrieve SLI4 device controller attributes
cd1c8301
JS
5378 * @phba: pointer to lpfc hba data structure.
5379 *
5380 * This routine retrieves SLI4 device physical port name this PCI function
5381 * is attached to.
5382 *
5383 * Return codes
4907cb7b 5384 * 0 - successful
b3b4f3e1 5385 * otherwise - failed to retrieve controller attributes
cd1c8301
JS
5386 **/
5387static int
b3b4f3e1 5388lpfc_sli4_get_ctl_attr(struct lpfc_hba *phba)
cd1c8301
JS
5389{
5390 LPFC_MBOXQ_t *mboxq;
cd1c8301
JS
5391 struct lpfc_mbx_get_cntl_attributes *mbx_cntl_attr;
5392 struct lpfc_controller_attribute *cntl_attr;
cd1c8301
JS
5393 void *virtaddr = NULL;
5394 uint32_t alloclen, reqlen;
5395 uint32_t shdr_status, shdr_add_status;
5396 union lpfc_sli4_cfg_shdr *shdr;
cd1c8301
JS
5397 int rc;
5398
cd1c8301
JS
5399 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5400 if (!mboxq)
5401 return -ENOMEM;
cd1c8301 5402
b3b4f3e1 5403 /* Send COMMON_GET_CNTL_ATTRIBUTES mbox cmd */
cd1c8301
JS
5404 reqlen = sizeof(struct lpfc_mbx_get_cntl_attributes);
5405 alloclen = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5406 LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES, reqlen,
5407 LPFC_SLI4_MBX_NEMBED);
b3b4f3e1 5408
cd1c8301
JS
5409 if (alloclen < reqlen) {
5410 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5411 "3084 Allocated DMA memory size (%d) is "
5412 "less than the requested DMA memory size "
5413 "(%d)\n", alloclen, reqlen);
5414 rc = -ENOMEM;
5415 goto out_free_mboxq;
5416 }
5417 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5418 virtaddr = mboxq->sge_array->addr[0];
5419 mbx_cntl_attr = (struct lpfc_mbx_get_cntl_attributes *)virtaddr;
5420 shdr = &mbx_cntl_attr->cfg_shdr;
5421 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5422 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5423 if (shdr_status || shdr_add_status || rc) {
5424 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5425 "3085 Mailbox x%x (x%x/x%x) failed, "
5426 "rc:x%x, status:x%x, add_status:x%x\n",
5427 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5428 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5429 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5430 rc, shdr_status, shdr_add_status);
5431 rc = -ENXIO;
5432 goto out_free_mboxq;
5433 }
b3b4f3e1 5434
cd1c8301
JS
5435 cntl_attr = &mbx_cntl_attr->cntl_attr;
5436 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
5437 phba->sli4_hba.lnk_info.lnk_tp =
5438 bf_get(lpfc_cntl_attr_lnk_type, cntl_attr);
5439 phba->sli4_hba.lnk_info.lnk_no =
5440 bf_get(lpfc_cntl_attr_lnk_numb, cntl_attr);
b3b4f3e1
JS
5441
5442 memset(phba->BIOSVersion, 0, sizeof(phba->BIOSVersion));
5443 strlcat(phba->BIOSVersion, (char *)cntl_attr->bios_ver_str,
5444 sizeof(phba->BIOSVersion));
5445
cd1c8301 5446 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
b3b4f3e1 5447 "3086 lnk_type:%d, lnk_numb:%d, bios_ver:%s\n",
cd1c8301 5448 phba->sli4_hba.lnk_info.lnk_tp,
b3b4f3e1
JS
5449 phba->sli4_hba.lnk_info.lnk_no,
5450 phba->BIOSVersion);
5451out_free_mboxq:
5452 if (rc != MBX_TIMEOUT) {
5453 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5454 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5455 else
5456 mempool_free(mboxq, phba->mbox_mem_pool);
5457 }
5458 return rc;
5459}
5460
5461/**
5462 * lpfc_sli4_retrieve_pport_name - Retrieve SLI4 device physical port name
5463 * @phba: pointer to lpfc hba data structure.
5464 *
5465 * This routine retrieves SLI4 device physical port name this PCI function
5466 * is attached to.
5467 *
5468 * Return codes
5469 * 0 - successful
5470 * otherwise - failed to retrieve physical port name
5471 **/
5472static int
5473lpfc_sli4_retrieve_pport_name(struct lpfc_hba *phba)
5474{
5475 LPFC_MBOXQ_t *mboxq;
5476 struct lpfc_mbx_get_port_name *get_port_name;
5477 uint32_t shdr_status, shdr_add_status;
5478 union lpfc_sli4_cfg_shdr *shdr;
5479 char cport_name = 0;
5480 int rc;
5481
5482 /* We assume nothing at this point */
5483 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5484 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_NON;
5485
5486 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5487 if (!mboxq)
5488 return -ENOMEM;
5489 /* obtain link type and link number via READ_CONFIG */
5490 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5491 lpfc_sli4_read_config(phba);
5492 if (phba->sli4_hba.lnk_info.lnk_dv == LPFC_LNK_DAT_VAL)
5493 goto retrieve_ppname;
5494
5495 /* obtain link type and link number via COMMON_GET_CNTL_ATTRIBUTES */
5496 rc = lpfc_sli4_get_ctl_attr(phba);
5497 if (rc)
5498 goto out_free_mboxq;
cd1c8301
JS
5499
5500retrieve_ppname:
5501 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5502 LPFC_MBOX_OPCODE_GET_PORT_NAME,
5503 sizeof(struct lpfc_mbx_get_port_name) -
5504 sizeof(struct lpfc_sli4_cfg_mhdr),
5505 LPFC_SLI4_MBX_EMBED);
5506 get_port_name = &mboxq->u.mqe.un.get_port_name;
5507 shdr = (union lpfc_sli4_cfg_shdr *)&get_port_name->header.cfg_shdr;
5508 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_OPCODE_VERSION_1);
5509 bf_set(lpfc_mbx_get_port_name_lnk_type, &get_port_name->u.request,
5510 phba->sli4_hba.lnk_info.lnk_tp);
5511 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5512 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5513 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5514 if (shdr_status || shdr_add_status || rc) {
5515 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5516 "3087 Mailbox x%x (x%x/x%x) failed: "
5517 "rc:x%x, status:x%x, add_status:x%x\n",
5518 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5519 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5520 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5521 rc, shdr_status, shdr_add_status);
5522 rc = -ENXIO;
5523 goto out_free_mboxq;
5524 }
5525 switch (phba->sli4_hba.lnk_info.lnk_no) {
5526 case LPFC_LINK_NUMBER_0:
5527 cport_name = bf_get(lpfc_mbx_get_port_name_name0,
5528 &get_port_name->u.response);
5529 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5530 break;
5531 case LPFC_LINK_NUMBER_1:
5532 cport_name = bf_get(lpfc_mbx_get_port_name_name1,
5533 &get_port_name->u.response);
5534 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5535 break;
5536 case LPFC_LINK_NUMBER_2:
5537 cport_name = bf_get(lpfc_mbx_get_port_name_name2,
5538 &get_port_name->u.response);
5539 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5540 break;
5541 case LPFC_LINK_NUMBER_3:
5542 cport_name = bf_get(lpfc_mbx_get_port_name_name3,
5543 &get_port_name->u.response);
5544 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5545 break;
5546 default:
5547 break;
5548 }
5549
5550 if (phba->sli4_hba.pport_name_sta == LPFC_SLI4_PPNAME_GET) {
5551 phba->Port[0] = cport_name;
5552 phba->Port[1] = '\0';
5553 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5554 "3091 SLI get port name: %s\n", phba->Port);
5555 }
5556
5557out_free_mboxq:
5558 if (rc != MBX_TIMEOUT) {
5559 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5560 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5561 else
5562 mempool_free(mboxq, phba->mbox_mem_pool);
5563 }
5564 return rc;
5565}
5566
e59058c4 5567/**
da0436e9
JS
5568 * lpfc_sli4_arm_cqeq_intr - Arm sli-4 device completion and event queues
5569 * @phba: pointer to lpfc hba data structure.
e59058c4 5570 *
da0436e9
JS
5571 * This routine is called to explicitly arm the SLI4 device's completion and
5572 * event queues
5573 **/
5574static void
5575lpfc_sli4_arm_cqeq_intr(struct lpfc_hba *phba)
5576{
895427bd 5577 int qidx;
b71413dd 5578 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
cdb42bec 5579 struct lpfc_sli4_hdw_queue *qp;
657add4e 5580 struct lpfc_queue *eq;
da0436e9 5581
32517fc0
JS
5582 sli4_hba->sli4_write_cq_db(phba, sli4_hba->mbx_cq, 0, LPFC_QUEUE_REARM);
5583 sli4_hba->sli4_write_cq_db(phba, sli4_hba->els_cq, 0, LPFC_QUEUE_REARM);
b71413dd 5584 if (sli4_hba->nvmels_cq)
32517fc0
JS
5585 sli4_hba->sli4_write_cq_db(phba, sli4_hba->nvmels_cq, 0,
5586 LPFC_QUEUE_REARM);
1ba981fd 5587
cdb42bec 5588 if (sli4_hba->hdwq) {
657add4e 5589 /* Loop thru all Hardware Queues */
cdb42bec 5590 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
657add4e
JS
5591 qp = &sli4_hba->hdwq[qidx];
5592 /* ARM the corresponding CQ */
01f2ef6d 5593 sli4_hba->sli4_write_cq_db(phba, qp->io_cq, 0,
c00f62e6 5594 LPFC_QUEUE_REARM);
cdb42bec 5595 }
1ba981fd 5596
657add4e
JS
5597 /* Loop thru all IRQ vectors */
5598 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
5599 eq = sli4_hba->hba_eq_hdl[qidx].eq;
5600 /* ARM the corresponding EQ */
5601 sli4_hba->sli4_write_eq_db(phba, eq,
5602 0, LPFC_QUEUE_REARM);
5603 }
cdb42bec 5604 }
1ba981fd 5605
2d7dbc4c
JS
5606 if (phba->nvmet_support) {
5607 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) {
32517fc0
JS
5608 sli4_hba->sli4_write_cq_db(phba,
5609 sli4_hba->nvmet_cqset[qidx], 0,
2d7dbc4c
JS
5610 LPFC_QUEUE_REARM);
5611 }
2e90f4b5 5612 }
da0436e9
JS
5613}
5614
6d368e53
JS
5615/**
5616 * lpfc_sli4_get_avail_extnt_rsrc - Get available resource extent count.
5617 * @phba: Pointer to HBA context object.
5618 * @type: The resource extent type.
b76f2dc9
JS
5619 * @extnt_count: buffer to hold port available extent count.
5620 * @extnt_size: buffer to hold element count per extent.
6d368e53 5621 *
b76f2dc9
JS
5622 * This function calls the port and retrievs the number of available
5623 * extents and their size for a particular extent type.
5624 *
5625 * Returns: 0 if successful. Nonzero otherwise.
6d368e53 5626 **/
b76f2dc9 5627int
6d368e53
JS
5628lpfc_sli4_get_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type,
5629 uint16_t *extnt_count, uint16_t *extnt_size)
5630{
5631 int rc = 0;
5632 uint32_t length;
5633 uint32_t mbox_tmo;
5634 struct lpfc_mbx_get_rsrc_extent_info *rsrc_info;
5635 LPFC_MBOXQ_t *mbox;
5636
5637 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5638 if (!mbox)
5639 return -ENOMEM;
5640
5641 /* Find out how many extents are available for this resource type */
5642 length = (sizeof(struct lpfc_mbx_get_rsrc_extent_info) -
5643 sizeof(struct lpfc_sli4_cfg_mhdr));
5644 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5645 LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO,
5646 length, LPFC_SLI4_MBX_EMBED);
5647
5648 /* Send an extents count of 0 - the GET doesn't use it. */
5649 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
5650 LPFC_SLI4_MBX_EMBED);
5651 if (unlikely(rc)) {
5652 rc = -EIO;
5653 goto err_exit;
5654 }
5655
5656 if (!phba->sli4_hba.intr_enable)
5657 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5658 else {
a183a15f 5659 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5660 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5661 }
5662 if (unlikely(rc)) {
5663 rc = -EIO;
5664 goto err_exit;
5665 }
5666
5667 rsrc_info = &mbox->u.mqe.un.rsrc_extent_info;
5668 if (bf_get(lpfc_mbox_hdr_status,
5669 &rsrc_info->header.cfg_shdr.response)) {
5670 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5671 "2930 Failed to get resource extents "
5672 "Status 0x%x Add'l Status 0x%x\n",
5673 bf_get(lpfc_mbox_hdr_status,
5674 &rsrc_info->header.cfg_shdr.response),
5675 bf_get(lpfc_mbox_hdr_add_status,
5676 &rsrc_info->header.cfg_shdr.response));
5677 rc = -EIO;
5678 goto err_exit;
5679 }
5680
5681 *extnt_count = bf_get(lpfc_mbx_get_rsrc_extent_info_cnt,
5682 &rsrc_info->u.rsp);
5683 *extnt_size = bf_get(lpfc_mbx_get_rsrc_extent_info_size,
5684 &rsrc_info->u.rsp);
8a9d2e80
JS
5685
5686 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5687 "3162 Retrieved extents type-%d from port: count:%d, "
5688 "size:%d\n", type, *extnt_count, *extnt_size);
5689
5690err_exit:
6d368e53
JS
5691 mempool_free(mbox, phba->mbox_mem_pool);
5692 return rc;
5693}
5694
5695/**
5696 * lpfc_sli4_chk_avail_extnt_rsrc - Check for available SLI4 resource extents.
5697 * @phba: Pointer to HBA context object.
5698 * @type: The extent type to check.
5699 *
5700 * This function reads the current available extents from the port and checks
5701 * if the extent count or extent size has changed since the last access.
5702 * Callers use this routine post port reset to understand if there is a
5703 * extent reprovisioning requirement.
5704 *
5705 * Returns:
5706 * -Error: error indicates problem.
5707 * 1: Extent count or size has changed.
5708 * 0: No changes.
5709 **/
5710static int
5711lpfc_sli4_chk_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type)
5712{
5713 uint16_t curr_ext_cnt, rsrc_ext_cnt;
5714 uint16_t size_diff, rsrc_ext_size;
5715 int rc = 0;
5716 struct lpfc_rsrc_blks *rsrc_entry;
5717 struct list_head *rsrc_blk_list = NULL;
5718
5719 size_diff = 0;
5720 curr_ext_cnt = 0;
5721 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5722 &rsrc_ext_cnt,
5723 &rsrc_ext_size);
5724 if (unlikely(rc))
5725 return -EIO;
5726
5727 switch (type) {
5728 case LPFC_RSC_TYPE_FCOE_RPI:
5729 rsrc_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5730 break;
5731 case LPFC_RSC_TYPE_FCOE_VPI:
5732 rsrc_blk_list = &phba->lpfc_vpi_blk_list;
5733 break;
5734 case LPFC_RSC_TYPE_FCOE_XRI:
5735 rsrc_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5736 break;
5737 case LPFC_RSC_TYPE_FCOE_VFI:
5738 rsrc_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5739 break;
5740 default:
5741 break;
5742 }
5743
5744 list_for_each_entry(rsrc_entry, rsrc_blk_list, list) {
5745 curr_ext_cnt++;
5746 if (rsrc_entry->rsrc_size != rsrc_ext_size)
5747 size_diff++;
5748 }
5749
5750 if (curr_ext_cnt != rsrc_ext_cnt || size_diff != 0)
5751 rc = 1;
5752
5753 return rc;
5754}
5755
5756/**
5757 * lpfc_sli4_cfg_post_extnts -
5758 * @phba: Pointer to HBA context object.
5759 * @extnt_cnt - number of available extents.
5760 * @type - the extent type (rpi, xri, vfi, vpi).
5761 * @emb - buffer to hold either MBX_EMBED or MBX_NEMBED operation.
5762 * @mbox - pointer to the caller's allocated mailbox structure.
5763 *
5764 * This function executes the extents allocation request. It also
5765 * takes care of the amount of memory needed to allocate or get the
5766 * allocated extents. It is the caller's responsibility to evaluate
5767 * the response.
5768 *
5769 * Returns:
5770 * -Error: Error value describes the condition found.
5771 * 0: if successful
5772 **/
5773static int
8a9d2e80 5774lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t extnt_cnt,
6d368e53
JS
5775 uint16_t type, bool *emb, LPFC_MBOXQ_t *mbox)
5776{
5777 int rc = 0;
5778 uint32_t req_len;
5779 uint32_t emb_len;
5780 uint32_t alloc_len, mbox_tmo;
5781
5782 /* Calculate the total requested length of the dma memory */
8a9d2e80 5783 req_len = extnt_cnt * sizeof(uint16_t);
6d368e53
JS
5784
5785 /*
5786 * Calculate the size of an embedded mailbox. The uint32_t
5787 * accounts for extents-specific word.
5788 */
5789 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
5790 sizeof(uint32_t);
5791
5792 /*
5793 * Presume the allocation and response will fit into an embedded
5794 * mailbox. If not true, reconfigure to a non-embedded mailbox.
5795 */
5796 *emb = LPFC_SLI4_MBX_EMBED;
5797 if (req_len > emb_len) {
8a9d2e80 5798 req_len = extnt_cnt * sizeof(uint16_t) +
6d368e53
JS
5799 sizeof(union lpfc_sli4_cfg_shdr) +
5800 sizeof(uint32_t);
5801 *emb = LPFC_SLI4_MBX_NEMBED;
5802 }
5803
5804 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5805 LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT,
5806 req_len, *emb);
5807 if (alloc_len < req_len) {
5808 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
b76f2dc9 5809 "2982 Allocated DMA memory size (x%x) is "
6d368e53
JS
5810 "less than the requested DMA memory "
5811 "size (x%x)\n", alloc_len, req_len);
5812 return -ENOMEM;
5813 }
8a9d2e80 5814 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, extnt_cnt, type, *emb);
6d368e53
JS
5815 if (unlikely(rc))
5816 return -EIO;
5817
5818 if (!phba->sli4_hba.intr_enable)
5819 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5820 else {
a183a15f 5821 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5822 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5823 }
5824
5825 if (unlikely(rc))
5826 rc = -EIO;
5827 return rc;
5828}
5829
5830/**
5831 * lpfc_sli4_alloc_extent - Allocate an SLI4 resource extent.
5832 * @phba: Pointer to HBA context object.
5833 * @type: The resource extent type to allocate.
5834 *
5835 * This function allocates the number of elements for the specified
5836 * resource type.
5837 **/
5838static int
5839lpfc_sli4_alloc_extent(struct lpfc_hba *phba, uint16_t type)
5840{
5841 bool emb = false;
5842 uint16_t rsrc_id_cnt, rsrc_cnt, rsrc_size;
5843 uint16_t rsrc_id, rsrc_start, j, k;
5844 uint16_t *ids;
5845 int i, rc;
5846 unsigned long longs;
5847 unsigned long *bmask;
5848 struct lpfc_rsrc_blks *rsrc_blks;
5849 LPFC_MBOXQ_t *mbox;
5850 uint32_t length;
5851 struct lpfc_id_range *id_array = NULL;
5852 void *virtaddr = NULL;
5853 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
5854 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
5855 struct list_head *ext_blk_list;
5856
5857 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5858 &rsrc_cnt,
5859 &rsrc_size);
5860 if (unlikely(rc))
5861 return -EIO;
5862
5863 if ((rsrc_cnt == 0) || (rsrc_size == 0)) {
5864 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5865 "3009 No available Resource Extents "
5866 "for resource type 0x%x: Count: 0x%x, "
5867 "Size 0x%x\n", type, rsrc_cnt,
5868 rsrc_size);
5869 return -ENOMEM;
5870 }
5871
8a9d2e80
JS
5872 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_INIT | LOG_SLI,
5873 "2903 Post resource extents type-0x%x: "
5874 "count:%d, size %d\n", type, rsrc_cnt, rsrc_size);
6d368e53
JS
5875
5876 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5877 if (!mbox)
5878 return -ENOMEM;
5879
8a9d2e80 5880 rc = lpfc_sli4_cfg_post_extnts(phba, rsrc_cnt, type, &emb, mbox);
6d368e53
JS
5881 if (unlikely(rc)) {
5882 rc = -EIO;
5883 goto err_exit;
5884 }
5885
5886 /*
5887 * Figure out where the response is located. Then get local pointers
5888 * to the response data. The port does not guarantee to respond to
5889 * all extents counts request so update the local variable with the
5890 * allocated count from the port.
5891 */
5892 if (emb == LPFC_SLI4_MBX_EMBED) {
5893 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
5894 id_array = &rsrc_ext->u.rsp.id[0];
5895 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
5896 } else {
5897 virtaddr = mbox->sge_array->addr[0];
5898 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
5899 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
5900 id_array = &n_rsrc->id;
5901 }
5902
5903 longs = ((rsrc_cnt * rsrc_size) + BITS_PER_LONG - 1) / BITS_PER_LONG;
5904 rsrc_id_cnt = rsrc_cnt * rsrc_size;
5905
5906 /*
5907 * Based on the resource size and count, correct the base and max
5908 * resource values.
5909 */
5910 length = sizeof(struct lpfc_rsrc_blks);
5911 switch (type) {
5912 case LPFC_RSC_TYPE_FCOE_RPI:
6396bb22 5913 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
5914 sizeof(unsigned long),
5915 GFP_KERNEL);
5916 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
5917 rc = -ENOMEM;
5918 goto err_exit;
5919 }
6396bb22 5920 phba->sli4_hba.rpi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5921 sizeof(uint16_t),
5922 GFP_KERNEL);
5923 if (unlikely(!phba->sli4_hba.rpi_ids)) {
5924 kfree(phba->sli4_hba.rpi_bmask);
5925 rc = -ENOMEM;
5926 goto err_exit;
5927 }
5928
5929 /*
5930 * The next_rpi was initialized with the maximum available
5931 * count but the port may allocate a smaller number. Catch
5932 * that case and update the next_rpi.
5933 */
5934 phba->sli4_hba.next_rpi = rsrc_id_cnt;
5935
5936 /* Initialize local ptrs for common extent processing later. */
5937 bmask = phba->sli4_hba.rpi_bmask;
5938 ids = phba->sli4_hba.rpi_ids;
5939 ext_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5940 break;
5941 case LPFC_RSC_TYPE_FCOE_VPI:
6396bb22 5942 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
5943 GFP_KERNEL);
5944 if (unlikely(!phba->vpi_bmask)) {
5945 rc = -ENOMEM;
5946 goto err_exit;
5947 }
6396bb22 5948 phba->vpi_ids = kcalloc(rsrc_id_cnt, sizeof(uint16_t),
6d368e53
JS
5949 GFP_KERNEL);
5950 if (unlikely(!phba->vpi_ids)) {
5951 kfree(phba->vpi_bmask);
5952 rc = -ENOMEM;
5953 goto err_exit;
5954 }
5955
5956 /* Initialize local ptrs for common extent processing later. */
5957 bmask = phba->vpi_bmask;
5958 ids = phba->vpi_ids;
5959 ext_blk_list = &phba->lpfc_vpi_blk_list;
5960 break;
5961 case LPFC_RSC_TYPE_FCOE_XRI:
6396bb22 5962 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
5963 sizeof(unsigned long),
5964 GFP_KERNEL);
5965 if (unlikely(!phba->sli4_hba.xri_bmask)) {
5966 rc = -ENOMEM;
5967 goto err_exit;
5968 }
8a9d2e80 5969 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 5970 phba->sli4_hba.xri_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5971 sizeof(uint16_t),
5972 GFP_KERNEL);
5973 if (unlikely(!phba->sli4_hba.xri_ids)) {
5974 kfree(phba->sli4_hba.xri_bmask);
5975 rc = -ENOMEM;
5976 goto err_exit;
5977 }
5978
5979 /* Initialize local ptrs for common extent processing later. */
5980 bmask = phba->sli4_hba.xri_bmask;
5981 ids = phba->sli4_hba.xri_ids;
5982 ext_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5983 break;
5984 case LPFC_RSC_TYPE_FCOE_VFI:
6396bb22 5985 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
5986 sizeof(unsigned long),
5987 GFP_KERNEL);
5988 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
5989 rc = -ENOMEM;
5990 goto err_exit;
5991 }
6396bb22 5992 phba->sli4_hba.vfi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5993 sizeof(uint16_t),
5994 GFP_KERNEL);
5995 if (unlikely(!phba->sli4_hba.vfi_ids)) {
5996 kfree(phba->sli4_hba.vfi_bmask);
5997 rc = -ENOMEM;
5998 goto err_exit;
5999 }
6000
6001 /* Initialize local ptrs for common extent processing later. */
6002 bmask = phba->sli4_hba.vfi_bmask;
6003 ids = phba->sli4_hba.vfi_ids;
6004 ext_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
6005 break;
6006 default:
6007 /* Unsupported Opcode. Fail call. */
6008 id_array = NULL;
6009 bmask = NULL;
6010 ids = NULL;
6011 ext_blk_list = NULL;
6012 goto err_exit;
6013 }
6014
6015 /*
6016 * Complete initializing the extent configuration with the
6017 * allocated ids assigned to this function. The bitmask serves
6018 * as an index into the array and manages the available ids. The
6019 * array just stores the ids communicated to the port via the wqes.
6020 */
6021 for (i = 0, j = 0, k = 0; i < rsrc_cnt; i++) {
6022 if ((i % 2) == 0)
6023 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_0,
6024 &id_array[k]);
6025 else
6026 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_1,
6027 &id_array[k]);
6028
6029 rsrc_blks = kzalloc(length, GFP_KERNEL);
6030 if (unlikely(!rsrc_blks)) {
6031 rc = -ENOMEM;
6032 kfree(bmask);
6033 kfree(ids);
6034 goto err_exit;
6035 }
6036 rsrc_blks->rsrc_start = rsrc_id;
6037 rsrc_blks->rsrc_size = rsrc_size;
6038 list_add_tail(&rsrc_blks->list, ext_blk_list);
6039 rsrc_start = rsrc_id;
895427bd 6040 if ((type == LPFC_RSC_TYPE_FCOE_XRI) && (j == 0)) {
5e5b511d 6041 phba->sli4_hba.io_xri_start = rsrc_start +
895427bd 6042 lpfc_sli4_get_iocb_cnt(phba);
895427bd 6043 }
6d368e53
JS
6044
6045 while (rsrc_id < (rsrc_start + rsrc_size)) {
6046 ids[j] = rsrc_id;
6047 rsrc_id++;
6048 j++;
6049 }
6050 /* Entire word processed. Get next word.*/
6051 if ((i % 2) == 1)
6052 k++;
6053 }
6054 err_exit:
6055 lpfc_sli4_mbox_cmd_free(phba, mbox);
6056 return rc;
6057}
6058
895427bd
JS
6059
6060
6d368e53
JS
6061/**
6062 * lpfc_sli4_dealloc_extent - Deallocate an SLI4 resource extent.
6063 * @phba: Pointer to HBA context object.
6064 * @type: the extent's type.
6065 *
6066 * This function deallocates all extents of a particular resource type.
6067 * SLI4 does not allow for deallocating a particular extent range. It
6068 * is the caller's responsibility to release all kernel memory resources.
6069 **/
6070static int
6071lpfc_sli4_dealloc_extent(struct lpfc_hba *phba, uint16_t type)
6072{
6073 int rc;
6074 uint32_t length, mbox_tmo = 0;
6075 LPFC_MBOXQ_t *mbox;
6076 struct lpfc_mbx_dealloc_rsrc_extents *dealloc_rsrc;
6077 struct lpfc_rsrc_blks *rsrc_blk, *rsrc_blk_next;
6078
6079 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6080 if (!mbox)
6081 return -ENOMEM;
6082
6083 /*
6084 * This function sends an embedded mailbox because it only sends the
6085 * the resource type. All extents of this type are released by the
6086 * port.
6087 */
6088 length = (sizeof(struct lpfc_mbx_dealloc_rsrc_extents) -
6089 sizeof(struct lpfc_sli4_cfg_mhdr));
6090 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6091 LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT,
6092 length, LPFC_SLI4_MBX_EMBED);
6093
6094 /* Send an extents count of 0 - the dealloc doesn't use it. */
6095 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
6096 LPFC_SLI4_MBX_EMBED);
6097 if (unlikely(rc)) {
6098 rc = -EIO;
6099 goto out_free_mbox;
6100 }
6101 if (!phba->sli4_hba.intr_enable)
6102 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6103 else {
a183a15f 6104 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
6105 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6106 }
6107 if (unlikely(rc)) {
6108 rc = -EIO;
6109 goto out_free_mbox;
6110 }
6111
6112 dealloc_rsrc = &mbox->u.mqe.un.dealloc_rsrc_extents;
6113 if (bf_get(lpfc_mbox_hdr_status,
6114 &dealloc_rsrc->header.cfg_shdr.response)) {
6115 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6116 "2919 Failed to release resource extents "
6117 "for type %d - Status 0x%x Add'l Status 0x%x. "
6118 "Resource memory not released.\n",
6119 type,
6120 bf_get(lpfc_mbox_hdr_status,
6121 &dealloc_rsrc->header.cfg_shdr.response),
6122 bf_get(lpfc_mbox_hdr_add_status,
6123 &dealloc_rsrc->header.cfg_shdr.response));
6124 rc = -EIO;
6125 goto out_free_mbox;
6126 }
6127
6128 /* Release kernel memory resources for the specific type. */
6129 switch (type) {
6130 case LPFC_RSC_TYPE_FCOE_VPI:
6131 kfree(phba->vpi_bmask);
6132 kfree(phba->vpi_ids);
6133 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6134 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6135 &phba->lpfc_vpi_blk_list, list) {
6136 list_del_init(&rsrc_blk->list);
6137 kfree(rsrc_blk);
6138 }
16a3a208 6139 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6140 break;
6141 case LPFC_RSC_TYPE_FCOE_XRI:
6142 kfree(phba->sli4_hba.xri_bmask);
6143 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6144 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6145 &phba->sli4_hba.lpfc_xri_blk_list, list) {
6146 list_del_init(&rsrc_blk->list);
6147 kfree(rsrc_blk);
6148 }
6149 break;
6150 case LPFC_RSC_TYPE_FCOE_VFI:
6151 kfree(phba->sli4_hba.vfi_bmask);
6152 kfree(phba->sli4_hba.vfi_ids);
6153 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6154 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6155 &phba->sli4_hba.lpfc_vfi_blk_list, list) {
6156 list_del_init(&rsrc_blk->list);
6157 kfree(rsrc_blk);
6158 }
6159 break;
6160 case LPFC_RSC_TYPE_FCOE_RPI:
6161 /* RPI bitmask and physical id array are cleaned up earlier. */
6162 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6163 &phba->sli4_hba.lpfc_rpi_blk_list, list) {
6164 list_del_init(&rsrc_blk->list);
6165 kfree(rsrc_blk);
6166 }
6167 break;
6168 default:
6169 break;
6170 }
6171
6172 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6173
6174 out_free_mbox:
6175 mempool_free(mbox, phba->mbox_mem_pool);
6176 return rc;
6177}
6178
bd4b3e5c 6179static void
7bdedb34
JS
6180lpfc_set_features(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox,
6181 uint32_t feature)
65791f1f 6182{
65791f1f 6183 uint32_t len;
65791f1f 6184
65791f1f
JS
6185 len = sizeof(struct lpfc_mbx_set_feature) -
6186 sizeof(struct lpfc_sli4_cfg_mhdr);
6187 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6188 LPFC_MBOX_OPCODE_SET_FEATURES, len,
6189 LPFC_SLI4_MBX_EMBED);
7bdedb34
JS
6190
6191 switch (feature) {
6192 case LPFC_SET_UE_RECOVERY:
6193 bf_set(lpfc_mbx_set_feature_UER,
6194 &mbox->u.mqe.un.set_feature, 1);
6195 mbox->u.mqe.un.set_feature.feature = LPFC_SET_UE_RECOVERY;
6196 mbox->u.mqe.un.set_feature.param_len = 8;
6197 break;
6198 case LPFC_SET_MDS_DIAGS:
6199 bf_set(lpfc_mbx_set_feature_mds,
6200 &mbox->u.mqe.un.set_feature, 1);
6201 bf_set(lpfc_mbx_set_feature_mds_deep_loopbk,
ae9e28f3 6202 &mbox->u.mqe.un.set_feature, 1);
7bdedb34
JS
6203 mbox->u.mqe.un.set_feature.feature = LPFC_SET_MDS_DIAGS;
6204 mbox->u.mqe.un.set_feature.param_len = 8;
6205 break;
171f6c41
JS
6206 case LPFC_SET_DUAL_DUMP:
6207 bf_set(lpfc_mbx_set_feature_dd,
6208 &mbox->u.mqe.un.set_feature, LPFC_ENABLE_DUAL_DUMP);
6209 bf_set(lpfc_mbx_set_feature_ddquery,
6210 &mbox->u.mqe.un.set_feature, 0);
6211 mbox->u.mqe.un.set_feature.feature = LPFC_SET_DUAL_DUMP;
6212 mbox->u.mqe.un.set_feature.param_len = 4;
6213 break;
65791f1f 6214 }
7bdedb34
JS
6215
6216 return;
65791f1f
JS
6217}
6218
1165a5c2
JS
6219/**
6220 * lpfc_ras_stop_fwlog: Disable FW logging by the adapter
6221 * @phba: Pointer to HBA context object.
6222 *
6223 * Disable FW logging into host memory on the adapter. To
6224 * be done before reading logs from the host memory.
6225 **/
6226void
6227lpfc_ras_stop_fwlog(struct lpfc_hba *phba)
6228{
6229 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6230
95bfc6d8
JS
6231 spin_lock_irq(&phba->hbalock);
6232 ras_fwlog->state = INACTIVE;
6233 spin_unlock_irq(&phba->hbalock);
1165a5c2
JS
6234
6235 /* Disable FW logging to host memory */
6236 writel(LPFC_CTL_PDEV_CTL_DDL_RAS,
6237 phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PDEV_CTL_OFFSET);
95bfc6d8
JS
6238
6239 /* Wait 10ms for firmware to stop using DMA buffer */
6240 usleep_range(10 * 1000, 20 * 1000);
1165a5c2
JS
6241}
6242
d2cc9bcd
JS
6243/**
6244 * lpfc_sli4_ras_dma_free - Free memory allocated for FW logging.
6245 * @phba: Pointer to HBA context object.
6246 *
6247 * This function is called to free memory allocated for RAS FW logging
6248 * support in the driver.
6249 **/
6250void
6251lpfc_sli4_ras_dma_free(struct lpfc_hba *phba)
6252{
6253 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6254 struct lpfc_dmabuf *dmabuf, *next;
6255
6256 if (!list_empty(&ras_fwlog->fwlog_buff_list)) {
6257 list_for_each_entry_safe(dmabuf, next,
6258 &ras_fwlog->fwlog_buff_list,
6259 list) {
6260 list_del(&dmabuf->list);
6261 dma_free_coherent(&phba->pcidev->dev,
6262 LPFC_RAS_MAX_ENTRY_SIZE,
6263 dmabuf->virt, dmabuf->phys);
6264 kfree(dmabuf);
6265 }
6266 }
6267
6268 if (ras_fwlog->lwpd.virt) {
6269 dma_free_coherent(&phba->pcidev->dev,
6270 sizeof(uint32_t) * 2,
6271 ras_fwlog->lwpd.virt,
6272 ras_fwlog->lwpd.phys);
6273 ras_fwlog->lwpd.virt = NULL;
6274 }
6275
95bfc6d8
JS
6276 spin_lock_irq(&phba->hbalock);
6277 ras_fwlog->state = INACTIVE;
6278 spin_unlock_irq(&phba->hbalock);
d2cc9bcd
JS
6279}
6280
6281/**
6282 * lpfc_sli4_ras_dma_alloc: Allocate memory for FW support
6283 * @phba: Pointer to HBA context object.
6284 * @fwlog_buff_count: Count of buffers to be created.
6285 *
6286 * This routine DMA memory for Log Write Position Data[LPWD] and buffer
6287 * to update FW log is posted to the adapter.
6288 * Buffer count is calculated based on module param ras_fwlog_buffsize
6289 * Size of each buffer posted to FW is 64K.
6290 **/
6291
6292static int
6293lpfc_sli4_ras_dma_alloc(struct lpfc_hba *phba,
6294 uint32_t fwlog_buff_count)
6295{
6296 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6297 struct lpfc_dmabuf *dmabuf;
6298 int rc = 0, i = 0;
6299
6300 /* Initialize List */
6301 INIT_LIST_HEAD(&ras_fwlog->fwlog_buff_list);
6302
6303 /* Allocate memory for the LWPD */
6304 ras_fwlog->lwpd.virt = dma_alloc_coherent(&phba->pcidev->dev,
6305 sizeof(uint32_t) * 2,
6306 &ras_fwlog->lwpd.phys,
6307 GFP_KERNEL);
6308 if (!ras_fwlog->lwpd.virt) {
cb34990b 6309 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d2cc9bcd
JS
6310 "6185 LWPD Memory Alloc Failed\n");
6311
6312 return -ENOMEM;
6313 }
6314
6315 ras_fwlog->fw_buffcount = fwlog_buff_count;
6316 for (i = 0; i < ras_fwlog->fw_buffcount; i++) {
6317 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
6318 GFP_KERNEL);
6319 if (!dmabuf) {
6320 rc = -ENOMEM;
6321 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6322 "6186 Memory Alloc failed FW logging");
6323 goto free_mem;
6324 }
6325
750afb08 6326 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
d2cc9bcd 6327 LPFC_RAS_MAX_ENTRY_SIZE,
750afb08 6328 &dmabuf->phys, GFP_KERNEL);
d2cc9bcd
JS
6329 if (!dmabuf->virt) {
6330 kfree(dmabuf);
6331 rc = -ENOMEM;
6332 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6333 "6187 DMA Alloc Failed FW logging");
6334 goto free_mem;
6335 }
d2cc9bcd
JS
6336 dmabuf->buffer_tag = i;
6337 list_add_tail(&dmabuf->list, &ras_fwlog->fwlog_buff_list);
6338 }
6339
6340free_mem:
6341 if (rc)
6342 lpfc_sli4_ras_dma_free(phba);
6343
6344 return rc;
6345}
6346
6347/**
6348 * lpfc_sli4_ras_mbox_cmpl: Completion handler for RAS MBX command
6349 * @phba: pointer to lpfc hba data structure.
6350 * @pmboxq: pointer to the driver internal queue element for mailbox command.
6351 *
6352 * Completion handler for driver's RAS MBX command to the device.
6353 **/
6354static void
6355lpfc_sli4_ras_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
6356{
6357 MAILBOX_t *mb;
6358 union lpfc_sli4_cfg_shdr *shdr;
6359 uint32_t shdr_status, shdr_add_status;
6360 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6361
6362 mb = &pmb->u.mb;
6363
6364 shdr = (union lpfc_sli4_cfg_shdr *)
6365 &pmb->u.mqe.un.ras_fwlog.header.cfg_shdr;
6366 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
6367 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
6368
6369 if (mb->mbxStatus != MBX_SUCCESS || shdr_status) {
cb34990b 6370 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
d2cc9bcd
JS
6371 "6188 FW LOG mailbox "
6372 "completed with status x%x add_status x%x,"
6373 " mbx status x%x\n",
6374 shdr_status, shdr_add_status, mb->mbxStatus);
cb34990b
JS
6375
6376 ras_fwlog->ras_hwsupport = false;
d2cc9bcd
JS
6377 goto disable_ras;
6378 }
6379
95bfc6d8
JS
6380 spin_lock_irq(&phba->hbalock);
6381 ras_fwlog->state = ACTIVE;
6382 spin_unlock_irq(&phba->hbalock);
d2cc9bcd
JS
6383 mempool_free(pmb, phba->mbox_mem_pool);
6384
6385 return;
6386
6387disable_ras:
6388 /* Free RAS DMA memory */
6389 lpfc_sli4_ras_dma_free(phba);
6390 mempool_free(pmb, phba->mbox_mem_pool);
6391}
6392
6393/**
6394 * lpfc_sli4_ras_fwlog_init: Initialize memory and post RAS MBX command
6395 * @phba: pointer to lpfc hba data structure.
6396 * @fwlog_level: Logging verbosity level.
6397 * @fwlog_enable: Enable/Disable logging.
6398 *
6399 * Initialize memory and post mailbox command to enable FW logging in host
6400 * memory.
6401 **/
6402int
6403lpfc_sli4_ras_fwlog_init(struct lpfc_hba *phba,
6404 uint32_t fwlog_level,
6405 uint32_t fwlog_enable)
6406{
6407 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6408 struct lpfc_mbx_set_ras_fwlog *mbx_fwlog = NULL;
6409 struct lpfc_dmabuf *dmabuf;
6410 LPFC_MBOXQ_t *mbox;
6411 uint32_t len = 0, fwlog_buffsize, fwlog_entry_count;
6412 int rc = 0;
6413
95bfc6d8
JS
6414 spin_lock_irq(&phba->hbalock);
6415 ras_fwlog->state = INACTIVE;
6416 spin_unlock_irq(&phba->hbalock);
6417
d2cc9bcd
JS
6418 fwlog_buffsize = (LPFC_RAS_MIN_BUFF_POST_SIZE *
6419 phba->cfg_ras_fwlog_buffsize);
6420 fwlog_entry_count = (fwlog_buffsize/LPFC_RAS_MAX_ENTRY_SIZE);
6421
6422 /*
6423 * If re-enabling FW logging support use earlier allocated
6424 * DMA buffers while posting MBX command.
6425 **/
6426 if (!ras_fwlog->lwpd.virt) {
6427 rc = lpfc_sli4_ras_dma_alloc(phba, fwlog_entry_count);
6428 if (rc) {
6429 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
cb34990b 6430 "6189 FW Log Memory Allocation Failed");
d2cc9bcd
JS
6431 return rc;
6432 }
6433 }
6434
6435 /* Setup Mailbox command */
6436 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6437 if (!mbox) {
cb34990b 6438 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d2cc9bcd
JS
6439 "6190 RAS MBX Alloc Failed");
6440 rc = -ENOMEM;
6441 goto mem_free;
6442 }
6443
6444 ras_fwlog->fw_loglevel = fwlog_level;
6445 len = (sizeof(struct lpfc_mbx_set_ras_fwlog) -
6446 sizeof(struct lpfc_sli4_cfg_mhdr));
6447
6448 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_LOWLEVEL,
6449 LPFC_MBOX_OPCODE_SET_DIAG_LOG_OPTION,
6450 len, LPFC_SLI4_MBX_EMBED);
6451
6452 mbx_fwlog = (struct lpfc_mbx_set_ras_fwlog *)&mbox->u.mqe.un.ras_fwlog;
6453 bf_set(lpfc_fwlog_enable, &mbx_fwlog->u.request,
6454 fwlog_enable);
6455 bf_set(lpfc_fwlog_loglvl, &mbx_fwlog->u.request,
6456 ras_fwlog->fw_loglevel);
6457 bf_set(lpfc_fwlog_buffcnt, &mbx_fwlog->u.request,
6458 ras_fwlog->fw_buffcount);
6459 bf_set(lpfc_fwlog_buffsz, &mbx_fwlog->u.request,
6460 LPFC_RAS_MAX_ENTRY_SIZE/SLI4_PAGE_SIZE);
6461
6462 /* Update DMA buffer address */
6463 list_for_each_entry(dmabuf, &ras_fwlog->fwlog_buff_list, list) {
6464 memset(dmabuf->virt, 0, LPFC_RAS_MAX_ENTRY_SIZE);
6465
6466 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_lo =
6467 putPaddrLow(dmabuf->phys);
6468
6469 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_hi =
6470 putPaddrHigh(dmabuf->phys);
6471 }
6472
6473 /* Update LPWD address */
6474 mbx_fwlog->u.request.lwpd.addr_lo = putPaddrLow(ras_fwlog->lwpd.phys);
6475 mbx_fwlog->u.request.lwpd.addr_hi = putPaddrHigh(ras_fwlog->lwpd.phys);
6476
95bfc6d8
JS
6477 spin_lock_irq(&phba->hbalock);
6478 ras_fwlog->state = REG_INPROGRESS;
6479 spin_unlock_irq(&phba->hbalock);
d2cc9bcd
JS
6480 mbox->vport = phba->pport;
6481 mbox->mbox_cmpl = lpfc_sli4_ras_mbox_cmpl;
6482
6483 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
6484
6485 if (rc == MBX_NOT_FINISHED) {
cb34990b
JS
6486 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6487 "6191 FW-Log Mailbox failed. "
d2cc9bcd
JS
6488 "status %d mbxStatus : x%x", rc,
6489 bf_get(lpfc_mqe_status, &mbox->u.mqe));
6490 mempool_free(mbox, phba->mbox_mem_pool);
6491 rc = -EIO;
6492 goto mem_free;
6493 } else
6494 rc = 0;
6495mem_free:
6496 if (rc)
6497 lpfc_sli4_ras_dma_free(phba);
6498
6499 return rc;
6500}
6501
6502/**
6503 * lpfc_sli4_ras_setup - Check if RAS supported on the adapter
6504 * @phba: Pointer to HBA context object.
6505 *
6506 * Check if RAS is supported on the adapter and initialize it.
6507 **/
6508void
6509lpfc_sli4_ras_setup(struct lpfc_hba *phba)
6510{
6511 /* Check RAS FW Log needs to be enabled or not */
6512 if (lpfc_check_fwlog_support(phba))
6513 return;
6514
6515 lpfc_sli4_ras_fwlog_init(phba, phba->cfg_ras_fwlog_level,
6516 LPFC_RAS_ENABLE_LOGGING);
6517}
6518
6d368e53
JS
6519/**
6520 * lpfc_sli4_alloc_resource_identifiers - Allocate all SLI4 resource extents.
6521 * @phba: Pointer to HBA context object.
6522 *
6523 * This function allocates all SLI4 resource identifiers.
6524 **/
6525int
6526lpfc_sli4_alloc_resource_identifiers(struct lpfc_hba *phba)
6527{
6528 int i, rc, error = 0;
6529 uint16_t count, base;
6530 unsigned long longs;
6531
ff78d8f9
JS
6532 if (!phba->sli4_hba.rpi_hdrs_in_use)
6533 phba->sli4_hba.next_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
6d368e53
JS
6534 if (phba->sli4_hba.extents_in_use) {
6535 /*
6536 * The port supports resource extents. The XRI, VPI, VFI, RPI
6537 * resource extent count must be read and allocated before
6538 * provisioning the resource id arrays.
6539 */
6540 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
6541 LPFC_IDX_RSRC_RDY) {
6542 /*
6543 * Extent-based resources are set - the driver could
6544 * be in a port reset. Figure out if any corrective
6545 * actions need to be taken.
6546 */
6547 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6548 LPFC_RSC_TYPE_FCOE_VFI);
6549 if (rc != 0)
6550 error++;
6551 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6552 LPFC_RSC_TYPE_FCOE_VPI);
6553 if (rc != 0)
6554 error++;
6555 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6556 LPFC_RSC_TYPE_FCOE_XRI);
6557 if (rc != 0)
6558 error++;
6559 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6560 LPFC_RSC_TYPE_FCOE_RPI);
6561 if (rc != 0)
6562 error++;
6563
6564 /*
6565 * It's possible that the number of resources
6566 * provided to this port instance changed between
6567 * resets. Detect this condition and reallocate
6568 * resources. Otherwise, there is no action.
6569 */
6570 if (error) {
6571 lpfc_printf_log(phba, KERN_INFO,
6572 LOG_MBOX | LOG_INIT,
6573 "2931 Detected extent resource "
6574 "change. Reallocating all "
6575 "extents.\n");
6576 rc = lpfc_sli4_dealloc_extent(phba,
6577 LPFC_RSC_TYPE_FCOE_VFI);
6578 rc = lpfc_sli4_dealloc_extent(phba,
6579 LPFC_RSC_TYPE_FCOE_VPI);
6580 rc = lpfc_sli4_dealloc_extent(phba,
6581 LPFC_RSC_TYPE_FCOE_XRI);
6582 rc = lpfc_sli4_dealloc_extent(phba,
6583 LPFC_RSC_TYPE_FCOE_RPI);
6584 } else
6585 return 0;
6586 }
6587
6588 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6589 if (unlikely(rc))
6590 goto err_exit;
6591
6592 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6593 if (unlikely(rc))
6594 goto err_exit;
6595
6596 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6597 if (unlikely(rc))
6598 goto err_exit;
6599
6600 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6601 if (unlikely(rc))
6602 goto err_exit;
6603 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6604 LPFC_IDX_RSRC_RDY);
6605 return rc;
6606 } else {
6607 /*
6608 * The port does not support resource extents. The XRI, VPI,
6609 * VFI, RPI resource ids were determined from READ_CONFIG.
6610 * Just allocate the bitmasks and provision the resource id
6611 * arrays. If a port reset is active, the resources don't
6612 * need any action - just exit.
6613 */
6614 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
ff78d8f9
JS
6615 LPFC_IDX_RSRC_RDY) {
6616 lpfc_sli4_dealloc_resource_identifiers(phba);
6617 lpfc_sli4_remove_rpis(phba);
6618 }
6d368e53
JS
6619 /* RPIs. */
6620 count = phba->sli4_hba.max_cfg_param.max_rpi;
0a630c27
JS
6621 if (count <= 0) {
6622 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6623 "3279 Invalid provisioning of "
6624 "rpi:%d\n", count);
6625 rc = -EINVAL;
6626 goto err_exit;
6627 }
6d368e53
JS
6628 base = phba->sli4_hba.max_cfg_param.rpi_base;
6629 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6630 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
6631 sizeof(unsigned long),
6632 GFP_KERNEL);
6633 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
6634 rc = -ENOMEM;
6635 goto err_exit;
6636 }
6396bb22 6637 phba->sli4_hba.rpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6638 GFP_KERNEL);
6639 if (unlikely(!phba->sli4_hba.rpi_ids)) {
6640 rc = -ENOMEM;
6641 goto free_rpi_bmask;
6642 }
6643
6644 for (i = 0; i < count; i++)
6645 phba->sli4_hba.rpi_ids[i] = base + i;
6646
6647 /* VPIs. */
6648 count = phba->sli4_hba.max_cfg_param.max_vpi;
0a630c27
JS
6649 if (count <= 0) {
6650 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6651 "3280 Invalid provisioning of "
6652 "vpi:%d\n", count);
6653 rc = -EINVAL;
6654 goto free_rpi_ids;
6655 }
6d368e53
JS
6656 base = phba->sli4_hba.max_cfg_param.vpi_base;
6657 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6658 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
6659 GFP_KERNEL);
6660 if (unlikely(!phba->vpi_bmask)) {
6661 rc = -ENOMEM;
6662 goto free_rpi_ids;
6663 }
6396bb22 6664 phba->vpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6665 GFP_KERNEL);
6666 if (unlikely(!phba->vpi_ids)) {
6667 rc = -ENOMEM;
6668 goto free_vpi_bmask;
6669 }
6670
6671 for (i = 0; i < count; i++)
6672 phba->vpi_ids[i] = base + i;
6673
6674 /* XRIs. */
6675 count = phba->sli4_hba.max_cfg_param.max_xri;
0a630c27
JS
6676 if (count <= 0) {
6677 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6678 "3281 Invalid provisioning of "
6679 "xri:%d\n", count);
6680 rc = -EINVAL;
6681 goto free_vpi_ids;
6682 }
6d368e53
JS
6683 base = phba->sli4_hba.max_cfg_param.xri_base;
6684 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6685 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
6686 sizeof(unsigned long),
6687 GFP_KERNEL);
6688 if (unlikely(!phba->sli4_hba.xri_bmask)) {
6689 rc = -ENOMEM;
6690 goto free_vpi_ids;
6691 }
41899be7 6692 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 6693 phba->sli4_hba.xri_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6694 GFP_KERNEL);
6695 if (unlikely(!phba->sli4_hba.xri_ids)) {
6696 rc = -ENOMEM;
6697 goto free_xri_bmask;
6698 }
6699
6700 for (i = 0; i < count; i++)
6701 phba->sli4_hba.xri_ids[i] = base + i;
6702
6703 /* VFIs. */
6704 count = phba->sli4_hba.max_cfg_param.max_vfi;
0a630c27
JS
6705 if (count <= 0) {
6706 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6707 "3282 Invalid provisioning of "
6708 "vfi:%d\n", count);
6709 rc = -EINVAL;
6710 goto free_xri_ids;
6711 }
6d368e53
JS
6712 base = phba->sli4_hba.max_cfg_param.vfi_base;
6713 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6714 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
6715 sizeof(unsigned long),
6716 GFP_KERNEL);
6717 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
6718 rc = -ENOMEM;
6719 goto free_xri_ids;
6720 }
6396bb22 6721 phba->sli4_hba.vfi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6722 GFP_KERNEL);
6723 if (unlikely(!phba->sli4_hba.vfi_ids)) {
6724 rc = -ENOMEM;
6725 goto free_vfi_bmask;
6726 }
6727
6728 for (i = 0; i < count; i++)
6729 phba->sli4_hba.vfi_ids[i] = base + i;
6730
6731 /*
6732 * Mark all resources ready. An HBA reset doesn't need
6733 * to reset the initialization.
6734 */
6735 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6736 LPFC_IDX_RSRC_RDY);
6737 return 0;
6738 }
6739
6740 free_vfi_bmask:
6741 kfree(phba->sli4_hba.vfi_bmask);
cd60be49 6742 phba->sli4_hba.vfi_bmask = NULL;
6d368e53
JS
6743 free_xri_ids:
6744 kfree(phba->sli4_hba.xri_ids);
cd60be49 6745 phba->sli4_hba.xri_ids = NULL;
6d368e53
JS
6746 free_xri_bmask:
6747 kfree(phba->sli4_hba.xri_bmask);
cd60be49 6748 phba->sli4_hba.xri_bmask = NULL;
6d368e53
JS
6749 free_vpi_ids:
6750 kfree(phba->vpi_ids);
cd60be49 6751 phba->vpi_ids = NULL;
6d368e53
JS
6752 free_vpi_bmask:
6753 kfree(phba->vpi_bmask);
cd60be49 6754 phba->vpi_bmask = NULL;
6d368e53
JS
6755 free_rpi_ids:
6756 kfree(phba->sli4_hba.rpi_ids);
cd60be49 6757 phba->sli4_hba.rpi_ids = NULL;
6d368e53
JS
6758 free_rpi_bmask:
6759 kfree(phba->sli4_hba.rpi_bmask);
cd60be49 6760 phba->sli4_hba.rpi_bmask = NULL;
6d368e53
JS
6761 err_exit:
6762 return rc;
6763}
6764
6765/**
6766 * lpfc_sli4_dealloc_resource_identifiers - Deallocate all SLI4 resource extents.
6767 * @phba: Pointer to HBA context object.
6768 *
6769 * This function allocates the number of elements for the specified
6770 * resource type.
6771 **/
6772int
6773lpfc_sli4_dealloc_resource_identifiers(struct lpfc_hba *phba)
6774{
6775 if (phba->sli4_hba.extents_in_use) {
6776 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6777 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6778 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6779 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6780 } else {
6781 kfree(phba->vpi_bmask);
16a3a208 6782 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6783 kfree(phba->vpi_ids);
6784 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6785 kfree(phba->sli4_hba.xri_bmask);
6786 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6787 kfree(phba->sli4_hba.vfi_bmask);
6788 kfree(phba->sli4_hba.vfi_ids);
6789 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6790 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6791 }
6792
6793 return 0;
6794}
6795
b76f2dc9
JS
6796/**
6797 * lpfc_sli4_get_allocated_extnts - Get the port's allocated extents.
6798 * @phba: Pointer to HBA context object.
6799 * @type: The resource extent type.
6800 * @extnt_count: buffer to hold port extent count response
6801 * @extnt_size: buffer to hold port extent size response.
6802 *
6803 * This function calls the port to read the host allocated extents
6804 * for a particular type.
6805 **/
6806int
6807lpfc_sli4_get_allocated_extnts(struct lpfc_hba *phba, uint16_t type,
6808 uint16_t *extnt_cnt, uint16_t *extnt_size)
6809{
6810 bool emb;
6811 int rc = 0;
6812 uint16_t curr_blks = 0;
6813 uint32_t req_len, emb_len;
6814 uint32_t alloc_len, mbox_tmo;
6815 struct list_head *blk_list_head;
6816 struct lpfc_rsrc_blks *rsrc_blk;
6817 LPFC_MBOXQ_t *mbox;
6818 void *virtaddr = NULL;
6819 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
6820 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
6821 union lpfc_sli4_cfg_shdr *shdr;
6822
6823 switch (type) {
6824 case LPFC_RSC_TYPE_FCOE_VPI:
6825 blk_list_head = &phba->lpfc_vpi_blk_list;
6826 break;
6827 case LPFC_RSC_TYPE_FCOE_XRI:
6828 blk_list_head = &phba->sli4_hba.lpfc_xri_blk_list;
6829 break;
6830 case LPFC_RSC_TYPE_FCOE_VFI:
6831 blk_list_head = &phba->sli4_hba.lpfc_vfi_blk_list;
6832 break;
6833 case LPFC_RSC_TYPE_FCOE_RPI:
6834 blk_list_head = &phba->sli4_hba.lpfc_rpi_blk_list;
6835 break;
6836 default:
6837 return -EIO;
6838 }
6839
6840 /* Count the number of extents currently allocatd for this type. */
6841 list_for_each_entry(rsrc_blk, blk_list_head, list) {
6842 if (curr_blks == 0) {
6843 /*
6844 * The GET_ALLOCATED mailbox does not return the size,
6845 * just the count. The size should be just the size
6846 * stored in the current allocated block and all sizes
6847 * for an extent type are the same so set the return
6848 * value now.
6849 */
6850 *extnt_size = rsrc_blk->rsrc_size;
6851 }
6852 curr_blks++;
6853 }
6854
b76f2dc9
JS
6855 /*
6856 * Calculate the size of an embedded mailbox. The uint32_t
6857 * accounts for extents-specific word.
6858 */
6859 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
6860 sizeof(uint32_t);
6861
6862 /*
6863 * Presume the allocation and response will fit into an embedded
6864 * mailbox. If not true, reconfigure to a non-embedded mailbox.
6865 */
6866 emb = LPFC_SLI4_MBX_EMBED;
6867 req_len = emb_len;
6868 if (req_len > emb_len) {
6869 req_len = curr_blks * sizeof(uint16_t) +
6870 sizeof(union lpfc_sli4_cfg_shdr) +
6871 sizeof(uint32_t);
6872 emb = LPFC_SLI4_MBX_NEMBED;
6873 }
6874
6875 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6876 if (!mbox)
6877 return -ENOMEM;
6878 memset(mbox, 0, sizeof(LPFC_MBOXQ_t));
6879
6880 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6881 LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT,
6882 req_len, emb);
6883 if (alloc_len < req_len) {
6884 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6885 "2983 Allocated DMA memory size (x%x) is "
6886 "less than the requested DMA memory "
6887 "size (x%x)\n", alloc_len, req_len);
6888 rc = -ENOMEM;
6889 goto err_exit;
6890 }
6891 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, curr_blks, type, emb);
6892 if (unlikely(rc)) {
6893 rc = -EIO;
6894 goto err_exit;
6895 }
6896
6897 if (!phba->sli4_hba.intr_enable)
6898 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6899 else {
a183a15f 6900 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
b76f2dc9
JS
6901 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6902 }
6903
6904 if (unlikely(rc)) {
6905 rc = -EIO;
6906 goto err_exit;
6907 }
6908
6909 /*
6910 * Figure out where the response is located. Then get local pointers
6911 * to the response data. The port does not guarantee to respond to
6912 * all extents counts request so update the local variable with the
6913 * allocated count from the port.
6914 */
6915 if (emb == LPFC_SLI4_MBX_EMBED) {
6916 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
6917 shdr = &rsrc_ext->header.cfg_shdr;
6918 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
6919 } else {
6920 virtaddr = mbox->sge_array->addr[0];
6921 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
6922 shdr = &n_rsrc->cfg_shdr;
6923 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
6924 }
6925
6926 if (bf_get(lpfc_mbox_hdr_status, &shdr->response)) {
6927 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6928 "2984 Failed to read allocated resources "
6929 "for type %d - Status 0x%x Add'l Status 0x%x.\n",
6930 type,
6931 bf_get(lpfc_mbox_hdr_status, &shdr->response),
6932 bf_get(lpfc_mbox_hdr_add_status, &shdr->response));
6933 rc = -EIO;
6934 goto err_exit;
6935 }
6936 err_exit:
6937 lpfc_sli4_mbox_cmd_free(phba, mbox);
6938 return rc;
6939}
6940
8a9d2e80 6941/**
0ef69968 6942 * lpfc_sli4_repost_sgl_list - Repost the buffers sgl pages as block
8a9d2e80 6943 * @phba: pointer to lpfc hba data structure.
895427bd
JS
6944 * @pring: Pointer to driver SLI ring object.
6945 * @sgl_list: linked link of sgl buffers to post
6946 * @cnt: number of linked list buffers
8a9d2e80 6947 *
895427bd 6948 * This routine walks the list of buffers that have been allocated and
8a9d2e80
JS
6949 * repost them to the port by using SGL block post. This is needed after a
6950 * pci_function_reset/warm_start or start. It attempts to construct blocks
895427bd
JS
6951 * of buffer sgls which contains contiguous xris and uses the non-embedded
6952 * SGL block post mailbox commands to post them to the port. For single
8a9d2e80
JS
6953 * buffer sgl with non-contiguous xri, if any, it shall use embedded SGL post
6954 * mailbox command for posting.
6955 *
6956 * Returns: 0 = success, non-zero failure.
6957 **/
6958static int
895427bd
JS
6959lpfc_sli4_repost_sgl_list(struct lpfc_hba *phba,
6960 struct list_head *sgl_list, int cnt)
8a9d2e80
JS
6961{
6962 struct lpfc_sglq *sglq_entry = NULL;
6963 struct lpfc_sglq *sglq_entry_next = NULL;
6964 struct lpfc_sglq *sglq_entry_first = NULL;
895427bd
JS
6965 int status, total_cnt;
6966 int post_cnt = 0, num_posted = 0, block_cnt = 0;
8a9d2e80
JS
6967 int last_xritag = NO_XRI;
6968 LIST_HEAD(prep_sgl_list);
6969 LIST_HEAD(blck_sgl_list);
6970 LIST_HEAD(allc_sgl_list);
6971 LIST_HEAD(post_sgl_list);
6972 LIST_HEAD(free_sgl_list);
6973
38c20673 6974 spin_lock_irq(&phba->hbalock);
895427bd
JS
6975 spin_lock(&phba->sli4_hba.sgl_list_lock);
6976 list_splice_init(sgl_list, &allc_sgl_list);
6977 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 6978 spin_unlock_irq(&phba->hbalock);
8a9d2e80 6979
895427bd 6980 total_cnt = cnt;
8a9d2e80
JS
6981 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
6982 &allc_sgl_list, list) {
6983 list_del_init(&sglq_entry->list);
6984 block_cnt++;
6985 if ((last_xritag != NO_XRI) &&
6986 (sglq_entry->sli4_xritag != last_xritag + 1)) {
6987 /* a hole in xri block, form a sgl posting block */
6988 list_splice_init(&prep_sgl_list, &blck_sgl_list);
6989 post_cnt = block_cnt - 1;
6990 /* prepare list for next posting block */
6991 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6992 block_cnt = 1;
6993 } else {
6994 /* prepare list for next posting block */
6995 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6996 /* enough sgls for non-embed sgl mbox command */
6997 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
6998 list_splice_init(&prep_sgl_list,
6999 &blck_sgl_list);
7000 post_cnt = block_cnt;
7001 block_cnt = 0;
7002 }
7003 }
7004 num_posted++;
7005
7006 /* keep track of last sgl's xritag */
7007 last_xritag = sglq_entry->sli4_xritag;
7008
895427bd
JS
7009 /* end of repost sgl list condition for buffers */
7010 if (num_posted == total_cnt) {
8a9d2e80
JS
7011 if (post_cnt == 0) {
7012 list_splice_init(&prep_sgl_list,
7013 &blck_sgl_list);
7014 post_cnt = block_cnt;
7015 } else if (block_cnt == 1) {
7016 status = lpfc_sli4_post_sgl(phba,
7017 sglq_entry->phys, 0,
7018 sglq_entry->sli4_xritag);
7019 if (!status) {
7020 /* successful, put sgl to posted list */
7021 list_add_tail(&sglq_entry->list,
7022 &post_sgl_list);
7023 } else {
7024 /* Failure, put sgl to free list */
7025 lpfc_printf_log(phba, KERN_WARNING,
7026 LOG_SLI,
895427bd 7027 "3159 Failed to post "
8a9d2e80
JS
7028 "sgl, xritag:x%x\n",
7029 sglq_entry->sli4_xritag);
7030 list_add_tail(&sglq_entry->list,
7031 &free_sgl_list);
711ea882 7032 total_cnt--;
8a9d2e80
JS
7033 }
7034 }
7035 }
7036
7037 /* continue until a nembed page worth of sgls */
7038 if (post_cnt == 0)
7039 continue;
7040
895427bd
JS
7041 /* post the buffer list sgls as a block */
7042 status = lpfc_sli4_post_sgl_list(phba, &blck_sgl_list,
7043 post_cnt);
8a9d2e80
JS
7044
7045 if (!status) {
7046 /* success, put sgl list to posted sgl list */
7047 list_splice_init(&blck_sgl_list, &post_sgl_list);
7048 } else {
7049 /* Failure, put sgl list to free sgl list */
7050 sglq_entry_first = list_first_entry(&blck_sgl_list,
7051 struct lpfc_sglq,
7052 list);
7053 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
895427bd 7054 "3160 Failed to post sgl-list, "
8a9d2e80
JS
7055 "xritag:x%x-x%x\n",
7056 sglq_entry_first->sli4_xritag,
7057 (sglq_entry_first->sli4_xritag +
7058 post_cnt - 1));
7059 list_splice_init(&blck_sgl_list, &free_sgl_list);
711ea882 7060 total_cnt -= post_cnt;
8a9d2e80
JS
7061 }
7062
7063 /* don't reset xirtag due to hole in xri block */
7064 if (block_cnt == 0)
7065 last_xritag = NO_XRI;
7066
895427bd 7067 /* reset sgl post count for next round of posting */
8a9d2e80
JS
7068 post_cnt = 0;
7069 }
7070
895427bd 7071 /* free the sgls failed to post */
8a9d2e80
JS
7072 lpfc_free_sgl_list(phba, &free_sgl_list);
7073
895427bd 7074 /* push sgls posted to the available list */
8a9d2e80 7075 if (!list_empty(&post_sgl_list)) {
38c20673 7076 spin_lock_irq(&phba->hbalock);
895427bd
JS
7077 spin_lock(&phba->sli4_hba.sgl_list_lock);
7078 list_splice_init(&post_sgl_list, sgl_list);
7079 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 7080 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
7081 } else {
7082 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 7083 "3161 Failure to post sgl to port.\n");
8a9d2e80
JS
7084 return -EIO;
7085 }
895427bd
JS
7086
7087 /* return the number of XRIs actually posted */
7088 return total_cnt;
8a9d2e80
JS
7089}
7090
0794d601 7091/**
5e5b511d 7092 * lpfc_sli4_repost_io_sgl_list - Repost all the allocated nvme buffer sgls
0794d601
JS
7093 * @phba: pointer to lpfc hba data structure.
7094 *
7095 * This routine walks the list of nvme buffers that have been allocated and
7096 * repost them to the port by using SGL block post. This is needed after a
7097 * pci_function_reset/warm_start or start. The lpfc_hba_down_post_s4 routine
7098 * is responsible for moving all nvme buffers on the lpfc_abts_nvme_sgl_list
5e5b511d 7099 * to the lpfc_io_buf_list. If the repost fails, reject all nvme buffers.
0794d601
JS
7100 *
7101 * Returns: 0 = success, non-zero failure.
7102 **/
3999df75 7103static int
5e5b511d 7104lpfc_sli4_repost_io_sgl_list(struct lpfc_hba *phba)
0794d601
JS
7105{
7106 LIST_HEAD(post_nblist);
7107 int num_posted, rc = 0;
7108
7109 /* get all NVME buffers need to repost to a local list */
5e5b511d 7110 lpfc_io_buf_flush(phba, &post_nblist);
0794d601
JS
7111
7112 /* post the list of nvme buffer sgls to port if available */
7113 if (!list_empty(&post_nblist)) {
5e5b511d
JS
7114 num_posted = lpfc_sli4_post_io_sgl_list(
7115 phba, &post_nblist, phba->sli4_hba.io_xri_cnt);
0794d601
JS
7116 /* failed to post any nvme buffer, return error */
7117 if (num_posted == 0)
7118 rc = -EIO;
7119 }
7120 return rc;
7121}
7122
3999df75 7123static void
61bda8f7
JS
7124lpfc_set_host_data(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
7125{
7126 uint32_t len;
7127
7128 len = sizeof(struct lpfc_mbx_set_host_data) -
7129 sizeof(struct lpfc_sli4_cfg_mhdr);
7130 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
7131 LPFC_MBOX_OPCODE_SET_HOST_DATA, len,
7132 LPFC_SLI4_MBX_EMBED);
7133
7134 mbox->u.mqe.un.set_host_data.param_id = LPFC_SET_HOST_OS_DRIVER_VERSION;
b2fd103b
JS
7135 mbox->u.mqe.un.set_host_data.param_len =
7136 LPFC_HOST_OS_DRIVER_VERSION_SIZE;
61bda8f7
JS
7137 snprintf(mbox->u.mqe.un.set_host_data.data,
7138 LPFC_HOST_OS_DRIVER_VERSION_SIZE,
7139 "Linux %s v"LPFC_DRIVER_VERSION,
7140 (phba->hba_flag & HBA_FCOE_MODE) ? "FCoE" : "FC");
7141}
7142
a8cf5dfe 7143int
6c621a22 7144lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
a8cf5dfe 7145 struct lpfc_queue *drq, int count, int idx)
6c621a22
JS
7146{
7147 int rc, i;
7148 struct lpfc_rqe hrqe;
7149 struct lpfc_rqe drqe;
7150 struct lpfc_rqb *rqbp;
411de511 7151 unsigned long flags;
6c621a22
JS
7152 struct rqb_dmabuf *rqb_buffer;
7153 LIST_HEAD(rqb_buf_list);
7154
411de511 7155 spin_lock_irqsave(&phba->hbalock, flags);
6c621a22
JS
7156 rqbp = hrq->rqbp;
7157 for (i = 0; i < count; i++) {
7158 /* IF RQ is already full, don't bother */
7159 if (rqbp->buffer_count + i >= rqbp->entry_count - 1)
7160 break;
7161 rqb_buffer = rqbp->rqb_alloc_buffer(phba);
7162 if (!rqb_buffer)
7163 break;
7164 rqb_buffer->hrq = hrq;
7165 rqb_buffer->drq = drq;
a8cf5dfe 7166 rqb_buffer->idx = idx;
6c621a22
JS
7167 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
7168 }
7169 while (!list_empty(&rqb_buf_list)) {
7170 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
7171 hbuf.list);
7172
7173 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
7174 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
7175 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
7176 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
7177 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
7178 if (rc < 0) {
411de511
JS
7179 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7180 "6421 Cannot post to HRQ %d: %x %x %x "
7181 "DRQ %x %x\n",
7182 hrq->queue_id,
7183 hrq->host_index,
7184 hrq->hba_index,
7185 hrq->entry_count,
7186 drq->host_index,
7187 drq->hba_index);
6c621a22
JS
7188 rqbp->rqb_free_buffer(phba, rqb_buffer);
7189 } else {
7190 list_add_tail(&rqb_buffer->hbuf.list,
7191 &rqbp->rqb_buffer_list);
7192 rqbp->buffer_count++;
7193 }
7194 }
411de511 7195 spin_unlock_irqrestore(&phba->hbalock, flags);
6c621a22
JS
7196 return 1;
7197}
7198
da0436e9 7199/**
183b8021 7200 * lpfc_sli4_hba_setup - SLI4 device initialization PCI function
da0436e9
JS
7201 * @phba: Pointer to HBA context object.
7202 *
183b8021
MY
7203 * This function is the main SLI4 device initialization PCI function. This
7204 * function is called by the HBA initialization code, HBA reset code and
da0436e9
JS
7205 * HBA error attention handler code. Caller is not required to hold any
7206 * locks.
7207 **/
7208int
7209lpfc_sli4_hba_setup(struct lpfc_hba *phba)
7210{
171f6c41 7211 int rc, i, cnt, len, dd;
da0436e9
JS
7212 LPFC_MBOXQ_t *mboxq;
7213 struct lpfc_mqe *mqe;
7214 uint8_t *vpd;
7215 uint32_t vpd_size;
7216 uint32_t ftr_rsp = 0;
7217 struct Scsi_Host *shost = lpfc_shost_from_vport(phba->pport);
7218 struct lpfc_vport *vport = phba->pport;
7219 struct lpfc_dmabuf *mp;
2d7dbc4c 7220 struct lpfc_rqb *rqbp;
da0436e9
JS
7221
7222 /* Perform a PCI function reset to start from clean */
7223 rc = lpfc_pci_function_reset(phba);
7224 if (unlikely(rc))
7225 return -ENODEV;
7226
7227 /* Check the HBA Host Status Register for readyness */
7228 rc = lpfc_sli4_post_status_check(phba);
7229 if (unlikely(rc))
7230 return -ENODEV;
7231 else {
7232 spin_lock_irq(&phba->hbalock);
7233 phba->sli.sli_flag |= LPFC_SLI_ACTIVE;
7234 spin_unlock_irq(&phba->hbalock);
7235 }
7236
7237 /*
7238 * Allocate a single mailbox container for initializing the
7239 * port.
7240 */
7241 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7242 if (!mboxq)
7243 return -ENOMEM;
7244
da0436e9 7245 /* Issue READ_REV to collect vpd and FW information. */
49198b37 7246 vpd_size = SLI4_PAGE_SIZE;
da0436e9
JS
7247 vpd = kzalloc(vpd_size, GFP_KERNEL);
7248 if (!vpd) {
7249 rc = -ENOMEM;
7250 goto out_free_mbox;
7251 }
7252
7253 rc = lpfc_sli4_read_rev(phba, mboxq, vpd, &vpd_size);
76a95d75
JS
7254 if (unlikely(rc)) {
7255 kfree(vpd);
7256 goto out_free_mbox;
7257 }
572709e2 7258
da0436e9 7259 mqe = &mboxq->u.mqe;
f1126688 7260 phba->sli_rev = bf_get(lpfc_mbx_rd_rev_sli_lvl, &mqe->un.read_rev);
b5c53958 7261 if (bf_get(lpfc_mbx_rd_rev_fcoe, &mqe->un.read_rev)) {
76a95d75 7262 phba->hba_flag |= HBA_FCOE_MODE;
b5c53958
JS
7263 phba->fcp_embed_io = 0; /* SLI4 FC support only */
7264 } else {
76a95d75 7265 phba->hba_flag &= ~HBA_FCOE_MODE;
b5c53958 7266 }
45ed1190
JS
7267
7268 if (bf_get(lpfc_mbx_rd_rev_cee_ver, &mqe->un.read_rev) ==
7269 LPFC_DCBX_CEE_MODE)
7270 phba->hba_flag |= HBA_FIP_SUPPORT;
7271 else
7272 phba->hba_flag &= ~HBA_FIP_SUPPORT;
7273
c00f62e6 7274 phba->hba_flag &= ~HBA_IOQ_FLUSH;
4f2e66c6 7275
c31098ce 7276 if (phba->sli_rev != LPFC_SLI_REV4) {
da0436e9
JS
7277 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7278 "0376 READ_REV Error. SLI Level %d "
7279 "FCoE enabled %d\n",
76a95d75 7280 phba->sli_rev, phba->hba_flag & HBA_FCOE_MODE);
da0436e9 7281 rc = -EIO;
76a95d75
JS
7282 kfree(vpd);
7283 goto out_free_mbox;
da0436e9 7284 }
cd1c8301 7285
ff78d8f9
JS
7286 /*
7287 * Continue initialization with default values even if driver failed
7288 * to read FCoE param config regions, only read parameters if the
7289 * board is FCoE
7290 */
7291 if (phba->hba_flag & HBA_FCOE_MODE &&
7292 lpfc_sli4_read_fcoe_params(phba))
7293 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_INIT,
7294 "2570 Failed to read FCoE parameters\n");
7295
cd1c8301
JS
7296 /*
7297 * Retrieve sli4 device physical port name, failure of doing it
7298 * is considered as non-fatal.
7299 */
7300 rc = lpfc_sli4_retrieve_pport_name(phba);
7301 if (!rc)
7302 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7303 "3080 Successful retrieving SLI4 device "
7304 "physical port name: %s.\n", phba->Port);
7305
b3b4f3e1
JS
7306 rc = lpfc_sli4_get_ctl_attr(phba);
7307 if (!rc)
7308 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7309 "8351 Successful retrieving SLI4 device "
7310 "CTL ATTR\n");
7311
da0436e9
JS
7312 /*
7313 * Evaluate the read rev and vpd data. Populate the driver
7314 * state with the results. If this routine fails, the failure
7315 * is not fatal as the driver will use generic values.
7316 */
7317 rc = lpfc_parse_vpd(phba, vpd, vpd_size);
7318 if (unlikely(!rc)) {
7319 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7320 "0377 Error %d parsing vpd. "
7321 "Using defaults.\n", rc);
7322 rc = 0;
7323 }
76a95d75 7324 kfree(vpd);
da0436e9 7325
f1126688
JS
7326 /* Save information as VPD data */
7327 phba->vpd.rev.biuRev = mqe->un.read_rev.first_hw_rev;
7328 phba->vpd.rev.smRev = mqe->un.read_rev.second_hw_rev;
4e565cf0
JS
7329
7330 /*
7331 * This is because first G7 ASIC doesn't support the standard
7332 * 0x5a NVME cmd descriptor type/subtype
7333 */
7334 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7335 LPFC_SLI_INTF_IF_TYPE_6) &&
7336 (phba->vpd.rev.biuRev == LPFC_G7_ASIC_1) &&
7337 (phba->vpd.rev.smRev == 0) &&
7338 (phba->cfg_nvme_embed_cmd == 1))
7339 phba->cfg_nvme_embed_cmd = 0;
7340
f1126688
JS
7341 phba->vpd.rev.endecRev = mqe->un.read_rev.third_hw_rev;
7342 phba->vpd.rev.fcphHigh = bf_get(lpfc_mbx_rd_rev_fcph_high,
7343 &mqe->un.read_rev);
7344 phba->vpd.rev.fcphLow = bf_get(lpfc_mbx_rd_rev_fcph_low,
7345 &mqe->un.read_rev);
7346 phba->vpd.rev.feaLevelHigh = bf_get(lpfc_mbx_rd_rev_ftr_lvl_high,
7347 &mqe->un.read_rev);
7348 phba->vpd.rev.feaLevelLow = bf_get(lpfc_mbx_rd_rev_ftr_lvl_low,
7349 &mqe->un.read_rev);
7350 phba->vpd.rev.sli1FwRev = mqe->un.read_rev.fw_id_rev;
7351 memcpy(phba->vpd.rev.sli1FwName, mqe->un.read_rev.fw_name, 16);
7352 phba->vpd.rev.sli2FwRev = mqe->un.read_rev.ulp_fw_id_rev;
7353 memcpy(phba->vpd.rev.sli2FwName, mqe->un.read_rev.ulp_fw_name, 16);
7354 phba->vpd.rev.opFwRev = mqe->un.read_rev.fw_id_rev;
7355 memcpy(phba->vpd.rev.opFwName, mqe->un.read_rev.fw_name, 16);
7356 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7357 "(%d):0380 READ_REV Status x%x "
7358 "fw_rev:%s fcphHi:%x fcphLo:%x flHi:%x flLo:%x\n",
7359 mboxq->vport ? mboxq->vport->vpi : 0,
7360 bf_get(lpfc_mqe_status, mqe),
7361 phba->vpd.rev.opFwName,
7362 phba->vpd.rev.fcphHigh, phba->vpd.rev.fcphLow,
7363 phba->vpd.rev.feaLevelHigh, phba->vpd.rev.feaLevelLow);
da0436e9 7364
572709e2
JS
7365 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
7366 rc = (phba->sli4_hba.max_cfg_param.max_xri >> 3);
7367 if (phba->pport->cfg_lun_queue_depth > rc) {
7368 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7369 "3362 LUN queue depth changed from %d to %d\n",
7370 phba->pport->cfg_lun_queue_depth, rc);
7371 phba->pport->cfg_lun_queue_depth = rc;
7372 }
7373
65791f1f 7374 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7bdedb34
JS
7375 LPFC_SLI_INTF_IF_TYPE_0) {
7376 lpfc_set_features(phba, mboxq, LPFC_SET_UE_RECOVERY);
7377 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7378 if (rc == MBX_SUCCESS) {
7379 phba->hba_flag |= HBA_RECOVERABLE_UE;
7380 /* Set 1Sec interval to detect UE */
7381 phba->eratt_poll_interval = 1;
7382 phba->sli4_hba.ue_to_sr = bf_get(
7383 lpfc_mbx_set_feature_UESR,
7384 &mboxq->u.mqe.un.set_feature);
7385 phba->sli4_hba.ue_to_rp = bf_get(
7386 lpfc_mbx_set_feature_UERP,
7387 &mboxq->u.mqe.un.set_feature);
7388 }
7389 }
7390
7391 if (phba->cfg_enable_mds_diags && phba->mds_diags_support) {
7392 /* Enable MDS Diagnostics only if the SLI Port supports it */
7393 lpfc_set_features(phba, mboxq, LPFC_SET_MDS_DIAGS);
7394 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7395 if (rc != MBX_SUCCESS)
7396 phba->mds_diags_support = 0;
7397 }
572709e2 7398
da0436e9
JS
7399 /*
7400 * Discover the port's supported feature set and match it against the
7401 * hosts requests.
7402 */
7403 lpfc_request_features(phba, mboxq);
7404 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7405 if (unlikely(rc)) {
7406 rc = -EIO;
76a95d75 7407 goto out_free_mbox;
da0436e9
JS
7408 }
7409
7410 /*
7411 * The port must support FCP initiator mode as this is the
7412 * only mode running in the host.
7413 */
7414 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_fcpi, &mqe->un.req_ftrs))) {
7415 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7416 "0378 No support for fcpi mode.\n");
7417 ftr_rsp++;
7418 }
0bc2b7c5
JS
7419
7420 /* Performance Hints are ONLY for FCoE */
7421 if (phba->hba_flag & HBA_FCOE_MODE) {
7422 if (bf_get(lpfc_mbx_rq_ftr_rsp_perfh, &mqe->un.req_ftrs))
7423 phba->sli3_options |= LPFC_SLI4_PERFH_ENABLED;
7424 else
7425 phba->sli3_options &= ~LPFC_SLI4_PERFH_ENABLED;
7426 }
7427
da0436e9
JS
7428 /*
7429 * If the port cannot support the host's requested features
7430 * then turn off the global config parameters to disable the
7431 * feature in the driver. This is not a fatal error.
7432 */
f44ac12f
JS
7433 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
7434 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs))) {
7435 phba->cfg_enable_bg = 0;
7436 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
bf08611b 7437 ftr_rsp++;
f44ac12f 7438 }
bf08611b 7439 }
da0436e9
JS
7440
7441 if (phba->max_vpi && phba->cfg_enable_npiv &&
7442 !(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7443 ftr_rsp++;
7444
7445 if (ftr_rsp) {
7446 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7447 "0379 Feature Mismatch Data: x%08x %08x "
7448 "x%x x%x x%x\n", mqe->un.req_ftrs.word2,
7449 mqe->un.req_ftrs.word3, phba->cfg_enable_bg,
7450 phba->cfg_enable_npiv, phba->max_vpi);
7451 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs)))
7452 phba->cfg_enable_bg = 0;
7453 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7454 phba->cfg_enable_npiv = 0;
7455 }
7456
7457 /* These SLI3 features are assumed in SLI4 */
7458 spin_lock_irq(&phba->hbalock);
7459 phba->sli3_options |= (LPFC_SLI3_NPIV_ENABLED | LPFC_SLI3_HBQ_ENABLED);
7460 spin_unlock_irq(&phba->hbalock);
7461
171f6c41
JS
7462 /* Always try to enable dual dump feature if we can */
7463 lpfc_set_features(phba, mboxq, LPFC_SET_DUAL_DUMP);
7464 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7465 dd = bf_get(lpfc_mbx_set_feature_dd, &mboxq->u.mqe.un.set_feature);
7466 if ((rc == MBX_SUCCESS) && (dd == LPFC_ENABLE_DUAL_DUMP))
7467 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_INIT,
7468 "6448 Dual Dump is enabled\n");
7469 else
7470 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_INIT,
7471 "6447 Dual Dump Mailbox x%x (x%x/x%x) failed, "
7472 "rc:x%x dd:x%x\n",
7473 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
7474 lpfc_sli_config_mbox_subsys_get(
7475 phba, mboxq),
7476 lpfc_sli_config_mbox_opcode_get(
7477 phba, mboxq),
7478 rc, dd);
6d368e53
JS
7479 /*
7480 * Allocate all resources (xri,rpi,vpi,vfi) now. Subsequent
7481 * calls depends on these resources to complete port setup.
7482 */
7483 rc = lpfc_sli4_alloc_resource_identifiers(phba);
7484 if (rc) {
7485 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7486 "2920 Failed to alloc Resource IDs "
7487 "rc = x%x\n", rc);
7488 goto out_free_mbox;
7489 }
7490
61bda8f7
JS
7491 lpfc_set_host_data(phba, mboxq);
7492
7493 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7494 if (rc) {
7495 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7496 "2134 Failed to set host os driver version %x",
7497 rc);
7498 }
7499
da0436e9 7500 /* Read the port's service parameters. */
9f1177a3
JS
7501 rc = lpfc_read_sparam(phba, mboxq, vport->vpi);
7502 if (rc) {
7503 phba->link_state = LPFC_HBA_ERROR;
7504 rc = -ENOMEM;
76a95d75 7505 goto out_free_mbox;
9f1177a3
JS
7506 }
7507
da0436e9
JS
7508 mboxq->vport = vport;
7509 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3e1f0718 7510 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
7511 if (rc == MBX_SUCCESS) {
7512 memcpy(&vport->fc_sparam, mp->virt, sizeof(struct serv_parm));
7513 rc = 0;
7514 }
7515
7516 /*
7517 * This memory was allocated by the lpfc_read_sparam routine. Release
7518 * it to the mbuf pool.
7519 */
7520 lpfc_mbuf_free(phba, mp->virt, mp->phys);
7521 kfree(mp);
3e1f0718 7522 mboxq->ctx_buf = NULL;
da0436e9
JS
7523 if (unlikely(rc)) {
7524 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7525 "0382 READ_SPARAM command failed "
7526 "status %d, mbxStatus x%x\n",
7527 rc, bf_get(lpfc_mqe_status, mqe));
7528 phba->link_state = LPFC_HBA_ERROR;
7529 rc = -EIO;
76a95d75 7530 goto out_free_mbox;
da0436e9
JS
7531 }
7532
0558056c 7533 lpfc_update_vport_wwn(vport);
da0436e9
JS
7534
7535 /* Update the fc_host data structures with new wwn. */
7536 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
7537 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
7538
895427bd
JS
7539 /* Create all the SLI4 queues */
7540 rc = lpfc_sli4_queue_create(phba);
7541 if (rc) {
7542 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7543 "3089 Failed to allocate queues\n");
7544 rc = -ENODEV;
7545 goto out_free_mbox;
7546 }
7547 /* Set up all the queues to the device */
7548 rc = lpfc_sli4_queue_setup(phba);
7549 if (unlikely(rc)) {
7550 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7551 "0381 Error %d during queue setup.\n ", rc);
7552 goto out_stop_timers;
7553 }
7554 /* Initialize the driver internal SLI layer lists. */
7555 lpfc_sli4_setup(phba);
7556 lpfc_sli4_queue_init(phba);
7557
7558 /* update host els xri-sgl sizes and mappings */
7559 rc = lpfc_sli4_els_sgl_update(phba);
8a9d2e80
JS
7560 if (unlikely(rc)) {
7561 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7562 "1400 Failed to update xri-sgl size and "
7563 "mapping: %d\n", rc);
895427bd 7564 goto out_destroy_queue;
da0436e9
JS
7565 }
7566
8a9d2e80 7567 /* register the els sgl pool to the port */
895427bd
JS
7568 rc = lpfc_sli4_repost_sgl_list(phba, &phba->sli4_hba.lpfc_els_sgl_list,
7569 phba->sli4_hba.els_xri_cnt);
7570 if (unlikely(rc < 0)) {
8a9d2e80
JS
7571 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7572 "0582 Error %d during els sgl post "
7573 "operation\n", rc);
7574 rc = -ENODEV;
895427bd 7575 goto out_destroy_queue;
8a9d2e80 7576 }
895427bd 7577 phba->sli4_hba.els_xri_cnt = rc;
8a9d2e80 7578
f358dd0c
JS
7579 if (phba->nvmet_support) {
7580 /* update host nvmet xri-sgl sizes and mappings */
7581 rc = lpfc_sli4_nvmet_sgl_update(phba);
7582 if (unlikely(rc)) {
7583 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7584 "6308 Failed to update nvmet-sgl size "
7585 "and mapping: %d\n", rc);
7586 goto out_destroy_queue;
7587 }
7588
7589 /* register the nvmet sgl pool to the port */
7590 rc = lpfc_sli4_repost_sgl_list(
7591 phba,
7592 &phba->sli4_hba.lpfc_nvmet_sgl_list,
7593 phba->sli4_hba.nvmet_xri_cnt);
7594 if (unlikely(rc < 0)) {
7595 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7596 "3117 Error %d during nvmet "
7597 "sgl post\n", rc);
7598 rc = -ENODEV;
7599 goto out_destroy_queue;
7600 }
7601 phba->sli4_hba.nvmet_xri_cnt = rc;
6c621a22 7602
a5f7337f
JS
7603 /* We allocate an iocbq for every receive context SGL.
7604 * The additional allocation is for abort and ls handling.
7605 */
7606 cnt = phba->sli4_hba.nvmet_xri_cnt +
7607 phba->sli4_hba.max_cfg_param.max_xri;
f358dd0c 7608 } else {
0794d601 7609 /* update host common xri-sgl sizes and mappings */
5e5b511d 7610 rc = lpfc_sli4_io_sgl_update(phba);
895427bd
JS
7611 if (unlikely(rc)) {
7612 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
0794d601 7613 "6082 Failed to update nvme-sgl size "
895427bd
JS
7614 "and mapping: %d\n", rc);
7615 goto out_destroy_queue;
7616 }
7617
0794d601 7618 /* register the allocated common sgl pool to the port */
5e5b511d 7619 rc = lpfc_sli4_repost_io_sgl_list(phba);
895427bd
JS
7620 if (unlikely(rc)) {
7621 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
0794d601
JS
7622 "6116 Error %d during nvme sgl post "
7623 "operation\n", rc);
7624 /* Some NVME buffers were moved to abort nvme list */
7625 /* A pci function reset will repost them */
7626 rc = -ENODEV;
895427bd
JS
7627 goto out_destroy_queue;
7628 }
a5f7337f
JS
7629 /* Each lpfc_io_buf job structure has an iocbq element.
7630 * This cnt provides for abort, els, ct and ls requests.
7631 */
7632 cnt = phba->sli4_hba.max_cfg_param.max_xri;
11e644e2
JS
7633 }
7634
7635 if (!phba->sli.iocbq_lookup) {
6c621a22
JS
7636 /* Initialize and populate the iocb list per host */
7637 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a5f7337f
JS
7638 "2821 initialize iocb list with %d entries\n",
7639 cnt);
6c621a22
JS
7640 rc = lpfc_init_iocb_list(phba, cnt);
7641 if (rc) {
7642 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11e644e2 7643 "1413 Failed to init iocb list.\n");
6c621a22
JS
7644 goto out_destroy_queue;
7645 }
895427bd
JS
7646 }
7647
11e644e2
JS
7648 if (phba->nvmet_support)
7649 lpfc_nvmet_create_targetport(phba);
7650
2d7dbc4c 7651 if (phba->nvmet_support && phba->cfg_nvmet_mrq) {
2d7dbc4c
JS
7652 /* Post initial buffers to all RQs created */
7653 for (i = 0; i < phba->cfg_nvmet_mrq; i++) {
7654 rqbp = phba->sli4_hba.nvmet_mrq_hdr[i]->rqbp;
7655 INIT_LIST_HEAD(&rqbp->rqb_buffer_list);
7656 rqbp->rqb_alloc_buffer = lpfc_sli4_nvmet_alloc;
7657 rqbp->rqb_free_buffer = lpfc_sli4_nvmet_free;
61f3d4bf 7658 rqbp->entry_count = LPFC_NVMET_RQE_DEF_COUNT;
2d7dbc4c
JS
7659 rqbp->buffer_count = 0;
7660
2d7dbc4c
JS
7661 lpfc_post_rq_buffer(
7662 phba, phba->sli4_hba.nvmet_mrq_hdr[i],
7663 phba->sli4_hba.nvmet_mrq_data[i],
2448e484 7664 phba->cfg_nvmet_mrq_post, i);
2d7dbc4c
JS
7665 }
7666 }
7667
da0436e9
JS
7668 /* Post the rpi header region to the device. */
7669 rc = lpfc_sli4_post_all_rpi_hdrs(phba);
7670 if (unlikely(rc)) {
7671 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7672 "0393 Error %d during rpi post operation\n",
7673 rc);
7674 rc = -ENODEV;
895427bd 7675 goto out_destroy_queue;
da0436e9 7676 }
97f2ecf1 7677 lpfc_sli4_node_prep(phba);
da0436e9 7678
895427bd 7679 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
2d7dbc4c 7680 if ((phba->nvmet_support == 0) || (phba->cfg_nvmet_mrq == 1)) {
895427bd
JS
7681 /*
7682 * The FC Port needs to register FCFI (index 0)
7683 */
7684 lpfc_reg_fcfi(phba, mboxq);
7685 mboxq->vport = phba->pport;
7686 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7687 if (rc != MBX_SUCCESS)
7688 goto out_unset_queue;
7689 rc = 0;
7690 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_fcfi,
7691 &mboxq->u.mqe.un.reg_fcfi);
2d7dbc4c
JS
7692 } else {
7693 /* We are a NVME Target mode with MRQ > 1 */
7694
7695 /* First register the FCFI */
7696 lpfc_reg_fcfi_mrq(phba, mboxq, 0);
7697 mboxq->vport = phba->pport;
7698 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7699 if (rc != MBX_SUCCESS)
7700 goto out_unset_queue;
7701 rc = 0;
7702 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_mrq_fcfi,
7703 &mboxq->u.mqe.un.reg_fcfi_mrq);
7704
7705 /* Next register the MRQs */
7706 lpfc_reg_fcfi_mrq(phba, mboxq, 1);
7707 mboxq->vport = phba->pport;
7708 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7709 if (rc != MBX_SUCCESS)
7710 goto out_unset_queue;
7711 rc = 0;
895427bd
JS
7712 }
7713 /* Check if the port is configured to be disabled */
7714 lpfc_sli_read_link_ste(phba);
da0436e9
JS
7715 }
7716
c490850a
JS
7717 /* Don't post more new bufs if repost already recovered
7718 * the nvme sgls.
7719 */
7720 if (phba->nvmet_support == 0) {
7721 if (phba->sli4_hba.io_xri_cnt == 0) {
7722 len = lpfc_new_io_buf(
7723 phba, phba->sli4_hba.io_xri_max);
7724 if (len == 0) {
7725 rc = -ENOMEM;
7726 goto out_unset_queue;
7727 }
7728
7729 if (phba->cfg_xri_rebalancing)
7730 lpfc_create_multixri_pools(phba);
7731 }
7732 } else {
7733 phba->cfg_xri_rebalancing = 0;
7734 }
7735
da0436e9
JS
7736 /* Allow asynchronous mailbox command to go through */
7737 spin_lock_irq(&phba->hbalock);
7738 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
7739 spin_unlock_irq(&phba->hbalock);
7740
7741 /* Post receive buffers to the device */
7742 lpfc_sli4_rb_setup(phba);
7743
fc2b989b
JS
7744 /* Reset HBA FCF states after HBA reset */
7745 phba->fcf.fcf_flag = 0;
7746 phba->fcf.current_rec.flag = 0;
7747
da0436e9 7748 /* Start the ELS watchdog timer */
8fa38513 7749 mod_timer(&vport->els_tmofunc,
256ec0d0 7750 jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov * 2)));
da0436e9
JS
7751
7752 /* Start heart beat timer */
7753 mod_timer(&phba->hb_tmofunc,
256ec0d0 7754 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
da0436e9
JS
7755 phba->hb_outstanding = 0;
7756 phba->last_completion_time = jiffies;
7757
32517fc0
JS
7758 /* start eq_delay heartbeat */
7759 if (phba->cfg_auto_imax)
7760 queue_delayed_work(phba->wq, &phba->eq_delay_work,
7761 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
7762
da0436e9 7763 /* Start error attention (ERATT) polling timer */
256ec0d0 7764 mod_timer(&phba->eratt_poll,
65791f1f 7765 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
da0436e9 7766
75baf696
JS
7767 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
7768 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
7769 rc = pci_enable_pcie_error_reporting(phba->pcidev);
7770 if (!rc) {
7771 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7772 "2829 This device supports "
7773 "Advanced Error Reporting (AER)\n");
7774 spin_lock_irq(&phba->hbalock);
7775 phba->hba_flag |= HBA_AER_ENABLED;
7776 spin_unlock_irq(&phba->hbalock);
7777 } else {
7778 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7779 "2830 This device does not support "
7780 "Advanced Error Reporting (AER)\n");
7781 phba->cfg_aer_support = 0;
7782 }
0a96e975 7783 rc = 0;
75baf696
JS
7784 }
7785
da0436e9
JS
7786 /*
7787 * The port is ready, set the host's link state to LINK_DOWN
7788 * in preparation for link interrupts.
7789 */
da0436e9
JS
7790 spin_lock_irq(&phba->hbalock);
7791 phba->link_state = LPFC_LINK_DOWN;
1dc5ec24
JS
7792
7793 /* Check if physical ports are trunked */
7794 if (bf_get(lpfc_conf_trunk_port0, &phba->sli4_hba))
7795 phba->trunk_link.link0.state = LPFC_LINK_DOWN;
7796 if (bf_get(lpfc_conf_trunk_port1, &phba->sli4_hba))
7797 phba->trunk_link.link1.state = LPFC_LINK_DOWN;
7798 if (bf_get(lpfc_conf_trunk_port2, &phba->sli4_hba))
7799 phba->trunk_link.link2.state = LPFC_LINK_DOWN;
7800 if (bf_get(lpfc_conf_trunk_port3, &phba->sli4_hba))
7801 phba->trunk_link.link3.state = LPFC_LINK_DOWN;
da0436e9 7802 spin_unlock_irq(&phba->hbalock);
1dc5ec24 7803
e8869f5b
JS
7804 /* Arm the CQs and then EQs on device */
7805 lpfc_sli4_arm_cqeq_intr(phba);
7806
7807 /* Indicate device interrupt mode */
7808 phba->sli4_hba.intr_enable = 1;
7809
026abb87
JS
7810 if (!(phba->hba_flag & HBA_FCOE_MODE) &&
7811 (phba->hba_flag & LINK_DISABLED)) {
7812 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7813 "3103 Adapter Link is disabled.\n");
7814 lpfc_down_link(phba, mboxq);
7815 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7816 if (rc != MBX_SUCCESS) {
7817 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7818 "3104 Adapter failed to issue "
7819 "DOWN_LINK mbox cmd, rc:x%x\n", rc);
c490850a 7820 goto out_io_buff_free;
026abb87
JS
7821 }
7822 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
1b51197d
JS
7823 /* don't perform init_link on SLI4 FC port loopback test */
7824 if (!(phba->link_flag & LS_LOOPBACK_MODE)) {
7825 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
7826 if (rc)
c490850a 7827 goto out_io_buff_free;
1b51197d 7828 }
5350d872
JS
7829 }
7830 mempool_free(mboxq, phba->mbox_mem_pool);
7831 return rc;
c490850a
JS
7832out_io_buff_free:
7833 /* Free allocated IO Buffers */
7834 lpfc_io_free(phba);
76a95d75 7835out_unset_queue:
da0436e9 7836 /* Unset all the queues set up in this routine when error out */
5350d872
JS
7837 lpfc_sli4_queue_unset(phba);
7838out_destroy_queue:
6c621a22 7839 lpfc_free_iocb_list(phba);
5350d872 7840 lpfc_sli4_queue_destroy(phba);
da0436e9 7841out_stop_timers:
5350d872 7842 lpfc_stop_hba_timers(phba);
da0436e9
JS
7843out_free_mbox:
7844 mempool_free(mboxq, phba->mbox_mem_pool);
7845 return rc;
7846}
7847
7848/**
7849 * lpfc_mbox_timeout - Timeout call back function for mbox timer
7850 * @ptr: context object - pointer to hba structure.
7851 *
7852 * This is the callback function for mailbox timer. The mailbox
7853 * timer is armed when a new mailbox command is issued and the timer
7854 * is deleted when the mailbox complete. The function is called by
7855 * the kernel timer code when a mailbox does not complete within
7856 * expected time. This function wakes up the worker thread to
7857 * process the mailbox timeout and returns. All the processing is
7858 * done by the worker thread function lpfc_mbox_timeout_handler.
7859 **/
7860void
f22eb4d3 7861lpfc_mbox_timeout(struct timer_list *t)
da0436e9 7862{
f22eb4d3 7863 struct lpfc_hba *phba = from_timer(phba, t, sli.mbox_tmo);
da0436e9
JS
7864 unsigned long iflag;
7865 uint32_t tmo_posted;
7866
7867 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
7868 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
7869 if (!tmo_posted)
7870 phba->pport->work_port_events |= WORKER_MBOX_TMO;
7871 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
7872
7873 if (!tmo_posted)
7874 lpfc_worker_wake_up(phba);
7875 return;
7876}
7877
e8d3c3b1
JS
7878/**
7879 * lpfc_sli4_mbox_completions_pending - check to see if any mailbox completions
7880 * are pending
7881 * @phba: Pointer to HBA context object.
7882 *
7883 * This function checks if any mailbox completions are present on the mailbox
7884 * completion queue.
7885 **/
3bb11fc5 7886static bool
e8d3c3b1
JS
7887lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba)
7888{
7889
7890 uint32_t idx;
7891 struct lpfc_queue *mcq;
7892 struct lpfc_mcqe *mcqe;
7893 bool pending_completions = false;
7365f6fd 7894 uint8_t qe_valid;
e8d3c3b1
JS
7895
7896 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7897 return false;
7898
7899 /* Check for completions on mailbox completion queue */
7900
7901 mcq = phba->sli4_hba.mbx_cq;
7902 idx = mcq->hba_index;
7365f6fd 7903 qe_valid = mcq->qe_valid;
9afbee3d
JS
7904 while (bf_get_le32(lpfc_cqe_valid,
7905 (struct lpfc_cqe *)lpfc_sli4_qe(mcq, idx)) == qe_valid) {
7906 mcqe = (struct lpfc_mcqe *)(lpfc_sli4_qe(mcq, idx));
e8d3c3b1
JS
7907 if (bf_get_le32(lpfc_trailer_completed, mcqe) &&
7908 (!bf_get_le32(lpfc_trailer_async, mcqe))) {
7909 pending_completions = true;
7910 break;
7911 }
7912 idx = (idx + 1) % mcq->entry_count;
7913 if (mcq->hba_index == idx)
7914 break;
7365f6fd
JS
7915
7916 /* if the index wrapped around, toggle the valid bit */
7917 if (phba->sli4_hba.pc_sli4_params.cqav && !idx)
7918 qe_valid = (qe_valid) ? 0 : 1;
e8d3c3b1
JS
7919 }
7920 return pending_completions;
7921
7922}
7923
7924/**
7925 * lpfc_sli4_process_missed_mbox_completions - process mbox completions
7926 * that were missed.
7927 * @phba: Pointer to HBA context object.
7928 *
7929 * For sli4, it is possible to miss an interrupt. As such mbox completions
7930 * maybe missed causing erroneous mailbox timeouts to occur. This function
7931 * checks to see if mbox completions are on the mailbox completion queue
7932 * and will process all the completions associated with the eq for the
7933 * mailbox completion queue.
7934 **/
d7b761b0 7935static bool
e8d3c3b1
JS
7936lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba)
7937{
b71413dd 7938 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
e8d3c3b1
JS
7939 uint32_t eqidx;
7940 struct lpfc_queue *fpeq = NULL;
657add4e 7941 struct lpfc_queue *eq;
e8d3c3b1
JS
7942 bool mbox_pending;
7943
7944 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7945 return false;
7946
657add4e
JS
7947 /* Find the EQ associated with the mbox CQ */
7948 if (sli4_hba->hdwq) {
7949 for (eqidx = 0; eqidx < phba->cfg_irq_chann; eqidx++) {
7950 eq = phba->sli4_hba.hba_eq_hdl[eqidx].eq;
535fb49e 7951 if (eq && eq->queue_id == sli4_hba->mbx_cq->assoc_qid) {
657add4e 7952 fpeq = eq;
e8d3c3b1
JS
7953 break;
7954 }
657add4e
JS
7955 }
7956 }
e8d3c3b1
JS
7957 if (!fpeq)
7958 return false;
7959
7960 /* Turn off interrupts from this EQ */
7961
b71413dd 7962 sli4_hba->sli4_eq_clr_intr(fpeq);
e8d3c3b1
JS
7963
7964 /* Check to see if a mbox completion is pending */
7965
7966 mbox_pending = lpfc_sli4_mbox_completions_pending(phba);
7967
7968 /*
7969 * If a mbox completion is pending, process all the events on EQ
7970 * associated with the mbox completion queue (this could include
7971 * mailbox commands, async events, els commands, receive queue data
7972 * and fcp commands)
7973 */
7974
7975 if (mbox_pending)
32517fc0 7976 /* process and rearm the EQ */
93a4d6f4 7977 lpfc_sli4_process_eq(phba, fpeq, LPFC_QUEUE_REARM);
32517fc0
JS
7978 else
7979 /* Always clear and re-arm the EQ */
7980 sli4_hba->sli4_write_eq_db(phba, fpeq, 0, LPFC_QUEUE_REARM);
e8d3c3b1
JS
7981
7982 return mbox_pending;
7983
7984}
da0436e9
JS
7985
7986/**
7987 * lpfc_mbox_timeout_handler - Worker thread function to handle mailbox timeout
7988 * @phba: Pointer to HBA context object.
7989 *
7990 * This function is called from worker thread when a mailbox command times out.
7991 * The caller is not required to hold any locks. This function will reset the
7992 * HBA and recover all the pending commands.
7993 **/
7994void
7995lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
7996{
7997 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
eb016566
JS
7998 MAILBOX_t *mb = NULL;
7999
da0436e9 8000 struct lpfc_sli *psli = &phba->sli;
da0436e9 8001
e8d3c3b1
JS
8002 /* If the mailbox completed, process the completion and return */
8003 if (lpfc_sli4_process_missed_mbox_completions(phba))
8004 return;
8005
eb016566
JS
8006 if (pmbox != NULL)
8007 mb = &pmbox->u.mb;
da0436e9
JS
8008 /* Check the pmbox pointer first. There is a race condition
8009 * between the mbox timeout handler getting executed in the
8010 * worklist and the mailbox actually completing. When this
8011 * race condition occurs, the mbox_active will be NULL.
8012 */
8013 spin_lock_irq(&phba->hbalock);
8014 if (pmbox == NULL) {
8015 lpfc_printf_log(phba, KERN_WARNING,
8016 LOG_MBOX | LOG_SLI,
8017 "0353 Active Mailbox cleared - mailbox timeout "
8018 "exiting\n");
8019 spin_unlock_irq(&phba->hbalock);
8020 return;
8021 }
8022
8023 /* Mbox cmd <mbxCommand> timeout */
8024 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
32350664 8025 "0310 Mailbox command x%x timeout Data: x%x x%x x%px\n",
da0436e9
JS
8026 mb->mbxCommand,
8027 phba->pport->port_state,
8028 phba->sli.sli_flag,
8029 phba->sli.mbox_active);
8030 spin_unlock_irq(&phba->hbalock);
8031
8032 /* Setting state unknown so lpfc_sli_abort_iocb_ring
8033 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
25985edc 8034 * it to fail all outstanding SCSI IO.
da0436e9
JS
8035 */
8036 spin_lock_irq(&phba->pport->work_port_lock);
8037 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
8038 spin_unlock_irq(&phba->pport->work_port_lock);
8039 spin_lock_irq(&phba->hbalock);
8040 phba->link_state = LPFC_LINK_UNKNOWN;
f4b4c68f 8041 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
da0436e9
JS
8042 spin_unlock_irq(&phba->hbalock);
8043
db55fba8 8044 lpfc_sli_abort_fcp_rings(phba);
da0436e9
JS
8045
8046 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8047 "0345 Resetting board due to mailbox timeout\n");
8048
8049 /* Reset the HBA device */
8050 lpfc_reset_hba(phba);
8051}
8052
8053/**
8054 * lpfc_sli_issue_mbox_s3 - Issue an SLI3 mailbox command to firmware
8055 * @phba: Pointer to HBA context object.
8056 * @pmbox: Pointer to mailbox object.
8057 * @flag: Flag indicating how the mailbox need to be processed.
8058 *
8059 * This function is called by discovery code and HBA management code
8060 * to submit a mailbox command to firmware with SLI-3 interface spec. This
8061 * function gets the hbalock to protect the data structures.
8062 * The mailbox command can be submitted in polling mode, in which case
8063 * this function will wait in a polling loop for the completion of the
8064 * mailbox.
8065 * If the mailbox is submitted in no_wait mode (not polling) the
8066 * function will submit the command and returns immediately without waiting
8067 * for the mailbox completion. The no_wait is supported only when HBA
8068 * is in SLI2/SLI3 mode - interrupts are enabled.
8069 * The SLI interface allows only one mailbox pending at a time. If the
8070 * mailbox is issued in polling mode and there is already a mailbox
8071 * pending, then the function will return an error. If the mailbox is issued
8072 * in NO_WAIT mode and there is a mailbox pending already, the function
8073 * will return MBX_BUSY after queuing the mailbox into mailbox queue.
8074 * The sli layer owns the mailbox object until the completion of mailbox
8075 * command if this function return MBX_BUSY or MBX_SUCCESS. For all other
8076 * return codes the caller owns the mailbox command after the return of
8077 * the function.
e59058c4 8078 **/
3772a991
JS
8079static int
8080lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
8081 uint32_t flag)
dea3101e 8082{
bf07bdea 8083 MAILBOX_t *mbx;
2e0fef85 8084 struct lpfc_sli *psli = &phba->sli;
dea3101e 8085 uint32_t status, evtctr;
9940b97b 8086 uint32_t ha_copy, hc_copy;
dea3101e 8087 int i;
09372820 8088 unsigned long timeout;
dea3101e 8089 unsigned long drvr_flag = 0;
34b02dcd 8090 uint32_t word0, ldata;
dea3101e 8091 void __iomem *to_slim;
58da1ffb
JS
8092 int processing_queue = 0;
8093
8094 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8095 if (!pmbox) {
8568a4d2 8096 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
58da1ffb 8097 /* processing mbox queue from intr_handler */
3772a991
JS
8098 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8099 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8100 return MBX_SUCCESS;
8101 }
58da1ffb 8102 processing_queue = 1;
58da1ffb
JS
8103 pmbox = lpfc_mbox_get(phba);
8104 if (!pmbox) {
8105 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8106 return MBX_SUCCESS;
8107 }
8108 }
dea3101e 8109
ed957684 8110 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 8111 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684 8112 if(!pmbox->vport) {
58da1ffb 8113 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
ed957684 8114 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 8115 LOG_MBOX | LOG_VPORT,
e8b62011 8116 "1806 Mbox x%x failed. No vport\n",
3772a991 8117 pmbox->u.mb.mbxCommand);
ed957684 8118 dump_stack();
58da1ffb 8119 goto out_not_finished;
ed957684
JS
8120 }
8121 }
8122
8d63f375 8123 /* If the PCI channel is in offline state, do not post mbox. */
58da1ffb
JS
8124 if (unlikely(pci_channel_offline(phba->pcidev))) {
8125 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8126 goto out_not_finished;
8127 }
8d63f375 8128
a257bf90
JS
8129 /* If HBA has a deferred error attention, fail the iocb. */
8130 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
8131 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8132 goto out_not_finished;
8133 }
8134
dea3101e 8135 psli = &phba->sli;
92d7f7b0 8136
bf07bdea 8137 mbx = &pmbox->u.mb;
dea3101e
JB
8138 status = MBX_SUCCESS;
8139
2e0fef85
JS
8140 if (phba->link_state == LPFC_HBA_ERROR) {
8141 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW
8142
8143 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8144 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8145 "(%d):0311 Mailbox command x%x cannot "
8146 "issue Data: x%x x%x\n",
8147 pmbox->vport ? pmbox->vport->vpi : 0,
8148 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
58da1ffb 8149 goto out_not_finished;
41415862
JW
8150 }
8151
bf07bdea 8152 if (mbx->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT) {
9940b97b
JS
8153 if (lpfc_readl(phba->HCregaddr, &hc_copy) ||
8154 !(hc_copy & HC_MBINT_ENA)) {
8155 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8156 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
3772a991
JS
8157 "(%d):2528 Mailbox command x%x cannot "
8158 "issue Data: x%x x%x\n",
8159 pmbox->vport ? pmbox->vport->vpi : 0,
8160 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
9940b97b
JS
8161 goto out_not_finished;
8162 }
9290831f
JS
8163 }
8164
dea3101e
JB
8165 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8166 /* Polling for a mbox command when another one is already active
8167 * is not allowed in SLI. Also, the driver must have established
8168 * SLI2 mode to queue and process multiple mbox commands.
8169 */
8170
8171 if (flag & MBX_POLL) {
2e0fef85 8172 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
8173
8174 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8175 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8176 "(%d):2529 Mailbox command x%x "
8177 "cannot issue Data: x%x x%x\n",
8178 pmbox->vport ? pmbox->vport->vpi : 0,
8179 pmbox->u.mb.mbxCommand,
8180 psli->sli_flag, flag);
58da1ffb 8181 goto out_not_finished;
dea3101e
JB
8182 }
8183
3772a991 8184 if (!(psli->sli_flag & LPFC_SLI_ACTIVE)) {
2e0fef85 8185 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8186 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8187 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8188 "(%d):2530 Mailbox command x%x "
8189 "cannot issue Data: x%x x%x\n",
8190 pmbox->vport ? pmbox->vport->vpi : 0,
8191 pmbox->u.mb.mbxCommand,
8192 psli->sli_flag, flag);
58da1ffb 8193 goto out_not_finished;
dea3101e
JB
8194 }
8195
dea3101e
JB
8196 /* Another mailbox command is still being processed, queue this
8197 * command to be processed later.
8198 */
8199 lpfc_mbox_put(phba, pmbox);
8200
8201 /* Mbox cmd issue - BUSY */
ed957684 8202 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8203 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 8204 "x%x x%x x%x x%x\n",
92d7f7b0 8205 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
e92974f6
JS
8206 mbx->mbxCommand,
8207 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8208 psli->sli_flag, flag);
dea3101e
JB
8209
8210 psli->slistat.mbox_busy++;
2e0fef85 8211 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8212
858c9f6c
JS
8213 if (pmbox->vport) {
8214 lpfc_debugfs_disc_trc(pmbox->vport,
8215 LPFC_DISC_TRC_MBOX_VPORT,
8216 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8217 (uint32_t)mbx->mbxCommand,
8218 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8219 }
8220 else {
8221 lpfc_debugfs_disc_trc(phba->pport,
8222 LPFC_DISC_TRC_MBOX,
8223 "MBOX Bsy: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8224 (uint32_t)mbx->mbxCommand,
8225 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8226 }
8227
2e0fef85 8228 return MBX_BUSY;
dea3101e
JB
8229 }
8230
dea3101e
JB
8231 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8232
8233 /* If we are not polling, we MUST be in SLI2 mode */
8234 if (flag != MBX_POLL) {
3772a991 8235 if (!(psli->sli_flag & LPFC_SLI_ACTIVE) &&
bf07bdea 8236 (mbx->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 8237 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8238 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8239 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8240 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8241 "(%d):2531 Mailbox command x%x "
8242 "cannot issue Data: x%x x%x\n",
8243 pmbox->vport ? pmbox->vport->vpi : 0,
8244 pmbox->u.mb.mbxCommand,
8245 psli->sli_flag, flag);
58da1ffb 8246 goto out_not_finished;
dea3101e
JB
8247 }
8248 /* timeout active mbox command */
256ec0d0
JS
8249 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8250 1000);
8251 mod_timer(&psli->mbox_tmo, jiffies + timeout);
dea3101e
JB
8252 }
8253
8254 /* Mailbox cmd <cmd> issue */
ed957684 8255 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8256 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 8257 "x%x\n",
e8b62011 8258 pmbox->vport ? pmbox->vport->vpi : 0,
e92974f6
JS
8259 mbx->mbxCommand,
8260 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8261 psli->sli_flag, flag);
dea3101e 8262
bf07bdea 8263 if (mbx->mbxCommand != MBX_HEARTBEAT) {
858c9f6c
JS
8264 if (pmbox->vport) {
8265 lpfc_debugfs_disc_trc(pmbox->vport,
8266 LPFC_DISC_TRC_MBOX_VPORT,
8267 "MBOX Send vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8268 (uint32_t)mbx->mbxCommand,
8269 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8270 }
8271 else {
8272 lpfc_debugfs_disc_trc(phba->pport,
8273 LPFC_DISC_TRC_MBOX,
8274 "MBOX Send: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8275 (uint32_t)mbx->mbxCommand,
8276 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8277 }
8278 }
8279
dea3101e
JB
8280 psli->slistat.mbox_cmd++;
8281 evtctr = psli->slistat.mbox_event;
8282
8283 /* next set own bit for the adapter and copy over command word */
bf07bdea 8284 mbx->mbxOwner = OWN_CHIP;
dea3101e 8285
3772a991 8286 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
7a470277
JS
8287 /* Populate mbox extension offset word. */
8288 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len) {
bf07bdea 8289 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8290 = (uint8_t *)phba->mbox_ext
8291 - (uint8_t *)phba->mbox;
8292 }
8293
8294 /* Copy the mailbox extension data */
3e1f0718
JS
8295 if (pmbox->in_ext_byte_len && pmbox->ctx_buf) {
8296 lpfc_sli_pcimem_bcopy(pmbox->ctx_buf,
8297 (uint8_t *)phba->mbox_ext,
8298 pmbox->in_ext_byte_len);
7a470277
JS
8299 }
8300 /* Copy command data to host SLIM area */
bf07bdea 8301 lpfc_sli_pcimem_bcopy(mbx, phba->mbox, MAILBOX_CMD_SIZE);
dea3101e 8302 } else {
7a470277
JS
8303 /* Populate mbox extension offset word. */
8304 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len)
bf07bdea 8305 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8306 = MAILBOX_HBA_EXT_OFFSET;
8307
8308 /* Copy the mailbox extension data */
3e1f0718 8309 if (pmbox->in_ext_byte_len && pmbox->ctx_buf)
7a470277
JS
8310 lpfc_memcpy_to_slim(phba->MBslimaddr +
8311 MAILBOX_HBA_EXT_OFFSET,
3e1f0718 8312 pmbox->ctx_buf, pmbox->in_ext_byte_len);
7a470277 8313
895427bd 8314 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8315 /* copy command data into host mbox for cmpl */
895427bd
JS
8316 lpfc_sli_pcimem_bcopy(mbx, phba->mbox,
8317 MAILBOX_CMD_SIZE);
dea3101e
JB
8318
8319 /* First copy mbox command data to HBA SLIM, skip past first
8320 word */
8321 to_slim = phba->MBslimaddr + sizeof (uint32_t);
bf07bdea 8322 lpfc_memcpy_to_slim(to_slim, &mbx->un.varWords[0],
dea3101e
JB
8323 MAILBOX_CMD_SIZE - sizeof (uint32_t));
8324
8325 /* Next copy over first word, with mbxOwner set */
bf07bdea 8326 ldata = *((uint32_t *)mbx);
dea3101e
JB
8327 to_slim = phba->MBslimaddr;
8328 writel(ldata, to_slim);
8329 readl(to_slim); /* flush */
8330
895427bd 8331 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8332 /* switch over to host mailbox */
3772a991 8333 psli->sli_flag |= LPFC_SLI_ACTIVE;
dea3101e
JB
8334 }
8335
8336 wmb();
dea3101e
JB
8337
8338 switch (flag) {
8339 case MBX_NOWAIT:
09372820 8340 /* Set up reference to mailbox command */
dea3101e 8341 psli->mbox_active = pmbox;
09372820
JS
8342 /* Interrupt board to do it */
8343 writel(CA_MBATT, phba->CAregaddr);
8344 readl(phba->CAregaddr); /* flush */
8345 /* Don't wait for it to finish, just return */
dea3101e
JB
8346 break;
8347
8348 case MBX_POLL:
09372820 8349 /* Set up null reference to mailbox command */
dea3101e 8350 psli->mbox_active = NULL;
09372820
JS
8351 /* Interrupt board to do it */
8352 writel(CA_MBATT, phba->CAregaddr);
8353 readl(phba->CAregaddr); /* flush */
8354
3772a991 8355 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8356 /* First read mbox status word */
34b02dcd 8357 word0 = *((uint32_t *)phba->mbox);
dea3101e
JB
8358 word0 = le32_to_cpu(word0);
8359 } else {
8360 /* First read mbox status word */
9940b97b
JS
8361 if (lpfc_readl(phba->MBslimaddr, &word0)) {
8362 spin_unlock_irqrestore(&phba->hbalock,
8363 drvr_flag);
8364 goto out_not_finished;
8365 }
dea3101e
JB
8366 }
8367
8368 /* Read the HBA Host Attention Register */
9940b97b
JS
8369 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8370 spin_unlock_irqrestore(&phba->hbalock,
8371 drvr_flag);
8372 goto out_not_finished;
8373 }
a183a15f
JS
8374 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8375 1000) + jiffies;
09372820 8376 i = 0;
dea3101e 8377 /* Wait for command to complete */
41415862
JW
8378 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
8379 (!(ha_copy & HA_MBATT) &&
2e0fef85 8380 (phba->link_state > LPFC_WARM_START))) {
09372820 8381 if (time_after(jiffies, timeout)) {
dea3101e 8382 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8383 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 8384 drvr_flag);
58da1ffb 8385 goto out_not_finished;
dea3101e
JB
8386 }
8387
8388 /* Check if we took a mbox interrupt while we were
8389 polling */
8390 if (((word0 & OWN_CHIP) != OWN_CHIP)
8391 && (evtctr != psli->slistat.mbox_event))
8392 break;
8393
09372820
JS
8394 if (i++ > 10) {
8395 spin_unlock_irqrestore(&phba->hbalock,
8396 drvr_flag);
8397 msleep(1);
8398 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8399 }
dea3101e 8400
3772a991 8401 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8402 /* First copy command data */
34b02dcd 8403 word0 = *((uint32_t *)phba->mbox);
dea3101e 8404 word0 = le32_to_cpu(word0);
bf07bdea 8405 if (mbx->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 8406 MAILBOX_t *slimmb;
34b02dcd 8407 uint32_t slimword0;
dea3101e
JB
8408 /* Check real SLIM for any errors */
8409 slimword0 = readl(phba->MBslimaddr);
8410 slimmb = (MAILBOX_t *) & slimword0;
8411 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
8412 && slimmb->mbxStatus) {
8413 psli->sli_flag &=
3772a991 8414 ~LPFC_SLI_ACTIVE;
dea3101e
JB
8415 word0 = slimword0;
8416 }
8417 }
8418 } else {
8419 /* First copy command data */
8420 word0 = readl(phba->MBslimaddr);
8421 }
8422 /* Read the HBA Host Attention Register */
9940b97b
JS
8423 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8424 spin_unlock_irqrestore(&phba->hbalock,
8425 drvr_flag);
8426 goto out_not_finished;
8427 }
dea3101e
JB
8428 }
8429
3772a991 8430 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8431 /* copy results back to user */
2ea259ee
JS
8432 lpfc_sli_pcimem_bcopy(phba->mbox, mbx,
8433 MAILBOX_CMD_SIZE);
7a470277 8434 /* Copy the mailbox extension data */
3e1f0718 8435 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
7a470277 8436 lpfc_sli_pcimem_bcopy(phba->mbox_ext,
3e1f0718 8437 pmbox->ctx_buf,
7a470277
JS
8438 pmbox->out_ext_byte_len);
8439 }
dea3101e
JB
8440 } else {
8441 /* First copy command data */
bf07bdea 8442 lpfc_memcpy_from_slim(mbx, phba->MBslimaddr,
2ea259ee 8443 MAILBOX_CMD_SIZE);
7a470277 8444 /* Copy the mailbox extension data */
3e1f0718
JS
8445 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
8446 lpfc_memcpy_from_slim(
8447 pmbox->ctx_buf,
7a470277
JS
8448 phba->MBslimaddr +
8449 MAILBOX_HBA_EXT_OFFSET,
8450 pmbox->out_ext_byte_len);
dea3101e
JB
8451 }
8452 }
8453
8454 writel(HA_MBATT, phba->HAregaddr);
8455 readl(phba->HAregaddr); /* flush */
8456
8457 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
bf07bdea 8458 status = mbx->mbxStatus;
dea3101e
JB
8459 }
8460
2e0fef85
JS
8461 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8462 return status;
58da1ffb
JS
8463
8464out_not_finished:
8465 if (processing_queue) {
da0436e9 8466 pmbox->u.mb.mbxStatus = MBX_NOT_FINISHED;
58da1ffb
JS
8467 lpfc_mbox_cmpl_put(phba, pmbox);
8468 }
8469 return MBX_NOT_FINISHED;
dea3101e
JB
8470}
8471
f1126688
JS
8472/**
8473 * lpfc_sli4_async_mbox_block - Block posting SLI4 asynchronous mailbox command
8474 * @phba: Pointer to HBA context object.
8475 *
8476 * The function blocks the posting of SLI4 asynchronous mailbox commands from
8477 * the driver internal pending mailbox queue. It will then try to wait out the
8478 * possible outstanding mailbox command before return.
8479 *
8480 * Returns:
8481 * 0 - the outstanding mailbox command completed; otherwise, the wait for
8482 * the outstanding mailbox command timed out.
8483 **/
8484static int
8485lpfc_sli4_async_mbox_block(struct lpfc_hba *phba)
8486{
8487 struct lpfc_sli *psli = &phba->sli;
f1126688 8488 int rc = 0;
a183a15f 8489 unsigned long timeout = 0;
f1126688
JS
8490
8491 /* Mark the asynchronous mailbox command posting as blocked */
8492 spin_lock_irq(&phba->hbalock);
8493 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
f1126688
JS
8494 /* Determine how long we might wait for the active mailbox
8495 * command to be gracefully completed by firmware.
8496 */
a183a15f
JS
8497 if (phba->sli.mbox_active)
8498 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
8499 phba->sli.mbox_active) *
8500 1000) + jiffies;
8501 spin_unlock_irq(&phba->hbalock);
8502
e8d3c3b1
JS
8503 /* Make sure the mailbox is really active */
8504 if (timeout)
8505 lpfc_sli4_process_missed_mbox_completions(phba);
8506
f1126688
JS
8507 /* Wait for the outstnading mailbox command to complete */
8508 while (phba->sli.mbox_active) {
8509 /* Check active mailbox complete status every 2ms */
8510 msleep(2);
8511 if (time_after(jiffies, timeout)) {
8512 /* Timeout, marked the outstanding cmd not complete */
8513 rc = 1;
8514 break;
8515 }
8516 }
8517
8518 /* Can not cleanly block async mailbox command, fails it */
8519 if (rc) {
8520 spin_lock_irq(&phba->hbalock);
8521 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8522 spin_unlock_irq(&phba->hbalock);
8523 }
8524 return rc;
8525}
8526
8527/**
8528 * lpfc_sli4_async_mbox_unblock - Block posting SLI4 async mailbox command
8529 * @phba: Pointer to HBA context object.
8530 *
8531 * The function unblocks and resume posting of SLI4 asynchronous mailbox
8532 * commands from the driver internal pending mailbox queue. It makes sure
8533 * that there is no outstanding mailbox command before resuming posting
8534 * asynchronous mailbox commands. If, for any reason, there is outstanding
8535 * mailbox command, it will try to wait it out before resuming asynchronous
8536 * mailbox command posting.
8537 **/
8538static void
8539lpfc_sli4_async_mbox_unblock(struct lpfc_hba *phba)
8540{
8541 struct lpfc_sli *psli = &phba->sli;
8542
8543 spin_lock_irq(&phba->hbalock);
8544 if (!(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8545 /* Asynchronous mailbox posting is not blocked, do nothing */
8546 spin_unlock_irq(&phba->hbalock);
8547 return;
8548 }
8549
8550 /* Outstanding synchronous mailbox command is guaranteed to be done,
8551 * successful or timeout, after timing-out the outstanding mailbox
8552 * command shall always be removed, so just unblock posting async
8553 * mailbox command and resume
8554 */
8555 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8556 spin_unlock_irq(&phba->hbalock);
8557
8558 /* wake up worker thread to post asynchronlous mailbox command */
8559 lpfc_worker_wake_up(phba);
8560}
8561
2d843edc
JS
8562/**
8563 * lpfc_sli4_wait_bmbx_ready - Wait for bootstrap mailbox register ready
8564 * @phba: Pointer to HBA context object.
8565 * @mboxq: Pointer to mailbox object.
8566 *
8567 * The function waits for the bootstrap mailbox register ready bit from
8568 * port for twice the regular mailbox command timeout value.
8569 *
8570 * 0 - no timeout on waiting for bootstrap mailbox register ready.
8571 * MBXERR_ERROR - wait for bootstrap mailbox register timed out.
8572 **/
8573static int
8574lpfc_sli4_wait_bmbx_ready(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8575{
8576 uint32_t db_ready;
8577 unsigned long timeout;
8578 struct lpfc_register bmbx_reg;
8579
8580 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, mboxq)
8581 * 1000) + jiffies;
8582
8583 do {
8584 bmbx_reg.word0 = readl(phba->sli4_hba.BMBXregaddr);
8585 db_ready = bf_get(lpfc_bmbx_rdy, &bmbx_reg);
8586 if (!db_ready)
e2ffe4d5 8587 mdelay(2);
2d843edc
JS
8588
8589 if (time_after(jiffies, timeout))
8590 return MBXERR_ERROR;
8591 } while (!db_ready);
8592
8593 return 0;
8594}
8595
da0436e9
JS
8596/**
8597 * lpfc_sli4_post_sync_mbox - Post an SLI4 mailbox to the bootstrap mailbox
8598 * @phba: Pointer to HBA context object.
8599 * @mboxq: Pointer to mailbox object.
8600 *
8601 * The function posts a mailbox to the port. The mailbox is expected
8602 * to be comletely filled in and ready for the port to operate on it.
8603 * This routine executes a synchronous completion operation on the
8604 * mailbox by polling for its completion.
8605 *
8606 * The caller must not be holding any locks when calling this routine.
8607 *
8608 * Returns:
8609 * MBX_SUCCESS - mailbox posted successfully
8610 * Any of the MBX error values.
8611 **/
8612static int
8613lpfc_sli4_post_sync_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8614{
8615 int rc = MBX_SUCCESS;
8616 unsigned long iflag;
da0436e9
JS
8617 uint32_t mcqe_status;
8618 uint32_t mbx_cmnd;
da0436e9
JS
8619 struct lpfc_sli *psli = &phba->sli;
8620 struct lpfc_mqe *mb = &mboxq->u.mqe;
8621 struct lpfc_bmbx_create *mbox_rgn;
8622 struct dma_address *dma_address;
da0436e9
JS
8623
8624 /*
8625 * Only one mailbox can be active to the bootstrap mailbox region
8626 * at a time and there is no queueing provided.
8627 */
8628 spin_lock_irqsave(&phba->hbalock, iflag);
8629 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8630 spin_unlock_irqrestore(&phba->hbalock, iflag);
8631 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8632 "(%d):2532 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8633 "cannot issue Data: x%x x%x\n",
8634 mboxq->vport ? mboxq->vport->vpi : 0,
8635 mboxq->u.mb.mbxCommand,
a183a15f
JS
8636 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8637 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8638 psli->sli_flag, MBX_POLL);
8639 return MBXERR_ERROR;
8640 }
8641 /* The server grabs the token and owns it until release */
8642 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8643 phba->sli.mbox_active = mboxq;
8644 spin_unlock_irqrestore(&phba->hbalock, iflag);
8645
2d843edc
JS
8646 /* wait for bootstrap mbox register for readyness */
8647 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8648 if (rc)
8649 goto exit;
da0436e9
JS
8650 /*
8651 * Initialize the bootstrap memory region to avoid stale data areas
8652 * in the mailbox post. Then copy the caller's mailbox contents to
8653 * the bmbx mailbox region.
8654 */
8655 mbx_cmnd = bf_get(lpfc_mqe_command, mb);
8656 memset(phba->sli4_hba.bmbx.avirt, 0, sizeof(struct lpfc_bmbx_create));
48f8fdb4
JS
8657 lpfc_sli4_pcimem_bcopy(mb, phba->sli4_hba.bmbx.avirt,
8658 sizeof(struct lpfc_mqe));
da0436e9
JS
8659
8660 /* Post the high mailbox dma address to the port and wait for ready. */
8661 dma_address = &phba->sli4_hba.bmbx.dma_address;
8662 writel(dma_address->addr_hi, phba->sli4_hba.BMBXregaddr);
8663
2d843edc
JS
8664 /* wait for bootstrap mbox register for hi-address write done */
8665 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8666 if (rc)
8667 goto exit;
da0436e9
JS
8668
8669 /* Post the low mailbox dma address to the port. */
8670 writel(dma_address->addr_lo, phba->sli4_hba.BMBXregaddr);
da0436e9 8671
2d843edc
JS
8672 /* wait for bootstrap mbox register for low address write done */
8673 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8674 if (rc)
8675 goto exit;
da0436e9
JS
8676
8677 /*
8678 * Read the CQ to ensure the mailbox has completed.
8679 * If so, update the mailbox status so that the upper layers
8680 * can complete the request normally.
8681 */
48f8fdb4
JS
8682 lpfc_sli4_pcimem_bcopy(phba->sli4_hba.bmbx.avirt, mb,
8683 sizeof(struct lpfc_mqe));
da0436e9 8684 mbox_rgn = (struct lpfc_bmbx_create *) phba->sli4_hba.bmbx.avirt;
48f8fdb4
JS
8685 lpfc_sli4_pcimem_bcopy(&mbox_rgn->mcqe, &mboxq->mcqe,
8686 sizeof(struct lpfc_mcqe));
da0436e9 8687 mcqe_status = bf_get(lpfc_mcqe_status, &mbox_rgn->mcqe);
0558056c
JS
8688 /*
8689 * When the CQE status indicates a failure and the mailbox status
8690 * indicates success then copy the CQE status into the mailbox status
8691 * (and prefix it with x4000).
8692 */
da0436e9 8693 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
0558056c
JS
8694 if (bf_get(lpfc_mqe_status, mb) == MBX_SUCCESS)
8695 bf_set(lpfc_mqe_status, mb,
8696 (LPFC_MBX_ERROR_RANGE | mcqe_status));
da0436e9 8697 rc = MBXERR_ERROR;
d7c47992
JS
8698 } else
8699 lpfc_sli4_swap_str(phba, mboxq);
da0436e9
JS
8700
8701 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8702 "(%d):0356 Mailbox cmd x%x (x%x/x%x) Status x%x "
da0436e9
JS
8703 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x"
8704 " x%x x%x CQ: x%x x%x x%x x%x\n",
a183a15f
JS
8705 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
8706 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8707 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8708 bf_get(lpfc_mqe_status, mb),
8709 mb->un.mb_words[0], mb->un.mb_words[1],
8710 mb->un.mb_words[2], mb->un.mb_words[3],
8711 mb->un.mb_words[4], mb->un.mb_words[5],
8712 mb->un.mb_words[6], mb->un.mb_words[7],
8713 mb->un.mb_words[8], mb->un.mb_words[9],
8714 mb->un.mb_words[10], mb->un.mb_words[11],
8715 mb->un.mb_words[12], mboxq->mcqe.word0,
8716 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
8717 mboxq->mcqe.trailer);
8718exit:
8719 /* We are holding the token, no needed for lock when release */
8720 spin_lock_irqsave(&phba->hbalock, iflag);
8721 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8722 phba->sli.mbox_active = NULL;
8723 spin_unlock_irqrestore(&phba->hbalock, iflag);
8724 return rc;
8725}
8726
8727/**
8728 * lpfc_sli_issue_mbox_s4 - Issue an SLI4 mailbox command to firmware
8729 * @phba: Pointer to HBA context object.
8730 * @pmbox: Pointer to mailbox object.
8731 * @flag: Flag indicating how the mailbox need to be processed.
8732 *
8733 * This function is called by discovery code and HBA management code to submit
8734 * a mailbox command to firmware with SLI-4 interface spec.
8735 *
8736 * Return codes the caller owns the mailbox command after the return of the
8737 * function.
8738 **/
8739static int
8740lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
8741 uint32_t flag)
8742{
8743 struct lpfc_sli *psli = &phba->sli;
8744 unsigned long iflags;
8745 int rc;
8746
b76f2dc9
JS
8747 /* dump from issue mailbox command if setup */
8748 lpfc_idiag_mbxacc_dump_issue_mbox(phba, &mboxq->u.mb);
8749
8fa38513
JS
8750 rc = lpfc_mbox_dev_check(phba);
8751 if (unlikely(rc)) {
8752 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8753 "(%d):2544 Mailbox command x%x (x%x/x%x) "
8fa38513
JS
8754 "cannot issue Data: x%x x%x\n",
8755 mboxq->vport ? mboxq->vport->vpi : 0,
8756 mboxq->u.mb.mbxCommand,
a183a15f
JS
8757 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8758 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
8fa38513
JS
8759 psli->sli_flag, flag);
8760 goto out_not_finished;
8761 }
8762
da0436e9
JS
8763 /* Detect polling mode and jump to a handler */
8764 if (!phba->sli4_hba.intr_enable) {
8765 if (flag == MBX_POLL)
8766 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8767 else
8768 rc = -EIO;
8769 if (rc != MBX_SUCCESS)
0558056c 8770 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
da0436e9 8771 "(%d):2541 Mailbox command x%x "
cc459f19
JS
8772 "(x%x/x%x) failure: "
8773 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8774 "Data: x%x x%x\n,",
da0436e9
JS
8775 mboxq->vport ? mboxq->vport->vpi : 0,
8776 mboxq->u.mb.mbxCommand,
a183a15f
JS
8777 lpfc_sli_config_mbox_subsys_get(phba,
8778 mboxq),
8779 lpfc_sli_config_mbox_opcode_get(phba,
8780 mboxq),
cc459f19
JS
8781 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8782 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8783 bf_get(lpfc_mcqe_ext_status,
8784 &mboxq->mcqe),
da0436e9
JS
8785 psli->sli_flag, flag);
8786 return rc;
8787 } else if (flag == MBX_POLL) {
f1126688
JS
8788 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
8789 "(%d):2542 Try to issue mailbox command "
7365f6fd 8790 "x%x (x%x/x%x) synchronously ahead of async "
f1126688 8791 "mailbox command queue: x%x x%x\n",
da0436e9
JS
8792 mboxq->vport ? mboxq->vport->vpi : 0,
8793 mboxq->u.mb.mbxCommand,
a183a15f
JS
8794 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8795 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9 8796 psli->sli_flag, flag);
f1126688
JS
8797 /* Try to block the asynchronous mailbox posting */
8798 rc = lpfc_sli4_async_mbox_block(phba);
8799 if (!rc) {
8800 /* Successfully blocked, now issue sync mbox cmd */
8801 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8802 if (rc != MBX_SUCCESS)
cc459f19 8803 lpfc_printf_log(phba, KERN_WARNING,
a183a15f 8804 LOG_MBOX | LOG_SLI,
cc459f19
JS
8805 "(%d):2597 Sync Mailbox command "
8806 "x%x (x%x/x%x) failure: "
8807 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8808 "Data: x%x x%x\n,",
8809 mboxq->vport ? mboxq->vport->vpi : 0,
a183a15f
JS
8810 mboxq->u.mb.mbxCommand,
8811 lpfc_sli_config_mbox_subsys_get(phba,
8812 mboxq),
8813 lpfc_sli_config_mbox_opcode_get(phba,
8814 mboxq),
cc459f19
JS
8815 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8816 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8817 bf_get(lpfc_mcqe_ext_status,
8818 &mboxq->mcqe),
a183a15f 8819 psli->sli_flag, flag);
f1126688
JS
8820 /* Unblock the async mailbox posting afterward */
8821 lpfc_sli4_async_mbox_unblock(phba);
8822 }
8823 return rc;
da0436e9
JS
8824 }
8825
8826 /* Now, interrupt mode asynchrous mailbox command */
8827 rc = lpfc_mbox_cmd_check(phba, mboxq);
8828 if (rc) {
8829 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8830 "(%d):2543 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8831 "cannot issue Data: x%x x%x\n",
8832 mboxq->vport ? mboxq->vport->vpi : 0,
8833 mboxq->u.mb.mbxCommand,
a183a15f
JS
8834 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8835 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8836 psli->sli_flag, flag);
8837 goto out_not_finished;
8838 }
da0436e9
JS
8839
8840 /* Put the mailbox command to the driver internal FIFO */
8841 psli->slistat.mbox_busy++;
8842 spin_lock_irqsave(&phba->hbalock, iflags);
8843 lpfc_mbox_put(phba, mboxq);
8844 spin_unlock_irqrestore(&phba->hbalock, iflags);
8845 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
8846 "(%d):0354 Mbox cmd issue - Enqueue Data: "
a183a15f 8847 "x%x (x%x/x%x) x%x x%x x%x\n",
da0436e9
JS
8848 mboxq->vport ? mboxq->vport->vpi : 0xffffff,
8849 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
a183a15f
JS
8850 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8851 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8852 phba->pport->port_state,
8853 psli->sli_flag, MBX_NOWAIT);
8854 /* Wake up worker thread to transport mailbox command from head */
8855 lpfc_worker_wake_up(phba);
8856
8857 return MBX_BUSY;
8858
8859out_not_finished:
8860 return MBX_NOT_FINISHED;
8861}
8862
8863/**
8864 * lpfc_sli4_post_async_mbox - Post an SLI4 mailbox command to device
8865 * @phba: Pointer to HBA context object.
8866 *
8867 * This function is called by worker thread to send a mailbox command to
8868 * SLI4 HBA firmware.
8869 *
8870 **/
8871int
8872lpfc_sli4_post_async_mbox(struct lpfc_hba *phba)
8873{
8874 struct lpfc_sli *psli = &phba->sli;
8875 LPFC_MBOXQ_t *mboxq;
8876 int rc = MBX_SUCCESS;
8877 unsigned long iflags;
8878 struct lpfc_mqe *mqe;
8879 uint32_t mbx_cmnd;
8880
8881 /* Check interrupt mode before post async mailbox command */
8882 if (unlikely(!phba->sli4_hba.intr_enable))
8883 return MBX_NOT_FINISHED;
8884
8885 /* Check for mailbox command service token */
8886 spin_lock_irqsave(&phba->hbalock, iflags);
8887 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8888 spin_unlock_irqrestore(&phba->hbalock, iflags);
8889 return MBX_NOT_FINISHED;
8890 }
8891 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8892 spin_unlock_irqrestore(&phba->hbalock, iflags);
8893 return MBX_NOT_FINISHED;
8894 }
8895 if (unlikely(phba->sli.mbox_active)) {
8896 spin_unlock_irqrestore(&phba->hbalock, iflags);
8897 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8898 "0384 There is pending active mailbox cmd\n");
8899 return MBX_NOT_FINISHED;
8900 }
8901 /* Take the mailbox command service token */
8902 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8903
8904 /* Get the next mailbox command from head of queue */
8905 mboxq = lpfc_mbox_get(phba);
8906
8907 /* If no more mailbox command waiting for post, we're done */
8908 if (!mboxq) {
8909 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8910 spin_unlock_irqrestore(&phba->hbalock, iflags);
8911 return MBX_SUCCESS;
8912 }
8913 phba->sli.mbox_active = mboxq;
8914 spin_unlock_irqrestore(&phba->hbalock, iflags);
8915
8916 /* Check device readiness for posting mailbox command */
8917 rc = lpfc_mbox_dev_check(phba);
8918 if (unlikely(rc))
8919 /* Driver clean routine will clean up pending mailbox */
8920 goto out_not_finished;
8921
8922 /* Prepare the mbox command to be posted */
8923 mqe = &mboxq->u.mqe;
8924 mbx_cmnd = bf_get(lpfc_mqe_command, mqe);
8925
8926 /* Start timer for the mbox_tmo and log some mailbox post messages */
8927 mod_timer(&psli->mbox_tmo, (jiffies +
256ec0d0 8928 msecs_to_jiffies(1000 * lpfc_mbox_tmo_val(phba, mboxq))));
da0436e9
JS
8929
8930 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8931 "(%d):0355 Mailbox cmd x%x (x%x/x%x) issue Data: "
da0436e9
JS
8932 "x%x x%x\n",
8933 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
a183a15f
JS
8934 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8935 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8936 phba->pport->port_state, psli->sli_flag);
8937
8938 if (mbx_cmnd != MBX_HEARTBEAT) {
8939 if (mboxq->vport) {
8940 lpfc_debugfs_disc_trc(mboxq->vport,
8941 LPFC_DISC_TRC_MBOX_VPORT,
8942 "MBOX Send vport: cmd:x%x mb:x%x x%x",
8943 mbx_cmnd, mqe->un.mb_words[0],
8944 mqe->un.mb_words[1]);
8945 } else {
8946 lpfc_debugfs_disc_trc(phba->pport,
8947 LPFC_DISC_TRC_MBOX,
8948 "MBOX Send: cmd:x%x mb:x%x x%x",
8949 mbx_cmnd, mqe->un.mb_words[0],
8950 mqe->un.mb_words[1]);
8951 }
8952 }
8953 psli->slistat.mbox_cmd++;
8954
8955 /* Post the mailbox command to the port */
8956 rc = lpfc_sli4_mq_put(phba->sli4_hba.mbx_wq, mqe);
8957 if (rc != MBX_SUCCESS) {
8958 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8959 "(%d):2533 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8960 "cannot issue Data: x%x x%x\n",
8961 mboxq->vport ? mboxq->vport->vpi : 0,
8962 mboxq->u.mb.mbxCommand,
a183a15f
JS
8963 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8964 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8965 psli->sli_flag, MBX_NOWAIT);
8966 goto out_not_finished;
8967 }
8968
8969 return rc;
8970
8971out_not_finished:
8972 spin_lock_irqsave(&phba->hbalock, iflags);
d7069f09
JS
8973 if (phba->sli.mbox_active) {
8974 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
8975 __lpfc_mbox_cmpl_put(phba, mboxq);
8976 /* Release the token */
8977 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8978 phba->sli.mbox_active = NULL;
8979 }
da0436e9
JS
8980 spin_unlock_irqrestore(&phba->hbalock, iflags);
8981
8982 return MBX_NOT_FINISHED;
8983}
8984
8985/**
8986 * lpfc_sli_issue_mbox - Wrapper func for issuing mailbox command
8987 * @phba: Pointer to HBA context object.
8988 * @pmbox: Pointer to mailbox object.
8989 * @flag: Flag indicating how the mailbox need to be processed.
8990 *
8991 * This routine wraps the actual SLI3 or SLI4 mailbox issuing routine from
8992 * the API jump table function pointer from the lpfc_hba struct.
8993 *
8994 * Return codes the caller owns the mailbox command after the return of the
8995 * function.
8996 **/
8997int
8998lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
8999{
9000 return phba->lpfc_sli_issue_mbox(phba, pmbox, flag);
9001}
9002
9003/**
25985edc 9004 * lpfc_mbox_api_table_setup - Set up mbox api function jump table
da0436e9
JS
9005 * @phba: The hba struct for which this call is being executed.
9006 * @dev_grp: The HBA PCI-Device group number.
9007 *
9008 * This routine sets up the mbox interface API function jump table in @phba
9009 * struct.
9010 * Returns: 0 - success, -ENODEV - failure.
9011 **/
9012int
9013lpfc_mbox_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
9014{
9015
9016 switch (dev_grp) {
9017 case LPFC_PCI_DEV_LP:
9018 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s3;
9019 phba->lpfc_sli_handle_slow_ring_event =
9020 lpfc_sli_handle_slow_ring_event_s3;
9021 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s3;
9022 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s3;
9023 phba->lpfc_sli_brdready = lpfc_sli_brdready_s3;
9024 break;
9025 case LPFC_PCI_DEV_OC:
9026 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s4;
9027 phba->lpfc_sli_handle_slow_ring_event =
9028 lpfc_sli_handle_slow_ring_event_s4;
9029 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s4;
9030 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s4;
9031 phba->lpfc_sli_brdready = lpfc_sli_brdready_s4;
9032 break;
9033 default:
9034 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9035 "1420 Invalid HBA PCI-device group: 0x%x\n",
9036 dev_grp);
9037 return -ENODEV;
9038 break;
9039 }
9040 return 0;
9041}
9042
e59058c4 9043/**
3621a710 9044 * __lpfc_sli_ringtx_put - Add an iocb to the txq
e59058c4
JS
9045 * @phba: Pointer to HBA context object.
9046 * @pring: Pointer to driver SLI ring object.
9047 * @piocb: Pointer to address of newly added command iocb.
9048 *
27f3efd6
JS
9049 * This function is called with hbalock held for SLI3 ports or
9050 * the ring lock held for SLI4 ports to add a command
e59058c4
JS
9051 * iocb to the txq when SLI layer cannot submit the command iocb
9052 * to the ring.
9053 **/
2a9bf3d0 9054void
92d7f7b0 9055__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 9056 struct lpfc_iocbq *piocb)
dea3101e 9057{
27f3efd6
JS
9058 if (phba->sli_rev == LPFC_SLI_REV4)
9059 lockdep_assert_held(&pring->ring_lock);
9060 else
9061 lockdep_assert_held(&phba->hbalock);
dea3101e
JB
9062 /* Insert the caller's iocb in the txq tail for later processing. */
9063 list_add_tail(&piocb->list, &pring->txq);
dea3101e
JB
9064}
9065
e59058c4 9066/**
3621a710 9067 * lpfc_sli_next_iocb - Get the next iocb in the txq
e59058c4
JS
9068 * @phba: Pointer to HBA context object.
9069 * @pring: Pointer to driver SLI ring object.
9070 * @piocb: Pointer to address of newly added command iocb.
9071 *
9072 * This function is called with hbalock held before a new
9073 * iocb is submitted to the firmware. This function checks
9074 * txq to flush the iocbs in txq to Firmware before
9075 * submitting new iocbs to the Firmware.
9076 * If there are iocbs in the txq which need to be submitted
9077 * to firmware, lpfc_sli_next_iocb returns the first element
9078 * of the txq after dequeuing it from txq.
9079 * If there is no iocb in the txq then the function will return
9080 * *piocb and *piocb is set to NULL. Caller needs to check
9081 * *piocb to find if there are more commands in the txq.
9082 **/
dea3101e
JB
9083static struct lpfc_iocbq *
9084lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 9085 struct lpfc_iocbq **piocb)
dea3101e
JB
9086{
9087 struct lpfc_iocbq * nextiocb;
9088
1c2ba475
JT
9089 lockdep_assert_held(&phba->hbalock);
9090
dea3101e
JB
9091 nextiocb = lpfc_sli_ringtx_get(phba, pring);
9092 if (!nextiocb) {
9093 nextiocb = *piocb;
9094 *piocb = NULL;
9095 }
9096
9097 return nextiocb;
9098}
9099
e59058c4 9100/**
3772a991 9101 * __lpfc_sli_issue_iocb_s3 - SLI3 device lockless ver of lpfc_sli_issue_iocb
e59058c4 9102 * @phba: Pointer to HBA context object.
3772a991 9103 * @ring_number: SLI ring number to issue iocb on.
e59058c4
JS
9104 * @piocb: Pointer to command iocb.
9105 * @flag: Flag indicating if this command can be put into txq.
9106 *
3772a991
JS
9107 * __lpfc_sli_issue_iocb_s3 is used by other functions in the driver to issue
9108 * an iocb command to an HBA with SLI-3 interface spec. If the PCI slot is
9109 * recovering from error state, if HBA is resetting or if LPFC_STOP_IOCB_EVENT
9110 * flag is turned on, the function returns IOCB_ERROR. When the link is down,
9111 * this function allows only iocbs for posting buffers. This function finds
9112 * next available slot in the command ring and posts the command to the
9113 * available slot and writes the port attention register to request HBA start
9114 * processing new iocb. If there is no slot available in the ring and
9115 * flag & SLI_IOCB_RET_IOCB is set, the new iocb is added to the txq, otherwise
9116 * the function returns IOCB_BUSY.
e59058c4 9117 *
3772a991
JS
9118 * This function is called with hbalock held. The function will return success
9119 * after it successfully submit the iocb to firmware or after adding to the
9120 * txq.
e59058c4 9121 **/
98c9ea5c 9122static int
3772a991 9123__lpfc_sli_issue_iocb_s3(struct lpfc_hba *phba, uint32_t ring_number,
dea3101e
JB
9124 struct lpfc_iocbq *piocb, uint32_t flag)
9125{
9126 struct lpfc_iocbq *nextiocb;
9127 IOCB_t *iocb;
895427bd 9128 struct lpfc_sli_ring *pring = &phba->sli.sli3_ring[ring_number];
dea3101e 9129
1c2ba475
JT
9130 lockdep_assert_held(&phba->hbalock);
9131
92d7f7b0
JS
9132 if (piocb->iocb_cmpl && (!piocb->vport) &&
9133 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
9134 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
9135 lpfc_printf_log(phba, KERN_ERR,
9136 LOG_SLI | LOG_VPORT,
e8b62011 9137 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS
9138 piocb->iocb.ulpCommand);
9139 dump_stack();
9140 return IOCB_ERROR;
9141 }
9142
9143
8d63f375
LV
9144 /* If the PCI channel is in offline state, do not post iocbs. */
9145 if (unlikely(pci_channel_offline(phba->pcidev)))
9146 return IOCB_ERROR;
9147
a257bf90
JS
9148 /* If HBA has a deferred error attention, fail the iocb. */
9149 if (unlikely(phba->hba_flag & DEFER_ERATT))
9150 return IOCB_ERROR;
9151
dea3101e
JB
9152 /*
9153 * We should never get an IOCB if we are in a < LINK_DOWN state
9154 */
2e0fef85 9155 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB
9156 return IOCB_ERROR;
9157
9158 /*
9159 * Check to see if we are blocking IOCB processing because of a
0b727fea 9160 * outstanding event.
dea3101e 9161 */
0b727fea 9162 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e
JB
9163 goto iocb_busy;
9164
2e0fef85 9165 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 9166 /*
2680eeaa 9167 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB
9168 * can be issued if the link is not up.
9169 */
9170 switch (piocb->iocb.ulpCommand) {
84774a4d
JS
9171 case CMD_GEN_REQUEST64_CR:
9172 case CMD_GEN_REQUEST64_CX:
9173 if (!(phba->sli.sli_flag & LPFC_MENLO_MAINT) ||
9174 (piocb->iocb.un.genreq64.w5.hcsw.Rctl !=
6a9c52cf 9175 FC_RCTL_DD_UNSOL_CMD) ||
84774a4d
JS
9176 (piocb->iocb.un.genreq64.w5.hcsw.Type !=
9177 MENLO_TRANSPORT_TYPE))
9178
9179 goto iocb_busy;
9180 break;
dea3101e
JB
9181 case CMD_QUE_RING_BUF_CN:
9182 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB
9183 /*
9184 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
9185 * completion, iocb_cmpl MUST be 0.
9186 */
9187 if (piocb->iocb_cmpl)
9188 piocb->iocb_cmpl = NULL;
9189 /*FALLTHROUGH*/
9190 case CMD_CREATE_XRI_CR:
2680eeaa
JS
9191 case CMD_CLOSE_XRI_CN:
9192 case CMD_CLOSE_XRI_CX:
dea3101e
JB
9193 break;
9194 default:
9195 goto iocb_busy;
9196 }
9197
9198 /*
9199 * For FCP commands, we must be in a state where we can process link
9200 * attention events.
9201 */
895427bd 9202 } else if (unlikely(pring->ringno == LPFC_FCP_RING &&
92d7f7b0 9203 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 9204 goto iocb_busy;
92d7f7b0 9205 }
dea3101e 9206
dea3101e
JB
9207 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
9208 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
9209 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
9210
9211 if (iocb)
9212 lpfc_sli_update_ring(phba, pring);
9213 else
9214 lpfc_sli_update_full_ring(phba, pring);
9215
9216 if (!piocb)
9217 return IOCB_SUCCESS;
9218
9219 goto out_busy;
9220
9221 iocb_busy:
9222 pring->stats.iocb_cmd_delay++;
9223
9224 out_busy:
9225
9226 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 9227 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB
9228 return IOCB_SUCCESS;
9229 }
9230
9231 return IOCB_BUSY;
9232}
9233
3772a991 9234/**
4f774513
JS
9235 * lpfc_sli4_bpl2sgl - Convert the bpl/bde to a sgl.
9236 * @phba: Pointer to HBA context object.
9237 * @piocb: Pointer to command iocb.
9238 * @sglq: Pointer to the scatter gather queue object.
9239 *
9240 * This routine converts the bpl or bde that is in the IOCB
9241 * to a sgl list for the sli4 hardware. The physical address
9242 * of the bpl/bde is converted back to a virtual address.
9243 * If the IOCB contains a BPL then the list of BDE's is
9244 * converted to sli4_sge's. If the IOCB contains a single
9245 * BDE then it is converted to a single sli_sge.
9246 * The IOCB is still in cpu endianess so the contents of
9247 * the bpl can be used without byte swapping.
9248 *
9249 * Returns valid XRI = Success, NO_XRI = Failure.
9250**/
9251static uint16_t
9252lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
9253 struct lpfc_sglq *sglq)
3772a991 9254{
4f774513
JS
9255 uint16_t xritag = NO_XRI;
9256 struct ulp_bde64 *bpl = NULL;
9257 struct ulp_bde64 bde;
9258 struct sli4_sge *sgl = NULL;
1b51197d 9259 struct lpfc_dmabuf *dmabuf;
4f774513
JS
9260 IOCB_t *icmd;
9261 int numBdes = 0;
9262 int i = 0;
63e801ce
JS
9263 uint32_t offset = 0; /* accumulated offset in the sg request list */
9264 int inbound = 0; /* number of sg reply entries inbound from firmware */
3772a991 9265
4f774513
JS
9266 if (!piocbq || !sglq)
9267 return xritag;
9268
9269 sgl = (struct sli4_sge *)sglq->sgl;
9270 icmd = &piocbq->iocb;
6b5151fd
JS
9271 if (icmd->ulpCommand == CMD_XMIT_BLS_RSP64_CX)
9272 return sglq->sli4_xritag;
4f774513
JS
9273 if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
9274 numBdes = icmd->un.genreq64.bdl.bdeSize /
9275 sizeof(struct ulp_bde64);
9276 /* The addrHigh and addrLow fields within the IOCB
9277 * have not been byteswapped yet so there is no
9278 * need to swap them back.
9279 */
1b51197d
JS
9280 if (piocbq->context3)
9281 dmabuf = (struct lpfc_dmabuf *)piocbq->context3;
9282 else
9283 return xritag;
4f774513 9284
1b51197d 9285 bpl = (struct ulp_bde64 *)dmabuf->virt;
4f774513
JS
9286 if (!bpl)
9287 return xritag;
9288
9289 for (i = 0; i < numBdes; i++) {
9290 /* Should already be byte swapped. */
28baac74
JS
9291 sgl->addr_hi = bpl->addrHigh;
9292 sgl->addr_lo = bpl->addrLow;
9293
0558056c 9294 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9295 if ((i+1) == numBdes)
9296 bf_set(lpfc_sli4_sge_last, sgl, 1);
9297 else
9298 bf_set(lpfc_sli4_sge_last, sgl, 0);
28baac74
JS
9299 /* swap the size field back to the cpu so we
9300 * can assign it to the sgl.
9301 */
9302 bde.tus.w = le32_to_cpu(bpl->tus.w);
9303 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
63e801ce
JS
9304 /* The offsets in the sgl need to be accumulated
9305 * separately for the request and reply lists.
9306 * The request is always first, the reply follows.
9307 */
9308 if (piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) {
9309 /* add up the reply sg entries */
9310 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
9311 inbound++;
9312 /* first inbound? reset the offset */
9313 if (inbound == 1)
9314 offset = 0;
9315 bf_set(lpfc_sli4_sge_offset, sgl, offset);
f9bb2da1
JS
9316 bf_set(lpfc_sli4_sge_type, sgl,
9317 LPFC_SGE_TYPE_DATA);
63e801ce
JS
9318 offset += bde.tus.f.bdeSize;
9319 }
546fc854 9320 sgl->word2 = cpu_to_le32(sgl->word2);
4f774513
JS
9321 bpl++;
9322 sgl++;
9323 }
9324 } else if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BDE_64) {
9325 /* The addrHigh and addrLow fields of the BDE have not
9326 * been byteswapped yet so they need to be swapped
9327 * before putting them in the sgl.
9328 */
9329 sgl->addr_hi =
9330 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh);
9331 sgl->addr_lo =
9332 cpu_to_le32(icmd->un.genreq64.bdl.addrLow);
0558056c 9333 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9334 bf_set(lpfc_sli4_sge_last, sgl, 1);
9335 sgl->word2 = cpu_to_le32(sgl->word2);
28baac74
JS
9336 sgl->sge_len =
9337 cpu_to_le32(icmd->un.genreq64.bdl.bdeSize);
4f774513
JS
9338 }
9339 return sglq->sli4_xritag;
3772a991 9340}
92d7f7b0 9341
e59058c4 9342/**
4f774513 9343 * lpfc_sli_iocb2wqe - Convert the IOCB to a work queue entry.
e59058c4 9344 * @phba: Pointer to HBA context object.
4f774513
JS
9345 * @piocb: Pointer to command iocb.
9346 * @wqe: Pointer to the work queue entry.
e59058c4 9347 *
4f774513
JS
9348 * This routine converts the iocb command to its Work Queue Entry
9349 * equivalent. The wqe pointer should not have any fields set when
9350 * this routine is called because it will memcpy over them.
9351 * This routine does not set the CQ_ID or the WQEC bits in the
9352 * wqe.
e59058c4 9353 *
4f774513 9354 * Returns: 0 = Success, IOCB_ERROR = Failure.
e59058c4 9355 **/
cf5bf97e 9356static int
4f774513 9357lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
205e8240 9358 union lpfc_wqe128 *wqe)
cf5bf97e 9359{
5ffc266e 9360 uint32_t xmit_len = 0, total_len = 0;
4f774513
JS
9361 uint8_t ct = 0;
9362 uint32_t fip;
9363 uint32_t abort_tag;
9364 uint8_t command_type = ELS_COMMAND_NON_FIP;
9365 uint8_t cmnd;
9366 uint16_t xritag;
dcf2a4e0
JS
9367 uint16_t abrt_iotag;
9368 struct lpfc_iocbq *abrtiocbq;
4f774513 9369 struct ulp_bde64 *bpl = NULL;
f0d9bccc 9370 uint32_t els_id = LPFC_ELS_ID_DEFAULT;
5ffc266e
JS
9371 int numBdes, i;
9372 struct ulp_bde64 bde;
c31098ce 9373 struct lpfc_nodelist *ndlp;
ff78d8f9 9374 uint32_t *pcmd;
1b51197d 9375 uint32_t if_type;
4f774513 9376
45ed1190 9377 fip = phba->hba_flag & HBA_FIP_SUPPORT;
4f774513 9378 /* The fcp commands will set command type */
0c287589 9379 if (iocbq->iocb_flag & LPFC_IO_FCP)
4f774513 9380 command_type = FCP_COMMAND;
c868595d 9381 else if (fip && (iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK))
0c287589
JS
9382 command_type = ELS_COMMAND_FIP;
9383 else
9384 command_type = ELS_COMMAND_NON_FIP;
9385
b5c53958
JS
9386 if (phba->fcp_embed_io)
9387 memset(wqe, 0, sizeof(union lpfc_wqe128));
4f774513
JS
9388 /* Some of the fields are in the right position already */
9389 memcpy(wqe, &iocbq->iocb, sizeof(union lpfc_wqe));
e62245d9
JS
9390 /* The ct field has moved so reset */
9391 wqe->generic.wqe_com.word7 = 0;
9392 wqe->generic.wqe_com.word10 = 0;
b5c53958
JS
9393
9394 abort_tag = (uint32_t) iocbq->iotag;
9395 xritag = iocbq->sli4_xritag;
4f774513
JS
9396 /* words0-2 bpl convert bde */
9397 if (iocbq->iocb.un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
5ffc266e
JS
9398 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9399 sizeof(struct ulp_bde64);
4f774513
JS
9400 bpl = (struct ulp_bde64 *)
9401 ((struct lpfc_dmabuf *)iocbq->context3)->virt;
9402 if (!bpl)
9403 return IOCB_ERROR;
cf5bf97e 9404
4f774513
JS
9405 /* Should already be byte swapped. */
9406 wqe->generic.bde.addrHigh = le32_to_cpu(bpl->addrHigh);
9407 wqe->generic.bde.addrLow = le32_to_cpu(bpl->addrLow);
9408 /* swap the size field back to the cpu so we
9409 * can assign it to the sgl.
9410 */
9411 wqe->generic.bde.tus.w = le32_to_cpu(bpl->tus.w);
5ffc266e
JS
9412 xmit_len = wqe->generic.bde.tus.f.bdeSize;
9413 total_len = 0;
9414 for (i = 0; i < numBdes; i++) {
9415 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
9416 total_len += bde.tus.f.bdeSize;
9417 }
4f774513 9418 } else
5ffc266e 9419 xmit_len = iocbq->iocb.un.fcpi64.bdl.bdeSize;
cf5bf97e 9420
4f774513
JS
9421 iocbq->iocb.ulpIoTag = iocbq->iotag;
9422 cmnd = iocbq->iocb.ulpCommand;
a4bc3379 9423
4f774513
JS
9424 switch (iocbq->iocb.ulpCommand) {
9425 case CMD_ELS_REQUEST64_CR:
93d1379e
JS
9426 if (iocbq->iocb_flag & LPFC_IO_LIBDFC)
9427 ndlp = iocbq->context_un.ndlp;
9428 else
9429 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513
JS
9430 if (!iocbq->iocb.ulpLe) {
9431 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9432 "2007 Only Limited Edition cmd Format"
9433 " supported 0x%x\n",
9434 iocbq->iocb.ulpCommand);
9435 return IOCB_ERROR;
9436 }
ff78d8f9 9437
5ffc266e 9438 wqe->els_req.payload_len = xmit_len;
4f774513
JS
9439 /* Els_reguest64 has a TMO */
9440 bf_set(wqe_tmo, &wqe->els_req.wqe_com,
9441 iocbq->iocb.ulpTimeout);
9442 /* Need a VF for word 4 set the vf bit*/
9443 bf_set(els_req64_vf, &wqe->els_req, 0);
9444 /* And a VFID for word 12 */
9445 bf_set(els_req64_vfid, &wqe->els_req, 0);
4f774513 9446 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
f0d9bccc
JS
9447 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9448 iocbq->iocb.ulpContext);
9449 bf_set(wqe_ct, &wqe->els_req.wqe_com, ct);
9450 bf_set(wqe_pu, &wqe->els_req.wqe_com, 0);
4f774513 9451 /* CCP CCPE PV PRI in word10 were set in the memcpy */
ff78d8f9 9452 if (command_type == ELS_COMMAND_FIP)
c868595d
JS
9453 els_id = ((iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK)
9454 >> LPFC_FIP_ELS_ID_SHIFT);
ff78d8f9
JS
9455 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9456 iocbq->context2)->virt);
1b51197d
JS
9457 if_type = bf_get(lpfc_sli_intf_if_type,
9458 &phba->sli4_hba.sli_intf);
27d6ac0a 9459 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
ff78d8f9 9460 if (pcmd && (*pcmd == ELS_CMD_FLOGI ||
cb69f7de 9461 *pcmd == ELS_CMD_SCR ||
f60cb93b 9462 *pcmd == ELS_CMD_RSCN_XMT ||
6b5151fd 9463 *pcmd == ELS_CMD_FDISC ||
bdcd2b92 9464 *pcmd == ELS_CMD_LOGO ||
ff78d8f9
JS
9465 *pcmd == ELS_CMD_PLOGI)) {
9466 bf_set(els_req64_sp, &wqe->els_req, 1);
9467 bf_set(els_req64_sid, &wqe->els_req,
9468 iocbq->vport->fc_myDID);
939723a4
JS
9469 if ((*pcmd == ELS_CMD_FLOGI) &&
9470 !(phba->fc_topology ==
9471 LPFC_TOPOLOGY_LOOP))
9472 bf_set(els_req64_sid, &wqe->els_req, 0);
ff78d8f9
JS
9473 bf_set(wqe_ct, &wqe->els_req.wqe_com, 1);
9474 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
a7dd9c0f 9475 phba->vpi_ids[iocbq->vport->vpi]);
3ef6d24c 9476 } else if (pcmd && iocbq->context1) {
ff78d8f9
JS
9477 bf_set(wqe_ct, &wqe->els_req.wqe_com, 0);
9478 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9479 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
9480 }
c868595d 9481 }
6d368e53
JS
9482 bf_set(wqe_temp_rpi, &wqe->els_req.wqe_com,
9483 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
f0d9bccc
JS
9484 bf_set(wqe_els_id, &wqe->els_req.wqe_com, els_id);
9485 bf_set(wqe_dbde, &wqe->els_req.wqe_com, 1);
9486 bf_set(wqe_iod, &wqe->els_req.wqe_com, LPFC_WQE_IOD_READ);
9487 bf_set(wqe_qosd, &wqe->els_req.wqe_com, 1);
9488 bf_set(wqe_lenloc, &wqe->els_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9489 bf_set(wqe_ebde_cnt, &wqe->els_req.wqe_com, 0);
af22741c 9490 wqe->els_req.max_response_payload_len = total_len - xmit_len;
7851fe2c 9491 break;
5ffc266e 9492 case CMD_XMIT_SEQUENCE64_CX:
f0d9bccc
JS
9493 bf_set(wqe_ctxt_tag, &wqe->xmit_sequence.wqe_com,
9494 iocbq->iocb.un.ulpWord[3]);
9495 bf_set(wqe_rcvoxid, &wqe->xmit_sequence.wqe_com,
7851fe2c 9496 iocbq->iocb.unsli3.rcvsli3.ox_id);
5ffc266e
JS
9497 /* The entire sequence is transmitted for this IOCB */
9498 xmit_len = total_len;
9499 cmnd = CMD_XMIT_SEQUENCE64_CR;
1b51197d
JS
9500 if (phba->link_flag & LS_LOOPBACK_MODE)
9501 bf_set(wqe_xo, &wqe->xmit_sequence.wge_ctl, 1);
5bd5f66c 9502 /* fall through */
4f774513 9503 case CMD_XMIT_SEQUENCE64_CR:
f0d9bccc
JS
9504 /* word3 iocb=io_tag32 wqe=reserved */
9505 wqe->xmit_sequence.rsvd3 = 0;
4f774513
JS
9506 /* word4 relative_offset memcpy */
9507 /* word5 r_ctl/df_ctl memcpy */
f0d9bccc
JS
9508 bf_set(wqe_pu, &wqe->xmit_sequence.wqe_com, 0);
9509 bf_set(wqe_dbde, &wqe->xmit_sequence.wqe_com, 1);
9510 bf_set(wqe_iod, &wqe->xmit_sequence.wqe_com,
9511 LPFC_WQE_IOD_WRITE);
9512 bf_set(wqe_lenloc, &wqe->xmit_sequence.wqe_com,
9513 LPFC_WQE_LENLOC_WORD12);
9514 bf_set(wqe_ebde_cnt, &wqe->xmit_sequence.wqe_com, 0);
5ffc266e
JS
9515 wqe->xmit_sequence.xmit_len = xmit_len;
9516 command_type = OTHER_COMMAND;
7851fe2c 9517 break;
4f774513 9518 case CMD_XMIT_BCAST64_CN:
f0d9bccc
JS
9519 /* word3 iocb=iotag32 wqe=seq_payload_len */
9520 wqe->xmit_bcast64.seq_payload_len = xmit_len;
4f774513
JS
9521 /* word4 iocb=rsvd wqe=rsvd */
9522 /* word5 iocb=rctl/type/df_ctl wqe=rctl/type/df_ctl memcpy */
9523 /* word6 iocb=ctxt_tag/io_tag wqe=ctxt_tag/xri */
f0d9bccc 9524 bf_set(wqe_ct, &wqe->xmit_bcast64.wqe_com,
4f774513 9525 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
f0d9bccc
JS
9526 bf_set(wqe_dbde, &wqe->xmit_bcast64.wqe_com, 1);
9527 bf_set(wqe_iod, &wqe->xmit_bcast64.wqe_com, LPFC_WQE_IOD_WRITE);
9528 bf_set(wqe_lenloc, &wqe->xmit_bcast64.wqe_com,
9529 LPFC_WQE_LENLOC_WORD3);
9530 bf_set(wqe_ebde_cnt, &wqe->xmit_bcast64.wqe_com, 0);
7851fe2c 9531 break;
4f774513
JS
9532 case CMD_FCP_IWRITE64_CR:
9533 command_type = FCP_COMMAND_DATA_OUT;
f0d9bccc
JS
9534 /* word3 iocb=iotag wqe=payload_offset_len */
9535 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9536 bf_set(payload_offset_len, &wqe->fcp_iwrite,
9537 xmit_len + sizeof(struct fcp_rsp));
9538 bf_set(cmd_buff_len, &wqe->fcp_iwrite,
9539 0);
f0d9bccc
JS
9540 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9541 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9542 bf_set(wqe_erp, &wqe->fcp_iwrite.wqe_com,
9543 iocbq->iocb.ulpFCP2Rcvy);
9544 bf_set(wqe_lnk, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpXS);
9545 /* Always open the exchange */
f0d9bccc
JS
9546 bf_set(wqe_iod, &wqe->fcp_iwrite.wqe_com, LPFC_WQE_IOD_WRITE);
9547 bf_set(wqe_lenloc, &wqe->fcp_iwrite.wqe_com,
9548 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9549 bf_set(wqe_pu, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9550 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 1);
1ba981fd
JS
9551 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9552 bf_set(wqe_oas, &wqe->fcp_iwrite.wqe_com, 1);
c92c841c
JS
9553 bf_set(wqe_ccpe, &wqe->fcp_iwrite.wqe_com, 1);
9554 if (iocbq->priority) {
9555 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9556 (iocbq->priority << 1));
9557 } else {
1ba981fd
JS
9558 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9559 (phba->cfg_XLanePriority << 1));
9560 }
9561 }
b5c53958
JS
9562 /* Note, word 10 is already initialized to 0 */
9563
414abe0a
JS
9564 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9565 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9566 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 1);
9567 else
9568 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 0);
9569
b5c53958 9570 if (phba->fcp_embed_io) {
c490850a 9571 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9572 struct sli4_sge *sgl;
b5c53958
JS
9573 struct fcp_cmnd *fcp_cmnd;
9574 uint32_t *ptr;
9575
9576 /* 128 byte wqe support here */
b5c53958
JS
9577
9578 lpfc_cmd = iocbq->context1;
0794d601 9579 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9580 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9581
9582 /* Word 0-2 - FCP_CMND */
205e8240 9583 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9584 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9585 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9586 wqe->generic.bde.addrHigh = 0;
9587 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9588
205e8240
JS
9589 bf_set(wqe_wqes, &wqe->fcp_iwrite.wqe_com, 1);
9590 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 0);
b5c53958
JS
9591
9592 /* Word 22-29 FCP CMND Payload */
205e8240 9593 ptr = &wqe->words[22];
b5c53958
JS
9594 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9595 }
7851fe2c 9596 break;
4f774513 9597 case CMD_FCP_IREAD64_CR:
f0d9bccc
JS
9598 /* word3 iocb=iotag wqe=payload_offset_len */
9599 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9600 bf_set(payload_offset_len, &wqe->fcp_iread,
9601 xmit_len + sizeof(struct fcp_rsp));
9602 bf_set(cmd_buff_len, &wqe->fcp_iread,
9603 0);
f0d9bccc
JS
9604 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9605 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9606 bf_set(wqe_erp, &wqe->fcp_iread.wqe_com,
9607 iocbq->iocb.ulpFCP2Rcvy);
9608 bf_set(wqe_lnk, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpXS);
f1126688 9609 /* Always open the exchange */
f0d9bccc
JS
9610 bf_set(wqe_iod, &wqe->fcp_iread.wqe_com, LPFC_WQE_IOD_READ);
9611 bf_set(wqe_lenloc, &wqe->fcp_iread.wqe_com,
9612 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9613 bf_set(wqe_pu, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9614 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 1);
1ba981fd
JS
9615 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9616 bf_set(wqe_oas, &wqe->fcp_iread.wqe_com, 1);
c92c841c
JS
9617 bf_set(wqe_ccpe, &wqe->fcp_iread.wqe_com, 1);
9618 if (iocbq->priority) {
9619 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9620 (iocbq->priority << 1));
9621 } else {
1ba981fd
JS
9622 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9623 (phba->cfg_XLanePriority << 1));
9624 }
9625 }
b5c53958
JS
9626 /* Note, word 10 is already initialized to 0 */
9627
414abe0a
JS
9628 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9629 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9630 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 1);
9631 else
9632 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 0);
9633
b5c53958 9634 if (phba->fcp_embed_io) {
c490850a 9635 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9636 struct sli4_sge *sgl;
b5c53958
JS
9637 struct fcp_cmnd *fcp_cmnd;
9638 uint32_t *ptr;
9639
9640 /* 128 byte wqe support here */
b5c53958
JS
9641
9642 lpfc_cmd = iocbq->context1;
0794d601 9643 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9644 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9645
9646 /* Word 0-2 - FCP_CMND */
205e8240 9647 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9648 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9649 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9650 wqe->generic.bde.addrHigh = 0;
9651 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9652
205e8240
JS
9653 bf_set(wqe_wqes, &wqe->fcp_iread.wqe_com, 1);
9654 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 0);
b5c53958
JS
9655
9656 /* Word 22-29 FCP CMND Payload */
205e8240 9657 ptr = &wqe->words[22];
b5c53958
JS
9658 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9659 }
7851fe2c 9660 break;
4f774513 9661 case CMD_FCP_ICMND64_CR:
0ba4b219
JS
9662 /* word3 iocb=iotag wqe=payload_offset_len */
9663 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
9664 bf_set(payload_offset_len, &wqe->fcp_icmd,
9665 xmit_len + sizeof(struct fcp_rsp));
9666 bf_set(cmd_buff_len, &wqe->fcp_icmd,
9667 0);
f0d9bccc 9668 /* word3 iocb=IO_TAG wqe=reserved */
f0d9bccc 9669 bf_set(wqe_pu, &wqe->fcp_icmd.wqe_com, 0);
4f774513 9670 /* Always open the exchange */
f0d9bccc
JS
9671 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 1);
9672 bf_set(wqe_iod, &wqe->fcp_icmd.wqe_com, LPFC_WQE_IOD_WRITE);
9673 bf_set(wqe_qosd, &wqe->fcp_icmd.wqe_com, 1);
9674 bf_set(wqe_lenloc, &wqe->fcp_icmd.wqe_com,
9675 LPFC_WQE_LENLOC_NONE);
2a94aea4
JS
9676 bf_set(wqe_erp, &wqe->fcp_icmd.wqe_com,
9677 iocbq->iocb.ulpFCP2Rcvy);
1ba981fd
JS
9678 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9679 bf_set(wqe_oas, &wqe->fcp_icmd.wqe_com, 1);
c92c841c
JS
9680 bf_set(wqe_ccpe, &wqe->fcp_icmd.wqe_com, 1);
9681 if (iocbq->priority) {
9682 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9683 (iocbq->priority << 1));
9684 } else {
1ba981fd
JS
9685 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9686 (phba->cfg_XLanePriority << 1));
9687 }
9688 }
b5c53958
JS
9689 /* Note, word 10 is already initialized to 0 */
9690
9691 if (phba->fcp_embed_io) {
c490850a 9692 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9693 struct sli4_sge *sgl;
b5c53958
JS
9694 struct fcp_cmnd *fcp_cmnd;
9695 uint32_t *ptr;
9696
9697 /* 128 byte wqe support here */
b5c53958
JS
9698
9699 lpfc_cmd = iocbq->context1;
0794d601 9700 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9701 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9702
9703 /* Word 0-2 - FCP_CMND */
205e8240 9704 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9705 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9706 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9707 wqe->generic.bde.addrHigh = 0;
9708 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9709
205e8240
JS
9710 bf_set(wqe_wqes, &wqe->fcp_icmd.wqe_com, 1);
9711 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 0);
b5c53958
JS
9712
9713 /* Word 22-29 FCP CMND Payload */
205e8240 9714 ptr = &wqe->words[22];
b5c53958
JS
9715 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9716 }
7851fe2c 9717 break;
4f774513 9718 case CMD_GEN_REQUEST64_CR:
63e801ce
JS
9719 /* For this command calculate the xmit length of the
9720 * request bde.
9721 */
9722 xmit_len = 0;
9723 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9724 sizeof(struct ulp_bde64);
9725 for (i = 0; i < numBdes; i++) {
63e801ce 9726 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
546fc854
JS
9727 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
9728 break;
63e801ce
JS
9729 xmit_len += bde.tus.f.bdeSize;
9730 }
f0d9bccc
JS
9731 /* word3 iocb=IO_TAG wqe=request_payload_len */
9732 wqe->gen_req.request_payload_len = xmit_len;
9733 /* word4 iocb=parameter wqe=relative_offset memcpy */
9734 /* word5 [rctl, type, df_ctl, la] copied in memcpy */
4f774513
JS
9735 /* word6 context tag copied in memcpy */
9736 if (iocbq->iocb.ulpCt_h || iocbq->iocb.ulpCt_l) {
9737 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
9738 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9739 "2015 Invalid CT %x command 0x%x\n",
9740 ct, iocbq->iocb.ulpCommand);
9741 return IOCB_ERROR;
9742 }
f0d9bccc
JS
9743 bf_set(wqe_ct, &wqe->gen_req.wqe_com, 0);
9744 bf_set(wqe_tmo, &wqe->gen_req.wqe_com, iocbq->iocb.ulpTimeout);
9745 bf_set(wqe_pu, &wqe->gen_req.wqe_com, iocbq->iocb.ulpPU);
9746 bf_set(wqe_dbde, &wqe->gen_req.wqe_com, 1);
9747 bf_set(wqe_iod, &wqe->gen_req.wqe_com, LPFC_WQE_IOD_READ);
9748 bf_set(wqe_qosd, &wqe->gen_req.wqe_com, 1);
9749 bf_set(wqe_lenloc, &wqe->gen_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9750 bf_set(wqe_ebde_cnt, &wqe->gen_req.wqe_com, 0);
af22741c 9751 wqe->gen_req.max_response_payload_len = total_len - xmit_len;
4f774513 9752 command_type = OTHER_COMMAND;
7851fe2c 9753 break;
4f774513 9754 case CMD_XMIT_ELS_RSP64_CX:
c31098ce 9755 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513 9756 /* words0-2 BDE memcpy */
f0d9bccc
JS
9757 /* word3 iocb=iotag32 wqe=response_payload_len */
9758 wqe->xmit_els_rsp.response_payload_len = xmit_len;
939723a4
JS
9759 /* word4 */
9760 wqe->xmit_els_rsp.word4 = 0;
4f774513
JS
9761 /* word5 iocb=rsvd wge=did */
9762 bf_set(wqe_els_did, &wqe->xmit_els_rsp.wqe_dest,
939723a4
JS
9763 iocbq->iocb.un.xseq64.xmit_els_remoteID);
9764
9765 if_type = bf_get(lpfc_sli_intf_if_type,
9766 &phba->sli4_hba.sli_intf);
27d6ac0a 9767 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
939723a4
JS
9768 if (iocbq->vport->fc_flag & FC_PT2PT) {
9769 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9770 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
9771 iocbq->vport->fc_myDID);
9772 if (iocbq->vport->fc_myDID == Fabric_DID) {
9773 bf_set(wqe_els_did,
9774 &wqe->xmit_els_rsp.wqe_dest, 0);
9775 }
9776 }
9777 }
f0d9bccc
JS
9778 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com,
9779 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9780 bf_set(wqe_pu, &wqe->xmit_els_rsp.wqe_com, iocbq->iocb.ulpPU);
9781 bf_set(wqe_rcvoxid, &wqe->xmit_els_rsp.wqe_com,
7851fe2c 9782 iocbq->iocb.unsli3.rcvsli3.ox_id);
4f774513 9783 if (!iocbq->iocb.ulpCt_h && iocbq->iocb.ulpCt_l)
f0d9bccc 9784 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
6d368e53 9785 phba->vpi_ids[iocbq->vport->vpi]);
f0d9bccc
JS
9786 bf_set(wqe_dbde, &wqe->xmit_els_rsp.wqe_com, 1);
9787 bf_set(wqe_iod, &wqe->xmit_els_rsp.wqe_com, LPFC_WQE_IOD_WRITE);
9788 bf_set(wqe_qosd, &wqe->xmit_els_rsp.wqe_com, 1);
9789 bf_set(wqe_lenloc, &wqe->xmit_els_rsp.wqe_com,
9790 LPFC_WQE_LENLOC_WORD3);
9791 bf_set(wqe_ebde_cnt, &wqe->xmit_els_rsp.wqe_com, 0);
6d368e53
JS
9792 bf_set(wqe_rsp_temp_rpi, &wqe->xmit_els_rsp,
9793 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
ff78d8f9
JS
9794 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9795 iocbq->context2)->virt);
9796 if (phba->fc_topology == LPFC_TOPOLOGY_LOOP) {
939723a4
JS
9797 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9798 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
ff78d8f9 9799 iocbq->vport->fc_myDID);
939723a4
JS
9800 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com, 1);
9801 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
ff78d8f9
JS
9802 phba->vpi_ids[phba->pport->vpi]);
9803 }
4f774513 9804 command_type = OTHER_COMMAND;
7851fe2c 9805 break;
4f774513
JS
9806 case CMD_CLOSE_XRI_CN:
9807 case CMD_ABORT_XRI_CN:
9808 case CMD_ABORT_XRI_CX:
9809 /* words 0-2 memcpy should be 0 rserved */
9810 /* port will send abts */
dcf2a4e0
JS
9811 abrt_iotag = iocbq->iocb.un.acxri.abortContextTag;
9812 if (abrt_iotag != 0 && abrt_iotag <= phba->sli.last_iotag) {
9813 abrtiocbq = phba->sli.iocbq_lookup[abrt_iotag];
9814 fip = abrtiocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK;
9815 } else
9816 fip = 0;
9817
9818 if ((iocbq->iocb.ulpCommand == CMD_CLOSE_XRI_CN) || fip)
4f774513 9819 /*
dcf2a4e0
JS
9820 * The link is down, or the command was ELS_FIP
9821 * so the fw does not need to send abts
4f774513
JS
9822 * on the wire.
9823 */
9824 bf_set(abort_cmd_ia, &wqe->abort_cmd, 1);
9825 else
9826 bf_set(abort_cmd_ia, &wqe->abort_cmd, 0);
9827 bf_set(abort_cmd_criteria, &wqe->abort_cmd, T_XRI_TAG);
f0d9bccc
JS
9828 /* word5 iocb=CONTEXT_TAG|IO_TAG wqe=reserved */
9829 wqe->abort_cmd.rsrvd5 = 0;
9830 bf_set(wqe_ct, &wqe->abort_cmd.wqe_com,
4f774513
JS
9831 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9832 abort_tag = iocbq->iocb.un.acxri.abortIoTag;
4f774513
JS
9833 /*
9834 * The abort handler will send us CMD_ABORT_XRI_CN or
9835 * CMD_CLOSE_XRI_CN and the fw only accepts CMD_ABORT_XRI_CX
9836 */
f0d9bccc
JS
9837 bf_set(wqe_cmnd, &wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
9838 bf_set(wqe_qosd, &wqe->abort_cmd.wqe_com, 1);
9839 bf_set(wqe_lenloc, &wqe->abort_cmd.wqe_com,
9840 LPFC_WQE_LENLOC_NONE);
4f774513
JS
9841 cmnd = CMD_ABORT_XRI_CX;
9842 command_type = OTHER_COMMAND;
9843 xritag = 0;
7851fe2c 9844 break;
6669f9bb 9845 case CMD_XMIT_BLS_RSP64_CX:
6b5151fd 9846 ndlp = (struct lpfc_nodelist *)iocbq->context1;
546fc854 9847 /* As BLS ABTS RSP WQE is very different from other WQEs,
6669f9bb
JS
9848 * we re-construct this WQE here based on information in
9849 * iocbq from scratch.
9850 */
d9f492a1 9851 memset(wqe, 0, sizeof(*wqe));
5ffc266e 9852 /* OX_ID is invariable to who sent ABTS to CT exchange */
6669f9bb 9853 bf_set(xmit_bls_rsp64_oxid, &wqe->xmit_bls_rsp,
546fc854
JS
9854 bf_get(lpfc_abts_oxid, &iocbq->iocb.un.bls_rsp));
9855 if (bf_get(lpfc_abts_orig, &iocbq->iocb.un.bls_rsp) ==
5ffc266e
JS
9856 LPFC_ABTS_UNSOL_INT) {
9857 /* ABTS sent by initiator to CT exchange, the
9858 * RX_ID field will be filled with the newly
9859 * allocated responder XRI.
9860 */
9861 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
9862 iocbq->sli4_xritag);
9863 } else {
9864 /* ABTS sent by responder to CT exchange, the
9865 * RX_ID field will be filled with the responder
9866 * RX_ID from ABTS.
9867 */
9868 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
546fc854 9869 bf_get(lpfc_abts_rxid, &iocbq->iocb.un.bls_rsp));
5ffc266e 9870 }
6669f9bb
JS
9871 bf_set(xmit_bls_rsp64_seqcnthi, &wqe->xmit_bls_rsp, 0xffff);
9872 bf_set(wqe_xmit_bls_pt, &wqe->xmit_bls_rsp.wqe_dest, 0x1);
6b5151fd
JS
9873
9874 /* Use CT=VPI */
9875 bf_set(wqe_els_did, &wqe->xmit_bls_rsp.wqe_dest,
9876 ndlp->nlp_DID);
9877 bf_set(xmit_bls_rsp64_temprpi, &wqe->xmit_bls_rsp,
9878 iocbq->iocb.ulpContext);
9879 bf_set(wqe_ct, &wqe->xmit_bls_rsp.wqe_com, 1);
6669f9bb 9880 bf_set(wqe_ctxt_tag, &wqe->xmit_bls_rsp.wqe_com,
6b5151fd 9881 phba->vpi_ids[phba->pport->vpi]);
f0d9bccc
JS
9882 bf_set(wqe_qosd, &wqe->xmit_bls_rsp.wqe_com, 1);
9883 bf_set(wqe_lenloc, &wqe->xmit_bls_rsp.wqe_com,
9884 LPFC_WQE_LENLOC_NONE);
6669f9bb
JS
9885 /* Overwrite the pre-set comnd type with OTHER_COMMAND */
9886 command_type = OTHER_COMMAND;
546fc854
JS
9887 if (iocbq->iocb.un.xseq64.w5.hcsw.Rctl == FC_RCTL_BA_RJT) {
9888 bf_set(xmit_bls_rsp64_rjt_vspec, &wqe->xmit_bls_rsp,
9889 bf_get(lpfc_vndr_code, &iocbq->iocb.un.bls_rsp));
9890 bf_set(xmit_bls_rsp64_rjt_expc, &wqe->xmit_bls_rsp,
9891 bf_get(lpfc_rsn_expln, &iocbq->iocb.un.bls_rsp));
9892 bf_set(xmit_bls_rsp64_rjt_rsnc, &wqe->xmit_bls_rsp,
9893 bf_get(lpfc_rsn_code, &iocbq->iocb.un.bls_rsp));
9894 }
9895
7851fe2c 9896 break;
ae9e28f3 9897 case CMD_SEND_FRAME:
e62245d9
JS
9898 bf_set(wqe_cmnd, &wqe->generic.wqe_com, CMD_SEND_FRAME);
9899 bf_set(wqe_sof, &wqe->generic.wqe_com, 0x2E); /* SOF byte */
9900 bf_set(wqe_eof, &wqe->generic.wqe_com, 0x41); /* EOF byte */
9901 bf_set(wqe_lenloc, &wqe->generic.wqe_com, 1);
9902 bf_set(wqe_xbl, &wqe->generic.wqe_com, 1);
9903 bf_set(wqe_dbde, &wqe->generic.wqe_com, 1);
9904 bf_set(wqe_xc, &wqe->generic.wqe_com, 1);
9905 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, 0xA);
9906 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
ae9e28f3
JS
9907 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9908 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9909 return 0;
4f774513
JS
9910 case CMD_XRI_ABORTED_CX:
9911 case CMD_CREATE_XRI_CR: /* Do we expect to use this? */
4f774513
JS
9912 case CMD_IOCB_FCP_IBIDIR64_CR: /* bidirectional xfer */
9913 case CMD_FCP_TSEND64_CX: /* Target mode send xfer-ready */
9914 case CMD_FCP_TRSP64_CX: /* Target mode rcv */
9915 case CMD_FCP_AUTO_TRSP_CX: /* Auto target rsp */
9916 default:
9917 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9918 "2014 Invalid command 0x%x\n",
9919 iocbq->iocb.ulpCommand);
9920 return IOCB_ERROR;
7851fe2c 9921 break;
4f774513 9922 }
6d368e53 9923
8012cc38
JS
9924 if (iocbq->iocb_flag & LPFC_IO_DIF_PASS)
9925 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_PASSTHRU);
9926 else if (iocbq->iocb_flag & LPFC_IO_DIF_STRIP)
9927 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_STRIP);
9928 else if (iocbq->iocb_flag & LPFC_IO_DIF_INSERT)
9929 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_INSERT);
9930 iocbq->iocb_flag &= ~(LPFC_IO_DIF_PASS | LPFC_IO_DIF_STRIP |
9931 LPFC_IO_DIF_INSERT);
f0d9bccc
JS
9932 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9933 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9934 wqe->generic.wqe_com.abort_tag = abort_tag;
9935 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, command_type);
9936 bf_set(wqe_cmnd, &wqe->generic.wqe_com, cmnd);
9937 bf_set(wqe_class, &wqe->generic.wqe_com, iocbq->iocb.ulpClass);
9938 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
4f774513
JS
9939 return 0;
9940}
9941
9942/**
9943 * __lpfc_sli_issue_iocb_s4 - SLI4 device lockless ver of lpfc_sli_issue_iocb
9944 * @phba: Pointer to HBA context object.
9945 * @ring_number: SLI ring number to issue iocb on.
9946 * @piocb: Pointer to command iocb.
9947 * @flag: Flag indicating if this command can be put into txq.
9948 *
9949 * __lpfc_sli_issue_iocb_s4 is used by other functions in the driver to issue
9950 * an iocb command to an HBA with SLI-4 interface spec.
9951 *
27f3efd6 9952 * This function is called with ringlock held. The function will return success
4f774513
JS
9953 * after it successfully submit the iocb to firmware or after adding to the
9954 * txq.
9955 **/
9956static int
9957__lpfc_sli_issue_iocb_s4(struct lpfc_hba *phba, uint32_t ring_number,
9958 struct lpfc_iocbq *piocb, uint32_t flag)
9959{
9960 struct lpfc_sglq *sglq;
205e8240 9961 union lpfc_wqe128 wqe;
1ba981fd 9962 struct lpfc_queue *wq;
895427bd 9963 struct lpfc_sli_ring *pring;
4f774513 9964
895427bd
JS
9965 /* Get the WQ */
9966 if ((piocb->iocb_flag & LPFC_IO_FCP) ||
9967 (piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
c00f62e6 9968 wq = phba->sli4_hba.hdwq[piocb->hba_wqidx].io_wq;
895427bd
JS
9969 } else {
9970 wq = phba->sli4_hba.els_wq;
9971 }
9972
9973 /* Get corresponding ring */
9974 pring = wq->pring;
1c2ba475 9975
b5c53958
JS
9976 /*
9977 * The WQE can be either 64 or 128 bytes,
b5c53958 9978 */
b5c53958 9979
cda7fa18 9980 lockdep_assert_held(&pring->ring_lock);
895427bd 9981
4f774513
JS
9982 if (piocb->sli4_xritag == NO_XRI) {
9983 if (piocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
6b5151fd 9984 piocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN)
4f774513
JS
9985 sglq = NULL;
9986 else {
0e9bb8d7 9987 if (!list_empty(&pring->txq)) {
2a9bf3d0
JS
9988 if (!(flag & SLI_IOCB_RET_IOCB)) {
9989 __lpfc_sli_ringtx_put(phba,
9990 pring, piocb);
9991 return IOCB_SUCCESS;
9992 } else {
9993 return IOCB_BUSY;
9994 }
9995 } else {
895427bd 9996 sglq = __lpfc_sli_get_els_sglq(phba, piocb);
2a9bf3d0
JS
9997 if (!sglq) {
9998 if (!(flag & SLI_IOCB_RET_IOCB)) {
9999 __lpfc_sli_ringtx_put(phba,
10000 pring,
10001 piocb);
10002 return IOCB_SUCCESS;
10003 } else
10004 return IOCB_BUSY;
10005 }
10006 }
4f774513 10007 }
2ea259ee 10008 } else if (piocb->iocb_flag & LPFC_IO_FCP)
6d368e53
JS
10009 /* These IO's already have an XRI and a mapped sgl. */
10010 sglq = NULL;
2ea259ee 10011 else {
6d368e53
JS
10012 /*
10013 * This is a continuation of a commandi,(CX) so this
4f774513
JS
10014 * sglq is on the active list
10015 */
edccdc17 10016 sglq = __lpfc_get_active_sglq(phba, piocb->sli4_lxritag);
4f774513
JS
10017 if (!sglq)
10018 return IOCB_ERROR;
10019 }
10020
10021 if (sglq) {
6d368e53 10022 piocb->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0 10023 piocb->sli4_xritag = sglq->sli4_xritag;
2a9bf3d0 10024 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocb, sglq))
4f774513
JS
10025 return IOCB_ERROR;
10026 }
10027
205e8240 10028 if (lpfc_sli4_iocb2wqe(phba, piocb, &wqe))
4f774513
JS
10029 return IOCB_ERROR;
10030
205e8240 10031 if (lpfc_sli4_wq_put(wq, &wqe))
895427bd 10032 return IOCB_ERROR;
4f774513
JS
10033 lpfc_sli_ringtxcmpl_put(phba, pring, piocb);
10034
10035 return 0;
10036}
10037
10038/**
10039 * __lpfc_sli_issue_iocb - Wrapper func of lockless version for issuing iocb
10040 *
10041 * This routine wraps the actual lockless version for issusing IOCB function
10042 * pointer from the lpfc_hba struct.
10043 *
10044 * Return codes:
b5c53958
JS
10045 * IOCB_ERROR - Error
10046 * IOCB_SUCCESS - Success
10047 * IOCB_BUSY - Busy
4f774513 10048 **/
2a9bf3d0 10049int
4f774513
JS
10050__lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
10051 struct lpfc_iocbq *piocb, uint32_t flag)
10052{
10053 return phba->__lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10054}
10055
10056/**
25985edc 10057 * lpfc_sli_api_table_setup - Set up sli api function jump table
4f774513
JS
10058 * @phba: The hba struct for which this call is being executed.
10059 * @dev_grp: The HBA PCI-Device group number.
10060 *
10061 * This routine sets up the SLI interface API function jump table in @phba
10062 * struct.
10063 * Returns: 0 - success, -ENODEV - failure.
10064 **/
10065int
10066lpfc_sli_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
10067{
10068
10069 switch (dev_grp) {
10070 case LPFC_PCI_DEV_LP:
10071 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s3;
10072 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s3;
10073 break;
10074 case LPFC_PCI_DEV_OC:
10075 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s4;
10076 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s4;
10077 break;
10078 default:
10079 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10080 "1419 Invalid HBA PCI-device group: 0x%x\n",
10081 dev_grp);
10082 return -ENODEV;
10083 break;
10084 }
10085 phba->lpfc_get_iocb_from_iocbq = lpfc_get_iocb_from_iocbq;
10086 return 0;
10087}
10088
a1efe163 10089/**
895427bd 10090 * lpfc_sli4_calc_ring - Calculates which ring to use
a1efe163 10091 * @phba: Pointer to HBA context object.
a1efe163
JS
10092 * @piocb: Pointer to command iocb.
10093 *
895427bd
JS
10094 * For SLI4 only, FCP IO can deferred to one fo many WQs, based on
10095 * hba_wqidx, thus we need to calculate the corresponding ring.
a1efe163 10096 * Since ABORTS must go on the same WQ of the command they are
895427bd 10097 * aborting, we use command's hba_wqidx.
a1efe163 10098 */
895427bd
JS
10099struct lpfc_sli_ring *
10100lpfc_sli4_calc_ring(struct lpfc_hba *phba, struct lpfc_iocbq *piocb)
9bd2bff5 10101{
c490850a 10102 struct lpfc_io_buf *lpfc_cmd;
5e5b511d 10103
895427bd 10104 if (piocb->iocb_flag & (LPFC_IO_FCP | LPFC_USE_FCPWQIDX)) {
cdb42bec 10105 if (unlikely(!phba->sli4_hba.hdwq))
7370d10a
JS
10106 return NULL;
10107 /*
10108 * for abort iocb hba_wqidx should already
10109 * be setup based on what work queue we used.
10110 */
10111 if (!(piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
c490850a 10112 lpfc_cmd = (struct lpfc_io_buf *)piocb->context1;
1fbf9742 10113 piocb->hba_wqidx = lpfc_cmd->hdwq_no;
9bd2bff5 10114 }
c00f62e6 10115 return phba->sli4_hba.hdwq[piocb->hba_wqidx].io_wq->pring;
895427bd
JS
10116 } else {
10117 if (unlikely(!phba->sli4_hba.els_wq))
10118 return NULL;
10119 piocb->hba_wqidx = 0;
10120 return phba->sli4_hba.els_wq->pring;
9bd2bff5 10121 }
9bd2bff5
JS
10122}
10123
4f774513
JS
10124/**
10125 * lpfc_sli_issue_iocb - Wrapper function for __lpfc_sli_issue_iocb
10126 * @phba: Pointer to HBA context object.
10127 * @pring: Pointer to driver SLI ring object.
10128 * @piocb: Pointer to command iocb.
10129 * @flag: Flag indicating if this command can be put into txq.
10130 *
10131 * lpfc_sli_issue_iocb is a wrapper around __lpfc_sli_issue_iocb
10132 * function. This function gets the hbalock and calls
10133 * __lpfc_sli_issue_iocb function and will return the error returned
10134 * by __lpfc_sli_issue_iocb function. This wrapper is used by
10135 * functions which do not hold hbalock.
10136 **/
10137int
10138lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
10139 struct lpfc_iocbq *piocb, uint32_t flag)
10140{
2a76a283 10141 struct lpfc_sli_ring *pring;
93a4d6f4 10142 struct lpfc_queue *eq;
4f774513 10143 unsigned long iflags;
6a828b0f 10144 int rc;
4f774513 10145
7e56aa25 10146 if (phba->sli_rev == LPFC_SLI_REV4) {
93a4d6f4
JS
10147 eq = phba->sli4_hba.hdwq[piocb->hba_wqidx].hba_eq;
10148
895427bd
JS
10149 pring = lpfc_sli4_calc_ring(phba, piocb);
10150 if (unlikely(pring == NULL))
9bd2bff5 10151 return IOCB_ERROR;
ba20c853 10152
9bd2bff5
JS
10153 spin_lock_irqsave(&pring->ring_lock, iflags);
10154 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10155 spin_unlock_irqrestore(&pring->ring_lock, iflags);
93a4d6f4
JS
10156
10157 lpfc_sli4_poll_eq(eq, LPFC_POLL_FASTPATH);
7e56aa25
JS
10158 } else {
10159 /* For now, SLI2/3 will still use hbalock */
10160 spin_lock_irqsave(&phba->hbalock, iflags);
10161 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10162 spin_unlock_irqrestore(&phba->hbalock, iflags);
10163 }
4f774513
JS
10164 return rc;
10165}
10166
10167/**
10168 * lpfc_extra_ring_setup - Extra ring setup function
10169 * @phba: Pointer to HBA context object.
10170 *
10171 * This function is called while driver attaches with the
10172 * HBA to setup the extra ring. The extra ring is used
10173 * only when driver needs to support target mode functionality
10174 * or IP over FC functionalities.
10175 *
895427bd 10176 * This function is called with no lock held. SLI3 only.
4f774513
JS
10177 **/
10178static int
10179lpfc_extra_ring_setup( struct lpfc_hba *phba)
10180{
10181 struct lpfc_sli *psli;
10182 struct lpfc_sli_ring *pring;
10183
10184 psli = &phba->sli;
10185
10186 /* Adjust cmd/rsp ring iocb entries more evenly */
10187
10188 /* Take some away from the FCP ring */
895427bd 10189 pring = &psli->sli3_ring[LPFC_FCP_RING];
7e56aa25
JS
10190 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10191 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10192 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10193 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e 10194
a4bc3379 10195 /* and give them to the extra ring */
895427bd 10196 pring = &psli->sli3_ring[LPFC_EXTRA_RING];
a4bc3379 10197
7e56aa25
JS
10198 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10199 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10200 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10201 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e
JW
10202
10203 /* Setup default profile for this ring */
10204 pring->iotag_max = 4096;
10205 pring->num_mask = 1;
10206 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS
10207 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
10208 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW
10209 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
10210 return 0;
10211}
10212
cb69f7de
JS
10213/* lpfc_sli_abts_err_handler - handle a failed ABTS request from an SLI3 port.
10214 * @phba: Pointer to HBA context object.
10215 * @iocbq: Pointer to iocb object.
10216 *
10217 * The async_event handler calls this routine when it receives
10218 * an ASYNC_STATUS_CN event from the port. The port generates
10219 * this event when an Abort Sequence request to an rport fails
10220 * twice in succession. The abort could be originated by the
10221 * driver or by the port. The ABTS could have been for an ELS
10222 * or FCP IO. The port only generates this event when an ABTS
10223 * fails to complete after one retry.
10224 */
10225static void
10226lpfc_sli_abts_err_handler(struct lpfc_hba *phba,
10227 struct lpfc_iocbq *iocbq)
10228{
10229 struct lpfc_nodelist *ndlp = NULL;
10230 uint16_t rpi = 0, vpi = 0;
10231 struct lpfc_vport *vport = NULL;
10232
10233 /* The rpi in the ulpContext is vport-sensitive. */
10234 vpi = iocbq->iocb.un.asyncstat.sub_ctxt_tag;
10235 rpi = iocbq->iocb.ulpContext;
10236
10237 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10238 "3092 Port generated ABTS async event "
10239 "on vpi %d rpi %d status 0x%x\n",
10240 vpi, rpi, iocbq->iocb.ulpStatus);
10241
10242 vport = lpfc_find_vport_by_vpid(phba, vpi);
10243 if (!vport)
10244 goto err_exit;
10245 ndlp = lpfc_findnode_rpi(vport, rpi);
10246 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp))
10247 goto err_exit;
10248
10249 if (iocbq->iocb.ulpStatus == IOSTAT_LOCAL_REJECT)
10250 lpfc_sli_abts_recover_port(vport, ndlp);
10251 return;
10252
10253 err_exit:
10254 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10255 "3095 Event Context not found, no "
10256 "action on vpi %d rpi %d status 0x%x, reason 0x%x\n",
10257 iocbq->iocb.ulpContext, iocbq->iocb.ulpStatus,
10258 vpi, rpi);
10259}
10260
10261/* lpfc_sli4_abts_err_handler - handle a failed ABTS request from an SLI4 port.
10262 * @phba: pointer to HBA context object.
10263 * @ndlp: nodelist pointer for the impacted rport.
10264 * @axri: pointer to the wcqe containing the failed exchange.
10265 *
10266 * The driver calls this routine when it receives an ABORT_XRI_FCP CQE from the
10267 * port. The port generates this event when an abort exchange request to an
10268 * rport fails twice in succession with no reply. The abort could be originated
10269 * by the driver or by the port. The ABTS could have been for an ELS or FCP IO.
10270 */
10271void
10272lpfc_sli4_abts_err_handler(struct lpfc_hba *phba,
10273 struct lpfc_nodelist *ndlp,
10274 struct sli4_wcqe_xri_aborted *axri)
10275{
10276 struct lpfc_vport *vport;
5c1db2ac 10277 uint32_t ext_status = 0;
cb69f7de 10278
6b5151fd 10279 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) {
cb69f7de
JS
10280 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10281 "3115 Node Context not found, driver "
10282 "ignoring abts err event\n");
6b5151fd
JS
10283 return;
10284 }
10285
cb69f7de
JS
10286 vport = ndlp->vport;
10287 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10288 "3116 Port generated FCP XRI ABORT event on "
5c1db2ac 10289 "vpi %d rpi %d xri x%x status 0x%x parameter x%x\n",
8e668af5 10290 ndlp->vport->vpi, phba->sli4_hba.rpi_ids[ndlp->nlp_rpi],
cb69f7de 10291 bf_get(lpfc_wcqe_xa_xri, axri),
5c1db2ac
JS
10292 bf_get(lpfc_wcqe_xa_status, axri),
10293 axri->parameter);
cb69f7de 10294
5c1db2ac
JS
10295 /*
10296 * Catch the ABTS protocol failure case. Older OCe FW releases returned
10297 * LOCAL_REJECT and 0 for a failed ABTS exchange and later OCe and
10298 * LPe FW releases returned LOCAL_REJECT and SEQUENCE_TIMEOUT.
10299 */
e3d2b802 10300 ext_status = axri->parameter & IOERR_PARAM_MASK;
5c1db2ac
JS
10301 if ((bf_get(lpfc_wcqe_xa_status, axri) == IOSTAT_LOCAL_REJECT) &&
10302 ((ext_status == IOERR_SEQUENCE_TIMEOUT) || (ext_status == 0)))
cb69f7de
JS
10303 lpfc_sli_abts_recover_port(vport, ndlp);
10304}
10305
e59058c4 10306/**
3621a710 10307 * lpfc_sli_async_event_handler - ASYNC iocb handler function
e59058c4
JS
10308 * @phba: Pointer to HBA context object.
10309 * @pring: Pointer to driver SLI ring object.
10310 * @iocbq: Pointer to iocb object.
10311 *
10312 * This function is called by the slow ring event handler
10313 * function when there is an ASYNC event iocb in the ring.
10314 * This function is called with no lock held.
10315 * Currently this function handles only temperature related
10316 * ASYNC events. The function decodes the temperature sensor
10317 * event message and posts events for the management applications.
10318 **/
98c9ea5c 10319static void
57127f15
JS
10320lpfc_sli_async_event_handler(struct lpfc_hba * phba,
10321 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
10322{
10323 IOCB_t *icmd;
10324 uint16_t evt_code;
57127f15
JS
10325 struct temp_event temp_event_data;
10326 struct Scsi_Host *shost;
a257bf90 10327 uint32_t *iocb_w;
57127f15
JS
10328
10329 icmd = &iocbq->iocb;
10330 evt_code = icmd->un.asyncstat.evt_code;
57127f15 10331
cb69f7de
JS
10332 switch (evt_code) {
10333 case ASYNC_TEMP_WARN:
10334 case ASYNC_TEMP_SAFE:
10335 temp_event_data.data = (uint32_t) icmd->ulpContext;
10336 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
10337 if (evt_code == ASYNC_TEMP_WARN) {
10338 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
10339 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10340 "0347 Adapter is very hot, please take "
10341 "corrective action. temperature : %d Celsius\n",
10342 (uint32_t) icmd->ulpContext);
10343 } else {
10344 temp_event_data.event_code = LPFC_NORMAL_TEMP;
10345 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10346 "0340 Adapter temperature is OK now. "
10347 "temperature : %d Celsius\n",
10348 (uint32_t) icmd->ulpContext);
10349 }
10350
10351 /* Send temperature change event to applications */
10352 shost = lpfc_shost_from_vport(phba->pport);
10353 fc_host_post_vendor_event(shost, fc_get_event_number(),
10354 sizeof(temp_event_data), (char *) &temp_event_data,
10355 LPFC_NL_VENDOR_ID);
10356 break;
10357 case ASYNC_STATUS_CN:
10358 lpfc_sli_abts_err_handler(phba, iocbq);
10359 break;
10360 default:
a257bf90 10361 iocb_w = (uint32_t *) icmd;
cb69f7de 10362 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
76bb24ef 10363 "0346 Ring %d handler: unexpected ASYNC_STATUS"
e4e74273 10364 " evt_code 0x%x\n"
a257bf90
JS
10365 "W0 0x%08x W1 0x%08x W2 0x%08x W3 0x%08x\n"
10366 "W4 0x%08x W5 0x%08x W6 0x%08x W7 0x%08x\n"
10367 "W8 0x%08x W9 0x%08x W10 0x%08x W11 0x%08x\n"
10368 "W12 0x%08x W13 0x%08x W14 0x%08x W15 0x%08x\n",
cb69f7de 10369 pring->ringno, icmd->un.asyncstat.evt_code,
a257bf90
JS
10370 iocb_w[0], iocb_w[1], iocb_w[2], iocb_w[3],
10371 iocb_w[4], iocb_w[5], iocb_w[6], iocb_w[7],
10372 iocb_w[8], iocb_w[9], iocb_w[10], iocb_w[11],
10373 iocb_w[12], iocb_w[13], iocb_w[14], iocb_w[15]);
10374
cb69f7de 10375 break;
57127f15 10376 }
57127f15
JS
10377}
10378
10379
e59058c4 10380/**
895427bd 10381 * lpfc_sli4_setup - SLI ring setup function
e59058c4
JS
10382 * @phba: Pointer to HBA context object.
10383 *
10384 * lpfc_sli_setup sets up rings of the SLI interface with
10385 * number of iocbs per ring and iotags. This function is
10386 * called while driver attach to the HBA and before the
10387 * interrupts are enabled. So there is no need for locking.
10388 *
10389 * This function always returns 0.
10390 **/
dea3101e 10391int
895427bd
JS
10392lpfc_sli4_setup(struct lpfc_hba *phba)
10393{
10394 struct lpfc_sli_ring *pring;
10395
10396 pring = phba->sli4_hba.els_wq->pring;
10397 pring->num_mask = LPFC_MAX_RING_MASK;
10398 pring->prt[0].profile = 0; /* Mask 0 */
10399 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10400 pring->prt[0].type = FC_TYPE_ELS;
10401 pring->prt[0].lpfc_sli_rcv_unsol_event =
10402 lpfc_els_unsol_event;
10403 pring->prt[1].profile = 0; /* Mask 1 */
10404 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10405 pring->prt[1].type = FC_TYPE_ELS;
10406 pring->prt[1].lpfc_sli_rcv_unsol_event =
10407 lpfc_els_unsol_event;
10408 pring->prt[2].profile = 0; /* Mask 2 */
10409 /* NameServer Inquiry */
10410 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
10411 /* NameServer */
10412 pring->prt[2].type = FC_TYPE_CT;
10413 pring->prt[2].lpfc_sli_rcv_unsol_event =
10414 lpfc_ct_unsol_event;
10415 pring->prt[3].profile = 0; /* Mask 3 */
10416 /* NameServer response */
10417 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
10418 /* NameServer */
10419 pring->prt[3].type = FC_TYPE_CT;
10420 pring->prt[3].lpfc_sli_rcv_unsol_event =
10421 lpfc_ct_unsol_event;
10422 return 0;
10423}
10424
10425/**
10426 * lpfc_sli_setup - SLI ring setup function
10427 * @phba: Pointer to HBA context object.
10428 *
10429 * lpfc_sli_setup sets up rings of the SLI interface with
10430 * number of iocbs per ring and iotags. This function is
10431 * called while driver attach to the HBA and before the
10432 * interrupts are enabled. So there is no need for locking.
10433 *
10434 * This function always returns 0. SLI3 only.
10435 **/
10436int
dea3101e
JB
10437lpfc_sli_setup(struct lpfc_hba *phba)
10438{
ed957684 10439 int i, totiocbsize = 0;
dea3101e
JB
10440 struct lpfc_sli *psli = &phba->sli;
10441 struct lpfc_sli_ring *pring;
10442
2a76a283 10443 psli->num_rings = MAX_SLI3_CONFIGURED_RINGS;
dea3101e 10444 psli->sli_flag = 0;
dea3101e 10445
604a3e30
JB
10446 psli->iocbq_lookup = NULL;
10447 psli->iocbq_lookup_len = 0;
10448 psli->last_iotag = 0;
10449
dea3101e 10450 for (i = 0; i < psli->num_rings; i++) {
895427bd 10451 pring = &psli->sli3_ring[i];
dea3101e
JB
10452 switch (i) {
10453 case LPFC_FCP_RING: /* ring 0 - FCP */
10454 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10455 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
10456 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
10457 pring->sli.sli3.numCiocb +=
10458 SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10459 pring->sli.sli3.numRiocb +=
10460 SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10461 pring->sli.sli3.numCiocb +=
10462 SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10463 pring->sli.sli3.numRiocb +=
10464 SLI2_IOCB_RSP_R3XTRA_ENTRIES;
10465 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10466 SLI3_IOCB_CMD_SIZE :
10467 SLI2_IOCB_CMD_SIZE;
7e56aa25 10468 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10469 SLI3_IOCB_RSP_SIZE :
10470 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10471 pring->iotag_ctr = 0;
10472 pring->iotag_max =
92d7f7b0 10473 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB
10474 pring->fast_iotag = pring->iotag_max;
10475 pring->num_mask = 0;
10476 break;
a4bc3379 10477 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e 10478 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10479 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
10480 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
10481 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10482 SLI3_IOCB_CMD_SIZE :
10483 SLI2_IOCB_CMD_SIZE;
7e56aa25 10484 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10485 SLI3_IOCB_RSP_SIZE :
10486 SLI2_IOCB_RSP_SIZE;
2e0fef85 10487 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB
10488 pring->num_mask = 0;
10489 break;
10490 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
10491 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10492 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
10493 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
10494 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10495 SLI3_IOCB_CMD_SIZE :
10496 SLI2_IOCB_CMD_SIZE;
7e56aa25 10497 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10498 SLI3_IOCB_RSP_SIZE :
10499 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10500 pring->fast_iotag = 0;
10501 pring->iotag_ctr = 0;
10502 pring->iotag_max = 4096;
57127f15
JS
10503 pring->lpfc_sli_rcv_async_status =
10504 lpfc_sli_async_event_handler;
6669f9bb 10505 pring->num_mask = LPFC_MAX_RING_MASK;
dea3101e 10506 pring->prt[0].profile = 0; /* Mask 0 */
6a9c52cf
JS
10507 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10508 pring->prt[0].type = FC_TYPE_ELS;
dea3101e 10509 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 10510 lpfc_els_unsol_event;
dea3101e 10511 pring->prt[1].profile = 0; /* Mask 1 */
6a9c52cf
JS
10512 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10513 pring->prt[1].type = FC_TYPE_ELS;
dea3101e 10514 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 10515 lpfc_els_unsol_event;
dea3101e
JB
10516 pring->prt[2].profile = 0; /* Mask 2 */
10517 /* NameServer Inquiry */
6a9c52cf 10518 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
dea3101e 10519 /* NameServer */
6a9c52cf 10520 pring->prt[2].type = FC_TYPE_CT;
dea3101e 10521 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 10522 lpfc_ct_unsol_event;
dea3101e
JB
10523 pring->prt[3].profile = 0; /* Mask 3 */
10524 /* NameServer response */
6a9c52cf 10525 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
dea3101e 10526 /* NameServer */
6a9c52cf 10527 pring->prt[3].type = FC_TYPE_CT;
dea3101e 10528 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 10529 lpfc_ct_unsol_event;
dea3101e
JB
10530 break;
10531 }
7e56aa25
JS
10532 totiocbsize += (pring->sli.sli3.numCiocb *
10533 pring->sli.sli3.sizeCiocb) +
10534 (pring->sli.sli3.numRiocb * pring->sli.sli3.sizeRiocb);
dea3101e 10535 }
ed957684 10536 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 10537 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS
10538 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
10539 "SLI2 SLIM Data: x%x x%lx\n",
10540 phba->brd_no, totiocbsize,
10541 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 10542 }
cf5bf97e
JW
10543 if (phba->cfg_multi_ring_support == 2)
10544 lpfc_extra_ring_setup(phba);
dea3101e
JB
10545
10546 return 0;
10547}
10548
e59058c4 10549/**
895427bd 10550 * lpfc_sli4_queue_init - Queue initialization function
e59058c4
JS
10551 * @phba: Pointer to HBA context object.
10552 *
895427bd 10553 * lpfc_sli4_queue_init sets up mailbox queues and iocb queues for each
e59058c4
JS
10554 * ring. This function also initializes ring indices of each ring.
10555 * This function is called during the initialization of the SLI
10556 * interface of an HBA.
10557 * This function is called with no lock held and always returns
10558 * 1.
10559 **/
895427bd
JS
10560void
10561lpfc_sli4_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10562{
10563 struct lpfc_sli *psli;
10564 struct lpfc_sli_ring *pring;
604a3e30 10565 int i;
dea3101e
JB
10566
10567 psli = &phba->sli;
2e0fef85 10568 spin_lock_irq(&phba->hbalock);
dea3101e 10569 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10570 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e 10571 /* Initialize list headers for txq and txcmplq as double linked lists */
cdb42bec 10572 for (i = 0; i < phba->cfg_hdw_queue; i++) {
c00f62e6 10573 pring = phba->sli4_hba.hdwq[i].io_wq->pring;
895427bd
JS
10574 pring->flag = 0;
10575 pring->ringno = LPFC_FCP_RING;
c490850a 10576 pring->txcmplq_cnt = 0;
895427bd
JS
10577 INIT_LIST_HEAD(&pring->txq);
10578 INIT_LIST_HEAD(&pring->txcmplq);
10579 INIT_LIST_HEAD(&pring->iocb_continueq);
10580 spin_lock_init(&pring->ring_lock);
10581 }
10582 pring = phba->sli4_hba.els_wq->pring;
10583 pring->flag = 0;
10584 pring->ringno = LPFC_ELS_RING;
c490850a 10585 pring->txcmplq_cnt = 0;
895427bd
JS
10586 INIT_LIST_HEAD(&pring->txq);
10587 INIT_LIST_HEAD(&pring->txcmplq);
10588 INIT_LIST_HEAD(&pring->iocb_continueq);
10589 spin_lock_init(&pring->ring_lock);
dea3101e 10590
cdb42bec 10591 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
10592 pring = phba->sli4_hba.nvmels_wq->pring;
10593 pring->flag = 0;
10594 pring->ringno = LPFC_ELS_RING;
c490850a 10595 pring->txcmplq_cnt = 0;
895427bd
JS
10596 INIT_LIST_HEAD(&pring->txq);
10597 INIT_LIST_HEAD(&pring->txcmplq);
10598 INIT_LIST_HEAD(&pring->iocb_continueq);
10599 spin_lock_init(&pring->ring_lock);
10600 }
10601
10602 spin_unlock_irq(&phba->hbalock);
10603}
10604
10605/**
10606 * lpfc_sli_queue_init - Queue initialization function
10607 * @phba: Pointer to HBA context object.
10608 *
10609 * lpfc_sli_queue_init sets up mailbox queues and iocb queues for each
10610 * ring. This function also initializes ring indices of each ring.
10611 * This function is called during the initialization of the SLI
10612 * interface of an HBA.
10613 * This function is called with no lock held and always returns
10614 * 1.
10615 **/
10616void
10617lpfc_sli_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10618{
10619 struct lpfc_sli *psli;
10620 struct lpfc_sli_ring *pring;
604a3e30 10621 int i;
dea3101e
JB
10622
10623 psli = &phba->sli;
2e0fef85 10624 spin_lock_irq(&phba->hbalock);
dea3101e 10625 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10626 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB
10627 /* Initialize list headers for txq and txcmplq as double linked lists */
10628 for (i = 0; i < psli->num_rings; i++) {
895427bd 10629 pring = &psli->sli3_ring[i];
dea3101e 10630 pring->ringno = i;
7e56aa25
JS
10631 pring->sli.sli3.next_cmdidx = 0;
10632 pring->sli.sli3.local_getidx = 0;
10633 pring->sli.sli3.cmdidx = 0;
dea3101e 10634 INIT_LIST_HEAD(&pring->iocb_continueq);
9c2face6 10635 INIT_LIST_HEAD(&pring->iocb_continue_saveq);
dea3101e 10636 INIT_LIST_HEAD(&pring->postbufq);
895427bd
JS
10637 pring->flag = 0;
10638 INIT_LIST_HEAD(&pring->txq);
10639 INIT_LIST_HEAD(&pring->txcmplq);
7e56aa25 10640 spin_lock_init(&pring->ring_lock);
dea3101e 10641 }
2e0fef85 10642 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10643}
10644
04c68496
JS
10645/**
10646 * lpfc_sli_mbox_sys_flush - Flush mailbox command sub-system
10647 * @phba: Pointer to HBA context object.
10648 *
10649 * This routine flushes the mailbox command subsystem. It will unconditionally
10650 * flush all the mailbox commands in the three possible stages in the mailbox
10651 * command sub-system: pending mailbox command queue; the outstanding mailbox
10652 * command; and completed mailbox command queue. It is caller's responsibility
10653 * to make sure that the driver is in the proper state to flush the mailbox
10654 * command sub-system. Namely, the posting of mailbox commands into the
10655 * pending mailbox command queue from the various clients must be stopped;
10656 * either the HBA is in a state that it will never works on the outstanding
10657 * mailbox command (such as in EEH or ERATT conditions) or the outstanding
10658 * mailbox command has been completed.
10659 **/
10660static void
10661lpfc_sli_mbox_sys_flush(struct lpfc_hba *phba)
10662{
10663 LIST_HEAD(completions);
10664 struct lpfc_sli *psli = &phba->sli;
10665 LPFC_MBOXQ_t *pmb;
10666 unsigned long iflag;
10667
523128e5
JS
10668 /* Disable softirqs, including timers from obtaining phba->hbalock */
10669 local_bh_disable();
10670
04c68496
JS
10671 /* Flush all the mailbox commands in the mbox system */
10672 spin_lock_irqsave(&phba->hbalock, iflag);
523128e5 10673
04c68496
JS
10674 /* The pending mailbox command queue */
10675 list_splice_init(&phba->sli.mboxq, &completions);
10676 /* The outstanding active mailbox command */
10677 if (psli->mbox_active) {
10678 list_add_tail(&psli->mbox_active->list, &completions);
10679 psli->mbox_active = NULL;
10680 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10681 }
10682 /* The completed mailbox command queue */
10683 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
10684 spin_unlock_irqrestore(&phba->hbalock, iflag);
10685
523128e5
JS
10686 /* Enable softirqs again, done with phba->hbalock */
10687 local_bh_enable();
10688
04c68496
JS
10689 /* Return all flushed mailbox commands with MBX_NOT_FINISHED status */
10690 while (!list_empty(&completions)) {
10691 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
10692 pmb->u.mb.mbxStatus = MBX_NOT_FINISHED;
10693 if (pmb->mbox_cmpl)
10694 pmb->mbox_cmpl(phba, pmb);
10695 }
10696}
10697
e59058c4 10698/**
3621a710 10699 * lpfc_sli_host_down - Vport cleanup function
e59058c4
JS
10700 * @vport: Pointer to virtual port object.
10701 *
10702 * lpfc_sli_host_down is called to clean up the resources
10703 * associated with a vport before destroying virtual
10704 * port data structures.
10705 * This function does following operations:
10706 * - Free discovery resources associated with this virtual
10707 * port.
10708 * - Free iocbs associated with this virtual port in
10709 * the txq.
10710 * - Send abort for all iocb commands associated with this
10711 * vport in txcmplq.
10712 *
10713 * This function is called with no lock held and always returns 1.
10714 **/
92d7f7b0
JS
10715int
10716lpfc_sli_host_down(struct lpfc_vport *vport)
10717{
858c9f6c 10718 LIST_HEAD(completions);
92d7f7b0
JS
10719 struct lpfc_hba *phba = vport->phba;
10720 struct lpfc_sli *psli = &phba->sli;
895427bd 10721 struct lpfc_queue *qp = NULL;
92d7f7b0
JS
10722 struct lpfc_sli_ring *pring;
10723 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS
10724 int i;
10725 unsigned long flags = 0;
10726 uint16_t prev_pring_flag;
10727
10728 lpfc_cleanup_discovery_resources(vport);
10729
10730 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0 10731
895427bd
JS
10732 /*
10733 * Error everything on the txq since these iocbs
10734 * have not been given to the FW yet.
10735 * Also issue ABTS for everything on the txcmplq
10736 */
10737 if (phba->sli_rev != LPFC_SLI_REV4) {
10738 for (i = 0; i < psli->num_rings; i++) {
10739 pring = &psli->sli3_ring[i];
10740 prev_pring_flag = pring->flag;
10741 /* Only slow rings */
10742 if (pring->ringno == LPFC_ELS_RING) {
10743 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10744 /* Set the lpfc data pending flag */
10745 set_bit(LPFC_DATA_READY, &phba->data_flags);
10746 }
10747 list_for_each_entry_safe(iocb, next_iocb,
10748 &pring->txq, list) {
10749 if (iocb->vport != vport)
10750 continue;
10751 list_move_tail(&iocb->list, &completions);
10752 }
10753 list_for_each_entry_safe(iocb, next_iocb,
10754 &pring->txcmplq, list) {
10755 if (iocb->vport != vport)
10756 continue;
10757 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10758 }
10759 pring->flag = prev_pring_flag;
10760 }
10761 } else {
10762 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10763 pring = qp->pring;
10764 if (!pring)
92d7f7b0 10765 continue;
895427bd
JS
10766 if (pring == phba->sli4_hba.els_wq->pring) {
10767 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10768 /* Set the lpfc data pending flag */
10769 set_bit(LPFC_DATA_READY, &phba->data_flags);
10770 }
10771 prev_pring_flag = pring->flag;
65a3df63 10772 spin_lock(&pring->ring_lock);
895427bd
JS
10773 list_for_each_entry_safe(iocb, next_iocb,
10774 &pring->txq, list) {
10775 if (iocb->vport != vport)
10776 continue;
10777 list_move_tail(&iocb->list, &completions);
10778 }
65a3df63 10779 spin_unlock(&pring->ring_lock);
895427bd
JS
10780 list_for_each_entry_safe(iocb, next_iocb,
10781 &pring->txcmplq, list) {
10782 if (iocb->vport != vport)
10783 continue;
10784 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10785 }
10786 pring->flag = prev_pring_flag;
92d7f7b0 10787 }
92d7f7b0 10788 }
92d7f7b0
JS
10789 spin_unlock_irqrestore(&phba->hbalock, flags);
10790
a257bf90
JS
10791 /* Cancel all the IOCBs from the completions list */
10792 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10793 IOERR_SLI_DOWN);
92d7f7b0
JS
10794 return 1;
10795}
10796
e59058c4 10797/**
3621a710 10798 * lpfc_sli_hba_down - Resource cleanup function for the HBA
e59058c4
JS
10799 * @phba: Pointer to HBA context object.
10800 *
10801 * This function cleans up all iocb, buffers, mailbox commands
10802 * while shutting down the HBA. This function is called with no
10803 * lock held and always returns 1.
10804 * This function does the following to cleanup driver resources:
10805 * - Free discovery resources for each virtual port
10806 * - Cleanup any pending fabric iocbs
10807 * - Iterate through the iocb txq and free each entry
10808 * in the list.
10809 * - Free up any buffer posted to the HBA
10810 * - Free mailbox commands in the mailbox queue.
10811 **/
dea3101e 10812int
2e0fef85 10813lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 10814{
2534ba75 10815 LIST_HEAD(completions);
2e0fef85 10816 struct lpfc_sli *psli = &phba->sli;
895427bd 10817 struct lpfc_queue *qp = NULL;
dea3101e 10818 struct lpfc_sli_ring *pring;
0ff10d46 10819 struct lpfc_dmabuf *buf_ptr;
dea3101e 10820 unsigned long flags = 0;
04c68496
JS
10821 int i;
10822
10823 /* Shutdown the mailbox command sub-system */
618a5230 10824 lpfc_sli_mbox_sys_shutdown(phba, LPFC_MBX_WAIT);
dea3101e 10825
dea3101e
JB
10826 lpfc_hba_down_prep(phba);
10827
523128e5
JS
10828 /* Disable softirqs, including timers from obtaining phba->hbalock */
10829 local_bh_disable();
10830
92d7f7b0
JS
10831 lpfc_fabric_abort_hba(phba);
10832
2e0fef85 10833 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e 10834
895427bd
JS
10835 /*
10836 * Error everything on the txq since these iocbs
10837 * have not been given to the FW yet.
10838 */
10839 if (phba->sli_rev != LPFC_SLI_REV4) {
10840 for (i = 0; i < psli->num_rings; i++) {
10841 pring = &psli->sli3_ring[i];
10842 /* Only slow rings */
10843 if (pring->ringno == LPFC_ELS_RING) {
10844 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10845 /* Set the lpfc data pending flag */
10846 set_bit(LPFC_DATA_READY, &phba->data_flags);
10847 }
10848 list_splice_init(&pring->txq, &completions);
10849 }
10850 } else {
10851 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10852 pring = qp->pring;
10853 if (!pring)
10854 continue;
4b0a42be 10855 spin_lock(&pring->ring_lock);
895427bd 10856 list_splice_init(&pring->txq, &completions);
4b0a42be 10857 spin_unlock(&pring->ring_lock);
895427bd
JS
10858 if (pring == phba->sli4_hba.els_wq->pring) {
10859 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10860 /* Set the lpfc data pending flag */
10861 set_bit(LPFC_DATA_READY, &phba->data_flags);
10862 }
10863 }
2534ba75 10864 }
2e0fef85 10865 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 10866
a257bf90
JS
10867 /* Cancel all the IOCBs from the completions list */
10868 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10869 IOERR_SLI_DOWN);
dea3101e 10870
0ff10d46
JS
10871 spin_lock_irqsave(&phba->hbalock, flags);
10872 list_splice_init(&phba->elsbuf, &completions);
10873 phba->elsbuf_cnt = 0;
10874 phba->elsbuf_prev_cnt = 0;
10875 spin_unlock_irqrestore(&phba->hbalock, flags);
10876
10877 while (!list_empty(&completions)) {
10878 list_remove_head(&completions, buf_ptr,
10879 struct lpfc_dmabuf, list);
10880 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
10881 kfree(buf_ptr);
10882 }
10883
523128e5
JS
10884 /* Enable softirqs again, done with phba->hbalock */
10885 local_bh_enable();
10886
dea3101e
JB
10887 /* Return any active mbox cmds */
10888 del_timer_sync(&psli->mbox_tmo);
2e0fef85 10889
da0436e9 10890 spin_lock_irqsave(&phba->pport->work_port_lock, flags);
2e0fef85 10891 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
da0436e9 10892 spin_unlock_irqrestore(&phba->pport->work_port_lock, flags);
2e0fef85 10893
da0436e9
JS
10894 return 1;
10895}
10896
e59058c4 10897/**
3621a710 10898 * lpfc_sli_pcimem_bcopy - SLI memory copy function
e59058c4
JS
10899 * @srcp: Source memory pointer.
10900 * @destp: Destination memory pointer.
10901 * @cnt: Number of words required to be copied.
10902 *
10903 * This function is used for copying data between driver memory
10904 * and the SLI memory. This function also changes the endianness
10905 * of each word if native endianness is different from SLI
10906 * endianness. This function can be called with or without
10907 * lock.
10908 **/
dea3101e
JB
10909void
10910lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
10911{
10912 uint32_t *src = srcp;
10913 uint32_t *dest = destp;
10914 uint32_t ldata;
10915 int i;
10916
10917 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
10918 ldata = *src;
10919 ldata = le32_to_cpu(ldata);
10920 *dest = ldata;
10921 src++;
10922 dest++;
10923 }
10924}
10925
e59058c4 10926
a0c87cbd
JS
10927/**
10928 * lpfc_sli_bemem_bcopy - SLI memory copy function
10929 * @srcp: Source memory pointer.
10930 * @destp: Destination memory pointer.
10931 * @cnt: Number of words required to be copied.
10932 *
10933 * This function is used for copying data between a data structure
10934 * with big endian representation to local endianness.
10935 * This function can be called with or without lock.
10936 **/
10937void
10938lpfc_sli_bemem_bcopy(void *srcp, void *destp, uint32_t cnt)
10939{
10940 uint32_t *src = srcp;
10941 uint32_t *dest = destp;
10942 uint32_t ldata;
10943 int i;
10944
10945 for (i = 0; i < (int)cnt; i += sizeof(uint32_t)) {
10946 ldata = *src;
10947 ldata = be32_to_cpu(ldata);
10948 *dest = ldata;
10949 src++;
10950 dest++;
10951 }
10952}
10953
e59058c4 10954/**
3621a710 10955 * lpfc_sli_ringpostbuf_put - Function to add a buffer to postbufq
e59058c4
JS
10956 * @phba: Pointer to HBA context object.
10957 * @pring: Pointer to driver SLI ring object.
10958 * @mp: Pointer to driver buffer object.
10959 *
10960 * This function is called with no lock held.
10961 * It always return zero after adding the buffer to the postbufq
10962 * buffer list.
10963 **/
dea3101e 10964int
2e0fef85
JS
10965lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10966 struct lpfc_dmabuf *mp)
dea3101e
JB
10967{
10968 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
10969 later */
2e0fef85 10970 spin_lock_irq(&phba->hbalock);
dea3101e 10971 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 10972 pring->postbufq_cnt++;
2e0fef85 10973 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10974 return 0;
10975}
10976
e59058c4 10977/**
3621a710 10978 * lpfc_sli_get_buffer_tag - allocates a tag for a CMD_QUE_XRI64_CX buffer
e59058c4
JS
10979 * @phba: Pointer to HBA context object.
10980 *
10981 * When HBQ is enabled, buffers are searched based on tags. This function
10982 * allocates a tag for buffer posted using CMD_QUE_XRI64_CX iocb. The
10983 * tag is bit wise or-ed with QUE_BUFTAG_BIT to make sure that the tag
10984 * does not conflict with tags of buffer posted for unsolicited events.
10985 * The function returns the allocated tag. The function is called with
10986 * no locks held.
10987 **/
76bb24ef
JS
10988uint32_t
10989lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
10990{
10991 spin_lock_irq(&phba->hbalock);
10992 phba->buffer_tag_count++;
10993 /*
10994 * Always set the QUE_BUFTAG_BIT to distiguish between
10995 * a tag assigned by HBQ.
10996 */
10997 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
10998 spin_unlock_irq(&phba->hbalock);
10999 return phba->buffer_tag_count;
11000}
11001
e59058c4 11002/**
3621a710 11003 * lpfc_sli_ring_taggedbuf_get - find HBQ buffer associated with given tag
e59058c4
JS
11004 * @phba: Pointer to HBA context object.
11005 * @pring: Pointer to driver SLI ring object.
11006 * @tag: Buffer tag.
11007 *
11008 * Buffers posted using CMD_QUE_XRI64_CX iocb are in pring->postbufq
11009 * list. After HBA DMA data to these buffers, CMD_IOCB_RET_XRI64_CX
11010 * iocb is posted to the response ring with the tag of the buffer.
11011 * This function searches the pring->postbufq list using the tag
11012 * to find buffer associated with CMD_IOCB_RET_XRI64_CX
11013 * iocb. If the buffer is found then lpfc_dmabuf object of the
11014 * buffer is returned to the caller else NULL is returned.
11015 * This function is called with no lock held.
11016 **/
76bb24ef
JS
11017struct lpfc_dmabuf *
11018lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11019 uint32_t tag)
11020{
11021 struct lpfc_dmabuf *mp, *next_mp;
11022 struct list_head *slp = &pring->postbufq;
11023
25985edc 11024 /* Search postbufq, from the beginning, looking for a match on tag */
76bb24ef
JS
11025 spin_lock_irq(&phba->hbalock);
11026 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
11027 if (mp->buffer_tag == tag) {
11028 list_del_init(&mp->list);
11029 pring->postbufq_cnt--;
11030 spin_unlock_irq(&phba->hbalock);
11031 return mp;
11032 }
11033 }
11034
11035 spin_unlock_irq(&phba->hbalock);
11036 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 11037 "0402 Cannot find virtual addr for buffer tag on "
32350664 11038 "ring %d Data x%lx x%px x%px x%x\n",
76bb24ef
JS
11039 pring->ringno, (unsigned long) tag,
11040 slp->next, slp->prev, pring->postbufq_cnt);
11041
11042 return NULL;
11043}
dea3101e 11044
e59058c4 11045/**
3621a710 11046 * lpfc_sli_ringpostbuf_get - search buffers for unsolicited CT and ELS events
e59058c4
JS
11047 * @phba: Pointer to HBA context object.
11048 * @pring: Pointer to driver SLI ring object.
11049 * @phys: DMA address of the buffer.
11050 *
11051 * This function searches the buffer list using the dma_address
11052 * of unsolicited event to find the driver's lpfc_dmabuf object
11053 * corresponding to the dma_address. The function returns the
11054 * lpfc_dmabuf object if a buffer is found else it returns NULL.
11055 * This function is called by the ct and els unsolicited event
11056 * handlers to get the buffer associated with the unsolicited
11057 * event.
11058 *
11059 * This function is called with no lock held.
11060 **/
dea3101e
JB
11061struct lpfc_dmabuf *
11062lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11063 dma_addr_t phys)
11064{
11065 struct lpfc_dmabuf *mp, *next_mp;
11066 struct list_head *slp = &pring->postbufq;
11067
25985edc 11068 /* Search postbufq, from the beginning, looking for a match on phys */
2e0fef85 11069 spin_lock_irq(&phba->hbalock);
dea3101e
JB
11070 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
11071 if (mp->phys == phys) {
11072 list_del_init(&mp->list);
11073 pring->postbufq_cnt--;
2e0fef85 11074 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
11075 return mp;
11076 }
11077 }
11078
2e0fef85 11079 spin_unlock_irq(&phba->hbalock);
dea3101e 11080 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 11081 "0410 Cannot find virtual addr for mapped buf on "
32350664 11082 "ring %d Data x%llx x%px x%px x%x\n",
e8b62011 11083 pring->ringno, (unsigned long long)phys,
dea3101e
JB
11084 slp->next, slp->prev, pring->postbufq_cnt);
11085 return NULL;
11086}
11087
e59058c4 11088/**
3621a710 11089 * lpfc_sli_abort_els_cmpl - Completion handler for the els abort iocbs
e59058c4
JS
11090 * @phba: Pointer to HBA context object.
11091 * @cmdiocb: Pointer to driver command iocb object.
11092 * @rspiocb: Pointer to driver response iocb object.
11093 *
11094 * This function is the completion handler for the abort iocbs for
11095 * ELS commands. This function is called from the ELS ring event
11096 * handler with no lock held. This function frees memory resources
11097 * associated with the abort iocb.
11098 **/
dea3101e 11099static void
2e0fef85
JS
11100lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11101 struct lpfc_iocbq *rspiocb)
dea3101e 11102{
2e0fef85 11103 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 11104 uint16_t abort_iotag, abort_context;
ff78d8f9 11105 struct lpfc_iocbq *abort_iocb = NULL;
2680eeaa
JS
11106
11107 if (irsp->ulpStatus) {
ff78d8f9
JS
11108
11109 /*
11110 * Assume that the port already completed and returned, or
11111 * will return the iocb. Just Log the message.
11112 */
2680eeaa
JS
11113 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
11114 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
11115
2e0fef85 11116 spin_lock_irq(&phba->hbalock);
45ed1190 11117 if (phba->sli_rev < LPFC_SLI_REV4) {
faa832e9
JS
11118 if (irsp->ulpCommand == CMD_ABORT_XRI_CX &&
11119 irsp->ulpStatus == IOSTAT_LOCAL_REJECT &&
11120 irsp->un.ulpWord[4] == IOERR_ABORT_REQUESTED) {
11121 spin_unlock_irq(&phba->hbalock);
11122 goto release_iocb;
11123 }
45ed1190
JS
11124 if (abort_iotag != 0 &&
11125 abort_iotag <= phba->sli.last_iotag)
11126 abort_iocb =
11127 phba->sli.iocbq_lookup[abort_iotag];
11128 } else
11129 /* For sli4 the abort_tag is the XRI,
11130 * so the abort routine puts the iotag of the iocb
11131 * being aborted in the context field of the abort
11132 * IOCB.
11133 */
11134 abort_iocb = phba->sli.iocbq_lookup[abort_context];
2680eeaa 11135
2a9bf3d0 11136 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS | LOG_SLI,
32350664 11137 "0327 Cannot abort els iocb x%px "
2a9bf3d0
JS
11138 "with tag %x context %x, abort status %x, "
11139 "abort code %x\n",
11140 abort_iocb, abort_iotag, abort_context,
11141 irsp->ulpStatus, irsp->un.ulpWord[4]);
341af102 11142
ff78d8f9 11143 spin_unlock_irq(&phba->hbalock);
2680eeaa 11144 }
faa832e9 11145release_iocb:
604a3e30 11146 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB
11147 return;
11148}
11149
e59058c4 11150/**
3621a710 11151 * lpfc_ignore_els_cmpl - Completion handler for aborted ELS command
e59058c4
JS
11152 * @phba: Pointer to HBA context object.
11153 * @cmdiocb: Pointer to driver command iocb object.
11154 * @rspiocb: Pointer to driver response iocb object.
11155 *
11156 * The function is called from SLI ring event handler with no
11157 * lock held. This function is the completion handler for ELS commands
11158 * which are aborted. The function frees memory resources used for
11159 * the aborted ELS commands.
11160 **/
92d7f7b0
JS
11161static void
11162lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11163 struct lpfc_iocbq *rspiocb)
11164{
11165 IOCB_t *irsp = &rspiocb->iocb;
11166
11167 /* ELS cmd tag <ulpIoTag> completes */
11168 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
d7c255b2 11169 "0139 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 11170 "x%x x%x x%x\n",
e8b62011 11171 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 11172 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS
11173 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
11174 lpfc_ct_free_iocb(phba, cmdiocb);
11175 else
11176 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS
11177 return;
11178}
11179
e59058c4 11180/**
5af5eee7 11181 * lpfc_sli_abort_iotag_issue - Issue abort for a command iocb
e59058c4
JS
11182 * @phba: Pointer to HBA context object.
11183 * @pring: Pointer to driver SLI ring object.
11184 * @cmdiocb: Pointer to driver command iocb object.
11185 *
5af5eee7
JS
11186 * This function issues an abort iocb for the provided command iocb down to
11187 * the port. Other than the case the outstanding command iocb is an abort
11188 * request, this function issues abort out unconditionally. This function is
11189 * called with hbalock held. The function returns 0 when it fails due to
11190 * memory allocation failure or when the command iocb is an abort request.
e59058c4 11191 **/
5af5eee7
JS
11192static int
11193lpfc_sli_abort_iotag_issue(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 11194 struct lpfc_iocbq *cmdiocb)
dea3101e 11195{
2e0fef85 11196 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 11197 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB
11198 IOCB_t *icmd = NULL;
11199 IOCB_t *iabt = NULL;
5af5eee7 11200 int retval;
7e56aa25 11201 unsigned long iflags;
faa832e9 11202 struct lpfc_nodelist *ndlp;
07951076 11203
1c2ba475
JT
11204 lockdep_assert_held(&phba->hbalock);
11205
92d7f7b0
JS
11206 /*
11207 * There are certain command types we don't want to abort. And we
11208 * don't want to abort commands that are already in the process of
11209 * being aborted.
07951076
JS
11210 */
11211 icmd = &cmdiocb->iocb;
2e0fef85 11212 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS
11213 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11214 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS
11215 return 0;
11216
dea3101e 11217 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 11218 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
11219 if (abtsiocbp == NULL)
11220 return 0;
dea3101e 11221
07951076 11222 /* This signals the response to set the correct status
341af102 11223 * before calling the completion handler
07951076
JS
11224 */
11225 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
11226
dea3101e 11227 iabt = &abtsiocbp->iocb;
07951076
JS
11228 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
11229 iabt->un.acxri.abortContextTag = icmd->ulpContext;
45ed1190 11230 if (phba->sli_rev == LPFC_SLI_REV4) {
da0436e9 11231 iabt->un.acxri.abortIoTag = cmdiocb->sli4_xritag;
45ed1190 11232 iabt->un.acxri.abortContextTag = cmdiocb->iotag;
faa832e9 11233 } else {
da0436e9 11234 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
faa832e9
JS
11235 if (pring->ringno == LPFC_ELS_RING) {
11236 ndlp = (struct lpfc_nodelist *)(cmdiocb->context1);
11237 iabt->un.acxri.abortContextTag = ndlp->nlp_rpi;
11238 }
11239 }
07951076
JS
11240 iabt->ulpLe = 1;
11241 iabt->ulpClass = icmd->ulpClass;
dea3101e 11242
5ffc266e 11243 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11244 abtsiocbp->hba_wqidx = cmdiocb->hba_wqidx;
341af102
JS
11245 if (cmdiocb->iocb_flag & LPFC_IO_FCP)
11246 abtsiocbp->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11247 if (cmdiocb->iocb_flag & LPFC_IO_FOF)
11248 abtsiocbp->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11249
2e0fef85 11250 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS
11251 iabt->ulpCommand = CMD_ABORT_XRI_CN;
11252 else
11253 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 11254
07951076 11255 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
e6c6acc0 11256 abtsiocbp->vport = vport;
5b8bd0c9 11257
e8b62011
JS
11258 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
11259 "0339 Abort xri x%x, original iotag x%x, "
11260 "abort cmd iotag x%x\n",
2a9bf3d0 11261 iabt->un.acxri.abortIoTag,
e8b62011 11262 iabt->un.acxri.abortContextTag,
2a9bf3d0 11263 abtsiocbp->iotag);
7e56aa25
JS
11264
11265 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
11266 pring = lpfc_sli4_calc_ring(phba, abtsiocbp);
11267 if (unlikely(pring == NULL))
9bd2bff5 11268 return 0;
7e56aa25
JS
11269 /* Note: both hbalock and ring_lock need to be set here */
11270 spin_lock_irqsave(&pring->ring_lock, iflags);
11271 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11272 abtsiocbp, 0);
11273 spin_unlock_irqrestore(&pring->ring_lock, iflags);
11274 } else {
11275 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11276 abtsiocbp, 0);
11277 }
dea3101e 11278
d7c255b2
JS
11279 if (retval)
11280 __lpfc_sli_release_iocbq(phba, abtsiocbp);
5af5eee7
JS
11281
11282 /*
11283 * Caller to this routine should check for IOCB_ERROR
11284 * and handle it properly. This routine no longer removes
11285 * iocb off txcmplq and call compl in case of IOCB_ERROR.
11286 */
11287 return retval;
11288}
11289
11290/**
11291 * lpfc_sli_issue_abort_iotag - Abort function for a command iocb
11292 * @phba: Pointer to HBA context object.
11293 * @pring: Pointer to driver SLI ring object.
11294 * @cmdiocb: Pointer to driver command iocb object.
11295 *
11296 * This function issues an abort iocb for the provided command iocb. In case
11297 * of unloading, the abort iocb will not be issued to commands on the ELS
11298 * ring. Instead, the callback function shall be changed to those commands
11299 * so that nothing happens when them finishes. This function is called with
11300 * hbalock held. The function returns 0 when the command iocb is an abort
11301 * request.
11302 **/
11303int
11304lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11305 struct lpfc_iocbq *cmdiocb)
11306{
11307 struct lpfc_vport *vport = cmdiocb->vport;
11308 int retval = IOCB_ERROR;
11309 IOCB_t *icmd = NULL;
11310
1c2ba475
JT
11311 lockdep_assert_held(&phba->hbalock);
11312
5af5eee7
JS
11313 /*
11314 * There are certain command types we don't want to abort. And we
11315 * don't want to abort commands that are already in the process of
11316 * being aborted.
11317 */
11318 icmd = &cmdiocb->iocb;
11319 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
11320 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11321 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
11322 return 0;
11323
1234a6d5
DK
11324 if (!pring) {
11325 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11326 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11327 else
11328 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11329 goto abort_iotag_exit;
11330 }
11331
5af5eee7
JS
11332 /*
11333 * If we're unloading, don't abort iocb on the ELS ring, but change
11334 * the callback so that nothing happens when it finishes.
11335 */
11336 if ((vport->load_flag & FC_UNLOADING) &&
11337 (pring->ringno == LPFC_ELS_RING)) {
11338 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11339 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11340 else
11341 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11342 goto abort_iotag_exit;
11343 }
11344
11345 /* Now, we try to issue the abort to the cmdiocb out */
11346 retval = lpfc_sli_abort_iotag_issue(phba, pring, cmdiocb);
11347
07951076 11348abort_iotag_exit:
2e0fef85
JS
11349 /*
11350 * Caller to this routine should check for IOCB_ERROR
11351 * and handle it properly. This routine no longer removes
11352 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 11353 */
2e0fef85 11354 return retval;
dea3101e
JB
11355}
11356
5af5eee7
JS
11357/**
11358 * lpfc_sli_hba_iocb_abort - Abort all iocbs to an hba.
11359 * @phba: pointer to lpfc HBA data structure.
11360 *
11361 * This routine will abort all pending and outstanding iocbs to an HBA.
11362 **/
11363void
11364lpfc_sli_hba_iocb_abort(struct lpfc_hba *phba)
11365{
11366 struct lpfc_sli *psli = &phba->sli;
11367 struct lpfc_sli_ring *pring;
895427bd 11368 struct lpfc_queue *qp = NULL;
5af5eee7
JS
11369 int i;
11370
895427bd
JS
11371 if (phba->sli_rev != LPFC_SLI_REV4) {
11372 for (i = 0; i < psli->num_rings; i++) {
11373 pring = &psli->sli3_ring[i];
11374 lpfc_sli_abort_iocb_ring(phba, pring);
11375 }
11376 return;
11377 }
11378 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
11379 pring = qp->pring;
11380 if (!pring)
11381 continue;
db55fba8 11382 lpfc_sli_abort_iocb_ring(phba, pring);
5af5eee7
JS
11383 }
11384}
11385
e59058c4 11386/**
3621a710 11387 * lpfc_sli_validate_fcp_iocb - find commands associated with a vport or LUN
e59058c4
JS
11388 * @iocbq: Pointer to driver iocb object.
11389 * @vport: Pointer to driver virtual port object.
11390 * @tgt_id: SCSI ID of the target.
11391 * @lun_id: LUN ID of the scsi device.
11392 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST
11393 *
3621a710 11394 * This function acts as an iocb filter for functions which abort or count
e59058c4
JS
11395 * all FCP iocbs pending on a lun/SCSI target/SCSI host. It will return
11396 * 0 if the filtering criteria is met for the given iocb and will return
11397 * 1 if the filtering criteria is not met.
11398 * If ctx_cmd == LPFC_CTX_LUN, the function returns 0 only if the
11399 * given iocb is for the SCSI device specified by vport, tgt_id and
11400 * lun_id parameter.
11401 * If ctx_cmd == LPFC_CTX_TGT, the function returns 0 only if the
11402 * given iocb is for the SCSI target specified by vport and tgt_id
11403 * parameters.
11404 * If ctx_cmd == LPFC_CTX_HOST, the function returns 0 only if the
11405 * given iocb is for the SCSI host associated with the given vport.
11406 * This function is called with no locks held.
11407 **/
dea3101e 11408static int
51ef4c26
JS
11409lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
11410 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 11411 lpfc_ctx_cmd ctx_cmd)
dea3101e 11412{
c490850a 11413 struct lpfc_io_buf *lpfc_cmd;
dea3101e
JB
11414 int rc = 1;
11415
b0e83012 11416 if (iocbq->vport != vport)
0bd4ca25
JSEC
11417 return rc;
11418
b0e83012
JS
11419 if (!(iocbq->iocb_flag & LPFC_IO_FCP) ||
11420 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ))
51ef4c26
JS
11421 return rc;
11422
c490850a 11423 lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq);
0bd4ca25 11424
495a714c 11425 if (lpfc_cmd->pCmd == NULL)
dea3101e
JB
11426 return rc;
11427
11428 switch (ctx_cmd) {
11429 case LPFC_CTX_LUN:
b0e83012 11430 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c
JS
11431 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id) &&
11432 (scsilun_to_int(&lpfc_cmd->fcp_cmnd->fcp_lun) == lun_id))
dea3101e
JB
11433 rc = 0;
11434 break;
11435 case LPFC_CTX_TGT:
b0e83012 11436 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c 11437 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id))
dea3101e
JB
11438 rc = 0;
11439 break;
dea3101e
JB
11440 case LPFC_CTX_HOST:
11441 rc = 0;
11442 break;
11443 default:
11444 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
cadbd4a5 11445 __func__, ctx_cmd);
dea3101e
JB
11446 break;
11447 }
11448
11449 return rc;
11450}
11451
e59058c4 11452/**
3621a710 11453 * lpfc_sli_sum_iocb - Function to count the number of FCP iocbs pending
e59058c4
JS
11454 * @vport: Pointer to virtual port.
11455 * @tgt_id: SCSI ID of the target.
11456 * @lun_id: LUN ID of the scsi device.
11457 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11458 *
11459 * This function returns number of FCP commands pending for the vport.
11460 * When ctx_cmd == LPFC_CTX_LUN, the function returns number of FCP
11461 * commands pending on the vport associated with SCSI device specified
11462 * by tgt_id and lun_id parameters.
11463 * When ctx_cmd == LPFC_CTX_TGT, the function returns number of FCP
11464 * commands pending on the vport associated with SCSI target specified
11465 * by tgt_id parameter.
11466 * When ctx_cmd == LPFC_CTX_HOST, the function returns number of FCP
11467 * commands pending on the vport.
11468 * This function returns the number of iocbs which satisfy the filter.
11469 * This function is called without any lock held.
11470 **/
dea3101e 11471int
51ef4c26
JS
11472lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
11473 lpfc_ctx_cmd ctx_cmd)
dea3101e 11474{
51ef4c26 11475 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11476 struct lpfc_iocbq *iocbq;
11477 int sum, i;
dea3101e 11478
31979008 11479 spin_lock_irq(&phba->hbalock);
0bd4ca25
JSEC
11480 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
11481 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11482
51ef4c26
JS
11483 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
11484 ctx_cmd) == 0)
0bd4ca25 11485 sum++;
dea3101e 11486 }
31979008 11487 spin_unlock_irq(&phba->hbalock);
0bd4ca25 11488
dea3101e
JB
11489 return sum;
11490}
11491
e59058c4 11492/**
3621a710 11493 * lpfc_sli_abort_fcp_cmpl - Completion handler function for aborted FCP IOCBs
e59058c4
JS
11494 * @phba: Pointer to HBA context object
11495 * @cmdiocb: Pointer to command iocb object.
11496 * @rspiocb: Pointer to response iocb object.
11497 *
11498 * This function is called when an aborted FCP iocb completes. This
11499 * function is called by the ring event handler with no lock held.
11500 * This function frees the iocb.
11501 **/
5eb95af0 11502void
2e0fef85
JS
11503lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11504 struct lpfc_iocbq *rspiocb)
5eb95af0 11505{
cb69f7de 11506 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8e668af5 11507 "3096 ABORT_XRI_CN completing on rpi x%x "
cb69f7de
JS
11508 "original iotag x%x, abort cmd iotag x%x "
11509 "status 0x%x, reason 0x%x\n",
11510 cmdiocb->iocb.un.acxri.abortContextTag,
11511 cmdiocb->iocb.un.acxri.abortIoTag,
11512 cmdiocb->iotag, rspiocb->iocb.ulpStatus,
11513 rspiocb->iocb.un.ulpWord[4]);
604a3e30 11514 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC
11515 return;
11516}
11517
e59058c4 11518/**
3621a710 11519 * lpfc_sli_abort_iocb - issue abort for all commands on a host/target/LUN
e59058c4
JS
11520 * @vport: Pointer to virtual port.
11521 * @pring: Pointer to driver SLI ring object.
11522 * @tgt_id: SCSI ID of the target.
11523 * @lun_id: LUN ID of the scsi device.
11524 * @abort_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11525 *
11526 * This function sends an abort command for every SCSI command
11527 * associated with the given virtual port pending on the ring
11528 * filtered by lpfc_sli_validate_fcp_iocb function.
11529 * When abort_cmd == LPFC_CTX_LUN, the function sends abort only to the
11530 * FCP iocbs associated with lun specified by tgt_id and lun_id
11531 * parameters
11532 * When abort_cmd == LPFC_CTX_TGT, the function sends abort only to the
11533 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11534 * When abort_cmd == LPFC_CTX_HOST, the function sends abort to all
11535 * FCP iocbs associated with virtual port.
11536 * This function returns number of iocbs it failed to abort.
11537 * This function is called with no locks held.
11538 **/
dea3101e 11539int
51ef4c26
JS
11540lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11541 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 11542{
51ef4c26 11543 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11544 struct lpfc_iocbq *iocbq;
11545 struct lpfc_iocbq *abtsiocb;
ecbb227e 11546 struct lpfc_sli_ring *pring_s4;
dea3101e 11547 IOCB_t *cmd = NULL;
dea3101e 11548 int errcnt = 0, ret_val = 0;
0bd4ca25 11549 int i;
dea3101e 11550
b0e83012 11551 /* all I/Os are in process of being flushed */
c00f62e6 11552 if (phba->hba_flag & HBA_IOQ_FLUSH)
b0e83012
JS
11553 return errcnt;
11554
0bd4ca25
JSEC
11555 for (i = 1; i <= phba->sli.last_iotag; i++) {
11556 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11557
51ef4c26 11558 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 11559 abort_cmd) != 0)
dea3101e
JB
11560 continue;
11561
afbd8d88
JS
11562 /*
11563 * If the iocbq is already being aborted, don't take a second
11564 * action, but do count it.
11565 */
11566 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11567 continue;
11568
dea3101e 11569 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 11570 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
11571 if (abtsiocb == NULL) {
11572 errcnt++;
11573 continue;
11574 }
dea3101e 11575
afbd8d88
JS
11576 /* indicate the IO is being aborted by the driver. */
11577 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11578
0bd4ca25 11579 cmd = &iocbq->iocb;
dea3101e
JB
11580 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11581 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
da0436e9
JS
11582 if (phba->sli_rev == LPFC_SLI_REV4)
11583 abtsiocb->iocb.un.acxri.abortIoTag = iocbq->sli4_xritag;
11584 else
11585 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
dea3101e
JB
11586 abtsiocb->iocb.ulpLe = 1;
11587 abtsiocb->iocb.ulpClass = cmd->ulpClass;
afbd8d88 11588 abtsiocb->vport = vport;
dea3101e 11589
5ffc266e 11590 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11591 abtsiocb->hba_wqidx = iocbq->hba_wqidx;
341af102
JS
11592 if (iocbq->iocb_flag & LPFC_IO_FCP)
11593 abtsiocb->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11594 if (iocbq->iocb_flag & LPFC_IO_FOF)
11595 abtsiocb->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11596
2e0fef85 11597 if (lpfc_is_link_up(phba))
dea3101e
JB
11598 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11599 else
11600 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11601
5eb95af0
JSEC
11602 /* Setup callback routine and issue the command. */
11603 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
ecbb227e
JS
11604 if (phba->sli_rev == LPFC_SLI_REV4) {
11605 pring_s4 = lpfc_sli4_calc_ring(phba, iocbq);
11606 if (!pring_s4)
11607 continue;
11608 ret_val = lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11609 abtsiocb, 0);
11610 } else
11611 ret_val = lpfc_sli_issue_iocb(phba, pring->ringno,
11612 abtsiocb, 0);
dea3101e 11613 if (ret_val == IOCB_ERROR) {
604a3e30 11614 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB
11615 errcnt++;
11616 continue;
11617 }
11618 }
11619
11620 return errcnt;
11621}
11622
98912dda
JS
11623/**
11624 * lpfc_sli_abort_taskmgmt - issue abort for all commands on a host/target/LUN
11625 * @vport: Pointer to virtual port.
11626 * @pring: Pointer to driver SLI ring object.
11627 * @tgt_id: SCSI ID of the target.
11628 * @lun_id: LUN ID of the scsi device.
11629 * @taskmgmt_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11630 *
11631 * This function sends an abort command for every SCSI command
11632 * associated with the given virtual port pending on the ring
11633 * filtered by lpfc_sli_validate_fcp_iocb function.
11634 * When taskmgmt_cmd == LPFC_CTX_LUN, the function sends abort only to the
11635 * FCP iocbs associated with lun specified by tgt_id and lun_id
11636 * parameters
11637 * When taskmgmt_cmd == LPFC_CTX_TGT, the function sends abort only to the
11638 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11639 * When taskmgmt_cmd == LPFC_CTX_HOST, the function sends abort to all
11640 * FCP iocbs associated with virtual port.
11641 * This function returns number of iocbs it aborted .
11642 * This function is called with no locks held right after a taskmgmt
11643 * command is sent.
11644 **/
11645int
11646lpfc_sli_abort_taskmgmt(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11647 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd cmd)
11648{
11649 struct lpfc_hba *phba = vport->phba;
c490850a 11650 struct lpfc_io_buf *lpfc_cmd;
98912dda 11651 struct lpfc_iocbq *abtsiocbq;
8c50d25c 11652 struct lpfc_nodelist *ndlp;
98912dda
JS
11653 struct lpfc_iocbq *iocbq;
11654 IOCB_t *icmd;
11655 int sum, i, ret_val;
11656 unsigned long iflags;
c2017260 11657 struct lpfc_sli_ring *pring_s4 = NULL;
98912dda 11658
59c68eaa 11659 spin_lock_irqsave(&phba->hbalock, iflags);
98912dda
JS
11660
11661 /* all I/Os are in process of being flushed */
c00f62e6 11662 if (phba->hba_flag & HBA_IOQ_FLUSH) {
59c68eaa 11663 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11664 return 0;
11665 }
11666 sum = 0;
11667
11668 for (i = 1; i <= phba->sli.last_iotag; i++) {
11669 iocbq = phba->sli.iocbq_lookup[i];
11670
11671 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
11672 cmd) != 0)
11673 continue;
11674
c2017260
JS
11675 /* Guard against IO completion being called at same time */
11676 lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq);
11677 spin_lock(&lpfc_cmd->buf_lock);
11678
11679 if (!lpfc_cmd->pCmd) {
11680 spin_unlock(&lpfc_cmd->buf_lock);
11681 continue;
11682 }
11683
11684 if (phba->sli_rev == LPFC_SLI_REV4) {
11685 pring_s4 =
c00f62e6 11686 phba->sli4_hba.hdwq[iocbq->hba_wqidx].io_wq->pring;
c2017260
JS
11687 if (!pring_s4) {
11688 spin_unlock(&lpfc_cmd->buf_lock);
11689 continue;
11690 }
11691 /* Note: both hbalock and ring_lock must be set here */
11692 spin_lock(&pring_s4->ring_lock);
11693 }
11694
98912dda
JS
11695 /*
11696 * If the iocbq is already being aborted, don't take a second
11697 * action, but do count it.
11698 */
c2017260
JS
11699 if ((iocbq->iocb_flag & LPFC_DRIVER_ABORTED) ||
11700 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ)) {
11701 if (phba->sli_rev == LPFC_SLI_REV4)
11702 spin_unlock(&pring_s4->ring_lock);
11703 spin_unlock(&lpfc_cmd->buf_lock);
98912dda 11704 continue;
c2017260 11705 }
98912dda
JS
11706
11707 /* issue ABTS for this IOCB based on iotag */
11708 abtsiocbq = __lpfc_sli_get_iocbq(phba);
c2017260
JS
11709 if (!abtsiocbq) {
11710 if (phba->sli_rev == LPFC_SLI_REV4)
11711 spin_unlock(&pring_s4->ring_lock);
11712 spin_unlock(&lpfc_cmd->buf_lock);
98912dda 11713 continue;
c2017260 11714 }
98912dda
JS
11715
11716 icmd = &iocbq->iocb;
11717 abtsiocbq->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11718 abtsiocbq->iocb.un.acxri.abortContextTag = icmd->ulpContext;
11719 if (phba->sli_rev == LPFC_SLI_REV4)
11720 abtsiocbq->iocb.un.acxri.abortIoTag =
11721 iocbq->sli4_xritag;
11722 else
11723 abtsiocbq->iocb.un.acxri.abortIoTag = icmd->ulpIoTag;
11724 abtsiocbq->iocb.ulpLe = 1;
11725 abtsiocbq->iocb.ulpClass = icmd->ulpClass;
11726 abtsiocbq->vport = vport;
11727
11728 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11729 abtsiocbq->hba_wqidx = iocbq->hba_wqidx;
98912dda
JS
11730 if (iocbq->iocb_flag & LPFC_IO_FCP)
11731 abtsiocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11732 if (iocbq->iocb_flag & LPFC_IO_FOF)
11733 abtsiocbq->iocb_flag |= LPFC_IO_FOF;
98912dda 11734
8c50d25c
JS
11735 ndlp = lpfc_cmd->rdata->pnode;
11736
11737 if (lpfc_is_link_up(phba) &&
11738 (ndlp && ndlp->nlp_state == NLP_STE_MAPPED_NODE))
98912dda
JS
11739 abtsiocbq->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11740 else
11741 abtsiocbq->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11742
11743 /* Setup callback routine and issue the command. */
11744 abtsiocbq->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
11745
11746 /*
11747 * Indicate the IO is being aborted by the driver and set
11748 * the caller's flag into the aborted IO.
11749 */
11750 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11751
11752 if (phba->sli_rev == LPFC_SLI_REV4) {
98912dda
JS
11753 ret_val = __lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11754 abtsiocbq, 0);
59c68eaa 11755 spin_unlock(&pring_s4->ring_lock);
98912dda
JS
11756 } else {
11757 ret_val = __lpfc_sli_issue_iocb(phba, pring->ringno,
11758 abtsiocbq, 0);
11759 }
11760
c2017260 11761 spin_unlock(&lpfc_cmd->buf_lock);
98912dda
JS
11762
11763 if (ret_val == IOCB_ERROR)
11764 __lpfc_sli_release_iocbq(phba, abtsiocbq);
11765 else
11766 sum++;
11767 }
59c68eaa 11768 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11769 return sum;
11770}
11771
e59058c4 11772/**
3621a710 11773 * lpfc_sli_wake_iocb_wait - lpfc_sli_issue_iocb_wait's completion handler
e59058c4
JS
11774 * @phba: Pointer to HBA context object.
11775 * @cmdiocbq: Pointer to command iocb.
11776 * @rspiocbq: Pointer to response iocb.
11777 *
11778 * This function is the completion handler for iocbs issued using
11779 * lpfc_sli_issue_iocb_wait function. This function is called by the
11780 * ring event handler function without any lock held. This function
11781 * can be called from both worker thread context and interrupt
11782 * context. This function also can be called from other thread which
11783 * cleans up the SLI layer objects.
11784 * This function copy the contents of the response iocb to the
11785 * response iocb memory object provided by the caller of
11786 * lpfc_sli_issue_iocb_wait and then wakes up the thread which
11787 * sleeps for the iocb completion.
11788 **/
68876920
JSEC
11789static void
11790lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
11791 struct lpfc_iocbq *cmdiocbq,
11792 struct lpfc_iocbq *rspiocbq)
dea3101e 11793{
68876920
JSEC
11794 wait_queue_head_t *pdone_q;
11795 unsigned long iflags;
c490850a 11796 struct lpfc_io_buf *lpfc_cmd;
dea3101e 11797
2e0fef85 11798 spin_lock_irqsave(&phba->hbalock, iflags);
5a0916b4
JS
11799 if (cmdiocbq->iocb_flag & LPFC_IO_WAKE_TMO) {
11800
11801 /*
11802 * A time out has occurred for the iocb. If a time out
11803 * completion handler has been supplied, call it. Otherwise,
11804 * just free the iocbq.
11805 */
11806
11807 spin_unlock_irqrestore(&phba->hbalock, iflags);
11808 cmdiocbq->iocb_cmpl = cmdiocbq->wait_iocb_cmpl;
11809 cmdiocbq->wait_iocb_cmpl = NULL;
11810 if (cmdiocbq->iocb_cmpl)
11811 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, NULL);
11812 else
11813 lpfc_sli_release_iocbq(phba, cmdiocbq);
11814 return;
11815 }
11816
68876920
JSEC
11817 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
11818 if (cmdiocbq->context2 && rspiocbq)
11819 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
11820 &rspiocbq->iocb, sizeof(IOCB_t));
11821
0f65ff68
JS
11822 /* Set the exchange busy flag for task management commands */
11823 if ((cmdiocbq->iocb_flag & LPFC_IO_FCP) &&
11824 !(cmdiocbq->iocb_flag & LPFC_IO_LIBDFC)) {
c490850a 11825 lpfc_cmd = container_of(cmdiocbq, struct lpfc_io_buf,
0f65ff68 11826 cur_iocbq);
324e1c40
JS
11827 if (rspiocbq && (rspiocbq->iocb_flag & LPFC_EXCHANGE_BUSY))
11828 lpfc_cmd->flags |= LPFC_SBUF_XBUSY;
11829 else
11830 lpfc_cmd->flags &= ~LPFC_SBUF_XBUSY;
0f65ff68
JS
11831 }
11832
68876920 11833 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC
11834 if (pdone_q)
11835 wake_up(pdone_q);
858c9f6c 11836 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB
11837 return;
11838}
11839
d11e31dd
JS
11840/**
11841 * lpfc_chk_iocb_flg - Test IOCB flag with lock held.
11842 * @phba: Pointer to HBA context object..
11843 * @piocbq: Pointer to command iocb.
11844 * @flag: Flag to test.
11845 *
11846 * This routine grabs the hbalock and then test the iocb_flag to
11847 * see if the passed in flag is set.
11848 * Returns:
11849 * 1 if flag is set.
11850 * 0 if flag is not set.
11851 **/
11852static int
11853lpfc_chk_iocb_flg(struct lpfc_hba *phba,
11854 struct lpfc_iocbq *piocbq, uint32_t flag)
11855{
11856 unsigned long iflags;
11857 int ret;
11858
11859 spin_lock_irqsave(&phba->hbalock, iflags);
11860 ret = piocbq->iocb_flag & flag;
11861 spin_unlock_irqrestore(&phba->hbalock, iflags);
11862 return ret;
11863
11864}
11865
e59058c4 11866/**
3621a710 11867 * lpfc_sli_issue_iocb_wait - Synchronous function to issue iocb commands
e59058c4
JS
11868 * @phba: Pointer to HBA context object..
11869 * @pring: Pointer to sli ring.
11870 * @piocb: Pointer to command iocb.
11871 * @prspiocbq: Pointer to response iocb.
11872 * @timeout: Timeout in number of seconds.
11873 *
11874 * This function issues the iocb to firmware and waits for the
5a0916b4
JS
11875 * iocb to complete. The iocb_cmpl field of the shall be used
11876 * to handle iocbs which time out. If the field is NULL, the
11877 * function shall free the iocbq structure. If more clean up is
11878 * needed, the caller is expected to provide a completion function
11879 * that will provide the needed clean up. If the iocb command is
11880 * not completed within timeout seconds, the function will either
11881 * free the iocbq structure (if iocb_cmpl == NULL) or execute the
11882 * completion function set in the iocb_cmpl field and then return
11883 * a status of IOCB_TIMEDOUT. The caller should not free the iocb
11884 * resources if this function returns IOCB_TIMEDOUT.
e59058c4
JS
11885 * The function waits for the iocb completion using an
11886 * non-interruptible wait.
11887 * This function will sleep while waiting for iocb completion.
11888 * So, this function should not be called from any context which
11889 * does not allow sleeping. Due to the same reason, this function
11890 * cannot be called with interrupt disabled.
11891 * This function assumes that the iocb completions occur while
11892 * this function sleep. So, this function cannot be called from
11893 * the thread which process iocb completion for this ring.
11894 * This function clears the iocb_flag of the iocb object before
11895 * issuing the iocb and the iocb completion handler sets this
11896 * flag and wakes this thread when the iocb completes.
11897 * The contents of the response iocb will be copied to prspiocbq
11898 * by the completion handler when the command completes.
11899 * This function returns IOCB_SUCCESS when success.
11900 * This function is called with no lock held.
11901 **/
dea3101e 11902int
2e0fef85 11903lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
da0436e9 11904 uint32_t ring_number,
2e0fef85
JS
11905 struct lpfc_iocbq *piocb,
11906 struct lpfc_iocbq *prspiocbq,
68876920 11907 uint32_t timeout)
dea3101e 11908{
7259f0d0 11909 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC
11910 long timeleft, timeout_req = 0;
11911 int retval = IOCB_SUCCESS;
875fbdfe 11912 uint32_t creg_val;
0e9bb8d7
JS
11913 struct lpfc_iocbq *iocb;
11914 int txq_cnt = 0;
11915 int txcmplq_cnt = 0;
895427bd 11916 struct lpfc_sli_ring *pring;
5a0916b4
JS
11917 unsigned long iflags;
11918 bool iocb_completed = true;
11919
895427bd
JS
11920 if (phba->sli_rev >= LPFC_SLI_REV4)
11921 pring = lpfc_sli4_calc_ring(phba, piocb);
11922 else
11923 pring = &phba->sli.sli3_ring[ring_number];
dea3101e 11924 /*
68876920
JSEC
11925 * If the caller has provided a response iocbq buffer, then context2
11926 * is NULL or its an error.
dea3101e 11927 */
68876920
JSEC
11928 if (prspiocbq) {
11929 if (piocb->context2)
11930 return IOCB_ERROR;
11931 piocb->context2 = prspiocbq;
dea3101e
JB
11932 }
11933
5a0916b4 11934 piocb->wait_iocb_cmpl = piocb->iocb_cmpl;
68876920
JSEC
11935 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
11936 piocb->context_un.wait_queue = &done_q;
5a0916b4 11937 piocb->iocb_flag &= ~(LPFC_IO_WAKE | LPFC_IO_WAKE_TMO);
dea3101e 11938
875fbdfe 11939 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
11940 if (lpfc_readl(phba->HCregaddr, &creg_val))
11941 return IOCB_ERROR;
875fbdfe
JSEC
11942 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
11943 writel(creg_val, phba->HCregaddr);
11944 readl(phba->HCregaddr); /* flush */
11945 }
11946
2a9bf3d0
JS
11947 retval = lpfc_sli_issue_iocb(phba, ring_number, piocb,
11948 SLI_IOCB_RET_IOCB);
68876920 11949 if (retval == IOCB_SUCCESS) {
256ec0d0 11950 timeout_req = msecs_to_jiffies(timeout * 1000);
68876920 11951 timeleft = wait_event_timeout(done_q,
d11e31dd 11952 lpfc_chk_iocb_flg(phba, piocb, LPFC_IO_WAKE),
68876920 11953 timeout_req);
5a0916b4
JS
11954 spin_lock_irqsave(&phba->hbalock, iflags);
11955 if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
11956
11957 /*
11958 * IOCB timed out. Inform the wake iocb wait
11959 * completion function and set local status
11960 */
dea3101e 11961
5a0916b4
JS
11962 iocb_completed = false;
11963 piocb->iocb_flag |= LPFC_IO_WAKE_TMO;
11964 }
11965 spin_unlock_irqrestore(&phba->hbalock, iflags);
11966 if (iocb_completed) {
7054a606 11967 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 11968 "0331 IOCB wake signaled\n");
53151bbb
JS
11969 /* Note: we are not indicating if the IOCB has a success
11970 * status or not - that's for the caller to check.
11971 * IOCB_SUCCESS means just that the command was sent and
11972 * completed. Not that it completed successfully.
11973 * */
7054a606 11974 } else if (timeleft == 0) {
68876920 11975 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
11976 "0338 IOCB wait timeout error - no "
11977 "wake response Data x%x\n", timeout);
68876920 11978 retval = IOCB_TIMEDOUT;
7054a606 11979 } else {
68876920 11980 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
11981 "0330 IOCB wake NOT set, "
11982 "Data x%x x%lx\n",
68876920
JSEC
11983 timeout, (timeleft / jiffies));
11984 retval = IOCB_TIMEDOUT;
dea3101e 11985 }
2a9bf3d0 11986 } else if (retval == IOCB_BUSY) {
0e9bb8d7
JS
11987 if (phba->cfg_log_verbose & LOG_SLI) {
11988 list_for_each_entry(iocb, &pring->txq, list) {
11989 txq_cnt++;
11990 }
11991 list_for_each_entry(iocb, &pring->txcmplq, list) {
11992 txcmplq_cnt++;
11993 }
11994 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
11995 "2818 Max IOCBs %d txq cnt %d txcmplq cnt %d\n",
11996 phba->iocb_cnt, txq_cnt, txcmplq_cnt);
11997 }
2a9bf3d0 11998 return retval;
68876920
JSEC
11999 } else {
12000 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
d7c255b2 12001 "0332 IOCB wait issue failed, Data x%x\n",
e8b62011 12002 retval);
68876920 12003 retval = IOCB_ERROR;
dea3101e
JB
12004 }
12005
875fbdfe 12006 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
12007 if (lpfc_readl(phba->HCregaddr, &creg_val))
12008 return IOCB_ERROR;
875fbdfe
JSEC
12009 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
12010 writel(creg_val, phba->HCregaddr);
12011 readl(phba->HCregaddr); /* flush */
12012 }
12013
68876920
JSEC
12014 if (prspiocbq)
12015 piocb->context2 = NULL;
12016
12017 piocb->context_un.wait_queue = NULL;
12018 piocb->iocb_cmpl = NULL;
dea3101e
JB
12019 return retval;
12020}
68876920 12021
e59058c4 12022/**
3621a710 12023 * lpfc_sli_issue_mbox_wait - Synchronous function to issue mailbox
e59058c4
JS
12024 * @phba: Pointer to HBA context object.
12025 * @pmboxq: Pointer to driver mailbox object.
12026 * @timeout: Timeout in number of seconds.
12027 *
12028 * This function issues the mailbox to firmware and waits for the
12029 * mailbox command to complete. If the mailbox command is not
12030 * completed within timeout seconds, it returns MBX_TIMEOUT.
12031 * The function waits for the mailbox completion using an
12032 * interruptible wait. If the thread is woken up due to a
12033 * signal, MBX_TIMEOUT error is returned to the caller. Caller
12034 * should not free the mailbox resources, if this function returns
12035 * MBX_TIMEOUT.
12036 * This function will sleep while waiting for mailbox completion.
12037 * So, this function should not be called from any context which
12038 * does not allow sleeping. Due to the same reason, this function
12039 * cannot be called with interrupt disabled.
12040 * This function assumes that the mailbox completion occurs while
12041 * this function sleep. So, this function cannot be called from
12042 * the worker thread which processes mailbox completion.
12043 * This function is called in the context of HBA management
12044 * applications.
12045 * This function returns MBX_SUCCESS when successful.
12046 * This function is called with no lock held.
12047 **/
dea3101e 12048int
2e0fef85 12049lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB
12050 uint32_t timeout)
12051{
e29d74f8 12052 struct completion mbox_done;
dea3101e 12053 int retval;
858c9f6c 12054 unsigned long flag;
dea3101e 12055
495a714c 12056 pmboxq->mbox_flag &= ~LPFC_MBX_WAKE;
dea3101e
JB
12057 /* setup wake call as IOCB callback */
12058 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
dea3101e 12059
e29d74f8
JS
12060 /* setup context3 field to pass wait_queue pointer to wake function */
12061 init_completion(&mbox_done);
12062 pmboxq->context3 = &mbox_done;
dea3101e
JB
12063 /* now issue the command */
12064 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
dea3101e 12065 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
e29d74f8
JS
12066 wait_for_completion_timeout(&mbox_done,
12067 msecs_to_jiffies(timeout * 1000));
7054a606 12068
858c9f6c 12069 spin_lock_irqsave(&phba->hbalock, flag);
e29d74f8 12070 pmboxq->context3 = NULL;
7054a606
JS
12071 /*
12072 * if LPFC_MBX_WAKE flag is set the mailbox is completed
12073 * else do not free the resources.
12074 */
d7c47992 12075 if (pmboxq->mbox_flag & LPFC_MBX_WAKE) {
dea3101e 12076 retval = MBX_SUCCESS;
d7c47992 12077 } else {
7054a606 12078 retval = MBX_TIMEOUT;
858c9f6c
JS
12079 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
12080 }
12081 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e 12082 }
dea3101e
JB
12083 return retval;
12084}
12085
e59058c4 12086/**
3772a991 12087 * lpfc_sli_mbox_sys_shutdown - shutdown mailbox command sub-system
e59058c4
JS
12088 * @phba: Pointer to HBA context.
12089 *
3772a991
JS
12090 * This function is called to shutdown the driver's mailbox sub-system.
12091 * It first marks the mailbox sub-system is in a block state to prevent
12092 * the asynchronous mailbox command from issued off the pending mailbox
12093 * command queue. If the mailbox command sub-system shutdown is due to
12094 * HBA error conditions such as EEH or ERATT, this routine shall invoke
12095 * the mailbox sub-system flush routine to forcefully bring down the
12096 * mailbox sub-system. Otherwise, if it is due to normal condition (such
12097 * as with offline or HBA function reset), this routine will wait for the
12098 * outstanding mailbox command to complete before invoking the mailbox
12099 * sub-system flush routine to gracefully bring down mailbox sub-system.
e59058c4 12100 **/
3772a991 12101void
618a5230 12102lpfc_sli_mbox_sys_shutdown(struct lpfc_hba *phba, int mbx_action)
b4c02652 12103{
3772a991 12104 struct lpfc_sli *psli = &phba->sli;
3772a991 12105 unsigned long timeout;
b4c02652 12106
618a5230
JS
12107 if (mbx_action == LPFC_MBX_NO_WAIT) {
12108 /* delay 100ms for port state */
12109 msleep(100);
12110 lpfc_sli_mbox_sys_flush(phba);
12111 return;
12112 }
a183a15f 12113 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
d7069f09 12114
523128e5
JS
12115 /* Disable softirqs, including timers from obtaining phba->hbalock */
12116 local_bh_disable();
12117
3772a991
JS
12118 spin_lock_irq(&phba->hbalock);
12119 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
b4c02652 12120
3772a991 12121 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
3772a991
JS
12122 /* Determine how long we might wait for the active mailbox
12123 * command to be gracefully completed by firmware.
12124 */
a183a15f
JS
12125 if (phba->sli.mbox_active)
12126 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
12127 phba->sli.mbox_active) *
12128 1000) + jiffies;
12129 spin_unlock_irq(&phba->hbalock);
12130
523128e5
JS
12131 /* Enable softirqs again, done with phba->hbalock */
12132 local_bh_enable();
12133
3772a991
JS
12134 while (phba->sli.mbox_active) {
12135 /* Check active mailbox complete status every 2ms */
12136 msleep(2);
12137 if (time_after(jiffies, timeout))
12138 /* Timeout, let the mailbox flush routine to
12139 * forcefully release active mailbox command
12140 */
12141 break;
12142 }
523128e5 12143 } else {
d7069f09
JS
12144 spin_unlock_irq(&phba->hbalock);
12145
523128e5
JS
12146 /* Enable softirqs again, done with phba->hbalock */
12147 local_bh_enable();
12148 }
12149
3772a991
JS
12150 lpfc_sli_mbox_sys_flush(phba);
12151}
ed957684 12152
3772a991
JS
12153/**
12154 * lpfc_sli_eratt_read - read sli-3 error attention events
12155 * @phba: Pointer to HBA context.
12156 *
12157 * This function is called to read the SLI3 device error attention registers
12158 * for possible error attention events. The caller must hold the hostlock
12159 * with spin_lock_irq().
12160 *
25985edc 12161 * This function returns 1 when there is Error Attention in the Host Attention
3772a991
JS
12162 * Register and returns 0 otherwise.
12163 **/
12164static int
12165lpfc_sli_eratt_read(struct lpfc_hba *phba)
12166{
12167 uint32_t ha_copy;
b4c02652 12168
3772a991 12169 /* Read chip Host Attention (HA) register */
9940b97b
JS
12170 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12171 goto unplug_err;
12172
3772a991
JS
12173 if (ha_copy & HA_ERATT) {
12174 /* Read host status register to retrieve error event */
9940b97b
JS
12175 if (lpfc_sli_read_hs(phba))
12176 goto unplug_err;
b4c02652 12177
3772a991
JS
12178 /* Check if there is a deferred error condition is active */
12179 if ((HS_FFER1 & phba->work_hs) &&
12180 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0 12181 HS_FFER6 | HS_FFER7 | HS_FFER8) & phba->work_hs)) {
3772a991 12182 phba->hba_flag |= DEFER_ERATT;
3772a991
JS
12183 /* Clear all interrupt enable conditions */
12184 writel(0, phba->HCregaddr);
12185 readl(phba->HCregaddr);
12186 }
12187
12188 /* Set the driver HA work bitmap */
3772a991
JS
12189 phba->work_ha |= HA_ERATT;
12190 /* Indicate polling handles this ERATT */
12191 phba->hba_flag |= HBA_ERATT_HANDLED;
3772a991
JS
12192 return 1;
12193 }
12194 return 0;
9940b97b
JS
12195
12196unplug_err:
12197 /* Set the driver HS work bitmap */
12198 phba->work_hs |= UNPLUG_ERR;
12199 /* Set the driver HA work bitmap */
12200 phba->work_ha |= HA_ERATT;
12201 /* Indicate polling handles this ERATT */
12202 phba->hba_flag |= HBA_ERATT_HANDLED;
12203 return 1;
b4c02652
JS
12204}
12205
da0436e9
JS
12206/**
12207 * lpfc_sli4_eratt_read - read sli-4 error attention events
12208 * @phba: Pointer to HBA context.
12209 *
12210 * This function is called to read the SLI4 device error attention registers
12211 * for possible error attention events. The caller must hold the hostlock
12212 * with spin_lock_irq().
12213 *
25985edc 12214 * This function returns 1 when there is Error Attention in the Host Attention
da0436e9
JS
12215 * Register and returns 0 otherwise.
12216 **/
12217static int
12218lpfc_sli4_eratt_read(struct lpfc_hba *phba)
12219{
12220 uint32_t uerr_sta_hi, uerr_sta_lo;
2fcee4bf
JS
12221 uint32_t if_type, portsmphr;
12222 struct lpfc_register portstat_reg;
da0436e9 12223
2fcee4bf
JS
12224 /*
12225 * For now, use the SLI4 device internal unrecoverable error
da0436e9
JS
12226 * registers for error attention. This can be changed later.
12227 */
2fcee4bf
JS
12228 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12229 switch (if_type) {
12230 case LPFC_SLI_INTF_IF_TYPE_0:
9940b97b
JS
12231 if (lpfc_readl(phba->sli4_hba.u.if_type0.UERRLOregaddr,
12232 &uerr_sta_lo) ||
12233 lpfc_readl(phba->sli4_hba.u.if_type0.UERRHIregaddr,
12234 &uerr_sta_hi)) {
12235 phba->work_hs |= UNPLUG_ERR;
12236 phba->work_ha |= HA_ERATT;
12237 phba->hba_flag |= HBA_ERATT_HANDLED;
12238 return 1;
12239 }
2fcee4bf
JS
12240 if ((~phba->sli4_hba.ue_mask_lo & uerr_sta_lo) ||
12241 (~phba->sli4_hba.ue_mask_hi & uerr_sta_hi)) {
12242 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12243 "1423 HBA Unrecoverable error: "
12244 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, "
12245 "ue_mask_lo_reg=0x%x, "
12246 "ue_mask_hi_reg=0x%x\n",
12247 uerr_sta_lo, uerr_sta_hi,
12248 phba->sli4_hba.ue_mask_lo,
12249 phba->sli4_hba.ue_mask_hi);
12250 phba->work_status[0] = uerr_sta_lo;
12251 phba->work_status[1] = uerr_sta_hi;
12252 phba->work_ha |= HA_ERATT;
12253 phba->hba_flag |= HBA_ERATT_HANDLED;
12254 return 1;
12255 }
12256 break;
12257 case LPFC_SLI_INTF_IF_TYPE_2:
27d6ac0a 12258 case LPFC_SLI_INTF_IF_TYPE_6:
9940b97b
JS
12259 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
12260 &portstat_reg.word0) ||
12261 lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
12262 &portsmphr)){
12263 phba->work_hs |= UNPLUG_ERR;
12264 phba->work_ha |= HA_ERATT;
12265 phba->hba_flag |= HBA_ERATT_HANDLED;
12266 return 1;
12267 }
2fcee4bf
JS
12268 if (bf_get(lpfc_sliport_status_err, &portstat_reg)) {
12269 phba->work_status[0] =
12270 readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
12271 phba->work_status[1] =
12272 readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
12273 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2e90f4b5 12274 "2885 Port Status Event: "
2fcee4bf
JS
12275 "port status reg 0x%x, "
12276 "port smphr reg 0x%x, "
12277 "error 1=0x%x, error 2=0x%x\n",
12278 portstat_reg.word0,
12279 portsmphr,
12280 phba->work_status[0],
12281 phba->work_status[1]);
12282 phba->work_ha |= HA_ERATT;
12283 phba->hba_flag |= HBA_ERATT_HANDLED;
12284 return 1;
12285 }
12286 break;
12287 case LPFC_SLI_INTF_IF_TYPE_1:
12288 default:
a747c9ce 12289 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
12290 "2886 HBA Error Attention on unsupported "
12291 "if type %d.", if_type);
a747c9ce 12292 return 1;
da0436e9 12293 }
2fcee4bf 12294
da0436e9
JS
12295 return 0;
12296}
12297
e59058c4 12298/**
3621a710 12299 * lpfc_sli_check_eratt - check error attention events
9399627f
JS
12300 * @phba: Pointer to HBA context.
12301 *
3772a991 12302 * This function is called from timer soft interrupt context to check HBA's
9399627f
JS
12303 * error attention register bit for error attention events.
12304 *
25985edc 12305 * This function returns 1 when there is Error Attention in the Host Attention
9399627f
JS
12306 * Register and returns 0 otherwise.
12307 **/
12308int
12309lpfc_sli_check_eratt(struct lpfc_hba *phba)
12310{
12311 uint32_t ha_copy;
12312
12313 /* If somebody is waiting to handle an eratt, don't process it
12314 * here. The brdkill function will do this.
12315 */
12316 if (phba->link_flag & LS_IGNORE_ERATT)
12317 return 0;
12318
12319 /* Check if interrupt handler handles this ERATT */
12320 spin_lock_irq(&phba->hbalock);
12321 if (phba->hba_flag & HBA_ERATT_HANDLED) {
12322 /* Interrupt handler has handled ERATT */
12323 spin_unlock_irq(&phba->hbalock);
12324 return 0;
12325 }
12326
a257bf90
JS
12327 /*
12328 * If there is deferred error attention, do not check for error
12329 * attention
12330 */
12331 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
12332 spin_unlock_irq(&phba->hbalock);
12333 return 0;
12334 }
12335
3772a991
JS
12336 /* If PCI channel is offline, don't process it */
12337 if (unlikely(pci_channel_offline(phba->pcidev))) {
9399627f 12338 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12339 return 0;
12340 }
12341
12342 switch (phba->sli_rev) {
12343 case LPFC_SLI_REV2:
12344 case LPFC_SLI_REV3:
12345 /* Read chip Host Attention (HA) register */
12346 ha_copy = lpfc_sli_eratt_read(phba);
12347 break;
da0436e9 12348 case LPFC_SLI_REV4:
2fcee4bf 12349 /* Read device Uncoverable Error (UERR) registers */
da0436e9
JS
12350 ha_copy = lpfc_sli4_eratt_read(phba);
12351 break;
3772a991
JS
12352 default:
12353 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12354 "0299 Invalid SLI revision (%d)\n",
12355 phba->sli_rev);
12356 ha_copy = 0;
12357 break;
9399627f
JS
12358 }
12359 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12360
12361 return ha_copy;
12362}
12363
12364/**
12365 * lpfc_intr_state_check - Check device state for interrupt handling
12366 * @phba: Pointer to HBA context.
12367 *
12368 * This inline routine checks whether a device or its PCI slot is in a state
12369 * that the interrupt should be handled.
12370 *
12371 * This function returns 0 if the device or the PCI slot is in a state that
12372 * interrupt should be handled, otherwise -EIO.
12373 */
12374static inline int
12375lpfc_intr_state_check(struct lpfc_hba *phba)
12376{
12377 /* If the pci channel is offline, ignore all the interrupts */
12378 if (unlikely(pci_channel_offline(phba->pcidev)))
12379 return -EIO;
12380
12381 /* Update device level interrupt statistics */
12382 phba->sli.slistat.sli_intr++;
12383
12384 /* Ignore all interrupts during initialization. */
12385 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
12386 return -EIO;
12387
9399627f
JS
12388 return 0;
12389}
12390
12391/**
3772a991 12392 * lpfc_sli_sp_intr_handler - Slow-path interrupt handler to SLI-3 device
e59058c4
JS
12393 * @irq: Interrupt number.
12394 * @dev_id: The device context pointer.
12395 *
9399627f 12396 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12397 * service routine when device with SLI-3 interface spec is enabled with
12398 * MSI-X multi-message interrupt mode and there are slow-path events in
12399 * the HBA. However, when the device is enabled with either MSI or Pin-IRQ
12400 * interrupt mode, this function is called as part of the device-level
12401 * interrupt handler. When the PCI slot is in error recovery or the HBA
12402 * is undergoing initialization, the interrupt handler will not process
12403 * the interrupt. The link attention and ELS ring attention events are
12404 * handled by the worker thread. The interrupt handler signals the worker
12405 * thread and returns for these events. This function is called without
12406 * any lock held. It gets the hbalock to access and update SLI data
9399627f
JS
12407 * structures.
12408 *
12409 * This function returns IRQ_HANDLED when interrupt is handled else it
12410 * returns IRQ_NONE.
e59058c4 12411 **/
dea3101e 12412irqreturn_t
3772a991 12413lpfc_sli_sp_intr_handler(int irq, void *dev_id)
dea3101e 12414{
2e0fef85 12415 struct lpfc_hba *phba;
a747c9ce 12416 uint32_t ha_copy, hc_copy;
dea3101e
JB
12417 uint32_t work_ha_copy;
12418 unsigned long status;
5b75da2f 12419 unsigned long iflag;
dea3101e
JB
12420 uint32_t control;
12421
92d7f7b0 12422 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS
12423 struct lpfc_vport *vport;
12424 struct lpfc_nodelist *ndlp;
12425 struct lpfc_dmabuf *mp;
92d7f7b0
JS
12426 LPFC_MBOXQ_t *pmb;
12427 int rc;
12428
dea3101e
JB
12429 /*
12430 * Get the driver's phba structure from the dev_id and
12431 * assume the HBA is not interrupting.
12432 */
9399627f 12433 phba = (struct lpfc_hba *)dev_id;
dea3101e
JB
12434
12435 if (unlikely(!phba))
12436 return IRQ_NONE;
12437
dea3101e 12438 /*
9399627f
JS
12439 * Stuff needs to be attented to when this function is invoked as an
12440 * individual interrupt handler in MSI-X multi-message interrupt mode
dea3101e 12441 */
9399627f 12442 if (phba->intr_type == MSIX) {
3772a991
JS
12443 /* Check device state for handling interrupt */
12444 if (lpfc_intr_state_check(phba))
9399627f
JS
12445 return IRQ_NONE;
12446 /* Need to read HA REG for slow-path events */
5b75da2f 12447 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12448 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12449 goto unplug_error;
9399627f
JS
12450 /* If somebody is waiting to handle an eratt don't process it
12451 * here. The brdkill function will do this.
12452 */
12453 if (phba->link_flag & LS_IGNORE_ERATT)
12454 ha_copy &= ~HA_ERATT;
12455 /* Check the need for handling ERATT in interrupt handler */
12456 if (ha_copy & HA_ERATT) {
12457 if (phba->hba_flag & HBA_ERATT_HANDLED)
12458 /* ERATT polling has handled ERATT */
12459 ha_copy &= ~HA_ERATT;
12460 else
12461 /* Indicate interrupt handler handles ERATT */
12462 phba->hba_flag |= HBA_ERATT_HANDLED;
12463 }
a257bf90
JS
12464
12465 /*
12466 * If there is deferred error attention, do not check for any
12467 * interrupt.
12468 */
12469 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12470 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12471 return IRQ_NONE;
12472 }
12473
9399627f 12474 /* Clear up only attention source related to slow-path */
9940b97b
JS
12475 if (lpfc_readl(phba->HCregaddr, &hc_copy))
12476 goto unplug_error;
12477
a747c9ce
JS
12478 writel(hc_copy & ~(HC_MBINT_ENA | HC_R2INT_ENA |
12479 HC_LAINT_ENA | HC_ERINT_ENA),
12480 phba->HCregaddr);
9399627f
JS
12481 writel((ha_copy & (HA_MBATT | HA_R2_CLR_MSK)),
12482 phba->HAregaddr);
a747c9ce 12483 writel(hc_copy, phba->HCregaddr);
9399627f 12484 readl(phba->HAregaddr); /* flush */
5b75da2f 12485 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12486 } else
12487 ha_copy = phba->ha_copy;
dea3101e 12488
dea3101e
JB
12489 work_ha_copy = ha_copy & phba->work_ha_mask;
12490
9399627f 12491 if (work_ha_copy) {
dea3101e
JB
12492 if (work_ha_copy & HA_LATT) {
12493 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
12494 /*
12495 * Turn off Link Attention interrupts
12496 * until CLEAR_LA done
12497 */
5b75da2f 12498 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12499 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
9940b97b
JS
12500 if (lpfc_readl(phba->HCregaddr, &control))
12501 goto unplug_error;
dea3101e
JB
12502 control &= ~HC_LAINT_ENA;
12503 writel(control, phba->HCregaddr);
12504 readl(phba->HCregaddr); /* flush */
5b75da2f 12505 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12506 }
12507 else
12508 work_ha_copy &= ~HA_LATT;
12509 }
12510
9399627f 12511 if (work_ha_copy & ~(HA_ERATT | HA_MBATT | HA_LATT)) {
858c9f6c
JS
12512 /*
12513 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
12514 * the only slow ring.
12515 */
12516 status = (work_ha_copy &
12517 (HA_RXMASK << (4*LPFC_ELS_RING)));
12518 status >>= (4*LPFC_ELS_RING);
12519 if (status & HA_RXMASK) {
5b75da2f 12520 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12521 if (lpfc_readl(phba->HCregaddr, &control))
12522 goto unplug_error;
a58cbd52
JS
12523
12524 lpfc_debugfs_slow_ring_trc(phba,
12525 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
12526 control, status,
12527 (uint32_t)phba->sli.slistat.sli_intr);
12528
858c9f6c 12529 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS
12530 lpfc_debugfs_slow_ring_trc(phba,
12531 "ISR Disable ring:"
12532 "pwork:x%x hawork:x%x wait:x%x",
12533 phba->work_ha, work_ha_copy,
12534 (uint32_t)((unsigned long)
5e9d9b82 12535 &phba->work_waitq));
a58cbd52 12536
858c9f6c
JS
12537 control &=
12538 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB
12539 writel(control, phba->HCregaddr);
12540 readl(phba->HCregaddr); /* flush */
dea3101e 12541 }
a58cbd52
JS
12542 else {
12543 lpfc_debugfs_slow_ring_trc(phba,
12544 "ISR slow ring: pwork:"
12545 "x%x hawork:x%x wait:x%x",
12546 phba->work_ha, work_ha_copy,
12547 (uint32_t)((unsigned long)
5e9d9b82 12548 &phba->work_waitq));
a58cbd52 12549 }
5b75da2f 12550 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12551 }
12552 }
5b75da2f 12553 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90 12554 if (work_ha_copy & HA_ERATT) {
9940b97b
JS
12555 if (lpfc_sli_read_hs(phba))
12556 goto unplug_error;
a257bf90
JS
12557 /*
12558 * Check if there is a deferred error condition
12559 * is active
12560 */
12561 if ((HS_FFER1 & phba->work_hs) &&
12562 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0
JS
12563 HS_FFER6 | HS_FFER7 | HS_FFER8) &
12564 phba->work_hs)) {
a257bf90
JS
12565 phba->hba_flag |= DEFER_ERATT;
12566 /* Clear all interrupt enable conditions */
12567 writel(0, phba->HCregaddr);
12568 readl(phba->HCregaddr);
12569 }
12570 }
12571
9399627f 12572 if ((work_ha_copy & HA_MBATT) && (phba->sli.mbox_active)) {
92d7f7b0 12573 pmb = phba->sli.mbox_active;
04c68496 12574 pmbox = &pmb->u.mb;
34b02dcd 12575 mbox = phba->mbox;
858c9f6c 12576 vport = pmb->vport;
92d7f7b0
JS
12577
12578 /* First check out the status word */
12579 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
12580 if (pmbox->mbxOwner != OWN_HOST) {
5b75da2f 12581 spin_unlock_irqrestore(&phba->hbalock, iflag);
92d7f7b0
JS
12582 /*
12583 * Stray Mailbox Interrupt, mbxCommand <cmd>
12584 * mbxStatus <status>
12585 */
09372820 12586 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
92d7f7b0 12587 LOG_SLI,
e8b62011 12588 "(%d):0304 Stray Mailbox "
92d7f7b0
JS
12589 "Interrupt mbxCommand x%x "
12590 "mbxStatus x%x\n",
e8b62011 12591 (vport ? vport->vpi : 0),
92d7f7b0
JS
12592 pmbox->mbxCommand,
12593 pmbox->mbxStatus);
09372820
JS
12594 /* clear mailbox attention bit */
12595 work_ha_copy &= ~HA_MBATT;
12596 } else {
97eab634 12597 phba->sli.mbox_active = NULL;
5b75da2f 12598 spin_unlock_irqrestore(&phba->hbalock, iflag);
09372820
JS
12599 phba->last_completion_time = jiffies;
12600 del_timer(&phba->sli.mbox_tmo);
09372820
JS
12601 if (pmb->mbox_cmpl) {
12602 lpfc_sli_pcimem_bcopy(mbox, pmbox,
12603 MAILBOX_CMD_SIZE);
7a470277 12604 if (pmb->out_ext_byte_len &&
3e1f0718 12605 pmb->ctx_buf)
7a470277
JS
12606 lpfc_sli_pcimem_bcopy(
12607 phba->mbox_ext,
3e1f0718 12608 pmb->ctx_buf,
7a470277 12609 pmb->out_ext_byte_len);
09372820
JS
12610 }
12611 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
12612 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
12613
12614 lpfc_debugfs_disc_trc(vport,
12615 LPFC_DISC_TRC_MBOX_VPORT,
12616 "MBOX dflt rpi: : "
12617 "status:x%x rpi:x%x",
12618 (uint32_t)pmbox->mbxStatus,
12619 pmbox->un.varWords[0], 0);
12620
12621 if (!pmbox->mbxStatus) {
12622 mp = (struct lpfc_dmabuf *)
3e1f0718 12623 (pmb->ctx_buf);
09372820 12624 ndlp = (struct lpfc_nodelist *)
3e1f0718 12625 pmb->ctx_ndlp;
09372820
JS
12626
12627 /* Reg_LOGIN of dflt RPI was
12628 * successful. new lets get
12629 * rid of the RPI using the
12630 * same mbox buffer.
12631 */
12632 lpfc_unreg_login(phba,
12633 vport->vpi,
12634 pmbox->un.varWords[0],
12635 pmb);
12636 pmb->mbox_cmpl =
12637 lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
12638 pmb->ctx_buf = mp;
12639 pmb->ctx_ndlp = ndlp;
09372820 12640 pmb->vport = vport;
58da1ffb
JS
12641 rc = lpfc_sli_issue_mbox(phba,
12642 pmb,
12643 MBX_NOWAIT);
12644 if (rc != MBX_BUSY)
12645 lpfc_printf_log(phba,
12646 KERN_ERR,
12647 LOG_MBOX | LOG_SLI,
d7c255b2 12648 "0350 rc should have"
6a9c52cf 12649 "been MBX_BUSY\n");
3772a991
JS
12650 if (rc != MBX_NOT_FINISHED)
12651 goto send_current_mbox;
09372820 12652 }
858c9f6c 12653 }
5b75da2f
JS
12654 spin_lock_irqsave(
12655 &phba->pport->work_port_lock,
12656 iflag);
09372820
JS
12657 phba->pport->work_port_events &=
12658 ~WORKER_MBOX_TMO;
5b75da2f
JS
12659 spin_unlock_irqrestore(
12660 &phba->pport->work_port_lock,
12661 iflag);
09372820 12662 lpfc_mbox_cmpl_put(phba, pmb);
858c9f6c 12663 }
97eab634 12664 } else
5b75da2f 12665 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f 12666
92d7f7b0
JS
12667 if ((work_ha_copy & HA_MBATT) &&
12668 (phba->sli.mbox_active == NULL)) {
858c9f6c 12669send_current_mbox:
92d7f7b0 12670 /* Process next mailbox command if there is one */
58da1ffb
JS
12671 do {
12672 rc = lpfc_sli_issue_mbox(phba, NULL,
12673 MBX_NOWAIT);
12674 } while (rc == MBX_NOT_FINISHED);
12675 if (rc != MBX_SUCCESS)
12676 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
12677 LOG_SLI, "0349 rc should be "
6a9c52cf 12678 "MBX_SUCCESS\n");
92d7f7b0
JS
12679 }
12680
5b75da2f 12681 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12682 phba->work_ha |= work_ha_copy;
5b75da2f 12683 spin_unlock_irqrestore(&phba->hbalock, iflag);
5e9d9b82 12684 lpfc_worker_wake_up(phba);
dea3101e 12685 }
9399627f 12686 return IRQ_HANDLED;
9940b97b
JS
12687unplug_error:
12688 spin_unlock_irqrestore(&phba->hbalock, iflag);
12689 return IRQ_HANDLED;
dea3101e 12690
3772a991 12691} /* lpfc_sli_sp_intr_handler */
9399627f
JS
12692
12693/**
3772a991 12694 * lpfc_sli_fp_intr_handler - Fast-path interrupt handler to SLI-3 device.
9399627f
JS
12695 * @irq: Interrupt number.
12696 * @dev_id: The device context pointer.
12697 *
12698 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12699 * service routine when device with SLI-3 interface spec is enabled with
12700 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
12701 * ring event in the HBA. However, when the device is enabled with either
12702 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
12703 * device-level interrupt handler. When the PCI slot is in error recovery
12704 * or the HBA is undergoing initialization, the interrupt handler will not
12705 * process the interrupt. The SCSI FCP fast-path ring event are handled in
12706 * the intrrupt context. This function is called without any lock held.
12707 * It gets the hbalock to access and update SLI data structures.
9399627f
JS
12708 *
12709 * This function returns IRQ_HANDLED when interrupt is handled else it
12710 * returns IRQ_NONE.
12711 **/
12712irqreturn_t
3772a991 12713lpfc_sli_fp_intr_handler(int irq, void *dev_id)
9399627f
JS
12714{
12715 struct lpfc_hba *phba;
12716 uint32_t ha_copy;
12717 unsigned long status;
5b75da2f 12718 unsigned long iflag;
895427bd 12719 struct lpfc_sli_ring *pring;
9399627f
JS
12720
12721 /* Get the driver's phba structure from the dev_id and
12722 * assume the HBA is not interrupting.
12723 */
12724 phba = (struct lpfc_hba *) dev_id;
12725
12726 if (unlikely(!phba))
12727 return IRQ_NONE;
12728
12729 /*
12730 * Stuff needs to be attented to when this function is invoked as an
12731 * individual interrupt handler in MSI-X multi-message interrupt mode
12732 */
12733 if (phba->intr_type == MSIX) {
3772a991
JS
12734 /* Check device state for handling interrupt */
12735 if (lpfc_intr_state_check(phba))
9399627f
JS
12736 return IRQ_NONE;
12737 /* Need to read HA REG for FCP ring and other ring events */
9940b97b
JS
12738 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12739 return IRQ_HANDLED;
9399627f 12740 /* Clear up only attention source related to fast-path */
5b75da2f 12741 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90
JS
12742 /*
12743 * If there is deferred error attention, do not check for
12744 * any interrupt.
12745 */
12746 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12747 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12748 return IRQ_NONE;
12749 }
9399627f
JS
12750 writel((ha_copy & (HA_R0_CLR_MSK | HA_R1_CLR_MSK)),
12751 phba->HAregaddr);
12752 readl(phba->HAregaddr); /* flush */
5b75da2f 12753 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12754 } else
12755 ha_copy = phba->ha_copy;
dea3101e
JB
12756
12757 /*
9399627f 12758 * Process all events on FCP ring. Take the optimized path for FCP IO.
dea3101e 12759 */
9399627f
JS
12760 ha_copy &= ~(phba->work_ha_mask);
12761
12762 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
dea3101e 12763 status >>= (4*LPFC_FCP_RING);
895427bd 12764 pring = &phba->sli.sli3_ring[LPFC_FCP_RING];
858c9f6c 12765 if (status & HA_RXMASK)
895427bd 12766 lpfc_sli_handle_fast_ring_event(phba, pring, status);
a4bc3379
JS
12767
12768 if (phba->cfg_multi_ring_support == 2) {
12769 /*
9399627f
JS
12770 * Process all events on extra ring. Take the optimized path
12771 * for extra ring IO.
a4bc3379 12772 */
9399627f 12773 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
a4bc3379 12774 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 12775 if (status & HA_RXMASK) {
a4bc3379 12776 lpfc_sli_handle_fast_ring_event(phba,
895427bd 12777 &phba->sli.sli3_ring[LPFC_EXTRA_RING],
a4bc3379
JS
12778 status);
12779 }
12780 }
dea3101e 12781 return IRQ_HANDLED;
3772a991 12782} /* lpfc_sli_fp_intr_handler */
9399627f
JS
12783
12784/**
3772a991 12785 * lpfc_sli_intr_handler - Device-level interrupt handler to SLI-3 device
9399627f
JS
12786 * @irq: Interrupt number.
12787 * @dev_id: The device context pointer.
12788 *
3772a991
JS
12789 * This function is the HBA device-level interrupt handler to device with
12790 * SLI-3 interface spec, called from the PCI layer when either MSI or
12791 * Pin-IRQ interrupt mode is enabled and there is an event in the HBA which
12792 * requires driver attention. This function invokes the slow-path interrupt
12793 * attention handling function and fast-path interrupt attention handling
12794 * function in turn to process the relevant HBA attention events. This
12795 * function is called without any lock held. It gets the hbalock to access
12796 * and update SLI data structures.
9399627f
JS
12797 *
12798 * This function returns IRQ_HANDLED when interrupt is handled, else it
12799 * returns IRQ_NONE.
12800 **/
12801irqreturn_t
3772a991 12802lpfc_sli_intr_handler(int irq, void *dev_id)
9399627f
JS
12803{
12804 struct lpfc_hba *phba;
12805 irqreturn_t sp_irq_rc, fp_irq_rc;
12806 unsigned long status1, status2;
a747c9ce 12807 uint32_t hc_copy;
9399627f
JS
12808
12809 /*
12810 * Get the driver's phba structure from the dev_id and
12811 * assume the HBA is not interrupting.
12812 */
12813 phba = (struct lpfc_hba *) dev_id;
12814
12815 if (unlikely(!phba))
12816 return IRQ_NONE;
12817
3772a991
JS
12818 /* Check device state for handling interrupt */
12819 if (lpfc_intr_state_check(phba))
9399627f
JS
12820 return IRQ_NONE;
12821
12822 spin_lock(&phba->hbalock);
9940b97b
JS
12823 if (lpfc_readl(phba->HAregaddr, &phba->ha_copy)) {
12824 spin_unlock(&phba->hbalock);
12825 return IRQ_HANDLED;
12826 }
12827
9399627f
JS
12828 if (unlikely(!phba->ha_copy)) {
12829 spin_unlock(&phba->hbalock);
12830 return IRQ_NONE;
12831 } else if (phba->ha_copy & HA_ERATT) {
12832 if (phba->hba_flag & HBA_ERATT_HANDLED)
12833 /* ERATT polling has handled ERATT */
12834 phba->ha_copy &= ~HA_ERATT;
12835 else
12836 /* Indicate interrupt handler handles ERATT */
12837 phba->hba_flag |= HBA_ERATT_HANDLED;
12838 }
12839
a257bf90
JS
12840 /*
12841 * If there is deferred error attention, do not check for any interrupt.
12842 */
12843 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
ec21b3b0 12844 spin_unlock(&phba->hbalock);
a257bf90
JS
12845 return IRQ_NONE;
12846 }
12847
9399627f 12848 /* Clear attention sources except link and error attentions */
9940b97b
JS
12849 if (lpfc_readl(phba->HCregaddr, &hc_copy)) {
12850 spin_unlock(&phba->hbalock);
12851 return IRQ_HANDLED;
12852 }
a747c9ce
JS
12853 writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA
12854 | HC_R2INT_ENA | HC_LAINT_ENA | HC_ERINT_ENA),
12855 phba->HCregaddr);
9399627f 12856 writel((phba->ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
a747c9ce 12857 writel(hc_copy, phba->HCregaddr);
9399627f
JS
12858 readl(phba->HAregaddr); /* flush */
12859 spin_unlock(&phba->hbalock);
12860
12861 /*
12862 * Invokes slow-path host attention interrupt handling as appropriate.
12863 */
12864
12865 /* status of events with mailbox and link attention */
12866 status1 = phba->ha_copy & (HA_MBATT | HA_LATT | HA_ERATT);
12867
12868 /* status of events with ELS ring */
12869 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_ELS_RING)));
12870 status2 >>= (4*LPFC_ELS_RING);
12871
12872 if (status1 || (status2 & HA_RXMASK))
3772a991 12873 sp_irq_rc = lpfc_sli_sp_intr_handler(irq, dev_id);
9399627f
JS
12874 else
12875 sp_irq_rc = IRQ_NONE;
12876
12877 /*
12878 * Invoke fast-path host attention interrupt handling as appropriate.
12879 */
12880
12881 /* status of events with FCP ring */
12882 status1 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
12883 status1 >>= (4*LPFC_FCP_RING);
12884
12885 /* status of events with extra ring */
12886 if (phba->cfg_multi_ring_support == 2) {
12887 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
12888 status2 >>= (4*LPFC_EXTRA_RING);
12889 } else
12890 status2 = 0;
12891
12892 if ((status1 & HA_RXMASK) || (status2 & HA_RXMASK))
3772a991 12893 fp_irq_rc = lpfc_sli_fp_intr_handler(irq, dev_id);
9399627f
JS
12894 else
12895 fp_irq_rc = IRQ_NONE;
dea3101e 12896
9399627f
JS
12897 /* Return device-level interrupt handling status */
12898 return (sp_irq_rc == IRQ_HANDLED) ? sp_irq_rc : fp_irq_rc;
3772a991 12899} /* lpfc_sli_intr_handler */
4f774513
JS
12900
12901/**
4f774513 12902 * lpfc_sli4_els_xri_abort_event_proc - Process els xri abort event
4f774513
JS
12903 * @phba: pointer to lpfc hba data structure.
12904 *
12905 * This routine is invoked by the worker thread to process all the pending
4f774513 12906 * SLI4 els abort xri events.
4f774513 12907 **/
4f774513 12908void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *phba)
4f774513
JS
12909{
12910 struct lpfc_cq_event *cq_event;
12911
4f774513 12912 /* First, declare the els xri abort event has been handled */
4f774513 12913 spin_lock_irq(&phba->hbalock);
4f774513 12914 phba->hba_flag &= ~ELS_XRI_ABORT_EVENT;
4f774513 12915 spin_unlock_irq(&phba->hbalock);
4f774513
JS
12916 /* Now, handle all the els xri abort events */
12917 while (!list_empty(&phba->sli4_hba.sp_els_xri_aborted_work_queue)) {
12918 /* Get the first event from the head of the event queue */
12919 spin_lock_irq(&phba->hbalock);
12920 list_remove_head(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
12921 cq_event, struct lpfc_cq_event, list);
12922 spin_unlock_irq(&phba->hbalock);
12923 /* Notify aborted XRI for ELS work queue */
12924 lpfc_sli4_els_xri_aborted(phba, &cq_event->cqe.wcqe_axri);
12925 /* Free the event processed back to the free pool */
12926 lpfc_sli4_cq_event_release(phba, cq_event);
12927 }
12928}
12929
341af102
JS
12930/**
12931 * lpfc_sli4_iocb_param_transfer - Transfer pIocbOut and cmpl status to pIocbIn
12932 * @phba: pointer to lpfc hba data structure
12933 * @pIocbIn: pointer to the rspiocbq
12934 * @pIocbOut: pointer to the cmdiocbq
12935 * @wcqe: pointer to the complete wcqe
12936 *
12937 * This routine transfers the fields of a command iocbq to a response iocbq
12938 * by copying all the IOCB fields from command iocbq and transferring the
12939 * completion status information from the complete wcqe.
12940 **/
4f774513 12941static void
341af102
JS
12942lpfc_sli4_iocb_param_transfer(struct lpfc_hba *phba,
12943 struct lpfc_iocbq *pIocbIn,
4f774513
JS
12944 struct lpfc_iocbq *pIocbOut,
12945 struct lpfc_wcqe_complete *wcqe)
12946{
af22741c 12947 int numBdes, i;
341af102 12948 unsigned long iflags;
af22741c
JS
12949 uint32_t status, max_response;
12950 struct lpfc_dmabuf *dmabuf;
12951 struct ulp_bde64 *bpl, bde;
4f774513
JS
12952 size_t offset = offsetof(struct lpfc_iocbq, iocb);
12953
12954 memcpy((char *)pIocbIn + offset, (char *)pIocbOut + offset,
12955 sizeof(struct lpfc_iocbq) - offset);
4f774513 12956 /* Map WCQE parameters into irspiocb parameters */
acd6859b
JS
12957 status = bf_get(lpfc_wcqe_c_status, wcqe);
12958 pIocbIn->iocb.ulpStatus = (status & LPFC_IOCB_STATUS_MASK);
4f774513
JS
12959 if (pIocbOut->iocb_flag & LPFC_IO_FCP)
12960 if (pIocbIn->iocb.ulpStatus == IOSTAT_FCP_RSP_ERROR)
12961 pIocbIn->iocb.un.fcpi.fcpi_parm =
12962 pIocbOut->iocb.un.fcpi.fcpi_parm -
12963 wcqe->total_data_placed;
12964 else
12965 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
695a814e 12966 else {
4f774513 12967 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
af22741c
JS
12968 switch (pIocbOut->iocb.ulpCommand) {
12969 case CMD_ELS_REQUEST64_CR:
12970 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
12971 bpl = (struct ulp_bde64 *)dmabuf->virt;
12972 bde.tus.w = le32_to_cpu(bpl[1].tus.w);
12973 max_response = bde.tus.f.bdeSize;
12974 break;
12975 case CMD_GEN_REQUEST64_CR:
12976 max_response = 0;
12977 if (!pIocbOut->context3)
12978 break;
12979 numBdes = pIocbOut->iocb.un.genreq64.bdl.bdeSize/
12980 sizeof(struct ulp_bde64);
12981 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
12982 bpl = (struct ulp_bde64 *)dmabuf->virt;
12983 for (i = 0; i < numBdes; i++) {
12984 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
12985 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
12986 max_response += bde.tus.f.bdeSize;
12987 }
12988 break;
12989 default:
12990 max_response = wcqe->total_data_placed;
12991 break;
12992 }
12993 if (max_response < wcqe->total_data_placed)
12994 pIocbIn->iocb.un.genreq64.bdl.bdeSize = max_response;
12995 else
12996 pIocbIn->iocb.un.genreq64.bdl.bdeSize =
12997 wcqe->total_data_placed;
695a814e 12998 }
341af102 12999
acd6859b
JS
13000 /* Convert BG errors for completion status */
13001 if (status == CQE_STATUS_DI_ERROR) {
13002 pIocbIn->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
13003
13004 if (bf_get(lpfc_wcqe_c_bg_edir, wcqe))
13005 pIocbIn->iocb.un.ulpWord[4] = IOERR_RX_DMA_FAILED;
13006 else
13007 pIocbIn->iocb.un.ulpWord[4] = IOERR_TX_DMA_FAILED;
13008
13009 pIocbIn->iocb.unsli3.sli3_bg.bgstat = 0;
13010 if (bf_get(lpfc_wcqe_c_bg_ge, wcqe)) /* Guard Check failed */
13011 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13012 BGS_GUARD_ERR_MASK;
13013 if (bf_get(lpfc_wcqe_c_bg_ae, wcqe)) /* App Tag Check failed */
13014 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13015 BGS_APPTAG_ERR_MASK;
13016 if (bf_get(lpfc_wcqe_c_bg_re, wcqe)) /* Ref Tag Check failed */
13017 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13018 BGS_REFTAG_ERR_MASK;
13019
13020 /* Check to see if there was any good data before the error */
13021 if (bf_get(lpfc_wcqe_c_bg_tdpv, wcqe)) {
13022 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13023 BGS_HI_WATER_MARK_PRESENT_MASK;
13024 pIocbIn->iocb.unsli3.sli3_bg.bghm =
13025 wcqe->total_data_placed;
13026 }
13027
13028 /*
13029 * Set ALL the error bits to indicate we don't know what
13030 * type of error it is.
13031 */
13032 if (!pIocbIn->iocb.unsli3.sli3_bg.bgstat)
13033 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13034 (BGS_REFTAG_ERR_MASK | BGS_APPTAG_ERR_MASK |
13035 BGS_GUARD_ERR_MASK);
13036 }
13037
341af102
JS
13038 /* Pick up HBA exchange busy condition */
13039 if (bf_get(lpfc_wcqe_c_xb, wcqe)) {
13040 spin_lock_irqsave(&phba->hbalock, iflags);
13041 pIocbIn->iocb_flag |= LPFC_EXCHANGE_BUSY;
13042 spin_unlock_irqrestore(&phba->hbalock, iflags);
13043 }
4f774513
JS
13044}
13045
45ed1190
JS
13046/**
13047 * lpfc_sli4_els_wcqe_to_rspiocbq - Get response iocbq from els wcqe
13048 * @phba: Pointer to HBA context object.
13049 * @wcqe: Pointer to work-queue completion queue entry.
13050 *
13051 * This routine handles an ELS work-queue completion event and construct
13052 * a pseudo response ELS IODBQ from the SLI4 ELS WCQE for the common
13053 * discovery engine to handle.
13054 *
13055 * Return: Pointer to the receive IOCBQ, NULL otherwise.
13056 **/
13057static struct lpfc_iocbq *
13058lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *phba,
13059 struct lpfc_iocbq *irspiocbq)
13060{
895427bd 13061 struct lpfc_sli_ring *pring;
45ed1190
JS
13062 struct lpfc_iocbq *cmdiocbq;
13063 struct lpfc_wcqe_complete *wcqe;
13064 unsigned long iflags;
13065
895427bd 13066 pring = lpfc_phba_elsring(phba);
1234a6d5
DK
13067 if (unlikely(!pring))
13068 return NULL;
895427bd 13069
45ed1190 13070 wcqe = &irspiocbq->cq_event.cqe.wcqe_cmpl;
45ed1190
JS
13071 pring->stats.iocb_event++;
13072 /* Look up the ELS command IOCB and create pseudo response IOCB */
13073 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13074 bf_get(lpfc_wcqe_c_request_tag, wcqe));
45ed1190
JS
13075 if (unlikely(!cmdiocbq)) {
13076 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13077 "0386 ELS complete with no corresponding "
401bb416
DK
13078 "cmdiocb: 0x%x 0x%x 0x%x 0x%x\n",
13079 wcqe->word0, wcqe->total_data_placed,
13080 wcqe->parameter, wcqe->word3);
45ed1190
JS
13081 lpfc_sli_release_iocbq(phba, irspiocbq);
13082 return NULL;
13083 }
13084
e2a8be56 13085 spin_lock_irqsave(&pring->ring_lock, iflags);
401bb416
DK
13086 /* Put the iocb back on the txcmplq */
13087 lpfc_sli_ringtxcmpl_put(phba, pring, cmdiocbq);
13088 spin_unlock_irqrestore(&pring->ring_lock, iflags);
13089
45ed1190 13090 /* Fake the irspiocbq and copy necessary response information */
341af102 13091 lpfc_sli4_iocb_param_transfer(phba, irspiocbq, cmdiocbq, wcqe);
45ed1190
JS
13092
13093 return irspiocbq;
13094}
13095
8a5ca109
JS
13096inline struct lpfc_cq_event *
13097lpfc_cq_event_setup(struct lpfc_hba *phba, void *entry, int size)
13098{
13099 struct lpfc_cq_event *cq_event;
13100
13101 /* Allocate a new internal CQ_EVENT entry */
13102 cq_event = lpfc_sli4_cq_event_alloc(phba);
13103 if (!cq_event) {
13104 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13105 "0602 Failed to alloc CQ_EVENT entry\n");
13106 return NULL;
13107 }
13108
13109 /* Move the CQE into the event */
13110 memcpy(&cq_event->cqe, entry, size);
13111 return cq_event;
13112}
13113
04c68496
JS
13114/**
13115 * lpfc_sli4_sp_handle_async_event - Handle an asynchroous event
13116 * @phba: Pointer to HBA context object.
13117 * @cqe: Pointer to mailbox completion queue entry.
13118 *
13119 * This routine process a mailbox completion queue entry with asynchrous
13120 * event.
13121 *
13122 * Return: true if work posted to worker thread, otherwise false.
13123 **/
13124static bool
13125lpfc_sli4_sp_handle_async_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13126{
13127 struct lpfc_cq_event *cq_event;
13128 unsigned long iflags;
13129
13130 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13131 "0392 Async Event: word0:x%x, word1:x%x, "
13132 "word2:x%x, word3:x%x\n", mcqe->word0,
13133 mcqe->mcqe_tag0, mcqe->mcqe_tag1, mcqe->trailer);
13134
8a5ca109
JS
13135 cq_event = lpfc_cq_event_setup(phba, mcqe, sizeof(struct lpfc_mcqe));
13136 if (!cq_event)
04c68496 13137 return false;
04c68496
JS
13138 spin_lock_irqsave(&phba->hbalock, iflags);
13139 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_asynce_work_queue);
13140 /* Set the async event flag */
13141 phba->hba_flag |= ASYNC_EVENT;
13142 spin_unlock_irqrestore(&phba->hbalock, iflags);
13143
13144 return true;
13145}
13146
13147/**
13148 * lpfc_sli4_sp_handle_mbox_event - Handle a mailbox completion event
13149 * @phba: Pointer to HBA context object.
13150 * @cqe: Pointer to mailbox completion queue entry.
13151 *
13152 * This routine process a mailbox completion queue entry with mailbox
13153 * completion event.
13154 *
13155 * Return: true if work posted to worker thread, otherwise false.
13156 **/
13157static bool
13158lpfc_sli4_sp_handle_mbox_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13159{
13160 uint32_t mcqe_status;
13161 MAILBOX_t *mbox, *pmbox;
13162 struct lpfc_mqe *mqe;
13163 struct lpfc_vport *vport;
13164 struct lpfc_nodelist *ndlp;
13165 struct lpfc_dmabuf *mp;
13166 unsigned long iflags;
13167 LPFC_MBOXQ_t *pmb;
13168 bool workposted = false;
13169 int rc;
13170
13171 /* If not a mailbox complete MCQE, out by checking mailbox consume */
13172 if (!bf_get(lpfc_trailer_completed, mcqe))
13173 goto out_no_mqe_complete;
13174
13175 /* Get the reference to the active mbox command */
13176 spin_lock_irqsave(&phba->hbalock, iflags);
13177 pmb = phba->sli.mbox_active;
13178 if (unlikely(!pmb)) {
13179 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13180 "1832 No pending MBOX command to handle\n");
13181 spin_unlock_irqrestore(&phba->hbalock, iflags);
13182 goto out_no_mqe_complete;
13183 }
13184 spin_unlock_irqrestore(&phba->hbalock, iflags);
13185 mqe = &pmb->u.mqe;
13186 pmbox = (MAILBOX_t *)&pmb->u.mqe;
13187 mbox = phba->mbox;
13188 vport = pmb->vport;
13189
13190 /* Reset heartbeat timer */
13191 phba->last_completion_time = jiffies;
13192 del_timer(&phba->sli.mbox_tmo);
13193
13194 /* Move mbox data to caller's mailbox region, do endian swapping */
13195 if (pmb->mbox_cmpl && mbox)
48f8fdb4 13196 lpfc_sli4_pcimem_bcopy(mbox, mqe, sizeof(struct lpfc_mqe));
04c68496 13197
73d91e50
JS
13198 /*
13199 * For mcqe errors, conditionally move a modified error code to
13200 * the mbox so that the error will not be missed.
13201 */
13202 mcqe_status = bf_get(lpfc_mcqe_status, mcqe);
13203 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
13204 if (bf_get(lpfc_mqe_status, mqe) == MBX_SUCCESS)
13205 bf_set(lpfc_mqe_status, mqe,
13206 (LPFC_MBX_ERROR_RANGE | mcqe_status));
13207 }
04c68496
JS
13208 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
13209 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
13210 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_MBOX_VPORT,
13211 "MBOX dflt rpi: status:x%x rpi:x%x",
13212 mcqe_status,
13213 pmbox->un.varWords[0], 0);
13214 if (mcqe_status == MB_CQE_STATUS_SUCCESS) {
3e1f0718
JS
13215 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
13216 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
04c68496
JS
13217 /* Reg_LOGIN of dflt RPI was successful. Now lets get
13218 * RID of the PPI using the same mbox buffer.
13219 */
13220 lpfc_unreg_login(phba, vport->vpi,
13221 pmbox->un.varWords[0], pmb);
13222 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
13223 pmb->ctx_buf = mp;
13224 pmb->ctx_ndlp = ndlp;
04c68496
JS
13225 pmb->vport = vport;
13226 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
13227 if (rc != MBX_BUSY)
13228 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
13229 LOG_SLI, "0385 rc should "
13230 "have been MBX_BUSY\n");
13231 if (rc != MBX_NOT_FINISHED)
13232 goto send_current_mbox;
13233 }
13234 }
13235 spin_lock_irqsave(&phba->pport->work_port_lock, iflags);
13236 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
13237 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflags);
13238
13239 /* There is mailbox completion work to do */
13240 spin_lock_irqsave(&phba->hbalock, iflags);
13241 __lpfc_mbox_cmpl_put(phba, pmb);
13242 phba->work_ha |= HA_MBATT;
13243 spin_unlock_irqrestore(&phba->hbalock, iflags);
13244 workposted = true;
13245
13246send_current_mbox:
13247 spin_lock_irqsave(&phba->hbalock, iflags);
13248 /* Release the mailbox command posting token */
13249 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13250 /* Setting active mailbox pointer need to be in sync to flag clear */
13251 phba->sli.mbox_active = NULL;
07b85824
JS
13252 if (bf_get(lpfc_trailer_consumed, mcqe))
13253 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
04c68496
JS
13254 spin_unlock_irqrestore(&phba->hbalock, iflags);
13255 /* Wake up worker thread to post the next pending mailbox command */
13256 lpfc_worker_wake_up(phba);
07b85824
JS
13257 return workposted;
13258
04c68496 13259out_no_mqe_complete:
07b85824 13260 spin_lock_irqsave(&phba->hbalock, iflags);
04c68496
JS
13261 if (bf_get(lpfc_trailer_consumed, mcqe))
13262 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
07b85824
JS
13263 spin_unlock_irqrestore(&phba->hbalock, iflags);
13264 return false;
04c68496
JS
13265}
13266
13267/**
13268 * lpfc_sli4_sp_handle_mcqe - Process a mailbox completion queue entry
13269 * @phba: Pointer to HBA context object.
13270 * @cqe: Pointer to mailbox completion queue entry.
13271 *
13272 * This routine process a mailbox completion queue entry, it invokes the
13273 * proper mailbox complete handling or asynchrous event handling routine
13274 * according to the MCQE's async bit.
13275 *
13276 * Return: true if work posted to worker thread, otherwise false.
13277 **/
13278static bool
32517fc0
JS
13279lpfc_sli4_sp_handle_mcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13280 struct lpfc_cqe *cqe)
04c68496
JS
13281{
13282 struct lpfc_mcqe mcqe;
13283 bool workposted;
13284
32517fc0
JS
13285 cq->CQ_mbox++;
13286
04c68496 13287 /* Copy the mailbox MCQE and convert endian order as needed */
48f8fdb4 13288 lpfc_sli4_pcimem_bcopy(cqe, &mcqe, sizeof(struct lpfc_mcqe));
04c68496
JS
13289
13290 /* Invoke the proper event handling routine */
13291 if (!bf_get(lpfc_trailer_async, &mcqe))
13292 workposted = lpfc_sli4_sp_handle_mbox_event(phba, &mcqe);
13293 else
13294 workposted = lpfc_sli4_sp_handle_async_event(phba, &mcqe);
13295 return workposted;
13296}
13297
4f774513
JS
13298/**
13299 * lpfc_sli4_sp_handle_els_wcqe - Handle els work-queue completion event
13300 * @phba: Pointer to HBA context object.
2a76a283 13301 * @cq: Pointer to associated CQ
4f774513
JS
13302 * @wcqe: Pointer to work-queue completion queue entry.
13303 *
13304 * This routine handles an ELS work-queue completion event.
13305 *
13306 * Return: true if work posted to worker thread, otherwise false.
13307 **/
13308static bool
2a76a283 13309lpfc_sli4_sp_handle_els_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13310 struct lpfc_wcqe_complete *wcqe)
13311{
4f774513
JS
13312 struct lpfc_iocbq *irspiocbq;
13313 unsigned long iflags;
2a76a283 13314 struct lpfc_sli_ring *pring = cq->pring;
0e9bb8d7
JS
13315 int txq_cnt = 0;
13316 int txcmplq_cnt = 0;
4f774513 13317
11f0e34f
JS
13318 /* Check for response status */
13319 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13320 /* Log the error status */
13321 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13322 "0357 ELS CQE error: status=x%x: "
13323 "CQE: %08x %08x %08x %08x\n",
13324 bf_get(lpfc_wcqe_c_status, wcqe),
13325 wcqe->word0, wcqe->total_data_placed,
13326 wcqe->parameter, wcqe->word3);
13327 }
13328
45ed1190 13329 /* Get an irspiocbq for later ELS response processing use */
4f774513
JS
13330 irspiocbq = lpfc_sli_get_iocbq(phba);
13331 if (!irspiocbq) {
0e9bb8d7
JS
13332 if (!list_empty(&pring->txq))
13333 txq_cnt++;
13334 if (!list_empty(&pring->txcmplq))
13335 txcmplq_cnt++;
4f774513 13336 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2a9bf3d0 13337 "0387 NO IOCBQ data: txq_cnt=%d iocb_cnt=%d "
ff349bca 13338 "els_txcmplq_cnt=%d\n",
0e9bb8d7 13339 txq_cnt, phba->iocb_cnt,
0e9bb8d7 13340 txcmplq_cnt);
45ed1190 13341 return false;
4f774513 13342 }
4f774513 13343
45ed1190
JS
13344 /* Save off the slow-path queue event for work thread to process */
13345 memcpy(&irspiocbq->cq_event.cqe.wcqe_cmpl, wcqe, sizeof(*wcqe));
4f774513 13346 spin_lock_irqsave(&phba->hbalock, iflags);
4d9ab994 13347 list_add_tail(&irspiocbq->cq_event.list,
45ed1190
JS
13348 &phba->sli4_hba.sp_queue_event);
13349 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513 13350 spin_unlock_irqrestore(&phba->hbalock, iflags);
4f774513 13351
45ed1190 13352 return true;
4f774513
JS
13353}
13354
13355/**
13356 * lpfc_sli4_sp_handle_rel_wcqe - Handle slow-path WQ entry consumed event
13357 * @phba: Pointer to HBA context object.
13358 * @wcqe: Pointer to work-queue completion queue entry.
13359 *
3f8b6fb7 13360 * This routine handles slow-path WQ entry consumed event by invoking the
4f774513
JS
13361 * proper WQ release routine to the slow-path WQ.
13362 **/
13363static void
13364lpfc_sli4_sp_handle_rel_wcqe(struct lpfc_hba *phba,
13365 struct lpfc_wcqe_release *wcqe)
13366{
2e90f4b5
JS
13367 /* sanity check on queue memory */
13368 if (unlikely(!phba->sli4_hba.els_wq))
13369 return;
4f774513
JS
13370 /* Check for the slow-path ELS work queue */
13371 if (bf_get(lpfc_wcqe_r_wq_id, wcqe) == phba->sli4_hba.els_wq->queue_id)
13372 lpfc_sli4_wq_release(phba->sli4_hba.els_wq,
13373 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
13374 else
13375 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13376 "2579 Slow-path wqe consume event carries "
13377 "miss-matched qid: wcqe-qid=x%x, sp-qid=x%x\n",
13378 bf_get(lpfc_wcqe_r_wqe_index, wcqe),
13379 phba->sli4_hba.els_wq->queue_id);
13380}
13381
13382/**
13383 * lpfc_sli4_sp_handle_abort_xri_wcqe - Handle a xri abort event
13384 * @phba: Pointer to HBA context object.
13385 * @cq: Pointer to a WQ completion queue.
13386 * @wcqe: Pointer to work-queue completion queue entry.
13387 *
13388 * This routine handles an XRI abort event.
13389 *
13390 * Return: true if work posted to worker thread, otherwise false.
13391 **/
13392static bool
13393lpfc_sli4_sp_handle_abort_xri_wcqe(struct lpfc_hba *phba,
13394 struct lpfc_queue *cq,
13395 struct sli4_wcqe_xri_aborted *wcqe)
13396{
13397 bool workposted = false;
13398 struct lpfc_cq_event *cq_event;
13399 unsigned long iflags;
13400
4f774513 13401 switch (cq->subtype) {
c00f62e6
JS
13402 case LPFC_IO:
13403 lpfc_sli4_io_xri_aborted(phba, wcqe, cq->hdwq);
13404 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13405 /* Notify aborted XRI for NVME work queue */
13406 if (phba->nvmet_support)
13407 lpfc_sli4_nvmet_xri_aborted(phba, wcqe);
13408 }
5e5b511d 13409 workposted = false;
4f774513 13410 break;
422c4cb7 13411 case LPFC_NVME_LS: /* NVME LS uses ELS resources */
4f774513 13412 case LPFC_ELS:
8a5ca109
JS
13413 cq_event = lpfc_cq_event_setup(
13414 phba, wcqe, sizeof(struct sli4_wcqe_xri_aborted));
13415 if (!cq_event)
13416 return false;
5e5b511d 13417 cq_event->hdwq = cq->hdwq;
4f774513
JS
13418 spin_lock_irqsave(&phba->hbalock, iflags);
13419 list_add_tail(&cq_event->list,
13420 &phba->sli4_hba.sp_els_xri_aborted_work_queue);
13421 /* Set the els xri abort event flag */
13422 phba->hba_flag |= ELS_XRI_ABORT_EVENT;
13423 spin_unlock_irqrestore(&phba->hbalock, iflags);
13424 workposted = true;
13425 break;
13426 default:
13427 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
318083ad
JS
13428 "0603 Invalid CQ subtype %d: "
13429 "%08x %08x %08x %08x\n",
13430 cq->subtype, wcqe->word0, wcqe->parameter,
13431 wcqe->word2, wcqe->word3);
4f774513
JS
13432 workposted = false;
13433 break;
13434 }
13435 return workposted;
13436}
13437
e817e5d7
JS
13438#define FC_RCTL_MDS_DIAGS 0xF4
13439
4f774513
JS
13440/**
13441 * lpfc_sli4_sp_handle_rcqe - Process a receive-queue completion queue entry
13442 * @phba: Pointer to HBA context object.
13443 * @rcqe: Pointer to receive-queue completion queue entry.
13444 *
13445 * This routine process a receive-queue completion queue entry.
13446 *
13447 * Return: true if work posted to worker thread, otherwise false.
13448 **/
13449static bool
4d9ab994 13450lpfc_sli4_sp_handle_rcqe(struct lpfc_hba *phba, struct lpfc_rcqe *rcqe)
4f774513 13451{
4f774513 13452 bool workposted = false;
e817e5d7 13453 struct fc_frame_header *fc_hdr;
4f774513
JS
13454 struct lpfc_queue *hrq = phba->sli4_hba.hdr_rq;
13455 struct lpfc_queue *drq = phba->sli4_hba.dat_rq;
547077a4 13456 struct lpfc_nvmet_tgtport *tgtp;
4f774513 13457 struct hbq_dmabuf *dma_buf;
7851fe2c 13458 uint32_t status, rq_id;
4f774513
JS
13459 unsigned long iflags;
13460
2e90f4b5
JS
13461 /* sanity check on queue memory */
13462 if (unlikely(!hrq) || unlikely(!drq))
13463 return workposted;
13464
7851fe2c
JS
13465 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13466 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13467 else
13468 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13469 if (rq_id != hrq->queue_id)
4f774513
JS
13470 goto out;
13471
4d9ab994 13472 status = bf_get(lpfc_rcqe_status, rcqe);
4f774513
JS
13473 switch (status) {
13474 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13475 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13476 "2537 Receive Frame Truncated!!\n");
5bd5f66c 13477 /* fall through */
4f774513
JS
13478 case FC_STATUS_RQ_SUCCESS:
13479 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13480 lpfc_sli4_rq_release(hrq, drq);
4f774513
JS
13481 dma_buf = lpfc_sli_hbqbuf_get(&phba->hbqs[0].hbq_buffer_list);
13482 if (!dma_buf) {
b84daac9 13483 hrq->RQ_no_buf_found++;
4f774513
JS
13484 spin_unlock_irqrestore(&phba->hbalock, iflags);
13485 goto out;
13486 }
b84daac9 13487 hrq->RQ_rcv_buf++;
547077a4 13488 hrq->RQ_buf_posted--;
4d9ab994 13489 memcpy(&dma_buf->cq_event.cqe.rcqe_cmpl, rcqe, sizeof(*rcqe));
895427bd 13490
e817e5d7
JS
13491 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13492
13493 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
13494 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
13495 spin_unlock_irqrestore(&phba->hbalock, iflags);
13496 /* Handle MDS Loopback frames */
13497 lpfc_sli4_handle_mds_loopback(phba->pport, dma_buf);
13498 break;
13499 }
13500
13501 /* save off the frame for the work thread to process */
4d9ab994 13502 list_add_tail(&dma_buf->cq_event.list,
45ed1190 13503 &phba->sli4_hba.sp_queue_event);
4f774513 13504 /* Frame received */
45ed1190 13505 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513
JS
13506 spin_unlock_irqrestore(&phba->hbalock, iflags);
13507 workposted = true;
13508 break;
4f774513 13509 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13510 if (phba->nvmet_support) {
13511 tgtp = phba->targetport->private;
13512 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13513 "6402 RQE Error x%x, posted %d err_cnt "
13514 "%d: %x %x %x\n",
13515 status, hrq->RQ_buf_posted,
13516 hrq->RQ_no_posted_buf,
13517 atomic_read(&tgtp->rcv_fcp_cmd_in),
13518 atomic_read(&tgtp->rcv_fcp_cmd_out),
13519 atomic_read(&tgtp->xmt_fcp_release));
13520 }
13521 /* fallthrough */
13522
13523 case FC_STATUS_INSUFF_BUF_NEED_BUF:
b84daac9 13524 hrq->RQ_no_posted_buf++;
4f774513
JS
13525 /* Post more buffers if possible */
13526 spin_lock_irqsave(&phba->hbalock, iflags);
13527 phba->hba_flag |= HBA_POST_RECEIVE_BUFFER;
13528 spin_unlock_irqrestore(&phba->hbalock, iflags);
13529 workposted = true;
13530 break;
13531 }
13532out:
13533 return workposted;
4f774513
JS
13534}
13535
4d9ab994
JS
13536/**
13537 * lpfc_sli4_sp_handle_cqe - Process a slow path completion queue entry
13538 * @phba: Pointer to HBA context object.
13539 * @cq: Pointer to the completion queue.
32517fc0 13540 * @cqe: Pointer to a completion queue entry.
4d9ab994 13541 *
25985edc 13542 * This routine process a slow-path work-queue or receive queue completion queue
4d9ab994
JS
13543 * entry.
13544 *
13545 * Return: true if work posted to worker thread, otherwise false.
13546 **/
13547static bool
13548lpfc_sli4_sp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13549 struct lpfc_cqe *cqe)
13550{
45ed1190 13551 struct lpfc_cqe cqevt;
4d9ab994
JS
13552 bool workposted = false;
13553
13554 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 13555 lpfc_sli4_pcimem_bcopy(cqe, &cqevt, sizeof(struct lpfc_cqe));
4d9ab994
JS
13556
13557 /* Check and process for different type of WCQE and dispatch */
45ed1190 13558 switch (bf_get(lpfc_cqe_code, &cqevt)) {
4d9ab994 13559 case CQE_CODE_COMPL_WQE:
45ed1190 13560 /* Process the WQ/RQ complete event */
bc73905a 13561 phba->last_completion_time = jiffies;
2a76a283 13562 workposted = lpfc_sli4_sp_handle_els_wcqe(phba, cq,
45ed1190 13563 (struct lpfc_wcqe_complete *)&cqevt);
4d9ab994
JS
13564 break;
13565 case CQE_CODE_RELEASE_WQE:
13566 /* Process the WQ release event */
13567 lpfc_sli4_sp_handle_rel_wcqe(phba,
45ed1190 13568 (struct lpfc_wcqe_release *)&cqevt);
4d9ab994
JS
13569 break;
13570 case CQE_CODE_XRI_ABORTED:
13571 /* Process the WQ XRI abort event */
bc73905a 13572 phba->last_completion_time = jiffies;
4d9ab994 13573 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
45ed1190 13574 (struct sli4_wcqe_xri_aborted *)&cqevt);
4d9ab994
JS
13575 break;
13576 case CQE_CODE_RECEIVE:
7851fe2c 13577 case CQE_CODE_RECEIVE_V1:
4d9ab994 13578 /* Process the RQ event */
bc73905a 13579 phba->last_completion_time = jiffies;
4d9ab994 13580 workposted = lpfc_sli4_sp_handle_rcqe(phba,
45ed1190 13581 (struct lpfc_rcqe *)&cqevt);
4d9ab994
JS
13582 break;
13583 default:
13584 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13585 "0388 Not a valid WCQE code: x%x\n",
45ed1190 13586 bf_get(lpfc_cqe_code, &cqevt));
4d9ab994
JS
13587 break;
13588 }
13589 return workposted;
13590}
13591
4f774513
JS
13592/**
13593 * lpfc_sli4_sp_handle_eqe - Process a slow-path event queue entry
13594 * @phba: Pointer to HBA context object.
13595 * @eqe: Pointer to fast-path event queue entry.
13596 *
13597 * This routine process a event queue entry from the slow-path event queue.
13598 * It will check the MajorCode and MinorCode to determine this is for a
13599 * completion event on a completion queue, if not, an error shall be logged
13600 * and just return. Otherwise, it will get to the corresponding completion
13601 * queue and process all the entries on that completion queue, rearm the
13602 * completion queue, and then return.
13603 *
13604 **/
f485c18d 13605static void
67d12733
JS
13606lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
13607 struct lpfc_queue *speq)
4f774513 13608{
67d12733 13609 struct lpfc_queue *cq = NULL, *childq;
4f774513
JS
13610 uint16_t cqid;
13611
4f774513 13612 /* Get the reference to the corresponding CQ */
cb5172ea 13613 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
4f774513 13614
4f774513
JS
13615 list_for_each_entry(childq, &speq->child_list, list) {
13616 if (childq->queue_id == cqid) {
13617 cq = childq;
13618 break;
13619 }
13620 }
13621 if (unlikely(!cq)) {
75baf696
JS
13622 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
13623 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13624 "0365 Slow-path CQ identifier "
13625 "(%d) does not exist\n", cqid);
f485c18d 13626 return;
4f774513
JS
13627 }
13628
895427bd
JS
13629 /* Save EQ associated with this CQ */
13630 cq->assoc_qp = speq;
13631
6a828b0f 13632 if (!queue_work_on(cq->chann, phba->wq, &cq->spwork))
f485c18d
DK
13633 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13634 "0390 Cannot schedule soft IRQ "
13635 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
d6d189ce 13636 cqid, cq->queue_id, raw_smp_processor_id());
f485c18d
DK
13637}
13638
13639/**
32517fc0 13640 * __lpfc_sli4_process_cq - Process elements of a CQ
f485c18d 13641 * @phba: Pointer to HBA context object.
32517fc0
JS
13642 * @cq: Pointer to CQ to be processed
13643 * @handler: Routine to process each cqe
13644 * @delay: Pointer to usdelay to set in case of rescheduling of the handler
f485c18d 13645 *
32517fc0
JS
13646 * This routine processes completion queue entries in a CQ. While a valid
13647 * queue element is found, the handler is called. During processing checks
13648 * are made for periodic doorbell writes to let the hardware know of
13649 * element consumption.
13650 *
13651 * If the max limit on cqes to process is hit, or there are no more valid
13652 * entries, the loop stops. If we processed a sufficient number of elements,
13653 * meaning there is sufficient load, rather than rearming and generating
13654 * another interrupt, a cq rescheduling delay will be set. A delay of 0
13655 * indicates no rescheduling.
f485c18d 13656 *
32517fc0 13657 * Returns True if work scheduled, False otherwise.
f485c18d 13658 **/
32517fc0
JS
13659static bool
13660__lpfc_sli4_process_cq(struct lpfc_hba *phba, struct lpfc_queue *cq,
13661 bool (*handler)(struct lpfc_hba *, struct lpfc_queue *,
13662 struct lpfc_cqe *), unsigned long *delay)
f485c18d 13663{
f485c18d
DK
13664 struct lpfc_cqe *cqe;
13665 bool workposted = false;
32517fc0
JS
13666 int count = 0, consumed = 0;
13667 bool arm = true;
13668
13669 /* default - no reschedule */
13670 *delay = 0;
13671
13672 if (cmpxchg(&cq->queue_claimed, 0, 1) != 0)
13673 goto rearm_and_exit;
f485c18d 13674
4f774513 13675 /* Process all the entries to the CQ */
d74a89aa 13676 cq->q_flag = 0;
32517fc0
JS
13677 cqe = lpfc_sli4_cq_get(cq);
13678 while (cqe) {
32517fc0
JS
13679 workposted |= handler(phba, cq, cqe);
13680 __lpfc_sli4_consume_cqe(phba, cq, cqe);
13681
13682 consumed++;
13683 if (!(++count % cq->max_proc_limit))
13684 break;
13685
13686 if (!(count % cq->notify_interval)) {
13687 phba->sli4_hba.sli4_write_cq_db(phba, cq, consumed,
13688 LPFC_QUEUE_NOARM);
13689 consumed = 0;
8156d378 13690 cq->assoc_qp->q_flag |= HBA_EQ_DELAY_CHK;
32517fc0
JS
13691 }
13692
d74a89aa
JS
13693 if (count == LPFC_NVMET_CQ_NOTIFY)
13694 cq->q_flag |= HBA_NVMET_CQ_NOTIFY;
13695
32517fc0
JS
13696 cqe = lpfc_sli4_cq_get(cq);
13697 }
13698 if (count >= phba->cfg_cq_poll_threshold) {
13699 *delay = 1;
13700 arm = false;
13701 }
13702
13703 /* Track the max number of CQEs processed in 1 EQ */
13704 if (count > cq->CQ_max_cqe)
13705 cq->CQ_max_cqe = count;
13706
13707 cq->assoc_qp->EQ_cqe_cnt += count;
13708
13709 /* Catch the no cq entry condition */
13710 if (unlikely(count == 0))
13711 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13712 "0369 No entry from completion queue "
13713 "qid=%d\n", cq->queue_id);
13714
13715 cq->queue_claimed = 0;
13716
13717rearm_and_exit:
13718 phba->sli4_hba.sli4_write_cq_db(phba, cq, consumed,
13719 arm ? LPFC_QUEUE_REARM : LPFC_QUEUE_NOARM);
13720
13721 return workposted;
13722}
13723
13724/**
13725 * lpfc_sli4_sp_process_cq - Process a slow-path event queue entry
13726 * @cq: pointer to CQ to process
13727 *
13728 * This routine calls the cq processing routine with a handler specific
13729 * to the type of queue bound to it.
13730 *
13731 * The CQ routine returns two values: the first is the calling status,
13732 * which indicates whether work was queued to the background discovery
13733 * thread. If true, the routine should wakeup the discovery thread;
13734 * the second is the delay parameter. If non-zero, rather than rearming
13735 * the CQ and yet another interrupt, the CQ handler should be queued so
13736 * that it is processed in a subsequent polling action. The value of
13737 * the delay indicates when to reschedule it.
13738 **/
13739static void
13740__lpfc_sli4_sp_process_cq(struct lpfc_queue *cq)
13741{
13742 struct lpfc_hba *phba = cq->phba;
13743 unsigned long delay;
13744 bool workposted = false;
13745
13746 /* Process and rearm the CQ */
4f774513
JS
13747 switch (cq->type) {
13748 case LPFC_MCQ:
32517fc0
JS
13749 workposted |= __lpfc_sli4_process_cq(phba, cq,
13750 lpfc_sli4_sp_handle_mcqe,
13751 &delay);
4f774513
JS
13752 break;
13753 case LPFC_WCQ:
c00f62e6 13754 if (cq->subtype == LPFC_IO)
32517fc0
JS
13755 workposted |= __lpfc_sli4_process_cq(phba, cq,
13756 lpfc_sli4_fp_handle_cqe,
13757 &delay);
13758 else
13759 workposted |= __lpfc_sli4_process_cq(phba, cq,
13760 lpfc_sli4_sp_handle_cqe,
13761 &delay);
4f774513
JS
13762 break;
13763 default:
13764 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13765 "0370 Invalid completion queue type (%d)\n",
13766 cq->type);
f485c18d 13767 return;
4f774513
JS
13768 }
13769
32517fc0
JS
13770 if (delay) {
13771 if (!queue_delayed_work_on(cq->chann, phba->wq,
13772 &cq->sched_spwork, delay))
13773 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13774 "0394 Cannot schedule soft IRQ "
13775 "for cqid=%d on CPU %d\n",
13776 cq->queue_id, cq->chann);
13777 }
4f774513
JS
13778
13779 /* wake up worker thread if there are works to be done */
13780 if (workposted)
13781 lpfc_worker_wake_up(phba);
13782}
13783
32517fc0
JS
13784/**
13785 * lpfc_sli4_sp_process_cq - slow-path work handler when started by
13786 * interrupt
13787 * @work: pointer to work element
13788 *
13789 * translates from the work handler and calls the slow-path handler.
13790 **/
13791static void
13792lpfc_sli4_sp_process_cq(struct work_struct *work)
13793{
13794 struct lpfc_queue *cq = container_of(work, struct lpfc_queue, spwork);
13795
13796 __lpfc_sli4_sp_process_cq(cq);
13797}
13798
13799/**
13800 * lpfc_sli4_dly_sp_process_cq - slow-path work handler when started by timer
13801 * @work: pointer to work element
13802 *
13803 * translates from the work handler and calls the slow-path handler.
13804 **/
13805static void
13806lpfc_sli4_dly_sp_process_cq(struct work_struct *work)
13807{
13808 struct lpfc_queue *cq = container_of(to_delayed_work(work),
13809 struct lpfc_queue, sched_spwork);
13810
13811 __lpfc_sli4_sp_process_cq(cq);
13812}
13813
4f774513
JS
13814/**
13815 * lpfc_sli4_fp_handle_fcp_wcqe - Process fast-path work queue completion entry
2a76a283
JS
13816 * @phba: Pointer to HBA context object.
13817 * @cq: Pointer to associated CQ
13818 * @wcqe: Pointer to work-queue completion queue entry.
4f774513
JS
13819 *
13820 * This routine process a fast-path work queue completion entry from fast-path
13821 * event queue for FCP command response completion.
13822 **/
13823static void
2a76a283 13824lpfc_sli4_fp_handle_fcp_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13825 struct lpfc_wcqe_complete *wcqe)
13826{
2a76a283 13827 struct lpfc_sli_ring *pring = cq->pring;
4f774513
JS
13828 struct lpfc_iocbq *cmdiocbq;
13829 struct lpfc_iocbq irspiocbq;
13830 unsigned long iflags;
13831
4f774513
JS
13832 /* Check for response status */
13833 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13834 /* If resource errors reported from HBA, reduce queue
13835 * depth of the SCSI device.
13836 */
e3d2b802
JS
13837 if (((bf_get(lpfc_wcqe_c_status, wcqe) ==
13838 IOSTAT_LOCAL_REJECT)) &&
13839 ((wcqe->parameter & IOERR_PARAM_MASK) ==
13840 IOERR_NO_RESOURCES))
4f774513 13841 phba->lpfc_rampdown_queue_depth(phba);
e3d2b802 13842
4f774513 13843 /* Log the error status */
11f0e34f
JS
13844 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13845 "0373 FCP CQE error: status=x%x: "
13846 "CQE: %08x %08x %08x %08x\n",
4f774513 13847 bf_get(lpfc_wcqe_c_status, wcqe),
11f0e34f
JS
13848 wcqe->word0, wcqe->total_data_placed,
13849 wcqe->parameter, wcqe->word3);
4f774513
JS
13850 }
13851
13852 /* Look up the FCP command IOCB and create pseudo response IOCB */
7e56aa25
JS
13853 spin_lock_irqsave(&pring->ring_lock, iflags);
13854 pring->stats.iocb_event++;
e2a8be56 13855 spin_unlock_irqrestore(&pring->ring_lock, iflags);
4f774513
JS
13856 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13857 bf_get(lpfc_wcqe_c_request_tag, wcqe));
4f774513
JS
13858 if (unlikely(!cmdiocbq)) {
13859 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13860 "0374 FCP complete with no corresponding "
13861 "cmdiocb: iotag (%d)\n",
13862 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13863 return;
13864 }
c8a4ce0b
DK
13865#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13866 cmdiocbq->isr_timestamp = cq->isr_timestamp;
13867#endif
895427bd
JS
13868 if (cmdiocbq->iocb_cmpl == NULL) {
13869 if (cmdiocbq->wqe_cmpl) {
13870 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13871 spin_lock_irqsave(&phba->hbalock, iflags);
13872 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13873 spin_unlock_irqrestore(&phba->hbalock, iflags);
13874 }
13875
13876 /* Pass the cmd_iocb and the wcqe to the upper layer */
13877 (cmdiocbq->wqe_cmpl)(phba, cmdiocbq, wcqe);
13878 return;
13879 }
4f774513
JS
13880 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13881 "0375 FCP cmdiocb not callback function "
13882 "iotag: (%d)\n",
13883 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13884 return;
13885 }
13886
13887 /* Fake the irspiocb and copy necessary response information */
341af102 13888 lpfc_sli4_iocb_param_transfer(phba, &irspiocbq, cmdiocbq, wcqe);
4f774513 13889
0f65ff68
JS
13890 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13891 spin_lock_irqsave(&phba->hbalock, iflags);
13892 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13893 spin_unlock_irqrestore(&phba->hbalock, iflags);
13894 }
13895
4f774513
JS
13896 /* Pass the cmd_iocb and the rsp state to the upper layer */
13897 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, &irspiocbq);
13898}
13899
13900/**
13901 * lpfc_sli4_fp_handle_rel_wcqe - Handle fast-path WQ entry consumed event
13902 * @phba: Pointer to HBA context object.
13903 * @cq: Pointer to completion queue.
13904 * @wcqe: Pointer to work-queue completion queue entry.
13905 *
3f8b6fb7 13906 * This routine handles an fast-path WQ entry consumed event by invoking the
4f774513
JS
13907 * proper WQ release routine to the slow-path WQ.
13908 **/
13909static void
13910lpfc_sli4_fp_handle_rel_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13911 struct lpfc_wcqe_release *wcqe)
13912{
13913 struct lpfc_queue *childwq;
13914 bool wqid_matched = false;
895427bd 13915 uint16_t hba_wqid;
4f774513
JS
13916
13917 /* Check for fast-path FCP work queue release */
895427bd 13918 hba_wqid = bf_get(lpfc_wcqe_r_wq_id, wcqe);
4f774513 13919 list_for_each_entry(childwq, &cq->child_list, list) {
895427bd 13920 if (childwq->queue_id == hba_wqid) {
4f774513
JS
13921 lpfc_sli4_wq_release(childwq,
13922 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
6e8e1c14
JS
13923 if (childwq->q_flag & HBA_NVMET_WQFULL)
13924 lpfc_nvmet_wqfull_process(phba, childwq);
4f774513
JS
13925 wqid_matched = true;
13926 break;
13927 }
13928 }
13929 /* Report warning log message if no match found */
13930 if (wqid_matched != true)
13931 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13932 "2580 Fast-path wqe consume event carries "
895427bd 13933 "miss-matched qid: wcqe-qid=x%x\n", hba_wqid);
4f774513
JS
13934}
13935
13936/**
2d7dbc4c
JS
13937 * lpfc_sli4_nvmet_handle_rcqe - Process a receive-queue completion queue entry
13938 * @phba: Pointer to HBA context object.
13939 * @rcqe: Pointer to receive-queue completion queue entry.
4f774513 13940 *
2d7dbc4c
JS
13941 * This routine process a receive-queue completion queue entry.
13942 *
13943 * Return: true if work posted to worker thread, otherwise false.
13944 **/
13945static bool
13946lpfc_sli4_nvmet_handle_rcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13947 struct lpfc_rcqe *rcqe)
13948{
13949 bool workposted = false;
13950 struct lpfc_queue *hrq;
13951 struct lpfc_queue *drq;
13952 struct rqb_dmabuf *dma_buf;
13953 struct fc_frame_header *fc_hdr;
547077a4 13954 struct lpfc_nvmet_tgtport *tgtp;
2d7dbc4c
JS
13955 uint32_t status, rq_id;
13956 unsigned long iflags;
13957 uint32_t fctl, idx;
13958
13959 if ((phba->nvmet_support == 0) ||
13960 (phba->sli4_hba.nvmet_cqset == NULL))
13961 return workposted;
13962
13963 idx = cq->queue_id - phba->sli4_hba.nvmet_cqset[0]->queue_id;
13964 hrq = phba->sli4_hba.nvmet_mrq_hdr[idx];
13965 drq = phba->sli4_hba.nvmet_mrq_data[idx];
13966
13967 /* sanity check on queue memory */
13968 if (unlikely(!hrq) || unlikely(!drq))
13969 return workposted;
13970
13971 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13972 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13973 else
13974 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13975
13976 if ((phba->nvmet_support == 0) ||
13977 (rq_id != hrq->queue_id))
13978 return workposted;
13979
13980 status = bf_get(lpfc_rcqe_status, rcqe);
13981 switch (status) {
13982 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13983 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13984 "6126 Receive Frame Truncated!!\n");
5bd5f66c 13985 /* fall through */
2d7dbc4c 13986 case FC_STATUS_RQ_SUCCESS:
2d7dbc4c 13987 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13988 lpfc_sli4_rq_release(hrq, drq);
2d7dbc4c
JS
13989 dma_buf = lpfc_sli_rqbuf_get(phba, hrq);
13990 if (!dma_buf) {
13991 hrq->RQ_no_buf_found++;
13992 spin_unlock_irqrestore(&phba->hbalock, iflags);
13993 goto out;
13994 }
13995 spin_unlock_irqrestore(&phba->hbalock, iflags);
13996 hrq->RQ_rcv_buf++;
547077a4 13997 hrq->RQ_buf_posted--;
2d7dbc4c
JS
13998 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13999
14000 /* Just some basic sanity checks on FCP Command frame */
14001 fctl = (fc_hdr->fh_f_ctl[0] << 16 |
14002 fc_hdr->fh_f_ctl[1] << 8 |
14003 fc_hdr->fh_f_ctl[2]);
14004 if (((fctl &
14005 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) !=
14006 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) ||
14007 (fc_hdr->fh_seq_cnt != 0)) /* 0 byte swapped is still 0 */
14008 goto drop;
14009
14010 if (fc_hdr->fh_type == FC_TYPE_FCP) {
d74a89aa 14011 dma_buf->bytes_recv = bf_get(lpfc_rcqe_length, rcqe);
d613b6a7 14012 lpfc_nvmet_unsol_fcp_event(
d74a89aa
JS
14013 phba, idx, dma_buf, cq->isr_timestamp,
14014 cq->q_flag & HBA_NVMET_CQ_NOTIFY);
2d7dbc4c
JS
14015 return false;
14016 }
14017drop:
22b738ac 14018 lpfc_rq_buf_free(phba, &dma_buf->hbuf);
2d7dbc4c 14019 break;
2d7dbc4c 14020 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
14021 if (phba->nvmet_support) {
14022 tgtp = phba->targetport->private;
14023 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
14024 "6401 RQE Error x%x, posted %d err_cnt "
14025 "%d: %x %x %x\n",
14026 status, hrq->RQ_buf_posted,
14027 hrq->RQ_no_posted_buf,
14028 atomic_read(&tgtp->rcv_fcp_cmd_in),
14029 atomic_read(&tgtp->rcv_fcp_cmd_out),
14030 atomic_read(&tgtp->xmt_fcp_release));
14031 }
14032 /* fallthrough */
14033
14034 case FC_STATUS_INSUFF_BUF_NEED_BUF:
2d7dbc4c
JS
14035 hrq->RQ_no_posted_buf++;
14036 /* Post more buffers if possible */
2d7dbc4c
JS
14037 break;
14038 }
14039out:
14040 return workposted;
14041}
14042
4f774513 14043/**
895427bd 14044 * lpfc_sli4_fp_handle_cqe - Process fast-path work queue completion entry
32517fc0 14045 * @phba: adapter with cq
4f774513
JS
14046 * @cq: Pointer to the completion queue.
14047 * @eqe: Pointer to fast-path completion queue entry.
14048 *
14049 * This routine process a fast-path work queue completion entry from fast-path
14050 * event queue for FCP command response completion.
32517fc0
JS
14051 *
14052 * Return: true if work posted to worker thread, otherwise false.
4f774513 14053 **/
32517fc0 14054static bool
895427bd 14055lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
14056 struct lpfc_cqe *cqe)
14057{
14058 struct lpfc_wcqe_release wcqe;
14059 bool workposted = false;
14060
14061 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 14062 lpfc_sli4_pcimem_bcopy(cqe, &wcqe, sizeof(struct lpfc_cqe));
4f774513
JS
14063
14064 /* Check and process for different type of WCQE and dispatch */
14065 switch (bf_get(lpfc_wcqe_c_code, &wcqe)) {
14066 case CQE_CODE_COMPL_WQE:
895427bd 14067 case CQE_CODE_NVME_ERSP:
b84daac9 14068 cq->CQ_wq++;
4f774513 14069 /* Process the WQ complete event */
98fc5dd9 14070 phba->last_completion_time = jiffies;
c00f62e6 14071 if (cq->subtype == LPFC_IO || cq->subtype == LPFC_NVME_LS)
895427bd 14072 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
4f774513
JS
14073 (struct lpfc_wcqe_complete *)&wcqe);
14074 break;
14075 case CQE_CODE_RELEASE_WQE:
b84daac9 14076 cq->CQ_release_wqe++;
4f774513
JS
14077 /* Process the WQ release event */
14078 lpfc_sli4_fp_handle_rel_wcqe(phba, cq,
14079 (struct lpfc_wcqe_release *)&wcqe);
14080 break;
14081 case CQE_CODE_XRI_ABORTED:
b84daac9 14082 cq->CQ_xri_aborted++;
4f774513 14083 /* Process the WQ XRI abort event */
bc73905a 14084 phba->last_completion_time = jiffies;
4f774513
JS
14085 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
14086 (struct sli4_wcqe_xri_aborted *)&wcqe);
14087 break;
895427bd
JS
14088 case CQE_CODE_RECEIVE_V1:
14089 case CQE_CODE_RECEIVE:
14090 phba->last_completion_time = jiffies;
2d7dbc4c
JS
14091 if (cq->subtype == LPFC_NVMET) {
14092 workposted = lpfc_sli4_nvmet_handle_rcqe(
14093 phba, cq, (struct lpfc_rcqe *)&wcqe);
14094 }
895427bd 14095 break;
4f774513
JS
14096 default:
14097 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 14098 "0144 Not a valid CQE code: x%x\n",
4f774513
JS
14099 bf_get(lpfc_wcqe_c_code, &wcqe));
14100 break;
14101 }
14102 return workposted;
14103}
14104
14105/**
67d12733 14106 * lpfc_sli4_hba_handle_eqe - Process a fast-path event queue entry
4f774513
JS
14107 * @phba: Pointer to HBA context object.
14108 * @eqe: Pointer to fast-path event queue entry.
14109 *
14110 * This routine process a event queue entry from the fast-path event queue.
14111 * It will check the MajorCode and MinorCode to determine this is for a
14112 * completion event on a completion queue, if not, an error shall be logged
14113 * and just return. Otherwise, it will get to the corresponding completion
14114 * queue and process all the entries on the completion queue, rearm the
14115 * completion queue, and then return.
14116 **/
f485c18d 14117static void
32517fc0
JS
14118lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba, struct lpfc_queue *eq,
14119 struct lpfc_eqe *eqe)
4f774513 14120{
895427bd 14121 struct lpfc_queue *cq = NULL;
32517fc0 14122 uint32_t qidx = eq->hdwq;
2d7dbc4c 14123 uint16_t cqid, id;
4f774513 14124
cb5172ea 14125 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
4f774513 14126 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
67d12733 14127 "0366 Not a valid completion "
4f774513 14128 "event: majorcode=x%x, minorcode=x%x\n",
cb5172ea
JS
14129 bf_get_le32(lpfc_eqe_major_code, eqe),
14130 bf_get_le32(lpfc_eqe_minor_code, eqe));
f485c18d 14131 return;
4f774513
JS
14132 }
14133
67d12733
JS
14134 /* Get the reference to the corresponding CQ */
14135 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
14136
6a828b0f
JS
14137 /* Use the fast lookup method first */
14138 if (cqid <= phba->sli4_hba.cq_max) {
14139 cq = phba->sli4_hba.cq_lookup[cqid];
14140 if (cq)
14141 goto work_cq;
cdb42bec
JS
14142 }
14143
14144 /* Next check for NVMET completion */
2d7dbc4c
JS
14145 if (phba->cfg_nvmet_mrq && phba->sli4_hba.nvmet_cqset) {
14146 id = phba->sli4_hba.nvmet_cqset[0]->queue_id;
14147 if ((cqid >= id) && (cqid < (id + phba->cfg_nvmet_mrq))) {
14148 /* Process NVMET unsol rcv */
14149 cq = phba->sli4_hba.nvmet_cqset[cqid - id];
14150 goto process_cq;
14151 }
67d12733
JS
14152 }
14153
895427bd
JS
14154 if (phba->sli4_hba.nvmels_cq &&
14155 (cqid == phba->sli4_hba.nvmels_cq->queue_id)) {
14156 /* Process NVME unsol rcv */
14157 cq = phba->sli4_hba.nvmels_cq;
14158 }
14159
14160 /* Otherwise this is a Slow path event */
14161 if (cq == NULL) {
cdb42bec
JS
14162 lpfc_sli4_sp_handle_eqe(phba, eqe,
14163 phba->sli4_hba.hdwq[qidx].hba_eq);
f485c18d 14164 return;
4f774513
JS
14165 }
14166
895427bd 14167process_cq:
4f774513
JS
14168 if (unlikely(cqid != cq->queue_id)) {
14169 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14170 "0368 Miss-matched fast-path completion "
14171 "queue identifier: eqcqid=%d, fcpcqid=%d\n",
14172 cqid, cq->queue_id);
f485c18d 14173 return;
4f774513
JS
14174 }
14175
6a828b0f 14176work_cq:
d74a89aa
JS
14177#if defined(CONFIG_SCSI_LPFC_DEBUG_FS)
14178 if (phba->ktime_on)
14179 cq->isr_timestamp = ktime_get_ns();
14180 else
14181 cq->isr_timestamp = 0;
14182#endif
45aa312e 14183 if (!queue_work_on(cq->chann, phba->wq, &cq->irqwork))
f485c18d
DK
14184 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14185 "0363 Cannot schedule soft IRQ "
14186 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
d6d189ce 14187 cqid, cq->queue_id, raw_smp_processor_id());
f485c18d
DK
14188}
14189
14190/**
32517fc0
JS
14191 * __lpfc_sli4_hba_process_cq - Process a fast-path event queue entry
14192 * @cq: Pointer to CQ to be processed
f485c18d 14193 *
32517fc0
JS
14194 * This routine calls the cq processing routine with the handler for
14195 * fast path CQEs.
14196 *
14197 * The CQ routine returns two values: the first is the calling status,
14198 * which indicates whether work was queued to the background discovery
14199 * thread. If true, the routine should wakeup the discovery thread;
14200 * the second is the delay parameter. If non-zero, rather than rearming
14201 * the CQ and yet another interrupt, the CQ handler should be queued so
14202 * that it is processed in a subsequent polling action. The value of
14203 * the delay indicates when to reschedule it.
f485c18d
DK
14204 **/
14205static void
32517fc0 14206__lpfc_sli4_hba_process_cq(struct lpfc_queue *cq)
f485c18d 14207{
f485c18d 14208 struct lpfc_hba *phba = cq->phba;
32517fc0 14209 unsigned long delay;
f485c18d 14210 bool workposted = false;
f485c18d 14211
32517fc0
JS
14212 /* process and rearm the CQ */
14213 workposted |= __lpfc_sli4_process_cq(phba, cq, lpfc_sli4_fp_handle_cqe,
14214 &delay);
4f774513 14215
32517fc0
JS
14216 if (delay) {
14217 if (!queue_delayed_work_on(cq->chann, phba->wq,
14218 &cq->sched_irqwork, delay))
14219 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14220 "0367 Cannot schedule soft IRQ "
14221 "for cqid=%d on CPU %d\n",
14222 cq->queue_id, cq->chann);
14223 }
4f774513
JS
14224
14225 /* wake up worker thread if there are works to be done */
14226 if (workposted)
14227 lpfc_worker_wake_up(phba);
14228}
14229
1ba981fd 14230/**
32517fc0
JS
14231 * lpfc_sli4_hba_process_cq - fast-path work handler when started by
14232 * interrupt
14233 * @work: pointer to work element
1ba981fd 14234 *
32517fc0 14235 * translates from the work handler and calls the fast-path handler.
1ba981fd
JS
14236 **/
14237static void
32517fc0 14238lpfc_sli4_hba_process_cq(struct work_struct *work)
1ba981fd 14239{
32517fc0 14240 struct lpfc_queue *cq = container_of(work, struct lpfc_queue, irqwork);
1ba981fd 14241
32517fc0 14242 __lpfc_sli4_hba_process_cq(cq);
1ba981fd
JS
14243}
14244
14245/**
32517fc0
JS
14246 * lpfc_sli4_hba_process_cq - fast-path work handler when started by timer
14247 * @work: pointer to work element
1ba981fd 14248 *
32517fc0 14249 * translates from the work handler and calls the fast-path handler.
1ba981fd 14250 **/
32517fc0
JS
14251static void
14252lpfc_sli4_dly_hba_process_cq(struct work_struct *work)
1ba981fd 14253{
32517fc0
JS
14254 struct lpfc_queue *cq = container_of(to_delayed_work(work),
14255 struct lpfc_queue, sched_irqwork);
1ba981fd 14256
32517fc0 14257 __lpfc_sli4_hba_process_cq(cq);
1ba981fd
JS
14258}
14259
4f774513 14260/**
67d12733 14261 * lpfc_sli4_hba_intr_handler - HBA interrupt handler to SLI-4 device
4f774513
JS
14262 * @irq: Interrupt number.
14263 * @dev_id: The device context pointer.
14264 *
14265 * This function is directly called from the PCI layer as an interrupt
14266 * service routine when device with SLI-4 interface spec is enabled with
14267 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
14268 * ring event in the HBA. However, when the device is enabled with either
14269 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
14270 * device-level interrupt handler. When the PCI slot is in error recovery
14271 * or the HBA is undergoing initialization, the interrupt handler will not
14272 * process the interrupt. The SCSI FCP fast-path ring event are handled in
14273 * the intrrupt context. This function is called without any lock held.
14274 * It gets the hbalock to access and update SLI data structures. Note that,
14275 * the FCP EQ to FCP CQ are one-to-one map such that the FCP EQ index is
14276 * equal to that of FCP CQ index.
14277 *
67d12733
JS
14278 * The link attention and ELS ring attention events are handled
14279 * by the worker thread. The interrupt handler signals the worker thread
14280 * and returns for these events. This function is called without any lock
14281 * held. It gets the hbalock to access and update SLI data structures.
14282 *
4f774513
JS
14283 * This function returns IRQ_HANDLED when interrupt is handled else it
14284 * returns IRQ_NONE.
14285 **/
14286irqreturn_t
67d12733 14287lpfc_sli4_hba_intr_handler(int irq, void *dev_id)
4f774513
JS
14288{
14289 struct lpfc_hba *phba;
895427bd 14290 struct lpfc_hba_eq_hdl *hba_eq_hdl;
4f774513 14291 struct lpfc_queue *fpeq;
4f774513
JS
14292 unsigned long iflag;
14293 int ecount = 0;
895427bd 14294 int hba_eqidx;
32517fc0
JS
14295 struct lpfc_eq_intr_info *eqi;
14296 uint32_t icnt;
4f774513
JS
14297
14298 /* Get the driver's phba structure from the dev_id */
895427bd
JS
14299 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
14300 phba = hba_eq_hdl->phba;
14301 hba_eqidx = hba_eq_hdl->idx;
4f774513
JS
14302
14303 if (unlikely(!phba))
14304 return IRQ_NONE;
cdb42bec 14305 if (unlikely(!phba->sli4_hba.hdwq))
5350d872 14306 return IRQ_NONE;
4f774513
JS
14307
14308 /* Get to the EQ struct associated with this vector */
657add4e 14309 fpeq = phba->sli4_hba.hba_eq_hdl[hba_eqidx].eq;
2e90f4b5
JS
14310 if (unlikely(!fpeq))
14311 return IRQ_NONE;
4f774513
JS
14312
14313 /* Check device state for handling interrupt */
14314 if (unlikely(lpfc_intr_state_check(phba))) {
14315 /* Check again for link_state with lock held */
14316 spin_lock_irqsave(&phba->hbalock, iflag);
14317 if (phba->link_state < LPFC_LINK_DOWN)
14318 /* Flush, clear interrupt, and rearm the EQ */
24c7c0a6 14319 lpfc_sli4_eqcq_flush(phba, fpeq);
4f774513
JS
14320 spin_unlock_irqrestore(&phba->hbalock, iflag);
14321 return IRQ_NONE;
14322 }
14323
32517fc0
JS
14324 eqi = phba->sli4_hba.eq_info;
14325 icnt = this_cpu_inc_return(eqi->icnt);
d6d189ce 14326 fpeq->last_cpu = raw_smp_processor_id();
4f774513 14327
32517fc0 14328 if (icnt > LPFC_EQD_ISR_TRIGGER &&
8156d378 14329 fpeq->q_flag & HBA_EQ_DELAY_CHK &&
32517fc0
JS
14330 phba->cfg_auto_imax &&
14331 fpeq->q_mode != LPFC_MAX_AUTO_EQ_DELAY &&
14332 phba->sli.sli_flag & LPFC_SLI_USE_EQDR)
14333 lpfc_sli4_mod_hba_eq_delay(phba, fpeq, LPFC_MAX_AUTO_EQ_DELAY);
b84daac9 14334
32517fc0 14335 /* process and rearm the EQ */
93a4d6f4 14336 ecount = lpfc_sli4_process_eq(phba, fpeq, LPFC_QUEUE_REARM);
4f774513
JS
14337
14338 if (unlikely(ecount == 0)) {
b84daac9 14339 fpeq->EQ_no_entry++;
4f774513
JS
14340 if (phba->intr_type == MSIX)
14341 /* MSI-X treated interrupt served as no EQ share INT */
14342 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14343 "0358 MSI-X interrupt with no EQE\n");
14344 else
14345 /* Non MSI-X treated on interrupt as EQ share INT */
14346 return IRQ_NONE;
14347 }
14348
14349 return IRQ_HANDLED;
14350} /* lpfc_sli4_fp_intr_handler */
14351
14352/**
14353 * lpfc_sli4_intr_handler - Device-level interrupt handler for SLI-4 device
14354 * @irq: Interrupt number.
14355 * @dev_id: The device context pointer.
14356 *
14357 * This function is the device-level interrupt handler to device with SLI-4
14358 * interface spec, called from the PCI layer when either MSI or Pin-IRQ
14359 * interrupt mode is enabled and there is an event in the HBA which requires
14360 * driver attention. This function invokes the slow-path interrupt attention
14361 * handling function and fast-path interrupt attention handling function in
14362 * turn to process the relevant HBA attention events. This function is called
14363 * without any lock held. It gets the hbalock to access and update SLI data
14364 * structures.
14365 *
14366 * This function returns IRQ_HANDLED when interrupt is handled, else it
14367 * returns IRQ_NONE.
14368 **/
14369irqreturn_t
14370lpfc_sli4_intr_handler(int irq, void *dev_id)
14371{
14372 struct lpfc_hba *phba;
67d12733
JS
14373 irqreturn_t hba_irq_rc;
14374 bool hba_handled = false;
895427bd 14375 int qidx;
4f774513
JS
14376
14377 /* Get the driver's phba structure from the dev_id */
14378 phba = (struct lpfc_hba *)dev_id;
14379
14380 if (unlikely(!phba))
14381 return IRQ_NONE;
14382
4f774513
JS
14383 /*
14384 * Invoke fast-path host attention interrupt handling as appropriate.
14385 */
6a828b0f 14386 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
67d12733 14387 hba_irq_rc = lpfc_sli4_hba_intr_handler(irq,
895427bd 14388 &phba->sli4_hba.hba_eq_hdl[qidx]);
67d12733
JS
14389 if (hba_irq_rc == IRQ_HANDLED)
14390 hba_handled |= true;
4f774513
JS
14391 }
14392
67d12733 14393 return (hba_handled == true) ? IRQ_HANDLED : IRQ_NONE;
4f774513
JS
14394} /* lpfc_sli4_intr_handler */
14395
93a4d6f4
JS
14396void lpfc_sli4_poll_hbtimer(struct timer_list *t)
14397{
14398 struct lpfc_hba *phba = from_timer(phba, t, cpuhp_poll_timer);
14399 struct lpfc_queue *eq;
14400 int i = 0;
14401
14402 rcu_read_lock();
14403
14404 list_for_each_entry_rcu(eq, &phba->poll_list, _poll_list)
14405 i += lpfc_sli4_poll_eq(eq, LPFC_POLL_SLOWPATH);
14406 if (!list_empty(&phba->poll_list))
14407 mod_timer(&phba->cpuhp_poll_timer,
14408 jiffies + msecs_to_jiffies(LPFC_POLL_HB));
14409
14410 rcu_read_unlock();
14411}
14412
14413inline int lpfc_sli4_poll_eq(struct lpfc_queue *eq, uint8_t path)
14414{
14415 struct lpfc_hba *phba = eq->phba;
14416 int i = 0;
14417
14418 /*
14419 * Unlocking an irq is one of the entry point to check
14420 * for re-schedule, but we are good for io submission
14421 * path as midlayer does a get_cpu to glue us in. Flush
14422 * out the invalidate queue so we can see the updated
14423 * value for flag.
14424 */
14425 smp_rmb();
14426
14427 if (READ_ONCE(eq->mode) == LPFC_EQ_POLL)
14428 /* We will not likely get the completion for the caller
14429 * during this iteration but i guess that's fine.
14430 * Future io's coming on this eq should be able to
14431 * pick it up. As for the case of single io's, they
14432 * will be handled through a sched from polling timer
14433 * function which is currently triggered every 1msec.
14434 */
14435 i = lpfc_sli4_process_eq(phba, eq, LPFC_QUEUE_NOARM);
14436
14437 return i;
14438}
14439
14440static inline void lpfc_sli4_add_to_poll_list(struct lpfc_queue *eq)
14441{
14442 struct lpfc_hba *phba = eq->phba;
14443
14444 if (list_empty(&phba->poll_list)) {
14445 timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0);
14446 /* kickstart slowpath processing for this eq */
14447 mod_timer(&phba->cpuhp_poll_timer,
14448 jiffies + msecs_to_jiffies(LPFC_POLL_HB));
14449 }
14450
14451 list_add_rcu(&eq->_poll_list, &phba->poll_list);
14452 synchronize_rcu();
14453}
14454
14455static inline void lpfc_sli4_remove_from_poll_list(struct lpfc_queue *eq)
14456{
14457 struct lpfc_hba *phba = eq->phba;
14458
14459 /* Disable slowpath processing for this eq. Kick start the eq
14460 * by RE-ARMING the eq's ASAP
14461 */
14462 list_del_rcu(&eq->_poll_list);
14463 synchronize_rcu();
14464
14465 if (list_empty(&phba->poll_list))
14466 del_timer_sync(&phba->cpuhp_poll_timer);
14467}
14468
d480e578 14469void lpfc_sli4_cleanup_poll_list(struct lpfc_hba *phba)
93a4d6f4
JS
14470{
14471 struct lpfc_queue *eq, *next;
14472
14473 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list)
14474 list_del(&eq->_poll_list);
14475
14476 INIT_LIST_HEAD(&phba->poll_list);
14477 synchronize_rcu();
14478}
14479
14480static inline void
14481__lpfc_sli4_switch_eqmode(struct lpfc_queue *eq, uint8_t mode)
14482{
14483 if (mode == eq->mode)
14484 return;
14485 /*
14486 * currently this function is only called during a hotplug
14487 * event and the cpu on which this function is executing
14488 * is going offline. By now the hotplug has instructed
14489 * the scheduler to remove this cpu from cpu active mask.
14490 * So we don't need to work about being put aside by the
14491 * scheduler for a high priority process. Yes, the inte-
14492 * rrupts could come but they are known to retire ASAP.
14493 */
14494
14495 /* Disable polling in the fastpath */
14496 WRITE_ONCE(eq->mode, mode);
14497 /* flush out the store buffer */
14498 smp_wmb();
14499
14500 /*
14501 * Add this eq to the polling list and start polling. For
14502 * a grace period both interrupt handler and poller will
14503 * try to process the eq _but_ that's fine. We have a
14504 * synchronization mechanism in place (queue_claimed) to
14505 * deal with it. This is just a draining phase for int-
14506 * errupt handler (not eq's) as we have guranteed through
14507 * barrier that all the CPUs have seen the new CQ_POLLED
14508 * state. which will effectively disable the REARMING of
14509 * the EQ. The whole idea is eq's die off eventually as
14510 * we are not rearming EQ's anymore.
14511 */
14512 mode ? lpfc_sli4_add_to_poll_list(eq) :
14513 lpfc_sli4_remove_from_poll_list(eq);
14514}
14515
14516void lpfc_sli4_start_polling(struct lpfc_queue *eq)
14517{
14518 __lpfc_sli4_switch_eqmode(eq, LPFC_EQ_POLL);
14519}
14520
14521void lpfc_sli4_stop_polling(struct lpfc_queue *eq)
14522{
14523 struct lpfc_hba *phba = eq->phba;
14524
14525 __lpfc_sli4_switch_eqmode(eq, LPFC_EQ_INTERRUPT);
14526
14527 /* Kick start for the pending io's in h/w.
14528 * Once we switch back to interrupt processing on a eq
14529 * the io path completion will only arm eq's when it
14530 * receives a completion. But since eq's are in disa-
14531 * rmed state it doesn't receive a completion. This
14532 * creates a deadlock scenaro.
14533 */
14534 phba->sli4_hba.sli4_write_eq_db(phba, eq, 0, LPFC_QUEUE_REARM);
14535}
14536
4f774513
JS
14537/**
14538 * lpfc_sli4_queue_free - free a queue structure and associated memory
14539 * @queue: The queue structure to free.
14540 *
b595076a 14541 * This function frees a queue structure and the DMAable memory used for
4f774513
JS
14542 * the host resident queue. This function must be called after destroying the
14543 * queue on the HBA.
14544 **/
14545void
14546lpfc_sli4_queue_free(struct lpfc_queue *queue)
14547{
14548 struct lpfc_dmabuf *dmabuf;
14549
14550 if (!queue)
14551 return;
14552
4645f7b5
JS
14553 if (!list_empty(&queue->wq_list))
14554 list_del(&queue->wq_list);
14555
4f774513
JS
14556 while (!list_empty(&queue->page_list)) {
14557 list_remove_head(&queue->page_list, dmabuf, struct lpfc_dmabuf,
14558 list);
81b96eda 14559 dma_free_coherent(&queue->phba->pcidev->dev, queue->page_size,
4f774513
JS
14560 dmabuf->virt, dmabuf->phys);
14561 kfree(dmabuf);
14562 }
895427bd
JS
14563 if (queue->rqbp) {
14564 lpfc_free_rq_buffer(queue->phba, queue);
14565 kfree(queue->rqbp);
14566 }
d1f525aa 14567
32517fc0
JS
14568 if (!list_empty(&queue->cpu_list))
14569 list_del(&queue->cpu_list);
14570
4f774513
JS
14571 kfree(queue);
14572 return;
14573}
14574
14575/**
14576 * lpfc_sli4_queue_alloc - Allocate and initialize a queue structure
14577 * @phba: The HBA that this queue is being created on.
81b96eda 14578 * @page_size: The size of a queue page
4f774513
JS
14579 * @entry_size: The size of each queue entry for this queue.
14580 * @entry count: The number of entries that this queue will handle.
c1a21ebc 14581 * @cpu: The cpu that will primarily utilize this queue.
4f774513
JS
14582 *
14583 * This function allocates a queue structure and the DMAable memory used for
14584 * the host resident queue. This function must be called before creating the
14585 * queue on the HBA.
14586 **/
14587struct lpfc_queue *
81b96eda 14588lpfc_sli4_queue_alloc(struct lpfc_hba *phba, uint32_t page_size,
c1a21ebc 14589 uint32_t entry_size, uint32_t entry_count, int cpu)
4f774513
JS
14590{
14591 struct lpfc_queue *queue;
14592 struct lpfc_dmabuf *dmabuf;
cb5172ea 14593 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
9afbee3d 14594 uint16_t x, pgcnt;
4f774513 14595
cb5172ea 14596 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 14597 hw_page_size = page_size;
cb5172ea 14598
9afbee3d
JS
14599 pgcnt = ALIGN(entry_size * entry_count, hw_page_size) / hw_page_size;
14600
14601 /* If needed, Adjust page count to match the max the adapter supports */
14602 if (pgcnt > phba->sli4_hba.pc_sli4_params.wqpcnt)
14603 pgcnt = phba->sli4_hba.pc_sli4_params.wqpcnt;
14604
c1a21ebc
JS
14605 queue = kzalloc_node(sizeof(*queue) + (sizeof(void *) * pgcnt),
14606 GFP_KERNEL, cpu_to_node(cpu));
4f774513
JS
14607 if (!queue)
14608 return NULL;
895427bd 14609
4f774513 14610 INIT_LIST_HEAD(&queue->list);
93a4d6f4 14611 INIT_LIST_HEAD(&queue->_poll_list);
895427bd 14612 INIT_LIST_HEAD(&queue->wq_list);
6e8e1c14 14613 INIT_LIST_HEAD(&queue->wqfull_list);
4f774513
JS
14614 INIT_LIST_HEAD(&queue->page_list);
14615 INIT_LIST_HEAD(&queue->child_list);
32517fc0 14616 INIT_LIST_HEAD(&queue->cpu_list);
81b96eda
JS
14617
14618 /* Set queue parameters now. If the system cannot provide memory
14619 * resources, the free routine needs to know what was allocated.
14620 */
9afbee3d
JS
14621 queue->page_count = pgcnt;
14622 queue->q_pgs = (void **)&queue[1];
14623 queue->entry_cnt_per_pg = hw_page_size / entry_size;
81b96eda
JS
14624 queue->entry_size = entry_size;
14625 queue->entry_count = entry_count;
14626 queue->page_size = hw_page_size;
14627 queue->phba = phba;
14628
9afbee3d 14629 for (x = 0; x < queue->page_count; x++) {
c1a21ebc
JS
14630 dmabuf = kzalloc_node(sizeof(*dmabuf), GFP_KERNEL,
14631 dev_to_node(&phba->pcidev->dev));
4f774513
JS
14632 if (!dmabuf)
14633 goto out_fail;
750afb08
LC
14634 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
14635 hw_page_size, &dmabuf->phys,
14636 GFP_KERNEL);
4f774513
JS
14637 if (!dmabuf->virt) {
14638 kfree(dmabuf);
14639 goto out_fail;
14640 }
14641 dmabuf->buffer_tag = x;
14642 list_add_tail(&dmabuf->list, &queue->page_list);
9afbee3d
JS
14643 /* use lpfc_sli4_qe to index a paritcular entry in this page */
14644 queue->q_pgs[x] = dmabuf->virt;
4f774513 14645 }
f485c18d
DK
14646 INIT_WORK(&queue->irqwork, lpfc_sli4_hba_process_cq);
14647 INIT_WORK(&queue->spwork, lpfc_sli4_sp_process_cq);
32517fc0
JS
14648 INIT_DELAYED_WORK(&queue->sched_irqwork, lpfc_sli4_dly_hba_process_cq);
14649 INIT_DELAYED_WORK(&queue->sched_spwork, lpfc_sli4_dly_sp_process_cq);
4f774513 14650
32517fc0 14651 /* notify_interval will be set during q creation */
64eb4dcb 14652
4f774513
JS
14653 return queue;
14654out_fail:
14655 lpfc_sli4_queue_free(queue);
14656 return NULL;
14657}
14658
962bc51b
JS
14659/**
14660 * lpfc_dual_chute_pci_bar_map - Map pci base address register to host memory
14661 * @phba: HBA structure that indicates port to create a queue on.
14662 * @pci_barset: PCI BAR set flag.
14663 *
14664 * This function shall perform iomap of the specified PCI BAR address to host
14665 * memory address if not already done so and return it. The returned host
14666 * memory address can be NULL.
14667 */
14668static void __iomem *
14669lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset)
14670{
962bc51b
JS
14671 if (!phba->pcidev)
14672 return NULL;
962bc51b
JS
14673
14674 switch (pci_barset) {
14675 case WQ_PCI_BAR_0_AND_1:
962bc51b
JS
14676 return phba->pci_bar0_memmap_p;
14677 case WQ_PCI_BAR_2_AND_3:
962bc51b
JS
14678 return phba->pci_bar2_memmap_p;
14679 case WQ_PCI_BAR_4_AND_5:
962bc51b
JS
14680 return phba->pci_bar4_memmap_p;
14681 default:
14682 break;
14683 }
14684 return NULL;
14685}
14686
173edbb2 14687/**
cb733e35
JS
14688 * lpfc_modify_hba_eq_delay - Modify Delay Multiplier on EQs
14689 * @phba: HBA structure that EQs are on.
14690 * @startq: The starting EQ index to modify
14691 * @numq: The number of EQs (consecutive indexes) to modify
14692 * @usdelay: amount of delay
173edbb2 14693 *
cb733e35
JS
14694 * This function revises the EQ delay on 1 or more EQs. The EQ delay
14695 * is set either by writing to a register (if supported by the SLI Port)
14696 * or by mailbox command. The mailbox command allows several EQs to be
14697 * updated at once.
173edbb2 14698 *
cb733e35
JS
14699 * The @phba struct is used to send a mailbox command to HBA. The @startq
14700 * is used to get the starting EQ index to change. The @numq value is
14701 * used to specify how many consecutive EQ indexes, starting at EQ index,
14702 * are to be changed. This function is asynchronous and will wait for any
14703 * mailbox commands to finish before returning.
173edbb2 14704 *
cb733e35
JS
14705 * On success this function will return a zero. If unable to allocate
14706 * enough memory this function will return -ENOMEM. If a mailbox command
14707 * fails this function will return -ENXIO. Note: on ENXIO, some EQs may
14708 * have had their delay multipler changed.
173edbb2 14709 **/
cb733e35 14710void
0cf07f84 14711lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
cb733e35 14712 uint32_t numq, uint32_t usdelay)
173edbb2
JS
14713{
14714 struct lpfc_mbx_modify_eq_delay *eq_delay;
14715 LPFC_MBOXQ_t *mbox;
14716 struct lpfc_queue *eq;
cb733e35 14717 int cnt = 0, rc, length;
173edbb2 14718 uint32_t shdr_status, shdr_add_status;
cb733e35 14719 uint32_t dmult;
895427bd 14720 int qidx;
173edbb2 14721 union lpfc_sli4_cfg_shdr *shdr;
173edbb2 14722
6a828b0f 14723 if (startq >= phba->cfg_irq_chann)
cb733e35
JS
14724 return;
14725
14726 if (usdelay > 0xFFFF) {
14727 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP | LOG_NVME,
14728 "6429 usdelay %d too large. Scaled down to "
14729 "0xFFFF.\n", usdelay);
14730 usdelay = 0xFFFF;
14731 }
14732
14733 /* set values by EQ_DELAY register if supported */
14734 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
14735 for (qidx = startq; qidx < phba->cfg_irq_chann; qidx++) {
657add4e 14736 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
cb733e35
JS
14737 if (!eq)
14738 continue;
14739
32517fc0 14740 lpfc_sli4_mod_hba_eq_delay(phba, eq, usdelay);
cb733e35
JS
14741
14742 if (++cnt >= numq)
14743 break;
14744 }
cb733e35
JS
14745 return;
14746 }
14747
14748 /* Otherwise, set values by mailbox cmd */
173edbb2
JS
14749
14750 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
cb733e35
JS
14751 if (!mbox) {
14752 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_FCP | LOG_NVME,
14753 "6428 Failed allocating mailbox cmd buffer."
14754 " EQ delay was not set.\n");
14755 return;
14756 }
173edbb2
JS
14757 length = (sizeof(struct lpfc_mbx_modify_eq_delay) -
14758 sizeof(struct lpfc_sli4_cfg_mhdr));
14759 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14760 LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY,
14761 length, LPFC_SLI4_MBX_EMBED);
14762 eq_delay = &mbox->u.mqe.un.eq_delay;
14763
14764 /* Calculate delay multiper from maximum interrupt per second */
cb733e35
JS
14765 dmult = (usdelay * LPFC_DMULT_CONST) / LPFC_SEC_TO_USEC;
14766 if (dmult)
14767 dmult--;
0cf07f84
JS
14768 if (dmult > LPFC_DMULT_MAX)
14769 dmult = LPFC_DMULT_MAX;
173edbb2 14770
6a828b0f 14771 for (qidx = startq; qidx < phba->cfg_irq_chann; qidx++) {
657add4e 14772 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
173edbb2
JS
14773 if (!eq)
14774 continue;
cb733e35 14775 eq->q_mode = usdelay;
173edbb2
JS
14776 eq_delay->u.request.eq[cnt].eq_id = eq->queue_id;
14777 eq_delay->u.request.eq[cnt].phase = 0;
14778 eq_delay->u.request.eq[cnt].delay_multi = dmult;
0cf07f84 14779
cb733e35 14780 if (++cnt >= numq)
173edbb2
JS
14781 break;
14782 }
14783 eq_delay->u.request.num_eq = cnt;
14784
14785 mbox->vport = phba->pport;
14786 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
14787 mbox->ctx_buf = NULL;
14788 mbox->ctx_ndlp = NULL;
173edbb2
JS
14789 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14790 shdr = (union lpfc_sli4_cfg_shdr *) &eq_delay->header.cfg_shdr;
14791 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14792 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14793 if (shdr_status || shdr_add_status || rc) {
14794 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14795 "2512 MODIFY_EQ_DELAY mailbox failed with "
14796 "status x%x add_status x%x, mbx status x%x\n",
14797 shdr_status, shdr_add_status, rc);
173edbb2
JS
14798 }
14799 mempool_free(mbox, phba->mbox_mem_pool);
cb733e35 14800 return;
173edbb2
JS
14801}
14802
4f774513
JS
14803/**
14804 * lpfc_eq_create - Create an Event Queue on the HBA
14805 * @phba: HBA structure that indicates port to create a queue on.
14806 * @eq: The queue structure to use to create the event queue.
14807 * @imax: The maximum interrupt per second limit.
14808 *
14809 * This function creates an event queue, as detailed in @eq, on a port,
14810 * described by @phba by sending an EQ_CREATE mailbox command to the HBA.
14811 *
14812 * The @phba struct is used to send mailbox command to HBA. The @eq struct
14813 * is used to get the entry count and entry size that are necessary to
14814 * determine the number of pages to allocate and use for this queue. This
14815 * function will send the EQ_CREATE mailbox command to the HBA to setup the
14816 * event queue. This function is asynchronous and will wait for the mailbox
14817 * command to finish before continuing.
14818 *
14819 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14820 * memory this function will return -ENOMEM. If the queue create mailbox command
14821 * fails this function will return -ENXIO.
4f774513 14822 **/
a2fc4aef 14823int
ee02006b 14824lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
4f774513
JS
14825{
14826 struct lpfc_mbx_eq_create *eq_create;
14827 LPFC_MBOXQ_t *mbox;
14828 int rc, length, status = 0;
14829 struct lpfc_dmabuf *dmabuf;
14830 uint32_t shdr_status, shdr_add_status;
14831 union lpfc_sli4_cfg_shdr *shdr;
14832 uint16_t dmult;
49198b37
JS
14833 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14834
2e90f4b5
JS
14835 /* sanity check on queue memory */
14836 if (!eq)
14837 return -ENODEV;
49198b37
JS
14838 if (!phba->sli4_hba.pc_sli4_params.supported)
14839 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
14840
14841 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14842 if (!mbox)
14843 return -ENOMEM;
14844 length = (sizeof(struct lpfc_mbx_eq_create) -
14845 sizeof(struct lpfc_sli4_cfg_mhdr));
14846 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14847 LPFC_MBOX_OPCODE_EQ_CREATE,
14848 length, LPFC_SLI4_MBX_EMBED);
14849 eq_create = &mbox->u.mqe.un.eq_create;
7365f6fd 14850 shdr = (union lpfc_sli4_cfg_shdr *) &eq_create->header.cfg_shdr;
4f774513
JS
14851 bf_set(lpfc_mbx_eq_create_num_pages, &eq_create->u.request,
14852 eq->page_count);
14853 bf_set(lpfc_eq_context_size, &eq_create->u.request.context,
14854 LPFC_EQE_SIZE);
14855 bf_set(lpfc_eq_context_valid, &eq_create->u.request.context, 1);
7365f6fd
JS
14856
14857 /* Use version 2 of CREATE_EQ if eqav is set */
14858 if (phba->sli4_hba.pc_sli4_params.eqav) {
14859 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14860 LPFC_Q_CREATE_VERSION_2);
14861 bf_set(lpfc_eq_context_autovalid, &eq_create->u.request.context,
14862 phba->sli4_hba.pc_sli4_params.eqav);
14863 }
14864
2c9c5a00
JS
14865 /* don't setup delay multiplier using EQ_CREATE */
14866 dmult = 0;
4f774513
JS
14867 bf_set(lpfc_eq_context_delay_multi, &eq_create->u.request.context,
14868 dmult);
14869 switch (eq->entry_count) {
14870 default:
14871 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14872 "0360 Unsupported EQ count. (%d)\n",
14873 eq->entry_count);
04d210c9
JS
14874 if (eq->entry_count < 256) {
14875 status = -EINVAL;
14876 goto out;
14877 }
5bd5f66c 14878 /* fall through - otherwise default to smallest count */
4f774513
JS
14879 case 256:
14880 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14881 LPFC_EQ_CNT_256);
14882 break;
14883 case 512:
14884 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14885 LPFC_EQ_CNT_512);
14886 break;
14887 case 1024:
14888 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14889 LPFC_EQ_CNT_1024);
14890 break;
14891 case 2048:
14892 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14893 LPFC_EQ_CNT_2048);
14894 break;
14895 case 4096:
14896 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14897 LPFC_EQ_CNT_4096);
14898 break;
14899 }
14900 list_for_each_entry(dmabuf, &eq->page_list, list) {
49198b37 14901 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
14902 eq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
14903 putPaddrLow(dmabuf->phys);
14904 eq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
14905 putPaddrHigh(dmabuf->phys);
14906 }
14907 mbox->vport = phba->pport;
14908 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
14909 mbox->ctx_buf = NULL;
14910 mbox->ctx_ndlp = NULL;
4f774513 14911 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
4f774513
JS
14912 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14913 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14914 if (shdr_status || shdr_add_status || rc) {
14915 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14916 "2500 EQ_CREATE mailbox failed with "
14917 "status x%x add_status x%x, mbx status x%x\n",
14918 shdr_status, shdr_add_status, rc);
14919 status = -ENXIO;
14920 }
14921 eq->type = LPFC_EQ;
14922 eq->subtype = LPFC_NONE;
14923 eq->queue_id = bf_get(lpfc_mbx_eq_create_q_id, &eq_create->u.response);
14924 if (eq->queue_id == 0xFFFF)
14925 status = -ENXIO;
14926 eq->host_index = 0;
32517fc0
JS
14927 eq->notify_interval = LPFC_EQ_NOTIFY_INTRVL;
14928 eq->max_proc_limit = LPFC_EQ_MAX_PROC_LIMIT;
04d210c9 14929out:
8fa38513 14930 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
14931 return status;
14932}
14933
14934/**
14935 * lpfc_cq_create - Create a Completion Queue on the HBA
14936 * @phba: HBA structure that indicates port to create a queue on.
14937 * @cq: The queue structure to use to create the completion queue.
14938 * @eq: The event queue to bind this completion queue to.
14939 *
14940 * This function creates a completion queue, as detailed in @wq, on a port,
14941 * described by @phba by sending a CQ_CREATE mailbox command to the HBA.
14942 *
14943 * The @phba struct is used to send mailbox command to HBA. The @cq struct
14944 * is used to get the entry count and entry size that are necessary to
14945 * determine the number of pages to allocate and use for this queue. The @eq
14946 * is used to indicate which event queue to bind this completion queue to. This
14947 * function will send the CQ_CREATE mailbox command to the HBA to setup the
14948 * completion queue. This function is asynchronous and will wait for the mailbox
14949 * command to finish before continuing.
14950 *
14951 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14952 * memory this function will return -ENOMEM. If the queue create mailbox command
14953 * fails this function will return -ENXIO.
4f774513 14954 **/
a2fc4aef 14955int
4f774513
JS
14956lpfc_cq_create(struct lpfc_hba *phba, struct lpfc_queue *cq,
14957 struct lpfc_queue *eq, uint32_t type, uint32_t subtype)
14958{
14959 struct lpfc_mbx_cq_create *cq_create;
14960 struct lpfc_dmabuf *dmabuf;
14961 LPFC_MBOXQ_t *mbox;
14962 int rc, length, status = 0;
14963 uint32_t shdr_status, shdr_add_status;
14964 union lpfc_sli4_cfg_shdr *shdr;
49198b37 14965
2e90f4b5
JS
14966 /* sanity check on queue memory */
14967 if (!cq || !eq)
14968 return -ENODEV;
49198b37 14969
4f774513
JS
14970 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14971 if (!mbox)
14972 return -ENOMEM;
14973 length = (sizeof(struct lpfc_mbx_cq_create) -
14974 sizeof(struct lpfc_sli4_cfg_mhdr));
14975 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14976 LPFC_MBOX_OPCODE_CQ_CREATE,
14977 length, LPFC_SLI4_MBX_EMBED);
14978 cq_create = &mbox->u.mqe.un.cq_create;
5a6f133e 14979 shdr = (union lpfc_sli4_cfg_shdr *) &cq_create->header.cfg_shdr;
4f774513
JS
14980 bf_set(lpfc_mbx_cq_create_num_pages, &cq_create->u.request,
14981 cq->page_count);
14982 bf_set(lpfc_cq_context_event, &cq_create->u.request.context, 1);
14983 bf_set(lpfc_cq_context_valid, &cq_create->u.request.context, 1);
5a6f133e
JS
14984 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14985 phba->sli4_hba.pc_sli4_params.cqv);
14986 if (phba->sli4_hba.pc_sli4_params.cqv == LPFC_Q_CREATE_VERSION_2) {
81b96eda
JS
14987 bf_set(lpfc_mbx_cq_create_page_size, &cq_create->u.request,
14988 (cq->page_size / SLI4_PAGE_SIZE));
5a6f133e
JS
14989 bf_set(lpfc_cq_eq_id_2, &cq_create->u.request.context,
14990 eq->queue_id);
7365f6fd
JS
14991 bf_set(lpfc_cq_context_autovalid, &cq_create->u.request.context,
14992 phba->sli4_hba.pc_sli4_params.cqav);
5a6f133e
JS
14993 } else {
14994 bf_set(lpfc_cq_eq_id, &cq_create->u.request.context,
14995 eq->queue_id);
14996 }
4f774513 14997 switch (cq->entry_count) {
81b96eda
JS
14998 case 2048:
14999 case 4096:
15000 if (phba->sli4_hba.pc_sli4_params.cqv ==
15001 LPFC_Q_CREATE_VERSION_2) {
15002 cq_create->u.request.context.lpfc_cq_context_count =
15003 cq->entry_count;
15004 bf_set(lpfc_cq_context_count,
15005 &cq_create->u.request.context,
15006 LPFC_CQ_CNT_WORD7);
15007 break;
15008 }
5bd5f66c 15009 /* fall through */
4f774513
JS
15010 default:
15011 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2ea259ee 15012 "0361 Unsupported CQ count: "
64eb4dcb 15013 "entry cnt %d sz %d pg cnt %d\n",
2ea259ee 15014 cq->entry_count, cq->entry_size,
64eb4dcb 15015 cq->page_count);
4f4c1863
JS
15016 if (cq->entry_count < 256) {
15017 status = -EINVAL;
15018 goto out;
15019 }
5bd5f66c 15020 /* fall through - otherwise default to smallest count */
4f774513
JS
15021 case 256:
15022 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
15023 LPFC_CQ_CNT_256);
15024 break;
15025 case 512:
15026 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
15027 LPFC_CQ_CNT_512);
15028 break;
15029 case 1024:
15030 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
15031 LPFC_CQ_CNT_1024);
15032 break;
15033 }
15034 list_for_each_entry(dmabuf, &cq->page_list, list) {
81b96eda 15035 memset(dmabuf->virt, 0, cq->page_size);
4f774513
JS
15036 cq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15037 putPaddrLow(dmabuf->phys);
15038 cq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15039 putPaddrHigh(dmabuf->phys);
15040 }
15041 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15042
15043 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15044 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15045 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15046 if (shdr_status || shdr_add_status || rc) {
15047 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15048 "2501 CQ_CREATE mailbox failed with "
15049 "status x%x add_status x%x, mbx status x%x\n",
15050 shdr_status, shdr_add_status, rc);
15051 status = -ENXIO;
15052 goto out;
15053 }
15054 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
15055 if (cq->queue_id == 0xFFFF) {
15056 status = -ENXIO;
15057 goto out;
15058 }
15059 /* link the cq onto the parent eq child list */
15060 list_add_tail(&cq->list, &eq->child_list);
15061 /* Set up completion queue's type and subtype */
15062 cq->type = type;
15063 cq->subtype = subtype;
15064 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
2a622bfb 15065 cq->assoc_qid = eq->queue_id;
6a828b0f 15066 cq->assoc_qp = eq;
4f774513 15067 cq->host_index = 0;
32517fc0
JS
15068 cq->notify_interval = LPFC_CQ_NOTIFY_INTRVL;
15069 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit, cq->entry_count);
4f774513 15070
6a828b0f
JS
15071 if (cq->queue_id > phba->sli4_hba.cq_max)
15072 phba->sli4_hba.cq_max = cq->queue_id;
8fa38513
JS
15073out:
15074 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15075 return status;
15076}
15077
2d7dbc4c
JS
15078/**
15079 * lpfc_cq_create_set - Create a set of Completion Queues on the HBA for MRQ
15080 * @phba: HBA structure that indicates port to create a queue on.
15081 * @cqp: The queue structure array to use to create the completion queues.
cdb42bec 15082 * @hdwq: The hardware queue array with the EQ to bind completion queues to.
2d7dbc4c
JS
15083 *
15084 * This function creates a set of completion queue, s to support MRQ
15085 * as detailed in @cqp, on a port,
15086 * described by @phba by sending a CREATE_CQ_SET mailbox command to the HBA.
15087 *
15088 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15089 * is used to get the entry count and entry size that are necessary to
15090 * determine the number of pages to allocate and use for this queue. The @eq
15091 * is used to indicate which event queue to bind this completion queue to. This
15092 * function will send the CREATE_CQ_SET mailbox command to the HBA to setup the
15093 * completion queue. This function is asynchronous and will wait for the mailbox
15094 * command to finish before continuing.
15095 *
15096 * On success this function will return a zero. If unable to allocate enough
15097 * memory this function will return -ENOMEM. If the queue create mailbox command
15098 * fails this function will return -ENXIO.
15099 **/
15100int
15101lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
cdb42bec
JS
15102 struct lpfc_sli4_hdw_queue *hdwq, uint32_t type,
15103 uint32_t subtype)
2d7dbc4c
JS
15104{
15105 struct lpfc_queue *cq;
15106 struct lpfc_queue *eq;
15107 struct lpfc_mbx_cq_create_set *cq_set;
15108 struct lpfc_dmabuf *dmabuf;
15109 LPFC_MBOXQ_t *mbox;
15110 int rc, length, alloclen, status = 0;
15111 int cnt, idx, numcq, page_idx = 0;
15112 uint32_t shdr_status, shdr_add_status;
15113 union lpfc_sli4_cfg_shdr *shdr;
15114 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
15115
15116 /* sanity check on queue memory */
15117 numcq = phba->cfg_nvmet_mrq;
cdb42bec 15118 if (!cqp || !hdwq || !numcq)
2d7dbc4c 15119 return -ENODEV;
2d7dbc4c
JS
15120
15121 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15122 if (!mbox)
15123 return -ENOMEM;
15124
15125 length = sizeof(struct lpfc_mbx_cq_create_set);
15126 length += ((numcq * cqp[0]->page_count) *
15127 sizeof(struct dma_address));
15128 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15129 LPFC_MBOX_OPCODE_FCOE_CQ_CREATE_SET, length,
15130 LPFC_SLI4_MBX_NEMBED);
15131 if (alloclen < length) {
15132 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15133 "3098 Allocated DMA memory size (%d) is "
15134 "less than the requested DMA memory size "
15135 "(%d)\n", alloclen, length);
15136 status = -ENOMEM;
15137 goto out;
15138 }
15139 cq_set = mbox->sge_array->addr[0];
15140 shdr = (union lpfc_sli4_cfg_shdr *)&cq_set->cfg_shdr;
15141 bf_set(lpfc_mbox_hdr_version, &shdr->request, 0);
15142
15143 for (idx = 0; idx < numcq; idx++) {
15144 cq = cqp[idx];
cdb42bec 15145 eq = hdwq[idx].hba_eq;
2d7dbc4c
JS
15146 if (!cq || !eq) {
15147 status = -ENOMEM;
15148 goto out;
15149 }
81b96eda
JS
15150 if (!phba->sli4_hba.pc_sli4_params.supported)
15151 hw_page_size = cq->page_size;
2d7dbc4c
JS
15152
15153 switch (idx) {
15154 case 0:
15155 bf_set(lpfc_mbx_cq_create_set_page_size,
15156 &cq_set->u.request,
15157 (hw_page_size / SLI4_PAGE_SIZE));
15158 bf_set(lpfc_mbx_cq_create_set_num_pages,
15159 &cq_set->u.request, cq->page_count);
15160 bf_set(lpfc_mbx_cq_create_set_evt,
15161 &cq_set->u.request, 1);
15162 bf_set(lpfc_mbx_cq_create_set_valid,
15163 &cq_set->u.request, 1);
15164 bf_set(lpfc_mbx_cq_create_set_cqe_size,
15165 &cq_set->u.request, 0);
15166 bf_set(lpfc_mbx_cq_create_set_num_cq,
15167 &cq_set->u.request, numcq);
7365f6fd
JS
15168 bf_set(lpfc_mbx_cq_create_set_autovalid,
15169 &cq_set->u.request,
15170 phba->sli4_hba.pc_sli4_params.cqav);
2d7dbc4c 15171 switch (cq->entry_count) {
81b96eda
JS
15172 case 2048:
15173 case 4096:
15174 if (phba->sli4_hba.pc_sli4_params.cqv ==
15175 LPFC_Q_CREATE_VERSION_2) {
15176 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15177 &cq_set->u.request,
15178 cq->entry_count);
15179 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15180 &cq_set->u.request,
15181 LPFC_CQ_CNT_WORD7);
15182 break;
15183 }
5bd5f66c 15184 /* fall through */
2d7dbc4c
JS
15185 default:
15186 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15187 "3118 Bad CQ count. (%d)\n",
15188 cq->entry_count);
15189 if (cq->entry_count < 256) {
15190 status = -EINVAL;
15191 goto out;
15192 }
5bd5f66c 15193 /* fall through - otherwise default to smallest */
2d7dbc4c
JS
15194 case 256:
15195 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15196 &cq_set->u.request, LPFC_CQ_CNT_256);
15197 break;
15198 case 512:
15199 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15200 &cq_set->u.request, LPFC_CQ_CNT_512);
15201 break;
15202 case 1024:
15203 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15204 &cq_set->u.request, LPFC_CQ_CNT_1024);
15205 break;
15206 }
15207 bf_set(lpfc_mbx_cq_create_set_eq_id0,
15208 &cq_set->u.request, eq->queue_id);
15209 break;
15210 case 1:
15211 bf_set(lpfc_mbx_cq_create_set_eq_id1,
15212 &cq_set->u.request, eq->queue_id);
15213 break;
15214 case 2:
15215 bf_set(lpfc_mbx_cq_create_set_eq_id2,
15216 &cq_set->u.request, eq->queue_id);
15217 break;
15218 case 3:
15219 bf_set(lpfc_mbx_cq_create_set_eq_id3,
15220 &cq_set->u.request, eq->queue_id);
15221 break;
15222 case 4:
15223 bf_set(lpfc_mbx_cq_create_set_eq_id4,
15224 &cq_set->u.request, eq->queue_id);
15225 break;
15226 case 5:
15227 bf_set(lpfc_mbx_cq_create_set_eq_id5,
15228 &cq_set->u.request, eq->queue_id);
15229 break;
15230 case 6:
15231 bf_set(lpfc_mbx_cq_create_set_eq_id6,
15232 &cq_set->u.request, eq->queue_id);
15233 break;
15234 case 7:
15235 bf_set(lpfc_mbx_cq_create_set_eq_id7,
15236 &cq_set->u.request, eq->queue_id);
15237 break;
15238 case 8:
15239 bf_set(lpfc_mbx_cq_create_set_eq_id8,
15240 &cq_set->u.request, eq->queue_id);
15241 break;
15242 case 9:
15243 bf_set(lpfc_mbx_cq_create_set_eq_id9,
15244 &cq_set->u.request, eq->queue_id);
15245 break;
15246 case 10:
15247 bf_set(lpfc_mbx_cq_create_set_eq_id10,
15248 &cq_set->u.request, eq->queue_id);
15249 break;
15250 case 11:
15251 bf_set(lpfc_mbx_cq_create_set_eq_id11,
15252 &cq_set->u.request, eq->queue_id);
15253 break;
15254 case 12:
15255 bf_set(lpfc_mbx_cq_create_set_eq_id12,
15256 &cq_set->u.request, eq->queue_id);
15257 break;
15258 case 13:
15259 bf_set(lpfc_mbx_cq_create_set_eq_id13,
15260 &cq_set->u.request, eq->queue_id);
15261 break;
15262 case 14:
15263 bf_set(lpfc_mbx_cq_create_set_eq_id14,
15264 &cq_set->u.request, eq->queue_id);
15265 break;
15266 case 15:
15267 bf_set(lpfc_mbx_cq_create_set_eq_id15,
15268 &cq_set->u.request, eq->queue_id);
15269 break;
15270 }
15271
15272 /* link the cq onto the parent eq child list */
15273 list_add_tail(&cq->list, &eq->child_list);
15274 /* Set up completion queue's type and subtype */
15275 cq->type = type;
15276 cq->subtype = subtype;
15277 cq->assoc_qid = eq->queue_id;
6a828b0f 15278 cq->assoc_qp = eq;
2d7dbc4c 15279 cq->host_index = 0;
32517fc0
JS
15280 cq->notify_interval = LPFC_CQ_NOTIFY_INTRVL;
15281 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit,
15282 cq->entry_count);
81b96eda 15283 cq->chann = idx;
2d7dbc4c
JS
15284
15285 rc = 0;
15286 list_for_each_entry(dmabuf, &cq->page_list, list) {
15287 memset(dmabuf->virt, 0, hw_page_size);
15288 cnt = page_idx + dmabuf->buffer_tag;
15289 cq_set->u.request.page[cnt].addr_lo =
15290 putPaddrLow(dmabuf->phys);
15291 cq_set->u.request.page[cnt].addr_hi =
15292 putPaddrHigh(dmabuf->phys);
15293 rc++;
15294 }
15295 page_idx += rc;
15296 }
15297
15298 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15299
15300 /* The IOCTL status is embedded in the mailbox subheader. */
15301 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15302 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15303 if (shdr_status || shdr_add_status || rc) {
15304 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15305 "3119 CQ_CREATE_SET mailbox failed with "
15306 "status x%x add_status x%x, mbx status x%x\n",
15307 shdr_status, shdr_add_status, rc);
15308 status = -ENXIO;
15309 goto out;
15310 }
15311 rc = bf_get(lpfc_mbx_cq_create_set_base_id, &cq_set->u.response);
15312 if (rc == 0xFFFF) {
15313 status = -ENXIO;
15314 goto out;
15315 }
15316
15317 for (idx = 0; idx < numcq; idx++) {
15318 cq = cqp[idx];
15319 cq->queue_id = rc + idx;
6a828b0f
JS
15320 if (cq->queue_id > phba->sli4_hba.cq_max)
15321 phba->sli4_hba.cq_max = cq->queue_id;
2d7dbc4c
JS
15322 }
15323
15324out:
15325 lpfc_sli4_mbox_cmd_free(phba, mbox);
15326 return status;
15327}
15328
b19a061a
JS
15329/**
15330 * lpfc_mq_create_fb_init - Send MCC_CREATE without async events registration
15331 * @phba: HBA structure that indicates port to create a queue on.
15332 * @mq: The queue structure to use to create the mailbox queue.
15333 * @mbox: An allocated pointer to type LPFC_MBOXQ_t
15334 * @cq: The completion queue to associate with this cq.
15335 *
15336 * This function provides failback (fb) functionality when the
15337 * mq_create_ext fails on older FW generations. It's purpose is identical
15338 * to mq_create_ext otherwise.
15339 *
15340 * This routine cannot fail as all attributes were previously accessed and
15341 * initialized in mq_create_ext.
15342 **/
15343static void
15344lpfc_mq_create_fb_init(struct lpfc_hba *phba, struct lpfc_queue *mq,
15345 LPFC_MBOXQ_t *mbox, struct lpfc_queue *cq)
15346{
15347 struct lpfc_mbx_mq_create *mq_create;
15348 struct lpfc_dmabuf *dmabuf;
15349 int length;
15350
15351 length = (sizeof(struct lpfc_mbx_mq_create) -
15352 sizeof(struct lpfc_sli4_cfg_mhdr));
15353 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15354 LPFC_MBOX_OPCODE_MQ_CREATE,
15355 length, LPFC_SLI4_MBX_EMBED);
15356 mq_create = &mbox->u.mqe.un.mq_create;
15357 bf_set(lpfc_mbx_mq_create_num_pages, &mq_create->u.request,
15358 mq->page_count);
15359 bf_set(lpfc_mq_context_cq_id, &mq_create->u.request.context,
15360 cq->queue_id);
15361 bf_set(lpfc_mq_context_valid, &mq_create->u.request.context, 1);
15362 switch (mq->entry_count) {
15363 case 16:
5a6f133e
JS
15364 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15365 LPFC_MQ_RING_SIZE_16);
b19a061a
JS
15366 break;
15367 case 32:
5a6f133e
JS
15368 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15369 LPFC_MQ_RING_SIZE_32);
b19a061a
JS
15370 break;
15371 case 64:
5a6f133e
JS
15372 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15373 LPFC_MQ_RING_SIZE_64);
b19a061a
JS
15374 break;
15375 case 128:
5a6f133e
JS
15376 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15377 LPFC_MQ_RING_SIZE_128);
b19a061a
JS
15378 break;
15379 }
15380 list_for_each_entry(dmabuf, &mq->page_list, list) {
15381 mq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15382 putPaddrLow(dmabuf->phys);
15383 mq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15384 putPaddrHigh(dmabuf->phys);
15385 }
15386}
15387
04c68496
JS
15388/**
15389 * lpfc_mq_create - Create a mailbox Queue on the HBA
15390 * @phba: HBA structure that indicates port to create a queue on.
15391 * @mq: The queue structure to use to create the mailbox queue.
b19a061a
JS
15392 * @cq: The completion queue to associate with this cq.
15393 * @subtype: The queue's subtype.
04c68496
JS
15394 *
15395 * This function creates a mailbox queue, as detailed in @mq, on a port,
15396 * described by @phba by sending a MQ_CREATE mailbox command to the HBA.
15397 *
15398 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15399 * is used to get the entry count and entry size that are necessary to
15400 * determine the number of pages to allocate and use for this queue. This
15401 * function will send the MQ_CREATE mailbox command to the HBA to setup the
15402 * mailbox queue. This function is asynchronous and will wait for the mailbox
15403 * command to finish before continuing.
15404 *
15405 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15406 * memory this function will return -ENOMEM. If the queue create mailbox command
15407 * fails this function will return -ENXIO.
04c68496 15408 **/
b19a061a 15409int32_t
04c68496
JS
15410lpfc_mq_create(struct lpfc_hba *phba, struct lpfc_queue *mq,
15411 struct lpfc_queue *cq, uint32_t subtype)
15412{
15413 struct lpfc_mbx_mq_create *mq_create;
b19a061a 15414 struct lpfc_mbx_mq_create_ext *mq_create_ext;
04c68496
JS
15415 struct lpfc_dmabuf *dmabuf;
15416 LPFC_MBOXQ_t *mbox;
15417 int rc, length, status = 0;
15418 uint32_t shdr_status, shdr_add_status;
15419 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15420 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
04c68496 15421
2e90f4b5
JS
15422 /* sanity check on queue memory */
15423 if (!mq || !cq)
15424 return -ENODEV;
49198b37
JS
15425 if (!phba->sli4_hba.pc_sli4_params.supported)
15426 hw_page_size = SLI4_PAGE_SIZE;
b19a061a 15427
04c68496
JS
15428 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15429 if (!mbox)
15430 return -ENOMEM;
b19a061a 15431 length = (sizeof(struct lpfc_mbx_mq_create_ext) -
04c68496
JS
15432 sizeof(struct lpfc_sli4_cfg_mhdr));
15433 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
b19a061a 15434 LPFC_MBOX_OPCODE_MQ_CREATE_EXT,
04c68496 15435 length, LPFC_SLI4_MBX_EMBED);
b19a061a
JS
15436
15437 mq_create_ext = &mbox->u.mqe.un.mq_create_ext;
5a6f133e 15438 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create_ext->header.cfg_shdr;
70f3c073
JS
15439 bf_set(lpfc_mbx_mq_create_ext_num_pages,
15440 &mq_create_ext->u.request, mq->page_count);
15441 bf_set(lpfc_mbx_mq_create_ext_async_evt_link,
15442 &mq_create_ext->u.request, 1);
15443 bf_set(lpfc_mbx_mq_create_ext_async_evt_fip,
b19a061a
JS
15444 &mq_create_ext->u.request, 1);
15445 bf_set(lpfc_mbx_mq_create_ext_async_evt_group5,
15446 &mq_create_ext->u.request, 1);
70f3c073
JS
15447 bf_set(lpfc_mbx_mq_create_ext_async_evt_fc,
15448 &mq_create_ext->u.request, 1);
15449 bf_set(lpfc_mbx_mq_create_ext_async_evt_sli,
15450 &mq_create_ext->u.request, 1);
b19a061a 15451 bf_set(lpfc_mq_context_valid, &mq_create_ext->u.request.context, 1);
5a6f133e
JS
15452 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15453 phba->sli4_hba.pc_sli4_params.mqv);
15454 if (phba->sli4_hba.pc_sli4_params.mqv == LPFC_Q_CREATE_VERSION_1)
15455 bf_set(lpfc_mbx_mq_create_ext_cq_id, &mq_create_ext->u.request,
15456 cq->queue_id);
15457 else
15458 bf_set(lpfc_mq_context_cq_id, &mq_create_ext->u.request.context,
15459 cq->queue_id);
04c68496
JS
15460 switch (mq->entry_count) {
15461 default:
15462 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15463 "0362 Unsupported MQ count. (%d)\n",
15464 mq->entry_count);
4f4c1863
JS
15465 if (mq->entry_count < 16) {
15466 status = -EINVAL;
15467 goto out;
15468 }
5bd5f66c 15469 /* fall through - otherwise default to smallest count */
04c68496 15470 case 16:
5a6f133e
JS
15471 bf_set(lpfc_mq_context_ring_size,
15472 &mq_create_ext->u.request.context,
15473 LPFC_MQ_RING_SIZE_16);
04c68496
JS
15474 break;
15475 case 32:
5a6f133e
JS
15476 bf_set(lpfc_mq_context_ring_size,
15477 &mq_create_ext->u.request.context,
15478 LPFC_MQ_RING_SIZE_32);
04c68496
JS
15479 break;
15480 case 64:
5a6f133e
JS
15481 bf_set(lpfc_mq_context_ring_size,
15482 &mq_create_ext->u.request.context,
15483 LPFC_MQ_RING_SIZE_64);
04c68496
JS
15484 break;
15485 case 128:
5a6f133e
JS
15486 bf_set(lpfc_mq_context_ring_size,
15487 &mq_create_ext->u.request.context,
15488 LPFC_MQ_RING_SIZE_128);
04c68496
JS
15489 break;
15490 }
15491 list_for_each_entry(dmabuf, &mq->page_list, list) {
49198b37 15492 memset(dmabuf->virt, 0, hw_page_size);
b19a061a 15493 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_lo =
04c68496 15494 putPaddrLow(dmabuf->phys);
b19a061a 15495 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_hi =
04c68496
JS
15496 putPaddrHigh(dmabuf->phys);
15497 }
15498 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
b19a061a
JS
15499 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15500 &mq_create_ext->u.response);
15501 if (rc != MBX_SUCCESS) {
15502 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15503 "2795 MQ_CREATE_EXT failed with "
15504 "status x%x. Failback to MQ_CREATE.\n",
15505 rc);
15506 lpfc_mq_create_fb_init(phba, mq, mbox, cq);
15507 mq_create = &mbox->u.mqe.un.mq_create;
15508 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15509 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create->header.cfg_shdr;
15510 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15511 &mq_create->u.response);
15512 }
15513
04c68496 15514 /* The IOCTL status is embedded in the mailbox subheader. */
04c68496
JS
15515 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15516 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15517 if (shdr_status || shdr_add_status || rc) {
15518 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15519 "2502 MQ_CREATE mailbox failed with "
15520 "status x%x add_status x%x, mbx status x%x\n",
15521 shdr_status, shdr_add_status, rc);
15522 status = -ENXIO;
15523 goto out;
15524 }
04c68496
JS
15525 if (mq->queue_id == 0xFFFF) {
15526 status = -ENXIO;
15527 goto out;
15528 }
15529 mq->type = LPFC_MQ;
2a622bfb 15530 mq->assoc_qid = cq->queue_id;
04c68496
JS
15531 mq->subtype = subtype;
15532 mq->host_index = 0;
15533 mq->hba_index = 0;
15534
15535 /* link the mq onto the parent cq child list */
15536 list_add_tail(&mq->list, &cq->child_list);
15537out:
8fa38513 15538 mempool_free(mbox, phba->mbox_mem_pool);
04c68496
JS
15539 return status;
15540}
15541
4f774513
JS
15542/**
15543 * lpfc_wq_create - Create a Work Queue on the HBA
15544 * @phba: HBA structure that indicates port to create a queue on.
15545 * @wq: The queue structure to use to create the work queue.
15546 * @cq: The completion queue to bind this work queue to.
15547 * @subtype: The subtype of the work queue indicating its functionality.
15548 *
15549 * This function creates a work queue, as detailed in @wq, on a port, described
15550 * by @phba by sending a WQ_CREATE mailbox command to the HBA.
15551 *
15552 * The @phba struct is used to send mailbox command to HBA. The @wq struct
15553 * is used to get the entry count and entry size that are necessary to
15554 * determine the number of pages to allocate and use for this queue. The @cq
15555 * is used to indicate which completion queue to bind this work queue to. This
15556 * function will send the WQ_CREATE mailbox command to the HBA to setup the
15557 * work queue. This function is asynchronous and will wait for the mailbox
15558 * command to finish before continuing.
15559 *
15560 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15561 * memory this function will return -ENOMEM. If the queue create mailbox command
15562 * fails this function will return -ENXIO.
4f774513 15563 **/
a2fc4aef 15564int
4f774513
JS
15565lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq,
15566 struct lpfc_queue *cq, uint32_t subtype)
15567{
15568 struct lpfc_mbx_wq_create *wq_create;
15569 struct lpfc_dmabuf *dmabuf;
15570 LPFC_MBOXQ_t *mbox;
15571 int rc, length, status = 0;
15572 uint32_t shdr_status, shdr_add_status;
15573 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15574 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
5a6f133e 15575 struct dma_address *page;
962bc51b
JS
15576 void __iomem *bar_memmap_p;
15577 uint32_t db_offset;
15578 uint16_t pci_barset;
1351e69f
JS
15579 uint8_t dpp_barset;
15580 uint32_t dpp_offset;
15581 unsigned long pg_addr;
81b96eda 15582 uint8_t wq_create_version;
49198b37 15583
2e90f4b5
JS
15584 /* sanity check on queue memory */
15585 if (!wq || !cq)
15586 return -ENODEV;
49198b37 15587 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 15588 hw_page_size = wq->page_size;
4f774513
JS
15589
15590 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15591 if (!mbox)
15592 return -ENOMEM;
15593 length = (sizeof(struct lpfc_mbx_wq_create) -
15594 sizeof(struct lpfc_sli4_cfg_mhdr));
15595 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15596 LPFC_MBOX_OPCODE_FCOE_WQ_CREATE,
15597 length, LPFC_SLI4_MBX_EMBED);
15598 wq_create = &mbox->u.mqe.un.wq_create;
5a6f133e 15599 shdr = (union lpfc_sli4_cfg_shdr *) &wq_create->header.cfg_shdr;
4f774513
JS
15600 bf_set(lpfc_mbx_wq_create_num_pages, &wq_create->u.request,
15601 wq->page_count);
15602 bf_set(lpfc_mbx_wq_create_cq_id, &wq_create->u.request,
15603 cq->queue_id);
0c651878
JS
15604
15605 /* wqv is the earliest version supported, NOT the latest */
5a6f133e
JS
15606 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15607 phba->sli4_hba.pc_sli4_params.wqv);
962bc51b 15608
c176ffa0
JS
15609 if ((phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT) ||
15610 (wq->page_size > SLI4_PAGE_SIZE))
81b96eda
JS
15611 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15612 else
15613 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15614
0c651878 15615
1351e69f
JS
15616 if (phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT)
15617 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15618 else
15619 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15620
15621 switch (wq_create_version) {
0c651878 15622 case LPFC_Q_CREATE_VERSION_1:
5a6f133e
JS
15623 bf_set(lpfc_mbx_wq_create_wqe_count, &wq_create->u.request_1,
15624 wq->entry_count);
3f247de7
JS
15625 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15626 LPFC_Q_CREATE_VERSION_1);
15627
5a6f133e
JS
15628 switch (wq->entry_size) {
15629 default:
15630 case 64:
15631 bf_set(lpfc_mbx_wq_create_wqe_size,
15632 &wq_create->u.request_1,
15633 LPFC_WQ_WQE_SIZE_64);
15634 break;
15635 case 128:
15636 bf_set(lpfc_mbx_wq_create_wqe_size,
15637 &wq_create->u.request_1,
15638 LPFC_WQ_WQE_SIZE_128);
15639 break;
15640 }
1351e69f
JS
15641 /* Request DPP by default */
15642 bf_set(lpfc_mbx_wq_create_dpp_req, &wq_create->u.request_1, 1);
8ea73db4
JS
15643 bf_set(lpfc_mbx_wq_create_page_size,
15644 &wq_create->u.request_1,
81b96eda 15645 (wq->page_size / SLI4_PAGE_SIZE));
5a6f133e 15646 page = wq_create->u.request_1.page;
0c651878
JS
15647 break;
15648 default:
1351e69f
JS
15649 page = wq_create->u.request.page;
15650 break;
5a6f133e 15651 }
0c651878 15652
4f774513 15653 list_for_each_entry(dmabuf, &wq->page_list, list) {
49198b37 15654 memset(dmabuf->virt, 0, hw_page_size);
5a6f133e
JS
15655 page[dmabuf->buffer_tag].addr_lo = putPaddrLow(dmabuf->phys);
15656 page[dmabuf->buffer_tag].addr_hi = putPaddrHigh(dmabuf->phys);
4f774513 15657 }
962bc51b
JS
15658
15659 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15660 bf_set(lpfc_mbx_wq_create_dua, &wq_create->u.request, 1);
15661
4f774513
JS
15662 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15663 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15664 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15665 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15666 if (shdr_status || shdr_add_status || rc) {
15667 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15668 "2503 WQ_CREATE mailbox failed with "
15669 "status x%x add_status x%x, mbx status x%x\n",
15670 shdr_status, shdr_add_status, rc);
15671 status = -ENXIO;
15672 goto out;
15673 }
1351e69f
JS
15674
15675 if (wq_create_version == LPFC_Q_CREATE_VERSION_0)
15676 wq->queue_id = bf_get(lpfc_mbx_wq_create_q_id,
15677 &wq_create->u.response);
15678 else
15679 wq->queue_id = bf_get(lpfc_mbx_wq_create_v1_q_id,
15680 &wq_create->u.response_1);
15681
4f774513
JS
15682 if (wq->queue_id == 0xFFFF) {
15683 status = -ENXIO;
15684 goto out;
15685 }
1351e69f
JS
15686
15687 wq->db_format = LPFC_DB_LIST_FORMAT;
15688 if (wq_create_version == LPFC_Q_CREATE_VERSION_0) {
15689 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15690 wq->db_format = bf_get(lpfc_mbx_wq_create_db_format,
15691 &wq_create->u.response);
15692 if ((wq->db_format != LPFC_DB_LIST_FORMAT) &&
15693 (wq->db_format != LPFC_DB_RING_FORMAT)) {
15694 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15695 "3265 WQ[%d] doorbell format "
15696 "not supported: x%x\n",
15697 wq->queue_id, wq->db_format);
15698 status = -EINVAL;
15699 goto out;
15700 }
15701 pci_barset = bf_get(lpfc_mbx_wq_create_bar_set,
15702 &wq_create->u.response);
15703 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15704 pci_barset);
15705 if (!bar_memmap_p) {
15706 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15707 "3263 WQ[%d] failed to memmap "
15708 "pci barset:x%x\n",
15709 wq->queue_id, pci_barset);
15710 status = -ENOMEM;
15711 goto out;
15712 }
15713 db_offset = wq_create->u.response.doorbell_offset;
15714 if ((db_offset != LPFC_ULP0_WQ_DOORBELL) &&
15715 (db_offset != LPFC_ULP1_WQ_DOORBELL)) {
15716 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15717 "3252 WQ[%d] doorbell offset "
15718 "not supported: x%x\n",
15719 wq->queue_id, db_offset);
15720 status = -EINVAL;
15721 goto out;
15722 }
15723 wq->db_regaddr = bar_memmap_p + db_offset;
15724 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15725 "3264 WQ[%d]: barset:x%x, offset:x%x, "
15726 "format:x%x\n", wq->queue_id,
15727 pci_barset, db_offset, wq->db_format);
15728 } else
15729 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15730 } else {
1351e69f
JS
15731 /* Check if DPP was honored by the firmware */
15732 wq->dpp_enable = bf_get(lpfc_mbx_wq_create_dpp_rsp,
15733 &wq_create->u.response_1);
15734 if (wq->dpp_enable) {
15735 pci_barset = bf_get(lpfc_mbx_wq_create_v1_bar_set,
15736 &wq_create->u.response_1);
15737 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15738 pci_barset);
15739 if (!bar_memmap_p) {
15740 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15741 "3267 WQ[%d] failed to memmap "
15742 "pci barset:x%x\n",
15743 wq->queue_id, pci_barset);
15744 status = -ENOMEM;
15745 goto out;
15746 }
15747 db_offset = wq_create->u.response_1.doorbell_offset;
15748 wq->db_regaddr = bar_memmap_p + db_offset;
15749 wq->dpp_id = bf_get(lpfc_mbx_wq_create_dpp_id,
15750 &wq_create->u.response_1);
15751 dpp_barset = bf_get(lpfc_mbx_wq_create_dpp_bar,
15752 &wq_create->u.response_1);
15753 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15754 dpp_barset);
15755 if (!bar_memmap_p) {
15756 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15757 "3268 WQ[%d] failed to memmap "
15758 "pci barset:x%x\n",
15759 wq->queue_id, dpp_barset);
15760 status = -ENOMEM;
15761 goto out;
15762 }
15763 dpp_offset = wq_create->u.response_1.dpp_offset;
15764 wq->dpp_regaddr = bar_memmap_p + dpp_offset;
15765 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15766 "3271 WQ[%d]: barset:x%x, offset:x%x, "
15767 "dpp_id:x%x dpp_barset:x%x "
15768 "dpp_offset:x%x\n",
15769 wq->queue_id, pci_barset, db_offset,
15770 wq->dpp_id, dpp_barset, dpp_offset);
15771
15772 /* Enable combined writes for DPP aperture */
15773 pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK;
15774#ifdef CONFIG_X86
15775 rc = set_memory_wc(pg_addr, 1);
15776 if (rc) {
15777 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15778 "3272 Cannot setup Combined "
15779 "Write on WQ[%d] - disable DPP\n",
15780 wq->queue_id);
15781 phba->cfg_enable_dpp = 0;
15782 }
15783#else
15784 phba->cfg_enable_dpp = 0;
15785#endif
15786 } else
15787 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15788 }
895427bd
JS
15789 wq->pring = kzalloc(sizeof(struct lpfc_sli_ring), GFP_KERNEL);
15790 if (wq->pring == NULL) {
15791 status = -ENOMEM;
15792 goto out;
15793 }
4f774513 15794 wq->type = LPFC_WQ;
2a622bfb 15795 wq->assoc_qid = cq->queue_id;
4f774513
JS
15796 wq->subtype = subtype;
15797 wq->host_index = 0;
15798 wq->hba_index = 0;
32517fc0 15799 wq->notify_interval = LPFC_WQ_NOTIFY_INTRVL;
4f774513
JS
15800
15801 /* link the wq onto the parent cq child list */
15802 list_add_tail(&wq->list, &cq->child_list);
15803out:
8fa38513 15804 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15805 return status;
15806}
15807
15808/**
15809 * lpfc_rq_create - Create a Receive Queue on the HBA
15810 * @phba: HBA structure that indicates port to create a queue on.
15811 * @hrq: The queue structure to use to create the header receive queue.
15812 * @drq: The queue structure to use to create the data receive queue.
15813 * @cq: The completion queue to bind this work queue to.
15814 *
15815 * This function creates a receive buffer queue pair , as detailed in @hrq and
15816 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15817 * to the HBA.
15818 *
15819 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15820 * struct is used to get the entry count that is necessary to determine the
15821 * number of pages to use for this queue. The @cq is used to indicate which
15822 * completion queue to bind received buffers that are posted to these queues to.
15823 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15824 * receive queue pair. This function is asynchronous and will wait for the
15825 * mailbox command to finish before continuing.
15826 *
15827 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15828 * memory this function will return -ENOMEM. If the queue create mailbox command
15829 * fails this function will return -ENXIO.
4f774513 15830 **/
a2fc4aef 15831int
4f774513
JS
15832lpfc_rq_create(struct lpfc_hba *phba, struct lpfc_queue *hrq,
15833 struct lpfc_queue *drq, struct lpfc_queue *cq, uint32_t subtype)
15834{
15835 struct lpfc_mbx_rq_create *rq_create;
15836 struct lpfc_dmabuf *dmabuf;
15837 LPFC_MBOXQ_t *mbox;
15838 int rc, length, status = 0;
15839 uint32_t shdr_status, shdr_add_status;
15840 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15841 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
962bc51b
JS
15842 void __iomem *bar_memmap_p;
15843 uint32_t db_offset;
15844 uint16_t pci_barset;
49198b37 15845
2e90f4b5
JS
15846 /* sanity check on queue memory */
15847 if (!hrq || !drq || !cq)
15848 return -ENODEV;
49198b37
JS
15849 if (!phba->sli4_hba.pc_sli4_params.supported)
15850 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
15851
15852 if (hrq->entry_count != drq->entry_count)
15853 return -EINVAL;
15854 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15855 if (!mbox)
15856 return -ENOMEM;
15857 length = (sizeof(struct lpfc_mbx_rq_create) -
15858 sizeof(struct lpfc_sli4_cfg_mhdr));
15859 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15860 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15861 length, LPFC_SLI4_MBX_EMBED);
15862 rq_create = &mbox->u.mqe.un.rq_create;
5a6f133e
JS
15863 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
15864 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15865 phba->sli4_hba.pc_sli4_params.rqv);
15866 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15867 bf_set(lpfc_rq_context_rqe_count_1,
15868 &rq_create->u.request.context,
15869 hrq->entry_count);
15870 rq_create->u.request.context.buffer_size = LPFC_HDR_BUF_SIZE;
c31098ce
JS
15871 bf_set(lpfc_rq_context_rqe_size,
15872 &rq_create->u.request.context,
15873 LPFC_RQE_SIZE_8);
15874 bf_set(lpfc_rq_context_page_size,
15875 &rq_create->u.request.context,
8ea73db4 15876 LPFC_RQ_PAGE_SIZE_4096);
5a6f133e
JS
15877 } else {
15878 switch (hrq->entry_count) {
15879 default:
15880 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15881 "2535 Unsupported RQ count. (%d)\n",
15882 hrq->entry_count);
4f4c1863
JS
15883 if (hrq->entry_count < 512) {
15884 status = -EINVAL;
15885 goto out;
15886 }
5bd5f66c 15887 /* fall through - otherwise default to smallest count */
5a6f133e
JS
15888 case 512:
15889 bf_set(lpfc_rq_context_rqe_count,
15890 &rq_create->u.request.context,
15891 LPFC_RQ_RING_SIZE_512);
15892 break;
15893 case 1024:
15894 bf_set(lpfc_rq_context_rqe_count,
15895 &rq_create->u.request.context,
15896 LPFC_RQ_RING_SIZE_1024);
15897 break;
15898 case 2048:
15899 bf_set(lpfc_rq_context_rqe_count,
15900 &rq_create->u.request.context,
15901 LPFC_RQ_RING_SIZE_2048);
15902 break;
15903 case 4096:
15904 bf_set(lpfc_rq_context_rqe_count,
15905 &rq_create->u.request.context,
15906 LPFC_RQ_RING_SIZE_4096);
15907 break;
15908 }
15909 bf_set(lpfc_rq_context_buf_size, &rq_create->u.request.context,
15910 LPFC_HDR_BUF_SIZE);
4f774513
JS
15911 }
15912 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
15913 cq->queue_id);
15914 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
15915 hrq->page_count);
4f774513 15916 list_for_each_entry(dmabuf, &hrq->page_list, list) {
49198b37 15917 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
15918 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15919 putPaddrLow(dmabuf->phys);
15920 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15921 putPaddrHigh(dmabuf->phys);
15922 }
962bc51b
JS
15923 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15924 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
15925
4f774513
JS
15926 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15927 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15928 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15929 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15930 if (shdr_status || shdr_add_status || rc) {
15931 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15932 "2504 RQ_CREATE mailbox failed with "
15933 "status x%x add_status x%x, mbx status x%x\n",
15934 shdr_status, shdr_add_status, rc);
15935 status = -ENXIO;
15936 goto out;
15937 }
15938 hrq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15939 if (hrq->queue_id == 0xFFFF) {
15940 status = -ENXIO;
15941 goto out;
15942 }
962bc51b
JS
15943
15944 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15945 hrq->db_format = bf_get(lpfc_mbx_rq_create_db_format,
15946 &rq_create->u.response);
15947 if ((hrq->db_format != LPFC_DB_LIST_FORMAT) &&
15948 (hrq->db_format != LPFC_DB_RING_FORMAT)) {
15949 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15950 "3262 RQ [%d] doorbell format not "
15951 "supported: x%x\n", hrq->queue_id,
15952 hrq->db_format);
15953 status = -EINVAL;
15954 goto out;
15955 }
15956
15957 pci_barset = bf_get(lpfc_mbx_rq_create_bar_set,
15958 &rq_create->u.response);
15959 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba, pci_barset);
15960 if (!bar_memmap_p) {
15961 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15962 "3269 RQ[%d] failed to memmap pci "
15963 "barset:x%x\n", hrq->queue_id,
15964 pci_barset);
15965 status = -ENOMEM;
15966 goto out;
15967 }
15968
15969 db_offset = rq_create->u.response.doorbell_offset;
15970 if ((db_offset != LPFC_ULP0_RQ_DOORBELL) &&
15971 (db_offset != LPFC_ULP1_RQ_DOORBELL)) {
15972 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15973 "3270 RQ[%d] doorbell offset not "
15974 "supported: x%x\n", hrq->queue_id,
15975 db_offset);
15976 status = -EINVAL;
15977 goto out;
15978 }
15979 hrq->db_regaddr = bar_memmap_p + db_offset;
15980 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a22e7db3
JS
15981 "3266 RQ[qid:%d]: barset:x%x, offset:x%x, "
15982 "format:x%x\n", hrq->queue_id, pci_barset,
15983 db_offset, hrq->db_format);
962bc51b
JS
15984 } else {
15985 hrq->db_format = LPFC_DB_RING_FORMAT;
15986 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
15987 }
4f774513 15988 hrq->type = LPFC_HRQ;
2a622bfb 15989 hrq->assoc_qid = cq->queue_id;
4f774513
JS
15990 hrq->subtype = subtype;
15991 hrq->host_index = 0;
15992 hrq->hba_index = 0;
32517fc0 15993 hrq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
4f774513
JS
15994
15995 /* now create the data queue */
15996 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15997 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15998 length, LPFC_SLI4_MBX_EMBED);
5a6f133e
JS
15999 bf_set(lpfc_mbox_hdr_version, &shdr->request,
16000 phba->sli4_hba.pc_sli4_params.rqv);
16001 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
16002 bf_set(lpfc_rq_context_rqe_count_1,
c31098ce 16003 &rq_create->u.request.context, hrq->entry_count);
3c603be9
JS
16004 if (subtype == LPFC_NVMET)
16005 rq_create->u.request.context.buffer_size =
16006 LPFC_NVMET_DATA_BUF_SIZE;
16007 else
16008 rq_create->u.request.context.buffer_size =
16009 LPFC_DATA_BUF_SIZE;
c31098ce
JS
16010 bf_set(lpfc_rq_context_rqe_size, &rq_create->u.request.context,
16011 LPFC_RQE_SIZE_8);
16012 bf_set(lpfc_rq_context_page_size, &rq_create->u.request.context,
16013 (PAGE_SIZE/SLI4_PAGE_SIZE));
5a6f133e
JS
16014 } else {
16015 switch (drq->entry_count) {
16016 default:
16017 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16018 "2536 Unsupported RQ count. (%d)\n",
16019 drq->entry_count);
4f4c1863
JS
16020 if (drq->entry_count < 512) {
16021 status = -EINVAL;
16022 goto out;
16023 }
5bd5f66c 16024 /* fall through - otherwise default to smallest count */
5a6f133e
JS
16025 case 512:
16026 bf_set(lpfc_rq_context_rqe_count,
16027 &rq_create->u.request.context,
16028 LPFC_RQ_RING_SIZE_512);
16029 break;
16030 case 1024:
16031 bf_set(lpfc_rq_context_rqe_count,
16032 &rq_create->u.request.context,
16033 LPFC_RQ_RING_SIZE_1024);
16034 break;
16035 case 2048:
16036 bf_set(lpfc_rq_context_rqe_count,
16037 &rq_create->u.request.context,
16038 LPFC_RQ_RING_SIZE_2048);
16039 break;
16040 case 4096:
16041 bf_set(lpfc_rq_context_rqe_count,
16042 &rq_create->u.request.context,
16043 LPFC_RQ_RING_SIZE_4096);
16044 break;
16045 }
3c603be9
JS
16046 if (subtype == LPFC_NVMET)
16047 bf_set(lpfc_rq_context_buf_size,
16048 &rq_create->u.request.context,
16049 LPFC_NVMET_DATA_BUF_SIZE);
16050 else
16051 bf_set(lpfc_rq_context_buf_size,
16052 &rq_create->u.request.context,
16053 LPFC_DATA_BUF_SIZE);
4f774513
JS
16054 }
16055 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
16056 cq->queue_id);
16057 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
16058 drq->page_count);
4f774513
JS
16059 list_for_each_entry(dmabuf, &drq->page_list, list) {
16060 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
16061 putPaddrLow(dmabuf->phys);
16062 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
16063 putPaddrHigh(dmabuf->phys);
16064 }
962bc51b
JS
16065 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
16066 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
4f774513
JS
16067 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16068 /* The IOCTL status is embedded in the mailbox subheader. */
16069 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
16070 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16071 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16072 if (shdr_status || shdr_add_status || rc) {
16073 status = -ENXIO;
16074 goto out;
16075 }
16076 drq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16077 if (drq->queue_id == 0xFFFF) {
16078 status = -ENXIO;
16079 goto out;
16080 }
16081 drq->type = LPFC_DRQ;
2a622bfb 16082 drq->assoc_qid = cq->queue_id;
4f774513
JS
16083 drq->subtype = subtype;
16084 drq->host_index = 0;
16085 drq->hba_index = 0;
32517fc0 16086 drq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
4f774513
JS
16087
16088 /* link the header and data RQs onto the parent cq child list */
16089 list_add_tail(&hrq->list, &cq->child_list);
16090 list_add_tail(&drq->list, &cq->child_list);
16091
16092out:
8fa38513 16093 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
16094 return status;
16095}
16096
2d7dbc4c
JS
16097/**
16098 * lpfc_mrq_create - Create MRQ Receive Queues on the HBA
16099 * @phba: HBA structure that indicates port to create a queue on.
16100 * @hrqp: The queue structure array to use to create the header receive queues.
16101 * @drqp: The queue structure array to use to create the data receive queues.
16102 * @cqp: The completion queue array to bind these receive queues to.
16103 *
16104 * This function creates a receive buffer queue pair , as detailed in @hrq and
16105 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
16106 * to the HBA.
16107 *
16108 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
16109 * struct is used to get the entry count that is necessary to determine the
16110 * number of pages to use for this queue. The @cq is used to indicate which
16111 * completion queue to bind received buffers that are posted to these queues to.
16112 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
16113 * receive queue pair. This function is asynchronous and will wait for the
16114 * mailbox command to finish before continuing.
16115 *
16116 * On success this function will return a zero. If unable to allocate enough
16117 * memory this function will return -ENOMEM. If the queue create mailbox command
16118 * fails this function will return -ENXIO.
16119 **/
16120int
16121lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
16122 struct lpfc_queue **drqp, struct lpfc_queue **cqp,
16123 uint32_t subtype)
16124{
16125 struct lpfc_queue *hrq, *drq, *cq;
16126 struct lpfc_mbx_rq_create_v2 *rq_create;
16127 struct lpfc_dmabuf *dmabuf;
16128 LPFC_MBOXQ_t *mbox;
16129 int rc, length, alloclen, status = 0;
16130 int cnt, idx, numrq, page_idx = 0;
16131 uint32_t shdr_status, shdr_add_status;
16132 union lpfc_sli4_cfg_shdr *shdr;
16133 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
16134
16135 numrq = phba->cfg_nvmet_mrq;
16136 /* sanity check on array memory */
16137 if (!hrqp || !drqp || !cqp || !numrq)
16138 return -ENODEV;
16139 if (!phba->sli4_hba.pc_sli4_params.supported)
16140 hw_page_size = SLI4_PAGE_SIZE;
16141
16142 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16143 if (!mbox)
16144 return -ENOMEM;
16145
16146 length = sizeof(struct lpfc_mbx_rq_create_v2);
16147 length += ((2 * numrq * hrqp[0]->page_count) *
16148 sizeof(struct dma_address));
16149
16150 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16151 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE, length,
16152 LPFC_SLI4_MBX_NEMBED);
16153 if (alloclen < length) {
16154 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16155 "3099 Allocated DMA memory size (%d) is "
16156 "less than the requested DMA memory size "
16157 "(%d)\n", alloclen, length);
16158 status = -ENOMEM;
16159 goto out;
16160 }
16161
16162
16163
16164 rq_create = mbox->sge_array->addr[0];
16165 shdr = (union lpfc_sli4_cfg_shdr *)&rq_create->cfg_shdr;
16166
16167 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_Q_CREATE_VERSION_2);
16168 cnt = 0;
16169
16170 for (idx = 0; idx < numrq; idx++) {
16171 hrq = hrqp[idx];
16172 drq = drqp[idx];
16173 cq = cqp[idx];
16174
2d7dbc4c
JS
16175 /* sanity check on queue memory */
16176 if (!hrq || !drq || !cq) {
16177 status = -ENODEV;
16178 goto out;
16179 }
16180
7aabe84b
JS
16181 if (hrq->entry_count != drq->entry_count) {
16182 status = -EINVAL;
16183 goto out;
16184 }
16185
2d7dbc4c
JS
16186 if (idx == 0) {
16187 bf_set(lpfc_mbx_rq_create_num_pages,
16188 &rq_create->u.request,
16189 hrq->page_count);
16190 bf_set(lpfc_mbx_rq_create_rq_cnt,
16191 &rq_create->u.request, (numrq * 2));
16192 bf_set(lpfc_mbx_rq_create_dnb, &rq_create->u.request,
16193 1);
16194 bf_set(lpfc_rq_context_base_cq,
16195 &rq_create->u.request.context,
16196 cq->queue_id);
16197 bf_set(lpfc_rq_context_data_size,
16198 &rq_create->u.request.context,
3c603be9 16199 LPFC_NVMET_DATA_BUF_SIZE);
2d7dbc4c
JS
16200 bf_set(lpfc_rq_context_hdr_size,
16201 &rq_create->u.request.context,
16202 LPFC_HDR_BUF_SIZE);
16203 bf_set(lpfc_rq_context_rqe_count_1,
16204 &rq_create->u.request.context,
16205 hrq->entry_count);
16206 bf_set(lpfc_rq_context_rqe_size,
16207 &rq_create->u.request.context,
16208 LPFC_RQE_SIZE_8);
16209 bf_set(lpfc_rq_context_page_size,
16210 &rq_create->u.request.context,
16211 (PAGE_SIZE/SLI4_PAGE_SIZE));
16212 }
16213 rc = 0;
16214 list_for_each_entry(dmabuf, &hrq->page_list, list) {
16215 memset(dmabuf->virt, 0, hw_page_size);
16216 cnt = page_idx + dmabuf->buffer_tag;
16217 rq_create->u.request.page[cnt].addr_lo =
16218 putPaddrLow(dmabuf->phys);
16219 rq_create->u.request.page[cnt].addr_hi =
16220 putPaddrHigh(dmabuf->phys);
16221 rc++;
16222 }
16223 page_idx += rc;
16224
16225 rc = 0;
16226 list_for_each_entry(dmabuf, &drq->page_list, list) {
16227 memset(dmabuf->virt, 0, hw_page_size);
16228 cnt = page_idx + dmabuf->buffer_tag;
16229 rq_create->u.request.page[cnt].addr_lo =
16230 putPaddrLow(dmabuf->phys);
16231 rq_create->u.request.page[cnt].addr_hi =
16232 putPaddrHigh(dmabuf->phys);
16233 rc++;
16234 }
16235 page_idx += rc;
16236
16237 hrq->db_format = LPFC_DB_RING_FORMAT;
16238 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16239 hrq->type = LPFC_HRQ;
16240 hrq->assoc_qid = cq->queue_id;
16241 hrq->subtype = subtype;
16242 hrq->host_index = 0;
16243 hrq->hba_index = 0;
32517fc0 16244 hrq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
2d7dbc4c
JS
16245
16246 drq->db_format = LPFC_DB_RING_FORMAT;
16247 drq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16248 drq->type = LPFC_DRQ;
16249 drq->assoc_qid = cq->queue_id;
16250 drq->subtype = subtype;
16251 drq->host_index = 0;
16252 drq->hba_index = 0;
32517fc0 16253 drq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
2d7dbc4c
JS
16254
16255 list_add_tail(&hrq->list, &cq->child_list);
16256 list_add_tail(&drq->list, &cq->child_list);
16257 }
16258
16259 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16260 /* The IOCTL status is embedded in the mailbox subheader. */
16261 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16262 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16263 if (shdr_status || shdr_add_status || rc) {
16264 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16265 "3120 RQ_CREATE mailbox failed with "
16266 "status x%x add_status x%x, mbx status x%x\n",
16267 shdr_status, shdr_add_status, rc);
16268 status = -ENXIO;
16269 goto out;
16270 }
16271 rc = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16272 if (rc == 0xFFFF) {
16273 status = -ENXIO;
16274 goto out;
16275 }
16276
16277 /* Initialize all RQs with associated queue id */
16278 for (idx = 0; idx < numrq; idx++) {
16279 hrq = hrqp[idx];
16280 hrq->queue_id = rc + (2 * idx);
16281 drq = drqp[idx];
16282 drq->queue_id = rc + (2 * idx) + 1;
16283 }
16284
16285out:
16286 lpfc_sli4_mbox_cmd_free(phba, mbox);
16287 return status;
16288}
16289
4f774513
JS
16290/**
16291 * lpfc_eq_destroy - Destroy an event Queue on the HBA
16292 * @eq: The queue structure associated with the queue to destroy.
16293 *
16294 * This function destroys a queue, as detailed in @eq by sending an mailbox
16295 * command, specific to the type of queue, to the HBA.
16296 *
16297 * The @eq struct is used to get the queue ID of the queue to destroy.
16298 *
16299 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16300 * command fails this function will return -ENXIO.
4f774513 16301 **/
a2fc4aef 16302int
4f774513
JS
16303lpfc_eq_destroy(struct lpfc_hba *phba, struct lpfc_queue *eq)
16304{
16305 LPFC_MBOXQ_t *mbox;
16306 int rc, length, status = 0;
16307 uint32_t shdr_status, shdr_add_status;
16308 union lpfc_sli4_cfg_shdr *shdr;
16309
2e90f4b5 16310 /* sanity check on queue memory */
4f774513
JS
16311 if (!eq)
16312 return -ENODEV;
32517fc0 16313
4f774513
JS
16314 mbox = mempool_alloc(eq->phba->mbox_mem_pool, GFP_KERNEL);
16315 if (!mbox)
16316 return -ENOMEM;
16317 length = (sizeof(struct lpfc_mbx_eq_destroy) -
16318 sizeof(struct lpfc_sli4_cfg_mhdr));
16319 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16320 LPFC_MBOX_OPCODE_EQ_DESTROY,
16321 length, LPFC_SLI4_MBX_EMBED);
16322 bf_set(lpfc_mbx_eq_destroy_q_id, &mbox->u.mqe.un.eq_destroy.u.request,
16323 eq->queue_id);
16324 mbox->vport = eq->phba->pport;
16325 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16326
16327 rc = lpfc_sli_issue_mbox(eq->phba, mbox, MBX_POLL);
16328 /* The IOCTL status is embedded in the mailbox subheader. */
16329 shdr = (union lpfc_sli4_cfg_shdr *)
16330 &mbox->u.mqe.un.eq_destroy.header.cfg_shdr;
16331 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16332 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16333 if (shdr_status || shdr_add_status || rc) {
16334 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16335 "2505 EQ_DESTROY mailbox failed with "
16336 "status x%x add_status x%x, mbx status x%x\n",
16337 shdr_status, shdr_add_status, rc);
16338 status = -ENXIO;
16339 }
16340
16341 /* Remove eq from any list */
16342 list_del_init(&eq->list);
8fa38513 16343 mempool_free(mbox, eq->phba->mbox_mem_pool);
4f774513
JS
16344 return status;
16345}
16346
16347/**
16348 * lpfc_cq_destroy - Destroy a Completion Queue on the HBA
16349 * @cq: The queue structure associated with the queue to destroy.
16350 *
16351 * This function destroys a queue, as detailed in @cq by sending an mailbox
16352 * command, specific to the type of queue, to the HBA.
16353 *
16354 * The @cq struct is used to get the queue ID of the queue to destroy.
16355 *
16356 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16357 * command fails this function will return -ENXIO.
4f774513 16358 **/
a2fc4aef 16359int
4f774513
JS
16360lpfc_cq_destroy(struct lpfc_hba *phba, struct lpfc_queue *cq)
16361{
16362 LPFC_MBOXQ_t *mbox;
16363 int rc, length, status = 0;
16364 uint32_t shdr_status, shdr_add_status;
16365 union lpfc_sli4_cfg_shdr *shdr;
16366
2e90f4b5 16367 /* sanity check on queue memory */
4f774513
JS
16368 if (!cq)
16369 return -ENODEV;
16370 mbox = mempool_alloc(cq->phba->mbox_mem_pool, GFP_KERNEL);
16371 if (!mbox)
16372 return -ENOMEM;
16373 length = (sizeof(struct lpfc_mbx_cq_destroy) -
16374 sizeof(struct lpfc_sli4_cfg_mhdr));
16375 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16376 LPFC_MBOX_OPCODE_CQ_DESTROY,
16377 length, LPFC_SLI4_MBX_EMBED);
16378 bf_set(lpfc_mbx_cq_destroy_q_id, &mbox->u.mqe.un.cq_destroy.u.request,
16379 cq->queue_id);
16380 mbox->vport = cq->phba->pport;
16381 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16382 rc = lpfc_sli_issue_mbox(cq->phba, mbox, MBX_POLL);
16383 /* The IOCTL status is embedded in the mailbox subheader. */
16384 shdr = (union lpfc_sli4_cfg_shdr *)
16385 &mbox->u.mqe.un.wq_create.header.cfg_shdr;
16386 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16387 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16388 if (shdr_status || shdr_add_status || rc) {
16389 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16390 "2506 CQ_DESTROY mailbox failed with "
16391 "status x%x add_status x%x, mbx status x%x\n",
16392 shdr_status, shdr_add_status, rc);
16393 status = -ENXIO;
16394 }
16395 /* Remove cq from any list */
16396 list_del_init(&cq->list);
8fa38513 16397 mempool_free(mbox, cq->phba->mbox_mem_pool);
4f774513
JS
16398 return status;
16399}
16400
04c68496
JS
16401/**
16402 * lpfc_mq_destroy - Destroy a Mailbox Queue on the HBA
16403 * @qm: The queue structure associated with the queue to destroy.
16404 *
16405 * This function destroys a queue, as detailed in @mq by sending an mailbox
16406 * command, specific to the type of queue, to the HBA.
16407 *
16408 * The @mq struct is used to get the queue ID of the queue to destroy.
16409 *
16410 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16411 * command fails this function will return -ENXIO.
04c68496 16412 **/
a2fc4aef 16413int
04c68496
JS
16414lpfc_mq_destroy(struct lpfc_hba *phba, struct lpfc_queue *mq)
16415{
16416 LPFC_MBOXQ_t *mbox;
16417 int rc, length, status = 0;
16418 uint32_t shdr_status, shdr_add_status;
16419 union lpfc_sli4_cfg_shdr *shdr;
16420
2e90f4b5 16421 /* sanity check on queue memory */
04c68496
JS
16422 if (!mq)
16423 return -ENODEV;
16424 mbox = mempool_alloc(mq->phba->mbox_mem_pool, GFP_KERNEL);
16425 if (!mbox)
16426 return -ENOMEM;
16427 length = (sizeof(struct lpfc_mbx_mq_destroy) -
16428 sizeof(struct lpfc_sli4_cfg_mhdr));
16429 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16430 LPFC_MBOX_OPCODE_MQ_DESTROY,
16431 length, LPFC_SLI4_MBX_EMBED);
16432 bf_set(lpfc_mbx_mq_destroy_q_id, &mbox->u.mqe.un.mq_destroy.u.request,
16433 mq->queue_id);
16434 mbox->vport = mq->phba->pport;
16435 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16436 rc = lpfc_sli_issue_mbox(mq->phba, mbox, MBX_POLL);
16437 /* The IOCTL status is embedded in the mailbox subheader. */
16438 shdr = (union lpfc_sli4_cfg_shdr *)
16439 &mbox->u.mqe.un.mq_destroy.header.cfg_shdr;
16440 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16441 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16442 if (shdr_status || shdr_add_status || rc) {
16443 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16444 "2507 MQ_DESTROY mailbox failed with "
16445 "status x%x add_status x%x, mbx status x%x\n",
16446 shdr_status, shdr_add_status, rc);
16447 status = -ENXIO;
16448 }
16449 /* Remove mq from any list */
16450 list_del_init(&mq->list);
8fa38513 16451 mempool_free(mbox, mq->phba->mbox_mem_pool);
04c68496
JS
16452 return status;
16453}
16454
4f774513
JS
16455/**
16456 * lpfc_wq_destroy - Destroy a Work Queue on the HBA
16457 * @wq: The queue structure associated with the queue to destroy.
16458 *
16459 * This function destroys a queue, as detailed in @wq by sending an mailbox
16460 * command, specific to the type of queue, to the HBA.
16461 *
16462 * The @wq struct is used to get the queue ID of the queue to destroy.
16463 *
16464 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16465 * command fails this function will return -ENXIO.
4f774513 16466 **/
a2fc4aef 16467int
4f774513
JS
16468lpfc_wq_destroy(struct lpfc_hba *phba, struct lpfc_queue *wq)
16469{
16470 LPFC_MBOXQ_t *mbox;
16471 int rc, length, status = 0;
16472 uint32_t shdr_status, shdr_add_status;
16473 union lpfc_sli4_cfg_shdr *shdr;
16474
2e90f4b5 16475 /* sanity check on queue memory */
4f774513
JS
16476 if (!wq)
16477 return -ENODEV;
16478 mbox = mempool_alloc(wq->phba->mbox_mem_pool, GFP_KERNEL);
16479 if (!mbox)
16480 return -ENOMEM;
16481 length = (sizeof(struct lpfc_mbx_wq_destroy) -
16482 sizeof(struct lpfc_sli4_cfg_mhdr));
16483 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16484 LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY,
16485 length, LPFC_SLI4_MBX_EMBED);
16486 bf_set(lpfc_mbx_wq_destroy_q_id, &mbox->u.mqe.un.wq_destroy.u.request,
16487 wq->queue_id);
16488 mbox->vport = wq->phba->pport;
16489 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16490 rc = lpfc_sli_issue_mbox(wq->phba, mbox, MBX_POLL);
16491 shdr = (union lpfc_sli4_cfg_shdr *)
16492 &mbox->u.mqe.un.wq_destroy.header.cfg_shdr;
16493 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16494 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16495 if (shdr_status || shdr_add_status || rc) {
16496 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16497 "2508 WQ_DESTROY mailbox failed with "
16498 "status x%x add_status x%x, mbx status x%x\n",
16499 shdr_status, shdr_add_status, rc);
16500 status = -ENXIO;
16501 }
16502 /* Remove wq from any list */
16503 list_del_init(&wq->list);
d1f525aa
JS
16504 kfree(wq->pring);
16505 wq->pring = NULL;
8fa38513 16506 mempool_free(mbox, wq->phba->mbox_mem_pool);
4f774513
JS
16507 return status;
16508}
16509
16510/**
16511 * lpfc_rq_destroy - Destroy a Receive Queue on the HBA
16512 * @rq: The queue structure associated with the queue to destroy.
16513 *
16514 * This function destroys a queue, as detailed in @rq by sending an mailbox
16515 * command, specific to the type of queue, to the HBA.
16516 *
16517 * The @rq struct is used to get the queue ID of the queue to destroy.
16518 *
16519 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16520 * command fails this function will return -ENXIO.
4f774513 16521 **/
a2fc4aef 16522int
4f774513
JS
16523lpfc_rq_destroy(struct lpfc_hba *phba, struct lpfc_queue *hrq,
16524 struct lpfc_queue *drq)
16525{
16526 LPFC_MBOXQ_t *mbox;
16527 int rc, length, status = 0;
16528 uint32_t shdr_status, shdr_add_status;
16529 union lpfc_sli4_cfg_shdr *shdr;
16530
2e90f4b5 16531 /* sanity check on queue memory */
4f774513
JS
16532 if (!hrq || !drq)
16533 return -ENODEV;
16534 mbox = mempool_alloc(hrq->phba->mbox_mem_pool, GFP_KERNEL);
16535 if (!mbox)
16536 return -ENOMEM;
16537 length = (sizeof(struct lpfc_mbx_rq_destroy) -
fedd3b7b 16538 sizeof(struct lpfc_sli4_cfg_mhdr));
4f774513
JS
16539 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16540 LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY,
16541 length, LPFC_SLI4_MBX_EMBED);
16542 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16543 hrq->queue_id);
16544 mbox->vport = hrq->phba->pport;
16545 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16546 rc = lpfc_sli_issue_mbox(hrq->phba, mbox, MBX_POLL);
16547 /* The IOCTL status is embedded in the mailbox subheader. */
16548 shdr = (union lpfc_sli4_cfg_shdr *)
16549 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16550 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16551 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16552 if (shdr_status || shdr_add_status || rc) {
16553 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16554 "2509 RQ_DESTROY mailbox failed with "
16555 "status x%x add_status x%x, mbx status x%x\n",
16556 shdr_status, shdr_add_status, rc);
16557 if (rc != MBX_TIMEOUT)
16558 mempool_free(mbox, hrq->phba->mbox_mem_pool);
16559 return -ENXIO;
16560 }
16561 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16562 drq->queue_id);
16563 rc = lpfc_sli_issue_mbox(drq->phba, mbox, MBX_POLL);
16564 shdr = (union lpfc_sli4_cfg_shdr *)
16565 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16566 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16567 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16568 if (shdr_status || shdr_add_status || rc) {
16569 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16570 "2510 RQ_DESTROY mailbox failed with "
16571 "status x%x add_status x%x, mbx status x%x\n",
16572 shdr_status, shdr_add_status, rc);
16573 status = -ENXIO;
16574 }
16575 list_del_init(&hrq->list);
16576 list_del_init(&drq->list);
8fa38513 16577 mempool_free(mbox, hrq->phba->mbox_mem_pool);
4f774513
JS
16578 return status;
16579}
16580
16581/**
16582 * lpfc_sli4_post_sgl - Post scatter gather list for an XRI to HBA
16583 * @phba: The virtual port for which this call being executed.
16584 * @pdma_phys_addr0: Physical address of the 1st SGL page.
16585 * @pdma_phys_addr1: Physical address of the 2nd SGL page.
16586 * @xritag: the xritag that ties this io to the SGL pages.
16587 *
16588 * This routine will post the sgl pages for the IO that has the xritag
16589 * that is in the iocbq structure. The xritag is assigned during iocbq
16590 * creation and persists for as long as the driver is loaded.
16591 * if the caller has fewer than 256 scatter gather segments to map then
16592 * pdma_phys_addr1 should be 0.
16593 * If the caller needs to map more than 256 scatter gather segment then
16594 * pdma_phys_addr1 should be a valid physical address.
16595 * physical address for SGLs must be 64 byte aligned.
16596 * If you are going to map 2 SGL's then the first one must have 256 entries
16597 * the second sgl can have between 1 and 256 entries.
16598 *
16599 * Return codes:
16600 * 0 - Success
16601 * -ENXIO, -ENOMEM - Failure
16602 **/
16603int
16604lpfc_sli4_post_sgl(struct lpfc_hba *phba,
16605 dma_addr_t pdma_phys_addr0,
16606 dma_addr_t pdma_phys_addr1,
16607 uint16_t xritag)
16608{
16609 struct lpfc_mbx_post_sgl_pages *post_sgl_pages;
16610 LPFC_MBOXQ_t *mbox;
16611 int rc;
16612 uint32_t shdr_status, shdr_add_status;
6d368e53 16613 uint32_t mbox_tmo;
4f774513
JS
16614 union lpfc_sli4_cfg_shdr *shdr;
16615
16616 if (xritag == NO_XRI) {
16617 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16618 "0364 Invalid param:\n");
16619 return -EINVAL;
16620 }
16621
16622 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16623 if (!mbox)
16624 return -ENOMEM;
16625
16626 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16627 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16628 sizeof(struct lpfc_mbx_post_sgl_pages) -
fedd3b7b 16629 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
4f774513
JS
16630
16631 post_sgl_pages = (struct lpfc_mbx_post_sgl_pages *)
16632 &mbox->u.mqe.un.post_sgl_pages;
16633 bf_set(lpfc_post_sgl_pages_xri, post_sgl_pages, xritag);
16634 bf_set(lpfc_post_sgl_pages_xricnt, post_sgl_pages, 1);
16635
16636 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_lo =
16637 cpu_to_le32(putPaddrLow(pdma_phys_addr0));
16638 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_hi =
16639 cpu_to_le32(putPaddrHigh(pdma_phys_addr0));
16640
16641 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_lo =
16642 cpu_to_le32(putPaddrLow(pdma_phys_addr1));
16643 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_hi =
16644 cpu_to_le32(putPaddrHigh(pdma_phys_addr1));
16645 if (!phba->sli4_hba.intr_enable)
16646 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6d368e53 16647 else {
a183a15f 16648 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
16649 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16650 }
4f774513
JS
16651 /* The IOCTL status is embedded in the mailbox subheader. */
16652 shdr = (union lpfc_sli4_cfg_shdr *) &post_sgl_pages->header.cfg_shdr;
16653 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16654 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16655 if (rc != MBX_TIMEOUT)
16656 mempool_free(mbox, phba->mbox_mem_pool);
16657 if (shdr_status || shdr_add_status || rc) {
16658 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16659 "2511 POST_SGL mailbox failed with "
16660 "status x%x add_status x%x, mbx status x%x\n",
16661 shdr_status, shdr_add_status, rc);
4f774513
JS
16662 }
16663 return 0;
16664}
4f774513 16665
6d368e53 16666/**
88a2cfbb 16667 * lpfc_sli4_alloc_xri - Get an available rpi in the device's range
6d368e53
JS
16668 * @phba: pointer to lpfc hba data structure.
16669 *
16670 * This routine is invoked to post rpi header templates to the
88a2cfbb
JS
16671 * HBA consistent with the SLI-4 interface spec. This routine
16672 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
16673 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6d368e53 16674 *
88a2cfbb
JS
16675 * Returns
16676 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
16677 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
16678 **/
5d8b8167 16679static uint16_t
6d368e53
JS
16680lpfc_sli4_alloc_xri(struct lpfc_hba *phba)
16681{
16682 unsigned long xri;
16683
16684 /*
16685 * Fetch the next logical xri. Because this index is logical,
16686 * the driver starts at 0 each time.
16687 */
16688 spin_lock_irq(&phba->hbalock);
16689 xri = find_next_zero_bit(phba->sli4_hba.xri_bmask,
16690 phba->sli4_hba.max_cfg_param.max_xri, 0);
16691 if (xri >= phba->sli4_hba.max_cfg_param.max_xri) {
16692 spin_unlock_irq(&phba->hbalock);
16693 return NO_XRI;
16694 } else {
16695 set_bit(xri, phba->sli4_hba.xri_bmask);
16696 phba->sli4_hba.max_cfg_param.xri_used++;
6d368e53 16697 }
6d368e53
JS
16698 spin_unlock_irq(&phba->hbalock);
16699 return xri;
16700}
16701
16702/**
16703 * lpfc_sli4_free_xri - Release an xri for reuse.
16704 * @phba: pointer to lpfc hba data structure.
16705 *
16706 * This routine is invoked to release an xri to the pool of
16707 * available rpis maintained by the driver.
16708 **/
5d8b8167 16709static void
6d368e53
JS
16710__lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16711{
16712 if (test_and_clear_bit(xri, phba->sli4_hba.xri_bmask)) {
6d368e53
JS
16713 phba->sli4_hba.max_cfg_param.xri_used--;
16714 }
16715}
16716
16717/**
16718 * lpfc_sli4_free_xri - Release an xri for reuse.
16719 * @phba: pointer to lpfc hba data structure.
16720 *
16721 * This routine is invoked to release an xri to the pool of
16722 * available rpis maintained by the driver.
16723 **/
16724void
16725lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16726{
16727 spin_lock_irq(&phba->hbalock);
16728 __lpfc_sli4_free_xri(phba, xri);
16729 spin_unlock_irq(&phba->hbalock);
16730}
16731
4f774513
JS
16732/**
16733 * lpfc_sli4_next_xritag - Get an xritag for the io
16734 * @phba: Pointer to HBA context object.
16735 *
16736 * This function gets an xritag for the iocb. If there is no unused xritag
16737 * it will return 0xffff.
16738 * The function returns the allocated xritag if successful, else returns zero.
16739 * Zero is not a valid xritag.
16740 * The caller is not required to hold any lock.
16741 **/
16742uint16_t
16743lpfc_sli4_next_xritag(struct lpfc_hba *phba)
16744{
6d368e53 16745 uint16_t xri_index;
4f774513 16746
6d368e53 16747 xri_index = lpfc_sli4_alloc_xri(phba);
81378052
JS
16748 if (xri_index == NO_XRI)
16749 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
16750 "2004 Failed to allocate XRI.last XRITAG is %d"
16751 " Max XRI is %d, Used XRI is %d\n",
16752 xri_index,
16753 phba->sli4_hba.max_cfg_param.max_xri,
16754 phba->sli4_hba.max_cfg_param.xri_used);
16755 return xri_index;
4f774513
JS
16756}
16757
16758/**
895427bd 16759 * lpfc_sli4_post_sgl_list - post a block of ELS sgls to the port.
4f774513 16760 * @phba: pointer to lpfc hba data structure.
8a9d2e80
JS
16761 * @post_sgl_list: pointer to els sgl entry list.
16762 * @count: number of els sgl entries on the list.
4f774513
JS
16763 *
16764 * This routine is invoked to post a block of driver's sgl pages to the
16765 * HBA using non-embedded mailbox command. No Lock is held. This routine
16766 * is only called when the driver is loading and after all IO has been
16767 * stopped.
16768 **/
8a9d2e80 16769static int
895427bd 16770lpfc_sli4_post_sgl_list(struct lpfc_hba *phba,
8a9d2e80
JS
16771 struct list_head *post_sgl_list,
16772 int post_cnt)
4f774513 16773{
8a9d2e80 16774 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
4f774513
JS
16775 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16776 struct sgl_page_pairs *sgl_pg_pairs;
16777 void *viraddr;
16778 LPFC_MBOXQ_t *mbox;
16779 uint32_t reqlen, alloclen, pg_pairs;
16780 uint32_t mbox_tmo;
8a9d2e80
JS
16781 uint16_t xritag_start = 0;
16782 int rc = 0;
4f774513
JS
16783 uint32_t shdr_status, shdr_add_status;
16784 union lpfc_sli4_cfg_shdr *shdr;
16785
895427bd 16786 reqlen = post_cnt * sizeof(struct sgl_page_pairs) +
4f774513 16787 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16788 if (reqlen > SLI4_PAGE_SIZE) {
895427bd 16789 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4f774513
JS
16790 "2559 Block sgl registration required DMA "
16791 "size (%d) great than a page\n", reqlen);
16792 return -ENOMEM;
16793 }
895427bd 16794
4f774513 16795 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6d368e53 16796 if (!mbox)
4f774513 16797 return -ENOMEM;
4f774513
JS
16798
16799 /* Allocate DMA memory and set up the non-embedded mailbox command */
16800 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16801 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES, reqlen,
16802 LPFC_SLI4_MBX_NEMBED);
16803
16804 if (alloclen < reqlen) {
16805 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16806 "0285 Allocated DMA memory size (%d) is "
16807 "less than the requested DMA memory "
16808 "size (%d)\n", alloclen, reqlen);
16809 lpfc_sli4_mbox_cmd_free(phba, mbox);
16810 return -ENOMEM;
16811 }
4f774513 16812 /* Set up the SGL pages in the non-embedded DMA pages */
6d368e53 16813 viraddr = mbox->sge_array->addr[0];
4f774513
JS
16814 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16815 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16816
8a9d2e80
JS
16817 pg_pairs = 0;
16818 list_for_each_entry_safe(sglq_entry, sglq_next, post_sgl_list, list) {
4f774513
JS
16819 /* Set up the sge entry */
16820 sgl_pg_pairs->sgl_pg0_addr_lo =
16821 cpu_to_le32(putPaddrLow(sglq_entry->phys));
16822 sgl_pg_pairs->sgl_pg0_addr_hi =
16823 cpu_to_le32(putPaddrHigh(sglq_entry->phys));
16824 sgl_pg_pairs->sgl_pg1_addr_lo =
16825 cpu_to_le32(putPaddrLow(0));
16826 sgl_pg_pairs->sgl_pg1_addr_hi =
16827 cpu_to_le32(putPaddrHigh(0));
6d368e53 16828
4f774513
JS
16829 /* Keep the first xritag on the list */
16830 if (pg_pairs == 0)
16831 xritag_start = sglq_entry->sli4_xritag;
16832 sgl_pg_pairs++;
8a9d2e80 16833 pg_pairs++;
4f774513 16834 }
6d368e53
JS
16835
16836 /* Complete initialization and perform endian conversion. */
4f774513 16837 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
895427bd 16838 bf_set(lpfc_post_sgl_pages_xricnt, sgl, post_cnt);
4f774513 16839 sgl->word0 = cpu_to_le32(sgl->word0);
895427bd 16840
4f774513
JS
16841 if (!phba->sli4_hba.intr_enable)
16842 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16843 else {
a183a15f 16844 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16845 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16846 }
16847 shdr = (union lpfc_sli4_cfg_shdr *) &sgl->cfg_shdr;
16848 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16849 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16850 if (rc != MBX_TIMEOUT)
16851 lpfc_sli4_mbox_cmd_free(phba, mbox);
16852 if (shdr_status || shdr_add_status || rc) {
16853 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16854 "2513 POST_SGL_BLOCK mailbox command failed "
16855 "status x%x add_status x%x mbx status x%x\n",
16856 shdr_status, shdr_add_status, rc);
16857 rc = -ENXIO;
16858 }
16859 return rc;
16860}
16861
16862/**
5e5b511d 16863 * lpfc_sli4_post_io_sgl_block - post a block of nvme sgl list to firmware
4f774513 16864 * @phba: pointer to lpfc hba data structure.
0794d601 16865 * @nblist: pointer to nvme buffer list.
4f774513
JS
16866 * @count: number of scsi buffers on the list.
16867 *
16868 * This routine is invoked to post a block of @count scsi sgl pages from a
0794d601 16869 * SCSI buffer list @nblist to the HBA using non-embedded mailbox command.
4f774513
JS
16870 * No Lock is held.
16871 *
16872 **/
0794d601 16873static int
5e5b511d
JS
16874lpfc_sli4_post_io_sgl_block(struct lpfc_hba *phba, struct list_head *nblist,
16875 int count)
4f774513 16876{
c490850a 16877 struct lpfc_io_buf *lpfc_ncmd;
4f774513
JS
16878 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16879 struct sgl_page_pairs *sgl_pg_pairs;
16880 void *viraddr;
16881 LPFC_MBOXQ_t *mbox;
16882 uint32_t reqlen, alloclen, pg_pairs;
16883 uint32_t mbox_tmo;
16884 uint16_t xritag_start = 0;
16885 int rc = 0;
16886 uint32_t shdr_status, shdr_add_status;
16887 dma_addr_t pdma_phys_bpl1;
16888 union lpfc_sli4_cfg_shdr *shdr;
16889
16890 /* Calculate the requested length of the dma memory */
8a9d2e80 16891 reqlen = count * sizeof(struct sgl_page_pairs) +
4f774513 16892 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16893 if (reqlen > SLI4_PAGE_SIZE) {
4f774513 16894 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
0794d601 16895 "6118 Block sgl registration required DMA "
4f774513
JS
16896 "size (%d) great than a page\n", reqlen);
16897 return -ENOMEM;
16898 }
16899 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16900 if (!mbox) {
16901 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
0794d601 16902 "6119 Failed to allocate mbox cmd memory\n");
4f774513
JS
16903 return -ENOMEM;
16904 }
16905
16906 /* Allocate DMA memory and set up the non-embedded mailbox command */
16907 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
0794d601
JS
16908 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16909 reqlen, LPFC_SLI4_MBX_NEMBED);
4f774513
JS
16910
16911 if (alloclen < reqlen) {
16912 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
0794d601 16913 "6120 Allocated DMA memory size (%d) is "
4f774513
JS
16914 "less than the requested DMA memory "
16915 "size (%d)\n", alloclen, reqlen);
16916 lpfc_sli4_mbox_cmd_free(phba, mbox);
16917 return -ENOMEM;
16918 }
6d368e53 16919
4f774513 16920 /* Get the first SGE entry from the non-embedded DMA memory */
4f774513
JS
16921 viraddr = mbox->sge_array->addr[0];
16922
16923 /* Set up the SGL pages in the non-embedded DMA pages */
16924 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16925 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16926
16927 pg_pairs = 0;
0794d601 16928 list_for_each_entry(lpfc_ncmd, nblist, list) {
4f774513
JS
16929 /* Set up the sge entry */
16930 sgl_pg_pairs->sgl_pg0_addr_lo =
0794d601 16931 cpu_to_le32(putPaddrLow(lpfc_ncmd->dma_phys_sgl));
4f774513 16932 sgl_pg_pairs->sgl_pg0_addr_hi =
0794d601 16933 cpu_to_le32(putPaddrHigh(lpfc_ncmd->dma_phys_sgl));
4f774513 16934 if (phba->cfg_sg_dma_buf_size > SGL_PAGE_SIZE)
0794d601
JS
16935 pdma_phys_bpl1 = lpfc_ncmd->dma_phys_sgl +
16936 SGL_PAGE_SIZE;
4f774513
JS
16937 else
16938 pdma_phys_bpl1 = 0;
16939 sgl_pg_pairs->sgl_pg1_addr_lo =
16940 cpu_to_le32(putPaddrLow(pdma_phys_bpl1));
16941 sgl_pg_pairs->sgl_pg1_addr_hi =
16942 cpu_to_le32(putPaddrHigh(pdma_phys_bpl1));
16943 /* Keep the first xritag on the list */
16944 if (pg_pairs == 0)
0794d601 16945 xritag_start = lpfc_ncmd->cur_iocbq.sli4_xritag;
4f774513
JS
16946 sgl_pg_pairs++;
16947 pg_pairs++;
16948 }
16949 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
16950 bf_set(lpfc_post_sgl_pages_xricnt, sgl, pg_pairs);
16951 /* Perform endian conversion if necessary */
16952 sgl->word0 = cpu_to_le32(sgl->word0);
16953
0794d601 16954 if (!phba->sli4_hba.intr_enable) {
4f774513 16955 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
0794d601 16956 } else {
a183a15f 16957 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16958 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16959 }
0794d601 16960 shdr = (union lpfc_sli4_cfg_shdr *)&sgl->cfg_shdr;
4f774513
JS
16961 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16962 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16963 if (rc != MBX_TIMEOUT)
16964 lpfc_sli4_mbox_cmd_free(phba, mbox);
16965 if (shdr_status || shdr_add_status || rc) {
16966 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
0794d601 16967 "6125 POST_SGL_BLOCK mailbox command failed "
4f774513
JS
16968 "status x%x add_status x%x mbx status x%x\n",
16969 shdr_status, shdr_add_status, rc);
16970 rc = -ENXIO;
16971 }
16972 return rc;
16973}
16974
0794d601 16975/**
5e5b511d 16976 * lpfc_sli4_post_io_sgl_list - Post blocks of nvme buffer sgls from a list
0794d601
JS
16977 * @phba: pointer to lpfc hba data structure.
16978 * @post_nblist: pointer to the nvme buffer list.
16979 *
16980 * This routine walks a list of nvme buffers that was passed in. It attempts
16981 * to construct blocks of nvme buffer sgls which contains contiguous xris and
16982 * uses the non-embedded SGL block post mailbox commands to post to the port.
16983 * For single NVME buffer sgl with non-contiguous xri, if any, it shall use
16984 * embedded SGL post mailbox command for posting. The @post_nblist passed in
16985 * must be local list, thus no lock is needed when manipulate the list.
16986 *
16987 * Returns: 0 = failure, non-zero number of successfully posted buffers.
16988 **/
16989int
5e5b511d
JS
16990lpfc_sli4_post_io_sgl_list(struct lpfc_hba *phba,
16991 struct list_head *post_nblist, int sb_count)
0794d601 16992{
c490850a 16993 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
0794d601
JS
16994 int status, sgl_size;
16995 int post_cnt = 0, block_cnt = 0, num_posting = 0, num_posted = 0;
16996 dma_addr_t pdma_phys_sgl1;
16997 int last_xritag = NO_XRI;
16998 int cur_xritag;
0794d601
JS
16999 LIST_HEAD(prep_nblist);
17000 LIST_HEAD(blck_nblist);
17001 LIST_HEAD(nvme_nblist);
17002
17003 /* sanity check */
17004 if (sb_count <= 0)
17005 return -EINVAL;
17006
17007 sgl_size = phba->cfg_sg_dma_buf_size;
17008 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, post_nblist, list) {
17009 list_del_init(&lpfc_ncmd->list);
17010 block_cnt++;
17011 if ((last_xritag != NO_XRI) &&
17012 (lpfc_ncmd->cur_iocbq.sli4_xritag != last_xritag + 1)) {
17013 /* a hole in xri block, form a sgl posting block */
17014 list_splice_init(&prep_nblist, &blck_nblist);
17015 post_cnt = block_cnt - 1;
17016 /* prepare list for next posting block */
17017 list_add_tail(&lpfc_ncmd->list, &prep_nblist);
17018 block_cnt = 1;
17019 } else {
17020 /* prepare list for next posting block */
17021 list_add_tail(&lpfc_ncmd->list, &prep_nblist);
17022 /* enough sgls for non-embed sgl mbox command */
17023 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
17024 list_splice_init(&prep_nblist, &blck_nblist);
17025 post_cnt = block_cnt;
17026 block_cnt = 0;
17027 }
17028 }
17029 num_posting++;
17030 last_xritag = lpfc_ncmd->cur_iocbq.sli4_xritag;
17031
17032 /* end of repost sgl list condition for NVME buffers */
17033 if (num_posting == sb_count) {
17034 if (post_cnt == 0) {
17035 /* last sgl posting block */
17036 list_splice_init(&prep_nblist, &blck_nblist);
17037 post_cnt = block_cnt;
17038 } else if (block_cnt == 1) {
17039 /* last single sgl with non-contiguous xri */
17040 if (sgl_size > SGL_PAGE_SIZE)
17041 pdma_phys_sgl1 =
17042 lpfc_ncmd->dma_phys_sgl +
17043 SGL_PAGE_SIZE;
17044 else
17045 pdma_phys_sgl1 = 0;
17046 cur_xritag = lpfc_ncmd->cur_iocbq.sli4_xritag;
17047 status = lpfc_sli4_post_sgl(
17048 phba, lpfc_ncmd->dma_phys_sgl,
17049 pdma_phys_sgl1, cur_xritag);
17050 if (status) {
c490850a
JS
17051 /* Post error. Buffer unavailable. */
17052 lpfc_ncmd->flags |=
17053 LPFC_SBUF_NOT_POSTED;
0794d601 17054 } else {
c490850a
JS
17055 /* Post success. Bffer available. */
17056 lpfc_ncmd->flags &=
17057 ~LPFC_SBUF_NOT_POSTED;
0794d601
JS
17058 lpfc_ncmd->status = IOSTAT_SUCCESS;
17059 num_posted++;
17060 }
17061 /* success, put on NVME buffer sgl list */
17062 list_add_tail(&lpfc_ncmd->list, &nvme_nblist);
17063 }
17064 }
17065
17066 /* continue until a nembed page worth of sgls */
17067 if (post_cnt == 0)
17068 continue;
17069
17070 /* post block of NVME buffer list sgls */
5e5b511d
JS
17071 status = lpfc_sli4_post_io_sgl_block(phba, &blck_nblist,
17072 post_cnt);
0794d601
JS
17073
17074 /* don't reset xirtag due to hole in xri block */
17075 if (block_cnt == 0)
17076 last_xritag = NO_XRI;
4f774513 17077
0794d601
JS
17078 /* reset NVME buffer post count for next round of posting */
17079 post_cnt = 0;
4f774513 17080
0794d601
JS
17081 /* put posted NVME buffer-sgl posted on NVME buffer sgl list */
17082 while (!list_empty(&blck_nblist)) {
17083 list_remove_head(&blck_nblist, lpfc_ncmd,
c490850a 17084 struct lpfc_io_buf, list);
0794d601 17085 if (status) {
c490850a
JS
17086 /* Post error. Mark buffer unavailable. */
17087 lpfc_ncmd->flags |= LPFC_SBUF_NOT_POSTED;
0794d601 17088 } else {
c490850a
JS
17089 /* Post success, Mark buffer available. */
17090 lpfc_ncmd->flags &= ~LPFC_SBUF_NOT_POSTED;
0794d601
JS
17091 lpfc_ncmd->status = IOSTAT_SUCCESS;
17092 num_posted++;
17093 }
17094 list_add_tail(&lpfc_ncmd->list, &nvme_nblist);
17095 }
4f774513 17096 }
0794d601 17097 /* Push NVME buffers with sgl posted to the available list */
5e5b511d
JS
17098 lpfc_io_buf_replenish(phba, &nvme_nblist);
17099
0794d601 17100 return num_posted;
4f774513
JS
17101}
17102
17103/**
17104 * lpfc_fc_frame_check - Check that this frame is a valid frame to handle
17105 * @phba: pointer to lpfc_hba struct that the frame was received on
17106 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17107 *
17108 * This function checks the fields in the @fc_hdr to see if the FC frame is a
17109 * valid type of frame that the LPFC driver will handle. This function will
17110 * return a zero if the frame is a valid frame or a non zero value when the
17111 * frame does not pass the check.
17112 **/
17113static int
17114lpfc_fc_frame_check(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr)
17115{
474ffb74 17116 /* make rctl_names static to save stack space */
4f774513 17117 struct fc_vft_header *fc_vft_hdr;
546fc854 17118 uint32_t *header = (uint32_t *) fc_hdr;
4f774513 17119
e62245d9
JS
17120#define FC_RCTL_MDS_DIAGS 0xF4
17121
4f774513
JS
17122 switch (fc_hdr->fh_r_ctl) {
17123 case FC_RCTL_DD_UNCAT: /* uncategorized information */
17124 case FC_RCTL_DD_SOL_DATA: /* solicited data */
17125 case FC_RCTL_DD_UNSOL_CTL: /* unsolicited control */
17126 case FC_RCTL_DD_SOL_CTL: /* solicited control or reply */
17127 case FC_RCTL_DD_UNSOL_DATA: /* unsolicited data */
17128 case FC_RCTL_DD_DATA_DESC: /* data descriptor */
17129 case FC_RCTL_DD_UNSOL_CMD: /* unsolicited command */
17130 case FC_RCTL_DD_CMD_STATUS: /* command status */
17131 case FC_RCTL_ELS_REQ: /* extended link services request */
17132 case FC_RCTL_ELS_REP: /* extended link services reply */
17133 case FC_RCTL_ELS4_REQ: /* FC-4 ELS request */
17134 case FC_RCTL_ELS4_REP: /* FC-4 ELS reply */
17135 case FC_RCTL_BA_NOP: /* basic link service NOP */
17136 case FC_RCTL_BA_ABTS: /* basic link service abort */
17137 case FC_RCTL_BA_RMC: /* remove connection */
17138 case FC_RCTL_BA_ACC: /* basic accept */
17139 case FC_RCTL_BA_RJT: /* basic reject */
17140 case FC_RCTL_BA_PRMT:
17141 case FC_RCTL_ACK_1: /* acknowledge_1 */
17142 case FC_RCTL_ACK_0: /* acknowledge_0 */
17143 case FC_RCTL_P_RJT: /* port reject */
17144 case FC_RCTL_F_RJT: /* fabric reject */
17145 case FC_RCTL_P_BSY: /* port busy */
17146 case FC_RCTL_F_BSY: /* fabric busy to data frame */
17147 case FC_RCTL_F_BSYL: /* fabric busy to link control frame */
17148 case FC_RCTL_LCR: /* link credit reset */
ae9e28f3 17149 case FC_RCTL_MDS_DIAGS: /* MDS Diagnostics */
4f774513
JS
17150 case FC_RCTL_END: /* end */
17151 break;
17152 case FC_RCTL_VFTH: /* Virtual Fabric tagging Header */
17153 fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
17154 fc_hdr = &((struct fc_frame_header *)fc_vft_hdr)[1];
17155 return lpfc_fc_frame_check(phba, fc_hdr);
17156 default:
17157 goto drop;
17158 }
ae9e28f3 17159
4f774513
JS
17160 switch (fc_hdr->fh_type) {
17161 case FC_TYPE_BLS:
17162 case FC_TYPE_ELS:
17163 case FC_TYPE_FCP:
17164 case FC_TYPE_CT:
895427bd 17165 case FC_TYPE_NVME:
4f774513
JS
17166 break;
17167 case FC_TYPE_IP:
17168 case FC_TYPE_ILS:
17169 default:
17170 goto drop;
17171 }
546fc854 17172
4f774513 17173 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
78e1d200 17174 "2538 Received frame rctl:x%x, type:x%x, "
88f43a08 17175 "frame Data:%08x %08x %08x %08x %08x %08x %08x\n",
78e1d200
JS
17176 fc_hdr->fh_r_ctl, fc_hdr->fh_type,
17177 be32_to_cpu(header[0]), be32_to_cpu(header[1]),
17178 be32_to_cpu(header[2]), be32_to_cpu(header[3]),
17179 be32_to_cpu(header[4]), be32_to_cpu(header[5]),
17180 be32_to_cpu(header[6]));
4f774513
JS
17181 return 0;
17182drop:
17183 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS,
78e1d200
JS
17184 "2539 Dropped frame rctl:x%x type:x%x\n",
17185 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
4f774513
JS
17186 return 1;
17187}
17188
17189/**
17190 * lpfc_fc_hdr_get_vfi - Get the VFI from an FC frame
17191 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17192 *
17193 * This function processes the FC header to retrieve the VFI from the VF
17194 * header, if one exists. This function will return the VFI if one exists
17195 * or 0 if no VSAN Header exists.
17196 **/
17197static uint32_t
17198lpfc_fc_hdr_get_vfi(struct fc_frame_header *fc_hdr)
17199{
17200 struct fc_vft_header *fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
17201
17202 if (fc_hdr->fh_r_ctl != FC_RCTL_VFTH)
17203 return 0;
17204 return bf_get(fc_vft_hdr_vf_id, fc_vft_hdr);
17205}
17206
17207/**
17208 * lpfc_fc_frame_to_vport - Finds the vport that a frame is destined to
17209 * @phba: Pointer to the HBA structure to search for the vport on
17210 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17211 * @fcfi: The FC Fabric ID that the frame came from
17212 *
17213 * This function searches the @phba for a vport that matches the content of the
17214 * @fc_hdr passed in and the @fcfi. This function uses the @fc_hdr to fetch the
17215 * VFI, if the Virtual Fabric Tagging Header exists, and the DID. This function
17216 * returns the matching vport pointer or NULL if unable to match frame to a
17217 * vport.
17218 **/
17219static struct lpfc_vport *
17220lpfc_fc_frame_to_vport(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr,
895427bd 17221 uint16_t fcfi, uint32_t did)
4f774513
JS
17222{
17223 struct lpfc_vport **vports;
17224 struct lpfc_vport *vport = NULL;
17225 int i;
939723a4 17226
bf08611b
JS
17227 if (did == Fabric_DID)
17228 return phba->pport;
939723a4
JS
17229 if ((phba->pport->fc_flag & FC_PT2PT) &&
17230 !(phba->link_state == LPFC_HBA_READY))
17231 return phba->pport;
17232
4f774513 17233 vports = lpfc_create_vport_work_array(phba);
895427bd 17234 if (vports != NULL) {
4f774513
JS
17235 for (i = 0; i <= phba->max_vpi && vports[i] != NULL; i++) {
17236 if (phba->fcf.fcfi == fcfi &&
17237 vports[i]->vfi == lpfc_fc_hdr_get_vfi(fc_hdr) &&
17238 vports[i]->fc_myDID == did) {
17239 vport = vports[i];
17240 break;
17241 }
17242 }
895427bd 17243 }
4f774513
JS
17244 lpfc_destroy_vport_work_array(phba, vports);
17245 return vport;
17246}
17247
45ed1190
JS
17248/**
17249 * lpfc_update_rcv_time_stamp - Update vport's rcv seq time stamp
17250 * @vport: The vport to work on.
17251 *
17252 * This function updates the receive sequence time stamp for this vport. The
17253 * receive sequence time stamp indicates the time that the last frame of the
17254 * the sequence that has been idle for the longest amount of time was received.
17255 * the driver uses this time stamp to indicate if any received sequences have
17256 * timed out.
17257 **/
5d8b8167 17258static void
45ed1190
JS
17259lpfc_update_rcv_time_stamp(struct lpfc_vport *vport)
17260{
17261 struct lpfc_dmabuf *h_buf;
17262 struct hbq_dmabuf *dmabuf = NULL;
17263
17264 /* get the oldest sequence on the rcv list */
17265 h_buf = list_get_first(&vport->rcv_buffer_list,
17266 struct lpfc_dmabuf, list);
17267 if (!h_buf)
17268 return;
17269 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17270 vport->rcv_buffer_time_stamp = dmabuf->time_stamp;
17271}
17272
17273/**
17274 * lpfc_cleanup_rcv_buffers - Cleans up all outstanding receive sequences.
17275 * @vport: The vport that the received sequences were sent to.
17276 *
17277 * This function cleans up all outstanding received sequences. This is called
17278 * by the driver when a link event or user action invalidates all the received
17279 * sequences.
17280 **/
17281void
17282lpfc_cleanup_rcv_buffers(struct lpfc_vport *vport)
17283{
17284 struct lpfc_dmabuf *h_buf, *hnext;
17285 struct lpfc_dmabuf *d_buf, *dnext;
17286 struct hbq_dmabuf *dmabuf = NULL;
17287
17288 /* start with the oldest sequence on the rcv list */
17289 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17290 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17291 list_del_init(&dmabuf->hbuf.list);
17292 list_for_each_entry_safe(d_buf, dnext,
17293 &dmabuf->dbuf.list, list) {
17294 list_del_init(&d_buf->list);
17295 lpfc_in_buf_free(vport->phba, d_buf);
17296 }
17297 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17298 }
17299}
17300
17301/**
17302 * lpfc_rcv_seq_check_edtov - Cleans up timed out receive sequences.
17303 * @vport: The vport that the received sequences were sent to.
17304 *
17305 * This function determines whether any received sequences have timed out by
17306 * first checking the vport's rcv_buffer_time_stamp. If this time_stamp
17307 * indicates that there is at least one timed out sequence this routine will
17308 * go through the received sequences one at a time from most inactive to most
17309 * active to determine which ones need to be cleaned up. Once it has determined
17310 * that a sequence needs to be cleaned up it will simply free up the resources
17311 * without sending an abort.
17312 **/
17313void
17314lpfc_rcv_seq_check_edtov(struct lpfc_vport *vport)
17315{
17316 struct lpfc_dmabuf *h_buf, *hnext;
17317 struct lpfc_dmabuf *d_buf, *dnext;
17318 struct hbq_dmabuf *dmabuf = NULL;
17319 unsigned long timeout;
17320 int abort_count = 0;
17321
17322 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17323 vport->rcv_buffer_time_stamp);
17324 if (list_empty(&vport->rcv_buffer_list) ||
17325 time_before(jiffies, timeout))
17326 return;
17327 /* start with the oldest sequence on the rcv list */
17328 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17329 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17330 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17331 dmabuf->time_stamp);
17332 if (time_before(jiffies, timeout))
17333 break;
17334 abort_count++;
17335 list_del_init(&dmabuf->hbuf.list);
17336 list_for_each_entry_safe(d_buf, dnext,
17337 &dmabuf->dbuf.list, list) {
17338 list_del_init(&d_buf->list);
17339 lpfc_in_buf_free(vport->phba, d_buf);
17340 }
17341 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17342 }
17343 if (abort_count)
17344 lpfc_update_rcv_time_stamp(vport);
17345}
17346
4f774513
JS
17347/**
17348 * lpfc_fc_frame_add - Adds a frame to the vport's list of received sequences
17349 * @dmabuf: pointer to a dmabuf that describes the hdr and data of the FC frame
17350 *
17351 * This function searches through the existing incomplete sequences that have
17352 * been sent to this @vport. If the frame matches one of the incomplete
17353 * sequences then the dbuf in the @dmabuf is added to the list of frames that
17354 * make up that sequence. If no sequence is found that matches this frame then
17355 * the function will add the hbuf in the @dmabuf to the @vport's rcv_buffer_list
17356 * This function returns a pointer to the first dmabuf in the sequence list that
17357 * the frame was linked to.
17358 **/
17359static struct hbq_dmabuf *
17360lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17361{
17362 struct fc_frame_header *new_hdr;
17363 struct fc_frame_header *temp_hdr;
17364 struct lpfc_dmabuf *d_buf;
17365 struct lpfc_dmabuf *h_buf;
17366 struct hbq_dmabuf *seq_dmabuf = NULL;
17367 struct hbq_dmabuf *temp_dmabuf = NULL;
4360ca9c 17368 uint8_t found = 0;
4f774513 17369
4d9ab994 17370 INIT_LIST_HEAD(&dmabuf->dbuf.list);
45ed1190 17371 dmabuf->time_stamp = jiffies;
4f774513 17372 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
4360ca9c 17373
4f774513
JS
17374 /* Use the hdr_buf to find the sequence that this frame belongs to */
17375 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17376 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17377 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17378 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17379 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17380 continue;
17381 /* found a pending sequence that matches this frame */
17382 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17383 break;
17384 }
17385 if (!seq_dmabuf) {
17386 /*
17387 * This indicates first frame received for this sequence.
17388 * Queue the buffer on the vport's rcv_buffer_list.
17389 */
17390 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
45ed1190 17391 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17392 return dmabuf;
17393 }
17394 temp_hdr = seq_dmabuf->hbuf.virt;
eeead811
JS
17395 if (be16_to_cpu(new_hdr->fh_seq_cnt) <
17396 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4d9ab994
JS
17397 list_del_init(&seq_dmabuf->hbuf.list);
17398 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
17399 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
45ed1190 17400 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17401 return dmabuf;
17402 }
45ed1190
JS
17403 /* move this sequence to the tail to indicate a young sequence */
17404 list_move_tail(&seq_dmabuf->hbuf.list, &vport->rcv_buffer_list);
17405 seq_dmabuf->time_stamp = jiffies;
17406 lpfc_update_rcv_time_stamp(vport);
eeead811
JS
17407 if (list_empty(&seq_dmabuf->dbuf.list)) {
17408 temp_hdr = dmabuf->hbuf.virt;
17409 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
17410 return seq_dmabuf;
17411 }
4f774513 17412 /* find the correct place in the sequence to insert this frame */
4360ca9c
JS
17413 d_buf = list_entry(seq_dmabuf->dbuf.list.prev, typeof(*d_buf), list);
17414 while (!found) {
4f774513
JS
17415 temp_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17416 temp_hdr = (struct fc_frame_header *)temp_dmabuf->hbuf.virt;
17417 /*
17418 * If the frame's sequence count is greater than the frame on
17419 * the list then insert the frame right after this frame
17420 */
eeead811
JS
17421 if (be16_to_cpu(new_hdr->fh_seq_cnt) >
17422 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4f774513 17423 list_add(&dmabuf->dbuf.list, &temp_dmabuf->dbuf.list);
4360ca9c
JS
17424 found = 1;
17425 break;
4f774513 17426 }
4360ca9c
JS
17427
17428 if (&d_buf->list == &seq_dmabuf->dbuf.list)
17429 break;
17430 d_buf = list_entry(d_buf->list.prev, typeof(*d_buf), list);
4f774513 17431 }
4360ca9c
JS
17432
17433 if (found)
17434 return seq_dmabuf;
4f774513
JS
17435 return NULL;
17436}
17437
6669f9bb
JS
17438/**
17439 * lpfc_sli4_abort_partial_seq - Abort partially assembled unsol sequence
17440 * @vport: pointer to a vitural port
17441 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17442 *
17443 * This function tries to abort from the partially assembed sequence, described
17444 * by the information from basic abbort @dmabuf. It checks to see whether such
17445 * partially assembled sequence held by the driver. If so, it shall free up all
17446 * the frames from the partially assembled sequence.
17447 *
17448 * Return
17449 * true -- if there is matching partially assembled sequence present and all
17450 * the frames freed with the sequence;
17451 * false -- if there is no matching partially assembled sequence present so
17452 * nothing got aborted in the lower layer driver
17453 **/
17454static bool
17455lpfc_sli4_abort_partial_seq(struct lpfc_vport *vport,
17456 struct hbq_dmabuf *dmabuf)
17457{
17458 struct fc_frame_header *new_hdr;
17459 struct fc_frame_header *temp_hdr;
17460 struct lpfc_dmabuf *d_buf, *n_buf, *h_buf;
17461 struct hbq_dmabuf *seq_dmabuf = NULL;
17462
17463 /* Use the hdr_buf to find the sequence that matches this frame */
17464 INIT_LIST_HEAD(&dmabuf->dbuf.list);
17465 INIT_LIST_HEAD(&dmabuf->hbuf.list);
17466 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17467 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17468 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17469 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17470 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17471 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17472 continue;
17473 /* found a pending sequence that matches this frame */
17474 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17475 break;
17476 }
17477
17478 /* Free up all the frames from the partially assembled sequence */
17479 if (seq_dmabuf) {
17480 list_for_each_entry_safe(d_buf, n_buf,
17481 &seq_dmabuf->dbuf.list, list) {
17482 list_del_init(&d_buf->list);
17483 lpfc_in_buf_free(vport->phba, d_buf);
17484 }
17485 return true;
17486 }
17487 return false;
17488}
17489
6dd9e31c
JS
17490/**
17491 * lpfc_sli4_abort_ulp_seq - Abort assembled unsol sequence from ulp
17492 * @vport: pointer to a vitural port
17493 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17494 *
17495 * This function tries to abort from the assembed sequence from upper level
17496 * protocol, described by the information from basic abbort @dmabuf. It
17497 * checks to see whether such pending context exists at upper level protocol.
17498 * If so, it shall clean up the pending context.
17499 *
17500 * Return
17501 * true -- if there is matching pending context of the sequence cleaned
17502 * at ulp;
17503 * false -- if there is no matching pending context of the sequence present
17504 * at ulp.
17505 **/
17506static bool
17507lpfc_sli4_abort_ulp_seq(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17508{
17509 struct lpfc_hba *phba = vport->phba;
17510 int handled;
17511
17512 /* Accepting abort at ulp with SLI4 only */
17513 if (phba->sli_rev < LPFC_SLI_REV4)
17514 return false;
17515
17516 /* Register all caring upper level protocols to attend abort */
17517 handled = lpfc_ct_handle_unsol_abort(phba, dmabuf);
17518 if (handled)
17519 return true;
17520
17521 return false;
17522}
17523
6669f9bb 17524/**
546fc854 17525 * lpfc_sli4_seq_abort_rsp_cmpl - BLS ABORT RSP seq abort iocb complete handler
6669f9bb
JS
17526 * @phba: Pointer to HBA context object.
17527 * @cmd_iocbq: pointer to the command iocbq structure.
17528 * @rsp_iocbq: pointer to the response iocbq structure.
17529 *
546fc854 17530 * This function handles the sequence abort response iocb command complete
6669f9bb
JS
17531 * event. It properly releases the memory allocated to the sequence abort
17532 * accept iocb.
17533 **/
17534static void
546fc854 17535lpfc_sli4_seq_abort_rsp_cmpl(struct lpfc_hba *phba,
6669f9bb
JS
17536 struct lpfc_iocbq *cmd_iocbq,
17537 struct lpfc_iocbq *rsp_iocbq)
17538{
6dd9e31c
JS
17539 struct lpfc_nodelist *ndlp;
17540
17541 if (cmd_iocbq) {
17542 ndlp = (struct lpfc_nodelist *)cmd_iocbq->context1;
17543 lpfc_nlp_put(ndlp);
17544 lpfc_nlp_not_used(ndlp);
6669f9bb 17545 lpfc_sli_release_iocbq(phba, cmd_iocbq);
6dd9e31c 17546 }
6b5151fd
JS
17547
17548 /* Failure means BLS ABORT RSP did not get delivered to remote node*/
17549 if (rsp_iocbq && rsp_iocbq->iocb.ulpStatus)
17550 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17551 "3154 BLS ABORT RSP failed, data: x%x/x%x\n",
17552 rsp_iocbq->iocb.ulpStatus,
17553 rsp_iocbq->iocb.un.ulpWord[4]);
6669f9bb
JS
17554}
17555
6d368e53
JS
17556/**
17557 * lpfc_sli4_xri_inrange - check xri is in range of xris owned by driver.
17558 * @phba: Pointer to HBA context object.
17559 * @xri: xri id in transaction.
17560 *
17561 * This function validates the xri maps to the known range of XRIs allocated an
17562 * used by the driver.
17563 **/
7851fe2c 17564uint16_t
6d368e53
JS
17565lpfc_sli4_xri_inrange(struct lpfc_hba *phba,
17566 uint16_t xri)
17567{
a2fc4aef 17568 uint16_t i;
6d368e53
JS
17569
17570 for (i = 0; i < phba->sli4_hba.max_cfg_param.max_xri; i++) {
17571 if (xri == phba->sli4_hba.xri_ids[i])
17572 return i;
17573 }
17574 return NO_XRI;
17575}
17576
6669f9bb 17577/**
546fc854 17578 * lpfc_sli4_seq_abort_rsp - bls rsp to sequence abort
6669f9bb
JS
17579 * @phba: Pointer to HBA context object.
17580 * @fc_hdr: pointer to a FC frame header.
17581 *
546fc854 17582 * This function sends a basic response to a previous unsol sequence abort
6669f9bb
JS
17583 * event after aborting the sequence handling.
17584 **/
86c67379 17585void
6dd9e31c
JS
17586lpfc_sli4_seq_abort_rsp(struct lpfc_vport *vport,
17587 struct fc_frame_header *fc_hdr, bool aborted)
6669f9bb 17588{
6dd9e31c 17589 struct lpfc_hba *phba = vport->phba;
6669f9bb
JS
17590 struct lpfc_iocbq *ctiocb = NULL;
17591 struct lpfc_nodelist *ndlp;
ee0f4fe1 17592 uint16_t oxid, rxid, xri, lxri;
5ffc266e 17593 uint32_t sid, fctl;
6669f9bb 17594 IOCB_t *icmd;
546fc854 17595 int rc;
6669f9bb
JS
17596
17597 if (!lpfc_is_link_up(phba))
17598 return;
17599
17600 sid = sli4_sid_from_fc_hdr(fc_hdr);
17601 oxid = be16_to_cpu(fc_hdr->fh_ox_id);
5ffc266e 17602 rxid = be16_to_cpu(fc_hdr->fh_rx_id);
6669f9bb 17603
6dd9e31c 17604 ndlp = lpfc_findnode_did(vport, sid);
6669f9bb 17605 if (!ndlp) {
9d3d340d 17606 ndlp = lpfc_nlp_init(vport, sid);
6dd9e31c
JS
17607 if (!ndlp) {
17608 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17609 "1268 Failed to allocate ndlp for "
17610 "oxid:x%x SID:x%x\n", oxid, sid);
17611 return;
17612 }
6dd9e31c
JS
17613 /* Put ndlp onto pport node list */
17614 lpfc_enqueue_node(vport, ndlp);
17615 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
17616 /* re-setup ndlp without removing from node list */
17617 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
17618 if (!ndlp) {
17619 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17620 "3275 Failed to active ndlp found "
17621 "for oxid:x%x SID:x%x\n", oxid, sid);
17622 return;
17623 }
6669f9bb
JS
17624 }
17625
546fc854 17626 /* Allocate buffer for rsp iocb */
6669f9bb
JS
17627 ctiocb = lpfc_sli_get_iocbq(phba);
17628 if (!ctiocb)
17629 return;
17630
5ffc266e
JS
17631 /* Extract the F_CTL field from FC_HDR */
17632 fctl = sli4_fctl_from_fc_hdr(fc_hdr);
17633
6669f9bb 17634 icmd = &ctiocb->iocb;
6669f9bb 17635 icmd->un.xseq64.bdl.bdeSize = 0;
5ffc266e 17636 icmd->un.xseq64.bdl.ulpIoTag32 = 0;
6669f9bb
JS
17637 icmd->un.xseq64.w5.hcsw.Dfctl = 0;
17638 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_ACC;
17639 icmd->un.xseq64.w5.hcsw.Type = FC_TYPE_BLS;
17640
17641 /* Fill in the rest of iocb fields */
17642 icmd->ulpCommand = CMD_XMIT_BLS_RSP64_CX;
17643 icmd->ulpBdeCount = 0;
17644 icmd->ulpLe = 1;
17645 icmd->ulpClass = CLASS3;
6d368e53 17646 icmd->ulpContext = phba->sli4_hba.rpi_ids[ndlp->nlp_rpi];
6dd9e31c 17647 ctiocb->context1 = lpfc_nlp_get(ndlp);
6669f9bb 17648
6669f9bb 17649 ctiocb->vport = phba->pport;
546fc854 17650 ctiocb->iocb_cmpl = lpfc_sli4_seq_abort_rsp_cmpl;
6d368e53 17651 ctiocb->sli4_lxritag = NO_XRI;
546fc854
JS
17652 ctiocb->sli4_xritag = NO_XRI;
17653
ee0f4fe1
JS
17654 if (fctl & FC_FC_EX_CTX)
17655 /* Exchange responder sent the abort so we
17656 * own the oxid.
17657 */
17658 xri = oxid;
17659 else
17660 xri = rxid;
17661 lxri = lpfc_sli4_xri_inrange(phba, xri);
17662 if (lxri != NO_XRI)
17663 lpfc_set_rrq_active(phba, ndlp, lxri,
17664 (xri == oxid) ? rxid : oxid, 0);
6dd9e31c
JS
17665 /* For BA_ABTS from exchange responder, if the logical xri with
17666 * the oxid maps to the FCP XRI range, the port no longer has
17667 * that exchange context, send a BLS_RJT. Override the IOCB for
17668 * a BA_RJT.
17669 */
17670 if ((fctl & FC_FC_EX_CTX) &&
895427bd 17671 (lxri > lpfc_sli4_get_iocb_cnt(phba))) {
6dd9e31c
JS
17672 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17673 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17674 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17675 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17676 }
17677
17678 /* If BA_ABTS failed to abort a partially assembled receive sequence,
17679 * the driver no longer has that exchange, send a BLS_RJT. Override
17680 * the IOCB for a BA_RJT.
546fc854 17681 */
6dd9e31c 17682 if (aborted == false) {
546fc854
JS
17683 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17684 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17685 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17686 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17687 }
6669f9bb 17688
5ffc266e
JS
17689 if (fctl & FC_FC_EX_CTX) {
17690 /* ABTS sent by responder to CT exchange, construction
17691 * of BA_ACC will use OX_ID from ABTS for the XRI_TAG
17692 * field and RX_ID from ABTS for RX_ID field.
17693 */
546fc854 17694 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_RSP);
5ffc266e
JS
17695 } else {
17696 /* ABTS sent by initiator to CT exchange, construction
17697 * of BA_ACC will need to allocate a new XRI as for the
f09c3acc 17698 * XRI_TAG field.
5ffc266e 17699 */
546fc854 17700 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_INT);
5ffc266e 17701 }
f09c3acc 17702 bf_set(lpfc_abts_rxid, &icmd->un.bls_rsp, rxid);
546fc854 17703 bf_set(lpfc_abts_oxid, &icmd->un.bls_rsp, oxid);
5ffc266e 17704
546fc854 17705 /* Xmit CT abts response on exchange <xid> */
6dd9e31c
JS
17706 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,
17707 "1200 Send BLS cmd x%x on oxid x%x Data: x%x\n",
17708 icmd->un.xseq64.w5.hcsw.Rctl, oxid, phba->link_state);
546fc854
JS
17709
17710 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, ctiocb, 0);
17711 if (rc == IOCB_ERROR) {
6dd9e31c
JS
17712 lpfc_printf_vlog(vport, KERN_ERR, LOG_ELS,
17713 "2925 Failed to issue CT ABTS RSP x%x on "
17714 "xri x%x, Data x%x\n",
17715 icmd->un.xseq64.w5.hcsw.Rctl, oxid,
17716 phba->link_state);
17717 lpfc_nlp_put(ndlp);
17718 ctiocb->context1 = NULL;
546fc854
JS
17719 lpfc_sli_release_iocbq(phba, ctiocb);
17720 }
6669f9bb
JS
17721}
17722
17723/**
17724 * lpfc_sli4_handle_unsol_abort - Handle sli-4 unsolicited abort event
17725 * @vport: Pointer to the vport on which this sequence was received
17726 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17727 *
17728 * This function handles an SLI-4 unsolicited abort event. If the unsolicited
17729 * receive sequence is only partially assembed by the driver, it shall abort
17730 * the partially assembled frames for the sequence. Otherwise, if the
17731 * unsolicited receive sequence has been completely assembled and passed to
17732 * the Upper Layer Protocol (UPL), it then mark the per oxid status for the
17733 * unsolicited sequence has been aborted. After that, it will issue a basic
17734 * accept to accept the abort.
17735 **/
5d8b8167 17736static void
6669f9bb
JS
17737lpfc_sli4_handle_unsol_abort(struct lpfc_vport *vport,
17738 struct hbq_dmabuf *dmabuf)
17739{
17740 struct lpfc_hba *phba = vport->phba;
17741 struct fc_frame_header fc_hdr;
5ffc266e 17742 uint32_t fctl;
6dd9e31c 17743 bool aborted;
6669f9bb 17744
6669f9bb
JS
17745 /* Make a copy of fc_hdr before the dmabuf being released */
17746 memcpy(&fc_hdr, dmabuf->hbuf.virt, sizeof(struct fc_frame_header));
5ffc266e 17747 fctl = sli4_fctl_from_fc_hdr(&fc_hdr);
6669f9bb 17748
5ffc266e 17749 if (fctl & FC_FC_EX_CTX) {
6dd9e31c
JS
17750 /* ABTS by responder to exchange, no cleanup needed */
17751 aborted = true;
5ffc266e 17752 } else {
6dd9e31c
JS
17753 /* ABTS by initiator to exchange, need to do cleanup */
17754 aborted = lpfc_sli4_abort_partial_seq(vport, dmabuf);
17755 if (aborted == false)
17756 aborted = lpfc_sli4_abort_ulp_seq(vport, dmabuf);
5ffc266e 17757 }
6dd9e31c
JS
17758 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17759
86c67379
JS
17760 if (phba->nvmet_support) {
17761 lpfc_nvmet_rcv_unsol_abort(vport, &fc_hdr);
17762 return;
17763 }
17764
6dd9e31c
JS
17765 /* Respond with BA_ACC or BA_RJT accordingly */
17766 lpfc_sli4_seq_abort_rsp(vport, &fc_hdr, aborted);
6669f9bb
JS
17767}
17768
4f774513
JS
17769/**
17770 * lpfc_seq_complete - Indicates if a sequence is complete
17771 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17772 *
17773 * This function checks the sequence, starting with the frame described by
17774 * @dmabuf, to see if all the frames associated with this sequence are present.
17775 * the frames associated with this sequence are linked to the @dmabuf using the
17776 * dbuf list. This function looks for two major things. 1) That the first frame
17777 * has a sequence count of zero. 2) There is a frame with last frame of sequence
17778 * set. 3) That there are no holes in the sequence count. The function will
17779 * return 1 when the sequence is complete, otherwise it will return 0.
17780 **/
17781static int
17782lpfc_seq_complete(struct hbq_dmabuf *dmabuf)
17783{
17784 struct fc_frame_header *hdr;
17785 struct lpfc_dmabuf *d_buf;
17786 struct hbq_dmabuf *seq_dmabuf;
17787 uint32_t fctl;
17788 int seq_count = 0;
17789
17790 hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17791 /* make sure first fame of sequence has a sequence count of zero */
17792 if (hdr->fh_seq_cnt != seq_count)
17793 return 0;
17794 fctl = (hdr->fh_f_ctl[0] << 16 |
17795 hdr->fh_f_ctl[1] << 8 |
17796 hdr->fh_f_ctl[2]);
17797 /* If last frame of sequence we can return success. */
17798 if (fctl & FC_FC_END_SEQ)
17799 return 1;
17800 list_for_each_entry(d_buf, &dmabuf->dbuf.list, list) {
17801 seq_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17802 hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17803 /* If there is a hole in the sequence count then fail. */
eeead811 17804 if (++seq_count != be16_to_cpu(hdr->fh_seq_cnt))
4f774513
JS
17805 return 0;
17806 fctl = (hdr->fh_f_ctl[0] << 16 |
17807 hdr->fh_f_ctl[1] << 8 |
17808 hdr->fh_f_ctl[2]);
17809 /* If last frame of sequence we can return success. */
17810 if (fctl & FC_FC_END_SEQ)
17811 return 1;
17812 }
17813 return 0;
17814}
17815
17816/**
17817 * lpfc_prep_seq - Prep sequence for ULP processing
17818 * @vport: Pointer to the vport on which this sequence was received
17819 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17820 *
17821 * This function takes a sequence, described by a list of frames, and creates
17822 * a list of iocbq structures to describe the sequence. This iocbq list will be
17823 * used to issue to the generic unsolicited sequence handler. This routine
17824 * returns a pointer to the first iocbq in the list. If the function is unable
17825 * to allocate an iocbq then it throw out the received frames that were not
17826 * able to be described and return a pointer to the first iocbq. If unable to
17827 * allocate any iocbqs (including the first) this function will return NULL.
17828 **/
17829static struct lpfc_iocbq *
17830lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
17831{
7851fe2c 17832 struct hbq_dmabuf *hbq_buf;
4f774513
JS
17833 struct lpfc_dmabuf *d_buf, *n_buf;
17834 struct lpfc_iocbq *first_iocbq, *iocbq;
17835 struct fc_frame_header *fc_hdr;
17836 uint32_t sid;
7851fe2c 17837 uint32_t len, tot_len;
eeead811 17838 struct ulp_bde64 *pbde;
4f774513
JS
17839
17840 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17841 /* remove from receive buffer list */
17842 list_del_init(&seq_dmabuf->hbuf.list);
45ed1190 17843 lpfc_update_rcv_time_stamp(vport);
4f774513 17844 /* get the Remote Port's SID */
6669f9bb 17845 sid = sli4_sid_from_fc_hdr(fc_hdr);
7851fe2c 17846 tot_len = 0;
4f774513
JS
17847 /* Get an iocbq struct to fill in. */
17848 first_iocbq = lpfc_sli_get_iocbq(vport->phba);
17849 if (first_iocbq) {
17850 /* Initialize the first IOCB. */
8fa38513 17851 first_iocbq->iocb.unsli3.rcvsli3.acc_len = 0;
4f774513 17852 first_iocbq->iocb.ulpStatus = IOSTAT_SUCCESS;
895427bd 17853 first_iocbq->vport = vport;
939723a4
JS
17854
17855 /* Check FC Header to see what TYPE of frame we are rcv'ing */
17856 if (sli4_type_from_fc_hdr(fc_hdr) == FC_TYPE_ELS) {
17857 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_ELS64_CX;
17858 first_iocbq->iocb.un.rcvels.parmRo =
17859 sli4_did_from_fc_hdr(fc_hdr);
17860 first_iocbq->iocb.ulpPU = PARM_NPIV_DID;
17861 } else
17862 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_SEQ64_CX;
7851fe2c
JS
17863 first_iocbq->iocb.ulpContext = NO_XRI;
17864 first_iocbq->iocb.unsli3.rcvsli3.ox_id =
17865 be16_to_cpu(fc_hdr->fh_ox_id);
17866 /* iocbq is prepped for internal consumption. Physical vpi. */
17867 first_iocbq->iocb.unsli3.rcvsli3.vpi =
17868 vport->phba->vpi_ids[vport->vpi];
4f774513 17869 /* put the first buffer into the first IOCBq */
48a5a664
JS
17870 tot_len = bf_get(lpfc_rcqe_length,
17871 &seq_dmabuf->cq_event.cqe.rcqe_cmpl);
17872
4f774513
JS
17873 first_iocbq->context2 = &seq_dmabuf->dbuf;
17874 first_iocbq->context3 = NULL;
17875 first_iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17876 if (tot_len > LPFC_DATA_BUF_SIZE)
17877 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17878 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17879 else
17880 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize = tot_len;
17881
4f774513 17882 first_iocbq->iocb.un.rcvels.remoteID = sid;
48a5a664 17883
7851fe2c 17884 first_iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
4f774513
JS
17885 }
17886 iocbq = first_iocbq;
17887 /*
17888 * Each IOCBq can have two Buffers assigned, so go through the list
17889 * of buffers for this sequence and save two buffers in each IOCBq
17890 */
17891 list_for_each_entry_safe(d_buf, n_buf, &seq_dmabuf->dbuf.list, list) {
17892 if (!iocbq) {
17893 lpfc_in_buf_free(vport->phba, d_buf);
17894 continue;
17895 }
17896 if (!iocbq->context3) {
17897 iocbq->context3 = d_buf;
17898 iocbq->iocb.ulpBdeCount++;
7851fe2c
JS
17899 /* We need to get the size out of the right CQE */
17900 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17901 len = bf_get(lpfc_rcqe_length,
17902 &hbq_buf->cq_event.cqe.rcqe_cmpl);
48a5a664
JS
17903 pbde = (struct ulp_bde64 *)
17904 &iocbq->iocb.unsli3.sli3Words[4];
17905 if (len > LPFC_DATA_BUF_SIZE)
17906 pbde->tus.f.bdeSize = LPFC_DATA_BUF_SIZE;
17907 else
17908 pbde->tus.f.bdeSize = len;
17909
7851fe2c
JS
17910 iocbq->iocb.unsli3.rcvsli3.acc_len += len;
17911 tot_len += len;
4f774513
JS
17912 } else {
17913 iocbq = lpfc_sli_get_iocbq(vport->phba);
17914 if (!iocbq) {
17915 if (first_iocbq) {
17916 first_iocbq->iocb.ulpStatus =
17917 IOSTAT_FCP_RSP_ERROR;
17918 first_iocbq->iocb.un.ulpWord[4] =
17919 IOERR_NO_RESOURCES;
17920 }
17921 lpfc_in_buf_free(vport->phba, d_buf);
17922 continue;
17923 }
48a5a664
JS
17924 /* We need to get the size out of the right CQE */
17925 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17926 len = bf_get(lpfc_rcqe_length,
17927 &hbq_buf->cq_event.cqe.rcqe_cmpl);
4f774513
JS
17928 iocbq->context2 = d_buf;
17929 iocbq->context3 = NULL;
17930 iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17931 if (len > LPFC_DATA_BUF_SIZE)
17932 iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17933 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17934 else
17935 iocbq->iocb.un.cont64[0].tus.f.bdeSize = len;
7851fe2c 17936
7851fe2c
JS
17937 tot_len += len;
17938 iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
17939
4f774513
JS
17940 iocbq->iocb.un.rcvels.remoteID = sid;
17941 list_add_tail(&iocbq->list, &first_iocbq->list);
17942 }
17943 }
17944 return first_iocbq;
17945}
17946
6669f9bb
JS
17947static void
17948lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *vport,
17949 struct hbq_dmabuf *seq_dmabuf)
17950{
17951 struct fc_frame_header *fc_hdr;
17952 struct lpfc_iocbq *iocbq, *curr_iocb, *next_iocb;
17953 struct lpfc_hba *phba = vport->phba;
17954
17955 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17956 iocbq = lpfc_prep_seq(vport, seq_dmabuf);
17957 if (!iocbq) {
17958 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17959 "2707 Ring %d handler: Failed to allocate "
17960 "iocb Rctl x%x Type x%x received\n",
17961 LPFC_ELS_RING,
17962 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17963 return;
17964 }
17965 if (!lpfc_complete_unsol_iocb(phba,
895427bd 17966 phba->sli4_hba.els_wq->pring,
6669f9bb
JS
17967 iocbq, fc_hdr->fh_r_ctl,
17968 fc_hdr->fh_type))
6d368e53 17969 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6669f9bb
JS
17970 "2540 Ring %d handler: unexpected Rctl "
17971 "x%x Type x%x received\n",
17972 LPFC_ELS_RING,
17973 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17974
17975 /* Free iocb created in lpfc_prep_seq */
17976 list_for_each_entry_safe(curr_iocb, next_iocb,
17977 &iocbq->list, list) {
17978 list_del_init(&curr_iocb->list);
17979 lpfc_sli_release_iocbq(phba, curr_iocb);
17980 }
17981 lpfc_sli_release_iocbq(phba, iocbq);
17982}
17983
ae9e28f3
JS
17984static void
17985lpfc_sli4_mds_loopback_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
17986 struct lpfc_iocbq *rspiocb)
17987{
17988 struct lpfc_dmabuf *pcmd = cmdiocb->context2;
17989
17990 if (pcmd && pcmd->virt)
771db5c0 17991 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3
JS
17992 kfree(pcmd);
17993 lpfc_sli_release_iocbq(phba, cmdiocb);
e817e5d7 17994 lpfc_drain_txq(phba);
ae9e28f3
JS
17995}
17996
17997static void
17998lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
17999 struct hbq_dmabuf *dmabuf)
18000{
18001 struct fc_frame_header *fc_hdr;
18002 struct lpfc_hba *phba = vport->phba;
18003 struct lpfc_iocbq *iocbq = NULL;
18004 union lpfc_wqe *wqe;
18005 struct lpfc_dmabuf *pcmd = NULL;
18006 uint32_t frame_len;
18007 int rc;
e817e5d7 18008 unsigned long iflags;
ae9e28f3
JS
18009
18010 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
18011 frame_len = bf_get(lpfc_rcqe_length, &dmabuf->cq_event.cqe.rcqe_cmpl);
18012
18013 /* Send the received frame back */
18014 iocbq = lpfc_sli_get_iocbq(phba);
e817e5d7
JS
18015 if (!iocbq) {
18016 /* Queue cq event and wakeup worker thread to process it */
18017 spin_lock_irqsave(&phba->hbalock, iflags);
18018 list_add_tail(&dmabuf->cq_event.list,
18019 &phba->sli4_hba.sp_queue_event);
18020 phba->hba_flag |= HBA_SP_QUEUE_EVT;
18021 spin_unlock_irqrestore(&phba->hbalock, iflags);
18022 lpfc_worker_wake_up(phba);
18023 return;
18024 }
ae9e28f3
JS
18025
18026 /* Allocate buffer for command payload */
18027 pcmd = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
18028 if (pcmd)
771db5c0 18029 pcmd->virt = dma_pool_alloc(phba->lpfc_drb_pool, GFP_KERNEL,
ae9e28f3
JS
18030 &pcmd->phys);
18031 if (!pcmd || !pcmd->virt)
18032 goto exit;
18033
18034 INIT_LIST_HEAD(&pcmd->list);
18035
18036 /* copyin the payload */
18037 memcpy(pcmd->virt, dmabuf->dbuf.virt, frame_len);
18038
18039 /* fill in BDE's for command */
18040 iocbq->iocb.un.xseq64.bdl.addrHigh = putPaddrHigh(pcmd->phys);
18041 iocbq->iocb.un.xseq64.bdl.addrLow = putPaddrLow(pcmd->phys);
18042 iocbq->iocb.un.xseq64.bdl.bdeFlags = BUFF_TYPE_BDE_64;
18043 iocbq->iocb.un.xseq64.bdl.bdeSize = frame_len;
18044
18045 iocbq->context2 = pcmd;
18046 iocbq->vport = vport;
18047 iocbq->iocb_flag &= ~LPFC_FIP_ELS_ID_MASK;
18048 iocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
18049
18050 /*
18051 * Setup rest of the iocb as though it were a WQE
18052 * Build the SEND_FRAME WQE
18053 */
18054 wqe = (union lpfc_wqe *)&iocbq->iocb;
18055
18056 wqe->send_frame.frame_len = frame_len;
18057 wqe->send_frame.fc_hdr_wd0 = be32_to_cpu(*((uint32_t *)fc_hdr));
18058 wqe->send_frame.fc_hdr_wd1 = be32_to_cpu(*((uint32_t *)fc_hdr + 1));
18059 wqe->send_frame.fc_hdr_wd2 = be32_to_cpu(*((uint32_t *)fc_hdr + 2));
18060 wqe->send_frame.fc_hdr_wd3 = be32_to_cpu(*((uint32_t *)fc_hdr + 3));
18061 wqe->send_frame.fc_hdr_wd4 = be32_to_cpu(*((uint32_t *)fc_hdr + 4));
18062 wqe->send_frame.fc_hdr_wd5 = be32_to_cpu(*((uint32_t *)fc_hdr + 5));
18063
18064 iocbq->iocb.ulpCommand = CMD_SEND_FRAME;
18065 iocbq->iocb.ulpLe = 1;
18066 iocbq->iocb_cmpl = lpfc_sli4_mds_loopback_cmpl;
18067 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, iocbq, 0);
18068 if (rc == IOCB_ERROR)
18069 goto exit;
18070
18071 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18072 return;
18073
18074exit:
18075 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
18076 "2023 Unable to process MDS loopback frame\n");
18077 if (pcmd && pcmd->virt)
771db5c0 18078 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3 18079 kfree(pcmd);
401bb416
DK
18080 if (iocbq)
18081 lpfc_sli_release_iocbq(phba, iocbq);
ae9e28f3
JS
18082 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18083}
18084
4f774513
JS
18085/**
18086 * lpfc_sli4_handle_received_buffer - Handle received buffers from firmware
18087 * @phba: Pointer to HBA context object.
18088 *
18089 * This function is called with no lock held. This function processes all
18090 * the received buffers and gives it to upper layers when a received buffer
18091 * indicates that it is the final frame in the sequence. The interrupt
895427bd 18092 * service routine processes received buffers at interrupt contexts.
4f774513
JS
18093 * Worker thread calls lpfc_sli4_handle_received_buffer, which will call the
18094 * appropriate receive function when the final frame in a sequence is received.
18095 **/
4d9ab994
JS
18096void
18097lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,
18098 struct hbq_dmabuf *dmabuf)
4f774513 18099{
4d9ab994 18100 struct hbq_dmabuf *seq_dmabuf;
4f774513
JS
18101 struct fc_frame_header *fc_hdr;
18102 struct lpfc_vport *vport;
18103 uint32_t fcfi;
939723a4 18104 uint32_t did;
4f774513 18105
4f774513 18106 /* Process each received buffer */
4d9ab994 18107 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
2ea259ee 18108
e817e5d7
JS
18109 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
18110 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
18111 vport = phba->pport;
18112 /* Handle MDS Loopback frames */
18113 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
18114 return;
18115 }
18116
4d9ab994
JS
18117 /* check to see if this a valid type of frame */
18118 if (lpfc_fc_frame_check(phba, fc_hdr)) {
18119 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18120 return;
18121 }
2ea259ee 18122
7851fe2c
JS
18123 if ((bf_get(lpfc_cqe_code,
18124 &dmabuf->cq_event.cqe.rcqe_cmpl) == CQE_CODE_RECEIVE_V1))
18125 fcfi = bf_get(lpfc_rcqe_fcf_id_v1,
18126 &dmabuf->cq_event.cqe.rcqe_cmpl);
18127 else
18128 fcfi = bf_get(lpfc_rcqe_fcf_id,
18129 &dmabuf->cq_event.cqe.rcqe_cmpl);
939723a4 18130
e62245d9
JS
18131 if (fc_hdr->fh_r_ctl == 0xF4 && fc_hdr->fh_type == 0xFF) {
18132 vport = phba->pport;
18133 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
18134 "2023 MDS Loopback %d bytes\n",
18135 bf_get(lpfc_rcqe_length,
18136 &dmabuf->cq_event.cqe.rcqe_cmpl));
18137 /* Handle MDS Loopback frames */
18138 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
18139 return;
18140 }
18141
895427bd
JS
18142 /* d_id this frame is directed to */
18143 did = sli4_did_from_fc_hdr(fc_hdr);
18144
18145 vport = lpfc_fc_frame_to_vport(phba, fc_hdr, fcfi, did);
939723a4 18146 if (!vport) {
4d9ab994
JS
18147 /* throw out the frame */
18148 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18149 return;
18150 }
939723a4 18151
939723a4
JS
18152 /* vport is registered unless we rcv a FLOGI directed to Fabric_DID */
18153 if (!(vport->vpi_state & LPFC_VPI_REGISTERED) &&
18154 (did != Fabric_DID)) {
18155 /*
18156 * Throw out the frame if we are not pt2pt.
18157 * The pt2pt protocol allows for discovery frames
18158 * to be received without a registered VPI.
18159 */
18160 if (!(vport->fc_flag & FC_PT2PT) ||
18161 (phba->link_state == LPFC_HBA_READY)) {
18162 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18163 return;
18164 }
18165 }
18166
6669f9bb
JS
18167 /* Handle the basic abort sequence (BA_ABTS) event */
18168 if (fc_hdr->fh_r_ctl == FC_RCTL_BA_ABTS) {
18169 lpfc_sli4_handle_unsol_abort(vport, dmabuf);
18170 return;
18171 }
18172
4d9ab994
JS
18173 /* Link this frame */
18174 seq_dmabuf = lpfc_fc_frame_add(vport, dmabuf);
18175 if (!seq_dmabuf) {
18176 /* unable to add frame to vport - throw it out */
18177 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18178 return;
18179 }
18180 /* If not last frame in sequence continue processing frames. */
def9c7a9 18181 if (!lpfc_seq_complete(seq_dmabuf))
4d9ab994 18182 return;
def9c7a9 18183
6669f9bb
JS
18184 /* Send the complete sequence to the upper layer protocol */
18185 lpfc_sli4_send_seq_to_ulp(vport, seq_dmabuf);
4f774513 18186}
6fb120a7
JS
18187
18188/**
18189 * lpfc_sli4_post_all_rpi_hdrs - Post the rpi header memory region to the port
18190 * @phba: pointer to lpfc hba data structure.
18191 *
18192 * This routine is invoked to post rpi header templates to the
18193 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18194 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18195 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18196 *
18197 * This routine does not require any locks. It's usage is expected
18198 * to be driver load or reset recovery when the driver is
18199 * sequential.
18200 *
18201 * Return codes
af901ca1 18202 * 0 - successful
d439d286 18203 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18204 * When this error occurs, the driver is not guaranteed
18205 * to have any rpi regions posted to the device and
18206 * must either attempt to repost the regions or take a
18207 * fatal error.
18208 **/
18209int
18210lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *phba)
18211{
18212 struct lpfc_rpi_hdr *rpi_page;
18213 uint32_t rc = 0;
6d368e53
JS
18214 uint16_t lrpi = 0;
18215
18216 /* SLI4 ports that support extents do not require RPI headers. */
18217 if (!phba->sli4_hba.rpi_hdrs_in_use)
18218 goto exit;
18219 if (phba->sli4_hba.extents_in_use)
18220 return -EIO;
6fb120a7 18221
6fb120a7 18222 list_for_each_entry(rpi_page, &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6d368e53
JS
18223 /*
18224 * Assign the rpi headers a physical rpi only if the driver
18225 * has not initialized those resources. A port reset only
18226 * needs the headers posted.
18227 */
18228 if (bf_get(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags) !=
18229 LPFC_RPI_RSRC_RDY)
18230 rpi_page->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
18231
6fb120a7
JS
18232 rc = lpfc_sli4_post_rpi_hdr(phba, rpi_page);
18233 if (rc != MBX_SUCCESS) {
18234 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18235 "2008 Error %d posting all rpi "
18236 "headers\n", rc);
18237 rc = -EIO;
18238 break;
18239 }
18240 }
18241
6d368e53
JS
18242 exit:
18243 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags,
18244 LPFC_RPI_RSRC_RDY);
6fb120a7
JS
18245 return rc;
18246}
18247
18248/**
18249 * lpfc_sli4_post_rpi_hdr - Post an rpi header memory region to the port
18250 * @phba: pointer to lpfc hba data structure.
18251 * @rpi_page: pointer to the rpi memory region.
18252 *
18253 * This routine is invoked to post a single rpi header to the
18254 * HBA consistent with the SLI-4 interface spec. This memory region
18255 * maps up to 64 rpi context regions.
18256 *
18257 * Return codes
af901ca1 18258 * 0 - successful
d439d286
JS
18259 * -ENOMEM - No available memory
18260 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18261 **/
18262int
18263lpfc_sli4_post_rpi_hdr(struct lpfc_hba *phba, struct lpfc_rpi_hdr *rpi_page)
18264{
18265 LPFC_MBOXQ_t *mboxq;
18266 struct lpfc_mbx_post_hdr_tmpl *hdr_tmpl;
18267 uint32_t rc = 0;
6fb120a7
JS
18268 uint32_t shdr_status, shdr_add_status;
18269 union lpfc_sli4_cfg_shdr *shdr;
18270
6d368e53
JS
18271 /* SLI4 ports that support extents do not require RPI headers. */
18272 if (!phba->sli4_hba.rpi_hdrs_in_use)
18273 return rc;
18274 if (phba->sli4_hba.extents_in_use)
18275 return -EIO;
18276
6fb120a7
JS
18277 /* The port is notified of the header region via a mailbox command. */
18278 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18279 if (!mboxq) {
18280 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18281 "2001 Unable to allocate memory for issuing "
18282 "SLI_CONFIG_SPECIAL mailbox command\n");
18283 return -ENOMEM;
18284 }
18285
18286 /* Post all rpi memory regions to the port. */
18287 hdr_tmpl = &mboxq->u.mqe.un.hdr_tmpl;
6fb120a7
JS
18288 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18289 LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE,
18290 sizeof(struct lpfc_mbx_post_hdr_tmpl) -
fedd3b7b
JS
18291 sizeof(struct lpfc_sli4_cfg_mhdr),
18292 LPFC_SLI4_MBX_EMBED);
6d368e53
JS
18293
18294
18295 /* Post the physical rpi to the port for this rpi header. */
6fb120a7
JS
18296 bf_set(lpfc_mbx_post_hdr_tmpl_rpi_offset, hdr_tmpl,
18297 rpi_page->start_rpi);
6d368e53
JS
18298 bf_set(lpfc_mbx_post_hdr_tmpl_page_cnt,
18299 hdr_tmpl, rpi_page->page_count);
18300
6fb120a7
JS
18301 hdr_tmpl->rpi_paddr_lo = putPaddrLow(rpi_page->dmabuf->phys);
18302 hdr_tmpl->rpi_paddr_hi = putPaddrHigh(rpi_page->dmabuf->phys);
f1126688 18303 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6fb120a7
JS
18304 shdr = (union lpfc_sli4_cfg_shdr *) &hdr_tmpl->header.cfg_shdr;
18305 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18306 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18307 if (rc != MBX_TIMEOUT)
18308 mempool_free(mboxq, phba->mbox_mem_pool);
18309 if (shdr_status || shdr_add_status || rc) {
18310 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18311 "2514 POST_RPI_HDR mailbox failed with "
18312 "status x%x add_status x%x, mbx status x%x\n",
18313 shdr_status, shdr_add_status, rc);
18314 rc = -ENXIO;
845d9e8d
JS
18315 } else {
18316 /*
18317 * The next_rpi stores the next logical module-64 rpi value used
18318 * to post physical rpis in subsequent rpi postings.
18319 */
18320 spin_lock_irq(&phba->hbalock);
18321 phba->sli4_hba.next_rpi = rpi_page->next_rpi;
18322 spin_unlock_irq(&phba->hbalock);
6fb120a7
JS
18323 }
18324 return rc;
18325}
18326
18327/**
18328 * lpfc_sli4_alloc_rpi - Get an available rpi in the device's range
18329 * @phba: pointer to lpfc hba data structure.
18330 *
18331 * This routine is invoked to post rpi header templates to the
18332 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18333 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18334 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18335 *
18336 * Returns
af901ca1 18337 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
6fb120a7
JS
18338 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
18339 **/
18340int
18341lpfc_sli4_alloc_rpi(struct lpfc_hba *phba)
18342{
6d368e53
JS
18343 unsigned long rpi;
18344 uint16_t max_rpi, rpi_limit;
18345 uint16_t rpi_remaining, lrpi = 0;
6fb120a7 18346 struct lpfc_rpi_hdr *rpi_hdr;
4902b381 18347 unsigned long iflag;
6fb120a7 18348
6fb120a7 18349 /*
6d368e53
JS
18350 * Fetch the next logical rpi. Because this index is logical,
18351 * the driver starts at 0 each time.
6fb120a7 18352 */
4902b381 18353 spin_lock_irqsave(&phba->hbalock, iflag);
be6bb941
JS
18354 max_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
18355 rpi_limit = phba->sli4_hba.next_rpi;
18356
6d368e53
JS
18357 rpi = find_next_zero_bit(phba->sli4_hba.rpi_bmask, rpi_limit, 0);
18358 if (rpi >= rpi_limit)
6fb120a7
JS
18359 rpi = LPFC_RPI_ALLOC_ERROR;
18360 else {
18361 set_bit(rpi, phba->sli4_hba.rpi_bmask);
18362 phba->sli4_hba.max_cfg_param.rpi_used++;
18363 phba->sli4_hba.rpi_count++;
18364 }
0f154226
JS
18365 lpfc_printf_log(phba, KERN_INFO,
18366 LOG_NODE | LOG_DISCOVERY,
18367 "0001 Allocated rpi:x%x max:x%x lim:x%x\n",
be6bb941 18368 (int) rpi, max_rpi, rpi_limit);
6fb120a7
JS
18369
18370 /*
18371 * Don't try to allocate more rpi header regions if the device limit
6d368e53 18372 * has been exhausted.
6fb120a7
JS
18373 */
18374 if ((rpi == LPFC_RPI_ALLOC_ERROR) &&
18375 (phba->sli4_hba.rpi_count >= max_rpi)) {
4902b381 18376 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18377 return rpi;
18378 }
18379
6d368e53
JS
18380 /*
18381 * RPI header postings are not required for SLI4 ports capable of
18382 * extents.
18383 */
18384 if (!phba->sli4_hba.rpi_hdrs_in_use) {
4902b381 18385 spin_unlock_irqrestore(&phba->hbalock, iflag);
6d368e53
JS
18386 return rpi;
18387 }
18388
6fb120a7
JS
18389 /*
18390 * If the driver is running low on rpi resources, allocate another
18391 * page now. Note that the next_rpi value is used because
18392 * it represents how many are actually in use whereas max_rpi notes
18393 * how many are supported max by the device.
18394 */
6d368e53 18395 rpi_remaining = phba->sli4_hba.next_rpi - phba->sli4_hba.rpi_count;
4902b381 18396 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18397 if (rpi_remaining < LPFC_RPI_LOW_WATER_MARK) {
18398 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
18399 if (!rpi_hdr) {
18400 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18401 "2002 Error Could not grow rpi "
18402 "count\n");
18403 } else {
6d368e53
JS
18404 lrpi = rpi_hdr->start_rpi;
18405 rpi_hdr->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
6fb120a7
JS
18406 lpfc_sli4_post_rpi_hdr(phba, rpi_hdr);
18407 }
18408 }
18409
18410 return rpi;
18411}
18412
d7c47992
JS
18413/**
18414 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18415 * @phba: pointer to lpfc hba data structure.
18416 *
18417 * This routine is invoked to release an rpi to the pool of
18418 * available rpis maintained by the driver.
18419 **/
5d8b8167 18420static void
d7c47992
JS
18421__lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18422{
7cfd5639
JS
18423 /*
18424 * if the rpi value indicates a prior unreg has already
18425 * been done, skip the unreg.
18426 */
18427 if (rpi == LPFC_RPI_ALLOC_ERROR)
18428 return;
18429
d7c47992
JS
18430 if (test_and_clear_bit(rpi, phba->sli4_hba.rpi_bmask)) {
18431 phba->sli4_hba.rpi_count--;
18432 phba->sli4_hba.max_cfg_param.rpi_used--;
b95b2119 18433 } else {
0f154226
JS
18434 lpfc_printf_log(phba, KERN_INFO,
18435 LOG_NODE | LOG_DISCOVERY,
b95b2119
JS
18436 "2016 rpi %x not inuse\n",
18437 rpi);
d7c47992
JS
18438 }
18439}
18440
6fb120a7
JS
18441/**
18442 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18443 * @phba: pointer to lpfc hba data structure.
18444 *
18445 * This routine is invoked to release an rpi to the pool of
18446 * available rpis maintained by the driver.
18447 **/
18448void
18449lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18450{
18451 spin_lock_irq(&phba->hbalock);
d7c47992 18452 __lpfc_sli4_free_rpi(phba, rpi);
6fb120a7
JS
18453 spin_unlock_irq(&phba->hbalock);
18454}
18455
18456/**
18457 * lpfc_sli4_remove_rpis - Remove the rpi bitmask region
18458 * @phba: pointer to lpfc hba data structure.
18459 *
18460 * This routine is invoked to remove the memory region that
18461 * provided rpi via a bitmask.
18462 **/
18463void
18464lpfc_sli4_remove_rpis(struct lpfc_hba *phba)
18465{
18466 kfree(phba->sli4_hba.rpi_bmask);
6d368e53
JS
18467 kfree(phba->sli4_hba.rpi_ids);
18468 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6fb120a7
JS
18469}
18470
18471/**
18472 * lpfc_sli4_resume_rpi - Remove the rpi bitmask region
18473 * @phba: pointer to lpfc hba data structure.
18474 *
18475 * This routine is invoked to remove the memory region that
18476 * provided rpi via a bitmask.
18477 **/
18478int
6b5151fd
JS
18479lpfc_sli4_resume_rpi(struct lpfc_nodelist *ndlp,
18480 void (*cmpl)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *arg)
6fb120a7
JS
18481{
18482 LPFC_MBOXQ_t *mboxq;
18483 struct lpfc_hba *phba = ndlp->phba;
18484 int rc;
18485
18486 /* The port is notified of the header region via a mailbox command. */
18487 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18488 if (!mboxq)
18489 return -ENOMEM;
18490
18491 /* Post all rpi memory regions to the port. */
18492 lpfc_resume_rpi(mboxq, ndlp);
6b5151fd
JS
18493 if (cmpl) {
18494 mboxq->mbox_cmpl = cmpl;
3e1f0718
JS
18495 mboxq->ctx_buf = arg;
18496 mboxq->ctx_ndlp = ndlp;
72859909
JS
18497 } else
18498 mboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6b5151fd 18499 mboxq->vport = ndlp->vport;
6fb120a7
JS
18500 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18501 if (rc == MBX_NOT_FINISHED) {
18502 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18503 "2010 Resume RPI Mailbox failed "
18504 "status %d, mbxStatus x%x\n", rc,
18505 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
18506 mempool_free(mboxq, phba->mbox_mem_pool);
18507 return -EIO;
18508 }
18509 return 0;
18510}
18511
18512/**
18513 * lpfc_sli4_init_vpi - Initialize a vpi with the port
76a95d75 18514 * @vport: Pointer to the vport for which the vpi is being initialized
6fb120a7 18515 *
76a95d75 18516 * This routine is invoked to activate a vpi with the port.
6fb120a7
JS
18517 *
18518 * Returns:
18519 * 0 success
18520 * -Evalue otherwise
18521 **/
18522int
76a95d75 18523lpfc_sli4_init_vpi(struct lpfc_vport *vport)
6fb120a7
JS
18524{
18525 LPFC_MBOXQ_t *mboxq;
18526 int rc = 0;
6a9c52cf 18527 int retval = MBX_SUCCESS;
6fb120a7 18528 uint32_t mbox_tmo;
76a95d75 18529 struct lpfc_hba *phba = vport->phba;
6fb120a7
JS
18530 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18531 if (!mboxq)
18532 return -ENOMEM;
76a95d75 18533 lpfc_init_vpi(phba, mboxq, vport->vpi);
a183a15f 18534 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
6fb120a7 18535 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
6fb120a7 18536 if (rc != MBX_SUCCESS) {
76a95d75 18537 lpfc_printf_vlog(vport, KERN_ERR, LOG_SLI,
6fb120a7
JS
18538 "2022 INIT VPI Mailbox failed "
18539 "status %d, mbxStatus x%x\n", rc,
18540 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
6a9c52cf 18541 retval = -EIO;
6fb120a7 18542 }
6a9c52cf 18543 if (rc != MBX_TIMEOUT)
76a95d75 18544 mempool_free(mboxq, vport->phba->mbox_mem_pool);
6a9c52cf
JS
18545
18546 return retval;
6fb120a7
JS
18547}
18548
18549/**
18550 * lpfc_mbx_cmpl_add_fcf_record - add fcf mbox completion handler.
18551 * @phba: pointer to lpfc hba data structure.
18552 * @mboxq: Pointer to mailbox object.
18553 *
18554 * This routine is invoked to manually add a single FCF record. The caller
18555 * must pass a completely initialized FCF_Record. This routine takes
18556 * care of the nonembedded mailbox operations.
18557 **/
18558static void
18559lpfc_mbx_cmpl_add_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
18560{
18561 void *virt_addr;
18562 union lpfc_sli4_cfg_shdr *shdr;
18563 uint32_t shdr_status, shdr_add_status;
18564
18565 virt_addr = mboxq->sge_array->addr[0];
18566 /* The IOCTL status is embedded in the mailbox subheader. */
18567 shdr = (union lpfc_sli4_cfg_shdr *) virt_addr;
18568 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18569 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18570
18571 if ((shdr_status || shdr_add_status) &&
18572 (shdr_status != STATUS_FCF_IN_USE))
18573 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18574 "2558 ADD_FCF_RECORD mailbox failed with "
18575 "status x%x add_status x%x\n",
18576 shdr_status, shdr_add_status);
18577
18578 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18579}
18580
18581/**
18582 * lpfc_sli4_add_fcf_record - Manually add an FCF Record.
18583 * @phba: pointer to lpfc hba data structure.
18584 * @fcf_record: pointer to the initialized fcf record to add.
18585 *
18586 * This routine is invoked to manually add a single FCF record. The caller
18587 * must pass a completely initialized FCF_Record. This routine takes
18588 * care of the nonembedded mailbox operations.
18589 **/
18590int
18591lpfc_sli4_add_fcf_record(struct lpfc_hba *phba, struct fcf_record *fcf_record)
18592{
18593 int rc = 0;
18594 LPFC_MBOXQ_t *mboxq;
18595 uint8_t *bytep;
18596 void *virt_addr;
6fb120a7
JS
18597 struct lpfc_mbx_sge sge;
18598 uint32_t alloc_len, req_len;
18599 uint32_t fcfindex;
18600
18601 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18602 if (!mboxq) {
18603 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18604 "2009 Failed to allocate mbox for ADD_FCF cmd\n");
18605 return -ENOMEM;
18606 }
18607
18608 req_len = sizeof(struct fcf_record) + sizeof(union lpfc_sli4_cfg_shdr) +
18609 sizeof(uint32_t);
18610
18611 /* Allocate DMA memory and set up the non-embedded mailbox command */
18612 alloc_len = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18613 LPFC_MBOX_OPCODE_FCOE_ADD_FCF,
18614 req_len, LPFC_SLI4_MBX_NEMBED);
18615 if (alloc_len < req_len) {
18616 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18617 "2523 Allocated DMA memory size (x%x) is "
18618 "less than the requested DMA memory "
18619 "size (x%x)\n", alloc_len, req_len);
18620 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18621 return -ENOMEM;
18622 }
18623
18624 /*
18625 * Get the first SGE entry from the non-embedded DMA memory. This
18626 * routine only uses a single SGE.
18627 */
18628 lpfc_sli4_mbx_sge_get(mboxq, 0, &sge);
6fb120a7
JS
18629 virt_addr = mboxq->sge_array->addr[0];
18630 /*
18631 * Configure the FCF record for FCFI 0. This is the driver's
18632 * hardcoded default and gets used in nonFIP mode.
18633 */
18634 fcfindex = bf_get(lpfc_fcf_record_fcf_index, fcf_record);
18635 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr);
18636 lpfc_sli_pcimem_bcopy(&fcfindex, bytep, sizeof(uint32_t));
18637
18638 /*
18639 * Copy the fcf_index and the FCF Record Data. The data starts after
18640 * the FCoE header plus word10. The data copy needs to be endian
18641 * correct.
18642 */
18643 bytep += sizeof(uint32_t);
18644 lpfc_sli_pcimem_bcopy(fcf_record, bytep, sizeof(struct fcf_record));
18645 mboxq->vport = phba->pport;
18646 mboxq->mbox_cmpl = lpfc_mbx_cmpl_add_fcf_record;
18647 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18648 if (rc == MBX_NOT_FINISHED) {
18649 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18650 "2515 ADD_FCF_RECORD mailbox failed with "
18651 "status 0x%x\n", rc);
18652 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18653 rc = -EIO;
18654 } else
18655 rc = 0;
18656
18657 return rc;
18658}
18659
18660/**
18661 * lpfc_sli4_build_dflt_fcf_record - Build the driver's default FCF Record.
18662 * @phba: pointer to lpfc hba data structure.
18663 * @fcf_record: pointer to the fcf record to write the default data.
18664 * @fcf_index: FCF table entry index.
18665 *
18666 * This routine is invoked to build the driver's default FCF record. The
18667 * values used are hardcoded. This routine handles memory initialization.
18668 *
18669 **/
18670void
18671lpfc_sli4_build_dflt_fcf_record(struct lpfc_hba *phba,
18672 struct fcf_record *fcf_record,
18673 uint16_t fcf_index)
18674{
18675 memset(fcf_record, 0, sizeof(struct fcf_record));
18676 fcf_record->max_rcv_size = LPFC_FCOE_MAX_RCV_SIZE;
18677 fcf_record->fka_adv_period = LPFC_FCOE_FKA_ADV_PER;
18678 fcf_record->fip_priority = LPFC_FCOE_FIP_PRIORITY;
18679 bf_set(lpfc_fcf_record_mac_0, fcf_record, phba->fc_map[0]);
18680 bf_set(lpfc_fcf_record_mac_1, fcf_record, phba->fc_map[1]);
18681 bf_set(lpfc_fcf_record_mac_2, fcf_record, phba->fc_map[2]);
18682 bf_set(lpfc_fcf_record_mac_3, fcf_record, LPFC_FCOE_FCF_MAC3);
18683 bf_set(lpfc_fcf_record_mac_4, fcf_record, LPFC_FCOE_FCF_MAC4);
18684 bf_set(lpfc_fcf_record_mac_5, fcf_record, LPFC_FCOE_FCF_MAC5);
18685 bf_set(lpfc_fcf_record_fc_map_0, fcf_record, phba->fc_map[0]);
18686 bf_set(lpfc_fcf_record_fc_map_1, fcf_record, phba->fc_map[1]);
18687 bf_set(lpfc_fcf_record_fc_map_2, fcf_record, phba->fc_map[2]);
18688 bf_set(lpfc_fcf_record_fcf_valid, fcf_record, 1);
0c287589 18689 bf_set(lpfc_fcf_record_fcf_avail, fcf_record, 1);
6fb120a7
JS
18690 bf_set(lpfc_fcf_record_fcf_index, fcf_record, fcf_index);
18691 bf_set(lpfc_fcf_record_mac_addr_prov, fcf_record,
18692 LPFC_FCF_FPMA | LPFC_FCF_SPMA);
18693 /* Set the VLAN bit map */
18694 if (phba->valid_vlan) {
18695 fcf_record->vlan_bitmap[phba->vlan_id / 8]
18696 = 1 << (phba->vlan_id % 8);
18697 }
18698}
18699
18700/**
0c9ab6f5 18701 * lpfc_sli4_fcf_scan_read_fcf_rec - Read hba fcf record for fcf scan.
6fb120a7
JS
18702 * @phba: pointer to lpfc hba data structure.
18703 * @fcf_index: FCF table entry offset.
18704 *
0c9ab6f5
JS
18705 * This routine is invoked to scan the entire FCF table by reading FCF
18706 * record and processing it one at a time starting from the @fcf_index
18707 * for initial FCF discovery or fast FCF failover rediscovery.
18708 *
25985edc 18709 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5 18710 * otherwise.
6fb120a7
JS
18711 **/
18712int
0c9ab6f5 18713lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
6fb120a7
JS
18714{
18715 int rc = 0, error;
18716 LPFC_MBOXQ_t *mboxq;
6fb120a7 18717
32b9793f 18718 phba->fcoe_eventtag_at_fcf_scan = phba->fcoe_eventtag;
80c17849 18719 phba->fcoe_cvl_eventtag_attn = phba->fcoe_cvl_eventtag;
6fb120a7
JS
18720 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18721 if (!mboxq) {
18722 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18723 "2000 Failed to allocate mbox for "
18724 "READ_FCF cmd\n");
4d9ab994 18725 error = -ENOMEM;
0c9ab6f5 18726 goto fail_fcf_scan;
6fb120a7 18727 }
ecfd03c6 18728 /* Construct the read FCF record mailbox command */
0c9ab6f5 18729 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
ecfd03c6
JS
18730 if (rc) {
18731 error = -EINVAL;
0c9ab6f5 18732 goto fail_fcf_scan;
6fb120a7 18733 }
ecfd03c6 18734 /* Issue the mailbox command asynchronously */
6fb120a7 18735 mboxq->vport = phba->pport;
0c9ab6f5 18736 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_scan_read_fcf_rec;
a93ff37a
JS
18737
18738 spin_lock_irq(&phba->hbalock);
18739 phba->hba_flag |= FCF_TS_INPROG;
18740 spin_unlock_irq(&phba->hbalock);
18741
6fb120a7 18742 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
ecfd03c6 18743 if (rc == MBX_NOT_FINISHED)
6fb120a7 18744 error = -EIO;
ecfd03c6 18745 else {
38b92ef8
JS
18746 /* Reset eligible FCF count for new scan */
18747 if (fcf_index == LPFC_FCOE_FCF_GET_FIRST)
999d813f 18748 phba->fcf.eligible_fcf_cnt = 0;
6fb120a7 18749 error = 0;
32b9793f 18750 }
0c9ab6f5 18751fail_fcf_scan:
4d9ab994
JS
18752 if (error) {
18753 if (mboxq)
18754 lpfc_sli4_mbox_cmd_free(phba, mboxq);
a93ff37a 18755 /* FCF scan failed, clear FCF_TS_INPROG flag */
4d9ab994 18756 spin_lock_irq(&phba->hbalock);
a93ff37a 18757 phba->hba_flag &= ~FCF_TS_INPROG;
4d9ab994
JS
18758 spin_unlock_irq(&phba->hbalock);
18759 }
6fb120a7
JS
18760 return error;
18761}
a0c87cbd 18762
0c9ab6f5 18763/**
a93ff37a 18764 * lpfc_sli4_fcf_rr_read_fcf_rec - Read hba fcf record for roundrobin fcf.
0c9ab6f5
JS
18765 * @phba: pointer to lpfc hba data structure.
18766 * @fcf_index: FCF table entry offset.
18767 *
18768 * This routine is invoked to read an FCF record indicated by @fcf_index
a93ff37a 18769 * and to use it for FLOGI roundrobin FCF failover.
0c9ab6f5 18770 *
25985edc 18771 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18772 * otherwise.
18773 **/
18774int
18775lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18776{
18777 int rc = 0, error;
18778 LPFC_MBOXQ_t *mboxq;
18779
18780 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18781 if (!mboxq) {
18782 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18783 "2763 Failed to allocate mbox for "
18784 "READ_FCF cmd\n");
18785 error = -ENOMEM;
18786 goto fail_fcf_read;
18787 }
18788 /* Construct the read FCF record mailbox command */
18789 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18790 if (rc) {
18791 error = -EINVAL;
18792 goto fail_fcf_read;
18793 }
18794 /* Issue the mailbox command asynchronously */
18795 mboxq->vport = phba->pport;
18796 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_rr_read_fcf_rec;
18797 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18798 if (rc == MBX_NOT_FINISHED)
18799 error = -EIO;
18800 else
18801 error = 0;
18802
18803fail_fcf_read:
18804 if (error && mboxq)
18805 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18806 return error;
18807}
18808
18809/**
18810 * lpfc_sli4_read_fcf_rec - Read hba fcf record for update eligible fcf bmask.
18811 * @phba: pointer to lpfc hba data structure.
18812 * @fcf_index: FCF table entry offset.
18813 *
18814 * This routine is invoked to read an FCF record indicated by @fcf_index to
a93ff37a 18815 * determine whether it's eligible for FLOGI roundrobin failover list.
0c9ab6f5 18816 *
25985edc 18817 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18818 * otherwise.
18819 **/
18820int
18821lpfc_sli4_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18822{
18823 int rc = 0, error;
18824 LPFC_MBOXQ_t *mboxq;
18825
18826 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18827 if (!mboxq) {
18828 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18829 "2758 Failed to allocate mbox for "
18830 "READ_FCF cmd\n");
18831 error = -ENOMEM;
18832 goto fail_fcf_read;
18833 }
18834 /* Construct the read FCF record mailbox command */
18835 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18836 if (rc) {
18837 error = -EINVAL;
18838 goto fail_fcf_read;
18839 }
18840 /* Issue the mailbox command asynchronously */
18841 mboxq->vport = phba->pport;
18842 mboxq->mbox_cmpl = lpfc_mbx_cmpl_read_fcf_rec;
18843 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18844 if (rc == MBX_NOT_FINISHED)
18845 error = -EIO;
18846 else
18847 error = 0;
18848
18849fail_fcf_read:
18850 if (error && mboxq)
18851 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18852 return error;
18853}
18854
7d791df7 18855/**
f5cb5304 18856 * lpfc_check_next_fcf_pri_level
7d791df7
JS
18857 * phba pointer to the lpfc_hba struct for this port.
18858 * This routine is called from the lpfc_sli4_fcf_rr_next_index_get
18859 * routine when the rr_bmask is empty. The FCF indecies are put into the
18860 * rr_bmask based on their priority level. Starting from the highest priority
18861 * to the lowest. The most likely FCF candidate will be in the highest
18862 * priority group. When this routine is called it searches the fcf_pri list for
18863 * next lowest priority group and repopulates the rr_bmask with only those
18864 * fcf_indexes.
18865 * returns:
18866 * 1=success 0=failure
18867 **/
5d8b8167 18868static int
7d791df7
JS
18869lpfc_check_next_fcf_pri_level(struct lpfc_hba *phba)
18870{
18871 uint16_t next_fcf_pri;
18872 uint16_t last_index;
18873 struct lpfc_fcf_pri *fcf_pri;
18874 int rc;
18875 int ret = 0;
18876
18877 last_index = find_first_bit(phba->fcf.fcf_rr_bmask,
18878 LPFC_SLI4_FCF_TBL_INDX_MAX);
18879 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
18880 "3060 Last IDX %d\n", last_index);
2562669c
JS
18881
18882 /* Verify the priority list has 2 or more entries */
18883 spin_lock_irq(&phba->hbalock);
18884 if (list_empty(&phba->fcf.fcf_pri_list) ||
18885 list_is_singular(&phba->fcf.fcf_pri_list)) {
18886 spin_unlock_irq(&phba->hbalock);
7d791df7
JS
18887 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
18888 "3061 Last IDX %d\n", last_index);
18889 return 0; /* Empty rr list */
18890 }
2562669c
JS
18891 spin_unlock_irq(&phba->hbalock);
18892
7d791df7
JS
18893 next_fcf_pri = 0;
18894 /*
18895 * Clear the rr_bmask and set all of the bits that are at this
18896 * priority.
18897 */
18898 memset(phba->fcf.fcf_rr_bmask, 0,
18899 sizeof(*phba->fcf.fcf_rr_bmask));
18900 spin_lock_irq(&phba->hbalock);
18901 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18902 if (fcf_pri->fcf_rec.flag & LPFC_FCF_FLOGI_FAILED)
18903 continue;
18904 /*
18905 * the 1st priority that has not FLOGI failed
18906 * will be the highest.
18907 */
18908 if (!next_fcf_pri)
18909 next_fcf_pri = fcf_pri->fcf_rec.priority;
18910 spin_unlock_irq(&phba->hbalock);
18911 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18912 rc = lpfc_sli4_fcf_rr_index_set(phba,
18913 fcf_pri->fcf_rec.fcf_index);
18914 if (rc)
18915 return 0;
18916 }
18917 spin_lock_irq(&phba->hbalock);
18918 }
18919 /*
18920 * if next_fcf_pri was not set above and the list is not empty then
18921 * we have failed flogis on all of them. So reset flogi failed
4907cb7b 18922 * and start at the beginning.
7d791df7
JS
18923 */
18924 if (!next_fcf_pri && !list_empty(&phba->fcf.fcf_pri_list)) {
18925 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18926 fcf_pri->fcf_rec.flag &= ~LPFC_FCF_FLOGI_FAILED;
18927 /*
18928 * the 1st priority that has not FLOGI failed
18929 * will be the highest.
18930 */
18931 if (!next_fcf_pri)
18932 next_fcf_pri = fcf_pri->fcf_rec.priority;
18933 spin_unlock_irq(&phba->hbalock);
18934 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18935 rc = lpfc_sli4_fcf_rr_index_set(phba,
18936 fcf_pri->fcf_rec.fcf_index);
18937 if (rc)
18938 return 0;
18939 }
18940 spin_lock_irq(&phba->hbalock);
18941 }
18942 } else
18943 ret = 1;
18944 spin_unlock_irq(&phba->hbalock);
18945
18946 return ret;
18947}
0c9ab6f5
JS
18948/**
18949 * lpfc_sli4_fcf_rr_next_index_get - Get next eligible fcf record index
18950 * @phba: pointer to lpfc hba data structure.
18951 *
18952 * This routine is to get the next eligible FCF record index in a round
18953 * robin fashion. If the next eligible FCF record index equals to the
a93ff37a 18954 * initial roundrobin FCF record index, LPFC_FCOE_FCF_NEXT_NONE (0xFFFF)
0c9ab6f5
JS
18955 * shall be returned, otherwise, the next eligible FCF record's index
18956 * shall be returned.
18957 **/
18958uint16_t
18959lpfc_sli4_fcf_rr_next_index_get(struct lpfc_hba *phba)
18960{
18961 uint16_t next_fcf_index;
18962
421c6622 18963initial_priority:
3804dc84 18964 /* Search start from next bit of currently registered FCF index */
421c6622
JS
18965 next_fcf_index = phba->fcf.current_rec.fcf_indx;
18966
7d791df7 18967next_priority:
421c6622
JS
18968 /* Determine the next fcf index to check */
18969 next_fcf_index = (next_fcf_index + 1) % LPFC_SLI4_FCF_TBL_INDX_MAX;
0c9ab6f5
JS
18970 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18971 LPFC_SLI4_FCF_TBL_INDX_MAX,
3804dc84
JS
18972 next_fcf_index);
18973
0c9ab6f5 18974 /* Wrap around condition on phba->fcf.fcf_rr_bmask */
7d791df7
JS
18975 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18976 /*
18977 * If we have wrapped then we need to clear the bits that
18978 * have been tested so that we can detect when we should
18979 * change the priority level.
18980 */
0c9ab6f5
JS
18981 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18982 LPFC_SLI4_FCF_TBL_INDX_MAX, 0);
7d791df7
JS
18983 }
18984
3804dc84
JS
18985
18986 /* Check roundrobin failover list empty condition */
7d791df7
JS
18987 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX ||
18988 next_fcf_index == phba->fcf.current_rec.fcf_indx) {
18989 /*
18990 * If next fcf index is not found check if there are lower
18991 * Priority level fcf's in the fcf_priority list.
18992 * Set up the rr_bmask with all of the avaiable fcf bits
18993 * at that level and continue the selection process.
18994 */
18995 if (lpfc_check_next_fcf_pri_level(phba))
421c6622 18996 goto initial_priority;
3804dc84
JS
18997 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP,
18998 "2844 No roundrobin failover FCF available\n");
036cad1f
JS
18999
19000 return LPFC_FCOE_FCF_NEXT_NONE;
3804dc84
JS
19001 }
19002
7d791df7
JS
19003 if (next_fcf_index < LPFC_SLI4_FCF_TBL_INDX_MAX &&
19004 phba->fcf.fcf_pri[next_fcf_index].fcf_rec.flag &
f5cb5304
JS
19005 LPFC_FCF_FLOGI_FAILED) {
19006 if (list_is_singular(&phba->fcf.fcf_pri_list))
19007 return LPFC_FCOE_FCF_NEXT_NONE;
19008
7d791df7 19009 goto next_priority;
f5cb5304 19010 }
7d791df7 19011
3804dc84 19012 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a
JS
19013 "2845 Get next roundrobin failover FCF (x%x)\n",
19014 next_fcf_index);
19015
0c9ab6f5
JS
19016 return next_fcf_index;
19017}
19018
19019/**
19020 * lpfc_sli4_fcf_rr_index_set - Set bmask with eligible fcf record index
19021 * @phba: pointer to lpfc hba data structure.
19022 *
19023 * This routine sets the FCF record index in to the eligible bmask for
a93ff37a 19024 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
19025 * does not go beyond the range of the driver allocated bmask dimension
19026 * before setting the bit.
19027 *
19028 * Returns 0 if the index bit successfully set, otherwise, it returns
19029 * -EINVAL.
19030 **/
19031int
19032lpfc_sli4_fcf_rr_index_set(struct lpfc_hba *phba, uint16_t fcf_index)
19033{
19034 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
19035 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
19036 "2610 FCF (x%x) reached driver's book "
19037 "keeping dimension:x%x\n",
0c9ab6f5
JS
19038 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
19039 return -EINVAL;
19040 }
19041 /* Set the eligible FCF record index bmask */
19042 set_bit(fcf_index, phba->fcf.fcf_rr_bmask);
19043
3804dc84 19044 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 19045 "2790 Set FCF (x%x) to roundrobin FCF failover "
3804dc84
JS
19046 "bmask\n", fcf_index);
19047
0c9ab6f5
JS
19048 return 0;
19049}
19050
19051/**
3804dc84 19052 * lpfc_sli4_fcf_rr_index_clear - Clear bmask from eligible fcf record index
0c9ab6f5
JS
19053 * @phba: pointer to lpfc hba data structure.
19054 *
19055 * This routine clears the FCF record index from the eligible bmask for
a93ff37a 19056 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
19057 * does not go beyond the range of the driver allocated bmask dimension
19058 * before clearing the bit.
19059 **/
19060void
19061lpfc_sli4_fcf_rr_index_clear(struct lpfc_hba *phba, uint16_t fcf_index)
19062{
9a803a74 19063 struct lpfc_fcf_pri *fcf_pri, *fcf_pri_next;
0c9ab6f5
JS
19064 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
19065 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
19066 "2762 FCF (x%x) reached driver's book "
19067 "keeping dimension:x%x\n",
0c9ab6f5
JS
19068 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
19069 return;
19070 }
19071 /* Clear the eligible FCF record index bmask */
7d791df7 19072 spin_lock_irq(&phba->hbalock);
9a803a74
JS
19073 list_for_each_entry_safe(fcf_pri, fcf_pri_next, &phba->fcf.fcf_pri_list,
19074 list) {
7d791df7
JS
19075 if (fcf_pri->fcf_rec.fcf_index == fcf_index) {
19076 list_del_init(&fcf_pri->list);
19077 break;
19078 }
19079 }
19080 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 19081 clear_bit(fcf_index, phba->fcf.fcf_rr_bmask);
3804dc84
JS
19082
19083 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 19084 "2791 Clear FCF (x%x) from roundrobin failover "
3804dc84 19085 "bmask\n", fcf_index);
0c9ab6f5
JS
19086}
19087
ecfd03c6
JS
19088/**
19089 * lpfc_mbx_cmpl_redisc_fcf_table - completion routine for rediscover FCF table
19090 * @phba: pointer to lpfc hba data structure.
19091 *
19092 * This routine is the completion routine for the rediscover FCF table mailbox
19093 * command. If the mailbox command returned failure, it will try to stop the
19094 * FCF rediscover wait timer.
19095 **/
5d8b8167 19096static void
ecfd03c6
JS
19097lpfc_mbx_cmpl_redisc_fcf_table(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
19098{
19099 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
19100 uint32_t shdr_status, shdr_add_status;
19101
19102 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
19103
19104 shdr_status = bf_get(lpfc_mbox_hdr_status,
19105 &redisc_fcf->header.cfg_shdr.response);
19106 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
19107 &redisc_fcf->header.cfg_shdr.response);
19108 if (shdr_status || shdr_add_status) {
0c9ab6f5 19109 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
ecfd03c6
JS
19110 "2746 Requesting for FCF rediscovery failed "
19111 "status x%x add_status x%x\n",
19112 shdr_status, shdr_add_status);
0c9ab6f5 19113 if (phba->fcf.fcf_flag & FCF_ACVL_DISC) {
fc2b989b 19114 spin_lock_irq(&phba->hbalock);
0c9ab6f5 19115 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b
JS
19116 spin_unlock_irq(&phba->hbalock);
19117 /*
19118 * CVL event triggered FCF rediscover request failed,
19119 * last resort to re-try current registered FCF entry.
19120 */
19121 lpfc_retry_pport_discovery(phba);
19122 } else {
19123 spin_lock_irq(&phba->hbalock);
0c9ab6f5 19124 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
fc2b989b
JS
19125 spin_unlock_irq(&phba->hbalock);
19126 /*
19127 * DEAD FCF event triggered FCF rediscover request
19128 * failed, last resort to fail over as a link down
19129 * to FCF registration.
19130 */
19131 lpfc_sli4_fcf_dead_failthrough(phba);
19132 }
0c9ab6f5
JS
19133 } else {
19134 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 19135 "2775 Start FCF rediscover quiescent timer\n");
ecfd03c6
JS
19136 /*
19137 * Start FCF rediscovery wait timer for pending FCF
19138 * before rescan FCF record table.
19139 */
19140 lpfc_fcf_redisc_wait_start_timer(phba);
0c9ab6f5 19141 }
ecfd03c6
JS
19142
19143 mempool_free(mbox, phba->mbox_mem_pool);
19144}
19145
19146/**
3804dc84 19147 * lpfc_sli4_redisc_fcf_table - Request to rediscover entire FCF table by port.
ecfd03c6
JS
19148 * @phba: pointer to lpfc hba data structure.
19149 *
19150 * This routine is invoked to request for rediscovery of the entire FCF table
19151 * by the port.
19152 **/
19153int
19154lpfc_sli4_redisc_fcf_table(struct lpfc_hba *phba)
19155{
19156 LPFC_MBOXQ_t *mbox;
19157 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
19158 int rc, length;
19159
0c9ab6f5
JS
19160 /* Cancel retry delay timers to all vports before FCF rediscover */
19161 lpfc_cancel_all_vport_retry_delay_timer(phba);
19162
ecfd03c6
JS
19163 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19164 if (!mbox) {
19165 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19166 "2745 Failed to allocate mbox for "
19167 "requesting FCF rediscover.\n");
19168 return -ENOMEM;
19169 }
19170
19171 length = (sizeof(struct lpfc_mbx_redisc_fcf_tbl) -
19172 sizeof(struct lpfc_sli4_cfg_mhdr));
19173 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
19174 LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF,
19175 length, LPFC_SLI4_MBX_EMBED);
19176
19177 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
19178 /* Set count to 0 for invalidating the entire FCF database */
19179 bf_set(lpfc_mbx_redisc_fcf_count, redisc_fcf, 0);
19180
19181 /* Issue the mailbox command asynchronously */
19182 mbox->vport = phba->pport;
19183 mbox->mbox_cmpl = lpfc_mbx_cmpl_redisc_fcf_table;
19184 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
19185
19186 if (rc == MBX_NOT_FINISHED) {
19187 mempool_free(mbox, phba->mbox_mem_pool);
19188 return -EIO;
19189 }
19190 return 0;
19191}
19192
fc2b989b
JS
19193/**
19194 * lpfc_sli4_fcf_dead_failthrough - Failthrough routine to fcf dead event
19195 * @phba: pointer to lpfc hba data structure.
19196 *
19197 * This function is the failover routine as a last resort to the FCF DEAD
19198 * event when driver failed to perform fast FCF failover.
19199 **/
19200void
19201lpfc_sli4_fcf_dead_failthrough(struct lpfc_hba *phba)
19202{
19203 uint32_t link_state;
19204
19205 /*
19206 * Last resort as FCF DEAD event failover will treat this as
19207 * a link down, but save the link state because we don't want
19208 * it to be changed to Link Down unless it is already down.
19209 */
19210 link_state = phba->link_state;
19211 lpfc_linkdown(phba);
19212 phba->link_state = link_state;
19213
19214 /* Unregister FCF if no devices connected to it */
19215 lpfc_unregister_unused_fcf(phba);
19216}
19217
a0c87cbd 19218/**
026abb87 19219 * lpfc_sli_get_config_region23 - Get sli3 port region 23 data.
a0c87cbd 19220 * @phba: pointer to lpfc hba data structure.
026abb87 19221 * @rgn23_data: pointer to configure region 23 data.
a0c87cbd 19222 *
026abb87
JS
19223 * This function gets SLI3 port configure region 23 data through memory dump
19224 * mailbox command. When it successfully retrieves data, the size of the data
19225 * will be returned, otherwise, 0 will be returned.
a0c87cbd 19226 **/
026abb87
JS
19227static uint32_t
19228lpfc_sli_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
a0c87cbd
JS
19229{
19230 LPFC_MBOXQ_t *pmb = NULL;
19231 MAILBOX_t *mb;
026abb87 19232 uint32_t offset = 0;
a0c87cbd
JS
19233 int rc;
19234
026abb87
JS
19235 if (!rgn23_data)
19236 return 0;
19237
a0c87cbd
JS
19238 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19239 if (!pmb) {
19240 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
026abb87
JS
19241 "2600 failed to allocate mailbox memory\n");
19242 return 0;
a0c87cbd
JS
19243 }
19244 mb = &pmb->u.mb;
19245
a0c87cbd
JS
19246 do {
19247 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_23);
19248 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
19249
19250 if (rc != MBX_SUCCESS) {
19251 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
026abb87
JS
19252 "2601 failed to read config "
19253 "region 23, rc 0x%x Status 0x%x\n",
19254 rc, mb->mbxStatus);
a0c87cbd
JS
19255 mb->un.varDmp.word_cnt = 0;
19256 }
19257 /*
19258 * dump mem may return a zero when finished or we got a
19259 * mailbox error, either way we are done.
19260 */
19261 if (mb->un.varDmp.word_cnt == 0)
19262 break;
19263 if (mb->un.varDmp.word_cnt > DMP_RGN23_SIZE - offset)
19264 mb->un.varDmp.word_cnt = DMP_RGN23_SIZE - offset;
19265
19266 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
026abb87
JS
19267 rgn23_data + offset,
19268 mb->un.varDmp.word_cnt);
a0c87cbd
JS
19269 offset += mb->un.varDmp.word_cnt;
19270 } while (mb->un.varDmp.word_cnt && offset < DMP_RGN23_SIZE);
19271
026abb87
JS
19272 mempool_free(pmb, phba->mbox_mem_pool);
19273 return offset;
19274}
19275
19276/**
19277 * lpfc_sli4_get_config_region23 - Get sli4 port region 23 data.
19278 * @phba: pointer to lpfc hba data structure.
19279 * @rgn23_data: pointer to configure region 23 data.
19280 *
19281 * This function gets SLI4 port configure region 23 data through memory dump
19282 * mailbox command. When it successfully retrieves data, the size of the data
19283 * will be returned, otherwise, 0 will be returned.
19284 **/
19285static uint32_t
19286lpfc_sli4_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
19287{
19288 LPFC_MBOXQ_t *mboxq = NULL;
19289 struct lpfc_dmabuf *mp = NULL;
19290 struct lpfc_mqe *mqe;
19291 uint32_t data_length = 0;
19292 int rc;
19293
19294 if (!rgn23_data)
19295 return 0;
19296
19297 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19298 if (!mboxq) {
19299 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19300 "3105 failed to allocate mailbox memory\n");
19301 return 0;
19302 }
19303
19304 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq))
19305 goto out;
19306 mqe = &mboxq->u.mqe;
3e1f0718 19307 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
026abb87
JS
19308 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
19309 if (rc)
19310 goto out;
19311 data_length = mqe->un.mb_words[5];
19312 if (data_length == 0)
19313 goto out;
19314 if (data_length > DMP_RGN23_SIZE) {
19315 data_length = 0;
19316 goto out;
19317 }
19318 lpfc_sli_pcimem_bcopy((char *)mp->virt, rgn23_data, data_length);
19319out:
19320 mempool_free(mboxq, phba->mbox_mem_pool);
19321 if (mp) {
19322 lpfc_mbuf_free(phba, mp->virt, mp->phys);
19323 kfree(mp);
19324 }
19325 return data_length;
19326}
19327
19328/**
19329 * lpfc_sli_read_link_ste - Read region 23 to decide if link is disabled.
19330 * @phba: pointer to lpfc hba data structure.
19331 *
19332 * This function read region 23 and parse TLV for port status to
19333 * decide if the user disaled the port. If the TLV indicates the
19334 * port is disabled, the hba_flag is set accordingly.
19335 **/
19336void
19337lpfc_sli_read_link_ste(struct lpfc_hba *phba)
19338{
19339 uint8_t *rgn23_data = NULL;
19340 uint32_t if_type, data_size, sub_tlv_len, tlv_offset;
19341 uint32_t offset = 0;
19342
19343 /* Get adapter Region 23 data */
19344 rgn23_data = kzalloc(DMP_RGN23_SIZE, GFP_KERNEL);
19345 if (!rgn23_data)
19346 goto out;
19347
19348 if (phba->sli_rev < LPFC_SLI_REV4)
19349 data_size = lpfc_sli_get_config_region23(phba, rgn23_data);
19350 else {
19351 if_type = bf_get(lpfc_sli_intf_if_type,
19352 &phba->sli4_hba.sli_intf);
19353 if (if_type == LPFC_SLI_INTF_IF_TYPE_0)
19354 goto out;
19355 data_size = lpfc_sli4_get_config_region23(phba, rgn23_data);
19356 }
a0c87cbd
JS
19357
19358 if (!data_size)
19359 goto out;
19360
19361 /* Check the region signature first */
19362 if (memcmp(&rgn23_data[offset], LPFC_REGION23_SIGNATURE, 4)) {
19363 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19364 "2619 Config region 23 has bad signature\n");
19365 goto out;
19366 }
19367 offset += 4;
19368
19369 /* Check the data structure version */
19370 if (rgn23_data[offset] != LPFC_REGION23_VERSION) {
19371 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19372 "2620 Config region 23 has bad version\n");
19373 goto out;
19374 }
19375 offset += 4;
19376
19377 /* Parse TLV entries in the region */
19378 while (offset < data_size) {
19379 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC)
19380 break;
19381 /*
19382 * If the TLV is not driver specific TLV or driver id is
19383 * not linux driver id, skip the record.
19384 */
19385 if ((rgn23_data[offset] != DRIVER_SPECIFIC_TYPE) ||
19386 (rgn23_data[offset + 2] != LINUX_DRIVER_ID) ||
19387 (rgn23_data[offset + 3] != 0)) {
19388 offset += rgn23_data[offset + 1] * 4 + 4;
19389 continue;
19390 }
19391
19392 /* Driver found a driver specific TLV in the config region */
19393 sub_tlv_len = rgn23_data[offset + 1] * 4;
19394 offset += 4;
19395 tlv_offset = 0;
19396
19397 /*
19398 * Search for configured port state sub-TLV.
19399 */
19400 while ((offset < data_size) &&
19401 (tlv_offset < sub_tlv_len)) {
19402 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC) {
19403 offset += 4;
19404 tlv_offset += 4;
19405 break;
19406 }
19407 if (rgn23_data[offset] != PORT_STE_TYPE) {
19408 offset += rgn23_data[offset + 1] * 4 + 4;
19409 tlv_offset += rgn23_data[offset + 1] * 4 + 4;
19410 continue;
19411 }
19412
19413 /* This HBA contains PORT_STE configured */
19414 if (!rgn23_data[offset + 2])
19415 phba->hba_flag |= LINK_DISABLED;
19416
19417 goto out;
19418 }
19419 }
026abb87 19420
a0c87cbd 19421out:
a0c87cbd
JS
19422 kfree(rgn23_data);
19423 return;
19424}
695a814e 19425
52d52440
JS
19426/**
19427 * lpfc_wr_object - write an object to the firmware
19428 * @phba: HBA structure that indicates port to create a queue on.
19429 * @dmabuf_list: list of dmabufs to write to the port.
19430 * @size: the total byte value of the objects to write to the port.
19431 * @offset: the current offset to be used to start the transfer.
19432 *
19433 * This routine will create a wr_object mailbox command to send to the port.
19434 * the mailbox command will be constructed using the dma buffers described in
19435 * @dmabuf_list to create a list of BDEs. This routine will fill in as many
19436 * BDEs that the imbedded mailbox can support. The @offset variable will be
19437 * used to indicate the starting offset of the transfer and will also return
19438 * the offset after the write object mailbox has completed. @size is used to
19439 * determine the end of the object and whether the eof bit should be set.
19440 *
19441 * Return 0 is successful and offset will contain the the new offset to use
19442 * for the next write.
19443 * Return negative value for error cases.
19444 **/
19445int
19446lpfc_wr_object(struct lpfc_hba *phba, struct list_head *dmabuf_list,
19447 uint32_t size, uint32_t *offset)
19448{
19449 struct lpfc_mbx_wr_object *wr_object;
19450 LPFC_MBOXQ_t *mbox;
19451 int rc = 0, i = 0;
f3d0a8ac 19452 uint32_t shdr_status, shdr_add_status, shdr_change_status, shdr_csf;
52d52440 19453 uint32_t mbox_tmo;
52d52440
JS
19454 struct lpfc_dmabuf *dmabuf;
19455 uint32_t written = 0;
5021267a 19456 bool check_change_status = false;
52d52440
JS
19457
19458 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19459 if (!mbox)
19460 return -ENOMEM;
19461
19462 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
19463 LPFC_MBOX_OPCODE_WRITE_OBJECT,
19464 sizeof(struct lpfc_mbx_wr_object) -
19465 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
19466
19467 wr_object = (struct lpfc_mbx_wr_object *)&mbox->u.mqe.un.wr_object;
19468 wr_object->u.request.write_offset = *offset;
19469 sprintf((uint8_t *)wr_object->u.request.object_name, "/");
19470 wr_object->u.request.object_name[0] =
19471 cpu_to_le32(wr_object->u.request.object_name[0]);
19472 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 0);
19473 list_for_each_entry(dmabuf, dmabuf_list, list) {
19474 if (i >= LPFC_MBX_WR_CONFIG_MAX_BDE || written >= size)
19475 break;
19476 wr_object->u.request.bde[i].addrLow = putPaddrLow(dmabuf->phys);
19477 wr_object->u.request.bde[i].addrHigh =
19478 putPaddrHigh(dmabuf->phys);
19479 if (written + SLI4_PAGE_SIZE >= size) {
19480 wr_object->u.request.bde[i].tus.f.bdeSize =
19481 (size - written);
19482 written += (size - written);
19483 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 1);
5021267a
JS
19484 bf_set(lpfc_wr_object_eas, &wr_object->u.request, 1);
19485 check_change_status = true;
52d52440
JS
19486 } else {
19487 wr_object->u.request.bde[i].tus.f.bdeSize =
19488 SLI4_PAGE_SIZE;
19489 written += SLI4_PAGE_SIZE;
19490 }
19491 i++;
19492 }
19493 wr_object->u.request.bde_count = i;
19494 bf_set(lpfc_wr_object_write_length, &wr_object->u.request, written);
19495 if (!phba->sli4_hba.intr_enable)
19496 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
19497 else {
a183a15f 19498 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
52d52440
JS
19499 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
19500 }
19501 /* The IOCTL status is embedded in the mailbox subheader. */
5021267a
JS
19502 shdr_status = bf_get(lpfc_mbox_hdr_status,
19503 &wr_object->header.cfg_shdr.response);
19504 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
19505 &wr_object->header.cfg_shdr.response);
19506 if (check_change_status) {
19507 shdr_change_status = bf_get(lpfc_wr_object_change_status,
19508 &wr_object->u.response);
f3d0a8ac
JS
19509
19510 if (shdr_change_status == LPFC_CHANGE_STATUS_FW_RESET ||
19511 shdr_change_status == LPFC_CHANGE_STATUS_PORT_MIGRATION) {
19512 shdr_csf = bf_get(lpfc_wr_object_csf,
19513 &wr_object->u.response);
19514 if (shdr_csf)
19515 shdr_change_status =
19516 LPFC_CHANGE_STATUS_PCI_RESET;
19517 }
19518
5021267a
JS
19519 switch (shdr_change_status) {
19520 case (LPFC_CHANGE_STATUS_PHYS_DEV_RESET):
19521 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19522 "3198 Firmware write complete: System "
19523 "reboot required to instantiate\n");
19524 break;
19525 case (LPFC_CHANGE_STATUS_FW_RESET):
19526 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19527 "3199 Firmware write complete: Firmware"
19528 " reset required to instantiate\n");
19529 break;
19530 case (LPFC_CHANGE_STATUS_PORT_MIGRATION):
19531 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19532 "3200 Firmware write complete: Port "
19533 "Migration or PCI Reset required to "
19534 "instantiate\n");
19535 break;
19536 case (LPFC_CHANGE_STATUS_PCI_RESET):
19537 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19538 "3201 Firmware write complete: PCI "
19539 "Reset required to instantiate\n");
19540 break;
19541 default:
19542 break;
19543 }
19544 }
52d52440
JS
19545 if (rc != MBX_TIMEOUT)
19546 mempool_free(mbox, phba->mbox_mem_pool);
19547 if (shdr_status || shdr_add_status || rc) {
19548 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19549 "3025 Write Object mailbox failed with "
19550 "status x%x add_status x%x, mbx status x%x\n",
19551 shdr_status, shdr_add_status, rc);
19552 rc = -ENXIO;
1feb8204 19553 *offset = shdr_add_status;
52d52440
JS
19554 } else
19555 *offset += wr_object->u.response.actual_write_length;
19556 return rc;
19557}
19558
695a814e
JS
19559/**
19560 * lpfc_cleanup_pending_mbox - Free up vport discovery mailbox commands.
19561 * @vport: pointer to vport data structure.
19562 *
19563 * This function iterate through the mailboxq and clean up all REG_LOGIN
19564 * and REG_VPI mailbox commands associated with the vport. This function
19565 * is called when driver want to restart discovery of the vport due to
19566 * a Clear Virtual Link event.
19567 **/
19568void
19569lpfc_cleanup_pending_mbox(struct lpfc_vport *vport)
19570{
19571 struct lpfc_hba *phba = vport->phba;
19572 LPFC_MBOXQ_t *mb, *nextmb;
19573 struct lpfc_dmabuf *mp;
78730cfe 19574 struct lpfc_nodelist *ndlp;
d439d286 19575 struct lpfc_nodelist *act_mbx_ndlp = NULL;
589a52d6 19576 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
d439d286 19577 LIST_HEAD(mbox_cmd_list);
63e801ce 19578 uint8_t restart_loop;
695a814e 19579
d439d286 19580 /* Clean up internally queued mailbox commands with the vport */
695a814e
JS
19581 spin_lock_irq(&phba->hbalock);
19582 list_for_each_entry_safe(mb, nextmb, &phba->sli.mboxq, list) {
19583 if (mb->vport != vport)
19584 continue;
19585
19586 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19587 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19588 continue;
19589
d439d286
JS
19590 list_del(&mb->list);
19591 list_add_tail(&mb->list, &mbox_cmd_list);
19592 }
19593 /* Clean up active mailbox command with the vport */
19594 mb = phba->sli.mbox_active;
19595 if (mb && (mb->vport == vport)) {
19596 if ((mb->u.mb.mbxCommand == MBX_REG_LOGIN64) ||
19597 (mb->u.mb.mbxCommand == MBX_REG_VPI))
19598 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19599 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19600 act_mbx_ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
d439d286
JS
19601 /* Put reference count for delayed processing */
19602 act_mbx_ndlp = lpfc_nlp_get(act_mbx_ndlp);
19603 /* Unregister the RPI when mailbox complete */
19604 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19605 }
19606 }
63e801ce
JS
19607 /* Cleanup any mailbox completions which are not yet processed */
19608 do {
19609 restart_loop = 0;
19610 list_for_each_entry(mb, &phba->sli.mboxq_cmpl, list) {
19611 /*
19612 * If this mailox is already processed or it is
19613 * for another vport ignore it.
19614 */
19615 if ((mb->vport != vport) ||
19616 (mb->mbox_flag & LPFC_MBX_IMED_UNREG))
19617 continue;
19618
19619 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19620 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19621 continue;
19622
19623 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19624 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19625 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
63e801ce
JS
19626 /* Unregister the RPI when mailbox complete */
19627 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19628 restart_loop = 1;
19629 spin_unlock_irq(&phba->hbalock);
19630 spin_lock(shost->host_lock);
19631 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19632 spin_unlock(shost->host_lock);
19633 spin_lock_irq(&phba->hbalock);
19634 break;
19635 }
19636 }
19637 } while (restart_loop);
19638
d439d286
JS
19639 spin_unlock_irq(&phba->hbalock);
19640
19641 /* Release the cleaned-up mailbox commands */
19642 while (!list_empty(&mbox_cmd_list)) {
19643 list_remove_head(&mbox_cmd_list, mb, LPFC_MBOXQ_t, list);
695a814e 19644 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19645 mp = (struct lpfc_dmabuf *)(mb->ctx_buf);
695a814e
JS
19646 if (mp) {
19647 __lpfc_mbuf_free(phba, mp->virt, mp->phys);
19648 kfree(mp);
19649 }
3e1f0718
JS
19650 mb->ctx_buf = NULL;
19651 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
19652 mb->ctx_ndlp = NULL;
78730cfe 19653 if (ndlp) {
ec21b3b0 19654 spin_lock(shost->host_lock);
589a52d6 19655 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
ec21b3b0 19656 spin_unlock(shost->host_lock);
78730cfe 19657 lpfc_nlp_put(ndlp);
78730cfe 19658 }
695a814e 19659 }
695a814e
JS
19660 mempool_free(mb, phba->mbox_mem_pool);
19661 }
d439d286
JS
19662
19663 /* Release the ndlp with the cleaned-up active mailbox command */
19664 if (act_mbx_ndlp) {
19665 spin_lock(shost->host_lock);
19666 act_mbx_ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19667 spin_unlock(shost->host_lock);
19668 lpfc_nlp_put(act_mbx_ndlp);
695a814e 19669 }
695a814e
JS
19670}
19671
2a9bf3d0
JS
19672/**
19673 * lpfc_drain_txq - Drain the txq
19674 * @phba: Pointer to HBA context object.
19675 *
19676 * This function attempt to submit IOCBs on the txq
19677 * to the adapter. For SLI4 adapters, the txq contains
19678 * ELS IOCBs that have been deferred because the there
19679 * are no SGLs. This congestion can occur with large
19680 * vport counts during node discovery.
19681 **/
19682
19683uint32_t
19684lpfc_drain_txq(struct lpfc_hba *phba)
19685{
19686 LIST_HEAD(completions);
895427bd 19687 struct lpfc_sli_ring *pring;
2e706377 19688 struct lpfc_iocbq *piocbq = NULL;
2a9bf3d0
JS
19689 unsigned long iflags = 0;
19690 char *fail_msg = NULL;
19691 struct lpfc_sglq *sglq;
205e8240 19692 union lpfc_wqe128 wqe;
a2fc4aef 19693 uint32_t txq_cnt = 0;
dc19e3b4 19694 struct lpfc_queue *wq;
2a9bf3d0 19695
dc19e3b4
JS
19696 if (phba->link_flag & LS_MDS_LOOPBACK) {
19697 /* MDS WQE are posted only to first WQ*/
c00f62e6 19698 wq = phba->sli4_hba.hdwq[0].io_wq;
dc19e3b4
JS
19699 if (unlikely(!wq))
19700 return 0;
19701 pring = wq->pring;
19702 } else {
19703 wq = phba->sli4_hba.els_wq;
19704 if (unlikely(!wq))
19705 return 0;
19706 pring = lpfc_phba_elsring(phba);
19707 }
19708
19709 if (unlikely(!pring) || list_empty(&pring->txq))
1234a6d5 19710 return 0;
895427bd 19711
398d81c9 19712 spin_lock_irqsave(&pring->ring_lock, iflags);
0e9bb8d7
JS
19713 list_for_each_entry(piocbq, &pring->txq, list) {
19714 txq_cnt++;
19715 }
19716
19717 if (txq_cnt > pring->txq_max)
19718 pring->txq_max = txq_cnt;
2a9bf3d0 19719
398d81c9 19720 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19721
0e9bb8d7 19722 while (!list_empty(&pring->txq)) {
398d81c9 19723 spin_lock_irqsave(&pring->ring_lock, iflags);
2a9bf3d0 19724
19ca7609 19725 piocbq = lpfc_sli_ringtx_get(phba, pring);
a629852a 19726 if (!piocbq) {
398d81c9 19727 spin_unlock_irqrestore(&pring->ring_lock, iflags);
a629852a
JS
19728 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19729 "2823 txq empty and txq_cnt is %d\n ",
0e9bb8d7 19730 txq_cnt);
a629852a
JS
19731 break;
19732 }
895427bd 19733 sglq = __lpfc_sli_get_els_sglq(phba, piocbq);
2a9bf3d0 19734 if (!sglq) {
19ca7609 19735 __lpfc_sli_ringtx_put(phba, pring, piocbq);
398d81c9 19736 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19737 break;
2a9bf3d0 19738 }
0e9bb8d7 19739 txq_cnt--;
2a9bf3d0
JS
19740
19741 /* The xri and iocb resources secured,
19742 * attempt to issue request
19743 */
6d368e53 19744 piocbq->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0
JS
19745 piocbq->sli4_xritag = sglq->sli4_xritag;
19746 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocbq, sglq))
19747 fail_msg = "to convert bpl to sgl";
205e8240 19748 else if (lpfc_sli4_iocb2wqe(phba, piocbq, &wqe))
2a9bf3d0 19749 fail_msg = "to convert iocb to wqe";
dc19e3b4 19750 else if (lpfc_sli4_wq_put(wq, &wqe))
2a9bf3d0
JS
19751 fail_msg = " - Wq is full";
19752 else
19753 lpfc_sli_ringtxcmpl_put(phba, pring, piocbq);
19754
19755 if (fail_msg) {
19756 /* Failed means we can't issue and need to cancel */
19757 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19758 "2822 IOCB failed %s iotag 0x%x "
19759 "xri 0x%x\n",
19760 fail_msg,
19761 piocbq->iotag, piocbq->sli4_xritag);
19762 list_add_tail(&piocbq->list, &completions);
19763 }
398d81c9 19764 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0
JS
19765 }
19766
2a9bf3d0
JS
19767 /* Cancel all the IOCBs that cannot be issued */
19768 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
19769 IOERR_SLI_ABORTED);
19770
0e9bb8d7 19771 return txq_cnt;
2a9bf3d0 19772}
895427bd
JS
19773
19774/**
19775 * lpfc_wqe_bpl2sgl - Convert the bpl/bde to a sgl.
19776 * @phba: Pointer to HBA context object.
19777 * @pwqe: Pointer to command WQE.
19778 * @sglq: Pointer to the scatter gather queue object.
19779 *
19780 * This routine converts the bpl or bde that is in the WQE
19781 * to a sgl list for the sli4 hardware. The physical address
19782 * of the bpl/bde is converted back to a virtual address.
19783 * If the WQE contains a BPL then the list of BDE's is
19784 * converted to sli4_sge's. If the WQE contains a single
19785 * BDE then it is converted to a single sli_sge.
19786 * The WQE is still in cpu endianness so the contents of
19787 * the bpl can be used without byte swapping.
19788 *
19789 * Returns valid XRI = Success, NO_XRI = Failure.
19790 */
19791static uint16_t
19792lpfc_wqe_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *pwqeq,
19793 struct lpfc_sglq *sglq)
19794{
19795 uint16_t xritag = NO_XRI;
19796 struct ulp_bde64 *bpl = NULL;
19797 struct ulp_bde64 bde;
19798 struct sli4_sge *sgl = NULL;
19799 struct lpfc_dmabuf *dmabuf;
205e8240 19800 union lpfc_wqe128 *wqe;
895427bd
JS
19801 int numBdes = 0;
19802 int i = 0;
19803 uint32_t offset = 0; /* accumulated offset in the sg request list */
19804 int inbound = 0; /* number of sg reply entries inbound from firmware */
19805 uint32_t cmd;
19806
19807 if (!pwqeq || !sglq)
19808 return xritag;
19809
19810 sgl = (struct sli4_sge *)sglq->sgl;
19811 wqe = &pwqeq->wqe;
19812 pwqeq->iocb.ulpIoTag = pwqeq->iotag;
19813
19814 cmd = bf_get(wqe_cmnd, &wqe->generic.wqe_com);
19815 if (cmd == CMD_XMIT_BLS_RSP64_WQE)
19816 return sglq->sli4_xritag;
19817 numBdes = pwqeq->rsvd2;
19818 if (numBdes) {
19819 /* The addrHigh and addrLow fields within the WQE
19820 * have not been byteswapped yet so there is no
19821 * need to swap them back.
19822 */
19823 if (pwqeq->context3)
19824 dmabuf = (struct lpfc_dmabuf *)pwqeq->context3;
19825 else
19826 return xritag;
19827
19828 bpl = (struct ulp_bde64 *)dmabuf->virt;
19829 if (!bpl)
19830 return xritag;
19831
19832 for (i = 0; i < numBdes; i++) {
19833 /* Should already be byte swapped. */
19834 sgl->addr_hi = bpl->addrHigh;
19835 sgl->addr_lo = bpl->addrLow;
19836
19837 sgl->word2 = le32_to_cpu(sgl->word2);
19838 if ((i+1) == numBdes)
19839 bf_set(lpfc_sli4_sge_last, sgl, 1);
19840 else
19841 bf_set(lpfc_sli4_sge_last, sgl, 0);
19842 /* swap the size field back to the cpu so we
19843 * can assign it to the sgl.
19844 */
19845 bde.tus.w = le32_to_cpu(bpl->tus.w);
19846 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
19847 /* The offsets in the sgl need to be accumulated
19848 * separately for the request and reply lists.
19849 * The request is always first, the reply follows.
19850 */
19851 switch (cmd) {
19852 case CMD_GEN_REQUEST64_WQE:
19853 /* add up the reply sg entries */
19854 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
19855 inbound++;
19856 /* first inbound? reset the offset */
19857 if (inbound == 1)
19858 offset = 0;
19859 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19860 bf_set(lpfc_sli4_sge_type, sgl,
19861 LPFC_SGE_TYPE_DATA);
19862 offset += bde.tus.f.bdeSize;
19863 break;
19864 case CMD_FCP_TRSP64_WQE:
19865 bf_set(lpfc_sli4_sge_offset, sgl, 0);
19866 bf_set(lpfc_sli4_sge_type, sgl,
19867 LPFC_SGE_TYPE_DATA);
19868 break;
19869 case CMD_FCP_TSEND64_WQE:
19870 case CMD_FCP_TRECEIVE64_WQE:
19871 bf_set(lpfc_sli4_sge_type, sgl,
19872 bpl->tus.f.bdeFlags);
19873 if (i < 3)
19874 offset = 0;
19875 else
19876 offset += bde.tus.f.bdeSize;
19877 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19878 break;
19879 }
19880 sgl->word2 = cpu_to_le32(sgl->word2);
19881 bpl++;
19882 sgl++;
19883 }
19884 } else if (wqe->gen_req.bde.tus.f.bdeFlags == BUFF_TYPE_BDE_64) {
19885 /* The addrHigh and addrLow fields of the BDE have not
19886 * been byteswapped yet so they need to be swapped
19887 * before putting them in the sgl.
19888 */
19889 sgl->addr_hi = cpu_to_le32(wqe->gen_req.bde.addrHigh);
19890 sgl->addr_lo = cpu_to_le32(wqe->gen_req.bde.addrLow);
19891 sgl->word2 = le32_to_cpu(sgl->word2);
19892 bf_set(lpfc_sli4_sge_last, sgl, 1);
19893 sgl->word2 = cpu_to_le32(sgl->word2);
19894 sgl->sge_len = cpu_to_le32(wqe->gen_req.bde.tus.f.bdeSize);
19895 }
19896 return sglq->sli4_xritag;
19897}
19898
19899/**
19900 * lpfc_sli4_issue_wqe - Issue an SLI4 Work Queue Entry (WQE)
19901 * @phba: Pointer to HBA context object.
19902 * @ring_number: Base sli ring number
19903 * @pwqe: Pointer to command WQE.
19904 **/
19905int
1fbf9742 19906lpfc_sli4_issue_wqe(struct lpfc_hba *phba, struct lpfc_sli4_hdw_queue *qp,
895427bd
JS
19907 struct lpfc_iocbq *pwqe)
19908{
205e8240 19909 union lpfc_wqe128 *wqe = &pwqe->wqe;
f358dd0c 19910 struct lpfc_nvmet_rcv_ctx *ctxp;
895427bd
JS
19911 struct lpfc_queue *wq;
19912 struct lpfc_sglq *sglq;
19913 struct lpfc_sli_ring *pring;
19914 unsigned long iflags;
cd22d605 19915 uint32_t ret = 0;
895427bd
JS
19916
19917 /* NVME_LS and NVME_LS ABTS requests. */
19918 if (pwqe->iocb_flag & LPFC_IO_NVME_LS) {
19919 pring = phba->sli4_hba.nvmels_wq->pring;
6a828b0f
JS
19920 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
19921 qp, wq_access);
895427bd
JS
19922 sglq = __lpfc_sli_get_els_sglq(phba, pwqe);
19923 if (!sglq) {
19924 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19925 return WQE_BUSY;
19926 }
19927 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19928 pwqe->sli4_xritag = sglq->sli4_xritag;
19929 if (lpfc_wqe_bpl2sgl(phba, pwqe, sglq) == NO_XRI) {
19930 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19931 return WQE_ERROR;
19932 }
19933 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19934 pwqe->sli4_xritag);
cd22d605
DK
19935 ret = lpfc_sli4_wq_put(phba->sli4_hba.nvmels_wq, wqe);
19936 if (ret) {
895427bd 19937 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19938 return ret;
895427bd 19939 }
cd22d605 19940
895427bd
JS
19941 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19942 spin_unlock_irqrestore(&pring->ring_lock, iflags);
93a4d6f4
JS
19943
19944 lpfc_sli4_poll_eq(qp->hba_eq, LPFC_POLL_FASTPATH);
895427bd
JS
19945 return 0;
19946 }
19947
19948 /* NVME_FCREQ and NVME_ABTS requests */
19949 if (pwqe->iocb_flag & LPFC_IO_NVME) {
19950 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
c00f62e6 19951 wq = qp->io_wq;
1fbf9742 19952 pring = wq->pring;
895427bd 19953
c00f62e6 19954 bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->io_cq_map);
895427bd 19955
6a828b0f
JS
19956 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
19957 qp, wq_access);
cd22d605
DK
19958 ret = lpfc_sli4_wq_put(wq, wqe);
19959 if (ret) {
895427bd 19960 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19961 return ret;
895427bd
JS
19962 }
19963 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19964 spin_unlock_irqrestore(&pring->ring_lock, iflags);
93a4d6f4
JS
19965
19966 lpfc_sli4_poll_eq(qp->hba_eq, LPFC_POLL_FASTPATH);
895427bd
JS
19967 return 0;
19968 }
19969
f358dd0c
JS
19970 /* NVMET requests */
19971 if (pwqe->iocb_flag & LPFC_IO_NVMET) {
19972 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
c00f62e6 19973 wq = qp->io_wq;
1fbf9742 19974 pring = wq->pring;
f358dd0c 19975
f358dd0c 19976 ctxp = pwqe->context2;
6c621a22 19977 sglq = ctxp->ctxbuf->sglq;
f358dd0c
JS
19978 if (pwqe->sli4_xritag == NO_XRI) {
19979 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19980 pwqe->sli4_xritag = sglq->sli4_xritag;
19981 }
19982 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19983 pwqe->sli4_xritag);
c00f62e6 19984 bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->io_cq_map);
1fbf9742 19985
6a828b0f
JS
19986 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
19987 qp, wq_access);
cd22d605
DK
19988 ret = lpfc_sli4_wq_put(wq, wqe);
19989 if (ret) {
f358dd0c 19990 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19991 return ret;
f358dd0c
JS
19992 }
19993 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19994 spin_unlock_irqrestore(&pring->ring_lock, iflags);
93a4d6f4
JS
19995
19996 lpfc_sli4_poll_eq(qp->hba_eq, LPFC_POLL_FASTPATH);
f358dd0c
JS
19997 return 0;
19998 }
895427bd
JS
19999 return WQE_ERROR;
20000}
c490850a
JS
20001
20002#ifdef LPFC_MXP_STAT
20003/**
20004 * lpfc_snapshot_mxp - Snapshot pbl, pvt and busy count
20005 * @phba: pointer to lpfc hba data structure.
20006 * @hwqid: belong to which HWQ.
20007 *
20008 * The purpose of this routine is to take a snapshot of pbl, pvt and busy count
20009 * 15 seconds after a test case is running.
20010 *
20011 * The user should call lpfc_debugfs_multixripools_write before running a test
20012 * case to clear stat_snapshot_taken. Then the user starts a test case. During
20013 * test case is running, stat_snapshot_taken is incremented by 1 every time when
20014 * this routine is called from heartbeat timer. When stat_snapshot_taken is
20015 * equal to LPFC_MXP_SNAPSHOT_TAKEN, a snapshot is taken.
20016 **/
20017void lpfc_snapshot_mxp(struct lpfc_hba *phba, u32 hwqid)
20018{
20019 struct lpfc_sli4_hdw_queue *qp;
20020 struct lpfc_multixri_pool *multixri_pool;
20021 struct lpfc_pvt_pool *pvt_pool;
20022 struct lpfc_pbl_pool *pbl_pool;
20023 u32 txcmplq_cnt;
20024
20025 qp = &phba->sli4_hba.hdwq[hwqid];
20026 multixri_pool = qp->p_multixri_pool;
20027 if (!multixri_pool)
20028 return;
20029
20030 if (multixri_pool->stat_snapshot_taken == LPFC_MXP_SNAPSHOT_TAKEN) {
20031 pvt_pool = &qp->p_multixri_pool->pvt_pool;
20032 pbl_pool = &qp->p_multixri_pool->pbl_pool;
c00f62e6 20033 txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt;
c490850a
JS
20034
20035 multixri_pool->stat_pbl_count = pbl_pool->count;
20036 multixri_pool->stat_pvt_count = pvt_pool->count;
20037 multixri_pool->stat_busy_count = txcmplq_cnt;
20038 }
20039
20040 multixri_pool->stat_snapshot_taken++;
20041}
20042#endif
20043
20044/**
20045 * lpfc_adjust_pvt_pool_count - Adjust private pool count
20046 * @phba: pointer to lpfc hba data structure.
20047 * @hwqid: belong to which HWQ.
20048 *
20049 * This routine moves some XRIs from private to public pool when private pool
20050 * is not busy.
20051 **/
20052void lpfc_adjust_pvt_pool_count(struct lpfc_hba *phba, u32 hwqid)
20053{
20054 struct lpfc_multixri_pool *multixri_pool;
20055 u32 io_req_count;
20056 u32 prev_io_req_count;
20057
20058 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
20059 if (!multixri_pool)
20060 return;
20061 io_req_count = multixri_pool->io_req_count;
20062 prev_io_req_count = multixri_pool->prev_io_req_count;
20063
20064 if (prev_io_req_count != io_req_count) {
20065 /* Private pool is busy */
20066 multixri_pool->prev_io_req_count = io_req_count;
20067 } else {
20068 /* Private pool is not busy.
20069 * Move XRIs from private to public pool.
20070 */
20071 lpfc_move_xri_pvt_to_pbl(phba, hwqid);
20072 }
20073}
20074
20075/**
20076 * lpfc_adjust_high_watermark - Adjust high watermark
20077 * @phba: pointer to lpfc hba data structure.
20078 * @hwqid: belong to which HWQ.
20079 *
20080 * This routine sets high watermark as number of outstanding XRIs,
20081 * but make sure the new value is between xri_limit/2 and xri_limit.
20082 **/
20083void lpfc_adjust_high_watermark(struct lpfc_hba *phba, u32 hwqid)
20084{
20085 u32 new_watermark;
20086 u32 watermark_max;
20087 u32 watermark_min;
20088 u32 xri_limit;
20089 u32 txcmplq_cnt;
20090 u32 abts_io_bufs;
20091 struct lpfc_multixri_pool *multixri_pool;
20092 struct lpfc_sli4_hdw_queue *qp;
20093
20094 qp = &phba->sli4_hba.hdwq[hwqid];
20095 multixri_pool = qp->p_multixri_pool;
20096 if (!multixri_pool)
20097 return;
20098 xri_limit = multixri_pool->xri_limit;
20099
20100 watermark_max = xri_limit;
20101 watermark_min = xri_limit / 2;
20102
c00f62e6 20103 txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt;
c490850a 20104 abts_io_bufs = qp->abts_scsi_io_bufs;
c00f62e6 20105 abts_io_bufs += qp->abts_nvme_io_bufs;
c490850a
JS
20106
20107 new_watermark = txcmplq_cnt + abts_io_bufs;
20108 new_watermark = min(watermark_max, new_watermark);
20109 new_watermark = max(watermark_min, new_watermark);
20110 multixri_pool->pvt_pool.high_watermark = new_watermark;
20111
20112#ifdef LPFC_MXP_STAT
20113 multixri_pool->stat_max_hwm = max(multixri_pool->stat_max_hwm,
20114 new_watermark);
20115#endif
20116}
20117
20118/**
20119 * lpfc_move_xri_pvt_to_pbl - Move some XRIs from private to public pool
20120 * @phba: pointer to lpfc hba data structure.
20121 * @hwqid: belong to which HWQ.
20122 *
20123 * This routine is called from hearbeat timer when pvt_pool is idle.
20124 * All free XRIs are moved from private to public pool on hwqid with 2 steps.
20125 * The first step moves (all - low_watermark) amount of XRIs.
20126 * The second step moves the rest of XRIs.
20127 **/
20128void lpfc_move_xri_pvt_to_pbl(struct lpfc_hba *phba, u32 hwqid)
20129{
20130 struct lpfc_pbl_pool *pbl_pool;
20131 struct lpfc_pvt_pool *pvt_pool;
6a828b0f 20132 struct lpfc_sli4_hdw_queue *qp;
c490850a
JS
20133 struct lpfc_io_buf *lpfc_ncmd;
20134 struct lpfc_io_buf *lpfc_ncmd_next;
20135 unsigned long iflag;
20136 struct list_head tmp_list;
20137 u32 tmp_count;
20138
6a828b0f
JS
20139 qp = &phba->sli4_hba.hdwq[hwqid];
20140 pbl_pool = &qp->p_multixri_pool->pbl_pool;
20141 pvt_pool = &qp->p_multixri_pool->pvt_pool;
c490850a
JS
20142 tmp_count = 0;
20143
6a828b0f
JS
20144 lpfc_qp_spin_lock_irqsave(&pbl_pool->lock, iflag, qp, mv_to_pub_pool);
20145 lpfc_qp_spin_lock(&pvt_pool->lock, qp, mv_from_pvt_pool);
c490850a
JS
20146
20147 if (pvt_pool->count > pvt_pool->low_watermark) {
20148 /* Step 1: move (all - low_watermark) from pvt_pool
20149 * to pbl_pool
20150 */
20151
20152 /* Move low watermark of bufs from pvt_pool to tmp_list */
20153 INIT_LIST_HEAD(&tmp_list);
20154 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20155 &pvt_pool->list, list) {
20156 list_move_tail(&lpfc_ncmd->list, &tmp_list);
20157 tmp_count++;
20158 if (tmp_count >= pvt_pool->low_watermark)
20159 break;
20160 }
20161
20162 /* Move all bufs from pvt_pool to pbl_pool */
20163 list_splice_init(&pvt_pool->list, &pbl_pool->list);
20164
20165 /* Move all bufs from tmp_list to pvt_pool */
20166 list_splice(&tmp_list, &pvt_pool->list);
20167
20168 pbl_pool->count += (pvt_pool->count - tmp_count);
20169 pvt_pool->count = tmp_count;
20170 } else {
20171 /* Step 2: move the rest from pvt_pool to pbl_pool */
20172 list_splice_init(&pvt_pool->list, &pbl_pool->list);
20173 pbl_pool->count += pvt_pool->count;
20174 pvt_pool->count = 0;
20175 }
20176
20177 spin_unlock(&pvt_pool->lock);
20178 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20179}
20180
20181/**
20182 * _lpfc_move_xri_pbl_to_pvt - Move some XRIs from public to private pool
20183 * @phba: pointer to lpfc hba data structure
20184 * @pbl_pool: specified public free XRI pool
20185 * @pvt_pool: specified private free XRI pool
20186 * @count: number of XRIs to move
20187 *
20188 * This routine tries to move some free common bufs from the specified pbl_pool
20189 * to the specified pvt_pool. It might move less than count XRIs if there's not
20190 * enough in public pool.
20191 *
20192 * Return:
20193 * true - if XRIs are successfully moved from the specified pbl_pool to the
20194 * specified pvt_pool
20195 * false - if the specified pbl_pool is empty or locked by someone else
20196 **/
20197static bool
6a828b0f
JS
20198_lpfc_move_xri_pbl_to_pvt(struct lpfc_hba *phba, struct lpfc_sli4_hdw_queue *qp,
20199 struct lpfc_pbl_pool *pbl_pool,
c490850a
JS
20200 struct lpfc_pvt_pool *pvt_pool, u32 count)
20201{
20202 struct lpfc_io_buf *lpfc_ncmd;
20203 struct lpfc_io_buf *lpfc_ncmd_next;
20204 unsigned long iflag;
20205 int ret;
20206
20207 ret = spin_trylock_irqsave(&pbl_pool->lock, iflag);
20208 if (ret) {
20209 if (pbl_pool->count) {
20210 /* Move a batch of XRIs from public to private pool */
6a828b0f 20211 lpfc_qp_spin_lock(&pvt_pool->lock, qp, mv_to_pvt_pool);
c490850a
JS
20212 list_for_each_entry_safe(lpfc_ncmd,
20213 lpfc_ncmd_next,
20214 &pbl_pool->list,
20215 list) {
20216 list_move_tail(&lpfc_ncmd->list,
20217 &pvt_pool->list);
20218 pvt_pool->count++;
20219 pbl_pool->count--;
20220 count--;
20221 if (count == 0)
20222 break;
20223 }
20224
20225 spin_unlock(&pvt_pool->lock);
20226 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20227 return true;
20228 }
20229 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20230 }
20231
20232 return false;
20233}
20234
20235/**
20236 * lpfc_move_xri_pbl_to_pvt - Move some XRIs from public to private pool
20237 * @phba: pointer to lpfc hba data structure.
20238 * @hwqid: belong to which HWQ.
20239 * @count: number of XRIs to move
20240 *
20241 * This routine tries to find some free common bufs in one of public pools with
20242 * Round Robin method. The search always starts from local hwqid, then the next
20243 * HWQ which was found last time (rrb_next_hwqid). Once a public pool is found,
20244 * a batch of free common bufs are moved to private pool on hwqid.
20245 * It might move less than count XRIs if there's not enough in public pool.
20246 **/
20247void lpfc_move_xri_pbl_to_pvt(struct lpfc_hba *phba, u32 hwqid, u32 count)
20248{
20249 struct lpfc_multixri_pool *multixri_pool;
20250 struct lpfc_multixri_pool *next_multixri_pool;
20251 struct lpfc_pvt_pool *pvt_pool;
20252 struct lpfc_pbl_pool *pbl_pool;
6a828b0f 20253 struct lpfc_sli4_hdw_queue *qp;
c490850a
JS
20254 u32 next_hwqid;
20255 u32 hwq_count;
20256 int ret;
20257
6a828b0f
JS
20258 qp = &phba->sli4_hba.hdwq[hwqid];
20259 multixri_pool = qp->p_multixri_pool;
c490850a
JS
20260 pvt_pool = &multixri_pool->pvt_pool;
20261 pbl_pool = &multixri_pool->pbl_pool;
20262
20263 /* Check if local pbl_pool is available */
6a828b0f 20264 ret = _lpfc_move_xri_pbl_to_pvt(phba, qp, pbl_pool, pvt_pool, count);
c490850a
JS
20265 if (ret) {
20266#ifdef LPFC_MXP_STAT
20267 multixri_pool->local_pbl_hit_count++;
20268#endif
20269 return;
20270 }
20271
20272 hwq_count = phba->cfg_hdw_queue;
20273
20274 /* Get the next hwqid which was found last time */
20275 next_hwqid = multixri_pool->rrb_next_hwqid;
20276
20277 do {
20278 /* Go to next hwq */
20279 next_hwqid = (next_hwqid + 1) % hwq_count;
20280
20281 next_multixri_pool =
20282 phba->sli4_hba.hdwq[next_hwqid].p_multixri_pool;
20283 pbl_pool = &next_multixri_pool->pbl_pool;
20284
20285 /* Check if the public free xri pool is available */
20286 ret = _lpfc_move_xri_pbl_to_pvt(
6a828b0f 20287 phba, qp, pbl_pool, pvt_pool, count);
c490850a
JS
20288
20289 /* Exit while-loop if success or all hwqid are checked */
20290 } while (!ret && next_hwqid != multixri_pool->rrb_next_hwqid);
20291
20292 /* Starting point for the next time */
20293 multixri_pool->rrb_next_hwqid = next_hwqid;
20294
20295 if (!ret) {
20296 /* stats: all public pools are empty*/
20297 multixri_pool->pbl_empty_count++;
20298 }
20299
20300#ifdef LPFC_MXP_STAT
20301 if (ret) {
20302 if (next_hwqid == hwqid)
20303 multixri_pool->local_pbl_hit_count++;
20304 else
20305 multixri_pool->other_pbl_hit_count++;
20306 }
20307#endif
20308}
20309
20310/**
20311 * lpfc_keep_pvt_pool_above_lowwm - Keep pvt_pool above low watermark
20312 * @phba: pointer to lpfc hba data structure.
20313 * @qp: belong to which HWQ.
20314 *
20315 * This routine get a batch of XRIs from pbl_pool if pvt_pool is less than
20316 * low watermark.
20317 **/
20318void lpfc_keep_pvt_pool_above_lowwm(struct lpfc_hba *phba, u32 hwqid)
20319{
20320 struct lpfc_multixri_pool *multixri_pool;
20321 struct lpfc_pvt_pool *pvt_pool;
20322
20323 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
20324 pvt_pool = &multixri_pool->pvt_pool;
20325
20326 if (pvt_pool->count < pvt_pool->low_watermark)
20327 lpfc_move_xri_pbl_to_pvt(phba, hwqid, XRI_BATCH);
20328}
20329
20330/**
20331 * lpfc_release_io_buf - Return one IO buf back to free pool
20332 * @phba: pointer to lpfc hba data structure.
20333 * @lpfc_ncmd: IO buf to be returned.
20334 * @qp: belong to which HWQ.
20335 *
20336 * This routine returns one IO buf back to free pool. If this is an urgent IO,
20337 * the IO buf is returned to expedite pool. If cfg_xri_rebalancing==1,
20338 * the IO buf is returned to pbl_pool or pvt_pool based on watermark and
20339 * xri_limit. If cfg_xri_rebalancing==0, the IO buf is returned to
20340 * lpfc_io_buf_list_put.
20341 **/
20342void lpfc_release_io_buf(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_ncmd,
20343 struct lpfc_sli4_hdw_queue *qp)
20344{
20345 unsigned long iflag;
20346 struct lpfc_pbl_pool *pbl_pool;
20347 struct lpfc_pvt_pool *pvt_pool;
20348 struct lpfc_epd_pool *epd_pool;
20349 u32 txcmplq_cnt;
20350 u32 xri_owned;
20351 u32 xri_limit;
20352 u32 abts_io_bufs;
20353
20354 /* MUST zero fields if buffer is reused by another protocol */
20355 lpfc_ncmd->nvmeCmd = NULL;
20356 lpfc_ncmd->cur_iocbq.wqe_cmpl = NULL;
20357 lpfc_ncmd->cur_iocbq.iocb_cmpl = NULL;
20358
35a635af
JS
20359 if (phba->cfg_xpsgl && !phba->nvmet_support &&
20360 !list_empty(&lpfc_ncmd->dma_sgl_xtra_list))
20361 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
20362
20363 if (!list_empty(&lpfc_ncmd->dma_cmd_rsp_list))
20364 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
20365
c490850a
JS
20366 if (phba->cfg_xri_rebalancing) {
20367 if (lpfc_ncmd->expedite) {
20368 /* Return to expedite pool */
20369 epd_pool = &phba->epd_pool;
20370 spin_lock_irqsave(&epd_pool->lock, iflag);
20371 list_add_tail(&lpfc_ncmd->list, &epd_pool->list);
20372 epd_pool->count++;
20373 spin_unlock_irqrestore(&epd_pool->lock, iflag);
20374 return;
20375 }
20376
20377 /* Avoid invalid access if an IO sneaks in and is being rejected
20378 * just _after_ xri pools are destroyed in lpfc_offline.
20379 * Nothing much can be done at this point.
20380 */
20381 if (!qp->p_multixri_pool)
20382 return;
20383
20384 pbl_pool = &qp->p_multixri_pool->pbl_pool;
20385 pvt_pool = &qp->p_multixri_pool->pvt_pool;
20386
c00f62e6 20387 txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt;
c490850a 20388 abts_io_bufs = qp->abts_scsi_io_bufs;
c00f62e6 20389 abts_io_bufs += qp->abts_nvme_io_bufs;
c490850a
JS
20390
20391 xri_owned = pvt_pool->count + txcmplq_cnt + abts_io_bufs;
20392 xri_limit = qp->p_multixri_pool->xri_limit;
20393
20394#ifdef LPFC_MXP_STAT
20395 if (xri_owned <= xri_limit)
20396 qp->p_multixri_pool->below_limit_count++;
20397 else
20398 qp->p_multixri_pool->above_limit_count++;
20399#endif
20400
20401 /* XRI goes to either public or private free xri pool
20402 * based on watermark and xri_limit
20403 */
20404 if ((pvt_pool->count < pvt_pool->low_watermark) ||
20405 (xri_owned < xri_limit &&
20406 pvt_pool->count < pvt_pool->high_watermark)) {
6a828b0f
JS
20407 lpfc_qp_spin_lock_irqsave(&pvt_pool->lock, iflag,
20408 qp, free_pvt_pool);
c490850a
JS
20409 list_add_tail(&lpfc_ncmd->list,
20410 &pvt_pool->list);
20411 pvt_pool->count++;
20412 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20413 } else {
6a828b0f
JS
20414 lpfc_qp_spin_lock_irqsave(&pbl_pool->lock, iflag,
20415 qp, free_pub_pool);
c490850a
JS
20416 list_add_tail(&lpfc_ncmd->list,
20417 &pbl_pool->list);
20418 pbl_pool->count++;
20419 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20420 }
20421 } else {
6a828b0f
JS
20422 lpfc_qp_spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag,
20423 qp, free_xri);
c490850a
JS
20424 list_add_tail(&lpfc_ncmd->list,
20425 &qp->lpfc_io_buf_list_put);
20426 qp->put_io_bufs++;
20427 spin_unlock_irqrestore(&qp->io_buf_list_put_lock,
20428 iflag);
20429 }
20430}
20431
20432/**
20433 * lpfc_get_io_buf_from_private_pool - Get one free IO buf from private pool
20434 * @phba: pointer to lpfc hba data structure.
20435 * @pvt_pool: pointer to private pool data structure.
20436 * @ndlp: pointer to lpfc nodelist data structure.
20437 *
20438 * This routine tries to get one free IO buf from private pool.
20439 *
20440 * Return:
20441 * pointer to one free IO buf - if private pool is not empty
20442 * NULL - if private pool is empty
20443 **/
20444static struct lpfc_io_buf *
20445lpfc_get_io_buf_from_private_pool(struct lpfc_hba *phba,
6a828b0f 20446 struct lpfc_sli4_hdw_queue *qp,
c490850a
JS
20447 struct lpfc_pvt_pool *pvt_pool,
20448 struct lpfc_nodelist *ndlp)
20449{
20450 struct lpfc_io_buf *lpfc_ncmd;
20451 struct lpfc_io_buf *lpfc_ncmd_next;
20452 unsigned long iflag;
20453
6a828b0f 20454 lpfc_qp_spin_lock_irqsave(&pvt_pool->lock, iflag, qp, alloc_pvt_pool);
c490850a
JS
20455 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20456 &pvt_pool->list, list) {
20457 if (lpfc_test_rrq_active(
20458 phba, ndlp, lpfc_ncmd->cur_iocbq.sli4_lxritag))
20459 continue;
20460 list_del(&lpfc_ncmd->list);
20461 pvt_pool->count--;
20462 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20463 return lpfc_ncmd;
20464 }
20465 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20466
20467 return NULL;
20468}
20469
20470/**
20471 * lpfc_get_io_buf_from_expedite_pool - Get one free IO buf from expedite pool
20472 * @phba: pointer to lpfc hba data structure.
20473 *
20474 * This routine tries to get one free IO buf from expedite pool.
20475 *
20476 * Return:
20477 * pointer to one free IO buf - if expedite pool is not empty
20478 * NULL - if expedite pool is empty
20479 **/
20480static struct lpfc_io_buf *
20481lpfc_get_io_buf_from_expedite_pool(struct lpfc_hba *phba)
20482{
20483 struct lpfc_io_buf *lpfc_ncmd;
20484 struct lpfc_io_buf *lpfc_ncmd_next;
20485 unsigned long iflag;
20486 struct lpfc_epd_pool *epd_pool;
20487
20488 epd_pool = &phba->epd_pool;
20489 lpfc_ncmd = NULL;
20490
20491 spin_lock_irqsave(&epd_pool->lock, iflag);
20492 if (epd_pool->count > 0) {
20493 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20494 &epd_pool->list, list) {
20495 list_del(&lpfc_ncmd->list);
20496 epd_pool->count--;
20497 break;
20498 }
20499 }
20500 spin_unlock_irqrestore(&epd_pool->lock, iflag);
20501
20502 return lpfc_ncmd;
20503}
20504
20505/**
20506 * lpfc_get_io_buf_from_multixri_pools - Get one free IO bufs
20507 * @phba: pointer to lpfc hba data structure.
20508 * @ndlp: pointer to lpfc nodelist data structure.
20509 * @hwqid: belong to which HWQ
20510 * @expedite: 1 means this request is urgent.
20511 *
20512 * This routine will do the following actions and then return a pointer to
20513 * one free IO buf.
20514 *
20515 * 1. If private free xri count is empty, move some XRIs from public to
20516 * private pool.
20517 * 2. Get one XRI from private free xri pool.
20518 * 3. If we fail to get one from pvt_pool and this is an expedite request,
20519 * get one free xri from expedite pool.
20520 *
20521 * Note: ndlp is only used on SCSI side for RRQ testing.
20522 * The caller should pass NULL for ndlp on NVME side.
20523 *
20524 * Return:
20525 * pointer to one free IO buf - if private pool is not empty
20526 * NULL - if private pool is empty
20527 **/
20528static struct lpfc_io_buf *
20529lpfc_get_io_buf_from_multixri_pools(struct lpfc_hba *phba,
20530 struct lpfc_nodelist *ndlp,
20531 int hwqid, int expedite)
20532{
20533 struct lpfc_sli4_hdw_queue *qp;
20534 struct lpfc_multixri_pool *multixri_pool;
20535 struct lpfc_pvt_pool *pvt_pool;
20536 struct lpfc_io_buf *lpfc_ncmd;
20537
20538 qp = &phba->sli4_hba.hdwq[hwqid];
20539 lpfc_ncmd = NULL;
20540 multixri_pool = qp->p_multixri_pool;
20541 pvt_pool = &multixri_pool->pvt_pool;
20542 multixri_pool->io_req_count++;
20543
20544 /* If pvt_pool is empty, move some XRIs from public to private pool */
20545 if (pvt_pool->count == 0)
20546 lpfc_move_xri_pbl_to_pvt(phba, hwqid, XRI_BATCH);
20547
20548 /* Get one XRI from private free xri pool */
6a828b0f 20549 lpfc_ncmd = lpfc_get_io_buf_from_private_pool(phba, qp, pvt_pool, ndlp);
c490850a
JS
20550
20551 if (lpfc_ncmd) {
20552 lpfc_ncmd->hdwq = qp;
20553 lpfc_ncmd->hdwq_no = hwqid;
20554 } else if (expedite) {
20555 /* If we fail to get one from pvt_pool and this is an expedite
20556 * request, get one free xri from expedite pool.
20557 */
20558 lpfc_ncmd = lpfc_get_io_buf_from_expedite_pool(phba);
20559 }
20560
20561 return lpfc_ncmd;
20562}
20563
20564static inline struct lpfc_io_buf *
20565lpfc_io_buf(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, int idx)
20566{
20567 struct lpfc_sli4_hdw_queue *qp;
20568 struct lpfc_io_buf *lpfc_cmd, *lpfc_cmd_next;
20569
20570 qp = &phba->sli4_hba.hdwq[idx];
20571 list_for_each_entry_safe(lpfc_cmd, lpfc_cmd_next,
20572 &qp->lpfc_io_buf_list_get, list) {
20573 if (lpfc_test_rrq_active(phba, ndlp,
20574 lpfc_cmd->cur_iocbq.sli4_lxritag))
20575 continue;
20576
20577 if (lpfc_cmd->flags & LPFC_SBUF_NOT_POSTED)
20578 continue;
20579
20580 list_del_init(&lpfc_cmd->list);
20581 qp->get_io_bufs--;
20582 lpfc_cmd->hdwq = qp;
20583 lpfc_cmd->hdwq_no = idx;
20584 return lpfc_cmd;
20585 }
20586 return NULL;
20587}
20588
20589/**
20590 * lpfc_get_io_buf - Get one IO buffer from free pool
20591 * @phba: The HBA for which this call is being executed.
20592 * @ndlp: pointer to lpfc nodelist data structure.
20593 * @hwqid: belong to which HWQ
20594 * @expedite: 1 means this request is urgent.
20595 *
20596 * This routine gets one IO buffer from free pool. If cfg_xri_rebalancing==1,
20597 * removes a IO buffer from multiXRI pools. If cfg_xri_rebalancing==0, removes
20598 * a IO buffer from head of @hdwq io_buf_list and returns to caller.
20599 *
20600 * Note: ndlp is only used on SCSI side for RRQ testing.
20601 * The caller should pass NULL for ndlp on NVME side.
20602 *
20603 * Return codes:
20604 * NULL - Error
20605 * Pointer to lpfc_io_buf - Success
20606 **/
20607struct lpfc_io_buf *lpfc_get_io_buf(struct lpfc_hba *phba,
20608 struct lpfc_nodelist *ndlp,
20609 u32 hwqid, int expedite)
20610{
20611 struct lpfc_sli4_hdw_queue *qp;
20612 unsigned long iflag;
20613 struct lpfc_io_buf *lpfc_cmd;
20614
20615 qp = &phba->sli4_hba.hdwq[hwqid];
20616 lpfc_cmd = NULL;
20617
20618 if (phba->cfg_xri_rebalancing)
20619 lpfc_cmd = lpfc_get_io_buf_from_multixri_pools(
20620 phba, ndlp, hwqid, expedite);
20621 else {
6a828b0f
JS
20622 lpfc_qp_spin_lock_irqsave(&qp->io_buf_list_get_lock, iflag,
20623 qp, alloc_xri_get);
c490850a
JS
20624 if (qp->get_io_bufs > LPFC_NVME_EXPEDITE_XRICNT || expedite)
20625 lpfc_cmd = lpfc_io_buf(phba, ndlp, hwqid);
20626 if (!lpfc_cmd) {
6a828b0f
JS
20627 lpfc_qp_spin_lock(&qp->io_buf_list_put_lock,
20628 qp, alloc_xri_put);
c490850a
JS
20629 list_splice(&qp->lpfc_io_buf_list_put,
20630 &qp->lpfc_io_buf_list_get);
20631 qp->get_io_bufs += qp->put_io_bufs;
20632 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
20633 qp->put_io_bufs = 0;
20634 spin_unlock(&qp->io_buf_list_put_lock);
20635 if (qp->get_io_bufs > LPFC_NVME_EXPEDITE_XRICNT ||
20636 expedite)
20637 lpfc_cmd = lpfc_io_buf(phba, ndlp, hwqid);
20638 }
20639 spin_unlock_irqrestore(&qp->io_buf_list_get_lock, iflag);
20640 }
20641
20642 return lpfc_cmd;
20643}
d79c9e9d
JS
20644
20645/**
20646 * lpfc_get_sgl_per_hdwq - Get one SGL chunk from hdwq's pool
20647 * @phba: The HBA for which this call is being executed.
20648 * @lpfc_buf: IO buf structure to append the SGL chunk
20649 *
20650 * This routine gets one SGL chunk buffer from hdwq's SGL chunk pool,
20651 * and will allocate an SGL chunk if the pool is empty.
20652 *
20653 * Return codes:
20654 * NULL - Error
20655 * Pointer to sli4_hybrid_sgl - Success
20656 **/
20657struct sli4_hybrid_sgl *
20658lpfc_get_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_buf)
20659{
20660 struct sli4_hybrid_sgl *list_entry = NULL;
20661 struct sli4_hybrid_sgl *tmp = NULL;
20662 struct sli4_hybrid_sgl *allocated_sgl = NULL;
20663 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20664 struct list_head *buf_list = &hdwq->sgl_list;
a4c21acc 20665 unsigned long iflags;
d79c9e9d 20666
a4c21acc 20667 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20668
20669 if (likely(!list_empty(buf_list))) {
20670 /* break off 1 chunk from the sgl_list */
20671 list_for_each_entry_safe(list_entry, tmp,
20672 buf_list, list_node) {
20673 list_move_tail(&list_entry->list_node,
20674 &lpfc_buf->dma_sgl_xtra_list);
20675 break;
20676 }
20677 } else {
20678 /* allocate more */
a4c21acc 20679 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d 20680 tmp = kmalloc_node(sizeof(*tmp), GFP_ATOMIC,
4583a4f6 20681 cpu_to_node(hdwq->io_wq->chann));
d79c9e9d
JS
20682 if (!tmp) {
20683 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20684 "8353 error kmalloc memory for HDWQ "
20685 "%d %s\n",
20686 lpfc_buf->hdwq_no, __func__);
20687 return NULL;
20688 }
20689
20690 tmp->dma_sgl = dma_pool_alloc(phba->lpfc_sg_dma_buf_pool,
20691 GFP_ATOMIC, &tmp->dma_phys_sgl);
20692 if (!tmp->dma_sgl) {
20693 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20694 "8354 error pool_alloc memory for HDWQ "
20695 "%d %s\n",
20696 lpfc_buf->hdwq_no, __func__);
20697 kfree(tmp);
20698 return NULL;
20699 }
20700
a4c21acc 20701 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20702 list_add_tail(&tmp->list_node, &lpfc_buf->dma_sgl_xtra_list);
20703 }
20704
20705 allocated_sgl = list_last_entry(&lpfc_buf->dma_sgl_xtra_list,
20706 struct sli4_hybrid_sgl,
20707 list_node);
20708
a4c21acc 20709 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20710
20711 return allocated_sgl;
20712}
20713
20714/**
20715 * lpfc_put_sgl_per_hdwq - Put one SGL chunk into hdwq pool
20716 * @phba: The HBA for which this call is being executed.
20717 * @lpfc_buf: IO buf structure with the SGL chunk
20718 *
20719 * This routine puts one SGL chunk buffer into hdwq's SGL chunk pool.
20720 *
20721 * Return codes:
20722 * 0 - Success
20723 * -EINVAL - Error
20724 **/
20725int
20726lpfc_put_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_buf)
20727{
20728 int rc = 0;
20729 struct sli4_hybrid_sgl *list_entry = NULL;
20730 struct sli4_hybrid_sgl *tmp = NULL;
20731 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20732 struct list_head *buf_list = &hdwq->sgl_list;
a4c21acc 20733 unsigned long iflags;
d79c9e9d 20734
a4c21acc 20735 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20736
20737 if (likely(!list_empty(&lpfc_buf->dma_sgl_xtra_list))) {
20738 list_for_each_entry_safe(list_entry, tmp,
20739 &lpfc_buf->dma_sgl_xtra_list,
20740 list_node) {
20741 list_move_tail(&list_entry->list_node,
20742 buf_list);
20743 }
20744 } else {
20745 rc = -EINVAL;
20746 }
20747
a4c21acc 20748 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20749 return rc;
20750}
20751
20752/**
20753 * lpfc_free_sgl_per_hdwq - Free all SGL chunks of hdwq pool
20754 * @phba: phba object
20755 * @hdwq: hdwq to cleanup sgl buff resources on
20756 *
20757 * This routine frees all SGL chunks of hdwq SGL chunk pool.
20758 *
20759 * Return codes:
20760 * None
20761 **/
20762void
20763lpfc_free_sgl_per_hdwq(struct lpfc_hba *phba,
20764 struct lpfc_sli4_hdw_queue *hdwq)
20765{
20766 struct list_head *buf_list = &hdwq->sgl_list;
20767 struct sli4_hybrid_sgl *list_entry = NULL;
20768 struct sli4_hybrid_sgl *tmp = NULL;
a4c21acc 20769 unsigned long iflags;
d79c9e9d 20770
a4c21acc 20771 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20772
20773 /* Free sgl pool */
20774 list_for_each_entry_safe(list_entry, tmp,
20775 buf_list, list_node) {
20776 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
20777 list_entry->dma_sgl,
20778 list_entry->dma_phys_sgl);
20779 list_del(&list_entry->list_node);
20780 kfree(list_entry);
20781 }
20782
a4c21acc 20783 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20784}
20785
20786/**
20787 * lpfc_get_cmd_rsp_buf_per_hdwq - Get one CMD/RSP buffer from hdwq
20788 * @phba: The HBA for which this call is being executed.
20789 * @lpfc_buf: IO buf structure to attach the CMD/RSP buffer
20790 *
20791 * This routine gets one CMD/RSP buffer from hdwq's CMD/RSP pool,
20792 * and will allocate an CMD/RSP buffer if the pool is empty.
20793 *
20794 * Return codes:
20795 * NULL - Error
20796 * Pointer to fcp_cmd_rsp_buf - Success
20797 **/
20798struct fcp_cmd_rsp_buf *
20799lpfc_get_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
20800 struct lpfc_io_buf *lpfc_buf)
20801{
20802 struct fcp_cmd_rsp_buf *list_entry = NULL;
20803 struct fcp_cmd_rsp_buf *tmp = NULL;
20804 struct fcp_cmd_rsp_buf *allocated_buf = NULL;
20805 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20806 struct list_head *buf_list = &hdwq->cmd_rsp_buf_list;
a4c21acc 20807 unsigned long iflags;
d79c9e9d 20808
a4c21acc 20809 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20810
20811 if (likely(!list_empty(buf_list))) {
20812 /* break off 1 chunk from the list */
20813 list_for_each_entry_safe(list_entry, tmp,
20814 buf_list,
20815 list_node) {
20816 list_move_tail(&list_entry->list_node,
20817 &lpfc_buf->dma_cmd_rsp_list);
20818 break;
20819 }
20820 } else {
20821 /* allocate more */
a4c21acc 20822 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d 20823 tmp = kmalloc_node(sizeof(*tmp), GFP_ATOMIC,
4583a4f6 20824 cpu_to_node(hdwq->io_wq->chann));
d79c9e9d
JS
20825 if (!tmp) {
20826 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20827 "8355 error kmalloc memory for HDWQ "
20828 "%d %s\n",
20829 lpfc_buf->hdwq_no, __func__);
20830 return NULL;
20831 }
20832
20833 tmp->fcp_cmnd = dma_pool_alloc(phba->lpfc_cmd_rsp_buf_pool,
20834 GFP_ATOMIC,
20835 &tmp->fcp_cmd_rsp_dma_handle);
20836
20837 if (!tmp->fcp_cmnd) {
20838 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20839 "8356 error pool_alloc memory for HDWQ "
20840 "%d %s\n",
20841 lpfc_buf->hdwq_no, __func__);
20842 kfree(tmp);
20843 return NULL;
20844 }
20845
20846 tmp->fcp_rsp = (struct fcp_rsp *)((uint8_t *)tmp->fcp_cmnd +
20847 sizeof(struct fcp_cmnd));
20848
a4c21acc 20849 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20850 list_add_tail(&tmp->list_node, &lpfc_buf->dma_cmd_rsp_list);
20851 }
20852
20853 allocated_buf = list_last_entry(&lpfc_buf->dma_cmd_rsp_list,
20854 struct fcp_cmd_rsp_buf,
20855 list_node);
20856
a4c21acc 20857 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20858
20859 return allocated_buf;
20860}
20861
20862/**
20863 * lpfc_put_cmd_rsp_buf_per_hdwq - Put one CMD/RSP buffer into hdwq pool
20864 * @phba: The HBA for which this call is being executed.
20865 * @lpfc_buf: IO buf structure with the CMD/RSP buf
20866 *
20867 * This routine puts one CMD/RSP buffer into executing CPU's CMD/RSP pool.
20868 *
20869 * Return codes:
20870 * 0 - Success
20871 * -EINVAL - Error
20872 **/
20873int
20874lpfc_put_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
20875 struct lpfc_io_buf *lpfc_buf)
20876{
20877 int rc = 0;
20878 struct fcp_cmd_rsp_buf *list_entry = NULL;
20879 struct fcp_cmd_rsp_buf *tmp = NULL;
20880 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20881 struct list_head *buf_list = &hdwq->cmd_rsp_buf_list;
a4c21acc 20882 unsigned long iflags;
d79c9e9d 20883
a4c21acc 20884 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20885
20886 if (likely(!list_empty(&lpfc_buf->dma_cmd_rsp_list))) {
20887 list_for_each_entry_safe(list_entry, tmp,
20888 &lpfc_buf->dma_cmd_rsp_list,
20889 list_node) {
20890 list_move_tail(&list_entry->list_node,
20891 buf_list);
20892 }
20893 } else {
20894 rc = -EINVAL;
20895 }
20896
a4c21acc 20897 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20898 return rc;
20899}
20900
20901/**
20902 * lpfc_free_cmd_rsp_buf_per_hdwq - Free all CMD/RSP chunks of hdwq pool
20903 * @phba: phba object
20904 * @hdwq: hdwq to cleanup cmd rsp buff resources on
20905 *
20906 * This routine frees all CMD/RSP buffers of hdwq's CMD/RSP buf pool.
20907 *
20908 * Return codes:
20909 * None
20910 **/
20911void
20912lpfc_free_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
20913 struct lpfc_sli4_hdw_queue *hdwq)
20914{
20915 struct list_head *buf_list = &hdwq->cmd_rsp_buf_list;
20916 struct fcp_cmd_rsp_buf *list_entry = NULL;
20917 struct fcp_cmd_rsp_buf *tmp = NULL;
a4c21acc 20918 unsigned long iflags;
d79c9e9d 20919
a4c21acc 20920 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20921
20922 /* Free cmd_rsp buf pool */
20923 list_for_each_entry_safe(list_entry, tmp,
20924 buf_list,
20925 list_node) {
20926 dma_pool_free(phba->lpfc_cmd_rsp_buf_pool,
20927 list_entry->fcp_cmnd,
20928 list_entry->fcp_cmd_rsp_dma_handle);
20929 list_del(&list_entry->list_node);
20930 kfree(list_entry);
20931 }
20932
a4c21acc 20933 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d 20934}