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[SCSI] lpfc 8.2.4 : Miscellaneous Discovery/ELS Fixes
[mirror_ubuntu-eoan-kernel.git] / drivers / scsi / lpfc / lpfc_sli.c
CommitLineData
dea3101e
JB		 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
9413afff 4 * Copyright (C) 2004-2007 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB		 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e
JB		 20 *******************************************************************/
21
dea3101e
JB		 22#include <linux/blkdev.h>
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26
91886523 27#include <scsi/scsi.h>
dea3101e
JB		 28#include <scsi/scsi_cmnd.h>
29#include <scsi/scsi_device.h>
30#include <scsi/scsi_host.h>
f888ba3c 31#include <scsi/scsi_transport_fc.h>
dea3101e
JB		 32
33#include "lpfc_hw.h"
34#include "lpfc_sli.h"
35#include "lpfc_disc.h"
36#include "lpfc_scsi.h"
37#include "lpfc.h"
38#include "lpfc_crtn.h"
39#include "lpfc_logmsg.h"
40#include "lpfc_compat.h"
858c9f6c 41#include "lpfc_debugfs.h"
dea3101e
JB		 42
43/*
44 * Define macro to log: Mailbox command x%x cannot issue Data
45 * This allows multiple uses of lpfc_msgBlk0311
46 * w/o perturbing log msg utility.
47 */
92d7f7b0 48#define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
dea3101e
JB		 49 lpfc_printf_log(phba, \
50 KERN_INFO, \
51 LOG_MBOX | LOG_SLI, \
e8b62011 52 "(%d):0311 Mailbox command x%x cannot " \
92d7f7b0 53 "issue Data: x%x x%x x%x\n", \
92d7f7b0
JS		 54 pmbox->vport ? pmbox->vport->vpi : 0, \
55 pmbox->mb.mbxCommand, \
2e0fef85 56 phba->pport->port_state, \
dea3101e 57 psli->sli_flag, \
2e0fef85 58 flag)
dea3101e
JB		 59
60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
92d7f7b0
JS		 69 /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
70 * to the start of the ring, and the slot number of the
71 * desired iocb entry, calc a pointer to that entry.
72 */
ed957684
JS		 73static inline IOCB_t *
74lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
75{
76 return (IOCB_t *) (((char *) pring->cmdringaddr) +
77 pring->cmdidx * phba->iocb_cmd_size);
78}
79
80static inline IOCB_t *
81lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
82{
83 return (IOCB_t *) (((char *) pring->rspringaddr) +
84 pring->rspidx * phba->iocb_rsp_size);
85}
86
2e0fef85
JS		 87static struct lpfc_iocbq *
88__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC		 89{
90 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
91 struct lpfc_iocbq * iocbq = NULL;
92
93 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
94 return iocbq;
95}
96
2e0fef85
JS		 97struct lpfc_iocbq *
98lpfc_sli_get_iocbq(struct lpfc_hba *phba)
99{
100 struct lpfc_iocbq * iocbq = NULL;
101 unsigned long iflags;
102
103 spin_lock_irqsave(&phba->hbalock, iflags);
104 iocbq = __lpfc_sli_get_iocbq(phba);
105 spin_unlock_irqrestore(&phba->hbalock, iflags);
106 return iocbq;
107}
108
a6ababd2 109static void
2e0fef85 110__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 111{
2e0fef85 112 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30
JB		 113
114 /*
115 * Clean all volatile data fields, preserve iotag and node struct.
116 */
117 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
118 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
119}
120
2e0fef85
JS		 121void
122lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
123{
124 unsigned long iflags;
125
126 /*
127 * Clean all volatile data fields, preserve iotag and node struct.
128 */
129 spin_lock_irqsave(&phba->hbalock, iflags);
130 __lpfc_sli_release_iocbq(phba, iocbq);
131 spin_unlock_irqrestore(&phba->hbalock, iflags);
132}
133
dea3101e
JB		 134/*
135 * Translate the iocb command to an iocb command type used to decide the final
136 * disposition of each completed IOCB.
137 */
138static lpfc_iocb_type
139lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
140{
141 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
142
143 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
144 return 0;
145
146 switch (iocb_cmnd) {
147 case CMD_XMIT_SEQUENCE_CR:
148 case CMD_XMIT_SEQUENCE_CX:
149 case CMD_XMIT_BCAST_CN:
150 case CMD_XMIT_BCAST_CX:
151 case CMD_ELS_REQUEST_CR:
152 case CMD_ELS_REQUEST_CX:
153 case CMD_CREATE_XRI_CR:
154 case CMD_CREATE_XRI_CX:
155 case CMD_GET_RPI_CN:
156 case CMD_XMIT_ELS_RSP_CX:
157 case CMD_GET_RPI_CR:
158 case CMD_FCP_IWRITE_CR:
159 case CMD_FCP_IWRITE_CX:
160 case CMD_FCP_IREAD_CR:
161 case CMD_FCP_IREAD_CX:
162 case CMD_FCP_ICMND_CR:
163 case CMD_FCP_ICMND_CX:
f5603511
JS		 164 case CMD_FCP_TSEND_CX:
165 case CMD_FCP_TRSP_CX:
166 case CMD_FCP_TRECEIVE_CX:
167 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB		 168 case CMD_ADAPTER_MSG:
169 case CMD_ADAPTER_DUMP:
170 case CMD_XMIT_SEQUENCE64_CR:
171 case CMD_XMIT_SEQUENCE64_CX:
172 case CMD_XMIT_BCAST64_CN:
173 case CMD_XMIT_BCAST64_CX:
174 case CMD_ELS_REQUEST64_CR:
175 case CMD_ELS_REQUEST64_CX:
176 case CMD_FCP_IWRITE64_CR:
177 case CMD_FCP_IWRITE64_CX:
178 case CMD_FCP_IREAD64_CR:
179 case CMD_FCP_IREAD64_CX:
180 case CMD_FCP_ICMND64_CR:
181 case CMD_FCP_ICMND64_CX:
f5603511
JS		 182 case CMD_FCP_TSEND64_CX:
183 case CMD_FCP_TRSP64_CX:
184 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB		 185 case CMD_GEN_REQUEST64_CR:
186 case CMD_GEN_REQUEST64_CX:
187 case CMD_XMIT_ELS_RSP64_CX:
188 type = LPFC_SOL_IOCB;
189 break;
190 case CMD_ABORT_XRI_CN:
191 case CMD_ABORT_XRI_CX:
192 case CMD_CLOSE_XRI_CN:
193 case CMD_CLOSE_XRI_CX:
194 case CMD_XRI_ABORTED_CX:
195 case CMD_ABORT_MXRI64_CN:
196 type = LPFC_ABORT_IOCB;
197 break;
198 case CMD_RCV_SEQUENCE_CX:
199 case CMD_RCV_ELS_REQ_CX:
200 case CMD_RCV_SEQUENCE64_CX:
201 case CMD_RCV_ELS_REQ64_CX:
57127f15 202 case CMD_ASYNC_STATUS:
ed957684
JS		 203 case CMD_IOCB_RCV_SEQ64_CX:
204 case CMD_IOCB_RCV_ELS64_CX:
205 case CMD_IOCB_RCV_CONT64_CX:
dea3101e
JB		 206 type = LPFC_UNSOL_IOCB;
207 break;
208 default:
209 type = LPFC_UNKNOWN_IOCB;
210 break;
211 }
212
213 return type;
214}
215
216static int
ed957684 217lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB		 218{
219 struct lpfc_sli *psli = &phba->sli;
ed957684
JS		 220 LPFC_MBOXQ_t *pmb;
221 MAILBOX_t *pmbox;
222 int i, rc, ret = 0;
dea3101e 223
ed957684
JS		 224 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
225 if (!pmb)
226 return -ENOMEM;
227 pmbox = &pmb->mb;
228 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 229 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB		 230 lpfc_config_ring(phba, i, pmb);
231 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
232 if (rc != MBX_SUCCESS) {
92d7f7b0 233 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 234 "0446 Adapter failed to init (%d), "
dea3101e
JB		 235 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
236 "ring %d\n",
e8b62011
JS		 237 rc, pmbox->mbxCommand,
238 pmbox->mbxStatus, i);
2e0fef85 239 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS		 240 ret = -ENXIO;
241 break;
dea3101e
JB		 242 }
243 }
ed957684
JS		 244 mempool_free(pmb, phba->mbox_mem_pool);
245 return ret;
dea3101e
JB		 246}
247
248static int
2e0fef85
JS		 249lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
250 struct lpfc_iocbq *piocb)
dea3101e 251{
dea3101e
JB		 252 list_add_tail(&piocb->list, &pring->txcmplq);
253 pring->txcmplq_cnt++;
92d7f7b0
JS		 254 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
255 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
256 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
257 if (!piocb->vport)
258 BUG();
259 else
260 mod_timer(&piocb->vport->els_tmofunc,
261 jiffies + HZ * (phba->fc_ratov << 1));
262 }
263
dea3101e 264
2e0fef85 265 return 0;
dea3101e
JB		 266}
267
268static struct lpfc_iocbq *
2e0fef85 269lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 270{
dea3101e
JB		 271 struct lpfc_iocbq *cmd_iocb;
272
858c9f6c
JS		 273 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
274 if (cmd_iocb != NULL)
dea3101e 275 pring->txq_cnt--;
2e0fef85 276 return cmd_iocb;
dea3101e
JB		 277}
278
279static IOCB_t *
280lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
281{
ed957684
JS		 282 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
283 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
284 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 285 uint32_t max_cmd_idx = pring->numCiocb;
dea3101e
JB		 286
287 if ((pring->next_cmdidx == pring->cmdidx) &&
288 (++pring->next_cmdidx >= max_cmd_idx))
289 pring->next_cmdidx = 0;
290
291 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
292
293 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
294
295 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
296 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 297 "0315 Ring %d issue: portCmdGet %d "
dea3101e 298 "is bigger then cmd ring %d\n",
e8b62011 299 pring->ringno,
dea3101e
JB		 300 pring->local_getidx, max_cmd_idx);
301
2e0fef85 302 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 303 /*
304 * All error attention handlers are posted to
305 * worker thread
306 */
307 phba->work_ha |= HA_ERATT;
308 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 309
310 /* hbalock should already be held */
dea3101e 311 if (phba->work_wait)
92d7f7b0 312 lpfc_worker_wake_up(phba);
dea3101e
JB		 313
314 return NULL;
315 }
316
317 if (pring->local_getidx == pring->next_cmdidx)
318 return NULL;
319 }
320
ed957684 321 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB		 322}
323
604a3e30 324uint16_t
2e0fef85 325lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 326{
2e0fef85
JS		 327 struct lpfc_iocbq **new_arr;
328 struct lpfc_iocbq **old_arr;
604a3e30
JB		 329 size_t new_len;
330 struct lpfc_sli *psli = &phba->sli;
331 uint16_t iotag;
dea3101e 332
2e0fef85 333 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 334 iotag = psli->last_iotag;
335 if(++iotag < psli->iocbq_lookup_len) {
336 psli->last_iotag = iotag;
337 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 338 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 339 iocbq->iotag = iotag;
340 return iotag;
2e0fef85 341 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB		 342 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
343 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85
JS		 344 spin_unlock_irq(&phba->hbalock);
345 new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
604a3e30
JB		 346 GFP_KERNEL);
347 if (new_arr) {
2e0fef85 348 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 349 old_arr = psli->iocbq_lookup;
350 if (new_len <= psli->iocbq_lookup_len) {
351 /* highly unprobable case */
352 kfree(new_arr);
353 iotag = psli->last_iotag;
354 if(++iotag < psli->iocbq_lookup_len) {
355 psli->last_iotag = iotag;
356 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 357 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 358 iocbq->iotag = iotag;
359 return iotag;
360 }
2e0fef85 361 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 362 return 0;
363 }
364 if (psli->iocbq_lookup)
365 memcpy(new_arr, old_arr,
366 ((psli->last_iotag + 1) *
311464ec 367 sizeof (struct lpfc_iocbq *)));
604a3e30
JB		 368 psli->iocbq_lookup = new_arr;
369 psli->iocbq_lookup_len = new_len;
370 psli->last_iotag = iotag;
371 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 372 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 373 iocbq->iotag = iotag;
374 kfree(old_arr);
375 return iotag;
376 }
8f6d98d2 377 } else
2e0fef85 378 spin_unlock_irq(&phba->hbalock);
dea3101e 379
604a3e30 380 lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
e8b62011
JS		 381 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
382 psli->last_iotag);
dea3101e 383
604a3e30 384 return 0;
dea3101e
JB		 385}
386
387static void
388lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
389 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
390{
391 /*
604a3e30 392 * Set up an iotag
dea3101e 393 */
604a3e30 394 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 395
a58cbd52
JS		 396 if (pring->ringno == LPFC_ELS_RING) {
397 lpfc_debugfs_slow_ring_trc(phba,
398 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
399 *(((uint32_t *) &nextiocb->iocb) + 4),
400 *(((uint32_t *) &nextiocb->iocb) + 6),
401 *(((uint32_t *) &nextiocb->iocb) + 7));
402 }
403
dea3101e
JB		 404 /*
405 * Issue iocb command to adapter
406 */
92d7f7b0 407 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB		 408 wmb();
409 pring->stats.iocb_cmd++;
410
411 /*
412 * If there is no completion routine to call, we can release the
413 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
414 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
415 */
416 if (nextiocb->iocb_cmpl)
417 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 418 else
2e0fef85 419 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB		 420
421 /*
422 * Let the HBA know what IOCB slot will be the next one the
423 * driver will put a command into.
424 */
425 pring->cmdidx = pring->next_cmdidx;
ed957684 426 writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB		 427}
428
429static void
2e0fef85 430lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 431{
432 int ringno = pring->ringno;
433
434 pring->flag |= LPFC_CALL_RING_AVAILABLE;
435
436 wmb();
437
438 /*
439 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
440 * The HBA will tell us when an IOCB entry is available.
441 */
442 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
443 readl(phba->CAregaddr); /* flush */
444
445 pring->stats.iocb_cmd_full++;
446}
447
448static void
2e0fef85 449lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 450{
451 int ringno = pring->ringno;
452
453 /*
454 * Tell the HBA that there is work to do in this ring.
455 */
456 wmb();
457 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
458 readl(phba->CAregaddr); /* flush */
459}
460
461static void
2e0fef85 462lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 463{
464 IOCB_t *iocb;
465 struct lpfc_iocbq *nextiocb;
466
467 /*
468 * Check to see if:
469 * (a) there is anything on the txq to send
470 * (b) link is up
471 * (c) link attention events can be processed (fcp ring only)
472 * (d) IOCB processing is not blocked by the outstanding mbox command.
473 */
474 if (pring->txq_cnt &&
2e0fef85 475 lpfc_is_link_up(phba) &&
dea3101e 476 (pring->ringno != phba->sli.fcp_ring ||
0b727fea 477 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e
JB		 478
479 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
480 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
481 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
482
483 if (iocb)
484 lpfc_sli_update_ring(phba, pring);
485 else
486 lpfc_sli_update_full_ring(phba, pring);
487 }
488
489 return;
490}
491
a6ababd2 492static struct lpfc_hbq_entry *
ed957684
JS		 493lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
494{
495 struct hbq_s *hbqp = &phba->hbqs[hbqno];
496
497 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
498 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
499 hbqp->next_hbqPutIdx = 0;
500
501 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 502 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS		 503 uint32_t getidx = le32_to_cpu(raw_index);
504
505 hbqp->local_hbqGetIdx = getidx;
506
507 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
508 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 509 LOG_SLI | LOG_VPORT,
e8b62011 510 "1802 HBQ %d: local_hbqGetIdx "
ed957684 511 "%u is > than hbqp->entry_count %u\n",
e8b62011 512 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS		 513 hbqp->entry_count);
514
515 phba->link_state = LPFC_HBA_ERROR;
516 return NULL;
517 }
518
519 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
520 return NULL;
521 }
522
51ef4c26
JS		 523 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
524 hbqp->hbqPutIdx;
ed957684
JS		 525}
526
527void
528lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
529{
92d7f7b0
JS		 530 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
531 struct hbq_dmabuf *hbq_buf;
51ef4c26 532 int i, hbq_count;
ed957684 533
51ef4c26 534 hbq_count = lpfc_sli_hbq_count();
ed957684 535 /* Return all memory used by all HBQs */
51ef4c26
JS		 536 for (i = 0; i < hbq_count; ++i) {
537 list_for_each_entry_safe(dmabuf, next_dmabuf,
538 &phba->hbqs[i].hbq_buffer_list, list) {
539 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
540 list_del(&hbq_buf->dbuf.list);
541 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
542 }
a8adb832 543 phba->hbqs[i].buffer_count = 0;
ed957684 544 }
ed957684
JS		 545}
546
51ef4c26 547static struct lpfc_hbq_entry *
ed957684 548lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 549 struct hbq_dmabuf *hbq_buf)
ed957684
JS		 550{
551 struct lpfc_hbq_entry *hbqe;
92d7f7b0 552 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684
JS		 553
554 /* Get next HBQ entry slot to use */
555 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
556 if (hbqe) {
557 struct hbq_s *hbqp = &phba->hbqs[hbqno];
558
92d7f7b0
JS		 559 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
560 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
51ef4c26 561 hbqe->bde.tus.f.bdeSize = hbq_buf->size;
ed957684 562 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS		 563 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
564 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
565 /* Sync SLIM */
ed957684
JS		 566 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
567 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 568 /* flush */
ed957684 569 readl(phba->hbq_put + hbqno);
51ef4c26 570 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
ed957684 571 }
51ef4c26 572 return hbqe;
ed957684
JS		 573}
574
92d7f7b0
JS		 575static struct lpfc_hbq_init lpfc_els_hbq = {
576 .rn = 1,
577 .entry_count = 200,
578 .mask_count = 0,
579 .profile = 0,
51ef4c26 580 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0
JS		 581 .buffer_count = 0,
582 .init_count = 20,
583 .add_count = 5,
584};
ed957684 585
51ef4c26
JS		 586static struct lpfc_hbq_init lpfc_extra_hbq = {
587 .rn = 1,
588 .entry_count = 200,
589 .mask_count = 0,
590 .profile = 0,
591 .ring_mask = (1 << LPFC_EXTRA_RING),
592 .buffer_count = 0,
593 .init_count = 0,
594 .add_count = 5,
595};
596
78b2d852 597struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0 598 &lpfc_els_hbq,
51ef4c26 599 &lpfc_extra_hbq,
92d7f7b0 600};
ed957684 601
311464ec 602static int
92d7f7b0 603lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 604{
92d7f7b0
JS		 605 uint32_t i, start, end;
606 struct hbq_dmabuf *hbq_buffer;
ed957684 607
51ef4c26
JS		 608 if (!phba->hbqs[hbqno].hbq_alloc_buffer) {
609 return 0;
610 }
611
a8adb832
JS		 612 start = phba->hbqs[hbqno].buffer_count;
613 end = count + start;
92d7f7b0
JS		 614 if (end > lpfc_hbq_defs[hbqno]->entry_count) {
615 end = lpfc_hbq_defs[hbqno]->entry_count;
616 }
ed957684
JS		 617
618 /* Populate HBQ entries */
92d7f7b0 619 for (i = start; i < end; i++) {
51ef4c26 620 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
92d7f7b0
JS		 621 if (!hbq_buffer)
622 return 1;
92d7f7b0 623 hbq_buffer->tag = (i | (hbqno << 16));
51ef4c26 624 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
a8adb832 625 phba->hbqs[hbqno].buffer_count++;
51ef4c26
JS		 626 else
627 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS		 628 }
629 return 0;
630}
631
92d7f7b0
JS		 632int
633lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 634{
92d7f7b0
JS		 635 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
636 lpfc_hbq_defs[qno]->add_count));
637}
ed957684 638
a6ababd2 639static int
92d7f7b0
JS		 640lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
641{
642 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
643 lpfc_hbq_defs[qno]->init_count));
ed957684
JS		 644}
645
a6ababd2 646static struct hbq_dmabuf *
92d7f7b0 647lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 648{
92d7f7b0
JS		 649 struct lpfc_dmabuf *d_buf;
650 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS		 651 uint32_t hbqno;
652
653 hbqno = tag >> 16;
a0a74e45 654 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 655 return NULL;
ed957684 656
51ef4c26 657 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 658 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 659 if (hbq_buf->tag == tag) {
92d7f7b0 660 return hbq_buf;
ed957684
JS		 661 }
662 }
92d7f7b0 663 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 664 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 665 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 666 return NULL;
ed957684
JS		 667}
668
669void
51ef4c26 670lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS		 671{
672 uint32_t hbqno;
673
51ef4c26
JS		 674 if (hbq_buffer) {
675 hbqno = hbq_buffer->tag >> 16;
676 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
677 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
678 }
ed957684
JS		 679 }
680}
681
dea3101e
JB		 682static int
683lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
684{
685 uint8_t ret;
686
687 switch (mbxCommand) {
688 case MBX_LOAD_SM:
689 case MBX_READ_NV:
690 case MBX_WRITE_NV:
a8adb832 691 case MBX_WRITE_VPARMS:
dea3101e
JB		 692 case MBX_RUN_BIU_DIAG:
693 case MBX_INIT_LINK:
694 case MBX_DOWN_LINK:
695 case MBX_CONFIG_LINK:
696 case MBX_CONFIG_RING:
697 case MBX_RESET_RING:
698 case MBX_READ_CONFIG:
699 case MBX_READ_RCONFIG:
700 case MBX_READ_SPARM:
701 case MBX_READ_STATUS:
702 case MBX_READ_RPI:
703 case MBX_READ_XRI:
704 case MBX_READ_REV:
705 case MBX_READ_LNK_STAT:
706 case MBX_REG_LOGIN:
707 case MBX_UNREG_LOGIN:
708 case MBX_READ_LA:
709 case MBX_CLEAR_LA:
710 case MBX_DUMP_MEMORY:
711 case MBX_DUMP_CONTEXT:
712 case MBX_RUN_DIAGS:
713 case MBX_RESTART:
714 case MBX_UPDATE_CFG:
715 case MBX_DOWN_LOAD:
716 case MBX_DEL_LD_ENTRY:
717 case MBX_RUN_PROGRAM:
718 case MBX_SET_MASK:
719 case MBX_SET_SLIM:
720 case MBX_UNREG_D_ID:
41415862 721 case MBX_KILL_BOARD:
dea3101e 722 case MBX_CONFIG_FARP:
41415862 723 case MBX_BEACON:
dea3101e
JB		 724 case MBX_LOAD_AREA:
725 case MBX_RUN_BIU_DIAG64:
726 case MBX_CONFIG_PORT:
727 case MBX_READ_SPARM64:
728 case MBX_READ_RPI64:
729 case MBX_REG_LOGIN64:
730 case MBX_READ_LA64:
731 case MBX_FLASH_WR_ULA:
732 case MBX_SET_DEBUG:
733 case MBX_LOAD_EXP_ROM:
57127f15 734 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS		 735 case MBX_REG_VPI:
736 case MBX_UNREG_VPI:
858c9f6c 737 case MBX_HEARTBEAT:
dea3101e
JB		 738 ret = mbxCommand;
739 break;
740 default:
741 ret = MBX_SHUTDOWN;
742 break;
743 }
2e0fef85 744 return ret;
dea3101e
JB		 745}
746static void
2e0fef85 747lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e
JB		 748{
749 wait_queue_head_t *pdone_q;
858c9f6c 750 unsigned long drvr_flag;
dea3101e
JB		 751
752 /*
753 * If pdone_q is empty, the driver thread gave up waiting and
754 * continued running.
755 */
7054a606 756 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 757 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e
JB		 758 pdone_q = (wait_queue_head_t *) pmboxq->context1;
759 if (pdone_q)
760 wake_up_interruptible(pdone_q);
858c9f6c 761 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB		 762 return;
763}
764
765void
2e0fef85 766lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e
JB		 767{
768 struct lpfc_dmabuf *mp;
7054a606
JS		 769 uint16_t rpi;
770 int rc;
771
dea3101e 772 mp = (struct lpfc_dmabuf *) (pmb->context1);
7054a606 773
dea3101e
JB		 774 if (mp) {
775 lpfc_mbuf_free(phba, mp->virt, mp->phys);
776 kfree(mp);
777 }
7054a606
JS		 778
779 /*
780 * If a REG_LOGIN succeeded after node is destroyed or node
781 * is in re-discovery driver need to cleanup the RPI.
782 */
2e0fef85
JS		 783 if (!(phba->pport->load_flag & FC_UNLOADING) &&
784 pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
785 !pmb->mb.mbxStatus) {
7054a606
JS		 786
787 rpi = pmb->mb.un.varWords[0];
92d7f7b0
JS		 788 lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
789 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS		 790 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
791 if (rc != MBX_NOT_FINISHED)
792 return;
793 }
794
2e0fef85 795 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB		 796 return;
797}
798
799int
2e0fef85 800lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 801{
92d7f7b0 802 MAILBOX_t *pmbox;
dea3101e 803 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS		 804 int rc;
805 LIST_HEAD(cmplq);
dea3101e
JB		 806
807 phba->sli.slistat.mbox_event++;
808
92d7f7b0
JS		 809 /* Get all completed mailboxe buffers into the cmplq */
810 spin_lock_irq(&phba->hbalock);
811 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
812 spin_unlock_irq(&phba->hbalock);
dea3101e 813
92d7f7b0
JS		 814 /* Get a Mailbox buffer to setup mailbox commands for callback */
815 do {
816 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
817 if (pmb == NULL)
818 break;
2e0fef85 819
92d7f7b0 820 pmbox = &pmb->mb;
dea3101e 821
858c9f6c
JS		 822 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
823 if (pmb->vport) {
824 lpfc_debugfs_disc_trc(pmb->vport,
825 LPFC_DISC_TRC_MBOX_VPORT,
826 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
827 (uint32_t)pmbox->mbxCommand,
828 pmbox->un.varWords[0],
829 pmbox->un.varWords[1]);
830 }
831 else {
832 lpfc_debugfs_disc_trc(phba->pport,
833 LPFC_DISC_TRC_MBOX,
834 "MBOX cmpl: cmd:x%x mb:x%x x%x",
835 (uint32_t)pmbox->mbxCommand,
836 pmbox->un.varWords[0],
837 pmbox->un.varWords[1]);
838 }
839 }
840
dea3101e
JB		 841 /*
842 * It is a fatal error if unknown mbox command completion.
843 */
844 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
845 MBX_SHUTDOWN) {
dea3101e 846 /* Unknow mailbox command compl */
92d7f7b0 847 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 848 "(%d):0323 Unknown Mailbox command "
92d7f7b0 849 "%x Cmpl\n",
92d7f7b0
JS		 850 pmb->vport ? pmb->vport->vpi : 0,
851 pmbox->mbxCommand);
2e0fef85 852 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 853 phba->work_hs = HS_FFER3;
854 lpfc_handle_eratt(phba);
92d7f7b0 855 continue;
dea3101e
JB		 856 }
857
dea3101e
JB		 858 if (pmbox->mbxStatus) {
859 phba->sli.slistat.mbox_stat_err++;
860 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
861 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0
JS		 862 lpfc_printf_log(phba, KERN_INFO,
863 LOG_MBOX | LOG_SLI,
e8b62011 864 "(%d):0305 Mbox cmd cmpl "
92d7f7b0
JS		 865 "error - RETRYing Data: x%x "
866 "x%x x%x x%x\n",
92d7f7b0
JS		 867 pmb->vport ? pmb->vport->vpi :0,
868 pmbox->mbxCommand,
869 pmbox->mbxStatus,
870 pmbox->un.varWords[0],
871 pmb->vport->port_state);
dea3101e
JB		 872 pmbox->mbxStatus = 0;
873 pmbox->mbxOwner = OWN_HOST;
2e0fef85 874 spin_lock_irq(&phba->hbalock);
dea3101e 875 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 876 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 877 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
878 if (rc == MBX_SUCCESS)
92d7f7b0 879 continue;
dea3101e
JB		 880 }
881 }
882
883 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 884 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 885 "(%d):0307 Mailbox cmd x%x Cmpl x%p "
dea3101e 886 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
92d7f7b0 887 pmb->vport ? pmb->vport->vpi : 0,
dea3101e
JB		 888 pmbox->mbxCommand,
889 pmb->mbox_cmpl,
890 *((uint32_t *) pmbox),
891 pmbox->un.varWords[0],
892 pmbox->un.varWords[1],
893 pmbox->un.varWords[2],
894 pmbox->un.varWords[3],
895 pmbox->un.varWords[4],
896 pmbox->un.varWords[5],
897 pmbox->un.varWords[6],
898 pmbox->un.varWords[7]);
899
92d7f7b0 900 if (pmb->mbox_cmpl)
dea3101e 901 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS		 902 } while (1);
903 return 0;
904}
dea3101e 905
92d7f7b0
JS		 906static struct lpfc_dmabuf *
907lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
908{
909 struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
51ef4c26
JS		 910 uint32_t hbqno;
911 void *virt; /* virtual address ptr */
912 dma_addr_t phys; /* mapped address */
dea3101e 913
92d7f7b0
JS		 914 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
915 if (hbq_entry == NULL)
916 return NULL;
917 list_del(&hbq_entry->dbuf.list);
51ef4c26
JS		 918
919 hbqno = tag >> 16;
920 new_hbq_entry = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
92d7f7b0
JS		 921 if (new_hbq_entry == NULL)
922 return &hbq_entry->dbuf;
92d7f7b0 923 new_hbq_entry->tag = -1;
51ef4c26
JS		 924 phys = new_hbq_entry->dbuf.phys;
925 virt = new_hbq_entry->dbuf.virt;
926 new_hbq_entry->dbuf.phys = hbq_entry->dbuf.phys;
927 new_hbq_entry->dbuf.virt = hbq_entry->dbuf.virt;
928 hbq_entry->dbuf.phys = phys;
929 hbq_entry->dbuf.virt = virt;
92d7f7b0
JS		 930 lpfc_sli_free_hbq(phba, hbq_entry);
931 return &new_hbq_entry->dbuf;
dea3101e 932}
92d7f7b0 933
76bb24ef
JS		 934static struct lpfc_dmabuf *
935lpfc_sli_get_buff(struct lpfc_hba *phba,
936 struct lpfc_sli_ring *pring,
937 uint32_t tag)
938{
939 if (tag & QUE_BUFTAG_BIT)
940 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
941 else
942 return lpfc_sli_replace_hbqbuff(phba, tag);
943}
57127f15 944
dea3101e
JB		 945static int
946lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
947 struct lpfc_iocbq *saveq)
948{
949 IOCB_t * irsp;
950 WORD5 * w5p;
951 uint32_t Rctl, Type;
952 uint32_t match, i;
76bb24ef 953 struct lpfc_iocbq *iocbq;
dea3101e
JB		 954
955 match = 0;
956 irsp = &(saveq->iocb);
57127f15
JS		 957
958 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
959 if (pring->lpfc_sli_rcv_async_status)
960 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
961 else
962 lpfc_printf_log(phba,
963 KERN_WARNING,
964 LOG_SLI,
965 "0316 Ring %d handler: unexpected "
966 "ASYNC_STATUS iocb received evt_code "
967 "0x%x\n",
968 pring->ringno,
969 irsp->un.asyncstat.evt_code);
970 return 1;
971 }
972
dea3101e 973 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
ed957684
JS		 974 || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)
975 || (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)
976 || (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX)) {
dea3101e
JB		 977 Rctl = FC_ELS_REQ;
978 Type = FC_ELS_DATA;
979 } else {
980 w5p =
981 (WORD5 *) & (saveq->iocb.un.
982 ulpWord[5]);
983 Rctl = w5p->hcsw.Rctl;
984 Type = w5p->hcsw.Type;
985
986 /* Firmware Workaround */
987 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
92d7f7b0
JS		 988 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
989 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
dea3101e
JB		 990 Rctl = FC_ELS_REQ;
991 Type = FC_ELS_DATA;
992 w5p->hcsw.Rctl = Rctl;
993 w5p->hcsw.Type = Type;
994 }
995 }
92d7f7b0
JS		 996
997 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS		 998 struct lpfc_hbq_entry *hbqe_1, *hbqe_2;
999 hbqe_1 = (struct lpfc_hbq_entry *) &saveq->iocb.un.ulpWord[0];
1000 hbqe_2 = (struct lpfc_hbq_entry *) &saveq->iocb.
1001 unsli3.sli3Words[4];
1002
1003 if (irsp->ulpBdeCount != 0) {
1004 saveq->context2 = lpfc_sli_get_buff(phba, pring,
1005 irsp->un.ulpWord[3]);
1006 if (!saveq->context2)
1007 lpfc_printf_log(phba,
1008 KERN_ERR,
1009 LOG_SLI,
1010 "0341 Ring %d Cannot find buffer for "
1011 "an unsolicited iocb. tag 0x%x\n",
1012 pring->ringno,
1013 irsp->un.ulpWord[3]);
1014
1015 }
1016 if (irsp->ulpBdeCount == 2) {
1017 saveq->context3 = lpfc_sli_get_buff(phba, pring,
1018 irsp->unsli3.sli3Words[7]);
1019 if (!saveq->context3)
1020 lpfc_printf_log(phba,
1021 KERN_ERR,
1022 LOG_SLI,
1023 "0342 Ring %d Cannot find buffer for an"
1024 " unsolicited iocb. tag 0x%x\n",
1025 pring->ringno,
1026 irsp->unsli3.sli3Words[7]);
1027 }
1028 list_for_each_entry(iocbq, &saveq->list, list) {
1029 hbqe_1 = (struct lpfc_hbq_entry *) &iocbq->iocb.
1030 un.ulpWord[0];
1031 hbqe_2 = (struct lpfc_hbq_entry *) &iocbq->iocb.
1032 unsli3.sli3Words[4];
1033 irsp = &(iocbq->iocb);
1034
1035 if (irsp->ulpBdeCount != 0) {
1036 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
1037 irsp->un.ulpWord[3]);
1038 if (!saveq->context2)
1039 lpfc_printf_log(phba,
1040 KERN_ERR,
1041 LOG_SLI,
1042 "0343 Ring %d Cannot find "
1043 "buffer for an unsolicited iocb"
1044 ". tag 0x%x\n", pring->ringno,
92d7f7b0 1045 irsp->un.ulpWord[3]);
76bb24ef
JS		 1046 }
1047 if (irsp->ulpBdeCount == 2) {
1048 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 1049 irsp->unsli3.sli3Words[7]);
76bb24ef
JS		 1050 if (!saveq->context3)
1051 lpfc_printf_log(phba,
1052 KERN_ERR,
1053 LOG_SLI,
1054 "0344 Ring %d Cannot find "
1055 "buffer for an unsolicited "
1056 "iocb. tag 0x%x\n",
1057 pring->ringno,
1058 irsp->unsli3.sli3Words[7]);
1059 }
1060 }
92d7f7b0
JS		 1061 }
1062
dea3101e
JB		 1063 /* unSolicited Responses */
1064 if (pring->prt[0].profile) {
cf5bf97e
JW		 1065 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
1066 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
1067 saveq);
dea3101e
JB		 1068 match = 1;
1069 } else {
1070 /* We must search, based on rctl / type
1071 for the right routine */
1072 for (i = 0; i < pring->num_mask;
1073 i++) {
1074 if ((pring->prt[i].rctl ==
1075 Rctl)
1076 && (pring->prt[i].
1077 type == Type)) {
cf5bf97e
JW		 1078 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
1079 (pring->prt[i].lpfc_sli_rcv_unsol_event)
1080 (phba, pring, saveq);
dea3101e
JB		 1081 match = 1;
1082 break;
1083 }
1084 }
1085 }
1086 if (match == 0) {
1087 /* Unexpected Rctl / Type received */
1088 /* Ring <ringno> handler: unexpected
1089 Rctl <Rctl> Type <Type> received */
92d7f7b0 1090 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1091 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 1092 "Type x%x received\n",
e8b62011 1093 pring->ringno, Rctl, Type);
dea3101e 1094 }
92d7f7b0 1095 return 1;
dea3101e
JB		 1096}
1097
1098static struct lpfc_iocbq *
2e0fef85
JS		 1099lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
1100 struct lpfc_sli_ring *pring,
1101 struct lpfc_iocbq *prspiocb)
dea3101e 1102{
dea3101e
JB		 1103 struct lpfc_iocbq *cmd_iocb = NULL;
1104 uint16_t iotag;
1105
604a3e30
JB		 1106 iotag = prspiocb->iocb.ulpIoTag;
1107
1108 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
1109 cmd_iocb = phba->sli.iocbq_lookup[iotag];
92d7f7b0 1110 list_del_init(&cmd_iocb->list);
604a3e30
JB		 1111 pring->txcmplq_cnt--;
1112 return cmd_iocb;
dea3101e
JB		 1113 }
1114
dea3101e 1115 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1116 "0317 iotag x%x is out off "
604a3e30 1117 "range: max iotag x%x wd0 x%x\n",
e8b62011 1118 iotag, phba->sli.last_iotag,
604a3e30 1119 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB		 1120 return NULL;
1121}
1122
1123static int
2e0fef85 1124lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB		 1125 struct lpfc_iocbq *saveq)
1126{
2e0fef85 1127 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB		 1128 int rc = 1;
1129 unsigned long iflag;
1130
1131 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
2e0fef85 1132 spin_lock_irqsave(&phba->hbalock, iflag);
604a3e30 1133 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
2e0fef85
JS		 1134 spin_unlock_irqrestore(&phba->hbalock, iflag);
1135
dea3101e
JB		 1136 if (cmdiocbp) {
1137 if (cmdiocbp->iocb_cmpl) {
1138 /*
1139 * Post all ELS completions to the worker thread.
1140 * All other are passed to the completion callback.
1141 */
1142 if (pring->ringno == LPFC_ELS_RING) {
07951076
JS		 1143 if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
1144 cmdiocbp->iocb_flag &=
1145 ~LPFC_DRIVER_ABORTED;
1146 saveq->iocb.ulpStatus =
1147 IOSTAT_LOCAL_REJECT;
1148 saveq->iocb.un.ulpWord[4] =
1149 IOERR_SLI_ABORTED;
0ff10d46
JS		 1150
1151 /* Firmware could still be in progress
1152 * of DMAing payload, so don't free data
1153 * buffer till after a hbeat.
1154 */
1155 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
07951076 1156 }
dea3101e 1157 }
2e0fef85 1158 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB		 1159 } else
1160 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB		 1161 } else {
1162 /*
1163 * Unknown initiating command based on the response iotag.
1164 * This could be the case on the ELS ring because of
1165 * lpfc_els_abort().
1166 */
1167 if (pring->ringno != LPFC_ELS_RING) {
1168 /*
1169 * Ring <ringno> handler: unexpected completion IoTag
1170 * <IoTag>
1171 */
e8b62011
JS		 1172 lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
1173 "0322 Ring %d handler: "
1174 "unexpected completion IoTag x%x "
1175 "Data: x%x x%x x%x x%x\n",
1176 pring->ringno,
1177 saveq->iocb.ulpIoTag,
1178 saveq->iocb.ulpStatus,
1179 saveq->iocb.un.ulpWord[4],
1180 saveq->iocb.ulpCommand,
1181 saveq->iocb.ulpContext);
dea3101e
JB		 1182 }
1183 }
68876920 1184
dea3101e
JB		 1185 return rc;
1186}
1187
2e0fef85
JS		 1188static void
1189lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 1190{
ed957684
JS		 1191 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1192 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1193 &phba->slim2p->mbx.us.s2.port[pring->ringno];
875fbdfe
JSEC		 1194 /*
1195 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1196 * rsp ring <portRspMax>
1197 */
1198 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1199 "0312 Ring %d handler: portRspPut %d "
875fbdfe 1200 "is bigger then rsp ring %d\n",
e8b62011 1201 pring->ringno, le32_to_cpu(pgp->rspPutInx),
875fbdfe
JSEC		 1202 pring->numRiocb);
1203
2e0fef85 1204 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC		 1205
1206 /*
1207 * All error attention handlers are posted to
1208 * worker thread
1209 */
1210 phba->work_ha |= HA_ERATT;
1211 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 1212
1213 /* hbalock should already be held */
875fbdfe 1214 if (phba->work_wait)
92d7f7b0 1215 lpfc_worker_wake_up(phba);
875fbdfe
JSEC		 1216
1217 return;
1218}
1219
2e0fef85 1220void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
875fbdfe 1221{
2e0fef85
JS		 1222 struct lpfc_sli *psli = &phba->sli;
1223 struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
875fbdfe
JSEC		 1224 IOCB_t *irsp = NULL;
1225 IOCB_t *entry = NULL;
1226 struct lpfc_iocbq *cmdiocbq = NULL;
1227 struct lpfc_iocbq rspiocbq;
1228 struct lpfc_pgp *pgp;
1229 uint32_t status;
1230 uint32_t portRspPut, portRspMax;
1231 int type;
1232 uint32_t rsp_cmpl = 0;
875fbdfe 1233 uint32_t ha_copy;
2e0fef85 1234 unsigned long iflags;
875fbdfe
JSEC		 1235
1236 pring->stats.iocb_event++;
1237
ed957684
JS		 1238 pgp = (phba->sli_rev == 3) ?
1239 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1240 &phba->slim2p->mbx.us.s2.port[pring->ringno];
1241
875fbdfe
JSEC		 1242
1243 /*
1244 * The next available response entry should never exceed the maximum
1245 * entries. If it does, treat it as an adapter hardware error.
1246 */
1247 portRspMax = pring->numRiocb;
1248 portRspPut = le32_to_cpu(pgp->rspPutInx);
1249 if (unlikely(portRspPut >= portRspMax)) {
1250 lpfc_sli_rsp_pointers_error(phba, pring);
1251 return;
1252 }
1253
1254 rmb();
1255 while (pring->rspidx != portRspPut) {
ed957684 1256 entry = lpfc_resp_iocb(phba, pring);
875fbdfe
JSEC		 1257 if (++pring->rspidx >= portRspMax)
1258 pring->rspidx = 0;
1259
1260 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1261 (uint32_t *) &rspiocbq.iocb,
92d7f7b0 1262 phba->iocb_rsp_size);
875fbdfe
JSEC		 1263 irsp = &rspiocbq.iocb;
1264 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1265 pring->stats.iocb_rsp++;
1266 rsp_cmpl++;
1267
1268 if (unlikely(irsp->ulpStatus)) {
1269 /* Rsp ring <ringno> error: IOCB */
1270 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1271 "0326 Rsp Ring %d error: IOCB Data: "
875fbdfe 1272 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1273 pring->ringno,
875fbdfe
JSEC		 1274 irsp->un.ulpWord[0],
1275 irsp->un.ulpWord[1],
1276 irsp->un.ulpWord[2],
1277 irsp->un.ulpWord[3],
1278 irsp->un.ulpWord[4],
1279 irsp->un.ulpWord[5],
1280 *(((uint32_t *) irsp) + 6),
1281 *(((uint32_t *) irsp) + 7));
1282 }
1283
1284 switch (type) {
1285 case LPFC_ABORT_IOCB:
1286 case LPFC_SOL_IOCB:
1287 /*
1288 * Idle exchange closed via ABTS from port. No iocb
1289 * resources need to be recovered.
1290 */
1291 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1292 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 1293 "0314 IOCB cmd 0x%x "
1294 "processed. Skipping "
1295 "completion",
dca9479b 1296 irsp->ulpCommand);
875fbdfe
JSEC		 1297 break;
1298 }
1299
2e0fef85 1300 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1301 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1302 &rspiocbq);
2e0fef85 1303 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1304 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
1305 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1306 &rspiocbq);
1307 }
1308 break;
1309 default:
1310 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1311 char adaptermsg[LPFC_MAX_ADPTMSG];
1312 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1313 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1314 MAX_MSG_DATA);
898eb71c
JP		 1315 dev_warn(&((phba->pcidev)->dev),
1316 "lpfc%d: %s\n",
875fbdfe
JSEC		 1317 phba->brd_no, adaptermsg);
1318 } else {
1319 /* Unknown IOCB command */
1320 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1321 "0321 Unknown IOCB command "
875fbdfe 1322 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1323 type, irsp->ulpCommand,
875fbdfe
JSEC		 1324 irsp->ulpStatus,
1325 irsp->ulpIoTag,
1326 irsp->ulpContext);
1327 }
1328 break;
1329 }
1330
1331 /*
1332 * The response IOCB has been processed. Update the ring
1333 * pointer in SLIM. If the port response put pointer has not
1334 * been updated, sync the pgp->rspPutInx and fetch the new port
1335 * response put pointer.
1336 */
ed957684 1337 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
875fbdfe
JSEC		 1338
1339 if (pring->rspidx == portRspPut)
1340 portRspPut = le32_to_cpu(pgp->rspPutInx);
1341 }
1342
1343 ha_copy = readl(phba->HAregaddr);
1344 ha_copy >>= (LPFC_FCP_RING * 4);
1345
1346 if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
2e0fef85 1347 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1348 pring->stats.iocb_rsp_full++;
1349 status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
1350 writel(status, phba->CAregaddr);
1351 readl(phba->CAregaddr);
2e0fef85 1352 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1353 }
1354 if ((ha_copy & HA_R0CE_RSP) &&
1355 (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
2e0fef85 1356 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1357 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1358 pring->stats.iocb_cmd_empty++;
1359
1360 /* Force update of the local copy of cmdGetInx */
1361 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1362 lpfc_sli_resume_iocb(phba, pring);
1363
1364 if ((pring->lpfc_sli_cmd_available))
1365 (pring->lpfc_sli_cmd_available) (phba, pring);
1366
2e0fef85 1367 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1368 }
1369
1370 return;
1371}
1372
dea3101e
JB		 1373/*
1374 * This routine presumes LPFC_FCP_RING handling and doesn't bother
1375 * to check it explicitly.
1376 */
1377static int
2e0fef85
JS		 1378lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
1379 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1380{
ed957684
JS		 1381 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1382 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1383 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 1384 IOCB_t *irsp = NULL;
87f6eaff 1385 IOCB_t *entry = NULL;
dea3101e
JB		 1386 struct lpfc_iocbq *cmdiocbq = NULL;
1387 struct lpfc_iocbq rspiocbq;
dea3101e
JB		 1388 uint32_t status;
1389 uint32_t portRspPut, portRspMax;
1390 int rc = 1;
1391 lpfc_iocb_type type;
1392 unsigned long iflag;
1393 uint32_t rsp_cmpl = 0;
dea3101e 1394
2e0fef85 1395 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1396 pring->stats.iocb_event++;
1397
dea3101e
JB		 1398 /*
1399 * The next available response entry should never exceed the maximum
1400 * entries. If it does, treat it as an adapter hardware error.
1401 */
1402 portRspMax = pring->numRiocb;
1403 portRspPut = le32_to_cpu(pgp->rspPutInx);
1404 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 1405 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 1406 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1407 return 1;
1408 }
1409
1410 rmb();
1411 while (pring->rspidx != portRspPut) {
87f6eaff
JSEC		 1412 /*
1413 * Fetch an entry off the ring and copy it into a local data
1414 * structure. The copy involves a byte-swap since the
1415 * network byte order and pci byte orders are different.
1416 */
ed957684 1417 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 1418 phba->last_completion_time = jiffies;
875fbdfe
JSEC		 1419
1420 if (++pring->rspidx >= portRspMax)
1421 pring->rspidx = 0;
1422
87f6eaff
JSEC		 1423 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1424 (uint32_t *) &rspiocbq.iocb,
ed957684 1425 phba->iocb_rsp_size);
a4bc3379 1426 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC		 1427 irsp = &rspiocbq.iocb;
1428
dea3101e
JB		 1429 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1430 pring->stats.iocb_rsp++;
1431 rsp_cmpl++;
1432
1433 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS		 1434 /*
1435 * If resource errors reported from HBA, reduce
1436 * queuedepths of the SCSI device.
1437 */
1438 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1439 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1440 spin_unlock_irqrestore(&phba->hbalock, iflag);
1441 lpfc_adjust_queue_depth(phba);
1442 spin_lock_irqsave(&phba->hbalock, iflag);
1443 }
1444
dea3101e
JB		 1445 /* Rsp ring <ringno> error: IOCB */
1446 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1447 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 1448 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1449 pring->ringno,
92d7f7b0
JS		 1450 irsp->un.ulpWord[0],
1451 irsp->un.ulpWord[1],
1452 irsp->un.ulpWord[2],
1453 irsp->un.ulpWord[3],
1454 irsp->un.ulpWord[4],
1455 irsp->un.ulpWord[5],
1456 *(((uint32_t *) irsp) + 6),
1457 *(((uint32_t *) irsp) + 7));
dea3101e
JB		 1458 }
1459
1460 switch (type) {
1461 case LPFC_ABORT_IOCB:
1462 case LPFC_SOL_IOCB:
1463 /*
1464 * Idle exchange closed via ABTS from port. No iocb
1465 * resources need to be recovered.
1466 */
1467 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1468 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 1469 "0333 IOCB cmd 0x%x"
dca9479b 1470 " processed. Skipping"
92d7f7b0 1471 " completion\n",
dca9479b 1472 irsp->ulpCommand);
dea3101e
JB		 1473 break;
1474 }
1475
604a3e30
JB		 1476 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1477 &rspiocbq);
dea3101e 1478 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
b808608b
JW		 1479 if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
1480 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1481 &rspiocbq);
1482 } else {
2e0fef85
JS		 1483 spin_unlock_irqrestore(&phba->hbalock,
1484 iflag);
b808608b
JW		 1485 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1486 &rspiocbq);
2e0fef85 1487 spin_lock_irqsave(&phba->hbalock,
b808608b
JW		 1488 iflag);
1489 }
dea3101e
JB		 1490 }
1491 break;
a4bc3379 1492 case LPFC_UNSOL_IOCB:
2e0fef85 1493 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 1494 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 1495 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 1496 break;
dea3101e
JB		 1497 default:
1498 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1499 char adaptermsg[LPFC_MAX_ADPTMSG];
1500 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1501 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1502 MAX_MSG_DATA);
898eb71c
JP		 1503 dev_warn(&((phba->pcidev)->dev),
1504 "lpfc%d: %s\n",
dea3101e
JB		 1505 phba->brd_no, adaptermsg);
1506 } else {
1507 /* Unknown IOCB command */
1508 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1509 "0334 Unknown IOCB command "
92d7f7b0 1510 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1511 type, irsp->ulpCommand,
92d7f7b0
JS		 1512 irsp->ulpStatus,
1513 irsp->ulpIoTag,
1514 irsp->ulpContext);
dea3101e
JB		 1515 }
1516 break;
1517 }
1518
1519 /*
1520 * The response IOCB has been processed. Update the ring
1521 * pointer in SLIM. If the port response put pointer has not
1522 * been updated, sync the pgp->rspPutInx and fetch the new port
1523 * response put pointer.
1524 */
ed957684 1525 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e
JB		 1526
1527 if (pring->rspidx == portRspPut)
1528 portRspPut = le32_to_cpu(pgp->rspPutInx);
1529 }
1530
1531 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1532 pring->stats.iocb_rsp_full++;
1533 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1534 writel(status, phba->CAregaddr);
1535 readl(phba->CAregaddr);
1536 }
1537 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1538 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1539 pring->stats.iocb_cmd_empty++;
1540
1541 /* Force update of the local copy of cmdGetInx */
1542 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1543 lpfc_sli_resume_iocb(phba, pring);
1544
1545 if ((pring->lpfc_sli_cmd_available))
1546 (pring->lpfc_sli_cmd_available) (phba, pring);
1547
1548 }
1549
2e0fef85 1550 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1551 return rc;
1552}
1553
dea3101e 1554int
2e0fef85
JS		 1555lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
1556 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1557{
ed957684
JS		 1558 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1559 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1560 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e
JB		 1561 IOCB_t *entry;
1562 IOCB_t *irsp = NULL;
1563 struct lpfc_iocbq *rspiocbp = NULL;
1564 struct lpfc_iocbq *next_iocb;
1565 struct lpfc_iocbq *cmdiocbp;
1566 struct lpfc_iocbq *saveq;
dea3101e
JB		 1567 uint8_t iocb_cmd_type;
1568 lpfc_iocb_type type;
1569 uint32_t status, free_saveq;
1570 uint32_t portRspPut, portRspMax;
1571 int rc = 1;
1572 unsigned long iflag;
dea3101e 1573
2e0fef85 1574 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1575 pring->stats.iocb_event++;
1576
dea3101e
JB		 1577 /*
1578 * The next available response entry should never exceed the maximum
1579 * entries. If it does, treat it as an adapter hardware error.
1580 */
1581 portRspMax = pring->numRiocb;
1582 portRspPut = le32_to_cpu(pgp->rspPutInx);
1583 if (portRspPut >= portRspMax) {
1584 /*
1585 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1586 * rsp ring <portRspMax>
1587 */
ed957684 1588 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1589 "0303 Ring %d handler: portRspPut %d "
dea3101e 1590 "is bigger then rsp ring %d\n",
e8b62011 1591 pring->ringno, portRspPut, portRspMax);
dea3101e 1592
2e0fef85
JS		 1593 phba->link_state = LPFC_HBA_ERROR;
1594 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1595
1596 phba->work_hs = HS_FFER3;
1597 lpfc_handle_eratt(phba);
1598
1599 return 1;
1600 }
1601
1602 rmb();
dea3101e
JB		 1603 while (pring->rspidx != portRspPut) {
1604 /*
1605 * Build a completion list and call the appropriate handler.
1606 * The process is to get the next available response iocb, get
1607 * a free iocb from the list, copy the response data into the
1608 * free iocb, insert to the continuation list, and update the
1609 * next response index to slim. This process makes response
1610 * iocb's in the ring available to DMA as fast as possible but
1611 * pays a penalty for a copy operation. Since the iocb is
1612 * only 32 bytes, this penalty is considered small relative to
1613 * the PCI reads for register values and a slim write. When
1614 * the ulpLe field is set, the entire Command has been
1615 * received.
1616 */
ed957684
JS		 1617 entry = lpfc_resp_iocb(phba, pring);
1618
858c9f6c 1619 phba->last_completion_time = jiffies;
2e0fef85 1620 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB		 1621 if (rspiocbp == NULL) {
1622 printk(KERN_ERR "%s: out of buffers! Failing "
1623 "completion.\n", __FUNCTION__);
1624 break;
1625 }
1626
ed957684
JS		 1627 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
1628 phba->iocb_rsp_size);
dea3101e
JB		 1629 irsp = &rspiocbp->iocb;
1630
1631 if (++pring->rspidx >= portRspMax)
1632 pring->rspidx = 0;
1633
a58cbd52
JS		 1634 if (pring->ringno == LPFC_ELS_RING) {
1635 lpfc_debugfs_slow_ring_trc(phba,
1636 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1637 *(((uint32_t *) irsp) + 4),
1638 *(((uint32_t *) irsp) + 6),
1639 *(((uint32_t *) irsp) + 7));
1640 }
1641
ed957684 1642 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e
JB		 1643
1644 if (list_empty(&(pring->iocb_continueq))) {
1645 list_add(&rspiocbp->list, &(pring->iocb_continueq));
1646 } else {
1647 list_add_tail(&rspiocbp->list,
1648 &(pring->iocb_continueq));
1649 }
1650
1651 pring->iocb_continueq_cnt++;
1652 if (irsp->ulpLe) {
1653 /*
1654 * By default, the driver expects to free all resources
1655 * associated with this iocb completion.
1656 */
1657 free_saveq = 1;
1658 saveq = list_get_first(&pring->iocb_continueq,
1659 struct lpfc_iocbq, list);
1660 irsp = &(saveq->iocb);
1661 list_del_init(&pring->iocb_continueq);
1662 pring->iocb_continueq_cnt = 0;
1663
1664 pring->stats.iocb_rsp++;
1665
92d7f7b0
JS		 1666 /*
1667 * If resource errors reported from HBA, reduce
1668 * queuedepths of the SCSI device.
1669 */
1670 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1671 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1672 spin_unlock_irqrestore(&phba->hbalock, iflag);
1673 lpfc_adjust_queue_depth(phba);
1674 spin_lock_irqsave(&phba->hbalock, iflag);
1675 }
1676
dea3101e
JB		 1677 if (irsp->ulpStatus) {
1678 /* Rsp ring <ringno> error: IOCB */
ed957684 1679 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1680 "0328 Rsp Ring %d error: "
ed957684
JS		 1681 "IOCB Data: "
1682 "x%x x%x x%x x%x "
1683 "x%x x%x x%x x%x "
1684 "x%x x%x x%x x%x "
1685 "x%x x%x x%x x%x\n",
ed957684
JS		 1686 pring->ringno,
1687 irsp->un.ulpWord[0],
1688 irsp->un.ulpWord[1],
1689 irsp->un.ulpWord[2],
1690 irsp->un.ulpWord[3],
1691 irsp->un.ulpWord[4],
1692 irsp->un.ulpWord[5],
1693 *(((uint32_t *) irsp) + 6),
1694 *(((uint32_t *) irsp) + 7),
1695 *(((uint32_t *) irsp) + 8),
1696 *(((uint32_t *) irsp) + 9),
1697 *(((uint32_t *) irsp) + 10),
1698 *(((uint32_t *) irsp) + 11),
1699 *(((uint32_t *) irsp) + 12),
1700 *(((uint32_t *) irsp) + 13),
1701 *(((uint32_t *) irsp) + 14),
1702 *(((uint32_t *) irsp) + 15));
dea3101e
JB		 1703 }
1704
1705 /*
1706 * Fetch the IOCB command type and call the correct
1707 * completion routine. Solicited and Unsolicited
1708 * IOCBs on the ELS ring get freed back to the
1709 * lpfc_iocb_list by the discovery kernel thread.
1710 */
1711 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1712 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1713 if (type == LPFC_SOL_IOCB) {
2e0fef85 1714 spin_unlock_irqrestore(&phba->hbalock,
dea3101e
JB		 1715 iflag);
1716 rc = lpfc_sli_process_sol_iocb(phba, pring,
2e0fef85
JS		 1717 saveq);
1718 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 1719 } else if (type == LPFC_UNSOL_IOCB) {
2e0fef85 1720 spin_unlock_irqrestore(&phba->hbalock,
dea3101e
JB		 1721 iflag);
1722 rc = lpfc_sli_process_unsol_iocb(phba, pring,
2e0fef85
JS		 1723 saveq);
1724 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1725 } else if (type == LPFC_ABORT_IOCB) {
1726 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1727 ((cmdiocbp =
604a3e30
JB		 1728 lpfc_sli_iocbq_lookup(phba, pring,
1729 saveq)))) {
dea3101e
JB		 1730 /* Call the specified completion
1731 routine */
1732 if (cmdiocbp->iocb_cmpl) {
1733 spin_unlock_irqrestore(
2e0fef85 1734 &phba->hbalock,
dea3101e
JB		 1735 iflag);
1736 (cmdiocbp->iocb_cmpl) (phba,
1737 cmdiocbp, saveq);
1738 spin_lock_irqsave(
2e0fef85 1739 &phba->hbalock,
dea3101e 1740 iflag);
604a3e30 1741 } else
2e0fef85 1742 __lpfc_sli_release_iocbq(phba,
604a3e30 1743 cmdiocbp);
dea3101e
JB		 1744 }
1745 } else if (type == LPFC_UNKNOWN_IOCB) {
1746 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1747
1748 char adaptermsg[LPFC_MAX_ADPTMSG];
1749
1750 memset(adaptermsg, 0,
1751 LPFC_MAX_ADPTMSG);
1752 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1753 MAX_MSG_DATA);
1754 dev_warn(&((phba->pcidev)->dev),
898eb71c 1755 "lpfc%d: %s\n",
dea3101e
JB		 1756 phba->brd_no, adaptermsg);
1757 } else {
1758 /* Unknown IOCB command */
92d7f7b0 1759 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1760 "0335 Unknown IOCB "
92d7f7b0
JS		 1761 "command Data: x%x "
1762 "x%x x%x x%x\n",
92d7f7b0
JS		 1763 irsp->ulpCommand,
1764 irsp->ulpStatus,
1765 irsp->ulpIoTag,
1766 irsp->ulpContext);
dea3101e
JB		 1767 }
1768 }
1769
1770 if (free_saveq) {
2e0fef85
JS		 1771 list_for_each_entry_safe(rspiocbp, next_iocb,
1772 &saveq->list, list) {
1773 list_del(&rspiocbp->list);
1774 __lpfc_sli_release_iocbq(phba,
1775 rspiocbp);
dea3101e 1776 }
2e0fef85 1777 __lpfc_sli_release_iocbq(phba, saveq);
dea3101e 1778 }
92d7f7b0 1779 rspiocbp = NULL;
dea3101e
JB		 1780 }
1781
1782 /*
1783 * If the port response put pointer has not been updated, sync
1784 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1785 * response put pointer.
1786 */
1787 if (pring->rspidx == portRspPut) {
1788 portRspPut = le32_to_cpu(pgp->rspPutInx);
1789 }
1790 } /* while (pring->rspidx != portRspPut) */
1791
92d7f7b0 1792 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB		 1793 /* At least one response entry has been freed */
1794 pring->stats.iocb_rsp_full++;
1795 /* SET RxRE_RSP in Chip Att register */
1796 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1797 writel(status, phba->CAregaddr);
1798 readl(phba->CAregaddr); /* flush */
1799 }
1800 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1801 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1802 pring->stats.iocb_cmd_empty++;
1803
1804 /* Force update of the local copy of cmdGetInx */
1805 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1806 lpfc_sli_resume_iocb(phba, pring);
1807
1808 if ((pring->lpfc_sli_cmd_available))
1809 (pring->lpfc_sli_cmd_available) (phba, pring);
1810
1811 }
1812
2e0fef85 1813 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1814 return rc;
1815}
1816
2e0fef85 1817void
dea3101e
JB		 1818lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1819{
2534ba75 1820 LIST_HEAD(completions);
dea3101e 1821 struct lpfc_iocbq *iocb, *next_iocb;
2534ba75 1822 IOCB_t *cmd = NULL;
dea3101e 1823
92d7f7b0
JS		 1824 if (pring->ringno == LPFC_ELS_RING) {
1825 lpfc_fabric_abort_hba(phba);
1826 }
1827
dea3101e
JB		 1828 /* Error everything on txq and txcmplq
1829 * First do the txq.
1830 */
2e0fef85 1831 spin_lock_irq(&phba->hbalock);
2534ba75 1832 list_splice_init(&pring->txq, &completions);
dea3101e 1833 pring->txq_cnt = 0;
dea3101e
JB		 1834
1835 /* Next issue ABTS for everything on the txcmplq */
2534ba75
JS		 1836 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
1837 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
dea3101e 1838
2e0fef85 1839 spin_unlock_irq(&phba->hbalock);
dea3101e 1840
2534ba75
JS		 1841 while (!list_empty(&completions)) {
1842 iocb = list_get_first(&completions, struct lpfc_iocbq, list);
1843 cmd = &iocb->iocb;
92d7f7b0 1844 list_del_init(&iocb->list);
dea3101e 1845
2e0fef85
JS		 1846 if (!iocb->iocb_cmpl)
1847 lpfc_sli_release_iocbq(phba, iocb);
1848 else {
dea3101e
JB		 1849 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1850 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
dea3101e 1851 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 1852 }
dea3101e 1853 }
dea3101e
JB		 1854}
1855
41415862 1856int
2e0fef85 1857lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
dea3101e 1858{
41415862
JW		 1859 uint32_t status;
1860 int i = 0;
1861 int retval = 0;
dea3101e 1862
41415862
JW		 1863 /* Read the HBA Host Status Register */
1864 status = readl(phba->HSregaddr);
dea3101e 1865
41415862
JW		 1866 /*
1867 * Check status register every 100ms for 5 retries, then every
1868 * 500ms for 5, then every 2.5 sec for 5, then reset board and
1869 * every 2.5 sec for 4.
1870 * Break our of the loop if errors occurred during init.
1871 */
1872 while (((status & mask) != mask) &&
1873 !(status & HS_FFERM) &&
1874 i++ < 20) {
dea3101e 1875
41415862
JW		 1876 if (i <= 5)
1877 msleep(10);
1878 else if (i <= 10)
1879 msleep(500);
1880 else
1881 msleep(2500);
dea3101e 1882
41415862 1883 if (i == 15) {
2e0fef85 1884 /* Do post */
92d7f7b0 1885 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW		 1886 lpfc_sli_brdrestart(phba);
1887 }
1888 /* Read the HBA Host Status Register */
1889 status = readl(phba->HSregaddr);
1890 }
dea3101e 1891
41415862
JW		 1892 /* Check to see if any errors occurred during init */
1893 if ((status & HS_FFERM) || (i >= 20)) {
2e0fef85 1894 phba->link_state = LPFC_HBA_ERROR;
41415862 1895 retval = 1;
dea3101e 1896 }
dea3101e 1897
41415862
JW		 1898 return retval;
1899}
dea3101e 1900
9290831f
JS		 1901#define BARRIER_TEST_PATTERN (0xdeadbeef)
1902
2e0fef85 1903void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 1904{
65a29c16
JS		 1905 uint32_t __iomem *resp_buf;
1906 uint32_t __iomem *mbox_buf;
9290831f
JS		 1907 volatile uint32_t mbox;
1908 uint32_t hc_copy;
1909 int i;
1910 uint8_t hdrtype;
1911
1912 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
1913 if (hdrtype != 0x80 ||
1914 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
1915 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
1916 return;
1917
1918 /*
1919 * Tell the other part of the chip to suspend temporarily all
1920 * its DMA activity.
1921 */
65a29c16 1922 resp_buf = phba->MBslimaddr;
9290831f
JS		 1923
1924 /* Disable the error attention */
1925 hc_copy = readl(phba->HCregaddr);
1926 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
1927 readl(phba->HCregaddr); /* flush */
2e0fef85 1928 phba->link_flag |= LS_IGNORE_ERATT;
9290831f
JS		 1929
1930 if (readl(phba->HAregaddr) & HA_ERATT) {
1931 /* Clear Chip error bit */
1932 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 1933 phba->pport->stopped = 1;
9290831f
JS		 1934 }
1935
1936 mbox = 0;
1937 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
1938 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
1939
1940 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 1941 mbox_buf = phba->MBslimaddr;
9290831f
JS		 1942 writel(mbox, mbox_buf);
1943
1944 for (i = 0;
1945 readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
1946 mdelay(1);
1947
1948 if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
1949 if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
2e0fef85 1950 phba->pport->stopped)
9290831f
JS		 1951 goto restore_hc;
1952 else
1953 goto clear_errat;
1954 }
1955
1956 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
1957 for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
1958 mdelay(1);
1959
1960clear_errat:
1961
1962 while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
1963 mdelay(1);
1964
1965 if (readl(phba->HAregaddr) & HA_ERATT) {
1966 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 1967 phba->pport->stopped = 1;
9290831f
JS		 1968 }
1969
1970restore_hc:
2e0fef85 1971 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS		 1972 writel(hc_copy, phba->HCregaddr);
1973 readl(phba->HCregaddr); /* flush */
1974}
1975
41415862 1976int
2e0fef85 1977lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW		 1978{
1979 struct lpfc_sli *psli;
1980 LPFC_MBOXQ_t *pmb;
1981 uint32_t status;
1982 uint32_t ha_copy;
1983 int retval;
1984 int i = 0;
dea3101e 1985
41415862 1986 psli = &phba->sli;
dea3101e 1987
41415862 1988 /* Kill HBA */
ed957684 1989 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 1990 "0329 Kill HBA Data: x%x x%x\n",
1991 phba->pport->port_state, psli->sli_flag);
41415862 1992
98c9ea5c
JS		 1993 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1994 if (!pmb)
41415862 1995 return 1;
41415862
JW		 1996
1997 /* Disable the error attention */
2e0fef85 1998 spin_lock_irq(&phba->hbalock);
41415862
JW		 1999 status = readl(phba->HCregaddr);
2000 status &= ~HC_ERINT_ENA;
2001 writel(status, phba->HCregaddr);
2002 readl(phba->HCregaddr); /* flush */
2e0fef85
JS		 2003 phba->link_flag |= LS_IGNORE_ERATT;
2004 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2005
2006 lpfc_kill_board(phba, pmb);
2007 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
2008 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2009
2010 if (retval != MBX_SUCCESS) {
2011 if (retval != MBX_BUSY)
2012 mempool_free(pmb, phba->mbox_mem_pool);
2e0fef85
JS		 2013 spin_lock_irq(&phba->hbalock);
2014 phba->link_flag &= ~LS_IGNORE_ERATT;
2015 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2016 return 1;
2017 }
2018
9290831f
JS		 2019 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
2020
41415862
JW		 2021 mempool_free(pmb, phba->mbox_mem_pool);
2022
2023 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
2024 * attention every 100ms for 3 seconds. If we don't get ERATT after
2025 * 3 seconds we still set HBA_ERROR state because the status of the
2026 * board is now undefined.
2027 */
2028 ha_copy = readl(phba->HAregaddr);
2029
2030 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
2031 mdelay(100);
2032 ha_copy = readl(phba->HAregaddr);
2033 }
2034
2035 del_timer_sync(&psli->mbox_tmo);
9290831f
JS		 2036 if (ha_copy & HA_ERATT) {
2037 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 2038 phba->pport->stopped = 1;
9290831f 2039 }
2e0fef85 2040 spin_lock_irq(&phba->hbalock);
41415862 2041 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85
JS		 2042 phba->link_flag &= ~LS_IGNORE_ERATT;
2043 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2044
2045 psli->mbox_active = NULL;
2046 lpfc_hba_down_post(phba);
2e0fef85 2047 phba->link_state = LPFC_HBA_ERROR;
41415862 2048
2e0fef85 2049 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB		 2050}
2051
41415862 2052int
2e0fef85 2053lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 2054{
41415862 2055 struct lpfc_sli *psli;
dea3101e 2056 struct lpfc_sli_ring *pring;
41415862 2057 uint16_t cfg_value;
dea3101e 2058 int i;
dea3101e 2059
41415862 2060 psli = &phba->sli;
dea3101e 2061
41415862
JW		 2062 /* Reset HBA */
2063 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 2064 "0325 Reset HBA Data: x%x x%x\n",
2e0fef85 2065 phba->pport->port_state, psli->sli_flag);
dea3101e
JB		 2066
2067 /* perform board reset */
2068 phba->fc_eventTag = 0;
2e0fef85
JS		 2069 phba->pport->fc_myDID = 0;
2070 phba->pport->fc_prevDID = 0;
dea3101e 2071
41415862
JW		 2072 /* Turn off parity checking and serr during the physical reset */
2073 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
2074 pci_write_config_word(phba->pcidev, PCI_COMMAND,
2075 (cfg_value &
2076 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
2077
1c067a42 2078 psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
41415862
JW		 2079 /* Now toggle INITFF bit in the Host Control Register */
2080 writel(HC_INITFF, phba->HCregaddr);
2081 mdelay(1);
2082 readl(phba->HCregaddr); /* flush */
2083 writel(0, phba->HCregaddr);
2084 readl(phba->HCregaddr); /* flush */
2085
2086 /* Restore PCI cmd register */
2087 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB		 2088
2089 /* Initialize relevant SLI info */
41415862
JW		 2090 for (i = 0; i < psli->num_rings; i++) {
2091 pring = &psli->ring[i];
dea3101e
JB		 2092 pring->flag = 0;
2093 pring->rspidx = 0;
2094 pring->next_cmdidx = 0;
2095 pring->local_getidx = 0;
2096 pring->cmdidx = 0;
2097 pring->missbufcnt = 0;
2098 }
dea3101e 2099
2e0fef85 2100 phba->link_state = LPFC_WARM_START;
41415862
JW		 2101 return 0;
2102}
2103
2104int
2e0fef85 2105lpfc_sli_brdrestart(struct lpfc_hba *phba)
41415862
JW		 2106{
2107 MAILBOX_t *mb;
2108 struct lpfc_sli *psli;
2109 uint16_t skip_post;
2110 volatile uint32_t word0;
2111 void __iomem *to_slim;
2112
2e0fef85 2113 spin_lock_irq(&phba->hbalock);
41415862
JW		 2114
2115 psli = &phba->sli;
2116
2117 /* Restart HBA */
2118 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 2119 "0337 Restart HBA Data: x%x x%x\n",
2e0fef85 2120 phba->pport->port_state, psli->sli_flag);
41415862
JW		 2121
2122 word0 = 0;
2123 mb = (MAILBOX_t *) &word0;
2124 mb->mbxCommand = MBX_RESTART;
2125 mb->mbxHc = 1;
2126
9290831f
JS		 2127 lpfc_reset_barrier(phba);
2128
41415862
JW		 2129 to_slim = phba->MBslimaddr;
2130 writel(*(uint32_t *) mb, to_slim);
2131 readl(to_slim); /* flush */
2132
2133 /* Only skip post after fc_ffinit is completed */
2e0fef85 2134 if (phba->pport->port_state) {
41415862
JW		 2135 skip_post = 1;
2136 word0 = 1; /* This is really setting up word1 */
dea3101e 2137 } else {
41415862
JW		 2138 skip_post = 0;
2139 word0 = 0; /* This is really setting up word1 */
dea3101e 2140 }
65a29c16 2141 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW		 2142 writel(*(uint32_t *) mb, to_slim);
2143 readl(to_slim); /* flush */
dea3101e 2144
41415862 2145 lpfc_sli_brdreset(phba);
2e0fef85
JS		 2146 phba->pport->stopped = 0;
2147 phba->link_state = LPFC_INIT_START;
41415862 2148
2e0fef85 2149 spin_unlock_irq(&phba->hbalock);
41415862 2150
64ba8818
JS		 2151 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
2152 psli->stats_start = get_seconds();
2153
41415862
JW		 2154 if (skip_post)
2155 mdelay(100);
2156 else
2157 mdelay(2000);
2158
2159 lpfc_hba_down_post(phba);
dea3101e
JB		 2160
2161 return 0;
2162}
2163
2164static int
2165lpfc_sli_chipset_init(struct lpfc_hba *phba)
2166{
2167 uint32_t status, i = 0;
2168
2169 /* Read the HBA Host Status Register */
2170 status = readl(phba->HSregaddr);
2171
2172 /* Check status register to see what current state is */
2173 i = 0;
2174 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
2175
2176 /* Check every 100ms for 5 retries, then every 500ms for 5, then
2177 * every 2.5 sec for 5, then reset board and every 2.5 sec for
2178 * 4.
2179 */
2180 if (i++ >= 20) {
2181 /* Adapter failed to init, timeout, status reg
2182 <status> */
ed957684 2183 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 2184 "0436 Adapter failed to init, "
2185 "timeout, status reg x%x\n", status);
2e0fef85 2186 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2187 return -ETIMEDOUT;
2188 }
2189
2190 /* Check to see if any errors occurred during init */
2191 if (status & HS_FFERM) {
2192 /* ERROR: During chipset initialization */
2193 /* Adapter failed to init, chipset, status reg
2194 <status> */
ed957684 2195 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 2196 "0437 Adapter failed to init, "
2197 "chipset, status reg x%x\n", status);
2e0fef85 2198 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2199 return -EIO;
2200 }
2201
2202 if (i <= 5) {
2203 msleep(10);
2204 } else if (i <= 10) {
2205 msleep(500);
2206 } else {
2207 msleep(2500);
2208 }
2209
2210 if (i == 15) {
2e0fef85 2211 /* Do post */
92d7f7b0 2212 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2213 lpfc_sli_brdrestart(phba);
dea3101e
JB		 2214 }
2215 /* Read the HBA Host Status Register */
2216 status = readl(phba->HSregaddr);
2217 }
2218
2219 /* Check to see if any errors occurred during init */
2220 if (status & HS_FFERM) {
2221 /* ERROR: During chipset initialization */
2222 /* Adapter failed to init, chipset, status reg <status> */
ed957684 2223 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 2224 "0438 Adapter failed to init, chipset, "
2225 "status reg x%x\n", status);
2e0fef85 2226 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2227 return -EIO;
2228 }
2229
2230 /* Clear all interrupt enable conditions */
2231 writel(0, phba->HCregaddr);
2232 readl(phba->HCregaddr); /* flush */
2233
2234 /* setup host attn register */
2235 writel(0xffffffff, phba->HAregaddr);
2236 readl(phba->HAregaddr); /* flush */
2237 return 0;
2238}
2239
78b2d852 2240int
ed957684
JS		 2241lpfc_sli_hbq_count(void)
2242{
92d7f7b0 2243 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS		 2244}
2245
2246static int
2247lpfc_sli_hbq_entry_count(void)
2248{
2249 int hbq_count = lpfc_sli_hbq_count();
2250 int count = 0;
2251 int i;
2252
2253 for (i = 0; i < hbq_count; ++i)
92d7f7b0 2254 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS		 2255 return count;
2256}
2257
dea3101e 2258int
ed957684
JS		 2259lpfc_sli_hbq_size(void)
2260{
2261 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
2262}
2263
2264static int
2265lpfc_sli_hbq_setup(struct lpfc_hba *phba)
2266{
2267 int hbq_count = lpfc_sli_hbq_count();
2268 LPFC_MBOXQ_t *pmb;
2269 MAILBOX_t *pmbox;
2270 uint32_t hbqno;
2271 uint32_t hbq_entry_index;
ed957684 2272
92d7f7b0
JS		 2273 /* Get a Mailbox buffer to setup mailbox
2274 * commands for HBA initialization
2275 */
ed957684
JS		 2276 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2277
2278 if (!pmb)
2279 return -ENOMEM;
2280
2281 pmbox = &pmb->mb;
2282
2283 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
2284 phba->link_state = LPFC_INIT_MBX_CMDS;
2285
2286 hbq_entry_index = 0;
2287 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2288 phba->hbqs[hbqno].next_hbqPutIdx = 0;
2289 phba->hbqs[hbqno].hbqPutIdx = 0;
2290 phba->hbqs[hbqno].local_hbqGetIdx = 0;
2291 phba->hbqs[hbqno].entry_count =
92d7f7b0 2292 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS		 2293 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
2294 hbq_entry_index, pmb);
ed957684
JS		 2295 hbq_entry_index += phba->hbqs[hbqno].entry_count;
2296
2297 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
2298 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
2299 mbxStatus <status>, ring <num> */
2300
2301 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2302 LOG_SLI | LOG_VPORT,
e8b62011 2303 "1805 Adapter failed to init. "
ed957684 2304 "Data: x%x x%x x%x\n",
e8b62011 2305 pmbox->mbxCommand,
ed957684
JS		 2306 pmbox->mbxStatus, hbqno);
2307
2308 phba->link_state = LPFC_HBA_ERROR;
2309 mempool_free(pmb, phba->mbox_mem_pool);
ed957684
JS		 2310 return ENXIO;
2311 }
2312 }
2313 phba->hbq_count = hbq_count;
2314
ed957684
JS		 2315 mempool_free(pmb, phba->mbox_mem_pool);
2316
92d7f7b0
JS		 2317 /* Initially populate or replenish the HBQs */
2318 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2319 if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
2320 return -ENOMEM;
2321 }
ed957684
JS		 2322 return 0;
2323}
2324
2325static int
2326lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB		 2327{
2328 LPFC_MBOXQ_t *pmb;
2329 uint32_t resetcount = 0, rc = 0, done = 0;
2330
2331 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2332 if (!pmb) {
2e0fef85 2333 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2334 return -ENOMEM;
2335 }
2336
ed957684 2337 phba->sli_rev = sli_mode;
dea3101e 2338 while (resetcount < 2 && !done) {
2e0fef85 2339 spin_lock_irq(&phba->hbalock);
1c067a42 2340 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2341 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2342 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2343 lpfc_sli_brdrestart(phba);
dea3101e
JB		 2344 msleep(2500);
2345 rc = lpfc_sli_chipset_init(phba);
2346 if (rc)
2347 break;
2348
2e0fef85 2349 spin_lock_irq(&phba->hbalock);
1c067a42 2350 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2351 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 2352 resetcount++;
2353
ed957684
JS		 2354 /* Call pre CONFIG_PORT mailbox command initialization. A
2355 * value of 0 means the call was successful. Any other
2356 * nonzero value is a failure, but if ERESTART is returned,
2357 * the driver may reset the HBA and try again.
2358 */
dea3101e
JB		 2359 rc = lpfc_config_port_prep(phba);
2360 if (rc == -ERESTART) {
ed957684 2361 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e
JB		 2362 continue;
2363 } else if (rc) {
2364 break;
2365 }
2366
2e0fef85 2367 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB		 2368 lpfc_config_port(phba, pmb);
2369 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
ed957684 2370 if (rc != MBX_SUCCESS) {
dea3101e 2371 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2372 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 2373 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
e8b62011 2374 pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
2e0fef85 2375 spin_lock_irq(&phba->hbalock);
dea3101e 2376 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85
JS		 2377 spin_unlock_irq(&phba->hbalock);
2378 rc = -ENXIO;
ed957684
JS		 2379 } else {
2380 done = 1;
92d7f7b0
JS		 2381 phba->max_vpi = (phba->max_vpi &&
2382 pmb->mb.un.varCfgPort.gmv) != 0
2383 ? pmb->mb.un.varCfgPort.max_vpi
2384 : 0;
dea3101e
JB		 2385 }
2386 }
ed957684
JS		 2387
2388 if (!done) {
2389 rc = -EINVAL;
2390 goto do_prep_failed;
2391 }
2392
2393 if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
92d7f7b0 2394 (!pmb->mb.un.varCfgPort.cMA)) {
ed957684
JS		 2395 rc = -ENXIO;
2396 goto do_prep_failed;
2397 }
2398 return rc;
2399
92d7f7b0 2400do_prep_failed:
ed957684
JS		 2401 mempool_free(pmb, phba->mbox_mem_pool);
2402 return rc;
2403}
2404
2405int
2406lpfc_sli_hba_setup(struct lpfc_hba *phba)
2407{
2408 uint32_t rc;
92d7f7b0 2409 int mode = 3;
ed957684
JS		 2410
2411 switch (lpfc_sli_mode) {
2412 case 2:
78b2d852 2413 if (phba->cfg_enable_npiv) {
92d7f7b0 2414 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011 2415 "1824 NPIV enabled: Override lpfc_sli_mode "
92d7f7b0 2416 "parameter (%d) to auto (0).\n",
e8b62011 2417 lpfc_sli_mode);
92d7f7b0
JS		 2418 break;
2419 }
ed957684
JS		 2420 mode = 2;
2421 break;
2422 case 0:
2423 case 3:
2424 break;
2425 default:
92d7f7b0 2426 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2427 "1819 Unrecognized lpfc_sli_mode "
2428 "parameter: %d.\n", lpfc_sli_mode);
ed957684
JS		 2429
2430 break;
2431 }
2432
2433 rc = lpfc_do_config_port(phba, mode);
2434 if (rc && lpfc_sli_mode == 3)
92d7f7b0 2435 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2436 "1820 Unable to select SLI-3. "
2437 "Not supported by adapter.\n");
ed957684
JS		 2438 if (rc && mode != 2)
2439 rc = lpfc_do_config_port(phba, 2);
2440 if (rc)
dea3101e
JB		 2441 goto lpfc_sli_hba_setup_error;
2442
ed957684
JS		 2443 if (phba->sli_rev == 3) {
2444 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
2445 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
2446 phba->sli3_options |= LPFC_SLI3_ENABLED;
2447 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
2448
2449 } else {
2450 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
2451 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 2452 phba->sli3_options = 0;
ed957684
JS		 2453 }
2454
2455 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 2456 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
2457 phba->sli_rev, phba->max_vpi);
ed957684 2458 rc = lpfc_sli_ring_map(phba);
dea3101e
JB		 2459
2460 if (rc)
2461 goto lpfc_sli_hba_setup_error;
2462
92d7f7b0 2463 /* Init HBQs */
ed957684
JS		 2464
2465 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
2466 rc = lpfc_sli_hbq_setup(phba);
2467 if (rc)
2468 goto lpfc_sli_hba_setup_error;
2469 }
2470
dea3101e
JB		 2471 phba->sli.sli_flag |= LPFC_PROCESS_LA;
2472
2473 rc = lpfc_config_port_post(phba);
2474 if (rc)
2475 goto lpfc_sli_hba_setup_error;
2476
ed957684
JS		 2477 return rc;
2478
92d7f7b0 2479lpfc_sli_hba_setup_error:
2e0fef85 2480 phba->link_state = LPFC_HBA_ERROR;
ed957684 2481 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2482 "0445 Firmware initialization failed\n");
dea3101e
JB		 2483 return rc;
2484}
2485
dea3101e
JB		 2486/*! lpfc_mbox_timeout
2487 *
2488 * \pre
2489 * \post
2490 * \param hba Pointer to per struct lpfc_hba structure
2491 * \param l1 Pointer to the driver's mailbox queue.
2492 * \return
2493 * void
2494 *
2495 * \b Description:
2496 *
2497 * This routine handles mailbox timeout events at timer interrupt context.
2498 */
2499void
2500lpfc_mbox_timeout(unsigned long ptr)
2501{
92d7f7b0 2502 struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
dea3101e 2503 unsigned long iflag;
2e0fef85 2504 uint32_t tmo_posted;
dea3101e 2505
2e0fef85 2506 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
92d7f7b0 2507 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
2e0fef85
JS		 2508 if (!tmo_posted)
2509 phba->pport->work_port_events |= WORKER_MBOX_TMO;
2510 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
2511
2512 if (!tmo_posted) {
92d7f7b0 2513 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 2514 if (phba->work_wait)
92d7f7b0
JS		 2515 lpfc_worker_wake_up(phba);
2516 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 2517 }
dea3101e
JB		 2518}
2519
2520void
2521lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
2522{
2e0fef85
JS		 2523 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
2524 MAILBOX_t *mb = &pmbox->mb;
1dcb58e5
JS		 2525 struct lpfc_sli *psli = &phba->sli;
2526 struct lpfc_sli_ring *pring;
dea3101e 2527
2e0fef85 2528 if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
dea3101e
JB		 2529 return;
2530 }
2531
dea3101e 2532 /* Mbox cmd <mbxCommand> timeout */
ed957684 2533 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2534 "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
92d7f7b0
JS		 2535 mb->mbxCommand,
2536 phba->pport->port_state,
2537 phba->sli.sli_flag,
2538 phba->sli.mbox_active);
dea3101e 2539
1dcb58e5
JS		 2540 /* Setting state unknown so lpfc_sli_abort_iocb_ring
2541 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
2542 * it to fail all oustanding SCSI IO.
2543 */
2e0fef85
JS		 2544 spin_lock_irq(&phba->pport->work_port_lock);
2545 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
2546 spin_unlock_irq(&phba->pport->work_port_lock);
2547 spin_lock_irq(&phba->hbalock);
2548 phba->link_state = LPFC_LINK_UNKNOWN;
2549 phba->pport->fc_flag |= FC_ESTABLISH_LINK;
1dcb58e5 2550 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85 2551 spin_unlock_irq(&phba->hbalock);
1dcb58e5
JS		 2552
2553 pring = &psli->ring[psli->fcp_ring];
2554 lpfc_sli_abort_iocb_ring(phba, pring);
2555
2556 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
76bb24ef 2557 "0345 Resetting board due to mailbox timeout\n");
1dcb58e5
JS		 2558 /*
2559 * lpfc_offline calls lpfc_sli_hba_down which will clean up
2560 * on oustanding mailbox commands.
2561 */
2562 lpfc_offline_prep(phba);
2563 lpfc_offline(phba);
2564 lpfc_sli_brdrestart(phba);
2565 if (lpfc_online(phba) == 0) /* Initialize the HBA */
2566 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
2567 lpfc_unblock_mgmt_io(phba);
dea3101e
JB		 2568 return;
2569}
2570
2571int
2e0fef85 2572lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
dea3101e 2573{
dea3101e 2574 MAILBOX_t *mb;
2e0fef85 2575 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB		 2576 uint32_t status, evtctr;
2577 uint32_t ha_copy;
2578 int i;
2579 unsigned long drvr_flag = 0;
2580 volatile uint32_t word0, ldata;
2581 void __iomem *to_slim;
2582
ed957684 2583 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 2584 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684
JS		 2585 if(!pmbox->vport) {
2586 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2587 LOG_MBOX | LOG_VPORT,
e8b62011 2588 "1806 Mbox x%x failed. No vport\n",
ed957684
JS		 2589 pmbox->mb.mbxCommand);
2590 dump_stack();
2591 return MBXERR_ERROR;
2592 }
2593 }
2594
92d7f7b0 2595
8d63f375
LV		 2596 /* If the PCI channel is in offline state, do not post mbox. */
2597 if (unlikely(pci_channel_offline(phba->pcidev)))
2598 return MBX_NOT_FINISHED;
2599
2e0fef85 2600 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e 2601 psli = &phba->sli;
92d7f7b0
JS		 2602
2603
dea3101e
JB		 2604 mb = &pmbox->mb;
2605 status = MBX_SUCCESS;
2606
2e0fef85
JS		 2607 if (phba->link_state == LPFC_HBA_ERROR) {
2608 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW		 2609
2610 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2611 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
2e0fef85 2612 return MBX_NOT_FINISHED;
41415862
JW		 2613 }
2614
9290831f
JS		 2615 if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
2616 !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
2e0fef85 2617 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
92d7f7b0 2618 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
2e0fef85 2619 return MBX_NOT_FINISHED;
9290831f
JS		 2620 }
2621
dea3101e
JB		 2622 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
2623 /* Polling for a mbox command when another one is already active
2624 * is not allowed in SLI. Also, the driver must have established
2625 * SLI2 mode to queue and process multiple mbox commands.
2626 */
2627
2628 if (flag & MBX_POLL) {
2e0fef85 2629 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB		 2630
2631 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2632 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2633 return MBX_NOT_FINISHED;
dea3101e
JB		 2634 }
2635
2636 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
2e0fef85 2637 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2638 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2639 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2640 return MBX_NOT_FINISHED;
dea3101e
JB		 2641 }
2642
dea3101e
JB		 2643 /* Another mailbox command is still being processed, queue this
2644 * command to be processed later.
2645 */
2646 lpfc_mbox_put(phba, pmbox);
2647
2648 /* Mbox cmd issue - BUSY */
ed957684 2649 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2650 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 2651 "x%x x%x x%x x%x\n",
92d7f7b0
JS		 2652 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
2653 mb->mbxCommand, phba->pport->port_state,
2654 psli->sli_flag, flag);
dea3101e
JB		 2655
2656 psli->slistat.mbox_busy++;
2e0fef85 2657 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2658
858c9f6c
JS		 2659 if (pmbox->vport) {
2660 lpfc_debugfs_disc_trc(pmbox->vport,
2661 LPFC_DISC_TRC_MBOX_VPORT,
2662 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
2663 (uint32_t)mb->mbxCommand,
2664 mb->un.varWords[0], mb->un.varWords[1]);
2665 }
2666 else {
2667 lpfc_debugfs_disc_trc(phba->pport,
2668 LPFC_DISC_TRC_MBOX,
2669 "MBOX Bsy: cmd:x%x mb:x%x x%x",
2670 (uint32_t)mb->mbxCommand,
2671 mb->un.varWords[0], mb->un.varWords[1]);
2672 }
2673
2e0fef85 2674 return MBX_BUSY;
dea3101e
JB		 2675 }
2676
dea3101e
JB		 2677 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2678
2679 /* If we are not polling, we MUST be in SLI2 mode */
2680 if (flag != MBX_POLL) {
41415862
JW		 2681 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
2682 (mb->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 2683 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2684 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2685 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2686 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2687 return MBX_NOT_FINISHED;
dea3101e
JB		 2688 }
2689 /* timeout active mbox command */
a309a6b6
JS		 2690 mod_timer(&psli->mbox_tmo, (jiffies +
2691 (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
dea3101e
JB		 2692 }
2693
2694 /* Mailbox cmd <cmd> issue */
ed957684 2695 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2696 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 2697 "x%x\n",
e8b62011 2698 pmbox->vport ? pmbox->vport->vpi : 0,
92d7f7b0
JS		 2699 mb->mbxCommand, phba->pport->port_state,
2700 psli->sli_flag, flag);
dea3101e 2701
858c9f6c
JS		 2702 if (mb->mbxCommand != MBX_HEARTBEAT) {
2703 if (pmbox->vport) {
2704 lpfc_debugfs_disc_trc(pmbox->vport,
2705 LPFC_DISC_TRC_MBOX_VPORT,
2706 "MBOX Send vport: cmd:x%x mb:x%x x%x",
2707 (uint32_t)mb->mbxCommand,
2708 mb->un.varWords[0], mb->un.varWords[1]);
2709 }
2710 else {
2711 lpfc_debugfs_disc_trc(phba->pport,
2712 LPFC_DISC_TRC_MBOX,
2713 "MBOX Send: cmd:x%x mb:x%x x%x",
2714 (uint32_t)mb->mbxCommand,
2715 mb->un.varWords[0], mb->un.varWords[1]);
2716 }
2717 }
2718
dea3101e
JB		 2719 psli->slistat.mbox_cmd++;
2720 evtctr = psli->slistat.mbox_event;
2721
2722 /* next set own bit for the adapter and copy over command word */
2723 mb->mbxOwner = OWN_CHIP;
2724
2725 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2726 /* First copy command data to host SLIM area */
4cc2da1d 2727 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
dea3101e 2728 } else {
9290831f 2729 if (mb->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 2730 /* copy command data into host mbox for cmpl */
4cc2da1d 2731 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
92d7f7b0 2732 MAILBOX_CMD_SIZE);
dea3101e
JB		 2733 }
2734
2735 /* First copy mbox command data to HBA SLIM, skip past first
2736 word */
2737 to_slim = phba->MBslimaddr + sizeof (uint32_t);
2738 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
2739 MAILBOX_CMD_SIZE - sizeof (uint32_t));
2740
2741 /* Next copy over first word, with mbxOwner set */
2742 ldata = *((volatile uint32_t *)mb);
2743 to_slim = phba->MBslimaddr;
2744 writel(ldata, to_slim);
2745 readl(to_slim); /* flush */
2746
2747 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2748 /* switch over to host mailbox */
2749 psli->sli_flag |= LPFC_SLI2_ACTIVE;
2750 }
2751 }
2752
2753 wmb();
2754 /* interrupt board to doit right away */
2755 writel(CA_MBATT, phba->CAregaddr);
2756 readl(phba->CAregaddr); /* flush */
2757
2758 switch (flag) {
2759 case MBX_NOWAIT:
2760 /* Don't wait for it to finish, just return */
2761 psli->mbox_active = pmbox;
2762 break;
2763
2764 case MBX_POLL:
dea3101e
JB		 2765 psli->mbox_active = NULL;
2766 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2767 /* First read mbox status word */
4cc2da1d 2768 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
dea3101e
JB		 2769 word0 = le32_to_cpu(word0);
2770 } else {
2771 /* First read mbox status word */
2772 word0 = readl(phba->MBslimaddr);
2773 }
2774
2775 /* Read the HBA Host Attention Register */
2776 ha_copy = readl(phba->HAregaddr);
2777
a309a6b6
JS		 2778 i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
2779 i *= 1000; /* Convert to ms */
2780
dea3101e 2781 /* Wait for command to complete */
41415862
JW		 2782 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
2783 (!(ha_copy & HA_MBATT) &&
2e0fef85 2784 (phba->link_state > LPFC_WARM_START))) {
a309a6b6 2785 if (i-- <= 0) {
dea3101e 2786 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2787 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 2788 drvr_flag);
2e0fef85 2789 return MBX_NOT_FINISHED;
dea3101e
JB		 2790 }
2791
2792 /* Check if we took a mbox interrupt while we were
2793 polling */
2794 if (((word0 & OWN_CHIP) != OWN_CHIP)
2795 && (evtctr != psli->slistat.mbox_event))
2796 break;
2797
2e0fef85 2798 spin_unlock_irqrestore(&phba->hbalock,
dea3101e
JB		 2799 drvr_flag);
2800
1dcb58e5 2801 msleep(1);
dea3101e 2802
2e0fef85 2803 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e
JB		 2804
2805 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2806 /* First copy command data */
4cc2da1d
JSEC		 2807 word0 = *((volatile uint32_t *)
2808 &phba->slim2p->mbx);
dea3101e
JB		 2809 word0 = le32_to_cpu(word0);
2810 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2811 MAILBOX_t *slimmb;
2812 volatile uint32_t slimword0;
2813 /* Check real SLIM for any errors */
2814 slimword0 = readl(phba->MBslimaddr);
2815 slimmb = (MAILBOX_t *) & slimword0;
2816 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
2817 && slimmb->mbxStatus) {
2818 psli->sli_flag &=
2819 ~LPFC_SLI2_ACTIVE;
2820 word0 = slimword0;
2821 }
2822 }
2823 } else {
2824 /* First copy command data */
2825 word0 = readl(phba->MBslimaddr);
2826 }
2827 /* Read the HBA Host Attention Register */
2828 ha_copy = readl(phba->HAregaddr);
2829 }
2830
2831 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2832 /* copy results back to user */
4cc2da1d 2833 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
92d7f7b0 2834 MAILBOX_CMD_SIZE);
dea3101e
JB		 2835 } else {
2836 /* First copy command data */
2837 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
2838 MAILBOX_CMD_SIZE);
2839 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
2840 pmbox->context2) {
92d7f7b0 2841 lpfc_memcpy_from_slim((void *)pmbox->context2,
dea3101e
JB		 2842 phba->MBslimaddr + DMP_RSP_OFFSET,
2843 mb->un.varDmp.word_cnt);
2844 }
2845 }
2846
2847 writel(HA_MBATT, phba->HAregaddr);
2848 readl(phba->HAregaddr); /* flush */
2849
2850 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2851 status = mb->mbxStatus;
2852 }
2853
2e0fef85
JS		 2854 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
2855 return status;
dea3101e
JB		 2856}
2857
92d7f7b0
JS		 2858/*
2859 * Caller needs to hold lock.
2860 */
858c9f6c 2861static void
92d7f7b0 2862__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2863 struct lpfc_iocbq *piocb)
dea3101e
JB		 2864{
2865 /* Insert the caller's iocb in the txq tail for later processing. */
2866 list_add_tail(&piocb->list, &pring->txq);
2867 pring->txq_cnt++;
dea3101e
JB		 2868}
2869
2870static struct lpfc_iocbq *
2871lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2872 struct lpfc_iocbq **piocb)
dea3101e
JB		 2873{
2874 struct lpfc_iocbq * nextiocb;
2875
2876 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2877 if (!nextiocb) {
2878 nextiocb = *piocb;
2879 *piocb = NULL;
2880 }
2881
2882 return nextiocb;
2883}
2884
92d7f7b0
JS		 2885/*
2886 * Lockless version of lpfc_sli_issue_iocb.
2887 */
98c9ea5c 2888static int
92d7f7b0 2889__lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB		 2890 struct lpfc_iocbq *piocb, uint32_t flag)
2891{
2892 struct lpfc_iocbq *nextiocb;
2893 IOCB_t *iocb;
2894
92d7f7b0
JS		 2895 if (piocb->iocb_cmpl && (!piocb->vport) &&
2896 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2897 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
2898 lpfc_printf_log(phba, KERN_ERR,
2899 LOG_SLI | LOG_VPORT,
e8b62011 2900 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS		 2901 piocb->iocb.ulpCommand);
2902 dump_stack();
2903 return IOCB_ERROR;
2904 }
2905
2906
8d63f375
LV		 2907 /* If the PCI channel is in offline state, do not post iocbs. */
2908 if (unlikely(pci_channel_offline(phba->pcidev)))
2909 return IOCB_ERROR;
2910
dea3101e
JB		 2911 /*
2912 * We should never get an IOCB if we are in a < LINK_DOWN state
2913 */
2e0fef85 2914 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB		 2915 return IOCB_ERROR;
2916
2917 /*
2918 * Check to see if we are blocking IOCB processing because of a
0b727fea 2919 * outstanding event.
dea3101e 2920 */
0b727fea 2921 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e
JB		 2922 goto iocb_busy;
2923
2e0fef85 2924 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 2925 /*
2680eeaa 2926 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB		 2927 * can be issued if the link is not up.
2928 */
2929 switch (piocb->iocb.ulpCommand) {
2930 case CMD_QUE_RING_BUF_CN:
2931 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB		 2932 /*
2933 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
2934 * completion, iocb_cmpl MUST be 0.
2935 */
2936 if (piocb->iocb_cmpl)
2937 piocb->iocb_cmpl = NULL;
2938 /*FALLTHROUGH*/
2939 case CMD_CREATE_XRI_CR:
2680eeaa
JS		 2940 case CMD_CLOSE_XRI_CN:
2941 case CMD_CLOSE_XRI_CX:
dea3101e
JB		 2942 break;
2943 default:
2944 goto iocb_busy;
2945 }
2946
2947 /*
2948 * For FCP commands, we must be in a state where we can process link
2949 * attention events.
2950 */
2951 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
92d7f7b0 2952 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 2953 goto iocb_busy;
92d7f7b0 2954 }
dea3101e 2955
dea3101e
JB		 2956 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
2957 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
2958 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
2959
2960 if (iocb)
2961 lpfc_sli_update_ring(phba, pring);
2962 else
2963 lpfc_sli_update_full_ring(phba, pring);
2964
2965 if (!piocb)
2966 return IOCB_SUCCESS;
2967
2968 goto out_busy;
2969
2970 iocb_busy:
2971 pring->stats.iocb_cmd_delay++;
2972
2973 out_busy:
2974
2975 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 2976 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB		 2977 return IOCB_SUCCESS;
2978 }
2979
2980 return IOCB_BUSY;
2981}
2982
92d7f7b0
JS		 2983
2984int
2985lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2986 struct lpfc_iocbq *piocb, uint32_t flag)
2987{
2988 unsigned long iflags;
2989 int rc;
2990
2991 spin_lock_irqsave(&phba->hbalock, iflags);
2992 rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
2993 spin_unlock_irqrestore(&phba->hbalock, iflags);
2994
2995 return rc;
2996}
2997
cf5bf97e
JW		 2998static int
2999lpfc_extra_ring_setup( struct lpfc_hba *phba)
3000{
3001 struct lpfc_sli *psli;
3002 struct lpfc_sli_ring *pring;
3003
3004 psli = &phba->sli;
3005
3006 /* Adjust cmd/rsp ring iocb entries more evenly */
a4bc3379
JS		 3007
3008 /* Take some away from the FCP ring */
cf5bf97e
JW		 3009 pring = &psli->ring[psli->fcp_ring];
3010 pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3011 pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3012 pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3013 pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
3014
a4bc3379
JS		 3015 /* and give them to the extra ring */
3016 pring = &psli->ring[psli->extra_ring];
3017
cf5bf97e
JW		 3018 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3019 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3020 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3021 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
3022
3023 /* Setup default profile for this ring */
3024 pring->iotag_max = 4096;
3025 pring->num_mask = 1;
3026 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS		 3027 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
3028 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW		 3029 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
3030 return 0;
3031}
3032
98c9ea5c 3033static void
57127f15
JS		 3034lpfc_sli_async_event_handler(struct lpfc_hba * phba,
3035 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
3036{
3037 IOCB_t *icmd;
3038 uint16_t evt_code;
3039 uint16_t temp;
3040 struct temp_event temp_event_data;
3041 struct Scsi_Host *shost;
3042
3043 icmd = &iocbq->iocb;
3044 evt_code = icmd->un.asyncstat.evt_code;
3045 temp = icmd->ulpContext;
3046
3047 if ((evt_code != ASYNC_TEMP_WARN) &&
3048 (evt_code != ASYNC_TEMP_SAFE)) {
3049 lpfc_printf_log(phba,
3050 KERN_ERR,
3051 LOG_SLI,
76bb24ef 3052 "0346 Ring %d handler: unexpected ASYNC_STATUS"
57127f15
JS		 3053 " evt_code 0x%x\n",
3054 pring->ringno,
3055 icmd->un.asyncstat.evt_code);
3056 return;
3057 }
3058 temp_event_data.data = (uint32_t)temp;
3059 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
3060 if (evt_code == ASYNC_TEMP_WARN) {
3061 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
3062 lpfc_printf_log(phba,
3063 KERN_WARNING,
3064 LOG_TEMP,
76bb24ef 3065 "0347 Adapter is very hot, please take "
57127f15
JS		 3066 "corrective action. temperature : %d Celsius\n",
3067 temp);
3068 }
3069 if (evt_code == ASYNC_TEMP_SAFE) {
3070 temp_event_data.event_code = LPFC_NORMAL_TEMP;
3071 lpfc_printf_log(phba,
3072 KERN_INFO,
3073 LOG_TEMP,
3074 "0340 Adapter temperature is OK now. "
3075 "temperature : %d Celsius\n",
3076 temp);
3077 }
3078
3079 /* Send temperature change event to applications */
3080 shost = lpfc_shost_from_vport(phba->pport);
3081 fc_host_post_vendor_event(shost, fc_get_event_number(),
3082 sizeof(temp_event_data), (char *) &temp_event_data,
3083 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
3084
3085}
3086
3087
dea3101e
JB		 3088int
3089lpfc_sli_setup(struct lpfc_hba *phba)
3090{
ed957684 3091 int i, totiocbsize = 0;
dea3101e
JB		 3092 struct lpfc_sli *psli = &phba->sli;
3093 struct lpfc_sli_ring *pring;
3094
3095 psli->num_rings = MAX_CONFIGURED_RINGS;
3096 psli->sli_flag = 0;
3097 psli->fcp_ring = LPFC_FCP_RING;
3098 psli->next_ring = LPFC_FCP_NEXT_RING;
a4bc3379 3099 psli->extra_ring = LPFC_EXTRA_RING;
dea3101e 3100
604a3e30
JB		 3101 psli->iocbq_lookup = NULL;
3102 psli->iocbq_lookup_len = 0;
3103 psli->last_iotag = 0;
3104
dea3101e
JB		 3105 for (i = 0; i < psli->num_rings; i++) {
3106 pring = &psli->ring[i];
3107 switch (i) {
3108 case LPFC_FCP_RING: /* ring 0 - FCP */
3109 /* numCiocb and numRiocb are used in config_port */
3110 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
3111 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
3112 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3113 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3114 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3115 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
ed957684 3116 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3117 SLI3_IOCB_CMD_SIZE :
3118 SLI2_IOCB_CMD_SIZE;
ed957684 3119 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3120 SLI3_IOCB_RSP_SIZE :
3121 SLI2_IOCB_RSP_SIZE;
dea3101e
JB		 3122 pring->iotag_ctr = 0;
3123 pring->iotag_max =
92d7f7b0 3124 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB		 3125 pring->fast_iotag = pring->iotag_max;
3126 pring->num_mask = 0;
3127 break;
a4bc3379 3128 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e
JB		 3129 /* numCiocb and numRiocb are used in config_port */
3130 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
3131 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
ed957684 3132 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3133 SLI3_IOCB_CMD_SIZE :
3134 SLI2_IOCB_CMD_SIZE;
ed957684 3135 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3136 SLI3_IOCB_RSP_SIZE :
3137 SLI2_IOCB_RSP_SIZE;
2e0fef85 3138 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB		 3139 pring->num_mask = 0;
3140 break;
3141 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
3142 /* numCiocb and numRiocb are used in config_port */
3143 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
3144 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
ed957684 3145 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3146 SLI3_IOCB_CMD_SIZE :
3147 SLI2_IOCB_CMD_SIZE;
ed957684 3148 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3149 SLI3_IOCB_RSP_SIZE :
3150 SLI2_IOCB_RSP_SIZE;
dea3101e
JB		 3151 pring->fast_iotag = 0;
3152 pring->iotag_ctr = 0;
3153 pring->iotag_max = 4096;
57127f15
JS		 3154 pring->lpfc_sli_rcv_async_status =
3155 lpfc_sli_async_event_handler;
dea3101e
JB		 3156 pring->num_mask = 4;
3157 pring->prt[0].profile = 0; /* Mask 0 */
3158 pring->prt[0].rctl = FC_ELS_REQ;
3159 pring->prt[0].type = FC_ELS_DATA;
3160 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 3161 lpfc_els_unsol_event;
dea3101e
JB		 3162 pring->prt[1].profile = 0; /* Mask 1 */
3163 pring->prt[1].rctl = FC_ELS_RSP;
3164 pring->prt[1].type = FC_ELS_DATA;
3165 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 3166 lpfc_els_unsol_event;
dea3101e
JB		 3167 pring->prt[2].profile = 0; /* Mask 2 */
3168 /* NameServer Inquiry */
3169 pring->prt[2].rctl = FC_UNSOL_CTL;
3170 /* NameServer */
3171 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
3172 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 3173 lpfc_ct_unsol_event;
dea3101e
JB		 3174 pring->prt[3].profile = 0; /* Mask 3 */
3175 /* NameServer response */
3176 pring->prt[3].rctl = FC_SOL_CTL;
3177 /* NameServer */
3178 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
3179 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 3180 lpfc_ct_unsol_event;
dea3101e
JB		 3181 break;
3182 }
ed957684 3183 totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
92d7f7b0 3184 (pring->numRiocb * pring->sizeRiocb);
dea3101e 3185 }
ed957684 3186 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 3187 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS		 3188 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
3189 "SLI2 SLIM Data: x%x x%lx\n",
3190 phba->brd_no, totiocbsize,
3191 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 3192 }
cf5bf97e
JW		 3193 if (phba->cfg_multi_ring_support == 2)
3194 lpfc_extra_ring_setup(phba);
dea3101e
JB		 3195
3196 return 0;
3197}
3198
3199int
2e0fef85 3200lpfc_sli_queue_setup(struct lpfc_hba *phba)
dea3101e
JB		 3201{
3202 struct lpfc_sli *psli;
3203 struct lpfc_sli_ring *pring;
604a3e30 3204 int i;
dea3101e
JB		 3205
3206 psli = &phba->sli;
2e0fef85 3207 spin_lock_irq(&phba->hbalock);
dea3101e 3208 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 3209 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB		 3210 /* Initialize list headers for txq and txcmplq as double linked lists */
3211 for (i = 0; i < psli->num_rings; i++) {
3212 pring = &psli->ring[i];
3213 pring->ringno = i;
3214 pring->next_cmdidx = 0;
3215 pring->local_getidx = 0;
3216 pring->cmdidx = 0;
3217 INIT_LIST_HEAD(&pring->txq);
3218 INIT_LIST_HEAD(&pring->txcmplq);
3219 INIT_LIST_HEAD(&pring->iocb_continueq);
3220 INIT_LIST_HEAD(&pring->postbufq);
dea3101e 3221 }
2e0fef85
JS		 3222 spin_unlock_irq(&phba->hbalock);
3223 return 1;
dea3101e
JB		 3224}
3225
92d7f7b0
JS		 3226int
3227lpfc_sli_host_down(struct lpfc_vport *vport)
3228{
858c9f6c 3229 LIST_HEAD(completions);
92d7f7b0
JS		 3230 struct lpfc_hba *phba = vport->phba;
3231 struct lpfc_sli *psli = &phba->sli;
3232 struct lpfc_sli_ring *pring;
3233 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS		 3234 int i;
3235 unsigned long flags = 0;
3236 uint16_t prev_pring_flag;
3237
3238 lpfc_cleanup_discovery_resources(vport);
3239
3240 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0
JS		 3241 for (i = 0; i < psli->num_rings; i++) {
3242 pring = &psli->ring[i];
3243 prev_pring_flag = pring->flag;
858c9f6c
JS		 3244 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3245 pring->flag |= LPFC_DEFERRED_RING_EVENT;
92d7f7b0
JS		 3246 /*
3247 * Error everything on the txq since these iocbs have not been
3248 * given to the FW yet.
3249 */
92d7f7b0
JS		 3250 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
3251 if (iocb->vport != vport)
3252 continue;
858c9f6c 3253 list_move_tail(&iocb->list, &completions);
92d7f7b0 3254 pring->txq_cnt--;
92d7f7b0
JS		 3255 }
3256
3257 /* Next issue ABTS for everything on the txcmplq */
3258 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
3259 list) {
3260 if (iocb->vport != vport)
3261 continue;
3262 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3263 }
3264
3265 pring->flag = prev_pring_flag;
3266 }
3267
3268 spin_unlock_irqrestore(&phba->hbalock, flags);
3269
858c9f6c
JS		 3270 while (!list_empty(&completions)) {
3271 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
3272
3273 if (!iocb->iocb_cmpl)
3274 lpfc_sli_release_iocbq(phba, iocb);
3275 else {
3276 iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3277 iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
3278 (iocb->iocb_cmpl) (phba, iocb, iocb);
3279 }
3280 }
92d7f7b0
JS		 3281 return 1;
3282}
3283
dea3101e 3284int
2e0fef85 3285lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 3286{
2534ba75 3287 LIST_HEAD(completions);
2e0fef85 3288 struct lpfc_sli *psli = &phba->sli;
dea3101e 3289 struct lpfc_sli_ring *pring;
0ff10d46 3290 struct lpfc_dmabuf *buf_ptr;
dea3101e 3291 LPFC_MBOXQ_t *pmb;
2534ba75
JS		 3292 struct lpfc_iocbq *iocb;
3293 IOCB_t *cmd = NULL;
dea3101e
JB		 3294 int i;
3295 unsigned long flags = 0;
3296
dea3101e
JB		 3297 lpfc_hba_down_prep(phba);
3298
92d7f7b0
JS		 3299 lpfc_fabric_abort_hba(phba);
3300
2e0fef85 3301 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e
JB		 3302 for (i = 0; i < psli->num_rings; i++) {
3303 pring = &psli->ring[i];
858c9f6c
JS		 3304 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3305 pring->flag |= LPFC_DEFERRED_RING_EVENT;
dea3101e
JB		 3306
3307 /*
3308 * Error everything on the txq since these iocbs have not been
3309 * given to the FW yet.
3310 */
2534ba75 3311 list_splice_init(&pring->txq, &completions);
dea3101e
JB		 3312 pring->txq_cnt = 0;
3313
2534ba75 3314 }
2e0fef85 3315 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 3316
2534ba75 3317 while (!list_empty(&completions)) {
92d7f7b0 3318 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
2534ba75 3319 cmd = &iocb->iocb;
dea3101e 3320
2e0fef85
JS		 3321 if (!iocb->iocb_cmpl)
3322 lpfc_sli_release_iocbq(phba, iocb);
3323 else {
2534ba75
JS		 3324 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
3325 cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
3326 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 3327 }
dea3101e
JB		 3328 }
3329
0ff10d46
JS		 3330 spin_lock_irqsave(&phba->hbalock, flags);
3331 list_splice_init(&phba->elsbuf, &completions);
3332 phba->elsbuf_cnt = 0;
3333 phba->elsbuf_prev_cnt = 0;
3334 spin_unlock_irqrestore(&phba->hbalock, flags);
3335
3336 while (!list_empty(&completions)) {
3337 list_remove_head(&completions, buf_ptr,
3338 struct lpfc_dmabuf, list);
3339 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
3340 kfree(buf_ptr);
3341 }
3342
dea3101e
JB		 3343 /* Return any active mbox cmds */
3344 del_timer_sync(&psli->mbox_tmo);
92d7f7b0 3345 spin_lock_irqsave(&phba->hbalock, flags);
2e0fef85 3346
92d7f7b0 3347 spin_lock(&phba->pport->work_port_lock);
2e0fef85 3348 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
92d7f7b0 3349 spin_unlock(&phba->pport->work_port_lock);
2e0fef85 3350
92d7f7b0
JS		 3351 if (psli->mbox_active) {
3352 list_add_tail(&psli->mbox_active->list, &completions);
2e0fef85 3353 psli->mbox_active = NULL;
2e0fef85 3354 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
dea3101e 3355 }
dea3101e 3356
92d7f7b0
JS		 3357 /* Return any pending or completed mbox cmds */
3358 list_splice_init(&phba->sli.mboxq, &completions);
3359 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
3360 INIT_LIST_HEAD(&psli->mboxq);
3361 INIT_LIST_HEAD(&psli->mboxq_cmpl);
3362
3363 spin_unlock_irqrestore(&phba->hbalock, flags);
3364
3365 while (!list_empty(&completions)) {
3366 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
dea3101e
JB		 3367 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
3368 if (pmb->mbox_cmpl) {
dea3101e 3369 pmb->mbox_cmpl(phba,pmb);
dea3101e
JB		 3370 }
3371 }
dea3101e
JB		 3372 return 1;
3373}
3374
3375void
3376lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
3377{
3378 uint32_t *src = srcp;
3379 uint32_t *dest = destp;
3380 uint32_t ldata;
3381 int i;
3382
3383 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
3384 ldata = *src;
3385 ldata = le32_to_cpu(ldata);
3386 *dest = ldata;
3387 src++;
3388 dest++;
3389 }
3390}
3391
3392int
2e0fef85
JS		 3393lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3394 struct lpfc_dmabuf *mp)
dea3101e
JB		 3395{
3396 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
3397 later */
2e0fef85 3398 spin_lock_irq(&phba->hbalock);
dea3101e 3399 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 3400 pring->postbufq_cnt++;
2e0fef85 3401 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 3402 return 0;
3403}
3404
76bb24ef
JS		 3405uint32_t
3406lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
3407{
3408 spin_lock_irq(&phba->hbalock);
3409 phba->buffer_tag_count++;
3410 /*
3411 * Always set the QUE_BUFTAG_BIT to distiguish between
3412 * a tag assigned by HBQ.
3413 */
3414 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
3415 spin_unlock_irq(&phba->hbalock);
3416 return phba->buffer_tag_count;
3417}
3418
3419struct lpfc_dmabuf *
3420lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3421 uint32_t tag)
3422{
3423 struct lpfc_dmabuf *mp, *next_mp;
3424 struct list_head *slp = &pring->postbufq;
3425
3426 /* Search postbufq, from the begining, looking for a match on tag */
3427 spin_lock_irq(&phba->hbalock);
3428 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
3429 if (mp->buffer_tag == tag) {
3430 list_del_init(&mp->list);
3431 pring->postbufq_cnt--;
3432 spin_unlock_irq(&phba->hbalock);
3433 return mp;
3434 }
3435 }
3436
3437 spin_unlock_irq(&phba->hbalock);
3438 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3439 "0410 Cannot find virtual addr for buffer tag on "
3440 "ring %d Data x%lx x%p x%p x%x\n",
3441 pring->ringno, (unsigned long) tag,
3442 slp->next, slp->prev, pring->postbufq_cnt);
3443
3444 return NULL;
3445}
dea3101e
JB		 3446
3447struct lpfc_dmabuf *
3448lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3449 dma_addr_t phys)
3450{
3451 struct lpfc_dmabuf *mp, *next_mp;
3452 struct list_head *slp = &pring->postbufq;
3453
3454 /* Search postbufq, from the begining, looking for a match on phys */
2e0fef85 3455 spin_lock_irq(&phba->hbalock);
dea3101e
JB		 3456 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
3457 if (mp->phys == phys) {
3458 list_del_init(&mp->list);
3459 pring->postbufq_cnt--;
2e0fef85 3460 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 3461 return mp;
3462 }
3463 }
3464
2e0fef85 3465 spin_unlock_irq(&phba->hbalock);
dea3101e 3466 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 3467 "0410 Cannot find virtual addr for mapped buf on "
dea3101e 3468 "ring %d Data x%llx x%p x%p x%x\n",
e8b62011 3469 pring->ringno, (unsigned long long)phys,
dea3101e
JB		 3470 slp->next, slp->prev, pring->postbufq_cnt);
3471 return NULL;
3472}
3473
3474static void
2e0fef85
JS		 3475lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3476 struct lpfc_iocbq *rspiocb)
dea3101e 3477{
2e0fef85 3478 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 3479 uint16_t abort_iotag, abort_context;
92d7f7b0 3480 struct lpfc_iocbq *abort_iocb;
2680eeaa
JS		 3481 struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
3482
3483 abort_iocb = NULL;
2680eeaa
JS		 3484
3485 if (irsp->ulpStatus) {
3486 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
3487 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
3488
2e0fef85 3489 spin_lock_irq(&phba->hbalock);
2680eeaa
JS		 3490 if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
3491 abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
3492
92d7f7b0 3493 lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
e8b62011 3494 "0327 Cannot abort els iocb %p "
92d7f7b0
JS		 3495 "with tag %x context %x, abort status %x, "
3496 "abort code %x\n",
e8b62011
JS		 3497 abort_iocb, abort_iotag, abort_context,
3498 irsp->ulpStatus, irsp->un.ulpWord[4]);
2680eeaa
JS		 3499
3500 /*
3501 * make sure we have the right iocbq before taking it
3502 * off the txcmplq and try to call completion routine.
3503 */
2e0fef85
JS		 3504 if (!abort_iocb ||
3505 abort_iocb->iocb.ulpContext != abort_context ||
3506 (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
3507 spin_unlock_irq(&phba->hbalock);
3508 else {
92d7f7b0 3509 list_del_init(&abort_iocb->list);
2680eeaa 3510 pring->txcmplq_cnt--;
2e0fef85 3511 spin_unlock_irq(&phba->hbalock);
2680eeaa 3512
0ff10d46
JS		 3513 /* Firmware could still be in progress of DMAing
3514 * payload, so don't free data buffer till after
3515 * a hbeat.
3516 */
3517 abort_iocb->iocb_flag |= LPFC_DELAY_MEM_FREE;
3518
92d7f7b0
JS		 3519 abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3520 abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3521 abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
3522 (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
2680eeaa
JS		 3523 }
3524 }
3525
604a3e30 3526 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB		 3527 return;
3528}
3529
92d7f7b0
JS		 3530static void
3531lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3532 struct lpfc_iocbq *rspiocb)
3533{
3534 IOCB_t *irsp = &rspiocb->iocb;
3535
3536 /* ELS cmd tag <ulpIoTag> completes */
3537 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
e8b62011 3538 "0133 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 3539 "x%x x%x x%x\n",
e8b62011 3540 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 3541 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS		 3542 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
3543 lpfc_ct_free_iocb(phba, cmdiocb);
3544 else
3545 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS		 3546 return;
3547}
3548
dea3101e 3549int
2e0fef85
JS		 3550lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3551 struct lpfc_iocbq *cmdiocb)
dea3101e 3552{
2e0fef85 3553 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 3554 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB		 3555 IOCB_t *icmd = NULL;
3556 IOCB_t *iabt = NULL;
07951076
JS		 3557 int retval = IOCB_ERROR;
3558
92d7f7b0
JS		 3559 /*
3560 * There are certain command types we don't want to abort. And we
3561 * don't want to abort commands that are already in the process of
3562 * being aborted.
07951076
JS		 3563 */
3564 icmd = &cmdiocb->iocb;
2e0fef85 3565 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS		 3566 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
3567 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS		 3568 return 0;
3569
858c9f6c
JS		 3570 /* If we're unloading, don't abort iocb on the ELS ring, but change the
3571 * callback so that nothing happens when it finishes.
07951076 3572 */
858c9f6c
JS		 3573 if ((vport->load_flag & FC_UNLOADING) &&
3574 (pring->ringno == LPFC_ELS_RING)) {
92d7f7b0
JS		 3575 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
3576 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
3577 else
3578 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
07951076 3579 goto abort_iotag_exit;
92d7f7b0 3580 }
dea3101e
JB		 3581
3582 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 3583 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB		 3584 if (abtsiocbp == NULL)
3585 return 0;
dea3101e 3586
07951076
JS		 3587 /* This signals the response to set the correct status
3588 * before calling the completion handler.
3589 */
3590 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
3591
dea3101e 3592 iabt = &abtsiocbp->iocb;
07951076
JS		 3593 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
3594 iabt->un.acxri.abortContextTag = icmd->ulpContext;
3595 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
3596 iabt->ulpLe = 1;
3597 iabt->ulpClass = icmd->ulpClass;
dea3101e 3598
2e0fef85 3599 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS		 3600 iabt->ulpCommand = CMD_ABORT_XRI_CN;
3601 else
3602 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 3603
07951076 3604 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
5b8bd0c9 3605
e8b62011
JS		 3606 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
3607 "0339 Abort xri x%x, original iotag x%x, "
3608 "abort cmd iotag x%x\n",
3609 iabt->un.acxri.abortContextTag,
3610 iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
92d7f7b0 3611 retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
dea3101e 3612
07951076 3613abort_iotag_exit:
2e0fef85
JS		 3614 /*
3615 * Caller to this routine should check for IOCB_ERROR
3616 * and handle it properly. This routine no longer removes
3617 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 3618 */
2e0fef85 3619 return retval;
dea3101e
JB		 3620}
3621
3622static int
51ef4c26
JS		 3623lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
3624 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 3625 lpfc_ctx_cmd ctx_cmd)
dea3101e 3626{
0bd4ca25
JSEC		 3627 struct lpfc_scsi_buf *lpfc_cmd;
3628 struct scsi_cmnd *cmnd;
dea3101e
JB		 3629 int rc = 1;
3630
0bd4ca25
JSEC		 3631 if (!(iocbq->iocb_flag & LPFC_IO_FCP))
3632 return rc;
3633
51ef4c26
JS		 3634 if (iocbq->vport != vport)
3635 return rc;
3636
0bd4ca25
JSEC		 3637 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
3638 cmnd = lpfc_cmd->pCmd;
3639
3640 if (cmnd == NULL)
dea3101e
JB		 3641 return rc;
3642
3643 switch (ctx_cmd) {
3644 case LPFC_CTX_LUN:
0bd4ca25
JSEC		 3645 if ((cmnd->device->id == tgt_id) &&
3646 (cmnd->device->lun == lun_id))
dea3101e
JB		 3647 rc = 0;
3648 break;
3649 case LPFC_CTX_TGT:
0bd4ca25 3650 if (cmnd->device->id == tgt_id)
dea3101e
JB		 3651 rc = 0;
3652 break;
dea3101e
JB		 3653 case LPFC_CTX_HOST:
3654 rc = 0;
3655 break;
3656 default:
3657 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
3658 __FUNCTION__, ctx_cmd);
3659 break;
3660 }
3661
3662 return rc;
3663}
3664
3665int
51ef4c26
JS		 3666lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
3667 lpfc_ctx_cmd ctx_cmd)
dea3101e 3668{
51ef4c26 3669 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC		 3670 struct lpfc_iocbq *iocbq;
3671 int sum, i;
dea3101e 3672
0bd4ca25
JSEC		 3673 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
3674 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3675
51ef4c26
JS		 3676 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
3677 ctx_cmd) == 0)
0bd4ca25 3678 sum++;
dea3101e 3679 }
0bd4ca25 3680
dea3101e
JB		 3681 return sum;
3682}
3683
5eb95af0 3684void
2e0fef85
JS		 3685lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3686 struct lpfc_iocbq *rspiocb)
5eb95af0 3687{
604a3e30 3688 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC		 3689 return;
3690}
3691
dea3101e 3692int
51ef4c26
JS		 3693lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
3694 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 3695{
51ef4c26 3696 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC		 3697 struct lpfc_iocbq *iocbq;
3698 struct lpfc_iocbq *abtsiocb;
dea3101e 3699 IOCB_t *cmd = NULL;
dea3101e 3700 int errcnt = 0, ret_val = 0;
0bd4ca25 3701 int i;
dea3101e 3702
0bd4ca25
JSEC		 3703 for (i = 1; i <= phba->sli.last_iotag; i++) {
3704 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3705
51ef4c26 3706 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 3707 abort_cmd) != 0)
dea3101e
JB		 3708 continue;
3709
3710 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 3711 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB		 3712 if (abtsiocb == NULL) {
3713 errcnt++;
3714 continue;
3715 }
dea3101e 3716
0bd4ca25 3717 cmd = &iocbq->iocb;
dea3101e
JB		 3718 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
3719 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
3720 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
3721 abtsiocb->iocb.ulpLe = 1;
3722 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2e0fef85 3723 abtsiocb->vport = phba->pport;
dea3101e 3724
2e0fef85 3725 if (lpfc_is_link_up(phba))
dea3101e
JB		 3726 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
3727 else
3728 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
3729
5eb95af0
JSEC		 3730 /* Setup callback routine and issue the command. */
3731 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
dea3101e
JB		 3732 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
3733 if (ret_val == IOCB_ERROR) {
604a3e30 3734 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB		 3735 errcnt++;
3736 continue;
3737 }
3738 }
3739
3740 return errcnt;
3741}
3742
68876920
JSEC		 3743static void
3744lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
3745 struct lpfc_iocbq *cmdiocbq,
3746 struct lpfc_iocbq *rspiocbq)
dea3101e 3747{
68876920
JSEC		 3748 wait_queue_head_t *pdone_q;
3749 unsigned long iflags;
dea3101e 3750
2e0fef85 3751 spin_lock_irqsave(&phba->hbalock, iflags);
68876920
JSEC		 3752 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
3753 if (cmdiocbq->context2 && rspiocbq)
3754 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
3755 &rspiocbq->iocb, sizeof(IOCB_t));
3756
3757 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC		 3758 if (pdone_q)
3759 wake_up(pdone_q);
858c9f6c 3760 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB		 3761 return;
3762}
3763
68876920
JSEC		 3764/*
3765 * Issue the caller's iocb and wait for its completion, but no longer than the
3766 * caller's timeout. Note that iocb_flags is cleared before the
3767 * lpfc_sli_issue_call since the wake routine sets a unique value and by
3768 * definition this is a wait function.
3769 */
92d7f7b0 3770
dea3101e 3771int
2e0fef85
JS		 3772lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
3773 struct lpfc_sli_ring *pring,
3774 struct lpfc_iocbq *piocb,
3775 struct lpfc_iocbq *prspiocbq,
68876920 3776 uint32_t timeout)
dea3101e 3777{
7259f0d0 3778 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC		 3779 long timeleft, timeout_req = 0;
3780 int retval = IOCB_SUCCESS;
875fbdfe 3781 uint32_t creg_val;
dea3101e
JB		 3782
3783 /*
68876920
JSEC		 3784 * If the caller has provided a response iocbq buffer, then context2
3785 * is NULL or its an error.
dea3101e 3786 */
68876920
JSEC		 3787 if (prspiocbq) {
3788 if (piocb->context2)
3789 return IOCB_ERROR;
3790 piocb->context2 = prspiocbq;
dea3101e
JB		 3791 }
3792
68876920
JSEC		 3793 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
3794 piocb->context_un.wait_queue = &done_q;
3795 piocb->iocb_flag &= ~LPFC_IO_WAKE;
dea3101e 3796
875fbdfe
JSEC		 3797 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3798 creg_val = readl(phba->HCregaddr);
3799 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
3800 writel(creg_val, phba->HCregaddr);
3801 readl(phba->HCregaddr); /* flush */
3802 }
3803
68876920
JSEC		 3804 retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
3805 if (retval == IOCB_SUCCESS) {
3806 timeout_req = timeout * HZ;
68876920
JSEC		 3807 timeleft = wait_event_timeout(done_q,
3808 piocb->iocb_flag & LPFC_IO_WAKE,
3809 timeout_req);
dea3101e 3810
7054a606
JS		 3811 if (piocb->iocb_flag & LPFC_IO_WAKE) {
3812 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3813 "0331 IOCB wake signaled\n");
7054a606 3814 } else if (timeleft == 0) {
68876920 3815 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3816 "0338 IOCB wait timeout error - no "
3817 "wake response Data x%x\n", timeout);
68876920 3818 retval = IOCB_TIMEDOUT;
7054a606 3819 } else {
68876920 3820 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3821 "0330 IOCB wake NOT set, "
3822 "Data x%x x%lx\n",
68876920
JSEC		 3823 timeout, (timeleft / jiffies));
3824 retval = IOCB_TIMEDOUT;
dea3101e 3825 }
68876920
JSEC		 3826 } else {
3827 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 3828 ":0332 IOCB wait issue failed, Data x%x\n",
3829 retval);
68876920 3830 retval = IOCB_ERROR;
dea3101e
JB		 3831 }
3832
875fbdfe
JSEC		 3833 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3834 creg_val = readl(phba->HCregaddr);
3835 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
3836 writel(creg_val, phba->HCregaddr);
3837 readl(phba->HCregaddr); /* flush */
3838 }
3839
68876920
JSEC		 3840 if (prspiocbq)
3841 piocb->context2 = NULL;
3842
3843 piocb->context_un.wait_queue = NULL;
3844 piocb->iocb_cmpl = NULL;
dea3101e
JB		 3845 return retval;
3846}
68876920 3847
dea3101e 3848int
2e0fef85 3849lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB		 3850 uint32_t timeout)
3851{
7259f0d0 3852 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
dea3101e 3853 int retval;
858c9f6c 3854 unsigned long flag;
dea3101e
JB		 3855
3856 /* The caller must leave context1 empty. */
98c9ea5c 3857 if (pmboxq->context1)
2e0fef85 3858 return MBX_NOT_FINISHED;
dea3101e
JB		 3859
3860 /* setup wake call as IOCB callback */
3861 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
3862 /* setup context field to pass wait_queue pointer to wake function */
3863 pmboxq->context1 = &done_q;
3864
dea3101e
JB		 3865 /* now issue the command */
3866 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
3867
3868 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
7054a606
JS		 3869 wait_event_interruptible_timeout(done_q,
3870 pmboxq->mbox_flag & LPFC_MBX_WAKE,
3871 timeout * HZ);
3872
858c9f6c 3873 spin_lock_irqsave(&phba->hbalock, flag);
dea3101e 3874 pmboxq->context1 = NULL;
7054a606
JS		 3875 /*
3876 * if LPFC_MBX_WAKE flag is set the mailbox is completed
3877 * else do not free the resources.
3878 */
3879 if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
dea3101e 3880 retval = MBX_SUCCESS;
858c9f6c 3881 else {
7054a606 3882 retval = MBX_TIMEOUT;
858c9f6c
JS		 3883 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3884 }
3885 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e
JB		 3886 }
3887
dea3101e
JB		 3888 return retval;
3889}
3890
b4c02652
JS		 3891int
3892lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
3893{
2e0fef85 3894 struct lpfc_vport *vport = phba->pport;
b4c02652 3895 int i = 0;
ed957684 3896 uint32_t ha_copy;
b4c02652 3897
2e0fef85 3898 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
b4c02652
JS		 3899 if (i++ > LPFC_MBOX_TMO * 1000)
3900 return 1;
3901
ed957684
JS		 3902 /*
3903 * Call lpfc_sli_handle_mb_event only if a mailbox cmd
3904 * did finish. This way we won't get the misleading
3905 * "Stray Mailbox Interrupt" message.
3906 */
3907 spin_lock_irq(&phba->hbalock);
3908 ha_copy = phba->work_ha;
3909 phba->work_ha &= ~HA_MBATT;
3910 spin_unlock_irq(&phba->hbalock);
3911
3912 if (ha_copy & HA_MBATT)
3913 if (lpfc_sli_handle_mb_event(phba) == 0)
3914 i = 0;
b4c02652
JS		 3915
3916 msleep(1);
3917 }
3918
3919 return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
3920}
3921
dea3101e 3922irqreturn_t
7d12e780 3923lpfc_intr_handler(int irq, void *dev_id)
dea3101e 3924{
2e0fef85 3925 struct lpfc_hba *phba;
dea3101e
JB		 3926 uint32_t ha_copy;
3927 uint32_t work_ha_copy;
3928 unsigned long status;
dea3101e
JB		 3929 uint32_t control;
3930
92d7f7b0 3931 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS		 3932 struct lpfc_vport *vport;
3933 struct lpfc_nodelist *ndlp;
3934 struct lpfc_dmabuf *mp;
92d7f7b0
JS		 3935 LPFC_MBOXQ_t *pmb;
3936 int rc;
3937
dea3101e
JB		 3938 /*
3939 * Get the driver's phba structure from the dev_id and
3940 * assume the HBA is not interrupting.
3941 */
3942 phba = (struct lpfc_hba *) dev_id;
3943
3944 if (unlikely(!phba))
3945 return IRQ_NONE;
3946
8d63f375
LV		 3947 /* If the pci channel is offline, ignore all the interrupts. */
3948 if (unlikely(pci_channel_offline(phba->pcidev)))
3949 return IRQ_NONE;
3950
dea3101e
JB		 3951 phba->sli.slistat.sli_intr++;
3952
3953 /*
3954 * Call the HBA to see if it is interrupting. If not, don't claim
3955 * the interrupt
3956 */
3957
3958 /* Ignore all interrupts during initialization. */
2e0fef85 3959 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB		 3960 return IRQ_NONE;
3961
3962 /*
3963 * Read host attention register to determine interrupt source
3964 * Clear Attention Sources, except Error Attention (to
3965 * preserve status) and Link Attention
3966 */
2e0fef85 3967 spin_lock(&phba->hbalock);
dea3101e 3968 ha_copy = readl(phba->HAregaddr);
ebdbe65f
JS		 3969 /* If somebody is waiting to handle an eratt don't process it
3970 * here. The brdkill function will do this.
3971 */
2e0fef85 3972 if (phba->link_flag & LS_IGNORE_ERATT)
ebdbe65f 3973 ha_copy &= ~HA_ERATT;
dea3101e
JB		 3974 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
3975 readl(phba->HAregaddr); /* flush */
2e0fef85 3976 spin_unlock(&phba->hbalock);
dea3101e
JB		 3977
3978 if (unlikely(!ha_copy))
3979 return IRQ_NONE;
3980
3981 work_ha_copy = ha_copy & phba->work_ha_mask;
3982
3983 if (unlikely(work_ha_copy)) {
3984 if (work_ha_copy & HA_LATT) {
3985 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
3986 /*
3987 * Turn off Link Attention interrupts
3988 * until CLEAR_LA done
3989 */
2e0fef85 3990 spin_lock(&phba->hbalock);
dea3101e
JB		 3991 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
3992 control = readl(phba->HCregaddr);
3993 control &= ~HC_LAINT_ENA;
3994 writel(control, phba->HCregaddr);
3995 readl(phba->HCregaddr); /* flush */
2e0fef85 3996 spin_unlock(&phba->hbalock);
dea3101e
JB		 3997 }
3998 else
3999 work_ha_copy &= ~HA_LATT;
4000 }
4001
4002 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
858c9f6c
JS		 4003 /*
4004 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
4005 * the only slow ring.
4006 */
4007 status = (work_ha_copy &
4008 (HA_RXMASK << (4*LPFC_ELS_RING)));
4009 status >>= (4*LPFC_ELS_RING);
4010 if (status & HA_RXMASK) {
4011 spin_lock(&phba->hbalock);
4012 control = readl(phba->HCregaddr);
a58cbd52
JS		 4013
4014 lpfc_debugfs_slow_ring_trc(phba,
4015 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
4016 control, status,
4017 (uint32_t)phba->sli.slistat.sli_intr);
4018
858c9f6c 4019 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS		 4020 lpfc_debugfs_slow_ring_trc(phba,
4021 "ISR Disable ring:"
4022 "pwork:x%x hawork:x%x wait:x%x",
4023 phba->work_ha, work_ha_copy,
4024 (uint32_t)((unsigned long)
4025 phba->work_wait));
4026
858c9f6c
JS		 4027 control &=
4028 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB		 4029 writel(control, phba->HCregaddr);
4030 readl(phba->HCregaddr); /* flush */
dea3101e 4031 }
a58cbd52
JS		 4032 else {
4033 lpfc_debugfs_slow_ring_trc(phba,
4034 "ISR slow ring: pwork:"
4035 "x%x hawork:x%x wait:x%x",
4036 phba->work_ha, work_ha_copy,
4037 (uint32_t)((unsigned long)
4038 phba->work_wait));
4039 }
858c9f6c 4040 spin_unlock(&phba->hbalock);
dea3101e
JB		 4041 }
4042 }
4043
4044 if (work_ha_copy & HA_ERATT) {
2e0fef85 4045 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 4046 /*
4047 * There was a link/board error. Read the
4048 * status register to retrieve the error event
4049 * and process it.
4050 */
4051 phba->sli.slistat.err_attn_event++;
4052 /* Save status info */
4053 phba->work_hs = readl(phba->HSregaddr);
4054 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
4055 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
4056
4057 /* Clear Chip error bit */
4058 writel(HA_ERATT, phba->HAregaddr);
4059 readl(phba->HAregaddr); /* flush */
2e0fef85 4060 phba->pport->stopped = 1;
dea3101e
JB		 4061 }
4062
92d7f7b0
JS		 4063 if ((work_ha_copy & HA_MBATT) &&
4064 (phba->sli.mbox_active)) {
4065 pmb = phba->sli.mbox_active;
4066 pmbox = &pmb->mb;
4067 mbox = &phba->slim2p->mbx;
858c9f6c 4068 vport = pmb->vport;
92d7f7b0
JS		 4069
4070 /* First check out the status word */
4071 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
4072 if (pmbox->mbxOwner != OWN_HOST) {
4073 /*
4074 * Stray Mailbox Interrupt, mbxCommand <cmd>
4075 * mbxStatus <status>
4076 */
4077 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX |
4078 LOG_SLI,
e8b62011 4079 "(%d):0304 Stray Mailbox "
92d7f7b0
JS		 4080 "Interrupt mbxCommand x%x "
4081 "mbxStatus x%x\n",
e8b62011 4082 (vport ? vport->vpi : 0),
92d7f7b0
JS		 4083 pmbox->mbxCommand,
4084 pmbox->mbxStatus);
4085 }
858c9f6c 4086 phba->last_completion_time = jiffies;
92d7f7b0
JS		 4087 del_timer_sync(&phba->sli.mbox_tmo);
4088
92d7f7b0
JS		 4089 phba->sli.mbox_active = NULL;
4090 if (pmb->mbox_cmpl) {
4091 lpfc_sli_pcimem_bcopy(mbox, pmbox,
4092 MAILBOX_CMD_SIZE);
4093 }
858c9f6c
JS		 4094 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
4095 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
4096
4097 lpfc_debugfs_disc_trc(vport,
4098 LPFC_DISC_TRC_MBOX_VPORT,
4099 "MBOX dflt rpi: : status:x%x rpi:x%x",
4100 (uint32_t)pmbox->mbxStatus,
4101 pmbox->un.varWords[0], 0);
4102
4103 if ( !pmbox->mbxStatus) {
4104 mp = (struct lpfc_dmabuf *)
4105 (pmb->context1);
4106 ndlp = (struct lpfc_nodelist *)
4107 pmb->context2;
4108
4109 /* Reg_LOGIN of dflt RPI was successful.
4110 * new lets get rid of the RPI using the
4111 * same mbox buffer.
4112 */
4113 lpfc_unreg_login(phba, vport->vpi,
4114 pmbox->un.varWords[0], pmb);
4115 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
4116 pmb->context1 = mp;
4117 pmb->context2 = ndlp;
4118 pmb->vport = vport;
4119 spin_lock(&phba->hbalock);
4120 phba->sli.sli_flag &=
4121 ~LPFC_SLI_MBOX_ACTIVE;
4122 spin_unlock(&phba->hbalock);
4123 goto send_current_mbox;
4124 }
4125 }
4126 spin_lock(&phba->pport->work_port_lock);
4127 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
4128 spin_unlock(&phba->pport->work_port_lock);
92d7f7b0
JS		 4129 lpfc_mbox_cmpl_put(phba, pmb);
4130 }
4131 if ((work_ha_copy & HA_MBATT) &&
4132 (phba->sli.mbox_active == NULL)) {
4133send_next_mbox:
4134 spin_lock(&phba->hbalock);
4135 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
4136 pmb = lpfc_mbox_get(phba);
4137 spin_unlock(&phba->hbalock);
858c9f6c 4138send_current_mbox:
92d7f7b0
JS		 4139 /* Process next mailbox command if there is one */
4140 if (pmb != NULL) {
4141 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4142 if (rc == MBX_NOT_FINISHED) {
4143 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
4144 lpfc_mbox_cmpl_put(phba, pmb);
4145 goto send_next_mbox;
4146 }
92d7f7b0
JS		 4147 }
4148
4149 }
4150
2e0fef85 4151 spin_lock(&phba->hbalock);
dea3101e
JB		 4152 phba->work_ha |= work_ha_copy;
4153 if (phba->work_wait)
92d7f7b0 4154 lpfc_worker_wake_up(phba);
2e0fef85 4155 spin_unlock(&phba->hbalock);
dea3101e
JB		 4156 }
4157
4158 ha_copy &= ~(phba->work_ha_mask);
4159
4160 /*
4161 * Process all events on FCP ring. Take the optimized path for
4162 * FCP IO. Any other IO is slow path and is handled by
4163 * the worker thread.
4164 */
4165 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
4166 status >>= (4*LPFC_FCP_RING);
858c9f6c 4167 if (status & HA_RXMASK)
dea3101e
JB		 4168 lpfc_sli_handle_fast_ring_event(phba,
4169 &phba->sli.ring[LPFC_FCP_RING],
4170 status);
a4bc3379
JS		 4171
4172 if (phba->cfg_multi_ring_support == 2) {
4173 /*
4174 * Process all events on extra ring. Take the optimized path
4175 * for extra ring IO. Any other IO is slow path and is handled
4176 * by the worker thread.
4177 */
4178 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
4179 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 4180 if (status & HA_RXMASK) {
a4bc3379
JS		 4181 lpfc_sli_handle_fast_ring_event(phba,
4182 &phba->sli.ring[LPFC_EXTRA_RING],
4183 status);
4184 }
4185 }
dea3101e
JB		 4186 return IRQ_HANDLED;
4187
4188} /* lpfc_intr_handler */
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