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1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
128bddac 4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
3e21d1cb 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
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10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
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12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
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22 *******************************************************************/
23
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24#include <linux/blkdev.h>
25#include <linux/pci.h>
26#include <linux/interrupt.h>
27#include <linux/delay.h>
5a0e3ad6 28#include <linux/slab.h>
1c2ba475 29#include <linux/lockdep.h>
dea3101e 30
91886523 31#include <scsi/scsi.h>
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32#include <scsi/scsi_cmnd.h>
33#include <scsi/scsi_device.h>
34#include <scsi/scsi_host.h>
f888ba3c 35#include <scsi/scsi_transport_fc.h>
da0436e9 36#include <scsi/fc/fc_fs.h>
0d878419 37#include <linux/aer.h>
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38#ifdef CONFIG_X86
39#include <asm/set_memory.h>
40#endif
dea3101e 41
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42#include <linux/nvme-fc-driver.h>
43
da0436e9 44#include "lpfc_hw4.h"
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45#include "lpfc_hw.h"
46#include "lpfc_sli.h"
da0436e9 47#include "lpfc_sli4.h"
ea2151b4 48#include "lpfc_nl.h"
dea3101e 49#include "lpfc_disc.h"
dea3101e 50#include "lpfc.h"
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51#include "lpfc_scsi.h"
52#include "lpfc_nvme.h"
f358dd0c 53#include "lpfc_nvmet.h"
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54#include "lpfc_crtn.h"
55#include "lpfc_logmsg.h"
56#include "lpfc_compat.h"
858c9f6c 57#include "lpfc_debugfs.h"
04c68496 58#include "lpfc_vport.h"
61bda8f7 59#include "lpfc_version.h"
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60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
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69
70/* Provide function prototypes local to this module. */
71static int lpfc_sli_issue_mbox_s4(struct lpfc_hba *, LPFC_MBOXQ_t *,
72 uint32_t);
73static int lpfc_sli4_read_rev(struct lpfc_hba *, LPFC_MBOXQ_t *,
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74 uint8_t *, uint32_t *);
75static struct lpfc_iocbq *lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *,
76 struct lpfc_iocbq *);
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77static void lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *,
78 struct hbq_dmabuf *);
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79static void lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
80 struct hbq_dmabuf *dmabuf);
895427bd 81static int lpfc_sli4_fp_handle_cqe(struct lpfc_hba *, struct lpfc_queue *,
0558056c 82 struct lpfc_cqe *);
895427bd 83static int lpfc_sli4_post_sgl_list(struct lpfc_hba *, struct list_head *,
8a9d2e80 84 int);
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85static void lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba,
86 struct lpfc_eqe *eqe, uint32_t qidx);
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87static bool lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba);
88static bool lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba);
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89static int lpfc_sli4_abort_nvme_io(struct lpfc_hba *phba,
90 struct lpfc_sli_ring *pring,
91 struct lpfc_iocbq *cmdiocb);
0558056c 92
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93static IOCB_t *
94lpfc_get_iocb_from_iocbq(struct lpfc_iocbq *iocbq)
95{
96 return &iocbq->iocb;
97}
98
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99#if defined(CONFIG_64BIT) && defined(__LITTLE_ENDIAN)
100/**
101 * lpfc_sli4_pcimem_bcopy - SLI4 memory copy function
102 * @srcp: Source memory pointer.
103 * @destp: Destination memory pointer.
104 * @cnt: Number of words required to be copied.
105 * Must be a multiple of sizeof(uint64_t)
106 *
107 * This function is used for copying data between driver memory
108 * and the SLI WQ. This function also changes the endianness
109 * of each word if native endianness is different from SLI
110 * endianness. This function can be called with or without
111 * lock.
112 **/
113void
114lpfc_sli4_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
115{
116 uint64_t *src = srcp;
117 uint64_t *dest = destp;
118 int i;
119
120 for (i = 0; i < (int)cnt; i += sizeof(uint64_t))
121 *dest++ = *src++;
122}
123#else
124#define lpfc_sli4_pcimem_bcopy(a, b, c) lpfc_sli_pcimem_bcopy(a, b, c)
125#endif
126
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127/**
128 * lpfc_sli4_wq_put - Put a Work Queue Entry on an Work Queue
129 * @q: The Work Queue to operate on.
130 * @wqe: The work Queue Entry to put on the Work queue.
131 *
132 * This routine will copy the contents of @wqe to the next available entry on
133 * the @q. This function will then ring the Work Queue Doorbell to signal the
134 * HBA to start processing the Work Queue Entry. This function returns 0 if
135 * successful. If no entries are available on @q then this function will return
136 * -ENOMEM.
137 * The caller is expected to hold the hbalock when calling this routine.
138 **/
cd22d605 139static int
205e8240 140lpfc_sli4_wq_put(struct lpfc_queue *q, union lpfc_wqe128 *wqe)
4f774513 141{
2e90f4b5 142 union lpfc_wqe *temp_wqe;
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143 struct lpfc_register doorbell;
144 uint32_t host_index;
027140ea 145 uint32_t idx;
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146 uint32_t i = 0;
147 uint8_t *tmp;
5cc167dd 148 u32 if_type;
4f774513 149
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150 /* sanity check on queue memory */
151 if (unlikely(!q))
152 return -ENOMEM;
153 temp_wqe = q->qe[q->host_index].wqe;
154
4f774513 155 /* If the host has not yet processed the next entry then we are done */
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156 idx = ((q->host_index + 1) % q->entry_count);
157 if (idx == q->hba_index) {
b84daac9 158 q->WQ_overflow++;
cd22d605 159 return -EBUSY;
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160 }
161 q->WQ_posted++;
4f774513 162 /* set consumption flag every once in a while */
ff78d8f9 163 if (!((q->host_index + 1) % q->entry_repost))
f0d9bccc 164 bf_set(wqe_wqec, &wqe->generic.wqe_com, 1);
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165 else
166 bf_set(wqe_wqec, &wqe->generic.wqe_com, 0);
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167 if (q->phba->sli3_options & LPFC_SLI4_PHWQ_ENABLED)
168 bf_set(wqe_wqid, &wqe->generic.wqe_com, q->queue_id);
48f8fdb4 169 lpfc_sli4_pcimem_bcopy(wqe, temp_wqe, q->entry_size);
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170 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
171 /* write to DPP aperture taking advatage of Combined Writes */
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172 tmp = (uint8_t *)temp_wqe;
173#ifdef __raw_writeq
1351e69f 174 for (i = 0; i < q->entry_size; i += sizeof(uint64_t))
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175 __raw_writeq(*((uint64_t *)(tmp + i)),
176 q->dpp_regaddr + i);
177#else
178 for (i = 0; i < q->entry_size; i += sizeof(uint32_t))
179 __raw_writel(*((uint32_t *)(tmp + i)),
180 q->dpp_regaddr + i);
181#endif
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182 }
183 /* ensure WQE bcopy and DPP flushed before doorbell write */
6b3b3bdb 184 wmb();
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185
186 /* Update the host index before invoking device */
187 host_index = q->host_index;
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188
189 q->host_index = idx;
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190
191 /* Ring Doorbell */
192 doorbell.word0 = 0;
962bc51b 193 if (q->db_format == LPFC_DB_LIST_FORMAT) {
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194 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
195 bf_set(lpfc_if6_wq_db_list_fm_num_posted, &doorbell, 1);
196 bf_set(lpfc_if6_wq_db_list_fm_dpp, &doorbell, 1);
197 bf_set(lpfc_if6_wq_db_list_fm_dpp_id, &doorbell,
198 q->dpp_id);
199 bf_set(lpfc_if6_wq_db_list_fm_id, &doorbell,
200 q->queue_id);
201 } else {
202 bf_set(lpfc_wq_db_list_fm_num_posted, &doorbell, 1);
1351e69f 203 bf_set(lpfc_wq_db_list_fm_id, &doorbell, q->queue_id);
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204
205 /* Leave bits <23:16> clear for if_type 6 dpp */
206 if_type = bf_get(lpfc_sli_intf_if_type,
207 &q->phba->sli4_hba.sli_intf);
208 if (if_type != LPFC_SLI_INTF_IF_TYPE_6)
209 bf_set(lpfc_wq_db_list_fm_index, &doorbell,
210 host_index);
1351e69f 211 }
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212 } else if (q->db_format == LPFC_DB_RING_FORMAT) {
213 bf_set(lpfc_wq_db_ring_fm_num_posted, &doorbell, 1);
214 bf_set(lpfc_wq_db_ring_fm_id, &doorbell, q->queue_id);
215 } else {
216 return -EINVAL;
217 }
218 writel(doorbell.word0, q->db_regaddr);
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219
220 return 0;
221}
222
223/**
224 * lpfc_sli4_wq_release - Updates internal hba index for WQ
225 * @q: The Work Queue to operate on.
226 * @index: The index to advance the hba index to.
227 *
228 * This routine will update the HBA index of a queue to reflect consumption of
229 * Work Queue Entries by the HBA. When the HBA indicates that it has consumed
230 * an entry the host calls this function to update the queue's internal
231 * pointers. This routine returns the number of entries that were consumed by
232 * the HBA.
233 **/
234static uint32_t
235lpfc_sli4_wq_release(struct lpfc_queue *q, uint32_t index)
236{
237 uint32_t released = 0;
238
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239 /* sanity check on queue memory */
240 if (unlikely(!q))
241 return 0;
242
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243 if (q->hba_index == index)
244 return 0;
245 do {
246 q->hba_index = ((q->hba_index + 1) % q->entry_count);
247 released++;
248 } while (q->hba_index != index);
249 return released;
250}
251
252/**
253 * lpfc_sli4_mq_put - Put a Mailbox Queue Entry on an Mailbox Queue
254 * @q: The Mailbox Queue to operate on.
255 * @wqe: The Mailbox Queue Entry to put on the Work queue.
256 *
257 * This routine will copy the contents of @mqe to the next available entry on
258 * the @q. This function will then ring the Work Queue Doorbell to signal the
259 * HBA to start processing the Work Queue Entry. This function returns 0 if
260 * successful. If no entries are available on @q then this function will return
261 * -ENOMEM.
262 * The caller is expected to hold the hbalock when calling this routine.
263 **/
264static uint32_t
265lpfc_sli4_mq_put(struct lpfc_queue *q, struct lpfc_mqe *mqe)
266{
2e90f4b5 267 struct lpfc_mqe *temp_mqe;
4f774513 268 struct lpfc_register doorbell;
4f774513 269
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270 /* sanity check on queue memory */
271 if (unlikely(!q))
272 return -ENOMEM;
273 temp_mqe = q->qe[q->host_index].mqe;
274
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275 /* If the host has not yet processed the next entry then we are done */
276 if (((q->host_index + 1) % q->entry_count) == q->hba_index)
277 return -ENOMEM;
48f8fdb4 278 lpfc_sli4_pcimem_bcopy(mqe, temp_mqe, q->entry_size);
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279 /* Save off the mailbox pointer for completion */
280 q->phba->mbox = (MAILBOX_t *)temp_mqe;
281
282 /* Update the host index before invoking device */
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283 q->host_index = ((q->host_index + 1) % q->entry_count);
284
285 /* Ring Doorbell */
286 doorbell.word0 = 0;
287 bf_set(lpfc_mq_doorbell_num_posted, &doorbell, 1);
288 bf_set(lpfc_mq_doorbell_id, &doorbell, q->queue_id);
289 writel(doorbell.word0, q->phba->sli4_hba.MQDBregaddr);
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290 return 0;
291}
292
293/**
294 * lpfc_sli4_mq_release - Updates internal hba index for MQ
295 * @q: The Mailbox Queue to operate on.
296 *
297 * This routine will update the HBA index of a queue to reflect consumption of
298 * a Mailbox Queue Entry by the HBA. When the HBA indicates that it has consumed
299 * an entry the host calls this function to update the queue's internal
300 * pointers. This routine returns the number of entries that were consumed by
301 * the HBA.
302 **/
303static uint32_t
304lpfc_sli4_mq_release(struct lpfc_queue *q)
305{
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306 /* sanity check on queue memory */
307 if (unlikely(!q))
308 return 0;
309
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310 /* Clear the mailbox pointer for completion */
311 q->phba->mbox = NULL;
312 q->hba_index = ((q->hba_index + 1) % q->entry_count);
313 return 1;
314}
315
316/**
317 * lpfc_sli4_eq_get - Gets the next valid EQE from a EQ
318 * @q: The Event Queue to get the first valid EQE from
319 *
320 * This routine will get the first valid Event Queue Entry from @q, update
321 * the queue's internal hba index, and return the EQE. If no valid EQEs are in
322 * the Queue (no more work to do), or the Queue is full of EQEs that have been
323 * processed, but not popped back to the HBA then this routine will return NULL.
324 **/
325static struct lpfc_eqe *
326lpfc_sli4_eq_get(struct lpfc_queue *q)
327{
7365f6fd 328 struct lpfc_hba *phba;
2e90f4b5 329 struct lpfc_eqe *eqe;
027140ea 330 uint32_t idx;
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331
332 /* sanity check on queue memory */
333 if (unlikely(!q))
334 return NULL;
7365f6fd 335 phba = q->phba;
2e90f4b5 336 eqe = q->qe[q->hba_index].eqe;
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337
338 /* If the next EQE is not valid then we are done */
7365f6fd 339 if (bf_get_le32(lpfc_eqe_valid, eqe) != q->qe_valid)
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340 return NULL;
341 /* If the host has not yet processed the next entry then we are done */
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342 idx = ((q->hba_index + 1) % q->entry_count);
343 if (idx == q->host_index)
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344 return NULL;
345
027140ea 346 q->hba_index = idx;
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347 /* if the index wrapped around, toggle the valid bit */
348 if (phba->sli4_hba.pc_sli4_params.eqav && !q->hba_index)
349 q->qe_valid = (q->qe_valid) ? 0 : 1;
350
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351
352 /*
353 * insert barrier for instruction interlock : data from the hardware
354 * must have the valid bit checked before it can be copied and acted
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355 * upon. Speculative instructions were allowing a bcopy at the start
356 * of lpfc_sli4_fp_handle_wcqe(), which is called immediately
357 * after our return, to copy data before the valid bit check above
358 * was done. As such, some of the copied data was stale. The barrier
359 * ensures the check is before any data is copied.
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360 */
361 mb();
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362 return eqe;
363}
364
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365/**
366 * lpfc_sli4_eq_clr_intr - Turn off interrupts from this EQ
367 * @q: The Event Queue to disable interrupts
368 *
369 **/
b71413dd 370inline void
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371lpfc_sli4_eq_clr_intr(struct lpfc_queue *q)
372{
373 struct lpfc_register doorbell;
374
375 doorbell.word0 = 0;
376 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
377 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
378 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
379 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
380 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 381 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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382}
383
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384/**
385 * lpfc_sli4_if6_eq_clr_intr - Turn off interrupts from this EQ
386 * @q: The Event Queue to disable interrupts
387 *
388 **/
389inline void
390lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q)
391{
392 struct lpfc_register doorbell;
393
394 doorbell.word0 = 0;
aad59d5d 395 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
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396 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
397}
398
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399/**
400 * lpfc_sli4_eq_release - Indicates the host has finished processing an EQ
401 * @q: The Event Queue that the host has completed processing for.
402 * @arm: Indicates whether the host wants to arms this CQ.
403 *
404 * This routine will mark all Event Queue Entries on @q, from the last
405 * known completed entry to the last entry that was processed, as completed
406 * by clearing the valid bit for each completion queue entry. Then it will
407 * notify the HBA, by ringing the doorbell, that the EQEs have been processed.
408 * The internal host index in the @q will be updated by this routine to indicate
409 * that the host has finished processing the entries. The @arm parameter
410 * indicates that the queue should be rearmed when ringing the doorbell.
411 *
412 * This function will return the number of EQEs that were popped.
413 **/
414uint32_t
415lpfc_sli4_eq_release(struct lpfc_queue *q, bool arm)
416{
417 uint32_t released = 0;
7365f6fd 418 struct lpfc_hba *phba;
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419 struct lpfc_eqe *temp_eqe;
420 struct lpfc_register doorbell;
421
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422 /* sanity check on queue memory */
423 if (unlikely(!q))
424 return 0;
7365f6fd 425 phba = q->phba;
2e90f4b5 426
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427 /* while there are valid entries */
428 while (q->hba_index != q->host_index) {
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429 if (!phba->sli4_hba.pc_sli4_params.eqav) {
430 temp_eqe = q->qe[q->host_index].eqe;
431 bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
432 }
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433 released++;
434 q->host_index = ((q->host_index + 1) % q->entry_count);
435 }
436 if (unlikely(released == 0 && !arm))
437 return 0;
438
439 /* ring doorbell for number popped */
440 doorbell.word0 = 0;
441 if (arm) {
442 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
443 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
444 }
445 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, released);
446 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
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447 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
448 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
449 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 450 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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451 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
452 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
9dd35425 453 readl(q->phba->sli4_hba.EQDBregaddr);
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454 return released;
455}
456
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457/**
458 * lpfc_sli4_if6_eq_release - Indicates the host has finished processing an EQ
459 * @q: The Event Queue that the host has completed processing for.
460 * @arm: Indicates whether the host wants to arms this CQ.
461 *
462 * This routine will mark all Event Queue Entries on @q, from the last
463 * known completed entry to the last entry that was processed, as completed
464 * by clearing the valid bit for each completion queue entry. Then it will
465 * notify the HBA, by ringing the doorbell, that the EQEs have been processed.
466 * The internal host index in the @q will be updated by this routine to indicate
467 * that the host has finished processing the entries. The @arm parameter
468 * indicates that the queue should be rearmed when ringing the doorbell.
469 *
470 * This function will return the number of EQEs that were popped.
471 **/
472uint32_t
473lpfc_sli4_if6_eq_release(struct lpfc_queue *q, bool arm)
474{
475 uint32_t released = 0;
7365f6fd 476 struct lpfc_hba *phba;
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477 struct lpfc_eqe *temp_eqe;
478 struct lpfc_register doorbell;
479
480 /* sanity check on queue memory */
481 if (unlikely(!q))
482 return 0;
7365f6fd 483 phba = q->phba;
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484
485 /* while there are valid entries */
486 while (q->hba_index != q->host_index) {
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487 if (!phba->sli4_hba.pc_sli4_params.eqav) {
488 temp_eqe = q->qe[q->host_index].eqe;
489 bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
490 }
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491 released++;
492 q->host_index = ((q->host_index + 1) % q->entry_count);
493 }
494 if (unlikely(released == 0 && !arm))
495 return 0;
496
497 /* ring doorbell for number popped */
498 doorbell.word0 = 0;
499 if (arm)
500 bf_set(lpfc_if6_eq_doorbell_arm, &doorbell, 1);
501 bf_set(lpfc_if6_eq_doorbell_num_released, &doorbell, released);
502 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
503 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
504 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
505 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
506 readl(q->phba->sli4_hba.EQDBregaddr);
507 return released;
508}
509
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510/**
511 * lpfc_sli4_cq_get - Gets the next valid CQE from a CQ
512 * @q: The Completion Queue to get the first valid CQE from
513 *
514 * This routine will get the first valid Completion Queue Entry from @q, update
515 * the queue's internal hba index, and return the CQE. If no valid CQEs are in
516 * the Queue (no more work to do), or the Queue is full of CQEs that have been
517 * processed, but not popped back to the HBA then this routine will return NULL.
518 **/
519static struct lpfc_cqe *
520lpfc_sli4_cq_get(struct lpfc_queue *q)
521{
7365f6fd 522 struct lpfc_hba *phba;
4f774513 523 struct lpfc_cqe *cqe;
027140ea 524 uint32_t idx;
4f774513 525
2e90f4b5
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526 /* sanity check on queue memory */
527 if (unlikely(!q))
528 return NULL;
7365f6fd
JS
529 phba = q->phba;
530 cqe = q->qe[q->hba_index].cqe;
2e90f4b5 531
4f774513 532 /* If the next CQE is not valid then we are done */
7365f6fd 533 if (bf_get_le32(lpfc_cqe_valid, cqe) != q->qe_valid)
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534 return NULL;
535 /* If the host has not yet processed the next entry then we are done */
027140ea
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536 idx = ((q->hba_index + 1) % q->entry_count);
537 if (idx == q->host_index)
4f774513
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538 return NULL;
539
027140ea 540 q->hba_index = idx;
7365f6fd
JS
541 /* if the index wrapped around, toggle the valid bit */
542 if (phba->sli4_hba.pc_sli4_params.cqav && !q->hba_index)
543 q->qe_valid = (q->qe_valid) ? 0 : 1;
27f344eb
JS
544
545 /*
546 * insert barrier for instruction interlock : data from the hardware
547 * must have the valid bit checked before it can be copied and acted
2ea259ee
JS
548 * upon. Given what was seen in lpfc_sli4_cq_get() of speculative
549 * instructions allowing action on content before valid bit checked,
550 * add barrier here as well. May not be needed as "content" is a
551 * single 32-bit entity here (vs multi word structure for cq's).
27f344eb
JS
552 */
553 mb();
4f774513
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554 return cqe;
555}
556
557/**
558 * lpfc_sli4_cq_release - Indicates the host has finished processing a CQ
559 * @q: The Completion Queue that the host has completed processing for.
560 * @arm: Indicates whether the host wants to arms this CQ.
561 *
562 * This routine will mark all Completion queue entries on @q, from the last
563 * known completed entry to the last entry that was processed, as completed
564 * by clearing the valid bit for each completion queue entry. Then it will
565 * notify the HBA, by ringing the doorbell, that the CQEs have been processed.
566 * The internal host index in the @q will be updated by this routine to indicate
567 * that the host has finished processing the entries. The @arm parameter
568 * indicates that the queue should be rearmed when ringing the doorbell.
569 *
570 * This function will return the number of CQEs that were released.
571 **/
572uint32_t
573lpfc_sli4_cq_release(struct lpfc_queue *q, bool arm)
574{
575 uint32_t released = 0;
7365f6fd 576 struct lpfc_hba *phba;
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577 struct lpfc_cqe *temp_qe;
578 struct lpfc_register doorbell;
579
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580 /* sanity check on queue memory */
581 if (unlikely(!q))
582 return 0;
7365f6fd
JS
583 phba = q->phba;
584
4f774513
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585 /* while there are valid entries */
586 while (q->hba_index != q->host_index) {
7365f6fd
JS
587 if (!phba->sli4_hba.pc_sli4_params.cqav) {
588 temp_qe = q->qe[q->host_index].cqe;
589 bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
590 }
4f774513
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591 released++;
592 q->host_index = ((q->host_index + 1) % q->entry_count);
593 }
594 if (unlikely(released == 0 && !arm))
595 return 0;
596
597 /* ring doorbell for number popped */
598 doorbell.word0 = 0;
599 if (arm)
600 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
601 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, released);
602 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_COMPLETION);
6b5151fd
JS
603 bf_set(lpfc_eqcq_doorbell_cqid_hi, &doorbell,
604 (q->queue_id >> LPFC_CQID_HI_FIELD_SHIFT));
605 bf_set(lpfc_eqcq_doorbell_cqid_lo, &doorbell, q->queue_id);
9dd35425 606 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
4f774513
JS
607 return released;
608}
609
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610/**
611 * lpfc_sli4_if6_cq_release - Indicates the host has finished processing a CQ
612 * @q: The Completion Queue that the host has completed processing for.
613 * @arm: Indicates whether the host wants to arms this CQ.
614 *
615 * This routine will mark all Completion queue entries on @q, from the last
616 * known completed entry to the last entry that was processed, as completed
617 * by clearing the valid bit for each completion queue entry. Then it will
618 * notify the HBA, by ringing the doorbell, that the CQEs have been processed.
619 * The internal host index in the @q will be updated by this routine to indicate
620 * that the host has finished processing the entries. The @arm parameter
621 * indicates that the queue should be rearmed when ringing the doorbell.
622 *
623 * This function will return the number of CQEs that were released.
624 **/
625uint32_t
626lpfc_sli4_if6_cq_release(struct lpfc_queue *q, bool arm)
627{
628 uint32_t released = 0;
7365f6fd 629 struct lpfc_hba *phba;
27d6ac0a
JS
630 struct lpfc_cqe *temp_qe;
631 struct lpfc_register doorbell;
632
633 /* sanity check on queue memory */
634 if (unlikely(!q))
635 return 0;
7365f6fd
JS
636 phba = q->phba;
637
27d6ac0a
JS
638 /* while there are valid entries */
639 while (q->hba_index != q->host_index) {
7365f6fd
JS
640 if (!phba->sli4_hba.pc_sli4_params.cqav) {
641 temp_qe = q->qe[q->host_index].cqe;
642 bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
643 }
27d6ac0a
JS
644 released++;
645 q->host_index = ((q->host_index + 1) % q->entry_count);
646 }
647 if (unlikely(released == 0 && !arm))
648 return 0;
649
650 /* ring doorbell for number popped */
651 doorbell.word0 = 0;
652 if (arm)
653 bf_set(lpfc_if6_cq_doorbell_arm, &doorbell, 1);
654 bf_set(lpfc_if6_cq_doorbell_num_released, &doorbell, released);
655 bf_set(lpfc_if6_cq_doorbell_cqid, &doorbell, q->queue_id);
656 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
657 return released;
658}
659
4f774513
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660/**
661 * lpfc_sli4_rq_put - Put a Receive Buffer Queue Entry on a Receive Queue
662 * @q: The Header Receive Queue to operate on.
663 * @wqe: The Receive Queue Entry to put on the Receive queue.
664 *
665 * This routine will copy the contents of @wqe to the next available entry on
666 * the @q. This function will then ring the Receive Queue Doorbell to signal the
667 * HBA to start processing the Receive Queue Entry. This function returns the
668 * index that the rqe was copied to if successful. If no entries are available
669 * on @q then this function will return -ENOMEM.
670 * The caller is expected to hold the hbalock when calling this routine.
671 **/
895427bd 672int
4f774513
JS
673lpfc_sli4_rq_put(struct lpfc_queue *hq, struct lpfc_queue *dq,
674 struct lpfc_rqe *hrqe, struct lpfc_rqe *drqe)
675{
2e90f4b5
JS
676 struct lpfc_rqe *temp_hrqe;
677 struct lpfc_rqe *temp_drqe;
4f774513 678 struct lpfc_register doorbell;
cbc5de1b
JS
679 int hq_put_index;
680 int dq_put_index;
4f774513 681
2e90f4b5
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682 /* sanity check on queue memory */
683 if (unlikely(!hq) || unlikely(!dq))
684 return -ENOMEM;
cbc5de1b
JS
685 hq_put_index = hq->host_index;
686 dq_put_index = dq->host_index;
687 temp_hrqe = hq->qe[hq_put_index].rqe;
688 temp_drqe = dq->qe[dq_put_index].rqe;
2e90f4b5 689
4f774513
JS
690 if (hq->type != LPFC_HRQ || dq->type != LPFC_DRQ)
691 return -EINVAL;
cbc5de1b 692 if (hq_put_index != dq_put_index)
4f774513
JS
693 return -EINVAL;
694 /* If the host has not yet processed the next entry then we are done */
cbc5de1b 695 if (((hq_put_index + 1) % hq->entry_count) == hq->hba_index)
4f774513 696 return -EBUSY;
48f8fdb4
JS
697 lpfc_sli4_pcimem_bcopy(hrqe, temp_hrqe, hq->entry_size);
698 lpfc_sli4_pcimem_bcopy(drqe, temp_drqe, dq->entry_size);
4f774513
JS
699
700 /* Update the host index to point to the next slot */
cbc5de1b
JS
701 hq->host_index = ((hq_put_index + 1) % hq->entry_count);
702 dq->host_index = ((dq_put_index + 1) % dq->entry_count);
61f3d4bf 703 hq->RQ_buf_posted++;
4f774513
JS
704
705 /* Ring The Header Receive Queue Doorbell */
73d91e50 706 if (!(hq->host_index % hq->entry_repost)) {
4f774513 707 doorbell.word0 = 0;
962bc51b
JS
708 if (hq->db_format == LPFC_DB_RING_FORMAT) {
709 bf_set(lpfc_rq_db_ring_fm_num_posted, &doorbell,
710 hq->entry_repost);
711 bf_set(lpfc_rq_db_ring_fm_id, &doorbell, hq->queue_id);
712 } else if (hq->db_format == LPFC_DB_LIST_FORMAT) {
713 bf_set(lpfc_rq_db_list_fm_num_posted, &doorbell,
714 hq->entry_repost);
715 bf_set(lpfc_rq_db_list_fm_index, &doorbell,
716 hq->host_index);
717 bf_set(lpfc_rq_db_list_fm_id, &doorbell, hq->queue_id);
718 } else {
719 return -EINVAL;
720 }
721 writel(doorbell.word0, hq->db_regaddr);
4f774513 722 }
cbc5de1b 723 return hq_put_index;
4f774513
JS
724}
725
726/**
727 * lpfc_sli4_rq_release - Updates internal hba index for RQ
728 * @q: The Header Receive Queue to operate on.
729 *
730 * This routine will update the HBA index of a queue to reflect consumption of
731 * one Receive Queue Entry by the HBA. When the HBA indicates that it has
732 * consumed an entry the host calls this function to update the queue's
733 * internal pointers. This routine returns the number of entries that were
734 * consumed by the HBA.
735 **/
736static uint32_t
737lpfc_sli4_rq_release(struct lpfc_queue *hq, struct lpfc_queue *dq)
738{
2e90f4b5
JS
739 /* sanity check on queue memory */
740 if (unlikely(!hq) || unlikely(!dq))
741 return 0;
742
4f774513
JS
743 if ((hq->type != LPFC_HRQ) || (dq->type != LPFC_DRQ))
744 return 0;
745 hq->hba_index = ((hq->hba_index + 1) % hq->entry_count);
746 dq->hba_index = ((dq->hba_index + 1) % dq->entry_count);
747 return 1;
748}
749
e59058c4 750/**
3621a710 751 * lpfc_cmd_iocb - Get next command iocb entry in the ring
e59058c4
JS
752 * @phba: Pointer to HBA context object.
753 * @pring: Pointer to driver SLI ring object.
754 *
755 * This function returns pointer to next command iocb entry
756 * in the command ring. The caller must hold hbalock to prevent
757 * other threads consume the next command iocb.
758 * SLI-2/SLI-3 provide different sized iocbs.
759 **/
ed957684
JS
760static inline IOCB_t *
761lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
762{
7e56aa25
JS
763 return (IOCB_t *) (((char *) pring->sli.sli3.cmdringaddr) +
764 pring->sli.sli3.cmdidx * phba->iocb_cmd_size);
ed957684
JS
765}
766
e59058c4 767/**
3621a710 768 * lpfc_resp_iocb - Get next response iocb entry in the ring
e59058c4
JS
769 * @phba: Pointer to HBA context object.
770 * @pring: Pointer to driver SLI ring object.
771 *
772 * This function returns pointer to next response iocb entry
773 * in the response ring. The caller must hold hbalock to make sure
774 * that no other thread consume the next response iocb.
775 * SLI-2/SLI-3 provide different sized iocbs.
776 **/
ed957684
JS
777static inline IOCB_t *
778lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
779{
7e56aa25
JS
780 return (IOCB_t *) (((char *) pring->sli.sli3.rspringaddr) +
781 pring->sli.sli3.rspidx * phba->iocb_rsp_size);
ed957684
JS
782}
783
e59058c4 784/**
3621a710 785 * __lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
786 * @phba: Pointer to HBA context object.
787 *
788 * This function is called with hbalock held. This function
789 * allocates a new driver iocb object from the iocb pool. If the
790 * allocation is successful, it returns pointer to the newly
791 * allocated iocb object else it returns NULL.
792 **/
4f2e66c6 793struct lpfc_iocbq *
2e0fef85 794__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC
795{
796 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
797 struct lpfc_iocbq * iocbq = NULL;
798
1c2ba475
JT
799 lockdep_assert_held(&phba->hbalock);
800
0bd4ca25 801 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
2a9bf3d0
JS
802 if (iocbq)
803 phba->iocb_cnt++;
804 if (phba->iocb_cnt > phba->iocb_max)
805 phba->iocb_max = phba->iocb_cnt;
0bd4ca25
JSEC
806 return iocbq;
807}
808
da0436e9
JS
809/**
810 * __lpfc_clear_active_sglq - Remove the active sglq for this XRI.
811 * @phba: Pointer to HBA context object.
812 * @xritag: XRI value.
813 *
814 * This function clears the sglq pointer from the array of acive
815 * sglq's. The xritag that is passed in is used to index into the
816 * array. Before the xritag can be used it needs to be adjusted
817 * by subtracting the xribase.
818 *
819 * Returns sglq ponter = success, NULL = Failure.
820 **/
895427bd 821struct lpfc_sglq *
da0436e9
JS
822__lpfc_clear_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
823{
da0436e9 824 struct lpfc_sglq *sglq;
6d368e53
JS
825
826 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
827 phba->sli4_hba.lpfc_sglq_active_list[xritag] = NULL;
da0436e9
JS
828 return sglq;
829}
830
831/**
832 * __lpfc_get_active_sglq - Get the active sglq for this XRI.
833 * @phba: Pointer to HBA context object.
834 * @xritag: XRI value.
835 *
836 * This function returns the sglq pointer from the array of acive
837 * sglq's. The xritag that is passed in is used to index into the
838 * array. Before the xritag can be used it needs to be adjusted
839 * by subtracting the xribase.
840 *
841 * Returns sglq ponter = success, NULL = Failure.
842 **/
0f65ff68 843struct lpfc_sglq *
da0436e9
JS
844__lpfc_get_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
845{
da0436e9 846 struct lpfc_sglq *sglq;
6d368e53
JS
847
848 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
da0436e9
JS
849 return sglq;
850}
851
19ca7609 852/**
1151e3ec 853 * lpfc_clr_rrq_active - Clears RRQ active bit in xri_bitmap.
19ca7609
JS
854 * @phba: Pointer to HBA context object.
855 * @xritag: xri used in this exchange.
856 * @rrq: The RRQ to be cleared.
857 *
19ca7609 858 **/
1151e3ec
JS
859void
860lpfc_clr_rrq_active(struct lpfc_hba *phba,
861 uint16_t xritag,
862 struct lpfc_node_rrq *rrq)
19ca7609 863{
1151e3ec 864 struct lpfc_nodelist *ndlp = NULL;
19ca7609 865
1151e3ec
JS
866 if ((rrq->vport) && NLP_CHK_NODE_ACT(rrq->ndlp))
867 ndlp = lpfc_findnode_did(rrq->vport, rrq->nlp_DID);
19ca7609
JS
868
869 /* The target DID could have been swapped (cable swap)
870 * we should use the ndlp from the findnode if it is
871 * available.
872 */
1151e3ec 873 if ((!ndlp) && rrq->ndlp)
19ca7609
JS
874 ndlp = rrq->ndlp;
875
1151e3ec
JS
876 if (!ndlp)
877 goto out;
878
cff261f6 879 if (test_and_clear_bit(xritag, ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
880 rrq->send_rrq = 0;
881 rrq->xritag = 0;
882 rrq->rrq_stop_time = 0;
883 }
1151e3ec 884out:
19ca7609
JS
885 mempool_free(rrq, phba->rrq_pool);
886}
887
888/**
889 * lpfc_handle_rrq_active - Checks if RRQ has waithed RATOV.
890 * @phba: Pointer to HBA context object.
891 *
892 * This function is called with hbalock held. This function
893 * Checks if stop_time (ratov from setting rrq active) has
894 * been reached, if it has and the send_rrq flag is set then
895 * it will call lpfc_send_rrq. If the send_rrq flag is not set
896 * then it will just call the routine to clear the rrq and
897 * free the rrq resource.
898 * The timer is set to the next rrq that is going to expire before
899 * leaving the routine.
900 *
901 **/
902void
903lpfc_handle_rrq_active(struct lpfc_hba *phba)
904{
905 struct lpfc_node_rrq *rrq;
906 struct lpfc_node_rrq *nextrrq;
907 unsigned long next_time;
908 unsigned long iflags;
1151e3ec 909 LIST_HEAD(send_rrq);
19ca7609
JS
910
911 spin_lock_irqsave(&phba->hbalock, iflags);
912 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
256ec0d0 913 next_time = jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
19ca7609 914 list_for_each_entry_safe(rrq, nextrrq,
1151e3ec
JS
915 &phba->active_rrq_list, list) {
916 if (time_after(jiffies, rrq->rrq_stop_time))
917 list_move(&rrq->list, &send_rrq);
918 else if (time_before(rrq->rrq_stop_time, next_time))
19ca7609
JS
919 next_time = rrq->rrq_stop_time;
920 }
921 spin_unlock_irqrestore(&phba->hbalock, iflags);
06918ac5
JS
922 if ((!list_empty(&phba->active_rrq_list)) &&
923 (!(phba->pport->load_flag & FC_UNLOADING)))
19ca7609 924 mod_timer(&phba->rrq_tmr, next_time);
1151e3ec
JS
925 list_for_each_entry_safe(rrq, nextrrq, &send_rrq, list) {
926 list_del(&rrq->list);
927 if (!rrq->send_rrq)
928 /* this call will free the rrq */
929 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
930 else if (lpfc_send_rrq(phba, rrq)) {
931 /* if we send the rrq then the completion handler
932 * will clear the bit in the xribitmap.
933 */
934 lpfc_clr_rrq_active(phba, rrq->xritag,
935 rrq);
936 }
937 }
19ca7609
JS
938}
939
940/**
941 * lpfc_get_active_rrq - Get the active RRQ for this exchange.
942 * @vport: Pointer to vport context object.
943 * @xri: The xri used in the exchange.
944 * @did: The targets DID for this exchange.
945 *
946 * returns NULL = rrq not found in the phba->active_rrq_list.
947 * rrq = rrq for this xri and target.
948 **/
949struct lpfc_node_rrq *
950lpfc_get_active_rrq(struct lpfc_vport *vport, uint16_t xri, uint32_t did)
951{
952 struct lpfc_hba *phba = vport->phba;
953 struct lpfc_node_rrq *rrq;
954 struct lpfc_node_rrq *nextrrq;
955 unsigned long iflags;
956
957 if (phba->sli_rev != LPFC_SLI_REV4)
958 return NULL;
959 spin_lock_irqsave(&phba->hbalock, iflags);
960 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list) {
961 if (rrq->vport == vport && rrq->xritag == xri &&
962 rrq->nlp_DID == did){
963 list_del(&rrq->list);
964 spin_unlock_irqrestore(&phba->hbalock, iflags);
965 return rrq;
966 }
967 }
968 spin_unlock_irqrestore(&phba->hbalock, iflags);
969 return NULL;
970}
971
972/**
973 * lpfc_cleanup_vports_rrqs - Remove and clear the active RRQ for this vport.
974 * @vport: Pointer to vport context object.
1151e3ec
JS
975 * @ndlp: Pointer to the lpfc_node_list structure.
976 * If ndlp is NULL Remove all active RRQs for this vport from the
977 * phba->active_rrq_list and clear the rrq.
978 * If ndlp is not NULL then only remove rrqs for this vport & this ndlp.
19ca7609
JS
979 **/
980void
1151e3ec 981lpfc_cleanup_vports_rrqs(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
19ca7609
JS
982
983{
984 struct lpfc_hba *phba = vport->phba;
985 struct lpfc_node_rrq *rrq;
986 struct lpfc_node_rrq *nextrrq;
987 unsigned long iflags;
1151e3ec 988 LIST_HEAD(rrq_list);
19ca7609
JS
989
990 if (phba->sli_rev != LPFC_SLI_REV4)
991 return;
1151e3ec
JS
992 if (!ndlp) {
993 lpfc_sli4_vport_delete_els_xri_aborted(vport);
994 lpfc_sli4_vport_delete_fcp_xri_aborted(vport);
19ca7609 995 }
1151e3ec
JS
996 spin_lock_irqsave(&phba->hbalock, iflags);
997 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list)
998 if ((rrq->vport == vport) && (!ndlp || rrq->ndlp == ndlp))
999 list_move(&rrq->list, &rrq_list);
19ca7609 1000 spin_unlock_irqrestore(&phba->hbalock, iflags);
1151e3ec
JS
1001
1002 list_for_each_entry_safe(rrq, nextrrq, &rrq_list, list) {
1003 list_del(&rrq->list);
1004 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
1005 }
19ca7609
JS
1006}
1007
19ca7609 1008/**
1151e3ec 1009 * lpfc_test_rrq_active - Test RRQ bit in xri_bitmap.
19ca7609
JS
1010 * @phba: Pointer to HBA context object.
1011 * @ndlp: Targets nodelist pointer for this exchange.
1012 * @xritag the xri in the bitmap to test.
1013 *
1014 * This function is called with hbalock held. This function
1015 * returns 0 = rrq not active for this xri
1016 * 1 = rrq is valid for this xri.
1017 **/
1151e3ec
JS
1018int
1019lpfc_test_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
19ca7609
JS
1020 uint16_t xritag)
1021{
1c2ba475 1022 lockdep_assert_held(&phba->hbalock);
19ca7609
JS
1023 if (!ndlp)
1024 return 0;
cff261f6
JS
1025 if (!ndlp->active_rrqs_xri_bitmap)
1026 return 0;
1027 if (test_bit(xritag, ndlp->active_rrqs_xri_bitmap))
19ca7609
JS
1028 return 1;
1029 else
1030 return 0;
1031}
1032
1033/**
1034 * lpfc_set_rrq_active - set RRQ active bit in xri_bitmap.
1035 * @phba: Pointer to HBA context object.
1036 * @ndlp: nodelist pointer for this target.
1037 * @xritag: xri used in this exchange.
1038 * @rxid: Remote Exchange ID.
1039 * @send_rrq: Flag used to determine if we should send rrq els cmd.
1040 *
1041 * This function takes the hbalock.
1042 * The active bit is always set in the active rrq xri_bitmap even
1043 * if there is no slot avaiable for the other rrq information.
1044 *
1045 * returns 0 rrq actived for this xri
1046 * < 0 No memory or invalid ndlp.
1047 **/
1048int
1049lpfc_set_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
b42c07c8 1050 uint16_t xritag, uint16_t rxid, uint16_t send_rrq)
19ca7609 1051{
19ca7609 1052 unsigned long iflags;
b42c07c8
JS
1053 struct lpfc_node_rrq *rrq;
1054 int empty;
1055
1056 if (!ndlp)
1057 return -EINVAL;
1058
1059 if (!phba->cfg_enable_rrq)
1060 return -EINVAL;
19ca7609
JS
1061
1062 spin_lock_irqsave(&phba->hbalock, iflags);
b42c07c8
JS
1063 if (phba->pport->load_flag & FC_UNLOADING) {
1064 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
1065 goto out;
1066 }
1067
1068 /*
1069 * set the active bit even if there is no mem available.
1070 */
1071 if (NLP_CHK_FREE_REQ(ndlp))
1072 goto out;
1073
1074 if (ndlp->vport && (ndlp->vport->load_flag & FC_UNLOADING))
1075 goto out;
1076
cff261f6
JS
1077 if (!ndlp->active_rrqs_xri_bitmap)
1078 goto out;
1079
1080 if (test_and_set_bit(xritag, ndlp->active_rrqs_xri_bitmap))
b42c07c8
JS
1081 goto out;
1082
19ca7609 1083 spin_unlock_irqrestore(&phba->hbalock, iflags);
b42c07c8
JS
1084 rrq = mempool_alloc(phba->rrq_pool, GFP_KERNEL);
1085 if (!rrq) {
1086 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1087 "3155 Unable to allocate RRQ xri:0x%x rxid:0x%x"
1088 " DID:0x%x Send:%d\n",
1089 xritag, rxid, ndlp->nlp_DID, send_rrq);
1090 return -EINVAL;
1091 }
e5771b4d
JS
1092 if (phba->cfg_enable_rrq == 1)
1093 rrq->send_rrq = send_rrq;
1094 else
1095 rrq->send_rrq = 0;
b42c07c8 1096 rrq->xritag = xritag;
256ec0d0
JS
1097 rrq->rrq_stop_time = jiffies +
1098 msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
b42c07c8
JS
1099 rrq->ndlp = ndlp;
1100 rrq->nlp_DID = ndlp->nlp_DID;
1101 rrq->vport = ndlp->vport;
1102 rrq->rxid = rxid;
b42c07c8
JS
1103 spin_lock_irqsave(&phba->hbalock, iflags);
1104 empty = list_empty(&phba->active_rrq_list);
1105 list_add_tail(&rrq->list, &phba->active_rrq_list);
1106 phba->hba_flag |= HBA_RRQ_ACTIVE;
1107 if (empty)
1108 lpfc_worker_wake_up(phba);
1109 spin_unlock_irqrestore(&phba->hbalock, iflags);
1110 return 0;
1111out:
1112 spin_unlock_irqrestore(&phba->hbalock, iflags);
1113 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1114 "2921 Can't set rrq active xri:0x%x rxid:0x%x"
1115 " DID:0x%x Send:%d\n",
1116 xritag, rxid, ndlp->nlp_DID, send_rrq);
1117 return -EINVAL;
19ca7609
JS
1118}
1119
da0436e9 1120/**
895427bd 1121 * __lpfc_sli_get_els_sglq - Allocates an iocb object from sgl pool
da0436e9 1122 * @phba: Pointer to HBA context object.
19ca7609 1123 * @piocb: Pointer to the iocbq.
da0436e9 1124 *
dafe8cea 1125 * This function is called with the ring lock held. This function
6d368e53 1126 * gets a new driver sglq object from the sglq list. If the
da0436e9
JS
1127 * list is not empty then it is successful, it returns pointer to the newly
1128 * allocated sglq object else it returns NULL.
1129 **/
1130static struct lpfc_sglq *
895427bd 1131__lpfc_sli_get_els_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
da0436e9 1132{
895427bd 1133 struct list_head *lpfc_els_sgl_list = &phba->sli4_hba.lpfc_els_sgl_list;
da0436e9 1134 struct lpfc_sglq *sglq = NULL;
19ca7609 1135 struct lpfc_sglq *start_sglq = NULL;
19ca7609
JS
1136 struct lpfc_scsi_buf *lpfc_cmd;
1137 struct lpfc_nodelist *ndlp;
1138 int found = 0;
1139
1c2ba475
JT
1140 lockdep_assert_held(&phba->hbalock);
1141
19ca7609
JS
1142 if (piocbq->iocb_flag & LPFC_IO_FCP) {
1143 lpfc_cmd = (struct lpfc_scsi_buf *) piocbq->context1;
1144 ndlp = lpfc_cmd->rdata->pnode;
be858b65 1145 } else if ((piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) &&
6c7cf486 1146 !(piocbq->iocb_flag & LPFC_IO_LIBDFC)) {
19ca7609 1147 ndlp = piocbq->context_un.ndlp;
6c7cf486
JS
1148 } else if (piocbq->iocb_flag & LPFC_IO_LIBDFC) {
1149 if (piocbq->iocb_flag & LPFC_IO_LOOPBACK)
1150 ndlp = NULL;
1151 else
1152 ndlp = piocbq->context_un.ndlp;
1153 } else {
19ca7609 1154 ndlp = piocbq->context1;
6c7cf486 1155 }
19ca7609 1156
895427bd
JS
1157 spin_lock(&phba->sli4_hba.sgl_list_lock);
1158 list_remove_head(lpfc_els_sgl_list, sglq, struct lpfc_sglq, list);
19ca7609
JS
1159 start_sglq = sglq;
1160 while (!found) {
1161 if (!sglq)
d11f54b7 1162 break;
895427bd
JS
1163 if (ndlp && ndlp->active_rrqs_xri_bitmap &&
1164 test_bit(sglq->sli4_lxritag,
1165 ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
1166 /* This xri has an rrq outstanding for this DID.
1167 * put it back in the list and get another xri.
1168 */
895427bd 1169 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609 1170 sglq = NULL;
895427bd 1171 list_remove_head(lpfc_els_sgl_list, sglq,
19ca7609
JS
1172 struct lpfc_sglq, list);
1173 if (sglq == start_sglq) {
14041bd1 1174 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609
JS
1175 sglq = NULL;
1176 break;
1177 } else
1178 continue;
1179 }
1180 sglq->ndlp = ndlp;
1181 found = 1;
6d368e53 1182 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
19ca7609
JS
1183 sglq->state = SGL_ALLOCATED;
1184 }
895427bd 1185 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1186 return sglq;
1187}
1188
f358dd0c
JS
1189/**
1190 * __lpfc_sli_get_nvmet_sglq - Allocates an iocb object from sgl pool
1191 * @phba: Pointer to HBA context object.
1192 * @piocb: Pointer to the iocbq.
1193 *
1194 * This function is called with the sgl_list lock held. This function
1195 * gets a new driver sglq object from the sglq list. If the
1196 * list is not empty then it is successful, it returns pointer to the newly
1197 * allocated sglq object else it returns NULL.
1198 **/
1199struct lpfc_sglq *
1200__lpfc_sli_get_nvmet_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
1201{
1202 struct list_head *lpfc_nvmet_sgl_list;
1203 struct lpfc_sglq *sglq = NULL;
1204
1205 lpfc_nvmet_sgl_list = &phba->sli4_hba.lpfc_nvmet_sgl_list;
1206
1207 lockdep_assert_held(&phba->sli4_hba.sgl_list_lock);
1208
1209 list_remove_head(lpfc_nvmet_sgl_list, sglq, struct lpfc_sglq, list);
1210 if (!sglq)
1211 return NULL;
1212 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
1213 sglq->state = SGL_ALLOCATED;
da0436e9
JS
1214 return sglq;
1215}
1216
e59058c4 1217/**
3621a710 1218 * lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
1219 * @phba: Pointer to HBA context object.
1220 *
1221 * This function is called with no lock held. This function
1222 * allocates a new driver iocb object from the iocb pool. If the
1223 * allocation is successful, it returns pointer to the newly
1224 * allocated iocb object else it returns NULL.
1225 **/
2e0fef85
JS
1226struct lpfc_iocbq *
1227lpfc_sli_get_iocbq(struct lpfc_hba *phba)
1228{
1229 struct lpfc_iocbq * iocbq = NULL;
1230 unsigned long iflags;
1231
1232 spin_lock_irqsave(&phba->hbalock, iflags);
1233 iocbq = __lpfc_sli_get_iocbq(phba);
1234 spin_unlock_irqrestore(&phba->hbalock, iflags);
1235 return iocbq;
1236}
1237
4f774513
JS
1238/**
1239 * __lpfc_sli_release_iocbq_s4 - Release iocb to the iocb pool
1240 * @phba: Pointer to HBA context object.
1241 * @iocbq: Pointer to driver iocb object.
1242 *
1243 * This function is called with hbalock held to release driver
1244 * iocb object to the iocb pool. The iotag in the iocb object
1245 * does not change for each use of the iocb object. This function
1246 * clears all other fields of the iocb object when it is freed.
1247 * The sqlq structure that holds the xritag and phys and virtual
1248 * mappings for the scatter gather list is retrieved from the
1249 * active array of sglq. The get of the sglq pointer also clears
1250 * the entry in the array. If the status of the IO indiactes that
1251 * this IO was aborted then the sglq entry it put on the
1252 * lpfc_abts_els_sgl_list until the CQ_ABORTED_XRI is received. If the
1253 * IO has good status or fails for any other reason then the sglq
895427bd 1254 * entry is added to the free list (lpfc_els_sgl_list).
4f774513
JS
1255 **/
1256static void
1257__lpfc_sli_release_iocbq_s4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1258{
1259 struct lpfc_sglq *sglq;
1260 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
2a9bf3d0 1261 unsigned long iflag = 0;
895427bd 1262 struct lpfc_sli_ring *pring;
4f774513 1263
1c2ba475
JT
1264 lockdep_assert_held(&phba->hbalock);
1265
4f774513
JS
1266 if (iocbq->sli4_xritag == NO_XRI)
1267 sglq = NULL;
1268 else
6d368e53
JS
1269 sglq = __lpfc_clear_active_sglq(phba, iocbq->sli4_lxritag);
1270
0e9bb8d7 1271
4f774513 1272 if (sglq) {
f358dd0c
JS
1273 if (iocbq->iocb_flag & LPFC_IO_NVMET) {
1274 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1275 iflag);
1276 sglq->state = SGL_FREED;
1277 sglq->ndlp = NULL;
1278 list_add_tail(&sglq->list,
1279 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1280 spin_unlock_irqrestore(
1281 &phba->sli4_hba.sgl_list_lock, iflag);
1282 goto out;
1283 }
1284
895427bd 1285 pring = phba->sli4_hba.els_wq->pring;
0f65ff68
JS
1286 if ((iocbq->iocb_flag & LPFC_EXCHANGE_BUSY) &&
1287 (sglq->state != SGL_XRI_ABORTED)) {
895427bd
JS
1288 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1289 iflag);
4f774513 1290 list_add(&sglq->list,
895427bd 1291 &phba->sli4_hba.lpfc_abts_els_sgl_list);
4f774513 1292 spin_unlock_irqrestore(
895427bd 1293 &phba->sli4_hba.sgl_list_lock, iflag);
0f65ff68 1294 } else {
895427bd
JS
1295 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1296 iflag);
0f65ff68 1297 sglq->state = SGL_FREED;
19ca7609 1298 sglq->ndlp = NULL;
fedd3b7b 1299 list_add_tail(&sglq->list,
895427bd
JS
1300 &phba->sli4_hba.lpfc_els_sgl_list);
1301 spin_unlock_irqrestore(
1302 &phba->sli4_hba.sgl_list_lock, iflag);
2a9bf3d0
JS
1303
1304 /* Check if TXQ queue needs to be serviced */
0e9bb8d7 1305 if (!list_empty(&pring->txq))
2a9bf3d0 1306 lpfc_worker_wake_up(phba);
0f65ff68 1307 }
4f774513
JS
1308 }
1309
f358dd0c 1310out:
4f774513
JS
1311 /*
1312 * Clean all volatile data fields, preserve iotag and node struct.
1313 */
1314 memset((char *)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
6d368e53 1315 iocbq->sli4_lxritag = NO_XRI;
4f774513 1316 iocbq->sli4_xritag = NO_XRI;
f358dd0c
JS
1317 iocbq->iocb_flag &= ~(LPFC_IO_NVME | LPFC_IO_NVMET |
1318 LPFC_IO_NVME_LS);
4f774513
JS
1319 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1320}
1321
2a9bf3d0 1322
e59058c4 1323/**
3772a991 1324 * __lpfc_sli_release_iocbq_s3 - Release iocb to the iocb pool
e59058c4
JS
1325 * @phba: Pointer to HBA context object.
1326 * @iocbq: Pointer to driver iocb object.
1327 *
1328 * This function is called with hbalock held to release driver
1329 * iocb object to the iocb pool. The iotag in the iocb object
1330 * does not change for each use of the iocb object. This function
1331 * clears all other fields of the iocb object when it is freed.
1332 **/
a6ababd2 1333static void
3772a991 1334__lpfc_sli_release_iocbq_s3(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 1335{
2e0fef85 1336 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30 1337
1c2ba475 1338 lockdep_assert_held(&phba->hbalock);
0e9bb8d7 1339
604a3e30
JB
1340 /*
1341 * Clean all volatile data fields, preserve iotag and node struct.
1342 */
1343 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
3772a991 1344 iocbq->sli4_xritag = NO_XRI;
604a3e30
JB
1345 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1346}
1347
3772a991
JS
1348/**
1349 * __lpfc_sli_release_iocbq - Release iocb to the iocb pool
1350 * @phba: Pointer to HBA context object.
1351 * @iocbq: Pointer to driver iocb object.
1352 *
1353 * This function is called with hbalock held to release driver
1354 * iocb object to the iocb pool. The iotag in the iocb object
1355 * does not change for each use of the iocb object. This function
1356 * clears all other fields of the iocb object when it is freed.
1357 **/
1358static void
1359__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1360{
1c2ba475
JT
1361 lockdep_assert_held(&phba->hbalock);
1362
3772a991 1363 phba->__lpfc_sli_release_iocbq(phba, iocbq);
2a9bf3d0 1364 phba->iocb_cnt--;
3772a991
JS
1365}
1366
e59058c4 1367/**
3621a710 1368 * lpfc_sli_release_iocbq - Release iocb to the iocb pool
e59058c4
JS
1369 * @phba: Pointer to HBA context object.
1370 * @iocbq: Pointer to driver iocb object.
1371 *
1372 * This function is called with no lock held to release the iocb to
1373 * iocb pool.
1374 **/
2e0fef85
JS
1375void
1376lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1377{
1378 unsigned long iflags;
1379
1380 /*
1381 * Clean all volatile data fields, preserve iotag and node struct.
1382 */
1383 spin_lock_irqsave(&phba->hbalock, iflags);
1384 __lpfc_sli_release_iocbq(phba, iocbq);
1385 spin_unlock_irqrestore(&phba->hbalock, iflags);
1386}
1387
a257bf90
JS
1388/**
1389 * lpfc_sli_cancel_iocbs - Cancel all iocbs from a list.
1390 * @phba: Pointer to HBA context object.
1391 * @iocblist: List of IOCBs.
1392 * @ulpstatus: ULP status in IOCB command field.
1393 * @ulpWord4: ULP word-4 in IOCB command field.
1394 *
1395 * This function is called with a list of IOCBs to cancel. It cancels the IOCB
1396 * on the list by invoking the complete callback function associated with the
1397 * IOCB with the provided @ulpstatus and @ulpword4 set to the IOCB commond
1398 * fields.
1399 **/
1400void
1401lpfc_sli_cancel_iocbs(struct lpfc_hba *phba, struct list_head *iocblist,
1402 uint32_t ulpstatus, uint32_t ulpWord4)
1403{
1404 struct lpfc_iocbq *piocb;
1405
1406 while (!list_empty(iocblist)) {
1407 list_remove_head(iocblist, piocb, struct lpfc_iocbq, list);
a257bf90
JS
1408 if (!piocb->iocb_cmpl)
1409 lpfc_sli_release_iocbq(phba, piocb);
1410 else {
1411 piocb->iocb.ulpStatus = ulpstatus;
1412 piocb->iocb.un.ulpWord[4] = ulpWord4;
1413 (piocb->iocb_cmpl) (phba, piocb, piocb);
1414 }
1415 }
1416 return;
1417}
1418
e59058c4 1419/**
3621a710
JS
1420 * lpfc_sli_iocb_cmd_type - Get the iocb type
1421 * @iocb_cmnd: iocb command code.
e59058c4
JS
1422 *
1423 * This function is called by ring event handler function to get the iocb type.
1424 * This function translates the iocb command to an iocb command type used to
1425 * decide the final disposition of each completed IOCB.
1426 * The function returns
1427 * LPFC_UNKNOWN_IOCB if it is an unsupported iocb
1428 * LPFC_SOL_IOCB if it is a solicited iocb completion
1429 * LPFC_ABORT_IOCB if it is an abort iocb
1430 * LPFC_UNSOL_IOCB if it is an unsolicited iocb
1431 *
1432 * The caller is not required to hold any lock.
1433 **/
dea3101e
JB
1434static lpfc_iocb_type
1435lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
1436{
1437 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
1438
1439 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
1440 return 0;
1441
1442 switch (iocb_cmnd) {
1443 case CMD_XMIT_SEQUENCE_CR:
1444 case CMD_XMIT_SEQUENCE_CX:
1445 case CMD_XMIT_BCAST_CN:
1446 case CMD_XMIT_BCAST_CX:
1447 case CMD_ELS_REQUEST_CR:
1448 case CMD_ELS_REQUEST_CX:
1449 case CMD_CREATE_XRI_CR:
1450 case CMD_CREATE_XRI_CX:
1451 case CMD_GET_RPI_CN:
1452 case CMD_XMIT_ELS_RSP_CX:
1453 case CMD_GET_RPI_CR:
1454 case CMD_FCP_IWRITE_CR:
1455 case CMD_FCP_IWRITE_CX:
1456 case CMD_FCP_IREAD_CR:
1457 case CMD_FCP_IREAD_CX:
1458 case CMD_FCP_ICMND_CR:
1459 case CMD_FCP_ICMND_CX:
f5603511
JS
1460 case CMD_FCP_TSEND_CX:
1461 case CMD_FCP_TRSP_CX:
1462 case CMD_FCP_TRECEIVE_CX:
1463 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB
1464 case CMD_ADAPTER_MSG:
1465 case CMD_ADAPTER_DUMP:
1466 case CMD_XMIT_SEQUENCE64_CR:
1467 case CMD_XMIT_SEQUENCE64_CX:
1468 case CMD_XMIT_BCAST64_CN:
1469 case CMD_XMIT_BCAST64_CX:
1470 case CMD_ELS_REQUEST64_CR:
1471 case CMD_ELS_REQUEST64_CX:
1472 case CMD_FCP_IWRITE64_CR:
1473 case CMD_FCP_IWRITE64_CX:
1474 case CMD_FCP_IREAD64_CR:
1475 case CMD_FCP_IREAD64_CX:
1476 case CMD_FCP_ICMND64_CR:
1477 case CMD_FCP_ICMND64_CX:
f5603511
JS
1478 case CMD_FCP_TSEND64_CX:
1479 case CMD_FCP_TRSP64_CX:
1480 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB
1481 case CMD_GEN_REQUEST64_CR:
1482 case CMD_GEN_REQUEST64_CX:
1483 case CMD_XMIT_ELS_RSP64_CX:
da0436e9
JS
1484 case DSSCMD_IWRITE64_CR:
1485 case DSSCMD_IWRITE64_CX:
1486 case DSSCMD_IREAD64_CR:
1487 case DSSCMD_IREAD64_CX:
dea3101e
JB
1488 type = LPFC_SOL_IOCB;
1489 break;
1490 case CMD_ABORT_XRI_CN:
1491 case CMD_ABORT_XRI_CX:
1492 case CMD_CLOSE_XRI_CN:
1493 case CMD_CLOSE_XRI_CX:
1494 case CMD_XRI_ABORTED_CX:
1495 case CMD_ABORT_MXRI64_CN:
6669f9bb 1496 case CMD_XMIT_BLS_RSP64_CX:
dea3101e
JB
1497 type = LPFC_ABORT_IOCB;
1498 break;
1499 case CMD_RCV_SEQUENCE_CX:
1500 case CMD_RCV_ELS_REQ_CX:
1501 case CMD_RCV_SEQUENCE64_CX:
1502 case CMD_RCV_ELS_REQ64_CX:
57127f15 1503 case CMD_ASYNC_STATUS:
ed957684
JS
1504 case CMD_IOCB_RCV_SEQ64_CX:
1505 case CMD_IOCB_RCV_ELS64_CX:
1506 case CMD_IOCB_RCV_CONT64_CX:
3163f725 1507 case CMD_IOCB_RET_XRI64_CX:
dea3101e
JB
1508 type = LPFC_UNSOL_IOCB;
1509 break;
3163f725
JS
1510 case CMD_IOCB_XMIT_MSEQ64_CR:
1511 case CMD_IOCB_XMIT_MSEQ64_CX:
1512 case CMD_IOCB_RCV_SEQ_LIST64_CX:
1513 case CMD_IOCB_RCV_ELS_LIST64_CX:
1514 case CMD_IOCB_CLOSE_EXTENDED_CN:
1515 case CMD_IOCB_ABORT_EXTENDED_CN:
1516 case CMD_IOCB_RET_HBQE64_CN:
1517 case CMD_IOCB_FCP_IBIDIR64_CR:
1518 case CMD_IOCB_FCP_IBIDIR64_CX:
1519 case CMD_IOCB_FCP_ITASKMGT64_CX:
1520 case CMD_IOCB_LOGENTRY_CN:
1521 case CMD_IOCB_LOGENTRY_ASYNC_CN:
1522 printk("%s - Unhandled SLI-3 Command x%x\n",
cadbd4a5 1523 __func__, iocb_cmnd);
3163f725
JS
1524 type = LPFC_UNKNOWN_IOCB;
1525 break;
dea3101e
JB
1526 default:
1527 type = LPFC_UNKNOWN_IOCB;
1528 break;
1529 }
1530
1531 return type;
1532}
1533
e59058c4 1534/**
3621a710 1535 * lpfc_sli_ring_map - Issue config_ring mbox for all rings
e59058c4
JS
1536 * @phba: Pointer to HBA context object.
1537 *
1538 * This function is called from SLI initialization code
1539 * to configure every ring of the HBA's SLI interface. The
1540 * caller is not required to hold any lock. This function issues
1541 * a config_ring mailbox command for each ring.
1542 * This function returns zero if successful else returns a negative
1543 * error code.
1544 **/
dea3101e 1545static int
ed957684 1546lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB
1547{
1548 struct lpfc_sli *psli = &phba->sli;
ed957684
JS
1549 LPFC_MBOXQ_t *pmb;
1550 MAILBOX_t *pmbox;
1551 int i, rc, ret = 0;
dea3101e 1552
ed957684
JS
1553 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1554 if (!pmb)
1555 return -ENOMEM;
04c68496 1556 pmbox = &pmb->u.mb;
ed957684 1557 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 1558 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB
1559 lpfc_config_ring(phba, i, pmb);
1560 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1561 if (rc != MBX_SUCCESS) {
92d7f7b0 1562 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1563 "0446 Adapter failed to init (%d), "
dea3101e
JB
1564 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
1565 "ring %d\n",
e8b62011
JS
1566 rc, pmbox->mbxCommand,
1567 pmbox->mbxStatus, i);
2e0fef85 1568 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS
1569 ret = -ENXIO;
1570 break;
dea3101e
JB
1571 }
1572 }
ed957684
JS
1573 mempool_free(pmb, phba->mbox_mem_pool);
1574 return ret;
dea3101e
JB
1575}
1576
e59058c4 1577/**
3621a710 1578 * lpfc_sli_ringtxcmpl_put - Adds new iocb to the txcmplq
e59058c4
JS
1579 * @phba: Pointer to HBA context object.
1580 * @pring: Pointer to driver SLI ring object.
1581 * @piocb: Pointer to the driver iocb object.
1582 *
1583 * This function is called with hbalock held. The function adds the
1584 * new iocb to txcmplq of the given ring. This function always returns
1585 * 0. If this function is called for ELS ring, this function checks if
1586 * there is a vport associated with the ELS command. This function also
1587 * starts els_tmofunc timer if this is an ELS command.
1588 **/
dea3101e 1589static int
2e0fef85
JS
1590lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1591 struct lpfc_iocbq *piocb)
dea3101e 1592{
1c2ba475
JT
1593 lockdep_assert_held(&phba->hbalock);
1594
2319f847 1595 BUG_ON(!piocb);
22466da5 1596
dea3101e 1597 list_add_tail(&piocb->list, &pring->txcmplq);
4f2e66c6 1598 piocb->iocb_flag |= LPFC_IO_ON_TXCMPLQ;
2a9bf3d0 1599
92d7f7b0
JS
1600 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
1601 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2319f847
MFO
1602 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
1603 BUG_ON(!piocb->vport);
1604 if (!(piocb->vport->load_flag & FC_UNLOADING))
1605 mod_timer(&piocb->vport->els_tmofunc,
1606 jiffies +
1607 msecs_to_jiffies(1000 * (phba->fc_ratov << 1)));
1608 }
dea3101e 1609
2e0fef85 1610 return 0;
dea3101e
JB
1611}
1612
e59058c4 1613/**
3621a710 1614 * lpfc_sli_ringtx_get - Get first element of the txq
e59058c4
JS
1615 * @phba: Pointer to HBA context object.
1616 * @pring: Pointer to driver SLI ring object.
1617 *
1618 * This function is called with hbalock held to get next
1619 * iocb in txq of the given ring. If there is any iocb in
1620 * the txq, the function returns first iocb in the list after
1621 * removing the iocb from the list, else it returns NULL.
1622 **/
2a9bf3d0 1623struct lpfc_iocbq *
2e0fef85 1624lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 1625{
dea3101e
JB
1626 struct lpfc_iocbq *cmd_iocb;
1627
1c2ba475
JT
1628 lockdep_assert_held(&phba->hbalock);
1629
858c9f6c 1630 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
2e0fef85 1631 return cmd_iocb;
dea3101e
JB
1632}
1633
e59058c4 1634/**
3621a710 1635 * lpfc_sli_next_iocb_slot - Get next iocb slot in the ring
e59058c4
JS
1636 * @phba: Pointer to HBA context object.
1637 * @pring: Pointer to driver SLI ring object.
1638 *
1639 * This function is called with hbalock held and the caller must post the
1640 * iocb without releasing the lock. If the caller releases the lock,
1641 * iocb slot returned by the function is not guaranteed to be available.
1642 * The function returns pointer to the next available iocb slot if there
1643 * is available slot in the ring, else it returns NULL.
1644 * If the get index of the ring is ahead of the put index, the function
1645 * will post an error attention event to the worker thread to take the
1646 * HBA to offline state.
1647 **/
dea3101e
JB
1648static IOCB_t *
1649lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1650{
34b02dcd 1651 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
7e56aa25 1652 uint32_t max_cmd_idx = pring->sli.sli3.numCiocb;
1c2ba475
JT
1653
1654 lockdep_assert_held(&phba->hbalock);
1655
7e56aa25
JS
1656 if ((pring->sli.sli3.next_cmdidx == pring->sli.sli3.cmdidx) &&
1657 (++pring->sli.sli3.next_cmdidx >= max_cmd_idx))
1658 pring->sli.sli3.next_cmdidx = 0;
dea3101e 1659
7e56aa25
JS
1660 if (unlikely(pring->sli.sli3.local_getidx ==
1661 pring->sli.sli3.next_cmdidx)) {
dea3101e 1662
7e56aa25 1663 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e 1664
7e56aa25 1665 if (unlikely(pring->sli.sli3.local_getidx >= max_cmd_idx)) {
dea3101e 1666 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1667 "0315 Ring %d issue: portCmdGet %d "
025dfdaf 1668 "is bigger than cmd ring %d\n",
e8b62011 1669 pring->ringno,
7e56aa25
JS
1670 pring->sli.sli3.local_getidx,
1671 max_cmd_idx);
dea3101e 1672
2e0fef85 1673 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
1674 /*
1675 * All error attention handlers are posted to
1676 * worker thread
1677 */
1678 phba->work_ha |= HA_ERATT;
1679 phba->work_hs = HS_FFER3;
92d7f7b0 1680
5e9d9b82 1681 lpfc_worker_wake_up(phba);
dea3101e
JB
1682
1683 return NULL;
1684 }
1685
7e56aa25 1686 if (pring->sli.sli3.local_getidx == pring->sli.sli3.next_cmdidx)
dea3101e
JB
1687 return NULL;
1688 }
1689
ed957684 1690 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB
1691}
1692
e59058c4 1693/**
3621a710 1694 * lpfc_sli_next_iotag - Get an iotag for the iocb
e59058c4
JS
1695 * @phba: Pointer to HBA context object.
1696 * @iocbq: Pointer to driver iocb object.
1697 *
1698 * This function gets an iotag for the iocb. If there is no unused iotag and
1699 * the iocbq_lookup_len < 0xffff, this function allocates a bigger iotag_lookup
1700 * array and assigns a new iotag.
1701 * The function returns the allocated iotag if successful, else returns zero.
1702 * Zero is not a valid iotag.
1703 * The caller is not required to hold any lock.
1704 **/
604a3e30 1705uint16_t
2e0fef85 1706lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 1707{
2e0fef85
JS
1708 struct lpfc_iocbq **new_arr;
1709 struct lpfc_iocbq **old_arr;
604a3e30
JB
1710 size_t new_len;
1711 struct lpfc_sli *psli = &phba->sli;
1712 uint16_t iotag;
dea3101e 1713
2e0fef85 1714 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1715 iotag = psli->last_iotag;
1716 if(++iotag < psli->iocbq_lookup_len) {
1717 psli->last_iotag = iotag;
1718 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1719 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1720 iocbq->iotag = iotag;
1721 return iotag;
2e0fef85 1722 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB
1723 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
1724 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85 1725 spin_unlock_irq(&phba->hbalock);
6396bb22 1726 new_arr = kcalloc(new_len, sizeof(struct lpfc_iocbq *),
604a3e30
JB
1727 GFP_KERNEL);
1728 if (new_arr) {
2e0fef85 1729 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1730 old_arr = psli->iocbq_lookup;
1731 if (new_len <= psli->iocbq_lookup_len) {
1732 /* highly unprobable case */
1733 kfree(new_arr);
1734 iotag = psli->last_iotag;
1735 if(++iotag < psli->iocbq_lookup_len) {
1736 psli->last_iotag = iotag;
1737 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1738 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1739 iocbq->iotag = iotag;
1740 return iotag;
1741 }
2e0fef85 1742 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1743 return 0;
1744 }
1745 if (psli->iocbq_lookup)
1746 memcpy(new_arr, old_arr,
1747 ((psli->last_iotag + 1) *
311464ec 1748 sizeof (struct lpfc_iocbq *)));
604a3e30
JB
1749 psli->iocbq_lookup = new_arr;
1750 psli->iocbq_lookup_len = new_len;
1751 psli->last_iotag = iotag;
1752 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1753 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1754 iocbq->iotag = iotag;
1755 kfree(old_arr);
1756 return iotag;
1757 }
8f6d98d2 1758 } else
2e0fef85 1759 spin_unlock_irq(&phba->hbalock);
dea3101e 1760
bc73905a 1761 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
1762 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
1763 psli->last_iotag);
dea3101e 1764
604a3e30 1765 return 0;
dea3101e
JB
1766}
1767
e59058c4 1768/**
3621a710 1769 * lpfc_sli_submit_iocb - Submit an iocb to the firmware
e59058c4
JS
1770 * @phba: Pointer to HBA context object.
1771 * @pring: Pointer to driver SLI ring object.
1772 * @iocb: Pointer to iocb slot in the ring.
1773 * @nextiocb: Pointer to driver iocb object which need to be
1774 * posted to firmware.
1775 *
1776 * This function is called with hbalock held to post a new iocb to
1777 * the firmware. This function copies the new iocb to ring iocb slot and
1778 * updates the ring pointers. It adds the new iocb to txcmplq if there is
1779 * a completion call back for this iocb else the function will free the
1780 * iocb object.
1781 **/
dea3101e
JB
1782static void
1783lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1784 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
1785{
1c2ba475 1786 lockdep_assert_held(&phba->hbalock);
dea3101e 1787 /*
604a3e30 1788 * Set up an iotag
dea3101e 1789 */
604a3e30 1790 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 1791
e2a0a9d6 1792
a58cbd52
JS
1793 if (pring->ringno == LPFC_ELS_RING) {
1794 lpfc_debugfs_slow_ring_trc(phba,
1795 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1796 *(((uint32_t *) &nextiocb->iocb) + 4),
1797 *(((uint32_t *) &nextiocb->iocb) + 6),
1798 *(((uint32_t *) &nextiocb->iocb) + 7));
1799 }
1800
dea3101e
JB
1801 /*
1802 * Issue iocb command to adapter
1803 */
92d7f7b0 1804 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB
1805 wmb();
1806 pring->stats.iocb_cmd++;
1807
1808 /*
1809 * If there is no completion routine to call, we can release the
1810 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
1811 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
1812 */
1813 if (nextiocb->iocb_cmpl)
1814 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 1815 else
2e0fef85 1816 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB
1817
1818 /*
1819 * Let the HBA know what IOCB slot will be the next one the
1820 * driver will put a command into.
1821 */
7e56aa25
JS
1822 pring->sli.sli3.cmdidx = pring->sli.sli3.next_cmdidx;
1823 writel(pring->sli.sli3.cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB
1824}
1825
e59058c4 1826/**
3621a710 1827 * lpfc_sli_update_full_ring - Update the chip attention register
e59058c4
JS
1828 * @phba: Pointer to HBA context object.
1829 * @pring: Pointer to driver SLI ring object.
1830 *
1831 * The caller is not required to hold any lock for calling this function.
1832 * This function updates the chip attention bits for the ring to inform firmware
1833 * that there are pending work to be done for this ring and requests an
1834 * interrupt when there is space available in the ring. This function is
1835 * called when the driver is unable to post more iocbs to the ring due
1836 * to unavailability of space in the ring.
1837 **/
dea3101e 1838static void
2e0fef85 1839lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1840{
1841 int ringno = pring->ringno;
1842
1843 pring->flag |= LPFC_CALL_RING_AVAILABLE;
1844
1845 wmb();
1846
1847 /*
1848 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
1849 * The HBA will tell us when an IOCB entry is available.
1850 */
1851 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
1852 readl(phba->CAregaddr); /* flush */
1853
1854 pring->stats.iocb_cmd_full++;
1855}
1856
e59058c4 1857/**
3621a710 1858 * lpfc_sli_update_ring - Update chip attention register
e59058c4
JS
1859 * @phba: Pointer to HBA context object.
1860 * @pring: Pointer to driver SLI ring object.
1861 *
1862 * This function updates the chip attention register bit for the
1863 * given ring to inform HBA that there is more work to be done
1864 * in this ring. The caller is not required to hold any lock.
1865 **/
dea3101e 1866static void
2e0fef85 1867lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1868{
1869 int ringno = pring->ringno;
1870
1871 /*
1872 * Tell the HBA that there is work to do in this ring.
1873 */
34b02dcd
JS
1874 if (!(phba->sli3_options & LPFC_SLI3_CRP_ENABLED)) {
1875 wmb();
1876 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
1877 readl(phba->CAregaddr); /* flush */
1878 }
dea3101e
JB
1879}
1880
e59058c4 1881/**
3621a710 1882 * lpfc_sli_resume_iocb - Process iocbs in the txq
e59058c4
JS
1883 * @phba: Pointer to HBA context object.
1884 * @pring: Pointer to driver SLI ring object.
1885 *
1886 * This function is called with hbalock held to post pending iocbs
1887 * in the txq to the firmware. This function is called when driver
1888 * detects space available in the ring.
1889 **/
dea3101e 1890static void
2e0fef85 1891lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1892{
1893 IOCB_t *iocb;
1894 struct lpfc_iocbq *nextiocb;
1895
1c2ba475
JT
1896 lockdep_assert_held(&phba->hbalock);
1897
dea3101e
JB
1898 /*
1899 * Check to see if:
1900 * (a) there is anything on the txq to send
1901 * (b) link is up
1902 * (c) link attention events can be processed (fcp ring only)
1903 * (d) IOCB processing is not blocked by the outstanding mbox command.
1904 */
0e9bb8d7
JS
1905
1906 if (lpfc_is_link_up(phba) &&
1907 (!list_empty(&pring->txq)) &&
895427bd 1908 (pring->ringno != LPFC_FCP_RING ||
0b727fea 1909 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e
JB
1910
1911 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
1912 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
1913 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
1914
1915 if (iocb)
1916 lpfc_sli_update_ring(phba, pring);
1917 else
1918 lpfc_sli_update_full_ring(phba, pring);
1919 }
1920
1921 return;
1922}
1923
e59058c4 1924/**
3621a710 1925 * lpfc_sli_next_hbq_slot - Get next hbq entry for the HBQ
e59058c4
JS
1926 * @phba: Pointer to HBA context object.
1927 * @hbqno: HBQ number.
1928 *
1929 * This function is called with hbalock held to get the next
1930 * available slot for the given HBQ. If there is free slot
1931 * available for the HBQ it will return pointer to the next available
1932 * HBQ entry else it will return NULL.
1933 **/
a6ababd2 1934static struct lpfc_hbq_entry *
ed957684
JS
1935lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
1936{
1937 struct hbq_s *hbqp = &phba->hbqs[hbqno];
1938
1c2ba475
JT
1939 lockdep_assert_held(&phba->hbalock);
1940
ed957684
JS
1941 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
1942 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
1943 hbqp->next_hbqPutIdx = 0;
1944
1945 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 1946 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS
1947 uint32_t getidx = le32_to_cpu(raw_index);
1948
1949 hbqp->local_hbqGetIdx = getidx;
1950
1951 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
1952 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 1953 LOG_SLI | LOG_VPORT,
e8b62011 1954 "1802 HBQ %d: local_hbqGetIdx "
ed957684 1955 "%u is > than hbqp->entry_count %u\n",
e8b62011 1956 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS
1957 hbqp->entry_count);
1958
1959 phba->link_state = LPFC_HBA_ERROR;
1960 return NULL;
1961 }
1962
1963 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
1964 return NULL;
1965 }
1966
51ef4c26
JS
1967 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
1968 hbqp->hbqPutIdx;
ed957684
JS
1969}
1970
e59058c4 1971/**
3621a710 1972 * lpfc_sli_hbqbuf_free_all - Free all the hbq buffers
e59058c4
JS
1973 * @phba: Pointer to HBA context object.
1974 *
1975 * This function is called with no lock held to free all the
1976 * hbq buffers while uninitializing the SLI interface. It also
1977 * frees the HBQ buffers returned by the firmware but not yet
1978 * processed by the upper layers.
1979 **/
ed957684
JS
1980void
1981lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
1982{
92d7f7b0
JS
1983 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
1984 struct hbq_dmabuf *hbq_buf;
3163f725 1985 unsigned long flags;
51ef4c26 1986 int i, hbq_count;
ed957684 1987
51ef4c26 1988 hbq_count = lpfc_sli_hbq_count();
ed957684 1989 /* Return all memory used by all HBQs */
3163f725 1990 spin_lock_irqsave(&phba->hbalock, flags);
51ef4c26
JS
1991 for (i = 0; i < hbq_count; ++i) {
1992 list_for_each_entry_safe(dmabuf, next_dmabuf,
1993 &phba->hbqs[i].hbq_buffer_list, list) {
1994 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
1995 list_del(&hbq_buf->dbuf.list);
1996 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
1997 }
a8adb832 1998 phba->hbqs[i].buffer_count = 0;
ed957684 1999 }
3163f725
JS
2000
2001 /* Mark the HBQs not in use */
2002 phba->hbq_in_use = 0;
2003 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684
JS
2004}
2005
e59058c4 2006/**
3621a710 2007 * lpfc_sli_hbq_to_firmware - Post the hbq buffer to firmware
e59058c4
JS
2008 * @phba: Pointer to HBA context object.
2009 * @hbqno: HBQ number.
2010 * @hbq_buf: Pointer to HBQ buffer.
2011 *
2012 * This function is called with the hbalock held to post a
2013 * hbq buffer to the firmware. If the function finds an empty
2014 * slot in the HBQ, it will post the buffer. The function will return
2015 * pointer to the hbq entry if it successfully post the buffer
2016 * else it will return NULL.
2017 **/
3772a991 2018static int
ed957684 2019lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 2020 struct hbq_dmabuf *hbq_buf)
3772a991 2021{
1c2ba475 2022 lockdep_assert_held(&phba->hbalock);
3772a991
JS
2023 return phba->lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buf);
2024}
2025
2026/**
2027 * lpfc_sli_hbq_to_firmware_s3 - Post the hbq buffer to SLI3 firmware
2028 * @phba: Pointer to HBA context object.
2029 * @hbqno: HBQ number.
2030 * @hbq_buf: Pointer to HBQ buffer.
2031 *
2032 * This function is called with the hbalock held to post a hbq buffer to the
2033 * firmware. If the function finds an empty slot in the HBQ, it will post the
2034 * buffer and place it on the hbq_buffer_list. The function will return zero if
2035 * it successfully post the buffer else it will return an error.
2036 **/
2037static int
2038lpfc_sli_hbq_to_firmware_s3(struct lpfc_hba *phba, uint32_t hbqno,
2039 struct hbq_dmabuf *hbq_buf)
ed957684
JS
2040{
2041 struct lpfc_hbq_entry *hbqe;
92d7f7b0 2042 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684 2043
1c2ba475 2044 lockdep_assert_held(&phba->hbalock);
ed957684
JS
2045 /* Get next HBQ entry slot to use */
2046 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
2047 if (hbqe) {
2048 struct hbq_s *hbqp = &phba->hbqs[hbqno];
2049
92d7f7b0
JS
2050 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
2051 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
895427bd 2052 hbqe->bde.tus.f.bdeSize = hbq_buf->total_size;
ed957684 2053 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS
2054 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
2055 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
2056 /* Sync SLIM */
ed957684
JS
2057 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
2058 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 2059 /* flush */
ed957684 2060 readl(phba->hbq_put + hbqno);
51ef4c26 2061 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
3772a991
JS
2062 return 0;
2063 } else
2064 return -ENOMEM;
ed957684
JS
2065}
2066
4f774513
JS
2067/**
2068 * lpfc_sli_hbq_to_firmware_s4 - Post the hbq buffer to SLI4 firmware
2069 * @phba: Pointer to HBA context object.
2070 * @hbqno: HBQ number.
2071 * @hbq_buf: Pointer to HBQ buffer.
2072 *
2073 * This function is called with the hbalock held to post an RQE to the SLI4
2074 * firmware. If able to post the RQE to the RQ it will queue the hbq entry to
2075 * the hbq_buffer_list and return zero, otherwise it will return an error.
2076 **/
2077static int
2078lpfc_sli_hbq_to_firmware_s4(struct lpfc_hba *phba, uint32_t hbqno,
2079 struct hbq_dmabuf *hbq_buf)
2080{
2081 int rc;
2082 struct lpfc_rqe hrqe;
2083 struct lpfc_rqe drqe;
895427bd
JS
2084 struct lpfc_queue *hrq;
2085 struct lpfc_queue *drq;
2086
2087 if (hbqno != LPFC_ELS_HBQ)
2088 return 1;
2089 hrq = phba->sli4_hba.hdr_rq;
2090 drq = phba->sli4_hba.dat_rq;
4f774513 2091
1c2ba475 2092 lockdep_assert_held(&phba->hbalock);
4f774513
JS
2093 hrqe.address_lo = putPaddrLow(hbq_buf->hbuf.phys);
2094 hrqe.address_hi = putPaddrHigh(hbq_buf->hbuf.phys);
2095 drqe.address_lo = putPaddrLow(hbq_buf->dbuf.phys);
2096 drqe.address_hi = putPaddrHigh(hbq_buf->dbuf.phys);
895427bd 2097 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
4f774513
JS
2098 if (rc < 0)
2099 return rc;
895427bd 2100 hbq_buf->tag = (rc | (hbqno << 16));
4f774513
JS
2101 list_add_tail(&hbq_buf->dbuf.list, &phba->hbqs[hbqno].hbq_buffer_list);
2102 return 0;
2103}
2104
e59058c4 2105/* HBQ for ELS and CT traffic. */
92d7f7b0
JS
2106static struct lpfc_hbq_init lpfc_els_hbq = {
2107 .rn = 1,
def9c7a9 2108 .entry_count = 256,
92d7f7b0
JS
2109 .mask_count = 0,
2110 .profile = 0,
51ef4c26 2111 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0 2112 .buffer_count = 0,
a257bf90
JS
2113 .init_count = 40,
2114 .add_count = 40,
92d7f7b0 2115};
ed957684 2116
e59058c4 2117/* Array of HBQs */
78b2d852 2118struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0
JS
2119 &lpfc_els_hbq,
2120};
ed957684 2121
e59058c4 2122/**
3621a710 2123 * lpfc_sli_hbqbuf_fill_hbqs - Post more hbq buffers to HBQ
e59058c4
JS
2124 * @phba: Pointer to HBA context object.
2125 * @hbqno: HBQ number.
2126 * @count: Number of HBQ buffers to be posted.
2127 *
d7c255b2
JS
2128 * This function is called with no lock held to post more hbq buffers to the
2129 * given HBQ. The function returns the number of HBQ buffers successfully
2130 * posted.
e59058c4 2131 **/
311464ec 2132static int
92d7f7b0 2133lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 2134{
d7c255b2 2135 uint32_t i, posted = 0;
3163f725 2136 unsigned long flags;
92d7f7b0 2137 struct hbq_dmabuf *hbq_buffer;
d7c255b2 2138 LIST_HEAD(hbq_buf_list);
eafe1df9 2139 if (!phba->hbqs[hbqno].hbq_alloc_buffer)
51ef4c26 2140 return 0;
51ef4c26 2141
d7c255b2
JS
2142 if ((phba->hbqs[hbqno].buffer_count + count) >
2143 lpfc_hbq_defs[hbqno]->entry_count)
2144 count = lpfc_hbq_defs[hbqno]->entry_count -
2145 phba->hbqs[hbqno].buffer_count;
2146 if (!count)
2147 return 0;
2148 /* Allocate HBQ entries */
2149 for (i = 0; i < count; i++) {
2150 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
2151 if (!hbq_buffer)
2152 break;
2153 list_add_tail(&hbq_buffer->dbuf.list, &hbq_buf_list);
2154 }
3163f725
JS
2155 /* Check whether HBQ is still in use */
2156 spin_lock_irqsave(&phba->hbalock, flags);
eafe1df9 2157 if (!phba->hbq_in_use)
d7c255b2
JS
2158 goto err;
2159 while (!list_empty(&hbq_buf_list)) {
2160 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2161 dbuf.list);
2162 hbq_buffer->tag = (phba->hbqs[hbqno].buffer_count |
2163 (hbqno << 16));
3772a991 2164 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
a8adb832 2165 phba->hbqs[hbqno].buffer_count++;
d7c255b2
JS
2166 posted++;
2167 } else
51ef4c26 2168 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684 2169 }
3163f725 2170 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2171 return posted;
2172err:
eafe1df9 2173 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2174 while (!list_empty(&hbq_buf_list)) {
2175 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2176 dbuf.list);
2177 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
2178 }
2179 return 0;
ed957684
JS
2180}
2181
e59058c4 2182/**
3621a710 2183 * lpfc_sli_hbqbuf_add_hbqs - Post more HBQ buffers to firmware
e59058c4
JS
2184 * @phba: Pointer to HBA context object.
2185 * @qno: HBQ number.
2186 *
2187 * This function posts more buffers to the HBQ. This function
d7c255b2
JS
2188 * is called with no lock held. The function returns the number of HBQ entries
2189 * successfully allocated.
e59058c4 2190 **/
92d7f7b0
JS
2191int
2192lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 2193{
def9c7a9
JS
2194 if (phba->sli_rev == LPFC_SLI_REV4)
2195 return 0;
2196 else
2197 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2198 lpfc_hbq_defs[qno]->add_count);
92d7f7b0 2199}
ed957684 2200
e59058c4 2201/**
3621a710 2202 * lpfc_sli_hbqbuf_init_hbqs - Post initial buffers to the HBQ
e59058c4
JS
2203 * @phba: Pointer to HBA context object.
2204 * @qno: HBQ queue number.
2205 *
2206 * This function is called from SLI initialization code path with
2207 * no lock held to post initial HBQ buffers to firmware. The
d7c255b2 2208 * function returns the number of HBQ entries successfully allocated.
e59058c4 2209 **/
a6ababd2 2210static int
92d7f7b0
JS
2211lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
2212{
def9c7a9
JS
2213 if (phba->sli_rev == LPFC_SLI_REV4)
2214 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
73d91e50 2215 lpfc_hbq_defs[qno]->entry_count);
def9c7a9
JS
2216 else
2217 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2218 lpfc_hbq_defs[qno]->init_count);
ed957684
JS
2219}
2220
3772a991
JS
2221/**
2222 * lpfc_sli_hbqbuf_get - Remove the first hbq off of an hbq list
2223 * @phba: Pointer to HBA context object.
2224 * @hbqno: HBQ number.
2225 *
2226 * This function removes the first hbq buffer on an hbq list and returns a
2227 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2228 **/
2229static struct hbq_dmabuf *
2230lpfc_sli_hbqbuf_get(struct list_head *rb_list)
2231{
2232 struct lpfc_dmabuf *d_buf;
2233
2234 list_remove_head(rb_list, d_buf, struct lpfc_dmabuf, list);
2235 if (!d_buf)
2236 return NULL;
2237 return container_of(d_buf, struct hbq_dmabuf, dbuf);
2238}
2239
2d7dbc4c
JS
2240/**
2241 * lpfc_sli_rqbuf_get - Remove the first dma buffer off of an RQ list
2242 * @phba: Pointer to HBA context object.
2243 * @hbqno: HBQ number.
2244 *
2245 * This function removes the first RQ buffer on an RQ buffer list and returns a
2246 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2247 **/
2248static struct rqb_dmabuf *
2249lpfc_sli_rqbuf_get(struct lpfc_hba *phba, struct lpfc_queue *hrq)
2250{
2251 struct lpfc_dmabuf *h_buf;
2252 struct lpfc_rqb *rqbp;
2253
2254 rqbp = hrq->rqbp;
2255 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
2256 struct lpfc_dmabuf, list);
2257 if (!h_buf)
2258 return NULL;
2259 rqbp->buffer_count--;
2260 return container_of(h_buf, struct rqb_dmabuf, hbuf);
2261}
2262
e59058c4 2263/**
3621a710 2264 * lpfc_sli_hbqbuf_find - Find the hbq buffer associated with a tag
e59058c4
JS
2265 * @phba: Pointer to HBA context object.
2266 * @tag: Tag of the hbq buffer.
2267 *
71892418
SH
2268 * This function searches for the hbq buffer associated with the given tag in
2269 * the hbq buffer list. If it finds the hbq buffer, it returns the hbq_buffer
2270 * otherwise it returns NULL.
e59058c4 2271 **/
a6ababd2 2272static struct hbq_dmabuf *
92d7f7b0 2273lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 2274{
92d7f7b0
JS
2275 struct lpfc_dmabuf *d_buf;
2276 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS
2277 uint32_t hbqno;
2278
2279 hbqno = tag >> 16;
a0a74e45 2280 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 2281 return NULL;
ed957684 2282
3772a991 2283 spin_lock_irq(&phba->hbalock);
51ef4c26 2284 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 2285 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 2286 if (hbq_buf->tag == tag) {
3772a991 2287 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2288 return hbq_buf;
ed957684
JS
2289 }
2290 }
3772a991 2291 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2292 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 2293 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 2294 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 2295 return NULL;
ed957684
JS
2296}
2297
e59058c4 2298/**
3621a710 2299 * lpfc_sli_free_hbq - Give back the hbq buffer to firmware
e59058c4
JS
2300 * @phba: Pointer to HBA context object.
2301 * @hbq_buffer: Pointer to HBQ buffer.
2302 *
2303 * This function is called with hbalock. This function gives back
2304 * the hbq buffer to firmware. If the HBQ does not have space to
2305 * post the buffer, it will free the buffer.
2306 **/
ed957684 2307void
51ef4c26 2308lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS
2309{
2310 uint32_t hbqno;
2311
51ef4c26
JS
2312 if (hbq_buffer) {
2313 hbqno = hbq_buffer->tag >> 16;
3772a991 2314 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
51ef4c26 2315 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS
2316 }
2317}
2318
e59058c4 2319/**
3621a710 2320 * lpfc_sli_chk_mbx_command - Check if the mailbox is a legitimate mailbox
e59058c4
JS
2321 * @mbxCommand: mailbox command code.
2322 *
2323 * This function is called by the mailbox event handler function to verify
2324 * that the completed mailbox command is a legitimate mailbox command. If the
2325 * completed mailbox is not known to the function, it will return MBX_SHUTDOWN
2326 * and the mailbox event handler will take the HBA offline.
2327 **/
dea3101e
JB
2328static int
2329lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
2330{
2331 uint8_t ret;
2332
2333 switch (mbxCommand) {
2334 case MBX_LOAD_SM:
2335 case MBX_READ_NV:
2336 case MBX_WRITE_NV:
a8adb832 2337 case MBX_WRITE_VPARMS:
dea3101e
JB
2338 case MBX_RUN_BIU_DIAG:
2339 case MBX_INIT_LINK:
2340 case MBX_DOWN_LINK:
2341 case MBX_CONFIG_LINK:
2342 case MBX_CONFIG_RING:
2343 case MBX_RESET_RING:
2344 case MBX_READ_CONFIG:
2345 case MBX_READ_RCONFIG:
2346 case MBX_READ_SPARM:
2347 case MBX_READ_STATUS:
2348 case MBX_READ_RPI:
2349 case MBX_READ_XRI:
2350 case MBX_READ_REV:
2351 case MBX_READ_LNK_STAT:
2352 case MBX_REG_LOGIN:
2353 case MBX_UNREG_LOGIN:
dea3101e
JB
2354 case MBX_CLEAR_LA:
2355 case MBX_DUMP_MEMORY:
2356 case MBX_DUMP_CONTEXT:
2357 case MBX_RUN_DIAGS:
2358 case MBX_RESTART:
2359 case MBX_UPDATE_CFG:
2360 case MBX_DOWN_LOAD:
2361 case MBX_DEL_LD_ENTRY:
2362 case MBX_RUN_PROGRAM:
2363 case MBX_SET_MASK:
09372820 2364 case MBX_SET_VARIABLE:
dea3101e 2365 case MBX_UNREG_D_ID:
41415862 2366 case MBX_KILL_BOARD:
dea3101e 2367 case MBX_CONFIG_FARP:
41415862 2368 case MBX_BEACON:
dea3101e
JB
2369 case MBX_LOAD_AREA:
2370 case MBX_RUN_BIU_DIAG64:
2371 case MBX_CONFIG_PORT:
2372 case MBX_READ_SPARM64:
2373 case MBX_READ_RPI64:
2374 case MBX_REG_LOGIN64:
76a95d75 2375 case MBX_READ_TOPOLOGY:
09372820 2376 case MBX_WRITE_WWN:
dea3101e
JB
2377 case MBX_SET_DEBUG:
2378 case MBX_LOAD_EXP_ROM:
57127f15 2379 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS
2380 case MBX_REG_VPI:
2381 case MBX_UNREG_VPI:
858c9f6c 2382 case MBX_HEARTBEAT:
84774a4d
JS
2383 case MBX_PORT_CAPABILITIES:
2384 case MBX_PORT_IOV_CONTROL:
04c68496
JS
2385 case MBX_SLI4_CONFIG:
2386 case MBX_SLI4_REQ_FTRS:
2387 case MBX_REG_FCFI:
2388 case MBX_UNREG_FCFI:
2389 case MBX_REG_VFI:
2390 case MBX_UNREG_VFI:
2391 case MBX_INIT_VPI:
2392 case MBX_INIT_VFI:
2393 case MBX_RESUME_RPI:
c7495937
JS
2394 case MBX_READ_EVENT_LOG_STATUS:
2395 case MBX_READ_EVENT_LOG:
dcf2a4e0
JS
2396 case MBX_SECURITY_MGMT:
2397 case MBX_AUTH_PORT:
940eb687 2398 case MBX_ACCESS_VDATA:
dea3101e
JB
2399 ret = mbxCommand;
2400 break;
2401 default:
2402 ret = MBX_SHUTDOWN;
2403 break;
2404 }
2e0fef85 2405 return ret;
dea3101e 2406}
e59058c4
JS
2407
2408/**
3621a710 2409 * lpfc_sli_wake_mbox_wait - lpfc_sli_issue_mbox_wait mbox completion handler
e59058c4
JS
2410 * @phba: Pointer to HBA context object.
2411 * @pmboxq: Pointer to mailbox command.
2412 *
2413 * This is completion handler function for mailbox commands issued from
2414 * lpfc_sli_issue_mbox_wait function. This function is called by the
2415 * mailbox event handler function with no lock held. This function
2416 * will wake up thread waiting on the wait queue pointed by context1
2417 * of the mailbox.
2418 **/
04c68496 2419void
2e0fef85 2420lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e 2421{
858c9f6c 2422 unsigned long drvr_flag;
e29d74f8 2423 struct completion *pmbox_done;
dea3101e
JB
2424
2425 /*
e29d74f8 2426 * If pmbox_done is empty, the driver thread gave up waiting and
dea3101e
JB
2427 * continued running.
2428 */
7054a606 2429 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 2430 spin_lock_irqsave(&phba->hbalock, drvr_flag);
e29d74f8
JS
2431 pmbox_done = (struct completion *)pmboxq->context3;
2432 if (pmbox_done)
2433 complete(pmbox_done);
858c9f6c 2434 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
2435 return;
2436}
2437
e59058c4
JS
2438
2439/**
3621a710 2440 * lpfc_sli_def_mbox_cmpl - Default mailbox completion handler
e59058c4
JS
2441 * @phba: Pointer to HBA context object.
2442 * @pmb: Pointer to mailbox object.
2443 *
2444 * This function is the default mailbox completion handler. It
2445 * frees the memory resources associated with the completed mailbox
2446 * command. If the completed command is a REG_LOGIN mailbox command,
2447 * this function will issue a UREG_LOGIN to re-claim the RPI.
2448 **/
dea3101e 2449void
2e0fef85 2450lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e 2451{
d439d286 2452 struct lpfc_vport *vport = pmb->vport;
dea3101e 2453 struct lpfc_dmabuf *mp;
d439d286 2454 struct lpfc_nodelist *ndlp;
5af5eee7 2455 struct Scsi_Host *shost;
04c68496 2456 uint16_t rpi, vpi;
7054a606
JS
2457 int rc;
2458
3e1f0718 2459 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
7054a606 2460
dea3101e
JB
2461 if (mp) {
2462 lpfc_mbuf_free(phba, mp->virt, mp->phys);
2463 kfree(mp);
2464 }
7054a606
JS
2465
2466 /*
2467 * If a REG_LOGIN succeeded after node is destroyed or node
2468 * is in re-discovery driver need to cleanup the RPI.
2469 */
2e0fef85 2470 if (!(phba->pport->load_flag & FC_UNLOADING) &&
04c68496
JS
2471 pmb->u.mb.mbxCommand == MBX_REG_LOGIN64 &&
2472 !pmb->u.mb.mbxStatus) {
2473 rpi = pmb->u.mb.un.varWords[0];
6d368e53 2474 vpi = pmb->u.mb.un.varRegLogin.vpi;
04c68496 2475 lpfc_unreg_login(phba, vpi, rpi, pmb);
de96e9c5 2476 pmb->vport = vport;
92d7f7b0 2477 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS
2478 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2479 if (rc != MBX_NOT_FINISHED)
2480 return;
2481 }
2482
695a814e
JS
2483 if ((pmb->u.mb.mbxCommand == MBX_REG_VPI) &&
2484 !(phba->pport->load_flag & FC_UNLOADING) &&
2485 !pmb->u.mb.mbxStatus) {
5af5eee7
JS
2486 shost = lpfc_shost_from_vport(vport);
2487 spin_lock_irq(shost->host_lock);
2488 vport->vpi_state |= LPFC_VPI_REGISTERED;
2489 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI;
2490 spin_unlock_irq(shost->host_lock);
695a814e
JS
2491 }
2492
d439d286 2493 if (pmb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 2494 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
d439d286 2495 lpfc_nlp_put(ndlp);
dea16bda
JS
2496 pmb->ctx_buf = NULL;
2497 pmb->ctx_ndlp = NULL;
2498 }
2499
2500 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2501 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
2502
2503 /* Check to see if there are any deferred events to process */
2504 if (ndlp) {
2505 lpfc_printf_vlog(
2506 vport,
2507 KERN_INFO, LOG_MBOX | LOG_DISCOVERY,
2508 "1438 UNREG cmpl deferred mbox x%x "
2509 "on NPort x%x Data: x%x x%x %p\n",
2510 ndlp->nlp_rpi, ndlp->nlp_DID,
2511 ndlp->nlp_flag, ndlp->nlp_defer_did, ndlp);
2512
2513 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2514 (ndlp->nlp_defer_did != NLP_EVT_NOTHING_PENDING)) {
00292e03 2515 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2516 ndlp->nlp_defer_did = NLP_EVT_NOTHING_PENDING;
2517 lpfc_issue_els_plogi(vport, ndlp->nlp_DID, 0);
00292e03
JS
2518 } else {
2519 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda 2520 }
dea16bda 2521 }
3e1f0718 2522 pmb->ctx_ndlp = NULL;
d439d286
JS
2523 }
2524
dcf2a4e0
JS
2525 /* Check security permission status on INIT_LINK mailbox command */
2526 if ((pmb->u.mb.mbxCommand == MBX_INIT_LINK) &&
2527 (pmb->u.mb.mbxStatus == MBXERR_SEC_NO_PERMISSION))
2528 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
2529 "2860 SLI authentication is required "
2530 "for INIT_LINK but has not done yet\n");
2531
04c68496
JS
2532 if (bf_get(lpfc_mqe_command, &pmb->u.mqe) == MBX_SLI4_CONFIG)
2533 lpfc_sli4_mbox_cmd_free(phba, pmb);
2534 else
2535 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2536}
be6bb941
JS
2537 /**
2538 * lpfc_sli4_unreg_rpi_cmpl_clr - mailbox completion handler
2539 * @phba: Pointer to HBA context object.
2540 * @pmb: Pointer to mailbox object.
2541 *
2542 * This function is the unreg rpi mailbox completion handler. It
2543 * frees the memory resources associated with the completed mailbox
2544 * command. An additional refrenece is put on the ndlp to prevent
2545 * lpfc_nlp_release from freeing the rpi bit in the bitmask before
2546 * the unreg mailbox command completes, this routine puts the
2547 * reference back.
2548 *
2549 **/
2550void
2551lpfc_sli4_unreg_rpi_cmpl_clr(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2552{
2553 struct lpfc_vport *vport = pmb->vport;
2554 struct lpfc_nodelist *ndlp;
2555
3e1f0718 2556 ndlp = pmb->ctx_ndlp;
be6bb941
JS
2557 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2558 if (phba->sli_rev == LPFC_SLI_REV4 &&
2559 (bf_get(lpfc_sli_intf_if_type,
27d6ac0a 2560 &phba->sli4_hba.sli_intf) >=
be6bb941
JS
2561 LPFC_SLI_INTF_IF_TYPE_2)) {
2562 if (ndlp) {
dea16bda
JS
2563 lpfc_printf_vlog(
2564 vport, KERN_INFO, LOG_MBOX | LOG_SLI,
2565 "0010 UNREG_LOGIN vpi:%x "
2566 "rpi:%x DID:%x defer x%x flg x%x "
2567 "map:%x %p\n",
2568 vport->vpi, ndlp->nlp_rpi,
2569 ndlp->nlp_DID, ndlp->nlp_defer_did,
2570 ndlp->nlp_flag,
2571 ndlp->nlp_usg_map, ndlp);
7c5e518c 2572 ndlp->nlp_flag &= ~NLP_LOGO_ACC;
be6bb941 2573 lpfc_nlp_put(ndlp);
dea16bda
JS
2574
2575 /* Check to see if there are any deferred
2576 * events to process
2577 */
2578 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2579 (ndlp->nlp_defer_did !=
2580 NLP_EVT_NOTHING_PENDING)) {
2581 lpfc_printf_vlog(
2582 vport, KERN_INFO, LOG_DISCOVERY,
2583 "4111 UNREG cmpl deferred "
2584 "clr x%x on "
2585 "NPort x%x Data: x%x %p\n",
2586 ndlp->nlp_rpi, ndlp->nlp_DID,
2587 ndlp->nlp_defer_did, ndlp);
00292e03 2588 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2589 ndlp->nlp_defer_did =
2590 NLP_EVT_NOTHING_PENDING;
2591 lpfc_issue_els_plogi(
2592 vport, ndlp->nlp_DID, 0);
00292e03
JS
2593 } else {
2594 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda 2595 }
be6bb941
JS
2596 }
2597 }
2598 }
2599
2600 mempool_free(pmb, phba->mbox_mem_pool);
2601}
dea3101e 2602
e59058c4 2603/**
3621a710 2604 * lpfc_sli_handle_mb_event - Handle mailbox completions from firmware
e59058c4
JS
2605 * @phba: Pointer to HBA context object.
2606 *
2607 * This function is called with no lock held. This function processes all
2608 * the completed mailbox commands and gives it to upper layers. The interrupt
2609 * service routine processes mailbox completion interrupt and adds completed
2610 * mailbox commands to the mboxq_cmpl queue and signals the worker thread.
2611 * Worker thread call lpfc_sli_handle_mb_event, which will return the
2612 * completed mailbox commands in mboxq_cmpl queue to the upper layers. This
2613 * function returns the mailbox commands to the upper layer by calling the
2614 * completion handler function of each mailbox.
2615 **/
dea3101e 2616int
2e0fef85 2617lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 2618{
92d7f7b0 2619 MAILBOX_t *pmbox;
dea3101e 2620 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS
2621 int rc;
2622 LIST_HEAD(cmplq);
dea3101e
JB
2623
2624 phba->sli.slistat.mbox_event++;
2625
92d7f7b0
JS
2626 /* Get all completed mailboxe buffers into the cmplq */
2627 spin_lock_irq(&phba->hbalock);
2628 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
2629 spin_unlock_irq(&phba->hbalock);
dea3101e 2630
92d7f7b0
JS
2631 /* Get a Mailbox buffer to setup mailbox commands for callback */
2632 do {
2633 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
2634 if (pmb == NULL)
2635 break;
2e0fef85 2636
04c68496 2637 pmbox = &pmb->u.mb;
dea3101e 2638
858c9f6c
JS
2639 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
2640 if (pmb->vport) {
2641 lpfc_debugfs_disc_trc(pmb->vport,
2642 LPFC_DISC_TRC_MBOX_VPORT,
2643 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
2644 (uint32_t)pmbox->mbxCommand,
2645 pmbox->un.varWords[0],
2646 pmbox->un.varWords[1]);
2647 }
2648 else {
2649 lpfc_debugfs_disc_trc(phba->pport,
2650 LPFC_DISC_TRC_MBOX,
2651 "MBOX cmpl: cmd:x%x mb:x%x x%x",
2652 (uint32_t)pmbox->mbxCommand,
2653 pmbox->un.varWords[0],
2654 pmbox->un.varWords[1]);
2655 }
2656 }
2657
dea3101e
JB
2658 /*
2659 * It is a fatal error if unknown mbox command completion.
2660 */
2661 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
2662 MBX_SHUTDOWN) {
af901ca1 2663 /* Unknown mailbox command compl */
92d7f7b0 2664 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2665 "(%d):0323 Unknown Mailbox command "
a183a15f 2666 "x%x (x%x/x%x) Cmpl\n",
92d7f7b0 2667 pmb->vport ? pmb->vport->vpi : 0,
04c68496 2668 pmbox->mbxCommand,
a183a15f
JS
2669 lpfc_sli_config_mbox_subsys_get(phba,
2670 pmb),
2671 lpfc_sli_config_mbox_opcode_get(phba,
2672 pmb));
2e0fef85 2673 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
2674 phba->work_hs = HS_FFER3;
2675 lpfc_handle_eratt(phba);
92d7f7b0 2676 continue;
dea3101e
JB
2677 }
2678
dea3101e
JB
2679 if (pmbox->mbxStatus) {
2680 phba->sli.slistat.mbox_stat_err++;
2681 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
2682 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0 2683 lpfc_printf_log(phba, KERN_INFO,
a183a15f
JS
2684 LOG_MBOX | LOG_SLI,
2685 "(%d):0305 Mbox cmd cmpl "
2686 "error - RETRYing Data: x%x "
2687 "(x%x/x%x) x%x x%x x%x\n",
2688 pmb->vport ? pmb->vport->vpi : 0,
2689 pmbox->mbxCommand,
2690 lpfc_sli_config_mbox_subsys_get(phba,
2691 pmb),
2692 lpfc_sli_config_mbox_opcode_get(phba,
2693 pmb),
2694 pmbox->mbxStatus,
2695 pmbox->un.varWords[0],
2696 pmb->vport->port_state);
dea3101e
JB
2697 pmbox->mbxStatus = 0;
2698 pmbox->mbxOwner = OWN_HOST;
dea3101e 2699 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
04c68496 2700 if (rc != MBX_NOT_FINISHED)
92d7f7b0 2701 continue;
dea3101e
JB
2702 }
2703 }
2704
2705 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 2706 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 2707 "(%d):0307 Mailbox cmd x%x (x%x/x%x) Cmpl x%p "
e74c03c8
JS
2708 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
2709 "x%x x%x x%x\n",
92d7f7b0 2710 pmb->vport ? pmb->vport->vpi : 0,
dea3101e 2711 pmbox->mbxCommand,
a183a15f
JS
2712 lpfc_sli_config_mbox_subsys_get(phba, pmb),
2713 lpfc_sli_config_mbox_opcode_get(phba, pmb),
dea3101e
JB
2714 pmb->mbox_cmpl,
2715 *((uint32_t *) pmbox),
2716 pmbox->un.varWords[0],
2717 pmbox->un.varWords[1],
2718 pmbox->un.varWords[2],
2719 pmbox->un.varWords[3],
2720 pmbox->un.varWords[4],
2721 pmbox->un.varWords[5],
2722 pmbox->un.varWords[6],
e74c03c8
JS
2723 pmbox->un.varWords[7],
2724 pmbox->un.varWords[8],
2725 pmbox->un.varWords[9],
2726 pmbox->un.varWords[10]);
dea3101e 2727
92d7f7b0 2728 if (pmb->mbox_cmpl)
dea3101e 2729 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS
2730 } while (1);
2731 return 0;
2732}
dea3101e 2733
e59058c4 2734/**
3621a710 2735 * lpfc_sli_get_buff - Get the buffer associated with the buffer tag
e59058c4
JS
2736 * @phba: Pointer to HBA context object.
2737 * @pring: Pointer to driver SLI ring object.
2738 * @tag: buffer tag.
2739 *
2740 * This function is called with no lock held. When QUE_BUFTAG_BIT bit
2741 * is set in the tag the buffer is posted for a particular exchange,
2742 * the function will return the buffer without replacing the buffer.
2743 * If the buffer is for unsolicited ELS or CT traffic, this function
2744 * returns the buffer and also posts another buffer to the firmware.
2745 **/
76bb24ef
JS
2746static struct lpfc_dmabuf *
2747lpfc_sli_get_buff(struct lpfc_hba *phba,
9f1e1b50
JS
2748 struct lpfc_sli_ring *pring,
2749 uint32_t tag)
76bb24ef 2750{
9f1e1b50
JS
2751 struct hbq_dmabuf *hbq_entry;
2752
76bb24ef
JS
2753 if (tag & QUE_BUFTAG_BIT)
2754 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
9f1e1b50
JS
2755 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
2756 if (!hbq_entry)
2757 return NULL;
2758 return &hbq_entry->dbuf;
76bb24ef 2759}
57127f15 2760
3772a991
JS
2761/**
2762 * lpfc_complete_unsol_iocb - Complete an unsolicited sequence
2763 * @phba: Pointer to HBA context object.
2764 * @pring: Pointer to driver SLI ring object.
2765 * @saveq: Pointer to the iocbq struct representing the sequence starting frame.
2766 * @fch_r_ctl: the r_ctl for the first frame of the sequence.
2767 * @fch_type: the type for the first frame of the sequence.
2768 *
2769 * This function is called with no lock held. This function uses the r_ctl and
2770 * type of the received sequence to find the correct callback function to call
2771 * to process the sequence.
2772 **/
2773static int
2774lpfc_complete_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2775 struct lpfc_iocbq *saveq, uint32_t fch_r_ctl,
2776 uint32_t fch_type)
2777{
2778 int i;
2779
f358dd0c
JS
2780 switch (fch_type) {
2781 case FC_TYPE_NVME:
d613b6a7 2782 lpfc_nvmet_unsol_ls_event(phba, pring, saveq);
f358dd0c
JS
2783 return 1;
2784 default:
2785 break;
2786 }
2787
3772a991
JS
2788 /* unSolicited Responses */
2789 if (pring->prt[0].profile) {
2790 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
2791 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
2792 saveq);
2793 return 1;
2794 }
2795 /* We must search, based on rctl / type
2796 for the right routine */
2797 for (i = 0; i < pring->num_mask; i++) {
2798 if ((pring->prt[i].rctl == fch_r_ctl) &&
2799 (pring->prt[i].type == fch_type)) {
2800 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
2801 (pring->prt[i].lpfc_sli_rcv_unsol_event)
2802 (phba, pring, saveq);
2803 return 1;
2804 }
2805 }
2806 return 0;
2807}
e59058c4
JS
2808
2809/**
3621a710 2810 * lpfc_sli_process_unsol_iocb - Unsolicited iocb handler
e59058c4
JS
2811 * @phba: Pointer to HBA context object.
2812 * @pring: Pointer to driver SLI ring object.
2813 * @saveq: Pointer to the unsolicited iocb.
2814 *
2815 * This function is called with no lock held by the ring event handler
2816 * when there is an unsolicited iocb posted to the response ring by the
2817 * firmware. This function gets the buffer associated with the iocbs
2818 * and calls the event handler for the ring. This function handles both
2819 * qring buffers and hbq buffers.
2820 * When the function returns 1 the caller can free the iocb object otherwise
2821 * upper layer functions will free the iocb objects.
2822 **/
dea3101e
JB
2823static int
2824lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2825 struct lpfc_iocbq *saveq)
2826{
2827 IOCB_t * irsp;
2828 WORD5 * w5p;
2829 uint32_t Rctl, Type;
76bb24ef 2830 struct lpfc_iocbq *iocbq;
3163f725 2831 struct lpfc_dmabuf *dmzbuf;
dea3101e 2832
dea3101e 2833 irsp = &(saveq->iocb);
57127f15
JS
2834
2835 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
2836 if (pring->lpfc_sli_rcv_async_status)
2837 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
2838 else
2839 lpfc_printf_log(phba,
2840 KERN_WARNING,
2841 LOG_SLI,
2842 "0316 Ring %d handler: unexpected "
2843 "ASYNC_STATUS iocb received evt_code "
2844 "0x%x\n",
2845 pring->ringno,
2846 irsp->un.asyncstat.evt_code);
2847 return 1;
2848 }
2849
3163f725
JS
2850 if ((irsp->ulpCommand == CMD_IOCB_RET_XRI64_CX) &&
2851 (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)) {
2852 if (irsp->ulpBdeCount > 0) {
2853 dmzbuf = lpfc_sli_get_buff(phba, pring,
2854 irsp->un.ulpWord[3]);
2855 lpfc_in_buf_free(phba, dmzbuf);
2856 }
2857
2858 if (irsp->ulpBdeCount > 1) {
2859 dmzbuf = lpfc_sli_get_buff(phba, pring,
2860 irsp->unsli3.sli3Words[3]);
2861 lpfc_in_buf_free(phba, dmzbuf);
2862 }
2863
2864 if (irsp->ulpBdeCount > 2) {
2865 dmzbuf = lpfc_sli_get_buff(phba, pring,
2866 irsp->unsli3.sli3Words[7]);
2867 lpfc_in_buf_free(phba, dmzbuf);
2868 }
2869
2870 return 1;
2871 }
2872
92d7f7b0 2873 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS
2874 if (irsp->ulpBdeCount != 0) {
2875 saveq->context2 = lpfc_sli_get_buff(phba, pring,
2876 irsp->un.ulpWord[3]);
2877 if (!saveq->context2)
2878 lpfc_printf_log(phba,
2879 KERN_ERR,
2880 LOG_SLI,
2881 "0341 Ring %d Cannot find buffer for "
2882 "an unsolicited iocb. tag 0x%x\n",
2883 pring->ringno,
2884 irsp->un.ulpWord[3]);
76bb24ef
JS
2885 }
2886 if (irsp->ulpBdeCount == 2) {
2887 saveq->context3 = lpfc_sli_get_buff(phba, pring,
2888 irsp->unsli3.sli3Words[7]);
2889 if (!saveq->context3)
2890 lpfc_printf_log(phba,
2891 KERN_ERR,
2892 LOG_SLI,
2893 "0342 Ring %d Cannot find buffer for an"
2894 " unsolicited iocb. tag 0x%x\n",
2895 pring->ringno,
2896 irsp->unsli3.sli3Words[7]);
2897 }
2898 list_for_each_entry(iocbq, &saveq->list, list) {
76bb24ef 2899 irsp = &(iocbq->iocb);
76bb24ef
JS
2900 if (irsp->ulpBdeCount != 0) {
2901 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
2902 irsp->un.ulpWord[3]);
9c2face6 2903 if (!iocbq->context2)
76bb24ef
JS
2904 lpfc_printf_log(phba,
2905 KERN_ERR,
2906 LOG_SLI,
2907 "0343 Ring %d Cannot find "
2908 "buffer for an unsolicited iocb"
2909 ". tag 0x%x\n", pring->ringno,
92d7f7b0 2910 irsp->un.ulpWord[3]);
76bb24ef
JS
2911 }
2912 if (irsp->ulpBdeCount == 2) {
2913 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 2914 irsp->unsli3.sli3Words[7]);
9c2face6 2915 if (!iocbq->context3)
76bb24ef
JS
2916 lpfc_printf_log(phba,
2917 KERN_ERR,
2918 LOG_SLI,
2919 "0344 Ring %d Cannot find "
2920 "buffer for an unsolicited "
2921 "iocb. tag 0x%x\n",
2922 pring->ringno,
2923 irsp->unsli3.sli3Words[7]);
2924 }
2925 }
92d7f7b0 2926 }
9c2face6
JS
2927 if (irsp->ulpBdeCount != 0 &&
2928 (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
2929 irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
2930 int found = 0;
2931
2932 /* search continue save q for same XRI */
2933 list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
7851fe2c
JS
2934 if (iocbq->iocb.unsli3.rcvsli3.ox_id ==
2935 saveq->iocb.unsli3.rcvsli3.ox_id) {
9c2face6
JS
2936 list_add_tail(&saveq->list, &iocbq->list);
2937 found = 1;
2938 break;
2939 }
2940 }
2941 if (!found)
2942 list_add_tail(&saveq->clist,
2943 &pring->iocb_continue_saveq);
2944 if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
2945 list_del_init(&iocbq->clist);
2946 saveq = iocbq;
2947 irsp = &(saveq->iocb);
2948 } else
2949 return 0;
2950 }
2951 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
2952 (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
2953 (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
6a9c52cf
JS
2954 Rctl = FC_RCTL_ELS_REQ;
2955 Type = FC_TYPE_ELS;
9c2face6
JS
2956 } else {
2957 w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
2958 Rctl = w5p->hcsw.Rctl;
2959 Type = w5p->hcsw.Type;
2960
2961 /* Firmware Workaround */
2962 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
2963 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
2964 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
6a9c52cf
JS
2965 Rctl = FC_RCTL_ELS_REQ;
2966 Type = FC_TYPE_ELS;
9c2face6
JS
2967 w5p->hcsw.Rctl = Rctl;
2968 w5p->hcsw.Type = Type;
2969 }
2970 }
92d7f7b0 2971
3772a991 2972 if (!lpfc_complete_unsol_iocb(phba, pring, saveq, Rctl, Type))
92d7f7b0 2973 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 2974 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 2975 "Type x%x received\n",
e8b62011 2976 pring->ringno, Rctl, Type);
3772a991 2977
92d7f7b0 2978 return 1;
dea3101e
JB
2979}
2980
e59058c4 2981/**
3621a710 2982 * lpfc_sli_iocbq_lookup - Find command iocb for the given response iocb
e59058c4
JS
2983 * @phba: Pointer to HBA context object.
2984 * @pring: Pointer to driver SLI ring object.
2985 * @prspiocb: Pointer to response iocb object.
2986 *
2987 * This function looks up the iocb_lookup table to get the command iocb
2988 * corresponding to the given response iocb using the iotag of the
341b2aa8
DK
2989 * response iocb. This function is called with the hbalock held
2990 * for sli3 devices or the ring_lock for sli4 devices.
e59058c4
JS
2991 * This function returns the command iocb object if it finds the command
2992 * iocb else returns NULL.
2993 **/
dea3101e 2994static struct lpfc_iocbq *
2e0fef85
JS
2995lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
2996 struct lpfc_sli_ring *pring,
2997 struct lpfc_iocbq *prspiocb)
dea3101e 2998{
dea3101e
JB
2999 struct lpfc_iocbq *cmd_iocb = NULL;
3000 uint16_t iotag;
1c2ba475 3001 lockdep_assert_held(&phba->hbalock);
dea3101e 3002
604a3e30
JB
3003 iotag = prspiocb->iocb.ulpIoTag;
3004
3005 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3006 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6 3007 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
89533e9b
JS
3008 /* remove from txcmpl queue list */
3009 list_del_init(&cmd_iocb->list);
4f2e66c6 3010 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
89533e9b 3011 return cmd_iocb;
2a9bf3d0 3012 }
dea3101e
JB
3013 }
3014
dea3101e 3015 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
89533e9b 3016 "0317 iotag x%x is out of "
604a3e30 3017 "range: max iotag x%x wd0 x%x\n",
e8b62011 3018 iotag, phba->sli.last_iotag,
604a3e30 3019 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB
3020 return NULL;
3021}
3022
3772a991
JS
3023/**
3024 * lpfc_sli_iocbq_lookup_by_tag - Find command iocb for the iotag
3025 * @phba: Pointer to HBA context object.
3026 * @pring: Pointer to driver SLI ring object.
3027 * @iotag: IOCB tag.
3028 *
3029 * This function looks up the iocb_lookup table to get the command iocb
3030 * corresponding to the given iotag. This function is called with the
3031 * hbalock held.
3032 * This function returns the command iocb object if it finds the command
3033 * iocb else returns NULL.
3034 **/
3035static struct lpfc_iocbq *
3036lpfc_sli_iocbq_lookup_by_tag(struct lpfc_hba *phba,
3037 struct lpfc_sli_ring *pring, uint16_t iotag)
3038{
895427bd 3039 struct lpfc_iocbq *cmd_iocb = NULL;
3772a991 3040
1c2ba475 3041 lockdep_assert_held(&phba->hbalock);
3772a991
JS
3042 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3043 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6
JS
3044 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
3045 /* remove from txcmpl queue list */
3046 list_del_init(&cmd_iocb->list);
3047 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
4f2e66c6 3048 return cmd_iocb;
2a9bf3d0 3049 }
3772a991 3050 }
89533e9b 3051
3772a991 3052 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd
JS
3053 "0372 iotag x%x lookup error: max iotag (x%x) "
3054 "iocb_flag x%x\n",
3055 iotag, phba->sli.last_iotag,
3056 cmd_iocb ? cmd_iocb->iocb_flag : 0xffff);
3772a991
JS
3057 return NULL;
3058}
3059
e59058c4 3060/**
3621a710 3061 * lpfc_sli_process_sol_iocb - process solicited iocb completion
e59058c4
JS
3062 * @phba: Pointer to HBA context object.
3063 * @pring: Pointer to driver SLI ring object.
3064 * @saveq: Pointer to the response iocb to be processed.
3065 *
3066 * This function is called by the ring event handler for non-fcp
3067 * rings when there is a new response iocb in the response ring.
3068 * The caller is not required to hold any locks. This function
3069 * gets the command iocb associated with the response iocb and
3070 * calls the completion handler for the command iocb. If there
3071 * is no completion handler, the function will free the resources
3072 * associated with command iocb. If the response iocb is for
3073 * an already aborted command iocb, the status of the completion
3074 * is changed to IOSTAT_LOCAL_REJECT/IOERR_SLI_ABORTED.
3075 * This function always returns 1.
3076 **/
dea3101e 3077static int
2e0fef85 3078lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB
3079 struct lpfc_iocbq *saveq)
3080{
2e0fef85 3081 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB
3082 int rc = 1;
3083 unsigned long iflag;
3084
3085 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
341b2aa8
DK
3086 if (phba->sli_rev == LPFC_SLI_REV4)
3087 spin_lock_irqsave(&pring->ring_lock, iflag);
3088 else
3089 spin_lock_irqsave(&phba->hbalock, iflag);
604a3e30 3090 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
341b2aa8
DK
3091 if (phba->sli_rev == LPFC_SLI_REV4)
3092 spin_unlock_irqrestore(&pring->ring_lock, iflag);
3093 else
3094 spin_unlock_irqrestore(&phba->hbalock, iflag);
2e0fef85 3095
dea3101e
JB
3096 if (cmdiocbp) {
3097 if (cmdiocbp->iocb_cmpl) {
ea2151b4
JS
3098 /*
3099 * If an ELS command failed send an event to mgmt
3100 * application.
3101 */
3102 if (saveq->iocb.ulpStatus &&
3103 (pring->ringno == LPFC_ELS_RING) &&
3104 (cmdiocbp->iocb.ulpCommand ==
3105 CMD_ELS_REQUEST64_CR))
3106 lpfc_send_els_failure_event(phba,
3107 cmdiocbp, saveq);
3108
dea3101e
JB
3109 /*
3110 * Post all ELS completions to the worker thread.
3111 * All other are passed to the completion callback.
3112 */
3113 if (pring->ringno == LPFC_ELS_RING) {
341af102
JS
3114 if ((phba->sli_rev < LPFC_SLI_REV4) &&
3115 (cmdiocbp->iocb_flag &
3116 LPFC_DRIVER_ABORTED)) {
3117 spin_lock_irqsave(&phba->hbalock,
3118 iflag);
07951076
JS
3119 cmdiocbp->iocb_flag &=
3120 ~LPFC_DRIVER_ABORTED;
341af102
JS
3121 spin_unlock_irqrestore(&phba->hbalock,
3122 iflag);
07951076
JS
3123 saveq->iocb.ulpStatus =
3124 IOSTAT_LOCAL_REJECT;
3125 saveq->iocb.un.ulpWord[4] =
3126 IOERR_SLI_ABORTED;
0ff10d46
JS
3127
3128 /* Firmware could still be in progress
3129 * of DMAing payload, so don't free data
3130 * buffer till after a hbeat.
3131 */
341af102
JS
3132 spin_lock_irqsave(&phba->hbalock,
3133 iflag);
0ff10d46 3134 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
341af102
JS
3135 spin_unlock_irqrestore(&phba->hbalock,
3136 iflag);
3137 }
0f65ff68
JS
3138 if (phba->sli_rev == LPFC_SLI_REV4) {
3139 if (saveq->iocb_flag &
3140 LPFC_EXCHANGE_BUSY) {
3141 /* Set cmdiocb flag for the
3142 * exchange busy so sgl (xri)
3143 * will not be released until
3144 * the abort xri is received
3145 * from hba.
3146 */
3147 spin_lock_irqsave(
3148 &phba->hbalock, iflag);
3149 cmdiocbp->iocb_flag |=
3150 LPFC_EXCHANGE_BUSY;
3151 spin_unlock_irqrestore(
3152 &phba->hbalock, iflag);
3153 }
3154 if (cmdiocbp->iocb_flag &
3155 LPFC_DRIVER_ABORTED) {
3156 /*
3157 * Clear LPFC_DRIVER_ABORTED
3158 * bit in case it was driver
3159 * initiated abort.
3160 */
3161 spin_lock_irqsave(
3162 &phba->hbalock, iflag);
3163 cmdiocbp->iocb_flag &=
3164 ~LPFC_DRIVER_ABORTED;
3165 spin_unlock_irqrestore(
3166 &phba->hbalock, iflag);
3167 cmdiocbp->iocb.ulpStatus =
3168 IOSTAT_LOCAL_REJECT;
3169 cmdiocbp->iocb.un.ulpWord[4] =
3170 IOERR_ABORT_REQUESTED;
3171 /*
3172 * For SLI4, irsiocb contains
3173 * NO_XRI in sli_xritag, it
3174 * shall not affect releasing
3175 * sgl (xri) process.
3176 */
3177 saveq->iocb.ulpStatus =
3178 IOSTAT_LOCAL_REJECT;
3179 saveq->iocb.un.ulpWord[4] =
3180 IOERR_SLI_ABORTED;
3181 spin_lock_irqsave(
3182 &phba->hbalock, iflag);
3183 saveq->iocb_flag |=
3184 LPFC_DELAY_MEM_FREE;
3185 spin_unlock_irqrestore(
3186 &phba->hbalock, iflag);
3187 }
07951076 3188 }
dea3101e 3189 }
2e0fef85 3190 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB
3191 } else
3192 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB
3193 } else {
3194 /*
3195 * Unknown initiating command based on the response iotag.
3196 * This could be the case on the ELS ring because of
3197 * lpfc_els_abort().
3198 */
3199 if (pring->ringno != LPFC_ELS_RING) {
3200 /*
3201 * Ring <ringno> handler: unexpected completion IoTag
3202 * <IoTag>
3203 */
a257bf90 3204 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
3205 "0322 Ring %d handler: "
3206 "unexpected completion IoTag x%x "
3207 "Data: x%x x%x x%x x%x\n",
3208 pring->ringno,
3209 saveq->iocb.ulpIoTag,
3210 saveq->iocb.ulpStatus,
3211 saveq->iocb.un.ulpWord[4],
3212 saveq->iocb.ulpCommand,
3213 saveq->iocb.ulpContext);
dea3101e
JB
3214 }
3215 }
68876920 3216
dea3101e
JB
3217 return rc;
3218}
3219
e59058c4 3220/**
3621a710 3221 * lpfc_sli_rsp_pointers_error - Response ring pointer error handler
e59058c4
JS
3222 * @phba: Pointer to HBA context object.
3223 * @pring: Pointer to driver SLI ring object.
3224 *
3225 * This function is called from the iocb ring event handlers when
3226 * put pointer is ahead of the get pointer for a ring. This function signal
3227 * an error attention condition to the worker thread and the worker
3228 * thread will transition the HBA to offline state.
3229 **/
2e0fef85
JS
3230static void
3231lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 3232{
34b02dcd 3233 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
875fbdfe 3234 /*
025dfdaf 3235 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
875fbdfe
JSEC
3236 * rsp ring <portRspMax>
3237 */
3238 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3239 "0312 Ring %d handler: portRspPut %d "
025dfdaf 3240 "is bigger than rsp ring %d\n",
e8b62011 3241 pring->ringno, le32_to_cpu(pgp->rspPutInx),
7e56aa25 3242 pring->sli.sli3.numRiocb);
875fbdfe 3243
2e0fef85 3244 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC
3245
3246 /*
3247 * All error attention handlers are posted to
3248 * worker thread
3249 */
3250 phba->work_ha |= HA_ERATT;
3251 phba->work_hs = HS_FFER3;
92d7f7b0 3252
5e9d9b82 3253 lpfc_worker_wake_up(phba);
875fbdfe
JSEC
3254
3255 return;
3256}
3257
9399627f 3258/**
3621a710 3259 * lpfc_poll_eratt - Error attention polling timer timeout handler
9399627f
JS
3260 * @ptr: Pointer to address of HBA context object.
3261 *
3262 * This function is invoked by the Error Attention polling timer when the
3263 * timer times out. It will check the SLI Error Attention register for
3264 * possible attention events. If so, it will post an Error Attention event
3265 * and wake up worker thread to process it. Otherwise, it will set up the
3266 * Error Attention polling timer for the next poll.
3267 **/
f22eb4d3 3268void lpfc_poll_eratt(struct timer_list *t)
9399627f
JS
3269{
3270 struct lpfc_hba *phba;
eb016566 3271 uint32_t eratt = 0;
aa6fbb75 3272 uint64_t sli_intr, cnt;
9399627f 3273
f22eb4d3 3274 phba = from_timer(phba, t, eratt_poll);
9399627f 3275
aa6fbb75
JS
3276 /* Here we will also keep track of interrupts per sec of the hba */
3277 sli_intr = phba->sli.slistat.sli_intr;
3278
3279 if (phba->sli.slistat.sli_prev_intr > sli_intr)
3280 cnt = (((uint64_t)(-1) - phba->sli.slistat.sli_prev_intr) +
3281 sli_intr);
3282 else
3283 cnt = (sli_intr - phba->sli.slistat.sli_prev_intr);
3284
65791f1f
JS
3285 /* 64-bit integer division not supported on 32-bit x86 - use do_div */
3286 do_div(cnt, phba->eratt_poll_interval);
aa6fbb75
JS
3287 phba->sli.slistat.sli_ips = cnt;
3288
3289 phba->sli.slistat.sli_prev_intr = sli_intr;
3290
9399627f
JS
3291 /* Check chip HA register for error event */
3292 eratt = lpfc_sli_check_eratt(phba);
3293
3294 if (eratt)
3295 /* Tell the worker thread there is work to do */
3296 lpfc_worker_wake_up(phba);
3297 else
3298 /* Restart the timer for next eratt poll */
256ec0d0
JS
3299 mod_timer(&phba->eratt_poll,
3300 jiffies +
65791f1f 3301 msecs_to_jiffies(1000 * phba->eratt_poll_interval));
9399627f
JS
3302 return;
3303}
3304
875fbdfe 3305
e59058c4 3306/**
3621a710 3307 * lpfc_sli_handle_fast_ring_event - Handle ring events on FCP ring
e59058c4
JS
3308 * @phba: Pointer to HBA context object.
3309 * @pring: Pointer to driver SLI ring object.
3310 * @mask: Host attention register mask for this ring.
3311 *
3312 * This function is called from the interrupt context when there is a ring
3313 * event for the fcp ring. The caller does not hold any lock.
3314 * The function processes each response iocb in the response ring until it
25985edc 3315 * finds an iocb with LE bit set and chains all the iocbs up to the iocb with
e59058c4
JS
3316 * LE bit set. The function will call the completion handler of the command iocb
3317 * if the response iocb indicates a completion for a command iocb or it is
3318 * an abort completion. The function will call lpfc_sli_process_unsol_iocb
3319 * function if this is an unsolicited iocb.
dea3101e 3320 * This routine presumes LPFC_FCP_RING handling and doesn't bother
45ed1190
JS
3321 * to check it explicitly.
3322 */
3323int
2e0fef85
JS
3324lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
3325 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3326{
34b02dcd 3327 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
dea3101e 3328 IOCB_t *irsp = NULL;
87f6eaff 3329 IOCB_t *entry = NULL;
dea3101e
JB
3330 struct lpfc_iocbq *cmdiocbq = NULL;
3331 struct lpfc_iocbq rspiocbq;
dea3101e
JB
3332 uint32_t status;
3333 uint32_t portRspPut, portRspMax;
3334 int rc = 1;
3335 lpfc_iocb_type type;
3336 unsigned long iflag;
3337 uint32_t rsp_cmpl = 0;
dea3101e 3338
2e0fef85 3339 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3340 pring->stats.iocb_event++;
3341
dea3101e
JB
3342 /*
3343 * The next available response entry should never exceed the maximum
3344 * entries. If it does, treat it as an adapter hardware error.
3345 */
7e56aa25 3346 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3347 portRspPut = le32_to_cpu(pgp->rspPutInx);
3348 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 3349 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 3350 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3351 return 1;
3352 }
45ed1190
JS
3353 if (phba->fcp_ring_in_use) {
3354 spin_unlock_irqrestore(&phba->hbalock, iflag);
3355 return 1;
3356 } else
3357 phba->fcp_ring_in_use = 1;
dea3101e
JB
3358
3359 rmb();
7e56aa25 3360 while (pring->sli.sli3.rspidx != portRspPut) {
87f6eaff
JSEC
3361 /*
3362 * Fetch an entry off the ring and copy it into a local data
3363 * structure. The copy involves a byte-swap since the
3364 * network byte order and pci byte orders are different.
3365 */
ed957684 3366 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 3367 phba->last_completion_time = jiffies;
875fbdfe 3368
7e56aa25
JS
3369 if (++pring->sli.sli3.rspidx >= portRspMax)
3370 pring->sli.sli3.rspidx = 0;
875fbdfe 3371
87f6eaff
JSEC
3372 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
3373 (uint32_t *) &rspiocbq.iocb,
ed957684 3374 phba->iocb_rsp_size);
a4bc3379 3375 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC
3376 irsp = &rspiocbq.iocb;
3377
dea3101e
JB
3378 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
3379 pring->stats.iocb_rsp++;
3380 rsp_cmpl++;
3381
3382 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS
3383 /*
3384 * If resource errors reported from HBA, reduce
3385 * queuedepths of the SCSI device.
3386 */
3387 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3388 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3389 IOERR_NO_RESOURCES)) {
92d7f7b0 3390 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3391 phba->lpfc_rampdown_queue_depth(phba);
92d7f7b0
JS
3392 spin_lock_irqsave(&phba->hbalock, iflag);
3393 }
3394
dea3101e
JB
3395 /* Rsp ring <ringno> error: IOCB */
3396 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3397 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 3398 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 3399 pring->ringno,
92d7f7b0
JS
3400 irsp->un.ulpWord[0],
3401 irsp->un.ulpWord[1],
3402 irsp->un.ulpWord[2],
3403 irsp->un.ulpWord[3],
3404 irsp->un.ulpWord[4],
3405 irsp->un.ulpWord[5],
d7c255b2
JS
3406 *(uint32_t *)&irsp->un1,
3407 *((uint32_t *)&irsp->un1 + 1));
dea3101e
JB
3408 }
3409
3410 switch (type) {
3411 case LPFC_ABORT_IOCB:
3412 case LPFC_SOL_IOCB:
3413 /*
3414 * Idle exchange closed via ABTS from port. No iocb
3415 * resources need to be recovered.
3416 */
3417 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 3418 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3419 "0333 IOCB cmd 0x%x"
dca9479b 3420 " processed. Skipping"
92d7f7b0 3421 " completion\n",
dca9479b 3422 irsp->ulpCommand);
dea3101e
JB
3423 break;
3424 }
3425
604a3e30
JB
3426 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
3427 &rspiocbq);
0f65ff68
JS
3428 if (unlikely(!cmdiocbq))
3429 break;
3430 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED)
3431 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3432 if (cmdiocbq->iocb_cmpl) {
3433 spin_unlock_irqrestore(&phba->hbalock, iflag);
3434 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
3435 &rspiocbq);
3436 spin_lock_irqsave(&phba->hbalock, iflag);
3437 }
dea3101e 3438 break;
a4bc3379 3439 case LPFC_UNSOL_IOCB:
2e0fef85 3440 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 3441 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 3442 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 3443 break;
dea3101e
JB
3444 default:
3445 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3446 char adaptermsg[LPFC_MAX_ADPTMSG];
3447 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3448 memcpy(&adaptermsg[0], (uint8_t *) irsp,
3449 MAX_MSG_DATA);
898eb71c
JP
3450 dev_warn(&((phba->pcidev)->dev),
3451 "lpfc%d: %s\n",
dea3101e
JB
3452 phba->brd_no, adaptermsg);
3453 } else {
3454 /* Unknown IOCB command */
3455 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3456 "0334 Unknown IOCB command "
92d7f7b0 3457 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 3458 type, irsp->ulpCommand,
92d7f7b0
JS
3459 irsp->ulpStatus,
3460 irsp->ulpIoTag,
3461 irsp->ulpContext);
dea3101e
JB
3462 }
3463 break;
3464 }
3465
3466 /*
3467 * The response IOCB has been processed. Update the ring
3468 * pointer in SLIM. If the port response put pointer has not
3469 * been updated, sync the pgp->rspPutInx and fetch the new port
3470 * response put pointer.
3471 */
7e56aa25
JS
3472 writel(pring->sli.sli3.rspidx,
3473 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3474
7e56aa25 3475 if (pring->sli.sli3.rspidx == portRspPut)
dea3101e
JB
3476 portRspPut = le32_to_cpu(pgp->rspPutInx);
3477 }
3478
3479 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
3480 pring->stats.iocb_rsp_full++;
3481 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3482 writel(status, phba->CAregaddr);
3483 readl(phba->CAregaddr);
3484 }
3485 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3486 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3487 pring->stats.iocb_cmd_empty++;
3488
3489 /* Force update of the local copy of cmdGetInx */
7e56aa25 3490 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3491 lpfc_sli_resume_iocb(phba, pring);
3492
3493 if ((pring->lpfc_sli_cmd_available))
3494 (pring->lpfc_sli_cmd_available) (phba, pring);
3495
3496 }
3497
45ed1190 3498 phba->fcp_ring_in_use = 0;
2e0fef85 3499 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3500 return rc;
3501}
3502
e59058c4 3503/**
3772a991
JS
3504 * lpfc_sli_sp_handle_rspiocb - Handle slow-path response iocb
3505 * @phba: Pointer to HBA context object.
3506 * @pring: Pointer to driver SLI ring object.
3507 * @rspiocbp: Pointer to driver response IOCB object.
3508 *
3509 * This function is called from the worker thread when there is a slow-path
3510 * response IOCB to process. This function chains all the response iocbs until
3511 * seeing the iocb with the LE bit set. The function will call
3512 * lpfc_sli_process_sol_iocb function if the response iocb indicates a
3513 * completion of a command iocb. The function will call the
3514 * lpfc_sli_process_unsol_iocb function if this is an unsolicited iocb.
3515 * The function frees the resources or calls the completion handler if this
3516 * iocb is an abort completion. The function returns NULL when the response
3517 * iocb has the LE bit set and all the chained iocbs are processed, otherwise
3518 * this function shall chain the iocb on to the iocb_continueq and return the
3519 * response iocb passed in.
3520 **/
3521static struct lpfc_iocbq *
3522lpfc_sli_sp_handle_rspiocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3523 struct lpfc_iocbq *rspiocbp)
3524{
3525 struct lpfc_iocbq *saveq;
3526 struct lpfc_iocbq *cmdiocbp;
3527 struct lpfc_iocbq *next_iocb;
3528 IOCB_t *irsp = NULL;
3529 uint32_t free_saveq;
3530 uint8_t iocb_cmd_type;
3531 lpfc_iocb_type type;
3532 unsigned long iflag;
3533 int rc;
3534
3535 spin_lock_irqsave(&phba->hbalock, iflag);
3536 /* First add the response iocb to the countinueq list */
3537 list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
3538 pring->iocb_continueq_cnt++;
3539
70f23fd6 3540 /* Now, determine whether the list is completed for processing */
3772a991
JS
3541 irsp = &rspiocbp->iocb;
3542 if (irsp->ulpLe) {
3543 /*
3544 * By default, the driver expects to free all resources
3545 * associated with this iocb completion.
3546 */
3547 free_saveq = 1;
3548 saveq = list_get_first(&pring->iocb_continueq,
3549 struct lpfc_iocbq, list);
3550 irsp = &(saveq->iocb);
3551 list_del_init(&pring->iocb_continueq);
3552 pring->iocb_continueq_cnt = 0;
3553
3554 pring->stats.iocb_rsp++;
3555
3556 /*
3557 * If resource errors reported from HBA, reduce
3558 * queuedepths of the SCSI device.
3559 */
3560 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3561 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3562 IOERR_NO_RESOURCES)) {
3772a991
JS
3563 spin_unlock_irqrestore(&phba->hbalock, iflag);
3564 phba->lpfc_rampdown_queue_depth(phba);
3565 spin_lock_irqsave(&phba->hbalock, iflag);
3566 }
3567
3568 if (irsp->ulpStatus) {
3569 /* Rsp ring <ringno> error: IOCB */
3570 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
3571 "0328 Rsp Ring %d error: "
3572 "IOCB Data: "
3573 "x%x x%x x%x x%x "
3574 "x%x x%x x%x x%x "
3575 "x%x x%x x%x x%x "
3576 "x%x x%x x%x x%x\n",
3577 pring->ringno,
3578 irsp->un.ulpWord[0],
3579 irsp->un.ulpWord[1],
3580 irsp->un.ulpWord[2],
3581 irsp->un.ulpWord[3],
3582 irsp->un.ulpWord[4],
3583 irsp->un.ulpWord[5],
3584 *(((uint32_t *) irsp) + 6),
3585 *(((uint32_t *) irsp) + 7),
3586 *(((uint32_t *) irsp) + 8),
3587 *(((uint32_t *) irsp) + 9),
3588 *(((uint32_t *) irsp) + 10),
3589 *(((uint32_t *) irsp) + 11),
3590 *(((uint32_t *) irsp) + 12),
3591 *(((uint32_t *) irsp) + 13),
3592 *(((uint32_t *) irsp) + 14),
3593 *(((uint32_t *) irsp) + 15));
3594 }
3595
3596 /*
3597 * Fetch the IOCB command type and call the correct completion
3598 * routine. Solicited and Unsolicited IOCBs on the ELS ring
3599 * get freed back to the lpfc_iocb_list by the discovery
3600 * kernel thread.
3601 */
3602 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
3603 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
3604 switch (type) {
3605 case LPFC_SOL_IOCB:
3606 spin_unlock_irqrestore(&phba->hbalock, iflag);
3607 rc = lpfc_sli_process_sol_iocb(phba, pring, saveq);
3608 spin_lock_irqsave(&phba->hbalock, iflag);
3609 break;
3610
3611 case LPFC_UNSOL_IOCB:
3612 spin_unlock_irqrestore(&phba->hbalock, iflag);
3613 rc = lpfc_sli_process_unsol_iocb(phba, pring, saveq);
3614 spin_lock_irqsave(&phba->hbalock, iflag);
3615 if (!rc)
3616 free_saveq = 0;
3617 break;
3618
3619 case LPFC_ABORT_IOCB:
3620 cmdiocbp = NULL;
3621 if (irsp->ulpCommand != CMD_XRI_ABORTED_CX)
3622 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring,
3623 saveq);
3624 if (cmdiocbp) {
3625 /* Call the specified completion routine */
3626 if (cmdiocbp->iocb_cmpl) {
3627 spin_unlock_irqrestore(&phba->hbalock,
3628 iflag);
3629 (cmdiocbp->iocb_cmpl)(phba, cmdiocbp,
3630 saveq);
3631 spin_lock_irqsave(&phba->hbalock,
3632 iflag);
3633 } else
3634 __lpfc_sli_release_iocbq(phba,
3635 cmdiocbp);
3636 }
3637 break;
3638
3639 case LPFC_UNKNOWN_IOCB:
3640 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3641 char adaptermsg[LPFC_MAX_ADPTMSG];
3642 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3643 memcpy(&adaptermsg[0], (uint8_t *)irsp,
3644 MAX_MSG_DATA);
3645 dev_warn(&((phba->pcidev)->dev),
3646 "lpfc%d: %s\n",
3647 phba->brd_no, adaptermsg);
3648 } else {
3649 /* Unknown IOCB command */
3650 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3651 "0335 Unknown IOCB "
3652 "command Data: x%x "
3653 "x%x x%x x%x\n",
3654 irsp->ulpCommand,
3655 irsp->ulpStatus,
3656 irsp->ulpIoTag,
3657 irsp->ulpContext);
3658 }
3659 break;
3660 }
3661
3662 if (free_saveq) {
3663 list_for_each_entry_safe(rspiocbp, next_iocb,
3664 &saveq->list, list) {
61f35bff 3665 list_del_init(&rspiocbp->list);
3772a991
JS
3666 __lpfc_sli_release_iocbq(phba, rspiocbp);
3667 }
3668 __lpfc_sli_release_iocbq(phba, saveq);
3669 }
3670 rspiocbp = NULL;
3671 }
3672 spin_unlock_irqrestore(&phba->hbalock, iflag);
3673 return rspiocbp;
3674}
3675
3676/**
3677 * lpfc_sli_handle_slow_ring_event - Wrapper func for handling slow-path iocbs
e59058c4
JS
3678 * @phba: Pointer to HBA context object.
3679 * @pring: Pointer to driver SLI ring object.
3680 * @mask: Host attention register mask for this ring.
3681 *
3772a991
JS
3682 * This routine wraps the actual slow_ring event process routine from the
3683 * API jump table function pointer from the lpfc_hba struct.
e59058c4 3684 **/
3772a991 3685void
2e0fef85
JS
3686lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
3687 struct lpfc_sli_ring *pring, uint32_t mask)
3772a991
JS
3688{
3689 phba->lpfc_sli_handle_slow_ring_event(phba, pring, mask);
3690}
3691
3692/**
3693 * lpfc_sli_handle_slow_ring_event_s3 - Handle SLI3 ring event for non-FCP rings
3694 * @phba: Pointer to HBA context object.
3695 * @pring: Pointer to driver SLI ring object.
3696 * @mask: Host attention register mask for this ring.
3697 *
3698 * This function is called from the worker thread when there is a ring event
3699 * for non-fcp rings. The caller does not hold any lock. The function will
3700 * remove each response iocb in the response ring and calls the handle
3701 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3702 **/
3703static void
3704lpfc_sli_handle_slow_ring_event_s3(struct lpfc_hba *phba,
3705 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3706{
34b02dcd 3707 struct lpfc_pgp *pgp;
dea3101e
JB
3708 IOCB_t *entry;
3709 IOCB_t *irsp = NULL;
3710 struct lpfc_iocbq *rspiocbp = NULL;
dea3101e 3711 uint32_t portRspPut, portRspMax;
dea3101e 3712 unsigned long iflag;
3772a991 3713 uint32_t status;
dea3101e 3714
34b02dcd 3715 pgp = &phba->port_gp[pring->ringno];
2e0fef85 3716 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3717 pring->stats.iocb_event++;
3718
dea3101e
JB
3719 /*
3720 * The next available response entry should never exceed the maximum
3721 * entries. If it does, treat it as an adapter hardware error.
3722 */
7e56aa25 3723 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3724 portRspPut = le32_to_cpu(pgp->rspPutInx);
3725 if (portRspPut >= portRspMax) {
3726 /*
025dfdaf 3727 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
dea3101e
JB
3728 * rsp ring <portRspMax>
3729 */
ed957684 3730 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3731 "0303 Ring %d handler: portRspPut %d "
025dfdaf 3732 "is bigger than rsp ring %d\n",
e8b62011 3733 pring->ringno, portRspPut, portRspMax);
dea3101e 3734
2e0fef85
JS
3735 phba->link_state = LPFC_HBA_ERROR;
3736 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3737
3738 phba->work_hs = HS_FFER3;
3739 lpfc_handle_eratt(phba);
3740
3772a991 3741 return;
dea3101e
JB
3742 }
3743
3744 rmb();
7e56aa25 3745 while (pring->sli.sli3.rspidx != portRspPut) {
dea3101e
JB
3746 /*
3747 * Build a completion list and call the appropriate handler.
3748 * The process is to get the next available response iocb, get
3749 * a free iocb from the list, copy the response data into the
3750 * free iocb, insert to the continuation list, and update the
3751 * next response index to slim. This process makes response
3752 * iocb's in the ring available to DMA as fast as possible but
3753 * pays a penalty for a copy operation. Since the iocb is
3754 * only 32 bytes, this penalty is considered small relative to
3755 * the PCI reads for register values and a slim write. When
3756 * the ulpLe field is set, the entire Command has been
3757 * received.
3758 */
ed957684
JS
3759 entry = lpfc_resp_iocb(phba, pring);
3760
858c9f6c 3761 phba->last_completion_time = jiffies;
2e0fef85 3762 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
3763 if (rspiocbp == NULL) {
3764 printk(KERN_ERR "%s: out of buffers! Failing "
cadbd4a5 3765 "completion.\n", __func__);
dea3101e
JB
3766 break;
3767 }
3768
ed957684
JS
3769 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
3770 phba->iocb_rsp_size);
dea3101e
JB
3771 irsp = &rspiocbp->iocb;
3772
7e56aa25
JS
3773 if (++pring->sli.sli3.rspidx >= portRspMax)
3774 pring->sli.sli3.rspidx = 0;
dea3101e 3775
a58cbd52
JS
3776 if (pring->ringno == LPFC_ELS_RING) {
3777 lpfc_debugfs_slow_ring_trc(phba,
3778 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
3779 *(((uint32_t *) irsp) + 4),
3780 *(((uint32_t *) irsp) + 6),
3781 *(((uint32_t *) irsp) + 7));
3782 }
3783
7e56aa25
JS
3784 writel(pring->sli.sli3.rspidx,
3785 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3786
3772a991
JS
3787 spin_unlock_irqrestore(&phba->hbalock, iflag);
3788 /* Handle the response IOCB */
3789 rspiocbp = lpfc_sli_sp_handle_rspiocb(phba, pring, rspiocbp);
3790 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3791
3792 /*
3793 * If the port response put pointer has not been updated, sync
3794 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
3795 * response put pointer.
3796 */
7e56aa25 3797 if (pring->sli.sli3.rspidx == portRspPut) {
dea3101e
JB
3798 portRspPut = le32_to_cpu(pgp->rspPutInx);
3799 }
7e56aa25 3800 } /* while (pring->sli.sli3.rspidx != portRspPut) */
dea3101e 3801
92d7f7b0 3802 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB
3803 /* At least one response entry has been freed */
3804 pring->stats.iocb_rsp_full++;
3805 /* SET RxRE_RSP in Chip Att register */
3806 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3807 writel(status, phba->CAregaddr);
3808 readl(phba->CAregaddr); /* flush */
3809 }
3810 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3811 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3812 pring->stats.iocb_cmd_empty++;
3813
3814 /* Force update of the local copy of cmdGetInx */
7e56aa25 3815 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3816 lpfc_sli_resume_iocb(phba, pring);
3817
3818 if ((pring->lpfc_sli_cmd_available))
3819 (pring->lpfc_sli_cmd_available) (phba, pring);
3820
3821 }
3822
2e0fef85 3823 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3824 return;
dea3101e
JB
3825}
3826
4f774513
JS
3827/**
3828 * lpfc_sli_handle_slow_ring_event_s4 - Handle SLI4 slow-path els events
3829 * @phba: Pointer to HBA context object.
3830 * @pring: Pointer to driver SLI ring object.
3831 * @mask: Host attention register mask for this ring.
3832 *
3833 * This function is called from the worker thread when there is a pending
3834 * ELS response iocb on the driver internal slow-path response iocb worker
3835 * queue. The caller does not hold any lock. The function will remove each
3836 * response iocb from the response worker queue and calls the handle
3837 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3838 **/
3839static void
3840lpfc_sli_handle_slow_ring_event_s4(struct lpfc_hba *phba,
3841 struct lpfc_sli_ring *pring, uint32_t mask)
3842{
3843 struct lpfc_iocbq *irspiocbq;
4d9ab994
JS
3844 struct hbq_dmabuf *dmabuf;
3845 struct lpfc_cq_event *cq_event;
4f774513 3846 unsigned long iflag;
0ef01a2d 3847 int count = 0;
4f774513 3848
45ed1190
JS
3849 spin_lock_irqsave(&phba->hbalock, iflag);
3850 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
3851 spin_unlock_irqrestore(&phba->hbalock, iflag);
3852 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
4f774513
JS
3853 /* Get the response iocb from the head of work queue */
3854 spin_lock_irqsave(&phba->hbalock, iflag);
45ed1190 3855 list_remove_head(&phba->sli4_hba.sp_queue_event,
4d9ab994 3856 cq_event, struct lpfc_cq_event, list);
4f774513 3857 spin_unlock_irqrestore(&phba->hbalock, iflag);
4d9ab994
JS
3858
3859 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
3860 case CQE_CODE_COMPL_WQE:
3861 irspiocbq = container_of(cq_event, struct lpfc_iocbq,
3862 cq_event);
45ed1190
JS
3863 /* Translate ELS WCQE to response IOCBQ */
3864 irspiocbq = lpfc_sli4_els_wcqe_to_rspiocbq(phba,
3865 irspiocbq);
3866 if (irspiocbq)
3867 lpfc_sli_sp_handle_rspiocb(phba, pring,
3868 irspiocbq);
0ef01a2d 3869 count++;
4d9ab994
JS
3870 break;
3871 case CQE_CODE_RECEIVE:
7851fe2c 3872 case CQE_CODE_RECEIVE_V1:
4d9ab994
JS
3873 dmabuf = container_of(cq_event, struct hbq_dmabuf,
3874 cq_event);
3875 lpfc_sli4_handle_received_buffer(phba, dmabuf);
0ef01a2d 3876 count++;
4d9ab994
JS
3877 break;
3878 default:
3879 break;
3880 }
0ef01a2d
JS
3881
3882 /* Limit the number of events to 64 to avoid soft lockups */
3883 if (count == 64)
3884 break;
4f774513
JS
3885 }
3886}
3887
e59058c4 3888/**
3621a710 3889 * lpfc_sli_abort_iocb_ring - Abort all iocbs in the ring
e59058c4
JS
3890 * @phba: Pointer to HBA context object.
3891 * @pring: Pointer to driver SLI ring object.
3892 *
3893 * This function aborts all iocbs in the given ring and frees all the iocb
3894 * objects in txq. This function issues an abort iocb for all the iocb commands
3895 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3896 * the return of this function. The caller is not required to hold any locks.
3897 **/
2e0fef85 3898void
dea3101e
JB
3899lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
3900{
2534ba75 3901 LIST_HEAD(completions);
dea3101e 3902 struct lpfc_iocbq *iocb, *next_iocb;
dea3101e 3903
92d7f7b0
JS
3904 if (pring->ringno == LPFC_ELS_RING) {
3905 lpfc_fabric_abort_hba(phba);
3906 }
3907
dea3101e
JB
3908 /* Error everything on txq and txcmplq
3909 * First do the txq.
3910 */
db55fba8
JS
3911 if (phba->sli_rev >= LPFC_SLI_REV4) {
3912 spin_lock_irq(&pring->ring_lock);
3913 list_splice_init(&pring->txq, &completions);
3914 pring->txq_cnt = 0;
3915 spin_unlock_irq(&pring->ring_lock);
dea3101e 3916
db55fba8
JS
3917 spin_lock_irq(&phba->hbalock);
3918 /* Next issue ABTS for everything on the txcmplq */
3919 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3920 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3921 spin_unlock_irq(&phba->hbalock);
3922 } else {
3923 spin_lock_irq(&phba->hbalock);
3924 list_splice_init(&pring->txq, &completions);
3925 pring->txq_cnt = 0;
dea3101e 3926
db55fba8
JS
3927 /* Next issue ABTS for everything on the txcmplq */
3928 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3929 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3930 spin_unlock_irq(&phba->hbalock);
3931 }
dea3101e 3932
a257bf90
JS
3933 /* Cancel all the IOCBs from the completions list */
3934 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
3935 IOERR_SLI_ABORTED);
dea3101e
JB
3936}
3937
895427bd
JS
3938/**
3939 * lpfc_sli_abort_wqe_ring - Abort all iocbs in the ring
3940 * @phba: Pointer to HBA context object.
3941 * @pring: Pointer to driver SLI ring object.
3942 *
3943 * This function aborts all iocbs in the given ring and frees all the iocb
3944 * objects in txq. This function issues an abort iocb for all the iocb commands
3945 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3946 * the return of this function. The caller is not required to hold any locks.
3947 **/
3948void
3949lpfc_sli_abort_wqe_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
3950{
3951 LIST_HEAD(completions);
3952 struct lpfc_iocbq *iocb, *next_iocb;
3953
3954 if (pring->ringno == LPFC_ELS_RING)
3955 lpfc_fabric_abort_hba(phba);
3956
3957 spin_lock_irq(&phba->hbalock);
3958 /* Next issue ABTS for everything on the txcmplq */
3959 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3960 lpfc_sli4_abort_nvme_io(phba, pring, iocb);
3961 spin_unlock_irq(&phba->hbalock);
3962}
3963
3964
db55fba8
JS
3965/**
3966 * lpfc_sli_abort_fcp_rings - Abort all iocbs in all FCP rings
3967 * @phba: Pointer to HBA context object.
3968 * @pring: Pointer to driver SLI ring object.
3969 *
3970 * This function aborts all iocbs in FCP rings and frees all the iocb
3971 * objects in txq. This function issues an abort iocb for all the iocb commands
3972 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3973 * the return of this function. The caller is not required to hold any locks.
3974 **/
3975void
3976lpfc_sli_abort_fcp_rings(struct lpfc_hba *phba)
3977{
3978 struct lpfc_sli *psli = &phba->sli;
3979 struct lpfc_sli_ring *pring;
3980 uint32_t i;
3981
3982 /* Look on all the FCP Rings for the iotag */
3983 if (phba->sli_rev >= LPFC_SLI_REV4) {
3984 for (i = 0; i < phba->cfg_fcp_io_channel; i++) {
895427bd 3985 pring = phba->sli4_hba.fcp_wq[i]->pring;
db55fba8
JS
3986 lpfc_sli_abort_iocb_ring(phba, pring);
3987 }
3988 } else {
895427bd 3989 pring = &psli->sli3_ring[LPFC_FCP_RING];
db55fba8
JS
3990 lpfc_sli_abort_iocb_ring(phba, pring);
3991 }
3992}
3993
895427bd
JS
3994/**
3995 * lpfc_sli_abort_nvme_rings - Abort all wqes in all NVME rings
3996 * @phba: Pointer to HBA context object.
3997 *
3998 * This function aborts all wqes in NVME rings. This function issues an
3999 * abort wqe for all the outstanding IO commands in txcmplq. The iocbs in
4000 * the txcmplq is not guaranteed to complete before the return of this
4001 * function. The caller is not required to hold any locks.
4002 **/
4003void
4004lpfc_sli_abort_nvme_rings(struct lpfc_hba *phba)
4005{
4006 struct lpfc_sli_ring *pring;
4007 uint32_t i;
4008
4009 if (phba->sli_rev < LPFC_SLI_REV4)
4010 return;
4011
4012 /* Abort all IO on each NVME ring. */
4013 for (i = 0; i < phba->cfg_nvme_io_channel; i++) {
4014 pring = phba->sli4_hba.nvme_wq[i]->pring;
4015 lpfc_sli_abort_wqe_ring(phba, pring);
4016 }
4017}
4018
db55fba8 4019
a8e497d5 4020/**
3621a710 4021 * lpfc_sli_flush_fcp_rings - flush all iocbs in the fcp ring
a8e497d5
JS
4022 * @phba: Pointer to HBA context object.
4023 *
4024 * This function flushes all iocbs in the fcp ring and frees all the iocb
4025 * objects in txq and txcmplq. This function will not issue abort iocbs
4026 * for all the iocb commands in txcmplq, they will just be returned with
4027 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
4028 * slot has been permanently disabled.
4029 **/
4030void
4031lpfc_sli_flush_fcp_rings(struct lpfc_hba *phba)
4032{
4033 LIST_HEAD(txq);
4034 LIST_HEAD(txcmplq);
a8e497d5
JS
4035 struct lpfc_sli *psli = &phba->sli;
4036 struct lpfc_sli_ring *pring;
db55fba8 4037 uint32_t i;
c1dd9111 4038 struct lpfc_iocbq *piocb, *next_iocb;
a8e497d5
JS
4039
4040 spin_lock_irq(&phba->hbalock);
4f2e66c6
JS
4041 /* Indicate the I/O queues are flushed */
4042 phba->hba_flag |= HBA_FCP_IOQ_FLUSH;
a8e497d5
JS
4043 spin_unlock_irq(&phba->hbalock);
4044
db55fba8
JS
4045 /* Look on all the FCP Rings for the iotag */
4046 if (phba->sli_rev >= LPFC_SLI_REV4) {
4047 for (i = 0; i < phba->cfg_fcp_io_channel; i++) {
895427bd 4048 pring = phba->sli4_hba.fcp_wq[i]->pring;
db55fba8
JS
4049
4050 spin_lock_irq(&pring->ring_lock);
4051 /* Retrieve everything on txq */
4052 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4053 list_for_each_entry_safe(piocb, next_iocb,
4054 &pring->txcmplq, list)
4055 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4056 /* Retrieve everything on the txcmplq */
4057 list_splice_init(&pring->txcmplq, &txcmplq);
4058 pring->txq_cnt = 0;
4059 pring->txcmplq_cnt = 0;
4060 spin_unlock_irq(&pring->ring_lock);
4061
4062 /* Flush the txq */
4063 lpfc_sli_cancel_iocbs(phba, &txq,
4064 IOSTAT_LOCAL_REJECT,
4065 IOERR_SLI_DOWN);
4066 /* Flush the txcmpq */
4067 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4068 IOSTAT_LOCAL_REJECT,
4069 IOERR_SLI_DOWN);
4070 }
4071 } else {
895427bd 4072 pring = &psli->sli3_ring[LPFC_FCP_RING];
a8e497d5 4073
db55fba8
JS
4074 spin_lock_irq(&phba->hbalock);
4075 /* Retrieve everything on txq */
4076 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4077 list_for_each_entry_safe(piocb, next_iocb,
4078 &pring->txcmplq, list)
4079 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4080 /* Retrieve everything on the txcmplq */
4081 list_splice_init(&pring->txcmplq, &txcmplq);
4082 pring->txq_cnt = 0;
4083 pring->txcmplq_cnt = 0;
4084 spin_unlock_irq(&phba->hbalock);
4085
4086 /* Flush the txq */
4087 lpfc_sli_cancel_iocbs(phba, &txq, IOSTAT_LOCAL_REJECT,
4088 IOERR_SLI_DOWN);
4089 /* Flush the txcmpq */
4090 lpfc_sli_cancel_iocbs(phba, &txcmplq, IOSTAT_LOCAL_REJECT,
4091 IOERR_SLI_DOWN);
4092 }
a8e497d5
JS
4093}
4094
895427bd
JS
4095/**
4096 * lpfc_sli_flush_nvme_rings - flush all wqes in the nvme rings
4097 * @phba: Pointer to HBA context object.
4098 *
4099 * This function flushes all wqes in the nvme rings and frees all resources
4100 * in the txcmplq. This function does not issue abort wqes for the IO
4101 * commands in txcmplq, they will just be returned with
4102 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
4103 * slot has been permanently disabled.
4104 **/
4105void
4106lpfc_sli_flush_nvme_rings(struct lpfc_hba *phba)
4107{
4108 LIST_HEAD(txcmplq);
4109 struct lpfc_sli_ring *pring;
4110 uint32_t i;
c1dd9111 4111 struct lpfc_iocbq *piocb, *next_iocb;
895427bd
JS
4112
4113 if (phba->sli_rev < LPFC_SLI_REV4)
4114 return;
4115
4116 /* Hint to other driver operations that a flush is in progress. */
4117 spin_lock_irq(&phba->hbalock);
4118 phba->hba_flag |= HBA_NVME_IOQ_FLUSH;
4119 spin_unlock_irq(&phba->hbalock);
4120
4121 /* Cycle through all NVME rings and complete each IO with
4122 * a local driver reason code. This is a flush so no
4123 * abort exchange to FW.
4124 */
4125 for (i = 0; i < phba->cfg_nvme_io_channel; i++) {
4126 pring = phba->sli4_hba.nvme_wq[i]->pring;
4127
895427bd 4128 spin_lock_irq(&pring->ring_lock);
c1dd9111
JS
4129 list_for_each_entry_safe(piocb, next_iocb,
4130 &pring->txcmplq, list)
4131 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
4132 /* Retrieve everything on the txcmplq */
895427bd
JS
4133 list_splice_init(&pring->txcmplq, &txcmplq);
4134 pring->txcmplq_cnt = 0;
4135 spin_unlock_irq(&pring->ring_lock);
4136
4137 /* Flush the txcmpq &&&PAE */
4138 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4139 IOSTAT_LOCAL_REJECT,
4140 IOERR_SLI_DOWN);
4141 }
4142}
4143
e59058c4 4144/**
3772a991 4145 * lpfc_sli_brdready_s3 - Check for sli3 host ready status
e59058c4
JS
4146 * @phba: Pointer to HBA context object.
4147 * @mask: Bit mask to be checked.
4148 *
4149 * This function reads the host status register and compares
4150 * with the provided bit mask to check if HBA completed
4151 * the restart. This function will wait in a loop for the
4152 * HBA to complete restart. If the HBA does not restart within
4153 * 15 iterations, the function will reset the HBA again. The
4154 * function returns 1 when HBA fail to restart otherwise returns
4155 * zero.
4156 **/
3772a991
JS
4157static int
4158lpfc_sli_brdready_s3(struct lpfc_hba *phba, uint32_t mask)
dea3101e 4159{
41415862
JW
4160 uint32_t status;
4161 int i = 0;
4162 int retval = 0;
dea3101e 4163
41415862 4164 /* Read the HBA Host Status Register */
9940b97b
JS
4165 if (lpfc_readl(phba->HSregaddr, &status))
4166 return 1;
dea3101e 4167
41415862
JW
4168 /*
4169 * Check status register every 100ms for 5 retries, then every
4170 * 500ms for 5, then every 2.5 sec for 5, then reset board and
4171 * every 2.5 sec for 4.
4172 * Break our of the loop if errors occurred during init.
4173 */
4174 while (((status & mask) != mask) &&
4175 !(status & HS_FFERM) &&
4176 i++ < 20) {
dea3101e 4177
41415862
JW
4178 if (i <= 5)
4179 msleep(10);
4180 else if (i <= 10)
4181 msleep(500);
4182 else
4183 msleep(2500);
dea3101e 4184
41415862 4185 if (i == 15) {
2e0fef85 4186 /* Do post */
92d7f7b0 4187 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW
4188 lpfc_sli_brdrestart(phba);
4189 }
4190 /* Read the HBA Host Status Register */
9940b97b
JS
4191 if (lpfc_readl(phba->HSregaddr, &status)) {
4192 retval = 1;
4193 break;
4194 }
41415862 4195 }
dea3101e 4196
41415862
JW
4197 /* Check to see if any errors occurred during init */
4198 if ((status & HS_FFERM) || (i >= 20)) {
e40a02c1
JS
4199 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4200 "2751 Adapter failed to restart, "
4201 "status reg x%x, FW Data: A8 x%x AC x%x\n",
4202 status,
4203 readl(phba->MBslimaddr + 0xa8),
4204 readl(phba->MBslimaddr + 0xac));
2e0fef85 4205 phba->link_state = LPFC_HBA_ERROR;
41415862 4206 retval = 1;
dea3101e 4207 }
dea3101e 4208
41415862
JW
4209 return retval;
4210}
dea3101e 4211
da0436e9
JS
4212/**
4213 * lpfc_sli_brdready_s4 - Check for sli4 host ready status
4214 * @phba: Pointer to HBA context object.
4215 * @mask: Bit mask to be checked.
4216 *
4217 * This function checks the host status register to check if HBA is
4218 * ready. This function will wait in a loop for the HBA to be ready
4219 * If the HBA is not ready , the function will will reset the HBA PCI
4220 * function again. The function returns 1 when HBA fail to be ready
4221 * otherwise returns zero.
4222 **/
4223static int
4224lpfc_sli_brdready_s4(struct lpfc_hba *phba, uint32_t mask)
4225{
4226 uint32_t status;
4227 int retval = 0;
4228
4229 /* Read the HBA Host Status Register */
4230 status = lpfc_sli4_post_status_check(phba);
4231
4232 if (status) {
4233 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
4234 lpfc_sli_brdrestart(phba);
4235 status = lpfc_sli4_post_status_check(phba);
4236 }
4237
4238 /* Check to see if any errors occurred during init */
4239 if (status) {
4240 phba->link_state = LPFC_HBA_ERROR;
4241 retval = 1;
4242 } else
4243 phba->sli4_hba.intr_enable = 0;
4244
4245 return retval;
4246}
4247
4248/**
4249 * lpfc_sli_brdready - Wrapper func for checking the hba readyness
4250 * @phba: Pointer to HBA context object.
4251 * @mask: Bit mask to be checked.
4252 *
4253 * This routine wraps the actual SLI3 or SLI4 hba readyness check routine
4254 * from the API jump table function pointer from the lpfc_hba struct.
4255 **/
4256int
4257lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
4258{
4259 return phba->lpfc_sli_brdready(phba, mask);
4260}
4261
9290831f
JS
4262#define BARRIER_TEST_PATTERN (0xdeadbeef)
4263
e59058c4 4264/**
3621a710 4265 * lpfc_reset_barrier - Make HBA ready for HBA reset
e59058c4
JS
4266 * @phba: Pointer to HBA context object.
4267 *
1b51197d
JS
4268 * This function is called before resetting an HBA. This function is called
4269 * with hbalock held and requests HBA to quiesce DMAs before a reset.
e59058c4 4270 **/
2e0fef85 4271void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 4272{
65a29c16
JS
4273 uint32_t __iomem *resp_buf;
4274 uint32_t __iomem *mbox_buf;
9290831f 4275 volatile uint32_t mbox;
9940b97b 4276 uint32_t hc_copy, ha_copy, resp_data;
9290831f
JS
4277 int i;
4278 uint8_t hdrtype;
4279
1c2ba475
JT
4280 lockdep_assert_held(&phba->hbalock);
4281
9290831f
JS
4282 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
4283 if (hdrtype != 0x80 ||
4284 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
4285 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
4286 return;
4287
4288 /*
4289 * Tell the other part of the chip to suspend temporarily all
4290 * its DMA activity.
4291 */
65a29c16 4292 resp_buf = phba->MBslimaddr;
9290831f
JS
4293
4294 /* Disable the error attention */
9940b97b
JS
4295 if (lpfc_readl(phba->HCregaddr, &hc_copy))
4296 return;
9290831f
JS
4297 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
4298 readl(phba->HCregaddr); /* flush */
2e0fef85 4299 phba->link_flag |= LS_IGNORE_ERATT;
9290831f 4300
9940b97b
JS
4301 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4302 return;
4303 if (ha_copy & HA_ERATT) {
9290831f
JS
4304 /* Clear Chip error bit */
4305 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4306 phba->pport->stopped = 1;
9290831f
JS
4307 }
4308
4309 mbox = 0;
4310 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
4311 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
4312
4313 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 4314 mbox_buf = phba->MBslimaddr;
9290831f
JS
4315 writel(mbox, mbox_buf);
4316
9940b97b
JS
4317 for (i = 0; i < 50; i++) {
4318 if (lpfc_readl((resp_buf + 1), &resp_data))
4319 return;
4320 if (resp_data != ~(BARRIER_TEST_PATTERN))
4321 mdelay(1);
4322 else
4323 break;
4324 }
4325 resp_data = 0;
4326 if (lpfc_readl((resp_buf + 1), &resp_data))
4327 return;
4328 if (resp_data != ~(BARRIER_TEST_PATTERN)) {
f4b4c68f 4329 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE ||
2e0fef85 4330 phba->pport->stopped)
9290831f
JS
4331 goto restore_hc;
4332 else
4333 goto clear_errat;
4334 }
4335
4336 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
9940b97b
JS
4337 resp_data = 0;
4338 for (i = 0; i < 500; i++) {
4339 if (lpfc_readl(resp_buf, &resp_data))
4340 return;
4341 if (resp_data != mbox)
4342 mdelay(1);
4343 else
4344 break;
4345 }
9290831f
JS
4346
4347clear_errat:
4348
9940b97b
JS
4349 while (++i < 500) {
4350 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4351 return;
4352 if (!(ha_copy & HA_ERATT))
4353 mdelay(1);
4354 else
4355 break;
4356 }
9290831f
JS
4357
4358 if (readl(phba->HAregaddr) & HA_ERATT) {
4359 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4360 phba->pport->stopped = 1;
9290831f
JS
4361 }
4362
4363restore_hc:
2e0fef85 4364 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS
4365 writel(hc_copy, phba->HCregaddr);
4366 readl(phba->HCregaddr); /* flush */
4367}
4368
e59058c4 4369/**
3621a710 4370 * lpfc_sli_brdkill - Issue a kill_board mailbox command
e59058c4
JS
4371 * @phba: Pointer to HBA context object.
4372 *
4373 * This function issues a kill_board mailbox command and waits for
4374 * the error attention interrupt. This function is called for stopping
4375 * the firmware processing. The caller is not required to hold any
4376 * locks. This function calls lpfc_hba_down_post function to free
4377 * any pending commands after the kill. The function will return 1 when it
4378 * fails to kill the board else will return 0.
4379 **/
41415862 4380int
2e0fef85 4381lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW
4382{
4383 struct lpfc_sli *psli;
4384 LPFC_MBOXQ_t *pmb;
4385 uint32_t status;
4386 uint32_t ha_copy;
4387 int retval;
4388 int i = 0;
dea3101e 4389
41415862 4390 psli = &phba->sli;
dea3101e 4391
41415862 4392 /* Kill HBA */
ed957684 4393 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS
4394 "0329 Kill HBA Data: x%x x%x\n",
4395 phba->pport->port_state, psli->sli_flag);
41415862 4396
98c9ea5c
JS
4397 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4398 if (!pmb)
41415862 4399 return 1;
41415862
JW
4400
4401 /* Disable the error attention */
2e0fef85 4402 spin_lock_irq(&phba->hbalock);
9940b97b
JS
4403 if (lpfc_readl(phba->HCregaddr, &status)) {
4404 spin_unlock_irq(&phba->hbalock);
4405 mempool_free(pmb, phba->mbox_mem_pool);
4406 return 1;
4407 }
41415862
JW
4408 status &= ~HC_ERINT_ENA;
4409 writel(status, phba->HCregaddr);
4410 readl(phba->HCregaddr); /* flush */
2e0fef85
JS
4411 phba->link_flag |= LS_IGNORE_ERATT;
4412 spin_unlock_irq(&phba->hbalock);
41415862
JW
4413
4414 lpfc_kill_board(phba, pmb);
4415 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
4416 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4417
4418 if (retval != MBX_SUCCESS) {
4419 if (retval != MBX_BUSY)
4420 mempool_free(pmb, phba->mbox_mem_pool);
e40a02c1
JS
4421 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4422 "2752 KILL_BOARD command failed retval %d\n",
4423 retval);
2e0fef85
JS
4424 spin_lock_irq(&phba->hbalock);
4425 phba->link_flag &= ~LS_IGNORE_ERATT;
4426 spin_unlock_irq(&phba->hbalock);
41415862
JW
4427 return 1;
4428 }
4429
f4b4c68f
JS
4430 spin_lock_irq(&phba->hbalock);
4431 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
4432 spin_unlock_irq(&phba->hbalock);
9290831f 4433
41415862
JW
4434 mempool_free(pmb, phba->mbox_mem_pool);
4435
4436 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
4437 * attention every 100ms for 3 seconds. If we don't get ERATT after
4438 * 3 seconds we still set HBA_ERROR state because the status of the
4439 * board is now undefined.
4440 */
9940b97b
JS
4441 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4442 return 1;
41415862
JW
4443 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
4444 mdelay(100);
9940b97b
JS
4445 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4446 return 1;
41415862
JW
4447 }
4448
4449 del_timer_sync(&psli->mbox_tmo);
9290831f
JS
4450 if (ha_copy & HA_ERATT) {
4451 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4452 phba->pport->stopped = 1;
9290831f 4453 }
2e0fef85 4454 spin_lock_irq(&phba->hbalock);
41415862 4455 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
04c68496 4456 psli->mbox_active = NULL;
2e0fef85
JS
4457 phba->link_flag &= ~LS_IGNORE_ERATT;
4458 spin_unlock_irq(&phba->hbalock);
41415862 4459
41415862 4460 lpfc_hba_down_post(phba);
2e0fef85 4461 phba->link_state = LPFC_HBA_ERROR;
41415862 4462
2e0fef85 4463 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB
4464}
4465
e59058c4 4466/**
3772a991 4467 * lpfc_sli_brdreset - Reset a sli-2 or sli-3 HBA
e59058c4
JS
4468 * @phba: Pointer to HBA context object.
4469 *
4470 * This function resets the HBA by writing HC_INITFF to the control
4471 * register. After the HBA resets, this function resets all the iocb ring
4472 * indices. This function disables PCI layer parity checking during
4473 * the reset.
4474 * This function returns 0 always.
4475 * The caller is not required to hold any locks.
4476 **/
41415862 4477int
2e0fef85 4478lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 4479{
41415862 4480 struct lpfc_sli *psli;
dea3101e 4481 struct lpfc_sli_ring *pring;
41415862 4482 uint16_t cfg_value;
dea3101e 4483 int i;
dea3101e 4484
41415862 4485 psli = &phba->sli;
dea3101e 4486
41415862
JW
4487 /* Reset HBA */
4488 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4489 "0325 Reset HBA Data: x%x x%x\n",
4492b739
JS
4490 (phba->pport) ? phba->pport->port_state : 0,
4491 psli->sli_flag);
dea3101e
JB
4492
4493 /* perform board reset */
4494 phba->fc_eventTag = 0;
4d9ab994 4495 phba->link_events = 0;
4492b739
JS
4496 if (phba->pport) {
4497 phba->pport->fc_myDID = 0;
4498 phba->pport->fc_prevDID = 0;
4499 }
dea3101e 4500
41415862
JW
4501 /* Turn off parity checking and serr during the physical reset */
4502 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
4503 pci_write_config_word(phba->pcidev, PCI_COMMAND,
4504 (cfg_value &
4505 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4506
3772a991
JS
4507 psli->sli_flag &= ~(LPFC_SLI_ACTIVE | LPFC_PROCESS_LA);
4508
41415862
JW
4509 /* Now toggle INITFF bit in the Host Control Register */
4510 writel(HC_INITFF, phba->HCregaddr);
4511 mdelay(1);
4512 readl(phba->HCregaddr); /* flush */
4513 writel(0, phba->HCregaddr);
4514 readl(phba->HCregaddr); /* flush */
4515
4516 /* Restore PCI cmd register */
4517 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB
4518
4519 /* Initialize relevant SLI info */
41415862 4520 for (i = 0; i < psli->num_rings; i++) {
895427bd 4521 pring = &psli->sli3_ring[i];
dea3101e 4522 pring->flag = 0;
7e56aa25
JS
4523 pring->sli.sli3.rspidx = 0;
4524 pring->sli.sli3.next_cmdidx = 0;
4525 pring->sli.sli3.local_getidx = 0;
4526 pring->sli.sli3.cmdidx = 0;
dea3101e
JB
4527 pring->missbufcnt = 0;
4528 }
dea3101e 4529
2e0fef85 4530 phba->link_state = LPFC_WARM_START;
41415862
JW
4531 return 0;
4532}
4533
e59058c4 4534/**
da0436e9
JS
4535 * lpfc_sli4_brdreset - Reset a sli-4 HBA
4536 * @phba: Pointer to HBA context object.
4537 *
4538 * This function resets a SLI4 HBA. This function disables PCI layer parity
4539 * checking during resets the device. The caller is not required to hold
4540 * any locks.
4541 *
4542 * This function returns 0 always.
4543 **/
4544int
4545lpfc_sli4_brdreset(struct lpfc_hba *phba)
4546{
4547 struct lpfc_sli *psli = &phba->sli;
4548 uint16_t cfg_value;
0293635e 4549 int rc = 0;
da0436e9
JS
4550
4551 /* Reset HBA */
4552 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
0293635e
JS
4553 "0295 Reset HBA Data: x%x x%x x%x\n",
4554 phba->pport->port_state, psli->sli_flag,
4555 phba->hba_flag);
da0436e9
JS
4556
4557 /* perform board reset */
4558 phba->fc_eventTag = 0;
4d9ab994 4559 phba->link_events = 0;
da0436e9
JS
4560 phba->pport->fc_myDID = 0;
4561 phba->pport->fc_prevDID = 0;
4562
da0436e9
JS
4563 spin_lock_irq(&phba->hbalock);
4564 psli->sli_flag &= ~(LPFC_PROCESS_LA);
4565 phba->fcf.fcf_flag = 0;
da0436e9
JS
4566 spin_unlock_irq(&phba->hbalock);
4567
0293635e
JS
4568 /* SLI4 INTF 2: if FW dump is being taken skip INIT_PORT */
4569 if (phba->hba_flag & HBA_FW_DUMP_OP) {
4570 phba->hba_flag &= ~HBA_FW_DUMP_OP;
4571 return rc;
4572 }
4573
da0436e9
JS
4574 /* Now physically reset the device */
4575 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4576 "0389 Performing PCI function reset!\n");
be858b65
JS
4577
4578 /* Turn off parity checking and serr during the physical reset */
4579 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
4580 pci_write_config_word(phba->pcidev, PCI_COMMAND, (cfg_value &
4581 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4582
88318816 4583 /* Perform FCoE PCI function reset before freeing queue memory */
27b01b82 4584 rc = lpfc_pci_function_reset(phba);
da0436e9 4585
be858b65
JS
4586 /* Restore PCI cmd register */
4587 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
4588
27b01b82 4589 return rc;
da0436e9
JS
4590}
4591
4592/**
4593 * lpfc_sli_brdrestart_s3 - Restart a sli-3 hba
e59058c4
JS
4594 * @phba: Pointer to HBA context object.
4595 *
4596 * This function is called in the SLI initialization code path to
4597 * restart the HBA. The caller is not required to hold any lock.
4598 * This function writes MBX_RESTART mailbox command to the SLIM and
4599 * resets the HBA. At the end of the function, it calls lpfc_hba_down_post
4600 * function to free any pending commands. The function enables
4601 * POST only during the first initialization. The function returns zero.
4602 * The function does not guarantee completion of MBX_RESTART mailbox
4603 * command before the return of this function.
4604 **/
da0436e9
JS
4605static int
4606lpfc_sli_brdrestart_s3(struct lpfc_hba *phba)
41415862
JW
4607{
4608 MAILBOX_t *mb;
4609 struct lpfc_sli *psli;
41415862
JW
4610 volatile uint32_t word0;
4611 void __iomem *to_slim;
0d878419 4612 uint32_t hba_aer_enabled;
41415862 4613
2e0fef85 4614 spin_lock_irq(&phba->hbalock);
41415862 4615
0d878419
JS
4616 /* Take PCIe device Advanced Error Reporting (AER) state */
4617 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4618
41415862
JW
4619 psli = &phba->sli;
4620
4621 /* Restart HBA */
4622 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4623 "0337 Restart HBA Data: x%x x%x\n",
4492b739
JS
4624 (phba->pport) ? phba->pport->port_state : 0,
4625 psli->sli_flag);
41415862
JW
4626
4627 word0 = 0;
4628 mb = (MAILBOX_t *) &word0;
4629 mb->mbxCommand = MBX_RESTART;
4630 mb->mbxHc = 1;
4631
9290831f
JS
4632 lpfc_reset_barrier(phba);
4633
41415862
JW
4634 to_slim = phba->MBslimaddr;
4635 writel(*(uint32_t *) mb, to_slim);
4636 readl(to_slim); /* flush */
4637
4638 /* Only skip post after fc_ffinit is completed */
4492b739 4639 if (phba->pport && phba->pport->port_state)
41415862 4640 word0 = 1; /* This is really setting up word1 */
eaf15d5b 4641 else
41415862 4642 word0 = 0; /* This is really setting up word1 */
65a29c16 4643 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW
4644 writel(*(uint32_t *) mb, to_slim);
4645 readl(to_slim); /* flush */
dea3101e 4646
41415862 4647 lpfc_sli_brdreset(phba);
4492b739
JS
4648 if (phba->pport)
4649 phba->pport->stopped = 0;
2e0fef85 4650 phba->link_state = LPFC_INIT_START;
da0436e9 4651 phba->hba_flag = 0;
2e0fef85 4652 spin_unlock_irq(&phba->hbalock);
41415862 4653
64ba8818 4654 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4655 psli->stats_start = ktime_get_seconds();
64ba8818 4656
eaf15d5b
JS
4657 /* Give the INITFF and Post time to settle. */
4658 mdelay(100);
41415862 4659
0d878419
JS
4660 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4661 if (hba_aer_enabled)
4662 pci_disable_pcie_error_reporting(phba->pcidev);
4663
41415862 4664 lpfc_hba_down_post(phba);
dea3101e
JB
4665
4666 return 0;
4667}
4668
da0436e9
JS
4669/**
4670 * lpfc_sli_brdrestart_s4 - Restart the sli-4 hba
4671 * @phba: Pointer to HBA context object.
4672 *
4673 * This function is called in the SLI initialization code path to restart
4674 * a SLI4 HBA. The caller is not required to hold any lock.
4675 * At the end of the function, it calls lpfc_hba_down_post function to
4676 * free any pending commands.
4677 **/
4678static int
4679lpfc_sli_brdrestart_s4(struct lpfc_hba *phba)
4680{
4681 struct lpfc_sli *psli = &phba->sli;
75baf696 4682 uint32_t hba_aer_enabled;
27b01b82 4683 int rc;
da0436e9
JS
4684
4685 /* Restart HBA */
4686 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4687 "0296 Restart HBA Data: x%x x%x\n",
4688 phba->pport->port_state, psli->sli_flag);
4689
75baf696
JS
4690 /* Take PCIe device Advanced Error Reporting (AER) state */
4691 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4692
27b01b82 4693 rc = lpfc_sli4_brdreset(phba);
5a9eeff5
JS
4694 if (rc)
4695 return rc;
da0436e9
JS
4696
4697 spin_lock_irq(&phba->hbalock);
4698 phba->pport->stopped = 0;
4699 phba->link_state = LPFC_INIT_START;
4700 phba->hba_flag = 0;
4701 spin_unlock_irq(&phba->hbalock);
4702
4703 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4704 psli->stats_start = ktime_get_seconds();
da0436e9 4705
75baf696
JS
4706 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4707 if (hba_aer_enabled)
4708 pci_disable_pcie_error_reporting(phba->pcidev);
4709
da0436e9 4710 lpfc_hba_down_post(phba);
569dbe84 4711 lpfc_sli4_queue_destroy(phba);
da0436e9 4712
27b01b82 4713 return rc;
da0436e9
JS
4714}
4715
4716/**
4717 * lpfc_sli_brdrestart - Wrapper func for restarting hba
4718 * @phba: Pointer to HBA context object.
4719 *
4720 * This routine wraps the actual SLI3 or SLI4 hba restart routine from the
4721 * API jump table function pointer from the lpfc_hba struct.
4722**/
4723int
4724lpfc_sli_brdrestart(struct lpfc_hba *phba)
4725{
4726 return phba->lpfc_sli_brdrestart(phba);
4727}
4728
e59058c4 4729/**
3621a710 4730 * lpfc_sli_chipset_init - Wait for the restart of the HBA after a restart
e59058c4
JS
4731 * @phba: Pointer to HBA context object.
4732 *
4733 * This function is called after a HBA restart to wait for successful
4734 * restart of the HBA. Successful restart of the HBA is indicated by
4735 * HS_FFRDY and HS_MBRDY bits. If the HBA fails to restart even after 15
4736 * iteration, the function will restart the HBA again. The function returns
4737 * zero if HBA successfully restarted else returns negative error code.
4738 **/
4492b739 4739int
dea3101e
JB
4740lpfc_sli_chipset_init(struct lpfc_hba *phba)
4741{
4742 uint32_t status, i = 0;
4743
4744 /* Read the HBA Host Status Register */
9940b97b
JS
4745 if (lpfc_readl(phba->HSregaddr, &status))
4746 return -EIO;
dea3101e
JB
4747
4748 /* Check status register to see what current state is */
4749 i = 0;
4750 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
4751
dcf2a4e0
JS
4752 /* Check every 10ms for 10 retries, then every 100ms for 90
4753 * retries, then every 1 sec for 50 retires for a total of
4754 * ~60 seconds before reset the board again and check every
4755 * 1 sec for 50 retries. The up to 60 seconds before the
4756 * board ready is required by the Falcon FIPS zeroization
4757 * complete, and any reset the board in between shall cause
4758 * restart of zeroization, further delay the board ready.
dea3101e 4759 */
dcf2a4e0 4760 if (i++ >= 200) {
dea3101e
JB
4761 /* Adapter failed to init, timeout, status reg
4762 <status> */
ed957684 4763 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4764 "0436 Adapter failed to init, "
09372820
JS
4765 "timeout, status reg x%x, "
4766 "FW Data: A8 x%x AC x%x\n", status,
4767 readl(phba->MBslimaddr + 0xa8),
4768 readl(phba->MBslimaddr + 0xac));
2e0fef85 4769 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4770 return -ETIMEDOUT;
4771 }
4772
4773 /* Check to see if any errors occurred during init */
4774 if (status & HS_FFERM) {
4775 /* ERROR: During chipset initialization */
4776 /* Adapter failed to init, chipset, status reg
4777 <status> */
ed957684 4778 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4779 "0437 Adapter failed to init, "
09372820
JS
4780 "chipset, status reg x%x, "
4781 "FW Data: A8 x%x AC x%x\n", status,
4782 readl(phba->MBslimaddr + 0xa8),
4783 readl(phba->MBslimaddr + 0xac));
2e0fef85 4784 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4785 return -EIO;
4786 }
4787
dcf2a4e0 4788 if (i <= 10)
dea3101e 4789 msleep(10);
dcf2a4e0
JS
4790 else if (i <= 100)
4791 msleep(100);
4792 else
4793 msleep(1000);
dea3101e 4794
dcf2a4e0
JS
4795 if (i == 150) {
4796 /* Do post */
92d7f7b0 4797 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4798 lpfc_sli_brdrestart(phba);
dea3101e
JB
4799 }
4800 /* Read the HBA Host Status Register */
9940b97b
JS
4801 if (lpfc_readl(phba->HSregaddr, &status))
4802 return -EIO;
dea3101e
JB
4803 }
4804
4805 /* Check to see if any errors occurred during init */
4806 if (status & HS_FFERM) {
4807 /* ERROR: During chipset initialization */
4808 /* Adapter failed to init, chipset, status reg <status> */
ed957684 4809 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4810 "0438 Adapter failed to init, chipset, "
09372820
JS
4811 "status reg x%x, "
4812 "FW Data: A8 x%x AC x%x\n", status,
4813 readl(phba->MBslimaddr + 0xa8),
4814 readl(phba->MBslimaddr + 0xac));
2e0fef85 4815 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4816 return -EIO;
4817 }
4818
4819 /* Clear all interrupt enable conditions */
4820 writel(0, phba->HCregaddr);
4821 readl(phba->HCregaddr); /* flush */
4822
4823 /* setup host attn register */
4824 writel(0xffffffff, phba->HAregaddr);
4825 readl(phba->HAregaddr); /* flush */
4826 return 0;
4827}
4828
e59058c4 4829/**
3621a710 4830 * lpfc_sli_hbq_count - Get the number of HBQs to be configured
e59058c4
JS
4831 *
4832 * This function calculates and returns the number of HBQs required to be
4833 * configured.
4834 **/
78b2d852 4835int
ed957684
JS
4836lpfc_sli_hbq_count(void)
4837{
92d7f7b0 4838 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS
4839}
4840
e59058c4 4841/**
3621a710 4842 * lpfc_sli_hbq_entry_count - Calculate total number of hbq entries
e59058c4
JS
4843 *
4844 * This function adds the number of hbq entries in every HBQ to get
4845 * the total number of hbq entries required for the HBA and returns
4846 * the total count.
4847 **/
ed957684
JS
4848static int
4849lpfc_sli_hbq_entry_count(void)
4850{
4851 int hbq_count = lpfc_sli_hbq_count();
4852 int count = 0;
4853 int i;
4854
4855 for (i = 0; i < hbq_count; ++i)
92d7f7b0 4856 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS
4857 return count;
4858}
4859
e59058c4 4860/**
3621a710 4861 * lpfc_sli_hbq_size - Calculate memory required for all hbq entries
e59058c4
JS
4862 *
4863 * This function calculates amount of memory required for all hbq entries
4864 * to be configured and returns the total memory required.
4865 **/
dea3101e 4866int
ed957684
JS
4867lpfc_sli_hbq_size(void)
4868{
4869 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
4870}
4871
e59058c4 4872/**
3621a710 4873 * lpfc_sli_hbq_setup - configure and initialize HBQs
e59058c4
JS
4874 * @phba: Pointer to HBA context object.
4875 *
4876 * This function is called during the SLI initialization to configure
4877 * all the HBQs and post buffers to the HBQ. The caller is not
4878 * required to hold any locks. This function will return zero if successful
4879 * else it will return negative error code.
4880 **/
ed957684
JS
4881static int
4882lpfc_sli_hbq_setup(struct lpfc_hba *phba)
4883{
4884 int hbq_count = lpfc_sli_hbq_count();
4885 LPFC_MBOXQ_t *pmb;
4886 MAILBOX_t *pmbox;
4887 uint32_t hbqno;
4888 uint32_t hbq_entry_index;
ed957684 4889
92d7f7b0
JS
4890 /* Get a Mailbox buffer to setup mailbox
4891 * commands for HBA initialization
4892 */
ed957684
JS
4893 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4894
4895 if (!pmb)
4896 return -ENOMEM;
4897
04c68496 4898 pmbox = &pmb->u.mb;
ed957684
JS
4899
4900 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
4901 phba->link_state = LPFC_INIT_MBX_CMDS;
3163f725 4902 phba->hbq_in_use = 1;
ed957684
JS
4903
4904 hbq_entry_index = 0;
4905 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
4906 phba->hbqs[hbqno].next_hbqPutIdx = 0;
4907 phba->hbqs[hbqno].hbqPutIdx = 0;
4908 phba->hbqs[hbqno].local_hbqGetIdx = 0;
4909 phba->hbqs[hbqno].entry_count =
92d7f7b0 4910 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS
4911 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
4912 hbq_entry_index, pmb);
ed957684
JS
4913 hbq_entry_index += phba->hbqs[hbqno].entry_count;
4914
4915 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
4916 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
4917 mbxStatus <status>, ring <num> */
4918
4919 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 4920 LOG_SLI | LOG_VPORT,
e8b62011 4921 "1805 Adapter failed to init. "
ed957684 4922 "Data: x%x x%x x%x\n",
e8b62011 4923 pmbox->mbxCommand,
ed957684
JS
4924 pmbox->mbxStatus, hbqno);
4925
4926 phba->link_state = LPFC_HBA_ERROR;
4927 mempool_free(pmb, phba->mbox_mem_pool);
6e7288d9 4928 return -ENXIO;
ed957684
JS
4929 }
4930 }
4931 phba->hbq_count = hbq_count;
4932
ed957684
JS
4933 mempool_free(pmb, phba->mbox_mem_pool);
4934
92d7f7b0 4935 /* Initially populate or replenish the HBQs */
d7c255b2
JS
4936 for (hbqno = 0; hbqno < hbq_count; ++hbqno)
4937 lpfc_sli_hbqbuf_init_hbqs(phba, hbqno);
ed957684
JS
4938 return 0;
4939}
4940
4f774513
JS
4941/**
4942 * lpfc_sli4_rb_setup - Initialize and post RBs to HBA
4943 * @phba: Pointer to HBA context object.
4944 *
4945 * This function is called during the SLI initialization to configure
4946 * all the HBQs and post buffers to the HBQ. The caller is not
4947 * required to hold any locks. This function will return zero if successful
4948 * else it will return negative error code.
4949 **/
4950static int
4951lpfc_sli4_rb_setup(struct lpfc_hba *phba)
4952{
4953 phba->hbq_in_use = 1;
895427bd
JS
4954 phba->hbqs[LPFC_ELS_HBQ].entry_count =
4955 lpfc_hbq_defs[LPFC_ELS_HBQ]->entry_count;
4f774513 4956 phba->hbq_count = 1;
895427bd 4957 lpfc_sli_hbqbuf_init_hbqs(phba, LPFC_ELS_HBQ);
4f774513 4958 /* Initially populate or replenish the HBQs */
4f774513
JS
4959 return 0;
4960}
4961
e59058c4 4962/**
3621a710 4963 * lpfc_sli_config_port - Issue config port mailbox command
e59058c4
JS
4964 * @phba: Pointer to HBA context object.
4965 * @sli_mode: sli mode - 2/3
4966 *
183b8021 4967 * This function is called by the sli initialization code path
e59058c4
JS
4968 * to issue config_port mailbox command. This function restarts the
4969 * HBA firmware and issues a config_port mailbox command to configure
4970 * the SLI interface in the sli mode specified by sli_mode
4971 * variable. The caller is not required to hold any locks.
4972 * The function returns 0 if successful, else returns negative error
4973 * code.
4974 **/
9399627f
JS
4975int
4976lpfc_sli_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB
4977{
4978 LPFC_MBOXQ_t *pmb;
4979 uint32_t resetcount = 0, rc = 0, done = 0;
4980
4981 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4982 if (!pmb) {
2e0fef85 4983 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4984 return -ENOMEM;
4985 }
4986
ed957684 4987 phba->sli_rev = sli_mode;
dea3101e 4988 while (resetcount < 2 && !done) {
2e0fef85 4989 spin_lock_irq(&phba->hbalock);
1c067a42 4990 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 4991 spin_unlock_irq(&phba->hbalock);
92d7f7b0 4992 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4993 lpfc_sli_brdrestart(phba);
dea3101e
JB
4994 rc = lpfc_sli_chipset_init(phba);
4995 if (rc)
4996 break;
4997
2e0fef85 4998 spin_lock_irq(&phba->hbalock);
1c067a42 4999 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 5000 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
5001 resetcount++;
5002
ed957684
JS
5003 /* Call pre CONFIG_PORT mailbox command initialization. A
5004 * value of 0 means the call was successful. Any other
5005 * nonzero value is a failure, but if ERESTART is returned,
5006 * the driver may reset the HBA and try again.
5007 */
dea3101e
JB
5008 rc = lpfc_config_port_prep(phba);
5009 if (rc == -ERESTART) {
ed957684 5010 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e 5011 continue;
34b02dcd 5012 } else if (rc)
dea3101e 5013 break;
6d368e53 5014
2e0fef85 5015 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
5016 lpfc_config_port(phba, pmb);
5017 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
34b02dcd
JS
5018 phba->sli3_options &= ~(LPFC_SLI3_NPIV_ENABLED |
5019 LPFC_SLI3_HBQ_ENABLED |
5020 LPFC_SLI3_CRP_ENABLED |
bc73905a 5021 LPFC_SLI3_DSS_ENABLED);
ed957684 5022 if (rc != MBX_SUCCESS) {
dea3101e 5023 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 5024 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 5025 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
04c68496 5026 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus, 0);
2e0fef85 5027 spin_lock_irq(&phba->hbalock);
04c68496 5028 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
2e0fef85
JS
5029 spin_unlock_irq(&phba->hbalock);
5030 rc = -ENXIO;
04c68496
JS
5031 } else {
5032 /* Allow asynchronous mailbox command to go through */
5033 spin_lock_irq(&phba->hbalock);
5034 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
5035 spin_unlock_irq(&phba->hbalock);
ed957684 5036 done = 1;
cb69f7de
JS
5037
5038 if ((pmb->u.mb.un.varCfgPort.casabt == 1) &&
5039 (pmb->u.mb.un.varCfgPort.gasabt == 0))
5040 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5041 "3110 Port did not grant ASABT\n");
04c68496 5042 }
dea3101e 5043 }
ed957684
JS
5044 if (!done) {
5045 rc = -EINVAL;
5046 goto do_prep_failed;
5047 }
04c68496
JS
5048 if (pmb->u.mb.un.varCfgPort.sli_mode == 3) {
5049 if (!pmb->u.mb.un.varCfgPort.cMA) {
34b02dcd
JS
5050 rc = -ENXIO;
5051 goto do_prep_failed;
5052 }
04c68496 5053 if (phba->max_vpi && pmb->u.mb.un.varCfgPort.gmv) {
34b02dcd 5054 phba->sli3_options |= LPFC_SLI3_NPIV_ENABLED;
04c68496
JS
5055 phba->max_vpi = pmb->u.mb.un.varCfgPort.max_vpi;
5056 phba->max_vports = (phba->max_vpi > phba->max_vports) ?
5057 phba->max_vpi : phba->max_vports;
5058
34b02dcd
JS
5059 } else
5060 phba->max_vpi = 0;
bc73905a
JS
5061 phba->fips_level = 0;
5062 phba->fips_spec_rev = 0;
5063 if (pmb->u.mb.un.varCfgPort.gdss) {
04c68496 5064 phba->sli3_options |= LPFC_SLI3_DSS_ENABLED;
bc73905a
JS
5065 phba->fips_level = pmb->u.mb.un.varCfgPort.fips_level;
5066 phba->fips_spec_rev = pmb->u.mb.un.varCfgPort.fips_rev;
5067 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5068 "2850 Security Crypto Active. FIPS x%d "
5069 "(Spec Rev: x%d)",
5070 phba->fips_level, phba->fips_spec_rev);
5071 }
5072 if (pmb->u.mb.un.varCfgPort.sec_err) {
5073 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5074 "2856 Config Port Security Crypto "
5075 "Error: x%x ",
5076 pmb->u.mb.un.varCfgPort.sec_err);
5077 }
04c68496 5078 if (pmb->u.mb.un.varCfgPort.gerbm)
34b02dcd 5079 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
04c68496 5080 if (pmb->u.mb.un.varCfgPort.gcrp)
34b02dcd 5081 phba->sli3_options |= LPFC_SLI3_CRP_ENABLED;
6e7288d9
JS
5082
5083 phba->hbq_get = phba->mbox->us.s3_pgp.hbq_get;
5084 phba->port_gp = phba->mbox->us.s3_pgp.port;
e2a0a9d6 5085
f44ac12f
JS
5086 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
5087 if (pmb->u.mb.un.varCfgPort.gbg == 0) {
5088 phba->cfg_enable_bg = 0;
5089 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
e2a0a9d6
JS
5090 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5091 "0443 Adapter did not grant "
5092 "BlockGuard\n");
f44ac12f 5093 }
e2a0a9d6 5094 }
34b02dcd 5095 } else {
8f34f4ce 5096 phba->hbq_get = NULL;
34b02dcd 5097 phba->port_gp = phba->mbox->us.s2.port;
d7c255b2 5098 phba->max_vpi = 0;
ed957684 5099 }
92d7f7b0 5100do_prep_failed:
ed957684
JS
5101 mempool_free(pmb, phba->mbox_mem_pool);
5102 return rc;
5103}
5104
e59058c4
JS
5105
5106/**
183b8021 5107 * lpfc_sli_hba_setup - SLI initialization function
e59058c4
JS
5108 * @phba: Pointer to HBA context object.
5109 *
183b8021
MY
5110 * This function is the main SLI initialization function. This function
5111 * is called by the HBA initialization code, HBA reset code and HBA
e59058c4
JS
5112 * error attention handler code. Caller is not required to hold any
5113 * locks. This function issues config_port mailbox command to configure
5114 * the SLI, setup iocb rings and HBQ rings. In the end the function
5115 * calls the config_port_post function to issue init_link mailbox
5116 * command and to start the discovery. The function will return zero
5117 * if successful, else it will return negative error code.
5118 **/
ed957684
JS
5119int
5120lpfc_sli_hba_setup(struct lpfc_hba *phba)
5121{
5122 uint32_t rc;
6d368e53
JS
5123 int mode = 3, i;
5124 int longs;
ed957684 5125
12247e81 5126 switch (phba->cfg_sli_mode) {
ed957684 5127 case 2:
78b2d852 5128 if (phba->cfg_enable_npiv) {
92d7f7b0 5129 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81 5130 "1824 NPIV enabled: Override sli_mode "
92d7f7b0 5131 "parameter (%d) to auto (0).\n",
12247e81 5132 phba->cfg_sli_mode);
92d7f7b0
JS
5133 break;
5134 }
ed957684
JS
5135 mode = 2;
5136 break;
5137 case 0:
5138 case 3:
5139 break;
5140 default:
92d7f7b0 5141 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81
JS
5142 "1819 Unrecognized sli_mode parameter: %d.\n",
5143 phba->cfg_sli_mode);
ed957684
JS
5144
5145 break;
5146 }
b5c53958 5147 phba->fcp_embed_io = 0; /* SLI4 FC support only */
ed957684 5148
9399627f
JS
5149 rc = lpfc_sli_config_port(phba, mode);
5150
12247e81 5151 if (rc && phba->cfg_sli_mode == 3)
92d7f7b0 5152 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS
5153 "1820 Unable to select SLI-3. "
5154 "Not supported by adapter.\n");
ed957684 5155 if (rc && mode != 2)
9399627f 5156 rc = lpfc_sli_config_port(phba, 2);
4597663f
JS
5157 else if (rc && mode == 2)
5158 rc = lpfc_sli_config_port(phba, 3);
ed957684 5159 if (rc)
dea3101e
JB
5160 goto lpfc_sli_hba_setup_error;
5161
0d878419
JS
5162 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
5163 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
5164 rc = pci_enable_pcie_error_reporting(phba->pcidev);
5165 if (!rc) {
5166 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5167 "2709 This device supports "
5168 "Advanced Error Reporting (AER)\n");
5169 spin_lock_irq(&phba->hbalock);
5170 phba->hba_flag |= HBA_AER_ENABLED;
5171 spin_unlock_irq(&phba->hbalock);
5172 } else {
5173 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5174 "2708 This device does not support "
b069d7eb
JS
5175 "Advanced Error Reporting (AER): %d\n",
5176 rc);
0d878419
JS
5177 phba->cfg_aer_support = 0;
5178 }
5179 }
5180
ed957684
JS
5181 if (phba->sli_rev == 3) {
5182 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
5183 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
ed957684
JS
5184 } else {
5185 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
5186 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 5187 phba->sli3_options = 0;
ed957684
JS
5188 }
5189
5190 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
5191 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
5192 phba->sli_rev, phba->max_vpi);
ed957684 5193 rc = lpfc_sli_ring_map(phba);
dea3101e
JB
5194
5195 if (rc)
5196 goto lpfc_sli_hba_setup_error;
5197
6d368e53
JS
5198 /* Initialize VPIs. */
5199 if (phba->sli_rev == LPFC_SLI_REV3) {
5200 /*
5201 * The VPI bitmask and physical ID array are allocated
5202 * and initialized once only - at driver load. A port
5203 * reset doesn't need to reinitialize this memory.
5204 */
5205 if ((phba->vpi_bmask == NULL) && (phba->vpi_ids == NULL)) {
5206 longs = (phba->max_vpi + BITS_PER_LONG) / BITS_PER_LONG;
6396bb22
KC
5207 phba->vpi_bmask = kcalloc(longs,
5208 sizeof(unsigned long),
6d368e53
JS
5209 GFP_KERNEL);
5210 if (!phba->vpi_bmask) {
5211 rc = -ENOMEM;
5212 goto lpfc_sli_hba_setup_error;
5213 }
5214
6396bb22
KC
5215 phba->vpi_ids = kcalloc(phba->max_vpi + 1,
5216 sizeof(uint16_t),
5217 GFP_KERNEL);
6d368e53
JS
5218 if (!phba->vpi_ids) {
5219 kfree(phba->vpi_bmask);
5220 rc = -ENOMEM;
5221 goto lpfc_sli_hba_setup_error;
5222 }
5223 for (i = 0; i < phba->max_vpi; i++)
5224 phba->vpi_ids[i] = i;
5225 }
5226 }
5227
9399627f 5228 /* Init HBQs */
ed957684
JS
5229 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
5230 rc = lpfc_sli_hbq_setup(phba);
5231 if (rc)
5232 goto lpfc_sli_hba_setup_error;
5233 }
04c68496 5234 spin_lock_irq(&phba->hbalock);
dea3101e 5235 phba->sli.sli_flag |= LPFC_PROCESS_LA;
04c68496 5236 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
5237
5238 rc = lpfc_config_port_post(phba);
5239 if (rc)
5240 goto lpfc_sli_hba_setup_error;
5241
ed957684
JS
5242 return rc;
5243
92d7f7b0 5244lpfc_sli_hba_setup_error:
2e0fef85 5245 phba->link_state = LPFC_HBA_ERROR;
e40a02c1 5246 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 5247 "0445 Firmware initialization failed\n");
dea3101e
JB
5248 return rc;
5249}
5250
e59058c4 5251/**
da0436e9
JS
5252 * lpfc_sli4_read_fcoe_params - Read fcoe params from conf region
5253 * @phba: Pointer to HBA context object.
5254 * @mboxq: mailbox pointer.
5255 * This function issue a dump mailbox command to read config region
5256 * 23 and parse the records in the region and populate driver
5257 * data structure.
e59058c4 5258 **/
da0436e9 5259static int
ff78d8f9 5260lpfc_sli4_read_fcoe_params(struct lpfc_hba *phba)
dea3101e 5261{
ff78d8f9 5262 LPFC_MBOXQ_t *mboxq;
da0436e9
JS
5263 struct lpfc_dmabuf *mp;
5264 struct lpfc_mqe *mqe;
5265 uint32_t data_length;
5266 int rc;
dea3101e 5267
da0436e9
JS
5268 /* Program the default value of vlan_id and fc_map */
5269 phba->valid_vlan = 0;
5270 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5271 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5272 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
2e0fef85 5273
ff78d8f9
JS
5274 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5275 if (!mboxq)
da0436e9
JS
5276 return -ENOMEM;
5277
ff78d8f9
JS
5278 mqe = &mboxq->u.mqe;
5279 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq)) {
5280 rc = -ENOMEM;
5281 goto out_free_mboxq;
5282 }
5283
3e1f0718 5284 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
5285 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5286
5287 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
5288 "(%d):2571 Mailbox cmd x%x Status x%x "
5289 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5290 "x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5291 "CQ: x%x x%x x%x x%x\n",
5292 mboxq->vport ? mboxq->vport->vpi : 0,
5293 bf_get(lpfc_mqe_command, mqe),
5294 bf_get(lpfc_mqe_status, mqe),
5295 mqe->un.mb_words[0], mqe->un.mb_words[1],
5296 mqe->un.mb_words[2], mqe->un.mb_words[3],
5297 mqe->un.mb_words[4], mqe->un.mb_words[5],
5298 mqe->un.mb_words[6], mqe->un.mb_words[7],
5299 mqe->un.mb_words[8], mqe->un.mb_words[9],
5300 mqe->un.mb_words[10], mqe->un.mb_words[11],
5301 mqe->un.mb_words[12], mqe->un.mb_words[13],
5302 mqe->un.mb_words[14], mqe->un.mb_words[15],
5303 mqe->un.mb_words[16], mqe->un.mb_words[50],
5304 mboxq->mcqe.word0,
5305 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
5306 mboxq->mcqe.trailer);
5307
5308 if (rc) {
5309 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5310 kfree(mp);
ff78d8f9
JS
5311 rc = -EIO;
5312 goto out_free_mboxq;
da0436e9
JS
5313 }
5314 data_length = mqe->un.mb_words[5];
a0c87cbd 5315 if (data_length > DMP_RGN23_SIZE) {
d11e31dd
JS
5316 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5317 kfree(mp);
ff78d8f9
JS
5318 rc = -EIO;
5319 goto out_free_mboxq;
d11e31dd 5320 }
dea3101e 5321
da0436e9
JS
5322 lpfc_parse_fcoe_conf(phba, mp->virt, data_length);
5323 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5324 kfree(mp);
ff78d8f9
JS
5325 rc = 0;
5326
5327out_free_mboxq:
5328 mempool_free(mboxq, phba->mbox_mem_pool);
5329 return rc;
da0436e9 5330}
e59058c4
JS
5331
5332/**
da0436e9
JS
5333 * lpfc_sli4_read_rev - Issue READ_REV and collect vpd data
5334 * @phba: pointer to lpfc hba data structure.
5335 * @mboxq: pointer to the LPFC_MBOXQ_t structure.
5336 * @vpd: pointer to the memory to hold resulting port vpd data.
5337 * @vpd_size: On input, the number of bytes allocated to @vpd.
5338 * On output, the number of data bytes in @vpd.
e59058c4 5339 *
da0436e9
JS
5340 * This routine executes a READ_REV SLI4 mailbox command. In
5341 * addition, this routine gets the port vpd data.
5342 *
5343 * Return codes
af901ca1 5344 * 0 - successful
d439d286 5345 * -ENOMEM - could not allocated memory.
e59058c4 5346 **/
da0436e9
JS
5347static int
5348lpfc_sli4_read_rev(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
5349 uint8_t *vpd, uint32_t *vpd_size)
dea3101e 5350{
da0436e9
JS
5351 int rc = 0;
5352 uint32_t dma_size;
5353 struct lpfc_dmabuf *dmabuf;
5354 struct lpfc_mqe *mqe;
dea3101e 5355
da0436e9
JS
5356 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
5357 if (!dmabuf)
5358 return -ENOMEM;
5359
5360 /*
5361 * Get a DMA buffer for the vpd data resulting from the READ_REV
5362 * mailbox command.
a257bf90 5363 */
da0436e9 5364 dma_size = *vpd_size;
750afb08
LC
5365 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, dma_size,
5366 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
5367 if (!dmabuf->virt) {
5368 kfree(dmabuf);
5369 return -ENOMEM;
a257bf90
JS
5370 }
5371
da0436e9
JS
5372 /*
5373 * The SLI4 implementation of READ_REV conflicts at word1,
5374 * bits 31:16 and SLI4 adds vpd functionality not present
5375 * in SLI3. This code corrects the conflicts.
1dcb58e5 5376 */
da0436e9
JS
5377 lpfc_read_rev(phba, mboxq);
5378 mqe = &mboxq->u.mqe;
5379 mqe->un.read_rev.vpd_paddr_high = putPaddrHigh(dmabuf->phys);
5380 mqe->un.read_rev.vpd_paddr_low = putPaddrLow(dmabuf->phys);
5381 mqe->un.read_rev.word1 &= 0x0000FFFF;
5382 bf_set(lpfc_mbx_rd_rev_vpd, &mqe->un.read_rev, 1);
5383 bf_set(lpfc_mbx_rd_rev_avail_len, &mqe->un.read_rev, dma_size);
5384
5385 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5386 if (rc) {
5387 dma_free_coherent(&phba->pcidev->dev, dma_size,
5388 dmabuf->virt, dmabuf->phys);
def9c7a9 5389 kfree(dmabuf);
da0436e9
JS
5390 return -EIO;
5391 }
1dcb58e5 5392
da0436e9
JS
5393 /*
5394 * The available vpd length cannot be bigger than the
5395 * DMA buffer passed to the port. Catch the less than
5396 * case and update the caller's size.
5397 */
5398 if (mqe->un.read_rev.avail_vpd_len < *vpd_size)
5399 *vpd_size = mqe->un.read_rev.avail_vpd_len;
3772a991 5400
d7c47992
JS
5401 memcpy(vpd, dmabuf->virt, *vpd_size);
5402
da0436e9
JS
5403 dma_free_coherent(&phba->pcidev->dev, dma_size,
5404 dmabuf->virt, dmabuf->phys);
5405 kfree(dmabuf);
5406 return 0;
dea3101e
JB
5407}
5408
cd1c8301
JS
5409/**
5410 * lpfc_sli4_retrieve_pport_name - Retrieve SLI4 device physical port name
5411 * @phba: pointer to lpfc hba data structure.
5412 *
5413 * This routine retrieves SLI4 device physical port name this PCI function
5414 * is attached to.
5415 *
5416 * Return codes
4907cb7b 5417 * 0 - successful
cd1c8301
JS
5418 * otherwise - failed to retrieve physical port name
5419 **/
5420static int
5421lpfc_sli4_retrieve_pport_name(struct lpfc_hba *phba)
5422{
5423 LPFC_MBOXQ_t *mboxq;
cd1c8301
JS
5424 struct lpfc_mbx_get_cntl_attributes *mbx_cntl_attr;
5425 struct lpfc_controller_attribute *cntl_attr;
5426 struct lpfc_mbx_get_port_name *get_port_name;
5427 void *virtaddr = NULL;
5428 uint32_t alloclen, reqlen;
5429 uint32_t shdr_status, shdr_add_status;
5430 union lpfc_sli4_cfg_shdr *shdr;
5431 char cport_name = 0;
5432 int rc;
5433
5434 /* We assume nothing at this point */
5435 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5436 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_NON;
5437
5438 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5439 if (!mboxq)
5440 return -ENOMEM;
cd1c8301 5441 /* obtain link type and link number via READ_CONFIG */
ff78d8f9
JS
5442 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5443 lpfc_sli4_read_config(phba);
5444 if (phba->sli4_hba.lnk_info.lnk_dv == LPFC_LNK_DAT_VAL)
5445 goto retrieve_ppname;
cd1c8301
JS
5446
5447 /* obtain link type and link number via COMMON_GET_CNTL_ATTRIBUTES */
5448 reqlen = sizeof(struct lpfc_mbx_get_cntl_attributes);
5449 alloclen = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5450 LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES, reqlen,
5451 LPFC_SLI4_MBX_NEMBED);
5452 if (alloclen < reqlen) {
5453 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5454 "3084 Allocated DMA memory size (%d) is "
5455 "less than the requested DMA memory size "
5456 "(%d)\n", alloclen, reqlen);
5457 rc = -ENOMEM;
5458 goto out_free_mboxq;
5459 }
5460 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5461 virtaddr = mboxq->sge_array->addr[0];
5462 mbx_cntl_attr = (struct lpfc_mbx_get_cntl_attributes *)virtaddr;
5463 shdr = &mbx_cntl_attr->cfg_shdr;
5464 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5465 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5466 if (shdr_status || shdr_add_status || rc) {
5467 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5468 "3085 Mailbox x%x (x%x/x%x) failed, "
5469 "rc:x%x, status:x%x, add_status:x%x\n",
5470 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5471 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5472 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5473 rc, shdr_status, shdr_add_status);
5474 rc = -ENXIO;
5475 goto out_free_mboxq;
5476 }
5477 cntl_attr = &mbx_cntl_attr->cntl_attr;
5478 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
5479 phba->sli4_hba.lnk_info.lnk_tp =
5480 bf_get(lpfc_cntl_attr_lnk_type, cntl_attr);
5481 phba->sli4_hba.lnk_info.lnk_no =
5482 bf_get(lpfc_cntl_attr_lnk_numb, cntl_attr);
5483 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5484 "3086 lnk_type:%d, lnk_numb:%d\n",
5485 phba->sli4_hba.lnk_info.lnk_tp,
5486 phba->sli4_hba.lnk_info.lnk_no);
5487
5488retrieve_ppname:
5489 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5490 LPFC_MBOX_OPCODE_GET_PORT_NAME,
5491 sizeof(struct lpfc_mbx_get_port_name) -
5492 sizeof(struct lpfc_sli4_cfg_mhdr),
5493 LPFC_SLI4_MBX_EMBED);
5494 get_port_name = &mboxq->u.mqe.un.get_port_name;
5495 shdr = (union lpfc_sli4_cfg_shdr *)&get_port_name->header.cfg_shdr;
5496 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_OPCODE_VERSION_1);
5497 bf_set(lpfc_mbx_get_port_name_lnk_type, &get_port_name->u.request,
5498 phba->sli4_hba.lnk_info.lnk_tp);
5499 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5500 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5501 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5502 if (shdr_status || shdr_add_status || rc) {
5503 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5504 "3087 Mailbox x%x (x%x/x%x) failed: "
5505 "rc:x%x, status:x%x, add_status:x%x\n",
5506 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5507 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5508 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5509 rc, shdr_status, shdr_add_status);
5510 rc = -ENXIO;
5511 goto out_free_mboxq;
5512 }
5513 switch (phba->sli4_hba.lnk_info.lnk_no) {
5514 case LPFC_LINK_NUMBER_0:
5515 cport_name = bf_get(lpfc_mbx_get_port_name_name0,
5516 &get_port_name->u.response);
5517 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5518 break;
5519 case LPFC_LINK_NUMBER_1:
5520 cport_name = bf_get(lpfc_mbx_get_port_name_name1,
5521 &get_port_name->u.response);
5522 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5523 break;
5524 case LPFC_LINK_NUMBER_2:
5525 cport_name = bf_get(lpfc_mbx_get_port_name_name2,
5526 &get_port_name->u.response);
5527 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5528 break;
5529 case LPFC_LINK_NUMBER_3:
5530 cport_name = bf_get(lpfc_mbx_get_port_name_name3,
5531 &get_port_name->u.response);
5532 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5533 break;
5534 default:
5535 break;
5536 }
5537
5538 if (phba->sli4_hba.pport_name_sta == LPFC_SLI4_PPNAME_GET) {
5539 phba->Port[0] = cport_name;
5540 phba->Port[1] = '\0';
5541 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5542 "3091 SLI get port name: %s\n", phba->Port);
5543 }
5544
5545out_free_mboxq:
5546 if (rc != MBX_TIMEOUT) {
5547 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5548 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5549 else
5550 mempool_free(mboxq, phba->mbox_mem_pool);
5551 }
5552 return rc;
5553}
5554
e59058c4 5555/**
da0436e9
JS
5556 * lpfc_sli4_arm_cqeq_intr - Arm sli-4 device completion and event queues
5557 * @phba: pointer to lpfc hba data structure.
e59058c4 5558 *
da0436e9
JS
5559 * This routine is called to explicitly arm the SLI4 device's completion and
5560 * event queues
5561 **/
5562static void
5563lpfc_sli4_arm_cqeq_intr(struct lpfc_hba *phba)
5564{
895427bd 5565 int qidx;
b71413dd 5566 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
da0436e9 5567
b71413dd
JS
5568 sli4_hba->sli4_cq_release(sli4_hba->mbx_cq, LPFC_QUEUE_REARM);
5569 sli4_hba->sli4_cq_release(sli4_hba->els_cq, LPFC_QUEUE_REARM);
5570 if (sli4_hba->nvmels_cq)
5571 sli4_hba->sli4_cq_release(sli4_hba->nvmels_cq,
895427bd
JS
5572 LPFC_QUEUE_REARM);
5573
b71413dd 5574 if (sli4_hba->fcp_cq)
895427bd 5575 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
b71413dd 5576 sli4_hba->sli4_cq_release(sli4_hba->fcp_cq[qidx],
895427bd
JS
5577 LPFC_QUEUE_REARM);
5578
b71413dd 5579 if (sli4_hba->nvme_cq)
895427bd 5580 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
b71413dd 5581 sli4_hba->sli4_cq_release(sli4_hba->nvme_cq[qidx],
895427bd 5582 LPFC_QUEUE_REARM);
1ba981fd 5583
f38fa0bb 5584 if (phba->cfg_fof)
b71413dd 5585 sli4_hba->sli4_cq_release(sli4_hba->oas_cq, LPFC_QUEUE_REARM);
1ba981fd 5586
b71413dd 5587 if (sli4_hba->hba_eq)
895427bd 5588 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
b71413dd
JS
5589 sli4_hba->sli4_eq_release(sli4_hba->hba_eq[qidx],
5590 LPFC_QUEUE_REARM);
1ba981fd 5591
2d7dbc4c
JS
5592 if (phba->nvmet_support) {
5593 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) {
b71413dd
JS
5594 sli4_hba->sli4_cq_release(
5595 sli4_hba->nvmet_cqset[qidx],
2d7dbc4c
JS
5596 LPFC_QUEUE_REARM);
5597 }
2e90f4b5 5598 }
1ba981fd
JS
5599
5600 if (phba->cfg_fof)
b71413dd 5601 sli4_hba->sli4_eq_release(sli4_hba->fof_eq, LPFC_QUEUE_REARM);
da0436e9
JS
5602}
5603
6d368e53
JS
5604/**
5605 * lpfc_sli4_get_avail_extnt_rsrc - Get available resource extent count.
5606 * @phba: Pointer to HBA context object.
5607 * @type: The resource extent type.
b76f2dc9
JS
5608 * @extnt_count: buffer to hold port available extent count.
5609 * @extnt_size: buffer to hold element count per extent.
6d368e53 5610 *
b76f2dc9
JS
5611 * This function calls the port and retrievs the number of available
5612 * extents and their size for a particular extent type.
5613 *
5614 * Returns: 0 if successful. Nonzero otherwise.
6d368e53 5615 **/
b76f2dc9 5616int
6d368e53
JS
5617lpfc_sli4_get_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type,
5618 uint16_t *extnt_count, uint16_t *extnt_size)
5619{
5620 int rc = 0;
5621 uint32_t length;
5622 uint32_t mbox_tmo;
5623 struct lpfc_mbx_get_rsrc_extent_info *rsrc_info;
5624 LPFC_MBOXQ_t *mbox;
5625
5626 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5627 if (!mbox)
5628 return -ENOMEM;
5629
5630 /* Find out how many extents are available for this resource type */
5631 length = (sizeof(struct lpfc_mbx_get_rsrc_extent_info) -
5632 sizeof(struct lpfc_sli4_cfg_mhdr));
5633 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5634 LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO,
5635 length, LPFC_SLI4_MBX_EMBED);
5636
5637 /* Send an extents count of 0 - the GET doesn't use it. */
5638 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
5639 LPFC_SLI4_MBX_EMBED);
5640 if (unlikely(rc)) {
5641 rc = -EIO;
5642 goto err_exit;
5643 }
5644
5645 if (!phba->sli4_hba.intr_enable)
5646 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5647 else {
a183a15f 5648 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5649 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5650 }
5651 if (unlikely(rc)) {
5652 rc = -EIO;
5653 goto err_exit;
5654 }
5655
5656 rsrc_info = &mbox->u.mqe.un.rsrc_extent_info;
5657 if (bf_get(lpfc_mbox_hdr_status,
5658 &rsrc_info->header.cfg_shdr.response)) {
5659 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5660 "2930 Failed to get resource extents "
5661 "Status 0x%x Add'l Status 0x%x\n",
5662 bf_get(lpfc_mbox_hdr_status,
5663 &rsrc_info->header.cfg_shdr.response),
5664 bf_get(lpfc_mbox_hdr_add_status,
5665 &rsrc_info->header.cfg_shdr.response));
5666 rc = -EIO;
5667 goto err_exit;
5668 }
5669
5670 *extnt_count = bf_get(lpfc_mbx_get_rsrc_extent_info_cnt,
5671 &rsrc_info->u.rsp);
5672 *extnt_size = bf_get(lpfc_mbx_get_rsrc_extent_info_size,
5673 &rsrc_info->u.rsp);
8a9d2e80
JS
5674
5675 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5676 "3162 Retrieved extents type-%d from port: count:%d, "
5677 "size:%d\n", type, *extnt_count, *extnt_size);
5678
5679err_exit:
6d368e53
JS
5680 mempool_free(mbox, phba->mbox_mem_pool);
5681 return rc;
5682}
5683
5684/**
5685 * lpfc_sli4_chk_avail_extnt_rsrc - Check for available SLI4 resource extents.
5686 * @phba: Pointer to HBA context object.
5687 * @type: The extent type to check.
5688 *
5689 * This function reads the current available extents from the port and checks
5690 * if the extent count or extent size has changed since the last access.
5691 * Callers use this routine post port reset to understand if there is a
5692 * extent reprovisioning requirement.
5693 *
5694 * Returns:
5695 * -Error: error indicates problem.
5696 * 1: Extent count or size has changed.
5697 * 0: No changes.
5698 **/
5699static int
5700lpfc_sli4_chk_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type)
5701{
5702 uint16_t curr_ext_cnt, rsrc_ext_cnt;
5703 uint16_t size_diff, rsrc_ext_size;
5704 int rc = 0;
5705 struct lpfc_rsrc_blks *rsrc_entry;
5706 struct list_head *rsrc_blk_list = NULL;
5707
5708 size_diff = 0;
5709 curr_ext_cnt = 0;
5710 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5711 &rsrc_ext_cnt,
5712 &rsrc_ext_size);
5713 if (unlikely(rc))
5714 return -EIO;
5715
5716 switch (type) {
5717 case LPFC_RSC_TYPE_FCOE_RPI:
5718 rsrc_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5719 break;
5720 case LPFC_RSC_TYPE_FCOE_VPI:
5721 rsrc_blk_list = &phba->lpfc_vpi_blk_list;
5722 break;
5723 case LPFC_RSC_TYPE_FCOE_XRI:
5724 rsrc_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5725 break;
5726 case LPFC_RSC_TYPE_FCOE_VFI:
5727 rsrc_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5728 break;
5729 default:
5730 break;
5731 }
5732
5733 list_for_each_entry(rsrc_entry, rsrc_blk_list, list) {
5734 curr_ext_cnt++;
5735 if (rsrc_entry->rsrc_size != rsrc_ext_size)
5736 size_diff++;
5737 }
5738
5739 if (curr_ext_cnt != rsrc_ext_cnt || size_diff != 0)
5740 rc = 1;
5741
5742 return rc;
5743}
5744
5745/**
5746 * lpfc_sli4_cfg_post_extnts -
5747 * @phba: Pointer to HBA context object.
5748 * @extnt_cnt - number of available extents.
5749 * @type - the extent type (rpi, xri, vfi, vpi).
5750 * @emb - buffer to hold either MBX_EMBED or MBX_NEMBED operation.
5751 * @mbox - pointer to the caller's allocated mailbox structure.
5752 *
5753 * This function executes the extents allocation request. It also
5754 * takes care of the amount of memory needed to allocate or get the
5755 * allocated extents. It is the caller's responsibility to evaluate
5756 * the response.
5757 *
5758 * Returns:
5759 * -Error: Error value describes the condition found.
5760 * 0: if successful
5761 **/
5762static int
8a9d2e80 5763lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t extnt_cnt,
6d368e53
JS
5764 uint16_t type, bool *emb, LPFC_MBOXQ_t *mbox)
5765{
5766 int rc = 0;
5767 uint32_t req_len;
5768 uint32_t emb_len;
5769 uint32_t alloc_len, mbox_tmo;
5770
5771 /* Calculate the total requested length of the dma memory */
8a9d2e80 5772 req_len = extnt_cnt * sizeof(uint16_t);
6d368e53
JS
5773
5774 /*
5775 * Calculate the size of an embedded mailbox. The uint32_t
5776 * accounts for extents-specific word.
5777 */
5778 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
5779 sizeof(uint32_t);
5780
5781 /*
5782 * Presume the allocation and response will fit into an embedded
5783 * mailbox. If not true, reconfigure to a non-embedded mailbox.
5784 */
5785 *emb = LPFC_SLI4_MBX_EMBED;
5786 if (req_len > emb_len) {
8a9d2e80 5787 req_len = extnt_cnt * sizeof(uint16_t) +
6d368e53
JS
5788 sizeof(union lpfc_sli4_cfg_shdr) +
5789 sizeof(uint32_t);
5790 *emb = LPFC_SLI4_MBX_NEMBED;
5791 }
5792
5793 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5794 LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT,
5795 req_len, *emb);
5796 if (alloc_len < req_len) {
5797 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
b76f2dc9 5798 "2982 Allocated DMA memory size (x%x) is "
6d368e53
JS
5799 "less than the requested DMA memory "
5800 "size (x%x)\n", alloc_len, req_len);
5801 return -ENOMEM;
5802 }
8a9d2e80 5803 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, extnt_cnt, type, *emb);
6d368e53
JS
5804 if (unlikely(rc))
5805 return -EIO;
5806
5807 if (!phba->sli4_hba.intr_enable)
5808 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5809 else {
a183a15f 5810 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5811 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5812 }
5813
5814 if (unlikely(rc))
5815 rc = -EIO;
5816 return rc;
5817}
5818
5819/**
5820 * lpfc_sli4_alloc_extent - Allocate an SLI4 resource extent.
5821 * @phba: Pointer to HBA context object.
5822 * @type: The resource extent type to allocate.
5823 *
5824 * This function allocates the number of elements for the specified
5825 * resource type.
5826 **/
5827static int
5828lpfc_sli4_alloc_extent(struct lpfc_hba *phba, uint16_t type)
5829{
5830 bool emb = false;
5831 uint16_t rsrc_id_cnt, rsrc_cnt, rsrc_size;
5832 uint16_t rsrc_id, rsrc_start, j, k;
5833 uint16_t *ids;
5834 int i, rc;
5835 unsigned long longs;
5836 unsigned long *bmask;
5837 struct lpfc_rsrc_blks *rsrc_blks;
5838 LPFC_MBOXQ_t *mbox;
5839 uint32_t length;
5840 struct lpfc_id_range *id_array = NULL;
5841 void *virtaddr = NULL;
5842 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
5843 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
5844 struct list_head *ext_blk_list;
5845
5846 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5847 &rsrc_cnt,
5848 &rsrc_size);
5849 if (unlikely(rc))
5850 return -EIO;
5851
5852 if ((rsrc_cnt == 0) || (rsrc_size == 0)) {
5853 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5854 "3009 No available Resource Extents "
5855 "for resource type 0x%x: Count: 0x%x, "
5856 "Size 0x%x\n", type, rsrc_cnt,
5857 rsrc_size);
5858 return -ENOMEM;
5859 }
5860
8a9d2e80
JS
5861 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_INIT | LOG_SLI,
5862 "2903 Post resource extents type-0x%x: "
5863 "count:%d, size %d\n", type, rsrc_cnt, rsrc_size);
6d368e53
JS
5864
5865 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5866 if (!mbox)
5867 return -ENOMEM;
5868
8a9d2e80 5869 rc = lpfc_sli4_cfg_post_extnts(phba, rsrc_cnt, type, &emb, mbox);
6d368e53
JS
5870 if (unlikely(rc)) {
5871 rc = -EIO;
5872 goto err_exit;
5873 }
5874
5875 /*
5876 * Figure out where the response is located. Then get local pointers
5877 * to the response data. The port does not guarantee to respond to
5878 * all extents counts request so update the local variable with the
5879 * allocated count from the port.
5880 */
5881 if (emb == LPFC_SLI4_MBX_EMBED) {
5882 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
5883 id_array = &rsrc_ext->u.rsp.id[0];
5884 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
5885 } else {
5886 virtaddr = mbox->sge_array->addr[0];
5887 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
5888 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
5889 id_array = &n_rsrc->id;
5890 }
5891
5892 longs = ((rsrc_cnt * rsrc_size) + BITS_PER_LONG - 1) / BITS_PER_LONG;
5893 rsrc_id_cnt = rsrc_cnt * rsrc_size;
5894
5895 /*
5896 * Based on the resource size and count, correct the base and max
5897 * resource values.
5898 */
5899 length = sizeof(struct lpfc_rsrc_blks);
5900 switch (type) {
5901 case LPFC_RSC_TYPE_FCOE_RPI:
6396bb22 5902 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
5903 sizeof(unsigned long),
5904 GFP_KERNEL);
5905 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
5906 rc = -ENOMEM;
5907 goto err_exit;
5908 }
6396bb22 5909 phba->sli4_hba.rpi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5910 sizeof(uint16_t),
5911 GFP_KERNEL);
5912 if (unlikely(!phba->sli4_hba.rpi_ids)) {
5913 kfree(phba->sli4_hba.rpi_bmask);
5914 rc = -ENOMEM;
5915 goto err_exit;
5916 }
5917
5918 /*
5919 * The next_rpi was initialized with the maximum available
5920 * count but the port may allocate a smaller number. Catch
5921 * that case and update the next_rpi.
5922 */
5923 phba->sli4_hba.next_rpi = rsrc_id_cnt;
5924
5925 /* Initialize local ptrs for common extent processing later. */
5926 bmask = phba->sli4_hba.rpi_bmask;
5927 ids = phba->sli4_hba.rpi_ids;
5928 ext_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5929 break;
5930 case LPFC_RSC_TYPE_FCOE_VPI:
6396bb22 5931 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
5932 GFP_KERNEL);
5933 if (unlikely(!phba->vpi_bmask)) {
5934 rc = -ENOMEM;
5935 goto err_exit;
5936 }
6396bb22 5937 phba->vpi_ids = kcalloc(rsrc_id_cnt, sizeof(uint16_t),
6d368e53
JS
5938 GFP_KERNEL);
5939 if (unlikely(!phba->vpi_ids)) {
5940 kfree(phba->vpi_bmask);
5941 rc = -ENOMEM;
5942 goto err_exit;
5943 }
5944
5945 /* Initialize local ptrs for common extent processing later. */
5946 bmask = phba->vpi_bmask;
5947 ids = phba->vpi_ids;
5948 ext_blk_list = &phba->lpfc_vpi_blk_list;
5949 break;
5950 case LPFC_RSC_TYPE_FCOE_XRI:
6396bb22 5951 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
5952 sizeof(unsigned long),
5953 GFP_KERNEL);
5954 if (unlikely(!phba->sli4_hba.xri_bmask)) {
5955 rc = -ENOMEM;
5956 goto err_exit;
5957 }
8a9d2e80 5958 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 5959 phba->sli4_hba.xri_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5960 sizeof(uint16_t),
5961 GFP_KERNEL);
5962 if (unlikely(!phba->sli4_hba.xri_ids)) {
5963 kfree(phba->sli4_hba.xri_bmask);
5964 rc = -ENOMEM;
5965 goto err_exit;
5966 }
5967
5968 /* Initialize local ptrs for common extent processing later. */
5969 bmask = phba->sli4_hba.xri_bmask;
5970 ids = phba->sli4_hba.xri_ids;
5971 ext_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5972 break;
5973 case LPFC_RSC_TYPE_FCOE_VFI:
6396bb22 5974 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
5975 sizeof(unsigned long),
5976 GFP_KERNEL);
5977 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
5978 rc = -ENOMEM;
5979 goto err_exit;
5980 }
6396bb22 5981 phba->sli4_hba.vfi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5982 sizeof(uint16_t),
5983 GFP_KERNEL);
5984 if (unlikely(!phba->sli4_hba.vfi_ids)) {
5985 kfree(phba->sli4_hba.vfi_bmask);
5986 rc = -ENOMEM;
5987 goto err_exit;
5988 }
5989
5990 /* Initialize local ptrs for common extent processing later. */
5991 bmask = phba->sli4_hba.vfi_bmask;
5992 ids = phba->sli4_hba.vfi_ids;
5993 ext_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5994 break;
5995 default:
5996 /* Unsupported Opcode. Fail call. */
5997 id_array = NULL;
5998 bmask = NULL;
5999 ids = NULL;
6000 ext_blk_list = NULL;
6001 goto err_exit;
6002 }
6003
6004 /*
6005 * Complete initializing the extent configuration with the
6006 * allocated ids assigned to this function. The bitmask serves
6007 * as an index into the array and manages the available ids. The
6008 * array just stores the ids communicated to the port via the wqes.
6009 */
6010 for (i = 0, j = 0, k = 0; i < rsrc_cnt; i++) {
6011 if ((i % 2) == 0)
6012 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_0,
6013 &id_array[k]);
6014 else
6015 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_1,
6016 &id_array[k]);
6017
6018 rsrc_blks = kzalloc(length, GFP_KERNEL);
6019 if (unlikely(!rsrc_blks)) {
6020 rc = -ENOMEM;
6021 kfree(bmask);
6022 kfree(ids);
6023 goto err_exit;
6024 }
6025 rsrc_blks->rsrc_start = rsrc_id;
6026 rsrc_blks->rsrc_size = rsrc_size;
6027 list_add_tail(&rsrc_blks->list, ext_blk_list);
6028 rsrc_start = rsrc_id;
895427bd 6029 if ((type == LPFC_RSC_TYPE_FCOE_XRI) && (j == 0)) {
6d368e53 6030 phba->sli4_hba.scsi_xri_start = rsrc_start +
895427bd
JS
6031 lpfc_sli4_get_iocb_cnt(phba);
6032 phba->sli4_hba.nvme_xri_start =
6033 phba->sli4_hba.scsi_xri_start +
6034 phba->sli4_hba.scsi_xri_max;
6035 }
6d368e53
JS
6036
6037 while (rsrc_id < (rsrc_start + rsrc_size)) {
6038 ids[j] = rsrc_id;
6039 rsrc_id++;
6040 j++;
6041 }
6042 /* Entire word processed. Get next word.*/
6043 if ((i % 2) == 1)
6044 k++;
6045 }
6046 err_exit:
6047 lpfc_sli4_mbox_cmd_free(phba, mbox);
6048 return rc;
6049}
6050
895427bd
JS
6051
6052
6d368e53
JS
6053/**
6054 * lpfc_sli4_dealloc_extent - Deallocate an SLI4 resource extent.
6055 * @phba: Pointer to HBA context object.
6056 * @type: the extent's type.
6057 *
6058 * This function deallocates all extents of a particular resource type.
6059 * SLI4 does not allow for deallocating a particular extent range. It
6060 * is the caller's responsibility to release all kernel memory resources.
6061 **/
6062static int
6063lpfc_sli4_dealloc_extent(struct lpfc_hba *phba, uint16_t type)
6064{
6065 int rc;
6066 uint32_t length, mbox_tmo = 0;
6067 LPFC_MBOXQ_t *mbox;
6068 struct lpfc_mbx_dealloc_rsrc_extents *dealloc_rsrc;
6069 struct lpfc_rsrc_blks *rsrc_blk, *rsrc_blk_next;
6070
6071 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6072 if (!mbox)
6073 return -ENOMEM;
6074
6075 /*
6076 * This function sends an embedded mailbox because it only sends the
6077 * the resource type. All extents of this type are released by the
6078 * port.
6079 */
6080 length = (sizeof(struct lpfc_mbx_dealloc_rsrc_extents) -
6081 sizeof(struct lpfc_sli4_cfg_mhdr));
6082 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6083 LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT,
6084 length, LPFC_SLI4_MBX_EMBED);
6085
6086 /* Send an extents count of 0 - the dealloc doesn't use it. */
6087 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
6088 LPFC_SLI4_MBX_EMBED);
6089 if (unlikely(rc)) {
6090 rc = -EIO;
6091 goto out_free_mbox;
6092 }
6093 if (!phba->sli4_hba.intr_enable)
6094 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6095 else {
a183a15f 6096 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
6097 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6098 }
6099 if (unlikely(rc)) {
6100 rc = -EIO;
6101 goto out_free_mbox;
6102 }
6103
6104 dealloc_rsrc = &mbox->u.mqe.un.dealloc_rsrc_extents;
6105 if (bf_get(lpfc_mbox_hdr_status,
6106 &dealloc_rsrc->header.cfg_shdr.response)) {
6107 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6108 "2919 Failed to release resource extents "
6109 "for type %d - Status 0x%x Add'l Status 0x%x. "
6110 "Resource memory not released.\n",
6111 type,
6112 bf_get(lpfc_mbox_hdr_status,
6113 &dealloc_rsrc->header.cfg_shdr.response),
6114 bf_get(lpfc_mbox_hdr_add_status,
6115 &dealloc_rsrc->header.cfg_shdr.response));
6116 rc = -EIO;
6117 goto out_free_mbox;
6118 }
6119
6120 /* Release kernel memory resources for the specific type. */
6121 switch (type) {
6122 case LPFC_RSC_TYPE_FCOE_VPI:
6123 kfree(phba->vpi_bmask);
6124 kfree(phba->vpi_ids);
6125 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6126 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6127 &phba->lpfc_vpi_blk_list, list) {
6128 list_del_init(&rsrc_blk->list);
6129 kfree(rsrc_blk);
6130 }
16a3a208 6131 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6132 break;
6133 case LPFC_RSC_TYPE_FCOE_XRI:
6134 kfree(phba->sli4_hba.xri_bmask);
6135 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6136 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6137 &phba->sli4_hba.lpfc_xri_blk_list, list) {
6138 list_del_init(&rsrc_blk->list);
6139 kfree(rsrc_blk);
6140 }
6141 break;
6142 case LPFC_RSC_TYPE_FCOE_VFI:
6143 kfree(phba->sli4_hba.vfi_bmask);
6144 kfree(phba->sli4_hba.vfi_ids);
6145 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6146 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6147 &phba->sli4_hba.lpfc_vfi_blk_list, list) {
6148 list_del_init(&rsrc_blk->list);
6149 kfree(rsrc_blk);
6150 }
6151 break;
6152 case LPFC_RSC_TYPE_FCOE_RPI:
6153 /* RPI bitmask and physical id array are cleaned up earlier. */
6154 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6155 &phba->sli4_hba.lpfc_rpi_blk_list, list) {
6156 list_del_init(&rsrc_blk->list);
6157 kfree(rsrc_blk);
6158 }
6159 break;
6160 default:
6161 break;
6162 }
6163
6164 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6165
6166 out_free_mbox:
6167 mempool_free(mbox, phba->mbox_mem_pool);
6168 return rc;
6169}
6170
bd4b3e5c 6171static void
7bdedb34
JS
6172lpfc_set_features(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox,
6173 uint32_t feature)
65791f1f 6174{
65791f1f 6175 uint32_t len;
65791f1f 6176
65791f1f
JS
6177 len = sizeof(struct lpfc_mbx_set_feature) -
6178 sizeof(struct lpfc_sli4_cfg_mhdr);
6179 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6180 LPFC_MBOX_OPCODE_SET_FEATURES, len,
6181 LPFC_SLI4_MBX_EMBED);
7bdedb34
JS
6182
6183 switch (feature) {
6184 case LPFC_SET_UE_RECOVERY:
6185 bf_set(lpfc_mbx_set_feature_UER,
6186 &mbox->u.mqe.un.set_feature, 1);
6187 mbox->u.mqe.un.set_feature.feature = LPFC_SET_UE_RECOVERY;
6188 mbox->u.mqe.un.set_feature.param_len = 8;
6189 break;
6190 case LPFC_SET_MDS_DIAGS:
6191 bf_set(lpfc_mbx_set_feature_mds,
6192 &mbox->u.mqe.un.set_feature, 1);
6193 bf_set(lpfc_mbx_set_feature_mds_deep_loopbk,
ae9e28f3 6194 &mbox->u.mqe.un.set_feature, 1);
7bdedb34
JS
6195 mbox->u.mqe.un.set_feature.feature = LPFC_SET_MDS_DIAGS;
6196 mbox->u.mqe.un.set_feature.param_len = 8;
6197 break;
65791f1f 6198 }
7bdedb34
JS
6199
6200 return;
65791f1f
JS
6201}
6202
1165a5c2
JS
6203/**
6204 * lpfc_ras_stop_fwlog: Disable FW logging by the adapter
6205 * @phba: Pointer to HBA context object.
6206 *
6207 * Disable FW logging into host memory on the adapter. To
6208 * be done before reading logs from the host memory.
6209 **/
6210void
6211lpfc_ras_stop_fwlog(struct lpfc_hba *phba)
6212{
6213 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6214
6215 ras_fwlog->ras_active = false;
6216
6217 /* Disable FW logging to host memory */
6218 writel(LPFC_CTL_PDEV_CTL_DDL_RAS,
6219 phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PDEV_CTL_OFFSET);
6220}
6221
d2cc9bcd
JS
6222/**
6223 * lpfc_sli4_ras_dma_free - Free memory allocated for FW logging.
6224 * @phba: Pointer to HBA context object.
6225 *
6226 * This function is called to free memory allocated for RAS FW logging
6227 * support in the driver.
6228 **/
6229void
6230lpfc_sli4_ras_dma_free(struct lpfc_hba *phba)
6231{
6232 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6233 struct lpfc_dmabuf *dmabuf, *next;
6234
6235 if (!list_empty(&ras_fwlog->fwlog_buff_list)) {
6236 list_for_each_entry_safe(dmabuf, next,
6237 &ras_fwlog->fwlog_buff_list,
6238 list) {
6239 list_del(&dmabuf->list);
6240 dma_free_coherent(&phba->pcidev->dev,
6241 LPFC_RAS_MAX_ENTRY_SIZE,
6242 dmabuf->virt, dmabuf->phys);
6243 kfree(dmabuf);
6244 }
6245 }
6246
6247 if (ras_fwlog->lwpd.virt) {
6248 dma_free_coherent(&phba->pcidev->dev,
6249 sizeof(uint32_t) * 2,
6250 ras_fwlog->lwpd.virt,
6251 ras_fwlog->lwpd.phys);
6252 ras_fwlog->lwpd.virt = NULL;
6253 }
6254
6255 ras_fwlog->ras_active = false;
6256}
6257
6258/**
6259 * lpfc_sli4_ras_dma_alloc: Allocate memory for FW support
6260 * @phba: Pointer to HBA context object.
6261 * @fwlog_buff_count: Count of buffers to be created.
6262 *
6263 * This routine DMA memory for Log Write Position Data[LPWD] and buffer
6264 * to update FW log is posted to the adapter.
6265 * Buffer count is calculated based on module param ras_fwlog_buffsize
6266 * Size of each buffer posted to FW is 64K.
6267 **/
6268
6269static int
6270lpfc_sli4_ras_dma_alloc(struct lpfc_hba *phba,
6271 uint32_t fwlog_buff_count)
6272{
6273 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6274 struct lpfc_dmabuf *dmabuf;
6275 int rc = 0, i = 0;
6276
6277 /* Initialize List */
6278 INIT_LIST_HEAD(&ras_fwlog->fwlog_buff_list);
6279
6280 /* Allocate memory for the LWPD */
6281 ras_fwlog->lwpd.virt = dma_alloc_coherent(&phba->pcidev->dev,
6282 sizeof(uint32_t) * 2,
6283 &ras_fwlog->lwpd.phys,
6284 GFP_KERNEL);
6285 if (!ras_fwlog->lwpd.virt) {
cb34990b 6286 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d2cc9bcd
JS
6287 "6185 LWPD Memory Alloc Failed\n");
6288
6289 return -ENOMEM;
6290 }
6291
6292 ras_fwlog->fw_buffcount = fwlog_buff_count;
6293 for (i = 0; i < ras_fwlog->fw_buffcount; i++) {
6294 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
6295 GFP_KERNEL);
6296 if (!dmabuf) {
6297 rc = -ENOMEM;
6298 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6299 "6186 Memory Alloc failed FW logging");
6300 goto free_mem;
6301 }
6302
750afb08 6303 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
d2cc9bcd 6304 LPFC_RAS_MAX_ENTRY_SIZE,
750afb08 6305 &dmabuf->phys, GFP_KERNEL);
d2cc9bcd
JS
6306 if (!dmabuf->virt) {
6307 kfree(dmabuf);
6308 rc = -ENOMEM;
6309 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6310 "6187 DMA Alloc Failed FW logging");
6311 goto free_mem;
6312 }
d2cc9bcd
JS
6313 dmabuf->buffer_tag = i;
6314 list_add_tail(&dmabuf->list, &ras_fwlog->fwlog_buff_list);
6315 }
6316
6317free_mem:
6318 if (rc)
6319 lpfc_sli4_ras_dma_free(phba);
6320
6321 return rc;
6322}
6323
6324/**
6325 * lpfc_sli4_ras_mbox_cmpl: Completion handler for RAS MBX command
6326 * @phba: pointer to lpfc hba data structure.
6327 * @pmboxq: pointer to the driver internal queue element for mailbox command.
6328 *
6329 * Completion handler for driver's RAS MBX command to the device.
6330 **/
6331static void
6332lpfc_sli4_ras_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
6333{
6334 MAILBOX_t *mb;
6335 union lpfc_sli4_cfg_shdr *shdr;
6336 uint32_t shdr_status, shdr_add_status;
6337 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6338
6339 mb = &pmb->u.mb;
6340
6341 shdr = (union lpfc_sli4_cfg_shdr *)
6342 &pmb->u.mqe.un.ras_fwlog.header.cfg_shdr;
6343 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
6344 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
6345
6346 if (mb->mbxStatus != MBX_SUCCESS || shdr_status) {
cb34990b 6347 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
d2cc9bcd
JS
6348 "6188 FW LOG mailbox "
6349 "completed with status x%x add_status x%x,"
6350 " mbx status x%x\n",
6351 shdr_status, shdr_add_status, mb->mbxStatus);
cb34990b
JS
6352
6353 ras_fwlog->ras_hwsupport = false;
d2cc9bcd
JS
6354 goto disable_ras;
6355 }
6356
6357 ras_fwlog->ras_active = true;
6358 mempool_free(pmb, phba->mbox_mem_pool);
6359
6360 return;
6361
6362disable_ras:
6363 /* Free RAS DMA memory */
6364 lpfc_sli4_ras_dma_free(phba);
6365 mempool_free(pmb, phba->mbox_mem_pool);
6366}
6367
6368/**
6369 * lpfc_sli4_ras_fwlog_init: Initialize memory and post RAS MBX command
6370 * @phba: pointer to lpfc hba data structure.
6371 * @fwlog_level: Logging verbosity level.
6372 * @fwlog_enable: Enable/Disable logging.
6373 *
6374 * Initialize memory and post mailbox command to enable FW logging in host
6375 * memory.
6376 **/
6377int
6378lpfc_sli4_ras_fwlog_init(struct lpfc_hba *phba,
6379 uint32_t fwlog_level,
6380 uint32_t fwlog_enable)
6381{
6382 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6383 struct lpfc_mbx_set_ras_fwlog *mbx_fwlog = NULL;
6384 struct lpfc_dmabuf *dmabuf;
6385 LPFC_MBOXQ_t *mbox;
6386 uint32_t len = 0, fwlog_buffsize, fwlog_entry_count;
6387 int rc = 0;
6388
6389 fwlog_buffsize = (LPFC_RAS_MIN_BUFF_POST_SIZE *
6390 phba->cfg_ras_fwlog_buffsize);
6391 fwlog_entry_count = (fwlog_buffsize/LPFC_RAS_MAX_ENTRY_SIZE);
6392
6393 /*
6394 * If re-enabling FW logging support use earlier allocated
6395 * DMA buffers while posting MBX command.
6396 **/
6397 if (!ras_fwlog->lwpd.virt) {
6398 rc = lpfc_sli4_ras_dma_alloc(phba, fwlog_entry_count);
6399 if (rc) {
6400 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
cb34990b 6401 "6189 FW Log Memory Allocation Failed");
d2cc9bcd
JS
6402 return rc;
6403 }
6404 }
6405
6406 /* Setup Mailbox command */
6407 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6408 if (!mbox) {
cb34990b 6409 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d2cc9bcd
JS
6410 "6190 RAS MBX Alloc Failed");
6411 rc = -ENOMEM;
6412 goto mem_free;
6413 }
6414
6415 ras_fwlog->fw_loglevel = fwlog_level;
6416 len = (sizeof(struct lpfc_mbx_set_ras_fwlog) -
6417 sizeof(struct lpfc_sli4_cfg_mhdr));
6418
6419 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_LOWLEVEL,
6420 LPFC_MBOX_OPCODE_SET_DIAG_LOG_OPTION,
6421 len, LPFC_SLI4_MBX_EMBED);
6422
6423 mbx_fwlog = (struct lpfc_mbx_set_ras_fwlog *)&mbox->u.mqe.un.ras_fwlog;
6424 bf_set(lpfc_fwlog_enable, &mbx_fwlog->u.request,
6425 fwlog_enable);
6426 bf_set(lpfc_fwlog_loglvl, &mbx_fwlog->u.request,
6427 ras_fwlog->fw_loglevel);
6428 bf_set(lpfc_fwlog_buffcnt, &mbx_fwlog->u.request,
6429 ras_fwlog->fw_buffcount);
6430 bf_set(lpfc_fwlog_buffsz, &mbx_fwlog->u.request,
6431 LPFC_RAS_MAX_ENTRY_SIZE/SLI4_PAGE_SIZE);
6432
6433 /* Update DMA buffer address */
6434 list_for_each_entry(dmabuf, &ras_fwlog->fwlog_buff_list, list) {
6435 memset(dmabuf->virt, 0, LPFC_RAS_MAX_ENTRY_SIZE);
6436
6437 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_lo =
6438 putPaddrLow(dmabuf->phys);
6439
6440 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_hi =
6441 putPaddrHigh(dmabuf->phys);
6442 }
6443
6444 /* Update LPWD address */
6445 mbx_fwlog->u.request.lwpd.addr_lo = putPaddrLow(ras_fwlog->lwpd.phys);
6446 mbx_fwlog->u.request.lwpd.addr_hi = putPaddrHigh(ras_fwlog->lwpd.phys);
6447
6448 mbox->vport = phba->pport;
6449 mbox->mbox_cmpl = lpfc_sli4_ras_mbox_cmpl;
6450
6451 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
6452
6453 if (rc == MBX_NOT_FINISHED) {
cb34990b
JS
6454 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6455 "6191 FW-Log Mailbox failed. "
d2cc9bcd
JS
6456 "status %d mbxStatus : x%x", rc,
6457 bf_get(lpfc_mqe_status, &mbox->u.mqe));
6458 mempool_free(mbox, phba->mbox_mem_pool);
6459 rc = -EIO;
6460 goto mem_free;
6461 } else
6462 rc = 0;
6463mem_free:
6464 if (rc)
6465 lpfc_sli4_ras_dma_free(phba);
6466
6467 return rc;
6468}
6469
6470/**
6471 * lpfc_sli4_ras_setup - Check if RAS supported on the adapter
6472 * @phba: Pointer to HBA context object.
6473 *
6474 * Check if RAS is supported on the adapter and initialize it.
6475 **/
6476void
6477lpfc_sli4_ras_setup(struct lpfc_hba *phba)
6478{
6479 /* Check RAS FW Log needs to be enabled or not */
6480 if (lpfc_check_fwlog_support(phba))
6481 return;
6482
6483 lpfc_sli4_ras_fwlog_init(phba, phba->cfg_ras_fwlog_level,
6484 LPFC_RAS_ENABLE_LOGGING);
6485}
6486
6d368e53
JS
6487/**
6488 * lpfc_sli4_alloc_resource_identifiers - Allocate all SLI4 resource extents.
6489 * @phba: Pointer to HBA context object.
6490 *
6491 * This function allocates all SLI4 resource identifiers.
6492 **/
6493int
6494lpfc_sli4_alloc_resource_identifiers(struct lpfc_hba *phba)
6495{
6496 int i, rc, error = 0;
6497 uint16_t count, base;
6498 unsigned long longs;
6499
ff78d8f9
JS
6500 if (!phba->sli4_hba.rpi_hdrs_in_use)
6501 phba->sli4_hba.next_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
6d368e53
JS
6502 if (phba->sli4_hba.extents_in_use) {
6503 /*
6504 * The port supports resource extents. The XRI, VPI, VFI, RPI
6505 * resource extent count must be read and allocated before
6506 * provisioning the resource id arrays.
6507 */
6508 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
6509 LPFC_IDX_RSRC_RDY) {
6510 /*
6511 * Extent-based resources are set - the driver could
6512 * be in a port reset. Figure out if any corrective
6513 * actions need to be taken.
6514 */
6515 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6516 LPFC_RSC_TYPE_FCOE_VFI);
6517 if (rc != 0)
6518 error++;
6519 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6520 LPFC_RSC_TYPE_FCOE_VPI);
6521 if (rc != 0)
6522 error++;
6523 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6524 LPFC_RSC_TYPE_FCOE_XRI);
6525 if (rc != 0)
6526 error++;
6527 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6528 LPFC_RSC_TYPE_FCOE_RPI);
6529 if (rc != 0)
6530 error++;
6531
6532 /*
6533 * It's possible that the number of resources
6534 * provided to this port instance changed between
6535 * resets. Detect this condition and reallocate
6536 * resources. Otherwise, there is no action.
6537 */
6538 if (error) {
6539 lpfc_printf_log(phba, KERN_INFO,
6540 LOG_MBOX | LOG_INIT,
6541 "2931 Detected extent resource "
6542 "change. Reallocating all "
6543 "extents.\n");
6544 rc = lpfc_sli4_dealloc_extent(phba,
6545 LPFC_RSC_TYPE_FCOE_VFI);
6546 rc = lpfc_sli4_dealloc_extent(phba,
6547 LPFC_RSC_TYPE_FCOE_VPI);
6548 rc = lpfc_sli4_dealloc_extent(phba,
6549 LPFC_RSC_TYPE_FCOE_XRI);
6550 rc = lpfc_sli4_dealloc_extent(phba,
6551 LPFC_RSC_TYPE_FCOE_RPI);
6552 } else
6553 return 0;
6554 }
6555
6556 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6557 if (unlikely(rc))
6558 goto err_exit;
6559
6560 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6561 if (unlikely(rc))
6562 goto err_exit;
6563
6564 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6565 if (unlikely(rc))
6566 goto err_exit;
6567
6568 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6569 if (unlikely(rc))
6570 goto err_exit;
6571 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6572 LPFC_IDX_RSRC_RDY);
6573 return rc;
6574 } else {
6575 /*
6576 * The port does not support resource extents. The XRI, VPI,
6577 * VFI, RPI resource ids were determined from READ_CONFIG.
6578 * Just allocate the bitmasks and provision the resource id
6579 * arrays. If a port reset is active, the resources don't
6580 * need any action - just exit.
6581 */
6582 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
ff78d8f9
JS
6583 LPFC_IDX_RSRC_RDY) {
6584 lpfc_sli4_dealloc_resource_identifiers(phba);
6585 lpfc_sli4_remove_rpis(phba);
6586 }
6d368e53
JS
6587 /* RPIs. */
6588 count = phba->sli4_hba.max_cfg_param.max_rpi;
0a630c27
JS
6589 if (count <= 0) {
6590 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6591 "3279 Invalid provisioning of "
6592 "rpi:%d\n", count);
6593 rc = -EINVAL;
6594 goto err_exit;
6595 }
6d368e53
JS
6596 base = phba->sli4_hba.max_cfg_param.rpi_base;
6597 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6598 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
6599 sizeof(unsigned long),
6600 GFP_KERNEL);
6601 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
6602 rc = -ENOMEM;
6603 goto err_exit;
6604 }
6396bb22 6605 phba->sli4_hba.rpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6606 GFP_KERNEL);
6607 if (unlikely(!phba->sli4_hba.rpi_ids)) {
6608 rc = -ENOMEM;
6609 goto free_rpi_bmask;
6610 }
6611
6612 for (i = 0; i < count; i++)
6613 phba->sli4_hba.rpi_ids[i] = base + i;
6614
6615 /* VPIs. */
6616 count = phba->sli4_hba.max_cfg_param.max_vpi;
0a630c27
JS
6617 if (count <= 0) {
6618 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6619 "3280 Invalid provisioning of "
6620 "vpi:%d\n", count);
6621 rc = -EINVAL;
6622 goto free_rpi_ids;
6623 }
6d368e53
JS
6624 base = phba->sli4_hba.max_cfg_param.vpi_base;
6625 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6626 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
6627 GFP_KERNEL);
6628 if (unlikely(!phba->vpi_bmask)) {
6629 rc = -ENOMEM;
6630 goto free_rpi_ids;
6631 }
6396bb22 6632 phba->vpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6633 GFP_KERNEL);
6634 if (unlikely(!phba->vpi_ids)) {
6635 rc = -ENOMEM;
6636 goto free_vpi_bmask;
6637 }
6638
6639 for (i = 0; i < count; i++)
6640 phba->vpi_ids[i] = base + i;
6641
6642 /* XRIs. */
6643 count = phba->sli4_hba.max_cfg_param.max_xri;
0a630c27
JS
6644 if (count <= 0) {
6645 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6646 "3281 Invalid provisioning of "
6647 "xri:%d\n", count);
6648 rc = -EINVAL;
6649 goto free_vpi_ids;
6650 }
6d368e53
JS
6651 base = phba->sli4_hba.max_cfg_param.xri_base;
6652 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6653 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
6654 sizeof(unsigned long),
6655 GFP_KERNEL);
6656 if (unlikely(!phba->sli4_hba.xri_bmask)) {
6657 rc = -ENOMEM;
6658 goto free_vpi_ids;
6659 }
41899be7 6660 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 6661 phba->sli4_hba.xri_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6662 GFP_KERNEL);
6663 if (unlikely(!phba->sli4_hba.xri_ids)) {
6664 rc = -ENOMEM;
6665 goto free_xri_bmask;
6666 }
6667
6668 for (i = 0; i < count; i++)
6669 phba->sli4_hba.xri_ids[i] = base + i;
6670
6671 /* VFIs. */
6672 count = phba->sli4_hba.max_cfg_param.max_vfi;
0a630c27
JS
6673 if (count <= 0) {
6674 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6675 "3282 Invalid provisioning of "
6676 "vfi:%d\n", count);
6677 rc = -EINVAL;
6678 goto free_xri_ids;
6679 }
6d368e53
JS
6680 base = phba->sli4_hba.max_cfg_param.vfi_base;
6681 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6682 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
6683 sizeof(unsigned long),
6684 GFP_KERNEL);
6685 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
6686 rc = -ENOMEM;
6687 goto free_xri_ids;
6688 }
6396bb22 6689 phba->sli4_hba.vfi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6690 GFP_KERNEL);
6691 if (unlikely(!phba->sli4_hba.vfi_ids)) {
6692 rc = -ENOMEM;
6693 goto free_vfi_bmask;
6694 }
6695
6696 for (i = 0; i < count; i++)
6697 phba->sli4_hba.vfi_ids[i] = base + i;
6698
6699 /*
6700 * Mark all resources ready. An HBA reset doesn't need
6701 * to reset the initialization.
6702 */
6703 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6704 LPFC_IDX_RSRC_RDY);
6705 return 0;
6706 }
6707
6708 free_vfi_bmask:
6709 kfree(phba->sli4_hba.vfi_bmask);
cd60be49 6710 phba->sli4_hba.vfi_bmask = NULL;
6d368e53
JS
6711 free_xri_ids:
6712 kfree(phba->sli4_hba.xri_ids);
cd60be49 6713 phba->sli4_hba.xri_ids = NULL;
6d368e53
JS
6714 free_xri_bmask:
6715 kfree(phba->sli4_hba.xri_bmask);
cd60be49 6716 phba->sli4_hba.xri_bmask = NULL;
6d368e53
JS
6717 free_vpi_ids:
6718 kfree(phba->vpi_ids);
cd60be49 6719 phba->vpi_ids = NULL;
6d368e53
JS
6720 free_vpi_bmask:
6721 kfree(phba->vpi_bmask);
cd60be49 6722 phba->vpi_bmask = NULL;
6d368e53
JS
6723 free_rpi_ids:
6724 kfree(phba->sli4_hba.rpi_ids);
cd60be49 6725 phba->sli4_hba.rpi_ids = NULL;
6d368e53
JS
6726 free_rpi_bmask:
6727 kfree(phba->sli4_hba.rpi_bmask);
cd60be49 6728 phba->sli4_hba.rpi_bmask = NULL;
6d368e53
JS
6729 err_exit:
6730 return rc;
6731}
6732
6733/**
6734 * lpfc_sli4_dealloc_resource_identifiers - Deallocate all SLI4 resource extents.
6735 * @phba: Pointer to HBA context object.
6736 *
6737 * This function allocates the number of elements for the specified
6738 * resource type.
6739 **/
6740int
6741lpfc_sli4_dealloc_resource_identifiers(struct lpfc_hba *phba)
6742{
6743 if (phba->sli4_hba.extents_in_use) {
6744 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6745 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6746 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6747 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6748 } else {
6749 kfree(phba->vpi_bmask);
16a3a208 6750 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6751 kfree(phba->vpi_ids);
6752 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6753 kfree(phba->sli4_hba.xri_bmask);
6754 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6755 kfree(phba->sli4_hba.vfi_bmask);
6756 kfree(phba->sli4_hba.vfi_ids);
6757 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6758 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6759 }
6760
6761 return 0;
6762}
6763
b76f2dc9
JS
6764/**
6765 * lpfc_sli4_get_allocated_extnts - Get the port's allocated extents.
6766 * @phba: Pointer to HBA context object.
6767 * @type: The resource extent type.
6768 * @extnt_count: buffer to hold port extent count response
6769 * @extnt_size: buffer to hold port extent size response.
6770 *
6771 * This function calls the port to read the host allocated extents
6772 * for a particular type.
6773 **/
6774int
6775lpfc_sli4_get_allocated_extnts(struct lpfc_hba *phba, uint16_t type,
6776 uint16_t *extnt_cnt, uint16_t *extnt_size)
6777{
6778 bool emb;
6779 int rc = 0;
6780 uint16_t curr_blks = 0;
6781 uint32_t req_len, emb_len;
6782 uint32_t alloc_len, mbox_tmo;
6783 struct list_head *blk_list_head;
6784 struct lpfc_rsrc_blks *rsrc_blk;
6785 LPFC_MBOXQ_t *mbox;
6786 void *virtaddr = NULL;
6787 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
6788 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
6789 union lpfc_sli4_cfg_shdr *shdr;
6790
6791 switch (type) {
6792 case LPFC_RSC_TYPE_FCOE_VPI:
6793 blk_list_head = &phba->lpfc_vpi_blk_list;
6794 break;
6795 case LPFC_RSC_TYPE_FCOE_XRI:
6796 blk_list_head = &phba->sli4_hba.lpfc_xri_blk_list;
6797 break;
6798 case LPFC_RSC_TYPE_FCOE_VFI:
6799 blk_list_head = &phba->sli4_hba.lpfc_vfi_blk_list;
6800 break;
6801 case LPFC_RSC_TYPE_FCOE_RPI:
6802 blk_list_head = &phba->sli4_hba.lpfc_rpi_blk_list;
6803 break;
6804 default:
6805 return -EIO;
6806 }
6807
6808 /* Count the number of extents currently allocatd for this type. */
6809 list_for_each_entry(rsrc_blk, blk_list_head, list) {
6810 if (curr_blks == 0) {
6811 /*
6812 * The GET_ALLOCATED mailbox does not return the size,
6813 * just the count. The size should be just the size
6814 * stored in the current allocated block and all sizes
6815 * for an extent type are the same so set the return
6816 * value now.
6817 */
6818 *extnt_size = rsrc_blk->rsrc_size;
6819 }
6820 curr_blks++;
6821 }
6822
b76f2dc9
JS
6823 /*
6824 * Calculate the size of an embedded mailbox. The uint32_t
6825 * accounts for extents-specific word.
6826 */
6827 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
6828 sizeof(uint32_t);
6829
6830 /*
6831 * Presume the allocation and response will fit into an embedded
6832 * mailbox. If not true, reconfigure to a non-embedded mailbox.
6833 */
6834 emb = LPFC_SLI4_MBX_EMBED;
6835 req_len = emb_len;
6836 if (req_len > emb_len) {
6837 req_len = curr_blks * sizeof(uint16_t) +
6838 sizeof(union lpfc_sli4_cfg_shdr) +
6839 sizeof(uint32_t);
6840 emb = LPFC_SLI4_MBX_NEMBED;
6841 }
6842
6843 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6844 if (!mbox)
6845 return -ENOMEM;
6846 memset(mbox, 0, sizeof(LPFC_MBOXQ_t));
6847
6848 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6849 LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT,
6850 req_len, emb);
6851 if (alloc_len < req_len) {
6852 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6853 "2983 Allocated DMA memory size (x%x) is "
6854 "less than the requested DMA memory "
6855 "size (x%x)\n", alloc_len, req_len);
6856 rc = -ENOMEM;
6857 goto err_exit;
6858 }
6859 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, curr_blks, type, emb);
6860 if (unlikely(rc)) {
6861 rc = -EIO;
6862 goto err_exit;
6863 }
6864
6865 if (!phba->sli4_hba.intr_enable)
6866 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6867 else {
a183a15f 6868 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
b76f2dc9
JS
6869 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6870 }
6871
6872 if (unlikely(rc)) {
6873 rc = -EIO;
6874 goto err_exit;
6875 }
6876
6877 /*
6878 * Figure out where the response is located. Then get local pointers
6879 * to the response data. The port does not guarantee to respond to
6880 * all extents counts request so update the local variable with the
6881 * allocated count from the port.
6882 */
6883 if (emb == LPFC_SLI4_MBX_EMBED) {
6884 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
6885 shdr = &rsrc_ext->header.cfg_shdr;
6886 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
6887 } else {
6888 virtaddr = mbox->sge_array->addr[0];
6889 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
6890 shdr = &n_rsrc->cfg_shdr;
6891 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
6892 }
6893
6894 if (bf_get(lpfc_mbox_hdr_status, &shdr->response)) {
6895 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6896 "2984 Failed to read allocated resources "
6897 "for type %d - Status 0x%x Add'l Status 0x%x.\n",
6898 type,
6899 bf_get(lpfc_mbox_hdr_status, &shdr->response),
6900 bf_get(lpfc_mbox_hdr_add_status, &shdr->response));
6901 rc = -EIO;
6902 goto err_exit;
6903 }
6904 err_exit:
6905 lpfc_sli4_mbox_cmd_free(phba, mbox);
6906 return rc;
6907}
6908
8a9d2e80 6909/**
0ef69968 6910 * lpfc_sli4_repost_sgl_list - Repost the buffers sgl pages as block
8a9d2e80 6911 * @phba: pointer to lpfc hba data structure.
895427bd
JS
6912 * @pring: Pointer to driver SLI ring object.
6913 * @sgl_list: linked link of sgl buffers to post
6914 * @cnt: number of linked list buffers
8a9d2e80 6915 *
895427bd 6916 * This routine walks the list of buffers that have been allocated and
8a9d2e80
JS
6917 * repost them to the port by using SGL block post. This is needed after a
6918 * pci_function_reset/warm_start or start. It attempts to construct blocks
895427bd
JS
6919 * of buffer sgls which contains contiguous xris and uses the non-embedded
6920 * SGL block post mailbox commands to post them to the port. For single
8a9d2e80
JS
6921 * buffer sgl with non-contiguous xri, if any, it shall use embedded SGL post
6922 * mailbox command for posting.
6923 *
6924 * Returns: 0 = success, non-zero failure.
6925 **/
6926static int
895427bd
JS
6927lpfc_sli4_repost_sgl_list(struct lpfc_hba *phba,
6928 struct list_head *sgl_list, int cnt)
8a9d2e80
JS
6929{
6930 struct lpfc_sglq *sglq_entry = NULL;
6931 struct lpfc_sglq *sglq_entry_next = NULL;
6932 struct lpfc_sglq *sglq_entry_first = NULL;
895427bd
JS
6933 int status, total_cnt;
6934 int post_cnt = 0, num_posted = 0, block_cnt = 0;
8a9d2e80
JS
6935 int last_xritag = NO_XRI;
6936 LIST_HEAD(prep_sgl_list);
6937 LIST_HEAD(blck_sgl_list);
6938 LIST_HEAD(allc_sgl_list);
6939 LIST_HEAD(post_sgl_list);
6940 LIST_HEAD(free_sgl_list);
6941
38c20673 6942 spin_lock_irq(&phba->hbalock);
895427bd
JS
6943 spin_lock(&phba->sli4_hba.sgl_list_lock);
6944 list_splice_init(sgl_list, &allc_sgl_list);
6945 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 6946 spin_unlock_irq(&phba->hbalock);
8a9d2e80 6947
895427bd 6948 total_cnt = cnt;
8a9d2e80
JS
6949 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
6950 &allc_sgl_list, list) {
6951 list_del_init(&sglq_entry->list);
6952 block_cnt++;
6953 if ((last_xritag != NO_XRI) &&
6954 (sglq_entry->sli4_xritag != last_xritag + 1)) {
6955 /* a hole in xri block, form a sgl posting block */
6956 list_splice_init(&prep_sgl_list, &blck_sgl_list);
6957 post_cnt = block_cnt - 1;
6958 /* prepare list for next posting block */
6959 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6960 block_cnt = 1;
6961 } else {
6962 /* prepare list for next posting block */
6963 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6964 /* enough sgls for non-embed sgl mbox command */
6965 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
6966 list_splice_init(&prep_sgl_list,
6967 &blck_sgl_list);
6968 post_cnt = block_cnt;
6969 block_cnt = 0;
6970 }
6971 }
6972 num_posted++;
6973
6974 /* keep track of last sgl's xritag */
6975 last_xritag = sglq_entry->sli4_xritag;
6976
895427bd
JS
6977 /* end of repost sgl list condition for buffers */
6978 if (num_posted == total_cnt) {
8a9d2e80
JS
6979 if (post_cnt == 0) {
6980 list_splice_init(&prep_sgl_list,
6981 &blck_sgl_list);
6982 post_cnt = block_cnt;
6983 } else if (block_cnt == 1) {
6984 status = lpfc_sli4_post_sgl(phba,
6985 sglq_entry->phys, 0,
6986 sglq_entry->sli4_xritag);
6987 if (!status) {
6988 /* successful, put sgl to posted list */
6989 list_add_tail(&sglq_entry->list,
6990 &post_sgl_list);
6991 } else {
6992 /* Failure, put sgl to free list */
6993 lpfc_printf_log(phba, KERN_WARNING,
6994 LOG_SLI,
895427bd 6995 "3159 Failed to post "
8a9d2e80
JS
6996 "sgl, xritag:x%x\n",
6997 sglq_entry->sli4_xritag);
6998 list_add_tail(&sglq_entry->list,
6999 &free_sgl_list);
711ea882 7000 total_cnt--;
8a9d2e80
JS
7001 }
7002 }
7003 }
7004
7005 /* continue until a nembed page worth of sgls */
7006 if (post_cnt == 0)
7007 continue;
7008
895427bd
JS
7009 /* post the buffer list sgls as a block */
7010 status = lpfc_sli4_post_sgl_list(phba, &blck_sgl_list,
7011 post_cnt);
8a9d2e80
JS
7012
7013 if (!status) {
7014 /* success, put sgl list to posted sgl list */
7015 list_splice_init(&blck_sgl_list, &post_sgl_list);
7016 } else {
7017 /* Failure, put sgl list to free sgl list */
7018 sglq_entry_first = list_first_entry(&blck_sgl_list,
7019 struct lpfc_sglq,
7020 list);
7021 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
895427bd 7022 "3160 Failed to post sgl-list, "
8a9d2e80
JS
7023 "xritag:x%x-x%x\n",
7024 sglq_entry_first->sli4_xritag,
7025 (sglq_entry_first->sli4_xritag +
7026 post_cnt - 1));
7027 list_splice_init(&blck_sgl_list, &free_sgl_list);
711ea882 7028 total_cnt -= post_cnt;
8a9d2e80
JS
7029 }
7030
7031 /* don't reset xirtag due to hole in xri block */
7032 if (block_cnt == 0)
7033 last_xritag = NO_XRI;
7034
895427bd 7035 /* reset sgl post count for next round of posting */
8a9d2e80
JS
7036 post_cnt = 0;
7037 }
7038
895427bd 7039 /* free the sgls failed to post */
8a9d2e80
JS
7040 lpfc_free_sgl_list(phba, &free_sgl_list);
7041
895427bd 7042 /* push sgls posted to the available list */
8a9d2e80 7043 if (!list_empty(&post_sgl_list)) {
38c20673 7044 spin_lock_irq(&phba->hbalock);
895427bd
JS
7045 spin_lock(&phba->sli4_hba.sgl_list_lock);
7046 list_splice_init(&post_sgl_list, sgl_list);
7047 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 7048 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
7049 } else {
7050 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 7051 "3161 Failure to post sgl to port.\n");
8a9d2e80
JS
7052 return -EIO;
7053 }
895427bd
JS
7054
7055 /* return the number of XRIs actually posted */
7056 return total_cnt;
8a9d2e80
JS
7057}
7058
61bda8f7
JS
7059void
7060lpfc_set_host_data(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
7061{
7062 uint32_t len;
7063
7064 len = sizeof(struct lpfc_mbx_set_host_data) -
7065 sizeof(struct lpfc_sli4_cfg_mhdr);
7066 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
7067 LPFC_MBOX_OPCODE_SET_HOST_DATA, len,
7068 LPFC_SLI4_MBX_EMBED);
7069
7070 mbox->u.mqe.un.set_host_data.param_id = LPFC_SET_HOST_OS_DRIVER_VERSION;
b2fd103b
JS
7071 mbox->u.mqe.un.set_host_data.param_len =
7072 LPFC_HOST_OS_DRIVER_VERSION_SIZE;
61bda8f7
JS
7073 snprintf(mbox->u.mqe.un.set_host_data.data,
7074 LPFC_HOST_OS_DRIVER_VERSION_SIZE,
7075 "Linux %s v"LPFC_DRIVER_VERSION,
7076 (phba->hba_flag & HBA_FCOE_MODE) ? "FCoE" : "FC");
7077}
7078
a8cf5dfe 7079int
6c621a22 7080lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
a8cf5dfe 7081 struct lpfc_queue *drq, int count, int idx)
6c621a22
JS
7082{
7083 int rc, i;
7084 struct lpfc_rqe hrqe;
7085 struct lpfc_rqe drqe;
7086 struct lpfc_rqb *rqbp;
411de511 7087 unsigned long flags;
6c621a22
JS
7088 struct rqb_dmabuf *rqb_buffer;
7089 LIST_HEAD(rqb_buf_list);
7090
411de511 7091 spin_lock_irqsave(&phba->hbalock, flags);
6c621a22
JS
7092 rqbp = hrq->rqbp;
7093 for (i = 0; i < count; i++) {
7094 /* IF RQ is already full, don't bother */
7095 if (rqbp->buffer_count + i >= rqbp->entry_count - 1)
7096 break;
7097 rqb_buffer = rqbp->rqb_alloc_buffer(phba);
7098 if (!rqb_buffer)
7099 break;
7100 rqb_buffer->hrq = hrq;
7101 rqb_buffer->drq = drq;
a8cf5dfe 7102 rqb_buffer->idx = idx;
6c621a22
JS
7103 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
7104 }
7105 while (!list_empty(&rqb_buf_list)) {
7106 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
7107 hbuf.list);
7108
7109 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
7110 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
7111 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
7112 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
7113 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
7114 if (rc < 0) {
411de511
JS
7115 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7116 "6421 Cannot post to HRQ %d: %x %x %x "
7117 "DRQ %x %x\n",
7118 hrq->queue_id,
7119 hrq->host_index,
7120 hrq->hba_index,
7121 hrq->entry_count,
7122 drq->host_index,
7123 drq->hba_index);
6c621a22
JS
7124 rqbp->rqb_free_buffer(phba, rqb_buffer);
7125 } else {
7126 list_add_tail(&rqb_buffer->hbuf.list,
7127 &rqbp->rqb_buffer_list);
7128 rqbp->buffer_count++;
7129 }
7130 }
411de511 7131 spin_unlock_irqrestore(&phba->hbalock, flags);
6c621a22
JS
7132 return 1;
7133}
7134
da0436e9 7135/**
183b8021 7136 * lpfc_sli4_hba_setup - SLI4 device initialization PCI function
da0436e9
JS
7137 * @phba: Pointer to HBA context object.
7138 *
183b8021
MY
7139 * This function is the main SLI4 device initialization PCI function. This
7140 * function is called by the HBA initialization code, HBA reset code and
da0436e9
JS
7141 * HBA error attention handler code. Caller is not required to hold any
7142 * locks.
7143 **/
7144int
7145lpfc_sli4_hba_setup(struct lpfc_hba *phba)
7146{
6c621a22 7147 int rc, i, cnt;
da0436e9
JS
7148 LPFC_MBOXQ_t *mboxq;
7149 struct lpfc_mqe *mqe;
7150 uint8_t *vpd;
7151 uint32_t vpd_size;
7152 uint32_t ftr_rsp = 0;
7153 struct Scsi_Host *shost = lpfc_shost_from_vport(phba->pport);
7154 struct lpfc_vport *vport = phba->pport;
7155 struct lpfc_dmabuf *mp;
2d7dbc4c 7156 struct lpfc_rqb *rqbp;
da0436e9
JS
7157
7158 /* Perform a PCI function reset to start from clean */
7159 rc = lpfc_pci_function_reset(phba);
7160 if (unlikely(rc))
7161 return -ENODEV;
7162
7163 /* Check the HBA Host Status Register for readyness */
7164 rc = lpfc_sli4_post_status_check(phba);
7165 if (unlikely(rc))
7166 return -ENODEV;
7167 else {
7168 spin_lock_irq(&phba->hbalock);
7169 phba->sli.sli_flag |= LPFC_SLI_ACTIVE;
7170 spin_unlock_irq(&phba->hbalock);
7171 }
7172
7173 /*
7174 * Allocate a single mailbox container for initializing the
7175 * port.
7176 */
7177 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7178 if (!mboxq)
7179 return -ENOMEM;
7180
da0436e9 7181 /* Issue READ_REV to collect vpd and FW information. */
49198b37 7182 vpd_size = SLI4_PAGE_SIZE;
da0436e9
JS
7183 vpd = kzalloc(vpd_size, GFP_KERNEL);
7184 if (!vpd) {
7185 rc = -ENOMEM;
7186 goto out_free_mbox;
7187 }
7188
7189 rc = lpfc_sli4_read_rev(phba, mboxq, vpd, &vpd_size);
76a95d75
JS
7190 if (unlikely(rc)) {
7191 kfree(vpd);
7192 goto out_free_mbox;
7193 }
572709e2 7194
da0436e9 7195 mqe = &mboxq->u.mqe;
f1126688 7196 phba->sli_rev = bf_get(lpfc_mbx_rd_rev_sli_lvl, &mqe->un.read_rev);
b5c53958 7197 if (bf_get(lpfc_mbx_rd_rev_fcoe, &mqe->un.read_rev)) {
76a95d75 7198 phba->hba_flag |= HBA_FCOE_MODE;
b5c53958
JS
7199 phba->fcp_embed_io = 0; /* SLI4 FC support only */
7200 } else {
76a95d75 7201 phba->hba_flag &= ~HBA_FCOE_MODE;
b5c53958 7202 }
45ed1190
JS
7203
7204 if (bf_get(lpfc_mbx_rd_rev_cee_ver, &mqe->un.read_rev) ==
7205 LPFC_DCBX_CEE_MODE)
7206 phba->hba_flag |= HBA_FIP_SUPPORT;
7207 else
7208 phba->hba_flag &= ~HBA_FIP_SUPPORT;
7209
4f2e66c6
JS
7210 phba->hba_flag &= ~HBA_FCP_IOQ_FLUSH;
7211
c31098ce 7212 if (phba->sli_rev != LPFC_SLI_REV4) {
da0436e9
JS
7213 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7214 "0376 READ_REV Error. SLI Level %d "
7215 "FCoE enabled %d\n",
76a95d75 7216 phba->sli_rev, phba->hba_flag & HBA_FCOE_MODE);
da0436e9 7217 rc = -EIO;
76a95d75
JS
7218 kfree(vpd);
7219 goto out_free_mbox;
da0436e9 7220 }
cd1c8301 7221
ff78d8f9
JS
7222 /*
7223 * Continue initialization with default values even if driver failed
7224 * to read FCoE param config regions, only read parameters if the
7225 * board is FCoE
7226 */
7227 if (phba->hba_flag & HBA_FCOE_MODE &&
7228 lpfc_sli4_read_fcoe_params(phba))
7229 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_INIT,
7230 "2570 Failed to read FCoE parameters\n");
7231
cd1c8301
JS
7232 /*
7233 * Retrieve sli4 device physical port name, failure of doing it
7234 * is considered as non-fatal.
7235 */
7236 rc = lpfc_sli4_retrieve_pport_name(phba);
7237 if (!rc)
7238 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7239 "3080 Successful retrieving SLI4 device "
7240 "physical port name: %s.\n", phba->Port);
7241
da0436e9
JS
7242 /*
7243 * Evaluate the read rev and vpd data. Populate the driver
7244 * state with the results. If this routine fails, the failure
7245 * is not fatal as the driver will use generic values.
7246 */
7247 rc = lpfc_parse_vpd(phba, vpd, vpd_size);
7248 if (unlikely(!rc)) {
7249 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7250 "0377 Error %d parsing vpd. "
7251 "Using defaults.\n", rc);
7252 rc = 0;
7253 }
76a95d75 7254 kfree(vpd);
da0436e9 7255
f1126688
JS
7256 /* Save information as VPD data */
7257 phba->vpd.rev.biuRev = mqe->un.read_rev.first_hw_rev;
7258 phba->vpd.rev.smRev = mqe->un.read_rev.second_hw_rev;
4e565cf0
JS
7259
7260 /*
7261 * This is because first G7 ASIC doesn't support the standard
7262 * 0x5a NVME cmd descriptor type/subtype
7263 */
7264 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7265 LPFC_SLI_INTF_IF_TYPE_6) &&
7266 (phba->vpd.rev.biuRev == LPFC_G7_ASIC_1) &&
7267 (phba->vpd.rev.smRev == 0) &&
7268 (phba->cfg_nvme_embed_cmd == 1))
7269 phba->cfg_nvme_embed_cmd = 0;
7270
f1126688
JS
7271 phba->vpd.rev.endecRev = mqe->un.read_rev.third_hw_rev;
7272 phba->vpd.rev.fcphHigh = bf_get(lpfc_mbx_rd_rev_fcph_high,
7273 &mqe->un.read_rev);
7274 phba->vpd.rev.fcphLow = bf_get(lpfc_mbx_rd_rev_fcph_low,
7275 &mqe->un.read_rev);
7276 phba->vpd.rev.feaLevelHigh = bf_get(lpfc_mbx_rd_rev_ftr_lvl_high,
7277 &mqe->un.read_rev);
7278 phba->vpd.rev.feaLevelLow = bf_get(lpfc_mbx_rd_rev_ftr_lvl_low,
7279 &mqe->un.read_rev);
7280 phba->vpd.rev.sli1FwRev = mqe->un.read_rev.fw_id_rev;
7281 memcpy(phba->vpd.rev.sli1FwName, mqe->un.read_rev.fw_name, 16);
7282 phba->vpd.rev.sli2FwRev = mqe->un.read_rev.ulp_fw_id_rev;
7283 memcpy(phba->vpd.rev.sli2FwName, mqe->un.read_rev.ulp_fw_name, 16);
7284 phba->vpd.rev.opFwRev = mqe->un.read_rev.fw_id_rev;
7285 memcpy(phba->vpd.rev.opFwName, mqe->un.read_rev.fw_name, 16);
7286 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7287 "(%d):0380 READ_REV Status x%x "
7288 "fw_rev:%s fcphHi:%x fcphLo:%x flHi:%x flLo:%x\n",
7289 mboxq->vport ? mboxq->vport->vpi : 0,
7290 bf_get(lpfc_mqe_status, mqe),
7291 phba->vpd.rev.opFwName,
7292 phba->vpd.rev.fcphHigh, phba->vpd.rev.fcphLow,
7293 phba->vpd.rev.feaLevelHigh, phba->vpd.rev.feaLevelLow);
da0436e9 7294
572709e2
JS
7295 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
7296 rc = (phba->sli4_hba.max_cfg_param.max_xri >> 3);
7297 if (phba->pport->cfg_lun_queue_depth > rc) {
7298 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7299 "3362 LUN queue depth changed from %d to %d\n",
7300 phba->pport->cfg_lun_queue_depth, rc);
7301 phba->pport->cfg_lun_queue_depth = rc;
7302 }
7303
65791f1f 7304 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7bdedb34
JS
7305 LPFC_SLI_INTF_IF_TYPE_0) {
7306 lpfc_set_features(phba, mboxq, LPFC_SET_UE_RECOVERY);
7307 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7308 if (rc == MBX_SUCCESS) {
7309 phba->hba_flag |= HBA_RECOVERABLE_UE;
7310 /* Set 1Sec interval to detect UE */
7311 phba->eratt_poll_interval = 1;
7312 phba->sli4_hba.ue_to_sr = bf_get(
7313 lpfc_mbx_set_feature_UESR,
7314 &mboxq->u.mqe.un.set_feature);
7315 phba->sli4_hba.ue_to_rp = bf_get(
7316 lpfc_mbx_set_feature_UERP,
7317 &mboxq->u.mqe.un.set_feature);
7318 }
7319 }
7320
7321 if (phba->cfg_enable_mds_diags && phba->mds_diags_support) {
7322 /* Enable MDS Diagnostics only if the SLI Port supports it */
7323 lpfc_set_features(phba, mboxq, LPFC_SET_MDS_DIAGS);
7324 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7325 if (rc != MBX_SUCCESS)
7326 phba->mds_diags_support = 0;
7327 }
572709e2 7328
da0436e9
JS
7329 /*
7330 * Discover the port's supported feature set and match it against the
7331 * hosts requests.
7332 */
7333 lpfc_request_features(phba, mboxq);
7334 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7335 if (unlikely(rc)) {
7336 rc = -EIO;
76a95d75 7337 goto out_free_mbox;
da0436e9
JS
7338 }
7339
7340 /*
7341 * The port must support FCP initiator mode as this is the
7342 * only mode running in the host.
7343 */
7344 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_fcpi, &mqe->un.req_ftrs))) {
7345 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7346 "0378 No support for fcpi mode.\n");
7347 ftr_rsp++;
7348 }
0bc2b7c5
JS
7349
7350 /* Performance Hints are ONLY for FCoE */
7351 if (phba->hba_flag & HBA_FCOE_MODE) {
7352 if (bf_get(lpfc_mbx_rq_ftr_rsp_perfh, &mqe->un.req_ftrs))
7353 phba->sli3_options |= LPFC_SLI4_PERFH_ENABLED;
7354 else
7355 phba->sli3_options &= ~LPFC_SLI4_PERFH_ENABLED;
7356 }
7357
da0436e9
JS
7358 /*
7359 * If the port cannot support the host's requested features
7360 * then turn off the global config parameters to disable the
7361 * feature in the driver. This is not a fatal error.
7362 */
f44ac12f
JS
7363 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
7364 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs))) {
7365 phba->cfg_enable_bg = 0;
7366 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
bf08611b 7367 ftr_rsp++;
f44ac12f 7368 }
bf08611b 7369 }
da0436e9
JS
7370
7371 if (phba->max_vpi && phba->cfg_enable_npiv &&
7372 !(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7373 ftr_rsp++;
7374
7375 if (ftr_rsp) {
7376 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7377 "0379 Feature Mismatch Data: x%08x %08x "
7378 "x%x x%x x%x\n", mqe->un.req_ftrs.word2,
7379 mqe->un.req_ftrs.word3, phba->cfg_enable_bg,
7380 phba->cfg_enable_npiv, phba->max_vpi);
7381 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs)))
7382 phba->cfg_enable_bg = 0;
7383 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7384 phba->cfg_enable_npiv = 0;
7385 }
7386
7387 /* These SLI3 features are assumed in SLI4 */
7388 spin_lock_irq(&phba->hbalock);
7389 phba->sli3_options |= (LPFC_SLI3_NPIV_ENABLED | LPFC_SLI3_HBQ_ENABLED);
7390 spin_unlock_irq(&phba->hbalock);
7391
6d368e53
JS
7392 /*
7393 * Allocate all resources (xri,rpi,vpi,vfi) now. Subsequent
7394 * calls depends on these resources to complete port setup.
7395 */
7396 rc = lpfc_sli4_alloc_resource_identifiers(phba);
7397 if (rc) {
7398 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7399 "2920 Failed to alloc Resource IDs "
7400 "rc = x%x\n", rc);
7401 goto out_free_mbox;
7402 }
7403
61bda8f7
JS
7404 lpfc_set_host_data(phba, mboxq);
7405
7406 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7407 if (rc) {
7408 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7409 "2134 Failed to set host os driver version %x",
7410 rc);
7411 }
7412
da0436e9 7413 /* Read the port's service parameters. */
9f1177a3
JS
7414 rc = lpfc_read_sparam(phba, mboxq, vport->vpi);
7415 if (rc) {
7416 phba->link_state = LPFC_HBA_ERROR;
7417 rc = -ENOMEM;
76a95d75 7418 goto out_free_mbox;
9f1177a3
JS
7419 }
7420
da0436e9
JS
7421 mboxq->vport = vport;
7422 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3e1f0718 7423 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
7424 if (rc == MBX_SUCCESS) {
7425 memcpy(&vport->fc_sparam, mp->virt, sizeof(struct serv_parm));
7426 rc = 0;
7427 }
7428
7429 /*
7430 * This memory was allocated by the lpfc_read_sparam routine. Release
7431 * it to the mbuf pool.
7432 */
7433 lpfc_mbuf_free(phba, mp->virt, mp->phys);
7434 kfree(mp);
3e1f0718 7435 mboxq->ctx_buf = NULL;
da0436e9
JS
7436 if (unlikely(rc)) {
7437 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7438 "0382 READ_SPARAM command failed "
7439 "status %d, mbxStatus x%x\n",
7440 rc, bf_get(lpfc_mqe_status, mqe));
7441 phba->link_state = LPFC_HBA_ERROR;
7442 rc = -EIO;
76a95d75 7443 goto out_free_mbox;
da0436e9
JS
7444 }
7445
0558056c 7446 lpfc_update_vport_wwn(vport);
da0436e9
JS
7447
7448 /* Update the fc_host data structures with new wwn. */
7449 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
7450 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
7451
895427bd
JS
7452 /* Create all the SLI4 queues */
7453 rc = lpfc_sli4_queue_create(phba);
7454 if (rc) {
7455 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7456 "3089 Failed to allocate queues\n");
7457 rc = -ENODEV;
7458 goto out_free_mbox;
7459 }
7460 /* Set up all the queues to the device */
7461 rc = lpfc_sli4_queue_setup(phba);
7462 if (unlikely(rc)) {
7463 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7464 "0381 Error %d during queue setup.\n ", rc);
7465 goto out_stop_timers;
7466 }
7467 /* Initialize the driver internal SLI layer lists. */
7468 lpfc_sli4_setup(phba);
7469 lpfc_sli4_queue_init(phba);
7470
7471 /* update host els xri-sgl sizes and mappings */
7472 rc = lpfc_sli4_els_sgl_update(phba);
8a9d2e80
JS
7473 if (unlikely(rc)) {
7474 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7475 "1400 Failed to update xri-sgl size and "
7476 "mapping: %d\n", rc);
895427bd 7477 goto out_destroy_queue;
da0436e9
JS
7478 }
7479
8a9d2e80 7480 /* register the els sgl pool to the port */
895427bd
JS
7481 rc = lpfc_sli4_repost_sgl_list(phba, &phba->sli4_hba.lpfc_els_sgl_list,
7482 phba->sli4_hba.els_xri_cnt);
7483 if (unlikely(rc < 0)) {
8a9d2e80
JS
7484 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7485 "0582 Error %d during els sgl post "
7486 "operation\n", rc);
7487 rc = -ENODEV;
895427bd 7488 goto out_destroy_queue;
8a9d2e80 7489 }
895427bd 7490 phba->sli4_hba.els_xri_cnt = rc;
8a9d2e80 7491
f358dd0c
JS
7492 if (phba->nvmet_support) {
7493 /* update host nvmet xri-sgl sizes and mappings */
7494 rc = lpfc_sli4_nvmet_sgl_update(phba);
7495 if (unlikely(rc)) {
7496 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7497 "6308 Failed to update nvmet-sgl size "
7498 "and mapping: %d\n", rc);
7499 goto out_destroy_queue;
7500 }
7501
7502 /* register the nvmet sgl pool to the port */
7503 rc = lpfc_sli4_repost_sgl_list(
7504 phba,
7505 &phba->sli4_hba.lpfc_nvmet_sgl_list,
7506 phba->sli4_hba.nvmet_xri_cnt);
7507 if (unlikely(rc < 0)) {
7508 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7509 "3117 Error %d during nvmet "
7510 "sgl post\n", rc);
7511 rc = -ENODEV;
7512 goto out_destroy_queue;
7513 }
7514 phba->sli4_hba.nvmet_xri_cnt = rc;
6c621a22
JS
7515
7516 cnt = phba->cfg_iocb_cnt * 1024;
7517 /* We need 1 iocbq for every SGL, for IO processing */
7518 cnt += phba->sli4_hba.nvmet_xri_cnt;
f358dd0c 7519 } else {
895427bd
JS
7520 /* update host scsi xri-sgl sizes and mappings */
7521 rc = lpfc_sli4_scsi_sgl_update(phba);
7522 if (unlikely(rc)) {
7523 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7524 "6309 Failed to update scsi-sgl size "
7525 "and mapping: %d\n", rc);
7526 goto out_destroy_queue;
7527 }
7528
7529 /* update host nvme xri-sgl sizes and mappings */
7530 rc = lpfc_sli4_nvme_sgl_update(phba);
7531 if (unlikely(rc)) {
7532 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7533 "6082 Failed to update nvme-sgl size "
7534 "and mapping: %d\n", rc);
7535 goto out_destroy_queue;
7536 }
6c621a22
JS
7537
7538 cnt = phba->cfg_iocb_cnt * 1024;
11e644e2
JS
7539 }
7540
7541 if (!phba->sli.iocbq_lookup) {
6c621a22
JS
7542 /* Initialize and populate the iocb list per host */
7543 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11e644e2 7544 "2821 initialize iocb list %d total %d\n",
6c621a22
JS
7545 phba->cfg_iocb_cnt, cnt);
7546 rc = lpfc_init_iocb_list(phba, cnt);
7547 if (rc) {
7548 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11e644e2 7549 "1413 Failed to init iocb list.\n");
6c621a22
JS
7550 goto out_destroy_queue;
7551 }
895427bd
JS
7552 }
7553
11e644e2
JS
7554 if (phba->nvmet_support)
7555 lpfc_nvmet_create_targetport(phba);
7556
2d7dbc4c 7557 if (phba->nvmet_support && phba->cfg_nvmet_mrq) {
2d7dbc4c
JS
7558 /* Post initial buffers to all RQs created */
7559 for (i = 0; i < phba->cfg_nvmet_mrq; i++) {
7560 rqbp = phba->sli4_hba.nvmet_mrq_hdr[i]->rqbp;
7561 INIT_LIST_HEAD(&rqbp->rqb_buffer_list);
7562 rqbp->rqb_alloc_buffer = lpfc_sli4_nvmet_alloc;
7563 rqbp->rqb_free_buffer = lpfc_sli4_nvmet_free;
61f3d4bf 7564 rqbp->entry_count = LPFC_NVMET_RQE_DEF_COUNT;
2d7dbc4c
JS
7565 rqbp->buffer_count = 0;
7566
2d7dbc4c
JS
7567 lpfc_post_rq_buffer(
7568 phba, phba->sli4_hba.nvmet_mrq_hdr[i],
7569 phba->sli4_hba.nvmet_mrq_data[i],
2448e484 7570 phba->cfg_nvmet_mrq_post, i);
2d7dbc4c
JS
7571 }
7572 }
7573
895427bd
JS
7574 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
7575 /* register the allocated scsi sgl pool to the port */
7576 rc = lpfc_sli4_repost_scsi_sgl_list(phba);
7577 if (unlikely(rc)) {
7578 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7579 "0383 Error %d during scsi sgl post "
7580 "operation\n", rc);
7581 /* Some Scsi buffers were moved to abort scsi list */
7582 /* A pci function reset will repost them */
7583 rc = -ENODEV;
7584 goto out_destroy_queue;
7585 }
da0436e9
JS
7586 }
7587
01649561
JS
7588 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
7589 (phba->nvmet_support == 0)) {
7590
7591 /* register the allocated nvme sgl pool to the port */
7592 rc = lpfc_repost_nvme_sgl_list(phba);
7593 if (unlikely(rc)) {
7594 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7595 "6116 Error %d during nvme sgl post "
7596 "operation\n", rc);
7597 /* Some NVME buffers were moved to abort nvme list */
7598 /* A pci function reset will repost them */
7599 rc = -ENODEV;
7600 goto out_destroy_queue;
7601 }
da0436e9
JS
7602 }
7603
7604 /* Post the rpi header region to the device. */
7605 rc = lpfc_sli4_post_all_rpi_hdrs(phba);
7606 if (unlikely(rc)) {
7607 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7608 "0393 Error %d during rpi post operation\n",
7609 rc);
7610 rc = -ENODEV;
895427bd 7611 goto out_destroy_queue;
da0436e9 7612 }
97f2ecf1 7613 lpfc_sli4_node_prep(phba);
da0436e9 7614
895427bd 7615 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
2d7dbc4c 7616 if ((phba->nvmet_support == 0) || (phba->cfg_nvmet_mrq == 1)) {
895427bd
JS
7617 /*
7618 * The FC Port needs to register FCFI (index 0)
7619 */
7620 lpfc_reg_fcfi(phba, mboxq);
7621 mboxq->vport = phba->pport;
7622 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7623 if (rc != MBX_SUCCESS)
7624 goto out_unset_queue;
7625 rc = 0;
7626 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_fcfi,
7627 &mboxq->u.mqe.un.reg_fcfi);
2d7dbc4c
JS
7628 } else {
7629 /* We are a NVME Target mode with MRQ > 1 */
7630
7631 /* First register the FCFI */
7632 lpfc_reg_fcfi_mrq(phba, mboxq, 0);
7633 mboxq->vport = phba->pport;
7634 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7635 if (rc != MBX_SUCCESS)
7636 goto out_unset_queue;
7637 rc = 0;
7638 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_mrq_fcfi,
7639 &mboxq->u.mqe.un.reg_fcfi_mrq);
7640
7641 /* Next register the MRQs */
7642 lpfc_reg_fcfi_mrq(phba, mboxq, 1);
7643 mboxq->vport = phba->pport;
7644 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7645 if (rc != MBX_SUCCESS)
7646 goto out_unset_queue;
7647 rc = 0;
895427bd
JS
7648 }
7649 /* Check if the port is configured to be disabled */
7650 lpfc_sli_read_link_ste(phba);
da0436e9
JS
7651 }
7652
7653 /* Arm the CQs and then EQs on device */
7654 lpfc_sli4_arm_cqeq_intr(phba);
7655
7656 /* Indicate device interrupt mode */
7657 phba->sli4_hba.intr_enable = 1;
7658
7659 /* Allow asynchronous mailbox command to go through */
7660 spin_lock_irq(&phba->hbalock);
7661 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
7662 spin_unlock_irq(&phba->hbalock);
7663
7664 /* Post receive buffers to the device */
7665 lpfc_sli4_rb_setup(phba);
7666
fc2b989b
JS
7667 /* Reset HBA FCF states after HBA reset */
7668 phba->fcf.fcf_flag = 0;
7669 phba->fcf.current_rec.flag = 0;
7670
da0436e9 7671 /* Start the ELS watchdog timer */
8fa38513 7672 mod_timer(&vport->els_tmofunc,
256ec0d0 7673 jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov * 2)));
da0436e9
JS
7674
7675 /* Start heart beat timer */
7676 mod_timer(&phba->hb_tmofunc,
256ec0d0 7677 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
da0436e9
JS
7678 phba->hb_outstanding = 0;
7679 phba->last_completion_time = jiffies;
7680
7681 /* Start error attention (ERATT) polling timer */
256ec0d0 7682 mod_timer(&phba->eratt_poll,
65791f1f 7683 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
da0436e9 7684
75baf696
JS
7685 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
7686 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
7687 rc = pci_enable_pcie_error_reporting(phba->pcidev);
7688 if (!rc) {
7689 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7690 "2829 This device supports "
7691 "Advanced Error Reporting (AER)\n");
7692 spin_lock_irq(&phba->hbalock);
7693 phba->hba_flag |= HBA_AER_ENABLED;
7694 spin_unlock_irq(&phba->hbalock);
7695 } else {
7696 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7697 "2830 This device does not support "
7698 "Advanced Error Reporting (AER)\n");
7699 phba->cfg_aer_support = 0;
7700 }
0a96e975 7701 rc = 0;
75baf696
JS
7702 }
7703
da0436e9
JS
7704 /*
7705 * The port is ready, set the host's link state to LINK_DOWN
7706 * in preparation for link interrupts.
7707 */
da0436e9
JS
7708 spin_lock_irq(&phba->hbalock);
7709 phba->link_state = LPFC_LINK_DOWN;
1dc5ec24
JS
7710
7711 /* Check if physical ports are trunked */
7712 if (bf_get(lpfc_conf_trunk_port0, &phba->sli4_hba))
7713 phba->trunk_link.link0.state = LPFC_LINK_DOWN;
7714 if (bf_get(lpfc_conf_trunk_port1, &phba->sli4_hba))
7715 phba->trunk_link.link1.state = LPFC_LINK_DOWN;
7716 if (bf_get(lpfc_conf_trunk_port2, &phba->sli4_hba))
7717 phba->trunk_link.link2.state = LPFC_LINK_DOWN;
7718 if (bf_get(lpfc_conf_trunk_port3, &phba->sli4_hba))
7719 phba->trunk_link.link3.state = LPFC_LINK_DOWN;
da0436e9 7720 spin_unlock_irq(&phba->hbalock);
1dc5ec24 7721
026abb87
JS
7722 if (!(phba->hba_flag & HBA_FCOE_MODE) &&
7723 (phba->hba_flag & LINK_DISABLED)) {
7724 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7725 "3103 Adapter Link is disabled.\n");
7726 lpfc_down_link(phba, mboxq);
7727 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7728 if (rc != MBX_SUCCESS) {
7729 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7730 "3104 Adapter failed to issue "
7731 "DOWN_LINK mbox cmd, rc:x%x\n", rc);
7732 goto out_unset_queue;
7733 }
7734 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
1b51197d
JS
7735 /* don't perform init_link on SLI4 FC port loopback test */
7736 if (!(phba->link_flag & LS_LOOPBACK_MODE)) {
7737 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
7738 if (rc)
7739 goto out_unset_queue;
7740 }
5350d872
JS
7741 }
7742 mempool_free(mboxq, phba->mbox_mem_pool);
7743 return rc;
76a95d75 7744out_unset_queue:
da0436e9 7745 /* Unset all the queues set up in this routine when error out */
5350d872
JS
7746 lpfc_sli4_queue_unset(phba);
7747out_destroy_queue:
6c621a22 7748 lpfc_free_iocb_list(phba);
5350d872 7749 lpfc_sli4_queue_destroy(phba);
da0436e9 7750out_stop_timers:
5350d872 7751 lpfc_stop_hba_timers(phba);
da0436e9
JS
7752out_free_mbox:
7753 mempool_free(mboxq, phba->mbox_mem_pool);
7754 return rc;
7755}
7756
7757/**
7758 * lpfc_mbox_timeout - Timeout call back function for mbox timer
7759 * @ptr: context object - pointer to hba structure.
7760 *
7761 * This is the callback function for mailbox timer. The mailbox
7762 * timer is armed when a new mailbox command is issued and the timer
7763 * is deleted when the mailbox complete. The function is called by
7764 * the kernel timer code when a mailbox does not complete within
7765 * expected time. This function wakes up the worker thread to
7766 * process the mailbox timeout and returns. All the processing is
7767 * done by the worker thread function lpfc_mbox_timeout_handler.
7768 **/
7769void
f22eb4d3 7770lpfc_mbox_timeout(struct timer_list *t)
da0436e9 7771{
f22eb4d3 7772 struct lpfc_hba *phba = from_timer(phba, t, sli.mbox_tmo);
da0436e9
JS
7773 unsigned long iflag;
7774 uint32_t tmo_posted;
7775
7776 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
7777 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
7778 if (!tmo_posted)
7779 phba->pport->work_port_events |= WORKER_MBOX_TMO;
7780 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
7781
7782 if (!tmo_posted)
7783 lpfc_worker_wake_up(phba);
7784 return;
7785}
7786
e8d3c3b1
JS
7787/**
7788 * lpfc_sli4_mbox_completions_pending - check to see if any mailbox completions
7789 * are pending
7790 * @phba: Pointer to HBA context object.
7791 *
7792 * This function checks if any mailbox completions are present on the mailbox
7793 * completion queue.
7794 **/
3bb11fc5 7795static bool
e8d3c3b1
JS
7796lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba)
7797{
7798
7799 uint32_t idx;
7800 struct lpfc_queue *mcq;
7801 struct lpfc_mcqe *mcqe;
7802 bool pending_completions = false;
7365f6fd 7803 uint8_t qe_valid;
e8d3c3b1
JS
7804
7805 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7806 return false;
7807
7808 /* Check for completions on mailbox completion queue */
7809
7810 mcq = phba->sli4_hba.mbx_cq;
7811 idx = mcq->hba_index;
7365f6fd
JS
7812 qe_valid = mcq->qe_valid;
7813 while (bf_get_le32(lpfc_cqe_valid, mcq->qe[idx].cqe) == qe_valid) {
e8d3c3b1
JS
7814 mcqe = (struct lpfc_mcqe *)mcq->qe[idx].cqe;
7815 if (bf_get_le32(lpfc_trailer_completed, mcqe) &&
7816 (!bf_get_le32(lpfc_trailer_async, mcqe))) {
7817 pending_completions = true;
7818 break;
7819 }
7820 idx = (idx + 1) % mcq->entry_count;
7821 if (mcq->hba_index == idx)
7822 break;
7365f6fd
JS
7823
7824 /* if the index wrapped around, toggle the valid bit */
7825 if (phba->sli4_hba.pc_sli4_params.cqav && !idx)
7826 qe_valid = (qe_valid) ? 0 : 1;
e8d3c3b1
JS
7827 }
7828 return pending_completions;
7829
7830}
7831
7832/**
7833 * lpfc_sli4_process_missed_mbox_completions - process mbox completions
7834 * that were missed.
7835 * @phba: Pointer to HBA context object.
7836 *
7837 * For sli4, it is possible to miss an interrupt. As such mbox completions
7838 * maybe missed causing erroneous mailbox timeouts to occur. This function
7839 * checks to see if mbox completions are on the mailbox completion queue
7840 * and will process all the completions associated with the eq for the
7841 * mailbox completion queue.
7842 **/
7843bool
7844lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba)
7845{
b71413dd 7846 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
e8d3c3b1
JS
7847 uint32_t eqidx;
7848 struct lpfc_queue *fpeq = NULL;
7849 struct lpfc_eqe *eqe;
7850 bool mbox_pending;
7851
7852 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7853 return false;
7854
7855 /* Find the eq associated with the mcq */
7856
b71413dd 7857 if (sli4_hba->hba_eq)
895427bd 7858 for (eqidx = 0; eqidx < phba->io_channel_irqs; eqidx++)
b71413dd
JS
7859 if (sli4_hba->hba_eq[eqidx]->queue_id ==
7860 sli4_hba->mbx_cq->assoc_qid) {
7861 fpeq = sli4_hba->hba_eq[eqidx];
e8d3c3b1
JS
7862 break;
7863 }
7864 if (!fpeq)
7865 return false;
7866
7867 /* Turn off interrupts from this EQ */
7868
b71413dd 7869 sli4_hba->sli4_eq_clr_intr(fpeq);
e8d3c3b1
JS
7870
7871 /* Check to see if a mbox completion is pending */
7872
7873 mbox_pending = lpfc_sli4_mbox_completions_pending(phba);
7874
7875 /*
7876 * If a mbox completion is pending, process all the events on EQ
7877 * associated with the mbox completion queue (this could include
7878 * mailbox commands, async events, els commands, receive queue data
7879 * and fcp commands)
7880 */
7881
7882 if (mbox_pending)
7883 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
7884 lpfc_sli4_hba_handle_eqe(phba, eqe, eqidx);
7885 fpeq->EQ_processed++;
7886 }
7887
7888 /* Always clear and re-arm the EQ */
7889
b71413dd 7890 sli4_hba->sli4_eq_release(fpeq, LPFC_QUEUE_REARM);
e8d3c3b1
JS
7891
7892 return mbox_pending;
7893
7894}
da0436e9
JS
7895
7896/**
7897 * lpfc_mbox_timeout_handler - Worker thread function to handle mailbox timeout
7898 * @phba: Pointer to HBA context object.
7899 *
7900 * This function is called from worker thread when a mailbox command times out.
7901 * The caller is not required to hold any locks. This function will reset the
7902 * HBA and recover all the pending commands.
7903 **/
7904void
7905lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
7906{
7907 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
eb016566
JS
7908 MAILBOX_t *mb = NULL;
7909
da0436e9 7910 struct lpfc_sli *psli = &phba->sli;
da0436e9 7911
e8d3c3b1
JS
7912 /* If the mailbox completed, process the completion and return */
7913 if (lpfc_sli4_process_missed_mbox_completions(phba))
7914 return;
7915
eb016566
JS
7916 if (pmbox != NULL)
7917 mb = &pmbox->u.mb;
da0436e9
JS
7918 /* Check the pmbox pointer first. There is a race condition
7919 * between the mbox timeout handler getting executed in the
7920 * worklist and the mailbox actually completing. When this
7921 * race condition occurs, the mbox_active will be NULL.
7922 */
7923 spin_lock_irq(&phba->hbalock);
7924 if (pmbox == NULL) {
7925 lpfc_printf_log(phba, KERN_WARNING,
7926 LOG_MBOX | LOG_SLI,
7927 "0353 Active Mailbox cleared - mailbox timeout "
7928 "exiting\n");
7929 spin_unlock_irq(&phba->hbalock);
7930 return;
7931 }
7932
7933 /* Mbox cmd <mbxCommand> timeout */
7934 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7935 "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
7936 mb->mbxCommand,
7937 phba->pport->port_state,
7938 phba->sli.sli_flag,
7939 phba->sli.mbox_active);
7940 spin_unlock_irq(&phba->hbalock);
7941
7942 /* Setting state unknown so lpfc_sli_abort_iocb_ring
7943 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
25985edc 7944 * it to fail all outstanding SCSI IO.
da0436e9
JS
7945 */
7946 spin_lock_irq(&phba->pport->work_port_lock);
7947 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
7948 spin_unlock_irq(&phba->pport->work_port_lock);
7949 spin_lock_irq(&phba->hbalock);
7950 phba->link_state = LPFC_LINK_UNKNOWN;
f4b4c68f 7951 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
da0436e9
JS
7952 spin_unlock_irq(&phba->hbalock);
7953
db55fba8 7954 lpfc_sli_abort_fcp_rings(phba);
da0436e9
JS
7955
7956 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7957 "0345 Resetting board due to mailbox timeout\n");
7958
7959 /* Reset the HBA device */
7960 lpfc_reset_hba(phba);
7961}
7962
7963/**
7964 * lpfc_sli_issue_mbox_s3 - Issue an SLI3 mailbox command to firmware
7965 * @phba: Pointer to HBA context object.
7966 * @pmbox: Pointer to mailbox object.
7967 * @flag: Flag indicating how the mailbox need to be processed.
7968 *
7969 * This function is called by discovery code and HBA management code
7970 * to submit a mailbox command to firmware with SLI-3 interface spec. This
7971 * function gets the hbalock to protect the data structures.
7972 * The mailbox command can be submitted in polling mode, in which case
7973 * this function will wait in a polling loop for the completion of the
7974 * mailbox.
7975 * If the mailbox is submitted in no_wait mode (not polling) the
7976 * function will submit the command and returns immediately without waiting
7977 * for the mailbox completion. The no_wait is supported only when HBA
7978 * is in SLI2/SLI3 mode - interrupts are enabled.
7979 * The SLI interface allows only one mailbox pending at a time. If the
7980 * mailbox is issued in polling mode and there is already a mailbox
7981 * pending, then the function will return an error. If the mailbox is issued
7982 * in NO_WAIT mode and there is a mailbox pending already, the function
7983 * will return MBX_BUSY after queuing the mailbox into mailbox queue.
7984 * The sli layer owns the mailbox object until the completion of mailbox
7985 * command if this function return MBX_BUSY or MBX_SUCCESS. For all other
7986 * return codes the caller owns the mailbox command after the return of
7987 * the function.
e59058c4 7988 **/
3772a991
JS
7989static int
7990lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
7991 uint32_t flag)
dea3101e 7992{
bf07bdea 7993 MAILBOX_t *mbx;
2e0fef85 7994 struct lpfc_sli *psli = &phba->sli;
dea3101e 7995 uint32_t status, evtctr;
9940b97b 7996 uint32_t ha_copy, hc_copy;
dea3101e 7997 int i;
09372820 7998 unsigned long timeout;
dea3101e 7999 unsigned long drvr_flag = 0;
34b02dcd 8000 uint32_t word0, ldata;
dea3101e 8001 void __iomem *to_slim;
58da1ffb
JS
8002 int processing_queue = 0;
8003
8004 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8005 if (!pmbox) {
8568a4d2 8006 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
58da1ffb 8007 /* processing mbox queue from intr_handler */
3772a991
JS
8008 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8009 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8010 return MBX_SUCCESS;
8011 }
58da1ffb 8012 processing_queue = 1;
58da1ffb
JS
8013 pmbox = lpfc_mbox_get(phba);
8014 if (!pmbox) {
8015 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8016 return MBX_SUCCESS;
8017 }
8018 }
dea3101e 8019
ed957684 8020 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 8021 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684 8022 if(!pmbox->vport) {
58da1ffb 8023 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
ed957684 8024 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 8025 LOG_MBOX | LOG_VPORT,
e8b62011 8026 "1806 Mbox x%x failed. No vport\n",
3772a991 8027 pmbox->u.mb.mbxCommand);
ed957684 8028 dump_stack();
58da1ffb 8029 goto out_not_finished;
ed957684
JS
8030 }
8031 }
8032
8d63f375 8033 /* If the PCI channel is in offline state, do not post mbox. */
58da1ffb
JS
8034 if (unlikely(pci_channel_offline(phba->pcidev))) {
8035 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8036 goto out_not_finished;
8037 }
8d63f375 8038
a257bf90
JS
8039 /* If HBA has a deferred error attention, fail the iocb. */
8040 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
8041 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8042 goto out_not_finished;
8043 }
8044
dea3101e 8045 psli = &phba->sli;
92d7f7b0 8046
bf07bdea 8047 mbx = &pmbox->u.mb;
dea3101e
JB
8048 status = MBX_SUCCESS;
8049
2e0fef85
JS
8050 if (phba->link_state == LPFC_HBA_ERROR) {
8051 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW
8052
8053 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8054 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8055 "(%d):0311 Mailbox command x%x cannot "
8056 "issue Data: x%x x%x\n",
8057 pmbox->vport ? pmbox->vport->vpi : 0,
8058 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
58da1ffb 8059 goto out_not_finished;
41415862
JW
8060 }
8061
bf07bdea 8062 if (mbx->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT) {
9940b97b
JS
8063 if (lpfc_readl(phba->HCregaddr, &hc_copy) ||
8064 !(hc_copy & HC_MBINT_ENA)) {
8065 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8066 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
3772a991
JS
8067 "(%d):2528 Mailbox command x%x cannot "
8068 "issue Data: x%x x%x\n",
8069 pmbox->vport ? pmbox->vport->vpi : 0,
8070 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
9940b97b
JS
8071 goto out_not_finished;
8072 }
9290831f
JS
8073 }
8074
dea3101e
JB
8075 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8076 /* Polling for a mbox command when another one is already active
8077 * is not allowed in SLI. Also, the driver must have established
8078 * SLI2 mode to queue and process multiple mbox commands.
8079 */
8080
8081 if (flag & MBX_POLL) {
2e0fef85 8082 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
8083
8084 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8085 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8086 "(%d):2529 Mailbox command x%x "
8087 "cannot issue Data: x%x x%x\n",
8088 pmbox->vport ? pmbox->vport->vpi : 0,
8089 pmbox->u.mb.mbxCommand,
8090 psli->sli_flag, flag);
58da1ffb 8091 goto out_not_finished;
dea3101e
JB
8092 }
8093
3772a991 8094 if (!(psli->sli_flag & LPFC_SLI_ACTIVE)) {
2e0fef85 8095 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8096 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8097 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8098 "(%d):2530 Mailbox command x%x "
8099 "cannot issue Data: x%x x%x\n",
8100 pmbox->vport ? pmbox->vport->vpi : 0,
8101 pmbox->u.mb.mbxCommand,
8102 psli->sli_flag, flag);
58da1ffb 8103 goto out_not_finished;
dea3101e
JB
8104 }
8105
dea3101e
JB
8106 /* Another mailbox command is still being processed, queue this
8107 * command to be processed later.
8108 */
8109 lpfc_mbox_put(phba, pmbox);
8110
8111 /* Mbox cmd issue - BUSY */
ed957684 8112 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8113 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 8114 "x%x x%x x%x x%x\n",
92d7f7b0 8115 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
e92974f6
JS
8116 mbx->mbxCommand,
8117 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8118 psli->sli_flag, flag);
dea3101e
JB
8119
8120 psli->slistat.mbox_busy++;
2e0fef85 8121 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8122
858c9f6c
JS
8123 if (pmbox->vport) {
8124 lpfc_debugfs_disc_trc(pmbox->vport,
8125 LPFC_DISC_TRC_MBOX_VPORT,
8126 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8127 (uint32_t)mbx->mbxCommand,
8128 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8129 }
8130 else {
8131 lpfc_debugfs_disc_trc(phba->pport,
8132 LPFC_DISC_TRC_MBOX,
8133 "MBOX Bsy: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8134 (uint32_t)mbx->mbxCommand,
8135 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8136 }
8137
2e0fef85 8138 return MBX_BUSY;
dea3101e
JB
8139 }
8140
dea3101e
JB
8141 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8142
8143 /* If we are not polling, we MUST be in SLI2 mode */
8144 if (flag != MBX_POLL) {
3772a991 8145 if (!(psli->sli_flag & LPFC_SLI_ACTIVE) &&
bf07bdea 8146 (mbx->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 8147 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8148 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8149 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8150 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8151 "(%d):2531 Mailbox command x%x "
8152 "cannot issue Data: x%x x%x\n",
8153 pmbox->vport ? pmbox->vport->vpi : 0,
8154 pmbox->u.mb.mbxCommand,
8155 psli->sli_flag, flag);
58da1ffb 8156 goto out_not_finished;
dea3101e
JB
8157 }
8158 /* timeout active mbox command */
256ec0d0
JS
8159 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8160 1000);
8161 mod_timer(&psli->mbox_tmo, jiffies + timeout);
dea3101e
JB
8162 }
8163
8164 /* Mailbox cmd <cmd> issue */
ed957684 8165 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8166 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 8167 "x%x\n",
e8b62011 8168 pmbox->vport ? pmbox->vport->vpi : 0,
e92974f6
JS
8169 mbx->mbxCommand,
8170 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8171 psli->sli_flag, flag);
dea3101e 8172
bf07bdea 8173 if (mbx->mbxCommand != MBX_HEARTBEAT) {
858c9f6c
JS
8174 if (pmbox->vport) {
8175 lpfc_debugfs_disc_trc(pmbox->vport,
8176 LPFC_DISC_TRC_MBOX_VPORT,
8177 "MBOX Send vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8178 (uint32_t)mbx->mbxCommand,
8179 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8180 }
8181 else {
8182 lpfc_debugfs_disc_trc(phba->pport,
8183 LPFC_DISC_TRC_MBOX,
8184 "MBOX Send: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8185 (uint32_t)mbx->mbxCommand,
8186 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8187 }
8188 }
8189
dea3101e
JB
8190 psli->slistat.mbox_cmd++;
8191 evtctr = psli->slistat.mbox_event;
8192
8193 /* next set own bit for the adapter and copy over command word */
bf07bdea 8194 mbx->mbxOwner = OWN_CHIP;
dea3101e 8195
3772a991 8196 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
7a470277
JS
8197 /* Populate mbox extension offset word. */
8198 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len) {
bf07bdea 8199 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8200 = (uint8_t *)phba->mbox_ext
8201 - (uint8_t *)phba->mbox;
8202 }
8203
8204 /* Copy the mailbox extension data */
3e1f0718
JS
8205 if (pmbox->in_ext_byte_len && pmbox->ctx_buf) {
8206 lpfc_sli_pcimem_bcopy(pmbox->ctx_buf,
8207 (uint8_t *)phba->mbox_ext,
8208 pmbox->in_ext_byte_len);
7a470277
JS
8209 }
8210 /* Copy command data to host SLIM area */
bf07bdea 8211 lpfc_sli_pcimem_bcopy(mbx, phba->mbox, MAILBOX_CMD_SIZE);
dea3101e 8212 } else {
7a470277
JS
8213 /* Populate mbox extension offset word. */
8214 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len)
bf07bdea 8215 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8216 = MAILBOX_HBA_EXT_OFFSET;
8217
8218 /* Copy the mailbox extension data */
3e1f0718 8219 if (pmbox->in_ext_byte_len && pmbox->ctx_buf)
7a470277
JS
8220 lpfc_memcpy_to_slim(phba->MBslimaddr +
8221 MAILBOX_HBA_EXT_OFFSET,
3e1f0718 8222 pmbox->ctx_buf, pmbox->in_ext_byte_len);
7a470277 8223
895427bd 8224 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8225 /* copy command data into host mbox for cmpl */
895427bd
JS
8226 lpfc_sli_pcimem_bcopy(mbx, phba->mbox,
8227 MAILBOX_CMD_SIZE);
dea3101e
JB
8228
8229 /* First copy mbox command data to HBA SLIM, skip past first
8230 word */
8231 to_slim = phba->MBslimaddr + sizeof (uint32_t);
bf07bdea 8232 lpfc_memcpy_to_slim(to_slim, &mbx->un.varWords[0],
dea3101e
JB
8233 MAILBOX_CMD_SIZE - sizeof (uint32_t));
8234
8235 /* Next copy over first word, with mbxOwner set */
bf07bdea 8236 ldata = *((uint32_t *)mbx);
dea3101e
JB
8237 to_slim = phba->MBslimaddr;
8238 writel(ldata, to_slim);
8239 readl(to_slim); /* flush */
8240
895427bd 8241 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8242 /* switch over to host mailbox */
3772a991 8243 psli->sli_flag |= LPFC_SLI_ACTIVE;
dea3101e
JB
8244 }
8245
8246 wmb();
dea3101e
JB
8247
8248 switch (flag) {
8249 case MBX_NOWAIT:
09372820 8250 /* Set up reference to mailbox command */
dea3101e 8251 psli->mbox_active = pmbox;
09372820
JS
8252 /* Interrupt board to do it */
8253 writel(CA_MBATT, phba->CAregaddr);
8254 readl(phba->CAregaddr); /* flush */
8255 /* Don't wait for it to finish, just return */
dea3101e
JB
8256 break;
8257
8258 case MBX_POLL:
09372820 8259 /* Set up null reference to mailbox command */
dea3101e 8260 psli->mbox_active = NULL;
09372820
JS
8261 /* Interrupt board to do it */
8262 writel(CA_MBATT, phba->CAregaddr);
8263 readl(phba->CAregaddr); /* flush */
8264
3772a991 8265 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8266 /* First read mbox status word */
34b02dcd 8267 word0 = *((uint32_t *)phba->mbox);
dea3101e
JB
8268 word0 = le32_to_cpu(word0);
8269 } else {
8270 /* First read mbox status word */
9940b97b
JS
8271 if (lpfc_readl(phba->MBslimaddr, &word0)) {
8272 spin_unlock_irqrestore(&phba->hbalock,
8273 drvr_flag);
8274 goto out_not_finished;
8275 }
dea3101e
JB
8276 }
8277
8278 /* Read the HBA Host Attention Register */
9940b97b
JS
8279 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8280 spin_unlock_irqrestore(&phba->hbalock,
8281 drvr_flag);
8282 goto out_not_finished;
8283 }
a183a15f
JS
8284 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8285 1000) + jiffies;
09372820 8286 i = 0;
dea3101e 8287 /* Wait for command to complete */
41415862
JW
8288 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
8289 (!(ha_copy & HA_MBATT) &&
2e0fef85 8290 (phba->link_state > LPFC_WARM_START))) {
09372820 8291 if (time_after(jiffies, timeout)) {
dea3101e 8292 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8293 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 8294 drvr_flag);
58da1ffb 8295 goto out_not_finished;
dea3101e
JB
8296 }
8297
8298 /* Check if we took a mbox interrupt while we were
8299 polling */
8300 if (((word0 & OWN_CHIP) != OWN_CHIP)
8301 && (evtctr != psli->slistat.mbox_event))
8302 break;
8303
09372820
JS
8304 if (i++ > 10) {
8305 spin_unlock_irqrestore(&phba->hbalock,
8306 drvr_flag);
8307 msleep(1);
8308 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8309 }
dea3101e 8310
3772a991 8311 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8312 /* First copy command data */
34b02dcd 8313 word0 = *((uint32_t *)phba->mbox);
dea3101e 8314 word0 = le32_to_cpu(word0);
bf07bdea 8315 if (mbx->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 8316 MAILBOX_t *slimmb;
34b02dcd 8317 uint32_t slimword0;
dea3101e
JB
8318 /* Check real SLIM for any errors */
8319 slimword0 = readl(phba->MBslimaddr);
8320 slimmb = (MAILBOX_t *) & slimword0;
8321 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
8322 && slimmb->mbxStatus) {
8323 psli->sli_flag &=
3772a991 8324 ~LPFC_SLI_ACTIVE;
dea3101e
JB
8325 word0 = slimword0;
8326 }
8327 }
8328 } else {
8329 /* First copy command data */
8330 word0 = readl(phba->MBslimaddr);
8331 }
8332 /* Read the HBA Host Attention Register */
9940b97b
JS
8333 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8334 spin_unlock_irqrestore(&phba->hbalock,
8335 drvr_flag);
8336 goto out_not_finished;
8337 }
dea3101e
JB
8338 }
8339
3772a991 8340 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8341 /* copy results back to user */
2ea259ee
JS
8342 lpfc_sli_pcimem_bcopy(phba->mbox, mbx,
8343 MAILBOX_CMD_SIZE);
7a470277 8344 /* Copy the mailbox extension data */
3e1f0718 8345 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
7a470277 8346 lpfc_sli_pcimem_bcopy(phba->mbox_ext,
3e1f0718 8347 pmbox->ctx_buf,
7a470277
JS
8348 pmbox->out_ext_byte_len);
8349 }
dea3101e
JB
8350 } else {
8351 /* First copy command data */
bf07bdea 8352 lpfc_memcpy_from_slim(mbx, phba->MBslimaddr,
2ea259ee 8353 MAILBOX_CMD_SIZE);
7a470277 8354 /* Copy the mailbox extension data */
3e1f0718
JS
8355 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
8356 lpfc_memcpy_from_slim(
8357 pmbox->ctx_buf,
7a470277
JS
8358 phba->MBslimaddr +
8359 MAILBOX_HBA_EXT_OFFSET,
8360 pmbox->out_ext_byte_len);
dea3101e
JB
8361 }
8362 }
8363
8364 writel(HA_MBATT, phba->HAregaddr);
8365 readl(phba->HAregaddr); /* flush */
8366
8367 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
bf07bdea 8368 status = mbx->mbxStatus;
dea3101e
JB
8369 }
8370
2e0fef85
JS
8371 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8372 return status;
58da1ffb
JS
8373
8374out_not_finished:
8375 if (processing_queue) {
da0436e9 8376 pmbox->u.mb.mbxStatus = MBX_NOT_FINISHED;
58da1ffb
JS
8377 lpfc_mbox_cmpl_put(phba, pmbox);
8378 }
8379 return MBX_NOT_FINISHED;
dea3101e
JB
8380}
8381
f1126688
JS
8382/**
8383 * lpfc_sli4_async_mbox_block - Block posting SLI4 asynchronous mailbox command
8384 * @phba: Pointer to HBA context object.
8385 *
8386 * The function blocks the posting of SLI4 asynchronous mailbox commands from
8387 * the driver internal pending mailbox queue. It will then try to wait out the
8388 * possible outstanding mailbox command before return.
8389 *
8390 * Returns:
8391 * 0 - the outstanding mailbox command completed; otherwise, the wait for
8392 * the outstanding mailbox command timed out.
8393 **/
8394static int
8395lpfc_sli4_async_mbox_block(struct lpfc_hba *phba)
8396{
8397 struct lpfc_sli *psli = &phba->sli;
f1126688 8398 int rc = 0;
a183a15f 8399 unsigned long timeout = 0;
f1126688
JS
8400
8401 /* Mark the asynchronous mailbox command posting as blocked */
8402 spin_lock_irq(&phba->hbalock);
8403 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
f1126688
JS
8404 /* Determine how long we might wait for the active mailbox
8405 * command to be gracefully completed by firmware.
8406 */
a183a15f
JS
8407 if (phba->sli.mbox_active)
8408 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
8409 phba->sli.mbox_active) *
8410 1000) + jiffies;
8411 spin_unlock_irq(&phba->hbalock);
8412
e8d3c3b1
JS
8413 /* Make sure the mailbox is really active */
8414 if (timeout)
8415 lpfc_sli4_process_missed_mbox_completions(phba);
8416
f1126688
JS
8417 /* Wait for the outstnading mailbox command to complete */
8418 while (phba->sli.mbox_active) {
8419 /* Check active mailbox complete status every 2ms */
8420 msleep(2);
8421 if (time_after(jiffies, timeout)) {
8422 /* Timeout, marked the outstanding cmd not complete */
8423 rc = 1;
8424 break;
8425 }
8426 }
8427
8428 /* Can not cleanly block async mailbox command, fails it */
8429 if (rc) {
8430 spin_lock_irq(&phba->hbalock);
8431 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8432 spin_unlock_irq(&phba->hbalock);
8433 }
8434 return rc;
8435}
8436
8437/**
8438 * lpfc_sli4_async_mbox_unblock - Block posting SLI4 async mailbox command
8439 * @phba: Pointer to HBA context object.
8440 *
8441 * The function unblocks and resume posting of SLI4 asynchronous mailbox
8442 * commands from the driver internal pending mailbox queue. It makes sure
8443 * that there is no outstanding mailbox command before resuming posting
8444 * asynchronous mailbox commands. If, for any reason, there is outstanding
8445 * mailbox command, it will try to wait it out before resuming asynchronous
8446 * mailbox command posting.
8447 **/
8448static void
8449lpfc_sli4_async_mbox_unblock(struct lpfc_hba *phba)
8450{
8451 struct lpfc_sli *psli = &phba->sli;
8452
8453 spin_lock_irq(&phba->hbalock);
8454 if (!(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8455 /* Asynchronous mailbox posting is not blocked, do nothing */
8456 spin_unlock_irq(&phba->hbalock);
8457 return;
8458 }
8459
8460 /* Outstanding synchronous mailbox command is guaranteed to be done,
8461 * successful or timeout, after timing-out the outstanding mailbox
8462 * command shall always be removed, so just unblock posting async
8463 * mailbox command and resume
8464 */
8465 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8466 spin_unlock_irq(&phba->hbalock);
8467
8468 /* wake up worker thread to post asynchronlous mailbox command */
8469 lpfc_worker_wake_up(phba);
8470}
8471
2d843edc
JS
8472/**
8473 * lpfc_sli4_wait_bmbx_ready - Wait for bootstrap mailbox register ready
8474 * @phba: Pointer to HBA context object.
8475 * @mboxq: Pointer to mailbox object.
8476 *
8477 * The function waits for the bootstrap mailbox register ready bit from
8478 * port for twice the regular mailbox command timeout value.
8479 *
8480 * 0 - no timeout on waiting for bootstrap mailbox register ready.
8481 * MBXERR_ERROR - wait for bootstrap mailbox register timed out.
8482 **/
8483static int
8484lpfc_sli4_wait_bmbx_ready(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8485{
8486 uint32_t db_ready;
8487 unsigned long timeout;
8488 struct lpfc_register bmbx_reg;
8489
8490 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, mboxq)
8491 * 1000) + jiffies;
8492
8493 do {
8494 bmbx_reg.word0 = readl(phba->sli4_hba.BMBXregaddr);
8495 db_ready = bf_get(lpfc_bmbx_rdy, &bmbx_reg);
8496 if (!db_ready)
8497 msleep(2);
8498
8499 if (time_after(jiffies, timeout))
8500 return MBXERR_ERROR;
8501 } while (!db_ready);
8502
8503 return 0;
8504}
8505
da0436e9
JS
8506/**
8507 * lpfc_sli4_post_sync_mbox - Post an SLI4 mailbox to the bootstrap mailbox
8508 * @phba: Pointer to HBA context object.
8509 * @mboxq: Pointer to mailbox object.
8510 *
8511 * The function posts a mailbox to the port. The mailbox is expected
8512 * to be comletely filled in and ready for the port to operate on it.
8513 * This routine executes a synchronous completion operation on the
8514 * mailbox by polling for its completion.
8515 *
8516 * The caller must not be holding any locks when calling this routine.
8517 *
8518 * Returns:
8519 * MBX_SUCCESS - mailbox posted successfully
8520 * Any of the MBX error values.
8521 **/
8522static int
8523lpfc_sli4_post_sync_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8524{
8525 int rc = MBX_SUCCESS;
8526 unsigned long iflag;
da0436e9
JS
8527 uint32_t mcqe_status;
8528 uint32_t mbx_cmnd;
da0436e9
JS
8529 struct lpfc_sli *psli = &phba->sli;
8530 struct lpfc_mqe *mb = &mboxq->u.mqe;
8531 struct lpfc_bmbx_create *mbox_rgn;
8532 struct dma_address *dma_address;
da0436e9
JS
8533
8534 /*
8535 * Only one mailbox can be active to the bootstrap mailbox region
8536 * at a time and there is no queueing provided.
8537 */
8538 spin_lock_irqsave(&phba->hbalock, iflag);
8539 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8540 spin_unlock_irqrestore(&phba->hbalock, iflag);
8541 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8542 "(%d):2532 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8543 "cannot issue Data: x%x x%x\n",
8544 mboxq->vport ? mboxq->vport->vpi : 0,
8545 mboxq->u.mb.mbxCommand,
a183a15f
JS
8546 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8547 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8548 psli->sli_flag, MBX_POLL);
8549 return MBXERR_ERROR;
8550 }
8551 /* The server grabs the token and owns it until release */
8552 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8553 phba->sli.mbox_active = mboxq;
8554 spin_unlock_irqrestore(&phba->hbalock, iflag);
8555
2d843edc
JS
8556 /* wait for bootstrap mbox register for readyness */
8557 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8558 if (rc)
8559 goto exit;
8560
da0436e9
JS
8561 /*
8562 * Initialize the bootstrap memory region to avoid stale data areas
8563 * in the mailbox post. Then copy the caller's mailbox contents to
8564 * the bmbx mailbox region.
8565 */
8566 mbx_cmnd = bf_get(lpfc_mqe_command, mb);
8567 memset(phba->sli4_hba.bmbx.avirt, 0, sizeof(struct lpfc_bmbx_create));
48f8fdb4
JS
8568 lpfc_sli4_pcimem_bcopy(mb, phba->sli4_hba.bmbx.avirt,
8569 sizeof(struct lpfc_mqe));
da0436e9
JS
8570
8571 /* Post the high mailbox dma address to the port and wait for ready. */
8572 dma_address = &phba->sli4_hba.bmbx.dma_address;
8573 writel(dma_address->addr_hi, phba->sli4_hba.BMBXregaddr);
8574
2d843edc
JS
8575 /* wait for bootstrap mbox register for hi-address write done */
8576 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8577 if (rc)
8578 goto exit;
da0436e9
JS
8579
8580 /* Post the low mailbox dma address to the port. */
8581 writel(dma_address->addr_lo, phba->sli4_hba.BMBXregaddr);
da0436e9 8582
2d843edc
JS
8583 /* wait for bootstrap mbox register for low address write done */
8584 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8585 if (rc)
8586 goto exit;
da0436e9
JS
8587
8588 /*
8589 * Read the CQ to ensure the mailbox has completed.
8590 * If so, update the mailbox status so that the upper layers
8591 * can complete the request normally.
8592 */
48f8fdb4
JS
8593 lpfc_sli4_pcimem_bcopy(phba->sli4_hba.bmbx.avirt, mb,
8594 sizeof(struct lpfc_mqe));
da0436e9 8595 mbox_rgn = (struct lpfc_bmbx_create *) phba->sli4_hba.bmbx.avirt;
48f8fdb4
JS
8596 lpfc_sli4_pcimem_bcopy(&mbox_rgn->mcqe, &mboxq->mcqe,
8597 sizeof(struct lpfc_mcqe));
da0436e9 8598 mcqe_status = bf_get(lpfc_mcqe_status, &mbox_rgn->mcqe);
0558056c
JS
8599 /*
8600 * When the CQE status indicates a failure and the mailbox status
8601 * indicates success then copy the CQE status into the mailbox status
8602 * (and prefix it with x4000).
8603 */
da0436e9 8604 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
0558056c
JS
8605 if (bf_get(lpfc_mqe_status, mb) == MBX_SUCCESS)
8606 bf_set(lpfc_mqe_status, mb,
8607 (LPFC_MBX_ERROR_RANGE | mcqe_status));
da0436e9 8608 rc = MBXERR_ERROR;
d7c47992
JS
8609 } else
8610 lpfc_sli4_swap_str(phba, mboxq);
da0436e9
JS
8611
8612 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8613 "(%d):0356 Mailbox cmd x%x (x%x/x%x) Status x%x "
da0436e9
JS
8614 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x"
8615 " x%x x%x CQ: x%x x%x x%x x%x\n",
a183a15f
JS
8616 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
8617 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8618 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8619 bf_get(lpfc_mqe_status, mb),
8620 mb->un.mb_words[0], mb->un.mb_words[1],
8621 mb->un.mb_words[2], mb->un.mb_words[3],
8622 mb->un.mb_words[4], mb->un.mb_words[5],
8623 mb->un.mb_words[6], mb->un.mb_words[7],
8624 mb->un.mb_words[8], mb->un.mb_words[9],
8625 mb->un.mb_words[10], mb->un.mb_words[11],
8626 mb->un.mb_words[12], mboxq->mcqe.word0,
8627 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
8628 mboxq->mcqe.trailer);
8629exit:
8630 /* We are holding the token, no needed for lock when release */
8631 spin_lock_irqsave(&phba->hbalock, iflag);
8632 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8633 phba->sli.mbox_active = NULL;
8634 spin_unlock_irqrestore(&phba->hbalock, iflag);
8635 return rc;
8636}
8637
8638/**
8639 * lpfc_sli_issue_mbox_s4 - Issue an SLI4 mailbox command to firmware
8640 * @phba: Pointer to HBA context object.
8641 * @pmbox: Pointer to mailbox object.
8642 * @flag: Flag indicating how the mailbox need to be processed.
8643 *
8644 * This function is called by discovery code and HBA management code to submit
8645 * a mailbox command to firmware with SLI-4 interface spec.
8646 *
8647 * Return codes the caller owns the mailbox command after the return of the
8648 * function.
8649 **/
8650static int
8651lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
8652 uint32_t flag)
8653{
8654 struct lpfc_sli *psli = &phba->sli;
8655 unsigned long iflags;
8656 int rc;
8657
b76f2dc9
JS
8658 /* dump from issue mailbox command if setup */
8659 lpfc_idiag_mbxacc_dump_issue_mbox(phba, &mboxq->u.mb);
8660
8fa38513
JS
8661 rc = lpfc_mbox_dev_check(phba);
8662 if (unlikely(rc)) {
8663 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8664 "(%d):2544 Mailbox command x%x (x%x/x%x) "
8fa38513
JS
8665 "cannot issue Data: x%x x%x\n",
8666 mboxq->vport ? mboxq->vport->vpi : 0,
8667 mboxq->u.mb.mbxCommand,
a183a15f
JS
8668 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8669 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
8fa38513
JS
8670 psli->sli_flag, flag);
8671 goto out_not_finished;
8672 }
8673
da0436e9
JS
8674 /* Detect polling mode and jump to a handler */
8675 if (!phba->sli4_hba.intr_enable) {
8676 if (flag == MBX_POLL)
8677 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8678 else
8679 rc = -EIO;
8680 if (rc != MBX_SUCCESS)
0558056c 8681 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
da0436e9 8682 "(%d):2541 Mailbox command x%x "
cc459f19
JS
8683 "(x%x/x%x) failure: "
8684 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8685 "Data: x%x x%x\n,",
da0436e9
JS
8686 mboxq->vport ? mboxq->vport->vpi : 0,
8687 mboxq->u.mb.mbxCommand,
a183a15f
JS
8688 lpfc_sli_config_mbox_subsys_get(phba,
8689 mboxq),
8690 lpfc_sli_config_mbox_opcode_get(phba,
8691 mboxq),
cc459f19
JS
8692 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8693 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8694 bf_get(lpfc_mcqe_ext_status,
8695 &mboxq->mcqe),
da0436e9
JS
8696 psli->sli_flag, flag);
8697 return rc;
8698 } else if (flag == MBX_POLL) {
f1126688
JS
8699 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
8700 "(%d):2542 Try to issue mailbox command "
7365f6fd 8701 "x%x (x%x/x%x) synchronously ahead of async "
f1126688 8702 "mailbox command queue: x%x x%x\n",
da0436e9
JS
8703 mboxq->vport ? mboxq->vport->vpi : 0,
8704 mboxq->u.mb.mbxCommand,
a183a15f
JS
8705 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8706 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9 8707 psli->sli_flag, flag);
f1126688
JS
8708 /* Try to block the asynchronous mailbox posting */
8709 rc = lpfc_sli4_async_mbox_block(phba);
8710 if (!rc) {
8711 /* Successfully blocked, now issue sync mbox cmd */
8712 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8713 if (rc != MBX_SUCCESS)
cc459f19 8714 lpfc_printf_log(phba, KERN_WARNING,
a183a15f 8715 LOG_MBOX | LOG_SLI,
cc459f19
JS
8716 "(%d):2597 Sync Mailbox command "
8717 "x%x (x%x/x%x) failure: "
8718 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8719 "Data: x%x x%x\n,",
8720 mboxq->vport ? mboxq->vport->vpi : 0,
a183a15f
JS
8721 mboxq->u.mb.mbxCommand,
8722 lpfc_sli_config_mbox_subsys_get(phba,
8723 mboxq),
8724 lpfc_sli_config_mbox_opcode_get(phba,
8725 mboxq),
cc459f19
JS
8726 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8727 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8728 bf_get(lpfc_mcqe_ext_status,
8729 &mboxq->mcqe),
a183a15f 8730 psli->sli_flag, flag);
f1126688
JS
8731 /* Unblock the async mailbox posting afterward */
8732 lpfc_sli4_async_mbox_unblock(phba);
8733 }
8734 return rc;
da0436e9
JS
8735 }
8736
8737 /* Now, interrupt mode asynchrous mailbox command */
8738 rc = lpfc_mbox_cmd_check(phba, mboxq);
8739 if (rc) {
8740 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8741 "(%d):2543 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8742 "cannot issue Data: x%x x%x\n",
8743 mboxq->vport ? mboxq->vport->vpi : 0,
8744 mboxq->u.mb.mbxCommand,
a183a15f
JS
8745 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8746 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8747 psli->sli_flag, flag);
8748 goto out_not_finished;
8749 }
da0436e9
JS
8750
8751 /* Put the mailbox command to the driver internal FIFO */
8752 psli->slistat.mbox_busy++;
8753 spin_lock_irqsave(&phba->hbalock, iflags);
8754 lpfc_mbox_put(phba, mboxq);
8755 spin_unlock_irqrestore(&phba->hbalock, iflags);
8756 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
8757 "(%d):0354 Mbox cmd issue - Enqueue Data: "
a183a15f 8758 "x%x (x%x/x%x) x%x x%x x%x\n",
da0436e9
JS
8759 mboxq->vport ? mboxq->vport->vpi : 0xffffff,
8760 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
a183a15f
JS
8761 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8762 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8763 phba->pport->port_state,
8764 psli->sli_flag, MBX_NOWAIT);
8765 /* Wake up worker thread to transport mailbox command from head */
8766 lpfc_worker_wake_up(phba);
8767
8768 return MBX_BUSY;
8769
8770out_not_finished:
8771 return MBX_NOT_FINISHED;
8772}
8773
8774/**
8775 * lpfc_sli4_post_async_mbox - Post an SLI4 mailbox command to device
8776 * @phba: Pointer to HBA context object.
8777 *
8778 * This function is called by worker thread to send a mailbox command to
8779 * SLI4 HBA firmware.
8780 *
8781 **/
8782int
8783lpfc_sli4_post_async_mbox(struct lpfc_hba *phba)
8784{
8785 struct lpfc_sli *psli = &phba->sli;
8786 LPFC_MBOXQ_t *mboxq;
8787 int rc = MBX_SUCCESS;
8788 unsigned long iflags;
8789 struct lpfc_mqe *mqe;
8790 uint32_t mbx_cmnd;
8791
8792 /* Check interrupt mode before post async mailbox command */
8793 if (unlikely(!phba->sli4_hba.intr_enable))
8794 return MBX_NOT_FINISHED;
8795
8796 /* Check for mailbox command service token */
8797 spin_lock_irqsave(&phba->hbalock, iflags);
8798 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8799 spin_unlock_irqrestore(&phba->hbalock, iflags);
8800 return MBX_NOT_FINISHED;
8801 }
8802 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8803 spin_unlock_irqrestore(&phba->hbalock, iflags);
8804 return MBX_NOT_FINISHED;
8805 }
8806 if (unlikely(phba->sli.mbox_active)) {
8807 spin_unlock_irqrestore(&phba->hbalock, iflags);
8808 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8809 "0384 There is pending active mailbox cmd\n");
8810 return MBX_NOT_FINISHED;
8811 }
8812 /* Take the mailbox command service token */
8813 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8814
8815 /* Get the next mailbox command from head of queue */
8816 mboxq = lpfc_mbox_get(phba);
8817
8818 /* If no more mailbox command waiting for post, we're done */
8819 if (!mboxq) {
8820 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8821 spin_unlock_irqrestore(&phba->hbalock, iflags);
8822 return MBX_SUCCESS;
8823 }
8824 phba->sli.mbox_active = mboxq;
8825 spin_unlock_irqrestore(&phba->hbalock, iflags);
8826
8827 /* Check device readiness for posting mailbox command */
8828 rc = lpfc_mbox_dev_check(phba);
8829 if (unlikely(rc))
8830 /* Driver clean routine will clean up pending mailbox */
8831 goto out_not_finished;
8832
8833 /* Prepare the mbox command to be posted */
8834 mqe = &mboxq->u.mqe;
8835 mbx_cmnd = bf_get(lpfc_mqe_command, mqe);
8836
8837 /* Start timer for the mbox_tmo and log some mailbox post messages */
8838 mod_timer(&psli->mbox_tmo, (jiffies +
256ec0d0 8839 msecs_to_jiffies(1000 * lpfc_mbox_tmo_val(phba, mboxq))));
da0436e9
JS
8840
8841 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8842 "(%d):0355 Mailbox cmd x%x (x%x/x%x) issue Data: "
da0436e9
JS
8843 "x%x x%x\n",
8844 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
a183a15f
JS
8845 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8846 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8847 phba->pport->port_state, psli->sli_flag);
8848
8849 if (mbx_cmnd != MBX_HEARTBEAT) {
8850 if (mboxq->vport) {
8851 lpfc_debugfs_disc_trc(mboxq->vport,
8852 LPFC_DISC_TRC_MBOX_VPORT,
8853 "MBOX Send vport: cmd:x%x mb:x%x x%x",
8854 mbx_cmnd, mqe->un.mb_words[0],
8855 mqe->un.mb_words[1]);
8856 } else {
8857 lpfc_debugfs_disc_trc(phba->pport,
8858 LPFC_DISC_TRC_MBOX,
8859 "MBOX Send: cmd:x%x mb:x%x x%x",
8860 mbx_cmnd, mqe->un.mb_words[0],
8861 mqe->un.mb_words[1]);
8862 }
8863 }
8864 psli->slistat.mbox_cmd++;
8865
8866 /* Post the mailbox command to the port */
8867 rc = lpfc_sli4_mq_put(phba->sli4_hba.mbx_wq, mqe);
8868 if (rc != MBX_SUCCESS) {
8869 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8870 "(%d):2533 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8871 "cannot issue Data: x%x x%x\n",
8872 mboxq->vport ? mboxq->vport->vpi : 0,
8873 mboxq->u.mb.mbxCommand,
a183a15f
JS
8874 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8875 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8876 psli->sli_flag, MBX_NOWAIT);
8877 goto out_not_finished;
8878 }
8879
8880 return rc;
8881
8882out_not_finished:
8883 spin_lock_irqsave(&phba->hbalock, iflags);
d7069f09
JS
8884 if (phba->sli.mbox_active) {
8885 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
8886 __lpfc_mbox_cmpl_put(phba, mboxq);
8887 /* Release the token */
8888 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8889 phba->sli.mbox_active = NULL;
8890 }
da0436e9
JS
8891 spin_unlock_irqrestore(&phba->hbalock, iflags);
8892
8893 return MBX_NOT_FINISHED;
8894}
8895
8896/**
8897 * lpfc_sli_issue_mbox - Wrapper func for issuing mailbox command
8898 * @phba: Pointer to HBA context object.
8899 * @pmbox: Pointer to mailbox object.
8900 * @flag: Flag indicating how the mailbox need to be processed.
8901 *
8902 * This routine wraps the actual SLI3 or SLI4 mailbox issuing routine from
8903 * the API jump table function pointer from the lpfc_hba struct.
8904 *
8905 * Return codes the caller owns the mailbox command after the return of the
8906 * function.
8907 **/
8908int
8909lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
8910{
8911 return phba->lpfc_sli_issue_mbox(phba, pmbox, flag);
8912}
8913
8914/**
25985edc 8915 * lpfc_mbox_api_table_setup - Set up mbox api function jump table
da0436e9
JS
8916 * @phba: The hba struct for which this call is being executed.
8917 * @dev_grp: The HBA PCI-Device group number.
8918 *
8919 * This routine sets up the mbox interface API function jump table in @phba
8920 * struct.
8921 * Returns: 0 - success, -ENODEV - failure.
8922 **/
8923int
8924lpfc_mbox_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
8925{
8926
8927 switch (dev_grp) {
8928 case LPFC_PCI_DEV_LP:
8929 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s3;
8930 phba->lpfc_sli_handle_slow_ring_event =
8931 lpfc_sli_handle_slow_ring_event_s3;
8932 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s3;
8933 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s3;
8934 phba->lpfc_sli_brdready = lpfc_sli_brdready_s3;
8935 break;
8936 case LPFC_PCI_DEV_OC:
8937 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s4;
8938 phba->lpfc_sli_handle_slow_ring_event =
8939 lpfc_sli_handle_slow_ring_event_s4;
8940 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s4;
8941 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s4;
8942 phba->lpfc_sli_brdready = lpfc_sli_brdready_s4;
8943 break;
8944 default:
8945 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8946 "1420 Invalid HBA PCI-device group: 0x%x\n",
8947 dev_grp);
8948 return -ENODEV;
8949 break;
8950 }
8951 return 0;
8952}
8953
e59058c4 8954/**
3621a710 8955 * __lpfc_sli_ringtx_put - Add an iocb to the txq
e59058c4
JS
8956 * @phba: Pointer to HBA context object.
8957 * @pring: Pointer to driver SLI ring object.
8958 * @piocb: Pointer to address of newly added command iocb.
8959 *
8960 * This function is called with hbalock held to add a command
8961 * iocb to the txq when SLI layer cannot submit the command iocb
8962 * to the ring.
8963 **/
2a9bf3d0 8964void
92d7f7b0 8965__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 8966 struct lpfc_iocbq *piocb)
dea3101e 8967{
1c2ba475 8968 lockdep_assert_held(&phba->hbalock);
dea3101e
JB
8969 /* Insert the caller's iocb in the txq tail for later processing. */
8970 list_add_tail(&piocb->list, &pring->txq);
dea3101e
JB
8971}
8972
e59058c4 8973/**
3621a710 8974 * lpfc_sli_next_iocb - Get the next iocb in the txq
e59058c4
JS
8975 * @phba: Pointer to HBA context object.
8976 * @pring: Pointer to driver SLI ring object.
8977 * @piocb: Pointer to address of newly added command iocb.
8978 *
8979 * This function is called with hbalock held before a new
8980 * iocb is submitted to the firmware. This function checks
8981 * txq to flush the iocbs in txq to Firmware before
8982 * submitting new iocbs to the Firmware.
8983 * If there are iocbs in the txq which need to be submitted
8984 * to firmware, lpfc_sli_next_iocb returns the first element
8985 * of the txq after dequeuing it from txq.
8986 * If there is no iocb in the txq then the function will return
8987 * *piocb and *piocb is set to NULL. Caller needs to check
8988 * *piocb to find if there are more commands in the txq.
8989 **/
dea3101e
JB
8990static struct lpfc_iocbq *
8991lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 8992 struct lpfc_iocbq **piocb)
dea3101e
JB
8993{
8994 struct lpfc_iocbq * nextiocb;
8995
1c2ba475
JT
8996 lockdep_assert_held(&phba->hbalock);
8997
dea3101e
JB
8998 nextiocb = lpfc_sli_ringtx_get(phba, pring);
8999 if (!nextiocb) {
9000 nextiocb = *piocb;
9001 *piocb = NULL;
9002 }
9003
9004 return nextiocb;
9005}
9006
e59058c4 9007/**
3772a991 9008 * __lpfc_sli_issue_iocb_s3 - SLI3 device lockless ver of lpfc_sli_issue_iocb
e59058c4 9009 * @phba: Pointer to HBA context object.
3772a991 9010 * @ring_number: SLI ring number to issue iocb on.
e59058c4
JS
9011 * @piocb: Pointer to command iocb.
9012 * @flag: Flag indicating if this command can be put into txq.
9013 *
3772a991
JS
9014 * __lpfc_sli_issue_iocb_s3 is used by other functions in the driver to issue
9015 * an iocb command to an HBA with SLI-3 interface spec. If the PCI slot is
9016 * recovering from error state, if HBA is resetting or if LPFC_STOP_IOCB_EVENT
9017 * flag is turned on, the function returns IOCB_ERROR. When the link is down,
9018 * this function allows only iocbs for posting buffers. This function finds
9019 * next available slot in the command ring and posts the command to the
9020 * available slot and writes the port attention register to request HBA start
9021 * processing new iocb. If there is no slot available in the ring and
9022 * flag & SLI_IOCB_RET_IOCB is set, the new iocb is added to the txq, otherwise
9023 * the function returns IOCB_BUSY.
e59058c4 9024 *
3772a991
JS
9025 * This function is called with hbalock held. The function will return success
9026 * after it successfully submit the iocb to firmware or after adding to the
9027 * txq.
e59058c4 9028 **/
98c9ea5c 9029static int
3772a991 9030__lpfc_sli_issue_iocb_s3(struct lpfc_hba *phba, uint32_t ring_number,
dea3101e
JB
9031 struct lpfc_iocbq *piocb, uint32_t flag)
9032{
9033 struct lpfc_iocbq *nextiocb;
9034 IOCB_t *iocb;
895427bd 9035 struct lpfc_sli_ring *pring = &phba->sli.sli3_ring[ring_number];
dea3101e 9036
1c2ba475
JT
9037 lockdep_assert_held(&phba->hbalock);
9038
92d7f7b0
JS
9039 if (piocb->iocb_cmpl && (!piocb->vport) &&
9040 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
9041 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
9042 lpfc_printf_log(phba, KERN_ERR,
9043 LOG_SLI | LOG_VPORT,
e8b62011 9044 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS
9045 piocb->iocb.ulpCommand);
9046 dump_stack();
9047 return IOCB_ERROR;
9048 }
9049
9050
8d63f375
LV
9051 /* If the PCI channel is in offline state, do not post iocbs. */
9052 if (unlikely(pci_channel_offline(phba->pcidev)))
9053 return IOCB_ERROR;
9054
a257bf90
JS
9055 /* If HBA has a deferred error attention, fail the iocb. */
9056 if (unlikely(phba->hba_flag & DEFER_ERATT))
9057 return IOCB_ERROR;
9058
dea3101e
JB
9059 /*
9060 * We should never get an IOCB if we are in a < LINK_DOWN state
9061 */
2e0fef85 9062 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB
9063 return IOCB_ERROR;
9064
9065 /*
9066 * Check to see if we are blocking IOCB processing because of a
0b727fea 9067 * outstanding event.
dea3101e 9068 */
0b727fea 9069 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e
JB
9070 goto iocb_busy;
9071
2e0fef85 9072 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 9073 /*
2680eeaa 9074 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB
9075 * can be issued if the link is not up.
9076 */
9077 switch (piocb->iocb.ulpCommand) {
84774a4d
JS
9078 case CMD_GEN_REQUEST64_CR:
9079 case CMD_GEN_REQUEST64_CX:
9080 if (!(phba->sli.sli_flag & LPFC_MENLO_MAINT) ||
9081 (piocb->iocb.un.genreq64.w5.hcsw.Rctl !=
6a9c52cf 9082 FC_RCTL_DD_UNSOL_CMD) ||
84774a4d
JS
9083 (piocb->iocb.un.genreq64.w5.hcsw.Type !=
9084 MENLO_TRANSPORT_TYPE))
9085
9086 goto iocb_busy;
9087 break;
dea3101e
JB
9088 case CMD_QUE_RING_BUF_CN:
9089 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB
9090 /*
9091 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
9092 * completion, iocb_cmpl MUST be 0.
9093 */
9094 if (piocb->iocb_cmpl)
9095 piocb->iocb_cmpl = NULL;
9096 /*FALLTHROUGH*/
9097 case CMD_CREATE_XRI_CR:
2680eeaa
JS
9098 case CMD_CLOSE_XRI_CN:
9099 case CMD_CLOSE_XRI_CX:
dea3101e
JB
9100 break;
9101 default:
9102 goto iocb_busy;
9103 }
9104
9105 /*
9106 * For FCP commands, we must be in a state where we can process link
9107 * attention events.
9108 */
895427bd 9109 } else if (unlikely(pring->ringno == LPFC_FCP_RING &&
92d7f7b0 9110 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 9111 goto iocb_busy;
92d7f7b0 9112 }
dea3101e 9113
dea3101e
JB
9114 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
9115 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
9116 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
9117
9118 if (iocb)
9119 lpfc_sli_update_ring(phba, pring);
9120 else
9121 lpfc_sli_update_full_ring(phba, pring);
9122
9123 if (!piocb)
9124 return IOCB_SUCCESS;
9125
9126 goto out_busy;
9127
9128 iocb_busy:
9129 pring->stats.iocb_cmd_delay++;
9130
9131 out_busy:
9132
9133 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 9134 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB
9135 return IOCB_SUCCESS;
9136 }
9137
9138 return IOCB_BUSY;
9139}
9140
3772a991 9141/**
4f774513
JS
9142 * lpfc_sli4_bpl2sgl - Convert the bpl/bde to a sgl.
9143 * @phba: Pointer to HBA context object.
9144 * @piocb: Pointer to command iocb.
9145 * @sglq: Pointer to the scatter gather queue object.
9146 *
9147 * This routine converts the bpl or bde that is in the IOCB
9148 * to a sgl list for the sli4 hardware. The physical address
9149 * of the bpl/bde is converted back to a virtual address.
9150 * If the IOCB contains a BPL then the list of BDE's is
9151 * converted to sli4_sge's. If the IOCB contains a single
9152 * BDE then it is converted to a single sli_sge.
9153 * The IOCB is still in cpu endianess so the contents of
9154 * the bpl can be used without byte swapping.
9155 *
9156 * Returns valid XRI = Success, NO_XRI = Failure.
9157**/
9158static uint16_t
9159lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
9160 struct lpfc_sglq *sglq)
3772a991 9161{
4f774513
JS
9162 uint16_t xritag = NO_XRI;
9163 struct ulp_bde64 *bpl = NULL;
9164 struct ulp_bde64 bde;
9165 struct sli4_sge *sgl = NULL;
1b51197d 9166 struct lpfc_dmabuf *dmabuf;
4f774513
JS
9167 IOCB_t *icmd;
9168 int numBdes = 0;
9169 int i = 0;
63e801ce
JS
9170 uint32_t offset = 0; /* accumulated offset in the sg request list */
9171 int inbound = 0; /* number of sg reply entries inbound from firmware */
3772a991 9172
4f774513
JS
9173 if (!piocbq || !sglq)
9174 return xritag;
9175
9176 sgl = (struct sli4_sge *)sglq->sgl;
9177 icmd = &piocbq->iocb;
6b5151fd
JS
9178 if (icmd->ulpCommand == CMD_XMIT_BLS_RSP64_CX)
9179 return sglq->sli4_xritag;
4f774513
JS
9180 if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
9181 numBdes = icmd->un.genreq64.bdl.bdeSize /
9182 sizeof(struct ulp_bde64);
9183 /* The addrHigh and addrLow fields within the IOCB
9184 * have not been byteswapped yet so there is no
9185 * need to swap them back.
9186 */
1b51197d
JS
9187 if (piocbq->context3)
9188 dmabuf = (struct lpfc_dmabuf *)piocbq->context3;
9189 else
9190 return xritag;
4f774513 9191
1b51197d 9192 bpl = (struct ulp_bde64 *)dmabuf->virt;
4f774513
JS
9193 if (!bpl)
9194 return xritag;
9195
9196 for (i = 0; i < numBdes; i++) {
9197 /* Should already be byte swapped. */
28baac74
JS
9198 sgl->addr_hi = bpl->addrHigh;
9199 sgl->addr_lo = bpl->addrLow;
9200
0558056c 9201 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9202 if ((i+1) == numBdes)
9203 bf_set(lpfc_sli4_sge_last, sgl, 1);
9204 else
9205 bf_set(lpfc_sli4_sge_last, sgl, 0);
28baac74
JS
9206 /* swap the size field back to the cpu so we
9207 * can assign it to the sgl.
9208 */
9209 bde.tus.w = le32_to_cpu(bpl->tus.w);
9210 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
63e801ce
JS
9211 /* The offsets in the sgl need to be accumulated
9212 * separately for the request and reply lists.
9213 * The request is always first, the reply follows.
9214 */
9215 if (piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) {
9216 /* add up the reply sg entries */
9217 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
9218 inbound++;
9219 /* first inbound? reset the offset */
9220 if (inbound == 1)
9221 offset = 0;
9222 bf_set(lpfc_sli4_sge_offset, sgl, offset);
f9bb2da1
JS
9223 bf_set(lpfc_sli4_sge_type, sgl,
9224 LPFC_SGE_TYPE_DATA);
63e801ce
JS
9225 offset += bde.tus.f.bdeSize;
9226 }
546fc854 9227 sgl->word2 = cpu_to_le32(sgl->word2);
4f774513
JS
9228 bpl++;
9229 sgl++;
9230 }
9231 } else if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BDE_64) {
9232 /* The addrHigh and addrLow fields of the BDE have not
9233 * been byteswapped yet so they need to be swapped
9234 * before putting them in the sgl.
9235 */
9236 sgl->addr_hi =
9237 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh);
9238 sgl->addr_lo =
9239 cpu_to_le32(icmd->un.genreq64.bdl.addrLow);
0558056c 9240 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9241 bf_set(lpfc_sli4_sge_last, sgl, 1);
9242 sgl->word2 = cpu_to_le32(sgl->word2);
28baac74
JS
9243 sgl->sge_len =
9244 cpu_to_le32(icmd->un.genreq64.bdl.bdeSize);
4f774513
JS
9245 }
9246 return sglq->sli4_xritag;
3772a991 9247}
92d7f7b0 9248
e59058c4 9249/**
4f774513 9250 * lpfc_sli_iocb2wqe - Convert the IOCB to a work queue entry.
e59058c4 9251 * @phba: Pointer to HBA context object.
4f774513
JS
9252 * @piocb: Pointer to command iocb.
9253 * @wqe: Pointer to the work queue entry.
e59058c4 9254 *
4f774513
JS
9255 * This routine converts the iocb command to its Work Queue Entry
9256 * equivalent. The wqe pointer should not have any fields set when
9257 * this routine is called because it will memcpy over them.
9258 * This routine does not set the CQ_ID or the WQEC bits in the
9259 * wqe.
e59058c4 9260 *
4f774513 9261 * Returns: 0 = Success, IOCB_ERROR = Failure.
e59058c4 9262 **/
cf5bf97e 9263static int
4f774513 9264lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
205e8240 9265 union lpfc_wqe128 *wqe)
cf5bf97e 9266{
5ffc266e 9267 uint32_t xmit_len = 0, total_len = 0;
4f774513
JS
9268 uint8_t ct = 0;
9269 uint32_t fip;
9270 uint32_t abort_tag;
9271 uint8_t command_type = ELS_COMMAND_NON_FIP;
9272 uint8_t cmnd;
9273 uint16_t xritag;
dcf2a4e0
JS
9274 uint16_t abrt_iotag;
9275 struct lpfc_iocbq *abrtiocbq;
4f774513 9276 struct ulp_bde64 *bpl = NULL;
f0d9bccc 9277 uint32_t els_id = LPFC_ELS_ID_DEFAULT;
5ffc266e
JS
9278 int numBdes, i;
9279 struct ulp_bde64 bde;
c31098ce 9280 struct lpfc_nodelist *ndlp;
ff78d8f9 9281 uint32_t *pcmd;
1b51197d 9282 uint32_t if_type;
4f774513 9283
45ed1190 9284 fip = phba->hba_flag & HBA_FIP_SUPPORT;
4f774513 9285 /* The fcp commands will set command type */
0c287589 9286 if (iocbq->iocb_flag & LPFC_IO_FCP)
4f774513 9287 command_type = FCP_COMMAND;
c868595d 9288 else if (fip && (iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK))
0c287589
JS
9289 command_type = ELS_COMMAND_FIP;
9290 else
9291 command_type = ELS_COMMAND_NON_FIP;
9292
b5c53958
JS
9293 if (phba->fcp_embed_io)
9294 memset(wqe, 0, sizeof(union lpfc_wqe128));
4f774513
JS
9295 /* Some of the fields are in the right position already */
9296 memcpy(wqe, &iocbq->iocb, sizeof(union lpfc_wqe));
ae9e28f3
JS
9297 if (iocbq->iocb.ulpCommand != CMD_SEND_FRAME) {
9298 /* The ct field has moved so reset */
9299 wqe->generic.wqe_com.word7 = 0;
9300 wqe->generic.wqe_com.word10 = 0;
9301 }
b5c53958
JS
9302
9303 abort_tag = (uint32_t) iocbq->iotag;
9304 xritag = iocbq->sli4_xritag;
4f774513
JS
9305 /* words0-2 bpl convert bde */
9306 if (iocbq->iocb.un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
5ffc266e
JS
9307 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9308 sizeof(struct ulp_bde64);
4f774513
JS
9309 bpl = (struct ulp_bde64 *)
9310 ((struct lpfc_dmabuf *)iocbq->context3)->virt;
9311 if (!bpl)
9312 return IOCB_ERROR;
cf5bf97e 9313
4f774513
JS
9314 /* Should already be byte swapped. */
9315 wqe->generic.bde.addrHigh = le32_to_cpu(bpl->addrHigh);
9316 wqe->generic.bde.addrLow = le32_to_cpu(bpl->addrLow);
9317 /* swap the size field back to the cpu so we
9318 * can assign it to the sgl.
9319 */
9320 wqe->generic.bde.tus.w = le32_to_cpu(bpl->tus.w);
5ffc266e
JS
9321 xmit_len = wqe->generic.bde.tus.f.bdeSize;
9322 total_len = 0;
9323 for (i = 0; i < numBdes; i++) {
9324 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
9325 total_len += bde.tus.f.bdeSize;
9326 }
4f774513 9327 } else
5ffc266e 9328 xmit_len = iocbq->iocb.un.fcpi64.bdl.bdeSize;
cf5bf97e 9329
4f774513
JS
9330 iocbq->iocb.ulpIoTag = iocbq->iotag;
9331 cmnd = iocbq->iocb.ulpCommand;
a4bc3379 9332
4f774513
JS
9333 switch (iocbq->iocb.ulpCommand) {
9334 case CMD_ELS_REQUEST64_CR:
93d1379e
JS
9335 if (iocbq->iocb_flag & LPFC_IO_LIBDFC)
9336 ndlp = iocbq->context_un.ndlp;
9337 else
9338 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513
JS
9339 if (!iocbq->iocb.ulpLe) {
9340 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9341 "2007 Only Limited Edition cmd Format"
9342 " supported 0x%x\n",
9343 iocbq->iocb.ulpCommand);
9344 return IOCB_ERROR;
9345 }
ff78d8f9 9346
5ffc266e 9347 wqe->els_req.payload_len = xmit_len;
4f774513
JS
9348 /* Els_reguest64 has a TMO */
9349 bf_set(wqe_tmo, &wqe->els_req.wqe_com,
9350 iocbq->iocb.ulpTimeout);
9351 /* Need a VF for word 4 set the vf bit*/
9352 bf_set(els_req64_vf, &wqe->els_req, 0);
9353 /* And a VFID for word 12 */
9354 bf_set(els_req64_vfid, &wqe->els_req, 0);
4f774513 9355 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
f0d9bccc
JS
9356 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9357 iocbq->iocb.ulpContext);
9358 bf_set(wqe_ct, &wqe->els_req.wqe_com, ct);
9359 bf_set(wqe_pu, &wqe->els_req.wqe_com, 0);
4f774513 9360 /* CCP CCPE PV PRI in word10 were set in the memcpy */
ff78d8f9 9361 if (command_type == ELS_COMMAND_FIP)
c868595d
JS
9362 els_id = ((iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK)
9363 >> LPFC_FIP_ELS_ID_SHIFT);
ff78d8f9
JS
9364 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9365 iocbq->context2)->virt);
1b51197d
JS
9366 if_type = bf_get(lpfc_sli_intf_if_type,
9367 &phba->sli4_hba.sli_intf);
27d6ac0a 9368 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
ff78d8f9 9369 if (pcmd && (*pcmd == ELS_CMD_FLOGI ||
cb69f7de 9370 *pcmd == ELS_CMD_SCR ||
6b5151fd 9371 *pcmd == ELS_CMD_FDISC ||
bdcd2b92 9372 *pcmd == ELS_CMD_LOGO ||
ff78d8f9
JS
9373 *pcmd == ELS_CMD_PLOGI)) {
9374 bf_set(els_req64_sp, &wqe->els_req, 1);
9375 bf_set(els_req64_sid, &wqe->els_req,
9376 iocbq->vport->fc_myDID);
939723a4
JS
9377 if ((*pcmd == ELS_CMD_FLOGI) &&
9378 !(phba->fc_topology ==
9379 LPFC_TOPOLOGY_LOOP))
9380 bf_set(els_req64_sid, &wqe->els_req, 0);
ff78d8f9
JS
9381 bf_set(wqe_ct, &wqe->els_req.wqe_com, 1);
9382 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
a7dd9c0f 9383 phba->vpi_ids[iocbq->vport->vpi]);
3ef6d24c 9384 } else if (pcmd && iocbq->context1) {
ff78d8f9
JS
9385 bf_set(wqe_ct, &wqe->els_req.wqe_com, 0);
9386 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9387 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
9388 }
c868595d 9389 }
6d368e53
JS
9390 bf_set(wqe_temp_rpi, &wqe->els_req.wqe_com,
9391 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
f0d9bccc
JS
9392 bf_set(wqe_els_id, &wqe->els_req.wqe_com, els_id);
9393 bf_set(wqe_dbde, &wqe->els_req.wqe_com, 1);
9394 bf_set(wqe_iod, &wqe->els_req.wqe_com, LPFC_WQE_IOD_READ);
9395 bf_set(wqe_qosd, &wqe->els_req.wqe_com, 1);
9396 bf_set(wqe_lenloc, &wqe->els_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9397 bf_set(wqe_ebde_cnt, &wqe->els_req.wqe_com, 0);
af22741c 9398 wqe->els_req.max_response_payload_len = total_len - xmit_len;
7851fe2c 9399 break;
5ffc266e 9400 case CMD_XMIT_SEQUENCE64_CX:
f0d9bccc
JS
9401 bf_set(wqe_ctxt_tag, &wqe->xmit_sequence.wqe_com,
9402 iocbq->iocb.un.ulpWord[3]);
9403 bf_set(wqe_rcvoxid, &wqe->xmit_sequence.wqe_com,
7851fe2c 9404 iocbq->iocb.unsli3.rcvsli3.ox_id);
5ffc266e
JS
9405 /* The entire sequence is transmitted for this IOCB */
9406 xmit_len = total_len;
9407 cmnd = CMD_XMIT_SEQUENCE64_CR;
1b51197d
JS
9408 if (phba->link_flag & LS_LOOPBACK_MODE)
9409 bf_set(wqe_xo, &wqe->xmit_sequence.wge_ctl, 1);
5bd5f66c 9410 /* fall through */
4f774513 9411 case CMD_XMIT_SEQUENCE64_CR:
f0d9bccc
JS
9412 /* word3 iocb=io_tag32 wqe=reserved */
9413 wqe->xmit_sequence.rsvd3 = 0;
4f774513
JS
9414 /* word4 relative_offset memcpy */
9415 /* word5 r_ctl/df_ctl memcpy */
f0d9bccc
JS
9416 bf_set(wqe_pu, &wqe->xmit_sequence.wqe_com, 0);
9417 bf_set(wqe_dbde, &wqe->xmit_sequence.wqe_com, 1);
9418 bf_set(wqe_iod, &wqe->xmit_sequence.wqe_com,
9419 LPFC_WQE_IOD_WRITE);
9420 bf_set(wqe_lenloc, &wqe->xmit_sequence.wqe_com,
9421 LPFC_WQE_LENLOC_WORD12);
9422 bf_set(wqe_ebde_cnt, &wqe->xmit_sequence.wqe_com, 0);
5ffc266e
JS
9423 wqe->xmit_sequence.xmit_len = xmit_len;
9424 command_type = OTHER_COMMAND;
7851fe2c 9425 break;
4f774513 9426 case CMD_XMIT_BCAST64_CN:
f0d9bccc
JS
9427 /* word3 iocb=iotag32 wqe=seq_payload_len */
9428 wqe->xmit_bcast64.seq_payload_len = xmit_len;
4f774513
JS
9429 /* word4 iocb=rsvd wqe=rsvd */
9430 /* word5 iocb=rctl/type/df_ctl wqe=rctl/type/df_ctl memcpy */
9431 /* word6 iocb=ctxt_tag/io_tag wqe=ctxt_tag/xri */
f0d9bccc 9432 bf_set(wqe_ct, &wqe->xmit_bcast64.wqe_com,
4f774513 9433 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
f0d9bccc
JS
9434 bf_set(wqe_dbde, &wqe->xmit_bcast64.wqe_com, 1);
9435 bf_set(wqe_iod, &wqe->xmit_bcast64.wqe_com, LPFC_WQE_IOD_WRITE);
9436 bf_set(wqe_lenloc, &wqe->xmit_bcast64.wqe_com,
9437 LPFC_WQE_LENLOC_WORD3);
9438 bf_set(wqe_ebde_cnt, &wqe->xmit_bcast64.wqe_com, 0);
7851fe2c 9439 break;
4f774513
JS
9440 case CMD_FCP_IWRITE64_CR:
9441 command_type = FCP_COMMAND_DATA_OUT;
f0d9bccc
JS
9442 /* word3 iocb=iotag wqe=payload_offset_len */
9443 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9444 bf_set(payload_offset_len, &wqe->fcp_iwrite,
9445 xmit_len + sizeof(struct fcp_rsp));
9446 bf_set(cmd_buff_len, &wqe->fcp_iwrite,
9447 0);
f0d9bccc
JS
9448 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9449 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9450 bf_set(wqe_erp, &wqe->fcp_iwrite.wqe_com,
9451 iocbq->iocb.ulpFCP2Rcvy);
9452 bf_set(wqe_lnk, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpXS);
9453 /* Always open the exchange */
f0d9bccc
JS
9454 bf_set(wqe_iod, &wqe->fcp_iwrite.wqe_com, LPFC_WQE_IOD_WRITE);
9455 bf_set(wqe_lenloc, &wqe->fcp_iwrite.wqe_com,
9456 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9457 bf_set(wqe_pu, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9458 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 1);
1ba981fd
JS
9459 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9460 bf_set(wqe_oas, &wqe->fcp_iwrite.wqe_com, 1);
c92c841c
JS
9461 bf_set(wqe_ccpe, &wqe->fcp_iwrite.wqe_com, 1);
9462 if (iocbq->priority) {
9463 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9464 (iocbq->priority << 1));
9465 } else {
1ba981fd
JS
9466 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9467 (phba->cfg_XLanePriority << 1));
9468 }
9469 }
b5c53958
JS
9470 /* Note, word 10 is already initialized to 0 */
9471
414abe0a
JS
9472 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9473 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9474 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 1);
9475 else
9476 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 0);
9477
b5c53958
JS
9478 if (phba->fcp_embed_io) {
9479 struct lpfc_scsi_buf *lpfc_cmd;
9480 struct sli4_sge *sgl;
b5c53958
JS
9481 struct fcp_cmnd *fcp_cmnd;
9482 uint32_t *ptr;
9483
9484 /* 128 byte wqe support here */
b5c53958
JS
9485
9486 lpfc_cmd = iocbq->context1;
9487 sgl = (struct sli4_sge *)lpfc_cmd->fcp_bpl;
9488 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9489
9490 /* Word 0-2 - FCP_CMND */
205e8240 9491 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9492 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9493 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9494 wqe->generic.bde.addrHigh = 0;
9495 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9496
205e8240
JS
9497 bf_set(wqe_wqes, &wqe->fcp_iwrite.wqe_com, 1);
9498 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 0);
b5c53958
JS
9499
9500 /* Word 22-29 FCP CMND Payload */
205e8240 9501 ptr = &wqe->words[22];
b5c53958
JS
9502 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9503 }
7851fe2c 9504 break;
4f774513 9505 case CMD_FCP_IREAD64_CR:
f0d9bccc
JS
9506 /* word3 iocb=iotag wqe=payload_offset_len */
9507 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9508 bf_set(payload_offset_len, &wqe->fcp_iread,
9509 xmit_len + sizeof(struct fcp_rsp));
9510 bf_set(cmd_buff_len, &wqe->fcp_iread,
9511 0);
f0d9bccc
JS
9512 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9513 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9514 bf_set(wqe_erp, &wqe->fcp_iread.wqe_com,
9515 iocbq->iocb.ulpFCP2Rcvy);
9516 bf_set(wqe_lnk, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpXS);
f1126688 9517 /* Always open the exchange */
f0d9bccc
JS
9518 bf_set(wqe_iod, &wqe->fcp_iread.wqe_com, LPFC_WQE_IOD_READ);
9519 bf_set(wqe_lenloc, &wqe->fcp_iread.wqe_com,
9520 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9521 bf_set(wqe_pu, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9522 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 1);
1ba981fd
JS
9523 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9524 bf_set(wqe_oas, &wqe->fcp_iread.wqe_com, 1);
c92c841c
JS
9525 bf_set(wqe_ccpe, &wqe->fcp_iread.wqe_com, 1);
9526 if (iocbq->priority) {
9527 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9528 (iocbq->priority << 1));
9529 } else {
1ba981fd
JS
9530 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9531 (phba->cfg_XLanePriority << 1));
9532 }
9533 }
b5c53958
JS
9534 /* Note, word 10 is already initialized to 0 */
9535
414abe0a
JS
9536 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9537 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9538 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 1);
9539 else
9540 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 0);
9541
b5c53958
JS
9542 if (phba->fcp_embed_io) {
9543 struct lpfc_scsi_buf *lpfc_cmd;
9544 struct sli4_sge *sgl;
b5c53958
JS
9545 struct fcp_cmnd *fcp_cmnd;
9546 uint32_t *ptr;
9547
9548 /* 128 byte wqe support here */
b5c53958
JS
9549
9550 lpfc_cmd = iocbq->context1;
9551 sgl = (struct sli4_sge *)lpfc_cmd->fcp_bpl;
9552 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9553
9554 /* Word 0-2 - FCP_CMND */
205e8240 9555 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9556 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9557 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9558 wqe->generic.bde.addrHigh = 0;
9559 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9560
205e8240
JS
9561 bf_set(wqe_wqes, &wqe->fcp_iread.wqe_com, 1);
9562 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 0);
b5c53958
JS
9563
9564 /* Word 22-29 FCP CMND Payload */
205e8240 9565 ptr = &wqe->words[22];
b5c53958
JS
9566 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9567 }
7851fe2c 9568 break;
4f774513 9569 case CMD_FCP_ICMND64_CR:
0ba4b219
JS
9570 /* word3 iocb=iotag wqe=payload_offset_len */
9571 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
9572 bf_set(payload_offset_len, &wqe->fcp_icmd,
9573 xmit_len + sizeof(struct fcp_rsp));
9574 bf_set(cmd_buff_len, &wqe->fcp_icmd,
9575 0);
f0d9bccc 9576 /* word3 iocb=IO_TAG wqe=reserved */
f0d9bccc 9577 bf_set(wqe_pu, &wqe->fcp_icmd.wqe_com, 0);
4f774513 9578 /* Always open the exchange */
f0d9bccc
JS
9579 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 1);
9580 bf_set(wqe_iod, &wqe->fcp_icmd.wqe_com, LPFC_WQE_IOD_WRITE);
9581 bf_set(wqe_qosd, &wqe->fcp_icmd.wqe_com, 1);
9582 bf_set(wqe_lenloc, &wqe->fcp_icmd.wqe_com,
9583 LPFC_WQE_LENLOC_NONE);
2a94aea4
JS
9584 bf_set(wqe_erp, &wqe->fcp_icmd.wqe_com,
9585 iocbq->iocb.ulpFCP2Rcvy);
1ba981fd
JS
9586 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9587 bf_set(wqe_oas, &wqe->fcp_icmd.wqe_com, 1);
c92c841c
JS
9588 bf_set(wqe_ccpe, &wqe->fcp_icmd.wqe_com, 1);
9589 if (iocbq->priority) {
9590 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9591 (iocbq->priority << 1));
9592 } else {
1ba981fd
JS
9593 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9594 (phba->cfg_XLanePriority << 1));
9595 }
9596 }
b5c53958
JS
9597 /* Note, word 10 is already initialized to 0 */
9598
9599 if (phba->fcp_embed_io) {
9600 struct lpfc_scsi_buf *lpfc_cmd;
9601 struct sli4_sge *sgl;
b5c53958
JS
9602 struct fcp_cmnd *fcp_cmnd;
9603 uint32_t *ptr;
9604
9605 /* 128 byte wqe support here */
b5c53958
JS
9606
9607 lpfc_cmd = iocbq->context1;
9608 sgl = (struct sli4_sge *)lpfc_cmd->fcp_bpl;
9609 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9610
9611 /* Word 0-2 - FCP_CMND */
205e8240 9612 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9613 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9614 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9615 wqe->generic.bde.addrHigh = 0;
9616 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9617
205e8240
JS
9618 bf_set(wqe_wqes, &wqe->fcp_icmd.wqe_com, 1);
9619 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 0);
b5c53958
JS
9620
9621 /* Word 22-29 FCP CMND Payload */
205e8240 9622 ptr = &wqe->words[22];
b5c53958
JS
9623 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9624 }
7851fe2c 9625 break;
4f774513 9626 case CMD_GEN_REQUEST64_CR:
63e801ce
JS
9627 /* For this command calculate the xmit length of the
9628 * request bde.
9629 */
9630 xmit_len = 0;
9631 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9632 sizeof(struct ulp_bde64);
9633 for (i = 0; i < numBdes; i++) {
63e801ce 9634 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
546fc854
JS
9635 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
9636 break;
63e801ce
JS
9637 xmit_len += bde.tus.f.bdeSize;
9638 }
f0d9bccc
JS
9639 /* word3 iocb=IO_TAG wqe=request_payload_len */
9640 wqe->gen_req.request_payload_len = xmit_len;
9641 /* word4 iocb=parameter wqe=relative_offset memcpy */
9642 /* word5 [rctl, type, df_ctl, la] copied in memcpy */
4f774513
JS
9643 /* word6 context tag copied in memcpy */
9644 if (iocbq->iocb.ulpCt_h || iocbq->iocb.ulpCt_l) {
9645 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
9646 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9647 "2015 Invalid CT %x command 0x%x\n",
9648 ct, iocbq->iocb.ulpCommand);
9649 return IOCB_ERROR;
9650 }
f0d9bccc
JS
9651 bf_set(wqe_ct, &wqe->gen_req.wqe_com, 0);
9652 bf_set(wqe_tmo, &wqe->gen_req.wqe_com, iocbq->iocb.ulpTimeout);
9653 bf_set(wqe_pu, &wqe->gen_req.wqe_com, iocbq->iocb.ulpPU);
9654 bf_set(wqe_dbde, &wqe->gen_req.wqe_com, 1);
9655 bf_set(wqe_iod, &wqe->gen_req.wqe_com, LPFC_WQE_IOD_READ);
9656 bf_set(wqe_qosd, &wqe->gen_req.wqe_com, 1);
9657 bf_set(wqe_lenloc, &wqe->gen_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9658 bf_set(wqe_ebde_cnt, &wqe->gen_req.wqe_com, 0);
af22741c 9659 wqe->gen_req.max_response_payload_len = total_len - xmit_len;
4f774513 9660 command_type = OTHER_COMMAND;
7851fe2c 9661 break;
4f774513 9662 case CMD_XMIT_ELS_RSP64_CX:
c31098ce 9663 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513 9664 /* words0-2 BDE memcpy */
f0d9bccc
JS
9665 /* word3 iocb=iotag32 wqe=response_payload_len */
9666 wqe->xmit_els_rsp.response_payload_len = xmit_len;
939723a4
JS
9667 /* word4 */
9668 wqe->xmit_els_rsp.word4 = 0;
4f774513
JS
9669 /* word5 iocb=rsvd wge=did */
9670 bf_set(wqe_els_did, &wqe->xmit_els_rsp.wqe_dest,
939723a4
JS
9671 iocbq->iocb.un.xseq64.xmit_els_remoteID);
9672
9673 if_type = bf_get(lpfc_sli_intf_if_type,
9674 &phba->sli4_hba.sli_intf);
27d6ac0a 9675 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
939723a4
JS
9676 if (iocbq->vport->fc_flag & FC_PT2PT) {
9677 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9678 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
9679 iocbq->vport->fc_myDID);
9680 if (iocbq->vport->fc_myDID == Fabric_DID) {
9681 bf_set(wqe_els_did,
9682 &wqe->xmit_els_rsp.wqe_dest, 0);
9683 }
9684 }
9685 }
f0d9bccc
JS
9686 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com,
9687 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9688 bf_set(wqe_pu, &wqe->xmit_els_rsp.wqe_com, iocbq->iocb.ulpPU);
9689 bf_set(wqe_rcvoxid, &wqe->xmit_els_rsp.wqe_com,
7851fe2c 9690 iocbq->iocb.unsli3.rcvsli3.ox_id);
4f774513 9691 if (!iocbq->iocb.ulpCt_h && iocbq->iocb.ulpCt_l)
f0d9bccc 9692 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
6d368e53 9693 phba->vpi_ids[iocbq->vport->vpi]);
f0d9bccc
JS
9694 bf_set(wqe_dbde, &wqe->xmit_els_rsp.wqe_com, 1);
9695 bf_set(wqe_iod, &wqe->xmit_els_rsp.wqe_com, LPFC_WQE_IOD_WRITE);
9696 bf_set(wqe_qosd, &wqe->xmit_els_rsp.wqe_com, 1);
9697 bf_set(wqe_lenloc, &wqe->xmit_els_rsp.wqe_com,
9698 LPFC_WQE_LENLOC_WORD3);
9699 bf_set(wqe_ebde_cnt, &wqe->xmit_els_rsp.wqe_com, 0);
6d368e53
JS
9700 bf_set(wqe_rsp_temp_rpi, &wqe->xmit_els_rsp,
9701 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
ff78d8f9
JS
9702 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9703 iocbq->context2)->virt);
9704 if (phba->fc_topology == LPFC_TOPOLOGY_LOOP) {
939723a4
JS
9705 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9706 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
ff78d8f9 9707 iocbq->vport->fc_myDID);
939723a4
JS
9708 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com, 1);
9709 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
ff78d8f9
JS
9710 phba->vpi_ids[phba->pport->vpi]);
9711 }
4f774513 9712 command_type = OTHER_COMMAND;
7851fe2c 9713 break;
4f774513
JS
9714 case CMD_CLOSE_XRI_CN:
9715 case CMD_ABORT_XRI_CN:
9716 case CMD_ABORT_XRI_CX:
9717 /* words 0-2 memcpy should be 0 rserved */
9718 /* port will send abts */
dcf2a4e0
JS
9719 abrt_iotag = iocbq->iocb.un.acxri.abortContextTag;
9720 if (abrt_iotag != 0 && abrt_iotag <= phba->sli.last_iotag) {
9721 abrtiocbq = phba->sli.iocbq_lookup[abrt_iotag];
9722 fip = abrtiocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK;
9723 } else
9724 fip = 0;
9725
9726 if ((iocbq->iocb.ulpCommand == CMD_CLOSE_XRI_CN) || fip)
4f774513 9727 /*
dcf2a4e0
JS
9728 * The link is down, or the command was ELS_FIP
9729 * so the fw does not need to send abts
4f774513
JS
9730 * on the wire.
9731 */
9732 bf_set(abort_cmd_ia, &wqe->abort_cmd, 1);
9733 else
9734 bf_set(abort_cmd_ia, &wqe->abort_cmd, 0);
9735 bf_set(abort_cmd_criteria, &wqe->abort_cmd, T_XRI_TAG);
f0d9bccc
JS
9736 /* word5 iocb=CONTEXT_TAG|IO_TAG wqe=reserved */
9737 wqe->abort_cmd.rsrvd5 = 0;
9738 bf_set(wqe_ct, &wqe->abort_cmd.wqe_com,
4f774513
JS
9739 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9740 abort_tag = iocbq->iocb.un.acxri.abortIoTag;
4f774513
JS
9741 /*
9742 * The abort handler will send us CMD_ABORT_XRI_CN or
9743 * CMD_CLOSE_XRI_CN and the fw only accepts CMD_ABORT_XRI_CX
9744 */
f0d9bccc
JS
9745 bf_set(wqe_cmnd, &wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
9746 bf_set(wqe_qosd, &wqe->abort_cmd.wqe_com, 1);
9747 bf_set(wqe_lenloc, &wqe->abort_cmd.wqe_com,
9748 LPFC_WQE_LENLOC_NONE);
4f774513
JS
9749 cmnd = CMD_ABORT_XRI_CX;
9750 command_type = OTHER_COMMAND;
9751 xritag = 0;
7851fe2c 9752 break;
6669f9bb 9753 case CMD_XMIT_BLS_RSP64_CX:
6b5151fd 9754 ndlp = (struct lpfc_nodelist *)iocbq->context1;
546fc854 9755 /* As BLS ABTS RSP WQE is very different from other WQEs,
6669f9bb
JS
9756 * we re-construct this WQE here based on information in
9757 * iocbq from scratch.
9758 */
9759 memset(wqe, 0, sizeof(union lpfc_wqe));
5ffc266e 9760 /* OX_ID is invariable to who sent ABTS to CT exchange */
6669f9bb 9761 bf_set(xmit_bls_rsp64_oxid, &wqe->xmit_bls_rsp,
546fc854
JS
9762 bf_get(lpfc_abts_oxid, &iocbq->iocb.un.bls_rsp));
9763 if (bf_get(lpfc_abts_orig, &iocbq->iocb.un.bls_rsp) ==
5ffc266e
JS
9764 LPFC_ABTS_UNSOL_INT) {
9765 /* ABTS sent by initiator to CT exchange, the
9766 * RX_ID field will be filled with the newly
9767 * allocated responder XRI.
9768 */
9769 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
9770 iocbq->sli4_xritag);
9771 } else {
9772 /* ABTS sent by responder to CT exchange, the
9773 * RX_ID field will be filled with the responder
9774 * RX_ID from ABTS.
9775 */
9776 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
546fc854 9777 bf_get(lpfc_abts_rxid, &iocbq->iocb.un.bls_rsp));
5ffc266e 9778 }
6669f9bb
JS
9779 bf_set(xmit_bls_rsp64_seqcnthi, &wqe->xmit_bls_rsp, 0xffff);
9780 bf_set(wqe_xmit_bls_pt, &wqe->xmit_bls_rsp.wqe_dest, 0x1);
6b5151fd
JS
9781
9782 /* Use CT=VPI */
9783 bf_set(wqe_els_did, &wqe->xmit_bls_rsp.wqe_dest,
9784 ndlp->nlp_DID);
9785 bf_set(xmit_bls_rsp64_temprpi, &wqe->xmit_bls_rsp,
9786 iocbq->iocb.ulpContext);
9787 bf_set(wqe_ct, &wqe->xmit_bls_rsp.wqe_com, 1);
6669f9bb 9788 bf_set(wqe_ctxt_tag, &wqe->xmit_bls_rsp.wqe_com,
6b5151fd 9789 phba->vpi_ids[phba->pport->vpi]);
f0d9bccc
JS
9790 bf_set(wqe_qosd, &wqe->xmit_bls_rsp.wqe_com, 1);
9791 bf_set(wqe_lenloc, &wqe->xmit_bls_rsp.wqe_com,
9792 LPFC_WQE_LENLOC_NONE);
6669f9bb
JS
9793 /* Overwrite the pre-set comnd type with OTHER_COMMAND */
9794 command_type = OTHER_COMMAND;
546fc854
JS
9795 if (iocbq->iocb.un.xseq64.w5.hcsw.Rctl == FC_RCTL_BA_RJT) {
9796 bf_set(xmit_bls_rsp64_rjt_vspec, &wqe->xmit_bls_rsp,
9797 bf_get(lpfc_vndr_code, &iocbq->iocb.un.bls_rsp));
9798 bf_set(xmit_bls_rsp64_rjt_expc, &wqe->xmit_bls_rsp,
9799 bf_get(lpfc_rsn_expln, &iocbq->iocb.un.bls_rsp));
9800 bf_set(xmit_bls_rsp64_rjt_rsnc, &wqe->xmit_bls_rsp,
9801 bf_get(lpfc_rsn_code, &iocbq->iocb.un.bls_rsp));
9802 }
9803
7851fe2c 9804 break;
ae9e28f3
JS
9805 case CMD_SEND_FRAME:
9806 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9807 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9808 return 0;
4f774513
JS
9809 case CMD_XRI_ABORTED_CX:
9810 case CMD_CREATE_XRI_CR: /* Do we expect to use this? */
4f774513
JS
9811 case CMD_IOCB_FCP_IBIDIR64_CR: /* bidirectional xfer */
9812 case CMD_FCP_TSEND64_CX: /* Target mode send xfer-ready */
9813 case CMD_FCP_TRSP64_CX: /* Target mode rcv */
9814 case CMD_FCP_AUTO_TRSP_CX: /* Auto target rsp */
9815 default:
9816 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9817 "2014 Invalid command 0x%x\n",
9818 iocbq->iocb.ulpCommand);
9819 return IOCB_ERROR;
7851fe2c 9820 break;
4f774513 9821 }
6d368e53 9822
8012cc38
JS
9823 if (iocbq->iocb_flag & LPFC_IO_DIF_PASS)
9824 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_PASSTHRU);
9825 else if (iocbq->iocb_flag & LPFC_IO_DIF_STRIP)
9826 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_STRIP);
9827 else if (iocbq->iocb_flag & LPFC_IO_DIF_INSERT)
9828 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_INSERT);
9829 iocbq->iocb_flag &= ~(LPFC_IO_DIF_PASS | LPFC_IO_DIF_STRIP |
9830 LPFC_IO_DIF_INSERT);
f0d9bccc
JS
9831 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9832 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9833 wqe->generic.wqe_com.abort_tag = abort_tag;
9834 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, command_type);
9835 bf_set(wqe_cmnd, &wqe->generic.wqe_com, cmnd);
9836 bf_set(wqe_class, &wqe->generic.wqe_com, iocbq->iocb.ulpClass);
9837 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
4f774513
JS
9838 return 0;
9839}
9840
9841/**
9842 * __lpfc_sli_issue_iocb_s4 - SLI4 device lockless ver of lpfc_sli_issue_iocb
9843 * @phba: Pointer to HBA context object.
9844 * @ring_number: SLI ring number to issue iocb on.
9845 * @piocb: Pointer to command iocb.
9846 * @flag: Flag indicating if this command can be put into txq.
9847 *
9848 * __lpfc_sli_issue_iocb_s4 is used by other functions in the driver to issue
9849 * an iocb command to an HBA with SLI-4 interface spec.
9850 *
9851 * This function is called with hbalock held. The function will return success
9852 * after it successfully submit the iocb to firmware or after adding to the
9853 * txq.
9854 **/
9855static int
9856__lpfc_sli_issue_iocb_s4(struct lpfc_hba *phba, uint32_t ring_number,
9857 struct lpfc_iocbq *piocb, uint32_t flag)
9858{
9859 struct lpfc_sglq *sglq;
205e8240 9860 union lpfc_wqe128 wqe;
1ba981fd 9861 struct lpfc_queue *wq;
895427bd 9862 struct lpfc_sli_ring *pring;
4f774513 9863
895427bd
JS
9864 /* Get the WQ */
9865 if ((piocb->iocb_flag & LPFC_IO_FCP) ||
9866 (piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
9867 if (!phba->cfg_fof || (!(piocb->iocb_flag & LPFC_IO_OAS)))
9868 wq = phba->sli4_hba.fcp_wq[piocb->hba_wqidx];
9869 else
9870 wq = phba->sli4_hba.oas_wq;
9871 } else {
9872 wq = phba->sli4_hba.els_wq;
9873 }
9874
9875 /* Get corresponding ring */
9876 pring = wq->pring;
1c2ba475 9877
b5c53958
JS
9878 /*
9879 * The WQE can be either 64 or 128 bytes,
b5c53958 9880 */
b5c53958 9881
895427bd
JS
9882 lockdep_assert_held(&phba->hbalock);
9883
4f774513
JS
9884 if (piocb->sli4_xritag == NO_XRI) {
9885 if (piocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
6b5151fd 9886 piocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN)
4f774513
JS
9887 sglq = NULL;
9888 else {
0e9bb8d7 9889 if (!list_empty(&pring->txq)) {
2a9bf3d0
JS
9890 if (!(flag & SLI_IOCB_RET_IOCB)) {
9891 __lpfc_sli_ringtx_put(phba,
9892 pring, piocb);
9893 return IOCB_SUCCESS;
9894 } else {
9895 return IOCB_BUSY;
9896 }
9897 } else {
895427bd 9898 sglq = __lpfc_sli_get_els_sglq(phba, piocb);
2a9bf3d0
JS
9899 if (!sglq) {
9900 if (!(flag & SLI_IOCB_RET_IOCB)) {
9901 __lpfc_sli_ringtx_put(phba,
9902 pring,
9903 piocb);
9904 return IOCB_SUCCESS;
9905 } else
9906 return IOCB_BUSY;
9907 }
9908 }
4f774513 9909 }
2ea259ee 9910 } else if (piocb->iocb_flag & LPFC_IO_FCP)
6d368e53
JS
9911 /* These IO's already have an XRI and a mapped sgl. */
9912 sglq = NULL;
2ea259ee 9913 else {
6d368e53
JS
9914 /*
9915 * This is a continuation of a commandi,(CX) so this
4f774513
JS
9916 * sglq is on the active list
9917 */
edccdc17 9918 sglq = __lpfc_get_active_sglq(phba, piocb->sli4_lxritag);
4f774513
JS
9919 if (!sglq)
9920 return IOCB_ERROR;
9921 }
9922
9923 if (sglq) {
6d368e53 9924 piocb->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0 9925 piocb->sli4_xritag = sglq->sli4_xritag;
2a9bf3d0 9926 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocb, sglq))
4f774513
JS
9927 return IOCB_ERROR;
9928 }
9929
205e8240 9930 if (lpfc_sli4_iocb2wqe(phba, piocb, &wqe))
4f774513
JS
9931 return IOCB_ERROR;
9932
205e8240 9933 if (lpfc_sli4_wq_put(wq, &wqe))
895427bd 9934 return IOCB_ERROR;
4f774513
JS
9935 lpfc_sli_ringtxcmpl_put(phba, pring, piocb);
9936
9937 return 0;
9938}
9939
9940/**
9941 * __lpfc_sli_issue_iocb - Wrapper func of lockless version for issuing iocb
9942 *
9943 * This routine wraps the actual lockless version for issusing IOCB function
9944 * pointer from the lpfc_hba struct.
9945 *
9946 * Return codes:
b5c53958
JS
9947 * IOCB_ERROR - Error
9948 * IOCB_SUCCESS - Success
9949 * IOCB_BUSY - Busy
4f774513 9950 **/
2a9bf3d0 9951int
4f774513
JS
9952__lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
9953 struct lpfc_iocbq *piocb, uint32_t flag)
9954{
9955 return phba->__lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
9956}
9957
9958/**
25985edc 9959 * lpfc_sli_api_table_setup - Set up sli api function jump table
4f774513
JS
9960 * @phba: The hba struct for which this call is being executed.
9961 * @dev_grp: The HBA PCI-Device group number.
9962 *
9963 * This routine sets up the SLI interface API function jump table in @phba
9964 * struct.
9965 * Returns: 0 - success, -ENODEV - failure.
9966 **/
9967int
9968lpfc_sli_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
9969{
9970
9971 switch (dev_grp) {
9972 case LPFC_PCI_DEV_LP:
9973 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s3;
9974 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s3;
9975 break;
9976 case LPFC_PCI_DEV_OC:
9977 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s4;
9978 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s4;
9979 break;
9980 default:
9981 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9982 "1419 Invalid HBA PCI-device group: 0x%x\n",
9983 dev_grp);
9984 return -ENODEV;
9985 break;
9986 }
9987 phba->lpfc_get_iocb_from_iocbq = lpfc_get_iocb_from_iocbq;
9988 return 0;
9989}
9990
a1efe163 9991/**
895427bd 9992 * lpfc_sli4_calc_ring - Calculates which ring to use
a1efe163 9993 * @phba: Pointer to HBA context object.
a1efe163
JS
9994 * @piocb: Pointer to command iocb.
9995 *
895427bd
JS
9996 * For SLI4 only, FCP IO can deferred to one fo many WQs, based on
9997 * hba_wqidx, thus we need to calculate the corresponding ring.
a1efe163 9998 * Since ABORTS must go on the same WQ of the command they are
895427bd 9999 * aborting, we use command's hba_wqidx.
a1efe163 10000 */
895427bd
JS
10001struct lpfc_sli_ring *
10002lpfc_sli4_calc_ring(struct lpfc_hba *phba, struct lpfc_iocbq *piocb)
9bd2bff5 10003{
895427bd 10004 if (piocb->iocb_flag & (LPFC_IO_FCP | LPFC_USE_FCPWQIDX)) {
8b0dff14 10005 if (!(phba->cfg_fof) ||
895427bd 10006 (!(piocb->iocb_flag & LPFC_IO_FOF))) {
8b0dff14 10007 if (unlikely(!phba->sli4_hba.fcp_wq))
895427bd 10008 return NULL;
8b0dff14 10009 /*
895427bd 10010 * for abort iocb hba_wqidx should already
8b0dff14
JS
10011 * be setup based on what work queue we used.
10012 */
8e036a94 10013 if (!(piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
895427bd 10014 piocb->hba_wqidx =
8b0dff14
JS
10015 lpfc_sli4_scmd_to_wqidx_distr(phba,
10016 piocb->context1);
8e036a94
DK
10017 piocb->hba_wqidx = piocb->hba_wqidx %
10018 phba->cfg_fcp_io_channel;
10019 }
895427bd 10020 return phba->sli4_hba.fcp_wq[piocb->hba_wqidx]->pring;
8b0dff14
JS
10021 } else {
10022 if (unlikely(!phba->sli4_hba.oas_wq))
895427bd
JS
10023 return NULL;
10024 piocb->hba_wqidx = 0;
10025 return phba->sli4_hba.oas_wq->pring;
9bd2bff5 10026 }
895427bd
JS
10027 } else {
10028 if (unlikely(!phba->sli4_hba.els_wq))
10029 return NULL;
10030 piocb->hba_wqidx = 0;
10031 return phba->sli4_hba.els_wq->pring;
9bd2bff5 10032 }
9bd2bff5
JS
10033}
10034
4f774513
JS
10035/**
10036 * lpfc_sli_issue_iocb - Wrapper function for __lpfc_sli_issue_iocb
10037 * @phba: Pointer to HBA context object.
10038 * @pring: Pointer to driver SLI ring object.
10039 * @piocb: Pointer to command iocb.
10040 * @flag: Flag indicating if this command can be put into txq.
10041 *
10042 * lpfc_sli_issue_iocb is a wrapper around __lpfc_sli_issue_iocb
10043 * function. This function gets the hbalock and calls
10044 * __lpfc_sli_issue_iocb function and will return the error returned
10045 * by __lpfc_sli_issue_iocb function. This wrapper is used by
10046 * functions which do not hold hbalock.
10047 **/
10048int
10049lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
10050 struct lpfc_iocbq *piocb, uint32_t flag)
10051{
895427bd 10052 struct lpfc_hba_eq_hdl *hba_eq_hdl;
2a76a283 10053 struct lpfc_sli_ring *pring;
ba20c853
JS
10054 struct lpfc_queue *fpeq;
10055 struct lpfc_eqe *eqe;
4f774513 10056 unsigned long iflags;
2a76a283 10057 int rc, idx;
4f774513 10058
7e56aa25 10059 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
10060 pring = lpfc_sli4_calc_ring(phba, piocb);
10061 if (unlikely(pring == NULL))
9bd2bff5 10062 return IOCB_ERROR;
ba20c853 10063
9bd2bff5
JS
10064 spin_lock_irqsave(&pring->ring_lock, iflags);
10065 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10066 spin_unlock_irqrestore(&pring->ring_lock, iflags);
ba20c853 10067
9bd2bff5 10068 if (lpfc_fcp_look_ahead && (piocb->iocb_flag & LPFC_IO_FCP)) {
895427bd
JS
10069 idx = piocb->hba_wqidx;
10070 hba_eq_hdl = &phba->sli4_hba.hba_eq_hdl[idx];
4f774513 10071
895427bd 10072 if (atomic_dec_and_test(&hba_eq_hdl->hba_eq_in_use)) {
ba20c853 10073
9bd2bff5
JS
10074 /* Get associated EQ with this index */
10075 fpeq = phba->sli4_hba.hba_eq[idx];
ba20c853 10076
9bd2bff5 10077 /* Turn off interrupts from this EQ */
b71413dd 10078 phba->sli4_hba.sli4_eq_clr_intr(fpeq);
ba20c853 10079
9bd2bff5
JS
10080 /*
10081 * Process all the events on FCP EQ
10082 */
10083 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
10084 lpfc_sli4_hba_handle_eqe(phba,
10085 eqe, idx);
10086 fpeq->EQ_processed++;
ba20c853 10087 }
ba20c853 10088
9bd2bff5 10089 /* Always clear and re-arm the EQ */
b71413dd 10090 phba->sli4_hba.sli4_eq_release(fpeq,
9bd2bff5
JS
10091 LPFC_QUEUE_REARM);
10092 }
895427bd 10093 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
2a76a283 10094 }
7e56aa25
JS
10095 } else {
10096 /* For now, SLI2/3 will still use hbalock */
10097 spin_lock_irqsave(&phba->hbalock, iflags);
10098 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10099 spin_unlock_irqrestore(&phba->hbalock, iflags);
10100 }
4f774513
JS
10101 return rc;
10102}
10103
10104/**
10105 * lpfc_extra_ring_setup - Extra ring setup function
10106 * @phba: Pointer to HBA context object.
10107 *
10108 * This function is called while driver attaches with the
10109 * HBA to setup the extra ring. The extra ring is used
10110 * only when driver needs to support target mode functionality
10111 * or IP over FC functionalities.
10112 *
895427bd 10113 * This function is called with no lock held. SLI3 only.
4f774513
JS
10114 **/
10115static int
10116lpfc_extra_ring_setup( struct lpfc_hba *phba)
10117{
10118 struct lpfc_sli *psli;
10119 struct lpfc_sli_ring *pring;
10120
10121 psli = &phba->sli;
10122
10123 /* Adjust cmd/rsp ring iocb entries more evenly */
10124
10125 /* Take some away from the FCP ring */
895427bd 10126 pring = &psli->sli3_ring[LPFC_FCP_RING];
7e56aa25
JS
10127 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10128 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10129 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10130 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e 10131
a4bc3379 10132 /* and give them to the extra ring */
895427bd 10133 pring = &psli->sli3_ring[LPFC_EXTRA_RING];
a4bc3379 10134
7e56aa25
JS
10135 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10136 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10137 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10138 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e
JW
10139
10140 /* Setup default profile for this ring */
10141 pring->iotag_max = 4096;
10142 pring->num_mask = 1;
10143 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS
10144 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
10145 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW
10146 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
10147 return 0;
10148}
10149
cb69f7de
JS
10150/* lpfc_sli_abts_err_handler - handle a failed ABTS request from an SLI3 port.
10151 * @phba: Pointer to HBA context object.
10152 * @iocbq: Pointer to iocb object.
10153 *
10154 * The async_event handler calls this routine when it receives
10155 * an ASYNC_STATUS_CN event from the port. The port generates
10156 * this event when an Abort Sequence request to an rport fails
10157 * twice in succession. The abort could be originated by the
10158 * driver or by the port. The ABTS could have been for an ELS
10159 * or FCP IO. The port only generates this event when an ABTS
10160 * fails to complete after one retry.
10161 */
10162static void
10163lpfc_sli_abts_err_handler(struct lpfc_hba *phba,
10164 struct lpfc_iocbq *iocbq)
10165{
10166 struct lpfc_nodelist *ndlp = NULL;
10167 uint16_t rpi = 0, vpi = 0;
10168 struct lpfc_vport *vport = NULL;
10169
10170 /* The rpi in the ulpContext is vport-sensitive. */
10171 vpi = iocbq->iocb.un.asyncstat.sub_ctxt_tag;
10172 rpi = iocbq->iocb.ulpContext;
10173
10174 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10175 "3092 Port generated ABTS async event "
10176 "on vpi %d rpi %d status 0x%x\n",
10177 vpi, rpi, iocbq->iocb.ulpStatus);
10178
10179 vport = lpfc_find_vport_by_vpid(phba, vpi);
10180 if (!vport)
10181 goto err_exit;
10182 ndlp = lpfc_findnode_rpi(vport, rpi);
10183 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp))
10184 goto err_exit;
10185
10186 if (iocbq->iocb.ulpStatus == IOSTAT_LOCAL_REJECT)
10187 lpfc_sli_abts_recover_port(vport, ndlp);
10188 return;
10189
10190 err_exit:
10191 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10192 "3095 Event Context not found, no "
10193 "action on vpi %d rpi %d status 0x%x, reason 0x%x\n",
10194 iocbq->iocb.ulpContext, iocbq->iocb.ulpStatus,
10195 vpi, rpi);
10196}
10197
10198/* lpfc_sli4_abts_err_handler - handle a failed ABTS request from an SLI4 port.
10199 * @phba: pointer to HBA context object.
10200 * @ndlp: nodelist pointer for the impacted rport.
10201 * @axri: pointer to the wcqe containing the failed exchange.
10202 *
10203 * The driver calls this routine when it receives an ABORT_XRI_FCP CQE from the
10204 * port. The port generates this event when an abort exchange request to an
10205 * rport fails twice in succession with no reply. The abort could be originated
10206 * by the driver or by the port. The ABTS could have been for an ELS or FCP IO.
10207 */
10208void
10209lpfc_sli4_abts_err_handler(struct lpfc_hba *phba,
10210 struct lpfc_nodelist *ndlp,
10211 struct sli4_wcqe_xri_aborted *axri)
10212{
10213 struct lpfc_vport *vport;
5c1db2ac 10214 uint32_t ext_status = 0;
cb69f7de 10215
6b5151fd 10216 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) {
cb69f7de
JS
10217 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10218 "3115 Node Context not found, driver "
10219 "ignoring abts err event\n");
6b5151fd
JS
10220 return;
10221 }
10222
cb69f7de
JS
10223 vport = ndlp->vport;
10224 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10225 "3116 Port generated FCP XRI ABORT event on "
5c1db2ac 10226 "vpi %d rpi %d xri x%x status 0x%x parameter x%x\n",
8e668af5 10227 ndlp->vport->vpi, phba->sli4_hba.rpi_ids[ndlp->nlp_rpi],
cb69f7de 10228 bf_get(lpfc_wcqe_xa_xri, axri),
5c1db2ac
JS
10229 bf_get(lpfc_wcqe_xa_status, axri),
10230 axri->parameter);
cb69f7de 10231
5c1db2ac
JS
10232 /*
10233 * Catch the ABTS protocol failure case. Older OCe FW releases returned
10234 * LOCAL_REJECT and 0 for a failed ABTS exchange and later OCe and
10235 * LPe FW releases returned LOCAL_REJECT and SEQUENCE_TIMEOUT.
10236 */
e3d2b802 10237 ext_status = axri->parameter & IOERR_PARAM_MASK;
5c1db2ac
JS
10238 if ((bf_get(lpfc_wcqe_xa_status, axri) == IOSTAT_LOCAL_REJECT) &&
10239 ((ext_status == IOERR_SEQUENCE_TIMEOUT) || (ext_status == 0)))
cb69f7de
JS
10240 lpfc_sli_abts_recover_port(vport, ndlp);
10241}
10242
e59058c4 10243/**
3621a710 10244 * lpfc_sli_async_event_handler - ASYNC iocb handler function
e59058c4
JS
10245 * @phba: Pointer to HBA context object.
10246 * @pring: Pointer to driver SLI ring object.
10247 * @iocbq: Pointer to iocb object.
10248 *
10249 * This function is called by the slow ring event handler
10250 * function when there is an ASYNC event iocb in the ring.
10251 * This function is called with no lock held.
10252 * Currently this function handles only temperature related
10253 * ASYNC events. The function decodes the temperature sensor
10254 * event message and posts events for the management applications.
10255 **/
98c9ea5c 10256static void
57127f15
JS
10257lpfc_sli_async_event_handler(struct lpfc_hba * phba,
10258 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
10259{
10260 IOCB_t *icmd;
10261 uint16_t evt_code;
57127f15
JS
10262 struct temp_event temp_event_data;
10263 struct Scsi_Host *shost;
a257bf90 10264 uint32_t *iocb_w;
57127f15
JS
10265
10266 icmd = &iocbq->iocb;
10267 evt_code = icmd->un.asyncstat.evt_code;
57127f15 10268
cb69f7de
JS
10269 switch (evt_code) {
10270 case ASYNC_TEMP_WARN:
10271 case ASYNC_TEMP_SAFE:
10272 temp_event_data.data = (uint32_t) icmd->ulpContext;
10273 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
10274 if (evt_code == ASYNC_TEMP_WARN) {
10275 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
10276 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10277 "0347 Adapter is very hot, please take "
10278 "corrective action. temperature : %d Celsius\n",
10279 (uint32_t) icmd->ulpContext);
10280 } else {
10281 temp_event_data.event_code = LPFC_NORMAL_TEMP;
10282 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10283 "0340 Adapter temperature is OK now. "
10284 "temperature : %d Celsius\n",
10285 (uint32_t) icmd->ulpContext);
10286 }
10287
10288 /* Send temperature change event to applications */
10289 shost = lpfc_shost_from_vport(phba->pport);
10290 fc_host_post_vendor_event(shost, fc_get_event_number(),
10291 sizeof(temp_event_data), (char *) &temp_event_data,
10292 LPFC_NL_VENDOR_ID);
10293 break;
10294 case ASYNC_STATUS_CN:
10295 lpfc_sli_abts_err_handler(phba, iocbq);
10296 break;
10297 default:
a257bf90 10298 iocb_w = (uint32_t *) icmd;
cb69f7de 10299 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
76bb24ef 10300 "0346 Ring %d handler: unexpected ASYNC_STATUS"
e4e74273 10301 " evt_code 0x%x\n"
a257bf90
JS
10302 "W0 0x%08x W1 0x%08x W2 0x%08x W3 0x%08x\n"
10303 "W4 0x%08x W5 0x%08x W6 0x%08x W7 0x%08x\n"
10304 "W8 0x%08x W9 0x%08x W10 0x%08x W11 0x%08x\n"
10305 "W12 0x%08x W13 0x%08x W14 0x%08x W15 0x%08x\n",
cb69f7de 10306 pring->ringno, icmd->un.asyncstat.evt_code,
a257bf90
JS
10307 iocb_w[0], iocb_w[1], iocb_w[2], iocb_w[3],
10308 iocb_w[4], iocb_w[5], iocb_w[6], iocb_w[7],
10309 iocb_w[8], iocb_w[9], iocb_w[10], iocb_w[11],
10310 iocb_w[12], iocb_w[13], iocb_w[14], iocb_w[15]);
10311
cb69f7de 10312 break;
57127f15 10313 }
57127f15
JS
10314}
10315
10316
e59058c4 10317/**
895427bd 10318 * lpfc_sli4_setup - SLI ring setup function
e59058c4
JS
10319 * @phba: Pointer to HBA context object.
10320 *
10321 * lpfc_sli_setup sets up rings of the SLI interface with
10322 * number of iocbs per ring and iotags. This function is
10323 * called while driver attach to the HBA and before the
10324 * interrupts are enabled. So there is no need for locking.
10325 *
10326 * This function always returns 0.
10327 **/
dea3101e 10328int
895427bd
JS
10329lpfc_sli4_setup(struct lpfc_hba *phba)
10330{
10331 struct lpfc_sli_ring *pring;
10332
10333 pring = phba->sli4_hba.els_wq->pring;
10334 pring->num_mask = LPFC_MAX_RING_MASK;
10335 pring->prt[0].profile = 0; /* Mask 0 */
10336 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10337 pring->prt[0].type = FC_TYPE_ELS;
10338 pring->prt[0].lpfc_sli_rcv_unsol_event =
10339 lpfc_els_unsol_event;
10340 pring->prt[1].profile = 0; /* Mask 1 */
10341 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10342 pring->prt[1].type = FC_TYPE_ELS;
10343 pring->prt[1].lpfc_sli_rcv_unsol_event =
10344 lpfc_els_unsol_event;
10345 pring->prt[2].profile = 0; /* Mask 2 */
10346 /* NameServer Inquiry */
10347 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
10348 /* NameServer */
10349 pring->prt[2].type = FC_TYPE_CT;
10350 pring->prt[2].lpfc_sli_rcv_unsol_event =
10351 lpfc_ct_unsol_event;
10352 pring->prt[3].profile = 0; /* Mask 3 */
10353 /* NameServer response */
10354 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
10355 /* NameServer */
10356 pring->prt[3].type = FC_TYPE_CT;
10357 pring->prt[3].lpfc_sli_rcv_unsol_event =
10358 lpfc_ct_unsol_event;
10359 return 0;
10360}
10361
10362/**
10363 * lpfc_sli_setup - SLI ring setup function
10364 * @phba: Pointer to HBA context object.
10365 *
10366 * lpfc_sli_setup sets up rings of the SLI interface with
10367 * number of iocbs per ring and iotags. This function is
10368 * called while driver attach to the HBA and before the
10369 * interrupts are enabled. So there is no need for locking.
10370 *
10371 * This function always returns 0. SLI3 only.
10372 **/
10373int
dea3101e
JB
10374lpfc_sli_setup(struct lpfc_hba *phba)
10375{
ed957684 10376 int i, totiocbsize = 0;
dea3101e
JB
10377 struct lpfc_sli *psli = &phba->sli;
10378 struct lpfc_sli_ring *pring;
10379
2a76a283 10380 psli->num_rings = MAX_SLI3_CONFIGURED_RINGS;
dea3101e 10381 psli->sli_flag = 0;
dea3101e 10382
604a3e30
JB
10383 psli->iocbq_lookup = NULL;
10384 psli->iocbq_lookup_len = 0;
10385 psli->last_iotag = 0;
10386
dea3101e 10387 for (i = 0; i < psli->num_rings; i++) {
895427bd 10388 pring = &psli->sli3_ring[i];
dea3101e
JB
10389 switch (i) {
10390 case LPFC_FCP_RING: /* ring 0 - FCP */
10391 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10392 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
10393 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
10394 pring->sli.sli3.numCiocb +=
10395 SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10396 pring->sli.sli3.numRiocb +=
10397 SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10398 pring->sli.sli3.numCiocb +=
10399 SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10400 pring->sli.sli3.numRiocb +=
10401 SLI2_IOCB_RSP_R3XTRA_ENTRIES;
10402 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10403 SLI3_IOCB_CMD_SIZE :
10404 SLI2_IOCB_CMD_SIZE;
7e56aa25 10405 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10406 SLI3_IOCB_RSP_SIZE :
10407 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10408 pring->iotag_ctr = 0;
10409 pring->iotag_max =
92d7f7b0 10410 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB
10411 pring->fast_iotag = pring->iotag_max;
10412 pring->num_mask = 0;
10413 break;
a4bc3379 10414 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e 10415 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10416 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
10417 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
10418 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10419 SLI3_IOCB_CMD_SIZE :
10420 SLI2_IOCB_CMD_SIZE;
7e56aa25 10421 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10422 SLI3_IOCB_RSP_SIZE :
10423 SLI2_IOCB_RSP_SIZE;
2e0fef85 10424 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB
10425 pring->num_mask = 0;
10426 break;
10427 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
10428 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10429 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
10430 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
10431 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10432 SLI3_IOCB_CMD_SIZE :
10433 SLI2_IOCB_CMD_SIZE;
7e56aa25 10434 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10435 SLI3_IOCB_RSP_SIZE :
10436 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10437 pring->fast_iotag = 0;
10438 pring->iotag_ctr = 0;
10439 pring->iotag_max = 4096;
57127f15
JS
10440 pring->lpfc_sli_rcv_async_status =
10441 lpfc_sli_async_event_handler;
6669f9bb 10442 pring->num_mask = LPFC_MAX_RING_MASK;
dea3101e 10443 pring->prt[0].profile = 0; /* Mask 0 */
6a9c52cf
JS
10444 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10445 pring->prt[0].type = FC_TYPE_ELS;
dea3101e 10446 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 10447 lpfc_els_unsol_event;
dea3101e 10448 pring->prt[1].profile = 0; /* Mask 1 */
6a9c52cf
JS
10449 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10450 pring->prt[1].type = FC_TYPE_ELS;
dea3101e 10451 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 10452 lpfc_els_unsol_event;
dea3101e
JB
10453 pring->prt[2].profile = 0; /* Mask 2 */
10454 /* NameServer Inquiry */
6a9c52cf 10455 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
dea3101e 10456 /* NameServer */
6a9c52cf 10457 pring->prt[2].type = FC_TYPE_CT;
dea3101e 10458 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 10459 lpfc_ct_unsol_event;
dea3101e
JB
10460 pring->prt[3].profile = 0; /* Mask 3 */
10461 /* NameServer response */
6a9c52cf 10462 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
dea3101e 10463 /* NameServer */
6a9c52cf 10464 pring->prt[3].type = FC_TYPE_CT;
dea3101e 10465 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 10466 lpfc_ct_unsol_event;
dea3101e
JB
10467 break;
10468 }
7e56aa25
JS
10469 totiocbsize += (pring->sli.sli3.numCiocb *
10470 pring->sli.sli3.sizeCiocb) +
10471 (pring->sli.sli3.numRiocb * pring->sli.sli3.sizeRiocb);
dea3101e 10472 }
ed957684 10473 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 10474 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS
10475 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
10476 "SLI2 SLIM Data: x%x x%lx\n",
10477 phba->brd_no, totiocbsize,
10478 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 10479 }
cf5bf97e
JW
10480 if (phba->cfg_multi_ring_support == 2)
10481 lpfc_extra_ring_setup(phba);
dea3101e
JB
10482
10483 return 0;
10484}
10485
e59058c4 10486/**
895427bd 10487 * lpfc_sli4_queue_init - Queue initialization function
e59058c4
JS
10488 * @phba: Pointer to HBA context object.
10489 *
895427bd 10490 * lpfc_sli4_queue_init sets up mailbox queues and iocb queues for each
e59058c4
JS
10491 * ring. This function also initializes ring indices of each ring.
10492 * This function is called during the initialization of the SLI
10493 * interface of an HBA.
10494 * This function is called with no lock held and always returns
10495 * 1.
10496 **/
895427bd
JS
10497void
10498lpfc_sli4_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10499{
10500 struct lpfc_sli *psli;
10501 struct lpfc_sli_ring *pring;
604a3e30 10502 int i;
dea3101e
JB
10503
10504 psli = &phba->sli;
2e0fef85 10505 spin_lock_irq(&phba->hbalock);
dea3101e 10506 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10507 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e 10508 /* Initialize list headers for txq and txcmplq as double linked lists */
895427bd
JS
10509 for (i = 0; i < phba->cfg_fcp_io_channel; i++) {
10510 pring = phba->sli4_hba.fcp_wq[i]->pring;
68e814f5 10511 pring->flag = 0;
895427bd 10512 pring->ringno = LPFC_FCP_RING;
dea3101e
JB
10513 INIT_LIST_HEAD(&pring->txq);
10514 INIT_LIST_HEAD(&pring->txcmplq);
10515 INIT_LIST_HEAD(&pring->iocb_continueq);
7e56aa25 10516 spin_lock_init(&pring->ring_lock);
dea3101e 10517 }
895427bd
JS
10518 for (i = 0; i < phba->cfg_nvme_io_channel; i++) {
10519 pring = phba->sli4_hba.nvme_wq[i]->pring;
10520 pring->flag = 0;
10521 pring->ringno = LPFC_FCP_RING;
10522 INIT_LIST_HEAD(&pring->txq);
10523 INIT_LIST_HEAD(&pring->txcmplq);
10524 INIT_LIST_HEAD(&pring->iocb_continueq);
10525 spin_lock_init(&pring->ring_lock);
10526 }
10527 pring = phba->sli4_hba.els_wq->pring;
10528 pring->flag = 0;
10529 pring->ringno = LPFC_ELS_RING;
10530 INIT_LIST_HEAD(&pring->txq);
10531 INIT_LIST_HEAD(&pring->txcmplq);
10532 INIT_LIST_HEAD(&pring->iocb_continueq);
10533 spin_lock_init(&pring->ring_lock);
dea3101e 10534
895427bd
JS
10535 if (phba->cfg_nvme_io_channel) {
10536 pring = phba->sli4_hba.nvmels_wq->pring;
10537 pring->flag = 0;
10538 pring->ringno = LPFC_ELS_RING;
10539 INIT_LIST_HEAD(&pring->txq);
10540 INIT_LIST_HEAD(&pring->txcmplq);
10541 INIT_LIST_HEAD(&pring->iocb_continueq);
10542 spin_lock_init(&pring->ring_lock);
10543 }
10544
10545 if (phba->cfg_fof) {
10546 pring = phba->sli4_hba.oas_wq->pring;
10547 pring->flag = 0;
10548 pring->ringno = LPFC_FCP_RING;
10549 INIT_LIST_HEAD(&pring->txq);
10550 INIT_LIST_HEAD(&pring->txcmplq);
10551 INIT_LIST_HEAD(&pring->iocb_continueq);
10552 spin_lock_init(&pring->ring_lock);
10553 }
10554
10555 spin_unlock_irq(&phba->hbalock);
10556}
10557
10558/**
10559 * lpfc_sli_queue_init - Queue initialization function
10560 * @phba: Pointer to HBA context object.
10561 *
10562 * lpfc_sli_queue_init sets up mailbox queues and iocb queues for each
10563 * ring. This function also initializes ring indices of each ring.
10564 * This function is called during the initialization of the SLI
10565 * interface of an HBA.
10566 * This function is called with no lock held and always returns
10567 * 1.
10568 **/
10569void
10570lpfc_sli_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10571{
10572 struct lpfc_sli *psli;
10573 struct lpfc_sli_ring *pring;
604a3e30 10574 int i;
dea3101e
JB
10575
10576 psli = &phba->sli;
2e0fef85 10577 spin_lock_irq(&phba->hbalock);
dea3101e 10578 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10579 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB
10580 /* Initialize list headers for txq and txcmplq as double linked lists */
10581 for (i = 0; i < psli->num_rings; i++) {
895427bd 10582 pring = &psli->sli3_ring[i];
dea3101e 10583 pring->ringno = i;
7e56aa25
JS
10584 pring->sli.sli3.next_cmdidx = 0;
10585 pring->sli.sli3.local_getidx = 0;
10586 pring->sli.sli3.cmdidx = 0;
dea3101e 10587 INIT_LIST_HEAD(&pring->iocb_continueq);
9c2face6 10588 INIT_LIST_HEAD(&pring->iocb_continue_saveq);
dea3101e 10589 INIT_LIST_HEAD(&pring->postbufq);
895427bd
JS
10590 pring->flag = 0;
10591 INIT_LIST_HEAD(&pring->txq);
10592 INIT_LIST_HEAD(&pring->txcmplq);
7e56aa25 10593 spin_lock_init(&pring->ring_lock);
dea3101e 10594 }
2e0fef85 10595 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10596}
10597
04c68496
JS
10598/**
10599 * lpfc_sli_mbox_sys_flush - Flush mailbox command sub-system
10600 * @phba: Pointer to HBA context object.
10601 *
10602 * This routine flushes the mailbox command subsystem. It will unconditionally
10603 * flush all the mailbox commands in the three possible stages in the mailbox
10604 * command sub-system: pending mailbox command queue; the outstanding mailbox
10605 * command; and completed mailbox command queue. It is caller's responsibility
10606 * to make sure that the driver is in the proper state to flush the mailbox
10607 * command sub-system. Namely, the posting of mailbox commands into the
10608 * pending mailbox command queue from the various clients must be stopped;
10609 * either the HBA is in a state that it will never works on the outstanding
10610 * mailbox command (such as in EEH or ERATT conditions) or the outstanding
10611 * mailbox command has been completed.
10612 **/
10613static void
10614lpfc_sli_mbox_sys_flush(struct lpfc_hba *phba)
10615{
10616 LIST_HEAD(completions);
10617 struct lpfc_sli *psli = &phba->sli;
10618 LPFC_MBOXQ_t *pmb;
10619 unsigned long iflag;
10620
523128e5
JS
10621 /* Disable softirqs, including timers from obtaining phba->hbalock */
10622 local_bh_disable();
10623
04c68496
JS
10624 /* Flush all the mailbox commands in the mbox system */
10625 spin_lock_irqsave(&phba->hbalock, iflag);
523128e5 10626
04c68496
JS
10627 /* The pending mailbox command queue */
10628 list_splice_init(&phba->sli.mboxq, &completions);
10629 /* The outstanding active mailbox command */
10630 if (psli->mbox_active) {
10631 list_add_tail(&psli->mbox_active->list, &completions);
10632 psli->mbox_active = NULL;
10633 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10634 }
10635 /* The completed mailbox command queue */
10636 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
10637 spin_unlock_irqrestore(&phba->hbalock, iflag);
10638
523128e5
JS
10639 /* Enable softirqs again, done with phba->hbalock */
10640 local_bh_enable();
10641
04c68496
JS
10642 /* Return all flushed mailbox commands with MBX_NOT_FINISHED status */
10643 while (!list_empty(&completions)) {
10644 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
10645 pmb->u.mb.mbxStatus = MBX_NOT_FINISHED;
10646 if (pmb->mbox_cmpl)
10647 pmb->mbox_cmpl(phba, pmb);
10648 }
10649}
10650
e59058c4 10651/**
3621a710 10652 * lpfc_sli_host_down - Vport cleanup function
e59058c4
JS
10653 * @vport: Pointer to virtual port object.
10654 *
10655 * lpfc_sli_host_down is called to clean up the resources
10656 * associated with a vport before destroying virtual
10657 * port data structures.
10658 * This function does following operations:
10659 * - Free discovery resources associated with this virtual
10660 * port.
10661 * - Free iocbs associated with this virtual port in
10662 * the txq.
10663 * - Send abort for all iocb commands associated with this
10664 * vport in txcmplq.
10665 *
10666 * This function is called with no lock held and always returns 1.
10667 **/
92d7f7b0
JS
10668int
10669lpfc_sli_host_down(struct lpfc_vport *vport)
10670{
858c9f6c 10671 LIST_HEAD(completions);
92d7f7b0
JS
10672 struct lpfc_hba *phba = vport->phba;
10673 struct lpfc_sli *psli = &phba->sli;
895427bd 10674 struct lpfc_queue *qp = NULL;
92d7f7b0
JS
10675 struct lpfc_sli_ring *pring;
10676 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS
10677 int i;
10678 unsigned long flags = 0;
10679 uint16_t prev_pring_flag;
10680
10681 lpfc_cleanup_discovery_resources(vport);
10682
10683 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0 10684
895427bd
JS
10685 /*
10686 * Error everything on the txq since these iocbs
10687 * have not been given to the FW yet.
10688 * Also issue ABTS for everything on the txcmplq
10689 */
10690 if (phba->sli_rev != LPFC_SLI_REV4) {
10691 for (i = 0; i < psli->num_rings; i++) {
10692 pring = &psli->sli3_ring[i];
10693 prev_pring_flag = pring->flag;
10694 /* Only slow rings */
10695 if (pring->ringno == LPFC_ELS_RING) {
10696 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10697 /* Set the lpfc data pending flag */
10698 set_bit(LPFC_DATA_READY, &phba->data_flags);
10699 }
10700 list_for_each_entry_safe(iocb, next_iocb,
10701 &pring->txq, list) {
10702 if (iocb->vport != vport)
10703 continue;
10704 list_move_tail(&iocb->list, &completions);
10705 }
10706 list_for_each_entry_safe(iocb, next_iocb,
10707 &pring->txcmplq, list) {
10708 if (iocb->vport != vport)
10709 continue;
10710 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10711 }
10712 pring->flag = prev_pring_flag;
10713 }
10714 } else {
10715 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10716 pring = qp->pring;
10717 if (!pring)
92d7f7b0 10718 continue;
895427bd
JS
10719 if (pring == phba->sli4_hba.els_wq->pring) {
10720 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10721 /* Set the lpfc data pending flag */
10722 set_bit(LPFC_DATA_READY, &phba->data_flags);
10723 }
10724 prev_pring_flag = pring->flag;
10725 spin_lock_irq(&pring->ring_lock);
10726 list_for_each_entry_safe(iocb, next_iocb,
10727 &pring->txq, list) {
10728 if (iocb->vport != vport)
10729 continue;
10730 list_move_tail(&iocb->list, &completions);
10731 }
10732 spin_unlock_irq(&pring->ring_lock);
10733 list_for_each_entry_safe(iocb, next_iocb,
10734 &pring->txcmplq, list) {
10735 if (iocb->vport != vport)
10736 continue;
10737 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10738 }
10739 pring->flag = prev_pring_flag;
92d7f7b0 10740 }
92d7f7b0 10741 }
92d7f7b0
JS
10742 spin_unlock_irqrestore(&phba->hbalock, flags);
10743
a257bf90
JS
10744 /* Cancel all the IOCBs from the completions list */
10745 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10746 IOERR_SLI_DOWN);
92d7f7b0
JS
10747 return 1;
10748}
10749
e59058c4 10750/**
3621a710 10751 * lpfc_sli_hba_down - Resource cleanup function for the HBA
e59058c4
JS
10752 * @phba: Pointer to HBA context object.
10753 *
10754 * This function cleans up all iocb, buffers, mailbox commands
10755 * while shutting down the HBA. This function is called with no
10756 * lock held and always returns 1.
10757 * This function does the following to cleanup driver resources:
10758 * - Free discovery resources for each virtual port
10759 * - Cleanup any pending fabric iocbs
10760 * - Iterate through the iocb txq and free each entry
10761 * in the list.
10762 * - Free up any buffer posted to the HBA
10763 * - Free mailbox commands in the mailbox queue.
10764 **/
dea3101e 10765int
2e0fef85 10766lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 10767{
2534ba75 10768 LIST_HEAD(completions);
2e0fef85 10769 struct lpfc_sli *psli = &phba->sli;
895427bd 10770 struct lpfc_queue *qp = NULL;
dea3101e 10771 struct lpfc_sli_ring *pring;
0ff10d46 10772 struct lpfc_dmabuf *buf_ptr;
dea3101e 10773 unsigned long flags = 0;
04c68496
JS
10774 int i;
10775
10776 /* Shutdown the mailbox command sub-system */
618a5230 10777 lpfc_sli_mbox_sys_shutdown(phba, LPFC_MBX_WAIT);
dea3101e 10778
dea3101e
JB
10779 lpfc_hba_down_prep(phba);
10780
523128e5
JS
10781 /* Disable softirqs, including timers from obtaining phba->hbalock */
10782 local_bh_disable();
10783
92d7f7b0
JS
10784 lpfc_fabric_abort_hba(phba);
10785
2e0fef85 10786 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e 10787
895427bd
JS
10788 /*
10789 * Error everything on the txq since these iocbs
10790 * have not been given to the FW yet.
10791 */
10792 if (phba->sli_rev != LPFC_SLI_REV4) {
10793 for (i = 0; i < psli->num_rings; i++) {
10794 pring = &psli->sli3_ring[i];
10795 /* Only slow rings */
10796 if (pring->ringno == LPFC_ELS_RING) {
10797 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10798 /* Set the lpfc data pending flag */
10799 set_bit(LPFC_DATA_READY, &phba->data_flags);
10800 }
10801 list_splice_init(&pring->txq, &completions);
10802 }
10803 } else {
10804 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10805 pring = qp->pring;
10806 if (!pring)
10807 continue;
10808 spin_lock_irq(&pring->ring_lock);
10809 list_splice_init(&pring->txq, &completions);
10810 spin_unlock_irq(&pring->ring_lock);
10811 if (pring == phba->sli4_hba.els_wq->pring) {
10812 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10813 /* Set the lpfc data pending flag */
10814 set_bit(LPFC_DATA_READY, &phba->data_flags);
10815 }
10816 }
2534ba75 10817 }
2e0fef85 10818 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 10819
a257bf90
JS
10820 /* Cancel all the IOCBs from the completions list */
10821 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10822 IOERR_SLI_DOWN);
dea3101e 10823
0ff10d46
JS
10824 spin_lock_irqsave(&phba->hbalock, flags);
10825 list_splice_init(&phba->elsbuf, &completions);
10826 phba->elsbuf_cnt = 0;
10827 phba->elsbuf_prev_cnt = 0;
10828 spin_unlock_irqrestore(&phba->hbalock, flags);
10829
10830 while (!list_empty(&completions)) {
10831 list_remove_head(&completions, buf_ptr,
10832 struct lpfc_dmabuf, list);
10833 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
10834 kfree(buf_ptr);
10835 }
10836
523128e5
JS
10837 /* Enable softirqs again, done with phba->hbalock */
10838 local_bh_enable();
10839
dea3101e
JB
10840 /* Return any active mbox cmds */
10841 del_timer_sync(&psli->mbox_tmo);
2e0fef85 10842
da0436e9 10843 spin_lock_irqsave(&phba->pport->work_port_lock, flags);
2e0fef85 10844 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
da0436e9 10845 spin_unlock_irqrestore(&phba->pport->work_port_lock, flags);
2e0fef85 10846
da0436e9
JS
10847 return 1;
10848}
10849
e59058c4 10850/**
3621a710 10851 * lpfc_sli_pcimem_bcopy - SLI memory copy function
e59058c4
JS
10852 * @srcp: Source memory pointer.
10853 * @destp: Destination memory pointer.
10854 * @cnt: Number of words required to be copied.
10855 *
10856 * This function is used for copying data between driver memory
10857 * and the SLI memory. This function also changes the endianness
10858 * of each word if native endianness is different from SLI
10859 * endianness. This function can be called with or without
10860 * lock.
10861 **/
dea3101e
JB
10862void
10863lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
10864{
10865 uint32_t *src = srcp;
10866 uint32_t *dest = destp;
10867 uint32_t ldata;
10868 int i;
10869
10870 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
10871 ldata = *src;
10872 ldata = le32_to_cpu(ldata);
10873 *dest = ldata;
10874 src++;
10875 dest++;
10876 }
10877}
10878
e59058c4 10879
a0c87cbd
JS
10880/**
10881 * lpfc_sli_bemem_bcopy - SLI memory copy function
10882 * @srcp: Source memory pointer.
10883 * @destp: Destination memory pointer.
10884 * @cnt: Number of words required to be copied.
10885 *
10886 * This function is used for copying data between a data structure
10887 * with big endian representation to local endianness.
10888 * This function can be called with or without lock.
10889 **/
10890void
10891lpfc_sli_bemem_bcopy(void *srcp, void *destp, uint32_t cnt)
10892{
10893 uint32_t *src = srcp;
10894 uint32_t *dest = destp;
10895 uint32_t ldata;
10896 int i;
10897
10898 for (i = 0; i < (int)cnt; i += sizeof(uint32_t)) {
10899 ldata = *src;
10900 ldata = be32_to_cpu(ldata);
10901 *dest = ldata;
10902 src++;
10903 dest++;
10904 }
10905}
10906
e59058c4 10907/**
3621a710 10908 * lpfc_sli_ringpostbuf_put - Function to add a buffer to postbufq
e59058c4
JS
10909 * @phba: Pointer to HBA context object.
10910 * @pring: Pointer to driver SLI ring object.
10911 * @mp: Pointer to driver buffer object.
10912 *
10913 * This function is called with no lock held.
10914 * It always return zero after adding the buffer to the postbufq
10915 * buffer list.
10916 **/
dea3101e 10917int
2e0fef85
JS
10918lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10919 struct lpfc_dmabuf *mp)
dea3101e
JB
10920{
10921 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
10922 later */
2e0fef85 10923 spin_lock_irq(&phba->hbalock);
dea3101e 10924 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 10925 pring->postbufq_cnt++;
2e0fef85 10926 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10927 return 0;
10928}
10929
e59058c4 10930/**
3621a710 10931 * lpfc_sli_get_buffer_tag - allocates a tag for a CMD_QUE_XRI64_CX buffer
e59058c4
JS
10932 * @phba: Pointer to HBA context object.
10933 *
10934 * When HBQ is enabled, buffers are searched based on tags. This function
10935 * allocates a tag for buffer posted using CMD_QUE_XRI64_CX iocb. The
10936 * tag is bit wise or-ed with QUE_BUFTAG_BIT to make sure that the tag
10937 * does not conflict with tags of buffer posted for unsolicited events.
10938 * The function returns the allocated tag. The function is called with
10939 * no locks held.
10940 **/
76bb24ef
JS
10941uint32_t
10942lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
10943{
10944 spin_lock_irq(&phba->hbalock);
10945 phba->buffer_tag_count++;
10946 /*
10947 * Always set the QUE_BUFTAG_BIT to distiguish between
10948 * a tag assigned by HBQ.
10949 */
10950 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
10951 spin_unlock_irq(&phba->hbalock);
10952 return phba->buffer_tag_count;
10953}
10954
e59058c4 10955/**
3621a710 10956 * lpfc_sli_ring_taggedbuf_get - find HBQ buffer associated with given tag
e59058c4
JS
10957 * @phba: Pointer to HBA context object.
10958 * @pring: Pointer to driver SLI ring object.
10959 * @tag: Buffer tag.
10960 *
10961 * Buffers posted using CMD_QUE_XRI64_CX iocb are in pring->postbufq
10962 * list. After HBA DMA data to these buffers, CMD_IOCB_RET_XRI64_CX
10963 * iocb is posted to the response ring with the tag of the buffer.
10964 * This function searches the pring->postbufq list using the tag
10965 * to find buffer associated with CMD_IOCB_RET_XRI64_CX
10966 * iocb. If the buffer is found then lpfc_dmabuf object of the
10967 * buffer is returned to the caller else NULL is returned.
10968 * This function is called with no lock held.
10969 **/
76bb24ef
JS
10970struct lpfc_dmabuf *
10971lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10972 uint32_t tag)
10973{
10974 struct lpfc_dmabuf *mp, *next_mp;
10975 struct list_head *slp = &pring->postbufq;
10976
25985edc 10977 /* Search postbufq, from the beginning, looking for a match on tag */
76bb24ef
JS
10978 spin_lock_irq(&phba->hbalock);
10979 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
10980 if (mp->buffer_tag == tag) {
10981 list_del_init(&mp->list);
10982 pring->postbufq_cnt--;
10983 spin_unlock_irq(&phba->hbalock);
10984 return mp;
10985 }
10986 }
10987
10988 spin_unlock_irq(&phba->hbalock);
10989 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 10990 "0402 Cannot find virtual addr for buffer tag on "
76bb24ef
JS
10991 "ring %d Data x%lx x%p x%p x%x\n",
10992 pring->ringno, (unsigned long) tag,
10993 slp->next, slp->prev, pring->postbufq_cnt);
10994
10995 return NULL;
10996}
dea3101e 10997
e59058c4 10998/**
3621a710 10999 * lpfc_sli_ringpostbuf_get - search buffers for unsolicited CT and ELS events
e59058c4
JS
11000 * @phba: Pointer to HBA context object.
11001 * @pring: Pointer to driver SLI ring object.
11002 * @phys: DMA address of the buffer.
11003 *
11004 * This function searches the buffer list using the dma_address
11005 * of unsolicited event to find the driver's lpfc_dmabuf object
11006 * corresponding to the dma_address. The function returns the
11007 * lpfc_dmabuf object if a buffer is found else it returns NULL.
11008 * This function is called by the ct and els unsolicited event
11009 * handlers to get the buffer associated with the unsolicited
11010 * event.
11011 *
11012 * This function is called with no lock held.
11013 **/
dea3101e
JB
11014struct lpfc_dmabuf *
11015lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11016 dma_addr_t phys)
11017{
11018 struct lpfc_dmabuf *mp, *next_mp;
11019 struct list_head *slp = &pring->postbufq;
11020
25985edc 11021 /* Search postbufq, from the beginning, looking for a match on phys */
2e0fef85 11022 spin_lock_irq(&phba->hbalock);
dea3101e
JB
11023 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
11024 if (mp->phys == phys) {
11025 list_del_init(&mp->list);
11026 pring->postbufq_cnt--;
2e0fef85 11027 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
11028 return mp;
11029 }
11030 }
11031
2e0fef85 11032 spin_unlock_irq(&phba->hbalock);
dea3101e 11033 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 11034 "0410 Cannot find virtual addr for mapped buf on "
dea3101e 11035 "ring %d Data x%llx x%p x%p x%x\n",
e8b62011 11036 pring->ringno, (unsigned long long)phys,
dea3101e
JB
11037 slp->next, slp->prev, pring->postbufq_cnt);
11038 return NULL;
11039}
11040
e59058c4 11041/**
3621a710 11042 * lpfc_sli_abort_els_cmpl - Completion handler for the els abort iocbs
e59058c4
JS
11043 * @phba: Pointer to HBA context object.
11044 * @cmdiocb: Pointer to driver command iocb object.
11045 * @rspiocb: Pointer to driver response iocb object.
11046 *
11047 * This function is the completion handler for the abort iocbs for
11048 * ELS commands. This function is called from the ELS ring event
11049 * handler with no lock held. This function frees memory resources
11050 * associated with the abort iocb.
11051 **/
dea3101e 11052static void
2e0fef85
JS
11053lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11054 struct lpfc_iocbq *rspiocb)
dea3101e 11055{
2e0fef85 11056 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 11057 uint16_t abort_iotag, abort_context;
ff78d8f9 11058 struct lpfc_iocbq *abort_iocb = NULL;
2680eeaa
JS
11059
11060 if (irsp->ulpStatus) {
ff78d8f9
JS
11061
11062 /*
11063 * Assume that the port already completed and returned, or
11064 * will return the iocb. Just Log the message.
11065 */
2680eeaa
JS
11066 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
11067 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
11068
2e0fef85 11069 spin_lock_irq(&phba->hbalock);
45ed1190 11070 if (phba->sli_rev < LPFC_SLI_REV4) {
faa832e9
JS
11071 if (irsp->ulpCommand == CMD_ABORT_XRI_CX &&
11072 irsp->ulpStatus == IOSTAT_LOCAL_REJECT &&
11073 irsp->un.ulpWord[4] == IOERR_ABORT_REQUESTED) {
11074 spin_unlock_irq(&phba->hbalock);
11075 goto release_iocb;
11076 }
45ed1190
JS
11077 if (abort_iotag != 0 &&
11078 abort_iotag <= phba->sli.last_iotag)
11079 abort_iocb =
11080 phba->sli.iocbq_lookup[abort_iotag];
11081 } else
11082 /* For sli4 the abort_tag is the XRI,
11083 * so the abort routine puts the iotag of the iocb
11084 * being aborted in the context field of the abort
11085 * IOCB.
11086 */
11087 abort_iocb = phba->sli.iocbq_lookup[abort_context];
2680eeaa 11088
2a9bf3d0
JS
11089 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS | LOG_SLI,
11090 "0327 Cannot abort els iocb %p "
11091 "with tag %x context %x, abort status %x, "
11092 "abort code %x\n",
11093 abort_iocb, abort_iotag, abort_context,
11094 irsp->ulpStatus, irsp->un.ulpWord[4]);
341af102 11095
ff78d8f9 11096 spin_unlock_irq(&phba->hbalock);
2680eeaa 11097 }
faa832e9 11098release_iocb:
604a3e30 11099 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB
11100 return;
11101}
11102
e59058c4 11103/**
3621a710 11104 * lpfc_ignore_els_cmpl - Completion handler for aborted ELS command
e59058c4
JS
11105 * @phba: Pointer to HBA context object.
11106 * @cmdiocb: Pointer to driver command iocb object.
11107 * @rspiocb: Pointer to driver response iocb object.
11108 *
11109 * The function is called from SLI ring event handler with no
11110 * lock held. This function is the completion handler for ELS commands
11111 * which are aborted. The function frees memory resources used for
11112 * the aborted ELS commands.
11113 **/
92d7f7b0
JS
11114static void
11115lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11116 struct lpfc_iocbq *rspiocb)
11117{
11118 IOCB_t *irsp = &rspiocb->iocb;
11119
11120 /* ELS cmd tag <ulpIoTag> completes */
11121 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
d7c255b2 11122 "0139 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 11123 "x%x x%x x%x\n",
e8b62011 11124 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 11125 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS
11126 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
11127 lpfc_ct_free_iocb(phba, cmdiocb);
11128 else
11129 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS
11130 return;
11131}
11132
e59058c4 11133/**
5af5eee7 11134 * lpfc_sli_abort_iotag_issue - Issue abort for a command iocb
e59058c4
JS
11135 * @phba: Pointer to HBA context object.
11136 * @pring: Pointer to driver SLI ring object.
11137 * @cmdiocb: Pointer to driver command iocb object.
11138 *
5af5eee7
JS
11139 * This function issues an abort iocb for the provided command iocb down to
11140 * the port. Other than the case the outstanding command iocb is an abort
11141 * request, this function issues abort out unconditionally. This function is
11142 * called with hbalock held. The function returns 0 when it fails due to
11143 * memory allocation failure or when the command iocb is an abort request.
e59058c4 11144 **/
5af5eee7
JS
11145static int
11146lpfc_sli_abort_iotag_issue(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 11147 struct lpfc_iocbq *cmdiocb)
dea3101e 11148{
2e0fef85 11149 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 11150 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB
11151 IOCB_t *icmd = NULL;
11152 IOCB_t *iabt = NULL;
5af5eee7 11153 int retval;
7e56aa25 11154 unsigned long iflags;
faa832e9 11155 struct lpfc_nodelist *ndlp;
07951076 11156
1c2ba475
JT
11157 lockdep_assert_held(&phba->hbalock);
11158
92d7f7b0
JS
11159 /*
11160 * There are certain command types we don't want to abort. And we
11161 * don't want to abort commands that are already in the process of
11162 * being aborted.
07951076
JS
11163 */
11164 icmd = &cmdiocb->iocb;
2e0fef85 11165 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS
11166 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11167 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS
11168 return 0;
11169
dea3101e 11170 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 11171 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
11172 if (abtsiocbp == NULL)
11173 return 0;
dea3101e 11174
07951076 11175 /* This signals the response to set the correct status
341af102 11176 * before calling the completion handler
07951076
JS
11177 */
11178 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
11179
dea3101e 11180 iabt = &abtsiocbp->iocb;
07951076
JS
11181 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
11182 iabt->un.acxri.abortContextTag = icmd->ulpContext;
45ed1190 11183 if (phba->sli_rev == LPFC_SLI_REV4) {
da0436e9 11184 iabt->un.acxri.abortIoTag = cmdiocb->sli4_xritag;
45ed1190 11185 iabt->un.acxri.abortContextTag = cmdiocb->iotag;
faa832e9 11186 } else {
da0436e9 11187 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
faa832e9
JS
11188 if (pring->ringno == LPFC_ELS_RING) {
11189 ndlp = (struct lpfc_nodelist *)(cmdiocb->context1);
11190 iabt->un.acxri.abortContextTag = ndlp->nlp_rpi;
11191 }
11192 }
07951076
JS
11193 iabt->ulpLe = 1;
11194 iabt->ulpClass = icmd->ulpClass;
dea3101e 11195
5ffc266e 11196 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11197 abtsiocbp->hba_wqidx = cmdiocb->hba_wqidx;
341af102
JS
11198 if (cmdiocb->iocb_flag & LPFC_IO_FCP)
11199 abtsiocbp->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11200 if (cmdiocb->iocb_flag & LPFC_IO_FOF)
11201 abtsiocbp->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11202
2e0fef85 11203 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS
11204 iabt->ulpCommand = CMD_ABORT_XRI_CN;
11205 else
11206 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 11207
07951076 11208 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
e6c6acc0 11209 abtsiocbp->vport = vport;
5b8bd0c9 11210
e8b62011
JS
11211 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
11212 "0339 Abort xri x%x, original iotag x%x, "
11213 "abort cmd iotag x%x\n",
2a9bf3d0 11214 iabt->un.acxri.abortIoTag,
e8b62011 11215 iabt->un.acxri.abortContextTag,
2a9bf3d0 11216 abtsiocbp->iotag);
7e56aa25
JS
11217
11218 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
11219 pring = lpfc_sli4_calc_ring(phba, abtsiocbp);
11220 if (unlikely(pring == NULL))
9bd2bff5 11221 return 0;
7e56aa25
JS
11222 /* Note: both hbalock and ring_lock need to be set here */
11223 spin_lock_irqsave(&pring->ring_lock, iflags);
11224 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11225 abtsiocbp, 0);
11226 spin_unlock_irqrestore(&pring->ring_lock, iflags);
11227 } else {
11228 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11229 abtsiocbp, 0);
11230 }
dea3101e 11231
d7c255b2
JS
11232 if (retval)
11233 __lpfc_sli_release_iocbq(phba, abtsiocbp);
5af5eee7
JS
11234
11235 /*
11236 * Caller to this routine should check for IOCB_ERROR
11237 * and handle it properly. This routine no longer removes
11238 * iocb off txcmplq and call compl in case of IOCB_ERROR.
11239 */
11240 return retval;
11241}
11242
11243/**
11244 * lpfc_sli_issue_abort_iotag - Abort function for a command iocb
11245 * @phba: Pointer to HBA context object.
11246 * @pring: Pointer to driver SLI ring object.
11247 * @cmdiocb: Pointer to driver command iocb object.
11248 *
11249 * This function issues an abort iocb for the provided command iocb. In case
11250 * of unloading, the abort iocb will not be issued to commands on the ELS
11251 * ring. Instead, the callback function shall be changed to those commands
11252 * so that nothing happens when them finishes. This function is called with
11253 * hbalock held. The function returns 0 when the command iocb is an abort
11254 * request.
11255 **/
11256int
11257lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11258 struct lpfc_iocbq *cmdiocb)
11259{
11260 struct lpfc_vport *vport = cmdiocb->vport;
11261 int retval = IOCB_ERROR;
11262 IOCB_t *icmd = NULL;
11263
1c2ba475
JT
11264 lockdep_assert_held(&phba->hbalock);
11265
5af5eee7
JS
11266 /*
11267 * There are certain command types we don't want to abort. And we
11268 * don't want to abort commands that are already in the process of
11269 * being aborted.
11270 */
11271 icmd = &cmdiocb->iocb;
11272 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
11273 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11274 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
11275 return 0;
11276
1234a6d5
DK
11277 if (!pring) {
11278 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11279 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11280 else
11281 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11282 goto abort_iotag_exit;
11283 }
11284
5af5eee7
JS
11285 /*
11286 * If we're unloading, don't abort iocb on the ELS ring, but change
11287 * the callback so that nothing happens when it finishes.
11288 */
11289 if ((vport->load_flag & FC_UNLOADING) &&
11290 (pring->ringno == LPFC_ELS_RING)) {
11291 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11292 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11293 else
11294 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11295 goto abort_iotag_exit;
11296 }
11297
11298 /* Now, we try to issue the abort to the cmdiocb out */
11299 retval = lpfc_sli_abort_iotag_issue(phba, pring, cmdiocb);
11300
07951076 11301abort_iotag_exit:
2e0fef85
JS
11302 /*
11303 * Caller to this routine should check for IOCB_ERROR
11304 * and handle it properly. This routine no longer removes
11305 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 11306 */
2e0fef85 11307 return retval;
dea3101e
JB
11308}
11309
895427bd
JS
11310/**
11311 * lpfc_sli4_abort_nvme_io - Issue abort for a command iocb
11312 * @phba: Pointer to HBA context object.
11313 * @pring: Pointer to driver SLI ring object.
11314 * @cmdiocb: Pointer to driver command iocb object.
11315 *
11316 * This function issues an abort iocb for the provided command iocb down to
11317 * the port. Other than the case the outstanding command iocb is an abort
11318 * request, this function issues abort out unconditionally. This function is
11319 * called with hbalock held. The function returns 0 when it fails due to
11320 * memory allocation failure or when the command iocb is an abort request.
11321 **/
11322static int
11323lpfc_sli4_abort_nvme_io(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11324 struct lpfc_iocbq *cmdiocb)
11325{
11326 struct lpfc_vport *vport = cmdiocb->vport;
11327 struct lpfc_iocbq *abtsiocbp;
205e8240 11328 union lpfc_wqe128 *abts_wqe;
895427bd
JS
11329 int retval;
11330
11331 /*
11332 * There are certain command types we don't want to abort. And we
11333 * don't want to abort commands that are already in the process of
11334 * being aborted.
11335 */
11336 if (cmdiocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
11337 cmdiocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN ||
11338 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
11339 return 0;
11340
11341 /* issue ABTS for this io based on iotag */
11342 abtsiocbp = __lpfc_sli_get_iocbq(phba);
11343 if (abtsiocbp == NULL)
11344 return 0;
11345
11346 /* This signals the response to set the correct status
11347 * before calling the completion handler
11348 */
11349 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
11350
11351 /* Complete prepping the abort wqe and issue to the FW. */
11352 abts_wqe = &abtsiocbp->wqe;
895427bd 11353
1c36833d
JS
11354 /* Clear any stale WQE contents */
11355 memset(abts_wqe, 0, sizeof(union lpfc_wqe));
11356 bf_set(abort_cmd_criteria, &abts_wqe->abort_cmd, T_XRI_TAG);
895427bd
JS
11357
11358 /* word 7 */
895427bd
JS
11359 bf_set(wqe_cmnd, &abts_wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
11360 bf_set(wqe_class, &abts_wqe->abort_cmd.wqe_com,
11361 cmdiocb->iocb.ulpClass);
11362
11363 /* word 8 - tell the FW to abort the IO associated with this
11364 * outstanding exchange ID.
11365 */
11366 abts_wqe->abort_cmd.wqe_com.abort_tag = cmdiocb->sli4_xritag;
11367
11368 /* word 9 - this is the iotag for the abts_wqe completion. */
11369 bf_set(wqe_reqtag, &abts_wqe->abort_cmd.wqe_com,
11370 abtsiocbp->iotag);
11371
11372 /* word 10 */
895427bd
JS
11373 bf_set(wqe_qosd, &abts_wqe->abort_cmd.wqe_com, 1);
11374 bf_set(wqe_lenloc, &abts_wqe->abort_cmd.wqe_com, LPFC_WQE_LENLOC_NONE);
11375
11376 /* word 11 */
11377 bf_set(wqe_cmd_type, &abts_wqe->abort_cmd.wqe_com, OTHER_COMMAND);
11378 bf_set(wqe_wqec, &abts_wqe->abort_cmd.wqe_com, 1);
11379 bf_set(wqe_cqid, &abts_wqe->abort_cmd.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
11380
11381 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
11382 abtsiocbp->iocb_flag |= LPFC_IO_NVME;
11383 abtsiocbp->vport = vport;
01649561 11384 abtsiocbp->wqe_cmpl = lpfc_nvme_abort_fcreq_cmpl;
895427bd 11385 retval = lpfc_sli4_issue_wqe(phba, LPFC_FCP_RING, abtsiocbp);
cd22d605 11386 if (retval) {
895427bd
JS
11387 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME,
11388 "6147 Failed abts issue_wqe with status x%x "
11389 "for oxid x%x\n",
11390 retval, cmdiocb->sli4_xritag);
11391 lpfc_sli_release_iocbq(phba, abtsiocbp);
11392 return retval;
11393 }
11394
11395 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME,
11396 "6148 Drv Abort NVME Request Issued for "
11397 "ox_id x%x on reqtag x%x\n",
11398 cmdiocb->sli4_xritag,
11399 abtsiocbp->iotag);
11400
11401 return retval;
11402}
11403
5af5eee7
JS
11404/**
11405 * lpfc_sli_hba_iocb_abort - Abort all iocbs to an hba.
11406 * @phba: pointer to lpfc HBA data structure.
11407 *
11408 * This routine will abort all pending and outstanding iocbs to an HBA.
11409 **/
11410void
11411lpfc_sli_hba_iocb_abort(struct lpfc_hba *phba)
11412{
11413 struct lpfc_sli *psli = &phba->sli;
11414 struct lpfc_sli_ring *pring;
895427bd 11415 struct lpfc_queue *qp = NULL;
5af5eee7
JS
11416 int i;
11417
895427bd
JS
11418 if (phba->sli_rev != LPFC_SLI_REV4) {
11419 for (i = 0; i < psli->num_rings; i++) {
11420 pring = &psli->sli3_ring[i];
11421 lpfc_sli_abort_iocb_ring(phba, pring);
11422 }
11423 return;
11424 }
11425 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
11426 pring = qp->pring;
11427 if (!pring)
11428 continue;
db55fba8 11429 lpfc_sli_abort_iocb_ring(phba, pring);
5af5eee7
JS
11430 }
11431}
11432
e59058c4 11433/**
3621a710 11434 * lpfc_sli_validate_fcp_iocb - find commands associated with a vport or LUN
e59058c4
JS
11435 * @iocbq: Pointer to driver iocb object.
11436 * @vport: Pointer to driver virtual port object.
11437 * @tgt_id: SCSI ID of the target.
11438 * @lun_id: LUN ID of the scsi device.
11439 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST
11440 *
3621a710 11441 * This function acts as an iocb filter for functions which abort or count
e59058c4
JS
11442 * all FCP iocbs pending on a lun/SCSI target/SCSI host. It will return
11443 * 0 if the filtering criteria is met for the given iocb and will return
11444 * 1 if the filtering criteria is not met.
11445 * If ctx_cmd == LPFC_CTX_LUN, the function returns 0 only if the
11446 * given iocb is for the SCSI device specified by vport, tgt_id and
11447 * lun_id parameter.
11448 * If ctx_cmd == LPFC_CTX_TGT, the function returns 0 only if the
11449 * given iocb is for the SCSI target specified by vport and tgt_id
11450 * parameters.
11451 * If ctx_cmd == LPFC_CTX_HOST, the function returns 0 only if the
11452 * given iocb is for the SCSI host associated with the given vport.
11453 * This function is called with no locks held.
11454 **/
dea3101e 11455static int
51ef4c26
JS
11456lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
11457 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 11458 lpfc_ctx_cmd ctx_cmd)
dea3101e 11459{
0bd4ca25 11460 struct lpfc_scsi_buf *lpfc_cmd;
dea3101e
JB
11461 int rc = 1;
11462
b0e83012 11463 if (iocbq->vport != vport)
0bd4ca25
JSEC
11464 return rc;
11465
b0e83012
JS
11466 if (!(iocbq->iocb_flag & LPFC_IO_FCP) ||
11467 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ))
51ef4c26
JS
11468 return rc;
11469
0bd4ca25 11470 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
0bd4ca25 11471
495a714c 11472 if (lpfc_cmd->pCmd == NULL)
dea3101e
JB
11473 return rc;
11474
11475 switch (ctx_cmd) {
11476 case LPFC_CTX_LUN:
b0e83012 11477 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c
JS
11478 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id) &&
11479 (scsilun_to_int(&lpfc_cmd->fcp_cmnd->fcp_lun) == lun_id))
dea3101e
JB
11480 rc = 0;
11481 break;
11482 case LPFC_CTX_TGT:
b0e83012 11483 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c 11484 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id))
dea3101e
JB
11485 rc = 0;
11486 break;
dea3101e
JB
11487 case LPFC_CTX_HOST:
11488 rc = 0;
11489 break;
11490 default:
11491 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
cadbd4a5 11492 __func__, ctx_cmd);
dea3101e
JB
11493 break;
11494 }
11495
11496 return rc;
11497}
11498
e59058c4 11499/**
3621a710 11500 * lpfc_sli_sum_iocb - Function to count the number of FCP iocbs pending
e59058c4
JS
11501 * @vport: Pointer to virtual port.
11502 * @tgt_id: SCSI ID of the target.
11503 * @lun_id: LUN ID of the scsi device.
11504 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11505 *
11506 * This function returns number of FCP commands pending for the vport.
11507 * When ctx_cmd == LPFC_CTX_LUN, the function returns number of FCP
11508 * commands pending on the vport associated with SCSI device specified
11509 * by tgt_id and lun_id parameters.
11510 * When ctx_cmd == LPFC_CTX_TGT, the function returns number of FCP
11511 * commands pending on the vport associated with SCSI target specified
11512 * by tgt_id parameter.
11513 * When ctx_cmd == LPFC_CTX_HOST, the function returns number of FCP
11514 * commands pending on the vport.
11515 * This function returns the number of iocbs which satisfy the filter.
11516 * This function is called without any lock held.
11517 **/
dea3101e 11518int
51ef4c26
JS
11519lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
11520 lpfc_ctx_cmd ctx_cmd)
dea3101e 11521{
51ef4c26 11522 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11523 struct lpfc_iocbq *iocbq;
11524 int sum, i;
dea3101e 11525
31979008 11526 spin_lock_irq(&phba->hbalock);
0bd4ca25
JSEC
11527 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
11528 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11529
51ef4c26
JS
11530 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
11531 ctx_cmd) == 0)
0bd4ca25 11532 sum++;
dea3101e 11533 }
31979008 11534 spin_unlock_irq(&phba->hbalock);
0bd4ca25 11535
dea3101e
JB
11536 return sum;
11537}
11538
e59058c4 11539/**
3621a710 11540 * lpfc_sli_abort_fcp_cmpl - Completion handler function for aborted FCP IOCBs
e59058c4
JS
11541 * @phba: Pointer to HBA context object
11542 * @cmdiocb: Pointer to command iocb object.
11543 * @rspiocb: Pointer to response iocb object.
11544 *
11545 * This function is called when an aborted FCP iocb completes. This
11546 * function is called by the ring event handler with no lock held.
11547 * This function frees the iocb.
11548 **/
5eb95af0 11549void
2e0fef85
JS
11550lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11551 struct lpfc_iocbq *rspiocb)
5eb95af0 11552{
cb69f7de 11553 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8e668af5 11554 "3096 ABORT_XRI_CN completing on rpi x%x "
cb69f7de
JS
11555 "original iotag x%x, abort cmd iotag x%x "
11556 "status 0x%x, reason 0x%x\n",
11557 cmdiocb->iocb.un.acxri.abortContextTag,
11558 cmdiocb->iocb.un.acxri.abortIoTag,
11559 cmdiocb->iotag, rspiocb->iocb.ulpStatus,
11560 rspiocb->iocb.un.ulpWord[4]);
604a3e30 11561 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC
11562 return;
11563}
11564
e59058c4 11565/**
3621a710 11566 * lpfc_sli_abort_iocb - issue abort for all commands on a host/target/LUN
e59058c4
JS
11567 * @vport: Pointer to virtual port.
11568 * @pring: Pointer to driver SLI ring object.
11569 * @tgt_id: SCSI ID of the target.
11570 * @lun_id: LUN ID of the scsi device.
11571 * @abort_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11572 *
11573 * This function sends an abort command for every SCSI command
11574 * associated with the given virtual port pending on the ring
11575 * filtered by lpfc_sli_validate_fcp_iocb function.
11576 * When abort_cmd == LPFC_CTX_LUN, the function sends abort only to the
11577 * FCP iocbs associated with lun specified by tgt_id and lun_id
11578 * parameters
11579 * When abort_cmd == LPFC_CTX_TGT, the function sends abort only to the
11580 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11581 * When abort_cmd == LPFC_CTX_HOST, the function sends abort to all
11582 * FCP iocbs associated with virtual port.
11583 * This function returns number of iocbs it failed to abort.
11584 * This function is called with no locks held.
11585 **/
dea3101e 11586int
51ef4c26
JS
11587lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11588 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 11589{
51ef4c26 11590 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11591 struct lpfc_iocbq *iocbq;
11592 struct lpfc_iocbq *abtsiocb;
ecbb227e 11593 struct lpfc_sli_ring *pring_s4;
dea3101e 11594 IOCB_t *cmd = NULL;
dea3101e 11595 int errcnt = 0, ret_val = 0;
0bd4ca25 11596 int i;
dea3101e 11597
b0e83012
JS
11598 /* all I/Os are in process of being flushed */
11599 if (phba->hba_flag & HBA_FCP_IOQ_FLUSH)
11600 return errcnt;
11601
0bd4ca25
JSEC
11602 for (i = 1; i <= phba->sli.last_iotag; i++) {
11603 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11604
51ef4c26 11605 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 11606 abort_cmd) != 0)
dea3101e
JB
11607 continue;
11608
afbd8d88
JS
11609 /*
11610 * If the iocbq is already being aborted, don't take a second
11611 * action, but do count it.
11612 */
11613 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11614 continue;
11615
dea3101e 11616 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 11617 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
11618 if (abtsiocb == NULL) {
11619 errcnt++;
11620 continue;
11621 }
dea3101e 11622
afbd8d88
JS
11623 /* indicate the IO is being aborted by the driver. */
11624 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11625
0bd4ca25 11626 cmd = &iocbq->iocb;
dea3101e
JB
11627 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11628 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
da0436e9
JS
11629 if (phba->sli_rev == LPFC_SLI_REV4)
11630 abtsiocb->iocb.un.acxri.abortIoTag = iocbq->sli4_xritag;
11631 else
11632 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
dea3101e
JB
11633 abtsiocb->iocb.ulpLe = 1;
11634 abtsiocb->iocb.ulpClass = cmd->ulpClass;
afbd8d88 11635 abtsiocb->vport = vport;
dea3101e 11636
5ffc266e 11637 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11638 abtsiocb->hba_wqidx = iocbq->hba_wqidx;
341af102
JS
11639 if (iocbq->iocb_flag & LPFC_IO_FCP)
11640 abtsiocb->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11641 if (iocbq->iocb_flag & LPFC_IO_FOF)
11642 abtsiocb->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11643
2e0fef85 11644 if (lpfc_is_link_up(phba))
dea3101e
JB
11645 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11646 else
11647 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11648
5eb95af0
JSEC
11649 /* Setup callback routine and issue the command. */
11650 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
ecbb227e
JS
11651 if (phba->sli_rev == LPFC_SLI_REV4) {
11652 pring_s4 = lpfc_sli4_calc_ring(phba, iocbq);
11653 if (!pring_s4)
11654 continue;
11655 ret_val = lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11656 abtsiocb, 0);
11657 } else
11658 ret_val = lpfc_sli_issue_iocb(phba, pring->ringno,
11659 abtsiocb, 0);
dea3101e 11660 if (ret_val == IOCB_ERROR) {
604a3e30 11661 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB
11662 errcnt++;
11663 continue;
11664 }
11665 }
11666
11667 return errcnt;
11668}
11669
98912dda
JS
11670/**
11671 * lpfc_sli_abort_taskmgmt - issue abort for all commands on a host/target/LUN
11672 * @vport: Pointer to virtual port.
11673 * @pring: Pointer to driver SLI ring object.
11674 * @tgt_id: SCSI ID of the target.
11675 * @lun_id: LUN ID of the scsi device.
11676 * @taskmgmt_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11677 *
11678 * This function sends an abort command for every SCSI command
11679 * associated with the given virtual port pending on the ring
11680 * filtered by lpfc_sli_validate_fcp_iocb function.
11681 * When taskmgmt_cmd == LPFC_CTX_LUN, the function sends abort only to the
11682 * FCP iocbs associated with lun specified by tgt_id and lun_id
11683 * parameters
11684 * When taskmgmt_cmd == LPFC_CTX_TGT, the function sends abort only to the
11685 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11686 * When taskmgmt_cmd == LPFC_CTX_HOST, the function sends abort to all
11687 * FCP iocbs associated with virtual port.
11688 * This function returns number of iocbs it aborted .
11689 * This function is called with no locks held right after a taskmgmt
11690 * command is sent.
11691 **/
11692int
11693lpfc_sli_abort_taskmgmt(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11694 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd cmd)
11695{
11696 struct lpfc_hba *phba = vport->phba;
8c50d25c 11697 struct lpfc_scsi_buf *lpfc_cmd;
98912dda 11698 struct lpfc_iocbq *abtsiocbq;
8c50d25c 11699 struct lpfc_nodelist *ndlp;
98912dda
JS
11700 struct lpfc_iocbq *iocbq;
11701 IOCB_t *icmd;
11702 int sum, i, ret_val;
11703 unsigned long iflags;
11704 struct lpfc_sli_ring *pring_s4;
98912dda 11705
59c68eaa 11706 spin_lock_irqsave(&phba->hbalock, iflags);
98912dda
JS
11707
11708 /* all I/Os are in process of being flushed */
11709 if (phba->hba_flag & HBA_FCP_IOQ_FLUSH) {
59c68eaa 11710 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11711 return 0;
11712 }
11713 sum = 0;
11714
11715 for (i = 1; i <= phba->sli.last_iotag; i++) {
11716 iocbq = phba->sli.iocbq_lookup[i];
11717
11718 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
11719 cmd) != 0)
11720 continue;
11721
11722 /*
11723 * If the iocbq is already being aborted, don't take a second
11724 * action, but do count it.
11725 */
11726 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11727 continue;
11728
11729 /* issue ABTS for this IOCB based on iotag */
11730 abtsiocbq = __lpfc_sli_get_iocbq(phba);
11731 if (abtsiocbq == NULL)
11732 continue;
11733
11734 icmd = &iocbq->iocb;
11735 abtsiocbq->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11736 abtsiocbq->iocb.un.acxri.abortContextTag = icmd->ulpContext;
11737 if (phba->sli_rev == LPFC_SLI_REV4)
11738 abtsiocbq->iocb.un.acxri.abortIoTag =
11739 iocbq->sli4_xritag;
11740 else
11741 abtsiocbq->iocb.un.acxri.abortIoTag = icmd->ulpIoTag;
11742 abtsiocbq->iocb.ulpLe = 1;
11743 abtsiocbq->iocb.ulpClass = icmd->ulpClass;
11744 abtsiocbq->vport = vport;
11745
11746 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11747 abtsiocbq->hba_wqidx = iocbq->hba_wqidx;
98912dda
JS
11748 if (iocbq->iocb_flag & LPFC_IO_FCP)
11749 abtsiocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11750 if (iocbq->iocb_flag & LPFC_IO_FOF)
11751 abtsiocbq->iocb_flag |= LPFC_IO_FOF;
98912dda 11752
8c50d25c
JS
11753 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
11754 ndlp = lpfc_cmd->rdata->pnode;
11755
11756 if (lpfc_is_link_up(phba) &&
11757 (ndlp && ndlp->nlp_state == NLP_STE_MAPPED_NODE))
98912dda
JS
11758 abtsiocbq->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11759 else
11760 abtsiocbq->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11761
11762 /* Setup callback routine and issue the command. */
11763 abtsiocbq->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
11764
11765 /*
11766 * Indicate the IO is being aborted by the driver and set
11767 * the caller's flag into the aborted IO.
11768 */
11769 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11770
11771 if (phba->sli_rev == LPFC_SLI_REV4) {
59c68eaa
JS
11772 pring_s4 = lpfc_sli4_calc_ring(phba, abtsiocbq);
11773 if (!pring_s4)
895427bd 11774 continue;
98912dda 11775 /* Note: both hbalock and ring_lock must be set here */
59c68eaa 11776 spin_lock(&pring_s4->ring_lock);
98912dda
JS
11777 ret_val = __lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11778 abtsiocbq, 0);
59c68eaa 11779 spin_unlock(&pring_s4->ring_lock);
98912dda
JS
11780 } else {
11781 ret_val = __lpfc_sli_issue_iocb(phba, pring->ringno,
11782 abtsiocbq, 0);
11783 }
11784
11785
11786 if (ret_val == IOCB_ERROR)
11787 __lpfc_sli_release_iocbq(phba, abtsiocbq);
11788 else
11789 sum++;
11790 }
59c68eaa 11791 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11792 return sum;
11793}
11794
e59058c4 11795/**
3621a710 11796 * lpfc_sli_wake_iocb_wait - lpfc_sli_issue_iocb_wait's completion handler
e59058c4
JS
11797 * @phba: Pointer to HBA context object.
11798 * @cmdiocbq: Pointer to command iocb.
11799 * @rspiocbq: Pointer to response iocb.
11800 *
11801 * This function is the completion handler for iocbs issued using
11802 * lpfc_sli_issue_iocb_wait function. This function is called by the
11803 * ring event handler function without any lock held. This function
11804 * can be called from both worker thread context and interrupt
11805 * context. This function also can be called from other thread which
11806 * cleans up the SLI layer objects.
11807 * This function copy the contents of the response iocb to the
11808 * response iocb memory object provided by the caller of
11809 * lpfc_sli_issue_iocb_wait and then wakes up the thread which
11810 * sleeps for the iocb completion.
11811 **/
68876920
JSEC
11812static void
11813lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
11814 struct lpfc_iocbq *cmdiocbq,
11815 struct lpfc_iocbq *rspiocbq)
dea3101e 11816{
68876920
JSEC
11817 wait_queue_head_t *pdone_q;
11818 unsigned long iflags;
0f65ff68 11819 struct lpfc_scsi_buf *lpfc_cmd;
dea3101e 11820
2e0fef85 11821 spin_lock_irqsave(&phba->hbalock, iflags);
5a0916b4
JS
11822 if (cmdiocbq->iocb_flag & LPFC_IO_WAKE_TMO) {
11823
11824 /*
11825 * A time out has occurred for the iocb. If a time out
11826 * completion handler has been supplied, call it. Otherwise,
11827 * just free the iocbq.
11828 */
11829
11830 spin_unlock_irqrestore(&phba->hbalock, iflags);
11831 cmdiocbq->iocb_cmpl = cmdiocbq->wait_iocb_cmpl;
11832 cmdiocbq->wait_iocb_cmpl = NULL;
11833 if (cmdiocbq->iocb_cmpl)
11834 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, NULL);
11835 else
11836 lpfc_sli_release_iocbq(phba, cmdiocbq);
11837 return;
11838 }
11839
68876920
JSEC
11840 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
11841 if (cmdiocbq->context2 && rspiocbq)
11842 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
11843 &rspiocbq->iocb, sizeof(IOCB_t));
11844
0f65ff68
JS
11845 /* Set the exchange busy flag for task management commands */
11846 if ((cmdiocbq->iocb_flag & LPFC_IO_FCP) &&
11847 !(cmdiocbq->iocb_flag & LPFC_IO_LIBDFC)) {
11848 lpfc_cmd = container_of(cmdiocbq, struct lpfc_scsi_buf,
11849 cur_iocbq);
11850 lpfc_cmd->exch_busy = rspiocbq->iocb_flag & LPFC_EXCHANGE_BUSY;
11851 }
11852
68876920 11853 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC
11854 if (pdone_q)
11855 wake_up(pdone_q);
858c9f6c 11856 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB
11857 return;
11858}
11859
d11e31dd
JS
11860/**
11861 * lpfc_chk_iocb_flg - Test IOCB flag with lock held.
11862 * @phba: Pointer to HBA context object..
11863 * @piocbq: Pointer to command iocb.
11864 * @flag: Flag to test.
11865 *
11866 * This routine grabs the hbalock and then test the iocb_flag to
11867 * see if the passed in flag is set.
11868 * Returns:
11869 * 1 if flag is set.
11870 * 0 if flag is not set.
11871 **/
11872static int
11873lpfc_chk_iocb_flg(struct lpfc_hba *phba,
11874 struct lpfc_iocbq *piocbq, uint32_t flag)
11875{
11876 unsigned long iflags;
11877 int ret;
11878
11879 spin_lock_irqsave(&phba->hbalock, iflags);
11880 ret = piocbq->iocb_flag & flag;
11881 spin_unlock_irqrestore(&phba->hbalock, iflags);
11882 return ret;
11883
11884}
11885
e59058c4 11886/**
3621a710 11887 * lpfc_sli_issue_iocb_wait - Synchronous function to issue iocb commands
e59058c4
JS
11888 * @phba: Pointer to HBA context object..
11889 * @pring: Pointer to sli ring.
11890 * @piocb: Pointer to command iocb.
11891 * @prspiocbq: Pointer to response iocb.
11892 * @timeout: Timeout in number of seconds.
11893 *
11894 * This function issues the iocb to firmware and waits for the
5a0916b4
JS
11895 * iocb to complete. The iocb_cmpl field of the shall be used
11896 * to handle iocbs which time out. If the field is NULL, the
11897 * function shall free the iocbq structure. If more clean up is
11898 * needed, the caller is expected to provide a completion function
11899 * that will provide the needed clean up. If the iocb command is
11900 * not completed within timeout seconds, the function will either
11901 * free the iocbq structure (if iocb_cmpl == NULL) or execute the
11902 * completion function set in the iocb_cmpl field and then return
11903 * a status of IOCB_TIMEDOUT. The caller should not free the iocb
11904 * resources if this function returns IOCB_TIMEDOUT.
e59058c4
JS
11905 * The function waits for the iocb completion using an
11906 * non-interruptible wait.
11907 * This function will sleep while waiting for iocb completion.
11908 * So, this function should not be called from any context which
11909 * does not allow sleeping. Due to the same reason, this function
11910 * cannot be called with interrupt disabled.
11911 * This function assumes that the iocb completions occur while
11912 * this function sleep. So, this function cannot be called from
11913 * the thread which process iocb completion for this ring.
11914 * This function clears the iocb_flag of the iocb object before
11915 * issuing the iocb and the iocb completion handler sets this
11916 * flag and wakes this thread when the iocb completes.
11917 * The contents of the response iocb will be copied to prspiocbq
11918 * by the completion handler when the command completes.
11919 * This function returns IOCB_SUCCESS when success.
11920 * This function is called with no lock held.
11921 **/
dea3101e 11922int
2e0fef85 11923lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
da0436e9 11924 uint32_t ring_number,
2e0fef85
JS
11925 struct lpfc_iocbq *piocb,
11926 struct lpfc_iocbq *prspiocbq,
68876920 11927 uint32_t timeout)
dea3101e 11928{
7259f0d0 11929 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC
11930 long timeleft, timeout_req = 0;
11931 int retval = IOCB_SUCCESS;
875fbdfe 11932 uint32_t creg_val;
0e9bb8d7
JS
11933 struct lpfc_iocbq *iocb;
11934 int txq_cnt = 0;
11935 int txcmplq_cnt = 0;
895427bd 11936 struct lpfc_sli_ring *pring;
5a0916b4
JS
11937 unsigned long iflags;
11938 bool iocb_completed = true;
11939
895427bd
JS
11940 if (phba->sli_rev >= LPFC_SLI_REV4)
11941 pring = lpfc_sli4_calc_ring(phba, piocb);
11942 else
11943 pring = &phba->sli.sli3_ring[ring_number];
dea3101e 11944 /*
68876920
JSEC
11945 * If the caller has provided a response iocbq buffer, then context2
11946 * is NULL or its an error.
dea3101e 11947 */
68876920
JSEC
11948 if (prspiocbq) {
11949 if (piocb->context2)
11950 return IOCB_ERROR;
11951 piocb->context2 = prspiocbq;
dea3101e
JB
11952 }
11953
5a0916b4 11954 piocb->wait_iocb_cmpl = piocb->iocb_cmpl;
68876920
JSEC
11955 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
11956 piocb->context_un.wait_queue = &done_q;
5a0916b4 11957 piocb->iocb_flag &= ~(LPFC_IO_WAKE | LPFC_IO_WAKE_TMO);
dea3101e 11958
875fbdfe 11959 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
11960 if (lpfc_readl(phba->HCregaddr, &creg_val))
11961 return IOCB_ERROR;
875fbdfe
JSEC
11962 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
11963 writel(creg_val, phba->HCregaddr);
11964 readl(phba->HCregaddr); /* flush */
11965 }
11966
2a9bf3d0
JS
11967 retval = lpfc_sli_issue_iocb(phba, ring_number, piocb,
11968 SLI_IOCB_RET_IOCB);
68876920 11969 if (retval == IOCB_SUCCESS) {
256ec0d0 11970 timeout_req = msecs_to_jiffies(timeout * 1000);
68876920 11971 timeleft = wait_event_timeout(done_q,
d11e31dd 11972 lpfc_chk_iocb_flg(phba, piocb, LPFC_IO_WAKE),
68876920 11973 timeout_req);
5a0916b4
JS
11974 spin_lock_irqsave(&phba->hbalock, iflags);
11975 if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
11976
11977 /*
11978 * IOCB timed out. Inform the wake iocb wait
11979 * completion function and set local status
11980 */
dea3101e 11981
5a0916b4
JS
11982 iocb_completed = false;
11983 piocb->iocb_flag |= LPFC_IO_WAKE_TMO;
11984 }
11985 spin_unlock_irqrestore(&phba->hbalock, iflags);
11986 if (iocb_completed) {
7054a606 11987 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 11988 "0331 IOCB wake signaled\n");
53151bbb
JS
11989 /* Note: we are not indicating if the IOCB has a success
11990 * status or not - that's for the caller to check.
11991 * IOCB_SUCCESS means just that the command was sent and
11992 * completed. Not that it completed successfully.
11993 * */
7054a606 11994 } else if (timeleft == 0) {
68876920 11995 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
11996 "0338 IOCB wait timeout error - no "
11997 "wake response Data x%x\n", timeout);
68876920 11998 retval = IOCB_TIMEDOUT;
7054a606 11999 } else {
68876920 12000 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
12001 "0330 IOCB wake NOT set, "
12002 "Data x%x x%lx\n",
68876920
JSEC
12003 timeout, (timeleft / jiffies));
12004 retval = IOCB_TIMEDOUT;
dea3101e 12005 }
2a9bf3d0 12006 } else if (retval == IOCB_BUSY) {
0e9bb8d7
JS
12007 if (phba->cfg_log_verbose & LOG_SLI) {
12008 list_for_each_entry(iocb, &pring->txq, list) {
12009 txq_cnt++;
12010 }
12011 list_for_each_entry(iocb, &pring->txcmplq, list) {
12012 txcmplq_cnt++;
12013 }
12014 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
12015 "2818 Max IOCBs %d txq cnt %d txcmplq cnt %d\n",
12016 phba->iocb_cnt, txq_cnt, txcmplq_cnt);
12017 }
2a9bf3d0 12018 return retval;
68876920
JSEC
12019 } else {
12020 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
d7c255b2 12021 "0332 IOCB wait issue failed, Data x%x\n",
e8b62011 12022 retval);
68876920 12023 retval = IOCB_ERROR;
dea3101e
JB
12024 }
12025
875fbdfe 12026 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
12027 if (lpfc_readl(phba->HCregaddr, &creg_val))
12028 return IOCB_ERROR;
875fbdfe
JSEC
12029 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
12030 writel(creg_val, phba->HCregaddr);
12031 readl(phba->HCregaddr); /* flush */
12032 }
12033
68876920
JSEC
12034 if (prspiocbq)
12035 piocb->context2 = NULL;
12036
12037 piocb->context_un.wait_queue = NULL;
12038 piocb->iocb_cmpl = NULL;
dea3101e
JB
12039 return retval;
12040}
68876920 12041
e59058c4 12042/**
3621a710 12043 * lpfc_sli_issue_mbox_wait - Synchronous function to issue mailbox
e59058c4
JS
12044 * @phba: Pointer to HBA context object.
12045 * @pmboxq: Pointer to driver mailbox object.
12046 * @timeout: Timeout in number of seconds.
12047 *
12048 * This function issues the mailbox to firmware and waits for the
12049 * mailbox command to complete. If the mailbox command is not
12050 * completed within timeout seconds, it returns MBX_TIMEOUT.
12051 * The function waits for the mailbox completion using an
12052 * interruptible wait. If the thread is woken up due to a
12053 * signal, MBX_TIMEOUT error is returned to the caller. Caller
12054 * should not free the mailbox resources, if this function returns
12055 * MBX_TIMEOUT.
12056 * This function will sleep while waiting for mailbox completion.
12057 * So, this function should not be called from any context which
12058 * does not allow sleeping. Due to the same reason, this function
12059 * cannot be called with interrupt disabled.
12060 * This function assumes that the mailbox completion occurs while
12061 * this function sleep. So, this function cannot be called from
12062 * the worker thread which processes mailbox completion.
12063 * This function is called in the context of HBA management
12064 * applications.
12065 * This function returns MBX_SUCCESS when successful.
12066 * This function is called with no lock held.
12067 **/
dea3101e 12068int
2e0fef85 12069lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB
12070 uint32_t timeout)
12071{
e29d74f8 12072 struct completion mbox_done;
dea3101e 12073 int retval;
858c9f6c 12074 unsigned long flag;
dea3101e 12075
495a714c 12076 pmboxq->mbox_flag &= ~LPFC_MBX_WAKE;
dea3101e
JB
12077 /* setup wake call as IOCB callback */
12078 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
dea3101e 12079
e29d74f8
JS
12080 /* setup context3 field to pass wait_queue pointer to wake function */
12081 init_completion(&mbox_done);
12082 pmboxq->context3 = &mbox_done;
dea3101e
JB
12083 /* now issue the command */
12084 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
dea3101e 12085 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
e29d74f8
JS
12086 wait_for_completion_timeout(&mbox_done,
12087 msecs_to_jiffies(timeout * 1000));
7054a606 12088
858c9f6c 12089 spin_lock_irqsave(&phba->hbalock, flag);
e29d74f8 12090 pmboxq->context3 = NULL;
7054a606
JS
12091 /*
12092 * if LPFC_MBX_WAKE flag is set the mailbox is completed
12093 * else do not free the resources.
12094 */
d7c47992 12095 if (pmboxq->mbox_flag & LPFC_MBX_WAKE) {
dea3101e 12096 retval = MBX_SUCCESS;
d7c47992 12097 } else {
7054a606 12098 retval = MBX_TIMEOUT;
858c9f6c
JS
12099 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
12100 }
12101 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e 12102 }
dea3101e
JB
12103 return retval;
12104}
12105
e59058c4 12106/**
3772a991 12107 * lpfc_sli_mbox_sys_shutdown - shutdown mailbox command sub-system
e59058c4
JS
12108 * @phba: Pointer to HBA context.
12109 *
3772a991
JS
12110 * This function is called to shutdown the driver's mailbox sub-system.
12111 * It first marks the mailbox sub-system is in a block state to prevent
12112 * the asynchronous mailbox command from issued off the pending mailbox
12113 * command queue. If the mailbox command sub-system shutdown is due to
12114 * HBA error conditions such as EEH or ERATT, this routine shall invoke
12115 * the mailbox sub-system flush routine to forcefully bring down the
12116 * mailbox sub-system. Otherwise, if it is due to normal condition (such
12117 * as with offline or HBA function reset), this routine will wait for the
12118 * outstanding mailbox command to complete before invoking the mailbox
12119 * sub-system flush routine to gracefully bring down mailbox sub-system.
e59058c4 12120 **/
3772a991 12121void
618a5230 12122lpfc_sli_mbox_sys_shutdown(struct lpfc_hba *phba, int mbx_action)
b4c02652 12123{
3772a991 12124 struct lpfc_sli *psli = &phba->sli;
3772a991 12125 unsigned long timeout;
b4c02652 12126
618a5230
JS
12127 if (mbx_action == LPFC_MBX_NO_WAIT) {
12128 /* delay 100ms for port state */
12129 msleep(100);
12130 lpfc_sli_mbox_sys_flush(phba);
12131 return;
12132 }
a183a15f 12133 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
d7069f09 12134
523128e5
JS
12135 /* Disable softirqs, including timers from obtaining phba->hbalock */
12136 local_bh_disable();
12137
3772a991
JS
12138 spin_lock_irq(&phba->hbalock);
12139 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
b4c02652 12140
3772a991 12141 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
3772a991
JS
12142 /* Determine how long we might wait for the active mailbox
12143 * command to be gracefully completed by firmware.
12144 */
a183a15f
JS
12145 if (phba->sli.mbox_active)
12146 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
12147 phba->sli.mbox_active) *
12148 1000) + jiffies;
12149 spin_unlock_irq(&phba->hbalock);
12150
523128e5
JS
12151 /* Enable softirqs again, done with phba->hbalock */
12152 local_bh_enable();
12153
3772a991
JS
12154 while (phba->sli.mbox_active) {
12155 /* Check active mailbox complete status every 2ms */
12156 msleep(2);
12157 if (time_after(jiffies, timeout))
12158 /* Timeout, let the mailbox flush routine to
12159 * forcefully release active mailbox command
12160 */
12161 break;
12162 }
523128e5 12163 } else {
d7069f09
JS
12164 spin_unlock_irq(&phba->hbalock);
12165
523128e5
JS
12166 /* Enable softirqs again, done with phba->hbalock */
12167 local_bh_enable();
12168 }
12169
3772a991
JS
12170 lpfc_sli_mbox_sys_flush(phba);
12171}
ed957684 12172
3772a991
JS
12173/**
12174 * lpfc_sli_eratt_read - read sli-3 error attention events
12175 * @phba: Pointer to HBA context.
12176 *
12177 * This function is called to read the SLI3 device error attention registers
12178 * for possible error attention events. The caller must hold the hostlock
12179 * with spin_lock_irq().
12180 *
25985edc 12181 * This function returns 1 when there is Error Attention in the Host Attention
3772a991
JS
12182 * Register and returns 0 otherwise.
12183 **/
12184static int
12185lpfc_sli_eratt_read(struct lpfc_hba *phba)
12186{
12187 uint32_t ha_copy;
b4c02652 12188
3772a991 12189 /* Read chip Host Attention (HA) register */
9940b97b
JS
12190 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12191 goto unplug_err;
12192
3772a991
JS
12193 if (ha_copy & HA_ERATT) {
12194 /* Read host status register to retrieve error event */
9940b97b
JS
12195 if (lpfc_sli_read_hs(phba))
12196 goto unplug_err;
b4c02652 12197
3772a991
JS
12198 /* Check if there is a deferred error condition is active */
12199 if ((HS_FFER1 & phba->work_hs) &&
12200 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0 12201 HS_FFER6 | HS_FFER7 | HS_FFER8) & phba->work_hs)) {
3772a991 12202 phba->hba_flag |= DEFER_ERATT;
3772a991
JS
12203 /* Clear all interrupt enable conditions */
12204 writel(0, phba->HCregaddr);
12205 readl(phba->HCregaddr);
12206 }
12207
12208 /* Set the driver HA work bitmap */
3772a991
JS
12209 phba->work_ha |= HA_ERATT;
12210 /* Indicate polling handles this ERATT */
12211 phba->hba_flag |= HBA_ERATT_HANDLED;
3772a991
JS
12212 return 1;
12213 }
12214 return 0;
9940b97b
JS
12215
12216unplug_err:
12217 /* Set the driver HS work bitmap */
12218 phba->work_hs |= UNPLUG_ERR;
12219 /* Set the driver HA work bitmap */
12220 phba->work_ha |= HA_ERATT;
12221 /* Indicate polling handles this ERATT */
12222 phba->hba_flag |= HBA_ERATT_HANDLED;
12223 return 1;
b4c02652
JS
12224}
12225
da0436e9
JS
12226/**
12227 * lpfc_sli4_eratt_read - read sli-4 error attention events
12228 * @phba: Pointer to HBA context.
12229 *
12230 * This function is called to read the SLI4 device error attention registers
12231 * for possible error attention events. The caller must hold the hostlock
12232 * with spin_lock_irq().
12233 *
25985edc 12234 * This function returns 1 when there is Error Attention in the Host Attention
da0436e9
JS
12235 * Register and returns 0 otherwise.
12236 **/
12237static int
12238lpfc_sli4_eratt_read(struct lpfc_hba *phba)
12239{
12240 uint32_t uerr_sta_hi, uerr_sta_lo;
2fcee4bf
JS
12241 uint32_t if_type, portsmphr;
12242 struct lpfc_register portstat_reg;
da0436e9 12243
2fcee4bf
JS
12244 /*
12245 * For now, use the SLI4 device internal unrecoverable error
da0436e9
JS
12246 * registers for error attention. This can be changed later.
12247 */
2fcee4bf
JS
12248 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12249 switch (if_type) {
12250 case LPFC_SLI_INTF_IF_TYPE_0:
9940b97b
JS
12251 if (lpfc_readl(phba->sli4_hba.u.if_type0.UERRLOregaddr,
12252 &uerr_sta_lo) ||
12253 lpfc_readl(phba->sli4_hba.u.if_type0.UERRHIregaddr,
12254 &uerr_sta_hi)) {
12255 phba->work_hs |= UNPLUG_ERR;
12256 phba->work_ha |= HA_ERATT;
12257 phba->hba_flag |= HBA_ERATT_HANDLED;
12258 return 1;
12259 }
2fcee4bf
JS
12260 if ((~phba->sli4_hba.ue_mask_lo & uerr_sta_lo) ||
12261 (~phba->sli4_hba.ue_mask_hi & uerr_sta_hi)) {
12262 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12263 "1423 HBA Unrecoverable error: "
12264 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, "
12265 "ue_mask_lo_reg=0x%x, "
12266 "ue_mask_hi_reg=0x%x\n",
12267 uerr_sta_lo, uerr_sta_hi,
12268 phba->sli4_hba.ue_mask_lo,
12269 phba->sli4_hba.ue_mask_hi);
12270 phba->work_status[0] = uerr_sta_lo;
12271 phba->work_status[1] = uerr_sta_hi;
12272 phba->work_ha |= HA_ERATT;
12273 phba->hba_flag |= HBA_ERATT_HANDLED;
12274 return 1;
12275 }
12276 break;
12277 case LPFC_SLI_INTF_IF_TYPE_2:
27d6ac0a 12278 case LPFC_SLI_INTF_IF_TYPE_6:
9940b97b
JS
12279 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
12280 &portstat_reg.word0) ||
12281 lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
12282 &portsmphr)){
12283 phba->work_hs |= UNPLUG_ERR;
12284 phba->work_ha |= HA_ERATT;
12285 phba->hba_flag |= HBA_ERATT_HANDLED;
12286 return 1;
12287 }
2fcee4bf
JS
12288 if (bf_get(lpfc_sliport_status_err, &portstat_reg)) {
12289 phba->work_status[0] =
12290 readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
12291 phba->work_status[1] =
12292 readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
12293 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2e90f4b5 12294 "2885 Port Status Event: "
2fcee4bf
JS
12295 "port status reg 0x%x, "
12296 "port smphr reg 0x%x, "
12297 "error 1=0x%x, error 2=0x%x\n",
12298 portstat_reg.word0,
12299 portsmphr,
12300 phba->work_status[0],
12301 phba->work_status[1]);
12302 phba->work_ha |= HA_ERATT;
12303 phba->hba_flag |= HBA_ERATT_HANDLED;
12304 return 1;
12305 }
12306 break;
12307 case LPFC_SLI_INTF_IF_TYPE_1:
12308 default:
a747c9ce 12309 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
12310 "2886 HBA Error Attention on unsupported "
12311 "if type %d.", if_type);
a747c9ce 12312 return 1;
da0436e9 12313 }
2fcee4bf 12314
da0436e9
JS
12315 return 0;
12316}
12317
e59058c4 12318/**
3621a710 12319 * lpfc_sli_check_eratt - check error attention events
9399627f
JS
12320 * @phba: Pointer to HBA context.
12321 *
3772a991 12322 * This function is called from timer soft interrupt context to check HBA's
9399627f
JS
12323 * error attention register bit for error attention events.
12324 *
25985edc 12325 * This function returns 1 when there is Error Attention in the Host Attention
9399627f
JS
12326 * Register and returns 0 otherwise.
12327 **/
12328int
12329lpfc_sli_check_eratt(struct lpfc_hba *phba)
12330{
12331 uint32_t ha_copy;
12332
12333 /* If somebody is waiting to handle an eratt, don't process it
12334 * here. The brdkill function will do this.
12335 */
12336 if (phba->link_flag & LS_IGNORE_ERATT)
12337 return 0;
12338
12339 /* Check if interrupt handler handles this ERATT */
12340 spin_lock_irq(&phba->hbalock);
12341 if (phba->hba_flag & HBA_ERATT_HANDLED) {
12342 /* Interrupt handler has handled ERATT */
12343 spin_unlock_irq(&phba->hbalock);
12344 return 0;
12345 }
12346
a257bf90
JS
12347 /*
12348 * If there is deferred error attention, do not check for error
12349 * attention
12350 */
12351 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
12352 spin_unlock_irq(&phba->hbalock);
12353 return 0;
12354 }
12355
3772a991
JS
12356 /* If PCI channel is offline, don't process it */
12357 if (unlikely(pci_channel_offline(phba->pcidev))) {
9399627f 12358 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12359 return 0;
12360 }
12361
12362 switch (phba->sli_rev) {
12363 case LPFC_SLI_REV2:
12364 case LPFC_SLI_REV3:
12365 /* Read chip Host Attention (HA) register */
12366 ha_copy = lpfc_sli_eratt_read(phba);
12367 break;
da0436e9 12368 case LPFC_SLI_REV4:
2fcee4bf 12369 /* Read device Uncoverable Error (UERR) registers */
da0436e9
JS
12370 ha_copy = lpfc_sli4_eratt_read(phba);
12371 break;
3772a991
JS
12372 default:
12373 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12374 "0299 Invalid SLI revision (%d)\n",
12375 phba->sli_rev);
12376 ha_copy = 0;
12377 break;
9399627f
JS
12378 }
12379 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12380
12381 return ha_copy;
12382}
12383
12384/**
12385 * lpfc_intr_state_check - Check device state for interrupt handling
12386 * @phba: Pointer to HBA context.
12387 *
12388 * This inline routine checks whether a device or its PCI slot is in a state
12389 * that the interrupt should be handled.
12390 *
12391 * This function returns 0 if the device or the PCI slot is in a state that
12392 * interrupt should be handled, otherwise -EIO.
12393 */
12394static inline int
12395lpfc_intr_state_check(struct lpfc_hba *phba)
12396{
12397 /* If the pci channel is offline, ignore all the interrupts */
12398 if (unlikely(pci_channel_offline(phba->pcidev)))
12399 return -EIO;
12400
12401 /* Update device level interrupt statistics */
12402 phba->sli.slistat.sli_intr++;
12403
12404 /* Ignore all interrupts during initialization. */
12405 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
12406 return -EIO;
12407
9399627f
JS
12408 return 0;
12409}
12410
12411/**
3772a991 12412 * lpfc_sli_sp_intr_handler - Slow-path interrupt handler to SLI-3 device
e59058c4
JS
12413 * @irq: Interrupt number.
12414 * @dev_id: The device context pointer.
12415 *
9399627f 12416 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12417 * service routine when device with SLI-3 interface spec is enabled with
12418 * MSI-X multi-message interrupt mode and there are slow-path events in
12419 * the HBA. However, when the device is enabled with either MSI or Pin-IRQ
12420 * interrupt mode, this function is called as part of the device-level
12421 * interrupt handler. When the PCI slot is in error recovery or the HBA
12422 * is undergoing initialization, the interrupt handler will not process
12423 * the interrupt. The link attention and ELS ring attention events are
12424 * handled by the worker thread. The interrupt handler signals the worker
12425 * thread and returns for these events. This function is called without
12426 * any lock held. It gets the hbalock to access and update SLI data
9399627f
JS
12427 * structures.
12428 *
12429 * This function returns IRQ_HANDLED when interrupt is handled else it
12430 * returns IRQ_NONE.
e59058c4 12431 **/
dea3101e 12432irqreturn_t
3772a991 12433lpfc_sli_sp_intr_handler(int irq, void *dev_id)
dea3101e 12434{
2e0fef85 12435 struct lpfc_hba *phba;
a747c9ce 12436 uint32_t ha_copy, hc_copy;
dea3101e
JB
12437 uint32_t work_ha_copy;
12438 unsigned long status;
5b75da2f 12439 unsigned long iflag;
dea3101e
JB
12440 uint32_t control;
12441
92d7f7b0 12442 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS
12443 struct lpfc_vport *vport;
12444 struct lpfc_nodelist *ndlp;
12445 struct lpfc_dmabuf *mp;
92d7f7b0
JS
12446 LPFC_MBOXQ_t *pmb;
12447 int rc;
12448
dea3101e
JB
12449 /*
12450 * Get the driver's phba structure from the dev_id and
12451 * assume the HBA is not interrupting.
12452 */
9399627f 12453 phba = (struct lpfc_hba *)dev_id;
dea3101e
JB
12454
12455 if (unlikely(!phba))
12456 return IRQ_NONE;
12457
dea3101e 12458 /*
9399627f
JS
12459 * Stuff needs to be attented to when this function is invoked as an
12460 * individual interrupt handler in MSI-X multi-message interrupt mode
dea3101e 12461 */
9399627f 12462 if (phba->intr_type == MSIX) {
3772a991
JS
12463 /* Check device state for handling interrupt */
12464 if (lpfc_intr_state_check(phba))
9399627f
JS
12465 return IRQ_NONE;
12466 /* Need to read HA REG for slow-path events */
5b75da2f 12467 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12468 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12469 goto unplug_error;
9399627f
JS
12470 /* If somebody is waiting to handle an eratt don't process it
12471 * here. The brdkill function will do this.
12472 */
12473 if (phba->link_flag & LS_IGNORE_ERATT)
12474 ha_copy &= ~HA_ERATT;
12475 /* Check the need for handling ERATT in interrupt handler */
12476 if (ha_copy & HA_ERATT) {
12477 if (phba->hba_flag & HBA_ERATT_HANDLED)
12478 /* ERATT polling has handled ERATT */
12479 ha_copy &= ~HA_ERATT;
12480 else
12481 /* Indicate interrupt handler handles ERATT */
12482 phba->hba_flag |= HBA_ERATT_HANDLED;
12483 }
a257bf90
JS
12484
12485 /*
12486 * If there is deferred error attention, do not check for any
12487 * interrupt.
12488 */
12489 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12490 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12491 return IRQ_NONE;
12492 }
12493
9399627f 12494 /* Clear up only attention source related to slow-path */
9940b97b
JS
12495 if (lpfc_readl(phba->HCregaddr, &hc_copy))
12496 goto unplug_error;
12497
a747c9ce
JS
12498 writel(hc_copy & ~(HC_MBINT_ENA | HC_R2INT_ENA |
12499 HC_LAINT_ENA | HC_ERINT_ENA),
12500 phba->HCregaddr);
9399627f
JS
12501 writel((ha_copy & (HA_MBATT | HA_R2_CLR_MSK)),
12502 phba->HAregaddr);
a747c9ce 12503 writel(hc_copy, phba->HCregaddr);
9399627f 12504 readl(phba->HAregaddr); /* flush */
5b75da2f 12505 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12506 } else
12507 ha_copy = phba->ha_copy;
dea3101e 12508
dea3101e
JB
12509 work_ha_copy = ha_copy & phba->work_ha_mask;
12510
9399627f 12511 if (work_ha_copy) {
dea3101e
JB
12512 if (work_ha_copy & HA_LATT) {
12513 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
12514 /*
12515 * Turn off Link Attention interrupts
12516 * until CLEAR_LA done
12517 */
5b75da2f 12518 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12519 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
9940b97b
JS
12520 if (lpfc_readl(phba->HCregaddr, &control))
12521 goto unplug_error;
dea3101e
JB
12522 control &= ~HC_LAINT_ENA;
12523 writel(control, phba->HCregaddr);
12524 readl(phba->HCregaddr); /* flush */
5b75da2f 12525 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12526 }
12527 else
12528 work_ha_copy &= ~HA_LATT;
12529 }
12530
9399627f 12531 if (work_ha_copy & ~(HA_ERATT | HA_MBATT | HA_LATT)) {
858c9f6c
JS
12532 /*
12533 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
12534 * the only slow ring.
12535 */
12536 status = (work_ha_copy &
12537 (HA_RXMASK << (4*LPFC_ELS_RING)));
12538 status >>= (4*LPFC_ELS_RING);
12539 if (status & HA_RXMASK) {
5b75da2f 12540 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12541 if (lpfc_readl(phba->HCregaddr, &control))
12542 goto unplug_error;
a58cbd52
JS
12543
12544 lpfc_debugfs_slow_ring_trc(phba,
12545 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
12546 control, status,
12547 (uint32_t)phba->sli.slistat.sli_intr);
12548
858c9f6c 12549 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS
12550 lpfc_debugfs_slow_ring_trc(phba,
12551 "ISR Disable ring:"
12552 "pwork:x%x hawork:x%x wait:x%x",
12553 phba->work_ha, work_ha_copy,
12554 (uint32_t)((unsigned long)
5e9d9b82 12555 &phba->work_waitq));
a58cbd52 12556
858c9f6c
JS
12557 control &=
12558 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB
12559 writel(control, phba->HCregaddr);
12560 readl(phba->HCregaddr); /* flush */
dea3101e 12561 }
a58cbd52
JS
12562 else {
12563 lpfc_debugfs_slow_ring_trc(phba,
12564 "ISR slow ring: pwork:"
12565 "x%x hawork:x%x wait:x%x",
12566 phba->work_ha, work_ha_copy,
12567 (uint32_t)((unsigned long)
5e9d9b82 12568 &phba->work_waitq));
a58cbd52 12569 }
5b75da2f 12570 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12571 }
12572 }
5b75da2f 12573 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90 12574 if (work_ha_copy & HA_ERATT) {
9940b97b
JS
12575 if (lpfc_sli_read_hs(phba))
12576 goto unplug_error;
a257bf90
JS
12577 /*
12578 * Check if there is a deferred error condition
12579 * is active
12580 */
12581 if ((HS_FFER1 & phba->work_hs) &&
12582 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0
JS
12583 HS_FFER6 | HS_FFER7 | HS_FFER8) &
12584 phba->work_hs)) {
a257bf90
JS
12585 phba->hba_flag |= DEFER_ERATT;
12586 /* Clear all interrupt enable conditions */
12587 writel(0, phba->HCregaddr);
12588 readl(phba->HCregaddr);
12589 }
12590 }
12591
9399627f 12592 if ((work_ha_copy & HA_MBATT) && (phba->sli.mbox_active)) {
92d7f7b0 12593 pmb = phba->sli.mbox_active;
04c68496 12594 pmbox = &pmb->u.mb;
34b02dcd 12595 mbox = phba->mbox;
858c9f6c 12596 vport = pmb->vport;
92d7f7b0
JS
12597
12598 /* First check out the status word */
12599 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
12600 if (pmbox->mbxOwner != OWN_HOST) {
5b75da2f 12601 spin_unlock_irqrestore(&phba->hbalock, iflag);
92d7f7b0
JS
12602 /*
12603 * Stray Mailbox Interrupt, mbxCommand <cmd>
12604 * mbxStatus <status>
12605 */
09372820 12606 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
92d7f7b0 12607 LOG_SLI,
e8b62011 12608 "(%d):0304 Stray Mailbox "
92d7f7b0
JS
12609 "Interrupt mbxCommand x%x "
12610 "mbxStatus x%x\n",
e8b62011 12611 (vport ? vport->vpi : 0),
92d7f7b0
JS
12612 pmbox->mbxCommand,
12613 pmbox->mbxStatus);
09372820
JS
12614 /* clear mailbox attention bit */
12615 work_ha_copy &= ~HA_MBATT;
12616 } else {
97eab634 12617 phba->sli.mbox_active = NULL;
5b75da2f 12618 spin_unlock_irqrestore(&phba->hbalock, iflag);
09372820
JS
12619 phba->last_completion_time = jiffies;
12620 del_timer(&phba->sli.mbox_tmo);
09372820
JS
12621 if (pmb->mbox_cmpl) {
12622 lpfc_sli_pcimem_bcopy(mbox, pmbox,
12623 MAILBOX_CMD_SIZE);
7a470277 12624 if (pmb->out_ext_byte_len &&
3e1f0718 12625 pmb->ctx_buf)
7a470277
JS
12626 lpfc_sli_pcimem_bcopy(
12627 phba->mbox_ext,
3e1f0718 12628 pmb->ctx_buf,
7a470277 12629 pmb->out_ext_byte_len);
09372820
JS
12630 }
12631 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
12632 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
12633
12634 lpfc_debugfs_disc_trc(vport,
12635 LPFC_DISC_TRC_MBOX_VPORT,
12636 "MBOX dflt rpi: : "
12637 "status:x%x rpi:x%x",
12638 (uint32_t)pmbox->mbxStatus,
12639 pmbox->un.varWords[0], 0);
12640
12641 if (!pmbox->mbxStatus) {
12642 mp = (struct lpfc_dmabuf *)
3e1f0718 12643 (pmb->ctx_buf);
09372820 12644 ndlp = (struct lpfc_nodelist *)
3e1f0718 12645 pmb->ctx_ndlp;
09372820
JS
12646
12647 /* Reg_LOGIN of dflt RPI was
12648 * successful. new lets get
12649 * rid of the RPI using the
12650 * same mbox buffer.
12651 */
12652 lpfc_unreg_login(phba,
12653 vport->vpi,
12654 pmbox->un.varWords[0],
12655 pmb);
12656 pmb->mbox_cmpl =
12657 lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
12658 pmb->ctx_buf = mp;
12659 pmb->ctx_ndlp = ndlp;
09372820 12660 pmb->vport = vport;
58da1ffb
JS
12661 rc = lpfc_sli_issue_mbox(phba,
12662 pmb,
12663 MBX_NOWAIT);
12664 if (rc != MBX_BUSY)
12665 lpfc_printf_log(phba,
12666 KERN_ERR,
12667 LOG_MBOX | LOG_SLI,
d7c255b2 12668 "0350 rc should have"
6a9c52cf 12669 "been MBX_BUSY\n");
3772a991
JS
12670 if (rc != MBX_NOT_FINISHED)
12671 goto send_current_mbox;
09372820 12672 }
858c9f6c 12673 }
5b75da2f
JS
12674 spin_lock_irqsave(
12675 &phba->pport->work_port_lock,
12676 iflag);
09372820
JS
12677 phba->pport->work_port_events &=
12678 ~WORKER_MBOX_TMO;
5b75da2f
JS
12679 spin_unlock_irqrestore(
12680 &phba->pport->work_port_lock,
12681 iflag);
09372820 12682 lpfc_mbox_cmpl_put(phba, pmb);
858c9f6c 12683 }
97eab634 12684 } else
5b75da2f 12685 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f 12686
92d7f7b0
JS
12687 if ((work_ha_copy & HA_MBATT) &&
12688 (phba->sli.mbox_active == NULL)) {
858c9f6c 12689send_current_mbox:
92d7f7b0 12690 /* Process next mailbox command if there is one */
58da1ffb
JS
12691 do {
12692 rc = lpfc_sli_issue_mbox(phba, NULL,
12693 MBX_NOWAIT);
12694 } while (rc == MBX_NOT_FINISHED);
12695 if (rc != MBX_SUCCESS)
12696 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
12697 LOG_SLI, "0349 rc should be "
6a9c52cf 12698 "MBX_SUCCESS\n");
92d7f7b0
JS
12699 }
12700
5b75da2f 12701 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12702 phba->work_ha |= work_ha_copy;
5b75da2f 12703 spin_unlock_irqrestore(&phba->hbalock, iflag);
5e9d9b82 12704 lpfc_worker_wake_up(phba);
dea3101e 12705 }
9399627f 12706 return IRQ_HANDLED;
9940b97b
JS
12707unplug_error:
12708 spin_unlock_irqrestore(&phba->hbalock, iflag);
12709 return IRQ_HANDLED;
dea3101e 12710
3772a991 12711} /* lpfc_sli_sp_intr_handler */
9399627f
JS
12712
12713/**
3772a991 12714 * lpfc_sli_fp_intr_handler - Fast-path interrupt handler to SLI-3 device.
9399627f
JS
12715 * @irq: Interrupt number.
12716 * @dev_id: The device context pointer.
12717 *
12718 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12719 * service routine when device with SLI-3 interface spec is enabled with
12720 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
12721 * ring event in the HBA. However, when the device is enabled with either
12722 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
12723 * device-level interrupt handler. When the PCI slot is in error recovery
12724 * or the HBA is undergoing initialization, the interrupt handler will not
12725 * process the interrupt. The SCSI FCP fast-path ring event are handled in
12726 * the intrrupt context. This function is called without any lock held.
12727 * It gets the hbalock to access and update SLI data structures.
9399627f
JS
12728 *
12729 * This function returns IRQ_HANDLED when interrupt is handled else it
12730 * returns IRQ_NONE.
12731 **/
12732irqreturn_t
3772a991 12733lpfc_sli_fp_intr_handler(int irq, void *dev_id)
9399627f
JS
12734{
12735 struct lpfc_hba *phba;
12736 uint32_t ha_copy;
12737 unsigned long status;
5b75da2f 12738 unsigned long iflag;
895427bd 12739 struct lpfc_sli_ring *pring;
9399627f
JS
12740
12741 /* Get the driver's phba structure from the dev_id and
12742 * assume the HBA is not interrupting.
12743 */
12744 phba = (struct lpfc_hba *) dev_id;
12745
12746 if (unlikely(!phba))
12747 return IRQ_NONE;
12748
12749 /*
12750 * Stuff needs to be attented to when this function is invoked as an
12751 * individual interrupt handler in MSI-X multi-message interrupt mode
12752 */
12753 if (phba->intr_type == MSIX) {
3772a991
JS
12754 /* Check device state for handling interrupt */
12755 if (lpfc_intr_state_check(phba))
9399627f
JS
12756 return IRQ_NONE;
12757 /* Need to read HA REG for FCP ring and other ring events */
9940b97b
JS
12758 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12759 return IRQ_HANDLED;
9399627f 12760 /* Clear up only attention source related to fast-path */
5b75da2f 12761 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90
JS
12762 /*
12763 * If there is deferred error attention, do not check for
12764 * any interrupt.
12765 */
12766 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12767 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12768 return IRQ_NONE;
12769 }
9399627f
JS
12770 writel((ha_copy & (HA_R0_CLR_MSK | HA_R1_CLR_MSK)),
12771 phba->HAregaddr);
12772 readl(phba->HAregaddr); /* flush */
5b75da2f 12773 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12774 } else
12775 ha_copy = phba->ha_copy;
dea3101e
JB
12776
12777 /*
9399627f 12778 * Process all events on FCP ring. Take the optimized path for FCP IO.
dea3101e 12779 */
9399627f
JS
12780 ha_copy &= ~(phba->work_ha_mask);
12781
12782 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
dea3101e 12783 status >>= (4*LPFC_FCP_RING);
895427bd 12784 pring = &phba->sli.sli3_ring[LPFC_FCP_RING];
858c9f6c 12785 if (status & HA_RXMASK)
895427bd 12786 lpfc_sli_handle_fast_ring_event(phba, pring, status);
a4bc3379
JS
12787
12788 if (phba->cfg_multi_ring_support == 2) {
12789 /*
9399627f
JS
12790 * Process all events on extra ring. Take the optimized path
12791 * for extra ring IO.
a4bc3379 12792 */
9399627f 12793 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
a4bc3379 12794 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 12795 if (status & HA_RXMASK) {
a4bc3379 12796 lpfc_sli_handle_fast_ring_event(phba,
895427bd 12797 &phba->sli.sli3_ring[LPFC_EXTRA_RING],
a4bc3379
JS
12798 status);
12799 }
12800 }
dea3101e 12801 return IRQ_HANDLED;
3772a991 12802} /* lpfc_sli_fp_intr_handler */
9399627f
JS
12803
12804/**
3772a991 12805 * lpfc_sli_intr_handler - Device-level interrupt handler to SLI-3 device
9399627f
JS
12806 * @irq: Interrupt number.
12807 * @dev_id: The device context pointer.
12808 *
3772a991
JS
12809 * This function is the HBA device-level interrupt handler to device with
12810 * SLI-3 interface spec, called from the PCI layer when either MSI or
12811 * Pin-IRQ interrupt mode is enabled and there is an event in the HBA which
12812 * requires driver attention. This function invokes the slow-path interrupt
12813 * attention handling function and fast-path interrupt attention handling
12814 * function in turn to process the relevant HBA attention events. This
12815 * function is called without any lock held. It gets the hbalock to access
12816 * and update SLI data structures.
9399627f
JS
12817 *
12818 * This function returns IRQ_HANDLED when interrupt is handled, else it
12819 * returns IRQ_NONE.
12820 **/
12821irqreturn_t
3772a991 12822lpfc_sli_intr_handler(int irq, void *dev_id)
9399627f
JS
12823{
12824 struct lpfc_hba *phba;
12825 irqreturn_t sp_irq_rc, fp_irq_rc;
12826 unsigned long status1, status2;
a747c9ce 12827 uint32_t hc_copy;
9399627f
JS
12828
12829 /*
12830 * Get the driver's phba structure from the dev_id and
12831 * assume the HBA is not interrupting.
12832 */
12833 phba = (struct lpfc_hba *) dev_id;
12834
12835 if (unlikely(!phba))
12836 return IRQ_NONE;
12837
3772a991
JS
12838 /* Check device state for handling interrupt */
12839 if (lpfc_intr_state_check(phba))
9399627f
JS
12840 return IRQ_NONE;
12841
12842 spin_lock(&phba->hbalock);
9940b97b
JS
12843 if (lpfc_readl(phba->HAregaddr, &phba->ha_copy)) {
12844 spin_unlock(&phba->hbalock);
12845 return IRQ_HANDLED;
12846 }
12847
9399627f
JS
12848 if (unlikely(!phba->ha_copy)) {
12849 spin_unlock(&phba->hbalock);
12850 return IRQ_NONE;
12851 } else if (phba->ha_copy & HA_ERATT) {
12852 if (phba->hba_flag & HBA_ERATT_HANDLED)
12853 /* ERATT polling has handled ERATT */
12854 phba->ha_copy &= ~HA_ERATT;
12855 else
12856 /* Indicate interrupt handler handles ERATT */
12857 phba->hba_flag |= HBA_ERATT_HANDLED;
12858 }
12859
a257bf90
JS
12860 /*
12861 * If there is deferred error attention, do not check for any interrupt.
12862 */
12863 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
ec21b3b0 12864 spin_unlock(&phba->hbalock);
a257bf90
JS
12865 return IRQ_NONE;
12866 }
12867
9399627f 12868 /* Clear attention sources except link and error attentions */
9940b97b
JS
12869 if (lpfc_readl(phba->HCregaddr, &hc_copy)) {
12870 spin_unlock(&phba->hbalock);
12871 return IRQ_HANDLED;
12872 }
a747c9ce
JS
12873 writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA
12874 | HC_R2INT_ENA | HC_LAINT_ENA | HC_ERINT_ENA),
12875 phba->HCregaddr);
9399627f 12876 writel((phba->ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
a747c9ce 12877 writel(hc_copy, phba->HCregaddr);
9399627f
JS
12878 readl(phba->HAregaddr); /* flush */
12879 spin_unlock(&phba->hbalock);
12880
12881 /*
12882 * Invokes slow-path host attention interrupt handling as appropriate.
12883 */
12884
12885 /* status of events with mailbox and link attention */
12886 status1 = phba->ha_copy & (HA_MBATT | HA_LATT | HA_ERATT);
12887
12888 /* status of events with ELS ring */
12889 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_ELS_RING)));
12890 status2 >>= (4*LPFC_ELS_RING);
12891
12892 if (status1 || (status2 & HA_RXMASK))
3772a991 12893 sp_irq_rc = lpfc_sli_sp_intr_handler(irq, dev_id);
9399627f
JS
12894 else
12895 sp_irq_rc = IRQ_NONE;
12896
12897 /*
12898 * Invoke fast-path host attention interrupt handling as appropriate.
12899 */
12900
12901 /* status of events with FCP ring */
12902 status1 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
12903 status1 >>= (4*LPFC_FCP_RING);
12904
12905 /* status of events with extra ring */
12906 if (phba->cfg_multi_ring_support == 2) {
12907 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
12908 status2 >>= (4*LPFC_EXTRA_RING);
12909 } else
12910 status2 = 0;
12911
12912 if ((status1 & HA_RXMASK) || (status2 & HA_RXMASK))
3772a991 12913 fp_irq_rc = lpfc_sli_fp_intr_handler(irq, dev_id);
9399627f
JS
12914 else
12915 fp_irq_rc = IRQ_NONE;
dea3101e 12916
9399627f
JS
12917 /* Return device-level interrupt handling status */
12918 return (sp_irq_rc == IRQ_HANDLED) ? sp_irq_rc : fp_irq_rc;
3772a991 12919} /* lpfc_sli_intr_handler */
4f774513
JS
12920
12921/**
12922 * lpfc_sli4_fcp_xri_abort_event_proc - Process fcp xri abort event
12923 * @phba: pointer to lpfc hba data structure.
12924 *
12925 * This routine is invoked by the worker thread to process all the pending
12926 * SLI4 FCP abort XRI events.
12927 **/
12928void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *phba)
12929{
12930 struct lpfc_cq_event *cq_event;
12931
12932 /* First, declare the fcp xri abort event has been handled */
12933 spin_lock_irq(&phba->hbalock);
12934 phba->hba_flag &= ~FCP_XRI_ABORT_EVENT;
12935 spin_unlock_irq(&phba->hbalock);
12936 /* Now, handle all the fcp xri abort events */
12937 while (!list_empty(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue)) {
12938 /* Get the first event from the head of the event queue */
12939 spin_lock_irq(&phba->hbalock);
12940 list_remove_head(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
12941 cq_event, struct lpfc_cq_event, list);
12942 spin_unlock_irq(&phba->hbalock);
12943 /* Notify aborted XRI for FCP work queue */
12944 lpfc_sli4_fcp_xri_aborted(phba, &cq_event->cqe.wcqe_axri);
12945 /* Free the event processed back to the free pool */
12946 lpfc_sli4_cq_event_release(phba, cq_event);
12947 }
12948}
12949
12950/**
12951 * lpfc_sli4_els_xri_abort_event_proc - Process els xri abort event
12952 * @phba: pointer to lpfc hba data structure.
12953 *
12954 * This routine is invoked by the worker thread to process all the pending
12955 * SLI4 els abort xri events.
12956 **/
12957void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *phba)
12958{
12959 struct lpfc_cq_event *cq_event;
12960
12961 /* First, declare the els xri abort event has been handled */
12962 spin_lock_irq(&phba->hbalock);
12963 phba->hba_flag &= ~ELS_XRI_ABORT_EVENT;
12964 spin_unlock_irq(&phba->hbalock);
12965 /* Now, handle all the els xri abort events */
12966 while (!list_empty(&phba->sli4_hba.sp_els_xri_aborted_work_queue)) {
12967 /* Get the first event from the head of the event queue */
12968 spin_lock_irq(&phba->hbalock);
12969 list_remove_head(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
12970 cq_event, struct lpfc_cq_event, list);
12971 spin_unlock_irq(&phba->hbalock);
12972 /* Notify aborted XRI for ELS work queue */
12973 lpfc_sli4_els_xri_aborted(phba, &cq_event->cqe.wcqe_axri);
12974 /* Free the event processed back to the free pool */
12975 lpfc_sli4_cq_event_release(phba, cq_event);
12976 }
12977}
12978
341af102
JS
12979/**
12980 * lpfc_sli4_iocb_param_transfer - Transfer pIocbOut and cmpl status to pIocbIn
12981 * @phba: pointer to lpfc hba data structure
12982 * @pIocbIn: pointer to the rspiocbq
12983 * @pIocbOut: pointer to the cmdiocbq
12984 * @wcqe: pointer to the complete wcqe
12985 *
12986 * This routine transfers the fields of a command iocbq to a response iocbq
12987 * by copying all the IOCB fields from command iocbq and transferring the
12988 * completion status information from the complete wcqe.
12989 **/
4f774513 12990static void
341af102
JS
12991lpfc_sli4_iocb_param_transfer(struct lpfc_hba *phba,
12992 struct lpfc_iocbq *pIocbIn,
4f774513
JS
12993 struct lpfc_iocbq *pIocbOut,
12994 struct lpfc_wcqe_complete *wcqe)
12995{
af22741c 12996 int numBdes, i;
341af102 12997 unsigned long iflags;
af22741c
JS
12998 uint32_t status, max_response;
12999 struct lpfc_dmabuf *dmabuf;
13000 struct ulp_bde64 *bpl, bde;
4f774513
JS
13001 size_t offset = offsetof(struct lpfc_iocbq, iocb);
13002
13003 memcpy((char *)pIocbIn + offset, (char *)pIocbOut + offset,
13004 sizeof(struct lpfc_iocbq) - offset);
4f774513 13005 /* Map WCQE parameters into irspiocb parameters */
acd6859b
JS
13006 status = bf_get(lpfc_wcqe_c_status, wcqe);
13007 pIocbIn->iocb.ulpStatus = (status & LPFC_IOCB_STATUS_MASK);
4f774513
JS
13008 if (pIocbOut->iocb_flag & LPFC_IO_FCP)
13009 if (pIocbIn->iocb.ulpStatus == IOSTAT_FCP_RSP_ERROR)
13010 pIocbIn->iocb.un.fcpi.fcpi_parm =
13011 pIocbOut->iocb.un.fcpi.fcpi_parm -
13012 wcqe->total_data_placed;
13013 else
13014 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
695a814e 13015 else {
4f774513 13016 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
af22741c
JS
13017 switch (pIocbOut->iocb.ulpCommand) {
13018 case CMD_ELS_REQUEST64_CR:
13019 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
13020 bpl = (struct ulp_bde64 *)dmabuf->virt;
13021 bde.tus.w = le32_to_cpu(bpl[1].tus.w);
13022 max_response = bde.tus.f.bdeSize;
13023 break;
13024 case CMD_GEN_REQUEST64_CR:
13025 max_response = 0;
13026 if (!pIocbOut->context3)
13027 break;
13028 numBdes = pIocbOut->iocb.un.genreq64.bdl.bdeSize/
13029 sizeof(struct ulp_bde64);
13030 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
13031 bpl = (struct ulp_bde64 *)dmabuf->virt;
13032 for (i = 0; i < numBdes; i++) {
13033 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
13034 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
13035 max_response += bde.tus.f.bdeSize;
13036 }
13037 break;
13038 default:
13039 max_response = wcqe->total_data_placed;
13040 break;
13041 }
13042 if (max_response < wcqe->total_data_placed)
13043 pIocbIn->iocb.un.genreq64.bdl.bdeSize = max_response;
13044 else
13045 pIocbIn->iocb.un.genreq64.bdl.bdeSize =
13046 wcqe->total_data_placed;
695a814e 13047 }
341af102 13048
acd6859b
JS
13049 /* Convert BG errors for completion status */
13050 if (status == CQE_STATUS_DI_ERROR) {
13051 pIocbIn->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
13052
13053 if (bf_get(lpfc_wcqe_c_bg_edir, wcqe))
13054 pIocbIn->iocb.un.ulpWord[4] = IOERR_RX_DMA_FAILED;
13055 else
13056 pIocbIn->iocb.un.ulpWord[4] = IOERR_TX_DMA_FAILED;
13057
13058 pIocbIn->iocb.unsli3.sli3_bg.bgstat = 0;
13059 if (bf_get(lpfc_wcqe_c_bg_ge, wcqe)) /* Guard Check failed */
13060 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13061 BGS_GUARD_ERR_MASK;
13062 if (bf_get(lpfc_wcqe_c_bg_ae, wcqe)) /* App Tag Check failed */
13063 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13064 BGS_APPTAG_ERR_MASK;
13065 if (bf_get(lpfc_wcqe_c_bg_re, wcqe)) /* Ref Tag Check failed */
13066 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13067 BGS_REFTAG_ERR_MASK;
13068
13069 /* Check to see if there was any good data before the error */
13070 if (bf_get(lpfc_wcqe_c_bg_tdpv, wcqe)) {
13071 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13072 BGS_HI_WATER_MARK_PRESENT_MASK;
13073 pIocbIn->iocb.unsli3.sli3_bg.bghm =
13074 wcqe->total_data_placed;
13075 }
13076
13077 /*
13078 * Set ALL the error bits to indicate we don't know what
13079 * type of error it is.
13080 */
13081 if (!pIocbIn->iocb.unsli3.sli3_bg.bgstat)
13082 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13083 (BGS_REFTAG_ERR_MASK | BGS_APPTAG_ERR_MASK |
13084 BGS_GUARD_ERR_MASK);
13085 }
13086
341af102
JS
13087 /* Pick up HBA exchange busy condition */
13088 if (bf_get(lpfc_wcqe_c_xb, wcqe)) {
13089 spin_lock_irqsave(&phba->hbalock, iflags);
13090 pIocbIn->iocb_flag |= LPFC_EXCHANGE_BUSY;
13091 spin_unlock_irqrestore(&phba->hbalock, iflags);
13092 }
4f774513
JS
13093}
13094
45ed1190
JS
13095/**
13096 * lpfc_sli4_els_wcqe_to_rspiocbq - Get response iocbq from els wcqe
13097 * @phba: Pointer to HBA context object.
13098 * @wcqe: Pointer to work-queue completion queue entry.
13099 *
13100 * This routine handles an ELS work-queue completion event and construct
13101 * a pseudo response ELS IODBQ from the SLI4 ELS WCQE for the common
13102 * discovery engine to handle.
13103 *
13104 * Return: Pointer to the receive IOCBQ, NULL otherwise.
13105 **/
13106static struct lpfc_iocbq *
13107lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *phba,
13108 struct lpfc_iocbq *irspiocbq)
13109{
895427bd 13110 struct lpfc_sli_ring *pring;
45ed1190
JS
13111 struct lpfc_iocbq *cmdiocbq;
13112 struct lpfc_wcqe_complete *wcqe;
13113 unsigned long iflags;
13114
895427bd 13115 pring = lpfc_phba_elsring(phba);
1234a6d5
DK
13116 if (unlikely(!pring))
13117 return NULL;
895427bd 13118
45ed1190 13119 wcqe = &irspiocbq->cq_event.cqe.wcqe_cmpl;
7e56aa25 13120 spin_lock_irqsave(&pring->ring_lock, iflags);
45ed1190
JS
13121 pring->stats.iocb_event++;
13122 /* Look up the ELS command IOCB and create pseudo response IOCB */
13123 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13124 bf_get(lpfc_wcqe_c_request_tag, wcqe));
45ed1190 13125 if (unlikely(!cmdiocbq)) {
401bb416 13126 spin_unlock_irqrestore(&pring->ring_lock, iflags);
45ed1190
JS
13127 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13128 "0386 ELS complete with no corresponding "
401bb416
DK
13129 "cmdiocb: 0x%x 0x%x 0x%x 0x%x\n",
13130 wcqe->word0, wcqe->total_data_placed,
13131 wcqe->parameter, wcqe->word3);
45ed1190
JS
13132 lpfc_sli_release_iocbq(phba, irspiocbq);
13133 return NULL;
13134 }
13135
401bb416
DK
13136 /* Put the iocb back on the txcmplq */
13137 lpfc_sli_ringtxcmpl_put(phba, pring, cmdiocbq);
13138 spin_unlock_irqrestore(&pring->ring_lock, iflags);
13139
45ed1190 13140 /* Fake the irspiocbq and copy necessary response information */
341af102 13141 lpfc_sli4_iocb_param_transfer(phba, irspiocbq, cmdiocbq, wcqe);
45ed1190
JS
13142
13143 return irspiocbq;
13144}
13145
8a5ca109
JS
13146inline struct lpfc_cq_event *
13147lpfc_cq_event_setup(struct lpfc_hba *phba, void *entry, int size)
13148{
13149 struct lpfc_cq_event *cq_event;
13150
13151 /* Allocate a new internal CQ_EVENT entry */
13152 cq_event = lpfc_sli4_cq_event_alloc(phba);
13153 if (!cq_event) {
13154 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13155 "0602 Failed to alloc CQ_EVENT entry\n");
13156 return NULL;
13157 }
13158
13159 /* Move the CQE into the event */
13160 memcpy(&cq_event->cqe, entry, size);
13161 return cq_event;
13162}
13163
04c68496
JS
13164/**
13165 * lpfc_sli4_sp_handle_async_event - Handle an asynchroous event
13166 * @phba: Pointer to HBA context object.
13167 * @cqe: Pointer to mailbox completion queue entry.
13168 *
13169 * This routine process a mailbox completion queue entry with asynchrous
13170 * event.
13171 *
13172 * Return: true if work posted to worker thread, otherwise false.
13173 **/
13174static bool
13175lpfc_sli4_sp_handle_async_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13176{
13177 struct lpfc_cq_event *cq_event;
13178 unsigned long iflags;
13179
13180 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13181 "0392 Async Event: word0:x%x, word1:x%x, "
13182 "word2:x%x, word3:x%x\n", mcqe->word0,
13183 mcqe->mcqe_tag0, mcqe->mcqe_tag1, mcqe->trailer);
13184
8a5ca109
JS
13185 cq_event = lpfc_cq_event_setup(phba, mcqe, sizeof(struct lpfc_mcqe));
13186 if (!cq_event)
04c68496 13187 return false;
04c68496
JS
13188 spin_lock_irqsave(&phba->hbalock, iflags);
13189 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_asynce_work_queue);
13190 /* Set the async event flag */
13191 phba->hba_flag |= ASYNC_EVENT;
13192 spin_unlock_irqrestore(&phba->hbalock, iflags);
13193
13194 return true;
13195}
13196
13197/**
13198 * lpfc_sli4_sp_handle_mbox_event - Handle a mailbox completion event
13199 * @phba: Pointer to HBA context object.
13200 * @cqe: Pointer to mailbox completion queue entry.
13201 *
13202 * This routine process a mailbox completion queue entry with mailbox
13203 * completion event.
13204 *
13205 * Return: true if work posted to worker thread, otherwise false.
13206 **/
13207static bool
13208lpfc_sli4_sp_handle_mbox_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13209{
13210 uint32_t mcqe_status;
13211 MAILBOX_t *mbox, *pmbox;
13212 struct lpfc_mqe *mqe;
13213 struct lpfc_vport *vport;
13214 struct lpfc_nodelist *ndlp;
13215 struct lpfc_dmabuf *mp;
13216 unsigned long iflags;
13217 LPFC_MBOXQ_t *pmb;
13218 bool workposted = false;
13219 int rc;
13220
13221 /* If not a mailbox complete MCQE, out by checking mailbox consume */
13222 if (!bf_get(lpfc_trailer_completed, mcqe))
13223 goto out_no_mqe_complete;
13224
13225 /* Get the reference to the active mbox command */
13226 spin_lock_irqsave(&phba->hbalock, iflags);
13227 pmb = phba->sli.mbox_active;
13228 if (unlikely(!pmb)) {
13229 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13230 "1832 No pending MBOX command to handle\n");
13231 spin_unlock_irqrestore(&phba->hbalock, iflags);
13232 goto out_no_mqe_complete;
13233 }
13234 spin_unlock_irqrestore(&phba->hbalock, iflags);
13235 mqe = &pmb->u.mqe;
13236 pmbox = (MAILBOX_t *)&pmb->u.mqe;
13237 mbox = phba->mbox;
13238 vport = pmb->vport;
13239
13240 /* Reset heartbeat timer */
13241 phba->last_completion_time = jiffies;
13242 del_timer(&phba->sli.mbox_tmo);
13243
13244 /* Move mbox data to caller's mailbox region, do endian swapping */
13245 if (pmb->mbox_cmpl && mbox)
48f8fdb4 13246 lpfc_sli4_pcimem_bcopy(mbox, mqe, sizeof(struct lpfc_mqe));
04c68496 13247
73d91e50
JS
13248 /*
13249 * For mcqe errors, conditionally move a modified error code to
13250 * the mbox so that the error will not be missed.
13251 */
13252 mcqe_status = bf_get(lpfc_mcqe_status, mcqe);
13253 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
13254 if (bf_get(lpfc_mqe_status, mqe) == MBX_SUCCESS)
13255 bf_set(lpfc_mqe_status, mqe,
13256 (LPFC_MBX_ERROR_RANGE | mcqe_status));
13257 }
04c68496
JS
13258 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
13259 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
13260 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_MBOX_VPORT,
13261 "MBOX dflt rpi: status:x%x rpi:x%x",
13262 mcqe_status,
13263 pmbox->un.varWords[0], 0);
13264 if (mcqe_status == MB_CQE_STATUS_SUCCESS) {
3e1f0718
JS
13265 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
13266 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
04c68496
JS
13267 /* Reg_LOGIN of dflt RPI was successful. Now lets get
13268 * RID of the PPI using the same mbox buffer.
13269 */
13270 lpfc_unreg_login(phba, vport->vpi,
13271 pmbox->un.varWords[0], pmb);
13272 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
13273 pmb->ctx_buf = mp;
13274 pmb->ctx_ndlp = ndlp;
04c68496
JS
13275 pmb->vport = vport;
13276 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
13277 if (rc != MBX_BUSY)
13278 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
13279 LOG_SLI, "0385 rc should "
13280 "have been MBX_BUSY\n");
13281 if (rc != MBX_NOT_FINISHED)
13282 goto send_current_mbox;
13283 }
13284 }
13285 spin_lock_irqsave(&phba->pport->work_port_lock, iflags);
13286 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
13287 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflags);
13288
13289 /* There is mailbox completion work to do */
13290 spin_lock_irqsave(&phba->hbalock, iflags);
13291 __lpfc_mbox_cmpl_put(phba, pmb);
13292 phba->work_ha |= HA_MBATT;
13293 spin_unlock_irqrestore(&phba->hbalock, iflags);
13294 workposted = true;
13295
13296send_current_mbox:
13297 spin_lock_irqsave(&phba->hbalock, iflags);
13298 /* Release the mailbox command posting token */
13299 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13300 /* Setting active mailbox pointer need to be in sync to flag clear */
13301 phba->sli.mbox_active = NULL;
13302 spin_unlock_irqrestore(&phba->hbalock, iflags);
13303 /* Wake up worker thread to post the next pending mailbox command */
13304 lpfc_worker_wake_up(phba);
13305out_no_mqe_complete:
13306 if (bf_get(lpfc_trailer_consumed, mcqe))
13307 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
13308 return workposted;
13309}
13310
13311/**
13312 * lpfc_sli4_sp_handle_mcqe - Process a mailbox completion queue entry
13313 * @phba: Pointer to HBA context object.
13314 * @cqe: Pointer to mailbox completion queue entry.
13315 *
13316 * This routine process a mailbox completion queue entry, it invokes the
13317 * proper mailbox complete handling or asynchrous event handling routine
13318 * according to the MCQE's async bit.
13319 *
13320 * Return: true if work posted to worker thread, otherwise false.
13321 **/
13322static bool
13323lpfc_sli4_sp_handle_mcqe(struct lpfc_hba *phba, struct lpfc_cqe *cqe)
13324{
13325 struct lpfc_mcqe mcqe;
13326 bool workposted;
13327
13328 /* Copy the mailbox MCQE and convert endian order as needed */
48f8fdb4 13329 lpfc_sli4_pcimem_bcopy(cqe, &mcqe, sizeof(struct lpfc_mcqe));
04c68496
JS
13330
13331 /* Invoke the proper event handling routine */
13332 if (!bf_get(lpfc_trailer_async, &mcqe))
13333 workposted = lpfc_sli4_sp_handle_mbox_event(phba, &mcqe);
13334 else
13335 workposted = lpfc_sli4_sp_handle_async_event(phba, &mcqe);
13336 return workposted;
13337}
13338
4f774513
JS
13339/**
13340 * lpfc_sli4_sp_handle_els_wcqe - Handle els work-queue completion event
13341 * @phba: Pointer to HBA context object.
2a76a283 13342 * @cq: Pointer to associated CQ
4f774513
JS
13343 * @wcqe: Pointer to work-queue completion queue entry.
13344 *
13345 * This routine handles an ELS work-queue completion event.
13346 *
13347 * Return: true if work posted to worker thread, otherwise false.
13348 **/
13349static bool
2a76a283 13350lpfc_sli4_sp_handle_els_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13351 struct lpfc_wcqe_complete *wcqe)
13352{
4f774513
JS
13353 struct lpfc_iocbq *irspiocbq;
13354 unsigned long iflags;
2a76a283 13355 struct lpfc_sli_ring *pring = cq->pring;
0e9bb8d7
JS
13356 int txq_cnt = 0;
13357 int txcmplq_cnt = 0;
13358 int fcp_txcmplq_cnt = 0;
4f774513 13359
11f0e34f
JS
13360 /* Check for response status */
13361 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13362 /* Log the error status */
13363 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13364 "0357 ELS CQE error: status=x%x: "
13365 "CQE: %08x %08x %08x %08x\n",
13366 bf_get(lpfc_wcqe_c_status, wcqe),
13367 wcqe->word0, wcqe->total_data_placed,
13368 wcqe->parameter, wcqe->word3);
13369 }
13370
45ed1190 13371 /* Get an irspiocbq for later ELS response processing use */
4f774513
JS
13372 irspiocbq = lpfc_sli_get_iocbq(phba);
13373 if (!irspiocbq) {
0e9bb8d7
JS
13374 if (!list_empty(&pring->txq))
13375 txq_cnt++;
13376 if (!list_empty(&pring->txcmplq))
13377 txcmplq_cnt++;
4f774513 13378 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2a9bf3d0
JS
13379 "0387 NO IOCBQ data: txq_cnt=%d iocb_cnt=%d "
13380 "fcp_txcmplq_cnt=%d, els_txcmplq_cnt=%d\n",
0e9bb8d7
JS
13381 txq_cnt, phba->iocb_cnt,
13382 fcp_txcmplq_cnt,
13383 txcmplq_cnt);
45ed1190 13384 return false;
4f774513 13385 }
4f774513 13386
45ed1190
JS
13387 /* Save off the slow-path queue event for work thread to process */
13388 memcpy(&irspiocbq->cq_event.cqe.wcqe_cmpl, wcqe, sizeof(*wcqe));
4f774513 13389 spin_lock_irqsave(&phba->hbalock, iflags);
4d9ab994 13390 list_add_tail(&irspiocbq->cq_event.list,
45ed1190
JS
13391 &phba->sli4_hba.sp_queue_event);
13392 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513 13393 spin_unlock_irqrestore(&phba->hbalock, iflags);
4f774513 13394
45ed1190 13395 return true;
4f774513
JS
13396}
13397
13398/**
13399 * lpfc_sli4_sp_handle_rel_wcqe - Handle slow-path WQ entry consumed event
13400 * @phba: Pointer to HBA context object.
13401 * @wcqe: Pointer to work-queue completion queue entry.
13402 *
3f8b6fb7 13403 * This routine handles slow-path WQ entry consumed event by invoking the
4f774513
JS
13404 * proper WQ release routine to the slow-path WQ.
13405 **/
13406static void
13407lpfc_sli4_sp_handle_rel_wcqe(struct lpfc_hba *phba,
13408 struct lpfc_wcqe_release *wcqe)
13409{
2e90f4b5
JS
13410 /* sanity check on queue memory */
13411 if (unlikely(!phba->sli4_hba.els_wq))
13412 return;
4f774513
JS
13413 /* Check for the slow-path ELS work queue */
13414 if (bf_get(lpfc_wcqe_r_wq_id, wcqe) == phba->sli4_hba.els_wq->queue_id)
13415 lpfc_sli4_wq_release(phba->sli4_hba.els_wq,
13416 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
13417 else
13418 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13419 "2579 Slow-path wqe consume event carries "
13420 "miss-matched qid: wcqe-qid=x%x, sp-qid=x%x\n",
13421 bf_get(lpfc_wcqe_r_wqe_index, wcqe),
13422 phba->sli4_hba.els_wq->queue_id);
13423}
13424
13425/**
13426 * lpfc_sli4_sp_handle_abort_xri_wcqe - Handle a xri abort event
13427 * @phba: Pointer to HBA context object.
13428 * @cq: Pointer to a WQ completion queue.
13429 * @wcqe: Pointer to work-queue completion queue entry.
13430 *
13431 * This routine handles an XRI abort event.
13432 *
13433 * Return: true if work posted to worker thread, otherwise false.
13434 **/
13435static bool
13436lpfc_sli4_sp_handle_abort_xri_wcqe(struct lpfc_hba *phba,
13437 struct lpfc_queue *cq,
13438 struct sli4_wcqe_xri_aborted *wcqe)
13439{
13440 bool workposted = false;
13441 struct lpfc_cq_event *cq_event;
13442 unsigned long iflags;
13443
4f774513
JS
13444 switch (cq->subtype) {
13445 case LPFC_FCP:
8a5ca109
JS
13446 cq_event = lpfc_cq_event_setup(
13447 phba, wcqe, sizeof(struct sli4_wcqe_xri_aborted));
13448 if (!cq_event)
13449 return false;
4f774513
JS
13450 spin_lock_irqsave(&phba->hbalock, iflags);
13451 list_add_tail(&cq_event->list,
13452 &phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
13453 /* Set the fcp xri abort event flag */
13454 phba->hba_flag |= FCP_XRI_ABORT_EVENT;
13455 spin_unlock_irqrestore(&phba->hbalock, iflags);
13456 workposted = true;
13457 break;
422c4cb7 13458 case LPFC_NVME_LS: /* NVME LS uses ELS resources */
4f774513 13459 case LPFC_ELS:
8a5ca109
JS
13460 cq_event = lpfc_cq_event_setup(
13461 phba, wcqe, sizeof(struct sli4_wcqe_xri_aborted));
13462 if (!cq_event)
13463 return false;
4f774513
JS
13464 spin_lock_irqsave(&phba->hbalock, iflags);
13465 list_add_tail(&cq_event->list,
13466 &phba->sli4_hba.sp_els_xri_aborted_work_queue);
13467 /* Set the els xri abort event flag */
13468 phba->hba_flag |= ELS_XRI_ABORT_EVENT;
13469 spin_unlock_irqrestore(&phba->hbalock, iflags);
13470 workposted = true;
13471 break;
318083ad 13472 case LPFC_NVME:
8a5ca109
JS
13473 /* Notify aborted XRI for NVME work queue */
13474 if (phba->nvmet_support)
13475 lpfc_sli4_nvmet_xri_aborted(phba, wcqe);
13476 else
13477 lpfc_sli4_nvme_xri_aborted(phba, wcqe);
13478
13479 workposted = false;
318083ad 13480 break;
4f774513
JS
13481 default:
13482 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
318083ad
JS
13483 "0603 Invalid CQ subtype %d: "
13484 "%08x %08x %08x %08x\n",
13485 cq->subtype, wcqe->word0, wcqe->parameter,
13486 wcqe->word2, wcqe->word3);
4f774513
JS
13487 workposted = false;
13488 break;
13489 }
13490 return workposted;
13491}
13492
e817e5d7
JS
13493#define FC_RCTL_MDS_DIAGS 0xF4
13494
4f774513
JS
13495/**
13496 * lpfc_sli4_sp_handle_rcqe - Process a receive-queue completion queue entry
13497 * @phba: Pointer to HBA context object.
13498 * @rcqe: Pointer to receive-queue completion queue entry.
13499 *
13500 * This routine process a receive-queue completion queue entry.
13501 *
13502 * Return: true if work posted to worker thread, otherwise false.
13503 **/
13504static bool
4d9ab994 13505lpfc_sli4_sp_handle_rcqe(struct lpfc_hba *phba, struct lpfc_rcqe *rcqe)
4f774513 13506{
4f774513 13507 bool workposted = false;
e817e5d7 13508 struct fc_frame_header *fc_hdr;
4f774513
JS
13509 struct lpfc_queue *hrq = phba->sli4_hba.hdr_rq;
13510 struct lpfc_queue *drq = phba->sli4_hba.dat_rq;
547077a4 13511 struct lpfc_nvmet_tgtport *tgtp;
4f774513 13512 struct hbq_dmabuf *dma_buf;
7851fe2c 13513 uint32_t status, rq_id;
4f774513
JS
13514 unsigned long iflags;
13515
2e90f4b5
JS
13516 /* sanity check on queue memory */
13517 if (unlikely(!hrq) || unlikely(!drq))
13518 return workposted;
13519
7851fe2c
JS
13520 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13521 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13522 else
13523 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13524 if (rq_id != hrq->queue_id)
4f774513
JS
13525 goto out;
13526
4d9ab994 13527 status = bf_get(lpfc_rcqe_status, rcqe);
4f774513
JS
13528 switch (status) {
13529 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13530 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13531 "2537 Receive Frame Truncated!!\n");
5bd5f66c 13532 /* fall through */
4f774513
JS
13533 case FC_STATUS_RQ_SUCCESS:
13534 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13535 lpfc_sli4_rq_release(hrq, drq);
4f774513
JS
13536 dma_buf = lpfc_sli_hbqbuf_get(&phba->hbqs[0].hbq_buffer_list);
13537 if (!dma_buf) {
b84daac9 13538 hrq->RQ_no_buf_found++;
4f774513
JS
13539 spin_unlock_irqrestore(&phba->hbalock, iflags);
13540 goto out;
13541 }
b84daac9 13542 hrq->RQ_rcv_buf++;
547077a4 13543 hrq->RQ_buf_posted--;
4d9ab994 13544 memcpy(&dma_buf->cq_event.cqe.rcqe_cmpl, rcqe, sizeof(*rcqe));
895427bd 13545
e817e5d7
JS
13546 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13547
13548 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
13549 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
13550 spin_unlock_irqrestore(&phba->hbalock, iflags);
13551 /* Handle MDS Loopback frames */
13552 lpfc_sli4_handle_mds_loopback(phba->pport, dma_buf);
13553 break;
13554 }
13555
13556 /* save off the frame for the work thread to process */
4d9ab994 13557 list_add_tail(&dma_buf->cq_event.list,
45ed1190 13558 &phba->sli4_hba.sp_queue_event);
4f774513 13559 /* Frame received */
45ed1190 13560 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513
JS
13561 spin_unlock_irqrestore(&phba->hbalock, iflags);
13562 workposted = true;
13563 break;
4f774513 13564 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13565 if (phba->nvmet_support) {
13566 tgtp = phba->targetport->private;
13567 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13568 "6402 RQE Error x%x, posted %d err_cnt "
13569 "%d: %x %x %x\n",
13570 status, hrq->RQ_buf_posted,
13571 hrq->RQ_no_posted_buf,
13572 atomic_read(&tgtp->rcv_fcp_cmd_in),
13573 atomic_read(&tgtp->rcv_fcp_cmd_out),
13574 atomic_read(&tgtp->xmt_fcp_release));
13575 }
13576 /* fallthrough */
13577
13578 case FC_STATUS_INSUFF_BUF_NEED_BUF:
b84daac9 13579 hrq->RQ_no_posted_buf++;
4f774513
JS
13580 /* Post more buffers if possible */
13581 spin_lock_irqsave(&phba->hbalock, iflags);
13582 phba->hba_flag |= HBA_POST_RECEIVE_BUFFER;
13583 spin_unlock_irqrestore(&phba->hbalock, iflags);
13584 workposted = true;
13585 break;
13586 }
13587out:
13588 return workposted;
4f774513
JS
13589}
13590
4d9ab994
JS
13591/**
13592 * lpfc_sli4_sp_handle_cqe - Process a slow path completion queue entry
13593 * @phba: Pointer to HBA context object.
13594 * @cq: Pointer to the completion queue.
13595 * @wcqe: Pointer to a completion queue entry.
13596 *
25985edc 13597 * This routine process a slow-path work-queue or receive queue completion queue
4d9ab994
JS
13598 * entry.
13599 *
13600 * Return: true if work posted to worker thread, otherwise false.
13601 **/
13602static bool
13603lpfc_sli4_sp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13604 struct lpfc_cqe *cqe)
13605{
45ed1190 13606 struct lpfc_cqe cqevt;
4d9ab994
JS
13607 bool workposted = false;
13608
13609 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 13610 lpfc_sli4_pcimem_bcopy(cqe, &cqevt, sizeof(struct lpfc_cqe));
4d9ab994
JS
13611
13612 /* Check and process for different type of WCQE and dispatch */
45ed1190 13613 switch (bf_get(lpfc_cqe_code, &cqevt)) {
4d9ab994 13614 case CQE_CODE_COMPL_WQE:
45ed1190 13615 /* Process the WQ/RQ complete event */
bc73905a 13616 phba->last_completion_time = jiffies;
2a76a283 13617 workposted = lpfc_sli4_sp_handle_els_wcqe(phba, cq,
45ed1190 13618 (struct lpfc_wcqe_complete *)&cqevt);
4d9ab994
JS
13619 break;
13620 case CQE_CODE_RELEASE_WQE:
13621 /* Process the WQ release event */
13622 lpfc_sli4_sp_handle_rel_wcqe(phba,
45ed1190 13623 (struct lpfc_wcqe_release *)&cqevt);
4d9ab994
JS
13624 break;
13625 case CQE_CODE_XRI_ABORTED:
13626 /* Process the WQ XRI abort event */
bc73905a 13627 phba->last_completion_time = jiffies;
4d9ab994 13628 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
45ed1190 13629 (struct sli4_wcqe_xri_aborted *)&cqevt);
4d9ab994
JS
13630 break;
13631 case CQE_CODE_RECEIVE:
7851fe2c 13632 case CQE_CODE_RECEIVE_V1:
4d9ab994 13633 /* Process the RQ event */
bc73905a 13634 phba->last_completion_time = jiffies;
4d9ab994 13635 workposted = lpfc_sli4_sp_handle_rcqe(phba,
45ed1190 13636 (struct lpfc_rcqe *)&cqevt);
4d9ab994
JS
13637 break;
13638 default:
13639 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13640 "0388 Not a valid WCQE code: x%x\n",
45ed1190 13641 bf_get(lpfc_cqe_code, &cqevt));
4d9ab994
JS
13642 break;
13643 }
13644 return workposted;
13645}
13646
4f774513
JS
13647/**
13648 * lpfc_sli4_sp_handle_eqe - Process a slow-path event queue entry
13649 * @phba: Pointer to HBA context object.
13650 * @eqe: Pointer to fast-path event queue entry.
13651 *
13652 * This routine process a event queue entry from the slow-path event queue.
13653 * It will check the MajorCode and MinorCode to determine this is for a
13654 * completion event on a completion queue, if not, an error shall be logged
13655 * and just return. Otherwise, it will get to the corresponding completion
13656 * queue and process all the entries on that completion queue, rearm the
13657 * completion queue, and then return.
13658 *
13659 **/
f485c18d 13660static void
67d12733
JS
13661lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
13662 struct lpfc_queue *speq)
4f774513 13663{
67d12733 13664 struct lpfc_queue *cq = NULL, *childq;
4f774513
JS
13665 uint16_t cqid;
13666
4f774513 13667 /* Get the reference to the corresponding CQ */
cb5172ea 13668 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
4f774513 13669
4f774513
JS
13670 list_for_each_entry(childq, &speq->child_list, list) {
13671 if (childq->queue_id == cqid) {
13672 cq = childq;
13673 break;
13674 }
13675 }
13676 if (unlikely(!cq)) {
75baf696
JS
13677 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
13678 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13679 "0365 Slow-path CQ identifier "
13680 "(%d) does not exist\n", cqid);
f485c18d 13681 return;
4f774513
JS
13682 }
13683
895427bd
JS
13684 /* Save EQ associated with this CQ */
13685 cq->assoc_qp = speq;
13686
f485c18d
DK
13687 if (!queue_work(phba->wq, &cq->spwork))
13688 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13689 "0390 Cannot schedule soft IRQ "
13690 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
13691 cqid, cq->queue_id, smp_processor_id());
13692}
13693
13694/**
13695 * lpfc_sli4_sp_process_cq - Process a slow-path event queue entry
13696 * @phba: Pointer to HBA context object.
13697 *
13698 * This routine process a event queue entry from the slow-path event queue.
13699 * It will check the MajorCode and MinorCode to determine this is for a
13700 * completion event on a completion queue, if not, an error shall be logged
13701 * and just return. Otherwise, it will get to the corresponding completion
13702 * queue and process all the entries on that completion queue, rearm the
13703 * completion queue, and then return.
13704 *
13705 **/
13706static void
13707lpfc_sli4_sp_process_cq(struct work_struct *work)
13708{
13709 struct lpfc_queue *cq =
13710 container_of(work, struct lpfc_queue, spwork);
13711 struct lpfc_hba *phba = cq->phba;
13712 struct lpfc_cqe *cqe;
13713 bool workposted = false;
13714 int ccount = 0;
13715
4f774513
JS
13716 /* Process all the entries to the CQ */
13717 switch (cq->type) {
13718 case LPFC_MCQ:
13719 while ((cqe = lpfc_sli4_cq_get(cq))) {
13720 workposted |= lpfc_sli4_sp_handle_mcqe(phba, cqe);
f485c18d 13721 if (!(++ccount % cq->entry_repost))
7869da18 13722 break;
b84daac9 13723 cq->CQ_mbox++;
4f774513
JS
13724 }
13725 break;
13726 case LPFC_WCQ:
13727 while ((cqe = lpfc_sli4_cq_get(cq))) {
c8a4ce0b
DK
13728 if (cq->subtype == LPFC_FCP ||
13729 cq->subtype == LPFC_NVME) {
13730#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13731 if (phba->ktime_on)
13732 cq->isr_timestamp = ktime_get_ns();
13733 else
13734 cq->isr_timestamp = 0;
13735#endif
895427bd 13736 workposted |= lpfc_sli4_fp_handle_cqe(phba, cq,
0558056c 13737 cqe);
c8a4ce0b 13738 } else {
0558056c
JS
13739 workposted |= lpfc_sli4_sp_handle_cqe(phba, cq,
13740 cqe);
c8a4ce0b 13741 }
f485c18d 13742 if (!(++ccount % cq->entry_repost))
7869da18 13743 break;
4f774513 13744 }
b84daac9
JS
13745
13746 /* Track the max number of CQEs processed in 1 EQ */
f485c18d
DK
13747 if (ccount > cq->CQ_max_cqe)
13748 cq->CQ_max_cqe = ccount;
4f774513
JS
13749 break;
13750 default:
13751 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13752 "0370 Invalid completion queue type (%d)\n",
13753 cq->type);
f485c18d 13754 return;
4f774513
JS
13755 }
13756
13757 /* Catch the no cq entry condition, log an error */
f485c18d 13758 if (unlikely(ccount == 0))
4f774513
JS
13759 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13760 "0371 No entry from the CQ: identifier "
13761 "(x%x), type (%d)\n", cq->queue_id, cq->type);
13762
13763 /* In any case, flash and re-arm the RCQ */
b71413dd 13764 phba->sli4_hba.sli4_cq_release(cq, LPFC_QUEUE_REARM);
4f774513
JS
13765
13766 /* wake up worker thread if there are works to be done */
13767 if (workposted)
13768 lpfc_worker_wake_up(phba);
13769}
13770
13771/**
13772 * lpfc_sli4_fp_handle_fcp_wcqe - Process fast-path work queue completion entry
2a76a283
JS
13773 * @phba: Pointer to HBA context object.
13774 * @cq: Pointer to associated CQ
13775 * @wcqe: Pointer to work-queue completion queue entry.
4f774513
JS
13776 *
13777 * This routine process a fast-path work queue completion entry from fast-path
13778 * event queue for FCP command response completion.
13779 **/
13780static void
2a76a283 13781lpfc_sli4_fp_handle_fcp_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13782 struct lpfc_wcqe_complete *wcqe)
13783{
2a76a283 13784 struct lpfc_sli_ring *pring = cq->pring;
4f774513
JS
13785 struct lpfc_iocbq *cmdiocbq;
13786 struct lpfc_iocbq irspiocbq;
13787 unsigned long iflags;
13788
4f774513
JS
13789 /* Check for response status */
13790 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13791 /* If resource errors reported from HBA, reduce queue
13792 * depth of the SCSI device.
13793 */
e3d2b802
JS
13794 if (((bf_get(lpfc_wcqe_c_status, wcqe) ==
13795 IOSTAT_LOCAL_REJECT)) &&
13796 ((wcqe->parameter & IOERR_PARAM_MASK) ==
13797 IOERR_NO_RESOURCES))
4f774513 13798 phba->lpfc_rampdown_queue_depth(phba);
e3d2b802 13799
4f774513 13800 /* Log the error status */
11f0e34f
JS
13801 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13802 "0373 FCP CQE error: status=x%x: "
13803 "CQE: %08x %08x %08x %08x\n",
4f774513 13804 bf_get(lpfc_wcqe_c_status, wcqe),
11f0e34f
JS
13805 wcqe->word0, wcqe->total_data_placed,
13806 wcqe->parameter, wcqe->word3);
4f774513
JS
13807 }
13808
13809 /* Look up the FCP command IOCB and create pseudo response IOCB */
7e56aa25
JS
13810 spin_lock_irqsave(&pring->ring_lock, iflags);
13811 pring->stats.iocb_event++;
4f774513
JS
13812 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13813 bf_get(lpfc_wcqe_c_request_tag, wcqe));
7e56aa25 13814 spin_unlock_irqrestore(&pring->ring_lock, iflags);
4f774513
JS
13815 if (unlikely(!cmdiocbq)) {
13816 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13817 "0374 FCP complete with no corresponding "
13818 "cmdiocb: iotag (%d)\n",
13819 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13820 return;
13821 }
c8a4ce0b
DK
13822#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13823 cmdiocbq->isr_timestamp = cq->isr_timestamp;
13824#endif
895427bd
JS
13825 if (cmdiocbq->iocb_cmpl == NULL) {
13826 if (cmdiocbq->wqe_cmpl) {
13827 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13828 spin_lock_irqsave(&phba->hbalock, iflags);
13829 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13830 spin_unlock_irqrestore(&phba->hbalock, iflags);
13831 }
13832
13833 /* Pass the cmd_iocb and the wcqe to the upper layer */
13834 (cmdiocbq->wqe_cmpl)(phba, cmdiocbq, wcqe);
13835 return;
13836 }
4f774513
JS
13837 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13838 "0375 FCP cmdiocb not callback function "
13839 "iotag: (%d)\n",
13840 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13841 return;
13842 }
13843
13844 /* Fake the irspiocb and copy necessary response information */
341af102 13845 lpfc_sli4_iocb_param_transfer(phba, &irspiocbq, cmdiocbq, wcqe);
4f774513 13846
0f65ff68
JS
13847 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13848 spin_lock_irqsave(&phba->hbalock, iflags);
13849 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13850 spin_unlock_irqrestore(&phba->hbalock, iflags);
13851 }
13852
4f774513
JS
13853 /* Pass the cmd_iocb and the rsp state to the upper layer */
13854 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, &irspiocbq);
13855}
13856
13857/**
13858 * lpfc_sli4_fp_handle_rel_wcqe - Handle fast-path WQ entry consumed event
13859 * @phba: Pointer to HBA context object.
13860 * @cq: Pointer to completion queue.
13861 * @wcqe: Pointer to work-queue completion queue entry.
13862 *
3f8b6fb7 13863 * This routine handles an fast-path WQ entry consumed event by invoking the
4f774513
JS
13864 * proper WQ release routine to the slow-path WQ.
13865 **/
13866static void
13867lpfc_sli4_fp_handle_rel_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13868 struct lpfc_wcqe_release *wcqe)
13869{
13870 struct lpfc_queue *childwq;
13871 bool wqid_matched = false;
895427bd 13872 uint16_t hba_wqid;
4f774513
JS
13873
13874 /* Check for fast-path FCP work queue release */
895427bd 13875 hba_wqid = bf_get(lpfc_wcqe_r_wq_id, wcqe);
4f774513 13876 list_for_each_entry(childwq, &cq->child_list, list) {
895427bd 13877 if (childwq->queue_id == hba_wqid) {
4f774513
JS
13878 lpfc_sli4_wq_release(childwq,
13879 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
6e8e1c14
JS
13880 if (childwq->q_flag & HBA_NVMET_WQFULL)
13881 lpfc_nvmet_wqfull_process(phba, childwq);
4f774513
JS
13882 wqid_matched = true;
13883 break;
13884 }
13885 }
13886 /* Report warning log message if no match found */
13887 if (wqid_matched != true)
13888 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13889 "2580 Fast-path wqe consume event carries "
895427bd 13890 "miss-matched qid: wcqe-qid=x%x\n", hba_wqid);
4f774513
JS
13891}
13892
13893/**
2d7dbc4c
JS
13894 * lpfc_sli4_nvmet_handle_rcqe - Process a receive-queue completion queue entry
13895 * @phba: Pointer to HBA context object.
13896 * @rcqe: Pointer to receive-queue completion queue entry.
4f774513 13897 *
2d7dbc4c
JS
13898 * This routine process a receive-queue completion queue entry.
13899 *
13900 * Return: true if work posted to worker thread, otherwise false.
13901 **/
13902static bool
13903lpfc_sli4_nvmet_handle_rcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13904 struct lpfc_rcqe *rcqe)
13905{
13906 bool workposted = false;
13907 struct lpfc_queue *hrq;
13908 struct lpfc_queue *drq;
13909 struct rqb_dmabuf *dma_buf;
13910 struct fc_frame_header *fc_hdr;
547077a4 13911 struct lpfc_nvmet_tgtport *tgtp;
2d7dbc4c
JS
13912 uint32_t status, rq_id;
13913 unsigned long iflags;
13914 uint32_t fctl, idx;
13915
13916 if ((phba->nvmet_support == 0) ||
13917 (phba->sli4_hba.nvmet_cqset == NULL))
13918 return workposted;
13919
13920 idx = cq->queue_id - phba->sli4_hba.nvmet_cqset[0]->queue_id;
13921 hrq = phba->sli4_hba.nvmet_mrq_hdr[idx];
13922 drq = phba->sli4_hba.nvmet_mrq_data[idx];
13923
13924 /* sanity check on queue memory */
13925 if (unlikely(!hrq) || unlikely(!drq))
13926 return workposted;
13927
13928 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13929 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13930 else
13931 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13932
13933 if ((phba->nvmet_support == 0) ||
13934 (rq_id != hrq->queue_id))
13935 return workposted;
13936
13937 status = bf_get(lpfc_rcqe_status, rcqe);
13938 switch (status) {
13939 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13940 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13941 "6126 Receive Frame Truncated!!\n");
5bd5f66c 13942 /* fall through */
2d7dbc4c 13943 case FC_STATUS_RQ_SUCCESS:
2d7dbc4c 13944 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13945 lpfc_sli4_rq_release(hrq, drq);
2d7dbc4c
JS
13946 dma_buf = lpfc_sli_rqbuf_get(phba, hrq);
13947 if (!dma_buf) {
13948 hrq->RQ_no_buf_found++;
13949 spin_unlock_irqrestore(&phba->hbalock, iflags);
13950 goto out;
13951 }
13952 spin_unlock_irqrestore(&phba->hbalock, iflags);
13953 hrq->RQ_rcv_buf++;
547077a4 13954 hrq->RQ_buf_posted--;
2d7dbc4c
JS
13955 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13956
13957 /* Just some basic sanity checks on FCP Command frame */
13958 fctl = (fc_hdr->fh_f_ctl[0] << 16 |
13959 fc_hdr->fh_f_ctl[1] << 8 |
13960 fc_hdr->fh_f_ctl[2]);
13961 if (((fctl &
13962 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) !=
13963 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) ||
13964 (fc_hdr->fh_seq_cnt != 0)) /* 0 byte swapped is still 0 */
13965 goto drop;
13966
13967 if (fc_hdr->fh_type == FC_TYPE_FCP) {
13968 dma_buf->bytes_recv = bf_get(lpfc_rcqe_length, rcqe);
d613b6a7 13969 lpfc_nvmet_unsol_fcp_event(
66d7ce93 13970 phba, idx, dma_buf,
c8a4ce0b 13971 cq->isr_timestamp);
2d7dbc4c
JS
13972 return false;
13973 }
13974drop:
13975 lpfc_in_buf_free(phba, &dma_buf->dbuf);
13976 break;
2d7dbc4c 13977 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13978 if (phba->nvmet_support) {
13979 tgtp = phba->targetport->private;
13980 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13981 "6401 RQE Error x%x, posted %d err_cnt "
13982 "%d: %x %x %x\n",
13983 status, hrq->RQ_buf_posted,
13984 hrq->RQ_no_posted_buf,
13985 atomic_read(&tgtp->rcv_fcp_cmd_in),
13986 atomic_read(&tgtp->rcv_fcp_cmd_out),
13987 atomic_read(&tgtp->xmt_fcp_release));
13988 }
13989 /* fallthrough */
13990
13991 case FC_STATUS_INSUFF_BUF_NEED_BUF:
2d7dbc4c
JS
13992 hrq->RQ_no_posted_buf++;
13993 /* Post more buffers if possible */
2d7dbc4c
JS
13994 break;
13995 }
13996out:
13997 return workposted;
13998}
13999
4f774513 14000/**
895427bd 14001 * lpfc_sli4_fp_handle_cqe - Process fast-path work queue completion entry
4f774513
JS
14002 * @cq: Pointer to the completion queue.
14003 * @eqe: Pointer to fast-path completion queue entry.
14004 *
14005 * This routine process a fast-path work queue completion entry from fast-path
14006 * event queue for FCP command response completion.
14007 **/
14008static int
895427bd 14009lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
14010 struct lpfc_cqe *cqe)
14011{
14012 struct lpfc_wcqe_release wcqe;
14013 bool workposted = false;
14014
14015 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 14016 lpfc_sli4_pcimem_bcopy(cqe, &wcqe, sizeof(struct lpfc_cqe));
4f774513
JS
14017
14018 /* Check and process for different type of WCQE and dispatch */
14019 switch (bf_get(lpfc_wcqe_c_code, &wcqe)) {
14020 case CQE_CODE_COMPL_WQE:
895427bd 14021 case CQE_CODE_NVME_ERSP:
b84daac9 14022 cq->CQ_wq++;
4f774513 14023 /* Process the WQ complete event */
98fc5dd9 14024 phba->last_completion_time = jiffies;
895427bd
JS
14025 if ((cq->subtype == LPFC_FCP) || (cq->subtype == LPFC_NVME))
14026 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
14027 (struct lpfc_wcqe_complete *)&wcqe);
14028 if (cq->subtype == LPFC_NVME_LS)
14029 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
4f774513
JS
14030 (struct lpfc_wcqe_complete *)&wcqe);
14031 break;
14032 case CQE_CODE_RELEASE_WQE:
b84daac9 14033 cq->CQ_release_wqe++;
4f774513
JS
14034 /* Process the WQ release event */
14035 lpfc_sli4_fp_handle_rel_wcqe(phba, cq,
14036 (struct lpfc_wcqe_release *)&wcqe);
14037 break;
14038 case CQE_CODE_XRI_ABORTED:
b84daac9 14039 cq->CQ_xri_aborted++;
4f774513 14040 /* Process the WQ XRI abort event */
bc73905a 14041 phba->last_completion_time = jiffies;
4f774513
JS
14042 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
14043 (struct sli4_wcqe_xri_aborted *)&wcqe);
14044 break;
895427bd
JS
14045 case CQE_CODE_RECEIVE_V1:
14046 case CQE_CODE_RECEIVE:
14047 phba->last_completion_time = jiffies;
2d7dbc4c
JS
14048 if (cq->subtype == LPFC_NVMET) {
14049 workposted = lpfc_sli4_nvmet_handle_rcqe(
14050 phba, cq, (struct lpfc_rcqe *)&wcqe);
14051 }
895427bd 14052 break;
4f774513
JS
14053 default:
14054 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 14055 "0144 Not a valid CQE code: x%x\n",
4f774513
JS
14056 bf_get(lpfc_wcqe_c_code, &wcqe));
14057 break;
14058 }
14059 return workposted;
14060}
14061
14062/**
67d12733 14063 * lpfc_sli4_hba_handle_eqe - Process a fast-path event queue entry
4f774513
JS
14064 * @phba: Pointer to HBA context object.
14065 * @eqe: Pointer to fast-path event queue entry.
14066 *
14067 * This routine process a event queue entry from the fast-path event queue.
14068 * It will check the MajorCode and MinorCode to determine this is for a
14069 * completion event on a completion queue, if not, an error shall be logged
14070 * and just return. Otherwise, it will get to the corresponding completion
14071 * queue and process all the entries on the completion queue, rearm the
14072 * completion queue, and then return.
14073 **/
f485c18d 14074static void
67d12733
JS
14075lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
14076 uint32_t qidx)
4f774513 14077{
895427bd 14078 struct lpfc_queue *cq = NULL;
2d7dbc4c 14079 uint16_t cqid, id;
4f774513 14080
cb5172ea 14081 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
4f774513 14082 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
67d12733 14083 "0366 Not a valid completion "
4f774513 14084 "event: majorcode=x%x, minorcode=x%x\n",
cb5172ea
JS
14085 bf_get_le32(lpfc_eqe_major_code, eqe),
14086 bf_get_le32(lpfc_eqe_minor_code, eqe));
f485c18d 14087 return;
4f774513
JS
14088 }
14089
67d12733
JS
14090 /* Get the reference to the corresponding CQ */
14091 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
14092
2d7dbc4c
JS
14093 if (phba->cfg_nvmet_mrq && phba->sli4_hba.nvmet_cqset) {
14094 id = phba->sli4_hba.nvmet_cqset[0]->queue_id;
14095 if ((cqid >= id) && (cqid < (id + phba->cfg_nvmet_mrq))) {
14096 /* Process NVMET unsol rcv */
14097 cq = phba->sli4_hba.nvmet_cqset[cqid - id];
14098 goto process_cq;
14099 }
67d12733
JS
14100 }
14101
895427bd
JS
14102 if (phba->sli4_hba.nvme_cq_map &&
14103 (cqid == phba->sli4_hba.nvme_cq_map[qidx])) {
f358dd0c 14104 /* Process NVME / NVMET command completion */
895427bd
JS
14105 cq = phba->sli4_hba.nvme_cq[qidx];
14106 goto process_cq;
2e90f4b5 14107 }
67d12733 14108
895427bd
JS
14109 if (phba->sli4_hba.fcp_cq_map &&
14110 (cqid == phba->sli4_hba.fcp_cq_map[qidx])) {
14111 /* Process FCP command completion */
14112 cq = phba->sli4_hba.fcp_cq[qidx];
14113 goto process_cq;
2e90f4b5 14114 }
895427bd
JS
14115
14116 if (phba->sli4_hba.nvmels_cq &&
14117 (cqid == phba->sli4_hba.nvmels_cq->queue_id)) {
14118 /* Process NVME unsol rcv */
14119 cq = phba->sli4_hba.nvmels_cq;
14120 }
14121
14122 /* Otherwise this is a Slow path event */
14123 if (cq == NULL) {
f485c18d
DK
14124 lpfc_sli4_sp_handle_eqe(phba, eqe, phba->sli4_hba.hba_eq[qidx]);
14125 return;
4f774513
JS
14126 }
14127
895427bd 14128process_cq:
4f774513
JS
14129 if (unlikely(cqid != cq->queue_id)) {
14130 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14131 "0368 Miss-matched fast-path completion "
14132 "queue identifier: eqcqid=%d, fcpcqid=%d\n",
14133 cqid, cq->queue_id);
f485c18d 14134 return;
4f774513
JS
14135 }
14136
895427bd
JS
14137 /* Save EQ associated with this CQ */
14138 cq->assoc_qp = phba->sli4_hba.hba_eq[qidx];
14139
f485c18d
DK
14140 if (!queue_work(phba->wq, &cq->irqwork))
14141 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14142 "0363 Cannot schedule soft IRQ "
14143 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
14144 cqid, cq->queue_id, smp_processor_id());
14145}
14146
14147/**
14148 * lpfc_sli4_hba_process_cq - Process a fast-path event queue entry
14149 * @phba: Pointer to HBA context object.
14150 * @eqe: Pointer to fast-path event queue entry.
14151 *
14152 * This routine process a event queue entry from the fast-path event queue.
14153 * It will check the MajorCode and MinorCode to determine this is for a
14154 * completion event on a completion queue, if not, an error shall be logged
14155 * and just return. Otherwise, it will get to the corresponding completion
14156 * queue and process all the entries on the completion queue, rearm the
14157 * completion queue, and then return.
14158 **/
14159static void
14160lpfc_sli4_hba_process_cq(struct work_struct *work)
14161{
14162 struct lpfc_queue *cq =
14163 container_of(work, struct lpfc_queue, irqwork);
14164 struct lpfc_hba *phba = cq->phba;
14165 struct lpfc_cqe *cqe;
14166 bool workposted = false;
14167 int ccount = 0;
14168
4f774513
JS
14169 /* Process all the entries to the CQ */
14170 while ((cqe = lpfc_sli4_cq_get(cq))) {
c8a4ce0b
DK
14171#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
14172 if (phba->ktime_on)
14173 cq->isr_timestamp = ktime_get_ns();
14174 else
14175 cq->isr_timestamp = 0;
14176#endif
895427bd 14177 workposted |= lpfc_sli4_fp_handle_cqe(phba, cq, cqe);
f485c18d 14178 if (!(++ccount % cq->entry_repost))
7869da18 14179 break;
4f774513
JS
14180 }
14181
b84daac9 14182 /* Track the max number of CQEs processed in 1 EQ */
f485c18d
DK
14183 if (ccount > cq->CQ_max_cqe)
14184 cq->CQ_max_cqe = ccount;
14185 cq->assoc_qp->EQ_cqe_cnt += ccount;
b84daac9 14186
4f774513 14187 /* Catch the no cq entry condition */
f485c18d 14188 if (unlikely(ccount == 0))
4f774513
JS
14189 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14190 "0369 No entry from fast-path completion "
14191 "queue fcpcqid=%d\n", cq->queue_id);
14192
14193 /* In any case, flash and re-arm the CQ */
b71413dd 14194 phba->sli4_hba.sli4_cq_release(cq, LPFC_QUEUE_REARM);
4f774513
JS
14195
14196 /* wake up worker thread if there are works to be done */
14197 if (workposted)
14198 lpfc_worker_wake_up(phba);
14199}
14200
14201static void
14202lpfc_sli4_eq_flush(struct lpfc_hba *phba, struct lpfc_queue *eq)
14203{
14204 struct lpfc_eqe *eqe;
14205
14206 /* walk all the EQ entries and drop on the floor */
14207 while ((eqe = lpfc_sli4_eq_get(eq)))
14208 ;
14209
14210 /* Clear and re-arm the EQ */
b71413dd 14211 phba->sli4_hba.sli4_eq_release(eq, LPFC_QUEUE_REARM);
4f774513
JS
14212}
14213
1ba981fd
JS
14214
14215/**
14216 * lpfc_sli4_fof_handle_eqe - Process a Flash Optimized Fabric event queue
14217 * entry
14218 * @phba: Pointer to HBA context object.
14219 * @eqe: Pointer to fast-path event queue entry.
14220 *
14221 * This routine process a event queue entry from the Flash Optimized Fabric
14222 * event queue. It will check the MajorCode and MinorCode to determine this
14223 * is for a completion event on a completion queue, if not, an error shall be
14224 * logged and just return. Otherwise, it will get to the corresponding
14225 * completion queue and process all the entries on the completion queue, rearm
14226 * the completion queue, and then return.
14227 **/
14228static void
14229lpfc_sli4_fof_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe)
14230{
14231 struct lpfc_queue *cq;
1ba981fd 14232 uint16_t cqid;
1ba981fd
JS
14233
14234 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
14235 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14236 "9147 Not a valid completion "
14237 "event: majorcode=x%x, minorcode=x%x\n",
14238 bf_get_le32(lpfc_eqe_major_code, eqe),
14239 bf_get_le32(lpfc_eqe_minor_code, eqe));
14240 return;
14241 }
14242
14243 /* Get the reference to the corresponding CQ */
14244 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
14245
14246 /* Next check for OAS */
14247 cq = phba->sli4_hba.oas_cq;
14248 if (unlikely(!cq)) {
14249 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
14250 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14251 "9148 OAS completion queue "
14252 "does not exist\n");
14253 return;
14254 }
14255
14256 if (unlikely(cqid != cq->queue_id)) {
14257 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14258 "9149 Miss-matched fast-path compl "
14259 "queue id: eqcqid=%d, fcpcqid=%d\n",
14260 cqid, cq->queue_id);
14261 return;
14262 }
14263
d41b65bc
JS
14264 /* Save EQ associated with this CQ */
14265 cq->assoc_qp = phba->sli4_hba.fof_eq;
14266
f485c18d
DK
14267 /* CQ work will be processed on CPU affinitized to this IRQ */
14268 if (!queue_work(phba->wq, &cq->irqwork))
1ba981fd 14269 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
f485c18d
DK
14270 "0367 Cannot schedule soft IRQ "
14271 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
14272 cqid, cq->queue_id, smp_processor_id());
1ba981fd
JS
14273}
14274
14275/**
14276 * lpfc_sli4_fof_intr_handler - HBA interrupt handler to SLI-4 device
14277 * @irq: Interrupt number.
14278 * @dev_id: The device context pointer.
14279 *
14280 * This function is directly called from the PCI layer as an interrupt
14281 * service routine when device with SLI-4 interface spec is enabled with
14282 * MSI-X multi-message interrupt mode and there is a Flash Optimized Fabric
14283 * IOCB ring event in the HBA. However, when the device is enabled with either
14284 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
14285 * device-level interrupt handler. When the PCI slot is in error recovery
14286 * or the HBA is undergoing initialization, the interrupt handler will not
14287 * process the interrupt. The Flash Optimized Fabric ring event are handled in
14288 * the intrrupt context. This function is called without any lock held.
14289 * It gets the hbalock to access and update SLI data structures. Note that,
14290 * the EQ to CQ are one-to-one map such that the EQ index is
14291 * equal to that of CQ index.
14292 *
14293 * This function returns IRQ_HANDLED when interrupt is handled else it
14294 * returns IRQ_NONE.
14295 **/
14296irqreturn_t
14297lpfc_sli4_fof_intr_handler(int irq, void *dev_id)
14298{
14299 struct lpfc_hba *phba;
895427bd 14300 struct lpfc_hba_eq_hdl *hba_eq_hdl;
1ba981fd
JS
14301 struct lpfc_queue *eq;
14302 struct lpfc_eqe *eqe;
14303 unsigned long iflag;
14304 int ecount = 0;
1ba981fd
JS
14305
14306 /* Get the driver's phba structure from the dev_id */
895427bd
JS
14307 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
14308 phba = hba_eq_hdl->phba;
1ba981fd
JS
14309
14310 if (unlikely(!phba))
14311 return IRQ_NONE;
14312
14313 /* Get to the EQ struct associated with this vector */
14314 eq = phba->sli4_hba.fof_eq;
14315 if (unlikely(!eq))
14316 return IRQ_NONE;
14317
14318 /* Check device state for handling interrupt */
14319 if (unlikely(lpfc_intr_state_check(phba))) {
1ba981fd
JS
14320 /* Check again for link_state with lock held */
14321 spin_lock_irqsave(&phba->hbalock, iflag);
14322 if (phba->link_state < LPFC_LINK_DOWN)
14323 /* Flush, clear interrupt, and rearm the EQ */
14324 lpfc_sli4_eq_flush(phba, eq);
14325 spin_unlock_irqrestore(&phba->hbalock, iflag);
14326 return IRQ_NONE;
14327 }
14328
14329 /*
14330 * Process all the event on FCP fast-path EQ
14331 */
14332 while ((eqe = lpfc_sli4_eq_get(eq))) {
14333 lpfc_sli4_fof_handle_eqe(phba, eqe);
14334 if (!(++ecount % eq->entry_repost))
7869da18 14335 break;
1ba981fd
JS
14336 eq->EQ_processed++;
14337 }
14338
14339 /* Track the max number of EQEs processed in 1 intr */
14340 if (ecount > eq->EQ_max_eqe)
14341 eq->EQ_max_eqe = ecount;
14342
14343
14344 if (unlikely(ecount == 0)) {
14345 eq->EQ_no_entry++;
14346
14347 if (phba->intr_type == MSIX)
14348 /* MSI-X treated interrupt served as no EQ share INT */
14349 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14350 "9145 MSI-X interrupt with no EQE\n");
14351 else {
14352 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14353 "9146 ISR interrupt with no EQE\n");
14354 /* Non MSI-X treated on interrupt as EQ share INT */
14355 return IRQ_NONE;
14356 }
14357 }
14358 /* Always clear and re-arm the fast-path EQ */
b71413dd 14359 phba->sli4_hba.sli4_eq_release(eq, LPFC_QUEUE_REARM);
1ba981fd
JS
14360 return IRQ_HANDLED;
14361}
14362
4f774513 14363/**
67d12733 14364 * lpfc_sli4_hba_intr_handler - HBA interrupt handler to SLI-4 device
4f774513
JS
14365 * @irq: Interrupt number.
14366 * @dev_id: The device context pointer.
14367 *
14368 * This function is directly called from the PCI layer as an interrupt
14369 * service routine when device with SLI-4 interface spec is enabled with
14370 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
14371 * ring event in the HBA. However, when the device is enabled with either
14372 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
14373 * device-level interrupt handler. When the PCI slot is in error recovery
14374 * or the HBA is undergoing initialization, the interrupt handler will not
14375 * process the interrupt. The SCSI FCP fast-path ring event are handled in
14376 * the intrrupt context. This function is called without any lock held.
14377 * It gets the hbalock to access and update SLI data structures. Note that,
14378 * the FCP EQ to FCP CQ are one-to-one map such that the FCP EQ index is
14379 * equal to that of FCP CQ index.
14380 *
67d12733
JS
14381 * The link attention and ELS ring attention events are handled
14382 * by the worker thread. The interrupt handler signals the worker thread
14383 * and returns for these events. This function is called without any lock
14384 * held. It gets the hbalock to access and update SLI data structures.
14385 *
4f774513
JS
14386 * This function returns IRQ_HANDLED when interrupt is handled else it
14387 * returns IRQ_NONE.
14388 **/
14389irqreturn_t
67d12733 14390lpfc_sli4_hba_intr_handler(int irq, void *dev_id)
4f774513
JS
14391{
14392 struct lpfc_hba *phba;
895427bd 14393 struct lpfc_hba_eq_hdl *hba_eq_hdl;
4f774513
JS
14394 struct lpfc_queue *fpeq;
14395 struct lpfc_eqe *eqe;
14396 unsigned long iflag;
14397 int ecount = 0;
895427bd 14398 int hba_eqidx;
4f774513
JS
14399
14400 /* Get the driver's phba structure from the dev_id */
895427bd
JS
14401 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
14402 phba = hba_eq_hdl->phba;
14403 hba_eqidx = hba_eq_hdl->idx;
4f774513
JS
14404
14405 if (unlikely(!phba))
14406 return IRQ_NONE;
67d12733 14407 if (unlikely(!phba->sli4_hba.hba_eq))
5350d872 14408 return IRQ_NONE;
4f774513
JS
14409
14410 /* Get to the EQ struct associated with this vector */
895427bd 14411 fpeq = phba->sli4_hba.hba_eq[hba_eqidx];
2e90f4b5
JS
14412 if (unlikely(!fpeq))
14413 return IRQ_NONE;
4f774513 14414
ba20c853 14415 if (lpfc_fcp_look_ahead) {
895427bd 14416 if (atomic_dec_and_test(&hba_eq_hdl->hba_eq_in_use))
b71413dd 14417 phba->sli4_hba.sli4_eq_clr_intr(fpeq);
ba20c853 14418 else {
895427bd 14419 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
ba20c853
JS
14420 return IRQ_NONE;
14421 }
14422 }
14423
4f774513
JS
14424 /* Check device state for handling interrupt */
14425 if (unlikely(lpfc_intr_state_check(phba))) {
14426 /* Check again for link_state with lock held */
14427 spin_lock_irqsave(&phba->hbalock, iflag);
14428 if (phba->link_state < LPFC_LINK_DOWN)
14429 /* Flush, clear interrupt, and rearm the EQ */
14430 lpfc_sli4_eq_flush(phba, fpeq);
14431 spin_unlock_irqrestore(&phba->hbalock, iflag);
ba20c853 14432 if (lpfc_fcp_look_ahead)
895427bd 14433 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
4f774513
JS
14434 return IRQ_NONE;
14435 }
14436
14437 /*
14438 * Process all the event on FCP fast-path EQ
14439 */
14440 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
f485c18d
DK
14441 lpfc_sli4_hba_handle_eqe(phba, eqe, hba_eqidx);
14442 if (!(++ecount % fpeq->entry_repost))
7869da18 14443 break;
b84daac9 14444 fpeq->EQ_processed++;
4f774513
JS
14445 }
14446
b84daac9
JS
14447 /* Track the max number of EQEs processed in 1 intr */
14448 if (ecount > fpeq->EQ_max_eqe)
14449 fpeq->EQ_max_eqe = ecount;
14450
4f774513 14451 /* Always clear and re-arm the fast-path EQ */
b71413dd 14452 phba->sli4_hba.sli4_eq_release(fpeq, LPFC_QUEUE_REARM);
4f774513
JS
14453
14454 if (unlikely(ecount == 0)) {
b84daac9 14455 fpeq->EQ_no_entry++;
ba20c853
JS
14456
14457 if (lpfc_fcp_look_ahead) {
895427bd 14458 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
ba20c853
JS
14459 return IRQ_NONE;
14460 }
14461
4f774513
JS
14462 if (phba->intr_type == MSIX)
14463 /* MSI-X treated interrupt served as no EQ share INT */
14464 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14465 "0358 MSI-X interrupt with no EQE\n");
14466 else
14467 /* Non MSI-X treated on interrupt as EQ share INT */
14468 return IRQ_NONE;
14469 }
14470
ba20c853 14471 if (lpfc_fcp_look_ahead)
895427bd
JS
14472 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
14473
4f774513
JS
14474 return IRQ_HANDLED;
14475} /* lpfc_sli4_fp_intr_handler */
14476
14477/**
14478 * lpfc_sli4_intr_handler - Device-level interrupt handler for SLI-4 device
14479 * @irq: Interrupt number.
14480 * @dev_id: The device context pointer.
14481 *
14482 * This function is the device-level interrupt handler to device with SLI-4
14483 * interface spec, called from the PCI layer when either MSI or Pin-IRQ
14484 * interrupt mode is enabled and there is an event in the HBA which requires
14485 * driver attention. This function invokes the slow-path interrupt attention
14486 * handling function and fast-path interrupt attention handling function in
14487 * turn to process the relevant HBA attention events. This function is called
14488 * without any lock held. It gets the hbalock to access and update SLI data
14489 * structures.
14490 *
14491 * This function returns IRQ_HANDLED when interrupt is handled, else it
14492 * returns IRQ_NONE.
14493 **/
14494irqreturn_t
14495lpfc_sli4_intr_handler(int irq, void *dev_id)
14496{
14497 struct lpfc_hba *phba;
67d12733
JS
14498 irqreturn_t hba_irq_rc;
14499 bool hba_handled = false;
895427bd 14500 int qidx;
4f774513
JS
14501
14502 /* Get the driver's phba structure from the dev_id */
14503 phba = (struct lpfc_hba *)dev_id;
14504
14505 if (unlikely(!phba))
14506 return IRQ_NONE;
14507
4f774513
JS
14508 /*
14509 * Invoke fast-path host attention interrupt handling as appropriate.
14510 */
895427bd 14511 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++) {
67d12733 14512 hba_irq_rc = lpfc_sli4_hba_intr_handler(irq,
895427bd 14513 &phba->sli4_hba.hba_eq_hdl[qidx]);
67d12733
JS
14514 if (hba_irq_rc == IRQ_HANDLED)
14515 hba_handled |= true;
4f774513
JS
14516 }
14517
1ba981fd
JS
14518 if (phba->cfg_fof) {
14519 hba_irq_rc = lpfc_sli4_fof_intr_handler(irq,
895427bd 14520 &phba->sli4_hba.hba_eq_hdl[qidx]);
1ba981fd
JS
14521 if (hba_irq_rc == IRQ_HANDLED)
14522 hba_handled |= true;
14523 }
14524
67d12733 14525 return (hba_handled == true) ? IRQ_HANDLED : IRQ_NONE;
4f774513
JS
14526} /* lpfc_sli4_intr_handler */
14527
14528/**
14529 * lpfc_sli4_queue_free - free a queue structure and associated memory
14530 * @queue: The queue structure to free.
14531 *
b595076a 14532 * This function frees a queue structure and the DMAable memory used for
4f774513
JS
14533 * the host resident queue. This function must be called after destroying the
14534 * queue on the HBA.
14535 **/
14536void
14537lpfc_sli4_queue_free(struct lpfc_queue *queue)
14538{
14539 struct lpfc_dmabuf *dmabuf;
14540
14541 if (!queue)
14542 return;
14543
14544 while (!list_empty(&queue->page_list)) {
14545 list_remove_head(&queue->page_list, dmabuf, struct lpfc_dmabuf,
14546 list);
81b96eda 14547 dma_free_coherent(&queue->phba->pcidev->dev, queue->page_size,
4f774513
JS
14548 dmabuf->virt, dmabuf->phys);
14549 kfree(dmabuf);
14550 }
895427bd
JS
14551 if (queue->rqbp) {
14552 lpfc_free_rq_buffer(queue->phba, queue);
14553 kfree(queue->rqbp);
14554 }
d1f525aa
JS
14555
14556 if (!list_empty(&queue->wq_list))
14557 list_del(&queue->wq_list);
14558
4f774513
JS
14559 kfree(queue);
14560 return;
14561}
14562
14563/**
14564 * lpfc_sli4_queue_alloc - Allocate and initialize a queue structure
14565 * @phba: The HBA that this queue is being created on.
81b96eda 14566 * @page_size: The size of a queue page
4f774513
JS
14567 * @entry_size: The size of each queue entry for this queue.
14568 * @entry count: The number of entries that this queue will handle.
14569 *
14570 * This function allocates a queue structure and the DMAable memory used for
14571 * the host resident queue. This function must be called before creating the
14572 * queue on the HBA.
14573 **/
14574struct lpfc_queue *
81b96eda
JS
14575lpfc_sli4_queue_alloc(struct lpfc_hba *phba, uint32_t page_size,
14576 uint32_t entry_size, uint32_t entry_count)
4f774513
JS
14577{
14578 struct lpfc_queue *queue;
14579 struct lpfc_dmabuf *dmabuf;
14580 int x, total_qe_count;
14581 void *dma_pointer;
cb5172ea 14582 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
4f774513 14583
cb5172ea 14584 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 14585 hw_page_size = page_size;
cb5172ea 14586
4f774513
JS
14587 queue = kzalloc(sizeof(struct lpfc_queue) +
14588 (sizeof(union sli4_qe) * entry_count), GFP_KERNEL);
14589 if (!queue)
14590 return NULL;
cb5172ea
JS
14591 queue->page_count = (ALIGN(entry_size * entry_count,
14592 hw_page_size))/hw_page_size;
895427bd
JS
14593
14594 /* If needed, Adjust page count to match the max the adapter supports */
4e87eb2f
EM
14595 if (phba->sli4_hba.pc_sli4_params.wqpcnt &&
14596 (queue->page_count > phba->sli4_hba.pc_sli4_params.wqpcnt))
895427bd
JS
14597 queue->page_count = phba->sli4_hba.pc_sli4_params.wqpcnt;
14598
4f774513 14599 INIT_LIST_HEAD(&queue->list);
895427bd 14600 INIT_LIST_HEAD(&queue->wq_list);
6e8e1c14 14601 INIT_LIST_HEAD(&queue->wqfull_list);
4f774513
JS
14602 INIT_LIST_HEAD(&queue->page_list);
14603 INIT_LIST_HEAD(&queue->child_list);
81b96eda
JS
14604
14605 /* Set queue parameters now. If the system cannot provide memory
14606 * resources, the free routine needs to know what was allocated.
14607 */
14608 queue->entry_size = entry_size;
14609 queue->entry_count = entry_count;
14610 queue->page_size = hw_page_size;
14611 queue->phba = phba;
14612
4f774513
JS
14613 for (x = 0, total_qe_count = 0; x < queue->page_count; x++) {
14614 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
14615 if (!dmabuf)
14616 goto out_fail;
750afb08
LC
14617 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
14618 hw_page_size, &dmabuf->phys,
14619 GFP_KERNEL);
4f774513
JS
14620 if (!dmabuf->virt) {
14621 kfree(dmabuf);
14622 goto out_fail;
14623 }
14624 dmabuf->buffer_tag = x;
14625 list_add_tail(&dmabuf->list, &queue->page_list);
14626 /* initialize queue's entry array */
14627 dma_pointer = dmabuf->virt;
14628 for (; total_qe_count < entry_count &&
cb5172ea 14629 dma_pointer < (hw_page_size + dmabuf->virt);
4f774513
JS
14630 total_qe_count++, dma_pointer += entry_size) {
14631 queue->qe[total_qe_count].address = dma_pointer;
14632 }
14633 }
f485c18d
DK
14634 INIT_WORK(&queue->irqwork, lpfc_sli4_hba_process_cq);
14635 INIT_WORK(&queue->spwork, lpfc_sli4_sp_process_cq);
4f774513 14636
64eb4dcb
JS
14637 /* entry_repost will be set during q creation */
14638
4f774513
JS
14639 return queue;
14640out_fail:
14641 lpfc_sli4_queue_free(queue);
14642 return NULL;
14643}
14644
962bc51b
JS
14645/**
14646 * lpfc_dual_chute_pci_bar_map - Map pci base address register to host memory
14647 * @phba: HBA structure that indicates port to create a queue on.
14648 * @pci_barset: PCI BAR set flag.
14649 *
14650 * This function shall perform iomap of the specified PCI BAR address to host
14651 * memory address if not already done so and return it. The returned host
14652 * memory address can be NULL.
14653 */
14654static void __iomem *
14655lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset)
14656{
962bc51b
JS
14657 if (!phba->pcidev)
14658 return NULL;
962bc51b
JS
14659
14660 switch (pci_barset) {
14661 case WQ_PCI_BAR_0_AND_1:
962bc51b
JS
14662 return phba->pci_bar0_memmap_p;
14663 case WQ_PCI_BAR_2_AND_3:
962bc51b
JS
14664 return phba->pci_bar2_memmap_p;
14665 case WQ_PCI_BAR_4_AND_5:
962bc51b
JS
14666 return phba->pci_bar4_memmap_p;
14667 default:
14668 break;
14669 }
14670 return NULL;
14671}
14672
173edbb2 14673/**
895427bd 14674 * lpfc_modify_hba_eq_delay - Modify Delay Multiplier on FCP EQs
173edbb2
JS
14675 * @phba: HBA structure that indicates port to create a queue on.
14676 * @startq: The starting FCP EQ to modify
14677 *
14678 * This function sends an MODIFY_EQ_DELAY mailbox command to the HBA.
43140ca6
JS
14679 * The command allows up to LPFC_MAX_EQ_DELAY_EQID_CNT EQ ID's to be
14680 * updated in one mailbox command.
173edbb2
JS
14681 *
14682 * The @phba struct is used to send mailbox command to HBA. The @startq
14683 * is used to get the starting FCP EQ to change.
14684 * This function is asynchronous and will wait for the mailbox
14685 * command to finish before continuing.
14686 *
14687 * On success this function will return a zero. If unable to allocate enough
14688 * memory this function will return -ENOMEM. If the queue create mailbox command
14689 * fails this function will return -ENXIO.
14690 **/
a2fc4aef 14691int
0cf07f84
JS
14692lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
14693 uint32_t numq, uint32_t imax)
173edbb2
JS
14694{
14695 struct lpfc_mbx_modify_eq_delay *eq_delay;
14696 LPFC_MBOXQ_t *mbox;
14697 struct lpfc_queue *eq;
14698 int cnt, rc, length, status = 0;
14699 uint32_t shdr_status, shdr_add_status;
0cf07f84 14700 uint32_t result, val;
895427bd 14701 int qidx;
173edbb2
JS
14702 union lpfc_sli4_cfg_shdr *shdr;
14703 uint16_t dmult;
14704
895427bd 14705 if (startq >= phba->io_channel_irqs)
173edbb2
JS
14706 return 0;
14707
14708 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14709 if (!mbox)
14710 return -ENOMEM;
14711 length = (sizeof(struct lpfc_mbx_modify_eq_delay) -
14712 sizeof(struct lpfc_sli4_cfg_mhdr));
14713 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14714 LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY,
14715 length, LPFC_SLI4_MBX_EMBED);
14716 eq_delay = &mbox->u.mqe.un.eq_delay;
14717
14718 /* Calculate delay multiper from maximum interrupt per second */
0cf07f84 14719 result = imax / phba->io_channel_irqs;
895427bd 14720 if (result > LPFC_DMULT_CONST || result == 0)
ee02006b
JS
14721 dmult = 0;
14722 else
14723 dmult = LPFC_DMULT_CONST/result - 1;
0cf07f84
JS
14724 if (dmult > LPFC_DMULT_MAX)
14725 dmult = LPFC_DMULT_MAX;
173edbb2
JS
14726
14727 cnt = 0;
895427bd
JS
14728 for (qidx = startq; qidx < phba->io_channel_irqs; qidx++) {
14729 eq = phba->sli4_hba.hba_eq[qidx];
173edbb2
JS
14730 if (!eq)
14731 continue;
0cf07f84 14732 eq->q_mode = imax;
173edbb2
JS
14733 eq_delay->u.request.eq[cnt].eq_id = eq->queue_id;
14734 eq_delay->u.request.eq[cnt].phase = 0;
14735 eq_delay->u.request.eq[cnt].delay_multi = dmult;
14736 cnt++;
0cf07f84
JS
14737
14738 /* q_mode is only used for auto_imax */
14739 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
14740 /* Use EQ Delay Register method for q_mode */
14741
14742 /* Convert for EQ Delay register */
14743 val = phba->cfg_fcp_imax;
14744 if (val) {
14745 /* First, interrupts per sec per EQ */
14746 val = phba->cfg_fcp_imax /
14747 phba->io_channel_irqs;
14748
14749 /* us delay between each interrupt */
14750 val = LPFC_SEC_TO_USEC / val;
14751 }
14752 eq->q_mode = val;
14753 } else {
14754 eq->q_mode = imax;
14755 }
14756
14757 if (cnt >= numq)
173edbb2
JS
14758 break;
14759 }
14760 eq_delay->u.request.num_eq = cnt;
14761
14762 mbox->vport = phba->pport;
14763 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
14764 mbox->ctx_buf = NULL;
14765 mbox->ctx_ndlp = NULL;
173edbb2
JS
14766 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14767 shdr = (union lpfc_sli4_cfg_shdr *) &eq_delay->header.cfg_shdr;
14768 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14769 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14770 if (shdr_status || shdr_add_status || rc) {
14771 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14772 "2512 MODIFY_EQ_DELAY mailbox failed with "
14773 "status x%x add_status x%x, mbx status x%x\n",
14774 shdr_status, shdr_add_status, rc);
14775 status = -ENXIO;
14776 }
14777 mempool_free(mbox, phba->mbox_mem_pool);
14778 return status;
14779}
14780
4f774513
JS
14781/**
14782 * lpfc_eq_create - Create an Event Queue on the HBA
14783 * @phba: HBA structure that indicates port to create a queue on.
14784 * @eq: The queue structure to use to create the event queue.
14785 * @imax: The maximum interrupt per second limit.
14786 *
14787 * This function creates an event queue, as detailed in @eq, on a port,
14788 * described by @phba by sending an EQ_CREATE mailbox command to the HBA.
14789 *
14790 * The @phba struct is used to send mailbox command to HBA. The @eq struct
14791 * is used to get the entry count and entry size that are necessary to
14792 * determine the number of pages to allocate and use for this queue. This
14793 * function will send the EQ_CREATE mailbox command to the HBA to setup the
14794 * event queue. This function is asynchronous and will wait for the mailbox
14795 * command to finish before continuing.
14796 *
14797 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14798 * memory this function will return -ENOMEM. If the queue create mailbox command
14799 * fails this function will return -ENXIO.
4f774513 14800 **/
a2fc4aef 14801int
ee02006b 14802lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
4f774513
JS
14803{
14804 struct lpfc_mbx_eq_create *eq_create;
14805 LPFC_MBOXQ_t *mbox;
14806 int rc, length, status = 0;
14807 struct lpfc_dmabuf *dmabuf;
14808 uint32_t shdr_status, shdr_add_status;
14809 union lpfc_sli4_cfg_shdr *shdr;
14810 uint16_t dmult;
49198b37
JS
14811 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14812
2e90f4b5
JS
14813 /* sanity check on queue memory */
14814 if (!eq)
14815 return -ENODEV;
49198b37
JS
14816 if (!phba->sli4_hba.pc_sli4_params.supported)
14817 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
14818
14819 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14820 if (!mbox)
14821 return -ENOMEM;
14822 length = (sizeof(struct lpfc_mbx_eq_create) -
14823 sizeof(struct lpfc_sli4_cfg_mhdr));
14824 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14825 LPFC_MBOX_OPCODE_EQ_CREATE,
14826 length, LPFC_SLI4_MBX_EMBED);
14827 eq_create = &mbox->u.mqe.un.eq_create;
7365f6fd 14828 shdr = (union lpfc_sli4_cfg_shdr *) &eq_create->header.cfg_shdr;
4f774513
JS
14829 bf_set(lpfc_mbx_eq_create_num_pages, &eq_create->u.request,
14830 eq->page_count);
14831 bf_set(lpfc_eq_context_size, &eq_create->u.request.context,
14832 LPFC_EQE_SIZE);
14833 bf_set(lpfc_eq_context_valid, &eq_create->u.request.context, 1);
7365f6fd
JS
14834
14835 /* Use version 2 of CREATE_EQ if eqav is set */
14836 if (phba->sli4_hba.pc_sli4_params.eqav) {
14837 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14838 LPFC_Q_CREATE_VERSION_2);
14839 bf_set(lpfc_eq_context_autovalid, &eq_create->u.request.context,
14840 phba->sli4_hba.pc_sli4_params.eqav);
14841 }
14842
2c9c5a00
JS
14843 /* don't setup delay multiplier using EQ_CREATE */
14844 dmult = 0;
4f774513
JS
14845 bf_set(lpfc_eq_context_delay_multi, &eq_create->u.request.context,
14846 dmult);
14847 switch (eq->entry_count) {
14848 default:
14849 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14850 "0360 Unsupported EQ count. (%d)\n",
14851 eq->entry_count);
14852 if (eq->entry_count < 256)
14853 return -EINVAL;
5bd5f66c 14854 /* fall through - otherwise default to smallest count */
4f774513
JS
14855 case 256:
14856 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14857 LPFC_EQ_CNT_256);
14858 break;
14859 case 512:
14860 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14861 LPFC_EQ_CNT_512);
14862 break;
14863 case 1024:
14864 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14865 LPFC_EQ_CNT_1024);
14866 break;
14867 case 2048:
14868 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14869 LPFC_EQ_CNT_2048);
14870 break;
14871 case 4096:
14872 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14873 LPFC_EQ_CNT_4096);
14874 break;
14875 }
14876 list_for_each_entry(dmabuf, &eq->page_list, list) {
49198b37 14877 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
14878 eq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
14879 putPaddrLow(dmabuf->phys);
14880 eq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
14881 putPaddrHigh(dmabuf->phys);
14882 }
14883 mbox->vport = phba->pport;
14884 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
14885 mbox->ctx_buf = NULL;
14886 mbox->ctx_ndlp = NULL;
4f774513 14887 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
4f774513
JS
14888 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14889 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14890 if (shdr_status || shdr_add_status || rc) {
14891 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14892 "2500 EQ_CREATE mailbox failed with "
14893 "status x%x add_status x%x, mbx status x%x\n",
14894 shdr_status, shdr_add_status, rc);
14895 status = -ENXIO;
14896 }
14897 eq->type = LPFC_EQ;
14898 eq->subtype = LPFC_NONE;
14899 eq->queue_id = bf_get(lpfc_mbx_eq_create_q_id, &eq_create->u.response);
14900 if (eq->queue_id == 0xFFFF)
14901 status = -ENXIO;
14902 eq->host_index = 0;
14903 eq->hba_index = 0;
64eb4dcb 14904 eq->entry_repost = LPFC_EQ_REPOST;
4f774513 14905
8fa38513 14906 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
14907 return status;
14908}
14909
14910/**
14911 * lpfc_cq_create - Create a Completion Queue on the HBA
14912 * @phba: HBA structure that indicates port to create a queue on.
14913 * @cq: The queue structure to use to create the completion queue.
14914 * @eq: The event queue to bind this completion queue to.
14915 *
14916 * This function creates a completion queue, as detailed in @wq, on a port,
14917 * described by @phba by sending a CQ_CREATE mailbox command to the HBA.
14918 *
14919 * The @phba struct is used to send mailbox command to HBA. The @cq struct
14920 * is used to get the entry count and entry size that are necessary to
14921 * determine the number of pages to allocate and use for this queue. The @eq
14922 * is used to indicate which event queue to bind this completion queue to. This
14923 * function will send the CQ_CREATE mailbox command to the HBA to setup the
14924 * completion queue. This function is asynchronous and will wait for the mailbox
14925 * command to finish before continuing.
14926 *
14927 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14928 * memory this function will return -ENOMEM. If the queue create mailbox command
14929 * fails this function will return -ENXIO.
4f774513 14930 **/
a2fc4aef 14931int
4f774513
JS
14932lpfc_cq_create(struct lpfc_hba *phba, struct lpfc_queue *cq,
14933 struct lpfc_queue *eq, uint32_t type, uint32_t subtype)
14934{
14935 struct lpfc_mbx_cq_create *cq_create;
14936 struct lpfc_dmabuf *dmabuf;
14937 LPFC_MBOXQ_t *mbox;
14938 int rc, length, status = 0;
14939 uint32_t shdr_status, shdr_add_status;
14940 union lpfc_sli4_cfg_shdr *shdr;
49198b37 14941
2e90f4b5
JS
14942 /* sanity check on queue memory */
14943 if (!cq || !eq)
14944 return -ENODEV;
49198b37 14945
4f774513
JS
14946 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14947 if (!mbox)
14948 return -ENOMEM;
14949 length = (sizeof(struct lpfc_mbx_cq_create) -
14950 sizeof(struct lpfc_sli4_cfg_mhdr));
14951 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14952 LPFC_MBOX_OPCODE_CQ_CREATE,
14953 length, LPFC_SLI4_MBX_EMBED);
14954 cq_create = &mbox->u.mqe.un.cq_create;
5a6f133e 14955 shdr = (union lpfc_sli4_cfg_shdr *) &cq_create->header.cfg_shdr;
4f774513
JS
14956 bf_set(lpfc_mbx_cq_create_num_pages, &cq_create->u.request,
14957 cq->page_count);
14958 bf_set(lpfc_cq_context_event, &cq_create->u.request.context, 1);
14959 bf_set(lpfc_cq_context_valid, &cq_create->u.request.context, 1);
5a6f133e
JS
14960 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14961 phba->sli4_hba.pc_sli4_params.cqv);
14962 if (phba->sli4_hba.pc_sli4_params.cqv == LPFC_Q_CREATE_VERSION_2) {
81b96eda
JS
14963 bf_set(lpfc_mbx_cq_create_page_size, &cq_create->u.request,
14964 (cq->page_size / SLI4_PAGE_SIZE));
5a6f133e
JS
14965 bf_set(lpfc_cq_eq_id_2, &cq_create->u.request.context,
14966 eq->queue_id);
7365f6fd
JS
14967 bf_set(lpfc_cq_context_autovalid, &cq_create->u.request.context,
14968 phba->sli4_hba.pc_sli4_params.cqav);
5a6f133e
JS
14969 } else {
14970 bf_set(lpfc_cq_eq_id, &cq_create->u.request.context,
14971 eq->queue_id);
14972 }
4f774513 14973 switch (cq->entry_count) {
81b96eda
JS
14974 case 2048:
14975 case 4096:
14976 if (phba->sli4_hba.pc_sli4_params.cqv ==
14977 LPFC_Q_CREATE_VERSION_2) {
14978 cq_create->u.request.context.lpfc_cq_context_count =
14979 cq->entry_count;
14980 bf_set(lpfc_cq_context_count,
14981 &cq_create->u.request.context,
14982 LPFC_CQ_CNT_WORD7);
14983 break;
14984 }
5bd5f66c 14985 /* fall through */
4f774513
JS
14986 default:
14987 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2ea259ee 14988 "0361 Unsupported CQ count: "
64eb4dcb 14989 "entry cnt %d sz %d pg cnt %d\n",
2ea259ee 14990 cq->entry_count, cq->entry_size,
64eb4dcb 14991 cq->page_count);
4f4c1863
JS
14992 if (cq->entry_count < 256) {
14993 status = -EINVAL;
14994 goto out;
14995 }
5bd5f66c 14996 /* fall through - otherwise default to smallest count */
4f774513
JS
14997 case 256:
14998 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14999 LPFC_CQ_CNT_256);
15000 break;
15001 case 512:
15002 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
15003 LPFC_CQ_CNT_512);
15004 break;
15005 case 1024:
15006 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
15007 LPFC_CQ_CNT_1024);
15008 break;
15009 }
15010 list_for_each_entry(dmabuf, &cq->page_list, list) {
81b96eda 15011 memset(dmabuf->virt, 0, cq->page_size);
4f774513
JS
15012 cq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15013 putPaddrLow(dmabuf->phys);
15014 cq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15015 putPaddrHigh(dmabuf->phys);
15016 }
15017 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15018
15019 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15020 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15021 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15022 if (shdr_status || shdr_add_status || rc) {
15023 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15024 "2501 CQ_CREATE mailbox failed with "
15025 "status x%x add_status x%x, mbx status x%x\n",
15026 shdr_status, shdr_add_status, rc);
15027 status = -ENXIO;
15028 goto out;
15029 }
15030 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
15031 if (cq->queue_id == 0xFFFF) {
15032 status = -ENXIO;
15033 goto out;
15034 }
15035 /* link the cq onto the parent eq child list */
15036 list_add_tail(&cq->list, &eq->child_list);
15037 /* Set up completion queue's type and subtype */
15038 cq->type = type;
15039 cq->subtype = subtype;
15040 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
2a622bfb 15041 cq->assoc_qid = eq->queue_id;
4f774513
JS
15042 cq->host_index = 0;
15043 cq->hba_index = 0;
64eb4dcb 15044 cq->entry_repost = LPFC_CQ_REPOST;
4f774513 15045
8fa38513
JS
15046out:
15047 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15048 return status;
15049}
15050
2d7dbc4c
JS
15051/**
15052 * lpfc_cq_create_set - Create a set of Completion Queues on the HBA for MRQ
15053 * @phba: HBA structure that indicates port to create a queue on.
15054 * @cqp: The queue structure array to use to create the completion queues.
15055 * @eqp: The event queue array to bind these completion queues to.
15056 *
15057 * This function creates a set of completion queue, s to support MRQ
15058 * as detailed in @cqp, on a port,
15059 * described by @phba by sending a CREATE_CQ_SET mailbox command to the HBA.
15060 *
15061 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15062 * is used to get the entry count and entry size that are necessary to
15063 * determine the number of pages to allocate and use for this queue. The @eq
15064 * is used to indicate which event queue to bind this completion queue to. This
15065 * function will send the CREATE_CQ_SET mailbox command to the HBA to setup the
15066 * completion queue. This function is asynchronous and will wait for the mailbox
15067 * command to finish before continuing.
15068 *
15069 * On success this function will return a zero. If unable to allocate enough
15070 * memory this function will return -ENOMEM. If the queue create mailbox command
15071 * fails this function will return -ENXIO.
15072 **/
15073int
15074lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
15075 struct lpfc_queue **eqp, uint32_t type, uint32_t subtype)
15076{
15077 struct lpfc_queue *cq;
15078 struct lpfc_queue *eq;
15079 struct lpfc_mbx_cq_create_set *cq_set;
15080 struct lpfc_dmabuf *dmabuf;
15081 LPFC_MBOXQ_t *mbox;
15082 int rc, length, alloclen, status = 0;
15083 int cnt, idx, numcq, page_idx = 0;
15084 uint32_t shdr_status, shdr_add_status;
15085 union lpfc_sli4_cfg_shdr *shdr;
15086 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
15087
15088 /* sanity check on queue memory */
15089 numcq = phba->cfg_nvmet_mrq;
15090 if (!cqp || !eqp || !numcq)
15091 return -ENODEV;
2d7dbc4c
JS
15092
15093 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15094 if (!mbox)
15095 return -ENOMEM;
15096
15097 length = sizeof(struct lpfc_mbx_cq_create_set);
15098 length += ((numcq * cqp[0]->page_count) *
15099 sizeof(struct dma_address));
15100 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15101 LPFC_MBOX_OPCODE_FCOE_CQ_CREATE_SET, length,
15102 LPFC_SLI4_MBX_NEMBED);
15103 if (alloclen < length) {
15104 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15105 "3098 Allocated DMA memory size (%d) is "
15106 "less than the requested DMA memory size "
15107 "(%d)\n", alloclen, length);
15108 status = -ENOMEM;
15109 goto out;
15110 }
15111 cq_set = mbox->sge_array->addr[0];
15112 shdr = (union lpfc_sli4_cfg_shdr *)&cq_set->cfg_shdr;
15113 bf_set(lpfc_mbox_hdr_version, &shdr->request, 0);
15114
15115 for (idx = 0; idx < numcq; idx++) {
15116 cq = cqp[idx];
15117 eq = eqp[idx];
15118 if (!cq || !eq) {
15119 status = -ENOMEM;
15120 goto out;
15121 }
81b96eda
JS
15122 if (!phba->sli4_hba.pc_sli4_params.supported)
15123 hw_page_size = cq->page_size;
2d7dbc4c
JS
15124
15125 switch (idx) {
15126 case 0:
15127 bf_set(lpfc_mbx_cq_create_set_page_size,
15128 &cq_set->u.request,
15129 (hw_page_size / SLI4_PAGE_SIZE));
15130 bf_set(lpfc_mbx_cq_create_set_num_pages,
15131 &cq_set->u.request, cq->page_count);
15132 bf_set(lpfc_mbx_cq_create_set_evt,
15133 &cq_set->u.request, 1);
15134 bf_set(lpfc_mbx_cq_create_set_valid,
15135 &cq_set->u.request, 1);
15136 bf_set(lpfc_mbx_cq_create_set_cqe_size,
15137 &cq_set->u.request, 0);
15138 bf_set(lpfc_mbx_cq_create_set_num_cq,
15139 &cq_set->u.request, numcq);
7365f6fd
JS
15140 bf_set(lpfc_mbx_cq_create_set_autovalid,
15141 &cq_set->u.request,
15142 phba->sli4_hba.pc_sli4_params.cqav);
2d7dbc4c 15143 switch (cq->entry_count) {
81b96eda
JS
15144 case 2048:
15145 case 4096:
15146 if (phba->sli4_hba.pc_sli4_params.cqv ==
15147 LPFC_Q_CREATE_VERSION_2) {
15148 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15149 &cq_set->u.request,
15150 cq->entry_count);
15151 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15152 &cq_set->u.request,
15153 LPFC_CQ_CNT_WORD7);
15154 break;
15155 }
5bd5f66c 15156 /* fall through */
2d7dbc4c
JS
15157 default:
15158 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15159 "3118 Bad CQ count. (%d)\n",
15160 cq->entry_count);
15161 if (cq->entry_count < 256) {
15162 status = -EINVAL;
15163 goto out;
15164 }
5bd5f66c 15165 /* fall through - otherwise default to smallest */
2d7dbc4c
JS
15166 case 256:
15167 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15168 &cq_set->u.request, LPFC_CQ_CNT_256);
15169 break;
15170 case 512:
15171 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15172 &cq_set->u.request, LPFC_CQ_CNT_512);
15173 break;
15174 case 1024:
15175 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15176 &cq_set->u.request, LPFC_CQ_CNT_1024);
15177 break;
15178 }
15179 bf_set(lpfc_mbx_cq_create_set_eq_id0,
15180 &cq_set->u.request, eq->queue_id);
15181 break;
15182 case 1:
15183 bf_set(lpfc_mbx_cq_create_set_eq_id1,
15184 &cq_set->u.request, eq->queue_id);
15185 break;
15186 case 2:
15187 bf_set(lpfc_mbx_cq_create_set_eq_id2,
15188 &cq_set->u.request, eq->queue_id);
15189 break;
15190 case 3:
15191 bf_set(lpfc_mbx_cq_create_set_eq_id3,
15192 &cq_set->u.request, eq->queue_id);
15193 break;
15194 case 4:
15195 bf_set(lpfc_mbx_cq_create_set_eq_id4,
15196 &cq_set->u.request, eq->queue_id);
15197 break;
15198 case 5:
15199 bf_set(lpfc_mbx_cq_create_set_eq_id5,
15200 &cq_set->u.request, eq->queue_id);
15201 break;
15202 case 6:
15203 bf_set(lpfc_mbx_cq_create_set_eq_id6,
15204 &cq_set->u.request, eq->queue_id);
15205 break;
15206 case 7:
15207 bf_set(lpfc_mbx_cq_create_set_eq_id7,
15208 &cq_set->u.request, eq->queue_id);
15209 break;
15210 case 8:
15211 bf_set(lpfc_mbx_cq_create_set_eq_id8,
15212 &cq_set->u.request, eq->queue_id);
15213 break;
15214 case 9:
15215 bf_set(lpfc_mbx_cq_create_set_eq_id9,
15216 &cq_set->u.request, eq->queue_id);
15217 break;
15218 case 10:
15219 bf_set(lpfc_mbx_cq_create_set_eq_id10,
15220 &cq_set->u.request, eq->queue_id);
15221 break;
15222 case 11:
15223 bf_set(lpfc_mbx_cq_create_set_eq_id11,
15224 &cq_set->u.request, eq->queue_id);
15225 break;
15226 case 12:
15227 bf_set(lpfc_mbx_cq_create_set_eq_id12,
15228 &cq_set->u.request, eq->queue_id);
15229 break;
15230 case 13:
15231 bf_set(lpfc_mbx_cq_create_set_eq_id13,
15232 &cq_set->u.request, eq->queue_id);
15233 break;
15234 case 14:
15235 bf_set(lpfc_mbx_cq_create_set_eq_id14,
15236 &cq_set->u.request, eq->queue_id);
15237 break;
15238 case 15:
15239 bf_set(lpfc_mbx_cq_create_set_eq_id15,
15240 &cq_set->u.request, eq->queue_id);
15241 break;
15242 }
15243
15244 /* link the cq onto the parent eq child list */
15245 list_add_tail(&cq->list, &eq->child_list);
15246 /* Set up completion queue's type and subtype */
15247 cq->type = type;
15248 cq->subtype = subtype;
15249 cq->assoc_qid = eq->queue_id;
15250 cq->host_index = 0;
15251 cq->hba_index = 0;
64eb4dcb 15252 cq->entry_repost = LPFC_CQ_REPOST;
81b96eda 15253 cq->chann = idx;
2d7dbc4c
JS
15254
15255 rc = 0;
15256 list_for_each_entry(dmabuf, &cq->page_list, list) {
15257 memset(dmabuf->virt, 0, hw_page_size);
15258 cnt = page_idx + dmabuf->buffer_tag;
15259 cq_set->u.request.page[cnt].addr_lo =
15260 putPaddrLow(dmabuf->phys);
15261 cq_set->u.request.page[cnt].addr_hi =
15262 putPaddrHigh(dmabuf->phys);
15263 rc++;
15264 }
15265 page_idx += rc;
15266 }
15267
15268 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15269
15270 /* The IOCTL status is embedded in the mailbox subheader. */
15271 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15272 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15273 if (shdr_status || shdr_add_status || rc) {
15274 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15275 "3119 CQ_CREATE_SET mailbox failed with "
15276 "status x%x add_status x%x, mbx status x%x\n",
15277 shdr_status, shdr_add_status, rc);
15278 status = -ENXIO;
15279 goto out;
15280 }
15281 rc = bf_get(lpfc_mbx_cq_create_set_base_id, &cq_set->u.response);
15282 if (rc == 0xFFFF) {
15283 status = -ENXIO;
15284 goto out;
15285 }
15286
15287 for (idx = 0; idx < numcq; idx++) {
15288 cq = cqp[idx];
15289 cq->queue_id = rc + idx;
15290 }
15291
15292out:
15293 lpfc_sli4_mbox_cmd_free(phba, mbox);
15294 return status;
15295}
15296
b19a061a
JS
15297/**
15298 * lpfc_mq_create_fb_init - Send MCC_CREATE without async events registration
15299 * @phba: HBA structure that indicates port to create a queue on.
15300 * @mq: The queue structure to use to create the mailbox queue.
15301 * @mbox: An allocated pointer to type LPFC_MBOXQ_t
15302 * @cq: The completion queue to associate with this cq.
15303 *
15304 * This function provides failback (fb) functionality when the
15305 * mq_create_ext fails on older FW generations. It's purpose is identical
15306 * to mq_create_ext otherwise.
15307 *
15308 * This routine cannot fail as all attributes were previously accessed and
15309 * initialized in mq_create_ext.
15310 **/
15311static void
15312lpfc_mq_create_fb_init(struct lpfc_hba *phba, struct lpfc_queue *mq,
15313 LPFC_MBOXQ_t *mbox, struct lpfc_queue *cq)
15314{
15315 struct lpfc_mbx_mq_create *mq_create;
15316 struct lpfc_dmabuf *dmabuf;
15317 int length;
15318
15319 length = (sizeof(struct lpfc_mbx_mq_create) -
15320 sizeof(struct lpfc_sli4_cfg_mhdr));
15321 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15322 LPFC_MBOX_OPCODE_MQ_CREATE,
15323 length, LPFC_SLI4_MBX_EMBED);
15324 mq_create = &mbox->u.mqe.un.mq_create;
15325 bf_set(lpfc_mbx_mq_create_num_pages, &mq_create->u.request,
15326 mq->page_count);
15327 bf_set(lpfc_mq_context_cq_id, &mq_create->u.request.context,
15328 cq->queue_id);
15329 bf_set(lpfc_mq_context_valid, &mq_create->u.request.context, 1);
15330 switch (mq->entry_count) {
15331 case 16:
5a6f133e
JS
15332 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15333 LPFC_MQ_RING_SIZE_16);
b19a061a
JS
15334 break;
15335 case 32:
5a6f133e
JS
15336 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15337 LPFC_MQ_RING_SIZE_32);
b19a061a
JS
15338 break;
15339 case 64:
5a6f133e
JS
15340 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15341 LPFC_MQ_RING_SIZE_64);
b19a061a
JS
15342 break;
15343 case 128:
5a6f133e
JS
15344 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15345 LPFC_MQ_RING_SIZE_128);
b19a061a
JS
15346 break;
15347 }
15348 list_for_each_entry(dmabuf, &mq->page_list, list) {
15349 mq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15350 putPaddrLow(dmabuf->phys);
15351 mq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15352 putPaddrHigh(dmabuf->phys);
15353 }
15354}
15355
04c68496
JS
15356/**
15357 * lpfc_mq_create - Create a mailbox Queue on the HBA
15358 * @phba: HBA structure that indicates port to create a queue on.
15359 * @mq: The queue structure to use to create the mailbox queue.
b19a061a
JS
15360 * @cq: The completion queue to associate with this cq.
15361 * @subtype: The queue's subtype.
04c68496
JS
15362 *
15363 * This function creates a mailbox queue, as detailed in @mq, on a port,
15364 * described by @phba by sending a MQ_CREATE mailbox command to the HBA.
15365 *
15366 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15367 * is used to get the entry count and entry size that are necessary to
15368 * determine the number of pages to allocate and use for this queue. This
15369 * function will send the MQ_CREATE mailbox command to the HBA to setup the
15370 * mailbox queue. This function is asynchronous and will wait for the mailbox
15371 * command to finish before continuing.
15372 *
15373 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15374 * memory this function will return -ENOMEM. If the queue create mailbox command
15375 * fails this function will return -ENXIO.
04c68496 15376 **/
b19a061a 15377int32_t
04c68496
JS
15378lpfc_mq_create(struct lpfc_hba *phba, struct lpfc_queue *mq,
15379 struct lpfc_queue *cq, uint32_t subtype)
15380{
15381 struct lpfc_mbx_mq_create *mq_create;
b19a061a 15382 struct lpfc_mbx_mq_create_ext *mq_create_ext;
04c68496
JS
15383 struct lpfc_dmabuf *dmabuf;
15384 LPFC_MBOXQ_t *mbox;
15385 int rc, length, status = 0;
15386 uint32_t shdr_status, shdr_add_status;
15387 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15388 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
04c68496 15389
2e90f4b5
JS
15390 /* sanity check on queue memory */
15391 if (!mq || !cq)
15392 return -ENODEV;
49198b37
JS
15393 if (!phba->sli4_hba.pc_sli4_params.supported)
15394 hw_page_size = SLI4_PAGE_SIZE;
b19a061a 15395
04c68496
JS
15396 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15397 if (!mbox)
15398 return -ENOMEM;
b19a061a 15399 length = (sizeof(struct lpfc_mbx_mq_create_ext) -
04c68496
JS
15400 sizeof(struct lpfc_sli4_cfg_mhdr));
15401 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
b19a061a 15402 LPFC_MBOX_OPCODE_MQ_CREATE_EXT,
04c68496 15403 length, LPFC_SLI4_MBX_EMBED);
b19a061a
JS
15404
15405 mq_create_ext = &mbox->u.mqe.un.mq_create_ext;
5a6f133e 15406 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create_ext->header.cfg_shdr;
70f3c073
JS
15407 bf_set(lpfc_mbx_mq_create_ext_num_pages,
15408 &mq_create_ext->u.request, mq->page_count);
15409 bf_set(lpfc_mbx_mq_create_ext_async_evt_link,
15410 &mq_create_ext->u.request, 1);
15411 bf_set(lpfc_mbx_mq_create_ext_async_evt_fip,
b19a061a
JS
15412 &mq_create_ext->u.request, 1);
15413 bf_set(lpfc_mbx_mq_create_ext_async_evt_group5,
15414 &mq_create_ext->u.request, 1);
70f3c073
JS
15415 bf_set(lpfc_mbx_mq_create_ext_async_evt_fc,
15416 &mq_create_ext->u.request, 1);
15417 bf_set(lpfc_mbx_mq_create_ext_async_evt_sli,
15418 &mq_create_ext->u.request, 1);
b19a061a 15419 bf_set(lpfc_mq_context_valid, &mq_create_ext->u.request.context, 1);
5a6f133e
JS
15420 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15421 phba->sli4_hba.pc_sli4_params.mqv);
15422 if (phba->sli4_hba.pc_sli4_params.mqv == LPFC_Q_CREATE_VERSION_1)
15423 bf_set(lpfc_mbx_mq_create_ext_cq_id, &mq_create_ext->u.request,
15424 cq->queue_id);
15425 else
15426 bf_set(lpfc_mq_context_cq_id, &mq_create_ext->u.request.context,
15427 cq->queue_id);
04c68496
JS
15428 switch (mq->entry_count) {
15429 default:
15430 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15431 "0362 Unsupported MQ count. (%d)\n",
15432 mq->entry_count);
4f4c1863
JS
15433 if (mq->entry_count < 16) {
15434 status = -EINVAL;
15435 goto out;
15436 }
5bd5f66c 15437 /* fall through - otherwise default to smallest count */
04c68496 15438 case 16:
5a6f133e
JS
15439 bf_set(lpfc_mq_context_ring_size,
15440 &mq_create_ext->u.request.context,
15441 LPFC_MQ_RING_SIZE_16);
04c68496
JS
15442 break;
15443 case 32:
5a6f133e
JS
15444 bf_set(lpfc_mq_context_ring_size,
15445 &mq_create_ext->u.request.context,
15446 LPFC_MQ_RING_SIZE_32);
04c68496
JS
15447 break;
15448 case 64:
5a6f133e
JS
15449 bf_set(lpfc_mq_context_ring_size,
15450 &mq_create_ext->u.request.context,
15451 LPFC_MQ_RING_SIZE_64);
04c68496
JS
15452 break;
15453 case 128:
5a6f133e
JS
15454 bf_set(lpfc_mq_context_ring_size,
15455 &mq_create_ext->u.request.context,
15456 LPFC_MQ_RING_SIZE_128);
04c68496
JS
15457 break;
15458 }
15459 list_for_each_entry(dmabuf, &mq->page_list, list) {
49198b37 15460 memset(dmabuf->virt, 0, hw_page_size);
b19a061a 15461 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_lo =
04c68496 15462 putPaddrLow(dmabuf->phys);
b19a061a 15463 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_hi =
04c68496
JS
15464 putPaddrHigh(dmabuf->phys);
15465 }
15466 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
b19a061a
JS
15467 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15468 &mq_create_ext->u.response);
15469 if (rc != MBX_SUCCESS) {
15470 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15471 "2795 MQ_CREATE_EXT failed with "
15472 "status x%x. Failback to MQ_CREATE.\n",
15473 rc);
15474 lpfc_mq_create_fb_init(phba, mq, mbox, cq);
15475 mq_create = &mbox->u.mqe.un.mq_create;
15476 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15477 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create->header.cfg_shdr;
15478 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15479 &mq_create->u.response);
15480 }
15481
04c68496 15482 /* The IOCTL status is embedded in the mailbox subheader. */
04c68496
JS
15483 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15484 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15485 if (shdr_status || shdr_add_status || rc) {
15486 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15487 "2502 MQ_CREATE mailbox failed with "
15488 "status x%x add_status x%x, mbx status x%x\n",
15489 shdr_status, shdr_add_status, rc);
15490 status = -ENXIO;
15491 goto out;
15492 }
04c68496
JS
15493 if (mq->queue_id == 0xFFFF) {
15494 status = -ENXIO;
15495 goto out;
15496 }
15497 mq->type = LPFC_MQ;
2a622bfb 15498 mq->assoc_qid = cq->queue_id;
04c68496
JS
15499 mq->subtype = subtype;
15500 mq->host_index = 0;
15501 mq->hba_index = 0;
64eb4dcb 15502 mq->entry_repost = LPFC_MQ_REPOST;
04c68496
JS
15503
15504 /* link the mq onto the parent cq child list */
15505 list_add_tail(&mq->list, &cq->child_list);
15506out:
8fa38513 15507 mempool_free(mbox, phba->mbox_mem_pool);
04c68496
JS
15508 return status;
15509}
15510
4f774513
JS
15511/**
15512 * lpfc_wq_create - Create a Work Queue on the HBA
15513 * @phba: HBA structure that indicates port to create a queue on.
15514 * @wq: The queue structure to use to create the work queue.
15515 * @cq: The completion queue to bind this work queue to.
15516 * @subtype: The subtype of the work queue indicating its functionality.
15517 *
15518 * This function creates a work queue, as detailed in @wq, on a port, described
15519 * by @phba by sending a WQ_CREATE mailbox command to the HBA.
15520 *
15521 * The @phba struct is used to send mailbox command to HBA. The @wq struct
15522 * is used to get the entry count and entry size that are necessary to
15523 * determine the number of pages to allocate and use for this queue. The @cq
15524 * is used to indicate which completion queue to bind this work queue to. This
15525 * function will send the WQ_CREATE mailbox command to the HBA to setup the
15526 * work queue. This function is asynchronous and will wait for the mailbox
15527 * command to finish before continuing.
15528 *
15529 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15530 * memory this function will return -ENOMEM. If the queue create mailbox command
15531 * fails this function will return -ENXIO.
4f774513 15532 **/
a2fc4aef 15533int
4f774513
JS
15534lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq,
15535 struct lpfc_queue *cq, uint32_t subtype)
15536{
15537 struct lpfc_mbx_wq_create *wq_create;
15538 struct lpfc_dmabuf *dmabuf;
15539 LPFC_MBOXQ_t *mbox;
15540 int rc, length, status = 0;
15541 uint32_t shdr_status, shdr_add_status;
15542 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15543 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
5a6f133e 15544 struct dma_address *page;
962bc51b
JS
15545 void __iomem *bar_memmap_p;
15546 uint32_t db_offset;
15547 uint16_t pci_barset;
1351e69f
JS
15548 uint8_t dpp_barset;
15549 uint32_t dpp_offset;
15550 unsigned long pg_addr;
81b96eda 15551 uint8_t wq_create_version;
49198b37 15552
2e90f4b5
JS
15553 /* sanity check on queue memory */
15554 if (!wq || !cq)
15555 return -ENODEV;
49198b37 15556 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 15557 hw_page_size = wq->page_size;
4f774513
JS
15558
15559 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15560 if (!mbox)
15561 return -ENOMEM;
15562 length = (sizeof(struct lpfc_mbx_wq_create) -
15563 sizeof(struct lpfc_sli4_cfg_mhdr));
15564 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15565 LPFC_MBOX_OPCODE_FCOE_WQ_CREATE,
15566 length, LPFC_SLI4_MBX_EMBED);
15567 wq_create = &mbox->u.mqe.un.wq_create;
5a6f133e 15568 shdr = (union lpfc_sli4_cfg_shdr *) &wq_create->header.cfg_shdr;
4f774513
JS
15569 bf_set(lpfc_mbx_wq_create_num_pages, &wq_create->u.request,
15570 wq->page_count);
15571 bf_set(lpfc_mbx_wq_create_cq_id, &wq_create->u.request,
15572 cq->queue_id);
0c651878
JS
15573
15574 /* wqv is the earliest version supported, NOT the latest */
5a6f133e
JS
15575 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15576 phba->sli4_hba.pc_sli4_params.wqv);
962bc51b 15577
c176ffa0
JS
15578 if ((phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT) ||
15579 (wq->page_size > SLI4_PAGE_SIZE))
81b96eda
JS
15580 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15581 else
15582 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15583
0c651878 15584
1351e69f
JS
15585 if (phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT)
15586 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15587 else
15588 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15589
15590 switch (wq_create_version) {
0c651878 15591 case LPFC_Q_CREATE_VERSION_1:
5a6f133e
JS
15592 bf_set(lpfc_mbx_wq_create_wqe_count, &wq_create->u.request_1,
15593 wq->entry_count);
3f247de7
JS
15594 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15595 LPFC_Q_CREATE_VERSION_1);
15596
5a6f133e
JS
15597 switch (wq->entry_size) {
15598 default:
15599 case 64:
15600 bf_set(lpfc_mbx_wq_create_wqe_size,
15601 &wq_create->u.request_1,
15602 LPFC_WQ_WQE_SIZE_64);
15603 break;
15604 case 128:
15605 bf_set(lpfc_mbx_wq_create_wqe_size,
15606 &wq_create->u.request_1,
15607 LPFC_WQ_WQE_SIZE_128);
15608 break;
15609 }
1351e69f
JS
15610 /* Request DPP by default */
15611 bf_set(lpfc_mbx_wq_create_dpp_req, &wq_create->u.request_1, 1);
8ea73db4
JS
15612 bf_set(lpfc_mbx_wq_create_page_size,
15613 &wq_create->u.request_1,
81b96eda 15614 (wq->page_size / SLI4_PAGE_SIZE));
5a6f133e 15615 page = wq_create->u.request_1.page;
0c651878
JS
15616 break;
15617 default:
1351e69f
JS
15618 page = wq_create->u.request.page;
15619 break;
5a6f133e 15620 }
0c651878 15621
4f774513 15622 list_for_each_entry(dmabuf, &wq->page_list, list) {
49198b37 15623 memset(dmabuf->virt, 0, hw_page_size);
5a6f133e
JS
15624 page[dmabuf->buffer_tag].addr_lo = putPaddrLow(dmabuf->phys);
15625 page[dmabuf->buffer_tag].addr_hi = putPaddrHigh(dmabuf->phys);
4f774513 15626 }
962bc51b
JS
15627
15628 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15629 bf_set(lpfc_mbx_wq_create_dua, &wq_create->u.request, 1);
15630
4f774513
JS
15631 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15632 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15633 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15634 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15635 if (shdr_status || shdr_add_status || rc) {
15636 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15637 "2503 WQ_CREATE mailbox failed with "
15638 "status x%x add_status x%x, mbx status x%x\n",
15639 shdr_status, shdr_add_status, rc);
15640 status = -ENXIO;
15641 goto out;
15642 }
1351e69f
JS
15643
15644 if (wq_create_version == LPFC_Q_CREATE_VERSION_0)
15645 wq->queue_id = bf_get(lpfc_mbx_wq_create_q_id,
15646 &wq_create->u.response);
15647 else
15648 wq->queue_id = bf_get(lpfc_mbx_wq_create_v1_q_id,
15649 &wq_create->u.response_1);
15650
4f774513
JS
15651 if (wq->queue_id == 0xFFFF) {
15652 status = -ENXIO;
15653 goto out;
15654 }
1351e69f
JS
15655
15656 wq->db_format = LPFC_DB_LIST_FORMAT;
15657 if (wq_create_version == LPFC_Q_CREATE_VERSION_0) {
15658 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15659 wq->db_format = bf_get(lpfc_mbx_wq_create_db_format,
15660 &wq_create->u.response);
15661 if ((wq->db_format != LPFC_DB_LIST_FORMAT) &&
15662 (wq->db_format != LPFC_DB_RING_FORMAT)) {
15663 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15664 "3265 WQ[%d] doorbell format "
15665 "not supported: x%x\n",
15666 wq->queue_id, wq->db_format);
15667 status = -EINVAL;
15668 goto out;
15669 }
15670 pci_barset = bf_get(lpfc_mbx_wq_create_bar_set,
15671 &wq_create->u.response);
15672 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15673 pci_barset);
15674 if (!bar_memmap_p) {
15675 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15676 "3263 WQ[%d] failed to memmap "
15677 "pci barset:x%x\n",
15678 wq->queue_id, pci_barset);
15679 status = -ENOMEM;
15680 goto out;
15681 }
15682 db_offset = wq_create->u.response.doorbell_offset;
15683 if ((db_offset != LPFC_ULP0_WQ_DOORBELL) &&
15684 (db_offset != LPFC_ULP1_WQ_DOORBELL)) {
15685 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15686 "3252 WQ[%d] doorbell offset "
15687 "not supported: x%x\n",
15688 wq->queue_id, db_offset);
15689 status = -EINVAL;
15690 goto out;
15691 }
15692 wq->db_regaddr = bar_memmap_p + db_offset;
15693 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15694 "3264 WQ[%d]: barset:x%x, offset:x%x, "
15695 "format:x%x\n", wq->queue_id,
15696 pci_barset, db_offset, wq->db_format);
15697 } else
15698 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15699 } else {
1351e69f
JS
15700 /* Check if DPP was honored by the firmware */
15701 wq->dpp_enable = bf_get(lpfc_mbx_wq_create_dpp_rsp,
15702 &wq_create->u.response_1);
15703 if (wq->dpp_enable) {
15704 pci_barset = bf_get(lpfc_mbx_wq_create_v1_bar_set,
15705 &wq_create->u.response_1);
15706 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15707 pci_barset);
15708 if (!bar_memmap_p) {
15709 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15710 "3267 WQ[%d] failed to memmap "
15711 "pci barset:x%x\n",
15712 wq->queue_id, pci_barset);
15713 status = -ENOMEM;
15714 goto out;
15715 }
15716 db_offset = wq_create->u.response_1.doorbell_offset;
15717 wq->db_regaddr = bar_memmap_p + db_offset;
15718 wq->dpp_id = bf_get(lpfc_mbx_wq_create_dpp_id,
15719 &wq_create->u.response_1);
15720 dpp_barset = bf_get(lpfc_mbx_wq_create_dpp_bar,
15721 &wq_create->u.response_1);
15722 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15723 dpp_barset);
15724 if (!bar_memmap_p) {
15725 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15726 "3268 WQ[%d] failed to memmap "
15727 "pci barset:x%x\n",
15728 wq->queue_id, dpp_barset);
15729 status = -ENOMEM;
15730 goto out;
15731 }
15732 dpp_offset = wq_create->u.response_1.dpp_offset;
15733 wq->dpp_regaddr = bar_memmap_p + dpp_offset;
15734 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15735 "3271 WQ[%d]: barset:x%x, offset:x%x, "
15736 "dpp_id:x%x dpp_barset:x%x "
15737 "dpp_offset:x%x\n",
15738 wq->queue_id, pci_barset, db_offset,
15739 wq->dpp_id, dpp_barset, dpp_offset);
15740
15741 /* Enable combined writes for DPP aperture */
15742 pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK;
15743#ifdef CONFIG_X86
15744 rc = set_memory_wc(pg_addr, 1);
15745 if (rc) {
15746 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15747 "3272 Cannot setup Combined "
15748 "Write on WQ[%d] - disable DPP\n",
15749 wq->queue_id);
15750 phba->cfg_enable_dpp = 0;
15751 }
15752#else
15753 phba->cfg_enable_dpp = 0;
15754#endif
15755 } else
15756 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15757 }
895427bd
JS
15758 wq->pring = kzalloc(sizeof(struct lpfc_sli_ring), GFP_KERNEL);
15759 if (wq->pring == NULL) {
15760 status = -ENOMEM;
15761 goto out;
15762 }
4f774513 15763 wq->type = LPFC_WQ;
2a622bfb 15764 wq->assoc_qid = cq->queue_id;
4f774513
JS
15765 wq->subtype = subtype;
15766 wq->host_index = 0;
15767 wq->hba_index = 0;
ff78d8f9 15768 wq->entry_repost = LPFC_RELEASE_NOTIFICATION_INTERVAL;
4f774513
JS
15769
15770 /* link the wq onto the parent cq child list */
15771 list_add_tail(&wq->list, &cq->child_list);
15772out:
8fa38513 15773 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15774 return status;
15775}
15776
15777/**
15778 * lpfc_rq_create - Create a Receive Queue on the HBA
15779 * @phba: HBA structure that indicates port to create a queue on.
15780 * @hrq: The queue structure to use to create the header receive queue.
15781 * @drq: The queue structure to use to create the data receive queue.
15782 * @cq: The completion queue to bind this work queue to.
15783 *
15784 * This function creates a receive buffer queue pair , as detailed in @hrq and
15785 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15786 * to the HBA.
15787 *
15788 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15789 * struct is used to get the entry count that is necessary to determine the
15790 * number of pages to use for this queue. The @cq is used to indicate which
15791 * completion queue to bind received buffers that are posted to these queues to.
15792 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15793 * receive queue pair. This function is asynchronous and will wait for the
15794 * mailbox command to finish before continuing.
15795 *
15796 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15797 * memory this function will return -ENOMEM. If the queue create mailbox command
15798 * fails this function will return -ENXIO.
4f774513 15799 **/
a2fc4aef 15800int
4f774513
JS
15801lpfc_rq_create(struct lpfc_hba *phba, struct lpfc_queue *hrq,
15802 struct lpfc_queue *drq, struct lpfc_queue *cq, uint32_t subtype)
15803{
15804 struct lpfc_mbx_rq_create *rq_create;
15805 struct lpfc_dmabuf *dmabuf;
15806 LPFC_MBOXQ_t *mbox;
15807 int rc, length, status = 0;
15808 uint32_t shdr_status, shdr_add_status;
15809 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15810 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
962bc51b
JS
15811 void __iomem *bar_memmap_p;
15812 uint32_t db_offset;
15813 uint16_t pci_barset;
49198b37 15814
2e90f4b5
JS
15815 /* sanity check on queue memory */
15816 if (!hrq || !drq || !cq)
15817 return -ENODEV;
49198b37
JS
15818 if (!phba->sli4_hba.pc_sli4_params.supported)
15819 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
15820
15821 if (hrq->entry_count != drq->entry_count)
15822 return -EINVAL;
15823 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15824 if (!mbox)
15825 return -ENOMEM;
15826 length = (sizeof(struct lpfc_mbx_rq_create) -
15827 sizeof(struct lpfc_sli4_cfg_mhdr));
15828 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15829 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15830 length, LPFC_SLI4_MBX_EMBED);
15831 rq_create = &mbox->u.mqe.un.rq_create;
5a6f133e
JS
15832 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
15833 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15834 phba->sli4_hba.pc_sli4_params.rqv);
15835 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15836 bf_set(lpfc_rq_context_rqe_count_1,
15837 &rq_create->u.request.context,
15838 hrq->entry_count);
15839 rq_create->u.request.context.buffer_size = LPFC_HDR_BUF_SIZE;
c31098ce
JS
15840 bf_set(lpfc_rq_context_rqe_size,
15841 &rq_create->u.request.context,
15842 LPFC_RQE_SIZE_8);
15843 bf_set(lpfc_rq_context_page_size,
15844 &rq_create->u.request.context,
8ea73db4 15845 LPFC_RQ_PAGE_SIZE_4096);
5a6f133e
JS
15846 } else {
15847 switch (hrq->entry_count) {
15848 default:
15849 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15850 "2535 Unsupported RQ count. (%d)\n",
15851 hrq->entry_count);
4f4c1863
JS
15852 if (hrq->entry_count < 512) {
15853 status = -EINVAL;
15854 goto out;
15855 }
5bd5f66c 15856 /* fall through - otherwise default to smallest count */
5a6f133e
JS
15857 case 512:
15858 bf_set(lpfc_rq_context_rqe_count,
15859 &rq_create->u.request.context,
15860 LPFC_RQ_RING_SIZE_512);
15861 break;
15862 case 1024:
15863 bf_set(lpfc_rq_context_rqe_count,
15864 &rq_create->u.request.context,
15865 LPFC_RQ_RING_SIZE_1024);
15866 break;
15867 case 2048:
15868 bf_set(lpfc_rq_context_rqe_count,
15869 &rq_create->u.request.context,
15870 LPFC_RQ_RING_SIZE_2048);
15871 break;
15872 case 4096:
15873 bf_set(lpfc_rq_context_rqe_count,
15874 &rq_create->u.request.context,
15875 LPFC_RQ_RING_SIZE_4096);
15876 break;
15877 }
15878 bf_set(lpfc_rq_context_buf_size, &rq_create->u.request.context,
15879 LPFC_HDR_BUF_SIZE);
4f774513
JS
15880 }
15881 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
15882 cq->queue_id);
15883 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
15884 hrq->page_count);
4f774513 15885 list_for_each_entry(dmabuf, &hrq->page_list, list) {
49198b37 15886 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
15887 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15888 putPaddrLow(dmabuf->phys);
15889 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15890 putPaddrHigh(dmabuf->phys);
15891 }
962bc51b
JS
15892 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15893 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
15894
4f774513
JS
15895 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15896 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15897 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15898 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15899 if (shdr_status || shdr_add_status || rc) {
15900 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15901 "2504 RQ_CREATE mailbox failed with "
15902 "status x%x add_status x%x, mbx status x%x\n",
15903 shdr_status, shdr_add_status, rc);
15904 status = -ENXIO;
15905 goto out;
15906 }
15907 hrq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15908 if (hrq->queue_id == 0xFFFF) {
15909 status = -ENXIO;
15910 goto out;
15911 }
962bc51b
JS
15912
15913 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15914 hrq->db_format = bf_get(lpfc_mbx_rq_create_db_format,
15915 &rq_create->u.response);
15916 if ((hrq->db_format != LPFC_DB_LIST_FORMAT) &&
15917 (hrq->db_format != LPFC_DB_RING_FORMAT)) {
15918 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15919 "3262 RQ [%d] doorbell format not "
15920 "supported: x%x\n", hrq->queue_id,
15921 hrq->db_format);
15922 status = -EINVAL;
15923 goto out;
15924 }
15925
15926 pci_barset = bf_get(lpfc_mbx_rq_create_bar_set,
15927 &rq_create->u.response);
15928 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba, pci_barset);
15929 if (!bar_memmap_p) {
15930 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15931 "3269 RQ[%d] failed to memmap pci "
15932 "barset:x%x\n", hrq->queue_id,
15933 pci_barset);
15934 status = -ENOMEM;
15935 goto out;
15936 }
15937
15938 db_offset = rq_create->u.response.doorbell_offset;
15939 if ((db_offset != LPFC_ULP0_RQ_DOORBELL) &&
15940 (db_offset != LPFC_ULP1_RQ_DOORBELL)) {
15941 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15942 "3270 RQ[%d] doorbell offset not "
15943 "supported: x%x\n", hrq->queue_id,
15944 db_offset);
15945 status = -EINVAL;
15946 goto out;
15947 }
15948 hrq->db_regaddr = bar_memmap_p + db_offset;
15949 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a22e7db3
JS
15950 "3266 RQ[qid:%d]: barset:x%x, offset:x%x, "
15951 "format:x%x\n", hrq->queue_id, pci_barset,
15952 db_offset, hrq->db_format);
962bc51b
JS
15953 } else {
15954 hrq->db_format = LPFC_DB_RING_FORMAT;
15955 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
15956 }
4f774513 15957 hrq->type = LPFC_HRQ;
2a622bfb 15958 hrq->assoc_qid = cq->queue_id;
4f774513
JS
15959 hrq->subtype = subtype;
15960 hrq->host_index = 0;
15961 hrq->hba_index = 0;
61f3d4bf 15962 hrq->entry_repost = LPFC_RQ_REPOST;
4f774513
JS
15963
15964 /* now create the data queue */
15965 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15966 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15967 length, LPFC_SLI4_MBX_EMBED);
5a6f133e
JS
15968 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15969 phba->sli4_hba.pc_sli4_params.rqv);
15970 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15971 bf_set(lpfc_rq_context_rqe_count_1,
c31098ce 15972 &rq_create->u.request.context, hrq->entry_count);
3c603be9
JS
15973 if (subtype == LPFC_NVMET)
15974 rq_create->u.request.context.buffer_size =
15975 LPFC_NVMET_DATA_BUF_SIZE;
15976 else
15977 rq_create->u.request.context.buffer_size =
15978 LPFC_DATA_BUF_SIZE;
c31098ce
JS
15979 bf_set(lpfc_rq_context_rqe_size, &rq_create->u.request.context,
15980 LPFC_RQE_SIZE_8);
15981 bf_set(lpfc_rq_context_page_size, &rq_create->u.request.context,
15982 (PAGE_SIZE/SLI4_PAGE_SIZE));
5a6f133e
JS
15983 } else {
15984 switch (drq->entry_count) {
15985 default:
15986 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15987 "2536 Unsupported RQ count. (%d)\n",
15988 drq->entry_count);
4f4c1863
JS
15989 if (drq->entry_count < 512) {
15990 status = -EINVAL;
15991 goto out;
15992 }
5bd5f66c 15993 /* fall through - otherwise default to smallest count */
5a6f133e
JS
15994 case 512:
15995 bf_set(lpfc_rq_context_rqe_count,
15996 &rq_create->u.request.context,
15997 LPFC_RQ_RING_SIZE_512);
15998 break;
15999 case 1024:
16000 bf_set(lpfc_rq_context_rqe_count,
16001 &rq_create->u.request.context,
16002 LPFC_RQ_RING_SIZE_1024);
16003 break;
16004 case 2048:
16005 bf_set(lpfc_rq_context_rqe_count,
16006 &rq_create->u.request.context,
16007 LPFC_RQ_RING_SIZE_2048);
16008 break;
16009 case 4096:
16010 bf_set(lpfc_rq_context_rqe_count,
16011 &rq_create->u.request.context,
16012 LPFC_RQ_RING_SIZE_4096);
16013 break;
16014 }
3c603be9
JS
16015 if (subtype == LPFC_NVMET)
16016 bf_set(lpfc_rq_context_buf_size,
16017 &rq_create->u.request.context,
16018 LPFC_NVMET_DATA_BUF_SIZE);
16019 else
16020 bf_set(lpfc_rq_context_buf_size,
16021 &rq_create->u.request.context,
16022 LPFC_DATA_BUF_SIZE);
4f774513
JS
16023 }
16024 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
16025 cq->queue_id);
16026 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
16027 drq->page_count);
4f774513
JS
16028 list_for_each_entry(dmabuf, &drq->page_list, list) {
16029 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
16030 putPaddrLow(dmabuf->phys);
16031 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
16032 putPaddrHigh(dmabuf->phys);
16033 }
962bc51b
JS
16034 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
16035 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
4f774513
JS
16036 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16037 /* The IOCTL status is embedded in the mailbox subheader. */
16038 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
16039 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16040 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16041 if (shdr_status || shdr_add_status || rc) {
16042 status = -ENXIO;
16043 goto out;
16044 }
16045 drq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16046 if (drq->queue_id == 0xFFFF) {
16047 status = -ENXIO;
16048 goto out;
16049 }
16050 drq->type = LPFC_DRQ;
2a622bfb 16051 drq->assoc_qid = cq->queue_id;
4f774513
JS
16052 drq->subtype = subtype;
16053 drq->host_index = 0;
16054 drq->hba_index = 0;
61f3d4bf 16055 drq->entry_repost = LPFC_RQ_REPOST;
4f774513
JS
16056
16057 /* link the header and data RQs onto the parent cq child list */
16058 list_add_tail(&hrq->list, &cq->child_list);
16059 list_add_tail(&drq->list, &cq->child_list);
16060
16061out:
8fa38513 16062 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
16063 return status;
16064}
16065
2d7dbc4c
JS
16066/**
16067 * lpfc_mrq_create - Create MRQ Receive Queues on the HBA
16068 * @phba: HBA structure that indicates port to create a queue on.
16069 * @hrqp: The queue structure array to use to create the header receive queues.
16070 * @drqp: The queue structure array to use to create the data receive queues.
16071 * @cqp: The completion queue array to bind these receive queues to.
16072 *
16073 * This function creates a receive buffer queue pair , as detailed in @hrq and
16074 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
16075 * to the HBA.
16076 *
16077 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
16078 * struct is used to get the entry count that is necessary to determine the
16079 * number of pages to use for this queue. The @cq is used to indicate which
16080 * completion queue to bind received buffers that are posted to these queues to.
16081 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
16082 * receive queue pair. This function is asynchronous and will wait for the
16083 * mailbox command to finish before continuing.
16084 *
16085 * On success this function will return a zero. If unable to allocate enough
16086 * memory this function will return -ENOMEM. If the queue create mailbox command
16087 * fails this function will return -ENXIO.
16088 **/
16089int
16090lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
16091 struct lpfc_queue **drqp, struct lpfc_queue **cqp,
16092 uint32_t subtype)
16093{
16094 struct lpfc_queue *hrq, *drq, *cq;
16095 struct lpfc_mbx_rq_create_v2 *rq_create;
16096 struct lpfc_dmabuf *dmabuf;
16097 LPFC_MBOXQ_t *mbox;
16098 int rc, length, alloclen, status = 0;
16099 int cnt, idx, numrq, page_idx = 0;
16100 uint32_t shdr_status, shdr_add_status;
16101 union lpfc_sli4_cfg_shdr *shdr;
16102 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
16103
16104 numrq = phba->cfg_nvmet_mrq;
16105 /* sanity check on array memory */
16106 if (!hrqp || !drqp || !cqp || !numrq)
16107 return -ENODEV;
16108 if (!phba->sli4_hba.pc_sli4_params.supported)
16109 hw_page_size = SLI4_PAGE_SIZE;
16110
16111 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16112 if (!mbox)
16113 return -ENOMEM;
16114
16115 length = sizeof(struct lpfc_mbx_rq_create_v2);
16116 length += ((2 * numrq * hrqp[0]->page_count) *
16117 sizeof(struct dma_address));
16118
16119 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16120 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE, length,
16121 LPFC_SLI4_MBX_NEMBED);
16122 if (alloclen < length) {
16123 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16124 "3099 Allocated DMA memory size (%d) is "
16125 "less than the requested DMA memory size "
16126 "(%d)\n", alloclen, length);
16127 status = -ENOMEM;
16128 goto out;
16129 }
16130
16131
16132
16133 rq_create = mbox->sge_array->addr[0];
16134 shdr = (union lpfc_sli4_cfg_shdr *)&rq_create->cfg_shdr;
16135
16136 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_Q_CREATE_VERSION_2);
16137 cnt = 0;
16138
16139 for (idx = 0; idx < numrq; idx++) {
16140 hrq = hrqp[idx];
16141 drq = drqp[idx];
16142 cq = cqp[idx];
16143
2d7dbc4c
JS
16144 /* sanity check on queue memory */
16145 if (!hrq || !drq || !cq) {
16146 status = -ENODEV;
16147 goto out;
16148 }
16149
7aabe84b
JS
16150 if (hrq->entry_count != drq->entry_count) {
16151 status = -EINVAL;
16152 goto out;
16153 }
16154
2d7dbc4c
JS
16155 if (idx == 0) {
16156 bf_set(lpfc_mbx_rq_create_num_pages,
16157 &rq_create->u.request,
16158 hrq->page_count);
16159 bf_set(lpfc_mbx_rq_create_rq_cnt,
16160 &rq_create->u.request, (numrq * 2));
16161 bf_set(lpfc_mbx_rq_create_dnb, &rq_create->u.request,
16162 1);
16163 bf_set(lpfc_rq_context_base_cq,
16164 &rq_create->u.request.context,
16165 cq->queue_id);
16166 bf_set(lpfc_rq_context_data_size,
16167 &rq_create->u.request.context,
3c603be9 16168 LPFC_NVMET_DATA_BUF_SIZE);
2d7dbc4c
JS
16169 bf_set(lpfc_rq_context_hdr_size,
16170 &rq_create->u.request.context,
16171 LPFC_HDR_BUF_SIZE);
16172 bf_set(lpfc_rq_context_rqe_count_1,
16173 &rq_create->u.request.context,
16174 hrq->entry_count);
16175 bf_set(lpfc_rq_context_rqe_size,
16176 &rq_create->u.request.context,
16177 LPFC_RQE_SIZE_8);
16178 bf_set(lpfc_rq_context_page_size,
16179 &rq_create->u.request.context,
16180 (PAGE_SIZE/SLI4_PAGE_SIZE));
16181 }
16182 rc = 0;
16183 list_for_each_entry(dmabuf, &hrq->page_list, list) {
16184 memset(dmabuf->virt, 0, hw_page_size);
16185 cnt = page_idx + dmabuf->buffer_tag;
16186 rq_create->u.request.page[cnt].addr_lo =
16187 putPaddrLow(dmabuf->phys);
16188 rq_create->u.request.page[cnt].addr_hi =
16189 putPaddrHigh(dmabuf->phys);
16190 rc++;
16191 }
16192 page_idx += rc;
16193
16194 rc = 0;
16195 list_for_each_entry(dmabuf, &drq->page_list, list) {
16196 memset(dmabuf->virt, 0, hw_page_size);
16197 cnt = page_idx + dmabuf->buffer_tag;
16198 rq_create->u.request.page[cnt].addr_lo =
16199 putPaddrLow(dmabuf->phys);
16200 rq_create->u.request.page[cnt].addr_hi =
16201 putPaddrHigh(dmabuf->phys);
16202 rc++;
16203 }
16204 page_idx += rc;
16205
16206 hrq->db_format = LPFC_DB_RING_FORMAT;
16207 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16208 hrq->type = LPFC_HRQ;
16209 hrq->assoc_qid = cq->queue_id;
16210 hrq->subtype = subtype;
16211 hrq->host_index = 0;
16212 hrq->hba_index = 0;
61f3d4bf 16213 hrq->entry_repost = LPFC_RQ_REPOST;
2d7dbc4c
JS
16214
16215 drq->db_format = LPFC_DB_RING_FORMAT;
16216 drq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16217 drq->type = LPFC_DRQ;
16218 drq->assoc_qid = cq->queue_id;
16219 drq->subtype = subtype;
16220 drq->host_index = 0;
16221 drq->hba_index = 0;
61f3d4bf 16222 drq->entry_repost = LPFC_RQ_REPOST;
2d7dbc4c
JS
16223
16224 list_add_tail(&hrq->list, &cq->child_list);
16225 list_add_tail(&drq->list, &cq->child_list);
16226 }
16227
16228 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16229 /* The IOCTL status is embedded in the mailbox subheader. */
16230 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16231 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16232 if (shdr_status || shdr_add_status || rc) {
16233 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16234 "3120 RQ_CREATE mailbox failed with "
16235 "status x%x add_status x%x, mbx status x%x\n",
16236 shdr_status, shdr_add_status, rc);
16237 status = -ENXIO;
16238 goto out;
16239 }
16240 rc = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16241 if (rc == 0xFFFF) {
16242 status = -ENXIO;
16243 goto out;
16244 }
16245
16246 /* Initialize all RQs with associated queue id */
16247 for (idx = 0; idx < numrq; idx++) {
16248 hrq = hrqp[idx];
16249 hrq->queue_id = rc + (2 * idx);
16250 drq = drqp[idx];
16251 drq->queue_id = rc + (2 * idx) + 1;
16252 }
16253
16254out:
16255 lpfc_sli4_mbox_cmd_free(phba, mbox);
16256 return status;
16257}
16258
4f774513
JS
16259/**
16260 * lpfc_eq_destroy - Destroy an event Queue on the HBA
16261 * @eq: The queue structure associated with the queue to destroy.
16262 *
16263 * This function destroys a queue, as detailed in @eq by sending an mailbox
16264 * command, specific to the type of queue, to the HBA.
16265 *
16266 * The @eq struct is used to get the queue ID of the queue to destroy.
16267 *
16268 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16269 * command fails this function will return -ENXIO.
4f774513 16270 **/
a2fc4aef 16271int
4f774513
JS
16272lpfc_eq_destroy(struct lpfc_hba *phba, struct lpfc_queue *eq)
16273{
16274 LPFC_MBOXQ_t *mbox;
16275 int rc, length, status = 0;
16276 uint32_t shdr_status, shdr_add_status;
16277 union lpfc_sli4_cfg_shdr *shdr;
16278
2e90f4b5 16279 /* sanity check on queue memory */
4f774513
JS
16280 if (!eq)
16281 return -ENODEV;
16282 mbox = mempool_alloc(eq->phba->mbox_mem_pool, GFP_KERNEL);
16283 if (!mbox)
16284 return -ENOMEM;
16285 length = (sizeof(struct lpfc_mbx_eq_destroy) -
16286 sizeof(struct lpfc_sli4_cfg_mhdr));
16287 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16288 LPFC_MBOX_OPCODE_EQ_DESTROY,
16289 length, LPFC_SLI4_MBX_EMBED);
16290 bf_set(lpfc_mbx_eq_destroy_q_id, &mbox->u.mqe.un.eq_destroy.u.request,
16291 eq->queue_id);
16292 mbox->vport = eq->phba->pport;
16293 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16294
16295 rc = lpfc_sli_issue_mbox(eq->phba, mbox, MBX_POLL);
16296 /* The IOCTL status is embedded in the mailbox subheader. */
16297 shdr = (union lpfc_sli4_cfg_shdr *)
16298 &mbox->u.mqe.un.eq_destroy.header.cfg_shdr;
16299 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16300 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16301 if (shdr_status || shdr_add_status || rc) {
16302 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16303 "2505 EQ_DESTROY mailbox failed with "
16304 "status x%x add_status x%x, mbx status x%x\n",
16305 shdr_status, shdr_add_status, rc);
16306 status = -ENXIO;
16307 }
16308
16309 /* Remove eq from any list */
16310 list_del_init(&eq->list);
8fa38513 16311 mempool_free(mbox, eq->phba->mbox_mem_pool);
4f774513
JS
16312 return status;
16313}
16314
16315/**
16316 * lpfc_cq_destroy - Destroy a Completion Queue on the HBA
16317 * @cq: The queue structure associated with the queue to destroy.
16318 *
16319 * This function destroys a queue, as detailed in @cq by sending an mailbox
16320 * command, specific to the type of queue, to the HBA.
16321 *
16322 * The @cq struct is used to get the queue ID of the queue to destroy.
16323 *
16324 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16325 * command fails this function will return -ENXIO.
4f774513 16326 **/
a2fc4aef 16327int
4f774513
JS
16328lpfc_cq_destroy(struct lpfc_hba *phba, struct lpfc_queue *cq)
16329{
16330 LPFC_MBOXQ_t *mbox;
16331 int rc, length, status = 0;
16332 uint32_t shdr_status, shdr_add_status;
16333 union lpfc_sli4_cfg_shdr *shdr;
16334
2e90f4b5 16335 /* sanity check on queue memory */
4f774513
JS
16336 if (!cq)
16337 return -ENODEV;
16338 mbox = mempool_alloc(cq->phba->mbox_mem_pool, GFP_KERNEL);
16339 if (!mbox)
16340 return -ENOMEM;
16341 length = (sizeof(struct lpfc_mbx_cq_destroy) -
16342 sizeof(struct lpfc_sli4_cfg_mhdr));
16343 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16344 LPFC_MBOX_OPCODE_CQ_DESTROY,
16345 length, LPFC_SLI4_MBX_EMBED);
16346 bf_set(lpfc_mbx_cq_destroy_q_id, &mbox->u.mqe.un.cq_destroy.u.request,
16347 cq->queue_id);
16348 mbox->vport = cq->phba->pport;
16349 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16350 rc = lpfc_sli_issue_mbox(cq->phba, mbox, MBX_POLL);
16351 /* The IOCTL status is embedded in the mailbox subheader. */
16352 shdr = (union lpfc_sli4_cfg_shdr *)
16353 &mbox->u.mqe.un.wq_create.header.cfg_shdr;
16354 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16355 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16356 if (shdr_status || shdr_add_status || rc) {
16357 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16358 "2506 CQ_DESTROY mailbox failed with "
16359 "status x%x add_status x%x, mbx status x%x\n",
16360 shdr_status, shdr_add_status, rc);
16361 status = -ENXIO;
16362 }
16363 /* Remove cq from any list */
16364 list_del_init(&cq->list);
8fa38513 16365 mempool_free(mbox, cq->phba->mbox_mem_pool);
4f774513
JS
16366 return status;
16367}
16368
04c68496
JS
16369/**
16370 * lpfc_mq_destroy - Destroy a Mailbox Queue on the HBA
16371 * @qm: The queue structure associated with the queue to destroy.
16372 *
16373 * This function destroys a queue, as detailed in @mq by sending an mailbox
16374 * command, specific to the type of queue, to the HBA.
16375 *
16376 * The @mq struct is used to get the queue ID of the queue to destroy.
16377 *
16378 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16379 * command fails this function will return -ENXIO.
04c68496 16380 **/
a2fc4aef 16381int
04c68496
JS
16382lpfc_mq_destroy(struct lpfc_hba *phba, struct lpfc_queue *mq)
16383{
16384 LPFC_MBOXQ_t *mbox;
16385 int rc, length, status = 0;
16386 uint32_t shdr_status, shdr_add_status;
16387 union lpfc_sli4_cfg_shdr *shdr;
16388
2e90f4b5 16389 /* sanity check on queue memory */
04c68496
JS
16390 if (!mq)
16391 return -ENODEV;
16392 mbox = mempool_alloc(mq->phba->mbox_mem_pool, GFP_KERNEL);
16393 if (!mbox)
16394 return -ENOMEM;
16395 length = (sizeof(struct lpfc_mbx_mq_destroy) -
16396 sizeof(struct lpfc_sli4_cfg_mhdr));
16397 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16398 LPFC_MBOX_OPCODE_MQ_DESTROY,
16399 length, LPFC_SLI4_MBX_EMBED);
16400 bf_set(lpfc_mbx_mq_destroy_q_id, &mbox->u.mqe.un.mq_destroy.u.request,
16401 mq->queue_id);
16402 mbox->vport = mq->phba->pport;
16403 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16404 rc = lpfc_sli_issue_mbox(mq->phba, mbox, MBX_POLL);
16405 /* The IOCTL status is embedded in the mailbox subheader. */
16406 shdr = (union lpfc_sli4_cfg_shdr *)
16407 &mbox->u.mqe.un.mq_destroy.header.cfg_shdr;
16408 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16409 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16410 if (shdr_status || shdr_add_status || rc) {
16411 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16412 "2507 MQ_DESTROY mailbox failed with "
16413 "status x%x add_status x%x, mbx status x%x\n",
16414 shdr_status, shdr_add_status, rc);
16415 status = -ENXIO;
16416 }
16417 /* Remove mq from any list */
16418 list_del_init(&mq->list);
8fa38513 16419 mempool_free(mbox, mq->phba->mbox_mem_pool);
04c68496
JS
16420 return status;
16421}
16422
4f774513
JS
16423/**
16424 * lpfc_wq_destroy - Destroy a Work Queue on the HBA
16425 * @wq: The queue structure associated with the queue to destroy.
16426 *
16427 * This function destroys a queue, as detailed in @wq by sending an mailbox
16428 * command, specific to the type of queue, to the HBA.
16429 *
16430 * The @wq struct is used to get the queue ID of the queue to destroy.
16431 *
16432 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16433 * command fails this function will return -ENXIO.
4f774513 16434 **/
a2fc4aef 16435int
4f774513
JS
16436lpfc_wq_destroy(struct lpfc_hba *phba, struct lpfc_queue *wq)
16437{
16438 LPFC_MBOXQ_t *mbox;
16439 int rc, length, status = 0;
16440 uint32_t shdr_status, shdr_add_status;
16441 union lpfc_sli4_cfg_shdr *shdr;
16442
2e90f4b5 16443 /* sanity check on queue memory */
4f774513
JS
16444 if (!wq)
16445 return -ENODEV;
16446 mbox = mempool_alloc(wq->phba->mbox_mem_pool, GFP_KERNEL);
16447 if (!mbox)
16448 return -ENOMEM;
16449 length = (sizeof(struct lpfc_mbx_wq_destroy) -
16450 sizeof(struct lpfc_sli4_cfg_mhdr));
16451 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16452 LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY,
16453 length, LPFC_SLI4_MBX_EMBED);
16454 bf_set(lpfc_mbx_wq_destroy_q_id, &mbox->u.mqe.un.wq_destroy.u.request,
16455 wq->queue_id);
16456 mbox->vport = wq->phba->pport;
16457 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16458 rc = lpfc_sli_issue_mbox(wq->phba, mbox, MBX_POLL);
16459 shdr = (union lpfc_sli4_cfg_shdr *)
16460 &mbox->u.mqe.un.wq_destroy.header.cfg_shdr;
16461 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16462 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16463 if (shdr_status || shdr_add_status || rc) {
16464 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16465 "2508 WQ_DESTROY mailbox failed with "
16466 "status x%x add_status x%x, mbx status x%x\n",
16467 shdr_status, shdr_add_status, rc);
16468 status = -ENXIO;
16469 }
16470 /* Remove wq from any list */
16471 list_del_init(&wq->list);
d1f525aa
JS
16472 kfree(wq->pring);
16473 wq->pring = NULL;
8fa38513 16474 mempool_free(mbox, wq->phba->mbox_mem_pool);
4f774513
JS
16475 return status;
16476}
16477
16478/**
16479 * lpfc_rq_destroy - Destroy a Receive Queue on the HBA
16480 * @rq: The queue structure associated with the queue to destroy.
16481 *
16482 * This function destroys a queue, as detailed in @rq by sending an mailbox
16483 * command, specific to the type of queue, to the HBA.
16484 *
16485 * The @rq struct is used to get the queue ID of the queue to destroy.
16486 *
16487 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16488 * command fails this function will return -ENXIO.
4f774513 16489 **/
a2fc4aef 16490int
4f774513
JS
16491lpfc_rq_destroy(struct lpfc_hba *phba, struct lpfc_queue *hrq,
16492 struct lpfc_queue *drq)
16493{
16494 LPFC_MBOXQ_t *mbox;
16495 int rc, length, status = 0;
16496 uint32_t shdr_status, shdr_add_status;
16497 union lpfc_sli4_cfg_shdr *shdr;
16498
2e90f4b5 16499 /* sanity check on queue memory */
4f774513
JS
16500 if (!hrq || !drq)
16501 return -ENODEV;
16502 mbox = mempool_alloc(hrq->phba->mbox_mem_pool, GFP_KERNEL);
16503 if (!mbox)
16504 return -ENOMEM;
16505 length = (sizeof(struct lpfc_mbx_rq_destroy) -
fedd3b7b 16506 sizeof(struct lpfc_sli4_cfg_mhdr));
4f774513
JS
16507 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16508 LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY,
16509 length, LPFC_SLI4_MBX_EMBED);
16510 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16511 hrq->queue_id);
16512 mbox->vport = hrq->phba->pport;
16513 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16514 rc = lpfc_sli_issue_mbox(hrq->phba, mbox, MBX_POLL);
16515 /* The IOCTL status is embedded in the mailbox subheader. */
16516 shdr = (union lpfc_sli4_cfg_shdr *)
16517 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16518 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16519 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16520 if (shdr_status || shdr_add_status || rc) {
16521 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16522 "2509 RQ_DESTROY mailbox failed with "
16523 "status x%x add_status x%x, mbx status x%x\n",
16524 shdr_status, shdr_add_status, rc);
16525 if (rc != MBX_TIMEOUT)
16526 mempool_free(mbox, hrq->phba->mbox_mem_pool);
16527 return -ENXIO;
16528 }
16529 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16530 drq->queue_id);
16531 rc = lpfc_sli_issue_mbox(drq->phba, mbox, MBX_POLL);
16532 shdr = (union lpfc_sli4_cfg_shdr *)
16533 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16534 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16535 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16536 if (shdr_status || shdr_add_status || rc) {
16537 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16538 "2510 RQ_DESTROY mailbox failed with "
16539 "status x%x add_status x%x, mbx status x%x\n",
16540 shdr_status, shdr_add_status, rc);
16541 status = -ENXIO;
16542 }
16543 list_del_init(&hrq->list);
16544 list_del_init(&drq->list);
8fa38513 16545 mempool_free(mbox, hrq->phba->mbox_mem_pool);
4f774513
JS
16546 return status;
16547}
16548
16549/**
16550 * lpfc_sli4_post_sgl - Post scatter gather list for an XRI to HBA
16551 * @phba: The virtual port for which this call being executed.
16552 * @pdma_phys_addr0: Physical address of the 1st SGL page.
16553 * @pdma_phys_addr1: Physical address of the 2nd SGL page.
16554 * @xritag: the xritag that ties this io to the SGL pages.
16555 *
16556 * This routine will post the sgl pages for the IO that has the xritag
16557 * that is in the iocbq structure. The xritag is assigned during iocbq
16558 * creation and persists for as long as the driver is loaded.
16559 * if the caller has fewer than 256 scatter gather segments to map then
16560 * pdma_phys_addr1 should be 0.
16561 * If the caller needs to map more than 256 scatter gather segment then
16562 * pdma_phys_addr1 should be a valid physical address.
16563 * physical address for SGLs must be 64 byte aligned.
16564 * If you are going to map 2 SGL's then the first one must have 256 entries
16565 * the second sgl can have between 1 and 256 entries.
16566 *
16567 * Return codes:
16568 * 0 - Success
16569 * -ENXIO, -ENOMEM - Failure
16570 **/
16571int
16572lpfc_sli4_post_sgl(struct lpfc_hba *phba,
16573 dma_addr_t pdma_phys_addr0,
16574 dma_addr_t pdma_phys_addr1,
16575 uint16_t xritag)
16576{
16577 struct lpfc_mbx_post_sgl_pages *post_sgl_pages;
16578 LPFC_MBOXQ_t *mbox;
16579 int rc;
16580 uint32_t shdr_status, shdr_add_status;
6d368e53 16581 uint32_t mbox_tmo;
4f774513
JS
16582 union lpfc_sli4_cfg_shdr *shdr;
16583
16584 if (xritag == NO_XRI) {
16585 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16586 "0364 Invalid param:\n");
16587 return -EINVAL;
16588 }
16589
16590 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16591 if (!mbox)
16592 return -ENOMEM;
16593
16594 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16595 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16596 sizeof(struct lpfc_mbx_post_sgl_pages) -
fedd3b7b 16597 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
4f774513
JS
16598
16599 post_sgl_pages = (struct lpfc_mbx_post_sgl_pages *)
16600 &mbox->u.mqe.un.post_sgl_pages;
16601 bf_set(lpfc_post_sgl_pages_xri, post_sgl_pages, xritag);
16602 bf_set(lpfc_post_sgl_pages_xricnt, post_sgl_pages, 1);
16603
16604 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_lo =
16605 cpu_to_le32(putPaddrLow(pdma_phys_addr0));
16606 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_hi =
16607 cpu_to_le32(putPaddrHigh(pdma_phys_addr0));
16608
16609 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_lo =
16610 cpu_to_le32(putPaddrLow(pdma_phys_addr1));
16611 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_hi =
16612 cpu_to_le32(putPaddrHigh(pdma_phys_addr1));
16613 if (!phba->sli4_hba.intr_enable)
16614 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6d368e53 16615 else {
a183a15f 16616 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
16617 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16618 }
4f774513
JS
16619 /* The IOCTL status is embedded in the mailbox subheader. */
16620 shdr = (union lpfc_sli4_cfg_shdr *) &post_sgl_pages->header.cfg_shdr;
16621 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16622 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16623 if (rc != MBX_TIMEOUT)
16624 mempool_free(mbox, phba->mbox_mem_pool);
16625 if (shdr_status || shdr_add_status || rc) {
16626 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16627 "2511 POST_SGL mailbox failed with "
16628 "status x%x add_status x%x, mbx status x%x\n",
16629 shdr_status, shdr_add_status, rc);
4f774513
JS
16630 }
16631 return 0;
16632}
4f774513 16633
6d368e53 16634/**
88a2cfbb 16635 * lpfc_sli4_alloc_xri - Get an available rpi in the device's range
6d368e53
JS
16636 * @phba: pointer to lpfc hba data structure.
16637 *
16638 * This routine is invoked to post rpi header templates to the
88a2cfbb
JS
16639 * HBA consistent with the SLI-4 interface spec. This routine
16640 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
16641 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6d368e53 16642 *
88a2cfbb
JS
16643 * Returns
16644 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
16645 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
16646 **/
5d8b8167 16647static uint16_t
6d368e53
JS
16648lpfc_sli4_alloc_xri(struct lpfc_hba *phba)
16649{
16650 unsigned long xri;
16651
16652 /*
16653 * Fetch the next logical xri. Because this index is logical,
16654 * the driver starts at 0 each time.
16655 */
16656 spin_lock_irq(&phba->hbalock);
16657 xri = find_next_zero_bit(phba->sli4_hba.xri_bmask,
16658 phba->sli4_hba.max_cfg_param.max_xri, 0);
16659 if (xri >= phba->sli4_hba.max_cfg_param.max_xri) {
16660 spin_unlock_irq(&phba->hbalock);
16661 return NO_XRI;
16662 } else {
16663 set_bit(xri, phba->sli4_hba.xri_bmask);
16664 phba->sli4_hba.max_cfg_param.xri_used++;
6d368e53 16665 }
6d368e53
JS
16666 spin_unlock_irq(&phba->hbalock);
16667 return xri;
16668}
16669
16670/**
16671 * lpfc_sli4_free_xri - Release an xri for reuse.
16672 * @phba: pointer to lpfc hba data structure.
16673 *
16674 * This routine is invoked to release an xri to the pool of
16675 * available rpis maintained by the driver.
16676 **/
5d8b8167 16677static void
6d368e53
JS
16678__lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16679{
16680 if (test_and_clear_bit(xri, phba->sli4_hba.xri_bmask)) {
6d368e53
JS
16681 phba->sli4_hba.max_cfg_param.xri_used--;
16682 }
16683}
16684
16685/**
16686 * lpfc_sli4_free_xri - Release an xri for reuse.
16687 * @phba: pointer to lpfc hba data structure.
16688 *
16689 * This routine is invoked to release an xri to the pool of
16690 * available rpis maintained by the driver.
16691 **/
16692void
16693lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16694{
16695 spin_lock_irq(&phba->hbalock);
16696 __lpfc_sli4_free_xri(phba, xri);
16697 spin_unlock_irq(&phba->hbalock);
16698}
16699
4f774513
JS
16700/**
16701 * lpfc_sli4_next_xritag - Get an xritag for the io
16702 * @phba: Pointer to HBA context object.
16703 *
16704 * This function gets an xritag for the iocb. If there is no unused xritag
16705 * it will return 0xffff.
16706 * The function returns the allocated xritag if successful, else returns zero.
16707 * Zero is not a valid xritag.
16708 * The caller is not required to hold any lock.
16709 **/
16710uint16_t
16711lpfc_sli4_next_xritag(struct lpfc_hba *phba)
16712{
6d368e53 16713 uint16_t xri_index;
4f774513 16714
6d368e53 16715 xri_index = lpfc_sli4_alloc_xri(phba);
81378052
JS
16716 if (xri_index == NO_XRI)
16717 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
16718 "2004 Failed to allocate XRI.last XRITAG is %d"
16719 " Max XRI is %d, Used XRI is %d\n",
16720 xri_index,
16721 phba->sli4_hba.max_cfg_param.max_xri,
16722 phba->sli4_hba.max_cfg_param.xri_used);
16723 return xri_index;
4f774513
JS
16724}
16725
16726/**
895427bd 16727 * lpfc_sli4_post_sgl_list - post a block of ELS sgls to the port.
4f774513 16728 * @phba: pointer to lpfc hba data structure.
8a9d2e80
JS
16729 * @post_sgl_list: pointer to els sgl entry list.
16730 * @count: number of els sgl entries on the list.
4f774513
JS
16731 *
16732 * This routine is invoked to post a block of driver's sgl pages to the
16733 * HBA using non-embedded mailbox command. No Lock is held. This routine
16734 * is only called when the driver is loading and after all IO has been
16735 * stopped.
16736 **/
8a9d2e80 16737static int
895427bd 16738lpfc_sli4_post_sgl_list(struct lpfc_hba *phba,
8a9d2e80
JS
16739 struct list_head *post_sgl_list,
16740 int post_cnt)
4f774513 16741{
8a9d2e80 16742 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
4f774513
JS
16743 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16744 struct sgl_page_pairs *sgl_pg_pairs;
16745 void *viraddr;
16746 LPFC_MBOXQ_t *mbox;
16747 uint32_t reqlen, alloclen, pg_pairs;
16748 uint32_t mbox_tmo;
8a9d2e80
JS
16749 uint16_t xritag_start = 0;
16750 int rc = 0;
4f774513
JS
16751 uint32_t shdr_status, shdr_add_status;
16752 union lpfc_sli4_cfg_shdr *shdr;
16753
895427bd 16754 reqlen = post_cnt * sizeof(struct sgl_page_pairs) +
4f774513 16755 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16756 if (reqlen > SLI4_PAGE_SIZE) {
895427bd 16757 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4f774513
JS
16758 "2559 Block sgl registration required DMA "
16759 "size (%d) great than a page\n", reqlen);
16760 return -ENOMEM;
16761 }
895427bd 16762
4f774513 16763 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6d368e53 16764 if (!mbox)
4f774513 16765 return -ENOMEM;
4f774513
JS
16766
16767 /* Allocate DMA memory and set up the non-embedded mailbox command */
16768 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16769 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES, reqlen,
16770 LPFC_SLI4_MBX_NEMBED);
16771
16772 if (alloclen < reqlen) {
16773 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16774 "0285 Allocated DMA memory size (%d) is "
16775 "less than the requested DMA memory "
16776 "size (%d)\n", alloclen, reqlen);
16777 lpfc_sli4_mbox_cmd_free(phba, mbox);
16778 return -ENOMEM;
16779 }
4f774513 16780 /* Set up the SGL pages in the non-embedded DMA pages */
6d368e53 16781 viraddr = mbox->sge_array->addr[0];
4f774513
JS
16782 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16783 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16784
8a9d2e80
JS
16785 pg_pairs = 0;
16786 list_for_each_entry_safe(sglq_entry, sglq_next, post_sgl_list, list) {
4f774513
JS
16787 /* Set up the sge entry */
16788 sgl_pg_pairs->sgl_pg0_addr_lo =
16789 cpu_to_le32(putPaddrLow(sglq_entry->phys));
16790 sgl_pg_pairs->sgl_pg0_addr_hi =
16791 cpu_to_le32(putPaddrHigh(sglq_entry->phys));
16792 sgl_pg_pairs->sgl_pg1_addr_lo =
16793 cpu_to_le32(putPaddrLow(0));
16794 sgl_pg_pairs->sgl_pg1_addr_hi =
16795 cpu_to_le32(putPaddrHigh(0));
6d368e53 16796
4f774513
JS
16797 /* Keep the first xritag on the list */
16798 if (pg_pairs == 0)
16799 xritag_start = sglq_entry->sli4_xritag;
16800 sgl_pg_pairs++;
8a9d2e80 16801 pg_pairs++;
4f774513 16802 }
6d368e53
JS
16803
16804 /* Complete initialization and perform endian conversion. */
4f774513 16805 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
895427bd 16806 bf_set(lpfc_post_sgl_pages_xricnt, sgl, post_cnt);
4f774513 16807 sgl->word0 = cpu_to_le32(sgl->word0);
895427bd 16808
4f774513
JS
16809 if (!phba->sli4_hba.intr_enable)
16810 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16811 else {
a183a15f 16812 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16813 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16814 }
16815 shdr = (union lpfc_sli4_cfg_shdr *) &sgl->cfg_shdr;
16816 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16817 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16818 if (rc != MBX_TIMEOUT)
16819 lpfc_sli4_mbox_cmd_free(phba, mbox);
16820 if (shdr_status || shdr_add_status || rc) {
16821 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16822 "2513 POST_SGL_BLOCK mailbox command failed "
16823 "status x%x add_status x%x mbx status x%x\n",
16824 shdr_status, shdr_add_status, rc);
16825 rc = -ENXIO;
16826 }
16827 return rc;
16828}
16829
16830/**
16831 * lpfc_sli4_post_scsi_sgl_block - post a block of scsi sgl list to firmware
16832 * @phba: pointer to lpfc hba data structure.
16833 * @sblist: pointer to scsi buffer list.
16834 * @count: number of scsi buffers on the list.
16835 *
16836 * This routine is invoked to post a block of @count scsi sgl pages from a
16837 * SCSI buffer list @sblist to the HBA using non-embedded mailbox command.
16838 * No Lock is held.
16839 *
16840 **/
16841int
8a9d2e80
JS
16842lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *phba,
16843 struct list_head *sblist,
16844 int count)
4f774513
JS
16845{
16846 struct lpfc_scsi_buf *psb;
16847 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16848 struct sgl_page_pairs *sgl_pg_pairs;
16849 void *viraddr;
16850 LPFC_MBOXQ_t *mbox;
16851 uint32_t reqlen, alloclen, pg_pairs;
16852 uint32_t mbox_tmo;
16853 uint16_t xritag_start = 0;
16854 int rc = 0;
16855 uint32_t shdr_status, shdr_add_status;
16856 dma_addr_t pdma_phys_bpl1;
16857 union lpfc_sli4_cfg_shdr *shdr;
16858
16859 /* Calculate the requested length of the dma memory */
8a9d2e80 16860 reqlen = count * sizeof(struct sgl_page_pairs) +
4f774513 16861 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16862 if (reqlen > SLI4_PAGE_SIZE) {
4f774513
JS
16863 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
16864 "0217 Block sgl registration required DMA "
16865 "size (%d) great than a page\n", reqlen);
16866 return -ENOMEM;
16867 }
16868 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16869 if (!mbox) {
16870 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16871 "0283 Failed to allocate mbox cmd memory\n");
16872 return -ENOMEM;
16873 }
16874
16875 /* Allocate DMA memory and set up the non-embedded mailbox command */
16876 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16877 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES, reqlen,
16878 LPFC_SLI4_MBX_NEMBED);
16879
16880 if (alloclen < reqlen) {
16881 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16882 "2561 Allocated DMA memory size (%d) is "
16883 "less than the requested DMA memory "
16884 "size (%d)\n", alloclen, reqlen);
16885 lpfc_sli4_mbox_cmd_free(phba, mbox);
16886 return -ENOMEM;
16887 }
6d368e53 16888
4f774513 16889 /* Get the first SGE entry from the non-embedded DMA memory */
4f774513
JS
16890 viraddr = mbox->sge_array->addr[0];
16891
16892 /* Set up the SGL pages in the non-embedded DMA pages */
16893 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16894 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16895
16896 pg_pairs = 0;
16897 list_for_each_entry(psb, sblist, list) {
16898 /* Set up the sge entry */
16899 sgl_pg_pairs->sgl_pg0_addr_lo =
16900 cpu_to_le32(putPaddrLow(psb->dma_phys_bpl));
16901 sgl_pg_pairs->sgl_pg0_addr_hi =
16902 cpu_to_le32(putPaddrHigh(psb->dma_phys_bpl));
16903 if (phba->cfg_sg_dma_buf_size > SGL_PAGE_SIZE)
16904 pdma_phys_bpl1 = psb->dma_phys_bpl + SGL_PAGE_SIZE;
16905 else
16906 pdma_phys_bpl1 = 0;
16907 sgl_pg_pairs->sgl_pg1_addr_lo =
16908 cpu_to_le32(putPaddrLow(pdma_phys_bpl1));
16909 sgl_pg_pairs->sgl_pg1_addr_hi =
16910 cpu_to_le32(putPaddrHigh(pdma_phys_bpl1));
16911 /* Keep the first xritag on the list */
16912 if (pg_pairs == 0)
16913 xritag_start = psb->cur_iocbq.sli4_xritag;
16914 sgl_pg_pairs++;
16915 pg_pairs++;
16916 }
16917 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
16918 bf_set(lpfc_post_sgl_pages_xricnt, sgl, pg_pairs);
16919 /* Perform endian conversion if necessary */
16920 sgl->word0 = cpu_to_le32(sgl->word0);
16921
16922 if (!phba->sli4_hba.intr_enable)
16923 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16924 else {
a183a15f 16925 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16926 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16927 }
16928 shdr = (union lpfc_sli4_cfg_shdr *) &sgl->cfg_shdr;
16929 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16930 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16931 if (rc != MBX_TIMEOUT)
16932 lpfc_sli4_mbox_cmd_free(phba, mbox);
16933 if (shdr_status || shdr_add_status || rc) {
16934 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16935 "2564 POST_SGL_BLOCK mailbox command failed "
16936 "status x%x add_status x%x mbx status x%x\n",
16937 shdr_status, shdr_add_status, rc);
16938 rc = -ENXIO;
16939 }
16940 return rc;
16941}
16942
16943/**
16944 * lpfc_fc_frame_check - Check that this frame is a valid frame to handle
16945 * @phba: pointer to lpfc_hba struct that the frame was received on
16946 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
16947 *
16948 * This function checks the fields in the @fc_hdr to see if the FC frame is a
16949 * valid type of frame that the LPFC driver will handle. This function will
16950 * return a zero if the frame is a valid frame or a non zero value when the
16951 * frame does not pass the check.
16952 **/
16953static int
16954lpfc_fc_frame_check(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr)
16955{
474ffb74 16956 /* make rctl_names static to save stack space */
4f774513 16957 struct fc_vft_header *fc_vft_hdr;
546fc854 16958 uint32_t *header = (uint32_t *) fc_hdr;
4f774513
JS
16959
16960 switch (fc_hdr->fh_r_ctl) {
16961 case FC_RCTL_DD_UNCAT: /* uncategorized information */
16962 case FC_RCTL_DD_SOL_DATA: /* solicited data */
16963 case FC_RCTL_DD_UNSOL_CTL: /* unsolicited control */
16964 case FC_RCTL_DD_SOL_CTL: /* solicited control or reply */
16965 case FC_RCTL_DD_UNSOL_DATA: /* unsolicited data */
16966 case FC_RCTL_DD_DATA_DESC: /* data descriptor */
16967 case FC_RCTL_DD_UNSOL_CMD: /* unsolicited command */
16968 case FC_RCTL_DD_CMD_STATUS: /* command status */
16969 case FC_RCTL_ELS_REQ: /* extended link services request */
16970 case FC_RCTL_ELS_REP: /* extended link services reply */
16971 case FC_RCTL_ELS4_REQ: /* FC-4 ELS request */
16972 case FC_RCTL_ELS4_REP: /* FC-4 ELS reply */
16973 case FC_RCTL_BA_NOP: /* basic link service NOP */
16974 case FC_RCTL_BA_ABTS: /* basic link service abort */
16975 case FC_RCTL_BA_RMC: /* remove connection */
16976 case FC_RCTL_BA_ACC: /* basic accept */
16977 case FC_RCTL_BA_RJT: /* basic reject */
16978 case FC_RCTL_BA_PRMT:
16979 case FC_RCTL_ACK_1: /* acknowledge_1 */
16980 case FC_RCTL_ACK_0: /* acknowledge_0 */
16981 case FC_RCTL_P_RJT: /* port reject */
16982 case FC_RCTL_F_RJT: /* fabric reject */
16983 case FC_RCTL_P_BSY: /* port busy */
16984 case FC_RCTL_F_BSY: /* fabric busy to data frame */
16985 case FC_RCTL_F_BSYL: /* fabric busy to link control frame */
16986 case FC_RCTL_LCR: /* link credit reset */
ae9e28f3 16987 case FC_RCTL_MDS_DIAGS: /* MDS Diagnostics */
4f774513
JS
16988 case FC_RCTL_END: /* end */
16989 break;
16990 case FC_RCTL_VFTH: /* Virtual Fabric tagging Header */
16991 fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
16992 fc_hdr = &((struct fc_frame_header *)fc_vft_hdr)[1];
16993 return lpfc_fc_frame_check(phba, fc_hdr);
16994 default:
16995 goto drop;
16996 }
ae9e28f3 16997
4f774513
JS
16998 switch (fc_hdr->fh_type) {
16999 case FC_TYPE_BLS:
17000 case FC_TYPE_ELS:
17001 case FC_TYPE_FCP:
17002 case FC_TYPE_CT:
895427bd 17003 case FC_TYPE_NVME:
4f774513
JS
17004 break;
17005 case FC_TYPE_IP:
17006 case FC_TYPE_ILS:
17007 default:
17008 goto drop;
17009 }
546fc854 17010
4f774513 17011 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
78e1d200 17012 "2538 Received frame rctl:x%x, type:x%x, "
88f43a08 17013 "frame Data:%08x %08x %08x %08x %08x %08x %08x\n",
78e1d200
JS
17014 fc_hdr->fh_r_ctl, fc_hdr->fh_type,
17015 be32_to_cpu(header[0]), be32_to_cpu(header[1]),
17016 be32_to_cpu(header[2]), be32_to_cpu(header[3]),
17017 be32_to_cpu(header[4]), be32_to_cpu(header[5]),
17018 be32_to_cpu(header[6]));
4f774513
JS
17019 return 0;
17020drop:
17021 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS,
78e1d200
JS
17022 "2539 Dropped frame rctl:x%x type:x%x\n",
17023 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
4f774513
JS
17024 return 1;
17025}
17026
17027/**
17028 * lpfc_fc_hdr_get_vfi - Get the VFI from an FC frame
17029 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17030 *
17031 * This function processes the FC header to retrieve the VFI from the VF
17032 * header, if one exists. This function will return the VFI if one exists
17033 * or 0 if no VSAN Header exists.
17034 **/
17035static uint32_t
17036lpfc_fc_hdr_get_vfi(struct fc_frame_header *fc_hdr)
17037{
17038 struct fc_vft_header *fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
17039
17040 if (fc_hdr->fh_r_ctl != FC_RCTL_VFTH)
17041 return 0;
17042 return bf_get(fc_vft_hdr_vf_id, fc_vft_hdr);
17043}
17044
17045/**
17046 * lpfc_fc_frame_to_vport - Finds the vport that a frame is destined to
17047 * @phba: Pointer to the HBA structure to search for the vport on
17048 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17049 * @fcfi: The FC Fabric ID that the frame came from
17050 *
17051 * This function searches the @phba for a vport that matches the content of the
17052 * @fc_hdr passed in and the @fcfi. This function uses the @fc_hdr to fetch the
17053 * VFI, if the Virtual Fabric Tagging Header exists, and the DID. This function
17054 * returns the matching vport pointer or NULL if unable to match frame to a
17055 * vport.
17056 **/
17057static struct lpfc_vport *
17058lpfc_fc_frame_to_vport(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr,
895427bd 17059 uint16_t fcfi, uint32_t did)
4f774513
JS
17060{
17061 struct lpfc_vport **vports;
17062 struct lpfc_vport *vport = NULL;
17063 int i;
939723a4 17064
bf08611b
JS
17065 if (did == Fabric_DID)
17066 return phba->pport;
939723a4
JS
17067 if ((phba->pport->fc_flag & FC_PT2PT) &&
17068 !(phba->link_state == LPFC_HBA_READY))
17069 return phba->pport;
17070
4f774513 17071 vports = lpfc_create_vport_work_array(phba);
895427bd 17072 if (vports != NULL) {
4f774513
JS
17073 for (i = 0; i <= phba->max_vpi && vports[i] != NULL; i++) {
17074 if (phba->fcf.fcfi == fcfi &&
17075 vports[i]->vfi == lpfc_fc_hdr_get_vfi(fc_hdr) &&
17076 vports[i]->fc_myDID == did) {
17077 vport = vports[i];
17078 break;
17079 }
17080 }
895427bd 17081 }
4f774513
JS
17082 lpfc_destroy_vport_work_array(phba, vports);
17083 return vport;
17084}
17085
45ed1190
JS
17086/**
17087 * lpfc_update_rcv_time_stamp - Update vport's rcv seq time stamp
17088 * @vport: The vport to work on.
17089 *
17090 * This function updates the receive sequence time stamp for this vport. The
17091 * receive sequence time stamp indicates the time that the last frame of the
17092 * the sequence that has been idle for the longest amount of time was received.
17093 * the driver uses this time stamp to indicate if any received sequences have
17094 * timed out.
17095 **/
5d8b8167 17096static void
45ed1190
JS
17097lpfc_update_rcv_time_stamp(struct lpfc_vport *vport)
17098{
17099 struct lpfc_dmabuf *h_buf;
17100 struct hbq_dmabuf *dmabuf = NULL;
17101
17102 /* get the oldest sequence on the rcv list */
17103 h_buf = list_get_first(&vport->rcv_buffer_list,
17104 struct lpfc_dmabuf, list);
17105 if (!h_buf)
17106 return;
17107 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17108 vport->rcv_buffer_time_stamp = dmabuf->time_stamp;
17109}
17110
17111/**
17112 * lpfc_cleanup_rcv_buffers - Cleans up all outstanding receive sequences.
17113 * @vport: The vport that the received sequences were sent to.
17114 *
17115 * This function cleans up all outstanding received sequences. This is called
17116 * by the driver when a link event or user action invalidates all the received
17117 * sequences.
17118 **/
17119void
17120lpfc_cleanup_rcv_buffers(struct lpfc_vport *vport)
17121{
17122 struct lpfc_dmabuf *h_buf, *hnext;
17123 struct lpfc_dmabuf *d_buf, *dnext;
17124 struct hbq_dmabuf *dmabuf = NULL;
17125
17126 /* start with the oldest sequence on the rcv list */
17127 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17128 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17129 list_del_init(&dmabuf->hbuf.list);
17130 list_for_each_entry_safe(d_buf, dnext,
17131 &dmabuf->dbuf.list, list) {
17132 list_del_init(&d_buf->list);
17133 lpfc_in_buf_free(vport->phba, d_buf);
17134 }
17135 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17136 }
17137}
17138
17139/**
17140 * lpfc_rcv_seq_check_edtov - Cleans up timed out receive sequences.
17141 * @vport: The vport that the received sequences were sent to.
17142 *
17143 * This function determines whether any received sequences have timed out by
17144 * first checking the vport's rcv_buffer_time_stamp. If this time_stamp
17145 * indicates that there is at least one timed out sequence this routine will
17146 * go through the received sequences one at a time from most inactive to most
17147 * active to determine which ones need to be cleaned up. Once it has determined
17148 * that a sequence needs to be cleaned up it will simply free up the resources
17149 * without sending an abort.
17150 **/
17151void
17152lpfc_rcv_seq_check_edtov(struct lpfc_vport *vport)
17153{
17154 struct lpfc_dmabuf *h_buf, *hnext;
17155 struct lpfc_dmabuf *d_buf, *dnext;
17156 struct hbq_dmabuf *dmabuf = NULL;
17157 unsigned long timeout;
17158 int abort_count = 0;
17159
17160 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17161 vport->rcv_buffer_time_stamp);
17162 if (list_empty(&vport->rcv_buffer_list) ||
17163 time_before(jiffies, timeout))
17164 return;
17165 /* start with the oldest sequence on the rcv list */
17166 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17167 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17168 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17169 dmabuf->time_stamp);
17170 if (time_before(jiffies, timeout))
17171 break;
17172 abort_count++;
17173 list_del_init(&dmabuf->hbuf.list);
17174 list_for_each_entry_safe(d_buf, dnext,
17175 &dmabuf->dbuf.list, list) {
17176 list_del_init(&d_buf->list);
17177 lpfc_in_buf_free(vport->phba, d_buf);
17178 }
17179 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17180 }
17181 if (abort_count)
17182 lpfc_update_rcv_time_stamp(vport);
17183}
17184
4f774513
JS
17185/**
17186 * lpfc_fc_frame_add - Adds a frame to the vport's list of received sequences
17187 * @dmabuf: pointer to a dmabuf that describes the hdr and data of the FC frame
17188 *
17189 * This function searches through the existing incomplete sequences that have
17190 * been sent to this @vport. If the frame matches one of the incomplete
17191 * sequences then the dbuf in the @dmabuf is added to the list of frames that
17192 * make up that sequence. If no sequence is found that matches this frame then
17193 * the function will add the hbuf in the @dmabuf to the @vport's rcv_buffer_list
17194 * This function returns a pointer to the first dmabuf in the sequence list that
17195 * the frame was linked to.
17196 **/
17197static struct hbq_dmabuf *
17198lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17199{
17200 struct fc_frame_header *new_hdr;
17201 struct fc_frame_header *temp_hdr;
17202 struct lpfc_dmabuf *d_buf;
17203 struct lpfc_dmabuf *h_buf;
17204 struct hbq_dmabuf *seq_dmabuf = NULL;
17205 struct hbq_dmabuf *temp_dmabuf = NULL;
4360ca9c 17206 uint8_t found = 0;
4f774513 17207
4d9ab994 17208 INIT_LIST_HEAD(&dmabuf->dbuf.list);
45ed1190 17209 dmabuf->time_stamp = jiffies;
4f774513 17210 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
4360ca9c 17211
4f774513
JS
17212 /* Use the hdr_buf to find the sequence that this frame belongs to */
17213 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17214 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17215 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17216 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17217 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17218 continue;
17219 /* found a pending sequence that matches this frame */
17220 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17221 break;
17222 }
17223 if (!seq_dmabuf) {
17224 /*
17225 * This indicates first frame received for this sequence.
17226 * Queue the buffer on the vport's rcv_buffer_list.
17227 */
17228 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
45ed1190 17229 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17230 return dmabuf;
17231 }
17232 temp_hdr = seq_dmabuf->hbuf.virt;
eeead811
JS
17233 if (be16_to_cpu(new_hdr->fh_seq_cnt) <
17234 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4d9ab994
JS
17235 list_del_init(&seq_dmabuf->hbuf.list);
17236 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
17237 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
45ed1190 17238 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17239 return dmabuf;
17240 }
45ed1190
JS
17241 /* move this sequence to the tail to indicate a young sequence */
17242 list_move_tail(&seq_dmabuf->hbuf.list, &vport->rcv_buffer_list);
17243 seq_dmabuf->time_stamp = jiffies;
17244 lpfc_update_rcv_time_stamp(vport);
eeead811
JS
17245 if (list_empty(&seq_dmabuf->dbuf.list)) {
17246 temp_hdr = dmabuf->hbuf.virt;
17247 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
17248 return seq_dmabuf;
17249 }
4f774513 17250 /* find the correct place in the sequence to insert this frame */
4360ca9c
JS
17251 d_buf = list_entry(seq_dmabuf->dbuf.list.prev, typeof(*d_buf), list);
17252 while (!found) {
4f774513
JS
17253 temp_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17254 temp_hdr = (struct fc_frame_header *)temp_dmabuf->hbuf.virt;
17255 /*
17256 * If the frame's sequence count is greater than the frame on
17257 * the list then insert the frame right after this frame
17258 */
eeead811
JS
17259 if (be16_to_cpu(new_hdr->fh_seq_cnt) >
17260 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4f774513 17261 list_add(&dmabuf->dbuf.list, &temp_dmabuf->dbuf.list);
4360ca9c
JS
17262 found = 1;
17263 break;
4f774513 17264 }
4360ca9c
JS
17265
17266 if (&d_buf->list == &seq_dmabuf->dbuf.list)
17267 break;
17268 d_buf = list_entry(d_buf->list.prev, typeof(*d_buf), list);
4f774513 17269 }
4360ca9c
JS
17270
17271 if (found)
17272 return seq_dmabuf;
4f774513
JS
17273 return NULL;
17274}
17275
6669f9bb
JS
17276/**
17277 * lpfc_sli4_abort_partial_seq - Abort partially assembled unsol sequence
17278 * @vport: pointer to a vitural port
17279 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17280 *
17281 * This function tries to abort from the partially assembed sequence, described
17282 * by the information from basic abbort @dmabuf. It checks to see whether such
17283 * partially assembled sequence held by the driver. If so, it shall free up all
17284 * the frames from the partially assembled sequence.
17285 *
17286 * Return
17287 * true -- if there is matching partially assembled sequence present and all
17288 * the frames freed with the sequence;
17289 * false -- if there is no matching partially assembled sequence present so
17290 * nothing got aborted in the lower layer driver
17291 **/
17292static bool
17293lpfc_sli4_abort_partial_seq(struct lpfc_vport *vport,
17294 struct hbq_dmabuf *dmabuf)
17295{
17296 struct fc_frame_header *new_hdr;
17297 struct fc_frame_header *temp_hdr;
17298 struct lpfc_dmabuf *d_buf, *n_buf, *h_buf;
17299 struct hbq_dmabuf *seq_dmabuf = NULL;
17300
17301 /* Use the hdr_buf to find the sequence that matches this frame */
17302 INIT_LIST_HEAD(&dmabuf->dbuf.list);
17303 INIT_LIST_HEAD(&dmabuf->hbuf.list);
17304 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17305 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17306 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17307 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17308 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17309 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17310 continue;
17311 /* found a pending sequence that matches this frame */
17312 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17313 break;
17314 }
17315
17316 /* Free up all the frames from the partially assembled sequence */
17317 if (seq_dmabuf) {
17318 list_for_each_entry_safe(d_buf, n_buf,
17319 &seq_dmabuf->dbuf.list, list) {
17320 list_del_init(&d_buf->list);
17321 lpfc_in_buf_free(vport->phba, d_buf);
17322 }
17323 return true;
17324 }
17325 return false;
17326}
17327
6dd9e31c
JS
17328/**
17329 * lpfc_sli4_abort_ulp_seq - Abort assembled unsol sequence from ulp
17330 * @vport: pointer to a vitural port
17331 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17332 *
17333 * This function tries to abort from the assembed sequence from upper level
17334 * protocol, described by the information from basic abbort @dmabuf. It
17335 * checks to see whether such pending context exists at upper level protocol.
17336 * If so, it shall clean up the pending context.
17337 *
17338 * Return
17339 * true -- if there is matching pending context of the sequence cleaned
17340 * at ulp;
17341 * false -- if there is no matching pending context of the sequence present
17342 * at ulp.
17343 **/
17344static bool
17345lpfc_sli4_abort_ulp_seq(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17346{
17347 struct lpfc_hba *phba = vport->phba;
17348 int handled;
17349
17350 /* Accepting abort at ulp with SLI4 only */
17351 if (phba->sli_rev < LPFC_SLI_REV4)
17352 return false;
17353
17354 /* Register all caring upper level protocols to attend abort */
17355 handled = lpfc_ct_handle_unsol_abort(phba, dmabuf);
17356 if (handled)
17357 return true;
17358
17359 return false;
17360}
17361
6669f9bb 17362/**
546fc854 17363 * lpfc_sli4_seq_abort_rsp_cmpl - BLS ABORT RSP seq abort iocb complete handler
6669f9bb
JS
17364 * @phba: Pointer to HBA context object.
17365 * @cmd_iocbq: pointer to the command iocbq structure.
17366 * @rsp_iocbq: pointer to the response iocbq structure.
17367 *
546fc854 17368 * This function handles the sequence abort response iocb command complete
6669f9bb
JS
17369 * event. It properly releases the memory allocated to the sequence abort
17370 * accept iocb.
17371 **/
17372static void
546fc854 17373lpfc_sli4_seq_abort_rsp_cmpl(struct lpfc_hba *phba,
6669f9bb
JS
17374 struct lpfc_iocbq *cmd_iocbq,
17375 struct lpfc_iocbq *rsp_iocbq)
17376{
6dd9e31c
JS
17377 struct lpfc_nodelist *ndlp;
17378
17379 if (cmd_iocbq) {
17380 ndlp = (struct lpfc_nodelist *)cmd_iocbq->context1;
17381 lpfc_nlp_put(ndlp);
17382 lpfc_nlp_not_used(ndlp);
6669f9bb 17383 lpfc_sli_release_iocbq(phba, cmd_iocbq);
6dd9e31c 17384 }
6b5151fd
JS
17385
17386 /* Failure means BLS ABORT RSP did not get delivered to remote node*/
17387 if (rsp_iocbq && rsp_iocbq->iocb.ulpStatus)
17388 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17389 "3154 BLS ABORT RSP failed, data: x%x/x%x\n",
17390 rsp_iocbq->iocb.ulpStatus,
17391 rsp_iocbq->iocb.un.ulpWord[4]);
6669f9bb
JS
17392}
17393
6d368e53
JS
17394/**
17395 * lpfc_sli4_xri_inrange - check xri is in range of xris owned by driver.
17396 * @phba: Pointer to HBA context object.
17397 * @xri: xri id in transaction.
17398 *
17399 * This function validates the xri maps to the known range of XRIs allocated an
17400 * used by the driver.
17401 **/
7851fe2c 17402uint16_t
6d368e53
JS
17403lpfc_sli4_xri_inrange(struct lpfc_hba *phba,
17404 uint16_t xri)
17405{
a2fc4aef 17406 uint16_t i;
6d368e53
JS
17407
17408 for (i = 0; i < phba->sli4_hba.max_cfg_param.max_xri; i++) {
17409 if (xri == phba->sli4_hba.xri_ids[i])
17410 return i;
17411 }
17412 return NO_XRI;
17413}
17414
6669f9bb 17415/**
546fc854 17416 * lpfc_sli4_seq_abort_rsp - bls rsp to sequence abort
6669f9bb
JS
17417 * @phba: Pointer to HBA context object.
17418 * @fc_hdr: pointer to a FC frame header.
17419 *
546fc854 17420 * This function sends a basic response to a previous unsol sequence abort
6669f9bb
JS
17421 * event after aborting the sequence handling.
17422 **/
86c67379 17423void
6dd9e31c
JS
17424lpfc_sli4_seq_abort_rsp(struct lpfc_vport *vport,
17425 struct fc_frame_header *fc_hdr, bool aborted)
6669f9bb 17426{
6dd9e31c 17427 struct lpfc_hba *phba = vport->phba;
6669f9bb
JS
17428 struct lpfc_iocbq *ctiocb = NULL;
17429 struct lpfc_nodelist *ndlp;
ee0f4fe1 17430 uint16_t oxid, rxid, xri, lxri;
5ffc266e 17431 uint32_t sid, fctl;
6669f9bb 17432 IOCB_t *icmd;
546fc854 17433 int rc;
6669f9bb
JS
17434
17435 if (!lpfc_is_link_up(phba))
17436 return;
17437
17438 sid = sli4_sid_from_fc_hdr(fc_hdr);
17439 oxid = be16_to_cpu(fc_hdr->fh_ox_id);
5ffc266e 17440 rxid = be16_to_cpu(fc_hdr->fh_rx_id);
6669f9bb 17441
6dd9e31c 17442 ndlp = lpfc_findnode_did(vport, sid);
6669f9bb 17443 if (!ndlp) {
9d3d340d 17444 ndlp = lpfc_nlp_init(vport, sid);
6dd9e31c
JS
17445 if (!ndlp) {
17446 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17447 "1268 Failed to allocate ndlp for "
17448 "oxid:x%x SID:x%x\n", oxid, sid);
17449 return;
17450 }
6dd9e31c
JS
17451 /* Put ndlp onto pport node list */
17452 lpfc_enqueue_node(vport, ndlp);
17453 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
17454 /* re-setup ndlp without removing from node list */
17455 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
17456 if (!ndlp) {
17457 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17458 "3275 Failed to active ndlp found "
17459 "for oxid:x%x SID:x%x\n", oxid, sid);
17460 return;
17461 }
6669f9bb
JS
17462 }
17463
546fc854 17464 /* Allocate buffer for rsp iocb */
6669f9bb
JS
17465 ctiocb = lpfc_sli_get_iocbq(phba);
17466 if (!ctiocb)
17467 return;
17468
5ffc266e
JS
17469 /* Extract the F_CTL field from FC_HDR */
17470 fctl = sli4_fctl_from_fc_hdr(fc_hdr);
17471
6669f9bb 17472 icmd = &ctiocb->iocb;
6669f9bb 17473 icmd->un.xseq64.bdl.bdeSize = 0;
5ffc266e 17474 icmd->un.xseq64.bdl.ulpIoTag32 = 0;
6669f9bb
JS
17475 icmd->un.xseq64.w5.hcsw.Dfctl = 0;
17476 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_ACC;
17477 icmd->un.xseq64.w5.hcsw.Type = FC_TYPE_BLS;
17478
17479 /* Fill in the rest of iocb fields */
17480 icmd->ulpCommand = CMD_XMIT_BLS_RSP64_CX;
17481 icmd->ulpBdeCount = 0;
17482 icmd->ulpLe = 1;
17483 icmd->ulpClass = CLASS3;
6d368e53 17484 icmd->ulpContext = phba->sli4_hba.rpi_ids[ndlp->nlp_rpi];
6dd9e31c 17485 ctiocb->context1 = lpfc_nlp_get(ndlp);
6669f9bb 17486
6669f9bb
JS
17487 ctiocb->iocb_cmpl = NULL;
17488 ctiocb->vport = phba->pport;
546fc854 17489 ctiocb->iocb_cmpl = lpfc_sli4_seq_abort_rsp_cmpl;
6d368e53 17490 ctiocb->sli4_lxritag = NO_XRI;
546fc854
JS
17491 ctiocb->sli4_xritag = NO_XRI;
17492
ee0f4fe1
JS
17493 if (fctl & FC_FC_EX_CTX)
17494 /* Exchange responder sent the abort so we
17495 * own the oxid.
17496 */
17497 xri = oxid;
17498 else
17499 xri = rxid;
17500 lxri = lpfc_sli4_xri_inrange(phba, xri);
17501 if (lxri != NO_XRI)
17502 lpfc_set_rrq_active(phba, ndlp, lxri,
17503 (xri == oxid) ? rxid : oxid, 0);
6dd9e31c
JS
17504 /* For BA_ABTS from exchange responder, if the logical xri with
17505 * the oxid maps to the FCP XRI range, the port no longer has
17506 * that exchange context, send a BLS_RJT. Override the IOCB for
17507 * a BA_RJT.
17508 */
17509 if ((fctl & FC_FC_EX_CTX) &&
895427bd 17510 (lxri > lpfc_sli4_get_iocb_cnt(phba))) {
6dd9e31c
JS
17511 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17512 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17513 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17514 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17515 }
17516
17517 /* If BA_ABTS failed to abort a partially assembled receive sequence,
17518 * the driver no longer has that exchange, send a BLS_RJT. Override
17519 * the IOCB for a BA_RJT.
546fc854 17520 */
6dd9e31c 17521 if (aborted == false) {
546fc854
JS
17522 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17523 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17524 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17525 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17526 }
6669f9bb 17527
5ffc266e
JS
17528 if (fctl & FC_FC_EX_CTX) {
17529 /* ABTS sent by responder to CT exchange, construction
17530 * of BA_ACC will use OX_ID from ABTS for the XRI_TAG
17531 * field and RX_ID from ABTS for RX_ID field.
17532 */
546fc854 17533 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_RSP);
5ffc266e
JS
17534 } else {
17535 /* ABTS sent by initiator to CT exchange, construction
17536 * of BA_ACC will need to allocate a new XRI as for the
f09c3acc 17537 * XRI_TAG field.
5ffc266e 17538 */
546fc854 17539 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_INT);
5ffc266e 17540 }
f09c3acc 17541 bf_set(lpfc_abts_rxid, &icmd->un.bls_rsp, rxid);
546fc854 17542 bf_set(lpfc_abts_oxid, &icmd->un.bls_rsp, oxid);
5ffc266e 17543
546fc854 17544 /* Xmit CT abts response on exchange <xid> */
6dd9e31c
JS
17545 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,
17546 "1200 Send BLS cmd x%x on oxid x%x Data: x%x\n",
17547 icmd->un.xseq64.w5.hcsw.Rctl, oxid, phba->link_state);
546fc854
JS
17548
17549 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, ctiocb, 0);
17550 if (rc == IOCB_ERROR) {
6dd9e31c
JS
17551 lpfc_printf_vlog(vport, KERN_ERR, LOG_ELS,
17552 "2925 Failed to issue CT ABTS RSP x%x on "
17553 "xri x%x, Data x%x\n",
17554 icmd->un.xseq64.w5.hcsw.Rctl, oxid,
17555 phba->link_state);
17556 lpfc_nlp_put(ndlp);
17557 ctiocb->context1 = NULL;
546fc854
JS
17558 lpfc_sli_release_iocbq(phba, ctiocb);
17559 }
6669f9bb
JS
17560}
17561
17562/**
17563 * lpfc_sli4_handle_unsol_abort - Handle sli-4 unsolicited abort event
17564 * @vport: Pointer to the vport on which this sequence was received
17565 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17566 *
17567 * This function handles an SLI-4 unsolicited abort event. If the unsolicited
17568 * receive sequence is only partially assembed by the driver, it shall abort
17569 * the partially assembled frames for the sequence. Otherwise, if the
17570 * unsolicited receive sequence has been completely assembled and passed to
17571 * the Upper Layer Protocol (UPL), it then mark the per oxid status for the
17572 * unsolicited sequence has been aborted. After that, it will issue a basic
17573 * accept to accept the abort.
17574 **/
5d8b8167 17575static void
6669f9bb
JS
17576lpfc_sli4_handle_unsol_abort(struct lpfc_vport *vport,
17577 struct hbq_dmabuf *dmabuf)
17578{
17579 struct lpfc_hba *phba = vport->phba;
17580 struct fc_frame_header fc_hdr;
5ffc266e 17581 uint32_t fctl;
6dd9e31c 17582 bool aborted;
6669f9bb 17583
6669f9bb
JS
17584 /* Make a copy of fc_hdr before the dmabuf being released */
17585 memcpy(&fc_hdr, dmabuf->hbuf.virt, sizeof(struct fc_frame_header));
5ffc266e 17586 fctl = sli4_fctl_from_fc_hdr(&fc_hdr);
6669f9bb 17587
5ffc266e 17588 if (fctl & FC_FC_EX_CTX) {
6dd9e31c
JS
17589 /* ABTS by responder to exchange, no cleanup needed */
17590 aborted = true;
5ffc266e 17591 } else {
6dd9e31c
JS
17592 /* ABTS by initiator to exchange, need to do cleanup */
17593 aborted = lpfc_sli4_abort_partial_seq(vport, dmabuf);
17594 if (aborted == false)
17595 aborted = lpfc_sli4_abort_ulp_seq(vport, dmabuf);
5ffc266e 17596 }
6dd9e31c
JS
17597 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17598
86c67379
JS
17599 if (phba->nvmet_support) {
17600 lpfc_nvmet_rcv_unsol_abort(vport, &fc_hdr);
17601 return;
17602 }
17603
6dd9e31c
JS
17604 /* Respond with BA_ACC or BA_RJT accordingly */
17605 lpfc_sli4_seq_abort_rsp(vport, &fc_hdr, aborted);
6669f9bb
JS
17606}
17607
4f774513
JS
17608/**
17609 * lpfc_seq_complete - Indicates if a sequence is complete
17610 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17611 *
17612 * This function checks the sequence, starting with the frame described by
17613 * @dmabuf, to see if all the frames associated with this sequence are present.
17614 * the frames associated with this sequence are linked to the @dmabuf using the
17615 * dbuf list. This function looks for two major things. 1) That the first frame
17616 * has a sequence count of zero. 2) There is a frame with last frame of sequence
17617 * set. 3) That there are no holes in the sequence count. The function will
17618 * return 1 when the sequence is complete, otherwise it will return 0.
17619 **/
17620static int
17621lpfc_seq_complete(struct hbq_dmabuf *dmabuf)
17622{
17623 struct fc_frame_header *hdr;
17624 struct lpfc_dmabuf *d_buf;
17625 struct hbq_dmabuf *seq_dmabuf;
17626 uint32_t fctl;
17627 int seq_count = 0;
17628
17629 hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17630 /* make sure first fame of sequence has a sequence count of zero */
17631 if (hdr->fh_seq_cnt != seq_count)
17632 return 0;
17633 fctl = (hdr->fh_f_ctl[0] << 16 |
17634 hdr->fh_f_ctl[1] << 8 |
17635 hdr->fh_f_ctl[2]);
17636 /* If last frame of sequence we can return success. */
17637 if (fctl & FC_FC_END_SEQ)
17638 return 1;
17639 list_for_each_entry(d_buf, &dmabuf->dbuf.list, list) {
17640 seq_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17641 hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17642 /* If there is a hole in the sequence count then fail. */
eeead811 17643 if (++seq_count != be16_to_cpu(hdr->fh_seq_cnt))
4f774513
JS
17644 return 0;
17645 fctl = (hdr->fh_f_ctl[0] << 16 |
17646 hdr->fh_f_ctl[1] << 8 |
17647 hdr->fh_f_ctl[2]);
17648 /* If last frame of sequence we can return success. */
17649 if (fctl & FC_FC_END_SEQ)
17650 return 1;
17651 }
17652 return 0;
17653}
17654
17655/**
17656 * lpfc_prep_seq - Prep sequence for ULP processing
17657 * @vport: Pointer to the vport on which this sequence was received
17658 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17659 *
17660 * This function takes a sequence, described by a list of frames, and creates
17661 * a list of iocbq structures to describe the sequence. This iocbq list will be
17662 * used to issue to the generic unsolicited sequence handler. This routine
17663 * returns a pointer to the first iocbq in the list. If the function is unable
17664 * to allocate an iocbq then it throw out the received frames that were not
17665 * able to be described and return a pointer to the first iocbq. If unable to
17666 * allocate any iocbqs (including the first) this function will return NULL.
17667 **/
17668static struct lpfc_iocbq *
17669lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
17670{
7851fe2c 17671 struct hbq_dmabuf *hbq_buf;
4f774513
JS
17672 struct lpfc_dmabuf *d_buf, *n_buf;
17673 struct lpfc_iocbq *first_iocbq, *iocbq;
17674 struct fc_frame_header *fc_hdr;
17675 uint32_t sid;
7851fe2c 17676 uint32_t len, tot_len;
eeead811 17677 struct ulp_bde64 *pbde;
4f774513
JS
17678
17679 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17680 /* remove from receive buffer list */
17681 list_del_init(&seq_dmabuf->hbuf.list);
45ed1190 17682 lpfc_update_rcv_time_stamp(vport);
4f774513 17683 /* get the Remote Port's SID */
6669f9bb 17684 sid = sli4_sid_from_fc_hdr(fc_hdr);
7851fe2c 17685 tot_len = 0;
4f774513
JS
17686 /* Get an iocbq struct to fill in. */
17687 first_iocbq = lpfc_sli_get_iocbq(vport->phba);
17688 if (first_iocbq) {
17689 /* Initialize the first IOCB. */
8fa38513 17690 first_iocbq->iocb.unsli3.rcvsli3.acc_len = 0;
4f774513 17691 first_iocbq->iocb.ulpStatus = IOSTAT_SUCCESS;
895427bd 17692 first_iocbq->vport = vport;
939723a4
JS
17693
17694 /* Check FC Header to see what TYPE of frame we are rcv'ing */
17695 if (sli4_type_from_fc_hdr(fc_hdr) == FC_TYPE_ELS) {
17696 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_ELS64_CX;
17697 first_iocbq->iocb.un.rcvels.parmRo =
17698 sli4_did_from_fc_hdr(fc_hdr);
17699 first_iocbq->iocb.ulpPU = PARM_NPIV_DID;
17700 } else
17701 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_SEQ64_CX;
7851fe2c
JS
17702 first_iocbq->iocb.ulpContext = NO_XRI;
17703 first_iocbq->iocb.unsli3.rcvsli3.ox_id =
17704 be16_to_cpu(fc_hdr->fh_ox_id);
17705 /* iocbq is prepped for internal consumption. Physical vpi. */
17706 first_iocbq->iocb.unsli3.rcvsli3.vpi =
17707 vport->phba->vpi_ids[vport->vpi];
4f774513 17708 /* put the first buffer into the first IOCBq */
48a5a664
JS
17709 tot_len = bf_get(lpfc_rcqe_length,
17710 &seq_dmabuf->cq_event.cqe.rcqe_cmpl);
17711
4f774513
JS
17712 first_iocbq->context2 = &seq_dmabuf->dbuf;
17713 first_iocbq->context3 = NULL;
17714 first_iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17715 if (tot_len > LPFC_DATA_BUF_SIZE)
17716 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17717 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17718 else
17719 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize = tot_len;
17720
4f774513 17721 first_iocbq->iocb.un.rcvels.remoteID = sid;
48a5a664 17722
7851fe2c 17723 first_iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
4f774513
JS
17724 }
17725 iocbq = first_iocbq;
17726 /*
17727 * Each IOCBq can have two Buffers assigned, so go through the list
17728 * of buffers for this sequence and save two buffers in each IOCBq
17729 */
17730 list_for_each_entry_safe(d_buf, n_buf, &seq_dmabuf->dbuf.list, list) {
17731 if (!iocbq) {
17732 lpfc_in_buf_free(vport->phba, d_buf);
17733 continue;
17734 }
17735 if (!iocbq->context3) {
17736 iocbq->context3 = d_buf;
17737 iocbq->iocb.ulpBdeCount++;
7851fe2c
JS
17738 /* We need to get the size out of the right CQE */
17739 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17740 len = bf_get(lpfc_rcqe_length,
17741 &hbq_buf->cq_event.cqe.rcqe_cmpl);
48a5a664
JS
17742 pbde = (struct ulp_bde64 *)
17743 &iocbq->iocb.unsli3.sli3Words[4];
17744 if (len > LPFC_DATA_BUF_SIZE)
17745 pbde->tus.f.bdeSize = LPFC_DATA_BUF_SIZE;
17746 else
17747 pbde->tus.f.bdeSize = len;
17748
7851fe2c
JS
17749 iocbq->iocb.unsli3.rcvsli3.acc_len += len;
17750 tot_len += len;
4f774513
JS
17751 } else {
17752 iocbq = lpfc_sli_get_iocbq(vport->phba);
17753 if (!iocbq) {
17754 if (first_iocbq) {
17755 first_iocbq->iocb.ulpStatus =
17756 IOSTAT_FCP_RSP_ERROR;
17757 first_iocbq->iocb.un.ulpWord[4] =
17758 IOERR_NO_RESOURCES;
17759 }
17760 lpfc_in_buf_free(vport->phba, d_buf);
17761 continue;
17762 }
48a5a664
JS
17763 /* We need to get the size out of the right CQE */
17764 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17765 len = bf_get(lpfc_rcqe_length,
17766 &hbq_buf->cq_event.cqe.rcqe_cmpl);
4f774513
JS
17767 iocbq->context2 = d_buf;
17768 iocbq->context3 = NULL;
17769 iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17770 if (len > LPFC_DATA_BUF_SIZE)
17771 iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17772 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17773 else
17774 iocbq->iocb.un.cont64[0].tus.f.bdeSize = len;
7851fe2c 17775
7851fe2c
JS
17776 tot_len += len;
17777 iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
17778
4f774513
JS
17779 iocbq->iocb.un.rcvels.remoteID = sid;
17780 list_add_tail(&iocbq->list, &first_iocbq->list);
17781 }
17782 }
17783 return first_iocbq;
17784}
17785
6669f9bb
JS
17786static void
17787lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *vport,
17788 struct hbq_dmabuf *seq_dmabuf)
17789{
17790 struct fc_frame_header *fc_hdr;
17791 struct lpfc_iocbq *iocbq, *curr_iocb, *next_iocb;
17792 struct lpfc_hba *phba = vport->phba;
17793
17794 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17795 iocbq = lpfc_prep_seq(vport, seq_dmabuf);
17796 if (!iocbq) {
17797 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17798 "2707 Ring %d handler: Failed to allocate "
17799 "iocb Rctl x%x Type x%x received\n",
17800 LPFC_ELS_RING,
17801 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17802 return;
17803 }
17804 if (!lpfc_complete_unsol_iocb(phba,
895427bd 17805 phba->sli4_hba.els_wq->pring,
6669f9bb
JS
17806 iocbq, fc_hdr->fh_r_ctl,
17807 fc_hdr->fh_type))
6d368e53 17808 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6669f9bb
JS
17809 "2540 Ring %d handler: unexpected Rctl "
17810 "x%x Type x%x received\n",
17811 LPFC_ELS_RING,
17812 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17813
17814 /* Free iocb created in lpfc_prep_seq */
17815 list_for_each_entry_safe(curr_iocb, next_iocb,
17816 &iocbq->list, list) {
17817 list_del_init(&curr_iocb->list);
17818 lpfc_sli_release_iocbq(phba, curr_iocb);
17819 }
17820 lpfc_sli_release_iocbq(phba, iocbq);
17821}
17822
ae9e28f3
JS
17823static void
17824lpfc_sli4_mds_loopback_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
17825 struct lpfc_iocbq *rspiocb)
17826{
17827 struct lpfc_dmabuf *pcmd = cmdiocb->context2;
17828
17829 if (pcmd && pcmd->virt)
771db5c0 17830 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3
JS
17831 kfree(pcmd);
17832 lpfc_sli_release_iocbq(phba, cmdiocb);
e817e5d7 17833 lpfc_drain_txq(phba);
ae9e28f3
JS
17834}
17835
17836static void
17837lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
17838 struct hbq_dmabuf *dmabuf)
17839{
17840 struct fc_frame_header *fc_hdr;
17841 struct lpfc_hba *phba = vport->phba;
17842 struct lpfc_iocbq *iocbq = NULL;
17843 union lpfc_wqe *wqe;
17844 struct lpfc_dmabuf *pcmd = NULL;
17845 uint32_t frame_len;
17846 int rc;
e817e5d7 17847 unsigned long iflags;
ae9e28f3
JS
17848
17849 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17850 frame_len = bf_get(lpfc_rcqe_length, &dmabuf->cq_event.cqe.rcqe_cmpl);
17851
17852 /* Send the received frame back */
17853 iocbq = lpfc_sli_get_iocbq(phba);
e817e5d7
JS
17854 if (!iocbq) {
17855 /* Queue cq event and wakeup worker thread to process it */
17856 spin_lock_irqsave(&phba->hbalock, iflags);
17857 list_add_tail(&dmabuf->cq_event.list,
17858 &phba->sli4_hba.sp_queue_event);
17859 phba->hba_flag |= HBA_SP_QUEUE_EVT;
17860 spin_unlock_irqrestore(&phba->hbalock, iflags);
17861 lpfc_worker_wake_up(phba);
17862 return;
17863 }
ae9e28f3
JS
17864
17865 /* Allocate buffer for command payload */
17866 pcmd = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
17867 if (pcmd)
771db5c0 17868 pcmd->virt = dma_pool_alloc(phba->lpfc_drb_pool, GFP_KERNEL,
ae9e28f3
JS
17869 &pcmd->phys);
17870 if (!pcmd || !pcmd->virt)
17871 goto exit;
17872
17873 INIT_LIST_HEAD(&pcmd->list);
17874
17875 /* copyin the payload */
17876 memcpy(pcmd->virt, dmabuf->dbuf.virt, frame_len);
17877
17878 /* fill in BDE's for command */
17879 iocbq->iocb.un.xseq64.bdl.addrHigh = putPaddrHigh(pcmd->phys);
17880 iocbq->iocb.un.xseq64.bdl.addrLow = putPaddrLow(pcmd->phys);
17881 iocbq->iocb.un.xseq64.bdl.bdeFlags = BUFF_TYPE_BDE_64;
17882 iocbq->iocb.un.xseq64.bdl.bdeSize = frame_len;
17883
17884 iocbq->context2 = pcmd;
17885 iocbq->vport = vport;
17886 iocbq->iocb_flag &= ~LPFC_FIP_ELS_ID_MASK;
17887 iocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
17888
17889 /*
17890 * Setup rest of the iocb as though it were a WQE
17891 * Build the SEND_FRAME WQE
17892 */
17893 wqe = (union lpfc_wqe *)&iocbq->iocb;
17894
17895 wqe->send_frame.frame_len = frame_len;
17896 wqe->send_frame.fc_hdr_wd0 = be32_to_cpu(*((uint32_t *)fc_hdr));
17897 wqe->send_frame.fc_hdr_wd1 = be32_to_cpu(*((uint32_t *)fc_hdr + 1));
17898 wqe->send_frame.fc_hdr_wd2 = be32_to_cpu(*((uint32_t *)fc_hdr + 2));
17899 wqe->send_frame.fc_hdr_wd3 = be32_to_cpu(*((uint32_t *)fc_hdr + 3));
17900 wqe->send_frame.fc_hdr_wd4 = be32_to_cpu(*((uint32_t *)fc_hdr + 4));
17901 wqe->send_frame.fc_hdr_wd5 = be32_to_cpu(*((uint32_t *)fc_hdr + 5));
17902
17903 iocbq->iocb.ulpCommand = CMD_SEND_FRAME;
17904 iocbq->iocb.ulpLe = 1;
17905 iocbq->iocb_cmpl = lpfc_sli4_mds_loopback_cmpl;
17906 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, iocbq, 0);
17907 if (rc == IOCB_ERROR)
17908 goto exit;
17909
17910 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17911 return;
17912
17913exit:
17914 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
17915 "2023 Unable to process MDS loopback frame\n");
17916 if (pcmd && pcmd->virt)
771db5c0 17917 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3 17918 kfree(pcmd);
401bb416
DK
17919 if (iocbq)
17920 lpfc_sli_release_iocbq(phba, iocbq);
ae9e28f3
JS
17921 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17922}
17923
4f774513
JS
17924/**
17925 * lpfc_sli4_handle_received_buffer - Handle received buffers from firmware
17926 * @phba: Pointer to HBA context object.
17927 *
17928 * This function is called with no lock held. This function processes all
17929 * the received buffers and gives it to upper layers when a received buffer
17930 * indicates that it is the final frame in the sequence. The interrupt
895427bd 17931 * service routine processes received buffers at interrupt contexts.
4f774513
JS
17932 * Worker thread calls lpfc_sli4_handle_received_buffer, which will call the
17933 * appropriate receive function when the final frame in a sequence is received.
17934 **/
4d9ab994
JS
17935void
17936lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,
17937 struct hbq_dmabuf *dmabuf)
4f774513 17938{
4d9ab994 17939 struct hbq_dmabuf *seq_dmabuf;
4f774513
JS
17940 struct fc_frame_header *fc_hdr;
17941 struct lpfc_vport *vport;
17942 uint32_t fcfi;
939723a4 17943 uint32_t did;
4f774513 17944
4f774513 17945 /* Process each received buffer */
4d9ab994 17946 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
2ea259ee 17947
e817e5d7
JS
17948 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
17949 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
17950 vport = phba->pport;
17951 /* Handle MDS Loopback frames */
17952 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
17953 return;
17954 }
17955
4d9ab994
JS
17956 /* check to see if this a valid type of frame */
17957 if (lpfc_fc_frame_check(phba, fc_hdr)) {
17958 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17959 return;
17960 }
2ea259ee 17961
7851fe2c
JS
17962 if ((bf_get(lpfc_cqe_code,
17963 &dmabuf->cq_event.cqe.rcqe_cmpl) == CQE_CODE_RECEIVE_V1))
17964 fcfi = bf_get(lpfc_rcqe_fcf_id_v1,
17965 &dmabuf->cq_event.cqe.rcqe_cmpl);
17966 else
17967 fcfi = bf_get(lpfc_rcqe_fcf_id,
17968 &dmabuf->cq_event.cqe.rcqe_cmpl);
939723a4 17969
895427bd
JS
17970 /* d_id this frame is directed to */
17971 did = sli4_did_from_fc_hdr(fc_hdr);
17972
17973 vport = lpfc_fc_frame_to_vport(phba, fc_hdr, fcfi, did);
939723a4 17974 if (!vport) {
4d9ab994
JS
17975 /* throw out the frame */
17976 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17977 return;
17978 }
939723a4 17979
939723a4
JS
17980 /* vport is registered unless we rcv a FLOGI directed to Fabric_DID */
17981 if (!(vport->vpi_state & LPFC_VPI_REGISTERED) &&
17982 (did != Fabric_DID)) {
17983 /*
17984 * Throw out the frame if we are not pt2pt.
17985 * The pt2pt protocol allows for discovery frames
17986 * to be received without a registered VPI.
17987 */
17988 if (!(vport->fc_flag & FC_PT2PT) ||
17989 (phba->link_state == LPFC_HBA_READY)) {
17990 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17991 return;
17992 }
17993 }
17994
6669f9bb
JS
17995 /* Handle the basic abort sequence (BA_ABTS) event */
17996 if (fc_hdr->fh_r_ctl == FC_RCTL_BA_ABTS) {
17997 lpfc_sli4_handle_unsol_abort(vport, dmabuf);
17998 return;
17999 }
18000
4d9ab994
JS
18001 /* Link this frame */
18002 seq_dmabuf = lpfc_fc_frame_add(vport, dmabuf);
18003 if (!seq_dmabuf) {
18004 /* unable to add frame to vport - throw it out */
18005 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18006 return;
18007 }
18008 /* If not last frame in sequence continue processing frames. */
def9c7a9 18009 if (!lpfc_seq_complete(seq_dmabuf))
4d9ab994 18010 return;
def9c7a9 18011
6669f9bb
JS
18012 /* Send the complete sequence to the upper layer protocol */
18013 lpfc_sli4_send_seq_to_ulp(vport, seq_dmabuf);
4f774513 18014}
6fb120a7
JS
18015
18016/**
18017 * lpfc_sli4_post_all_rpi_hdrs - Post the rpi header memory region to the port
18018 * @phba: pointer to lpfc hba data structure.
18019 *
18020 * This routine is invoked to post rpi header templates to the
18021 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18022 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18023 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18024 *
18025 * This routine does not require any locks. It's usage is expected
18026 * to be driver load or reset recovery when the driver is
18027 * sequential.
18028 *
18029 * Return codes
af901ca1 18030 * 0 - successful
d439d286 18031 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18032 * When this error occurs, the driver is not guaranteed
18033 * to have any rpi regions posted to the device and
18034 * must either attempt to repost the regions or take a
18035 * fatal error.
18036 **/
18037int
18038lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *phba)
18039{
18040 struct lpfc_rpi_hdr *rpi_page;
18041 uint32_t rc = 0;
6d368e53
JS
18042 uint16_t lrpi = 0;
18043
18044 /* SLI4 ports that support extents do not require RPI headers. */
18045 if (!phba->sli4_hba.rpi_hdrs_in_use)
18046 goto exit;
18047 if (phba->sli4_hba.extents_in_use)
18048 return -EIO;
6fb120a7 18049
6fb120a7 18050 list_for_each_entry(rpi_page, &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6d368e53
JS
18051 /*
18052 * Assign the rpi headers a physical rpi only if the driver
18053 * has not initialized those resources. A port reset only
18054 * needs the headers posted.
18055 */
18056 if (bf_get(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags) !=
18057 LPFC_RPI_RSRC_RDY)
18058 rpi_page->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
18059
6fb120a7
JS
18060 rc = lpfc_sli4_post_rpi_hdr(phba, rpi_page);
18061 if (rc != MBX_SUCCESS) {
18062 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18063 "2008 Error %d posting all rpi "
18064 "headers\n", rc);
18065 rc = -EIO;
18066 break;
18067 }
18068 }
18069
6d368e53
JS
18070 exit:
18071 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags,
18072 LPFC_RPI_RSRC_RDY);
6fb120a7
JS
18073 return rc;
18074}
18075
18076/**
18077 * lpfc_sli4_post_rpi_hdr - Post an rpi header memory region to the port
18078 * @phba: pointer to lpfc hba data structure.
18079 * @rpi_page: pointer to the rpi memory region.
18080 *
18081 * This routine is invoked to post a single rpi header to the
18082 * HBA consistent with the SLI-4 interface spec. This memory region
18083 * maps up to 64 rpi context regions.
18084 *
18085 * Return codes
af901ca1 18086 * 0 - successful
d439d286
JS
18087 * -ENOMEM - No available memory
18088 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18089 **/
18090int
18091lpfc_sli4_post_rpi_hdr(struct lpfc_hba *phba, struct lpfc_rpi_hdr *rpi_page)
18092{
18093 LPFC_MBOXQ_t *mboxq;
18094 struct lpfc_mbx_post_hdr_tmpl *hdr_tmpl;
18095 uint32_t rc = 0;
6fb120a7
JS
18096 uint32_t shdr_status, shdr_add_status;
18097 union lpfc_sli4_cfg_shdr *shdr;
18098
6d368e53
JS
18099 /* SLI4 ports that support extents do not require RPI headers. */
18100 if (!phba->sli4_hba.rpi_hdrs_in_use)
18101 return rc;
18102 if (phba->sli4_hba.extents_in_use)
18103 return -EIO;
18104
6fb120a7
JS
18105 /* The port is notified of the header region via a mailbox command. */
18106 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18107 if (!mboxq) {
18108 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18109 "2001 Unable to allocate memory for issuing "
18110 "SLI_CONFIG_SPECIAL mailbox command\n");
18111 return -ENOMEM;
18112 }
18113
18114 /* Post all rpi memory regions to the port. */
18115 hdr_tmpl = &mboxq->u.mqe.un.hdr_tmpl;
6fb120a7
JS
18116 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18117 LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE,
18118 sizeof(struct lpfc_mbx_post_hdr_tmpl) -
fedd3b7b
JS
18119 sizeof(struct lpfc_sli4_cfg_mhdr),
18120 LPFC_SLI4_MBX_EMBED);
6d368e53
JS
18121
18122
18123 /* Post the physical rpi to the port for this rpi header. */
6fb120a7
JS
18124 bf_set(lpfc_mbx_post_hdr_tmpl_rpi_offset, hdr_tmpl,
18125 rpi_page->start_rpi);
6d368e53
JS
18126 bf_set(lpfc_mbx_post_hdr_tmpl_page_cnt,
18127 hdr_tmpl, rpi_page->page_count);
18128
6fb120a7
JS
18129 hdr_tmpl->rpi_paddr_lo = putPaddrLow(rpi_page->dmabuf->phys);
18130 hdr_tmpl->rpi_paddr_hi = putPaddrHigh(rpi_page->dmabuf->phys);
f1126688 18131 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6fb120a7
JS
18132 shdr = (union lpfc_sli4_cfg_shdr *) &hdr_tmpl->header.cfg_shdr;
18133 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18134 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18135 if (rc != MBX_TIMEOUT)
18136 mempool_free(mboxq, phba->mbox_mem_pool);
18137 if (shdr_status || shdr_add_status || rc) {
18138 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18139 "2514 POST_RPI_HDR mailbox failed with "
18140 "status x%x add_status x%x, mbx status x%x\n",
18141 shdr_status, shdr_add_status, rc);
18142 rc = -ENXIO;
845d9e8d
JS
18143 } else {
18144 /*
18145 * The next_rpi stores the next logical module-64 rpi value used
18146 * to post physical rpis in subsequent rpi postings.
18147 */
18148 spin_lock_irq(&phba->hbalock);
18149 phba->sli4_hba.next_rpi = rpi_page->next_rpi;
18150 spin_unlock_irq(&phba->hbalock);
6fb120a7
JS
18151 }
18152 return rc;
18153}
18154
18155/**
18156 * lpfc_sli4_alloc_rpi - Get an available rpi in the device's range
18157 * @phba: pointer to lpfc hba data structure.
18158 *
18159 * This routine is invoked to post rpi header templates to the
18160 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18161 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18162 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18163 *
18164 * Returns
af901ca1 18165 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
6fb120a7
JS
18166 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
18167 **/
18168int
18169lpfc_sli4_alloc_rpi(struct lpfc_hba *phba)
18170{
6d368e53
JS
18171 unsigned long rpi;
18172 uint16_t max_rpi, rpi_limit;
18173 uint16_t rpi_remaining, lrpi = 0;
6fb120a7 18174 struct lpfc_rpi_hdr *rpi_hdr;
4902b381 18175 unsigned long iflag;
6fb120a7 18176
6fb120a7 18177 /*
6d368e53
JS
18178 * Fetch the next logical rpi. Because this index is logical,
18179 * the driver starts at 0 each time.
6fb120a7 18180 */
4902b381 18181 spin_lock_irqsave(&phba->hbalock, iflag);
be6bb941
JS
18182 max_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
18183 rpi_limit = phba->sli4_hba.next_rpi;
18184
6d368e53
JS
18185 rpi = find_next_zero_bit(phba->sli4_hba.rpi_bmask, rpi_limit, 0);
18186 if (rpi >= rpi_limit)
6fb120a7
JS
18187 rpi = LPFC_RPI_ALLOC_ERROR;
18188 else {
18189 set_bit(rpi, phba->sli4_hba.rpi_bmask);
18190 phba->sli4_hba.max_cfg_param.rpi_used++;
18191 phba->sli4_hba.rpi_count++;
18192 }
be6bb941
JS
18193 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
18194 "0001 rpi:%x max:%x lim:%x\n",
18195 (int) rpi, max_rpi, rpi_limit);
6fb120a7
JS
18196
18197 /*
18198 * Don't try to allocate more rpi header regions if the device limit
6d368e53 18199 * has been exhausted.
6fb120a7
JS
18200 */
18201 if ((rpi == LPFC_RPI_ALLOC_ERROR) &&
18202 (phba->sli4_hba.rpi_count >= max_rpi)) {
4902b381 18203 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18204 return rpi;
18205 }
18206
6d368e53
JS
18207 /*
18208 * RPI header postings are not required for SLI4 ports capable of
18209 * extents.
18210 */
18211 if (!phba->sli4_hba.rpi_hdrs_in_use) {
4902b381 18212 spin_unlock_irqrestore(&phba->hbalock, iflag);
6d368e53
JS
18213 return rpi;
18214 }
18215
6fb120a7
JS
18216 /*
18217 * If the driver is running low on rpi resources, allocate another
18218 * page now. Note that the next_rpi value is used because
18219 * it represents how many are actually in use whereas max_rpi notes
18220 * how many are supported max by the device.
18221 */
6d368e53 18222 rpi_remaining = phba->sli4_hba.next_rpi - phba->sli4_hba.rpi_count;
4902b381 18223 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18224 if (rpi_remaining < LPFC_RPI_LOW_WATER_MARK) {
18225 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
18226 if (!rpi_hdr) {
18227 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18228 "2002 Error Could not grow rpi "
18229 "count\n");
18230 } else {
6d368e53
JS
18231 lrpi = rpi_hdr->start_rpi;
18232 rpi_hdr->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
6fb120a7
JS
18233 lpfc_sli4_post_rpi_hdr(phba, rpi_hdr);
18234 }
18235 }
18236
18237 return rpi;
18238}
18239
d7c47992
JS
18240/**
18241 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18242 * @phba: pointer to lpfc hba data structure.
18243 *
18244 * This routine is invoked to release an rpi to the pool of
18245 * available rpis maintained by the driver.
18246 **/
5d8b8167 18247static void
d7c47992
JS
18248__lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18249{
18250 if (test_and_clear_bit(rpi, phba->sli4_hba.rpi_bmask)) {
18251 phba->sli4_hba.rpi_count--;
18252 phba->sli4_hba.max_cfg_param.rpi_used--;
18253 }
18254}
18255
6fb120a7
JS
18256/**
18257 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18258 * @phba: pointer to lpfc hba data structure.
18259 *
18260 * This routine is invoked to release an rpi to the pool of
18261 * available rpis maintained by the driver.
18262 **/
18263void
18264lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18265{
18266 spin_lock_irq(&phba->hbalock);
d7c47992 18267 __lpfc_sli4_free_rpi(phba, rpi);
6fb120a7
JS
18268 spin_unlock_irq(&phba->hbalock);
18269}
18270
18271/**
18272 * lpfc_sli4_remove_rpis - Remove the rpi bitmask region
18273 * @phba: pointer to lpfc hba data structure.
18274 *
18275 * This routine is invoked to remove the memory region that
18276 * provided rpi via a bitmask.
18277 **/
18278void
18279lpfc_sli4_remove_rpis(struct lpfc_hba *phba)
18280{
18281 kfree(phba->sli4_hba.rpi_bmask);
6d368e53
JS
18282 kfree(phba->sli4_hba.rpi_ids);
18283 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6fb120a7
JS
18284}
18285
18286/**
18287 * lpfc_sli4_resume_rpi - Remove the rpi bitmask region
18288 * @phba: pointer to lpfc hba data structure.
18289 *
18290 * This routine is invoked to remove the memory region that
18291 * provided rpi via a bitmask.
18292 **/
18293int
6b5151fd
JS
18294lpfc_sli4_resume_rpi(struct lpfc_nodelist *ndlp,
18295 void (*cmpl)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *arg)
6fb120a7
JS
18296{
18297 LPFC_MBOXQ_t *mboxq;
18298 struct lpfc_hba *phba = ndlp->phba;
18299 int rc;
18300
18301 /* The port is notified of the header region via a mailbox command. */
18302 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18303 if (!mboxq)
18304 return -ENOMEM;
18305
18306 /* Post all rpi memory regions to the port. */
18307 lpfc_resume_rpi(mboxq, ndlp);
6b5151fd
JS
18308 if (cmpl) {
18309 mboxq->mbox_cmpl = cmpl;
3e1f0718
JS
18310 mboxq->ctx_buf = arg;
18311 mboxq->ctx_ndlp = ndlp;
72859909
JS
18312 } else
18313 mboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6b5151fd 18314 mboxq->vport = ndlp->vport;
6fb120a7
JS
18315 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18316 if (rc == MBX_NOT_FINISHED) {
18317 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18318 "2010 Resume RPI Mailbox failed "
18319 "status %d, mbxStatus x%x\n", rc,
18320 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
18321 mempool_free(mboxq, phba->mbox_mem_pool);
18322 return -EIO;
18323 }
18324 return 0;
18325}
18326
18327/**
18328 * lpfc_sli4_init_vpi - Initialize a vpi with the port
76a95d75 18329 * @vport: Pointer to the vport for which the vpi is being initialized
6fb120a7 18330 *
76a95d75 18331 * This routine is invoked to activate a vpi with the port.
6fb120a7
JS
18332 *
18333 * Returns:
18334 * 0 success
18335 * -Evalue otherwise
18336 **/
18337int
76a95d75 18338lpfc_sli4_init_vpi(struct lpfc_vport *vport)
6fb120a7
JS
18339{
18340 LPFC_MBOXQ_t *mboxq;
18341 int rc = 0;
6a9c52cf 18342 int retval = MBX_SUCCESS;
6fb120a7 18343 uint32_t mbox_tmo;
76a95d75 18344 struct lpfc_hba *phba = vport->phba;
6fb120a7
JS
18345 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18346 if (!mboxq)
18347 return -ENOMEM;
76a95d75 18348 lpfc_init_vpi(phba, mboxq, vport->vpi);
a183a15f 18349 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
6fb120a7 18350 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
6fb120a7 18351 if (rc != MBX_SUCCESS) {
76a95d75 18352 lpfc_printf_vlog(vport, KERN_ERR, LOG_SLI,
6fb120a7
JS
18353 "2022 INIT VPI Mailbox failed "
18354 "status %d, mbxStatus x%x\n", rc,
18355 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
6a9c52cf 18356 retval = -EIO;
6fb120a7 18357 }
6a9c52cf 18358 if (rc != MBX_TIMEOUT)
76a95d75 18359 mempool_free(mboxq, vport->phba->mbox_mem_pool);
6a9c52cf
JS
18360
18361 return retval;
6fb120a7
JS
18362}
18363
18364/**
18365 * lpfc_mbx_cmpl_add_fcf_record - add fcf mbox completion handler.
18366 * @phba: pointer to lpfc hba data structure.
18367 * @mboxq: Pointer to mailbox object.
18368 *
18369 * This routine is invoked to manually add a single FCF record. The caller
18370 * must pass a completely initialized FCF_Record. This routine takes
18371 * care of the nonembedded mailbox operations.
18372 **/
18373static void
18374lpfc_mbx_cmpl_add_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
18375{
18376 void *virt_addr;
18377 union lpfc_sli4_cfg_shdr *shdr;
18378 uint32_t shdr_status, shdr_add_status;
18379
18380 virt_addr = mboxq->sge_array->addr[0];
18381 /* The IOCTL status is embedded in the mailbox subheader. */
18382 shdr = (union lpfc_sli4_cfg_shdr *) virt_addr;
18383 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18384 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18385
18386 if ((shdr_status || shdr_add_status) &&
18387 (shdr_status != STATUS_FCF_IN_USE))
18388 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18389 "2558 ADD_FCF_RECORD mailbox failed with "
18390 "status x%x add_status x%x\n",
18391 shdr_status, shdr_add_status);
18392
18393 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18394}
18395
18396/**
18397 * lpfc_sli4_add_fcf_record - Manually add an FCF Record.
18398 * @phba: pointer to lpfc hba data structure.
18399 * @fcf_record: pointer to the initialized fcf record to add.
18400 *
18401 * This routine is invoked to manually add a single FCF record. The caller
18402 * must pass a completely initialized FCF_Record. This routine takes
18403 * care of the nonembedded mailbox operations.
18404 **/
18405int
18406lpfc_sli4_add_fcf_record(struct lpfc_hba *phba, struct fcf_record *fcf_record)
18407{
18408 int rc = 0;
18409 LPFC_MBOXQ_t *mboxq;
18410 uint8_t *bytep;
18411 void *virt_addr;
6fb120a7
JS
18412 struct lpfc_mbx_sge sge;
18413 uint32_t alloc_len, req_len;
18414 uint32_t fcfindex;
18415
18416 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18417 if (!mboxq) {
18418 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18419 "2009 Failed to allocate mbox for ADD_FCF cmd\n");
18420 return -ENOMEM;
18421 }
18422
18423 req_len = sizeof(struct fcf_record) + sizeof(union lpfc_sli4_cfg_shdr) +
18424 sizeof(uint32_t);
18425
18426 /* Allocate DMA memory and set up the non-embedded mailbox command */
18427 alloc_len = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18428 LPFC_MBOX_OPCODE_FCOE_ADD_FCF,
18429 req_len, LPFC_SLI4_MBX_NEMBED);
18430 if (alloc_len < req_len) {
18431 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18432 "2523 Allocated DMA memory size (x%x) is "
18433 "less than the requested DMA memory "
18434 "size (x%x)\n", alloc_len, req_len);
18435 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18436 return -ENOMEM;
18437 }
18438
18439 /*
18440 * Get the first SGE entry from the non-embedded DMA memory. This
18441 * routine only uses a single SGE.
18442 */
18443 lpfc_sli4_mbx_sge_get(mboxq, 0, &sge);
6fb120a7
JS
18444 virt_addr = mboxq->sge_array->addr[0];
18445 /*
18446 * Configure the FCF record for FCFI 0. This is the driver's
18447 * hardcoded default and gets used in nonFIP mode.
18448 */
18449 fcfindex = bf_get(lpfc_fcf_record_fcf_index, fcf_record);
18450 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr);
18451 lpfc_sli_pcimem_bcopy(&fcfindex, bytep, sizeof(uint32_t));
18452
18453 /*
18454 * Copy the fcf_index and the FCF Record Data. The data starts after
18455 * the FCoE header plus word10. The data copy needs to be endian
18456 * correct.
18457 */
18458 bytep += sizeof(uint32_t);
18459 lpfc_sli_pcimem_bcopy(fcf_record, bytep, sizeof(struct fcf_record));
18460 mboxq->vport = phba->pport;
18461 mboxq->mbox_cmpl = lpfc_mbx_cmpl_add_fcf_record;
18462 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18463 if (rc == MBX_NOT_FINISHED) {
18464 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18465 "2515 ADD_FCF_RECORD mailbox failed with "
18466 "status 0x%x\n", rc);
18467 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18468 rc = -EIO;
18469 } else
18470 rc = 0;
18471
18472 return rc;
18473}
18474
18475/**
18476 * lpfc_sli4_build_dflt_fcf_record - Build the driver's default FCF Record.
18477 * @phba: pointer to lpfc hba data structure.
18478 * @fcf_record: pointer to the fcf record to write the default data.
18479 * @fcf_index: FCF table entry index.
18480 *
18481 * This routine is invoked to build the driver's default FCF record. The
18482 * values used are hardcoded. This routine handles memory initialization.
18483 *
18484 **/
18485void
18486lpfc_sli4_build_dflt_fcf_record(struct lpfc_hba *phba,
18487 struct fcf_record *fcf_record,
18488 uint16_t fcf_index)
18489{
18490 memset(fcf_record, 0, sizeof(struct fcf_record));
18491 fcf_record->max_rcv_size = LPFC_FCOE_MAX_RCV_SIZE;
18492 fcf_record->fka_adv_period = LPFC_FCOE_FKA_ADV_PER;
18493 fcf_record->fip_priority = LPFC_FCOE_FIP_PRIORITY;
18494 bf_set(lpfc_fcf_record_mac_0, fcf_record, phba->fc_map[0]);
18495 bf_set(lpfc_fcf_record_mac_1, fcf_record, phba->fc_map[1]);
18496 bf_set(lpfc_fcf_record_mac_2, fcf_record, phba->fc_map[2]);
18497 bf_set(lpfc_fcf_record_mac_3, fcf_record, LPFC_FCOE_FCF_MAC3);
18498 bf_set(lpfc_fcf_record_mac_4, fcf_record, LPFC_FCOE_FCF_MAC4);
18499 bf_set(lpfc_fcf_record_mac_5, fcf_record, LPFC_FCOE_FCF_MAC5);
18500 bf_set(lpfc_fcf_record_fc_map_0, fcf_record, phba->fc_map[0]);
18501 bf_set(lpfc_fcf_record_fc_map_1, fcf_record, phba->fc_map[1]);
18502 bf_set(lpfc_fcf_record_fc_map_2, fcf_record, phba->fc_map[2]);
18503 bf_set(lpfc_fcf_record_fcf_valid, fcf_record, 1);
0c287589 18504 bf_set(lpfc_fcf_record_fcf_avail, fcf_record, 1);
6fb120a7
JS
18505 bf_set(lpfc_fcf_record_fcf_index, fcf_record, fcf_index);
18506 bf_set(lpfc_fcf_record_mac_addr_prov, fcf_record,
18507 LPFC_FCF_FPMA | LPFC_FCF_SPMA);
18508 /* Set the VLAN bit map */
18509 if (phba->valid_vlan) {
18510 fcf_record->vlan_bitmap[phba->vlan_id / 8]
18511 = 1 << (phba->vlan_id % 8);
18512 }
18513}
18514
18515/**
0c9ab6f5 18516 * lpfc_sli4_fcf_scan_read_fcf_rec - Read hba fcf record for fcf scan.
6fb120a7
JS
18517 * @phba: pointer to lpfc hba data structure.
18518 * @fcf_index: FCF table entry offset.
18519 *
0c9ab6f5
JS
18520 * This routine is invoked to scan the entire FCF table by reading FCF
18521 * record and processing it one at a time starting from the @fcf_index
18522 * for initial FCF discovery or fast FCF failover rediscovery.
18523 *
25985edc 18524 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5 18525 * otherwise.
6fb120a7
JS
18526 **/
18527int
0c9ab6f5 18528lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
6fb120a7
JS
18529{
18530 int rc = 0, error;
18531 LPFC_MBOXQ_t *mboxq;
6fb120a7 18532
32b9793f 18533 phba->fcoe_eventtag_at_fcf_scan = phba->fcoe_eventtag;
80c17849 18534 phba->fcoe_cvl_eventtag_attn = phba->fcoe_cvl_eventtag;
6fb120a7
JS
18535 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18536 if (!mboxq) {
18537 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18538 "2000 Failed to allocate mbox for "
18539 "READ_FCF cmd\n");
4d9ab994 18540 error = -ENOMEM;
0c9ab6f5 18541 goto fail_fcf_scan;
6fb120a7 18542 }
ecfd03c6 18543 /* Construct the read FCF record mailbox command */
0c9ab6f5 18544 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
ecfd03c6
JS
18545 if (rc) {
18546 error = -EINVAL;
0c9ab6f5 18547 goto fail_fcf_scan;
6fb120a7 18548 }
ecfd03c6 18549 /* Issue the mailbox command asynchronously */
6fb120a7 18550 mboxq->vport = phba->pport;
0c9ab6f5 18551 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_scan_read_fcf_rec;
a93ff37a
JS
18552
18553 spin_lock_irq(&phba->hbalock);
18554 phba->hba_flag |= FCF_TS_INPROG;
18555 spin_unlock_irq(&phba->hbalock);
18556
6fb120a7 18557 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
ecfd03c6 18558 if (rc == MBX_NOT_FINISHED)
6fb120a7 18559 error = -EIO;
ecfd03c6 18560 else {
38b92ef8
JS
18561 /* Reset eligible FCF count for new scan */
18562 if (fcf_index == LPFC_FCOE_FCF_GET_FIRST)
999d813f 18563 phba->fcf.eligible_fcf_cnt = 0;
6fb120a7 18564 error = 0;
32b9793f 18565 }
0c9ab6f5 18566fail_fcf_scan:
4d9ab994
JS
18567 if (error) {
18568 if (mboxq)
18569 lpfc_sli4_mbox_cmd_free(phba, mboxq);
a93ff37a 18570 /* FCF scan failed, clear FCF_TS_INPROG flag */
4d9ab994 18571 spin_lock_irq(&phba->hbalock);
a93ff37a 18572 phba->hba_flag &= ~FCF_TS_INPROG;
4d9ab994
JS
18573 spin_unlock_irq(&phba->hbalock);
18574 }
6fb120a7
JS
18575 return error;
18576}
a0c87cbd 18577
0c9ab6f5 18578/**
a93ff37a 18579 * lpfc_sli4_fcf_rr_read_fcf_rec - Read hba fcf record for roundrobin fcf.
0c9ab6f5
JS
18580 * @phba: pointer to lpfc hba data structure.
18581 * @fcf_index: FCF table entry offset.
18582 *
18583 * This routine is invoked to read an FCF record indicated by @fcf_index
a93ff37a 18584 * and to use it for FLOGI roundrobin FCF failover.
0c9ab6f5 18585 *
25985edc 18586 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18587 * otherwise.
18588 **/
18589int
18590lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18591{
18592 int rc = 0, error;
18593 LPFC_MBOXQ_t *mboxq;
18594
18595 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18596 if (!mboxq) {
18597 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18598 "2763 Failed to allocate mbox for "
18599 "READ_FCF cmd\n");
18600 error = -ENOMEM;
18601 goto fail_fcf_read;
18602 }
18603 /* Construct the read FCF record mailbox command */
18604 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18605 if (rc) {
18606 error = -EINVAL;
18607 goto fail_fcf_read;
18608 }
18609 /* Issue the mailbox command asynchronously */
18610 mboxq->vport = phba->pport;
18611 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_rr_read_fcf_rec;
18612 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18613 if (rc == MBX_NOT_FINISHED)
18614 error = -EIO;
18615 else
18616 error = 0;
18617
18618fail_fcf_read:
18619 if (error && mboxq)
18620 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18621 return error;
18622}
18623
18624/**
18625 * lpfc_sli4_read_fcf_rec - Read hba fcf record for update eligible fcf bmask.
18626 * @phba: pointer to lpfc hba data structure.
18627 * @fcf_index: FCF table entry offset.
18628 *
18629 * This routine is invoked to read an FCF record indicated by @fcf_index to
a93ff37a 18630 * determine whether it's eligible for FLOGI roundrobin failover list.
0c9ab6f5 18631 *
25985edc 18632 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18633 * otherwise.
18634 **/
18635int
18636lpfc_sli4_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18637{
18638 int rc = 0, error;
18639 LPFC_MBOXQ_t *mboxq;
18640
18641 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18642 if (!mboxq) {
18643 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18644 "2758 Failed to allocate mbox for "
18645 "READ_FCF cmd\n");
18646 error = -ENOMEM;
18647 goto fail_fcf_read;
18648 }
18649 /* Construct the read FCF record mailbox command */
18650 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18651 if (rc) {
18652 error = -EINVAL;
18653 goto fail_fcf_read;
18654 }
18655 /* Issue the mailbox command asynchronously */
18656 mboxq->vport = phba->pport;
18657 mboxq->mbox_cmpl = lpfc_mbx_cmpl_read_fcf_rec;
18658 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18659 if (rc == MBX_NOT_FINISHED)
18660 error = -EIO;
18661 else
18662 error = 0;
18663
18664fail_fcf_read:
18665 if (error && mboxq)
18666 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18667 return error;
18668}
18669
7d791df7 18670/**
f5cb5304 18671 * lpfc_check_next_fcf_pri_level
7d791df7
JS
18672 * phba pointer to the lpfc_hba struct for this port.
18673 * This routine is called from the lpfc_sli4_fcf_rr_next_index_get
18674 * routine when the rr_bmask is empty. The FCF indecies are put into the
18675 * rr_bmask based on their priority level. Starting from the highest priority
18676 * to the lowest. The most likely FCF candidate will be in the highest
18677 * priority group. When this routine is called it searches the fcf_pri list for
18678 * next lowest priority group and repopulates the rr_bmask with only those
18679 * fcf_indexes.
18680 * returns:
18681 * 1=success 0=failure
18682 **/
5d8b8167 18683static int
7d791df7
JS
18684lpfc_check_next_fcf_pri_level(struct lpfc_hba *phba)
18685{
18686 uint16_t next_fcf_pri;
18687 uint16_t last_index;
18688 struct lpfc_fcf_pri *fcf_pri;
18689 int rc;
18690 int ret = 0;
18691
18692 last_index = find_first_bit(phba->fcf.fcf_rr_bmask,
18693 LPFC_SLI4_FCF_TBL_INDX_MAX);
18694 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
18695 "3060 Last IDX %d\n", last_index);
2562669c
JS
18696
18697 /* Verify the priority list has 2 or more entries */
18698 spin_lock_irq(&phba->hbalock);
18699 if (list_empty(&phba->fcf.fcf_pri_list) ||
18700 list_is_singular(&phba->fcf.fcf_pri_list)) {
18701 spin_unlock_irq(&phba->hbalock);
7d791df7
JS
18702 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
18703 "3061 Last IDX %d\n", last_index);
18704 return 0; /* Empty rr list */
18705 }
2562669c
JS
18706 spin_unlock_irq(&phba->hbalock);
18707
7d791df7
JS
18708 next_fcf_pri = 0;
18709 /*
18710 * Clear the rr_bmask and set all of the bits that are at this
18711 * priority.
18712 */
18713 memset(phba->fcf.fcf_rr_bmask, 0,
18714 sizeof(*phba->fcf.fcf_rr_bmask));
18715 spin_lock_irq(&phba->hbalock);
18716 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18717 if (fcf_pri->fcf_rec.flag & LPFC_FCF_FLOGI_FAILED)
18718 continue;
18719 /*
18720 * the 1st priority that has not FLOGI failed
18721 * will be the highest.
18722 */
18723 if (!next_fcf_pri)
18724 next_fcf_pri = fcf_pri->fcf_rec.priority;
18725 spin_unlock_irq(&phba->hbalock);
18726 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18727 rc = lpfc_sli4_fcf_rr_index_set(phba,
18728 fcf_pri->fcf_rec.fcf_index);
18729 if (rc)
18730 return 0;
18731 }
18732 spin_lock_irq(&phba->hbalock);
18733 }
18734 /*
18735 * if next_fcf_pri was not set above and the list is not empty then
18736 * we have failed flogis on all of them. So reset flogi failed
4907cb7b 18737 * and start at the beginning.
7d791df7
JS
18738 */
18739 if (!next_fcf_pri && !list_empty(&phba->fcf.fcf_pri_list)) {
18740 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18741 fcf_pri->fcf_rec.flag &= ~LPFC_FCF_FLOGI_FAILED;
18742 /*
18743 * the 1st priority that has not FLOGI failed
18744 * will be the highest.
18745 */
18746 if (!next_fcf_pri)
18747 next_fcf_pri = fcf_pri->fcf_rec.priority;
18748 spin_unlock_irq(&phba->hbalock);
18749 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18750 rc = lpfc_sli4_fcf_rr_index_set(phba,
18751 fcf_pri->fcf_rec.fcf_index);
18752 if (rc)
18753 return 0;
18754 }
18755 spin_lock_irq(&phba->hbalock);
18756 }
18757 } else
18758 ret = 1;
18759 spin_unlock_irq(&phba->hbalock);
18760
18761 return ret;
18762}
0c9ab6f5
JS
18763/**
18764 * lpfc_sli4_fcf_rr_next_index_get - Get next eligible fcf record index
18765 * @phba: pointer to lpfc hba data structure.
18766 *
18767 * This routine is to get the next eligible FCF record index in a round
18768 * robin fashion. If the next eligible FCF record index equals to the
a93ff37a 18769 * initial roundrobin FCF record index, LPFC_FCOE_FCF_NEXT_NONE (0xFFFF)
0c9ab6f5
JS
18770 * shall be returned, otherwise, the next eligible FCF record's index
18771 * shall be returned.
18772 **/
18773uint16_t
18774lpfc_sli4_fcf_rr_next_index_get(struct lpfc_hba *phba)
18775{
18776 uint16_t next_fcf_index;
18777
421c6622 18778initial_priority:
3804dc84 18779 /* Search start from next bit of currently registered FCF index */
421c6622
JS
18780 next_fcf_index = phba->fcf.current_rec.fcf_indx;
18781
7d791df7 18782next_priority:
421c6622
JS
18783 /* Determine the next fcf index to check */
18784 next_fcf_index = (next_fcf_index + 1) % LPFC_SLI4_FCF_TBL_INDX_MAX;
0c9ab6f5
JS
18785 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18786 LPFC_SLI4_FCF_TBL_INDX_MAX,
3804dc84
JS
18787 next_fcf_index);
18788
0c9ab6f5 18789 /* Wrap around condition on phba->fcf.fcf_rr_bmask */
7d791df7
JS
18790 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18791 /*
18792 * If we have wrapped then we need to clear the bits that
18793 * have been tested so that we can detect when we should
18794 * change the priority level.
18795 */
0c9ab6f5
JS
18796 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18797 LPFC_SLI4_FCF_TBL_INDX_MAX, 0);
7d791df7
JS
18798 }
18799
3804dc84
JS
18800
18801 /* Check roundrobin failover list empty condition */
7d791df7
JS
18802 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX ||
18803 next_fcf_index == phba->fcf.current_rec.fcf_indx) {
18804 /*
18805 * If next fcf index is not found check if there are lower
18806 * Priority level fcf's in the fcf_priority list.
18807 * Set up the rr_bmask with all of the avaiable fcf bits
18808 * at that level and continue the selection process.
18809 */
18810 if (lpfc_check_next_fcf_pri_level(phba))
421c6622 18811 goto initial_priority;
3804dc84
JS
18812 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP,
18813 "2844 No roundrobin failover FCF available\n");
036cad1f
JS
18814
18815 return LPFC_FCOE_FCF_NEXT_NONE;
3804dc84
JS
18816 }
18817
7d791df7
JS
18818 if (next_fcf_index < LPFC_SLI4_FCF_TBL_INDX_MAX &&
18819 phba->fcf.fcf_pri[next_fcf_index].fcf_rec.flag &
f5cb5304
JS
18820 LPFC_FCF_FLOGI_FAILED) {
18821 if (list_is_singular(&phba->fcf.fcf_pri_list))
18822 return LPFC_FCOE_FCF_NEXT_NONE;
18823
7d791df7 18824 goto next_priority;
f5cb5304 18825 }
7d791df7 18826
3804dc84 18827 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a
JS
18828 "2845 Get next roundrobin failover FCF (x%x)\n",
18829 next_fcf_index);
18830
0c9ab6f5
JS
18831 return next_fcf_index;
18832}
18833
18834/**
18835 * lpfc_sli4_fcf_rr_index_set - Set bmask with eligible fcf record index
18836 * @phba: pointer to lpfc hba data structure.
18837 *
18838 * This routine sets the FCF record index in to the eligible bmask for
a93ff37a 18839 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
18840 * does not go beyond the range of the driver allocated bmask dimension
18841 * before setting the bit.
18842 *
18843 * Returns 0 if the index bit successfully set, otherwise, it returns
18844 * -EINVAL.
18845 **/
18846int
18847lpfc_sli4_fcf_rr_index_set(struct lpfc_hba *phba, uint16_t fcf_index)
18848{
18849 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18850 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
18851 "2610 FCF (x%x) reached driver's book "
18852 "keeping dimension:x%x\n",
0c9ab6f5
JS
18853 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
18854 return -EINVAL;
18855 }
18856 /* Set the eligible FCF record index bmask */
18857 set_bit(fcf_index, phba->fcf.fcf_rr_bmask);
18858
3804dc84 18859 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18860 "2790 Set FCF (x%x) to roundrobin FCF failover "
3804dc84
JS
18861 "bmask\n", fcf_index);
18862
0c9ab6f5
JS
18863 return 0;
18864}
18865
18866/**
3804dc84 18867 * lpfc_sli4_fcf_rr_index_clear - Clear bmask from eligible fcf record index
0c9ab6f5
JS
18868 * @phba: pointer to lpfc hba data structure.
18869 *
18870 * This routine clears the FCF record index from the eligible bmask for
a93ff37a 18871 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
18872 * does not go beyond the range of the driver allocated bmask dimension
18873 * before clearing the bit.
18874 **/
18875void
18876lpfc_sli4_fcf_rr_index_clear(struct lpfc_hba *phba, uint16_t fcf_index)
18877{
9a803a74 18878 struct lpfc_fcf_pri *fcf_pri, *fcf_pri_next;
0c9ab6f5
JS
18879 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18880 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
18881 "2762 FCF (x%x) reached driver's book "
18882 "keeping dimension:x%x\n",
0c9ab6f5
JS
18883 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
18884 return;
18885 }
18886 /* Clear the eligible FCF record index bmask */
7d791df7 18887 spin_lock_irq(&phba->hbalock);
9a803a74
JS
18888 list_for_each_entry_safe(fcf_pri, fcf_pri_next, &phba->fcf.fcf_pri_list,
18889 list) {
7d791df7
JS
18890 if (fcf_pri->fcf_rec.fcf_index == fcf_index) {
18891 list_del_init(&fcf_pri->list);
18892 break;
18893 }
18894 }
18895 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 18896 clear_bit(fcf_index, phba->fcf.fcf_rr_bmask);
3804dc84
JS
18897
18898 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18899 "2791 Clear FCF (x%x) from roundrobin failover "
3804dc84 18900 "bmask\n", fcf_index);
0c9ab6f5
JS
18901}
18902
ecfd03c6
JS
18903/**
18904 * lpfc_mbx_cmpl_redisc_fcf_table - completion routine for rediscover FCF table
18905 * @phba: pointer to lpfc hba data structure.
18906 *
18907 * This routine is the completion routine for the rediscover FCF table mailbox
18908 * command. If the mailbox command returned failure, it will try to stop the
18909 * FCF rediscover wait timer.
18910 **/
5d8b8167 18911static void
ecfd03c6
JS
18912lpfc_mbx_cmpl_redisc_fcf_table(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
18913{
18914 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
18915 uint32_t shdr_status, shdr_add_status;
18916
18917 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
18918
18919 shdr_status = bf_get(lpfc_mbox_hdr_status,
18920 &redisc_fcf->header.cfg_shdr.response);
18921 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
18922 &redisc_fcf->header.cfg_shdr.response);
18923 if (shdr_status || shdr_add_status) {
0c9ab6f5 18924 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
ecfd03c6
JS
18925 "2746 Requesting for FCF rediscovery failed "
18926 "status x%x add_status x%x\n",
18927 shdr_status, shdr_add_status);
0c9ab6f5 18928 if (phba->fcf.fcf_flag & FCF_ACVL_DISC) {
fc2b989b 18929 spin_lock_irq(&phba->hbalock);
0c9ab6f5 18930 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b
JS
18931 spin_unlock_irq(&phba->hbalock);
18932 /*
18933 * CVL event triggered FCF rediscover request failed,
18934 * last resort to re-try current registered FCF entry.
18935 */
18936 lpfc_retry_pport_discovery(phba);
18937 } else {
18938 spin_lock_irq(&phba->hbalock);
0c9ab6f5 18939 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
fc2b989b
JS
18940 spin_unlock_irq(&phba->hbalock);
18941 /*
18942 * DEAD FCF event triggered FCF rediscover request
18943 * failed, last resort to fail over as a link down
18944 * to FCF registration.
18945 */
18946 lpfc_sli4_fcf_dead_failthrough(phba);
18947 }
0c9ab6f5
JS
18948 } else {
18949 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18950 "2775 Start FCF rediscover quiescent timer\n");
ecfd03c6
JS
18951 /*
18952 * Start FCF rediscovery wait timer for pending FCF
18953 * before rescan FCF record table.
18954 */
18955 lpfc_fcf_redisc_wait_start_timer(phba);
0c9ab6f5 18956 }
ecfd03c6
JS
18957
18958 mempool_free(mbox, phba->mbox_mem_pool);
18959}
18960
18961/**
3804dc84 18962 * lpfc_sli4_redisc_fcf_table - Request to rediscover entire FCF table by port.
ecfd03c6
JS
18963 * @phba: pointer to lpfc hba data structure.
18964 *
18965 * This routine is invoked to request for rediscovery of the entire FCF table
18966 * by the port.
18967 **/
18968int
18969lpfc_sli4_redisc_fcf_table(struct lpfc_hba *phba)
18970{
18971 LPFC_MBOXQ_t *mbox;
18972 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
18973 int rc, length;
18974
0c9ab6f5
JS
18975 /* Cancel retry delay timers to all vports before FCF rediscover */
18976 lpfc_cancel_all_vport_retry_delay_timer(phba);
18977
ecfd03c6
JS
18978 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18979 if (!mbox) {
18980 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18981 "2745 Failed to allocate mbox for "
18982 "requesting FCF rediscover.\n");
18983 return -ENOMEM;
18984 }
18985
18986 length = (sizeof(struct lpfc_mbx_redisc_fcf_tbl) -
18987 sizeof(struct lpfc_sli4_cfg_mhdr));
18988 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
18989 LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF,
18990 length, LPFC_SLI4_MBX_EMBED);
18991
18992 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
18993 /* Set count to 0 for invalidating the entire FCF database */
18994 bf_set(lpfc_mbx_redisc_fcf_count, redisc_fcf, 0);
18995
18996 /* Issue the mailbox command asynchronously */
18997 mbox->vport = phba->pport;
18998 mbox->mbox_cmpl = lpfc_mbx_cmpl_redisc_fcf_table;
18999 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
19000
19001 if (rc == MBX_NOT_FINISHED) {
19002 mempool_free(mbox, phba->mbox_mem_pool);
19003 return -EIO;
19004 }
19005 return 0;
19006}
19007
fc2b989b
JS
19008/**
19009 * lpfc_sli4_fcf_dead_failthrough - Failthrough routine to fcf dead event
19010 * @phba: pointer to lpfc hba data structure.
19011 *
19012 * This function is the failover routine as a last resort to the FCF DEAD
19013 * event when driver failed to perform fast FCF failover.
19014 **/
19015void
19016lpfc_sli4_fcf_dead_failthrough(struct lpfc_hba *phba)
19017{
19018 uint32_t link_state;
19019
19020 /*
19021 * Last resort as FCF DEAD event failover will treat this as
19022 * a link down, but save the link state because we don't want
19023 * it to be changed to Link Down unless it is already down.
19024 */
19025 link_state = phba->link_state;
19026 lpfc_linkdown(phba);
19027 phba->link_state = link_state;
19028
19029 /* Unregister FCF if no devices connected to it */
19030 lpfc_unregister_unused_fcf(phba);
19031}
19032
a0c87cbd 19033/**
026abb87 19034 * lpfc_sli_get_config_region23 - Get sli3 port region 23 data.
a0c87cbd 19035 * @phba: pointer to lpfc hba data structure.
026abb87 19036 * @rgn23_data: pointer to configure region 23 data.
a0c87cbd 19037 *
026abb87
JS
19038 * This function gets SLI3 port configure region 23 data through memory dump
19039 * mailbox command. When it successfully retrieves data, the size of the data
19040 * will be returned, otherwise, 0 will be returned.
a0c87cbd 19041 **/
026abb87
JS
19042static uint32_t
19043lpfc_sli_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
a0c87cbd
JS
19044{
19045 LPFC_MBOXQ_t *pmb = NULL;
19046 MAILBOX_t *mb;
026abb87 19047 uint32_t offset = 0;
a0c87cbd
JS
19048 int rc;
19049
026abb87
JS
19050 if (!rgn23_data)
19051 return 0;
19052
a0c87cbd
JS
19053 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19054 if (!pmb) {
19055 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
026abb87
JS
19056 "2600 failed to allocate mailbox memory\n");
19057 return 0;
a0c87cbd
JS
19058 }
19059 mb = &pmb->u.mb;
19060
a0c87cbd
JS
19061 do {
19062 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_23);
19063 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
19064
19065 if (rc != MBX_SUCCESS) {
19066 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
026abb87
JS
19067 "2601 failed to read config "
19068 "region 23, rc 0x%x Status 0x%x\n",
19069 rc, mb->mbxStatus);
a0c87cbd
JS
19070 mb->un.varDmp.word_cnt = 0;
19071 }
19072 /*
19073 * dump mem may return a zero when finished or we got a
19074 * mailbox error, either way we are done.
19075 */
19076 if (mb->un.varDmp.word_cnt == 0)
19077 break;
19078 if (mb->un.varDmp.word_cnt > DMP_RGN23_SIZE - offset)
19079 mb->un.varDmp.word_cnt = DMP_RGN23_SIZE - offset;
19080
19081 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
026abb87
JS
19082 rgn23_data + offset,
19083 mb->un.varDmp.word_cnt);
a0c87cbd
JS
19084 offset += mb->un.varDmp.word_cnt;
19085 } while (mb->un.varDmp.word_cnt && offset < DMP_RGN23_SIZE);
19086
026abb87
JS
19087 mempool_free(pmb, phba->mbox_mem_pool);
19088 return offset;
19089}
19090
19091/**
19092 * lpfc_sli4_get_config_region23 - Get sli4 port region 23 data.
19093 * @phba: pointer to lpfc hba data structure.
19094 * @rgn23_data: pointer to configure region 23 data.
19095 *
19096 * This function gets SLI4 port configure region 23 data through memory dump
19097 * mailbox command. When it successfully retrieves data, the size of the data
19098 * will be returned, otherwise, 0 will be returned.
19099 **/
19100static uint32_t
19101lpfc_sli4_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
19102{
19103 LPFC_MBOXQ_t *mboxq = NULL;
19104 struct lpfc_dmabuf *mp = NULL;
19105 struct lpfc_mqe *mqe;
19106 uint32_t data_length = 0;
19107 int rc;
19108
19109 if (!rgn23_data)
19110 return 0;
19111
19112 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19113 if (!mboxq) {
19114 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19115 "3105 failed to allocate mailbox memory\n");
19116 return 0;
19117 }
19118
19119 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq))
19120 goto out;
19121 mqe = &mboxq->u.mqe;
3e1f0718 19122 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
026abb87
JS
19123 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
19124 if (rc)
19125 goto out;
19126 data_length = mqe->un.mb_words[5];
19127 if (data_length == 0)
19128 goto out;
19129 if (data_length > DMP_RGN23_SIZE) {
19130 data_length = 0;
19131 goto out;
19132 }
19133 lpfc_sli_pcimem_bcopy((char *)mp->virt, rgn23_data, data_length);
19134out:
19135 mempool_free(mboxq, phba->mbox_mem_pool);
19136 if (mp) {
19137 lpfc_mbuf_free(phba, mp->virt, mp->phys);
19138 kfree(mp);
19139 }
19140 return data_length;
19141}
19142
19143/**
19144 * lpfc_sli_read_link_ste - Read region 23 to decide if link is disabled.
19145 * @phba: pointer to lpfc hba data structure.
19146 *
19147 * This function read region 23 and parse TLV for port status to
19148 * decide if the user disaled the port. If the TLV indicates the
19149 * port is disabled, the hba_flag is set accordingly.
19150 **/
19151void
19152lpfc_sli_read_link_ste(struct lpfc_hba *phba)
19153{
19154 uint8_t *rgn23_data = NULL;
19155 uint32_t if_type, data_size, sub_tlv_len, tlv_offset;
19156 uint32_t offset = 0;
19157
19158 /* Get adapter Region 23 data */
19159 rgn23_data = kzalloc(DMP_RGN23_SIZE, GFP_KERNEL);
19160 if (!rgn23_data)
19161 goto out;
19162
19163 if (phba->sli_rev < LPFC_SLI_REV4)
19164 data_size = lpfc_sli_get_config_region23(phba, rgn23_data);
19165 else {
19166 if_type = bf_get(lpfc_sli_intf_if_type,
19167 &phba->sli4_hba.sli_intf);
19168 if (if_type == LPFC_SLI_INTF_IF_TYPE_0)
19169 goto out;
19170 data_size = lpfc_sli4_get_config_region23(phba, rgn23_data);
19171 }
a0c87cbd
JS
19172
19173 if (!data_size)
19174 goto out;
19175
19176 /* Check the region signature first */
19177 if (memcmp(&rgn23_data[offset], LPFC_REGION23_SIGNATURE, 4)) {
19178 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19179 "2619 Config region 23 has bad signature\n");
19180 goto out;
19181 }
19182 offset += 4;
19183
19184 /* Check the data structure version */
19185 if (rgn23_data[offset] != LPFC_REGION23_VERSION) {
19186 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19187 "2620 Config region 23 has bad version\n");
19188 goto out;
19189 }
19190 offset += 4;
19191
19192 /* Parse TLV entries in the region */
19193 while (offset < data_size) {
19194 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC)
19195 break;
19196 /*
19197 * If the TLV is not driver specific TLV or driver id is
19198 * not linux driver id, skip the record.
19199 */
19200 if ((rgn23_data[offset] != DRIVER_SPECIFIC_TYPE) ||
19201 (rgn23_data[offset + 2] != LINUX_DRIVER_ID) ||
19202 (rgn23_data[offset + 3] != 0)) {
19203 offset += rgn23_data[offset + 1] * 4 + 4;
19204 continue;
19205 }
19206
19207 /* Driver found a driver specific TLV in the config region */
19208 sub_tlv_len = rgn23_data[offset + 1] * 4;
19209 offset += 4;
19210 tlv_offset = 0;
19211
19212 /*
19213 * Search for configured port state sub-TLV.
19214 */
19215 while ((offset < data_size) &&
19216 (tlv_offset < sub_tlv_len)) {
19217 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC) {
19218 offset += 4;
19219 tlv_offset += 4;
19220 break;
19221 }
19222 if (rgn23_data[offset] != PORT_STE_TYPE) {
19223 offset += rgn23_data[offset + 1] * 4 + 4;
19224 tlv_offset += rgn23_data[offset + 1] * 4 + 4;
19225 continue;
19226 }
19227
19228 /* This HBA contains PORT_STE configured */
19229 if (!rgn23_data[offset + 2])
19230 phba->hba_flag |= LINK_DISABLED;
19231
19232 goto out;
19233 }
19234 }
026abb87 19235
a0c87cbd 19236out:
a0c87cbd
JS
19237 kfree(rgn23_data);
19238 return;
19239}
695a814e 19240
52d52440
JS
19241/**
19242 * lpfc_wr_object - write an object to the firmware
19243 * @phba: HBA structure that indicates port to create a queue on.
19244 * @dmabuf_list: list of dmabufs to write to the port.
19245 * @size: the total byte value of the objects to write to the port.
19246 * @offset: the current offset to be used to start the transfer.
19247 *
19248 * This routine will create a wr_object mailbox command to send to the port.
19249 * the mailbox command will be constructed using the dma buffers described in
19250 * @dmabuf_list to create a list of BDEs. This routine will fill in as many
19251 * BDEs that the imbedded mailbox can support. The @offset variable will be
19252 * used to indicate the starting offset of the transfer and will also return
19253 * the offset after the write object mailbox has completed. @size is used to
19254 * determine the end of the object and whether the eof bit should be set.
19255 *
19256 * Return 0 is successful and offset will contain the the new offset to use
19257 * for the next write.
19258 * Return negative value for error cases.
19259 **/
19260int
19261lpfc_wr_object(struct lpfc_hba *phba, struct list_head *dmabuf_list,
19262 uint32_t size, uint32_t *offset)
19263{
19264 struct lpfc_mbx_wr_object *wr_object;
19265 LPFC_MBOXQ_t *mbox;
19266 int rc = 0, i = 0;
5021267a 19267 uint32_t shdr_status, shdr_add_status, shdr_change_status;
52d52440 19268 uint32_t mbox_tmo;
52d52440
JS
19269 struct lpfc_dmabuf *dmabuf;
19270 uint32_t written = 0;
5021267a 19271 bool check_change_status = false;
52d52440
JS
19272
19273 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19274 if (!mbox)
19275 return -ENOMEM;
19276
19277 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
19278 LPFC_MBOX_OPCODE_WRITE_OBJECT,
19279 sizeof(struct lpfc_mbx_wr_object) -
19280 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
19281
19282 wr_object = (struct lpfc_mbx_wr_object *)&mbox->u.mqe.un.wr_object;
19283 wr_object->u.request.write_offset = *offset;
19284 sprintf((uint8_t *)wr_object->u.request.object_name, "/");
19285 wr_object->u.request.object_name[0] =
19286 cpu_to_le32(wr_object->u.request.object_name[0]);
19287 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 0);
19288 list_for_each_entry(dmabuf, dmabuf_list, list) {
19289 if (i >= LPFC_MBX_WR_CONFIG_MAX_BDE || written >= size)
19290 break;
19291 wr_object->u.request.bde[i].addrLow = putPaddrLow(dmabuf->phys);
19292 wr_object->u.request.bde[i].addrHigh =
19293 putPaddrHigh(dmabuf->phys);
19294 if (written + SLI4_PAGE_SIZE >= size) {
19295 wr_object->u.request.bde[i].tus.f.bdeSize =
19296 (size - written);
19297 written += (size - written);
19298 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 1);
5021267a
JS
19299 bf_set(lpfc_wr_object_eas, &wr_object->u.request, 1);
19300 check_change_status = true;
52d52440
JS
19301 } else {
19302 wr_object->u.request.bde[i].tus.f.bdeSize =
19303 SLI4_PAGE_SIZE;
19304 written += SLI4_PAGE_SIZE;
19305 }
19306 i++;
19307 }
19308 wr_object->u.request.bde_count = i;
19309 bf_set(lpfc_wr_object_write_length, &wr_object->u.request, written);
19310 if (!phba->sli4_hba.intr_enable)
19311 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
19312 else {
a183a15f 19313 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
52d52440
JS
19314 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
19315 }
19316 /* The IOCTL status is embedded in the mailbox subheader. */
5021267a
JS
19317 shdr_status = bf_get(lpfc_mbox_hdr_status,
19318 &wr_object->header.cfg_shdr.response);
19319 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
19320 &wr_object->header.cfg_shdr.response);
19321 if (check_change_status) {
19322 shdr_change_status = bf_get(lpfc_wr_object_change_status,
19323 &wr_object->u.response);
19324 switch (shdr_change_status) {
19325 case (LPFC_CHANGE_STATUS_PHYS_DEV_RESET):
19326 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19327 "3198 Firmware write complete: System "
19328 "reboot required to instantiate\n");
19329 break;
19330 case (LPFC_CHANGE_STATUS_FW_RESET):
19331 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19332 "3199 Firmware write complete: Firmware"
19333 " reset required to instantiate\n");
19334 break;
19335 case (LPFC_CHANGE_STATUS_PORT_MIGRATION):
19336 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19337 "3200 Firmware write complete: Port "
19338 "Migration or PCI Reset required to "
19339 "instantiate\n");
19340 break;
19341 case (LPFC_CHANGE_STATUS_PCI_RESET):
19342 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19343 "3201 Firmware write complete: PCI "
19344 "Reset required to instantiate\n");
19345 break;
19346 default:
19347 break;
19348 }
19349 }
52d52440
JS
19350 if (rc != MBX_TIMEOUT)
19351 mempool_free(mbox, phba->mbox_mem_pool);
19352 if (shdr_status || shdr_add_status || rc) {
19353 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19354 "3025 Write Object mailbox failed with "
19355 "status x%x add_status x%x, mbx status x%x\n",
19356 shdr_status, shdr_add_status, rc);
19357 rc = -ENXIO;
1feb8204 19358 *offset = shdr_add_status;
52d52440
JS
19359 } else
19360 *offset += wr_object->u.response.actual_write_length;
19361 return rc;
19362}
19363
695a814e
JS
19364/**
19365 * lpfc_cleanup_pending_mbox - Free up vport discovery mailbox commands.
19366 * @vport: pointer to vport data structure.
19367 *
19368 * This function iterate through the mailboxq and clean up all REG_LOGIN
19369 * and REG_VPI mailbox commands associated with the vport. This function
19370 * is called when driver want to restart discovery of the vport due to
19371 * a Clear Virtual Link event.
19372 **/
19373void
19374lpfc_cleanup_pending_mbox(struct lpfc_vport *vport)
19375{
19376 struct lpfc_hba *phba = vport->phba;
19377 LPFC_MBOXQ_t *mb, *nextmb;
19378 struct lpfc_dmabuf *mp;
78730cfe 19379 struct lpfc_nodelist *ndlp;
d439d286 19380 struct lpfc_nodelist *act_mbx_ndlp = NULL;
589a52d6 19381 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
d439d286 19382 LIST_HEAD(mbox_cmd_list);
63e801ce 19383 uint8_t restart_loop;
695a814e 19384
d439d286 19385 /* Clean up internally queued mailbox commands with the vport */
695a814e
JS
19386 spin_lock_irq(&phba->hbalock);
19387 list_for_each_entry_safe(mb, nextmb, &phba->sli.mboxq, list) {
19388 if (mb->vport != vport)
19389 continue;
19390
19391 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19392 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19393 continue;
19394
d439d286
JS
19395 list_del(&mb->list);
19396 list_add_tail(&mb->list, &mbox_cmd_list);
19397 }
19398 /* Clean up active mailbox command with the vport */
19399 mb = phba->sli.mbox_active;
19400 if (mb && (mb->vport == vport)) {
19401 if ((mb->u.mb.mbxCommand == MBX_REG_LOGIN64) ||
19402 (mb->u.mb.mbxCommand == MBX_REG_VPI))
19403 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19404 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19405 act_mbx_ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
d439d286
JS
19406 /* Put reference count for delayed processing */
19407 act_mbx_ndlp = lpfc_nlp_get(act_mbx_ndlp);
19408 /* Unregister the RPI when mailbox complete */
19409 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19410 }
19411 }
63e801ce
JS
19412 /* Cleanup any mailbox completions which are not yet processed */
19413 do {
19414 restart_loop = 0;
19415 list_for_each_entry(mb, &phba->sli.mboxq_cmpl, list) {
19416 /*
19417 * If this mailox is already processed or it is
19418 * for another vport ignore it.
19419 */
19420 if ((mb->vport != vport) ||
19421 (mb->mbox_flag & LPFC_MBX_IMED_UNREG))
19422 continue;
19423
19424 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19425 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19426 continue;
19427
19428 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19429 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19430 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
63e801ce
JS
19431 /* Unregister the RPI when mailbox complete */
19432 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19433 restart_loop = 1;
19434 spin_unlock_irq(&phba->hbalock);
19435 spin_lock(shost->host_lock);
19436 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19437 spin_unlock(shost->host_lock);
19438 spin_lock_irq(&phba->hbalock);
19439 break;
19440 }
19441 }
19442 } while (restart_loop);
19443
d439d286
JS
19444 spin_unlock_irq(&phba->hbalock);
19445
19446 /* Release the cleaned-up mailbox commands */
19447 while (!list_empty(&mbox_cmd_list)) {
19448 list_remove_head(&mbox_cmd_list, mb, LPFC_MBOXQ_t, list);
695a814e 19449 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19450 mp = (struct lpfc_dmabuf *)(mb->ctx_buf);
695a814e
JS
19451 if (mp) {
19452 __lpfc_mbuf_free(phba, mp->virt, mp->phys);
19453 kfree(mp);
19454 }
3e1f0718
JS
19455 mb->ctx_buf = NULL;
19456 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
19457 mb->ctx_ndlp = NULL;
78730cfe 19458 if (ndlp) {
ec21b3b0 19459 spin_lock(shost->host_lock);
589a52d6 19460 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
ec21b3b0 19461 spin_unlock(shost->host_lock);
78730cfe 19462 lpfc_nlp_put(ndlp);
78730cfe 19463 }
695a814e 19464 }
695a814e
JS
19465 mempool_free(mb, phba->mbox_mem_pool);
19466 }
d439d286
JS
19467
19468 /* Release the ndlp with the cleaned-up active mailbox command */
19469 if (act_mbx_ndlp) {
19470 spin_lock(shost->host_lock);
19471 act_mbx_ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19472 spin_unlock(shost->host_lock);
19473 lpfc_nlp_put(act_mbx_ndlp);
695a814e 19474 }
695a814e
JS
19475}
19476
2a9bf3d0
JS
19477/**
19478 * lpfc_drain_txq - Drain the txq
19479 * @phba: Pointer to HBA context object.
19480 *
19481 * This function attempt to submit IOCBs on the txq
19482 * to the adapter. For SLI4 adapters, the txq contains
19483 * ELS IOCBs that have been deferred because the there
19484 * are no SGLs. This congestion can occur with large
19485 * vport counts during node discovery.
19486 **/
19487
19488uint32_t
19489lpfc_drain_txq(struct lpfc_hba *phba)
19490{
19491 LIST_HEAD(completions);
895427bd 19492 struct lpfc_sli_ring *pring;
2e706377 19493 struct lpfc_iocbq *piocbq = NULL;
2a9bf3d0
JS
19494 unsigned long iflags = 0;
19495 char *fail_msg = NULL;
19496 struct lpfc_sglq *sglq;
205e8240 19497 union lpfc_wqe128 wqe;
a2fc4aef 19498 uint32_t txq_cnt = 0;
dc19e3b4 19499 struct lpfc_queue *wq;
2a9bf3d0 19500
dc19e3b4
JS
19501 if (phba->link_flag & LS_MDS_LOOPBACK) {
19502 /* MDS WQE are posted only to first WQ*/
19503 wq = phba->sli4_hba.fcp_wq[0];
19504 if (unlikely(!wq))
19505 return 0;
19506 pring = wq->pring;
19507 } else {
19508 wq = phba->sli4_hba.els_wq;
19509 if (unlikely(!wq))
19510 return 0;
19511 pring = lpfc_phba_elsring(phba);
19512 }
19513
19514 if (unlikely(!pring) || list_empty(&pring->txq))
1234a6d5 19515 return 0;
895427bd 19516
398d81c9 19517 spin_lock_irqsave(&pring->ring_lock, iflags);
0e9bb8d7
JS
19518 list_for_each_entry(piocbq, &pring->txq, list) {
19519 txq_cnt++;
19520 }
19521
19522 if (txq_cnt > pring->txq_max)
19523 pring->txq_max = txq_cnt;
2a9bf3d0 19524
398d81c9 19525 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19526
0e9bb8d7 19527 while (!list_empty(&pring->txq)) {
398d81c9 19528 spin_lock_irqsave(&pring->ring_lock, iflags);
2a9bf3d0 19529
19ca7609 19530 piocbq = lpfc_sli_ringtx_get(phba, pring);
a629852a 19531 if (!piocbq) {
398d81c9 19532 spin_unlock_irqrestore(&pring->ring_lock, iflags);
a629852a
JS
19533 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19534 "2823 txq empty and txq_cnt is %d\n ",
0e9bb8d7 19535 txq_cnt);
a629852a
JS
19536 break;
19537 }
895427bd 19538 sglq = __lpfc_sli_get_els_sglq(phba, piocbq);
2a9bf3d0 19539 if (!sglq) {
19ca7609 19540 __lpfc_sli_ringtx_put(phba, pring, piocbq);
398d81c9 19541 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19542 break;
2a9bf3d0 19543 }
0e9bb8d7 19544 txq_cnt--;
2a9bf3d0
JS
19545
19546 /* The xri and iocb resources secured,
19547 * attempt to issue request
19548 */
6d368e53 19549 piocbq->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0
JS
19550 piocbq->sli4_xritag = sglq->sli4_xritag;
19551 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocbq, sglq))
19552 fail_msg = "to convert bpl to sgl";
205e8240 19553 else if (lpfc_sli4_iocb2wqe(phba, piocbq, &wqe))
2a9bf3d0 19554 fail_msg = "to convert iocb to wqe";
dc19e3b4 19555 else if (lpfc_sli4_wq_put(wq, &wqe))
2a9bf3d0
JS
19556 fail_msg = " - Wq is full";
19557 else
19558 lpfc_sli_ringtxcmpl_put(phba, pring, piocbq);
19559
19560 if (fail_msg) {
19561 /* Failed means we can't issue and need to cancel */
19562 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19563 "2822 IOCB failed %s iotag 0x%x "
19564 "xri 0x%x\n",
19565 fail_msg,
19566 piocbq->iotag, piocbq->sli4_xritag);
19567 list_add_tail(&piocbq->list, &completions);
19568 }
398d81c9 19569 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0
JS
19570 }
19571
2a9bf3d0
JS
19572 /* Cancel all the IOCBs that cannot be issued */
19573 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
19574 IOERR_SLI_ABORTED);
19575
0e9bb8d7 19576 return txq_cnt;
2a9bf3d0 19577}
895427bd
JS
19578
19579/**
19580 * lpfc_wqe_bpl2sgl - Convert the bpl/bde to a sgl.
19581 * @phba: Pointer to HBA context object.
19582 * @pwqe: Pointer to command WQE.
19583 * @sglq: Pointer to the scatter gather queue object.
19584 *
19585 * This routine converts the bpl or bde that is in the WQE
19586 * to a sgl list for the sli4 hardware. The physical address
19587 * of the bpl/bde is converted back to a virtual address.
19588 * If the WQE contains a BPL then the list of BDE's is
19589 * converted to sli4_sge's. If the WQE contains a single
19590 * BDE then it is converted to a single sli_sge.
19591 * The WQE is still in cpu endianness so the contents of
19592 * the bpl can be used without byte swapping.
19593 *
19594 * Returns valid XRI = Success, NO_XRI = Failure.
19595 */
19596static uint16_t
19597lpfc_wqe_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *pwqeq,
19598 struct lpfc_sglq *sglq)
19599{
19600 uint16_t xritag = NO_XRI;
19601 struct ulp_bde64 *bpl = NULL;
19602 struct ulp_bde64 bde;
19603 struct sli4_sge *sgl = NULL;
19604 struct lpfc_dmabuf *dmabuf;
205e8240 19605 union lpfc_wqe128 *wqe;
895427bd
JS
19606 int numBdes = 0;
19607 int i = 0;
19608 uint32_t offset = 0; /* accumulated offset in the sg request list */
19609 int inbound = 0; /* number of sg reply entries inbound from firmware */
19610 uint32_t cmd;
19611
19612 if (!pwqeq || !sglq)
19613 return xritag;
19614
19615 sgl = (struct sli4_sge *)sglq->sgl;
19616 wqe = &pwqeq->wqe;
19617 pwqeq->iocb.ulpIoTag = pwqeq->iotag;
19618
19619 cmd = bf_get(wqe_cmnd, &wqe->generic.wqe_com);
19620 if (cmd == CMD_XMIT_BLS_RSP64_WQE)
19621 return sglq->sli4_xritag;
19622 numBdes = pwqeq->rsvd2;
19623 if (numBdes) {
19624 /* The addrHigh and addrLow fields within the WQE
19625 * have not been byteswapped yet so there is no
19626 * need to swap them back.
19627 */
19628 if (pwqeq->context3)
19629 dmabuf = (struct lpfc_dmabuf *)pwqeq->context3;
19630 else
19631 return xritag;
19632
19633 bpl = (struct ulp_bde64 *)dmabuf->virt;
19634 if (!bpl)
19635 return xritag;
19636
19637 for (i = 0; i < numBdes; i++) {
19638 /* Should already be byte swapped. */
19639 sgl->addr_hi = bpl->addrHigh;
19640 sgl->addr_lo = bpl->addrLow;
19641
19642 sgl->word2 = le32_to_cpu(sgl->word2);
19643 if ((i+1) == numBdes)
19644 bf_set(lpfc_sli4_sge_last, sgl, 1);
19645 else
19646 bf_set(lpfc_sli4_sge_last, sgl, 0);
19647 /* swap the size field back to the cpu so we
19648 * can assign it to the sgl.
19649 */
19650 bde.tus.w = le32_to_cpu(bpl->tus.w);
19651 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
19652 /* The offsets in the sgl need to be accumulated
19653 * separately for the request and reply lists.
19654 * The request is always first, the reply follows.
19655 */
19656 switch (cmd) {
19657 case CMD_GEN_REQUEST64_WQE:
19658 /* add up the reply sg entries */
19659 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
19660 inbound++;
19661 /* first inbound? reset the offset */
19662 if (inbound == 1)
19663 offset = 0;
19664 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19665 bf_set(lpfc_sli4_sge_type, sgl,
19666 LPFC_SGE_TYPE_DATA);
19667 offset += bde.tus.f.bdeSize;
19668 break;
19669 case CMD_FCP_TRSP64_WQE:
19670 bf_set(lpfc_sli4_sge_offset, sgl, 0);
19671 bf_set(lpfc_sli4_sge_type, sgl,
19672 LPFC_SGE_TYPE_DATA);
19673 break;
19674 case CMD_FCP_TSEND64_WQE:
19675 case CMD_FCP_TRECEIVE64_WQE:
19676 bf_set(lpfc_sli4_sge_type, sgl,
19677 bpl->tus.f.bdeFlags);
19678 if (i < 3)
19679 offset = 0;
19680 else
19681 offset += bde.tus.f.bdeSize;
19682 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19683 break;
19684 }
19685 sgl->word2 = cpu_to_le32(sgl->word2);
19686 bpl++;
19687 sgl++;
19688 }
19689 } else if (wqe->gen_req.bde.tus.f.bdeFlags == BUFF_TYPE_BDE_64) {
19690 /* The addrHigh and addrLow fields of the BDE have not
19691 * been byteswapped yet so they need to be swapped
19692 * before putting them in the sgl.
19693 */
19694 sgl->addr_hi = cpu_to_le32(wqe->gen_req.bde.addrHigh);
19695 sgl->addr_lo = cpu_to_le32(wqe->gen_req.bde.addrLow);
19696 sgl->word2 = le32_to_cpu(sgl->word2);
19697 bf_set(lpfc_sli4_sge_last, sgl, 1);
19698 sgl->word2 = cpu_to_le32(sgl->word2);
19699 sgl->sge_len = cpu_to_le32(wqe->gen_req.bde.tus.f.bdeSize);
19700 }
19701 return sglq->sli4_xritag;
19702}
19703
19704/**
19705 * lpfc_sli4_issue_wqe - Issue an SLI4 Work Queue Entry (WQE)
19706 * @phba: Pointer to HBA context object.
19707 * @ring_number: Base sli ring number
19708 * @pwqe: Pointer to command WQE.
19709 **/
19710int
19711lpfc_sli4_issue_wqe(struct lpfc_hba *phba, uint32_t ring_number,
19712 struct lpfc_iocbq *pwqe)
19713{
205e8240 19714 union lpfc_wqe128 *wqe = &pwqe->wqe;
f358dd0c 19715 struct lpfc_nvmet_rcv_ctx *ctxp;
895427bd
JS
19716 struct lpfc_queue *wq;
19717 struct lpfc_sglq *sglq;
19718 struct lpfc_sli_ring *pring;
19719 unsigned long iflags;
cd22d605 19720 uint32_t ret = 0;
895427bd
JS
19721
19722 /* NVME_LS and NVME_LS ABTS requests. */
19723 if (pwqe->iocb_flag & LPFC_IO_NVME_LS) {
19724 pring = phba->sli4_hba.nvmels_wq->pring;
19725 spin_lock_irqsave(&pring->ring_lock, iflags);
19726 sglq = __lpfc_sli_get_els_sglq(phba, pwqe);
19727 if (!sglq) {
19728 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19729 return WQE_BUSY;
19730 }
19731 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19732 pwqe->sli4_xritag = sglq->sli4_xritag;
19733 if (lpfc_wqe_bpl2sgl(phba, pwqe, sglq) == NO_XRI) {
19734 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19735 return WQE_ERROR;
19736 }
19737 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19738 pwqe->sli4_xritag);
cd22d605
DK
19739 ret = lpfc_sli4_wq_put(phba->sli4_hba.nvmels_wq, wqe);
19740 if (ret) {
895427bd 19741 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19742 return ret;
895427bd 19743 }
cd22d605 19744
895427bd
JS
19745 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19746 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19747 return 0;
19748 }
19749
19750 /* NVME_FCREQ and NVME_ABTS requests */
19751 if (pwqe->iocb_flag & LPFC_IO_NVME) {
19752 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
19753 pring = phba->sli4_hba.nvme_wq[pwqe->hba_wqidx]->pring;
19754
19755 spin_lock_irqsave(&pring->ring_lock, iflags);
19756 wq = phba->sli4_hba.nvme_wq[pwqe->hba_wqidx];
19757 bf_set(wqe_cqid, &wqe->generic.wqe_com,
19758 phba->sli4_hba.nvme_cq[pwqe->hba_wqidx]->queue_id);
cd22d605
DK
19759 ret = lpfc_sli4_wq_put(wq, wqe);
19760 if (ret) {
895427bd 19761 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19762 return ret;
895427bd
JS
19763 }
19764 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19765 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19766 return 0;
19767 }
19768
f358dd0c
JS
19769 /* NVMET requests */
19770 if (pwqe->iocb_flag & LPFC_IO_NVMET) {
19771 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
19772 pring = phba->sli4_hba.nvme_wq[pwqe->hba_wqidx]->pring;
19773
19774 spin_lock_irqsave(&pring->ring_lock, iflags);
19775 ctxp = pwqe->context2;
6c621a22 19776 sglq = ctxp->ctxbuf->sglq;
f358dd0c
JS
19777 if (pwqe->sli4_xritag == NO_XRI) {
19778 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19779 pwqe->sli4_xritag = sglq->sli4_xritag;
19780 }
19781 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19782 pwqe->sli4_xritag);
19783 wq = phba->sli4_hba.nvme_wq[pwqe->hba_wqidx];
19784 bf_set(wqe_cqid, &wqe->generic.wqe_com,
19785 phba->sli4_hba.nvme_cq[pwqe->hba_wqidx]->queue_id);
cd22d605
DK
19786 ret = lpfc_sli4_wq_put(wq, wqe);
19787 if (ret) {
f358dd0c 19788 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19789 return ret;
f358dd0c
JS
19790 }
19791 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19792 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19793 return 0;
19794 }
895427bd
JS
19795 return WQE_ERROR;
19796}