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1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
145e5a8a 4 * Copyright (C) 2017-2020 Broadcom. All Rights Reserved. The term *
3e21d1cb 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
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10 * *
11 * This program is free software; you can redistribute it and/or *
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12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
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22 *******************************************************************/
23
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24#include <linux/blkdev.h>
25#include <linux/pci.h>
26#include <linux/interrupt.h>
27#include <linux/delay.h>
5a0e3ad6 28#include <linux/slab.h>
1c2ba475 29#include <linux/lockdep.h>
dea3101e 30
91886523 31#include <scsi/scsi.h>
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32#include <scsi/scsi_cmnd.h>
33#include <scsi/scsi_device.h>
34#include <scsi/scsi_host.h>
f888ba3c 35#include <scsi/scsi_transport_fc.h>
da0436e9 36#include <scsi/fc/fc_fs.h>
0d878419 37#include <linux/aer.h>
86ee57a9 38#include <linux/crash_dump.h>
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39#ifdef CONFIG_X86
40#include <asm/set_memory.h>
41#endif
dea3101e 42
da0436e9 43#include "lpfc_hw4.h"
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44#include "lpfc_hw.h"
45#include "lpfc_sli.h"
da0436e9 46#include "lpfc_sli4.h"
ea2151b4 47#include "lpfc_nl.h"
dea3101e 48#include "lpfc_disc.h"
dea3101e 49#include "lpfc.h"
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50#include "lpfc_scsi.h"
51#include "lpfc_nvme.h"
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52#include "lpfc_crtn.h"
53#include "lpfc_logmsg.h"
54#include "lpfc_compat.h"
858c9f6c 55#include "lpfc_debugfs.h"
04c68496 56#include "lpfc_vport.h"
61bda8f7 57#include "lpfc_version.h"
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58
59/* There are only four IOCB completion types. */
60typedef enum _lpfc_iocb_type {
61 LPFC_UNKNOWN_IOCB,
62 LPFC_UNSOL_IOCB,
63 LPFC_SOL_IOCB,
64 LPFC_ABORT_IOCB
65} lpfc_iocb_type;
66
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67
68/* Provide function prototypes local to this module. */
69static int lpfc_sli_issue_mbox_s4(struct lpfc_hba *, LPFC_MBOXQ_t *,
70 uint32_t);
71static int lpfc_sli4_read_rev(struct lpfc_hba *, LPFC_MBOXQ_t *,
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72 uint8_t *, uint32_t *);
73static struct lpfc_iocbq *lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *,
74 struct lpfc_iocbq *);
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75static void lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *,
76 struct hbq_dmabuf *);
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77static void lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
78 struct hbq_dmabuf *dmabuf);
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79static bool lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba,
80 struct lpfc_queue *cq, struct lpfc_cqe *cqe);
895427bd 81static int lpfc_sli4_post_sgl_list(struct lpfc_hba *, struct list_head *,
8a9d2e80 82 int);
f485c18d 83static void lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba,
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84 struct lpfc_queue *eq,
85 struct lpfc_eqe *eqe);
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86static bool lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba);
87static bool lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba);
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88static struct lpfc_cqe *lpfc_sli4_cq_get(struct lpfc_queue *q);
89static void __lpfc_sli4_consume_cqe(struct lpfc_hba *phba,
90 struct lpfc_queue *cq,
91 struct lpfc_cqe *cqe);
0558056c 92
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93static IOCB_t *
94lpfc_get_iocb_from_iocbq(struct lpfc_iocbq *iocbq)
95{
96 return &iocbq->iocb;
97}
98
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99#if defined(CONFIG_64BIT) && defined(__LITTLE_ENDIAN)
100/**
101 * lpfc_sli4_pcimem_bcopy - SLI4 memory copy function
102 * @srcp: Source memory pointer.
103 * @destp: Destination memory pointer.
104 * @cnt: Number of words required to be copied.
105 * Must be a multiple of sizeof(uint64_t)
106 *
107 * This function is used for copying data between driver memory
108 * and the SLI WQ. This function also changes the endianness
109 * of each word if native endianness is different from SLI
110 * endianness. This function can be called with or without
111 * lock.
112 **/
d7b761b0 113static void
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114lpfc_sli4_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
115{
116 uint64_t *src = srcp;
117 uint64_t *dest = destp;
118 int i;
119
120 for (i = 0; i < (int)cnt; i += sizeof(uint64_t))
121 *dest++ = *src++;
122}
123#else
124#define lpfc_sli4_pcimem_bcopy(a, b, c) lpfc_sli_pcimem_bcopy(a, b, c)
125#endif
126
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127/**
128 * lpfc_sli4_wq_put - Put a Work Queue Entry on an Work Queue
129 * @q: The Work Queue to operate on.
130 * @wqe: The work Queue Entry to put on the Work queue.
131 *
132 * This routine will copy the contents of @wqe to the next available entry on
133 * the @q. This function will then ring the Work Queue Doorbell to signal the
134 * HBA to start processing the Work Queue Entry. This function returns 0 if
135 * successful. If no entries are available on @q then this function will return
136 * -ENOMEM.
137 * The caller is expected to hold the hbalock when calling this routine.
138 **/
cd22d605 139static int
205e8240 140lpfc_sli4_wq_put(struct lpfc_queue *q, union lpfc_wqe128 *wqe)
4f774513 141{
2e90f4b5 142 union lpfc_wqe *temp_wqe;
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143 struct lpfc_register doorbell;
144 uint32_t host_index;
027140ea 145 uint32_t idx;
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146 uint32_t i = 0;
147 uint8_t *tmp;
5cc167dd 148 u32 if_type;
4f774513 149
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150 /* sanity check on queue memory */
151 if (unlikely(!q))
152 return -ENOMEM;
9afbee3d 153 temp_wqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 154
4f774513 155 /* If the host has not yet processed the next entry then we are done */
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156 idx = ((q->host_index + 1) % q->entry_count);
157 if (idx == q->hba_index) {
b84daac9 158 q->WQ_overflow++;
cd22d605 159 return -EBUSY;
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160 }
161 q->WQ_posted++;
4f774513 162 /* set consumption flag every once in a while */
32517fc0 163 if (!((q->host_index + 1) % q->notify_interval))
f0d9bccc 164 bf_set(wqe_wqec, &wqe->generic.wqe_com, 1);
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165 else
166 bf_set(wqe_wqec, &wqe->generic.wqe_com, 0);
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167 if (q->phba->sli3_options & LPFC_SLI4_PHWQ_ENABLED)
168 bf_set(wqe_wqid, &wqe->generic.wqe_com, q->queue_id);
48f8fdb4 169 lpfc_sli4_pcimem_bcopy(wqe, temp_wqe, q->entry_size);
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170 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
171 /* write to DPP aperture taking advatage of Combined Writes */
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172 tmp = (uint8_t *)temp_wqe;
173#ifdef __raw_writeq
1351e69f 174 for (i = 0; i < q->entry_size; i += sizeof(uint64_t))
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175 __raw_writeq(*((uint64_t *)(tmp + i)),
176 q->dpp_regaddr + i);
177#else
178 for (i = 0; i < q->entry_size; i += sizeof(uint32_t))
179 __raw_writel(*((uint32_t *)(tmp + i)),
180 q->dpp_regaddr + i);
181#endif
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182 }
183 /* ensure WQE bcopy and DPP flushed before doorbell write */
6b3b3bdb 184 wmb();
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185
186 /* Update the host index before invoking device */
187 host_index = q->host_index;
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188
189 q->host_index = idx;
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190
191 /* Ring Doorbell */
192 doorbell.word0 = 0;
962bc51b 193 if (q->db_format == LPFC_DB_LIST_FORMAT) {
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194 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
195 bf_set(lpfc_if6_wq_db_list_fm_num_posted, &doorbell, 1);
196 bf_set(lpfc_if6_wq_db_list_fm_dpp, &doorbell, 1);
197 bf_set(lpfc_if6_wq_db_list_fm_dpp_id, &doorbell,
198 q->dpp_id);
199 bf_set(lpfc_if6_wq_db_list_fm_id, &doorbell,
200 q->queue_id);
201 } else {
202 bf_set(lpfc_wq_db_list_fm_num_posted, &doorbell, 1);
1351e69f 203 bf_set(lpfc_wq_db_list_fm_id, &doorbell, q->queue_id);
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204
205 /* Leave bits <23:16> clear for if_type 6 dpp */
206 if_type = bf_get(lpfc_sli_intf_if_type,
207 &q->phba->sli4_hba.sli_intf);
208 if (if_type != LPFC_SLI_INTF_IF_TYPE_6)
209 bf_set(lpfc_wq_db_list_fm_index, &doorbell,
210 host_index);
1351e69f 211 }
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212 } else if (q->db_format == LPFC_DB_RING_FORMAT) {
213 bf_set(lpfc_wq_db_ring_fm_num_posted, &doorbell, 1);
214 bf_set(lpfc_wq_db_ring_fm_id, &doorbell, q->queue_id);
215 } else {
216 return -EINVAL;
217 }
218 writel(doorbell.word0, q->db_regaddr);
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219
220 return 0;
221}
222
223/**
224 * lpfc_sli4_wq_release - Updates internal hba index for WQ
225 * @q: The Work Queue to operate on.
226 * @index: The index to advance the hba index to.
227 *
228 * This routine will update the HBA index of a queue to reflect consumption of
229 * Work Queue Entries by the HBA. When the HBA indicates that it has consumed
230 * an entry the host calls this function to update the queue's internal
1543af38 231 * pointers.
4f774513 232 **/
1543af38 233static void
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234lpfc_sli4_wq_release(struct lpfc_queue *q, uint32_t index)
235{
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236 /* sanity check on queue memory */
237 if (unlikely(!q))
1543af38 238 return;
2e90f4b5 239
1543af38 240 q->hba_index = index;
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241}
242
243/**
244 * lpfc_sli4_mq_put - Put a Mailbox Queue Entry on an Mailbox Queue
245 * @q: The Mailbox Queue to operate on.
7af29d45 246 * @mqe: The Mailbox Queue Entry to put on the Work queue.
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247 *
248 * This routine will copy the contents of @mqe to the next available entry on
249 * the @q. This function will then ring the Work Queue Doorbell to signal the
250 * HBA to start processing the Work Queue Entry. This function returns 0 if
251 * successful. If no entries are available on @q then this function will return
252 * -ENOMEM.
253 * The caller is expected to hold the hbalock when calling this routine.
254 **/
255static uint32_t
256lpfc_sli4_mq_put(struct lpfc_queue *q, struct lpfc_mqe *mqe)
257{
2e90f4b5 258 struct lpfc_mqe *temp_mqe;
4f774513 259 struct lpfc_register doorbell;
4f774513 260
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261 /* sanity check on queue memory */
262 if (unlikely(!q))
263 return -ENOMEM;
9afbee3d 264 temp_mqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 265
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266 /* If the host has not yet processed the next entry then we are done */
267 if (((q->host_index + 1) % q->entry_count) == q->hba_index)
268 return -ENOMEM;
48f8fdb4 269 lpfc_sli4_pcimem_bcopy(mqe, temp_mqe, q->entry_size);
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270 /* Save off the mailbox pointer for completion */
271 q->phba->mbox = (MAILBOX_t *)temp_mqe;
272
273 /* Update the host index before invoking device */
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274 q->host_index = ((q->host_index + 1) % q->entry_count);
275
276 /* Ring Doorbell */
277 doorbell.word0 = 0;
278 bf_set(lpfc_mq_doorbell_num_posted, &doorbell, 1);
279 bf_set(lpfc_mq_doorbell_id, &doorbell, q->queue_id);
280 writel(doorbell.word0, q->phba->sli4_hba.MQDBregaddr);
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281 return 0;
282}
283
284/**
285 * lpfc_sli4_mq_release - Updates internal hba index for MQ
286 * @q: The Mailbox Queue to operate on.
287 *
288 * This routine will update the HBA index of a queue to reflect consumption of
289 * a Mailbox Queue Entry by the HBA. When the HBA indicates that it has consumed
290 * an entry the host calls this function to update the queue's internal
291 * pointers. This routine returns the number of entries that were consumed by
292 * the HBA.
293 **/
294static uint32_t
295lpfc_sli4_mq_release(struct lpfc_queue *q)
296{
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297 /* sanity check on queue memory */
298 if (unlikely(!q))
299 return 0;
300
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301 /* Clear the mailbox pointer for completion */
302 q->phba->mbox = NULL;
303 q->hba_index = ((q->hba_index + 1) % q->entry_count);
304 return 1;
305}
306
307/**
308 * lpfc_sli4_eq_get - Gets the next valid EQE from a EQ
309 * @q: The Event Queue to get the first valid EQE from
310 *
311 * This routine will get the first valid Event Queue Entry from @q, update
312 * the queue's internal hba index, and return the EQE. If no valid EQEs are in
313 * the Queue (no more work to do), or the Queue is full of EQEs that have been
314 * processed, but not popped back to the HBA then this routine will return NULL.
315 **/
316static struct lpfc_eqe *
317lpfc_sli4_eq_get(struct lpfc_queue *q)
318{
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319 struct lpfc_eqe *eqe;
320
321 /* sanity check on queue memory */
322 if (unlikely(!q))
323 return NULL;
9afbee3d 324 eqe = lpfc_sli4_qe(q, q->host_index);
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325
326 /* If the next EQE is not valid then we are done */
7365f6fd 327 if (bf_get_le32(lpfc_eqe_valid, eqe) != q->qe_valid)
4f774513 328 return NULL;
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329
330 /*
331 * insert barrier for instruction interlock : data from the hardware
332 * must have the valid bit checked before it can be copied and acted
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333 * upon. Speculative instructions were allowing a bcopy at the start
334 * of lpfc_sli4_fp_handle_wcqe(), which is called immediately
335 * after our return, to copy data before the valid bit check above
336 * was done. As such, some of the copied data was stale. The barrier
337 * ensures the check is before any data is copied.
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338 */
339 mb();
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340 return eqe;
341}
342
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343/**
344 * lpfc_sli4_eq_clr_intr - Turn off interrupts from this EQ
345 * @q: The Event Queue to disable interrupts
346 *
347 **/
92f3b327 348void
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349lpfc_sli4_eq_clr_intr(struct lpfc_queue *q)
350{
351 struct lpfc_register doorbell;
352
353 doorbell.word0 = 0;
354 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
355 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
356 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
357 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
358 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 359 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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360}
361
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362/**
363 * lpfc_sli4_if6_eq_clr_intr - Turn off interrupts from this EQ
364 * @q: The Event Queue to disable interrupts
365 *
366 **/
92f3b327 367void
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368lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q)
369{
370 struct lpfc_register doorbell;
371
372 doorbell.word0 = 0;
aad59d5d 373 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
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374 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
375}
376
4f774513 377/**
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378 * lpfc_sli4_write_eq_db - write EQ DB for eqe's consumed or arm state
379 * @phba: adapter with EQ
4f774513 380 * @q: The Event Queue that the host has completed processing for.
32517fc0 381 * @count: Number of elements that have been consumed
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382 * @arm: Indicates whether the host wants to arms this CQ.
383 *
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384 * This routine will notify the HBA, by ringing the doorbell, that count
385 * number of EQEs have been processed. The @arm parameter indicates whether
386 * the queue should be rearmed when ringing the doorbell.
4f774513 387 **/
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388void
389lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
390 uint32_t count, bool arm)
4f774513 391{
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392 struct lpfc_register doorbell;
393
2e90f4b5 394 /* sanity check on queue memory */
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395 if (unlikely(!q || (count == 0 && !arm)))
396 return;
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397
398 /* ring doorbell for number popped */
399 doorbell.word0 = 0;
400 if (arm) {
401 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
402 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
403 }
32517fc0 404 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, count);
4f774513 405 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
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406 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
407 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
408 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 409 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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410 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
411 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
9dd35425 412 readl(q->phba->sli4_hba.EQDBregaddr);
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413}
414
27d6ac0a 415/**
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416 * lpfc_sli4_if6_write_eq_db - write EQ DB for eqe's consumed or arm state
417 * @phba: adapter with EQ
27d6ac0a 418 * @q: The Event Queue that the host has completed processing for.
32517fc0 419 * @count: Number of elements that have been consumed
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420 * @arm: Indicates whether the host wants to arms this CQ.
421 *
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422 * This routine will notify the HBA, by ringing the doorbell, that count
423 * number of EQEs have been processed. The @arm parameter indicates whether
424 * the queue should be rearmed when ringing the doorbell.
27d6ac0a 425 **/
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426void
427lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
428 uint32_t count, bool arm)
27d6ac0a 429{
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430 struct lpfc_register doorbell;
431
432 /* sanity check on queue memory */
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433 if (unlikely(!q || (count == 0 && !arm)))
434 return;
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435
436 /* ring doorbell for number popped */
437 doorbell.word0 = 0;
438 if (arm)
439 bf_set(lpfc_if6_eq_doorbell_arm, &doorbell, 1);
32517fc0 440 bf_set(lpfc_if6_eq_doorbell_num_released, &doorbell, count);
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441 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
442 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
443 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
444 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
445 readl(q->phba->sli4_hba.EQDBregaddr);
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446}
447
448static void
449__lpfc_sli4_consume_eqe(struct lpfc_hba *phba, struct lpfc_queue *eq,
450 struct lpfc_eqe *eqe)
451{
452 if (!phba->sli4_hba.pc_sli4_params.eqav)
453 bf_set_le32(lpfc_eqe_valid, eqe, 0);
454
455 eq->host_index = ((eq->host_index + 1) % eq->entry_count);
456
457 /* if the index wrapped around, toggle the valid bit */
458 if (phba->sli4_hba.pc_sli4_params.eqav && !eq->host_index)
459 eq->qe_valid = (eq->qe_valid) ? 0 : 1;
460}
461
462static void
24c7c0a6 463lpfc_sli4_eqcq_flush(struct lpfc_hba *phba, struct lpfc_queue *eq)
32517fc0 464{
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465 struct lpfc_eqe *eqe = NULL;
466 u32 eq_count = 0, cq_count = 0;
467 struct lpfc_cqe *cqe = NULL;
468 struct lpfc_queue *cq = NULL, *childq = NULL;
469 int cqid = 0;
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470
471 /* walk all the EQ entries and drop on the floor */
472 eqe = lpfc_sli4_eq_get(eq);
473 while (eqe) {
24c7c0a6
JS
474 /* Get the reference to the corresponding CQ */
475 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
476 cq = NULL;
477
478 list_for_each_entry(childq, &eq->child_list, list) {
479 if (childq->queue_id == cqid) {
480 cq = childq;
481 break;
482 }
483 }
484 /* If CQ is valid, iterate through it and drop all the CQEs */
485 if (cq) {
486 cqe = lpfc_sli4_cq_get(cq);
487 while (cqe) {
488 __lpfc_sli4_consume_cqe(phba, cq, cqe);
489 cq_count++;
490 cqe = lpfc_sli4_cq_get(cq);
491 }
492 /* Clear and re-arm the CQ */
493 phba->sli4_hba.sli4_write_cq_db(phba, cq, cq_count,
494 LPFC_QUEUE_REARM);
495 cq_count = 0;
496 }
32517fc0 497 __lpfc_sli4_consume_eqe(phba, eq, eqe);
24c7c0a6 498 eq_count++;
32517fc0
JS
499 eqe = lpfc_sli4_eq_get(eq);
500 }
501
502 /* Clear and re-arm the EQ */
24c7c0a6 503 phba->sli4_hba.sli4_write_eq_db(phba, eq, eq_count, LPFC_QUEUE_REARM);
32517fc0
JS
504}
505
506static int
93a4d6f4
JS
507lpfc_sli4_process_eq(struct lpfc_hba *phba, struct lpfc_queue *eq,
508 uint8_t rearm)
32517fc0
JS
509{
510 struct lpfc_eqe *eqe;
511 int count = 0, consumed = 0;
512
513 if (cmpxchg(&eq->queue_claimed, 0, 1) != 0)
514 goto rearm_and_exit;
515
516 eqe = lpfc_sli4_eq_get(eq);
517 while (eqe) {
518 lpfc_sli4_hba_handle_eqe(phba, eq, eqe);
519 __lpfc_sli4_consume_eqe(phba, eq, eqe);
520
521 consumed++;
522 if (!(++count % eq->max_proc_limit))
523 break;
524
525 if (!(count % eq->notify_interval)) {
526 phba->sli4_hba.sli4_write_eq_db(phba, eq, consumed,
527 LPFC_QUEUE_NOARM);
528 consumed = 0;
529 }
530
531 eqe = lpfc_sli4_eq_get(eq);
532 }
533 eq->EQ_processed += count;
534
535 /* Track the max number of EQEs processed in 1 intr */
536 if (count > eq->EQ_max_eqe)
537 eq->EQ_max_eqe = count;
538
164ba8d2 539 xchg(&eq->queue_claimed, 0);
32517fc0
JS
540
541rearm_and_exit:
93a4d6f4
JS
542 /* Always clear the EQ. */
543 phba->sli4_hba.sli4_write_eq_db(phba, eq, consumed, rearm);
32517fc0
JS
544
545 return count;
27d6ac0a
JS
546}
547
4f774513
JS
548/**
549 * lpfc_sli4_cq_get - Gets the next valid CQE from a CQ
550 * @q: The Completion Queue to get the first valid CQE from
551 *
552 * This routine will get the first valid Completion Queue Entry from @q, update
553 * the queue's internal hba index, and return the CQE. If no valid CQEs are in
554 * the Queue (no more work to do), or the Queue is full of CQEs that have been
555 * processed, but not popped back to the HBA then this routine will return NULL.
556 **/
557static struct lpfc_cqe *
558lpfc_sli4_cq_get(struct lpfc_queue *q)
559{
560 struct lpfc_cqe *cqe;
561
2e90f4b5
JS
562 /* sanity check on queue memory */
563 if (unlikely(!q))
564 return NULL;
9afbee3d 565 cqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 566
4f774513 567 /* If the next CQE is not valid then we are done */
7365f6fd 568 if (bf_get_le32(lpfc_cqe_valid, cqe) != q->qe_valid)
4f774513 569 return NULL;
27f344eb
JS
570
571 /*
572 * insert barrier for instruction interlock : data from the hardware
573 * must have the valid bit checked before it can be copied and acted
2ea259ee
JS
574 * upon. Given what was seen in lpfc_sli4_cq_get() of speculative
575 * instructions allowing action on content before valid bit checked,
576 * add barrier here as well. May not be needed as "content" is a
577 * single 32-bit entity here (vs multi word structure for cq's).
27f344eb
JS
578 */
579 mb();
4f774513
JS
580 return cqe;
581}
582
32517fc0
JS
583static void
584__lpfc_sli4_consume_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
585 struct lpfc_cqe *cqe)
586{
587 if (!phba->sli4_hba.pc_sli4_params.cqav)
588 bf_set_le32(lpfc_cqe_valid, cqe, 0);
589
590 cq->host_index = ((cq->host_index + 1) % cq->entry_count);
591
592 /* if the index wrapped around, toggle the valid bit */
593 if (phba->sli4_hba.pc_sli4_params.cqav && !cq->host_index)
594 cq->qe_valid = (cq->qe_valid) ? 0 : 1;
595}
596
4f774513 597/**
32517fc0
JS
598 * lpfc_sli4_write_cq_db - write cq DB for entries consumed or arm state.
599 * @phba: the adapter with the CQ
4f774513 600 * @q: The Completion Queue that the host has completed processing for.
32517fc0 601 * @count: the number of elements that were consumed
4f774513
JS
602 * @arm: Indicates whether the host wants to arms this CQ.
603 *
32517fc0
JS
604 * This routine will notify the HBA, by ringing the doorbell, that the
605 * CQEs have been processed. The @arm parameter specifies whether the
606 * queue should be rearmed when ringing the doorbell.
4f774513 607 **/
32517fc0
JS
608void
609lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
610 uint32_t count, bool arm)
4f774513 611{
4f774513
JS
612 struct lpfc_register doorbell;
613
2e90f4b5 614 /* sanity check on queue memory */
32517fc0
JS
615 if (unlikely(!q || (count == 0 && !arm)))
616 return;
4f774513
JS
617
618 /* ring doorbell for number popped */
619 doorbell.word0 = 0;
620 if (arm)
621 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
32517fc0 622 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, count);
4f774513 623 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_COMPLETION);
6b5151fd
JS
624 bf_set(lpfc_eqcq_doorbell_cqid_hi, &doorbell,
625 (q->queue_id >> LPFC_CQID_HI_FIELD_SHIFT));
626 bf_set(lpfc_eqcq_doorbell_cqid_lo, &doorbell, q->queue_id);
9dd35425 627 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
4f774513
JS
628}
629
27d6ac0a 630/**
32517fc0
JS
631 * lpfc_sli4_if6_write_cq_db - write cq DB for entries consumed or arm state.
632 * @phba: the adapter with the CQ
27d6ac0a 633 * @q: The Completion Queue that the host has completed processing for.
32517fc0 634 * @count: the number of elements that were consumed
27d6ac0a
JS
635 * @arm: Indicates whether the host wants to arms this CQ.
636 *
32517fc0
JS
637 * This routine will notify the HBA, by ringing the doorbell, that the
638 * CQEs have been processed. The @arm parameter specifies whether the
639 * queue should be rearmed when ringing the doorbell.
27d6ac0a 640 **/
32517fc0
JS
641void
642lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
643 uint32_t count, bool arm)
27d6ac0a 644{
27d6ac0a
JS
645 struct lpfc_register doorbell;
646
647 /* sanity check on queue memory */
32517fc0
JS
648 if (unlikely(!q || (count == 0 && !arm)))
649 return;
27d6ac0a
JS
650
651 /* ring doorbell for number popped */
652 doorbell.word0 = 0;
653 if (arm)
654 bf_set(lpfc_if6_cq_doorbell_arm, &doorbell, 1);
32517fc0 655 bf_set(lpfc_if6_cq_doorbell_num_released, &doorbell, count);
27d6ac0a
JS
656 bf_set(lpfc_if6_cq_doorbell_cqid, &doorbell, q->queue_id);
657 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
27d6ac0a
JS
658}
659
7af29d45 660/*
4f774513 661 * lpfc_sli4_rq_put - Put a Receive Buffer Queue Entry on a Receive Queue
4f774513
JS
662 *
663 * This routine will copy the contents of @wqe to the next available entry on
664 * the @q. This function will then ring the Receive Queue Doorbell to signal the
665 * HBA to start processing the Receive Queue Entry. This function returns the
666 * index that the rqe was copied to if successful. If no entries are available
667 * on @q then this function will return -ENOMEM.
668 * The caller is expected to hold the hbalock when calling this routine.
669 **/
895427bd 670int
4f774513
JS
671lpfc_sli4_rq_put(struct lpfc_queue *hq, struct lpfc_queue *dq,
672 struct lpfc_rqe *hrqe, struct lpfc_rqe *drqe)
673{
2e90f4b5
JS
674 struct lpfc_rqe *temp_hrqe;
675 struct lpfc_rqe *temp_drqe;
4f774513 676 struct lpfc_register doorbell;
cbc5de1b
JS
677 int hq_put_index;
678 int dq_put_index;
4f774513 679
2e90f4b5
JS
680 /* sanity check on queue memory */
681 if (unlikely(!hq) || unlikely(!dq))
682 return -ENOMEM;
cbc5de1b
JS
683 hq_put_index = hq->host_index;
684 dq_put_index = dq->host_index;
9afbee3d
JS
685 temp_hrqe = lpfc_sli4_qe(hq, hq_put_index);
686 temp_drqe = lpfc_sli4_qe(dq, dq_put_index);
2e90f4b5 687
4f774513
JS
688 if (hq->type != LPFC_HRQ || dq->type != LPFC_DRQ)
689 return -EINVAL;
cbc5de1b 690 if (hq_put_index != dq_put_index)
4f774513
JS
691 return -EINVAL;
692 /* If the host has not yet processed the next entry then we are done */
cbc5de1b 693 if (((hq_put_index + 1) % hq->entry_count) == hq->hba_index)
4f774513 694 return -EBUSY;
48f8fdb4
JS
695 lpfc_sli4_pcimem_bcopy(hrqe, temp_hrqe, hq->entry_size);
696 lpfc_sli4_pcimem_bcopy(drqe, temp_drqe, dq->entry_size);
4f774513
JS
697
698 /* Update the host index to point to the next slot */
cbc5de1b
JS
699 hq->host_index = ((hq_put_index + 1) % hq->entry_count);
700 dq->host_index = ((dq_put_index + 1) % dq->entry_count);
61f3d4bf 701 hq->RQ_buf_posted++;
4f774513
JS
702
703 /* Ring The Header Receive Queue Doorbell */
32517fc0 704 if (!(hq->host_index % hq->notify_interval)) {
4f774513 705 doorbell.word0 = 0;
962bc51b
JS
706 if (hq->db_format == LPFC_DB_RING_FORMAT) {
707 bf_set(lpfc_rq_db_ring_fm_num_posted, &doorbell,
32517fc0 708 hq->notify_interval);
962bc51b
JS
709 bf_set(lpfc_rq_db_ring_fm_id, &doorbell, hq->queue_id);
710 } else if (hq->db_format == LPFC_DB_LIST_FORMAT) {
711 bf_set(lpfc_rq_db_list_fm_num_posted, &doorbell,
32517fc0 712 hq->notify_interval);
962bc51b
JS
713 bf_set(lpfc_rq_db_list_fm_index, &doorbell,
714 hq->host_index);
715 bf_set(lpfc_rq_db_list_fm_id, &doorbell, hq->queue_id);
716 } else {
717 return -EINVAL;
718 }
719 writel(doorbell.word0, hq->db_regaddr);
4f774513 720 }
cbc5de1b 721 return hq_put_index;
4f774513
JS
722}
723
7af29d45 724/*
4f774513 725 * lpfc_sli4_rq_release - Updates internal hba index for RQ
4f774513
JS
726 *
727 * This routine will update the HBA index of a queue to reflect consumption of
728 * one Receive Queue Entry by the HBA. When the HBA indicates that it has
729 * consumed an entry the host calls this function to update the queue's
730 * internal pointers. This routine returns the number of entries that were
731 * consumed by the HBA.
732 **/
733static uint32_t
734lpfc_sli4_rq_release(struct lpfc_queue *hq, struct lpfc_queue *dq)
735{
2e90f4b5
JS
736 /* sanity check on queue memory */
737 if (unlikely(!hq) || unlikely(!dq))
738 return 0;
739
4f774513
JS
740 if ((hq->type != LPFC_HRQ) || (dq->type != LPFC_DRQ))
741 return 0;
742 hq->hba_index = ((hq->hba_index + 1) % hq->entry_count);
743 dq->hba_index = ((dq->hba_index + 1) % dq->entry_count);
744 return 1;
745}
746
e59058c4 747/**
3621a710 748 * lpfc_cmd_iocb - Get next command iocb entry in the ring
e59058c4
JS
749 * @phba: Pointer to HBA context object.
750 * @pring: Pointer to driver SLI ring object.
751 *
752 * This function returns pointer to next command iocb entry
753 * in the command ring. The caller must hold hbalock to prevent
754 * other threads consume the next command iocb.
755 * SLI-2/SLI-3 provide different sized iocbs.
756 **/
ed957684
JS
757static inline IOCB_t *
758lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
759{
7e56aa25
JS
760 return (IOCB_t *) (((char *) pring->sli.sli3.cmdringaddr) +
761 pring->sli.sli3.cmdidx * phba->iocb_cmd_size);
ed957684
JS
762}
763
e59058c4 764/**
3621a710 765 * lpfc_resp_iocb - Get next response iocb entry in the ring
e59058c4
JS
766 * @phba: Pointer to HBA context object.
767 * @pring: Pointer to driver SLI ring object.
768 *
769 * This function returns pointer to next response iocb entry
770 * in the response ring. The caller must hold hbalock to make sure
771 * that no other thread consume the next response iocb.
772 * SLI-2/SLI-3 provide different sized iocbs.
773 **/
ed957684
JS
774static inline IOCB_t *
775lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
776{
7e56aa25
JS
777 return (IOCB_t *) (((char *) pring->sli.sli3.rspringaddr) +
778 pring->sli.sli3.rspidx * phba->iocb_rsp_size);
ed957684
JS
779}
780
e59058c4 781/**
3621a710 782 * __lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
783 * @phba: Pointer to HBA context object.
784 *
785 * This function is called with hbalock held. This function
786 * allocates a new driver iocb object from the iocb pool. If the
787 * allocation is successful, it returns pointer to the newly
788 * allocated iocb object else it returns NULL.
789 **/
4f2e66c6 790struct lpfc_iocbq *
2e0fef85 791__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC
792{
793 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
794 struct lpfc_iocbq * iocbq = NULL;
795
1c2ba475
JT
796 lockdep_assert_held(&phba->hbalock);
797
0bd4ca25 798 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
2a9bf3d0
JS
799 if (iocbq)
800 phba->iocb_cnt++;
801 if (phba->iocb_cnt > phba->iocb_max)
802 phba->iocb_max = phba->iocb_cnt;
0bd4ca25
JSEC
803 return iocbq;
804}
805
da0436e9
JS
806/**
807 * __lpfc_clear_active_sglq - Remove the active sglq for this XRI.
808 * @phba: Pointer to HBA context object.
809 * @xritag: XRI value.
810 *
811 * This function clears the sglq pointer from the array of acive
812 * sglq's. The xritag that is passed in is used to index into the
813 * array. Before the xritag can be used it needs to be adjusted
814 * by subtracting the xribase.
815 *
816 * Returns sglq ponter = success, NULL = Failure.
817 **/
895427bd 818struct lpfc_sglq *
da0436e9
JS
819__lpfc_clear_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
820{
da0436e9 821 struct lpfc_sglq *sglq;
6d368e53
JS
822
823 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
824 phba->sli4_hba.lpfc_sglq_active_list[xritag] = NULL;
da0436e9
JS
825 return sglq;
826}
827
828/**
829 * __lpfc_get_active_sglq - Get the active sglq for this XRI.
830 * @phba: Pointer to HBA context object.
831 * @xritag: XRI value.
832 *
833 * This function returns the sglq pointer from the array of acive
834 * sglq's. The xritag that is passed in is used to index into the
835 * array. Before the xritag can be used it needs to be adjusted
836 * by subtracting the xribase.
837 *
838 * Returns sglq ponter = success, NULL = Failure.
839 **/
0f65ff68 840struct lpfc_sglq *
da0436e9
JS
841__lpfc_get_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
842{
da0436e9 843 struct lpfc_sglq *sglq;
6d368e53
JS
844
845 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
da0436e9
JS
846 return sglq;
847}
848
19ca7609 849/**
1151e3ec 850 * lpfc_clr_rrq_active - Clears RRQ active bit in xri_bitmap.
19ca7609
JS
851 * @phba: Pointer to HBA context object.
852 * @xritag: xri used in this exchange.
853 * @rrq: The RRQ to be cleared.
854 *
19ca7609 855 **/
1151e3ec
JS
856void
857lpfc_clr_rrq_active(struct lpfc_hba *phba,
858 uint16_t xritag,
859 struct lpfc_node_rrq *rrq)
19ca7609 860{
1151e3ec 861 struct lpfc_nodelist *ndlp = NULL;
19ca7609 862
1151e3ec
JS
863 if ((rrq->vport) && NLP_CHK_NODE_ACT(rrq->ndlp))
864 ndlp = lpfc_findnode_did(rrq->vport, rrq->nlp_DID);
19ca7609
JS
865
866 /* The target DID could have been swapped (cable swap)
867 * we should use the ndlp from the findnode if it is
868 * available.
869 */
1151e3ec 870 if ((!ndlp) && rrq->ndlp)
19ca7609
JS
871 ndlp = rrq->ndlp;
872
1151e3ec
JS
873 if (!ndlp)
874 goto out;
875
cff261f6 876 if (test_and_clear_bit(xritag, ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
877 rrq->send_rrq = 0;
878 rrq->xritag = 0;
879 rrq->rrq_stop_time = 0;
880 }
1151e3ec 881out:
19ca7609
JS
882 mempool_free(rrq, phba->rrq_pool);
883}
884
885/**
886 * lpfc_handle_rrq_active - Checks if RRQ has waithed RATOV.
887 * @phba: Pointer to HBA context object.
888 *
889 * This function is called with hbalock held. This function
890 * Checks if stop_time (ratov from setting rrq active) has
891 * been reached, if it has and the send_rrq flag is set then
892 * it will call lpfc_send_rrq. If the send_rrq flag is not set
893 * then it will just call the routine to clear the rrq and
894 * free the rrq resource.
895 * The timer is set to the next rrq that is going to expire before
896 * leaving the routine.
897 *
898 **/
899void
900lpfc_handle_rrq_active(struct lpfc_hba *phba)
901{
902 struct lpfc_node_rrq *rrq;
903 struct lpfc_node_rrq *nextrrq;
904 unsigned long next_time;
905 unsigned long iflags;
1151e3ec 906 LIST_HEAD(send_rrq);
19ca7609
JS
907
908 spin_lock_irqsave(&phba->hbalock, iflags);
909 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
256ec0d0 910 next_time = jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
19ca7609 911 list_for_each_entry_safe(rrq, nextrrq,
1151e3ec
JS
912 &phba->active_rrq_list, list) {
913 if (time_after(jiffies, rrq->rrq_stop_time))
914 list_move(&rrq->list, &send_rrq);
915 else if (time_before(rrq->rrq_stop_time, next_time))
19ca7609
JS
916 next_time = rrq->rrq_stop_time;
917 }
918 spin_unlock_irqrestore(&phba->hbalock, iflags);
06918ac5
JS
919 if ((!list_empty(&phba->active_rrq_list)) &&
920 (!(phba->pport->load_flag & FC_UNLOADING)))
19ca7609 921 mod_timer(&phba->rrq_tmr, next_time);
1151e3ec
JS
922 list_for_each_entry_safe(rrq, nextrrq, &send_rrq, list) {
923 list_del(&rrq->list);
ffd43814 924 if (!rrq->send_rrq) {
1151e3ec 925 /* this call will free the rrq */
ffd43814
BVA
926 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
927 } else if (lpfc_send_rrq(phba, rrq)) {
1151e3ec
JS
928 /* if we send the rrq then the completion handler
929 * will clear the bit in the xribitmap.
930 */
931 lpfc_clr_rrq_active(phba, rrq->xritag,
932 rrq);
933 }
934 }
19ca7609
JS
935}
936
937/**
938 * lpfc_get_active_rrq - Get the active RRQ for this exchange.
939 * @vport: Pointer to vport context object.
940 * @xri: The xri used in the exchange.
941 * @did: The targets DID for this exchange.
942 *
943 * returns NULL = rrq not found in the phba->active_rrq_list.
944 * rrq = rrq for this xri and target.
945 **/
946struct lpfc_node_rrq *
947lpfc_get_active_rrq(struct lpfc_vport *vport, uint16_t xri, uint32_t did)
948{
949 struct lpfc_hba *phba = vport->phba;
950 struct lpfc_node_rrq *rrq;
951 struct lpfc_node_rrq *nextrrq;
952 unsigned long iflags;
953
954 if (phba->sli_rev != LPFC_SLI_REV4)
955 return NULL;
956 spin_lock_irqsave(&phba->hbalock, iflags);
957 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list) {
958 if (rrq->vport == vport && rrq->xritag == xri &&
959 rrq->nlp_DID == did){
960 list_del(&rrq->list);
961 spin_unlock_irqrestore(&phba->hbalock, iflags);
962 return rrq;
963 }
964 }
965 spin_unlock_irqrestore(&phba->hbalock, iflags);
966 return NULL;
967}
968
969/**
970 * lpfc_cleanup_vports_rrqs - Remove and clear the active RRQ for this vport.
971 * @vport: Pointer to vport context object.
1151e3ec
JS
972 * @ndlp: Pointer to the lpfc_node_list structure.
973 * If ndlp is NULL Remove all active RRQs for this vport from the
974 * phba->active_rrq_list and clear the rrq.
975 * If ndlp is not NULL then only remove rrqs for this vport & this ndlp.
19ca7609
JS
976 **/
977void
1151e3ec 978lpfc_cleanup_vports_rrqs(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
19ca7609
JS
979
980{
981 struct lpfc_hba *phba = vport->phba;
982 struct lpfc_node_rrq *rrq;
983 struct lpfc_node_rrq *nextrrq;
984 unsigned long iflags;
1151e3ec 985 LIST_HEAD(rrq_list);
19ca7609
JS
986
987 if (phba->sli_rev != LPFC_SLI_REV4)
988 return;
1151e3ec
JS
989 if (!ndlp) {
990 lpfc_sli4_vport_delete_els_xri_aborted(vport);
991 lpfc_sli4_vport_delete_fcp_xri_aborted(vport);
19ca7609 992 }
1151e3ec
JS
993 spin_lock_irqsave(&phba->hbalock, iflags);
994 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list)
995 if ((rrq->vport == vport) && (!ndlp || rrq->ndlp == ndlp))
996 list_move(&rrq->list, &rrq_list);
19ca7609 997 spin_unlock_irqrestore(&phba->hbalock, iflags);
1151e3ec
JS
998
999 list_for_each_entry_safe(rrq, nextrrq, &rrq_list, list) {
1000 list_del(&rrq->list);
1001 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
1002 }
19ca7609
JS
1003}
1004
19ca7609 1005/**
1151e3ec 1006 * lpfc_test_rrq_active - Test RRQ bit in xri_bitmap.
19ca7609
JS
1007 * @phba: Pointer to HBA context object.
1008 * @ndlp: Targets nodelist pointer for this exchange.
7af29d45 1009 * @xritag: the xri in the bitmap to test.
19ca7609 1010 *
e2a8be56
JS
1011 * This function returns:
1012 * 0 = rrq not active for this xri
1013 * 1 = rrq is valid for this xri.
19ca7609 1014 **/
1151e3ec
JS
1015int
1016lpfc_test_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
19ca7609
JS
1017 uint16_t xritag)
1018{
19ca7609
JS
1019 if (!ndlp)
1020 return 0;
cff261f6
JS
1021 if (!ndlp->active_rrqs_xri_bitmap)
1022 return 0;
1023 if (test_bit(xritag, ndlp->active_rrqs_xri_bitmap))
258f84fa 1024 return 1;
19ca7609
JS
1025 else
1026 return 0;
1027}
1028
1029/**
1030 * lpfc_set_rrq_active - set RRQ active bit in xri_bitmap.
1031 * @phba: Pointer to HBA context object.
1032 * @ndlp: nodelist pointer for this target.
1033 * @xritag: xri used in this exchange.
1034 * @rxid: Remote Exchange ID.
1035 * @send_rrq: Flag used to determine if we should send rrq els cmd.
1036 *
1037 * This function takes the hbalock.
1038 * The active bit is always set in the active rrq xri_bitmap even
1039 * if there is no slot avaiable for the other rrq information.
1040 *
1041 * returns 0 rrq actived for this xri
1042 * < 0 No memory or invalid ndlp.
1043 **/
1044int
1045lpfc_set_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
b42c07c8 1046 uint16_t xritag, uint16_t rxid, uint16_t send_rrq)
19ca7609 1047{
19ca7609 1048 unsigned long iflags;
b42c07c8
JS
1049 struct lpfc_node_rrq *rrq;
1050 int empty;
1051
1052 if (!ndlp)
1053 return -EINVAL;
1054
1055 if (!phba->cfg_enable_rrq)
1056 return -EINVAL;
19ca7609
JS
1057
1058 spin_lock_irqsave(&phba->hbalock, iflags);
b42c07c8
JS
1059 if (phba->pport->load_flag & FC_UNLOADING) {
1060 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
1061 goto out;
1062 }
1063
1064 /*
1065 * set the active bit even if there is no mem available.
1066 */
1067 if (NLP_CHK_FREE_REQ(ndlp))
1068 goto out;
1069
1070 if (ndlp->vport && (ndlp->vport->load_flag & FC_UNLOADING))
1071 goto out;
1072
cff261f6
JS
1073 if (!ndlp->active_rrqs_xri_bitmap)
1074 goto out;
1075
1076 if (test_and_set_bit(xritag, ndlp->active_rrqs_xri_bitmap))
b42c07c8
JS
1077 goto out;
1078
19ca7609 1079 spin_unlock_irqrestore(&phba->hbalock, iflags);
9dace1fa 1080 rrq = mempool_alloc(phba->rrq_pool, GFP_ATOMIC);
b42c07c8
JS
1081 if (!rrq) {
1082 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1083 "3155 Unable to allocate RRQ xri:0x%x rxid:0x%x"
1084 " DID:0x%x Send:%d\n",
1085 xritag, rxid, ndlp->nlp_DID, send_rrq);
1086 return -EINVAL;
1087 }
e5771b4d
JS
1088 if (phba->cfg_enable_rrq == 1)
1089 rrq->send_rrq = send_rrq;
1090 else
1091 rrq->send_rrq = 0;
b42c07c8 1092 rrq->xritag = xritag;
256ec0d0
JS
1093 rrq->rrq_stop_time = jiffies +
1094 msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
b42c07c8
JS
1095 rrq->ndlp = ndlp;
1096 rrq->nlp_DID = ndlp->nlp_DID;
1097 rrq->vport = ndlp->vport;
1098 rrq->rxid = rxid;
b42c07c8
JS
1099 spin_lock_irqsave(&phba->hbalock, iflags);
1100 empty = list_empty(&phba->active_rrq_list);
1101 list_add_tail(&rrq->list, &phba->active_rrq_list);
1102 phba->hba_flag |= HBA_RRQ_ACTIVE;
1103 if (empty)
1104 lpfc_worker_wake_up(phba);
1105 spin_unlock_irqrestore(&phba->hbalock, iflags);
1106 return 0;
1107out:
1108 spin_unlock_irqrestore(&phba->hbalock, iflags);
1109 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1110 "2921 Can't set rrq active xri:0x%x rxid:0x%x"
1111 " DID:0x%x Send:%d\n",
1112 xritag, rxid, ndlp->nlp_DID, send_rrq);
1113 return -EINVAL;
19ca7609
JS
1114}
1115
da0436e9 1116/**
895427bd 1117 * __lpfc_sli_get_els_sglq - Allocates an iocb object from sgl pool
da0436e9 1118 * @phba: Pointer to HBA context object.
7af29d45 1119 * @piocbq: Pointer to the iocbq.
da0436e9 1120 *
e2a8be56
JS
1121 * The driver calls this function with either the nvme ls ring lock
1122 * or the fc els ring lock held depending on the iocb usage. This function
1123 * gets a new driver sglq object from the sglq list. If the list is not empty
1124 * then it is successful, it returns pointer to the newly allocated sglq
1125 * object else it returns NULL.
da0436e9
JS
1126 **/
1127static struct lpfc_sglq *
895427bd 1128__lpfc_sli_get_els_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
da0436e9 1129{
895427bd 1130 struct list_head *lpfc_els_sgl_list = &phba->sli4_hba.lpfc_els_sgl_list;
da0436e9 1131 struct lpfc_sglq *sglq = NULL;
19ca7609 1132 struct lpfc_sglq *start_sglq = NULL;
c490850a 1133 struct lpfc_io_buf *lpfc_cmd;
19ca7609 1134 struct lpfc_nodelist *ndlp;
e2a8be56 1135 struct lpfc_sli_ring *pring = NULL;
19ca7609
JS
1136 int found = 0;
1137
e2a8be56
JS
1138 if (piocbq->iocb_flag & LPFC_IO_NVME_LS)
1139 pring = phba->sli4_hba.nvmels_wq->pring;
1140 else
1141 pring = lpfc_phba_elsring(phba);
1142
1143 lockdep_assert_held(&pring->ring_lock);
1c2ba475 1144
19ca7609 1145 if (piocbq->iocb_flag & LPFC_IO_FCP) {
c490850a 1146 lpfc_cmd = (struct lpfc_io_buf *) piocbq->context1;
19ca7609 1147 ndlp = lpfc_cmd->rdata->pnode;
be858b65 1148 } else if ((piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) &&
6c7cf486 1149 !(piocbq->iocb_flag & LPFC_IO_LIBDFC)) {
19ca7609 1150 ndlp = piocbq->context_un.ndlp;
6c7cf486
JS
1151 } else if (piocbq->iocb_flag & LPFC_IO_LIBDFC) {
1152 if (piocbq->iocb_flag & LPFC_IO_LOOPBACK)
1153 ndlp = NULL;
1154 else
1155 ndlp = piocbq->context_un.ndlp;
1156 } else {
19ca7609 1157 ndlp = piocbq->context1;
6c7cf486 1158 }
19ca7609 1159
895427bd
JS
1160 spin_lock(&phba->sli4_hba.sgl_list_lock);
1161 list_remove_head(lpfc_els_sgl_list, sglq, struct lpfc_sglq, list);
19ca7609
JS
1162 start_sglq = sglq;
1163 while (!found) {
1164 if (!sglq)
d11f54b7 1165 break;
895427bd
JS
1166 if (ndlp && ndlp->active_rrqs_xri_bitmap &&
1167 test_bit(sglq->sli4_lxritag,
1168 ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
1169 /* This xri has an rrq outstanding for this DID.
1170 * put it back in the list and get another xri.
1171 */
895427bd 1172 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609 1173 sglq = NULL;
895427bd 1174 list_remove_head(lpfc_els_sgl_list, sglq,
19ca7609
JS
1175 struct lpfc_sglq, list);
1176 if (sglq == start_sglq) {
14041bd1 1177 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609
JS
1178 sglq = NULL;
1179 break;
1180 } else
1181 continue;
1182 }
1183 sglq->ndlp = ndlp;
1184 found = 1;
6d368e53 1185 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
19ca7609
JS
1186 sglq->state = SGL_ALLOCATED;
1187 }
895427bd 1188 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1189 return sglq;
1190}
1191
f358dd0c
JS
1192/**
1193 * __lpfc_sli_get_nvmet_sglq - Allocates an iocb object from sgl pool
1194 * @phba: Pointer to HBA context object.
7af29d45 1195 * @piocbq: Pointer to the iocbq.
f358dd0c
JS
1196 *
1197 * This function is called with the sgl_list lock held. This function
1198 * gets a new driver sglq object from the sglq list. If the
1199 * list is not empty then it is successful, it returns pointer to the newly
1200 * allocated sglq object else it returns NULL.
1201 **/
1202struct lpfc_sglq *
1203__lpfc_sli_get_nvmet_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
1204{
1205 struct list_head *lpfc_nvmet_sgl_list;
1206 struct lpfc_sglq *sglq = NULL;
1207
1208 lpfc_nvmet_sgl_list = &phba->sli4_hba.lpfc_nvmet_sgl_list;
1209
1210 lockdep_assert_held(&phba->sli4_hba.sgl_list_lock);
1211
1212 list_remove_head(lpfc_nvmet_sgl_list, sglq, struct lpfc_sglq, list);
1213 if (!sglq)
1214 return NULL;
1215 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
1216 sglq->state = SGL_ALLOCATED;
da0436e9
JS
1217 return sglq;
1218}
1219
e59058c4 1220/**
3621a710 1221 * lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
1222 * @phba: Pointer to HBA context object.
1223 *
1224 * This function is called with no lock held. This function
1225 * allocates a new driver iocb object from the iocb pool. If the
1226 * allocation is successful, it returns pointer to the newly
1227 * allocated iocb object else it returns NULL.
1228 **/
2e0fef85
JS
1229struct lpfc_iocbq *
1230lpfc_sli_get_iocbq(struct lpfc_hba *phba)
1231{
1232 struct lpfc_iocbq * iocbq = NULL;
1233 unsigned long iflags;
1234
1235 spin_lock_irqsave(&phba->hbalock, iflags);
1236 iocbq = __lpfc_sli_get_iocbq(phba);
1237 spin_unlock_irqrestore(&phba->hbalock, iflags);
1238 return iocbq;
1239}
1240
4f774513
JS
1241/**
1242 * __lpfc_sli_release_iocbq_s4 - Release iocb to the iocb pool
1243 * @phba: Pointer to HBA context object.
1244 * @iocbq: Pointer to driver iocb object.
1245 *
88acb4d9
DK
1246 * This function is called to release the driver iocb object
1247 * to the iocb pool. The iotag in the iocb object
4f774513
JS
1248 * does not change for each use of the iocb object. This function
1249 * clears all other fields of the iocb object when it is freed.
1250 * The sqlq structure that holds the xritag and phys and virtual
1251 * mappings for the scatter gather list is retrieved from the
1252 * active array of sglq. The get of the sglq pointer also clears
1253 * the entry in the array. If the status of the IO indiactes that
1254 * this IO was aborted then the sglq entry it put on the
1255 * lpfc_abts_els_sgl_list until the CQ_ABORTED_XRI is received. If the
1256 * IO has good status or fails for any other reason then the sglq
88acb4d9
DK
1257 * entry is added to the free list (lpfc_els_sgl_list). The hbalock is
1258 * asserted held in the code path calling this routine.
4f774513
JS
1259 **/
1260static void
1261__lpfc_sli_release_iocbq_s4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1262{
1263 struct lpfc_sglq *sglq;
1264 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
2a9bf3d0 1265 unsigned long iflag = 0;
895427bd 1266 struct lpfc_sli_ring *pring;
4f774513
JS
1267
1268 if (iocbq->sli4_xritag == NO_XRI)
1269 sglq = NULL;
1270 else
6d368e53
JS
1271 sglq = __lpfc_clear_active_sglq(phba, iocbq->sli4_lxritag);
1272
0e9bb8d7 1273
4f774513 1274 if (sglq) {
f358dd0c
JS
1275 if (iocbq->iocb_flag & LPFC_IO_NVMET) {
1276 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1277 iflag);
1278 sglq->state = SGL_FREED;
1279 sglq->ndlp = NULL;
1280 list_add_tail(&sglq->list,
1281 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1282 spin_unlock_irqrestore(
1283 &phba->sli4_hba.sgl_list_lock, iflag);
1284 goto out;
1285 }
1286
895427bd 1287 pring = phba->sli4_hba.els_wq->pring;
0f65ff68
JS
1288 if ((iocbq->iocb_flag & LPFC_EXCHANGE_BUSY) &&
1289 (sglq->state != SGL_XRI_ABORTED)) {
895427bd
JS
1290 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1291 iflag);
4f774513 1292 list_add(&sglq->list,
895427bd 1293 &phba->sli4_hba.lpfc_abts_els_sgl_list);
4f774513 1294 spin_unlock_irqrestore(
895427bd 1295 &phba->sli4_hba.sgl_list_lock, iflag);
0f65ff68 1296 } else {
895427bd
JS
1297 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1298 iflag);
0f65ff68 1299 sglq->state = SGL_FREED;
19ca7609 1300 sglq->ndlp = NULL;
fedd3b7b 1301 list_add_tail(&sglq->list,
895427bd
JS
1302 &phba->sli4_hba.lpfc_els_sgl_list);
1303 spin_unlock_irqrestore(
1304 &phba->sli4_hba.sgl_list_lock, iflag);
2a9bf3d0
JS
1305
1306 /* Check if TXQ queue needs to be serviced */
0e9bb8d7 1307 if (!list_empty(&pring->txq))
2a9bf3d0 1308 lpfc_worker_wake_up(phba);
0f65ff68 1309 }
4f774513
JS
1310 }
1311
f358dd0c 1312out:
4f774513
JS
1313 /*
1314 * Clean all volatile data fields, preserve iotag and node struct.
1315 */
1316 memset((char *)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
6d368e53 1317 iocbq->sli4_lxritag = NO_XRI;
4f774513 1318 iocbq->sli4_xritag = NO_XRI;
f358dd0c
JS
1319 iocbq->iocb_flag &= ~(LPFC_IO_NVME | LPFC_IO_NVMET |
1320 LPFC_IO_NVME_LS);
4f774513
JS
1321 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1322}
1323
2a9bf3d0 1324
e59058c4 1325/**
3772a991 1326 * __lpfc_sli_release_iocbq_s3 - Release iocb to the iocb pool
e59058c4
JS
1327 * @phba: Pointer to HBA context object.
1328 * @iocbq: Pointer to driver iocb object.
1329 *
88acb4d9
DK
1330 * This function is called to release the driver iocb object to the
1331 * iocb pool. The iotag in the iocb object does not change for each
1332 * use of the iocb object. This function clears all other fields of
1333 * the iocb object when it is freed. The hbalock is asserted held in
1334 * the code path calling this routine.
e59058c4 1335 **/
a6ababd2 1336static void
3772a991 1337__lpfc_sli_release_iocbq_s3(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 1338{
2e0fef85 1339 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30
JB
1340
1341 /*
1342 * Clean all volatile data fields, preserve iotag and node struct.
1343 */
1344 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
3772a991 1345 iocbq->sli4_xritag = NO_XRI;
604a3e30
JB
1346 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1347}
1348
3772a991
JS
1349/**
1350 * __lpfc_sli_release_iocbq - Release iocb to the iocb pool
1351 * @phba: Pointer to HBA context object.
1352 * @iocbq: Pointer to driver iocb object.
1353 *
1354 * This function is called with hbalock held to release driver
1355 * iocb object to the iocb pool. The iotag in the iocb object
1356 * does not change for each use of the iocb object. This function
1357 * clears all other fields of the iocb object when it is freed.
1358 **/
1359static void
1360__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1361{
1c2ba475
JT
1362 lockdep_assert_held(&phba->hbalock);
1363
3772a991 1364 phba->__lpfc_sli_release_iocbq(phba, iocbq);
2a9bf3d0 1365 phba->iocb_cnt--;
3772a991
JS
1366}
1367
e59058c4 1368/**
3621a710 1369 * lpfc_sli_release_iocbq - Release iocb to the iocb pool
e59058c4
JS
1370 * @phba: Pointer to HBA context object.
1371 * @iocbq: Pointer to driver iocb object.
1372 *
1373 * This function is called with no lock held to release the iocb to
1374 * iocb pool.
1375 **/
2e0fef85
JS
1376void
1377lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1378{
1379 unsigned long iflags;
1380
1381 /*
1382 * Clean all volatile data fields, preserve iotag and node struct.
1383 */
1384 spin_lock_irqsave(&phba->hbalock, iflags);
1385 __lpfc_sli_release_iocbq(phba, iocbq);
1386 spin_unlock_irqrestore(&phba->hbalock, iflags);
1387}
1388
a257bf90
JS
1389/**
1390 * lpfc_sli_cancel_iocbs - Cancel all iocbs from a list.
1391 * @phba: Pointer to HBA context object.
1392 * @iocblist: List of IOCBs.
1393 * @ulpstatus: ULP status in IOCB command field.
1394 * @ulpWord4: ULP word-4 in IOCB command field.
1395 *
1396 * This function is called with a list of IOCBs to cancel. It cancels the IOCB
1397 * on the list by invoking the complete callback function associated with the
1398 * IOCB with the provided @ulpstatus and @ulpword4 set to the IOCB commond
1399 * fields.
1400 **/
1401void
1402lpfc_sli_cancel_iocbs(struct lpfc_hba *phba, struct list_head *iocblist,
1403 uint32_t ulpstatus, uint32_t ulpWord4)
1404{
1405 struct lpfc_iocbq *piocb;
1406
1407 while (!list_empty(iocblist)) {
1408 list_remove_head(iocblist, piocb, struct lpfc_iocbq, list);
84f2ddf8
JS
1409 if (!piocb->iocb_cmpl) {
1410 if (piocb->iocb_flag & LPFC_IO_NVME)
1411 lpfc_nvme_cancel_iocb(phba, piocb);
1412 else
1413 lpfc_sli_release_iocbq(phba, piocb);
1414 } else {
a257bf90
JS
1415 piocb->iocb.ulpStatus = ulpstatus;
1416 piocb->iocb.un.ulpWord[4] = ulpWord4;
1417 (piocb->iocb_cmpl) (phba, piocb, piocb);
1418 }
1419 }
1420 return;
1421}
1422
e59058c4 1423/**
3621a710
JS
1424 * lpfc_sli_iocb_cmd_type - Get the iocb type
1425 * @iocb_cmnd: iocb command code.
e59058c4
JS
1426 *
1427 * This function is called by ring event handler function to get the iocb type.
1428 * This function translates the iocb command to an iocb command type used to
1429 * decide the final disposition of each completed IOCB.
1430 * The function returns
1431 * LPFC_UNKNOWN_IOCB if it is an unsupported iocb
1432 * LPFC_SOL_IOCB if it is a solicited iocb completion
1433 * LPFC_ABORT_IOCB if it is an abort iocb
1434 * LPFC_UNSOL_IOCB if it is an unsolicited iocb
1435 *
1436 * The caller is not required to hold any lock.
1437 **/
dea3101e
JB
1438static lpfc_iocb_type
1439lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
1440{
1441 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
1442
1443 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
1444 return 0;
1445
1446 switch (iocb_cmnd) {
1447 case CMD_XMIT_SEQUENCE_CR:
1448 case CMD_XMIT_SEQUENCE_CX:
1449 case CMD_XMIT_BCAST_CN:
1450 case CMD_XMIT_BCAST_CX:
1451 case CMD_ELS_REQUEST_CR:
1452 case CMD_ELS_REQUEST_CX:
1453 case CMD_CREATE_XRI_CR:
1454 case CMD_CREATE_XRI_CX:
1455 case CMD_GET_RPI_CN:
1456 case CMD_XMIT_ELS_RSP_CX:
1457 case CMD_GET_RPI_CR:
1458 case CMD_FCP_IWRITE_CR:
1459 case CMD_FCP_IWRITE_CX:
1460 case CMD_FCP_IREAD_CR:
1461 case CMD_FCP_IREAD_CX:
1462 case CMD_FCP_ICMND_CR:
1463 case CMD_FCP_ICMND_CX:
f5603511
JS
1464 case CMD_FCP_TSEND_CX:
1465 case CMD_FCP_TRSP_CX:
1466 case CMD_FCP_TRECEIVE_CX:
1467 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB
1468 case CMD_ADAPTER_MSG:
1469 case CMD_ADAPTER_DUMP:
1470 case CMD_XMIT_SEQUENCE64_CR:
1471 case CMD_XMIT_SEQUENCE64_CX:
1472 case CMD_XMIT_BCAST64_CN:
1473 case CMD_XMIT_BCAST64_CX:
1474 case CMD_ELS_REQUEST64_CR:
1475 case CMD_ELS_REQUEST64_CX:
1476 case CMD_FCP_IWRITE64_CR:
1477 case CMD_FCP_IWRITE64_CX:
1478 case CMD_FCP_IREAD64_CR:
1479 case CMD_FCP_IREAD64_CX:
1480 case CMD_FCP_ICMND64_CR:
1481 case CMD_FCP_ICMND64_CX:
f5603511
JS
1482 case CMD_FCP_TSEND64_CX:
1483 case CMD_FCP_TRSP64_CX:
1484 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB
1485 case CMD_GEN_REQUEST64_CR:
1486 case CMD_GEN_REQUEST64_CX:
1487 case CMD_XMIT_ELS_RSP64_CX:
da0436e9
JS
1488 case DSSCMD_IWRITE64_CR:
1489 case DSSCMD_IWRITE64_CX:
1490 case DSSCMD_IREAD64_CR:
1491 case DSSCMD_IREAD64_CX:
c93764a6 1492 case CMD_SEND_FRAME:
dea3101e
JB
1493 type = LPFC_SOL_IOCB;
1494 break;
1495 case CMD_ABORT_XRI_CN:
1496 case CMD_ABORT_XRI_CX:
1497 case CMD_CLOSE_XRI_CN:
1498 case CMD_CLOSE_XRI_CX:
1499 case CMD_XRI_ABORTED_CX:
1500 case CMD_ABORT_MXRI64_CN:
6669f9bb 1501 case CMD_XMIT_BLS_RSP64_CX:
dea3101e
JB
1502 type = LPFC_ABORT_IOCB;
1503 break;
1504 case CMD_RCV_SEQUENCE_CX:
1505 case CMD_RCV_ELS_REQ_CX:
1506 case CMD_RCV_SEQUENCE64_CX:
1507 case CMD_RCV_ELS_REQ64_CX:
57127f15 1508 case CMD_ASYNC_STATUS:
ed957684
JS
1509 case CMD_IOCB_RCV_SEQ64_CX:
1510 case CMD_IOCB_RCV_ELS64_CX:
1511 case CMD_IOCB_RCV_CONT64_CX:
3163f725 1512 case CMD_IOCB_RET_XRI64_CX:
dea3101e
JB
1513 type = LPFC_UNSOL_IOCB;
1514 break;
3163f725
JS
1515 case CMD_IOCB_XMIT_MSEQ64_CR:
1516 case CMD_IOCB_XMIT_MSEQ64_CX:
1517 case CMD_IOCB_RCV_SEQ_LIST64_CX:
1518 case CMD_IOCB_RCV_ELS_LIST64_CX:
1519 case CMD_IOCB_CLOSE_EXTENDED_CN:
1520 case CMD_IOCB_ABORT_EXTENDED_CN:
1521 case CMD_IOCB_RET_HBQE64_CN:
1522 case CMD_IOCB_FCP_IBIDIR64_CR:
1523 case CMD_IOCB_FCP_IBIDIR64_CX:
1524 case CMD_IOCB_FCP_ITASKMGT64_CX:
1525 case CMD_IOCB_LOGENTRY_CN:
1526 case CMD_IOCB_LOGENTRY_ASYNC_CN:
1527 printk("%s - Unhandled SLI-3 Command x%x\n",
cadbd4a5 1528 __func__, iocb_cmnd);
3163f725
JS
1529 type = LPFC_UNKNOWN_IOCB;
1530 break;
dea3101e
JB
1531 default:
1532 type = LPFC_UNKNOWN_IOCB;
1533 break;
1534 }
1535
1536 return type;
1537}
1538
e59058c4 1539/**
3621a710 1540 * lpfc_sli_ring_map - Issue config_ring mbox for all rings
e59058c4
JS
1541 * @phba: Pointer to HBA context object.
1542 *
1543 * This function is called from SLI initialization code
1544 * to configure every ring of the HBA's SLI interface. The
1545 * caller is not required to hold any lock. This function issues
1546 * a config_ring mailbox command for each ring.
1547 * This function returns zero if successful else returns a negative
1548 * error code.
1549 **/
dea3101e 1550static int
ed957684 1551lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB
1552{
1553 struct lpfc_sli *psli = &phba->sli;
ed957684
JS
1554 LPFC_MBOXQ_t *pmb;
1555 MAILBOX_t *pmbox;
1556 int i, rc, ret = 0;
dea3101e 1557
ed957684
JS
1558 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1559 if (!pmb)
1560 return -ENOMEM;
04c68496 1561 pmbox = &pmb->u.mb;
ed957684 1562 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 1563 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB
1564 lpfc_config_ring(phba, i, pmb);
1565 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1566 if (rc != MBX_SUCCESS) {
372c187b 1567 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 1568 "0446 Adapter failed to init (%d), "
dea3101e
JB
1569 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
1570 "ring %d\n",
e8b62011
JS
1571 rc, pmbox->mbxCommand,
1572 pmbox->mbxStatus, i);
2e0fef85 1573 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS
1574 ret = -ENXIO;
1575 break;
dea3101e
JB
1576 }
1577 }
ed957684
JS
1578 mempool_free(pmb, phba->mbox_mem_pool);
1579 return ret;
dea3101e
JB
1580}
1581
e59058c4 1582/**
3621a710 1583 * lpfc_sli_ringtxcmpl_put - Adds new iocb to the txcmplq
e59058c4
JS
1584 * @phba: Pointer to HBA context object.
1585 * @pring: Pointer to driver SLI ring object.
1586 * @piocb: Pointer to the driver iocb object.
1587 *
e2a8be56
JS
1588 * The driver calls this function with the hbalock held for SLI3 ports or
1589 * the ring lock held for SLI4 ports. The function adds the
e59058c4
JS
1590 * new iocb to txcmplq of the given ring. This function always returns
1591 * 0. If this function is called for ELS ring, this function checks if
1592 * there is a vport associated with the ELS command. This function also
1593 * starts els_tmofunc timer if this is an ELS command.
1594 **/
dea3101e 1595static int
2e0fef85
JS
1596lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1597 struct lpfc_iocbq *piocb)
dea3101e 1598{
e2a8be56
JS
1599 if (phba->sli_rev == LPFC_SLI_REV4)
1600 lockdep_assert_held(&pring->ring_lock);
1601 else
1602 lockdep_assert_held(&phba->hbalock);
1c2ba475 1603
2319f847 1604 BUG_ON(!piocb);
22466da5 1605
dea3101e 1606 list_add_tail(&piocb->list, &pring->txcmplq);
4f2e66c6 1607 piocb->iocb_flag |= LPFC_IO_ON_TXCMPLQ;
c490850a 1608 pring->txcmplq_cnt++;
2a9bf3d0 1609
92d7f7b0
JS
1610 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
1611 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2319f847
MFO
1612 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
1613 BUG_ON(!piocb->vport);
1614 if (!(piocb->vport->load_flag & FC_UNLOADING))
1615 mod_timer(&piocb->vport->els_tmofunc,
1616 jiffies +
1617 msecs_to_jiffies(1000 * (phba->fc_ratov << 1)));
1618 }
dea3101e 1619
2e0fef85 1620 return 0;
dea3101e
JB
1621}
1622
e59058c4 1623/**
3621a710 1624 * lpfc_sli_ringtx_get - Get first element of the txq
e59058c4
JS
1625 * @phba: Pointer to HBA context object.
1626 * @pring: Pointer to driver SLI ring object.
1627 *
1628 * This function is called with hbalock held to get next
1629 * iocb in txq of the given ring. If there is any iocb in
1630 * the txq, the function returns first iocb in the list after
1631 * removing the iocb from the list, else it returns NULL.
1632 **/
2a9bf3d0 1633struct lpfc_iocbq *
2e0fef85 1634lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 1635{
dea3101e
JB
1636 struct lpfc_iocbq *cmd_iocb;
1637
1c2ba475
JT
1638 lockdep_assert_held(&phba->hbalock);
1639
858c9f6c 1640 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
2e0fef85 1641 return cmd_iocb;
dea3101e
JB
1642}
1643
e59058c4 1644/**
3621a710 1645 * lpfc_sli_next_iocb_slot - Get next iocb slot in the ring
e59058c4
JS
1646 * @phba: Pointer to HBA context object.
1647 * @pring: Pointer to driver SLI ring object.
1648 *
1649 * This function is called with hbalock held and the caller must post the
1650 * iocb without releasing the lock. If the caller releases the lock,
1651 * iocb slot returned by the function is not guaranteed to be available.
1652 * The function returns pointer to the next available iocb slot if there
1653 * is available slot in the ring, else it returns NULL.
1654 * If the get index of the ring is ahead of the put index, the function
1655 * will post an error attention event to the worker thread to take the
1656 * HBA to offline state.
1657 **/
dea3101e
JB
1658static IOCB_t *
1659lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1660{
34b02dcd 1661 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
7e56aa25 1662 uint32_t max_cmd_idx = pring->sli.sli3.numCiocb;
1c2ba475
JT
1663
1664 lockdep_assert_held(&phba->hbalock);
1665
7e56aa25
JS
1666 if ((pring->sli.sli3.next_cmdidx == pring->sli.sli3.cmdidx) &&
1667 (++pring->sli.sli3.next_cmdidx >= max_cmd_idx))
1668 pring->sli.sli3.next_cmdidx = 0;
dea3101e 1669
7e56aa25
JS
1670 if (unlikely(pring->sli.sli3.local_getidx ==
1671 pring->sli.sli3.next_cmdidx)) {
dea3101e 1672
7e56aa25 1673 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e 1674
7e56aa25 1675 if (unlikely(pring->sli.sli3.local_getidx >= max_cmd_idx)) {
372c187b 1676 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 1677 "0315 Ring %d issue: portCmdGet %d "
025dfdaf 1678 "is bigger than cmd ring %d\n",
e8b62011 1679 pring->ringno,
7e56aa25
JS
1680 pring->sli.sli3.local_getidx,
1681 max_cmd_idx);
dea3101e 1682
2e0fef85 1683 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
1684 /*
1685 * All error attention handlers are posted to
1686 * worker thread
1687 */
1688 phba->work_ha |= HA_ERATT;
1689 phba->work_hs = HS_FFER3;
92d7f7b0 1690
5e9d9b82 1691 lpfc_worker_wake_up(phba);
dea3101e
JB
1692
1693 return NULL;
1694 }
1695
7e56aa25 1696 if (pring->sli.sli3.local_getidx == pring->sli.sli3.next_cmdidx)
dea3101e
JB
1697 return NULL;
1698 }
1699
ed957684 1700 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB
1701}
1702
e59058c4 1703/**
3621a710 1704 * lpfc_sli_next_iotag - Get an iotag for the iocb
e59058c4
JS
1705 * @phba: Pointer to HBA context object.
1706 * @iocbq: Pointer to driver iocb object.
1707 *
1708 * This function gets an iotag for the iocb. If there is no unused iotag and
1709 * the iocbq_lookup_len < 0xffff, this function allocates a bigger iotag_lookup
1710 * array and assigns a new iotag.
1711 * The function returns the allocated iotag if successful, else returns zero.
1712 * Zero is not a valid iotag.
1713 * The caller is not required to hold any lock.
1714 **/
604a3e30 1715uint16_t
2e0fef85 1716lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 1717{
2e0fef85
JS
1718 struct lpfc_iocbq **new_arr;
1719 struct lpfc_iocbq **old_arr;
604a3e30
JB
1720 size_t new_len;
1721 struct lpfc_sli *psli = &phba->sli;
1722 uint16_t iotag;
dea3101e 1723
2e0fef85 1724 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1725 iotag = psli->last_iotag;
1726 if(++iotag < psli->iocbq_lookup_len) {
1727 psli->last_iotag = iotag;
1728 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1729 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1730 iocbq->iotag = iotag;
1731 return iotag;
2e0fef85 1732 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB
1733 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
1734 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85 1735 spin_unlock_irq(&phba->hbalock);
6396bb22 1736 new_arr = kcalloc(new_len, sizeof(struct lpfc_iocbq *),
604a3e30
JB
1737 GFP_KERNEL);
1738 if (new_arr) {
2e0fef85 1739 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1740 old_arr = psli->iocbq_lookup;
1741 if (new_len <= psli->iocbq_lookup_len) {
1742 /* highly unprobable case */
1743 kfree(new_arr);
1744 iotag = psli->last_iotag;
1745 if(++iotag < psli->iocbq_lookup_len) {
1746 psli->last_iotag = iotag;
1747 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1748 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1749 iocbq->iotag = iotag;
1750 return iotag;
1751 }
2e0fef85 1752 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1753 return 0;
1754 }
1755 if (psli->iocbq_lookup)
1756 memcpy(new_arr, old_arr,
1757 ((psli->last_iotag + 1) *
311464ec 1758 sizeof (struct lpfc_iocbq *)));
604a3e30
JB
1759 psli->iocbq_lookup = new_arr;
1760 psli->iocbq_lookup_len = new_len;
1761 psli->last_iotag = iotag;
1762 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1763 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1764 iocbq->iotag = iotag;
1765 kfree(old_arr);
1766 return iotag;
1767 }
8f6d98d2 1768 } else
2e0fef85 1769 spin_unlock_irq(&phba->hbalock);
dea3101e 1770
bc73905a 1771 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
1772 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
1773 psli->last_iotag);
dea3101e 1774
604a3e30 1775 return 0;
dea3101e
JB
1776}
1777
e59058c4 1778/**
3621a710 1779 * lpfc_sli_submit_iocb - Submit an iocb to the firmware
e59058c4
JS
1780 * @phba: Pointer to HBA context object.
1781 * @pring: Pointer to driver SLI ring object.
1782 * @iocb: Pointer to iocb slot in the ring.
1783 * @nextiocb: Pointer to driver iocb object which need to be
1784 * posted to firmware.
1785 *
88acb4d9
DK
1786 * This function is called to post a new iocb to the firmware. This
1787 * function copies the new iocb to ring iocb slot and updates the
1788 * ring pointers. It adds the new iocb to txcmplq if there is
e59058c4 1789 * a completion call back for this iocb else the function will free the
88acb4d9
DK
1790 * iocb object. The hbalock is asserted held in the code path calling
1791 * this routine.
e59058c4 1792 **/
dea3101e
JB
1793static void
1794lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1795 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
1796{
1797 /*
604a3e30 1798 * Set up an iotag
dea3101e 1799 */
604a3e30 1800 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 1801
e2a0a9d6 1802
a58cbd52
JS
1803 if (pring->ringno == LPFC_ELS_RING) {
1804 lpfc_debugfs_slow_ring_trc(phba,
1805 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1806 *(((uint32_t *) &nextiocb->iocb) + 4),
1807 *(((uint32_t *) &nextiocb->iocb) + 6),
1808 *(((uint32_t *) &nextiocb->iocb) + 7));
1809 }
1810
dea3101e
JB
1811 /*
1812 * Issue iocb command to adapter
1813 */
92d7f7b0 1814 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB
1815 wmb();
1816 pring->stats.iocb_cmd++;
1817
1818 /*
1819 * If there is no completion routine to call, we can release the
1820 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
1821 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
1822 */
1823 if (nextiocb->iocb_cmpl)
1824 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 1825 else
2e0fef85 1826 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB
1827
1828 /*
1829 * Let the HBA know what IOCB slot will be the next one the
1830 * driver will put a command into.
1831 */
7e56aa25
JS
1832 pring->sli.sli3.cmdidx = pring->sli.sli3.next_cmdidx;
1833 writel(pring->sli.sli3.cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB
1834}
1835
e59058c4 1836/**
3621a710 1837 * lpfc_sli_update_full_ring - Update the chip attention register
e59058c4
JS
1838 * @phba: Pointer to HBA context object.
1839 * @pring: Pointer to driver SLI ring object.
1840 *
1841 * The caller is not required to hold any lock for calling this function.
1842 * This function updates the chip attention bits for the ring to inform firmware
1843 * that there are pending work to be done for this ring and requests an
1844 * interrupt when there is space available in the ring. This function is
1845 * called when the driver is unable to post more iocbs to the ring due
1846 * to unavailability of space in the ring.
1847 **/
dea3101e 1848static void
2e0fef85 1849lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1850{
1851 int ringno = pring->ringno;
1852
1853 pring->flag |= LPFC_CALL_RING_AVAILABLE;
1854
1855 wmb();
1856
1857 /*
1858 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
1859 * The HBA will tell us when an IOCB entry is available.
1860 */
1861 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
1862 readl(phba->CAregaddr); /* flush */
1863
1864 pring->stats.iocb_cmd_full++;
1865}
1866
e59058c4 1867/**
3621a710 1868 * lpfc_sli_update_ring - Update chip attention register
e59058c4
JS
1869 * @phba: Pointer to HBA context object.
1870 * @pring: Pointer to driver SLI ring object.
1871 *
1872 * This function updates the chip attention register bit for the
1873 * given ring to inform HBA that there is more work to be done
1874 * in this ring. The caller is not required to hold any lock.
1875 **/
dea3101e 1876static void
2e0fef85 1877lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1878{
1879 int ringno = pring->ringno;
1880
1881 /*
1882 * Tell the HBA that there is work to do in this ring.
1883 */
34b02dcd
JS
1884 if (!(phba->sli3_options & LPFC_SLI3_CRP_ENABLED)) {
1885 wmb();
1886 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
1887 readl(phba->CAregaddr); /* flush */
1888 }
dea3101e
JB
1889}
1890
e59058c4 1891/**
3621a710 1892 * lpfc_sli_resume_iocb - Process iocbs in the txq
e59058c4
JS
1893 * @phba: Pointer to HBA context object.
1894 * @pring: Pointer to driver SLI ring object.
1895 *
1896 * This function is called with hbalock held to post pending iocbs
1897 * in the txq to the firmware. This function is called when driver
1898 * detects space available in the ring.
1899 **/
dea3101e 1900static void
2e0fef85 1901lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1902{
1903 IOCB_t *iocb;
1904 struct lpfc_iocbq *nextiocb;
1905
1c2ba475
JT
1906 lockdep_assert_held(&phba->hbalock);
1907
dea3101e
JB
1908 /*
1909 * Check to see if:
1910 * (a) there is anything on the txq to send
1911 * (b) link is up
1912 * (c) link attention events can be processed (fcp ring only)
1913 * (d) IOCB processing is not blocked by the outstanding mbox command.
1914 */
0e9bb8d7
JS
1915
1916 if (lpfc_is_link_up(phba) &&
1917 (!list_empty(&pring->txq)) &&
895427bd 1918 (pring->ringno != LPFC_FCP_RING ||
0b727fea 1919 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e
JB
1920
1921 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
1922 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
1923 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
1924
1925 if (iocb)
1926 lpfc_sli_update_ring(phba, pring);
1927 else
1928 lpfc_sli_update_full_ring(phba, pring);
1929 }
1930
1931 return;
1932}
1933
e59058c4 1934/**
3621a710 1935 * lpfc_sli_next_hbq_slot - Get next hbq entry for the HBQ
e59058c4
JS
1936 * @phba: Pointer to HBA context object.
1937 * @hbqno: HBQ number.
1938 *
1939 * This function is called with hbalock held to get the next
1940 * available slot for the given HBQ. If there is free slot
1941 * available for the HBQ it will return pointer to the next available
1942 * HBQ entry else it will return NULL.
1943 **/
a6ababd2 1944static struct lpfc_hbq_entry *
ed957684
JS
1945lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
1946{
1947 struct hbq_s *hbqp = &phba->hbqs[hbqno];
1948
1c2ba475
JT
1949 lockdep_assert_held(&phba->hbalock);
1950
ed957684
JS
1951 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
1952 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
1953 hbqp->next_hbqPutIdx = 0;
1954
1955 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 1956 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS
1957 uint32_t getidx = le32_to_cpu(raw_index);
1958
1959 hbqp->local_hbqGetIdx = getidx;
1960
1961 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
372c187b 1962 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 1963 "1802 HBQ %d: local_hbqGetIdx "
ed957684 1964 "%u is > than hbqp->entry_count %u\n",
e8b62011 1965 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS
1966 hbqp->entry_count);
1967
1968 phba->link_state = LPFC_HBA_ERROR;
1969 return NULL;
1970 }
1971
1972 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
1973 return NULL;
1974 }
1975
51ef4c26
JS
1976 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
1977 hbqp->hbqPutIdx;
ed957684
JS
1978}
1979
e59058c4 1980/**
3621a710 1981 * lpfc_sli_hbqbuf_free_all - Free all the hbq buffers
e59058c4
JS
1982 * @phba: Pointer to HBA context object.
1983 *
1984 * This function is called with no lock held to free all the
1985 * hbq buffers while uninitializing the SLI interface. It also
1986 * frees the HBQ buffers returned by the firmware but not yet
1987 * processed by the upper layers.
1988 **/
ed957684
JS
1989void
1990lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
1991{
92d7f7b0
JS
1992 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
1993 struct hbq_dmabuf *hbq_buf;
3163f725 1994 unsigned long flags;
51ef4c26 1995 int i, hbq_count;
ed957684 1996
51ef4c26 1997 hbq_count = lpfc_sli_hbq_count();
ed957684 1998 /* Return all memory used by all HBQs */
3163f725 1999 spin_lock_irqsave(&phba->hbalock, flags);
51ef4c26
JS
2000 for (i = 0; i < hbq_count; ++i) {
2001 list_for_each_entry_safe(dmabuf, next_dmabuf,
2002 &phba->hbqs[i].hbq_buffer_list, list) {
2003 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
2004 list_del(&hbq_buf->dbuf.list);
2005 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
2006 }
a8adb832 2007 phba->hbqs[i].buffer_count = 0;
ed957684 2008 }
3163f725
JS
2009
2010 /* Mark the HBQs not in use */
2011 phba->hbq_in_use = 0;
2012 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684
JS
2013}
2014
e59058c4 2015/**
3621a710 2016 * lpfc_sli_hbq_to_firmware - Post the hbq buffer to firmware
e59058c4
JS
2017 * @phba: Pointer to HBA context object.
2018 * @hbqno: HBQ number.
2019 * @hbq_buf: Pointer to HBQ buffer.
2020 *
2021 * This function is called with the hbalock held to post a
2022 * hbq buffer to the firmware. If the function finds an empty
2023 * slot in the HBQ, it will post the buffer. The function will return
2024 * pointer to the hbq entry if it successfully post the buffer
2025 * else it will return NULL.
2026 **/
3772a991 2027static int
ed957684 2028lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 2029 struct hbq_dmabuf *hbq_buf)
3772a991 2030{
1c2ba475 2031 lockdep_assert_held(&phba->hbalock);
3772a991
JS
2032 return phba->lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buf);
2033}
2034
2035/**
2036 * lpfc_sli_hbq_to_firmware_s3 - Post the hbq buffer to SLI3 firmware
2037 * @phba: Pointer to HBA context object.
2038 * @hbqno: HBQ number.
2039 * @hbq_buf: Pointer to HBQ buffer.
2040 *
2041 * This function is called with the hbalock held to post a hbq buffer to the
2042 * firmware. If the function finds an empty slot in the HBQ, it will post the
2043 * buffer and place it on the hbq_buffer_list. The function will return zero if
2044 * it successfully post the buffer else it will return an error.
2045 **/
2046static int
2047lpfc_sli_hbq_to_firmware_s3(struct lpfc_hba *phba, uint32_t hbqno,
2048 struct hbq_dmabuf *hbq_buf)
ed957684
JS
2049{
2050 struct lpfc_hbq_entry *hbqe;
92d7f7b0 2051 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684 2052
1c2ba475 2053 lockdep_assert_held(&phba->hbalock);
ed957684
JS
2054 /* Get next HBQ entry slot to use */
2055 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
2056 if (hbqe) {
2057 struct hbq_s *hbqp = &phba->hbqs[hbqno];
2058
92d7f7b0
JS
2059 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
2060 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
895427bd 2061 hbqe->bde.tus.f.bdeSize = hbq_buf->total_size;
ed957684 2062 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS
2063 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
2064 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
2065 /* Sync SLIM */
ed957684
JS
2066 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
2067 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 2068 /* flush */
ed957684 2069 readl(phba->hbq_put + hbqno);
51ef4c26 2070 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
3772a991
JS
2071 return 0;
2072 } else
2073 return -ENOMEM;
ed957684
JS
2074}
2075
4f774513
JS
2076/**
2077 * lpfc_sli_hbq_to_firmware_s4 - Post the hbq buffer to SLI4 firmware
2078 * @phba: Pointer to HBA context object.
2079 * @hbqno: HBQ number.
2080 * @hbq_buf: Pointer to HBQ buffer.
2081 *
2082 * This function is called with the hbalock held to post an RQE to the SLI4
2083 * firmware. If able to post the RQE to the RQ it will queue the hbq entry to
2084 * the hbq_buffer_list and return zero, otherwise it will return an error.
2085 **/
2086static int
2087lpfc_sli_hbq_to_firmware_s4(struct lpfc_hba *phba, uint32_t hbqno,
2088 struct hbq_dmabuf *hbq_buf)
2089{
2090 int rc;
2091 struct lpfc_rqe hrqe;
2092 struct lpfc_rqe drqe;
895427bd
JS
2093 struct lpfc_queue *hrq;
2094 struct lpfc_queue *drq;
2095
2096 if (hbqno != LPFC_ELS_HBQ)
2097 return 1;
2098 hrq = phba->sli4_hba.hdr_rq;
2099 drq = phba->sli4_hba.dat_rq;
4f774513 2100
1c2ba475 2101 lockdep_assert_held(&phba->hbalock);
4f774513
JS
2102 hrqe.address_lo = putPaddrLow(hbq_buf->hbuf.phys);
2103 hrqe.address_hi = putPaddrHigh(hbq_buf->hbuf.phys);
2104 drqe.address_lo = putPaddrLow(hbq_buf->dbuf.phys);
2105 drqe.address_hi = putPaddrHigh(hbq_buf->dbuf.phys);
895427bd 2106 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
4f774513
JS
2107 if (rc < 0)
2108 return rc;
895427bd 2109 hbq_buf->tag = (rc | (hbqno << 16));
4f774513
JS
2110 list_add_tail(&hbq_buf->dbuf.list, &phba->hbqs[hbqno].hbq_buffer_list);
2111 return 0;
2112}
2113
e59058c4 2114/* HBQ for ELS and CT traffic. */
92d7f7b0
JS
2115static struct lpfc_hbq_init lpfc_els_hbq = {
2116 .rn = 1,
def9c7a9 2117 .entry_count = 256,
92d7f7b0
JS
2118 .mask_count = 0,
2119 .profile = 0,
51ef4c26 2120 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0 2121 .buffer_count = 0,
a257bf90
JS
2122 .init_count = 40,
2123 .add_count = 40,
92d7f7b0 2124};
ed957684 2125
e59058c4 2126/* Array of HBQs */
78b2d852 2127struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0
JS
2128 &lpfc_els_hbq,
2129};
ed957684 2130
e59058c4 2131/**
3621a710 2132 * lpfc_sli_hbqbuf_fill_hbqs - Post more hbq buffers to HBQ
e59058c4
JS
2133 * @phba: Pointer to HBA context object.
2134 * @hbqno: HBQ number.
2135 * @count: Number of HBQ buffers to be posted.
2136 *
d7c255b2
JS
2137 * This function is called with no lock held to post more hbq buffers to the
2138 * given HBQ. The function returns the number of HBQ buffers successfully
2139 * posted.
e59058c4 2140 **/
311464ec 2141static int
92d7f7b0 2142lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 2143{
d7c255b2 2144 uint32_t i, posted = 0;
3163f725 2145 unsigned long flags;
92d7f7b0 2146 struct hbq_dmabuf *hbq_buffer;
d7c255b2 2147 LIST_HEAD(hbq_buf_list);
eafe1df9 2148 if (!phba->hbqs[hbqno].hbq_alloc_buffer)
51ef4c26 2149 return 0;
51ef4c26 2150
d7c255b2
JS
2151 if ((phba->hbqs[hbqno].buffer_count + count) >
2152 lpfc_hbq_defs[hbqno]->entry_count)
2153 count = lpfc_hbq_defs[hbqno]->entry_count -
2154 phba->hbqs[hbqno].buffer_count;
2155 if (!count)
2156 return 0;
2157 /* Allocate HBQ entries */
2158 for (i = 0; i < count; i++) {
2159 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
2160 if (!hbq_buffer)
2161 break;
2162 list_add_tail(&hbq_buffer->dbuf.list, &hbq_buf_list);
2163 }
3163f725
JS
2164 /* Check whether HBQ is still in use */
2165 spin_lock_irqsave(&phba->hbalock, flags);
eafe1df9 2166 if (!phba->hbq_in_use)
d7c255b2
JS
2167 goto err;
2168 while (!list_empty(&hbq_buf_list)) {
2169 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2170 dbuf.list);
2171 hbq_buffer->tag = (phba->hbqs[hbqno].buffer_count |
2172 (hbqno << 16));
3772a991 2173 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
a8adb832 2174 phba->hbqs[hbqno].buffer_count++;
d7c255b2
JS
2175 posted++;
2176 } else
51ef4c26 2177 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684 2178 }
3163f725 2179 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2180 return posted;
2181err:
eafe1df9 2182 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2183 while (!list_empty(&hbq_buf_list)) {
2184 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2185 dbuf.list);
2186 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
2187 }
2188 return 0;
ed957684
JS
2189}
2190
e59058c4 2191/**
3621a710 2192 * lpfc_sli_hbqbuf_add_hbqs - Post more HBQ buffers to firmware
e59058c4
JS
2193 * @phba: Pointer to HBA context object.
2194 * @qno: HBQ number.
2195 *
2196 * This function posts more buffers to the HBQ. This function
d7c255b2
JS
2197 * is called with no lock held. The function returns the number of HBQ entries
2198 * successfully allocated.
e59058c4 2199 **/
92d7f7b0
JS
2200int
2201lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 2202{
def9c7a9
JS
2203 if (phba->sli_rev == LPFC_SLI_REV4)
2204 return 0;
2205 else
2206 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2207 lpfc_hbq_defs[qno]->add_count);
92d7f7b0 2208}
ed957684 2209
e59058c4 2210/**
3621a710 2211 * lpfc_sli_hbqbuf_init_hbqs - Post initial buffers to the HBQ
e59058c4
JS
2212 * @phba: Pointer to HBA context object.
2213 * @qno: HBQ queue number.
2214 *
2215 * This function is called from SLI initialization code path with
2216 * no lock held to post initial HBQ buffers to firmware. The
d7c255b2 2217 * function returns the number of HBQ entries successfully allocated.
e59058c4 2218 **/
a6ababd2 2219static int
92d7f7b0
JS
2220lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
2221{
def9c7a9
JS
2222 if (phba->sli_rev == LPFC_SLI_REV4)
2223 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
73d91e50 2224 lpfc_hbq_defs[qno]->entry_count);
def9c7a9
JS
2225 else
2226 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2227 lpfc_hbq_defs[qno]->init_count);
ed957684
JS
2228}
2229
7af29d45 2230/*
3772a991 2231 * lpfc_sli_hbqbuf_get - Remove the first hbq off of an hbq list
3772a991
JS
2232 *
2233 * This function removes the first hbq buffer on an hbq list and returns a
2234 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2235 **/
2236static struct hbq_dmabuf *
2237lpfc_sli_hbqbuf_get(struct list_head *rb_list)
2238{
2239 struct lpfc_dmabuf *d_buf;
2240
2241 list_remove_head(rb_list, d_buf, struct lpfc_dmabuf, list);
2242 if (!d_buf)
2243 return NULL;
2244 return container_of(d_buf, struct hbq_dmabuf, dbuf);
2245}
2246
2d7dbc4c
JS
2247/**
2248 * lpfc_sli_rqbuf_get - Remove the first dma buffer off of an RQ list
2249 * @phba: Pointer to HBA context object.
7af29d45 2250 * @hrq: HBQ number.
2d7dbc4c
JS
2251 *
2252 * This function removes the first RQ buffer on an RQ buffer list and returns a
2253 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2254 **/
2255static struct rqb_dmabuf *
2256lpfc_sli_rqbuf_get(struct lpfc_hba *phba, struct lpfc_queue *hrq)
2257{
2258 struct lpfc_dmabuf *h_buf;
2259 struct lpfc_rqb *rqbp;
2260
2261 rqbp = hrq->rqbp;
2262 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
2263 struct lpfc_dmabuf, list);
2264 if (!h_buf)
2265 return NULL;
2266 rqbp->buffer_count--;
2267 return container_of(h_buf, struct rqb_dmabuf, hbuf);
2268}
2269
e59058c4 2270/**
3621a710 2271 * lpfc_sli_hbqbuf_find - Find the hbq buffer associated with a tag
e59058c4
JS
2272 * @phba: Pointer to HBA context object.
2273 * @tag: Tag of the hbq buffer.
2274 *
71892418
SH
2275 * This function searches for the hbq buffer associated with the given tag in
2276 * the hbq buffer list. If it finds the hbq buffer, it returns the hbq_buffer
2277 * otherwise it returns NULL.
e59058c4 2278 **/
a6ababd2 2279static struct hbq_dmabuf *
92d7f7b0 2280lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 2281{
92d7f7b0
JS
2282 struct lpfc_dmabuf *d_buf;
2283 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS
2284 uint32_t hbqno;
2285
2286 hbqno = tag >> 16;
a0a74e45 2287 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 2288 return NULL;
ed957684 2289
3772a991 2290 spin_lock_irq(&phba->hbalock);
51ef4c26 2291 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 2292 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 2293 if (hbq_buf->tag == tag) {
3772a991 2294 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2295 return hbq_buf;
ed957684
JS
2296 }
2297 }
3772a991 2298 spin_unlock_irq(&phba->hbalock);
372c187b 2299 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 2300 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 2301 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 2302 return NULL;
ed957684
JS
2303}
2304
e59058c4 2305/**
3621a710 2306 * lpfc_sli_free_hbq - Give back the hbq buffer to firmware
e59058c4
JS
2307 * @phba: Pointer to HBA context object.
2308 * @hbq_buffer: Pointer to HBQ buffer.
2309 *
2310 * This function is called with hbalock. This function gives back
2311 * the hbq buffer to firmware. If the HBQ does not have space to
2312 * post the buffer, it will free the buffer.
2313 **/
ed957684 2314void
51ef4c26 2315lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS
2316{
2317 uint32_t hbqno;
2318
51ef4c26
JS
2319 if (hbq_buffer) {
2320 hbqno = hbq_buffer->tag >> 16;
3772a991 2321 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
51ef4c26 2322 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS
2323 }
2324}
2325
e59058c4 2326/**
3621a710 2327 * lpfc_sli_chk_mbx_command - Check if the mailbox is a legitimate mailbox
e59058c4
JS
2328 * @mbxCommand: mailbox command code.
2329 *
2330 * This function is called by the mailbox event handler function to verify
2331 * that the completed mailbox command is a legitimate mailbox command. If the
2332 * completed mailbox is not known to the function, it will return MBX_SHUTDOWN
2333 * and the mailbox event handler will take the HBA offline.
2334 **/
dea3101e
JB
2335static int
2336lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
2337{
2338 uint8_t ret;
2339
2340 switch (mbxCommand) {
2341 case MBX_LOAD_SM:
2342 case MBX_READ_NV:
2343 case MBX_WRITE_NV:
a8adb832 2344 case MBX_WRITE_VPARMS:
dea3101e
JB
2345 case MBX_RUN_BIU_DIAG:
2346 case MBX_INIT_LINK:
2347 case MBX_DOWN_LINK:
2348 case MBX_CONFIG_LINK:
2349 case MBX_CONFIG_RING:
2350 case MBX_RESET_RING:
2351 case MBX_READ_CONFIG:
2352 case MBX_READ_RCONFIG:
2353 case MBX_READ_SPARM:
2354 case MBX_READ_STATUS:
2355 case MBX_READ_RPI:
2356 case MBX_READ_XRI:
2357 case MBX_READ_REV:
2358 case MBX_READ_LNK_STAT:
2359 case MBX_REG_LOGIN:
2360 case MBX_UNREG_LOGIN:
dea3101e
JB
2361 case MBX_CLEAR_LA:
2362 case MBX_DUMP_MEMORY:
2363 case MBX_DUMP_CONTEXT:
2364 case MBX_RUN_DIAGS:
2365 case MBX_RESTART:
2366 case MBX_UPDATE_CFG:
2367 case MBX_DOWN_LOAD:
2368 case MBX_DEL_LD_ENTRY:
2369 case MBX_RUN_PROGRAM:
2370 case MBX_SET_MASK:
09372820 2371 case MBX_SET_VARIABLE:
dea3101e 2372 case MBX_UNREG_D_ID:
41415862 2373 case MBX_KILL_BOARD:
dea3101e 2374 case MBX_CONFIG_FARP:
41415862 2375 case MBX_BEACON:
dea3101e
JB
2376 case MBX_LOAD_AREA:
2377 case MBX_RUN_BIU_DIAG64:
2378 case MBX_CONFIG_PORT:
2379 case MBX_READ_SPARM64:
2380 case MBX_READ_RPI64:
2381 case MBX_REG_LOGIN64:
76a95d75 2382 case MBX_READ_TOPOLOGY:
09372820 2383 case MBX_WRITE_WWN:
dea3101e
JB
2384 case MBX_SET_DEBUG:
2385 case MBX_LOAD_EXP_ROM:
57127f15 2386 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS
2387 case MBX_REG_VPI:
2388 case MBX_UNREG_VPI:
858c9f6c 2389 case MBX_HEARTBEAT:
84774a4d
JS
2390 case MBX_PORT_CAPABILITIES:
2391 case MBX_PORT_IOV_CONTROL:
04c68496
JS
2392 case MBX_SLI4_CONFIG:
2393 case MBX_SLI4_REQ_FTRS:
2394 case MBX_REG_FCFI:
2395 case MBX_UNREG_FCFI:
2396 case MBX_REG_VFI:
2397 case MBX_UNREG_VFI:
2398 case MBX_INIT_VPI:
2399 case MBX_INIT_VFI:
2400 case MBX_RESUME_RPI:
c7495937
JS
2401 case MBX_READ_EVENT_LOG_STATUS:
2402 case MBX_READ_EVENT_LOG:
dcf2a4e0
JS
2403 case MBX_SECURITY_MGMT:
2404 case MBX_AUTH_PORT:
940eb687 2405 case MBX_ACCESS_VDATA:
dea3101e
JB
2406 ret = mbxCommand;
2407 break;
2408 default:
2409 ret = MBX_SHUTDOWN;
2410 break;
2411 }
2e0fef85 2412 return ret;
dea3101e 2413}
e59058c4
JS
2414
2415/**
3621a710 2416 * lpfc_sli_wake_mbox_wait - lpfc_sli_issue_mbox_wait mbox completion handler
e59058c4
JS
2417 * @phba: Pointer to HBA context object.
2418 * @pmboxq: Pointer to mailbox command.
2419 *
2420 * This is completion handler function for mailbox commands issued from
2421 * lpfc_sli_issue_mbox_wait function. This function is called by the
2422 * mailbox event handler function with no lock held. This function
2423 * will wake up thread waiting on the wait queue pointed by context1
2424 * of the mailbox.
2425 **/
04c68496 2426void
2e0fef85 2427lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e 2428{
858c9f6c 2429 unsigned long drvr_flag;
e29d74f8 2430 struct completion *pmbox_done;
dea3101e
JB
2431
2432 /*
e29d74f8 2433 * If pmbox_done is empty, the driver thread gave up waiting and
dea3101e
JB
2434 * continued running.
2435 */
7054a606 2436 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 2437 spin_lock_irqsave(&phba->hbalock, drvr_flag);
e29d74f8
JS
2438 pmbox_done = (struct completion *)pmboxq->context3;
2439 if (pmbox_done)
2440 complete(pmbox_done);
858c9f6c 2441 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
2442 return;
2443}
2444
b95b2119
JS
2445static void
2446__lpfc_sli_rpi_release(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
2447{
2448 unsigned long iflags;
2449
2450 if (ndlp->nlp_flag & NLP_RELEASE_RPI) {
2451 lpfc_sli4_free_rpi(vport->phba, ndlp->nlp_rpi);
2452 spin_lock_irqsave(&vport->phba->ndlp_lock, iflags);
2453 ndlp->nlp_flag &= ~NLP_RELEASE_RPI;
2454 ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR;
2455 spin_unlock_irqrestore(&vport->phba->ndlp_lock, iflags);
2456 }
2457 ndlp->nlp_flag &= ~NLP_UNREG_INP;
2458}
e59058c4
JS
2459
2460/**
3621a710 2461 * lpfc_sli_def_mbox_cmpl - Default mailbox completion handler
e59058c4
JS
2462 * @phba: Pointer to HBA context object.
2463 * @pmb: Pointer to mailbox object.
2464 *
2465 * This function is the default mailbox completion handler. It
2466 * frees the memory resources associated with the completed mailbox
2467 * command. If the completed command is a REG_LOGIN mailbox command,
2468 * this function will issue a UREG_LOGIN to re-claim the RPI.
2469 **/
dea3101e 2470void
2e0fef85 2471lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e 2472{
d439d286 2473 struct lpfc_vport *vport = pmb->vport;
dea3101e 2474 struct lpfc_dmabuf *mp;
d439d286 2475 struct lpfc_nodelist *ndlp;
5af5eee7 2476 struct Scsi_Host *shost;
04c68496 2477 uint16_t rpi, vpi;
7054a606
JS
2478 int rc;
2479
3e1f0718 2480 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
7054a606 2481
dea3101e
JB
2482 if (mp) {
2483 lpfc_mbuf_free(phba, mp->virt, mp->phys);
2484 kfree(mp);
2485 }
7054a606
JS
2486
2487 /*
2488 * If a REG_LOGIN succeeded after node is destroyed or node
2489 * is in re-discovery driver need to cleanup the RPI.
2490 */
2e0fef85 2491 if (!(phba->pport->load_flag & FC_UNLOADING) &&
04c68496
JS
2492 pmb->u.mb.mbxCommand == MBX_REG_LOGIN64 &&
2493 !pmb->u.mb.mbxStatus) {
2494 rpi = pmb->u.mb.un.varWords[0];
6d368e53 2495 vpi = pmb->u.mb.un.varRegLogin.vpi;
38503943
JS
2496 if (phba->sli_rev == LPFC_SLI_REV4)
2497 vpi -= phba->sli4_hba.max_cfg_param.vpi_base;
04c68496 2498 lpfc_unreg_login(phba, vpi, rpi, pmb);
de96e9c5 2499 pmb->vport = vport;
92d7f7b0 2500 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS
2501 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2502 if (rc != MBX_NOT_FINISHED)
2503 return;
2504 }
2505
695a814e
JS
2506 if ((pmb->u.mb.mbxCommand == MBX_REG_VPI) &&
2507 !(phba->pport->load_flag & FC_UNLOADING) &&
2508 !pmb->u.mb.mbxStatus) {
5af5eee7
JS
2509 shost = lpfc_shost_from_vport(vport);
2510 spin_lock_irq(shost->host_lock);
2511 vport->vpi_state |= LPFC_VPI_REGISTERED;
2512 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI;
2513 spin_unlock_irq(shost->host_lock);
695a814e
JS
2514 }
2515
d439d286 2516 if (pmb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 2517 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
d439d286 2518 lpfc_nlp_put(ndlp);
dea16bda
JS
2519 pmb->ctx_buf = NULL;
2520 pmb->ctx_ndlp = NULL;
2521 }
2522
2523 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2524 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
2525
2526 /* Check to see if there are any deferred events to process */
2527 if (ndlp) {
2528 lpfc_printf_vlog(
2529 vport,
2530 KERN_INFO, LOG_MBOX | LOG_DISCOVERY,
2531 "1438 UNREG cmpl deferred mbox x%x "
32350664 2532 "on NPort x%x Data: x%x x%x %px\n",
dea16bda
JS
2533 ndlp->nlp_rpi, ndlp->nlp_DID,
2534 ndlp->nlp_flag, ndlp->nlp_defer_did, ndlp);
2535
2536 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2537 (ndlp->nlp_defer_did != NLP_EVT_NOTHING_PENDING)) {
00292e03 2538 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2539 ndlp->nlp_defer_did = NLP_EVT_NOTHING_PENDING;
2540 lpfc_issue_els_plogi(vport, ndlp->nlp_DID, 0);
00292e03 2541 } else {
b95b2119 2542 __lpfc_sli_rpi_release(vport, ndlp);
dea16bda 2543 }
97acd001
JS
2544 if (vport->load_flag & FC_UNLOADING)
2545 lpfc_nlp_put(ndlp);
9b164068 2546 pmb->ctx_ndlp = NULL;
dea16bda 2547 }
d439d286
JS
2548 }
2549
dcf2a4e0
JS
2550 /* Check security permission status on INIT_LINK mailbox command */
2551 if ((pmb->u.mb.mbxCommand == MBX_INIT_LINK) &&
2552 (pmb->u.mb.mbxStatus == MBXERR_SEC_NO_PERMISSION))
372c187b 2553 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
dcf2a4e0
JS
2554 "2860 SLI authentication is required "
2555 "for INIT_LINK but has not done yet\n");
2556
04c68496
JS
2557 if (bf_get(lpfc_mqe_command, &pmb->u.mqe) == MBX_SLI4_CONFIG)
2558 lpfc_sli4_mbox_cmd_free(phba, pmb);
2559 else
2560 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2561}
be6bb941
JS
2562 /**
2563 * lpfc_sli4_unreg_rpi_cmpl_clr - mailbox completion handler
2564 * @phba: Pointer to HBA context object.
2565 * @pmb: Pointer to mailbox object.
2566 *
2567 * This function is the unreg rpi mailbox completion handler. It
2568 * frees the memory resources associated with the completed mailbox
2569 * command. An additional refrenece is put on the ndlp to prevent
2570 * lpfc_nlp_release from freeing the rpi bit in the bitmask before
2571 * the unreg mailbox command completes, this routine puts the
2572 * reference back.
2573 *
2574 **/
2575void
2576lpfc_sli4_unreg_rpi_cmpl_clr(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2577{
2578 struct lpfc_vport *vport = pmb->vport;
2579 struct lpfc_nodelist *ndlp;
2580
3e1f0718 2581 ndlp = pmb->ctx_ndlp;
be6bb941
JS
2582 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2583 if (phba->sli_rev == LPFC_SLI_REV4 &&
2584 (bf_get(lpfc_sli_intf_if_type,
27d6ac0a 2585 &phba->sli4_hba.sli_intf) >=
be6bb941
JS
2586 LPFC_SLI_INTF_IF_TYPE_2)) {
2587 if (ndlp) {
dea16bda
JS
2588 lpfc_printf_vlog(
2589 vport, KERN_INFO, LOG_MBOX | LOG_SLI,
2590 "0010 UNREG_LOGIN vpi:%x "
2591 "rpi:%x DID:%x defer x%x flg x%x "
32350664 2592 "map:%x %px\n",
dea16bda
JS
2593 vport->vpi, ndlp->nlp_rpi,
2594 ndlp->nlp_DID, ndlp->nlp_defer_did,
2595 ndlp->nlp_flag,
2596 ndlp->nlp_usg_map, ndlp);
7c5e518c 2597 ndlp->nlp_flag &= ~NLP_LOGO_ACC;
be6bb941 2598 lpfc_nlp_put(ndlp);
dea16bda
JS
2599
2600 /* Check to see if there are any deferred
2601 * events to process
2602 */
2603 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2604 (ndlp->nlp_defer_did !=
2605 NLP_EVT_NOTHING_PENDING)) {
2606 lpfc_printf_vlog(
2607 vport, KERN_INFO, LOG_DISCOVERY,
2608 "4111 UNREG cmpl deferred "
2609 "clr x%x on "
32350664 2610 "NPort x%x Data: x%x x%px\n",
dea16bda
JS
2611 ndlp->nlp_rpi, ndlp->nlp_DID,
2612 ndlp->nlp_defer_did, ndlp);
00292e03 2613 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2614 ndlp->nlp_defer_did =
2615 NLP_EVT_NOTHING_PENDING;
2616 lpfc_issue_els_plogi(
2617 vport, ndlp->nlp_DID, 0);
00292e03 2618 } else {
b95b2119 2619 __lpfc_sli_rpi_release(vport, ndlp);
dea16bda 2620 }
be6bb941
JS
2621 }
2622 }
2623 }
2624
2625 mempool_free(pmb, phba->mbox_mem_pool);
2626}
dea3101e 2627
e59058c4 2628/**
3621a710 2629 * lpfc_sli_handle_mb_event - Handle mailbox completions from firmware
e59058c4
JS
2630 * @phba: Pointer to HBA context object.
2631 *
2632 * This function is called with no lock held. This function processes all
2633 * the completed mailbox commands and gives it to upper layers. The interrupt
2634 * service routine processes mailbox completion interrupt and adds completed
2635 * mailbox commands to the mboxq_cmpl queue and signals the worker thread.
2636 * Worker thread call lpfc_sli_handle_mb_event, which will return the
2637 * completed mailbox commands in mboxq_cmpl queue to the upper layers. This
2638 * function returns the mailbox commands to the upper layer by calling the
2639 * completion handler function of each mailbox.
2640 **/
dea3101e 2641int
2e0fef85 2642lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 2643{
92d7f7b0 2644 MAILBOX_t *pmbox;
dea3101e 2645 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS
2646 int rc;
2647 LIST_HEAD(cmplq);
dea3101e
JB
2648
2649 phba->sli.slistat.mbox_event++;
2650
92d7f7b0
JS
2651 /* Get all completed mailboxe buffers into the cmplq */
2652 spin_lock_irq(&phba->hbalock);
2653 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
2654 spin_unlock_irq(&phba->hbalock);
dea3101e 2655
92d7f7b0
JS
2656 /* Get a Mailbox buffer to setup mailbox commands for callback */
2657 do {
2658 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
2659 if (pmb == NULL)
2660 break;
2e0fef85 2661
04c68496 2662 pmbox = &pmb->u.mb;
dea3101e 2663
858c9f6c
JS
2664 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
2665 if (pmb->vport) {
2666 lpfc_debugfs_disc_trc(pmb->vport,
2667 LPFC_DISC_TRC_MBOX_VPORT,
2668 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
2669 (uint32_t)pmbox->mbxCommand,
2670 pmbox->un.varWords[0],
2671 pmbox->un.varWords[1]);
2672 }
2673 else {
2674 lpfc_debugfs_disc_trc(phba->pport,
2675 LPFC_DISC_TRC_MBOX,
2676 "MBOX cmpl: cmd:x%x mb:x%x x%x",
2677 (uint32_t)pmbox->mbxCommand,
2678 pmbox->un.varWords[0],
2679 pmbox->un.varWords[1]);
2680 }
2681 }
2682
dea3101e
JB
2683 /*
2684 * It is a fatal error if unknown mbox command completion.
2685 */
2686 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
2687 MBX_SHUTDOWN) {
af901ca1 2688 /* Unknown mailbox command compl */
372c187b 2689 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 2690 "(%d):0323 Unknown Mailbox command "
a183a15f 2691 "x%x (x%x/x%x) Cmpl\n",
43bfea1b
JS
2692 pmb->vport ? pmb->vport->vpi :
2693 LPFC_VPORT_UNKNOWN,
04c68496 2694 pmbox->mbxCommand,
a183a15f
JS
2695 lpfc_sli_config_mbox_subsys_get(phba,
2696 pmb),
2697 lpfc_sli_config_mbox_opcode_get(phba,
2698 pmb));
2e0fef85 2699 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
2700 phba->work_hs = HS_FFER3;
2701 lpfc_handle_eratt(phba);
92d7f7b0 2702 continue;
dea3101e
JB
2703 }
2704
dea3101e
JB
2705 if (pmbox->mbxStatus) {
2706 phba->sli.slistat.mbox_stat_err++;
2707 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
2708 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0 2709 lpfc_printf_log(phba, KERN_INFO,
a183a15f
JS
2710 LOG_MBOX | LOG_SLI,
2711 "(%d):0305 Mbox cmd cmpl "
2712 "error - RETRYing Data: x%x "
2713 "(x%x/x%x) x%x x%x x%x\n",
43bfea1b
JS
2714 pmb->vport ? pmb->vport->vpi :
2715 LPFC_VPORT_UNKNOWN,
a183a15f
JS
2716 pmbox->mbxCommand,
2717 lpfc_sli_config_mbox_subsys_get(phba,
2718 pmb),
2719 lpfc_sli_config_mbox_opcode_get(phba,
2720 pmb),
2721 pmbox->mbxStatus,
2722 pmbox->un.varWords[0],
43bfea1b
JS
2723 pmb->vport ? pmb->vport->port_state :
2724 LPFC_VPORT_UNKNOWN);
dea3101e
JB
2725 pmbox->mbxStatus = 0;
2726 pmbox->mbxOwner = OWN_HOST;
dea3101e 2727 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
04c68496 2728 if (rc != MBX_NOT_FINISHED)
92d7f7b0 2729 continue;
dea3101e
JB
2730 }
2731 }
2732
2733 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 2734 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
2d44d165 2735 "(%d):0307 Mailbox cmd x%x (x%x/x%x) Cmpl %ps "
e74c03c8
JS
2736 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
2737 "x%x x%x x%x\n",
92d7f7b0 2738 pmb->vport ? pmb->vport->vpi : 0,
dea3101e 2739 pmbox->mbxCommand,
a183a15f
JS
2740 lpfc_sli_config_mbox_subsys_get(phba, pmb),
2741 lpfc_sli_config_mbox_opcode_get(phba, pmb),
dea3101e
JB
2742 pmb->mbox_cmpl,
2743 *((uint32_t *) pmbox),
2744 pmbox->un.varWords[0],
2745 pmbox->un.varWords[1],
2746 pmbox->un.varWords[2],
2747 pmbox->un.varWords[3],
2748 pmbox->un.varWords[4],
2749 pmbox->un.varWords[5],
2750 pmbox->un.varWords[6],
e74c03c8
JS
2751 pmbox->un.varWords[7],
2752 pmbox->un.varWords[8],
2753 pmbox->un.varWords[9],
2754 pmbox->un.varWords[10]);
dea3101e 2755
92d7f7b0 2756 if (pmb->mbox_cmpl)
dea3101e 2757 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS
2758 } while (1);
2759 return 0;
2760}
dea3101e 2761
e59058c4 2762/**
3621a710 2763 * lpfc_sli_get_buff - Get the buffer associated with the buffer tag
e59058c4
JS
2764 * @phba: Pointer to HBA context object.
2765 * @pring: Pointer to driver SLI ring object.
2766 * @tag: buffer tag.
2767 *
2768 * This function is called with no lock held. When QUE_BUFTAG_BIT bit
2769 * is set in the tag the buffer is posted for a particular exchange,
2770 * the function will return the buffer without replacing the buffer.
2771 * If the buffer is for unsolicited ELS or CT traffic, this function
2772 * returns the buffer and also posts another buffer to the firmware.
2773 **/
76bb24ef
JS
2774static struct lpfc_dmabuf *
2775lpfc_sli_get_buff(struct lpfc_hba *phba,
9f1e1b50
JS
2776 struct lpfc_sli_ring *pring,
2777 uint32_t tag)
76bb24ef 2778{
9f1e1b50
JS
2779 struct hbq_dmabuf *hbq_entry;
2780
76bb24ef
JS
2781 if (tag & QUE_BUFTAG_BIT)
2782 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
9f1e1b50
JS
2783 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
2784 if (!hbq_entry)
2785 return NULL;
2786 return &hbq_entry->dbuf;
76bb24ef 2787}
57127f15 2788
3a8070c5
JS
2789/**
2790 * lpfc_nvme_unsol_ls_handler - Process an unsolicited event data buffer
2791 * containing a NVME LS request.
2792 * @phba: pointer to lpfc hba data structure.
2793 * @piocb: pointer to the iocbq struct representing the sequence starting
2794 * frame.
2795 *
2796 * This routine initially validates the NVME LS, validates there is a login
2797 * with the port that sent the LS, and then calls the appropriate nvme host
2798 * or target LS request handler.
2799 **/
2800static void
2801lpfc_nvme_unsol_ls_handler(struct lpfc_hba *phba, struct lpfc_iocbq *piocb)
2802{
2803 struct lpfc_nodelist *ndlp;
2804 struct lpfc_dmabuf *d_buf;
2805 struct hbq_dmabuf *nvmebuf;
2806 struct fc_frame_header *fc_hdr;
2807 struct lpfc_async_xchg_ctx *axchg = NULL;
2808 char *failwhy = NULL;
2809 uint32_t oxid, sid, did, fctl, size;
4e57e0b9 2810 int ret = 1;
3a8070c5
JS
2811
2812 d_buf = piocb->context2;
2813
2814 nvmebuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
2815 fc_hdr = nvmebuf->hbuf.virt;
2816 oxid = be16_to_cpu(fc_hdr->fh_ox_id);
2817 sid = sli4_sid_from_fc_hdr(fc_hdr);
2818 did = sli4_did_from_fc_hdr(fc_hdr);
2819 fctl = (fc_hdr->fh_f_ctl[0] << 16 |
2820 fc_hdr->fh_f_ctl[1] << 8 |
2821 fc_hdr->fh_f_ctl[2]);
2822 size = bf_get(lpfc_rcqe_length, &nvmebuf->cq_event.cqe.rcqe_cmpl);
2823
2824 lpfc_nvmeio_data(phba, "NVME LS RCV: xri x%x sz %d from %06x\n",
2825 oxid, size, sid);
2826
2827 if (phba->pport->load_flag & FC_UNLOADING) {
2828 failwhy = "Driver Unloading";
2829 } else if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
2830 failwhy = "NVME FC4 Disabled";
2831 } else if (!phba->nvmet_support && !phba->pport->localport) {
2832 failwhy = "No Localport";
2833 } else if (phba->nvmet_support && !phba->targetport) {
2834 failwhy = "No Targetport";
2835 } else if (unlikely(fc_hdr->fh_r_ctl != FC_RCTL_ELS4_REQ)) {
2836 failwhy = "Bad NVME LS R_CTL";
2837 } else if (unlikely((fctl & 0x00FF0000) !=
2838 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT))) {
2839 failwhy = "Bad NVME LS F_CTL";
2840 } else {
2841 axchg = kzalloc(sizeof(*axchg), GFP_ATOMIC);
2842 if (!axchg)
2843 failwhy = "No CTX memory";
2844 }
2845
2846 if (unlikely(failwhy)) {
372c187b 2847 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3a8070c5
JS
2848 "6154 Drop NVME LS: SID %06X OXID x%X: %s\n",
2849 sid, oxid, failwhy);
2850 goto out_fail;
2851 }
2852
2853 /* validate the source of the LS is logged in */
2854 ndlp = lpfc_findnode_did(phba->pport, sid);
2855 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp) ||
2856 ((ndlp->nlp_state != NLP_STE_UNMAPPED_NODE) &&
2857 (ndlp->nlp_state != NLP_STE_MAPPED_NODE))) {
2858 lpfc_printf_log(phba, KERN_ERR, LOG_NVME_DISC,
2859 "6216 NVME Unsol rcv: No ndlp: "
2860 "NPort_ID x%x oxid x%x\n",
2861 sid, oxid);
2862 goto out_fail;
2863 }
2864
2865 axchg->phba = phba;
2866 axchg->ndlp = ndlp;
2867 axchg->size = size;
2868 axchg->oxid = oxid;
2869 axchg->sid = sid;
2870 axchg->wqeq = NULL;
2871 axchg->state = LPFC_NVME_STE_LS_RCV;
2872 axchg->entry_cnt = 1;
2873 axchg->rqb_buffer = (void *)nvmebuf;
2874 axchg->hdwq = &phba->sli4_hba.hdwq[0];
2875 axchg->payload = nvmebuf->dbuf.virt;
2876 INIT_LIST_HEAD(&axchg->list);
2877
2878 if (phba->nvmet_support)
2879 ret = lpfc_nvmet_handle_lsreq(phba, axchg);
2880 else
2881 ret = lpfc_nvme_handle_lsreq(phba, axchg);
2882
2883 /* if zero, LS was successfully handled. If non-zero, LS not handled */
2884 if (!ret)
2885 return;
2886
372c187b 2887 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3a8070c5
JS
2888 "6155 Drop NVME LS from DID %06X: SID %06X OXID x%X "
2889 "NVMe%s handler failed %d\n",
2890 did, sid, oxid,
2891 (phba->nvmet_support) ? "T" : "I", ret);
2892
2893out_fail:
3a8070c5
JS
2894
2895 /* recycle receive buffer */
2896 lpfc_in_buf_free(phba, &nvmebuf->dbuf);
2897
2898 /* If start of new exchange, abort it */
4e57e0b9
JS
2899 if (axchg && (fctl & FC_FC_FIRST_SEQ && !(fctl & FC_FC_EX_CTX)))
2900 ret = lpfc_nvme_unsol_ls_issue_abort(phba, axchg, sid, oxid);
2901
2902 if (ret)
2903 kfree(axchg);
3a8070c5
JS
2904}
2905
3772a991
JS
2906/**
2907 * lpfc_complete_unsol_iocb - Complete an unsolicited sequence
2908 * @phba: Pointer to HBA context object.
2909 * @pring: Pointer to driver SLI ring object.
2910 * @saveq: Pointer to the iocbq struct representing the sequence starting frame.
2911 * @fch_r_ctl: the r_ctl for the first frame of the sequence.
2912 * @fch_type: the type for the first frame of the sequence.
2913 *
2914 * This function is called with no lock held. This function uses the r_ctl and
2915 * type of the received sequence to find the correct callback function to call
2916 * to process the sequence.
2917 **/
2918static int
2919lpfc_complete_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2920 struct lpfc_iocbq *saveq, uint32_t fch_r_ctl,
2921 uint32_t fch_type)
2922{
2923 int i;
2924
f358dd0c
JS
2925 switch (fch_type) {
2926 case FC_TYPE_NVME:
3a8070c5 2927 lpfc_nvme_unsol_ls_handler(phba, saveq);
f358dd0c
JS
2928 return 1;
2929 default:
2930 break;
2931 }
2932
3772a991
JS
2933 /* unSolicited Responses */
2934 if (pring->prt[0].profile) {
2935 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
2936 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
2937 saveq);
2938 return 1;
2939 }
2940 /* We must search, based on rctl / type
2941 for the right routine */
2942 for (i = 0; i < pring->num_mask; i++) {
2943 if ((pring->prt[i].rctl == fch_r_ctl) &&
2944 (pring->prt[i].type == fch_type)) {
2945 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
2946 (pring->prt[i].lpfc_sli_rcv_unsol_event)
2947 (phba, pring, saveq);
2948 return 1;
2949 }
2950 }
2951 return 0;
2952}
e59058c4
JS
2953
2954/**
3621a710 2955 * lpfc_sli_process_unsol_iocb - Unsolicited iocb handler
e59058c4
JS
2956 * @phba: Pointer to HBA context object.
2957 * @pring: Pointer to driver SLI ring object.
2958 * @saveq: Pointer to the unsolicited iocb.
2959 *
2960 * This function is called with no lock held by the ring event handler
2961 * when there is an unsolicited iocb posted to the response ring by the
2962 * firmware. This function gets the buffer associated with the iocbs
2963 * and calls the event handler for the ring. This function handles both
2964 * qring buffers and hbq buffers.
2965 * When the function returns 1 the caller can free the iocb object otherwise
2966 * upper layer functions will free the iocb objects.
2967 **/
dea3101e
JB
2968static int
2969lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2970 struct lpfc_iocbq *saveq)
2971{
2972 IOCB_t * irsp;
2973 WORD5 * w5p;
2974 uint32_t Rctl, Type;
76bb24ef 2975 struct lpfc_iocbq *iocbq;
3163f725 2976 struct lpfc_dmabuf *dmzbuf;
dea3101e 2977
dea3101e 2978 irsp = &(saveq->iocb);
57127f15
JS
2979
2980 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
2981 if (pring->lpfc_sli_rcv_async_status)
2982 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
2983 else
2984 lpfc_printf_log(phba,
2985 KERN_WARNING,
2986 LOG_SLI,
2987 "0316 Ring %d handler: unexpected "
2988 "ASYNC_STATUS iocb received evt_code "
2989 "0x%x\n",
2990 pring->ringno,
2991 irsp->un.asyncstat.evt_code);
2992 return 1;
2993 }
2994
3163f725
JS
2995 if ((irsp->ulpCommand == CMD_IOCB_RET_XRI64_CX) &&
2996 (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)) {
2997 if (irsp->ulpBdeCount > 0) {
2998 dmzbuf = lpfc_sli_get_buff(phba, pring,
2999 irsp->un.ulpWord[3]);
3000 lpfc_in_buf_free(phba, dmzbuf);
3001 }
3002
3003 if (irsp->ulpBdeCount > 1) {
3004 dmzbuf = lpfc_sli_get_buff(phba, pring,
3005 irsp->unsli3.sli3Words[3]);
3006 lpfc_in_buf_free(phba, dmzbuf);
3007 }
3008
3009 if (irsp->ulpBdeCount > 2) {
3010 dmzbuf = lpfc_sli_get_buff(phba, pring,
3011 irsp->unsli3.sli3Words[7]);
3012 lpfc_in_buf_free(phba, dmzbuf);
3013 }
3014
3015 return 1;
3016 }
3017
92d7f7b0 3018 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS
3019 if (irsp->ulpBdeCount != 0) {
3020 saveq->context2 = lpfc_sli_get_buff(phba, pring,
3021 irsp->un.ulpWord[3]);
3022 if (!saveq->context2)
3023 lpfc_printf_log(phba,
3024 KERN_ERR,
3025 LOG_SLI,
3026 "0341 Ring %d Cannot find buffer for "
3027 "an unsolicited iocb. tag 0x%x\n",
3028 pring->ringno,
3029 irsp->un.ulpWord[3]);
76bb24ef
JS
3030 }
3031 if (irsp->ulpBdeCount == 2) {
3032 saveq->context3 = lpfc_sli_get_buff(phba, pring,
3033 irsp->unsli3.sli3Words[7]);
3034 if (!saveq->context3)
3035 lpfc_printf_log(phba,
3036 KERN_ERR,
3037 LOG_SLI,
3038 "0342 Ring %d Cannot find buffer for an"
3039 " unsolicited iocb. tag 0x%x\n",
3040 pring->ringno,
3041 irsp->unsli3.sli3Words[7]);
3042 }
3043 list_for_each_entry(iocbq, &saveq->list, list) {
76bb24ef 3044 irsp = &(iocbq->iocb);
76bb24ef
JS
3045 if (irsp->ulpBdeCount != 0) {
3046 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
3047 irsp->un.ulpWord[3]);
9c2face6 3048 if (!iocbq->context2)
76bb24ef
JS
3049 lpfc_printf_log(phba,
3050 KERN_ERR,
3051 LOG_SLI,
3052 "0343 Ring %d Cannot find "
3053 "buffer for an unsolicited iocb"
3054 ". tag 0x%x\n", pring->ringno,
92d7f7b0 3055 irsp->un.ulpWord[3]);
76bb24ef
JS
3056 }
3057 if (irsp->ulpBdeCount == 2) {
3058 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 3059 irsp->unsli3.sli3Words[7]);
9c2face6 3060 if (!iocbq->context3)
76bb24ef
JS
3061 lpfc_printf_log(phba,
3062 KERN_ERR,
3063 LOG_SLI,
3064 "0344 Ring %d Cannot find "
3065 "buffer for an unsolicited "
3066 "iocb. tag 0x%x\n",
3067 pring->ringno,
3068 irsp->unsli3.sli3Words[7]);
3069 }
3070 }
92d7f7b0 3071 }
9c2face6
JS
3072 if (irsp->ulpBdeCount != 0 &&
3073 (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
3074 irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
3075 int found = 0;
3076
3077 /* search continue save q for same XRI */
3078 list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
7851fe2c
JS
3079 if (iocbq->iocb.unsli3.rcvsli3.ox_id ==
3080 saveq->iocb.unsli3.rcvsli3.ox_id) {
9c2face6
JS
3081 list_add_tail(&saveq->list, &iocbq->list);
3082 found = 1;
3083 break;
3084 }
3085 }
3086 if (!found)
3087 list_add_tail(&saveq->clist,
3088 &pring->iocb_continue_saveq);
3089 if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
3090 list_del_init(&iocbq->clist);
3091 saveq = iocbq;
3092 irsp = &(saveq->iocb);
3093 } else
3094 return 0;
3095 }
3096 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
3097 (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
3098 (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
6a9c52cf
JS
3099 Rctl = FC_RCTL_ELS_REQ;
3100 Type = FC_TYPE_ELS;
9c2face6
JS
3101 } else {
3102 w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
3103 Rctl = w5p->hcsw.Rctl;
3104 Type = w5p->hcsw.Type;
3105
3106 /* Firmware Workaround */
3107 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
3108 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
3109 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
6a9c52cf
JS
3110 Rctl = FC_RCTL_ELS_REQ;
3111 Type = FC_TYPE_ELS;
9c2face6
JS
3112 w5p->hcsw.Rctl = Rctl;
3113 w5p->hcsw.Type = Type;
3114 }
3115 }
92d7f7b0 3116
3772a991 3117 if (!lpfc_complete_unsol_iocb(phba, pring, saveq, Rctl, Type))
92d7f7b0 3118 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3119 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 3120 "Type x%x received\n",
e8b62011 3121 pring->ringno, Rctl, Type);
3772a991 3122
92d7f7b0 3123 return 1;
dea3101e
JB
3124}
3125
e59058c4 3126/**
3621a710 3127 * lpfc_sli_iocbq_lookup - Find command iocb for the given response iocb
e59058c4
JS
3128 * @phba: Pointer to HBA context object.
3129 * @pring: Pointer to driver SLI ring object.
3130 * @prspiocb: Pointer to response iocb object.
3131 *
3132 * This function looks up the iocb_lookup table to get the command iocb
3133 * corresponding to the given response iocb using the iotag of the
e2a8be56
JS
3134 * response iocb. The driver calls this function with the hbalock held
3135 * for SLI3 ports or the ring lock held for SLI4 ports.
e59058c4
JS
3136 * This function returns the command iocb object if it finds the command
3137 * iocb else returns NULL.
3138 **/
dea3101e 3139static struct lpfc_iocbq *
2e0fef85
JS
3140lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
3141 struct lpfc_sli_ring *pring,
3142 struct lpfc_iocbq *prspiocb)
dea3101e 3143{
dea3101e
JB
3144 struct lpfc_iocbq *cmd_iocb = NULL;
3145 uint16_t iotag;
e2a8be56
JS
3146 spinlock_t *temp_lock = NULL;
3147 unsigned long iflag = 0;
3148
3149 if (phba->sli_rev == LPFC_SLI_REV4)
3150 temp_lock = &pring->ring_lock;
3151 else
3152 temp_lock = &phba->hbalock;
dea3101e 3153
e2a8be56 3154 spin_lock_irqsave(temp_lock, iflag);
604a3e30
JB
3155 iotag = prspiocb->iocb.ulpIoTag;
3156
3157 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3158 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6 3159 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
89533e9b
JS
3160 /* remove from txcmpl queue list */
3161 list_del_init(&cmd_iocb->list);
4f2e66c6 3162 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
c490850a 3163 pring->txcmplq_cnt--;
e2a8be56 3164 spin_unlock_irqrestore(temp_lock, iflag);
89533e9b 3165 return cmd_iocb;
2a9bf3d0 3166 }
dea3101e
JB
3167 }
3168
e2a8be56 3169 spin_unlock_irqrestore(temp_lock, iflag);
372c187b 3170 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
89533e9b 3171 "0317 iotag x%x is out of "
604a3e30 3172 "range: max iotag x%x wd0 x%x\n",
e8b62011 3173 iotag, phba->sli.last_iotag,
604a3e30 3174 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB
3175 return NULL;
3176}
3177
3772a991
JS
3178/**
3179 * lpfc_sli_iocbq_lookup_by_tag - Find command iocb for the iotag
3180 * @phba: Pointer to HBA context object.
3181 * @pring: Pointer to driver SLI ring object.
3182 * @iotag: IOCB tag.
3183 *
3184 * This function looks up the iocb_lookup table to get the command iocb
e2a8be56
JS
3185 * corresponding to the given iotag. The driver calls this function with
3186 * the ring lock held because this function is an SLI4 port only helper.
3772a991
JS
3187 * This function returns the command iocb object if it finds the command
3188 * iocb else returns NULL.
3189 **/
3190static struct lpfc_iocbq *
3191lpfc_sli_iocbq_lookup_by_tag(struct lpfc_hba *phba,
3192 struct lpfc_sli_ring *pring, uint16_t iotag)
3193{
895427bd 3194 struct lpfc_iocbq *cmd_iocb = NULL;
e2a8be56
JS
3195 spinlock_t *temp_lock = NULL;
3196 unsigned long iflag = 0;
3772a991 3197
e2a8be56
JS
3198 if (phba->sli_rev == LPFC_SLI_REV4)
3199 temp_lock = &pring->ring_lock;
3200 else
3201 temp_lock = &phba->hbalock;
3202
3203 spin_lock_irqsave(temp_lock, iflag);
3772a991
JS
3204 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3205 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6
JS
3206 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
3207 /* remove from txcmpl queue list */
3208 list_del_init(&cmd_iocb->list);
3209 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
c490850a 3210 pring->txcmplq_cnt--;
e2a8be56 3211 spin_unlock_irqrestore(temp_lock, iflag);
4f2e66c6 3212 return cmd_iocb;
2a9bf3d0 3213 }
3772a991 3214 }
89533e9b 3215
e2a8be56 3216 spin_unlock_irqrestore(temp_lock, iflag);
372c187b 3217 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
895427bd
JS
3218 "0372 iotag x%x lookup error: max iotag (x%x) "
3219 "iocb_flag x%x\n",
3220 iotag, phba->sli.last_iotag,
3221 cmd_iocb ? cmd_iocb->iocb_flag : 0xffff);
3772a991
JS
3222 return NULL;
3223}
3224
e59058c4 3225/**
3621a710 3226 * lpfc_sli_process_sol_iocb - process solicited iocb completion
e59058c4
JS
3227 * @phba: Pointer to HBA context object.
3228 * @pring: Pointer to driver SLI ring object.
3229 * @saveq: Pointer to the response iocb to be processed.
3230 *
3231 * This function is called by the ring event handler for non-fcp
3232 * rings when there is a new response iocb in the response ring.
3233 * The caller is not required to hold any locks. This function
3234 * gets the command iocb associated with the response iocb and
3235 * calls the completion handler for the command iocb. If there
3236 * is no completion handler, the function will free the resources
3237 * associated with command iocb. If the response iocb is for
3238 * an already aborted command iocb, the status of the completion
3239 * is changed to IOSTAT_LOCAL_REJECT/IOERR_SLI_ABORTED.
3240 * This function always returns 1.
3241 **/
dea3101e 3242static int
2e0fef85 3243lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB
3244 struct lpfc_iocbq *saveq)
3245{
2e0fef85 3246 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB
3247 int rc = 1;
3248 unsigned long iflag;
3249
604a3e30 3250 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
dea3101e
JB
3251 if (cmdiocbp) {
3252 if (cmdiocbp->iocb_cmpl) {
ea2151b4
JS
3253 /*
3254 * If an ELS command failed send an event to mgmt
3255 * application.
3256 */
3257 if (saveq->iocb.ulpStatus &&
3258 (pring->ringno == LPFC_ELS_RING) &&
3259 (cmdiocbp->iocb.ulpCommand ==
3260 CMD_ELS_REQUEST64_CR))
3261 lpfc_send_els_failure_event(phba,
3262 cmdiocbp, saveq);
3263
dea3101e
JB
3264 /*
3265 * Post all ELS completions to the worker thread.
3266 * All other are passed to the completion callback.
3267 */
3268 if (pring->ringno == LPFC_ELS_RING) {
341af102
JS
3269 if ((phba->sli_rev < LPFC_SLI_REV4) &&
3270 (cmdiocbp->iocb_flag &
3271 LPFC_DRIVER_ABORTED)) {
3272 spin_lock_irqsave(&phba->hbalock,
3273 iflag);
07951076
JS
3274 cmdiocbp->iocb_flag &=
3275 ~LPFC_DRIVER_ABORTED;
341af102
JS
3276 spin_unlock_irqrestore(&phba->hbalock,
3277 iflag);
07951076
JS
3278 saveq->iocb.ulpStatus =
3279 IOSTAT_LOCAL_REJECT;
3280 saveq->iocb.un.ulpWord[4] =
3281 IOERR_SLI_ABORTED;
0ff10d46
JS
3282
3283 /* Firmware could still be in progress
3284 * of DMAing payload, so don't free data
3285 * buffer till after a hbeat.
3286 */
341af102
JS
3287 spin_lock_irqsave(&phba->hbalock,
3288 iflag);
0ff10d46 3289 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
341af102
JS
3290 spin_unlock_irqrestore(&phba->hbalock,
3291 iflag);
3292 }
0f65ff68
JS
3293 if (phba->sli_rev == LPFC_SLI_REV4) {
3294 if (saveq->iocb_flag &
3295 LPFC_EXCHANGE_BUSY) {
3296 /* Set cmdiocb flag for the
3297 * exchange busy so sgl (xri)
3298 * will not be released until
3299 * the abort xri is received
3300 * from hba.
3301 */
3302 spin_lock_irqsave(
3303 &phba->hbalock, iflag);
3304 cmdiocbp->iocb_flag |=
3305 LPFC_EXCHANGE_BUSY;
3306 spin_unlock_irqrestore(
3307 &phba->hbalock, iflag);
3308 }
3309 if (cmdiocbp->iocb_flag &
3310 LPFC_DRIVER_ABORTED) {
3311 /*
3312 * Clear LPFC_DRIVER_ABORTED
3313 * bit in case it was driver
3314 * initiated abort.
3315 */
3316 spin_lock_irqsave(
3317 &phba->hbalock, iflag);
3318 cmdiocbp->iocb_flag &=
3319 ~LPFC_DRIVER_ABORTED;
3320 spin_unlock_irqrestore(
3321 &phba->hbalock, iflag);
3322 cmdiocbp->iocb.ulpStatus =
3323 IOSTAT_LOCAL_REJECT;
3324 cmdiocbp->iocb.un.ulpWord[4] =
3325 IOERR_ABORT_REQUESTED;
3326 /*
3327 * For SLI4, irsiocb contains
3328 * NO_XRI in sli_xritag, it
3329 * shall not affect releasing
3330 * sgl (xri) process.
3331 */
3332 saveq->iocb.ulpStatus =
3333 IOSTAT_LOCAL_REJECT;
3334 saveq->iocb.un.ulpWord[4] =
3335 IOERR_SLI_ABORTED;
3336 spin_lock_irqsave(
3337 &phba->hbalock, iflag);
3338 saveq->iocb_flag |=
3339 LPFC_DELAY_MEM_FREE;
3340 spin_unlock_irqrestore(
3341 &phba->hbalock, iflag);
3342 }
07951076 3343 }
dea3101e 3344 }
2e0fef85 3345 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB
3346 } else
3347 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB
3348 } else {
3349 /*
3350 * Unknown initiating command based on the response iotag.
3351 * This could be the case on the ELS ring because of
3352 * lpfc_els_abort().
3353 */
3354 if (pring->ringno != LPFC_ELS_RING) {
3355 /*
3356 * Ring <ringno> handler: unexpected completion IoTag
3357 * <IoTag>
3358 */
a257bf90 3359 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
3360 "0322 Ring %d handler: "
3361 "unexpected completion IoTag x%x "
3362 "Data: x%x x%x x%x x%x\n",
3363 pring->ringno,
3364 saveq->iocb.ulpIoTag,
3365 saveq->iocb.ulpStatus,
3366 saveq->iocb.un.ulpWord[4],
3367 saveq->iocb.ulpCommand,
3368 saveq->iocb.ulpContext);
dea3101e
JB
3369 }
3370 }
68876920 3371
dea3101e
JB
3372 return rc;
3373}
3374
e59058c4 3375/**
3621a710 3376 * lpfc_sli_rsp_pointers_error - Response ring pointer error handler
e59058c4
JS
3377 * @phba: Pointer to HBA context object.
3378 * @pring: Pointer to driver SLI ring object.
3379 *
3380 * This function is called from the iocb ring event handlers when
3381 * put pointer is ahead of the get pointer for a ring. This function signal
3382 * an error attention condition to the worker thread and the worker
3383 * thread will transition the HBA to offline state.
3384 **/
2e0fef85
JS
3385static void
3386lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 3387{
34b02dcd 3388 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
875fbdfe 3389 /*
025dfdaf 3390 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
875fbdfe
JSEC
3391 * rsp ring <portRspMax>
3392 */
372c187b 3393 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 3394 "0312 Ring %d handler: portRspPut %d "
025dfdaf 3395 "is bigger than rsp ring %d\n",
e8b62011 3396 pring->ringno, le32_to_cpu(pgp->rspPutInx),
7e56aa25 3397 pring->sli.sli3.numRiocb);
875fbdfe 3398
2e0fef85 3399 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC
3400
3401 /*
3402 * All error attention handlers are posted to
3403 * worker thread
3404 */
3405 phba->work_ha |= HA_ERATT;
3406 phba->work_hs = HS_FFER3;
92d7f7b0 3407
5e9d9b82 3408 lpfc_worker_wake_up(phba);
875fbdfe
JSEC
3409
3410 return;
3411}
3412
9399627f 3413/**
3621a710 3414 * lpfc_poll_eratt - Error attention polling timer timeout handler
7af29d45 3415 * @t: Context to fetch pointer to address of HBA context object from.
9399627f
JS
3416 *
3417 * This function is invoked by the Error Attention polling timer when the
3418 * timer times out. It will check the SLI Error Attention register for
3419 * possible attention events. If so, it will post an Error Attention event
3420 * and wake up worker thread to process it. Otherwise, it will set up the
3421 * Error Attention polling timer for the next poll.
3422 **/
f22eb4d3 3423void lpfc_poll_eratt(struct timer_list *t)
9399627f
JS
3424{
3425 struct lpfc_hba *phba;
eb016566 3426 uint32_t eratt = 0;
aa6fbb75 3427 uint64_t sli_intr, cnt;
9399627f 3428
f22eb4d3 3429 phba = from_timer(phba, t, eratt_poll);
9399627f 3430
aa6fbb75
JS
3431 /* Here we will also keep track of interrupts per sec of the hba */
3432 sli_intr = phba->sli.slistat.sli_intr;
3433
3434 if (phba->sli.slistat.sli_prev_intr > sli_intr)
3435 cnt = (((uint64_t)(-1) - phba->sli.slistat.sli_prev_intr) +
3436 sli_intr);
3437 else
3438 cnt = (sli_intr - phba->sli.slistat.sli_prev_intr);
3439
65791f1f
JS
3440 /* 64-bit integer division not supported on 32-bit x86 - use do_div */
3441 do_div(cnt, phba->eratt_poll_interval);
aa6fbb75
JS
3442 phba->sli.slistat.sli_ips = cnt;
3443
3444 phba->sli.slistat.sli_prev_intr = sli_intr;
3445
9399627f
JS
3446 /* Check chip HA register for error event */
3447 eratt = lpfc_sli_check_eratt(phba);
3448
3449 if (eratt)
3450 /* Tell the worker thread there is work to do */
3451 lpfc_worker_wake_up(phba);
3452 else
3453 /* Restart the timer for next eratt poll */
256ec0d0
JS
3454 mod_timer(&phba->eratt_poll,
3455 jiffies +
65791f1f 3456 msecs_to_jiffies(1000 * phba->eratt_poll_interval));
9399627f
JS
3457 return;
3458}
3459
875fbdfe 3460
e59058c4 3461/**
3621a710 3462 * lpfc_sli_handle_fast_ring_event - Handle ring events on FCP ring
e59058c4
JS
3463 * @phba: Pointer to HBA context object.
3464 * @pring: Pointer to driver SLI ring object.
3465 * @mask: Host attention register mask for this ring.
3466 *
3467 * This function is called from the interrupt context when there is a ring
3468 * event for the fcp ring. The caller does not hold any lock.
3469 * The function processes each response iocb in the response ring until it
25985edc 3470 * finds an iocb with LE bit set and chains all the iocbs up to the iocb with
e59058c4
JS
3471 * LE bit set. The function will call the completion handler of the command iocb
3472 * if the response iocb indicates a completion for a command iocb or it is
3473 * an abort completion. The function will call lpfc_sli_process_unsol_iocb
3474 * function if this is an unsolicited iocb.
dea3101e 3475 * This routine presumes LPFC_FCP_RING handling and doesn't bother
45ed1190
JS
3476 * to check it explicitly.
3477 */
3478int
2e0fef85
JS
3479lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
3480 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3481{
34b02dcd 3482 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
dea3101e 3483 IOCB_t *irsp = NULL;
87f6eaff 3484 IOCB_t *entry = NULL;
dea3101e
JB
3485 struct lpfc_iocbq *cmdiocbq = NULL;
3486 struct lpfc_iocbq rspiocbq;
dea3101e
JB
3487 uint32_t status;
3488 uint32_t portRspPut, portRspMax;
3489 int rc = 1;
3490 lpfc_iocb_type type;
3491 unsigned long iflag;
3492 uint32_t rsp_cmpl = 0;
dea3101e 3493
2e0fef85 3494 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3495 pring->stats.iocb_event++;
3496
dea3101e
JB
3497 /*
3498 * The next available response entry should never exceed the maximum
3499 * entries. If it does, treat it as an adapter hardware error.
3500 */
7e56aa25 3501 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3502 portRspPut = le32_to_cpu(pgp->rspPutInx);
3503 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 3504 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 3505 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3506 return 1;
3507 }
45ed1190
JS
3508 if (phba->fcp_ring_in_use) {
3509 spin_unlock_irqrestore(&phba->hbalock, iflag);
3510 return 1;
3511 } else
3512 phba->fcp_ring_in_use = 1;
dea3101e
JB
3513
3514 rmb();
7e56aa25 3515 while (pring->sli.sli3.rspidx != portRspPut) {
87f6eaff
JSEC
3516 /*
3517 * Fetch an entry off the ring and copy it into a local data
3518 * structure. The copy involves a byte-swap since the
3519 * network byte order and pci byte orders are different.
3520 */
ed957684 3521 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 3522 phba->last_completion_time = jiffies;
875fbdfe 3523
7e56aa25
JS
3524 if (++pring->sli.sli3.rspidx >= portRspMax)
3525 pring->sli.sli3.rspidx = 0;
875fbdfe 3526
87f6eaff
JSEC
3527 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
3528 (uint32_t *) &rspiocbq.iocb,
ed957684 3529 phba->iocb_rsp_size);
a4bc3379 3530 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC
3531 irsp = &rspiocbq.iocb;
3532
dea3101e
JB
3533 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
3534 pring->stats.iocb_rsp++;
3535 rsp_cmpl++;
3536
3537 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS
3538 /*
3539 * If resource errors reported from HBA, reduce
3540 * queuedepths of the SCSI device.
3541 */
3542 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3543 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3544 IOERR_NO_RESOURCES)) {
92d7f7b0 3545 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3546 phba->lpfc_rampdown_queue_depth(phba);
92d7f7b0
JS
3547 spin_lock_irqsave(&phba->hbalock, iflag);
3548 }
3549
dea3101e
JB
3550 /* Rsp ring <ringno> error: IOCB */
3551 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3552 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 3553 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 3554 pring->ringno,
92d7f7b0
JS
3555 irsp->un.ulpWord[0],
3556 irsp->un.ulpWord[1],
3557 irsp->un.ulpWord[2],
3558 irsp->un.ulpWord[3],
3559 irsp->un.ulpWord[4],
3560 irsp->un.ulpWord[5],
d7c255b2
JS
3561 *(uint32_t *)&irsp->un1,
3562 *((uint32_t *)&irsp->un1 + 1));
dea3101e
JB
3563 }
3564
3565 switch (type) {
3566 case LPFC_ABORT_IOCB:
3567 case LPFC_SOL_IOCB:
3568 /*
3569 * Idle exchange closed via ABTS from port. No iocb
3570 * resources need to be recovered.
3571 */
3572 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 3573 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3574 "0333 IOCB cmd 0x%x"
dca9479b 3575 " processed. Skipping"
92d7f7b0 3576 " completion\n",
dca9479b 3577 irsp->ulpCommand);
dea3101e
JB
3578 break;
3579 }
3580
e2a8be56 3581 spin_unlock_irqrestore(&phba->hbalock, iflag);
604a3e30
JB
3582 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
3583 &rspiocbq);
e2a8be56 3584 spin_lock_irqsave(&phba->hbalock, iflag);
0f65ff68
JS
3585 if (unlikely(!cmdiocbq))
3586 break;
3587 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED)
3588 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3589 if (cmdiocbq->iocb_cmpl) {
3590 spin_unlock_irqrestore(&phba->hbalock, iflag);
3591 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
3592 &rspiocbq);
3593 spin_lock_irqsave(&phba->hbalock, iflag);
3594 }
dea3101e 3595 break;
a4bc3379 3596 case LPFC_UNSOL_IOCB:
2e0fef85 3597 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 3598 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 3599 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 3600 break;
dea3101e
JB
3601 default:
3602 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3603 char adaptermsg[LPFC_MAX_ADPTMSG];
3604 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3605 memcpy(&adaptermsg[0], (uint8_t *) irsp,
3606 MAX_MSG_DATA);
898eb71c
JP
3607 dev_warn(&((phba->pcidev)->dev),
3608 "lpfc%d: %s\n",
dea3101e
JB
3609 phba->brd_no, adaptermsg);
3610 } else {
3611 /* Unknown IOCB command */
372c187b 3612 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 3613 "0334 Unknown IOCB command "
92d7f7b0 3614 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 3615 type, irsp->ulpCommand,
92d7f7b0
JS
3616 irsp->ulpStatus,
3617 irsp->ulpIoTag,
3618 irsp->ulpContext);
dea3101e
JB
3619 }
3620 break;
3621 }
3622
3623 /*
3624 * The response IOCB has been processed. Update the ring
3625 * pointer in SLIM. If the port response put pointer has not
3626 * been updated, sync the pgp->rspPutInx and fetch the new port
3627 * response put pointer.
3628 */
7e56aa25
JS
3629 writel(pring->sli.sli3.rspidx,
3630 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3631
7e56aa25 3632 if (pring->sli.sli3.rspidx == portRspPut)
dea3101e
JB
3633 portRspPut = le32_to_cpu(pgp->rspPutInx);
3634 }
3635
3636 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
3637 pring->stats.iocb_rsp_full++;
3638 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3639 writel(status, phba->CAregaddr);
3640 readl(phba->CAregaddr);
3641 }
3642 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3643 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3644 pring->stats.iocb_cmd_empty++;
3645
3646 /* Force update of the local copy of cmdGetInx */
7e56aa25 3647 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3648 lpfc_sli_resume_iocb(phba, pring);
3649
3650 if ((pring->lpfc_sli_cmd_available))
3651 (pring->lpfc_sli_cmd_available) (phba, pring);
3652
3653 }
3654
45ed1190 3655 phba->fcp_ring_in_use = 0;
2e0fef85 3656 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3657 return rc;
3658}
3659
e59058c4 3660/**
3772a991
JS
3661 * lpfc_sli_sp_handle_rspiocb - Handle slow-path response iocb
3662 * @phba: Pointer to HBA context object.
3663 * @pring: Pointer to driver SLI ring object.
3664 * @rspiocbp: Pointer to driver response IOCB object.
3665 *
3666 * This function is called from the worker thread when there is a slow-path
3667 * response IOCB to process. This function chains all the response iocbs until
3668 * seeing the iocb with the LE bit set. The function will call
3669 * lpfc_sli_process_sol_iocb function if the response iocb indicates a
3670 * completion of a command iocb. The function will call the
3671 * lpfc_sli_process_unsol_iocb function if this is an unsolicited iocb.
3672 * The function frees the resources or calls the completion handler if this
3673 * iocb is an abort completion. The function returns NULL when the response
3674 * iocb has the LE bit set and all the chained iocbs are processed, otherwise
3675 * this function shall chain the iocb on to the iocb_continueq and return the
3676 * response iocb passed in.
3677 **/
3678static struct lpfc_iocbq *
3679lpfc_sli_sp_handle_rspiocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3680 struct lpfc_iocbq *rspiocbp)
3681{
3682 struct lpfc_iocbq *saveq;
3683 struct lpfc_iocbq *cmdiocbp;
3684 struct lpfc_iocbq *next_iocb;
3685 IOCB_t *irsp = NULL;
3686 uint32_t free_saveq;
3687 uint8_t iocb_cmd_type;
3688 lpfc_iocb_type type;
3689 unsigned long iflag;
3690 int rc;
3691
3692 spin_lock_irqsave(&phba->hbalock, iflag);
3693 /* First add the response iocb to the countinueq list */
3694 list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
3695 pring->iocb_continueq_cnt++;
3696
70f23fd6 3697 /* Now, determine whether the list is completed for processing */
3772a991
JS
3698 irsp = &rspiocbp->iocb;
3699 if (irsp->ulpLe) {
3700 /*
3701 * By default, the driver expects to free all resources
3702 * associated with this iocb completion.
3703 */
3704 free_saveq = 1;
3705 saveq = list_get_first(&pring->iocb_continueq,
3706 struct lpfc_iocbq, list);
3707 irsp = &(saveq->iocb);
3708 list_del_init(&pring->iocb_continueq);
3709 pring->iocb_continueq_cnt = 0;
3710
3711 pring->stats.iocb_rsp++;
3712
3713 /*
3714 * If resource errors reported from HBA, reduce
3715 * queuedepths of the SCSI device.
3716 */
3717 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3718 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3719 IOERR_NO_RESOURCES)) {
3772a991
JS
3720 spin_unlock_irqrestore(&phba->hbalock, iflag);
3721 phba->lpfc_rampdown_queue_depth(phba);
3722 spin_lock_irqsave(&phba->hbalock, iflag);
3723 }
3724
3725 if (irsp->ulpStatus) {
3726 /* Rsp ring <ringno> error: IOCB */
3727 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
3728 "0328 Rsp Ring %d error: "
3729 "IOCB Data: "
3730 "x%x x%x x%x x%x "
3731 "x%x x%x x%x x%x "
3732 "x%x x%x x%x x%x "
3733 "x%x x%x x%x x%x\n",
3734 pring->ringno,
3735 irsp->un.ulpWord[0],
3736 irsp->un.ulpWord[1],
3737 irsp->un.ulpWord[2],
3738 irsp->un.ulpWord[3],
3739 irsp->un.ulpWord[4],
3740 irsp->un.ulpWord[5],
3741 *(((uint32_t *) irsp) + 6),
3742 *(((uint32_t *) irsp) + 7),
3743 *(((uint32_t *) irsp) + 8),
3744 *(((uint32_t *) irsp) + 9),
3745 *(((uint32_t *) irsp) + 10),
3746 *(((uint32_t *) irsp) + 11),
3747 *(((uint32_t *) irsp) + 12),
3748 *(((uint32_t *) irsp) + 13),
3749 *(((uint32_t *) irsp) + 14),
3750 *(((uint32_t *) irsp) + 15));
3751 }
3752
3753 /*
3754 * Fetch the IOCB command type and call the correct completion
3755 * routine. Solicited and Unsolicited IOCBs on the ELS ring
3756 * get freed back to the lpfc_iocb_list by the discovery
3757 * kernel thread.
3758 */
3759 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
3760 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
3761 switch (type) {
3762 case LPFC_SOL_IOCB:
3763 spin_unlock_irqrestore(&phba->hbalock, iflag);
3764 rc = lpfc_sli_process_sol_iocb(phba, pring, saveq);
3765 spin_lock_irqsave(&phba->hbalock, iflag);
3766 break;
3767
3768 case LPFC_UNSOL_IOCB:
3769 spin_unlock_irqrestore(&phba->hbalock, iflag);
3770 rc = lpfc_sli_process_unsol_iocb(phba, pring, saveq);
3771 spin_lock_irqsave(&phba->hbalock, iflag);
3772 if (!rc)
3773 free_saveq = 0;
3774 break;
3775
3776 case LPFC_ABORT_IOCB:
3777 cmdiocbp = NULL;
e2a8be56
JS
3778 if (irsp->ulpCommand != CMD_XRI_ABORTED_CX) {
3779 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991
JS
3780 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring,
3781 saveq);
e2a8be56
JS
3782 spin_lock_irqsave(&phba->hbalock, iflag);
3783 }
3772a991
JS
3784 if (cmdiocbp) {
3785 /* Call the specified completion routine */
3786 if (cmdiocbp->iocb_cmpl) {
3787 spin_unlock_irqrestore(&phba->hbalock,
3788 iflag);
3789 (cmdiocbp->iocb_cmpl)(phba, cmdiocbp,
3790 saveq);
3791 spin_lock_irqsave(&phba->hbalock,
3792 iflag);
3793 } else
3794 __lpfc_sli_release_iocbq(phba,
3795 cmdiocbp);
3796 }
3797 break;
3798
3799 case LPFC_UNKNOWN_IOCB:
3800 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3801 char adaptermsg[LPFC_MAX_ADPTMSG];
3802 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3803 memcpy(&adaptermsg[0], (uint8_t *)irsp,
3804 MAX_MSG_DATA);
3805 dev_warn(&((phba->pcidev)->dev),
3806 "lpfc%d: %s\n",
3807 phba->brd_no, adaptermsg);
3808 } else {
3809 /* Unknown IOCB command */
372c187b 3810 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3772a991
JS
3811 "0335 Unknown IOCB "
3812 "command Data: x%x "
3813 "x%x x%x x%x\n",
3814 irsp->ulpCommand,
3815 irsp->ulpStatus,
3816 irsp->ulpIoTag,
3817 irsp->ulpContext);
3818 }
3819 break;
3820 }
3821
3822 if (free_saveq) {
3823 list_for_each_entry_safe(rspiocbp, next_iocb,
3824 &saveq->list, list) {
61f35bff 3825 list_del_init(&rspiocbp->list);
3772a991
JS
3826 __lpfc_sli_release_iocbq(phba, rspiocbp);
3827 }
3828 __lpfc_sli_release_iocbq(phba, saveq);
3829 }
3830 rspiocbp = NULL;
3831 }
3832 spin_unlock_irqrestore(&phba->hbalock, iflag);
3833 return rspiocbp;
3834}
3835
3836/**
3837 * lpfc_sli_handle_slow_ring_event - Wrapper func for handling slow-path iocbs
e59058c4
JS
3838 * @phba: Pointer to HBA context object.
3839 * @pring: Pointer to driver SLI ring object.
3840 * @mask: Host attention register mask for this ring.
3841 *
3772a991
JS
3842 * This routine wraps the actual slow_ring event process routine from the
3843 * API jump table function pointer from the lpfc_hba struct.
e59058c4 3844 **/
3772a991 3845void
2e0fef85
JS
3846lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
3847 struct lpfc_sli_ring *pring, uint32_t mask)
3772a991
JS
3848{
3849 phba->lpfc_sli_handle_slow_ring_event(phba, pring, mask);
3850}
3851
3852/**
3853 * lpfc_sli_handle_slow_ring_event_s3 - Handle SLI3 ring event for non-FCP rings
3854 * @phba: Pointer to HBA context object.
3855 * @pring: Pointer to driver SLI ring object.
3856 * @mask: Host attention register mask for this ring.
3857 *
3858 * This function is called from the worker thread when there is a ring event
3859 * for non-fcp rings. The caller does not hold any lock. The function will
3860 * remove each response iocb in the response ring and calls the handle
3861 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3862 **/
3863static void
3864lpfc_sli_handle_slow_ring_event_s3(struct lpfc_hba *phba,
3865 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3866{
34b02dcd 3867 struct lpfc_pgp *pgp;
dea3101e
JB
3868 IOCB_t *entry;
3869 IOCB_t *irsp = NULL;
3870 struct lpfc_iocbq *rspiocbp = NULL;
dea3101e 3871 uint32_t portRspPut, portRspMax;
dea3101e 3872 unsigned long iflag;
3772a991 3873 uint32_t status;
dea3101e 3874
34b02dcd 3875 pgp = &phba->port_gp[pring->ringno];
2e0fef85 3876 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3877 pring->stats.iocb_event++;
3878
dea3101e
JB
3879 /*
3880 * The next available response entry should never exceed the maximum
3881 * entries. If it does, treat it as an adapter hardware error.
3882 */
7e56aa25 3883 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3884 portRspPut = le32_to_cpu(pgp->rspPutInx);
3885 if (portRspPut >= portRspMax) {
3886 /*
025dfdaf 3887 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
dea3101e
JB
3888 * rsp ring <portRspMax>
3889 */
372c187b 3890 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 3891 "0303 Ring %d handler: portRspPut %d "
025dfdaf 3892 "is bigger than rsp ring %d\n",
e8b62011 3893 pring->ringno, portRspPut, portRspMax);
dea3101e 3894
2e0fef85
JS
3895 phba->link_state = LPFC_HBA_ERROR;
3896 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3897
3898 phba->work_hs = HS_FFER3;
3899 lpfc_handle_eratt(phba);
3900
3772a991 3901 return;
dea3101e
JB
3902 }
3903
3904 rmb();
7e56aa25 3905 while (pring->sli.sli3.rspidx != portRspPut) {
dea3101e
JB
3906 /*
3907 * Build a completion list and call the appropriate handler.
3908 * The process is to get the next available response iocb, get
3909 * a free iocb from the list, copy the response data into the
3910 * free iocb, insert to the continuation list, and update the
3911 * next response index to slim. This process makes response
3912 * iocb's in the ring available to DMA as fast as possible but
3913 * pays a penalty for a copy operation. Since the iocb is
3914 * only 32 bytes, this penalty is considered small relative to
3915 * the PCI reads for register values and a slim write. When
3916 * the ulpLe field is set, the entire Command has been
3917 * received.
3918 */
ed957684
JS
3919 entry = lpfc_resp_iocb(phba, pring);
3920
858c9f6c 3921 phba->last_completion_time = jiffies;
2e0fef85 3922 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
3923 if (rspiocbp == NULL) {
3924 printk(KERN_ERR "%s: out of buffers! Failing "
cadbd4a5 3925 "completion.\n", __func__);
dea3101e
JB
3926 break;
3927 }
3928
ed957684
JS
3929 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
3930 phba->iocb_rsp_size);
dea3101e
JB
3931 irsp = &rspiocbp->iocb;
3932
7e56aa25
JS
3933 if (++pring->sli.sli3.rspidx >= portRspMax)
3934 pring->sli.sli3.rspidx = 0;
dea3101e 3935
a58cbd52
JS
3936 if (pring->ringno == LPFC_ELS_RING) {
3937 lpfc_debugfs_slow_ring_trc(phba,
3938 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
3939 *(((uint32_t *) irsp) + 4),
3940 *(((uint32_t *) irsp) + 6),
3941 *(((uint32_t *) irsp) + 7));
3942 }
3943
7e56aa25
JS
3944 writel(pring->sli.sli3.rspidx,
3945 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3946
3772a991
JS
3947 spin_unlock_irqrestore(&phba->hbalock, iflag);
3948 /* Handle the response IOCB */
3949 rspiocbp = lpfc_sli_sp_handle_rspiocb(phba, pring, rspiocbp);
3950 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3951
3952 /*
3953 * If the port response put pointer has not been updated, sync
3954 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
3955 * response put pointer.
3956 */
7e56aa25 3957 if (pring->sli.sli3.rspidx == portRspPut) {
dea3101e
JB
3958 portRspPut = le32_to_cpu(pgp->rspPutInx);
3959 }
7e56aa25 3960 } /* while (pring->sli.sli3.rspidx != portRspPut) */
dea3101e 3961
92d7f7b0 3962 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB
3963 /* At least one response entry has been freed */
3964 pring->stats.iocb_rsp_full++;
3965 /* SET RxRE_RSP in Chip Att register */
3966 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3967 writel(status, phba->CAregaddr);
3968 readl(phba->CAregaddr); /* flush */
3969 }
3970 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3971 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3972 pring->stats.iocb_cmd_empty++;
3973
3974 /* Force update of the local copy of cmdGetInx */
7e56aa25 3975 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3976 lpfc_sli_resume_iocb(phba, pring);
3977
3978 if ((pring->lpfc_sli_cmd_available))
3979 (pring->lpfc_sli_cmd_available) (phba, pring);
3980
3981 }
3982
2e0fef85 3983 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3984 return;
dea3101e
JB
3985}
3986
4f774513
JS
3987/**
3988 * lpfc_sli_handle_slow_ring_event_s4 - Handle SLI4 slow-path els events
3989 * @phba: Pointer to HBA context object.
3990 * @pring: Pointer to driver SLI ring object.
3991 * @mask: Host attention register mask for this ring.
3992 *
3993 * This function is called from the worker thread when there is a pending
3994 * ELS response iocb on the driver internal slow-path response iocb worker
3995 * queue. The caller does not hold any lock. The function will remove each
3996 * response iocb from the response worker queue and calls the handle
3997 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3998 **/
3999static void
4000lpfc_sli_handle_slow_ring_event_s4(struct lpfc_hba *phba,
4001 struct lpfc_sli_ring *pring, uint32_t mask)
4002{
4003 struct lpfc_iocbq *irspiocbq;
4d9ab994
JS
4004 struct hbq_dmabuf *dmabuf;
4005 struct lpfc_cq_event *cq_event;
4f774513 4006 unsigned long iflag;
0ef01a2d 4007 int count = 0;
4f774513 4008
45ed1190
JS
4009 spin_lock_irqsave(&phba->hbalock, iflag);
4010 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
4011 spin_unlock_irqrestore(&phba->hbalock, iflag);
4012 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
4f774513
JS
4013 /* Get the response iocb from the head of work queue */
4014 spin_lock_irqsave(&phba->hbalock, iflag);
45ed1190 4015 list_remove_head(&phba->sli4_hba.sp_queue_event,
4d9ab994 4016 cq_event, struct lpfc_cq_event, list);
4f774513 4017 spin_unlock_irqrestore(&phba->hbalock, iflag);
4d9ab994
JS
4018
4019 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
4020 case CQE_CODE_COMPL_WQE:
4021 irspiocbq = container_of(cq_event, struct lpfc_iocbq,
4022 cq_event);
45ed1190
JS
4023 /* Translate ELS WCQE to response IOCBQ */
4024 irspiocbq = lpfc_sli4_els_wcqe_to_rspiocbq(phba,
4025 irspiocbq);
4026 if (irspiocbq)
4027 lpfc_sli_sp_handle_rspiocb(phba, pring,
4028 irspiocbq);
0ef01a2d 4029 count++;
4d9ab994
JS
4030 break;
4031 case CQE_CODE_RECEIVE:
7851fe2c 4032 case CQE_CODE_RECEIVE_V1:
4d9ab994
JS
4033 dmabuf = container_of(cq_event, struct hbq_dmabuf,
4034 cq_event);
4035 lpfc_sli4_handle_received_buffer(phba, dmabuf);
0ef01a2d 4036 count++;
4d9ab994
JS
4037 break;
4038 default:
4039 break;
4040 }
0ef01a2d
JS
4041
4042 /* Limit the number of events to 64 to avoid soft lockups */
4043 if (count == 64)
4044 break;
4f774513
JS
4045 }
4046}
4047
e59058c4 4048/**
3621a710 4049 * lpfc_sli_abort_iocb_ring - Abort all iocbs in the ring
e59058c4
JS
4050 * @phba: Pointer to HBA context object.
4051 * @pring: Pointer to driver SLI ring object.
4052 *
4053 * This function aborts all iocbs in the given ring and frees all the iocb
4054 * objects in txq. This function issues an abort iocb for all the iocb commands
4055 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
4056 * the return of this function. The caller is not required to hold any locks.
4057 **/
2e0fef85 4058void
dea3101e
JB
4059lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
4060{
2534ba75 4061 LIST_HEAD(completions);
dea3101e 4062 struct lpfc_iocbq *iocb, *next_iocb;
dea3101e 4063
92d7f7b0
JS
4064 if (pring->ringno == LPFC_ELS_RING) {
4065 lpfc_fabric_abort_hba(phba);
4066 }
4067
dea3101e
JB
4068 /* Error everything on txq and txcmplq
4069 * First do the txq.
4070 */
db55fba8
JS
4071 if (phba->sli_rev >= LPFC_SLI_REV4) {
4072 spin_lock_irq(&pring->ring_lock);
4073 list_splice_init(&pring->txq, &completions);
4074 pring->txq_cnt = 0;
4075 spin_unlock_irq(&pring->ring_lock);
dea3101e 4076
db55fba8
JS
4077 spin_lock_irq(&phba->hbalock);
4078 /* Next issue ABTS for everything on the txcmplq */
4079 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
4080 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
4081 spin_unlock_irq(&phba->hbalock);
4082 } else {
4083 spin_lock_irq(&phba->hbalock);
4084 list_splice_init(&pring->txq, &completions);
4085 pring->txq_cnt = 0;
dea3101e 4086
db55fba8
JS
4087 /* Next issue ABTS for everything on the txcmplq */
4088 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
4089 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
4090 spin_unlock_irq(&phba->hbalock);
4091 }
dea3101e 4092
a257bf90
JS
4093 /* Cancel all the IOCBs from the completions list */
4094 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
4095 IOERR_SLI_ABORTED);
dea3101e
JB
4096}
4097
db55fba8
JS
4098/**
4099 * lpfc_sli_abort_fcp_rings - Abort all iocbs in all FCP rings
4100 * @phba: Pointer to HBA context object.
db55fba8
JS
4101 *
4102 * This function aborts all iocbs in FCP rings and frees all the iocb
4103 * objects in txq. This function issues an abort iocb for all the iocb commands
4104 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
4105 * the return of this function. The caller is not required to hold any locks.
4106 **/
4107void
4108lpfc_sli_abort_fcp_rings(struct lpfc_hba *phba)
4109{
4110 struct lpfc_sli *psli = &phba->sli;
4111 struct lpfc_sli_ring *pring;
4112 uint32_t i;
4113
4114 /* Look on all the FCP Rings for the iotag */
4115 if (phba->sli_rev >= LPFC_SLI_REV4) {
cdb42bec 4116 for (i = 0; i < phba->cfg_hdw_queue; i++) {
c00f62e6 4117 pring = phba->sli4_hba.hdwq[i].io_wq->pring;
db55fba8
JS
4118 lpfc_sli_abort_iocb_ring(phba, pring);
4119 }
4120 } else {
895427bd 4121 pring = &psli->sli3_ring[LPFC_FCP_RING];
db55fba8
JS
4122 lpfc_sli_abort_iocb_ring(phba, pring);
4123 }
4124}
4125
a8e497d5 4126/**
c00f62e6 4127 * lpfc_sli_flush_io_rings - flush all iocbs in the IO ring
a8e497d5
JS
4128 * @phba: Pointer to HBA context object.
4129 *
c00f62e6 4130 * This function flushes all iocbs in the IO ring and frees all the iocb
a8e497d5
JS
4131 * objects in txq and txcmplq. This function will not issue abort iocbs
4132 * for all the iocb commands in txcmplq, they will just be returned with
4133 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
4134 * slot has been permanently disabled.
4135 **/
4136void
c00f62e6 4137lpfc_sli_flush_io_rings(struct lpfc_hba *phba)
a8e497d5
JS
4138{
4139 LIST_HEAD(txq);
4140 LIST_HEAD(txcmplq);
a8e497d5
JS
4141 struct lpfc_sli *psli = &phba->sli;
4142 struct lpfc_sli_ring *pring;
db55fba8 4143 uint32_t i;
c1dd9111 4144 struct lpfc_iocbq *piocb, *next_iocb;
a8e497d5
JS
4145
4146 spin_lock_irq(&phba->hbalock);
4cd70891
JS
4147 if (phba->hba_flag & HBA_IOQ_FLUSH ||
4148 !phba->sli4_hba.hdwq) {
4149 spin_unlock_irq(&phba->hbalock);
4150 return;
4151 }
4f2e66c6 4152 /* Indicate the I/O queues are flushed */
c00f62e6 4153 phba->hba_flag |= HBA_IOQ_FLUSH;
a8e497d5
JS
4154 spin_unlock_irq(&phba->hbalock);
4155
db55fba8
JS
4156 /* Look on all the FCP Rings for the iotag */
4157 if (phba->sli_rev >= LPFC_SLI_REV4) {
cdb42bec 4158 for (i = 0; i < phba->cfg_hdw_queue; i++) {
c00f62e6 4159 pring = phba->sli4_hba.hdwq[i].io_wq->pring;
db55fba8
JS
4160
4161 spin_lock_irq(&pring->ring_lock);
4162 /* Retrieve everything on txq */
4163 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4164 list_for_each_entry_safe(piocb, next_iocb,
4165 &pring->txcmplq, list)
4166 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4167 /* Retrieve everything on the txcmplq */
4168 list_splice_init(&pring->txcmplq, &txcmplq);
4169 pring->txq_cnt = 0;
4170 pring->txcmplq_cnt = 0;
4171 spin_unlock_irq(&pring->ring_lock);
4172
4173 /* Flush the txq */
4174 lpfc_sli_cancel_iocbs(phba, &txq,
4175 IOSTAT_LOCAL_REJECT,
4176 IOERR_SLI_DOWN);
4177 /* Flush the txcmpq */
4178 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4179 IOSTAT_LOCAL_REJECT,
4180 IOERR_SLI_DOWN);
4181 }
4182 } else {
895427bd 4183 pring = &psli->sli3_ring[LPFC_FCP_RING];
a8e497d5 4184
db55fba8
JS
4185 spin_lock_irq(&phba->hbalock);
4186 /* Retrieve everything on txq */
4187 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4188 list_for_each_entry_safe(piocb, next_iocb,
4189 &pring->txcmplq, list)
4190 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4191 /* Retrieve everything on the txcmplq */
4192 list_splice_init(&pring->txcmplq, &txcmplq);
4193 pring->txq_cnt = 0;
4194 pring->txcmplq_cnt = 0;
4195 spin_unlock_irq(&phba->hbalock);
4196
4197 /* Flush the txq */
4198 lpfc_sli_cancel_iocbs(phba, &txq, IOSTAT_LOCAL_REJECT,
4199 IOERR_SLI_DOWN);
4200 /* Flush the txcmpq */
4201 lpfc_sli_cancel_iocbs(phba, &txcmplq, IOSTAT_LOCAL_REJECT,
4202 IOERR_SLI_DOWN);
4203 }
a8e497d5
JS
4204}
4205
e59058c4 4206/**
3772a991 4207 * lpfc_sli_brdready_s3 - Check for sli3 host ready status
e59058c4
JS
4208 * @phba: Pointer to HBA context object.
4209 * @mask: Bit mask to be checked.
4210 *
4211 * This function reads the host status register and compares
4212 * with the provided bit mask to check if HBA completed
4213 * the restart. This function will wait in a loop for the
4214 * HBA to complete restart. If the HBA does not restart within
4215 * 15 iterations, the function will reset the HBA again. The
4216 * function returns 1 when HBA fail to restart otherwise returns
4217 * zero.
4218 **/
3772a991
JS
4219static int
4220lpfc_sli_brdready_s3(struct lpfc_hba *phba, uint32_t mask)
dea3101e 4221{
41415862
JW
4222 uint32_t status;
4223 int i = 0;
4224 int retval = 0;
dea3101e 4225
41415862 4226 /* Read the HBA Host Status Register */
9940b97b
JS
4227 if (lpfc_readl(phba->HSregaddr, &status))
4228 return 1;
dea3101e 4229
41415862
JW
4230 /*
4231 * Check status register every 100ms for 5 retries, then every
4232 * 500ms for 5, then every 2.5 sec for 5, then reset board and
4233 * every 2.5 sec for 4.
4234 * Break our of the loop if errors occurred during init.
4235 */
4236 while (((status & mask) != mask) &&
4237 !(status & HS_FFERM) &&
4238 i++ < 20) {
dea3101e 4239
41415862
JW
4240 if (i <= 5)
4241 msleep(10);
4242 else if (i <= 10)
4243 msleep(500);
4244 else
4245 msleep(2500);
dea3101e 4246
41415862 4247 if (i == 15) {
2e0fef85 4248 /* Do post */
92d7f7b0 4249 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW
4250 lpfc_sli_brdrestart(phba);
4251 }
4252 /* Read the HBA Host Status Register */
9940b97b
JS
4253 if (lpfc_readl(phba->HSregaddr, &status)) {
4254 retval = 1;
4255 break;
4256 }
41415862 4257 }
dea3101e 4258
41415862
JW
4259 /* Check to see if any errors occurred during init */
4260 if ((status & HS_FFERM) || (i >= 20)) {
372c187b 4261 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e40a02c1
JS
4262 "2751 Adapter failed to restart, "
4263 "status reg x%x, FW Data: A8 x%x AC x%x\n",
4264 status,
4265 readl(phba->MBslimaddr + 0xa8),
4266 readl(phba->MBslimaddr + 0xac));
2e0fef85 4267 phba->link_state = LPFC_HBA_ERROR;
41415862 4268 retval = 1;
dea3101e 4269 }
dea3101e 4270
41415862
JW
4271 return retval;
4272}
dea3101e 4273
da0436e9
JS
4274/**
4275 * lpfc_sli_brdready_s4 - Check for sli4 host ready status
4276 * @phba: Pointer to HBA context object.
4277 * @mask: Bit mask to be checked.
4278 *
4279 * This function checks the host status register to check if HBA is
4280 * ready. This function will wait in a loop for the HBA to be ready
4281 * If the HBA is not ready , the function will will reset the HBA PCI
4282 * function again. The function returns 1 when HBA fail to be ready
4283 * otherwise returns zero.
4284 **/
4285static int
4286lpfc_sli_brdready_s4(struct lpfc_hba *phba, uint32_t mask)
4287{
4288 uint32_t status;
4289 int retval = 0;
4290
4291 /* Read the HBA Host Status Register */
4292 status = lpfc_sli4_post_status_check(phba);
4293
4294 if (status) {
4295 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
4296 lpfc_sli_brdrestart(phba);
4297 status = lpfc_sli4_post_status_check(phba);
4298 }
4299
4300 /* Check to see if any errors occurred during init */
4301 if (status) {
4302 phba->link_state = LPFC_HBA_ERROR;
4303 retval = 1;
4304 } else
4305 phba->sli4_hba.intr_enable = 0;
4306
4307 return retval;
4308}
4309
4310/**
4311 * lpfc_sli_brdready - Wrapper func for checking the hba readyness
4312 * @phba: Pointer to HBA context object.
4313 * @mask: Bit mask to be checked.
4314 *
4315 * This routine wraps the actual SLI3 or SLI4 hba readyness check routine
4316 * from the API jump table function pointer from the lpfc_hba struct.
4317 **/
4318int
4319lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
4320{
4321 return phba->lpfc_sli_brdready(phba, mask);
4322}
4323
9290831f
JS
4324#define BARRIER_TEST_PATTERN (0xdeadbeef)
4325
e59058c4 4326/**
3621a710 4327 * lpfc_reset_barrier - Make HBA ready for HBA reset
e59058c4
JS
4328 * @phba: Pointer to HBA context object.
4329 *
1b51197d
JS
4330 * This function is called before resetting an HBA. This function is called
4331 * with hbalock held and requests HBA to quiesce DMAs before a reset.
e59058c4 4332 **/
2e0fef85 4333void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 4334{
65a29c16
JS
4335 uint32_t __iomem *resp_buf;
4336 uint32_t __iomem *mbox_buf;
9290831f 4337 volatile uint32_t mbox;
9940b97b 4338 uint32_t hc_copy, ha_copy, resp_data;
9290831f
JS
4339 int i;
4340 uint8_t hdrtype;
4341
1c2ba475
JT
4342 lockdep_assert_held(&phba->hbalock);
4343
9290831f
JS
4344 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
4345 if (hdrtype != 0x80 ||
4346 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
4347 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
4348 return;
4349
4350 /*
4351 * Tell the other part of the chip to suspend temporarily all
4352 * its DMA activity.
4353 */
65a29c16 4354 resp_buf = phba->MBslimaddr;
9290831f
JS
4355
4356 /* Disable the error attention */
9940b97b
JS
4357 if (lpfc_readl(phba->HCregaddr, &hc_copy))
4358 return;
9290831f
JS
4359 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
4360 readl(phba->HCregaddr); /* flush */
2e0fef85 4361 phba->link_flag |= LS_IGNORE_ERATT;
9290831f 4362
9940b97b
JS
4363 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4364 return;
4365 if (ha_copy & HA_ERATT) {
9290831f
JS
4366 /* Clear Chip error bit */
4367 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4368 phba->pport->stopped = 1;
9290831f
JS
4369 }
4370
4371 mbox = 0;
4372 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
4373 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
4374
4375 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 4376 mbox_buf = phba->MBslimaddr;
9290831f
JS
4377 writel(mbox, mbox_buf);
4378
9940b97b
JS
4379 for (i = 0; i < 50; i++) {
4380 if (lpfc_readl((resp_buf + 1), &resp_data))
4381 return;
4382 if (resp_data != ~(BARRIER_TEST_PATTERN))
4383 mdelay(1);
4384 else
4385 break;
4386 }
4387 resp_data = 0;
4388 if (lpfc_readl((resp_buf + 1), &resp_data))
4389 return;
4390 if (resp_data != ~(BARRIER_TEST_PATTERN)) {
f4b4c68f 4391 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE ||
2e0fef85 4392 phba->pport->stopped)
9290831f
JS
4393 goto restore_hc;
4394 else
4395 goto clear_errat;
4396 }
4397
4398 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
9940b97b
JS
4399 resp_data = 0;
4400 for (i = 0; i < 500; i++) {
4401 if (lpfc_readl(resp_buf, &resp_data))
4402 return;
4403 if (resp_data != mbox)
4404 mdelay(1);
4405 else
4406 break;
4407 }
9290831f
JS
4408
4409clear_errat:
4410
9940b97b
JS
4411 while (++i < 500) {
4412 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4413 return;
4414 if (!(ha_copy & HA_ERATT))
4415 mdelay(1);
4416 else
4417 break;
4418 }
9290831f
JS
4419
4420 if (readl(phba->HAregaddr) & HA_ERATT) {
4421 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4422 phba->pport->stopped = 1;
9290831f
JS
4423 }
4424
4425restore_hc:
2e0fef85 4426 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS
4427 writel(hc_copy, phba->HCregaddr);
4428 readl(phba->HCregaddr); /* flush */
4429}
4430
e59058c4 4431/**
3621a710 4432 * lpfc_sli_brdkill - Issue a kill_board mailbox command
e59058c4
JS
4433 * @phba: Pointer to HBA context object.
4434 *
4435 * This function issues a kill_board mailbox command and waits for
4436 * the error attention interrupt. This function is called for stopping
4437 * the firmware processing. The caller is not required to hold any
4438 * locks. This function calls lpfc_hba_down_post function to free
4439 * any pending commands after the kill. The function will return 1 when it
4440 * fails to kill the board else will return 0.
4441 **/
41415862 4442int
2e0fef85 4443lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW
4444{
4445 struct lpfc_sli *psli;
4446 LPFC_MBOXQ_t *pmb;
4447 uint32_t status;
4448 uint32_t ha_copy;
4449 int retval;
4450 int i = 0;
dea3101e 4451
41415862 4452 psli = &phba->sli;
dea3101e 4453
41415862 4454 /* Kill HBA */
ed957684 4455 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS
4456 "0329 Kill HBA Data: x%x x%x\n",
4457 phba->pport->port_state, psli->sli_flag);
41415862 4458
98c9ea5c
JS
4459 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4460 if (!pmb)
41415862 4461 return 1;
41415862
JW
4462
4463 /* Disable the error attention */
2e0fef85 4464 spin_lock_irq(&phba->hbalock);
9940b97b
JS
4465 if (lpfc_readl(phba->HCregaddr, &status)) {
4466 spin_unlock_irq(&phba->hbalock);
4467 mempool_free(pmb, phba->mbox_mem_pool);
4468 return 1;
4469 }
41415862
JW
4470 status &= ~HC_ERINT_ENA;
4471 writel(status, phba->HCregaddr);
4472 readl(phba->HCregaddr); /* flush */
2e0fef85
JS
4473 phba->link_flag |= LS_IGNORE_ERATT;
4474 spin_unlock_irq(&phba->hbalock);
41415862
JW
4475
4476 lpfc_kill_board(phba, pmb);
4477 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
4478 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4479
4480 if (retval != MBX_SUCCESS) {
4481 if (retval != MBX_BUSY)
4482 mempool_free(pmb, phba->mbox_mem_pool);
372c187b 4483 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e40a02c1
JS
4484 "2752 KILL_BOARD command failed retval %d\n",
4485 retval);
2e0fef85
JS
4486 spin_lock_irq(&phba->hbalock);
4487 phba->link_flag &= ~LS_IGNORE_ERATT;
4488 spin_unlock_irq(&phba->hbalock);
41415862
JW
4489 return 1;
4490 }
4491
f4b4c68f
JS
4492 spin_lock_irq(&phba->hbalock);
4493 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
4494 spin_unlock_irq(&phba->hbalock);
9290831f 4495
41415862
JW
4496 mempool_free(pmb, phba->mbox_mem_pool);
4497
4498 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
4499 * attention every 100ms for 3 seconds. If we don't get ERATT after
4500 * 3 seconds we still set HBA_ERROR state because the status of the
4501 * board is now undefined.
4502 */
9940b97b
JS
4503 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4504 return 1;
41415862
JW
4505 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
4506 mdelay(100);
9940b97b
JS
4507 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4508 return 1;
41415862
JW
4509 }
4510
4511 del_timer_sync(&psli->mbox_tmo);
9290831f
JS
4512 if (ha_copy & HA_ERATT) {
4513 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4514 phba->pport->stopped = 1;
9290831f 4515 }
2e0fef85 4516 spin_lock_irq(&phba->hbalock);
41415862 4517 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
04c68496 4518 psli->mbox_active = NULL;
2e0fef85
JS
4519 phba->link_flag &= ~LS_IGNORE_ERATT;
4520 spin_unlock_irq(&phba->hbalock);
41415862 4521
41415862 4522 lpfc_hba_down_post(phba);
2e0fef85 4523 phba->link_state = LPFC_HBA_ERROR;
41415862 4524
2e0fef85 4525 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB
4526}
4527
e59058c4 4528/**
3772a991 4529 * lpfc_sli_brdreset - Reset a sli-2 or sli-3 HBA
e59058c4
JS
4530 * @phba: Pointer to HBA context object.
4531 *
4532 * This function resets the HBA by writing HC_INITFF to the control
4533 * register. After the HBA resets, this function resets all the iocb ring
4534 * indices. This function disables PCI layer parity checking during
4535 * the reset.
4536 * This function returns 0 always.
4537 * The caller is not required to hold any locks.
4538 **/
41415862 4539int
2e0fef85 4540lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 4541{
41415862 4542 struct lpfc_sli *psli;
dea3101e 4543 struct lpfc_sli_ring *pring;
41415862 4544 uint16_t cfg_value;
dea3101e 4545 int i;
dea3101e 4546
41415862 4547 psli = &phba->sli;
dea3101e 4548
41415862
JW
4549 /* Reset HBA */
4550 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4551 "0325 Reset HBA Data: x%x x%x\n",
4492b739
JS
4552 (phba->pport) ? phba->pport->port_state : 0,
4553 psli->sli_flag);
dea3101e
JB
4554
4555 /* perform board reset */
4556 phba->fc_eventTag = 0;
4d9ab994 4557 phba->link_events = 0;
4492b739
JS
4558 if (phba->pport) {
4559 phba->pport->fc_myDID = 0;
4560 phba->pport->fc_prevDID = 0;
4561 }
dea3101e 4562
41415862 4563 /* Turn off parity checking and serr during the physical reset */
32a93100
JS
4564 if (pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value))
4565 return -EIO;
4566
41415862
JW
4567 pci_write_config_word(phba->pcidev, PCI_COMMAND,
4568 (cfg_value &
4569 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4570
3772a991
JS
4571 psli->sli_flag &= ~(LPFC_SLI_ACTIVE | LPFC_PROCESS_LA);
4572
41415862
JW
4573 /* Now toggle INITFF bit in the Host Control Register */
4574 writel(HC_INITFF, phba->HCregaddr);
4575 mdelay(1);
4576 readl(phba->HCregaddr); /* flush */
4577 writel(0, phba->HCregaddr);
4578 readl(phba->HCregaddr); /* flush */
4579
4580 /* Restore PCI cmd register */
4581 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB
4582
4583 /* Initialize relevant SLI info */
41415862 4584 for (i = 0; i < psli->num_rings; i++) {
895427bd 4585 pring = &psli->sli3_ring[i];
dea3101e 4586 pring->flag = 0;
7e56aa25
JS
4587 pring->sli.sli3.rspidx = 0;
4588 pring->sli.sli3.next_cmdidx = 0;
4589 pring->sli.sli3.local_getidx = 0;
4590 pring->sli.sli3.cmdidx = 0;
dea3101e
JB
4591 pring->missbufcnt = 0;
4592 }
dea3101e 4593
2e0fef85 4594 phba->link_state = LPFC_WARM_START;
41415862
JW
4595 return 0;
4596}
4597
e59058c4 4598/**
da0436e9
JS
4599 * lpfc_sli4_brdreset - Reset a sli-4 HBA
4600 * @phba: Pointer to HBA context object.
4601 *
4602 * This function resets a SLI4 HBA. This function disables PCI layer parity
4603 * checking during resets the device. The caller is not required to hold
4604 * any locks.
4605 *
8c24a4f6 4606 * This function returns 0 on success else returns negative error code.
da0436e9
JS
4607 **/
4608int
4609lpfc_sli4_brdreset(struct lpfc_hba *phba)
4610{
4611 struct lpfc_sli *psli = &phba->sli;
4612 uint16_t cfg_value;
0293635e 4613 int rc = 0;
da0436e9
JS
4614
4615 /* Reset HBA */
4616 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
0293635e
JS
4617 "0295 Reset HBA Data: x%x x%x x%x\n",
4618 phba->pport->port_state, psli->sli_flag,
4619 phba->hba_flag);
da0436e9
JS
4620
4621 /* perform board reset */
4622 phba->fc_eventTag = 0;
4d9ab994 4623 phba->link_events = 0;
da0436e9
JS
4624 phba->pport->fc_myDID = 0;
4625 phba->pport->fc_prevDID = 0;
4626
da0436e9
JS
4627 spin_lock_irq(&phba->hbalock);
4628 psli->sli_flag &= ~(LPFC_PROCESS_LA);
4629 phba->fcf.fcf_flag = 0;
da0436e9
JS
4630 spin_unlock_irq(&phba->hbalock);
4631
0293635e
JS
4632 /* SLI4 INTF 2: if FW dump is being taken skip INIT_PORT */
4633 if (phba->hba_flag & HBA_FW_DUMP_OP) {
4634 phba->hba_flag &= ~HBA_FW_DUMP_OP;
4635 return rc;
4636 }
4637
da0436e9
JS
4638 /* Now physically reset the device */
4639 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4640 "0389 Performing PCI function reset!\n");
be858b65
JS
4641
4642 /* Turn off parity checking and serr during the physical reset */
32a93100
JS
4643 if (pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value)) {
4644 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4645 "3205 PCI read Config failed\n");
4646 return -EIO;
4647 }
4648
be858b65
JS
4649 pci_write_config_word(phba->pcidev, PCI_COMMAND, (cfg_value &
4650 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4651
88318816 4652 /* Perform FCoE PCI function reset before freeing queue memory */
27b01b82 4653 rc = lpfc_pci_function_reset(phba);
da0436e9 4654
be858b65
JS
4655 /* Restore PCI cmd register */
4656 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
4657
27b01b82 4658 return rc;
da0436e9
JS
4659}
4660
4661/**
4662 * lpfc_sli_brdrestart_s3 - Restart a sli-3 hba
e59058c4
JS
4663 * @phba: Pointer to HBA context object.
4664 *
4665 * This function is called in the SLI initialization code path to
4666 * restart the HBA. The caller is not required to hold any lock.
4667 * This function writes MBX_RESTART mailbox command to the SLIM and
4668 * resets the HBA. At the end of the function, it calls lpfc_hba_down_post
4669 * function to free any pending commands. The function enables
4670 * POST only during the first initialization. The function returns zero.
4671 * The function does not guarantee completion of MBX_RESTART mailbox
4672 * command before the return of this function.
4673 **/
da0436e9
JS
4674static int
4675lpfc_sli_brdrestart_s3(struct lpfc_hba *phba)
41415862
JW
4676{
4677 MAILBOX_t *mb;
4678 struct lpfc_sli *psli;
41415862
JW
4679 volatile uint32_t word0;
4680 void __iomem *to_slim;
0d878419 4681 uint32_t hba_aer_enabled;
41415862 4682
2e0fef85 4683 spin_lock_irq(&phba->hbalock);
41415862 4684
0d878419
JS
4685 /* Take PCIe device Advanced Error Reporting (AER) state */
4686 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4687
41415862
JW
4688 psli = &phba->sli;
4689
4690 /* Restart HBA */
4691 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4692 "0337 Restart HBA Data: x%x x%x\n",
4492b739
JS
4693 (phba->pport) ? phba->pport->port_state : 0,
4694 psli->sli_flag);
41415862
JW
4695
4696 word0 = 0;
4697 mb = (MAILBOX_t *) &word0;
4698 mb->mbxCommand = MBX_RESTART;
4699 mb->mbxHc = 1;
4700
9290831f
JS
4701 lpfc_reset_barrier(phba);
4702
41415862
JW
4703 to_slim = phba->MBslimaddr;
4704 writel(*(uint32_t *) mb, to_slim);
4705 readl(to_slim); /* flush */
4706
4707 /* Only skip post after fc_ffinit is completed */
4492b739 4708 if (phba->pport && phba->pport->port_state)
41415862 4709 word0 = 1; /* This is really setting up word1 */
eaf15d5b 4710 else
41415862 4711 word0 = 0; /* This is really setting up word1 */
65a29c16 4712 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW
4713 writel(*(uint32_t *) mb, to_slim);
4714 readl(to_slim); /* flush */
dea3101e 4715
41415862 4716 lpfc_sli_brdreset(phba);
4492b739
JS
4717 if (phba->pport)
4718 phba->pport->stopped = 0;
2e0fef85 4719 phba->link_state = LPFC_INIT_START;
da0436e9 4720 phba->hba_flag = 0;
2e0fef85 4721 spin_unlock_irq(&phba->hbalock);
41415862 4722
64ba8818 4723 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4724 psli->stats_start = ktime_get_seconds();
64ba8818 4725
eaf15d5b
JS
4726 /* Give the INITFF and Post time to settle. */
4727 mdelay(100);
41415862 4728
0d878419
JS
4729 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4730 if (hba_aer_enabled)
4731 pci_disable_pcie_error_reporting(phba->pcidev);
4732
41415862 4733 lpfc_hba_down_post(phba);
dea3101e
JB
4734
4735 return 0;
4736}
4737
da0436e9
JS
4738/**
4739 * lpfc_sli_brdrestart_s4 - Restart the sli-4 hba
4740 * @phba: Pointer to HBA context object.
4741 *
4742 * This function is called in the SLI initialization code path to restart
4743 * a SLI4 HBA. The caller is not required to hold any lock.
4744 * At the end of the function, it calls lpfc_hba_down_post function to
4745 * free any pending commands.
4746 **/
4747static int
4748lpfc_sli_brdrestart_s4(struct lpfc_hba *phba)
4749{
4750 struct lpfc_sli *psli = &phba->sli;
75baf696 4751 uint32_t hba_aer_enabled;
27b01b82 4752 int rc;
da0436e9
JS
4753
4754 /* Restart HBA */
4755 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4756 "0296 Restart HBA Data: x%x x%x\n",
4757 phba->pport->port_state, psli->sli_flag);
4758
75baf696
JS
4759 /* Take PCIe device Advanced Error Reporting (AER) state */
4760 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4761
27b01b82 4762 rc = lpfc_sli4_brdreset(phba);
4fb86a6b
JS
4763 if (rc) {
4764 phba->link_state = LPFC_HBA_ERROR;
4765 goto hba_down_queue;
4766 }
da0436e9
JS
4767
4768 spin_lock_irq(&phba->hbalock);
4769 phba->pport->stopped = 0;
4770 phba->link_state = LPFC_INIT_START;
4771 phba->hba_flag = 0;
4772 spin_unlock_irq(&phba->hbalock);
4773
4774 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4775 psli->stats_start = ktime_get_seconds();
da0436e9 4776
75baf696
JS
4777 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4778 if (hba_aer_enabled)
4779 pci_disable_pcie_error_reporting(phba->pcidev);
4780
4fb86a6b 4781hba_down_queue:
da0436e9 4782 lpfc_hba_down_post(phba);
569dbe84 4783 lpfc_sli4_queue_destroy(phba);
da0436e9 4784
27b01b82 4785 return rc;
da0436e9
JS
4786}
4787
4788/**
4789 * lpfc_sli_brdrestart - Wrapper func for restarting hba
4790 * @phba: Pointer to HBA context object.
4791 *
4792 * This routine wraps the actual SLI3 or SLI4 hba restart routine from the
4793 * API jump table function pointer from the lpfc_hba struct.
4794**/
4795int
4796lpfc_sli_brdrestart(struct lpfc_hba *phba)
4797{
4798 return phba->lpfc_sli_brdrestart(phba);
4799}
4800
e59058c4 4801/**
3621a710 4802 * lpfc_sli_chipset_init - Wait for the restart of the HBA after a restart
e59058c4
JS
4803 * @phba: Pointer to HBA context object.
4804 *
4805 * This function is called after a HBA restart to wait for successful
4806 * restart of the HBA. Successful restart of the HBA is indicated by
4807 * HS_FFRDY and HS_MBRDY bits. If the HBA fails to restart even after 15
4808 * iteration, the function will restart the HBA again. The function returns
4809 * zero if HBA successfully restarted else returns negative error code.
4810 **/
4492b739 4811int
dea3101e
JB
4812lpfc_sli_chipset_init(struct lpfc_hba *phba)
4813{
4814 uint32_t status, i = 0;
4815
4816 /* Read the HBA Host Status Register */
9940b97b
JS
4817 if (lpfc_readl(phba->HSregaddr, &status))
4818 return -EIO;
dea3101e
JB
4819
4820 /* Check status register to see what current state is */
4821 i = 0;
4822 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
4823
dcf2a4e0
JS
4824 /* Check every 10ms for 10 retries, then every 100ms for 90
4825 * retries, then every 1 sec for 50 retires for a total of
4826 * ~60 seconds before reset the board again and check every
4827 * 1 sec for 50 retries. The up to 60 seconds before the
4828 * board ready is required by the Falcon FIPS zeroization
4829 * complete, and any reset the board in between shall cause
4830 * restart of zeroization, further delay the board ready.
dea3101e 4831 */
dcf2a4e0 4832 if (i++ >= 200) {
dea3101e
JB
4833 /* Adapter failed to init, timeout, status reg
4834 <status> */
372c187b 4835 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 4836 "0436 Adapter failed to init, "
09372820
JS
4837 "timeout, status reg x%x, "
4838 "FW Data: A8 x%x AC x%x\n", status,
4839 readl(phba->MBslimaddr + 0xa8),
4840 readl(phba->MBslimaddr + 0xac));
2e0fef85 4841 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4842 return -ETIMEDOUT;
4843 }
4844
4845 /* Check to see if any errors occurred during init */
4846 if (status & HS_FFERM) {
4847 /* ERROR: During chipset initialization */
4848 /* Adapter failed to init, chipset, status reg
4849 <status> */
372c187b 4850 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 4851 "0437 Adapter failed to init, "
09372820
JS
4852 "chipset, status reg x%x, "
4853 "FW Data: A8 x%x AC x%x\n", status,
4854 readl(phba->MBslimaddr + 0xa8),
4855 readl(phba->MBslimaddr + 0xac));
2e0fef85 4856 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4857 return -EIO;
4858 }
4859
dcf2a4e0 4860 if (i <= 10)
dea3101e 4861 msleep(10);
dcf2a4e0
JS
4862 else if (i <= 100)
4863 msleep(100);
4864 else
4865 msleep(1000);
dea3101e 4866
dcf2a4e0
JS
4867 if (i == 150) {
4868 /* Do post */
92d7f7b0 4869 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4870 lpfc_sli_brdrestart(phba);
dea3101e
JB
4871 }
4872 /* Read the HBA Host Status Register */
9940b97b
JS
4873 if (lpfc_readl(phba->HSregaddr, &status))
4874 return -EIO;
dea3101e
JB
4875 }
4876
4877 /* Check to see if any errors occurred during init */
4878 if (status & HS_FFERM) {
4879 /* ERROR: During chipset initialization */
4880 /* Adapter failed to init, chipset, status reg <status> */
372c187b 4881 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 4882 "0438 Adapter failed to init, chipset, "
09372820
JS
4883 "status reg x%x, "
4884 "FW Data: A8 x%x AC x%x\n", status,
4885 readl(phba->MBslimaddr + 0xa8),
4886 readl(phba->MBslimaddr + 0xac));
2e0fef85 4887 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4888 return -EIO;
4889 }
4890
4891 /* Clear all interrupt enable conditions */
4892 writel(0, phba->HCregaddr);
4893 readl(phba->HCregaddr); /* flush */
4894
4895 /* setup host attn register */
4896 writel(0xffffffff, phba->HAregaddr);
4897 readl(phba->HAregaddr); /* flush */
4898 return 0;
4899}
4900
e59058c4 4901/**
3621a710 4902 * lpfc_sli_hbq_count - Get the number of HBQs to be configured
e59058c4
JS
4903 *
4904 * This function calculates and returns the number of HBQs required to be
4905 * configured.
4906 **/
78b2d852 4907int
ed957684
JS
4908lpfc_sli_hbq_count(void)
4909{
92d7f7b0 4910 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS
4911}
4912
e59058c4 4913/**
3621a710 4914 * lpfc_sli_hbq_entry_count - Calculate total number of hbq entries
e59058c4
JS
4915 *
4916 * This function adds the number of hbq entries in every HBQ to get
4917 * the total number of hbq entries required for the HBA and returns
4918 * the total count.
4919 **/
ed957684
JS
4920static int
4921lpfc_sli_hbq_entry_count(void)
4922{
4923 int hbq_count = lpfc_sli_hbq_count();
4924 int count = 0;
4925 int i;
4926
4927 for (i = 0; i < hbq_count; ++i)
92d7f7b0 4928 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS
4929 return count;
4930}
4931
e59058c4 4932/**
3621a710 4933 * lpfc_sli_hbq_size - Calculate memory required for all hbq entries
e59058c4
JS
4934 *
4935 * This function calculates amount of memory required for all hbq entries
4936 * to be configured and returns the total memory required.
4937 **/
dea3101e 4938int
ed957684
JS
4939lpfc_sli_hbq_size(void)
4940{
4941 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
4942}
4943
e59058c4 4944/**
3621a710 4945 * lpfc_sli_hbq_setup - configure and initialize HBQs
e59058c4
JS
4946 * @phba: Pointer to HBA context object.
4947 *
4948 * This function is called during the SLI initialization to configure
4949 * all the HBQs and post buffers to the HBQ. The caller is not
4950 * required to hold any locks. This function will return zero if successful
4951 * else it will return negative error code.
4952 **/
ed957684
JS
4953static int
4954lpfc_sli_hbq_setup(struct lpfc_hba *phba)
4955{
4956 int hbq_count = lpfc_sli_hbq_count();
4957 LPFC_MBOXQ_t *pmb;
4958 MAILBOX_t *pmbox;
4959 uint32_t hbqno;
4960 uint32_t hbq_entry_index;
ed957684 4961
92d7f7b0
JS
4962 /* Get a Mailbox buffer to setup mailbox
4963 * commands for HBA initialization
4964 */
ed957684
JS
4965 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4966
4967 if (!pmb)
4968 return -ENOMEM;
4969
04c68496 4970 pmbox = &pmb->u.mb;
ed957684
JS
4971
4972 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
4973 phba->link_state = LPFC_INIT_MBX_CMDS;
3163f725 4974 phba->hbq_in_use = 1;
ed957684
JS
4975
4976 hbq_entry_index = 0;
4977 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
4978 phba->hbqs[hbqno].next_hbqPutIdx = 0;
4979 phba->hbqs[hbqno].hbqPutIdx = 0;
4980 phba->hbqs[hbqno].local_hbqGetIdx = 0;
4981 phba->hbqs[hbqno].entry_count =
92d7f7b0 4982 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS
4983 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
4984 hbq_entry_index, pmb);
ed957684
JS
4985 hbq_entry_index += phba->hbqs[hbqno].entry_count;
4986
4987 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
4988 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
4989 mbxStatus <status>, ring <num> */
4990
4991 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 4992 LOG_SLI | LOG_VPORT,
e8b62011 4993 "1805 Adapter failed to init. "
ed957684 4994 "Data: x%x x%x x%x\n",
e8b62011 4995 pmbox->mbxCommand,
ed957684
JS
4996 pmbox->mbxStatus, hbqno);
4997
4998 phba->link_state = LPFC_HBA_ERROR;
4999 mempool_free(pmb, phba->mbox_mem_pool);
6e7288d9 5000 return -ENXIO;
ed957684
JS
5001 }
5002 }
5003 phba->hbq_count = hbq_count;
5004
ed957684
JS
5005 mempool_free(pmb, phba->mbox_mem_pool);
5006
92d7f7b0 5007 /* Initially populate or replenish the HBQs */
d7c255b2
JS
5008 for (hbqno = 0; hbqno < hbq_count; ++hbqno)
5009 lpfc_sli_hbqbuf_init_hbqs(phba, hbqno);
ed957684
JS
5010 return 0;
5011}
5012
4f774513
JS
5013/**
5014 * lpfc_sli4_rb_setup - Initialize and post RBs to HBA
5015 * @phba: Pointer to HBA context object.
5016 *
5017 * This function is called during the SLI initialization to configure
5018 * all the HBQs and post buffers to the HBQ. The caller is not
5019 * required to hold any locks. This function will return zero if successful
5020 * else it will return negative error code.
5021 **/
5022static int
5023lpfc_sli4_rb_setup(struct lpfc_hba *phba)
5024{
5025 phba->hbq_in_use = 1;
999fbbce
JS
5026 /**
5027 * Specific case when the MDS diagnostics is enabled and supported.
5028 * The receive buffer count is truncated to manage the incoming
5029 * traffic.
5030 **/
5031 if (phba->cfg_enable_mds_diags && phba->mds_diags_support)
5032 phba->hbqs[LPFC_ELS_HBQ].entry_count =
5033 lpfc_hbq_defs[LPFC_ELS_HBQ]->entry_count >> 1;
5034 else
5035 phba->hbqs[LPFC_ELS_HBQ].entry_count =
5036 lpfc_hbq_defs[LPFC_ELS_HBQ]->entry_count;
4f774513 5037 phba->hbq_count = 1;
895427bd 5038 lpfc_sli_hbqbuf_init_hbqs(phba, LPFC_ELS_HBQ);
4f774513 5039 /* Initially populate or replenish the HBQs */
4f774513
JS
5040 return 0;
5041}
5042
e59058c4 5043/**
3621a710 5044 * lpfc_sli_config_port - Issue config port mailbox command
e59058c4
JS
5045 * @phba: Pointer to HBA context object.
5046 * @sli_mode: sli mode - 2/3
5047 *
183b8021 5048 * This function is called by the sli initialization code path
e59058c4
JS
5049 * to issue config_port mailbox command. This function restarts the
5050 * HBA firmware and issues a config_port mailbox command to configure
5051 * the SLI interface in the sli mode specified by sli_mode
5052 * variable. The caller is not required to hold any locks.
5053 * The function returns 0 if successful, else returns negative error
5054 * code.
5055 **/
9399627f
JS
5056int
5057lpfc_sli_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB
5058{
5059 LPFC_MBOXQ_t *pmb;
5060 uint32_t resetcount = 0, rc = 0, done = 0;
5061
5062 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5063 if (!pmb) {
2e0fef85 5064 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
5065 return -ENOMEM;
5066 }
5067
ed957684 5068 phba->sli_rev = sli_mode;
dea3101e 5069 while (resetcount < 2 && !done) {
2e0fef85 5070 spin_lock_irq(&phba->hbalock);
1c067a42 5071 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 5072 spin_unlock_irq(&phba->hbalock);
92d7f7b0 5073 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 5074 lpfc_sli_brdrestart(phba);
dea3101e
JB
5075 rc = lpfc_sli_chipset_init(phba);
5076 if (rc)
5077 break;
5078
2e0fef85 5079 spin_lock_irq(&phba->hbalock);
1c067a42 5080 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 5081 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
5082 resetcount++;
5083
ed957684
JS
5084 /* Call pre CONFIG_PORT mailbox command initialization. A
5085 * value of 0 means the call was successful. Any other
5086 * nonzero value is a failure, but if ERESTART is returned,
5087 * the driver may reset the HBA and try again.
5088 */
dea3101e
JB
5089 rc = lpfc_config_port_prep(phba);
5090 if (rc == -ERESTART) {
ed957684 5091 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e 5092 continue;
34b02dcd 5093 } else if (rc)
dea3101e 5094 break;
6d368e53 5095
2e0fef85 5096 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
5097 lpfc_config_port(phba, pmb);
5098 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
34b02dcd
JS
5099 phba->sli3_options &= ~(LPFC_SLI3_NPIV_ENABLED |
5100 LPFC_SLI3_HBQ_ENABLED |
5101 LPFC_SLI3_CRP_ENABLED |
bc73905a 5102 LPFC_SLI3_DSS_ENABLED);
ed957684 5103 if (rc != MBX_SUCCESS) {
372c187b 5104 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 5105 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 5106 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
04c68496 5107 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus, 0);
2e0fef85 5108 spin_lock_irq(&phba->hbalock);
04c68496 5109 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
2e0fef85
JS
5110 spin_unlock_irq(&phba->hbalock);
5111 rc = -ENXIO;
04c68496
JS
5112 } else {
5113 /* Allow asynchronous mailbox command to go through */
5114 spin_lock_irq(&phba->hbalock);
5115 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
5116 spin_unlock_irq(&phba->hbalock);
ed957684 5117 done = 1;
cb69f7de
JS
5118
5119 if ((pmb->u.mb.un.varCfgPort.casabt == 1) &&
5120 (pmb->u.mb.un.varCfgPort.gasabt == 0))
5121 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5122 "3110 Port did not grant ASABT\n");
04c68496 5123 }
dea3101e 5124 }
ed957684
JS
5125 if (!done) {
5126 rc = -EINVAL;
5127 goto do_prep_failed;
5128 }
04c68496
JS
5129 if (pmb->u.mb.un.varCfgPort.sli_mode == 3) {
5130 if (!pmb->u.mb.un.varCfgPort.cMA) {
34b02dcd
JS
5131 rc = -ENXIO;
5132 goto do_prep_failed;
5133 }
04c68496 5134 if (phba->max_vpi && pmb->u.mb.un.varCfgPort.gmv) {
34b02dcd 5135 phba->sli3_options |= LPFC_SLI3_NPIV_ENABLED;
04c68496
JS
5136 phba->max_vpi = pmb->u.mb.un.varCfgPort.max_vpi;
5137 phba->max_vports = (phba->max_vpi > phba->max_vports) ?
5138 phba->max_vpi : phba->max_vports;
5139
34b02dcd
JS
5140 } else
5141 phba->max_vpi = 0;
04c68496 5142 if (pmb->u.mb.un.varCfgPort.gerbm)
34b02dcd 5143 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
04c68496 5144 if (pmb->u.mb.un.varCfgPort.gcrp)
34b02dcd 5145 phba->sli3_options |= LPFC_SLI3_CRP_ENABLED;
6e7288d9
JS
5146
5147 phba->hbq_get = phba->mbox->us.s3_pgp.hbq_get;
5148 phba->port_gp = phba->mbox->us.s3_pgp.port;
e2a0a9d6 5149
f44ac12f
JS
5150 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
5151 if (pmb->u.mb.un.varCfgPort.gbg == 0) {
5152 phba->cfg_enable_bg = 0;
5153 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
372c187b 5154 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e2a0a9d6
JS
5155 "0443 Adapter did not grant "
5156 "BlockGuard\n");
f44ac12f 5157 }
e2a0a9d6 5158 }
34b02dcd 5159 } else {
8f34f4ce 5160 phba->hbq_get = NULL;
34b02dcd 5161 phba->port_gp = phba->mbox->us.s2.port;
d7c255b2 5162 phba->max_vpi = 0;
ed957684 5163 }
92d7f7b0 5164do_prep_failed:
ed957684
JS
5165 mempool_free(pmb, phba->mbox_mem_pool);
5166 return rc;
5167}
5168
e59058c4
JS
5169
5170/**
183b8021 5171 * lpfc_sli_hba_setup - SLI initialization function
e59058c4
JS
5172 * @phba: Pointer to HBA context object.
5173 *
183b8021
MY
5174 * This function is the main SLI initialization function. This function
5175 * is called by the HBA initialization code, HBA reset code and HBA
e59058c4
JS
5176 * error attention handler code. Caller is not required to hold any
5177 * locks. This function issues config_port mailbox command to configure
5178 * the SLI, setup iocb rings and HBQ rings. In the end the function
5179 * calls the config_port_post function to issue init_link mailbox
5180 * command and to start the discovery. The function will return zero
5181 * if successful, else it will return negative error code.
5182 **/
ed957684
JS
5183int
5184lpfc_sli_hba_setup(struct lpfc_hba *phba)
5185{
5186 uint32_t rc;
6d368e53
JS
5187 int mode = 3, i;
5188 int longs;
ed957684 5189
12247e81 5190 switch (phba->cfg_sli_mode) {
ed957684 5191 case 2:
78b2d852 5192 if (phba->cfg_enable_npiv) {
372c187b 5193 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
12247e81 5194 "1824 NPIV enabled: Override sli_mode "
92d7f7b0 5195 "parameter (%d) to auto (0).\n",
12247e81 5196 phba->cfg_sli_mode);
92d7f7b0
JS
5197 break;
5198 }
ed957684
JS
5199 mode = 2;
5200 break;
5201 case 0:
5202 case 3:
5203 break;
5204 default:
372c187b 5205 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
12247e81
JS
5206 "1819 Unrecognized sli_mode parameter: %d.\n",
5207 phba->cfg_sli_mode);
ed957684
JS
5208
5209 break;
5210 }
b5c53958 5211 phba->fcp_embed_io = 0; /* SLI4 FC support only */
ed957684 5212
9399627f
JS
5213 rc = lpfc_sli_config_port(phba, mode);
5214
12247e81 5215 if (rc && phba->cfg_sli_mode == 3)
372c187b 5216 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011
JS
5217 "1820 Unable to select SLI-3. "
5218 "Not supported by adapter.\n");
ed957684 5219 if (rc && mode != 2)
9399627f 5220 rc = lpfc_sli_config_port(phba, 2);
4597663f
JS
5221 else if (rc && mode == 2)
5222 rc = lpfc_sli_config_port(phba, 3);
ed957684 5223 if (rc)
dea3101e
JB
5224 goto lpfc_sli_hba_setup_error;
5225
0d878419
JS
5226 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
5227 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
5228 rc = pci_enable_pcie_error_reporting(phba->pcidev);
5229 if (!rc) {
5230 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5231 "2709 This device supports "
5232 "Advanced Error Reporting (AER)\n");
5233 spin_lock_irq(&phba->hbalock);
5234 phba->hba_flag |= HBA_AER_ENABLED;
5235 spin_unlock_irq(&phba->hbalock);
5236 } else {
5237 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5238 "2708 This device does not support "
b069d7eb
JS
5239 "Advanced Error Reporting (AER): %d\n",
5240 rc);
0d878419
JS
5241 phba->cfg_aer_support = 0;
5242 }
5243 }
5244
ed957684
JS
5245 if (phba->sli_rev == 3) {
5246 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
5247 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
ed957684
JS
5248 } else {
5249 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
5250 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 5251 phba->sli3_options = 0;
ed957684
JS
5252 }
5253
5254 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
5255 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
5256 phba->sli_rev, phba->max_vpi);
ed957684 5257 rc = lpfc_sli_ring_map(phba);
dea3101e
JB
5258
5259 if (rc)
5260 goto lpfc_sli_hba_setup_error;
5261
6d368e53
JS
5262 /* Initialize VPIs. */
5263 if (phba->sli_rev == LPFC_SLI_REV3) {
5264 /*
5265 * The VPI bitmask and physical ID array are allocated
5266 * and initialized once only - at driver load. A port
5267 * reset doesn't need to reinitialize this memory.
5268 */
5269 if ((phba->vpi_bmask == NULL) && (phba->vpi_ids == NULL)) {
5270 longs = (phba->max_vpi + BITS_PER_LONG) / BITS_PER_LONG;
6396bb22
KC
5271 phba->vpi_bmask = kcalloc(longs,
5272 sizeof(unsigned long),
6d368e53
JS
5273 GFP_KERNEL);
5274 if (!phba->vpi_bmask) {
5275 rc = -ENOMEM;
5276 goto lpfc_sli_hba_setup_error;
5277 }
5278
6396bb22
KC
5279 phba->vpi_ids = kcalloc(phba->max_vpi + 1,
5280 sizeof(uint16_t),
5281 GFP_KERNEL);
6d368e53
JS
5282 if (!phba->vpi_ids) {
5283 kfree(phba->vpi_bmask);
5284 rc = -ENOMEM;
5285 goto lpfc_sli_hba_setup_error;
5286 }
5287 for (i = 0; i < phba->max_vpi; i++)
5288 phba->vpi_ids[i] = i;
5289 }
5290 }
5291
9399627f 5292 /* Init HBQs */
ed957684
JS
5293 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
5294 rc = lpfc_sli_hbq_setup(phba);
5295 if (rc)
5296 goto lpfc_sli_hba_setup_error;
5297 }
04c68496 5298 spin_lock_irq(&phba->hbalock);
dea3101e 5299 phba->sli.sli_flag |= LPFC_PROCESS_LA;
04c68496 5300 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
5301
5302 rc = lpfc_config_port_post(phba);
5303 if (rc)
5304 goto lpfc_sli_hba_setup_error;
5305
ed957684
JS
5306 return rc;
5307
92d7f7b0 5308lpfc_sli_hba_setup_error:
2e0fef85 5309 phba->link_state = LPFC_HBA_ERROR;
372c187b 5310 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 5311 "0445 Firmware initialization failed\n");
dea3101e
JB
5312 return rc;
5313}
5314
e59058c4 5315/**
da0436e9
JS
5316 * lpfc_sli4_read_fcoe_params - Read fcoe params from conf region
5317 * @phba: Pointer to HBA context object.
7af29d45 5318 *
da0436e9
JS
5319 * This function issue a dump mailbox command to read config region
5320 * 23 and parse the records in the region and populate driver
5321 * data structure.
e59058c4 5322 **/
da0436e9 5323static int
ff78d8f9 5324lpfc_sli4_read_fcoe_params(struct lpfc_hba *phba)
dea3101e 5325{
ff78d8f9 5326 LPFC_MBOXQ_t *mboxq;
da0436e9
JS
5327 struct lpfc_dmabuf *mp;
5328 struct lpfc_mqe *mqe;
5329 uint32_t data_length;
5330 int rc;
dea3101e 5331
da0436e9
JS
5332 /* Program the default value of vlan_id and fc_map */
5333 phba->valid_vlan = 0;
5334 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5335 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5336 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
2e0fef85 5337
ff78d8f9
JS
5338 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5339 if (!mboxq)
da0436e9
JS
5340 return -ENOMEM;
5341
ff78d8f9
JS
5342 mqe = &mboxq->u.mqe;
5343 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq)) {
5344 rc = -ENOMEM;
5345 goto out_free_mboxq;
5346 }
5347
3e1f0718 5348 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
5349 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5350
5351 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
5352 "(%d):2571 Mailbox cmd x%x Status x%x "
5353 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5354 "x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5355 "CQ: x%x x%x x%x x%x\n",
5356 mboxq->vport ? mboxq->vport->vpi : 0,
5357 bf_get(lpfc_mqe_command, mqe),
5358 bf_get(lpfc_mqe_status, mqe),
5359 mqe->un.mb_words[0], mqe->un.mb_words[1],
5360 mqe->un.mb_words[2], mqe->un.mb_words[3],
5361 mqe->un.mb_words[4], mqe->un.mb_words[5],
5362 mqe->un.mb_words[6], mqe->un.mb_words[7],
5363 mqe->un.mb_words[8], mqe->un.mb_words[9],
5364 mqe->un.mb_words[10], mqe->un.mb_words[11],
5365 mqe->un.mb_words[12], mqe->un.mb_words[13],
5366 mqe->un.mb_words[14], mqe->un.mb_words[15],
5367 mqe->un.mb_words[16], mqe->un.mb_words[50],
5368 mboxq->mcqe.word0,
5369 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
5370 mboxq->mcqe.trailer);
5371
5372 if (rc) {
5373 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5374 kfree(mp);
ff78d8f9
JS
5375 rc = -EIO;
5376 goto out_free_mboxq;
da0436e9
JS
5377 }
5378 data_length = mqe->un.mb_words[5];
a0c87cbd 5379 if (data_length > DMP_RGN23_SIZE) {
d11e31dd
JS
5380 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5381 kfree(mp);
ff78d8f9
JS
5382 rc = -EIO;
5383 goto out_free_mboxq;
d11e31dd 5384 }
dea3101e 5385
da0436e9
JS
5386 lpfc_parse_fcoe_conf(phba, mp->virt, data_length);
5387 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5388 kfree(mp);
ff78d8f9
JS
5389 rc = 0;
5390
5391out_free_mboxq:
5392 mempool_free(mboxq, phba->mbox_mem_pool);
5393 return rc;
da0436e9 5394}
e59058c4
JS
5395
5396/**
da0436e9
JS
5397 * lpfc_sli4_read_rev - Issue READ_REV and collect vpd data
5398 * @phba: pointer to lpfc hba data structure.
5399 * @mboxq: pointer to the LPFC_MBOXQ_t structure.
5400 * @vpd: pointer to the memory to hold resulting port vpd data.
5401 * @vpd_size: On input, the number of bytes allocated to @vpd.
5402 * On output, the number of data bytes in @vpd.
e59058c4 5403 *
da0436e9
JS
5404 * This routine executes a READ_REV SLI4 mailbox command. In
5405 * addition, this routine gets the port vpd data.
5406 *
5407 * Return codes
af901ca1 5408 * 0 - successful
d439d286 5409 * -ENOMEM - could not allocated memory.
e59058c4 5410 **/
da0436e9
JS
5411static int
5412lpfc_sli4_read_rev(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
5413 uint8_t *vpd, uint32_t *vpd_size)
dea3101e 5414{
da0436e9
JS
5415 int rc = 0;
5416 uint32_t dma_size;
5417 struct lpfc_dmabuf *dmabuf;
5418 struct lpfc_mqe *mqe;
dea3101e 5419
da0436e9
JS
5420 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
5421 if (!dmabuf)
5422 return -ENOMEM;
5423
5424 /*
5425 * Get a DMA buffer for the vpd data resulting from the READ_REV
5426 * mailbox command.
a257bf90 5427 */
da0436e9 5428 dma_size = *vpd_size;
750afb08
LC
5429 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, dma_size,
5430 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
5431 if (!dmabuf->virt) {
5432 kfree(dmabuf);
5433 return -ENOMEM;
a257bf90
JS
5434 }
5435
da0436e9
JS
5436 /*
5437 * The SLI4 implementation of READ_REV conflicts at word1,
5438 * bits 31:16 and SLI4 adds vpd functionality not present
5439 * in SLI3. This code corrects the conflicts.
1dcb58e5 5440 */
da0436e9
JS
5441 lpfc_read_rev(phba, mboxq);
5442 mqe = &mboxq->u.mqe;
5443 mqe->un.read_rev.vpd_paddr_high = putPaddrHigh(dmabuf->phys);
5444 mqe->un.read_rev.vpd_paddr_low = putPaddrLow(dmabuf->phys);
5445 mqe->un.read_rev.word1 &= 0x0000FFFF;
5446 bf_set(lpfc_mbx_rd_rev_vpd, &mqe->un.read_rev, 1);
5447 bf_set(lpfc_mbx_rd_rev_avail_len, &mqe->un.read_rev, dma_size);
5448
5449 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5450 if (rc) {
5451 dma_free_coherent(&phba->pcidev->dev, dma_size,
5452 dmabuf->virt, dmabuf->phys);
def9c7a9 5453 kfree(dmabuf);
da0436e9
JS
5454 return -EIO;
5455 }
1dcb58e5 5456
da0436e9
JS
5457 /*
5458 * The available vpd length cannot be bigger than the
5459 * DMA buffer passed to the port. Catch the less than
5460 * case and update the caller's size.
5461 */
5462 if (mqe->un.read_rev.avail_vpd_len < *vpd_size)
5463 *vpd_size = mqe->un.read_rev.avail_vpd_len;
3772a991 5464
d7c47992
JS
5465 memcpy(vpd, dmabuf->virt, *vpd_size);
5466
da0436e9
JS
5467 dma_free_coherent(&phba->pcidev->dev, dma_size,
5468 dmabuf->virt, dmabuf->phys);
5469 kfree(dmabuf);
5470 return 0;
dea3101e
JB
5471}
5472
cd1c8301 5473/**
b3b4f3e1 5474 * lpfc_sli4_get_ctl_attr - Retrieve SLI4 device controller attributes
cd1c8301
JS
5475 * @phba: pointer to lpfc hba data structure.
5476 *
5477 * This routine retrieves SLI4 device physical port name this PCI function
5478 * is attached to.
5479 *
5480 * Return codes
4907cb7b 5481 * 0 - successful
b3b4f3e1 5482 * otherwise - failed to retrieve controller attributes
cd1c8301
JS
5483 **/
5484static int
b3b4f3e1 5485lpfc_sli4_get_ctl_attr(struct lpfc_hba *phba)
cd1c8301
JS
5486{
5487 LPFC_MBOXQ_t *mboxq;
cd1c8301
JS
5488 struct lpfc_mbx_get_cntl_attributes *mbx_cntl_attr;
5489 struct lpfc_controller_attribute *cntl_attr;
cd1c8301
JS
5490 void *virtaddr = NULL;
5491 uint32_t alloclen, reqlen;
5492 uint32_t shdr_status, shdr_add_status;
5493 union lpfc_sli4_cfg_shdr *shdr;
cd1c8301
JS
5494 int rc;
5495
cd1c8301
JS
5496 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5497 if (!mboxq)
5498 return -ENOMEM;
cd1c8301 5499
b3b4f3e1 5500 /* Send COMMON_GET_CNTL_ATTRIBUTES mbox cmd */
cd1c8301
JS
5501 reqlen = sizeof(struct lpfc_mbx_get_cntl_attributes);
5502 alloclen = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5503 LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES, reqlen,
5504 LPFC_SLI4_MBX_NEMBED);
b3b4f3e1 5505
cd1c8301 5506 if (alloclen < reqlen) {
372c187b 5507 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
cd1c8301
JS
5508 "3084 Allocated DMA memory size (%d) is "
5509 "less than the requested DMA memory size "
5510 "(%d)\n", alloclen, reqlen);
5511 rc = -ENOMEM;
5512 goto out_free_mboxq;
5513 }
5514 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5515 virtaddr = mboxq->sge_array->addr[0];
5516 mbx_cntl_attr = (struct lpfc_mbx_get_cntl_attributes *)virtaddr;
5517 shdr = &mbx_cntl_attr->cfg_shdr;
5518 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5519 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5520 if (shdr_status || shdr_add_status || rc) {
5521 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5522 "3085 Mailbox x%x (x%x/x%x) failed, "
5523 "rc:x%x, status:x%x, add_status:x%x\n",
5524 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5525 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5526 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5527 rc, shdr_status, shdr_add_status);
5528 rc = -ENXIO;
5529 goto out_free_mboxq;
5530 }
b3b4f3e1 5531
cd1c8301
JS
5532 cntl_attr = &mbx_cntl_attr->cntl_attr;
5533 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
5534 phba->sli4_hba.lnk_info.lnk_tp =
5535 bf_get(lpfc_cntl_attr_lnk_type, cntl_attr);
5536 phba->sli4_hba.lnk_info.lnk_no =
5537 bf_get(lpfc_cntl_attr_lnk_numb, cntl_attr);
b3b4f3e1
JS
5538
5539 memset(phba->BIOSVersion, 0, sizeof(phba->BIOSVersion));
5540 strlcat(phba->BIOSVersion, (char *)cntl_attr->bios_ver_str,
5541 sizeof(phba->BIOSVersion));
5542
cd1c8301 5543 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
b3b4f3e1 5544 "3086 lnk_type:%d, lnk_numb:%d, bios_ver:%s\n",
cd1c8301 5545 phba->sli4_hba.lnk_info.lnk_tp,
b3b4f3e1
JS
5546 phba->sli4_hba.lnk_info.lnk_no,
5547 phba->BIOSVersion);
5548out_free_mboxq:
5549 if (rc != MBX_TIMEOUT) {
5550 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5551 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5552 else
5553 mempool_free(mboxq, phba->mbox_mem_pool);
5554 }
5555 return rc;
5556}
5557
5558/**
5559 * lpfc_sli4_retrieve_pport_name - Retrieve SLI4 device physical port name
5560 * @phba: pointer to lpfc hba data structure.
5561 *
5562 * This routine retrieves SLI4 device physical port name this PCI function
5563 * is attached to.
5564 *
5565 * Return codes
5566 * 0 - successful
5567 * otherwise - failed to retrieve physical port name
5568 **/
5569static int
5570lpfc_sli4_retrieve_pport_name(struct lpfc_hba *phba)
5571{
5572 LPFC_MBOXQ_t *mboxq;
5573 struct lpfc_mbx_get_port_name *get_port_name;
5574 uint32_t shdr_status, shdr_add_status;
5575 union lpfc_sli4_cfg_shdr *shdr;
5576 char cport_name = 0;
5577 int rc;
5578
5579 /* We assume nothing at this point */
5580 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5581 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_NON;
5582
5583 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5584 if (!mboxq)
5585 return -ENOMEM;
5586 /* obtain link type and link number via READ_CONFIG */
5587 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5588 lpfc_sli4_read_config(phba);
5589 if (phba->sli4_hba.lnk_info.lnk_dv == LPFC_LNK_DAT_VAL)
5590 goto retrieve_ppname;
5591
5592 /* obtain link type and link number via COMMON_GET_CNTL_ATTRIBUTES */
5593 rc = lpfc_sli4_get_ctl_attr(phba);
5594 if (rc)
5595 goto out_free_mboxq;
cd1c8301
JS
5596
5597retrieve_ppname:
5598 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5599 LPFC_MBOX_OPCODE_GET_PORT_NAME,
5600 sizeof(struct lpfc_mbx_get_port_name) -
5601 sizeof(struct lpfc_sli4_cfg_mhdr),
5602 LPFC_SLI4_MBX_EMBED);
5603 get_port_name = &mboxq->u.mqe.un.get_port_name;
5604 shdr = (union lpfc_sli4_cfg_shdr *)&get_port_name->header.cfg_shdr;
5605 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_OPCODE_VERSION_1);
5606 bf_set(lpfc_mbx_get_port_name_lnk_type, &get_port_name->u.request,
5607 phba->sli4_hba.lnk_info.lnk_tp);
5608 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5609 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5610 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5611 if (shdr_status || shdr_add_status || rc) {
5612 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5613 "3087 Mailbox x%x (x%x/x%x) failed: "
5614 "rc:x%x, status:x%x, add_status:x%x\n",
5615 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5616 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5617 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5618 rc, shdr_status, shdr_add_status);
5619 rc = -ENXIO;
5620 goto out_free_mboxq;
5621 }
5622 switch (phba->sli4_hba.lnk_info.lnk_no) {
5623 case LPFC_LINK_NUMBER_0:
5624 cport_name = bf_get(lpfc_mbx_get_port_name_name0,
5625 &get_port_name->u.response);
5626 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5627 break;
5628 case LPFC_LINK_NUMBER_1:
5629 cport_name = bf_get(lpfc_mbx_get_port_name_name1,
5630 &get_port_name->u.response);
5631 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5632 break;
5633 case LPFC_LINK_NUMBER_2:
5634 cport_name = bf_get(lpfc_mbx_get_port_name_name2,
5635 &get_port_name->u.response);
5636 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5637 break;
5638 case LPFC_LINK_NUMBER_3:
5639 cport_name = bf_get(lpfc_mbx_get_port_name_name3,
5640 &get_port_name->u.response);
5641 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5642 break;
5643 default:
5644 break;
5645 }
5646
5647 if (phba->sli4_hba.pport_name_sta == LPFC_SLI4_PPNAME_GET) {
5648 phba->Port[0] = cport_name;
5649 phba->Port[1] = '\0';
5650 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5651 "3091 SLI get port name: %s\n", phba->Port);
5652 }
5653
5654out_free_mboxq:
5655 if (rc != MBX_TIMEOUT) {
5656 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5657 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5658 else
5659 mempool_free(mboxq, phba->mbox_mem_pool);
5660 }
5661 return rc;
5662}
5663
e59058c4 5664/**
da0436e9
JS
5665 * lpfc_sli4_arm_cqeq_intr - Arm sli-4 device completion and event queues
5666 * @phba: pointer to lpfc hba data structure.
e59058c4 5667 *
da0436e9
JS
5668 * This routine is called to explicitly arm the SLI4 device's completion and
5669 * event queues
5670 **/
5671static void
5672lpfc_sli4_arm_cqeq_intr(struct lpfc_hba *phba)
5673{
895427bd 5674 int qidx;
b71413dd 5675 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
cdb42bec 5676 struct lpfc_sli4_hdw_queue *qp;
657add4e 5677 struct lpfc_queue *eq;
da0436e9 5678
32517fc0
JS
5679 sli4_hba->sli4_write_cq_db(phba, sli4_hba->mbx_cq, 0, LPFC_QUEUE_REARM);
5680 sli4_hba->sli4_write_cq_db(phba, sli4_hba->els_cq, 0, LPFC_QUEUE_REARM);
b71413dd 5681 if (sli4_hba->nvmels_cq)
32517fc0
JS
5682 sli4_hba->sli4_write_cq_db(phba, sli4_hba->nvmels_cq, 0,
5683 LPFC_QUEUE_REARM);
1ba981fd 5684
cdb42bec 5685 if (sli4_hba->hdwq) {
657add4e 5686 /* Loop thru all Hardware Queues */
cdb42bec 5687 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
657add4e
JS
5688 qp = &sli4_hba->hdwq[qidx];
5689 /* ARM the corresponding CQ */
01f2ef6d 5690 sli4_hba->sli4_write_cq_db(phba, qp->io_cq, 0,
c00f62e6 5691 LPFC_QUEUE_REARM);
cdb42bec 5692 }
1ba981fd 5693
657add4e
JS
5694 /* Loop thru all IRQ vectors */
5695 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
5696 eq = sli4_hba->hba_eq_hdl[qidx].eq;
5697 /* ARM the corresponding EQ */
5698 sli4_hba->sli4_write_eq_db(phba, eq,
5699 0, LPFC_QUEUE_REARM);
5700 }
cdb42bec 5701 }
1ba981fd 5702
2d7dbc4c
JS
5703 if (phba->nvmet_support) {
5704 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) {
32517fc0
JS
5705 sli4_hba->sli4_write_cq_db(phba,
5706 sli4_hba->nvmet_cqset[qidx], 0,
2d7dbc4c
JS
5707 LPFC_QUEUE_REARM);
5708 }
2e90f4b5 5709 }
da0436e9
JS
5710}
5711
6d368e53
JS
5712/**
5713 * lpfc_sli4_get_avail_extnt_rsrc - Get available resource extent count.
5714 * @phba: Pointer to HBA context object.
5715 * @type: The resource extent type.
b76f2dc9
JS
5716 * @extnt_count: buffer to hold port available extent count.
5717 * @extnt_size: buffer to hold element count per extent.
6d368e53 5718 *
b76f2dc9
JS
5719 * This function calls the port and retrievs the number of available
5720 * extents and their size for a particular extent type.
5721 *
5722 * Returns: 0 if successful. Nonzero otherwise.
6d368e53 5723 **/
b76f2dc9 5724int
6d368e53
JS
5725lpfc_sli4_get_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type,
5726 uint16_t *extnt_count, uint16_t *extnt_size)
5727{
5728 int rc = 0;
5729 uint32_t length;
5730 uint32_t mbox_tmo;
5731 struct lpfc_mbx_get_rsrc_extent_info *rsrc_info;
5732 LPFC_MBOXQ_t *mbox;
5733
5734 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5735 if (!mbox)
5736 return -ENOMEM;
5737
5738 /* Find out how many extents are available for this resource type */
5739 length = (sizeof(struct lpfc_mbx_get_rsrc_extent_info) -
5740 sizeof(struct lpfc_sli4_cfg_mhdr));
5741 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5742 LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO,
5743 length, LPFC_SLI4_MBX_EMBED);
5744
5745 /* Send an extents count of 0 - the GET doesn't use it. */
5746 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
5747 LPFC_SLI4_MBX_EMBED);
5748 if (unlikely(rc)) {
5749 rc = -EIO;
5750 goto err_exit;
5751 }
5752
5753 if (!phba->sli4_hba.intr_enable)
5754 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5755 else {
a183a15f 5756 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5757 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5758 }
5759 if (unlikely(rc)) {
5760 rc = -EIO;
5761 goto err_exit;
5762 }
5763
5764 rsrc_info = &mbox->u.mqe.un.rsrc_extent_info;
5765 if (bf_get(lpfc_mbox_hdr_status,
5766 &rsrc_info->header.cfg_shdr.response)) {
372c187b 5767 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6d368e53
JS
5768 "2930 Failed to get resource extents "
5769 "Status 0x%x Add'l Status 0x%x\n",
5770 bf_get(lpfc_mbox_hdr_status,
5771 &rsrc_info->header.cfg_shdr.response),
5772 bf_get(lpfc_mbox_hdr_add_status,
5773 &rsrc_info->header.cfg_shdr.response));
5774 rc = -EIO;
5775 goto err_exit;
5776 }
5777
5778 *extnt_count = bf_get(lpfc_mbx_get_rsrc_extent_info_cnt,
5779 &rsrc_info->u.rsp);
5780 *extnt_size = bf_get(lpfc_mbx_get_rsrc_extent_info_size,
5781 &rsrc_info->u.rsp);
8a9d2e80
JS
5782
5783 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5784 "3162 Retrieved extents type-%d from port: count:%d, "
5785 "size:%d\n", type, *extnt_count, *extnt_size);
5786
5787err_exit:
6d368e53
JS
5788 mempool_free(mbox, phba->mbox_mem_pool);
5789 return rc;
5790}
5791
5792/**
5793 * lpfc_sli4_chk_avail_extnt_rsrc - Check for available SLI4 resource extents.
5794 * @phba: Pointer to HBA context object.
5795 * @type: The extent type to check.
5796 *
5797 * This function reads the current available extents from the port and checks
5798 * if the extent count or extent size has changed since the last access.
5799 * Callers use this routine post port reset to understand if there is a
5800 * extent reprovisioning requirement.
5801 *
5802 * Returns:
5803 * -Error: error indicates problem.
5804 * 1: Extent count or size has changed.
5805 * 0: No changes.
5806 **/
5807static int
5808lpfc_sli4_chk_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type)
5809{
5810 uint16_t curr_ext_cnt, rsrc_ext_cnt;
5811 uint16_t size_diff, rsrc_ext_size;
5812 int rc = 0;
5813 struct lpfc_rsrc_blks *rsrc_entry;
5814 struct list_head *rsrc_blk_list = NULL;
5815
5816 size_diff = 0;
5817 curr_ext_cnt = 0;
5818 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5819 &rsrc_ext_cnt,
5820 &rsrc_ext_size);
5821 if (unlikely(rc))
5822 return -EIO;
5823
5824 switch (type) {
5825 case LPFC_RSC_TYPE_FCOE_RPI:
5826 rsrc_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5827 break;
5828 case LPFC_RSC_TYPE_FCOE_VPI:
5829 rsrc_blk_list = &phba->lpfc_vpi_blk_list;
5830 break;
5831 case LPFC_RSC_TYPE_FCOE_XRI:
5832 rsrc_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5833 break;
5834 case LPFC_RSC_TYPE_FCOE_VFI:
5835 rsrc_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5836 break;
5837 default:
5838 break;
5839 }
5840
5841 list_for_each_entry(rsrc_entry, rsrc_blk_list, list) {
5842 curr_ext_cnt++;
5843 if (rsrc_entry->rsrc_size != rsrc_ext_size)
5844 size_diff++;
5845 }
5846
5847 if (curr_ext_cnt != rsrc_ext_cnt || size_diff != 0)
5848 rc = 1;
5849
5850 return rc;
5851}
5852
5853/**
5854 * lpfc_sli4_cfg_post_extnts -
5855 * @phba: Pointer to HBA context object.
7af29d45
LJ
5856 * @extnt_cnt: number of available extents.
5857 * @type: the extent type (rpi, xri, vfi, vpi).
5858 * @emb: buffer to hold either MBX_EMBED or MBX_NEMBED operation.
5859 * @mbox: pointer to the caller's allocated mailbox structure.
6d368e53
JS
5860 *
5861 * This function executes the extents allocation request. It also
5862 * takes care of the amount of memory needed to allocate or get the
5863 * allocated extents. It is the caller's responsibility to evaluate
5864 * the response.
5865 *
5866 * Returns:
5867 * -Error: Error value describes the condition found.
5868 * 0: if successful
5869 **/
5870static int
8a9d2e80 5871lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t extnt_cnt,
6d368e53
JS
5872 uint16_t type, bool *emb, LPFC_MBOXQ_t *mbox)
5873{
5874 int rc = 0;
5875 uint32_t req_len;
5876 uint32_t emb_len;
5877 uint32_t alloc_len, mbox_tmo;
5878
5879 /* Calculate the total requested length of the dma memory */
8a9d2e80 5880 req_len = extnt_cnt * sizeof(uint16_t);
6d368e53
JS
5881
5882 /*
5883 * Calculate the size of an embedded mailbox. The uint32_t
5884 * accounts for extents-specific word.
5885 */
5886 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
5887 sizeof(uint32_t);
5888
5889 /*
5890 * Presume the allocation and response will fit into an embedded
5891 * mailbox. If not true, reconfigure to a non-embedded mailbox.
5892 */
5893 *emb = LPFC_SLI4_MBX_EMBED;
5894 if (req_len > emb_len) {
8a9d2e80 5895 req_len = extnt_cnt * sizeof(uint16_t) +
6d368e53
JS
5896 sizeof(union lpfc_sli4_cfg_shdr) +
5897 sizeof(uint32_t);
5898 *emb = LPFC_SLI4_MBX_NEMBED;
5899 }
5900
5901 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5902 LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT,
5903 req_len, *emb);
5904 if (alloc_len < req_len) {
372c187b 5905 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
b76f2dc9 5906 "2982 Allocated DMA memory size (x%x) is "
6d368e53
JS
5907 "less than the requested DMA memory "
5908 "size (x%x)\n", alloc_len, req_len);
5909 return -ENOMEM;
5910 }
8a9d2e80 5911 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, extnt_cnt, type, *emb);
6d368e53
JS
5912 if (unlikely(rc))
5913 return -EIO;
5914
5915 if (!phba->sli4_hba.intr_enable)
5916 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5917 else {
a183a15f 5918 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5919 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5920 }
5921
5922 if (unlikely(rc))
5923 rc = -EIO;
5924 return rc;
5925}
5926
5927/**
5928 * lpfc_sli4_alloc_extent - Allocate an SLI4 resource extent.
5929 * @phba: Pointer to HBA context object.
5930 * @type: The resource extent type to allocate.
5931 *
5932 * This function allocates the number of elements for the specified
5933 * resource type.
5934 **/
5935static int
5936lpfc_sli4_alloc_extent(struct lpfc_hba *phba, uint16_t type)
5937{
5938 bool emb = false;
5939 uint16_t rsrc_id_cnt, rsrc_cnt, rsrc_size;
5940 uint16_t rsrc_id, rsrc_start, j, k;
5941 uint16_t *ids;
5942 int i, rc;
5943 unsigned long longs;
5944 unsigned long *bmask;
5945 struct lpfc_rsrc_blks *rsrc_blks;
5946 LPFC_MBOXQ_t *mbox;
5947 uint32_t length;
5948 struct lpfc_id_range *id_array = NULL;
5949 void *virtaddr = NULL;
5950 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
5951 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
5952 struct list_head *ext_blk_list;
5953
5954 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5955 &rsrc_cnt,
5956 &rsrc_size);
5957 if (unlikely(rc))
5958 return -EIO;
5959
5960 if ((rsrc_cnt == 0) || (rsrc_size == 0)) {
372c187b 5961 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6d368e53
JS
5962 "3009 No available Resource Extents "
5963 "for resource type 0x%x: Count: 0x%x, "
5964 "Size 0x%x\n", type, rsrc_cnt,
5965 rsrc_size);
5966 return -ENOMEM;
5967 }
5968
8a9d2e80
JS
5969 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_INIT | LOG_SLI,
5970 "2903 Post resource extents type-0x%x: "
5971 "count:%d, size %d\n", type, rsrc_cnt, rsrc_size);
6d368e53
JS
5972
5973 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5974 if (!mbox)
5975 return -ENOMEM;
5976
8a9d2e80 5977 rc = lpfc_sli4_cfg_post_extnts(phba, rsrc_cnt, type, &emb, mbox);
6d368e53
JS
5978 if (unlikely(rc)) {
5979 rc = -EIO;
5980 goto err_exit;
5981 }
5982
5983 /*
5984 * Figure out where the response is located. Then get local pointers
5985 * to the response data. The port does not guarantee to respond to
5986 * all extents counts request so update the local variable with the
5987 * allocated count from the port.
5988 */
5989 if (emb == LPFC_SLI4_MBX_EMBED) {
5990 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
5991 id_array = &rsrc_ext->u.rsp.id[0];
5992 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
5993 } else {
5994 virtaddr = mbox->sge_array->addr[0];
5995 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
5996 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
5997 id_array = &n_rsrc->id;
5998 }
5999
6000 longs = ((rsrc_cnt * rsrc_size) + BITS_PER_LONG - 1) / BITS_PER_LONG;
6001 rsrc_id_cnt = rsrc_cnt * rsrc_size;
6002
6003 /*
6004 * Based on the resource size and count, correct the base and max
6005 * resource values.
6006 */
6007 length = sizeof(struct lpfc_rsrc_blks);
6008 switch (type) {
6009 case LPFC_RSC_TYPE_FCOE_RPI:
6396bb22 6010 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
6011 sizeof(unsigned long),
6012 GFP_KERNEL);
6013 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
6014 rc = -ENOMEM;
6015 goto err_exit;
6016 }
6396bb22 6017 phba->sli4_hba.rpi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
6018 sizeof(uint16_t),
6019 GFP_KERNEL);
6020 if (unlikely(!phba->sli4_hba.rpi_ids)) {
6021 kfree(phba->sli4_hba.rpi_bmask);
6022 rc = -ENOMEM;
6023 goto err_exit;
6024 }
6025
6026 /*
6027 * The next_rpi was initialized with the maximum available
6028 * count but the port may allocate a smaller number. Catch
6029 * that case and update the next_rpi.
6030 */
6031 phba->sli4_hba.next_rpi = rsrc_id_cnt;
6032
6033 /* Initialize local ptrs for common extent processing later. */
6034 bmask = phba->sli4_hba.rpi_bmask;
6035 ids = phba->sli4_hba.rpi_ids;
6036 ext_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
6037 break;
6038 case LPFC_RSC_TYPE_FCOE_VPI:
6396bb22 6039 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
6040 GFP_KERNEL);
6041 if (unlikely(!phba->vpi_bmask)) {
6042 rc = -ENOMEM;
6043 goto err_exit;
6044 }
6396bb22 6045 phba->vpi_ids = kcalloc(rsrc_id_cnt, sizeof(uint16_t),
6d368e53
JS
6046 GFP_KERNEL);
6047 if (unlikely(!phba->vpi_ids)) {
6048 kfree(phba->vpi_bmask);
6049 rc = -ENOMEM;
6050 goto err_exit;
6051 }
6052
6053 /* Initialize local ptrs for common extent processing later. */
6054 bmask = phba->vpi_bmask;
6055 ids = phba->vpi_ids;
6056 ext_blk_list = &phba->lpfc_vpi_blk_list;
6057 break;
6058 case LPFC_RSC_TYPE_FCOE_XRI:
6396bb22 6059 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
6060 sizeof(unsigned long),
6061 GFP_KERNEL);
6062 if (unlikely(!phba->sli4_hba.xri_bmask)) {
6063 rc = -ENOMEM;
6064 goto err_exit;
6065 }
8a9d2e80 6066 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 6067 phba->sli4_hba.xri_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
6068 sizeof(uint16_t),
6069 GFP_KERNEL);
6070 if (unlikely(!phba->sli4_hba.xri_ids)) {
6071 kfree(phba->sli4_hba.xri_bmask);
6072 rc = -ENOMEM;
6073 goto err_exit;
6074 }
6075
6076 /* Initialize local ptrs for common extent processing later. */
6077 bmask = phba->sli4_hba.xri_bmask;
6078 ids = phba->sli4_hba.xri_ids;
6079 ext_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
6080 break;
6081 case LPFC_RSC_TYPE_FCOE_VFI:
6396bb22 6082 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
6083 sizeof(unsigned long),
6084 GFP_KERNEL);
6085 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
6086 rc = -ENOMEM;
6087 goto err_exit;
6088 }
6396bb22 6089 phba->sli4_hba.vfi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
6090 sizeof(uint16_t),
6091 GFP_KERNEL);
6092 if (unlikely(!phba->sli4_hba.vfi_ids)) {
6093 kfree(phba->sli4_hba.vfi_bmask);
6094 rc = -ENOMEM;
6095 goto err_exit;
6096 }
6097
6098 /* Initialize local ptrs for common extent processing later. */
6099 bmask = phba->sli4_hba.vfi_bmask;
6100 ids = phba->sli4_hba.vfi_ids;
6101 ext_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
6102 break;
6103 default:
6104 /* Unsupported Opcode. Fail call. */
6105 id_array = NULL;
6106 bmask = NULL;
6107 ids = NULL;
6108 ext_blk_list = NULL;
6109 goto err_exit;
6110 }
6111
6112 /*
6113 * Complete initializing the extent configuration with the
6114 * allocated ids assigned to this function. The bitmask serves
6115 * as an index into the array and manages the available ids. The
6116 * array just stores the ids communicated to the port via the wqes.
6117 */
6118 for (i = 0, j = 0, k = 0; i < rsrc_cnt; i++) {
6119 if ((i % 2) == 0)
6120 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_0,
6121 &id_array[k]);
6122 else
6123 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_1,
6124 &id_array[k]);
6125
6126 rsrc_blks = kzalloc(length, GFP_KERNEL);
6127 if (unlikely(!rsrc_blks)) {
6128 rc = -ENOMEM;
6129 kfree(bmask);
6130 kfree(ids);
6131 goto err_exit;
6132 }
6133 rsrc_blks->rsrc_start = rsrc_id;
6134 rsrc_blks->rsrc_size = rsrc_size;
6135 list_add_tail(&rsrc_blks->list, ext_blk_list);
6136 rsrc_start = rsrc_id;
895427bd 6137 if ((type == LPFC_RSC_TYPE_FCOE_XRI) && (j == 0)) {
5e5b511d 6138 phba->sli4_hba.io_xri_start = rsrc_start +
895427bd 6139 lpfc_sli4_get_iocb_cnt(phba);
895427bd 6140 }
6d368e53
JS
6141
6142 while (rsrc_id < (rsrc_start + rsrc_size)) {
6143 ids[j] = rsrc_id;
6144 rsrc_id++;
6145 j++;
6146 }
6147 /* Entire word processed. Get next word.*/
6148 if ((i % 2) == 1)
6149 k++;
6150 }
6151 err_exit:
6152 lpfc_sli4_mbox_cmd_free(phba, mbox);
6153 return rc;
6154}
6155
895427bd
JS
6156
6157
6d368e53
JS
6158/**
6159 * lpfc_sli4_dealloc_extent - Deallocate an SLI4 resource extent.
6160 * @phba: Pointer to HBA context object.
6161 * @type: the extent's type.
6162 *
6163 * This function deallocates all extents of a particular resource type.
6164 * SLI4 does not allow for deallocating a particular extent range. It
6165 * is the caller's responsibility to release all kernel memory resources.
6166 **/
6167static int
6168lpfc_sli4_dealloc_extent(struct lpfc_hba *phba, uint16_t type)
6169{
6170 int rc;
6171 uint32_t length, mbox_tmo = 0;
6172 LPFC_MBOXQ_t *mbox;
6173 struct lpfc_mbx_dealloc_rsrc_extents *dealloc_rsrc;
6174 struct lpfc_rsrc_blks *rsrc_blk, *rsrc_blk_next;
6175
6176 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6177 if (!mbox)
6178 return -ENOMEM;
6179
6180 /*
6181 * This function sends an embedded mailbox because it only sends the
6182 * the resource type. All extents of this type are released by the
6183 * port.
6184 */
6185 length = (sizeof(struct lpfc_mbx_dealloc_rsrc_extents) -
6186 sizeof(struct lpfc_sli4_cfg_mhdr));
6187 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6188 LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT,
6189 length, LPFC_SLI4_MBX_EMBED);
6190
6191 /* Send an extents count of 0 - the dealloc doesn't use it. */
6192 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
6193 LPFC_SLI4_MBX_EMBED);
6194 if (unlikely(rc)) {
6195 rc = -EIO;
6196 goto out_free_mbox;
6197 }
6198 if (!phba->sli4_hba.intr_enable)
6199 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6200 else {
a183a15f 6201 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
6202 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6203 }
6204 if (unlikely(rc)) {
6205 rc = -EIO;
6206 goto out_free_mbox;
6207 }
6208
6209 dealloc_rsrc = &mbox->u.mqe.un.dealloc_rsrc_extents;
6210 if (bf_get(lpfc_mbox_hdr_status,
6211 &dealloc_rsrc->header.cfg_shdr.response)) {
372c187b 6212 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6d368e53
JS
6213 "2919 Failed to release resource extents "
6214 "for type %d - Status 0x%x Add'l Status 0x%x. "
6215 "Resource memory not released.\n",
6216 type,
6217 bf_get(lpfc_mbox_hdr_status,
6218 &dealloc_rsrc->header.cfg_shdr.response),
6219 bf_get(lpfc_mbox_hdr_add_status,
6220 &dealloc_rsrc->header.cfg_shdr.response));
6221 rc = -EIO;
6222 goto out_free_mbox;
6223 }
6224
6225 /* Release kernel memory resources for the specific type. */
6226 switch (type) {
6227 case LPFC_RSC_TYPE_FCOE_VPI:
6228 kfree(phba->vpi_bmask);
6229 kfree(phba->vpi_ids);
6230 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6231 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6232 &phba->lpfc_vpi_blk_list, list) {
6233 list_del_init(&rsrc_blk->list);
6234 kfree(rsrc_blk);
6235 }
16a3a208 6236 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6237 break;
6238 case LPFC_RSC_TYPE_FCOE_XRI:
6239 kfree(phba->sli4_hba.xri_bmask);
6240 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6241 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6242 &phba->sli4_hba.lpfc_xri_blk_list, list) {
6243 list_del_init(&rsrc_blk->list);
6244 kfree(rsrc_blk);
6245 }
6246 break;
6247 case LPFC_RSC_TYPE_FCOE_VFI:
6248 kfree(phba->sli4_hba.vfi_bmask);
6249 kfree(phba->sli4_hba.vfi_ids);
6250 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6251 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6252 &phba->sli4_hba.lpfc_vfi_blk_list, list) {
6253 list_del_init(&rsrc_blk->list);
6254 kfree(rsrc_blk);
6255 }
6256 break;
6257 case LPFC_RSC_TYPE_FCOE_RPI:
6258 /* RPI bitmask and physical id array are cleaned up earlier. */
6259 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6260 &phba->sli4_hba.lpfc_rpi_blk_list, list) {
6261 list_del_init(&rsrc_blk->list);
6262 kfree(rsrc_blk);
6263 }
6264 break;
6265 default:
6266 break;
6267 }
6268
6269 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6270
6271 out_free_mbox:
6272 mempool_free(mbox, phba->mbox_mem_pool);
6273 return rc;
6274}
6275
bd4b3e5c 6276static void
7bdedb34
JS
6277lpfc_set_features(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox,
6278 uint32_t feature)
65791f1f 6279{
65791f1f 6280 uint32_t len;
65791f1f 6281
65791f1f
JS
6282 len = sizeof(struct lpfc_mbx_set_feature) -
6283 sizeof(struct lpfc_sli4_cfg_mhdr);
6284 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6285 LPFC_MBOX_OPCODE_SET_FEATURES, len,
6286 LPFC_SLI4_MBX_EMBED);
7bdedb34
JS
6287
6288 switch (feature) {
6289 case LPFC_SET_UE_RECOVERY:
6290 bf_set(lpfc_mbx_set_feature_UER,
6291 &mbox->u.mqe.un.set_feature, 1);
6292 mbox->u.mqe.un.set_feature.feature = LPFC_SET_UE_RECOVERY;
6293 mbox->u.mqe.un.set_feature.param_len = 8;
6294 break;
6295 case LPFC_SET_MDS_DIAGS:
6296 bf_set(lpfc_mbx_set_feature_mds,
6297 &mbox->u.mqe.un.set_feature, 1);
6298 bf_set(lpfc_mbx_set_feature_mds_deep_loopbk,
ae9e28f3 6299 &mbox->u.mqe.un.set_feature, 1);
7bdedb34
JS
6300 mbox->u.mqe.un.set_feature.feature = LPFC_SET_MDS_DIAGS;
6301 mbox->u.mqe.un.set_feature.param_len = 8;
6302 break;
171f6c41
JS
6303 case LPFC_SET_DUAL_DUMP:
6304 bf_set(lpfc_mbx_set_feature_dd,
6305 &mbox->u.mqe.un.set_feature, LPFC_ENABLE_DUAL_DUMP);
6306 bf_set(lpfc_mbx_set_feature_ddquery,
6307 &mbox->u.mqe.un.set_feature, 0);
6308 mbox->u.mqe.un.set_feature.feature = LPFC_SET_DUAL_DUMP;
6309 mbox->u.mqe.un.set_feature.param_len = 4;
6310 break;
65791f1f 6311 }
7bdedb34
JS
6312
6313 return;
65791f1f
JS
6314}
6315
1165a5c2
JS
6316/**
6317 * lpfc_ras_stop_fwlog: Disable FW logging by the adapter
6318 * @phba: Pointer to HBA context object.
6319 *
6320 * Disable FW logging into host memory on the adapter. To
6321 * be done before reading logs from the host memory.
6322 **/
6323void
6324lpfc_ras_stop_fwlog(struct lpfc_hba *phba)
6325{
6326 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6327
95bfc6d8
JS
6328 spin_lock_irq(&phba->hbalock);
6329 ras_fwlog->state = INACTIVE;
6330 spin_unlock_irq(&phba->hbalock);
1165a5c2
JS
6331
6332 /* Disable FW logging to host memory */
6333 writel(LPFC_CTL_PDEV_CTL_DDL_RAS,
6334 phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PDEV_CTL_OFFSET);
95bfc6d8
JS
6335
6336 /* Wait 10ms for firmware to stop using DMA buffer */
6337 usleep_range(10 * 1000, 20 * 1000);
1165a5c2
JS
6338}
6339
d2cc9bcd
JS
6340/**
6341 * lpfc_sli4_ras_dma_free - Free memory allocated for FW logging.
6342 * @phba: Pointer to HBA context object.
6343 *
6344 * This function is called to free memory allocated for RAS FW logging
6345 * support in the driver.
6346 **/
6347void
6348lpfc_sli4_ras_dma_free(struct lpfc_hba *phba)
6349{
6350 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6351 struct lpfc_dmabuf *dmabuf, *next;
6352
6353 if (!list_empty(&ras_fwlog->fwlog_buff_list)) {
6354 list_for_each_entry_safe(dmabuf, next,
6355 &ras_fwlog->fwlog_buff_list,
6356 list) {
6357 list_del(&dmabuf->list);
6358 dma_free_coherent(&phba->pcidev->dev,
6359 LPFC_RAS_MAX_ENTRY_SIZE,
6360 dmabuf->virt, dmabuf->phys);
6361 kfree(dmabuf);
6362 }
6363 }
6364
6365 if (ras_fwlog->lwpd.virt) {
6366 dma_free_coherent(&phba->pcidev->dev,
6367 sizeof(uint32_t) * 2,
6368 ras_fwlog->lwpd.virt,
6369 ras_fwlog->lwpd.phys);
6370 ras_fwlog->lwpd.virt = NULL;
6371 }
6372
95bfc6d8
JS
6373 spin_lock_irq(&phba->hbalock);
6374 ras_fwlog->state = INACTIVE;
6375 spin_unlock_irq(&phba->hbalock);
d2cc9bcd
JS
6376}
6377
6378/**
6379 * lpfc_sli4_ras_dma_alloc: Allocate memory for FW support
6380 * @phba: Pointer to HBA context object.
6381 * @fwlog_buff_count: Count of buffers to be created.
6382 *
6383 * This routine DMA memory for Log Write Position Data[LPWD] and buffer
6384 * to update FW log is posted to the adapter.
6385 * Buffer count is calculated based on module param ras_fwlog_buffsize
6386 * Size of each buffer posted to FW is 64K.
6387 **/
6388
6389static int
6390lpfc_sli4_ras_dma_alloc(struct lpfc_hba *phba,
6391 uint32_t fwlog_buff_count)
6392{
6393 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6394 struct lpfc_dmabuf *dmabuf;
6395 int rc = 0, i = 0;
6396
6397 /* Initialize List */
6398 INIT_LIST_HEAD(&ras_fwlog->fwlog_buff_list);
6399
6400 /* Allocate memory for the LWPD */
6401 ras_fwlog->lwpd.virt = dma_alloc_coherent(&phba->pcidev->dev,
6402 sizeof(uint32_t) * 2,
6403 &ras_fwlog->lwpd.phys,
6404 GFP_KERNEL);
6405 if (!ras_fwlog->lwpd.virt) {
372c187b 6406 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
d2cc9bcd
JS
6407 "6185 LWPD Memory Alloc Failed\n");
6408
6409 return -ENOMEM;
6410 }
6411
6412 ras_fwlog->fw_buffcount = fwlog_buff_count;
6413 for (i = 0; i < ras_fwlog->fw_buffcount; i++) {
6414 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
6415 GFP_KERNEL);
6416 if (!dmabuf) {
6417 rc = -ENOMEM;
6418 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6419 "6186 Memory Alloc failed FW logging");
6420 goto free_mem;
6421 }
6422
750afb08 6423 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
d2cc9bcd 6424 LPFC_RAS_MAX_ENTRY_SIZE,
750afb08 6425 &dmabuf->phys, GFP_KERNEL);
d2cc9bcd
JS
6426 if (!dmabuf->virt) {
6427 kfree(dmabuf);
6428 rc = -ENOMEM;
6429 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6430 "6187 DMA Alloc Failed FW logging");
6431 goto free_mem;
6432 }
d2cc9bcd
JS
6433 dmabuf->buffer_tag = i;
6434 list_add_tail(&dmabuf->list, &ras_fwlog->fwlog_buff_list);
6435 }
6436
6437free_mem:
6438 if (rc)
6439 lpfc_sli4_ras_dma_free(phba);
6440
6441 return rc;
6442}
6443
6444/**
6445 * lpfc_sli4_ras_mbox_cmpl: Completion handler for RAS MBX command
6446 * @phba: pointer to lpfc hba data structure.
7af29d45 6447 * @pmb: pointer to the driver internal queue element for mailbox command.
d2cc9bcd
JS
6448 *
6449 * Completion handler for driver's RAS MBX command to the device.
6450 **/
6451static void
6452lpfc_sli4_ras_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
6453{
6454 MAILBOX_t *mb;
6455 union lpfc_sli4_cfg_shdr *shdr;
6456 uint32_t shdr_status, shdr_add_status;
6457 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6458
6459 mb = &pmb->u.mb;
6460
6461 shdr = (union lpfc_sli4_cfg_shdr *)
6462 &pmb->u.mqe.un.ras_fwlog.header.cfg_shdr;
6463 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
6464 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
6465
6466 if (mb->mbxStatus != MBX_SUCCESS || shdr_status) {
372c187b 6467 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
d2cc9bcd
JS
6468 "6188 FW LOG mailbox "
6469 "completed with status x%x add_status x%x,"
6470 " mbx status x%x\n",
6471 shdr_status, shdr_add_status, mb->mbxStatus);
cb34990b
JS
6472
6473 ras_fwlog->ras_hwsupport = false;
d2cc9bcd
JS
6474 goto disable_ras;
6475 }
6476
95bfc6d8
JS
6477 spin_lock_irq(&phba->hbalock);
6478 ras_fwlog->state = ACTIVE;
6479 spin_unlock_irq(&phba->hbalock);
d2cc9bcd
JS
6480 mempool_free(pmb, phba->mbox_mem_pool);
6481
6482 return;
6483
6484disable_ras:
6485 /* Free RAS DMA memory */
6486 lpfc_sli4_ras_dma_free(phba);
6487 mempool_free(pmb, phba->mbox_mem_pool);
6488}
6489
6490/**
6491 * lpfc_sli4_ras_fwlog_init: Initialize memory and post RAS MBX command
6492 * @phba: pointer to lpfc hba data structure.
6493 * @fwlog_level: Logging verbosity level.
6494 * @fwlog_enable: Enable/Disable logging.
6495 *
6496 * Initialize memory and post mailbox command to enable FW logging in host
6497 * memory.
6498 **/
6499int
6500lpfc_sli4_ras_fwlog_init(struct lpfc_hba *phba,
6501 uint32_t fwlog_level,
6502 uint32_t fwlog_enable)
6503{
6504 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6505 struct lpfc_mbx_set_ras_fwlog *mbx_fwlog = NULL;
6506 struct lpfc_dmabuf *dmabuf;
6507 LPFC_MBOXQ_t *mbox;
6508 uint32_t len = 0, fwlog_buffsize, fwlog_entry_count;
6509 int rc = 0;
6510
95bfc6d8
JS
6511 spin_lock_irq(&phba->hbalock);
6512 ras_fwlog->state = INACTIVE;
6513 spin_unlock_irq(&phba->hbalock);
6514
d2cc9bcd
JS
6515 fwlog_buffsize = (LPFC_RAS_MIN_BUFF_POST_SIZE *
6516 phba->cfg_ras_fwlog_buffsize);
6517 fwlog_entry_count = (fwlog_buffsize/LPFC_RAS_MAX_ENTRY_SIZE);
6518
6519 /*
6520 * If re-enabling FW logging support use earlier allocated
6521 * DMA buffers while posting MBX command.
6522 **/
6523 if (!ras_fwlog->lwpd.virt) {
6524 rc = lpfc_sli4_ras_dma_alloc(phba, fwlog_entry_count);
6525 if (rc) {
6526 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
cb34990b 6527 "6189 FW Log Memory Allocation Failed");
d2cc9bcd
JS
6528 return rc;
6529 }
6530 }
6531
6532 /* Setup Mailbox command */
6533 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6534 if (!mbox) {
372c187b 6535 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
d2cc9bcd
JS
6536 "6190 RAS MBX Alloc Failed");
6537 rc = -ENOMEM;
6538 goto mem_free;
6539 }
6540
6541 ras_fwlog->fw_loglevel = fwlog_level;
6542 len = (sizeof(struct lpfc_mbx_set_ras_fwlog) -
6543 sizeof(struct lpfc_sli4_cfg_mhdr));
6544
6545 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_LOWLEVEL,
6546 LPFC_MBOX_OPCODE_SET_DIAG_LOG_OPTION,
6547 len, LPFC_SLI4_MBX_EMBED);
6548
6549 mbx_fwlog = (struct lpfc_mbx_set_ras_fwlog *)&mbox->u.mqe.un.ras_fwlog;
6550 bf_set(lpfc_fwlog_enable, &mbx_fwlog->u.request,
6551 fwlog_enable);
6552 bf_set(lpfc_fwlog_loglvl, &mbx_fwlog->u.request,
6553 ras_fwlog->fw_loglevel);
6554 bf_set(lpfc_fwlog_buffcnt, &mbx_fwlog->u.request,
6555 ras_fwlog->fw_buffcount);
6556 bf_set(lpfc_fwlog_buffsz, &mbx_fwlog->u.request,
6557 LPFC_RAS_MAX_ENTRY_SIZE/SLI4_PAGE_SIZE);
6558
6559 /* Update DMA buffer address */
6560 list_for_each_entry(dmabuf, &ras_fwlog->fwlog_buff_list, list) {
6561 memset(dmabuf->virt, 0, LPFC_RAS_MAX_ENTRY_SIZE);
6562
6563 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_lo =
6564 putPaddrLow(dmabuf->phys);
6565
6566 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_hi =
6567 putPaddrHigh(dmabuf->phys);
6568 }
6569
6570 /* Update LPWD address */
6571 mbx_fwlog->u.request.lwpd.addr_lo = putPaddrLow(ras_fwlog->lwpd.phys);
6572 mbx_fwlog->u.request.lwpd.addr_hi = putPaddrHigh(ras_fwlog->lwpd.phys);
6573
95bfc6d8
JS
6574 spin_lock_irq(&phba->hbalock);
6575 ras_fwlog->state = REG_INPROGRESS;
6576 spin_unlock_irq(&phba->hbalock);
d2cc9bcd
JS
6577 mbox->vport = phba->pport;
6578 mbox->mbox_cmpl = lpfc_sli4_ras_mbox_cmpl;
6579
6580 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
6581
6582 if (rc == MBX_NOT_FINISHED) {
372c187b 6583 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
cb34990b 6584 "6191 FW-Log Mailbox failed. "
d2cc9bcd
JS
6585 "status %d mbxStatus : x%x", rc,
6586 bf_get(lpfc_mqe_status, &mbox->u.mqe));
6587 mempool_free(mbox, phba->mbox_mem_pool);
6588 rc = -EIO;
6589 goto mem_free;
6590 } else
6591 rc = 0;
6592mem_free:
6593 if (rc)
6594 lpfc_sli4_ras_dma_free(phba);
6595
6596 return rc;
6597}
6598
6599/**
6600 * lpfc_sli4_ras_setup - Check if RAS supported on the adapter
6601 * @phba: Pointer to HBA context object.
6602 *
6603 * Check if RAS is supported on the adapter and initialize it.
6604 **/
6605void
6606lpfc_sli4_ras_setup(struct lpfc_hba *phba)
6607{
6608 /* Check RAS FW Log needs to be enabled or not */
6609 if (lpfc_check_fwlog_support(phba))
6610 return;
6611
6612 lpfc_sli4_ras_fwlog_init(phba, phba->cfg_ras_fwlog_level,
6613 LPFC_RAS_ENABLE_LOGGING);
6614}
6615
6d368e53
JS
6616/**
6617 * lpfc_sli4_alloc_resource_identifiers - Allocate all SLI4 resource extents.
6618 * @phba: Pointer to HBA context object.
6619 *
6620 * This function allocates all SLI4 resource identifiers.
6621 **/
6622int
6623lpfc_sli4_alloc_resource_identifiers(struct lpfc_hba *phba)
6624{
6625 int i, rc, error = 0;
6626 uint16_t count, base;
6627 unsigned long longs;
6628
ff78d8f9
JS
6629 if (!phba->sli4_hba.rpi_hdrs_in_use)
6630 phba->sli4_hba.next_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
6d368e53
JS
6631 if (phba->sli4_hba.extents_in_use) {
6632 /*
6633 * The port supports resource extents. The XRI, VPI, VFI, RPI
6634 * resource extent count must be read and allocated before
6635 * provisioning the resource id arrays.
6636 */
6637 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
6638 LPFC_IDX_RSRC_RDY) {
6639 /*
6640 * Extent-based resources are set - the driver could
6641 * be in a port reset. Figure out if any corrective
6642 * actions need to be taken.
6643 */
6644 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6645 LPFC_RSC_TYPE_FCOE_VFI);
6646 if (rc != 0)
6647 error++;
6648 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6649 LPFC_RSC_TYPE_FCOE_VPI);
6650 if (rc != 0)
6651 error++;
6652 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6653 LPFC_RSC_TYPE_FCOE_XRI);
6654 if (rc != 0)
6655 error++;
6656 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6657 LPFC_RSC_TYPE_FCOE_RPI);
6658 if (rc != 0)
6659 error++;
6660
6661 /*
6662 * It's possible that the number of resources
6663 * provided to this port instance changed between
6664 * resets. Detect this condition and reallocate
6665 * resources. Otherwise, there is no action.
6666 */
6667 if (error) {
6668 lpfc_printf_log(phba, KERN_INFO,
6669 LOG_MBOX | LOG_INIT,
6670 "2931 Detected extent resource "
6671 "change. Reallocating all "
6672 "extents.\n");
6673 rc = lpfc_sli4_dealloc_extent(phba,
6674 LPFC_RSC_TYPE_FCOE_VFI);
6675 rc = lpfc_sli4_dealloc_extent(phba,
6676 LPFC_RSC_TYPE_FCOE_VPI);
6677 rc = lpfc_sli4_dealloc_extent(phba,
6678 LPFC_RSC_TYPE_FCOE_XRI);
6679 rc = lpfc_sli4_dealloc_extent(phba,
6680 LPFC_RSC_TYPE_FCOE_RPI);
6681 } else
6682 return 0;
6683 }
6684
6685 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6686 if (unlikely(rc))
6687 goto err_exit;
6688
6689 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6690 if (unlikely(rc))
6691 goto err_exit;
6692
6693 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6694 if (unlikely(rc))
6695 goto err_exit;
6696
6697 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6698 if (unlikely(rc))
6699 goto err_exit;
6700 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6701 LPFC_IDX_RSRC_RDY);
6702 return rc;
6703 } else {
6704 /*
6705 * The port does not support resource extents. The XRI, VPI,
6706 * VFI, RPI resource ids were determined from READ_CONFIG.
6707 * Just allocate the bitmasks and provision the resource id
6708 * arrays. If a port reset is active, the resources don't
6709 * need any action - just exit.
6710 */
6711 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
ff78d8f9
JS
6712 LPFC_IDX_RSRC_RDY) {
6713 lpfc_sli4_dealloc_resource_identifiers(phba);
6714 lpfc_sli4_remove_rpis(phba);
6715 }
6d368e53
JS
6716 /* RPIs. */
6717 count = phba->sli4_hba.max_cfg_param.max_rpi;
0a630c27 6718 if (count <= 0) {
372c187b 6719 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
0a630c27
JS
6720 "3279 Invalid provisioning of "
6721 "rpi:%d\n", count);
6722 rc = -EINVAL;
6723 goto err_exit;
6724 }
6d368e53
JS
6725 base = phba->sli4_hba.max_cfg_param.rpi_base;
6726 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6727 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
6728 sizeof(unsigned long),
6729 GFP_KERNEL);
6730 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
6731 rc = -ENOMEM;
6732 goto err_exit;
6733 }
6396bb22 6734 phba->sli4_hba.rpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6735 GFP_KERNEL);
6736 if (unlikely(!phba->sli4_hba.rpi_ids)) {
6737 rc = -ENOMEM;
6738 goto free_rpi_bmask;
6739 }
6740
6741 for (i = 0; i < count; i++)
6742 phba->sli4_hba.rpi_ids[i] = base + i;
6743
6744 /* VPIs. */
6745 count = phba->sli4_hba.max_cfg_param.max_vpi;
0a630c27 6746 if (count <= 0) {
372c187b 6747 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
0a630c27
JS
6748 "3280 Invalid provisioning of "
6749 "vpi:%d\n", count);
6750 rc = -EINVAL;
6751 goto free_rpi_ids;
6752 }
6d368e53
JS
6753 base = phba->sli4_hba.max_cfg_param.vpi_base;
6754 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6755 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
6756 GFP_KERNEL);
6757 if (unlikely(!phba->vpi_bmask)) {
6758 rc = -ENOMEM;
6759 goto free_rpi_ids;
6760 }
6396bb22 6761 phba->vpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6762 GFP_KERNEL);
6763 if (unlikely(!phba->vpi_ids)) {
6764 rc = -ENOMEM;
6765 goto free_vpi_bmask;
6766 }
6767
6768 for (i = 0; i < count; i++)
6769 phba->vpi_ids[i] = base + i;
6770
6771 /* XRIs. */
6772 count = phba->sli4_hba.max_cfg_param.max_xri;
0a630c27 6773 if (count <= 0) {
372c187b 6774 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
0a630c27
JS
6775 "3281 Invalid provisioning of "
6776 "xri:%d\n", count);
6777 rc = -EINVAL;
6778 goto free_vpi_ids;
6779 }
6d368e53
JS
6780 base = phba->sli4_hba.max_cfg_param.xri_base;
6781 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6782 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
6783 sizeof(unsigned long),
6784 GFP_KERNEL);
6785 if (unlikely(!phba->sli4_hba.xri_bmask)) {
6786 rc = -ENOMEM;
6787 goto free_vpi_ids;
6788 }
41899be7 6789 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 6790 phba->sli4_hba.xri_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6791 GFP_KERNEL);
6792 if (unlikely(!phba->sli4_hba.xri_ids)) {
6793 rc = -ENOMEM;
6794 goto free_xri_bmask;
6795 }
6796
6797 for (i = 0; i < count; i++)
6798 phba->sli4_hba.xri_ids[i] = base + i;
6799
6800 /* VFIs. */
6801 count = phba->sli4_hba.max_cfg_param.max_vfi;
0a630c27 6802 if (count <= 0) {
372c187b 6803 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
0a630c27
JS
6804 "3282 Invalid provisioning of "
6805 "vfi:%d\n", count);
6806 rc = -EINVAL;
6807 goto free_xri_ids;
6808 }
6d368e53
JS
6809 base = phba->sli4_hba.max_cfg_param.vfi_base;
6810 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6811 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
6812 sizeof(unsigned long),
6813 GFP_KERNEL);
6814 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
6815 rc = -ENOMEM;
6816 goto free_xri_ids;
6817 }
6396bb22 6818 phba->sli4_hba.vfi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6819 GFP_KERNEL);
6820 if (unlikely(!phba->sli4_hba.vfi_ids)) {
6821 rc = -ENOMEM;
6822 goto free_vfi_bmask;
6823 }
6824
6825 for (i = 0; i < count; i++)
6826 phba->sli4_hba.vfi_ids[i] = base + i;
6827
6828 /*
6829 * Mark all resources ready. An HBA reset doesn't need
6830 * to reset the initialization.
6831 */
6832 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6833 LPFC_IDX_RSRC_RDY);
6834 return 0;
6835 }
6836
6837 free_vfi_bmask:
6838 kfree(phba->sli4_hba.vfi_bmask);
cd60be49 6839 phba->sli4_hba.vfi_bmask = NULL;
6d368e53
JS
6840 free_xri_ids:
6841 kfree(phba->sli4_hba.xri_ids);
cd60be49 6842 phba->sli4_hba.xri_ids = NULL;
6d368e53
JS
6843 free_xri_bmask:
6844 kfree(phba->sli4_hba.xri_bmask);
cd60be49 6845 phba->sli4_hba.xri_bmask = NULL;
6d368e53
JS
6846 free_vpi_ids:
6847 kfree(phba->vpi_ids);
cd60be49 6848 phba->vpi_ids = NULL;
6d368e53
JS
6849 free_vpi_bmask:
6850 kfree(phba->vpi_bmask);
cd60be49 6851 phba->vpi_bmask = NULL;
6d368e53
JS
6852 free_rpi_ids:
6853 kfree(phba->sli4_hba.rpi_ids);
cd60be49 6854 phba->sli4_hba.rpi_ids = NULL;
6d368e53
JS
6855 free_rpi_bmask:
6856 kfree(phba->sli4_hba.rpi_bmask);
cd60be49 6857 phba->sli4_hba.rpi_bmask = NULL;
6d368e53
JS
6858 err_exit:
6859 return rc;
6860}
6861
6862/**
6863 * lpfc_sli4_dealloc_resource_identifiers - Deallocate all SLI4 resource extents.
6864 * @phba: Pointer to HBA context object.
6865 *
6866 * This function allocates the number of elements for the specified
6867 * resource type.
6868 **/
6869int
6870lpfc_sli4_dealloc_resource_identifiers(struct lpfc_hba *phba)
6871{
6872 if (phba->sli4_hba.extents_in_use) {
6873 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6874 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6875 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6876 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6877 } else {
6878 kfree(phba->vpi_bmask);
16a3a208 6879 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6880 kfree(phba->vpi_ids);
6881 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6882 kfree(phba->sli4_hba.xri_bmask);
6883 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6884 kfree(phba->sli4_hba.vfi_bmask);
6885 kfree(phba->sli4_hba.vfi_ids);
6886 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6887 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6888 }
6889
6890 return 0;
6891}
6892
b76f2dc9
JS
6893/**
6894 * lpfc_sli4_get_allocated_extnts - Get the port's allocated extents.
6895 * @phba: Pointer to HBA context object.
6896 * @type: The resource extent type.
7af29d45 6897 * @extnt_cnt: buffer to hold port extent count response
b76f2dc9
JS
6898 * @extnt_size: buffer to hold port extent size response.
6899 *
6900 * This function calls the port to read the host allocated extents
6901 * for a particular type.
6902 **/
6903int
6904lpfc_sli4_get_allocated_extnts(struct lpfc_hba *phba, uint16_t type,
6905 uint16_t *extnt_cnt, uint16_t *extnt_size)
6906{
6907 bool emb;
6908 int rc = 0;
6909 uint16_t curr_blks = 0;
6910 uint32_t req_len, emb_len;
6911 uint32_t alloc_len, mbox_tmo;
6912 struct list_head *blk_list_head;
6913 struct lpfc_rsrc_blks *rsrc_blk;
6914 LPFC_MBOXQ_t *mbox;
6915 void *virtaddr = NULL;
6916 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
6917 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
6918 union lpfc_sli4_cfg_shdr *shdr;
6919
6920 switch (type) {
6921 case LPFC_RSC_TYPE_FCOE_VPI:
6922 blk_list_head = &phba->lpfc_vpi_blk_list;
6923 break;
6924 case LPFC_RSC_TYPE_FCOE_XRI:
6925 blk_list_head = &phba->sli4_hba.lpfc_xri_blk_list;
6926 break;
6927 case LPFC_RSC_TYPE_FCOE_VFI:
6928 blk_list_head = &phba->sli4_hba.lpfc_vfi_blk_list;
6929 break;
6930 case LPFC_RSC_TYPE_FCOE_RPI:
6931 blk_list_head = &phba->sli4_hba.lpfc_rpi_blk_list;
6932 break;
6933 default:
6934 return -EIO;
6935 }
6936
6937 /* Count the number of extents currently allocatd for this type. */
6938 list_for_each_entry(rsrc_blk, blk_list_head, list) {
6939 if (curr_blks == 0) {
6940 /*
6941 * The GET_ALLOCATED mailbox does not return the size,
6942 * just the count. The size should be just the size
6943 * stored in the current allocated block and all sizes
6944 * for an extent type are the same so set the return
6945 * value now.
6946 */
6947 *extnt_size = rsrc_blk->rsrc_size;
6948 }
6949 curr_blks++;
6950 }
6951
b76f2dc9
JS
6952 /*
6953 * Calculate the size of an embedded mailbox. The uint32_t
6954 * accounts for extents-specific word.
6955 */
6956 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
6957 sizeof(uint32_t);
6958
6959 /*
6960 * Presume the allocation and response will fit into an embedded
6961 * mailbox. If not true, reconfigure to a non-embedded mailbox.
6962 */
6963 emb = LPFC_SLI4_MBX_EMBED;
6964 req_len = emb_len;
6965 if (req_len > emb_len) {
6966 req_len = curr_blks * sizeof(uint16_t) +
6967 sizeof(union lpfc_sli4_cfg_shdr) +
6968 sizeof(uint32_t);
6969 emb = LPFC_SLI4_MBX_NEMBED;
6970 }
6971
6972 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6973 if (!mbox)
6974 return -ENOMEM;
6975 memset(mbox, 0, sizeof(LPFC_MBOXQ_t));
6976
6977 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6978 LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT,
6979 req_len, emb);
6980 if (alloc_len < req_len) {
372c187b 6981 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
b76f2dc9
JS
6982 "2983 Allocated DMA memory size (x%x) is "
6983 "less than the requested DMA memory "
6984 "size (x%x)\n", alloc_len, req_len);
6985 rc = -ENOMEM;
6986 goto err_exit;
6987 }
6988 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, curr_blks, type, emb);
6989 if (unlikely(rc)) {
6990 rc = -EIO;
6991 goto err_exit;
6992 }
6993
6994 if (!phba->sli4_hba.intr_enable)
6995 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6996 else {
a183a15f 6997 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
b76f2dc9
JS
6998 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6999 }
7000
7001 if (unlikely(rc)) {
7002 rc = -EIO;
7003 goto err_exit;
7004 }
7005
7006 /*
7007 * Figure out where the response is located. Then get local pointers
7008 * to the response data. The port does not guarantee to respond to
7009 * all extents counts request so update the local variable with the
7010 * allocated count from the port.
7011 */
7012 if (emb == LPFC_SLI4_MBX_EMBED) {
7013 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
7014 shdr = &rsrc_ext->header.cfg_shdr;
7015 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
7016 } else {
7017 virtaddr = mbox->sge_array->addr[0];
7018 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
7019 shdr = &n_rsrc->cfg_shdr;
7020 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
7021 }
7022
7023 if (bf_get(lpfc_mbox_hdr_status, &shdr->response)) {
372c187b 7024 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
b76f2dc9
JS
7025 "2984 Failed to read allocated resources "
7026 "for type %d - Status 0x%x Add'l Status 0x%x.\n",
7027 type,
7028 bf_get(lpfc_mbox_hdr_status, &shdr->response),
7029 bf_get(lpfc_mbox_hdr_add_status, &shdr->response));
7030 rc = -EIO;
7031 goto err_exit;
7032 }
7033 err_exit:
7034 lpfc_sli4_mbox_cmd_free(phba, mbox);
7035 return rc;
7036}
7037
8a9d2e80 7038/**
0ef69968 7039 * lpfc_sli4_repost_sgl_list - Repost the buffers sgl pages as block
8a9d2e80 7040 * @phba: pointer to lpfc hba data structure.
895427bd
JS
7041 * @sgl_list: linked link of sgl buffers to post
7042 * @cnt: number of linked list buffers
8a9d2e80 7043 *
895427bd 7044 * This routine walks the list of buffers that have been allocated and
8a9d2e80
JS
7045 * repost them to the port by using SGL block post. This is needed after a
7046 * pci_function_reset/warm_start or start. It attempts to construct blocks
895427bd
JS
7047 * of buffer sgls which contains contiguous xris and uses the non-embedded
7048 * SGL block post mailbox commands to post them to the port. For single
8a9d2e80
JS
7049 * buffer sgl with non-contiguous xri, if any, it shall use embedded SGL post
7050 * mailbox command for posting.
7051 *
7052 * Returns: 0 = success, non-zero failure.
7053 **/
7054static int
895427bd
JS
7055lpfc_sli4_repost_sgl_list(struct lpfc_hba *phba,
7056 struct list_head *sgl_list, int cnt)
8a9d2e80
JS
7057{
7058 struct lpfc_sglq *sglq_entry = NULL;
7059 struct lpfc_sglq *sglq_entry_next = NULL;
7060 struct lpfc_sglq *sglq_entry_first = NULL;
895427bd
JS
7061 int status, total_cnt;
7062 int post_cnt = 0, num_posted = 0, block_cnt = 0;
8a9d2e80
JS
7063 int last_xritag = NO_XRI;
7064 LIST_HEAD(prep_sgl_list);
7065 LIST_HEAD(blck_sgl_list);
7066 LIST_HEAD(allc_sgl_list);
7067 LIST_HEAD(post_sgl_list);
7068 LIST_HEAD(free_sgl_list);
7069
38c20673 7070 spin_lock_irq(&phba->hbalock);
895427bd
JS
7071 spin_lock(&phba->sli4_hba.sgl_list_lock);
7072 list_splice_init(sgl_list, &allc_sgl_list);
7073 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 7074 spin_unlock_irq(&phba->hbalock);
8a9d2e80 7075
895427bd 7076 total_cnt = cnt;
8a9d2e80
JS
7077 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
7078 &allc_sgl_list, list) {
7079 list_del_init(&sglq_entry->list);
7080 block_cnt++;
7081 if ((last_xritag != NO_XRI) &&
7082 (sglq_entry->sli4_xritag != last_xritag + 1)) {
7083 /* a hole in xri block, form a sgl posting block */
7084 list_splice_init(&prep_sgl_list, &blck_sgl_list);
7085 post_cnt = block_cnt - 1;
7086 /* prepare list for next posting block */
7087 list_add_tail(&sglq_entry->list, &prep_sgl_list);
7088 block_cnt = 1;
7089 } else {
7090 /* prepare list for next posting block */
7091 list_add_tail(&sglq_entry->list, &prep_sgl_list);
7092 /* enough sgls for non-embed sgl mbox command */
7093 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
7094 list_splice_init(&prep_sgl_list,
7095 &blck_sgl_list);
7096 post_cnt = block_cnt;
7097 block_cnt = 0;
7098 }
7099 }
7100 num_posted++;
7101
7102 /* keep track of last sgl's xritag */
7103 last_xritag = sglq_entry->sli4_xritag;
7104
895427bd
JS
7105 /* end of repost sgl list condition for buffers */
7106 if (num_posted == total_cnt) {
8a9d2e80
JS
7107 if (post_cnt == 0) {
7108 list_splice_init(&prep_sgl_list,
7109 &blck_sgl_list);
7110 post_cnt = block_cnt;
7111 } else if (block_cnt == 1) {
7112 status = lpfc_sli4_post_sgl(phba,
7113 sglq_entry->phys, 0,
7114 sglq_entry->sli4_xritag);
7115 if (!status) {
7116 /* successful, put sgl to posted list */
7117 list_add_tail(&sglq_entry->list,
7118 &post_sgl_list);
7119 } else {
7120 /* Failure, put sgl to free list */
7121 lpfc_printf_log(phba, KERN_WARNING,
7122 LOG_SLI,
895427bd 7123 "3159 Failed to post "
8a9d2e80
JS
7124 "sgl, xritag:x%x\n",
7125 sglq_entry->sli4_xritag);
7126 list_add_tail(&sglq_entry->list,
7127 &free_sgl_list);
711ea882 7128 total_cnt--;
8a9d2e80
JS
7129 }
7130 }
7131 }
7132
7133 /* continue until a nembed page worth of sgls */
7134 if (post_cnt == 0)
7135 continue;
7136
895427bd
JS
7137 /* post the buffer list sgls as a block */
7138 status = lpfc_sli4_post_sgl_list(phba, &blck_sgl_list,
7139 post_cnt);
8a9d2e80
JS
7140
7141 if (!status) {
7142 /* success, put sgl list to posted sgl list */
7143 list_splice_init(&blck_sgl_list, &post_sgl_list);
7144 } else {
7145 /* Failure, put sgl list to free sgl list */
7146 sglq_entry_first = list_first_entry(&blck_sgl_list,
7147 struct lpfc_sglq,
7148 list);
7149 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
895427bd 7150 "3160 Failed to post sgl-list, "
8a9d2e80
JS
7151 "xritag:x%x-x%x\n",
7152 sglq_entry_first->sli4_xritag,
7153 (sglq_entry_first->sli4_xritag +
7154 post_cnt - 1));
7155 list_splice_init(&blck_sgl_list, &free_sgl_list);
711ea882 7156 total_cnt -= post_cnt;
8a9d2e80
JS
7157 }
7158
7159 /* don't reset xirtag due to hole in xri block */
7160 if (block_cnt == 0)
7161 last_xritag = NO_XRI;
7162
895427bd 7163 /* reset sgl post count for next round of posting */
8a9d2e80
JS
7164 post_cnt = 0;
7165 }
7166
895427bd 7167 /* free the sgls failed to post */
8a9d2e80
JS
7168 lpfc_free_sgl_list(phba, &free_sgl_list);
7169
895427bd 7170 /* push sgls posted to the available list */
8a9d2e80 7171 if (!list_empty(&post_sgl_list)) {
38c20673 7172 spin_lock_irq(&phba->hbalock);
895427bd
JS
7173 spin_lock(&phba->sli4_hba.sgl_list_lock);
7174 list_splice_init(&post_sgl_list, sgl_list);
7175 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 7176 spin_unlock_irq(&phba->hbalock);
8a9d2e80 7177 } else {
372c187b 7178 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
895427bd 7179 "3161 Failure to post sgl to port.\n");
8a9d2e80
JS
7180 return -EIO;
7181 }
895427bd
JS
7182
7183 /* return the number of XRIs actually posted */
7184 return total_cnt;
8a9d2e80
JS
7185}
7186
0794d601 7187/**
5e5b511d 7188 * lpfc_sli4_repost_io_sgl_list - Repost all the allocated nvme buffer sgls
0794d601
JS
7189 * @phba: pointer to lpfc hba data structure.
7190 *
7191 * This routine walks the list of nvme buffers that have been allocated and
7192 * repost them to the port by using SGL block post. This is needed after a
7193 * pci_function_reset/warm_start or start. The lpfc_hba_down_post_s4 routine
7194 * is responsible for moving all nvme buffers on the lpfc_abts_nvme_sgl_list
5e5b511d 7195 * to the lpfc_io_buf_list. If the repost fails, reject all nvme buffers.
0794d601
JS
7196 *
7197 * Returns: 0 = success, non-zero failure.
7198 **/
3999df75 7199static int
5e5b511d 7200lpfc_sli4_repost_io_sgl_list(struct lpfc_hba *phba)
0794d601
JS
7201{
7202 LIST_HEAD(post_nblist);
7203 int num_posted, rc = 0;
7204
7205 /* get all NVME buffers need to repost to a local list */
5e5b511d 7206 lpfc_io_buf_flush(phba, &post_nblist);
0794d601
JS
7207
7208 /* post the list of nvme buffer sgls to port if available */
7209 if (!list_empty(&post_nblist)) {
5e5b511d
JS
7210 num_posted = lpfc_sli4_post_io_sgl_list(
7211 phba, &post_nblist, phba->sli4_hba.io_xri_cnt);
0794d601
JS
7212 /* failed to post any nvme buffer, return error */
7213 if (num_posted == 0)
7214 rc = -EIO;
7215 }
7216 return rc;
7217}
7218
3999df75 7219static void
61bda8f7
JS
7220lpfc_set_host_data(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
7221{
7222 uint32_t len;
7223
7224 len = sizeof(struct lpfc_mbx_set_host_data) -
7225 sizeof(struct lpfc_sli4_cfg_mhdr);
7226 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
7227 LPFC_MBOX_OPCODE_SET_HOST_DATA, len,
7228 LPFC_SLI4_MBX_EMBED);
7229
7230 mbox->u.mqe.un.set_host_data.param_id = LPFC_SET_HOST_OS_DRIVER_VERSION;
b2fd103b
JS
7231 mbox->u.mqe.un.set_host_data.param_len =
7232 LPFC_HOST_OS_DRIVER_VERSION_SIZE;
61bda8f7
JS
7233 snprintf(mbox->u.mqe.un.set_host_data.data,
7234 LPFC_HOST_OS_DRIVER_VERSION_SIZE,
7235 "Linux %s v"LPFC_DRIVER_VERSION,
7236 (phba->hba_flag & HBA_FCOE_MODE) ? "FCoE" : "FC");
7237}
7238
a8cf5dfe 7239int
6c621a22 7240lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
a8cf5dfe 7241 struct lpfc_queue *drq, int count, int idx)
6c621a22
JS
7242{
7243 int rc, i;
7244 struct lpfc_rqe hrqe;
7245 struct lpfc_rqe drqe;
7246 struct lpfc_rqb *rqbp;
411de511 7247 unsigned long flags;
6c621a22
JS
7248 struct rqb_dmabuf *rqb_buffer;
7249 LIST_HEAD(rqb_buf_list);
7250
411de511 7251 spin_lock_irqsave(&phba->hbalock, flags);
6c621a22
JS
7252 rqbp = hrq->rqbp;
7253 for (i = 0; i < count; i++) {
7254 /* IF RQ is already full, don't bother */
7255 if (rqbp->buffer_count + i >= rqbp->entry_count - 1)
7256 break;
7257 rqb_buffer = rqbp->rqb_alloc_buffer(phba);
7258 if (!rqb_buffer)
7259 break;
7260 rqb_buffer->hrq = hrq;
7261 rqb_buffer->drq = drq;
a8cf5dfe 7262 rqb_buffer->idx = idx;
6c621a22
JS
7263 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
7264 }
7265 while (!list_empty(&rqb_buf_list)) {
7266 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
7267 hbuf.list);
7268
7269 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
7270 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
7271 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
7272 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
7273 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
7274 if (rc < 0) {
372c187b 7275 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
411de511
JS
7276 "6421 Cannot post to HRQ %d: %x %x %x "
7277 "DRQ %x %x\n",
7278 hrq->queue_id,
7279 hrq->host_index,
7280 hrq->hba_index,
7281 hrq->entry_count,
7282 drq->host_index,
7283 drq->hba_index);
6c621a22
JS
7284 rqbp->rqb_free_buffer(phba, rqb_buffer);
7285 } else {
7286 list_add_tail(&rqb_buffer->hbuf.list,
7287 &rqbp->rqb_buffer_list);
7288 rqbp->buffer_count++;
7289 }
7290 }
411de511 7291 spin_unlock_irqrestore(&phba->hbalock, flags);
6c621a22
JS
7292 return 1;
7293}
7294
317aeb83
DK
7295/**
7296 * lpfc_init_idle_stat_hb - Initialize idle_stat tracking
7af29d45 7297 * @phba: pointer to lpfc hba data structure.
317aeb83
DK
7298 *
7299 * This routine initializes the per-cq idle_stat to dynamically dictate
7300 * polling decisions.
7301 *
7302 * Return codes:
7303 * None
7304 **/
7305static void lpfc_init_idle_stat_hb(struct lpfc_hba *phba)
7306{
7307 int i;
7308 struct lpfc_sli4_hdw_queue *hdwq;
7309 struct lpfc_queue *cq;
7310 struct lpfc_idle_stat *idle_stat;
7311 u64 wall;
7312
7313 for_each_present_cpu(i) {
7314 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq];
7315 cq = hdwq->io_cq;
7316
7317 /* Skip if we've already handled this cq's primary CPU */
7318 if (cq->chann != i)
7319 continue;
7320
7321 idle_stat = &phba->sli4_hba.idle_stat[i];
7322
7323 idle_stat->prev_idle = get_cpu_idle_time(i, &wall, 1);
7324 idle_stat->prev_wall = wall;
7325
7326 if (phba->nvmet_support)
7327 cq->poll_mode = LPFC_QUEUE_WORK;
7328 else
7329 cq->poll_mode = LPFC_IRQ_POLL;
7330 }
7331
7332 if (!phba->nvmet_support)
7333 schedule_delayed_work(&phba->idle_stat_delay_work,
7334 msecs_to_jiffies(LPFC_IDLE_STAT_DELAY));
7335}
7336
f0020e42
DK
7337static void lpfc_sli4_dip(struct lpfc_hba *phba)
7338{
7339 uint32_t if_type;
7340
7341 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7342 if (if_type == LPFC_SLI_INTF_IF_TYPE_2 ||
7343 if_type == LPFC_SLI_INTF_IF_TYPE_6) {
7344 struct lpfc_register reg_data;
7345
7346 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7347 &reg_data.word0))
7348 return;
7349
7350 if (bf_get(lpfc_sliport_status_dip, &reg_data))
372c187b 7351 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
f0020e42
DK
7352 "2904 Firmware Dump Image Present"
7353 " on Adapter");
7354 }
7355}
7356
da0436e9 7357/**
183b8021 7358 * lpfc_sli4_hba_setup - SLI4 device initialization PCI function
da0436e9
JS
7359 * @phba: Pointer to HBA context object.
7360 *
183b8021
MY
7361 * This function is the main SLI4 device initialization PCI function. This
7362 * function is called by the HBA initialization code, HBA reset code and
da0436e9
JS
7363 * HBA error attention handler code. Caller is not required to hold any
7364 * locks.
7365 **/
7366int
7367lpfc_sli4_hba_setup(struct lpfc_hba *phba)
7368{
171f6c41 7369 int rc, i, cnt, len, dd;
da0436e9
JS
7370 LPFC_MBOXQ_t *mboxq;
7371 struct lpfc_mqe *mqe;
7372 uint8_t *vpd;
7373 uint32_t vpd_size;
7374 uint32_t ftr_rsp = 0;
7375 struct Scsi_Host *shost = lpfc_shost_from_vport(phba->pport);
7376 struct lpfc_vport *vport = phba->pport;
7377 struct lpfc_dmabuf *mp;
2d7dbc4c 7378 struct lpfc_rqb *rqbp;
da0436e9
JS
7379
7380 /* Perform a PCI function reset to start from clean */
7381 rc = lpfc_pci_function_reset(phba);
7382 if (unlikely(rc))
7383 return -ENODEV;
7384
7385 /* Check the HBA Host Status Register for readyness */
7386 rc = lpfc_sli4_post_status_check(phba);
7387 if (unlikely(rc))
7388 return -ENODEV;
7389 else {
7390 spin_lock_irq(&phba->hbalock);
7391 phba->sli.sli_flag |= LPFC_SLI_ACTIVE;
7392 spin_unlock_irq(&phba->hbalock);
7393 }
7394
f0020e42
DK
7395 lpfc_sli4_dip(phba);
7396
da0436e9
JS
7397 /*
7398 * Allocate a single mailbox container for initializing the
7399 * port.
7400 */
7401 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7402 if (!mboxq)
7403 return -ENOMEM;
7404
da0436e9 7405 /* Issue READ_REV to collect vpd and FW information. */
49198b37 7406 vpd_size = SLI4_PAGE_SIZE;
da0436e9
JS
7407 vpd = kzalloc(vpd_size, GFP_KERNEL);
7408 if (!vpd) {
7409 rc = -ENOMEM;
7410 goto out_free_mbox;
7411 }
7412
7413 rc = lpfc_sli4_read_rev(phba, mboxq, vpd, &vpd_size);
76a95d75
JS
7414 if (unlikely(rc)) {
7415 kfree(vpd);
7416 goto out_free_mbox;
7417 }
572709e2 7418
da0436e9 7419 mqe = &mboxq->u.mqe;
f1126688 7420 phba->sli_rev = bf_get(lpfc_mbx_rd_rev_sli_lvl, &mqe->un.read_rev);
b5c53958 7421 if (bf_get(lpfc_mbx_rd_rev_fcoe, &mqe->un.read_rev)) {
76a95d75 7422 phba->hba_flag |= HBA_FCOE_MODE;
b5c53958
JS
7423 phba->fcp_embed_io = 0; /* SLI4 FC support only */
7424 } else {
76a95d75 7425 phba->hba_flag &= ~HBA_FCOE_MODE;
b5c53958 7426 }
45ed1190
JS
7427
7428 if (bf_get(lpfc_mbx_rd_rev_cee_ver, &mqe->un.read_rev) ==
7429 LPFC_DCBX_CEE_MODE)
7430 phba->hba_flag |= HBA_FIP_SUPPORT;
7431 else
7432 phba->hba_flag &= ~HBA_FIP_SUPPORT;
7433
c00f62e6 7434 phba->hba_flag &= ~HBA_IOQ_FLUSH;
4f2e66c6 7435
c31098ce 7436 if (phba->sli_rev != LPFC_SLI_REV4) {
372c187b 7437 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
da0436e9
JS
7438 "0376 READ_REV Error. SLI Level %d "
7439 "FCoE enabled %d\n",
76a95d75 7440 phba->sli_rev, phba->hba_flag & HBA_FCOE_MODE);
da0436e9 7441 rc = -EIO;
76a95d75
JS
7442 kfree(vpd);
7443 goto out_free_mbox;
da0436e9 7444 }
cd1c8301 7445
ff78d8f9
JS
7446 /*
7447 * Continue initialization with default values even if driver failed
7448 * to read FCoE param config regions, only read parameters if the
7449 * board is FCoE
7450 */
7451 if (phba->hba_flag & HBA_FCOE_MODE &&
7452 lpfc_sli4_read_fcoe_params(phba))
7453 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_INIT,
7454 "2570 Failed to read FCoE parameters\n");
7455
cd1c8301
JS
7456 /*
7457 * Retrieve sli4 device physical port name, failure of doing it
7458 * is considered as non-fatal.
7459 */
7460 rc = lpfc_sli4_retrieve_pport_name(phba);
7461 if (!rc)
7462 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7463 "3080 Successful retrieving SLI4 device "
7464 "physical port name: %s.\n", phba->Port);
7465
b3b4f3e1
JS
7466 rc = lpfc_sli4_get_ctl_attr(phba);
7467 if (!rc)
7468 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7469 "8351 Successful retrieving SLI4 device "
7470 "CTL ATTR\n");
7471
da0436e9
JS
7472 /*
7473 * Evaluate the read rev and vpd data. Populate the driver
7474 * state with the results. If this routine fails, the failure
7475 * is not fatal as the driver will use generic values.
7476 */
7477 rc = lpfc_parse_vpd(phba, vpd, vpd_size);
7478 if (unlikely(!rc)) {
372c187b 7479 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
da0436e9
JS
7480 "0377 Error %d parsing vpd. "
7481 "Using defaults.\n", rc);
7482 rc = 0;
7483 }
76a95d75 7484 kfree(vpd);
da0436e9 7485
f1126688
JS
7486 /* Save information as VPD data */
7487 phba->vpd.rev.biuRev = mqe->un.read_rev.first_hw_rev;
7488 phba->vpd.rev.smRev = mqe->un.read_rev.second_hw_rev;
4e565cf0
JS
7489
7490 /*
7491 * This is because first G7 ASIC doesn't support the standard
7492 * 0x5a NVME cmd descriptor type/subtype
7493 */
7494 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7495 LPFC_SLI_INTF_IF_TYPE_6) &&
7496 (phba->vpd.rev.biuRev == LPFC_G7_ASIC_1) &&
7497 (phba->vpd.rev.smRev == 0) &&
7498 (phba->cfg_nvme_embed_cmd == 1))
7499 phba->cfg_nvme_embed_cmd = 0;
7500
f1126688
JS
7501 phba->vpd.rev.endecRev = mqe->un.read_rev.third_hw_rev;
7502 phba->vpd.rev.fcphHigh = bf_get(lpfc_mbx_rd_rev_fcph_high,
7503 &mqe->un.read_rev);
7504 phba->vpd.rev.fcphLow = bf_get(lpfc_mbx_rd_rev_fcph_low,
7505 &mqe->un.read_rev);
7506 phba->vpd.rev.feaLevelHigh = bf_get(lpfc_mbx_rd_rev_ftr_lvl_high,
7507 &mqe->un.read_rev);
7508 phba->vpd.rev.feaLevelLow = bf_get(lpfc_mbx_rd_rev_ftr_lvl_low,
7509 &mqe->un.read_rev);
7510 phba->vpd.rev.sli1FwRev = mqe->un.read_rev.fw_id_rev;
7511 memcpy(phba->vpd.rev.sli1FwName, mqe->un.read_rev.fw_name, 16);
7512 phba->vpd.rev.sli2FwRev = mqe->un.read_rev.ulp_fw_id_rev;
7513 memcpy(phba->vpd.rev.sli2FwName, mqe->un.read_rev.ulp_fw_name, 16);
7514 phba->vpd.rev.opFwRev = mqe->un.read_rev.fw_id_rev;
7515 memcpy(phba->vpd.rev.opFwName, mqe->un.read_rev.fw_name, 16);
7516 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7517 "(%d):0380 READ_REV Status x%x "
7518 "fw_rev:%s fcphHi:%x fcphLo:%x flHi:%x flLo:%x\n",
7519 mboxq->vport ? mboxq->vport->vpi : 0,
7520 bf_get(lpfc_mqe_status, mqe),
7521 phba->vpd.rev.opFwName,
7522 phba->vpd.rev.fcphHigh, phba->vpd.rev.fcphLow,
7523 phba->vpd.rev.feaLevelHigh, phba->vpd.rev.feaLevelLow);
da0436e9 7524
65791f1f 7525 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7bdedb34
JS
7526 LPFC_SLI_INTF_IF_TYPE_0) {
7527 lpfc_set_features(phba, mboxq, LPFC_SET_UE_RECOVERY);
7528 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7529 if (rc == MBX_SUCCESS) {
7530 phba->hba_flag |= HBA_RECOVERABLE_UE;
7531 /* Set 1Sec interval to detect UE */
7532 phba->eratt_poll_interval = 1;
7533 phba->sli4_hba.ue_to_sr = bf_get(
7534 lpfc_mbx_set_feature_UESR,
7535 &mboxq->u.mqe.un.set_feature);
7536 phba->sli4_hba.ue_to_rp = bf_get(
7537 lpfc_mbx_set_feature_UERP,
7538 &mboxq->u.mqe.un.set_feature);
7539 }
7540 }
7541
7542 if (phba->cfg_enable_mds_diags && phba->mds_diags_support) {
7543 /* Enable MDS Diagnostics only if the SLI Port supports it */
7544 lpfc_set_features(phba, mboxq, LPFC_SET_MDS_DIAGS);
7545 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7546 if (rc != MBX_SUCCESS)
7547 phba->mds_diags_support = 0;
7548 }
572709e2 7549
da0436e9
JS
7550 /*
7551 * Discover the port's supported feature set and match it against the
7552 * hosts requests.
7553 */
7554 lpfc_request_features(phba, mboxq);
7555 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7556 if (unlikely(rc)) {
7557 rc = -EIO;
76a95d75 7558 goto out_free_mbox;
da0436e9
JS
7559 }
7560
7561 /*
7562 * The port must support FCP initiator mode as this is the
7563 * only mode running in the host.
7564 */
7565 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_fcpi, &mqe->un.req_ftrs))) {
7566 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7567 "0378 No support for fcpi mode.\n");
7568 ftr_rsp++;
7569 }
0bc2b7c5
JS
7570
7571 /* Performance Hints are ONLY for FCoE */
7572 if (phba->hba_flag & HBA_FCOE_MODE) {
7573 if (bf_get(lpfc_mbx_rq_ftr_rsp_perfh, &mqe->un.req_ftrs))
7574 phba->sli3_options |= LPFC_SLI4_PERFH_ENABLED;
7575 else
7576 phba->sli3_options &= ~LPFC_SLI4_PERFH_ENABLED;
7577 }
7578
da0436e9
JS
7579 /*
7580 * If the port cannot support the host's requested features
7581 * then turn off the global config parameters to disable the
7582 * feature in the driver. This is not a fatal error.
7583 */
f44ac12f
JS
7584 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
7585 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs))) {
7586 phba->cfg_enable_bg = 0;
7587 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
bf08611b 7588 ftr_rsp++;
f44ac12f 7589 }
bf08611b 7590 }
da0436e9
JS
7591
7592 if (phba->max_vpi && phba->cfg_enable_npiv &&
7593 !(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7594 ftr_rsp++;
7595
7596 if (ftr_rsp) {
7597 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7598 "0379 Feature Mismatch Data: x%08x %08x "
7599 "x%x x%x x%x\n", mqe->un.req_ftrs.word2,
7600 mqe->un.req_ftrs.word3, phba->cfg_enable_bg,
7601 phba->cfg_enable_npiv, phba->max_vpi);
7602 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs)))
7603 phba->cfg_enable_bg = 0;
7604 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7605 phba->cfg_enable_npiv = 0;
7606 }
7607
7608 /* These SLI3 features are assumed in SLI4 */
7609 spin_lock_irq(&phba->hbalock);
7610 phba->sli3_options |= (LPFC_SLI3_NPIV_ENABLED | LPFC_SLI3_HBQ_ENABLED);
7611 spin_unlock_irq(&phba->hbalock);
7612
171f6c41
JS
7613 /* Always try to enable dual dump feature if we can */
7614 lpfc_set_features(phba, mboxq, LPFC_SET_DUAL_DUMP);
7615 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7616 dd = bf_get(lpfc_mbx_set_feature_dd, &mboxq->u.mqe.un.set_feature);
7617 if ((rc == MBX_SUCCESS) && (dd == LPFC_ENABLE_DUAL_DUMP))
372c187b 7618 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
171f6c41
JS
7619 "6448 Dual Dump is enabled\n");
7620 else
7621 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_INIT,
7622 "6447 Dual Dump Mailbox x%x (x%x/x%x) failed, "
7623 "rc:x%x dd:x%x\n",
7624 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
7625 lpfc_sli_config_mbox_subsys_get(
7626 phba, mboxq),
7627 lpfc_sli_config_mbox_opcode_get(
7628 phba, mboxq),
7629 rc, dd);
6d368e53
JS
7630 /*
7631 * Allocate all resources (xri,rpi,vpi,vfi) now. Subsequent
7632 * calls depends on these resources to complete port setup.
7633 */
7634 rc = lpfc_sli4_alloc_resource_identifiers(phba);
7635 if (rc) {
372c187b 7636 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6d368e53
JS
7637 "2920 Failed to alloc Resource IDs "
7638 "rc = x%x\n", rc);
7639 goto out_free_mbox;
7640 }
7641
61bda8f7
JS
7642 lpfc_set_host_data(phba, mboxq);
7643
7644 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7645 if (rc) {
7646 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7647 "2134 Failed to set host os driver version %x",
7648 rc);
7649 }
7650
da0436e9 7651 /* Read the port's service parameters. */
9f1177a3
JS
7652 rc = lpfc_read_sparam(phba, mboxq, vport->vpi);
7653 if (rc) {
7654 phba->link_state = LPFC_HBA_ERROR;
7655 rc = -ENOMEM;
76a95d75 7656 goto out_free_mbox;
9f1177a3
JS
7657 }
7658
da0436e9
JS
7659 mboxq->vport = vport;
7660 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3e1f0718 7661 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
7662 if (rc == MBX_SUCCESS) {
7663 memcpy(&vport->fc_sparam, mp->virt, sizeof(struct serv_parm));
7664 rc = 0;
7665 }
7666
7667 /*
7668 * This memory was allocated by the lpfc_read_sparam routine. Release
7669 * it to the mbuf pool.
7670 */
7671 lpfc_mbuf_free(phba, mp->virt, mp->phys);
7672 kfree(mp);
3e1f0718 7673 mboxq->ctx_buf = NULL;
da0436e9 7674 if (unlikely(rc)) {
372c187b 7675 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
da0436e9
JS
7676 "0382 READ_SPARAM command failed "
7677 "status %d, mbxStatus x%x\n",
7678 rc, bf_get(lpfc_mqe_status, mqe));
7679 phba->link_state = LPFC_HBA_ERROR;
7680 rc = -EIO;
76a95d75 7681 goto out_free_mbox;
da0436e9
JS
7682 }
7683
0558056c 7684 lpfc_update_vport_wwn(vport);
da0436e9
JS
7685
7686 /* Update the fc_host data structures with new wwn. */
7687 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
7688 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
7689
895427bd
JS
7690 /* Create all the SLI4 queues */
7691 rc = lpfc_sli4_queue_create(phba);
7692 if (rc) {
372c187b 7693 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
895427bd
JS
7694 "3089 Failed to allocate queues\n");
7695 rc = -ENODEV;
7696 goto out_free_mbox;
7697 }
7698 /* Set up all the queues to the device */
7699 rc = lpfc_sli4_queue_setup(phba);
7700 if (unlikely(rc)) {
372c187b 7701 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
895427bd
JS
7702 "0381 Error %d during queue setup.\n ", rc);
7703 goto out_stop_timers;
7704 }
7705 /* Initialize the driver internal SLI layer lists. */
7706 lpfc_sli4_setup(phba);
7707 lpfc_sli4_queue_init(phba);
7708
7709 /* update host els xri-sgl sizes and mappings */
7710 rc = lpfc_sli4_els_sgl_update(phba);
8a9d2e80 7711 if (unlikely(rc)) {
372c187b 7712 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8a9d2e80
JS
7713 "1400 Failed to update xri-sgl size and "
7714 "mapping: %d\n", rc);
895427bd 7715 goto out_destroy_queue;
da0436e9
JS
7716 }
7717
8a9d2e80 7718 /* register the els sgl pool to the port */
895427bd
JS
7719 rc = lpfc_sli4_repost_sgl_list(phba, &phba->sli4_hba.lpfc_els_sgl_list,
7720 phba->sli4_hba.els_xri_cnt);
7721 if (unlikely(rc < 0)) {
372c187b 7722 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8a9d2e80
JS
7723 "0582 Error %d during els sgl post "
7724 "operation\n", rc);
7725 rc = -ENODEV;
895427bd 7726 goto out_destroy_queue;
8a9d2e80 7727 }
895427bd 7728 phba->sli4_hba.els_xri_cnt = rc;
8a9d2e80 7729
f358dd0c
JS
7730 if (phba->nvmet_support) {
7731 /* update host nvmet xri-sgl sizes and mappings */
7732 rc = lpfc_sli4_nvmet_sgl_update(phba);
7733 if (unlikely(rc)) {
372c187b 7734 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
f358dd0c
JS
7735 "6308 Failed to update nvmet-sgl size "
7736 "and mapping: %d\n", rc);
7737 goto out_destroy_queue;
7738 }
7739
7740 /* register the nvmet sgl pool to the port */
7741 rc = lpfc_sli4_repost_sgl_list(
7742 phba,
7743 &phba->sli4_hba.lpfc_nvmet_sgl_list,
7744 phba->sli4_hba.nvmet_xri_cnt);
7745 if (unlikely(rc < 0)) {
372c187b 7746 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
f358dd0c
JS
7747 "3117 Error %d during nvmet "
7748 "sgl post\n", rc);
7749 rc = -ENODEV;
7750 goto out_destroy_queue;
7751 }
7752 phba->sli4_hba.nvmet_xri_cnt = rc;
6c621a22 7753
a5f7337f
JS
7754 /* We allocate an iocbq for every receive context SGL.
7755 * The additional allocation is for abort and ls handling.
7756 */
7757 cnt = phba->sli4_hba.nvmet_xri_cnt +
7758 phba->sli4_hba.max_cfg_param.max_xri;
f358dd0c 7759 } else {
0794d601 7760 /* update host common xri-sgl sizes and mappings */
5e5b511d 7761 rc = lpfc_sli4_io_sgl_update(phba);
895427bd 7762 if (unlikely(rc)) {
372c187b 7763 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
0794d601 7764 "6082 Failed to update nvme-sgl size "
895427bd
JS
7765 "and mapping: %d\n", rc);
7766 goto out_destroy_queue;
7767 }
7768
0794d601 7769 /* register the allocated common sgl pool to the port */
5e5b511d 7770 rc = lpfc_sli4_repost_io_sgl_list(phba);
895427bd 7771 if (unlikely(rc)) {
372c187b 7772 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
0794d601
JS
7773 "6116 Error %d during nvme sgl post "
7774 "operation\n", rc);
7775 /* Some NVME buffers were moved to abort nvme list */
7776 /* A pci function reset will repost them */
7777 rc = -ENODEV;
895427bd
JS
7778 goto out_destroy_queue;
7779 }
a5f7337f
JS
7780 /* Each lpfc_io_buf job structure has an iocbq element.
7781 * This cnt provides for abort, els, ct and ls requests.
7782 */
7783 cnt = phba->sli4_hba.max_cfg_param.max_xri;
11e644e2
JS
7784 }
7785
7786 if (!phba->sli.iocbq_lookup) {
6c621a22
JS
7787 /* Initialize and populate the iocb list per host */
7788 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a5f7337f
JS
7789 "2821 initialize iocb list with %d entries\n",
7790 cnt);
6c621a22
JS
7791 rc = lpfc_init_iocb_list(phba, cnt);
7792 if (rc) {
372c187b 7793 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11e644e2 7794 "1413 Failed to init iocb list.\n");
6c621a22
JS
7795 goto out_destroy_queue;
7796 }
895427bd
JS
7797 }
7798
11e644e2
JS
7799 if (phba->nvmet_support)
7800 lpfc_nvmet_create_targetport(phba);
7801
2d7dbc4c 7802 if (phba->nvmet_support && phba->cfg_nvmet_mrq) {
2d7dbc4c
JS
7803 /* Post initial buffers to all RQs created */
7804 for (i = 0; i < phba->cfg_nvmet_mrq; i++) {
7805 rqbp = phba->sli4_hba.nvmet_mrq_hdr[i]->rqbp;
7806 INIT_LIST_HEAD(&rqbp->rqb_buffer_list);
7807 rqbp->rqb_alloc_buffer = lpfc_sli4_nvmet_alloc;
7808 rqbp->rqb_free_buffer = lpfc_sli4_nvmet_free;
61f3d4bf 7809 rqbp->entry_count = LPFC_NVMET_RQE_DEF_COUNT;
2d7dbc4c
JS
7810 rqbp->buffer_count = 0;
7811
2d7dbc4c
JS
7812 lpfc_post_rq_buffer(
7813 phba, phba->sli4_hba.nvmet_mrq_hdr[i],
7814 phba->sli4_hba.nvmet_mrq_data[i],
2448e484 7815 phba->cfg_nvmet_mrq_post, i);
2d7dbc4c
JS
7816 }
7817 }
7818
da0436e9
JS
7819 /* Post the rpi header region to the device. */
7820 rc = lpfc_sli4_post_all_rpi_hdrs(phba);
7821 if (unlikely(rc)) {
372c187b 7822 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
da0436e9
JS
7823 "0393 Error %d during rpi post operation\n",
7824 rc);
7825 rc = -ENODEV;
895427bd 7826 goto out_destroy_queue;
da0436e9 7827 }
97f2ecf1 7828 lpfc_sli4_node_prep(phba);
da0436e9 7829
895427bd 7830 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
2d7dbc4c 7831 if ((phba->nvmet_support == 0) || (phba->cfg_nvmet_mrq == 1)) {
895427bd
JS
7832 /*
7833 * The FC Port needs to register FCFI (index 0)
7834 */
7835 lpfc_reg_fcfi(phba, mboxq);
7836 mboxq->vport = phba->pport;
7837 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7838 if (rc != MBX_SUCCESS)
7839 goto out_unset_queue;
7840 rc = 0;
7841 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_fcfi,
7842 &mboxq->u.mqe.un.reg_fcfi);
2d7dbc4c
JS
7843 } else {
7844 /* We are a NVME Target mode with MRQ > 1 */
7845
7846 /* First register the FCFI */
7847 lpfc_reg_fcfi_mrq(phba, mboxq, 0);
7848 mboxq->vport = phba->pport;
7849 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7850 if (rc != MBX_SUCCESS)
7851 goto out_unset_queue;
7852 rc = 0;
7853 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_mrq_fcfi,
7854 &mboxq->u.mqe.un.reg_fcfi_mrq);
7855
7856 /* Next register the MRQs */
7857 lpfc_reg_fcfi_mrq(phba, mboxq, 1);
7858 mboxq->vport = phba->pport;
7859 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7860 if (rc != MBX_SUCCESS)
7861 goto out_unset_queue;
7862 rc = 0;
895427bd
JS
7863 }
7864 /* Check if the port is configured to be disabled */
7865 lpfc_sli_read_link_ste(phba);
da0436e9
JS
7866 }
7867
c490850a
JS
7868 /* Don't post more new bufs if repost already recovered
7869 * the nvme sgls.
7870 */
7871 if (phba->nvmet_support == 0) {
7872 if (phba->sli4_hba.io_xri_cnt == 0) {
7873 len = lpfc_new_io_buf(
7874 phba, phba->sli4_hba.io_xri_max);
7875 if (len == 0) {
7876 rc = -ENOMEM;
7877 goto out_unset_queue;
7878 }
7879
7880 if (phba->cfg_xri_rebalancing)
7881 lpfc_create_multixri_pools(phba);
7882 }
7883 } else {
7884 phba->cfg_xri_rebalancing = 0;
7885 }
7886
da0436e9
JS
7887 /* Allow asynchronous mailbox command to go through */
7888 spin_lock_irq(&phba->hbalock);
7889 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
7890 spin_unlock_irq(&phba->hbalock);
7891
7892 /* Post receive buffers to the device */
7893 lpfc_sli4_rb_setup(phba);
7894
fc2b989b
JS
7895 /* Reset HBA FCF states after HBA reset */
7896 phba->fcf.fcf_flag = 0;
7897 phba->fcf.current_rec.flag = 0;
7898
da0436e9 7899 /* Start the ELS watchdog timer */
8fa38513 7900 mod_timer(&vport->els_tmofunc,
256ec0d0 7901 jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov * 2)));
da0436e9
JS
7902
7903 /* Start heart beat timer */
7904 mod_timer(&phba->hb_tmofunc,
256ec0d0 7905 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
da0436e9
JS
7906 phba->hb_outstanding = 0;
7907 phba->last_completion_time = jiffies;
7908
32517fc0
JS
7909 /* start eq_delay heartbeat */
7910 if (phba->cfg_auto_imax)
7911 queue_delayed_work(phba->wq, &phba->eq_delay_work,
7912 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
7913
317aeb83
DK
7914 /* start per phba idle_stat_delay heartbeat */
7915 lpfc_init_idle_stat_hb(phba);
7916
da0436e9 7917 /* Start error attention (ERATT) polling timer */
256ec0d0 7918 mod_timer(&phba->eratt_poll,
65791f1f 7919 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
da0436e9 7920
75baf696
JS
7921 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
7922 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
7923 rc = pci_enable_pcie_error_reporting(phba->pcidev);
7924 if (!rc) {
7925 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7926 "2829 This device supports "
7927 "Advanced Error Reporting (AER)\n");
7928 spin_lock_irq(&phba->hbalock);
7929 phba->hba_flag |= HBA_AER_ENABLED;
7930 spin_unlock_irq(&phba->hbalock);
7931 } else {
7932 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7933 "2830 This device does not support "
7934 "Advanced Error Reporting (AER)\n");
7935 phba->cfg_aer_support = 0;
7936 }
0a96e975 7937 rc = 0;
75baf696
JS
7938 }
7939
da0436e9
JS
7940 /*
7941 * The port is ready, set the host's link state to LINK_DOWN
7942 * in preparation for link interrupts.
7943 */
da0436e9
JS
7944 spin_lock_irq(&phba->hbalock);
7945 phba->link_state = LPFC_LINK_DOWN;
1dc5ec24
JS
7946
7947 /* Check if physical ports are trunked */
7948 if (bf_get(lpfc_conf_trunk_port0, &phba->sli4_hba))
7949 phba->trunk_link.link0.state = LPFC_LINK_DOWN;
7950 if (bf_get(lpfc_conf_trunk_port1, &phba->sli4_hba))
7951 phba->trunk_link.link1.state = LPFC_LINK_DOWN;
7952 if (bf_get(lpfc_conf_trunk_port2, &phba->sli4_hba))
7953 phba->trunk_link.link2.state = LPFC_LINK_DOWN;
7954 if (bf_get(lpfc_conf_trunk_port3, &phba->sli4_hba))
7955 phba->trunk_link.link3.state = LPFC_LINK_DOWN;
da0436e9 7956 spin_unlock_irq(&phba->hbalock);
1dc5ec24 7957
e8869f5b
JS
7958 /* Arm the CQs and then EQs on device */
7959 lpfc_sli4_arm_cqeq_intr(phba);
7960
7961 /* Indicate device interrupt mode */
7962 phba->sli4_hba.intr_enable = 1;
7963
026abb87
JS
7964 if (!(phba->hba_flag & HBA_FCOE_MODE) &&
7965 (phba->hba_flag & LINK_DISABLED)) {
372c187b 7966 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
026abb87
JS
7967 "3103 Adapter Link is disabled.\n");
7968 lpfc_down_link(phba, mboxq);
7969 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7970 if (rc != MBX_SUCCESS) {
372c187b 7971 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
026abb87
JS
7972 "3104 Adapter failed to issue "
7973 "DOWN_LINK mbox cmd, rc:x%x\n", rc);
c490850a 7974 goto out_io_buff_free;
026abb87
JS
7975 }
7976 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
1b51197d
JS
7977 /* don't perform init_link on SLI4 FC port loopback test */
7978 if (!(phba->link_flag & LS_LOOPBACK_MODE)) {
7979 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
7980 if (rc)
c490850a 7981 goto out_io_buff_free;
1b51197d 7982 }
5350d872
JS
7983 }
7984 mempool_free(mboxq, phba->mbox_mem_pool);
7985 return rc;
c490850a
JS
7986out_io_buff_free:
7987 /* Free allocated IO Buffers */
7988 lpfc_io_free(phba);
76a95d75 7989out_unset_queue:
da0436e9 7990 /* Unset all the queues set up in this routine when error out */
5350d872
JS
7991 lpfc_sli4_queue_unset(phba);
7992out_destroy_queue:
6c621a22 7993 lpfc_free_iocb_list(phba);
5350d872 7994 lpfc_sli4_queue_destroy(phba);
da0436e9 7995out_stop_timers:
5350d872 7996 lpfc_stop_hba_timers(phba);
da0436e9
JS
7997out_free_mbox:
7998 mempool_free(mboxq, phba->mbox_mem_pool);
7999 return rc;
8000}
8001
8002/**
8003 * lpfc_mbox_timeout - Timeout call back function for mbox timer
7af29d45 8004 * @t: Context to fetch pointer to hba structure from.
da0436e9
JS
8005 *
8006 * This is the callback function for mailbox timer. The mailbox
8007 * timer is armed when a new mailbox command is issued and the timer
8008 * is deleted when the mailbox complete. The function is called by
8009 * the kernel timer code when a mailbox does not complete within
8010 * expected time. This function wakes up the worker thread to
8011 * process the mailbox timeout and returns. All the processing is
8012 * done by the worker thread function lpfc_mbox_timeout_handler.
8013 **/
8014void
f22eb4d3 8015lpfc_mbox_timeout(struct timer_list *t)
da0436e9 8016{
f22eb4d3 8017 struct lpfc_hba *phba = from_timer(phba, t, sli.mbox_tmo);
da0436e9
JS
8018 unsigned long iflag;
8019 uint32_t tmo_posted;
8020
8021 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
8022 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
8023 if (!tmo_posted)
8024 phba->pport->work_port_events |= WORKER_MBOX_TMO;
8025 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
8026
8027 if (!tmo_posted)
8028 lpfc_worker_wake_up(phba);
8029 return;
8030}
8031
e8d3c3b1
JS
8032/**
8033 * lpfc_sli4_mbox_completions_pending - check to see if any mailbox completions
8034 * are pending
8035 * @phba: Pointer to HBA context object.
8036 *
8037 * This function checks if any mailbox completions are present on the mailbox
8038 * completion queue.
8039 **/
3bb11fc5 8040static bool
e8d3c3b1
JS
8041lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba)
8042{
8043
8044 uint32_t idx;
8045 struct lpfc_queue *mcq;
8046 struct lpfc_mcqe *mcqe;
8047 bool pending_completions = false;
7365f6fd 8048 uint8_t qe_valid;
e8d3c3b1
JS
8049
8050 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
8051 return false;
8052
8053 /* Check for completions on mailbox completion queue */
8054
8055 mcq = phba->sli4_hba.mbx_cq;
8056 idx = mcq->hba_index;
7365f6fd 8057 qe_valid = mcq->qe_valid;
9afbee3d
JS
8058 while (bf_get_le32(lpfc_cqe_valid,
8059 (struct lpfc_cqe *)lpfc_sli4_qe(mcq, idx)) == qe_valid) {
8060 mcqe = (struct lpfc_mcqe *)(lpfc_sli4_qe(mcq, idx));
e8d3c3b1
JS
8061 if (bf_get_le32(lpfc_trailer_completed, mcqe) &&
8062 (!bf_get_le32(lpfc_trailer_async, mcqe))) {
8063 pending_completions = true;
8064 break;
8065 }
8066 idx = (idx + 1) % mcq->entry_count;
8067 if (mcq->hba_index == idx)
8068 break;
7365f6fd
JS
8069
8070 /* if the index wrapped around, toggle the valid bit */
8071 if (phba->sli4_hba.pc_sli4_params.cqav && !idx)
8072 qe_valid = (qe_valid) ? 0 : 1;
e8d3c3b1
JS
8073 }
8074 return pending_completions;
8075
8076}
8077
8078/**
8079 * lpfc_sli4_process_missed_mbox_completions - process mbox completions
8080 * that were missed.
8081 * @phba: Pointer to HBA context object.
8082 *
8083 * For sli4, it is possible to miss an interrupt. As such mbox completions
8084 * maybe missed causing erroneous mailbox timeouts to occur. This function
8085 * checks to see if mbox completions are on the mailbox completion queue
8086 * and will process all the completions associated with the eq for the
8087 * mailbox completion queue.
8088 **/
d7b761b0 8089static bool
e8d3c3b1
JS
8090lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba)
8091{
b71413dd 8092 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
e8d3c3b1
JS
8093 uint32_t eqidx;
8094 struct lpfc_queue *fpeq = NULL;
657add4e 8095 struct lpfc_queue *eq;
e8d3c3b1
JS
8096 bool mbox_pending;
8097
8098 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
8099 return false;
8100
657add4e
JS
8101 /* Find the EQ associated with the mbox CQ */
8102 if (sli4_hba->hdwq) {
8103 for (eqidx = 0; eqidx < phba->cfg_irq_chann; eqidx++) {
8104 eq = phba->sli4_hba.hba_eq_hdl[eqidx].eq;
535fb49e 8105 if (eq && eq->queue_id == sli4_hba->mbx_cq->assoc_qid) {
657add4e 8106 fpeq = eq;
e8d3c3b1
JS
8107 break;
8108 }
657add4e
JS
8109 }
8110 }
e8d3c3b1
JS
8111 if (!fpeq)
8112 return false;
8113
8114 /* Turn off interrupts from this EQ */
8115
b71413dd 8116 sli4_hba->sli4_eq_clr_intr(fpeq);
e8d3c3b1
JS
8117
8118 /* Check to see if a mbox completion is pending */
8119
8120 mbox_pending = lpfc_sli4_mbox_completions_pending(phba);
8121
8122 /*
8123 * If a mbox completion is pending, process all the events on EQ
8124 * associated with the mbox completion queue (this could include
8125 * mailbox commands, async events, els commands, receive queue data
8126 * and fcp commands)
8127 */
8128
8129 if (mbox_pending)
32517fc0 8130 /* process and rearm the EQ */
93a4d6f4 8131 lpfc_sli4_process_eq(phba, fpeq, LPFC_QUEUE_REARM);
32517fc0
JS
8132 else
8133 /* Always clear and re-arm the EQ */
8134 sli4_hba->sli4_write_eq_db(phba, fpeq, 0, LPFC_QUEUE_REARM);
e8d3c3b1
JS
8135
8136 return mbox_pending;
8137
8138}
da0436e9
JS
8139
8140/**
8141 * lpfc_mbox_timeout_handler - Worker thread function to handle mailbox timeout
8142 * @phba: Pointer to HBA context object.
8143 *
8144 * This function is called from worker thread when a mailbox command times out.
8145 * The caller is not required to hold any locks. This function will reset the
8146 * HBA and recover all the pending commands.
8147 **/
8148void
8149lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
8150{
8151 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
eb016566
JS
8152 MAILBOX_t *mb = NULL;
8153
da0436e9 8154 struct lpfc_sli *psli = &phba->sli;
da0436e9 8155
e8d3c3b1
JS
8156 /* If the mailbox completed, process the completion and return */
8157 if (lpfc_sli4_process_missed_mbox_completions(phba))
8158 return;
8159
eb016566
JS
8160 if (pmbox != NULL)
8161 mb = &pmbox->u.mb;
da0436e9
JS
8162 /* Check the pmbox pointer first. There is a race condition
8163 * between the mbox timeout handler getting executed in the
8164 * worklist and the mailbox actually completing. When this
8165 * race condition occurs, the mbox_active will be NULL.
8166 */
8167 spin_lock_irq(&phba->hbalock);
8168 if (pmbox == NULL) {
8169 lpfc_printf_log(phba, KERN_WARNING,
8170 LOG_MBOX | LOG_SLI,
8171 "0353 Active Mailbox cleared - mailbox timeout "
8172 "exiting\n");
8173 spin_unlock_irq(&phba->hbalock);
8174 return;
8175 }
8176
8177 /* Mbox cmd <mbxCommand> timeout */
372c187b 8178 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
32350664 8179 "0310 Mailbox command x%x timeout Data: x%x x%x x%px\n",
da0436e9
JS
8180 mb->mbxCommand,
8181 phba->pport->port_state,
8182 phba->sli.sli_flag,
8183 phba->sli.mbox_active);
8184 spin_unlock_irq(&phba->hbalock);
8185
8186 /* Setting state unknown so lpfc_sli_abort_iocb_ring
8187 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
25985edc 8188 * it to fail all outstanding SCSI IO.
da0436e9
JS
8189 */
8190 spin_lock_irq(&phba->pport->work_port_lock);
8191 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
8192 spin_unlock_irq(&phba->pport->work_port_lock);
8193 spin_lock_irq(&phba->hbalock);
8194 phba->link_state = LPFC_LINK_UNKNOWN;
f4b4c68f 8195 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
da0436e9
JS
8196 spin_unlock_irq(&phba->hbalock);
8197
db55fba8 8198 lpfc_sli_abort_fcp_rings(phba);
da0436e9 8199
372c187b 8200 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
da0436e9
JS
8201 "0345 Resetting board due to mailbox timeout\n");
8202
8203 /* Reset the HBA device */
8204 lpfc_reset_hba(phba);
8205}
8206
8207/**
8208 * lpfc_sli_issue_mbox_s3 - Issue an SLI3 mailbox command to firmware
8209 * @phba: Pointer to HBA context object.
8210 * @pmbox: Pointer to mailbox object.
8211 * @flag: Flag indicating how the mailbox need to be processed.
8212 *
8213 * This function is called by discovery code and HBA management code
8214 * to submit a mailbox command to firmware with SLI-3 interface spec. This
8215 * function gets the hbalock to protect the data structures.
8216 * The mailbox command can be submitted in polling mode, in which case
8217 * this function will wait in a polling loop for the completion of the
8218 * mailbox.
8219 * If the mailbox is submitted in no_wait mode (not polling) the
8220 * function will submit the command and returns immediately without waiting
8221 * for the mailbox completion. The no_wait is supported only when HBA
8222 * is in SLI2/SLI3 mode - interrupts are enabled.
8223 * The SLI interface allows only one mailbox pending at a time. If the
8224 * mailbox is issued in polling mode and there is already a mailbox
8225 * pending, then the function will return an error. If the mailbox is issued
8226 * in NO_WAIT mode and there is a mailbox pending already, the function
8227 * will return MBX_BUSY after queuing the mailbox into mailbox queue.
8228 * The sli layer owns the mailbox object until the completion of mailbox
8229 * command if this function return MBX_BUSY or MBX_SUCCESS. For all other
8230 * return codes the caller owns the mailbox command after the return of
8231 * the function.
e59058c4 8232 **/
3772a991
JS
8233static int
8234lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
8235 uint32_t flag)
dea3101e 8236{
bf07bdea 8237 MAILBOX_t *mbx;
2e0fef85 8238 struct lpfc_sli *psli = &phba->sli;
dea3101e 8239 uint32_t status, evtctr;
9940b97b 8240 uint32_t ha_copy, hc_copy;
dea3101e 8241 int i;
09372820 8242 unsigned long timeout;
dea3101e 8243 unsigned long drvr_flag = 0;
34b02dcd 8244 uint32_t word0, ldata;
dea3101e 8245 void __iomem *to_slim;
58da1ffb
JS
8246 int processing_queue = 0;
8247
8248 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8249 if (!pmbox) {
8568a4d2 8250 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
58da1ffb 8251 /* processing mbox queue from intr_handler */
3772a991
JS
8252 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8253 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8254 return MBX_SUCCESS;
8255 }
58da1ffb 8256 processing_queue = 1;
58da1ffb
JS
8257 pmbox = lpfc_mbox_get(phba);
8258 if (!pmbox) {
8259 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8260 return MBX_SUCCESS;
8261 }
8262 }
dea3101e 8263
ed957684 8264 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 8265 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684 8266 if(!pmbox->vport) {
58da1ffb 8267 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
ed957684 8268 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 8269 LOG_MBOX | LOG_VPORT,
e8b62011 8270 "1806 Mbox x%x failed. No vport\n",
3772a991 8271 pmbox->u.mb.mbxCommand);
ed957684 8272 dump_stack();
58da1ffb 8273 goto out_not_finished;
ed957684
JS
8274 }
8275 }
8276
8d63f375 8277 /* If the PCI channel is in offline state, do not post mbox. */
58da1ffb
JS
8278 if (unlikely(pci_channel_offline(phba->pcidev))) {
8279 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8280 goto out_not_finished;
8281 }
8d63f375 8282
a257bf90
JS
8283 /* If HBA has a deferred error attention, fail the iocb. */
8284 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
8285 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8286 goto out_not_finished;
8287 }
8288
dea3101e 8289 psli = &phba->sli;
92d7f7b0 8290
bf07bdea 8291 mbx = &pmbox->u.mb;
dea3101e
JB
8292 status = MBX_SUCCESS;
8293
2e0fef85
JS
8294 if (phba->link_state == LPFC_HBA_ERROR) {
8295 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW
8296
8297 /* Mbox command <mbxCommand> cannot issue */
372c187b 8298 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3772a991
JS
8299 "(%d):0311 Mailbox command x%x cannot "
8300 "issue Data: x%x x%x\n",
8301 pmbox->vport ? pmbox->vport->vpi : 0,
8302 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
58da1ffb 8303 goto out_not_finished;
41415862
JW
8304 }
8305
bf07bdea 8306 if (mbx->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT) {
9940b97b
JS
8307 if (lpfc_readl(phba->HCregaddr, &hc_copy) ||
8308 !(hc_copy & HC_MBINT_ENA)) {
8309 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
372c187b 8310 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3772a991
JS
8311 "(%d):2528 Mailbox command x%x cannot "
8312 "issue Data: x%x x%x\n",
8313 pmbox->vport ? pmbox->vport->vpi : 0,
8314 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
9940b97b
JS
8315 goto out_not_finished;
8316 }
9290831f
JS
8317 }
8318
dea3101e
JB
8319 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8320 /* Polling for a mbox command when another one is already active
8321 * is not allowed in SLI. Also, the driver must have established
8322 * SLI2 mode to queue and process multiple mbox commands.
8323 */
8324
8325 if (flag & MBX_POLL) {
2e0fef85 8326 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
8327
8328 /* Mbox command <mbxCommand> cannot issue */
372c187b 8329 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3772a991
JS
8330 "(%d):2529 Mailbox command x%x "
8331 "cannot issue Data: x%x x%x\n",
8332 pmbox->vport ? pmbox->vport->vpi : 0,
8333 pmbox->u.mb.mbxCommand,
8334 psli->sli_flag, flag);
58da1ffb 8335 goto out_not_finished;
dea3101e
JB
8336 }
8337
3772a991 8338 if (!(psli->sli_flag & LPFC_SLI_ACTIVE)) {
2e0fef85 8339 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8340 /* Mbox command <mbxCommand> cannot issue */
372c187b 8341 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3772a991
JS
8342 "(%d):2530 Mailbox command x%x "
8343 "cannot issue Data: x%x x%x\n",
8344 pmbox->vport ? pmbox->vport->vpi : 0,
8345 pmbox->u.mb.mbxCommand,
8346 psli->sli_flag, flag);
58da1ffb 8347 goto out_not_finished;
dea3101e
JB
8348 }
8349
dea3101e
JB
8350 /* Another mailbox command is still being processed, queue this
8351 * command to be processed later.
8352 */
8353 lpfc_mbox_put(phba, pmbox);
8354
8355 /* Mbox cmd issue - BUSY */
ed957684 8356 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8357 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 8358 "x%x x%x x%x x%x\n",
92d7f7b0 8359 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
e92974f6
JS
8360 mbx->mbxCommand,
8361 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8362 psli->sli_flag, flag);
dea3101e
JB
8363
8364 psli->slistat.mbox_busy++;
2e0fef85 8365 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8366
858c9f6c
JS
8367 if (pmbox->vport) {
8368 lpfc_debugfs_disc_trc(pmbox->vport,
8369 LPFC_DISC_TRC_MBOX_VPORT,
8370 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8371 (uint32_t)mbx->mbxCommand,
8372 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8373 }
8374 else {
8375 lpfc_debugfs_disc_trc(phba->pport,
8376 LPFC_DISC_TRC_MBOX,
8377 "MBOX Bsy: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8378 (uint32_t)mbx->mbxCommand,
8379 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8380 }
8381
2e0fef85 8382 return MBX_BUSY;
dea3101e
JB
8383 }
8384
dea3101e
JB
8385 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8386
8387 /* If we are not polling, we MUST be in SLI2 mode */
8388 if (flag != MBX_POLL) {
3772a991 8389 if (!(psli->sli_flag & LPFC_SLI_ACTIVE) &&
bf07bdea 8390 (mbx->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 8391 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8392 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8393 /* Mbox command <mbxCommand> cannot issue */
372c187b 8394 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3772a991
JS
8395 "(%d):2531 Mailbox command x%x "
8396 "cannot issue Data: x%x x%x\n",
8397 pmbox->vport ? pmbox->vport->vpi : 0,
8398 pmbox->u.mb.mbxCommand,
8399 psli->sli_flag, flag);
58da1ffb 8400 goto out_not_finished;
dea3101e
JB
8401 }
8402 /* timeout active mbox command */
256ec0d0
JS
8403 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8404 1000);
8405 mod_timer(&psli->mbox_tmo, jiffies + timeout);
dea3101e
JB
8406 }
8407
8408 /* Mailbox cmd <cmd> issue */
ed957684 8409 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8410 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 8411 "x%x\n",
e8b62011 8412 pmbox->vport ? pmbox->vport->vpi : 0,
e92974f6
JS
8413 mbx->mbxCommand,
8414 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8415 psli->sli_flag, flag);
dea3101e 8416
bf07bdea 8417 if (mbx->mbxCommand != MBX_HEARTBEAT) {
858c9f6c
JS
8418 if (pmbox->vport) {
8419 lpfc_debugfs_disc_trc(pmbox->vport,
8420 LPFC_DISC_TRC_MBOX_VPORT,
8421 "MBOX Send vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8422 (uint32_t)mbx->mbxCommand,
8423 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8424 }
8425 else {
8426 lpfc_debugfs_disc_trc(phba->pport,
8427 LPFC_DISC_TRC_MBOX,
8428 "MBOX Send: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8429 (uint32_t)mbx->mbxCommand,
8430 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8431 }
8432 }
8433
dea3101e
JB
8434 psli->slistat.mbox_cmd++;
8435 evtctr = psli->slistat.mbox_event;
8436
8437 /* next set own bit for the adapter and copy over command word */
bf07bdea 8438 mbx->mbxOwner = OWN_CHIP;
dea3101e 8439
3772a991 8440 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
7a470277
JS
8441 /* Populate mbox extension offset word. */
8442 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len) {
bf07bdea 8443 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8444 = (uint8_t *)phba->mbox_ext
8445 - (uint8_t *)phba->mbox;
8446 }
8447
8448 /* Copy the mailbox extension data */
3e1f0718
JS
8449 if (pmbox->in_ext_byte_len && pmbox->ctx_buf) {
8450 lpfc_sli_pcimem_bcopy(pmbox->ctx_buf,
8451 (uint8_t *)phba->mbox_ext,
8452 pmbox->in_ext_byte_len);
7a470277
JS
8453 }
8454 /* Copy command data to host SLIM area */
bf07bdea 8455 lpfc_sli_pcimem_bcopy(mbx, phba->mbox, MAILBOX_CMD_SIZE);
dea3101e 8456 } else {
7a470277
JS
8457 /* Populate mbox extension offset word. */
8458 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len)
bf07bdea 8459 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8460 = MAILBOX_HBA_EXT_OFFSET;
8461
8462 /* Copy the mailbox extension data */
3e1f0718 8463 if (pmbox->in_ext_byte_len && pmbox->ctx_buf)
7a470277
JS
8464 lpfc_memcpy_to_slim(phba->MBslimaddr +
8465 MAILBOX_HBA_EXT_OFFSET,
3e1f0718 8466 pmbox->ctx_buf, pmbox->in_ext_byte_len);
7a470277 8467
895427bd 8468 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8469 /* copy command data into host mbox for cmpl */
895427bd
JS
8470 lpfc_sli_pcimem_bcopy(mbx, phba->mbox,
8471 MAILBOX_CMD_SIZE);
dea3101e
JB
8472
8473 /* First copy mbox command data to HBA SLIM, skip past first
8474 word */
8475 to_slim = phba->MBslimaddr + sizeof (uint32_t);
bf07bdea 8476 lpfc_memcpy_to_slim(to_slim, &mbx->un.varWords[0],
dea3101e
JB
8477 MAILBOX_CMD_SIZE - sizeof (uint32_t));
8478
8479 /* Next copy over first word, with mbxOwner set */
bf07bdea 8480 ldata = *((uint32_t *)mbx);
dea3101e
JB
8481 to_slim = phba->MBslimaddr;
8482 writel(ldata, to_slim);
8483 readl(to_slim); /* flush */
8484
895427bd 8485 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8486 /* switch over to host mailbox */
3772a991 8487 psli->sli_flag |= LPFC_SLI_ACTIVE;
dea3101e
JB
8488 }
8489
8490 wmb();
dea3101e
JB
8491
8492 switch (flag) {
8493 case MBX_NOWAIT:
09372820 8494 /* Set up reference to mailbox command */
dea3101e 8495 psli->mbox_active = pmbox;
09372820
JS
8496 /* Interrupt board to do it */
8497 writel(CA_MBATT, phba->CAregaddr);
8498 readl(phba->CAregaddr); /* flush */
8499 /* Don't wait for it to finish, just return */
dea3101e
JB
8500 break;
8501
8502 case MBX_POLL:
09372820 8503 /* Set up null reference to mailbox command */
dea3101e 8504 psli->mbox_active = NULL;
09372820
JS
8505 /* Interrupt board to do it */
8506 writel(CA_MBATT, phba->CAregaddr);
8507 readl(phba->CAregaddr); /* flush */
8508
3772a991 8509 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8510 /* First read mbox status word */
34b02dcd 8511 word0 = *((uint32_t *)phba->mbox);
dea3101e
JB
8512 word0 = le32_to_cpu(word0);
8513 } else {
8514 /* First read mbox status word */
9940b97b
JS
8515 if (lpfc_readl(phba->MBslimaddr, &word0)) {
8516 spin_unlock_irqrestore(&phba->hbalock,
8517 drvr_flag);
8518 goto out_not_finished;
8519 }
dea3101e
JB
8520 }
8521
8522 /* Read the HBA Host Attention Register */
9940b97b
JS
8523 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8524 spin_unlock_irqrestore(&phba->hbalock,
8525 drvr_flag);
8526 goto out_not_finished;
8527 }
a183a15f
JS
8528 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8529 1000) + jiffies;
09372820 8530 i = 0;
dea3101e 8531 /* Wait for command to complete */
41415862
JW
8532 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
8533 (!(ha_copy & HA_MBATT) &&
2e0fef85 8534 (phba->link_state > LPFC_WARM_START))) {
09372820 8535 if (time_after(jiffies, timeout)) {
dea3101e 8536 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8537 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 8538 drvr_flag);
58da1ffb 8539 goto out_not_finished;
dea3101e
JB
8540 }
8541
8542 /* Check if we took a mbox interrupt while we were
8543 polling */
8544 if (((word0 & OWN_CHIP) != OWN_CHIP)
8545 && (evtctr != psli->slistat.mbox_event))
8546 break;
8547
09372820
JS
8548 if (i++ > 10) {
8549 spin_unlock_irqrestore(&phba->hbalock,
8550 drvr_flag);
8551 msleep(1);
8552 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8553 }
dea3101e 8554
3772a991 8555 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8556 /* First copy command data */
34b02dcd 8557 word0 = *((uint32_t *)phba->mbox);
dea3101e 8558 word0 = le32_to_cpu(word0);
bf07bdea 8559 if (mbx->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 8560 MAILBOX_t *slimmb;
34b02dcd 8561 uint32_t slimword0;
dea3101e
JB
8562 /* Check real SLIM for any errors */
8563 slimword0 = readl(phba->MBslimaddr);
8564 slimmb = (MAILBOX_t *) & slimword0;
8565 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
8566 && slimmb->mbxStatus) {
8567 psli->sli_flag &=
3772a991 8568 ~LPFC_SLI_ACTIVE;
dea3101e
JB
8569 word0 = slimword0;
8570 }
8571 }
8572 } else {
8573 /* First copy command data */
8574 word0 = readl(phba->MBslimaddr);
8575 }
8576 /* Read the HBA Host Attention Register */
9940b97b
JS
8577 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8578 spin_unlock_irqrestore(&phba->hbalock,
8579 drvr_flag);
8580 goto out_not_finished;
8581 }
dea3101e
JB
8582 }
8583
3772a991 8584 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8585 /* copy results back to user */
2ea259ee
JS
8586 lpfc_sli_pcimem_bcopy(phba->mbox, mbx,
8587 MAILBOX_CMD_SIZE);
7a470277 8588 /* Copy the mailbox extension data */
3e1f0718 8589 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
7a470277 8590 lpfc_sli_pcimem_bcopy(phba->mbox_ext,
3e1f0718 8591 pmbox->ctx_buf,
7a470277
JS
8592 pmbox->out_ext_byte_len);
8593 }
dea3101e
JB
8594 } else {
8595 /* First copy command data */
bf07bdea 8596 lpfc_memcpy_from_slim(mbx, phba->MBslimaddr,
2ea259ee 8597 MAILBOX_CMD_SIZE);
7a470277 8598 /* Copy the mailbox extension data */
3e1f0718
JS
8599 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
8600 lpfc_memcpy_from_slim(
8601 pmbox->ctx_buf,
7a470277
JS
8602 phba->MBslimaddr +
8603 MAILBOX_HBA_EXT_OFFSET,
8604 pmbox->out_ext_byte_len);
dea3101e
JB
8605 }
8606 }
8607
8608 writel(HA_MBATT, phba->HAregaddr);
8609 readl(phba->HAregaddr); /* flush */
8610
8611 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
bf07bdea 8612 status = mbx->mbxStatus;
dea3101e
JB
8613 }
8614
2e0fef85
JS
8615 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8616 return status;
58da1ffb
JS
8617
8618out_not_finished:
8619 if (processing_queue) {
da0436e9 8620 pmbox->u.mb.mbxStatus = MBX_NOT_FINISHED;
58da1ffb
JS
8621 lpfc_mbox_cmpl_put(phba, pmbox);
8622 }
8623 return MBX_NOT_FINISHED;
dea3101e
JB
8624}
8625
f1126688
JS
8626/**
8627 * lpfc_sli4_async_mbox_block - Block posting SLI4 asynchronous mailbox command
8628 * @phba: Pointer to HBA context object.
8629 *
8630 * The function blocks the posting of SLI4 asynchronous mailbox commands from
8631 * the driver internal pending mailbox queue. It will then try to wait out the
8632 * possible outstanding mailbox command before return.
8633 *
8634 * Returns:
8635 * 0 - the outstanding mailbox command completed; otherwise, the wait for
8636 * the outstanding mailbox command timed out.
8637 **/
8638static int
8639lpfc_sli4_async_mbox_block(struct lpfc_hba *phba)
8640{
8641 struct lpfc_sli *psli = &phba->sli;
f1126688 8642 int rc = 0;
a183a15f 8643 unsigned long timeout = 0;
f1126688
JS
8644
8645 /* Mark the asynchronous mailbox command posting as blocked */
8646 spin_lock_irq(&phba->hbalock);
8647 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
f1126688
JS
8648 /* Determine how long we might wait for the active mailbox
8649 * command to be gracefully completed by firmware.
8650 */
a183a15f
JS
8651 if (phba->sli.mbox_active)
8652 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
8653 phba->sli.mbox_active) *
8654 1000) + jiffies;
8655 spin_unlock_irq(&phba->hbalock);
8656
e8d3c3b1
JS
8657 /* Make sure the mailbox is really active */
8658 if (timeout)
8659 lpfc_sli4_process_missed_mbox_completions(phba);
8660
f1126688
JS
8661 /* Wait for the outstnading mailbox command to complete */
8662 while (phba->sli.mbox_active) {
8663 /* Check active mailbox complete status every 2ms */
8664 msleep(2);
8665 if (time_after(jiffies, timeout)) {
8666 /* Timeout, marked the outstanding cmd not complete */
8667 rc = 1;
8668 break;
8669 }
8670 }
8671
8672 /* Can not cleanly block async mailbox command, fails it */
8673 if (rc) {
8674 spin_lock_irq(&phba->hbalock);
8675 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8676 spin_unlock_irq(&phba->hbalock);
8677 }
8678 return rc;
8679}
8680
8681/**
8682 * lpfc_sli4_async_mbox_unblock - Block posting SLI4 async mailbox command
8683 * @phba: Pointer to HBA context object.
8684 *
8685 * The function unblocks and resume posting of SLI4 asynchronous mailbox
8686 * commands from the driver internal pending mailbox queue. It makes sure
8687 * that there is no outstanding mailbox command before resuming posting
8688 * asynchronous mailbox commands. If, for any reason, there is outstanding
8689 * mailbox command, it will try to wait it out before resuming asynchronous
8690 * mailbox command posting.
8691 **/
8692static void
8693lpfc_sli4_async_mbox_unblock(struct lpfc_hba *phba)
8694{
8695 struct lpfc_sli *psli = &phba->sli;
8696
8697 spin_lock_irq(&phba->hbalock);
8698 if (!(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8699 /* Asynchronous mailbox posting is not blocked, do nothing */
8700 spin_unlock_irq(&phba->hbalock);
8701 return;
8702 }
8703
8704 /* Outstanding synchronous mailbox command is guaranteed to be done,
8705 * successful or timeout, after timing-out the outstanding mailbox
8706 * command shall always be removed, so just unblock posting async
8707 * mailbox command and resume
8708 */
8709 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8710 spin_unlock_irq(&phba->hbalock);
8711
291c2548 8712 /* wake up worker thread to post asynchronous mailbox command */
f1126688
JS
8713 lpfc_worker_wake_up(phba);
8714}
8715
2d843edc
JS
8716/**
8717 * lpfc_sli4_wait_bmbx_ready - Wait for bootstrap mailbox register ready
8718 * @phba: Pointer to HBA context object.
8719 * @mboxq: Pointer to mailbox object.
8720 *
8721 * The function waits for the bootstrap mailbox register ready bit from
8722 * port for twice the regular mailbox command timeout value.
8723 *
8724 * 0 - no timeout on waiting for bootstrap mailbox register ready.
8725 * MBXERR_ERROR - wait for bootstrap mailbox register timed out.
8726 **/
8727static int
8728lpfc_sli4_wait_bmbx_ready(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8729{
8730 uint32_t db_ready;
8731 unsigned long timeout;
8732 struct lpfc_register bmbx_reg;
8733
8734 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, mboxq)
8735 * 1000) + jiffies;
8736
8737 do {
8738 bmbx_reg.word0 = readl(phba->sli4_hba.BMBXregaddr);
8739 db_ready = bf_get(lpfc_bmbx_rdy, &bmbx_reg);
8740 if (!db_ready)
e2ffe4d5 8741 mdelay(2);
2d843edc
JS
8742
8743 if (time_after(jiffies, timeout))
8744 return MBXERR_ERROR;
8745 } while (!db_ready);
8746
8747 return 0;
8748}
8749
da0436e9
JS
8750/**
8751 * lpfc_sli4_post_sync_mbox - Post an SLI4 mailbox to the bootstrap mailbox
8752 * @phba: Pointer to HBA context object.
8753 * @mboxq: Pointer to mailbox object.
8754 *
8755 * The function posts a mailbox to the port. The mailbox is expected
8756 * to be comletely filled in and ready for the port to operate on it.
8757 * This routine executes a synchronous completion operation on the
8758 * mailbox by polling for its completion.
8759 *
8760 * The caller must not be holding any locks when calling this routine.
8761 *
8762 * Returns:
8763 * MBX_SUCCESS - mailbox posted successfully
8764 * Any of the MBX error values.
8765 **/
8766static int
8767lpfc_sli4_post_sync_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8768{
8769 int rc = MBX_SUCCESS;
8770 unsigned long iflag;
da0436e9
JS
8771 uint32_t mcqe_status;
8772 uint32_t mbx_cmnd;
da0436e9
JS
8773 struct lpfc_sli *psli = &phba->sli;
8774 struct lpfc_mqe *mb = &mboxq->u.mqe;
8775 struct lpfc_bmbx_create *mbox_rgn;
8776 struct dma_address *dma_address;
da0436e9
JS
8777
8778 /*
8779 * Only one mailbox can be active to the bootstrap mailbox region
8780 * at a time and there is no queueing provided.
8781 */
8782 spin_lock_irqsave(&phba->hbalock, iflag);
8783 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8784 spin_unlock_irqrestore(&phba->hbalock, iflag);
372c187b 8785 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
a183a15f 8786 "(%d):2532 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8787 "cannot issue Data: x%x x%x\n",
8788 mboxq->vport ? mboxq->vport->vpi : 0,
8789 mboxq->u.mb.mbxCommand,
a183a15f
JS
8790 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8791 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8792 psli->sli_flag, MBX_POLL);
8793 return MBXERR_ERROR;
8794 }
8795 /* The server grabs the token and owns it until release */
8796 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8797 phba->sli.mbox_active = mboxq;
8798 spin_unlock_irqrestore(&phba->hbalock, iflag);
8799
2d843edc
JS
8800 /* wait for bootstrap mbox register for readyness */
8801 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8802 if (rc)
8803 goto exit;
da0436e9
JS
8804 /*
8805 * Initialize the bootstrap memory region to avoid stale data areas
8806 * in the mailbox post. Then copy the caller's mailbox contents to
8807 * the bmbx mailbox region.
8808 */
8809 mbx_cmnd = bf_get(lpfc_mqe_command, mb);
8810 memset(phba->sli4_hba.bmbx.avirt, 0, sizeof(struct lpfc_bmbx_create));
48f8fdb4
JS
8811 lpfc_sli4_pcimem_bcopy(mb, phba->sli4_hba.bmbx.avirt,
8812 sizeof(struct lpfc_mqe));
da0436e9
JS
8813
8814 /* Post the high mailbox dma address to the port and wait for ready. */
8815 dma_address = &phba->sli4_hba.bmbx.dma_address;
8816 writel(dma_address->addr_hi, phba->sli4_hba.BMBXregaddr);
8817
2d843edc
JS
8818 /* wait for bootstrap mbox register for hi-address write done */
8819 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8820 if (rc)
8821 goto exit;
da0436e9
JS
8822
8823 /* Post the low mailbox dma address to the port. */
8824 writel(dma_address->addr_lo, phba->sli4_hba.BMBXregaddr);
da0436e9 8825
2d843edc
JS
8826 /* wait for bootstrap mbox register for low address write done */
8827 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8828 if (rc)
8829 goto exit;
da0436e9
JS
8830
8831 /*
8832 * Read the CQ to ensure the mailbox has completed.
8833 * If so, update the mailbox status so that the upper layers
8834 * can complete the request normally.
8835 */
48f8fdb4
JS
8836 lpfc_sli4_pcimem_bcopy(phba->sli4_hba.bmbx.avirt, mb,
8837 sizeof(struct lpfc_mqe));
da0436e9 8838 mbox_rgn = (struct lpfc_bmbx_create *) phba->sli4_hba.bmbx.avirt;
48f8fdb4
JS
8839 lpfc_sli4_pcimem_bcopy(&mbox_rgn->mcqe, &mboxq->mcqe,
8840 sizeof(struct lpfc_mcqe));
da0436e9 8841 mcqe_status = bf_get(lpfc_mcqe_status, &mbox_rgn->mcqe);
0558056c
JS
8842 /*
8843 * When the CQE status indicates a failure and the mailbox status
8844 * indicates success then copy the CQE status into the mailbox status
8845 * (and prefix it with x4000).
8846 */
da0436e9 8847 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
0558056c
JS
8848 if (bf_get(lpfc_mqe_status, mb) == MBX_SUCCESS)
8849 bf_set(lpfc_mqe_status, mb,
8850 (LPFC_MBX_ERROR_RANGE | mcqe_status));
da0436e9 8851 rc = MBXERR_ERROR;
d7c47992
JS
8852 } else
8853 lpfc_sli4_swap_str(phba, mboxq);
da0436e9
JS
8854
8855 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8856 "(%d):0356 Mailbox cmd x%x (x%x/x%x) Status x%x "
da0436e9
JS
8857 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x"
8858 " x%x x%x CQ: x%x x%x x%x x%x\n",
a183a15f
JS
8859 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
8860 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8861 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8862 bf_get(lpfc_mqe_status, mb),
8863 mb->un.mb_words[0], mb->un.mb_words[1],
8864 mb->un.mb_words[2], mb->un.mb_words[3],
8865 mb->un.mb_words[4], mb->un.mb_words[5],
8866 mb->un.mb_words[6], mb->un.mb_words[7],
8867 mb->un.mb_words[8], mb->un.mb_words[9],
8868 mb->un.mb_words[10], mb->un.mb_words[11],
8869 mb->un.mb_words[12], mboxq->mcqe.word0,
8870 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
8871 mboxq->mcqe.trailer);
8872exit:
8873 /* We are holding the token, no needed for lock when release */
8874 spin_lock_irqsave(&phba->hbalock, iflag);
8875 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8876 phba->sli.mbox_active = NULL;
8877 spin_unlock_irqrestore(&phba->hbalock, iflag);
8878 return rc;
8879}
8880
8881/**
8882 * lpfc_sli_issue_mbox_s4 - Issue an SLI4 mailbox command to firmware
8883 * @phba: Pointer to HBA context object.
7af29d45 8884 * @mboxq: Pointer to mailbox object.
da0436e9
JS
8885 * @flag: Flag indicating how the mailbox need to be processed.
8886 *
8887 * This function is called by discovery code and HBA management code to submit
8888 * a mailbox command to firmware with SLI-4 interface spec.
8889 *
8890 * Return codes the caller owns the mailbox command after the return of the
8891 * function.
8892 **/
8893static int
8894lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
8895 uint32_t flag)
8896{
8897 struct lpfc_sli *psli = &phba->sli;
8898 unsigned long iflags;
8899 int rc;
8900
b76f2dc9
JS
8901 /* dump from issue mailbox command if setup */
8902 lpfc_idiag_mbxacc_dump_issue_mbox(phba, &mboxq->u.mb);
8903
8fa38513
JS
8904 rc = lpfc_mbox_dev_check(phba);
8905 if (unlikely(rc)) {
372c187b 8906 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
a183a15f 8907 "(%d):2544 Mailbox command x%x (x%x/x%x) "
8fa38513
JS
8908 "cannot issue Data: x%x x%x\n",
8909 mboxq->vport ? mboxq->vport->vpi : 0,
8910 mboxq->u.mb.mbxCommand,
a183a15f
JS
8911 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8912 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
8fa38513
JS
8913 psli->sli_flag, flag);
8914 goto out_not_finished;
8915 }
8916
da0436e9
JS
8917 /* Detect polling mode and jump to a handler */
8918 if (!phba->sli4_hba.intr_enable) {
8919 if (flag == MBX_POLL)
8920 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8921 else
8922 rc = -EIO;
8923 if (rc != MBX_SUCCESS)
0558056c 8924 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
da0436e9 8925 "(%d):2541 Mailbox command x%x "
cc459f19
JS
8926 "(x%x/x%x) failure: "
8927 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8928 "Data: x%x x%x\n,",
da0436e9
JS
8929 mboxq->vport ? mboxq->vport->vpi : 0,
8930 mboxq->u.mb.mbxCommand,
a183a15f
JS
8931 lpfc_sli_config_mbox_subsys_get(phba,
8932 mboxq),
8933 lpfc_sli_config_mbox_opcode_get(phba,
8934 mboxq),
cc459f19
JS
8935 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8936 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8937 bf_get(lpfc_mcqe_ext_status,
8938 &mboxq->mcqe),
da0436e9
JS
8939 psli->sli_flag, flag);
8940 return rc;
8941 } else if (flag == MBX_POLL) {
f1126688
JS
8942 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
8943 "(%d):2542 Try to issue mailbox command "
7365f6fd 8944 "x%x (x%x/x%x) synchronously ahead of async "
f1126688 8945 "mailbox command queue: x%x x%x\n",
da0436e9
JS
8946 mboxq->vport ? mboxq->vport->vpi : 0,
8947 mboxq->u.mb.mbxCommand,
a183a15f
JS
8948 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8949 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9 8950 psli->sli_flag, flag);
f1126688
JS
8951 /* Try to block the asynchronous mailbox posting */
8952 rc = lpfc_sli4_async_mbox_block(phba);
8953 if (!rc) {
8954 /* Successfully blocked, now issue sync mbox cmd */
8955 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8956 if (rc != MBX_SUCCESS)
cc459f19 8957 lpfc_printf_log(phba, KERN_WARNING,
a183a15f 8958 LOG_MBOX | LOG_SLI,
cc459f19
JS
8959 "(%d):2597 Sync Mailbox command "
8960 "x%x (x%x/x%x) failure: "
8961 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8962 "Data: x%x x%x\n,",
8963 mboxq->vport ? mboxq->vport->vpi : 0,
a183a15f
JS
8964 mboxq->u.mb.mbxCommand,
8965 lpfc_sli_config_mbox_subsys_get(phba,
8966 mboxq),
8967 lpfc_sli_config_mbox_opcode_get(phba,
8968 mboxq),
cc459f19
JS
8969 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8970 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8971 bf_get(lpfc_mcqe_ext_status,
8972 &mboxq->mcqe),
a183a15f 8973 psli->sli_flag, flag);
f1126688
JS
8974 /* Unblock the async mailbox posting afterward */
8975 lpfc_sli4_async_mbox_unblock(phba);
8976 }
8977 return rc;
da0436e9
JS
8978 }
8979
291c2548 8980 /* Now, interrupt mode asynchronous mailbox command */
da0436e9
JS
8981 rc = lpfc_mbox_cmd_check(phba, mboxq);
8982 if (rc) {
372c187b 8983 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
a183a15f 8984 "(%d):2543 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8985 "cannot issue Data: x%x x%x\n",
8986 mboxq->vport ? mboxq->vport->vpi : 0,
8987 mboxq->u.mb.mbxCommand,
a183a15f
JS
8988 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8989 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8990 psli->sli_flag, flag);
8991 goto out_not_finished;
8992 }
da0436e9
JS
8993
8994 /* Put the mailbox command to the driver internal FIFO */
8995 psli->slistat.mbox_busy++;
8996 spin_lock_irqsave(&phba->hbalock, iflags);
8997 lpfc_mbox_put(phba, mboxq);
8998 spin_unlock_irqrestore(&phba->hbalock, iflags);
8999 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
9000 "(%d):0354 Mbox cmd issue - Enqueue Data: "
a183a15f 9001 "x%x (x%x/x%x) x%x x%x x%x\n",
da0436e9
JS
9002 mboxq->vport ? mboxq->vport->vpi : 0xffffff,
9003 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
a183a15f
JS
9004 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
9005 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
9006 phba->pport->port_state,
9007 psli->sli_flag, MBX_NOWAIT);
9008 /* Wake up worker thread to transport mailbox command from head */
9009 lpfc_worker_wake_up(phba);
9010
9011 return MBX_BUSY;
9012
9013out_not_finished:
9014 return MBX_NOT_FINISHED;
9015}
9016
9017/**
9018 * lpfc_sli4_post_async_mbox - Post an SLI4 mailbox command to device
9019 * @phba: Pointer to HBA context object.
9020 *
9021 * This function is called by worker thread to send a mailbox command to
9022 * SLI4 HBA firmware.
9023 *
9024 **/
9025int
9026lpfc_sli4_post_async_mbox(struct lpfc_hba *phba)
9027{
9028 struct lpfc_sli *psli = &phba->sli;
9029 LPFC_MBOXQ_t *mboxq;
9030 int rc = MBX_SUCCESS;
9031 unsigned long iflags;
9032 struct lpfc_mqe *mqe;
9033 uint32_t mbx_cmnd;
9034
9035 /* Check interrupt mode before post async mailbox command */
9036 if (unlikely(!phba->sli4_hba.intr_enable))
9037 return MBX_NOT_FINISHED;
9038
9039 /* Check for mailbox command service token */
9040 spin_lock_irqsave(&phba->hbalock, iflags);
9041 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
9042 spin_unlock_irqrestore(&phba->hbalock, iflags);
9043 return MBX_NOT_FINISHED;
9044 }
9045 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
9046 spin_unlock_irqrestore(&phba->hbalock, iflags);
9047 return MBX_NOT_FINISHED;
9048 }
9049 if (unlikely(phba->sli.mbox_active)) {
9050 spin_unlock_irqrestore(&phba->hbalock, iflags);
372c187b 9051 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
da0436e9
JS
9052 "0384 There is pending active mailbox cmd\n");
9053 return MBX_NOT_FINISHED;
9054 }
9055 /* Take the mailbox command service token */
9056 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
9057
9058 /* Get the next mailbox command from head of queue */
9059 mboxq = lpfc_mbox_get(phba);
9060
9061 /* If no more mailbox command waiting for post, we're done */
9062 if (!mboxq) {
9063 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
9064 spin_unlock_irqrestore(&phba->hbalock, iflags);
9065 return MBX_SUCCESS;
9066 }
9067 phba->sli.mbox_active = mboxq;
9068 spin_unlock_irqrestore(&phba->hbalock, iflags);
9069
9070 /* Check device readiness for posting mailbox command */
9071 rc = lpfc_mbox_dev_check(phba);
9072 if (unlikely(rc))
9073 /* Driver clean routine will clean up pending mailbox */
9074 goto out_not_finished;
9075
9076 /* Prepare the mbox command to be posted */
9077 mqe = &mboxq->u.mqe;
9078 mbx_cmnd = bf_get(lpfc_mqe_command, mqe);
9079
9080 /* Start timer for the mbox_tmo and log some mailbox post messages */
9081 mod_timer(&psli->mbox_tmo, (jiffies +
256ec0d0 9082 msecs_to_jiffies(1000 * lpfc_mbox_tmo_val(phba, mboxq))));
da0436e9
JS
9083
9084 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 9085 "(%d):0355 Mailbox cmd x%x (x%x/x%x) issue Data: "
da0436e9
JS
9086 "x%x x%x\n",
9087 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
a183a15f
JS
9088 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
9089 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
9090 phba->pport->port_state, psli->sli_flag);
9091
9092 if (mbx_cmnd != MBX_HEARTBEAT) {
9093 if (mboxq->vport) {
9094 lpfc_debugfs_disc_trc(mboxq->vport,
9095 LPFC_DISC_TRC_MBOX_VPORT,
9096 "MBOX Send vport: cmd:x%x mb:x%x x%x",
9097 mbx_cmnd, mqe->un.mb_words[0],
9098 mqe->un.mb_words[1]);
9099 } else {
9100 lpfc_debugfs_disc_trc(phba->pport,
9101 LPFC_DISC_TRC_MBOX,
9102 "MBOX Send: cmd:x%x mb:x%x x%x",
9103 mbx_cmnd, mqe->un.mb_words[0],
9104 mqe->un.mb_words[1]);
9105 }
9106 }
9107 psli->slistat.mbox_cmd++;
9108
9109 /* Post the mailbox command to the port */
9110 rc = lpfc_sli4_mq_put(phba->sli4_hba.mbx_wq, mqe);
9111 if (rc != MBX_SUCCESS) {
372c187b 9112 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
a183a15f 9113 "(%d):2533 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
9114 "cannot issue Data: x%x x%x\n",
9115 mboxq->vport ? mboxq->vport->vpi : 0,
9116 mboxq->u.mb.mbxCommand,
a183a15f
JS
9117 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
9118 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
9119 psli->sli_flag, MBX_NOWAIT);
9120 goto out_not_finished;
9121 }
9122
9123 return rc;
9124
9125out_not_finished:
9126 spin_lock_irqsave(&phba->hbalock, iflags);
d7069f09
JS
9127 if (phba->sli.mbox_active) {
9128 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
9129 __lpfc_mbox_cmpl_put(phba, mboxq);
9130 /* Release the token */
9131 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
9132 phba->sli.mbox_active = NULL;
9133 }
da0436e9
JS
9134 spin_unlock_irqrestore(&phba->hbalock, iflags);
9135
9136 return MBX_NOT_FINISHED;
9137}
9138
9139/**
9140 * lpfc_sli_issue_mbox - Wrapper func for issuing mailbox command
9141 * @phba: Pointer to HBA context object.
9142 * @pmbox: Pointer to mailbox object.
9143 * @flag: Flag indicating how the mailbox need to be processed.
9144 *
9145 * This routine wraps the actual SLI3 or SLI4 mailbox issuing routine from
9146 * the API jump table function pointer from the lpfc_hba struct.
9147 *
9148 * Return codes the caller owns the mailbox command after the return of the
9149 * function.
9150 **/
9151int
9152lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
9153{
9154 return phba->lpfc_sli_issue_mbox(phba, pmbox, flag);
9155}
9156
9157/**
25985edc 9158 * lpfc_mbox_api_table_setup - Set up mbox api function jump table
da0436e9
JS
9159 * @phba: The hba struct for which this call is being executed.
9160 * @dev_grp: The HBA PCI-Device group number.
9161 *
9162 * This routine sets up the mbox interface API function jump table in @phba
9163 * struct.
9164 * Returns: 0 - success, -ENODEV - failure.
9165 **/
9166int
9167lpfc_mbox_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
9168{
9169
9170 switch (dev_grp) {
9171 case LPFC_PCI_DEV_LP:
9172 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s3;
9173 phba->lpfc_sli_handle_slow_ring_event =
9174 lpfc_sli_handle_slow_ring_event_s3;
9175 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s3;
9176 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s3;
9177 phba->lpfc_sli_brdready = lpfc_sli_brdready_s3;
9178 break;
9179 case LPFC_PCI_DEV_OC:
9180 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s4;
9181 phba->lpfc_sli_handle_slow_ring_event =
9182 lpfc_sli_handle_slow_ring_event_s4;
9183 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s4;
9184 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s4;
9185 phba->lpfc_sli_brdready = lpfc_sli_brdready_s4;
9186 break;
9187 default:
372c187b 9188 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
da0436e9
JS
9189 "1420 Invalid HBA PCI-device group: 0x%x\n",
9190 dev_grp);
9191 return -ENODEV;
9192 break;
9193 }
9194 return 0;
9195}
9196
e59058c4 9197/**
3621a710 9198 * __lpfc_sli_ringtx_put - Add an iocb to the txq
e59058c4
JS
9199 * @phba: Pointer to HBA context object.
9200 * @pring: Pointer to driver SLI ring object.
9201 * @piocb: Pointer to address of newly added command iocb.
9202 *
27f3efd6
JS
9203 * This function is called with hbalock held for SLI3 ports or
9204 * the ring lock held for SLI4 ports to add a command
e59058c4
JS
9205 * iocb to the txq when SLI layer cannot submit the command iocb
9206 * to the ring.
9207 **/
2a9bf3d0 9208void
92d7f7b0 9209__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 9210 struct lpfc_iocbq *piocb)
dea3101e 9211{
27f3efd6
JS
9212 if (phba->sli_rev == LPFC_SLI_REV4)
9213 lockdep_assert_held(&pring->ring_lock);
9214 else
9215 lockdep_assert_held(&phba->hbalock);
dea3101e
JB
9216 /* Insert the caller's iocb in the txq tail for later processing. */
9217 list_add_tail(&piocb->list, &pring->txq);
dea3101e
JB
9218}
9219
e59058c4 9220/**
3621a710 9221 * lpfc_sli_next_iocb - Get the next iocb in the txq
e59058c4
JS
9222 * @phba: Pointer to HBA context object.
9223 * @pring: Pointer to driver SLI ring object.
9224 * @piocb: Pointer to address of newly added command iocb.
9225 *
9226 * This function is called with hbalock held before a new
9227 * iocb is submitted to the firmware. This function checks
9228 * txq to flush the iocbs in txq to Firmware before
9229 * submitting new iocbs to the Firmware.
9230 * If there are iocbs in the txq which need to be submitted
9231 * to firmware, lpfc_sli_next_iocb returns the first element
9232 * of the txq after dequeuing it from txq.
9233 * If there is no iocb in the txq then the function will return
9234 * *piocb and *piocb is set to NULL. Caller needs to check
9235 * *piocb to find if there are more commands in the txq.
9236 **/
dea3101e
JB
9237static struct lpfc_iocbq *
9238lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 9239 struct lpfc_iocbq **piocb)
dea3101e
JB
9240{
9241 struct lpfc_iocbq * nextiocb;
9242
1c2ba475
JT
9243 lockdep_assert_held(&phba->hbalock);
9244
dea3101e
JB
9245 nextiocb = lpfc_sli_ringtx_get(phba, pring);
9246 if (!nextiocb) {
9247 nextiocb = *piocb;
9248 *piocb = NULL;
9249 }
9250
9251 return nextiocb;
9252}
9253
e59058c4 9254/**
3772a991 9255 * __lpfc_sli_issue_iocb_s3 - SLI3 device lockless ver of lpfc_sli_issue_iocb
e59058c4 9256 * @phba: Pointer to HBA context object.
3772a991 9257 * @ring_number: SLI ring number to issue iocb on.
e59058c4
JS
9258 * @piocb: Pointer to command iocb.
9259 * @flag: Flag indicating if this command can be put into txq.
9260 *
3772a991
JS
9261 * __lpfc_sli_issue_iocb_s3 is used by other functions in the driver to issue
9262 * an iocb command to an HBA with SLI-3 interface spec. If the PCI slot is
9263 * recovering from error state, if HBA is resetting or if LPFC_STOP_IOCB_EVENT
9264 * flag is turned on, the function returns IOCB_ERROR. When the link is down,
9265 * this function allows only iocbs for posting buffers. This function finds
9266 * next available slot in the command ring and posts the command to the
9267 * available slot and writes the port attention register to request HBA start
9268 * processing new iocb. If there is no slot available in the ring and
9269 * flag & SLI_IOCB_RET_IOCB is set, the new iocb is added to the txq, otherwise
9270 * the function returns IOCB_BUSY.
e59058c4 9271 *
3772a991
JS
9272 * This function is called with hbalock held. The function will return success
9273 * after it successfully submit the iocb to firmware or after adding to the
9274 * txq.
e59058c4 9275 **/
98c9ea5c 9276static int
3772a991 9277__lpfc_sli_issue_iocb_s3(struct lpfc_hba *phba, uint32_t ring_number,
dea3101e
JB
9278 struct lpfc_iocbq *piocb, uint32_t flag)
9279{
9280 struct lpfc_iocbq *nextiocb;
9281 IOCB_t *iocb;
895427bd 9282 struct lpfc_sli_ring *pring = &phba->sli.sli3_ring[ring_number];
dea3101e 9283
1c2ba475
JT
9284 lockdep_assert_held(&phba->hbalock);
9285
92d7f7b0
JS
9286 if (piocb->iocb_cmpl && (!piocb->vport) &&
9287 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
9288 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
372c187b 9289 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 9290 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS
9291 piocb->iocb.ulpCommand);
9292 dump_stack();
9293 return IOCB_ERROR;
9294 }
9295
9296
8d63f375
LV
9297 /* If the PCI channel is in offline state, do not post iocbs. */
9298 if (unlikely(pci_channel_offline(phba->pcidev)))
9299 return IOCB_ERROR;
9300
a257bf90
JS
9301 /* If HBA has a deferred error attention, fail the iocb. */
9302 if (unlikely(phba->hba_flag & DEFER_ERATT))
9303 return IOCB_ERROR;
9304
dea3101e
JB
9305 /*
9306 * We should never get an IOCB if we are in a < LINK_DOWN state
9307 */
2e0fef85 9308 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB
9309 return IOCB_ERROR;
9310
9311 /*
9312 * Check to see if we are blocking IOCB processing because of a
0b727fea 9313 * outstanding event.
dea3101e 9314 */
0b727fea 9315 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e
JB
9316 goto iocb_busy;
9317
2e0fef85 9318 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 9319 /*
2680eeaa 9320 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB
9321 * can be issued if the link is not up.
9322 */
9323 switch (piocb->iocb.ulpCommand) {
84774a4d
JS
9324 case CMD_GEN_REQUEST64_CR:
9325 case CMD_GEN_REQUEST64_CX:
9326 if (!(phba->sli.sli_flag & LPFC_MENLO_MAINT) ||
9327 (piocb->iocb.un.genreq64.w5.hcsw.Rctl !=
6a9c52cf 9328 FC_RCTL_DD_UNSOL_CMD) ||
84774a4d
JS
9329 (piocb->iocb.un.genreq64.w5.hcsw.Type !=
9330 MENLO_TRANSPORT_TYPE))
9331
9332 goto iocb_busy;
9333 break;
dea3101e
JB
9334 case CMD_QUE_RING_BUF_CN:
9335 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB
9336 /*
9337 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
9338 * completion, iocb_cmpl MUST be 0.
9339 */
9340 if (piocb->iocb_cmpl)
9341 piocb->iocb_cmpl = NULL;
9342 /*FALLTHROUGH*/
9343 case CMD_CREATE_XRI_CR:
2680eeaa
JS
9344 case CMD_CLOSE_XRI_CN:
9345 case CMD_CLOSE_XRI_CX:
dea3101e
JB
9346 break;
9347 default:
9348 goto iocb_busy;
9349 }
9350
9351 /*
9352 * For FCP commands, we must be in a state where we can process link
9353 * attention events.
9354 */
895427bd 9355 } else if (unlikely(pring->ringno == LPFC_FCP_RING &&
92d7f7b0 9356 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 9357 goto iocb_busy;
92d7f7b0 9358 }
dea3101e 9359
dea3101e
JB
9360 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
9361 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
9362 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
9363
9364 if (iocb)
9365 lpfc_sli_update_ring(phba, pring);
9366 else
9367 lpfc_sli_update_full_ring(phba, pring);
9368
9369 if (!piocb)
9370 return IOCB_SUCCESS;
9371
9372 goto out_busy;
9373
9374 iocb_busy:
9375 pring->stats.iocb_cmd_delay++;
9376
9377 out_busy:
9378
9379 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 9380 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB
9381 return IOCB_SUCCESS;
9382 }
9383
9384 return IOCB_BUSY;
9385}
9386
3772a991 9387/**
4f774513
JS
9388 * lpfc_sli4_bpl2sgl - Convert the bpl/bde to a sgl.
9389 * @phba: Pointer to HBA context object.
7af29d45 9390 * @piocbq: Pointer to command iocb.
4f774513
JS
9391 * @sglq: Pointer to the scatter gather queue object.
9392 *
9393 * This routine converts the bpl or bde that is in the IOCB
9394 * to a sgl list for the sli4 hardware. The physical address
9395 * of the bpl/bde is converted back to a virtual address.
9396 * If the IOCB contains a BPL then the list of BDE's is
9397 * converted to sli4_sge's. If the IOCB contains a single
9398 * BDE then it is converted to a single sli_sge.
9399 * The IOCB is still in cpu endianess so the contents of
9400 * the bpl can be used without byte swapping.
9401 *
9402 * Returns valid XRI = Success, NO_XRI = Failure.
9403**/
9404static uint16_t
9405lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
9406 struct lpfc_sglq *sglq)
3772a991 9407{
4f774513
JS
9408 uint16_t xritag = NO_XRI;
9409 struct ulp_bde64 *bpl = NULL;
9410 struct ulp_bde64 bde;
9411 struct sli4_sge *sgl = NULL;
1b51197d 9412 struct lpfc_dmabuf *dmabuf;
4f774513
JS
9413 IOCB_t *icmd;
9414 int numBdes = 0;
9415 int i = 0;
63e801ce
JS
9416 uint32_t offset = 0; /* accumulated offset in the sg request list */
9417 int inbound = 0; /* number of sg reply entries inbound from firmware */
3772a991 9418
4f774513
JS
9419 if (!piocbq || !sglq)
9420 return xritag;
9421
9422 sgl = (struct sli4_sge *)sglq->sgl;
9423 icmd = &piocbq->iocb;
6b5151fd
JS
9424 if (icmd->ulpCommand == CMD_XMIT_BLS_RSP64_CX)
9425 return sglq->sli4_xritag;
4f774513
JS
9426 if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
9427 numBdes = icmd->un.genreq64.bdl.bdeSize /
9428 sizeof(struct ulp_bde64);
9429 /* The addrHigh and addrLow fields within the IOCB
9430 * have not been byteswapped yet so there is no
9431 * need to swap them back.
9432 */
1b51197d
JS
9433 if (piocbq->context3)
9434 dmabuf = (struct lpfc_dmabuf *)piocbq->context3;
9435 else
9436 return xritag;
4f774513 9437
1b51197d 9438 bpl = (struct ulp_bde64 *)dmabuf->virt;
4f774513
JS
9439 if (!bpl)
9440 return xritag;
9441
9442 for (i = 0; i < numBdes; i++) {
9443 /* Should already be byte swapped. */
28baac74
JS
9444 sgl->addr_hi = bpl->addrHigh;
9445 sgl->addr_lo = bpl->addrLow;
9446
0558056c 9447 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9448 if ((i+1) == numBdes)
9449 bf_set(lpfc_sli4_sge_last, sgl, 1);
9450 else
9451 bf_set(lpfc_sli4_sge_last, sgl, 0);
28baac74
JS
9452 /* swap the size field back to the cpu so we
9453 * can assign it to the sgl.
9454 */
9455 bde.tus.w = le32_to_cpu(bpl->tus.w);
9456 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
63e801ce
JS
9457 /* The offsets in the sgl need to be accumulated
9458 * separately for the request and reply lists.
9459 * The request is always first, the reply follows.
9460 */
9461 if (piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) {
9462 /* add up the reply sg entries */
9463 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
9464 inbound++;
9465 /* first inbound? reset the offset */
9466 if (inbound == 1)
9467 offset = 0;
9468 bf_set(lpfc_sli4_sge_offset, sgl, offset);
f9bb2da1
JS
9469 bf_set(lpfc_sli4_sge_type, sgl,
9470 LPFC_SGE_TYPE_DATA);
63e801ce
JS
9471 offset += bde.tus.f.bdeSize;
9472 }
546fc854 9473 sgl->word2 = cpu_to_le32(sgl->word2);
4f774513
JS
9474 bpl++;
9475 sgl++;
9476 }
9477 } else if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BDE_64) {
9478 /* The addrHigh and addrLow fields of the BDE have not
9479 * been byteswapped yet so they need to be swapped
9480 * before putting them in the sgl.
9481 */
9482 sgl->addr_hi =
9483 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh);
9484 sgl->addr_lo =
9485 cpu_to_le32(icmd->un.genreq64.bdl.addrLow);
0558056c 9486 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9487 bf_set(lpfc_sli4_sge_last, sgl, 1);
9488 sgl->word2 = cpu_to_le32(sgl->word2);
28baac74
JS
9489 sgl->sge_len =
9490 cpu_to_le32(icmd->un.genreq64.bdl.bdeSize);
4f774513
JS
9491 }
9492 return sglq->sli4_xritag;
3772a991 9493}
92d7f7b0 9494
e59058c4 9495/**
4f774513 9496 * lpfc_sli_iocb2wqe - Convert the IOCB to a work queue entry.
e59058c4 9497 * @phba: Pointer to HBA context object.
7af29d45 9498 * @iocbq: Pointer to command iocb.
4f774513 9499 * @wqe: Pointer to the work queue entry.
e59058c4 9500 *
4f774513
JS
9501 * This routine converts the iocb command to its Work Queue Entry
9502 * equivalent. The wqe pointer should not have any fields set when
9503 * this routine is called because it will memcpy over them.
9504 * This routine does not set the CQ_ID or the WQEC bits in the
9505 * wqe.
e59058c4 9506 *
4f774513 9507 * Returns: 0 = Success, IOCB_ERROR = Failure.
e59058c4 9508 **/
cf5bf97e 9509static int
4f774513 9510lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
205e8240 9511 union lpfc_wqe128 *wqe)
cf5bf97e 9512{
5ffc266e 9513 uint32_t xmit_len = 0, total_len = 0;
4f774513
JS
9514 uint8_t ct = 0;
9515 uint32_t fip;
9516 uint32_t abort_tag;
9517 uint8_t command_type = ELS_COMMAND_NON_FIP;
9518 uint8_t cmnd;
9519 uint16_t xritag;
dcf2a4e0
JS
9520 uint16_t abrt_iotag;
9521 struct lpfc_iocbq *abrtiocbq;
4f774513 9522 struct ulp_bde64 *bpl = NULL;
f0d9bccc 9523 uint32_t els_id = LPFC_ELS_ID_DEFAULT;
5ffc266e
JS
9524 int numBdes, i;
9525 struct ulp_bde64 bde;
c31098ce 9526 struct lpfc_nodelist *ndlp;
ff78d8f9 9527 uint32_t *pcmd;
1b51197d 9528 uint32_t if_type;
4f774513 9529
45ed1190 9530 fip = phba->hba_flag & HBA_FIP_SUPPORT;
4f774513 9531 /* The fcp commands will set command type */
0c287589 9532 if (iocbq->iocb_flag & LPFC_IO_FCP)
4f774513 9533 command_type = FCP_COMMAND;
c868595d 9534 else if (fip && (iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK))
0c287589
JS
9535 command_type = ELS_COMMAND_FIP;
9536 else
9537 command_type = ELS_COMMAND_NON_FIP;
9538
b5c53958
JS
9539 if (phba->fcp_embed_io)
9540 memset(wqe, 0, sizeof(union lpfc_wqe128));
4f774513
JS
9541 /* Some of the fields are in the right position already */
9542 memcpy(wqe, &iocbq->iocb, sizeof(union lpfc_wqe));
e62245d9
JS
9543 /* The ct field has moved so reset */
9544 wqe->generic.wqe_com.word7 = 0;
9545 wqe->generic.wqe_com.word10 = 0;
b5c53958
JS
9546
9547 abort_tag = (uint32_t) iocbq->iotag;
9548 xritag = iocbq->sli4_xritag;
4f774513
JS
9549 /* words0-2 bpl convert bde */
9550 if (iocbq->iocb.un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
5ffc266e
JS
9551 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9552 sizeof(struct ulp_bde64);
4f774513
JS
9553 bpl = (struct ulp_bde64 *)
9554 ((struct lpfc_dmabuf *)iocbq->context3)->virt;
9555 if (!bpl)
9556 return IOCB_ERROR;
cf5bf97e 9557
4f774513
JS
9558 /* Should already be byte swapped. */
9559 wqe->generic.bde.addrHigh = le32_to_cpu(bpl->addrHigh);
9560 wqe->generic.bde.addrLow = le32_to_cpu(bpl->addrLow);
9561 /* swap the size field back to the cpu so we
9562 * can assign it to the sgl.
9563 */
9564 wqe->generic.bde.tus.w = le32_to_cpu(bpl->tus.w);
5ffc266e
JS
9565 xmit_len = wqe->generic.bde.tus.f.bdeSize;
9566 total_len = 0;
9567 for (i = 0; i < numBdes; i++) {
9568 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
9569 total_len += bde.tus.f.bdeSize;
9570 }
4f774513 9571 } else
5ffc266e 9572 xmit_len = iocbq->iocb.un.fcpi64.bdl.bdeSize;
cf5bf97e 9573
4f774513
JS
9574 iocbq->iocb.ulpIoTag = iocbq->iotag;
9575 cmnd = iocbq->iocb.ulpCommand;
a4bc3379 9576
4f774513
JS
9577 switch (iocbq->iocb.ulpCommand) {
9578 case CMD_ELS_REQUEST64_CR:
93d1379e
JS
9579 if (iocbq->iocb_flag & LPFC_IO_LIBDFC)
9580 ndlp = iocbq->context_un.ndlp;
9581 else
9582 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513 9583 if (!iocbq->iocb.ulpLe) {
372c187b 9584 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
9585 "2007 Only Limited Edition cmd Format"
9586 " supported 0x%x\n",
9587 iocbq->iocb.ulpCommand);
9588 return IOCB_ERROR;
9589 }
ff78d8f9 9590
5ffc266e 9591 wqe->els_req.payload_len = xmit_len;
4f774513
JS
9592 /* Els_reguest64 has a TMO */
9593 bf_set(wqe_tmo, &wqe->els_req.wqe_com,
9594 iocbq->iocb.ulpTimeout);
9595 /* Need a VF for word 4 set the vf bit*/
9596 bf_set(els_req64_vf, &wqe->els_req, 0);
9597 /* And a VFID for word 12 */
9598 bf_set(els_req64_vfid, &wqe->els_req, 0);
4f774513 9599 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
f0d9bccc
JS
9600 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9601 iocbq->iocb.ulpContext);
9602 bf_set(wqe_ct, &wqe->els_req.wqe_com, ct);
9603 bf_set(wqe_pu, &wqe->els_req.wqe_com, 0);
4f774513 9604 /* CCP CCPE PV PRI in word10 were set in the memcpy */
ff78d8f9 9605 if (command_type == ELS_COMMAND_FIP)
c868595d
JS
9606 els_id = ((iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK)
9607 >> LPFC_FIP_ELS_ID_SHIFT);
ff78d8f9
JS
9608 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9609 iocbq->context2)->virt);
1b51197d
JS
9610 if_type = bf_get(lpfc_sli_intf_if_type,
9611 &phba->sli4_hba.sli_intf);
27d6ac0a 9612 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
ff78d8f9 9613 if (pcmd && (*pcmd == ELS_CMD_FLOGI ||
cb69f7de 9614 *pcmd == ELS_CMD_SCR ||
df3fe766 9615 *pcmd == ELS_CMD_RDF ||
f60cb93b 9616 *pcmd == ELS_CMD_RSCN_XMT ||
6b5151fd 9617 *pcmd == ELS_CMD_FDISC ||
bdcd2b92 9618 *pcmd == ELS_CMD_LOGO ||
ff78d8f9
JS
9619 *pcmd == ELS_CMD_PLOGI)) {
9620 bf_set(els_req64_sp, &wqe->els_req, 1);
9621 bf_set(els_req64_sid, &wqe->els_req,
9622 iocbq->vport->fc_myDID);
939723a4
JS
9623 if ((*pcmd == ELS_CMD_FLOGI) &&
9624 !(phba->fc_topology ==
9625 LPFC_TOPOLOGY_LOOP))
9626 bf_set(els_req64_sid, &wqe->els_req, 0);
ff78d8f9
JS
9627 bf_set(wqe_ct, &wqe->els_req.wqe_com, 1);
9628 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
a7dd9c0f 9629 phba->vpi_ids[iocbq->vport->vpi]);
3ef6d24c 9630 } else if (pcmd && iocbq->context1) {
ff78d8f9
JS
9631 bf_set(wqe_ct, &wqe->els_req.wqe_com, 0);
9632 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9633 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
9634 }
c868595d 9635 }
6d368e53
JS
9636 bf_set(wqe_temp_rpi, &wqe->els_req.wqe_com,
9637 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
f0d9bccc
JS
9638 bf_set(wqe_els_id, &wqe->els_req.wqe_com, els_id);
9639 bf_set(wqe_dbde, &wqe->els_req.wqe_com, 1);
9640 bf_set(wqe_iod, &wqe->els_req.wqe_com, LPFC_WQE_IOD_READ);
9641 bf_set(wqe_qosd, &wqe->els_req.wqe_com, 1);
9642 bf_set(wqe_lenloc, &wqe->els_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9643 bf_set(wqe_ebde_cnt, &wqe->els_req.wqe_com, 0);
af22741c 9644 wqe->els_req.max_response_payload_len = total_len - xmit_len;
7851fe2c 9645 break;
5ffc266e 9646 case CMD_XMIT_SEQUENCE64_CX:
f0d9bccc
JS
9647 bf_set(wqe_ctxt_tag, &wqe->xmit_sequence.wqe_com,
9648 iocbq->iocb.un.ulpWord[3]);
9649 bf_set(wqe_rcvoxid, &wqe->xmit_sequence.wqe_com,
7851fe2c 9650 iocbq->iocb.unsli3.rcvsli3.ox_id);
5ffc266e
JS
9651 /* The entire sequence is transmitted for this IOCB */
9652 xmit_len = total_len;
9653 cmnd = CMD_XMIT_SEQUENCE64_CR;
1b51197d
JS
9654 if (phba->link_flag & LS_LOOPBACK_MODE)
9655 bf_set(wqe_xo, &wqe->xmit_sequence.wge_ctl, 1);
5bd5f66c 9656 /* fall through */
4f774513 9657 case CMD_XMIT_SEQUENCE64_CR:
f0d9bccc
JS
9658 /* word3 iocb=io_tag32 wqe=reserved */
9659 wqe->xmit_sequence.rsvd3 = 0;
4f774513
JS
9660 /* word4 relative_offset memcpy */
9661 /* word5 r_ctl/df_ctl memcpy */
f0d9bccc
JS
9662 bf_set(wqe_pu, &wqe->xmit_sequence.wqe_com, 0);
9663 bf_set(wqe_dbde, &wqe->xmit_sequence.wqe_com, 1);
9664 bf_set(wqe_iod, &wqe->xmit_sequence.wqe_com,
9665 LPFC_WQE_IOD_WRITE);
9666 bf_set(wqe_lenloc, &wqe->xmit_sequence.wqe_com,
9667 LPFC_WQE_LENLOC_WORD12);
9668 bf_set(wqe_ebde_cnt, &wqe->xmit_sequence.wqe_com, 0);
5ffc266e
JS
9669 wqe->xmit_sequence.xmit_len = xmit_len;
9670 command_type = OTHER_COMMAND;
7851fe2c 9671 break;
4f774513 9672 case CMD_XMIT_BCAST64_CN:
f0d9bccc
JS
9673 /* word3 iocb=iotag32 wqe=seq_payload_len */
9674 wqe->xmit_bcast64.seq_payload_len = xmit_len;
4f774513
JS
9675 /* word4 iocb=rsvd wqe=rsvd */
9676 /* word5 iocb=rctl/type/df_ctl wqe=rctl/type/df_ctl memcpy */
9677 /* word6 iocb=ctxt_tag/io_tag wqe=ctxt_tag/xri */
f0d9bccc 9678 bf_set(wqe_ct, &wqe->xmit_bcast64.wqe_com,
4f774513 9679 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
f0d9bccc
JS
9680 bf_set(wqe_dbde, &wqe->xmit_bcast64.wqe_com, 1);
9681 bf_set(wqe_iod, &wqe->xmit_bcast64.wqe_com, LPFC_WQE_IOD_WRITE);
9682 bf_set(wqe_lenloc, &wqe->xmit_bcast64.wqe_com,
9683 LPFC_WQE_LENLOC_WORD3);
9684 bf_set(wqe_ebde_cnt, &wqe->xmit_bcast64.wqe_com, 0);
7851fe2c 9685 break;
4f774513
JS
9686 case CMD_FCP_IWRITE64_CR:
9687 command_type = FCP_COMMAND_DATA_OUT;
f0d9bccc
JS
9688 /* word3 iocb=iotag wqe=payload_offset_len */
9689 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9690 bf_set(payload_offset_len, &wqe->fcp_iwrite,
9691 xmit_len + sizeof(struct fcp_rsp));
9692 bf_set(cmd_buff_len, &wqe->fcp_iwrite,
9693 0);
f0d9bccc
JS
9694 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9695 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9696 bf_set(wqe_erp, &wqe->fcp_iwrite.wqe_com,
9697 iocbq->iocb.ulpFCP2Rcvy);
9698 bf_set(wqe_lnk, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpXS);
9699 /* Always open the exchange */
f0d9bccc
JS
9700 bf_set(wqe_iod, &wqe->fcp_iwrite.wqe_com, LPFC_WQE_IOD_WRITE);
9701 bf_set(wqe_lenloc, &wqe->fcp_iwrite.wqe_com,
9702 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9703 bf_set(wqe_pu, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9704 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 1);
1ba981fd
JS
9705 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9706 bf_set(wqe_oas, &wqe->fcp_iwrite.wqe_com, 1);
c92c841c
JS
9707 bf_set(wqe_ccpe, &wqe->fcp_iwrite.wqe_com, 1);
9708 if (iocbq->priority) {
9709 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9710 (iocbq->priority << 1));
9711 } else {
1ba981fd
JS
9712 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9713 (phba->cfg_XLanePriority << 1));
9714 }
9715 }
b5c53958
JS
9716 /* Note, word 10 is already initialized to 0 */
9717
414abe0a
JS
9718 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9719 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9720 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 1);
9721 else
9722 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 0);
9723
b5c53958 9724 if (phba->fcp_embed_io) {
c490850a 9725 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9726 struct sli4_sge *sgl;
b5c53958
JS
9727 struct fcp_cmnd *fcp_cmnd;
9728 uint32_t *ptr;
9729
9730 /* 128 byte wqe support here */
b5c53958
JS
9731
9732 lpfc_cmd = iocbq->context1;
0794d601 9733 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9734 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9735
9736 /* Word 0-2 - FCP_CMND */
205e8240 9737 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9738 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9739 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9740 wqe->generic.bde.addrHigh = 0;
9741 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9742
205e8240
JS
9743 bf_set(wqe_wqes, &wqe->fcp_iwrite.wqe_com, 1);
9744 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 0);
b5c53958
JS
9745
9746 /* Word 22-29 FCP CMND Payload */
205e8240 9747 ptr = &wqe->words[22];
b5c53958
JS
9748 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9749 }
7851fe2c 9750 break;
4f774513 9751 case CMD_FCP_IREAD64_CR:
f0d9bccc
JS
9752 /* word3 iocb=iotag wqe=payload_offset_len */
9753 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9754 bf_set(payload_offset_len, &wqe->fcp_iread,
9755 xmit_len + sizeof(struct fcp_rsp));
9756 bf_set(cmd_buff_len, &wqe->fcp_iread,
9757 0);
f0d9bccc
JS
9758 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9759 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9760 bf_set(wqe_erp, &wqe->fcp_iread.wqe_com,
9761 iocbq->iocb.ulpFCP2Rcvy);
9762 bf_set(wqe_lnk, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpXS);
f1126688 9763 /* Always open the exchange */
f0d9bccc
JS
9764 bf_set(wqe_iod, &wqe->fcp_iread.wqe_com, LPFC_WQE_IOD_READ);
9765 bf_set(wqe_lenloc, &wqe->fcp_iread.wqe_com,
9766 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9767 bf_set(wqe_pu, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9768 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 1);
1ba981fd
JS
9769 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9770 bf_set(wqe_oas, &wqe->fcp_iread.wqe_com, 1);
c92c841c
JS
9771 bf_set(wqe_ccpe, &wqe->fcp_iread.wqe_com, 1);
9772 if (iocbq->priority) {
9773 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9774 (iocbq->priority << 1));
9775 } else {
1ba981fd
JS
9776 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9777 (phba->cfg_XLanePriority << 1));
9778 }
9779 }
b5c53958
JS
9780 /* Note, word 10 is already initialized to 0 */
9781
414abe0a
JS
9782 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9783 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9784 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 1);
9785 else
9786 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 0);
9787
b5c53958 9788 if (phba->fcp_embed_io) {
c490850a 9789 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9790 struct sli4_sge *sgl;
b5c53958
JS
9791 struct fcp_cmnd *fcp_cmnd;
9792 uint32_t *ptr;
9793
9794 /* 128 byte wqe support here */
b5c53958
JS
9795
9796 lpfc_cmd = iocbq->context1;
0794d601 9797 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9798 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9799
9800 /* Word 0-2 - FCP_CMND */
205e8240 9801 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9802 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9803 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9804 wqe->generic.bde.addrHigh = 0;
9805 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9806
205e8240
JS
9807 bf_set(wqe_wqes, &wqe->fcp_iread.wqe_com, 1);
9808 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 0);
b5c53958
JS
9809
9810 /* Word 22-29 FCP CMND Payload */
205e8240 9811 ptr = &wqe->words[22];
b5c53958
JS
9812 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9813 }
7851fe2c 9814 break;
4f774513 9815 case CMD_FCP_ICMND64_CR:
0ba4b219
JS
9816 /* word3 iocb=iotag wqe=payload_offset_len */
9817 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
9818 bf_set(payload_offset_len, &wqe->fcp_icmd,
9819 xmit_len + sizeof(struct fcp_rsp));
9820 bf_set(cmd_buff_len, &wqe->fcp_icmd,
9821 0);
f0d9bccc 9822 /* word3 iocb=IO_TAG wqe=reserved */
f0d9bccc 9823 bf_set(wqe_pu, &wqe->fcp_icmd.wqe_com, 0);
4f774513 9824 /* Always open the exchange */
f0d9bccc
JS
9825 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 1);
9826 bf_set(wqe_iod, &wqe->fcp_icmd.wqe_com, LPFC_WQE_IOD_WRITE);
9827 bf_set(wqe_qosd, &wqe->fcp_icmd.wqe_com, 1);
9828 bf_set(wqe_lenloc, &wqe->fcp_icmd.wqe_com,
9829 LPFC_WQE_LENLOC_NONE);
2a94aea4
JS
9830 bf_set(wqe_erp, &wqe->fcp_icmd.wqe_com,
9831 iocbq->iocb.ulpFCP2Rcvy);
1ba981fd
JS
9832 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9833 bf_set(wqe_oas, &wqe->fcp_icmd.wqe_com, 1);
c92c841c
JS
9834 bf_set(wqe_ccpe, &wqe->fcp_icmd.wqe_com, 1);
9835 if (iocbq->priority) {
9836 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9837 (iocbq->priority << 1));
9838 } else {
1ba981fd
JS
9839 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9840 (phba->cfg_XLanePriority << 1));
9841 }
9842 }
b5c53958
JS
9843 /* Note, word 10 is already initialized to 0 */
9844
9845 if (phba->fcp_embed_io) {
c490850a 9846 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9847 struct sli4_sge *sgl;
b5c53958
JS
9848 struct fcp_cmnd *fcp_cmnd;
9849 uint32_t *ptr;
9850
9851 /* 128 byte wqe support here */
b5c53958
JS
9852
9853 lpfc_cmd = iocbq->context1;
0794d601 9854 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9855 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9856
9857 /* Word 0-2 - FCP_CMND */
205e8240 9858 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9859 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9860 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9861 wqe->generic.bde.addrHigh = 0;
9862 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9863
205e8240
JS
9864 bf_set(wqe_wqes, &wqe->fcp_icmd.wqe_com, 1);
9865 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 0);
b5c53958
JS
9866
9867 /* Word 22-29 FCP CMND Payload */
205e8240 9868 ptr = &wqe->words[22];
b5c53958
JS
9869 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9870 }
7851fe2c 9871 break;
4f774513 9872 case CMD_GEN_REQUEST64_CR:
63e801ce
JS
9873 /* For this command calculate the xmit length of the
9874 * request bde.
9875 */
9876 xmit_len = 0;
9877 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9878 sizeof(struct ulp_bde64);
9879 for (i = 0; i < numBdes; i++) {
63e801ce 9880 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
546fc854
JS
9881 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
9882 break;
63e801ce
JS
9883 xmit_len += bde.tus.f.bdeSize;
9884 }
f0d9bccc
JS
9885 /* word3 iocb=IO_TAG wqe=request_payload_len */
9886 wqe->gen_req.request_payload_len = xmit_len;
9887 /* word4 iocb=parameter wqe=relative_offset memcpy */
9888 /* word5 [rctl, type, df_ctl, la] copied in memcpy */
4f774513
JS
9889 /* word6 context tag copied in memcpy */
9890 if (iocbq->iocb.ulpCt_h || iocbq->iocb.ulpCt_l) {
9891 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
372c187b 9892 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
9893 "2015 Invalid CT %x command 0x%x\n",
9894 ct, iocbq->iocb.ulpCommand);
9895 return IOCB_ERROR;
9896 }
f0d9bccc
JS
9897 bf_set(wqe_ct, &wqe->gen_req.wqe_com, 0);
9898 bf_set(wqe_tmo, &wqe->gen_req.wqe_com, iocbq->iocb.ulpTimeout);
9899 bf_set(wqe_pu, &wqe->gen_req.wqe_com, iocbq->iocb.ulpPU);
9900 bf_set(wqe_dbde, &wqe->gen_req.wqe_com, 1);
9901 bf_set(wqe_iod, &wqe->gen_req.wqe_com, LPFC_WQE_IOD_READ);
9902 bf_set(wqe_qosd, &wqe->gen_req.wqe_com, 1);
9903 bf_set(wqe_lenloc, &wqe->gen_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9904 bf_set(wqe_ebde_cnt, &wqe->gen_req.wqe_com, 0);
af22741c 9905 wqe->gen_req.max_response_payload_len = total_len - xmit_len;
4f774513 9906 command_type = OTHER_COMMAND;
7851fe2c 9907 break;
4f774513 9908 case CMD_XMIT_ELS_RSP64_CX:
c31098ce 9909 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513 9910 /* words0-2 BDE memcpy */
f0d9bccc
JS
9911 /* word3 iocb=iotag32 wqe=response_payload_len */
9912 wqe->xmit_els_rsp.response_payload_len = xmit_len;
939723a4
JS
9913 /* word4 */
9914 wqe->xmit_els_rsp.word4 = 0;
4f774513
JS
9915 /* word5 iocb=rsvd wge=did */
9916 bf_set(wqe_els_did, &wqe->xmit_els_rsp.wqe_dest,
939723a4
JS
9917 iocbq->iocb.un.xseq64.xmit_els_remoteID);
9918
9919 if_type = bf_get(lpfc_sli_intf_if_type,
9920 &phba->sli4_hba.sli_intf);
27d6ac0a 9921 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
939723a4
JS
9922 if (iocbq->vport->fc_flag & FC_PT2PT) {
9923 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9924 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
9925 iocbq->vport->fc_myDID);
9926 if (iocbq->vport->fc_myDID == Fabric_DID) {
9927 bf_set(wqe_els_did,
9928 &wqe->xmit_els_rsp.wqe_dest, 0);
9929 }
9930 }
9931 }
f0d9bccc
JS
9932 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com,
9933 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9934 bf_set(wqe_pu, &wqe->xmit_els_rsp.wqe_com, iocbq->iocb.ulpPU);
9935 bf_set(wqe_rcvoxid, &wqe->xmit_els_rsp.wqe_com,
7851fe2c 9936 iocbq->iocb.unsli3.rcvsli3.ox_id);
4f774513 9937 if (!iocbq->iocb.ulpCt_h && iocbq->iocb.ulpCt_l)
f0d9bccc 9938 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
6d368e53 9939 phba->vpi_ids[iocbq->vport->vpi]);
f0d9bccc
JS
9940 bf_set(wqe_dbde, &wqe->xmit_els_rsp.wqe_com, 1);
9941 bf_set(wqe_iod, &wqe->xmit_els_rsp.wqe_com, LPFC_WQE_IOD_WRITE);
9942 bf_set(wqe_qosd, &wqe->xmit_els_rsp.wqe_com, 1);
9943 bf_set(wqe_lenloc, &wqe->xmit_els_rsp.wqe_com,
9944 LPFC_WQE_LENLOC_WORD3);
9945 bf_set(wqe_ebde_cnt, &wqe->xmit_els_rsp.wqe_com, 0);
6d368e53
JS
9946 bf_set(wqe_rsp_temp_rpi, &wqe->xmit_els_rsp,
9947 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
ff78d8f9
JS
9948 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9949 iocbq->context2)->virt);
9950 if (phba->fc_topology == LPFC_TOPOLOGY_LOOP) {
939723a4
JS
9951 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9952 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
ff78d8f9 9953 iocbq->vport->fc_myDID);
939723a4
JS
9954 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com, 1);
9955 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
ff78d8f9
JS
9956 phba->vpi_ids[phba->pport->vpi]);
9957 }
4f774513 9958 command_type = OTHER_COMMAND;
7851fe2c 9959 break;
4f774513
JS
9960 case CMD_CLOSE_XRI_CN:
9961 case CMD_ABORT_XRI_CN:
9962 case CMD_ABORT_XRI_CX:
9963 /* words 0-2 memcpy should be 0 rserved */
9964 /* port will send abts */
dcf2a4e0
JS
9965 abrt_iotag = iocbq->iocb.un.acxri.abortContextTag;
9966 if (abrt_iotag != 0 && abrt_iotag <= phba->sli.last_iotag) {
9967 abrtiocbq = phba->sli.iocbq_lookup[abrt_iotag];
9968 fip = abrtiocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK;
9969 } else
9970 fip = 0;
9971
9972 if ((iocbq->iocb.ulpCommand == CMD_CLOSE_XRI_CN) || fip)
4f774513 9973 /*
dcf2a4e0
JS
9974 * The link is down, or the command was ELS_FIP
9975 * so the fw does not need to send abts
4f774513
JS
9976 * on the wire.
9977 */
9978 bf_set(abort_cmd_ia, &wqe->abort_cmd, 1);
9979 else
9980 bf_set(abort_cmd_ia, &wqe->abort_cmd, 0);
9981 bf_set(abort_cmd_criteria, &wqe->abort_cmd, T_XRI_TAG);
f0d9bccc
JS
9982 /* word5 iocb=CONTEXT_TAG|IO_TAG wqe=reserved */
9983 wqe->abort_cmd.rsrvd5 = 0;
9984 bf_set(wqe_ct, &wqe->abort_cmd.wqe_com,
4f774513
JS
9985 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9986 abort_tag = iocbq->iocb.un.acxri.abortIoTag;
4f774513
JS
9987 /*
9988 * The abort handler will send us CMD_ABORT_XRI_CN or
9989 * CMD_CLOSE_XRI_CN and the fw only accepts CMD_ABORT_XRI_CX
9990 */
f0d9bccc
JS
9991 bf_set(wqe_cmnd, &wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
9992 bf_set(wqe_qosd, &wqe->abort_cmd.wqe_com, 1);
9993 bf_set(wqe_lenloc, &wqe->abort_cmd.wqe_com,
9994 LPFC_WQE_LENLOC_NONE);
4f774513
JS
9995 cmnd = CMD_ABORT_XRI_CX;
9996 command_type = OTHER_COMMAND;
9997 xritag = 0;
7851fe2c 9998 break;
6669f9bb 9999 case CMD_XMIT_BLS_RSP64_CX:
6b5151fd 10000 ndlp = (struct lpfc_nodelist *)iocbq->context1;
546fc854 10001 /* As BLS ABTS RSP WQE is very different from other WQEs,
6669f9bb
JS
10002 * we re-construct this WQE here based on information in
10003 * iocbq from scratch.
10004 */
d9f492a1 10005 memset(wqe, 0, sizeof(*wqe));
5ffc266e 10006 /* OX_ID is invariable to who sent ABTS to CT exchange */
6669f9bb 10007 bf_set(xmit_bls_rsp64_oxid, &wqe->xmit_bls_rsp,
546fc854
JS
10008 bf_get(lpfc_abts_oxid, &iocbq->iocb.un.bls_rsp));
10009 if (bf_get(lpfc_abts_orig, &iocbq->iocb.un.bls_rsp) ==
5ffc266e
JS
10010 LPFC_ABTS_UNSOL_INT) {
10011 /* ABTS sent by initiator to CT exchange, the
10012 * RX_ID field will be filled with the newly
10013 * allocated responder XRI.
10014 */
10015 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
10016 iocbq->sli4_xritag);
10017 } else {
10018 /* ABTS sent by responder to CT exchange, the
10019 * RX_ID field will be filled with the responder
10020 * RX_ID from ABTS.
10021 */
10022 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
546fc854 10023 bf_get(lpfc_abts_rxid, &iocbq->iocb.un.bls_rsp));
5ffc266e 10024 }
6669f9bb
JS
10025 bf_set(xmit_bls_rsp64_seqcnthi, &wqe->xmit_bls_rsp, 0xffff);
10026 bf_set(wqe_xmit_bls_pt, &wqe->xmit_bls_rsp.wqe_dest, 0x1);
6b5151fd
JS
10027
10028 /* Use CT=VPI */
10029 bf_set(wqe_els_did, &wqe->xmit_bls_rsp.wqe_dest,
10030 ndlp->nlp_DID);
10031 bf_set(xmit_bls_rsp64_temprpi, &wqe->xmit_bls_rsp,
10032 iocbq->iocb.ulpContext);
10033 bf_set(wqe_ct, &wqe->xmit_bls_rsp.wqe_com, 1);
6669f9bb 10034 bf_set(wqe_ctxt_tag, &wqe->xmit_bls_rsp.wqe_com,
6b5151fd 10035 phba->vpi_ids[phba->pport->vpi]);
f0d9bccc
JS
10036 bf_set(wqe_qosd, &wqe->xmit_bls_rsp.wqe_com, 1);
10037 bf_set(wqe_lenloc, &wqe->xmit_bls_rsp.wqe_com,
10038 LPFC_WQE_LENLOC_NONE);
6669f9bb
JS
10039 /* Overwrite the pre-set comnd type with OTHER_COMMAND */
10040 command_type = OTHER_COMMAND;
546fc854
JS
10041 if (iocbq->iocb.un.xseq64.w5.hcsw.Rctl == FC_RCTL_BA_RJT) {
10042 bf_set(xmit_bls_rsp64_rjt_vspec, &wqe->xmit_bls_rsp,
10043 bf_get(lpfc_vndr_code, &iocbq->iocb.un.bls_rsp));
10044 bf_set(xmit_bls_rsp64_rjt_expc, &wqe->xmit_bls_rsp,
10045 bf_get(lpfc_rsn_expln, &iocbq->iocb.un.bls_rsp));
10046 bf_set(xmit_bls_rsp64_rjt_rsnc, &wqe->xmit_bls_rsp,
10047 bf_get(lpfc_rsn_code, &iocbq->iocb.un.bls_rsp));
10048 }
10049
7851fe2c 10050 break;
ae9e28f3 10051 case CMD_SEND_FRAME:
e62245d9
JS
10052 bf_set(wqe_cmnd, &wqe->generic.wqe_com, CMD_SEND_FRAME);
10053 bf_set(wqe_sof, &wqe->generic.wqe_com, 0x2E); /* SOF byte */
10054 bf_set(wqe_eof, &wqe->generic.wqe_com, 0x41); /* EOF byte */
10055 bf_set(wqe_lenloc, &wqe->generic.wqe_com, 1);
10056 bf_set(wqe_xbl, &wqe->generic.wqe_com, 1);
10057 bf_set(wqe_dbde, &wqe->generic.wqe_com, 1);
10058 bf_set(wqe_xc, &wqe->generic.wqe_com, 1);
10059 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, 0xA);
10060 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
ae9e28f3
JS
10061 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
10062 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
10063 return 0;
4f774513
JS
10064 case CMD_XRI_ABORTED_CX:
10065 case CMD_CREATE_XRI_CR: /* Do we expect to use this? */
4f774513
JS
10066 case CMD_IOCB_FCP_IBIDIR64_CR: /* bidirectional xfer */
10067 case CMD_FCP_TSEND64_CX: /* Target mode send xfer-ready */
10068 case CMD_FCP_TRSP64_CX: /* Target mode rcv */
10069 case CMD_FCP_AUTO_TRSP_CX: /* Auto target rsp */
10070 default:
372c187b 10071 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
10072 "2014 Invalid command 0x%x\n",
10073 iocbq->iocb.ulpCommand);
10074 return IOCB_ERROR;
7851fe2c 10075 break;
4f774513 10076 }
6d368e53 10077
8012cc38
JS
10078 if (iocbq->iocb_flag & LPFC_IO_DIF_PASS)
10079 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_PASSTHRU);
10080 else if (iocbq->iocb_flag & LPFC_IO_DIF_STRIP)
10081 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_STRIP);
10082 else if (iocbq->iocb_flag & LPFC_IO_DIF_INSERT)
10083 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_INSERT);
10084 iocbq->iocb_flag &= ~(LPFC_IO_DIF_PASS | LPFC_IO_DIF_STRIP |
10085 LPFC_IO_DIF_INSERT);
f0d9bccc
JS
10086 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
10087 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
10088 wqe->generic.wqe_com.abort_tag = abort_tag;
10089 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, command_type);
10090 bf_set(wqe_cmnd, &wqe->generic.wqe_com, cmnd);
10091 bf_set(wqe_class, &wqe->generic.wqe_com, iocbq->iocb.ulpClass);
10092 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
4f774513
JS
10093 return 0;
10094}
10095
10096/**
10097 * __lpfc_sli_issue_iocb_s4 - SLI4 device lockless ver of lpfc_sli_issue_iocb
10098 * @phba: Pointer to HBA context object.
10099 * @ring_number: SLI ring number to issue iocb on.
10100 * @piocb: Pointer to command iocb.
10101 * @flag: Flag indicating if this command can be put into txq.
10102 *
10103 * __lpfc_sli_issue_iocb_s4 is used by other functions in the driver to issue
10104 * an iocb command to an HBA with SLI-4 interface spec.
10105 *
27f3efd6 10106 * This function is called with ringlock held. The function will return success
4f774513
JS
10107 * after it successfully submit the iocb to firmware or after adding to the
10108 * txq.
10109 **/
10110static int
10111__lpfc_sli_issue_iocb_s4(struct lpfc_hba *phba, uint32_t ring_number,
10112 struct lpfc_iocbq *piocb, uint32_t flag)
10113{
10114 struct lpfc_sglq *sglq;
205e8240 10115 union lpfc_wqe128 wqe;
1ba981fd 10116 struct lpfc_queue *wq;
895427bd 10117 struct lpfc_sli_ring *pring;
4f774513 10118
895427bd
JS
10119 /* Get the WQ */
10120 if ((piocb->iocb_flag & LPFC_IO_FCP) ||
10121 (piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
c00f62e6 10122 wq = phba->sli4_hba.hdwq[piocb->hba_wqidx].io_wq;
895427bd
JS
10123 } else {
10124 wq = phba->sli4_hba.els_wq;
10125 }
10126
10127 /* Get corresponding ring */
10128 pring = wq->pring;
1c2ba475 10129
b5c53958
JS
10130 /*
10131 * The WQE can be either 64 or 128 bytes,
b5c53958 10132 */
b5c53958 10133
cda7fa18 10134 lockdep_assert_held(&pring->ring_lock);
895427bd 10135
4f774513
JS
10136 if (piocb->sli4_xritag == NO_XRI) {
10137 if (piocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
6b5151fd 10138 piocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN)
4f774513
JS
10139 sglq = NULL;
10140 else {
0e9bb8d7 10141 if (!list_empty(&pring->txq)) {
2a9bf3d0
JS
10142 if (!(flag & SLI_IOCB_RET_IOCB)) {
10143 __lpfc_sli_ringtx_put(phba,
10144 pring, piocb);
10145 return IOCB_SUCCESS;
10146 } else {
10147 return IOCB_BUSY;
10148 }
10149 } else {
895427bd 10150 sglq = __lpfc_sli_get_els_sglq(phba, piocb);
2a9bf3d0
JS
10151 if (!sglq) {
10152 if (!(flag & SLI_IOCB_RET_IOCB)) {
10153 __lpfc_sli_ringtx_put(phba,
10154 pring,
10155 piocb);
10156 return IOCB_SUCCESS;
10157 } else
10158 return IOCB_BUSY;
10159 }
10160 }
4f774513 10161 }
2ea259ee 10162 } else if (piocb->iocb_flag & LPFC_IO_FCP)
6d368e53
JS
10163 /* These IO's already have an XRI and a mapped sgl. */
10164 sglq = NULL;
2ea259ee 10165 else {
6d368e53
JS
10166 /*
10167 * This is a continuation of a commandi,(CX) so this
4f774513
JS
10168 * sglq is on the active list
10169 */
edccdc17 10170 sglq = __lpfc_get_active_sglq(phba, piocb->sli4_lxritag);
4f774513
JS
10171 if (!sglq)
10172 return IOCB_ERROR;
10173 }
10174
10175 if (sglq) {
6d368e53 10176 piocb->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0 10177 piocb->sli4_xritag = sglq->sli4_xritag;
2a9bf3d0 10178 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocb, sglq))
4f774513
JS
10179 return IOCB_ERROR;
10180 }
10181
205e8240 10182 if (lpfc_sli4_iocb2wqe(phba, piocb, &wqe))
4f774513
JS
10183 return IOCB_ERROR;
10184
205e8240 10185 if (lpfc_sli4_wq_put(wq, &wqe))
895427bd 10186 return IOCB_ERROR;
4f774513
JS
10187 lpfc_sli_ringtxcmpl_put(phba, pring, piocb);
10188
10189 return 0;
10190}
10191
7af29d45 10192/*
4f774513
JS
10193 * __lpfc_sli_issue_iocb - Wrapper func of lockless version for issuing iocb
10194 *
10195 * This routine wraps the actual lockless version for issusing IOCB function
10196 * pointer from the lpfc_hba struct.
10197 *
10198 * Return codes:
b5c53958
JS
10199 * IOCB_ERROR - Error
10200 * IOCB_SUCCESS - Success
10201 * IOCB_BUSY - Busy
4f774513 10202 **/
2a9bf3d0 10203int
4f774513
JS
10204__lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
10205 struct lpfc_iocbq *piocb, uint32_t flag)
10206{
10207 return phba->__lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10208}
10209
10210/**
25985edc 10211 * lpfc_sli_api_table_setup - Set up sli api function jump table
4f774513
JS
10212 * @phba: The hba struct for which this call is being executed.
10213 * @dev_grp: The HBA PCI-Device group number.
10214 *
10215 * This routine sets up the SLI interface API function jump table in @phba
10216 * struct.
10217 * Returns: 0 - success, -ENODEV - failure.
10218 **/
10219int
10220lpfc_sli_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
10221{
10222
10223 switch (dev_grp) {
10224 case LPFC_PCI_DEV_LP:
10225 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s3;
10226 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s3;
10227 break;
10228 case LPFC_PCI_DEV_OC:
10229 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s4;
10230 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s4;
10231 break;
10232 default:
372c187b 10233 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
10234 "1419 Invalid HBA PCI-device group: 0x%x\n",
10235 dev_grp);
10236 return -ENODEV;
10237 break;
10238 }
10239 phba->lpfc_get_iocb_from_iocbq = lpfc_get_iocb_from_iocbq;
10240 return 0;
10241}
10242
a1efe163 10243/**
895427bd 10244 * lpfc_sli4_calc_ring - Calculates which ring to use
a1efe163 10245 * @phba: Pointer to HBA context object.
a1efe163
JS
10246 * @piocb: Pointer to command iocb.
10247 *
895427bd
JS
10248 * For SLI4 only, FCP IO can deferred to one fo many WQs, based on
10249 * hba_wqidx, thus we need to calculate the corresponding ring.
a1efe163 10250 * Since ABORTS must go on the same WQ of the command they are
895427bd 10251 * aborting, we use command's hba_wqidx.
a1efe163 10252 */
895427bd
JS
10253struct lpfc_sli_ring *
10254lpfc_sli4_calc_ring(struct lpfc_hba *phba, struct lpfc_iocbq *piocb)
9bd2bff5 10255{
c490850a 10256 struct lpfc_io_buf *lpfc_cmd;
5e5b511d 10257
895427bd 10258 if (piocb->iocb_flag & (LPFC_IO_FCP | LPFC_USE_FCPWQIDX)) {
cdb42bec 10259 if (unlikely(!phba->sli4_hba.hdwq))
7370d10a
JS
10260 return NULL;
10261 /*
10262 * for abort iocb hba_wqidx should already
10263 * be setup based on what work queue we used.
10264 */
10265 if (!(piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
c490850a 10266 lpfc_cmd = (struct lpfc_io_buf *)piocb->context1;
1fbf9742 10267 piocb->hba_wqidx = lpfc_cmd->hdwq_no;
9bd2bff5 10268 }
c00f62e6 10269 return phba->sli4_hba.hdwq[piocb->hba_wqidx].io_wq->pring;
895427bd
JS
10270 } else {
10271 if (unlikely(!phba->sli4_hba.els_wq))
10272 return NULL;
10273 piocb->hba_wqidx = 0;
10274 return phba->sli4_hba.els_wq->pring;
9bd2bff5 10275 }
9bd2bff5
JS
10276}
10277
4f774513
JS
10278/**
10279 * lpfc_sli_issue_iocb - Wrapper function for __lpfc_sli_issue_iocb
10280 * @phba: Pointer to HBA context object.
7af29d45 10281 * @ring_number: Ring number
4f774513
JS
10282 * @piocb: Pointer to command iocb.
10283 * @flag: Flag indicating if this command can be put into txq.
10284 *
10285 * lpfc_sli_issue_iocb is a wrapper around __lpfc_sli_issue_iocb
10286 * function. This function gets the hbalock and calls
10287 * __lpfc_sli_issue_iocb function and will return the error returned
10288 * by __lpfc_sli_issue_iocb function. This wrapper is used by
10289 * functions which do not hold hbalock.
10290 **/
10291int
10292lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
10293 struct lpfc_iocbq *piocb, uint32_t flag)
10294{
2a76a283 10295 struct lpfc_sli_ring *pring;
93a4d6f4 10296 struct lpfc_queue *eq;
4f774513 10297 unsigned long iflags;
6a828b0f 10298 int rc;
4f774513 10299
7e56aa25 10300 if (phba->sli_rev == LPFC_SLI_REV4) {
93a4d6f4
JS
10301 eq = phba->sli4_hba.hdwq[piocb->hba_wqidx].hba_eq;
10302
895427bd
JS
10303 pring = lpfc_sli4_calc_ring(phba, piocb);
10304 if (unlikely(pring == NULL))
9bd2bff5 10305 return IOCB_ERROR;
ba20c853 10306
9bd2bff5
JS
10307 spin_lock_irqsave(&pring->ring_lock, iflags);
10308 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10309 spin_unlock_irqrestore(&pring->ring_lock, iflags);
93a4d6f4
JS
10310
10311 lpfc_sli4_poll_eq(eq, LPFC_POLL_FASTPATH);
7e56aa25
JS
10312 } else {
10313 /* For now, SLI2/3 will still use hbalock */
10314 spin_lock_irqsave(&phba->hbalock, iflags);
10315 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10316 spin_unlock_irqrestore(&phba->hbalock, iflags);
10317 }
4f774513
JS
10318 return rc;
10319}
10320
10321/**
10322 * lpfc_extra_ring_setup - Extra ring setup function
10323 * @phba: Pointer to HBA context object.
10324 *
10325 * This function is called while driver attaches with the
10326 * HBA to setup the extra ring. The extra ring is used
10327 * only when driver needs to support target mode functionality
10328 * or IP over FC functionalities.
10329 *
895427bd 10330 * This function is called with no lock held. SLI3 only.
4f774513
JS
10331 **/
10332static int
10333lpfc_extra_ring_setup( struct lpfc_hba *phba)
10334{
10335 struct lpfc_sli *psli;
10336 struct lpfc_sli_ring *pring;
10337
10338 psli = &phba->sli;
10339
10340 /* Adjust cmd/rsp ring iocb entries more evenly */
10341
10342 /* Take some away from the FCP ring */
895427bd 10343 pring = &psli->sli3_ring[LPFC_FCP_RING];
7e56aa25
JS
10344 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10345 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10346 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10347 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e 10348
a4bc3379 10349 /* and give them to the extra ring */
895427bd 10350 pring = &psli->sli3_ring[LPFC_EXTRA_RING];
a4bc3379 10351
7e56aa25
JS
10352 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10353 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10354 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10355 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e
JW
10356
10357 /* Setup default profile for this ring */
10358 pring->iotag_max = 4096;
10359 pring->num_mask = 1;
10360 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS
10361 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
10362 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW
10363 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
10364 return 0;
10365}
10366
cb69f7de
JS
10367/* lpfc_sli_abts_err_handler - handle a failed ABTS request from an SLI3 port.
10368 * @phba: Pointer to HBA context object.
10369 * @iocbq: Pointer to iocb object.
10370 *
10371 * The async_event handler calls this routine when it receives
10372 * an ASYNC_STATUS_CN event from the port. The port generates
10373 * this event when an Abort Sequence request to an rport fails
10374 * twice in succession. The abort could be originated by the
10375 * driver or by the port. The ABTS could have been for an ELS
10376 * or FCP IO. The port only generates this event when an ABTS
10377 * fails to complete after one retry.
10378 */
10379static void
10380lpfc_sli_abts_err_handler(struct lpfc_hba *phba,
10381 struct lpfc_iocbq *iocbq)
10382{
10383 struct lpfc_nodelist *ndlp = NULL;
10384 uint16_t rpi = 0, vpi = 0;
10385 struct lpfc_vport *vport = NULL;
10386
10387 /* The rpi in the ulpContext is vport-sensitive. */
10388 vpi = iocbq->iocb.un.asyncstat.sub_ctxt_tag;
10389 rpi = iocbq->iocb.ulpContext;
10390
10391 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10392 "3092 Port generated ABTS async event "
10393 "on vpi %d rpi %d status 0x%x\n",
10394 vpi, rpi, iocbq->iocb.ulpStatus);
10395
10396 vport = lpfc_find_vport_by_vpid(phba, vpi);
10397 if (!vport)
10398 goto err_exit;
10399 ndlp = lpfc_findnode_rpi(vport, rpi);
10400 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp))
10401 goto err_exit;
10402
10403 if (iocbq->iocb.ulpStatus == IOSTAT_LOCAL_REJECT)
10404 lpfc_sli_abts_recover_port(vport, ndlp);
10405 return;
10406
10407 err_exit:
10408 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10409 "3095 Event Context not found, no "
10410 "action on vpi %d rpi %d status 0x%x, reason 0x%x\n",
10411 iocbq->iocb.ulpContext, iocbq->iocb.ulpStatus,
10412 vpi, rpi);
10413}
10414
10415/* lpfc_sli4_abts_err_handler - handle a failed ABTS request from an SLI4 port.
10416 * @phba: pointer to HBA context object.
10417 * @ndlp: nodelist pointer for the impacted rport.
10418 * @axri: pointer to the wcqe containing the failed exchange.
10419 *
10420 * The driver calls this routine when it receives an ABORT_XRI_FCP CQE from the
10421 * port. The port generates this event when an abort exchange request to an
10422 * rport fails twice in succession with no reply. The abort could be originated
10423 * by the driver or by the port. The ABTS could have been for an ELS or FCP IO.
10424 */
10425void
10426lpfc_sli4_abts_err_handler(struct lpfc_hba *phba,
10427 struct lpfc_nodelist *ndlp,
10428 struct sli4_wcqe_xri_aborted *axri)
10429{
10430 struct lpfc_vport *vport;
5c1db2ac 10431 uint32_t ext_status = 0;
cb69f7de 10432
6b5151fd 10433 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) {
cb69f7de
JS
10434 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10435 "3115 Node Context not found, driver "
10436 "ignoring abts err event\n");
6b5151fd
JS
10437 return;
10438 }
10439
cb69f7de
JS
10440 vport = ndlp->vport;
10441 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10442 "3116 Port generated FCP XRI ABORT event on "
5c1db2ac 10443 "vpi %d rpi %d xri x%x status 0x%x parameter x%x\n",
8e668af5 10444 ndlp->vport->vpi, phba->sli4_hba.rpi_ids[ndlp->nlp_rpi],
cb69f7de 10445 bf_get(lpfc_wcqe_xa_xri, axri),
5c1db2ac
JS
10446 bf_get(lpfc_wcqe_xa_status, axri),
10447 axri->parameter);
cb69f7de 10448
5c1db2ac
JS
10449 /*
10450 * Catch the ABTS protocol failure case. Older OCe FW releases returned
10451 * LOCAL_REJECT and 0 for a failed ABTS exchange and later OCe and
10452 * LPe FW releases returned LOCAL_REJECT and SEQUENCE_TIMEOUT.
10453 */
e3d2b802 10454 ext_status = axri->parameter & IOERR_PARAM_MASK;
5c1db2ac
JS
10455 if ((bf_get(lpfc_wcqe_xa_status, axri) == IOSTAT_LOCAL_REJECT) &&
10456 ((ext_status == IOERR_SEQUENCE_TIMEOUT) || (ext_status == 0)))
cb69f7de
JS
10457 lpfc_sli_abts_recover_port(vport, ndlp);
10458}
10459
e59058c4 10460/**
3621a710 10461 * lpfc_sli_async_event_handler - ASYNC iocb handler function
e59058c4
JS
10462 * @phba: Pointer to HBA context object.
10463 * @pring: Pointer to driver SLI ring object.
10464 * @iocbq: Pointer to iocb object.
10465 *
10466 * This function is called by the slow ring event handler
10467 * function when there is an ASYNC event iocb in the ring.
10468 * This function is called with no lock held.
10469 * Currently this function handles only temperature related
10470 * ASYNC events. The function decodes the temperature sensor
10471 * event message and posts events for the management applications.
10472 **/
98c9ea5c 10473static void
57127f15
JS
10474lpfc_sli_async_event_handler(struct lpfc_hba * phba,
10475 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
10476{
10477 IOCB_t *icmd;
10478 uint16_t evt_code;
57127f15
JS
10479 struct temp_event temp_event_data;
10480 struct Scsi_Host *shost;
a257bf90 10481 uint32_t *iocb_w;
57127f15
JS
10482
10483 icmd = &iocbq->iocb;
10484 evt_code = icmd->un.asyncstat.evt_code;
57127f15 10485
cb69f7de
JS
10486 switch (evt_code) {
10487 case ASYNC_TEMP_WARN:
10488 case ASYNC_TEMP_SAFE:
10489 temp_event_data.data = (uint32_t) icmd->ulpContext;
10490 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
10491 if (evt_code == ASYNC_TEMP_WARN) {
10492 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
372c187b 10493 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
cb69f7de
JS
10494 "0347 Adapter is very hot, please take "
10495 "corrective action. temperature : %d Celsius\n",
10496 (uint32_t) icmd->ulpContext);
10497 } else {
10498 temp_event_data.event_code = LPFC_NORMAL_TEMP;
372c187b 10499 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
cb69f7de
JS
10500 "0340 Adapter temperature is OK now. "
10501 "temperature : %d Celsius\n",
10502 (uint32_t) icmd->ulpContext);
10503 }
10504
10505 /* Send temperature change event to applications */
10506 shost = lpfc_shost_from_vport(phba->pport);
10507 fc_host_post_vendor_event(shost, fc_get_event_number(),
10508 sizeof(temp_event_data), (char *) &temp_event_data,
10509 LPFC_NL_VENDOR_ID);
10510 break;
10511 case ASYNC_STATUS_CN:
10512 lpfc_sli_abts_err_handler(phba, iocbq);
10513 break;
10514 default:
a257bf90 10515 iocb_w = (uint32_t *) icmd;
372c187b 10516 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
76bb24ef 10517 "0346 Ring %d handler: unexpected ASYNC_STATUS"
e4e74273 10518 " evt_code 0x%x\n"
a257bf90
JS
10519 "W0 0x%08x W1 0x%08x W2 0x%08x W3 0x%08x\n"
10520 "W4 0x%08x W5 0x%08x W6 0x%08x W7 0x%08x\n"
10521 "W8 0x%08x W9 0x%08x W10 0x%08x W11 0x%08x\n"
10522 "W12 0x%08x W13 0x%08x W14 0x%08x W15 0x%08x\n",
cb69f7de 10523 pring->ringno, icmd->un.asyncstat.evt_code,
a257bf90
JS
10524 iocb_w[0], iocb_w[1], iocb_w[2], iocb_w[3],
10525 iocb_w[4], iocb_w[5], iocb_w[6], iocb_w[7],
10526 iocb_w[8], iocb_w[9], iocb_w[10], iocb_w[11],
10527 iocb_w[12], iocb_w[13], iocb_w[14], iocb_w[15]);
10528
cb69f7de 10529 break;
57127f15 10530 }
57127f15
JS
10531}
10532
10533
e59058c4 10534/**
895427bd 10535 * lpfc_sli4_setup - SLI ring setup function
e59058c4
JS
10536 * @phba: Pointer to HBA context object.
10537 *
10538 * lpfc_sli_setup sets up rings of the SLI interface with
10539 * number of iocbs per ring and iotags. This function is
10540 * called while driver attach to the HBA and before the
10541 * interrupts are enabled. So there is no need for locking.
10542 *
10543 * This function always returns 0.
10544 **/
dea3101e 10545int
895427bd
JS
10546lpfc_sli4_setup(struct lpfc_hba *phba)
10547{
10548 struct lpfc_sli_ring *pring;
10549
10550 pring = phba->sli4_hba.els_wq->pring;
10551 pring->num_mask = LPFC_MAX_RING_MASK;
10552 pring->prt[0].profile = 0; /* Mask 0 */
10553 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10554 pring->prt[0].type = FC_TYPE_ELS;
10555 pring->prt[0].lpfc_sli_rcv_unsol_event =
10556 lpfc_els_unsol_event;
10557 pring->prt[1].profile = 0; /* Mask 1 */
10558 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10559 pring->prt[1].type = FC_TYPE_ELS;
10560 pring->prt[1].lpfc_sli_rcv_unsol_event =
10561 lpfc_els_unsol_event;
10562 pring->prt[2].profile = 0; /* Mask 2 */
10563 /* NameServer Inquiry */
10564 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
10565 /* NameServer */
10566 pring->prt[2].type = FC_TYPE_CT;
10567 pring->prt[2].lpfc_sli_rcv_unsol_event =
10568 lpfc_ct_unsol_event;
10569 pring->prt[3].profile = 0; /* Mask 3 */
10570 /* NameServer response */
10571 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
10572 /* NameServer */
10573 pring->prt[3].type = FC_TYPE_CT;
10574 pring->prt[3].lpfc_sli_rcv_unsol_event =
10575 lpfc_ct_unsol_event;
10576 return 0;
10577}
10578
10579/**
10580 * lpfc_sli_setup - SLI ring setup function
10581 * @phba: Pointer to HBA context object.
10582 *
10583 * lpfc_sli_setup sets up rings of the SLI interface with
10584 * number of iocbs per ring and iotags. This function is
10585 * called while driver attach to the HBA and before the
10586 * interrupts are enabled. So there is no need for locking.
10587 *
10588 * This function always returns 0. SLI3 only.
10589 **/
10590int
dea3101e
JB
10591lpfc_sli_setup(struct lpfc_hba *phba)
10592{
ed957684 10593 int i, totiocbsize = 0;
dea3101e
JB
10594 struct lpfc_sli *psli = &phba->sli;
10595 struct lpfc_sli_ring *pring;
10596
2a76a283 10597 psli->num_rings = MAX_SLI3_CONFIGURED_RINGS;
dea3101e 10598 psli->sli_flag = 0;
dea3101e 10599
604a3e30
JB
10600 psli->iocbq_lookup = NULL;
10601 psli->iocbq_lookup_len = 0;
10602 psli->last_iotag = 0;
10603
dea3101e 10604 for (i = 0; i < psli->num_rings; i++) {
895427bd 10605 pring = &psli->sli3_ring[i];
dea3101e
JB
10606 switch (i) {
10607 case LPFC_FCP_RING: /* ring 0 - FCP */
10608 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10609 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
10610 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
10611 pring->sli.sli3.numCiocb +=
10612 SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10613 pring->sli.sli3.numRiocb +=
10614 SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10615 pring->sli.sli3.numCiocb +=
10616 SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10617 pring->sli.sli3.numRiocb +=
10618 SLI2_IOCB_RSP_R3XTRA_ENTRIES;
10619 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10620 SLI3_IOCB_CMD_SIZE :
10621 SLI2_IOCB_CMD_SIZE;
7e56aa25 10622 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10623 SLI3_IOCB_RSP_SIZE :
10624 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10625 pring->iotag_ctr = 0;
10626 pring->iotag_max =
92d7f7b0 10627 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB
10628 pring->fast_iotag = pring->iotag_max;
10629 pring->num_mask = 0;
10630 break;
a4bc3379 10631 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e 10632 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10633 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
10634 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
10635 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10636 SLI3_IOCB_CMD_SIZE :
10637 SLI2_IOCB_CMD_SIZE;
7e56aa25 10638 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10639 SLI3_IOCB_RSP_SIZE :
10640 SLI2_IOCB_RSP_SIZE;
2e0fef85 10641 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB
10642 pring->num_mask = 0;
10643 break;
10644 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
10645 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10646 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
10647 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
10648 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10649 SLI3_IOCB_CMD_SIZE :
10650 SLI2_IOCB_CMD_SIZE;
7e56aa25 10651 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10652 SLI3_IOCB_RSP_SIZE :
10653 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10654 pring->fast_iotag = 0;
10655 pring->iotag_ctr = 0;
10656 pring->iotag_max = 4096;
57127f15
JS
10657 pring->lpfc_sli_rcv_async_status =
10658 lpfc_sli_async_event_handler;
6669f9bb 10659 pring->num_mask = LPFC_MAX_RING_MASK;
dea3101e 10660 pring->prt[0].profile = 0; /* Mask 0 */
6a9c52cf
JS
10661 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10662 pring->prt[0].type = FC_TYPE_ELS;
dea3101e 10663 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 10664 lpfc_els_unsol_event;
dea3101e 10665 pring->prt[1].profile = 0; /* Mask 1 */
6a9c52cf
JS
10666 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10667 pring->prt[1].type = FC_TYPE_ELS;
dea3101e 10668 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 10669 lpfc_els_unsol_event;
dea3101e
JB
10670 pring->prt[2].profile = 0; /* Mask 2 */
10671 /* NameServer Inquiry */
6a9c52cf 10672 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
dea3101e 10673 /* NameServer */
6a9c52cf 10674 pring->prt[2].type = FC_TYPE_CT;
dea3101e 10675 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 10676 lpfc_ct_unsol_event;
dea3101e
JB
10677 pring->prt[3].profile = 0; /* Mask 3 */
10678 /* NameServer response */
6a9c52cf 10679 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
dea3101e 10680 /* NameServer */
6a9c52cf 10681 pring->prt[3].type = FC_TYPE_CT;
dea3101e 10682 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 10683 lpfc_ct_unsol_event;
dea3101e
JB
10684 break;
10685 }
7e56aa25
JS
10686 totiocbsize += (pring->sli.sli3.numCiocb *
10687 pring->sli.sli3.sizeCiocb) +
10688 (pring->sli.sli3.numRiocb * pring->sli.sli3.sizeRiocb);
dea3101e 10689 }
ed957684 10690 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 10691 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS
10692 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
10693 "SLI2 SLIM Data: x%x x%lx\n",
10694 phba->brd_no, totiocbsize,
10695 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 10696 }
cf5bf97e
JW
10697 if (phba->cfg_multi_ring_support == 2)
10698 lpfc_extra_ring_setup(phba);
dea3101e
JB
10699
10700 return 0;
10701}
10702
e59058c4 10703/**
895427bd 10704 * lpfc_sli4_queue_init - Queue initialization function
e59058c4
JS
10705 * @phba: Pointer to HBA context object.
10706 *
895427bd 10707 * lpfc_sli4_queue_init sets up mailbox queues and iocb queues for each
e59058c4
JS
10708 * ring. This function also initializes ring indices of each ring.
10709 * This function is called during the initialization of the SLI
10710 * interface of an HBA.
10711 * This function is called with no lock held and always returns
10712 * 1.
10713 **/
895427bd
JS
10714void
10715lpfc_sli4_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10716{
10717 struct lpfc_sli *psli;
10718 struct lpfc_sli_ring *pring;
604a3e30 10719 int i;
dea3101e
JB
10720
10721 psli = &phba->sli;
2e0fef85 10722 spin_lock_irq(&phba->hbalock);
dea3101e 10723 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10724 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e 10725 /* Initialize list headers for txq and txcmplq as double linked lists */
cdb42bec 10726 for (i = 0; i < phba->cfg_hdw_queue; i++) {
c00f62e6 10727 pring = phba->sli4_hba.hdwq[i].io_wq->pring;
895427bd
JS
10728 pring->flag = 0;
10729 pring->ringno = LPFC_FCP_RING;
c490850a 10730 pring->txcmplq_cnt = 0;
895427bd
JS
10731 INIT_LIST_HEAD(&pring->txq);
10732 INIT_LIST_HEAD(&pring->txcmplq);
10733 INIT_LIST_HEAD(&pring->iocb_continueq);
10734 spin_lock_init(&pring->ring_lock);
10735 }
10736 pring = phba->sli4_hba.els_wq->pring;
10737 pring->flag = 0;
10738 pring->ringno = LPFC_ELS_RING;
c490850a 10739 pring->txcmplq_cnt = 0;
895427bd
JS
10740 INIT_LIST_HEAD(&pring->txq);
10741 INIT_LIST_HEAD(&pring->txcmplq);
10742 INIT_LIST_HEAD(&pring->iocb_continueq);
10743 spin_lock_init(&pring->ring_lock);
dea3101e 10744
cdb42bec 10745 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
10746 pring = phba->sli4_hba.nvmels_wq->pring;
10747 pring->flag = 0;
10748 pring->ringno = LPFC_ELS_RING;
c490850a 10749 pring->txcmplq_cnt = 0;
895427bd
JS
10750 INIT_LIST_HEAD(&pring->txq);
10751 INIT_LIST_HEAD(&pring->txcmplq);
10752 INIT_LIST_HEAD(&pring->iocb_continueq);
10753 spin_lock_init(&pring->ring_lock);
10754 }
10755
10756 spin_unlock_irq(&phba->hbalock);
10757}
10758
10759/**
10760 * lpfc_sli_queue_init - Queue initialization function
10761 * @phba: Pointer to HBA context object.
10762 *
10763 * lpfc_sli_queue_init sets up mailbox queues and iocb queues for each
10764 * ring. This function also initializes ring indices of each ring.
10765 * This function is called during the initialization of the SLI
10766 * interface of an HBA.
10767 * This function is called with no lock held and always returns
10768 * 1.
10769 **/
10770void
10771lpfc_sli_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10772{
10773 struct lpfc_sli *psli;
10774 struct lpfc_sli_ring *pring;
604a3e30 10775 int i;
dea3101e
JB
10776
10777 psli = &phba->sli;
2e0fef85 10778 spin_lock_irq(&phba->hbalock);
dea3101e 10779 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10780 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB
10781 /* Initialize list headers for txq and txcmplq as double linked lists */
10782 for (i = 0; i < psli->num_rings; i++) {
895427bd 10783 pring = &psli->sli3_ring[i];
dea3101e 10784 pring->ringno = i;
7e56aa25
JS
10785 pring->sli.sli3.next_cmdidx = 0;
10786 pring->sli.sli3.local_getidx = 0;
10787 pring->sli.sli3.cmdidx = 0;
dea3101e 10788 INIT_LIST_HEAD(&pring->iocb_continueq);
9c2face6 10789 INIT_LIST_HEAD(&pring->iocb_continue_saveq);
dea3101e 10790 INIT_LIST_HEAD(&pring->postbufq);
895427bd
JS
10791 pring->flag = 0;
10792 INIT_LIST_HEAD(&pring->txq);
10793 INIT_LIST_HEAD(&pring->txcmplq);
7e56aa25 10794 spin_lock_init(&pring->ring_lock);
dea3101e 10795 }
2e0fef85 10796 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10797}
10798
04c68496
JS
10799/**
10800 * lpfc_sli_mbox_sys_flush - Flush mailbox command sub-system
10801 * @phba: Pointer to HBA context object.
10802 *
10803 * This routine flushes the mailbox command subsystem. It will unconditionally
10804 * flush all the mailbox commands in the three possible stages in the mailbox
10805 * command sub-system: pending mailbox command queue; the outstanding mailbox
10806 * command; and completed mailbox command queue. It is caller's responsibility
10807 * to make sure that the driver is in the proper state to flush the mailbox
10808 * command sub-system. Namely, the posting of mailbox commands into the
10809 * pending mailbox command queue from the various clients must be stopped;
10810 * either the HBA is in a state that it will never works on the outstanding
10811 * mailbox command (such as in EEH or ERATT conditions) or the outstanding
10812 * mailbox command has been completed.
10813 **/
10814static void
10815lpfc_sli_mbox_sys_flush(struct lpfc_hba *phba)
10816{
10817 LIST_HEAD(completions);
10818 struct lpfc_sli *psli = &phba->sli;
10819 LPFC_MBOXQ_t *pmb;
10820 unsigned long iflag;
10821
523128e5
JS
10822 /* Disable softirqs, including timers from obtaining phba->hbalock */
10823 local_bh_disable();
10824
04c68496
JS
10825 /* Flush all the mailbox commands in the mbox system */
10826 spin_lock_irqsave(&phba->hbalock, iflag);
523128e5 10827
04c68496
JS
10828 /* The pending mailbox command queue */
10829 list_splice_init(&phba->sli.mboxq, &completions);
10830 /* The outstanding active mailbox command */
10831 if (psli->mbox_active) {
10832 list_add_tail(&psli->mbox_active->list, &completions);
10833 psli->mbox_active = NULL;
10834 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10835 }
10836 /* The completed mailbox command queue */
10837 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
10838 spin_unlock_irqrestore(&phba->hbalock, iflag);
10839
523128e5
JS
10840 /* Enable softirqs again, done with phba->hbalock */
10841 local_bh_enable();
10842
04c68496
JS
10843 /* Return all flushed mailbox commands with MBX_NOT_FINISHED status */
10844 while (!list_empty(&completions)) {
10845 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
10846 pmb->u.mb.mbxStatus = MBX_NOT_FINISHED;
10847 if (pmb->mbox_cmpl)
10848 pmb->mbox_cmpl(phba, pmb);
10849 }
10850}
10851
e59058c4 10852/**
3621a710 10853 * lpfc_sli_host_down - Vport cleanup function
e59058c4
JS
10854 * @vport: Pointer to virtual port object.
10855 *
10856 * lpfc_sli_host_down is called to clean up the resources
10857 * associated with a vport before destroying virtual
10858 * port data structures.
10859 * This function does following operations:
10860 * - Free discovery resources associated with this virtual
10861 * port.
10862 * - Free iocbs associated with this virtual port in
10863 * the txq.
10864 * - Send abort for all iocb commands associated with this
10865 * vport in txcmplq.
10866 *
10867 * This function is called with no lock held and always returns 1.
10868 **/
92d7f7b0
JS
10869int
10870lpfc_sli_host_down(struct lpfc_vport *vport)
10871{
858c9f6c 10872 LIST_HEAD(completions);
92d7f7b0
JS
10873 struct lpfc_hba *phba = vport->phba;
10874 struct lpfc_sli *psli = &phba->sli;
895427bd 10875 struct lpfc_queue *qp = NULL;
92d7f7b0
JS
10876 struct lpfc_sli_ring *pring;
10877 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS
10878 int i;
10879 unsigned long flags = 0;
10880 uint16_t prev_pring_flag;
10881
10882 lpfc_cleanup_discovery_resources(vport);
10883
10884 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0 10885
895427bd
JS
10886 /*
10887 * Error everything on the txq since these iocbs
10888 * have not been given to the FW yet.
10889 * Also issue ABTS for everything on the txcmplq
10890 */
10891 if (phba->sli_rev != LPFC_SLI_REV4) {
10892 for (i = 0; i < psli->num_rings; i++) {
10893 pring = &psli->sli3_ring[i];
10894 prev_pring_flag = pring->flag;
10895 /* Only slow rings */
10896 if (pring->ringno == LPFC_ELS_RING) {
10897 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10898 /* Set the lpfc data pending flag */
10899 set_bit(LPFC_DATA_READY, &phba->data_flags);
10900 }
10901 list_for_each_entry_safe(iocb, next_iocb,
10902 &pring->txq, list) {
10903 if (iocb->vport != vport)
10904 continue;
10905 list_move_tail(&iocb->list, &completions);
10906 }
10907 list_for_each_entry_safe(iocb, next_iocb,
10908 &pring->txcmplq, list) {
10909 if (iocb->vport != vport)
10910 continue;
10911 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10912 }
10913 pring->flag = prev_pring_flag;
10914 }
10915 } else {
10916 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10917 pring = qp->pring;
10918 if (!pring)
92d7f7b0 10919 continue;
895427bd
JS
10920 if (pring == phba->sli4_hba.els_wq->pring) {
10921 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10922 /* Set the lpfc data pending flag */
10923 set_bit(LPFC_DATA_READY, &phba->data_flags);
10924 }
10925 prev_pring_flag = pring->flag;
65a3df63 10926 spin_lock(&pring->ring_lock);
895427bd
JS
10927 list_for_each_entry_safe(iocb, next_iocb,
10928 &pring->txq, list) {
10929 if (iocb->vport != vport)
10930 continue;
10931 list_move_tail(&iocb->list, &completions);
10932 }
65a3df63 10933 spin_unlock(&pring->ring_lock);
895427bd
JS
10934 list_for_each_entry_safe(iocb, next_iocb,
10935 &pring->txcmplq, list) {
10936 if (iocb->vport != vport)
10937 continue;
10938 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10939 }
10940 pring->flag = prev_pring_flag;
92d7f7b0 10941 }
92d7f7b0 10942 }
92d7f7b0
JS
10943 spin_unlock_irqrestore(&phba->hbalock, flags);
10944
a257bf90
JS
10945 /* Cancel all the IOCBs from the completions list */
10946 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10947 IOERR_SLI_DOWN);
92d7f7b0
JS
10948 return 1;
10949}
10950
e59058c4 10951/**
3621a710 10952 * lpfc_sli_hba_down - Resource cleanup function for the HBA
e59058c4
JS
10953 * @phba: Pointer to HBA context object.
10954 *
10955 * This function cleans up all iocb, buffers, mailbox commands
10956 * while shutting down the HBA. This function is called with no
10957 * lock held and always returns 1.
10958 * This function does the following to cleanup driver resources:
10959 * - Free discovery resources for each virtual port
10960 * - Cleanup any pending fabric iocbs
10961 * - Iterate through the iocb txq and free each entry
10962 * in the list.
10963 * - Free up any buffer posted to the HBA
10964 * - Free mailbox commands in the mailbox queue.
10965 **/
dea3101e 10966int
2e0fef85 10967lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 10968{
2534ba75 10969 LIST_HEAD(completions);
2e0fef85 10970 struct lpfc_sli *psli = &phba->sli;
895427bd 10971 struct lpfc_queue *qp = NULL;
dea3101e 10972 struct lpfc_sli_ring *pring;
0ff10d46 10973 struct lpfc_dmabuf *buf_ptr;
dea3101e 10974 unsigned long flags = 0;
04c68496
JS
10975 int i;
10976
10977 /* Shutdown the mailbox command sub-system */
618a5230 10978 lpfc_sli_mbox_sys_shutdown(phba, LPFC_MBX_WAIT);
dea3101e 10979
dea3101e
JB
10980 lpfc_hba_down_prep(phba);
10981
523128e5
JS
10982 /* Disable softirqs, including timers from obtaining phba->hbalock */
10983 local_bh_disable();
10984
92d7f7b0
JS
10985 lpfc_fabric_abort_hba(phba);
10986
2e0fef85 10987 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e 10988
895427bd
JS
10989 /*
10990 * Error everything on the txq since these iocbs
10991 * have not been given to the FW yet.
10992 */
10993 if (phba->sli_rev != LPFC_SLI_REV4) {
10994 for (i = 0; i < psli->num_rings; i++) {
10995 pring = &psli->sli3_ring[i];
10996 /* Only slow rings */
10997 if (pring->ringno == LPFC_ELS_RING) {
10998 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10999 /* Set the lpfc data pending flag */
11000 set_bit(LPFC_DATA_READY, &phba->data_flags);
11001 }
11002 list_splice_init(&pring->txq, &completions);
11003 }
11004 } else {
11005 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
11006 pring = qp->pring;
11007 if (!pring)
11008 continue;
4b0a42be 11009 spin_lock(&pring->ring_lock);
895427bd 11010 list_splice_init(&pring->txq, &completions);
4b0a42be 11011 spin_unlock(&pring->ring_lock);
895427bd
JS
11012 if (pring == phba->sli4_hba.els_wq->pring) {
11013 pring->flag |= LPFC_DEFERRED_RING_EVENT;
11014 /* Set the lpfc data pending flag */
11015 set_bit(LPFC_DATA_READY, &phba->data_flags);
11016 }
11017 }
2534ba75 11018 }
2e0fef85 11019 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 11020
a257bf90
JS
11021 /* Cancel all the IOCBs from the completions list */
11022 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
11023 IOERR_SLI_DOWN);
dea3101e 11024
0ff10d46
JS
11025 spin_lock_irqsave(&phba->hbalock, flags);
11026 list_splice_init(&phba->elsbuf, &completions);
11027 phba->elsbuf_cnt = 0;
11028 phba->elsbuf_prev_cnt = 0;
11029 spin_unlock_irqrestore(&phba->hbalock, flags);
11030
11031 while (!list_empty(&completions)) {
11032 list_remove_head(&completions, buf_ptr,
11033 struct lpfc_dmabuf, list);
11034 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
11035 kfree(buf_ptr);
11036 }
11037
523128e5
JS
11038 /* Enable softirqs again, done with phba->hbalock */
11039 local_bh_enable();
11040
dea3101e
JB
11041 /* Return any active mbox cmds */
11042 del_timer_sync(&psli->mbox_tmo);
2e0fef85 11043
da0436e9 11044 spin_lock_irqsave(&phba->pport->work_port_lock, flags);
2e0fef85 11045 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
da0436e9 11046 spin_unlock_irqrestore(&phba->pport->work_port_lock, flags);
2e0fef85 11047
da0436e9
JS
11048 return 1;
11049}
11050
e59058c4 11051/**
3621a710 11052 * lpfc_sli_pcimem_bcopy - SLI memory copy function
e59058c4
JS
11053 * @srcp: Source memory pointer.
11054 * @destp: Destination memory pointer.
11055 * @cnt: Number of words required to be copied.
11056 *
11057 * This function is used for copying data between driver memory
11058 * and the SLI memory. This function also changes the endianness
11059 * of each word if native endianness is different from SLI
11060 * endianness. This function can be called with or without
11061 * lock.
11062 **/
dea3101e
JB
11063void
11064lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
11065{
11066 uint32_t *src = srcp;
11067 uint32_t *dest = destp;
11068 uint32_t ldata;
11069 int i;
11070
11071 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
11072 ldata = *src;
11073 ldata = le32_to_cpu(ldata);
11074 *dest = ldata;
11075 src++;
11076 dest++;
11077 }
11078}
11079
e59058c4 11080
a0c87cbd
JS
11081/**
11082 * lpfc_sli_bemem_bcopy - SLI memory copy function
11083 * @srcp: Source memory pointer.
11084 * @destp: Destination memory pointer.
11085 * @cnt: Number of words required to be copied.
11086 *
11087 * This function is used for copying data between a data structure
11088 * with big endian representation to local endianness.
11089 * This function can be called with or without lock.
11090 **/
11091void
11092lpfc_sli_bemem_bcopy(void *srcp, void *destp, uint32_t cnt)
11093{
11094 uint32_t *src = srcp;
11095 uint32_t *dest = destp;
11096 uint32_t ldata;
11097 int i;
11098
11099 for (i = 0; i < (int)cnt; i += sizeof(uint32_t)) {
11100 ldata = *src;
11101 ldata = be32_to_cpu(ldata);
11102 *dest = ldata;
11103 src++;
11104 dest++;
11105 }
11106}
11107
e59058c4 11108/**
3621a710 11109 * lpfc_sli_ringpostbuf_put - Function to add a buffer to postbufq
e59058c4
JS
11110 * @phba: Pointer to HBA context object.
11111 * @pring: Pointer to driver SLI ring object.
11112 * @mp: Pointer to driver buffer object.
11113 *
11114 * This function is called with no lock held.
11115 * It always return zero after adding the buffer to the postbufq
11116 * buffer list.
11117 **/
dea3101e 11118int
2e0fef85
JS
11119lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11120 struct lpfc_dmabuf *mp)
dea3101e
JB
11121{
11122 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
11123 later */
2e0fef85 11124 spin_lock_irq(&phba->hbalock);
dea3101e 11125 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 11126 pring->postbufq_cnt++;
2e0fef85 11127 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
11128 return 0;
11129}
11130
e59058c4 11131/**
3621a710 11132 * lpfc_sli_get_buffer_tag - allocates a tag for a CMD_QUE_XRI64_CX buffer
e59058c4
JS
11133 * @phba: Pointer to HBA context object.
11134 *
11135 * When HBQ is enabled, buffers are searched based on tags. This function
11136 * allocates a tag for buffer posted using CMD_QUE_XRI64_CX iocb. The
11137 * tag is bit wise or-ed with QUE_BUFTAG_BIT to make sure that the tag
11138 * does not conflict with tags of buffer posted for unsolicited events.
11139 * The function returns the allocated tag. The function is called with
11140 * no locks held.
11141 **/
76bb24ef
JS
11142uint32_t
11143lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
11144{
11145 spin_lock_irq(&phba->hbalock);
11146 phba->buffer_tag_count++;
11147 /*
11148 * Always set the QUE_BUFTAG_BIT to distiguish between
11149 * a tag assigned by HBQ.
11150 */
11151 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
11152 spin_unlock_irq(&phba->hbalock);
11153 return phba->buffer_tag_count;
11154}
11155
e59058c4 11156/**
3621a710 11157 * lpfc_sli_ring_taggedbuf_get - find HBQ buffer associated with given tag
e59058c4
JS
11158 * @phba: Pointer to HBA context object.
11159 * @pring: Pointer to driver SLI ring object.
11160 * @tag: Buffer tag.
11161 *
11162 * Buffers posted using CMD_QUE_XRI64_CX iocb are in pring->postbufq
11163 * list. After HBA DMA data to these buffers, CMD_IOCB_RET_XRI64_CX
11164 * iocb is posted to the response ring with the tag of the buffer.
11165 * This function searches the pring->postbufq list using the tag
11166 * to find buffer associated with CMD_IOCB_RET_XRI64_CX
11167 * iocb. If the buffer is found then lpfc_dmabuf object of the
11168 * buffer is returned to the caller else NULL is returned.
11169 * This function is called with no lock held.
11170 **/
76bb24ef
JS
11171struct lpfc_dmabuf *
11172lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11173 uint32_t tag)
11174{
11175 struct lpfc_dmabuf *mp, *next_mp;
11176 struct list_head *slp = &pring->postbufq;
11177
25985edc 11178 /* Search postbufq, from the beginning, looking for a match on tag */
76bb24ef
JS
11179 spin_lock_irq(&phba->hbalock);
11180 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
11181 if (mp->buffer_tag == tag) {
11182 list_del_init(&mp->list);
11183 pring->postbufq_cnt--;
11184 spin_unlock_irq(&phba->hbalock);
11185 return mp;
11186 }
11187 }
11188
11189 spin_unlock_irq(&phba->hbalock);
372c187b 11190 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
d7c255b2 11191 "0402 Cannot find virtual addr for buffer tag on "
32350664 11192 "ring %d Data x%lx x%px x%px x%x\n",
76bb24ef
JS
11193 pring->ringno, (unsigned long) tag,
11194 slp->next, slp->prev, pring->postbufq_cnt);
11195
11196 return NULL;
11197}
dea3101e 11198
e59058c4 11199/**
3621a710 11200 * lpfc_sli_ringpostbuf_get - search buffers for unsolicited CT and ELS events
e59058c4
JS
11201 * @phba: Pointer to HBA context object.
11202 * @pring: Pointer to driver SLI ring object.
11203 * @phys: DMA address of the buffer.
11204 *
11205 * This function searches the buffer list using the dma_address
11206 * of unsolicited event to find the driver's lpfc_dmabuf object
11207 * corresponding to the dma_address. The function returns the
11208 * lpfc_dmabuf object if a buffer is found else it returns NULL.
11209 * This function is called by the ct and els unsolicited event
11210 * handlers to get the buffer associated with the unsolicited
11211 * event.
11212 *
11213 * This function is called with no lock held.
11214 **/
dea3101e
JB
11215struct lpfc_dmabuf *
11216lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11217 dma_addr_t phys)
11218{
11219 struct lpfc_dmabuf *mp, *next_mp;
11220 struct list_head *slp = &pring->postbufq;
11221
25985edc 11222 /* Search postbufq, from the beginning, looking for a match on phys */
2e0fef85 11223 spin_lock_irq(&phba->hbalock);
dea3101e
JB
11224 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
11225 if (mp->phys == phys) {
11226 list_del_init(&mp->list);
11227 pring->postbufq_cnt--;
2e0fef85 11228 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
11229 return mp;
11230 }
11231 }
11232
2e0fef85 11233 spin_unlock_irq(&phba->hbalock);
372c187b 11234 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 11235 "0410 Cannot find virtual addr for mapped buf on "
32350664 11236 "ring %d Data x%llx x%px x%px x%x\n",
e8b62011 11237 pring->ringno, (unsigned long long)phys,
dea3101e
JB
11238 slp->next, slp->prev, pring->postbufq_cnt);
11239 return NULL;
11240}
11241
e59058c4 11242/**
3621a710 11243 * lpfc_sli_abort_els_cmpl - Completion handler for the els abort iocbs
e59058c4
JS
11244 * @phba: Pointer to HBA context object.
11245 * @cmdiocb: Pointer to driver command iocb object.
11246 * @rspiocb: Pointer to driver response iocb object.
11247 *
11248 * This function is the completion handler for the abort iocbs for
11249 * ELS commands. This function is called from the ELS ring event
11250 * handler with no lock held. This function frees memory resources
11251 * associated with the abort iocb.
11252 **/
dea3101e 11253static void
2e0fef85
JS
11254lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11255 struct lpfc_iocbq *rspiocb)
dea3101e 11256{
2e0fef85 11257 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 11258 uint16_t abort_iotag, abort_context;
ff78d8f9 11259 struct lpfc_iocbq *abort_iocb = NULL;
2680eeaa
JS
11260
11261 if (irsp->ulpStatus) {
ff78d8f9
JS
11262
11263 /*
11264 * Assume that the port already completed and returned, or
11265 * will return the iocb. Just Log the message.
11266 */
2680eeaa
JS
11267 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
11268 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
11269
2e0fef85 11270 spin_lock_irq(&phba->hbalock);
45ed1190 11271 if (phba->sli_rev < LPFC_SLI_REV4) {
faa832e9
JS
11272 if (irsp->ulpCommand == CMD_ABORT_XRI_CX &&
11273 irsp->ulpStatus == IOSTAT_LOCAL_REJECT &&
11274 irsp->un.ulpWord[4] == IOERR_ABORT_REQUESTED) {
11275 spin_unlock_irq(&phba->hbalock);
11276 goto release_iocb;
11277 }
45ed1190
JS
11278 if (abort_iotag != 0 &&
11279 abort_iotag <= phba->sli.last_iotag)
11280 abort_iocb =
11281 phba->sli.iocbq_lookup[abort_iotag];
11282 } else
11283 /* For sli4 the abort_tag is the XRI,
11284 * so the abort routine puts the iotag of the iocb
11285 * being aborted in the context field of the abort
11286 * IOCB.
11287 */
11288 abort_iocb = phba->sli.iocbq_lookup[abort_context];
2680eeaa 11289
2a9bf3d0 11290 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS | LOG_SLI,
32350664 11291 "0327 Cannot abort els iocb x%px "
2a9bf3d0
JS
11292 "with tag %x context %x, abort status %x, "
11293 "abort code %x\n",
11294 abort_iocb, abort_iotag, abort_context,
11295 irsp->ulpStatus, irsp->un.ulpWord[4]);
341af102 11296
ff78d8f9 11297 spin_unlock_irq(&phba->hbalock);
2680eeaa 11298 }
faa832e9 11299release_iocb:
604a3e30 11300 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB
11301 return;
11302}
11303
e59058c4 11304/**
3621a710 11305 * lpfc_ignore_els_cmpl - Completion handler for aborted ELS command
e59058c4
JS
11306 * @phba: Pointer to HBA context object.
11307 * @cmdiocb: Pointer to driver command iocb object.
11308 * @rspiocb: Pointer to driver response iocb object.
11309 *
11310 * The function is called from SLI ring event handler with no
11311 * lock held. This function is the completion handler for ELS commands
11312 * which are aborted. The function frees memory resources used for
11313 * the aborted ELS commands.
11314 **/
92d7f7b0
JS
11315static void
11316lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11317 struct lpfc_iocbq *rspiocb)
11318{
11319 IOCB_t *irsp = &rspiocb->iocb;
11320
11321 /* ELS cmd tag <ulpIoTag> completes */
11322 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
d7c255b2 11323 "0139 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 11324 "x%x x%x x%x\n",
e8b62011 11325 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 11326 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS
11327 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
11328 lpfc_ct_free_iocb(phba, cmdiocb);
11329 else
11330 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS
11331 return;
11332}
11333
e59058c4 11334/**
5af5eee7 11335 * lpfc_sli_abort_iotag_issue - Issue abort for a command iocb
e59058c4
JS
11336 * @phba: Pointer to HBA context object.
11337 * @pring: Pointer to driver SLI ring object.
11338 * @cmdiocb: Pointer to driver command iocb object.
11339 *
5af5eee7
JS
11340 * This function issues an abort iocb for the provided command iocb down to
11341 * the port. Other than the case the outstanding command iocb is an abort
11342 * request, this function issues abort out unconditionally. This function is
11343 * called with hbalock held. The function returns 0 when it fails due to
11344 * memory allocation failure or when the command iocb is an abort request.
88acb4d9 11345 * The hbalock is asserted held in the code path calling this routine.
e59058c4 11346 **/
5af5eee7
JS
11347static int
11348lpfc_sli_abort_iotag_issue(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 11349 struct lpfc_iocbq *cmdiocb)
dea3101e 11350{
2e0fef85 11351 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 11352 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB
11353 IOCB_t *icmd = NULL;
11354 IOCB_t *iabt = NULL;
5af5eee7 11355 int retval;
7e56aa25 11356 unsigned long iflags;
faa832e9 11357 struct lpfc_nodelist *ndlp;
07951076 11358
92d7f7b0
JS
11359 /*
11360 * There are certain command types we don't want to abort. And we
11361 * don't want to abort commands that are already in the process of
11362 * being aborted.
07951076
JS
11363 */
11364 icmd = &cmdiocb->iocb;
2e0fef85 11365 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS
11366 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11367 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS
11368 return 0;
11369
dea3101e 11370 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 11371 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
11372 if (abtsiocbp == NULL)
11373 return 0;
dea3101e 11374
07951076 11375 /* This signals the response to set the correct status
341af102 11376 * before calling the completion handler
07951076
JS
11377 */
11378 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
11379
dea3101e 11380 iabt = &abtsiocbp->iocb;
07951076
JS
11381 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
11382 iabt->un.acxri.abortContextTag = icmd->ulpContext;
45ed1190 11383 if (phba->sli_rev == LPFC_SLI_REV4) {
da0436e9 11384 iabt->un.acxri.abortIoTag = cmdiocb->sli4_xritag;
45ed1190 11385 iabt->un.acxri.abortContextTag = cmdiocb->iotag;
faa832e9 11386 } else {
da0436e9 11387 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
faa832e9
JS
11388 if (pring->ringno == LPFC_ELS_RING) {
11389 ndlp = (struct lpfc_nodelist *)(cmdiocb->context1);
11390 iabt->un.acxri.abortContextTag = ndlp->nlp_rpi;
11391 }
11392 }
07951076
JS
11393 iabt->ulpLe = 1;
11394 iabt->ulpClass = icmd->ulpClass;
dea3101e 11395
5ffc266e 11396 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11397 abtsiocbp->hba_wqidx = cmdiocb->hba_wqidx;
341af102
JS
11398 if (cmdiocb->iocb_flag & LPFC_IO_FCP)
11399 abtsiocbp->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11400 if (cmdiocb->iocb_flag & LPFC_IO_FOF)
11401 abtsiocbp->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11402
2e0fef85 11403 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS
11404 iabt->ulpCommand = CMD_ABORT_XRI_CN;
11405 else
11406 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 11407
07951076 11408 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
e6c6acc0 11409 abtsiocbp->vport = vport;
5b8bd0c9 11410
e8b62011
JS
11411 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
11412 "0339 Abort xri x%x, original iotag x%x, "
11413 "abort cmd iotag x%x\n",
2a9bf3d0 11414 iabt->un.acxri.abortIoTag,
e8b62011 11415 iabt->un.acxri.abortContextTag,
2a9bf3d0 11416 abtsiocbp->iotag);
7e56aa25
JS
11417
11418 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
11419 pring = lpfc_sli4_calc_ring(phba, abtsiocbp);
11420 if (unlikely(pring == NULL))
9bd2bff5 11421 return 0;
7e56aa25
JS
11422 /* Note: both hbalock and ring_lock need to be set here */
11423 spin_lock_irqsave(&pring->ring_lock, iflags);
11424 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11425 abtsiocbp, 0);
11426 spin_unlock_irqrestore(&pring->ring_lock, iflags);
11427 } else {
11428 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11429 abtsiocbp, 0);
11430 }
dea3101e 11431
d7c255b2
JS
11432 if (retval)
11433 __lpfc_sli_release_iocbq(phba, abtsiocbp);
5af5eee7
JS
11434
11435 /*
11436 * Caller to this routine should check for IOCB_ERROR
11437 * and handle it properly. This routine no longer removes
11438 * iocb off txcmplq and call compl in case of IOCB_ERROR.
11439 */
11440 return retval;
11441}
11442
11443/**
11444 * lpfc_sli_issue_abort_iotag - Abort function for a command iocb
11445 * @phba: Pointer to HBA context object.
11446 * @pring: Pointer to driver SLI ring object.
11447 * @cmdiocb: Pointer to driver command iocb object.
11448 *
11449 * This function issues an abort iocb for the provided command iocb. In case
11450 * of unloading, the abort iocb will not be issued to commands on the ELS
11451 * ring. Instead, the callback function shall be changed to those commands
11452 * so that nothing happens when them finishes. This function is called with
11453 * hbalock held. The function returns 0 when the command iocb is an abort
11454 * request.
11455 **/
11456int
11457lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11458 struct lpfc_iocbq *cmdiocb)
11459{
11460 struct lpfc_vport *vport = cmdiocb->vport;
11461 int retval = IOCB_ERROR;
11462 IOCB_t *icmd = NULL;
11463
1c2ba475
JT
11464 lockdep_assert_held(&phba->hbalock);
11465
5af5eee7
JS
11466 /*
11467 * There are certain command types we don't want to abort. And we
11468 * don't want to abort commands that are already in the process of
11469 * being aborted.
11470 */
11471 icmd = &cmdiocb->iocb;
11472 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
11473 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11474 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
11475 return 0;
11476
1234a6d5
DK
11477 if (!pring) {
11478 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11479 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11480 else
11481 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11482 goto abort_iotag_exit;
11483 }
11484
5af5eee7
JS
11485 /*
11486 * If we're unloading, don't abort iocb on the ELS ring, but change
11487 * the callback so that nothing happens when it finishes.
11488 */
11489 if ((vport->load_flag & FC_UNLOADING) &&
11490 (pring->ringno == LPFC_ELS_RING)) {
11491 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11492 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11493 else
11494 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11495 goto abort_iotag_exit;
11496 }
11497
11498 /* Now, we try to issue the abort to the cmdiocb out */
11499 retval = lpfc_sli_abort_iotag_issue(phba, pring, cmdiocb);
11500
07951076 11501abort_iotag_exit:
2e0fef85
JS
11502 /*
11503 * Caller to this routine should check for IOCB_ERROR
11504 * and handle it properly. This routine no longer removes
11505 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 11506 */
2e0fef85 11507 return retval;
dea3101e
JB
11508}
11509
5af5eee7
JS
11510/**
11511 * lpfc_sli_hba_iocb_abort - Abort all iocbs to an hba.
11512 * @phba: pointer to lpfc HBA data structure.
11513 *
11514 * This routine will abort all pending and outstanding iocbs to an HBA.
11515 **/
11516void
11517lpfc_sli_hba_iocb_abort(struct lpfc_hba *phba)
11518{
11519 struct lpfc_sli *psli = &phba->sli;
11520 struct lpfc_sli_ring *pring;
895427bd 11521 struct lpfc_queue *qp = NULL;
5af5eee7
JS
11522 int i;
11523
895427bd
JS
11524 if (phba->sli_rev != LPFC_SLI_REV4) {
11525 for (i = 0; i < psli->num_rings; i++) {
11526 pring = &psli->sli3_ring[i];
11527 lpfc_sli_abort_iocb_ring(phba, pring);
11528 }
11529 return;
11530 }
11531 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
11532 pring = qp->pring;
11533 if (!pring)
11534 continue;
db55fba8 11535 lpfc_sli_abort_iocb_ring(phba, pring);
5af5eee7
JS
11536 }
11537}
11538
e59058c4 11539/**
3621a710 11540 * lpfc_sli_validate_fcp_iocb - find commands associated with a vport or LUN
e59058c4
JS
11541 * @iocbq: Pointer to driver iocb object.
11542 * @vport: Pointer to driver virtual port object.
11543 * @tgt_id: SCSI ID of the target.
11544 * @lun_id: LUN ID of the scsi device.
11545 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST
11546 *
3621a710 11547 * This function acts as an iocb filter for functions which abort or count
e59058c4
JS
11548 * all FCP iocbs pending on a lun/SCSI target/SCSI host. It will return
11549 * 0 if the filtering criteria is met for the given iocb and will return
11550 * 1 if the filtering criteria is not met.
11551 * If ctx_cmd == LPFC_CTX_LUN, the function returns 0 only if the
11552 * given iocb is for the SCSI device specified by vport, tgt_id and
11553 * lun_id parameter.
11554 * If ctx_cmd == LPFC_CTX_TGT, the function returns 0 only if the
11555 * given iocb is for the SCSI target specified by vport and tgt_id
11556 * parameters.
11557 * If ctx_cmd == LPFC_CTX_HOST, the function returns 0 only if the
11558 * given iocb is for the SCSI host associated with the given vport.
11559 * This function is called with no locks held.
11560 **/
dea3101e 11561static int
51ef4c26
JS
11562lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
11563 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 11564 lpfc_ctx_cmd ctx_cmd)
dea3101e 11565{
c490850a 11566 struct lpfc_io_buf *lpfc_cmd;
dea3101e
JB
11567 int rc = 1;
11568
b0e83012 11569 if (iocbq->vport != vport)
0bd4ca25
JSEC
11570 return rc;
11571
b0e83012
JS
11572 if (!(iocbq->iocb_flag & LPFC_IO_FCP) ||
11573 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ))
51ef4c26
JS
11574 return rc;
11575
c490850a 11576 lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq);
0bd4ca25 11577
495a714c 11578 if (lpfc_cmd->pCmd == NULL)
dea3101e
JB
11579 return rc;
11580
11581 switch (ctx_cmd) {
11582 case LPFC_CTX_LUN:
b0e83012 11583 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c
JS
11584 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id) &&
11585 (scsilun_to_int(&lpfc_cmd->fcp_cmnd->fcp_lun) == lun_id))
dea3101e
JB
11586 rc = 0;
11587 break;
11588 case LPFC_CTX_TGT:
b0e83012 11589 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c 11590 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id))
dea3101e
JB
11591 rc = 0;
11592 break;
dea3101e
JB
11593 case LPFC_CTX_HOST:
11594 rc = 0;
11595 break;
11596 default:
11597 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
cadbd4a5 11598 __func__, ctx_cmd);
dea3101e
JB
11599 break;
11600 }
11601
11602 return rc;
11603}
11604
e59058c4 11605/**
3621a710 11606 * lpfc_sli_sum_iocb - Function to count the number of FCP iocbs pending
e59058c4
JS
11607 * @vport: Pointer to virtual port.
11608 * @tgt_id: SCSI ID of the target.
11609 * @lun_id: LUN ID of the scsi device.
11610 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11611 *
11612 * This function returns number of FCP commands pending for the vport.
11613 * When ctx_cmd == LPFC_CTX_LUN, the function returns number of FCP
11614 * commands pending on the vport associated with SCSI device specified
11615 * by tgt_id and lun_id parameters.
11616 * When ctx_cmd == LPFC_CTX_TGT, the function returns number of FCP
11617 * commands pending on the vport associated with SCSI target specified
11618 * by tgt_id parameter.
11619 * When ctx_cmd == LPFC_CTX_HOST, the function returns number of FCP
11620 * commands pending on the vport.
11621 * This function returns the number of iocbs which satisfy the filter.
11622 * This function is called without any lock held.
11623 **/
dea3101e 11624int
51ef4c26
JS
11625lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
11626 lpfc_ctx_cmd ctx_cmd)
dea3101e 11627{
51ef4c26 11628 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11629 struct lpfc_iocbq *iocbq;
11630 int sum, i;
dea3101e 11631
31979008 11632 spin_lock_irq(&phba->hbalock);
0bd4ca25
JSEC
11633 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
11634 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11635
51ef4c26
JS
11636 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
11637 ctx_cmd) == 0)
0bd4ca25 11638 sum++;
dea3101e 11639 }
31979008 11640 spin_unlock_irq(&phba->hbalock);
0bd4ca25 11641
dea3101e
JB
11642 return sum;
11643}
11644
e59058c4 11645/**
3621a710 11646 * lpfc_sli_abort_fcp_cmpl - Completion handler function for aborted FCP IOCBs
e59058c4
JS
11647 * @phba: Pointer to HBA context object
11648 * @cmdiocb: Pointer to command iocb object.
11649 * @rspiocb: Pointer to response iocb object.
11650 *
11651 * This function is called when an aborted FCP iocb completes. This
11652 * function is called by the ring event handler with no lock held.
11653 * This function frees the iocb.
11654 **/
5eb95af0 11655void
2e0fef85
JS
11656lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11657 struct lpfc_iocbq *rspiocb)
5eb95af0 11658{
cb69f7de 11659 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8e668af5 11660 "3096 ABORT_XRI_CN completing on rpi x%x "
cb69f7de
JS
11661 "original iotag x%x, abort cmd iotag x%x "
11662 "status 0x%x, reason 0x%x\n",
11663 cmdiocb->iocb.un.acxri.abortContextTag,
11664 cmdiocb->iocb.un.acxri.abortIoTag,
11665 cmdiocb->iotag, rspiocb->iocb.ulpStatus,
11666 rspiocb->iocb.un.ulpWord[4]);
604a3e30 11667 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC
11668 return;
11669}
11670
e59058c4 11671/**
3621a710 11672 * lpfc_sli_abort_iocb - issue abort for all commands on a host/target/LUN
e59058c4
JS
11673 * @vport: Pointer to virtual port.
11674 * @pring: Pointer to driver SLI ring object.
11675 * @tgt_id: SCSI ID of the target.
11676 * @lun_id: LUN ID of the scsi device.
11677 * @abort_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11678 *
11679 * This function sends an abort command for every SCSI command
11680 * associated with the given virtual port pending on the ring
11681 * filtered by lpfc_sli_validate_fcp_iocb function.
11682 * When abort_cmd == LPFC_CTX_LUN, the function sends abort only to the
11683 * FCP iocbs associated with lun specified by tgt_id and lun_id
11684 * parameters
11685 * When abort_cmd == LPFC_CTX_TGT, the function sends abort only to the
11686 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11687 * When abort_cmd == LPFC_CTX_HOST, the function sends abort to all
11688 * FCP iocbs associated with virtual port.
11689 * This function returns number of iocbs it failed to abort.
11690 * This function is called with no locks held.
11691 **/
dea3101e 11692int
51ef4c26
JS
11693lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11694 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 11695{
51ef4c26 11696 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11697 struct lpfc_iocbq *iocbq;
11698 struct lpfc_iocbq *abtsiocb;
ecbb227e 11699 struct lpfc_sli_ring *pring_s4;
dea3101e 11700 IOCB_t *cmd = NULL;
dea3101e 11701 int errcnt = 0, ret_val = 0;
0bd4ca25 11702 int i;
dea3101e 11703
b0e83012 11704 /* all I/Os are in process of being flushed */
c00f62e6 11705 if (phba->hba_flag & HBA_IOQ_FLUSH)
b0e83012
JS
11706 return errcnt;
11707
0bd4ca25
JSEC
11708 for (i = 1; i <= phba->sli.last_iotag; i++) {
11709 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11710
51ef4c26 11711 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 11712 abort_cmd) != 0)
dea3101e
JB
11713 continue;
11714
afbd8d88
JS
11715 /*
11716 * If the iocbq is already being aborted, don't take a second
11717 * action, but do count it.
11718 */
11719 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11720 continue;
11721
dea3101e 11722 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 11723 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
11724 if (abtsiocb == NULL) {
11725 errcnt++;
11726 continue;
11727 }
dea3101e 11728
afbd8d88
JS
11729 /* indicate the IO is being aborted by the driver. */
11730 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11731
0bd4ca25 11732 cmd = &iocbq->iocb;
dea3101e
JB
11733 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11734 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
da0436e9
JS
11735 if (phba->sli_rev == LPFC_SLI_REV4)
11736 abtsiocb->iocb.un.acxri.abortIoTag = iocbq->sli4_xritag;
11737 else
11738 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
dea3101e
JB
11739 abtsiocb->iocb.ulpLe = 1;
11740 abtsiocb->iocb.ulpClass = cmd->ulpClass;
afbd8d88 11741 abtsiocb->vport = vport;
dea3101e 11742
5ffc266e 11743 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11744 abtsiocb->hba_wqidx = iocbq->hba_wqidx;
341af102
JS
11745 if (iocbq->iocb_flag & LPFC_IO_FCP)
11746 abtsiocb->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11747 if (iocbq->iocb_flag & LPFC_IO_FOF)
11748 abtsiocb->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11749
2e0fef85 11750 if (lpfc_is_link_up(phba))
dea3101e
JB
11751 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11752 else
11753 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11754
5eb95af0
JSEC
11755 /* Setup callback routine and issue the command. */
11756 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
ecbb227e
JS
11757 if (phba->sli_rev == LPFC_SLI_REV4) {
11758 pring_s4 = lpfc_sli4_calc_ring(phba, iocbq);
11759 if (!pring_s4)
11760 continue;
11761 ret_val = lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11762 abtsiocb, 0);
11763 } else
11764 ret_val = lpfc_sli_issue_iocb(phba, pring->ringno,
11765 abtsiocb, 0);
dea3101e 11766 if (ret_val == IOCB_ERROR) {
604a3e30 11767 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB
11768 errcnt++;
11769 continue;
11770 }
11771 }
11772
11773 return errcnt;
11774}
11775
98912dda
JS
11776/**
11777 * lpfc_sli_abort_taskmgmt - issue abort for all commands on a host/target/LUN
11778 * @vport: Pointer to virtual port.
11779 * @pring: Pointer to driver SLI ring object.
11780 * @tgt_id: SCSI ID of the target.
11781 * @lun_id: LUN ID of the scsi device.
7af29d45 11782 * @cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
98912dda
JS
11783 *
11784 * This function sends an abort command for every SCSI command
11785 * associated with the given virtual port pending on the ring
11786 * filtered by lpfc_sli_validate_fcp_iocb function.
11787 * When taskmgmt_cmd == LPFC_CTX_LUN, the function sends abort only to the
11788 * FCP iocbs associated with lun specified by tgt_id and lun_id
11789 * parameters
11790 * When taskmgmt_cmd == LPFC_CTX_TGT, the function sends abort only to the
11791 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11792 * When taskmgmt_cmd == LPFC_CTX_HOST, the function sends abort to all
11793 * FCP iocbs associated with virtual port.
11794 * This function returns number of iocbs it aborted .
11795 * This function is called with no locks held right after a taskmgmt
11796 * command is sent.
11797 **/
11798int
11799lpfc_sli_abort_taskmgmt(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11800 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd cmd)
11801{
11802 struct lpfc_hba *phba = vport->phba;
c490850a 11803 struct lpfc_io_buf *lpfc_cmd;
98912dda 11804 struct lpfc_iocbq *abtsiocbq;
8c50d25c 11805 struct lpfc_nodelist *ndlp;
98912dda
JS
11806 struct lpfc_iocbq *iocbq;
11807 IOCB_t *icmd;
11808 int sum, i, ret_val;
11809 unsigned long iflags;
c2017260 11810 struct lpfc_sli_ring *pring_s4 = NULL;
98912dda 11811
59c68eaa 11812 spin_lock_irqsave(&phba->hbalock, iflags);
98912dda
JS
11813
11814 /* all I/Os are in process of being flushed */
c00f62e6 11815 if (phba->hba_flag & HBA_IOQ_FLUSH) {
59c68eaa 11816 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11817 return 0;
11818 }
11819 sum = 0;
11820
11821 for (i = 1; i <= phba->sli.last_iotag; i++) {
11822 iocbq = phba->sli.iocbq_lookup[i];
11823
11824 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
11825 cmd) != 0)
11826 continue;
11827
c2017260
JS
11828 /* Guard against IO completion being called at same time */
11829 lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq);
11830 spin_lock(&lpfc_cmd->buf_lock);
11831
11832 if (!lpfc_cmd->pCmd) {
11833 spin_unlock(&lpfc_cmd->buf_lock);
11834 continue;
11835 }
11836
11837 if (phba->sli_rev == LPFC_SLI_REV4) {
11838 pring_s4 =
c00f62e6 11839 phba->sli4_hba.hdwq[iocbq->hba_wqidx].io_wq->pring;
c2017260
JS
11840 if (!pring_s4) {
11841 spin_unlock(&lpfc_cmd->buf_lock);
11842 continue;
11843 }
11844 /* Note: both hbalock and ring_lock must be set here */
11845 spin_lock(&pring_s4->ring_lock);
11846 }
11847
98912dda
JS
11848 /*
11849 * If the iocbq is already being aborted, don't take a second
11850 * action, but do count it.
11851 */
c2017260
JS
11852 if ((iocbq->iocb_flag & LPFC_DRIVER_ABORTED) ||
11853 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ)) {
11854 if (phba->sli_rev == LPFC_SLI_REV4)
11855 spin_unlock(&pring_s4->ring_lock);
11856 spin_unlock(&lpfc_cmd->buf_lock);
98912dda 11857 continue;
c2017260 11858 }
98912dda
JS
11859
11860 /* issue ABTS for this IOCB based on iotag */
11861 abtsiocbq = __lpfc_sli_get_iocbq(phba);
c2017260
JS
11862 if (!abtsiocbq) {
11863 if (phba->sli_rev == LPFC_SLI_REV4)
11864 spin_unlock(&pring_s4->ring_lock);
11865 spin_unlock(&lpfc_cmd->buf_lock);
98912dda 11866 continue;
c2017260 11867 }
98912dda
JS
11868
11869 icmd = &iocbq->iocb;
11870 abtsiocbq->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11871 abtsiocbq->iocb.un.acxri.abortContextTag = icmd->ulpContext;
11872 if (phba->sli_rev == LPFC_SLI_REV4)
11873 abtsiocbq->iocb.un.acxri.abortIoTag =
11874 iocbq->sli4_xritag;
11875 else
11876 abtsiocbq->iocb.un.acxri.abortIoTag = icmd->ulpIoTag;
11877 abtsiocbq->iocb.ulpLe = 1;
11878 abtsiocbq->iocb.ulpClass = icmd->ulpClass;
11879 abtsiocbq->vport = vport;
11880
11881 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11882 abtsiocbq->hba_wqidx = iocbq->hba_wqidx;
98912dda
JS
11883 if (iocbq->iocb_flag & LPFC_IO_FCP)
11884 abtsiocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11885 if (iocbq->iocb_flag & LPFC_IO_FOF)
11886 abtsiocbq->iocb_flag |= LPFC_IO_FOF;
98912dda 11887
8c50d25c
JS
11888 ndlp = lpfc_cmd->rdata->pnode;
11889
11890 if (lpfc_is_link_up(phba) &&
11891 (ndlp && ndlp->nlp_state == NLP_STE_MAPPED_NODE))
98912dda
JS
11892 abtsiocbq->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11893 else
11894 abtsiocbq->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11895
11896 /* Setup callback routine and issue the command. */
11897 abtsiocbq->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
11898
11899 /*
11900 * Indicate the IO is being aborted by the driver and set
11901 * the caller's flag into the aborted IO.
11902 */
11903 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11904
11905 if (phba->sli_rev == LPFC_SLI_REV4) {
98912dda
JS
11906 ret_val = __lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11907 abtsiocbq, 0);
59c68eaa 11908 spin_unlock(&pring_s4->ring_lock);
98912dda
JS
11909 } else {
11910 ret_val = __lpfc_sli_issue_iocb(phba, pring->ringno,
11911 abtsiocbq, 0);
11912 }
11913
c2017260 11914 spin_unlock(&lpfc_cmd->buf_lock);
98912dda
JS
11915
11916 if (ret_val == IOCB_ERROR)
11917 __lpfc_sli_release_iocbq(phba, abtsiocbq);
11918 else
11919 sum++;
11920 }
59c68eaa 11921 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11922 return sum;
11923}
11924
e59058c4 11925/**
3621a710 11926 * lpfc_sli_wake_iocb_wait - lpfc_sli_issue_iocb_wait's completion handler
e59058c4
JS
11927 * @phba: Pointer to HBA context object.
11928 * @cmdiocbq: Pointer to command iocb.
11929 * @rspiocbq: Pointer to response iocb.
11930 *
11931 * This function is the completion handler for iocbs issued using
11932 * lpfc_sli_issue_iocb_wait function. This function is called by the
11933 * ring event handler function without any lock held. This function
11934 * can be called from both worker thread context and interrupt
11935 * context. This function also can be called from other thread which
11936 * cleans up the SLI layer objects.
11937 * This function copy the contents of the response iocb to the
11938 * response iocb memory object provided by the caller of
11939 * lpfc_sli_issue_iocb_wait and then wakes up the thread which
11940 * sleeps for the iocb completion.
11941 **/
68876920
JSEC
11942static void
11943lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
11944 struct lpfc_iocbq *cmdiocbq,
11945 struct lpfc_iocbq *rspiocbq)
dea3101e 11946{
68876920
JSEC
11947 wait_queue_head_t *pdone_q;
11948 unsigned long iflags;
c490850a 11949 struct lpfc_io_buf *lpfc_cmd;
dea3101e 11950
2e0fef85 11951 spin_lock_irqsave(&phba->hbalock, iflags);
5a0916b4
JS
11952 if (cmdiocbq->iocb_flag & LPFC_IO_WAKE_TMO) {
11953
11954 /*
11955 * A time out has occurred for the iocb. If a time out
11956 * completion handler has been supplied, call it. Otherwise,
11957 * just free the iocbq.
11958 */
11959
11960 spin_unlock_irqrestore(&phba->hbalock, iflags);
11961 cmdiocbq->iocb_cmpl = cmdiocbq->wait_iocb_cmpl;
11962 cmdiocbq->wait_iocb_cmpl = NULL;
11963 if (cmdiocbq->iocb_cmpl)
11964 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, NULL);
11965 else
11966 lpfc_sli_release_iocbq(phba, cmdiocbq);
11967 return;
11968 }
11969
68876920
JSEC
11970 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
11971 if (cmdiocbq->context2 && rspiocbq)
11972 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
11973 &rspiocbq->iocb, sizeof(IOCB_t));
11974
0f65ff68
JS
11975 /* Set the exchange busy flag for task management commands */
11976 if ((cmdiocbq->iocb_flag & LPFC_IO_FCP) &&
11977 !(cmdiocbq->iocb_flag & LPFC_IO_LIBDFC)) {
c490850a 11978 lpfc_cmd = container_of(cmdiocbq, struct lpfc_io_buf,
0f65ff68 11979 cur_iocbq);
324e1c40
JS
11980 if (rspiocbq && (rspiocbq->iocb_flag & LPFC_EXCHANGE_BUSY))
11981 lpfc_cmd->flags |= LPFC_SBUF_XBUSY;
11982 else
11983 lpfc_cmd->flags &= ~LPFC_SBUF_XBUSY;
0f65ff68
JS
11984 }
11985
68876920 11986 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC
11987 if (pdone_q)
11988 wake_up(pdone_q);
858c9f6c 11989 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB
11990 return;
11991}
11992
d11e31dd
JS
11993/**
11994 * lpfc_chk_iocb_flg - Test IOCB flag with lock held.
11995 * @phba: Pointer to HBA context object..
11996 * @piocbq: Pointer to command iocb.
11997 * @flag: Flag to test.
11998 *
11999 * This routine grabs the hbalock and then test the iocb_flag to
12000 * see if the passed in flag is set.
12001 * Returns:
12002 * 1 if flag is set.
12003 * 0 if flag is not set.
12004 **/
12005static int
12006lpfc_chk_iocb_flg(struct lpfc_hba *phba,
12007 struct lpfc_iocbq *piocbq, uint32_t flag)
12008{
12009 unsigned long iflags;
12010 int ret;
12011
12012 spin_lock_irqsave(&phba->hbalock, iflags);
12013 ret = piocbq->iocb_flag & flag;
12014 spin_unlock_irqrestore(&phba->hbalock, iflags);
12015 return ret;
12016
12017}
12018
e59058c4 12019/**
3621a710 12020 * lpfc_sli_issue_iocb_wait - Synchronous function to issue iocb commands
e59058c4 12021 * @phba: Pointer to HBA context object..
7af29d45 12022 * @ring_number: Ring number
e59058c4
JS
12023 * @piocb: Pointer to command iocb.
12024 * @prspiocbq: Pointer to response iocb.
12025 * @timeout: Timeout in number of seconds.
12026 *
12027 * This function issues the iocb to firmware and waits for the
5a0916b4
JS
12028 * iocb to complete. The iocb_cmpl field of the shall be used
12029 * to handle iocbs which time out. If the field is NULL, the
12030 * function shall free the iocbq structure. If more clean up is
12031 * needed, the caller is expected to provide a completion function
12032 * that will provide the needed clean up. If the iocb command is
12033 * not completed within timeout seconds, the function will either
12034 * free the iocbq structure (if iocb_cmpl == NULL) or execute the
12035 * completion function set in the iocb_cmpl field and then return
12036 * a status of IOCB_TIMEDOUT. The caller should not free the iocb
12037 * resources if this function returns IOCB_TIMEDOUT.
e59058c4
JS
12038 * The function waits for the iocb completion using an
12039 * non-interruptible wait.
12040 * This function will sleep while waiting for iocb completion.
12041 * So, this function should not be called from any context which
12042 * does not allow sleeping. Due to the same reason, this function
12043 * cannot be called with interrupt disabled.
12044 * This function assumes that the iocb completions occur while
12045 * this function sleep. So, this function cannot be called from
12046 * the thread which process iocb completion for this ring.
12047 * This function clears the iocb_flag of the iocb object before
12048 * issuing the iocb and the iocb completion handler sets this
12049 * flag and wakes this thread when the iocb completes.
12050 * The contents of the response iocb will be copied to prspiocbq
12051 * by the completion handler when the command completes.
12052 * This function returns IOCB_SUCCESS when success.
12053 * This function is called with no lock held.
12054 **/
dea3101e 12055int
2e0fef85 12056lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
da0436e9 12057 uint32_t ring_number,
2e0fef85
JS
12058 struct lpfc_iocbq *piocb,
12059 struct lpfc_iocbq *prspiocbq,
68876920 12060 uint32_t timeout)
dea3101e 12061{
7259f0d0 12062 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC
12063 long timeleft, timeout_req = 0;
12064 int retval = IOCB_SUCCESS;
875fbdfe 12065 uint32_t creg_val;
0e9bb8d7
JS
12066 struct lpfc_iocbq *iocb;
12067 int txq_cnt = 0;
12068 int txcmplq_cnt = 0;
895427bd 12069 struct lpfc_sli_ring *pring;
5a0916b4
JS
12070 unsigned long iflags;
12071 bool iocb_completed = true;
12072
895427bd
JS
12073 if (phba->sli_rev >= LPFC_SLI_REV4)
12074 pring = lpfc_sli4_calc_ring(phba, piocb);
12075 else
12076 pring = &phba->sli.sli3_ring[ring_number];
dea3101e 12077 /*
68876920
JSEC
12078 * If the caller has provided a response iocbq buffer, then context2
12079 * is NULL or its an error.
dea3101e 12080 */
68876920
JSEC
12081 if (prspiocbq) {
12082 if (piocb->context2)
12083 return IOCB_ERROR;
12084 piocb->context2 = prspiocbq;
dea3101e
JB
12085 }
12086
5a0916b4 12087 piocb->wait_iocb_cmpl = piocb->iocb_cmpl;
68876920
JSEC
12088 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
12089 piocb->context_un.wait_queue = &done_q;
5a0916b4 12090 piocb->iocb_flag &= ~(LPFC_IO_WAKE | LPFC_IO_WAKE_TMO);
dea3101e 12091
875fbdfe 12092 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
12093 if (lpfc_readl(phba->HCregaddr, &creg_val))
12094 return IOCB_ERROR;
875fbdfe
JSEC
12095 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
12096 writel(creg_val, phba->HCregaddr);
12097 readl(phba->HCregaddr); /* flush */
12098 }
12099
2a9bf3d0
JS
12100 retval = lpfc_sli_issue_iocb(phba, ring_number, piocb,
12101 SLI_IOCB_RET_IOCB);
68876920 12102 if (retval == IOCB_SUCCESS) {
256ec0d0 12103 timeout_req = msecs_to_jiffies(timeout * 1000);
68876920 12104 timeleft = wait_event_timeout(done_q,
d11e31dd 12105 lpfc_chk_iocb_flg(phba, piocb, LPFC_IO_WAKE),
68876920 12106 timeout_req);
5a0916b4
JS
12107 spin_lock_irqsave(&phba->hbalock, iflags);
12108 if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
12109
12110 /*
12111 * IOCB timed out. Inform the wake iocb wait
12112 * completion function and set local status
12113 */
dea3101e 12114
5a0916b4
JS
12115 iocb_completed = false;
12116 piocb->iocb_flag |= LPFC_IO_WAKE_TMO;
12117 }
12118 spin_unlock_irqrestore(&phba->hbalock, iflags);
12119 if (iocb_completed) {
7054a606 12120 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 12121 "0331 IOCB wake signaled\n");
53151bbb
JS
12122 /* Note: we are not indicating if the IOCB has a success
12123 * status or not - that's for the caller to check.
12124 * IOCB_SUCCESS means just that the command was sent and
12125 * completed. Not that it completed successfully.
12126 * */
7054a606 12127 } else if (timeleft == 0) {
372c187b 12128 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011
JS
12129 "0338 IOCB wait timeout error - no "
12130 "wake response Data x%x\n", timeout);
68876920 12131 retval = IOCB_TIMEDOUT;
7054a606 12132 } else {
372c187b 12133 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011
JS
12134 "0330 IOCB wake NOT set, "
12135 "Data x%x x%lx\n",
68876920
JSEC
12136 timeout, (timeleft / jiffies));
12137 retval = IOCB_TIMEDOUT;
dea3101e 12138 }
2a9bf3d0 12139 } else if (retval == IOCB_BUSY) {
0e9bb8d7
JS
12140 if (phba->cfg_log_verbose & LOG_SLI) {
12141 list_for_each_entry(iocb, &pring->txq, list) {
12142 txq_cnt++;
12143 }
12144 list_for_each_entry(iocb, &pring->txcmplq, list) {
12145 txcmplq_cnt++;
12146 }
12147 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
12148 "2818 Max IOCBs %d txq cnt %d txcmplq cnt %d\n",
12149 phba->iocb_cnt, txq_cnt, txcmplq_cnt);
12150 }
2a9bf3d0 12151 return retval;
68876920
JSEC
12152 } else {
12153 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
d7c255b2 12154 "0332 IOCB wait issue failed, Data x%x\n",
e8b62011 12155 retval);
68876920 12156 retval = IOCB_ERROR;
dea3101e
JB
12157 }
12158
875fbdfe 12159 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
12160 if (lpfc_readl(phba->HCregaddr, &creg_val))
12161 return IOCB_ERROR;
875fbdfe
JSEC
12162 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
12163 writel(creg_val, phba->HCregaddr);
12164 readl(phba->HCregaddr); /* flush */
12165 }
12166
68876920
JSEC
12167 if (prspiocbq)
12168 piocb->context2 = NULL;
12169
12170 piocb->context_un.wait_queue = NULL;
12171 piocb->iocb_cmpl = NULL;
dea3101e
JB
12172 return retval;
12173}
68876920 12174
e59058c4 12175/**
3621a710 12176 * lpfc_sli_issue_mbox_wait - Synchronous function to issue mailbox
e59058c4
JS
12177 * @phba: Pointer to HBA context object.
12178 * @pmboxq: Pointer to driver mailbox object.
12179 * @timeout: Timeout in number of seconds.
12180 *
12181 * This function issues the mailbox to firmware and waits for the
12182 * mailbox command to complete. If the mailbox command is not
12183 * completed within timeout seconds, it returns MBX_TIMEOUT.
12184 * The function waits for the mailbox completion using an
12185 * interruptible wait. If the thread is woken up due to a
12186 * signal, MBX_TIMEOUT error is returned to the caller. Caller
12187 * should not free the mailbox resources, if this function returns
12188 * MBX_TIMEOUT.
12189 * This function will sleep while waiting for mailbox completion.
12190 * So, this function should not be called from any context which
12191 * does not allow sleeping. Due to the same reason, this function
12192 * cannot be called with interrupt disabled.
12193 * This function assumes that the mailbox completion occurs while
12194 * this function sleep. So, this function cannot be called from
12195 * the worker thread which processes mailbox completion.
12196 * This function is called in the context of HBA management
12197 * applications.
12198 * This function returns MBX_SUCCESS when successful.
12199 * This function is called with no lock held.
12200 **/
dea3101e 12201int
2e0fef85 12202lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB
12203 uint32_t timeout)
12204{
e29d74f8 12205 struct completion mbox_done;
dea3101e 12206 int retval;
858c9f6c 12207 unsigned long flag;
dea3101e 12208
495a714c 12209 pmboxq->mbox_flag &= ~LPFC_MBX_WAKE;
dea3101e
JB
12210 /* setup wake call as IOCB callback */
12211 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
dea3101e 12212
e29d74f8
JS
12213 /* setup context3 field to pass wait_queue pointer to wake function */
12214 init_completion(&mbox_done);
12215 pmboxq->context3 = &mbox_done;
dea3101e
JB
12216 /* now issue the command */
12217 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
dea3101e 12218 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
e29d74f8
JS
12219 wait_for_completion_timeout(&mbox_done,
12220 msecs_to_jiffies(timeout * 1000));
7054a606 12221
858c9f6c 12222 spin_lock_irqsave(&phba->hbalock, flag);
e29d74f8 12223 pmboxq->context3 = NULL;
7054a606
JS
12224 /*
12225 * if LPFC_MBX_WAKE flag is set the mailbox is completed
12226 * else do not free the resources.
12227 */
d7c47992 12228 if (pmboxq->mbox_flag & LPFC_MBX_WAKE) {
dea3101e 12229 retval = MBX_SUCCESS;
d7c47992 12230 } else {
7054a606 12231 retval = MBX_TIMEOUT;
858c9f6c
JS
12232 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
12233 }
12234 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e 12235 }
dea3101e
JB
12236 return retval;
12237}
12238
e59058c4 12239/**
3772a991 12240 * lpfc_sli_mbox_sys_shutdown - shutdown mailbox command sub-system
e59058c4 12241 * @phba: Pointer to HBA context.
7af29d45 12242 * @mbx_action: Mailbox shutdown options.
e59058c4 12243 *
3772a991
JS
12244 * This function is called to shutdown the driver's mailbox sub-system.
12245 * It first marks the mailbox sub-system is in a block state to prevent
12246 * the asynchronous mailbox command from issued off the pending mailbox
12247 * command queue. If the mailbox command sub-system shutdown is due to
12248 * HBA error conditions such as EEH or ERATT, this routine shall invoke
12249 * the mailbox sub-system flush routine to forcefully bring down the
12250 * mailbox sub-system. Otherwise, if it is due to normal condition (such
12251 * as with offline or HBA function reset), this routine will wait for the
12252 * outstanding mailbox command to complete before invoking the mailbox
12253 * sub-system flush routine to gracefully bring down mailbox sub-system.
e59058c4 12254 **/
3772a991 12255void
618a5230 12256lpfc_sli_mbox_sys_shutdown(struct lpfc_hba *phba, int mbx_action)
b4c02652 12257{
3772a991 12258 struct lpfc_sli *psli = &phba->sli;
3772a991 12259 unsigned long timeout;
b4c02652 12260
618a5230
JS
12261 if (mbx_action == LPFC_MBX_NO_WAIT) {
12262 /* delay 100ms for port state */
12263 msleep(100);
12264 lpfc_sli_mbox_sys_flush(phba);
12265 return;
12266 }
a183a15f 12267 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
d7069f09 12268
523128e5
JS
12269 /* Disable softirqs, including timers from obtaining phba->hbalock */
12270 local_bh_disable();
12271
3772a991
JS
12272 spin_lock_irq(&phba->hbalock);
12273 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
b4c02652 12274
3772a991 12275 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
3772a991
JS
12276 /* Determine how long we might wait for the active mailbox
12277 * command to be gracefully completed by firmware.
12278 */
a183a15f
JS
12279 if (phba->sli.mbox_active)
12280 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
12281 phba->sli.mbox_active) *
12282 1000) + jiffies;
12283 spin_unlock_irq(&phba->hbalock);
12284
523128e5
JS
12285 /* Enable softirqs again, done with phba->hbalock */
12286 local_bh_enable();
12287
3772a991
JS
12288 while (phba->sli.mbox_active) {
12289 /* Check active mailbox complete status every 2ms */
12290 msleep(2);
12291 if (time_after(jiffies, timeout))
12292 /* Timeout, let the mailbox flush routine to
12293 * forcefully release active mailbox command
12294 */
12295 break;
12296 }
523128e5 12297 } else {
d7069f09
JS
12298 spin_unlock_irq(&phba->hbalock);
12299
523128e5
JS
12300 /* Enable softirqs again, done with phba->hbalock */
12301 local_bh_enable();
12302 }
12303
3772a991
JS
12304 lpfc_sli_mbox_sys_flush(phba);
12305}
ed957684 12306
3772a991
JS
12307/**
12308 * lpfc_sli_eratt_read - read sli-3 error attention events
12309 * @phba: Pointer to HBA context.
12310 *
12311 * This function is called to read the SLI3 device error attention registers
12312 * for possible error attention events. The caller must hold the hostlock
12313 * with spin_lock_irq().
12314 *
25985edc 12315 * This function returns 1 when there is Error Attention in the Host Attention
3772a991
JS
12316 * Register and returns 0 otherwise.
12317 **/
12318static int
12319lpfc_sli_eratt_read(struct lpfc_hba *phba)
12320{
12321 uint32_t ha_copy;
b4c02652 12322
3772a991 12323 /* Read chip Host Attention (HA) register */
9940b97b
JS
12324 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12325 goto unplug_err;
12326
3772a991
JS
12327 if (ha_copy & HA_ERATT) {
12328 /* Read host status register to retrieve error event */
9940b97b
JS
12329 if (lpfc_sli_read_hs(phba))
12330 goto unplug_err;
b4c02652 12331
3772a991
JS
12332 /* Check if there is a deferred error condition is active */
12333 if ((HS_FFER1 & phba->work_hs) &&
12334 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0 12335 HS_FFER6 | HS_FFER7 | HS_FFER8) & phba->work_hs)) {
3772a991 12336 phba->hba_flag |= DEFER_ERATT;
3772a991
JS
12337 /* Clear all interrupt enable conditions */
12338 writel(0, phba->HCregaddr);
12339 readl(phba->HCregaddr);
12340 }
12341
12342 /* Set the driver HA work bitmap */
3772a991
JS
12343 phba->work_ha |= HA_ERATT;
12344 /* Indicate polling handles this ERATT */
12345 phba->hba_flag |= HBA_ERATT_HANDLED;
3772a991
JS
12346 return 1;
12347 }
12348 return 0;
9940b97b
JS
12349
12350unplug_err:
12351 /* Set the driver HS work bitmap */
12352 phba->work_hs |= UNPLUG_ERR;
12353 /* Set the driver HA work bitmap */
12354 phba->work_ha |= HA_ERATT;
12355 /* Indicate polling handles this ERATT */
12356 phba->hba_flag |= HBA_ERATT_HANDLED;
12357 return 1;
b4c02652
JS
12358}
12359
da0436e9
JS
12360/**
12361 * lpfc_sli4_eratt_read - read sli-4 error attention events
12362 * @phba: Pointer to HBA context.
12363 *
12364 * This function is called to read the SLI4 device error attention registers
12365 * for possible error attention events. The caller must hold the hostlock
12366 * with spin_lock_irq().
12367 *
25985edc 12368 * This function returns 1 when there is Error Attention in the Host Attention
da0436e9
JS
12369 * Register and returns 0 otherwise.
12370 **/
12371static int
12372lpfc_sli4_eratt_read(struct lpfc_hba *phba)
12373{
12374 uint32_t uerr_sta_hi, uerr_sta_lo;
2fcee4bf
JS
12375 uint32_t if_type, portsmphr;
12376 struct lpfc_register portstat_reg;
da0436e9 12377
2fcee4bf
JS
12378 /*
12379 * For now, use the SLI4 device internal unrecoverable error
da0436e9
JS
12380 * registers for error attention. This can be changed later.
12381 */
2fcee4bf
JS
12382 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12383 switch (if_type) {
12384 case LPFC_SLI_INTF_IF_TYPE_0:
9940b97b
JS
12385 if (lpfc_readl(phba->sli4_hba.u.if_type0.UERRLOregaddr,
12386 &uerr_sta_lo) ||
12387 lpfc_readl(phba->sli4_hba.u.if_type0.UERRHIregaddr,
12388 &uerr_sta_hi)) {
12389 phba->work_hs |= UNPLUG_ERR;
12390 phba->work_ha |= HA_ERATT;
12391 phba->hba_flag |= HBA_ERATT_HANDLED;
12392 return 1;
12393 }
2fcee4bf
JS
12394 if ((~phba->sli4_hba.ue_mask_lo & uerr_sta_lo) ||
12395 (~phba->sli4_hba.ue_mask_hi & uerr_sta_hi)) {
372c187b 12396 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2fcee4bf
JS
12397 "1423 HBA Unrecoverable error: "
12398 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, "
12399 "ue_mask_lo_reg=0x%x, "
12400 "ue_mask_hi_reg=0x%x\n",
12401 uerr_sta_lo, uerr_sta_hi,
12402 phba->sli4_hba.ue_mask_lo,
12403 phba->sli4_hba.ue_mask_hi);
12404 phba->work_status[0] = uerr_sta_lo;
12405 phba->work_status[1] = uerr_sta_hi;
12406 phba->work_ha |= HA_ERATT;
12407 phba->hba_flag |= HBA_ERATT_HANDLED;
12408 return 1;
12409 }
12410 break;
12411 case LPFC_SLI_INTF_IF_TYPE_2:
27d6ac0a 12412 case LPFC_SLI_INTF_IF_TYPE_6:
9940b97b
JS
12413 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
12414 &portstat_reg.word0) ||
12415 lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
12416 &portsmphr)){
12417 phba->work_hs |= UNPLUG_ERR;
12418 phba->work_ha |= HA_ERATT;
12419 phba->hba_flag |= HBA_ERATT_HANDLED;
12420 return 1;
12421 }
2fcee4bf
JS
12422 if (bf_get(lpfc_sliport_status_err, &portstat_reg)) {
12423 phba->work_status[0] =
12424 readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
12425 phba->work_status[1] =
12426 readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
372c187b 12427 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2e90f4b5 12428 "2885 Port Status Event: "
2fcee4bf
JS
12429 "port status reg 0x%x, "
12430 "port smphr reg 0x%x, "
12431 "error 1=0x%x, error 2=0x%x\n",
12432 portstat_reg.word0,
12433 portsmphr,
12434 phba->work_status[0],
12435 phba->work_status[1]);
12436 phba->work_ha |= HA_ERATT;
12437 phba->hba_flag |= HBA_ERATT_HANDLED;
12438 return 1;
12439 }
12440 break;
12441 case LPFC_SLI_INTF_IF_TYPE_1:
12442 default:
372c187b 12443 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2fcee4bf
JS
12444 "2886 HBA Error Attention on unsupported "
12445 "if type %d.", if_type);
a747c9ce 12446 return 1;
da0436e9 12447 }
2fcee4bf 12448
da0436e9
JS
12449 return 0;
12450}
12451
e59058c4 12452/**
3621a710 12453 * lpfc_sli_check_eratt - check error attention events
9399627f
JS
12454 * @phba: Pointer to HBA context.
12455 *
3772a991 12456 * This function is called from timer soft interrupt context to check HBA's
9399627f
JS
12457 * error attention register bit for error attention events.
12458 *
25985edc 12459 * This function returns 1 when there is Error Attention in the Host Attention
9399627f
JS
12460 * Register and returns 0 otherwise.
12461 **/
12462int
12463lpfc_sli_check_eratt(struct lpfc_hba *phba)
12464{
12465 uint32_t ha_copy;
12466
12467 /* If somebody is waiting to handle an eratt, don't process it
12468 * here. The brdkill function will do this.
12469 */
12470 if (phba->link_flag & LS_IGNORE_ERATT)
12471 return 0;
12472
12473 /* Check if interrupt handler handles this ERATT */
12474 spin_lock_irq(&phba->hbalock);
12475 if (phba->hba_flag & HBA_ERATT_HANDLED) {
12476 /* Interrupt handler has handled ERATT */
12477 spin_unlock_irq(&phba->hbalock);
12478 return 0;
12479 }
12480
a257bf90
JS
12481 /*
12482 * If there is deferred error attention, do not check for error
12483 * attention
12484 */
12485 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
12486 spin_unlock_irq(&phba->hbalock);
12487 return 0;
12488 }
12489
3772a991
JS
12490 /* If PCI channel is offline, don't process it */
12491 if (unlikely(pci_channel_offline(phba->pcidev))) {
9399627f 12492 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12493 return 0;
12494 }
12495
12496 switch (phba->sli_rev) {
12497 case LPFC_SLI_REV2:
12498 case LPFC_SLI_REV3:
12499 /* Read chip Host Attention (HA) register */
12500 ha_copy = lpfc_sli_eratt_read(phba);
12501 break;
da0436e9 12502 case LPFC_SLI_REV4:
2fcee4bf 12503 /* Read device Uncoverable Error (UERR) registers */
da0436e9
JS
12504 ha_copy = lpfc_sli4_eratt_read(phba);
12505 break;
3772a991 12506 default:
372c187b 12507 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3772a991
JS
12508 "0299 Invalid SLI revision (%d)\n",
12509 phba->sli_rev);
12510 ha_copy = 0;
12511 break;
9399627f
JS
12512 }
12513 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12514
12515 return ha_copy;
12516}
12517
12518/**
12519 * lpfc_intr_state_check - Check device state for interrupt handling
12520 * @phba: Pointer to HBA context.
12521 *
12522 * This inline routine checks whether a device or its PCI slot is in a state
12523 * that the interrupt should be handled.
12524 *
12525 * This function returns 0 if the device or the PCI slot is in a state that
12526 * interrupt should be handled, otherwise -EIO.
12527 */
12528static inline int
12529lpfc_intr_state_check(struct lpfc_hba *phba)
12530{
12531 /* If the pci channel is offline, ignore all the interrupts */
12532 if (unlikely(pci_channel_offline(phba->pcidev)))
12533 return -EIO;
12534
12535 /* Update device level interrupt statistics */
12536 phba->sli.slistat.sli_intr++;
12537
12538 /* Ignore all interrupts during initialization. */
12539 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
12540 return -EIO;
12541
9399627f
JS
12542 return 0;
12543}
12544
12545/**
3772a991 12546 * lpfc_sli_sp_intr_handler - Slow-path interrupt handler to SLI-3 device
e59058c4
JS
12547 * @irq: Interrupt number.
12548 * @dev_id: The device context pointer.
12549 *
9399627f 12550 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12551 * service routine when device with SLI-3 interface spec is enabled with
12552 * MSI-X multi-message interrupt mode and there are slow-path events in
12553 * the HBA. However, when the device is enabled with either MSI or Pin-IRQ
12554 * interrupt mode, this function is called as part of the device-level
12555 * interrupt handler. When the PCI slot is in error recovery or the HBA
12556 * is undergoing initialization, the interrupt handler will not process
12557 * the interrupt. The link attention and ELS ring attention events are
12558 * handled by the worker thread. The interrupt handler signals the worker
12559 * thread and returns for these events. This function is called without
12560 * any lock held. It gets the hbalock to access and update SLI data
9399627f
JS
12561 * structures.
12562 *
12563 * This function returns IRQ_HANDLED when interrupt is handled else it
12564 * returns IRQ_NONE.
e59058c4 12565 **/
dea3101e 12566irqreturn_t
3772a991 12567lpfc_sli_sp_intr_handler(int irq, void *dev_id)
dea3101e 12568{
2e0fef85 12569 struct lpfc_hba *phba;
a747c9ce 12570 uint32_t ha_copy, hc_copy;
dea3101e
JB
12571 uint32_t work_ha_copy;
12572 unsigned long status;
5b75da2f 12573 unsigned long iflag;
dea3101e
JB
12574 uint32_t control;
12575
92d7f7b0 12576 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS
12577 struct lpfc_vport *vport;
12578 struct lpfc_nodelist *ndlp;
12579 struct lpfc_dmabuf *mp;
92d7f7b0
JS
12580 LPFC_MBOXQ_t *pmb;
12581 int rc;
12582
dea3101e
JB
12583 /*
12584 * Get the driver's phba structure from the dev_id and
12585 * assume the HBA is not interrupting.
12586 */
9399627f 12587 phba = (struct lpfc_hba *)dev_id;
dea3101e
JB
12588
12589 if (unlikely(!phba))
12590 return IRQ_NONE;
12591
dea3101e 12592 /*
9399627f
JS
12593 * Stuff needs to be attented to when this function is invoked as an
12594 * individual interrupt handler in MSI-X multi-message interrupt mode
dea3101e 12595 */
9399627f 12596 if (phba->intr_type == MSIX) {
3772a991
JS
12597 /* Check device state for handling interrupt */
12598 if (lpfc_intr_state_check(phba))
9399627f
JS
12599 return IRQ_NONE;
12600 /* Need to read HA REG for slow-path events */
5b75da2f 12601 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12602 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12603 goto unplug_error;
9399627f
JS
12604 /* If somebody is waiting to handle an eratt don't process it
12605 * here. The brdkill function will do this.
12606 */
12607 if (phba->link_flag & LS_IGNORE_ERATT)
12608 ha_copy &= ~HA_ERATT;
12609 /* Check the need for handling ERATT in interrupt handler */
12610 if (ha_copy & HA_ERATT) {
12611 if (phba->hba_flag & HBA_ERATT_HANDLED)
12612 /* ERATT polling has handled ERATT */
12613 ha_copy &= ~HA_ERATT;
12614 else
12615 /* Indicate interrupt handler handles ERATT */
12616 phba->hba_flag |= HBA_ERATT_HANDLED;
12617 }
a257bf90
JS
12618
12619 /*
12620 * If there is deferred error attention, do not check for any
12621 * interrupt.
12622 */
12623 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12624 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12625 return IRQ_NONE;
12626 }
12627
9399627f 12628 /* Clear up only attention source related to slow-path */
9940b97b
JS
12629 if (lpfc_readl(phba->HCregaddr, &hc_copy))
12630 goto unplug_error;
12631
a747c9ce
JS
12632 writel(hc_copy & ~(HC_MBINT_ENA | HC_R2INT_ENA |
12633 HC_LAINT_ENA | HC_ERINT_ENA),
12634 phba->HCregaddr);
9399627f
JS
12635 writel((ha_copy & (HA_MBATT | HA_R2_CLR_MSK)),
12636 phba->HAregaddr);
a747c9ce 12637 writel(hc_copy, phba->HCregaddr);
9399627f 12638 readl(phba->HAregaddr); /* flush */
5b75da2f 12639 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12640 } else
12641 ha_copy = phba->ha_copy;
dea3101e 12642
dea3101e
JB
12643 work_ha_copy = ha_copy & phba->work_ha_mask;
12644
9399627f 12645 if (work_ha_copy) {
dea3101e
JB
12646 if (work_ha_copy & HA_LATT) {
12647 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
12648 /*
12649 * Turn off Link Attention interrupts
12650 * until CLEAR_LA done
12651 */
5b75da2f 12652 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12653 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
9940b97b
JS
12654 if (lpfc_readl(phba->HCregaddr, &control))
12655 goto unplug_error;
dea3101e
JB
12656 control &= ~HC_LAINT_ENA;
12657 writel(control, phba->HCregaddr);
12658 readl(phba->HCregaddr); /* flush */
5b75da2f 12659 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12660 }
12661 else
12662 work_ha_copy &= ~HA_LATT;
12663 }
12664
9399627f 12665 if (work_ha_copy & ~(HA_ERATT | HA_MBATT | HA_LATT)) {
858c9f6c
JS
12666 /*
12667 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
12668 * the only slow ring.
12669 */
12670 status = (work_ha_copy &
12671 (HA_RXMASK << (4*LPFC_ELS_RING)));
12672 status >>= (4*LPFC_ELS_RING);
12673 if (status & HA_RXMASK) {
5b75da2f 12674 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12675 if (lpfc_readl(phba->HCregaddr, &control))
12676 goto unplug_error;
a58cbd52
JS
12677
12678 lpfc_debugfs_slow_ring_trc(phba,
12679 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
12680 control, status,
12681 (uint32_t)phba->sli.slistat.sli_intr);
12682
858c9f6c 12683 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS
12684 lpfc_debugfs_slow_ring_trc(phba,
12685 "ISR Disable ring:"
12686 "pwork:x%x hawork:x%x wait:x%x",
12687 phba->work_ha, work_ha_copy,
12688 (uint32_t)((unsigned long)
5e9d9b82 12689 &phba->work_waitq));
a58cbd52 12690
858c9f6c
JS
12691 control &=
12692 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB
12693 writel(control, phba->HCregaddr);
12694 readl(phba->HCregaddr); /* flush */
dea3101e 12695 }
a58cbd52
JS
12696 else {
12697 lpfc_debugfs_slow_ring_trc(phba,
12698 "ISR slow ring: pwork:"
12699 "x%x hawork:x%x wait:x%x",
12700 phba->work_ha, work_ha_copy,
12701 (uint32_t)((unsigned long)
5e9d9b82 12702 &phba->work_waitq));
a58cbd52 12703 }
5b75da2f 12704 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12705 }
12706 }
5b75da2f 12707 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90 12708 if (work_ha_copy & HA_ERATT) {
9940b97b
JS
12709 if (lpfc_sli_read_hs(phba))
12710 goto unplug_error;
a257bf90
JS
12711 /*
12712 * Check if there is a deferred error condition
12713 * is active
12714 */
12715 if ((HS_FFER1 & phba->work_hs) &&
12716 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0
JS
12717 HS_FFER6 | HS_FFER7 | HS_FFER8) &
12718 phba->work_hs)) {
a257bf90
JS
12719 phba->hba_flag |= DEFER_ERATT;
12720 /* Clear all interrupt enable conditions */
12721 writel(0, phba->HCregaddr);
12722 readl(phba->HCregaddr);
12723 }
12724 }
12725
9399627f 12726 if ((work_ha_copy & HA_MBATT) && (phba->sli.mbox_active)) {
92d7f7b0 12727 pmb = phba->sli.mbox_active;
04c68496 12728 pmbox = &pmb->u.mb;
34b02dcd 12729 mbox = phba->mbox;
858c9f6c 12730 vport = pmb->vport;
92d7f7b0
JS
12731
12732 /* First check out the status word */
12733 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
12734 if (pmbox->mbxOwner != OWN_HOST) {
5b75da2f 12735 spin_unlock_irqrestore(&phba->hbalock, iflag);
92d7f7b0
JS
12736 /*
12737 * Stray Mailbox Interrupt, mbxCommand <cmd>
12738 * mbxStatus <status>
12739 */
372c187b 12740 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
e8b62011 12741 "(%d):0304 Stray Mailbox "
92d7f7b0
JS
12742 "Interrupt mbxCommand x%x "
12743 "mbxStatus x%x\n",
e8b62011 12744 (vport ? vport->vpi : 0),
92d7f7b0
JS
12745 pmbox->mbxCommand,
12746 pmbox->mbxStatus);
09372820
JS
12747 /* clear mailbox attention bit */
12748 work_ha_copy &= ~HA_MBATT;
12749 } else {
97eab634 12750 phba->sli.mbox_active = NULL;
5b75da2f 12751 spin_unlock_irqrestore(&phba->hbalock, iflag);
09372820
JS
12752 phba->last_completion_time = jiffies;
12753 del_timer(&phba->sli.mbox_tmo);
09372820
JS
12754 if (pmb->mbox_cmpl) {
12755 lpfc_sli_pcimem_bcopy(mbox, pmbox,
12756 MAILBOX_CMD_SIZE);
7a470277 12757 if (pmb->out_ext_byte_len &&
3e1f0718 12758 pmb->ctx_buf)
7a470277
JS
12759 lpfc_sli_pcimem_bcopy(
12760 phba->mbox_ext,
3e1f0718 12761 pmb->ctx_buf,
7a470277 12762 pmb->out_ext_byte_len);
09372820
JS
12763 }
12764 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
12765 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
12766
12767 lpfc_debugfs_disc_trc(vport,
12768 LPFC_DISC_TRC_MBOX_VPORT,
12769 "MBOX dflt rpi: : "
12770 "status:x%x rpi:x%x",
12771 (uint32_t)pmbox->mbxStatus,
12772 pmbox->un.varWords[0], 0);
12773
12774 if (!pmbox->mbxStatus) {
12775 mp = (struct lpfc_dmabuf *)
3e1f0718 12776 (pmb->ctx_buf);
09372820 12777 ndlp = (struct lpfc_nodelist *)
3e1f0718 12778 pmb->ctx_ndlp;
09372820
JS
12779
12780 /* Reg_LOGIN of dflt RPI was
12781 * successful. new lets get
12782 * rid of the RPI using the
12783 * same mbox buffer.
12784 */
12785 lpfc_unreg_login(phba,
12786 vport->vpi,
12787 pmbox->un.varWords[0],
12788 pmb);
12789 pmb->mbox_cmpl =
12790 lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
12791 pmb->ctx_buf = mp;
12792 pmb->ctx_ndlp = ndlp;
09372820 12793 pmb->vport = vport;
58da1ffb
JS
12794 rc = lpfc_sli_issue_mbox(phba,
12795 pmb,
12796 MBX_NOWAIT);
12797 if (rc != MBX_BUSY)
12798 lpfc_printf_log(phba,
12799 KERN_ERR,
372c187b 12800 LOG_TRACE_EVENT,
d7c255b2 12801 "0350 rc should have"
6a9c52cf 12802 "been MBX_BUSY\n");
3772a991
JS
12803 if (rc != MBX_NOT_FINISHED)
12804 goto send_current_mbox;
09372820 12805 }
858c9f6c 12806 }
5b75da2f
JS
12807 spin_lock_irqsave(
12808 &phba->pport->work_port_lock,
12809 iflag);
09372820
JS
12810 phba->pport->work_port_events &=
12811 ~WORKER_MBOX_TMO;
5b75da2f
JS
12812 spin_unlock_irqrestore(
12813 &phba->pport->work_port_lock,
12814 iflag);
09372820 12815 lpfc_mbox_cmpl_put(phba, pmb);
858c9f6c 12816 }
97eab634 12817 } else
5b75da2f 12818 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f 12819
92d7f7b0
JS
12820 if ((work_ha_copy & HA_MBATT) &&
12821 (phba->sli.mbox_active == NULL)) {
858c9f6c 12822send_current_mbox:
92d7f7b0 12823 /* Process next mailbox command if there is one */
58da1ffb
JS
12824 do {
12825 rc = lpfc_sli_issue_mbox(phba, NULL,
12826 MBX_NOWAIT);
12827 } while (rc == MBX_NOT_FINISHED);
12828 if (rc != MBX_SUCCESS)
372c187b
DK
12829 lpfc_printf_log(phba, KERN_ERR,
12830 LOG_TRACE_EVENT,
12831 "0349 rc should be "
6a9c52cf 12832 "MBX_SUCCESS\n");
92d7f7b0
JS
12833 }
12834
5b75da2f 12835 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12836 phba->work_ha |= work_ha_copy;
5b75da2f 12837 spin_unlock_irqrestore(&phba->hbalock, iflag);
5e9d9b82 12838 lpfc_worker_wake_up(phba);
dea3101e 12839 }
9399627f 12840 return IRQ_HANDLED;
9940b97b
JS
12841unplug_error:
12842 spin_unlock_irqrestore(&phba->hbalock, iflag);
12843 return IRQ_HANDLED;
dea3101e 12844
3772a991 12845} /* lpfc_sli_sp_intr_handler */
9399627f
JS
12846
12847/**
3772a991 12848 * lpfc_sli_fp_intr_handler - Fast-path interrupt handler to SLI-3 device.
9399627f
JS
12849 * @irq: Interrupt number.
12850 * @dev_id: The device context pointer.
12851 *
12852 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12853 * service routine when device with SLI-3 interface spec is enabled with
12854 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
12855 * ring event in the HBA. However, when the device is enabled with either
12856 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
12857 * device-level interrupt handler. When the PCI slot is in error recovery
12858 * or the HBA is undergoing initialization, the interrupt handler will not
12859 * process the interrupt. The SCSI FCP fast-path ring event are handled in
12860 * the intrrupt context. This function is called without any lock held.
12861 * It gets the hbalock to access and update SLI data structures.
9399627f
JS
12862 *
12863 * This function returns IRQ_HANDLED when interrupt is handled else it
12864 * returns IRQ_NONE.
12865 **/
12866irqreturn_t
3772a991 12867lpfc_sli_fp_intr_handler(int irq, void *dev_id)
9399627f
JS
12868{
12869 struct lpfc_hba *phba;
12870 uint32_t ha_copy;
12871 unsigned long status;
5b75da2f 12872 unsigned long iflag;
895427bd 12873 struct lpfc_sli_ring *pring;
9399627f
JS
12874
12875 /* Get the driver's phba structure from the dev_id and
12876 * assume the HBA is not interrupting.
12877 */
12878 phba = (struct lpfc_hba *) dev_id;
12879
12880 if (unlikely(!phba))
12881 return IRQ_NONE;
12882
12883 /*
12884 * Stuff needs to be attented to when this function is invoked as an
12885 * individual interrupt handler in MSI-X multi-message interrupt mode
12886 */
12887 if (phba->intr_type == MSIX) {
3772a991
JS
12888 /* Check device state for handling interrupt */
12889 if (lpfc_intr_state_check(phba))
9399627f
JS
12890 return IRQ_NONE;
12891 /* Need to read HA REG for FCP ring and other ring events */
9940b97b
JS
12892 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12893 return IRQ_HANDLED;
9399627f 12894 /* Clear up only attention source related to fast-path */
5b75da2f 12895 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90
JS
12896 /*
12897 * If there is deferred error attention, do not check for
12898 * any interrupt.
12899 */
12900 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12901 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12902 return IRQ_NONE;
12903 }
9399627f
JS
12904 writel((ha_copy & (HA_R0_CLR_MSK | HA_R1_CLR_MSK)),
12905 phba->HAregaddr);
12906 readl(phba->HAregaddr); /* flush */
5b75da2f 12907 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12908 } else
12909 ha_copy = phba->ha_copy;
dea3101e
JB
12910
12911 /*
9399627f 12912 * Process all events on FCP ring. Take the optimized path for FCP IO.
dea3101e 12913 */
9399627f
JS
12914 ha_copy &= ~(phba->work_ha_mask);
12915
12916 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
dea3101e 12917 status >>= (4*LPFC_FCP_RING);
895427bd 12918 pring = &phba->sli.sli3_ring[LPFC_FCP_RING];
858c9f6c 12919 if (status & HA_RXMASK)
895427bd 12920 lpfc_sli_handle_fast_ring_event(phba, pring, status);
a4bc3379
JS
12921
12922 if (phba->cfg_multi_ring_support == 2) {
12923 /*
9399627f
JS
12924 * Process all events on extra ring. Take the optimized path
12925 * for extra ring IO.
a4bc3379 12926 */
9399627f 12927 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
a4bc3379 12928 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 12929 if (status & HA_RXMASK) {
a4bc3379 12930 lpfc_sli_handle_fast_ring_event(phba,
895427bd 12931 &phba->sli.sli3_ring[LPFC_EXTRA_RING],
a4bc3379
JS
12932 status);
12933 }
12934 }
dea3101e 12935 return IRQ_HANDLED;
3772a991 12936} /* lpfc_sli_fp_intr_handler */
9399627f
JS
12937
12938/**
3772a991 12939 * lpfc_sli_intr_handler - Device-level interrupt handler to SLI-3 device
9399627f
JS
12940 * @irq: Interrupt number.
12941 * @dev_id: The device context pointer.
12942 *
3772a991
JS
12943 * This function is the HBA device-level interrupt handler to device with
12944 * SLI-3 interface spec, called from the PCI layer when either MSI or
12945 * Pin-IRQ interrupt mode is enabled and there is an event in the HBA which
12946 * requires driver attention. This function invokes the slow-path interrupt
12947 * attention handling function and fast-path interrupt attention handling
12948 * function in turn to process the relevant HBA attention events. This
12949 * function is called without any lock held. It gets the hbalock to access
12950 * and update SLI data structures.
9399627f
JS
12951 *
12952 * This function returns IRQ_HANDLED when interrupt is handled, else it
12953 * returns IRQ_NONE.
12954 **/
12955irqreturn_t
3772a991 12956lpfc_sli_intr_handler(int irq, void *dev_id)
9399627f
JS
12957{
12958 struct lpfc_hba *phba;
12959 irqreturn_t sp_irq_rc, fp_irq_rc;
12960 unsigned long status1, status2;
a747c9ce 12961 uint32_t hc_copy;
9399627f
JS
12962
12963 /*
12964 * Get the driver's phba structure from the dev_id and
12965 * assume the HBA is not interrupting.
12966 */
12967 phba = (struct lpfc_hba *) dev_id;
12968
12969 if (unlikely(!phba))
12970 return IRQ_NONE;
12971
3772a991
JS
12972 /* Check device state for handling interrupt */
12973 if (lpfc_intr_state_check(phba))
9399627f
JS
12974 return IRQ_NONE;
12975
12976 spin_lock(&phba->hbalock);
9940b97b
JS
12977 if (lpfc_readl(phba->HAregaddr, &phba->ha_copy)) {
12978 spin_unlock(&phba->hbalock);
12979 return IRQ_HANDLED;
12980 }
12981
9399627f
JS
12982 if (unlikely(!phba->ha_copy)) {
12983 spin_unlock(&phba->hbalock);
12984 return IRQ_NONE;
12985 } else if (phba->ha_copy & HA_ERATT) {
12986 if (phba->hba_flag & HBA_ERATT_HANDLED)
12987 /* ERATT polling has handled ERATT */
12988 phba->ha_copy &= ~HA_ERATT;
12989 else
12990 /* Indicate interrupt handler handles ERATT */
12991 phba->hba_flag |= HBA_ERATT_HANDLED;
12992 }
12993
a257bf90
JS
12994 /*
12995 * If there is deferred error attention, do not check for any interrupt.
12996 */
12997 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
ec21b3b0 12998 spin_unlock(&phba->hbalock);
a257bf90
JS
12999 return IRQ_NONE;
13000 }
13001
9399627f 13002 /* Clear attention sources except link and error attentions */
9940b97b
JS
13003 if (lpfc_readl(phba->HCregaddr, &hc_copy)) {
13004 spin_unlock(&phba->hbalock);
13005 return IRQ_HANDLED;
13006 }
a747c9ce
JS
13007 writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA
13008 | HC_R2INT_ENA | HC_LAINT_ENA | HC_ERINT_ENA),
13009 phba->HCregaddr);
9399627f 13010 writel((phba->ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
a747c9ce 13011 writel(hc_copy, phba->HCregaddr);
9399627f
JS
13012 readl(phba->HAregaddr); /* flush */
13013 spin_unlock(&phba->hbalock);
13014
13015 /*
13016 * Invokes slow-path host attention interrupt handling as appropriate.
13017 */
13018
13019 /* status of events with mailbox and link attention */
13020 status1 = phba->ha_copy & (HA_MBATT | HA_LATT | HA_ERATT);
13021
13022 /* status of events with ELS ring */
13023 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_ELS_RING)));
13024 status2 >>= (4*LPFC_ELS_RING);
13025
13026 if (status1 || (status2 & HA_RXMASK))
3772a991 13027 sp_irq_rc = lpfc_sli_sp_intr_handler(irq, dev_id);
9399627f
JS
13028 else
13029 sp_irq_rc = IRQ_NONE;
13030
13031 /*
13032 * Invoke fast-path host attention interrupt handling as appropriate.
13033 */
13034
13035 /* status of events with FCP ring */
13036 status1 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
13037 status1 >>= (4*LPFC_FCP_RING);
13038
13039 /* status of events with extra ring */
13040 if (phba->cfg_multi_ring_support == 2) {
13041 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
13042 status2 >>= (4*LPFC_EXTRA_RING);
13043 } else
13044 status2 = 0;
13045
13046 if ((status1 & HA_RXMASK) || (status2 & HA_RXMASK))
3772a991 13047 fp_irq_rc = lpfc_sli_fp_intr_handler(irq, dev_id);
9399627f
JS
13048 else
13049 fp_irq_rc = IRQ_NONE;
dea3101e 13050
9399627f
JS
13051 /* Return device-level interrupt handling status */
13052 return (sp_irq_rc == IRQ_HANDLED) ? sp_irq_rc : fp_irq_rc;
3772a991 13053} /* lpfc_sli_intr_handler */
4f774513
JS
13054
13055/**
4f774513 13056 * lpfc_sli4_els_xri_abort_event_proc - Process els xri abort event
4f774513
JS
13057 * @phba: pointer to lpfc hba data structure.
13058 *
13059 * This routine is invoked by the worker thread to process all the pending
4f774513 13060 * SLI4 els abort xri events.
4f774513 13061 **/
4f774513 13062void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *phba)
4f774513
JS
13063{
13064 struct lpfc_cq_event *cq_event;
13065
4f774513 13066 /* First, declare the els xri abort event has been handled */
4f774513 13067 spin_lock_irq(&phba->hbalock);
4f774513 13068 phba->hba_flag &= ~ELS_XRI_ABORT_EVENT;
4f774513 13069 spin_unlock_irq(&phba->hbalock);
4f774513
JS
13070 /* Now, handle all the els xri abort events */
13071 while (!list_empty(&phba->sli4_hba.sp_els_xri_aborted_work_queue)) {
13072 /* Get the first event from the head of the event queue */
13073 spin_lock_irq(&phba->hbalock);
13074 list_remove_head(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
13075 cq_event, struct lpfc_cq_event, list);
13076 spin_unlock_irq(&phba->hbalock);
13077 /* Notify aborted XRI for ELS work queue */
13078 lpfc_sli4_els_xri_aborted(phba, &cq_event->cqe.wcqe_axri);
13079 /* Free the event processed back to the free pool */
13080 lpfc_sli4_cq_event_release(phba, cq_event);
13081 }
13082}
13083
341af102
JS
13084/**
13085 * lpfc_sli4_iocb_param_transfer - Transfer pIocbOut and cmpl status to pIocbIn
13086 * @phba: pointer to lpfc hba data structure
13087 * @pIocbIn: pointer to the rspiocbq
13088 * @pIocbOut: pointer to the cmdiocbq
13089 * @wcqe: pointer to the complete wcqe
13090 *
13091 * This routine transfers the fields of a command iocbq to a response iocbq
13092 * by copying all the IOCB fields from command iocbq and transferring the
13093 * completion status information from the complete wcqe.
13094 **/
4f774513 13095static void
341af102
JS
13096lpfc_sli4_iocb_param_transfer(struct lpfc_hba *phba,
13097 struct lpfc_iocbq *pIocbIn,
4f774513
JS
13098 struct lpfc_iocbq *pIocbOut,
13099 struct lpfc_wcqe_complete *wcqe)
13100{
af22741c 13101 int numBdes, i;
341af102 13102 unsigned long iflags;
af22741c
JS
13103 uint32_t status, max_response;
13104 struct lpfc_dmabuf *dmabuf;
13105 struct ulp_bde64 *bpl, bde;
4f774513
JS
13106 size_t offset = offsetof(struct lpfc_iocbq, iocb);
13107
13108 memcpy((char *)pIocbIn + offset, (char *)pIocbOut + offset,
13109 sizeof(struct lpfc_iocbq) - offset);
4f774513 13110 /* Map WCQE parameters into irspiocb parameters */
acd6859b
JS
13111 status = bf_get(lpfc_wcqe_c_status, wcqe);
13112 pIocbIn->iocb.ulpStatus = (status & LPFC_IOCB_STATUS_MASK);
4f774513
JS
13113 if (pIocbOut->iocb_flag & LPFC_IO_FCP)
13114 if (pIocbIn->iocb.ulpStatus == IOSTAT_FCP_RSP_ERROR)
13115 pIocbIn->iocb.un.fcpi.fcpi_parm =
13116 pIocbOut->iocb.un.fcpi.fcpi_parm -
13117 wcqe->total_data_placed;
13118 else
13119 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
695a814e 13120 else {
4f774513 13121 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
af22741c
JS
13122 switch (pIocbOut->iocb.ulpCommand) {
13123 case CMD_ELS_REQUEST64_CR:
13124 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
13125 bpl = (struct ulp_bde64 *)dmabuf->virt;
13126 bde.tus.w = le32_to_cpu(bpl[1].tus.w);
13127 max_response = bde.tus.f.bdeSize;
13128 break;
13129 case CMD_GEN_REQUEST64_CR:
13130 max_response = 0;
13131 if (!pIocbOut->context3)
13132 break;
13133 numBdes = pIocbOut->iocb.un.genreq64.bdl.bdeSize/
13134 sizeof(struct ulp_bde64);
13135 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
13136 bpl = (struct ulp_bde64 *)dmabuf->virt;
13137 for (i = 0; i < numBdes; i++) {
13138 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
13139 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
13140 max_response += bde.tus.f.bdeSize;
13141 }
13142 break;
13143 default:
13144 max_response = wcqe->total_data_placed;
13145 break;
13146 }
13147 if (max_response < wcqe->total_data_placed)
13148 pIocbIn->iocb.un.genreq64.bdl.bdeSize = max_response;
13149 else
13150 pIocbIn->iocb.un.genreq64.bdl.bdeSize =
13151 wcqe->total_data_placed;
695a814e 13152 }
341af102 13153
acd6859b
JS
13154 /* Convert BG errors for completion status */
13155 if (status == CQE_STATUS_DI_ERROR) {
13156 pIocbIn->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
13157
13158 if (bf_get(lpfc_wcqe_c_bg_edir, wcqe))
13159 pIocbIn->iocb.un.ulpWord[4] = IOERR_RX_DMA_FAILED;
13160 else
13161 pIocbIn->iocb.un.ulpWord[4] = IOERR_TX_DMA_FAILED;
13162
13163 pIocbIn->iocb.unsli3.sli3_bg.bgstat = 0;
13164 if (bf_get(lpfc_wcqe_c_bg_ge, wcqe)) /* Guard Check failed */
13165 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13166 BGS_GUARD_ERR_MASK;
13167 if (bf_get(lpfc_wcqe_c_bg_ae, wcqe)) /* App Tag Check failed */
13168 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13169 BGS_APPTAG_ERR_MASK;
13170 if (bf_get(lpfc_wcqe_c_bg_re, wcqe)) /* Ref Tag Check failed */
13171 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13172 BGS_REFTAG_ERR_MASK;
13173
13174 /* Check to see if there was any good data before the error */
13175 if (bf_get(lpfc_wcqe_c_bg_tdpv, wcqe)) {
13176 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13177 BGS_HI_WATER_MARK_PRESENT_MASK;
13178 pIocbIn->iocb.unsli3.sli3_bg.bghm =
13179 wcqe->total_data_placed;
13180 }
13181
13182 /*
13183 * Set ALL the error bits to indicate we don't know what
13184 * type of error it is.
13185 */
13186 if (!pIocbIn->iocb.unsli3.sli3_bg.bgstat)
13187 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13188 (BGS_REFTAG_ERR_MASK | BGS_APPTAG_ERR_MASK |
13189 BGS_GUARD_ERR_MASK);
13190 }
13191
341af102
JS
13192 /* Pick up HBA exchange busy condition */
13193 if (bf_get(lpfc_wcqe_c_xb, wcqe)) {
13194 spin_lock_irqsave(&phba->hbalock, iflags);
13195 pIocbIn->iocb_flag |= LPFC_EXCHANGE_BUSY;
13196 spin_unlock_irqrestore(&phba->hbalock, iflags);
13197 }
4f774513
JS
13198}
13199
45ed1190
JS
13200/**
13201 * lpfc_sli4_els_wcqe_to_rspiocbq - Get response iocbq from els wcqe
13202 * @phba: Pointer to HBA context object.
7af29d45 13203 * @irspiocbq: Pointer to work-queue completion queue entry.
45ed1190
JS
13204 *
13205 * This routine handles an ELS work-queue completion event and construct
13206 * a pseudo response ELS IODBQ from the SLI4 ELS WCQE for the common
13207 * discovery engine to handle.
13208 *
13209 * Return: Pointer to the receive IOCBQ, NULL otherwise.
13210 **/
13211static struct lpfc_iocbq *
13212lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *phba,
13213 struct lpfc_iocbq *irspiocbq)
13214{
895427bd 13215 struct lpfc_sli_ring *pring;
45ed1190
JS
13216 struct lpfc_iocbq *cmdiocbq;
13217 struct lpfc_wcqe_complete *wcqe;
13218 unsigned long iflags;
13219
895427bd 13220 pring = lpfc_phba_elsring(phba);
1234a6d5
DK
13221 if (unlikely(!pring))
13222 return NULL;
895427bd 13223
45ed1190 13224 wcqe = &irspiocbq->cq_event.cqe.wcqe_cmpl;
45ed1190
JS
13225 pring->stats.iocb_event++;
13226 /* Look up the ELS command IOCB and create pseudo response IOCB */
13227 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13228 bf_get(lpfc_wcqe_c_request_tag, wcqe));
45ed1190
JS
13229 if (unlikely(!cmdiocbq)) {
13230 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13231 "0386 ELS complete with no corresponding "
401bb416
DK
13232 "cmdiocb: 0x%x 0x%x 0x%x 0x%x\n",
13233 wcqe->word0, wcqe->total_data_placed,
13234 wcqe->parameter, wcqe->word3);
45ed1190
JS
13235 lpfc_sli_release_iocbq(phba, irspiocbq);
13236 return NULL;
13237 }
13238
e2a8be56 13239 spin_lock_irqsave(&pring->ring_lock, iflags);
401bb416
DK
13240 /* Put the iocb back on the txcmplq */
13241 lpfc_sli_ringtxcmpl_put(phba, pring, cmdiocbq);
13242 spin_unlock_irqrestore(&pring->ring_lock, iflags);
13243
45ed1190 13244 /* Fake the irspiocbq and copy necessary response information */
341af102 13245 lpfc_sli4_iocb_param_transfer(phba, irspiocbq, cmdiocbq, wcqe);
45ed1190
JS
13246
13247 return irspiocbq;
13248}
13249
8a5ca109
JS
13250inline struct lpfc_cq_event *
13251lpfc_cq_event_setup(struct lpfc_hba *phba, void *entry, int size)
13252{
13253 struct lpfc_cq_event *cq_event;
13254
13255 /* Allocate a new internal CQ_EVENT entry */
13256 cq_event = lpfc_sli4_cq_event_alloc(phba);
13257 if (!cq_event) {
372c187b 13258 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8a5ca109
JS
13259 "0602 Failed to alloc CQ_EVENT entry\n");
13260 return NULL;
13261 }
13262
13263 /* Move the CQE into the event */
13264 memcpy(&cq_event->cqe, entry, size);
13265 return cq_event;
13266}
13267
04c68496 13268/**
291c2548 13269 * lpfc_sli4_sp_handle_async_event - Handle an asynchronous event
04c68496 13270 * @phba: Pointer to HBA context object.
7af29d45 13271 * @mcqe: Pointer to mailbox completion queue entry.
04c68496 13272 *
291c2548 13273 * This routine process a mailbox completion queue entry with asynchronous
04c68496
JS
13274 * event.
13275 *
13276 * Return: true if work posted to worker thread, otherwise false.
13277 **/
13278static bool
13279lpfc_sli4_sp_handle_async_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13280{
13281 struct lpfc_cq_event *cq_event;
13282 unsigned long iflags;
13283
13284 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13285 "0392 Async Event: word0:x%x, word1:x%x, "
13286 "word2:x%x, word3:x%x\n", mcqe->word0,
13287 mcqe->mcqe_tag0, mcqe->mcqe_tag1, mcqe->trailer);
13288
8a5ca109
JS
13289 cq_event = lpfc_cq_event_setup(phba, mcqe, sizeof(struct lpfc_mcqe));
13290 if (!cq_event)
04c68496 13291 return false;
04c68496
JS
13292 spin_lock_irqsave(&phba->hbalock, iflags);
13293 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_asynce_work_queue);
13294 /* Set the async event flag */
13295 phba->hba_flag |= ASYNC_EVENT;
13296 spin_unlock_irqrestore(&phba->hbalock, iflags);
13297
13298 return true;
13299}
13300
13301/**
13302 * lpfc_sli4_sp_handle_mbox_event - Handle a mailbox completion event
13303 * @phba: Pointer to HBA context object.
7af29d45 13304 * @mcqe: Pointer to mailbox completion queue entry.
04c68496
JS
13305 *
13306 * This routine process a mailbox completion queue entry with mailbox
13307 * completion event.
13308 *
13309 * Return: true if work posted to worker thread, otherwise false.
13310 **/
13311static bool
13312lpfc_sli4_sp_handle_mbox_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13313{
13314 uint32_t mcqe_status;
13315 MAILBOX_t *mbox, *pmbox;
13316 struct lpfc_mqe *mqe;
13317 struct lpfc_vport *vport;
13318 struct lpfc_nodelist *ndlp;
13319 struct lpfc_dmabuf *mp;
13320 unsigned long iflags;
13321 LPFC_MBOXQ_t *pmb;
13322 bool workposted = false;
13323 int rc;
13324
13325 /* If not a mailbox complete MCQE, out by checking mailbox consume */
13326 if (!bf_get(lpfc_trailer_completed, mcqe))
13327 goto out_no_mqe_complete;
13328
13329 /* Get the reference to the active mbox command */
13330 spin_lock_irqsave(&phba->hbalock, iflags);
13331 pmb = phba->sli.mbox_active;
13332 if (unlikely(!pmb)) {
372c187b 13333 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
04c68496
JS
13334 "1832 No pending MBOX command to handle\n");
13335 spin_unlock_irqrestore(&phba->hbalock, iflags);
13336 goto out_no_mqe_complete;
13337 }
13338 spin_unlock_irqrestore(&phba->hbalock, iflags);
13339 mqe = &pmb->u.mqe;
13340 pmbox = (MAILBOX_t *)&pmb->u.mqe;
13341 mbox = phba->mbox;
13342 vport = pmb->vport;
13343
13344 /* Reset heartbeat timer */
13345 phba->last_completion_time = jiffies;
13346 del_timer(&phba->sli.mbox_tmo);
13347
13348 /* Move mbox data to caller's mailbox region, do endian swapping */
13349 if (pmb->mbox_cmpl && mbox)
48f8fdb4 13350 lpfc_sli4_pcimem_bcopy(mbox, mqe, sizeof(struct lpfc_mqe));
04c68496 13351
73d91e50
JS
13352 /*
13353 * For mcqe errors, conditionally move a modified error code to
13354 * the mbox so that the error will not be missed.
13355 */
13356 mcqe_status = bf_get(lpfc_mcqe_status, mcqe);
13357 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
13358 if (bf_get(lpfc_mqe_status, mqe) == MBX_SUCCESS)
13359 bf_set(lpfc_mqe_status, mqe,
13360 (LPFC_MBX_ERROR_RANGE | mcqe_status));
13361 }
04c68496
JS
13362 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
13363 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
13364 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_MBOX_VPORT,
13365 "MBOX dflt rpi: status:x%x rpi:x%x",
13366 mcqe_status,
13367 pmbox->un.varWords[0], 0);
13368 if (mcqe_status == MB_CQE_STATUS_SUCCESS) {
3e1f0718
JS
13369 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
13370 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
04c68496
JS
13371 /* Reg_LOGIN of dflt RPI was successful. Now lets get
13372 * RID of the PPI using the same mbox buffer.
13373 */
13374 lpfc_unreg_login(phba, vport->vpi,
13375 pmbox->un.varWords[0], pmb);
13376 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
13377 pmb->ctx_buf = mp;
13378 pmb->ctx_ndlp = ndlp;
04c68496
JS
13379 pmb->vport = vport;
13380 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
13381 if (rc != MBX_BUSY)
372c187b
DK
13382 lpfc_printf_log(phba, KERN_ERR,
13383 LOG_TRACE_EVENT,
13384 "0385 rc should "
04c68496
JS
13385 "have been MBX_BUSY\n");
13386 if (rc != MBX_NOT_FINISHED)
13387 goto send_current_mbox;
13388 }
13389 }
13390 spin_lock_irqsave(&phba->pport->work_port_lock, iflags);
13391 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
13392 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflags);
13393
13394 /* There is mailbox completion work to do */
13395 spin_lock_irqsave(&phba->hbalock, iflags);
13396 __lpfc_mbox_cmpl_put(phba, pmb);
13397 phba->work_ha |= HA_MBATT;
13398 spin_unlock_irqrestore(&phba->hbalock, iflags);
13399 workposted = true;
13400
13401send_current_mbox:
13402 spin_lock_irqsave(&phba->hbalock, iflags);
13403 /* Release the mailbox command posting token */
13404 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13405 /* Setting active mailbox pointer need to be in sync to flag clear */
13406 phba->sli.mbox_active = NULL;
07b85824
JS
13407 if (bf_get(lpfc_trailer_consumed, mcqe))
13408 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
04c68496
JS
13409 spin_unlock_irqrestore(&phba->hbalock, iflags);
13410 /* Wake up worker thread to post the next pending mailbox command */
13411 lpfc_worker_wake_up(phba);
07b85824
JS
13412 return workposted;
13413
04c68496 13414out_no_mqe_complete:
07b85824 13415 spin_lock_irqsave(&phba->hbalock, iflags);
04c68496
JS
13416 if (bf_get(lpfc_trailer_consumed, mcqe))
13417 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
07b85824
JS
13418 spin_unlock_irqrestore(&phba->hbalock, iflags);
13419 return false;
04c68496
JS
13420}
13421
13422/**
13423 * lpfc_sli4_sp_handle_mcqe - Process a mailbox completion queue entry
13424 * @phba: Pointer to HBA context object.
7af29d45 13425 * @cq: Pointer to associated CQ
04c68496
JS
13426 * @cqe: Pointer to mailbox completion queue entry.
13427 *
13428 * This routine process a mailbox completion queue entry, it invokes the
291c2548 13429 * proper mailbox complete handling or asynchronous event handling routine
04c68496
JS
13430 * according to the MCQE's async bit.
13431 *
13432 * Return: true if work posted to worker thread, otherwise false.
13433 **/
13434static bool
32517fc0
JS
13435lpfc_sli4_sp_handle_mcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13436 struct lpfc_cqe *cqe)
04c68496
JS
13437{
13438 struct lpfc_mcqe mcqe;
13439 bool workposted;
13440
32517fc0
JS
13441 cq->CQ_mbox++;
13442
04c68496 13443 /* Copy the mailbox MCQE and convert endian order as needed */
48f8fdb4 13444 lpfc_sli4_pcimem_bcopy(cqe, &mcqe, sizeof(struct lpfc_mcqe));
04c68496
JS
13445
13446 /* Invoke the proper event handling routine */
13447 if (!bf_get(lpfc_trailer_async, &mcqe))
13448 workposted = lpfc_sli4_sp_handle_mbox_event(phba, &mcqe);
13449 else
13450 workposted = lpfc_sli4_sp_handle_async_event(phba, &mcqe);
13451 return workposted;
13452}
13453
4f774513
JS
13454/**
13455 * lpfc_sli4_sp_handle_els_wcqe - Handle els work-queue completion event
13456 * @phba: Pointer to HBA context object.
2a76a283 13457 * @cq: Pointer to associated CQ
4f774513
JS
13458 * @wcqe: Pointer to work-queue completion queue entry.
13459 *
13460 * This routine handles an ELS work-queue completion event.
13461 *
13462 * Return: true if work posted to worker thread, otherwise false.
13463 **/
13464static bool
2a76a283 13465lpfc_sli4_sp_handle_els_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13466 struct lpfc_wcqe_complete *wcqe)
13467{
4f774513
JS
13468 struct lpfc_iocbq *irspiocbq;
13469 unsigned long iflags;
2a76a283 13470 struct lpfc_sli_ring *pring = cq->pring;
0e9bb8d7
JS
13471 int txq_cnt = 0;
13472 int txcmplq_cnt = 0;
4f774513 13473
11f0e34f
JS
13474 /* Check for response status */
13475 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13476 /* Log the error status */
13477 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13478 "0357 ELS CQE error: status=x%x: "
13479 "CQE: %08x %08x %08x %08x\n",
13480 bf_get(lpfc_wcqe_c_status, wcqe),
13481 wcqe->word0, wcqe->total_data_placed,
13482 wcqe->parameter, wcqe->word3);
13483 }
13484
45ed1190 13485 /* Get an irspiocbq for later ELS response processing use */
4f774513
JS
13486 irspiocbq = lpfc_sli_get_iocbq(phba);
13487 if (!irspiocbq) {
0e9bb8d7
JS
13488 if (!list_empty(&pring->txq))
13489 txq_cnt++;
13490 if (!list_empty(&pring->txcmplq))
13491 txcmplq_cnt++;
372c187b 13492 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2a9bf3d0 13493 "0387 NO IOCBQ data: txq_cnt=%d iocb_cnt=%d "
ff349bca 13494 "els_txcmplq_cnt=%d\n",
0e9bb8d7 13495 txq_cnt, phba->iocb_cnt,
0e9bb8d7 13496 txcmplq_cnt);
45ed1190 13497 return false;
4f774513 13498 }
4f774513 13499
45ed1190
JS
13500 /* Save off the slow-path queue event for work thread to process */
13501 memcpy(&irspiocbq->cq_event.cqe.wcqe_cmpl, wcqe, sizeof(*wcqe));
4f774513 13502 spin_lock_irqsave(&phba->hbalock, iflags);
4d9ab994 13503 list_add_tail(&irspiocbq->cq_event.list,
45ed1190
JS
13504 &phba->sli4_hba.sp_queue_event);
13505 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513 13506 spin_unlock_irqrestore(&phba->hbalock, iflags);
4f774513 13507
45ed1190 13508 return true;
4f774513
JS
13509}
13510
13511/**
13512 * lpfc_sli4_sp_handle_rel_wcqe - Handle slow-path WQ entry consumed event
13513 * @phba: Pointer to HBA context object.
13514 * @wcqe: Pointer to work-queue completion queue entry.
13515 *
3f8b6fb7 13516 * This routine handles slow-path WQ entry consumed event by invoking the
4f774513
JS
13517 * proper WQ release routine to the slow-path WQ.
13518 **/
13519static void
13520lpfc_sli4_sp_handle_rel_wcqe(struct lpfc_hba *phba,
13521 struct lpfc_wcqe_release *wcqe)
13522{
2e90f4b5
JS
13523 /* sanity check on queue memory */
13524 if (unlikely(!phba->sli4_hba.els_wq))
13525 return;
4f774513
JS
13526 /* Check for the slow-path ELS work queue */
13527 if (bf_get(lpfc_wcqe_r_wq_id, wcqe) == phba->sli4_hba.els_wq->queue_id)
13528 lpfc_sli4_wq_release(phba->sli4_hba.els_wq,
13529 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
13530 else
13531 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13532 "2579 Slow-path wqe consume event carries "
13533 "miss-matched qid: wcqe-qid=x%x, sp-qid=x%x\n",
13534 bf_get(lpfc_wcqe_r_wqe_index, wcqe),
13535 phba->sli4_hba.els_wq->queue_id);
13536}
13537
13538/**
13539 * lpfc_sli4_sp_handle_abort_xri_wcqe - Handle a xri abort event
13540 * @phba: Pointer to HBA context object.
13541 * @cq: Pointer to a WQ completion queue.
13542 * @wcqe: Pointer to work-queue completion queue entry.
13543 *
13544 * This routine handles an XRI abort event.
13545 *
13546 * Return: true if work posted to worker thread, otherwise false.
13547 **/
13548static bool
13549lpfc_sli4_sp_handle_abort_xri_wcqe(struct lpfc_hba *phba,
13550 struct lpfc_queue *cq,
13551 struct sli4_wcqe_xri_aborted *wcqe)
13552{
13553 bool workposted = false;
13554 struct lpfc_cq_event *cq_event;
13555 unsigned long iflags;
13556
4f774513 13557 switch (cq->subtype) {
c00f62e6
JS
13558 case LPFC_IO:
13559 lpfc_sli4_io_xri_aborted(phba, wcqe, cq->hdwq);
13560 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13561 /* Notify aborted XRI for NVME work queue */
13562 if (phba->nvmet_support)
13563 lpfc_sli4_nvmet_xri_aborted(phba, wcqe);
13564 }
5e5b511d 13565 workposted = false;
4f774513 13566 break;
422c4cb7 13567 case LPFC_NVME_LS: /* NVME LS uses ELS resources */
4f774513 13568 case LPFC_ELS:
8a5ca109
JS
13569 cq_event = lpfc_cq_event_setup(
13570 phba, wcqe, sizeof(struct sli4_wcqe_xri_aborted));
13571 if (!cq_event)
13572 return false;
5e5b511d 13573 cq_event->hdwq = cq->hdwq;
4f774513
JS
13574 spin_lock_irqsave(&phba->hbalock, iflags);
13575 list_add_tail(&cq_event->list,
13576 &phba->sli4_hba.sp_els_xri_aborted_work_queue);
13577 /* Set the els xri abort event flag */
13578 phba->hba_flag |= ELS_XRI_ABORT_EVENT;
13579 spin_unlock_irqrestore(&phba->hbalock, iflags);
13580 workposted = true;
13581 break;
13582 default:
372c187b 13583 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
318083ad
JS
13584 "0603 Invalid CQ subtype %d: "
13585 "%08x %08x %08x %08x\n",
13586 cq->subtype, wcqe->word0, wcqe->parameter,
13587 wcqe->word2, wcqe->word3);
4f774513
JS
13588 workposted = false;
13589 break;
13590 }
13591 return workposted;
13592}
13593
e817e5d7
JS
13594#define FC_RCTL_MDS_DIAGS 0xF4
13595
4f774513
JS
13596/**
13597 * lpfc_sli4_sp_handle_rcqe - Process a receive-queue completion queue entry
13598 * @phba: Pointer to HBA context object.
13599 * @rcqe: Pointer to receive-queue completion queue entry.
13600 *
13601 * This routine process a receive-queue completion queue entry.
13602 *
13603 * Return: true if work posted to worker thread, otherwise false.
13604 **/
13605static bool
4d9ab994 13606lpfc_sli4_sp_handle_rcqe(struct lpfc_hba *phba, struct lpfc_rcqe *rcqe)
4f774513 13607{
4f774513 13608 bool workposted = false;
e817e5d7 13609 struct fc_frame_header *fc_hdr;
4f774513
JS
13610 struct lpfc_queue *hrq = phba->sli4_hba.hdr_rq;
13611 struct lpfc_queue *drq = phba->sli4_hba.dat_rq;
547077a4 13612 struct lpfc_nvmet_tgtport *tgtp;
4f774513 13613 struct hbq_dmabuf *dma_buf;
7851fe2c 13614 uint32_t status, rq_id;
4f774513
JS
13615 unsigned long iflags;
13616
2e90f4b5
JS
13617 /* sanity check on queue memory */
13618 if (unlikely(!hrq) || unlikely(!drq))
13619 return workposted;
13620
7851fe2c
JS
13621 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13622 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13623 else
13624 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13625 if (rq_id != hrq->queue_id)
4f774513
JS
13626 goto out;
13627
4d9ab994 13628 status = bf_get(lpfc_rcqe_status, rcqe);
4f774513
JS
13629 switch (status) {
13630 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
372c187b 13631 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513 13632 "2537 Receive Frame Truncated!!\n");
5bd5f66c 13633 /* fall through */
4f774513
JS
13634 case FC_STATUS_RQ_SUCCESS:
13635 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13636 lpfc_sli4_rq_release(hrq, drq);
4f774513
JS
13637 dma_buf = lpfc_sli_hbqbuf_get(&phba->hbqs[0].hbq_buffer_list);
13638 if (!dma_buf) {
b84daac9 13639 hrq->RQ_no_buf_found++;
4f774513
JS
13640 spin_unlock_irqrestore(&phba->hbalock, iflags);
13641 goto out;
13642 }
b84daac9 13643 hrq->RQ_rcv_buf++;
547077a4 13644 hrq->RQ_buf_posted--;
4d9ab994 13645 memcpy(&dma_buf->cq_event.cqe.rcqe_cmpl, rcqe, sizeof(*rcqe));
895427bd 13646
e817e5d7
JS
13647 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13648
13649 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
13650 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
13651 spin_unlock_irqrestore(&phba->hbalock, iflags);
13652 /* Handle MDS Loopback frames */
13653 lpfc_sli4_handle_mds_loopback(phba->pport, dma_buf);
13654 break;
13655 }
13656
13657 /* save off the frame for the work thread to process */
4d9ab994 13658 list_add_tail(&dma_buf->cq_event.list,
45ed1190 13659 &phba->sli4_hba.sp_queue_event);
4f774513 13660 /* Frame received */
45ed1190 13661 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513
JS
13662 spin_unlock_irqrestore(&phba->hbalock, iflags);
13663 workposted = true;
13664 break;
4f774513 13665 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13666 if (phba->nvmet_support) {
13667 tgtp = phba->targetport->private;
372c187b 13668 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
547077a4
JS
13669 "6402 RQE Error x%x, posted %d err_cnt "
13670 "%d: %x %x %x\n",
13671 status, hrq->RQ_buf_posted,
13672 hrq->RQ_no_posted_buf,
13673 atomic_read(&tgtp->rcv_fcp_cmd_in),
13674 atomic_read(&tgtp->rcv_fcp_cmd_out),
13675 atomic_read(&tgtp->xmt_fcp_release));
13676 }
13677 /* fallthrough */
13678
13679 case FC_STATUS_INSUFF_BUF_NEED_BUF:
b84daac9 13680 hrq->RQ_no_posted_buf++;
4f774513
JS
13681 /* Post more buffers if possible */
13682 spin_lock_irqsave(&phba->hbalock, iflags);
13683 phba->hba_flag |= HBA_POST_RECEIVE_BUFFER;
13684 spin_unlock_irqrestore(&phba->hbalock, iflags);
13685 workposted = true;
13686 break;
13687 }
13688out:
13689 return workposted;
4f774513
JS
13690}
13691
4d9ab994
JS
13692/**
13693 * lpfc_sli4_sp_handle_cqe - Process a slow path completion queue entry
13694 * @phba: Pointer to HBA context object.
13695 * @cq: Pointer to the completion queue.
32517fc0 13696 * @cqe: Pointer to a completion queue entry.
4d9ab994 13697 *
25985edc 13698 * This routine process a slow-path work-queue or receive queue completion queue
4d9ab994
JS
13699 * entry.
13700 *
13701 * Return: true if work posted to worker thread, otherwise false.
13702 **/
13703static bool
13704lpfc_sli4_sp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13705 struct lpfc_cqe *cqe)
13706{
45ed1190 13707 struct lpfc_cqe cqevt;
4d9ab994
JS
13708 bool workposted = false;
13709
13710 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 13711 lpfc_sli4_pcimem_bcopy(cqe, &cqevt, sizeof(struct lpfc_cqe));
4d9ab994
JS
13712
13713 /* Check and process for different type of WCQE and dispatch */
45ed1190 13714 switch (bf_get(lpfc_cqe_code, &cqevt)) {
4d9ab994 13715 case CQE_CODE_COMPL_WQE:
45ed1190 13716 /* Process the WQ/RQ complete event */
bc73905a 13717 phba->last_completion_time = jiffies;
2a76a283 13718 workposted = lpfc_sli4_sp_handle_els_wcqe(phba, cq,
45ed1190 13719 (struct lpfc_wcqe_complete *)&cqevt);
4d9ab994
JS
13720 break;
13721 case CQE_CODE_RELEASE_WQE:
13722 /* Process the WQ release event */
13723 lpfc_sli4_sp_handle_rel_wcqe(phba,
45ed1190 13724 (struct lpfc_wcqe_release *)&cqevt);
4d9ab994
JS
13725 break;
13726 case CQE_CODE_XRI_ABORTED:
13727 /* Process the WQ XRI abort event */
bc73905a 13728 phba->last_completion_time = jiffies;
4d9ab994 13729 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
45ed1190 13730 (struct sli4_wcqe_xri_aborted *)&cqevt);
4d9ab994
JS
13731 break;
13732 case CQE_CODE_RECEIVE:
7851fe2c 13733 case CQE_CODE_RECEIVE_V1:
4d9ab994 13734 /* Process the RQ event */
bc73905a 13735 phba->last_completion_time = jiffies;
4d9ab994 13736 workposted = lpfc_sli4_sp_handle_rcqe(phba,
45ed1190 13737 (struct lpfc_rcqe *)&cqevt);
4d9ab994
JS
13738 break;
13739 default:
372c187b 13740 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4d9ab994 13741 "0388 Not a valid WCQE code: x%x\n",
45ed1190 13742 bf_get(lpfc_cqe_code, &cqevt));
4d9ab994
JS
13743 break;
13744 }
13745 return workposted;
13746}
13747
4f774513
JS
13748/**
13749 * lpfc_sli4_sp_handle_eqe - Process a slow-path event queue entry
13750 * @phba: Pointer to HBA context object.
13751 * @eqe: Pointer to fast-path event queue entry.
7af29d45 13752 * @speq: Pointer to slow-path event queue.
4f774513
JS
13753 *
13754 * This routine process a event queue entry from the slow-path event queue.
13755 * It will check the MajorCode and MinorCode to determine this is for a
13756 * completion event on a completion queue, if not, an error shall be logged
13757 * and just return. Otherwise, it will get to the corresponding completion
13758 * queue and process all the entries on that completion queue, rearm the
13759 * completion queue, and then return.
13760 *
13761 **/
f485c18d 13762static void
67d12733
JS
13763lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
13764 struct lpfc_queue *speq)
4f774513 13765{
67d12733 13766 struct lpfc_queue *cq = NULL, *childq;
4f774513 13767 uint16_t cqid;
86ee57a9 13768 int ret = 0;
4f774513 13769
4f774513 13770 /* Get the reference to the corresponding CQ */
cb5172ea 13771 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
4f774513 13772
4f774513
JS
13773 list_for_each_entry(childq, &speq->child_list, list) {
13774 if (childq->queue_id == cqid) {
13775 cq = childq;
13776 break;
13777 }
13778 }
13779 if (unlikely(!cq)) {
75baf696 13780 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
372c187b 13781 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
75baf696
JS
13782 "0365 Slow-path CQ identifier "
13783 "(%d) does not exist\n", cqid);
f485c18d 13784 return;
4f774513
JS
13785 }
13786
895427bd
JS
13787 /* Save EQ associated with this CQ */
13788 cq->assoc_qp = speq;
13789
86ee57a9
DK
13790 if (is_kdump_kernel())
13791 ret = queue_work(phba->wq, &cq->spwork);
13792 else
13793 ret = queue_work_on(cq->chann, phba->wq, &cq->spwork);
13794
13795 if (!ret)
372c187b 13796 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
317aeb83 13797 "0390 Cannot schedule queue work "
f485c18d 13798 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
d6d189ce 13799 cqid, cq->queue_id, raw_smp_processor_id());
f485c18d
DK
13800}
13801
13802/**
32517fc0 13803 * __lpfc_sli4_process_cq - Process elements of a CQ
f485c18d 13804 * @phba: Pointer to HBA context object.
32517fc0
JS
13805 * @cq: Pointer to CQ to be processed
13806 * @handler: Routine to process each cqe
13807 * @delay: Pointer to usdelay to set in case of rescheduling of the handler
317aeb83 13808 * @poll_mode: Polling mode we were called from
f485c18d 13809 *
32517fc0
JS
13810 * This routine processes completion queue entries in a CQ. While a valid
13811 * queue element is found, the handler is called. During processing checks
13812 * are made for periodic doorbell writes to let the hardware know of
13813 * element consumption.
13814 *
13815 * If the max limit on cqes to process is hit, or there are no more valid
13816 * entries, the loop stops. If we processed a sufficient number of elements,
13817 * meaning there is sufficient load, rather than rearming and generating
13818 * another interrupt, a cq rescheduling delay will be set. A delay of 0
13819 * indicates no rescheduling.
f485c18d 13820 *
32517fc0 13821 * Returns True if work scheduled, False otherwise.
f485c18d 13822 **/
32517fc0
JS
13823static bool
13824__lpfc_sli4_process_cq(struct lpfc_hba *phba, struct lpfc_queue *cq,
13825 bool (*handler)(struct lpfc_hba *, struct lpfc_queue *,
317aeb83
DK
13826 struct lpfc_cqe *), unsigned long *delay,
13827 enum lpfc_poll_mode poll_mode)
f485c18d 13828{
f485c18d
DK
13829 struct lpfc_cqe *cqe;
13830 bool workposted = false;
32517fc0
JS
13831 int count = 0, consumed = 0;
13832 bool arm = true;
13833
13834 /* default - no reschedule */
13835 *delay = 0;
13836
13837 if (cmpxchg(&cq->queue_claimed, 0, 1) != 0)
13838 goto rearm_and_exit;
f485c18d 13839
4f774513 13840 /* Process all the entries to the CQ */
d74a89aa 13841 cq->q_flag = 0;
32517fc0
JS
13842 cqe = lpfc_sli4_cq_get(cq);
13843 while (cqe) {
32517fc0
JS
13844 workposted |= handler(phba, cq, cqe);
13845 __lpfc_sli4_consume_cqe(phba, cq, cqe);
13846
13847 consumed++;
13848 if (!(++count % cq->max_proc_limit))
13849 break;
13850
13851 if (!(count % cq->notify_interval)) {
13852 phba->sli4_hba.sli4_write_cq_db(phba, cq, consumed,
13853 LPFC_QUEUE_NOARM);
13854 consumed = 0;
8156d378 13855 cq->assoc_qp->q_flag |= HBA_EQ_DELAY_CHK;
32517fc0
JS
13856 }
13857
d74a89aa
JS
13858 if (count == LPFC_NVMET_CQ_NOTIFY)
13859 cq->q_flag |= HBA_NVMET_CQ_NOTIFY;
13860
32517fc0
JS
13861 cqe = lpfc_sli4_cq_get(cq);
13862 }
13863 if (count >= phba->cfg_cq_poll_threshold) {
13864 *delay = 1;
13865 arm = false;
13866 }
13867
317aeb83
DK
13868 /* Note: complete the irq_poll softirq before rearming CQ */
13869 if (poll_mode == LPFC_IRQ_POLL)
13870 irq_poll_complete(&cq->iop);
13871
32517fc0
JS
13872 /* Track the max number of CQEs processed in 1 EQ */
13873 if (count > cq->CQ_max_cqe)
13874 cq->CQ_max_cqe = count;
13875
13876 cq->assoc_qp->EQ_cqe_cnt += count;
13877
13878 /* Catch the no cq entry condition */
13879 if (unlikely(count == 0))
13880 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13881 "0369 No entry from completion queue "
13882 "qid=%d\n", cq->queue_id);
13883
164ba8d2 13884 xchg(&cq->queue_claimed, 0);
32517fc0
JS
13885
13886rearm_and_exit:
13887 phba->sli4_hba.sli4_write_cq_db(phba, cq, consumed,
13888 arm ? LPFC_QUEUE_REARM : LPFC_QUEUE_NOARM);
13889
13890 return workposted;
13891}
13892
13893/**
13894 * lpfc_sli4_sp_process_cq - Process a slow-path event queue entry
13895 * @cq: pointer to CQ to process
13896 *
13897 * This routine calls the cq processing routine with a handler specific
13898 * to the type of queue bound to it.
13899 *
13900 * The CQ routine returns two values: the first is the calling status,
13901 * which indicates whether work was queued to the background discovery
13902 * thread. If true, the routine should wakeup the discovery thread;
13903 * the second is the delay parameter. If non-zero, rather than rearming
13904 * the CQ and yet another interrupt, the CQ handler should be queued so
13905 * that it is processed in a subsequent polling action. The value of
13906 * the delay indicates when to reschedule it.
13907 **/
13908static void
13909__lpfc_sli4_sp_process_cq(struct lpfc_queue *cq)
13910{
13911 struct lpfc_hba *phba = cq->phba;
13912 unsigned long delay;
13913 bool workposted = false;
86ee57a9 13914 int ret = 0;
32517fc0
JS
13915
13916 /* Process and rearm the CQ */
4f774513
JS
13917 switch (cq->type) {
13918 case LPFC_MCQ:
32517fc0
JS
13919 workposted |= __lpfc_sli4_process_cq(phba, cq,
13920 lpfc_sli4_sp_handle_mcqe,
317aeb83 13921 &delay, LPFC_QUEUE_WORK);
4f774513
JS
13922 break;
13923 case LPFC_WCQ:
c00f62e6 13924 if (cq->subtype == LPFC_IO)
32517fc0
JS
13925 workposted |= __lpfc_sli4_process_cq(phba, cq,
13926 lpfc_sli4_fp_handle_cqe,
317aeb83 13927 &delay, LPFC_QUEUE_WORK);
32517fc0
JS
13928 else
13929 workposted |= __lpfc_sli4_process_cq(phba, cq,
13930 lpfc_sli4_sp_handle_cqe,
317aeb83 13931 &delay, LPFC_QUEUE_WORK);
4f774513
JS
13932 break;
13933 default:
372c187b 13934 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
13935 "0370 Invalid completion queue type (%d)\n",
13936 cq->type);
f485c18d 13937 return;
4f774513
JS
13938 }
13939
32517fc0 13940 if (delay) {
86ee57a9
DK
13941 if (is_kdump_kernel())
13942 ret = queue_delayed_work(phba->wq, &cq->sched_spwork,
13943 delay);
13944 else
13945 ret = queue_delayed_work_on(cq->chann, phba->wq,
13946 &cq->sched_spwork, delay);
13947 if (!ret)
372c187b 13948 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
317aeb83 13949 "0394 Cannot schedule queue work "
32517fc0
JS
13950 "for cqid=%d on CPU %d\n",
13951 cq->queue_id, cq->chann);
13952 }
4f774513
JS
13953
13954 /* wake up worker thread if there are works to be done */
13955 if (workposted)
13956 lpfc_worker_wake_up(phba);
13957}
13958
32517fc0
JS
13959/**
13960 * lpfc_sli4_sp_process_cq - slow-path work handler when started by
13961 * interrupt
13962 * @work: pointer to work element
13963 *
13964 * translates from the work handler and calls the slow-path handler.
13965 **/
13966static void
13967lpfc_sli4_sp_process_cq(struct work_struct *work)
13968{
13969 struct lpfc_queue *cq = container_of(work, struct lpfc_queue, spwork);
13970
13971 __lpfc_sli4_sp_process_cq(cq);
13972}
13973
13974/**
13975 * lpfc_sli4_dly_sp_process_cq - slow-path work handler when started by timer
13976 * @work: pointer to work element
13977 *
13978 * translates from the work handler and calls the slow-path handler.
13979 **/
13980static void
13981lpfc_sli4_dly_sp_process_cq(struct work_struct *work)
13982{
13983 struct lpfc_queue *cq = container_of(to_delayed_work(work),
13984 struct lpfc_queue, sched_spwork);
13985
13986 __lpfc_sli4_sp_process_cq(cq);
13987}
13988
4f774513
JS
13989/**
13990 * lpfc_sli4_fp_handle_fcp_wcqe - Process fast-path work queue completion entry
2a76a283
JS
13991 * @phba: Pointer to HBA context object.
13992 * @cq: Pointer to associated CQ
13993 * @wcqe: Pointer to work-queue completion queue entry.
4f774513
JS
13994 *
13995 * This routine process a fast-path work queue completion entry from fast-path
13996 * event queue for FCP command response completion.
13997 **/
13998static void
2a76a283 13999lpfc_sli4_fp_handle_fcp_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
14000 struct lpfc_wcqe_complete *wcqe)
14001{
2a76a283 14002 struct lpfc_sli_ring *pring = cq->pring;
4f774513
JS
14003 struct lpfc_iocbq *cmdiocbq;
14004 struct lpfc_iocbq irspiocbq;
14005 unsigned long iflags;
14006
4f774513
JS
14007 /* Check for response status */
14008 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
14009 /* If resource errors reported from HBA, reduce queue
14010 * depth of the SCSI device.
14011 */
e3d2b802
JS
14012 if (((bf_get(lpfc_wcqe_c_status, wcqe) ==
14013 IOSTAT_LOCAL_REJECT)) &&
14014 ((wcqe->parameter & IOERR_PARAM_MASK) ==
14015 IOERR_NO_RESOURCES))
4f774513 14016 phba->lpfc_rampdown_queue_depth(phba);
e3d2b802 14017
28ed7374 14018 /* Log the cmpl status */
11f0e34f 14019 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
28ed7374 14020 "0373 FCP CQE cmpl: status=x%x: "
11f0e34f 14021 "CQE: %08x %08x %08x %08x\n",
4f774513 14022 bf_get(lpfc_wcqe_c_status, wcqe),
11f0e34f
JS
14023 wcqe->word0, wcqe->total_data_placed,
14024 wcqe->parameter, wcqe->word3);
4f774513
JS
14025 }
14026
14027 /* Look up the FCP command IOCB and create pseudo response IOCB */
7e56aa25
JS
14028 spin_lock_irqsave(&pring->ring_lock, iflags);
14029 pring->stats.iocb_event++;
e2a8be56 14030 spin_unlock_irqrestore(&pring->ring_lock, iflags);
4f774513
JS
14031 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
14032 bf_get(lpfc_wcqe_c_request_tag, wcqe));
4f774513
JS
14033 if (unlikely(!cmdiocbq)) {
14034 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14035 "0374 FCP complete with no corresponding "
14036 "cmdiocb: iotag (%d)\n",
14037 bf_get(lpfc_wcqe_c_request_tag, wcqe));
14038 return;
14039 }
c8a4ce0b
DK
14040#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
14041 cmdiocbq->isr_timestamp = cq->isr_timestamp;
14042#endif
895427bd
JS
14043 if (cmdiocbq->iocb_cmpl == NULL) {
14044 if (cmdiocbq->wqe_cmpl) {
14045 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
14046 spin_lock_irqsave(&phba->hbalock, iflags);
14047 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
14048 spin_unlock_irqrestore(&phba->hbalock, iflags);
14049 }
14050
14051 /* Pass the cmd_iocb and the wcqe to the upper layer */
14052 (cmdiocbq->wqe_cmpl)(phba, cmdiocbq, wcqe);
14053 return;
14054 }
4f774513
JS
14055 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14056 "0375 FCP cmdiocb not callback function "
14057 "iotag: (%d)\n",
14058 bf_get(lpfc_wcqe_c_request_tag, wcqe));
14059 return;
14060 }
14061
14062 /* Fake the irspiocb and copy necessary response information */
341af102 14063 lpfc_sli4_iocb_param_transfer(phba, &irspiocbq, cmdiocbq, wcqe);
4f774513 14064
0f65ff68
JS
14065 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
14066 spin_lock_irqsave(&phba->hbalock, iflags);
14067 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
14068 spin_unlock_irqrestore(&phba->hbalock, iflags);
14069 }
14070
4f774513
JS
14071 /* Pass the cmd_iocb and the rsp state to the upper layer */
14072 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, &irspiocbq);
14073}
14074
14075/**
14076 * lpfc_sli4_fp_handle_rel_wcqe - Handle fast-path WQ entry consumed event
14077 * @phba: Pointer to HBA context object.
14078 * @cq: Pointer to completion queue.
14079 * @wcqe: Pointer to work-queue completion queue entry.
14080 *
3f8b6fb7 14081 * This routine handles an fast-path WQ entry consumed event by invoking the
4f774513
JS
14082 * proper WQ release routine to the slow-path WQ.
14083 **/
14084static void
14085lpfc_sli4_fp_handle_rel_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
14086 struct lpfc_wcqe_release *wcqe)
14087{
14088 struct lpfc_queue *childwq;
14089 bool wqid_matched = false;
895427bd 14090 uint16_t hba_wqid;
4f774513
JS
14091
14092 /* Check for fast-path FCP work queue release */
895427bd 14093 hba_wqid = bf_get(lpfc_wcqe_r_wq_id, wcqe);
4f774513 14094 list_for_each_entry(childwq, &cq->child_list, list) {
895427bd 14095 if (childwq->queue_id == hba_wqid) {
4f774513
JS
14096 lpfc_sli4_wq_release(childwq,
14097 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
6e8e1c14
JS
14098 if (childwq->q_flag & HBA_NVMET_WQFULL)
14099 lpfc_nvmet_wqfull_process(phba, childwq);
4f774513
JS
14100 wqid_matched = true;
14101 break;
14102 }
14103 }
14104 /* Report warning log message if no match found */
14105 if (wqid_matched != true)
14106 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14107 "2580 Fast-path wqe consume event carries "
895427bd 14108 "miss-matched qid: wcqe-qid=x%x\n", hba_wqid);
4f774513
JS
14109}
14110
14111/**
2d7dbc4c
JS
14112 * lpfc_sli4_nvmet_handle_rcqe - Process a receive-queue completion queue entry
14113 * @phba: Pointer to HBA context object.
7af29d45 14114 * @cq: Pointer to completion queue.
2d7dbc4c 14115 * @rcqe: Pointer to receive-queue completion queue entry.
4f774513 14116 *
2d7dbc4c
JS
14117 * This routine process a receive-queue completion queue entry.
14118 *
14119 * Return: true if work posted to worker thread, otherwise false.
14120 **/
14121static bool
14122lpfc_sli4_nvmet_handle_rcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
14123 struct lpfc_rcqe *rcqe)
14124{
14125 bool workposted = false;
14126 struct lpfc_queue *hrq;
14127 struct lpfc_queue *drq;
14128 struct rqb_dmabuf *dma_buf;
14129 struct fc_frame_header *fc_hdr;
547077a4 14130 struct lpfc_nvmet_tgtport *tgtp;
2d7dbc4c
JS
14131 uint32_t status, rq_id;
14132 unsigned long iflags;
14133 uint32_t fctl, idx;
14134
14135 if ((phba->nvmet_support == 0) ||
14136 (phba->sli4_hba.nvmet_cqset == NULL))
14137 return workposted;
14138
14139 idx = cq->queue_id - phba->sli4_hba.nvmet_cqset[0]->queue_id;
14140 hrq = phba->sli4_hba.nvmet_mrq_hdr[idx];
14141 drq = phba->sli4_hba.nvmet_mrq_data[idx];
14142
14143 /* sanity check on queue memory */
14144 if (unlikely(!hrq) || unlikely(!drq))
14145 return workposted;
14146
14147 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
14148 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
14149 else
14150 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
14151
14152 if ((phba->nvmet_support == 0) ||
14153 (rq_id != hrq->queue_id))
14154 return workposted;
14155
14156 status = bf_get(lpfc_rcqe_status, rcqe);
14157 switch (status) {
14158 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
372c187b 14159 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2d7dbc4c 14160 "6126 Receive Frame Truncated!!\n");
5bd5f66c 14161 /* fall through */
2d7dbc4c 14162 case FC_STATUS_RQ_SUCCESS:
2d7dbc4c 14163 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 14164 lpfc_sli4_rq_release(hrq, drq);
2d7dbc4c
JS
14165 dma_buf = lpfc_sli_rqbuf_get(phba, hrq);
14166 if (!dma_buf) {
14167 hrq->RQ_no_buf_found++;
14168 spin_unlock_irqrestore(&phba->hbalock, iflags);
14169 goto out;
14170 }
14171 spin_unlock_irqrestore(&phba->hbalock, iflags);
14172 hrq->RQ_rcv_buf++;
547077a4 14173 hrq->RQ_buf_posted--;
2d7dbc4c
JS
14174 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
14175
14176 /* Just some basic sanity checks on FCP Command frame */
14177 fctl = (fc_hdr->fh_f_ctl[0] << 16 |
3a8070c5
JS
14178 fc_hdr->fh_f_ctl[1] << 8 |
14179 fc_hdr->fh_f_ctl[2]);
2d7dbc4c
JS
14180 if (((fctl &
14181 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) !=
14182 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) ||
14183 (fc_hdr->fh_seq_cnt != 0)) /* 0 byte swapped is still 0 */
14184 goto drop;
14185
14186 if (fc_hdr->fh_type == FC_TYPE_FCP) {
d74a89aa 14187 dma_buf->bytes_recv = bf_get(lpfc_rcqe_length, rcqe);
d613b6a7 14188 lpfc_nvmet_unsol_fcp_event(
d74a89aa
JS
14189 phba, idx, dma_buf, cq->isr_timestamp,
14190 cq->q_flag & HBA_NVMET_CQ_NOTIFY);
2d7dbc4c
JS
14191 return false;
14192 }
14193drop:
22b738ac 14194 lpfc_rq_buf_free(phba, &dma_buf->hbuf);
2d7dbc4c 14195 break;
2d7dbc4c 14196 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
14197 if (phba->nvmet_support) {
14198 tgtp = phba->targetport->private;
372c187b 14199 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
547077a4
JS
14200 "6401 RQE Error x%x, posted %d err_cnt "
14201 "%d: %x %x %x\n",
14202 status, hrq->RQ_buf_posted,
14203 hrq->RQ_no_posted_buf,
14204 atomic_read(&tgtp->rcv_fcp_cmd_in),
14205 atomic_read(&tgtp->rcv_fcp_cmd_out),
14206 atomic_read(&tgtp->xmt_fcp_release));
14207 }
14208 /* fallthrough */
14209
14210 case FC_STATUS_INSUFF_BUF_NEED_BUF:
2d7dbc4c
JS
14211 hrq->RQ_no_posted_buf++;
14212 /* Post more buffers if possible */
2d7dbc4c
JS
14213 break;
14214 }
14215out:
14216 return workposted;
14217}
14218
4f774513 14219/**
895427bd 14220 * lpfc_sli4_fp_handle_cqe - Process fast-path work queue completion entry
32517fc0 14221 * @phba: adapter with cq
4f774513 14222 * @cq: Pointer to the completion queue.
7af29d45 14223 * @cqe: Pointer to fast-path completion queue entry.
4f774513
JS
14224 *
14225 * This routine process a fast-path work queue completion entry from fast-path
14226 * event queue for FCP command response completion.
32517fc0
JS
14227 *
14228 * Return: true if work posted to worker thread, otherwise false.
4f774513 14229 **/
32517fc0 14230static bool
895427bd 14231lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
14232 struct lpfc_cqe *cqe)
14233{
14234 struct lpfc_wcqe_release wcqe;
14235 bool workposted = false;
14236
14237 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 14238 lpfc_sli4_pcimem_bcopy(cqe, &wcqe, sizeof(struct lpfc_cqe));
4f774513
JS
14239
14240 /* Check and process for different type of WCQE and dispatch */
14241 switch (bf_get(lpfc_wcqe_c_code, &wcqe)) {
14242 case CQE_CODE_COMPL_WQE:
895427bd 14243 case CQE_CODE_NVME_ERSP:
b84daac9 14244 cq->CQ_wq++;
4f774513 14245 /* Process the WQ complete event */
98fc5dd9 14246 phba->last_completion_time = jiffies;
c00f62e6 14247 if (cq->subtype == LPFC_IO || cq->subtype == LPFC_NVME_LS)
895427bd 14248 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
4f774513
JS
14249 (struct lpfc_wcqe_complete *)&wcqe);
14250 break;
14251 case CQE_CODE_RELEASE_WQE:
b84daac9 14252 cq->CQ_release_wqe++;
4f774513
JS
14253 /* Process the WQ release event */
14254 lpfc_sli4_fp_handle_rel_wcqe(phba, cq,
14255 (struct lpfc_wcqe_release *)&wcqe);
14256 break;
14257 case CQE_CODE_XRI_ABORTED:
b84daac9 14258 cq->CQ_xri_aborted++;
4f774513 14259 /* Process the WQ XRI abort event */
bc73905a 14260 phba->last_completion_time = jiffies;
4f774513
JS
14261 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
14262 (struct sli4_wcqe_xri_aborted *)&wcqe);
14263 break;
895427bd
JS
14264 case CQE_CODE_RECEIVE_V1:
14265 case CQE_CODE_RECEIVE:
14266 phba->last_completion_time = jiffies;
2d7dbc4c
JS
14267 if (cq->subtype == LPFC_NVMET) {
14268 workposted = lpfc_sli4_nvmet_handle_rcqe(
14269 phba, cq, (struct lpfc_rcqe *)&wcqe);
14270 }
895427bd 14271 break;
4f774513 14272 default:
372c187b 14273 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
895427bd 14274 "0144 Not a valid CQE code: x%x\n",
4f774513
JS
14275 bf_get(lpfc_wcqe_c_code, &wcqe));
14276 break;
14277 }
14278 return workposted;
14279}
14280
317aeb83
DK
14281/**
14282 * lpfc_sli4_sched_cq_work - Schedules cq work
14283 * @phba: Pointer to HBA context object.
14284 * @cq: Pointer to CQ
14285 * @cqid: CQ ID
14286 *
14287 * This routine checks the poll mode of the CQ corresponding to
14288 * cq->chann, then either schedules a softirq or queue_work to complete
14289 * cq work.
14290 *
14291 * queue_work path is taken if in NVMET mode, or if poll_mode is in
14292 * LPFC_QUEUE_WORK mode. Otherwise, softirq path is taken.
14293 *
14294 **/
14295static void lpfc_sli4_sched_cq_work(struct lpfc_hba *phba,
14296 struct lpfc_queue *cq, uint16_t cqid)
14297{
14298 int ret = 0;
14299
14300 switch (cq->poll_mode) {
14301 case LPFC_IRQ_POLL:
14302 irq_poll_sched(&cq->iop);
14303 break;
14304 case LPFC_QUEUE_WORK:
14305 default:
14306 if (is_kdump_kernel())
14307 ret = queue_work(phba->wq, &cq->irqwork);
14308 else
14309 ret = queue_work_on(cq->chann, phba->wq, &cq->irqwork);
14310 if (!ret)
372c187b 14311 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
317aeb83
DK
14312 "0383 Cannot schedule queue work "
14313 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
14314 cqid, cq->queue_id,
14315 raw_smp_processor_id());
14316 }
14317}
14318
4f774513 14319/**
67d12733 14320 * lpfc_sli4_hba_handle_eqe - Process a fast-path event queue entry
4f774513 14321 * @phba: Pointer to HBA context object.
7af29d45 14322 * @eq: Pointer to the queue structure.
4f774513
JS
14323 * @eqe: Pointer to fast-path event queue entry.
14324 *
14325 * This routine process a event queue entry from the fast-path event queue.
14326 * It will check the MajorCode and MinorCode to determine this is for a
14327 * completion event on a completion queue, if not, an error shall be logged
14328 * and just return. Otherwise, it will get to the corresponding completion
14329 * queue and process all the entries on the completion queue, rearm the
14330 * completion queue, and then return.
14331 **/
f485c18d 14332static void
32517fc0
JS
14333lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba, struct lpfc_queue *eq,
14334 struct lpfc_eqe *eqe)
4f774513 14335{
895427bd 14336 struct lpfc_queue *cq = NULL;
32517fc0 14337 uint32_t qidx = eq->hdwq;
2d7dbc4c 14338 uint16_t cqid, id;
4f774513 14339
cb5172ea 14340 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
372c187b 14341 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
67d12733 14342 "0366 Not a valid completion "
4f774513 14343 "event: majorcode=x%x, minorcode=x%x\n",
cb5172ea
JS
14344 bf_get_le32(lpfc_eqe_major_code, eqe),
14345 bf_get_le32(lpfc_eqe_minor_code, eqe));
f485c18d 14346 return;
4f774513
JS
14347 }
14348
67d12733
JS
14349 /* Get the reference to the corresponding CQ */
14350 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
14351
6a828b0f
JS
14352 /* Use the fast lookup method first */
14353 if (cqid <= phba->sli4_hba.cq_max) {
14354 cq = phba->sli4_hba.cq_lookup[cqid];
14355 if (cq)
14356 goto work_cq;
cdb42bec
JS
14357 }
14358
14359 /* Next check for NVMET completion */
2d7dbc4c
JS
14360 if (phba->cfg_nvmet_mrq && phba->sli4_hba.nvmet_cqset) {
14361 id = phba->sli4_hba.nvmet_cqset[0]->queue_id;
14362 if ((cqid >= id) && (cqid < (id + phba->cfg_nvmet_mrq))) {
14363 /* Process NVMET unsol rcv */
14364 cq = phba->sli4_hba.nvmet_cqset[cqid - id];
14365 goto process_cq;
14366 }
67d12733
JS
14367 }
14368
895427bd
JS
14369 if (phba->sli4_hba.nvmels_cq &&
14370 (cqid == phba->sli4_hba.nvmels_cq->queue_id)) {
14371 /* Process NVME unsol rcv */
14372 cq = phba->sli4_hba.nvmels_cq;
14373 }
14374
14375 /* Otherwise this is a Slow path event */
14376 if (cq == NULL) {
cdb42bec
JS
14377 lpfc_sli4_sp_handle_eqe(phba, eqe,
14378 phba->sli4_hba.hdwq[qidx].hba_eq);
f485c18d 14379 return;
4f774513
JS
14380 }
14381
895427bd 14382process_cq:
4f774513 14383 if (unlikely(cqid != cq->queue_id)) {
372c187b 14384 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
14385 "0368 Miss-matched fast-path completion "
14386 "queue identifier: eqcqid=%d, fcpcqid=%d\n",
14387 cqid, cq->queue_id);
f485c18d 14388 return;
4f774513
JS
14389 }
14390
6a828b0f 14391work_cq:
d74a89aa
JS
14392#if defined(CONFIG_SCSI_LPFC_DEBUG_FS)
14393 if (phba->ktime_on)
14394 cq->isr_timestamp = ktime_get_ns();
14395 else
14396 cq->isr_timestamp = 0;
14397#endif
317aeb83 14398 lpfc_sli4_sched_cq_work(phba, cq, cqid);
f485c18d
DK
14399}
14400
14401/**
32517fc0
JS
14402 * __lpfc_sli4_hba_process_cq - Process a fast-path event queue entry
14403 * @cq: Pointer to CQ to be processed
317aeb83 14404 * @poll_mode: Enum lpfc_poll_state to determine poll mode
f485c18d 14405 *
32517fc0
JS
14406 * This routine calls the cq processing routine with the handler for
14407 * fast path CQEs.
14408 *
14409 * The CQ routine returns two values: the first is the calling status,
14410 * which indicates whether work was queued to the background discovery
14411 * thread. If true, the routine should wakeup the discovery thread;
14412 * the second is the delay parameter. If non-zero, rather than rearming
14413 * the CQ and yet another interrupt, the CQ handler should be queued so
14414 * that it is processed in a subsequent polling action. The value of
14415 * the delay indicates when to reschedule it.
f485c18d
DK
14416 **/
14417static void
317aeb83
DK
14418__lpfc_sli4_hba_process_cq(struct lpfc_queue *cq,
14419 enum lpfc_poll_mode poll_mode)
f485c18d 14420{
f485c18d 14421 struct lpfc_hba *phba = cq->phba;
32517fc0 14422 unsigned long delay;
f485c18d 14423 bool workposted = false;
86ee57a9 14424 int ret = 0;
f485c18d 14425
32517fc0
JS
14426 /* process and rearm the CQ */
14427 workposted |= __lpfc_sli4_process_cq(phba, cq, lpfc_sli4_fp_handle_cqe,
317aeb83 14428 &delay, poll_mode);
4f774513 14429
32517fc0 14430 if (delay) {
86ee57a9
DK
14431 if (is_kdump_kernel())
14432 ret = queue_delayed_work(phba->wq, &cq->sched_irqwork,
14433 delay);
14434 else
14435 ret = queue_delayed_work_on(cq->chann, phba->wq,
14436 &cq->sched_irqwork, delay);
14437 if (!ret)
372c187b 14438 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
317aeb83
DK
14439 "0367 Cannot schedule queue work "
14440 "for cqid=%d on CPU %d\n",
14441 cq->queue_id, cq->chann);
32517fc0 14442 }
4f774513
JS
14443
14444 /* wake up worker thread if there are works to be done */
14445 if (workposted)
14446 lpfc_worker_wake_up(phba);
14447}
14448
1ba981fd 14449/**
32517fc0
JS
14450 * lpfc_sli4_hba_process_cq - fast-path work handler when started by
14451 * interrupt
14452 * @work: pointer to work element
1ba981fd 14453 *
32517fc0 14454 * translates from the work handler and calls the fast-path handler.
1ba981fd
JS
14455 **/
14456static void
32517fc0 14457lpfc_sli4_hba_process_cq(struct work_struct *work)
1ba981fd 14458{
32517fc0 14459 struct lpfc_queue *cq = container_of(work, struct lpfc_queue, irqwork);
1ba981fd 14460
317aeb83 14461 __lpfc_sli4_hba_process_cq(cq, LPFC_QUEUE_WORK);
1ba981fd
JS
14462}
14463
14464/**
32517fc0
JS
14465 * lpfc_sli4_hba_process_cq - fast-path work handler when started by timer
14466 * @work: pointer to work element
1ba981fd 14467 *
32517fc0 14468 * translates from the work handler and calls the fast-path handler.
1ba981fd 14469 **/
32517fc0
JS
14470static void
14471lpfc_sli4_dly_hba_process_cq(struct work_struct *work)
1ba981fd 14472{
32517fc0
JS
14473 struct lpfc_queue *cq = container_of(to_delayed_work(work),
14474 struct lpfc_queue, sched_irqwork);
1ba981fd 14475
317aeb83 14476 __lpfc_sli4_hba_process_cq(cq, LPFC_QUEUE_WORK);
1ba981fd
JS
14477}
14478
4f774513 14479/**
67d12733 14480 * lpfc_sli4_hba_intr_handler - HBA interrupt handler to SLI-4 device
4f774513
JS
14481 * @irq: Interrupt number.
14482 * @dev_id: The device context pointer.
14483 *
14484 * This function is directly called from the PCI layer as an interrupt
14485 * service routine when device with SLI-4 interface spec is enabled with
14486 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
14487 * ring event in the HBA. However, when the device is enabled with either
14488 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
14489 * device-level interrupt handler. When the PCI slot is in error recovery
14490 * or the HBA is undergoing initialization, the interrupt handler will not
14491 * process the interrupt. The SCSI FCP fast-path ring event are handled in
14492 * the intrrupt context. This function is called without any lock held.
14493 * It gets the hbalock to access and update SLI data structures. Note that,
14494 * the FCP EQ to FCP CQ are one-to-one map such that the FCP EQ index is
14495 * equal to that of FCP CQ index.
14496 *
67d12733
JS
14497 * The link attention and ELS ring attention events are handled
14498 * by the worker thread. The interrupt handler signals the worker thread
14499 * and returns for these events. This function is called without any lock
14500 * held. It gets the hbalock to access and update SLI data structures.
14501 *
4f774513
JS
14502 * This function returns IRQ_HANDLED when interrupt is handled else it
14503 * returns IRQ_NONE.
14504 **/
14505irqreturn_t
67d12733 14506lpfc_sli4_hba_intr_handler(int irq, void *dev_id)
4f774513
JS
14507{
14508 struct lpfc_hba *phba;
895427bd 14509 struct lpfc_hba_eq_hdl *hba_eq_hdl;
4f774513 14510 struct lpfc_queue *fpeq;
4f774513
JS
14511 unsigned long iflag;
14512 int ecount = 0;
895427bd 14513 int hba_eqidx;
32517fc0 14514 struct lpfc_eq_intr_info *eqi;
4f774513
JS
14515
14516 /* Get the driver's phba structure from the dev_id */
895427bd
JS
14517 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
14518 phba = hba_eq_hdl->phba;
14519 hba_eqidx = hba_eq_hdl->idx;
4f774513
JS
14520
14521 if (unlikely(!phba))
14522 return IRQ_NONE;
cdb42bec 14523 if (unlikely(!phba->sli4_hba.hdwq))
5350d872 14524 return IRQ_NONE;
4f774513
JS
14525
14526 /* Get to the EQ struct associated with this vector */
657add4e 14527 fpeq = phba->sli4_hba.hba_eq_hdl[hba_eqidx].eq;
2e90f4b5
JS
14528 if (unlikely(!fpeq))
14529 return IRQ_NONE;
4f774513
JS
14530
14531 /* Check device state for handling interrupt */
14532 if (unlikely(lpfc_intr_state_check(phba))) {
14533 /* Check again for link_state with lock held */
14534 spin_lock_irqsave(&phba->hbalock, iflag);
14535 if (phba->link_state < LPFC_LINK_DOWN)
14536 /* Flush, clear interrupt, and rearm the EQ */
24c7c0a6 14537 lpfc_sli4_eqcq_flush(phba, fpeq);
4f774513
JS
14538 spin_unlock_irqrestore(&phba->hbalock, iflag);
14539 return IRQ_NONE;
14540 }
14541
a7fc071a
DK
14542 eqi = this_cpu_ptr(phba->sli4_hba.eq_info);
14543 eqi->icnt++;
14544
d6d189ce 14545 fpeq->last_cpu = raw_smp_processor_id();
4f774513 14546
a7fc071a 14547 if (eqi->icnt > LPFC_EQD_ISR_TRIGGER &&
8156d378 14548 fpeq->q_flag & HBA_EQ_DELAY_CHK &&
32517fc0
JS
14549 phba->cfg_auto_imax &&
14550 fpeq->q_mode != LPFC_MAX_AUTO_EQ_DELAY &&
14551 phba->sli.sli_flag & LPFC_SLI_USE_EQDR)
14552 lpfc_sli4_mod_hba_eq_delay(phba, fpeq, LPFC_MAX_AUTO_EQ_DELAY);
b84daac9 14553
32517fc0 14554 /* process and rearm the EQ */
93a4d6f4 14555 ecount = lpfc_sli4_process_eq(phba, fpeq, LPFC_QUEUE_REARM);
4f774513
JS
14556
14557 if (unlikely(ecount == 0)) {
b84daac9 14558 fpeq->EQ_no_entry++;
4f774513
JS
14559 if (phba->intr_type == MSIX)
14560 /* MSI-X treated interrupt served as no EQ share INT */
14561 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14562 "0358 MSI-X interrupt with no EQE\n");
14563 else
14564 /* Non MSI-X treated on interrupt as EQ share INT */
14565 return IRQ_NONE;
14566 }
14567
14568 return IRQ_HANDLED;
14569} /* lpfc_sli4_fp_intr_handler */
14570
14571/**
14572 * lpfc_sli4_intr_handler - Device-level interrupt handler for SLI-4 device
14573 * @irq: Interrupt number.
14574 * @dev_id: The device context pointer.
14575 *
14576 * This function is the device-level interrupt handler to device with SLI-4
14577 * interface spec, called from the PCI layer when either MSI or Pin-IRQ
14578 * interrupt mode is enabled and there is an event in the HBA which requires
14579 * driver attention. This function invokes the slow-path interrupt attention
14580 * handling function and fast-path interrupt attention handling function in
14581 * turn to process the relevant HBA attention events. This function is called
14582 * without any lock held. It gets the hbalock to access and update SLI data
14583 * structures.
14584 *
14585 * This function returns IRQ_HANDLED when interrupt is handled, else it
14586 * returns IRQ_NONE.
14587 **/
14588irqreturn_t
14589lpfc_sli4_intr_handler(int irq, void *dev_id)
14590{
14591 struct lpfc_hba *phba;
67d12733
JS
14592 irqreturn_t hba_irq_rc;
14593 bool hba_handled = false;
895427bd 14594 int qidx;
4f774513
JS
14595
14596 /* Get the driver's phba structure from the dev_id */
14597 phba = (struct lpfc_hba *)dev_id;
14598
14599 if (unlikely(!phba))
14600 return IRQ_NONE;
14601
4f774513
JS
14602 /*
14603 * Invoke fast-path host attention interrupt handling as appropriate.
14604 */
6a828b0f 14605 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
67d12733 14606 hba_irq_rc = lpfc_sli4_hba_intr_handler(irq,
895427bd 14607 &phba->sli4_hba.hba_eq_hdl[qidx]);
67d12733
JS
14608 if (hba_irq_rc == IRQ_HANDLED)
14609 hba_handled |= true;
4f774513
JS
14610 }
14611
67d12733 14612 return (hba_handled == true) ? IRQ_HANDLED : IRQ_NONE;
4f774513
JS
14613} /* lpfc_sli4_intr_handler */
14614
93a4d6f4
JS
14615void lpfc_sli4_poll_hbtimer(struct timer_list *t)
14616{
14617 struct lpfc_hba *phba = from_timer(phba, t, cpuhp_poll_timer);
14618 struct lpfc_queue *eq;
14619 int i = 0;
14620
14621 rcu_read_lock();
14622
14623 list_for_each_entry_rcu(eq, &phba->poll_list, _poll_list)
14624 i += lpfc_sli4_poll_eq(eq, LPFC_POLL_SLOWPATH);
14625 if (!list_empty(&phba->poll_list))
14626 mod_timer(&phba->cpuhp_poll_timer,
14627 jiffies + msecs_to_jiffies(LPFC_POLL_HB));
14628
14629 rcu_read_unlock();
14630}
14631
14632inline int lpfc_sli4_poll_eq(struct lpfc_queue *eq, uint8_t path)
14633{
14634 struct lpfc_hba *phba = eq->phba;
14635 int i = 0;
14636
14637 /*
14638 * Unlocking an irq is one of the entry point to check
14639 * for re-schedule, but we are good for io submission
14640 * path as midlayer does a get_cpu to glue us in. Flush
14641 * out the invalidate queue so we can see the updated
14642 * value for flag.
14643 */
14644 smp_rmb();
14645
14646 if (READ_ONCE(eq->mode) == LPFC_EQ_POLL)
14647 /* We will not likely get the completion for the caller
14648 * during this iteration but i guess that's fine.
14649 * Future io's coming on this eq should be able to
14650 * pick it up. As for the case of single io's, they
14651 * will be handled through a sched from polling timer
14652 * function which is currently triggered every 1msec.
14653 */
14654 i = lpfc_sli4_process_eq(phba, eq, LPFC_QUEUE_NOARM);
14655
14656 return i;
14657}
14658
14659static inline void lpfc_sli4_add_to_poll_list(struct lpfc_queue *eq)
14660{
14661 struct lpfc_hba *phba = eq->phba;
14662
f861f596
JS
14663 /* kickstart slowpath processing if needed */
14664 if (list_empty(&phba->poll_list))
93a4d6f4
JS
14665 mod_timer(&phba->cpuhp_poll_timer,
14666 jiffies + msecs_to_jiffies(LPFC_POLL_HB));
93a4d6f4
JS
14667
14668 list_add_rcu(&eq->_poll_list, &phba->poll_list);
14669 synchronize_rcu();
14670}
14671
14672static inline void lpfc_sli4_remove_from_poll_list(struct lpfc_queue *eq)
14673{
14674 struct lpfc_hba *phba = eq->phba;
14675
14676 /* Disable slowpath processing for this eq. Kick start the eq
14677 * by RE-ARMING the eq's ASAP
14678 */
14679 list_del_rcu(&eq->_poll_list);
14680 synchronize_rcu();
14681
14682 if (list_empty(&phba->poll_list))
14683 del_timer_sync(&phba->cpuhp_poll_timer);
14684}
14685
d480e578 14686void lpfc_sli4_cleanup_poll_list(struct lpfc_hba *phba)
93a4d6f4
JS
14687{
14688 struct lpfc_queue *eq, *next;
14689
14690 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list)
14691 list_del(&eq->_poll_list);
14692
14693 INIT_LIST_HEAD(&phba->poll_list);
14694 synchronize_rcu();
14695}
14696
14697static inline void
14698__lpfc_sli4_switch_eqmode(struct lpfc_queue *eq, uint8_t mode)
14699{
14700 if (mode == eq->mode)
14701 return;
14702 /*
14703 * currently this function is only called during a hotplug
14704 * event and the cpu on which this function is executing
14705 * is going offline. By now the hotplug has instructed
14706 * the scheduler to remove this cpu from cpu active mask.
14707 * So we don't need to work about being put aside by the
14708 * scheduler for a high priority process. Yes, the inte-
14709 * rrupts could come but they are known to retire ASAP.
14710 */
14711
14712 /* Disable polling in the fastpath */
14713 WRITE_ONCE(eq->mode, mode);
14714 /* flush out the store buffer */
14715 smp_wmb();
14716
14717 /*
14718 * Add this eq to the polling list and start polling. For
14719 * a grace period both interrupt handler and poller will
14720 * try to process the eq _but_ that's fine. We have a
14721 * synchronization mechanism in place (queue_claimed) to
14722 * deal with it. This is just a draining phase for int-
14723 * errupt handler (not eq's) as we have guranteed through
14724 * barrier that all the CPUs have seen the new CQ_POLLED
14725 * state. which will effectively disable the REARMING of
14726 * the EQ. The whole idea is eq's die off eventually as
14727 * we are not rearming EQ's anymore.
14728 */
14729 mode ? lpfc_sli4_add_to_poll_list(eq) :
14730 lpfc_sli4_remove_from_poll_list(eq);
14731}
14732
14733void lpfc_sli4_start_polling(struct lpfc_queue *eq)
14734{
14735 __lpfc_sli4_switch_eqmode(eq, LPFC_EQ_POLL);
14736}
14737
14738void lpfc_sli4_stop_polling(struct lpfc_queue *eq)
14739{
14740 struct lpfc_hba *phba = eq->phba;
14741
14742 __lpfc_sli4_switch_eqmode(eq, LPFC_EQ_INTERRUPT);
14743
14744 /* Kick start for the pending io's in h/w.
14745 * Once we switch back to interrupt processing on a eq
14746 * the io path completion will only arm eq's when it
14747 * receives a completion. But since eq's are in disa-
14748 * rmed state it doesn't receive a completion. This
14749 * creates a deadlock scenaro.
14750 */
14751 phba->sli4_hba.sli4_write_eq_db(phba, eq, 0, LPFC_QUEUE_REARM);
14752}
14753
4f774513
JS
14754/**
14755 * lpfc_sli4_queue_free - free a queue structure and associated memory
14756 * @queue: The queue structure to free.
14757 *
b595076a 14758 * This function frees a queue structure and the DMAable memory used for
4f774513
JS
14759 * the host resident queue. This function must be called after destroying the
14760 * queue on the HBA.
14761 **/
14762void
14763lpfc_sli4_queue_free(struct lpfc_queue *queue)
14764{
14765 struct lpfc_dmabuf *dmabuf;
14766
14767 if (!queue)
14768 return;
14769
4645f7b5
JS
14770 if (!list_empty(&queue->wq_list))
14771 list_del(&queue->wq_list);
14772
4f774513
JS
14773 while (!list_empty(&queue->page_list)) {
14774 list_remove_head(&queue->page_list, dmabuf, struct lpfc_dmabuf,
14775 list);
81b96eda 14776 dma_free_coherent(&queue->phba->pcidev->dev, queue->page_size,
4f774513
JS
14777 dmabuf->virt, dmabuf->phys);
14778 kfree(dmabuf);
14779 }
895427bd
JS
14780 if (queue->rqbp) {
14781 lpfc_free_rq_buffer(queue->phba, queue);
14782 kfree(queue->rqbp);
14783 }
d1f525aa 14784
32517fc0
JS
14785 if (!list_empty(&queue->cpu_list))
14786 list_del(&queue->cpu_list);
14787
4f774513
JS
14788 kfree(queue);
14789 return;
14790}
14791
14792/**
14793 * lpfc_sli4_queue_alloc - Allocate and initialize a queue structure
14794 * @phba: The HBA that this queue is being created on.
81b96eda 14795 * @page_size: The size of a queue page
4f774513 14796 * @entry_size: The size of each queue entry for this queue.
7af29d45 14797 * @entry_count: The number of entries that this queue will handle.
c1a21ebc 14798 * @cpu: The cpu that will primarily utilize this queue.
4f774513
JS
14799 *
14800 * This function allocates a queue structure and the DMAable memory used for
14801 * the host resident queue. This function must be called before creating the
14802 * queue on the HBA.
14803 **/
14804struct lpfc_queue *
81b96eda 14805lpfc_sli4_queue_alloc(struct lpfc_hba *phba, uint32_t page_size,
c1a21ebc 14806 uint32_t entry_size, uint32_t entry_count, int cpu)
4f774513
JS
14807{
14808 struct lpfc_queue *queue;
14809 struct lpfc_dmabuf *dmabuf;
cb5172ea 14810 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
9afbee3d 14811 uint16_t x, pgcnt;
4f774513 14812
cb5172ea 14813 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 14814 hw_page_size = page_size;
cb5172ea 14815
9afbee3d
JS
14816 pgcnt = ALIGN(entry_size * entry_count, hw_page_size) / hw_page_size;
14817
14818 /* If needed, Adjust page count to match the max the adapter supports */
14819 if (pgcnt > phba->sli4_hba.pc_sli4_params.wqpcnt)
14820 pgcnt = phba->sli4_hba.pc_sli4_params.wqpcnt;
14821
c1a21ebc
JS
14822 queue = kzalloc_node(sizeof(*queue) + (sizeof(void *) * pgcnt),
14823 GFP_KERNEL, cpu_to_node(cpu));
4f774513
JS
14824 if (!queue)
14825 return NULL;
895427bd 14826
4f774513 14827 INIT_LIST_HEAD(&queue->list);
93a4d6f4 14828 INIT_LIST_HEAD(&queue->_poll_list);
895427bd 14829 INIT_LIST_HEAD(&queue->wq_list);
6e8e1c14 14830 INIT_LIST_HEAD(&queue->wqfull_list);
4f774513
JS
14831 INIT_LIST_HEAD(&queue->page_list);
14832 INIT_LIST_HEAD(&queue->child_list);
32517fc0 14833 INIT_LIST_HEAD(&queue->cpu_list);
81b96eda
JS
14834
14835 /* Set queue parameters now. If the system cannot provide memory
14836 * resources, the free routine needs to know what was allocated.
14837 */
9afbee3d
JS
14838 queue->page_count = pgcnt;
14839 queue->q_pgs = (void **)&queue[1];
14840 queue->entry_cnt_per_pg = hw_page_size / entry_size;
81b96eda
JS
14841 queue->entry_size = entry_size;
14842 queue->entry_count = entry_count;
14843 queue->page_size = hw_page_size;
14844 queue->phba = phba;
14845
9afbee3d 14846 for (x = 0; x < queue->page_count; x++) {
c1a21ebc
JS
14847 dmabuf = kzalloc_node(sizeof(*dmabuf), GFP_KERNEL,
14848 dev_to_node(&phba->pcidev->dev));
4f774513
JS
14849 if (!dmabuf)
14850 goto out_fail;
750afb08
LC
14851 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
14852 hw_page_size, &dmabuf->phys,
14853 GFP_KERNEL);
4f774513
JS
14854 if (!dmabuf->virt) {
14855 kfree(dmabuf);
14856 goto out_fail;
14857 }
14858 dmabuf->buffer_tag = x;
14859 list_add_tail(&dmabuf->list, &queue->page_list);
9afbee3d
JS
14860 /* use lpfc_sli4_qe to index a paritcular entry in this page */
14861 queue->q_pgs[x] = dmabuf->virt;
4f774513 14862 }
f485c18d
DK
14863 INIT_WORK(&queue->irqwork, lpfc_sli4_hba_process_cq);
14864 INIT_WORK(&queue->spwork, lpfc_sli4_sp_process_cq);
32517fc0
JS
14865 INIT_DELAYED_WORK(&queue->sched_irqwork, lpfc_sli4_dly_hba_process_cq);
14866 INIT_DELAYED_WORK(&queue->sched_spwork, lpfc_sli4_dly_sp_process_cq);
4f774513 14867
32517fc0 14868 /* notify_interval will be set during q creation */
64eb4dcb 14869
4f774513
JS
14870 return queue;
14871out_fail:
14872 lpfc_sli4_queue_free(queue);
14873 return NULL;
14874}
14875
962bc51b
JS
14876/**
14877 * lpfc_dual_chute_pci_bar_map - Map pci base address register to host memory
14878 * @phba: HBA structure that indicates port to create a queue on.
14879 * @pci_barset: PCI BAR set flag.
14880 *
14881 * This function shall perform iomap of the specified PCI BAR address to host
14882 * memory address if not already done so and return it. The returned host
14883 * memory address can be NULL.
14884 */
14885static void __iomem *
14886lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset)
14887{
962bc51b
JS
14888 if (!phba->pcidev)
14889 return NULL;
962bc51b
JS
14890
14891 switch (pci_barset) {
14892 case WQ_PCI_BAR_0_AND_1:
962bc51b
JS
14893 return phba->pci_bar0_memmap_p;
14894 case WQ_PCI_BAR_2_AND_3:
962bc51b
JS
14895 return phba->pci_bar2_memmap_p;
14896 case WQ_PCI_BAR_4_AND_5:
962bc51b
JS
14897 return phba->pci_bar4_memmap_p;
14898 default:
14899 break;
14900 }
14901 return NULL;
14902}
14903
173edbb2 14904/**
cb733e35
JS
14905 * lpfc_modify_hba_eq_delay - Modify Delay Multiplier on EQs
14906 * @phba: HBA structure that EQs are on.
14907 * @startq: The starting EQ index to modify
14908 * @numq: The number of EQs (consecutive indexes) to modify
14909 * @usdelay: amount of delay
173edbb2 14910 *
cb733e35
JS
14911 * This function revises the EQ delay on 1 or more EQs. The EQ delay
14912 * is set either by writing to a register (if supported by the SLI Port)
14913 * or by mailbox command. The mailbox command allows several EQs to be
14914 * updated at once.
173edbb2 14915 *
cb733e35
JS
14916 * The @phba struct is used to send a mailbox command to HBA. The @startq
14917 * is used to get the starting EQ index to change. The @numq value is
14918 * used to specify how many consecutive EQ indexes, starting at EQ index,
14919 * are to be changed. This function is asynchronous and will wait for any
14920 * mailbox commands to finish before returning.
173edbb2 14921 *
cb733e35
JS
14922 * On success this function will return a zero. If unable to allocate
14923 * enough memory this function will return -ENOMEM. If a mailbox command
14924 * fails this function will return -ENXIO. Note: on ENXIO, some EQs may
14925 * have had their delay multipler changed.
173edbb2 14926 **/
cb733e35 14927void
0cf07f84 14928lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
cb733e35 14929 uint32_t numq, uint32_t usdelay)
173edbb2
JS
14930{
14931 struct lpfc_mbx_modify_eq_delay *eq_delay;
14932 LPFC_MBOXQ_t *mbox;
14933 struct lpfc_queue *eq;
cb733e35 14934 int cnt = 0, rc, length;
173edbb2 14935 uint32_t shdr_status, shdr_add_status;
cb733e35 14936 uint32_t dmult;
895427bd 14937 int qidx;
173edbb2 14938 union lpfc_sli4_cfg_shdr *shdr;
173edbb2 14939
6a828b0f 14940 if (startq >= phba->cfg_irq_chann)
cb733e35
JS
14941 return;
14942
14943 if (usdelay > 0xFFFF) {
14944 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP | LOG_NVME,
14945 "6429 usdelay %d too large. Scaled down to "
14946 "0xFFFF.\n", usdelay);
14947 usdelay = 0xFFFF;
14948 }
14949
14950 /* set values by EQ_DELAY register if supported */
14951 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
14952 for (qidx = startq; qidx < phba->cfg_irq_chann; qidx++) {
657add4e 14953 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
cb733e35
JS
14954 if (!eq)
14955 continue;
14956
32517fc0 14957 lpfc_sli4_mod_hba_eq_delay(phba, eq, usdelay);
cb733e35
JS
14958
14959 if (++cnt >= numq)
14960 break;
14961 }
cb733e35
JS
14962 return;
14963 }
14964
14965 /* Otherwise, set values by mailbox cmd */
173edbb2
JS
14966
14967 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
cb733e35 14968 if (!mbox) {
372c187b 14969 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
cb733e35
JS
14970 "6428 Failed allocating mailbox cmd buffer."
14971 " EQ delay was not set.\n");
14972 return;
14973 }
173edbb2
JS
14974 length = (sizeof(struct lpfc_mbx_modify_eq_delay) -
14975 sizeof(struct lpfc_sli4_cfg_mhdr));
14976 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14977 LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY,
14978 length, LPFC_SLI4_MBX_EMBED);
14979 eq_delay = &mbox->u.mqe.un.eq_delay;
14980
14981 /* Calculate delay multiper from maximum interrupt per second */
cb733e35
JS
14982 dmult = (usdelay * LPFC_DMULT_CONST) / LPFC_SEC_TO_USEC;
14983 if (dmult)
14984 dmult--;
0cf07f84
JS
14985 if (dmult > LPFC_DMULT_MAX)
14986 dmult = LPFC_DMULT_MAX;
173edbb2 14987
6a828b0f 14988 for (qidx = startq; qidx < phba->cfg_irq_chann; qidx++) {
657add4e 14989 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
173edbb2
JS
14990 if (!eq)
14991 continue;
cb733e35 14992 eq->q_mode = usdelay;
173edbb2
JS
14993 eq_delay->u.request.eq[cnt].eq_id = eq->queue_id;
14994 eq_delay->u.request.eq[cnt].phase = 0;
14995 eq_delay->u.request.eq[cnt].delay_multi = dmult;
0cf07f84 14996
cb733e35 14997 if (++cnt >= numq)
173edbb2
JS
14998 break;
14999 }
15000 eq_delay->u.request.num_eq = cnt;
15001
15002 mbox->vport = phba->pport;
15003 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
15004 mbox->ctx_buf = NULL;
15005 mbox->ctx_ndlp = NULL;
173edbb2
JS
15006 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15007 shdr = (union lpfc_sli4_cfg_shdr *) &eq_delay->header.cfg_shdr;
15008 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15009 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15010 if (shdr_status || shdr_add_status || rc) {
372c187b 15011 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
173edbb2
JS
15012 "2512 MODIFY_EQ_DELAY mailbox failed with "
15013 "status x%x add_status x%x, mbx status x%x\n",
15014 shdr_status, shdr_add_status, rc);
173edbb2
JS
15015 }
15016 mempool_free(mbox, phba->mbox_mem_pool);
cb733e35 15017 return;
173edbb2
JS
15018}
15019
4f774513
JS
15020/**
15021 * lpfc_eq_create - Create an Event Queue on the HBA
15022 * @phba: HBA structure that indicates port to create a queue on.
15023 * @eq: The queue structure to use to create the event queue.
15024 * @imax: The maximum interrupt per second limit.
15025 *
15026 * This function creates an event queue, as detailed in @eq, on a port,
15027 * described by @phba by sending an EQ_CREATE mailbox command to the HBA.
15028 *
15029 * The @phba struct is used to send mailbox command to HBA. The @eq struct
15030 * is used to get the entry count and entry size that are necessary to
15031 * determine the number of pages to allocate and use for this queue. This
15032 * function will send the EQ_CREATE mailbox command to the HBA to setup the
15033 * event queue. This function is asynchronous and will wait for the mailbox
15034 * command to finish before continuing.
15035 *
15036 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15037 * memory this function will return -ENOMEM. If the queue create mailbox command
15038 * fails this function will return -ENXIO.
4f774513 15039 **/
a2fc4aef 15040int
ee02006b 15041lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
4f774513
JS
15042{
15043 struct lpfc_mbx_eq_create *eq_create;
15044 LPFC_MBOXQ_t *mbox;
15045 int rc, length, status = 0;
15046 struct lpfc_dmabuf *dmabuf;
15047 uint32_t shdr_status, shdr_add_status;
15048 union lpfc_sli4_cfg_shdr *shdr;
15049 uint16_t dmult;
49198b37
JS
15050 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
15051
2e90f4b5
JS
15052 /* sanity check on queue memory */
15053 if (!eq)
15054 return -ENODEV;
49198b37
JS
15055 if (!phba->sli4_hba.pc_sli4_params.supported)
15056 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
15057
15058 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15059 if (!mbox)
15060 return -ENOMEM;
15061 length = (sizeof(struct lpfc_mbx_eq_create) -
15062 sizeof(struct lpfc_sli4_cfg_mhdr));
15063 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15064 LPFC_MBOX_OPCODE_EQ_CREATE,
15065 length, LPFC_SLI4_MBX_EMBED);
15066 eq_create = &mbox->u.mqe.un.eq_create;
7365f6fd 15067 shdr = (union lpfc_sli4_cfg_shdr *) &eq_create->header.cfg_shdr;
4f774513
JS
15068 bf_set(lpfc_mbx_eq_create_num_pages, &eq_create->u.request,
15069 eq->page_count);
15070 bf_set(lpfc_eq_context_size, &eq_create->u.request.context,
15071 LPFC_EQE_SIZE);
15072 bf_set(lpfc_eq_context_valid, &eq_create->u.request.context, 1);
7365f6fd
JS
15073
15074 /* Use version 2 of CREATE_EQ if eqav is set */
15075 if (phba->sli4_hba.pc_sli4_params.eqav) {
15076 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15077 LPFC_Q_CREATE_VERSION_2);
15078 bf_set(lpfc_eq_context_autovalid, &eq_create->u.request.context,
15079 phba->sli4_hba.pc_sli4_params.eqav);
15080 }
15081
2c9c5a00
JS
15082 /* don't setup delay multiplier using EQ_CREATE */
15083 dmult = 0;
4f774513
JS
15084 bf_set(lpfc_eq_context_delay_multi, &eq_create->u.request.context,
15085 dmult);
15086 switch (eq->entry_count) {
15087 default:
372c187b 15088 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
15089 "0360 Unsupported EQ count. (%d)\n",
15090 eq->entry_count);
04d210c9
JS
15091 if (eq->entry_count < 256) {
15092 status = -EINVAL;
15093 goto out;
15094 }
5bd5f66c 15095 /* fall through - otherwise default to smallest count */
4f774513
JS
15096 case 256:
15097 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
15098 LPFC_EQ_CNT_256);
15099 break;
15100 case 512:
15101 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
15102 LPFC_EQ_CNT_512);
15103 break;
15104 case 1024:
15105 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
15106 LPFC_EQ_CNT_1024);
15107 break;
15108 case 2048:
15109 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
15110 LPFC_EQ_CNT_2048);
15111 break;
15112 case 4096:
15113 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
15114 LPFC_EQ_CNT_4096);
15115 break;
15116 }
15117 list_for_each_entry(dmabuf, &eq->page_list, list) {
49198b37 15118 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
15119 eq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15120 putPaddrLow(dmabuf->phys);
15121 eq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15122 putPaddrHigh(dmabuf->phys);
15123 }
15124 mbox->vport = phba->pport;
15125 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
15126 mbox->ctx_buf = NULL;
15127 mbox->ctx_ndlp = NULL;
4f774513 15128 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
4f774513
JS
15129 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15130 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15131 if (shdr_status || shdr_add_status || rc) {
372c187b 15132 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
15133 "2500 EQ_CREATE mailbox failed with "
15134 "status x%x add_status x%x, mbx status x%x\n",
15135 shdr_status, shdr_add_status, rc);
15136 status = -ENXIO;
15137 }
15138 eq->type = LPFC_EQ;
15139 eq->subtype = LPFC_NONE;
15140 eq->queue_id = bf_get(lpfc_mbx_eq_create_q_id, &eq_create->u.response);
15141 if (eq->queue_id == 0xFFFF)
15142 status = -ENXIO;
15143 eq->host_index = 0;
32517fc0
JS
15144 eq->notify_interval = LPFC_EQ_NOTIFY_INTRVL;
15145 eq->max_proc_limit = LPFC_EQ_MAX_PROC_LIMIT;
04d210c9 15146out:
8fa38513 15147 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15148 return status;
15149}
15150
317aeb83
DK
15151static int lpfc_cq_poll_hdler(struct irq_poll *iop, int budget)
15152{
15153 struct lpfc_queue *cq = container_of(iop, struct lpfc_queue, iop);
15154
26e0b9aa 15155 __lpfc_sli4_hba_process_cq(cq, LPFC_IRQ_POLL);
317aeb83
DK
15156
15157 return 1;
15158}
15159
4f774513
JS
15160/**
15161 * lpfc_cq_create - Create a Completion Queue on the HBA
15162 * @phba: HBA structure that indicates port to create a queue on.
15163 * @cq: The queue structure to use to create the completion queue.
15164 * @eq: The event queue to bind this completion queue to.
7af29d45
LJ
15165 * @type: Type of queue (EQ, GCQ, MCQ, WCQ, etc).
15166 * @subtype: Functional purpose of the queue (MBOX, IO, ELS, NVMET, etc).
4f774513
JS
15167 *
15168 * This function creates a completion queue, as detailed in @wq, on a port,
15169 * described by @phba by sending a CQ_CREATE mailbox command to the HBA.
15170 *
15171 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15172 * is used to get the entry count and entry size that are necessary to
15173 * determine the number of pages to allocate and use for this queue. The @eq
15174 * is used to indicate which event queue to bind this completion queue to. This
15175 * function will send the CQ_CREATE mailbox command to the HBA to setup the
15176 * completion queue. This function is asynchronous and will wait for the mailbox
15177 * command to finish before continuing.
15178 *
15179 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15180 * memory this function will return -ENOMEM. If the queue create mailbox command
15181 * fails this function will return -ENXIO.
4f774513 15182 **/
a2fc4aef 15183int
4f774513
JS
15184lpfc_cq_create(struct lpfc_hba *phba, struct lpfc_queue *cq,
15185 struct lpfc_queue *eq, uint32_t type, uint32_t subtype)
15186{
15187 struct lpfc_mbx_cq_create *cq_create;
15188 struct lpfc_dmabuf *dmabuf;
15189 LPFC_MBOXQ_t *mbox;
15190 int rc, length, status = 0;
15191 uint32_t shdr_status, shdr_add_status;
15192 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15193
2e90f4b5
JS
15194 /* sanity check on queue memory */
15195 if (!cq || !eq)
15196 return -ENODEV;
49198b37 15197
4f774513
JS
15198 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15199 if (!mbox)
15200 return -ENOMEM;
15201 length = (sizeof(struct lpfc_mbx_cq_create) -
15202 sizeof(struct lpfc_sli4_cfg_mhdr));
15203 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15204 LPFC_MBOX_OPCODE_CQ_CREATE,
15205 length, LPFC_SLI4_MBX_EMBED);
15206 cq_create = &mbox->u.mqe.un.cq_create;
5a6f133e 15207 shdr = (union lpfc_sli4_cfg_shdr *) &cq_create->header.cfg_shdr;
4f774513
JS
15208 bf_set(lpfc_mbx_cq_create_num_pages, &cq_create->u.request,
15209 cq->page_count);
15210 bf_set(lpfc_cq_context_event, &cq_create->u.request.context, 1);
15211 bf_set(lpfc_cq_context_valid, &cq_create->u.request.context, 1);
5a6f133e
JS
15212 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15213 phba->sli4_hba.pc_sli4_params.cqv);
15214 if (phba->sli4_hba.pc_sli4_params.cqv == LPFC_Q_CREATE_VERSION_2) {
81b96eda
JS
15215 bf_set(lpfc_mbx_cq_create_page_size, &cq_create->u.request,
15216 (cq->page_size / SLI4_PAGE_SIZE));
5a6f133e
JS
15217 bf_set(lpfc_cq_eq_id_2, &cq_create->u.request.context,
15218 eq->queue_id);
7365f6fd
JS
15219 bf_set(lpfc_cq_context_autovalid, &cq_create->u.request.context,
15220 phba->sli4_hba.pc_sli4_params.cqav);
5a6f133e
JS
15221 } else {
15222 bf_set(lpfc_cq_eq_id, &cq_create->u.request.context,
15223 eq->queue_id);
15224 }
4f774513 15225 switch (cq->entry_count) {
81b96eda
JS
15226 case 2048:
15227 case 4096:
15228 if (phba->sli4_hba.pc_sli4_params.cqv ==
15229 LPFC_Q_CREATE_VERSION_2) {
15230 cq_create->u.request.context.lpfc_cq_context_count =
15231 cq->entry_count;
15232 bf_set(lpfc_cq_context_count,
15233 &cq_create->u.request.context,
15234 LPFC_CQ_CNT_WORD7);
15235 break;
15236 }
5bd5f66c 15237 /* fall through */
4f774513 15238 default:
372c187b 15239 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2ea259ee 15240 "0361 Unsupported CQ count: "
64eb4dcb 15241 "entry cnt %d sz %d pg cnt %d\n",
2ea259ee 15242 cq->entry_count, cq->entry_size,
64eb4dcb 15243 cq->page_count);
4f4c1863
JS
15244 if (cq->entry_count < 256) {
15245 status = -EINVAL;
15246 goto out;
15247 }
5bd5f66c 15248 /* fall through - otherwise default to smallest count */
4f774513
JS
15249 case 256:
15250 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
15251 LPFC_CQ_CNT_256);
15252 break;
15253 case 512:
15254 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
15255 LPFC_CQ_CNT_512);
15256 break;
15257 case 1024:
15258 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
15259 LPFC_CQ_CNT_1024);
15260 break;
15261 }
15262 list_for_each_entry(dmabuf, &cq->page_list, list) {
81b96eda 15263 memset(dmabuf->virt, 0, cq->page_size);
4f774513
JS
15264 cq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15265 putPaddrLow(dmabuf->phys);
15266 cq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15267 putPaddrHigh(dmabuf->phys);
15268 }
15269 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15270
15271 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15272 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15273 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15274 if (shdr_status || shdr_add_status || rc) {
372c187b 15275 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
15276 "2501 CQ_CREATE mailbox failed with "
15277 "status x%x add_status x%x, mbx status x%x\n",
15278 shdr_status, shdr_add_status, rc);
15279 status = -ENXIO;
15280 goto out;
15281 }
15282 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
15283 if (cq->queue_id == 0xFFFF) {
15284 status = -ENXIO;
15285 goto out;
15286 }
15287 /* link the cq onto the parent eq child list */
15288 list_add_tail(&cq->list, &eq->child_list);
15289 /* Set up completion queue's type and subtype */
15290 cq->type = type;
15291 cq->subtype = subtype;
15292 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
2a622bfb 15293 cq->assoc_qid = eq->queue_id;
6a828b0f 15294 cq->assoc_qp = eq;
4f774513 15295 cq->host_index = 0;
32517fc0
JS
15296 cq->notify_interval = LPFC_CQ_NOTIFY_INTRVL;
15297 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit, cq->entry_count);
4f774513 15298
6a828b0f
JS
15299 if (cq->queue_id > phba->sli4_hba.cq_max)
15300 phba->sli4_hba.cq_max = cq->queue_id;
317aeb83
DK
15301
15302 irq_poll_init(&cq->iop, LPFC_IRQ_POLL_WEIGHT, lpfc_cq_poll_hdler);
8fa38513
JS
15303out:
15304 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15305 return status;
15306}
15307
2d7dbc4c
JS
15308/**
15309 * lpfc_cq_create_set - Create a set of Completion Queues on the HBA for MRQ
15310 * @phba: HBA structure that indicates port to create a queue on.
15311 * @cqp: The queue structure array to use to create the completion queues.
cdb42bec 15312 * @hdwq: The hardware queue array with the EQ to bind completion queues to.
7af29d45
LJ
15313 * @type: Type of queue (EQ, GCQ, MCQ, WCQ, etc).
15314 * @subtype: Functional purpose of the queue (MBOX, IO, ELS, NVMET, etc).
2d7dbc4c
JS
15315 *
15316 * This function creates a set of completion queue, s to support MRQ
15317 * as detailed in @cqp, on a port,
15318 * described by @phba by sending a CREATE_CQ_SET mailbox command to the HBA.
15319 *
15320 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15321 * is used to get the entry count and entry size that are necessary to
15322 * determine the number of pages to allocate and use for this queue. The @eq
15323 * is used to indicate which event queue to bind this completion queue to. This
15324 * function will send the CREATE_CQ_SET mailbox command to the HBA to setup the
15325 * completion queue. This function is asynchronous and will wait for the mailbox
15326 * command to finish before continuing.
15327 *
15328 * On success this function will return a zero. If unable to allocate enough
15329 * memory this function will return -ENOMEM. If the queue create mailbox command
15330 * fails this function will return -ENXIO.
15331 **/
15332int
15333lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
cdb42bec
JS
15334 struct lpfc_sli4_hdw_queue *hdwq, uint32_t type,
15335 uint32_t subtype)
2d7dbc4c
JS
15336{
15337 struct lpfc_queue *cq;
15338 struct lpfc_queue *eq;
15339 struct lpfc_mbx_cq_create_set *cq_set;
15340 struct lpfc_dmabuf *dmabuf;
15341 LPFC_MBOXQ_t *mbox;
15342 int rc, length, alloclen, status = 0;
15343 int cnt, idx, numcq, page_idx = 0;
15344 uint32_t shdr_status, shdr_add_status;
15345 union lpfc_sli4_cfg_shdr *shdr;
15346 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
15347
15348 /* sanity check on queue memory */
15349 numcq = phba->cfg_nvmet_mrq;
cdb42bec 15350 if (!cqp || !hdwq || !numcq)
2d7dbc4c 15351 return -ENODEV;
2d7dbc4c
JS
15352
15353 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15354 if (!mbox)
15355 return -ENOMEM;
15356
15357 length = sizeof(struct lpfc_mbx_cq_create_set);
15358 length += ((numcq * cqp[0]->page_count) *
15359 sizeof(struct dma_address));
15360 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15361 LPFC_MBOX_OPCODE_FCOE_CQ_CREATE_SET, length,
15362 LPFC_SLI4_MBX_NEMBED);
15363 if (alloclen < length) {
372c187b 15364 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2d7dbc4c
JS
15365 "3098 Allocated DMA memory size (%d) is "
15366 "less than the requested DMA memory size "
15367 "(%d)\n", alloclen, length);
15368 status = -ENOMEM;
15369 goto out;
15370 }
15371 cq_set = mbox->sge_array->addr[0];
15372 shdr = (union lpfc_sli4_cfg_shdr *)&cq_set->cfg_shdr;
15373 bf_set(lpfc_mbox_hdr_version, &shdr->request, 0);
15374
15375 for (idx = 0; idx < numcq; idx++) {
15376 cq = cqp[idx];
cdb42bec 15377 eq = hdwq[idx].hba_eq;
2d7dbc4c
JS
15378 if (!cq || !eq) {
15379 status = -ENOMEM;
15380 goto out;
15381 }
81b96eda
JS
15382 if (!phba->sli4_hba.pc_sli4_params.supported)
15383 hw_page_size = cq->page_size;
2d7dbc4c
JS
15384
15385 switch (idx) {
15386 case 0:
15387 bf_set(lpfc_mbx_cq_create_set_page_size,
15388 &cq_set->u.request,
15389 (hw_page_size / SLI4_PAGE_SIZE));
15390 bf_set(lpfc_mbx_cq_create_set_num_pages,
15391 &cq_set->u.request, cq->page_count);
15392 bf_set(lpfc_mbx_cq_create_set_evt,
15393 &cq_set->u.request, 1);
15394 bf_set(lpfc_mbx_cq_create_set_valid,
15395 &cq_set->u.request, 1);
15396 bf_set(lpfc_mbx_cq_create_set_cqe_size,
15397 &cq_set->u.request, 0);
15398 bf_set(lpfc_mbx_cq_create_set_num_cq,
15399 &cq_set->u.request, numcq);
7365f6fd
JS
15400 bf_set(lpfc_mbx_cq_create_set_autovalid,
15401 &cq_set->u.request,
15402 phba->sli4_hba.pc_sli4_params.cqav);
2d7dbc4c 15403 switch (cq->entry_count) {
81b96eda
JS
15404 case 2048:
15405 case 4096:
15406 if (phba->sli4_hba.pc_sli4_params.cqv ==
15407 LPFC_Q_CREATE_VERSION_2) {
15408 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15409 &cq_set->u.request,
15410 cq->entry_count);
15411 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15412 &cq_set->u.request,
15413 LPFC_CQ_CNT_WORD7);
15414 break;
15415 }
5bd5f66c 15416 /* fall through */
2d7dbc4c 15417 default:
372c187b 15418 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2d7dbc4c
JS
15419 "3118 Bad CQ count. (%d)\n",
15420 cq->entry_count);
15421 if (cq->entry_count < 256) {
15422 status = -EINVAL;
15423 goto out;
15424 }
5bd5f66c 15425 /* fall through - otherwise default to smallest */
2d7dbc4c
JS
15426 case 256:
15427 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15428 &cq_set->u.request, LPFC_CQ_CNT_256);
15429 break;
15430 case 512:
15431 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15432 &cq_set->u.request, LPFC_CQ_CNT_512);
15433 break;
15434 case 1024:
15435 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15436 &cq_set->u.request, LPFC_CQ_CNT_1024);
15437 break;
15438 }
15439 bf_set(lpfc_mbx_cq_create_set_eq_id0,
15440 &cq_set->u.request, eq->queue_id);
15441 break;
15442 case 1:
15443 bf_set(lpfc_mbx_cq_create_set_eq_id1,
15444 &cq_set->u.request, eq->queue_id);
15445 break;
15446 case 2:
15447 bf_set(lpfc_mbx_cq_create_set_eq_id2,
15448 &cq_set->u.request, eq->queue_id);
15449 break;
15450 case 3:
15451 bf_set(lpfc_mbx_cq_create_set_eq_id3,
15452 &cq_set->u.request, eq->queue_id);
15453 break;
15454 case 4:
15455 bf_set(lpfc_mbx_cq_create_set_eq_id4,
15456 &cq_set->u.request, eq->queue_id);
15457 break;
15458 case 5:
15459 bf_set(lpfc_mbx_cq_create_set_eq_id5,
15460 &cq_set->u.request, eq->queue_id);
15461 break;
15462 case 6:
15463 bf_set(lpfc_mbx_cq_create_set_eq_id6,
15464 &cq_set->u.request, eq->queue_id);
15465 break;
15466 case 7:
15467 bf_set(lpfc_mbx_cq_create_set_eq_id7,
15468 &cq_set->u.request, eq->queue_id);
15469 break;
15470 case 8:
15471 bf_set(lpfc_mbx_cq_create_set_eq_id8,
15472 &cq_set->u.request, eq->queue_id);
15473 break;
15474 case 9:
15475 bf_set(lpfc_mbx_cq_create_set_eq_id9,
15476 &cq_set->u.request, eq->queue_id);
15477 break;
15478 case 10:
15479 bf_set(lpfc_mbx_cq_create_set_eq_id10,
15480 &cq_set->u.request, eq->queue_id);
15481 break;
15482 case 11:
15483 bf_set(lpfc_mbx_cq_create_set_eq_id11,
15484 &cq_set->u.request, eq->queue_id);
15485 break;
15486 case 12:
15487 bf_set(lpfc_mbx_cq_create_set_eq_id12,
15488 &cq_set->u.request, eq->queue_id);
15489 break;
15490 case 13:
15491 bf_set(lpfc_mbx_cq_create_set_eq_id13,
15492 &cq_set->u.request, eq->queue_id);
15493 break;
15494 case 14:
15495 bf_set(lpfc_mbx_cq_create_set_eq_id14,
15496 &cq_set->u.request, eq->queue_id);
15497 break;
15498 case 15:
15499 bf_set(lpfc_mbx_cq_create_set_eq_id15,
15500 &cq_set->u.request, eq->queue_id);
15501 break;
15502 }
15503
15504 /* link the cq onto the parent eq child list */
15505 list_add_tail(&cq->list, &eq->child_list);
15506 /* Set up completion queue's type and subtype */
15507 cq->type = type;
15508 cq->subtype = subtype;
15509 cq->assoc_qid = eq->queue_id;
6a828b0f 15510 cq->assoc_qp = eq;
2d7dbc4c 15511 cq->host_index = 0;
32517fc0
JS
15512 cq->notify_interval = LPFC_CQ_NOTIFY_INTRVL;
15513 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit,
15514 cq->entry_count);
81b96eda 15515 cq->chann = idx;
2d7dbc4c
JS
15516
15517 rc = 0;
15518 list_for_each_entry(dmabuf, &cq->page_list, list) {
15519 memset(dmabuf->virt, 0, hw_page_size);
15520 cnt = page_idx + dmabuf->buffer_tag;
15521 cq_set->u.request.page[cnt].addr_lo =
15522 putPaddrLow(dmabuf->phys);
15523 cq_set->u.request.page[cnt].addr_hi =
15524 putPaddrHigh(dmabuf->phys);
15525 rc++;
15526 }
15527 page_idx += rc;
15528 }
15529
15530 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15531
15532 /* The IOCTL status is embedded in the mailbox subheader. */
15533 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15534 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15535 if (shdr_status || shdr_add_status || rc) {
372c187b 15536 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2d7dbc4c
JS
15537 "3119 CQ_CREATE_SET mailbox failed with "
15538 "status x%x add_status x%x, mbx status x%x\n",
15539 shdr_status, shdr_add_status, rc);
15540 status = -ENXIO;
15541 goto out;
15542 }
15543 rc = bf_get(lpfc_mbx_cq_create_set_base_id, &cq_set->u.response);
15544 if (rc == 0xFFFF) {
15545 status = -ENXIO;
15546 goto out;
15547 }
15548
15549 for (idx = 0; idx < numcq; idx++) {
15550 cq = cqp[idx];
15551 cq->queue_id = rc + idx;
6a828b0f
JS
15552 if (cq->queue_id > phba->sli4_hba.cq_max)
15553 phba->sli4_hba.cq_max = cq->queue_id;
2d7dbc4c
JS
15554 }
15555
15556out:
15557 lpfc_sli4_mbox_cmd_free(phba, mbox);
15558 return status;
15559}
15560
b19a061a
JS
15561/**
15562 * lpfc_mq_create_fb_init - Send MCC_CREATE without async events registration
15563 * @phba: HBA structure that indicates port to create a queue on.
15564 * @mq: The queue structure to use to create the mailbox queue.
15565 * @mbox: An allocated pointer to type LPFC_MBOXQ_t
15566 * @cq: The completion queue to associate with this cq.
15567 *
15568 * This function provides failback (fb) functionality when the
15569 * mq_create_ext fails on older FW generations. It's purpose is identical
15570 * to mq_create_ext otherwise.
15571 *
15572 * This routine cannot fail as all attributes were previously accessed and
15573 * initialized in mq_create_ext.
15574 **/
15575static void
15576lpfc_mq_create_fb_init(struct lpfc_hba *phba, struct lpfc_queue *mq,
15577 LPFC_MBOXQ_t *mbox, struct lpfc_queue *cq)
15578{
15579 struct lpfc_mbx_mq_create *mq_create;
15580 struct lpfc_dmabuf *dmabuf;
15581 int length;
15582
15583 length = (sizeof(struct lpfc_mbx_mq_create) -
15584 sizeof(struct lpfc_sli4_cfg_mhdr));
15585 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15586 LPFC_MBOX_OPCODE_MQ_CREATE,
15587 length, LPFC_SLI4_MBX_EMBED);
15588 mq_create = &mbox->u.mqe.un.mq_create;
15589 bf_set(lpfc_mbx_mq_create_num_pages, &mq_create->u.request,
15590 mq->page_count);
15591 bf_set(lpfc_mq_context_cq_id, &mq_create->u.request.context,
15592 cq->queue_id);
15593 bf_set(lpfc_mq_context_valid, &mq_create->u.request.context, 1);
15594 switch (mq->entry_count) {
15595 case 16:
5a6f133e
JS
15596 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15597 LPFC_MQ_RING_SIZE_16);
b19a061a
JS
15598 break;
15599 case 32:
5a6f133e
JS
15600 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15601 LPFC_MQ_RING_SIZE_32);
b19a061a
JS
15602 break;
15603 case 64:
5a6f133e
JS
15604 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15605 LPFC_MQ_RING_SIZE_64);
b19a061a
JS
15606 break;
15607 case 128:
5a6f133e
JS
15608 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15609 LPFC_MQ_RING_SIZE_128);
b19a061a
JS
15610 break;
15611 }
15612 list_for_each_entry(dmabuf, &mq->page_list, list) {
15613 mq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15614 putPaddrLow(dmabuf->phys);
15615 mq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15616 putPaddrHigh(dmabuf->phys);
15617 }
15618}
15619
04c68496
JS
15620/**
15621 * lpfc_mq_create - Create a mailbox Queue on the HBA
15622 * @phba: HBA structure that indicates port to create a queue on.
15623 * @mq: The queue structure to use to create the mailbox queue.
b19a061a
JS
15624 * @cq: The completion queue to associate with this cq.
15625 * @subtype: The queue's subtype.
04c68496
JS
15626 *
15627 * This function creates a mailbox queue, as detailed in @mq, on a port,
15628 * described by @phba by sending a MQ_CREATE mailbox command to the HBA.
15629 *
15630 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15631 * is used to get the entry count and entry size that are necessary to
15632 * determine the number of pages to allocate and use for this queue. This
15633 * function will send the MQ_CREATE mailbox command to the HBA to setup the
15634 * mailbox queue. This function is asynchronous and will wait for the mailbox
15635 * command to finish before continuing.
15636 *
15637 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15638 * memory this function will return -ENOMEM. If the queue create mailbox command
15639 * fails this function will return -ENXIO.
04c68496 15640 **/
b19a061a 15641int32_t
04c68496
JS
15642lpfc_mq_create(struct lpfc_hba *phba, struct lpfc_queue *mq,
15643 struct lpfc_queue *cq, uint32_t subtype)
15644{
15645 struct lpfc_mbx_mq_create *mq_create;
b19a061a 15646 struct lpfc_mbx_mq_create_ext *mq_create_ext;
04c68496
JS
15647 struct lpfc_dmabuf *dmabuf;
15648 LPFC_MBOXQ_t *mbox;
15649 int rc, length, status = 0;
15650 uint32_t shdr_status, shdr_add_status;
15651 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15652 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
04c68496 15653
2e90f4b5
JS
15654 /* sanity check on queue memory */
15655 if (!mq || !cq)
15656 return -ENODEV;
49198b37
JS
15657 if (!phba->sli4_hba.pc_sli4_params.supported)
15658 hw_page_size = SLI4_PAGE_SIZE;
b19a061a 15659
04c68496
JS
15660 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15661 if (!mbox)
15662 return -ENOMEM;
b19a061a 15663 length = (sizeof(struct lpfc_mbx_mq_create_ext) -
04c68496
JS
15664 sizeof(struct lpfc_sli4_cfg_mhdr));
15665 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
b19a061a 15666 LPFC_MBOX_OPCODE_MQ_CREATE_EXT,
04c68496 15667 length, LPFC_SLI4_MBX_EMBED);
b19a061a
JS
15668
15669 mq_create_ext = &mbox->u.mqe.un.mq_create_ext;
5a6f133e 15670 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create_ext->header.cfg_shdr;
70f3c073
JS
15671 bf_set(lpfc_mbx_mq_create_ext_num_pages,
15672 &mq_create_ext->u.request, mq->page_count);
15673 bf_set(lpfc_mbx_mq_create_ext_async_evt_link,
15674 &mq_create_ext->u.request, 1);
15675 bf_set(lpfc_mbx_mq_create_ext_async_evt_fip,
b19a061a
JS
15676 &mq_create_ext->u.request, 1);
15677 bf_set(lpfc_mbx_mq_create_ext_async_evt_group5,
15678 &mq_create_ext->u.request, 1);
70f3c073
JS
15679 bf_set(lpfc_mbx_mq_create_ext_async_evt_fc,
15680 &mq_create_ext->u.request, 1);
15681 bf_set(lpfc_mbx_mq_create_ext_async_evt_sli,
15682 &mq_create_ext->u.request, 1);
b19a061a 15683 bf_set(lpfc_mq_context_valid, &mq_create_ext->u.request.context, 1);
5a6f133e
JS
15684 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15685 phba->sli4_hba.pc_sli4_params.mqv);
15686 if (phba->sli4_hba.pc_sli4_params.mqv == LPFC_Q_CREATE_VERSION_1)
15687 bf_set(lpfc_mbx_mq_create_ext_cq_id, &mq_create_ext->u.request,
15688 cq->queue_id);
15689 else
15690 bf_set(lpfc_mq_context_cq_id, &mq_create_ext->u.request.context,
15691 cq->queue_id);
04c68496
JS
15692 switch (mq->entry_count) {
15693 default:
372c187b 15694 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
04c68496
JS
15695 "0362 Unsupported MQ count. (%d)\n",
15696 mq->entry_count);
4f4c1863
JS
15697 if (mq->entry_count < 16) {
15698 status = -EINVAL;
15699 goto out;
15700 }
5bd5f66c 15701 /* fall through - otherwise default to smallest count */
04c68496 15702 case 16:
5a6f133e
JS
15703 bf_set(lpfc_mq_context_ring_size,
15704 &mq_create_ext->u.request.context,
15705 LPFC_MQ_RING_SIZE_16);
04c68496
JS
15706 break;
15707 case 32:
5a6f133e
JS
15708 bf_set(lpfc_mq_context_ring_size,
15709 &mq_create_ext->u.request.context,
15710 LPFC_MQ_RING_SIZE_32);
04c68496
JS
15711 break;
15712 case 64:
5a6f133e
JS
15713 bf_set(lpfc_mq_context_ring_size,
15714 &mq_create_ext->u.request.context,
15715 LPFC_MQ_RING_SIZE_64);
04c68496
JS
15716 break;
15717 case 128:
5a6f133e
JS
15718 bf_set(lpfc_mq_context_ring_size,
15719 &mq_create_ext->u.request.context,
15720 LPFC_MQ_RING_SIZE_128);
04c68496
JS
15721 break;
15722 }
15723 list_for_each_entry(dmabuf, &mq->page_list, list) {
49198b37 15724 memset(dmabuf->virt, 0, hw_page_size);
b19a061a 15725 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_lo =
04c68496 15726 putPaddrLow(dmabuf->phys);
b19a061a 15727 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_hi =
04c68496
JS
15728 putPaddrHigh(dmabuf->phys);
15729 }
15730 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
b19a061a
JS
15731 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15732 &mq_create_ext->u.response);
15733 if (rc != MBX_SUCCESS) {
15734 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15735 "2795 MQ_CREATE_EXT failed with "
15736 "status x%x. Failback to MQ_CREATE.\n",
15737 rc);
15738 lpfc_mq_create_fb_init(phba, mq, mbox, cq);
15739 mq_create = &mbox->u.mqe.un.mq_create;
15740 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15741 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create->header.cfg_shdr;
15742 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15743 &mq_create->u.response);
15744 }
15745
04c68496 15746 /* The IOCTL status is embedded in the mailbox subheader. */
04c68496
JS
15747 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15748 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15749 if (shdr_status || shdr_add_status || rc) {
372c187b 15750 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
04c68496
JS
15751 "2502 MQ_CREATE mailbox failed with "
15752 "status x%x add_status x%x, mbx status x%x\n",
15753 shdr_status, shdr_add_status, rc);
15754 status = -ENXIO;
15755 goto out;
15756 }
04c68496
JS
15757 if (mq->queue_id == 0xFFFF) {
15758 status = -ENXIO;
15759 goto out;
15760 }
15761 mq->type = LPFC_MQ;
2a622bfb 15762 mq->assoc_qid = cq->queue_id;
04c68496
JS
15763 mq->subtype = subtype;
15764 mq->host_index = 0;
15765 mq->hba_index = 0;
15766
15767 /* link the mq onto the parent cq child list */
15768 list_add_tail(&mq->list, &cq->child_list);
15769out:
8fa38513 15770 mempool_free(mbox, phba->mbox_mem_pool);
04c68496
JS
15771 return status;
15772}
15773
4f774513
JS
15774/**
15775 * lpfc_wq_create - Create a Work Queue on the HBA
15776 * @phba: HBA structure that indicates port to create a queue on.
15777 * @wq: The queue structure to use to create the work queue.
15778 * @cq: The completion queue to bind this work queue to.
15779 * @subtype: The subtype of the work queue indicating its functionality.
15780 *
15781 * This function creates a work queue, as detailed in @wq, on a port, described
15782 * by @phba by sending a WQ_CREATE mailbox command to the HBA.
15783 *
15784 * The @phba struct is used to send mailbox command to HBA. The @wq struct
15785 * is used to get the entry count and entry size that are necessary to
15786 * determine the number of pages to allocate and use for this queue. The @cq
15787 * is used to indicate which completion queue to bind this work queue to. This
15788 * function will send the WQ_CREATE mailbox command to the HBA to setup the
15789 * work queue. This function is asynchronous and will wait for the mailbox
15790 * command to finish before continuing.
15791 *
15792 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15793 * memory this function will return -ENOMEM. If the queue create mailbox command
15794 * fails this function will return -ENXIO.
4f774513 15795 **/
a2fc4aef 15796int
4f774513
JS
15797lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq,
15798 struct lpfc_queue *cq, uint32_t subtype)
15799{
15800 struct lpfc_mbx_wq_create *wq_create;
15801 struct lpfc_dmabuf *dmabuf;
15802 LPFC_MBOXQ_t *mbox;
15803 int rc, length, status = 0;
15804 uint32_t shdr_status, shdr_add_status;
15805 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15806 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
5a6f133e 15807 struct dma_address *page;
962bc51b
JS
15808 void __iomem *bar_memmap_p;
15809 uint32_t db_offset;
15810 uint16_t pci_barset;
1351e69f
JS
15811 uint8_t dpp_barset;
15812 uint32_t dpp_offset;
15813 unsigned long pg_addr;
81b96eda 15814 uint8_t wq_create_version;
49198b37 15815
2e90f4b5
JS
15816 /* sanity check on queue memory */
15817 if (!wq || !cq)
15818 return -ENODEV;
49198b37 15819 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 15820 hw_page_size = wq->page_size;
4f774513
JS
15821
15822 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15823 if (!mbox)
15824 return -ENOMEM;
15825 length = (sizeof(struct lpfc_mbx_wq_create) -
15826 sizeof(struct lpfc_sli4_cfg_mhdr));
15827 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15828 LPFC_MBOX_OPCODE_FCOE_WQ_CREATE,
15829 length, LPFC_SLI4_MBX_EMBED);
15830 wq_create = &mbox->u.mqe.un.wq_create;
5a6f133e 15831 shdr = (union lpfc_sli4_cfg_shdr *) &wq_create->header.cfg_shdr;
4f774513
JS
15832 bf_set(lpfc_mbx_wq_create_num_pages, &wq_create->u.request,
15833 wq->page_count);
15834 bf_set(lpfc_mbx_wq_create_cq_id, &wq_create->u.request,
15835 cq->queue_id);
0c651878
JS
15836
15837 /* wqv is the earliest version supported, NOT the latest */
5a6f133e
JS
15838 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15839 phba->sli4_hba.pc_sli4_params.wqv);
962bc51b 15840
c176ffa0
JS
15841 if ((phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT) ||
15842 (wq->page_size > SLI4_PAGE_SIZE))
81b96eda
JS
15843 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15844 else
15845 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15846
0c651878 15847
1351e69f
JS
15848 if (phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT)
15849 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15850 else
15851 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15852
15853 switch (wq_create_version) {
0c651878 15854 case LPFC_Q_CREATE_VERSION_1:
5a6f133e
JS
15855 bf_set(lpfc_mbx_wq_create_wqe_count, &wq_create->u.request_1,
15856 wq->entry_count);
3f247de7
JS
15857 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15858 LPFC_Q_CREATE_VERSION_1);
15859
5a6f133e
JS
15860 switch (wq->entry_size) {
15861 default:
15862 case 64:
15863 bf_set(lpfc_mbx_wq_create_wqe_size,
15864 &wq_create->u.request_1,
15865 LPFC_WQ_WQE_SIZE_64);
15866 break;
15867 case 128:
15868 bf_set(lpfc_mbx_wq_create_wqe_size,
15869 &wq_create->u.request_1,
15870 LPFC_WQ_WQE_SIZE_128);
15871 break;
15872 }
1351e69f
JS
15873 /* Request DPP by default */
15874 bf_set(lpfc_mbx_wq_create_dpp_req, &wq_create->u.request_1, 1);
8ea73db4
JS
15875 bf_set(lpfc_mbx_wq_create_page_size,
15876 &wq_create->u.request_1,
81b96eda 15877 (wq->page_size / SLI4_PAGE_SIZE));
5a6f133e 15878 page = wq_create->u.request_1.page;
0c651878
JS
15879 break;
15880 default:
1351e69f
JS
15881 page = wq_create->u.request.page;
15882 break;
5a6f133e 15883 }
0c651878 15884
4f774513 15885 list_for_each_entry(dmabuf, &wq->page_list, list) {
49198b37 15886 memset(dmabuf->virt, 0, hw_page_size);
5a6f133e
JS
15887 page[dmabuf->buffer_tag].addr_lo = putPaddrLow(dmabuf->phys);
15888 page[dmabuf->buffer_tag].addr_hi = putPaddrHigh(dmabuf->phys);
4f774513 15889 }
962bc51b
JS
15890
15891 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15892 bf_set(lpfc_mbx_wq_create_dua, &wq_create->u.request, 1);
15893
4f774513
JS
15894 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15895 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15896 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15897 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15898 if (shdr_status || shdr_add_status || rc) {
372c187b 15899 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
15900 "2503 WQ_CREATE mailbox failed with "
15901 "status x%x add_status x%x, mbx status x%x\n",
15902 shdr_status, shdr_add_status, rc);
15903 status = -ENXIO;
15904 goto out;
15905 }
1351e69f
JS
15906
15907 if (wq_create_version == LPFC_Q_CREATE_VERSION_0)
15908 wq->queue_id = bf_get(lpfc_mbx_wq_create_q_id,
15909 &wq_create->u.response);
15910 else
15911 wq->queue_id = bf_get(lpfc_mbx_wq_create_v1_q_id,
15912 &wq_create->u.response_1);
15913
4f774513
JS
15914 if (wq->queue_id == 0xFFFF) {
15915 status = -ENXIO;
15916 goto out;
15917 }
1351e69f
JS
15918
15919 wq->db_format = LPFC_DB_LIST_FORMAT;
15920 if (wq_create_version == LPFC_Q_CREATE_VERSION_0) {
15921 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15922 wq->db_format = bf_get(lpfc_mbx_wq_create_db_format,
15923 &wq_create->u.response);
15924 if ((wq->db_format != LPFC_DB_LIST_FORMAT) &&
15925 (wq->db_format != LPFC_DB_RING_FORMAT)) {
372c187b 15926 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1351e69f
JS
15927 "3265 WQ[%d] doorbell format "
15928 "not supported: x%x\n",
15929 wq->queue_id, wq->db_format);
15930 status = -EINVAL;
15931 goto out;
15932 }
15933 pci_barset = bf_get(lpfc_mbx_wq_create_bar_set,
15934 &wq_create->u.response);
15935 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15936 pci_barset);
15937 if (!bar_memmap_p) {
372c187b 15938 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1351e69f
JS
15939 "3263 WQ[%d] failed to memmap "
15940 "pci barset:x%x\n",
15941 wq->queue_id, pci_barset);
15942 status = -ENOMEM;
15943 goto out;
15944 }
15945 db_offset = wq_create->u.response.doorbell_offset;
15946 if ((db_offset != LPFC_ULP0_WQ_DOORBELL) &&
15947 (db_offset != LPFC_ULP1_WQ_DOORBELL)) {
372c187b 15948 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1351e69f
JS
15949 "3252 WQ[%d] doorbell offset "
15950 "not supported: x%x\n",
15951 wq->queue_id, db_offset);
15952 status = -EINVAL;
15953 goto out;
15954 }
15955 wq->db_regaddr = bar_memmap_p + db_offset;
15956 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15957 "3264 WQ[%d]: barset:x%x, offset:x%x, "
15958 "format:x%x\n", wq->queue_id,
15959 pci_barset, db_offset, wq->db_format);
15960 } else
15961 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15962 } else {
1351e69f
JS
15963 /* Check if DPP was honored by the firmware */
15964 wq->dpp_enable = bf_get(lpfc_mbx_wq_create_dpp_rsp,
15965 &wq_create->u.response_1);
15966 if (wq->dpp_enable) {
15967 pci_barset = bf_get(lpfc_mbx_wq_create_v1_bar_set,
15968 &wq_create->u.response_1);
15969 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15970 pci_barset);
15971 if (!bar_memmap_p) {
372c187b 15972 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1351e69f
JS
15973 "3267 WQ[%d] failed to memmap "
15974 "pci barset:x%x\n",
15975 wq->queue_id, pci_barset);
15976 status = -ENOMEM;
15977 goto out;
15978 }
15979 db_offset = wq_create->u.response_1.doorbell_offset;
15980 wq->db_regaddr = bar_memmap_p + db_offset;
15981 wq->dpp_id = bf_get(lpfc_mbx_wq_create_dpp_id,
15982 &wq_create->u.response_1);
15983 dpp_barset = bf_get(lpfc_mbx_wq_create_dpp_bar,
15984 &wq_create->u.response_1);
15985 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15986 dpp_barset);
15987 if (!bar_memmap_p) {
372c187b 15988 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1351e69f
JS
15989 "3268 WQ[%d] failed to memmap "
15990 "pci barset:x%x\n",
15991 wq->queue_id, dpp_barset);
15992 status = -ENOMEM;
15993 goto out;
15994 }
15995 dpp_offset = wq_create->u.response_1.dpp_offset;
15996 wq->dpp_regaddr = bar_memmap_p + dpp_offset;
15997 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15998 "3271 WQ[%d]: barset:x%x, offset:x%x, "
15999 "dpp_id:x%x dpp_barset:x%x "
16000 "dpp_offset:x%x\n",
16001 wq->queue_id, pci_barset, db_offset,
16002 wq->dpp_id, dpp_barset, dpp_offset);
16003
3c1311ad 16004#ifdef CONFIG_X86
1351e69f
JS
16005 /* Enable combined writes for DPP aperture */
16006 pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK;
1351e69f
JS
16007 rc = set_memory_wc(pg_addr, 1);
16008 if (rc) {
16009 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16010 "3272 Cannot setup Combined "
16011 "Write on WQ[%d] - disable DPP\n",
16012 wq->queue_id);
16013 phba->cfg_enable_dpp = 0;
16014 }
16015#else
16016 phba->cfg_enable_dpp = 0;
16017#endif
16018 } else
16019 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 16020 }
895427bd
JS
16021 wq->pring = kzalloc(sizeof(struct lpfc_sli_ring), GFP_KERNEL);
16022 if (wq->pring == NULL) {
16023 status = -ENOMEM;
16024 goto out;
16025 }
4f774513 16026 wq->type = LPFC_WQ;
2a622bfb 16027 wq->assoc_qid = cq->queue_id;
4f774513
JS
16028 wq->subtype = subtype;
16029 wq->host_index = 0;
16030 wq->hba_index = 0;
32517fc0 16031 wq->notify_interval = LPFC_WQ_NOTIFY_INTRVL;
4f774513
JS
16032
16033 /* link the wq onto the parent cq child list */
16034 list_add_tail(&wq->list, &cq->child_list);
16035out:
8fa38513 16036 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
16037 return status;
16038}
16039
16040/**
16041 * lpfc_rq_create - Create a Receive Queue on the HBA
16042 * @phba: HBA structure that indicates port to create a queue on.
16043 * @hrq: The queue structure to use to create the header receive queue.
16044 * @drq: The queue structure to use to create the data receive queue.
16045 * @cq: The completion queue to bind this work queue to.
7af29d45 16046 * @subtype: The subtype of the work queue indicating its functionality.
4f774513
JS
16047 *
16048 * This function creates a receive buffer queue pair , as detailed in @hrq and
16049 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
16050 * to the HBA.
16051 *
16052 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
16053 * struct is used to get the entry count that is necessary to determine the
16054 * number of pages to use for this queue. The @cq is used to indicate which
16055 * completion queue to bind received buffers that are posted to these queues to.
16056 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
16057 * receive queue pair. This function is asynchronous and will wait for the
16058 * mailbox command to finish before continuing.
16059 *
16060 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
16061 * memory this function will return -ENOMEM. If the queue create mailbox command
16062 * fails this function will return -ENXIO.
4f774513 16063 **/
a2fc4aef 16064int
4f774513
JS
16065lpfc_rq_create(struct lpfc_hba *phba, struct lpfc_queue *hrq,
16066 struct lpfc_queue *drq, struct lpfc_queue *cq, uint32_t subtype)
16067{
16068 struct lpfc_mbx_rq_create *rq_create;
16069 struct lpfc_dmabuf *dmabuf;
16070 LPFC_MBOXQ_t *mbox;
16071 int rc, length, status = 0;
16072 uint32_t shdr_status, shdr_add_status;
16073 union lpfc_sli4_cfg_shdr *shdr;
49198b37 16074 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
962bc51b
JS
16075 void __iomem *bar_memmap_p;
16076 uint32_t db_offset;
16077 uint16_t pci_barset;
49198b37 16078
2e90f4b5
JS
16079 /* sanity check on queue memory */
16080 if (!hrq || !drq || !cq)
16081 return -ENODEV;
49198b37
JS
16082 if (!phba->sli4_hba.pc_sli4_params.supported)
16083 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
16084
16085 if (hrq->entry_count != drq->entry_count)
16086 return -EINVAL;
16087 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16088 if (!mbox)
16089 return -ENOMEM;
16090 length = (sizeof(struct lpfc_mbx_rq_create) -
16091 sizeof(struct lpfc_sli4_cfg_mhdr));
16092 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16093 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
16094 length, LPFC_SLI4_MBX_EMBED);
16095 rq_create = &mbox->u.mqe.un.rq_create;
5a6f133e
JS
16096 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
16097 bf_set(lpfc_mbox_hdr_version, &shdr->request,
16098 phba->sli4_hba.pc_sli4_params.rqv);
16099 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
16100 bf_set(lpfc_rq_context_rqe_count_1,
16101 &rq_create->u.request.context,
16102 hrq->entry_count);
16103 rq_create->u.request.context.buffer_size = LPFC_HDR_BUF_SIZE;
c31098ce
JS
16104 bf_set(lpfc_rq_context_rqe_size,
16105 &rq_create->u.request.context,
16106 LPFC_RQE_SIZE_8);
16107 bf_set(lpfc_rq_context_page_size,
16108 &rq_create->u.request.context,
8ea73db4 16109 LPFC_RQ_PAGE_SIZE_4096);
5a6f133e
JS
16110 } else {
16111 switch (hrq->entry_count) {
16112 default:
372c187b 16113 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5a6f133e
JS
16114 "2535 Unsupported RQ count. (%d)\n",
16115 hrq->entry_count);
4f4c1863
JS
16116 if (hrq->entry_count < 512) {
16117 status = -EINVAL;
16118 goto out;
16119 }
5bd5f66c 16120 /* fall through - otherwise default to smallest count */
5a6f133e
JS
16121 case 512:
16122 bf_set(lpfc_rq_context_rqe_count,
16123 &rq_create->u.request.context,
16124 LPFC_RQ_RING_SIZE_512);
16125 break;
16126 case 1024:
16127 bf_set(lpfc_rq_context_rqe_count,
16128 &rq_create->u.request.context,
16129 LPFC_RQ_RING_SIZE_1024);
16130 break;
16131 case 2048:
16132 bf_set(lpfc_rq_context_rqe_count,
16133 &rq_create->u.request.context,
16134 LPFC_RQ_RING_SIZE_2048);
16135 break;
16136 case 4096:
16137 bf_set(lpfc_rq_context_rqe_count,
16138 &rq_create->u.request.context,
16139 LPFC_RQ_RING_SIZE_4096);
16140 break;
16141 }
16142 bf_set(lpfc_rq_context_buf_size, &rq_create->u.request.context,
16143 LPFC_HDR_BUF_SIZE);
4f774513
JS
16144 }
16145 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
16146 cq->queue_id);
16147 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
16148 hrq->page_count);
4f774513 16149 list_for_each_entry(dmabuf, &hrq->page_list, list) {
49198b37 16150 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
16151 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
16152 putPaddrLow(dmabuf->phys);
16153 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
16154 putPaddrHigh(dmabuf->phys);
16155 }
962bc51b
JS
16156 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
16157 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
16158
4f774513
JS
16159 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16160 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
16161 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16162 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16163 if (shdr_status || shdr_add_status || rc) {
372c187b 16164 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
16165 "2504 RQ_CREATE mailbox failed with "
16166 "status x%x add_status x%x, mbx status x%x\n",
16167 shdr_status, shdr_add_status, rc);
16168 status = -ENXIO;
16169 goto out;
16170 }
16171 hrq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16172 if (hrq->queue_id == 0xFFFF) {
16173 status = -ENXIO;
16174 goto out;
16175 }
962bc51b
JS
16176
16177 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
16178 hrq->db_format = bf_get(lpfc_mbx_rq_create_db_format,
16179 &rq_create->u.response);
16180 if ((hrq->db_format != LPFC_DB_LIST_FORMAT) &&
16181 (hrq->db_format != LPFC_DB_RING_FORMAT)) {
372c187b 16182 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
962bc51b
JS
16183 "3262 RQ [%d] doorbell format not "
16184 "supported: x%x\n", hrq->queue_id,
16185 hrq->db_format);
16186 status = -EINVAL;
16187 goto out;
16188 }
16189
16190 pci_barset = bf_get(lpfc_mbx_rq_create_bar_set,
16191 &rq_create->u.response);
16192 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba, pci_barset);
16193 if (!bar_memmap_p) {
372c187b 16194 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
962bc51b
JS
16195 "3269 RQ[%d] failed to memmap pci "
16196 "barset:x%x\n", hrq->queue_id,
16197 pci_barset);
16198 status = -ENOMEM;
16199 goto out;
16200 }
16201
16202 db_offset = rq_create->u.response.doorbell_offset;
16203 if ((db_offset != LPFC_ULP0_RQ_DOORBELL) &&
16204 (db_offset != LPFC_ULP1_RQ_DOORBELL)) {
372c187b 16205 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
962bc51b
JS
16206 "3270 RQ[%d] doorbell offset not "
16207 "supported: x%x\n", hrq->queue_id,
16208 db_offset);
16209 status = -EINVAL;
16210 goto out;
16211 }
16212 hrq->db_regaddr = bar_memmap_p + db_offset;
16213 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a22e7db3
JS
16214 "3266 RQ[qid:%d]: barset:x%x, offset:x%x, "
16215 "format:x%x\n", hrq->queue_id, pci_barset,
16216 db_offset, hrq->db_format);
962bc51b
JS
16217 } else {
16218 hrq->db_format = LPFC_DB_RING_FORMAT;
16219 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16220 }
4f774513 16221 hrq->type = LPFC_HRQ;
2a622bfb 16222 hrq->assoc_qid = cq->queue_id;
4f774513
JS
16223 hrq->subtype = subtype;
16224 hrq->host_index = 0;
16225 hrq->hba_index = 0;
32517fc0 16226 hrq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
4f774513
JS
16227
16228 /* now create the data queue */
16229 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16230 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
16231 length, LPFC_SLI4_MBX_EMBED);
5a6f133e
JS
16232 bf_set(lpfc_mbox_hdr_version, &shdr->request,
16233 phba->sli4_hba.pc_sli4_params.rqv);
16234 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
16235 bf_set(lpfc_rq_context_rqe_count_1,
c31098ce 16236 &rq_create->u.request.context, hrq->entry_count);
3c603be9
JS
16237 if (subtype == LPFC_NVMET)
16238 rq_create->u.request.context.buffer_size =
16239 LPFC_NVMET_DATA_BUF_SIZE;
16240 else
16241 rq_create->u.request.context.buffer_size =
16242 LPFC_DATA_BUF_SIZE;
c31098ce
JS
16243 bf_set(lpfc_rq_context_rqe_size, &rq_create->u.request.context,
16244 LPFC_RQE_SIZE_8);
16245 bf_set(lpfc_rq_context_page_size, &rq_create->u.request.context,
16246 (PAGE_SIZE/SLI4_PAGE_SIZE));
5a6f133e
JS
16247 } else {
16248 switch (drq->entry_count) {
16249 default:
372c187b 16250 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5a6f133e
JS
16251 "2536 Unsupported RQ count. (%d)\n",
16252 drq->entry_count);
4f4c1863
JS
16253 if (drq->entry_count < 512) {
16254 status = -EINVAL;
16255 goto out;
16256 }
5bd5f66c 16257 /* fall through - otherwise default to smallest count */
5a6f133e
JS
16258 case 512:
16259 bf_set(lpfc_rq_context_rqe_count,
16260 &rq_create->u.request.context,
16261 LPFC_RQ_RING_SIZE_512);
16262 break;
16263 case 1024:
16264 bf_set(lpfc_rq_context_rqe_count,
16265 &rq_create->u.request.context,
16266 LPFC_RQ_RING_SIZE_1024);
16267 break;
16268 case 2048:
16269 bf_set(lpfc_rq_context_rqe_count,
16270 &rq_create->u.request.context,
16271 LPFC_RQ_RING_SIZE_2048);
16272 break;
16273 case 4096:
16274 bf_set(lpfc_rq_context_rqe_count,
16275 &rq_create->u.request.context,
16276 LPFC_RQ_RING_SIZE_4096);
16277 break;
16278 }
3c603be9
JS
16279 if (subtype == LPFC_NVMET)
16280 bf_set(lpfc_rq_context_buf_size,
16281 &rq_create->u.request.context,
16282 LPFC_NVMET_DATA_BUF_SIZE);
16283 else
16284 bf_set(lpfc_rq_context_buf_size,
16285 &rq_create->u.request.context,
16286 LPFC_DATA_BUF_SIZE);
4f774513
JS
16287 }
16288 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
16289 cq->queue_id);
16290 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
16291 drq->page_count);
4f774513
JS
16292 list_for_each_entry(dmabuf, &drq->page_list, list) {
16293 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
16294 putPaddrLow(dmabuf->phys);
16295 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
16296 putPaddrHigh(dmabuf->phys);
16297 }
962bc51b
JS
16298 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
16299 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
4f774513
JS
16300 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16301 /* The IOCTL status is embedded in the mailbox subheader. */
16302 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
16303 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16304 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16305 if (shdr_status || shdr_add_status || rc) {
16306 status = -ENXIO;
16307 goto out;
16308 }
16309 drq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16310 if (drq->queue_id == 0xFFFF) {
16311 status = -ENXIO;
16312 goto out;
16313 }
16314 drq->type = LPFC_DRQ;
2a622bfb 16315 drq->assoc_qid = cq->queue_id;
4f774513
JS
16316 drq->subtype = subtype;
16317 drq->host_index = 0;
16318 drq->hba_index = 0;
32517fc0 16319 drq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
4f774513
JS
16320
16321 /* link the header and data RQs onto the parent cq child list */
16322 list_add_tail(&hrq->list, &cq->child_list);
16323 list_add_tail(&drq->list, &cq->child_list);
16324
16325out:
8fa38513 16326 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
16327 return status;
16328}
16329
2d7dbc4c
JS
16330/**
16331 * lpfc_mrq_create - Create MRQ Receive Queues on the HBA
16332 * @phba: HBA structure that indicates port to create a queue on.
16333 * @hrqp: The queue structure array to use to create the header receive queues.
16334 * @drqp: The queue structure array to use to create the data receive queues.
16335 * @cqp: The completion queue array to bind these receive queues to.
7af29d45 16336 * @subtype: Functional purpose of the queue (MBOX, IO, ELS, NVMET, etc).
2d7dbc4c
JS
16337 *
16338 * This function creates a receive buffer queue pair , as detailed in @hrq and
16339 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
16340 * to the HBA.
16341 *
16342 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
16343 * struct is used to get the entry count that is necessary to determine the
16344 * number of pages to use for this queue. The @cq is used to indicate which
16345 * completion queue to bind received buffers that are posted to these queues to.
16346 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
16347 * receive queue pair. This function is asynchronous and will wait for the
16348 * mailbox command to finish before continuing.
16349 *
16350 * On success this function will return a zero. If unable to allocate enough
16351 * memory this function will return -ENOMEM. If the queue create mailbox command
16352 * fails this function will return -ENXIO.
16353 **/
16354int
16355lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
16356 struct lpfc_queue **drqp, struct lpfc_queue **cqp,
16357 uint32_t subtype)
16358{
16359 struct lpfc_queue *hrq, *drq, *cq;
16360 struct lpfc_mbx_rq_create_v2 *rq_create;
16361 struct lpfc_dmabuf *dmabuf;
16362 LPFC_MBOXQ_t *mbox;
16363 int rc, length, alloclen, status = 0;
16364 int cnt, idx, numrq, page_idx = 0;
16365 uint32_t shdr_status, shdr_add_status;
16366 union lpfc_sli4_cfg_shdr *shdr;
16367 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
16368
16369 numrq = phba->cfg_nvmet_mrq;
16370 /* sanity check on array memory */
16371 if (!hrqp || !drqp || !cqp || !numrq)
16372 return -ENODEV;
16373 if (!phba->sli4_hba.pc_sli4_params.supported)
16374 hw_page_size = SLI4_PAGE_SIZE;
16375
16376 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16377 if (!mbox)
16378 return -ENOMEM;
16379
16380 length = sizeof(struct lpfc_mbx_rq_create_v2);
16381 length += ((2 * numrq * hrqp[0]->page_count) *
16382 sizeof(struct dma_address));
16383
16384 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16385 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE, length,
16386 LPFC_SLI4_MBX_NEMBED);
16387 if (alloclen < length) {
372c187b 16388 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2d7dbc4c
JS
16389 "3099 Allocated DMA memory size (%d) is "
16390 "less than the requested DMA memory size "
16391 "(%d)\n", alloclen, length);
16392 status = -ENOMEM;
16393 goto out;
16394 }
16395
16396
16397
16398 rq_create = mbox->sge_array->addr[0];
16399 shdr = (union lpfc_sli4_cfg_shdr *)&rq_create->cfg_shdr;
16400
16401 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_Q_CREATE_VERSION_2);
16402 cnt = 0;
16403
16404 for (idx = 0; idx < numrq; idx++) {
16405 hrq = hrqp[idx];
16406 drq = drqp[idx];
16407 cq = cqp[idx];
16408
2d7dbc4c
JS
16409 /* sanity check on queue memory */
16410 if (!hrq || !drq || !cq) {
16411 status = -ENODEV;
16412 goto out;
16413 }
16414
7aabe84b
JS
16415 if (hrq->entry_count != drq->entry_count) {
16416 status = -EINVAL;
16417 goto out;
16418 }
16419
2d7dbc4c
JS
16420 if (idx == 0) {
16421 bf_set(lpfc_mbx_rq_create_num_pages,
16422 &rq_create->u.request,
16423 hrq->page_count);
16424 bf_set(lpfc_mbx_rq_create_rq_cnt,
16425 &rq_create->u.request, (numrq * 2));
16426 bf_set(lpfc_mbx_rq_create_dnb, &rq_create->u.request,
16427 1);
16428 bf_set(lpfc_rq_context_base_cq,
16429 &rq_create->u.request.context,
16430 cq->queue_id);
16431 bf_set(lpfc_rq_context_data_size,
16432 &rq_create->u.request.context,
3c603be9 16433 LPFC_NVMET_DATA_BUF_SIZE);
2d7dbc4c
JS
16434 bf_set(lpfc_rq_context_hdr_size,
16435 &rq_create->u.request.context,
16436 LPFC_HDR_BUF_SIZE);
16437 bf_set(lpfc_rq_context_rqe_count_1,
16438 &rq_create->u.request.context,
16439 hrq->entry_count);
16440 bf_set(lpfc_rq_context_rqe_size,
16441 &rq_create->u.request.context,
16442 LPFC_RQE_SIZE_8);
16443 bf_set(lpfc_rq_context_page_size,
16444 &rq_create->u.request.context,
16445 (PAGE_SIZE/SLI4_PAGE_SIZE));
16446 }
16447 rc = 0;
16448 list_for_each_entry(dmabuf, &hrq->page_list, list) {
16449 memset(dmabuf->virt, 0, hw_page_size);
16450 cnt = page_idx + dmabuf->buffer_tag;
16451 rq_create->u.request.page[cnt].addr_lo =
16452 putPaddrLow(dmabuf->phys);
16453 rq_create->u.request.page[cnt].addr_hi =
16454 putPaddrHigh(dmabuf->phys);
16455 rc++;
16456 }
16457 page_idx += rc;
16458
16459 rc = 0;
16460 list_for_each_entry(dmabuf, &drq->page_list, list) {
16461 memset(dmabuf->virt, 0, hw_page_size);
16462 cnt = page_idx + dmabuf->buffer_tag;
16463 rq_create->u.request.page[cnt].addr_lo =
16464 putPaddrLow(dmabuf->phys);
16465 rq_create->u.request.page[cnt].addr_hi =
16466 putPaddrHigh(dmabuf->phys);
16467 rc++;
16468 }
16469 page_idx += rc;
16470
16471 hrq->db_format = LPFC_DB_RING_FORMAT;
16472 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16473 hrq->type = LPFC_HRQ;
16474 hrq->assoc_qid = cq->queue_id;
16475 hrq->subtype = subtype;
16476 hrq->host_index = 0;
16477 hrq->hba_index = 0;
32517fc0 16478 hrq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
2d7dbc4c
JS
16479
16480 drq->db_format = LPFC_DB_RING_FORMAT;
16481 drq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16482 drq->type = LPFC_DRQ;
16483 drq->assoc_qid = cq->queue_id;
16484 drq->subtype = subtype;
16485 drq->host_index = 0;
16486 drq->hba_index = 0;
32517fc0 16487 drq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
2d7dbc4c
JS
16488
16489 list_add_tail(&hrq->list, &cq->child_list);
16490 list_add_tail(&drq->list, &cq->child_list);
16491 }
16492
16493 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16494 /* The IOCTL status is embedded in the mailbox subheader. */
16495 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16496 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16497 if (shdr_status || shdr_add_status || rc) {
372c187b 16498 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2d7dbc4c
JS
16499 "3120 RQ_CREATE mailbox failed with "
16500 "status x%x add_status x%x, mbx status x%x\n",
16501 shdr_status, shdr_add_status, rc);
16502 status = -ENXIO;
16503 goto out;
16504 }
16505 rc = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16506 if (rc == 0xFFFF) {
16507 status = -ENXIO;
16508 goto out;
16509 }
16510
16511 /* Initialize all RQs with associated queue id */
16512 for (idx = 0; idx < numrq; idx++) {
16513 hrq = hrqp[idx];
16514 hrq->queue_id = rc + (2 * idx);
16515 drq = drqp[idx];
16516 drq->queue_id = rc + (2 * idx) + 1;
16517 }
16518
16519out:
16520 lpfc_sli4_mbox_cmd_free(phba, mbox);
16521 return status;
16522}
16523
4f774513
JS
16524/**
16525 * lpfc_eq_destroy - Destroy an event Queue on the HBA
7af29d45 16526 * @phba: HBA structure that indicates port to destroy a queue on.
4f774513
JS
16527 * @eq: The queue structure associated with the queue to destroy.
16528 *
16529 * This function destroys a queue, as detailed in @eq by sending an mailbox
16530 * command, specific to the type of queue, to the HBA.
16531 *
16532 * The @eq struct is used to get the queue ID of the queue to destroy.
16533 *
16534 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16535 * command fails this function will return -ENXIO.
4f774513 16536 **/
a2fc4aef 16537int
4f774513
JS
16538lpfc_eq_destroy(struct lpfc_hba *phba, struct lpfc_queue *eq)
16539{
16540 LPFC_MBOXQ_t *mbox;
16541 int rc, length, status = 0;
16542 uint32_t shdr_status, shdr_add_status;
16543 union lpfc_sli4_cfg_shdr *shdr;
16544
2e90f4b5 16545 /* sanity check on queue memory */
4f774513
JS
16546 if (!eq)
16547 return -ENODEV;
32517fc0 16548
4f774513
JS
16549 mbox = mempool_alloc(eq->phba->mbox_mem_pool, GFP_KERNEL);
16550 if (!mbox)
16551 return -ENOMEM;
16552 length = (sizeof(struct lpfc_mbx_eq_destroy) -
16553 sizeof(struct lpfc_sli4_cfg_mhdr));
16554 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16555 LPFC_MBOX_OPCODE_EQ_DESTROY,
16556 length, LPFC_SLI4_MBX_EMBED);
16557 bf_set(lpfc_mbx_eq_destroy_q_id, &mbox->u.mqe.un.eq_destroy.u.request,
16558 eq->queue_id);
16559 mbox->vport = eq->phba->pport;
16560 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16561
16562 rc = lpfc_sli_issue_mbox(eq->phba, mbox, MBX_POLL);
16563 /* The IOCTL status is embedded in the mailbox subheader. */
16564 shdr = (union lpfc_sli4_cfg_shdr *)
16565 &mbox->u.mqe.un.eq_destroy.header.cfg_shdr;
16566 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16567 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16568 if (shdr_status || shdr_add_status || rc) {
372c187b 16569 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
16570 "2505 EQ_DESTROY mailbox failed with "
16571 "status x%x add_status x%x, mbx status x%x\n",
16572 shdr_status, shdr_add_status, rc);
16573 status = -ENXIO;
16574 }
16575
16576 /* Remove eq from any list */
16577 list_del_init(&eq->list);
8fa38513 16578 mempool_free(mbox, eq->phba->mbox_mem_pool);
4f774513
JS
16579 return status;
16580}
16581
16582/**
16583 * lpfc_cq_destroy - Destroy a Completion Queue on the HBA
7af29d45 16584 * @phba: HBA structure that indicates port to destroy a queue on.
4f774513
JS
16585 * @cq: The queue structure associated with the queue to destroy.
16586 *
16587 * This function destroys a queue, as detailed in @cq by sending an mailbox
16588 * command, specific to the type of queue, to the HBA.
16589 *
16590 * The @cq struct is used to get the queue ID of the queue to destroy.
16591 *
16592 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16593 * command fails this function will return -ENXIO.
4f774513 16594 **/
a2fc4aef 16595int
4f774513
JS
16596lpfc_cq_destroy(struct lpfc_hba *phba, struct lpfc_queue *cq)
16597{
16598 LPFC_MBOXQ_t *mbox;
16599 int rc, length, status = 0;
16600 uint32_t shdr_status, shdr_add_status;
16601 union lpfc_sli4_cfg_shdr *shdr;
16602
2e90f4b5 16603 /* sanity check on queue memory */
4f774513
JS
16604 if (!cq)
16605 return -ENODEV;
16606 mbox = mempool_alloc(cq->phba->mbox_mem_pool, GFP_KERNEL);
16607 if (!mbox)
16608 return -ENOMEM;
16609 length = (sizeof(struct lpfc_mbx_cq_destroy) -
16610 sizeof(struct lpfc_sli4_cfg_mhdr));
16611 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16612 LPFC_MBOX_OPCODE_CQ_DESTROY,
16613 length, LPFC_SLI4_MBX_EMBED);
16614 bf_set(lpfc_mbx_cq_destroy_q_id, &mbox->u.mqe.un.cq_destroy.u.request,
16615 cq->queue_id);
16616 mbox->vport = cq->phba->pport;
16617 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16618 rc = lpfc_sli_issue_mbox(cq->phba, mbox, MBX_POLL);
16619 /* The IOCTL status is embedded in the mailbox subheader. */
16620 shdr = (union lpfc_sli4_cfg_shdr *)
16621 &mbox->u.mqe.un.wq_create.header.cfg_shdr;
16622 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16623 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16624 if (shdr_status || shdr_add_status || rc) {
372c187b 16625 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
16626 "2506 CQ_DESTROY mailbox failed with "
16627 "status x%x add_status x%x, mbx status x%x\n",
16628 shdr_status, shdr_add_status, rc);
16629 status = -ENXIO;
16630 }
16631 /* Remove cq from any list */
16632 list_del_init(&cq->list);
8fa38513 16633 mempool_free(mbox, cq->phba->mbox_mem_pool);
4f774513
JS
16634 return status;
16635}
16636
04c68496
JS
16637/**
16638 * lpfc_mq_destroy - Destroy a Mailbox Queue on the HBA
7af29d45
LJ
16639 * @phba: HBA structure that indicates port to destroy a queue on.
16640 * @mq: The queue structure associated with the queue to destroy.
04c68496
JS
16641 *
16642 * This function destroys a queue, as detailed in @mq by sending an mailbox
16643 * command, specific to the type of queue, to the HBA.
16644 *
16645 * The @mq struct is used to get the queue ID of the queue to destroy.
16646 *
16647 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16648 * command fails this function will return -ENXIO.
04c68496 16649 **/
a2fc4aef 16650int
04c68496
JS
16651lpfc_mq_destroy(struct lpfc_hba *phba, struct lpfc_queue *mq)
16652{
16653 LPFC_MBOXQ_t *mbox;
16654 int rc, length, status = 0;
16655 uint32_t shdr_status, shdr_add_status;
16656 union lpfc_sli4_cfg_shdr *shdr;
16657
2e90f4b5 16658 /* sanity check on queue memory */
04c68496
JS
16659 if (!mq)
16660 return -ENODEV;
16661 mbox = mempool_alloc(mq->phba->mbox_mem_pool, GFP_KERNEL);
16662 if (!mbox)
16663 return -ENOMEM;
16664 length = (sizeof(struct lpfc_mbx_mq_destroy) -
16665 sizeof(struct lpfc_sli4_cfg_mhdr));
16666 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16667 LPFC_MBOX_OPCODE_MQ_DESTROY,
16668 length, LPFC_SLI4_MBX_EMBED);
16669 bf_set(lpfc_mbx_mq_destroy_q_id, &mbox->u.mqe.un.mq_destroy.u.request,
16670 mq->queue_id);
16671 mbox->vport = mq->phba->pport;
16672 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16673 rc = lpfc_sli_issue_mbox(mq->phba, mbox, MBX_POLL);
16674 /* The IOCTL status is embedded in the mailbox subheader. */
16675 shdr = (union lpfc_sli4_cfg_shdr *)
16676 &mbox->u.mqe.un.mq_destroy.header.cfg_shdr;
16677 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16678 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16679 if (shdr_status || shdr_add_status || rc) {
372c187b 16680 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
04c68496
JS
16681 "2507 MQ_DESTROY mailbox failed with "
16682 "status x%x add_status x%x, mbx status x%x\n",
16683 shdr_status, shdr_add_status, rc);
16684 status = -ENXIO;
16685 }
16686 /* Remove mq from any list */
16687 list_del_init(&mq->list);
8fa38513 16688 mempool_free(mbox, mq->phba->mbox_mem_pool);
04c68496
JS
16689 return status;
16690}
16691
4f774513
JS
16692/**
16693 * lpfc_wq_destroy - Destroy a Work Queue on the HBA
7af29d45 16694 * @phba: HBA structure that indicates port to destroy a queue on.
4f774513
JS
16695 * @wq: The queue structure associated with the queue to destroy.
16696 *
16697 * This function destroys a queue, as detailed in @wq by sending an mailbox
16698 * command, specific to the type of queue, to the HBA.
16699 *
16700 * The @wq struct is used to get the queue ID of the queue to destroy.
16701 *
16702 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16703 * command fails this function will return -ENXIO.
4f774513 16704 **/
a2fc4aef 16705int
4f774513
JS
16706lpfc_wq_destroy(struct lpfc_hba *phba, struct lpfc_queue *wq)
16707{
16708 LPFC_MBOXQ_t *mbox;
16709 int rc, length, status = 0;
16710 uint32_t shdr_status, shdr_add_status;
16711 union lpfc_sli4_cfg_shdr *shdr;
16712
2e90f4b5 16713 /* sanity check on queue memory */
4f774513
JS
16714 if (!wq)
16715 return -ENODEV;
16716 mbox = mempool_alloc(wq->phba->mbox_mem_pool, GFP_KERNEL);
16717 if (!mbox)
16718 return -ENOMEM;
16719 length = (sizeof(struct lpfc_mbx_wq_destroy) -
16720 sizeof(struct lpfc_sli4_cfg_mhdr));
16721 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16722 LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY,
16723 length, LPFC_SLI4_MBX_EMBED);
16724 bf_set(lpfc_mbx_wq_destroy_q_id, &mbox->u.mqe.un.wq_destroy.u.request,
16725 wq->queue_id);
16726 mbox->vport = wq->phba->pport;
16727 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16728 rc = lpfc_sli_issue_mbox(wq->phba, mbox, MBX_POLL);
16729 shdr = (union lpfc_sli4_cfg_shdr *)
16730 &mbox->u.mqe.un.wq_destroy.header.cfg_shdr;
16731 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16732 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16733 if (shdr_status || shdr_add_status || rc) {
372c187b 16734 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
16735 "2508 WQ_DESTROY mailbox failed with "
16736 "status x%x add_status x%x, mbx status x%x\n",
16737 shdr_status, shdr_add_status, rc);
16738 status = -ENXIO;
16739 }
16740 /* Remove wq from any list */
16741 list_del_init(&wq->list);
d1f525aa
JS
16742 kfree(wq->pring);
16743 wq->pring = NULL;
8fa38513 16744 mempool_free(mbox, wq->phba->mbox_mem_pool);
4f774513
JS
16745 return status;
16746}
16747
16748/**
16749 * lpfc_rq_destroy - Destroy a Receive Queue on the HBA
7af29d45
LJ
16750 * @phba: HBA structure that indicates port to destroy a queue on.
16751 * @hrq: The queue structure associated with the queue to destroy.
16752 * @drq: The queue structure associated with the queue to destroy.
4f774513
JS
16753 *
16754 * This function destroys a queue, as detailed in @rq by sending an mailbox
16755 * command, specific to the type of queue, to the HBA.
16756 *
16757 * The @rq struct is used to get the queue ID of the queue to destroy.
16758 *
16759 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16760 * command fails this function will return -ENXIO.
4f774513 16761 **/
a2fc4aef 16762int
4f774513
JS
16763lpfc_rq_destroy(struct lpfc_hba *phba, struct lpfc_queue *hrq,
16764 struct lpfc_queue *drq)
16765{
16766 LPFC_MBOXQ_t *mbox;
16767 int rc, length, status = 0;
16768 uint32_t shdr_status, shdr_add_status;
16769 union lpfc_sli4_cfg_shdr *shdr;
16770
2e90f4b5 16771 /* sanity check on queue memory */
4f774513
JS
16772 if (!hrq || !drq)
16773 return -ENODEV;
16774 mbox = mempool_alloc(hrq->phba->mbox_mem_pool, GFP_KERNEL);
16775 if (!mbox)
16776 return -ENOMEM;
16777 length = (sizeof(struct lpfc_mbx_rq_destroy) -
fedd3b7b 16778 sizeof(struct lpfc_sli4_cfg_mhdr));
4f774513
JS
16779 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16780 LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY,
16781 length, LPFC_SLI4_MBX_EMBED);
16782 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16783 hrq->queue_id);
16784 mbox->vport = hrq->phba->pport;
16785 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16786 rc = lpfc_sli_issue_mbox(hrq->phba, mbox, MBX_POLL);
16787 /* The IOCTL status is embedded in the mailbox subheader. */
16788 shdr = (union lpfc_sli4_cfg_shdr *)
16789 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16790 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16791 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16792 if (shdr_status || shdr_add_status || rc) {
372c187b 16793 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
16794 "2509 RQ_DESTROY mailbox failed with "
16795 "status x%x add_status x%x, mbx status x%x\n",
16796 shdr_status, shdr_add_status, rc);
16797 if (rc != MBX_TIMEOUT)
16798 mempool_free(mbox, hrq->phba->mbox_mem_pool);
16799 return -ENXIO;
16800 }
16801 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16802 drq->queue_id);
16803 rc = lpfc_sli_issue_mbox(drq->phba, mbox, MBX_POLL);
16804 shdr = (union lpfc_sli4_cfg_shdr *)
16805 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16806 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16807 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16808 if (shdr_status || shdr_add_status || rc) {
372c187b 16809 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
16810 "2510 RQ_DESTROY mailbox failed with "
16811 "status x%x add_status x%x, mbx status x%x\n",
16812 shdr_status, shdr_add_status, rc);
16813 status = -ENXIO;
16814 }
16815 list_del_init(&hrq->list);
16816 list_del_init(&drq->list);
8fa38513 16817 mempool_free(mbox, hrq->phba->mbox_mem_pool);
4f774513
JS
16818 return status;
16819}
16820
16821/**
16822 * lpfc_sli4_post_sgl - Post scatter gather list for an XRI to HBA
16823 * @phba: The virtual port for which this call being executed.
16824 * @pdma_phys_addr0: Physical address of the 1st SGL page.
16825 * @pdma_phys_addr1: Physical address of the 2nd SGL page.
16826 * @xritag: the xritag that ties this io to the SGL pages.
16827 *
16828 * This routine will post the sgl pages for the IO that has the xritag
16829 * that is in the iocbq structure. The xritag is assigned during iocbq
16830 * creation and persists for as long as the driver is loaded.
16831 * if the caller has fewer than 256 scatter gather segments to map then
16832 * pdma_phys_addr1 should be 0.
16833 * If the caller needs to map more than 256 scatter gather segment then
16834 * pdma_phys_addr1 should be a valid physical address.
16835 * physical address for SGLs must be 64 byte aligned.
16836 * If you are going to map 2 SGL's then the first one must have 256 entries
16837 * the second sgl can have between 1 and 256 entries.
16838 *
16839 * Return codes:
16840 * 0 - Success
16841 * -ENXIO, -ENOMEM - Failure
16842 **/
16843int
16844lpfc_sli4_post_sgl(struct lpfc_hba *phba,
16845 dma_addr_t pdma_phys_addr0,
16846 dma_addr_t pdma_phys_addr1,
16847 uint16_t xritag)
16848{
16849 struct lpfc_mbx_post_sgl_pages *post_sgl_pages;
16850 LPFC_MBOXQ_t *mbox;
16851 int rc;
16852 uint32_t shdr_status, shdr_add_status;
6d368e53 16853 uint32_t mbox_tmo;
4f774513
JS
16854 union lpfc_sli4_cfg_shdr *shdr;
16855
16856 if (xritag == NO_XRI) {
372c187b 16857 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
16858 "0364 Invalid param:\n");
16859 return -EINVAL;
16860 }
16861
16862 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16863 if (!mbox)
16864 return -ENOMEM;
16865
16866 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16867 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16868 sizeof(struct lpfc_mbx_post_sgl_pages) -
fedd3b7b 16869 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
4f774513
JS
16870
16871 post_sgl_pages = (struct lpfc_mbx_post_sgl_pages *)
16872 &mbox->u.mqe.un.post_sgl_pages;
16873 bf_set(lpfc_post_sgl_pages_xri, post_sgl_pages, xritag);
16874 bf_set(lpfc_post_sgl_pages_xricnt, post_sgl_pages, 1);
16875
16876 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_lo =
16877 cpu_to_le32(putPaddrLow(pdma_phys_addr0));
16878 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_hi =
16879 cpu_to_le32(putPaddrHigh(pdma_phys_addr0));
16880
16881 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_lo =
16882 cpu_to_le32(putPaddrLow(pdma_phys_addr1));
16883 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_hi =
16884 cpu_to_le32(putPaddrHigh(pdma_phys_addr1));
16885 if (!phba->sli4_hba.intr_enable)
16886 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6d368e53 16887 else {
a183a15f 16888 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
16889 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16890 }
4f774513
JS
16891 /* The IOCTL status is embedded in the mailbox subheader. */
16892 shdr = (union lpfc_sli4_cfg_shdr *) &post_sgl_pages->header.cfg_shdr;
16893 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16894 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16895 if (rc != MBX_TIMEOUT)
16896 mempool_free(mbox, phba->mbox_mem_pool);
16897 if (shdr_status || shdr_add_status || rc) {
372c187b 16898 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
16899 "2511 POST_SGL mailbox failed with "
16900 "status x%x add_status x%x, mbx status x%x\n",
16901 shdr_status, shdr_add_status, rc);
4f774513
JS
16902 }
16903 return 0;
16904}
4f774513 16905
6d368e53 16906/**
88a2cfbb 16907 * lpfc_sli4_alloc_xri - Get an available rpi in the device's range
6d368e53
JS
16908 * @phba: pointer to lpfc hba data structure.
16909 *
16910 * This routine is invoked to post rpi header templates to the
88a2cfbb
JS
16911 * HBA consistent with the SLI-4 interface spec. This routine
16912 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
16913 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6d368e53 16914 *
88a2cfbb
JS
16915 * Returns
16916 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
16917 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
16918 **/
5d8b8167 16919static uint16_t
6d368e53
JS
16920lpfc_sli4_alloc_xri(struct lpfc_hba *phba)
16921{
16922 unsigned long xri;
16923
16924 /*
16925 * Fetch the next logical xri. Because this index is logical,
16926 * the driver starts at 0 each time.
16927 */
16928 spin_lock_irq(&phba->hbalock);
16929 xri = find_next_zero_bit(phba->sli4_hba.xri_bmask,
16930 phba->sli4_hba.max_cfg_param.max_xri, 0);
16931 if (xri >= phba->sli4_hba.max_cfg_param.max_xri) {
16932 spin_unlock_irq(&phba->hbalock);
16933 return NO_XRI;
16934 } else {
16935 set_bit(xri, phba->sli4_hba.xri_bmask);
16936 phba->sli4_hba.max_cfg_param.xri_used++;
6d368e53 16937 }
6d368e53
JS
16938 spin_unlock_irq(&phba->hbalock);
16939 return xri;
16940}
16941
16942/**
16943 * lpfc_sli4_free_xri - Release an xri for reuse.
16944 * @phba: pointer to lpfc hba data structure.
7af29d45 16945 * @xri: xri to release.
6d368e53
JS
16946 *
16947 * This routine is invoked to release an xri to the pool of
16948 * available rpis maintained by the driver.
16949 **/
5d8b8167 16950static void
6d368e53
JS
16951__lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16952{
16953 if (test_and_clear_bit(xri, phba->sli4_hba.xri_bmask)) {
6d368e53
JS
16954 phba->sli4_hba.max_cfg_param.xri_used--;
16955 }
16956}
16957
16958/**
16959 * lpfc_sli4_free_xri - Release an xri for reuse.
16960 * @phba: pointer to lpfc hba data structure.
7af29d45 16961 * @xri: xri to release.
6d368e53
JS
16962 *
16963 * This routine is invoked to release an xri to the pool of
16964 * available rpis maintained by the driver.
16965 **/
16966void
16967lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16968{
16969 spin_lock_irq(&phba->hbalock);
16970 __lpfc_sli4_free_xri(phba, xri);
16971 spin_unlock_irq(&phba->hbalock);
16972}
16973
4f774513
JS
16974/**
16975 * lpfc_sli4_next_xritag - Get an xritag for the io
16976 * @phba: Pointer to HBA context object.
16977 *
16978 * This function gets an xritag for the iocb. If there is no unused xritag
16979 * it will return 0xffff.
16980 * The function returns the allocated xritag if successful, else returns zero.
16981 * Zero is not a valid xritag.
16982 * The caller is not required to hold any lock.
16983 **/
16984uint16_t
16985lpfc_sli4_next_xritag(struct lpfc_hba *phba)
16986{
6d368e53 16987 uint16_t xri_index;
4f774513 16988
6d368e53 16989 xri_index = lpfc_sli4_alloc_xri(phba);
81378052
JS
16990 if (xri_index == NO_XRI)
16991 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
16992 "2004 Failed to allocate XRI.last XRITAG is %d"
16993 " Max XRI is %d, Used XRI is %d\n",
16994 xri_index,
16995 phba->sli4_hba.max_cfg_param.max_xri,
16996 phba->sli4_hba.max_cfg_param.xri_used);
16997 return xri_index;
4f774513
JS
16998}
16999
17000/**
895427bd 17001 * lpfc_sli4_post_sgl_list - post a block of ELS sgls to the port.
4f774513 17002 * @phba: pointer to lpfc hba data structure.
8a9d2e80 17003 * @post_sgl_list: pointer to els sgl entry list.
7af29d45 17004 * @post_cnt: number of els sgl entries on the list.
4f774513
JS
17005 *
17006 * This routine is invoked to post a block of driver's sgl pages to the
17007 * HBA using non-embedded mailbox command. No Lock is held. This routine
17008 * is only called when the driver is loading and after all IO has been
17009 * stopped.
17010 **/
8a9d2e80 17011static int
895427bd 17012lpfc_sli4_post_sgl_list(struct lpfc_hba *phba,
8a9d2e80
JS
17013 struct list_head *post_sgl_list,
17014 int post_cnt)
4f774513 17015{
8a9d2e80 17016 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
4f774513
JS
17017 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
17018 struct sgl_page_pairs *sgl_pg_pairs;
17019 void *viraddr;
17020 LPFC_MBOXQ_t *mbox;
17021 uint32_t reqlen, alloclen, pg_pairs;
17022 uint32_t mbox_tmo;
8a9d2e80
JS
17023 uint16_t xritag_start = 0;
17024 int rc = 0;
4f774513
JS
17025 uint32_t shdr_status, shdr_add_status;
17026 union lpfc_sli4_cfg_shdr *shdr;
17027
895427bd 17028 reqlen = post_cnt * sizeof(struct sgl_page_pairs) +
4f774513 17029 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 17030 if (reqlen > SLI4_PAGE_SIZE) {
372c187b 17031 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
17032 "2559 Block sgl registration required DMA "
17033 "size (%d) great than a page\n", reqlen);
17034 return -ENOMEM;
17035 }
895427bd 17036
4f774513 17037 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6d368e53 17038 if (!mbox)
4f774513 17039 return -ENOMEM;
4f774513
JS
17040
17041 /* Allocate DMA memory and set up the non-embedded mailbox command */
17042 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
17043 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES, reqlen,
17044 LPFC_SLI4_MBX_NEMBED);
17045
17046 if (alloclen < reqlen) {
372c187b 17047 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
17048 "0285 Allocated DMA memory size (%d) is "
17049 "less than the requested DMA memory "
17050 "size (%d)\n", alloclen, reqlen);
17051 lpfc_sli4_mbox_cmd_free(phba, mbox);
17052 return -ENOMEM;
17053 }
4f774513 17054 /* Set up the SGL pages in the non-embedded DMA pages */
6d368e53 17055 viraddr = mbox->sge_array->addr[0];
4f774513
JS
17056 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
17057 sgl_pg_pairs = &sgl->sgl_pg_pairs;
17058
8a9d2e80
JS
17059 pg_pairs = 0;
17060 list_for_each_entry_safe(sglq_entry, sglq_next, post_sgl_list, list) {
4f774513
JS
17061 /* Set up the sge entry */
17062 sgl_pg_pairs->sgl_pg0_addr_lo =
17063 cpu_to_le32(putPaddrLow(sglq_entry->phys));
17064 sgl_pg_pairs->sgl_pg0_addr_hi =
17065 cpu_to_le32(putPaddrHigh(sglq_entry->phys));
17066 sgl_pg_pairs->sgl_pg1_addr_lo =
17067 cpu_to_le32(putPaddrLow(0));
17068 sgl_pg_pairs->sgl_pg1_addr_hi =
17069 cpu_to_le32(putPaddrHigh(0));
6d368e53 17070
4f774513
JS
17071 /* Keep the first xritag on the list */
17072 if (pg_pairs == 0)
17073 xritag_start = sglq_entry->sli4_xritag;
17074 sgl_pg_pairs++;
8a9d2e80 17075 pg_pairs++;
4f774513 17076 }
6d368e53
JS
17077
17078 /* Complete initialization and perform endian conversion. */
4f774513 17079 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
895427bd 17080 bf_set(lpfc_post_sgl_pages_xricnt, sgl, post_cnt);
4f774513 17081 sgl->word0 = cpu_to_le32(sgl->word0);
895427bd 17082
4f774513
JS
17083 if (!phba->sli4_hba.intr_enable)
17084 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
17085 else {
a183a15f 17086 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
17087 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
17088 }
17089 shdr = (union lpfc_sli4_cfg_shdr *) &sgl->cfg_shdr;
17090 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
17091 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
17092 if (rc != MBX_TIMEOUT)
17093 lpfc_sli4_mbox_cmd_free(phba, mbox);
17094 if (shdr_status || shdr_add_status || rc) {
372c187b 17095 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4f774513
JS
17096 "2513 POST_SGL_BLOCK mailbox command failed "
17097 "status x%x add_status x%x mbx status x%x\n",
17098 shdr_status, shdr_add_status, rc);
17099 rc = -ENXIO;
17100 }
17101 return rc;
17102}
17103
17104/**
5e5b511d 17105 * lpfc_sli4_post_io_sgl_block - post a block of nvme sgl list to firmware
4f774513 17106 * @phba: pointer to lpfc hba data structure.
0794d601 17107 * @nblist: pointer to nvme buffer list.
4f774513
JS
17108 * @count: number of scsi buffers on the list.
17109 *
17110 * This routine is invoked to post a block of @count scsi sgl pages from a
0794d601 17111 * SCSI buffer list @nblist to the HBA using non-embedded mailbox command.
4f774513
JS
17112 * No Lock is held.
17113 *
17114 **/
0794d601 17115static int
5e5b511d
JS
17116lpfc_sli4_post_io_sgl_block(struct lpfc_hba *phba, struct list_head *nblist,
17117 int count)
4f774513 17118{
c490850a 17119 struct lpfc_io_buf *lpfc_ncmd;
4f774513
JS
17120 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
17121 struct sgl_page_pairs *sgl_pg_pairs;
17122 void *viraddr;
17123 LPFC_MBOXQ_t *mbox;
17124 uint32_t reqlen, alloclen, pg_pairs;
17125 uint32_t mbox_tmo;
17126 uint16_t xritag_start = 0;
17127 int rc = 0;
17128 uint32_t shdr_status, shdr_add_status;
17129 dma_addr_t pdma_phys_bpl1;
17130 union lpfc_sli4_cfg_shdr *shdr;
17131
17132 /* Calculate the requested length of the dma memory */
8a9d2e80 17133 reqlen = count * sizeof(struct sgl_page_pairs) +
4f774513 17134 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 17135 if (reqlen > SLI4_PAGE_SIZE) {
4f774513 17136 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
0794d601 17137 "6118 Block sgl registration required DMA "
4f774513
JS
17138 "size (%d) great than a page\n", reqlen);
17139 return -ENOMEM;
17140 }
17141 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
17142 if (!mbox) {
372c187b 17143 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
0794d601 17144 "6119 Failed to allocate mbox cmd memory\n");
4f774513
JS
17145 return -ENOMEM;
17146 }
17147
17148 /* Allocate DMA memory and set up the non-embedded mailbox command */
17149 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
0794d601
JS
17150 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
17151 reqlen, LPFC_SLI4_MBX_NEMBED);
4f774513
JS
17152
17153 if (alloclen < reqlen) {
372c187b 17154 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
0794d601 17155 "6120 Allocated DMA memory size (%d) is "
4f774513
JS
17156 "less than the requested DMA memory "
17157 "size (%d)\n", alloclen, reqlen);
17158 lpfc_sli4_mbox_cmd_free(phba, mbox);
17159 return -ENOMEM;
17160 }
6d368e53 17161
4f774513 17162 /* Get the first SGE entry from the non-embedded DMA memory */
4f774513
JS
17163 viraddr = mbox->sge_array->addr[0];
17164
17165 /* Set up the SGL pages in the non-embedded DMA pages */
17166 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
17167 sgl_pg_pairs = &sgl->sgl_pg_pairs;
17168
17169 pg_pairs = 0;
0794d601 17170 list_for_each_entry(lpfc_ncmd, nblist, list) {
4f774513
JS
17171 /* Set up the sge entry */
17172 sgl_pg_pairs->sgl_pg0_addr_lo =
0794d601 17173 cpu_to_le32(putPaddrLow(lpfc_ncmd->dma_phys_sgl));
4f774513 17174 sgl_pg_pairs->sgl_pg0_addr_hi =
0794d601 17175 cpu_to_le32(putPaddrHigh(lpfc_ncmd->dma_phys_sgl));
4f774513 17176 if (phba->cfg_sg_dma_buf_size > SGL_PAGE_SIZE)
0794d601
JS
17177 pdma_phys_bpl1 = lpfc_ncmd->dma_phys_sgl +
17178 SGL_PAGE_SIZE;
4f774513
JS
17179 else
17180 pdma_phys_bpl1 = 0;
17181 sgl_pg_pairs->sgl_pg1_addr_lo =
17182 cpu_to_le32(putPaddrLow(pdma_phys_bpl1));
17183 sgl_pg_pairs->sgl_pg1_addr_hi =
17184 cpu_to_le32(putPaddrHigh(pdma_phys_bpl1));
17185 /* Keep the first xritag on the list */
17186 if (pg_pairs == 0)
0794d601 17187 xritag_start = lpfc_ncmd->cur_iocbq.sli4_xritag;
4f774513
JS
17188 sgl_pg_pairs++;
17189 pg_pairs++;
17190 }
17191 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
17192 bf_set(lpfc_post_sgl_pages_xricnt, sgl, pg_pairs);
17193 /* Perform endian conversion if necessary */
17194 sgl->word0 = cpu_to_le32(sgl->word0);
17195
0794d601 17196 if (!phba->sli4_hba.intr_enable) {
4f774513 17197 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
0794d601 17198 } else {
a183a15f 17199 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
17200 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
17201 }
0794d601 17202 shdr = (union lpfc_sli4_cfg_shdr *)&sgl->cfg_shdr;
4f774513
JS
17203 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
17204 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
17205 if (rc != MBX_TIMEOUT)
17206 lpfc_sli4_mbox_cmd_free(phba, mbox);
17207 if (shdr_status || shdr_add_status || rc) {
372c187b 17208 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
0794d601 17209 "6125 POST_SGL_BLOCK mailbox command failed "
4f774513
JS
17210 "status x%x add_status x%x mbx status x%x\n",
17211 shdr_status, shdr_add_status, rc);
17212 rc = -ENXIO;
17213 }
17214 return rc;
17215}
17216
0794d601 17217/**
5e5b511d 17218 * lpfc_sli4_post_io_sgl_list - Post blocks of nvme buffer sgls from a list
0794d601
JS
17219 * @phba: pointer to lpfc hba data structure.
17220 * @post_nblist: pointer to the nvme buffer list.
7af29d45 17221 * @sb_count: number of nvme buffers.
0794d601
JS
17222 *
17223 * This routine walks a list of nvme buffers that was passed in. It attempts
17224 * to construct blocks of nvme buffer sgls which contains contiguous xris and
17225 * uses the non-embedded SGL block post mailbox commands to post to the port.
17226 * For single NVME buffer sgl with non-contiguous xri, if any, it shall use
17227 * embedded SGL post mailbox command for posting. The @post_nblist passed in
17228 * must be local list, thus no lock is needed when manipulate the list.
17229 *
17230 * Returns: 0 = failure, non-zero number of successfully posted buffers.
17231 **/
17232int
5e5b511d
JS
17233lpfc_sli4_post_io_sgl_list(struct lpfc_hba *phba,
17234 struct list_head *post_nblist, int sb_count)
0794d601 17235{
c490850a 17236 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
0794d601
JS
17237 int status, sgl_size;
17238 int post_cnt = 0, block_cnt = 0, num_posting = 0, num_posted = 0;
17239 dma_addr_t pdma_phys_sgl1;
17240 int last_xritag = NO_XRI;
17241 int cur_xritag;
0794d601
JS
17242 LIST_HEAD(prep_nblist);
17243 LIST_HEAD(blck_nblist);
17244 LIST_HEAD(nvme_nblist);
17245
17246 /* sanity check */
17247 if (sb_count <= 0)
17248 return -EINVAL;
17249
17250 sgl_size = phba->cfg_sg_dma_buf_size;
17251 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, post_nblist, list) {
17252 list_del_init(&lpfc_ncmd->list);
17253 block_cnt++;
17254 if ((last_xritag != NO_XRI) &&
17255 (lpfc_ncmd->cur_iocbq.sli4_xritag != last_xritag + 1)) {
17256 /* a hole in xri block, form a sgl posting block */
17257 list_splice_init(&prep_nblist, &blck_nblist);
17258 post_cnt = block_cnt - 1;
17259 /* prepare list for next posting block */
17260 list_add_tail(&lpfc_ncmd->list, &prep_nblist);
17261 block_cnt = 1;
17262 } else {
17263 /* prepare list for next posting block */
17264 list_add_tail(&lpfc_ncmd->list, &prep_nblist);
17265 /* enough sgls for non-embed sgl mbox command */
17266 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
17267 list_splice_init(&prep_nblist, &blck_nblist);
17268 post_cnt = block_cnt;
17269 block_cnt = 0;
17270 }
17271 }
17272 num_posting++;
17273 last_xritag = lpfc_ncmd->cur_iocbq.sli4_xritag;
17274
17275 /* end of repost sgl list condition for NVME buffers */
17276 if (num_posting == sb_count) {
17277 if (post_cnt == 0) {
17278 /* last sgl posting block */
17279 list_splice_init(&prep_nblist, &blck_nblist);
17280 post_cnt = block_cnt;
17281 } else if (block_cnt == 1) {
17282 /* last single sgl with non-contiguous xri */
17283 if (sgl_size > SGL_PAGE_SIZE)
17284 pdma_phys_sgl1 =
17285 lpfc_ncmd->dma_phys_sgl +
17286 SGL_PAGE_SIZE;
17287 else
17288 pdma_phys_sgl1 = 0;
17289 cur_xritag = lpfc_ncmd->cur_iocbq.sli4_xritag;
17290 status = lpfc_sli4_post_sgl(
17291 phba, lpfc_ncmd->dma_phys_sgl,
17292 pdma_phys_sgl1, cur_xritag);
17293 if (status) {
c490850a
JS
17294 /* Post error. Buffer unavailable. */
17295 lpfc_ncmd->flags |=
17296 LPFC_SBUF_NOT_POSTED;
0794d601 17297 } else {
c490850a
JS
17298 /* Post success. Bffer available. */
17299 lpfc_ncmd->flags &=
17300 ~LPFC_SBUF_NOT_POSTED;
0794d601
JS
17301 lpfc_ncmd->status = IOSTAT_SUCCESS;
17302 num_posted++;
17303 }
17304 /* success, put on NVME buffer sgl list */
17305 list_add_tail(&lpfc_ncmd->list, &nvme_nblist);
17306 }
17307 }
17308
17309 /* continue until a nembed page worth of sgls */
17310 if (post_cnt == 0)
17311 continue;
17312
17313 /* post block of NVME buffer list sgls */
5e5b511d
JS
17314 status = lpfc_sli4_post_io_sgl_block(phba, &blck_nblist,
17315 post_cnt);
0794d601
JS
17316
17317 /* don't reset xirtag due to hole in xri block */
17318 if (block_cnt == 0)
17319 last_xritag = NO_XRI;
4f774513 17320
0794d601
JS
17321 /* reset NVME buffer post count for next round of posting */
17322 post_cnt = 0;
4f774513 17323
0794d601
JS
17324 /* put posted NVME buffer-sgl posted on NVME buffer sgl list */
17325 while (!list_empty(&blck_nblist)) {
17326 list_remove_head(&blck_nblist, lpfc_ncmd,
c490850a 17327 struct lpfc_io_buf, list);
0794d601 17328 if (status) {
c490850a
JS
17329 /* Post error. Mark buffer unavailable. */
17330 lpfc_ncmd->flags |= LPFC_SBUF_NOT_POSTED;
0794d601 17331 } else {
c490850a
JS
17332 /* Post success, Mark buffer available. */
17333 lpfc_ncmd->flags &= ~LPFC_SBUF_NOT_POSTED;
0794d601
JS
17334 lpfc_ncmd->status = IOSTAT_SUCCESS;
17335 num_posted++;
17336 }
17337 list_add_tail(&lpfc_ncmd->list, &nvme_nblist);
17338 }
4f774513 17339 }
0794d601 17340 /* Push NVME buffers with sgl posted to the available list */
5e5b511d
JS
17341 lpfc_io_buf_replenish(phba, &nvme_nblist);
17342
0794d601 17343 return num_posted;
4f774513
JS
17344}
17345
17346/**
17347 * lpfc_fc_frame_check - Check that this frame is a valid frame to handle
17348 * @phba: pointer to lpfc_hba struct that the frame was received on
17349 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17350 *
17351 * This function checks the fields in the @fc_hdr to see if the FC frame is a
17352 * valid type of frame that the LPFC driver will handle. This function will
17353 * return a zero if the frame is a valid frame or a non zero value when the
17354 * frame does not pass the check.
17355 **/
17356static int
17357lpfc_fc_frame_check(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr)
17358{
474ffb74 17359 /* make rctl_names static to save stack space */
4f774513 17360 struct fc_vft_header *fc_vft_hdr;
546fc854 17361 uint32_t *header = (uint32_t *) fc_hdr;
4f774513 17362
e62245d9
JS
17363#define FC_RCTL_MDS_DIAGS 0xF4
17364
4f774513
JS
17365 switch (fc_hdr->fh_r_ctl) {
17366 case FC_RCTL_DD_UNCAT: /* uncategorized information */
17367 case FC_RCTL_DD_SOL_DATA: /* solicited data */
17368 case FC_RCTL_DD_UNSOL_CTL: /* unsolicited control */
17369 case FC_RCTL_DD_SOL_CTL: /* solicited control or reply */
17370 case FC_RCTL_DD_UNSOL_DATA: /* unsolicited data */
17371 case FC_RCTL_DD_DATA_DESC: /* data descriptor */
17372 case FC_RCTL_DD_UNSOL_CMD: /* unsolicited command */
17373 case FC_RCTL_DD_CMD_STATUS: /* command status */
17374 case FC_RCTL_ELS_REQ: /* extended link services request */
17375 case FC_RCTL_ELS_REP: /* extended link services reply */
17376 case FC_RCTL_ELS4_REQ: /* FC-4 ELS request */
17377 case FC_RCTL_ELS4_REP: /* FC-4 ELS reply */
17378 case FC_RCTL_BA_NOP: /* basic link service NOP */
17379 case FC_RCTL_BA_ABTS: /* basic link service abort */
17380 case FC_RCTL_BA_RMC: /* remove connection */
17381 case FC_RCTL_BA_ACC: /* basic accept */
17382 case FC_RCTL_BA_RJT: /* basic reject */
17383 case FC_RCTL_BA_PRMT:
17384 case FC_RCTL_ACK_1: /* acknowledge_1 */
17385 case FC_RCTL_ACK_0: /* acknowledge_0 */
17386 case FC_RCTL_P_RJT: /* port reject */
17387 case FC_RCTL_F_RJT: /* fabric reject */
17388 case FC_RCTL_P_BSY: /* port busy */
17389 case FC_RCTL_F_BSY: /* fabric busy to data frame */
17390 case FC_RCTL_F_BSYL: /* fabric busy to link control frame */
17391 case FC_RCTL_LCR: /* link credit reset */
ae9e28f3 17392 case FC_RCTL_MDS_DIAGS: /* MDS Diagnostics */
4f774513
JS
17393 case FC_RCTL_END: /* end */
17394 break;
17395 case FC_RCTL_VFTH: /* Virtual Fabric tagging Header */
17396 fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
17397 fc_hdr = &((struct fc_frame_header *)fc_vft_hdr)[1];
17398 return lpfc_fc_frame_check(phba, fc_hdr);
17399 default:
17400 goto drop;
17401 }
ae9e28f3 17402
4f774513
JS
17403 switch (fc_hdr->fh_type) {
17404 case FC_TYPE_BLS:
17405 case FC_TYPE_ELS:
17406 case FC_TYPE_FCP:
17407 case FC_TYPE_CT:
895427bd 17408 case FC_TYPE_NVME:
4f774513
JS
17409 break;
17410 case FC_TYPE_IP:
17411 case FC_TYPE_ILS:
17412 default:
17413 goto drop;
17414 }
546fc854 17415
4f774513 17416 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
78e1d200 17417 "2538 Received frame rctl:x%x, type:x%x, "
88f43a08 17418 "frame Data:%08x %08x %08x %08x %08x %08x %08x\n",
78e1d200
JS
17419 fc_hdr->fh_r_ctl, fc_hdr->fh_type,
17420 be32_to_cpu(header[0]), be32_to_cpu(header[1]),
17421 be32_to_cpu(header[2]), be32_to_cpu(header[3]),
17422 be32_to_cpu(header[4]), be32_to_cpu(header[5]),
17423 be32_to_cpu(header[6]));
4f774513
JS
17424 return 0;
17425drop:
17426 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS,
78e1d200
JS
17427 "2539 Dropped frame rctl:x%x type:x%x\n",
17428 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
4f774513
JS
17429 return 1;
17430}
17431
17432/**
17433 * lpfc_fc_hdr_get_vfi - Get the VFI from an FC frame
17434 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17435 *
17436 * This function processes the FC header to retrieve the VFI from the VF
17437 * header, if one exists. This function will return the VFI if one exists
17438 * or 0 if no VSAN Header exists.
17439 **/
17440static uint32_t
17441lpfc_fc_hdr_get_vfi(struct fc_frame_header *fc_hdr)
17442{
17443 struct fc_vft_header *fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
17444
17445 if (fc_hdr->fh_r_ctl != FC_RCTL_VFTH)
17446 return 0;
17447 return bf_get(fc_vft_hdr_vf_id, fc_vft_hdr);
17448}
17449
17450/**
17451 * lpfc_fc_frame_to_vport - Finds the vport that a frame is destined to
17452 * @phba: Pointer to the HBA structure to search for the vport on
17453 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17454 * @fcfi: The FC Fabric ID that the frame came from
7af29d45 17455 * @did: Destination ID to match against
4f774513
JS
17456 *
17457 * This function searches the @phba for a vport that matches the content of the
17458 * @fc_hdr passed in and the @fcfi. This function uses the @fc_hdr to fetch the
17459 * VFI, if the Virtual Fabric Tagging Header exists, and the DID. This function
17460 * returns the matching vport pointer or NULL if unable to match frame to a
17461 * vport.
17462 **/
17463static struct lpfc_vport *
17464lpfc_fc_frame_to_vport(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr,
895427bd 17465 uint16_t fcfi, uint32_t did)
4f774513
JS
17466{
17467 struct lpfc_vport **vports;
17468 struct lpfc_vport *vport = NULL;
17469 int i;
939723a4 17470
bf08611b
JS
17471 if (did == Fabric_DID)
17472 return phba->pport;
939723a4
JS
17473 if ((phba->pport->fc_flag & FC_PT2PT) &&
17474 !(phba->link_state == LPFC_HBA_READY))
17475 return phba->pport;
17476
4f774513 17477 vports = lpfc_create_vport_work_array(phba);
895427bd 17478 if (vports != NULL) {
4f774513
JS
17479 for (i = 0; i <= phba->max_vpi && vports[i] != NULL; i++) {
17480 if (phba->fcf.fcfi == fcfi &&
17481 vports[i]->vfi == lpfc_fc_hdr_get_vfi(fc_hdr) &&
17482 vports[i]->fc_myDID == did) {
17483 vport = vports[i];
17484 break;
17485 }
17486 }
895427bd 17487 }
4f774513
JS
17488 lpfc_destroy_vport_work_array(phba, vports);
17489 return vport;
17490}
17491
45ed1190
JS
17492/**
17493 * lpfc_update_rcv_time_stamp - Update vport's rcv seq time stamp
17494 * @vport: The vport to work on.
17495 *
17496 * This function updates the receive sequence time stamp for this vport. The
17497 * receive sequence time stamp indicates the time that the last frame of the
17498 * the sequence that has been idle for the longest amount of time was received.
17499 * the driver uses this time stamp to indicate if any received sequences have
17500 * timed out.
17501 **/
5d8b8167 17502static void
45ed1190
JS
17503lpfc_update_rcv_time_stamp(struct lpfc_vport *vport)
17504{
17505 struct lpfc_dmabuf *h_buf;
17506 struct hbq_dmabuf *dmabuf = NULL;
17507
17508 /* get the oldest sequence on the rcv list */
17509 h_buf = list_get_first(&vport->rcv_buffer_list,
17510 struct lpfc_dmabuf, list);
17511 if (!h_buf)
17512 return;
17513 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17514 vport->rcv_buffer_time_stamp = dmabuf->time_stamp;
17515}
17516
17517/**
17518 * lpfc_cleanup_rcv_buffers - Cleans up all outstanding receive sequences.
17519 * @vport: The vport that the received sequences were sent to.
17520 *
17521 * This function cleans up all outstanding received sequences. This is called
17522 * by the driver when a link event or user action invalidates all the received
17523 * sequences.
17524 **/
17525void
17526lpfc_cleanup_rcv_buffers(struct lpfc_vport *vport)
17527{
17528 struct lpfc_dmabuf *h_buf, *hnext;
17529 struct lpfc_dmabuf *d_buf, *dnext;
17530 struct hbq_dmabuf *dmabuf = NULL;
17531
17532 /* start with the oldest sequence on the rcv list */
17533 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17534 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17535 list_del_init(&dmabuf->hbuf.list);
17536 list_for_each_entry_safe(d_buf, dnext,
17537 &dmabuf->dbuf.list, list) {
17538 list_del_init(&d_buf->list);
17539 lpfc_in_buf_free(vport->phba, d_buf);
17540 }
17541 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17542 }
17543}
17544
17545/**
17546 * lpfc_rcv_seq_check_edtov - Cleans up timed out receive sequences.
17547 * @vport: The vport that the received sequences were sent to.
17548 *
17549 * This function determines whether any received sequences have timed out by
17550 * first checking the vport's rcv_buffer_time_stamp. If this time_stamp
17551 * indicates that there is at least one timed out sequence this routine will
17552 * go through the received sequences one at a time from most inactive to most
17553 * active to determine which ones need to be cleaned up. Once it has determined
17554 * that a sequence needs to be cleaned up it will simply free up the resources
17555 * without sending an abort.
17556 **/
17557void
17558lpfc_rcv_seq_check_edtov(struct lpfc_vport *vport)
17559{
17560 struct lpfc_dmabuf *h_buf, *hnext;
17561 struct lpfc_dmabuf *d_buf, *dnext;
17562 struct hbq_dmabuf *dmabuf = NULL;
17563 unsigned long timeout;
17564 int abort_count = 0;
17565
17566 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17567 vport->rcv_buffer_time_stamp);
17568 if (list_empty(&vport->rcv_buffer_list) ||
17569 time_before(jiffies, timeout))
17570 return;
17571 /* start with the oldest sequence on the rcv list */
17572 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17573 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17574 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17575 dmabuf->time_stamp);
17576 if (time_before(jiffies, timeout))
17577 break;
17578 abort_count++;
17579 list_del_init(&dmabuf->hbuf.list);
17580 list_for_each_entry_safe(d_buf, dnext,
17581 &dmabuf->dbuf.list, list) {
17582 list_del_init(&d_buf->list);
17583 lpfc_in_buf_free(vport->phba, d_buf);
17584 }
17585 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17586 }
17587 if (abort_count)
17588 lpfc_update_rcv_time_stamp(vport);
17589}
17590
4f774513
JS
17591/**
17592 * lpfc_fc_frame_add - Adds a frame to the vport's list of received sequences
7af29d45 17593 * @vport: pointer to a vitural port
4f774513
JS
17594 * @dmabuf: pointer to a dmabuf that describes the hdr and data of the FC frame
17595 *
17596 * This function searches through the existing incomplete sequences that have
17597 * been sent to this @vport. If the frame matches one of the incomplete
17598 * sequences then the dbuf in the @dmabuf is added to the list of frames that
17599 * make up that sequence. If no sequence is found that matches this frame then
17600 * the function will add the hbuf in the @dmabuf to the @vport's rcv_buffer_list
17601 * This function returns a pointer to the first dmabuf in the sequence list that
17602 * the frame was linked to.
17603 **/
17604static struct hbq_dmabuf *
17605lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17606{
17607 struct fc_frame_header *new_hdr;
17608 struct fc_frame_header *temp_hdr;
17609 struct lpfc_dmabuf *d_buf;
17610 struct lpfc_dmabuf *h_buf;
17611 struct hbq_dmabuf *seq_dmabuf = NULL;
17612 struct hbq_dmabuf *temp_dmabuf = NULL;
4360ca9c 17613 uint8_t found = 0;
4f774513 17614
4d9ab994 17615 INIT_LIST_HEAD(&dmabuf->dbuf.list);
45ed1190 17616 dmabuf->time_stamp = jiffies;
4f774513 17617 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
4360ca9c 17618
4f774513
JS
17619 /* Use the hdr_buf to find the sequence that this frame belongs to */
17620 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17621 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17622 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17623 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17624 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17625 continue;
17626 /* found a pending sequence that matches this frame */
17627 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17628 break;
17629 }
17630 if (!seq_dmabuf) {
17631 /*
17632 * This indicates first frame received for this sequence.
17633 * Queue the buffer on the vport's rcv_buffer_list.
17634 */
17635 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
45ed1190 17636 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17637 return dmabuf;
17638 }
17639 temp_hdr = seq_dmabuf->hbuf.virt;
eeead811
JS
17640 if (be16_to_cpu(new_hdr->fh_seq_cnt) <
17641 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4d9ab994
JS
17642 list_del_init(&seq_dmabuf->hbuf.list);
17643 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
17644 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
45ed1190 17645 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17646 return dmabuf;
17647 }
45ed1190
JS
17648 /* move this sequence to the tail to indicate a young sequence */
17649 list_move_tail(&seq_dmabuf->hbuf.list, &vport->rcv_buffer_list);
17650 seq_dmabuf->time_stamp = jiffies;
17651 lpfc_update_rcv_time_stamp(vport);
eeead811
JS
17652 if (list_empty(&seq_dmabuf->dbuf.list)) {
17653 temp_hdr = dmabuf->hbuf.virt;
17654 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
17655 return seq_dmabuf;
17656 }
4f774513 17657 /* find the correct place in the sequence to insert this frame */
4360ca9c
JS
17658 d_buf = list_entry(seq_dmabuf->dbuf.list.prev, typeof(*d_buf), list);
17659 while (!found) {
4f774513
JS
17660 temp_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17661 temp_hdr = (struct fc_frame_header *)temp_dmabuf->hbuf.virt;
17662 /*
17663 * If the frame's sequence count is greater than the frame on
17664 * the list then insert the frame right after this frame
17665 */
eeead811
JS
17666 if (be16_to_cpu(new_hdr->fh_seq_cnt) >
17667 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4f774513 17668 list_add(&dmabuf->dbuf.list, &temp_dmabuf->dbuf.list);
4360ca9c
JS
17669 found = 1;
17670 break;
4f774513 17671 }
4360ca9c
JS
17672
17673 if (&d_buf->list == &seq_dmabuf->dbuf.list)
17674 break;
17675 d_buf = list_entry(d_buf->list.prev, typeof(*d_buf), list);
4f774513 17676 }
4360ca9c
JS
17677
17678 if (found)
17679 return seq_dmabuf;
4f774513
JS
17680 return NULL;
17681}
17682
6669f9bb
JS
17683/**
17684 * lpfc_sli4_abort_partial_seq - Abort partially assembled unsol sequence
17685 * @vport: pointer to a vitural port
17686 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17687 *
17688 * This function tries to abort from the partially assembed sequence, described
17689 * by the information from basic abbort @dmabuf. It checks to see whether such
17690 * partially assembled sequence held by the driver. If so, it shall free up all
17691 * the frames from the partially assembled sequence.
17692 *
17693 * Return
17694 * true -- if there is matching partially assembled sequence present and all
17695 * the frames freed with the sequence;
17696 * false -- if there is no matching partially assembled sequence present so
17697 * nothing got aborted in the lower layer driver
17698 **/
17699static bool
17700lpfc_sli4_abort_partial_seq(struct lpfc_vport *vport,
17701 struct hbq_dmabuf *dmabuf)
17702{
17703 struct fc_frame_header *new_hdr;
17704 struct fc_frame_header *temp_hdr;
17705 struct lpfc_dmabuf *d_buf, *n_buf, *h_buf;
17706 struct hbq_dmabuf *seq_dmabuf = NULL;
17707
17708 /* Use the hdr_buf to find the sequence that matches this frame */
17709 INIT_LIST_HEAD(&dmabuf->dbuf.list);
17710 INIT_LIST_HEAD(&dmabuf->hbuf.list);
17711 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17712 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17713 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17714 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17715 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17716 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17717 continue;
17718 /* found a pending sequence that matches this frame */
17719 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17720 break;
17721 }
17722
17723 /* Free up all the frames from the partially assembled sequence */
17724 if (seq_dmabuf) {
17725 list_for_each_entry_safe(d_buf, n_buf,
17726 &seq_dmabuf->dbuf.list, list) {
17727 list_del_init(&d_buf->list);
17728 lpfc_in_buf_free(vport->phba, d_buf);
17729 }
17730 return true;
17731 }
17732 return false;
17733}
17734
6dd9e31c
JS
17735/**
17736 * lpfc_sli4_abort_ulp_seq - Abort assembled unsol sequence from ulp
17737 * @vport: pointer to a vitural port
17738 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17739 *
17740 * This function tries to abort from the assembed sequence from upper level
17741 * protocol, described by the information from basic abbort @dmabuf. It
17742 * checks to see whether such pending context exists at upper level protocol.
17743 * If so, it shall clean up the pending context.
17744 *
17745 * Return
17746 * true -- if there is matching pending context of the sequence cleaned
17747 * at ulp;
17748 * false -- if there is no matching pending context of the sequence present
17749 * at ulp.
17750 **/
17751static bool
17752lpfc_sli4_abort_ulp_seq(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17753{
17754 struct lpfc_hba *phba = vport->phba;
17755 int handled;
17756
17757 /* Accepting abort at ulp with SLI4 only */
17758 if (phba->sli_rev < LPFC_SLI_REV4)
17759 return false;
17760
17761 /* Register all caring upper level protocols to attend abort */
17762 handled = lpfc_ct_handle_unsol_abort(phba, dmabuf);
17763 if (handled)
17764 return true;
17765
17766 return false;
17767}
17768
6669f9bb 17769/**
546fc854 17770 * lpfc_sli4_seq_abort_rsp_cmpl - BLS ABORT RSP seq abort iocb complete handler
6669f9bb
JS
17771 * @phba: Pointer to HBA context object.
17772 * @cmd_iocbq: pointer to the command iocbq structure.
17773 * @rsp_iocbq: pointer to the response iocbq structure.
17774 *
546fc854 17775 * This function handles the sequence abort response iocb command complete
6669f9bb
JS
17776 * event. It properly releases the memory allocated to the sequence abort
17777 * accept iocb.
17778 **/
17779static void
546fc854 17780lpfc_sli4_seq_abort_rsp_cmpl(struct lpfc_hba *phba,
6669f9bb
JS
17781 struct lpfc_iocbq *cmd_iocbq,
17782 struct lpfc_iocbq *rsp_iocbq)
17783{
6dd9e31c
JS
17784 struct lpfc_nodelist *ndlp;
17785
17786 if (cmd_iocbq) {
17787 ndlp = (struct lpfc_nodelist *)cmd_iocbq->context1;
17788 lpfc_nlp_put(ndlp);
17789 lpfc_nlp_not_used(ndlp);
6669f9bb 17790 lpfc_sli_release_iocbq(phba, cmd_iocbq);
6dd9e31c 17791 }
6b5151fd
JS
17792
17793 /* Failure means BLS ABORT RSP did not get delivered to remote node*/
17794 if (rsp_iocbq && rsp_iocbq->iocb.ulpStatus)
372c187b 17795 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6b5151fd
JS
17796 "3154 BLS ABORT RSP failed, data: x%x/x%x\n",
17797 rsp_iocbq->iocb.ulpStatus,
17798 rsp_iocbq->iocb.un.ulpWord[4]);
6669f9bb
JS
17799}
17800
6d368e53
JS
17801/**
17802 * lpfc_sli4_xri_inrange - check xri is in range of xris owned by driver.
17803 * @phba: Pointer to HBA context object.
17804 * @xri: xri id in transaction.
17805 *
17806 * This function validates the xri maps to the known range of XRIs allocated an
17807 * used by the driver.
17808 **/
7851fe2c 17809uint16_t
6d368e53
JS
17810lpfc_sli4_xri_inrange(struct lpfc_hba *phba,
17811 uint16_t xri)
17812{
a2fc4aef 17813 uint16_t i;
6d368e53
JS
17814
17815 for (i = 0; i < phba->sli4_hba.max_cfg_param.max_xri; i++) {
17816 if (xri == phba->sli4_hba.xri_ids[i])
17817 return i;
17818 }
17819 return NO_XRI;
17820}
17821
6669f9bb 17822/**
546fc854 17823 * lpfc_sli4_seq_abort_rsp - bls rsp to sequence abort
7af29d45 17824 * @vport: pointer to a vitural port.
6669f9bb 17825 * @fc_hdr: pointer to a FC frame header.
7af29d45 17826 * @aborted: was the partially assembled receive sequence successfully aborted
6669f9bb 17827 *
546fc854 17828 * This function sends a basic response to a previous unsol sequence abort
6669f9bb
JS
17829 * event after aborting the sequence handling.
17830 **/
86c67379 17831void
6dd9e31c
JS
17832lpfc_sli4_seq_abort_rsp(struct lpfc_vport *vport,
17833 struct fc_frame_header *fc_hdr, bool aborted)
6669f9bb 17834{
6dd9e31c 17835 struct lpfc_hba *phba = vport->phba;
6669f9bb
JS
17836 struct lpfc_iocbq *ctiocb = NULL;
17837 struct lpfc_nodelist *ndlp;
ee0f4fe1 17838 uint16_t oxid, rxid, xri, lxri;
5ffc266e 17839 uint32_t sid, fctl;
6669f9bb 17840 IOCB_t *icmd;
546fc854 17841 int rc;
6669f9bb
JS
17842
17843 if (!lpfc_is_link_up(phba))
17844 return;
17845
17846 sid = sli4_sid_from_fc_hdr(fc_hdr);
17847 oxid = be16_to_cpu(fc_hdr->fh_ox_id);
5ffc266e 17848 rxid = be16_to_cpu(fc_hdr->fh_rx_id);
6669f9bb 17849
6dd9e31c 17850 ndlp = lpfc_findnode_did(vport, sid);
6669f9bb 17851 if (!ndlp) {
9d3d340d 17852 ndlp = lpfc_nlp_init(vport, sid);
6dd9e31c
JS
17853 if (!ndlp) {
17854 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17855 "1268 Failed to allocate ndlp for "
17856 "oxid:x%x SID:x%x\n", oxid, sid);
17857 return;
17858 }
6dd9e31c
JS
17859 /* Put ndlp onto pport node list */
17860 lpfc_enqueue_node(vport, ndlp);
17861 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
17862 /* re-setup ndlp without removing from node list */
17863 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
17864 if (!ndlp) {
17865 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17866 "3275 Failed to active ndlp found "
17867 "for oxid:x%x SID:x%x\n", oxid, sid);
17868 return;
17869 }
6669f9bb
JS
17870 }
17871
546fc854 17872 /* Allocate buffer for rsp iocb */
6669f9bb
JS
17873 ctiocb = lpfc_sli_get_iocbq(phba);
17874 if (!ctiocb)
17875 return;
17876
5ffc266e
JS
17877 /* Extract the F_CTL field from FC_HDR */
17878 fctl = sli4_fctl_from_fc_hdr(fc_hdr);
17879
6669f9bb 17880 icmd = &ctiocb->iocb;
6669f9bb 17881 icmd->un.xseq64.bdl.bdeSize = 0;
5ffc266e 17882 icmd->un.xseq64.bdl.ulpIoTag32 = 0;
6669f9bb
JS
17883 icmd->un.xseq64.w5.hcsw.Dfctl = 0;
17884 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_ACC;
17885 icmd->un.xseq64.w5.hcsw.Type = FC_TYPE_BLS;
17886
17887 /* Fill in the rest of iocb fields */
17888 icmd->ulpCommand = CMD_XMIT_BLS_RSP64_CX;
17889 icmd->ulpBdeCount = 0;
17890 icmd->ulpLe = 1;
17891 icmd->ulpClass = CLASS3;
6d368e53 17892 icmd->ulpContext = phba->sli4_hba.rpi_ids[ndlp->nlp_rpi];
6dd9e31c 17893 ctiocb->context1 = lpfc_nlp_get(ndlp);
6669f9bb 17894
6669f9bb 17895 ctiocb->vport = phba->pport;
546fc854 17896 ctiocb->iocb_cmpl = lpfc_sli4_seq_abort_rsp_cmpl;
6d368e53 17897 ctiocb->sli4_lxritag = NO_XRI;
546fc854
JS
17898 ctiocb->sli4_xritag = NO_XRI;
17899
ee0f4fe1
JS
17900 if (fctl & FC_FC_EX_CTX)
17901 /* Exchange responder sent the abort so we
17902 * own the oxid.
17903 */
17904 xri = oxid;
17905 else
17906 xri = rxid;
17907 lxri = lpfc_sli4_xri_inrange(phba, xri);
17908 if (lxri != NO_XRI)
17909 lpfc_set_rrq_active(phba, ndlp, lxri,
17910 (xri == oxid) ? rxid : oxid, 0);
6dd9e31c
JS
17911 /* For BA_ABTS from exchange responder, if the logical xri with
17912 * the oxid maps to the FCP XRI range, the port no longer has
17913 * that exchange context, send a BLS_RJT. Override the IOCB for
17914 * a BA_RJT.
17915 */
17916 if ((fctl & FC_FC_EX_CTX) &&
895427bd 17917 (lxri > lpfc_sli4_get_iocb_cnt(phba))) {
6dd9e31c
JS
17918 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17919 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17920 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17921 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17922 }
17923
17924 /* If BA_ABTS failed to abort a partially assembled receive sequence,
17925 * the driver no longer has that exchange, send a BLS_RJT. Override
17926 * the IOCB for a BA_RJT.
546fc854 17927 */
6dd9e31c 17928 if (aborted == false) {
546fc854
JS
17929 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17930 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17931 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17932 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17933 }
6669f9bb 17934
5ffc266e
JS
17935 if (fctl & FC_FC_EX_CTX) {
17936 /* ABTS sent by responder to CT exchange, construction
17937 * of BA_ACC will use OX_ID from ABTS for the XRI_TAG
17938 * field and RX_ID from ABTS for RX_ID field.
17939 */
546fc854 17940 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_RSP);
5ffc266e
JS
17941 } else {
17942 /* ABTS sent by initiator to CT exchange, construction
17943 * of BA_ACC will need to allocate a new XRI as for the
f09c3acc 17944 * XRI_TAG field.
5ffc266e 17945 */
546fc854 17946 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_INT);
5ffc266e 17947 }
f09c3acc 17948 bf_set(lpfc_abts_rxid, &icmd->un.bls_rsp, rxid);
546fc854 17949 bf_set(lpfc_abts_oxid, &icmd->un.bls_rsp, oxid);
5ffc266e 17950
546fc854 17951 /* Xmit CT abts response on exchange <xid> */
6dd9e31c
JS
17952 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,
17953 "1200 Send BLS cmd x%x on oxid x%x Data: x%x\n",
17954 icmd->un.xseq64.w5.hcsw.Rctl, oxid, phba->link_state);
546fc854
JS
17955
17956 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, ctiocb, 0);
17957 if (rc == IOCB_ERROR) {
372c187b 17958 lpfc_printf_vlog(vport, KERN_ERR, LOG_TRACE_EVENT,
6dd9e31c
JS
17959 "2925 Failed to issue CT ABTS RSP x%x on "
17960 "xri x%x, Data x%x\n",
17961 icmd->un.xseq64.w5.hcsw.Rctl, oxid,
17962 phba->link_state);
17963 lpfc_nlp_put(ndlp);
17964 ctiocb->context1 = NULL;
546fc854
JS
17965 lpfc_sli_release_iocbq(phba, ctiocb);
17966 }
6669f9bb
JS
17967}
17968
17969/**
17970 * lpfc_sli4_handle_unsol_abort - Handle sli-4 unsolicited abort event
17971 * @vport: Pointer to the vport on which this sequence was received
17972 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17973 *
17974 * This function handles an SLI-4 unsolicited abort event. If the unsolicited
17975 * receive sequence is only partially assembed by the driver, it shall abort
17976 * the partially assembled frames for the sequence. Otherwise, if the
17977 * unsolicited receive sequence has been completely assembled and passed to
17978 * the Upper Layer Protocol (UPL), it then mark the per oxid status for the
17979 * unsolicited sequence has been aborted. After that, it will issue a basic
17980 * accept to accept the abort.
17981 **/
5d8b8167 17982static void
6669f9bb
JS
17983lpfc_sli4_handle_unsol_abort(struct lpfc_vport *vport,
17984 struct hbq_dmabuf *dmabuf)
17985{
17986 struct lpfc_hba *phba = vport->phba;
17987 struct fc_frame_header fc_hdr;
5ffc266e 17988 uint32_t fctl;
6dd9e31c 17989 bool aborted;
6669f9bb 17990
6669f9bb
JS
17991 /* Make a copy of fc_hdr before the dmabuf being released */
17992 memcpy(&fc_hdr, dmabuf->hbuf.virt, sizeof(struct fc_frame_header));
5ffc266e 17993 fctl = sli4_fctl_from_fc_hdr(&fc_hdr);
6669f9bb 17994
5ffc266e 17995 if (fctl & FC_FC_EX_CTX) {
6dd9e31c
JS
17996 /* ABTS by responder to exchange, no cleanup needed */
17997 aborted = true;
5ffc266e 17998 } else {
6dd9e31c
JS
17999 /* ABTS by initiator to exchange, need to do cleanup */
18000 aborted = lpfc_sli4_abort_partial_seq(vport, dmabuf);
18001 if (aborted == false)
18002 aborted = lpfc_sli4_abort_ulp_seq(vport, dmabuf);
5ffc266e 18003 }
6dd9e31c
JS
18004 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18005
86c67379
JS
18006 if (phba->nvmet_support) {
18007 lpfc_nvmet_rcv_unsol_abort(vport, &fc_hdr);
18008 return;
18009 }
18010
6dd9e31c
JS
18011 /* Respond with BA_ACC or BA_RJT accordingly */
18012 lpfc_sli4_seq_abort_rsp(vport, &fc_hdr, aborted);
6669f9bb
JS
18013}
18014
4f774513
JS
18015/**
18016 * lpfc_seq_complete - Indicates if a sequence is complete
18017 * @dmabuf: pointer to a dmabuf that describes the FC sequence
18018 *
18019 * This function checks the sequence, starting with the frame described by
18020 * @dmabuf, to see if all the frames associated with this sequence are present.
18021 * the frames associated with this sequence are linked to the @dmabuf using the
18022 * dbuf list. This function looks for two major things. 1) That the first frame
18023 * has a sequence count of zero. 2) There is a frame with last frame of sequence
18024 * set. 3) That there are no holes in the sequence count. The function will
18025 * return 1 when the sequence is complete, otherwise it will return 0.
18026 **/
18027static int
18028lpfc_seq_complete(struct hbq_dmabuf *dmabuf)
18029{
18030 struct fc_frame_header *hdr;
18031 struct lpfc_dmabuf *d_buf;
18032 struct hbq_dmabuf *seq_dmabuf;
18033 uint32_t fctl;
18034 int seq_count = 0;
18035
18036 hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
18037 /* make sure first fame of sequence has a sequence count of zero */
18038 if (hdr->fh_seq_cnt != seq_count)
18039 return 0;
18040 fctl = (hdr->fh_f_ctl[0] << 16 |
18041 hdr->fh_f_ctl[1] << 8 |
18042 hdr->fh_f_ctl[2]);
18043 /* If last frame of sequence we can return success. */
18044 if (fctl & FC_FC_END_SEQ)
18045 return 1;
18046 list_for_each_entry(d_buf, &dmabuf->dbuf.list, list) {
18047 seq_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
18048 hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
18049 /* If there is a hole in the sequence count then fail. */
eeead811 18050 if (++seq_count != be16_to_cpu(hdr->fh_seq_cnt))
4f774513
JS
18051 return 0;
18052 fctl = (hdr->fh_f_ctl[0] << 16 |
18053 hdr->fh_f_ctl[1] << 8 |
18054 hdr->fh_f_ctl[2]);
18055 /* If last frame of sequence we can return success. */
18056 if (fctl & FC_FC_END_SEQ)
18057 return 1;
18058 }
18059 return 0;
18060}
18061
18062/**
18063 * lpfc_prep_seq - Prep sequence for ULP processing
18064 * @vport: Pointer to the vport on which this sequence was received
7af29d45 18065 * @seq_dmabuf: pointer to a dmabuf that describes the FC sequence
4f774513
JS
18066 *
18067 * This function takes a sequence, described by a list of frames, and creates
18068 * a list of iocbq structures to describe the sequence. This iocbq list will be
18069 * used to issue to the generic unsolicited sequence handler. This routine
18070 * returns a pointer to the first iocbq in the list. If the function is unable
18071 * to allocate an iocbq then it throw out the received frames that were not
18072 * able to be described and return a pointer to the first iocbq. If unable to
18073 * allocate any iocbqs (including the first) this function will return NULL.
18074 **/
18075static struct lpfc_iocbq *
18076lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
18077{
7851fe2c 18078 struct hbq_dmabuf *hbq_buf;
4f774513
JS
18079 struct lpfc_dmabuf *d_buf, *n_buf;
18080 struct lpfc_iocbq *first_iocbq, *iocbq;
18081 struct fc_frame_header *fc_hdr;
18082 uint32_t sid;
7851fe2c 18083 uint32_t len, tot_len;
eeead811 18084 struct ulp_bde64 *pbde;
4f774513
JS
18085
18086 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
18087 /* remove from receive buffer list */
18088 list_del_init(&seq_dmabuf->hbuf.list);
45ed1190 18089 lpfc_update_rcv_time_stamp(vport);
4f774513 18090 /* get the Remote Port's SID */
6669f9bb 18091 sid = sli4_sid_from_fc_hdr(fc_hdr);
7851fe2c 18092 tot_len = 0;
4f774513
JS
18093 /* Get an iocbq struct to fill in. */
18094 first_iocbq = lpfc_sli_get_iocbq(vport->phba);
18095 if (first_iocbq) {
18096 /* Initialize the first IOCB. */
8fa38513 18097 first_iocbq->iocb.unsli3.rcvsli3.acc_len = 0;
4f774513 18098 first_iocbq->iocb.ulpStatus = IOSTAT_SUCCESS;
895427bd 18099 first_iocbq->vport = vport;
939723a4
JS
18100
18101 /* Check FC Header to see what TYPE of frame we are rcv'ing */
18102 if (sli4_type_from_fc_hdr(fc_hdr) == FC_TYPE_ELS) {
18103 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_ELS64_CX;
18104 first_iocbq->iocb.un.rcvels.parmRo =
18105 sli4_did_from_fc_hdr(fc_hdr);
18106 first_iocbq->iocb.ulpPU = PARM_NPIV_DID;
18107 } else
18108 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_SEQ64_CX;
7851fe2c
JS
18109 first_iocbq->iocb.ulpContext = NO_XRI;
18110 first_iocbq->iocb.unsli3.rcvsli3.ox_id =
18111 be16_to_cpu(fc_hdr->fh_ox_id);
18112 /* iocbq is prepped for internal consumption. Physical vpi. */
18113 first_iocbq->iocb.unsli3.rcvsli3.vpi =
18114 vport->phba->vpi_ids[vport->vpi];
4f774513 18115 /* put the first buffer into the first IOCBq */
48a5a664
JS
18116 tot_len = bf_get(lpfc_rcqe_length,
18117 &seq_dmabuf->cq_event.cqe.rcqe_cmpl);
18118
4f774513
JS
18119 first_iocbq->context2 = &seq_dmabuf->dbuf;
18120 first_iocbq->context3 = NULL;
18121 first_iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
18122 if (tot_len > LPFC_DATA_BUF_SIZE)
18123 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 18124 LPFC_DATA_BUF_SIZE;
48a5a664
JS
18125 else
18126 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize = tot_len;
18127
4f774513 18128 first_iocbq->iocb.un.rcvels.remoteID = sid;
48a5a664 18129
7851fe2c 18130 first_iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
4f774513
JS
18131 }
18132 iocbq = first_iocbq;
18133 /*
18134 * Each IOCBq can have two Buffers assigned, so go through the list
18135 * of buffers for this sequence and save two buffers in each IOCBq
18136 */
18137 list_for_each_entry_safe(d_buf, n_buf, &seq_dmabuf->dbuf.list, list) {
18138 if (!iocbq) {
18139 lpfc_in_buf_free(vport->phba, d_buf);
18140 continue;
18141 }
18142 if (!iocbq->context3) {
18143 iocbq->context3 = d_buf;
18144 iocbq->iocb.ulpBdeCount++;
7851fe2c
JS
18145 /* We need to get the size out of the right CQE */
18146 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
18147 len = bf_get(lpfc_rcqe_length,
18148 &hbq_buf->cq_event.cqe.rcqe_cmpl);
48a5a664
JS
18149 pbde = (struct ulp_bde64 *)
18150 &iocbq->iocb.unsli3.sli3Words[4];
18151 if (len > LPFC_DATA_BUF_SIZE)
18152 pbde->tus.f.bdeSize = LPFC_DATA_BUF_SIZE;
18153 else
18154 pbde->tus.f.bdeSize = len;
18155
7851fe2c
JS
18156 iocbq->iocb.unsli3.rcvsli3.acc_len += len;
18157 tot_len += len;
4f774513
JS
18158 } else {
18159 iocbq = lpfc_sli_get_iocbq(vport->phba);
18160 if (!iocbq) {
18161 if (first_iocbq) {
18162 first_iocbq->iocb.ulpStatus =
18163 IOSTAT_FCP_RSP_ERROR;
18164 first_iocbq->iocb.un.ulpWord[4] =
18165 IOERR_NO_RESOURCES;
18166 }
18167 lpfc_in_buf_free(vport->phba, d_buf);
18168 continue;
18169 }
48a5a664
JS
18170 /* We need to get the size out of the right CQE */
18171 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
18172 len = bf_get(lpfc_rcqe_length,
18173 &hbq_buf->cq_event.cqe.rcqe_cmpl);
4f774513
JS
18174 iocbq->context2 = d_buf;
18175 iocbq->context3 = NULL;
18176 iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
18177 if (len > LPFC_DATA_BUF_SIZE)
18178 iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 18179 LPFC_DATA_BUF_SIZE;
48a5a664
JS
18180 else
18181 iocbq->iocb.un.cont64[0].tus.f.bdeSize = len;
7851fe2c 18182
7851fe2c
JS
18183 tot_len += len;
18184 iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
18185
4f774513
JS
18186 iocbq->iocb.un.rcvels.remoteID = sid;
18187 list_add_tail(&iocbq->list, &first_iocbq->list);
18188 }
18189 }
39c4f1a9
JS
18190 /* Free the sequence's header buffer */
18191 if (!first_iocbq)
18192 lpfc_in_buf_free(vport->phba, &seq_dmabuf->dbuf);
18193
4f774513
JS
18194 return first_iocbq;
18195}
18196
6669f9bb
JS
18197static void
18198lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *vport,
18199 struct hbq_dmabuf *seq_dmabuf)
18200{
18201 struct fc_frame_header *fc_hdr;
18202 struct lpfc_iocbq *iocbq, *curr_iocb, *next_iocb;
18203 struct lpfc_hba *phba = vport->phba;
18204
18205 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
18206 iocbq = lpfc_prep_seq(vport, seq_dmabuf);
18207 if (!iocbq) {
372c187b 18208 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6669f9bb
JS
18209 "2707 Ring %d handler: Failed to allocate "
18210 "iocb Rctl x%x Type x%x received\n",
18211 LPFC_ELS_RING,
18212 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
18213 return;
18214 }
18215 if (!lpfc_complete_unsol_iocb(phba,
895427bd 18216 phba->sli4_hba.els_wq->pring,
6669f9bb
JS
18217 iocbq, fc_hdr->fh_r_ctl,
18218 fc_hdr->fh_type))
372c187b 18219 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6669f9bb
JS
18220 "2540 Ring %d handler: unexpected Rctl "
18221 "x%x Type x%x received\n",
18222 LPFC_ELS_RING,
18223 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
18224
18225 /* Free iocb created in lpfc_prep_seq */
18226 list_for_each_entry_safe(curr_iocb, next_iocb,
18227 &iocbq->list, list) {
18228 list_del_init(&curr_iocb->list);
18229 lpfc_sli_release_iocbq(phba, curr_iocb);
18230 }
18231 lpfc_sli_release_iocbq(phba, iocbq);
18232}
18233
ae9e28f3
JS
18234static void
18235lpfc_sli4_mds_loopback_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
18236 struct lpfc_iocbq *rspiocb)
18237{
18238 struct lpfc_dmabuf *pcmd = cmdiocb->context2;
18239
18240 if (pcmd && pcmd->virt)
771db5c0 18241 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3
JS
18242 kfree(pcmd);
18243 lpfc_sli_release_iocbq(phba, cmdiocb);
e817e5d7 18244 lpfc_drain_txq(phba);
ae9e28f3
JS
18245}
18246
18247static void
18248lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
18249 struct hbq_dmabuf *dmabuf)
18250{
18251 struct fc_frame_header *fc_hdr;
18252 struct lpfc_hba *phba = vport->phba;
18253 struct lpfc_iocbq *iocbq = NULL;
18254 union lpfc_wqe *wqe;
18255 struct lpfc_dmabuf *pcmd = NULL;
18256 uint32_t frame_len;
18257 int rc;
e817e5d7 18258 unsigned long iflags;
ae9e28f3
JS
18259
18260 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
18261 frame_len = bf_get(lpfc_rcqe_length, &dmabuf->cq_event.cqe.rcqe_cmpl);
18262
18263 /* Send the received frame back */
18264 iocbq = lpfc_sli_get_iocbq(phba);
e817e5d7
JS
18265 if (!iocbq) {
18266 /* Queue cq event and wakeup worker thread to process it */
18267 spin_lock_irqsave(&phba->hbalock, iflags);
18268 list_add_tail(&dmabuf->cq_event.list,
18269 &phba->sli4_hba.sp_queue_event);
18270 phba->hba_flag |= HBA_SP_QUEUE_EVT;
18271 spin_unlock_irqrestore(&phba->hbalock, iflags);
18272 lpfc_worker_wake_up(phba);
18273 return;
18274 }
ae9e28f3
JS
18275
18276 /* Allocate buffer for command payload */
18277 pcmd = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
18278 if (pcmd)
771db5c0 18279 pcmd->virt = dma_pool_alloc(phba->lpfc_drb_pool, GFP_KERNEL,
ae9e28f3
JS
18280 &pcmd->phys);
18281 if (!pcmd || !pcmd->virt)
18282 goto exit;
18283
18284 INIT_LIST_HEAD(&pcmd->list);
18285
18286 /* copyin the payload */
18287 memcpy(pcmd->virt, dmabuf->dbuf.virt, frame_len);
18288
18289 /* fill in BDE's for command */
18290 iocbq->iocb.un.xseq64.bdl.addrHigh = putPaddrHigh(pcmd->phys);
18291 iocbq->iocb.un.xseq64.bdl.addrLow = putPaddrLow(pcmd->phys);
18292 iocbq->iocb.un.xseq64.bdl.bdeFlags = BUFF_TYPE_BDE_64;
18293 iocbq->iocb.un.xseq64.bdl.bdeSize = frame_len;
18294
18295 iocbq->context2 = pcmd;
18296 iocbq->vport = vport;
18297 iocbq->iocb_flag &= ~LPFC_FIP_ELS_ID_MASK;
18298 iocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
18299
18300 /*
18301 * Setup rest of the iocb as though it were a WQE
18302 * Build the SEND_FRAME WQE
18303 */
18304 wqe = (union lpfc_wqe *)&iocbq->iocb;
18305
18306 wqe->send_frame.frame_len = frame_len;
18307 wqe->send_frame.fc_hdr_wd0 = be32_to_cpu(*((uint32_t *)fc_hdr));
18308 wqe->send_frame.fc_hdr_wd1 = be32_to_cpu(*((uint32_t *)fc_hdr + 1));
18309 wqe->send_frame.fc_hdr_wd2 = be32_to_cpu(*((uint32_t *)fc_hdr + 2));
18310 wqe->send_frame.fc_hdr_wd3 = be32_to_cpu(*((uint32_t *)fc_hdr + 3));
18311 wqe->send_frame.fc_hdr_wd4 = be32_to_cpu(*((uint32_t *)fc_hdr + 4));
18312 wqe->send_frame.fc_hdr_wd5 = be32_to_cpu(*((uint32_t *)fc_hdr + 5));
18313
18314 iocbq->iocb.ulpCommand = CMD_SEND_FRAME;
18315 iocbq->iocb.ulpLe = 1;
18316 iocbq->iocb_cmpl = lpfc_sli4_mds_loopback_cmpl;
18317 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, iocbq, 0);
18318 if (rc == IOCB_ERROR)
18319 goto exit;
18320
18321 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18322 return;
18323
18324exit:
18325 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
18326 "2023 Unable to process MDS loopback frame\n");
18327 if (pcmd && pcmd->virt)
771db5c0 18328 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3 18329 kfree(pcmd);
401bb416
DK
18330 if (iocbq)
18331 lpfc_sli_release_iocbq(phba, iocbq);
ae9e28f3
JS
18332 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18333}
18334
4f774513
JS
18335/**
18336 * lpfc_sli4_handle_received_buffer - Handle received buffers from firmware
18337 * @phba: Pointer to HBA context object.
7af29d45 18338 * @dmabuf: Pointer to a dmabuf that describes the FC sequence.
4f774513
JS
18339 *
18340 * This function is called with no lock held. This function processes all
18341 * the received buffers and gives it to upper layers when a received buffer
18342 * indicates that it is the final frame in the sequence. The interrupt
895427bd 18343 * service routine processes received buffers at interrupt contexts.
4f774513
JS
18344 * Worker thread calls lpfc_sli4_handle_received_buffer, which will call the
18345 * appropriate receive function when the final frame in a sequence is received.
18346 **/
4d9ab994
JS
18347void
18348lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,
18349 struct hbq_dmabuf *dmabuf)
4f774513 18350{
4d9ab994 18351 struct hbq_dmabuf *seq_dmabuf;
4f774513
JS
18352 struct fc_frame_header *fc_hdr;
18353 struct lpfc_vport *vport;
18354 uint32_t fcfi;
939723a4 18355 uint32_t did;
4f774513 18356
4f774513 18357 /* Process each received buffer */
4d9ab994 18358 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
2ea259ee 18359
e817e5d7
JS
18360 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
18361 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
18362 vport = phba->pport;
18363 /* Handle MDS Loopback frames */
18364 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
18365 return;
18366 }
18367
4d9ab994
JS
18368 /* check to see if this a valid type of frame */
18369 if (lpfc_fc_frame_check(phba, fc_hdr)) {
18370 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18371 return;
18372 }
2ea259ee 18373
7851fe2c
JS
18374 if ((bf_get(lpfc_cqe_code,
18375 &dmabuf->cq_event.cqe.rcqe_cmpl) == CQE_CODE_RECEIVE_V1))
18376 fcfi = bf_get(lpfc_rcqe_fcf_id_v1,
18377 &dmabuf->cq_event.cqe.rcqe_cmpl);
18378 else
18379 fcfi = bf_get(lpfc_rcqe_fcf_id,
18380 &dmabuf->cq_event.cqe.rcqe_cmpl);
939723a4 18381
e62245d9
JS
18382 if (fc_hdr->fh_r_ctl == 0xF4 && fc_hdr->fh_type == 0xFF) {
18383 vport = phba->pport;
18384 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
18385 "2023 MDS Loopback %d bytes\n",
18386 bf_get(lpfc_rcqe_length,
18387 &dmabuf->cq_event.cqe.rcqe_cmpl));
18388 /* Handle MDS Loopback frames */
18389 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
18390 return;
18391 }
18392
895427bd
JS
18393 /* d_id this frame is directed to */
18394 did = sli4_did_from_fc_hdr(fc_hdr);
18395
18396 vport = lpfc_fc_frame_to_vport(phba, fc_hdr, fcfi, did);
939723a4 18397 if (!vport) {
4d9ab994
JS
18398 /* throw out the frame */
18399 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18400 return;
18401 }
939723a4 18402
939723a4
JS
18403 /* vport is registered unless we rcv a FLOGI directed to Fabric_DID */
18404 if (!(vport->vpi_state & LPFC_VPI_REGISTERED) &&
18405 (did != Fabric_DID)) {
18406 /*
18407 * Throw out the frame if we are not pt2pt.
18408 * The pt2pt protocol allows for discovery frames
18409 * to be received without a registered VPI.
18410 */
18411 if (!(vport->fc_flag & FC_PT2PT) ||
18412 (phba->link_state == LPFC_HBA_READY)) {
18413 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18414 return;
18415 }
18416 }
18417
6669f9bb
JS
18418 /* Handle the basic abort sequence (BA_ABTS) event */
18419 if (fc_hdr->fh_r_ctl == FC_RCTL_BA_ABTS) {
18420 lpfc_sli4_handle_unsol_abort(vport, dmabuf);
18421 return;
18422 }
18423
4d9ab994
JS
18424 /* Link this frame */
18425 seq_dmabuf = lpfc_fc_frame_add(vport, dmabuf);
18426 if (!seq_dmabuf) {
18427 /* unable to add frame to vport - throw it out */
18428 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18429 return;
18430 }
18431 /* If not last frame in sequence continue processing frames. */
def9c7a9 18432 if (!lpfc_seq_complete(seq_dmabuf))
4d9ab994 18433 return;
def9c7a9 18434
6669f9bb
JS
18435 /* Send the complete sequence to the upper layer protocol */
18436 lpfc_sli4_send_seq_to_ulp(vport, seq_dmabuf);
4f774513 18437}
6fb120a7
JS
18438
18439/**
18440 * lpfc_sli4_post_all_rpi_hdrs - Post the rpi header memory region to the port
18441 * @phba: pointer to lpfc hba data structure.
18442 *
18443 * This routine is invoked to post rpi header templates to the
18444 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18445 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18446 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18447 *
18448 * This routine does not require any locks. It's usage is expected
18449 * to be driver load or reset recovery when the driver is
18450 * sequential.
18451 *
18452 * Return codes
af901ca1 18453 * 0 - successful
d439d286 18454 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18455 * When this error occurs, the driver is not guaranteed
18456 * to have any rpi regions posted to the device and
18457 * must either attempt to repost the regions or take a
18458 * fatal error.
18459 **/
18460int
18461lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *phba)
18462{
18463 struct lpfc_rpi_hdr *rpi_page;
18464 uint32_t rc = 0;
6d368e53
JS
18465 uint16_t lrpi = 0;
18466
18467 /* SLI4 ports that support extents do not require RPI headers. */
18468 if (!phba->sli4_hba.rpi_hdrs_in_use)
18469 goto exit;
18470 if (phba->sli4_hba.extents_in_use)
18471 return -EIO;
6fb120a7 18472
6fb120a7 18473 list_for_each_entry(rpi_page, &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6d368e53
JS
18474 /*
18475 * Assign the rpi headers a physical rpi only if the driver
18476 * has not initialized those resources. A port reset only
18477 * needs the headers posted.
18478 */
18479 if (bf_get(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags) !=
18480 LPFC_RPI_RSRC_RDY)
18481 rpi_page->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
18482
6fb120a7
JS
18483 rc = lpfc_sli4_post_rpi_hdr(phba, rpi_page);
18484 if (rc != MBX_SUCCESS) {
372c187b 18485 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6fb120a7
JS
18486 "2008 Error %d posting all rpi "
18487 "headers\n", rc);
18488 rc = -EIO;
18489 break;
18490 }
18491 }
18492
6d368e53
JS
18493 exit:
18494 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags,
18495 LPFC_RPI_RSRC_RDY);
6fb120a7
JS
18496 return rc;
18497}
18498
18499/**
18500 * lpfc_sli4_post_rpi_hdr - Post an rpi header memory region to the port
18501 * @phba: pointer to lpfc hba data structure.
18502 * @rpi_page: pointer to the rpi memory region.
18503 *
18504 * This routine is invoked to post a single rpi header to the
18505 * HBA consistent with the SLI-4 interface spec. This memory region
18506 * maps up to 64 rpi context regions.
18507 *
18508 * Return codes
af901ca1 18509 * 0 - successful
d439d286
JS
18510 * -ENOMEM - No available memory
18511 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18512 **/
18513int
18514lpfc_sli4_post_rpi_hdr(struct lpfc_hba *phba, struct lpfc_rpi_hdr *rpi_page)
18515{
18516 LPFC_MBOXQ_t *mboxq;
18517 struct lpfc_mbx_post_hdr_tmpl *hdr_tmpl;
18518 uint32_t rc = 0;
6fb120a7
JS
18519 uint32_t shdr_status, shdr_add_status;
18520 union lpfc_sli4_cfg_shdr *shdr;
18521
6d368e53
JS
18522 /* SLI4 ports that support extents do not require RPI headers. */
18523 if (!phba->sli4_hba.rpi_hdrs_in_use)
18524 return rc;
18525 if (phba->sli4_hba.extents_in_use)
18526 return -EIO;
18527
6fb120a7
JS
18528 /* The port is notified of the header region via a mailbox command. */
18529 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18530 if (!mboxq) {
372c187b 18531 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6fb120a7
JS
18532 "2001 Unable to allocate memory for issuing "
18533 "SLI_CONFIG_SPECIAL mailbox command\n");
18534 return -ENOMEM;
18535 }
18536
18537 /* Post all rpi memory regions to the port. */
18538 hdr_tmpl = &mboxq->u.mqe.un.hdr_tmpl;
6fb120a7
JS
18539 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18540 LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE,
18541 sizeof(struct lpfc_mbx_post_hdr_tmpl) -
fedd3b7b
JS
18542 sizeof(struct lpfc_sli4_cfg_mhdr),
18543 LPFC_SLI4_MBX_EMBED);
6d368e53
JS
18544
18545
18546 /* Post the physical rpi to the port for this rpi header. */
6fb120a7
JS
18547 bf_set(lpfc_mbx_post_hdr_tmpl_rpi_offset, hdr_tmpl,
18548 rpi_page->start_rpi);
6d368e53
JS
18549 bf_set(lpfc_mbx_post_hdr_tmpl_page_cnt,
18550 hdr_tmpl, rpi_page->page_count);
18551
6fb120a7
JS
18552 hdr_tmpl->rpi_paddr_lo = putPaddrLow(rpi_page->dmabuf->phys);
18553 hdr_tmpl->rpi_paddr_hi = putPaddrHigh(rpi_page->dmabuf->phys);
f1126688 18554 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6fb120a7
JS
18555 shdr = (union lpfc_sli4_cfg_shdr *) &hdr_tmpl->header.cfg_shdr;
18556 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18557 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18558 if (rc != MBX_TIMEOUT)
18559 mempool_free(mboxq, phba->mbox_mem_pool);
18560 if (shdr_status || shdr_add_status || rc) {
372c187b 18561 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6fb120a7
JS
18562 "2514 POST_RPI_HDR mailbox failed with "
18563 "status x%x add_status x%x, mbx status x%x\n",
18564 shdr_status, shdr_add_status, rc);
18565 rc = -ENXIO;
845d9e8d
JS
18566 } else {
18567 /*
18568 * The next_rpi stores the next logical module-64 rpi value used
18569 * to post physical rpis in subsequent rpi postings.
18570 */
18571 spin_lock_irq(&phba->hbalock);
18572 phba->sli4_hba.next_rpi = rpi_page->next_rpi;
18573 spin_unlock_irq(&phba->hbalock);
6fb120a7
JS
18574 }
18575 return rc;
18576}
18577
18578/**
18579 * lpfc_sli4_alloc_rpi - Get an available rpi in the device's range
18580 * @phba: pointer to lpfc hba data structure.
18581 *
18582 * This routine is invoked to post rpi header templates to the
18583 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18584 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18585 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18586 *
18587 * Returns
af901ca1 18588 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
6fb120a7
JS
18589 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
18590 **/
18591int
18592lpfc_sli4_alloc_rpi(struct lpfc_hba *phba)
18593{
6d368e53
JS
18594 unsigned long rpi;
18595 uint16_t max_rpi, rpi_limit;
18596 uint16_t rpi_remaining, lrpi = 0;
6fb120a7 18597 struct lpfc_rpi_hdr *rpi_hdr;
4902b381 18598 unsigned long iflag;
6fb120a7 18599
6fb120a7 18600 /*
6d368e53
JS
18601 * Fetch the next logical rpi. Because this index is logical,
18602 * the driver starts at 0 each time.
6fb120a7 18603 */
4902b381 18604 spin_lock_irqsave(&phba->hbalock, iflag);
be6bb941
JS
18605 max_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
18606 rpi_limit = phba->sli4_hba.next_rpi;
18607
6d368e53
JS
18608 rpi = find_next_zero_bit(phba->sli4_hba.rpi_bmask, rpi_limit, 0);
18609 if (rpi >= rpi_limit)
6fb120a7
JS
18610 rpi = LPFC_RPI_ALLOC_ERROR;
18611 else {
18612 set_bit(rpi, phba->sli4_hba.rpi_bmask);
18613 phba->sli4_hba.max_cfg_param.rpi_used++;
18614 phba->sli4_hba.rpi_count++;
18615 }
0f154226
JS
18616 lpfc_printf_log(phba, KERN_INFO,
18617 LOG_NODE | LOG_DISCOVERY,
18618 "0001 Allocated rpi:x%x max:x%x lim:x%x\n",
be6bb941 18619 (int) rpi, max_rpi, rpi_limit);
6fb120a7
JS
18620
18621 /*
18622 * Don't try to allocate more rpi header regions if the device limit
6d368e53 18623 * has been exhausted.
6fb120a7
JS
18624 */
18625 if ((rpi == LPFC_RPI_ALLOC_ERROR) &&
18626 (phba->sli4_hba.rpi_count >= max_rpi)) {
4902b381 18627 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18628 return rpi;
18629 }
18630
6d368e53
JS
18631 /*
18632 * RPI header postings are not required for SLI4 ports capable of
18633 * extents.
18634 */
18635 if (!phba->sli4_hba.rpi_hdrs_in_use) {
4902b381 18636 spin_unlock_irqrestore(&phba->hbalock, iflag);
6d368e53
JS
18637 return rpi;
18638 }
18639
6fb120a7
JS
18640 /*
18641 * If the driver is running low on rpi resources, allocate another
18642 * page now. Note that the next_rpi value is used because
18643 * it represents how many are actually in use whereas max_rpi notes
18644 * how many are supported max by the device.
18645 */
6d368e53 18646 rpi_remaining = phba->sli4_hba.next_rpi - phba->sli4_hba.rpi_count;
4902b381 18647 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18648 if (rpi_remaining < LPFC_RPI_LOW_WATER_MARK) {
18649 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
18650 if (!rpi_hdr) {
372c187b 18651 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6fb120a7
JS
18652 "2002 Error Could not grow rpi "
18653 "count\n");
18654 } else {
6d368e53
JS
18655 lrpi = rpi_hdr->start_rpi;
18656 rpi_hdr->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
6fb120a7
JS
18657 lpfc_sli4_post_rpi_hdr(phba, rpi_hdr);
18658 }
18659 }
18660
18661 return rpi;
18662}
18663
d7c47992
JS
18664/**
18665 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18666 * @phba: pointer to lpfc hba data structure.
7af29d45 18667 * @rpi: rpi to free
d7c47992
JS
18668 *
18669 * This routine is invoked to release an rpi to the pool of
18670 * available rpis maintained by the driver.
18671 **/
5d8b8167 18672static void
d7c47992
JS
18673__lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18674{
7cfd5639
JS
18675 /*
18676 * if the rpi value indicates a prior unreg has already
18677 * been done, skip the unreg.
18678 */
18679 if (rpi == LPFC_RPI_ALLOC_ERROR)
18680 return;
18681
d7c47992
JS
18682 if (test_and_clear_bit(rpi, phba->sli4_hba.rpi_bmask)) {
18683 phba->sli4_hba.rpi_count--;
18684 phba->sli4_hba.max_cfg_param.rpi_used--;
b95b2119 18685 } else {
0f154226
JS
18686 lpfc_printf_log(phba, KERN_INFO,
18687 LOG_NODE | LOG_DISCOVERY,
b95b2119
JS
18688 "2016 rpi %x not inuse\n",
18689 rpi);
d7c47992
JS
18690 }
18691}
18692
6fb120a7
JS
18693/**
18694 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18695 * @phba: pointer to lpfc hba data structure.
7af29d45 18696 * @rpi: rpi to free
6fb120a7
JS
18697 *
18698 * This routine is invoked to release an rpi to the pool of
18699 * available rpis maintained by the driver.
18700 **/
18701void
18702lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18703{
18704 spin_lock_irq(&phba->hbalock);
d7c47992 18705 __lpfc_sli4_free_rpi(phba, rpi);
6fb120a7
JS
18706 spin_unlock_irq(&phba->hbalock);
18707}
18708
18709/**
18710 * lpfc_sli4_remove_rpis - Remove the rpi bitmask region
18711 * @phba: pointer to lpfc hba data structure.
18712 *
18713 * This routine is invoked to remove the memory region that
18714 * provided rpi via a bitmask.
18715 **/
18716void
18717lpfc_sli4_remove_rpis(struct lpfc_hba *phba)
18718{
18719 kfree(phba->sli4_hba.rpi_bmask);
6d368e53
JS
18720 kfree(phba->sli4_hba.rpi_ids);
18721 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6fb120a7
JS
18722}
18723
18724/**
18725 * lpfc_sli4_resume_rpi - Remove the rpi bitmask region
7af29d45
LJ
18726 * @ndlp: pointer to lpfc nodelist data structure.
18727 * @cmpl: completion call-back.
18728 * @arg: data to load as MBox 'caller buffer information'
6fb120a7
JS
18729 *
18730 * This routine is invoked to remove the memory region that
18731 * provided rpi via a bitmask.
18732 **/
18733int
6b5151fd
JS
18734lpfc_sli4_resume_rpi(struct lpfc_nodelist *ndlp,
18735 void (*cmpl)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *arg)
6fb120a7
JS
18736{
18737 LPFC_MBOXQ_t *mboxq;
18738 struct lpfc_hba *phba = ndlp->phba;
18739 int rc;
18740
18741 /* The port is notified of the header region via a mailbox command. */
18742 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18743 if (!mboxq)
18744 return -ENOMEM;
18745
18746 /* Post all rpi memory regions to the port. */
18747 lpfc_resume_rpi(mboxq, ndlp);
6b5151fd
JS
18748 if (cmpl) {
18749 mboxq->mbox_cmpl = cmpl;
3e1f0718
JS
18750 mboxq->ctx_buf = arg;
18751 mboxq->ctx_ndlp = ndlp;
72859909
JS
18752 } else
18753 mboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6b5151fd 18754 mboxq->vport = ndlp->vport;
6fb120a7
JS
18755 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18756 if (rc == MBX_NOT_FINISHED) {
372c187b 18757 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6fb120a7
JS
18758 "2010 Resume RPI Mailbox failed "
18759 "status %d, mbxStatus x%x\n", rc,
18760 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
18761 mempool_free(mboxq, phba->mbox_mem_pool);
18762 return -EIO;
18763 }
18764 return 0;
18765}
18766
18767/**
18768 * lpfc_sli4_init_vpi - Initialize a vpi with the port
76a95d75 18769 * @vport: Pointer to the vport for which the vpi is being initialized
6fb120a7 18770 *
76a95d75 18771 * This routine is invoked to activate a vpi with the port.
6fb120a7
JS
18772 *
18773 * Returns:
18774 * 0 success
18775 * -Evalue otherwise
18776 **/
18777int
76a95d75 18778lpfc_sli4_init_vpi(struct lpfc_vport *vport)
6fb120a7
JS
18779{
18780 LPFC_MBOXQ_t *mboxq;
18781 int rc = 0;
6a9c52cf 18782 int retval = MBX_SUCCESS;
6fb120a7 18783 uint32_t mbox_tmo;
76a95d75 18784 struct lpfc_hba *phba = vport->phba;
6fb120a7
JS
18785 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18786 if (!mboxq)
18787 return -ENOMEM;
76a95d75 18788 lpfc_init_vpi(phba, mboxq, vport->vpi);
a183a15f 18789 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
6fb120a7 18790 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
6fb120a7 18791 if (rc != MBX_SUCCESS) {
372c187b 18792 lpfc_printf_vlog(vport, KERN_ERR, LOG_TRACE_EVENT,
6fb120a7
JS
18793 "2022 INIT VPI Mailbox failed "
18794 "status %d, mbxStatus x%x\n", rc,
18795 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
6a9c52cf 18796 retval = -EIO;
6fb120a7 18797 }
6a9c52cf 18798 if (rc != MBX_TIMEOUT)
76a95d75 18799 mempool_free(mboxq, vport->phba->mbox_mem_pool);
6a9c52cf
JS
18800
18801 return retval;
6fb120a7
JS
18802}
18803
18804/**
18805 * lpfc_mbx_cmpl_add_fcf_record - add fcf mbox completion handler.
18806 * @phba: pointer to lpfc hba data structure.
18807 * @mboxq: Pointer to mailbox object.
18808 *
18809 * This routine is invoked to manually add a single FCF record. The caller
18810 * must pass a completely initialized FCF_Record. This routine takes
18811 * care of the nonembedded mailbox operations.
18812 **/
18813static void
18814lpfc_mbx_cmpl_add_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
18815{
18816 void *virt_addr;
18817 union lpfc_sli4_cfg_shdr *shdr;
18818 uint32_t shdr_status, shdr_add_status;
18819
18820 virt_addr = mboxq->sge_array->addr[0];
18821 /* The IOCTL status is embedded in the mailbox subheader. */
18822 shdr = (union lpfc_sli4_cfg_shdr *) virt_addr;
18823 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18824 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18825
18826 if ((shdr_status || shdr_add_status) &&
18827 (shdr_status != STATUS_FCF_IN_USE))
372c187b 18828 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6fb120a7
JS
18829 "2558 ADD_FCF_RECORD mailbox failed with "
18830 "status x%x add_status x%x\n",
18831 shdr_status, shdr_add_status);
18832
18833 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18834}
18835
18836/**
18837 * lpfc_sli4_add_fcf_record - Manually add an FCF Record.
18838 * @phba: pointer to lpfc hba data structure.
18839 * @fcf_record: pointer to the initialized fcf record to add.
18840 *
18841 * This routine is invoked to manually add a single FCF record. The caller
18842 * must pass a completely initialized FCF_Record. This routine takes
18843 * care of the nonembedded mailbox operations.
18844 **/
18845int
18846lpfc_sli4_add_fcf_record(struct lpfc_hba *phba, struct fcf_record *fcf_record)
18847{
18848 int rc = 0;
18849 LPFC_MBOXQ_t *mboxq;
18850 uint8_t *bytep;
18851 void *virt_addr;
6fb120a7
JS
18852 struct lpfc_mbx_sge sge;
18853 uint32_t alloc_len, req_len;
18854 uint32_t fcfindex;
18855
18856 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18857 if (!mboxq) {
372c187b 18858 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6fb120a7
JS
18859 "2009 Failed to allocate mbox for ADD_FCF cmd\n");
18860 return -ENOMEM;
18861 }
18862
18863 req_len = sizeof(struct fcf_record) + sizeof(union lpfc_sli4_cfg_shdr) +
18864 sizeof(uint32_t);
18865
18866 /* Allocate DMA memory and set up the non-embedded mailbox command */
18867 alloc_len = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18868 LPFC_MBOX_OPCODE_FCOE_ADD_FCF,
18869 req_len, LPFC_SLI4_MBX_NEMBED);
18870 if (alloc_len < req_len) {
372c187b 18871 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6fb120a7
JS
18872 "2523 Allocated DMA memory size (x%x) is "
18873 "less than the requested DMA memory "
18874 "size (x%x)\n", alloc_len, req_len);
18875 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18876 return -ENOMEM;
18877 }
18878
18879 /*
18880 * Get the first SGE entry from the non-embedded DMA memory. This
18881 * routine only uses a single SGE.
18882 */
18883 lpfc_sli4_mbx_sge_get(mboxq, 0, &sge);
6fb120a7
JS
18884 virt_addr = mboxq->sge_array->addr[0];
18885 /*
18886 * Configure the FCF record for FCFI 0. This is the driver's
18887 * hardcoded default and gets used in nonFIP mode.
18888 */
18889 fcfindex = bf_get(lpfc_fcf_record_fcf_index, fcf_record);
18890 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr);
18891 lpfc_sli_pcimem_bcopy(&fcfindex, bytep, sizeof(uint32_t));
18892
18893 /*
18894 * Copy the fcf_index and the FCF Record Data. The data starts after
18895 * the FCoE header plus word10. The data copy needs to be endian
18896 * correct.
18897 */
18898 bytep += sizeof(uint32_t);
18899 lpfc_sli_pcimem_bcopy(fcf_record, bytep, sizeof(struct fcf_record));
18900 mboxq->vport = phba->pport;
18901 mboxq->mbox_cmpl = lpfc_mbx_cmpl_add_fcf_record;
18902 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18903 if (rc == MBX_NOT_FINISHED) {
372c187b 18904 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6fb120a7
JS
18905 "2515 ADD_FCF_RECORD mailbox failed with "
18906 "status 0x%x\n", rc);
18907 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18908 rc = -EIO;
18909 } else
18910 rc = 0;
18911
18912 return rc;
18913}
18914
18915/**
18916 * lpfc_sli4_build_dflt_fcf_record - Build the driver's default FCF Record.
18917 * @phba: pointer to lpfc hba data structure.
18918 * @fcf_record: pointer to the fcf record to write the default data.
18919 * @fcf_index: FCF table entry index.
18920 *
18921 * This routine is invoked to build the driver's default FCF record. The
18922 * values used are hardcoded. This routine handles memory initialization.
18923 *
18924 **/
18925void
18926lpfc_sli4_build_dflt_fcf_record(struct lpfc_hba *phba,
18927 struct fcf_record *fcf_record,
18928 uint16_t fcf_index)
18929{
18930 memset(fcf_record, 0, sizeof(struct fcf_record));
18931 fcf_record->max_rcv_size = LPFC_FCOE_MAX_RCV_SIZE;
18932 fcf_record->fka_adv_period = LPFC_FCOE_FKA_ADV_PER;
18933 fcf_record->fip_priority = LPFC_FCOE_FIP_PRIORITY;
18934 bf_set(lpfc_fcf_record_mac_0, fcf_record, phba->fc_map[0]);
18935 bf_set(lpfc_fcf_record_mac_1, fcf_record, phba->fc_map[1]);
18936 bf_set(lpfc_fcf_record_mac_2, fcf_record, phba->fc_map[2]);
18937 bf_set(lpfc_fcf_record_mac_3, fcf_record, LPFC_FCOE_FCF_MAC3);
18938 bf_set(lpfc_fcf_record_mac_4, fcf_record, LPFC_FCOE_FCF_MAC4);
18939 bf_set(lpfc_fcf_record_mac_5, fcf_record, LPFC_FCOE_FCF_MAC5);
18940 bf_set(lpfc_fcf_record_fc_map_0, fcf_record, phba->fc_map[0]);
18941 bf_set(lpfc_fcf_record_fc_map_1, fcf_record, phba->fc_map[1]);
18942 bf_set(lpfc_fcf_record_fc_map_2, fcf_record, phba->fc_map[2]);
18943 bf_set(lpfc_fcf_record_fcf_valid, fcf_record, 1);
0c287589 18944 bf_set(lpfc_fcf_record_fcf_avail, fcf_record, 1);
6fb120a7
JS
18945 bf_set(lpfc_fcf_record_fcf_index, fcf_record, fcf_index);
18946 bf_set(lpfc_fcf_record_mac_addr_prov, fcf_record,
18947 LPFC_FCF_FPMA | LPFC_FCF_SPMA);
18948 /* Set the VLAN bit map */
18949 if (phba->valid_vlan) {
18950 fcf_record->vlan_bitmap[phba->vlan_id / 8]
18951 = 1 << (phba->vlan_id % 8);
18952 }
18953}
18954
18955/**
0c9ab6f5 18956 * lpfc_sli4_fcf_scan_read_fcf_rec - Read hba fcf record for fcf scan.
6fb120a7
JS
18957 * @phba: pointer to lpfc hba data structure.
18958 * @fcf_index: FCF table entry offset.
18959 *
0c9ab6f5
JS
18960 * This routine is invoked to scan the entire FCF table by reading FCF
18961 * record and processing it one at a time starting from the @fcf_index
18962 * for initial FCF discovery or fast FCF failover rediscovery.
18963 *
25985edc 18964 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5 18965 * otherwise.
6fb120a7
JS
18966 **/
18967int
0c9ab6f5 18968lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
6fb120a7
JS
18969{
18970 int rc = 0, error;
18971 LPFC_MBOXQ_t *mboxq;
6fb120a7 18972
32b9793f 18973 phba->fcoe_eventtag_at_fcf_scan = phba->fcoe_eventtag;
80c17849 18974 phba->fcoe_cvl_eventtag_attn = phba->fcoe_cvl_eventtag;
6fb120a7
JS
18975 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18976 if (!mboxq) {
372c187b 18977 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6fb120a7
JS
18978 "2000 Failed to allocate mbox for "
18979 "READ_FCF cmd\n");
4d9ab994 18980 error = -ENOMEM;
0c9ab6f5 18981 goto fail_fcf_scan;
6fb120a7 18982 }
ecfd03c6 18983 /* Construct the read FCF record mailbox command */
0c9ab6f5 18984 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
ecfd03c6
JS
18985 if (rc) {
18986 error = -EINVAL;
0c9ab6f5 18987 goto fail_fcf_scan;
6fb120a7 18988 }
ecfd03c6 18989 /* Issue the mailbox command asynchronously */
6fb120a7 18990 mboxq->vport = phba->pport;
0c9ab6f5 18991 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_scan_read_fcf_rec;
a93ff37a
JS
18992
18993 spin_lock_irq(&phba->hbalock);
18994 phba->hba_flag |= FCF_TS_INPROG;
18995 spin_unlock_irq(&phba->hbalock);
18996
6fb120a7 18997 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
ecfd03c6 18998 if (rc == MBX_NOT_FINISHED)
6fb120a7 18999 error = -EIO;
ecfd03c6 19000 else {
38b92ef8
JS
19001 /* Reset eligible FCF count for new scan */
19002 if (fcf_index == LPFC_FCOE_FCF_GET_FIRST)
999d813f 19003 phba->fcf.eligible_fcf_cnt = 0;
6fb120a7 19004 error = 0;
32b9793f 19005 }
0c9ab6f5 19006fail_fcf_scan:
4d9ab994
JS
19007 if (error) {
19008 if (mboxq)
19009 lpfc_sli4_mbox_cmd_free(phba, mboxq);
a93ff37a 19010 /* FCF scan failed, clear FCF_TS_INPROG flag */
4d9ab994 19011 spin_lock_irq(&phba->hbalock);
a93ff37a 19012 phba->hba_flag &= ~FCF_TS_INPROG;
4d9ab994
JS
19013 spin_unlock_irq(&phba->hbalock);
19014 }
6fb120a7
JS
19015 return error;
19016}
a0c87cbd 19017
0c9ab6f5 19018/**
a93ff37a 19019 * lpfc_sli4_fcf_rr_read_fcf_rec - Read hba fcf record for roundrobin fcf.
0c9ab6f5
JS
19020 * @phba: pointer to lpfc hba data structure.
19021 * @fcf_index: FCF table entry offset.
19022 *
19023 * This routine is invoked to read an FCF record indicated by @fcf_index
a93ff37a 19024 * and to use it for FLOGI roundrobin FCF failover.
0c9ab6f5 19025 *
25985edc 19026 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
19027 * otherwise.
19028 **/
19029int
19030lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
19031{
19032 int rc = 0, error;
19033 LPFC_MBOXQ_t *mboxq;
19034
19035 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19036 if (!mboxq) {
19037 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
19038 "2763 Failed to allocate mbox for "
19039 "READ_FCF cmd\n");
19040 error = -ENOMEM;
19041 goto fail_fcf_read;
19042 }
19043 /* Construct the read FCF record mailbox command */
19044 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
19045 if (rc) {
19046 error = -EINVAL;
19047 goto fail_fcf_read;
19048 }
19049 /* Issue the mailbox command asynchronously */
19050 mboxq->vport = phba->pport;
19051 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_rr_read_fcf_rec;
19052 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
19053 if (rc == MBX_NOT_FINISHED)
19054 error = -EIO;
19055 else
19056 error = 0;
19057
19058fail_fcf_read:
19059 if (error && mboxq)
19060 lpfc_sli4_mbox_cmd_free(phba, mboxq);
19061 return error;
19062}
19063
19064/**
19065 * lpfc_sli4_read_fcf_rec - Read hba fcf record for update eligible fcf bmask.
19066 * @phba: pointer to lpfc hba data structure.
19067 * @fcf_index: FCF table entry offset.
19068 *
19069 * This routine is invoked to read an FCF record indicated by @fcf_index to
a93ff37a 19070 * determine whether it's eligible for FLOGI roundrobin failover list.
0c9ab6f5 19071 *
25985edc 19072 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
19073 * otherwise.
19074 **/
19075int
19076lpfc_sli4_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
19077{
19078 int rc = 0, error;
19079 LPFC_MBOXQ_t *mboxq;
19080
19081 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19082 if (!mboxq) {
19083 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
19084 "2758 Failed to allocate mbox for "
19085 "READ_FCF cmd\n");
19086 error = -ENOMEM;
19087 goto fail_fcf_read;
19088 }
19089 /* Construct the read FCF record mailbox command */
19090 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
19091 if (rc) {
19092 error = -EINVAL;
19093 goto fail_fcf_read;
19094 }
19095 /* Issue the mailbox command asynchronously */
19096 mboxq->vport = phba->pport;
19097 mboxq->mbox_cmpl = lpfc_mbx_cmpl_read_fcf_rec;
19098 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
19099 if (rc == MBX_NOT_FINISHED)
19100 error = -EIO;
19101 else
19102 error = 0;
19103
19104fail_fcf_read:
19105 if (error && mboxq)
19106 lpfc_sli4_mbox_cmd_free(phba, mboxq);
19107 return error;
19108}
19109
7d791df7 19110/**
f5cb5304 19111 * lpfc_check_next_fcf_pri_level
7af29d45 19112 * @phba: pointer to the lpfc_hba struct for this port.
7d791df7
JS
19113 * This routine is called from the lpfc_sli4_fcf_rr_next_index_get
19114 * routine when the rr_bmask is empty. The FCF indecies are put into the
19115 * rr_bmask based on their priority level. Starting from the highest priority
19116 * to the lowest. The most likely FCF candidate will be in the highest
19117 * priority group. When this routine is called it searches the fcf_pri list for
19118 * next lowest priority group and repopulates the rr_bmask with only those
19119 * fcf_indexes.
19120 * returns:
19121 * 1=success 0=failure
19122 **/
5d8b8167 19123static int
7d791df7
JS
19124lpfc_check_next_fcf_pri_level(struct lpfc_hba *phba)
19125{
19126 uint16_t next_fcf_pri;
19127 uint16_t last_index;
19128 struct lpfc_fcf_pri *fcf_pri;
19129 int rc;
19130 int ret = 0;
19131
19132 last_index = find_first_bit(phba->fcf.fcf_rr_bmask,
19133 LPFC_SLI4_FCF_TBL_INDX_MAX);
19134 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
19135 "3060 Last IDX %d\n", last_index);
2562669c
JS
19136
19137 /* Verify the priority list has 2 or more entries */
19138 spin_lock_irq(&phba->hbalock);
19139 if (list_empty(&phba->fcf.fcf_pri_list) ||
19140 list_is_singular(&phba->fcf.fcf_pri_list)) {
19141 spin_unlock_irq(&phba->hbalock);
7d791df7
JS
19142 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
19143 "3061 Last IDX %d\n", last_index);
19144 return 0; /* Empty rr list */
19145 }
2562669c
JS
19146 spin_unlock_irq(&phba->hbalock);
19147
7d791df7
JS
19148 next_fcf_pri = 0;
19149 /*
19150 * Clear the rr_bmask and set all of the bits that are at this
19151 * priority.
19152 */
19153 memset(phba->fcf.fcf_rr_bmask, 0,
19154 sizeof(*phba->fcf.fcf_rr_bmask));
19155 spin_lock_irq(&phba->hbalock);
19156 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
19157 if (fcf_pri->fcf_rec.flag & LPFC_FCF_FLOGI_FAILED)
19158 continue;
19159 /*
19160 * the 1st priority that has not FLOGI failed
19161 * will be the highest.
19162 */
19163 if (!next_fcf_pri)
19164 next_fcf_pri = fcf_pri->fcf_rec.priority;
19165 spin_unlock_irq(&phba->hbalock);
19166 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
19167 rc = lpfc_sli4_fcf_rr_index_set(phba,
19168 fcf_pri->fcf_rec.fcf_index);
19169 if (rc)
19170 return 0;
19171 }
19172 spin_lock_irq(&phba->hbalock);
19173 }
19174 /*
19175 * if next_fcf_pri was not set above and the list is not empty then
19176 * we have failed flogis on all of them. So reset flogi failed
4907cb7b 19177 * and start at the beginning.
7d791df7
JS
19178 */
19179 if (!next_fcf_pri && !list_empty(&phba->fcf.fcf_pri_list)) {
19180 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
19181 fcf_pri->fcf_rec.flag &= ~LPFC_FCF_FLOGI_FAILED;
19182 /*
19183 * the 1st priority that has not FLOGI failed
19184 * will be the highest.
19185 */
19186 if (!next_fcf_pri)
19187 next_fcf_pri = fcf_pri->fcf_rec.priority;
19188 spin_unlock_irq(&phba->hbalock);
19189 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
19190 rc = lpfc_sli4_fcf_rr_index_set(phba,
19191 fcf_pri->fcf_rec.fcf_index);
19192 if (rc)
19193 return 0;
19194 }
19195 spin_lock_irq(&phba->hbalock);
19196 }
19197 } else
19198 ret = 1;
19199 spin_unlock_irq(&phba->hbalock);
19200
19201 return ret;
19202}
0c9ab6f5
JS
19203/**
19204 * lpfc_sli4_fcf_rr_next_index_get - Get next eligible fcf record index
19205 * @phba: pointer to lpfc hba data structure.
19206 *
19207 * This routine is to get the next eligible FCF record index in a round
19208 * robin fashion. If the next eligible FCF record index equals to the
a93ff37a 19209 * initial roundrobin FCF record index, LPFC_FCOE_FCF_NEXT_NONE (0xFFFF)
0c9ab6f5
JS
19210 * shall be returned, otherwise, the next eligible FCF record's index
19211 * shall be returned.
19212 **/
19213uint16_t
19214lpfc_sli4_fcf_rr_next_index_get(struct lpfc_hba *phba)
19215{
19216 uint16_t next_fcf_index;
19217
421c6622 19218initial_priority:
3804dc84 19219 /* Search start from next bit of currently registered FCF index */
421c6622
JS
19220 next_fcf_index = phba->fcf.current_rec.fcf_indx;
19221
7d791df7 19222next_priority:
421c6622
JS
19223 /* Determine the next fcf index to check */
19224 next_fcf_index = (next_fcf_index + 1) % LPFC_SLI4_FCF_TBL_INDX_MAX;
0c9ab6f5
JS
19225 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
19226 LPFC_SLI4_FCF_TBL_INDX_MAX,
3804dc84
JS
19227 next_fcf_index);
19228
0c9ab6f5 19229 /* Wrap around condition on phba->fcf.fcf_rr_bmask */
7d791df7
JS
19230 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
19231 /*
19232 * If we have wrapped then we need to clear the bits that
19233 * have been tested so that we can detect when we should
19234 * change the priority level.
19235 */
0c9ab6f5
JS
19236 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
19237 LPFC_SLI4_FCF_TBL_INDX_MAX, 0);
7d791df7
JS
19238 }
19239
3804dc84
JS
19240
19241 /* Check roundrobin failover list empty condition */
7d791df7
JS
19242 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX ||
19243 next_fcf_index == phba->fcf.current_rec.fcf_indx) {
19244 /*
19245 * If next fcf index is not found check if there are lower
19246 * Priority level fcf's in the fcf_priority list.
19247 * Set up the rr_bmask with all of the avaiable fcf bits
19248 * at that level and continue the selection process.
19249 */
19250 if (lpfc_check_next_fcf_pri_level(phba))
421c6622 19251 goto initial_priority;
3804dc84
JS
19252 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP,
19253 "2844 No roundrobin failover FCF available\n");
036cad1f
JS
19254
19255 return LPFC_FCOE_FCF_NEXT_NONE;
3804dc84
JS
19256 }
19257
7d791df7
JS
19258 if (next_fcf_index < LPFC_SLI4_FCF_TBL_INDX_MAX &&
19259 phba->fcf.fcf_pri[next_fcf_index].fcf_rec.flag &
f5cb5304
JS
19260 LPFC_FCF_FLOGI_FAILED) {
19261 if (list_is_singular(&phba->fcf.fcf_pri_list))
19262 return LPFC_FCOE_FCF_NEXT_NONE;
19263
7d791df7 19264 goto next_priority;
f5cb5304 19265 }
7d791df7 19266
3804dc84 19267 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a
JS
19268 "2845 Get next roundrobin failover FCF (x%x)\n",
19269 next_fcf_index);
19270
0c9ab6f5
JS
19271 return next_fcf_index;
19272}
19273
19274/**
19275 * lpfc_sli4_fcf_rr_index_set - Set bmask with eligible fcf record index
19276 * @phba: pointer to lpfc hba data structure.
7af29d45 19277 * @fcf_index: index into the FCF table to 'set'
0c9ab6f5
JS
19278 *
19279 * This routine sets the FCF record index in to the eligible bmask for
a93ff37a 19280 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
19281 * does not go beyond the range of the driver allocated bmask dimension
19282 * before setting the bit.
19283 *
19284 * Returns 0 if the index bit successfully set, otherwise, it returns
19285 * -EINVAL.
19286 **/
19287int
19288lpfc_sli4_fcf_rr_index_set(struct lpfc_hba *phba, uint16_t fcf_index)
19289{
19290 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
19291 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
19292 "2610 FCF (x%x) reached driver's book "
19293 "keeping dimension:x%x\n",
0c9ab6f5
JS
19294 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
19295 return -EINVAL;
19296 }
19297 /* Set the eligible FCF record index bmask */
19298 set_bit(fcf_index, phba->fcf.fcf_rr_bmask);
19299
3804dc84 19300 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 19301 "2790 Set FCF (x%x) to roundrobin FCF failover "
3804dc84
JS
19302 "bmask\n", fcf_index);
19303
0c9ab6f5
JS
19304 return 0;
19305}
19306
19307/**
3804dc84 19308 * lpfc_sli4_fcf_rr_index_clear - Clear bmask from eligible fcf record index
0c9ab6f5 19309 * @phba: pointer to lpfc hba data structure.
7af29d45 19310 * @fcf_index: index into the FCF table to 'clear'
0c9ab6f5
JS
19311 *
19312 * This routine clears the FCF record index from the eligible bmask for
a93ff37a 19313 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
19314 * does not go beyond the range of the driver allocated bmask dimension
19315 * before clearing the bit.
19316 **/
19317void
19318lpfc_sli4_fcf_rr_index_clear(struct lpfc_hba *phba, uint16_t fcf_index)
19319{
9a803a74 19320 struct lpfc_fcf_pri *fcf_pri, *fcf_pri_next;
0c9ab6f5
JS
19321 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
19322 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
19323 "2762 FCF (x%x) reached driver's book "
19324 "keeping dimension:x%x\n",
0c9ab6f5
JS
19325 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
19326 return;
19327 }
19328 /* Clear the eligible FCF record index bmask */
7d791df7 19329 spin_lock_irq(&phba->hbalock);
9a803a74
JS
19330 list_for_each_entry_safe(fcf_pri, fcf_pri_next, &phba->fcf.fcf_pri_list,
19331 list) {
7d791df7
JS
19332 if (fcf_pri->fcf_rec.fcf_index == fcf_index) {
19333 list_del_init(&fcf_pri->list);
19334 break;
19335 }
19336 }
19337 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 19338 clear_bit(fcf_index, phba->fcf.fcf_rr_bmask);
3804dc84
JS
19339
19340 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 19341 "2791 Clear FCF (x%x) from roundrobin failover "
3804dc84 19342 "bmask\n", fcf_index);
0c9ab6f5
JS
19343}
19344
ecfd03c6
JS
19345/**
19346 * lpfc_mbx_cmpl_redisc_fcf_table - completion routine for rediscover FCF table
19347 * @phba: pointer to lpfc hba data structure.
7af29d45 19348 * @mbox: An allocated pointer to type LPFC_MBOXQ_t
ecfd03c6
JS
19349 *
19350 * This routine is the completion routine for the rediscover FCF table mailbox
19351 * command. If the mailbox command returned failure, it will try to stop the
19352 * FCF rediscover wait timer.
19353 **/
5d8b8167 19354static void
ecfd03c6
JS
19355lpfc_mbx_cmpl_redisc_fcf_table(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
19356{
19357 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
19358 uint32_t shdr_status, shdr_add_status;
19359
19360 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
19361
19362 shdr_status = bf_get(lpfc_mbox_hdr_status,
19363 &redisc_fcf->header.cfg_shdr.response);
19364 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
19365 &redisc_fcf->header.cfg_shdr.response);
19366 if (shdr_status || shdr_add_status) {
0c9ab6f5 19367 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
ecfd03c6
JS
19368 "2746 Requesting for FCF rediscovery failed "
19369 "status x%x add_status x%x\n",
19370 shdr_status, shdr_add_status);
0c9ab6f5 19371 if (phba->fcf.fcf_flag & FCF_ACVL_DISC) {
fc2b989b 19372 spin_lock_irq(&phba->hbalock);
0c9ab6f5 19373 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b
JS
19374 spin_unlock_irq(&phba->hbalock);
19375 /*
19376 * CVL event triggered FCF rediscover request failed,
19377 * last resort to re-try current registered FCF entry.
19378 */
19379 lpfc_retry_pport_discovery(phba);
19380 } else {
19381 spin_lock_irq(&phba->hbalock);
0c9ab6f5 19382 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
fc2b989b
JS
19383 spin_unlock_irq(&phba->hbalock);
19384 /*
19385 * DEAD FCF event triggered FCF rediscover request
19386 * failed, last resort to fail over as a link down
19387 * to FCF registration.
19388 */
19389 lpfc_sli4_fcf_dead_failthrough(phba);
19390 }
0c9ab6f5
JS
19391 } else {
19392 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 19393 "2775 Start FCF rediscover quiescent timer\n");
ecfd03c6
JS
19394 /*
19395 * Start FCF rediscovery wait timer for pending FCF
19396 * before rescan FCF record table.
19397 */
19398 lpfc_fcf_redisc_wait_start_timer(phba);
0c9ab6f5 19399 }
ecfd03c6
JS
19400
19401 mempool_free(mbox, phba->mbox_mem_pool);
19402}
19403
19404/**
3804dc84 19405 * lpfc_sli4_redisc_fcf_table - Request to rediscover entire FCF table by port.
ecfd03c6
JS
19406 * @phba: pointer to lpfc hba data structure.
19407 *
19408 * This routine is invoked to request for rediscovery of the entire FCF table
19409 * by the port.
19410 **/
19411int
19412lpfc_sli4_redisc_fcf_table(struct lpfc_hba *phba)
19413{
19414 LPFC_MBOXQ_t *mbox;
19415 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
19416 int rc, length;
19417
0c9ab6f5
JS
19418 /* Cancel retry delay timers to all vports before FCF rediscover */
19419 lpfc_cancel_all_vport_retry_delay_timer(phba);
19420
ecfd03c6
JS
19421 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19422 if (!mbox) {
372c187b 19423 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
ecfd03c6
JS
19424 "2745 Failed to allocate mbox for "
19425 "requesting FCF rediscover.\n");
19426 return -ENOMEM;
19427 }
19428
19429 length = (sizeof(struct lpfc_mbx_redisc_fcf_tbl) -
19430 sizeof(struct lpfc_sli4_cfg_mhdr));
19431 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
19432 LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF,
19433 length, LPFC_SLI4_MBX_EMBED);
19434
19435 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
19436 /* Set count to 0 for invalidating the entire FCF database */
19437 bf_set(lpfc_mbx_redisc_fcf_count, redisc_fcf, 0);
19438
19439 /* Issue the mailbox command asynchronously */
19440 mbox->vport = phba->pport;
19441 mbox->mbox_cmpl = lpfc_mbx_cmpl_redisc_fcf_table;
19442 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
19443
19444 if (rc == MBX_NOT_FINISHED) {
19445 mempool_free(mbox, phba->mbox_mem_pool);
19446 return -EIO;
19447 }
19448 return 0;
19449}
19450
fc2b989b
JS
19451/**
19452 * lpfc_sli4_fcf_dead_failthrough - Failthrough routine to fcf dead event
19453 * @phba: pointer to lpfc hba data structure.
19454 *
19455 * This function is the failover routine as a last resort to the FCF DEAD
19456 * event when driver failed to perform fast FCF failover.
19457 **/
19458void
19459lpfc_sli4_fcf_dead_failthrough(struct lpfc_hba *phba)
19460{
19461 uint32_t link_state;
19462
19463 /*
19464 * Last resort as FCF DEAD event failover will treat this as
19465 * a link down, but save the link state because we don't want
19466 * it to be changed to Link Down unless it is already down.
19467 */
19468 link_state = phba->link_state;
19469 lpfc_linkdown(phba);
19470 phba->link_state = link_state;
19471
19472 /* Unregister FCF if no devices connected to it */
19473 lpfc_unregister_unused_fcf(phba);
19474}
19475
a0c87cbd 19476/**
026abb87 19477 * lpfc_sli_get_config_region23 - Get sli3 port region 23 data.
a0c87cbd 19478 * @phba: pointer to lpfc hba data structure.
026abb87 19479 * @rgn23_data: pointer to configure region 23 data.
a0c87cbd 19480 *
026abb87
JS
19481 * This function gets SLI3 port configure region 23 data through memory dump
19482 * mailbox command. When it successfully retrieves data, the size of the data
19483 * will be returned, otherwise, 0 will be returned.
a0c87cbd 19484 **/
026abb87
JS
19485static uint32_t
19486lpfc_sli_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
a0c87cbd
JS
19487{
19488 LPFC_MBOXQ_t *pmb = NULL;
19489 MAILBOX_t *mb;
026abb87 19490 uint32_t offset = 0;
d91e3abb 19491 int i, rc;
a0c87cbd 19492
026abb87
JS
19493 if (!rgn23_data)
19494 return 0;
19495
a0c87cbd
JS
19496 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19497 if (!pmb) {
372c187b 19498 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
026abb87
JS
19499 "2600 failed to allocate mailbox memory\n");
19500 return 0;
a0c87cbd
JS
19501 }
19502 mb = &pmb->u.mb;
19503
a0c87cbd
JS
19504 do {
19505 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_23);
19506 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
19507
19508 if (rc != MBX_SUCCESS) {
19509 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
026abb87
JS
19510 "2601 failed to read config "
19511 "region 23, rc 0x%x Status 0x%x\n",
19512 rc, mb->mbxStatus);
a0c87cbd
JS
19513 mb->un.varDmp.word_cnt = 0;
19514 }
19515 /*
19516 * dump mem may return a zero when finished or we got a
19517 * mailbox error, either way we are done.
19518 */
19519 if (mb->un.varDmp.word_cnt == 0)
19520 break;
a0c87cbd 19521
d91e3abb
DK
19522 i = mb->un.varDmp.word_cnt * sizeof(uint32_t);
19523 if (offset + i > DMP_RGN23_SIZE)
19524 i = DMP_RGN23_SIZE - offset;
a0c87cbd 19525 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
d91e3abb
DK
19526 rgn23_data + offset, i);
19527 offset += i;
19528 } while (offset < DMP_RGN23_SIZE);
a0c87cbd 19529
026abb87
JS
19530 mempool_free(pmb, phba->mbox_mem_pool);
19531 return offset;
19532}
19533
19534/**
19535 * lpfc_sli4_get_config_region23 - Get sli4 port region 23 data.
19536 * @phba: pointer to lpfc hba data structure.
19537 * @rgn23_data: pointer to configure region 23 data.
19538 *
19539 * This function gets SLI4 port configure region 23 data through memory dump
19540 * mailbox command. When it successfully retrieves data, the size of the data
19541 * will be returned, otherwise, 0 will be returned.
19542 **/
19543static uint32_t
19544lpfc_sli4_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
19545{
19546 LPFC_MBOXQ_t *mboxq = NULL;
19547 struct lpfc_dmabuf *mp = NULL;
19548 struct lpfc_mqe *mqe;
19549 uint32_t data_length = 0;
19550 int rc;
19551
19552 if (!rgn23_data)
19553 return 0;
19554
19555 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19556 if (!mboxq) {
372c187b 19557 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
026abb87
JS
19558 "3105 failed to allocate mailbox memory\n");
19559 return 0;
19560 }
19561
19562 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq))
19563 goto out;
19564 mqe = &mboxq->u.mqe;
3e1f0718 19565 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
026abb87
JS
19566 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
19567 if (rc)
19568 goto out;
19569 data_length = mqe->un.mb_words[5];
19570 if (data_length == 0)
19571 goto out;
19572 if (data_length > DMP_RGN23_SIZE) {
19573 data_length = 0;
19574 goto out;
19575 }
19576 lpfc_sli_pcimem_bcopy((char *)mp->virt, rgn23_data, data_length);
19577out:
19578 mempool_free(mboxq, phba->mbox_mem_pool);
19579 if (mp) {
19580 lpfc_mbuf_free(phba, mp->virt, mp->phys);
19581 kfree(mp);
19582 }
19583 return data_length;
19584}
19585
19586/**
19587 * lpfc_sli_read_link_ste - Read region 23 to decide if link is disabled.
19588 * @phba: pointer to lpfc hba data structure.
19589 *
19590 * This function read region 23 and parse TLV for port status to
19591 * decide if the user disaled the port. If the TLV indicates the
19592 * port is disabled, the hba_flag is set accordingly.
19593 **/
19594void
19595lpfc_sli_read_link_ste(struct lpfc_hba *phba)
19596{
19597 uint8_t *rgn23_data = NULL;
19598 uint32_t if_type, data_size, sub_tlv_len, tlv_offset;
19599 uint32_t offset = 0;
19600
19601 /* Get adapter Region 23 data */
19602 rgn23_data = kzalloc(DMP_RGN23_SIZE, GFP_KERNEL);
19603 if (!rgn23_data)
19604 goto out;
19605
19606 if (phba->sli_rev < LPFC_SLI_REV4)
19607 data_size = lpfc_sli_get_config_region23(phba, rgn23_data);
19608 else {
19609 if_type = bf_get(lpfc_sli_intf_if_type,
19610 &phba->sli4_hba.sli_intf);
19611 if (if_type == LPFC_SLI_INTF_IF_TYPE_0)
19612 goto out;
19613 data_size = lpfc_sli4_get_config_region23(phba, rgn23_data);
19614 }
a0c87cbd
JS
19615
19616 if (!data_size)
19617 goto out;
19618
19619 /* Check the region signature first */
19620 if (memcmp(&rgn23_data[offset], LPFC_REGION23_SIGNATURE, 4)) {
372c187b 19621 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
a0c87cbd
JS
19622 "2619 Config region 23 has bad signature\n");
19623 goto out;
19624 }
19625 offset += 4;
19626
19627 /* Check the data structure version */
19628 if (rgn23_data[offset] != LPFC_REGION23_VERSION) {
372c187b 19629 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
a0c87cbd
JS
19630 "2620 Config region 23 has bad version\n");
19631 goto out;
19632 }
19633 offset += 4;
19634
19635 /* Parse TLV entries in the region */
19636 while (offset < data_size) {
19637 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC)
19638 break;
19639 /*
19640 * If the TLV is not driver specific TLV or driver id is
19641 * not linux driver id, skip the record.
19642 */
19643 if ((rgn23_data[offset] != DRIVER_SPECIFIC_TYPE) ||
19644 (rgn23_data[offset + 2] != LINUX_DRIVER_ID) ||
19645 (rgn23_data[offset + 3] != 0)) {
19646 offset += rgn23_data[offset + 1] * 4 + 4;
19647 continue;
19648 }
19649
19650 /* Driver found a driver specific TLV in the config region */
19651 sub_tlv_len = rgn23_data[offset + 1] * 4;
19652 offset += 4;
19653 tlv_offset = 0;
19654
19655 /*
19656 * Search for configured port state sub-TLV.
19657 */
19658 while ((offset < data_size) &&
19659 (tlv_offset < sub_tlv_len)) {
19660 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC) {
19661 offset += 4;
19662 tlv_offset += 4;
19663 break;
19664 }
19665 if (rgn23_data[offset] != PORT_STE_TYPE) {
19666 offset += rgn23_data[offset + 1] * 4 + 4;
19667 tlv_offset += rgn23_data[offset + 1] * 4 + 4;
19668 continue;
19669 }
19670
19671 /* This HBA contains PORT_STE configured */
19672 if (!rgn23_data[offset + 2])
19673 phba->hba_flag |= LINK_DISABLED;
19674
19675 goto out;
19676 }
19677 }
026abb87 19678
a0c87cbd 19679out:
a0c87cbd
JS
19680 kfree(rgn23_data);
19681 return;
19682}
695a814e 19683
52d52440
JS
19684/**
19685 * lpfc_wr_object - write an object to the firmware
19686 * @phba: HBA structure that indicates port to create a queue on.
19687 * @dmabuf_list: list of dmabufs to write to the port.
19688 * @size: the total byte value of the objects to write to the port.
19689 * @offset: the current offset to be used to start the transfer.
19690 *
19691 * This routine will create a wr_object mailbox command to send to the port.
19692 * the mailbox command will be constructed using the dma buffers described in
19693 * @dmabuf_list to create a list of BDEs. This routine will fill in as many
19694 * BDEs that the imbedded mailbox can support. The @offset variable will be
19695 * used to indicate the starting offset of the transfer and will also return
19696 * the offset after the write object mailbox has completed. @size is used to
19697 * determine the end of the object and whether the eof bit should be set.
19698 *
19699 * Return 0 is successful and offset will contain the the new offset to use
19700 * for the next write.
19701 * Return negative value for error cases.
19702 **/
19703int
19704lpfc_wr_object(struct lpfc_hba *phba, struct list_head *dmabuf_list,
19705 uint32_t size, uint32_t *offset)
19706{
19707 struct lpfc_mbx_wr_object *wr_object;
19708 LPFC_MBOXQ_t *mbox;
19709 int rc = 0, i = 0;
f3d0a8ac 19710 uint32_t shdr_status, shdr_add_status, shdr_change_status, shdr_csf;
52d52440 19711 uint32_t mbox_tmo;
52d52440
JS
19712 struct lpfc_dmabuf *dmabuf;
19713 uint32_t written = 0;
5021267a 19714 bool check_change_status = false;
52d52440
JS
19715
19716 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19717 if (!mbox)
19718 return -ENOMEM;
19719
19720 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
19721 LPFC_MBOX_OPCODE_WRITE_OBJECT,
19722 sizeof(struct lpfc_mbx_wr_object) -
19723 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
19724
19725 wr_object = (struct lpfc_mbx_wr_object *)&mbox->u.mqe.un.wr_object;
19726 wr_object->u.request.write_offset = *offset;
19727 sprintf((uint8_t *)wr_object->u.request.object_name, "/");
19728 wr_object->u.request.object_name[0] =
19729 cpu_to_le32(wr_object->u.request.object_name[0]);
19730 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 0);
19731 list_for_each_entry(dmabuf, dmabuf_list, list) {
19732 if (i >= LPFC_MBX_WR_CONFIG_MAX_BDE || written >= size)
19733 break;
19734 wr_object->u.request.bde[i].addrLow = putPaddrLow(dmabuf->phys);
19735 wr_object->u.request.bde[i].addrHigh =
19736 putPaddrHigh(dmabuf->phys);
19737 if (written + SLI4_PAGE_SIZE >= size) {
19738 wr_object->u.request.bde[i].tus.f.bdeSize =
19739 (size - written);
19740 written += (size - written);
19741 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 1);
5021267a
JS
19742 bf_set(lpfc_wr_object_eas, &wr_object->u.request, 1);
19743 check_change_status = true;
52d52440
JS
19744 } else {
19745 wr_object->u.request.bde[i].tus.f.bdeSize =
19746 SLI4_PAGE_SIZE;
19747 written += SLI4_PAGE_SIZE;
19748 }
19749 i++;
19750 }
19751 wr_object->u.request.bde_count = i;
19752 bf_set(lpfc_wr_object_write_length, &wr_object->u.request, written);
19753 if (!phba->sli4_hba.intr_enable)
19754 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
19755 else {
a183a15f 19756 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
52d52440
JS
19757 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
19758 }
19759 /* The IOCTL status is embedded in the mailbox subheader. */
5021267a
JS
19760 shdr_status = bf_get(lpfc_mbox_hdr_status,
19761 &wr_object->header.cfg_shdr.response);
19762 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
19763 &wr_object->header.cfg_shdr.response);
19764 if (check_change_status) {
19765 shdr_change_status = bf_get(lpfc_wr_object_change_status,
19766 &wr_object->u.response);
f3d0a8ac
JS
19767
19768 if (shdr_change_status == LPFC_CHANGE_STATUS_FW_RESET ||
19769 shdr_change_status == LPFC_CHANGE_STATUS_PORT_MIGRATION) {
19770 shdr_csf = bf_get(lpfc_wr_object_csf,
19771 &wr_object->u.response);
19772 if (shdr_csf)
19773 shdr_change_status =
19774 LPFC_CHANGE_STATUS_PCI_RESET;
19775 }
19776
5021267a
JS
19777 switch (shdr_change_status) {
19778 case (LPFC_CHANGE_STATUS_PHYS_DEV_RESET):
19779 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19780 "3198 Firmware write complete: System "
19781 "reboot required to instantiate\n");
19782 break;
19783 case (LPFC_CHANGE_STATUS_FW_RESET):
19784 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19785 "3199 Firmware write complete: Firmware"
19786 " reset required to instantiate\n");
19787 break;
19788 case (LPFC_CHANGE_STATUS_PORT_MIGRATION):
19789 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19790 "3200 Firmware write complete: Port "
19791 "Migration or PCI Reset required to "
19792 "instantiate\n");
19793 break;
19794 case (LPFC_CHANGE_STATUS_PCI_RESET):
19795 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19796 "3201 Firmware write complete: PCI "
19797 "Reset required to instantiate\n");
19798 break;
19799 default:
19800 break;
19801 }
19802 }
52d52440
JS
19803 if (rc != MBX_TIMEOUT)
19804 mempool_free(mbox, phba->mbox_mem_pool);
19805 if (shdr_status || shdr_add_status || rc) {
372c187b 19806 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
52d52440
JS
19807 "3025 Write Object mailbox failed with "
19808 "status x%x add_status x%x, mbx status x%x\n",
19809 shdr_status, shdr_add_status, rc);
19810 rc = -ENXIO;
1feb8204 19811 *offset = shdr_add_status;
52d52440
JS
19812 } else
19813 *offset += wr_object->u.response.actual_write_length;
19814 return rc;
19815}
19816
695a814e
JS
19817/**
19818 * lpfc_cleanup_pending_mbox - Free up vport discovery mailbox commands.
19819 * @vport: pointer to vport data structure.
19820 *
19821 * This function iterate through the mailboxq and clean up all REG_LOGIN
19822 * and REG_VPI mailbox commands associated with the vport. This function
19823 * is called when driver want to restart discovery of the vport due to
19824 * a Clear Virtual Link event.
19825 **/
19826void
19827lpfc_cleanup_pending_mbox(struct lpfc_vport *vport)
19828{
19829 struct lpfc_hba *phba = vport->phba;
19830 LPFC_MBOXQ_t *mb, *nextmb;
19831 struct lpfc_dmabuf *mp;
78730cfe 19832 struct lpfc_nodelist *ndlp;
d439d286 19833 struct lpfc_nodelist *act_mbx_ndlp = NULL;
589a52d6 19834 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
d439d286 19835 LIST_HEAD(mbox_cmd_list);
63e801ce 19836 uint8_t restart_loop;
695a814e 19837
d439d286 19838 /* Clean up internally queued mailbox commands with the vport */
695a814e
JS
19839 spin_lock_irq(&phba->hbalock);
19840 list_for_each_entry_safe(mb, nextmb, &phba->sli.mboxq, list) {
19841 if (mb->vport != vport)
19842 continue;
19843
19844 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19845 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19846 continue;
19847
d439d286
JS
19848 list_del(&mb->list);
19849 list_add_tail(&mb->list, &mbox_cmd_list);
19850 }
19851 /* Clean up active mailbox command with the vport */
19852 mb = phba->sli.mbox_active;
19853 if (mb && (mb->vport == vport)) {
19854 if ((mb->u.mb.mbxCommand == MBX_REG_LOGIN64) ||
19855 (mb->u.mb.mbxCommand == MBX_REG_VPI))
19856 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19857 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19858 act_mbx_ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
d439d286
JS
19859 /* Put reference count for delayed processing */
19860 act_mbx_ndlp = lpfc_nlp_get(act_mbx_ndlp);
19861 /* Unregister the RPI when mailbox complete */
19862 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19863 }
19864 }
63e801ce
JS
19865 /* Cleanup any mailbox completions which are not yet processed */
19866 do {
19867 restart_loop = 0;
19868 list_for_each_entry(mb, &phba->sli.mboxq_cmpl, list) {
19869 /*
19870 * If this mailox is already processed or it is
19871 * for another vport ignore it.
19872 */
19873 if ((mb->vport != vport) ||
19874 (mb->mbox_flag & LPFC_MBX_IMED_UNREG))
19875 continue;
19876
19877 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19878 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19879 continue;
19880
19881 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19882 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19883 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
63e801ce
JS
19884 /* Unregister the RPI when mailbox complete */
19885 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19886 restart_loop = 1;
19887 spin_unlock_irq(&phba->hbalock);
19888 spin_lock(shost->host_lock);
19889 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19890 spin_unlock(shost->host_lock);
19891 spin_lock_irq(&phba->hbalock);
19892 break;
19893 }
19894 }
19895 } while (restart_loop);
19896
d439d286
JS
19897 spin_unlock_irq(&phba->hbalock);
19898
19899 /* Release the cleaned-up mailbox commands */
19900 while (!list_empty(&mbox_cmd_list)) {
19901 list_remove_head(&mbox_cmd_list, mb, LPFC_MBOXQ_t, list);
695a814e 19902 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19903 mp = (struct lpfc_dmabuf *)(mb->ctx_buf);
695a814e
JS
19904 if (mp) {
19905 __lpfc_mbuf_free(phba, mp->virt, mp->phys);
19906 kfree(mp);
19907 }
3e1f0718
JS
19908 mb->ctx_buf = NULL;
19909 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
19910 mb->ctx_ndlp = NULL;
78730cfe 19911 if (ndlp) {
ec21b3b0 19912 spin_lock(shost->host_lock);
589a52d6 19913 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
ec21b3b0 19914 spin_unlock(shost->host_lock);
78730cfe 19915 lpfc_nlp_put(ndlp);
78730cfe 19916 }
695a814e 19917 }
695a814e
JS
19918 mempool_free(mb, phba->mbox_mem_pool);
19919 }
d439d286
JS
19920
19921 /* Release the ndlp with the cleaned-up active mailbox command */
19922 if (act_mbx_ndlp) {
19923 spin_lock(shost->host_lock);
19924 act_mbx_ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19925 spin_unlock(shost->host_lock);
19926 lpfc_nlp_put(act_mbx_ndlp);
695a814e 19927 }
695a814e
JS
19928}
19929
2a9bf3d0
JS
19930/**
19931 * lpfc_drain_txq - Drain the txq
19932 * @phba: Pointer to HBA context object.
19933 *
19934 * This function attempt to submit IOCBs on the txq
19935 * to the adapter. For SLI4 adapters, the txq contains
19936 * ELS IOCBs that have been deferred because the there
19937 * are no SGLs. This congestion can occur with large
19938 * vport counts during node discovery.
19939 **/
19940
19941uint32_t
19942lpfc_drain_txq(struct lpfc_hba *phba)
19943{
19944 LIST_HEAD(completions);
895427bd 19945 struct lpfc_sli_ring *pring;
2e706377 19946 struct lpfc_iocbq *piocbq = NULL;
2a9bf3d0
JS
19947 unsigned long iflags = 0;
19948 char *fail_msg = NULL;
19949 struct lpfc_sglq *sglq;
205e8240 19950 union lpfc_wqe128 wqe;
a2fc4aef 19951 uint32_t txq_cnt = 0;
dc19e3b4 19952 struct lpfc_queue *wq;
2a9bf3d0 19953
dc19e3b4
JS
19954 if (phba->link_flag & LS_MDS_LOOPBACK) {
19955 /* MDS WQE are posted only to first WQ*/
c00f62e6 19956 wq = phba->sli4_hba.hdwq[0].io_wq;
dc19e3b4
JS
19957 if (unlikely(!wq))
19958 return 0;
19959 pring = wq->pring;
19960 } else {
19961 wq = phba->sli4_hba.els_wq;
19962 if (unlikely(!wq))
19963 return 0;
19964 pring = lpfc_phba_elsring(phba);
19965 }
19966
19967 if (unlikely(!pring) || list_empty(&pring->txq))
1234a6d5 19968 return 0;
895427bd 19969
398d81c9 19970 spin_lock_irqsave(&pring->ring_lock, iflags);
0e9bb8d7
JS
19971 list_for_each_entry(piocbq, &pring->txq, list) {
19972 txq_cnt++;
19973 }
19974
19975 if (txq_cnt > pring->txq_max)
19976 pring->txq_max = txq_cnt;
2a9bf3d0 19977
398d81c9 19978 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19979
0e9bb8d7 19980 while (!list_empty(&pring->txq)) {
398d81c9 19981 spin_lock_irqsave(&pring->ring_lock, iflags);
2a9bf3d0 19982
19ca7609 19983 piocbq = lpfc_sli_ringtx_get(phba, pring);
a629852a 19984 if (!piocbq) {
398d81c9 19985 spin_unlock_irqrestore(&pring->ring_lock, iflags);
372c187b 19986 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
a629852a 19987 "2823 txq empty and txq_cnt is %d\n ",
0e9bb8d7 19988 txq_cnt);
a629852a
JS
19989 break;
19990 }
895427bd 19991 sglq = __lpfc_sli_get_els_sglq(phba, piocbq);
2a9bf3d0 19992 if (!sglq) {
19ca7609 19993 __lpfc_sli_ringtx_put(phba, pring, piocbq);
398d81c9 19994 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19995 break;
2a9bf3d0 19996 }
0e9bb8d7 19997 txq_cnt--;
2a9bf3d0
JS
19998
19999 /* The xri and iocb resources secured,
20000 * attempt to issue request
20001 */
6d368e53 20002 piocbq->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0
JS
20003 piocbq->sli4_xritag = sglq->sli4_xritag;
20004 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocbq, sglq))
20005 fail_msg = "to convert bpl to sgl";
205e8240 20006 else if (lpfc_sli4_iocb2wqe(phba, piocbq, &wqe))
2a9bf3d0 20007 fail_msg = "to convert iocb to wqe";
dc19e3b4 20008 else if (lpfc_sli4_wq_put(wq, &wqe))
2a9bf3d0
JS
20009 fail_msg = " - Wq is full";
20010 else
20011 lpfc_sli_ringtxcmpl_put(phba, pring, piocbq);
20012
20013 if (fail_msg) {
20014 /* Failed means we can't issue and need to cancel */
372c187b 20015 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2a9bf3d0
JS
20016 "2822 IOCB failed %s iotag 0x%x "
20017 "xri 0x%x\n",
20018 fail_msg,
20019 piocbq->iotag, piocbq->sli4_xritag);
20020 list_add_tail(&piocbq->list, &completions);
20021 }
398d81c9 20022 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0
JS
20023 }
20024
2a9bf3d0
JS
20025 /* Cancel all the IOCBs that cannot be issued */
20026 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
20027 IOERR_SLI_ABORTED);
20028
0e9bb8d7 20029 return txq_cnt;
2a9bf3d0 20030}
895427bd
JS
20031
20032/**
20033 * lpfc_wqe_bpl2sgl - Convert the bpl/bde to a sgl.
20034 * @phba: Pointer to HBA context object.
7af29d45 20035 * @pwqeq: Pointer to command WQE.
895427bd
JS
20036 * @sglq: Pointer to the scatter gather queue object.
20037 *
20038 * This routine converts the bpl or bde that is in the WQE
20039 * to a sgl list for the sli4 hardware. The physical address
20040 * of the bpl/bde is converted back to a virtual address.
20041 * If the WQE contains a BPL then the list of BDE's is
20042 * converted to sli4_sge's. If the WQE contains a single
20043 * BDE then it is converted to a single sli_sge.
20044 * The WQE is still in cpu endianness so the contents of
20045 * the bpl can be used without byte swapping.
20046 *
20047 * Returns valid XRI = Success, NO_XRI = Failure.
20048 */
20049static uint16_t
20050lpfc_wqe_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *pwqeq,
20051 struct lpfc_sglq *sglq)
20052{
20053 uint16_t xritag = NO_XRI;
20054 struct ulp_bde64 *bpl = NULL;
20055 struct ulp_bde64 bde;
20056 struct sli4_sge *sgl = NULL;
20057 struct lpfc_dmabuf *dmabuf;
205e8240 20058 union lpfc_wqe128 *wqe;
895427bd
JS
20059 int numBdes = 0;
20060 int i = 0;
20061 uint32_t offset = 0; /* accumulated offset in the sg request list */
20062 int inbound = 0; /* number of sg reply entries inbound from firmware */
20063 uint32_t cmd;
20064
20065 if (!pwqeq || !sglq)
20066 return xritag;
20067
20068 sgl = (struct sli4_sge *)sglq->sgl;
20069 wqe = &pwqeq->wqe;
20070 pwqeq->iocb.ulpIoTag = pwqeq->iotag;
20071
20072 cmd = bf_get(wqe_cmnd, &wqe->generic.wqe_com);
20073 if (cmd == CMD_XMIT_BLS_RSP64_WQE)
20074 return sglq->sli4_xritag;
20075 numBdes = pwqeq->rsvd2;
20076 if (numBdes) {
20077 /* The addrHigh and addrLow fields within the WQE
20078 * have not been byteswapped yet so there is no
20079 * need to swap them back.
20080 */
20081 if (pwqeq->context3)
20082 dmabuf = (struct lpfc_dmabuf *)pwqeq->context3;
20083 else
20084 return xritag;
20085
20086 bpl = (struct ulp_bde64 *)dmabuf->virt;
20087 if (!bpl)
20088 return xritag;
20089
20090 for (i = 0; i < numBdes; i++) {
20091 /* Should already be byte swapped. */
20092 sgl->addr_hi = bpl->addrHigh;
20093 sgl->addr_lo = bpl->addrLow;
20094
20095 sgl->word2 = le32_to_cpu(sgl->word2);
20096 if ((i+1) == numBdes)
20097 bf_set(lpfc_sli4_sge_last, sgl, 1);
20098 else
20099 bf_set(lpfc_sli4_sge_last, sgl, 0);
20100 /* swap the size field back to the cpu so we
20101 * can assign it to the sgl.
20102 */
20103 bde.tus.w = le32_to_cpu(bpl->tus.w);
20104 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
20105 /* The offsets in the sgl need to be accumulated
20106 * separately for the request and reply lists.
20107 * The request is always first, the reply follows.
20108 */
20109 switch (cmd) {
20110 case CMD_GEN_REQUEST64_WQE:
20111 /* add up the reply sg entries */
20112 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
20113 inbound++;
20114 /* first inbound? reset the offset */
20115 if (inbound == 1)
20116 offset = 0;
20117 bf_set(lpfc_sli4_sge_offset, sgl, offset);
20118 bf_set(lpfc_sli4_sge_type, sgl,
20119 LPFC_SGE_TYPE_DATA);
20120 offset += bde.tus.f.bdeSize;
20121 break;
20122 case CMD_FCP_TRSP64_WQE:
20123 bf_set(lpfc_sli4_sge_offset, sgl, 0);
20124 bf_set(lpfc_sli4_sge_type, sgl,
20125 LPFC_SGE_TYPE_DATA);
20126 break;
20127 case CMD_FCP_TSEND64_WQE:
20128 case CMD_FCP_TRECEIVE64_WQE:
20129 bf_set(lpfc_sli4_sge_type, sgl,
20130 bpl->tus.f.bdeFlags);
20131 if (i < 3)
20132 offset = 0;
20133 else
20134 offset += bde.tus.f.bdeSize;
20135 bf_set(lpfc_sli4_sge_offset, sgl, offset);
20136 break;
20137 }
20138 sgl->word2 = cpu_to_le32(sgl->word2);
20139 bpl++;
20140 sgl++;
20141 }
20142 } else if (wqe->gen_req.bde.tus.f.bdeFlags == BUFF_TYPE_BDE_64) {
20143 /* The addrHigh and addrLow fields of the BDE have not
20144 * been byteswapped yet so they need to be swapped
20145 * before putting them in the sgl.
20146 */
20147 sgl->addr_hi = cpu_to_le32(wqe->gen_req.bde.addrHigh);
20148 sgl->addr_lo = cpu_to_le32(wqe->gen_req.bde.addrLow);
20149 sgl->word2 = le32_to_cpu(sgl->word2);
20150 bf_set(lpfc_sli4_sge_last, sgl, 1);
20151 sgl->word2 = cpu_to_le32(sgl->word2);
20152 sgl->sge_len = cpu_to_le32(wqe->gen_req.bde.tus.f.bdeSize);
20153 }
20154 return sglq->sli4_xritag;
20155}
20156
20157/**
20158 * lpfc_sli4_issue_wqe - Issue an SLI4 Work Queue Entry (WQE)
20159 * @phba: Pointer to HBA context object.
7af29d45 20160 * @qp: Pointer to HDW queue.
895427bd
JS
20161 * @pwqe: Pointer to command WQE.
20162 **/
20163int
1fbf9742 20164lpfc_sli4_issue_wqe(struct lpfc_hba *phba, struct lpfc_sli4_hdw_queue *qp,
895427bd
JS
20165 struct lpfc_iocbq *pwqe)
20166{
205e8240 20167 union lpfc_wqe128 *wqe = &pwqe->wqe;
7cacae2a 20168 struct lpfc_async_xchg_ctx *ctxp;
895427bd
JS
20169 struct lpfc_queue *wq;
20170 struct lpfc_sglq *sglq;
20171 struct lpfc_sli_ring *pring;
20172 unsigned long iflags;
cd22d605 20173 uint32_t ret = 0;
895427bd
JS
20174
20175 /* NVME_LS and NVME_LS ABTS requests. */
20176 if (pwqe->iocb_flag & LPFC_IO_NVME_LS) {
20177 pring = phba->sli4_hba.nvmels_wq->pring;
6a828b0f
JS
20178 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
20179 qp, wq_access);
895427bd
JS
20180 sglq = __lpfc_sli_get_els_sglq(phba, pwqe);
20181 if (!sglq) {
20182 spin_unlock_irqrestore(&pring->ring_lock, iflags);
20183 return WQE_BUSY;
20184 }
20185 pwqe->sli4_lxritag = sglq->sli4_lxritag;
20186 pwqe->sli4_xritag = sglq->sli4_xritag;
20187 if (lpfc_wqe_bpl2sgl(phba, pwqe, sglq) == NO_XRI) {
20188 spin_unlock_irqrestore(&pring->ring_lock, iflags);
20189 return WQE_ERROR;
20190 }
20191 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
20192 pwqe->sli4_xritag);
cd22d605
DK
20193 ret = lpfc_sli4_wq_put(phba->sli4_hba.nvmels_wq, wqe);
20194 if (ret) {
895427bd 20195 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 20196 return ret;
895427bd 20197 }
cd22d605 20198
895427bd
JS
20199 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
20200 spin_unlock_irqrestore(&pring->ring_lock, iflags);
93a4d6f4
JS
20201
20202 lpfc_sli4_poll_eq(qp->hba_eq, LPFC_POLL_FASTPATH);
895427bd
JS
20203 return 0;
20204 }
20205
20206 /* NVME_FCREQ and NVME_ABTS requests */
20207 if (pwqe->iocb_flag & LPFC_IO_NVME) {
20208 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
c00f62e6 20209 wq = qp->io_wq;
1fbf9742 20210 pring = wq->pring;
895427bd 20211
c00f62e6 20212 bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->io_cq_map);
895427bd 20213
6a828b0f
JS
20214 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
20215 qp, wq_access);
cd22d605
DK
20216 ret = lpfc_sli4_wq_put(wq, wqe);
20217 if (ret) {
895427bd 20218 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 20219 return ret;
895427bd
JS
20220 }
20221 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
20222 spin_unlock_irqrestore(&pring->ring_lock, iflags);
93a4d6f4
JS
20223
20224 lpfc_sli4_poll_eq(qp->hba_eq, LPFC_POLL_FASTPATH);
895427bd
JS
20225 return 0;
20226 }
20227
f358dd0c
JS
20228 /* NVMET requests */
20229 if (pwqe->iocb_flag & LPFC_IO_NVMET) {
20230 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
c00f62e6 20231 wq = qp->io_wq;
1fbf9742 20232 pring = wq->pring;
f358dd0c 20233
f358dd0c 20234 ctxp = pwqe->context2;
6c621a22 20235 sglq = ctxp->ctxbuf->sglq;
f358dd0c
JS
20236 if (pwqe->sli4_xritag == NO_XRI) {
20237 pwqe->sli4_lxritag = sglq->sli4_lxritag;
20238 pwqe->sli4_xritag = sglq->sli4_xritag;
20239 }
20240 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
20241 pwqe->sli4_xritag);
c00f62e6 20242 bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->io_cq_map);
1fbf9742 20243
6a828b0f
JS
20244 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
20245 qp, wq_access);
cd22d605
DK
20246 ret = lpfc_sli4_wq_put(wq, wqe);
20247 if (ret) {
f358dd0c 20248 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 20249 return ret;
f358dd0c
JS
20250 }
20251 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
20252 spin_unlock_irqrestore(&pring->ring_lock, iflags);
93a4d6f4
JS
20253
20254 lpfc_sli4_poll_eq(qp->hba_eq, LPFC_POLL_FASTPATH);
f358dd0c
JS
20255 return 0;
20256 }
895427bd
JS
20257 return WQE_ERROR;
20258}
c490850a
JS
20259
20260#ifdef LPFC_MXP_STAT
20261/**
20262 * lpfc_snapshot_mxp - Snapshot pbl, pvt and busy count
20263 * @phba: pointer to lpfc hba data structure.
20264 * @hwqid: belong to which HWQ.
20265 *
20266 * The purpose of this routine is to take a snapshot of pbl, pvt and busy count
20267 * 15 seconds after a test case is running.
20268 *
20269 * The user should call lpfc_debugfs_multixripools_write before running a test
20270 * case to clear stat_snapshot_taken. Then the user starts a test case. During
20271 * test case is running, stat_snapshot_taken is incremented by 1 every time when
20272 * this routine is called from heartbeat timer. When stat_snapshot_taken is
20273 * equal to LPFC_MXP_SNAPSHOT_TAKEN, a snapshot is taken.
20274 **/
20275void lpfc_snapshot_mxp(struct lpfc_hba *phba, u32 hwqid)
20276{
20277 struct lpfc_sli4_hdw_queue *qp;
20278 struct lpfc_multixri_pool *multixri_pool;
20279 struct lpfc_pvt_pool *pvt_pool;
20280 struct lpfc_pbl_pool *pbl_pool;
20281 u32 txcmplq_cnt;
20282
20283 qp = &phba->sli4_hba.hdwq[hwqid];
20284 multixri_pool = qp->p_multixri_pool;
20285 if (!multixri_pool)
20286 return;
20287
20288 if (multixri_pool->stat_snapshot_taken == LPFC_MXP_SNAPSHOT_TAKEN) {
20289 pvt_pool = &qp->p_multixri_pool->pvt_pool;
20290 pbl_pool = &qp->p_multixri_pool->pbl_pool;
c00f62e6 20291 txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt;
c490850a
JS
20292
20293 multixri_pool->stat_pbl_count = pbl_pool->count;
20294 multixri_pool->stat_pvt_count = pvt_pool->count;
20295 multixri_pool->stat_busy_count = txcmplq_cnt;
20296 }
20297
20298 multixri_pool->stat_snapshot_taken++;
20299}
20300#endif
20301
20302/**
20303 * lpfc_adjust_pvt_pool_count - Adjust private pool count
20304 * @phba: pointer to lpfc hba data structure.
20305 * @hwqid: belong to which HWQ.
20306 *
20307 * This routine moves some XRIs from private to public pool when private pool
20308 * is not busy.
20309 **/
20310void lpfc_adjust_pvt_pool_count(struct lpfc_hba *phba, u32 hwqid)
20311{
20312 struct lpfc_multixri_pool *multixri_pool;
20313 u32 io_req_count;
20314 u32 prev_io_req_count;
20315
20316 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
20317 if (!multixri_pool)
20318 return;
20319 io_req_count = multixri_pool->io_req_count;
20320 prev_io_req_count = multixri_pool->prev_io_req_count;
20321
20322 if (prev_io_req_count != io_req_count) {
20323 /* Private pool is busy */
20324 multixri_pool->prev_io_req_count = io_req_count;
20325 } else {
20326 /* Private pool is not busy.
20327 * Move XRIs from private to public pool.
20328 */
20329 lpfc_move_xri_pvt_to_pbl(phba, hwqid);
20330 }
20331}
20332
20333/**
20334 * lpfc_adjust_high_watermark - Adjust high watermark
20335 * @phba: pointer to lpfc hba data structure.
20336 * @hwqid: belong to which HWQ.
20337 *
20338 * This routine sets high watermark as number of outstanding XRIs,
20339 * but make sure the new value is between xri_limit/2 and xri_limit.
20340 **/
20341void lpfc_adjust_high_watermark(struct lpfc_hba *phba, u32 hwqid)
20342{
20343 u32 new_watermark;
20344 u32 watermark_max;
20345 u32 watermark_min;
20346 u32 xri_limit;
20347 u32 txcmplq_cnt;
20348 u32 abts_io_bufs;
20349 struct lpfc_multixri_pool *multixri_pool;
20350 struct lpfc_sli4_hdw_queue *qp;
20351
20352 qp = &phba->sli4_hba.hdwq[hwqid];
20353 multixri_pool = qp->p_multixri_pool;
20354 if (!multixri_pool)
20355 return;
20356 xri_limit = multixri_pool->xri_limit;
20357
20358 watermark_max = xri_limit;
20359 watermark_min = xri_limit / 2;
20360
c00f62e6 20361 txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt;
c490850a 20362 abts_io_bufs = qp->abts_scsi_io_bufs;
c00f62e6 20363 abts_io_bufs += qp->abts_nvme_io_bufs;
c490850a
JS
20364
20365 new_watermark = txcmplq_cnt + abts_io_bufs;
20366 new_watermark = min(watermark_max, new_watermark);
20367 new_watermark = max(watermark_min, new_watermark);
20368 multixri_pool->pvt_pool.high_watermark = new_watermark;
20369
20370#ifdef LPFC_MXP_STAT
20371 multixri_pool->stat_max_hwm = max(multixri_pool->stat_max_hwm,
20372 new_watermark);
20373#endif
20374}
20375
20376/**
20377 * lpfc_move_xri_pvt_to_pbl - Move some XRIs from private to public pool
20378 * @phba: pointer to lpfc hba data structure.
20379 * @hwqid: belong to which HWQ.
20380 *
20381 * This routine is called from hearbeat timer when pvt_pool is idle.
20382 * All free XRIs are moved from private to public pool on hwqid with 2 steps.
20383 * The first step moves (all - low_watermark) amount of XRIs.
20384 * The second step moves the rest of XRIs.
20385 **/
20386void lpfc_move_xri_pvt_to_pbl(struct lpfc_hba *phba, u32 hwqid)
20387{
20388 struct lpfc_pbl_pool *pbl_pool;
20389 struct lpfc_pvt_pool *pvt_pool;
6a828b0f 20390 struct lpfc_sli4_hdw_queue *qp;
c490850a
JS
20391 struct lpfc_io_buf *lpfc_ncmd;
20392 struct lpfc_io_buf *lpfc_ncmd_next;
20393 unsigned long iflag;
20394 struct list_head tmp_list;
20395 u32 tmp_count;
20396
6a828b0f
JS
20397 qp = &phba->sli4_hba.hdwq[hwqid];
20398 pbl_pool = &qp->p_multixri_pool->pbl_pool;
20399 pvt_pool = &qp->p_multixri_pool->pvt_pool;
c490850a
JS
20400 tmp_count = 0;
20401
6a828b0f
JS
20402 lpfc_qp_spin_lock_irqsave(&pbl_pool->lock, iflag, qp, mv_to_pub_pool);
20403 lpfc_qp_spin_lock(&pvt_pool->lock, qp, mv_from_pvt_pool);
c490850a
JS
20404
20405 if (pvt_pool->count > pvt_pool->low_watermark) {
20406 /* Step 1: move (all - low_watermark) from pvt_pool
20407 * to pbl_pool
20408 */
20409
20410 /* Move low watermark of bufs from pvt_pool to tmp_list */
20411 INIT_LIST_HEAD(&tmp_list);
20412 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20413 &pvt_pool->list, list) {
20414 list_move_tail(&lpfc_ncmd->list, &tmp_list);
20415 tmp_count++;
20416 if (tmp_count >= pvt_pool->low_watermark)
20417 break;
20418 }
20419
20420 /* Move all bufs from pvt_pool to pbl_pool */
20421 list_splice_init(&pvt_pool->list, &pbl_pool->list);
20422
20423 /* Move all bufs from tmp_list to pvt_pool */
20424 list_splice(&tmp_list, &pvt_pool->list);
20425
20426 pbl_pool->count += (pvt_pool->count - tmp_count);
20427 pvt_pool->count = tmp_count;
20428 } else {
20429 /* Step 2: move the rest from pvt_pool to pbl_pool */
20430 list_splice_init(&pvt_pool->list, &pbl_pool->list);
20431 pbl_pool->count += pvt_pool->count;
20432 pvt_pool->count = 0;
20433 }
20434
20435 spin_unlock(&pvt_pool->lock);
20436 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20437}
20438
20439/**
20440 * _lpfc_move_xri_pbl_to_pvt - Move some XRIs from public to private pool
20441 * @phba: pointer to lpfc hba data structure
7af29d45 20442 * @qp: pointer to HDW queue
c490850a
JS
20443 * @pbl_pool: specified public free XRI pool
20444 * @pvt_pool: specified private free XRI pool
20445 * @count: number of XRIs to move
20446 *
20447 * This routine tries to move some free common bufs from the specified pbl_pool
20448 * to the specified pvt_pool. It might move less than count XRIs if there's not
20449 * enough in public pool.
20450 *
20451 * Return:
20452 * true - if XRIs are successfully moved from the specified pbl_pool to the
20453 * specified pvt_pool
20454 * false - if the specified pbl_pool is empty or locked by someone else
20455 **/
20456static bool
6a828b0f
JS
20457_lpfc_move_xri_pbl_to_pvt(struct lpfc_hba *phba, struct lpfc_sli4_hdw_queue *qp,
20458 struct lpfc_pbl_pool *pbl_pool,
c490850a
JS
20459 struct lpfc_pvt_pool *pvt_pool, u32 count)
20460{
20461 struct lpfc_io_buf *lpfc_ncmd;
20462 struct lpfc_io_buf *lpfc_ncmd_next;
20463 unsigned long iflag;
20464 int ret;
20465
20466 ret = spin_trylock_irqsave(&pbl_pool->lock, iflag);
20467 if (ret) {
20468 if (pbl_pool->count) {
20469 /* Move a batch of XRIs from public to private pool */
6a828b0f 20470 lpfc_qp_spin_lock(&pvt_pool->lock, qp, mv_to_pvt_pool);
c490850a
JS
20471 list_for_each_entry_safe(lpfc_ncmd,
20472 lpfc_ncmd_next,
20473 &pbl_pool->list,
20474 list) {
20475 list_move_tail(&lpfc_ncmd->list,
20476 &pvt_pool->list);
20477 pvt_pool->count++;
20478 pbl_pool->count--;
20479 count--;
20480 if (count == 0)
20481 break;
20482 }
20483
20484 spin_unlock(&pvt_pool->lock);
20485 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20486 return true;
20487 }
20488 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20489 }
20490
20491 return false;
20492}
20493
20494/**
20495 * lpfc_move_xri_pbl_to_pvt - Move some XRIs from public to private pool
20496 * @phba: pointer to lpfc hba data structure.
20497 * @hwqid: belong to which HWQ.
20498 * @count: number of XRIs to move
20499 *
20500 * This routine tries to find some free common bufs in one of public pools with
20501 * Round Robin method. The search always starts from local hwqid, then the next
20502 * HWQ which was found last time (rrb_next_hwqid). Once a public pool is found,
20503 * a batch of free common bufs are moved to private pool on hwqid.
20504 * It might move less than count XRIs if there's not enough in public pool.
20505 **/
20506void lpfc_move_xri_pbl_to_pvt(struct lpfc_hba *phba, u32 hwqid, u32 count)
20507{
20508 struct lpfc_multixri_pool *multixri_pool;
20509 struct lpfc_multixri_pool *next_multixri_pool;
20510 struct lpfc_pvt_pool *pvt_pool;
20511 struct lpfc_pbl_pool *pbl_pool;
6a828b0f 20512 struct lpfc_sli4_hdw_queue *qp;
c490850a
JS
20513 u32 next_hwqid;
20514 u32 hwq_count;
20515 int ret;
20516
6a828b0f
JS
20517 qp = &phba->sli4_hba.hdwq[hwqid];
20518 multixri_pool = qp->p_multixri_pool;
c490850a
JS
20519 pvt_pool = &multixri_pool->pvt_pool;
20520 pbl_pool = &multixri_pool->pbl_pool;
20521
20522 /* Check if local pbl_pool is available */
6a828b0f 20523 ret = _lpfc_move_xri_pbl_to_pvt(phba, qp, pbl_pool, pvt_pool, count);
c490850a
JS
20524 if (ret) {
20525#ifdef LPFC_MXP_STAT
20526 multixri_pool->local_pbl_hit_count++;
20527#endif
20528 return;
20529 }
20530
20531 hwq_count = phba->cfg_hdw_queue;
20532
20533 /* Get the next hwqid which was found last time */
20534 next_hwqid = multixri_pool->rrb_next_hwqid;
20535
20536 do {
20537 /* Go to next hwq */
20538 next_hwqid = (next_hwqid + 1) % hwq_count;
20539
20540 next_multixri_pool =
20541 phba->sli4_hba.hdwq[next_hwqid].p_multixri_pool;
20542 pbl_pool = &next_multixri_pool->pbl_pool;
20543
20544 /* Check if the public free xri pool is available */
20545 ret = _lpfc_move_xri_pbl_to_pvt(
6a828b0f 20546 phba, qp, pbl_pool, pvt_pool, count);
c490850a
JS
20547
20548 /* Exit while-loop if success or all hwqid are checked */
20549 } while (!ret && next_hwqid != multixri_pool->rrb_next_hwqid);
20550
20551 /* Starting point for the next time */
20552 multixri_pool->rrb_next_hwqid = next_hwqid;
20553
20554 if (!ret) {
20555 /* stats: all public pools are empty*/
20556 multixri_pool->pbl_empty_count++;
20557 }
20558
20559#ifdef LPFC_MXP_STAT
20560 if (ret) {
20561 if (next_hwqid == hwqid)
20562 multixri_pool->local_pbl_hit_count++;
20563 else
20564 multixri_pool->other_pbl_hit_count++;
20565 }
20566#endif
20567}
20568
20569/**
20570 * lpfc_keep_pvt_pool_above_lowwm - Keep pvt_pool above low watermark
20571 * @phba: pointer to lpfc hba data structure.
7af29d45 20572 * @hwqid: belong to which HWQ.
c490850a
JS
20573 *
20574 * This routine get a batch of XRIs from pbl_pool if pvt_pool is less than
20575 * low watermark.
20576 **/
20577void lpfc_keep_pvt_pool_above_lowwm(struct lpfc_hba *phba, u32 hwqid)
20578{
20579 struct lpfc_multixri_pool *multixri_pool;
20580 struct lpfc_pvt_pool *pvt_pool;
20581
20582 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
20583 pvt_pool = &multixri_pool->pvt_pool;
20584
20585 if (pvt_pool->count < pvt_pool->low_watermark)
20586 lpfc_move_xri_pbl_to_pvt(phba, hwqid, XRI_BATCH);
20587}
20588
20589/**
20590 * lpfc_release_io_buf - Return one IO buf back to free pool
20591 * @phba: pointer to lpfc hba data structure.
20592 * @lpfc_ncmd: IO buf to be returned.
20593 * @qp: belong to which HWQ.
20594 *
20595 * This routine returns one IO buf back to free pool. If this is an urgent IO,
20596 * the IO buf is returned to expedite pool. If cfg_xri_rebalancing==1,
20597 * the IO buf is returned to pbl_pool or pvt_pool based on watermark and
20598 * xri_limit. If cfg_xri_rebalancing==0, the IO buf is returned to
20599 * lpfc_io_buf_list_put.
20600 **/
20601void lpfc_release_io_buf(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_ncmd,
20602 struct lpfc_sli4_hdw_queue *qp)
20603{
20604 unsigned long iflag;
20605 struct lpfc_pbl_pool *pbl_pool;
20606 struct lpfc_pvt_pool *pvt_pool;
20607 struct lpfc_epd_pool *epd_pool;
20608 u32 txcmplq_cnt;
20609 u32 xri_owned;
20610 u32 xri_limit;
20611 u32 abts_io_bufs;
20612
20613 /* MUST zero fields if buffer is reused by another protocol */
20614 lpfc_ncmd->nvmeCmd = NULL;
20615 lpfc_ncmd->cur_iocbq.wqe_cmpl = NULL;
20616 lpfc_ncmd->cur_iocbq.iocb_cmpl = NULL;
20617
35a635af
JS
20618 if (phba->cfg_xpsgl && !phba->nvmet_support &&
20619 !list_empty(&lpfc_ncmd->dma_sgl_xtra_list))
20620 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
20621
20622 if (!list_empty(&lpfc_ncmd->dma_cmd_rsp_list))
20623 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
20624
c490850a
JS
20625 if (phba->cfg_xri_rebalancing) {
20626 if (lpfc_ncmd->expedite) {
20627 /* Return to expedite pool */
20628 epd_pool = &phba->epd_pool;
20629 spin_lock_irqsave(&epd_pool->lock, iflag);
20630 list_add_tail(&lpfc_ncmd->list, &epd_pool->list);
20631 epd_pool->count++;
20632 spin_unlock_irqrestore(&epd_pool->lock, iflag);
20633 return;
20634 }
20635
20636 /* Avoid invalid access if an IO sneaks in and is being rejected
20637 * just _after_ xri pools are destroyed in lpfc_offline.
20638 * Nothing much can be done at this point.
20639 */
20640 if (!qp->p_multixri_pool)
20641 return;
20642
20643 pbl_pool = &qp->p_multixri_pool->pbl_pool;
20644 pvt_pool = &qp->p_multixri_pool->pvt_pool;
20645
c00f62e6 20646 txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt;
c490850a 20647 abts_io_bufs = qp->abts_scsi_io_bufs;
c00f62e6 20648 abts_io_bufs += qp->abts_nvme_io_bufs;
c490850a
JS
20649
20650 xri_owned = pvt_pool->count + txcmplq_cnt + abts_io_bufs;
20651 xri_limit = qp->p_multixri_pool->xri_limit;
20652
20653#ifdef LPFC_MXP_STAT
20654 if (xri_owned <= xri_limit)
20655 qp->p_multixri_pool->below_limit_count++;
20656 else
20657 qp->p_multixri_pool->above_limit_count++;
20658#endif
20659
20660 /* XRI goes to either public or private free xri pool
20661 * based on watermark and xri_limit
20662 */
20663 if ((pvt_pool->count < pvt_pool->low_watermark) ||
20664 (xri_owned < xri_limit &&
20665 pvt_pool->count < pvt_pool->high_watermark)) {
6a828b0f
JS
20666 lpfc_qp_spin_lock_irqsave(&pvt_pool->lock, iflag,
20667 qp, free_pvt_pool);
c490850a
JS
20668 list_add_tail(&lpfc_ncmd->list,
20669 &pvt_pool->list);
20670 pvt_pool->count++;
20671 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20672 } else {
6a828b0f
JS
20673 lpfc_qp_spin_lock_irqsave(&pbl_pool->lock, iflag,
20674 qp, free_pub_pool);
c490850a
JS
20675 list_add_tail(&lpfc_ncmd->list,
20676 &pbl_pool->list);
20677 pbl_pool->count++;
20678 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20679 }
20680 } else {
6a828b0f
JS
20681 lpfc_qp_spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag,
20682 qp, free_xri);
c490850a
JS
20683 list_add_tail(&lpfc_ncmd->list,
20684 &qp->lpfc_io_buf_list_put);
20685 qp->put_io_bufs++;
20686 spin_unlock_irqrestore(&qp->io_buf_list_put_lock,
20687 iflag);
20688 }
20689}
20690
20691/**
20692 * lpfc_get_io_buf_from_private_pool - Get one free IO buf from private pool
20693 * @phba: pointer to lpfc hba data structure.
7af29d45 20694 * @qp: pointer to HDW queue
c490850a
JS
20695 * @pvt_pool: pointer to private pool data structure.
20696 * @ndlp: pointer to lpfc nodelist data structure.
20697 *
20698 * This routine tries to get one free IO buf from private pool.
20699 *
20700 * Return:
20701 * pointer to one free IO buf - if private pool is not empty
20702 * NULL - if private pool is empty
20703 **/
20704static struct lpfc_io_buf *
20705lpfc_get_io_buf_from_private_pool(struct lpfc_hba *phba,
6a828b0f 20706 struct lpfc_sli4_hdw_queue *qp,
c490850a
JS
20707 struct lpfc_pvt_pool *pvt_pool,
20708 struct lpfc_nodelist *ndlp)
20709{
20710 struct lpfc_io_buf *lpfc_ncmd;
20711 struct lpfc_io_buf *lpfc_ncmd_next;
20712 unsigned long iflag;
20713
6a828b0f 20714 lpfc_qp_spin_lock_irqsave(&pvt_pool->lock, iflag, qp, alloc_pvt_pool);
c490850a
JS
20715 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20716 &pvt_pool->list, list) {
20717 if (lpfc_test_rrq_active(
20718 phba, ndlp, lpfc_ncmd->cur_iocbq.sli4_lxritag))
20719 continue;
20720 list_del(&lpfc_ncmd->list);
20721 pvt_pool->count--;
20722 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20723 return lpfc_ncmd;
20724 }
20725 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20726
20727 return NULL;
20728}
20729
20730/**
20731 * lpfc_get_io_buf_from_expedite_pool - Get one free IO buf from expedite pool
20732 * @phba: pointer to lpfc hba data structure.
20733 *
20734 * This routine tries to get one free IO buf from expedite pool.
20735 *
20736 * Return:
20737 * pointer to one free IO buf - if expedite pool is not empty
20738 * NULL - if expedite pool is empty
20739 **/
20740static struct lpfc_io_buf *
20741lpfc_get_io_buf_from_expedite_pool(struct lpfc_hba *phba)
20742{
20743 struct lpfc_io_buf *lpfc_ncmd;
20744 struct lpfc_io_buf *lpfc_ncmd_next;
20745 unsigned long iflag;
20746 struct lpfc_epd_pool *epd_pool;
20747
20748 epd_pool = &phba->epd_pool;
20749 lpfc_ncmd = NULL;
20750
20751 spin_lock_irqsave(&epd_pool->lock, iflag);
20752 if (epd_pool->count > 0) {
20753 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20754 &epd_pool->list, list) {
20755 list_del(&lpfc_ncmd->list);
20756 epd_pool->count--;
20757 break;
20758 }
20759 }
20760 spin_unlock_irqrestore(&epd_pool->lock, iflag);
20761
20762 return lpfc_ncmd;
20763}
20764
20765/**
20766 * lpfc_get_io_buf_from_multixri_pools - Get one free IO bufs
20767 * @phba: pointer to lpfc hba data structure.
20768 * @ndlp: pointer to lpfc nodelist data structure.
20769 * @hwqid: belong to which HWQ
20770 * @expedite: 1 means this request is urgent.
20771 *
20772 * This routine will do the following actions and then return a pointer to
20773 * one free IO buf.
20774 *
20775 * 1. If private free xri count is empty, move some XRIs from public to
20776 * private pool.
20777 * 2. Get one XRI from private free xri pool.
20778 * 3. If we fail to get one from pvt_pool and this is an expedite request,
20779 * get one free xri from expedite pool.
20780 *
20781 * Note: ndlp is only used on SCSI side for RRQ testing.
20782 * The caller should pass NULL for ndlp on NVME side.
20783 *
20784 * Return:
20785 * pointer to one free IO buf - if private pool is not empty
20786 * NULL - if private pool is empty
20787 **/
20788static struct lpfc_io_buf *
20789lpfc_get_io_buf_from_multixri_pools(struct lpfc_hba *phba,
20790 struct lpfc_nodelist *ndlp,
20791 int hwqid, int expedite)
20792{
20793 struct lpfc_sli4_hdw_queue *qp;
20794 struct lpfc_multixri_pool *multixri_pool;
20795 struct lpfc_pvt_pool *pvt_pool;
20796 struct lpfc_io_buf *lpfc_ncmd;
20797
20798 qp = &phba->sli4_hba.hdwq[hwqid];
20799 lpfc_ncmd = NULL;
20800 multixri_pool = qp->p_multixri_pool;
20801 pvt_pool = &multixri_pool->pvt_pool;
20802 multixri_pool->io_req_count++;
20803
20804 /* If pvt_pool is empty, move some XRIs from public to private pool */
20805 if (pvt_pool->count == 0)
20806 lpfc_move_xri_pbl_to_pvt(phba, hwqid, XRI_BATCH);
20807
20808 /* Get one XRI from private free xri pool */
6a828b0f 20809 lpfc_ncmd = lpfc_get_io_buf_from_private_pool(phba, qp, pvt_pool, ndlp);
c490850a
JS
20810
20811 if (lpfc_ncmd) {
20812 lpfc_ncmd->hdwq = qp;
20813 lpfc_ncmd->hdwq_no = hwqid;
20814 } else if (expedite) {
20815 /* If we fail to get one from pvt_pool and this is an expedite
20816 * request, get one free xri from expedite pool.
20817 */
20818 lpfc_ncmd = lpfc_get_io_buf_from_expedite_pool(phba);
20819 }
20820
20821 return lpfc_ncmd;
20822}
20823
20824static inline struct lpfc_io_buf *
20825lpfc_io_buf(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, int idx)
20826{
20827 struct lpfc_sli4_hdw_queue *qp;
20828 struct lpfc_io_buf *lpfc_cmd, *lpfc_cmd_next;
20829
20830 qp = &phba->sli4_hba.hdwq[idx];
20831 list_for_each_entry_safe(lpfc_cmd, lpfc_cmd_next,
20832 &qp->lpfc_io_buf_list_get, list) {
20833 if (lpfc_test_rrq_active(phba, ndlp,
20834 lpfc_cmd->cur_iocbq.sli4_lxritag))
20835 continue;
20836
20837 if (lpfc_cmd->flags & LPFC_SBUF_NOT_POSTED)
20838 continue;
20839
20840 list_del_init(&lpfc_cmd->list);
20841 qp->get_io_bufs--;
20842 lpfc_cmd->hdwq = qp;
20843 lpfc_cmd->hdwq_no = idx;
20844 return lpfc_cmd;
20845 }
20846 return NULL;
20847}
20848
20849/**
20850 * lpfc_get_io_buf - Get one IO buffer from free pool
20851 * @phba: The HBA for which this call is being executed.
20852 * @ndlp: pointer to lpfc nodelist data structure.
20853 * @hwqid: belong to which HWQ
20854 * @expedite: 1 means this request is urgent.
20855 *
20856 * This routine gets one IO buffer from free pool. If cfg_xri_rebalancing==1,
20857 * removes a IO buffer from multiXRI pools. If cfg_xri_rebalancing==0, removes
20858 * a IO buffer from head of @hdwq io_buf_list and returns to caller.
20859 *
20860 * Note: ndlp is only used on SCSI side for RRQ testing.
20861 * The caller should pass NULL for ndlp on NVME side.
20862 *
20863 * Return codes:
20864 * NULL - Error
20865 * Pointer to lpfc_io_buf - Success
20866 **/
20867struct lpfc_io_buf *lpfc_get_io_buf(struct lpfc_hba *phba,
20868 struct lpfc_nodelist *ndlp,
20869 u32 hwqid, int expedite)
20870{
20871 struct lpfc_sli4_hdw_queue *qp;
20872 unsigned long iflag;
20873 struct lpfc_io_buf *lpfc_cmd;
20874
20875 qp = &phba->sli4_hba.hdwq[hwqid];
20876 lpfc_cmd = NULL;
20877
20878 if (phba->cfg_xri_rebalancing)
20879 lpfc_cmd = lpfc_get_io_buf_from_multixri_pools(
20880 phba, ndlp, hwqid, expedite);
20881 else {
6a828b0f
JS
20882 lpfc_qp_spin_lock_irqsave(&qp->io_buf_list_get_lock, iflag,
20883 qp, alloc_xri_get);
c490850a
JS
20884 if (qp->get_io_bufs > LPFC_NVME_EXPEDITE_XRICNT || expedite)
20885 lpfc_cmd = lpfc_io_buf(phba, ndlp, hwqid);
20886 if (!lpfc_cmd) {
6a828b0f
JS
20887 lpfc_qp_spin_lock(&qp->io_buf_list_put_lock,
20888 qp, alloc_xri_put);
c490850a
JS
20889 list_splice(&qp->lpfc_io_buf_list_put,
20890 &qp->lpfc_io_buf_list_get);
20891 qp->get_io_bufs += qp->put_io_bufs;
20892 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
20893 qp->put_io_bufs = 0;
20894 spin_unlock(&qp->io_buf_list_put_lock);
20895 if (qp->get_io_bufs > LPFC_NVME_EXPEDITE_XRICNT ||
20896 expedite)
20897 lpfc_cmd = lpfc_io_buf(phba, ndlp, hwqid);
20898 }
20899 spin_unlock_irqrestore(&qp->io_buf_list_get_lock, iflag);
20900 }
20901
20902 return lpfc_cmd;
20903}
d79c9e9d
JS
20904
20905/**
20906 * lpfc_get_sgl_per_hdwq - Get one SGL chunk from hdwq's pool
20907 * @phba: The HBA for which this call is being executed.
20908 * @lpfc_buf: IO buf structure to append the SGL chunk
20909 *
20910 * This routine gets one SGL chunk buffer from hdwq's SGL chunk pool,
20911 * and will allocate an SGL chunk if the pool is empty.
20912 *
20913 * Return codes:
20914 * NULL - Error
20915 * Pointer to sli4_hybrid_sgl - Success
20916 **/
20917struct sli4_hybrid_sgl *
20918lpfc_get_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_buf)
20919{
20920 struct sli4_hybrid_sgl *list_entry = NULL;
20921 struct sli4_hybrid_sgl *tmp = NULL;
20922 struct sli4_hybrid_sgl *allocated_sgl = NULL;
20923 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20924 struct list_head *buf_list = &hdwq->sgl_list;
a4c21acc 20925 unsigned long iflags;
d79c9e9d 20926
a4c21acc 20927 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20928
20929 if (likely(!list_empty(buf_list))) {
20930 /* break off 1 chunk from the sgl_list */
20931 list_for_each_entry_safe(list_entry, tmp,
20932 buf_list, list_node) {
20933 list_move_tail(&list_entry->list_node,
20934 &lpfc_buf->dma_sgl_xtra_list);
20935 break;
20936 }
20937 } else {
20938 /* allocate more */
a4c21acc 20939 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d 20940 tmp = kmalloc_node(sizeof(*tmp), GFP_ATOMIC,
4583a4f6 20941 cpu_to_node(hdwq->io_wq->chann));
d79c9e9d
JS
20942 if (!tmp) {
20943 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20944 "8353 error kmalloc memory for HDWQ "
20945 "%d %s\n",
20946 lpfc_buf->hdwq_no, __func__);
20947 return NULL;
20948 }
20949
20950 tmp->dma_sgl = dma_pool_alloc(phba->lpfc_sg_dma_buf_pool,
20951 GFP_ATOMIC, &tmp->dma_phys_sgl);
20952 if (!tmp->dma_sgl) {
20953 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20954 "8354 error pool_alloc memory for HDWQ "
20955 "%d %s\n",
20956 lpfc_buf->hdwq_no, __func__);
20957 kfree(tmp);
20958 return NULL;
20959 }
20960
a4c21acc 20961 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20962 list_add_tail(&tmp->list_node, &lpfc_buf->dma_sgl_xtra_list);
20963 }
20964
20965 allocated_sgl = list_last_entry(&lpfc_buf->dma_sgl_xtra_list,
20966 struct sli4_hybrid_sgl,
20967 list_node);
20968
a4c21acc 20969 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20970
20971 return allocated_sgl;
20972}
20973
20974/**
20975 * lpfc_put_sgl_per_hdwq - Put one SGL chunk into hdwq pool
20976 * @phba: The HBA for which this call is being executed.
20977 * @lpfc_buf: IO buf structure with the SGL chunk
20978 *
20979 * This routine puts one SGL chunk buffer into hdwq's SGL chunk pool.
20980 *
20981 * Return codes:
20982 * 0 - Success
20983 * -EINVAL - Error
20984 **/
20985int
20986lpfc_put_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_buf)
20987{
20988 int rc = 0;
20989 struct sli4_hybrid_sgl *list_entry = NULL;
20990 struct sli4_hybrid_sgl *tmp = NULL;
20991 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20992 struct list_head *buf_list = &hdwq->sgl_list;
a4c21acc 20993 unsigned long iflags;
d79c9e9d 20994
a4c21acc 20995 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20996
20997 if (likely(!list_empty(&lpfc_buf->dma_sgl_xtra_list))) {
20998 list_for_each_entry_safe(list_entry, tmp,
20999 &lpfc_buf->dma_sgl_xtra_list,
21000 list_node) {
21001 list_move_tail(&list_entry->list_node,
21002 buf_list);
21003 }
21004 } else {
21005 rc = -EINVAL;
21006 }
21007
a4c21acc 21008 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
21009 return rc;
21010}
21011
21012/**
21013 * lpfc_free_sgl_per_hdwq - Free all SGL chunks of hdwq pool
21014 * @phba: phba object
21015 * @hdwq: hdwq to cleanup sgl buff resources on
21016 *
21017 * This routine frees all SGL chunks of hdwq SGL chunk pool.
21018 *
21019 * Return codes:
21020 * None
21021 **/
21022void
21023lpfc_free_sgl_per_hdwq(struct lpfc_hba *phba,
21024 struct lpfc_sli4_hdw_queue *hdwq)
21025{
21026 struct list_head *buf_list = &hdwq->sgl_list;
21027 struct sli4_hybrid_sgl *list_entry = NULL;
21028 struct sli4_hybrid_sgl *tmp = NULL;
a4c21acc 21029 unsigned long iflags;
d79c9e9d 21030
a4c21acc 21031 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
21032
21033 /* Free sgl pool */
21034 list_for_each_entry_safe(list_entry, tmp,
21035 buf_list, list_node) {
21036 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
21037 list_entry->dma_sgl,
21038 list_entry->dma_phys_sgl);
21039 list_del(&list_entry->list_node);
21040 kfree(list_entry);
21041 }
21042
a4c21acc 21043 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
21044}
21045
21046/**
21047 * lpfc_get_cmd_rsp_buf_per_hdwq - Get one CMD/RSP buffer from hdwq
21048 * @phba: The HBA for which this call is being executed.
21049 * @lpfc_buf: IO buf structure to attach the CMD/RSP buffer
21050 *
21051 * This routine gets one CMD/RSP buffer from hdwq's CMD/RSP pool,
21052 * and will allocate an CMD/RSP buffer if the pool is empty.
21053 *
21054 * Return codes:
21055 * NULL - Error
21056 * Pointer to fcp_cmd_rsp_buf - Success
21057 **/
21058struct fcp_cmd_rsp_buf *
21059lpfc_get_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
21060 struct lpfc_io_buf *lpfc_buf)
21061{
21062 struct fcp_cmd_rsp_buf *list_entry = NULL;
21063 struct fcp_cmd_rsp_buf *tmp = NULL;
21064 struct fcp_cmd_rsp_buf *allocated_buf = NULL;
21065 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
21066 struct list_head *buf_list = &hdwq->cmd_rsp_buf_list;
a4c21acc 21067 unsigned long iflags;
d79c9e9d 21068
a4c21acc 21069 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
21070
21071 if (likely(!list_empty(buf_list))) {
21072 /* break off 1 chunk from the list */
21073 list_for_each_entry_safe(list_entry, tmp,
21074 buf_list,
21075 list_node) {
21076 list_move_tail(&list_entry->list_node,
21077 &lpfc_buf->dma_cmd_rsp_list);
21078 break;
21079 }
21080 } else {
21081 /* allocate more */
a4c21acc 21082 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d 21083 tmp = kmalloc_node(sizeof(*tmp), GFP_ATOMIC,
4583a4f6 21084 cpu_to_node(hdwq->io_wq->chann));
d79c9e9d
JS
21085 if (!tmp) {
21086 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
21087 "8355 error kmalloc memory for HDWQ "
21088 "%d %s\n",
21089 lpfc_buf->hdwq_no, __func__);
21090 return NULL;
21091 }
21092
21093 tmp->fcp_cmnd = dma_pool_alloc(phba->lpfc_cmd_rsp_buf_pool,
21094 GFP_ATOMIC,
21095 &tmp->fcp_cmd_rsp_dma_handle);
21096
21097 if (!tmp->fcp_cmnd) {
21098 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
21099 "8356 error pool_alloc memory for HDWQ "
21100 "%d %s\n",
21101 lpfc_buf->hdwq_no, __func__);
21102 kfree(tmp);
21103 return NULL;
21104 }
21105
21106 tmp->fcp_rsp = (struct fcp_rsp *)((uint8_t *)tmp->fcp_cmnd +
21107 sizeof(struct fcp_cmnd));
21108
a4c21acc 21109 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
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JS
21110 list_add_tail(&tmp->list_node, &lpfc_buf->dma_cmd_rsp_list);
21111 }
21112
21113 allocated_buf = list_last_entry(&lpfc_buf->dma_cmd_rsp_list,
21114 struct fcp_cmd_rsp_buf,
21115 list_node);
21116
a4c21acc 21117 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
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JS
21118
21119 return allocated_buf;
21120}
21121
21122/**
21123 * lpfc_put_cmd_rsp_buf_per_hdwq - Put one CMD/RSP buffer into hdwq pool
21124 * @phba: The HBA for which this call is being executed.
21125 * @lpfc_buf: IO buf structure with the CMD/RSP buf
21126 *
21127 * This routine puts one CMD/RSP buffer into executing CPU's CMD/RSP pool.
21128 *
21129 * Return codes:
21130 * 0 - Success
21131 * -EINVAL - Error
21132 **/
21133int
21134lpfc_put_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
21135 struct lpfc_io_buf *lpfc_buf)
21136{
21137 int rc = 0;
21138 struct fcp_cmd_rsp_buf *list_entry = NULL;
21139 struct fcp_cmd_rsp_buf *tmp = NULL;
21140 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
21141 struct list_head *buf_list = &hdwq->cmd_rsp_buf_list;
a4c21acc 21142 unsigned long iflags;
d79c9e9d 21143
a4c21acc 21144 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
21145
21146 if (likely(!list_empty(&lpfc_buf->dma_cmd_rsp_list))) {
21147 list_for_each_entry_safe(list_entry, tmp,
21148 &lpfc_buf->dma_cmd_rsp_list,
21149 list_node) {
21150 list_move_tail(&list_entry->list_node,
21151 buf_list);
21152 }
21153 } else {
21154 rc = -EINVAL;
21155 }
21156
a4c21acc 21157 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
21158 return rc;
21159}
21160
21161/**
21162 * lpfc_free_cmd_rsp_buf_per_hdwq - Free all CMD/RSP chunks of hdwq pool
21163 * @phba: phba object
21164 * @hdwq: hdwq to cleanup cmd rsp buff resources on
21165 *
21166 * This routine frees all CMD/RSP buffers of hdwq's CMD/RSP buf pool.
21167 *
21168 * Return codes:
21169 * None
21170 **/
21171void
21172lpfc_free_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
21173 struct lpfc_sli4_hdw_queue *hdwq)
21174{
21175 struct list_head *buf_list = &hdwq->cmd_rsp_buf_list;
21176 struct fcp_cmd_rsp_buf *list_entry = NULL;
21177 struct fcp_cmd_rsp_buf *tmp = NULL;
a4c21acc 21178 unsigned long iflags;
d79c9e9d 21179
a4c21acc 21180 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
21181
21182 /* Free cmd_rsp buf pool */
21183 list_for_each_entry_safe(list_entry, tmp,
21184 buf_list,
21185 list_node) {
21186 dma_pool_free(phba->lpfc_cmd_rsp_buf_pool,
21187 list_entry->fcp_cmnd,
21188 list_entry->fcp_cmd_rsp_dma_handle);
21189 list_del(&list_entry->list_node);
21190 kfree(list_entry);
21191 }
21192
a4c21acc 21193 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d 21194}