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1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
128bddac 4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
3e21d1cb 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
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10 * *
11 * This program is free software; you can redistribute it and/or *
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12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
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22 *******************************************************************/
23
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24#include <linux/blkdev.h>
25#include <linux/pci.h>
26#include <linux/interrupt.h>
27#include <linux/delay.h>
5a0e3ad6 28#include <linux/slab.h>
1c2ba475 29#include <linux/lockdep.h>
dea3101e 30
91886523 31#include <scsi/scsi.h>
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32#include <scsi/scsi_cmnd.h>
33#include <scsi/scsi_device.h>
34#include <scsi/scsi_host.h>
f888ba3c 35#include <scsi/scsi_transport_fc.h>
da0436e9 36#include <scsi/fc/fc_fs.h>
0d878419 37#include <linux/aer.h>
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38#ifdef CONFIG_X86
39#include <asm/set_memory.h>
40#endif
dea3101e 41
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42#include <linux/nvme-fc-driver.h>
43
da0436e9 44#include "lpfc_hw4.h"
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45#include "lpfc_hw.h"
46#include "lpfc_sli.h"
da0436e9 47#include "lpfc_sli4.h"
ea2151b4 48#include "lpfc_nl.h"
dea3101e 49#include "lpfc_disc.h"
dea3101e 50#include "lpfc.h"
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51#include "lpfc_scsi.h"
52#include "lpfc_nvme.h"
f358dd0c 53#include "lpfc_nvmet.h"
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54#include "lpfc_crtn.h"
55#include "lpfc_logmsg.h"
56#include "lpfc_compat.h"
858c9f6c 57#include "lpfc_debugfs.h"
04c68496 58#include "lpfc_vport.h"
61bda8f7 59#include "lpfc_version.h"
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60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
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69
70/* Provide function prototypes local to this module. */
71static int lpfc_sli_issue_mbox_s4(struct lpfc_hba *, LPFC_MBOXQ_t *,
72 uint32_t);
73static int lpfc_sli4_read_rev(struct lpfc_hba *, LPFC_MBOXQ_t *,
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74 uint8_t *, uint32_t *);
75static struct lpfc_iocbq *lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *,
76 struct lpfc_iocbq *);
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77static void lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *,
78 struct hbq_dmabuf *);
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79static void lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
80 struct hbq_dmabuf *dmabuf);
895427bd 81static int lpfc_sli4_fp_handle_cqe(struct lpfc_hba *, struct lpfc_queue *,
0558056c 82 struct lpfc_cqe *);
895427bd 83static int lpfc_sli4_post_sgl_list(struct lpfc_hba *, struct list_head *,
8a9d2e80 84 int);
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85static void lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba,
86 struct lpfc_eqe *eqe, uint32_t qidx);
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87static bool lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba);
88static bool lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba);
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89static int lpfc_sli4_abort_nvme_io(struct lpfc_hba *phba,
90 struct lpfc_sli_ring *pring,
91 struct lpfc_iocbq *cmdiocb);
0558056c 92
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93static IOCB_t *
94lpfc_get_iocb_from_iocbq(struct lpfc_iocbq *iocbq)
95{
96 return &iocbq->iocb;
97}
98
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99#if defined(CONFIG_64BIT) && defined(__LITTLE_ENDIAN)
100/**
101 * lpfc_sli4_pcimem_bcopy - SLI4 memory copy function
102 * @srcp: Source memory pointer.
103 * @destp: Destination memory pointer.
104 * @cnt: Number of words required to be copied.
105 * Must be a multiple of sizeof(uint64_t)
106 *
107 * This function is used for copying data between driver memory
108 * and the SLI WQ. This function also changes the endianness
109 * of each word if native endianness is different from SLI
110 * endianness. This function can be called with or without
111 * lock.
112 **/
113void
114lpfc_sli4_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
115{
116 uint64_t *src = srcp;
117 uint64_t *dest = destp;
118 int i;
119
120 for (i = 0; i < (int)cnt; i += sizeof(uint64_t))
121 *dest++ = *src++;
122}
123#else
124#define lpfc_sli4_pcimem_bcopy(a, b, c) lpfc_sli_pcimem_bcopy(a, b, c)
125#endif
126
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127/**
128 * lpfc_sli4_wq_put - Put a Work Queue Entry on an Work Queue
129 * @q: The Work Queue to operate on.
130 * @wqe: The work Queue Entry to put on the Work queue.
131 *
132 * This routine will copy the contents of @wqe to the next available entry on
133 * the @q. This function will then ring the Work Queue Doorbell to signal the
134 * HBA to start processing the Work Queue Entry. This function returns 0 if
135 * successful. If no entries are available on @q then this function will return
136 * -ENOMEM.
137 * The caller is expected to hold the hbalock when calling this routine.
138 **/
cd22d605 139static int
205e8240 140lpfc_sli4_wq_put(struct lpfc_queue *q, union lpfc_wqe128 *wqe)
4f774513 141{
2e90f4b5 142 union lpfc_wqe *temp_wqe;
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143 struct lpfc_register doorbell;
144 uint32_t host_index;
027140ea 145 uint32_t idx;
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146 uint32_t i = 0;
147 uint8_t *tmp;
5cc167dd 148 u32 if_type;
4f774513 149
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150 /* sanity check on queue memory */
151 if (unlikely(!q))
152 return -ENOMEM;
153 temp_wqe = q->qe[q->host_index].wqe;
154
4f774513 155 /* If the host has not yet processed the next entry then we are done */
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156 idx = ((q->host_index + 1) % q->entry_count);
157 if (idx == q->hba_index) {
b84daac9 158 q->WQ_overflow++;
cd22d605 159 return -EBUSY;
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160 }
161 q->WQ_posted++;
4f774513 162 /* set consumption flag every once in a while */
ff78d8f9 163 if (!((q->host_index + 1) % q->entry_repost))
f0d9bccc 164 bf_set(wqe_wqec, &wqe->generic.wqe_com, 1);
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165 else
166 bf_set(wqe_wqec, &wqe->generic.wqe_com, 0);
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167 if (q->phba->sli3_options & LPFC_SLI4_PHWQ_ENABLED)
168 bf_set(wqe_wqid, &wqe->generic.wqe_com, q->queue_id);
48f8fdb4 169 lpfc_sli4_pcimem_bcopy(wqe, temp_wqe, q->entry_size);
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170 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
171 /* write to DPP aperture taking advatage of Combined Writes */
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172 tmp = (uint8_t *)temp_wqe;
173#ifdef __raw_writeq
1351e69f 174 for (i = 0; i < q->entry_size; i += sizeof(uint64_t))
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175 __raw_writeq(*((uint64_t *)(tmp + i)),
176 q->dpp_regaddr + i);
177#else
178 for (i = 0; i < q->entry_size; i += sizeof(uint32_t))
179 __raw_writel(*((uint32_t *)(tmp + i)),
180 q->dpp_regaddr + i);
181#endif
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182 }
183 /* ensure WQE bcopy and DPP flushed before doorbell write */
6b3b3bdb 184 wmb();
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185
186 /* Update the host index before invoking device */
187 host_index = q->host_index;
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188
189 q->host_index = idx;
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190
191 /* Ring Doorbell */
192 doorbell.word0 = 0;
962bc51b 193 if (q->db_format == LPFC_DB_LIST_FORMAT) {
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194 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
195 bf_set(lpfc_if6_wq_db_list_fm_num_posted, &doorbell, 1);
196 bf_set(lpfc_if6_wq_db_list_fm_dpp, &doorbell, 1);
197 bf_set(lpfc_if6_wq_db_list_fm_dpp_id, &doorbell,
198 q->dpp_id);
199 bf_set(lpfc_if6_wq_db_list_fm_id, &doorbell,
200 q->queue_id);
201 } else {
202 bf_set(lpfc_wq_db_list_fm_num_posted, &doorbell, 1);
1351e69f 203 bf_set(lpfc_wq_db_list_fm_id, &doorbell, q->queue_id);
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204
205 /* Leave bits <23:16> clear for if_type 6 dpp */
206 if_type = bf_get(lpfc_sli_intf_if_type,
207 &q->phba->sli4_hba.sli_intf);
208 if (if_type != LPFC_SLI_INTF_IF_TYPE_6)
209 bf_set(lpfc_wq_db_list_fm_index, &doorbell,
210 host_index);
1351e69f 211 }
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212 } else if (q->db_format == LPFC_DB_RING_FORMAT) {
213 bf_set(lpfc_wq_db_ring_fm_num_posted, &doorbell, 1);
214 bf_set(lpfc_wq_db_ring_fm_id, &doorbell, q->queue_id);
215 } else {
216 return -EINVAL;
217 }
218 writel(doorbell.word0, q->db_regaddr);
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219
220 return 0;
221}
222
223/**
224 * lpfc_sli4_wq_release - Updates internal hba index for WQ
225 * @q: The Work Queue to operate on.
226 * @index: The index to advance the hba index to.
227 *
228 * This routine will update the HBA index of a queue to reflect consumption of
229 * Work Queue Entries by the HBA. When the HBA indicates that it has consumed
230 * an entry the host calls this function to update the queue's internal
231 * pointers. This routine returns the number of entries that were consumed by
232 * the HBA.
233 **/
234static uint32_t
235lpfc_sli4_wq_release(struct lpfc_queue *q, uint32_t index)
236{
237 uint32_t released = 0;
238
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239 /* sanity check on queue memory */
240 if (unlikely(!q))
241 return 0;
242
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243 if (q->hba_index == index)
244 return 0;
245 do {
246 q->hba_index = ((q->hba_index + 1) % q->entry_count);
247 released++;
248 } while (q->hba_index != index);
249 return released;
250}
251
252/**
253 * lpfc_sli4_mq_put - Put a Mailbox Queue Entry on an Mailbox Queue
254 * @q: The Mailbox Queue to operate on.
255 * @wqe: The Mailbox Queue Entry to put on the Work queue.
256 *
257 * This routine will copy the contents of @mqe to the next available entry on
258 * the @q. This function will then ring the Work Queue Doorbell to signal the
259 * HBA to start processing the Work Queue Entry. This function returns 0 if
260 * successful. If no entries are available on @q then this function will return
261 * -ENOMEM.
262 * The caller is expected to hold the hbalock when calling this routine.
263 **/
264static uint32_t
265lpfc_sli4_mq_put(struct lpfc_queue *q, struct lpfc_mqe *mqe)
266{
2e90f4b5 267 struct lpfc_mqe *temp_mqe;
4f774513 268 struct lpfc_register doorbell;
4f774513 269
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270 /* sanity check on queue memory */
271 if (unlikely(!q))
272 return -ENOMEM;
273 temp_mqe = q->qe[q->host_index].mqe;
274
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275 /* If the host has not yet processed the next entry then we are done */
276 if (((q->host_index + 1) % q->entry_count) == q->hba_index)
277 return -ENOMEM;
48f8fdb4 278 lpfc_sli4_pcimem_bcopy(mqe, temp_mqe, q->entry_size);
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279 /* Save off the mailbox pointer for completion */
280 q->phba->mbox = (MAILBOX_t *)temp_mqe;
281
282 /* Update the host index before invoking device */
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283 q->host_index = ((q->host_index + 1) % q->entry_count);
284
285 /* Ring Doorbell */
286 doorbell.word0 = 0;
287 bf_set(lpfc_mq_doorbell_num_posted, &doorbell, 1);
288 bf_set(lpfc_mq_doorbell_id, &doorbell, q->queue_id);
289 writel(doorbell.word0, q->phba->sli4_hba.MQDBregaddr);
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290 return 0;
291}
292
293/**
294 * lpfc_sli4_mq_release - Updates internal hba index for MQ
295 * @q: The Mailbox Queue to operate on.
296 *
297 * This routine will update the HBA index of a queue to reflect consumption of
298 * a Mailbox Queue Entry by the HBA. When the HBA indicates that it has consumed
299 * an entry the host calls this function to update the queue's internal
300 * pointers. This routine returns the number of entries that were consumed by
301 * the HBA.
302 **/
303static uint32_t
304lpfc_sli4_mq_release(struct lpfc_queue *q)
305{
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306 /* sanity check on queue memory */
307 if (unlikely(!q))
308 return 0;
309
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310 /* Clear the mailbox pointer for completion */
311 q->phba->mbox = NULL;
312 q->hba_index = ((q->hba_index + 1) % q->entry_count);
313 return 1;
314}
315
316/**
317 * lpfc_sli4_eq_get - Gets the next valid EQE from a EQ
318 * @q: The Event Queue to get the first valid EQE from
319 *
320 * This routine will get the first valid Event Queue Entry from @q, update
321 * the queue's internal hba index, and return the EQE. If no valid EQEs are in
322 * the Queue (no more work to do), or the Queue is full of EQEs that have been
323 * processed, but not popped back to the HBA then this routine will return NULL.
324 **/
325static struct lpfc_eqe *
326lpfc_sli4_eq_get(struct lpfc_queue *q)
327{
7365f6fd 328 struct lpfc_hba *phba;
2e90f4b5 329 struct lpfc_eqe *eqe;
027140ea 330 uint32_t idx;
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331
332 /* sanity check on queue memory */
333 if (unlikely(!q))
334 return NULL;
7365f6fd 335 phba = q->phba;
2e90f4b5 336 eqe = q->qe[q->hba_index].eqe;
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337
338 /* If the next EQE is not valid then we are done */
7365f6fd 339 if (bf_get_le32(lpfc_eqe_valid, eqe) != q->qe_valid)
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340 return NULL;
341 /* If the host has not yet processed the next entry then we are done */
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342 idx = ((q->hba_index + 1) % q->entry_count);
343 if (idx == q->host_index)
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344 return NULL;
345
027140ea 346 q->hba_index = idx;
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347 /* if the index wrapped around, toggle the valid bit */
348 if (phba->sli4_hba.pc_sli4_params.eqav && !q->hba_index)
349 q->qe_valid = (q->qe_valid) ? 0 : 1;
350
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351
352 /*
353 * insert barrier for instruction interlock : data from the hardware
354 * must have the valid bit checked before it can be copied and acted
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355 * upon. Speculative instructions were allowing a bcopy at the start
356 * of lpfc_sli4_fp_handle_wcqe(), which is called immediately
357 * after our return, to copy data before the valid bit check above
358 * was done. As such, some of the copied data was stale. The barrier
359 * ensures the check is before any data is copied.
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360 */
361 mb();
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362 return eqe;
363}
364
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365/**
366 * lpfc_sli4_eq_clr_intr - Turn off interrupts from this EQ
367 * @q: The Event Queue to disable interrupts
368 *
369 **/
b71413dd 370inline void
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371lpfc_sli4_eq_clr_intr(struct lpfc_queue *q)
372{
373 struct lpfc_register doorbell;
374
375 doorbell.word0 = 0;
376 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
377 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
378 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
379 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
380 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 381 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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382}
383
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384/**
385 * lpfc_sli4_if6_eq_clr_intr - Turn off interrupts from this EQ
386 * @q: The Event Queue to disable interrupts
387 *
388 **/
389inline void
390lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q)
391{
392 struct lpfc_register doorbell;
393
394 doorbell.word0 = 0;
395 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
396 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
397 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
398 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
399 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
400 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
401}
402
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403/**
404 * lpfc_sli4_eq_release - Indicates the host has finished processing an EQ
405 * @q: The Event Queue that the host has completed processing for.
406 * @arm: Indicates whether the host wants to arms this CQ.
407 *
408 * This routine will mark all Event Queue Entries on @q, from the last
409 * known completed entry to the last entry that was processed, as completed
410 * by clearing the valid bit for each completion queue entry. Then it will
411 * notify the HBA, by ringing the doorbell, that the EQEs have been processed.
412 * The internal host index in the @q will be updated by this routine to indicate
413 * that the host has finished processing the entries. The @arm parameter
414 * indicates that the queue should be rearmed when ringing the doorbell.
415 *
416 * This function will return the number of EQEs that were popped.
417 **/
418uint32_t
419lpfc_sli4_eq_release(struct lpfc_queue *q, bool arm)
420{
421 uint32_t released = 0;
7365f6fd 422 struct lpfc_hba *phba;
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423 struct lpfc_eqe *temp_eqe;
424 struct lpfc_register doorbell;
425
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426 /* sanity check on queue memory */
427 if (unlikely(!q))
428 return 0;
7365f6fd 429 phba = q->phba;
2e90f4b5 430
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431 /* while there are valid entries */
432 while (q->hba_index != q->host_index) {
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433 if (!phba->sli4_hba.pc_sli4_params.eqav) {
434 temp_eqe = q->qe[q->host_index].eqe;
435 bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
436 }
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437 released++;
438 q->host_index = ((q->host_index + 1) % q->entry_count);
439 }
440 if (unlikely(released == 0 && !arm))
441 return 0;
442
443 /* ring doorbell for number popped */
444 doorbell.word0 = 0;
445 if (arm) {
446 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
447 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
448 }
449 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, released);
450 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
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451 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
452 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
453 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 454 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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455 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
456 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
9dd35425 457 readl(q->phba->sli4_hba.EQDBregaddr);
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458 return released;
459}
460
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461/**
462 * lpfc_sli4_if6_eq_release - Indicates the host has finished processing an EQ
463 * @q: The Event Queue that the host has completed processing for.
464 * @arm: Indicates whether the host wants to arms this CQ.
465 *
466 * This routine will mark all Event Queue Entries on @q, from the last
467 * known completed entry to the last entry that was processed, as completed
468 * by clearing the valid bit for each completion queue entry. Then it will
469 * notify the HBA, by ringing the doorbell, that the EQEs have been processed.
470 * The internal host index in the @q will be updated by this routine to indicate
471 * that the host has finished processing the entries. The @arm parameter
472 * indicates that the queue should be rearmed when ringing the doorbell.
473 *
474 * This function will return the number of EQEs that were popped.
475 **/
476uint32_t
477lpfc_sli4_if6_eq_release(struct lpfc_queue *q, bool arm)
478{
479 uint32_t released = 0;
7365f6fd 480 struct lpfc_hba *phba;
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481 struct lpfc_eqe *temp_eqe;
482 struct lpfc_register doorbell;
483
484 /* sanity check on queue memory */
485 if (unlikely(!q))
486 return 0;
7365f6fd 487 phba = q->phba;
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488
489 /* while there are valid entries */
490 while (q->hba_index != q->host_index) {
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491 if (!phba->sli4_hba.pc_sli4_params.eqav) {
492 temp_eqe = q->qe[q->host_index].eqe;
493 bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
494 }
27d6ac0a
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495 released++;
496 q->host_index = ((q->host_index + 1) % q->entry_count);
497 }
498 if (unlikely(released == 0 && !arm))
499 return 0;
500
501 /* ring doorbell for number popped */
502 doorbell.word0 = 0;
503 if (arm)
504 bf_set(lpfc_if6_eq_doorbell_arm, &doorbell, 1);
505 bf_set(lpfc_if6_eq_doorbell_num_released, &doorbell, released);
506 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
507 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
508 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
509 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
510 readl(q->phba->sli4_hba.EQDBregaddr);
511 return released;
512}
513
4f774513
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514/**
515 * lpfc_sli4_cq_get - Gets the next valid CQE from a CQ
516 * @q: The Completion Queue to get the first valid CQE from
517 *
518 * This routine will get the first valid Completion Queue Entry from @q, update
519 * the queue's internal hba index, and return the CQE. If no valid CQEs are in
520 * the Queue (no more work to do), or the Queue is full of CQEs that have been
521 * processed, but not popped back to the HBA then this routine will return NULL.
522 **/
523static struct lpfc_cqe *
524lpfc_sli4_cq_get(struct lpfc_queue *q)
525{
7365f6fd 526 struct lpfc_hba *phba;
4f774513 527 struct lpfc_cqe *cqe;
027140ea 528 uint32_t idx;
4f774513 529
2e90f4b5
JS
530 /* sanity check on queue memory */
531 if (unlikely(!q))
532 return NULL;
7365f6fd
JS
533 phba = q->phba;
534 cqe = q->qe[q->hba_index].cqe;
2e90f4b5 535
4f774513 536 /* If the next CQE is not valid then we are done */
7365f6fd 537 if (bf_get_le32(lpfc_cqe_valid, cqe) != q->qe_valid)
4f774513
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538 return NULL;
539 /* If the host has not yet processed the next entry then we are done */
027140ea
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540 idx = ((q->hba_index + 1) % q->entry_count);
541 if (idx == q->host_index)
4f774513
JS
542 return NULL;
543
027140ea 544 q->hba_index = idx;
7365f6fd
JS
545 /* if the index wrapped around, toggle the valid bit */
546 if (phba->sli4_hba.pc_sli4_params.cqav && !q->hba_index)
547 q->qe_valid = (q->qe_valid) ? 0 : 1;
27f344eb
JS
548
549 /*
550 * insert barrier for instruction interlock : data from the hardware
551 * must have the valid bit checked before it can be copied and acted
2ea259ee
JS
552 * upon. Given what was seen in lpfc_sli4_cq_get() of speculative
553 * instructions allowing action on content before valid bit checked,
554 * add barrier here as well. May not be needed as "content" is a
555 * single 32-bit entity here (vs multi word structure for cq's).
27f344eb
JS
556 */
557 mb();
4f774513
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558 return cqe;
559}
560
561/**
562 * lpfc_sli4_cq_release - Indicates the host has finished processing a CQ
563 * @q: The Completion Queue that the host has completed processing for.
564 * @arm: Indicates whether the host wants to arms this CQ.
565 *
566 * This routine will mark all Completion queue entries on @q, from the last
567 * known completed entry to the last entry that was processed, as completed
568 * by clearing the valid bit for each completion queue entry. Then it will
569 * notify the HBA, by ringing the doorbell, that the CQEs have been processed.
570 * The internal host index in the @q will be updated by this routine to indicate
571 * that the host has finished processing the entries. The @arm parameter
572 * indicates that the queue should be rearmed when ringing the doorbell.
573 *
574 * This function will return the number of CQEs that were released.
575 **/
576uint32_t
577lpfc_sli4_cq_release(struct lpfc_queue *q, bool arm)
578{
579 uint32_t released = 0;
7365f6fd 580 struct lpfc_hba *phba;
4f774513
JS
581 struct lpfc_cqe *temp_qe;
582 struct lpfc_register doorbell;
583
2e90f4b5
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584 /* sanity check on queue memory */
585 if (unlikely(!q))
586 return 0;
7365f6fd
JS
587 phba = q->phba;
588
4f774513
JS
589 /* while there are valid entries */
590 while (q->hba_index != q->host_index) {
7365f6fd
JS
591 if (!phba->sli4_hba.pc_sli4_params.cqav) {
592 temp_qe = q->qe[q->host_index].cqe;
593 bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
594 }
4f774513
JS
595 released++;
596 q->host_index = ((q->host_index + 1) % q->entry_count);
597 }
598 if (unlikely(released == 0 && !arm))
599 return 0;
600
601 /* ring doorbell for number popped */
602 doorbell.word0 = 0;
603 if (arm)
604 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
605 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, released);
606 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_COMPLETION);
6b5151fd
JS
607 bf_set(lpfc_eqcq_doorbell_cqid_hi, &doorbell,
608 (q->queue_id >> LPFC_CQID_HI_FIELD_SHIFT));
609 bf_set(lpfc_eqcq_doorbell_cqid_lo, &doorbell, q->queue_id);
9dd35425 610 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
4f774513
JS
611 return released;
612}
613
27d6ac0a
JS
614/**
615 * lpfc_sli4_if6_cq_release - Indicates the host has finished processing a CQ
616 * @q: The Completion Queue that the host has completed processing for.
617 * @arm: Indicates whether the host wants to arms this CQ.
618 *
619 * This routine will mark all Completion queue entries on @q, from the last
620 * known completed entry to the last entry that was processed, as completed
621 * by clearing the valid bit for each completion queue entry. Then it will
622 * notify the HBA, by ringing the doorbell, that the CQEs have been processed.
623 * The internal host index in the @q will be updated by this routine to indicate
624 * that the host has finished processing the entries. The @arm parameter
625 * indicates that the queue should be rearmed when ringing the doorbell.
626 *
627 * This function will return the number of CQEs that were released.
628 **/
629uint32_t
630lpfc_sli4_if6_cq_release(struct lpfc_queue *q, bool arm)
631{
632 uint32_t released = 0;
7365f6fd 633 struct lpfc_hba *phba;
27d6ac0a
JS
634 struct lpfc_cqe *temp_qe;
635 struct lpfc_register doorbell;
636
637 /* sanity check on queue memory */
638 if (unlikely(!q))
639 return 0;
7365f6fd
JS
640 phba = q->phba;
641
27d6ac0a
JS
642 /* while there are valid entries */
643 while (q->hba_index != q->host_index) {
7365f6fd
JS
644 if (!phba->sli4_hba.pc_sli4_params.cqav) {
645 temp_qe = q->qe[q->host_index].cqe;
646 bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
647 }
27d6ac0a
JS
648 released++;
649 q->host_index = ((q->host_index + 1) % q->entry_count);
650 }
651 if (unlikely(released == 0 && !arm))
652 return 0;
653
654 /* ring doorbell for number popped */
655 doorbell.word0 = 0;
656 if (arm)
657 bf_set(lpfc_if6_cq_doorbell_arm, &doorbell, 1);
658 bf_set(lpfc_if6_cq_doorbell_num_released, &doorbell, released);
659 bf_set(lpfc_if6_cq_doorbell_cqid, &doorbell, q->queue_id);
660 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
661 return released;
662}
663
4f774513
JS
664/**
665 * lpfc_sli4_rq_put - Put a Receive Buffer Queue Entry on a Receive Queue
666 * @q: The Header Receive Queue to operate on.
667 * @wqe: The Receive Queue Entry to put on the Receive queue.
668 *
669 * This routine will copy the contents of @wqe to the next available entry on
670 * the @q. This function will then ring the Receive Queue Doorbell to signal the
671 * HBA to start processing the Receive Queue Entry. This function returns the
672 * index that the rqe was copied to if successful. If no entries are available
673 * on @q then this function will return -ENOMEM.
674 * The caller is expected to hold the hbalock when calling this routine.
675 **/
895427bd 676int
4f774513
JS
677lpfc_sli4_rq_put(struct lpfc_queue *hq, struct lpfc_queue *dq,
678 struct lpfc_rqe *hrqe, struct lpfc_rqe *drqe)
679{
2e90f4b5
JS
680 struct lpfc_rqe *temp_hrqe;
681 struct lpfc_rqe *temp_drqe;
4f774513 682 struct lpfc_register doorbell;
cbc5de1b
JS
683 int hq_put_index;
684 int dq_put_index;
4f774513 685
2e90f4b5
JS
686 /* sanity check on queue memory */
687 if (unlikely(!hq) || unlikely(!dq))
688 return -ENOMEM;
cbc5de1b
JS
689 hq_put_index = hq->host_index;
690 dq_put_index = dq->host_index;
691 temp_hrqe = hq->qe[hq_put_index].rqe;
692 temp_drqe = dq->qe[dq_put_index].rqe;
2e90f4b5 693
4f774513
JS
694 if (hq->type != LPFC_HRQ || dq->type != LPFC_DRQ)
695 return -EINVAL;
cbc5de1b 696 if (hq_put_index != dq_put_index)
4f774513
JS
697 return -EINVAL;
698 /* If the host has not yet processed the next entry then we are done */
cbc5de1b 699 if (((hq_put_index + 1) % hq->entry_count) == hq->hba_index)
4f774513 700 return -EBUSY;
48f8fdb4
JS
701 lpfc_sli4_pcimem_bcopy(hrqe, temp_hrqe, hq->entry_size);
702 lpfc_sli4_pcimem_bcopy(drqe, temp_drqe, dq->entry_size);
4f774513
JS
703
704 /* Update the host index to point to the next slot */
cbc5de1b
JS
705 hq->host_index = ((hq_put_index + 1) % hq->entry_count);
706 dq->host_index = ((dq_put_index + 1) % dq->entry_count);
61f3d4bf 707 hq->RQ_buf_posted++;
4f774513
JS
708
709 /* Ring The Header Receive Queue Doorbell */
73d91e50 710 if (!(hq->host_index % hq->entry_repost)) {
4f774513 711 doorbell.word0 = 0;
962bc51b
JS
712 if (hq->db_format == LPFC_DB_RING_FORMAT) {
713 bf_set(lpfc_rq_db_ring_fm_num_posted, &doorbell,
714 hq->entry_repost);
715 bf_set(lpfc_rq_db_ring_fm_id, &doorbell, hq->queue_id);
716 } else if (hq->db_format == LPFC_DB_LIST_FORMAT) {
717 bf_set(lpfc_rq_db_list_fm_num_posted, &doorbell,
718 hq->entry_repost);
719 bf_set(lpfc_rq_db_list_fm_index, &doorbell,
720 hq->host_index);
721 bf_set(lpfc_rq_db_list_fm_id, &doorbell, hq->queue_id);
722 } else {
723 return -EINVAL;
724 }
725 writel(doorbell.word0, hq->db_regaddr);
4f774513 726 }
cbc5de1b 727 return hq_put_index;
4f774513
JS
728}
729
730/**
731 * lpfc_sli4_rq_release - Updates internal hba index for RQ
732 * @q: The Header Receive Queue to operate on.
733 *
734 * This routine will update the HBA index of a queue to reflect consumption of
735 * one Receive Queue Entry by the HBA. When the HBA indicates that it has
736 * consumed an entry the host calls this function to update the queue's
737 * internal pointers. This routine returns the number of entries that were
738 * consumed by the HBA.
739 **/
740static uint32_t
741lpfc_sli4_rq_release(struct lpfc_queue *hq, struct lpfc_queue *dq)
742{
2e90f4b5
JS
743 /* sanity check on queue memory */
744 if (unlikely(!hq) || unlikely(!dq))
745 return 0;
746
4f774513
JS
747 if ((hq->type != LPFC_HRQ) || (dq->type != LPFC_DRQ))
748 return 0;
749 hq->hba_index = ((hq->hba_index + 1) % hq->entry_count);
750 dq->hba_index = ((dq->hba_index + 1) % dq->entry_count);
751 return 1;
752}
753
e59058c4 754/**
3621a710 755 * lpfc_cmd_iocb - Get next command iocb entry in the ring
e59058c4
JS
756 * @phba: Pointer to HBA context object.
757 * @pring: Pointer to driver SLI ring object.
758 *
759 * This function returns pointer to next command iocb entry
760 * in the command ring. The caller must hold hbalock to prevent
761 * other threads consume the next command iocb.
762 * SLI-2/SLI-3 provide different sized iocbs.
763 **/
ed957684
JS
764static inline IOCB_t *
765lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
766{
7e56aa25
JS
767 return (IOCB_t *) (((char *) pring->sli.sli3.cmdringaddr) +
768 pring->sli.sli3.cmdidx * phba->iocb_cmd_size);
ed957684
JS
769}
770
e59058c4 771/**
3621a710 772 * lpfc_resp_iocb - Get next response iocb entry in the ring
e59058c4
JS
773 * @phba: Pointer to HBA context object.
774 * @pring: Pointer to driver SLI ring object.
775 *
776 * This function returns pointer to next response iocb entry
777 * in the response ring. The caller must hold hbalock to make sure
778 * that no other thread consume the next response iocb.
779 * SLI-2/SLI-3 provide different sized iocbs.
780 **/
ed957684
JS
781static inline IOCB_t *
782lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
783{
7e56aa25
JS
784 return (IOCB_t *) (((char *) pring->sli.sli3.rspringaddr) +
785 pring->sli.sli3.rspidx * phba->iocb_rsp_size);
ed957684
JS
786}
787
e59058c4 788/**
3621a710 789 * __lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
790 * @phba: Pointer to HBA context object.
791 *
792 * This function is called with hbalock held. This function
793 * allocates a new driver iocb object from the iocb pool. If the
794 * allocation is successful, it returns pointer to the newly
795 * allocated iocb object else it returns NULL.
796 **/
4f2e66c6 797struct lpfc_iocbq *
2e0fef85 798__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC
799{
800 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
801 struct lpfc_iocbq * iocbq = NULL;
802
1c2ba475
JT
803 lockdep_assert_held(&phba->hbalock);
804
0bd4ca25 805 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
2a9bf3d0
JS
806 if (iocbq)
807 phba->iocb_cnt++;
808 if (phba->iocb_cnt > phba->iocb_max)
809 phba->iocb_max = phba->iocb_cnt;
0bd4ca25
JSEC
810 return iocbq;
811}
812
da0436e9
JS
813/**
814 * __lpfc_clear_active_sglq - Remove the active sglq for this XRI.
815 * @phba: Pointer to HBA context object.
816 * @xritag: XRI value.
817 *
818 * This function clears the sglq pointer from the array of acive
819 * sglq's. The xritag that is passed in is used to index into the
820 * array. Before the xritag can be used it needs to be adjusted
821 * by subtracting the xribase.
822 *
823 * Returns sglq ponter = success, NULL = Failure.
824 **/
895427bd 825struct lpfc_sglq *
da0436e9
JS
826__lpfc_clear_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
827{
da0436e9 828 struct lpfc_sglq *sglq;
6d368e53
JS
829
830 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
831 phba->sli4_hba.lpfc_sglq_active_list[xritag] = NULL;
da0436e9
JS
832 return sglq;
833}
834
835/**
836 * __lpfc_get_active_sglq - Get the active sglq for this XRI.
837 * @phba: Pointer to HBA context object.
838 * @xritag: XRI value.
839 *
840 * This function returns the sglq pointer from the array of acive
841 * sglq's. The xritag that is passed in is used to index into the
842 * array. Before the xritag can be used it needs to be adjusted
843 * by subtracting the xribase.
844 *
845 * Returns sglq ponter = success, NULL = Failure.
846 **/
0f65ff68 847struct lpfc_sglq *
da0436e9
JS
848__lpfc_get_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
849{
da0436e9 850 struct lpfc_sglq *sglq;
6d368e53
JS
851
852 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
da0436e9
JS
853 return sglq;
854}
855
19ca7609 856/**
1151e3ec 857 * lpfc_clr_rrq_active - Clears RRQ active bit in xri_bitmap.
19ca7609
JS
858 * @phba: Pointer to HBA context object.
859 * @xritag: xri used in this exchange.
860 * @rrq: The RRQ to be cleared.
861 *
19ca7609 862 **/
1151e3ec
JS
863void
864lpfc_clr_rrq_active(struct lpfc_hba *phba,
865 uint16_t xritag,
866 struct lpfc_node_rrq *rrq)
19ca7609 867{
1151e3ec 868 struct lpfc_nodelist *ndlp = NULL;
19ca7609 869
1151e3ec
JS
870 if ((rrq->vport) && NLP_CHK_NODE_ACT(rrq->ndlp))
871 ndlp = lpfc_findnode_did(rrq->vport, rrq->nlp_DID);
19ca7609
JS
872
873 /* The target DID could have been swapped (cable swap)
874 * we should use the ndlp from the findnode if it is
875 * available.
876 */
1151e3ec 877 if ((!ndlp) && rrq->ndlp)
19ca7609
JS
878 ndlp = rrq->ndlp;
879
1151e3ec
JS
880 if (!ndlp)
881 goto out;
882
cff261f6 883 if (test_and_clear_bit(xritag, ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
884 rrq->send_rrq = 0;
885 rrq->xritag = 0;
886 rrq->rrq_stop_time = 0;
887 }
1151e3ec 888out:
19ca7609
JS
889 mempool_free(rrq, phba->rrq_pool);
890}
891
892/**
893 * lpfc_handle_rrq_active - Checks if RRQ has waithed RATOV.
894 * @phba: Pointer to HBA context object.
895 *
896 * This function is called with hbalock held. This function
897 * Checks if stop_time (ratov from setting rrq active) has
898 * been reached, if it has and the send_rrq flag is set then
899 * it will call lpfc_send_rrq. If the send_rrq flag is not set
900 * then it will just call the routine to clear the rrq and
901 * free the rrq resource.
902 * The timer is set to the next rrq that is going to expire before
903 * leaving the routine.
904 *
905 **/
906void
907lpfc_handle_rrq_active(struct lpfc_hba *phba)
908{
909 struct lpfc_node_rrq *rrq;
910 struct lpfc_node_rrq *nextrrq;
911 unsigned long next_time;
912 unsigned long iflags;
1151e3ec 913 LIST_HEAD(send_rrq);
19ca7609
JS
914
915 spin_lock_irqsave(&phba->hbalock, iflags);
916 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
256ec0d0 917 next_time = jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
19ca7609 918 list_for_each_entry_safe(rrq, nextrrq,
1151e3ec
JS
919 &phba->active_rrq_list, list) {
920 if (time_after(jiffies, rrq->rrq_stop_time))
921 list_move(&rrq->list, &send_rrq);
922 else if (time_before(rrq->rrq_stop_time, next_time))
19ca7609
JS
923 next_time = rrq->rrq_stop_time;
924 }
925 spin_unlock_irqrestore(&phba->hbalock, iflags);
06918ac5
JS
926 if ((!list_empty(&phba->active_rrq_list)) &&
927 (!(phba->pport->load_flag & FC_UNLOADING)))
19ca7609 928 mod_timer(&phba->rrq_tmr, next_time);
1151e3ec
JS
929 list_for_each_entry_safe(rrq, nextrrq, &send_rrq, list) {
930 list_del(&rrq->list);
931 if (!rrq->send_rrq)
932 /* this call will free the rrq */
933 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
934 else if (lpfc_send_rrq(phba, rrq)) {
935 /* if we send the rrq then the completion handler
936 * will clear the bit in the xribitmap.
937 */
938 lpfc_clr_rrq_active(phba, rrq->xritag,
939 rrq);
940 }
941 }
19ca7609
JS
942}
943
944/**
945 * lpfc_get_active_rrq - Get the active RRQ for this exchange.
946 * @vport: Pointer to vport context object.
947 * @xri: The xri used in the exchange.
948 * @did: The targets DID for this exchange.
949 *
950 * returns NULL = rrq not found in the phba->active_rrq_list.
951 * rrq = rrq for this xri and target.
952 **/
953struct lpfc_node_rrq *
954lpfc_get_active_rrq(struct lpfc_vport *vport, uint16_t xri, uint32_t did)
955{
956 struct lpfc_hba *phba = vport->phba;
957 struct lpfc_node_rrq *rrq;
958 struct lpfc_node_rrq *nextrrq;
959 unsigned long iflags;
960
961 if (phba->sli_rev != LPFC_SLI_REV4)
962 return NULL;
963 spin_lock_irqsave(&phba->hbalock, iflags);
964 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list) {
965 if (rrq->vport == vport && rrq->xritag == xri &&
966 rrq->nlp_DID == did){
967 list_del(&rrq->list);
968 spin_unlock_irqrestore(&phba->hbalock, iflags);
969 return rrq;
970 }
971 }
972 spin_unlock_irqrestore(&phba->hbalock, iflags);
973 return NULL;
974}
975
976/**
977 * lpfc_cleanup_vports_rrqs - Remove and clear the active RRQ for this vport.
978 * @vport: Pointer to vport context object.
1151e3ec
JS
979 * @ndlp: Pointer to the lpfc_node_list structure.
980 * If ndlp is NULL Remove all active RRQs for this vport from the
981 * phba->active_rrq_list and clear the rrq.
982 * If ndlp is not NULL then only remove rrqs for this vport & this ndlp.
19ca7609
JS
983 **/
984void
1151e3ec 985lpfc_cleanup_vports_rrqs(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
19ca7609
JS
986
987{
988 struct lpfc_hba *phba = vport->phba;
989 struct lpfc_node_rrq *rrq;
990 struct lpfc_node_rrq *nextrrq;
991 unsigned long iflags;
1151e3ec 992 LIST_HEAD(rrq_list);
19ca7609
JS
993
994 if (phba->sli_rev != LPFC_SLI_REV4)
995 return;
1151e3ec
JS
996 if (!ndlp) {
997 lpfc_sli4_vport_delete_els_xri_aborted(vport);
998 lpfc_sli4_vport_delete_fcp_xri_aborted(vport);
19ca7609 999 }
1151e3ec
JS
1000 spin_lock_irqsave(&phba->hbalock, iflags);
1001 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list)
1002 if ((rrq->vport == vport) && (!ndlp || rrq->ndlp == ndlp))
1003 list_move(&rrq->list, &rrq_list);
19ca7609 1004 spin_unlock_irqrestore(&phba->hbalock, iflags);
1151e3ec
JS
1005
1006 list_for_each_entry_safe(rrq, nextrrq, &rrq_list, list) {
1007 list_del(&rrq->list);
1008 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
1009 }
19ca7609
JS
1010}
1011
19ca7609 1012/**
1151e3ec 1013 * lpfc_test_rrq_active - Test RRQ bit in xri_bitmap.
19ca7609
JS
1014 * @phba: Pointer to HBA context object.
1015 * @ndlp: Targets nodelist pointer for this exchange.
1016 * @xritag the xri in the bitmap to test.
1017 *
1018 * This function is called with hbalock held. This function
1019 * returns 0 = rrq not active for this xri
1020 * 1 = rrq is valid for this xri.
1021 **/
1151e3ec
JS
1022int
1023lpfc_test_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
19ca7609
JS
1024 uint16_t xritag)
1025{
1c2ba475 1026 lockdep_assert_held(&phba->hbalock);
19ca7609
JS
1027 if (!ndlp)
1028 return 0;
cff261f6
JS
1029 if (!ndlp->active_rrqs_xri_bitmap)
1030 return 0;
1031 if (test_bit(xritag, ndlp->active_rrqs_xri_bitmap))
19ca7609
JS
1032 return 1;
1033 else
1034 return 0;
1035}
1036
1037/**
1038 * lpfc_set_rrq_active - set RRQ active bit in xri_bitmap.
1039 * @phba: Pointer to HBA context object.
1040 * @ndlp: nodelist pointer for this target.
1041 * @xritag: xri used in this exchange.
1042 * @rxid: Remote Exchange ID.
1043 * @send_rrq: Flag used to determine if we should send rrq els cmd.
1044 *
1045 * This function takes the hbalock.
1046 * The active bit is always set in the active rrq xri_bitmap even
1047 * if there is no slot avaiable for the other rrq information.
1048 *
1049 * returns 0 rrq actived for this xri
1050 * < 0 No memory or invalid ndlp.
1051 **/
1052int
1053lpfc_set_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
b42c07c8 1054 uint16_t xritag, uint16_t rxid, uint16_t send_rrq)
19ca7609 1055{
19ca7609 1056 unsigned long iflags;
b42c07c8
JS
1057 struct lpfc_node_rrq *rrq;
1058 int empty;
1059
1060 if (!ndlp)
1061 return -EINVAL;
1062
1063 if (!phba->cfg_enable_rrq)
1064 return -EINVAL;
19ca7609
JS
1065
1066 spin_lock_irqsave(&phba->hbalock, iflags);
b42c07c8
JS
1067 if (phba->pport->load_flag & FC_UNLOADING) {
1068 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
1069 goto out;
1070 }
1071
1072 /*
1073 * set the active bit even if there is no mem available.
1074 */
1075 if (NLP_CHK_FREE_REQ(ndlp))
1076 goto out;
1077
1078 if (ndlp->vport && (ndlp->vport->load_flag & FC_UNLOADING))
1079 goto out;
1080
cff261f6
JS
1081 if (!ndlp->active_rrqs_xri_bitmap)
1082 goto out;
1083
1084 if (test_and_set_bit(xritag, ndlp->active_rrqs_xri_bitmap))
b42c07c8
JS
1085 goto out;
1086
19ca7609 1087 spin_unlock_irqrestore(&phba->hbalock, iflags);
b42c07c8
JS
1088 rrq = mempool_alloc(phba->rrq_pool, GFP_KERNEL);
1089 if (!rrq) {
1090 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1091 "3155 Unable to allocate RRQ xri:0x%x rxid:0x%x"
1092 " DID:0x%x Send:%d\n",
1093 xritag, rxid, ndlp->nlp_DID, send_rrq);
1094 return -EINVAL;
1095 }
e5771b4d
JS
1096 if (phba->cfg_enable_rrq == 1)
1097 rrq->send_rrq = send_rrq;
1098 else
1099 rrq->send_rrq = 0;
b42c07c8 1100 rrq->xritag = xritag;
256ec0d0
JS
1101 rrq->rrq_stop_time = jiffies +
1102 msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
b42c07c8
JS
1103 rrq->ndlp = ndlp;
1104 rrq->nlp_DID = ndlp->nlp_DID;
1105 rrq->vport = ndlp->vport;
1106 rrq->rxid = rxid;
b42c07c8
JS
1107 spin_lock_irqsave(&phba->hbalock, iflags);
1108 empty = list_empty(&phba->active_rrq_list);
1109 list_add_tail(&rrq->list, &phba->active_rrq_list);
1110 phba->hba_flag |= HBA_RRQ_ACTIVE;
1111 if (empty)
1112 lpfc_worker_wake_up(phba);
1113 spin_unlock_irqrestore(&phba->hbalock, iflags);
1114 return 0;
1115out:
1116 spin_unlock_irqrestore(&phba->hbalock, iflags);
1117 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1118 "2921 Can't set rrq active xri:0x%x rxid:0x%x"
1119 " DID:0x%x Send:%d\n",
1120 xritag, rxid, ndlp->nlp_DID, send_rrq);
1121 return -EINVAL;
19ca7609
JS
1122}
1123
da0436e9 1124/**
895427bd 1125 * __lpfc_sli_get_els_sglq - Allocates an iocb object from sgl pool
da0436e9 1126 * @phba: Pointer to HBA context object.
19ca7609 1127 * @piocb: Pointer to the iocbq.
da0436e9 1128 *
dafe8cea 1129 * This function is called with the ring lock held. This function
6d368e53 1130 * gets a new driver sglq object from the sglq list. If the
da0436e9
JS
1131 * list is not empty then it is successful, it returns pointer to the newly
1132 * allocated sglq object else it returns NULL.
1133 **/
1134static struct lpfc_sglq *
895427bd 1135__lpfc_sli_get_els_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
da0436e9 1136{
895427bd 1137 struct list_head *lpfc_els_sgl_list = &phba->sli4_hba.lpfc_els_sgl_list;
da0436e9 1138 struct lpfc_sglq *sglq = NULL;
19ca7609 1139 struct lpfc_sglq *start_sglq = NULL;
19ca7609
JS
1140 struct lpfc_scsi_buf *lpfc_cmd;
1141 struct lpfc_nodelist *ndlp;
1142 int found = 0;
1143
1c2ba475
JT
1144 lockdep_assert_held(&phba->hbalock);
1145
19ca7609
JS
1146 if (piocbq->iocb_flag & LPFC_IO_FCP) {
1147 lpfc_cmd = (struct lpfc_scsi_buf *) piocbq->context1;
1148 ndlp = lpfc_cmd->rdata->pnode;
be858b65 1149 } else if ((piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) &&
6c7cf486 1150 !(piocbq->iocb_flag & LPFC_IO_LIBDFC)) {
19ca7609 1151 ndlp = piocbq->context_un.ndlp;
6c7cf486
JS
1152 } else if (piocbq->iocb_flag & LPFC_IO_LIBDFC) {
1153 if (piocbq->iocb_flag & LPFC_IO_LOOPBACK)
1154 ndlp = NULL;
1155 else
1156 ndlp = piocbq->context_un.ndlp;
1157 } else {
19ca7609 1158 ndlp = piocbq->context1;
6c7cf486 1159 }
19ca7609 1160
895427bd
JS
1161 spin_lock(&phba->sli4_hba.sgl_list_lock);
1162 list_remove_head(lpfc_els_sgl_list, sglq, struct lpfc_sglq, list);
19ca7609
JS
1163 start_sglq = sglq;
1164 while (!found) {
1165 if (!sglq)
d11f54b7 1166 break;
895427bd
JS
1167 if (ndlp && ndlp->active_rrqs_xri_bitmap &&
1168 test_bit(sglq->sli4_lxritag,
1169 ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
1170 /* This xri has an rrq outstanding for this DID.
1171 * put it back in the list and get another xri.
1172 */
895427bd 1173 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609 1174 sglq = NULL;
895427bd 1175 list_remove_head(lpfc_els_sgl_list, sglq,
19ca7609
JS
1176 struct lpfc_sglq, list);
1177 if (sglq == start_sglq) {
14041bd1 1178 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609
JS
1179 sglq = NULL;
1180 break;
1181 } else
1182 continue;
1183 }
1184 sglq->ndlp = ndlp;
1185 found = 1;
6d368e53 1186 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
19ca7609
JS
1187 sglq->state = SGL_ALLOCATED;
1188 }
895427bd 1189 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1190 return sglq;
1191}
1192
f358dd0c
JS
1193/**
1194 * __lpfc_sli_get_nvmet_sglq - Allocates an iocb object from sgl pool
1195 * @phba: Pointer to HBA context object.
1196 * @piocb: Pointer to the iocbq.
1197 *
1198 * This function is called with the sgl_list lock held. This function
1199 * gets a new driver sglq object from the sglq list. If the
1200 * list is not empty then it is successful, it returns pointer to the newly
1201 * allocated sglq object else it returns NULL.
1202 **/
1203struct lpfc_sglq *
1204__lpfc_sli_get_nvmet_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
1205{
1206 struct list_head *lpfc_nvmet_sgl_list;
1207 struct lpfc_sglq *sglq = NULL;
1208
1209 lpfc_nvmet_sgl_list = &phba->sli4_hba.lpfc_nvmet_sgl_list;
1210
1211 lockdep_assert_held(&phba->sli4_hba.sgl_list_lock);
1212
1213 list_remove_head(lpfc_nvmet_sgl_list, sglq, struct lpfc_sglq, list);
1214 if (!sglq)
1215 return NULL;
1216 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
1217 sglq->state = SGL_ALLOCATED;
da0436e9
JS
1218 return sglq;
1219}
1220
e59058c4 1221/**
3621a710 1222 * lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
1223 * @phba: Pointer to HBA context object.
1224 *
1225 * This function is called with no lock held. This function
1226 * allocates a new driver iocb object from the iocb pool. If the
1227 * allocation is successful, it returns pointer to the newly
1228 * allocated iocb object else it returns NULL.
1229 **/
2e0fef85
JS
1230struct lpfc_iocbq *
1231lpfc_sli_get_iocbq(struct lpfc_hba *phba)
1232{
1233 struct lpfc_iocbq * iocbq = NULL;
1234 unsigned long iflags;
1235
1236 spin_lock_irqsave(&phba->hbalock, iflags);
1237 iocbq = __lpfc_sli_get_iocbq(phba);
1238 spin_unlock_irqrestore(&phba->hbalock, iflags);
1239 return iocbq;
1240}
1241
4f774513
JS
1242/**
1243 * __lpfc_sli_release_iocbq_s4 - Release iocb to the iocb pool
1244 * @phba: Pointer to HBA context object.
1245 * @iocbq: Pointer to driver iocb object.
1246 *
1247 * This function is called with hbalock held to release driver
1248 * iocb object to the iocb pool. The iotag in the iocb object
1249 * does not change for each use of the iocb object. This function
1250 * clears all other fields of the iocb object when it is freed.
1251 * The sqlq structure that holds the xritag and phys and virtual
1252 * mappings for the scatter gather list is retrieved from the
1253 * active array of sglq. The get of the sglq pointer also clears
1254 * the entry in the array. If the status of the IO indiactes that
1255 * this IO was aborted then the sglq entry it put on the
1256 * lpfc_abts_els_sgl_list until the CQ_ABORTED_XRI is received. If the
1257 * IO has good status or fails for any other reason then the sglq
895427bd 1258 * entry is added to the free list (lpfc_els_sgl_list).
4f774513
JS
1259 **/
1260static void
1261__lpfc_sli_release_iocbq_s4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1262{
1263 struct lpfc_sglq *sglq;
1264 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
2a9bf3d0 1265 unsigned long iflag = 0;
895427bd 1266 struct lpfc_sli_ring *pring;
4f774513 1267
1c2ba475
JT
1268 lockdep_assert_held(&phba->hbalock);
1269
4f774513
JS
1270 if (iocbq->sli4_xritag == NO_XRI)
1271 sglq = NULL;
1272 else
6d368e53
JS
1273 sglq = __lpfc_clear_active_sglq(phba, iocbq->sli4_lxritag);
1274
0e9bb8d7 1275
4f774513 1276 if (sglq) {
f358dd0c
JS
1277 if (iocbq->iocb_flag & LPFC_IO_NVMET) {
1278 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1279 iflag);
1280 sglq->state = SGL_FREED;
1281 sglq->ndlp = NULL;
1282 list_add_tail(&sglq->list,
1283 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1284 spin_unlock_irqrestore(
1285 &phba->sli4_hba.sgl_list_lock, iflag);
1286 goto out;
1287 }
1288
895427bd 1289 pring = phba->sli4_hba.els_wq->pring;
0f65ff68
JS
1290 if ((iocbq->iocb_flag & LPFC_EXCHANGE_BUSY) &&
1291 (sglq->state != SGL_XRI_ABORTED)) {
895427bd
JS
1292 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1293 iflag);
4f774513 1294 list_add(&sglq->list,
895427bd 1295 &phba->sli4_hba.lpfc_abts_els_sgl_list);
4f774513 1296 spin_unlock_irqrestore(
895427bd 1297 &phba->sli4_hba.sgl_list_lock, iflag);
0f65ff68 1298 } else {
895427bd
JS
1299 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1300 iflag);
0f65ff68 1301 sglq->state = SGL_FREED;
19ca7609 1302 sglq->ndlp = NULL;
fedd3b7b 1303 list_add_tail(&sglq->list,
895427bd
JS
1304 &phba->sli4_hba.lpfc_els_sgl_list);
1305 spin_unlock_irqrestore(
1306 &phba->sli4_hba.sgl_list_lock, iflag);
2a9bf3d0
JS
1307
1308 /* Check if TXQ queue needs to be serviced */
0e9bb8d7 1309 if (!list_empty(&pring->txq))
2a9bf3d0 1310 lpfc_worker_wake_up(phba);
0f65ff68 1311 }
4f774513
JS
1312 }
1313
f358dd0c 1314out:
4f774513
JS
1315 /*
1316 * Clean all volatile data fields, preserve iotag and node struct.
1317 */
1318 memset((char *)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
6d368e53 1319 iocbq->sli4_lxritag = NO_XRI;
4f774513 1320 iocbq->sli4_xritag = NO_XRI;
f358dd0c
JS
1321 iocbq->iocb_flag &= ~(LPFC_IO_NVME | LPFC_IO_NVMET |
1322 LPFC_IO_NVME_LS);
4f774513
JS
1323 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1324}
1325
2a9bf3d0 1326
e59058c4 1327/**
3772a991 1328 * __lpfc_sli_release_iocbq_s3 - Release iocb to the iocb pool
e59058c4
JS
1329 * @phba: Pointer to HBA context object.
1330 * @iocbq: Pointer to driver iocb object.
1331 *
1332 * This function is called with hbalock held to release driver
1333 * iocb object to the iocb pool. The iotag in the iocb object
1334 * does not change for each use of the iocb object. This function
1335 * clears all other fields of the iocb object when it is freed.
1336 **/
a6ababd2 1337static void
3772a991 1338__lpfc_sli_release_iocbq_s3(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 1339{
2e0fef85 1340 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30 1341
1c2ba475 1342 lockdep_assert_held(&phba->hbalock);
0e9bb8d7 1343
604a3e30
JB
1344 /*
1345 * Clean all volatile data fields, preserve iotag and node struct.
1346 */
1347 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
3772a991 1348 iocbq->sli4_xritag = NO_XRI;
604a3e30
JB
1349 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1350}
1351
3772a991
JS
1352/**
1353 * __lpfc_sli_release_iocbq - Release iocb to the iocb pool
1354 * @phba: Pointer to HBA context object.
1355 * @iocbq: Pointer to driver iocb object.
1356 *
1357 * This function is called with hbalock held to release driver
1358 * iocb object to the iocb pool. The iotag in the iocb object
1359 * does not change for each use of the iocb object. This function
1360 * clears all other fields of the iocb object when it is freed.
1361 **/
1362static void
1363__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1364{
1c2ba475
JT
1365 lockdep_assert_held(&phba->hbalock);
1366
3772a991 1367 phba->__lpfc_sli_release_iocbq(phba, iocbq);
2a9bf3d0 1368 phba->iocb_cnt--;
3772a991
JS
1369}
1370
e59058c4 1371/**
3621a710 1372 * lpfc_sli_release_iocbq - Release iocb to the iocb pool
e59058c4
JS
1373 * @phba: Pointer to HBA context object.
1374 * @iocbq: Pointer to driver iocb object.
1375 *
1376 * This function is called with no lock held to release the iocb to
1377 * iocb pool.
1378 **/
2e0fef85
JS
1379void
1380lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1381{
1382 unsigned long iflags;
1383
1384 /*
1385 * Clean all volatile data fields, preserve iotag and node struct.
1386 */
1387 spin_lock_irqsave(&phba->hbalock, iflags);
1388 __lpfc_sli_release_iocbq(phba, iocbq);
1389 spin_unlock_irqrestore(&phba->hbalock, iflags);
1390}
1391
a257bf90
JS
1392/**
1393 * lpfc_sli_cancel_iocbs - Cancel all iocbs from a list.
1394 * @phba: Pointer to HBA context object.
1395 * @iocblist: List of IOCBs.
1396 * @ulpstatus: ULP status in IOCB command field.
1397 * @ulpWord4: ULP word-4 in IOCB command field.
1398 *
1399 * This function is called with a list of IOCBs to cancel. It cancels the IOCB
1400 * on the list by invoking the complete callback function associated with the
1401 * IOCB with the provided @ulpstatus and @ulpword4 set to the IOCB commond
1402 * fields.
1403 **/
1404void
1405lpfc_sli_cancel_iocbs(struct lpfc_hba *phba, struct list_head *iocblist,
1406 uint32_t ulpstatus, uint32_t ulpWord4)
1407{
1408 struct lpfc_iocbq *piocb;
1409
1410 while (!list_empty(iocblist)) {
1411 list_remove_head(iocblist, piocb, struct lpfc_iocbq, list);
a257bf90
JS
1412 if (!piocb->iocb_cmpl)
1413 lpfc_sli_release_iocbq(phba, piocb);
1414 else {
1415 piocb->iocb.ulpStatus = ulpstatus;
1416 piocb->iocb.un.ulpWord[4] = ulpWord4;
1417 (piocb->iocb_cmpl) (phba, piocb, piocb);
1418 }
1419 }
1420 return;
1421}
1422
e59058c4 1423/**
3621a710
JS
1424 * lpfc_sli_iocb_cmd_type - Get the iocb type
1425 * @iocb_cmnd: iocb command code.
e59058c4
JS
1426 *
1427 * This function is called by ring event handler function to get the iocb type.
1428 * This function translates the iocb command to an iocb command type used to
1429 * decide the final disposition of each completed IOCB.
1430 * The function returns
1431 * LPFC_UNKNOWN_IOCB if it is an unsupported iocb
1432 * LPFC_SOL_IOCB if it is a solicited iocb completion
1433 * LPFC_ABORT_IOCB if it is an abort iocb
1434 * LPFC_UNSOL_IOCB if it is an unsolicited iocb
1435 *
1436 * The caller is not required to hold any lock.
1437 **/
dea3101e
JB
1438static lpfc_iocb_type
1439lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
1440{
1441 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
1442
1443 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
1444 return 0;
1445
1446 switch (iocb_cmnd) {
1447 case CMD_XMIT_SEQUENCE_CR:
1448 case CMD_XMIT_SEQUENCE_CX:
1449 case CMD_XMIT_BCAST_CN:
1450 case CMD_XMIT_BCAST_CX:
1451 case CMD_ELS_REQUEST_CR:
1452 case CMD_ELS_REQUEST_CX:
1453 case CMD_CREATE_XRI_CR:
1454 case CMD_CREATE_XRI_CX:
1455 case CMD_GET_RPI_CN:
1456 case CMD_XMIT_ELS_RSP_CX:
1457 case CMD_GET_RPI_CR:
1458 case CMD_FCP_IWRITE_CR:
1459 case CMD_FCP_IWRITE_CX:
1460 case CMD_FCP_IREAD_CR:
1461 case CMD_FCP_IREAD_CX:
1462 case CMD_FCP_ICMND_CR:
1463 case CMD_FCP_ICMND_CX:
f5603511
JS
1464 case CMD_FCP_TSEND_CX:
1465 case CMD_FCP_TRSP_CX:
1466 case CMD_FCP_TRECEIVE_CX:
1467 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB
1468 case CMD_ADAPTER_MSG:
1469 case CMD_ADAPTER_DUMP:
1470 case CMD_XMIT_SEQUENCE64_CR:
1471 case CMD_XMIT_SEQUENCE64_CX:
1472 case CMD_XMIT_BCAST64_CN:
1473 case CMD_XMIT_BCAST64_CX:
1474 case CMD_ELS_REQUEST64_CR:
1475 case CMD_ELS_REQUEST64_CX:
1476 case CMD_FCP_IWRITE64_CR:
1477 case CMD_FCP_IWRITE64_CX:
1478 case CMD_FCP_IREAD64_CR:
1479 case CMD_FCP_IREAD64_CX:
1480 case CMD_FCP_ICMND64_CR:
1481 case CMD_FCP_ICMND64_CX:
f5603511
JS
1482 case CMD_FCP_TSEND64_CX:
1483 case CMD_FCP_TRSP64_CX:
1484 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB
1485 case CMD_GEN_REQUEST64_CR:
1486 case CMD_GEN_REQUEST64_CX:
1487 case CMD_XMIT_ELS_RSP64_CX:
da0436e9
JS
1488 case DSSCMD_IWRITE64_CR:
1489 case DSSCMD_IWRITE64_CX:
1490 case DSSCMD_IREAD64_CR:
1491 case DSSCMD_IREAD64_CX:
dea3101e
JB
1492 type = LPFC_SOL_IOCB;
1493 break;
1494 case CMD_ABORT_XRI_CN:
1495 case CMD_ABORT_XRI_CX:
1496 case CMD_CLOSE_XRI_CN:
1497 case CMD_CLOSE_XRI_CX:
1498 case CMD_XRI_ABORTED_CX:
1499 case CMD_ABORT_MXRI64_CN:
6669f9bb 1500 case CMD_XMIT_BLS_RSP64_CX:
dea3101e
JB
1501 type = LPFC_ABORT_IOCB;
1502 break;
1503 case CMD_RCV_SEQUENCE_CX:
1504 case CMD_RCV_ELS_REQ_CX:
1505 case CMD_RCV_SEQUENCE64_CX:
1506 case CMD_RCV_ELS_REQ64_CX:
57127f15 1507 case CMD_ASYNC_STATUS:
ed957684
JS
1508 case CMD_IOCB_RCV_SEQ64_CX:
1509 case CMD_IOCB_RCV_ELS64_CX:
1510 case CMD_IOCB_RCV_CONT64_CX:
3163f725 1511 case CMD_IOCB_RET_XRI64_CX:
dea3101e
JB
1512 type = LPFC_UNSOL_IOCB;
1513 break;
3163f725
JS
1514 case CMD_IOCB_XMIT_MSEQ64_CR:
1515 case CMD_IOCB_XMIT_MSEQ64_CX:
1516 case CMD_IOCB_RCV_SEQ_LIST64_CX:
1517 case CMD_IOCB_RCV_ELS_LIST64_CX:
1518 case CMD_IOCB_CLOSE_EXTENDED_CN:
1519 case CMD_IOCB_ABORT_EXTENDED_CN:
1520 case CMD_IOCB_RET_HBQE64_CN:
1521 case CMD_IOCB_FCP_IBIDIR64_CR:
1522 case CMD_IOCB_FCP_IBIDIR64_CX:
1523 case CMD_IOCB_FCP_ITASKMGT64_CX:
1524 case CMD_IOCB_LOGENTRY_CN:
1525 case CMD_IOCB_LOGENTRY_ASYNC_CN:
1526 printk("%s - Unhandled SLI-3 Command x%x\n",
cadbd4a5 1527 __func__, iocb_cmnd);
3163f725
JS
1528 type = LPFC_UNKNOWN_IOCB;
1529 break;
dea3101e
JB
1530 default:
1531 type = LPFC_UNKNOWN_IOCB;
1532 break;
1533 }
1534
1535 return type;
1536}
1537
e59058c4 1538/**
3621a710 1539 * lpfc_sli_ring_map - Issue config_ring mbox for all rings
e59058c4
JS
1540 * @phba: Pointer to HBA context object.
1541 *
1542 * This function is called from SLI initialization code
1543 * to configure every ring of the HBA's SLI interface. The
1544 * caller is not required to hold any lock. This function issues
1545 * a config_ring mailbox command for each ring.
1546 * This function returns zero if successful else returns a negative
1547 * error code.
1548 **/
dea3101e 1549static int
ed957684 1550lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB
1551{
1552 struct lpfc_sli *psli = &phba->sli;
ed957684
JS
1553 LPFC_MBOXQ_t *pmb;
1554 MAILBOX_t *pmbox;
1555 int i, rc, ret = 0;
dea3101e 1556
ed957684
JS
1557 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1558 if (!pmb)
1559 return -ENOMEM;
04c68496 1560 pmbox = &pmb->u.mb;
ed957684 1561 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 1562 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB
1563 lpfc_config_ring(phba, i, pmb);
1564 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1565 if (rc != MBX_SUCCESS) {
92d7f7b0 1566 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1567 "0446 Adapter failed to init (%d), "
dea3101e
JB
1568 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
1569 "ring %d\n",
e8b62011
JS
1570 rc, pmbox->mbxCommand,
1571 pmbox->mbxStatus, i);
2e0fef85 1572 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS
1573 ret = -ENXIO;
1574 break;
dea3101e
JB
1575 }
1576 }
ed957684
JS
1577 mempool_free(pmb, phba->mbox_mem_pool);
1578 return ret;
dea3101e
JB
1579}
1580
e59058c4 1581/**
3621a710 1582 * lpfc_sli_ringtxcmpl_put - Adds new iocb to the txcmplq
e59058c4
JS
1583 * @phba: Pointer to HBA context object.
1584 * @pring: Pointer to driver SLI ring object.
1585 * @piocb: Pointer to the driver iocb object.
1586 *
1587 * This function is called with hbalock held. The function adds the
1588 * new iocb to txcmplq of the given ring. This function always returns
1589 * 0. If this function is called for ELS ring, this function checks if
1590 * there is a vport associated with the ELS command. This function also
1591 * starts els_tmofunc timer if this is an ELS command.
1592 **/
dea3101e 1593static int
2e0fef85
JS
1594lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1595 struct lpfc_iocbq *piocb)
dea3101e 1596{
1c2ba475
JT
1597 lockdep_assert_held(&phba->hbalock);
1598
2319f847 1599 BUG_ON(!piocb);
22466da5 1600
dea3101e 1601 list_add_tail(&piocb->list, &pring->txcmplq);
4f2e66c6 1602 piocb->iocb_flag |= LPFC_IO_ON_TXCMPLQ;
2a9bf3d0 1603
92d7f7b0
JS
1604 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
1605 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2319f847
MFO
1606 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
1607 BUG_ON(!piocb->vport);
1608 if (!(piocb->vport->load_flag & FC_UNLOADING))
1609 mod_timer(&piocb->vport->els_tmofunc,
1610 jiffies +
1611 msecs_to_jiffies(1000 * (phba->fc_ratov << 1)));
1612 }
dea3101e 1613
2e0fef85 1614 return 0;
dea3101e
JB
1615}
1616
e59058c4 1617/**
3621a710 1618 * lpfc_sli_ringtx_get - Get first element of the txq
e59058c4
JS
1619 * @phba: Pointer to HBA context object.
1620 * @pring: Pointer to driver SLI ring object.
1621 *
1622 * This function is called with hbalock held to get next
1623 * iocb in txq of the given ring. If there is any iocb in
1624 * the txq, the function returns first iocb in the list after
1625 * removing the iocb from the list, else it returns NULL.
1626 **/
2a9bf3d0 1627struct lpfc_iocbq *
2e0fef85 1628lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 1629{
dea3101e
JB
1630 struct lpfc_iocbq *cmd_iocb;
1631
1c2ba475
JT
1632 lockdep_assert_held(&phba->hbalock);
1633
858c9f6c 1634 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
2e0fef85 1635 return cmd_iocb;
dea3101e
JB
1636}
1637
e59058c4 1638/**
3621a710 1639 * lpfc_sli_next_iocb_slot - Get next iocb slot in the ring
e59058c4
JS
1640 * @phba: Pointer to HBA context object.
1641 * @pring: Pointer to driver SLI ring object.
1642 *
1643 * This function is called with hbalock held and the caller must post the
1644 * iocb without releasing the lock. If the caller releases the lock,
1645 * iocb slot returned by the function is not guaranteed to be available.
1646 * The function returns pointer to the next available iocb slot if there
1647 * is available slot in the ring, else it returns NULL.
1648 * If the get index of the ring is ahead of the put index, the function
1649 * will post an error attention event to the worker thread to take the
1650 * HBA to offline state.
1651 **/
dea3101e
JB
1652static IOCB_t *
1653lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1654{
34b02dcd 1655 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
7e56aa25 1656 uint32_t max_cmd_idx = pring->sli.sli3.numCiocb;
1c2ba475
JT
1657
1658 lockdep_assert_held(&phba->hbalock);
1659
7e56aa25
JS
1660 if ((pring->sli.sli3.next_cmdidx == pring->sli.sli3.cmdidx) &&
1661 (++pring->sli.sli3.next_cmdidx >= max_cmd_idx))
1662 pring->sli.sli3.next_cmdidx = 0;
dea3101e 1663
7e56aa25
JS
1664 if (unlikely(pring->sli.sli3.local_getidx ==
1665 pring->sli.sli3.next_cmdidx)) {
dea3101e 1666
7e56aa25 1667 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e 1668
7e56aa25 1669 if (unlikely(pring->sli.sli3.local_getidx >= max_cmd_idx)) {
dea3101e 1670 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1671 "0315 Ring %d issue: portCmdGet %d "
025dfdaf 1672 "is bigger than cmd ring %d\n",
e8b62011 1673 pring->ringno,
7e56aa25
JS
1674 pring->sli.sli3.local_getidx,
1675 max_cmd_idx);
dea3101e 1676
2e0fef85 1677 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
1678 /*
1679 * All error attention handlers are posted to
1680 * worker thread
1681 */
1682 phba->work_ha |= HA_ERATT;
1683 phba->work_hs = HS_FFER3;
92d7f7b0 1684
5e9d9b82 1685 lpfc_worker_wake_up(phba);
dea3101e
JB
1686
1687 return NULL;
1688 }
1689
7e56aa25 1690 if (pring->sli.sli3.local_getidx == pring->sli.sli3.next_cmdidx)
dea3101e
JB
1691 return NULL;
1692 }
1693
ed957684 1694 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB
1695}
1696
e59058c4 1697/**
3621a710 1698 * lpfc_sli_next_iotag - Get an iotag for the iocb
e59058c4
JS
1699 * @phba: Pointer to HBA context object.
1700 * @iocbq: Pointer to driver iocb object.
1701 *
1702 * This function gets an iotag for the iocb. If there is no unused iotag and
1703 * the iocbq_lookup_len < 0xffff, this function allocates a bigger iotag_lookup
1704 * array and assigns a new iotag.
1705 * The function returns the allocated iotag if successful, else returns zero.
1706 * Zero is not a valid iotag.
1707 * The caller is not required to hold any lock.
1708 **/
604a3e30 1709uint16_t
2e0fef85 1710lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 1711{
2e0fef85
JS
1712 struct lpfc_iocbq **new_arr;
1713 struct lpfc_iocbq **old_arr;
604a3e30
JB
1714 size_t new_len;
1715 struct lpfc_sli *psli = &phba->sli;
1716 uint16_t iotag;
dea3101e 1717
2e0fef85 1718 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1719 iotag = psli->last_iotag;
1720 if(++iotag < psli->iocbq_lookup_len) {
1721 psli->last_iotag = iotag;
1722 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1723 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1724 iocbq->iotag = iotag;
1725 return iotag;
2e0fef85 1726 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB
1727 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
1728 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85 1729 spin_unlock_irq(&phba->hbalock);
6396bb22 1730 new_arr = kcalloc(new_len, sizeof(struct lpfc_iocbq *),
604a3e30
JB
1731 GFP_KERNEL);
1732 if (new_arr) {
2e0fef85 1733 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1734 old_arr = psli->iocbq_lookup;
1735 if (new_len <= psli->iocbq_lookup_len) {
1736 /* highly unprobable case */
1737 kfree(new_arr);
1738 iotag = psli->last_iotag;
1739 if(++iotag < psli->iocbq_lookup_len) {
1740 psli->last_iotag = iotag;
1741 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1742 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1743 iocbq->iotag = iotag;
1744 return iotag;
1745 }
2e0fef85 1746 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1747 return 0;
1748 }
1749 if (psli->iocbq_lookup)
1750 memcpy(new_arr, old_arr,
1751 ((psli->last_iotag + 1) *
311464ec 1752 sizeof (struct lpfc_iocbq *)));
604a3e30
JB
1753 psli->iocbq_lookup = new_arr;
1754 psli->iocbq_lookup_len = new_len;
1755 psli->last_iotag = iotag;
1756 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1757 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1758 iocbq->iotag = iotag;
1759 kfree(old_arr);
1760 return iotag;
1761 }
8f6d98d2 1762 } else
2e0fef85 1763 spin_unlock_irq(&phba->hbalock);
dea3101e 1764
bc73905a 1765 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
1766 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
1767 psli->last_iotag);
dea3101e 1768
604a3e30 1769 return 0;
dea3101e
JB
1770}
1771
e59058c4 1772/**
3621a710 1773 * lpfc_sli_submit_iocb - Submit an iocb to the firmware
e59058c4
JS
1774 * @phba: Pointer to HBA context object.
1775 * @pring: Pointer to driver SLI ring object.
1776 * @iocb: Pointer to iocb slot in the ring.
1777 * @nextiocb: Pointer to driver iocb object which need to be
1778 * posted to firmware.
1779 *
1780 * This function is called with hbalock held to post a new iocb to
1781 * the firmware. This function copies the new iocb to ring iocb slot and
1782 * updates the ring pointers. It adds the new iocb to txcmplq if there is
1783 * a completion call back for this iocb else the function will free the
1784 * iocb object.
1785 **/
dea3101e
JB
1786static void
1787lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1788 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
1789{
1c2ba475 1790 lockdep_assert_held(&phba->hbalock);
dea3101e 1791 /*
604a3e30 1792 * Set up an iotag
dea3101e 1793 */
604a3e30 1794 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 1795
e2a0a9d6 1796
a58cbd52
JS
1797 if (pring->ringno == LPFC_ELS_RING) {
1798 lpfc_debugfs_slow_ring_trc(phba,
1799 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1800 *(((uint32_t *) &nextiocb->iocb) + 4),
1801 *(((uint32_t *) &nextiocb->iocb) + 6),
1802 *(((uint32_t *) &nextiocb->iocb) + 7));
1803 }
1804
dea3101e
JB
1805 /*
1806 * Issue iocb command to adapter
1807 */
92d7f7b0 1808 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB
1809 wmb();
1810 pring->stats.iocb_cmd++;
1811
1812 /*
1813 * If there is no completion routine to call, we can release the
1814 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
1815 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
1816 */
1817 if (nextiocb->iocb_cmpl)
1818 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 1819 else
2e0fef85 1820 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB
1821
1822 /*
1823 * Let the HBA know what IOCB slot will be the next one the
1824 * driver will put a command into.
1825 */
7e56aa25
JS
1826 pring->sli.sli3.cmdidx = pring->sli.sli3.next_cmdidx;
1827 writel(pring->sli.sli3.cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB
1828}
1829
e59058c4 1830/**
3621a710 1831 * lpfc_sli_update_full_ring - Update the chip attention register
e59058c4
JS
1832 * @phba: Pointer to HBA context object.
1833 * @pring: Pointer to driver SLI ring object.
1834 *
1835 * The caller is not required to hold any lock for calling this function.
1836 * This function updates the chip attention bits for the ring to inform firmware
1837 * that there are pending work to be done for this ring and requests an
1838 * interrupt when there is space available in the ring. This function is
1839 * called when the driver is unable to post more iocbs to the ring due
1840 * to unavailability of space in the ring.
1841 **/
dea3101e 1842static void
2e0fef85 1843lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1844{
1845 int ringno = pring->ringno;
1846
1847 pring->flag |= LPFC_CALL_RING_AVAILABLE;
1848
1849 wmb();
1850
1851 /*
1852 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
1853 * The HBA will tell us when an IOCB entry is available.
1854 */
1855 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
1856 readl(phba->CAregaddr); /* flush */
1857
1858 pring->stats.iocb_cmd_full++;
1859}
1860
e59058c4 1861/**
3621a710 1862 * lpfc_sli_update_ring - Update chip attention register
e59058c4
JS
1863 * @phba: Pointer to HBA context object.
1864 * @pring: Pointer to driver SLI ring object.
1865 *
1866 * This function updates the chip attention register bit for the
1867 * given ring to inform HBA that there is more work to be done
1868 * in this ring. The caller is not required to hold any lock.
1869 **/
dea3101e 1870static void
2e0fef85 1871lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1872{
1873 int ringno = pring->ringno;
1874
1875 /*
1876 * Tell the HBA that there is work to do in this ring.
1877 */
34b02dcd
JS
1878 if (!(phba->sli3_options & LPFC_SLI3_CRP_ENABLED)) {
1879 wmb();
1880 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
1881 readl(phba->CAregaddr); /* flush */
1882 }
dea3101e
JB
1883}
1884
e59058c4 1885/**
3621a710 1886 * lpfc_sli_resume_iocb - Process iocbs in the txq
e59058c4
JS
1887 * @phba: Pointer to HBA context object.
1888 * @pring: Pointer to driver SLI ring object.
1889 *
1890 * This function is called with hbalock held to post pending iocbs
1891 * in the txq to the firmware. This function is called when driver
1892 * detects space available in the ring.
1893 **/
dea3101e 1894static void
2e0fef85 1895lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1896{
1897 IOCB_t *iocb;
1898 struct lpfc_iocbq *nextiocb;
1899
1c2ba475
JT
1900 lockdep_assert_held(&phba->hbalock);
1901
dea3101e
JB
1902 /*
1903 * Check to see if:
1904 * (a) there is anything on the txq to send
1905 * (b) link is up
1906 * (c) link attention events can be processed (fcp ring only)
1907 * (d) IOCB processing is not blocked by the outstanding mbox command.
1908 */
0e9bb8d7
JS
1909
1910 if (lpfc_is_link_up(phba) &&
1911 (!list_empty(&pring->txq)) &&
895427bd 1912 (pring->ringno != LPFC_FCP_RING ||
0b727fea 1913 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e
JB
1914
1915 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
1916 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
1917 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
1918
1919 if (iocb)
1920 lpfc_sli_update_ring(phba, pring);
1921 else
1922 lpfc_sli_update_full_ring(phba, pring);
1923 }
1924
1925 return;
1926}
1927
e59058c4 1928/**
3621a710 1929 * lpfc_sli_next_hbq_slot - Get next hbq entry for the HBQ
e59058c4
JS
1930 * @phba: Pointer to HBA context object.
1931 * @hbqno: HBQ number.
1932 *
1933 * This function is called with hbalock held to get the next
1934 * available slot for the given HBQ. If there is free slot
1935 * available for the HBQ it will return pointer to the next available
1936 * HBQ entry else it will return NULL.
1937 **/
a6ababd2 1938static struct lpfc_hbq_entry *
ed957684
JS
1939lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
1940{
1941 struct hbq_s *hbqp = &phba->hbqs[hbqno];
1942
1c2ba475
JT
1943 lockdep_assert_held(&phba->hbalock);
1944
ed957684
JS
1945 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
1946 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
1947 hbqp->next_hbqPutIdx = 0;
1948
1949 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 1950 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS
1951 uint32_t getidx = le32_to_cpu(raw_index);
1952
1953 hbqp->local_hbqGetIdx = getidx;
1954
1955 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
1956 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 1957 LOG_SLI | LOG_VPORT,
e8b62011 1958 "1802 HBQ %d: local_hbqGetIdx "
ed957684 1959 "%u is > than hbqp->entry_count %u\n",
e8b62011 1960 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS
1961 hbqp->entry_count);
1962
1963 phba->link_state = LPFC_HBA_ERROR;
1964 return NULL;
1965 }
1966
1967 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
1968 return NULL;
1969 }
1970
51ef4c26
JS
1971 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
1972 hbqp->hbqPutIdx;
ed957684
JS
1973}
1974
e59058c4 1975/**
3621a710 1976 * lpfc_sli_hbqbuf_free_all - Free all the hbq buffers
e59058c4
JS
1977 * @phba: Pointer to HBA context object.
1978 *
1979 * This function is called with no lock held to free all the
1980 * hbq buffers while uninitializing the SLI interface. It also
1981 * frees the HBQ buffers returned by the firmware but not yet
1982 * processed by the upper layers.
1983 **/
ed957684
JS
1984void
1985lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
1986{
92d7f7b0
JS
1987 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
1988 struct hbq_dmabuf *hbq_buf;
3163f725 1989 unsigned long flags;
51ef4c26 1990 int i, hbq_count;
ed957684 1991
51ef4c26 1992 hbq_count = lpfc_sli_hbq_count();
ed957684 1993 /* Return all memory used by all HBQs */
3163f725 1994 spin_lock_irqsave(&phba->hbalock, flags);
51ef4c26
JS
1995 for (i = 0; i < hbq_count; ++i) {
1996 list_for_each_entry_safe(dmabuf, next_dmabuf,
1997 &phba->hbqs[i].hbq_buffer_list, list) {
1998 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
1999 list_del(&hbq_buf->dbuf.list);
2000 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
2001 }
a8adb832 2002 phba->hbqs[i].buffer_count = 0;
ed957684 2003 }
3163f725
JS
2004
2005 /* Mark the HBQs not in use */
2006 phba->hbq_in_use = 0;
2007 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684
JS
2008}
2009
e59058c4 2010/**
3621a710 2011 * lpfc_sli_hbq_to_firmware - Post the hbq buffer to firmware
e59058c4
JS
2012 * @phba: Pointer to HBA context object.
2013 * @hbqno: HBQ number.
2014 * @hbq_buf: Pointer to HBQ buffer.
2015 *
2016 * This function is called with the hbalock held to post a
2017 * hbq buffer to the firmware. If the function finds an empty
2018 * slot in the HBQ, it will post the buffer. The function will return
2019 * pointer to the hbq entry if it successfully post the buffer
2020 * else it will return NULL.
2021 **/
3772a991 2022static int
ed957684 2023lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 2024 struct hbq_dmabuf *hbq_buf)
3772a991 2025{
1c2ba475 2026 lockdep_assert_held(&phba->hbalock);
3772a991
JS
2027 return phba->lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buf);
2028}
2029
2030/**
2031 * lpfc_sli_hbq_to_firmware_s3 - Post the hbq buffer to SLI3 firmware
2032 * @phba: Pointer to HBA context object.
2033 * @hbqno: HBQ number.
2034 * @hbq_buf: Pointer to HBQ buffer.
2035 *
2036 * This function is called with the hbalock held to post a hbq buffer to the
2037 * firmware. If the function finds an empty slot in the HBQ, it will post the
2038 * buffer and place it on the hbq_buffer_list. The function will return zero if
2039 * it successfully post the buffer else it will return an error.
2040 **/
2041static int
2042lpfc_sli_hbq_to_firmware_s3(struct lpfc_hba *phba, uint32_t hbqno,
2043 struct hbq_dmabuf *hbq_buf)
ed957684
JS
2044{
2045 struct lpfc_hbq_entry *hbqe;
92d7f7b0 2046 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684 2047
1c2ba475 2048 lockdep_assert_held(&phba->hbalock);
ed957684
JS
2049 /* Get next HBQ entry slot to use */
2050 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
2051 if (hbqe) {
2052 struct hbq_s *hbqp = &phba->hbqs[hbqno];
2053
92d7f7b0
JS
2054 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
2055 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
895427bd 2056 hbqe->bde.tus.f.bdeSize = hbq_buf->total_size;
ed957684 2057 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS
2058 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
2059 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
2060 /* Sync SLIM */
ed957684
JS
2061 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
2062 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 2063 /* flush */
ed957684 2064 readl(phba->hbq_put + hbqno);
51ef4c26 2065 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
3772a991
JS
2066 return 0;
2067 } else
2068 return -ENOMEM;
ed957684
JS
2069}
2070
4f774513
JS
2071/**
2072 * lpfc_sli_hbq_to_firmware_s4 - Post the hbq buffer to SLI4 firmware
2073 * @phba: Pointer to HBA context object.
2074 * @hbqno: HBQ number.
2075 * @hbq_buf: Pointer to HBQ buffer.
2076 *
2077 * This function is called with the hbalock held to post an RQE to the SLI4
2078 * firmware. If able to post the RQE to the RQ it will queue the hbq entry to
2079 * the hbq_buffer_list and return zero, otherwise it will return an error.
2080 **/
2081static int
2082lpfc_sli_hbq_to_firmware_s4(struct lpfc_hba *phba, uint32_t hbqno,
2083 struct hbq_dmabuf *hbq_buf)
2084{
2085 int rc;
2086 struct lpfc_rqe hrqe;
2087 struct lpfc_rqe drqe;
895427bd
JS
2088 struct lpfc_queue *hrq;
2089 struct lpfc_queue *drq;
2090
2091 if (hbqno != LPFC_ELS_HBQ)
2092 return 1;
2093 hrq = phba->sli4_hba.hdr_rq;
2094 drq = phba->sli4_hba.dat_rq;
4f774513 2095
1c2ba475 2096 lockdep_assert_held(&phba->hbalock);
4f774513
JS
2097 hrqe.address_lo = putPaddrLow(hbq_buf->hbuf.phys);
2098 hrqe.address_hi = putPaddrHigh(hbq_buf->hbuf.phys);
2099 drqe.address_lo = putPaddrLow(hbq_buf->dbuf.phys);
2100 drqe.address_hi = putPaddrHigh(hbq_buf->dbuf.phys);
895427bd 2101 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
4f774513
JS
2102 if (rc < 0)
2103 return rc;
895427bd 2104 hbq_buf->tag = (rc | (hbqno << 16));
4f774513
JS
2105 list_add_tail(&hbq_buf->dbuf.list, &phba->hbqs[hbqno].hbq_buffer_list);
2106 return 0;
2107}
2108
e59058c4 2109/* HBQ for ELS and CT traffic. */
92d7f7b0
JS
2110static struct lpfc_hbq_init lpfc_els_hbq = {
2111 .rn = 1,
def9c7a9 2112 .entry_count = 256,
92d7f7b0
JS
2113 .mask_count = 0,
2114 .profile = 0,
51ef4c26 2115 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0 2116 .buffer_count = 0,
a257bf90
JS
2117 .init_count = 40,
2118 .add_count = 40,
92d7f7b0 2119};
ed957684 2120
e59058c4 2121/* Array of HBQs */
78b2d852 2122struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0
JS
2123 &lpfc_els_hbq,
2124};
ed957684 2125
e59058c4 2126/**
3621a710 2127 * lpfc_sli_hbqbuf_fill_hbqs - Post more hbq buffers to HBQ
e59058c4
JS
2128 * @phba: Pointer to HBA context object.
2129 * @hbqno: HBQ number.
2130 * @count: Number of HBQ buffers to be posted.
2131 *
d7c255b2
JS
2132 * This function is called with no lock held to post more hbq buffers to the
2133 * given HBQ. The function returns the number of HBQ buffers successfully
2134 * posted.
e59058c4 2135 **/
311464ec 2136static int
92d7f7b0 2137lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 2138{
d7c255b2 2139 uint32_t i, posted = 0;
3163f725 2140 unsigned long flags;
92d7f7b0 2141 struct hbq_dmabuf *hbq_buffer;
d7c255b2 2142 LIST_HEAD(hbq_buf_list);
eafe1df9 2143 if (!phba->hbqs[hbqno].hbq_alloc_buffer)
51ef4c26 2144 return 0;
51ef4c26 2145
d7c255b2
JS
2146 if ((phba->hbqs[hbqno].buffer_count + count) >
2147 lpfc_hbq_defs[hbqno]->entry_count)
2148 count = lpfc_hbq_defs[hbqno]->entry_count -
2149 phba->hbqs[hbqno].buffer_count;
2150 if (!count)
2151 return 0;
2152 /* Allocate HBQ entries */
2153 for (i = 0; i < count; i++) {
2154 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
2155 if (!hbq_buffer)
2156 break;
2157 list_add_tail(&hbq_buffer->dbuf.list, &hbq_buf_list);
2158 }
3163f725
JS
2159 /* Check whether HBQ is still in use */
2160 spin_lock_irqsave(&phba->hbalock, flags);
eafe1df9 2161 if (!phba->hbq_in_use)
d7c255b2
JS
2162 goto err;
2163 while (!list_empty(&hbq_buf_list)) {
2164 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2165 dbuf.list);
2166 hbq_buffer->tag = (phba->hbqs[hbqno].buffer_count |
2167 (hbqno << 16));
3772a991 2168 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
a8adb832 2169 phba->hbqs[hbqno].buffer_count++;
d7c255b2
JS
2170 posted++;
2171 } else
51ef4c26 2172 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684 2173 }
3163f725 2174 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2175 return posted;
2176err:
eafe1df9 2177 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2178 while (!list_empty(&hbq_buf_list)) {
2179 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2180 dbuf.list);
2181 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
2182 }
2183 return 0;
ed957684
JS
2184}
2185
e59058c4 2186/**
3621a710 2187 * lpfc_sli_hbqbuf_add_hbqs - Post more HBQ buffers to firmware
e59058c4
JS
2188 * @phba: Pointer to HBA context object.
2189 * @qno: HBQ number.
2190 *
2191 * This function posts more buffers to the HBQ. This function
d7c255b2
JS
2192 * is called with no lock held. The function returns the number of HBQ entries
2193 * successfully allocated.
e59058c4 2194 **/
92d7f7b0
JS
2195int
2196lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 2197{
def9c7a9
JS
2198 if (phba->sli_rev == LPFC_SLI_REV4)
2199 return 0;
2200 else
2201 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2202 lpfc_hbq_defs[qno]->add_count);
92d7f7b0 2203}
ed957684 2204
e59058c4 2205/**
3621a710 2206 * lpfc_sli_hbqbuf_init_hbqs - Post initial buffers to the HBQ
e59058c4
JS
2207 * @phba: Pointer to HBA context object.
2208 * @qno: HBQ queue number.
2209 *
2210 * This function is called from SLI initialization code path with
2211 * no lock held to post initial HBQ buffers to firmware. The
d7c255b2 2212 * function returns the number of HBQ entries successfully allocated.
e59058c4 2213 **/
a6ababd2 2214static int
92d7f7b0
JS
2215lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
2216{
def9c7a9
JS
2217 if (phba->sli_rev == LPFC_SLI_REV4)
2218 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
73d91e50 2219 lpfc_hbq_defs[qno]->entry_count);
def9c7a9
JS
2220 else
2221 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2222 lpfc_hbq_defs[qno]->init_count);
ed957684
JS
2223}
2224
3772a991
JS
2225/**
2226 * lpfc_sli_hbqbuf_get - Remove the first hbq off of an hbq list
2227 * @phba: Pointer to HBA context object.
2228 * @hbqno: HBQ number.
2229 *
2230 * This function removes the first hbq buffer on an hbq list and returns a
2231 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2232 **/
2233static struct hbq_dmabuf *
2234lpfc_sli_hbqbuf_get(struct list_head *rb_list)
2235{
2236 struct lpfc_dmabuf *d_buf;
2237
2238 list_remove_head(rb_list, d_buf, struct lpfc_dmabuf, list);
2239 if (!d_buf)
2240 return NULL;
2241 return container_of(d_buf, struct hbq_dmabuf, dbuf);
2242}
2243
2d7dbc4c
JS
2244/**
2245 * lpfc_sli_rqbuf_get - Remove the first dma buffer off of an RQ list
2246 * @phba: Pointer to HBA context object.
2247 * @hbqno: HBQ number.
2248 *
2249 * This function removes the first RQ buffer on an RQ buffer list and returns a
2250 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2251 **/
2252static struct rqb_dmabuf *
2253lpfc_sli_rqbuf_get(struct lpfc_hba *phba, struct lpfc_queue *hrq)
2254{
2255 struct lpfc_dmabuf *h_buf;
2256 struct lpfc_rqb *rqbp;
2257
2258 rqbp = hrq->rqbp;
2259 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
2260 struct lpfc_dmabuf, list);
2261 if (!h_buf)
2262 return NULL;
2263 rqbp->buffer_count--;
2264 return container_of(h_buf, struct rqb_dmabuf, hbuf);
2265}
2266
e59058c4 2267/**
3621a710 2268 * lpfc_sli_hbqbuf_find - Find the hbq buffer associated with a tag
e59058c4
JS
2269 * @phba: Pointer to HBA context object.
2270 * @tag: Tag of the hbq buffer.
2271 *
71892418
SH
2272 * This function searches for the hbq buffer associated with the given tag in
2273 * the hbq buffer list. If it finds the hbq buffer, it returns the hbq_buffer
2274 * otherwise it returns NULL.
e59058c4 2275 **/
a6ababd2 2276static struct hbq_dmabuf *
92d7f7b0 2277lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 2278{
92d7f7b0
JS
2279 struct lpfc_dmabuf *d_buf;
2280 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS
2281 uint32_t hbqno;
2282
2283 hbqno = tag >> 16;
a0a74e45 2284 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 2285 return NULL;
ed957684 2286
3772a991 2287 spin_lock_irq(&phba->hbalock);
51ef4c26 2288 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 2289 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 2290 if (hbq_buf->tag == tag) {
3772a991 2291 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2292 return hbq_buf;
ed957684
JS
2293 }
2294 }
3772a991 2295 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2296 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 2297 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 2298 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 2299 return NULL;
ed957684
JS
2300}
2301
e59058c4 2302/**
3621a710 2303 * lpfc_sli_free_hbq - Give back the hbq buffer to firmware
e59058c4
JS
2304 * @phba: Pointer to HBA context object.
2305 * @hbq_buffer: Pointer to HBQ buffer.
2306 *
2307 * This function is called with hbalock. This function gives back
2308 * the hbq buffer to firmware. If the HBQ does not have space to
2309 * post the buffer, it will free the buffer.
2310 **/
ed957684 2311void
51ef4c26 2312lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS
2313{
2314 uint32_t hbqno;
2315
51ef4c26
JS
2316 if (hbq_buffer) {
2317 hbqno = hbq_buffer->tag >> 16;
3772a991 2318 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
51ef4c26 2319 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS
2320 }
2321}
2322
e59058c4 2323/**
3621a710 2324 * lpfc_sli_chk_mbx_command - Check if the mailbox is a legitimate mailbox
e59058c4
JS
2325 * @mbxCommand: mailbox command code.
2326 *
2327 * This function is called by the mailbox event handler function to verify
2328 * that the completed mailbox command is a legitimate mailbox command. If the
2329 * completed mailbox is not known to the function, it will return MBX_SHUTDOWN
2330 * and the mailbox event handler will take the HBA offline.
2331 **/
dea3101e
JB
2332static int
2333lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
2334{
2335 uint8_t ret;
2336
2337 switch (mbxCommand) {
2338 case MBX_LOAD_SM:
2339 case MBX_READ_NV:
2340 case MBX_WRITE_NV:
a8adb832 2341 case MBX_WRITE_VPARMS:
dea3101e
JB
2342 case MBX_RUN_BIU_DIAG:
2343 case MBX_INIT_LINK:
2344 case MBX_DOWN_LINK:
2345 case MBX_CONFIG_LINK:
2346 case MBX_CONFIG_RING:
2347 case MBX_RESET_RING:
2348 case MBX_READ_CONFIG:
2349 case MBX_READ_RCONFIG:
2350 case MBX_READ_SPARM:
2351 case MBX_READ_STATUS:
2352 case MBX_READ_RPI:
2353 case MBX_READ_XRI:
2354 case MBX_READ_REV:
2355 case MBX_READ_LNK_STAT:
2356 case MBX_REG_LOGIN:
2357 case MBX_UNREG_LOGIN:
dea3101e
JB
2358 case MBX_CLEAR_LA:
2359 case MBX_DUMP_MEMORY:
2360 case MBX_DUMP_CONTEXT:
2361 case MBX_RUN_DIAGS:
2362 case MBX_RESTART:
2363 case MBX_UPDATE_CFG:
2364 case MBX_DOWN_LOAD:
2365 case MBX_DEL_LD_ENTRY:
2366 case MBX_RUN_PROGRAM:
2367 case MBX_SET_MASK:
09372820 2368 case MBX_SET_VARIABLE:
dea3101e 2369 case MBX_UNREG_D_ID:
41415862 2370 case MBX_KILL_BOARD:
dea3101e 2371 case MBX_CONFIG_FARP:
41415862 2372 case MBX_BEACON:
dea3101e
JB
2373 case MBX_LOAD_AREA:
2374 case MBX_RUN_BIU_DIAG64:
2375 case MBX_CONFIG_PORT:
2376 case MBX_READ_SPARM64:
2377 case MBX_READ_RPI64:
2378 case MBX_REG_LOGIN64:
76a95d75 2379 case MBX_READ_TOPOLOGY:
09372820 2380 case MBX_WRITE_WWN:
dea3101e
JB
2381 case MBX_SET_DEBUG:
2382 case MBX_LOAD_EXP_ROM:
57127f15 2383 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS
2384 case MBX_REG_VPI:
2385 case MBX_UNREG_VPI:
858c9f6c 2386 case MBX_HEARTBEAT:
84774a4d
JS
2387 case MBX_PORT_CAPABILITIES:
2388 case MBX_PORT_IOV_CONTROL:
04c68496
JS
2389 case MBX_SLI4_CONFIG:
2390 case MBX_SLI4_REQ_FTRS:
2391 case MBX_REG_FCFI:
2392 case MBX_UNREG_FCFI:
2393 case MBX_REG_VFI:
2394 case MBX_UNREG_VFI:
2395 case MBX_INIT_VPI:
2396 case MBX_INIT_VFI:
2397 case MBX_RESUME_RPI:
c7495937
JS
2398 case MBX_READ_EVENT_LOG_STATUS:
2399 case MBX_READ_EVENT_LOG:
dcf2a4e0
JS
2400 case MBX_SECURITY_MGMT:
2401 case MBX_AUTH_PORT:
940eb687 2402 case MBX_ACCESS_VDATA:
dea3101e
JB
2403 ret = mbxCommand;
2404 break;
2405 default:
2406 ret = MBX_SHUTDOWN;
2407 break;
2408 }
2e0fef85 2409 return ret;
dea3101e 2410}
e59058c4
JS
2411
2412/**
3621a710 2413 * lpfc_sli_wake_mbox_wait - lpfc_sli_issue_mbox_wait mbox completion handler
e59058c4
JS
2414 * @phba: Pointer to HBA context object.
2415 * @pmboxq: Pointer to mailbox command.
2416 *
2417 * This is completion handler function for mailbox commands issued from
2418 * lpfc_sli_issue_mbox_wait function. This function is called by the
2419 * mailbox event handler function with no lock held. This function
2420 * will wake up thread waiting on the wait queue pointed by context1
2421 * of the mailbox.
2422 **/
04c68496 2423void
2e0fef85 2424lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e 2425{
858c9f6c 2426 unsigned long drvr_flag;
e29d74f8 2427 struct completion *pmbox_done;
dea3101e
JB
2428
2429 /*
e29d74f8 2430 * If pmbox_done is empty, the driver thread gave up waiting and
dea3101e
JB
2431 * continued running.
2432 */
7054a606 2433 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 2434 spin_lock_irqsave(&phba->hbalock, drvr_flag);
e29d74f8
JS
2435 pmbox_done = (struct completion *)pmboxq->context3;
2436 if (pmbox_done)
2437 complete(pmbox_done);
858c9f6c 2438 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
2439 return;
2440}
2441
e59058c4
JS
2442
2443/**
3621a710 2444 * lpfc_sli_def_mbox_cmpl - Default mailbox completion handler
e59058c4
JS
2445 * @phba: Pointer to HBA context object.
2446 * @pmb: Pointer to mailbox object.
2447 *
2448 * This function is the default mailbox completion handler. It
2449 * frees the memory resources associated with the completed mailbox
2450 * command. If the completed command is a REG_LOGIN mailbox command,
2451 * this function will issue a UREG_LOGIN to re-claim the RPI.
2452 **/
dea3101e 2453void
2e0fef85 2454lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e 2455{
d439d286 2456 struct lpfc_vport *vport = pmb->vport;
dea3101e 2457 struct lpfc_dmabuf *mp;
d439d286 2458 struct lpfc_nodelist *ndlp;
5af5eee7 2459 struct Scsi_Host *shost;
04c68496 2460 uint16_t rpi, vpi;
7054a606
JS
2461 int rc;
2462
dea3101e 2463 mp = (struct lpfc_dmabuf *) (pmb->context1);
7054a606 2464
dea3101e
JB
2465 if (mp) {
2466 lpfc_mbuf_free(phba, mp->virt, mp->phys);
2467 kfree(mp);
2468 }
7054a606
JS
2469
2470 /*
2471 * If a REG_LOGIN succeeded after node is destroyed or node
2472 * is in re-discovery driver need to cleanup the RPI.
2473 */
2e0fef85 2474 if (!(phba->pport->load_flag & FC_UNLOADING) &&
04c68496
JS
2475 pmb->u.mb.mbxCommand == MBX_REG_LOGIN64 &&
2476 !pmb->u.mb.mbxStatus) {
2477 rpi = pmb->u.mb.un.varWords[0];
6d368e53 2478 vpi = pmb->u.mb.un.varRegLogin.vpi;
04c68496 2479 lpfc_unreg_login(phba, vpi, rpi, pmb);
de96e9c5 2480 pmb->vport = vport;
92d7f7b0 2481 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS
2482 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2483 if (rc != MBX_NOT_FINISHED)
2484 return;
2485 }
2486
695a814e
JS
2487 if ((pmb->u.mb.mbxCommand == MBX_REG_VPI) &&
2488 !(phba->pport->load_flag & FC_UNLOADING) &&
2489 !pmb->u.mb.mbxStatus) {
5af5eee7
JS
2490 shost = lpfc_shost_from_vport(vport);
2491 spin_lock_irq(shost->host_lock);
2492 vport->vpi_state |= LPFC_VPI_REGISTERED;
2493 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI;
2494 spin_unlock_irq(shost->host_lock);
695a814e
JS
2495 }
2496
d439d286
JS
2497 if (pmb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
2498 ndlp = (struct lpfc_nodelist *)pmb->context2;
2499 lpfc_nlp_put(ndlp);
2500 pmb->context2 = NULL;
2501 }
2502
dcf2a4e0
JS
2503 /* Check security permission status on INIT_LINK mailbox command */
2504 if ((pmb->u.mb.mbxCommand == MBX_INIT_LINK) &&
2505 (pmb->u.mb.mbxStatus == MBXERR_SEC_NO_PERMISSION))
2506 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
2507 "2860 SLI authentication is required "
2508 "for INIT_LINK but has not done yet\n");
2509
04c68496
JS
2510 if (bf_get(lpfc_mqe_command, &pmb->u.mqe) == MBX_SLI4_CONFIG)
2511 lpfc_sli4_mbox_cmd_free(phba, pmb);
2512 else
2513 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2514}
be6bb941
JS
2515 /**
2516 * lpfc_sli4_unreg_rpi_cmpl_clr - mailbox completion handler
2517 * @phba: Pointer to HBA context object.
2518 * @pmb: Pointer to mailbox object.
2519 *
2520 * This function is the unreg rpi mailbox completion handler. It
2521 * frees the memory resources associated with the completed mailbox
2522 * command. An additional refrenece is put on the ndlp to prevent
2523 * lpfc_nlp_release from freeing the rpi bit in the bitmask before
2524 * the unreg mailbox command completes, this routine puts the
2525 * reference back.
2526 *
2527 **/
2528void
2529lpfc_sli4_unreg_rpi_cmpl_clr(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2530{
2531 struct lpfc_vport *vport = pmb->vport;
2532 struct lpfc_nodelist *ndlp;
2533
2534 ndlp = pmb->context1;
2535 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2536 if (phba->sli_rev == LPFC_SLI_REV4 &&
2537 (bf_get(lpfc_sli_intf_if_type,
27d6ac0a 2538 &phba->sli4_hba.sli_intf) >=
be6bb941
JS
2539 LPFC_SLI_INTF_IF_TYPE_2)) {
2540 if (ndlp) {
2541 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
2542 "0010 UNREG_LOGIN vpi:%x "
2543 "rpi:%x DID:%x map:%x %p\n",
2544 vport->vpi, ndlp->nlp_rpi,
2545 ndlp->nlp_DID,
2546 ndlp->nlp_usg_map, ndlp);
7c5e518c 2547 ndlp->nlp_flag &= ~NLP_LOGO_ACC;
be6bb941
JS
2548 lpfc_nlp_put(ndlp);
2549 }
2550 }
2551 }
2552
2553 mempool_free(pmb, phba->mbox_mem_pool);
2554}
dea3101e 2555
e59058c4 2556/**
3621a710 2557 * lpfc_sli_handle_mb_event - Handle mailbox completions from firmware
e59058c4
JS
2558 * @phba: Pointer to HBA context object.
2559 *
2560 * This function is called with no lock held. This function processes all
2561 * the completed mailbox commands and gives it to upper layers. The interrupt
2562 * service routine processes mailbox completion interrupt and adds completed
2563 * mailbox commands to the mboxq_cmpl queue and signals the worker thread.
2564 * Worker thread call lpfc_sli_handle_mb_event, which will return the
2565 * completed mailbox commands in mboxq_cmpl queue to the upper layers. This
2566 * function returns the mailbox commands to the upper layer by calling the
2567 * completion handler function of each mailbox.
2568 **/
dea3101e 2569int
2e0fef85 2570lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 2571{
92d7f7b0 2572 MAILBOX_t *pmbox;
dea3101e 2573 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS
2574 int rc;
2575 LIST_HEAD(cmplq);
dea3101e
JB
2576
2577 phba->sli.slistat.mbox_event++;
2578
92d7f7b0
JS
2579 /* Get all completed mailboxe buffers into the cmplq */
2580 spin_lock_irq(&phba->hbalock);
2581 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
2582 spin_unlock_irq(&phba->hbalock);
dea3101e 2583
92d7f7b0
JS
2584 /* Get a Mailbox buffer to setup mailbox commands for callback */
2585 do {
2586 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
2587 if (pmb == NULL)
2588 break;
2e0fef85 2589
04c68496 2590 pmbox = &pmb->u.mb;
dea3101e 2591
858c9f6c
JS
2592 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
2593 if (pmb->vport) {
2594 lpfc_debugfs_disc_trc(pmb->vport,
2595 LPFC_DISC_TRC_MBOX_VPORT,
2596 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
2597 (uint32_t)pmbox->mbxCommand,
2598 pmbox->un.varWords[0],
2599 pmbox->un.varWords[1]);
2600 }
2601 else {
2602 lpfc_debugfs_disc_trc(phba->pport,
2603 LPFC_DISC_TRC_MBOX,
2604 "MBOX cmpl: cmd:x%x mb:x%x x%x",
2605 (uint32_t)pmbox->mbxCommand,
2606 pmbox->un.varWords[0],
2607 pmbox->un.varWords[1]);
2608 }
2609 }
2610
dea3101e
JB
2611 /*
2612 * It is a fatal error if unknown mbox command completion.
2613 */
2614 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
2615 MBX_SHUTDOWN) {
af901ca1 2616 /* Unknown mailbox command compl */
92d7f7b0 2617 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2618 "(%d):0323 Unknown Mailbox command "
a183a15f 2619 "x%x (x%x/x%x) Cmpl\n",
92d7f7b0 2620 pmb->vport ? pmb->vport->vpi : 0,
04c68496 2621 pmbox->mbxCommand,
a183a15f
JS
2622 lpfc_sli_config_mbox_subsys_get(phba,
2623 pmb),
2624 lpfc_sli_config_mbox_opcode_get(phba,
2625 pmb));
2e0fef85 2626 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
2627 phba->work_hs = HS_FFER3;
2628 lpfc_handle_eratt(phba);
92d7f7b0 2629 continue;
dea3101e
JB
2630 }
2631
dea3101e
JB
2632 if (pmbox->mbxStatus) {
2633 phba->sli.slistat.mbox_stat_err++;
2634 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
2635 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0 2636 lpfc_printf_log(phba, KERN_INFO,
a183a15f
JS
2637 LOG_MBOX | LOG_SLI,
2638 "(%d):0305 Mbox cmd cmpl "
2639 "error - RETRYing Data: x%x "
2640 "(x%x/x%x) x%x x%x x%x\n",
2641 pmb->vport ? pmb->vport->vpi : 0,
2642 pmbox->mbxCommand,
2643 lpfc_sli_config_mbox_subsys_get(phba,
2644 pmb),
2645 lpfc_sli_config_mbox_opcode_get(phba,
2646 pmb),
2647 pmbox->mbxStatus,
2648 pmbox->un.varWords[0],
2649 pmb->vport->port_state);
dea3101e
JB
2650 pmbox->mbxStatus = 0;
2651 pmbox->mbxOwner = OWN_HOST;
dea3101e 2652 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
04c68496 2653 if (rc != MBX_NOT_FINISHED)
92d7f7b0 2654 continue;
dea3101e
JB
2655 }
2656 }
2657
2658 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 2659 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 2660 "(%d):0307 Mailbox cmd x%x (x%x/x%x) Cmpl x%p "
e74c03c8
JS
2661 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
2662 "x%x x%x x%x\n",
92d7f7b0 2663 pmb->vport ? pmb->vport->vpi : 0,
dea3101e 2664 pmbox->mbxCommand,
a183a15f
JS
2665 lpfc_sli_config_mbox_subsys_get(phba, pmb),
2666 lpfc_sli_config_mbox_opcode_get(phba, pmb),
dea3101e
JB
2667 pmb->mbox_cmpl,
2668 *((uint32_t *) pmbox),
2669 pmbox->un.varWords[0],
2670 pmbox->un.varWords[1],
2671 pmbox->un.varWords[2],
2672 pmbox->un.varWords[3],
2673 pmbox->un.varWords[4],
2674 pmbox->un.varWords[5],
2675 pmbox->un.varWords[6],
e74c03c8
JS
2676 pmbox->un.varWords[7],
2677 pmbox->un.varWords[8],
2678 pmbox->un.varWords[9],
2679 pmbox->un.varWords[10]);
dea3101e 2680
92d7f7b0 2681 if (pmb->mbox_cmpl)
dea3101e 2682 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS
2683 } while (1);
2684 return 0;
2685}
dea3101e 2686
e59058c4 2687/**
3621a710 2688 * lpfc_sli_get_buff - Get the buffer associated with the buffer tag
e59058c4
JS
2689 * @phba: Pointer to HBA context object.
2690 * @pring: Pointer to driver SLI ring object.
2691 * @tag: buffer tag.
2692 *
2693 * This function is called with no lock held. When QUE_BUFTAG_BIT bit
2694 * is set in the tag the buffer is posted for a particular exchange,
2695 * the function will return the buffer without replacing the buffer.
2696 * If the buffer is for unsolicited ELS or CT traffic, this function
2697 * returns the buffer and also posts another buffer to the firmware.
2698 **/
76bb24ef
JS
2699static struct lpfc_dmabuf *
2700lpfc_sli_get_buff(struct lpfc_hba *phba,
9f1e1b50
JS
2701 struct lpfc_sli_ring *pring,
2702 uint32_t tag)
76bb24ef 2703{
9f1e1b50
JS
2704 struct hbq_dmabuf *hbq_entry;
2705
76bb24ef
JS
2706 if (tag & QUE_BUFTAG_BIT)
2707 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
9f1e1b50
JS
2708 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
2709 if (!hbq_entry)
2710 return NULL;
2711 return &hbq_entry->dbuf;
76bb24ef 2712}
57127f15 2713
3772a991
JS
2714/**
2715 * lpfc_complete_unsol_iocb - Complete an unsolicited sequence
2716 * @phba: Pointer to HBA context object.
2717 * @pring: Pointer to driver SLI ring object.
2718 * @saveq: Pointer to the iocbq struct representing the sequence starting frame.
2719 * @fch_r_ctl: the r_ctl for the first frame of the sequence.
2720 * @fch_type: the type for the first frame of the sequence.
2721 *
2722 * This function is called with no lock held. This function uses the r_ctl and
2723 * type of the received sequence to find the correct callback function to call
2724 * to process the sequence.
2725 **/
2726static int
2727lpfc_complete_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2728 struct lpfc_iocbq *saveq, uint32_t fch_r_ctl,
2729 uint32_t fch_type)
2730{
2731 int i;
2732
f358dd0c
JS
2733 switch (fch_type) {
2734 case FC_TYPE_NVME:
d613b6a7 2735 lpfc_nvmet_unsol_ls_event(phba, pring, saveq);
f358dd0c
JS
2736 return 1;
2737 default:
2738 break;
2739 }
2740
3772a991
JS
2741 /* unSolicited Responses */
2742 if (pring->prt[0].profile) {
2743 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
2744 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
2745 saveq);
2746 return 1;
2747 }
2748 /* We must search, based on rctl / type
2749 for the right routine */
2750 for (i = 0; i < pring->num_mask; i++) {
2751 if ((pring->prt[i].rctl == fch_r_ctl) &&
2752 (pring->prt[i].type == fch_type)) {
2753 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
2754 (pring->prt[i].lpfc_sli_rcv_unsol_event)
2755 (phba, pring, saveq);
2756 return 1;
2757 }
2758 }
2759 return 0;
2760}
e59058c4
JS
2761
2762/**
3621a710 2763 * lpfc_sli_process_unsol_iocb - Unsolicited iocb handler
e59058c4
JS
2764 * @phba: Pointer to HBA context object.
2765 * @pring: Pointer to driver SLI ring object.
2766 * @saveq: Pointer to the unsolicited iocb.
2767 *
2768 * This function is called with no lock held by the ring event handler
2769 * when there is an unsolicited iocb posted to the response ring by the
2770 * firmware. This function gets the buffer associated with the iocbs
2771 * and calls the event handler for the ring. This function handles both
2772 * qring buffers and hbq buffers.
2773 * When the function returns 1 the caller can free the iocb object otherwise
2774 * upper layer functions will free the iocb objects.
2775 **/
dea3101e
JB
2776static int
2777lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2778 struct lpfc_iocbq *saveq)
2779{
2780 IOCB_t * irsp;
2781 WORD5 * w5p;
2782 uint32_t Rctl, Type;
76bb24ef 2783 struct lpfc_iocbq *iocbq;
3163f725 2784 struct lpfc_dmabuf *dmzbuf;
dea3101e 2785
dea3101e 2786 irsp = &(saveq->iocb);
57127f15
JS
2787
2788 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
2789 if (pring->lpfc_sli_rcv_async_status)
2790 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
2791 else
2792 lpfc_printf_log(phba,
2793 KERN_WARNING,
2794 LOG_SLI,
2795 "0316 Ring %d handler: unexpected "
2796 "ASYNC_STATUS iocb received evt_code "
2797 "0x%x\n",
2798 pring->ringno,
2799 irsp->un.asyncstat.evt_code);
2800 return 1;
2801 }
2802
3163f725
JS
2803 if ((irsp->ulpCommand == CMD_IOCB_RET_XRI64_CX) &&
2804 (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)) {
2805 if (irsp->ulpBdeCount > 0) {
2806 dmzbuf = lpfc_sli_get_buff(phba, pring,
2807 irsp->un.ulpWord[3]);
2808 lpfc_in_buf_free(phba, dmzbuf);
2809 }
2810
2811 if (irsp->ulpBdeCount > 1) {
2812 dmzbuf = lpfc_sli_get_buff(phba, pring,
2813 irsp->unsli3.sli3Words[3]);
2814 lpfc_in_buf_free(phba, dmzbuf);
2815 }
2816
2817 if (irsp->ulpBdeCount > 2) {
2818 dmzbuf = lpfc_sli_get_buff(phba, pring,
2819 irsp->unsli3.sli3Words[7]);
2820 lpfc_in_buf_free(phba, dmzbuf);
2821 }
2822
2823 return 1;
2824 }
2825
92d7f7b0 2826 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS
2827 if (irsp->ulpBdeCount != 0) {
2828 saveq->context2 = lpfc_sli_get_buff(phba, pring,
2829 irsp->un.ulpWord[3]);
2830 if (!saveq->context2)
2831 lpfc_printf_log(phba,
2832 KERN_ERR,
2833 LOG_SLI,
2834 "0341 Ring %d Cannot find buffer for "
2835 "an unsolicited iocb. tag 0x%x\n",
2836 pring->ringno,
2837 irsp->un.ulpWord[3]);
76bb24ef
JS
2838 }
2839 if (irsp->ulpBdeCount == 2) {
2840 saveq->context3 = lpfc_sli_get_buff(phba, pring,
2841 irsp->unsli3.sli3Words[7]);
2842 if (!saveq->context3)
2843 lpfc_printf_log(phba,
2844 KERN_ERR,
2845 LOG_SLI,
2846 "0342 Ring %d Cannot find buffer for an"
2847 " unsolicited iocb. tag 0x%x\n",
2848 pring->ringno,
2849 irsp->unsli3.sli3Words[7]);
2850 }
2851 list_for_each_entry(iocbq, &saveq->list, list) {
76bb24ef 2852 irsp = &(iocbq->iocb);
76bb24ef
JS
2853 if (irsp->ulpBdeCount != 0) {
2854 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
2855 irsp->un.ulpWord[3]);
9c2face6 2856 if (!iocbq->context2)
76bb24ef
JS
2857 lpfc_printf_log(phba,
2858 KERN_ERR,
2859 LOG_SLI,
2860 "0343 Ring %d Cannot find "
2861 "buffer for an unsolicited iocb"
2862 ". tag 0x%x\n", pring->ringno,
92d7f7b0 2863 irsp->un.ulpWord[3]);
76bb24ef
JS
2864 }
2865 if (irsp->ulpBdeCount == 2) {
2866 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 2867 irsp->unsli3.sli3Words[7]);
9c2face6 2868 if (!iocbq->context3)
76bb24ef
JS
2869 lpfc_printf_log(phba,
2870 KERN_ERR,
2871 LOG_SLI,
2872 "0344 Ring %d Cannot find "
2873 "buffer for an unsolicited "
2874 "iocb. tag 0x%x\n",
2875 pring->ringno,
2876 irsp->unsli3.sli3Words[7]);
2877 }
2878 }
92d7f7b0 2879 }
9c2face6
JS
2880 if (irsp->ulpBdeCount != 0 &&
2881 (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
2882 irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
2883 int found = 0;
2884
2885 /* search continue save q for same XRI */
2886 list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
7851fe2c
JS
2887 if (iocbq->iocb.unsli3.rcvsli3.ox_id ==
2888 saveq->iocb.unsli3.rcvsli3.ox_id) {
9c2face6
JS
2889 list_add_tail(&saveq->list, &iocbq->list);
2890 found = 1;
2891 break;
2892 }
2893 }
2894 if (!found)
2895 list_add_tail(&saveq->clist,
2896 &pring->iocb_continue_saveq);
2897 if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
2898 list_del_init(&iocbq->clist);
2899 saveq = iocbq;
2900 irsp = &(saveq->iocb);
2901 } else
2902 return 0;
2903 }
2904 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
2905 (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
2906 (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
6a9c52cf
JS
2907 Rctl = FC_RCTL_ELS_REQ;
2908 Type = FC_TYPE_ELS;
9c2face6
JS
2909 } else {
2910 w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
2911 Rctl = w5p->hcsw.Rctl;
2912 Type = w5p->hcsw.Type;
2913
2914 /* Firmware Workaround */
2915 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
2916 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
2917 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
6a9c52cf
JS
2918 Rctl = FC_RCTL_ELS_REQ;
2919 Type = FC_TYPE_ELS;
9c2face6
JS
2920 w5p->hcsw.Rctl = Rctl;
2921 w5p->hcsw.Type = Type;
2922 }
2923 }
92d7f7b0 2924
3772a991 2925 if (!lpfc_complete_unsol_iocb(phba, pring, saveq, Rctl, Type))
92d7f7b0 2926 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 2927 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 2928 "Type x%x received\n",
e8b62011 2929 pring->ringno, Rctl, Type);
3772a991 2930
92d7f7b0 2931 return 1;
dea3101e
JB
2932}
2933
e59058c4 2934/**
3621a710 2935 * lpfc_sli_iocbq_lookup - Find command iocb for the given response iocb
e59058c4
JS
2936 * @phba: Pointer to HBA context object.
2937 * @pring: Pointer to driver SLI ring object.
2938 * @prspiocb: Pointer to response iocb object.
2939 *
2940 * This function looks up the iocb_lookup table to get the command iocb
2941 * corresponding to the given response iocb using the iotag of the
341b2aa8
DK
2942 * response iocb. This function is called with the hbalock held
2943 * for sli3 devices or the ring_lock for sli4 devices.
e59058c4
JS
2944 * This function returns the command iocb object if it finds the command
2945 * iocb else returns NULL.
2946 **/
dea3101e 2947static struct lpfc_iocbq *
2e0fef85
JS
2948lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
2949 struct lpfc_sli_ring *pring,
2950 struct lpfc_iocbq *prspiocb)
dea3101e 2951{
dea3101e
JB
2952 struct lpfc_iocbq *cmd_iocb = NULL;
2953 uint16_t iotag;
1c2ba475 2954 lockdep_assert_held(&phba->hbalock);
dea3101e 2955
604a3e30
JB
2956 iotag = prspiocb->iocb.ulpIoTag;
2957
2958 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
2959 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6 2960 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
89533e9b
JS
2961 /* remove from txcmpl queue list */
2962 list_del_init(&cmd_iocb->list);
4f2e66c6 2963 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
89533e9b 2964 return cmd_iocb;
2a9bf3d0 2965 }
dea3101e
JB
2966 }
2967
dea3101e 2968 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
89533e9b 2969 "0317 iotag x%x is out of "
604a3e30 2970 "range: max iotag x%x wd0 x%x\n",
e8b62011 2971 iotag, phba->sli.last_iotag,
604a3e30 2972 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB
2973 return NULL;
2974}
2975
3772a991
JS
2976/**
2977 * lpfc_sli_iocbq_lookup_by_tag - Find command iocb for the iotag
2978 * @phba: Pointer to HBA context object.
2979 * @pring: Pointer to driver SLI ring object.
2980 * @iotag: IOCB tag.
2981 *
2982 * This function looks up the iocb_lookup table to get the command iocb
2983 * corresponding to the given iotag. This function is called with the
2984 * hbalock held.
2985 * This function returns the command iocb object if it finds the command
2986 * iocb else returns NULL.
2987 **/
2988static struct lpfc_iocbq *
2989lpfc_sli_iocbq_lookup_by_tag(struct lpfc_hba *phba,
2990 struct lpfc_sli_ring *pring, uint16_t iotag)
2991{
895427bd 2992 struct lpfc_iocbq *cmd_iocb = NULL;
3772a991 2993
1c2ba475 2994 lockdep_assert_held(&phba->hbalock);
3772a991
JS
2995 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
2996 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6
JS
2997 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
2998 /* remove from txcmpl queue list */
2999 list_del_init(&cmd_iocb->list);
3000 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
4f2e66c6 3001 return cmd_iocb;
2a9bf3d0 3002 }
3772a991 3003 }
89533e9b 3004
3772a991 3005 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd
JS
3006 "0372 iotag x%x lookup error: max iotag (x%x) "
3007 "iocb_flag x%x\n",
3008 iotag, phba->sli.last_iotag,
3009 cmd_iocb ? cmd_iocb->iocb_flag : 0xffff);
3772a991
JS
3010 return NULL;
3011}
3012
e59058c4 3013/**
3621a710 3014 * lpfc_sli_process_sol_iocb - process solicited iocb completion
e59058c4
JS
3015 * @phba: Pointer to HBA context object.
3016 * @pring: Pointer to driver SLI ring object.
3017 * @saveq: Pointer to the response iocb to be processed.
3018 *
3019 * This function is called by the ring event handler for non-fcp
3020 * rings when there is a new response iocb in the response ring.
3021 * The caller is not required to hold any locks. This function
3022 * gets the command iocb associated with the response iocb and
3023 * calls the completion handler for the command iocb. If there
3024 * is no completion handler, the function will free the resources
3025 * associated with command iocb. If the response iocb is for
3026 * an already aborted command iocb, the status of the completion
3027 * is changed to IOSTAT_LOCAL_REJECT/IOERR_SLI_ABORTED.
3028 * This function always returns 1.
3029 **/
dea3101e 3030static int
2e0fef85 3031lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB
3032 struct lpfc_iocbq *saveq)
3033{
2e0fef85 3034 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB
3035 int rc = 1;
3036 unsigned long iflag;
3037
3038 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
341b2aa8
DK
3039 if (phba->sli_rev == LPFC_SLI_REV4)
3040 spin_lock_irqsave(&pring->ring_lock, iflag);
3041 else
3042 spin_lock_irqsave(&phba->hbalock, iflag);
604a3e30 3043 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
341b2aa8
DK
3044 if (phba->sli_rev == LPFC_SLI_REV4)
3045 spin_unlock_irqrestore(&pring->ring_lock, iflag);
3046 else
3047 spin_unlock_irqrestore(&phba->hbalock, iflag);
2e0fef85 3048
dea3101e
JB
3049 if (cmdiocbp) {
3050 if (cmdiocbp->iocb_cmpl) {
ea2151b4
JS
3051 /*
3052 * If an ELS command failed send an event to mgmt
3053 * application.
3054 */
3055 if (saveq->iocb.ulpStatus &&
3056 (pring->ringno == LPFC_ELS_RING) &&
3057 (cmdiocbp->iocb.ulpCommand ==
3058 CMD_ELS_REQUEST64_CR))
3059 lpfc_send_els_failure_event(phba,
3060 cmdiocbp, saveq);
3061
dea3101e
JB
3062 /*
3063 * Post all ELS completions to the worker thread.
3064 * All other are passed to the completion callback.
3065 */
3066 if (pring->ringno == LPFC_ELS_RING) {
341af102
JS
3067 if ((phba->sli_rev < LPFC_SLI_REV4) &&
3068 (cmdiocbp->iocb_flag &
3069 LPFC_DRIVER_ABORTED)) {
3070 spin_lock_irqsave(&phba->hbalock,
3071 iflag);
07951076
JS
3072 cmdiocbp->iocb_flag &=
3073 ~LPFC_DRIVER_ABORTED;
341af102
JS
3074 spin_unlock_irqrestore(&phba->hbalock,
3075 iflag);
07951076
JS
3076 saveq->iocb.ulpStatus =
3077 IOSTAT_LOCAL_REJECT;
3078 saveq->iocb.un.ulpWord[4] =
3079 IOERR_SLI_ABORTED;
0ff10d46
JS
3080
3081 /* Firmware could still be in progress
3082 * of DMAing payload, so don't free data
3083 * buffer till after a hbeat.
3084 */
341af102
JS
3085 spin_lock_irqsave(&phba->hbalock,
3086 iflag);
0ff10d46 3087 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
341af102
JS
3088 spin_unlock_irqrestore(&phba->hbalock,
3089 iflag);
3090 }
0f65ff68
JS
3091 if (phba->sli_rev == LPFC_SLI_REV4) {
3092 if (saveq->iocb_flag &
3093 LPFC_EXCHANGE_BUSY) {
3094 /* Set cmdiocb flag for the
3095 * exchange busy so sgl (xri)
3096 * will not be released until
3097 * the abort xri is received
3098 * from hba.
3099 */
3100 spin_lock_irqsave(
3101 &phba->hbalock, iflag);
3102 cmdiocbp->iocb_flag |=
3103 LPFC_EXCHANGE_BUSY;
3104 spin_unlock_irqrestore(
3105 &phba->hbalock, iflag);
3106 }
3107 if (cmdiocbp->iocb_flag &
3108 LPFC_DRIVER_ABORTED) {
3109 /*
3110 * Clear LPFC_DRIVER_ABORTED
3111 * bit in case it was driver
3112 * initiated abort.
3113 */
3114 spin_lock_irqsave(
3115 &phba->hbalock, iflag);
3116 cmdiocbp->iocb_flag &=
3117 ~LPFC_DRIVER_ABORTED;
3118 spin_unlock_irqrestore(
3119 &phba->hbalock, iflag);
3120 cmdiocbp->iocb.ulpStatus =
3121 IOSTAT_LOCAL_REJECT;
3122 cmdiocbp->iocb.un.ulpWord[4] =
3123 IOERR_ABORT_REQUESTED;
3124 /*
3125 * For SLI4, irsiocb contains
3126 * NO_XRI in sli_xritag, it
3127 * shall not affect releasing
3128 * sgl (xri) process.
3129 */
3130 saveq->iocb.ulpStatus =
3131 IOSTAT_LOCAL_REJECT;
3132 saveq->iocb.un.ulpWord[4] =
3133 IOERR_SLI_ABORTED;
3134 spin_lock_irqsave(
3135 &phba->hbalock, iflag);
3136 saveq->iocb_flag |=
3137 LPFC_DELAY_MEM_FREE;
3138 spin_unlock_irqrestore(
3139 &phba->hbalock, iflag);
3140 }
07951076 3141 }
dea3101e 3142 }
2e0fef85 3143 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB
3144 } else
3145 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB
3146 } else {
3147 /*
3148 * Unknown initiating command based on the response iotag.
3149 * This could be the case on the ELS ring because of
3150 * lpfc_els_abort().
3151 */
3152 if (pring->ringno != LPFC_ELS_RING) {
3153 /*
3154 * Ring <ringno> handler: unexpected completion IoTag
3155 * <IoTag>
3156 */
a257bf90 3157 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
3158 "0322 Ring %d handler: "
3159 "unexpected completion IoTag x%x "
3160 "Data: x%x x%x x%x x%x\n",
3161 pring->ringno,
3162 saveq->iocb.ulpIoTag,
3163 saveq->iocb.ulpStatus,
3164 saveq->iocb.un.ulpWord[4],
3165 saveq->iocb.ulpCommand,
3166 saveq->iocb.ulpContext);
dea3101e
JB
3167 }
3168 }
68876920 3169
dea3101e
JB
3170 return rc;
3171}
3172
e59058c4 3173/**
3621a710 3174 * lpfc_sli_rsp_pointers_error - Response ring pointer error handler
e59058c4
JS
3175 * @phba: Pointer to HBA context object.
3176 * @pring: Pointer to driver SLI ring object.
3177 *
3178 * This function is called from the iocb ring event handlers when
3179 * put pointer is ahead of the get pointer for a ring. This function signal
3180 * an error attention condition to the worker thread and the worker
3181 * thread will transition the HBA to offline state.
3182 **/
2e0fef85
JS
3183static void
3184lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 3185{
34b02dcd 3186 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
875fbdfe 3187 /*
025dfdaf 3188 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
875fbdfe
JSEC
3189 * rsp ring <portRspMax>
3190 */
3191 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3192 "0312 Ring %d handler: portRspPut %d "
025dfdaf 3193 "is bigger than rsp ring %d\n",
e8b62011 3194 pring->ringno, le32_to_cpu(pgp->rspPutInx),
7e56aa25 3195 pring->sli.sli3.numRiocb);
875fbdfe 3196
2e0fef85 3197 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC
3198
3199 /*
3200 * All error attention handlers are posted to
3201 * worker thread
3202 */
3203 phba->work_ha |= HA_ERATT;
3204 phba->work_hs = HS_FFER3;
92d7f7b0 3205
5e9d9b82 3206 lpfc_worker_wake_up(phba);
875fbdfe
JSEC
3207
3208 return;
3209}
3210
9399627f 3211/**
3621a710 3212 * lpfc_poll_eratt - Error attention polling timer timeout handler
9399627f
JS
3213 * @ptr: Pointer to address of HBA context object.
3214 *
3215 * This function is invoked by the Error Attention polling timer when the
3216 * timer times out. It will check the SLI Error Attention register for
3217 * possible attention events. If so, it will post an Error Attention event
3218 * and wake up worker thread to process it. Otherwise, it will set up the
3219 * Error Attention polling timer for the next poll.
3220 **/
f22eb4d3 3221void lpfc_poll_eratt(struct timer_list *t)
9399627f
JS
3222{
3223 struct lpfc_hba *phba;
eb016566 3224 uint32_t eratt = 0;
aa6fbb75 3225 uint64_t sli_intr, cnt;
9399627f 3226
f22eb4d3 3227 phba = from_timer(phba, t, eratt_poll);
9399627f 3228
aa6fbb75
JS
3229 /* Here we will also keep track of interrupts per sec of the hba */
3230 sli_intr = phba->sli.slistat.sli_intr;
3231
3232 if (phba->sli.slistat.sli_prev_intr > sli_intr)
3233 cnt = (((uint64_t)(-1) - phba->sli.slistat.sli_prev_intr) +
3234 sli_intr);
3235 else
3236 cnt = (sli_intr - phba->sli.slistat.sli_prev_intr);
3237
65791f1f
JS
3238 /* 64-bit integer division not supported on 32-bit x86 - use do_div */
3239 do_div(cnt, phba->eratt_poll_interval);
aa6fbb75
JS
3240 phba->sli.slistat.sli_ips = cnt;
3241
3242 phba->sli.slistat.sli_prev_intr = sli_intr;
3243
9399627f
JS
3244 /* Check chip HA register for error event */
3245 eratt = lpfc_sli_check_eratt(phba);
3246
3247 if (eratt)
3248 /* Tell the worker thread there is work to do */
3249 lpfc_worker_wake_up(phba);
3250 else
3251 /* Restart the timer for next eratt poll */
256ec0d0
JS
3252 mod_timer(&phba->eratt_poll,
3253 jiffies +
65791f1f 3254 msecs_to_jiffies(1000 * phba->eratt_poll_interval));
9399627f
JS
3255 return;
3256}
3257
875fbdfe 3258
e59058c4 3259/**
3621a710 3260 * lpfc_sli_handle_fast_ring_event - Handle ring events on FCP ring
e59058c4
JS
3261 * @phba: Pointer to HBA context object.
3262 * @pring: Pointer to driver SLI ring object.
3263 * @mask: Host attention register mask for this ring.
3264 *
3265 * This function is called from the interrupt context when there is a ring
3266 * event for the fcp ring. The caller does not hold any lock.
3267 * The function processes each response iocb in the response ring until it
25985edc 3268 * finds an iocb with LE bit set and chains all the iocbs up to the iocb with
e59058c4
JS
3269 * LE bit set. The function will call the completion handler of the command iocb
3270 * if the response iocb indicates a completion for a command iocb or it is
3271 * an abort completion. The function will call lpfc_sli_process_unsol_iocb
3272 * function if this is an unsolicited iocb.
dea3101e 3273 * This routine presumes LPFC_FCP_RING handling and doesn't bother
45ed1190
JS
3274 * to check it explicitly.
3275 */
3276int
2e0fef85
JS
3277lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
3278 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3279{
34b02dcd 3280 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
dea3101e 3281 IOCB_t *irsp = NULL;
87f6eaff 3282 IOCB_t *entry = NULL;
dea3101e
JB
3283 struct lpfc_iocbq *cmdiocbq = NULL;
3284 struct lpfc_iocbq rspiocbq;
dea3101e
JB
3285 uint32_t status;
3286 uint32_t portRspPut, portRspMax;
3287 int rc = 1;
3288 lpfc_iocb_type type;
3289 unsigned long iflag;
3290 uint32_t rsp_cmpl = 0;
dea3101e 3291
2e0fef85 3292 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3293 pring->stats.iocb_event++;
3294
dea3101e
JB
3295 /*
3296 * The next available response entry should never exceed the maximum
3297 * entries. If it does, treat it as an adapter hardware error.
3298 */
7e56aa25 3299 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3300 portRspPut = le32_to_cpu(pgp->rspPutInx);
3301 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 3302 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 3303 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3304 return 1;
3305 }
45ed1190
JS
3306 if (phba->fcp_ring_in_use) {
3307 spin_unlock_irqrestore(&phba->hbalock, iflag);
3308 return 1;
3309 } else
3310 phba->fcp_ring_in_use = 1;
dea3101e
JB
3311
3312 rmb();
7e56aa25 3313 while (pring->sli.sli3.rspidx != portRspPut) {
87f6eaff
JSEC
3314 /*
3315 * Fetch an entry off the ring and copy it into a local data
3316 * structure. The copy involves a byte-swap since the
3317 * network byte order and pci byte orders are different.
3318 */
ed957684 3319 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 3320 phba->last_completion_time = jiffies;
875fbdfe 3321
7e56aa25
JS
3322 if (++pring->sli.sli3.rspidx >= portRspMax)
3323 pring->sli.sli3.rspidx = 0;
875fbdfe 3324
87f6eaff
JSEC
3325 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
3326 (uint32_t *) &rspiocbq.iocb,
ed957684 3327 phba->iocb_rsp_size);
a4bc3379 3328 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC
3329 irsp = &rspiocbq.iocb;
3330
dea3101e
JB
3331 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
3332 pring->stats.iocb_rsp++;
3333 rsp_cmpl++;
3334
3335 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS
3336 /*
3337 * If resource errors reported from HBA, reduce
3338 * queuedepths of the SCSI device.
3339 */
3340 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3341 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3342 IOERR_NO_RESOURCES)) {
92d7f7b0 3343 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3344 phba->lpfc_rampdown_queue_depth(phba);
92d7f7b0
JS
3345 spin_lock_irqsave(&phba->hbalock, iflag);
3346 }
3347
dea3101e
JB
3348 /* Rsp ring <ringno> error: IOCB */
3349 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3350 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 3351 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 3352 pring->ringno,
92d7f7b0
JS
3353 irsp->un.ulpWord[0],
3354 irsp->un.ulpWord[1],
3355 irsp->un.ulpWord[2],
3356 irsp->un.ulpWord[3],
3357 irsp->un.ulpWord[4],
3358 irsp->un.ulpWord[5],
d7c255b2
JS
3359 *(uint32_t *)&irsp->un1,
3360 *((uint32_t *)&irsp->un1 + 1));
dea3101e
JB
3361 }
3362
3363 switch (type) {
3364 case LPFC_ABORT_IOCB:
3365 case LPFC_SOL_IOCB:
3366 /*
3367 * Idle exchange closed via ABTS from port. No iocb
3368 * resources need to be recovered.
3369 */
3370 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 3371 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3372 "0333 IOCB cmd 0x%x"
dca9479b 3373 " processed. Skipping"
92d7f7b0 3374 " completion\n",
dca9479b 3375 irsp->ulpCommand);
dea3101e
JB
3376 break;
3377 }
3378
604a3e30
JB
3379 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
3380 &rspiocbq);
0f65ff68
JS
3381 if (unlikely(!cmdiocbq))
3382 break;
3383 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED)
3384 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3385 if (cmdiocbq->iocb_cmpl) {
3386 spin_unlock_irqrestore(&phba->hbalock, iflag);
3387 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
3388 &rspiocbq);
3389 spin_lock_irqsave(&phba->hbalock, iflag);
3390 }
dea3101e 3391 break;
a4bc3379 3392 case LPFC_UNSOL_IOCB:
2e0fef85 3393 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 3394 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 3395 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 3396 break;
dea3101e
JB
3397 default:
3398 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3399 char adaptermsg[LPFC_MAX_ADPTMSG];
3400 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3401 memcpy(&adaptermsg[0], (uint8_t *) irsp,
3402 MAX_MSG_DATA);
898eb71c
JP
3403 dev_warn(&((phba->pcidev)->dev),
3404 "lpfc%d: %s\n",
dea3101e
JB
3405 phba->brd_no, adaptermsg);
3406 } else {
3407 /* Unknown IOCB command */
3408 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3409 "0334 Unknown IOCB command "
92d7f7b0 3410 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 3411 type, irsp->ulpCommand,
92d7f7b0
JS
3412 irsp->ulpStatus,
3413 irsp->ulpIoTag,
3414 irsp->ulpContext);
dea3101e
JB
3415 }
3416 break;
3417 }
3418
3419 /*
3420 * The response IOCB has been processed. Update the ring
3421 * pointer in SLIM. If the port response put pointer has not
3422 * been updated, sync the pgp->rspPutInx and fetch the new port
3423 * response put pointer.
3424 */
7e56aa25
JS
3425 writel(pring->sli.sli3.rspidx,
3426 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3427
7e56aa25 3428 if (pring->sli.sli3.rspidx == portRspPut)
dea3101e
JB
3429 portRspPut = le32_to_cpu(pgp->rspPutInx);
3430 }
3431
3432 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
3433 pring->stats.iocb_rsp_full++;
3434 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3435 writel(status, phba->CAregaddr);
3436 readl(phba->CAregaddr);
3437 }
3438 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3439 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3440 pring->stats.iocb_cmd_empty++;
3441
3442 /* Force update of the local copy of cmdGetInx */
7e56aa25 3443 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3444 lpfc_sli_resume_iocb(phba, pring);
3445
3446 if ((pring->lpfc_sli_cmd_available))
3447 (pring->lpfc_sli_cmd_available) (phba, pring);
3448
3449 }
3450
45ed1190 3451 phba->fcp_ring_in_use = 0;
2e0fef85 3452 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3453 return rc;
3454}
3455
e59058c4 3456/**
3772a991
JS
3457 * lpfc_sli_sp_handle_rspiocb - Handle slow-path response iocb
3458 * @phba: Pointer to HBA context object.
3459 * @pring: Pointer to driver SLI ring object.
3460 * @rspiocbp: Pointer to driver response IOCB object.
3461 *
3462 * This function is called from the worker thread when there is a slow-path
3463 * response IOCB to process. This function chains all the response iocbs until
3464 * seeing the iocb with the LE bit set. The function will call
3465 * lpfc_sli_process_sol_iocb function if the response iocb indicates a
3466 * completion of a command iocb. The function will call the
3467 * lpfc_sli_process_unsol_iocb function if this is an unsolicited iocb.
3468 * The function frees the resources or calls the completion handler if this
3469 * iocb is an abort completion. The function returns NULL when the response
3470 * iocb has the LE bit set and all the chained iocbs are processed, otherwise
3471 * this function shall chain the iocb on to the iocb_continueq and return the
3472 * response iocb passed in.
3473 **/
3474static struct lpfc_iocbq *
3475lpfc_sli_sp_handle_rspiocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3476 struct lpfc_iocbq *rspiocbp)
3477{
3478 struct lpfc_iocbq *saveq;
3479 struct lpfc_iocbq *cmdiocbp;
3480 struct lpfc_iocbq *next_iocb;
3481 IOCB_t *irsp = NULL;
3482 uint32_t free_saveq;
3483 uint8_t iocb_cmd_type;
3484 lpfc_iocb_type type;
3485 unsigned long iflag;
3486 int rc;
3487
3488 spin_lock_irqsave(&phba->hbalock, iflag);
3489 /* First add the response iocb to the countinueq list */
3490 list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
3491 pring->iocb_continueq_cnt++;
3492
70f23fd6 3493 /* Now, determine whether the list is completed for processing */
3772a991
JS
3494 irsp = &rspiocbp->iocb;
3495 if (irsp->ulpLe) {
3496 /*
3497 * By default, the driver expects to free all resources
3498 * associated with this iocb completion.
3499 */
3500 free_saveq = 1;
3501 saveq = list_get_first(&pring->iocb_continueq,
3502 struct lpfc_iocbq, list);
3503 irsp = &(saveq->iocb);
3504 list_del_init(&pring->iocb_continueq);
3505 pring->iocb_continueq_cnt = 0;
3506
3507 pring->stats.iocb_rsp++;
3508
3509 /*
3510 * If resource errors reported from HBA, reduce
3511 * queuedepths of the SCSI device.
3512 */
3513 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3514 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3515 IOERR_NO_RESOURCES)) {
3772a991
JS
3516 spin_unlock_irqrestore(&phba->hbalock, iflag);
3517 phba->lpfc_rampdown_queue_depth(phba);
3518 spin_lock_irqsave(&phba->hbalock, iflag);
3519 }
3520
3521 if (irsp->ulpStatus) {
3522 /* Rsp ring <ringno> error: IOCB */
3523 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
3524 "0328 Rsp Ring %d error: "
3525 "IOCB Data: "
3526 "x%x x%x x%x x%x "
3527 "x%x x%x x%x x%x "
3528 "x%x x%x x%x x%x "
3529 "x%x x%x x%x x%x\n",
3530 pring->ringno,
3531 irsp->un.ulpWord[0],
3532 irsp->un.ulpWord[1],
3533 irsp->un.ulpWord[2],
3534 irsp->un.ulpWord[3],
3535 irsp->un.ulpWord[4],
3536 irsp->un.ulpWord[5],
3537 *(((uint32_t *) irsp) + 6),
3538 *(((uint32_t *) irsp) + 7),
3539 *(((uint32_t *) irsp) + 8),
3540 *(((uint32_t *) irsp) + 9),
3541 *(((uint32_t *) irsp) + 10),
3542 *(((uint32_t *) irsp) + 11),
3543 *(((uint32_t *) irsp) + 12),
3544 *(((uint32_t *) irsp) + 13),
3545 *(((uint32_t *) irsp) + 14),
3546 *(((uint32_t *) irsp) + 15));
3547 }
3548
3549 /*
3550 * Fetch the IOCB command type and call the correct completion
3551 * routine. Solicited and Unsolicited IOCBs on the ELS ring
3552 * get freed back to the lpfc_iocb_list by the discovery
3553 * kernel thread.
3554 */
3555 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
3556 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
3557 switch (type) {
3558 case LPFC_SOL_IOCB:
3559 spin_unlock_irqrestore(&phba->hbalock, iflag);
3560 rc = lpfc_sli_process_sol_iocb(phba, pring, saveq);
3561 spin_lock_irqsave(&phba->hbalock, iflag);
3562 break;
3563
3564 case LPFC_UNSOL_IOCB:
3565 spin_unlock_irqrestore(&phba->hbalock, iflag);
3566 rc = lpfc_sli_process_unsol_iocb(phba, pring, saveq);
3567 spin_lock_irqsave(&phba->hbalock, iflag);
3568 if (!rc)
3569 free_saveq = 0;
3570 break;
3571
3572 case LPFC_ABORT_IOCB:
3573 cmdiocbp = NULL;
3574 if (irsp->ulpCommand != CMD_XRI_ABORTED_CX)
3575 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring,
3576 saveq);
3577 if (cmdiocbp) {
3578 /* Call the specified completion routine */
3579 if (cmdiocbp->iocb_cmpl) {
3580 spin_unlock_irqrestore(&phba->hbalock,
3581 iflag);
3582 (cmdiocbp->iocb_cmpl)(phba, cmdiocbp,
3583 saveq);
3584 spin_lock_irqsave(&phba->hbalock,
3585 iflag);
3586 } else
3587 __lpfc_sli_release_iocbq(phba,
3588 cmdiocbp);
3589 }
3590 break;
3591
3592 case LPFC_UNKNOWN_IOCB:
3593 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3594 char adaptermsg[LPFC_MAX_ADPTMSG];
3595 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3596 memcpy(&adaptermsg[0], (uint8_t *)irsp,
3597 MAX_MSG_DATA);
3598 dev_warn(&((phba->pcidev)->dev),
3599 "lpfc%d: %s\n",
3600 phba->brd_no, adaptermsg);
3601 } else {
3602 /* Unknown IOCB command */
3603 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3604 "0335 Unknown IOCB "
3605 "command Data: x%x "
3606 "x%x x%x x%x\n",
3607 irsp->ulpCommand,
3608 irsp->ulpStatus,
3609 irsp->ulpIoTag,
3610 irsp->ulpContext);
3611 }
3612 break;
3613 }
3614
3615 if (free_saveq) {
3616 list_for_each_entry_safe(rspiocbp, next_iocb,
3617 &saveq->list, list) {
61f35bff 3618 list_del_init(&rspiocbp->list);
3772a991
JS
3619 __lpfc_sli_release_iocbq(phba, rspiocbp);
3620 }
3621 __lpfc_sli_release_iocbq(phba, saveq);
3622 }
3623 rspiocbp = NULL;
3624 }
3625 spin_unlock_irqrestore(&phba->hbalock, iflag);
3626 return rspiocbp;
3627}
3628
3629/**
3630 * lpfc_sli_handle_slow_ring_event - Wrapper func for handling slow-path iocbs
e59058c4
JS
3631 * @phba: Pointer to HBA context object.
3632 * @pring: Pointer to driver SLI ring object.
3633 * @mask: Host attention register mask for this ring.
3634 *
3772a991
JS
3635 * This routine wraps the actual slow_ring event process routine from the
3636 * API jump table function pointer from the lpfc_hba struct.
e59058c4 3637 **/
3772a991 3638void
2e0fef85
JS
3639lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
3640 struct lpfc_sli_ring *pring, uint32_t mask)
3772a991
JS
3641{
3642 phba->lpfc_sli_handle_slow_ring_event(phba, pring, mask);
3643}
3644
3645/**
3646 * lpfc_sli_handle_slow_ring_event_s3 - Handle SLI3 ring event for non-FCP rings
3647 * @phba: Pointer to HBA context object.
3648 * @pring: Pointer to driver SLI ring object.
3649 * @mask: Host attention register mask for this ring.
3650 *
3651 * This function is called from the worker thread when there is a ring event
3652 * for non-fcp rings. The caller does not hold any lock. The function will
3653 * remove each response iocb in the response ring and calls the handle
3654 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3655 **/
3656static void
3657lpfc_sli_handle_slow_ring_event_s3(struct lpfc_hba *phba,
3658 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3659{
34b02dcd 3660 struct lpfc_pgp *pgp;
dea3101e
JB
3661 IOCB_t *entry;
3662 IOCB_t *irsp = NULL;
3663 struct lpfc_iocbq *rspiocbp = NULL;
dea3101e 3664 uint32_t portRspPut, portRspMax;
dea3101e 3665 unsigned long iflag;
3772a991 3666 uint32_t status;
dea3101e 3667
34b02dcd 3668 pgp = &phba->port_gp[pring->ringno];
2e0fef85 3669 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3670 pring->stats.iocb_event++;
3671
dea3101e
JB
3672 /*
3673 * The next available response entry should never exceed the maximum
3674 * entries. If it does, treat it as an adapter hardware error.
3675 */
7e56aa25 3676 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3677 portRspPut = le32_to_cpu(pgp->rspPutInx);
3678 if (portRspPut >= portRspMax) {
3679 /*
025dfdaf 3680 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
dea3101e
JB
3681 * rsp ring <portRspMax>
3682 */
ed957684 3683 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3684 "0303 Ring %d handler: portRspPut %d "
025dfdaf 3685 "is bigger than rsp ring %d\n",
e8b62011 3686 pring->ringno, portRspPut, portRspMax);
dea3101e 3687
2e0fef85
JS
3688 phba->link_state = LPFC_HBA_ERROR;
3689 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3690
3691 phba->work_hs = HS_FFER3;
3692 lpfc_handle_eratt(phba);
3693
3772a991 3694 return;
dea3101e
JB
3695 }
3696
3697 rmb();
7e56aa25 3698 while (pring->sli.sli3.rspidx != portRspPut) {
dea3101e
JB
3699 /*
3700 * Build a completion list and call the appropriate handler.
3701 * The process is to get the next available response iocb, get
3702 * a free iocb from the list, copy the response data into the
3703 * free iocb, insert to the continuation list, and update the
3704 * next response index to slim. This process makes response
3705 * iocb's in the ring available to DMA as fast as possible but
3706 * pays a penalty for a copy operation. Since the iocb is
3707 * only 32 bytes, this penalty is considered small relative to
3708 * the PCI reads for register values and a slim write. When
3709 * the ulpLe field is set, the entire Command has been
3710 * received.
3711 */
ed957684
JS
3712 entry = lpfc_resp_iocb(phba, pring);
3713
858c9f6c 3714 phba->last_completion_time = jiffies;
2e0fef85 3715 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
3716 if (rspiocbp == NULL) {
3717 printk(KERN_ERR "%s: out of buffers! Failing "
cadbd4a5 3718 "completion.\n", __func__);
dea3101e
JB
3719 break;
3720 }
3721
ed957684
JS
3722 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
3723 phba->iocb_rsp_size);
dea3101e
JB
3724 irsp = &rspiocbp->iocb;
3725
7e56aa25
JS
3726 if (++pring->sli.sli3.rspidx >= portRspMax)
3727 pring->sli.sli3.rspidx = 0;
dea3101e 3728
a58cbd52
JS
3729 if (pring->ringno == LPFC_ELS_RING) {
3730 lpfc_debugfs_slow_ring_trc(phba,
3731 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
3732 *(((uint32_t *) irsp) + 4),
3733 *(((uint32_t *) irsp) + 6),
3734 *(((uint32_t *) irsp) + 7));
3735 }
3736
7e56aa25
JS
3737 writel(pring->sli.sli3.rspidx,
3738 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3739
3772a991
JS
3740 spin_unlock_irqrestore(&phba->hbalock, iflag);
3741 /* Handle the response IOCB */
3742 rspiocbp = lpfc_sli_sp_handle_rspiocb(phba, pring, rspiocbp);
3743 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3744
3745 /*
3746 * If the port response put pointer has not been updated, sync
3747 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
3748 * response put pointer.
3749 */
7e56aa25 3750 if (pring->sli.sli3.rspidx == portRspPut) {
dea3101e
JB
3751 portRspPut = le32_to_cpu(pgp->rspPutInx);
3752 }
7e56aa25 3753 } /* while (pring->sli.sli3.rspidx != portRspPut) */
dea3101e 3754
92d7f7b0 3755 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB
3756 /* At least one response entry has been freed */
3757 pring->stats.iocb_rsp_full++;
3758 /* SET RxRE_RSP in Chip Att register */
3759 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3760 writel(status, phba->CAregaddr);
3761 readl(phba->CAregaddr); /* flush */
3762 }
3763 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3764 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3765 pring->stats.iocb_cmd_empty++;
3766
3767 /* Force update of the local copy of cmdGetInx */
7e56aa25 3768 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3769 lpfc_sli_resume_iocb(phba, pring);
3770
3771 if ((pring->lpfc_sli_cmd_available))
3772 (pring->lpfc_sli_cmd_available) (phba, pring);
3773
3774 }
3775
2e0fef85 3776 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3777 return;
dea3101e
JB
3778}
3779
4f774513
JS
3780/**
3781 * lpfc_sli_handle_slow_ring_event_s4 - Handle SLI4 slow-path els events
3782 * @phba: Pointer to HBA context object.
3783 * @pring: Pointer to driver SLI ring object.
3784 * @mask: Host attention register mask for this ring.
3785 *
3786 * This function is called from the worker thread when there is a pending
3787 * ELS response iocb on the driver internal slow-path response iocb worker
3788 * queue. The caller does not hold any lock. The function will remove each
3789 * response iocb from the response worker queue and calls the handle
3790 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3791 **/
3792static void
3793lpfc_sli_handle_slow_ring_event_s4(struct lpfc_hba *phba,
3794 struct lpfc_sli_ring *pring, uint32_t mask)
3795{
3796 struct lpfc_iocbq *irspiocbq;
4d9ab994
JS
3797 struct hbq_dmabuf *dmabuf;
3798 struct lpfc_cq_event *cq_event;
4f774513 3799 unsigned long iflag;
0ef01a2d 3800 int count = 0;
4f774513 3801
45ed1190
JS
3802 spin_lock_irqsave(&phba->hbalock, iflag);
3803 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
3804 spin_unlock_irqrestore(&phba->hbalock, iflag);
3805 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
4f774513
JS
3806 /* Get the response iocb from the head of work queue */
3807 spin_lock_irqsave(&phba->hbalock, iflag);
45ed1190 3808 list_remove_head(&phba->sli4_hba.sp_queue_event,
4d9ab994 3809 cq_event, struct lpfc_cq_event, list);
4f774513 3810 spin_unlock_irqrestore(&phba->hbalock, iflag);
4d9ab994
JS
3811
3812 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
3813 case CQE_CODE_COMPL_WQE:
3814 irspiocbq = container_of(cq_event, struct lpfc_iocbq,
3815 cq_event);
45ed1190
JS
3816 /* Translate ELS WCQE to response IOCBQ */
3817 irspiocbq = lpfc_sli4_els_wcqe_to_rspiocbq(phba,
3818 irspiocbq);
3819 if (irspiocbq)
3820 lpfc_sli_sp_handle_rspiocb(phba, pring,
3821 irspiocbq);
0ef01a2d 3822 count++;
4d9ab994
JS
3823 break;
3824 case CQE_CODE_RECEIVE:
7851fe2c 3825 case CQE_CODE_RECEIVE_V1:
4d9ab994
JS
3826 dmabuf = container_of(cq_event, struct hbq_dmabuf,
3827 cq_event);
3828 lpfc_sli4_handle_received_buffer(phba, dmabuf);
0ef01a2d 3829 count++;
4d9ab994
JS
3830 break;
3831 default:
3832 break;
3833 }
0ef01a2d
JS
3834
3835 /* Limit the number of events to 64 to avoid soft lockups */
3836 if (count == 64)
3837 break;
4f774513
JS
3838 }
3839}
3840
e59058c4 3841/**
3621a710 3842 * lpfc_sli_abort_iocb_ring - Abort all iocbs in the ring
e59058c4
JS
3843 * @phba: Pointer to HBA context object.
3844 * @pring: Pointer to driver SLI ring object.
3845 *
3846 * This function aborts all iocbs in the given ring and frees all the iocb
3847 * objects in txq. This function issues an abort iocb for all the iocb commands
3848 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3849 * the return of this function. The caller is not required to hold any locks.
3850 **/
2e0fef85 3851void
dea3101e
JB
3852lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
3853{
2534ba75 3854 LIST_HEAD(completions);
dea3101e 3855 struct lpfc_iocbq *iocb, *next_iocb;
dea3101e 3856
92d7f7b0
JS
3857 if (pring->ringno == LPFC_ELS_RING) {
3858 lpfc_fabric_abort_hba(phba);
3859 }
3860
dea3101e
JB
3861 /* Error everything on txq and txcmplq
3862 * First do the txq.
3863 */
db55fba8
JS
3864 if (phba->sli_rev >= LPFC_SLI_REV4) {
3865 spin_lock_irq(&pring->ring_lock);
3866 list_splice_init(&pring->txq, &completions);
3867 pring->txq_cnt = 0;
3868 spin_unlock_irq(&pring->ring_lock);
dea3101e 3869
db55fba8
JS
3870 spin_lock_irq(&phba->hbalock);
3871 /* Next issue ABTS for everything on the txcmplq */
3872 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3873 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3874 spin_unlock_irq(&phba->hbalock);
3875 } else {
3876 spin_lock_irq(&phba->hbalock);
3877 list_splice_init(&pring->txq, &completions);
3878 pring->txq_cnt = 0;
dea3101e 3879
db55fba8
JS
3880 /* Next issue ABTS for everything on the txcmplq */
3881 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3882 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3883 spin_unlock_irq(&phba->hbalock);
3884 }
dea3101e 3885
a257bf90
JS
3886 /* Cancel all the IOCBs from the completions list */
3887 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
3888 IOERR_SLI_ABORTED);
dea3101e
JB
3889}
3890
895427bd
JS
3891/**
3892 * lpfc_sli_abort_wqe_ring - Abort all iocbs in the ring
3893 * @phba: Pointer to HBA context object.
3894 * @pring: Pointer to driver SLI ring object.
3895 *
3896 * This function aborts all iocbs in the given ring and frees all the iocb
3897 * objects in txq. This function issues an abort iocb for all the iocb commands
3898 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3899 * the return of this function. The caller is not required to hold any locks.
3900 **/
3901void
3902lpfc_sli_abort_wqe_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
3903{
3904 LIST_HEAD(completions);
3905 struct lpfc_iocbq *iocb, *next_iocb;
3906
3907 if (pring->ringno == LPFC_ELS_RING)
3908 lpfc_fabric_abort_hba(phba);
3909
3910 spin_lock_irq(&phba->hbalock);
3911 /* Next issue ABTS for everything on the txcmplq */
3912 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3913 lpfc_sli4_abort_nvme_io(phba, pring, iocb);
3914 spin_unlock_irq(&phba->hbalock);
3915}
3916
3917
db55fba8
JS
3918/**
3919 * lpfc_sli_abort_fcp_rings - Abort all iocbs in all FCP rings
3920 * @phba: Pointer to HBA context object.
3921 * @pring: Pointer to driver SLI ring object.
3922 *
3923 * This function aborts all iocbs in FCP rings and frees all the iocb
3924 * objects in txq. This function issues an abort iocb for all the iocb commands
3925 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3926 * the return of this function. The caller is not required to hold any locks.
3927 **/
3928void
3929lpfc_sli_abort_fcp_rings(struct lpfc_hba *phba)
3930{
3931 struct lpfc_sli *psli = &phba->sli;
3932 struct lpfc_sli_ring *pring;
3933 uint32_t i;
3934
3935 /* Look on all the FCP Rings for the iotag */
3936 if (phba->sli_rev >= LPFC_SLI_REV4) {
3937 for (i = 0; i < phba->cfg_fcp_io_channel; i++) {
895427bd 3938 pring = phba->sli4_hba.fcp_wq[i]->pring;
db55fba8
JS
3939 lpfc_sli_abort_iocb_ring(phba, pring);
3940 }
3941 } else {
895427bd 3942 pring = &psli->sli3_ring[LPFC_FCP_RING];
db55fba8
JS
3943 lpfc_sli_abort_iocb_ring(phba, pring);
3944 }
3945}
3946
895427bd
JS
3947/**
3948 * lpfc_sli_abort_nvme_rings - Abort all wqes in all NVME rings
3949 * @phba: Pointer to HBA context object.
3950 *
3951 * This function aborts all wqes in NVME rings. This function issues an
3952 * abort wqe for all the outstanding IO commands in txcmplq. The iocbs in
3953 * the txcmplq is not guaranteed to complete before the return of this
3954 * function. The caller is not required to hold any locks.
3955 **/
3956void
3957lpfc_sli_abort_nvme_rings(struct lpfc_hba *phba)
3958{
3959 struct lpfc_sli_ring *pring;
3960 uint32_t i;
3961
3962 if (phba->sli_rev < LPFC_SLI_REV4)
3963 return;
3964
3965 /* Abort all IO on each NVME ring. */
3966 for (i = 0; i < phba->cfg_nvme_io_channel; i++) {
3967 pring = phba->sli4_hba.nvme_wq[i]->pring;
3968 lpfc_sli_abort_wqe_ring(phba, pring);
3969 }
3970}
3971
db55fba8 3972
a8e497d5 3973/**
3621a710 3974 * lpfc_sli_flush_fcp_rings - flush all iocbs in the fcp ring
a8e497d5
JS
3975 * @phba: Pointer to HBA context object.
3976 *
3977 * This function flushes all iocbs in the fcp ring and frees all the iocb
3978 * objects in txq and txcmplq. This function will not issue abort iocbs
3979 * for all the iocb commands in txcmplq, they will just be returned with
3980 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
3981 * slot has been permanently disabled.
3982 **/
3983void
3984lpfc_sli_flush_fcp_rings(struct lpfc_hba *phba)
3985{
3986 LIST_HEAD(txq);
3987 LIST_HEAD(txcmplq);
a8e497d5
JS
3988 struct lpfc_sli *psli = &phba->sli;
3989 struct lpfc_sli_ring *pring;
db55fba8 3990 uint32_t i;
c1dd9111 3991 struct lpfc_iocbq *piocb, *next_iocb;
a8e497d5
JS
3992
3993 spin_lock_irq(&phba->hbalock);
4f2e66c6
JS
3994 /* Indicate the I/O queues are flushed */
3995 phba->hba_flag |= HBA_FCP_IOQ_FLUSH;
a8e497d5
JS
3996 spin_unlock_irq(&phba->hbalock);
3997
db55fba8
JS
3998 /* Look on all the FCP Rings for the iotag */
3999 if (phba->sli_rev >= LPFC_SLI_REV4) {
4000 for (i = 0; i < phba->cfg_fcp_io_channel; i++) {
895427bd 4001 pring = phba->sli4_hba.fcp_wq[i]->pring;
db55fba8
JS
4002
4003 spin_lock_irq(&pring->ring_lock);
4004 /* Retrieve everything on txq */
4005 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4006 list_for_each_entry_safe(piocb, next_iocb,
4007 &pring->txcmplq, list)
4008 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4009 /* Retrieve everything on the txcmplq */
4010 list_splice_init(&pring->txcmplq, &txcmplq);
4011 pring->txq_cnt = 0;
4012 pring->txcmplq_cnt = 0;
4013 spin_unlock_irq(&pring->ring_lock);
4014
4015 /* Flush the txq */
4016 lpfc_sli_cancel_iocbs(phba, &txq,
4017 IOSTAT_LOCAL_REJECT,
4018 IOERR_SLI_DOWN);
4019 /* Flush the txcmpq */
4020 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4021 IOSTAT_LOCAL_REJECT,
4022 IOERR_SLI_DOWN);
4023 }
4024 } else {
895427bd 4025 pring = &psli->sli3_ring[LPFC_FCP_RING];
a8e497d5 4026
db55fba8
JS
4027 spin_lock_irq(&phba->hbalock);
4028 /* Retrieve everything on txq */
4029 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4030 list_for_each_entry_safe(piocb, next_iocb,
4031 &pring->txcmplq, list)
4032 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4033 /* Retrieve everything on the txcmplq */
4034 list_splice_init(&pring->txcmplq, &txcmplq);
4035 pring->txq_cnt = 0;
4036 pring->txcmplq_cnt = 0;
4037 spin_unlock_irq(&phba->hbalock);
4038
4039 /* Flush the txq */
4040 lpfc_sli_cancel_iocbs(phba, &txq, IOSTAT_LOCAL_REJECT,
4041 IOERR_SLI_DOWN);
4042 /* Flush the txcmpq */
4043 lpfc_sli_cancel_iocbs(phba, &txcmplq, IOSTAT_LOCAL_REJECT,
4044 IOERR_SLI_DOWN);
4045 }
a8e497d5
JS
4046}
4047
895427bd
JS
4048/**
4049 * lpfc_sli_flush_nvme_rings - flush all wqes in the nvme rings
4050 * @phba: Pointer to HBA context object.
4051 *
4052 * This function flushes all wqes in the nvme rings and frees all resources
4053 * in the txcmplq. This function does not issue abort wqes for the IO
4054 * commands in txcmplq, they will just be returned with
4055 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
4056 * slot has been permanently disabled.
4057 **/
4058void
4059lpfc_sli_flush_nvme_rings(struct lpfc_hba *phba)
4060{
4061 LIST_HEAD(txcmplq);
4062 struct lpfc_sli_ring *pring;
4063 uint32_t i;
c1dd9111 4064 struct lpfc_iocbq *piocb, *next_iocb;
895427bd
JS
4065
4066 if (phba->sli_rev < LPFC_SLI_REV4)
4067 return;
4068
4069 /* Hint to other driver operations that a flush is in progress. */
4070 spin_lock_irq(&phba->hbalock);
4071 phba->hba_flag |= HBA_NVME_IOQ_FLUSH;
4072 spin_unlock_irq(&phba->hbalock);
4073
4074 /* Cycle through all NVME rings and complete each IO with
4075 * a local driver reason code. This is a flush so no
4076 * abort exchange to FW.
4077 */
4078 for (i = 0; i < phba->cfg_nvme_io_channel; i++) {
4079 pring = phba->sli4_hba.nvme_wq[i]->pring;
4080
895427bd 4081 spin_lock_irq(&pring->ring_lock);
c1dd9111
JS
4082 list_for_each_entry_safe(piocb, next_iocb,
4083 &pring->txcmplq, list)
4084 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
4085 /* Retrieve everything on the txcmplq */
895427bd
JS
4086 list_splice_init(&pring->txcmplq, &txcmplq);
4087 pring->txcmplq_cnt = 0;
4088 spin_unlock_irq(&pring->ring_lock);
4089
4090 /* Flush the txcmpq &&&PAE */
4091 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4092 IOSTAT_LOCAL_REJECT,
4093 IOERR_SLI_DOWN);
4094 }
4095}
4096
e59058c4 4097/**
3772a991 4098 * lpfc_sli_brdready_s3 - Check for sli3 host ready status
e59058c4
JS
4099 * @phba: Pointer to HBA context object.
4100 * @mask: Bit mask to be checked.
4101 *
4102 * This function reads the host status register and compares
4103 * with the provided bit mask to check if HBA completed
4104 * the restart. This function will wait in a loop for the
4105 * HBA to complete restart. If the HBA does not restart within
4106 * 15 iterations, the function will reset the HBA again. The
4107 * function returns 1 when HBA fail to restart otherwise returns
4108 * zero.
4109 **/
3772a991
JS
4110static int
4111lpfc_sli_brdready_s3(struct lpfc_hba *phba, uint32_t mask)
dea3101e 4112{
41415862
JW
4113 uint32_t status;
4114 int i = 0;
4115 int retval = 0;
dea3101e 4116
41415862 4117 /* Read the HBA Host Status Register */
9940b97b
JS
4118 if (lpfc_readl(phba->HSregaddr, &status))
4119 return 1;
dea3101e 4120
41415862
JW
4121 /*
4122 * Check status register every 100ms for 5 retries, then every
4123 * 500ms for 5, then every 2.5 sec for 5, then reset board and
4124 * every 2.5 sec for 4.
4125 * Break our of the loop if errors occurred during init.
4126 */
4127 while (((status & mask) != mask) &&
4128 !(status & HS_FFERM) &&
4129 i++ < 20) {
dea3101e 4130
41415862
JW
4131 if (i <= 5)
4132 msleep(10);
4133 else if (i <= 10)
4134 msleep(500);
4135 else
4136 msleep(2500);
dea3101e 4137
41415862 4138 if (i == 15) {
2e0fef85 4139 /* Do post */
92d7f7b0 4140 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW
4141 lpfc_sli_brdrestart(phba);
4142 }
4143 /* Read the HBA Host Status Register */
9940b97b
JS
4144 if (lpfc_readl(phba->HSregaddr, &status)) {
4145 retval = 1;
4146 break;
4147 }
41415862 4148 }
dea3101e 4149
41415862
JW
4150 /* Check to see if any errors occurred during init */
4151 if ((status & HS_FFERM) || (i >= 20)) {
e40a02c1
JS
4152 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4153 "2751 Adapter failed to restart, "
4154 "status reg x%x, FW Data: A8 x%x AC x%x\n",
4155 status,
4156 readl(phba->MBslimaddr + 0xa8),
4157 readl(phba->MBslimaddr + 0xac));
2e0fef85 4158 phba->link_state = LPFC_HBA_ERROR;
41415862 4159 retval = 1;
dea3101e 4160 }
dea3101e 4161
41415862
JW
4162 return retval;
4163}
dea3101e 4164
da0436e9
JS
4165/**
4166 * lpfc_sli_brdready_s4 - Check for sli4 host ready status
4167 * @phba: Pointer to HBA context object.
4168 * @mask: Bit mask to be checked.
4169 *
4170 * This function checks the host status register to check if HBA is
4171 * ready. This function will wait in a loop for the HBA to be ready
4172 * If the HBA is not ready , the function will will reset the HBA PCI
4173 * function again. The function returns 1 when HBA fail to be ready
4174 * otherwise returns zero.
4175 **/
4176static int
4177lpfc_sli_brdready_s4(struct lpfc_hba *phba, uint32_t mask)
4178{
4179 uint32_t status;
4180 int retval = 0;
4181
4182 /* Read the HBA Host Status Register */
4183 status = lpfc_sli4_post_status_check(phba);
4184
4185 if (status) {
4186 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
4187 lpfc_sli_brdrestart(phba);
4188 status = lpfc_sli4_post_status_check(phba);
4189 }
4190
4191 /* Check to see if any errors occurred during init */
4192 if (status) {
4193 phba->link_state = LPFC_HBA_ERROR;
4194 retval = 1;
4195 } else
4196 phba->sli4_hba.intr_enable = 0;
4197
4198 return retval;
4199}
4200
4201/**
4202 * lpfc_sli_brdready - Wrapper func for checking the hba readyness
4203 * @phba: Pointer to HBA context object.
4204 * @mask: Bit mask to be checked.
4205 *
4206 * This routine wraps the actual SLI3 or SLI4 hba readyness check routine
4207 * from the API jump table function pointer from the lpfc_hba struct.
4208 **/
4209int
4210lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
4211{
4212 return phba->lpfc_sli_brdready(phba, mask);
4213}
4214
9290831f
JS
4215#define BARRIER_TEST_PATTERN (0xdeadbeef)
4216
e59058c4 4217/**
3621a710 4218 * lpfc_reset_barrier - Make HBA ready for HBA reset
e59058c4
JS
4219 * @phba: Pointer to HBA context object.
4220 *
1b51197d
JS
4221 * This function is called before resetting an HBA. This function is called
4222 * with hbalock held and requests HBA to quiesce DMAs before a reset.
e59058c4 4223 **/
2e0fef85 4224void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 4225{
65a29c16
JS
4226 uint32_t __iomem *resp_buf;
4227 uint32_t __iomem *mbox_buf;
9290831f 4228 volatile uint32_t mbox;
9940b97b 4229 uint32_t hc_copy, ha_copy, resp_data;
9290831f
JS
4230 int i;
4231 uint8_t hdrtype;
4232
1c2ba475
JT
4233 lockdep_assert_held(&phba->hbalock);
4234
9290831f
JS
4235 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
4236 if (hdrtype != 0x80 ||
4237 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
4238 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
4239 return;
4240
4241 /*
4242 * Tell the other part of the chip to suspend temporarily all
4243 * its DMA activity.
4244 */
65a29c16 4245 resp_buf = phba->MBslimaddr;
9290831f
JS
4246
4247 /* Disable the error attention */
9940b97b
JS
4248 if (lpfc_readl(phba->HCregaddr, &hc_copy))
4249 return;
9290831f
JS
4250 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
4251 readl(phba->HCregaddr); /* flush */
2e0fef85 4252 phba->link_flag |= LS_IGNORE_ERATT;
9290831f 4253
9940b97b
JS
4254 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4255 return;
4256 if (ha_copy & HA_ERATT) {
9290831f
JS
4257 /* Clear Chip error bit */
4258 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4259 phba->pport->stopped = 1;
9290831f
JS
4260 }
4261
4262 mbox = 0;
4263 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
4264 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
4265
4266 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 4267 mbox_buf = phba->MBslimaddr;
9290831f
JS
4268 writel(mbox, mbox_buf);
4269
9940b97b
JS
4270 for (i = 0; i < 50; i++) {
4271 if (lpfc_readl((resp_buf + 1), &resp_data))
4272 return;
4273 if (resp_data != ~(BARRIER_TEST_PATTERN))
4274 mdelay(1);
4275 else
4276 break;
4277 }
4278 resp_data = 0;
4279 if (lpfc_readl((resp_buf + 1), &resp_data))
4280 return;
4281 if (resp_data != ~(BARRIER_TEST_PATTERN)) {
f4b4c68f 4282 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE ||
2e0fef85 4283 phba->pport->stopped)
9290831f
JS
4284 goto restore_hc;
4285 else
4286 goto clear_errat;
4287 }
4288
4289 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
9940b97b
JS
4290 resp_data = 0;
4291 for (i = 0; i < 500; i++) {
4292 if (lpfc_readl(resp_buf, &resp_data))
4293 return;
4294 if (resp_data != mbox)
4295 mdelay(1);
4296 else
4297 break;
4298 }
9290831f
JS
4299
4300clear_errat:
4301
9940b97b
JS
4302 while (++i < 500) {
4303 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4304 return;
4305 if (!(ha_copy & HA_ERATT))
4306 mdelay(1);
4307 else
4308 break;
4309 }
9290831f
JS
4310
4311 if (readl(phba->HAregaddr) & HA_ERATT) {
4312 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4313 phba->pport->stopped = 1;
9290831f
JS
4314 }
4315
4316restore_hc:
2e0fef85 4317 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS
4318 writel(hc_copy, phba->HCregaddr);
4319 readl(phba->HCregaddr); /* flush */
4320}
4321
e59058c4 4322/**
3621a710 4323 * lpfc_sli_brdkill - Issue a kill_board mailbox command
e59058c4
JS
4324 * @phba: Pointer to HBA context object.
4325 *
4326 * This function issues a kill_board mailbox command and waits for
4327 * the error attention interrupt. This function is called for stopping
4328 * the firmware processing. The caller is not required to hold any
4329 * locks. This function calls lpfc_hba_down_post function to free
4330 * any pending commands after the kill. The function will return 1 when it
4331 * fails to kill the board else will return 0.
4332 **/
41415862 4333int
2e0fef85 4334lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW
4335{
4336 struct lpfc_sli *psli;
4337 LPFC_MBOXQ_t *pmb;
4338 uint32_t status;
4339 uint32_t ha_copy;
4340 int retval;
4341 int i = 0;
dea3101e 4342
41415862 4343 psli = &phba->sli;
dea3101e 4344
41415862 4345 /* Kill HBA */
ed957684 4346 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS
4347 "0329 Kill HBA Data: x%x x%x\n",
4348 phba->pport->port_state, psli->sli_flag);
41415862 4349
98c9ea5c
JS
4350 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4351 if (!pmb)
41415862 4352 return 1;
41415862
JW
4353
4354 /* Disable the error attention */
2e0fef85 4355 spin_lock_irq(&phba->hbalock);
9940b97b
JS
4356 if (lpfc_readl(phba->HCregaddr, &status)) {
4357 spin_unlock_irq(&phba->hbalock);
4358 mempool_free(pmb, phba->mbox_mem_pool);
4359 return 1;
4360 }
41415862
JW
4361 status &= ~HC_ERINT_ENA;
4362 writel(status, phba->HCregaddr);
4363 readl(phba->HCregaddr); /* flush */
2e0fef85
JS
4364 phba->link_flag |= LS_IGNORE_ERATT;
4365 spin_unlock_irq(&phba->hbalock);
41415862
JW
4366
4367 lpfc_kill_board(phba, pmb);
4368 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
4369 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4370
4371 if (retval != MBX_SUCCESS) {
4372 if (retval != MBX_BUSY)
4373 mempool_free(pmb, phba->mbox_mem_pool);
e40a02c1
JS
4374 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4375 "2752 KILL_BOARD command failed retval %d\n",
4376 retval);
2e0fef85
JS
4377 spin_lock_irq(&phba->hbalock);
4378 phba->link_flag &= ~LS_IGNORE_ERATT;
4379 spin_unlock_irq(&phba->hbalock);
41415862
JW
4380 return 1;
4381 }
4382
f4b4c68f
JS
4383 spin_lock_irq(&phba->hbalock);
4384 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
4385 spin_unlock_irq(&phba->hbalock);
9290831f 4386
41415862
JW
4387 mempool_free(pmb, phba->mbox_mem_pool);
4388
4389 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
4390 * attention every 100ms for 3 seconds. If we don't get ERATT after
4391 * 3 seconds we still set HBA_ERROR state because the status of the
4392 * board is now undefined.
4393 */
9940b97b
JS
4394 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4395 return 1;
41415862
JW
4396 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
4397 mdelay(100);
9940b97b
JS
4398 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4399 return 1;
41415862
JW
4400 }
4401
4402 del_timer_sync(&psli->mbox_tmo);
9290831f
JS
4403 if (ha_copy & HA_ERATT) {
4404 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4405 phba->pport->stopped = 1;
9290831f 4406 }
2e0fef85 4407 spin_lock_irq(&phba->hbalock);
41415862 4408 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
04c68496 4409 psli->mbox_active = NULL;
2e0fef85
JS
4410 phba->link_flag &= ~LS_IGNORE_ERATT;
4411 spin_unlock_irq(&phba->hbalock);
41415862 4412
41415862 4413 lpfc_hba_down_post(phba);
2e0fef85 4414 phba->link_state = LPFC_HBA_ERROR;
41415862 4415
2e0fef85 4416 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB
4417}
4418
e59058c4 4419/**
3772a991 4420 * lpfc_sli_brdreset - Reset a sli-2 or sli-3 HBA
e59058c4
JS
4421 * @phba: Pointer to HBA context object.
4422 *
4423 * This function resets the HBA by writing HC_INITFF to the control
4424 * register. After the HBA resets, this function resets all the iocb ring
4425 * indices. This function disables PCI layer parity checking during
4426 * the reset.
4427 * This function returns 0 always.
4428 * The caller is not required to hold any locks.
4429 **/
41415862 4430int
2e0fef85 4431lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 4432{
41415862 4433 struct lpfc_sli *psli;
dea3101e 4434 struct lpfc_sli_ring *pring;
41415862 4435 uint16_t cfg_value;
dea3101e 4436 int i;
dea3101e 4437
41415862 4438 psli = &phba->sli;
dea3101e 4439
41415862
JW
4440 /* Reset HBA */
4441 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4442 "0325 Reset HBA Data: x%x x%x\n",
4492b739
JS
4443 (phba->pport) ? phba->pport->port_state : 0,
4444 psli->sli_flag);
dea3101e
JB
4445
4446 /* perform board reset */
4447 phba->fc_eventTag = 0;
4d9ab994 4448 phba->link_events = 0;
4492b739
JS
4449 if (phba->pport) {
4450 phba->pport->fc_myDID = 0;
4451 phba->pport->fc_prevDID = 0;
4452 }
dea3101e 4453
41415862
JW
4454 /* Turn off parity checking and serr during the physical reset */
4455 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
4456 pci_write_config_word(phba->pcidev, PCI_COMMAND,
4457 (cfg_value &
4458 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4459
3772a991
JS
4460 psli->sli_flag &= ~(LPFC_SLI_ACTIVE | LPFC_PROCESS_LA);
4461
41415862
JW
4462 /* Now toggle INITFF bit in the Host Control Register */
4463 writel(HC_INITFF, phba->HCregaddr);
4464 mdelay(1);
4465 readl(phba->HCregaddr); /* flush */
4466 writel(0, phba->HCregaddr);
4467 readl(phba->HCregaddr); /* flush */
4468
4469 /* Restore PCI cmd register */
4470 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB
4471
4472 /* Initialize relevant SLI info */
41415862 4473 for (i = 0; i < psli->num_rings; i++) {
895427bd 4474 pring = &psli->sli3_ring[i];
dea3101e 4475 pring->flag = 0;
7e56aa25
JS
4476 pring->sli.sli3.rspidx = 0;
4477 pring->sli.sli3.next_cmdidx = 0;
4478 pring->sli.sli3.local_getidx = 0;
4479 pring->sli.sli3.cmdidx = 0;
dea3101e
JB
4480 pring->missbufcnt = 0;
4481 }
dea3101e 4482
2e0fef85 4483 phba->link_state = LPFC_WARM_START;
41415862
JW
4484 return 0;
4485}
4486
e59058c4 4487/**
da0436e9
JS
4488 * lpfc_sli4_brdreset - Reset a sli-4 HBA
4489 * @phba: Pointer to HBA context object.
4490 *
4491 * This function resets a SLI4 HBA. This function disables PCI layer parity
4492 * checking during resets the device. The caller is not required to hold
4493 * any locks.
4494 *
4495 * This function returns 0 always.
4496 **/
4497int
4498lpfc_sli4_brdreset(struct lpfc_hba *phba)
4499{
4500 struct lpfc_sli *psli = &phba->sli;
4501 uint16_t cfg_value;
0293635e 4502 int rc = 0;
da0436e9
JS
4503
4504 /* Reset HBA */
4505 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
0293635e
JS
4506 "0295 Reset HBA Data: x%x x%x x%x\n",
4507 phba->pport->port_state, psli->sli_flag,
4508 phba->hba_flag);
da0436e9
JS
4509
4510 /* perform board reset */
4511 phba->fc_eventTag = 0;
4d9ab994 4512 phba->link_events = 0;
da0436e9
JS
4513 phba->pport->fc_myDID = 0;
4514 phba->pport->fc_prevDID = 0;
4515
da0436e9
JS
4516 spin_lock_irq(&phba->hbalock);
4517 psli->sli_flag &= ~(LPFC_PROCESS_LA);
4518 phba->fcf.fcf_flag = 0;
da0436e9
JS
4519 spin_unlock_irq(&phba->hbalock);
4520
0293635e
JS
4521 /* SLI4 INTF 2: if FW dump is being taken skip INIT_PORT */
4522 if (phba->hba_flag & HBA_FW_DUMP_OP) {
4523 phba->hba_flag &= ~HBA_FW_DUMP_OP;
4524 return rc;
4525 }
4526
da0436e9
JS
4527 /* Now physically reset the device */
4528 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4529 "0389 Performing PCI function reset!\n");
be858b65
JS
4530
4531 /* Turn off parity checking and serr during the physical reset */
4532 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
4533 pci_write_config_word(phba->pcidev, PCI_COMMAND, (cfg_value &
4534 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4535
88318816 4536 /* Perform FCoE PCI function reset before freeing queue memory */
27b01b82 4537 rc = lpfc_pci_function_reset(phba);
da0436e9 4538
be858b65
JS
4539 /* Restore PCI cmd register */
4540 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
4541
27b01b82 4542 return rc;
da0436e9
JS
4543}
4544
4545/**
4546 * lpfc_sli_brdrestart_s3 - Restart a sli-3 hba
e59058c4
JS
4547 * @phba: Pointer to HBA context object.
4548 *
4549 * This function is called in the SLI initialization code path to
4550 * restart the HBA. The caller is not required to hold any lock.
4551 * This function writes MBX_RESTART mailbox command to the SLIM and
4552 * resets the HBA. At the end of the function, it calls lpfc_hba_down_post
4553 * function to free any pending commands. The function enables
4554 * POST only during the first initialization. The function returns zero.
4555 * The function does not guarantee completion of MBX_RESTART mailbox
4556 * command before the return of this function.
4557 **/
da0436e9
JS
4558static int
4559lpfc_sli_brdrestart_s3(struct lpfc_hba *phba)
41415862
JW
4560{
4561 MAILBOX_t *mb;
4562 struct lpfc_sli *psli;
41415862
JW
4563 volatile uint32_t word0;
4564 void __iomem *to_slim;
0d878419 4565 uint32_t hba_aer_enabled;
41415862 4566
2e0fef85 4567 spin_lock_irq(&phba->hbalock);
41415862 4568
0d878419
JS
4569 /* Take PCIe device Advanced Error Reporting (AER) state */
4570 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4571
41415862
JW
4572 psli = &phba->sli;
4573
4574 /* Restart HBA */
4575 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4576 "0337 Restart HBA Data: x%x x%x\n",
4492b739
JS
4577 (phba->pport) ? phba->pport->port_state : 0,
4578 psli->sli_flag);
41415862
JW
4579
4580 word0 = 0;
4581 mb = (MAILBOX_t *) &word0;
4582 mb->mbxCommand = MBX_RESTART;
4583 mb->mbxHc = 1;
4584
9290831f
JS
4585 lpfc_reset_barrier(phba);
4586
41415862
JW
4587 to_slim = phba->MBslimaddr;
4588 writel(*(uint32_t *) mb, to_slim);
4589 readl(to_slim); /* flush */
4590
4591 /* Only skip post after fc_ffinit is completed */
4492b739 4592 if (phba->pport && phba->pport->port_state)
41415862 4593 word0 = 1; /* This is really setting up word1 */
eaf15d5b 4594 else
41415862 4595 word0 = 0; /* This is really setting up word1 */
65a29c16 4596 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW
4597 writel(*(uint32_t *) mb, to_slim);
4598 readl(to_slim); /* flush */
dea3101e 4599
41415862 4600 lpfc_sli_brdreset(phba);
4492b739
JS
4601 if (phba->pport)
4602 phba->pport->stopped = 0;
2e0fef85 4603 phba->link_state = LPFC_INIT_START;
da0436e9 4604 phba->hba_flag = 0;
2e0fef85 4605 spin_unlock_irq(&phba->hbalock);
41415862 4606
64ba8818 4607 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4608 psli->stats_start = ktime_get_seconds();
64ba8818 4609
eaf15d5b
JS
4610 /* Give the INITFF and Post time to settle. */
4611 mdelay(100);
41415862 4612
0d878419
JS
4613 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4614 if (hba_aer_enabled)
4615 pci_disable_pcie_error_reporting(phba->pcidev);
4616
41415862 4617 lpfc_hba_down_post(phba);
dea3101e
JB
4618
4619 return 0;
4620}
4621
da0436e9
JS
4622/**
4623 * lpfc_sli_brdrestart_s4 - Restart the sli-4 hba
4624 * @phba: Pointer to HBA context object.
4625 *
4626 * This function is called in the SLI initialization code path to restart
4627 * a SLI4 HBA. The caller is not required to hold any lock.
4628 * At the end of the function, it calls lpfc_hba_down_post function to
4629 * free any pending commands.
4630 **/
4631static int
4632lpfc_sli_brdrestart_s4(struct lpfc_hba *phba)
4633{
4634 struct lpfc_sli *psli = &phba->sli;
75baf696 4635 uint32_t hba_aer_enabled;
27b01b82 4636 int rc;
da0436e9
JS
4637
4638 /* Restart HBA */
4639 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4640 "0296 Restart HBA Data: x%x x%x\n",
4641 phba->pport->port_state, psli->sli_flag);
4642
75baf696
JS
4643 /* Take PCIe device Advanced Error Reporting (AER) state */
4644 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4645
27b01b82 4646 rc = lpfc_sli4_brdreset(phba);
da0436e9
JS
4647
4648 spin_lock_irq(&phba->hbalock);
4649 phba->pport->stopped = 0;
4650 phba->link_state = LPFC_INIT_START;
4651 phba->hba_flag = 0;
4652 spin_unlock_irq(&phba->hbalock);
4653
4654 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4655 psli->stats_start = ktime_get_seconds();
da0436e9 4656
75baf696
JS
4657 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4658 if (hba_aer_enabled)
4659 pci_disable_pcie_error_reporting(phba->pcidev);
4660
da0436e9 4661 lpfc_hba_down_post(phba);
569dbe84 4662 lpfc_sli4_queue_destroy(phba);
da0436e9 4663
27b01b82 4664 return rc;
da0436e9
JS
4665}
4666
4667/**
4668 * lpfc_sli_brdrestart - Wrapper func for restarting hba
4669 * @phba: Pointer to HBA context object.
4670 *
4671 * This routine wraps the actual SLI3 or SLI4 hba restart routine from the
4672 * API jump table function pointer from the lpfc_hba struct.
4673**/
4674int
4675lpfc_sli_brdrestart(struct lpfc_hba *phba)
4676{
4677 return phba->lpfc_sli_brdrestart(phba);
4678}
4679
e59058c4 4680/**
3621a710 4681 * lpfc_sli_chipset_init - Wait for the restart of the HBA after a restart
e59058c4
JS
4682 * @phba: Pointer to HBA context object.
4683 *
4684 * This function is called after a HBA restart to wait for successful
4685 * restart of the HBA. Successful restart of the HBA is indicated by
4686 * HS_FFRDY and HS_MBRDY bits. If the HBA fails to restart even after 15
4687 * iteration, the function will restart the HBA again. The function returns
4688 * zero if HBA successfully restarted else returns negative error code.
4689 **/
4492b739 4690int
dea3101e
JB
4691lpfc_sli_chipset_init(struct lpfc_hba *phba)
4692{
4693 uint32_t status, i = 0;
4694
4695 /* Read the HBA Host Status Register */
9940b97b
JS
4696 if (lpfc_readl(phba->HSregaddr, &status))
4697 return -EIO;
dea3101e
JB
4698
4699 /* Check status register to see what current state is */
4700 i = 0;
4701 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
4702
dcf2a4e0
JS
4703 /* Check every 10ms for 10 retries, then every 100ms for 90
4704 * retries, then every 1 sec for 50 retires for a total of
4705 * ~60 seconds before reset the board again and check every
4706 * 1 sec for 50 retries. The up to 60 seconds before the
4707 * board ready is required by the Falcon FIPS zeroization
4708 * complete, and any reset the board in between shall cause
4709 * restart of zeroization, further delay the board ready.
dea3101e 4710 */
dcf2a4e0 4711 if (i++ >= 200) {
dea3101e
JB
4712 /* Adapter failed to init, timeout, status reg
4713 <status> */
ed957684 4714 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4715 "0436 Adapter failed to init, "
09372820
JS
4716 "timeout, status reg x%x, "
4717 "FW Data: A8 x%x AC x%x\n", status,
4718 readl(phba->MBslimaddr + 0xa8),
4719 readl(phba->MBslimaddr + 0xac));
2e0fef85 4720 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4721 return -ETIMEDOUT;
4722 }
4723
4724 /* Check to see if any errors occurred during init */
4725 if (status & HS_FFERM) {
4726 /* ERROR: During chipset initialization */
4727 /* Adapter failed to init, chipset, status reg
4728 <status> */
ed957684 4729 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4730 "0437 Adapter failed to init, "
09372820
JS
4731 "chipset, status reg x%x, "
4732 "FW Data: A8 x%x AC x%x\n", status,
4733 readl(phba->MBslimaddr + 0xa8),
4734 readl(phba->MBslimaddr + 0xac));
2e0fef85 4735 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4736 return -EIO;
4737 }
4738
dcf2a4e0 4739 if (i <= 10)
dea3101e 4740 msleep(10);
dcf2a4e0
JS
4741 else if (i <= 100)
4742 msleep(100);
4743 else
4744 msleep(1000);
dea3101e 4745
dcf2a4e0
JS
4746 if (i == 150) {
4747 /* Do post */
92d7f7b0 4748 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4749 lpfc_sli_brdrestart(phba);
dea3101e
JB
4750 }
4751 /* Read the HBA Host Status Register */
9940b97b
JS
4752 if (lpfc_readl(phba->HSregaddr, &status))
4753 return -EIO;
dea3101e
JB
4754 }
4755
4756 /* Check to see if any errors occurred during init */
4757 if (status & HS_FFERM) {
4758 /* ERROR: During chipset initialization */
4759 /* Adapter failed to init, chipset, status reg <status> */
ed957684 4760 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4761 "0438 Adapter failed to init, chipset, "
09372820
JS
4762 "status reg x%x, "
4763 "FW Data: A8 x%x AC x%x\n", status,
4764 readl(phba->MBslimaddr + 0xa8),
4765 readl(phba->MBslimaddr + 0xac));
2e0fef85 4766 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4767 return -EIO;
4768 }
4769
4770 /* Clear all interrupt enable conditions */
4771 writel(0, phba->HCregaddr);
4772 readl(phba->HCregaddr); /* flush */
4773
4774 /* setup host attn register */
4775 writel(0xffffffff, phba->HAregaddr);
4776 readl(phba->HAregaddr); /* flush */
4777 return 0;
4778}
4779
e59058c4 4780/**
3621a710 4781 * lpfc_sli_hbq_count - Get the number of HBQs to be configured
e59058c4
JS
4782 *
4783 * This function calculates and returns the number of HBQs required to be
4784 * configured.
4785 **/
78b2d852 4786int
ed957684
JS
4787lpfc_sli_hbq_count(void)
4788{
92d7f7b0 4789 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS
4790}
4791
e59058c4 4792/**
3621a710 4793 * lpfc_sli_hbq_entry_count - Calculate total number of hbq entries
e59058c4
JS
4794 *
4795 * This function adds the number of hbq entries in every HBQ to get
4796 * the total number of hbq entries required for the HBA and returns
4797 * the total count.
4798 **/
ed957684
JS
4799static int
4800lpfc_sli_hbq_entry_count(void)
4801{
4802 int hbq_count = lpfc_sli_hbq_count();
4803 int count = 0;
4804 int i;
4805
4806 for (i = 0; i < hbq_count; ++i)
92d7f7b0 4807 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS
4808 return count;
4809}
4810
e59058c4 4811/**
3621a710 4812 * lpfc_sli_hbq_size - Calculate memory required for all hbq entries
e59058c4
JS
4813 *
4814 * This function calculates amount of memory required for all hbq entries
4815 * to be configured and returns the total memory required.
4816 **/
dea3101e 4817int
ed957684
JS
4818lpfc_sli_hbq_size(void)
4819{
4820 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
4821}
4822
e59058c4 4823/**
3621a710 4824 * lpfc_sli_hbq_setup - configure and initialize HBQs
e59058c4
JS
4825 * @phba: Pointer to HBA context object.
4826 *
4827 * This function is called during the SLI initialization to configure
4828 * all the HBQs and post buffers to the HBQ. The caller is not
4829 * required to hold any locks. This function will return zero if successful
4830 * else it will return negative error code.
4831 **/
ed957684
JS
4832static int
4833lpfc_sli_hbq_setup(struct lpfc_hba *phba)
4834{
4835 int hbq_count = lpfc_sli_hbq_count();
4836 LPFC_MBOXQ_t *pmb;
4837 MAILBOX_t *pmbox;
4838 uint32_t hbqno;
4839 uint32_t hbq_entry_index;
ed957684 4840
92d7f7b0
JS
4841 /* Get a Mailbox buffer to setup mailbox
4842 * commands for HBA initialization
4843 */
ed957684
JS
4844 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4845
4846 if (!pmb)
4847 return -ENOMEM;
4848
04c68496 4849 pmbox = &pmb->u.mb;
ed957684
JS
4850
4851 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
4852 phba->link_state = LPFC_INIT_MBX_CMDS;
3163f725 4853 phba->hbq_in_use = 1;
ed957684
JS
4854
4855 hbq_entry_index = 0;
4856 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
4857 phba->hbqs[hbqno].next_hbqPutIdx = 0;
4858 phba->hbqs[hbqno].hbqPutIdx = 0;
4859 phba->hbqs[hbqno].local_hbqGetIdx = 0;
4860 phba->hbqs[hbqno].entry_count =
92d7f7b0 4861 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS
4862 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
4863 hbq_entry_index, pmb);
ed957684
JS
4864 hbq_entry_index += phba->hbqs[hbqno].entry_count;
4865
4866 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
4867 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
4868 mbxStatus <status>, ring <num> */
4869
4870 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 4871 LOG_SLI | LOG_VPORT,
e8b62011 4872 "1805 Adapter failed to init. "
ed957684 4873 "Data: x%x x%x x%x\n",
e8b62011 4874 pmbox->mbxCommand,
ed957684
JS
4875 pmbox->mbxStatus, hbqno);
4876
4877 phba->link_state = LPFC_HBA_ERROR;
4878 mempool_free(pmb, phba->mbox_mem_pool);
6e7288d9 4879 return -ENXIO;
ed957684
JS
4880 }
4881 }
4882 phba->hbq_count = hbq_count;
4883
ed957684
JS
4884 mempool_free(pmb, phba->mbox_mem_pool);
4885
92d7f7b0 4886 /* Initially populate or replenish the HBQs */
d7c255b2
JS
4887 for (hbqno = 0; hbqno < hbq_count; ++hbqno)
4888 lpfc_sli_hbqbuf_init_hbqs(phba, hbqno);
ed957684
JS
4889 return 0;
4890}
4891
4f774513
JS
4892/**
4893 * lpfc_sli4_rb_setup - Initialize and post RBs to HBA
4894 * @phba: Pointer to HBA context object.
4895 *
4896 * This function is called during the SLI initialization to configure
4897 * all the HBQs and post buffers to the HBQ. The caller is not
4898 * required to hold any locks. This function will return zero if successful
4899 * else it will return negative error code.
4900 **/
4901static int
4902lpfc_sli4_rb_setup(struct lpfc_hba *phba)
4903{
4904 phba->hbq_in_use = 1;
895427bd
JS
4905 phba->hbqs[LPFC_ELS_HBQ].entry_count =
4906 lpfc_hbq_defs[LPFC_ELS_HBQ]->entry_count;
4f774513 4907 phba->hbq_count = 1;
895427bd 4908 lpfc_sli_hbqbuf_init_hbqs(phba, LPFC_ELS_HBQ);
4f774513 4909 /* Initially populate or replenish the HBQs */
4f774513
JS
4910 return 0;
4911}
4912
e59058c4 4913/**
3621a710 4914 * lpfc_sli_config_port - Issue config port mailbox command
e59058c4
JS
4915 * @phba: Pointer to HBA context object.
4916 * @sli_mode: sli mode - 2/3
4917 *
183b8021 4918 * This function is called by the sli initialization code path
e59058c4
JS
4919 * to issue config_port mailbox command. This function restarts the
4920 * HBA firmware and issues a config_port mailbox command to configure
4921 * the SLI interface in the sli mode specified by sli_mode
4922 * variable. The caller is not required to hold any locks.
4923 * The function returns 0 if successful, else returns negative error
4924 * code.
4925 **/
9399627f
JS
4926int
4927lpfc_sli_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB
4928{
4929 LPFC_MBOXQ_t *pmb;
4930 uint32_t resetcount = 0, rc = 0, done = 0;
4931
4932 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4933 if (!pmb) {
2e0fef85 4934 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4935 return -ENOMEM;
4936 }
4937
ed957684 4938 phba->sli_rev = sli_mode;
dea3101e 4939 while (resetcount < 2 && !done) {
2e0fef85 4940 spin_lock_irq(&phba->hbalock);
1c067a42 4941 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 4942 spin_unlock_irq(&phba->hbalock);
92d7f7b0 4943 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4944 lpfc_sli_brdrestart(phba);
dea3101e
JB
4945 rc = lpfc_sli_chipset_init(phba);
4946 if (rc)
4947 break;
4948
2e0fef85 4949 spin_lock_irq(&phba->hbalock);
1c067a42 4950 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 4951 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
4952 resetcount++;
4953
ed957684
JS
4954 /* Call pre CONFIG_PORT mailbox command initialization. A
4955 * value of 0 means the call was successful. Any other
4956 * nonzero value is a failure, but if ERESTART is returned,
4957 * the driver may reset the HBA and try again.
4958 */
dea3101e
JB
4959 rc = lpfc_config_port_prep(phba);
4960 if (rc == -ERESTART) {
ed957684 4961 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e 4962 continue;
34b02dcd 4963 } else if (rc)
dea3101e 4964 break;
6d368e53 4965
2e0fef85 4966 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
4967 lpfc_config_port(phba, pmb);
4968 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
34b02dcd
JS
4969 phba->sli3_options &= ~(LPFC_SLI3_NPIV_ENABLED |
4970 LPFC_SLI3_HBQ_ENABLED |
4971 LPFC_SLI3_CRP_ENABLED |
bc73905a
JS
4972 LPFC_SLI3_BG_ENABLED |
4973 LPFC_SLI3_DSS_ENABLED);
ed957684 4974 if (rc != MBX_SUCCESS) {
dea3101e 4975 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4976 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 4977 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
04c68496 4978 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus, 0);
2e0fef85 4979 spin_lock_irq(&phba->hbalock);
04c68496 4980 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
2e0fef85
JS
4981 spin_unlock_irq(&phba->hbalock);
4982 rc = -ENXIO;
04c68496
JS
4983 } else {
4984 /* Allow asynchronous mailbox command to go through */
4985 spin_lock_irq(&phba->hbalock);
4986 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
4987 spin_unlock_irq(&phba->hbalock);
ed957684 4988 done = 1;
cb69f7de
JS
4989
4990 if ((pmb->u.mb.un.varCfgPort.casabt == 1) &&
4991 (pmb->u.mb.un.varCfgPort.gasabt == 0))
4992 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
4993 "3110 Port did not grant ASABT\n");
04c68496 4994 }
dea3101e 4995 }
ed957684
JS
4996 if (!done) {
4997 rc = -EINVAL;
4998 goto do_prep_failed;
4999 }
04c68496
JS
5000 if (pmb->u.mb.un.varCfgPort.sli_mode == 3) {
5001 if (!pmb->u.mb.un.varCfgPort.cMA) {
34b02dcd
JS
5002 rc = -ENXIO;
5003 goto do_prep_failed;
5004 }
04c68496 5005 if (phba->max_vpi && pmb->u.mb.un.varCfgPort.gmv) {
34b02dcd 5006 phba->sli3_options |= LPFC_SLI3_NPIV_ENABLED;
04c68496
JS
5007 phba->max_vpi = pmb->u.mb.un.varCfgPort.max_vpi;
5008 phba->max_vports = (phba->max_vpi > phba->max_vports) ?
5009 phba->max_vpi : phba->max_vports;
5010
34b02dcd
JS
5011 } else
5012 phba->max_vpi = 0;
bc73905a
JS
5013 phba->fips_level = 0;
5014 phba->fips_spec_rev = 0;
5015 if (pmb->u.mb.un.varCfgPort.gdss) {
04c68496 5016 phba->sli3_options |= LPFC_SLI3_DSS_ENABLED;
bc73905a
JS
5017 phba->fips_level = pmb->u.mb.un.varCfgPort.fips_level;
5018 phba->fips_spec_rev = pmb->u.mb.un.varCfgPort.fips_rev;
5019 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5020 "2850 Security Crypto Active. FIPS x%d "
5021 "(Spec Rev: x%d)",
5022 phba->fips_level, phba->fips_spec_rev);
5023 }
5024 if (pmb->u.mb.un.varCfgPort.sec_err) {
5025 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5026 "2856 Config Port Security Crypto "
5027 "Error: x%x ",
5028 pmb->u.mb.un.varCfgPort.sec_err);
5029 }
04c68496 5030 if (pmb->u.mb.un.varCfgPort.gerbm)
34b02dcd 5031 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
04c68496 5032 if (pmb->u.mb.un.varCfgPort.gcrp)
34b02dcd 5033 phba->sli3_options |= LPFC_SLI3_CRP_ENABLED;
6e7288d9
JS
5034
5035 phba->hbq_get = phba->mbox->us.s3_pgp.hbq_get;
5036 phba->port_gp = phba->mbox->us.s3_pgp.port;
e2a0a9d6 5037
f44ac12f
JS
5038 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
5039 if (pmb->u.mb.un.varCfgPort.gbg == 0) {
5040 phba->cfg_enable_bg = 0;
5041 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
e2a0a9d6
JS
5042 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5043 "0443 Adapter did not grant "
5044 "BlockGuard\n");
f44ac12f 5045 }
e2a0a9d6 5046 }
34b02dcd 5047 } else {
8f34f4ce 5048 phba->hbq_get = NULL;
34b02dcd 5049 phba->port_gp = phba->mbox->us.s2.port;
d7c255b2 5050 phba->max_vpi = 0;
ed957684 5051 }
92d7f7b0 5052do_prep_failed:
ed957684
JS
5053 mempool_free(pmb, phba->mbox_mem_pool);
5054 return rc;
5055}
5056
e59058c4
JS
5057
5058/**
183b8021 5059 * lpfc_sli_hba_setup - SLI initialization function
e59058c4
JS
5060 * @phba: Pointer to HBA context object.
5061 *
183b8021
MY
5062 * This function is the main SLI initialization function. This function
5063 * is called by the HBA initialization code, HBA reset code and HBA
e59058c4
JS
5064 * error attention handler code. Caller is not required to hold any
5065 * locks. This function issues config_port mailbox command to configure
5066 * the SLI, setup iocb rings and HBQ rings. In the end the function
5067 * calls the config_port_post function to issue init_link mailbox
5068 * command and to start the discovery. The function will return zero
5069 * if successful, else it will return negative error code.
5070 **/
ed957684
JS
5071int
5072lpfc_sli_hba_setup(struct lpfc_hba *phba)
5073{
5074 uint32_t rc;
6d368e53
JS
5075 int mode = 3, i;
5076 int longs;
ed957684 5077
12247e81 5078 switch (phba->cfg_sli_mode) {
ed957684 5079 case 2:
78b2d852 5080 if (phba->cfg_enable_npiv) {
92d7f7b0 5081 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81 5082 "1824 NPIV enabled: Override sli_mode "
92d7f7b0 5083 "parameter (%d) to auto (0).\n",
12247e81 5084 phba->cfg_sli_mode);
92d7f7b0
JS
5085 break;
5086 }
ed957684
JS
5087 mode = 2;
5088 break;
5089 case 0:
5090 case 3:
5091 break;
5092 default:
92d7f7b0 5093 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81
JS
5094 "1819 Unrecognized sli_mode parameter: %d.\n",
5095 phba->cfg_sli_mode);
ed957684
JS
5096
5097 break;
5098 }
b5c53958 5099 phba->fcp_embed_io = 0; /* SLI4 FC support only */
ed957684 5100
9399627f
JS
5101 rc = lpfc_sli_config_port(phba, mode);
5102
12247e81 5103 if (rc && phba->cfg_sli_mode == 3)
92d7f7b0 5104 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS
5105 "1820 Unable to select SLI-3. "
5106 "Not supported by adapter.\n");
ed957684 5107 if (rc && mode != 2)
9399627f 5108 rc = lpfc_sli_config_port(phba, 2);
4597663f
JS
5109 else if (rc && mode == 2)
5110 rc = lpfc_sli_config_port(phba, 3);
ed957684 5111 if (rc)
dea3101e
JB
5112 goto lpfc_sli_hba_setup_error;
5113
0d878419
JS
5114 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
5115 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
5116 rc = pci_enable_pcie_error_reporting(phba->pcidev);
5117 if (!rc) {
5118 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5119 "2709 This device supports "
5120 "Advanced Error Reporting (AER)\n");
5121 spin_lock_irq(&phba->hbalock);
5122 phba->hba_flag |= HBA_AER_ENABLED;
5123 spin_unlock_irq(&phba->hbalock);
5124 } else {
5125 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5126 "2708 This device does not support "
b069d7eb
JS
5127 "Advanced Error Reporting (AER): %d\n",
5128 rc);
0d878419
JS
5129 phba->cfg_aer_support = 0;
5130 }
5131 }
5132
ed957684
JS
5133 if (phba->sli_rev == 3) {
5134 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
5135 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
ed957684
JS
5136 } else {
5137 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
5138 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 5139 phba->sli3_options = 0;
ed957684
JS
5140 }
5141
5142 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
5143 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
5144 phba->sli_rev, phba->max_vpi);
ed957684 5145 rc = lpfc_sli_ring_map(phba);
dea3101e
JB
5146
5147 if (rc)
5148 goto lpfc_sli_hba_setup_error;
5149
6d368e53
JS
5150 /* Initialize VPIs. */
5151 if (phba->sli_rev == LPFC_SLI_REV3) {
5152 /*
5153 * The VPI bitmask and physical ID array are allocated
5154 * and initialized once only - at driver load. A port
5155 * reset doesn't need to reinitialize this memory.
5156 */
5157 if ((phba->vpi_bmask == NULL) && (phba->vpi_ids == NULL)) {
5158 longs = (phba->max_vpi + BITS_PER_LONG) / BITS_PER_LONG;
6396bb22
KC
5159 phba->vpi_bmask = kcalloc(longs,
5160 sizeof(unsigned long),
6d368e53
JS
5161 GFP_KERNEL);
5162 if (!phba->vpi_bmask) {
5163 rc = -ENOMEM;
5164 goto lpfc_sli_hba_setup_error;
5165 }
5166
6396bb22
KC
5167 phba->vpi_ids = kcalloc(phba->max_vpi + 1,
5168 sizeof(uint16_t),
5169 GFP_KERNEL);
6d368e53
JS
5170 if (!phba->vpi_ids) {
5171 kfree(phba->vpi_bmask);
5172 rc = -ENOMEM;
5173 goto lpfc_sli_hba_setup_error;
5174 }
5175 for (i = 0; i < phba->max_vpi; i++)
5176 phba->vpi_ids[i] = i;
5177 }
5178 }
5179
9399627f 5180 /* Init HBQs */
ed957684
JS
5181 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
5182 rc = lpfc_sli_hbq_setup(phba);
5183 if (rc)
5184 goto lpfc_sli_hba_setup_error;
5185 }
04c68496 5186 spin_lock_irq(&phba->hbalock);
dea3101e 5187 phba->sli.sli_flag |= LPFC_PROCESS_LA;
04c68496 5188 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
5189
5190 rc = lpfc_config_port_post(phba);
5191 if (rc)
5192 goto lpfc_sli_hba_setup_error;
5193
ed957684
JS
5194 return rc;
5195
92d7f7b0 5196lpfc_sli_hba_setup_error:
2e0fef85 5197 phba->link_state = LPFC_HBA_ERROR;
e40a02c1 5198 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 5199 "0445 Firmware initialization failed\n");
dea3101e
JB
5200 return rc;
5201}
5202
e59058c4 5203/**
da0436e9
JS
5204 * lpfc_sli4_read_fcoe_params - Read fcoe params from conf region
5205 * @phba: Pointer to HBA context object.
5206 * @mboxq: mailbox pointer.
5207 * This function issue a dump mailbox command to read config region
5208 * 23 and parse the records in the region and populate driver
5209 * data structure.
e59058c4 5210 **/
da0436e9 5211static int
ff78d8f9 5212lpfc_sli4_read_fcoe_params(struct lpfc_hba *phba)
dea3101e 5213{
ff78d8f9 5214 LPFC_MBOXQ_t *mboxq;
da0436e9
JS
5215 struct lpfc_dmabuf *mp;
5216 struct lpfc_mqe *mqe;
5217 uint32_t data_length;
5218 int rc;
dea3101e 5219
da0436e9
JS
5220 /* Program the default value of vlan_id and fc_map */
5221 phba->valid_vlan = 0;
5222 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5223 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5224 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
2e0fef85 5225
ff78d8f9
JS
5226 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5227 if (!mboxq)
da0436e9
JS
5228 return -ENOMEM;
5229
ff78d8f9
JS
5230 mqe = &mboxq->u.mqe;
5231 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq)) {
5232 rc = -ENOMEM;
5233 goto out_free_mboxq;
5234 }
5235
da0436e9
JS
5236 mp = (struct lpfc_dmabuf *) mboxq->context1;
5237 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5238
5239 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
5240 "(%d):2571 Mailbox cmd x%x Status x%x "
5241 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5242 "x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5243 "CQ: x%x x%x x%x x%x\n",
5244 mboxq->vport ? mboxq->vport->vpi : 0,
5245 bf_get(lpfc_mqe_command, mqe),
5246 bf_get(lpfc_mqe_status, mqe),
5247 mqe->un.mb_words[0], mqe->un.mb_words[1],
5248 mqe->un.mb_words[2], mqe->un.mb_words[3],
5249 mqe->un.mb_words[4], mqe->un.mb_words[5],
5250 mqe->un.mb_words[6], mqe->un.mb_words[7],
5251 mqe->un.mb_words[8], mqe->un.mb_words[9],
5252 mqe->un.mb_words[10], mqe->un.mb_words[11],
5253 mqe->un.mb_words[12], mqe->un.mb_words[13],
5254 mqe->un.mb_words[14], mqe->un.mb_words[15],
5255 mqe->un.mb_words[16], mqe->un.mb_words[50],
5256 mboxq->mcqe.word0,
5257 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
5258 mboxq->mcqe.trailer);
5259
5260 if (rc) {
5261 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5262 kfree(mp);
ff78d8f9
JS
5263 rc = -EIO;
5264 goto out_free_mboxq;
da0436e9
JS
5265 }
5266 data_length = mqe->un.mb_words[5];
a0c87cbd 5267 if (data_length > DMP_RGN23_SIZE) {
d11e31dd
JS
5268 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5269 kfree(mp);
ff78d8f9
JS
5270 rc = -EIO;
5271 goto out_free_mboxq;
d11e31dd 5272 }
dea3101e 5273
da0436e9
JS
5274 lpfc_parse_fcoe_conf(phba, mp->virt, data_length);
5275 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5276 kfree(mp);
ff78d8f9
JS
5277 rc = 0;
5278
5279out_free_mboxq:
5280 mempool_free(mboxq, phba->mbox_mem_pool);
5281 return rc;
da0436e9 5282}
e59058c4
JS
5283
5284/**
da0436e9
JS
5285 * lpfc_sli4_read_rev - Issue READ_REV and collect vpd data
5286 * @phba: pointer to lpfc hba data structure.
5287 * @mboxq: pointer to the LPFC_MBOXQ_t structure.
5288 * @vpd: pointer to the memory to hold resulting port vpd data.
5289 * @vpd_size: On input, the number of bytes allocated to @vpd.
5290 * On output, the number of data bytes in @vpd.
e59058c4 5291 *
da0436e9
JS
5292 * This routine executes a READ_REV SLI4 mailbox command. In
5293 * addition, this routine gets the port vpd data.
5294 *
5295 * Return codes
af901ca1 5296 * 0 - successful
d439d286 5297 * -ENOMEM - could not allocated memory.
e59058c4 5298 **/
da0436e9
JS
5299static int
5300lpfc_sli4_read_rev(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
5301 uint8_t *vpd, uint32_t *vpd_size)
dea3101e 5302{
da0436e9
JS
5303 int rc = 0;
5304 uint32_t dma_size;
5305 struct lpfc_dmabuf *dmabuf;
5306 struct lpfc_mqe *mqe;
dea3101e 5307
da0436e9
JS
5308 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
5309 if (!dmabuf)
5310 return -ENOMEM;
5311
5312 /*
5313 * Get a DMA buffer for the vpd data resulting from the READ_REV
5314 * mailbox command.
a257bf90 5315 */
da0436e9 5316 dma_size = *vpd_size;
1aee383d
JP
5317 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, dma_size,
5318 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
5319 if (!dmabuf->virt) {
5320 kfree(dmabuf);
5321 return -ENOMEM;
a257bf90
JS
5322 }
5323
da0436e9
JS
5324 /*
5325 * The SLI4 implementation of READ_REV conflicts at word1,
5326 * bits 31:16 and SLI4 adds vpd functionality not present
5327 * in SLI3. This code corrects the conflicts.
1dcb58e5 5328 */
da0436e9
JS
5329 lpfc_read_rev(phba, mboxq);
5330 mqe = &mboxq->u.mqe;
5331 mqe->un.read_rev.vpd_paddr_high = putPaddrHigh(dmabuf->phys);
5332 mqe->un.read_rev.vpd_paddr_low = putPaddrLow(dmabuf->phys);
5333 mqe->un.read_rev.word1 &= 0x0000FFFF;
5334 bf_set(lpfc_mbx_rd_rev_vpd, &mqe->un.read_rev, 1);
5335 bf_set(lpfc_mbx_rd_rev_avail_len, &mqe->un.read_rev, dma_size);
5336
5337 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5338 if (rc) {
5339 dma_free_coherent(&phba->pcidev->dev, dma_size,
5340 dmabuf->virt, dmabuf->phys);
def9c7a9 5341 kfree(dmabuf);
da0436e9
JS
5342 return -EIO;
5343 }
1dcb58e5 5344
da0436e9
JS
5345 /*
5346 * The available vpd length cannot be bigger than the
5347 * DMA buffer passed to the port. Catch the less than
5348 * case and update the caller's size.
5349 */
5350 if (mqe->un.read_rev.avail_vpd_len < *vpd_size)
5351 *vpd_size = mqe->un.read_rev.avail_vpd_len;
3772a991 5352
d7c47992
JS
5353 memcpy(vpd, dmabuf->virt, *vpd_size);
5354
da0436e9
JS
5355 dma_free_coherent(&phba->pcidev->dev, dma_size,
5356 dmabuf->virt, dmabuf->phys);
5357 kfree(dmabuf);
5358 return 0;
dea3101e
JB
5359}
5360
cd1c8301
JS
5361/**
5362 * lpfc_sli4_retrieve_pport_name - Retrieve SLI4 device physical port name
5363 * @phba: pointer to lpfc hba data structure.
5364 *
5365 * This routine retrieves SLI4 device physical port name this PCI function
5366 * is attached to.
5367 *
5368 * Return codes
4907cb7b 5369 * 0 - successful
cd1c8301
JS
5370 * otherwise - failed to retrieve physical port name
5371 **/
5372static int
5373lpfc_sli4_retrieve_pport_name(struct lpfc_hba *phba)
5374{
5375 LPFC_MBOXQ_t *mboxq;
cd1c8301
JS
5376 struct lpfc_mbx_get_cntl_attributes *mbx_cntl_attr;
5377 struct lpfc_controller_attribute *cntl_attr;
5378 struct lpfc_mbx_get_port_name *get_port_name;
5379 void *virtaddr = NULL;
5380 uint32_t alloclen, reqlen;
5381 uint32_t shdr_status, shdr_add_status;
5382 union lpfc_sli4_cfg_shdr *shdr;
5383 char cport_name = 0;
5384 int rc;
5385
5386 /* We assume nothing at this point */
5387 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5388 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_NON;
5389
5390 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5391 if (!mboxq)
5392 return -ENOMEM;
cd1c8301 5393 /* obtain link type and link number via READ_CONFIG */
ff78d8f9
JS
5394 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5395 lpfc_sli4_read_config(phba);
5396 if (phba->sli4_hba.lnk_info.lnk_dv == LPFC_LNK_DAT_VAL)
5397 goto retrieve_ppname;
cd1c8301
JS
5398
5399 /* obtain link type and link number via COMMON_GET_CNTL_ATTRIBUTES */
5400 reqlen = sizeof(struct lpfc_mbx_get_cntl_attributes);
5401 alloclen = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5402 LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES, reqlen,
5403 LPFC_SLI4_MBX_NEMBED);
5404 if (alloclen < reqlen) {
5405 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5406 "3084 Allocated DMA memory size (%d) is "
5407 "less than the requested DMA memory size "
5408 "(%d)\n", alloclen, reqlen);
5409 rc = -ENOMEM;
5410 goto out_free_mboxq;
5411 }
5412 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5413 virtaddr = mboxq->sge_array->addr[0];
5414 mbx_cntl_attr = (struct lpfc_mbx_get_cntl_attributes *)virtaddr;
5415 shdr = &mbx_cntl_attr->cfg_shdr;
5416 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5417 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5418 if (shdr_status || shdr_add_status || rc) {
5419 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5420 "3085 Mailbox x%x (x%x/x%x) failed, "
5421 "rc:x%x, status:x%x, add_status:x%x\n",
5422 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5423 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5424 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5425 rc, shdr_status, shdr_add_status);
5426 rc = -ENXIO;
5427 goto out_free_mboxq;
5428 }
5429 cntl_attr = &mbx_cntl_attr->cntl_attr;
5430 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
5431 phba->sli4_hba.lnk_info.lnk_tp =
5432 bf_get(lpfc_cntl_attr_lnk_type, cntl_attr);
5433 phba->sli4_hba.lnk_info.lnk_no =
5434 bf_get(lpfc_cntl_attr_lnk_numb, cntl_attr);
5435 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5436 "3086 lnk_type:%d, lnk_numb:%d\n",
5437 phba->sli4_hba.lnk_info.lnk_tp,
5438 phba->sli4_hba.lnk_info.lnk_no);
5439
5440retrieve_ppname:
5441 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5442 LPFC_MBOX_OPCODE_GET_PORT_NAME,
5443 sizeof(struct lpfc_mbx_get_port_name) -
5444 sizeof(struct lpfc_sli4_cfg_mhdr),
5445 LPFC_SLI4_MBX_EMBED);
5446 get_port_name = &mboxq->u.mqe.un.get_port_name;
5447 shdr = (union lpfc_sli4_cfg_shdr *)&get_port_name->header.cfg_shdr;
5448 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_OPCODE_VERSION_1);
5449 bf_set(lpfc_mbx_get_port_name_lnk_type, &get_port_name->u.request,
5450 phba->sli4_hba.lnk_info.lnk_tp);
5451 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5452 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5453 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5454 if (shdr_status || shdr_add_status || rc) {
5455 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5456 "3087 Mailbox x%x (x%x/x%x) failed: "
5457 "rc:x%x, status:x%x, add_status:x%x\n",
5458 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5459 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5460 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5461 rc, shdr_status, shdr_add_status);
5462 rc = -ENXIO;
5463 goto out_free_mboxq;
5464 }
5465 switch (phba->sli4_hba.lnk_info.lnk_no) {
5466 case LPFC_LINK_NUMBER_0:
5467 cport_name = bf_get(lpfc_mbx_get_port_name_name0,
5468 &get_port_name->u.response);
5469 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5470 break;
5471 case LPFC_LINK_NUMBER_1:
5472 cport_name = bf_get(lpfc_mbx_get_port_name_name1,
5473 &get_port_name->u.response);
5474 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5475 break;
5476 case LPFC_LINK_NUMBER_2:
5477 cport_name = bf_get(lpfc_mbx_get_port_name_name2,
5478 &get_port_name->u.response);
5479 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5480 break;
5481 case LPFC_LINK_NUMBER_3:
5482 cport_name = bf_get(lpfc_mbx_get_port_name_name3,
5483 &get_port_name->u.response);
5484 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5485 break;
5486 default:
5487 break;
5488 }
5489
5490 if (phba->sli4_hba.pport_name_sta == LPFC_SLI4_PPNAME_GET) {
5491 phba->Port[0] = cport_name;
5492 phba->Port[1] = '\0';
5493 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5494 "3091 SLI get port name: %s\n", phba->Port);
5495 }
5496
5497out_free_mboxq:
5498 if (rc != MBX_TIMEOUT) {
5499 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5500 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5501 else
5502 mempool_free(mboxq, phba->mbox_mem_pool);
5503 }
5504 return rc;
5505}
5506
e59058c4 5507/**
da0436e9
JS
5508 * lpfc_sli4_arm_cqeq_intr - Arm sli-4 device completion and event queues
5509 * @phba: pointer to lpfc hba data structure.
e59058c4 5510 *
da0436e9
JS
5511 * This routine is called to explicitly arm the SLI4 device's completion and
5512 * event queues
5513 **/
5514static void
5515lpfc_sli4_arm_cqeq_intr(struct lpfc_hba *phba)
5516{
895427bd 5517 int qidx;
b71413dd 5518 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
da0436e9 5519
b71413dd
JS
5520 sli4_hba->sli4_cq_release(sli4_hba->mbx_cq, LPFC_QUEUE_REARM);
5521 sli4_hba->sli4_cq_release(sli4_hba->els_cq, LPFC_QUEUE_REARM);
5522 if (sli4_hba->nvmels_cq)
5523 sli4_hba->sli4_cq_release(sli4_hba->nvmels_cq,
895427bd
JS
5524 LPFC_QUEUE_REARM);
5525
b71413dd 5526 if (sli4_hba->fcp_cq)
895427bd 5527 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
b71413dd 5528 sli4_hba->sli4_cq_release(sli4_hba->fcp_cq[qidx],
895427bd
JS
5529 LPFC_QUEUE_REARM);
5530
b71413dd 5531 if (sli4_hba->nvme_cq)
895427bd 5532 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
b71413dd 5533 sli4_hba->sli4_cq_release(sli4_hba->nvme_cq[qidx],
895427bd 5534 LPFC_QUEUE_REARM);
1ba981fd 5535
f38fa0bb 5536 if (phba->cfg_fof)
b71413dd 5537 sli4_hba->sli4_cq_release(sli4_hba->oas_cq, LPFC_QUEUE_REARM);
1ba981fd 5538
b71413dd 5539 if (sli4_hba->hba_eq)
895427bd 5540 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
b71413dd
JS
5541 sli4_hba->sli4_eq_release(sli4_hba->hba_eq[qidx],
5542 LPFC_QUEUE_REARM);
1ba981fd 5543
2d7dbc4c
JS
5544 if (phba->nvmet_support) {
5545 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) {
b71413dd
JS
5546 sli4_hba->sli4_cq_release(
5547 sli4_hba->nvmet_cqset[qidx],
2d7dbc4c
JS
5548 LPFC_QUEUE_REARM);
5549 }
2e90f4b5 5550 }
1ba981fd
JS
5551
5552 if (phba->cfg_fof)
b71413dd 5553 sli4_hba->sli4_eq_release(sli4_hba->fof_eq, LPFC_QUEUE_REARM);
da0436e9
JS
5554}
5555
6d368e53
JS
5556/**
5557 * lpfc_sli4_get_avail_extnt_rsrc - Get available resource extent count.
5558 * @phba: Pointer to HBA context object.
5559 * @type: The resource extent type.
b76f2dc9
JS
5560 * @extnt_count: buffer to hold port available extent count.
5561 * @extnt_size: buffer to hold element count per extent.
6d368e53 5562 *
b76f2dc9
JS
5563 * This function calls the port and retrievs the number of available
5564 * extents and their size for a particular extent type.
5565 *
5566 * Returns: 0 if successful. Nonzero otherwise.
6d368e53 5567 **/
b76f2dc9 5568int
6d368e53
JS
5569lpfc_sli4_get_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type,
5570 uint16_t *extnt_count, uint16_t *extnt_size)
5571{
5572 int rc = 0;
5573 uint32_t length;
5574 uint32_t mbox_tmo;
5575 struct lpfc_mbx_get_rsrc_extent_info *rsrc_info;
5576 LPFC_MBOXQ_t *mbox;
5577
5578 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5579 if (!mbox)
5580 return -ENOMEM;
5581
5582 /* Find out how many extents are available for this resource type */
5583 length = (sizeof(struct lpfc_mbx_get_rsrc_extent_info) -
5584 sizeof(struct lpfc_sli4_cfg_mhdr));
5585 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5586 LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO,
5587 length, LPFC_SLI4_MBX_EMBED);
5588
5589 /* Send an extents count of 0 - the GET doesn't use it. */
5590 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
5591 LPFC_SLI4_MBX_EMBED);
5592 if (unlikely(rc)) {
5593 rc = -EIO;
5594 goto err_exit;
5595 }
5596
5597 if (!phba->sli4_hba.intr_enable)
5598 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5599 else {
a183a15f 5600 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5601 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5602 }
5603 if (unlikely(rc)) {
5604 rc = -EIO;
5605 goto err_exit;
5606 }
5607
5608 rsrc_info = &mbox->u.mqe.un.rsrc_extent_info;
5609 if (bf_get(lpfc_mbox_hdr_status,
5610 &rsrc_info->header.cfg_shdr.response)) {
5611 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5612 "2930 Failed to get resource extents "
5613 "Status 0x%x Add'l Status 0x%x\n",
5614 bf_get(lpfc_mbox_hdr_status,
5615 &rsrc_info->header.cfg_shdr.response),
5616 bf_get(lpfc_mbox_hdr_add_status,
5617 &rsrc_info->header.cfg_shdr.response));
5618 rc = -EIO;
5619 goto err_exit;
5620 }
5621
5622 *extnt_count = bf_get(lpfc_mbx_get_rsrc_extent_info_cnt,
5623 &rsrc_info->u.rsp);
5624 *extnt_size = bf_get(lpfc_mbx_get_rsrc_extent_info_size,
5625 &rsrc_info->u.rsp);
8a9d2e80
JS
5626
5627 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5628 "3162 Retrieved extents type-%d from port: count:%d, "
5629 "size:%d\n", type, *extnt_count, *extnt_size);
5630
5631err_exit:
6d368e53
JS
5632 mempool_free(mbox, phba->mbox_mem_pool);
5633 return rc;
5634}
5635
5636/**
5637 * lpfc_sli4_chk_avail_extnt_rsrc - Check for available SLI4 resource extents.
5638 * @phba: Pointer to HBA context object.
5639 * @type: The extent type to check.
5640 *
5641 * This function reads the current available extents from the port and checks
5642 * if the extent count or extent size has changed since the last access.
5643 * Callers use this routine post port reset to understand if there is a
5644 * extent reprovisioning requirement.
5645 *
5646 * Returns:
5647 * -Error: error indicates problem.
5648 * 1: Extent count or size has changed.
5649 * 0: No changes.
5650 **/
5651static int
5652lpfc_sli4_chk_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type)
5653{
5654 uint16_t curr_ext_cnt, rsrc_ext_cnt;
5655 uint16_t size_diff, rsrc_ext_size;
5656 int rc = 0;
5657 struct lpfc_rsrc_blks *rsrc_entry;
5658 struct list_head *rsrc_blk_list = NULL;
5659
5660 size_diff = 0;
5661 curr_ext_cnt = 0;
5662 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5663 &rsrc_ext_cnt,
5664 &rsrc_ext_size);
5665 if (unlikely(rc))
5666 return -EIO;
5667
5668 switch (type) {
5669 case LPFC_RSC_TYPE_FCOE_RPI:
5670 rsrc_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5671 break;
5672 case LPFC_RSC_TYPE_FCOE_VPI:
5673 rsrc_blk_list = &phba->lpfc_vpi_blk_list;
5674 break;
5675 case LPFC_RSC_TYPE_FCOE_XRI:
5676 rsrc_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5677 break;
5678 case LPFC_RSC_TYPE_FCOE_VFI:
5679 rsrc_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5680 break;
5681 default:
5682 break;
5683 }
5684
5685 list_for_each_entry(rsrc_entry, rsrc_blk_list, list) {
5686 curr_ext_cnt++;
5687 if (rsrc_entry->rsrc_size != rsrc_ext_size)
5688 size_diff++;
5689 }
5690
5691 if (curr_ext_cnt != rsrc_ext_cnt || size_diff != 0)
5692 rc = 1;
5693
5694 return rc;
5695}
5696
5697/**
5698 * lpfc_sli4_cfg_post_extnts -
5699 * @phba: Pointer to HBA context object.
5700 * @extnt_cnt - number of available extents.
5701 * @type - the extent type (rpi, xri, vfi, vpi).
5702 * @emb - buffer to hold either MBX_EMBED or MBX_NEMBED operation.
5703 * @mbox - pointer to the caller's allocated mailbox structure.
5704 *
5705 * This function executes the extents allocation request. It also
5706 * takes care of the amount of memory needed to allocate or get the
5707 * allocated extents. It is the caller's responsibility to evaluate
5708 * the response.
5709 *
5710 * Returns:
5711 * -Error: Error value describes the condition found.
5712 * 0: if successful
5713 **/
5714static int
8a9d2e80 5715lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t extnt_cnt,
6d368e53
JS
5716 uint16_t type, bool *emb, LPFC_MBOXQ_t *mbox)
5717{
5718 int rc = 0;
5719 uint32_t req_len;
5720 uint32_t emb_len;
5721 uint32_t alloc_len, mbox_tmo;
5722
5723 /* Calculate the total requested length of the dma memory */
8a9d2e80 5724 req_len = extnt_cnt * sizeof(uint16_t);
6d368e53
JS
5725
5726 /*
5727 * Calculate the size of an embedded mailbox. The uint32_t
5728 * accounts for extents-specific word.
5729 */
5730 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
5731 sizeof(uint32_t);
5732
5733 /*
5734 * Presume the allocation and response will fit into an embedded
5735 * mailbox. If not true, reconfigure to a non-embedded mailbox.
5736 */
5737 *emb = LPFC_SLI4_MBX_EMBED;
5738 if (req_len > emb_len) {
8a9d2e80 5739 req_len = extnt_cnt * sizeof(uint16_t) +
6d368e53
JS
5740 sizeof(union lpfc_sli4_cfg_shdr) +
5741 sizeof(uint32_t);
5742 *emb = LPFC_SLI4_MBX_NEMBED;
5743 }
5744
5745 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5746 LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT,
5747 req_len, *emb);
5748 if (alloc_len < req_len) {
5749 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
b76f2dc9 5750 "2982 Allocated DMA memory size (x%x) is "
6d368e53
JS
5751 "less than the requested DMA memory "
5752 "size (x%x)\n", alloc_len, req_len);
5753 return -ENOMEM;
5754 }
8a9d2e80 5755 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, extnt_cnt, type, *emb);
6d368e53
JS
5756 if (unlikely(rc))
5757 return -EIO;
5758
5759 if (!phba->sli4_hba.intr_enable)
5760 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5761 else {
a183a15f 5762 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5763 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5764 }
5765
5766 if (unlikely(rc))
5767 rc = -EIO;
5768 return rc;
5769}
5770
5771/**
5772 * lpfc_sli4_alloc_extent - Allocate an SLI4 resource extent.
5773 * @phba: Pointer to HBA context object.
5774 * @type: The resource extent type to allocate.
5775 *
5776 * This function allocates the number of elements for the specified
5777 * resource type.
5778 **/
5779static int
5780lpfc_sli4_alloc_extent(struct lpfc_hba *phba, uint16_t type)
5781{
5782 bool emb = false;
5783 uint16_t rsrc_id_cnt, rsrc_cnt, rsrc_size;
5784 uint16_t rsrc_id, rsrc_start, j, k;
5785 uint16_t *ids;
5786 int i, rc;
5787 unsigned long longs;
5788 unsigned long *bmask;
5789 struct lpfc_rsrc_blks *rsrc_blks;
5790 LPFC_MBOXQ_t *mbox;
5791 uint32_t length;
5792 struct lpfc_id_range *id_array = NULL;
5793 void *virtaddr = NULL;
5794 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
5795 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
5796 struct list_head *ext_blk_list;
5797
5798 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5799 &rsrc_cnt,
5800 &rsrc_size);
5801 if (unlikely(rc))
5802 return -EIO;
5803
5804 if ((rsrc_cnt == 0) || (rsrc_size == 0)) {
5805 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5806 "3009 No available Resource Extents "
5807 "for resource type 0x%x: Count: 0x%x, "
5808 "Size 0x%x\n", type, rsrc_cnt,
5809 rsrc_size);
5810 return -ENOMEM;
5811 }
5812
8a9d2e80
JS
5813 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_INIT | LOG_SLI,
5814 "2903 Post resource extents type-0x%x: "
5815 "count:%d, size %d\n", type, rsrc_cnt, rsrc_size);
6d368e53
JS
5816
5817 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5818 if (!mbox)
5819 return -ENOMEM;
5820
8a9d2e80 5821 rc = lpfc_sli4_cfg_post_extnts(phba, rsrc_cnt, type, &emb, mbox);
6d368e53
JS
5822 if (unlikely(rc)) {
5823 rc = -EIO;
5824 goto err_exit;
5825 }
5826
5827 /*
5828 * Figure out where the response is located. Then get local pointers
5829 * to the response data. The port does not guarantee to respond to
5830 * all extents counts request so update the local variable with the
5831 * allocated count from the port.
5832 */
5833 if (emb == LPFC_SLI4_MBX_EMBED) {
5834 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
5835 id_array = &rsrc_ext->u.rsp.id[0];
5836 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
5837 } else {
5838 virtaddr = mbox->sge_array->addr[0];
5839 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
5840 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
5841 id_array = &n_rsrc->id;
5842 }
5843
5844 longs = ((rsrc_cnt * rsrc_size) + BITS_PER_LONG - 1) / BITS_PER_LONG;
5845 rsrc_id_cnt = rsrc_cnt * rsrc_size;
5846
5847 /*
5848 * Based on the resource size and count, correct the base and max
5849 * resource values.
5850 */
5851 length = sizeof(struct lpfc_rsrc_blks);
5852 switch (type) {
5853 case LPFC_RSC_TYPE_FCOE_RPI:
6396bb22 5854 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
5855 sizeof(unsigned long),
5856 GFP_KERNEL);
5857 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
5858 rc = -ENOMEM;
5859 goto err_exit;
5860 }
6396bb22 5861 phba->sli4_hba.rpi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5862 sizeof(uint16_t),
5863 GFP_KERNEL);
5864 if (unlikely(!phba->sli4_hba.rpi_ids)) {
5865 kfree(phba->sli4_hba.rpi_bmask);
5866 rc = -ENOMEM;
5867 goto err_exit;
5868 }
5869
5870 /*
5871 * The next_rpi was initialized with the maximum available
5872 * count but the port may allocate a smaller number. Catch
5873 * that case and update the next_rpi.
5874 */
5875 phba->sli4_hba.next_rpi = rsrc_id_cnt;
5876
5877 /* Initialize local ptrs for common extent processing later. */
5878 bmask = phba->sli4_hba.rpi_bmask;
5879 ids = phba->sli4_hba.rpi_ids;
5880 ext_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5881 break;
5882 case LPFC_RSC_TYPE_FCOE_VPI:
6396bb22 5883 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
5884 GFP_KERNEL);
5885 if (unlikely(!phba->vpi_bmask)) {
5886 rc = -ENOMEM;
5887 goto err_exit;
5888 }
6396bb22 5889 phba->vpi_ids = kcalloc(rsrc_id_cnt, sizeof(uint16_t),
6d368e53
JS
5890 GFP_KERNEL);
5891 if (unlikely(!phba->vpi_ids)) {
5892 kfree(phba->vpi_bmask);
5893 rc = -ENOMEM;
5894 goto err_exit;
5895 }
5896
5897 /* Initialize local ptrs for common extent processing later. */
5898 bmask = phba->vpi_bmask;
5899 ids = phba->vpi_ids;
5900 ext_blk_list = &phba->lpfc_vpi_blk_list;
5901 break;
5902 case LPFC_RSC_TYPE_FCOE_XRI:
6396bb22 5903 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
5904 sizeof(unsigned long),
5905 GFP_KERNEL);
5906 if (unlikely(!phba->sli4_hba.xri_bmask)) {
5907 rc = -ENOMEM;
5908 goto err_exit;
5909 }
8a9d2e80 5910 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 5911 phba->sli4_hba.xri_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5912 sizeof(uint16_t),
5913 GFP_KERNEL);
5914 if (unlikely(!phba->sli4_hba.xri_ids)) {
5915 kfree(phba->sli4_hba.xri_bmask);
5916 rc = -ENOMEM;
5917 goto err_exit;
5918 }
5919
5920 /* Initialize local ptrs for common extent processing later. */
5921 bmask = phba->sli4_hba.xri_bmask;
5922 ids = phba->sli4_hba.xri_ids;
5923 ext_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5924 break;
5925 case LPFC_RSC_TYPE_FCOE_VFI:
6396bb22 5926 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
5927 sizeof(unsigned long),
5928 GFP_KERNEL);
5929 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
5930 rc = -ENOMEM;
5931 goto err_exit;
5932 }
6396bb22 5933 phba->sli4_hba.vfi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5934 sizeof(uint16_t),
5935 GFP_KERNEL);
5936 if (unlikely(!phba->sli4_hba.vfi_ids)) {
5937 kfree(phba->sli4_hba.vfi_bmask);
5938 rc = -ENOMEM;
5939 goto err_exit;
5940 }
5941
5942 /* Initialize local ptrs for common extent processing later. */
5943 bmask = phba->sli4_hba.vfi_bmask;
5944 ids = phba->sli4_hba.vfi_ids;
5945 ext_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5946 break;
5947 default:
5948 /* Unsupported Opcode. Fail call. */
5949 id_array = NULL;
5950 bmask = NULL;
5951 ids = NULL;
5952 ext_blk_list = NULL;
5953 goto err_exit;
5954 }
5955
5956 /*
5957 * Complete initializing the extent configuration with the
5958 * allocated ids assigned to this function. The bitmask serves
5959 * as an index into the array and manages the available ids. The
5960 * array just stores the ids communicated to the port via the wqes.
5961 */
5962 for (i = 0, j = 0, k = 0; i < rsrc_cnt; i++) {
5963 if ((i % 2) == 0)
5964 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_0,
5965 &id_array[k]);
5966 else
5967 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_1,
5968 &id_array[k]);
5969
5970 rsrc_blks = kzalloc(length, GFP_KERNEL);
5971 if (unlikely(!rsrc_blks)) {
5972 rc = -ENOMEM;
5973 kfree(bmask);
5974 kfree(ids);
5975 goto err_exit;
5976 }
5977 rsrc_blks->rsrc_start = rsrc_id;
5978 rsrc_blks->rsrc_size = rsrc_size;
5979 list_add_tail(&rsrc_blks->list, ext_blk_list);
5980 rsrc_start = rsrc_id;
895427bd 5981 if ((type == LPFC_RSC_TYPE_FCOE_XRI) && (j == 0)) {
6d368e53 5982 phba->sli4_hba.scsi_xri_start = rsrc_start +
895427bd
JS
5983 lpfc_sli4_get_iocb_cnt(phba);
5984 phba->sli4_hba.nvme_xri_start =
5985 phba->sli4_hba.scsi_xri_start +
5986 phba->sli4_hba.scsi_xri_max;
5987 }
6d368e53
JS
5988
5989 while (rsrc_id < (rsrc_start + rsrc_size)) {
5990 ids[j] = rsrc_id;
5991 rsrc_id++;
5992 j++;
5993 }
5994 /* Entire word processed. Get next word.*/
5995 if ((i % 2) == 1)
5996 k++;
5997 }
5998 err_exit:
5999 lpfc_sli4_mbox_cmd_free(phba, mbox);
6000 return rc;
6001}
6002
895427bd
JS
6003
6004
6d368e53
JS
6005/**
6006 * lpfc_sli4_dealloc_extent - Deallocate an SLI4 resource extent.
6007 * @phba: Pointer to HBA context object.
6008 * @type: the extent's type.
6009 *
6010 * This function deallocates all extents of a particular resource type.
6011 * SLI4 does not allow for deallocating a particular extent range. It
6012 * is the caller's responsibility to release all kernel memory resources.
6013 **/
6014static int
6015lpfc_sli4_dealloc_extent(struct lpfc_hba *phba, uint16_t type)
6016{
6017 int rc;
6018 uint32_t length, mbox_tmo = 0;
6019 LPFC_MBOXQ_t *mbox;
6020 struct lpfc_mbx_dealloc_rsrc_extents *dealloc_rsrc;
6021 struct lpfc_rsrc_blks *rsrc_blk, *rsrc_blk_next;
6022
6023 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6024 if (!mbox)
6025 return -ENOMEM;
6026
6027 /*
6028 * This function sends an embedded mailbox because it only sends the
6029 * the resource type. All extents of this type are released by the
6030 * port.
6031 */
6032 length = (sizeof(struct lpfc_mbx_dealloc_rsrc_extents) -
6033 sizeof(struct lpfc_sli4_cfg_mhdr));
6034 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6035 LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT,
6036 length, LPFC_SLI4_MBX_EMBED);
6037
6038 /* Send an extents count of 0 - the dealloc doesn't use it. */
6039 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
6040 LPFC_SLI4_MBX_EMBED);
6041 if (unlikely(rc)) {
6042 rc = -EIO;
6043 goto out_free_mbox;
6044 }
6045 if (!phba->sli4_hba.intr_enable)
6046 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6047 else {
a183a15f 6048 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
6049 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6050 }
6051 if (unlikely(rc)) {
6052 rc = -EIO;
6053 goto out_free_mbox;
6054 }
6055
6056 dealloc_rsrc = &mbox->u.mqe.un.dealloc_rsrc_extents;
6057 if (bf_get(lpfc_mbox_hdr_status,
6058 &dealloc_rsrc->header.cfg_shdr.response)) {
6059 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6060 "2919 Failed to release resource extents "
6061 "for type %d - Status 0x%x Add'l Status 0x%x. "
6062 "Resource memory not released.\n",
6063 type,
6064 bf_get(lpfc_mbox_hdr_status,
6065 &dealloc_rsrc->header.cfg_shdr.response),
6066 bf_get(lpfc_mbox_hdr_add_status,
6067 &dealloc_rsrc->header.cfg_shdr.response));
6068 rc = -EIO;
6069 goto out_free_mbox;
6070 }
6071
6072 /* Release kernel memory resources for the specific type. */
6073 switch (type) {
6074 case LPFC_RSC_TYPE_FCOE_VPI:
6075 kfree(phba->vpi_bmask);
6076 kfree(phba->vpi_ids);
6077 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6078 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6079 &phba->lpfc_vpi_blk_list, list) {
6080 list_del_init(&rsrc_blk->list);
6081 kfree(rsrc_blk);
6082 }
16a3a208 6083 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6084 break;
6085 case LPFC_RSC_TYPE_FCOE_XRI:
6086 kfree(phba->sli4_hba.xri_bmask);
6087 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6088 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6089 &phba->sli4_hba.lpfc_xri_blk_list, list) {
6090 list_del_init(&rsrc_blk->list);
6091 kfree(rsrc_blk);
6092 }
6093 break;
6094 case LPFC_RSC_TYPE_FCOE_VFI:
6095 kfree(phba->sli4_hba.vfi_bmask);
6096 kfree(phba->sli4_hba.vfi_ids);
6097 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6098 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6099 &phba->sli4_hba.lpfc_vfi_blk_list, list) {
6100 list_del_init(&rsrc_blk->list);
6101 kfree(rsrc_blk);
6102 }
6103 break;
6104 case LPFC_RSC_TYPE_FCOE_RPI:
6105 /* RPI bitmask and physical id array are cleaned up earlier. */
6106 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6107 &phba->sli4_hba.lpfc_rpi_blk_list, list) {
6108 list_del_init(&rsrc_blk->list);
6109 kfree(rsrc_blk);
6110 }
6111 break;
6112 default:
6113 break;
6114 }
6115
6116 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6117
6118 out_free_mbox:
6119 mempool_free(mbox, phba->mbox_mem_pool);
6120 return rc;
6121}
6122
bd4b3e5c 6123static void
7bdedb34
JS
6124lpfc_set_features(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox,
6125 uint32_t feature)
65791f1f 6126{
65791f1f 6127 uint32_t len;
65791f1f 6128
65791f1f
JS
6129 len = sizeof(struct lpfc_mbx_set_feature) -
6130 sizeof(struct lpfc_sli4_cfg_mhdr);
6131 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6132 LPFC_MBOX_OPCODE_SET_FEATURES, len,
6133 LPFC_SLI4_MBX_EMBED);
7bdedb34
JS
6134
6135 switch (feature) {
6136 case LPFC_SET_UE_RECOVERY:
6137 bf_set(lpfc_mbx_set_feature_UER,
6138 &mbox->u.mqe.un.set_feature, 1);
6139 mbox->u.mqe.un.set_feature.feature = LPFC_SET_UE_RECOVERY;
6140 mbox->u.mqe.un.set_feature.param_len = 8;
6141 break;
6142 case LPFC_SET_MDS_DIAGS:
6143 bf_set(lpfc_mbx_set_feature_mds,
6144 &mbox->u.mqe.un.set_feature, 1);
6145 bf_set(lpfc_mbx_set_feature_mds_deep_loopbk,
ae9e28f3 6146 &mbox->u.mqe.un.set_feature, 1);
7bdedb34
JS
6147 mbox->u.mqe.un.set_feature.feature = LPFC_SET_MDS_DIAGS;
6148 mbox->u.mqe.un.set_feature.param_len = 8;
6149 break;
65791f1f 6150 }
7bdedb34
JS
6151
6152 return;
65791f1f
JS
6153}
6154
6d368e53
JS
6155/**
6156 * lpfc_sli4_alloc_resource_identifiers - Allocate all SLI4 resource extents.
6157 * @phba: Pointer to HBA context object.
6158 *
6159 * This function allocates all SLI4 resource identifiers.
6160 **/
6161int
6162lpfc_sli4_alloc_resource_identifiers(struct lpfc_hba *phba)
6163{
6164 int i, rc, error = 0;
6165 uint16_t count, base;
6166 unsigned long longs;
6167
ff78d8f9
JS
6168 if (!phba->sli4_hba.rpi_hdrs_in_use)
6169 phba->sli4_hba.next_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
6d368e53
JS
6170 if (phba->sli4_hba.extents_in_use) {
6171 /*
6172 * The port supports resource extents. The XRI, VPI, VFI, RPI
6173 * resource extent count must be read and allocated before
6174 * provisioning the resource id arrays.
6175 */
6176 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
6177 LPFC_IDX_RSRC_RDY) {
6178 /*
6179 * Extent-based resources are set - the driver could
6180 * be in a port reset. Figure out if any corrective
6181 * actions need to be taken.
6182 */
6183 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6184 LPFC_RSC_TYPE_FCOE_VFI);
6185 if (rc != 0)
6186 error++;
6187 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6188 LPFC_RSC_TYPE_FCOE_VPI);
6189 if (rc != 0)
6190 error++;
6191 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6192 LPFC_RSC_TYPE_FCOE_XRI);
6193 if (rc != 0)
6194 error++;
6195 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6196 LPFC_RSC_TYPE_FCOE_RPI);
6197 if (rc != 0)
6198 error++;
6199
6200 /*
6201 * It's possible that the number of resources
6202 * provided to this port instance changed between
6203 * resets. Detect this condition and reallocate
6204 * resources. Otherwise, there is no action.
6205 */
6206 if (error) {
6207 lpfc_printf_log(phba, KERN_INFO,
6208 LOG_MBOX | LOG_INIT,
6209 "2931 Detected extent resource "
6210 "change. Reallocating all "
6211 "extents.\n");
6212 rc = lpfc_sli4_dealloc_extent(phba,
6213 LPFC_RSC_TYPE_FCOE_VFI);
6214 rc = lpfc_sli4_dealloc_extent(phba,
6215 LPFC_RSC_TYPE_FCOE_VPI);
6216 rc = lpfc_sli4_dealloc_extent(phba,
6217 LPFC_RSC_TYPE_FCOE_XRI);
6218 rc = lpfc_sli4_dealloc_extent(phba,
6219 LPFC_RSC_TYPE_FCOE_RPI);
6220 } else
6221 return 0;
6222 }
6223
6224 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6225 if (unlikely(rc))
6226 goto err_exit;
6227
6228 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6229 if (unlikely(rc))
6230 goto err_exit;
6231
6232 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6233 if (unlikely(rc))
6234 goto err_exit;
6235
6236 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6237 if (unlikely(rc))
6238 goto err_exit;
6239 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6240 LPFC_IDX_RSRC_RDY);
6241 return rc;
6242 } else {
6243 /*
6244 * The port does not support resource extents. The XRI, VPI,
6245 * VFI, RPI resource ids were determined from READ_CONFIG.
6246 * Just allocate the bitmasks and provision the resource id
6247 * arrays. If a port reset is active, the resources don't
6248 * need any action - just exit.
6249 */
6250 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
ff78d8f9
JS
6251 LPFC_IDX_RSRC_RDY) {
6252 lpfc_sli4_dealloc_resource_identifiers(phba);
6253 lpfc_sli4_remove_rpis(phba);
6254 }
6d368e53
JS
6255 /* RPIs. */
6256 count = phba->sli4_hba.max_cfg_param.max_rpi;
0a630c27
JS
6257 if (count <= 0) {
6258 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6259 "3279 Invalid provisioning of "
6260 "rpi:%d\n", count);
6261 rc = -EINVAL;
6262 goto err_exit;
6263 }
6d368e53
JS
6264 base = phba->sli4_hba.max_cfg_param.rpi_base;
6265 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6266 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
6267 sizeof(unsigned long),
6268 GFP_KERNEL);
6269 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
6270 rc = -ENOMEM;
6271 goto err_exit;
6272 }
6396bb22 6273 phba->sli4_hba.rpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6274 GFP_KERNEL);
6275 if (unlikely(!phba->sli4_hba.rpi_ids)) {
6276 rc = -ENOMEM;
6277 goto free_rpi_bmask;
6278 }
6279
6280 for (i = 0; i < count; i++)
6281 phba->sli4_hba.rpi_ids[i] = base + i;
6282
6283 /* VPIs. */
6284 count = phba->sli4_hba.max_cfg_param.max_vpi;
0a630c27
JS
6285 if (count <= 0) {
6286 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6287 "3280 Invalid provisioning of "
6288 "vpi:%d\n", count);
6289 rc = -EINVAL;
6290 goto free_rpi_ids;
6291 }
6d368e53
JS
6292 base = phba->sli4_hba.max_cfg_param.vpi_base;
6293 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6294 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
6295 GFP_KERNEL);
6296 if (unlikely(!phba->vpi_bmask)) {
6297 rc = -ENOMEM;
6298 goto free_rpi_ids;
6299 }
6396bb22 6300 phba->vpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6301 GFP_KERNEL);
6302 if (unlikely(!phba->vpi_ids)) {
6303 rc = -ENOMEM;
6304 goto free_vpi_bmask;
6305 }
6306
6307 for (i = 0; i < count; i++)
6308 phba->vpi_ids[i] = base + i;
6309
6310 /* XRIs. */
6311 count = phba->sli4_hba.max_cfg_param.max_xri;
0a630c27
JS
6312 if (count <= 0) {
6313 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6314 "3281 Invalid provisioning of "
6315 "xri:%d\n", count);
6316 rc = -EINVAL;
6317 goto free_vpi_ids;
6318 }
6d368e53
JS
6319 base = phba->sli4_hba.max_cfg_param.xri_base;
6320 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6321 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
6322 sizeof(unsigned long),
6323 GFP_KERNEL);
6324 if (unlikely(!phba->sli4_hba.xri_bmask)) {
6325 rc = -ENOMEM;
6326 goto free_vpi_ids;
6327 }
41899be7 6328 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 6329 phba->sli4_hba.xri_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6330 GFP_KERNEL);
6331 if (unlikely(!phba->sli4_hba.xri_ids)) {
6332 rc = -ENOMEM;
6333 goto free_xri_bmask;
6334 }
6335
6336 for (i = 0; i < count; i++)
6337 phba->sli4_hba.xri_ids[i] = base + i;
6338
6339 /* VFIs. */
6340 count = phba->sli4_hba.max_cfg_param.max_vfi;
0a630c27
JS
6341 if (count <= 0) {
6342 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6343 "3282 Invalid provisioning of "
6344 "vfi:%d\n", count);
6345 rc = -EINVAL;
6346 goto free_xri_ids;
6347 }
6d368e53
JS
6348 base = phba->sli4_hba.max_cfg_param.vfi_base;
6349 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6350 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
6351 sizeof(unsigned long),
6352 GFP_KERNEL);
6353 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
6354 rc = -ENOMEM;
6355 goto free_xri_ids;
6356 }
6396bb22 6357 phba->sli4_hba.vfi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6358 GFP_KERNEL);
6359 if (unlikely(!phba->sli4_hba.vfi_ids)) {
6360 rc = -ENOMEM;
6361 goto free_vfi_bmask;
6362 }
6363
6364 for (i = 0; i < count; i++)
6365 phba->sli4_hba.vfi_ids[i] = base + i;
6366
6367 /*
6368 * Mark all resources ready. An HBA reset doesn't need
6369 * to reset the initialization.
6370 */
6371 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6372 LPFC_IDX_RSRC_RDY);
6373 return 0;
6374 }
6375
6376 free_vfi_bmask:
6377 kfree(phba->sli4_hba.vfi_bmask);
cd60be49 6378 phba->sli4_hba.vfi_bmask = NULL;
6d368e53
JS
6379 free_xri_ids:
6380 kfree(phba->sli4_hba.xri_ids);
cd60be49 6381 phba->sli4_hba.xri_ids = NULL;
6d368e53
JS
6382 free_xri_bmask:
6383 kfree(phba->sli4_hba.xri_bmask);
cd60be49 6384 phba->sli4_hba.xri_bmask = NULL;
6d368e53
JS
6385 free_vpi_ids:
6386 kfree(phba->vpi_ids);
cd60be49 6387 phba->vpi_ids = NULL;
6d368e53
JS
6388 free_vpi_bmask:
6389 kfree(phba->vpi_bmask);
cd60be49 6390 phba->vpi_bmask = NULL;
6d368e53
JS
6391 free_rpi_ids:
6392 kfree(phba->sli4_hba.rpi_ids);
cd60be49 6393 phba->sli4_hba.rpi_ids = NULL;
6d368e53
JS
6394 free_rpi_bmask:
6395 kfree(phba->sli4_hba.rpi_bmask);
cd60be49 6396 phba->sli4_hba.rpi_bmask = NULL;
6d368e53
JS
6397 err_exit:
6398 return rc;
6399}
6400
6401/**
6402 * lpfc_sli4_dealloc_resource_identifiers - Deallocate all SLI4 resource extents.
6403 * @phba: Pointer to HBA context object.
6404 *
6405 * This function allocates the number of elements for the specified
6406 * resource type.
6407 **/
6408int
6409lpfc_sli4_dealloc_resource_identifiers(struct lpfc_hba *phba)
6410{
6411 if (phba->sli4_hba.extents_in_use) {
6412 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6413 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6414 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6415 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6416 } else {
6417 kfree(phba->vpi_bmask);
16a3a208 6418 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6419 kfree(phba->vpi_ids);
6420 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6421 kfree(phba->sli4_hba.xri_bmask);
6422 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6423 kfree(phba->sli4_hba.vfi_bmask);
6424 kfree(phba->sli4_hba.vfi_ids);
6425 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6426 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6427 }
6428
6429 return 0;
6430}
6431
b76f2dc9
JS
6432/**
6433 * lpfc_sli4_get_allocated_extnts - Get the port's allocated extents.
6434 * @phba: Pointer to HBA context object.
6435 * @type: The resource extent type.
6436 * @extnt_count: buffer to hold port extent count response
6437 * @extnt_size: buffer to hold port extent size response.
6438 *
6439 * This function calls the port to read the host allocated extents
6440 * for a particular type.
6441 **/
6442int
6443lpfc_sli4_get_allocated_extnts(struct lpfc_hba *phba, uint16_t type,
6444 uint16_t *extnt_cnt, uint16_t *extnt_size)
6445{
6446 bool emb;
6447 int rc = 0;
6448 uint16_t curr_blks = 0;
6449 uint32_t req_len, emb_len;
6450 uint32_t alloc_len, mbox_tmo;
6451 struct list_head *blk_list_head;
6452 struct lpfc_rsrc_blks *rsrc_blk;
6453 LPFC_MBOXQ_t *mbox;
6454 void *virtaddr = NULL;
6455 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
6456 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
6457 union lpfc_sli4_cfg_shdr *shdr;
6458
6459 switch (type) {
6460 case LPFC_RSC_TYPE_FCOE_VPI:
6461 blk_list_head = &phba->lpfc_vpi_blk_list;
6462 break;
6463 case LPFC_RSC_TYPE_FCOE_XRI:
6464 blk_list_head = &phba->sli4_hba.lpfc_xri_blk_list;
6465 break;
6466 case LPFC_RSC_TYPE_FCOE_VFI:
6467 blk_list_head = &phba->sli4_hba.lpfc_vfi_blk_list;
6468 break;
6469 case LPFC_RSC_TYPE_FCOE_RPI:
6470 blk_list_head = &phba->sli4_hba.lpfc_rpi_blk_list;
6471 break;
6472 default:
6473 return -EIO;
6474 }
6475
6476 /* Count the number of extents currently allocatd for this type. */
6477 list_for_each_entry(rsrc_blk, blk_list_head, list) {
6478 if (curr_blks == 0) {
6479 /*
6480 * The GET_ALLOCATED mailbox does not return the size,
6481 * just the count. The size should be just the size
6482 * stored in the current allocated block and all sizes
6483 * for an extent type are the same so set the return
6484 * value now.
6485 */
6486 *extnt_size = rsrc_blk->rsrc_size;
6487 }
6488 curr_blks++;
6489 }
6490
b76f2dc9
JS
6491 /*
6492 * Calculate the size of an embedded mailbox. The uint32_t
6493 * accounts for extents-specific word.
6494 */
6495 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
6496 sizeof(uint32_t);
6497
6498 /*
6499 * Presume the allocation and response will fit into an embedded
6500 * mailbox. If not true, reconfigure to a non-embedded mailbox.
6501 */
6502 emb = LPFC_SLI4_MBX_EMBED;
6503 req_len = emb_len;
6504 if (req_len > emb_len) {
6505 req_len = curr_blks * sizeof(uint16_t) +
6506 sizeof(union lpfc_sli4_cfg_shdr) +
6507 sizeof(uint32_t);
6508 emb = LPFC_SLI4_MBX_NEMBED;
6509 }
6510
6511 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6512 if (!mbox)
6513 return -ENOMEM;
6514 memset(mbox, 0, sizeof(LPFC_MBOXQ_t));
6515
6516 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6517 LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT,
6518 req_len, emb);
6519 if (alloc_len < req_len) {
6520 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6521 "2983 Allocated DMA memory size (x%x) is "
6522 "less than the requested DMA memory "
6523 "size (x%x)\n", alloc_len, req_len);
6524 rc = -ENOMEM;
6525 goto err_exit;
6526 }
6527 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, curr_blks, type, emb);
6528 if (unlikely(rc)) {
6529 rc = -EIO;
6530 goto err_exit;
6531 }
6532
6533 if (!phba->sli4_hba.intr_enable)
6534 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6535 else {
a183a15f 6536 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
b76f2dc9
JS
6537 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6538 }
6539
6540 if (unlikely(rc)) {
6541 rc = -EIO;
6542 goto err_exit;
6543 }
6544
6545 /*
6546 * Figure out where the response is located. Then get local pointers
6547 * to the response data. The port does not guarantee to respond to
6548 * all extents counts request so update the local variable with the
6549 * allocated count from the port.
6550 */
6551 if (emb == LPFC_SLI4_MBX_EMBED) {
6552 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
6553 shdr = &rsrc_ext->header.cfg_shdr;
6554 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
6555 } else {
6556 virtaddr = mbox->sge_array->addr[0];
6557 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
6558 shdr = &n_rsrc->cfg_shdr;
6559 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
6560 }
6561
6562 if (bf_get(lpfc_mbox_hdr_status, &shdr->response)) {
6563 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6564 "2984 Failed to read allocated resources "
6565 "for type %d - Status 0x%x Add'l Status 0x%x.\n",
6566 type,
6567 bf_get(lpfc_mbox_hdr_status, &shdr->response),
6568 bf_get(lpfc_mbox_hdr_add_status, &shdr->response));
6569 rc = -EIO;
6570 goto err_exit;
6571 }
6572 err_exit:
6573 lpfc_sli4_mbox_cmd_free(phba, mbox);
6574 return rc;
6575}
6576
8a9d2e80 6577/**
0ef69968 6578 * lpfc_sli4_repost_sgl_list - Repost the buffers sgl pages as block
8a9d2e80 6579 * @phba: pointer to lpfc hba data structure.
895427bd
JS
6580 * @pring: Pointer to driver SLI ring object.
6581 * @sgl_list: linked link of sgl buffers to post
6582 * @cnt: number of linked list buffers
8a9d2e80 6583 *
895427bd 6584 * This routine walks the list of buffers that have been allocated and
8a9d2e80
JS
6585 * repost them to the port by using SGL block post. This is needed after a
6586 * pci_function_reset/warm_start or start. It attempts to construct blocks
895427bd
JS
6587 * of buffer sgls which contains contiguous xris and uses the non-embedded
6588 * SGL block post mailbox commands to post them to the port. For single
8a9d2e80
JS
6589 * buffer sgl with non-contiguous xri, if any, it shall use embedded SGL post
6590 * mailbox command for posting.
6591 *
6592 * Returns: 0 = success, non-zero failure.
6593 **/
6594static int
895427bd
JS
6595lpfc_sli4_repost_sgl_list(struct lpfc_hba *phba,
6596 struct list_head *sgl_list, int cnt)
8a9d2e80
JS
6597{
6598 struct lpfc_sglq *sglq_entry = NULL;
6599 struct lpfc_sglq *sglq_entry_next = NULL;
6600 struct lpfc_sglq *sglq_entry_first = NULL;
895427bd
JS
6601 int status, total_cnt;
6602 int post_cnt = 0, num_posted = 0, block_cnt = 0;
8a9d2e80
JS
6603 int last_xritag = NO_XRI;
6604 LIST_HEAD(prep_sgl_list);
6605 LIST_HEAD(blck_sgl_list);
6606 LIST_HEAD(allc_sgl_list);
6607 LIST_HEAD(post_sgl_list);
6608 LIST_HEAD(free_sgl_list);
6609
38c20673 6610 spin_lock_irq(&phba->hbalock);
895427bd
JS
6611 spin_lock(&phba->sli4_hba.sgl_list_lock);
6612 list_splice_init(sgl_list, &allc_sgl_list);
6613 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 6614 spin_unlock_irq(&phba->hbalock);
8a9d2e80 6615
895427bd 6616 total_cnt = cnt;
8a9d2e80
JS
6617 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
6618 &allc_sgl_list, list) {
6619 list_del_init(&sglq_entry->list);
6620 block_cnt++;
6621 if ((last_xritag != NO_XRI) &&
6622 (sglq_entry->sli4_xritag != last_xritag + 1)) {
6623 /* a hole in xri block, form a sgl posting block */
6624 list_splice_init(&prep_sgl_list, &blck_sgl_list);
6625 post_cnt = block_cnt - 1;
6626 /* prepare list for next posting block */
6627 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6628 block_cnt = 1;
6629 } else {
6630 /* prepare list for next posting block */
6631 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6632 /* enough sgls for non-embed sgl mbox command */
6633 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
6634 list_splice_init(&prep_sgl_list,
6635 &blck_sgl_list);
6636 post_cnt = block_cnt;
6637 block_cnt = 0;
6638 }
6639 }
6640 num_posted++;
6641
6642 /* keep track of last sgl's xritag */
6643 last_xritag = sglq_entry->sli4_xritag;
6644
895427bd
JS
6645 /* end of repost sgl list condition for buffers */
6646 if (num_posted == total_cnt) {
8a9d2e80
JS
6647 if (post_cnt == 0) {
6648 list_splice_init(&prep_sgl_list,
6649 &blck_sgl_list);
6650 post_cnt = block_cnt;
6651 } else if (block_cnt == 1) {
6652 status = lpfc_sli4_post_sgl(phba,
6653 sglq_entry->phys, 0,
6654 sglq_entry->sli4_xritag);
6655 if (!status) {
6656 /* successful, put sgl to posted list */
6657 list_add_tail(&sglq_entry->list,
6658 &post_sgl_list);
6659 } else {
6660 /* Failure, put sgl to free list */
6661 lpfc_printf_log(phba, KERN_WARNING,
6662 LOG_SLI,
895427bd 6663 "3159 Failed to post "
8a9d2e80
JS
6664 "sgl, xritag:x%x\n",
6665 sglq_entry->sli4_xritag);
6666 list_add_tail(&sglq_entry->list,
6667 &free_sgl_list);
711ea882 6668 total_cnt--;
8a9d2e80
JS
6669 }
6670 }
6671 }
6672
6673 /* continue until a nembed page worth of sgls */
6674 if (post_cnt == 0)
6675 continue;
6676
895427bd
JS
6677 /* post the buffer list sgls as a block */
6678 status = lpfc_sli4_post_sgl_list(phba, &blck_sgl_list,
6679 post_cnt);
8a9d2e80
JS
6680
6681 if (!status) {
6682 /* success, put sgl list to posted sgl list */
6683 list_splice_init(&blck_sgl_list, &post_sgl_list);
6684 } else {
6685 /* Failure, put sgl list to free sgl list */
6686 sglq_entry_first = list_first_entry(&blck_sgl_list,
6687 struct lpfc_sglq,
6688 list);
6689 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
895427bd 6690 "3160 Failed to post sgl-list, "
8a9d2e80
JS
6691 "xritag:x%x-x%x\n",
6692 sglq_entry_first->sli4_xritag,
6693 (sglq_entry_first->sli4_xritag +
6694 post_cnt - 1));
6695 list_splice_init(&blck_sgl_list, &free_sgl_list);
711ea882 6696 total_cnt -= post_cnt;
8a9d2e80
JS
6697 }
6698
6699 /* don't reset xirtag due to hole in xri block */
6700 if (block_cnt == 0)
6701 last_xritag = NO_XRI;
6702
895427bd 6703 /* reset sgl post count for next round of posting */
8a9d2e80
JS
6704 post_cnt = 0;
6705 }
6706
895427bd 6707 /* free the sgls failed to post */
8a9d2e80
JS
6708 lpfc_free_sgl_list(phba, &free_sgl_list);
6709
895427bd 6710 /* push sgls posted to the available list */
8a9d2e80 6711 if (!list_empty(&post_sgl_list)) {
38c20673 6712 spin_lock_irq(&phba->hbalock);
895427bd
JS
6713 spin_lock(&phba->sli4_hba.sgl_list_lock);
6714 list_splice_init(&post_sgl_list, sgl_list);
6715 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 6716 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
6717 } else {
6718 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 6719 "3161 Failure to post sgl to port.\n");
8a9d2e80
JS
6720 return -EIO;
6721 }
895427bd
JS
6722
6723 /* return the number of XRIs actually posted */
6724 return total_cnt;
8a9d2e80
JS
6725}
6726
61bda8f7
JS
6727void
6728lpfc_set_host_data(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
6729{
6730 uint32_t len;
6731
6732 len = sizeof(struct lpfc_mbx_set_host_data) -
6733 sizeof(struct lpfc_sli4_cfg_mhdr);
6734 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6735 LPFC_MBOX_OPCODE_SET_HOST_DATA, len,
6736 LPFC_SLI4_MBX_EMBED);
6737
6738 mbox->u.mqe.un.set_host_data.param_id = LPFC_SET_HOST_OS_DRIVER_VERSION;
b2fd103b
JS
6739 mbox->u.mqe.un.set_host_data.param_len =
6740 LPFC_HOST_OS_DRIVER_VERSION_SIZE;
61bda8f7
JS
6741 snprintf(mbox->u.mqe.un.set_host_data.data,
6742 LPFC_HOST_OS_DRIVER_VERSION_SIZE,
6743 "Linux %s v"LPFC_DRIVER_VERSION,
6744 (phba->hba_flag & HBA_FCOE_MODE) ? "FCoE" : "FC");
6745}
6746
a8cf5dfe 6747int
6c621a22 6748lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
a8cf5dfe 6749 struct lpfc_queue *drq, int count, int idx)
6c621a22
JS
6750{
6751 int rc, i;
6752 struct lpfc_rqe hrqe;
6753 struct lpfc_rqe drqe;
6754 struct lpfc_rqb *rqbp;
411de511 6755 unsigned long flags;
6c621a22
JS
6756 struct rqb_dmabuf *rqb_buffer;
6757 LIST_HEAD(rqb_buf_list);
6758
411de511 6759 spin_lock_irqsave(&phba->hbalock, flags);
6c621a22
JS
6760 rqbp = hrq->rqbp;
6761 for (i = 0; i < count; i++) {
6762 /* IF RQ is already full, don't bother */
6763 if (rqbp->buffer_count + i >= rqbp->entry_count - 1)
6764 break;
6765 rqb_buffer = rqbp->rqb_alloc_buffer(phba);
6766 if (!rqb_buffer)
6767 break;
6768 rqb_buffer->hrq = hrq;
6769 rqb_buffer->drq = drq;
a8cf5dfe 6770 rqb_buffer->idx = idx;
6c621a22
JS
6771 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
6772 }
6773 while (!list_empty(&rqb_buf_list)) {
6774 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
6775 hbuf.list);
6776
6777 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
6778 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
6779 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
6780 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
6781 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
6782 if (rc < 0) {
411de511
JS
6783 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6784 "6421 Cannot post to HRQ %d: %x %x %x "
6785 "DRQ %x %x\n",
6786 hrq->queue_id,
6787 hrq->host_index,
6788 hrq->hba_index,
6789 hrq->entry_count,
6790 drq->host_index,
6791 drq->hba_index);
6c621a22
JS
6792 rqbp->rqb_free_buffer(phba, rqb_buffer);
6793 } else {
6794 list_add_tail(&rqb_buffer->hbuf.list,
6795 &rqbp->rqb_buffer_list);
6796 rqbp->buffer_count++;
6797 }
6798 }
411de511 6799 spin_unlock_irqrestore(&phba->hbalock, flags);
6c621a22
JS
6800 return 1;
6801}
6802
da0436e9 6803/**
183b8021 6804 * lpfc_sli4_hba_setup - SLI4 device initialization PCI function
da0436e9
JS
6805 * @phba: Pointer to HBA context object.
6806 *
183b8021
MY
6807 * This function is the main SLI4 device initialization PCI function. This
6808 * function is called by the HBA initialization code, HBA reset code and
da0436e9
JS
6809 * HBA error attention handler code. Caller is not required to hold any
6810 * locks.
6811 **/
6812int
6813lpfc_sli4_hba_setup(struct lpfc_hba *phba)
6814{
6c621a22 6815 int rc, i, cnt;
da0436e9
JS
6816 LPFC_MBOXQ_t *mboxq;
6817 struct lpfc_mqe *mqe;
6818 uint8_t *vpd;
6819 uint32_t vpd_size;
6820 uint32_t ftr_rsp = 0;
6821 struct Scsi_Host *shost = lpfc_shost_from_vport(phba->pport);
6822 struct lpfc_vport *vport = phba->pport;
6823 struct lpfc_dmabuf *mp;
2d7dbc4c 6824 struct lpfc_rqb *rqbp;
da0436e9
JS
6825
6826 /* Perform a PCI function reset to start from clean */
6827 rc = lpfc_pci_function_reset(phba);
6828 if (unlikely(rc))
6829 return -ENODEV;
6830
6831 /* Check the HBA Host Status Register for readyness */
6832 rc = lpfc_sli4_post_status_check(phba);
6833 if (unlikely(rc))
6834 return -ENODEV;
6835 else {
6836 spin_lock_irq(&phba->hbalock);
6837 phba->sli.sli_flag |= LPFC_SLI_ACTIVE;
6838 spin_unlock_irq(&phba->hbalock);
6839 }
6840
6841 /*
6842 * Allocate a single mailbox container for initializing the
6843 * port.
6844 */
6845 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6846 if (!mboxq)
6847 return -ENOMEM;
6848
da0436e9 6849 /* Issue READ_REV to collect vpd and FW information. */
49198b37 6850 vpd_size = SLI4_PAGE_SIZE;
da0436e9
JS
6851 vpd = kzalloc(vpd_size, GFP_KERNEL);
6852 if (!vpd) {
6853 rc = -ENOMEM;
6854 goto out_free_mbox;
6855 }
6856
6857 rc = lpfc_sli4_read_rev(phba, mboxq, vpd, &vpd_size);
76a95d75
JS
6858 if (unlikely(rc)) {
6859 kfree(vpd);
6860 goto out_free_mbox;
6861 }
572709e2 6862
da0436e9 6863 mqe = &mboxq->u.mqe;
f1126688 6864 phba->sli_rev = bf_get(lpfc_mbx_rd_rev_sli_lvl, &mqe->un.read_rev);
b5c53958 6865 if (bf_get(lpfc_mbx_rd_rev_fcoe, &mqe->un.read_rev)) {
76a95d75 6866 phba->hba_flag |= HBA_FCOE_MODE;
b5c53958
JS
6867 phba->fcp_embed_io = 0; /* SLI4 FC support only */
6868 } else {
76a95d75 6869 phba->hba_flag &= ~HBA_FCOE_MODE;
b5c53958 6870 }
45ed1190
JS
6871
6872 if (bf_get(lpfc_mbx_rd_rev_cee_ver, &mqe->un.read_rev) ==
6873 LPFC_DCBX_CEE_MODE)
6874 phba->hba_flag |= HBA_FIP_SUPPORT;
6875 else
6876 phba->hba_flag &= ~HBA_FIP_SUPPORT;
6877
4f2e66c6
JS
6878 phba->hba_flag &= ~HBA_FCP_IOQ_FLUSH;
6879
c31098ce 6880 if (phba->sli_rev != LPFC_SLI_REV4) {
da0436e9
JS
6881 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6882 "0376 READ_REV Error. SLI Level %d "
6883 "FCoE enabled %d\n",
76a95d75 6884 phba->sli_rev, phba->hba_flag & HBA_FCOE_MODE);
da0436e9 6885 rc = -EIO;
76a95d75
JS
6886 kfree(vpd);
6887 goto out_free_mbox;
da0436e9 6888 }
cd1c8301 6889
ff78d8f9
JS
6890 /*
6891 * Continue initialization with default values even if driver failed
6892 * to read FCoE param config regions, only read parameters if the
6893 * board is FCoE
6894 */
6895 if (phba->hba_flag & HBA_FCOE_MODE &&
6896 lpfc_sli4_read_fcoe_params(phba))
6897 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_INIT,
6898 "2570 Failed to read FCoE parameters\n");
6899
cd1c8301
JS
6900 /*
6901 * Retrieve sli4 device physical port name, failure of doing it
6902 * is considered as non-fatal.
6903 */
6904 rc = lpfc_sli4_retrieve_pport_name(phba);
6905 if (!rc)
6906 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
6907 "3080 Successful retrieving SLI4 device "
6908 "physical port name: %s.\n", phba->Port);
6909
da0436e9
JS
6910 /*
6911 * Evaluate the read rev and vpd data. Populate the driver
6912 * state with the results. If this routine fails, the failure
6913 * is not fatal as the driver will use generic values.
6914 */
6915 rc = lpfc_parse_vpd(phba, vpd, vpd_size);
6916 if (unlikely(!rc)) {
6917 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6918 "0377 Error %d parsing vpd. "
6919 "Using defaults.\n", rc);
6920 rc = 0;
6921 }
76a95d75 6922 kfree(vpd);
da0436e9 6923
f1126688
JS
6924 /* Save information as VPD data */
6925 phba->vpd.rev.biuRev = mqe->un.read_rev.first_hw_rev;
6926 phba->vpd.rev.smRev = mqe->un.read_rev.second_hw_rev;
4e565cf0
JS
6927
6928 /*
6929 * This is because first G7 ASIC doesn't support the standard
6930 * 0x5a NVME cmd descriptor type/subtype
6931 */
6932 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6933 LPFC_SLI_INTF_IF_TYPE_6) &&
6934 (phba->vpd.rev.biuRev == LPFC_G7_ASIC_1) &&
6935 (phba->vpd.rev.smRev == 0) &&
6936 (phba->cfg_nvme_embed_cmd == 1))
6937 phba->cfg_nvme_embed_cmd = 0;
6938
f1126688
JS
6939 phba->vpd.rev.endecRev = mqe->un.read_rev.third_hw_rev;
6940 phba->vpd.rev.fcphHigh = bf_get(lpfc_mbx_rd_rev_fcph_high,
6941 &mqe->un.read_rev);
6942 phba->vpd.rev.fcphLow = bf_get(lpfc_mbx_rd_rev_fcph_low,
6943 &mqe->un.read_rev);
6944 phba->vpd.rev.feaLevelHigh = bf_get(lpfc_mbx_rd_rev_ftr_lvl_high,
6945 &mqe->un.read_rev);
6946 phba->vpd.rev.feaLevelLow = bf_get(lpfc_mbx_rd_rev_ftr_lvl_low,
6947 &mqe->un.read_rev);
6948 phba->vpd.rev.sli1FwRev = mqe->un.read_rev.fw_id_rev;
6949 memcpy(phba->vpd.rev.sli1FwName, mqe->un.read_rev.fw_name, 16);
6950 phba->vpd.rev.sli2FwRev = mqe->un.read_rev.ulp_fw_id_rev;
6951 memcpy(phba->vpd.rev.sli2FwName, mqe->un.read_rev.ulp_fw_name, 16);
6952 phba->vpd.rev.opFwRev = mqe->un.read_rev.fw_id_rev;
6953 memcpy(phba->vpd.rev.opFwName, mqe->un.read_rev.fw_name, 16);
6954 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
6955 "(%d):0380 READ_REV Status x%x "
6956 "fw_rev:%s fcphHi:%x fcphLo:%x flHi:%x flLo:%x\n",
6957 mboxq->vport ? mboxq->vport->vpi : 0,
6958 bf_get(lpfc_mqe_status, mqe),
6959 phba->vpd.rev.opFwName,
6960 phba->vpd.rev.fcphHigh, phba->vpd.rev.fcphLow,
6961 phba->vpd.rev.feaLevelHigh, phba->vpd.rev.feaLevelLow);
da0436e9 6962
572709e2
JS
6963 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
6964 rc = (phba->sli4_hba.max_cfg_param.max_xri >> 3);
6965 if (phba->pport->cfg_lun_queue_depth > rc) {
6966 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6967 "3362 LUN queue depth changed from %d to %d\n",
6968 phba->pport->cfg_lun_queue_depth, rc);
6969 phba->pport->cfg_lun_queue_depth = rc;
6970 }
6971
65791f1f 6972 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7bdedb34
JS
6973 LPFC_SLI_INTF_IF_TYPE_0) {
6974 lpfc_set_features(phba, mboxq, LPFC_SET_UE_RECOVERY);
6975 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6976 if (rc == MBX_SUCCESS) {
6977 phba->hba_flag |= HBA_RECOVERABLE_UE;
6978 /* Set 1Sec interval to detect UE */
6979 phba->eratt_poll_interval = 1;
6980 phba->sli4_hba.ue_to_sr = bf_get(
6981 lpfc_mbx_set_feature_UESR,
6982 &mboxq->u.mqe.un.set_feature);
6983 phba->sli4_hba.ue_to_rp = bf_get(
6984 lpfc_mbx_set_feature_UERP,
6985 &mboxq->u.mqe.un.set_feature);
6986 }
6987 }
6988
6989 if (phba->cfg_enable_mds_diags && phba->mds_diags_support) {
6990 /* Enable MDS Diagnostics only if the SLI Port supports it */
6991 lpfc_set_features(phba, mboxq, LPFC_SET_MDS_DIAGS);
6992 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6993 if (rc != MBX_SUCCESS)
6994 phba->mds_diags_support = 0;
6995 }
572709e2 6996
da0436e9
JS
6997 /*
6998 * Discover the port's supported feature set and match it against the
6999 * hosts requests.
7000 */
7001 lpfc_request_features(phba, mboxq);
7002 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7003 if (unlikely(rc)) {
7004 rc = -EIO;
76a95d75 7005 goto out_free_mbox;
da0436e9
JS
7006 }
7007
7008 /*
7009 * The port must support FCP initiator mode as this is the
7010 * only mode running in the host.
7011 */
7012 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_fcpi, &mqe->un.req_ftrs))) {
7013 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7014 "0378 No support for fcpi mode.\n");
7015 ftr_rsp++;
7016 }
0bc2b7c5
JS
7017
7018 /* Performance Hints are ONLY for FCoE */
7019 if (phba->hba_flag & HBA_FCOE_MODE) {
7020 if (bf_get(lpfc_mbx_rq_ftr_rsp_perfh, &mqe->un.req_ftrs))
7021 phba->sli3_options |= LPFC_SLI4_PERFH_ENABLED;
7022 else
7023 phba->sli3_options &= ~LPFC_SLI4_PERFH_ENABLED;
7024 }
7025
da0436e9
JS
7026 /*
7027 * If the port cannot support the host's requested features
7028 * then turn off the global config parameters to disable the
7029 * feature in the driver. This is not a fatal error.
7030 */
f44ac12f
JS
7031 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
7032 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs))) {
7033 phba->cfg_enable_bg = 0;
7034 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
bf08611b 7035 ftr_rsp++;
f44ac12f 7036 }
bf08611b 7037 }
da0436e9
JS
7038
7039 if (phba->max_vpi && phba->cfg_enable_npiv &&
7040 !(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7041 ftr_rsp++;
7042
7043 if (ftr_rsp) {
7044 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7045 "0379 Feature Mismatch Data: x%08x %08x "
7046 "x%x x%x x%x\n", mqe->un.req_ftrs.word2,
7047 mqe->un.req_ftrs.word3, phba->cfg_enable_bg,
7048 phba->cfg_enable_npiv, phba->max_vpi);
7049 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs)))
7050 phba->cfg_enable_bg = 0;
7051 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7052 phba->cfg_enable_npiv = 0;
7053 }
7054
7055 /* These SLI3 features are assumed in SLI4 */
7056 spin_lock_irq(&phba->hbalock);
7057 phba->sli3_options |= (LPFC_SLI3_NPIV_ENABLED | LPFC_SLI3_HBQ_ENABLED);
7058 spin_unlock_irq(&phba->hbalock);
7059
6d368e53
JS
7060 /*
7061 * Allocate all resources (xri,rpi,vpi,vfi) now. Subsequent
7062 * calls depends on these resources to complete port setup.
7063 */
7064 rc = lpfc_sli4_alloc_resource_identifiers(phba);
7065 if (rc) {
7066 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7067 "2920 Failed to alloc Resource IDs "
7068 "rc = x%x\n", rc);
7069 goto out_free_mbox;
7070 }
7071
61bda8f7
JS
7072 lpfc_set_host_data(phba, mboxq);
7073
7074 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7075 if (rc) {
7076 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7077 "2134 Failed to set host os driver version %x",
7078 rc);
7079 }
7080
da0436e9 7081 /* Read the port's service parameters. */
9f1177a3
JS
7082 rc = lpfc_read_sparam(phba, mboxq, vport->vpi);
7083 if (rc) {
7084 phba->link_state = LPFC_HBA_ERROR;
7085 rc = -ENOMEM;
76a95d75 7086 goto out_free_mbox;
9f1177a3
JS
7087 }
7088
da0436e9
JS
7089 mboxq->vport = vport;
7090 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7091 mp = (struct lpfc_dmabuf *) mboxq->context1;
7092 if (rc == MBX_SUCCESS) {
7093 memcpy(&vport->fc_sparam, mp->virt, sizeof(struct serv_parm));
7094 rc = 0;
7095 }
7096
7097 /*
7098 * This memory was allocated by the lpfc_read_sparam routine. Release
7099 * it to the mbuf pool.
7100 */
7101 lpfc_mbuf_free(phba, mp->virt, mp->phys);
7102 kfree(mp);
7103 mboxq->context1 = NULL;
7104 if (unlikely(rc)) {
7105 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7106 "0382 READ_SPARAM command failed "
7107 "status %d, mbxStatus x%x\n",
7108 rc, bf_get(lpfc_mqe_status, mqe));
7109 phba->link_state = LPFC_HBA_ERROR;
7110 rc = -EIO;
76a95d75 7111 goto out_free_mbox;
da0436e9
JS
7112 }
7113
0558056c 7114 lpfc_update_vport_wwn(vport);
da0436e9
JS
7115
7116 /* Update the fc_host data structures with new wwn. */
7117 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
7118 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
7119
895427bd
JS
7120 /* Create all the SLI4 queues */
7121 rc = lpfc_sli4_queue_create(phba);
7122 if (rc) {
7123 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7124 "3089 Failed to allocate queues\n");
7125 rc = -ENODEV;
7126 goto out_free_mbox;
7127 }
7128 /* Set up all the queues to the device */
7129 rc = lpfc_sli4_queue_setup(phba);
7130 if (unlikely(rc)) {
7131 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7132 "0381 Error %d during queue setup.\n ", rc);
7133 goto out_stop_timers;
7134 }
7135 /* Initialize the driver internal SLI layer lists. */
7136 lpfc_sli4_setup(phba);
7137 lpfc_sli4_queue_init(phba);
7138
7139 /* update host els xri-sgl sizes and mappings */
7140 rc = lpfc_sli4_els_sgl_update(phba);
8a9d2e80
JS
7141 if (unlikely(rc)) {
7142 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7143 "1400 Failed to update xri-sgl size and "
7144 "mapping: %d\n", rc);
895427bd 7145 goto out_destroy_queue;
da0436e9
JS
7146 }
7147
8a9d2e80 7148 /* register the els sgl pool to the port */
895427bd
JS
7149 rc = lpfc_sli4_repost_sgl_list(phba, &phba->sli4_hba.lpfc_els_sgl_list,
7150 phba->sli4_hba.els_xri_cnt);
7151 if (unlikely(rc < 0)) {
8a9d2e80
JS
7152 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7153 "0582 Error %d during els sgl post "
7154 "operation\n", rc);
7155 rc = -ENODEV;
895427bd 7156 goto out_destroy_queue;
8a9d2e80 7157 }
895427bd 7158 phba->sli4_hba.els_xri_cnt = rc;
8a9d2e80 7159
f358dd0c
JS
7160 if (phba->nvmet_support) {
7161 /* update host nvmet xri-sgl sizes and mappings */
7162 rc = lpfc_sli4_nvmet_sgl_update(phba);
7163 if (unlikely(rc)) {
7164 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7165 "6308 Failed to update nvmet-sgl size "
7166 "and mapping: %d\n", rc);
7167 goto out_destroy_queue;
7168 }
7169
7170 /* register the nvmet sgl pool to the port */
7171 rc = lpfc_sli4_repost_sgl_list(
7172 phba,
7173 &phba->sli4_hba.lpfc_nvmet_sgl_list,
7174 phba->sli4_hba.nvmet_xri_cnt);
7175 if (unlikely(rc < 0)) {
7176 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7177 "3117 Error %d during nvmet "
7178 "sgl post\n", rc);
7179 rc = -ENODEV;
7180 goto out_destroy_queue;
7181 }
7182 phba->sli4_hba.nvmet_xri_cnt = rc;
6c621a22
JS
7183
7184 cnt = phba->cfg_iocb_cnt * 1024;
7185 /* We need 1 iocbq for every SGL, for IO processing */
7186 cnt += phba->sli4_hba.nvmet_xri_cnt;
f358dd0c 7187 } else {
895427bd
JS
7188 /* update host scsi xri-sgl sizes and mappings */
7189 rc = lpfc_sli4_scsi_sgl_update(phba);
7190 if (unlikely(rc)) {
7191 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7192 "6309 Failed to update scsi-sgl size "
7193 "and mapping: %d\n", rc);
7194 goto out_destroy_queue;
7195 }
7196
7197 /* update host nvme xri-sgl sizes and mappings */
7198 rc = lpfc_sli4_nvme_sgl_update(phba);
7199 if (unlikely(rc)) {
7200 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7201 "6082 Failed to update nvme-sgl size "
7202 "and mapping: %d\n", rc);
7203 goto out_destroy_queue;
7204 }
6c621a22
JS
7205
7206 cnt = phba->cfg_iocb_cnt * 1024;
11e644e2
JS
7207 }
7208
7209 if (!phba->sli.iocbq_lookup) {
6c621a22
JS
7210 /* Initialize and populate the iocb list per host */
7211 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11e644e2 7212 "2821 initialize iocb list %d total %d\n",
6c621a22
JS
7213 phba->cfg_iocb_cnt, cnt);
7214 rc = lpfc_init_iocb_list(phba, cnt);
7215 if (rc) {
7216 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11e644e2 7217 "1413 Failed to init iocb list.\n");
6c621a22
JS
7218 goto out_destroy_queue;
7219 }
895427bd
JS
7220 }
7221
11e644e2
JS
7222 if (phba->nvmet_support)
7223 lpfc_nvmet_create_targetport(phba);
7224
2d7dbc4c 7225 if (phba->nvmet_support && phba->cfg_nvmet_mrq) {
2d7dbc4c
JS
7226 /* Post initial buffers to all RQs created */
7227 for (i = 0; i < phba->cfg_nvmet_mrq; i++) {
7228 rqbp = phba->sli4_hba.nvmet_mrq_hdr[i]->rqbp;
7229 INIT_LIST_HEAD(&rqbp->rqb_buffer_list);
7230 rqbp->rqb_alloc_buffer = lpfc_sli4_nvmet_alloc;
7231 rqbp->rqb_free_buffer = lpfc_sli4_nvmet_free;
61f3d4bf 7232 rqbp->entry_count = LPFC_NVMET_RQE_DEF_COUNT;
2d7dbc4c
JS
7233 rqbp->buffer_count = 0;
7234
2d7dbc4c
JS
7235 lpfc_post_rq_buffer(
7236 phba, phba->sli4_hba.nvmet_mrq_hdr[i],
7237 phba->sli4_hba.nvmet_mrq_data[i],
2448e484 7238 phba->cfg_nvmet_mrq_post, i);
2d7dbc4c
JS
7239 }
7240 }
7241
895427bd
JS
7242 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
7243 /* register the allocated scsi sgl pool to the port */
7244 rc = lpfc_sli4_repost_scsi_sgl_list(phba);
7245 if (unlikely(rc)) {
7246 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7247 "0383 Error %d during scsi sgl post "
7248 "operation\n", rc);
7249 /* Some Scsi buffers were moved to abort scsi list */
7250 /* A pci function reset will repost them */
7251 rc = -ENODEV;
7252 goto out_destroy_queue;
7253 }
da0436e9
JS
7254 }
7255
01649561
JS
7256 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
7257 (phba->nvmet_support == 0)) {
7258
7259 /* register the allocated nvme sgl pool to the port */
7260 rc = lpfc_repost_nvme_sgl_list(phba);
7261 if (unlikely(rc)) {
7262 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7263 "6116 Error %d during nvme sgl post "
7264 "operation\n", rc);
7265 /* Some NVME buffers were moved to abort nvme list */
7266 /* A pci function reset will repost them */
7267 rc = -ENODEV;
7268 goto out_destroy_queue;
7269 }
da0436e9
JS
7270 }
7271
7272 /* Post the rpi header region to the device. */
7273 rc = lpfc_sli4_post_all_rpi_hdrs(phba);
7274 if (unlikely(rc)) {
7275 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7276 "0393 Error %d during rpi post operation\n",
7277 rc);
7278 rc = -ENODEV;
895427bd 7279 goto out_destroy_queue;
da0436e9 7280 }
97f2ecf1 7281 lpfc_sli4_node_prep(phba);
da0436e9 7282
895427bd 7283 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
2d7dbc4c 7284 if ((phba->nvmet_support == 0) || (phba->cfg_nvmet_mrq == 1)) {
895427bd
JS
7285 /*
7286 * The FC Port needs to register FCFI (index 0)
7287 */
7288 lpfc_reg_fcfi(phba, mboxq);
7289 mboxq->vport = phba->pport;
7290 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7291 if (rc != MBX_SUCCESS)
7292 goto out_unset_queue;
7293 rc = 0;
7294 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_fcfi,
7295 &mboxq->u.mqe.un.reg_fcfi);
2d7dbc4c
JS
7296 } else {
7297 /* We are a NVME Target mode with MRQ > 1 */
7298
7299 /* First register the FCFI */
7300 lpfc_reg_fcfi_mrq(phba, mboxq, 0);
7301 mboxq->vport = phba->pport;
7302 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7303 if (rc != MBX_SUCCESS)
7304 goto out_unset_queue;
7305 rc = 0;
7306 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_mrq_fcfi,
7307 &mboxq->u.mqe.un.reg_fcfi_mrq);
7308
7309 /* Next register the MRQs */
7310 lpfc_reg_fcfi_mrq(phba, mboxq, 1);
7311 mboxq->vport = phba->pport;
7312 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7313 if (rc != MBX_SUCCESS)
7314 goto out_unset_queue;
7315 rc = 0;
895427bd
JS
7316 }
7317 /* Check if the port is configured to be disabled */
7318 lpfc_sli_read_link_ste(phba);
da0436e9
JS
7319 }
7320
7321 /* Arm the CQs and then EQs on device */
7322 lpfc_sli4_arm_cqeq_intr(phba);
7323
7324 /* Indicate device interrupt mode */
7325 phba->sli4_hba.intr_enable = 1;
7326
7327 /* Allow asynchronous mailbox command to go through */
7328 spin_lock_irq(&phba->hbalock);
7329 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
7330 spin_unlock_irq(&phba->hbalock);
7331
7332 /* Post receive buffers to the device */
7333 lpfc_sli4_rb_setup(phba);
7334
fc2b989b
JS
7335 /* Reset HBA FCF states after HBA reset */
7336 phba->fcf.fcf_flag = 0;
7337 phba->fcf.current_rec.flag = 0;
7338
da0436e9 7339 /* Start the ELS watchdog timer */
8fa38513 7340 mod_timer(&vport->els_tmofunc,
256ec0d0 7341 jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov * 2)));
da0436e9
JS
7342
7343 /* Start heart beat timer */
7344 mod_timer(&phba->hb_tmofunc,
256ec0d0 7345 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
da0436e9
JS
7346 phba->hb_outstanding = 0;
7347 phba->last_completion_time = jiffies;
7348
7349 /* Start error attention (ERATT) polling timer */
256ec0d0 7350 mod_timer(&phba->eratt_poll,
65791f1f 7351 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
da0436e9 7352
75baf696
JS
7353 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
7354 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
7355 rc = pci_enable_pcie_error_reporting(phba->pcidev);
7356 if (!rc) {
7357 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7358 "2829 This device supports "
7359 "Advanced Error Reporting (AER)\n");
7360 spin_lock_irq(&phba->hbalock);
7361 phba->hba_flag |= HBA_AER_ENABLED;
7362 spin_unlock_irq(&phba->hbalock);
7363 } else {
7364 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7365 "2830 This device does not support "
7366 "Advanced Error Reporting (AER)\n");
7367 phba->cfg_aer_support = 0;
7368 }
0a96e975 7369 rc = 0;
75baf696
JS
7370 }
7371
da0436e9
JS
7372 /*
7373 * The port is ready, set the host's link state to LINK_DOWN
7374 * in preparation for link interrupts.
7375 */
da0436e9
JS
7376 spin_lock_irq(&phba->hbalock);
7377 phba->link_state = LPFC_LINK_DOWN;
7378 spin_unlock_irq(&phba->hbalock);
026abb87
JS
7379 if (!(phba->hba_flag & HBA_FCOE_MODE) &&
7380 (phba->hba_flag & LINK_DISABLED)) {
7381 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7382 "3103 Adapter Link is disabled.\n");
7383 lpfc_down_link(phba, mboxq);
7384 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7385 if (rc != MBX_SUCCESS) {
7386 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7387 "3104 Adapter failed to issue "
7388 "DOWN_LINK mbox cmd, rc:x%x\n", rc);
7389 goto out_unset_queue;
7390 }
7391 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
1b51197d
JS
7392 /* don't perform init_link on SLI4 FC port loopback test */
7393 if (!(phba->link_flag & LS_LOOPBACK_MODE)) {
7394 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
7395 if (rc)
7396 goto out_unset_queue;
7397 }
5350d872
JS
7398 }
7399 mempool_free(mboxq, phba->mbox_mem_pool);
7400 return rc;
76a95d75 7401out_unset_queue:
da0436e9 7402 /* Unset all the queues set up in this routine when error out */
5350d872
JS
7403 lpfc_sli4_queue_unset(phba);
7404out_destroy_queue:
6c621a22 7405 lpfc_free_iocb_list(phba);
5350d872 7406 lpfc_sli4_queue_destroy(phba);
da0436e9 7407out_stop_timers:
5350d872 7408 lpfc_stop_hba_timers(phba);
da0436e9
JS
7409out_free_mbox:
7410 mempool_free(mboxq, phba->mbox_mem_pool);
7411 return rc;
7412}
7413
7414/**
7415 * lpfc_mbox_timeout - Timeout call back function for mbox timer
7416 * @ptr: context object - pointer to hba structure.
7417 *
7418 * This is the callback function for mailbox timer. The mailbox
7419 * timer is armed when a new mailbox command is issued and the timer
7420 * is deleted when the mailbox complete. The function is called by
7421 * the kernel timer code when a mailbox does not complete within
7422 * expected time. This function wakes up the worker thread to
7423 * process the mailbox timeout and returns. All the processing is
7424 * done by the worker thread function lpfc_mbox_timeout_handler.
7425 **/
7426void
f22eb4d3 7427lpfc_mbox_timeout(struct timer_list *t)
da0436e9 7428{
f22eb4d3 7429 struct lpfc_hba *phba = from_timer(phba, t, sli.mbox_tmo);
da0436e9
JS
7430 unsigned long iflag;
7431 uint32_t tmo_posted;
7432
7433 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
7434 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
7435 if (!tmo_posted)
7436 phba->pport->work_port_events |= WORKER_MBOX_TMO;
7437 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
7438
7439 if (!tmo_posted)
7440 lpfc_worker_wake_up(phba);
7441 return;
7442}
7443
e8d3c3b1
JS
7444/**
7445 * lpfc_sli4_mbox_completions_pending - check to see if any mailbox completions
7446 * are pending
7447 * @phba: Pointer to HBA context object.
7448 *
7449 * This function checks if any mailbox completions are present on the mailbox
7450 * completion queue.
7451 **/
3bb11fc5 7452static bool
e8d3c3b1
JS
7453lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba)
7454{
7455
7456 uint32_t idx;
7457 struct lpfc_queue *mcq;
7458 struct lpfc_mcqe *mcqe;
7459 bool pending_completions = false;
7365f6fd 7460 uint8_t qe_valid;
e8d3c3b1
JS
7461
7462 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7463 return false;
7464
7465 /* Check for completions on mailbox completion queue */
7466
7467 mcq = phba->sli4_hba.mbx_cq;
7468 idx = mcq->hba_index;
7365f6fd
JS
7469 qe_valid = mcq->qe_valid;
7470 while (bf_get_le32(lpfc_cqe_valid, mcq->qe[idx].cqe) == qe_valid) {
e8d3c3b1
JS
7471 mcqe = (struct lpfc_mcqe *)mcq->qe[idx].cqe;
7472 if (bf_get_le32(lpfc_trailer_completed, mcqe) &&
7473 (!bf_get_le32(lpfc_trailer_async, mcqe))) {
7474 pending_completions = true;
7475 break;
7476 }
7477 idx = (idx + 1) % mcq->entry_count;
7478 if (mcq->hba_index == idx)
7479 break;
7365f6fd
JS
7480
7481 /* if the index wrapped around, toggle the valid bit */
7482 if (phba->sli4_hba.pc_sli4_params.cqav && !idx)
7483 qe_valid = (qe_valid) ? 0 : 1;
e8d3c3b1
JS
7484 }
7485 return pending_completions;
7486
7487}
7488
7489/**
7490 * lpfc_sli4_process_missed_mbox_completions - process mbox completions
7491 * that were missed.
7492 * @phba: Pointer to HBA context object.
7493 *
7494 * For sli4, it is possible to miss an interrupt. As such mbox completions
7495 * maybe missed causing erroneous mailbox timeouts to occur. This function
7496 * checks to see if mbox completions are on the mailbox completion queue
7497 * and will process all the completions associated with the eq for the
7498 * mailbox completion queue.
7499 **/
7500bool
7501lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba)
7502{
b71413dd 7503 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
e8d3c3b1
JS
7504 uint32_t eqidx;
7505 struct lpfc_queue *fpeq = NULL;
7506 struct lpfc_eqe *eqe;
7507 bool mbox_pending;
7508
7509 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7510 return false;
7511
7512 /* Find the eq associated with the mcq */
7513
b71413dd 7514 if (sli4_hba->hba_eq)
895427bd 7515 for (eqidx = 0; eqidx < phba->io_channel_irqs; eqidx++)
b71413dd
JS
7516 if (sli4_hba->hba_eq[eqidx]->queue_id ==
7517 sli4_hba->mbx_cq->assoc_qid) {
7518 fpeq = sli4_hba->hba_eq[eqidx];
e8d3c3b1
JS
7519 break;
7520 }
7521 if (!fpeq)
7522 return false;
7523
7524 /* Turn off interrupts from this EQ */
7525
b71413dd 7526 sli4_hba->sli4_eq_clr_intr(fpeq);
e8d3c3b1
JS
7527
7528 /* Check to see if a mbox completion is pending */
7529
7530 mbox_pending = lpfc_sli4_mbox_completions_pending(phba);
7531
7532 /*
7533 * If a mbox completion is pending, process all the events on EQ
7534 * associated with the mbox completion queue (this could include
7535 * mailbox commands, async events, els commands, receive queue data
7536 * and fcp commands)
7537 */
7538
7539 if (mbox_pending)
7540 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
7541 lpfc_sli4_hba_handle_eqe(phba, eqe, eqidx);
7542 fpeq->EQ_processed++;
7543 }
7544
7545 /* Always clear and re-arm the EQ */
7546
b71413dd 7547 sli4_hba->sli4_eq_release(fpeq, LPFC_QUEUE_REARM);
e8d3c3b1
JS
7548
7549 return mbox_pending;
7550
7551}
da0436e9
JS
7552
7553/**
7554 * lpfc_mbox_timeout_handler - Worker thread function to handle mailbox timeout
7555 * @phba: Pointer to HBA context object.
7556 *
7557 * This function is called from worker thread when a mailbox command times out.
7558 * The caller is not required to hold any locks. This function will reset the
7559 * HBA and recover all the pending commands.
7560 **/
7561void
7562lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
7563{
7564 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
eb016566
JS
7565 MAILBOX_t *mb = NULL;
7566
da0436e9 7567 struct lpfc_sli *psli = &phba->sli;
da0436e9 7568
e8d3c3b1
JS
7569 /* If the mailbox completed, process the completion and return */
7570 if (lpfc_sli4_process_missed_mbox_completions(phba))
7571 return;
7572
eb016566
JS
7573 if (pmbox != NULL)
7574 mb = &pmbox->u.mb;
da0436e9
JS
7575 /* Check the pmbox pointer first. There is a race condition
7576 * between the mbox timeout handler getting executed in the
7577 * worklist and the mailbox actually completing. When this
7578 * race condition occurs, the mbox_active will be NULL.
7579 */
7580 spin_lock_irq(&phba->hbalock);
7581 if (pmbox == NULL) {
7582 lpfc_printf_log(phba, KERN_WARNING,
7583 LOG_MBOX | LOG_SLI,
7584 "0353 Active Mailbox cleared - mailbox timeout "
7585 "exiting\n");
7586 spin_unlock_irq(&phba->hbalock);
7587 return;
7588 }
7589
7590 /* Mbox cmd <mbxCommand> timeout */
7591 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7592 "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
7593 mb->mbxCommand,
7594 phba->pport->port_state,
7595 phba->sli.sli_flag,
7596 phba->sli.mbox_active);
7597 spin_unlock_irq(&phba->hbalock);
7598
7599 /* Setting state unknown so lpfc_sli_abort_iocb_ring
7600 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
25985edc 7601 * it to fail all outstanding SCSI IO.
da0436e9
JS
7602 */
7603 spin_lock_irq(&phba->pport->work_port_lock);
7604 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
7605 spin_unlock_irq(&phba->pport->work_port_lock);
7606 spin_lock_irq(&phba->hbalock);
7607 phba->link_state = LPFC_LINK_UNKNOWN;
f4b4c68f 7608 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
da0436e9
JS
7609 spin_unlock_irq(&phba->hbalock);
7610
db55fba8 7611 lpfc_sli_abort_fcp_rings(phba);
da0436e9
JS
7612
7613 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7614 "0345 Resetting board due to mailbox timeout\n");
7615
7616 /* Reset the HBA device */
7617 lpfc_reset_hba(phba);
7618}
7619
7620/**
7621 * lpfc_sli_issue_mbox_s3 - Issue an SLI3 mailbox command to firmware
7622 * @phba: Pointer to HBA context object.
7623 * @pmbox: Pointer to mailbox object.
7624 * @flag: Flag indicating how the mailbox need to be processed.
7625 *
7626 * This function is called by discovery code and HBA management code
7627 * to submit a mailbox command to firmware with SLI-3 interface spec. This
7628 * function gets the hbalock to protect the data structures.
7629 * The mailbox command can be submitted in polling mode, in which case
7630 * this function will wait in a polling loop for the completion of the
7631 * mailbox.
7632 * If the mailbox is submitted in no_wait mode (not polling) the
7633 * function will submit the command and returns immediately without waiting
7634 * for the mailbox completion. The no_wait is supported only when HBA
7635 * is in SLI2/SLI3 mode - interrupts are enabled.
7636 * The SLI interface allows only one mailbox pending at a time. If the
7637 * mailbox is issued in polling mode and there is already a mailbox
7638 * pending, then the function will return an error. If the mailbox is issued
7639 * in NO_WAIT mode and there is a mailbox pending already, the function
7640 * will return MBX_BUSY after queuing the mailbox into mailbox queue.
7641 * The sli layer owns the mailbox object until the completion of mailbox
7642 * command if this function return MBX_BUSY or MBX_SUCCESS. For all other
7643 * return codes the caller owns the mailbox command after the return of
7644 * the function.
e59058c4 7645 **/
3772a991
JS
7646static int
7647lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
7648 uint32_t flag)
dea3101e 7649{
bf07bdea 7650 MAILBOX_t *mbx;
2e0fef85 7651 struct lpfc_sli *psli = &phba->sli;
dea3101e 7652 uint32_t status, evtctr;
9940b97b 7653 uint32_t ha_copy, hc_copy;
dea3101e 7654 int i;
09372820 7655 unsigned long timeout;
dea3101e 7656 unsigned long drvr_flag = 0;
34b02dcd 7657 uint32_t word0, ldata;
dea3101e 7658 void __iomem *to_slim;
58da1ffb
JS
7659 int processing_queue = 0;
7660
7661 spin_lock_irqsave(&phba->hbalock, drvr_flag);
7662 if (!pmbox) {
8568a4d2 7663 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
58da1ffb 7664 /* processing mbox queue from intr_handler */
3772a991
JS
7665 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
7666 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7667 return MBX_SUCCESS;
7668 }
58da1ffb 7669 processing_queue = 1;
58da1ffb
JS
7670 pmbox = lpfc_mbox_get(phba);
7671 if (!pmbox) {
7672 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7673 return MBX_SUCCESS;
7674 }
7675 }
dea3101e 7676
ed957684 7677 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 7678 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684 7679 if(!pmbox->vport) {
58da1ffb 7680 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
ed957684 7681 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 7682 LOG_MBOX | LOG_VPORT,
e8b62011 7683 "1806 Mbox x%x failed. No vport\n",
3772a991 7684 pmbox->u.mb.mbxCommand);
ed957684 7685 dump_stack();
58da1ffb 7686 goto out_not_finished;
ed957684
JS
7687 }
7688 }
7689
8d63f375 7690 /* If the PCI channel is in offline state, do not post mbox. */
58da1ffb
JS
7691 if (unlikely(pci_channel_offline(phba->pcidev))) {
7692 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7693 goto out_not_finished;
7694 }
8d63f375 7695
a257bf90
JS
7696 /* If HBA has a deferred error attention, fail the iocb. */
7697 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
7698 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7699 goto out_not_finished;
7700 }
7701
dea3101e 7702 psli = &phba->sli;
92d7f7b0 7703
bf07bdea 7704 mbx = &pmbox->u.mb;
dea3101e
JB
7705 status = MBX_SUCCESS;
7706
2e0fef85
JS
7707 if (phba->link_state == LPFC_HBA_ERROR) {
7708 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW
7709
7710 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
7711 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7712 "(%d):0311 Mailbox command x%x cannot "
7713 "issue Data: x%x x%x\n",
7714 pmbox->vport ? pmbox->vport->vpi : 0,
7715 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
58da1ffb 7716 goto out_not_finished;
41415862
JW
7717 }
7718
bf07bdea 7719 if (mbx->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT) {
9940b97b
JS
7720 if (lpfc_readl(phba->HCregaddr, &hc_copy) ||
7721 !(hc_copy & HC_MBINT_ENA)) {
7722 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7723 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
3772a991
JS
7724 "(%d):2528 Mailbox command x%x cannot "
7725 "issue Data: x%x x%x\n",
7726 pmbox->vport ? pmbox->vport->vpi : 0,
7727 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
9940b97b
JS
7728 goto out_not_finished;
7729 }
9290831f
JS
7730 }
7731
dea3101e
JB
7732 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
7733 /* Polling for a mbox command when another one is already active
7734 * is not allowed in SLI. Also, the driver must have established
7735 * SLI2 mode to queue and process multiple mbox commands.
7736 */
7737
7738 if (flag & MBX_POLL) {
2e0fef85 7739 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
7740
7741 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
7742 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7743 "(%d):2529 Mailbox command x%x "
7744 "cannot issue Data: x%x x%x\n",
7745 pmbox->vport ? pmbox->vport->vpi : 0,
7746 pmbox->u.mb.mbxCommand,
7747 psli->sli_flag, flag);
58da1ffb 7748 goto out_not_finished;
dea3101e
JB
7749 }
7750
3772a991 7751 if (!(psli->sli_flag & LPFC_SLI_ACTIVE)) {
2e0fef85 7752 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 7753 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
7754 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7755 "(%d):2530 Mailbox command x%x "
7756 "cannot issue Data: x%x x%x\n",
7757 pmbox->vport ? pmbox->vport->vpi : 0,
7758 pmbox->u.mb.mbxCommand,
7759 psli->sli_flag, flag);
58da1ffb 7760 goto out_not_finished;
dea3101e
JB
7761 }
7762
dea3101e
JB
7763 /* Another mailbox command is still being processed, queue this
7764 * command to be processed later.
7765 */
7766 lpfc_mbox_put(phba, pmbox);
7767
7768 /* Mbox cmd issue - BUSY */
ed957684 7769 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 7770 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 7771 "x%x x%x x%x x%x\n",
92d7f7b0 7772 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
e92974f6
JS
7773 mbx->mbxCommand,
7774 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 7775 psli->sli_flag, flag);
dea3101e
JB
7776
7777 psli->slistat.mbox_busy++;
2e0fef85 7778 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 7779
858c9f6c
JS
7780 if (pmbox->vport) {
7781 lpfc_debugfs_disc_trc(pmbox->vport,
7782 LPFC_DISC_TRC_MBOX_VPORT,
7783 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
7784 (uint32_t)mbx->mbxCommand,
7785 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
7786 }
7787 else {
7788 lpfc_debugfs_disc_trc(phba->pport,
7789 LPFC_DISC_TRC_MBOX,
7790 "MBOX Bsy: cmd:x%x mb:x%x x%x",
bf07bdea
RD
7791 (uint32_t)mbx->mbxCommand,
7792 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
7793 }
7794
2e0fef85 7795 return MBX_BUSY;
dea3101e
JB
7796 }
7797
dea3101e
JB
7798 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
7799
7800 /* If we are not polling, we MUST be in SLI2 mode */
7801 if (flag != MBX_POLL) {
3772a991 7802 if (!(psli->sli_flag & LPFC_SLI_ACTIVE) &&
bf07bdea 7803 (mbx->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 7804 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 7805 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 7806 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
7807 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7808 "(%d):2531 Mailbox command x%x "
7809 "cannot issue Data: x%x x%x\n",
7810 pmbox->vport ? pmbox->vport->vpi : 0,
7811 pmbox->u.mb.mbxCommand,
7812 psli->sli_flag, flag);
58da1ffb 7813 goto out_not_finished;
dea3101e
JB
7814 }
7815 /* timeout active mbox command */
256ec0d0
JS
7816 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
7817 1000);
7818 mod_timer(&psli->mbox_tmo, jiffies + timeout);
dea3101e
JB
7819 }
7820
7821 /* Mailbox cmd <cmd> issue */
ed957684 7822 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 7823 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 7824 "x%x\n",
e8b62011 7825 pmbox->vport ? pmbox->vport->vpi : 0,
e92974f6
JS
7826 mbx->mbxCommand,
7827 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 7828 psli->sli_flag, flag);
dea3101e 7829
bf07bdea 7830 if (mbx->mbxCommand != MBX_HEARTBEAT) {
858c9f6c
JS
7831 if (pmbox->vport) {
7832 lpfc_debugfs_disc_trc(pmbox->vport,
7833 LPFC_DISC_TRC_MBOX_VPORT,
7834 "MBOX Send vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
7835 (uint32_t)mbx->mbxCommand,
7836 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
7837 }
7838 else {
7839 lpfc_debugfs_disc_trc(phba->pport,
7840 LPFC_DISC_TRC_MBOX,
7841 "MBOX Send: cmd:x%x mb:x%x x%x",
bf07bdea
RD
7842 (uint32_t)mbx->mbxCommand,
7843 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
7844 }
7845 }
7846
dea3101e
JB
7847 psli->slistat.mbox_cmd++;
7848 evtctr = psli->slistat.mbox_event;
7849
7850 /* next set own bit for the adapter and copy over command word */
bf07bdea 7851 mbx->mbxOwner = OWN_CHIP;
dea3101e 7852
3772a991 7853 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
7a470277
JS
7854 /* Populate mbox extension offset word. */
7855 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len) {
bf07bdea 7856 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
7857 = (uint8_t *)phba->mbox_ext
7858 - (uint8_t *)phba->mbox;
7859 }
7860
7861 /* Copy the mailbox extension data */
7862 if (pmbox->in_ext_byte_len && pmbox->context2) {
7863 lpfc_sli_pcimem_bcopy(pmbox->context2,
7864 (uint8_t *)phba->mbox_ext,
7865 pmbox->in_ext_byte_len);
7866 }
7867 /* Copy command data to host SLIM area */
bf07bdea 7868 lpfc_sli_pcimem_bcopy(mbx, phba->mbox, MAILBOX_CMD_SIZE);
dea3101e 7869 } else {
7a470277
JS
7870 /* Populate mbox extension offset word. */
7871 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len)
bf07bdea 7872 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
7873 = MAILBOX_HBA_EXT_OFFSET;
7874
7875 /* Copy the mailbox extension data */
895427bd 7876 if (pmbox->in_ext_byte_len && pmbox->context2)
7a470277
JS
7877 lpfc_memcpy_to_slim(phba->MBslimaddr +
7878 MAILBOX_HBA_EXT_OFFSET,
7879 pmbox->context2, pmbox->in_ext_byte_len);
7880
895427bd 7881 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 7882 /* copy command data into host mbox for cmpl */
895427bd
JS
7883 lpfc_sli_pcimem_bcopy(mbx, phba->mbox,
7884 MAILBOX_CMD_SIZE);
dea3101e
JB
7885
7886 /* First copy mbox command data to HBA SLIM, skip past first
7887 word */
7888 to_slim = phba->MBslimaddr + sizeof (uint32_t);
bf07bdea 7889 lpfc_memcpy_to_slim(to_slim, &mbx->un.varWords[0],
dea3101e
JB
7890 MAILBOX_CMD_SIZE - sizeof (uint32_t));
7891
7892 /* Next copy over first word, with mbxOwner set */
bf07bdea 7893 ldata = *((uint32_t *)mbx);
dea3101e
JB
7894 to_slim = phba->MBslimaddr;
7895 writel(ldata, to_slim);
7896 readl(to_slim); /* flush */
7897
895427bd 7898 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 7899 /* switch over to host mailbox */
3772a991 7900 psli->sli_flag |= LPFC_SLI_ACTIVE;
dea3101e
JB
7901 }
7902
7903 wmb();
dea3101e
JB
7904
7905 switch (flag) {
7906 case MBX_NOWAIT:
09372820 7907 /* Set up reference to mailbox command */
dea3101e 7908 psli->mbox_active = pmbox;
09372820
JS
7909 /* Interrupt board to do it */
7910 writel(CA_MBATT, phba->CAregaddr);
7911 readl(phba->CAregaddr); /* flush */
7912 /* Don't wait for it to finish, just return */
dea3101e
JB
7913 break;
7914
7915 case MBX_POLL:
09372820 7916 /* Set up null reference to mailbox command */
dea3101e 7917 psli->mbox_active = NULL;
09372820
JS
7918 /* Interrupt board to do it */
7919 writel(CA_MBATT, phba->CAregaddr);
7920 readl(phba->CAregaddr); /* flush */
7921
3772a991 7922 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 7923 /* First read mbox status word */
34b02dcd 7924 word0 = *((uint32_t *)phba->mbox);
dea3101e
JB
7925 word0 = le32_to_cpu(word0);
7926 } else {
7927 /* First read mbox status word */
9940b97b
JS
7928 if (lpfc_readl(phba->MBslimaddr, &word0)) {
7929 spin_unlock_irqrestore(&phba->hbalock,
7930 drvr_flag);
7931 goto out_not_finished;
7932 }
dea3101e
JB
7933 }
7934
7935 /* Read the HBA Host Attention Register */
9940b97b
JS
7936 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
7937 spin_unlock_irqrestore(&phba->hbalock,
7938 drvr_flag);
7939 goto out_not_finished;
7940 }
a183a15f
JS
7941 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
7942 1000) + jiffies;
09372820 7943 i = 0;
dea3101e 7944 /* Wait for command to complete */
41415862
JW
7945 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
7946 (!(ha_copy & HA_MBATT) &&
2e0fef85 7947 (phba->link_state > LPFC_WARM_START))) {
09372820 7948 if (time_after(jiffies, timeout)) {
dea3101e 7949 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 7950 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 7951 drvr_flag);
58da1ffb 7952 goto out_not_finished;
dea3101e
JB
7953 }
7954
7955 /* Check if we took a mbox interrupt while we were
7956 polling */
7957 if (((word0 & OWN_CHIP) != OWN_CHIP)
7958 && (evtctr != psli->slistat.mbox_event))
7959 break;
7960
09372820
JS
7961 if (i++ > 10) {
7962 spin_unlock_irqrestore(&phba->hbalock,
7963 drvr_flag);
7964 msleep(1);
7965 spin_lock_irqsave(&phba->hbalock, drvr_flag);
7966 }
dea3101e 7967
3772a991 7968 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 7969 /* First copy command data */
34b02dcd 7970 word0 = *((uint32_t *)phba->mbox);
dea3101e 7971 word0 = le32_to_cpu(word0);
bf07bdea 7972 if (mbx->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 7973 MAILBOX_t *slimmb;
34b02dcd 7974 uint32_t slimword0;
dea3101e
JB
7975 /* Check real SLIM for any errors */
7976 slimword0 = readl(phba->MBslimaddr);
7977 slimmb = (MAILBOX_t *) & slimword0;
7978 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
7979 && slimmb->mbxStatus) {
7980 psli->sli_flag &=
3772a991 7981 ~LPFC_SLI_ACTIVE;
dea3101e
JB
7982 word0 = slimword0;
7983 }
7984 }
7985 } else {
7986 /* First copy command data */
7987 word0 = readl(phba->MBslimaddr);
7988 }
7989 /* Read the HBA Host Attention Register */
9940b97b
JS
7990 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
7991 spin_unlock_irqrestore(&phba->hbalock,
7992 drvr_flag);
7993 goto out_not_finished;
7994 }
dea3101e
JB
7995 }
7996
3772a991 7997 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 7998 /* copy results back to user */
2ea259ee
JS
7999 lpfc_sli_pcimem_bcopy(phba->mbox, mbx,
8000 MAILBOX_CMD_SIZE);
7a470277
JS
8001 /* Copy the mailbox extension data */
8002 if (pmbox->out_ext_byte_len && pmbox->context2) {
8003 lpfc_sli_pcimem_bcopy(phba->mbox_ext,
8004 pmbox->context2,
8005 pmbox->out_ext_byte_len);
8006 }
dea3101e
JB
8007 } else {
8008 /* First copy command data */
bf07bdea 8009 lpfc_memcpy_from_slim(mbx, phba->MBslimaddr,
2ea259ee 8010 MAILBOX_CMD_SIZE);
7a470277
JS
8011 /* Copy the mailbox extension data */
8012 if (pmbox->out_ext_byte_len && pmbox->context2) {
8013 lpfc_memcpy_from_slim(pmbox->context2,
8014 phba->MBslimaddr +
8015 MAILBOX_HBA_EXT_OFFSET,
8016 pmbox->out_ext_byte_len);
dea3101e
JB
8017 }
8018 }
8019
8020 writel(HA_MBATT, phba->HAregaddr);
8021 readl(phba->HAregaddr); /* flush */
8022
8023 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
bf07bdea 8024 status = mbx->mbxStatus;
dea3101e
JB
8025 }
8026
2e0fef85
JS
8027 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8028 return status;
58da1ffb
JS
8029
8030out_not_finished:
8031 if (processing_queue) {
da0436e9 8032 pmbox->u.mb.mbxStatus = MBX_NOT_FINISHED;
58da1ffb
JS
8033 lpfc_mbox_cmpl_put(phba, pmbox);
8034 }
8035 return MBX_NOT_FINISHED;
dea3101e
JB
8036}
8037
f1126688
JS
8038/**
8039 * lpfc_sli4_async_mbox_block - Block posting SLI4 asynchronous mailbox command
8040 * @phba: Pointer to HBA context object.
8041 *
8042 * The function blocks the posting of SLI4 asynchronous mailbox commands from
8043 * the driver internal pending mailbox queue. It will then try to wait out the
8044 * possible outstanding mailbox command before return.
8045 *
8046 * Returns:
8047 * 0 - the outstanding mailbox command completed; otherwise, the wait for
8048 * the outstanding mailbox command timed out.
8049 **/
8050static int
8051lpfc_sli4_async_mbox_block(struct lpfc_hba *phba)
8052{
8053 struct lpfc_sli *psli = &phba->sli;
f1126688 8054 int rc = 0;
a183a15f 8055 unsigned long timeout = 0;
f1126688
JS
8056
8057 /* Mark the asynchronous mailbox command posting as blocked */
8058 spin_lock_irq(&phba->hbalock);
8059 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
f1126688
JS
8060 /* Determine how long we might wait for the active mailbox
8061 * command to be gracefully completed by firmware.
8062 */
a183a15f
JS
8063 if (phba->sli.mbox_active)
8064 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
8065 phba->sli.mbox_active) *
8066 1000) + jiffies;
8067 spin_unlock_irq(&phba->hbalock);
8068
e8d3c3b1
JS
8069 /* Make sure the mailbox is really active */
8070 if (timeout)
8071 lpfc_sli4_process_missed_mbox_completions(phba);
8072
f1126688
JS
8073 /* Wait for the outstnading mailbox command to complete */
8074 while (phba->sli.mbox_active) {
8075 /* Check active mailbox complete status every 2ms */
8076 msleep(2);
8077 if (time_after(jiffies, timeout)) {
8078 /* Timeout, marked the outstanding cmd not complete */
8079 rc = 1;
8080 break;
8081 }
8082 }
8083
8084 /* Can not cleanly block async mailbox command, fails it */
8085 if (rc) {
8086 spin_lock_irq(&phba->hbalock);
8087 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8088 spin_unlock_irq(&phba->hbalock);
8089 }
8090 return rc;
8091}
8092
8093/**
8094 * lpfc_sli4_async_mbox_unblock - Block posting SLI4 async mailbox command
8095 * @phba: Pointer to HBA context object.
8096 *
8097 * The function unblocks and resume posting of SLI4 asynchronous mailbox
8098 * commands from the driver internal pending mailbox queue. It makes sure
8099 * that there is no outstanding mailbox command before resuming posting
8100 * asynchronous mailbox commands. If, for any reason, there is outstanding
8101 * mailbox command, it will try to wait it out before resuming asynchronous
8102 * mailbox command posting.
8103 **/
8104static void
8105lpfc_sli4_async_mbox_unblock(struct lpfc_hba *phba)
8106{
8107 struct lpfc_sli *psli = &phba->sli;
8108
8109 spin_lock_irq(&phba->hbalock);
8110 if (!(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8111 /* Asynchronous mailbox posting is not blocked, do nothing */
8112 spin_unlock_irq(&phba->hbalock);
8113 return;
8114 }
8115
8116 /* Outstanding synchronous mailbox command is guaranteed to be done,
8117 * successful or timeout, after timing-out the outstanding mailbox
8118 * command shall always be removed, so just unblock posting async
8119 * mailbox command and resume
8120 */
8121 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8122 spin_unlock_irq(&phba->hbalock);
8123
8124 /* wake up worker thread to post asynchronlous mailbox command */
8125 lpfc_worker_wake_up(phba);
8126}
8127
2d843edc
JS
8128/**
8129 * lpfc_sli4_wait_bmbx_ready - Wait for bootstrap mailbox register ready
8130 * @phba: Pointer to HBA context object.
8131 * @mboxq: Pointer to mailbox object.
8132 *
8133 * The function waits for the bootstrap mailbox register ready bit from
8134 * port for twice the regular mailbox command timeout value.
8135 *
8136 * 0 - no timeout on waiting for bootstrap mailbox register ready.
8137 * MBXERR_ERROR - wait for bootstrap mailbox register timed out.
8138 **/
8139static int
8140lpfc_sli4_wait_bmbx_ready(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8141{
8142 uint32_t db_ready;
8143 unsigned long timeout;
8144 struct lpfc_register bmbx_reg;
8145
8146 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, mboxq)
8147 * 1000) + jiffies;
8148
8149 do {
8150 bmbx_reg.word0 = readl(phba->sli4_hba.BMBXregaddr);
8151 db_ready = bf_get(lpfc_bmbx_rdy, &bmbx_reg);
8152 if (!db_ready)
8153 msleep(2);
8154
8155 if (time_after(jiffies, timeout))
8156 return MBXERR_ERROR;
8157 } while (!db_ready);
8158
8159 return 0;
8160}
8161
da0436e9
JS
8162/**
8163 * lpfc_sli4_post_sync_mbox - Post an SLI4 mailbox to the bootstrap mailbox
8164 * @phba: Pointer to HBA context object.
8165 * @mboxq: Pointer to mailbox object.
8166 *
8167 * The function posts a mailbox to the port. The mailbox is expected
8168 * to be comletely filled in and ready for the port to operate on it.
8169 * This routine executes a synchronous completion operation on the
8170 * mailbox by polling for its completion.
8171 *
8172 * The caller must not be holding any locks when calling this routine.
8173 *
8174 * Returns:
8175 * MBX_SUCCESS - mailbox posted successfully
8176 * Any of the MBX error values.
8177 **/
8178static int
8179lpfc_sli4_post_sync_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8180{
8181 int rc = MBX_SUCCESS;
8182 unsigned long iflag;
da0436e9
JS
8183 uint32_t mcqe_status;
8184 uint32_t mbx_cmnd;
da0436e9
JS
8185 struct lpfc_sli *psli = &phba->sli;
8186 struct lpfc_mqe *mb = &mboxq->u.mqe;
8187 struct lpfc_bmbx_create *mbox_rgn;
8188 struct dma_address *dma_address;
da0436e9
JS
8189
8190 /*
8191 * Only one mailbox can be active to the bootstrap mailbox region
8192 * at a time and there is no queueing provided.
8193 */
8194 spin_lock_irqsave(&phba->hbalock, iflag);
8195 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8196 spin_unlock_irqrestore(&phba->hbalock, iflag);
8197 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8198 "(%d):2532 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8199 "cannot issue Data: x%x x%x\n",
8200 mboxq->vport ? mboxq->vport->vpi : 0,
8201 mboxq->u.mb.mbxCommand,
a183a15f
JS
8202 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8203 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8204 psli->sli_flag, MBX_POLL);
8205 return MBXERR_ERROR;
8206 }
8207 /* The server grabs the token and owns it until release */
8208 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8209 phba->sli.mbox_active = mboxq;
8210 spin_unlock_irqrestore(&phba->hbalock, iflag);
8211
2d843edc
JS
8212 /* wait for bootstrap mbox register for readyness */
8213 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8214 if (rc)
8215 goto exit;
8216
da0436e9
JS
8217 /*
8218 * Initialize the bootstrap memory region to avoid stale data areas
8219 * in the mailbox post. Then copy the caller's mailbox contents to
8220 * the bmbx mailbox region.
8221 */
8222 mbx_cmnd = bf_get(lpfc_mqe_command, mb);
8223 memset(phba->sli4_hba.bmbx.avirt, 0, sizeof(struct lpfc_bmbx_create));
48f8fdb4
JS
8224 lpfc_sli4_pcimem_bcopy(mb, phba->sli4_hba.bmbx.avirt,
8225 sizeof(struct lpfc_mqe));
da0436e9
JS
8226
8227 /* Post the high mailbox dma address to the port and wait for ready. */
8228 dma_address = &phba->sli4_hba.bmbx.dma_address;
8229 writel(dma_address->addr_hi, phba->sli4_hba.BMBXregaddr);
8230
2d843edc
JS
8231 /* wait for bootstrap mbox register for hi-address write done */
8232 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8233 if (rc)
8234 goto exit;
da0436e9
JS
8235
8236 /* Post the low mailbox dma address to the port. */
8237 writel(dma_address->addr_lo, phba->sli4_hba.BMBXregaddr);
da0436e9 8238
2d843edc
JS
8239 /* wait for bootstrap mbox register for low address write done */
8240 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8241 if (rc)
8242 goto exit;
da0436e9
JS
8243
8244 /*
8245 * Read the CQ to ensure the mailbox has completed.
8246 * If so, update the mailbox status so that the upper layers
8247 * can complete the request normally.
8248 */
48f8fdb4
JS
8249 lpfc_sli4_pcimem_bcopy(phba->sli4_hba.bmbx.avirt, mb,
8250 sizeof(struct lpfc_mqe));
da0436e9 8251 mbox_rgn = (struct lpfc_bmbx_create *) phba->sli4_hba.bmbx.avirt;
48f8fdb4
JS
8252 lpfc_sli4_pcimem_bcopy(&mbox_rgn->mcqe, &mboxq->mcqe,
8253 sizeof(struct lpfc_mcqe));
da0436e9 8254 mcqe_status = bf_get(lpfc_mcqe_status, &mbox_rgn->mcqe);
0558056c
JS
8255 /*
8256 * When the CQE status indicates a failure and the mailbox status
8257 * indicates success then copy the CQE status into the mailbox status
8258 * (and prefix it with x4000).
8259 */
da0436e9 8260 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
0558056c
JS
8261 if (bf_get(lpfc_mqe_status, mb) == MBX_SUCCESS)
8262 bf_set(lpfc_mqe_status, mb,
8263 (LPFC_MBX_ERROR_RANGE | mcqe_status));
da0436e9 8264 rc = MBXERR_ERROR;
d7c47992
JS
8265 } else
8266 lpfc_sli4_swap_str(phba, mboxq);
da0436e9
JS
8267
8268 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8269 "(%d):0356 Mailbox cmd x%x (x%x/x%x) Status x%x "
da0436e9
JS
8270 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x"
8271 " x%x x%x CQ: x%x x%x x%x x%x\n",
a183a15f
JS
8272 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
8273 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8274 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8275 bf_get(lpfc_mqe_status, mb),
8276 mb->un.mb_words[0], mb->un.mb_words[1],
8277 mb->un.mb_words[2], mb->un.mb_words[3],
8278 mb->un.mb_words[4], mb->un.mb_words[5],
8279 mb->un.mb_words[6], mb->un.mb_words[7],
8280 mb->un.mb_words[8], mb->un.mb_words[9],
8281 mb->un.mb_words[10], mb->un.mb_words[11],
8282 mb->un.mb_words[12], mboxq->mcqe.word0,
8283 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
8284 mboxq->mcqe.trailer);
8285exit:
8286 /* We are holding the token, no needed for lock when release */
8287 spin_lock_irqsave(&phba->hbalock, iflag);
8288 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8289 phba->sli.mbox_active = NULL;
8290 spin_unlock_irqrestore(&phba->hbalock, iflag);
8291 return rc;
8292}
8293
8294/**
8295 * lpfc_sli_issue_mbox_s4 - Issue an SLI4 mailbox command to firmware
8296 * @phba: Pointer to HBA context object.
8297 * @pmbox: Pointer to mailbox object.
8298 * @flag: Flag indicating how the mailbox need to be processed.
8299 *
8300 * This function is called by discovery code and HBA management code to submit
8301 * a mailbox command to firmware with SLI-4 interface spec.
8302 *
8303 * Return codes the caller owns the mailbox command after the return of the
8304 * function.
8305 **/
8306static int
8307lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
8308 uint32_t flag)
8309{
8310 struct lpfc_sli *psli = &phba->sli;
8311 unsigned long iflags;
8312 int rc;
8313
b76f2dc9
JS
8314 /* dump from issue mailbox command if setup */
8315 lpfc_idiag_mbxacc_dump_issue_mbox(phba, &mboxq->u.mb);
8316
8fa38513
JS
8317 rc = lpfc_mbox_dev_check(phba);
8318 if (unlikely(rc)) {
8319 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8320 "(%d):2544 Mailbox command x%x (x%x/x%x) "
8fa38513
JS
8321 "cannot issue Data: x%x x%x\n",
8322 mboxq->vport ? mboxq->vport->vpi : 0,
8323 mboxq->u.mb.mbxCommand,
a183a15f
JS
8324 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8325 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
8fa38513
JS
8326 psli->sli_flag, flag);
8327 goto out_not_finished;
8328 }
8329
da0436e9
JS
8330 /* Detect polling mode and jump to a handler */
8331 if (!phba->sli4_hba.intr_enable) {
8332 if (flag == MBX_POLL)
8333 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8334 else
8335 rc = -EIO;
8336 if (rc != MBX_SUCCESS)
0558056c 8337 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
da0436e9 8338 "(%d):2541 Mailbox command x%x "
cc459f19
JS
8339 "(x%x/x%x) failure: "
8340 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8341 "Data: x%x x%x\n,",
da0436e9
JS
8342 mboxq->vport ? mboxq->vport->vpi : 0,
8343 mboxq->u.mb.mbxCommand,
a183a15f
JS
8344 lpfc_sli_config_mbox_subsys_get(phba,
8345 mboxq),
8346 lpfc_sli_config_mbox_opcode_get(phba,
8347 mboxq),
cc459f19
JS
8348 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8349 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8350 bf_get(lpfc_mcqe_ext_status,
8351 &mboxq->mcqe),
da0436e9
JS
8352 psli->sli_flag, flag);
8353 return rc;
8354 } else if (flag == MBX_POLL) {
f1126688
JS
8355 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
8356 "(%d):2542 Try to issue mailbox command "
7365f6fd 8357 "x%x (x%x/x%x) synchronously ahead of async "
f1126688 8358 "mailbox command queue: x%x x%x\n",
da0436e9
JS
8359 mboxq->vport ? mboxq->vport->vpi : 0,
8360 mboxq->u.mb.mbxCommand,
a183a15f
JS
8361 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8362 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9 8363 psli->sli_flag, flag);
f1126688
JS
8364 /* Try to block the asynchronous mailbox posting */
8365 rc = lpfc_sli4_async_mbox_block(phba);
8366 if (!rc) {
8367 /* Successfully blocked, now issue sync mbox cmd */
8368 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8369 if (rc != MBX_SUCCESS)
cc459f19 8370 lpfc_printf_log(phba, KERN_WARNING,
a183a15f 8371 LOG_MBOX | LOG_SLI,
cc459f19
JS
8372 "(%d):2597 Sync Mailbox command "
8373 "x%x (x%x/x%x) failure: "
8374 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8375 "Data: x%x x%x\n,",
8376 mboxq->vport ? mboxq->vport->vpi : 0,
a183a15f
JS
8377 mboxq->u.mb.mbxCommand,
8378 lpfc_sli_config_mbox_subsys_get(phba,
8379 mboxq),
8380 lpfc_sli_config_mbox_opcode_get(phba,
8381 mboxq),
cc459f19
JS
8382 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8383 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8384 bf_get(lpfc_mcqe_ext_status,
8385 &mboxq->mcqe),
a183a15f 8386 psli->sli_flag, flag);
f1126688
JS
8387 /* Unblock the async mailbox posting afterward */
8388 lpfc_sli4_async_mbox_unblock(phba);
8389 }
8390 return rc;
da0436e9
JS
8391 }
8392
8393 /* Now, interrupt mode asynchrous mailbox command */
8394 rc = lpfc_mbox_cmd_check(phba, mboxq);
8395 if (rc) {
8396 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8397 "(%d):2543 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8398 "cannot issue Data: x%x x%x\n",
8399 mboxq->vport ? mboxq->vport->vpi : 0,
8400 mboxq->u.mb.mbxCommand,
a183a15f
JS
8401 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8402 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8403 psli->sli_flag, flag);
8404 goto out_not_finished;
8405 }
da0436e9
JS
8406
8407 /* Put the mailbox command to the driver internal FIFO */
8408 psli->slistat.mbox_busy++;
8409 spin_lock_irqsave(&phba->hbalock, iflags);
8410 lpfc_mbox_put(phba, mboxq);
8411 spin_unlock_irqrestore(&phba->hbalock, iflags);
8412 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
8413 "(%d):0354 Mbox cmd issue - Enqueue Data: "
a183a15f 8414 "x%x (x%x/x%x) x%x x%x x%x\n",
da0436e9
JS
8415 mboxq->vport ? mboxq->vport->vpi : 0xffffff,
8416 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
a183a15f
JS
8417 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8418 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8419 phba->pport->port_state,
8420 psli->sli_flag, MBX_NOWAIT);
8421 /* Wake up worker thread to transport mailbox command from head */
8422 lpfc_worker_wake_up(phba);
8423
8424 return MBX_BUSY;
8425
8426out_not_finished:
8427 return MBX_NOT_FINISHED;
8428}
8429
8430/**
8431 * lpfc_sli4_post_async_mbox - Post an SLI4 mailbox command to device
8432 * @phba: Pointer to HBA context object.
8433 *
8434 * This function is called by worker thread to send a mailbox command to
8435 * SLI4 HBA firmware.
8436 *
8437 **/
8438int
8439lpfc_sli4_post_async_mbox(struct lpfc_hba *phba)
8440{
8441 struct lpfc_sli *psli = &phba->sli;
8442 LPFC_MBOXQ_t *mboxq;
8443 int rc = MBX_SUCCESS;
8444 unsigned long iflags;
8445 struct lpfc_mqe *mqe;
8446 uint32_t mbx_cmnd;
8447
8448 /* Check interrupt mode before post async mailbox command */
8449 if (unlikely(!phba->sli4_hba.intr_enable))
8450 return MBX_NOT_FINISHED;
8451
8452 /* Check for mailbox command service token */
8453 spin_lock_irqsave(&phba->hbalock, iflags);
8454 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8455 spin_unlock_irqrestore(&phba->hbalock, iflags);
8456 return MBX_NOT_FINISHED;
8457 }
8458 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8459 spin_unlock_irqrestore(&phba->hbalock, iflags);
8460 return MBX_NOT_FINISHED;
8461 }
8462 if (unlikely(phba->sli.mbox_active)) {
8463 spin_unlock_irqrestore(&phba->hbalock, iflags);
8464 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8465 "0384 There is pending active mailbox cmd\n");
8466 return MBX_NOT_FINISHED;
8467 }
8468 /* Take the mailbox command service token */
8469 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8470
8471 /* Get the next mailbox command from head of queue */
8472 mboxq = lpfc_mbox_get(phba);
8473
8474 /* If no more mailbox command waiting for post, we're done */
8475 if (!mboxq) {
8476 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8477 spin_unlock_irqrestore(&phba->hbalock, iflags);
8478 return MBX_SUCCESS;
8479 }
8480 phba->sli.mbox_active = mboxq;
8481 spin_unlock_irqrestore(&phba->hbalock, iflags);
8482
8483 /* Check device readiness for posting mailbox command */
8484 rc = lpfc_mbox_dev_check(phba);
8485 if (unlikely(rc))
8486 /* Driver clean routine will clean up pending mailbox */
8487 goto out_not_finished;
8488
8489 /* Prepare the mbox command to be posted */
8490 mqe = &mboxq->u.mqe;
8491 mbx_cmnd = bf_get(lpfc_mqe_command, mqe);
8492
8493 /* Start timer for the mbox_tmo and log some mailbox post messages */
8494 mod_timer(&psli->mbox_tmo, (jiffies +
256ec0d0 8495 msecs_to_jiffies(1000 * lpfc_mbox_tmo_val(phba, mboxq))));
da0436e9
JS
8496
8497 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8498 "(%d):0355 Mailbox cmd x%x (x%x/x%x) issue Data: "
da0436e9
JS
8499 "x%x x%x\n",
8500 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
a183a15f
JS
8501 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8502 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8503 phba->pport->port_state, psli->sli_flag);
8504
8505 if (mbx_cmnd != MBX_HEARTBEAT) {
8506 if (mboxq->vport) {
8507 lpfc_debugfs_disc_trc(mboxq->vport,
8508 LPFC_DISC_TRC_MBOX_VPORT,
8509 "MBOX Send vport: cmd:x%x mb:x%x x%x",
8510 mbx_cmnd, mqe->un.mb_words[0],
8511 mqe->un.mb_words[1]);
8512 } else {
8513 lpfc_debugfs_disc_trc(phba->pport,
8514 LPFC_DISC_TRC_MBOX,
8515 "MBOX Send: cmd:x%x mb:x%x x%x",
8516 mbx_cmnd, mqe->un.mb_words[0],
8517 mqe->un.mb_words[1]);
8518 }
8519 }
8520 psli->slistat.mbox_cmd++;
8521
8522 /* Post the mailbox command to the port */
8523 rc = lpfc_sli4_mq_put(phba->sli4_hba.mbx_wq, mqe);
8524 if (rc != MBX_SUCCESS) {
8525 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8526 "(%d):2533 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8527 "cannot issue Data: x%x x%x\n",
8528 mboxq->vport ? mboxq->vport->vpi : 0,
8529 mboxq->u.mb.mbxCommand,
a183a15f
JS
8530 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8531 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8532 psli->sli_flag, MBX_NOWAIT);
8533 goto out_not_finished;
8534 }
8535
8536 return rc;
8537
8538out_not_finished:
8539 spin_lock_irqsave(&phba->hbalock, iflags);
d7069f09
JS
8540 if (phba->sli.mbox_active) {
8541 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
8542 __lpfc_mbox_cmpl_put(phba, mboxq);
8543 /* Release the token */
8544 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8545 phba->sli.mbox_active = NULL;
8546 }
da0436e9
JS
8547 spin_unlock_irqrestore(&phba->hbalock, iflags);
8548
8549 return MBX_NOT_FINISHED;
8550}
8551
8552/**
8553 * lpfc_sli_issue_mbox - Wrapper func for issuing mailbox command
8554 * @phba: Pointer to HBA context object.
8555 * @pmbox: Pointer to mailbox object.
8556 * @flag: Flag indicating how the mailbox need to be processed.
8557 *
8558 * This routine wraps the actual SLI3 or SLI4 mailbox issuing routine from
8559 * the API jump table function pointer from the lpfc_hba struct.
8560 *
8561 * Return codes the caller owns the mailbox command after the return of the
8562 * function.
8563 **/
8564int
8565lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
8566{
8567 return phba->lpfc_sli_issue_mbox(phba, pmbox, flag);
8568}
8569
8570/**
25985edc 8571 * lpfc_mbox_api_table_setup - Set up mbox api function jump table
da0436e9
JS
8572 * @phba: The hba struct for which this call is being executed.
8573 * @dev_grp: The HBA PCI-Device group number.
8574 *
8575 * This routine sets up the mbox interface API function jump table in @phba
8576 * struct.
8577 * Returns: 0 - success, -ENODEV - failure.
8578 **/
8579int
8580lpfc_mbox_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
8581{
8582
8583 switch (dev_grp) {
8584 case LPFC_PCI_DEV_LP:
8585 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s3;
8586 phba->lpfc_sli_handle_slow_ring_event =
8587 lpfc_sli_handle_slow_ring_event_s3;
8588 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s3;
8589 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s3;
8590 phba->lpfc_sli_brdready = lpfc_sli_brdready_s3;
8591 break;
8592 case LPFC_PCI_DEV_OC:
8593 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s4;
8594 phba->lpfc_sli_handle_slow_ring_event =
8595 lpfc_sli_handle_slow_ring_event_s4;
8596 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s4;
8597 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s4;
8598 phba->lpfc_sli_brdready = lpfc_sli_brdready_s4;
8599 break;
8600 default:
8601 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8602 "1420 Invalid HBA PCI-device group: 0x%x\n",
8603 dev_grp);
8604 return -ENODEV;
8605 break;
8606 }
8607 return 0;
8608}
8609
e59058c4 8610/**
3621a710 8611 * __lpfc_sli_ringtx_put - Add an iocb to the txq
e59058c4
JS
8612 * @phba: Pointer to HBA context object.
8613 * @pring: Pointer to driver SLI ring object.
8614 * @piocb: Pointer to address of newly added command iocb.
8615 *
8616 * This function is called with hbalock held to add a command
8617 * iocb to the txq when SLI layer cannot submit the command iocb
8618 * to the ring.
8619 **/
2a9bf3d0 8620void
92d7f7b0 8621__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 8622 struct lpfc_iocbq *piocb)
dea3101e 8623{
1c2ba475 8624 lockdep_assert_held(&phba->hbalock);
dea3101e
JB
8625 /* Insert the caller's iocb in the txq tail for later processing. */
8626 list_add_tail(&piocb->list, &pring->txq);
dea3101e
JB
8627}
8628
e59058c4 8629/**
3621a710 8630 * lpfc_sli_next_iocb - Get the next iocb in the txq
e59058c4
JS
8631 * @phba: Pointer to HBA context object.
8632 * @pring: Pointer to driver SLI ring object.
8633 * @piocb: Pointer to address of newly added command iocb.
8634 *
8635 * This function is called with hbalock held before a new
8636 * iocb is submitted to the firmware. This function checks
8637 * txq to flush the iocbs in txq to Firmware before
8638 * submitting new iocbs to the Firmware.
8639 * If there are iocbs in the txq which need to be submitted
8640 * to firmware, lpfc_sli_next_iocb returns the first element
8641 * of the txq after dequeuing it from txq.
8642 * If there is no iocb in the txq then the function will return
8643 * *piocb and *piocb is set to NULL. Caller needs to check
8644 * *piocb to find if there are more commands in the txq.
8645 **/
dea3101e
JB
8646static struct lpfc_iocbq *
8647lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 8648 struct lpfc_iocbq **piocb)
dea3101e
JB
8649{
8650 struct lpfc_iocbq * nextiocb;
8651
1c2ba475
JT
8652 lockdep_assert_held(&phba->hbalock);
8653
dea3101e
JB
8654 nextiocb = lpfc_sli_ringtx_get(phba, pring);
8655 if (!nextiocb) {
8656 nextiocb = *piocb;
8657 *piocb = NULL;
8658 }
8659
8660 return nextiocb;
8661}
8662
e59058c4 8663/**
3772a991 8664 * __lpfc_sli_issue_iocb_s3 - SLI3 device lockless ver of lpfc_sli_issue_iocb
e59058c4 8665 * @phba: Pointer to HBA context object.
3772a991 8666 * @ring_number: SLI ring number to issue iocb on.
e59058c4
JS
8667 * @piocb: Pointer to command iocb.
8668 * @flag: Flag indicating if this command can be put into txq.
8669 *
3772a991
JS
8670 * __lpfc_sli_issue_iocb_s3 is used by other functions in the driver to issue
8671 * an iocb command to an HBA with SLI-3 interface spec. If the PCI slot is
8672 * recovering from error state, if HBA is resetting or if LPFC_STOP_IOCB_EVENT
8673 * flag is turned on, the function returns IOCB_ERROR. When the link is down,
8674 * this function allows only iocbs for posting buffers. This function finds
8675 * next available slot in the command ring and posts the command to the
8676 * available slot and writes the port attention register to request HBA start
8677 * processing new iocb. If there is no slot available in the ring and
8678 * flag & SLI_IOCB_RET_IOCB is set, the new iocb is added to the txq, otherwise
8679 * the function returns IOCB_BUSY.
e59058c4 8680 *
3772a991
JS
8681 * This function is called with hbalock held. The function will return success
8682 * after it successfully submit the iocb to firmware or after adding to the
8683 * txq.
e59058c4 8684 **/
98c9ea5c 8685static int
3772a991 8686__lpfc_sli_issue_iocb_s3(struct lpfc_hba *phba, uint32_t ring_number,
dea3101e
JB
8687 struct lpfc_iocbq *piocb, uint32_t flag)
8688{
8689 struct lpfc_iocbq *nextiocb;
8690 IOCB_t *iocb;
895427bd 8691 struct lpfc_sli_ring *pring = &phba->sli.sli3_ring[ring_number];
dea3101e 8692
1c2ba475
JT
8693 lockdep_assert_held(&phba->hbalock);
8694
92d7f7b0
JS
8695 if (piocb->iocb_cmpl && (!piocb->vport) &&
8696 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
8697 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
8698 lpfc_printf_log(phba, KERN_ERR,
8699 LOG_SLI | LOG_VPORT,
e8b62011 8700 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS
8701 piocb->iocb.ulpCommand);
8702 dump_stack();
8703 return IOCB_ERROR;
8704 }
8705
8706
8d63f375
LV
8707 /* If the PCI channel is in offline state, do not post iocbs. */
8708 if (unlikely(pci_channel_offline(phba->pcidev)))
8709 return IOCB_ERROR;
8710
a257bf90
JS
8711 /* If HBA has a deferred error attention, fail the iocb. */
8712 if (unlikely(phba->hba_flag & DEFER_ERATT))
8713 return IOCB_ERROR;
8714
dea3101e
JB
8715 /*
8716 * We should never get an IOCB if we are in a < LINK_DOWN state
8717 */
2e0fef85 8718 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB
8719 return IOCB_ERROR;
8720
8721 /*
8722 * Check to see if we are blocking IOCB processing because of a
0b727fea 8723 * outstanding event.
dea3101e 8724 */
0b727fea 8725 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e
JB
8726 goto iocb_busy;
8727
2e0fef85 8728 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 8729 /*
2680eeaa 8730 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB
8731 * can be issued if the link is not up.
8732 */
8733 switch (piocb->iocb.ulpCommand) {
84774a4d
JS
8734 case CMD_GEN_REQUEST64_CR:
8735 case CMD_GEN_REQUEST64_CX:
8736 if (!(phba->sli.sli_flag & LPFC_MENLO_MAINT) ||
8737 (piocb->iocb.un.genreq64.w5.hcsw.Rctl !=
6a9c52cf 8738 FC_RCTL_DD_UNSOL_CMD) ||
84774a4d
JS
8739 (piocb->iocb.un.genreq64.w5.hcsw.Type !=
8740 MENLO_TRANSPORT_TYPE))
8741
8742 goto iocb_busy;
8743 break;
dea3101e
JB
8744 case CMD_QUE_RING_BUF_CN:
8745 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB
8746 /*
8747 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
8748 * completion, iocb_cmpl MUST be 0.
8749 */
8750 if (piocb->iocb_cmpl)
8751 piocb->iocb_cmpl = NULL;
8752 /*FALLTHROUGH*/
8753 case CMD_CREATE_XRI_CR:
2680eeaa
JS
8754 case CMD_CLOSE_XRI_CN:
8755 case CMD_CLOSE_XRI_CX:
dea3101e
JB
8756 break;
8757 default:
8758 goto iocb_busy;
8759 }
8760
8761 /*
8762 * For FCP commands, we must be in a state where we can process link
8763 * attention events.
8764 */
895427bd 8765 } else if (unlikely(pring->ringno == LPFC_FCP_RING &&
92d7f7b0 8766 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 8767 goto iocb_busy;
92d7f7b0 8768 }
dea3101e 8769
dea3101e
JB
8770 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
8771 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
8772 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
8773
8774 if (iocb)
8775 lpfc_sli_update_ring(phba, pring);
8776 else
8777 lpfc_sli_update_full_ring(phba, pring);
8778
8779 if (!piocb)
8780 return IOCB_SUCCESS;
8781
8782 goto out_busy;
8783
8784 iocb_busy:
8785 pring->stats.iocb_cmd_delay++;
8786
8787 out_busy:
8788
8789 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 8790 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB
8791 return IOCB_SUCCESS;
8792 }
8793
8794 return IOCB_BUSY;
8795}
8796
3772a991 8797/**
4f774513
JS
8798 * lpfc_sli4_bpl2sgl - Convert the bpl/bde to a sgl.
8799 * @phba: Pointer to HBA context object.
8800 * @piocb: Pointer to command iocb.
8801 * @sglq: Pointer to the scatter gather queue object.
8802 *
8803 * This routine converts the bpl or bde that is in the IOCB
8804 * to a sgl list for the sli4 hardware. The physical address
8805 * of the bpl/bde is converted back to a virtual address.
8806 * If the IOCB contains a BPL then the list of BDE's is
8807 * converted to sli4_sge's. If the IOCB contains a single
8808 * BDE then it is converted to a single sli_sge.
8809 * The IOCB is still in cpu endianess so the contents of
8810 * the bpl can be used without byte swapping.
8811 *
8812 * Returns valid XRI = Success, NO_XRI = Failure.
8813**/
8814static uint16_t
8815lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
8816 struct lpfc_sglq *sglq)
3772a991 8817{
4f774513
JS
8818 uint16_t xritag = NO_XRI;
8819 struct ulp_bde64 *bpl = NULL;
8820 struct ulp_bde64 bde;
8821 struct sli4_sge *sgl = NULL;
1b51197d 8822 struct lpfc_dmabuf *dmabuf;
4f774513
JS
8823 IOCB_t *icmd;
8824 int numBdes = 0;
8825 int i = 0;
63e801ce
JS
8826 uint32_t offset = 0; /* accumulated offset in the sg request list */
8827 int inbound = 0; /* number of sg reply entries inbound from firmware */
3772a991 8828
4f774513
JS
8829 if (!piocbq || !sglq)
8830 return xritag;
8831
8832 sgl = (struct sli4_sge *)sglq->sgl;
8833 icmd = &piocbq->iocb;
6b5151fd
JS
8834 if (icmd->ulpCommand == CMD_XMIT_BLS_RSP64_CX)
8835 return sglq->sli4_xritag;
4f774513
JS
8836 if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
8837 numBdes = icmd->un.genreq64.bdl.bdeSize /
8838 sizeof(struct ulp_bde64);
8839 /* The addrHigh and addrLow fields within the IOCB
8840 * have not been byteswapped yet so there is no
8841 * need to swap them back.
8842 */
1b51197d
JS
8843 if (piocbq->context3)
8844 dmabuf = (struct lpfc_dmabuf *)piocbq->context3;
8845 else
8846 return xritag;
4f774513 8847
1b51197d 8848 bpl = (struct ulp_bde64 *)dmabuf->virt;
4f774513
JS
8849 if (!bpl)
8850 return xritag;
8851
8852 for (i = 0; i < numBdes; i++) {
8853 /* Should already be byte swapped. */
28baac74
JS
8854 sgl->addr_hi = bpl->addrHigh;
8855 sgl->addr_lo = bpl->addrLow;
8856
0558056c 8857 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
8858 if ((i+1) == numBdes)
8859 bf_set(lpfc_sli4_sge_last, sgl, 1);
8860 else
8861 bf_set(lpfc_sli4_sge_last, sgl, 0);
28baac74
JS
8862 /* swap the size field back to the cpu so we
8863 * can assign it to the sgl.
8864 */
8865 bde.tus.w = le32_to_cpu(bpl->tus.w);
8866 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
63e801ce
JS
8867 /* The offsets in the sgl need to be accumulated
8868 * separately for the request and reply lists.
8869 * The request is always first, the reply follows.
8870 */
8871 if (piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) {
8872 /* add up the reply sg entries */
8873 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
8874 inbound++;
8875 /* first inbound? reset the offset */
8876 if (inbound == 1)
8877 offset = 0;
8878 bf_set(lpfc_sli4_sge_offset, sgl, offset);
f9bb2da1
JS
8879 bf_set(lpfc_sli4_sge_type, sgl,
8880 LPFC_SGE_TYPE_DATA);
63e801ce
JS
8881 offset += bde.tus.f.bdeSize;
8882 }
546fc854 8883 sgl->word2 = cpu_to_le32(sgl->word2);
4f774513
JS
8884 bpl++;
8885 sgl++;
8886 }
8887 } else if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BDE_64) {
8888 /* The addrHigh and addrLow fields of the BDE have not
8889 * been byteswapped yet so they need to be swapped
8890 * before putting them in the sgl.
8891 */
8892 sgl->addr_hi =
8893 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh);
8894 sgl->addr_lo =
8895 cpu_to_le32(icmd->un.genreq64.bdl.addrLow);
0558056c 8896 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
8897 bf_set(lpfc_sli4_sge_last, sgl, 1);
8898 sgl->word2 = cpu_to_le32(sgl->word2);
28baac74
JS
8899 sgl->sge_len =
8900 cpu_to_le32(icmd->un.genreq64.bdl.bdeSize);
4f774513
JS
8901 }
8902 return sglq->sli4_xritag;
3772a991 8903}
92d7f7b0 8904
e59058c4 8905/**
4f774513 8906 * lpfc_sli_iocb2wqe - Convert the IOCB to a work queue entry.
e59058c4 8907 * @phba: Pointer to HBA context object.
4f774513
JS
8908 * @piocb: Pointer to command iocb.
8909 * @wqe: Pointer to the work queue entry.
e59058c4 8910 *
4f774513
JS
8911 * This routine converts the iocb command to its Work Queue Entry
8912 * equivalent. The wqe pointer should not have any fields set when
8913 * this routine is called because it will memcpy over them.
8914 * This routine does not set the CQ_ID or the WQEC bits in the
8915 * wqe.
e59058c4 8916 *
4f774513 8917 * Returns: 0 = Success, IOCB_ERROR = Failure.
e59058c4 8918 **/
cf5bf97e 8919static int
4f774513 8920lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
205e8240 8921 union lpfc_wqe128 *wqe)
cf5bf97e 8922{
5ffc266e 8923 uint32_t xmit_len = 0, total_len = 0;
4f774513
JS
8924 uint8_t ct = 0;
8925 uint32_t fip;
8926 uint32_t abort_tag;
8927 uint8_t command_type = ELS_COMMAND_NON_FIP;
8928 uint8_t cmnd;
8929 uint16_t xritag;
dcf2a4e0
JS
8930 uint16_t abrt_iotag;
8931 struct lpfc_iocbq *abrtiocbq;
4f774513 8932 struct ulp_bde64 *bpl = NULL;
f0d9bccc 8933 uint32_t els_id = LPFC_ELS_ID_DEFAULT;
5ffc266e
JS
8934 int numBdes, i;
8935 struct ulp_bde64 bde;
c31098ce 8936 struct lpfc_nodelist *ndlp;
ff78d8f9 8937 uint32_t *pcmd;
1b51197d 8938 uint32_t if_type;
4f774513 8939
45ed1190 8940 fip = phba->hba_flag & HBA_FIP_SUPPORT;
4f774513 8941 /* The fcp commands will set command type */
0c287589 8942 if (iocbq->iocb_flag & LPFC_IO_FCP)
4f774513 8943 command_type = FCP_COMMAND;
c868595d 8944 else if (fip && (iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK))
0c287589
JS
8945 command_type = ELS_COMMAND_FIP;
8946 else
8947 command_type = ELS_COMMAND_NON_FIP;
8948
b5c53958
JS
8949 if (phba->fcp_embed_io)
8950 memset(wqe, 0, sizeof(union lpfc_wqe128));
4f774513
JS
8951 /* Some of the fields are in the right position already */
8952 memcpy(wqe, &iocbq->iocb, sizeof(union lpfc_wqe));
ae9e28f3
JS
8953 if (iocbq->iocb.ulpCommand != CMD_SEND_FRAME) {
8954 /* The ct field has moved so reset */
8955 wqe->generic.wqe_com.word7 = 0;
8956 wqe->generic.wqe_com.word10 = 0;
8957 }
b5c53958
JS
8958
8959 abort_tag = (uint32_t) iocbq->iotag;
8960 xritag = iocbq->sli4_xritag;
4f774513
JS
8961 /* words0-2 bpl convert bde */
8962 if (iocbq->iocb.un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
5ffc266e
JS
8963 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
8964 sizeof(struct ulp_bde64);
4f774513
JS
8965 bpl = (struct ulp_bde64 *)
8966 ((struct lpfc_dmabuf *)iocbq->context3)->virt;
8967 if (!bpl)
8968 return IOCB_ERROR;
cf5bf97e 8969
4f774513
JS
8970 /* Should already be byte swapped. */
8971 wqe->generic.bde.addrHigh = le32_to_cpu(bpl->addrHigh);
8972 wqe->generic.bde.addrLow = le32_to_cpu(bpl->addrLow);
8973 /* swap the size field back to the cpu so we
8974 * can assign it to the sgl.
8975 */
8976 wqe->generic.bde.tus.w = le32_to_cpu(bpl->tus.w);
5ffc266e
JS
8977 xmit_len = wqe->generic.bde.tus.f.bdeSize;
8978 total_len = 0;
8979 for (i = 0; i < numBdes; i++) {
8980 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
8981 total_len += bde.tus.f.bdeSize;
8982 }
4f774513 8983 } else
5ffc266e 8984 xmit_len = iocbq->iocb.un.fcpi64.bdl.bdeSize;
cf5bf97e 8985
4f774513
JS
8986 iocbq->iocb.ulpIoTag = iocbq->iotag;
8987 cmnd = iocbq->iocb.ulpCommand;
a4bc3379 8988
4f774513
JS
8989 switch (iocbq->iocb.ulpCommand) {
8990 case CMD_ELS_REQUEST64_CR:
93d1379e
JS
8991 if (iocbq->iocb_flag & LPFC_IO_LIBDFC)
8992 ndlp = iocbq->context_un.ndlp;
8993 else
8994 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513
JS
8995 if (!iocbq->iocb.ulpLe) {
8996 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8997 "2007 Only Limited Edition cmd Format"
8998 " supported 0x%x\n",
8999 iocbq->iocb.ulpCommand);
9000 return IOCB_ERROR;
9001 }
ff78d8f9 9002
5ffc266e 9003 wqe->els_req.payload_len = xmit_len;
4f774513
JS
9004 /* Els_reguest64 has a TMO */
9005 bf_set(wqe_tmo, &wqe->els_req.wqe_com,
9006 iocbq->iocb.ulpTimeout);
9007 /* Need a VF for word 4 set the vf bit*/
9008 bf_set(els_req64_vf, &wqe->els_req, 0);
9009 /* And a VFID for word 12 */
9010 bf_set(els_req64_vfid, &wqe->els_req, 0);
4f774513 9011 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
f0d9bccc
JS
9012 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9013 iocbq->iocb.ulpContext);
9014 bf_set(wqe_ct, &wqe->els_req.wqe_com, ct);
9015 bf_set(wqe_pu, &wqe->els_req.wqe_com, 0);
4f774513 9016 /* CCP CCPE PV PRI in word10 were set in the memcpy */
ff78d8f9 9017 if (command_type == ELS_COMMAND_FIP)
c868595d
JS
9018 els_id = ((iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK)
9019 >> LPFC_FIP_ELS_ID_SHIFT);
ff78d8f9
JS
9020 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9021 iocbq->context2)->virt);
1b51197d
JS
9022 if_type = bf_get(lpfc_sli_intf_if_type,
9023 &phba->sli4_hba.sli_intf);
27d6ac0a 9024 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
ff78d8f9 9025 if (pcmd && (*pcmd == ELS_CMD_FLOGI ||
cb69f7de 9026 *pcmd == ELS_CMD_SCR ||
6b5151fd 9027 *pcmd == ELS_CMD_FDISC ||
bdcd2b92 9028 *pcmd == ELS_CMD_LOGO ||
ff78d8f9
JS
9029 *pcmd == ELS_CMD_PLOGI)) {
9030 bf_set(els_req64_sp, &wqe->els_req, 1);
9031 bf_set(els_req64_sid, &wqe->els_req,
9032 iocbq->vport->fc_myDID);
939723a4
JS
9033 if ((*pcmd == ELS_CMD_FLOGI) &&
9034 !(phba->fc_topology ==
9035 LPFC_TOPOLOGY_LOOP))
9036 bf_set(els_req64_sid, &wqe->els_req, 0);
ff78d8f9
JS
9037 bf_set(wqe_ct, &wqe->els_req.wqe_com, 1);
9038 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
a7dd9c0f 9039 phba->vpi_ids[iocbq->vport->vpi]);
3ef6d24c 9040 } else if (pcmd && iocbq->context1) {
ff78d8f9
JS
9041 bf_set(wqe_ct, &wqe->els_req.wqe_com, 0);
9042 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9043 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
9044 }
c868595d 9045 }
6d368e53
JS
9046 bf_set(wqe_temp_rpi, &wqe->els_req.wqe_com,
9047 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
f0d9bccc
JS
9048 bf_set(wqe_els_id, &wqe->els_req.wqe_com, els_id);
9049 bf_set(wqe_dbde, &wqe->els_req.wqe_com, 1);
9050 bf_set(wqe_iod, &wqe->els_req.wqe_com, LPFC_WQE_IOD_READ);
9051 bf_set(wqe_qosd, &wqe->els_req.wqe_com, 1);
9052 bf_set(wqe_lenloc, &wqe->els_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9053 bf_set(wqe_ebde_cnt, &wqe->els_req.wqe_com, 0);
af22741c 9054 wqe->els_req.max_response_payload_len = total_len - xmit_len;
7851fe2c 9055 break;
5ffc266e 9056 case CMD_XMIT_SEQUENCE64_CX:
f0d9bccc
JS
9057 bf_set(wqe_ctxt_tag, &wqe->xmit_sequence.wqe_com,
9058 iocbq->iocb.un.ulpWord[3]);
9059 bf_set(wqe_rcvoxid, &wqe->xmit_sequence.wqe_com,
7851fe2c 9060 iocbq->iocb.unsli3.rcvsli3.ox_id);
5ffc266e
JS
9061 /* The entire sequence is transmitted for this IOCB */
9062 xmit_len = total_len;
9063 cmnd = CMD_XMIT_SEQUENCE64_CR;
1b51197d
JS
9064 if (phba->link_flag & LS_LOOPBACK_MODE)
9065 bf_set(wqe_xo, &wqe->xmit_sequence.wge_ctl, 1);
4f774513 9066 case CMD_XMIT_SEQUENCE64_CR:
f0d9bccc
JS
9067 /* word3 iocb=io_tag32 wqe=reserved */
9068 wqe->xmit_sequence.rsvd3 = 0;
4f774513
JS
9069 /* word4 relative_offset memcpy */
9070 /* word5 r_ctl/df_ctl memcpy */
f0d9bccc
JS
9071 bf_set(wqe_pu, &wqe->xmit_sequence.wqe_com, 0);
9072 bf_set(wqe_dbde, &wqe->xmit_sequence.wqe_com, 1);
9073 bf_set(wqe_iod, &wqe->xmit_sequence.wqe_com,
9074 LPFC_WQE_IOD_WRITE);
9075 bf_set(wqe_lenloc, &wqe->xmit_sequence.wqe_com,
9076 LPFC_WQE_LENLOC_WORD12);
9077 bf_set(wqe_ebde_cnt, &wqe->xmit_sequence.wqe_com, 0);
5ffc266e
JS
9078 wqe->xmit_sequence.xmit_len = xmit_len;
9079 command_type = OTHER_COMMAND;
7851fe2c 9080 break;
4f774513 9081 case CMD_XMIT_BCAST64_CN:
f0d9bccc
JS
9082 /* word3 iocb=iotag32 wqe=seq_payload_len */
9083 wqe->xmit_bcast64.seq_payload_len = xmit_len;
4f774513
JS
9084 /* word4 iocb=rsvd wqe=rsvd */
9085 /* word5 iocb=rctl/type/df_ctl wqe=rctl/type/df_ctl memcpy */
9086 /* word6 iocb=ctxt_tag/io_tag wqe=ctxt_tag/xri */
f0d9bccc 9087 bf_set(wqe_ct, &wqe->xmit_bcast64.wqe_com,
4f774513 9088 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
f0d9bccc
JS
9089 bf_set(wqe_dbde, &wqe->xmit_bcast64.wqe_com, 1);
9090 bf_set(wqe_iod, &wqe->xmit_bcast64.wqe_com, LPFC_WQE_IOD_WRITE);
9091 bf_set(wqe_lenloc, &wqe->xmit_bcast64.wqe_com,
9092 LPFC_WQE_LENLOC_WORD3);
9093 bf_set(wqe_ebde_cnt, &wqe->xmit_bcast64.wqe_com, 0);
7851fe2c 9094 break;
4f774513
JS
9095 case CMD_FCP_IWRITE64_CR:
9096 command_type = FCP_COMMAND_DATA_OUT;
f0d9bccc
JS
9097 /* word3 iocb=iotag wqe=payload_offset_len */
9098 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9099 bf_set(payload_offset_len, &wqe->fcp_iwrite,
9100 xmit_len + sizeof(struct fcp_rsp));
9101 bf_set(cmd_buff_len, &wqe->fcp_iwrite,
9102 0);
f0d9bccc
JS
9103 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9104 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9105 bf_set(wqe_erp, &wqe->fcp_iwrite.wqe_com,
9106 iocbq->iocb.ulpFCP2Rcvy);
9107 bf_set(wqe_lnk, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpXS);
9108 /* Always open the exchange */
f0d9bccc
JS
9109 bf_set(wqe_iod, &wqe->fcp_iwrite.wqe_com, LPFC_WQE_IOD_WRITE);
9110 bf_set(wqe_lenloc, &wqe->fcp_iwrite.wqe_com,
9111 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9112 bf_set(wqe_pu, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9113 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 1);
1ba981fd
JS
9114 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9115 bf_set(wqe_oas, &wqe->fcp_iwrite.wqe_com, 1);
c92c841c
JS
9116 bf_set(wqe_ccpe, &wqe->fcp_iwrite.wqe_com, 1);
9117 if (iocbq->priority) {
9118 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9119 (iocbq->priority << 1));
9120 } else {
1ba981fd
JS
9121 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9122 (phba->cfg_XLanePriority << 1));
9123 }
9124 }
b5c53958
JS
9125 /* Note, word 10 is already initialized to 0 */
9126
414abe0a
JS
9127 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9128 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9129 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 1);
9130 else
9131 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 0);
9132
b5c53958
JS
9133 if (phba->fcp_embed_io) {
9134 struct lpfc_scsi_buf *lpfc_cmd;
9135 struct sli4_sge *sgl;
b5c53958
JS
9136 struct fcp_cmnd *fcp_cmnd;
9137 uint32_t *ptr;
9138
9139 /* 128 byte wqe support here */
b5c53958
JS
9140
9141 lpfc_cmd = iocbq->context1;
9142 sgl = (struct sli4_sge *)lpfc_cmd->fcp_bpl;
9143 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9144
9145 /* Word 0-2 - FCP_CMND */
205e8240 9146 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9147 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9148 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9149 wqe->generic.bde.addrHigh = 0;
9150 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9151
205e8240
JS
9152 bf_set(wqe_wqes, &wqe->fcp_iwrite.wqe_com, 1);
9153 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 0);
b5c53958
JS
9154
9155 /* Word 22-29 FCP CMND Payload */
205e8240 9156 ptr = &wqe->words[22];
b5c53958
JS
9157 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9158 }
7851fe2c 9159 break;
4f774513 9160 case CMD_FCP_IREAD64_CR:
f0d9bccc
JS
9161 /* word3 iocb=iotag wqe=payload_offset_len */
9162 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9163 bf_set(payload_offset_len, &wqe->fcp_iread,
9164 xmit_len + sizeof(struct fcp_rsp));
9165 bf_set(cmd_buff_len, &wqe->fcp_iread,
9166 0);
f0d9bccc
JS
9167 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9168 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9169 bf_set(wqe_erp, &wqe->fcp_iread.wqe_com,
9170 iocbq->iocb.ulpFCP2Rcvy);
9171 bf_set(wqe_lnk, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpXS);
f1126688 9172 /* Always open the exchange */
f0d9bccc
JS
9173 bf_set(wqe_iod, &wqe->fcp_iread.wqe_com, LPFC_WQE_IOD_READ);
9174 bf_set(wqe_lenloc, &wqe->fcp_iread.wqe_com,
9175 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9176 bf_set(wqe_pu, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9177 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 1);
1ba981fd
JS
9178 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9179 bf_set(wqe_oas, &wqe->fcp_iread.wqe_com, 1);
c92c841c
JS
9180 bf_set(wqe_ccpe, &wqe->fcp_iread.wqe_com, 1);
9181 if (iocbq->priority) {
9182 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9183 (iocbq->priority << 1));
9184 } else {
1ba981fd
JS
9185 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9186 (phba->cfg_XLanePriority << 1));
9187 }
9188 }
b5c53958
JS
9189 /* Note, word 10 is already initialized to 0 */
9190
414abe0a
JS
9191 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9192 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9193 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 1);
9194 else
9195 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 0);
9196
b5c53958
JS
9197 if (phba->fcp_embed_io) {
9198 struct lpfc_scsi_buf *lpfc_cmd;
9199 struct sli4_sge *sgl;
b5c53958
JS
9200 struct fcp_cmnd *fcp_cmnd;
9201 uint32_t *ptr;
9202
9203 /* 128 byte wqe support here */
b5c53958
JS
9204
9205 lpfc_cmd = iocbq->context1;
9206 sgl = (struct sli4_sge *)lpfc_cmd->fcp_bpl;
9207 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9208
9209 /* Word 0-2 - FCP_CMND */
205e8240 9210 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9211 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9212 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9213 wqe->generic.bde.addrHigh = 0;
9214 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9215
205e8240
JS
9216 bf_set(wqe_wqes, &wqe->fcp_iread.wqe_com, 1);
9217 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 0);
b5c53958
JS
9218
9219 /* Word 22-29 FCP CMND Payload */
205e8240 9220 ptr = &wqe->words[22];
b5c53958
JS
9221 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9222 }
7851fe2c 9223 break;
4f774513 9224 case CMD_FCP_ICMND64_CR:
0ba4b219
JS
9225 /* word3 iocb=iotag wqe=payload_offset_len */
9226 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
9227 bf_set(payload_offset_len, &wqe->fcp_icmd,
9228 xmit_len + sizeof(struct fcp_rsp));
9229 bf_set(cmd_buff_len, &wqe->fcp_icmd,
9230 0);
f0d9bccc 9231 /* word3 iocb=IO_TAG wqe=reserved */
f0d9bccc 9232 bf_set(wqe_pu, &wqe->fcp_icmd.wqe_com, 0);
4f774513 9233 /* Always open the exchange */
f0d9bccc
JS
9234 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 1);
9235 bf_set(wqe_iod, &wqe->fcp_icmd.wqe_com, LPFC_WQE_IOD_WRITE);
9236 bf_set(wqe_qosd, &wqe->fcp_icmd.wqe_com, 1);
9237 bf_set(wqe_lenloc, &wqe->fcp_icmd.wqe_com,
9238 LPFC_WQE_LENLOC_NONE);
2a94aea4
JS
9239 bf_set(wqe_erp, &wqe->fcp_icmd.wqe_com,
9240 iocbq->iocb.ulpFCP2Rcvy);
1ba981fd
JS
9241 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9242 bf_set(wqe_oas, &wqe->fcp_icmd.wqe_com, 1);
c92c841c
JS
9243 bf_set(wqe_ccpe, &wqe->fcp_icmd.wqe_com, 1);
9244 if (iocbq->priority) {
9245 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9246 (iocbq->priority << 1));
9247 } else {
1ba981fd
JS
9248 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9249 (phba->cfg_XLanePriority << 1));
9250 }
9251 }
b5c53958
JS
9252 /* Note, word 10 is already initialized to 0 */
9253
9254 if (phba->fcp_embed_io) {
9255 struct lpfc_scsi_buf *lpfc_cmd;
9256 struct sli4_sge *sgl;
b5c53958
JS
9257 struct fcp_cmnd *fcp_cmnd;
9258 uint32_t *ptr;
9259
9260 /* 128 byte wqe support here */
b5c53958
JS
9261
9262 lpfc_cmd = iocbq->context1;
9263 sgl = (struct sli4_sge *)lpfc_cmd->fcp_bpl;
9264 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9265
9266 /* Word 0-2 - FCP_CMND */
205e8240 9267 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9268 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9269 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9270 wqe->generic.bde.addrHigh = 0;
9271 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9272
205e8240
JS
9273 bf_set(wqe_wqes, &wqe->fcp_icmd.wqe_com, 1);
9274 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 0);
b5c53958
JS
9275
9276 /* Word 22-29 FCP CMND Payload */
205e8240 9277 ptr = &wqe->words[22];
b5c53958
JS
9278 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9279 }
7851fe2c 9280 break;
4f774513 9281 case CMD_GEN_REQUEST64_CR:
63e801ce
JS
9282 /* For this command calculate the xmit length of the
9283 * request bde.
9284 */
9285 xmit_len = 0;
9286 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9287 sizeof(struct ulp_bde64);
9288 for (i = 0; i < numBdes; i++) {
63e801ce 9289 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
546fc854
JS
9290 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
9291 break;
63e801ce
JS
9292 xmit_len += bde.tus.f.bdeSize;
9293 }
f0d9bccc
JS
9294 /* word3 iocb=IO_TAG wqe=request_payload_len */
9295 wqe->gen_req.request_payload_len = xmit_len;
9296 /* word4 iocb=parameter wqe=relative_offset memcpy */
9297 /* word5 [rctl, type, df_ctl, la] copied in memcpy */
4f774513
JS
9298 /* word6 context tag copied in memcpy */
9299 if (iocbq->iocb.ulpCt_h || iocbq->iocb.ulpCt_l) {
9300 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
9301 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9302 "2015 Invalid CT %x command 0x%x\n",
9303 ct, iocbq->iocb.ulpCommand);
9304 return IOCB_ERROR;
9305 }
f0d9bccc
JS
9306 bf_set(wqe_ct, &wqe->gen_req.wqe_com, 0);
9307 bf_set(wqe_tmo, &wqe->gen_req.wqe_com, iocbq->iocb.ulpTimeout);
9308 bf_set(wqe_pu, &wqe->gen_req.wqe_com, iocbq->iocb.ulpPU);
9309 bf_set(wqe_dbde, &wqe->gen_req.wqe_com, 1);
9310 bf_set(wqe_iod, &wqe->gen_req.wqe_com, LPFC_WQE_IOD_READ);
9311 bf_set(wqe_qosd, &wqe->gen_req.wqe_com, 1);
9312 bf_set(wqe_lenloc, &wqe->gen_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9313 bf_set(wqe_ebde_cnt, &wqe->gen_req.wqe_com, 0);
af22741c 9314 wqe->gen_req.max_response_payload_len = total_len - xmit_len;
4f774513 9315 command_type = OTHER_COMMAND;
7851fe2c 9316 break;
4f774513 9317 case CMD_XMIT_ELS_RSP64_CX:
c31098ce 9318 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513 9319 /* words0-2 BDE memcpy */
f0d9bccc
JS
9320 /* word3 iocb=iotag32 wqe=response_payload_len */
9321 wqe->xmit_els_rsp.response_payload_len = xmit_len;
939723a4
JS
9322 /* word4 */
9323 wqe->xmit_els_rsp.word4 = 0;
4f774513
JS
9324 /* word5 iocb=rsvd wge=did */
9325 bf_set(wqe_els_did, &wqe->xmit_els_rsp.wqe_dest,
939723a4
JS
9326 iocbq->iocb.un.xseq64.xmit_els_remoteID);
9327
9328 if_type = bf_get(lpfc_sli_intf_if_type,
9329 &phba->sli4_hba.sli_intf);
27d6ac0a 9330 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
939723a4
JS
9331 if (iocbq->vport->fc_flag & FC_PT2PT) {
9332 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9333 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
9334 iocbq->vport->fc_myDID);
9335 if (iocbq->vport->fc_myDID == Fabric_DID) {
9336 bf_set(wqe_els_did,
9337 &wqe->xmit_els_rsp.wqe_dest, 0);
9338 }
9339 }
9340 }
f0d9bccc
JS
9341 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com,
9342 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9343 bf_set(wqe_pu, &wqe->xmit_els_rsp.wqe_com, iocbq->iocb.ulpPU);
9344 bf_set(wqe_rcvoxid, &wqe->xmit_els_rsp.wqe_com,
7851fe2c 9345 iocbq->iocb.unsli3.rcvsli3.ox_id);
4f774513 9346 if (!iocbq->iocb.ulpCt_h && iocbq->iocb.ulpCt_l)
f0d9bccc 9347 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
6d368e53 9348 phba->vpi_ids[iocbq->vport->vpi]);
f0d9bccc
JS
9349 bf_set(wqe_dbde, &wqe->xmit_els_rsp.wqe_com, 1);
9350 bf_set(wqe_iod, &wqe->xmit_els_rsp.wqe_com, LPFC_WQE_IOD_WRITE);
9351 bf_set(wqe_qosd, &wqe->xmit_els_rsp.wqe_com, 1);
9352 bf_set(wqe_lenloc, &wqe->xmit_els_rsp.wqe_com,
9353 LPFC_WQE_LENLOC_WORD3);
9354 bf_set(wqe_ebde_cnt, &wqe->xmit_els_rsp.wqe_com, 0);
6d368e53
JS
9355 bf_set(wqe_rsp_temp_rpi, &wqe->xmit_els_rsp,
9356 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
ff78d8f9
JS
9357 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9358 iocbq->context2)->virt);
9359 if (phba->fc_topology == LPFC_TOPOLOGY_LOOP) {
939723a4
JS
9360 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9361 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
ff78d8f9 9362 iocbq->vport->fc_myDID);
939723a4
JS
9363 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com, 1);
9364 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
ff78d8f9
JS
9365 phba->vpi_ids[phba->pport->vpi]);
9366 }
4f774513 9367 command_type = OTHER_COMMAND;
7851fe2c 9368 break;
4f774513
JS
9369 case CMD_CLOSE_XRI_CN:
9370 case CMD_ABORT_XRI_CN:
9371 case CMD_ABORT_XRI_CX:
9372 /* words 0-2 memcpy should be 0 rserved */
9373 /* port will send abts */
dcf2a4e0
JS
9374 abrt_iotag = iocbq->iocb.un.acxri.abortContextTag;
9375 if (abrt_iotag != 0 && abrt_iotag <= phba->sli.last_iotag) {
9376 abrtiocbq = phba->sli.iocbq_lookup[abrt_iotag];
9377 fip = abrtiocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK;
9378 } else
9379 fip = 0;
9380
9381 if ((iocbq->iocb.ulpCommand == CMD_CLOSE_XRI_CN) || fip)
4f774513 9382 /*
dcf2a4e0
JS
9383 * The link is down, or the command was ELS_FIP
9384 * so the fw does not need to send abts
4f774513
JS
9385 * on the wire.
9386 */
9387 bf_set(abort_cmd_ia, &wqe->abort_cmd, 1);
9388 else
9389 bf_set(abort_cmd_ia, &wqe->abort_cmd, 0);
9390 bf_set(abort_cmd_criteria, &wqe->abort_cmd, T_XRI_TAG);
f0d9bccc
JS
9391 /* word5 iocb=CONTEXT_TAG|IO_TAG wqe=reserved */
9392 wqe->abort_cmd.rsrvd5 = 0;
9393 bf_set(wqe_ct, &wqe->abort_cmd.wqe_com,
4f774513
JS
9394 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9395 abort_tag = iocbq->iocb.un.acxri.abortIoTag;
4f774513
JS
9396 /*
9397 * The abort handler will send us CMD_ABORT_XRI_CN or
9398 * CMD_CLOSE_XRI_CN and the fw only accepts CMD_ABORT_XRI_CX
9399 */
f0d9bccc
JS
9400 bf_set(wqe_cmnd, &wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
9401 bf_set(wqe_qosd, &wqe->abort_cmd.wqe_com, 1);
9402 bf_set(wqe_lenloc, &wqe->abort_cmd.wqe_com,
9403 LPFC_WQE_LENLOC_NONE);
4f774513
JS
9404 cmnd = CMD_ABORT_XRI_CX;
9405 command_type = OTHER_COMMAND;
9406 xritag = 0;
7851fe2c 9407 break;
6669f9bb 9408 case CMD_XMIT_BLS_RSP64_CX:
6b5151fd 9409 ndlp = (struct lpfc_nodelist *)iocbq->context1;
546fc854 9410 /* As BLS ABTS RSP WQE is very different from other WQEs,
6669f9bb
JS
9411 * we re-construct this WQE here based on information in
9412 * iocbq from scratch.
9413 */
9414 memset(wqe, 0, sizeof(union lpfc_wqe));
5ffc266e 9415 /* OX_ID is invariable to who sent ABTS to CT exchange */
6669f9bb 9416 bf_set(xmit_bls_rsp64_oxid, &wqe->xmit_bls_rsp,
546fc854
JS
9417 bf_get(lpfc_abts_oxid, &iocbq->iocb.un.bls_rsp));
9418 if (bf_get(lpfc_abts_orig, &iocbq->iocb.un.bls_rsp) ==
5ffc266e
JS
9419 LPFC_ABTS_UNSOL_INT) {
9420 /* ABTS sent by initiator to CT exchange, the
9421 * RX_ID field will be filled with the newly
9422 * allocated responder XRI.
9423 */
9424 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
9425 iocbq->sli4_xritag);
9426 } else {
9427 /* ABTS sent by responder to CT exchange, the
9428 * RX_ID field will be filled with the responder
9429 * RX_ID from ABTS.
9430 */
9431 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
546fc854 9432 bf_get(lpfc_abts_rxid, &iocbq->iocb.un.bls_rsp));
5ffc266e 9433 }
6669f9bb
JS
9434 bf_set(xmit_bls_rsp64_seqcnthi, &wqe->xmit_bls_rsp, 0xffff);
9435 bf_set(wqe_xmit_bls_pt, &wqe->xmit_bls_rsp.wqe_dest, 0x1);
6b5151fd
JS
9436
9437 /* Use CT=VPI */
9438 bf_set(wqe_els_did, &wqe->xmit_bls_rsp.wqe_dest,
9439 ndlp->nlp_DID);
9440 bf_set(xmit_bls_rsp64_temprpi, &wqe->xmit_bls_rsp,
9441 iocbq->iocb.ulpContext);
9442 bf_set(wqe_ct, &wqe->xmit_bls_rsp.wqe_com, 1);
6669f9bb 9443 bf_set(wqe_ctxt_tag, &wqe->xmit_bls_rsp.wqe_com,
6b5151fd 9444 phba->vpi_ids[phba->pport->vpi]);
f0d9bccc
JS
9445 bf_set(wqe_qosd, &wqe->xmit_bls_rsp.wqe_com, 1);
9446 bf_set(wqe_lenloc, &wqe->xmit_bls_rsp.wqe_com,
9447 LPFC_WQE_LENLOC_NONE);
6669f9bb
JS
9448 /* Overwrite the pre-set comnd type with OTHER_COMMAND */
9449 command_type = OTHER_COMMAND;
546fc854
JS
9450 if (iocbq->iocb.un.xseq64.w5.hcsw.Rctl == FC_RCTL_BA_RJT) {
9451 bf_set(xmit_bls_rsp64_rjt_vspec, &wqe->xmit_bls_rsp,
9452 bf_get(lpfc_vndr_code, &iocbq->iocb.un.bls_rsp));
9453 bf_set(xmit_bls_rsp64_rjt_expc, &wqe->xmit_bls_rsp,
9454 bf_get(lpfc_rsn_expln, &iocbq->iocb.un.bls_rsp));
9455 bf_set(xmit_bls_rsp64_rjt_rsnc, &wqe->xmit_bls_rsp,
9456 bf_get(lpfc_rsn_code, &iocbq->iocb.un.bls_rsp));
9457 }
9458
7851fe2c 9459 break;
ae9e28f3
JS
9460 case CMD_SEND_FRAME:
9461 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9462 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9463 return 0;
4f774513
JS
9464 case CMD_XRI_ABORTED_CX:
9465 case CMD_CREATE_XRI_CR: /* Do we expect to use this? */
4f774513
JS
9466 case CMD_IOCB_FCP_IBIDIR64_CR: /* bidirectional xfer */
9467 case CMD_FCP_TSEND64_CX: /* Target mode send xfer-ready */
9468 case CMD_FCP_TRSP64_CX: /* Target mode rcv */
9469 case CMD_FCP_AUTO_TRSP_CX: /* Auto target rsp */
9470 default:
9471 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9472 "2014 Invalid command 0x%x\n",
9473 iocbq->iocb.ulpCommand);
9474 return IOCB_ERROR;
7851fe2c 9475 break;
4f774513 9476 }
6d368e53 9477
8012cc38
JS
9478 if (iocbq->iocb_flag & LPFC_IO_DIF_PASS)
9479 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_PASSTHRU);
9480 else if (iocbq->iocb_flag & LPFC_IO_DIF_STRIP)
9481 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_STRIP);
9482 else if (iocbq->iocb_flag & LPFC_IO_DIF_INSERT)
9483 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_INSERT);
9484 iocbq->iocb_flag &= ~(LPFC_IO_DIF_PASS | LPFC_IO_DIF_STRIP |
9485 LPFC_IO_DIF_INSERT);
f0d9bccc
JS
9486 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9487 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9488 wqe->generic.wqe_com.abort_tag = abort_tag;
9489 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, command_type);
9490 bf_set(wqe_cmnd, &wqe->generic.wqe_com, cmnd);
9491 bf_set(wqe_class, &wqe->generic.wqe_com, iocbq->iocb.ulpClass);
9492 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
4f774513
JS
9493 return 0;
9494}
9495
9496/**
9497 * __lpfc_sli_issue_iocb_s4 - SLI4 device lockless ver of lpfc_sli_issue_iocb
9498 * @phba: Pointer to HBA context object.
9499 * @ring_number: SLI ring number to issue iocb on.
9500 * @piocb: Pointer to command iocb.
9501 * @flag: Flag indicating if this command can be put into txq.
9502 *
9503 * __lpfc_sli_issue_iocb_s4 is used by other functions in the driver to issue
9504 * an iocb command to an HBA with SLI-4 interface spec.
9505 *
9506 * This function is called with hbalock held. The function will return success
9507 * after it successfully submit the iocb to firmware or after adding to the
9508 * txq.
9509 **/
9510static int
9511__lpfc_sli_issue_iocb_s4(struct lpfc_hba *phba, uint32_t ring_number,
9512 struct lpfc_iocbq *piocb, uint32_t flag)
9513{
9514 struct lpfc_sglq *sglq;
205e8240 9515 union lpfc_wqe128 wqe;
1ba981fd 9516 struct lpfc_queue *wq;
895427bd 9517 struct lpfc_sli_ring *pring;
4f774513 9518
895427bd
JS
9519 /* Get the WQ */
9520 if ((piocb->iocb_flag & LPFC_IO_FCP) ||
9521 (piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
9522 if (!phba->cfg_fof || (!(piocb->iocb_flag & LPFC_IO_OAS)))
9523 wq = phba->sli4_hba.fcp_wq[piocb->hba_wqidx];
9524 else
9525 wq = phba->sli4_hba.oas_wq;
9526 } else {
9527 wq = phba->sli4_hba.els_wq;
9528 }
9529
9530 /* Get corresponding ring */
9531 pring = wq->pring;
1c2ba475 9532
b5c53958
JS
9533 /*
9534 * The WQE can be either 64 or 128 bytes,
b5c53958 9535 */
b5c53958 9536
895427bd
JS
9537 lockdep_assert_held(&phba->hbalock);
9538
4f774513
JS
9539 if (piocb->sli4_xritag == NO_XRI) {
9540 if (piocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
6b5151fd 9541 piocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN)
4f774513
JS
9542 sglq = NULL;
9543 else {
0e9bb8d7 9544 if (!list_empty(&pring->txq)) {
2a9bf3d0
JS
9545 if (!(flag & SLI_IOCB_RET_IOCB)) {
9546 __lpfc_sli_ringtx_put(phba,
9547 pring, piocb);
9548 return IOCB_SUCCESS;
9549 } else {
9550 return IOCB_BUSY;
9551 }
9552 } else {
895427bd 9553 sglq = __lpfc_sli_get_els_sglq(phba, piocb);
2a9bf3d0
JS
9554 if (!sglq) {
9555 if (!(flag & SLI_IOCB_RET_IOCB)) {
9556 __lpfc_sli_ringtx_put(phba,
9557 pring,
9558 piocb);
9559 return IOCB_SUCCESS;
9560 } else
9561 return IOCB_BUSY;
9562 }
9563 }
4f774513 9564 }
2ea259ee 9565 } else if (piocb->iocb_flag & LPFC_IO_FCP)
6d368e53
JS
9566 /* These IO's already have an XRI and a mapped sgl. */
9567 sglq = NULL;
2ea259ee 9568 else {
6d368e53
JS
9569 /*
9570 * This is a continuation of a commandi,(CX) so this
4f774513
JS
9571 * sglq is on the active list
9572 */
edccdc17 9573 sglq = __lpfc_get_active_sglq(phba, piocb->sli4_lxritag);
4f774513
JS
9574 if (!sglq)
9575 return IOCB_ERROR;
9576 }
9577
9578 if (sglq) {
6d368e53 9579 piocb->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0 9580 piocb->sli4_xritag = sglq->sli4_xritag;
2a9bf3d0 9581 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocb, sglq))
4f774513
JS
9582 return IOCB_ERROR;
9583 }
9584
205e8240 9585 if (lpfc_sli4_iocb2wqe(phba, piocb, &wqe))
4f774513
JS
9586 return IOCB_ERROR;
9587
205e8240 9588 if (lpfc_sli4_wq_put(wq, &wqe))
895427bd 9589 return IOCB_ERROR;
4f774513
JS
9590 lpfc_sli_ringtxcmpl_put(phba, pring, piocb);
9591
9592 return 0;
9593}
9594
9595/**
9596 * __lpfc_sli_issue_iocb - Wrapper func of lockless version for issuing iocb
9597 *
9598 * This routine wraps the actual lockless version for issusing IOCB function
9599 * pointer from the lpfc_hba struct.
9600 *
9601 * Return codes:
b5c53958
JS
9602 * IOCB_ERROR - Error
9603 * IOCB_SUCCESS - Success
9604 * IOCB_BUSY - Busy
4f774513 9605 **/
2a9bf3d0 9606int
4f774513
JS
9607__lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
9608 struct lpfc_iocbq *piocb, uint32_t flag)
9609{
9610 return phba->__lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
9611}
9612
9613/**
25985edc 9614 * lpfc_sli_api_table_setup - Set up sli api function jump table
4f774513
JS
9615 * @phba: The hba struct for which this call is being executed.
9616 * @dev_grp: The HBA PCI-Device group number.
9617 *
9618 * This routine sets up the SLI interface API function jump table in @phba
9619 * struct.
9620 * Returns: 0 - success, -ENODEV - failure.
9621 **/
9622int
9623lpfc_sli_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
9624{
9625
9626 switch (dev_grp) {
9627 case LPFC_PCI_DEV_LP:
9628 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s3;
9629 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s3;
9630 break;
9631 case LPFC_PCI_DEV_OC:
9632 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s4;
9633 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s4;
9634 break;
9635 default:
9636 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9637 "1419 Invalid HBA PCI-device group: 0x%x\n",
9638 dev_grp);
9639 return -ENODEV;
9640 break;
9641 }
9642 phba->lpfc_get_iocb_from_iocbq = lpfc_get_iocb_from_iocbq;
9643 return 0;
9644}
9645
a1efe163 9646/**
895427bd 9647 * lpfc_sli4_calc_ring - Calculates which ring to use
a1efe163 9648 * @phba: Pointer to HBA context object.
a1efe163
JS
9649 * @piocb: Pointer to command iocb.
9650 *
895427bd
JS
9651 * For SLI4 only, FCP IO can deferred to one fo many WQs, based on
9652 * hba_wqidx, thus we need to calculate the corresponding ring.
a1efe163 9653 * Since ABORTS must go on the same WQ of the command they are
895427bd 9654 * aborting, we use command's hba_wqidx.
a1efe163 9655 */
895427bd
JS
9656struct lpfc_sli_ring *
9657lpfc_sli4_calc_ring(struct lpfc_hba *phba, struct lpfc_iocbq *piocb)
9bd2bff5 9658{
895427bd 9659 if (piocb->iocb_flag & (LPFC_IO_FCP | LPFC_USE_FCPWQIDX)) {
8b0dff14 9660 if (!(phba->cfg_fof) ||
895427bd 9661 (!(piocb->iocb_flag & LPFC_IO_FOF))) {
8b0dff14 9662 if (unlikely(!phba->sli4_hba.fcp_wq))
895427bd 9663 return NULL;
8b0dff14 9664 /*
895427bd 9665 * for abort iocb hba_wqidx should already
8b0dff14
JS
9666 * be setup based on what work queue we used.
9667 */
8e036a94 9668 if (!(piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
895427bd 9669 piocb->hba_wqidx =
8b0dff14
JS
9670 lpfc_sli4_scmd_to_wqidx_distr(phba,
9671 piocb->context1);
8e036a94
DK
9672 piocb->hba_wqidx = piocb->hba_wqidx %
9673 phba->cfg_fcp_io_channel;
9674 }
895427bd 9675 return phba->sli4_hba.fcp_wq[piocb->hba_wqidx]->pring;
8b0dff14
JS
9676 } else {
9677 if (unlikely(!phba->sli4_hba.oas_wq))
895427bd
JS
9678 return NULL;
9679 piocb->hba_wqidx = 0;
9680 return phba->sli4_hba.oas_wq->pring;
9bd2bff5 9681 }
895427bd
JS
9682 } else {
9683 if (unlikely(!phba->sli4_hba.els_wq))
9684 return NULL;
9685 piocb->hba_wqidx = 0;
9686 return phba->sli4_hba.els_wq->pring;
9bd2bff5 9687 }
9bd2bff5
JS
9688}
9689
4f774513
JS
9690/**
9691 * lpfc_sli_issue_iocb - Wrapper function for __lpfc_sli_issue_iocb
9692 * @phba: Pointer to HBA context object.
9693 * @pring: Pointer to driver SLI ring object.
9694 * @piocb: Pointer to command iocb.
9695 * @flag: Flag indicating if this command can be put into txq.
9696 *
9697 * lpfc_sli_issue_iocb is a wrapper around __lpfc_sli_issue_iocb
9698 * function. This function gets the hbalock and calls
9699 * __lpfc_sli_issue_iocb function and will return the error returned
9700 * by __lpfc_sli_issue_iocb function. This wrapper is used by
9701 * functions which do not hold hbalock.
9702 **/
9703int
9704lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
9705 struct lpfc_iocbq *piocb, uint32_t flag)
9706{
895427bd 9707 struct lpfc_hba_eq_hdl *hba_eq_hdl;
2a76a283 9708 struct lpfc_sli_ring *pring;
ba20c853
JS
9709 struct lpfc_queue *fpeq;
9710 struct lpfc_eqe *eqe;
4f774513 9711 unsigned long iflags;
2a76a283 9712 int rc, idx;
4f774513 9713
7e56aa25 9714 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
9715 pring = lpfc_sli4_calc_ring(phba, piocb);
9716 if (unlikely(pring == NULL))
9bd2bff5 9717 return IOCB_ERROR;
ba20c853 9718
9bd2bff5
JS
9719 spin_lock_irqsave(&pring->ring_lock, iflags);
9720 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
9721 spin_unlock_irqrestore(&pring->ring_lock, iflags);
ba20c853 9722
9bd2bff5 9723 if (lpfc_fcp_look_ahead && (piocb->iocb_flag & LPFC_IO_FCP)) {
895427bd
JS
9724 idx = piocb->hba_wqidx;
9725 hba_eq_hdl = &phba->sli4_hba.hba_eq_hdl[idx];
4f774513 9726
895427bd 9727 if (atomic_dec_and_test(&hba_eq_hdl->hba_eq_in_use)) {
ba20c853 9728
9bd2bff5
JS
9729 /* Get associated EQ with this index */
9730 fpeq = phba->sli4_hba.hba_eq[idx];
ba20c853 9731
9bd2bff5 9732 /* Turn off interrupts from this EQ */
b71413dd 9733 phba->sli4_hba.sli4_eq_clr_intr(fpeq);
ba20c853 9734
9bd2bff5
JS
9735 /*
9736 * Process all the events on FCP EQ
9737 */
9738 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
9739 lpfc_sli4_hba_handle_eqe(phba,
9740 eqe, idx);
9741 fpeq->EQ_processed++;
ba20c853 9742 }
ba20c853 9743
9bd2bff5 9744 /* Always clear and re-arm the EQ */
b71413dd 9745 phba->sli4_hba.sli4_eq_release(fpeq,
9bd2bff5
JS
9746 LPFC_QUEUE_REARM);
9747 }
895427bd 9748 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
2a76a283 9749 }
7e56aa25
JS
9750 } else {
9751 /* For now, SLI2/3 will still use hbalock */
9752 spin_lock_irqsave(&phba->hbalock, iflags);
9753 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
9754 spin_unlock_irqrestore(&phba->hbalock, iflags);
9755 }
4f774513
JS
9756 return rc;
9757}
9758
9759/**
9760 * lpfc_extra_ring_setup - Extra ring setup function
9761 * @phba: Pointer to HBA context object.
9762 *
9763 * This function is called while driver attaches with the
9764 * HBA to setup the extra ring. The extra ring is used
9765 * only when driver needs to support target mode functionality
9766 * or IP over FC functionalities.
9767 *
895427bd 9768 * This function is called with no lock held. SLI3 only.
4f774513
JS
9769 **/
9770static int
9771lpfc_extra_ring_setup( struct lpfc_hba *phba)
9772{
9773 struct lpfc_sli *psli;
9774 struct lpfc_sli_ring *pring;
9775
9776 psli = &phba->sli;
9777
9778 /* Adjust cmd/rsp ring iocb entries more evenly */
9779
9780 /* Take some away from the FCP ring */
895427bd 9781 pring = &psli->sli3_ring[LPFC_FCP_RING];
7e56aa25
JS
9782 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
9783 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
9784 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
9785 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e 9786
a4bc3379 9787 /* and give them to the extra ring */
895427bd 9788 pring = &psli->sli3_ring[LPFC_EXTRA_RING];
a4bc3379 9789
7e56aa25
JS
9790 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
9791 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
9792 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
9793 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e
JW
9794
9795 /* Setup default profile for this ring */
9796 pring->iotag_max = 4096;
9797 pring->num_mask = 1;
9798 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS
9799 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
9800 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW
9801 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
9802 return 0;
9803}
9804
cb69f7de
JS
9805/* lpfc_sli_abts_err_handler - handle a failed ABTS request from an SLI3 port.
9806 * @phba: Pointer to HBA context object.
9807 * @iocbq: Pointer to iocb object.
9808 *
9809 * The async_event handler calls this routine when it receives
9810 * an ASYNC_STATUS_CN event from the port. The port generates
9811 * this event when an Abort Sequence request to an rport fails
9812 * twice in succession. The abort could be originated by the
9813 * driver or by the port. The ABTS could have been for an ELS
9814 * or FCP IO. The port only generates this event when an ABTS
9815 * fails to complete after one retry.
9816 */
9817static void
9818lpfc_sli_abts_err_handler(struct lpfc_hba *phba,
9819 struct lpfc_iocbq *iocbq)
9820{
9821 struct lpfc_nodelist *ndlp = NULL;
9822 uint16_t rpi = 0, vpi = 0;
9823 struct lpfc_vport *vport = NULL;
9824
9825 /* The rpi in the ulpContext is vport-sensitive. */
9826 vpi = iocbq->iocb.un.asyncstat.sub_ctxt_tag;
9827 rpi = iocbq->iocb.ulpContext;
9828
9829 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9830 "3092 Port generated ABTS async event "
9831 "on vpi %d rpi %d status 0x%x\n",
9832 vpi, rpi, iocbq->iocb.ulpStatus);
9833
9834 vport = lpfc_find_vport_by_vpid(phba, vpi);
9835 if (!vport)
9836 goto err_exit;
9837 ndlp = lpfc_findnode_rpi(vport, rpi);
9838 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp))
9839 goto err_exit;
9840
9841 if (iocbq->iocb.ulpStatus == IOSTAT_LOCAL_REJECT)
9842 lpfc_sli_abts_recover_port(vport, ndlp);
9843 return;
9844
9845 err_exit:
9846 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9847 "3095 Event Context not found, no "
9848 "action on vpi %d rpi %d status 0x%x, reason 0x%x\n",
9849 iocbq->iocb.ulpContext, iocbq->iocb.ulpStatus,
9850 vpi, rpi);
9851}
9852
9853/* lpfc_sli4_abts_err_handler - handle a failed ABTS request from an SLI4 port.
9854 * @phba: pointer to HBA context object.
9855 * @ndlp: nodelist pointer for the impacted rport.
9856 * @axri: pointer to the wcqe containing the failed exchange.
9857 *
9858 * The driver calls this routine when it receives an ABORT_XRI_FCP CQE from the
9859 * port. The port generates this event when an abort exchange request to an
9860 * rport fails twice in succession with no reply. The abort could be originated
9861 * by the driver or by the port. The ABTS could have been for an ELS or FCP IO.
9862 */
9863void
9864lpfc_sli4_abts_err_handler(struct lpfc_hba *phba,
9865 struct lpfc_nodelist *ndlp,
9866 struct sli4_wcqe_xri_aborted *axri)
9867{
9868 struct lpfc_vport *vport;
5c1db2ac 9869 uint32_t ext_status = 0;
cb69f7de 9870
6b5151fd 9871 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) {
cb69f7de
JS
9872 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9873 "3115 Node Context not found, driver "
9874 "ignoring abts err event\n");
6b5151fd
JS
9875 return;
9876 }
9877
cb69f7de
JS
9878 vport = ndlp->vport;
9879 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9880 "3116 Port generated FCP XRI ABORT event on "
5c1db2ac 9881 "vpi %d rpi %d xri x%x status 0x%x parameter x%x\n",
8e668af5 9882 ndlp->vport->vpi, phba->sli4_hba.rpi_ids[ndlp->nlp_rpi],
cb69f7de 9883 bf_get(lpfc_wcqe_xa_xri, axri),
5c1db2ac
JS
9884 bf_get(lpfc_wcqe_xa_status, axri),
9885 axri->parameter);
cb69f7de 9886
5c1db2ac
JS
9887 /*
9888 * Catch the ABTS protocol failure case. Older OCe FW releases returned
9889 * LOCAL_REJECT and 0 for a failed ABTS exchange and later OCe and
9890 * LPe FW releases returned LOCAL_REJECT and SEQUENCE_TIMEOUT.
9891 */
e3d2b802 9892 ext_status = axri->parameter & IOERR_PARAM_MASK;
5c1db2ac
JS
9893 if ((bf_get(lpfc_wcqe_xa_status, axri) == IOSTAT_LOCAL_REJECT) &&
9894 ((ext_status == IOERR_SEQUENCE_TIMEOUT) || (ext_status == 0)))
cb69f7de
JS
9895 lpfc_sli_abts_recover_port(vport, ndlp);
9896}
9897
e59058c4 9898/**
3621a710 9899 * lpfc_sli_async_event_handler - ASYNC iocb handler function
e59058c4
JS
9900 * @phba: Pointer to HBA context object.
9901 * @pring: Pointer to driver SLI ring object.
9902 * @iocbq: Pointer to iocb object.
9903 *
9904 * This function is called by the slow ring event handler
9905 * function when there is an ASYNC event iocb in the ring.
9906 * This function is called with no lock held.
9907 * Currently this function handles only temperature related
9908 * ASYNC events. The function decodes the temperature sensor
9909 * event message and posts events for the management applications.
9910 **/
98c9ea5c 9911static void
57127f15
JS
9912lpfc_sli_async_event_handler(struct lpfc_hba * phba,
9913 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
9914{
9915 IOCB_t *icmd;
9916 uint16_t evt_code;
57127f15
JS
9917 struct temp_event temp_event_data;
9918 struct Scsi_Host *shost;
a257bf90 9919 uint32_t *iocb_w;
57127f15
JS
9920
9921 icmd = &iocbq->iocb;
9922 evt_code = icmd->un.asyncstat.evt_code;
57127f15 9923
cb69f7de
JS
9924 switch (evt_code) {
9925 case ASYNC_TEMP_WARN:
9926 case ASYNC_TEMP_SAFE:
9927 temp_event_data.data = (uint32_t) icmd->ulpContext;
9928 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
9929 if (evt_code == ASYNC_TEMP_WARN) {
9930 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
9931 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
9932 "0347 Adapter is very hot, please take "
9933 "corrective action. temperature : %d Celsius\n",
9934 (uint32_t) icmd->ulpContext);
9935 } else {
9936 temp_event_data.event_code = LPFC_NORMAL_TEMP;
9937 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
9938 "0340 Adapter temperature is OK now. "
9939 "temperature : %d Celsius\n",
9940 (uint32_t) icmd->ulpContext);
9941 }
9942
9943 /* Send temperature change event to applications */
9944 shost = lpfc_shost_from_vport(phba->pport);
9945 fc_host_post_vendor_event(shost, fc_get_event_number(),
9946 sizeof(temp_event_data), (char *) &temp_event_data,
9947 LPFC_NL_VENDOR_ID);
9948 break;
9949 case ASYNC_STATUS_CN:
9950 lpfc_sli_abts_err_handler(phba, iocbq);
9951 break;
9952 default:
a257bf90 9953 iocb_w = (uint32_t *) icmd;
cb69f7de 9954 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
76bb24ef 9955 "0346 Ring %d handler: unexpected ASYNC_STATUS"
e4e74273 9956 " evt_code 0x%x\n"
a257bf90
JS
9957 "W0 0x%08x W1 0x%08x W2 0x%08x W3 0x%08x\n"
9958 "W4 0x%08x W5 0x%08x W6 0x%08x W7 0x%08x\n"
9959 "W8 0x%08x W9 0x%08x W10 0x%08x W11 0x%08x\n"
9960 "W12 0x%08x W13 0x%08x W14 0x%08x W15 0x%08x\n",
cb69f7de 9961 pring->ringno, icmd->un.asyncstat.evt_code,
a257bf90
JS
9962 iocb_w[0], iocb_w[1], iocb_w[2], iocb_w[3],
9963 iocb_w[4], iocb_w[5], iocb_w[6], iocb_w[7],
9964 iocb_w[8], iocb_w[9], iocb_w[10], iocb_w[11],
9965 iocb_w[12], iocb_w[13], iocb_w[14], iocb_w[15]);
9966
cb69f7de 9967 break;
57127f15 9968 }
57127f15
JS
9969}
9970
9971
e59058c4 9972/**
895427bd 9973 * lpfc_sli4_setup - SLI ring setup function
e59058c4
JS
9974 * @phba: Pointer to HBA context object.
9975 *
9976 * lpfc_sli_setup sets up rings of the SLI interface with
9977 * number of iocbs per ring and iotags. This function is
9978 * called while driver attach to the HBA and before the
9979 * interrupts are enabled. So there is no need for locking.
9980 *
9981 * This function always returns 0.
9982 **/
dea3101e 9983int
895427bd
JS
9984lpfc_sli4_setup(struct lpfc_hba *phba)
9985{
9986 struct lpfc_sli_ring *pring;
9987
9988 pring = phba->sli4_hba.els_wq->pring;
9989 pring->num_mask = LPFC_MAX_RING_MASK;
9990 pring->prt[0].profile = 0; /* Mask 0 */
9991 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
9992 pring->prt[0].type = FC_TYPE_ELS;
9993 pring->prt[0].lpfc_sli_rcv_unsol_event =
9994 lpfc_els_unsol_event;
9995 pring->prt[1].profile = 0; /* Mask 1 */
9996 pring->prt[1].rctl = FC_RCTL_ELS_REP;
9997 pring->prt[1].type = FC_TYPE_ELS;
9998 pring->prt[1].lpfc_sli_rcv_unsol_event =
9999 lpfc_els_unsol_event;
10000 pring->prt[2].profile = 0; /* Mask 2 */
10001 /* NameServer Inquiry */
10002 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
10003 /* NameServer */
10004 pring->prt[2].type = FC_TYPE_CT;
10005 pring->prt[2].lpfc_sli_rcv_unsol_event =
10006 lpfc_ct_unsol_event;
10007 pring->prt[3].profile = 0; /* Mask 3 */
10008 /* NameServer response */
10009 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
10010 /* NameServer */
10011 pring->prt[3].type = FC_TYPE_CT;
10012 pring->prt[3].lpfc_sli_rcv_unsol_event =
10013 lpfc_ct_unsol_event;
10014 return 0;
10015}
10016
10017/**
10018 * lpfc_sli_setup - SLI ring setup function
10019 * @phba: Pointer to HBA context object.
10020 *
10021 * lpfc_sli_setup sets up rings of the SLI interface with
10022 * number of iocbs per ring and iotags. This function is
10023 * called while driver attach to the HBA and before the
10024 * interrupts are enabled. So there is no need for locking.
10025 *
10026 * This function always returns 0. SLI3 only.
10027 **/
10028int
dea3101e
JB
10029lpfc_sli_setup(struct lpfc_hba *phba)
10030{
ed957684 10031 int i, totiocbsize = 0;
dea3101e
JB
10032 struct lpfc_sli *psli = &phba->sli;
10033 struct lpfc_sli_ring *pring;
10034
2a76a283 10035 psli->num_rings = MAX_SLI3_CONFIGURED_RINGS;
dea3101e 10036 psli->sli_flag = 0;
dea3101e 10037
604a3e30
JB
10038 psli->iocbq_lookup = NULL;
10039 psli->iocbq_lookup_len = 0;
10040 psli->last_iotag = 0;
10041
dea3101e 10042 for (i = 0; i < psli->num_rings; i++) {
895427bd 10043 pring = &psli->sli3_ring[i];
dea3101e
JB
10044 switch (i) {
10045 case LPFC_FCP_RING: /* ring 0 - FCP */
10046 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10047 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
10048 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
10049 pring->sli.sli3.numCiocb +=
10050 SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10051 pring->sli.sli3.numRiocb +=
10052 SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10053 pring->sli.sli3.numCiocb +=
10054 SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10055 pring->sli.sli3.numRiocb +=
10056 SLI2_IOCB_RSP_R3XTRA_ENTRIES;
10057 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10058 SLI3_IOCB_CMD_SIZE :
10059 SLI2_IOCB_CMD_SIZE;
7e56aa25 10060 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10061 SLI3_IOCB_RSP_SIZE :
10062 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10063 pring->iotag_ctr = 0;
10064 pring->iotag_max =
92d7f7b0 10065 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB
10066 pring->fast_iotag = pring->iotag_max;
10067 pring->num_mask = 0;
10068 break;
a4bc3379 10069 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e 10070 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10071 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
10072 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
10073 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10074 SLI3_IOCB_CMD_SIZE :
10075 SLI2_IOCB_CMD_SIZE;
7e56aa25 10076 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10077 SLI3_IOCB_RSP_SIZE :
10078 SLI2_IOCB_RSP_SIZE;
2e0fef85 10079 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB
10080 pring->num_mask = 0;
10081 break;
10082 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
10083 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10084 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
10085 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
10086 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10087 SLI3_IOCB_CMD_SIZE :
10088 SLI2_IOCB_CMD_SIZE;
7e56aa25 10089 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10090 SLI3_IOCB_RSP_SIZE :
10091 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10092 pring->fast_iotag = 0;
10093 pring->iotag_ctr = 0;
10094 pring->iotag_max = 4096;
57127f15
JS
10095 pring->lpfc_sli_rcv_async_status =
10096 lpfc_sli_async_event_handler;
6669f9bb 10097 pring->num_mask = LPFC_MAX_RING_MASK;
dea3101e 10098 pring->prt[0].profile = 0; /* Mask 0 */
6a9c52cf
JS
10099 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10100 pring->prt[0].type = FC_TYPE_ELS;
dea3101e 10101 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 10102 lpfc_els_unsol_event;
dea3101e 10103 pring->prt[1].profile = 0; /* Mask 1 */
6a9c52cf
JS
10104 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10105 pring->prt[1].type = FC_TYPE_ELS;
dea3101e 10106 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 10107 lpfc_els_unsol_event;
dea3101e
JB
10108 pring->prt[2].profile = 0; /* Mask 2 */
10109 /* NameServer Inquiry */
6a9c52cf 10110 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
dea3101e 10111 /* NameServer */
6a9c52cf 10112 pring->prt[2].type = FC_TYPE_CT;
dea3101e 10113 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 10114 lpfc_ct_unsol_event;
dea3101e
JB
10115 pring->prt[3].profile = 0; /* Mask 3 */
10116 /* NameServer response */
6a9c52cf 10117 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
dea3101e 10118 /* NameServer */
6a9c52cf 10119 pring->prt[3].type = FC_TYPE_CT;
dea3101e 10120 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 10121 lpfc_ct_unsol_event;
dea3101e
JB
10122 break;
10123 }
7e56aa25
JS
10124 totiocbsize += (pring->sli.sli3.numCiocb *
10125 pring->sli.sli3.sizeCiocb) +
10126 (pring->sli.sli3.numRiocb * pring->sli.sli3.sizeRiocb);
dea3101e 10127 }
ed957684 10128 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 10129 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS
10130 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
10131 "SLI2 SLIM Data: x%x x%lx\n",
10132 phba->brd_no, totiocbsize,
10133 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 10134 }
cf5bf97e
JW
10135 if (phba->cfg_multi_ring_support == 2)
10136 lpfc_extra_ring_setup(phba);
dea3101e
JB
10137
10138 return 0;
10139}
10140
e59058c4 10141/**
895427bd 10142 * lpfc_sli4_queue_init - Queue initialization function
e59058c4
JS
10143 * @phba: Pointer to HBA context object.
10144 *
895427bd 10145 * lpfc_sli4_queue_init sets up mailbox queues and iocb queues for each
e59058c4
JS
10146 * ring. This function also initializes ring indices of each ring.
10147 * This function is called during the initialization of the SLI
10148 * interface of an HBA.
10149 * This function is called with no lock held and always returns
10150 * 1.
10151 **/
895427bd
JS
10152void
10153lpfc_sli4_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10154{
10155 struct lpfc_sli *psli;
10156 struct lpfc_sli_ring *pring;
604a3e30 10157 int i;
dea3101e
JB
10158
10159 psli = &phba->sli;
2e0fef85 10160 spin_lock_irq(&phba->hbalock);
dea3101e 10161 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10162 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e 10163 /* Initialize list headers for txq and txcmplq as double linked lists */
895427bd
JS
10164 for (i = 0; i < phba->cfg_fcp_io_channel; i++) {
10165 pring = phba->sli4_hba.fcp_wq[i]->pring;
68e814f5 10166 pring->flag = 0;
895427bd 10167 pring->ringno = LPFC_FCP_RING;
dea3101e
JB
10168 INIT_LIST_HEAD(&pring->txq);
10169 INIT_LIST_HEAD(&pring->txcmplq);
10170 INIT_LIST_HEAD(&pring->iocb_continueq);
7e56aa25 10171 spin_lock_init(&pring->ring_lock);
dea3101e 10172 }
895427bd
JS
10173 for (i = 0; i < phba->cfg_nvme_io_channel; i++) {
10174 pring = phba->sli4_hba.nvme_wq[i]->pring;
10175 pring->flag = 0;
10176 pring->ringno = LPFC_FCP_RING;
10177 INIT_LIST_HEAD(&pring->txq);
10178 INIT_LIST_HEAD(&pring->txcmplq);
10179 INIT_LIST_HEAD(&pring->iocb_continueq);
10180 spin_lock_init(&pring->ring_lock);
10181 }
10182 pring = phba->sli4_hba.els_wq->pring;
10183 pring->flag = 0;
10184 pring->ringno = LPFC_ELS_RING;
10185 INIT_LIST_HEAD(&pring->txq);
10186 INIT_LIST_HEAD(&pring->txcmplq);
10187 INIT_LIST_HEAD(&pring->iocb_continueq);
10188 spin_lock_init(&pring->ring_lock);
dea3101e 10189
895427bd
JS
10190 if (phba->cfg_nvme_io_channel) {
10191 pring = phba->sli4_hba.nvmels_wq->pring;
10192 pring->flag = 0;
10193 pring->ringno = LPFC_ELS_RING;
10194 INIT_LIST_HEAD(&pring->txq);
10195 INIT_LIST_HEAD(&pring->txcmplq);
10196 INIT_LIST_HEAD(&pring->iocb_continueq);
10197 spin_lock_init(&pring->ring_lock);
10198 }
10199
10200 if (phba->cfg_fof) {
10201 pring = phba->sli4_hba.oas_wq->pring;
10202 pring->flag = 0;
10203 pring->ringno = LPFC_FCP_RING;
10204 INIT_LIST_HEAD(&pring->txq);
10205 INIT_LIST_HEAD(&pring->txcmplq);
10206 INIT_LIST_HEAD(&pring->iocb_continueq);
10207 spin_lock_init(&pring->ring_lock);
10208 }
10209
10210 spin_unlock_irq(&phba->hbalock);
10211}
10212
10213/**
10214 * lpfc_sli_queue_init - Queue initialization function
10215 * @phba: Pointer to HBA context object.
10216 *
10217 * lpfc_sli_queue_init sets up mailbox queues and iocb queues for each
10218 * ring. This function also initializes ring indices of each ring.
10219 * This function is called during the initialization of the SLI
10220 * interface of an HBA.
10221 * This function is called with no lock held and always returns
10222 * 1.
10223 **/
10224void
10225lpfc_sli_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10226{
10227 struct lpfc_sli *psli;
10228 struct lpfc_sli_ring *pring;
604a3e30 10229 int i;
dea3101e
JB
10230
10231 psli = &phba->sli;
2e0fef85 10232 spin_lock_irq(&phba->hbalock);
dea3101e 10233 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10234 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB
10235 /* Initialize list headers for txq and txcmplq as double linked lists */
10236 for (i = 0; i < psli->num_rings; i++) {
895427bd 10237 pring = &psli->sli3_ring[i];
dea3101e 10238 pring->ringno = i;
7e56aa25
JS
10239 pring->sli.sli3.next_cmdidx = 0;
10240 pring->sli.sli3.local_getidx = 0;
10241 pring->sli.sli3.cmdidx = 0;
dea3101e 10242 INIT_LIST_HEAD(&pring->iocb_continueq);
9c2face6 10243 INIT_LIST_HEAD(&pring->iocb_continue_saveq);
dea3101e 10244 INIT_LIST_HEAD(&pring->postbufq);
895427bd
JS
10245 pring->flag = 0;
10246 INIT_LIST_HEAD(&pring->txq);
10247 INIT_LIST_HEAD(&pring->txcmplq);
7e56aa25 10248 spin_lock_init(&pring->ring_lock);
dea3101e 10249 }
2e0fef85 10250 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10251}
10252
04c68496
JS
10253/**
10254 * lpfc_sli_mbox_sys_flush - Flush mailbox command sub-system
10255 * @phba: Pointer to HBA context object.
10256 *
10257 * This routine flushes the mailbox command subsystem. It will unconditionally
10258 * flush all the mailbox commands in the three possible stages in the mailbox
10259 * command sub-system: pending mailbox command queue; the outstanding mailbox
10260 * command; and completed mailbox command queue. It is caller's responsibility
10261 * to make sure that the driver is in the proper state to flush the mailbox
10262 * command sub-system. Namely, the posting of mailbox commands into the
10263 * pending mailbox command queue from the various clients must be stopped;
10264 * either the HBA is in a state that it will never works on the outstanding
10265 * mailbox command (such as in EEH or ERATT conditions) or the outstanding
10266 * mailbox command has been completed.
10267 **/
10268static void
10269lpfc_sli_mbox_sys_flush(struct lpfc_hba *phba)
10270{
10271 LIST_HEAD(completions);
10272 struct lpfc_sli *psli = &phba->sli;
10273 LPFC_MBOXQ_t *pmb;
10274 unsigned long iflag;
10275
523128e5
JS
10276 /* Disable softirqs, including timers from obtaining phba->hbalock */
10277 local_bh_disable();
10278
04c68496
JS
10279 /* Flush all the mailbox commands in the mbox system */
10280 spin_lock_irqsave(&phba->hbalock, iflag);
523128e5 10281
04c68496
JS
10282 /* The pending mailbox command queue */
10283 list_splice_init(&phba->sli.mboxq, &completions);
10284 /* The outstanding active mailbox command */
10285 if (psli->mbox_active) {
10286 list_add_tail(&psli->mbox_active->list, &completions);
10287 psli->mbox_active = NULL;
10288 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10289 }
10290 /* The completed mailbox command queue */
10291 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
10292 spin_unlock_irqrestore(&phba->hbalock, iflag);
10293
523128e5
JS
10294 /* Enable softirqs again, done with phba->hbalock */
10295 local_bh_enable();
10296
04c68496
JS
10297 /* Return all flushed mailbox commands with MBX_NOT_FINISHED status */
10298 while (!list_empty(&completions)) {
10299 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
10300 pmb->u.mb.mbxStatus = MBX_NOT_FINISHED;
10301 if (pmb->mbox_cmpl)
10302 pmb->mbox_cmpl(phba, pmb);
10303 }
10304}
10305
e59058c4 10306/**
3621a710 10307 * lpfc_sli_host_down - Vport cleanup function
e59058c4
JS
10308 * @vport: Pointer to virtual port object.
10309 *
10310 * lpfc_sli_host_down is called to clean up the resources
10311 * associated with a vport before destroying virtual
10312 * port data structures.
10313 * This function does following operations:
10314 * - Free discovery resources associated with this virtual
10315 * port.
10316 * - Free iocbs associated with this virtual port in
10317 * the txq.
10318 * - Send abort for all iocb commands associated with this
10319 * vport in txcmplq.
10320 *
10321 * This function is called with no lock held and always returns 1.
10322 **/
92d7f7b0
JS
10323int
10324lpfc_sli_host_down(struct lpfc_vport *vport)
10325{
858c9f6c 10326 LIST_HEAD(completions);
92d7f7b0
JS
10327 struct lpfc_hba *phba = vport->phba;
10328 struct lpfc_sli *psli = &phba->sli;
895427bd 10329 struct lpfc_queue *qp = NULL;
92d7f7b0
JS
10330 struct lpfc_sli_ring *pring;
10331 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS
10332 int i;
10333 unsigned long flags = 0;
10334 uint16_t prev_pring_flag;
10335
10336 lpfc_cleanup_discovery_resources(vport);
10337
10338 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0 10339
895427bd
JS
10340 /*
10341 * Error everything on the txq since these iocbs
10342 * have not been given to the FW yet.
10343 * Also issue ABTS for everything on the txcmplq
10344 */
10345 if (phba->sli_rev != LPFC_SLI_REV4) {
10346 for (i = 0; i < psli->num_rings; i++) {
10347 pring = &psli->sli3_ring[i];
10348 prev_pring_flag = pring->flag;
10349 /* Only slow rings */
10350 if (pring->ringno == LPFC_ELS_RING) {
10351 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10352 /* Set the lpfc data pending flag */
10353 set_bit(LPFC_DATA_READY, &phba->data_flags);
10354 }
10355 list_for_each_entry_safe(iocb, next_iocb,
10356 &pring->txq, list) {
10357 if (iocb->vport != vport)
10358 continue;
10359 list_move_tail(&iocb->list, &completions);
10360 }
10361 list_for_each_entry_safe(iocb, next_iocb,
10362 &pring->txcmplq, list) {
10363 if (iocb->vport != vport)
10364 continue;
10365 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10366 }
10367 pring->flag = prev_pring_flag;
10368 }
10369 } else {
10370 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10371 pring = qp->pring;
10372 if (!pring)
92d7f7b0 10373 continue;
895427bd
JS
10374 if (pring == phba->sli4_hba.els_wq->pring) {
10375 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10376 /* Set the lpfc data pending flag */
10377 set_bit(LPFC_DATA_READY, &phba->data_flags);
10378 }
10379 prev_pring_flag = pring->flag;
10380 spin_lock_irq(&pring->ring_lock);
10381 list_for_each_entry_safe(iocb, next_iocb,
10382 &pring->txq, list) {
10383 if (iocb->vport != vport)
10384 continue;
10385 list_move_tail(&iocb->list, &completions);
10386 }
10387 spin_unlock_irq(&pring->ring_lock);
10388 list_for_each_entry_safe(iocb, next_iocb,
10389 &pring->txcmplq, list) {
10390 if (iocb->vport != vport)
10391 continue;
10392 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10393 }
10394 pring->flag = prev_pring_flag;
92d7f7b0 10395 }
92d7f7b0 10396 }
92d7f7b0
JS
10397 spin_unlock_irqrestore(&phba->hbalock, flags);
10398
a257bf90
JS
10399 /* Cancel all the IOCBs from the completions list */
10400 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10401 IOERR_SLI_DOWN);
92d7f7b0
JS
10402 return 1;
10403}
10404
e59058c4 10405/**
3621a710 10406 * lpfc_sli_hba_down - Resource cleanup function for the HBA
e59058c4
JS
10407 * @phba: Pointer to HBA context object.
10408 *
10409 * This function cleans up all iocb, buffers, mailbox commands
10410 * while shutting down the HBA. This function is called with no
10411 * lock held and always returns 1.
10412 * This function does the following to cleanup driver resources:
10413 * - Free discovery resources for each virtual port
10414 * - Cleanup any pending fabric iocbs
10415 * - Iterate through the iocb txq and free each entry
10416 * in the list.
10417 * - Free up any buffer posted to the HBA
10418 * - Free mailbox commands in the mailbox queue.
10419 **/
dea3101e 10420int
2e0fef85 10421lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 10422{
2534ba75 10423 LIST_HEAD(completions);
2e0fef85 10424 struct lpfc_sli *psli = &phba->sli;
895427bd 10425 struct lpfc_queue *qp = NULL;
dea3101e 10426 struct lpfc_sli_ring *pring;
0ff10d46 10427 struct lpfc_dmabuf *buf_ptr;
dea3101e 10428 unsigned long flags = 0;
04c68496
JS
10429 int i;
10430
10431 /* Shutdown the mailbox command sub-system */
618a5230 10432 lpfc_sli_mbox_sys_shutdown(phba, LPFC_MBX_WAIT);
dea3101e 10433
dea3101e
JB
10434 lpfc_hba_down_prep(phba);
10435
523128e5
JS
10436 /* Disable softirqs, including timers from obtaining phba->hbalock */
10437 local_bh_disable();
10438
92d7f7b0
JS
10439 lpfc_fabric_abort_hba(phba);
10440
2e0fef85 10441 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e 10442
895427bd
JS
10443 /*
10444 * Error everything on the txq since these iocbs
10445 * have not been given to the FW yet.
10446 */
10447 if (phba->sli_rev != LPFC_SLI_REV4) {
10448 for (i = 0; i < psli->num_rings; i++) {
10449 pring = &psli->sli3_ring[i];
10450 /* Only slow rings */
10451 if (pring->ringno == LPFC_ELS_RING) {
10452 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10453 /* Set the lpfc data pending flag */
10454 set_bit(LPFC_DATA_READY, &phba->data_flags);
10455 }
10456 list_splice_init(&pring->txq, &completions);
10457 }
10458 } else {
10459 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10460 pring = qp->pring;
10461 if (!pring)
10462 continue;
10463 spin_lock_irq(&pring->ring_lock);
10464 list_splice_init(&pring->txq, &completions);
10465 spin_unlock_irq(&pring->ring_lock);
10466 if (pring == phba->sli4_hba.els_wq->pring) {
10467 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10468 /* Set the lpfc data pending flag */
10469 set_bit(LPFC_DATA_READY, &phba->data_flags);
10470 }
10471 }
2534ba75 10472 }
2e0fef85 10473 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 10474
a257bf90
JS
10475 /* Cancel all the IOCBs from the completions list */
10476 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10477 IOERR_SLI_DOWN);
dea3101e 10478
0ff10d46
JS
10479 spin_lock_irqsave(&phba->hbalock, flags);
10480 list_splice_init(&phba->elsbuf, &completions);
10481 phba->elsbuf_cnt = 0;
10482 phba->elsbuf_prev_cnt = 0;
10483 spin_unlock_irqrestore(&phba->hbalock, flags);
10484
10485 while (!list_empty(&completions)) {
10486 list_remove_head(&completions, buf_ptr,
10487 struct lpfc_dmabuf, list);
10488 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
10489 kfree(buf_ptr);
10490 }
10491
523128e5
JS
10492 /* Enable softirqs again, done with phba->hbalock */
10493 local_bh_enable();
10494
dea3101e
JB
10495 /* Return any active mbox cmds */
10496 del_timer_sync(&psli->mbox_tmo);
2e0fef85 10497
da0436e9 10498 spin_lock_irqsave(&phba->pport->work_port_lock, flags);
2e0fef85 10499 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
da0436e9 10500 spin_unlock_irqrestore(&phba->pport->work_port_lock, flags);
2e0fef85 10501
da0436e9
JS
10502 return 1;
10503}
10504
e59058c4 10505/**
3621a710 10506 * lpfc_sli_pcimem_bcopy - SLI memory copy function
e59058c4
JS
10507 * @srcp: Source memory pointer.
10508 * @destp: Destination memory pointer.
10509 * @cnt: Number of words required to be copied.
10510 *
10511 * This function is used for copying data between driver memory
10512 * and the SLI memory. This function also changes the endianness
10513 * of each word if native endianness is different from SLI
10514 * endianness. This function can be called with or without
10515 * lock.
10516 **/
dea3101e
JB
10517void
10518lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
10519{
10520 uint32_t *src = srcp;
10521 uint32_t *dest = destp;
10522 uint32_t ldata;
10523 int i;
10524
10525 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
10526 ldata = *src;
10527 ldata = le32_to_cpu(ldata);
10528 *dest = ldata;
10529 src++;
10530 dest++;
10531 }
10532}
10533
e59058c4 10534
a0c87cbd
JS
10535/**
10536 * lpfc_sli_bemem_bcopy - SLI memory copy function
10537 * @srcp: Source memory pointer.
10538 * @destp: Destination memory pointer.
10539 * @cnt: Number of words required to be copied.
10540 *
10541 * This function is used for copying data between a data structure
10542 * with big endian representation to local endianness.
10543 * This function can be called with or without lock.
10544 **/
10545void
10546lpfc_sli_bemem_bcopy(void *srcp, void *destp, uint32_t cnt)
10547{
10548 uint32_t *src = srcp;
10549 uint32_t *dest = destp;
10550 uint32_t ldata;
10551 int i;
10552
10553 for (i = 0; i < (int)cnt; i += sizeof(uint32_t)) {
10554 ldata = *src;
10555 ldata = be32_to_cpu(ldata);
10556 *dest = ldata;
10557 src++;
10558 dest++;
10559 }
10560}
10561
e59058c4 10562/**
3621a710 10563 * lpfc_sli_ringpostbuf_put - Function to add a buffer to postbufq
e59058c4
JS
10564 * @phba: Pointer to HBA context object.
10565 * @pring: Pointer to driver SLI ring object.
10566 * @mp: Pointer to driver buffer object.
10567 *
10568 * This function is called with no lock held.
10569 * It always return zero after adding the buffer to the postbufq
10570 * buffer list.
10571 **/
dea3101e 10572int
2e0fef85
JS
10573lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10574 struct lpfc_dmabuf *mp)
dea3101e
JB
10575{
10576 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
10577 later */
2e0fef85 10578 spin_lock_irq(&phba->hbalock);
dea3101e 10579 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 10580 pring->postbufq_cnt++;
2e0fef85 10581 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10582 return 0;
10583}
10584
e59058c4 10585/**
3621a710 10586 * lpfc_sli_get_buffer_tag - allocates a tag for a CMD_QUE_XRI64_CX buffer
e59058c4
JS
10587 * @phba: Pointer to HBA context object.
10588 *
10589 * When HBQ is enabled, buffers are searched based on tags. This function
10590 * allocates a tag for buffer posted using CMD_QUE_XRI64_CX iocb. The
10591 * tag is bit wise or-ed with QUE_BUFTAG_BIT to make sure that the tag
10592 * does not conflict with tags of buffer posted for unsolicited events.
10593 * The function returns the allocated tag. The function is called with
10594 * no locks held.
10595 **/
76bb24ef
JS
10596uint32_t
10597lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
10598{
10599 spin_lock_irq(&phba->hbalock);
10600 phba->buffer_tag_count++;
10601 /*
10602 * Always set the QUE_BUFTAG_BIT to distiguish between
10603 * a tag assigned by HBQ.
10604 */
10605 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
10606 spin_unlock_irq(&phba->hbalock);
10607 return phba->buffer_tag_count;
10608}
10609
e59058c4 10610/**
3621a710 10611 * lpfc_sli_ring_taggedbuf_get - find HBQ buffer associated with given tag
e59058c4
JS
10612 * @phba: Pointer to HBA context object.
10613 * @pring: Pointer to driver SLI ring object.
10614 * @tag: Buffer tag.
10615 *
10616 * Buffers posted using CMD_QUE_XRI64_CX iocb are in pring->postbufq
10617 * list. After HBA DMA data to these buffers, CMD_IOCB_RET_XRI64_CX
10618 * iocb is posted to the response ring with the tag of the buffer.
10619 * This function searches the pring->postbufq list using the tag
10620 * to find buffer associated with CMD_IOCB_RET_XRI64_CX
10621 * iocb. If the buffer is found then lpfc_dmabuf object of the
10622 * buffer is returned to the caller else NULL is returned.
10623 * This function is called with no lock held.
10624 **/
76bb24ef
JS
10625struct lpfc_dmabuf *
10626lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10627 uint32_t tag)
10628{
10629 struct lpfc_dmabuf *mp, *next_mp;
10630 struct list_head *slp = &pring->postbufq;
10631
25985edc 10632 /* Search postbufq, from the beginning, looking for a match on tag */
76bb24ef
JS
10633 spin_lock_irq(&phba->hbalock);
10634 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
10635 if (mp->buffer_tag == tag) {
10636 list_del_init(&mp->list);
10637 pring->postbufq_cnt--;
10638 spin_unlock_irq(&phba->hbalock);
10639 return mp;
10640 }
10641 }
10642
10643 spin_unlock_irq(&phba->hbalock);
10644 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 10645 "0402 Cannot find virtual addr for buffer tag on "
76bb24ef
JS
10646 "ring %d Data x%lx x%p x%p x%x\n",
10647 pring->ringno, (unsigned long) tag,
10648 slp->next, slp->prev, pring->postbufq_cnt);
10649
10650 return NULL;
10651}
dea3101e 10652
e59058c4 10653/**
3621a710 10654 * lpfc_sli_ringpostbuf_get - search buffers for unsolicited CT and ELS events
e59058c4
JS
10655 * @phba: Pointer to HBA context object.
10656 * @pring: Pointer to driver SLI ring object.
10657 * @phys: DMA address of the buffer.
10658 *
10659 * This function searches the buffer list using the dma_address
10660 * of unsolicited event to find the driver's lpfc_dmabuf object
10661 * corresponding to the dma_address. The function returns the
10662 * lpfc_dmabuf object if a buffer is found else it returns NULL.
10663 * This function is called by the ct and els unsolicited event
10664 * handlers to get the buffer associated with the unsolicited
10665 * event.
10666 *
10667 * This function is called with no lock held.
10668 **/
dea3101e
JB
10669struct lpfc_dmabuf *
10670lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10671 dma_addr_t phys)
10672{
10673 struct lpfc_dmabuf *mp, *next_mp;
10674 struct list_head *slp = &pring->postbufq;
10675
25985edc 10676 /* Search postbufq, from the beginning, looking for a match on phys */
2e0fef85 10677 spin_lock_irq(&phba->hbalock);
dea3101e
JB
10678 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
10679 if (mp->phys == phys) {
10680 list_del_init(&mp->list);
10681 pring->postbufq_cnt--;
2e0fef85 10682 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10683 return mp;
10684 }
10685 }
10686
2e0fef85 10687 spin_unlock_irq(&phba->hbalock);
dea3101e 10688 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 10689 "0410 Cannot find virtual addr for mapped buf on "
dea3101e 10690 "ring %d Data x%llx x%p x%p x%x\n",
e8b62011 10691 pring->ringno, (unsigned long long)phys,
dea3101e
JB
10692 slp->next, slp->prev, pring->postbufq_cnt);
10693 return NULL;
10694}
10695
e59058c4 10696/**
3621a710 10697 * lpfc_sli_abort_els_cmpl - Completion handler for the els abort iocbs
e59058c4
JS
10698 * @phba: Pointer to HBA context object.
10699 * @cmdiocb: Pointer to driver command iocb object.
10700 * @rspiocb: Pointer to driver response iocb object.
10701 *
10702 * This function is the completion handler for the abort iocbs for
10703 * ELS commands. This function is called from the ELS ring event
10704 * handler with no lock held. This function frees memory resources
10705 * associated with the abort iocb.
10706 **/
dea3101e 10707static void
2e0fef85
JS
10708lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
10709 struct lpfc_iocbq *rspiocb)
dea3101e 10710{
2e0fef85 10711 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 10712 uint16_t abort_iotag, abort_context;
ff78d8f9 10713 struct lpfc_iocbq *abort_iocb = NULL;
2680eeaa
JS
10714
10715 if (irsp->ulpStatus) {
ff78d8f9
JS
10716
10717 /*
10718 * Assume that the port already completed and returned, or
10719 * will return the iocb. Just Log the message.
10720 */
2680eeaa
JS
10721 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
10722 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
10723
2e0fef85 10724 spin_lock_irq(&phba->hbalock);
45ed1190 10725 if (phba->sli_rev < LPFC_SLI_REV4) {
faa832e9
JS
10726 if (irsp->ulpCommand == CMD_ABORT_XRI_CX &&
10727 irsp->ulpStatus == IOSTAT_LOCAL_REJECT &&
10728 irsp->un.ulpWord[4] == IOERR_ABORT_REQUESTED) {
10729 spin_unlock_irq(&phba->hbalock);
10730 goto release_iocb;
10731 }
45ed1190
JS
10732 if (abort_iotag != 0 &&
10733 abort_iotag <= phba->sli.last_iotag)
10734 abort_iocb =
10735 phba->sli.iocbq_lookup[abort_iotag];
10736 } else
10737 /* For sli4 the abort_tag is the XRI,
10738 * so the abort routine puts the iotag of the iocb
10739 * being aborted in the context field of the abort
10740 * IOCB.
10741 */
10742 abort_iocb = phba->sli.iocbq_lookup[abort_context];
2680eeaa 10743
2a9bf3d0
JS
10744 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS | LOG_SLI,
10745 "0327 Cannot abort els iocb %p "
10746 "with tag %x context %x, abort status %x, "
10747 "abort code %x\n",
10748 abort_iocb, abort_iotag, abort_context,
10749 irsp->ulpStatus, irsp->un.ulpWord[4]);
341af102 10750
ff78d8f9 10751 spin_unlock_irq(&phba->hbalock);
2680eeaa 10752 }
faa832e9 10753release_iocb:
604a3e30 10754 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB
10755 return;
10756}
10757
e59058c4 10758/**
3621a710 10759 * lpfc_ignore_els_cmpl - Completion handler for aborted ELS command
e59058c4
JS
10760 * @phba: Pointer to HBA context object.
10761 * @cmdiocb: Pointer to driver command iocb object.
10762 * @rspiocb: Pointer to driver response iocb object.
10763 *
10764 * The function is called from SLI ring event handler with no
10765 * lock held. This function is the completion handler for ELS commands
10766 * which are aborted. The function frees memory resources used for
10767 * the aborted ELS commands.
10768 **/
92d7f7b0
JS
10769static void
10770lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
10771 struct lpfc_iocbq *rspiocb)
10772{
10773 IOCB_t *irsp = &rspiocb->iocb;
10774
10775 /* ELS cmd tag <ulpIoTag> completes */
10776 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
d7c255b2 10777 "0139 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 10778 "x%x x%x x%x\n",
e8b62011 10779 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 10780 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS
10781 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
10782 lpfc_ct_free_iocb(phba, cmdiocb);
10783 else
10784 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS
10785 return;
10786}
10787
e59058c4 10788/**
5af5eee7 10789 * lpfc_sli_abort_iotag_issue - Issue abort for a command iocb
e59058c4
JS
10790 * @phba: Pointer to HBA context object.
10791 * @pring: Pointer to driver SLI ring object.
10792 * @cmdiocb: Pointer to driver command iocb object.
10793 *
5af5eee7
JS
10794 * This function issues an abort iocb for the provided command iocb down to
10795 * the port. Other than the case the outstanding command iocb is an abort
10796 * request, this function issues abort out unconditionally. This function is
10797 * called with hbalock held. The function returns 0 when it fails due to
10798 * memory allocation failure or when the command iocb is an abort request.
e59058c4 10799 **/
5af5eee7
JS
10800static int
10801lpfc_sli_abort_iotag_issue(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 10802 struct lpfc_iocbq *cmdiocb)
dea3101e 10803{
2e0fef85 10804 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 10805 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB
10806 IOCB_t *icmd = NULL;
10807 IOCB_t *iabt = NULL;
5af5eee7 10808 int retval;
7e56aa25 10809 unsigned long iflags;
faa832e9 10810 struct lpfc_nodelist *ndlp;
07951076 10811
1c2ba475
JT
10812 lockdep_assert_held(&phba->hbalock);
10813
92d7f7b0
JS
10814 /*
10815 * There are certain command types we don't want to abort. And we
10816 * don't want to abort commands that are already in the process of
10817 * being aborted.
07951076
JS
10818 */
10819 icmd = &cmdiocb->iocb;
2e0fef85 10820 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS
10821 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
10822 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS
10823 return 0;
10824
dea3101e 10825 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 10826 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
10827 if (abtsiocbp == NULL)
10828 return 0;
dea3101e 10829
07951076 10830 /* This signals the response to set the correct status
341af102 10831 * before calling the completion handler
07951076
JS
10832 */
10833 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
10834
dea3101e 10835 iabt = &abtsiocbp->iocb;
07951076
JS
10836 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
10837 iabt->un.acxri.abortContextTag = icmd->ulpContext;
45ed1190 10838 if (phba->sli_rev == LPFC_SLI_REV4) {
da0436e9 10839 iabt->un.acxri.abortIoTag = cmdiocb->sli4_xritag;
45ed1190 10840 iabt->un.acxri.abortContextTag = cmdiocb->iotag;
faa832e9 10841 } else {
da0436e9 10842 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
faa832e9
JS
10843 if (pring->ringno == LPFC_ELS_RING) {
10844 ndlp = (struct lpfc_nodelist *)(cmdiocb->context1);
10845 iabt->un.acxri.abortContextTag = ndlp->nlp_rpi;
10846 }
10847 }
07951076
JS
10848 iabt->ulpLe = 1;
10849 iabt->ulpClass = icmd->ulpClass;
dea3101e 10850
5ffc266e 10851 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 10852 abtsiocbp->hba_wqidx = cmdiocb->hba_wqidx;
341af102
JS
10853 if (cmdiocb->iocb_flag & LPFC_IO_FCP)
10854 abtsiocbp->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
10855 if (cmdiocb->iocb_flag & LPFC_IO_FOF)
10856 abtsiocbp->iocb_flag |= LPFC_IO_FOF;
5ffc266e 10857
2e0fef85 10858 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS
10859 iabt->ulpCommand = CMD_ABORT_XRI_CN;
10860 else
10861 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 10862
07951076 10863 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
e6c6acc0 10864 abtsiocbp->vport = vport;
5b8bd0c9 10865
e8b62011
JS
10866 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
10867 "0339 Abort xri x%x, original iotag x%x, "
10868 "abort cmd iotag x%x\n",
2a9bf3d0 10869 iabt->un.acxri.abortIoTag,
e8b62011 10870 iabt->un.acxri.abortContextTag,
2a9bf3d0 10871 abtsiocbp->iotag);
7e56aa25
JS
10872
10873 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
10874 pring = lpfc_sli4_calc_ring(phba, abtsiocbp);
10875 if (unlikely(pring == NULL))
9bd2bff5 10876 return 0;
7e56aa25
JS
10877 /* Note: both hbalock and ring_lock need to be set here */
10878 spin_lock_irqsave(&pring->ring_lock, iflags);
10879 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
10880 abtsiocbp, 0);
10881 spin_unlock_irqrestore(&pring->ring_lock, iflags);
10882 } else {
10883 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
10884 abtsiocbp, 0);
10885 }
dea3101e 10886
d7c255b2
JS
10887 if (retval)
10888 __lpfc_sli_release_iocbq(phba, abtsiocbp);
5af5eee7
JS
10889
10890 /*
10891 * Caller to this routine should check for IOCB_ERROR
10892 * and handle it properly. This routine no longer removes
10893 * iocb off txcmplq and call compl in case of IOCB_ERROR.
10894 */
10895 return retval;
10896}
10897
10898/**
10899 * lpfc_sli_issue_abort_iotag - Abort function for a command iocb
10900 * @phba: Pointer to HBA context object.
10901 * @pring: Pointer to driver SLI ring object.
10902 * @cmdiocb: Pointer to driver command iocb object.
10903 *
10904 * This function issues an abort iocb for the provided command iocb. In case
10905 * of unloading, the abort iocb will not be issued to commands on the ELS
10906 * ring. Instead, the callback function shall be changed to those commands
10907 * so that nothing happens when them finishes. This function is called with
10908 * hbalock held. The function returns 0 when the command iocb is an abort
10909 * request.
10910 **/
10911int
10912lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10913 struct lpfc_iocbq *cmdiocb)
10914{
10915 struct lpfc_vport *vport = cmdiocb->vport;
10916 int retval = IOCB_ERROR;
10917 IOCB_t *icmd = NULL;
10918
1c2ba475
JT
10919 lockdep_assert_held(&phba->hbalock);
10920
5af5eee7
JS
10921 /*
10922 * There are certain command types we don't want to abort. And we
10923 * don't want to abort commands that are already in the process of
10924 * being aborted.
10925 */
10926 icmd = &cmdiocb->iocb;
10927 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
10928 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
10929 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
10930 return 0;
10931
1234a6d5
DK
10932 if (!pring) {
10933 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
10934 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
10935 else
10936 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
10937 goto abort_iotag_exit;
10938 }
10939
5af5eee7
JS
10940 /*
10941 * If we're unloading, don't abort iocb on the ELS ring, but change
10942 * the callback so that nothing happens when it finishes.
10943 */
10944 if ((vport->load_flag & FC_UNLOADING) &&
10945 (pring->ringno == LPFC_ELS_RING)) {
10946 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
10947 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
10948 else
10949 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
10950 goto abort_iotag_exit;
10951 }
10952
10953 /* Now, we try to issue the abort to the cmdiocb out */
10954 retval = lpfc_sli_abort_iotag_issue(phba, pring, cmdiocb);
10955
07951076 10956abort_iotag_exit:
2e0fef85
JS
10957 /*
10958 * Caller to this routine should check for IOCB_ERROR
10959 * and handle it properly. This routine no longer removes
10960 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 10961 */
2e0fef85 10962 return retval;
dea3101e
JB
10963}
10964
895427bd
JS
10965/**
10966 * lpfc_sli4_abort_nvme_io - Issue abort for a command iocb
10967 * @phba: Pointer to HBA context object.
10968 * @pring: Pointer to driver SLI ring object.
10969 * @cmdiocb: Pointer to driver command iocb object.
10970 *
10971 * This function issues an abort iocb for the provided command iocb down to
10972 * the port. Other than the case the outstanding command iocb is an abort
10973 * request, this function issues abort out unconditionally. This function is
10974 * called with hbalock held. The function returns 0 when it fails due to
10975 * memory allocation failure or when the command iocb is an abort request.
10976 **/
10977static int
10978lpfc_sli4_abort_nvme_io(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10979 struct lpfc_iocbq *cmdiocb)
10980{
10981 struct lpfc_vport *vport = cmdiocb->vport;
10982 struct lpfc_iocbq *abtsiocbp;
205e8240 10983 union lpfc_wqe128 *abts_wqe;
895427bd
JS
10984 int retval;
10985
10986 /*
10987 * There are certain command types we don't want to abort. And we
10988 * don't want to abort commands that are already in the process of
10989 * being aborted.
10990 */
10991 if (cmdiocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
10992 cmdiocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN ||
10993 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
10994 return 0;
10995
10996 /* issue ABTS for this io based on iotag */
10997 abtsiocbp = __lpfc_sli_get_iocbq(phba);
10998 if (abtsiocbp == NULL)
10999 return 0;
11000
11001 /* This signals the response to set the correct status
11002 * before calling the completion handler
11003 */
11004 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
11005
11006 /* Complete prepping the abort wqe and issue to the FW. */
11007 abts_wqe = &abtsiocbp->wqe;
11008 bf_set(abort_cmd_ia, &abts_wqe->abort_cmd, 0);
11009 bf_set(abort_cmd_criteria, &abts_wqe->abort_cmd, T_XRI_TAG);
11010
11011 /* Explicitly set reserved fields to zero.*/
11012 abts_wqe->abort_cmd.rsrvd4 = 0;
11013 abts_wqe->abort_cmd.rsrvd5 = 0;
11014
11015 /* WQE Common - word 6. Context is XRI tag. Set 0. */
11016 bf_set(wqe_xri_tag, &abts_wqe->abort_cmd.wqe_com, 0);
11017 bf_set(wqe_ctxt_tag, &abts_wqe->abort_cmd.wqe_com, 0);
11018
11019 /* word 7 */
11020 bf_set(wqe_ct, &abts_wqe->abort_cmd.wqe_com, 0);
11021 bf_set(wqe_cmnd, &abts_wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
11022 bf_set(wqe_class, &abts_wqe->abort_cmd.wqe_com,
11023 cmdiocb->iocb.ulpClass);
11024
11025 /* word 8 - tell the FW to abort the IO associated with this
11026 * outstanding exchange ID.
11027 */
11028 abts_wqe->abort_cmd.wqe_com.abort_tag = cmdiocb->sli4_xritag;
11029
11030 /* word 9 - this is the iotag for the abts_wqe completion. */
11031 bf_set(wqe_reqtag, &abts_wqe->abort_cmd.wqe_com,
11032 abtsiocbp->iotag);
11033
11034 /* word 10 */
11035 bf_set(wqe_wqid, &abts_wqe->abort_cmd.wqe_com, cmdiocb->hba_wqidx);
11036 bf_set(wqe_qosd, &abts_wqe->abort_cmd.wqe_com, 1);
11037 bf_set(wqe_lenloc, &abts_wqe->abort_cmd.wqe_com, LPFC_WQE_LENLOC_NONE);
11038
11039 /* word 11 */
11040 bf_set(wqe_cmd_type, &abts_wqe->abort_cmd.wqe_com, OTHER_COMMAND);
11041 bf_set(wqe_wqec, &abts_wqe->abort_cmd.wqe_com, 1);
11042 bf_set(wqe_cqid, &abts_wqe->abort_cmd.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
11043
11044 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
11045 abtsiocbp->iocb_flag |= LPFC_IO_NVME;
11046 abtsiocbp->vport = vport;
01649561 11047 abtsiocbp->wqe_cmpl = lpfc_nvme_abort_fcreq_cmpl;
895427bd 11048 retval = lpfc_sli4_issue_wqe(phba, LPFC_FCP_RING, abtsiocbp);
cd22d605 11049 if (retval) {
895427bd
JS
11050 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME,
11051 "6147 Failed abts issue_wqe with status x%x "
11052 "for oxid x%x\n",
11053 retval, cmdiocb->sli4_xritag);
11054 lpfc_sli_release_iocbq(phba, abtsiocbp);
11055 return retval;
11056 }
11057
11058 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME,
11059 "6148 Drv Abort NVME Request Issued for "
11060 "ox_id x%x on reqtag x%x\n",
11061 cmdiocb->sli4_xritag,
11062 abtsiocbp->iotag);
11063
11064 return retval;
11065}
11066
5af5eee7
JS
11067/**
11068 * lpfc_sli_hba_iocb_abort - Abort all iocbs to an hba.
11069 * @phba: pointer to lpfc HBA data structure.
11070 *
11071 * This routine will abort all pending and outstanding iocbs to an HBA.
11072 **/
11073void
11074lpfc_sli_hba_iocb_abort(struct lpfc_hba *phba)
11075{
11076 struct lpfc_sli *psli = &phba->sli;
11077 struct lpfc_sli_ring *pring;
895427bd 11078 struct lpfc_queue *qp = NULL;
5af5eee7
JS
11079 int i;
11080
895427bd
JS
11081 if (phba->sli_rev != LPFC_SLI_REV4) {
11082 for (i = 0; i < psli->num_rings; i++) {
11083 pring = &psli->sli3_ring[i];
11084 lpfc_sli_abort_iocb_ring(phba, pring);
11085 }
11086 return;
11087 }
11088 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
11089 pring = qp->pring;
11090 if (!pring)
11091 continue;
db55fba8 11092 lpfc_sli_abort_iocb_ring(phba, pring);
5af5eee7
JS
11093 }
11094}
11095
e59058c4 11096/**
3621a710 11097 * lpfc_sli_validate_fcp_iocb - find commands associated with a vport or LUN
e59058c4
JS
11098 * @iocbq: Pointer to driver iocb object.
11099 * @vport: Pointer to driver virtual port object.
11100 * @tgt_id: SCSI ID of the target.
11101 * @lun_id: LUN ID of the scsi device.
11102 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST
11103 *
3621a710 11104 * This function acts as an iocb filter for functions which abort or count
e59058c4
JS
11105 * all FCP iocbs pending on a lun/SCSI target/SCSI host. It will return
11106 * 0 if the filtering criteria is met for the given iocb and will return
11107 * 1 if the filtering criteria is not met.
11108 * If ctx_cmd == LPFC_CTX_LUN, the function returns 0 only if the
11109 * given iocb is for the SCSI device specified by vport, tgt_id and
11110 * lun_id parameter.
11111 * If ctx_cmd == LPFC_CTX_TGT, the function returns 0 only if the
11112 * given iocb is for the SCSI target specified by vport and tgt_id
11113 * parameters.
11114 * If ctx_cmd == LPFC_CTX_HOST, the function returns 0 only if the
11115 * given iocb is for the SCSI host associated with the given vport.
11116 * This function is called with no locks held.
11117 **/
dea3101e 11118static int
51ef4c26
JS
11119lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
11120 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 11121 lpfc_ctx_cmd ctx_cmd)
dea3101e 11122{
0bd4ca25 11123 struct lpfc_scsi_buf *lpfc_cmd;
dea3101e
JB
11124 int rc = 1;
11125
b0e83012 11126 if (iocbq->vport != vport)
0bd4ca25
JSEC
11127 return rc;
11128
b0e83012
JS
11129 if (!(iocbq->iocb_flag & LPFC_IO_FCP) ||
11130 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ))
51ef4c26
JS
11131 return rc;
11132
0bd4ca25 11133 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
0bd4ca25 11134
495a714c 11135 if (lpfc_cmd->pCmd == NULL)
dea3101e
JB
11136 return rc;
11137
11138 switch (ctx_cmd) {
11139 case LPFC_CTX_LUN:
b0e83012 11140 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c
JS
11141 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id) &&
11142 (scsilun_to_int(&lpfc_cmd->fcp_cmnd->fcp_lun) == lun_id))
dea3101e
JB
11143 rc = 0;
11144 break;
11145 case LPFC_CTX_TGT:
b0e83012 11146 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c 11147 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id))
dea3101e
JB
11148 rc = 0;
11149 break;
dea3101e
JB
11150 case LPFC_CTX_HOST:
11151 rc = 0;
11152 break;
11153 default:
11154 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
cadbd4a5 11155 __func__, ctx_cmd);
dea3101e
JB
11156 break;
11157 }
11158
11159 return rc;
11160}
11161
e59058c4 11162/**
3621a710 11163 * lpfc_sli_sum_iocb - Function to count the number of FCP iocbs pending
e59058c4
JS
11164 * @vport: Pointer to virtual port.
11165 * @tgt_id: SCSI ID of the target.
11166 * @lun_id: LUN ID of the scsi device.
11167 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11168 *
11169 * This function returns number of FCP commands pending for the vport.
11170 * When ctx_cmd == LPFC_CTX_LUN, the function returns number of FCP
11171 * commands pending on the vport associated with SCSI device specified
11172 * by tgt_id and lun_id parameters.
11173 * When ctx_cmd == LPFC_CTX_TGT, the function returns number of FCP
11174 * commands pending on the vport associated with SCSI target specified
11175 * by tgt_id parameter.
11176 * When ctx_cmd == LPFC_CTX_HOST, the function returns number of FCP
11177 * commands pending on the vport.
11178 * This function returns the number of iocbs which satisfy the filter.
11179 * This function is called without any lock held.
11180 **/
dea3101e 11181int
51ef4c26
JS
11182lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
11183 lpfc_ctx_cmd ctx_cmd)
dea3101e 11184{
51ef4c26 11185 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11186 struct lpfc_iocbq *iocbq;
11187 int sum, i;
dea3101e 11188
31979008 11189 spin_lock_irq(&phba->hbalock);
0bd4ca25
JSEC
11190 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
11191 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11192
51ef4c26
JS
11193 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
11194 ctx_cmd) == 0)
0bd4ca25 11195 sum++;
dea3101e 11196 }
31979008 11197 spin_unlock_irq(&phba->hbalock);
0bd4ca25 11198
dea3101e
JB
11199 return sum;
11200}
11201
e59058c4 11202/**
3621a710 11203 * lpfc_sli_abort_fcp_cmpl - Completion handler function for aborted FCP IOCBs
e59058c4
JS
11204 * @phba: Pointer to HBA context object
11205 * @cmdiocb: Pointer to command iocb object.
11206 * @rspiocb: Pointer to response iocb object.
11207 *
11208 * This function is called when an aborted FCP iocb completes. This
11209 * function is called by the ring event handler with no lock held.
11210 * This function frees the iocb.
11211 **/
5eb95af0 11212void
2e0fef85
JS
11213lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11214 struct lpfc_iocbq *rspiocb)
5eb95af0 11215{
cb69f7de 11216 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8e668af5 11217 "3096 ABORT_XRI_CN completing on rpi x%x "
cb69f7de
JS
11218 "original iotag x%x, abort cmd iotag x%x "
11219 "status 0x%x, reason 0x%x\n",
11220 cmdiocb->iocb.un.acxri.abortContextTag,
11221 cmdiocb->iocb.un.acxri.abortIoTag,
11222 cmdiocb->iotag, rspiocb->iocb.ulpStatus,
11223 rspiocb->iocb.un.ulpWord[4]);
604a3e30 11224 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC
11225 return;
11226}
11227
e59058c4 11228/**
3621a710 11229 * lpfc_sli_abort_iocb - issue abort for all commands on a host/target/LUN
e59058c4
JS
11230 * @vport: Pointer to virtual port.
11231 * @pring: Pointer to driver SLI ring object.
11232 * @tgt_id: SCSI ID of the target.
11233 * @lun_id: LUN ID of the scsi device.
11234 * @abort_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11235 *
11236 * This function sends an abort command for every SCSI command
11237 * associated with the given virtual port pending on the ring
11238 * filtered by lpfc_sli_validate_fcp_iocb function.
11239 * When abort_cmd == LPFC_CTX_LUN, the function sends abort only to the
11240 * FCP iocbs associated with lun specified by tgt_id and lun_id
11241 * parameters
11242 * When abort_cmd == LPFC_CTX_TGT, the function sends abort only to the
11243 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11244 * When abort_cmd == LPFC_CTX_HOST, the function sends abort to all
11245 * FCP iocbs associated with virtual port.
11246 * This function returns number of iocbs it failed to abort.
11247 * This function is called with no locks held.
11248 **/
dea3101e 11249int
51ef4c26
JS
11250lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11251 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 11252{
51ef4c26 11253 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11254 struct lpfc_iocbq *iocbq;
11255 struct lpfc_iocbq *abtsiocb;
ecbb227e 11256 struct lpfc_sli_ring *pring_s4;
dea3101e 11257 IOCB_t *cmd = NULL;
dea3101e 11258 int errcnt = 0, ret_val = 0;
0bd4ca25 11259 int i;
dea3101e 11260
b0e83012
JS
11261 /* all I/Os are in process of being flushed */
11262 if (phba->hba_flag & HBA_FCP_IOQ_FLUSH)
11263 return errcnt;
11264
0bd4ca25
JSEC
11265 for (i = 1; i <= phba->sli.last_iotag; i++) {
11266 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11267
51ef4c26 11268 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 11269 abort_cmd) != 0)
dea3101e
JB
11270 continue;
11271
afbd8d88
JS
11272 /*
11273 * If the iocbq is already being aborted, don't take a second
11274 * action, but do count it.
11275 */
11276 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11277 continue;
11278
dea3101e 11279 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 11280 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
11281 if (abtsiocb == NULL) {
11282 errcnt++;
11283 continue;
11284 }
dea3101e 11285
afbd8d88
JS
11286 /* indicate the IO is being aborted by the driver. */
11287 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11288
0bd4ca25 11289 cmd = &iocbq->iocb;
dea3101e
JB
11290 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11291 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
da0436e9
JS
11292 if (phba->sli_rev == LPFC_SLI_REV4)
11293 abtsiocb->iocb.un.acxri.abortIoTag = iocbq->sli4_xritag;
11294 else
11295 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
dea3101e
JB
11296 abtsiocb->iocb.ulpLe = 1;
11297 abtsiocb->iocb.ulpClass = cmd->ulpClass;
afbd8d88 11298 abtsiocb->vport = vport;
dea3101e 11299
5ffc266e 11300 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11301 abtsiocb->hba_wqidx = iocbq->hba_wqidx;
341af102
JS
11302 if (iocbq->iocb_flag & LPFC_IO_FCP)
11303 abtsiocb->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11304 if (iocbq->iocb_flag & LPFC_IO_FOF)
11305 abtsiocb->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11306
2e0fef85 11307 if (lpfc_is_link_up(phba))
dea3101e
JB
11308 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11309 else
11310 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11311
5eb95af0
JSEC
11312 /* Setup callback routine and issue the command. */
11313 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
ecbb227e
JS
11314 if (phba->sli_rev == LPFC_SLI_REV4) {
11315 pring_s4 = lpfc_sli4_calc_ring(phba, iocbq);
11316 if (!pring_s4)
11317 continue;
11318 ret_val = lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11319 abtsiocb, 0);
11320 } else
11321 ret_val = lpfc_sli_issue_iocb(phba, pring->ringno,
11322 abtsiocb, 0);
dea3101e 11323 if (ret_val == IOCB_ERROR) {
604a3e30 11324 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB
11325 errcnt++;
11326 continue;
11327 }
11328 }
11329
11330 return errcnt;
11331}
11332
98912dda
JS
11333/**
11334 * lpfc_sli_abort_taskmgmt - issue abort for all commands on a host/target/LUN
11335 * @vport: Pointer to virtual port.
11336 * @pring: Pointer to driver SLI ring object.
11337 * @tgt_id: SCSI ID of the target.
11338 * @lun_id: LUN ID of the scsi device.
11339 * @taskmgmt_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11340 *
11341 * This function sends an abort command for every SCSI command
11342 * associated with the given virtual port pending on the ring
11343 * filtered by lpfc_sli_validate_fcp_iocb function.
11344 * When taskmgmt_cmd == LPFC_CTX_LUN, the function sends abort only to the
11345 * FCP iocbs associated with lun specified by tgt_id and lun_id
11346 * parameters
11347 * When taskmgmt_cmd == LPFC_CTX_TGT, the function sends abort only to the
11348 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11349 * When taskmgmt_cmd == LPFC_CTX_HOST, the function sends abort to all
11350 * FCP iocbs associated with virtual port.
11351 * This function returns number of iocbs it aborted .
11352 * This function is called with no locks held right after a taskmgmt
11353 * command is sent.
11354 **/
11355int
11356lpfc_sli_abort_taskmgmt(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11357 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd cmd)
11358{
11359 struct lpfc_hba *phba = vport->phba;
8c50d25c 11360 struct lpfc_scsi_buf *lpfc_cmd;
98912dda 11361 struct lpfc_iocbq *abtsiocbq;
8c50d25c 11362 struct lpfc_nodelist *ndlp;
98912dda
JS
11363 struct lpfc_iocbq *iocbq;
11364 IOCB_t *icmd;
11365 int sum, i, ret_val;
11366 unsigned long iflags;
11367 struct lpfc_sli_ring *pring_s4;
98912dda 11368
59c68eaa 11369 spin_lock_irqsave(&phba->hbalock, iflags);
98912dda
JS
11370
11371 /* all I/Os are in process of being flushed */
11372 if (phba->hba_flag & HBA_FCP_IOQ_FLUSH) {
59c68eaa 11373 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11374 return 0;
11375 }
11376 sum = 0;
11377
11378 for (i = 1; i <= phba->sli.last_iotag; i++) {
11379 iocbq = phba->sli.iocbq_lookup[i];
11380
11381 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
11382 cmd) != 0)
11383 continue;
11384
11385 /*
11386 * If the iocbq is already being aborted, don't take a second
11387 * action, but do count it.
11388 */
11389 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11390 continue;
11391
11392 /* issue ABTS for this IOCB based on iotag */
11393 abtsiocbq = __lpfc_sli_get_iocbq(phba);
11394 if (abtsiocbq == NULL)
11395 continue;
11396
11397 icmd = &iocbq->iocb;
11398 abtsiocbq->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11399 abtsiocbq->iocb.un.acxri.abortContextTag = icmd->ulpContext;
11400 if (phba->sli_rev == LPFC_SLI_REV4)
11401 abtsiocbq->iocb.un.acxri.abortIoTag =
11402 iocbq->sli4_xritag;
11403 else
11404 abtsiocbq->iocb.un.acxri.abortIoTag = icmd->ulpIoTag;
11405 abtsiocbq->iocb.ulpLe = 1;
11406 abtsiocbq->iocb.ulpClass = icmd->ulpClass;
11407 abtsiocbq->vport = vport;
11408
11409 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11410 abtsiocbq->hba_wqidx = iocbq->hba_wqidx;
98912dda
JS
11411 if (iocbq->iocb_flag & LPFC_IO_FCP)
11412 abtsiocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11413 if (iocbq->iocb_flag & LPFC_IO_FOF)
11414 abtsiocbq->iocb_flag |= LPFC_IO_FOF;
98912dda 11415
8c50d25c
JS
11416 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
11417 ndlp = lpfc_cmd->rdata->pnode;
11418
11419 if (lpfc_is_link_up(phba) &&
11420 (ndlp && ndlp->nlp_state == NLP_STE_MAPPED_NODE))
98912dda
JS
11421 abtsiocbq->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11422 else
11423 abtsiocbq->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11424
11425 /* Setup callback routine and issue the command. */
11426 abtsiocbq->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
11427
11428 /*
11429 * Indicate the IO is being aborted by the driver and set
11430 * the caller's flag into the aborted IO.
11431 */
11432 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11433
11434 if (phba->sli_rev == LPFC_SLI_REV4) {
59c68eaa
JS
11435 pring_s4 = lpfc_sli4_calc_ring(phba, abtsiocbq);
11436 if (!pring_s4)
895427bd 11437 continue;
98912dda 11438 /* Note: both hbalock and ring_lock must be set here */
59c68eaa 11439 spin_lock(&pring_s4->ring_lock);
98912dda
JS
11440 ret_val = __lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11441 abtsiocbq, 0);
59c68eaa 11442 spin_unlock(&pring_s4->ring_lock);
98912dda
JS
11443 } else {
11444 ret_val = __lpfc_sli_issue_iocb(phba, pring->ringno,
11445 abtsiocbq, 0);
11446 }
11447
11448
11449 if (ret_val == IOCB_ERROR)
11450 __lpfc_sli_release_iocbq(phba, abtsiocbq);
11451 else
11452 sum++;
11453 }
59c68eaa 11454 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11455 return sum;
11456}
11457
e59058c4 11458/**
3621a710 11459 * lpfc_sli_wake_iocb_wait - lpfc_sli_issue_iocb_wait's completion handler
e59058c4
JS
11460 * @phba: Pointer to HBA context object.
11461 * @cmdiocbq: Pointer to command iocb.
11462 * @rspiocbq: Pointer to response iocb.
11463 *
11464 * This function is the completion handler for iocbs issued using
11465 * lpfc_sli_issue_iocb_wait function. This function is called by the
11466 * ring event handler function without any lock held. This function
11467 * can be called from both worker thread context and interrupt
11468 * context. This function also can be called from other thread which
11469 * cleans up the SLI layer objects.
11470 * This function copy the contents of the response iocb to the
11471 * response iocb memory object provided by the caller of
11472 * lpfc_sli_issue_iocb_wait and then wakes up the thread which
11473 * sleeps for the iocb completion.
11474 **/
68876920
JSEC
11475static void
11476lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
11477 struct lpfc_iocbq *cmdiocbq,
11478 struct lpfc_iocbq *rspiocbq)
dea3101e 11479{
68876920
JSEC
11480 wait_queue_head_t *pdone_q;
11481 unsigned long iflags;
0f65ff68 11482 struct lpfc_scsi_buf *lpfc_cmd;
dea3101e 11483
2e0fef85 11484 spin_lock_irqsave(&phba->hbalock, iflags);
5a0916b4
JS
11485 if (cmdiocbq->iocb_flag & LPFC_IO_WAKE_TMO) {
11486
11487 /*
11488 * A time out has occurred for the iocb. If a time out
11489 * completion handler has been supplied, call it. Otherwise,
11490 * just free the iocbq.
11491 */
11492
11493 spin_unlock_irqrestore(&phba->hbalock, iflags);
11494 cmdiocbq->iocb_cmpl = cmdiocbq->wait_iocb_cmpl;
11495 cmdiocbq->wait_iocb_cmpl = NULL;
11496 if (cmdiocbq->iocb_cmpl)
11497 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, NULL);
11498 else
11499 lpfc_sli_release_iocbq(phba, cmdiocbq);
11500 return;
11501 }
11502
68876920
JSEC
11503 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
11504 if (cmdiocbq->context2 && rspiocbq)
11505 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
11506 &rspiocbq->iocb, sizeof(IOCB_t));
11507
0f65ff68
JS
11508 /* Set the exchange busy flag for task management commands */
11509 if ((cmdiocbq->iocb_flag & LPFC_IO_FCP) &&
11510 !(cmdiocbq->iocb_flag & LPFC_IO_LIBDFC)) {
11511 lpfc_cmd = container_of(cmdiocbq, struct lpfc_scsi_buf,
11512 cur_iocbq);
11513 lpfc_cmd->exch_busy = rspiocbq->iocb_flag & LPFC_EXCHANGE_BUSY;
11514 }
11515
68876920 11516 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC
11517 if (pdone_q)
11518 wake_up(pdone_q);
858c9f6c 11519 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB
11520 return;
11521}
11522
d11e31dd
JS
11523/**
11524 * lpfc_chk_iocb_flg - Test IOCB flag with lock held.
11525 * @phba: Pointer to HBA context object..
11526 * @piocbq: Pointer to command iocb.
11527 * @flag: Flag to test.
11528 *
11529 * This routine grabs the hbalock and then test the iocb_flag to
11530 * see if the passed in flag is set.
11531 * Returns:
11532 * 1 if flag is set.
11533 * 0 if flag is not set.
11534 **/
11535static int
11536lpfc_chk_iocb_flg(struct lpfc_hba *phba,
11537 struct lpfc_iocbq *piocbq, uint32_t flag)
11538{
11539 unsigned long iflags;
11540 int ret;
11541
11542 spin_lock_irqsave(&phba->hbalock, iflags);
11543 ret = piocbq->iocb_flag & flag;
11544 spin_unlock_irqrestore(&phba->hbalock, iflags);
11545 return ret;
11546
11547}
11548
e59058c4 11549/**
3621a710 11550 * lpfc_sli_issue_iocb_wait - Synchronous function to issue iocb commands
e59058c4
JS
11551 * @phba: Pointer to HBA context object..
11552 * @pring: Pointer to sli ring.
11553 * @piocb: Pointer to command iocb.
11554 * @prspiocbq: Pointer to response iocb.
11555 * @timeout: Timeout in number of seconds.
11556 *
11557 * This function issues the iocb to firmware and waits for the
5a0916b4
JS
11558 * iocb to complete. The iocb_cmpl field of the shall be used
11559 * to handle iocbs which time out. If the field is NULL, the
11560 * function shall free the iocbq structure. If more clean up is
11561 * needed, the caller is expected to provide a completion function
11562 * that will provide the needed clean up. If the iocb command is
11563 * not completed within timeout seconds, the function will either
11564 * free the iocbq structure (if iocb_cmpl == NULL) or execute the
11565 * completion function set in the iocb_cmpl field and then return
11566 * a status of IOCB_TIMEDOUT. The caller should not free the iocb
11567 * resources if this function returns IOCB_TIMEDOUT.
e59058c4
JS
11568 * The function waits for the iocb completion using an
11569 * non-interruptible wait.
11570 * This function will sleep while waiting for iocb completion.
11571 * So, this function should not be called from any context which
11572 * does not allow sleeping. Due to the same reason, this function
11573 * cannot be called with interrupt disabled.
11574 * This function assumes that the iocb completions occur while
11575 * this function sleep. So, this function cannot be called from
11576 * the thread which process iocb completion for this ring.
11577 * This function clears the iocb_flag of the iocb object before
11578 * issuing the iocb and the iocb completion handler sets this
11579 * flag and wakes this thread when the iocb completes.
11580 * The contents of the response iocb will be copied to prspiocbq
11581 * by the completion handler when the command completes.
11582 * This function returns IOCB_SUCCESS when success.
11583 * This function is called with no lock held.
11584 **/
dea3101e 11585int
2e0fef85 11586lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
da0436e9 11587 uint32_t ring_number,
2e0fef85
JS
11588 struct lpfc_iocbq *piocb,
11589 struct lpfc_iocbq *prspiocbq,
68876920 11590 uint32_t timeout)
dea3101e 11591{
7259f0d0 11592 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC
11593 long timeleft, timeout_req = 0;
11594 int retval = IOCB_SUCCESS;
875fbdfe 11595 uint32_t creg_val;
0e9bb8d7
JS
11596 struct lpfc_iocbq *iocb;
11597 int txq_cnt = 0;
11598 int txcmplq_cnt = 0;
895427bd 11599 struct lpfc_sli_ring *pring;
5a0916b4
JS
11600 unsigned long iflags;
11601 bool iocb_completed = true;
11602
895427bd
JS
11603 if (phba->sli_rev >= LPFC_SLI_REV4)
11604 pring = lpfc_sli4_calc_ring(phba, piocb);
11605 else
11606 pring = &phba->sli.sli3_ring[ring_number];
dea3101e 11607 /*
68876920
JSEC
11608 * If the caller has provided a response iocbq buffer, then context2
11609 * is NULL or its an error.
dea3101e 11610 */
68876920
JSEC
11611 if (prspiocbq) {
11612 if (piocb->context2)
11613 return IOCB_ERROR;
11614 piocb->context2 = prspiocbq;
dea3101e
JB
11615 }
11616
5a0916b4 11617 piocb->wait_iocb_cmpl = piocb->iocb_cmpl;
68876920
JSEC
11618 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
11619 piocb->context_un.wait_queue = &done_q;
5a0916b4 11620 piocb->iocb_flag &= ~(LPFC_IO_WAKE | LPFC_IO_WAKE_TMO);
dea3101e 11621
875fbdfe 11622 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
11623 if (lpfc_readl(phba->HCregaddr, &creg_val))
11624 return IOCB_ERROR;
875fbdfe
JSEC
11625 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
11626 writel(creg_val, phba->HCregaddr);
11627 readl(phba->HCregaddr); /* flush */
11628 }
11629
2a9bf3d0
JS
11630 retval = lpfc_sli_issue_iocb(phba, ring_number, piocb,
11631 SLI_IOCB_RET_IOCB);
68876920 11632 if (retval == IOCB_SUCCESS) {
256ec0d0 11633 timeout_req = msecs_to_jiffies(timeout * 1000);
68876920 11634 timeleft = wait_event_timeout(done_q,
d11e31dd 11635 lpfc_chk_iocb_flg(phba, piocb, LPFC_IO_WAKE),
68876920 11636 timeout_req);
5a0916b4
JS
11637 spin_lock_irqsave(&phba->hbalock, iflags);
11638 if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
11639
11640 /*
11641 * IOCB timed out. Inform the wake iocb wait
11642 * completion function and set local status
11643 */
dea3101e 11644
5a0916b4
JS
11645 iocb_completed = false;
11646 piocb->iocb_flag |= LPFC_IO_WAKE_TMO;
11647 }
11648 spin_unlock_irqrestore(&phba->hbalock, iflags);
11649 if (iocb_completed) {
7054a606 11650 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 11651 "0331 IOCB wake signaled\n");
53151bbb
JS
11652 /* Note: we are not indicating if the IOCB has a success
11653 * status or not - that's for the caller to check.
11654 * IOCB_SUCCESS means just that the command was sent and
11655 * completed. Not that it completed successfully.
11656 * */
7054a606 11657 } else if (timeleft == 0) {
68876920 11658 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
11659 "0338 IOCB wait timeout error - no "
11660 "wake response Data x%x\n", timeout);
68876920 11661 retval = IOCB_TIMEDOUT;
7054a606 11662 } else {
68876920 11663 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
11664 "0330 IOCB wake NOT set, "
11665 "Data x%x x%lx\n",
68876920
JSEC
11666 timeout, (timeleft / jiffies));
11667 retval = IOCB_TIMEDOUT;
dea3101e 11668 }
2a9bf3d0 11669 } else if (retval == IOCB_BUSY) {
0e9bb8d7
JS
11670 if (phba->cfg_log_verbose & LOG_SLI) {
11671 list_for_each_entry(iocb, &pring->txq, list) {
11672 txq_cnt++;
11673 }
11674 list_for_each_entry(iocb, &pring->txcmplq, list) {
11675 txcmplq_cnt++;
11676 }
11677 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
11678 "2818 Max IOCBs %d txq cnt %d txcmplq cnt %d\n",
11679 phba->iocb_cnt, txq_cnt, txcmplq_cnt);
11680 }
2a9bf3d0 11681 return retval;
68876920
JSEC
11682 } else {
11683 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
d7c255b2 11684 "0332 IOCB wait issue failed, Data x%x\n",
e8b62011 11685 retval);
68876920 11686 retval = IOCB_ERROR;
dea3101e
JB
11687 }
11688
875fbdfe 11689 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
11690 if (lpfc_readl(phba->HCregaddr, &creg_val))
11691 return IOCB_ERROR;
875fbdfe
JSEC
11692 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
11693 writel(creg_val, phba->HCregaddr);
11694 readl(phba->HCregaddr); /* flush */
11695 }
11696
68876920
JSEC
11697 if (prspiocbq)
11698 piocb->context2 = NULL;
11699
11700 piocb->context_un.wait_queue = NULL;
11701 piocb->iocb_cmpl = NULL;
dea3101e
JB
11702 return retval;
11703}
68876920 11704
e59058c4 11705/**
3621a710 11706 * lpfc_sli_issue_mbox_wait - Synchronous function to issue mailbox
e59058c4
JS
11707 * @phba: Pointer to HBA context object.
11708 * @pmboxq: Pointer to driver mailbox object.
11709 * @timeout: Timeout in number of seconds.
11710 *
11711 * This function issues the mailbox to firmware and waits for the
11712 * mailbox command to complete. If the mailbox command is not
11713 * completed within timeout seconds, it returns MBX_TIMEOUT.
11714 * The function waits for the mailbox completion using an
11715 * interruptible wait. If the thread is woken up due to a
11716 * signal, MBX_TIMEOUT error is returned to the caller. Caller
11717 * should not free the mailbox resources, if this function returns
11718 * MBX_TIMEOUT.
11719 * This function will sleep while waiting for mailbox completion.
11720 * So, this function should not be called from any context which
11721 * does not allow sleeping. Due to the same reason, this function
11722 * cannot be called with interrupt disabled.
11723 * This function assumes that the mailbox completion occurs while
11724 * this function sleep. So, this function cannot be called from
11725 * the worker thread which processes mailbox completion.
11726 * This function is called in the context of HBA management
11727 * applications.
11728 * This function returns MBX_SUCCESS when successful.
11729 * This function is called with no lock held.
11730 **/
dea3101e 11731int
2e0fef85 11732lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB
11733 uint32_t timeout)
11734{
e29d74f8 11735 struct completion mbox_done;
dea3101e 11736 int retval;
858c9f6c 11737 unsigned long flag;
dea3101e 11738
495a714c 11739 pmboxq->mbox_flag &= ~LPFC_MBX_WAKE;
dea3101e
JB
11740 /* setup wake call as IOCB callback */
11741 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
dea3101e 11742
e29d74f8
JS
11743 /* setup context3 field to pass wait_queue pointer to wake function */
11744 init_completion(&mbox_done);
11745 pmboxq->context3 = &mbox_done;
dea3101e
JB
11746 /* now issue the command */
11747 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
dea3101e 11748 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
e29d74f8
JS
11749 wait_for_completion_timeout(&mbox_done,
11750 msecs_to_jiffies(timeout * 1000));
7054a606 11751
858c9f6c 11752 spin_lock_irqsave(&phba->hbalock, flag);
e29d74f8 11753 pmboxq->context3 = NULL;
7054a606
JS
11754 /*
11755 * if LPFC_MBX_WAKE flag is set the mailbox is completed
11756 * else do not free the resources.
11757 */
d7c47992 11758 if (pmboxq->mbox_flag & LPFC_MBX_WAKE) {
dea3101e 11759 retval = MBX_SUCCESS;
d7c47992 11760 } else {
7054a606 11761 retval = MBX_TIMEOUT;
858c9f6c
JS
11762 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
11763 }
11764 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e 11765 }
dea3101e
JB
11766 return retval;
11767}
11768
e59058c4 11769/**
3772a991 11770 * lpfc_sli_mbox_sys_shutdown - shutdown mailbox command sub-system
e59058c4
JS
11771 * @phba: Pointer to HBA context.
11772 *
3772a991
JS
11773 * This function is called to shutdown the driver's mailbox sub-system.
11774 * It first marks the mailbox sub-system is in a block state to prevent
11775 * the asynchronous mailbox command from issued off the pending mailbox
11776 * command queue. If the mailbox command sub-system shutdown is due to
11777 * HBA error conditions such as EEH or ERATT, this routine shall invoke
11778 * the mailbox sub-system flush routine to forcefully bring down the
11779 * mailbox sub-system. Otherwise, if it is due to normal condition (such
11780 * as with offline or HBA function reset), this routine will wait for the
11781 * outstanding mailbox command to complete before invoking the mailbox
11782 * sub-system flush routine to gracefully bring down mailbox sub-system.
e59058c4 11783 **/
3772a991 11784void
618a5230 11785lpfc_sli_mbox_sys_shutdown(struct lpfc_hba *phba, int mbx_action)
b4c02652 11786{
3772a991 11787 struct lpfc_sli *psli = &phba->sli;
3772a991 11788 unsigned long timeout;
b4c02652 11789
618a5230
JS
11790 if (mbx_action == LPFC_MBX_NO_WAIT) {
11791 /* delay 100ms for port state */
11792 msleep(100);
11793 lpfc_sli_mbox_sys_flush(phba);
11794 return;
11795 }
a183a15f 11796 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
d7069f09 11797
523128e5
JS
11798 /* Disable softirqs, including timers from obtaining phba->hbalock */
11799 local_bh_disable();
11800
3772a991
JS
11801 spin_lock_irq(&phba->hbalock);
11802 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
b4c02652 11803
3772a991 11804 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
3772a991
JS
11805 /* Determine how long we might wait for the active mailbox
11806 * command to be gracefully completed by firmware.
11807 */
a183a15f
JS
11808 if (phba->sli.mbox_active)
11809 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
11810 phba->sli.mbox_active) *
11811 1000) + jiffies;
11812 spin_unlock_irq(&phba->hbalock);
11813
523128e5
JS
11814 /* Enable softirqs again, done with phba->hbalock */
11815 local_bh_enable();
11816
3772a991
JS
11817 while (phba->sli.mbox_active) {
11818 /* Check active mailbox complete status every 2ms */
11819 msleep(2);
11820 if (time_after(jiffies, timeout))
11821 /* Timeout, let the mailbox flush routine to
11822 * forcefully release active mailbox command
11823 */
11824 break;
11825 }
523128e5 11826 } else {
d7069f09
JS
11827 spin_unlock_irq(&phba->hbalock);
11828
523128e5
JS
11829 /* Enable softirqs again, done with phba->hbalock */
11830 local_bh_enable();
11831 }
11832
3772a991
JS
11833 lpfc_sli_mbox_sys_flush(phba);
11834}
ed957684 11835
3772a991
JS
11836/**
11837 * lpfc_sli_eratt_read - read sli-3 error attention events
11838 * @phba: Pointer to HBA context.
11839 *
11840 * This function is called to read the SLI3 device error attention registers
11841 * for possible error attention events. The caller must hold the hostlock
11842 * with spin_lock_irq().
11843 *
25985edc 11844 * This function returns 1 when there is Error Attention in the Host Attention
3772a991
JS
11845 * Register and returns 0 otherwise.
11846 **/
11847static int
11848lpfc_sli_eratt_read(struct lpfc_hba *phba)
11849{
11850 uint32_t ha_copy;
b4c02652 11851
3772a991 11852 /* Read chip Host Attention (HA) register */
9940b97b
JS
11853 if (lpfc_readl(phba->HAregaddr, &ha_copy))
11854 goto unplug_err;
11855
3772a991
JS
11856 if (ha_copy & HA_ERATT) {
11857 /* Read host status register to retrieve error event */
9940b97b
JS
11858 if (lpfc_sli_read_hs(phba))
11859 goto unplug_err;
b4c02652 11860
3772a991
JS
11861 /* Check if there is a deferred error condition is active */
11862 if ((HS_FFER1 & phba->work_hs) &&
11863 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0 11864 HS_FFER6 | HS_FFER7 | HS_FFER8) & phba->work_hs)) {
3772a991 11865 phba->hba_flag |= DEFER_ERATT;
3772a991
JS
11866 /* Clear all interrupt enable conditions */
11867 writel(0, phba->HCregaddr);
11868 readl(phba->HCregaddr);
11869 }
11870
11871 /* Set the driver HA work bitmap */
3772a991
JS
11872 phba->work_ha |= HA_ERATT;
11873 /* Indicate polling handles this ERATT */
11874 phba->hba_flag |= HBA_ERATT_HANDLED;
3772a991
JS
11875 return 1;
11876 }
11877 return 0;
9940b97b
JS
11878
11879unplug_err:
11880 /* Set the driver HS work bitmap */
11881 phba->work_hs |= UNPLUG_ERR;
11882 /* Set the driver HA work bitmap */
11883 phba->work_ha |= HA_ERATT;
11884 /* Indicate polling handles this ERATT */
11885 phba->hba_flag |= HBA_ERATT_HANDLED;
11886 return 1;
b4c02652
JS
11887}
11888
da0436e9
JS
11889/**
11890 * lpfc_sli4_eratt_read - read sli-4 error attention events
11891 * @phba: Pointer to HBA context.
11892 *
11893 * This function is called to read the SLI4 device error attention registers
11894 * for possible error attention events. The caller must hold the hostlock
11895 * with spin_lock_irq().
11896 *
25985edc 11897 * This function returns 1 when there is Error Attention in the Host Attention
da0436e9
JS
11898 * Register and returns 0 otherwise.
11899 **/
11900static int
11901lpfc_sli4_eratt_read(struct lpfc_hba *phba)
11902{
11903 uint32_t uerr_sta_hi, uerr_sta_lo;
2fcee4bf
JS
11904 uint32_t if_type, portsmphr;
11905 struct lpfc_register portstat_reg;
da0436e9 11906
2fcee4bf
JS
11907 /*
11908 * For now, use the SLI4 device internal unrecoverable error
da0436e9
JS
11909 * registers for error attention. This can be changed later.
11910 */
2fcee4bf
JS
11911 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11912 switch (if_type) {
11913 case LPFC_SLI_INTF_IF_TYPE_0:
9940b97b
JS
11914 if (lpfc_readl(phba->sli4_hba.u.if_type0.UERRLOregaddr,
11915 &uerr_sta_lo) ||
11916 lpfc_readl(phba->sli4_hba.u.if_type0.UERRHIregaddr,
11917 &uerr_sta_hi)) {
11918 phba->work_hs |= UNPLUG_ERR;
11919 phba->work_ha |= HA_ERATT;
11920 phba->hba_flag |= HBA_ERATT_HANDLED;
11921 return 1;
11922 }
2fcee4bf
JS
11923 if ((~phba->sli4_hba.ue_mask_lo & uerr_sta_lo) ||
11924 (~phba->sli4_hba.ue_mask_hi & uerr_sta_hi)) {
11925 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11926 "1423 HBA Unrecoverable error: "
11927 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, "
11928 "ue_mask_lo_reg=0x%x, "
11929 "ue_mask_hi_reg=0x%x\n",
11930 uerr_sta_lo, uerr_sta_hi,
11931 phba->sli4_hba.ue_mask_lo,
11932 phba->sli4_hba.ue_mask_hi);
11933 phba->work_status[0] = uerr_sta_lo;
11934 phba->work_status[1] = uerr_sta_hi;
11935 phba->work_ha |= HA_ERATT;
11936 phba->hba_flag |= HBA_ERATT_HANDLED;
11937 return 1;
11938 }
11939 break;
11940 case LPFC_SLI_INTF_IF_TYPE_2:
27d6ac0a 11941 case LPFC_SLI_INTF_IF_TYPE_6:
9940b97b
JS
11942 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
11943 &portstat_reg.word0) ||
11944 lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
11945 &portsmphr)){
11946 phba->work_hs |= UNPLUG_ERR;
11947 phba->work_ha |= HA_ERATT;
11948 phba->hba_flag |= HBA_ERATT_HANDLED;
11949 return 1;
11950 }
2fcee4bf
JS
11951 if (bf_get(lpfc_sliport_status_err, &portstat_reg)) {
11952 phba->work_status[0] =
11953 readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
11954 phba->work_status[1] =
11955 readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
11956 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2e90f4b5 11957 "2885 Port Status Event: "
2fcee4bf
JS
11958 "port status reg 0x%x, "
11959 "port smphr reg 0x%x, "
11960 "error 1=0x%x, error 2=0x%x\n",
11961 portstat_reg.word0,
11962 portsmphr,
11963 phba->work_status[0],
11964 phba->work_status[1]);
11965 phba->work_ha |= HA_ERATT;
11966 phba->hba_flag |= HBA_ERATT_HANDLED;
11967 return 1;
11968 }
11969 break;
11970 case LPFC_SLI_INTF_IF_TYPE_1:
11971 default:
a747c9ce 11972 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
11973 "2886 HBA Error Attention on unsupported "
11974 "if type %d.", if_type);
a747c9ce 11975 return 1;
da0436e9 11976 }
2fcee4bf 11977
da0436e9
JS
11978 return 0;
11979}
11980
e59058c4 11981/**
3621a710 11982 * lpfc_sli_check_eratt - check error attention events
9399627f
JS
11983 * @phba: Pointer to HBA context.
11984 *
3772a991 11985 * This function is called from timer soft interrupt context to check HBA's
9399627f
JS
11986 * error attention register bit for error attention events.
11987 *
25985edc 11988 * This function returns 1 when there is Error Attention in the Host Attention
9399627f
JS
11989 * Register and returns 0 otherwise.
11990 **/
11991int
11992lpfc_sli_check_eratt(struct lpfc_hba *phba)
11993{
11994 uint32_t ha_copy;
11995
11996 /* If somebody is waiting to handle an eratt, don't process it
11997 * here. The brdkill function will do this.
11998 */
11999 if (phba->link_flag & LS_IGNORE_ERATT)
12000 return 0;
12001
12002 /* Check if interrupt handler handles this ERATT */
12003 spin_lock_irq(&phba->hbalock);
12004 if (phba->hba_flag & HBA_ERATT_HANDLED) {
12005 /* Interrupt handler has handled ERATT */
12006 spin_unlock_irq(&phba->hbalock);
12007 return 0;
12008 }
12009
a257bf90
JS
12010 /*
12011 * If there is deferred error attention, do not check for error
12012 * attention
12013 */
12014 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
12015 spin_unlock_irq(&phba->hbalock);
12016 return 0;
12017 }
12018
3772a991
JS
12019 /* If PCI channel is offline, don't process it */
12020 if (unlikely(pci_channel_offline(phba->pcidev))) {
9399627f 12021 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12022 return 0;
12023 }
12024
12025 switch (phba->sli_rev) {
12026 case LPFC_SLI_REV2:
12027 case LPFC_SLI_REV3:
12028 /* Read chip Host Attention (HA) register */
12029 ha_copy = lpfc_sli_eratt_read(phba);
12030 break;
da0436e9 12031 case LPFC_SLI_REV4:
2fcee4bf 12032 /* Read device Uncoverable Error (UERR) registers */
da0436e9
JS
12033 ha_copy = lpfc_sli4_eratt_read(phba);
12034 break;
3772a991
JS
12035 default:
12036 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12037 "0299 Invalid SLI revision (%d)\n",
12038 phba->sli_rev);
12039 ha_copy = 0;
12040 break;
9399627f
JS
12041 }
12042 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12043
12044 return ha_copy;
12045}
12046
12047/**
12048 * lpfc_intr_state_check - Check device state for interrupt handling
12049 * @phba: Pointer to HBA context.
12050 *
12051 * This inline routine checks whether a device or its PCI slot is in a state
12052 * that the interrupt should be handled.
12053 *
12054 * This function returns 0 if the device or the PCI slot is in a state that
12055 * interrupt should be handled, otherwise -EIO.
12056 */
12057static inline int
12058lpfc_intr_state_check(struct lpfc_hba *phba)
12059{
12060 /* If the pci channel is offline, ignore all the interrupts */
12061 if (unlikely(pci_channel_offline(phba->pcidev)))
12062 return -EIO;
12063
12064 /* Update device level interrupt statistics */
12065 phba->sli.slistat.sli_intr++;
12066
12067 /* Ignore all interrupts during initialization. */
12068 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
12069 return -EIO;
12070
9399627f
JS
12071 return 0;
12072}
12073
12074/**
3772a991 12075 * lpfc_sli_sp_intr_handler - Slow-path interrupt handler to SLI-3 device
e59058c4
JS
12076 * @irq: Interrupt number.
12077 * @dev_id: The device context pointer.
12078 *
9399627f 12079 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12080 * service routine when device with SLI-3 interface spec is enabled with
12081 * MSI-X multi-message interrupt mode and there are slow-path events in
12082 * the HBA. However, when the device is enabled with either MSI or Pin-IRQ
12083 * interrupt mode, this function is called as part of the device-level
12084 * interrupt handler. When the PCI slot is in error recovery or the HBA
12085 * is undergoing initialization, the interrupt handler will not process
12086 * the interrupt. The link attention and ELS ring attention events are
12087 * handled by the worker thread. The interrupt handler signals the worker
12088 * thread and returns for these events. This function is called without
12089 * any lock held. It gets the hbalock to access and update SLI data
9399627f
JS
12090 * structures.
12091 *
12092 * This function returns IRQ_HANDLED when interrupt is handled else it
12093 * returns IRQ_NONE.
e59058c4 12094 **/
dea3101e 12095irqreturn_t
3772a991 12096lpfc_sli_sp_intr_handler(int irq, void *dev_id)
dea3101e 12097{
2e0fef85 12098 struct lpfc_hba *phba;
a747c9ce 12099 uint32_t ha_copy, hc_copy;
dea3101e
JB
12100 uint32_t work_ha_copy;
12101 unsigned long status;
5b75da2f 12102 unsigned long iflag;
dea3101e
JB
12103 uint32_t control;
12104
92d7f7b0 12105 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS
12106 struct lpfc_vport *vport;
12107 struct lpfc_nodelist *ndlp;
12108 struct lpfc_dmabuf *mp;
92d7f7b0
JS
12109 LPFC_MBOXQ_t *pmb;
12110 int rc;
12111
dea3101e
JB
12112 /*
12113 * Get the driver's phba structure from the dev_id and
12114 * assume the HBA is not interrupting.
12115 */
9399627f 12116 phba = (struct lpfc_hba *)dev_id;
dea3101e
JB
12117
12118 if (unlikely(!phba))
12119 return IRQ_NONE;
12120
dea3101e 12121 /*
9399627f
JS
12122 * Stuff needs to be attented to when this function is invoked as an
12123 * individual interrupt handler in MSI-X multi-message interrupt mode
dea3101e 12124 */
9399627f 12125 if (phba->intr_type == MSIX) {
3772a991
JS
12126 /* Check device state for handling interrupt */
12127 if (lpfc_intr_state_check(phba))
9399627f
JS
12128 return IRQ_NONE;
12129 /* Need to read HA REG for slow-path events */
5b75da2f 12130 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12131 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12132 goto unplug_error;
9399627f
JS
12133 /* If somebody is waiting to handle an eratt don't process it
12134 * here. The brdkill function will do this.
12135 */
12136 if (phba->link_flag & LS_IGNORE_ERATT)
12137 ha_copy &= ~HA_ERATT;
12138 /* Check the need for handling ERATT in interrupt handler */
12139 if (ha_copy & HA_ERATT) {
12140 if (phba->hba_flag & HBA_ERATT_HANDLED)
12141 /* ERATT polling has handled ERATT */
12142 ha_copy &= ~HA_ERATT;
12143 else
12144 /* Indicate interrupt handler handles ERATT */
12145 phba->hba_flag |= HBA_ERATT_HANDLED;
12146 }
a257bf90
JS
12147
12148 /*
12149 * If there is deferred error attention, do not check for any
12150 * interrupt.
12151 */
12152 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12153 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12154 return IRQ_NONE;
12155 }
12156
9399627f 12157 /* Clear up only attention source related to slow-path */
9940b97b
JS
12158 if (lpfc_readl(phba->HCregaddr, &hc_copy))
12159 goto unplug_error;
12160
a747c9ce
JS
12161 writel(hc_copy & ~(HC_MBINT_ENA | HC_R2INT_ENA |
12162 HC_LAINT_ENA | HC_ERINT_ENA),
12163 phba->HCregaddr);
9399627f
JS
12164 writel((ha_copy & (HA_MBATT | HA_R2_CLR_MSK)),
12165 phba->HAregaddr);
a747c9ce 12166 writel(hc_copy, phba->HCregaddr);
9399627f 12167 readl(phba->HAregaddr); /* flush */
5b75da2f 12168 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12169 } else
12170 ha_copy = phba->ha_copy;
dea3101e 12171
dea3101e
JB
12172 work_ha_copy = ha_copy & phba->work_ha_mask;
12173
9399627f 12174 if (work_ha_copy) {
dea3101e
JB
12175 if (work_ha_copy & HA_LATT) {
12176 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
12177 /*
12178 * Turn off Link Attention interrupts
12179 * until CLEAR_LA done
12180 */
5b75da2f 12181 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12182 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
9940b97b
JS
12183 if (lpfc_readl(phba->HCregaddr, &control))
12184 goto unplug_error;
dea3101e
JB
12185 control &= ~HC_LAINT_ENA;
12186 writel(control, phba->HCregaddr);
12187 readl(phba->HCregaddr); /* flush */
5b75da2f 12188 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12189 }
12190 else
12191 work_ha_copy &= ~HA_LATT;
12192 }
12193
9399627f 12194 if (work_ha_copy & ~(HA_ERATT | HA_MBATT | HA_LATT)) {
858c9f6c
JS
12195 /*
12196 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
12197 * the only slow ring.
12198 */
12199 status = (work_ha_copy &
12200 (HA_RXMASK << (4*LPFC_ELS_RING)));
12201 status >>= (4*LPFC_ELS_RING);
12202 if (status & HA_RXMASK) {
5b75da2f 12203 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12204 if (lpfc_readl(phba->HCregaddr, &control))
12205 goto unplug_error;
a58cbd52
JS
12206
12207 lpfc_debugfs_slow_ring_trc(phba,
12208 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
12209 control, status,
12210 (uint32_t)phba->sli.slistat.sli_intr);
12211
858c9f6c 12212 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS
12213 lpfc_debugfs_slow_ring_trc(phba,
12214 "ISR Disable ring:"
12215 "pwork:x%x hawork:x%x wait:x%x",
12216 phba->work_ha, work_ha_copy,
12217 (uint32_t)((unsigned long)
5e9d9b82 12218 &phba->work_waitq));
a58cbd52 12219
858c9f6c
JS
12220 control &=
12221 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB
12222 writel(control, phba->HCregaddr);
12223 readl(phba->HCregaddr); /* flush */
dea3101e 12224 }
a58cbd52
JS
12225 else {
12226 lpfc_debugfs_slow_ring_trc(phba,
12227 "ISR slow ring: pwork:"
12228 "x%x hawork:x%x wait:x%x",
12229 phba->work_ha, work_ha_copy,
12230 (uint32_t)((unsigned long)
5e9d9b82 12231 &phba->work_waitq));
a58cbd52 12232 }
5b75da2f 12233 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12234 }
12235 }
5b75da2f 12236 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90 12237 if (work_ha_copy & HA_ERATT) {
9940b97b
JS
12238 if (lpfc_sli_read_hs(phba))
12239 goto unplug_error;
a257bf90
JS
12240 /*
12241 * Check if there is a deferred error condition
12242 * is active
12243 */
12244 if ((HS_FFER1 & phba->work_hs) &&
12245 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0
JS
12246 HS_FFER6 | HS_FFER7 | HS_FFER8) &
12247 phba->work_hs)) {
a257bf90
JS
12248 phba->hba_flag |= DEFER_ERATT;
12249 /* Clear all interrupt enable conditions */
12250 writel(0, phba->HCregaddr);
12251 readl(phba->HCregaddr);
12252 }
12253 }
12254
9399627f 12255 if ((work_ha_copy & HA_MBATT) && (phba->sli.mbox_active)) {
92d7f7b0 12256 pmb = phba->sli.mbox_active;
04c68496 12257 pmbox = &pmb->u.mb;
34b02dcd 12258 mbox = phba->mbox;
858c9f6c 12259 vport = pmb->vport;
92d7f7b0
JS
12260
12261 /* First check out the status word */
12262 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
12263 if (pmbox->mbxOwner != OWN_HOST) {
5b75da2f 12264 spin_unlock_irqrestore(&phba->hbalock, iflag);
92d7f7b0
JS
12265 /*
12266 * Stray Mailbox Interrupt, mbxCommand <cmd>
12267 * mbxStatus <status>
12268 */
09372820 12269 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
92d7f7b0 12270 LOG_SLI,
e8b62011 12271 "(%d):0304 Stray Mailbox "
92d7f7b0
JS
12272 "Interrupt mbxCommand x%x "
12273 "mbxStatus x%x\n",
e8b62011 12274 (vport ? vport->vpi : 0),
92d7f7b0
JS
12275 pmbox->mbxCommand,
12276 pmbox->mbxStatus);
09372820
JS
12277 /* clear mailbox attention bit */
12278 work_ha_copy &= ~HA_MBATT;
12279 } else {
97eab634 12280 phba->sli.mbox_active = NULL;
5b75da2f 12281 spin_unlock_irqrestore(&phba->hbalock, iflag);
09372820
JS
12282 phba->last_completion_time = jiffies;
12283 del_timer(&phba->sli.mbox_tmo);
09372820
JS
12284 if (pmb->mbox_cmpl) {
12285 lpfc_sli_pcimem_bcopy(mbox, pmbox,
12286 MAILBOX_CMD_SIZE);
7a470277
JS
12287 if (pmb->out_ext_byte_len &&
12288 pmb->context2)
12289 lpfc_sli_pcimem_bcopy(
12290 phba->mbox_ext,
12291 pmb->context2,
12292 pmb->out_ext_byte_len);
09372820
JS
12293 }
12294 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
12295 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
12296
12297 lpfc_debugfs_disc_trc(vport,
12298 LPFC_DISC_TRC_MBOX_VPORT,
12299 "MBOX dflt rpi: : "
12300 "status:x%x rpi:x%x",
12301 (uint32_t)pmbox->mbxStatus,
12302 pmbox->un.varWords[0], 0);
12303
12304 if (!pmbox->mbxStatus) {
12305 mp = (struct lpfc_dmabuf *)
12306 (pmb->context1);
12307 ndlp = (struct lpfc_nodelist *)
12308 pmb->context2;
12309
12310 /* Reg_LOGIN of dflt RPI was
12311 * successful. new lets get
12312 * rid of the RPI using the
12313 * same mbox buffer.
12314 */
12315 lpfc_unreg_login(phba,
12316 vport->vpi,
12317 pmbox->un.varWords[0],
12318 pmb);
12319 pmb->mbox_cmpl =
12320 lpfc_mbx_cmpl_dflt_rpi;
12321 pmb->context1 = mp;
12322 pmb->context2 = ndlp;
12323 pmb->vport = vport;
58da1ffb
JS
12324 rc = lpfc_sli_issue_mbox(phba,
12325 pmb,
12326 MBX_NOWAIT);
12327 if (rc != MBX_BUSY)
12328 lpfc_printf_log(phba,
12329 KERN_ERR,
12330 LOG_MBOX | LOG_SLI,
d7c255b2 12331 "0350 rc should have"
6a9c52cf 12332 "been MBX_BUSY\n");
3772a991
JS
12333 if (rc != MBX_NOT_FINISHED)
12334 goto send_current_mbox;
09372820 12335 }
858c9f6c 12336 }
5b75da2f
JS
12337 spin_lock_irqsave(
12338 &phba->pport->work_port_lock,
12339 iflag);
09372820
JS
12340 phba->pport->work_port_events &=
12341 ~WORKER_MBOX_TMO;
5b75da2f
JS
12342 spin_unlock_irqrestore(
12343 &phba->pport->work_port_lock,
12344 iflag);
09372820 12345 lpfc_mbox_cmpl_put(phba, pmb);
858c9f6c 12346 }
97eab634 12347 } else
5b75da2f 12348 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f 12349
92d7f7b0
JS
12350 if ((work_ha_copy & HA_MBATT) &&
12351 (phba->sli.mbox_active == NULL)) {
858c9f6c 12352send_current_mbox:
92d7f7b0 12353 /* Process next mailbox command if there is one */
58da1ffb
JS
12354 do {
12355 rc = lpfc_sli_issue_mbox(phba, NULL,
12356 MBX_NOWAIT);
12357 } while (rc == MBX_NOT_FINISHED);
12358 if (rc != MBX_SUCCESS)
12359 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
12360 LOG_SLI, "0349 rc should be "
6a9c52cf 12361 "MBX_SUCCESS\n");
92d7f7b0
JS
12362 }
12363
5b75da2f 12364 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12365 phba->work_ha |= work_ha_copy;
5b75da2f 12366 spin_unlock_irqrestore(&phba->hbalock, iflag);
5e9d9b82 12367 lpfc_worker_wake_up(phba);
dea3101e 12368 }
9399627f 12369 return IRQ_HANDLED;
9940b97b
JS
12370unplug_error:
12371 spin_unlock_irqrestore(&phba->hbalock, iflag);
12372 return IRQ_HANDLED;
dea3101e 12373
3772a991 12374} /* lpfc_sli_sp_intr_handler */
9399627f
JS
12375
12376/**
3772a991 12377 * lpfc_sli_fp_intr_handler - Fast-path interrupt handler to SLI-3 device.
9399627f
JS
12378 * @irq: Interrupt number.
12379 * @dev_id: The device context pointer.
12380 *
12381 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12382 * service routine when device with SLI-3 interface spec is enabled with
12383 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
12384 * ring event in the HBA. However, when the device is enabled with either
12385 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
12386 * device-level interrupt handler. When the PCI slot is in error recovery
12387 * or the HBA is undergoing initialization, the interrupt handler will not
12388 * process the interrupt. The SCSI FCP fast-path ring event are handled in
12389 * the intrrupt context. This function is called without any lock held.
12390 * It gets the hbalock to access and update SLI data structures.
9399627f
JS
12391 *
12392 * This function returns IRQ_HANDLED when interrupt is handled else it
12393 * returns IRQ_NONE.
12394 **/
12395irqreturn_t
3772a991 12396lpfc_sli_fp_intr_handler(int irq, void *dev_id)
9399627f
JS
12397{
12398 struct lpfc_hba *phba;
12399 uint32_t ha_copy;
12400 unsigned long status;
5b75da2f 12401 unsigned long iflag;
895427bd 12402 struct lpfc_sli_ring *pring;
9399627f
JS
12403
12404 /* Get the driver's phba structure from the dev_id and
12405 * assume the HBA is not interrupting.
12406 */
12407 phba = (struct lpfc_hba *) dev_id;
12408
12409 if (unlikely(!phba))
12410 return IRQ_NONE;
12411
12412 /*
12413 * Stuff needs to be attented to when this function is invoked as an
12414 * individual interrupt handler in MSI-X multi-message interrupt mode
12415 */
12416 if (phba->intr_type == MSIX) {
3772a991
JS
12417 /* Check device state for handling interrupt */
12418 if (lpfc_intr_state_check(phba))
9399627f
JS
12419 return IRQ_NONE;
12420 /* Need to read HA REG for FCP ring and other ring events */
9940b97b
JS
12421 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12422 return IRQ_HANDLED;
9399627f 12423 /* Clear up only attention source related to fast-path */
5b75da2f 12424 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90
JS
12425 /*
12426 * If there is deferred error attention, do not check for
12427 * any interrupt.
12428 */
12429 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12430 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12431 return IRQ_NONE;
12432 }
9399627f
JS
12433 writel((ha_copy & (HA_R0_CLR_MSK | HA_R1_CLR_MSK)),
12434 phba->HAregaddr);
12435 readl(phba->HAregaddr); /* flush */
5b75da2f 12436 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12437 } else
12438 ha_copy = phba->ha_copy;
dea3101e
JB
12439
12440 /*
9399627f 12441 * Process all events on FCP ring. Take the optimized path for FCP IO.
dea3101e 12442 */
9399627f
JS
12443 ha_copy &= ~(phba->work_ha_mask);
12444
12445 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
dea3101e 12446 status >>= (4*LPFC_FCP_RING);
895427bd 12447 pring = &phba->sli.sli3_ring[LPFC_FCP_RING];
858c9f6c 12448 if (status & HA_RXMASK)
895427bd 12449 lpfc_sli_handle_fast_ring_event(phba, pring, status);
a4bc3379
JS
12450
12451 if (phba->cfg_multi_ring_support == 2) {
12452 /*
9399627f
JS
12453 * Process all events on extra ring. Take the optimized path
12454 * for extra ring IO.
a4bc3379 12455 */
9399627f 12456 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
a4bc3379 12457 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 12458 if (status & HA_RXMASK) {
a4bc3379 12459 lpfc_sli_handle_fast_ring_event(phba,
895427bd 12460 &phba->sli.sli3_ring[LPFC_EXTRA_RING],
a4bc3379
JS
12461 status);
12462 }
12463 }
dea3101e 12464 return IRQ_HANDLED;
3772a991 12465} /* lpfc_sli_fp_intr_handler */
9399627f
JS
12466
12467/**
3772a991 12468 * lpfc_sli_intr_handler - Device-level interrupt handler to SLI-3 device
9399627f
JS
12469 * @irq: Interrupt number.
12470 * @dev_id: The device context pointer.
12471 *
3772a991
JS
12472 * This function is the HBA device-level interrupt handler to device with
12473 * SLI-3 interface spec, called from the PCI layer when either MSI or
12474 * Pin-IRQ interrupt mode is enabled and there is an event in the HBA which
12475 * requires driver attention. This function invokes the slow-path interrupt
12476 * attention handling function and fast-path interrupt attention handling
12477 * function in turn to process the relevant HBA attention events. This
12478 * function is called without any lock held. It gets the hbalock to access
12479 * and update SLI data structures.
9399627f
JS
12480 *
12481 * This function returns IRQ_HANDLED when interrupt is handled, else it
12482 * returns IRQ_NONE.
12483 **/
12484irqreturn_t
3772a991 12485lpfc_sli_intr_handler(int irq, void *dev_id)
9399627f
JS
12486{
12487 struct lpfc_hba *phba;
12488 irqreturn_t sp_irq_rc, fp_irq_rc;
12489 unsigned long status1, status2;
a747c9ce 12490 uint32_t hc_copy;
9399627f
JS
12491
12492 /*
12493 * Get the driver's phba structure from the dev_id and
12494 * assume the HBA is not interrupting.
12495 */
12496 phba = (struct lpfc_hba *) dev_id;
12497
12498 if (unlikely(!phba))
12499 return IRQ_NONE;
12500
3772a991
JS
12501 /* Check device state for handling interrupt */
12502 if (lpfc_intr_state_check(phba))
9399627f
JS
12503 return IRQ_NONE;
12504
12505 spin_lock(&phba->hbalock);
9940b97b
JS
12506 if (lpfc_readl(phba->HAregaddr, &phba->ha_copy)) {
12507 spin_unlock(&phba->hbalock);
12508 return IRQ_HANDLED;
12509 }
12510
9399627f
JS
12511 if (unlikely(!phba->ha_copy)) {
12512 spin_unlock(&phba->hbalock);
12513 return IRQ_NONE;
12514 } else if (phba->ha_copy & HA_ERATT) {
12515 if (phba->hba_flag & HBA_ERATT_HANDLED)
12516 /* ERATT polling has handled ERATT */
12517 phba->ha_copy &= ~HA_ERATT;
12518 else
12519 /* Indicate interrupt handler handles ERATT */
12520 phba->hba_flag |= HBA_ERATT_HANDLED;
12521 }
12522
a257bf90
JS
12523 /*
12524 * If there is deferred error attention, do not check for any interrupt.
12525 */
12526 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
ec21b3b0 12527 spin_unlock(&phba->hbalock);
a257bf90
JS
12528 return IRQ_NONE;
12529 }
12530
9399627f 12531 /* Clear attention sources except link and error attentions */
9940b97b
JS
12532 if (lpfc_readl(phba->HCregaddr, &hc_copy)) {
12533 spin_unlock(&phba->hbalock);
12534 return IRQ_HANDLED;
12535 }
a747c9ce
JS
12536 writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA
12537 | HC_R2INT_ENA | HC_LAINT_ENA | HC_ERINT_ENA),
12538 phba->HCregaddr);
9399627f 12539 writel((phba->ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
a747c9ce 12540 writel(hc_copy, phba->HCregaddr);
9399627f
JS
12541 readl(phba->HAregaddr); /* flush */
12542 spin_unlock(&phba->hbalock);
12543
12544 /*
12545 * Invokes slow-path host attention interrupt handling as appropriate.
12546 */
12547
12548 /* status of events with mailbox and link attention */
12549 status1 = phba->ha_copy & (HA_MBATT | HA_LATT | HA_ERATT);
12550
12551 /* status of events with ELS ring */
12552 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_ELS_RING)));
12553 status2 >>= (4*LPFC_ELS_RING);
12554
12555 if (status1 || (status2 & HA_RXMASK))
3772a991 12556 sp_irq_rc = lpfc_sli_sp_intr_handler(irq, dev_id);
9399627f
JS
12557 else
12558 sp_irq_rc = IRQ_NONE;
12559
12560 /*
12561 * Invoke fast-path host attention interrupt handling as appropriate.
12562 */
12563
12564 /* status of events with FCP ring */
12565 status1 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
12566 status1 >>= (4*LPFC_FCP_RING);
12567
12568 /* status of events with extra ring */
12569 if (phba->cfg_multi_ring_support == 2) {
12570 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
12571 status2 >>= (4*LPFC_EXTRA_RING);
12572 } else
12573 status2 = 0;
12574
12575 if ((status1 & HA_RXMASK) || (status2 & HA_RXMASK))
3772a991 12576 fp_irq_rc = lpfc_sli_fp_intr_handler(irq, dev_id);
9399627f
JS
12577 else
12578 fp_irq_rc = IRQ_NONE;
dea3101e 12579
9399627f
JS
12580 /* Return device-level interrupt handling status */
12581 return (sp_irq_rc == IRQ_HANDLED) ? sp_irq_rc : fp_irq_rc;
3772a991 12582} /* lpfc_sli_intr_handler */
4f774513
JS
12583
12584/**
12585 * lpfc_sli4_fcp_xri_abort_event_proc - Process fcp xri abort event
12586 * @phba: pointer to lpfc hba data structure.
12587 *
12588 * This routine is invoked by the worker thread to process all the pending
12589 * SLI4 FCP abort XRI events.
12590 **/
12591void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *phba)
12592{
12593 struct lpfc_cq_event *cq_event;
12594
12595 /* First, declare the fcp xri abort event has been handled */
12596 spin_lock_irq(&phba->hbalock);
12597 phba->hba_flag &= ~FCP_XRI_ABORT_EVENT;
12598 spin_unlock_irq(&phba->hbalock);
12599 /* Now, handle all the fcp xri abort events */
12600 while (!list_empty(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue)) {
12601 /* Get the first event from the head of the event queue */
12602 spin_lock_irq(&phba->hbalock);
12603 list_remove_head(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
12604 cq_event, struct lpfc_cq_event, list);
12605 spin_unlock_irq(&phba->hbalock);
12606 /* Notify aborted XRI for FCP work queue */
12607 lpfc_sli4_fcp_xri_aborted(phba, &cq_event->cqe.wcqe_axri);
12608 /* Free the event processed back to the free pool */
12609 lpfc_sli4_cq_event_release(phba, cq_event);
12610 }
12611}
12612
12613/**
12614 * lpfc_sli4_els_xri_abort_event_proc - Process els xri abort event
12615 * @phba: pointer to lpfc hba data structure.
12616 *
12617 * This routine is invoked by the worker thread to process all the pending
12618 * SLI4 els abort xri events.
12619 **/
12620void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *phba)
12621{
12622 struct lpfc_cq_event *cq_event;
12623
12624 /* First, declare the els xri abort event has been handled */
12625 spin_lock_irq(&phba->hbalock);
12626 phba->hba_flag &= ~ELS_XRI_ABORT_EVENT;
12627 spin_unlock_irq(&phba->hbalock);
12628 /* Now, handle all the els xri abort events */
12629 while (!list_empty(&phba->sli4_hba.sp_els_xri_aborted_work_queue)) {
12630 /* Get the first event from the head of the event queue */
12631 spin_lock_irq(&phba->hbalock);
12632 list_remove_head(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
12633 cq_event, struct lpfc_cq_event, list);
12634 spin_unlock_irq(&phba->hbalock);
12635 /* Notify aborted XRI for ELS work queue */
12636 lpfc_sli4_els_xri_aborted(phba, &cq_event->cqe.wcqe_axri);
12637 /* Free the event processed back to the free pool */
12638 lpfc_sli4_cq_event_release(phba, cq_event);
12639 }
12640}
12641
341af102
JS
12642/**
12643 * lpfc_sli4_iocb_param_transfer - Transfer pIocbOut and cmpl status to pIocbIn
12644 * @phba: pointer to lpfc hba data structure
12645 * @pIocbIn: pointer to the rspiocbq
12646 * @pIocbOut: pointer to the cmdiocbq
12647 * @wcqe: pointer to the complete wcqe
12648 *
12649 * This routine transfers the fields of a command iocbq to a response iocbq
12650 * by copying all the IOCB fields from command iocbq and transferring the
12651 * completion status information from the complete wcqe.
12652 **/
4f774513 12653static void
341af102
JS
12654lpfc_sli4_iocb_param_transfer(struct lpfc_hba *phba,
12655 struct lpfc_iocbq *pIocbIn,
4f774513
JS
12656 struct lpfc_iocbq *pIocbOut,
12657 struct lpfc_wcqe_complete *wcqe)
12658{
af22741c 12659 int numBdes, i;
341af102 12660 unsigned long iflags;
af22741c
JS
12661 uint32_t status, max_response;
12662 struct lpfc_dmabuf *dmabuf;
12663 struct ulp_bde64 *bpl, bde;
4f774513
JS
12664 size_t offset = offsetof(struct lpfc_iocbq, iocb);
12665
12666 memcpy((char *)pIocbIn + offset, (char *)pIocbOut + offset,
12667 sizeof(struct lpfc_iocbq) - offset);
4f774513 12668 /* Map WCQE parameters into irspiocb parameters */
acd6859b
JS
12669 status = bf_get(lpfc_wcqe_c_status, wcqe);
12670 pIocbIn->iocb.ulpStatus = (status & LPFC_IOCB_STATUS_MASK);
4f774513
JS
12671 if (pIocbOut->iocb_flag & LPFC_IO_FCP)
12672 if (pIocbIn->iocb.ulpStatus == IOSTAT_FCP_RSP_ERROR)
12673 pIocbIn->iocb.un.fcpi.fcpi_parm =
12674 pIocbOut->iocb.un.fcpi.fcpi_parm -
12675 wcqe->total_data_placed;
12676 else
12677 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
695a814e 12678 else {
4f774513 12679 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
af22741c
JS
12680 switch (pIocbOut->iocb.ulpCommand) {
12681 case CMD_ELS_REQUEST64_CR:
12682 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
12683 bpl = (struct ulp_bde64 *)dmabuf->virt;
12684 bde.tus.w = le32_to_cpu(bpl[1].tus.w);
12685 max_response = bde.tus.f.bdeSize;
12686 break;
12687 case CMD_GEN_REQUEST64_CR:
12688 max_response = 0;
12689 if (!pIocbOut->context3)
12690 break;
12691 numBdes = pIocbOut->iocb.un.genreq64.bdl.bdeSize/
12692 sizeof(struct ulp_bde64);
12693 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
12694 bpl = (struct ulp_bde64 *)dmabuf->virt;
12695 for (i = 0; i < numBdes; i++) {
12696 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
12697 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
12698 max_response += bde.tus.f.bdeSize;
12699 }
12700 break;
12701 default:
12702 max_response = wcqe->total_data_placed;
12703 break;
12704 }
12705 if (max_response < wcqe->total_data_placed)
12706 pIocbIn->iocb.un.genreq64.bdl.bdeSize = max_response;
12707 else
12708 pIocbIn->iocb.un.genreq64.bdl.bdeSize =
12709 wcqe->total_data_placed;
695a814e 12710 }
341af102 12711
acd6859b
JS
12712 /* Convert BG errors for completion status */
12713 if (status == CQE_STATUS_DI_ERROR) {
12714 pIocbIn->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
12715
12716 if (bf_get(lpfc_wcqe_c_bg_edir, wcqe))
12717 pIocbIn->iocb.un.ulpWord[4] = IOERR_RX_DMA_FAILED;
12718 else
12719 pIocbIn->iocb.un.ulpWord[4] = IOERR_TX_DMA_FAILED;
12720
12721 pIocbIn->iocb.unsli3.sli3_bg.bgstat = 0;
12722 if (bf_get(lpfc_wcqe_c_bg_ge, wcqe)) /* Guard Check failed */
12723 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12724 BGS_GUARD_ERR_MASK;
12725 if (bf_get(lpfc_wcqe_c_bg_ae, wcqe)) /* App Tag Check failed */
12726 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12727 BGS_APPTAG_ERR_MASK;
12728 if (bf_get(lpfc_wcqe_c_bg_re, wcqe)) /* Ref Tag Check failed */
12729 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12730 BGS_REFTAG_ERR_MASK;
12731
12732 /* Check to see if there was any good data before the error */
12733 if (bf_get(lpfc_wcqe_c_bg_tdpv, wcqe)) {
12734 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12735 BGS_HI_WATER_MARK_PRESENT_MASK;
12736 pIocbIn->iocb.unsli3.sli3_bg.bghm =
12737 wcqe->total_data_placed;
12738 }
12739
12740 /*
12741 * Set ALL the error bits to indicate we don't know what
12742 * type of error it is.
12743 */
12744 if (!pIocbIn->iocb.unsli3.sli3_bg.bgstat)
12745 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12746 (BGS_REFTAG_ERR_MASK | BGS_APPTAG_ERR_MASK |
12747 BGS_GUARD_ERR_MASK);
12748 }
12749
341af102
JS
12750 /* Pick up HBA exchange busy condition */
12751 if (bf_get(lpfc_wcqe_c_xb, wcqe)) {
12752 spin_lock_irqsave(&phba->hbalock, iflags);
12753 pIocbIn->iocb_flag |= LPFC_EXCHANGE_BUSY;
12754 spin_unlock_irqrestore(&phba->hbalock, iflags);
12755 }
4f774513
JS
12756}
12757
45ed1190
JS
12758/**
12759 * lpfc_sli4_els_wcqe_to_rspiocbq - Get response iocbq from els wcqe
12760 * @phba: Pointer to HBA context object.
12761 * @wcqe: Pointer to work-queue completion queue entry.
12762 *
12763 * This routine handles an ELS work-queue completion event and construct
12764 * a pseudo response ELS IODBQ from the SLI4 ELS WCQE for the common
12765 * discovery engine to handle.
12766 *
12767 * Return: Pointer to the receive IOCBQ, NULL otherwise.
12768 **/
12769static struct lpfc_iocbq *
12770lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *phba,
12771 struct lpfc_iocbq *irspiocbq)
12772{
895427bd 12773 struct lpfc_sli_ring *pring;
45ed1190
JS
12774 struct lpfc_iocbq *cmdiocbq;
12775 struct lpfc_wcqe_complete *wcqe;
12776 unsigned long iflags;
12777
895427bd 12778 pring = lpfc_phba_elsring(phba);
1234a6d5
DK
12779 if (unlikely(!pring))
12780 return NULL;
895427bd 12781
45ed1190 12782 wcqe = &irspiocbq->cq_event.cqe.wcqe_cmpl;
7e56aa25 12783 spin_lock_irqsave(&pring->ring_lock, iflags);
45ed1190
JS
12784 pring->stats.iocb_event++;
12785 /* Look up the ELS command IOCB and create pseudo response IOCB */
12786 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
12787 bf_get(lpfc_wcqe_c_request_tag, wcqe));
45ed1190 12788 if (unlikely(!cmdiocbq)) {
401bb416 12789 spin_unlock_irqrestore(&pring->ring_lock, iflags);
45ed1190
JS
12790 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
12791 "0386 ELS complete with no corresponding "
401bb416
DK
12792 "cmdiocb: 0x%x 0x%x 0x%x 0x%x\n",
12793 wcqe->word0, wcqe->total_data_placed,
12794 wcqe->parameter, wcqe->word3);
45ed1190
JS
12795 lpfc_sli_release_iocbq(phba, irspiocbq);
12796 return NULL;
12797 }
12798
401bb416
DK
12799 /* Put the iocb back on the txcmplq */
12800 lpfc_sli_ringtxcmpl_put(phba, pring, cmdiocbq);
12801 spin_unlock_irqrestore(&pring->ring_lock, iflags);
12802
45ed1190 12803 /* Fake the irspiocbq and copy necessary response information */
341af102 12804 lpfc_sli4_iocb_param_transfer(phba, irspiocbq, cmdiocbq, wcqe);
45ed1190
JS
12805
12806 return irspiocbq;
12807}
12808
8a5ca109
JS
12809inline struct lpfc_cq_event *
12810lpfc_cq_event_setup(struct lpfc_hba *phba, void *entry, int size)
12811{
12812 struct lpfc_cq_event *cq_event;
12813
12814 /* Allocate a new internal CQ_EVENT entry */
12815 cq_event = lpfc_sli4_cq_event_alloc(phba);
12816 if (!cq_event) {
12817 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
12818 "0602 Failed to alloc CQ_EVENT entry\n");
12819 return NULL;
12820 }
12821
12822 /* Move the CQE into the event */
12823 memcpy(&cq_event->cqe, entry, size);
12824 return cq_event;
12825}
12826
04c68496
JS
12827/**
12828 * lpfc_sli4_sp_handle_async_event - Handle an asynchroous event
12829 * @phba: Pointer to HBA context object.
12830 * @cqe: Pointer to mailbox completion queue entry.
12831 *
12832 * This routine process a mailbox completion queue entry with asynchrous
12833 * event.
12834 *
12835 * Return: true if work posted to worker thread, otherwise false.
12836 **/
12837static bool
12838lpfc_sli4_sp_handle_async_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
12839{
12840 struct lpfc_cq_event *cq_event;
12841 unsigned long iflags;
12842
12843 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
12844 "0392 Async Event: word0:x%x, word1:x%x, "
12845 "word2:x%x, word3:x%x\n", mcqe->word0,
12846 mcqe->mcqe_tag0, mcqe->mcqe_tag1, mcqe->trailer);
12847
8a5ca109
JS
12848 cq_event = lpfc_cq_event_setup(phba, mcqe, sizeof(struct lpfc_mcqe));
12849 if (!cq_event)
04c68496 12850 return false;
04c68496
JS
12851 spin_lock_irqsave(&phba->hbalock, iflags);
12852 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_asynce_work_queue);
12853 /* Set the async event flag */
12854 phba->hba_flag |= ASYNC_EVENT;
12855 spin_unlock_irqrestore(&phba->hbalock, iflags);
12856
12857 return true;
12858}
12859
12860/**
12861 * lpfc_sli4_sp_handle_mbox_event - Handle a mailbox completion event
12862 * @phba: Pointer to HBA context object.
12863 * @cqe: Pointer to mailbox completion queue entry.
12864 *
12865 * This routine process a mailbox completion queue entry with mailbox
12866 * completion event.
12867 *
12868 * Return: true if work posted to worker thread, otherwise false.
12869 **/
12870static bool
12871lpfc_sli4_sp_handle_mbox_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
12872{
12873 uint32_t mcqe_status;
12874 MAILBOX_t *mbox, *pmbox;
12875 struct lpfc_mqe *mqe;
12876 struct lpfc_vport *vport;
12877 struct lpfc_nodelist *ndlp;
12878 struct lpfc_dmabuf *mp;
12879 unsigned long iflags;
12880 LPFC_MBOXQ_t *pmb;
12881 bool workposted = false;
12882 int rc;
12883
12884 /* If not a mailbox complete MCQE, out by checking mailbox consume */
12885 if (!bf_get(lpfc_trailer_completed, mcqe))
12886 goto out_no_mqe_complete;
12887
12888 /* Get the reference to the active mbox command */
12889 spin_lock_irqsave(&phba->hbalock, iflags);
12890 pmb = phba->sli.mbox_active;
12891 if (unlikely(!pmb)) {
12892 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
12893 "1832 No pending MBOX command to handle\n");
12894 spin_unlock_irqrestore(&phba->hbalock, iflags);
12895 goto out_no_mqe_complete;
12896 }
12897 spin_unlock_irqrestore(&phba->hbalock, iflags);
12898 mqe = &pmb->u.mqe;
12899 pmbox = (MAILBOX_t *)&pmb->u.mqe;
12900 mbox = phba->mbox;
12901 vport = pmb->vport;
12902
12903 /* Reset heartbeat timer */
12904 phba->last_completion_time = jiffies;
12905 del_timer(&phba->sli.mbox_tmo);
12906
12907 /* Move mbox data to caller's mailbox region, do endian swapping */
12908 if (pmb->mbox_cmpl && mbox)
48f8fdb4 12909 lpfc_sli4_pcimem_bcopy(mbox, mqe, sizeof(struct lpfc_mqe));
04c68496 12910
73d91e50
JS
12911 /*
12912 * For mcqe errors, conditionally move a modified error code to
12913 * the mbox so that the error will not be missed.
12914 */
12915 mcqe_status = bf_get(lpfc_mcqe_status, mcqe);
12916 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
12917 if (bf_get(lpfc_mqe_status, mqe) == MBX_SUCCESS)
12918 bf_set(lpfc_mqe_status, mqe,
12919 (LPFC_MBX_ERROR_RANGE | mcqe_status));
12920 }
04c68496
JS
12921 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
12922 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
12923 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_MBOX_VPORT,
12924 "MBOX dflt rpi: status:x%x rpi:x%x",
12925 mcqe_status,
12926 pmbox->un.varWords[0], 0);
12927 if (mcqe_status == MB_CQE_STATUS_SUCCESS) {
12928 mp = (struct lpfc_dmabuf *)(pmb->context1);
12929 ndlp = (struct lpfc_nodelist *)pmb->context2;
12930 /* Reg_LOGIN of dflt RPI was successful. Now lets get
12931 * RID of the PPI using the same mbox buffer.
12932 */
12933 lpfc_unreg_login(phba, vport->vpi,
12934 pmbox->un.varWords[0], pmb);
12935 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
12936 pmb->context1 = mp;
12937 pmb->context2 = ndlp;
12938 pmb->vport = vport;
12939 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
12940 if (rc != MBX_BUSY)
12941 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
12942 LOG_SLI, "0385 rc should "
12943 "have been MBX_BUSY\n");
12944 if (rc != MBX_NOT_FINISHED)
12945 goto send_current_mbox;
12946 }
12947 }
12948 spin_lock_irqsave(&phba->pport->work_port_lock, iflags);
12949 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
12950 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflags);
12951
12952 /* There is mailbox completion work to do */
12953 spin_lock_irqsave(&phba->hbalock, iflags);
12954 __lpfc_mbox_cmpl_put(phba, pmb);
12955 phba->work_ha |= HA_MBATT;
12956 spin_unlock_irqrestore(&phba->hbalock, iflags);
12957 workposted = true;
12958
12959send_current_mbox:
12960 spin_lock_irqsave(&phba->hbalock, iflags);
12961 /* Release the mailbox command posting token */
12962 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
12963 /* Setting active mailbox pointer need to be in sync to flag clear */
12964 phba->sli.mbox_active = NULL;
12965 spin_unlock_irqrestore(&phba->hbalock, iflags);
12966 /* Wake up worker thread to post the next pending mailbox command */
12967 lpfc_worker_wake_up(phba);
12968out_no_mqe_complete:
12969 if (bf_get(lpfc_trailer_consumed, mcqe))
12970 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
12971 return workposted;
12972}
12973
12974/**
12975 * lpfc_sli4_sp_handle_mcqe - Process a mailbox completion queue entry
12976 * @phba: Pointer to HBA context object.
12977 * @cqe: Pointer to mailbox completion queue entry.
12978 *
12979 * This routine process a mailbox completion queue entry, it invokes the
12980 * proper mailbox complete handling or asynchrous event handling routine
12981 * according to the MCQE's async bit.
12982 *
12983 * Return: true if work posted to worker thread, otherwise false.
12984 **/
12985static bool
12986lpfc_sli4_sp_handle_mcqe(struct lpfc_hba *phba, struct lpfc_cqe *cqe)
12987{
12988 struct lpfc_mcqe mcqe;
12989 bool workposted;
12990
12991 /* Copy the mailbox MCQE and convert endian order as needed */
48f8fdb4 12992 lpfc_sli4_pcimem_bcopy(cqe, &mcqe, sizeof(struct lpfc_mcqe));
04c68496
JS
12993
12994 /* Invoke the proper event handling routine */
12995 if (!bf_get(lpfc_trailer_async, &mcqe))
12996 workposted = lpfc_sli4_sp_handle_mbox_event(phba, &mcqe);
12997 else
12998 workposted = lpfc_sli4_sp_handle_async_event(phba, &mcqe);
12999 return workposted;
13000}
13001
4f774513
JS
13002/**
13003 * lpfc_sli4_sp_handle_els_wcqe - Handle els work-queue completion event
13004 * @phba: Pointer to HBA context object.
2a76a283 13005 * @cq: Pointer to associated CQ
4f774513
JS
13006 * @wcqe: Pointer to work-queue completion queue entry.
13007 *
13008 * This routine handles an ELS work-queue completion event.
13009 *
13010 * Return: true if work posted to worker thread, otherwise false.
13011 **/
13012static bool
2a76a283 13013lpfc_sli4_sp_handle_els_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13014 struct lpfc_wcqe_complete *wcqe)
13015{
4f774513
JS
13016 struct lpfc_iocbq *irspiocbq;
13017 unsigned long iflags;
2a76a283 13018 struct lpfc_sli_ring *pring = cq->pring;
0e9bb8d7
JS
13019 int txq_cnt = 0;
13020 int txcmplq_cnt = 0;
13021 int fcp_txcmplq_cnt = 0;
4f774513 13022
11f0e34f
JS
13023 /* Check for response status */
13024 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13025 /* Log the error status */
13026 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13027 "0357 ELS CQE error: status=x%x: "
13028 "CQE: %08x %08x %08x %08x\n",
13029 bf_get(lpfc_wcqe_c_status, wcqe),
13030 wcqe->word0, wcqe->total_data_placed,
13031 wcqe->parameter, wcqe->word3);
13032 }
13033
45ed1190 13034 /* Get an irspiocbq for later ELS response processing use */
4f774513
JS
13035 irspiocbq = lpfc_sli_get_iocbq(phba);
13036 if (!irspiocbq) {
0e9bb8d7
JS
13037 if (!list_empty(&pring->txq))
13038 txq_cnt++;
13039 if (!list_empty(&pring->txcmplq))
13040 txcmplq_cnt++;
4f774513 13041 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2a9bf3d0
JS
13042 "0387 NO IOCBQ data: txq_cnt=%d iocb_cnt=%d "
13043 "fcp_txcmplq_cnt=%d, els_txcmplq_cnt=%d\n",
0e9bb8d7
JS
13044 txq_cnt, phba->iocb_cnt,
13045 fcp_txcmplq_cnt,
13046 txcmplq_cnt);
45ed1190 13047 return false;
4f774513 13048 }
4f774513 13049
45ed1190
JS
13050 /* Save off the slow-path queue event for work thread to process */
13051 memcpy(&irspiocbq->cq_event.cqe.wcqe_cmpl, wcqe, sizeof(*wcqe));
4f774513 13052 spin_lock_irqsave(&phba->hbalock, iflags);
4d9ab994 13053 list_add_tail(&irspiocbq->cq_event.list,
45ed1190
JS
13054 &phba->sli4_hba.sp_queue_event);
13055 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513 13056 spin_unlock_irqrestore(&phba->hbalock, iflags);
4f774513 13057
45ed1190 13058 return true;
4f774513
JS
13059}
13060
13061/**
13062 * lpfc_sli4_sp_handle_rel_wcqe - Handle slow-path WQ entry consumed event
13063 * @phba: Pointer to HBA context object.
13064 * @wcqe: Pointer to work-queue completion queue entry.
13065 *
3f8b6fb7 13066 * This routine handles slow-path WQ entry consumed event by invoking the
4f774513
JS
13067 * proper WQ release routine to the slow-path WQ.
13068 **/
13069static void
13070lpfc_sli4_sp_handle_rel_wcqe(struct lpfc_hba *phba,
13071 struct lpfc_wcqe_release *wcqe)
13072{
2e90f4b5
JS
13073 /* sanity check on queue memory */
13074 if (unlikely(!phba->sli4_hba.els_wq))
13075 return;
4f774513
JS
13076 /* Check for the slow-path ELS work queue */
13077 if (bf_get(lpfc_wcqe_r_wq_id, wcqe) == phba->sli4_hba.els_wq->queue_id)
13078 lpfc_sli4_wq_release(phba->sli4_hba.els_wq,
13079 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
13080 else
13081 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13082 "2579 Slow-path wqe consume event carries "
13083 "miss-matched qid: wcqe-qid=x%x, sp-qid=x%x\n",
13084 bf_get(lpfc_wcqe_r_wqe_index, wcqe),
13085 phba->sli4_hba.els_wq->queue_id);
13086}
13087
13088/**
13089 * lpfc_sli4_sp_handle_abort_xri_wcqe - Handle a xri abort event
13090 * @phba: Pointer to HBA context object.
13091 * @cq: Pointer to a WQ completion queue.
13092 * @wcqe: Pointer to work-queue completion queue entry.
13093 *
13094 * This routine handles an XRI abort event.
13095 *
13096 * Return: true if work posted to worker thread, otherwise false.
13097 **/
13098static bool
13099lpfc_sli4_sp_handle_abort_xri_wcqe(struct lpfc_hba *phba,
13100 struct lpfc_queue *cq,
13101 struct sli4_wcqe_xri_aborted *wcqe)
13102{
13103 bool workposted = false;
13104 struct lpfc_cq_event *cq_event;
13105 unsigned long iflags;
13106
4f774513
JS
13107 switch (cq->subtype) {
13108 case LPFC_FCP:
8a5ca109
JS
13109 cq_event = lpfc_cq_event_setup(
13110 phba, wcqe, sizeof(struct sli4_wcqe_xri_aborted));
13111 if (!cq_event)
13112 return false;
4f774513
JS
13113 spin_lock_irqsave(&phba->hbalock, iflags);
13114 list_add_tail(&cq_event->list,
13115 &phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
13116 /* Set the fcp xri abort event flag */
13117 phba->hba_flag |= FCP_XRI_ABORT_EVENT;
13118 spin_unlock_irqrestore(&phba->hbalock, iflags);
13119 workposted = true;
13120 break;
422c4cb7 13121 case LPFC_NVME_LS: /* NVME LS uses ELS resources */
4f774513 13122 case LPFC_ELS:
8a5ca109
JS
13123 cq_event = lpfc_cq_event_setup(
13124 phba, wcqe, sizeof(struct sli4_wcqe_xri_aborted));
13125 if (!cq_event)
13126 return false;
4f774513
JS
13127 spin_lock_irqsave(&phba->hbalock, iflags);
13128 list_add_tail(&cq_event->list,
13129 &phba->sli4_hba.sp_els_xri_aborted_work_queue);
13130 /* Set the els xri abort event flag */
13131 phba->hba_flag |= ELS_XRI_ABORT_EVENT;
13132 spin_unlock_irqrestore(&phba->hbalock, iflags);
13133 workposted = true;
13134 break;
318083ad 13135 case LPFC_NVME:
8a5ca109
JS
13136 /* Notify aborted XRI for NVME work queue */
13137 if (phba->nvmet_support)
13138 lpfc_sli4_nvmet_xri_aborted(phba, wcqe);
13139 else
13140 lpfc_sli4_nvme_xri_aborted(phba, wcqe);
13141
13142 workposted = false;
318083ad 13143 break;
4f774513
JS
13144 default:
13145 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
318083ad
JS
13146 "0603 Invalid CQ subtype %d: "
13147 "%08x %08x %08x %08x\n",
13148 cq->subtype, wcqe->word0, wcqe->parameter,
13149 wcqe->word2, wcqe->word3);
4f774513
JS
13150 workposted = false;
13151 break;
13152 }
13153 return workposted;
13154}
13155
4f774513
JS
13156/**
13157 * lpfc_sli4_sp_handle_rcqe - Process a receive-queue completion queue entry
13158 * @phba: Pointer to HBA context object.
13159 * @rcqe: Pointer to receive-queue completion queue entry.
13160 *
13161 * This routine process a receive-queue completion queue entry.
13162 *
13163 * Return: true if work posted to worker thread, otherwise false.
13164 **/
13165static bool
4d9ab994 13166lpfc_sli4_sp_handle_rcqe(struct lpfc_hba *phba, struct lpfc_rcqe *rcqe)
4f774513 13167{
4f774513 13168 bool workposted = false;
895427bd 13169 struct fc_frame_header *fc_hdr;
4f774513
JS
13170 struct lpfc_queue *hrq = phba->sli4_hba.hdr_rq;
13171 struct lpfc_queue *drq = phba->sli4_hba.dat_rq;
547077a4 13172 struct lpfc_nvmet_tgtport *tgtp;
4f774513 13173 struct hbq_dmabuf *dma_buf;
7851fe2c 13174 uint32_t status, rq_id;
4f774513
JS
13175 unsigned long iflags;
13176
2e90f4b5
JS
13177 /* sanity check on queue memory */
13178 if (unlikely(!hrq) || unlikely(!drq))
13179 return workposted;
13180
7851fe2c
JS
13181 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13182 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13183 else
13184 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13185 if (rq_id != hrq->queue_id)
4f774513
JS
13186 goto out;
13187
4d9ab994 13188 status = bf_get(lpfc_rcqe_status, rcqe);
4f774513
JS
13189 switch (status) {
13190 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13191 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13192 "2537 Receive Frame Truncated!!\n");
13193 case FC_STATUS_RQ_SUCCESS:
13194 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13195 lpfc_sli4_rq_release(hrq, drq);
4f774513
JS
13196 dma_buf = lpfc_sli_hbqbuf_get(&phba->hbqs[0].hbq_buffer_list);
13197 if (!dma_buf) {
b84daac9 13198 hrq->RQ_no_buf_found++;
4f774513
JS
13199 spin_unlock_irqrestore(&phba->hbalock, iflags);
13200 goto out;
13201 }
b84daac9 13202 hrq->RQ_rcv_buf++;
547077a4 13203 hrq->RQ_buf_posted--;
4d9ab994 13204 memcpy(&dma_buf->cq_event.cqe.rcqe_cmpl, rcqe, sizeof(*rcqe));
895427bd
JS
13205
13206 /* If a NVME LS event (type 0x28), treat it as Fast path */
13207 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13208
4f774513 13209 /* save off the frame for the word thread to process */
4d9ab994 13210 list_add_tail(&dma_buf->cq_event.list,
45ed1190 13211 &phba->sli4_hba.sp_queue_event);
4f774513 13212 /* Frame received */
45ed1190 13213 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513
JS
13214 spin_unlock_irqrestore(&phba->hbalock, iflags);
13215 workposted = true;
13216 break;
4f774513 13217 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13218 if (phba->nvmet_support) {
13219 tgtp = phba->targetport->private;
13220 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13221 "6402 RQE Error x%x, posted %d err_cnt "
13222 "%d: %x %x %x\n",
13223 status, hrq->RQ_buf_posted,
13224 hrq->RQ_no_posted_buf,
13225 atomic_read(&tgtp->rcv_fcp_cmd_in),
13226 atomic_read(&tgtp->rcv_fcp_cmd_out),
13227 atomic_read(&tgtp->xmt_fcp_release));
13228 }
13229 /* fallthrough */
13230
13231 case FC_STATUS_INSUFF_BUF_NEED_BUF:
b84daac9 13232 hrq->RQ_no_posted_buf++;
4f774513
JS
13233 /* Post more buffers if possible */
13234 spin_lock_irqsave(&phba->hbalock, iflags);
13235 phba->hba_flag |= HBA_POST_RECEIVE_BUFFER;
13236 spin_unlock_irqrestore(&phba->hbalock, iflags);
13237 workposted = true;
13238 break;
13239 }
13240out:
13241 return workposted;
4f774513
JS
13242}
13243
4d9ab994
JS
13244/**
13245 * lpfc_sli4_sp_handle_cqe - Process a slow path completion queue entry
13246 * @phba: Pointer to HBA context object.
13247 * @cq: Pointer to the completion queue.
13248 * @wcqe: Pointer to a completion queue entry.
13249 *
25985edc 13250 * This routine process a slow-path work-queue or receive queue completion queue
4d9ab994
JS
13251 * entry.
13252 *
13253 * Return: true if work posted to worker thread, otherwise false.
13254 **/
13255static bool
13256lpfc_sli4_sp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13257 struct lpfc_cqe *cqe)
13258{
45ed1190 13259 struct lpfc_cqe cqevt;
4d9ab994
JS
13260 bool workposted = false;
13261
13262 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 13263 lpfc_sli4_pcimem_bcopy(cqe, &cqevt, sizeof(struct lpfc_cqe));
4d9ab994
JS
13264
13265 /* Check and process for different type of WCQE and dispatch */
45ed1190 13266 switch (bf_get(lpfc_cqe_code, &cqevt)) {
4d9ab994 13267 case CQE_CODE_COMPL_WQE:
45ed1190 13268 /* Process the WQ/RQ complete event */
bc73905a 13269 phba->last_completion_time = jiffies;
2a76a283 13270 workposted = lpfc_sli4_sp_handle_els_wcqe(phba, cq,
45ed1190 13271 (struct lpfc_wcqe_complete *)&cqevt);
4d9ab994
JS
13272 break;
13273 case CQE_CODE_RELEASE_WQE:
13274 /* Process the WQ release event */
13275 lpfc_sli4_sp_handle_rel_wcqe(phba,
45ed1190 13276 (struct lpfc_wcqe_release *)&cqevt);
4d9ab994
JS
13277 break;
13278 case CQE_CODE_XRI_ABORTED:
13279 /* Process the WQ XRI abort event */
bc73905a 13280 phba->last_completion_time = jiffies;
4d9ab994 13281 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
45ed1190 13282 (struct sli4_wcqe_xri_aborted *)&cqevt);
4d9ab994
JS
13283 break;
13284 case CQE_CODE_RECEIVE:
7851fe2c 13285 case CQE_CODE_RECEIVE_V1:
4d9ab994 13286 /* Process the RQ event */
bc73905a 13287 phba->last_completion_time = jiffies;
4d9ab994 13288 workposted = lpfc_sli4_sp_handle_rcqe(phba,
45ed1190 13289 (struct lpfc_rcqe *)&cqevt);
4d9ab994
JS
13290 break;
13291 default:
13292 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13293 "0388 Not a valid WCQE code: x%x\n",
45ed1190 13294 bf_get(lpfc_cqe_code, &cqevt));
4d9ab994
JS
13295 break;
13296 }
13297 return workposted;
13298}
13299
4f774513
JS
13300/**
13301 * lpfc_sli4_sp_handle_eqe - Process a slow-path event queue entry
13302 * @phba: Pointer to HBA context object.
13303 * @eqe: Pointer to fast-path event queue entry.
13304 *
13305 * This routine process a event queue entry from the slow-path event queue.
13306 * It will check the MajorCode and MinorCode to determine this is for a
13307 * completion event on a completion queue, if not, an error shall be logged
13308 * and just return. Otherwise, it will get to the corresponding completion
13309 * queue and process all the entries on that completion queue, rearm the
13310 * completion queue, and then return.
13311 *
13312 **/
f485c18d 13313static void
67d12733
JS
13314lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
13315 struct lpfc_queue *speq)
4f774513 13316{
67d12733 13317 struct lpfc_queue *cq = NULL, *childq;
4f774513
JS
13318 uint16_t cqid;
13319
4f774513 13320 /* Get the reference to the corresponding CQ */
cb5172ea 13321 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
4f774513 13322
4f774513
JS
13323 list_for_each_entry(childq, &speq->child_list, list) {
13324 if (childq->queue_id == cqid) {
13325 cq = childq;
13326 break;
13327 }
13328 }
13329 if (unlikely(!cq)) {
75baf696
JS
13330 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
13331 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13332 "0365 Slow-path CQ identifier "
13333 "(%d) does not exist\n", cqid);
f485c18d 13334 return;
4f774513
JS
13335 }
13336
895427bd
JS
13337 /* Save EQ associated with this CQ */
13338 cq->assoc_qp = speq;
13339
f485c18d
DK
13340 if (!queue_work(phba->wq, &cq->spwork))
13341 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13342 "0390 Cannot schedule soft IRQ "
13343 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
13344 cqid, cq->queue_id, smp_processor_id());
13345}
13346
13347/**
13348 * lpfc_sli4_sp_process_cq - Process a slow-path event queue entry
13349 * @phba: Pointer to HBA context object.
13350 *
13351 * This routine process a event queue entry from the slow-path event queue.
13352 * It will check the MajorCode and MinorCode to determine this is for a
13353 * completion event on a completion queue, if not, an error shall be logged
13354 * and just return. Otherwise, it will get to the corresponding completion
13355 * queue and process all the entries on that completion queue, rearm the
13356 * completion queue, and then return.
13357 *
13358 **/
13359static void
13360lpfc_sli4_sp_process_cq(struct work_struct *work)
13361{
13362 struct lpfc_queue *cq =
13363 container_of(work, struct lpfc_queue, spwork);
13364 struct lpfc_hba *phba = cq->phba;
13365 struct lpfc_cqe *cqe;
13366 bool workposted = false;
13367 int ccount = 0;
13368
4f774513
JS
13369 /* Process all the entries to the CQ */
13370 switch (cq->type) {
13371 case LPFC_MCQ:
13372 while ((cqe = lpfc_sli4_cq_get(cq))) {
13373 workposted |= lpfc_sli4_sp_handle_mcqe(phba, cqe);
f485c18d 13374 if (!(++ccount % cq->entry_repost))
7869da18 13375 break;
b84daac9 13376 cq->CQ_mbox++;
4f774513
JS
13377 }
13378 break;
13379 case LPFC_WCQ:
13380 while ((cqe = lpfc_sli4_cq_get(cq))) {
c8a4ce0b
DK
13381 if (cq->subtype == LPFC_FCP ||
13382 cq->subtype == LPFC_NVME) {
13383#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13384 if (phba->ktime_on)
13385 cq->isr_timestamp = ktime_get_ns();
13386 else
13387 cq->isr_timestamp = 0;
13388#endif
895427bd 13389 workposted |= lpfc_sli4_fp_handle_cqe(phba, cq,
0558056c 13390 cqe);
c8a4ce0b 13391 } else {
0558056c
JS
13392 workposted |= lpfc_sli4_sp_handle_cqe(phba, cq,
13393 cqe);
c8a4ce0b 13394 }
f485c18d 13395 if (!(++ccount % cq->entry_repost))
7869da18 13396 break;
4f774513 13397 }
b84daac9
JS
13398
13399 /* Track the max number of CQEs processed in 1 EQ */
f485c18d
DK
13400 if (ccount > cq->CQ_max_cqe)
13401 cq->CQ_max_cqe = ccount;
4f774513
JS
13402 break;
13403 default:
13404 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13405 "0370 Invalid completion queue type (%d)\n",
13406 cq->type);
f485c18d 13407 return;
4f774513
JS
13408 }
13409
13410 /* Catch the no cq entry condition, log an error */
f485c18d 13411 if (unlikely(ccount == 0))
4f774513
JS
13412 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13413 "0371 No entry from the CQ: identifier "
13414 "(x%x), type (%d)\n", cq->queue_id, cq->type);
13415
13416 /* In any case, flash and re-arm the RCQ */
b71413dd 13417 phba->sli4_hba.sli4_cq_release(cq, LPFC_QUEUE_REARM);
4f774513
JS
13418
13419 /* wake up worker thread if there are works to be done */
13420 if (workposted)
13421 lpfc_worker_wake_up(phba);
13422}
13423
13424/**
13425 * lpfc_sli4_fp_handle_fcp_wcqe - Process fast-path work queue completion entry
2a76a283
JS
13426 * @phba: Pointer to HBA context object.
13427 * @cq: Pointer to associated CQ
13428 * @wcqe: Pointer to work-queue completion queue entry.
4f774513
JS
13429 *
13430 * This routine process a fast-path work queue completion entry from fast-path
13431 * event queue for FCP command response completion.
13432 **/
13433static void
2a76a283 13434lpfc_sli4_fp_handle_fcp_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13435 struct lpfc_wcqe_complete *wcqe)
13436{
2a76a283 13437 struct lpfc_sli_ring *pring = cq->pring;
4f774513
JS
13438 struct lpfc_iocbq *cmdiocbq;
13439 struct lpfc_iocbq irspiocbq;
13440 unsigned long iflags;
13441
4f774513
JS
13442 /* Check for response status */
13443 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13444 /* If resource errors reported from HBA, reduce queue
13445 * depth of the SCSI device.
13446 */
e3d2b802
JS
13447 if (((bf_get(lpfc_wcqe_c_status, wcqe) ==
13448 IOSTAT_LOCAL_REJECT)) &&
13449 ((wcqe->parameter & IOERR_PARAM_MASK) ==
13450 IOERR_NO_RESOURCES))
4f774513 13451 phba->lpfc_rampdown_queue_depth(phba);
e3d2b802 13452
4f774513 13453 /* Log the error status */
11f0e34f
JS
13454 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13455 "0373 FCP CQE error: status=x%x: "
13456 "CQE: %08x %08x %08x %08x\n",
4f774513 13457 bf_get(lpfc_wcqe_c_status, wcqe),
11f0e34f
JS
13458 wcqe->word0, wcqe->total_data_placed,
13459 wcqe->parameter, wcqe->word3);
4f774513
JS
13460 }
13461
13462 /* Look up the FCP command IOCB and create pseudo response IOCB */
7e56aa25
JS
13463 spin_lock_irqsave(&pring->ring_lock, iflags);
13464 pring->stats.iocb_event++;
4f774513
JS
13465 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13466 bf_get(lpfc_wcqe_c_request_tag, wcqe));
7e56aa25 13467 spin_unlock_irqrestore(&pring->ring_lock, iflags);
4f774513
JS
13468 if (unlikely(!cmdiocbq)) {
13469 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13470 "0374 FCP complete with no corresponding "
13471 "cmdiocb: iotag (%d)\n",
13472 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13473 return;
13474 }
c8a4ce0b
DK
13475#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13476 cmdiocbq->isr_timestamp = cq->isr_timestamp;
13477#endif
895427bd
JS
13478 if (cmdiocbq->iocb_cmpl == NULL) {
13479 if (cmdiocbq->wqe_cmpl) {
13480 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13481 spin_lock_irqsave(&phba->hbalock, iflags);
13482 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13483 spin_unlock_irqrestore(&phba->hbalock, iflags);
13484 }
13485
13486 /* Pass the cmd_iocb and the wcqe to the upper layer */
13487 (cmdiocbq->wqe_cmpl)(phba, cmdiocbq, wcqe);
13488 return;
13489 }
4f774513
JS
13490 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13491 "0375 FCP cmdiocb not callback function "
13492 "iotag: (%d)\n",
13493 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13494 return;
13495 }
13496
13497 /* Fake the irspiocb and copy necessary response information */
341af102 13498 lpfc_sli4_iocb_param_transfer(phba, &irspiocbq, cmdiocbq, wcqe);
4f774513 13499
0f65ff68
JS
13500 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13501 spin_lock_irqsave(&phba->hbalock, iflags);
13502 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13503 spin_unlock_irqrestore(&phba->hbalock, iflags);
13504 }
13505
4f774513
JS
13506 /* Pass the cmd_iocb and the rsp state to the upper layer */
13507 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, &irspiocbq);
13508}
13509
13510/**
13511 * lpfc_sli4_fp_handle_rel_wcqe - Handle fast-path WQ entry consumed event
13512 * @phba: Pointer to HBA context object.
13513 * @cq: Pointer to completion queue.
13514 * @wcqe: Pointer to work-queue completion queue entry.
13515 *
3f8b6fb7 13516 * This routine handles an fast-path WQ entry consumed event by invoking the
4f774513
JS
13517 * proper WQ release routine to the slow-path WQ.
13518 **/
13519static void
13520lpfc_sli4_fp_handle_rel_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13521 struct lpfc_wcqe_release *wcqe)
13522{
13523 struct lpfc_queue *childwq;
13524 bool wqid_matched = false;
895427bd 13525 uint16_t hba_wqid;
4f774513
JS
13526
13527 /* Check for fast-path FCP work queue release */
895427bd 13528 hba_wqid = bf_get(lpfc_wcqe_r_wq_id, wcqe);
4f774513 13529 list_for_each_entry(childwq, &cq->child_list, list) {
895427bd 13530 if (childwq->queue_id == hba_wqid) {
4f774513
JS
13531 lpfc_sli4_wq_release(childwq,
13532 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
6e8e1c14
JS
13533 if (childwq->q_flag & HBA_NVMET_WQFULL)
13534 lpfc_nvmet_wqfull_process(phba, childwq);
4f774513
JS
13535 wqid_matched = true;
13536 break;
13537 }
13538 }
13539 /* Report warning log message if no match found */
13540 if (wqid_matched != true)
13541 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13542 "2580 Fast-path wqe consume event carries "
895427bd 13543 "miss-matched qid: wcqe-qid=x%x\n", hba_wqid);
4f774513
JS
13544}
13545
13546/**
2d7dbc4c
JS
13547 * lpfc_sli4_nvmet_handle_rcqe - Process a receive-queue completion queue entry
13548 * @phba: Pointer to HBA context object.
13549 * @rcqe: Pointer to receive-queue completion queue entry.
4f774513 13550 *
2d7dbc4c
JS
13551 * This routine process a receive-queue completion queue entry.
13552 *
13553 * Return: true if work posted to worker thread, otherwise false.
13554 **/
13555static bool
13556lpfc_sli4_nvmet_handle_rcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13557 struct lpfc_rcqe *rcqe)
13558{
13559 bool workposted = false;
13560 struct lpfc_queue *hrq;
13561 struct lpfc_queue *drq;
13562 struct rqb_dmabuf *dma_buf;
13563 struct fc_frame_header *fc_hdr;
547077a4 13564 struct lpfc_nvmet_tgtport *tgtp;
2d7dbc4c
JS
13565 uint32_t status, rq_id;
13566 unsigned long iflags;
13567 uint32_t fctl, idx;
13568
13569 if ((phba->nvmet_support == 0) ||
13570 (phba->sli4_hba.nvmet_cqset == NULL))
13571 return workposted;
13572
13573 idx = cq->queue_id - phba->sli4_hba.nvmet_cqset[0]->queue_id;
13574 hrq = phba->sli4_hba.nvmet_mrq_hdr[idx];
13575 drq = phba->sli4_hba.nvmet_mrq_data[idx];
13576
13577 /* sanity check on queue memory */
13578 if (unlikely(!hrq) || unlikely(!drq))
13579 return workposted;
13580
13581 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13582 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13583 else
13584 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13585
13586 if ((phba->nvmet_support == 0) ||
13587 (rq_id != hrq->queue_id))
13588 return workposted;
13589
13590 status = bf_get(lpfc_rcqe_status, rcqe);
13591 switch (status) {
13592 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13593 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13594 "6126 Receive Frame Truncated!!\n");
78e1d200 13595 /* Drop thru */
2d7dbc4c 13596 case FC_STATUS_RQ_SUCCESS:
2d7dbc4c 13597 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13598 lpfc_sli4_rq_release(hrq, drq);
2d7dbc4c
JS
13599 dma_buf = lpfc_sli_rqbuf_get(phba, hrq);
13600 if (!dma_buf) {
13601 hrq->RQ_no_buf_found++;
13602 spin_unlock_irqrestore(&phba->hbalock, iflags);
13603 goto out;
13604 }
13605 spin_unlock_irqrestore(&phba->hbalock, iflags);
13606 hrq->RQ_rcv_buf++;
547077a4 13607 hrq->RQ_buf_posted--;
2d7dbc4c
JS
13608 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13609
13610 /* Just some basic sanity checks on FCP Command frame */
13611 fctl = (fc_hdr->fh_f_ctl[0] << 16 |
13612 fc_hdr->fh_f_ctl[1] << 8 |
13613 fc_hdr->fh_f_ctl[2]);
13614 if (((fctl &
13615 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) !=
13616 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) ||
13617 (fc_hdr->fh_seq_cnt != 0)) /* 0 byte swapped is still 0 */
13618 goto drop;
13619
13620 if (fc_hdr->fh_type == FC_TYPE_FCP) {
13621 dma_buf->bytes_recv = bf_get(lpfc_rcqe_length, rcqe);
d613b6a7 13622 lpfc_nvmet_unsol_fcp_event(
66d7ce93 13623 phba, idx, dma_buf,
c8a4ce0b 13624 cq->isr_timestamp);
2d7dbc4c
JS
13625 return false;
13626 }
13627drop:
13628 lpfc_in_buf_free(phba, &dma_buf->dbuf);
13629 break;
2d7dbc4c 13630 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13631 if (phba->nvmet_support) {
13632 tgtp = phba->targetport->private;
13633 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13634 "6401 RQE Error x%x, posted %d err_cnt "
13635 "%d: %x %x %x\n",
13636 status, hrq->RQ_buf_posted,
13637 hrq->RQ_no_posted_buf,
13638 atomic_read(&tgtp->rcv_fcp_cmd_in),
13639 atomic_read(&tgtp->rcv_fcp_cmd_out),
13640 atomic_read(&tgtp->xmt_fcp_release));
13641 }
13642 /* fallthrough */
13643
13644 case FC_STATUS_INSUFF_BUF_NEED_BUF:
2d7dbc4c
JS
13645 hrq->RQ_no_posted_buf++;
13646 /* Post more buffers if possible */
2d7dbc4c
JS
13647 break;
13648 }
13649out:
13650 return workposted;
13651}
13652
4f774513 13653/**
895427bd 13654 * lpfc_sli4_fp_handle_cqe - Process fast-path work queue completion entry
4f774513
JS
13655 * @cq: Pointer to the completion queue.
13656 * @eqe: Pointer to fast-path completion queue entry.
13657 *
13658 * This routine process a fast-path work queue completion entry from fast-path
13659 * event queue for FCP command response completion.
13660 **/
13661static int
895427bd 13662lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13663 struct lpfc_cqe *cqe)
13664{
13665 struct lpfc_wcqe_release wcqe;
13666 bool workposted = false;
13667
13668 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 13669 lpfc_sli4_pcimem_bcopy(cqe, &wcqe, sizeof(struct lpfc_cqe));
4f774513
JS
13670
13671 /* Check and process for different type of WCQE and dispatch */
13672 switch (bf_get(lpfc_wcqe_c_code, &wcqe)) {
13673 case CQE_CODE_COMPL_WQE:
895427bd 13674 case CQE_CODE_NVME_ERSP:
b84daac9 13675 cq->CQ_wq++;
4f774513 13676 /* Process the WQ complete event */
98fc5dd9 13677 phba->last_completion_time = jiffies;
895427bd
JS
13678 if ((cq->subtype == LPFC_FCP) || (cq->subtype == LPFC_NVME))
13679 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
13680 (struct lpfc_wcqe_complete *)&wcqe);
13681 if (cq->subtype == LPFC_NVME_LS)
13682 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
4f774513
JS
13683 (struct lpfc_wcqe_complete *)&wcqe);
13684 break;
13685 case CQE_CODE_RELEASE_WQE:
b84daac9 13686 cq->CQ_release_wqe++;
4f774513
JS
13687 /* Process the WQ release event */
13688 lpfc_sli4_fp_handle_rel_wcqe(phba, cq,
13689 (struct lpfc_wcqe_release *)&wcqe);
13690 break;
13691 case CQE_CODE_XRI_ABORTED:
b84daac9 13692 cq->CQ_xri_aborted++;
4f774513 13693 /* Process the WQ XRI abort event */
bc73905a 13694 phba->last_completion_time = jiffies;
4f774513
JS
13695 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
13696 (struct sli4_wcqe_xri_aborted *)&wcqe);
13697 break;
895427bd
JS
13698 case CQE_CODE_RECEIVE_V1:
13699 case CQE_CODE_RECEIVE:
13700 phba->last_completion_time = jiffies;
2d7dbc4c
JS
13701 if (cq->subtype == LPFC_NVMET) {
13702 workposted = lpfc_sli4_nvmet_handle_rcqe(
13703 phba, cq, (struct lpfc_rcqe *)&wcqe);
13704 }
895427bd 13705 break;
4f774513
JS
13706 default:
13707 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 13708 "0144 Not a valid CQE code: x%x\n",
4f774513
JS
13709 bf_get(lpfc_wcqe_c_code, &wcqe));
13710 break;
13711 }
13712 return workposted;
13713}
13714
13715/**
67d12733 13716 * lpfc_sli4_hba_handle_eqe - Process a fast-path event queue entry
4f774513
JS
13717 * @phba: Pointer to HBA context object.
13718 * @eqe: Pointer to fast-path event queue entry.
13719 *
13720 * This routine process a event queue entry from the fast-path event queue.
13721 * It will check the MajorCode and MinorCode to determine this is for a
13722 * completion event on a completion queue, if not, an error shall be logged
13723 * and just return. Otherwise, it will get to the corresponding completion
13724 * queue and process all the entries on the completion queue, rearm the
13725 * completion queue, and then return.
13726 **/
f485c18d 13727static void
67d12733
JS
13728lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
13729 uint32_t qidx)
4f774513 13730{
895427bd 13731 struct lpfc_queue *cq = NULL;
2d7dbc4c 13732 uint16_t cqid, id;
4f774513 13733
cb5172ea 13734 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
4f774513 13735 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
67d12733 13736 "0366 Not a valid completion "
4f774513 13737 "event: majorcode=x%x, minorcode=x%x\n",
cb5172ea
JS
13738 bf_get_le32(lpfc_eqe_major_code, eqe),
13739 bf_get_le32(lpfc_eqe_minor_code, eqe));
f485c18d 13740 return;
4f774513
JS
13741 }
13742
67d12733
JS
13743 /* Get the reference to the corresponding CQ */
13744 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
13745
2d7dbc4c
JS
13746 if (phba->cfg_nvmet_mrq && phba->sli4_hba.nvmet_cqset) {
13747 id = phba->sli4_hba.nvmet_cqset[0]->queue_id;
13748 if ((cqid >= id) && (cqid < (id + phba->cfg_nvmet_mrq))) {
13749 /* Process NVMET unsol rcv */
13750 cq = phba->sli4_hba.nvmet_cqset[cqid - id];
13751 goto process_cq;
13752 }
67d12733
JS
13753 }
13754
895427bd
JS
13755 if (phba->sli4_hba.nvme_cq_map &&
13756 (cqid == phba->sli4_hba.nvme_cq_map[qidx])) {
f358dd0c 13757 /* Process NVME / NVMET command completion */
895427bd
JS
13758 cq = phba->sli4_hba.nvme_cq[qidx];
13759 goto process_cq;
2e90f4b5 13760 }
67d12733 13761
895427bd
JS
13762 if (phba->sli4_hba.fcp_cq_map &&
13763 (cqid == phba->sli4_hba.fcp_cq_map[qidx])) {
13764 /* Process FCP command completion */
13765 cq = phba->sli4_hba.fcp_cq[qidx];
13766 goto process_cq;
2e90f4b5 13767 }
895427bd
JS
13768
13769 if (phba->sli4_hba.nvmels_cq &&
13770 (cqid == phba->sli4_hba.nvmels_cq->queue_id)) {
13771 /* Process NVME unsol rcv */
13772 cq = phba->sli4_hba.nvmels_cq;
13773 }
13774
13775 /* Otherwise this is a Slow path event */
13776 if (cq == NULL) {
f485c18d
DK
13777 lpfc_sli4_sp_handle_eqe(phba, eqe, phba->sli4_hba.hba_eq[qidx]);
13778 return;
4f774513
JS
13779 }
13780
895427bd 13781process_cq:
4f774513
JS
13782 if (unlikely(cqid != cq->queue_id)) {
13783 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13784 "0368 Miss-matched fast-path completion "
13785 "queue identifier: eqcqid=%d, fcpcqid=%d\n",
13786 cqid, cq->queue_id);
f485c18d 13787 return;
4f774513
JS
13788 }
13789
895427bd
JS
13790 /* Save EQ associated with this CQ */
13791 cq->assoc_qp = phba->sli4_hba.hba_eq[qidx];
13792
f485c18d
DK
13793 if (!queue_work(phba->wq, &cq->irqwork))
13794 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13795 "0363 Cannot schedule soft IRQ "
13796 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
13797 cqid, cq->queue_id, smp_processor_id());
13798}
13799
13800/**
13801 * lpfc_sli4_hba_process_cq - Process a fast-path event queue entry
13802 * @phba: Pointer to HBA context object.
13803 * @eqe: Pointer to fast-path event queue entry.
13804 *
13805 * This routine process a event queue entry from the fast-path event queue.
13806 * It will check the MajorCode and MinorCode to determine this is for a
13807 * completion event on a completion queue, if not, an error shall be logged
13808 * and just return. Otherwise, it will get to the corresponding completion
13809 * queue and process all the entries on the completion queue, rearm the
13810 * completion queue, and then return.
13811 **/
13812static void
13813lpfc_sli4_hba_process_cq(struct work_struct *work)
13814{
13815 struct lpfc_queue *cq =
13816 container_of(work, struct lpfc_queue, irqwork);
13817 struct lpfc_hba *phba = cq->phba;
13818 struct lpfc_cqe *cqe;
13819 bool workposted = false;
13820 int ccount = 0;
13821
4f774513
JS
13822 /* Process all the entries to the CQ */
13823 while ((cqe = lpfc_sli4_cq_get(cq))) {
c8a4ce0b
DK
13824#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13825 if (phba->ktime_on)
13826 cq->isr_timestamp = ktime_get_ns();
13827 else
13828 cq->isr_timestamp = 0;
13829#endif
895427bd 13830 workposted |= lpfc_sli4_fp_handle_cqe(phba, cq, cqe);
f485c18d 13831 if (!(++ccount % cq->entry_repost))
7869da18 13832 break;
4f774513
JS
13833 }
13834
b84daac9 13835 /* Track the max number of CQEs processed in 1 EQ */
f485c18d
DK
13836 if (ccount > cq->CQ_max_cqe)
13837 cq->CQ_max_cqe = ccount;
13838 cq->assoc_qp->EQ_cqe_cnt += ccount;
b84daac9 13839
4f774513 13840 /* Catch the no cq entry condition */
f485c18d 13841 if (unlikely(ccount == 0))
4f774513
JS
13842 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13843 "0369 No entry from fast-path completion "
13844 "queue fcpcqid=%d\n", cq->queue_id);
13845
13846 /* In any case, flash and re-arm the CQ */
b71413dd 13847 phba->sli4_hba.sli4_cq_release(cq, LPFC_QUEUE_REARM);
4f774513
JS
13848
13849 /* wake up worker thread if there are works to be done */
13850 if (workposted)
13851 lpfc_worker_wake_up(phba);
13852}
13853
13854static void
13855lpfc_sli4_eq_flush(struct lpfc_hba *phba, struct lpfc_queue *eq)
13856{
13857 struct lpfc_eqe *eqe;
13858
13859 /* walk all the EQ entries and drop on the floor */
13860 while ((eqe = lpfc_sli4_eq_get(eq)))
13861 ;
13862
13863 /* Clear and re-arm the EQ */
b71413dd 13864 phba->sli4_hba.sli4_eq_release(eq, LPFC_QUEUE_REARM);
4f774513
JS
13865}
13866
1ba981fd
JS
13867
13868/**
13869 * lpfc_sli4_fof_handle_eqe - Process a Flash Optimized Fabric event queue
13870 * entry
13871 * @phba: Pointer to HBA context object.
13872 * @eqe: Pointer to fast-path event queue entry.
13873 *
13874 * This routine process a event queue entry from the Flash Optimized Fabric
13875 * event queue. It will check the MajorCode and MinorCode to determine this
13876 * is for a completion event on a completion queue, if not, an error shall be
13877 * logged and just return. Otherwise, it will get to the corresponding
13878 * completion queue and process all the entries on the completion queue, rearm
13879 * the completion queue, and then return.
13880 **/
13881static void
13882lpfc_sli4_fof_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe)
13883{
13884 struct lpfc_queue *cq;
1ba981fd 13885 uint16_t cqid;
1ba981fd
JS
13886
13887 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
13888 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13889 "9147 Not a valid completion "
13890 "event: majorcode=x%x, minorcode=x%x\n",
13891 bf_get_le32(lpfc_eqe_major_code, eqe),
13892 bf_get_le32(lpfc_eqe_minor_code, eqe));
13893 return;
13894 }
13895
13896 /* Get the reference to the corresponding CQ */
13897 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
13898
13899 /* Next check for OAS */
13900 cq = phba->sli4_hba.oas_cq;
13901 if (unlikely(!cq)) {
13902 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
13903 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13904 "9148 OAS completion queue "
13905 "does not exist\n");
13906 return;
13907 }
13908
13909 if (unlikely(cqid != cq->queue_id)) {
13910 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13911 "9149 Miss-matched fast-path compl "
13912 "queue id: eqcqid=%d, fcpcqid=%d\n",
13913 cqid, cq->queue_id);
13914 return;
13915 }
13916
d41b65bc
JS
13917 /* Save EQ associated with this CQ */
13918 cq->assoc_qp = phba->sli4_hba.fof_eq;
13919
f485c18d
DK
13920 /* CQ work will be processed on CPU affinitized to this IRQ */
13921 if (!queue_work(phba->wq, &cq->irqwork))
1ba981fd 13922 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
f485c18d
DK
13923 "0367 Cannot schedule soft IRQ "
13924 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
13925 cqid, cq->queue_id, smp_processor_id());
1ba981fd
JS
13926}
13927
13928/**
13929 * lpfc_sli4_fof_intr_handler - HBA interrupt handler to SLI-4 device
13930 * @irq: Interrupt number.
13931 * @dev_id: The device context pointer.
13932 *
13933 * This function is directly called from the PCI layer as an interrupt
13934 * service routine when device with SLI-4 interface spec is enabled with
13935 * MSI-X multi-message interrupt mode and there is a Flash Optimized Fabric
13936 * IOCB ring event in the HBA. However, when the device is enabled with either
13937 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
13938 * device-level interrupt handler. When the PCI slot is in error recovery
13939 * or the HBA is undergoing initialization, the interrupt handler will not
13940 * process the interrupt. The Flash Optimized Fabric ring event are handled in
13941 * the intrrupt context. This function is called without any lock held.
13942 * It gets the hbalock to access and update SLI data structures. Note that,
13943 * the EQ to CQ are one-to-one map such that the EQ index is
13944 * equal to that of CQ index.
13945 *
13946 * This function returns IRQ_HANDLED when interrupt is handled else it
13947 * returns IRQ_NONE.
13948 **/
13949irqreturn_t
13950lpfc_sli4_fof_intr_handler(int irq, void *dev_id)
13951{
13952 struct lpfc_hba *phba;
895427bd 13953 struct lpfc_hba_eq_hdl *hba_eq_hdl;
1ba981fd
JS
13954 struct lpfc_queue *eq;
13955 struct lpfc_eqe *eqe;
13956 unsigned long iflag;
13957 int ecount = 0;
1ba981fd
JS
13958
13959 /* Get the driver's phba structure from the dev_id */
895427bd
JS
13960 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
13961 phba = hba_eq_hdl->phba;
1ba981fd
JS
13962
13963 if (unlikely(!phba))
13964 return IRQ_NONE;
13965
13966 /* Get to the EQ struct associated with this vector */
13967 eq = phba->sli4_hba.fof_eq;
13968 if (unlikely(!eq))
13969 return IRQ_NONE;
13970
13971 /* Check device state for handling interrupt */
13972 if (unlikely(lpfc_intr_state_check(phba))) {
1ba981fd
JS
13973 /* Check again for link_state with lock held */
13974 spin_lock_irqsave(&phba->hbalock, iflag);
13975 if (phba->link_state < LPFC_LINK_DOWN)
13976 /* Flush, clear interrupt, and rearm the EQ */
13977 lpfc_sli4_eq_flush(phba, eq);
13978 spin_unlock_irqrestore(&phba->hbalock, iflag);
13979 return IRQ_NONE;
13980 }
13981
13982 /*
13983 * Process all the event on FCP fast-path EQ
13984 */
13985 while ((eqe = lpfc_sli4_eq_get(eq))) {
13986 lpfc_sli4_fof_handle_eqe(phba, eqe);
13987 if (!(++ecount % eq->entry_repost))
7869da18 13988 break;
1ba981fd
JS
13989 eq->EQ_processed++;
13990 }
13991
13992 /* Track the max number of EQEs processed in 1 intr */
13993 if (ecount > eq->EQ_max_eqe)
13994 eq->EQ_max_eqe = ecount;
13995
13996
13997 if (unlikely(ecount == 0)) {
13998 eq->EQ_no_entry++;
13999
14000 if (phba->intr_type == MSIX)
14001 /* MSI-X treated interrupt served as no EQ share INT */
14002 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14003 "9145 MSI-X interrupt with no EQE\n");
14004 else {
14005 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14006 "9146 ISR interrupt with no EQE\n");
14007 /* Non MSI-X treated on interrupt as EQ share INT */
14008 return IRQ_NONE;
14009 }
14010 }
14011 /* Always clear and re-arm the fast-path EQ */
b71413dd 14012 phba->sli4_hba.sli4_eq_release(eq, LPFC_QUEUE_REARM);
1ba981fd
JS
14013 return IRQ_HANDLED;
14014}
14015
4f774513 14016/**
67d12733 14017 * lpfc_sli4_hba_intr_handler - HBA interrupt handler to SLI-4 device
4f774513
JS
14018 * @irq: Interrupt number.
14019 * @dev_id: The device context pointer.
14020 *
14021 * This function is directly called from the PCI layer as an interrupt
14022 * service routine when device with SLI-4 interface spec is enabled with
14023 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
14024 * ring event in the HBA. However, when the device is enabled with either
14025 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
14026 * device-level interrupt handler. When the PCI slot is in error recovery
14027 * or the HBA is undergoing initialization, the interrupt handler will not
14028 * process the interrupt. The SCSI FCP fast-path ring event are handled in
14029 * the intrrupt context. This function is called without any lock held.
14030 * It gets the hbalock to access and update SLI data structures. Note that,
14031 * the FCP EQ to FCP CQ are one-to-one map such that the FCP EQ index is
14032 * equal to that of FCP CQ index.
14033 *
67d12733
JS
14034 * The link attention and ELS ring attention events are handled
14035 * by the worker thread. The interrupt handler signals the worker thread
14036 * and returns for these events. This function is called without any lock
14037 * held. It gets the hbalock to access and update SLI data structures.
14038 *
4f774513
JS
14039 * This function returns IRQ_HANDLED when interrupt is handled else it
14040 * returns IRQ_NONE.
14041 **/
14042irqreturn_t
67d12733 14043lpfc_sli4_hba_intr_handler(int irq, void *dev_id)
4f774513
JS
14044{
14045 struct lpfc_hba *phba;
895427bd 14046 struct lpfc_hba_eq_hdl *hba_eq_hdl;
4f774513
JS
14047 struct lpfc_queue *fpeq;
14048 struct lpfc_eqe *eqe;
14049 unsigned long iflag;
14050 int ecount = 0;
895427bd 14051 int hba_eqidx;
4f774513
JS
14052
14053 /* Get the driver's phba structure from the dev_id */
895427bd
JS
14054 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
14055 phba = hba_eq_hdl->phba;
14056 hba_eqidx = hba_eq_hdl->idx;
4f774513
JS
14057
14058 if (unlikely(!phba))
14059 return IRQ_NONE;
67d12733 14060 if (unlikely(!phba->sli4_hba.hba_eq))
5350d872 14061 return IRQ_NONE;
4f774513
JS
14062
14063 /* Get to the EQ struct associated with this vector */
895427bd 14064 fpeq = phba->sli4_hba.hba_eq[hba_eqidx];
2e90f4b5
JS
14065 if (unlikely(!fpeq))
14066 return IRQ_NONE;
4f774513 14067
ba20c853 14068 if (lpfc_fcp_look_ahead) {
895427bd 14069 if (atomic_dec_and_test(&hba_eq_hdl->hba_eq_in_use))
b71413dd 14070 phba->sli4_hba.sli4_eq_clr_intr(fpeq);
ba20c853 14071 else {
895427bd 14072 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
ba20c853
JS
14073 return IRQ_NONE;
14074 }
14075 }
14076
4f774513
JS
14077 /* Check device state for handling interrupt */
14078 if (unlikely(lpfc_intr_state_check(phba))) {
14079 /* Check again for link_state with lock held */
14080 spin_lock_irqsave(&phba->hbalock, iflag);
14081 if (phba->link_state < LPFC_LINK_DOWN)
14082 /* Flush, clear interrupt, and rearm the EQ */
14083 lpfc_sli4_eq_flush(phba, fpeq);
14084 spin_unlock_irqrestore(&phba->hbalock, iflag);
ba20c853 14085 if (lpfc_fcp_look_ahead)
895427bd 14086 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
4f774513
JS
14087 return IRQ_NONE;
14088 }
14089
14090 /*
14091 * Process all the event on FCP fast-path EQ
14092 */
14093 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
f485c18d
DK
14094 lpfc_sli4_hba_handle_eqe(phba, eqe, hba_eqidx);
14095 if (!(++ecount % fpeq->entry_repost))
7869da18 14096 break;
b84daac9 14097 fpeq->EQ_processed++;
4f774513
JS
14098 }
14099
b84daac9
JS
14100 /* Track the max number of EQEs processed in 1 intr */
14101 if (ecount > fpeq->EQ_max_eqe)
14102 fpeq->EQ_max_eqe = ecount;
14103
4f774513 14104 /* Always clear and re-arm the fast-path EQ */
b71413dd 14105 phba->sli4_hba.sli4_eq_release(fpeq, LPFC_QUEUE_REARM);
4f774513
JS
14106
14107 if (unlikely(ecount == 0)) {
b84daac9 14108 fpeq->EQ_no_entry++;
ba20c853
JS
14109
14110 if (lpfc_fcp_look_ahead) {
895427bd 14111 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
ba20c853
JS
14112 return IRQ_NONE;
14113 }
14114
4f774513
JS
14115 if (phba->intr_type == MSIX)
14116 /* MSI-X treated interrupt served as no EQ share INT */
14117 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14118 "0358 MSI-X interrupt with no EQE\n");
14119 else
14120 /* Non MSI-X treated on interrupt as EQ share INT */
14121 return IRQ_NONE;
14122 }
14123
ba20c853 14124 if (lpfc_fcp_look_ahead)
895427bd
JS
14125 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
14126
4f774513
JS
14127 return IRQ_HANDLED;
14128} /* lpfc_sli4_fp_intr_handler */
14129
14130/**
14131 * lpfc_sli4_intr_handler - Device-level interrupt handler for SLI-4 device
14132 * @irq: Interrupt number.
14133 * @dev_id: The device context pointer.
14134 *
14135 * This function is the device-level interrupt handler to device with SLI-4
14136 * interface spec, called from the PCI layer when either MSI or Pin-IRQ
14137 * interrupt mode is enabled and there is an event in the HBA which requires
14138 * driver attention. This function invokes the slow-path interrupt attention
14139 * handling function and fast-path interrupt attention handling function in
14140 * turn to process the relevant HBA attention events. This function is called
14141 * without any lock held. It gets the hbalock to access and update SLI data
14142 * structures.
14143 *
14144 * This function returns IRQ_HANDLED when interrupt is handled, else it
14145 * returns IRQ_NONE.
14146 **/
14147irqreturn_t
14148lpfc_sli4_intr_handler(int irq, void *dev_id)
14149{
14150 struct lpfc_hba *phba;
67d12733
JS
14151 irqreturn_t hba_irq_rc;
14152 bool hba_handled = false;
895427bd 14153 int qidx;
4f774513
JS
14154
14155 /* Get the driver's phba structure from the dev_id */
14156 phba = (struct lpfc_hba *)dev_id;
14157
14158 if (unlikely(!phba))
14159 return IRQ_NONE;
14160
4f774513
JS
14161 /*
14162 * Invoke fast-path host attention interrupt handling as appropriate.
14163 */
895427bd 14164 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++) {
67d12733 14165 hba_irq_rc = lpfc_sli4_hba_intr_handler(irq,
895427bd 14166 &phba->sli4_hba.hba_eq_hdl[qidx]);
67d12733
JS
14167 if (hba_irq_rc == IRQ_HANDLED)
14168 hba_handled |= true;
4f774513
JS
14169 }
14170
1ba981fd
JS
14171 if (phba->cfg_fof) {
14172 hba_irq_rc = lpfc_sli4_fof_intr_handler(irq,
895427bd 14173 &phba->sli4_hba.hba_eq_hdl[qidx]);
1ba981fd
JS
14174 if (hba_irq_rc == IRQ_HANDLED)
14175 hba_handled |= true;
14176 }
14177
67d12733 14178 return (hba_handled == true) ? IRQ_HANDLED : IRQ_NONE;
4f774513
JS
14179} /* lpfc_sli4_intr_handler */
14180
14181/**
14182 * lpfc_sli4_queue_free - free a queue structure and associated memory
14183 * @queue: The queue structure to free.
14184 *
b595076a 14185 * This function frees a queue structure and the DMAable memory used for
4f774513
JS
14186 * the host resident queue. This function must be called after destroying the
14187 * queue on the HBA.
14188 **/
14189void
14190lpfc_sli4_queue_free(struct lpfc_queue *queue)
14191{
14192 struct lpfc_dmabuf *dmabuf;
14193
14194 if (!queue)
14195 return;
14196
14197 while (!list_empty(&queue->page_list)) {
14198 list_remove_head(&queue->page_list, dmabuf, struct lpfc_dmabuf,
14199 list);
81b96eda 14200 dma_free_coherent(&queue->phba->pcidev->dev, queue->page_size,
4f774513
JS
14201 dmabuf->virt, dmabuf->phys);
14202 kfree(dmabuf);
14203 }
895427bd
JS
14204 if (queue->rqbp) {
14205 lpfc_free_rq_buffer(queue->phba, queue);
14206 kfree(queue->rqbp);
14207 }
d1f525aa
JS
14208
14209 if (!list_empty(&queue->wq_list))
14210 list_del(&queue->wq_list);
14211
4f774513
JS
14212 kfree(queue);
14213 return;
14214}
14215
14216/**
14217 * lpfc_sli4_queue_alloc - Allocate and initialize a queue structure
14218 * @phba: The HBA that this queue is being created on.
81b96eda 14219 * @page_size: The size of a queue page
4f774513
JS
14220 * @entry_size: The size of each queue entry for this queue.
14221 * @entry count: The number of entries that this queue will handle.
14222 *
14223 * This function allocates a queue structure and the DMAable memory used for
14224 * the host resident queue. This function must be called before creating the
14225 * queue on the HBA.
14226 **/
14227struct lpfc_queue *
81b96eda
JS
14228lpfc_sli4_queue_alloc(struct lpfc_hba *phba, uint32_t page_size,
14229 uint32_t entry_size, uint32_t entry_count)
4f774513
JS
14230{
14231 struct lpfc_queue *queue;
14232 struct lpfc_dmabuf *dmabuf;
14233 int x, total_qe_count;
14234 void *dma_pointer;
cb5172ea 14235 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
4f774513 14236
cb5172ea 14237 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 14238 hw_page_size = page_size;
cb5172ea 14239
4f774513
JS
14240 queue = kzalloc(sizeof(struct lpfc_queue) +
14241 (sizeof(union sli4_qe) * entry_count), GFP_KERNEL);
14242 if (!queue)
14243 return NULL;
cb5172ea
JS
14244 queue->page_count = (ALIGN(entry_size * entry_count,
14245 hw_page_size))/hw_page_size;
895427bd
JS
14246
14247 /* If needed, Adjust page count to match the max the adapter supports */
14248 if (queue->page_count > phba->sli4_hba.pc_sli4_params.wqpcnt)
14249 queue->page_count = phba->sli4_hba.pc_sli4_params.wqpcnt;
14250
4f774513 14251 INIT_LIST_HEAD(&queue->list);
895427bd 14252 INIT_LIST_HEAD(&queue->wq_list);
6e8e1c14 14253 INIT_LIST_HEAD(&queue->wqfull_list);
4f774513
JS
14254 INIT_LIST_HEAD(&queue->page_list);
14255 INIT_LIST_HEAD(&queue->child_list);
81b96eda
JS
14256
14257 /* Set queue parameters now. If the system cannot provide memory
14258 * resources, the free routine needs to know what was allocated.
14259 */
14260 queue->entry_size = entry_size;
14261 queue->entry_count = entry_count;
14262 queue->page_size = hw_page_size;
14263 queue->phba = phba;
14264
4f774513
JS
14265 for (x = 0, total_qe_count = 0; x < queue->page_count; x++) {
14266 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
14267 if (!dmabuf)
14268 goto out_fail;
1aee383d
JP
14269 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
14270 hw_page_size, &dmabuf->phys,
14271 GFP_KERNEL);
4f774513
JS
14272 if (!dmabuf->virt) {
14273 kfree(dmabuf);
14274 goto out_fail;
14275 }
14276 dmabuf->buffer_tag = x;
14277 list_add_tail(&dmabuf->list, &queue->page_list);
14278 /* initialize queue's entry array */
14279 dma_pointer = dmabuf->virt;
14280 for (; total_qe_count < entry_count &&
cb5172ea 14281 dma_pointer < (hw_page_size + dmabuf->virt);
4f774513
JS
14282 total_qe_count++, dma_pointer += entry_size) {
14283 queue->qe[total_qe_count].address = dma_pointer;
14284 }
14285 }
f485c18d
DK
14286 INIT_WORK(&queue->irqwork, lpfc_sli4_hba_process_cq);
14287 INIT_WORK(&queue->spwork, lpfc_sli4_sp_process_cq);
4f774513 14288
64eb4dcb
JS
14289 /* entry_repost will be set during q creation */
14290
4f774513
JS
14291 return queue;
14292out_fail:
14293 lpfc_sli4_queue_free(queue);
14294 return NULL;
14295}
14296
962bc51b
JS
14297/**
14298 * lpfc_dual_chute_pci_bar_map - Map pci base address register to host memory
14299 * @phba: HBA structure that indicates port to create a queue on.
14300 * @pci_barset: PCI BAR set flag.
14301 *
14302 * This function shall perform iomap of the specified PCI BAR address to host
14303 * memory address if not already done so and return it. The returned host
14304 * memory address can be NULL.
14305 */
14306static void __iomem *
14307lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset)
14308{
962bc51b
JS
14309 if (!phba->pcidev)
14310 return NULL;
962bc51b
JS
14311
14312 switch (pci_barset) {
14313 case WQ_PCI_BAR_0_AND_1:
962bc51b
JS
14314 return phba->pci_bar0_memmap_p;
14315 case WQ_PCI_BAR_2_AND_3:
962bc51b
JS
14316 return phba->pci_bar2_memmap_p;
14317 case WQ_PCI_BAR_4_AND_5:
962bc51b
JS
14318 return phba->pci_bar4_memmap_p;
14319 default:
14320 break;
14321 }
14322 return NULL;
14323}
14324
173edbb2 14325/**
895427bd 14326 * lpfc_modify_hba_eq_delay - Modify Delay Multiplier on FCP EQs
173edbb2
JS
14327 * @phba: HBA structure that indicates port to create a queue on.
14328 * @startq: The starting FCP EQ to modify
14329 *
14330 * This function sends an MODIFY_EQ_DELAY mailbox command to the HBA.
43140ca6
JS
14331 * The command allows up to LPFC_MAX_EQ_DELAY_EQID_CNT EQ ID's to be
14332 * updated in one mailbox command.
173edbb2
JS
14333 *
14334 * The @phba struct is used to send mailbox command to HBA. The @startq
14335 * is used to get the starting FCP EQ to change.
14336 * This function is asynchronous and will wait for the mailbox
14337 * command to finish before continuing.
14338 *
14339 * On success this function will return a zero. If unable to allocate enough
14340 * memory this function will return -ENOMEM. If the queue create mailbox command
14341 * fails this function will return -ENXIO.
14342 **/
a2fc4aef 14343int
0cf07f84
JS
14344lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
14345 uint32_t numq, uint32_t imax)
173edbb2
JS
14346{
14347 struct lpfc_mbx_modify_eq_delay *eq_delay;
14348 LPFC_MBOXQ_t *mbox;
14349 struct lpfc_queue *eq;
14350 int cnt, rc, length, status = 0;
14351 uint32_t shdr_status, shdr_add_status;
0cf07f84 14352 uint32_t result, val;
895427bd 14353 int qidx;
173edbb2
JS
14354 union lpfc_sli4_cfg_shdr *shdr;
14355 uint16_t dmult;
14356
895427bd 14357 if (startq >= phba->io_channel_irqs)
173edbb2
JS
14358 return 0;
14359
14360 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14361 if (!mbox)
14362 return -ENOMEM;
14363 length = (sizeof(struct lpfc_mbx_modify_eq_delay) -
14364 sizeof(struct lpfc_sli4_cfg_mhdr));
14365 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14366 LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY,
14367 length, LPFC_SLI4_MBX_EMBED);
14368 eq_delay = &mbox->u.mqe.un.eq_delay;
14369
14370 /* Calculate delay multiper from maximum interrupt per second */
0cf07f84 14371 result = imax / phba->io_channel_irqs;
895427bd 14372 if (result > LPFC_DMULT_CONST || result == 0)
ee02006b
JS
14373 dmult = 0;
14374 else
14375 dmult = LPFC_DMULT_CONST/result - 1;
0cf07f84
JS
14376 if (dmult > LPFC_DMULT_MAX)
14377 dmult = LPFC_DMULT_MAX;
173edbb2
JS
14378
14379 cnt = 0;
895427bd
JS
14380 for (qidx = startq; qidx < phba->io_channel_irqs; qidx++) {
14381 eq = phba->sli4_hba.hba_eq[qidx];
173edbb2
JS
14382 if (!eq)
14383 continue;
0cf07f84 14384 eq->q_mode = imax;
173edbb2
JS
14385 eq_delay->u.request.eq[cnt].eq_id = eq->queue_id;
14386 eq_delay->u.request.eq[cnt].phase = 0;
14387 eq_delay->u.request.eq[cnt].delay_multi = dmult;
14388 cnt++;
0cf07f84
JS
14389
14390 /* q_mode is only used for auto_imax */
14391 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
14392 /* Use EQ Delay Register method for q_mode */
14393
14394 /* Convert for EQ Delay register */
14395 val = phba->cfg_fcp_imax;
14396 if (val) {
14397 /* First, interrupts per sec per EQ */
14398 val = phba->cfg_fcp_imax /
14399 phba->io_channel_irqs;
14400
14401 /* us delay between each interrupt */
14402 val = LPFC_SEC_TO_USEC / val;
14403 }
14404 eq->q_mode = val;
14405 } else {
14406 eq->q_mode = imax;
14407 }
14408
14409 if (cnt >= numq)
173edbb2
JS
14410 break;
14411 }
14412 eq_delay->u.request.num_eq = cnt;
14413
14414 mbox->vport = phba->pport;
14415 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
14416 mbox->context1 = NULL;
14417 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14418 shdr = (union lpfc_sli4_cfg_shdr *) &eq_delay->header.cfg_shdr;
14419 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14420 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14421 if (shdr_status || shdr_add_status || rc) {
14422 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14423 "2512 MODIFY_EQ_DELAY mailbox failed with "
14424 "status x%x add_status x%x, mbx status x%x\n",
14425 shdr_status, shdr_add_status, rc);
14426 status = -ENXIO;
14427 }
14428 mempool_free(mbox, phba->mbox_mem_pool);
14429 return status;
14430}
14431
4f774513
JS
14432/**
14433 * lpfc_eq_create - Create an Event Queue on the HBA
14434 * @phba: HBA structure that indicates port to create a queue on.
14435 * @eq: The queue structure to use to create the event queue.
14436 * @imax: The maximum interrupt per second limit.
14437 *
14438 * This function creates an event queue, as detailed in @eq, on a port,
14439 * described by @phba by sending an EQ_CREATE mailbox command to the HBA.
14440 *
14441 * The @phba struct is used to send mailbox command to HBA. The @eq struct
14442 * is used to get the entry count and entry size that are necessary to
14443 * determine the number of pages to allocate and use for this queue. This
14444 * function will send the EQ_CREATE mailbox command to the HBA to setup the
14445 * event queue. This function is asynchronous and will wait for the mailbox
14446 * command to finish before continuing.
14447 *
14448 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14449 * memory this function will return -ENOMEM. If the queue create mailbox command
14450 * fails this function will return -ENXIO.
4f774513 14451 **/
a2fc4aef 14452int
ee02006b 14453lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
4f774513
JS
14454{
14455 struct lpfc_mbx_eq_create *eq_create;
14456 LPFC_MBOXQ_t *mbox;
14457 int rc, length, status = 0;
14458 struct lpfc_dmabuf *dmabuf;
14459 uint32_t shdr_status, shdr_add_status;
14460 union lpfc_sli4_cfg_shdr *shdr;
14461 uint16_t dmult;
49198b37
JS
14462 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14463
2e90f4b5
JS
14464 /* sanity check on queue memory */
14465 if (!eq)
14466 return -ENODEV;
49198b37
JS
14467 if (!phba->sli4_hba.pc_sli4_params.supported)
14468 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
14469
14470 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14471 if (!mbox)
14472 return -ENOMEM;
14473 length = (sizeof(struct lpfc_mbx_eq_create) -
14474 sizeof(struct lpfc_sli4_cfg_mhdr));
14475 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14476 LPFC_MBOX_OPCODE_EQ_CREATE,
14477 length, LPFC_SLI4_MBX_EMBED);
14478 eq_create = &mbox->u.mqe.un.eq_create;
7365f6fd 14479 shdr = (union lpfc_sli4_cfg_shdr *) &eq_create->header.cfg_shdr;
4f774513
JS
14480 bf_set(lpfc_mbx_eq_create_num_pages, &eq_create->u.request,
14481 eq->page_count);
14482 bf_set(lpfc_eq_context_size, &eq_create->u.request.context,
14483 LPFC_EQE_SIZE);
14484 bf_set(lpfc_eq_context_valid, &eq_create->u.request.context, 1);
7365f6fd
JS
14485
14486 /* Use version 2 of CREATE_EQ if eqav is set */
14487 if (phba->sli4_hba.pc_sli4_params.eqav) {
14488 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14489 LPFC_Q_CREATE_VERSION_2);
14490 bf_set(lpfc_eq_context_autovalid, &eq_create->u.request.context,
14491 phba->sli4_hba.pc_sli4_params.eqav);
14492 }
14493
2c9c5a00
JS
14494 /* don't setup delay multiplier using EQ_CREATE */
14495 dmult = 0;
4f774513
JS
14496 bf_set(lpfc_eq_context_delay_multi, &eq_create->u.request.context,
14497 dmult);
14498 switch (eq->entry_count) {
14499 default:
14500 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14501 "0360 Unsupported EQ count. (%d)\n",
14502 eq->entry_count);
14503 if (eq->entry_count < 256)
14504 return -EINVAL;
14505 /* otherwise default to smallest count (drop through) */
14506 case 256:
14507 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14508 LPFC_EQ_CNT_256);
14509 break;
14510 case 512:
14511 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14512 LPFC_EQ_CNT_512);
14513 break;
14514 case 1024:
14515 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14516 LPFC_EQ_CNT_1024);
14517 break;
14518 case 2048:
14519 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14520 LPFC_EQ_CNT_2048);
14521 break;
14522 case 4096:
14523 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14524 LPFC_EQ_CNT_4096);
14525 break;
14526 }
14527 list_for_each_entry(dmabuf, &eq->page_list, list) {
49198b37 14528 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
14529 eq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
14530 putPaddrLow(dmabuf->phys);
14531 eq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
14532 putPaddrHigh(dmabuf->phys);
14533 }
14534 mbox->vport = phba->pport;
14535 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
14536 mbox->context1 = NULL;
14537 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
4f774513
JS
14538 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14539 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14540 if (shdr_status || shdr_add_status || rc) {
14541 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14542 "2500 EQ_CREATE mailbox failed with "
14543 "status x%x add_status x%x, mbx status x%x\n",
14544 shdr_status, shdr_add_status, rc);
14545 status = -ENXIO;
14546 }
14547 eq->type = LPFC_EQ;
14548 eq->subtype = LPFC_NONE;
14549 eq->queue_id = bf_get(lpfc_mbx_eq_create_q_id, &eq_create->u.response);
14550 if (eq->queue_id == 0xFFFF)
14551 status = -ENXIO;
14552 eq->host_index = 0;
14553 eq->hba_index = 0;
64eb4dcb 14554 eq->entry_repost = LPFC_EQ_REPOST;
4f774513 14555
8fa38513 14556 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
14557 return status;
14558}
14559
14560/**
14561 * lpfc_cq_create - Create a Completion Queue on the HBA
14562 * @phba: HBA structure that indicates port to create a queue on.
14563 * @cq: The queue structure to use to create the completion queue.
14564 * @eq: The event queue to bind this completion queue to.
14565 *
14566 * This function creates a completion queue, as detailed in @wq, on a port,
14567 * described by @phba by sending a CQ_CREATE mailbox command to the HBA.
14568 *
14569 * The @phba struct is used to send mailbox command to HBA. The @cq struct
14570 * is used to get the entry count and entry size that are necessary to
14571 * determine the number of pages to allocate and use for this queue. The @eq
14572 * is used to indicate which event queue to bind this completion queue to. This
14573 * function will send the CQ_CREATE mailbox command to the HBA to setup the
14574 * completion queue. This function is asynchronous and will wait for the mailbox
14575 * command to finish before continuing.
14576 *
14577 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14578 * memory this function will return -ENOMEM. If the queue create mailbox command
14579 * fails this function will return -ENXIO.
4f774513 14580 **/
a2fc4aef 14581int
4f774513
JS
14582lpfc_cq_create(struct lpfc_hba *phba, struct lpfc_queue *cq,
14583 struct lpfc_queue *eq, uint32_t type, uint32_t subtype)
14584{
14585 struct lpfc_mbx_cq_create *cq_create;
14586 struct lpfc_dmabuf *dmabuf;
14587 LPFC_MBOXQ_t *mbox;
14588 int rc, length, status = 0;
14589 uint32_t shdr_status, shdr_add_status;
14590 union lpfc_sli4_cfg_shdr *shdr;
49198b37
JS
14591 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14592
2e90f4b5
JS
14593 /* sanity check on queue memory */
14594 if (!cq || !eq)
14595 return -ENODEV;
49198b37 14596 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 14597 hw_page_size = cq->page_size;
49198b37 14598
4f774513
JS
14599 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14600 if (!mbox)
14601 return -ENOMEM;
14602 length = (sizeof(struct lpfc_mbx_cq_create) -
14603 sizeof(struct lpfc_sli4_cfg_mhdr));
14604 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14605 LPFC_MBOX_OPCODE_CQ_CREATE,
14606 length, LPFC_SLI4_MBX_EMBED);
14607 cq_create = &mbox->u.mqe.un.cq_create;
5a6f133e 14608 shdr = (union lpfc_sli4_cfg_shdr *) &cq_create->header.cfg_shdr;
4f774513
JS
14609 bf_set(lpfc_mbx_cq_create_num_pages, &cq_create->u.request,
14610 cq->page_count);
14611 bf_set(lpfc_cq_context_event, &cq_create->u.request.context, 1);
14612 bf_set(lpfc_cq_context_valid, &cq_create->u.request.context, 1);
5a6f133e
JS
14613 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14614 phba->sli4_hba.pc_sli4_params.cqv);
14615 if (phba->sli4_hba.pc_sli4_params.cqv == LPFC_Q_CREATE_VERSION_2) {
81b96eda
JS
14616 bf_set(lpfc_mbx_cq_create_page_size, &cq_create->u.request,
14617 (cq->page_size / SLI4_PAGE_SIZE));
5a6f133e
JS
14618 bf_set(lpfc_cq_eq_id_2, &cq_create->u.request.context,
14619 eq->queue_id);
7365f6fd
JS
14620 bf_set(lpfc_cq_context_autovalid, &cq_create->u.request.context,
14621 phba->sli4_hba.pc_sli4_params.cqav);
5a6f133e
JS
14622 } else {
14623 bf_set(lpfc_cq_eq_id, &cq_create->u.request.context,
14624 eq->queue_id);
14625 }
4f774513 14626 switch (cq->entry_count) {
81b96eda
JS
14627 case 2048:
14628 case 4096:
14629 if (phba->sli4_hba.pc_sli4_params.cqv ==
14630 LPFC_Q_CREATE_VERSION_2) {
14631 cq_create->u.request.context.lpfc_cq_context_count =
14632 cq->entry_count;
14633 bf_set(lpfc_cq_context_count,
14634 &cq_create->u.request.context,
14635 LPFC_CQ_CNT_WORD7);
14636 break;
14637 }
14638 /* Fall Thru */
4f774513
JS
14639 default:
14640 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2ea259ee 14641 "0361 Unsupported CQ count: "
64eb4dcb 14642 "entry cnt %d sz %d pg cnt %d\n",
2ea259ee 14643 cq->entry_count, cq->entry_size,
64eb4dcb 14644 cq->page_count);
4f4c1863
JS
14645 if (cq->entry_count < 256) {
14646 status = -EINVAL;
14647 goto out;
14648 }
4f774513
JS
14649 /* otherwise default to smallest count (drop through) */
14650 case 256:
14651 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14652 LPFC_CQ_CNT_256);
14653 break;
14654 case 512:
14655 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14656 LPFC_CQ_CNT_512);
14657 break;
14658 case 1024:
14659 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14660 LPFC_CQ_CNT_1024);
14661 break;
14662 }
14663 list_for_each_entry(dmabuf, &cq->page_list, list) {
81b96eda 14664 memset(dmabuf->virt, 0, cq->page_size);
4f774513
JS
14665 cq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
14666 putPaddrLow(dmabuf->phys);
14667 cq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
14668 putPaddrHigh(dmabuf->phys);
14669 }
14670 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14671
14672 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
14673 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14674 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14675 if (shdr_status || shdr_add_status || rc) {
14676 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14677 "2501 CQ_CREATE mailbox failed with "
14678 "status x%x add_status x%x, mbx status x%x\n",
14679 shdr_status, shdr_add_status, rc);
14680 status = -ENXIO;
14681 goto out;
14682 }
14683 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
14684 if (cq->queue_id == 0xFFFF) {
14685 status = -ENXIO;
14686 goto out;
14687 }
14688 /* link the cq onto the parent eq child list */
14689 list_add_tail(&cq->list, &eq->child_list);
14690 /* Set up completion queue's type and subtype */
14691 cq->type = type;
14692 cq->subtype = subtype;
14693 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
2a622bfb 14694 cq->assoc_qid = eq->queue_id;
4f774513
JS
14695 cq->host_index = 0;
14696 cq->hba_index = 0;
64eb4dcb 14697 cq->entry_repost = LPFC_CQ_REPOST;
4f774513 14698
8fa38513
JS
14699out:
14700 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
14701 return status;
14702}
14703
2d7dbc4c
JS
14704/**
14705 * lpfc_cq_create_set - Create a set of Completion Queues on the HBA for MRQ
14706 * @phba: HBA structure that indicates port to create a queue on.
14707 * @cqp: The queue structure array to use to create the completion queues.
14708 * @eqp: The event queue array to bind these completion queues to.
14709 *
14710 * This function creates a set of completion queue, s to support MRQ
14711 * as detailed in @cqp, on a port,
14712 * described by @phba by sending a CREATE_CQ_SET mailbox command to the HBA.
14713 *
14714 * The @phba struct is used to send mailbox command to HBA. The @cq struct
14715 * is used to get the entry count and entry size that are necessary to
14716 * determine the number of pages to allocate and use for this queue. The @eq
14717 * is used to indicate which event queue to bind this completion queue to. This
14718 * function will send the CREATE_CQ_SET mailbox command to the HBA to setup the
14719 * completion queue. This function is asynchronous and will wait for the mailbox
14720 * command to finish before continuing.
14721 *
14722 * On success this function will return a zero. If unable to allocate enough
14723 * memory this function will return -ENOMEM. If the queue create mailbox command
14724 * fails this function will return -ENXIO.
14725 **/
14726int
14727lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
14728 struct lpfc_queue **eqp, uint32_t type, uint32_t subtype)
14729{
14730 struct lpfc_queue *cq;
14731 struct lpfc_queue *eq;
14732 struct lpfc_mbx_cq_create_set *cq_set;
14733 struct lpfc_dmabuf *dmabuf;
14734 LPFC_MBOXQ_t *mbox;
14735 int rc, length, alloclen, status = 0;
14736 int cnt, idx, numcq, page_idx = 0;
14737 uint32_t shdr_status, shdr_add_status;
14738 union lpfc_sli4_cfg_shdr *shdr;
14739 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14740
14741 /* sanity check on queue memory */
14742 numcq = phba->cfg_nvmet_mrq;
14743 if (!cqp || !eqp || !numcq)
14744 return -ENODEV;
2d7dbc4c
JS
14745
14746 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14747 if (!mbox)
14748 return -ENOMEM;
14749
14750 length = sizeof(struct lpfc_mbx_cq_create_set);
14751 length += ((numcq * cqp[0]->page_count) *
14752 sizeof(struct dma_address));
14753 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
14754 LPFC_MBOX_OPCODE_FCOE_CQ_CREATE_SET, length,
14755 LPFC_SLI4_MBX_NEMBED);
14756 if (alloclen < length) {
14757 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14758 "3098 Allocated DMA memory size (%d) is "
14759 "less than the requested DMA memory size "
14760 "(%d)\n", alloclen, length);
14761 status = -ENOMEM;
14762 goto out;
14763 }
14764 cq_set = mbox->sge_array->addr[0];
14765 shdr = (union lpfc_sli4_cfg_shdr *)&cq_set->cfg_shdr;
14766 bf_set(lpfc_mbox_hdr_version, &shdr->request, 0);
14767
14768 for (idx = 0; idx < numcq; idx++) {
14769 cq = cqp[idx];
14770 eq = eqp[idx];
14771 if (!cq || !eq) {
14772 status = -ENOMEM;
14773 goto out;
14774 }
81b96eda
JS
14775 if (!phba->sli4_hba.pc_sli4_params.supported)
14776 hw_page_size = cq->page_size;
2d7dbc4c
JS
14777
14778 switch (idx) {
14779 case 0:
14780 bf_set(lpfc_mbx_cq_create_set_page_size,
14781 &cq_set->u.request,
14782 (hw_page_size / SLI4_PAGE_SIZE));
14783 bf_set(lpfc_mbx_cq_create_set_num_pages,
14784 &cq_set->u.request, cq->page_count);
14785 bf_set(lpfc_mbx_cq_create_set_evt,
14786 &cq_set->u.request, 1);
14787 bf_set(lpfc_mbx_cq_create_set_valid,
14788 &cq_set->u.request, 1);
14789 bf_set(lpfc_mbx_cq_create_set_cqe_size,
14790 &cq_set->u.request, 0);
14791 bf_set(lpfc_mbx_cq_create_set_num_cq,
14792 &cq_set->u.request, numcq);
7365f6fd
JS
14793 bf_set(lpfc_mbx_cq_create_set_autovalid,
14794 &cq_set->u.request,
14795 phba->sli4_hba.pc_sli4_params.cqav);
2d7dbc4c 14796 switch (cq->entry_count) {
81b96eda
JS
14797 case 2048:
14798 case 4096:
14799 if (phba->sli4_hba.pc_sli4_params.cqv ==
14800 LPFC_Q_CREATE_VERSION_2) {
14801 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
14802 &cq_set->u.request,
14803 cq->entry_count);
14804 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
14805 &cq_set->u.request,
14806 LPFC_CQ_CNT_WORD7);
14807 break;
14808 }
14809 /* Fall Thru */
2d7dbc4c
JS
14810 default:
14811 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14812 "3118 Bad CQ count. (%d)\n",
14813 cq->entry_count);
14814 if (cq->entry_count < 256) {
14815 status = -EINVAL;
14816 goto out;
14817 }
14818 /* otherwise default to smallest (drop thru) */
14819 case 256:
14820 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
14821 &cq_set->u.request, LPFC_CQ_CNT_256);
14822 break;
14823 case 512:
14824 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
14825 &cq_set->u.request, LPFC_CQ_CNT_512);
14826 break;
14827 case 1024:
14828 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
14829 &cq_set->u.request, LPFC_CQ_CNT_1024);
14830 break;
14831 }
14832 bf_set(lpfc_mbx_cq_create_set_eq_id0,
14833 &cq_set->u.request, eq->queue_id);
14834 break;
14835 case 1:
14836 bf_set(lpfc_mbx_cq_create_set_eq_id1,
14837 &cq_set->u.request, eq->queue_id);
14838 break;
14839 case 2:
14840 bf_set(lpfc_mbx_cq_create_set_eq_id2,
14841 &cq_set->u.request, eq->queue_id);
14842 break;
14843 case 3:
14844 bf_set(lpfc_mbx_cq_create_set_eq_id3,
14845 &cq_set->u.request, eq->queue_id);
14846 break;
14847 case 4:
14848 bf_set(lpfc_mbx_cq_create_set_eq_id4,
14849 &cq_set->u.request, eq->queue_id);
14850 break;
14851 case 5:
14852 bf_set(lpfc_mbx_cq_create_set_eq_id5,
14853 &cq_set->u.request, eq->queue_id);
14854 break;
14855 case 6:
14856 bf_set(lpfc_mbx_cq_create_set_eq_id6,
14857 &cq_set->u.request, eq->queue_id);
14858 break;
14859 case 7:
14860 bf_set(lpfc_mbx_cq_create_set_eq_id7,
14861 &cq_set->u.request, eq->queue_id);
14862 break;
14863 case 8:
14864 bf_set(lpfc_mbx_cq_create_set_eq_id8,
14865 &cq_set->u.request, eq->queue_id);
14866 break;
14867 case 9:
14868 bf_set(lpfc_mbx_cq_create_set_eq_id9,
14869 &cq_set->u.request, eq->queue_id);
14870 break;
14871 case 10:
14872 bf_set(lpfc_mbx_cq_create_set_eq_id10,
14873 &cq_set->u.request, eq->queue_id);
14874 break;
14875 case 11:
14876 bf_set(lpfc_mbx_cq_create_set_eq_id11,
14877 &cq_set->u.request, eq->queue_id);
14878 break;
14879 case 12:
14880 bf_set(lpfc_mbx_cq_create_set_eq_id12,
14881 &cq_set->u.request, eq->queue_id);
14882 break;
14883 case 13:
14884 bf_set(lpfc_mbx_cq_create_set_eq_id13,
14885 &cq_set->u.request, eq->queue_id);
14886 break;
14887 case 14:
14888 bf_set(lpfc_mbx_cq_create_set_eq_id14,
14889 &cq_set->u.request, eq->queue_id);
14890 break;
14891 case 15:
14892 bf_set(lpfc_mbx_cq_create_set_eq_id15,
14893 &cq_set->u.request, eq->queue_id);
14894 break;
14895 }
14896
14897 /* link the cq onto the parent eq child list */
14898 list_add_tail(&cq->list, &eq->child_list);
14899 /* Set up completion queue's type and subtype */
14900 cq->type = type;
14901 cq->subtype = subtype;
14902 cq->assoc_qid = eq->queue_id;
14903 cq->host_index = 0;
14904 cq->hba_index = 0;
64eb4dcb 14905 cq->entry_repost = LPFC_CQ_REPOST;
81b96eda 14906 cq->chann = idx;
2d7dbc4c
JS
14907
14908 rc = 0;
14909 list_for_each_entry(dmabuf, &cq->page_list, list) {
14910 memset(dmabuf->virt, 0, hw_page_size);
14911 cnt = page_idx + dmabuf->buffer_tag;
14912 cq_set->u.request.page[cnt].addr_lo =
14913 putPaddrLow(dmabuf->phys);
14914 cq_set->u.request.page[cnt].addr_hi =
14915 putPaddrHigh(dmabuf->phys);
14916 rc++;
14917 }
14918 page_idx += rc;
14919 }
14920
14921 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14922
14923 /* The IOCTL status is embedded in the mailbox subheader. */
14924 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14925 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14926 if (shdr_status || shdr_add_status || rc) {
14927 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14928 "3119 CQ_CREATE_SET mailbox failed with "
14929 "status x%x add_status x%x, mbx status x%x\n",
14930 shdr_status, shdr_add_status, rc);
14931 status = -ENXIO;
14932 goto out;
14933 }
14934 rc = bf_get(lpfc_mbx_cq_create_set_base_id, &cq_set->u.response);
14935 if (rc == 0xFFFF) {
14936 status = -ENXIO;
14937 goto out;
14938 }
14939
14940 for (idx = 0; idx < numcq; idx++) {
14941 cq = cqp[idx];
14942 cq->queue_id = rc + idx;
14943 }
14944
14945out:
14946 lpfc_sli4_mbox_cmd_free(phba, mbox);
14947 return status;
14948}
14949
b19a061a
JS
14950/**
14951 * lpfc_mq_create_fb_init - Send MCC_CREATE without async events registration
14952 * @phba: HBA structure that indicates port to create a queue on.
14953 * @mq: The queue structure to use to create the mailbox queue.
14954 * @mbox: An allocated pointer to type LPFC_MBOXQ_t
14955 * @cq: The completion queue to associate with this cq.
14956 *
14957 * This function provides failback (fb) functionality when the
14958 * mq_create_ext fails on older FW generations. It's purpose is identical
14959 * to mq_create_ext otherwise.
14960 *
14961 * This routine cannot fail as all attributes were previously accessed and
14962 * initialized in mq_create_ext.
14963 **/
14964static void
14965lpfc_mq_create_fb_init(struct lpfc_hba *phba, struct lpfc_queue *mq,
14966 LPFC_MBOXQ_t *mbox, struct lpfc_queue *cq)
14967{
14968 struct lpfc_mbx_mq_create *mq_create;
14969 struct lpfc_dmabuf *dmabuf;
14970 int length;
14971
14972 length = (sizeof(struct lpfc_mbx_mq_create) -
14973 sizeof(struct lpfc_sli4_cfg_mhdr));
14974 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14975 LPFC_MBOX_OPCODE_MQ_CREATE,
14976 length, LPFC_SLI4_MBX_EMBED);
14977 mq_create = &mbox->u.mqe.un.mq_create;
14978 bf_set(lpfc_mbx_mq_create_num_pages, &mq_create->u.request,
14979 mq->page_count);
14980 bf_set(lpfc_mq_context_cq_id, &mq_create->u.request.context,
14981 cq->queue_id);
14982 bf_set(lpfc_mq_context_valid, &mq_create->u.request.context, 1);
14983 switch (mq->entry_count) {
14984 case 16:
5a6f133e
JS
14985 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
14986 LPFC_MQ_RING_SIZE_16);
b19a061a
JS
14987 break;
14988 case 32:
5a6f133e
JS
14989 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
14990 LPFC_MQ_RING_SIZE_32);
b19a061a
JS
14991 break;
14992 case 64:
5a6f133e
JS
14993 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
14994 LPFC_MQ_RING_SIZE_64);
b19a061a
JS
14995 break;
14996 case 128:
5a6f133e
JS
14997 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
14998 LPFC_MQ_RING_SIZE_128);
b19a061a
JS
14999 break;
15000 }
15001 list_for_each_entry(dmabuf, &mq->page_list, list) {
15002 mq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15003 putPaddrLow(dmabuf->phys);
15004 mq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15005 putPaddrHigh(dmabuf->phys);
15006 }
15007}
15008
04c68496
JS
15009/**
15010 * lpfc_mq_create - Create a mailbox Queue on the HBA
15011 * @phba: HBA structure that indicates port to create a queue on.
15012 * @mq: The queue structure to use to create the mailbox queue.
b19a061a
JS
15013 * @cq: The completion queue to associate with this cq.
15014 * @subtype: The queue's subtype.
04c68496
JS
15015 *
15016 * This function creates a mailbox queue, as detailed in @mq, on a port,
15017 * described by @phba by sending a MQ_CREATE mailbox command to the HBA.
15018 *
15019 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15020 * is used to get the entry count and entry size that are necessary to
15021 * determine the number of pages to allocate and use for this queue. This
15022 * function will send the MQ_CREATE mailbox command to the HBA to setup the
15023 * mailbox queue. This function is asynchronous and will wait for the mailbox
15024 * command to finish before continuing.
15025 *
15026 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15027 * memory this function will return -ENOMEM. If the queue create mailbox command
15028 * fails this function will return -ENXIO.
04c68496 15029 **/
b19a061a 15030int32_t
04c68496
JS
15031lpfc_mq_create(struct lpfc_hba *phba, struct lpfc_queue *mq,
15032 struct lpfc_queue *cq, uint32_t subtype)
15033{
15034 struct lpfc_mbx_mq_create *mq_create;
b19a061a 15035 struct lpfc_mbx_mq_create_ext *mq_create_ext;
04c68496
JS
15036 struct lpfc_dmabuf *dmabuf;
15037 LPFC_MBOXQ_t *mbox;
15038 int rc, length, status = 0;
15039 uint32_t shdr_status, shdr_add_status;
15040 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15041 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
04c68496 15042
2e90f4b5
JS
15043 /* sanity check on queue memory */
15044 if (!mq || !cq)
15045 return -ENODEV;
49198b37
JS
15046 if (!phba->sli4_hba.pc_sli4_params.supported)
15047 hw_page_size = SLI4_PAGE_SIZE;
b19a061a 15048
04c68496
JS
15049 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15050 if (!mbox)
15051 return -ENOMEM;
b19a061a 15052 length = (sizeof(struct lpfc_mbx_mq_create_ext) -
04c68496
JS
15053 sizeof(struct lpfc_sli4_cfg_mhdr));
15054 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
b19a061a 15055 LPFC_MBOX_OPCODE_MQ_CREATE_EXT,
04c68496 15056 length, LPFC_SLI4_MBX_EMBED);
b19a061a
JS
15057
15058 mq_create_ext = &mbox->u.mqe.un.mq_create_ext;
5a6f133e 15059 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create_ext->header.cfg_shdr;
70f3c073
JS
15060 bf_set(lpfc_mbx_mq_create_ext_num_pages,
15061 &mq_create_ext->u.request, mq->page_count);
15062 bf_set(lpfc_mbx_mq_create_ext_async_evt_link,
15063 &mq_create_ext->u.request, 1);
15064 bf_set(lpfc_mbx_mq_create_ext_async_evt_fip,
b19a061a
JS
15065 &mq_create_ext->u.request, 1);
15066 bf_set(lpfc_mbx_mq_create_ext_async_evt_group5,
15067 &mq_create_ext->u.request, 1);
70f3c073
JS
15068 bf_set(lpfc_mbx_mq_create_ext_async_evt_fc,
15069 &mq_create_ext->u.request, 1);
15070 bf_set(lpfc_mbx_mq_create_ext_async_evt_sli,
15071 &mq_create_ext->u.request, 1);
b19a061a 15072 bf_set(lpfc_mq_context_valid, &mq_create_ext->u.request.context, 1);
5a6f133e
JS
15073 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15074 phba->sli4_hba.pc_sli4_params.mqv);
15075 if (phba->sli4_hba.pc_sli4_params.mqv == LPFC_Q_CREATE_VERSION_1)
15076 bf_set(lpfc_mbx_mq_create_ext_cq_id, &mq_create_ext->u.request,
15077 cq->queue_id);
15078 else
15079 bf_set(lpfc_mq_context_cq_id, &mq_create_ext->u.request.context,
15080 cq->queue_id);
04c68496
JS
15081 switch (mq->entry_count) {
15082 default:
15083 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15084 "0362 Unsupported MQ count. (%d)\n",
15085 mq->entry_count);
4f4c1863
JS
15086 if (mq->entry_count < 16) {
15087 status = -EINVAL;
15088 goto out;
15089 }
04c68496
JS
15090 /* otherwise default to smallest count (drop through) */
15091 case 16:
5a6f133e
JS
15092 bf_set(lpfc_mq_context_ring_size,
15093 &mq_create_ext->u.request.context,
15094 LPFC_MQ_RING_SIZE_16);
04c68496
JS
15095 break;
15096 case 32:
5a6f133e
JS
15097 bf_set(lpfc_mq_context_ring_size,
15098 &mq_create_ext->u.request.context,
15099 LPFC_MQ_RING_SIZE_32);
04c68496
JS
15100 break;
15101 case 64:
5a6f133e
JS
15102 bf_set(lpfc_mq_context_ring_size,
15103 &mq_create_ext->u.request.context,
15104 LPFC_MQ_RING_SIZE_64);
04c68496
JS
15105 break;
15106 case 128:
5a6f133e
JS
15107 bf_set(lpfc_mq_context_ring_size,
15108 &mq_create_ext->u.request.context,
15109 LPFC_MQ_RING_SIZE_128);
04c68496
JS
15110 break;
15111 }
15112 list_for_each_entry(dmabuf, &mq->page_list, list) {
49198b37 15113 memset(dmabuf->virt, 0, hw_page_size);
b19a061a 15114 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_lo =
04c68496 15115 putPaddrLow(dmabuf->phys);
b19a061a 15116 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_hi =
04c68496
JS
15117 putPaddrHigh(dmabuf->phys);
15118 }
15119 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
b19a061a
JS
15120 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15121 &mq_create_ext->u.response);
15122 if (rc != MBX_SUCCESS) {
15123 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15124 "2795 MQ_CREATE_EXT failed with "
15125 "status x%x. Failback to MQ_CREATE.\n",
15126 rc);
15127 lpfc_mq_create_fb_init(phba, mq, mbox, cq);
15128 mq_create = &mbox->u.mqe.un.mq_create;
15129 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15130 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create->header.cfg_shdr;
15131 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15132 &mq_create->u.response);
15133 }
15134
04c68496 15135 /* The IOCTL status is embedded in the mailbox subheader. */
04c68496
JS
15136 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15137 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15138 if (shdr_status || shdr_add_status || rc) {
15139 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15140 "2502 MQ_CREATE mailbox failed with "
15141 "status x%x add_status x%x, mbx status x%x\n",
15142 shdr_status, shdr_add_status, rc);
15143 status = -ENXIO;
15144 goto out;
15145 }
04c68496
JS
15146 if (mq->queue_id == 0xFFFF) {
15147 status = -ENXIO;
15148 goto out;
15149 }
15150 mq->type = LPFC_MQ;
2a622bfb 15151 mq->assoc_qid = cq->queue_id;
04c68496
JS
15152 mq->subtype = subtype;
15153 mq->host_index = 0;
15154 mq->hba_index = 0;
64eb4dcb 15155 mq->entry_repost = LPFC_MQ_REPOST;
04c68496
JS
15156
15157 /* link the mq onto the parent cq child list */
15158 list_add_tail(&mq->list, &cq->child_list);
15159out:
8fa38513 15160 mempool_free(mbox, phba->mbox_mem_pool);
04c68496
JS
15161 return status;
15162}
15163
4f774513
JS
15164/**
15165 * lpfc_wq_create - Create a Work Queue on the HBA
15166 * @phba: HBA structure that indicates port to create a queue on.
15167 * @wq: The queue structure to use to create the work queue.
15168 * @cq: The completion queue to bind this work queue to.
15169 * @subtype: The subtype of the work queue indicating its functionality.
15170 *
15171 * This function creates a work queue, as detailed in @wq, on a port, described
15172 * by @phba by sending a WQ_CREATE mailbox command to the HBA.
15173 *
15174 * The @phba struct is used to send mailbox command to HBA. The @wq struct
15175 * is used to get the entry count and entry size that are necessary to
15176 * determine the number of pages to allocate and use for this queue. The @cq
15177 * is used to indicate which completion queue to bind this work queue to. This
15178 * function will send the WQ_CREATE mailbox command to the HBA to setup the
15179 * work queue. This function is asynchronous and will wait for the mailbox
15180 * command to finish before continuing.
15181 *
15182 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15183 * memory this function will return -ENOMEM. If the queue create mailbox command
15184 * fails this function will return -ENXIO.
4f774513 15185 **/
a2fc4aef 15186int
4f774513
JS
15187lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq,
15188 struct lpfc_queue *cq, uint32_t subtype)
15189{
15190 struct lpfc_mbx_wq_create *wq_create;
15191 struct lpfc_dmabuf *dmabuf;
15192 LPFC_MBOXQ_t *mbox;
15193 int rc, length, status = 0;
15194 uint32_t shdr_status, shdr_add_status;
15195 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15196 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
5a6f133e 15197 struct dma_address *page;
962bc51b
JS
15198 void __iomem *bar_memmap_p;
15199 uint32_t db_offset;
15200 uint16_t pci_barset;
1351e69f
JS
15201 uint8_t dpp_barset;
15202 uint32_t dpp_offset;
15203 unsigned long pg_addr;
81b96eda 15204 uint8_t wq_create_version;
49198b37 15205
2e90f4b5
JS
15206 /* sanity check on queue memory */
15207 if (!wq || !cq)
15208 return -ENODEV;
49198b37 15209 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 15210 hw_page_size = wq->page_size;
4f774513
JS
15211
15212 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15213 if (!mbox)
15214 return -ENOMEM;
15215 length = (sizeof(struct lpfc_mbx_wq_create) -
15216 sizeof(struct lpfc_sli4_cfg_mhdr));
15217 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15218 LPFC_MBOX_OPCODE_FCOE_WQ_CREATE,
15219 length, LPFC_SLI4_MBX_EMBED);
15220 wq_create = &mbox->u.mqe.un.wq_create;
5a6f133e 15221 shdr = (union lpfc_sli4_cfg_shdr *) &wq_create->header.cfg_shdr;
4f774513
JS
15222 bf_set(lpfc_mbx_wq_create_num_pages, &wq_create->u.request,
15223 wq->page_count);
15224 bf_set(lpfc_mbx_wq_create_cq_id, &wq_create->u.request,
15225 cq->queue_id);
0c651878
JS
15226
15227 /* wqv is the earliest version supported, NOT the latest */
5a6f133e
JS
15228 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15229 phba->sli4_hba.pc_sli4_params.wqv);
962bc51b 15230
c176ffa0
JS
15231 if ((phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT) ||
15232 (wq->page_size > SLI4_PAGE_SIZE))
81b96eda
JS
15233 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15234 else
15235 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15236
0c651878 15237
1351e69f
JS
15238 if (phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT)
15239 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15240 else
15241 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15242
15243 switch (wq_create_version) {
0c651878 15244 case LPFC_Q_CREATE_VERSION_1:
5a6f133e
JS
15245 bf_set(lpfc_mbx_wq_create_wqe_count, &wq_create->u.request_1,
15246 wq->entry_count);
3f247de7
JS
15247 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15248 LPFC_Q_CREATE_VERSION_1);
15249
5a6f133e
JS
15250 switch (wq->entry_size) {
15251 default:
15252 case 64:
15253 bf_set(lpfc_mbx_wq_create_wqe_size,
15254 &wq_create->u.request_1,
15255 LPFC_WQ_WQE_SIZE_64);
15256 break;
15257 case 128:
15258 bf_set(lpfc_mbx_wq_create_wqe_size,
15259 &wq_create->u.request_1,
15260 LPFC_WQ_WQE_SIZE_128);
15261 break;
15262 }
1351e69f
JS
15263 /* Request DPP by default */
15264 bf_set(lpfc_mbx_wq_create_dpp_req, &wq_create->u.request_1, 1);
8ea73db4
JS
15265 bf_set(lpfc_mbx_wq_create_page_size,
15266 &wq_create->u.request_1,
81b96eda 15267 (wq->page_size / SLI4_PAGE_SIZE));
5a6f133e 15268 page = wq_create->u.request_1.page;
0c651878
JS
15269 break;
15270 default:
1351e69f
JS
15271 page = wq_create->u.request.page;
15272 break;
5a6f133e 15273 }
0c651878 15274
4f774513 15275 list_for_each_entry(dmabuf, &wq->page_list, list) {
49198b37 15276 memset(dmabuf->virt, 0, hw_page_size);
5a6f133e
JS
15277 page[dmabuf->buffer_tag].addr_lo = putPaddrLow(dmabuf->phys);
15278 page[dmabuf->buffer_tag].addr_hi = putPaddrHigh(dmabuf->phys);
4f774513 15279 }
962bc51b
JS
15280
15281 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15282 bf_set(lpfc_mbx_wq_create_dua, &wq_create->u.request, 1);
15283
4f774513
JS
15284 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15285 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15286 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15287 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15288 if (shdr_status || shdr_add_status || rc) {
15289 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15290 "2503 WQ_CREATE mailbox failed with "
15291 "status x%x add_status x%x, mbx status x%x\n",
15292 shdr_status, shdr_add_status, rc);
15293 status = -ENXIO;
15294 goto out;
15295 }
1351e69f
JS
15296
15297 if (wq_create_version == LPFC_Q_CREATE_VERSION_0)
15298 wq->queue_id = bf_get(lpfc_mbx_wq_create_q_id,
15299 &wq_create->u.response);
15300 else
15301 wq->queue_id = bf_get(lpfc_mbx_wq_create_v1_q_id,
15302 &wq_create->u.response_1);
15303
4f774513
JS
15304 if (wq->queue_id == 0xFFFF) {
15305 status = -ENXIO;
15306 goto out;
15307 }
1351e69f
JS
15308
15309 wq->db_format = LPFC_DB_LIST_FORMAT;
15310 if (wq_create_version == LPFC_Q_CREATE_VERSION_0) {
15311 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15312 wq->db_format = bf_get(lpfc_mbx_wq_create_db_format,
15313 &wq_create->u.response);
15314 if ((wq->db_format != LPFC_DB_LIST_FORMAT) &&
15315 (wq->db_format != LPFC_DB_RING_FORMAT)) {
15316 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15317 "3265 WQ[%d] doorbell format "
15318 "not supported: x%x\n",
15319 wq->queue_id, wq->db_format);
15320 status = -EINVAL;
15321 goto out;
15322 }
15323 pci_barset = bf_get(lpfc_mbx_wq_create_bar_set,
15324 &wq_create->u.response);
15325 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15326 pci_barset);
15327 if (!bar_memmap_p) {
15328 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15329 "3263 WQ[%d] failed to memmap "
15330 "pci barset:x%x\n",
15331 wq->queue_id, pci_barset);
15332 status = -ENOMEM;
15333 goto out;
15334 }
15335 db_offset = wq_create->u.response.doorbell_offset;
15336 if ((db_offset != LPFC_ULP0_WQ_DOORBELL) &&
15337 (db_offset != LPFC_ULP1_WQ_DOORBELL)) {
15338 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15339 "3252 WQ[%d] doorbell offset "
15340 "not supported: x%x\n",
15341 wq->queue_id, db_offset);
15342 status = -EINVAL;
15343 goto out;
15344 }
15345 wq->db_regaddr = bar_memmap_p + db_offset;
15346 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15347 "3264 WQ[%d]: barset:x%x, offset:x%x, "
15348 "format:x%x\n", wq->queue_id,
15349 pci_barset, db_offset, wq->db_format);
15350 } else
15351 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15352 } else {
1351e69f
JS
15353 /* Check if DPP was honored by the firmware */
15354 wq->dpp_enable = bf_get(lpfc_mbx_wq_create_dpp_rsp,
15355 &wq_create->u.response_1);
15356 if (wq->dpp_enable) {
15357 pci_barset = bf_get(lpfc_mbx_wq_create_v1_bar_set,
15358 &wq_create->u.response_1);
15359 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15360 pci_barset);
15361 if (!bar_memmap_p) {
15362 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15363 "3267 WQ[%d] failed to memmap "
15364 "pci barset:x%x\n",
15365 wq->queue_id, pci_barset);
15366 status = -ENOMEM;
15367 goto out;
15368 }
15369 db_offset = wq_create->u.response_1.doorbell_offset;
15370 wq->db_regaddr = bar_memmap_p + db_offset;
15371 wq->dpp_id = bf_get(lpfc_mbx_wq_create_dpp_id,
15372 &wq_create->u.response_1);
15373 dpp_barset = bf_get(lpfc_mbx_wq_create_dpp_bar,
15374 &wq_create->u.response_1);
15375 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15376 dpp_barset);
15377 if (!bar_memmap_p) {
15378 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15379 "3268 WQ[%d] failed to memmap "
15380 "pci barset:x%x\n",
15381 wq->queue_id, dpp_barset);
15382 status = -ENOMEM;
15383 goto out;
15384 }
15385 dpp_offset = wq_create->u.response_1.dpp_offset;
15386 wq->dpp_regaddr = bar_memmap_p + dpp_offset;
15387 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15388 "3271 WQ[%d]: barset:x%x, offset:x%x, "
15389 "dpp_id:x%x dpp_barset:x%x "
15390 "dpp_offset:x%x\n",
15391 wq->queue_id, pci_barset, db_offset,
15392 wq->dpp_id, dpp_barset, dpp_offset);
15393
15394 /* Enable combined writes for DPP aperture */
15395 pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK;
15396#ifdef CONFIG_X86
15397 rc = set_memory_wc(pg_addr, 1);
15398 if (rc) {
15399 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15400 "3272 Cannot setup Combined "
15401 "Write on WQ[%d] - disable DPP\n",
15402 wq->queue_id);
15403 phba->cfg_enable_dpp = 0;
15404 }
15405#else
15406 phba->cfg_enable_dpp = 0;
15407#endif
15408 } else
15409 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15410 }
895427bd
JS
15411 wq->pring = kzalloc(sizeof(struct lpfc_sli_ring), GFP_KERNEL);
15412 if (wq->pring == NULL) {
15413 status = -ENOMEM;
15414 goto out;
15415 }
4f774513 15416 wq->type = LPFC_WQ;
2a622bfb 15417 wq->assoc_qid = cq->queue_id;
4f774513
JS
15418 wq->subtype = subtype;
15419 wq->host_index = 0;
15420 wq->hba_index = 0;
ff78d8f9 15421 wq->entry_repost = LPFC_RELEASE_NOTIFICATION_INTERVAL;
4f774513
JS
15422
15423 /* link the wq onto the parent cq child list */
15424 list_add_tail(&wq->list, &cq->child_list);
15425out:
8fa38513 15426 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15427 return status;
15428}
15429
15430/**
15431 * lpfc_rq_create - Create a Receive Queue on the HBA
15432 * @phba: HBA structure that indicates port to create a queue on.
15433 * @hrq: The queue structure to use to create the header receive queue.
15434 * @drq: The queue structure to use to create the data receive queue.
15435 * @cq: The completion queue to bind this work queue to.
15436 *
15437 * This function creates a receive buffer queue pair , as detailed in @hrq and
15438 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15439 * to the HBA.
15440 *
15441 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15442 * struct is used to get the entry count that is necessary to determine the
15443 * number of pages to use for this queue. The @cq is used to indicate which
15444 * completion queue to bind received buffers that are posted to these queues to.
15445 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15446 * receive queue pair. This function is asynchronous and will wait for the
15447 * mailbox command to finish before continuing.
15448 *
15449 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15450 * memory this function will return -ENOMEM. If the queue create mailbox command
15451 * fails this function will return -ENXIO.
4f774513 15452 **/
a2fc4aef 15453int
4f774513
JS
15454lpfc_rq_create(struct lpfc_hba *phba, struct lpfc_queue *hrq,
15455 struct lpfc_queue *drq, struct lpfc_queue *cq, uint32_t subtype)
15456{
15457 struct lpfc_mbx_rq_create *rq_create;
15458 struct lpfc_dmabuf *dmabuf;
15459 LPFC_MBOXQ_t *mbox;
15460 int rc, length, status = 0;
15461 uint32_t shdr_status, shdr_add_status;
15462 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15463 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
962bc51b
JS
15464 void __iomem *bar_memmap_p;
15465 uint32_t db_offset;
15466 uint16_t pci_barset;
49198b37 15467
2e90f4b5
JS
15468 /* sanity check on queue memory */
15469 if (!hrq || !drq || !cq)
15470 return -ENODEV;
49198b37
JS
15471 if (!phba->sli4_hba.pc_sli4_params.supported)
15472 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
15473
15474 if (hrq->entry_count != drq->entry_count)
15475 return -EINVAL;
15476 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15477 if (!mbox)
15478 return -ENOMEM;
15479 length = (sizeof(struct lpfc_mbx_rq_create) -
15480 sizeof(struct lpfc_sli4_cfg_mhdr));
15481 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15482 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15483 length, LPFC_SLI4_MBX_EMBED);
15484 rq_create = &mbox->u.mqe.un.rq_create;
5a6f133e
JS
15485 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
15486 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15487 phba->sli4_hba.pc_sli4_params.rqv);
15488 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15489 bf_set(lpfc_rq_context_rqe_count_1,
15490 &rq_create->u.request.context,
15491 hrq->entry_count);
15492 rq_create->u.request.context.buffer_size = LPFC_HDR_BUF_SIZE;
c31098ce
JS
15493 bf_set(lpfc_rq_context_rqe_size,
15494 &rq_create->u.request.context,
15495 LPFC_RQE_SIZE_8);
15496 bf_set(lpfc_rq_context_page_size,
15497 &rq_create->u.request.context,
8ea73db4 15498 LPFC_RQ_PAGE_SIZE_4096);
5a6f133e
JS
15499 } else {
15500 switch (hrq->entry_count) {
15501 default:
15502 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15503 "2535 Unsupported RQ count. (%d)\n",
15504 hrq->entry_count);
4f4c1863
JS
15505 if (hrq->entry_count < 512) {
15506 status = -EINVAL;
15507 goto out;
15508 }
5a6f133e
JS
15509 /* otherwise default to smallest count (drop through) */
15510 case 512:
15511 bf_set(lpfc_rq_context_rqe_count,
15512 &rq_create->u.request.context,
15513 LPFC_RQ_RING_SIZE_512);
15514 break;
15515 case 1024:
15516 bf_set(lpfc_rq_context_rqe_count,
15517 &rq_create->u.request.context,
15518 LPFC_RQ_RING_SIZE_1024);
15519 break;
15520 case 2048:
15521 bf_set(lpfc_rq_context_rqe_count,
15522 &rq_create->u.request.context,
15523 LPFC_RQ_RING_SIZE_2048);
15524 break;
15525 case 4096:
15526 bf_set(lpfc_rq_context_rqe_count,
15527 &rq_create->u.request.context,
15528 LPFC_RQ_RING_SIZE_4096);
15529 break;
15530 }
15531 bf_set(lpfc_rq_context_buf_size, &rq_create->u.request.context,
15532 LPFC_HDR_BUF_SIZE);
4f774513
JS
15533 }
15534 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
15535 cq->queue_id);
15536 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
15537 hrq->page_count);
4f774513 15538 list_for_each_entry(dmabuf, &hrq->page_list, list) {
49198b37 15539 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
15540 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15541 putPaddrLow(dmabuf->phys);
15542 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15543 putPaddrHigh(dmabuf->phys);
15544 }
962bc51b
JS
15545 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15546 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
15547
4f774513
JS
15548 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15549 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15550 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15551 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15552 if (shdr_status || shdr_add_status || rc) {
15553 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15554 "2504 RQ_CREATE mailbox failed with "
15555 "status x%x add_status x%x, mbx status x%x\n",
15556 shdr_status, shdr_add_status, rc);
15557 status = -ENXIO;
15558 goto out;
15559 }
15560 hrq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15561 if (hrq->queue_id == 0xFFFF) {
15562 status = -ENXIO;
15563 goto out;
15564 }
962bc51b
JS
15565
15566 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15567 hrq->db_format = bf_get(lpfc_mbx_rq_create_db_format,
15568 &rq_create->u.response);
15569 if ((hrq->db_format != LPFC_DB_LIST_FORMAT) &&
15570 (hrq->db_format != LPFC_DB_RING_FORMAT)) {
15571 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15572 "3262 RQ [%d] doorbell format not "
15573 "supported: x%x\n", hrq->queue_id,
15574 hrq->db_format);
15575 status = -EINVAL;
15576 goto out;
15577 }
15578
15579 pci_barset = bf_get(lpfc_mbx_rq_create_bar_set,
15580 &rq_create->u.response);
15581 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba, pci_barset);
15582 if (!bar_memmap_p) {
15583 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15584 "3269 RQ[%d] failed to memmap pci "
15585 "barset:x%x\n", hrq->queue_id,
15586 pci_barset);
15587 status = -ENOMEM;
15588 goto out;
15589 }
15590
15591 db_offset = rq_create->u.response.doorbell_offset;
15592 if ((db_offset != LPFC_ULP0_RQ_DOORBELL) &&
15593 (db_offset != LPFC_ULP1_RQ_DOORBELL)) {
15594 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15595 "3270 RQ[%d] doorbell offset not "
15596 "supported: x%x\n", hrq->queue_id,
15597 db_offset);
15598 status = -EINVAL;
15599 goto out;
15600 }
15601 hrq->db_regaddr = bar_memmap_p + db_offset;
15602 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a22e7db3
JS
15603 "3266 RQ[qid:%d]: barset:x%x, offset:x%x, "
15604 "format:x%x\n", hrq->queue_id, pci_barset,
15605 db_offset, hrq->db_format);
962bc51b
JS
15606 } else {
15607 hrq->db_format = LPFC_DB_RING_FORMAT;
15608 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
15609 }
4f774513 15610 hrq->type = LPFC_HRQ;
2a622bfb 15611 hrq->assoc_qid = cq->queue_id;
4f774513
JS
15612 hrq->subtype = subtype;
15613 hrq->host_index = 0;
15614 hrq->hba_index = 0;
61f3d4bf 15615 hrq->entry_repost = LPFC_RQ_REPOST;
4f774513
JS
15616
15617 /* now create the data queue */
15618 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15619 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15620 length, LPFC_SLI4_MBX_EMBED);
5a6f133e
JS
15621 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15622 phba->sli4_hba.pc_sli4_params.rqv);
15623 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15624 bf_set(lpfc_rq_context_rqe_count_1,
c31098ce 15625 &rq_create->u.request.context, hrq->entry_count);
3c603be9
JS
15626 if (subtype == LPFC_NVMET)
15627 rq_create->u.request.context.buffer_size =
15628 LPFC_NVMET_DATA_BUF_SIZE;
15629 else
15630 rq_create->u.request.context.buffer_size =
15631 LPFC_DATA_BUF_SIZE;
c31098ce
JS
15632 bf_set(lpfc_rq_context_rqe_size, &rq_create->u.request.context,
15633 LPFC_RQE_SIZE_8);
15634 bf_set(lpfc_rq_context_page_size, &rq_create->u.request.context,
15635 (PAGE_SIZE/SLI4_PAGE_SIZE));
5a6f133e
JS
15636 } else {
15637 switch (drq->entry_count) {
15638 default:
15639 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15640 "2536 Unsupported RQ count. (%d)\n",
15641 drq->entry_count);
4f4c1863
JS
15642 if (drq->entry_count < 512) {
15643 status = -EINVAL;
15644 goto out;
15645 }
5a6f133e
JS
15646 /* otherwise default to smallest count (drop through) */
15647 case 512:
15648 bf_set(lpfc_rq_context_rqe_count,
15649 &rq_create->u.request.context,
15650 LPFC_RQ_RING_SIZE_512);
15651 break;
15652 case 1024:
15653 bf_set(lpfc_rq_context_rqe_count,
15654 &rq_create->u.request.context,
15655 LPFC_RQ_RING_SIZE_1024);
15656 break;
15657 case 2048:
15658 bf_set(lpfc_rq_context_rqe_count,
15659 &rq_create->u.request.context,
15660 LPFC_RQ_RING_SIZE_2048);
15661 break;
15662 case 4096:
15663 bf_set(lpfc_rq_context_rqe_count,
15664 &rq_create->u.request.context,
15665 LPFC_RQ_RING_SIZE_4096);
15666 break;
15667 }
3c603be9
JS
15668 if (subtype == LPFC_NVMET)
15669 bf_set(lpfc_rq_context_buf_size,
15670 &rq_create->u.request.context,
15671 LPFC_NVMET_DATA_BUF_SIZE);
15672 else
15673 bf_set(lpfc_rq_context_buf_size,
15674 &rq_create->u.request.context,
15675 LPFC_DATA_BUF_SIZE);
4f774513
JS
15676 }
15677 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
15678 cq->queue_id);
15679 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
15680 drq->page_count);
4f774513
JS
15681 list_for_each_entry(dmabuf, &drq->page_list, list) {
15682 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15683 putPaddrLow(dmabuf->phys);
15684 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15685 putPaddrHigh(dmabuf->phys);
15686 }
962bc51b
JS
15687 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15688 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
4f774513
JS
15689 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15690 /* The IOCTL status is embedded in the mailbox subheader. */
15691 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
15692 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15693 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15694 if (shdr_status || shdr_add_status || rc) {
15695 status = -ENXIO;
15696 goto out;
15697 }
15698 drq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15699 if (drq->queue_id == 0xFFFF) {
15700 status = -ENXIO;
15701 goto out;
15702 }
15703 drq->type = LPFC_DRQ;
2a622bfb 15704 drq->assoc_qid = cq->queue_id;
4f774513
JS
15705 drq->subtype = subtype;
15706 drq->host_index = 0;
15707 drq->hba_index = 0;
61f3d4bf 15708 drq->entry_repost = LPFC_RQ_REPOST;
4f774513
JS
15709
15710 /* link the header and data RQs onto the parent cq child list */
15711 list_add_tail(&hrq->list, &cq->child_list);
15712 list_add_tail(&drq->list, &cq->child_list);
15713
15714out:
8fa38513 15715 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15716 return status;
15717}
15718
2d7dbc4c
JS
15719/**
15720 * lpfc_mrq_create - Create MRQ Receive Queues on the HBA
15721 * @phba: HBA structure that indicates port to create a queue on.
15722 * @hrqp: The queue structure array to use to create the header receive queues.
15723 * @drqp: The queue structure array to use to create the data receive queues.
15724 * @cqp: The completion queue array to bind these receive queues to.
15725 *
15726 * This function creates a receive buffer queue pair , as detailed in @hrq and
15727 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15728 * to the HBA.
15729 *
15730 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15731 * struct is used to get the entry count that is necessary to determine the
15732 * number of pages to use for this queue. The @cq is used to indicate which
15733 * completion queue to bind received buffers that are posted to these queues to.
15734 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15735 * receive queue pair. This function is asynchronous and will wait for the
15736 * mailbox command to finish before continuing.
15737 *
15738 * On success this function will return a zero. If unable to allocate enough
15739 * memory this function will return -ENOMEM. If the queue create mailbox command
15740 * fails this function will return -ENXIO.
15741 **/
15742int
15743lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
15744 struct lpfc_queue **drqp, struct lpfc_queue **cqp,
15745 uint32_t subtype)
15746{
15747 struct lpfc_queue *hrq, *drq, *cq;
15748 struct lpfc_mbx_rq_create_v2 *rq_create;
15749 struct lpfc_dmabuf *dmabuf;
15750 LPFC_MBOXQ_t *mbox;
15751 int rc, length, alloclen, status = 0;
15752 int cnt, idx, numrq, page_idx = 0;
15753 uint32_t shdr_status, shdr_add_status;
15754 union lpfc_sli4_cfg_shdr *shdr;
15755 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
15756
15757 numrq = phba->cfg_nvmet_mrq;
15758 /* sanity check on array memory */
15759 if (!hrqp || !drqp || !cqp || !numrq)
15760 return -ENODEV;
15761 if (!phba->sli4_hba.pc_sli4_params.supported)
15762 hw_page_size = SLI4_PAGE_SIZE;
15763
15764 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15765 if (!mbox)
15766 return -ENOMEM;
15767
15768 length = sizeof(struct lpfc_mbx_rq_create_v2);
15769 length += ((2 * numrq * hrqp[0]->page_count) *
15770 sizeof(struct dma_address));
15771
15772 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15773 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE, length,
15774 LPFC_SLI4_MBX_NEMBED);
15775 if (alloclen < length) {
15776 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15777 "3099 Allocated DMA memory size (%d) is "
15778 "less than the requested DMA memory size "
15779 "(%d)\n", alloclen, length);
15780 status = -ENOMEM;
15781 goto out;
15782 }
15783
15784
15785
15786 rq_create = mbox->sge_array->addr[0];
15787 shdr = (union lpfc_sli4_cfg_shdr *)&rq_create->cfg_shdr;
15788
15789 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_Q_CREATE_VERSION_2);
15790 cnt = 0;
15791
15792 for (idx = 0; idx < numrq; idx++) {
15793 hrq = hrqp[idx];
15794 drq = drqp[idx];
15795 cq = cqp[idx];
15796
2d7dbc4c
JS
15797 /* sanity check on queue memory */
15798 if (!hrq || !drq || !cq) {
15799 status = -ENODEV;
15800 goto out;
15801 }
15802
7aabe84b
JS
15803 if (hrq->entry_count != drq->entry_count) {
15804 status = -EINVAL;
15805 goto out;
15806 }
15807
2d7dbc4c
JS
15808 if (idx == 0) {
15809 bf_set(lpfc_mbx_rq_create_num_pages,
15810 &rq_create->u.request,
15811 hrq->page_count);
15812 bf_set(lpfc_mbx_rq_create_rq_cnt,
15813 &rq_create->u.request, (numrq * 2));
15814 bf_set(lpfc_mbx_rq_create_dnb, &rq_create->u.request,
15815 1);
15816 bf_set(lpfc_rq_context_base_cq,
15817 &rq_create->u.request.context,
15818 cq->queue_id);
15819 bf_set(lpfc_rq_context_data_size,
15820 &rq_create->u.request.context,
3c603be9 15821 LPFC_NVMET_DATA_BUF_SIZE);
2d7dbc4c
JS
15822 bf_set(lpfc_rq_context_hdr_size,
15823 &rq_create->u.request.context,
15824 LPFC_HDR_BUF_SIZE);
15825 bf_set(lpfc_rq_context_rqe_count_1,
15826 &rq_create->u.request.context,
15827 hrq->entry_count);
15828 bf_set(lpfc_rq_context_rqe_size,
15829 &rq_create->u.request.context,
15830 LPFC_RQE_SIZE_8);
15831 bf_set(lpfc_rq_context_page_size,
15832 &rq_create->u.request.context,
15833 (PAGE_SIZE/SLI4_PAGE_SIZE));
15834 }
15835 rc = 0;
15836 list_for_each_entry(dmabuf, &hrq->page_list, list) {
15837 memset(dmabuf->virt, 0, hw_page_size);
15838 cnt = page_idx + dmabuf->buffer_tag;
15839 rq_create->u.request.page[cnt].addr_lo =
15840 putPaddrLow(dmabuf->phys);
15841 rq_create->u.request.page[cnt].addr_hi =
15842 putPaddrHigh(dmabuf->phys);
15843 rc++;
15844 }
15845 page_idx += rc;
15846
15847 rc = 0;
15848 list_for_each_entry(dmabuf, &drq->page_list, list) {
15849 memset(dmabuf->virt, 0, hw_page_size);
15850 cnt = page_idx + dmabuf->buffer_tag;
15851 rq_create->u.request.page[cnt].addr_lo =
15852 putPaddrLow(dmabuf->phys);
15853 rq_create->u.request.page[cnt].addr_hi =
15854 putPaddrHigh(dmabuf->phys);
15855 rc++;
15856 }
15857 page_idx += rc;
15858
15859 hrq->db_format = LPFC_DB_RING_FORMAT;
15860 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
15861 hrq->type = LPFC_HRQ;
15862 hrq->assoc_qid = cq->queue_id;
15863 hrq->subtype = subtype;
15864 hrq->host_index = 0;
15865 hrq->hba_index = 0;
61f3d4bf 15866 hrq->entry_repost = LPFC_RQ_REPOST;
2d7dbc4c
JS
15867
15868 drq->db_format = LPFC_DB_RING_FORMAT;
15869 drq->db_regaddr = phba->sli4_hba.RQDBregaddr;
15870 drq->type = LPFC_DRQ;
15871 drq->assoc_qid = cq->queue_id;
15872 drq->subtype = subtype;
15873 drq->host_index = 0;
15874 drq->hba_index = 0;
61f3d4bf 15875 drq->entry_repost = LPFC_RQ_REPOST;
2d7dbc4c
JS
15876
15877 list_add_tail(&hrq->list, &cq->child_list);
15878 list_add_tail(&drq->list, &cq->child_list);
15879 }
15880
15881 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15882 /* The IOCTL status is embedded in the mailbox subheader. */
15883 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15884 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15885 if (shdr_status || shdr_add_status || rc) {
15886 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15887 "3120 RQ_CREATE mailbox failed with "
15888 "status x%x add_status x%x, mbx status x%x\n",
15889 shdr_status, shdr_add_status, rc);
15890 status = -ENXIO;
15891 goto out;
15892 }
15893 rc = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15894 if (rc == 0xFFFF) {
15895 status = -ENXIO;
15896 goto out;
15897 }
15898
15899 /* Initialize all RQs with associated queue id */
15900 for (idx = 0; idx < numrq; idx++) {
15901 hrq = hrqp[idx];
15902 hrq->queue_id = rc + (2 * idx);
15903 drq = drqp[idx];
15904 drq->queue_id = rc + (2 * idx) + 1;
15905 }
15906
15907out:
15908 lpfc_sli4_mbox_cmd_free(phba, mbox);
15909 return status;
15910}
15911
4f774513
JS
15912/**
15913 * lpfc_eq_destroy - Destroy an event Queue on the HBA
15914 * @eq: The queue structure associated with the queue to destroy.
15915 *
15916 * This function destroys a queue, as detailed in @eq by sending an mailbox
15917 * command, specific to the type of queue, to the HBA.
15918 *
15919 * The @eq struct is used to get the queue ID of the queue to destroy.
15920 *
15921 * On success this function will return a zero. If the queue destroy mailbox
d439d286 15922 * command fails this function will return -ENXIO.
4f774513 15923 **/
a2fc4aef 15924int
4f774513
JS
15925lpfc_eq_destroy(struct lpfc_hba *phba, struct lpfc_queue *eq)
15926{
15927 LPFC_MBOXQ_t *mbox;
15928 int rc, length, status = 0;
15929 uint32_t shdr_status, shdr_add_status;
15930 union lpfc_sli4_cfg_shdr *shdr;
15931
2e90f4b5 15932 /* sanity check on queue memory */
4f774513
JS
15933 if (!eq)
15934 return -ENODEV;
15935 mbox = mempool_alloc(eq->phba->mbox_mem_pool, GFP_KERNEL);
15936 if (!mbox)
15937 return -ENOMEM;
15938 length = (sizeof(struct lpfc_mbx_eq_destroy) -
15939 sizeof(struct lpfc_sli4_cfg_mhdr));
15940 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15941 LPFC_MBOX_OPCODE_EQ_DESTROY,
15942 length, LPFC_SLI4_MBX_EMBED);
15943 bf_set(lpfc_mbx_eq_destroy_q_id, &mbox->u.mqe.un.eq_destroy.u.request,
15944 eq->queue_id);
15945 mbox->vport = eq->phba->pport;
15946 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
15947
15948 rc = lpfc_sli_issue_mbox(eq->phba, mbox, MBX_POLL);
15949 /* The IOCTL status is embedded in the mailbox subheader. */
15950 shdr = (union lpfc_sli4_cfg_shdr *)
15951 &mbox->u.mqe.un.eq_destroy.header.cfg_shdr;
15952 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15953 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15954 if (shdr_status || shdr_add_status || rc) {
15955 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15956 "2505 EQ_DESTROY mailbox failed with "
15957 "status x%x add_status x%x, mbx status x%x\n",
15958 shdr_status, shdr_add_status, rc);
15959 status = -ENXIO;
15960 }
15961
15962 /* Remove eq from any list */
15963 list_del_init(&eq->list);
8fa38513 15964 mempool_free(mbox, eq->phba->mbox_mem_pool);
4f774513
JS
15965 return status;
15966}
15967
15968/**
15969 * lpfc_cq_destroy - Destroy a Completion Queue on the HBA
15970 * @cq: The queue structure associated with the queue to destroy.
15971 *
15972 * This function destroys a queue, as detailed in @cq by sending an mailbox
15973 * command, specific to the type of queue, to the HBA.
15974 *
15975 * The @cq struct is used to get the queue ID of the queue to destroy.
15976 *
15977 * On success this function will return a zero. If the queue destroy mailbox
d439d286 15978 * command fails this function will return -ENXIO.
4f774513 15979 **/
a2fc4aef 15980int
4f774513
JS
15981lpfc_cq_destroy(struct lpfc_hba *phba, struct lpfc_queue *cq)
15982{
15983 LPFC_MBOXQ_t *mbox;
15984 int rc, length, status = 0;
15985 uint32_t shdr_status, shdr_add_status;
15986 union lpfc_sli4_cfg_shdr *shdr;
15987
2e90f4b5 15988 /* sanity check on queue memory */
4f774513
JS
15989 if (!cq)
15990 return -ENODEV;
15991 mbox = mempool_alloc(cq->phba->mbox_mem_pool, GFP_KERNEL);
15992 if (!mbox)
15993 return -ENOMEM;
15994 length = (sizeof(struct lpfc_mbx_cq_destroy) -
15995 sizeof(struct lpfc_sli4_cfg_mhdr));
15996 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15997 LPFC_MBOX_OPCODE_CQ_DESTROY,
15998 length, LPFC_SLI4_MBX_EMBED);
15999 bf_set(lpfc_mbx_cq_destroy_q_id, &mbox->u.mqe.un.cq_destroy.u.request,
16000 cq->queue_id);
16001 mbox->vport = cq->phba->pport;
16002 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16003 rc = lpfc_sli_issue_mbox(cq->phba, mbox, MBX_POLL);
16004 /* The IOCTL status is embedded in the mailbox subheader. */
16005 shdr = (union lpfc_sli4_cfg_shdr *)
16006 &mbox->u.mqe.un.wq_create.header.cfg_shdr;
16007 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16008 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16009 if (shdr_status || shdr_add_status || rc) {
16010 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16011 "2506 CQ_DESTROY mailbox failed with "
16012 "status x%x add_status x%x, mbx status x%x\n",
16013 shdr_status, shdr_add_status, rc);
16014 status = -ENXIO;
16015 }
16016 /* Remove cq from any list */
16017 list_del_init(&cq->list);
8fa38513 16018 mempool_free(mbox, cq->phba->mbox_mem_pool);
4f774513
JS
16019 return status;
16020}
16021
04c68496
JS
16022/**
16023 * lpfc_mq_destroy - Destroy a Mailbox Queue on the HBA
16024 * @qm: The queue structure associated with the queue to destroy.
16025 *
16026 * This function destroys a queue, as detailed in @mq by sending an mailbox
16027 * command, specific to the type of queue, to the HBA.
16028 *
16029 * The @mq struct is used to get the queue ID of the queue to destroy.
16030 *
16031 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16032 * command fails this function will return -ENXIO.
04c68496 16033 **/
a2fc4aef 16034int
04c68496
JS
16035lpfc_mq_destroy(struct lpfc_hba *phba, struct lpfc_queue *mq)
16036{
16037 LPFC_MBOXQ_t *mbox;
16038 int rc, length, status = 0;
16039 uint32_t shdr_status, shdr_add_status;
16040 union lpfc_sli4_cfg_shdr *shdr;
16041
2e90f4b5 16042 /* sanity check on queue memory */
04c68496
JS
16043 if (!mq)
16044 return -ENODEV;
16045 mbox = mempool_alloc(mq->phba->mbox_mem_pool, GFP_KERNEL);
16046 if (!mbox)
16047 return -ENOMEM;
16048 length = (sizeof(struct lpfc_mbx_mq_destroy) -
16049 sizeof(struct lpfc_sli4_cfg_mhdr));
16050 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16051 LPFC_MBOX_OPCODE_MQ_DESTROY,
16052 length, LPFC_SLI4_MBX_EMBED);
16053 bf_set(lpfc_mbx_mq_destroy_q_id, &mbox->u.mqe.un.mq_destroy.u.request,
16054 mq->queue_id);
16055 mbox->vport = mq->phba->pport;
16056 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16057 rc = lpfc_sli_issue_mbox(mq->phba, mbox, MBX_POLL);
16058 /* The IOCTL status is embedded in the mailbox subheader. */
16059 shdr = (union lpfc_sli4_cfg_shdr *)
16060 &mbox->u.mqe.un.mq_destroy.header.cfg_shdr;
16061 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16062 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16063 if (shdr_status || shdr_add_status || rc) {
16064 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16065 "2507 MQ_DESTROY mailbox failed with "
16066 "status x%x add_status x%x, mbx status x%x\n",
16067 shdr_status, shdr_add_status, rc);
16068 status = -ENXIO;
16069 }
16070 /* Remove mq from any list */
16071 list_del_init(&mq->list);
8fa38513 16072 mempool_free(mbox, mq->phba->mbox_mem_pool);
04c68496
JS
16073 return status;
16074}
16075
4f774513
JS
16076/**
16077 * lpfc_wq_destroy - Destroy a Work Queue on the HBA
16078 * @wq: The queue structure associated with the queue to destroy.
16079 *
16080 * This function destroys a queue, as detailed in @wq by sending an mailbox
16081 * command, specific to the type of queue, to the HBA.
16082 *
16083 * The @wq struct is used to get the queue ID of the queue to destroy.
16084 *
16085 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16086 * command fails this function will return -ENXIO.
4f774513 16087 **/
a2fc4aef 16088int
4f774513
JS
16089lpfc_wq_destroy(struct lpfc_hba *phba, struct lpfc_queue *wq)
16090{
16091 LPFC_MBOXQ_t *mbox;
16092 int rc, length, status = 0;
16093 uint32_t shdr_status, shdr_add_status;
16094 union lpfc_sli4_cfg_shdr *shdr;
16095
2e90f4b5 16096 /* sanity check on queue memory */
4f774513
JS
16097 if (!wq)
16098 return -ENODEV;
16099 mbox = mempool_alloc(wq->phba->mbox_mem_pool, GFP_KERNEL);
16100 if (!mbox)
16101 return -ENOMEM;
16102 length = (sizeof(struct lpfc_mbx_wq_destroy) -
16103 sizeof(struct lpfc_sli4_cfg_mhdr));
16104 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16105 LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY,
16106 length, LPFC_SLI4_MBX_EMBED);
16107 bf_set(lpfc_mbx_wq_destroy_q_id, &mbox->u.mqe.un.wq_destroy.u.request,
16108 wq->queue_id);
16109 mbox->vport = wq->phba->pport;
16110 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16111 rc = lpfc_sli_issue_mbox(wq->phba, mbox, MBX_POLL);
16112 shdr = (union lpfc_sli4_cfg_shdr *)
16113 &mbox->u.mqe.un.wq_destroy.header.cfg_shdr;
16114 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16115 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16116 if (shdr_status || shdr_add_status || rc) {
16117 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16118 "2508 WQ_DESTROY mailbox failed with "
16119 "status x%x add_status x%x, mbx status x%x\n",
16120 shdr_status, shdr_add_status, rc);
16121 status = -ENXIO;
16122 }
16123 /* Remove wq from any list */
16124 list_del_init(&wq->list);
d1f525aa
JS
16125 kfree(wq->pring);
16126 wq->pring = NULL;
8fa38513 16127 mempool_free(mbox, wq->phba->mbox_mem_pool);
4f774513
JS
16128 return status;
16129}
16130
16131/**
16132 * lpfc_rq_destroy - Destroy a Receive Queue on the HBA
16133 * @rq: The queue structure associated with the queue to destroy.
16134 *
16135 * This function destroys a queue, as detailed in @rq by sending an mailbox
16136 * command, specific to the type of queue, to the HBA.
16137 *
16138 * The @rq struct is used to get the queue ID of the queue to destroy.
16139 *
16140 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16141 * command fails this function will return -ENXIO.
4f774513 16142 **/
a2fc4aef 16143int
4f774513
JS
16144lpfc_rq_destroy(struct lpfc_hba *phba, struct lpfc_queue *hrq,
16145 struct lpfc_queue *drq)
16146{
16147 LPFC_MBOXQ_t *mbox;
16148 int rc, length, status = 0;
16149 uint32_t shdr_status, shdr_add_status;
16150 union lpfc_sli4_cfg_shdr *shdr;
16151
2e90f4b5 16152 /* sanity check on queue memory */
4f774513
JS
16153 if (!hrq || !drq)
16154 return -ENODEV;
16155 mbox = mempool_alloc(hrq->phba->mbox_mem_pool, GFP_KERNEL);
16156 if (!mbox)
16157 return -ENOMEM;
16158 length = (sizeof(struct lpfc_mbx_rq_destroy) -
fedd3b7b 16159 sizeof(struct lpfc_sli4_cfg_mhdr));
4f774513
JS
16160 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16161 LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY,
16162 length, LPFC_SLI4_MBX_EMBED);
16163 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16164 hrq->queue_id);
16165 mbox->vport = hrq->phba->pport;
16166 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16167 rc = lpfc_sli_issue_mbox(hrq->phba, mbox, MBX_POLL);
16168 /* The IOCTL status is embedded in the mailbox subheader. */
16169 shdr = (union lpfc_sli4_cfg_shdr *)
16170 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16171 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16172 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16173 if (shdr_status || shdr_add_status || rc) {
16174 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16175 "2509 RQ_DESTROY mailbox failed with "
16176 "status x%x add_status x%x, mbx status x%x\n",
16177 shdr_status, shdr_add_status, rc);
16178 if (rc != MBX_TIMEOUT)
16179 mempool_free(mbox, hrq->phba->mbox_mem_pool);
16180 return -ENXIO;
16181 }
16182 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16183 drq->queue_id);
16184 rc = lpfc_sli_issue_mbox(drq->phba, mbox, MBX_POLL);
16185 shdr = (union lpfc_sli4_cfg_shdr *)
16186 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16187 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16188 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16189 if (shdr_status || shdr_add_status || rc) {
16190 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16191 "2510 RQ_DESTROY mailbox failed with "
16192 "status x%x add_status x%x, mbx status x%x\n",
16193 shdr_status, shdr_add_status, rc);
16194 status = -ENXIO;
16195 }
16196 list_del_init(&hrq->list);
16197 list_del_init(&drq->list);
8fa38513 16198 mempool_free(mbox, hrq->phba->mbox_mem_pool);
4f774513
JS
16199 return status;
16200}
16201
16202/**
16203 * lpfc_sli4_post_sgl - Post scatter gather list for an XRI to HBA
16204 * @phba: The virtual port for which this call being executed.
16205 * @pdma_phys_addr0: Physical address of the 1st SGL page.
16206 * @pdma_phys_addr1: Physical address of the 2nd SGL page.
16207 * @xritag: the xritag that ties this io to the SGL pages.
16208 *
16209 * This routine will post the sgl pages for the IO that has the xritag
16210 * that is in the iocbq structure. The xritag is assigned during iocbq
16211 * creation and persists for as long as the driver is loaded.
16212 * if the caller has fewer than 256 scatter gather segments to map then
16213 * pdma_phys_addr1 should be 0.
16214 * If the caller needs to map more than 256 scatter gather segment then
16215 * pdma_phys_addr1 should be a valid physical address.
16216 * physical address for SGLs must be 64 byte aligned.
16217 * If you are going to map 2 SGL's then the first one must have 256 entries
16218 * the second sgl can have between 1 and 256 entries.
16219 *
16220 * Return codes:
16221 * 0 - Success
16222 * -ENXIO, -ENOMEM - Failure
16223 **/
16224int
16225lpfc_sli4_post_sgl(struct lpfc_hba *phba,
16226 dma_addr_t pdma_phys_addr0,
16227 dma_addr_t pdma_phys_addr1,
16228 uint16_t xritag)
16229{
16230 struct lpfc_mbx_post_sgl_pages *post_sgl_pages;
16231 LPFC_MBOXQ_t *mbox;
16232 int rc;
16233 uint32_t shdr_status, shdr_add_status;
6d368e53 16234 uint32_t mbox_tmo;
4f774513
JS
16235 union lpfc_sli4_cfg_shdr *shdr;
16236
16237 if (xritag == NO_XRI) {
16238 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16239 "0364 Invalid param:\n");
16240 return -EINVAL;
16241 }
16242
16243 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16244 if (!mbox)
16245 return -ENOMEM;
16246
16247 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16248 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16249 sizeof(struct lpfc_mbx_post_sgl_pages) -
fedd3b7b 16250 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
4f774513
JS
16251
16252 post_sgl_pages = (struct lpfc_mbx_post_sgl_pages *)
16253 &mbox->u.mqe.un.post_sgl_pages;
16254 bf_set(lpfc_post_sgl_pages_xri, post_sgl_pages, xritag);
16255 bf_set(lpfc_post_sgl_pages_xricnt, post_sgl_pages, 1);
16256
16257 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_lo =
16258 cpu_to_le32(putPaddrLow(pdma_phys_addr0));
16259 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_hi =
16260 cpu_to_le32(putPaddrHigh(pdma_phys_addr0));
16261
16262 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_lo =
16263 cpu_to_le32(putPaddrLow(pdma_phys_addr1));
16264 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_hi =
16265 cpu_to_le32(putPaddrHigh(pdma_phys_addr1));
16266 if (!phba->sli4_hba.intr_enable)
16267 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6d368e53 16268 else {
a183a15f 16269 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
16270 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16271 }
4f774513
JS
16272 /* The IOCTL status is embedded in the mailbox subheader. */
16273 shdr = (union lpfc_sli4_cfg_shdr *) &post_sgl_pages->header.cfg_shdr;
16274 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16275 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16276 if (rc != MBX_TIMEOUT)
16277 mempool_free(mbox, phba->mbox_mem_pool);
16278 if (shdr_status || shdr_add_status || rc) {
16279 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16280 "2511 POST_SGL mailbox failed with "
16281 "status x%x add_status x%x, mbx status x%x\n",
16282 shdr_status, shdr_add_status, rc);
4f774513
JS
16283 }
16284 return 0;
16285}
4f774513 16286
6d368e53 16287/**
88a2cfbb 16288 * lpfc_sli4_alloc_xri - Get an available rpi in the device's range
6d368e53
JS
16289 * @phba: pointer to lpfc hba data structure.
16290 *
16291 * This routine is invoked to post rpi header templates to the
88a2cfbb
JS
16292 * HBA consistent with the SLI-4 interface spec. This routine
16293 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
16294 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6d368e53 16295 *
88a2cfbb
JS
16296 * Returns
16297 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
16298 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
16299 **/
5d8b8167 16300static uint16_t
6d368e53
JS
16301lpfc_sli4_alloc_xri(struct lpfc_hba *phba)
16302{
16303 unsigned long xri;
16304
16305 /*
16306 * Fetch the next logical xri. Because this index is logical,
16307 * the driver starts at 0 each time.
16308 */
16309 spin_lock_irq(&phba->hbalock);
16310 xri = find_next_zero_bit(phba->sli4_hba.xri_bmask,
16311 phba->sli4_hba.max_cfg_param.max_xri, 0);
16312 if (xri >= phba->sli4_hba.max_cfg_param.max_xri) {
16313 spin_unlock_irq(&phba->hbalock);
16314 return NO_XRI;
16315 } else {
16316 set_bit(xri, phba->sli4_hba.xri_bmask);
16317 phba->sli4_hba.max_cfg_param.xri_used++;
6d368e53 16318 }
6d368e53
JS
16319 spin_unlock_irq(&phba->hbalock);
16320 return xri;
16321}
16322
16323/**
16324 * lpfc_sli4_free_xri - Release an xri for reuse.
16325 * @phba: pointer to lpfc hba data structure.
16326 *
16327 * This routine is invoked to release an xri to the pool of
16328 * available rpis maintained by the driver.
16329 **/
5d8b8167 16330static void
6d368e53
JS
16331__lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16332{
16333 if (test_and_clear_bit(xri, phba->sli4_hba.xri_bmask)) {
6d368e53
JS
16334 phba->sli4_hba.max_cfg_param.xri_used--;
16335 }
16336}
16337
16338/**
16339 * lpfc_sli4_free_xri - Release an xri for reuse.
16340 * @phba: pointer to lpfc hba data structure.
16341 *
16342 * This routine is invoked to release an xri to the pool of
16343 * available rpis maintained by the driver.
16344 **/
16345void
16346lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16347{
16348 spin_lock_irq(&phba->hbalock);
16349 __lpfc_sli4_free_xri(phba, xri);
16350 spin_unlock_irq(&phba->hbalock);
16351}
16352
4f774513
JS
16353/**
16354 * lpfc_sli4_next_xritag - Get an xritag for the io
16355 * @phba: Pointer to HBA context object.
16356 *
16357 * This function gets an xritag for the iocb. If there is no unused xritag
16358 * it will return 0xffff.
16359 * The function returns the allocated xritag if successful, else returns zero.
16360 * Zero is not a valid xritag.
16361 * The caller is not required to hold any lock.
16362 **/
16363uint16_t
16364lpfc_sli4_next_xritag(struct lpfc_hba *phba)
16365{
6d368e53 16366 uint16_t xri_index;
4f774513 16367
6d368e53 16368 xri_index = lpfc_sli4_alloc_xri(phba);
81378052
JS
16369 if (xri_index == NO_XRI)
16370 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
16371 "2004 Failed to allocate XRI.last XRITAG is %d"
16372 " Max XRI is %d, Used XRI is %d\n",
16373 xri_index,
16374 phba->sli4_hba.max_cfg_param.max_xri,
16375 phba->sli4_hba.max_cfg_param.xri_used);
16376 return xri_index;
4f774513
JS
16377}
16378
16379/**
895427bd 16380 * lpfc_sli4_post_sgl_list - post a block of ELS sgls to the port.
4f774513 16381 * @phba: pointer to lpfc hba data structure.
8a9d2e80
JS
16382 * @post_sgl_list: pointer to els sgl entry list.
16383 * @count: number of els sgl entries on the list.
4f774513
JS
16384 *
16385 * This routine is invoked to post a block of driver's sgl pages to the
16386 * HBA using non-embedded mailbox command. No Lock is held. This routine
16387 * is only called when the driver is loading and after all IO has been
16388 * stopped.
16389 **/
8a9d2e80 16390static int
895427bd 16391lpfc_sli4_post_sgl_list(struct lpfc_hba *phba,
8a9d2e80
JS
16392 struct list_head *post_sgl_list,
16393 int post_cnt)
4f774513 16394{
8a9d2e80 16395 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
4f774513
JS
16396 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16397 struct sgl_page_pairs *sgl_pg_pairs;
16398 void *viraddr;
16399 LPFC_MBOXQ_t *mbox;
16400 uint32_t reqlen, alloclen, pg_pairs;
16401 uint32_t mbox_tmo;
8a9d2e80
JS
16402 uint16_t xritag_start = 0;
16403 int rc = 0;
4f774513
JS
16404 uint32_t shdr_status, shdr_add_status;
16405 union lpfc_sli4_cfg_shdr *shdr;
16406
895427bd 16407 reqlen = post_cnt * sizeof(struct sgl_page_pairs) +
4f774513 16408 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16409 if (reqlen > SLI4_PAGE_SIZE) {
895427bd 16410 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4f774513
JS
16411 "2559 Block sgl registration required DMA "
16412 "size (%d) great than a page\n", reqlen);
16413 return -ENOMEM;
16414 }
895427bd 16415
4f774513 16416 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6d368e53 16417 if (!mbox)
4f774513 16418 return -ENOMEM;
4f774513
JS
16419
16420 /* Allocate DMA memory and set up the non-embedded mailbox command */
16421 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16422 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES, reqlen,
16423 LPFC_SLI4_MBX_NEMBED);
16424
16425 if (alloclen < reqlen) {
16426 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16427 "0285 Allocated DMA memory size (%d) is "
16428 "less than the requested DMA memory "
16429 "size (%d)\n", alloclen, reqlen);
16430 lpfc_sli4_mbox_cmd_free(phba, mbox);
16431 return -ENOMEM;
16432 }
4f774513 16433 /* Set up the SGL pages in the non-embedded DMA pages */
6d368e53 16434 viraddr = mbox->sge_array->addr[0];
4f774513
JS
16435 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16436 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16437
8a9d2e80
JS
16438 pg_pairs = 0;
16439 list_for_each_entry_safe(sglq_entry, sglq_next, post_sgl_list, list) {
4f774513
JS
16440 /* Set up the sge entry */
16441 sgl_pg_pairs->sgl_pg0_addr_lo =
16442 cpu_to_le32(putPaddrLow(sglq_entry->phys));
16443 sgl_pg_pairs->sgl_pg0_addr_hi =
16444 cpu_to_le32(putPaddrHigh(sglq_entry->phys));
16445 sgl_pg_pairs->sgl_pg1_addr_lo =
16446 cpu_to_le32(putPaddrLow(0));
16447 sgl_pg_pairs->sgl_pg1_addr_hi =
16448 cpu_to_le32(putPaddrHigh(0));
6d368e53 16449
4f774513
JS
16450 /* Keep the first xritag on the list */
16451 if (pg_pairs == 0)
16452 xritag_start = sglq_entry->sli4_xritag;
16453 sgl_pg_pairs++;
8a9d2e80 16454 pg_pairs++;
4f774513 16455 }
6d368e53
JS
16456
16457 /* Complete initialization and perform endian conversion. */
4f774513 16458 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
895427bd 16459 bf_set(lpfc_post_sgl_pages_xricnt, sgl, post_cnt);
4f774513 16460 sgl->word0 = cpu_to_le32(sgl->word0);
895427bd 16461
4f774513
JS
16462 if (!phba->sli4_hba.intr_enable)
16463 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16464 else {
a183a15f 16465 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16466 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16467 }
16468 shdr = (union lpfc_sli4_cfg_shdr *) &sgl->cfg_shdr;
16469 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16470 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16471 if (rc != MBX_TIMEOUT)
16472 lpfc_sli4_mbox_cmd_free(phba, mbox);
16473 if (shdr_status || shdr_add_status || rc) {
16474 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16475 "2513 POST_SGL_BLOCK mailbox command failed "
16476 "status x%x add_status x%x mbx status x%x\n",
16477 shdr_status, shdr_add_status, rc);
16478 rc = -ENXIO;
16479 }
16480 return rc;
16481}
16482
16483/**
16484 * lpfc_sli4_post_scsi_sgl_block - post a block of scsi sgl list to firmware
16485 * @phba: pointer to lpfc hba data structure.
16486 * @sblist: pointer to scsi buffer list.
16487 * @count: number of scsi buffers on the list.
16488 *
16489 * This routine is invoked to post a block of @count scsi sgl pages from a
16490 * SCSI buffer list @sblist to the HBA using non-embedded mailbox command.
16491 * No Lock is held.
16492 *
16493 **/
16494int
8a9d2e80
JS
16495lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *phba,
16496 struct list_head *sblist,
16497 int count)
4f774513
JS
16498{
16499 struct lpfc_scsi_buf *psb;
16500 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16501 struct sgl_page_pairs *sgl_pg_pairs;
16502 void *viraddr;
16503 LPFC_MBOXQ_t *mbox;
16504 uint32_t reqlen, alloclen, pg_pairs;
16505 uint32_t mbox_tmo;
16506 uint16_t xritag_start = 0;
16507 int rc = 0;
16508 uint32_t shdr_status, shdr_add_status;
16509 dma_addr_t pdma_phys_bpl1;
16510 union lpfc_sli4_cfg_shdr *shdr;
16511
16512 /* Calculate the requested length of the dma memory */
8a9d2e80 16513 reqlen = count * sizeof(struct sgl_page_pairs) +
4f774513 16514 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16515 if (reqlen > SLI4_PAGE_SIZE) {
4f774513
JS
16516 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
16517 "0217 Block sgl registration required DMA "
16518 "size (%d) great than a page\n", reqlen);
16519 return -ENOMEM;
16520 }
16521 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16522 if (!mbox) {
16523 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16524 "0283 Failed to allocate mbox cmd memory\n");
16525 return -ENOMEM;
16526 }
16527
16528 /* Allocate DMA memory and set up the non-embedded mailbox command */
16529 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16530 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES, reqlen,
16531 LPFC_SLI4_MBX_NEMBED);
16532
16533 if (alloclen < reqlen) {
16534 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16535 "2561 Allocated DMA memory size (%d) is "
16536 "less than the requested DMA memory "
16537 "size (%d)\n", alloclen, reqlen);
16538 lpfc_sli4_mbox_cmd_free(phba, mbox);
16539 return -ENOMEM;
16540 }
6d368e53 16541
4f774513 16542 /* Get the first SGE entry from the non-embedded DMA memory */
4f774513
JS
16543 viraddr = mbox->sge_array->addr[0];
16544
16545 /* Set up the SGL pages in the non-embedded DMA pages */
16546 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16547 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16548
16549 pg_pairs = 0;
16550 list_for_each_entry(psb, sblist, list) {
16551 /* Set up the sge entry */
16552 sgl_pg_pairs->sgl_pg0_addr_lo =
16553 cpu_to_le32(putPaddrLow(psb->dma_phys_bpl));
16554 sgl_pg_pairs->sgl_pg0_addr_hi =
16555 cpu_to_le32(putPaddrHigh(psb->dma_phys_bpl));
16556 if (phba->cfg_sg_dma_buf_size > SGL_PAGE_SIZE)
16557 pdma_phys_bpl1 = psb->dma_phys_bpl + SGL_PAGE_SIZE;
16558 else
16559 pdma_phys_bpl1 = 0;
16560 sgl_pg_pairs->sgl_pg1_addr_lo =
16561 cpu_to_le32(putPaddrLow(pdma_phys_bpl1));
16562 sgl_pg_pairs->sgl_pg1_addr_hi =
16563 cpu_to_le32(putPaddrHigh(pdma_phys_bpl1));
16564 /* Keep the first xritag on the list */
16565 if (pg_pairs == 0)
16566 xritag_start = psb->cur_iocbq.sli4_xritag;
16567 sgl_pg_pairs++;
16568 pg_pairs++;
16569 }
16570 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
16571 bf_set(lpfc_post_sgl_pages_xricnt, sgl, pg_pairs);
16572 /* Perform endian conversion if necessary */
16573 sgl->word0 = cpu_to_le32(sgl->word0);
16574
16575 if (!phba->sli4_hba.intr_enable)
16576 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16577 else {
a183a15f 16578 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16579 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16580 }
16581 shdr = (union lpfc_sli4_cfg_shdr *) &sgl->cfg_shdr;
16582 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16583 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16584 if (rc != MBX_TIMEOUT)
16585 lpfc_sli4_mbox_cmd_free(phba, mbox);
16586 if (shdr_status || shdr_add_status || rc) {
16587 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16588 "2564 POST_SGL_BLOCK mailbox command failed "
16589 "status x%x add_status x%x mbx status x%x\n",
16590 shdr_status, shdr_add_status, rc);
16591 rc = -ENXIO;
16592 }
16593 return rc;
16594}
16595
16596/**
16597 * lpfc_fc_frame_check - Check that this frame is a valid frame to handle
16598 * @phba: pointer to lpfc_hba struct that the frame was received on
16599 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
16600 *
16601 * This function checks the fields in the @fc_hdr to see if the FC frame is a
16602 * valid type of frame that the LPFC driver will handle. This function will
16603 * return a zero if the frame is a valid frame or a non zero value when the
16604 * frame does not pass the check.
16605 **/
16606static int
16607lpfc_fc_frame_check(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr)
16608{
474ffb74 16609 /* make rctl_names static to save stack space */
4f774513 16610 struct fc_vft_header *fc_vft_hdr;
546fc854 16611 uint32_t *header = (uint32_t *) fc_hdr;
4f774513 16612
ae9e28f3
JS
16613#define FC_RCTL_MDS_DIAGS 0xF4
16614
4f774513
JS
16615 switch (fc_hdr->fh_r_ctl) {
16616 case FC_RCTL_DD_UNCAT: /* uncategorized information */
16617 case FC_RCTL_DD_SOL_DATA: /* solicited data */
16618 case FC_RCTL_DD_UNSOL_CTL: /* unsolicited control */
16619 case FC_RCTL_DD_SOL_CTL: /* solicited control or reply */
16620 case FC_RCTL_DD_UNSOL_DATA: /* unsolicited data */
16621 case FC_RCTL_DD_DATA_DESC: /* data descriptor */
16622 case FC_RCTL_DD_UNSOL_CMD: /* unsolicited command */
16623 case FC_RCTL_DD_CMD_STATUS: /* command status */
16624 case FC_RCTL_ELS_REQ: /* extended link services request */
16625 case FC_RCTL_ELS_REP: /* extended link services reply */
16626 case FC_RCTL_ELS4_REQ: /* FC-4 ELS request */
16627 case FC_RCTL_ELS4_REP: /* FC-4 ELS reply */
16628 case FC_RCTL_BA_NOP: /* basic link service NOP */
16629 case FC_RCTL_BA_ABTS: /* basic link service abort */
16630 case FC_RCTL_BA_RMC: /* remove connection */
16631 case FC_RCTL_BA_ACC: /* basic accept */
16632 case FC_RCTL_BA_RJT: /* basic reject */
16633 case FC_RCTL_BA_PRMT:
16634 case FC_RCTL_ACK_1: /* acknowledge_1 */
16635 case FC_RCTL_ACK_0: /* acknowledge_0 */
16636 case FC_RCTL_P_RJT: /* port reject */
16637 case FC_RCTL_F_RJT: /* fabric reject */
16638 case FC_RCTL_P_BSY: /* port busy */
16639 case FC_RCTL_F_BSY: /* fabric busy to data frame */
16640 case FC_RCTL_F_BSYL: /* fabric busy to link control frame */
16641 case FC_RCTL_LCR: /* link credit reset */
ae9e28f3 16642 case FC_RCTL_MDS_DIAGS: /* MDS Diagnostics */
4f774513
JS
16643 case FC_RCTL_END: /* end */
16644 break;
16645 case FC_RCTL_VFTH: /* Virtual Fabric tagging Header */
16646 fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
16647 fc_hdr = &((struct fc_frame_header *)fc_vft_hdr)[1];
16648 return lpfc_fc_frame_check(phba, fc_hdr);
16649 default:
16650 goto drop;
16651 }
ae9e28f3
JS
16652
16653#define FC_TYPE_VENDOR_UNIQUE 0xFF
16654
4f774513
JS
16655 switch (fc_hdr->fh_type) {
16656 case FC_TYPE_BLS:
16657 case FC_TYPE_ELS:
16658 case FC_TYPE_FCP:
16659 case FC_TYPE_CT:
895427bd 16660 case FC_TYPE_NVME:
ae9e28f3 16661 case FC_TYPE_VENDOR_UNIQUE:
4f774513
JS
16662 break;
16663 case FC_TYPE_IP:
16664 case FC_TYPE_ILS:
16665 default:
16666 goto drop;
16667 }
546fc854 16668
4f774513 16669 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
78e1d200 16670 "2538 Received frame rctl:x%x, type:x%x, "
88f43a08 16671 "frame Data:%08x %08x %08x %08x %08x %08x %08x\n",
78e1d200
JS
16672 fc_hdr->fh_r_ctl, fc_hdr->fh_type,
16673 be32_to_cpu(header[0]), be32_to_cpu(header[1]),
16674 be32_to_cpu(header[2]), be32_to_cpu(header[3]),
16675 be32_to_cpu(header[4]), be32_to_cpu(header[5]),
16676 be32_to_cpu(header[6]));
4f774513
JS
16677 return 0;
16678drop:
16679 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS,
78e1d200
JS
16680 "2539 Dropped frame rctl:x%x type:x%x\n",
16681 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
4f774513
JS
16682 return 1;
16683}
16684
16685/**
16686 * lpfc_fc_hdr_get_vfi - Get the VFI from an FC frame
16687 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
16688 *
16689 * This function processes the FC header to retrieve the VFI from the VF
16690 * header, if one exists. This function will return the VFI if one exists
16691 * or 0 if no VSAN Header exists.
16692 **/
16693static uint32_t
16694lpfc_fc_hdr_get_vfi(struct fc_frame_header *fc_hdr)
16695{
16696 struct fc_vft_header *fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
16697
16698 if (fc_hdr->fh_r_ctl != FC_RCTL_VFTH)
16699 return 0;
16700 return bf_get(fc_vft_hdr_vf_id, fc_vft_hdr);
16701}
16702
16703/**
16704 * lpfc_fc_frame_to_vport - Finds the vport that a frame is destined to
16705 * @phba: Pointer to the HBA structure to search for the vport on
16706 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
16707 * @fcfi: The FC Fabric ID that the frame came from
16708 *
16709 * This function searches the @phba for a vport that matches the content of the
16710 * @fc_hdr passed in and the @fcfi. This function uses the @fc_hdr to fetch the
16711 * VFI, if the Virtual Fabric Tagging Header exists, and the DID. This function
16712 * returns the matching vport pointer or NULL if unable to match frame to a
16713 * vport.
16714 **/
16715static struct lpfc_vport *
16716lpfc_fc_frame_to_vport(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr,
895427bd 16717 uint16_t fcfi, uint32_t did)
4f774513
JS
16718{
16719 struct lpfc_vport **vports;
16720 struct lpfc_vport *vport = NULL;
16721 int i;
939723a4 16722
bf08611b
JS
16723 if (did == Fabric_DID)
16724 return phba->pport;
939723a4
JS
16725 if ((phba->pport->fc_flag & FC_PT2PT) &&
16726 !(phba->link_state == LPFC_HBA_READY))
16727 return phba->pport;
16728
4f774513 16729 vports = lpfc_create_vport_work_array(phba);
895427bd 16730 if (vports != NULL) {
4f774513
JS
16731 for (i = 0; i <= phba->max_vpi && vports[i] != NULL; i++) {
16732 if (phba->fcf.fcfi == fcfi &&
16733 vports[i]->vfi == lpfc_fc_hdr_get_vfi(fc_hdr) &&
16734 vports[i]->fc_myDID == did) {
16735 vport = vports[i];
16736 break;
16737 }
16738 }
895427bd 16739 }
4f774513
JS
16740 lpfc_destroy_vport_work_array(phba, vports);
16741 return vport;
16742}
16743
45ed1190
JS
16744/**
16745 * lpfc_update_rcv_time_stamp - Update vport's rcv seq time stamp
16746 * @vport: The vport to work on.
16747 *
16748 * This function updates the receive sequence time stamp for this vport. The
16749 * receive sequence time stamp indicates the time that the last frame of the
16750 * the sequence that has been idle for the longest amount of time was received.
16751 * the driver uses this time stamp to indicate if any received sequences have
16752 * timed out.
16753 **/
5d8b8167 16754static void
45ed1190
JS
16755lpfc_update_rcv_time_stamp(struct lpfc_vport *vport)
16756{
16757 struct lpfc_dmabuf *h_buf;
16758 struct hbq_dmabuf *dmabuf = NULL;
16759
16760 /* get the oldest sequence on the rcv list */
16761 h_buf = list_get_first(&vport->rcv_buffer_list,
16762 struct lpfc_dmabuf, list);
16763 if (!h_buf)
16764 return;
16765 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
16766 vport->rcv_buffer_time_stamp = dmabuf->time_stamp;
16767}
16768
16769/**
16770 * lpfc_cleanup_rcv_buffers - Cleans up all outstanding receive sequences.
16771 * @vport: The vport that the received sequences were sent to.
16772 *
16773 * This function cleans up all outstanding received sequences. This is called
16774 * by the driver when a link event or user action invalidates all the received
16775 * sequences.
16776 **/
16777void
16778lpfc_cleanup_rcv_buffers(struct lpfc_vport *vport)
16779{
16780 struct lpfc_dmabuf *h_buf, *hnext;
16781 struct lpfc_dmabuf *d_buf, *dnext;
16782 struct hbq_dmabuf *dmabuf = NULL;
16783
16784 /* start with the oldest sequence on the rcv list */
16785 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
16786 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
16787 list_del_init(&dmabuf->hbuf.list);
16788 list_for_each_entry_safe(d_buf, dnext,
16789 &dmabuf->dbuf.list, list) {
16790 list_del_init(&d_buf->list);
16791 lpfc_in_buf_free(vport->phba, d_buf);
16792 }
16793 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
16794 }
16795}
16796
16797/**
16798 * lpfc_rcv_seq_check_edtov - Cleans up timed out receive sequences.
16799 * @vport: The vport that the received sequences were sent to.
16800 *
16801 * This function determines whether any received sequences have timed out by
16802 * first checking the vport's rcv_buffer_time_stamp. If this time_stamp
16803 * indicates that there is at least one timed out sequence this routine will
16804 * go through the received sequences one at a time from most inactive to most
16805 * active to determine which ones need to be cleaned up. Once it has determined
16806 * that a sequence needs to be cleaned up it will simply free up the resources
16807 * without sending an abort.
16808 **/
16809void
16810lpfc_rcv_seq_check_edtov(struct lpfc_vport *vport)
16811{
16812 struct lpfc_dmabuf *h_buf, *hnext;
16813 struct lpfc_dmabuf *d_buf, *dnext;
16814 struct hbq_dmabuf *dmabuf = NULL;
16815 unsigned long timeout;
16816 int abort_count = 0;
16817
16818 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
16819 vport->rcv_buffer_time_stamp);
16820 if (list_empty(&vport->rcv_buffer_list) ||
16821 time_before(jiffies, timeout))
16822 return;
16823 /* start with the oldest sequence on the rcv list */
16824 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
16825 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
16826 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
16827 dmabuf->time_stamp);
16828 if (time_before(jiffies, timeout))
16829 break;
16830 abort_count++;
16831 list_del_init(&dmabuf->hbuf.list);
16832 list_for_each_entry_safe(d_buf, dnext,
16833 &dmabuf->dbuf.list, list) {
16834 list_del_init(&d_buf->list);
16835 lpfc_in_buf_free(vport->phba, d_buf);
16836 }
16837 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
16838 }
16839 if (abort_count)
16840 lpfc_update_rcv_time_stamp(vport);
16841}
16842
4f774513
JS
16843/**
16844 * lpfc_fc_frame_add - Adds a frame to the vport's list of received sequences
16845 * @dmabuf: pointer to a dmabuf that describes the hdr and data of the FC frame
16846 *
16847 * This function searches through the existing incomplete sequences that have
16848 * been sent to this @vport. If the frame matches one of the incomplete
16849 * sequences then the dbuf in the @dmabuf is added to the list of frames that
16850 * make up that sequence. If no sequence is found that matches this frame then
16851 * the function will add the hbuf in the @dmabuf to the @vport's rcv_buffer_list
16852 * This function returns a pointer to the first dmabuf in the sequence list that
16853 * the frame was linked to.
16854 **/
16855static struct hbq_dmabuf *
16856lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
16857{
16858 struct fc_frame_header *new_hdr;
16859 struct fc_frame_header *temp_hdr;
16860 struct lpfc_dmabuf *d_buf;
16861 struct lpfc_dmabuf *h_buf;
16862 struct hbq_dmabuf *seq_dmabuf = NULL;
16863 struct hbq_dmabuf *temp_dmabuf = NULL;
4360ca9c 16864 uint8_t found = 0;
4f774513 16865
4d9ab994 16866 INIT_LIST_HEAD(&dmabuf->dbuf.list);
45ed1190 16867 dmabuf->time_stamp = jiffies;
4f774513 16868 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
4360ca9c 16869
4f774513
JS
16870 /* Use the hdr_buf to find the sequence that this frame belongs to */
16871 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
16872 temp_hdr = (struct fc_frame_header *)h_buf->virt;
16873 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
16874 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
16875 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
16876 continue;
16877 /* found a pending sequence that matches this frame */
16878 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
16879 break;
16880 }
16881 if (!seq_dmabuf) {
16882 /*
16883 * This indicates first frame received for this sequence.
16884 * Queue the buffer on the vport's rcv_buffer_list.
16885 */
16886 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
45ed1190 16887 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
16888 return dmabuf;
16889 }
16890 temp_hdr = seq_dmabuf->hbuf.virt;
eeead811
JS
16891 if (be16_to_cpu(new_hdr->fh_seq_cnt) <
16892 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4d9ab994
JS
16893 list_del_init(&seq_dmabuf->hbuf.list);
16894 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
16895 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
45ed1190 16896 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
16897 return dmabuf;
16898 }
45ed1190
JS
16899 /* move this sequence to the tail to indicate a young sequence */
16900 list_move_tail(&seq_dmabuf->hbuf.list, &vport->rcv_buffer_list);
16901 seq_dmabuf->time_stamp = jiffies;
16902 lpfc_update_rcv_time_stamp(vport);
eeead811
JS
16903 if (list_empty(&seq_dmabuf->dbuf.list)) {
16904 temp_hdr = dmabuf->hbuf.virt;
16905 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
16906 return seq_dmabuf;
16907 }
4f774513 16908 /* find the correct place in the sequence to insert this frame */
4360ca9c
JS
16909 d_buf = list_entry(seq_dmabuf->dbuf.list.prev, typeof(*d_buf), list);
16910 while (!found) {
4f774513
JS
16911 temp_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
16912 temp_hdr = (struct fc_frame_header *)temp_dmabuf->hbuf.virt;
16913 /*
16914 * If the frame's sequence count is greater than the frame on
16915 * the list then insert the frame right after this frame
16916 */
eeead811
JS
16917 if (be16_to_cpu(new_hdr->fh_seq_cnt) >
16918 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4f774513 16919 list_add(&dmabuf->dbuf.list, &temp_dmabuf->dbuf.list);
4360ca9c
JS
16920 found = 1;
16921 break;
4f774513 16922 }
4360ca9c
JS
16923
16924 if (&d_buf->list == &seq_dmabuf->dbuf.list)
16925 break;
16926 d_buf = list_entry(d_buf->list.prev, typeof(*d_buf), list);
4f774513 16927 }
4360ca9c
JS
16928
16929 if (found)
16930 return seq_dmabuf;
4f774513
JS
16931 return NULL;
16932}
16933
6669f9bb
JS
16934/**
16935 * lpfc_sli4_abort_partial_seq - Abort partially assembled unsol sequence
16936 * @vport: pointer to a vitural port
16937 * @dmabuf: pointer to a dmabuf that describes the FC sequence
16938 *
16939 * This function tries to abort from the partially assembed sequence, described
16940 * by the information from basic abbort @dmabuf. It checks to see whether such
16941 * partially assembled sequence held by the driver. If so, it shall free up all
16942 * the frames from the partially assembled sequence.
16943 *
16944 * Return
16945 * true -- if there is matching partially assembled sequence present and all
16946 * the frames freed with the sequence;
16947 * false -- if there is no matching partially assembled sequence present so
16948 * nothing got aborted in the lower layer driver
16949 **/
16950static bool
16951lpfc_sli4_abort_partial_seq(struct lpfc_vport *vport,
16952 struct hbq_dmabuf *dmabuf)
16953{
16954 struct fc_frame_header *new_hdr;
16955 struct fc_frame_header *temp_hdr;
16956 struct lpfc_dmabuf *d_buf, *n_buf, *h_buf;
16957 struct hbq_dmabuf *seq_dmabuf = NULL;
16958
16959 /* Use the hdr_buf to find the sequence that matches this frame */
16960 INIT_LIST_HEAD(&dmabuf->dbuf.list);
16961 INIT_LIST_HEAD(&dmabuf->hbuf.list);
16962 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
16963 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
16964 temp_hdr = (struct fc_frame_header *)h_buf->virt;
16965 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
16966 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
16967 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
16968 continue;
16969 /* found a pending sequence that matches this frame */
16970 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
16971 break;
16972 }
16973
16974 /* Free up all the frames from the partially assembled sequence */
16975 if (seq_dmabuf) {
16976 list_for_each_entry_safe(d_buf, n_buf,
16977 &seq_dmabuf->dbuf.list, list) {
16978 list_del_init(&d_buf->list);
16979 lpfc_in_buf_free(vport->phba, d_buf);
16980 }
16981 return true;
16982 }
16983 return false;
16984}
16985
6dd9e31c
JS
16986/**
16987 * lpfc_sli4_abort_ulp_seq - Abort assembled unsol sequence from ulp
16988 * @vport: pointer to a vitural port
16989 * @dmabuf: pointer to a dmabuf that describes the FC sequence
16990 *
16991 * This function tries to abort from the assembed sequence from upper level
16992 * protocol, described by the information from basic abbort @dmabuf. It
16993 * checks to see whether such pending context exists at upper level protocol.
16994 * If so, it shall clean up the pending context.
16995 *
16996 * Return
16997 * true -- if there is matching pending context of the sequence cleaned
16998 * at ulp;
16999 * false -- if there is no matching pending context of the sequence present
17000 * at ulp.
17001 **/
17002static bool
17003lpfc_sli4_abort_ulp_seq(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17004{
17005 struct lpfc_hba *phba = vport->phba;
17006 int handled;
17007
17008 /* Accepting abort at ulp with SLI4 only */
17009 if (phba->sli_rev < LPFC_SLI_REV4)
17010 return false;
17011
17012 /* Register all caring upper level protocols to attend abort */
17013 handled = lpfc_ct_handle_unsol_abort(phba, dmabuf);
17014 if (handled)
17015 return true;
17016
17017 return false;
17018}
17019
6669f9bb 17020/**
546fc854 17021 * lpfc_sli4_seq_abort_rsp_cmpl - BLS ABORT RSP seq abort iocb complete handler
6669f9bb
JS
17022 * @phba: Pointer to HBA context object.
17023 * @cmd_iocbq: pointer to the command iocbq structure.
17024 * @rsp_iocbq: pointer to the response iocbq structure.
17025 *
546fc854 17026 * This function handles the sequence abort response iocb command complete
6669f9bb
JS
17027 * event. It properly releases the memory allocated to the sequence abort
17028 * accept iocb.
17029 **/
17030static void
546fc854 17031lpfc_sli4_seq_abort_rsp_cmpl(struct lpfc_hba *phba,
6669f9bb
JS
17032 struct lpfc_iocbq *cmd_iocbq,
17033 struct lpfc_iocbq *rsp_iocbq)
17034{
6dd9e31c
JS
17035 struct lpfc_nodelist *ndlp;
17036
17037 if (cmd_iocbq) {
17038 ndlp = (struct lpfc_nodelist *)cmd_iocbq->context1;
17039 lpfc_nlp_put(ndlp);
17040 lpfc_nlp_not_used(ndlp);
6669f9bb 17041 lpfc_sli_release_iocbq(phba, cmd_iocbq);
6dd9e31c 17042 }
6b5151fd
JS
17043
17044 /* Failure means BLS ABORT RSP did not get delivered to remote node*/
17045 if (rsp_iocbq && rsp_iocbq->iocb.ulpStatus)
17046 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17047 "3154 BLS ABORT RSP failed, data: x%x/x%x\n",
17048 rsp_iocbq->iocb.ulpStatus,
17049 rsp_iocbq->iocb.un.ulpWord[4]);
6669f9bb
JS
17050}
17051
6d368e53
JS
17052/**
17053 * lpfc_sli4_xri_inrange - check xri is in range of xris owned by driver.
17054 * @phba: Pointer to HBA context object.
17055 * @xri: xri id in transaction.
17056 *
17057 * This function validates the xri maps to the known range of XRIs allocated an
17058 * used by the driver.
17059 **/
7851fe2c 17060uint16_t
6d368e53
JS
17061lpfc_sli4_xri_inrange(struct lpfc_hba *phba,
17062 uint16_t xri)
17063{
a2fc4aef 17064 uint16_t i;
6d368e53
JS
17065
17066 for (i = 0; i < phba->sli4_hba.max_cfg_param.max_xri; i++) {
17067 if (xri == phba->sli4_hba.xri_ids[i])
17068 return i;
17069 }
17070 return NO_XRI;
17071}
17072
6669f9bb 17073/**
546fc854 17074 * lpfc_sli4_seq_abort_rsp - bls rsp to sequence abort
6669f9bb
JS
17075 * @phba: Pointer to HBA context object.
17076 * @fc_hdr: pointer to a FC frame header.
17077 *
546fc854 17078 * This function sends a basic response to a previous unsol sequence abort
6669f9bb
JS
17079 * event after aborting the sequence handling.
17080 **/
86c67379 17081void
6dd9e31c
JS
17082lpfc_sli4_seq_abort_rsp(struct lpfc_vport *vport,
17083 struct fc_frame_header *fc_hdr, bool aborted)
6669f9bb 17084{
6dd9e31c 17085 struct lpfc_hba *phba = vport->phba;
6669f9bb
JS
17086 struct lpfc_iocbq *ctiocb = NULL;
17087 struct lpfc_nodelist *ndlp;
ee0f4fe1 17088 uint16_t oxid, rxid, xri, lxri;
5ffc266e 17089 uint32_t sid, fctl;
6669f9bb 17090 IOCB_t *icmd;
546fc854 17091 int rc;
6669f9bb
JS
17092
17093 if (!lpfc_is_link_up(phba))
17094 return;
17095
17096 sid = sli4_sid_from_fc_hdr(fc_hdr);
17097 oxid = be16_to_cpu(fc_hdr->fh_ox_id);
5ffc266e 17098 rxid = be16_to_cpu(fc_hdr->fh_rx_id);
6669f9bb 17099
6dd9e31c 17100 ndlp = lpfc_findnode_did(vport, sid);
6669f9bb 17101 if (!ndlp) {
9d3d340d 17102 ndlp = lpfc_nlp_init(vport, sid);
6dd9e31c
JS
17103 if (!ndlp) {
17104 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17105 "1268 Failed to allocate ndlp for "
17106 "oxid:x%x SID:x%x\n", oxid, sid);
17107 return;
17108 }
6dd9e31c
JS
17109 /* Put ndlp onto pport node list */
17110 lpfc_enqueue_node(vport, ndlp);
17111 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
17112 /* re-setup ndlp without removing from node list */
17113 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
17114 if (!ndlp) {
17115 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17116 "3275 Failed to active ndlp found "
17117 "for oxid:x%x SID:x%x\n", oxid, sid);
17118 return;
17119 }
6669f9bb
JS
17120 }
17121
546fc854 17122 /* Allocate buffer for rsp iocb */
6669f9bb
JS
17123 ctiocb = lpfc_sli_get_iocbq(phba);
17124 if (!ctiocb)
17125 return;
17126
5ffc266e
JS
17127 /* Extract the F_CTL field from FC_HDR */
17128 fctl = sli4_fctl_from_fc_hdr(fc_hdr);
17129
6669f9bb 17130 icmd = &ctiocb->iocb;
6669f9bb 17131 icmd->un.xseq64.bdl.bdeSize = 0;
5ffc266e 17132 icmd->un.xseq64.bdl.ulpIoTag32 = 0;
6669f9bb
JS
17133 icmd->un.xseq64.w5.hcsw.Dfctl = 0;
17134 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_ACC;
17135 icmd->un.xseq64.w5.hcsw.Type = FC_TYPE_BLS;
17136
17137 /* Fill in the rest of iocb fields */
17138 icmd->ulpCommand = CMD_XMIT_BLS_RSP64_CX;
17139 icmd->ulpBdeCount = 0;
17140 icmd->ulpLe = 1;
17141 icmd->ulpClass = CLASS3;
6d368e53 17142 icmd->ulpContext = phba->sli4_hba.rpi_ids[ndlp->nlp_rpi];
6dd9e31c 17143 ctiocb->context1 = lpfc_nlp_get(ndlp);
6669f9bb 17144
6669f9bb
JS
17145 ctiocb->iocb_cmpl = NULL;
17146 ctiocb->vport = phba->pport;
546fc854 17147 ctiocb->iocb_cmpl = lpfc_sli4_seq_abort_rsp_cmpl;
6d368e53 17148 ctiocb->sli4_lxritag = NO_XRI;
546fc854
JS
17149 ctiocb->sli4_xritag = NO_XRI;
17150
ee0f4fe1
JS
17151 if (fctl & FC_FC_EX_CTX)
17152 /* Exchange responder sent the abort so we
17153 * own the oxid.
17154 */
17155 xri = oxid;
17156 else
17157 xri = rxid;
17158 lxri = lpfc_sli4_xri_inrange(phba, xri);
17159 if (lxri != NO_XRI)
17160 lpfc_set_rrq_active(phba, ndlp, lxri,
17161 (xri == oxid) ? rxid : oxid, 0);
6dd9e31c
JS
17162 /* For BA_ABTS from exchange responder, if the logical xri with
17163 * the oxid maps to the FCP XRI range, the port no longer has
17164 * that exchange context, send a BLS_RJT. Override the IOCB for
17165 * a BA_RJT.
17166 */
17167 if ((fctl & FC_FC_EX_CTX) &&
895427bd 17168 (lxri > lpfc_sli4_get_iocb_cnt(phba))) {
6dd9e31c
JS
17169 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17170 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17171 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17172 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17173 }
17174
17175 /* If BA_ABTS failed to abort a partially assembled receive sequence,
17176 * the driver no longer has that exchange, send a BLS_RJT. Override
17177 * the IOCB for a BA_RJT.
546fc854 17178 */
6dd9e31c 17179 if (aborted == false) {
546fc854
JS
17180 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17181 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17182 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17183 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17184 }
6669f9bb 17185
5ffc266e
JS
17186 if (fctl & FC_FC_EX_CTX) {
17187 /* ABTS sent by responder to CT exchange, construction
17188 * of BA_ACC will use OX_ID from ABTS for the XRI_TAG
17189 * field and RX_ID from ABTS for RX_ID field.
17190 */
546fc854 17191 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_RSP);
5ffc266e
JS
17192 } else {
17193 /* ABTS sent by initiator to CT exchange, construction
17194 * of BA_ACC will need to allocate a new XRI as for the
f09c3acc 17195 * XRI_TAG field.
5ffc266e 17196 */
546fc854 17197 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_INT);
5ffc266e 17198 }
f09c3acc 17199 bf_set(lpfc_abts_rxid, &icmd->un.bls_rsp, rxid);
546fc854 17200 bf_set(lpfc_abts_oxid, &icmd->un.bls_rsp, oxid);
5ffc266e 17201
546fc854 17202 /* Xmit CT abts response on exchange <xid> */
6dd9e31c
JS
17203 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,
17204 "1200 Send BLS cmd x%x on oxid x%x Data: x%x\n",
17205 icmd->un.xseq64.w5.hcsw.Rctl, oxid, phba->link_state);
546fc854
JS
17206
17207 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, ctiocb, 0);
17208 if (rc == IOCB_ERROR) {
6dd9e31c
JS
17209 lpfc_printf_vlog(vport, KERN_ERR, LOG_ELS,
17210 "2925 Failed to issue CT ABTS RSP x%x on "
17211 "xri x%x, Data x%x\n",
17212 icmd->un.xseq64.w5.hcsw.Rctl, oxid,
17213 phba->link_state);
17214 lpfc_nlp_put(ndlp);
17215 ctiocb->context1 = NULL;
546fc854
JS
17216 lpfc_sli_release_iocbq(phba, ctiocb);
17217 }
6669f9bb
JS
17218}
17219
17220/**
17221 * lpfc_sli4_handle_unsol_abort - Handle sli-4 unsolicited abort event
17222 * @vport: Pointer to the vport on which this sequence was received
17223 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17224 *
17225 * This function handles an SLI-4 unsolicited abort event. If the unsolicited
17226 * receive sequence is only partially assembed by the driver, it shall abort
17227 * the partially assembled frames for the sequence. Otherwise, if the
17228 * unsolicited receive sequence has been completely assembled and passed to
17229 * the Upper Layer Protocol (UPL), it then mark the per oxid status for the
17230 * unsolicited sequence has been aborted. After that, it will issue a basic
17231 * accept to accept the abort.
17232 **/
5d8b8167 17233static void
6669f9bb
JS
17234lpfc_sli4_handle_unsol_abort(struct lpfc_vport *vport,
17235 struct hbq_dmabuf *dmabuf)
17236{
17237 struct lpfc_hba *phba = vport->phba;
17238 struct fc_frame_header fc_hdr;
5ffc266e 17239 uint32_t fctl;
6dd9e31c 17240 bool aborted;
6669f9bb 17241
6669f9bb
JS
17242 /* Make a copy of fc_hdr before the dmabuf being released */
17243 memcpy(&fc_hdr, dmabuf->hbuf.virt, sizeof(struct fc_frame_header));
5ffc266e 17244 fctl = sli4_fctl_from_fc_hdr(&fc_hdr);
6669f9bb 17245
5ffc266e 17246 if (fctl & FC_FC_EX_CTX) {
6dd9e31c
JS
17247 /* ABTS by responder to exchange, no cleanup needed */
17248 aborted = true;
5ffc266e 17249 } else {
6dd9e31c
JS
17250 /* ABTS by initiator to exchange, need to do cleanup */
17251 aborted = lpfc_sli4_abort_partial_seq(vport, dmabuf);
17252 if (aborted == false)
17253 aborted = lpfc_sli4_abort_ulp_seq(vport, dmabuf);
5ffc266e 17254 }
6dd9e31c
JS
17255 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17256
86c67379
JS
17257 if (phba->nvmet_support) {
17258 lpfc_nvmet_rcv_unsol_abort(vport, &fc_hdr);
17259 return;
17260 }
17261
6dd9e31c
JS
17262 /* Respond with BA_ACC or BA_RJT accordingly */
17263 lpfc_sli4_seq_abort_rsp(vport, &fc_hdr, aborted);
6669f9bb
JS
17264}
17265
4f774513
JS
17266/**
17267 * lpfc_seq_complete - Indicates if a sequence is complete
17268 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17269 *
17270 * This function checks the sequence, starting with the frame described by
17271 * @dmabuf, to see if all the frames associated with this sequence are present.
17272 * the frames associated with this sequence are linked to the @dmabuf using the
17273 * dbuf list. This function looks for two major things. 1) That the first frame
17274 * has a sequence count of zero. 2) There is a frame with last frame of sequence
17275 * set. 3) That there are no holes in the sequence count. The function will
17276 * return 1 when the sequence is complete, otherwise it will return 0.
17277 **/
17278static int
17279lpfc_seq_complete(struct hbq_dmabuf *dmabuf)
17280{
17281 struct fc_frame_header *hdr;
17282 struct lpfc_dmabuf *d_buf;
17283 struct hbq_dmabuf *seq_dmabuf;
17284 uint32_t fctl;
17285 int seq_count = 0;
17286
17287 hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17288 /* make sure first fame of sequence has a sequence count of zero */
17289 if (hdr->fh_seq_cnt != seq_count)
17290 return 0;
17291 fctl = (hdr->fh_f_ctl[0] << 16 |
17292 hdr->fh_f_ctl[1] << 8 |
17293 hdr->fh_f_ctl[2]);
17294 /* If last frame of sequence we can return success. */
17295 if (fctl & FC_FC_END_SEQ)
17296 return 1;
17297 list_for_each_entry(d_buf, &dmabuf->dbuf.list, list) {
17298 seq_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17299 hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17300 /* If there is a hole in the sequence count then fail. */
eeead811 17301 if (++seq_count != be16_to_cpu(hdr->fh_seq_cnt))
4f774513
JS
17302 return 0;
17303 fctl = (hdr->fh_f_ctl[0] << 16 |
17304 hdr->fh_f_ctl[1] << 8 |
17305 hdr->fh_f_ctl[2]);
17306 /* If last frame of sequence we can return success. */
17307 if (fctl & FC_FC_END_SEQ)
17308 return 1;
17309 }
17310 return 0;
17311}
17312
17313/**
17314 * lpfc_prep_seq - Prep sequence for ULP processing
17315 * @vport: Pointer to the vport on which this sequence was received
17316 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17317 *
17318 * This function takes a sequence, described by a list of frames, and creates
17319 * a list of iocbq structures to describe the sequence. This iocbq list will be
17320 * used to issue to the generic unsolicited sequence handler. This routine
17321 * returns a pointer to the first iocbq in the list. If the function is unable
17322 * to allocate an iocbq then it throw out the received frames that were not
17323 * able to be described and return a pointer to the first iocbq. If unable to
17324 * allocate any iocbqs (including the first) this function will return NULL.
17325 **/
17326static struct lpfc_iocbq *
17327lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
17328{
7851fe2c 17329 struct hbq_dmabuf *hbq_buf;
4f774513
JS
17330 struct lpfc_dmabuf *d_buf, *n_buf;
17331 struct lpfc_iocbq *first_iocbq, *iocbq;
17332 struct fc_frame_header *fc_hdr;
17333 uint32_t sid;
7851fe2c 17334 uint32_t len, tot_len;
eeead811 17335 struct ulp_bde64 *pbde;
4f774513
JS
17336
17337 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17338 /* remove from receive buffer list */
17339 list_del_init(&seq_dmabuf->hbuf.list);
45ed1190 17340 lpfc_update_rcv_time_stamp(vport);
4f774513 17341 /* get the Remote Port's SID */
6669f9bb 17342 sid = sli4_sid_from_fc_hdr(fc_hdr);
7851fe2c 17343 tot_len = 0;
4f774513
JS
17344 /* Get an iocbq struct to fill in. */
17345 first_iocbq = lpfc_sli_get_iocbq(vport->phba);
17346 if (first_iocbq) {
17347 /* Initialize the first IOCB. */
8fa38513 17348 first_iocbq->iocb.unsli3.rcvsli3.acc_len = 0;
4f774513 17349 first_iocbq->iocb.ulpStatus = IOSTAT_SUCCESS;
895427bd 17350 first_iocbq->vport = vport;
939723a4
JS
17351
17352 /* Check FC Header to see what TYPE of frame we are rcv'ing */
17353 if (sli4_type_from_fc_hdr(fc_hdr) == FC_TYPE_ELS) {
17354 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_ELS64_CX;
17355 first_iocbq->iocb.un.rcvels.parmRo =
17356 sli4_did_from_fc_hdr(fc_hdr);
17357 first_iocbq->iocb.ulpPU = PARM_NPIV_DID;
17358 } else
17359 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_SEQ64_CX;
7851fe2c
JS
17360 first_iocbq->iocb.ulpContext = NO_XRI;
17361 first_iocbq->iocb.unsli3.rcvsli3.ox_id =
17362 be16_to_cpu(fc_hdr->fh_ox_id);
17363 /* iocbq is prepped for internal consumption. Physical vpi. */
17364 first_iocbq->iocb.unsli3.rcvsli3.vpi =
17365 vport->phba->vpi_ids[vport->vpi];
4f774513 17366 /* put the first buffer into the first IOCBq */
48a5a664
JS
17367 tot_len = bf_get(lpfc_rcqe_length,
17368 &seq_dmabuf->cq_event.cqe.rcqe_cmpl);
17369
4f774513
JS
17370 first_iocbq->context2 = &seq_dmabuf->dbuf;
17371 first_iocbq->context3 = NULL;
17372 first_iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17373 if (tot_len > LPFC_DATA_BUF_SIZE)
17374 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17375 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17376 else
17377 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize = tot_len;
17378
4f774513 17379 first_iocbq->iocb.un.rcvels.remoteID = sid;
48a5a664 17380
7851fe2c 17381 first_iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
4f774513
JS
17382 }
17383 iocbq = first_iocbq;
17384 /*
17385 * Each IOCBq can have two Buffers assigned, so go through the list
17386 * of buffers for this sequence and save two buffers in each IOCBq
17387 */
17388 list_for_each_entry_safe(d_buf, n_buf, &seq_dmabuf->dbuf.list, list) {
17389 if (!iocbq) {
17390 lpfc_in_buf_free(vport->phba, d_buf);
17391 continue;
17392 }
17393 if (!iocbq->context3) {
17394 iocbq->context3 = d_buf;
17395 iocbq->iocb.ulpBdeCount++;
7851fe2c
JS
17396 /* We need to get the size out of the right CQE */
17397 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17398 len = bf_get(lpfc_rcqe_length,
17399 &hbq_buf->cq_event.cqe.rcqe_cmpl);
48a5a664
JS
17400 pbde = (struct ulp_bde64 *)
17401 &iocbq->iocb.unsli3.sli3Words[4];
17402 if (len > LPFC_DATA_BUF_SIZE)
17403 pbde->tus.f.bdeSize = LPFC_DATA_BUF_SIZE;
17404 else
17405 pbde->tus.f.bdeSize = len;
17406
7851fe2c
JS
17407 iocbq->iocb.unsli3.rcvsli3.acc_len += len;
17408 tot_len += len;
4f774513
JS
17409 } else {
17410 iocbq = lpfc_sli_get_iocbq(vport->phba);
17411 if (!iocbq) {
17412 if (first_iocbq) {
17413 first_iocbq->iocb.ulpStatus =
17414 IOSTAT_FCP_RSP_ERROR;
17415 first_iocbq->iocb.un.ulpWord[4] =
17416 IOERR_NO_RESOURCES;
17417 }
17418 lpfc_in_buf_free(vport->phba, d_buf);
17419 continue;
17420 }
48a5a664
JS
17421 /* We need to get the size out of the right CQE */
17422 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17423 len = bf_get(lpfc_rcqe_length,
17424 &hbq_buf->cq_event.cqe.rcqe_cmpl);
4f774513
JS
17425 iocbq->context2 = d_buf;
17426 iocbq->context3 = NULL;
17427 iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17428 if (len > LPFC_DATA_BUF_SIZE)
17429 iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17430 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17431 else
17432 iocbq->iocb.un.cont64[0].tus.f.bdeSize = len;
7851fe2c 17433
7851fe2c
JS
17434 tot_len += len;
17435 iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
17436
4f774513
JS
17437 iocbq->iocb.un.rcvels.remoteID = sid;
17438 list_add_tail(&iocbq->list, &first_iocbq->list);
17439 }
17440 }
17441 return first_iocbq;
17442}
17443
6669f9bb
JS
17444static void
17445lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *vport,
17446 struct hbq_dmabuf *seq_dmabuf)
17447{
17448 struct fc_frame_header *fc_hdr;
17449 struct lpfc_iocbq *iocbq, *curr_iocb, *next_iocb;
17450 struct lpfc_hba *phba = vport->phba;
17451
17452 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17453 iocbq = lpfc_prep_seq(vport, seq_dmabuf);
17454 if (!iocbq) {
17455 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17456 "2707 Ring %d handler: Failed to allocate "
17457 "iocb Rctl x%x Type x%x received\n",
17458 LPFC_ELS_RING,
17459 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17460 return;
17461 }
17462 if (!lpfc_complete_unsol_iocb(phba,
895427bd 17463 phba->sli4_hba.els_wq->pring,
6669f9bb
JS
17464 iocbq, fc_hdr->fh_r_ctl,
17465 fc_hdr->fh_type))
6d368e53 17466 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6669f9bb
JS
17467 "2540 Ring %d handler: unexpected Rctl "
17468 "x%x Type x%x received\n",
17469 LPFC_ELS_RING,
17470 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17471
17472 /* Free iocb created in lpfc_prep_seq */
17473 list_for_each_entry_safe(curr_iocb, next_iocb,
17474 &iocbq->list, list) {
17475 list_del_init(&curr_iocb->list);
17476 lpfc_sli_release_iocbq(phba, curr_iocb);
17477 }
17478 lpfc_sli_release_iocbq(phba, iocbq);
17479}
17480
ae9e28f3
JS
17481static void
17482lpfc_sli4_mds_loopback_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
17483 struct lpfc_iocbq *rspiocb)
17484{
17485 struct lpfc_dmabuf *pcmd = cmdiocb->context2;
17486
17487 if (pcmd && pcmd->virt)
771db5c0 17488 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3
JS
17489 kfree(pcmd);
17490 lpfc_sli_release_iocbq(phba, cmdiocb);
17491}
17492
17493static void
17494lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
17495 struct hbq_dmabuf *dmabuf)
17496{
17497 struct fc_frame_header *fc_hdr;
17498 struct lpfc_hba *phba = vport->phba;
17499 struct lpfc_iocbq *iocbq = NULL;
17500 union lpfc_wqe *wqe;
17501 struct lpfc_dmabuf *pcmd = NULL;
17502 uint32_t frame_len;
17503 int rc;
17504
17505 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17506 frame_len = bf_get(lpfc_rcqe_length, &dmabuf->cq_event.cqe.rcqe_cmpl);
17507
17508 /* Send the received frame back */
17509 iocbq = lpfc_sli_get_iocbq(phba);
17510 if (!iocbq)
17511 goto exit;
17512
17513 /* Allocate buffer for command payload */
17514 pcmd = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
17515 if (pcmd)
771db5c0 17516 pcmd->virt = dma_pool_alloc(phba->lpfc_drb_pool, GFP_KERNEL,
ae9e28f3
JS
17517 &pcmd->phys);
17518 if (!pcmd || !pcmd->virt)
17519 goto exit;
17520
17521 INIT_LIST_HEAD(&pcmd->list);
17522
17523 /* copyin the payload */
17524 memcpy(pcmd->virt, dmabuf->dbuf.virt, frame_len);
17525
17526 /* fill in BDE's for command */
17527 iocbq->iocb.un.xseq64.bdl.addrHigh = putPaddrHigh(pcmd->phys);
17528 iocbq->iocb.un.xseq64.bdl.addrLow = putPaddrLow(pcmd->phys);
17529 iocbq->iocb.un.xseq64.bdl.bdeFlags = BUFF_TYPE_BDE_64;
17530 iocbq->iocb.un.xseq64.bdl.bdeSize = frame_len;
17531
17532 iocbq->context2 = pcmd;
17533 iocbq->vport = vport;
17534 iocbq->iocb_flag &= ~LPFC_FIP_ELS_ID_MASK;
17535 iocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
17536
17537 /*
17538 * Setup rest of the iocb as though it were a WQE
17539 * Build the SEND_FRAME WQE
17540 */
17541 wqe = (union lpfc_wqe *)&iocbq->iocb;
17542
17543 wqe->send_frame.frame_len = frame_len;
17544 wqe->send_frame.fc_hdr_wd0 = be32_to_cpu(*((uint32_t *)fc_hdr));
17545 wqe->send_frame.fc_hdr_wd1 = be32_to_cpu(*((uint32_t *)fc_hdr + 1));
17546 wqe->send_frame.fc_hdr_wd2 = be32_to_cpu(*((uint32_t *)fc_hdr + 2));
17547 wqe->send_frame.fc_hdr_wd3 = be32_to_cpu(*((uint32_t *)fc_hdr + 3));
17548 wqe->send_frame.fc_hdr_wd4 = be32_to_cpu(*((uint32_t *)fc_hdr + 4));
17549 wqe->send_frame.fc_hdr_wd5 = be32_to_cpu(*((uint32_t *)fc_hdr + 5));
17550
17551 iocbq->iocb.ulpCommand = CMD_SEND_FRAME;
17552 iocbq->iocb.ulpLe = 1;
17553 iocbq->iocb_cmpl = lpfc_sli4_mds_loopback_cmpl;
17554 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, iocbq, 0);
17555 if (rc == IOCB_ERROR)
17556 goto exit;
17557
17558 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17559 return;
17560
17561exit:
17562 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
17563 "2023 Unable to process MDS loopback frame\n");
17564 if (pcmd && pcmd->virt)
771db5c0 17565 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3 17566 kfree(pcmd);
401bb416
DK
17567 if (iocbq)
17568 lpfc_sli_release_iocbq(phba, iocbq);
ae9e28f3
JS
17569 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17570}
17571
4f774513
JS
17572/**
17573 * lpfc_sli4_handle_received_buffer - Handle received buffers from firmware
17574 * @phba: Pointer to HBA context object.
17575 *
17576 * This function is called with no lock held. This function processes all
17577 * the received buffers and gives it to upper layers when a received buffer
17578 * indicates that it is the final frame in the sequence. The interrupt
895427bd 17579 * service routine processes received buffers at interrupt contexts.
4f774513
JS
17580 * Worker thread calls lpfc_sli4_handle_received_buffer, which will call the
17581 * appropriate receive function when the final frame in a sequence is received.
17582 **/
4d9ab994
JS
17583void
17584lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,
17585 struct hbq_dmabuf *dmabuf)
4f774513 17586{
4d9ab994 17587 struct hbq_dmabuf *seq_dmabuf;
4f774513
JS
17588 struct fc_frame_header *fc_hdr;
17589 struct lpfc_vport *vport;
17590 uint32_t fcfi;
939723a4 17591 uint32_t did;
4f774513 17592
4f774513 17593 /* Process each received buffer */
4d9ab994 17594 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
2ea259ee 17595
4d9ab994
JS
17596 /* check to see if this a valid type of frame */
17597 if (lpfc_fc_frame_check(phba, fc_hdr)) {
17598 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17599 return;
17600 }
2ea259ee 17601
7851fe2c
JS
17602 if ((bf_get(lpfc_cqe_code,
17603 &dmabuf->cq_event.cqe.rcqe_cmpl) == CQE_CODE_RECEIVE_V1))
17604 fcfi = bf_get(lpfc_rcqe_fcf_id_v1,
17605 &dmabuf->cq_event.cqe.rcqe_cmpl);
17606 else
17607 fcfi = bf_get(lpfc_rcqe_fcf_id,
17608 &dmabuf->cq_event.cqe.rcqe_cmpl);
939723a4 17609
ae9e28f3
JS
17610 if (fc_hdr->fh_r_ctl == 0xF4 && fc_hdr->fh_type == 0xFF) {
17611 vport = phba->pport;
17612 /* Handle MDS Loopback frames */
17613 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
17614 return;
17615 }
17616
895427bd
JS
17617 /* d_id this frame is directed to */
17618 did = sli4_did_from_fc_hdr(fc_hdr);
17619
17620 vport = lpfc_fc_frame_to_vport(phba, fc_hdr, fcfi, did);
939723a4 17621 if (!vport) {
4d9ab994
JS
17622 /* throw out the frame */
17623 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17624 return;
17625 }
939723a4 17626
939723a4
JS
17627 /* vport is registered unless we rcv a FLOGI directed to Fabric_DID */
17628 if (!(vport->vpi_state & LPFC_VPI_REGISTERED) &&
17629 (did != Fabric_DID)) {
17630 /*
17631 * Throw out the frame if we are not pt2pt.
17632 * The pt2pt protocol allows for discovery frames
17633 * to be received without a registered VPI.
17634 */
17635 if (!(vport->fc_flag & FC_PT2PT) ||
17636 (phba->link_state == LPFC_HBA_READY)) {
17637 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17638 return;
17639 }
17640 }
17641
6669f9bb
JS
17642 /* Handle the basic abort sequence (BA_ABTS) event */
17643 if (fc_hdr->fh_r_ctl == FC_RCTL_BA_ABTS) {
17644 lpfc_sli4_handle_unsol_abort(vport, dmabuf);
17645 return;
17646 }
17647
4d9ab994
JS
17648 /* Link this frame */
17649 seq_dmabuf = lpfc_fc_frame_add(vport, dmabuf);
17650 if (!seq_dmabuf) {
17651 /* unable to add frame to vport - throw it out */
17652 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17653 return;
17654 }
17655 /* If not last frame in sequence continue processing frames. */
def9c7a9 17656 if (!lpfc_seq_complete(seq_dmabuf))
4d9ab994 17657 return;
def9c7a9 17658
6669f9bb
JS
17659 /* Send the complete sequence to the upper layer protocol */
17660 lpfc_sli4_send_seq_to_ulp(vport, seq_dmabuf);
4f774513 17661}
6fb120a7
JS
17662
17663/**
17664 * lpfc_sli4_post_all_rpi_hdrs - Post the rpi header memory region to the port
17665 * @phba: pointer to lpfc hba data structure.
17666 *
17667 * This routine is invoked to post rpi header templates to the
17668 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
17669 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
17670 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
17671 *
17672 * This routine does not require any locks. It's usage is expected
17673 * to be driver load or reset recovery when the driver is
17674 * sequential.
17675 *
17676 * Return codes
af901ca1 17677 * 0 - successful
d439d286 17678 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
17679 * When this error occurs, the driver is not guaranteed
17680 * to have any rpi regions posted to the device and
17681 * must either attempt to repost the regions or take a
17682 * fatal error.
17683 **/
17684int
17685lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *phba)
17686{
17687 struct lpfc_rpi_hdr *rpi_page;
17688 uint32_t rc = 0;
6d368e53
JS
17689 uint16_t lrpi = 0;
17690
17691 /* SLI4 ports that support extents do not require RPI headers. */
17692 if (!phba->sli4_hba.rpi_hdrs_in_use)
17693 goto exit;
17694 if (phba->sli4_hba.extents_in_use)
17695 return -EIO;
6fb120a7 17696
6fb120a7 17697 list_for_each_entry(rpi_page, &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6d368e53
JS
17698 /*
17699 * Assign the rpi headers a physical rpi only if the driver
17700 * has not initialized those resources. A port reset only
17701 * needs the headers posted.
17702 */
17703 if (bf_get(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags) !=
17704 LPFC_RPI_RSRC_RDY)
17705 rpi_page->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
17706
6fb120a7
JS
17707 rc = lpfc_sli4_post_rpi_hdr(phba, rpi_page);
17708 if (rc != MBX_SUCCESS) {
17709 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17710 "2008 Error %d posting all rpi "
17711 "headers\n", rc);
17712 rc = -EIO;
17713 break;
17714 }
17715 }
17716
6d368e53
JS
17717 exit:
17718 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags,
17719 LPFC_RPI_RSRC_RDY);
6fb120a7
JS
17720 return rc;
17721}
17722
17723/**
17724 * lpfc_sli4_post_rpi_hdr - Post an rpi header memory region to the port
17725 * @phba: pointer to lpfc hba data structure.
17726 * @rpi_page: pointer to the rpi memory region.
17727 *
17728 * This routine is invoked to post a single rpi header to the
17729 * HBA consistent with the SLI-4 interface spec. This memory region
17730 * maps up to 64 rpi context regions.
17731 *
17732 * Return codes
af901ca1 17733 * 0 - successful
d439d286
JS
17734 * -ENOMEM - No available memory
17735 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
17736 **/
17737int
17738lpfc_sli4_post_rpi_hdr(struct lpfc_hba *phba, struct lpfc_rpi_hdr *rpi_page)
17739{
17740 LPFC_MBOXQ_t *mboxq;
17741 struct lpfc_mbx_post_hdr_tmpl *hdr_tmpl;
17742 uint32_t rc = 0;
6fb120a7
JS
17743 uint32_t shdr_status, shdr_add_status;
17744 union lpfc_sli4_cfg_shdr *shdr;
17745
6d368e53
JS
17746 /* SLI4 ports that support extents do not require RPI headers. */
17747 if (!phba->sli4_hba.rpi_hdrs_in_use)
17748 return rc;
17749 if (phba->sli4_hba.extents_in_use)
17750 return -EIO;
17751
6fb120a7
JS
17752 /* The port is notified of the header region via a mailbox command. */
17753 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
17754 if (!mboxq) {
17755 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17756 "2001 Unable to allocate memory for issuing "
17757 "SLI_CONFIG_SPECIAL mailbox command\n");
17758 return -ENOMEM;
17759 }
17760
17761 /* Post all rpi memory regions to the port. */
17762 hdr_tmpl = &mboxq->u.mqe.un.hdr_tmpl;
6fb120a7
JS
17763 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
17764 LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE,
17765 sizeof(struct lpfc_mbx_post_hdr_tmpl) -
fedd3b7b
JS
17766 sizeof(struct lpfc_sli4_cfg_mhdr),
17767 LPFC_SLI4_MBX_EMBED);
6d368e53
JS
17768
17769
17770 /* Post the physical rpi to the port for this rpi header. */
6fb120a7
JS
17771 bf_set(lpfc_mbx_post_hdr_tmpl_rpi_offset, hdr_tmpl,
17772 rpi_page->start_rpi);
6d368e53
JS
17773 bf_set(lpfc_mbx_post_hdr_tmpl_page_cnt,
17774 hdr_tmpl, rpi_page->page_count);
17775
6fb120a7
JS
17776 hdr_tmpl->rpi_paddr_lo = putPaddrLow(rpi_page->dmabuf->phys);
17777 hdr_tmpl->rpi_paddr_hi = putPaddrHigh(rpi_page->dmabuf->phys);
f1126688 17778 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6fb120a7
JS
17779 shdr = (union lpfc_sli4_cfg_shdr *) &hdr_tmpl->header.cfg_shdr;
17780 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
17781 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
17782 if (rc != MBX_TIMEOUT)
17783 mempool_free(mboxq, phba->mbox_mem_pool);
17784 if (shdr_status || shdr_add_status || rc) {
17785 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
17786 "2514 POST_RPI_HDR mailbox failed with "
17787 "status x%x add_status x%x, mbx status x%x\n",
17788 shdr_status, shdr_add_status, rc);
17789 rc = -ENXIO;
845d9e8d
JS
17790 } else {
17791 /*
17792 * The next_rpi stores the next logical module-64 rpi value used
17793 * to post physical rpis in subsequent rpi postings.
17794 */
17795 spin_lock_irq(&phba->hbalock);
17796 phba->sli4_hba.next_rpi = rpi_page->next_rpi;
17797 spin_unlock_irq(&phba->hbalock);
6fb120a7
JS
17798 }
17799 return rc;
17800}
17801
17802/**
17803 * lpfc_sli4_alloc_rpi - Get an available rpi in the device's range
17804 * @phba: pointer to lpfc hba data structure.
17805 *
17806 * This routine is invoked to post rpi header templates to the
17807 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
17808 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
17809 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
17810 *
17811 * Returns
af901ca1 17812 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
6fb120a7
JS
17813 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
17814 **/
17815int
17816lpfc_sli4_alloc_rpi(struct lpfc_hba *phba)
17817{
6d368e53
JS
17818 unsigned long rpi;
17819 uint16_t max_rpi, rpi_limit;
17820 uint16_t rpi_remaining, lrpi = 0;
6fb120a7 17821 struct lpfc_rpi_hdr *rpi_hdr;
4902b381 17822 unsigned long iflag;
6fb120a7 17823
6fb120a7 17824 /*
6d368e53
JS
17825 * Fetch the next logical rpi. Because this index is logical,
17826 * the driver starts at 0 each time.
6fb120a7 17827 */
4902b381 17828 spin_lock_irqsave(&phba->hbalock, iflag);
be6bb941
JS
17829 max_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
17830 rpi_limit = phba->sli4_hba.next_rpi;
17831
6d368e53
JS
17832 rpi = find_next_zero_bit(phba->sli4_hba.rpi_bmask, rpi_limit, 0);
17833 if (rpi >= rpi_limit)
6fb120a7
JS
17834 rpi = LPFC_RPI_ALLOC_ERROR;
17835 else {
17836 set_bit(rpi, phba->sli4_hba.rpi_bmask);
17837 phba->sli4_hba.max_cfg_param.rpi_used++;
17838 phba->sli4_hba.rpi_count++;
17839 }
be6bb941
JS
17840 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
17841 "0001 rpi:%x max:%x lim:%x\n",
17842 (int) rpi, max_rpi, rpi_limit);
6fb120a7
JS
17843
17844 /*
17845 * Don't try to allocate more rpi header regions if the device limit
6d368e53 17846 * has been exhausted.
6fb120a7
JS
17847 */
17848 if ((rpi == LPFC_RPI_ALLOC_ERROR) &&
17849 (phba->sli4_hba.rpi_count >= max_rpi)) {
4902b381 17850 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
17851 return rpi;
17852 }
17853
6d368e53
JS
17854 /*
17855 * RPI header postings are not required for SLI4 ports capable of
17856 * extents.
17857 */
17858 if (!phba->sli4_hba.rpi_hdrs_in_use) {
4902b381 17859 spin_unlock_irqrestore(&phba->hbalock, iflag);
6d368e53
JS
17860 return rpi;
17861 }
17862
6fb120a7
JS
17863 /*
17864 * If the driver is running low on rpi resources, allocate another
17865 * page now. Note that the next_rpi value is used because
17866 * it represents how many are actually in use whereas max_rpi notes
17867 * how many are supported max by the device.
17868 */
6d368e53 17869 rpi_remaining = phba->sli4_hba.next_rpi - phba->sli4_hba.rpi_count;
4902b381 17870 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
17871 if (rpi_remaining < LPFC_RPI_LOW_WATER_MARK) {
17872 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
17873 if (!rpi_hdr) {
17874 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17875 "2002 Error Could not grow rpi "
17876 "count\n");
17877 } else {
6d368e53
JS
17878 lrpi = rpi_hdr->start_rpi;
17879 rpi_hdr->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
6fb120a7
JS
17880 lpfc_sli4_post_rpi_hdr(phba, rpi_hdr);
17881 }
17882 }
17883
17884 return rpi;
17885}
17886
d7c47992
JS
17887/**
17888 * lpfc_sli4_free_rpi - Release an rpi for reuse.
17889 * @phba: pointer to lpfc hba data structure.
17890 *
17891 * This routine is invoked to release an rpi to the pool of
17892 * available rpis maintained by the driver.
17893 **/
5d8b8167 17894static void
d7c47992
JS
17895__lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
17896{
17897 if (test_and_clear_bit(rpi, phba->sli4_hba.rpi_bmask)) {
17898 phba->sli4_hba.rpi_count--;
17899 phba->sli4_hba.max_cfg_param.rpi_used--;
17900 }
17901}
17902
6fb120a7
JS
17903/**
17904 * lpfc_sli4_free_rpi - Release an rpi for reuse.
17905 * @phba: pointer to lpfc hba data structure.
17906 *
17907 * This routine is invoked to release an rpi to the pool of
17908 * available rpis maintained by the driver.
17909 **/
17910void
17911lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
17912{
17913 spin_lock_irq(&phba->hbalock);
d7c47992 17914 __lpfc_sli4_free_rpi(phba, rpi);
6fb120a7
JS
17915 spin_unlock_irq(&phba->hbalock);
17916}
17917
17918/**
17919 * lpfc_sli4_remove_rpis - Remove the rpi bitmask region
17920 * @phba: pointer to lpfc hba data structure.
17921 *
17922 * This routine is invoked to remove the memory region that
17923 * provided rpi via a bitmask.
17924 **/
17925void
17926lpfc_sli4_remove_rpis(struct lpfc_hba *phba)
17927{
17928 kfree(phba->sli4_hba.rpi_bmask);
6d368e53
JS
17929 kfree(phba->sli4_hba.rpi_ids);
17930 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6fb120a7
JS
17931}
17932
17933/**
17934 * lpfc_sli4_resume_rpi - Remove the rpi bitmask region
17935 * @phba: pointer to lpfc hba data structure.
17936 *
17937 * This routine is invoked to remove the memory region that
17938 * provided rpi via a bitmask.
17939 **/
17940int
6b5151fd
JS
17941lpfc_sli4_resume_rpi(struct lpfc_nodelist *ndlp,
17942 void (*cmpl)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *arg)
6fb120a7
JS
17943{
17944 LPFC_MBOXQ_t *mboxq;
17945 struct lpfc_hba *phba = ndlp->phba;
17946 int rc;
17947
17948 /* The port is notified of the header region via a mailbox command. */
17949 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
17950 if (!mboxq)
17951 return -ENOMEM;
17952
17953 /* Post all rpi memory regions to the port. */
17954 lpfc_resume_rpi(mboxq, ndlp);
6b5151fd
JS
17955 if (cmpl) {
17956 mboxq->mbox_cmpl = cmpl;
17957 mboxq->context1 = arg;
17958 mboxq->context2 = ndlp;
72859909
JS
17959 } else
17960 mboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6b5151fd 17961 mboxq->vport = ndlp->vport;
6fb120a7
JS
17962 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
17963 if (rc == MBX_NOT_FINISHED) {
17964 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17965 "2010 Resume RPI Mailbox failed "
17966 "status %d, mbxStatus x%x\n", rc,
17967 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
17968 mempool_free(mboxq, phba->mbox_mem_pool);
17969 return -EIO;
17970 }
17971 return 0;
17972}
17973
17974/**
17975 * lpfc_sli4_init_vpi - Initialize a vpi with the port
76a95d75 17976 * @vport: Pointer to the vport for which the vpi is being initialized
6fb120a7 17977 *
76a95d75 17978 * This routine is invoked to activate a vpi with the port.
6fb120a7
JS
17979 *
17980 * Returns:
17981 * 0 success
17982 * -Evalue otherwise
17983 **/
17984int
76a95d75 17985lpfc_sli4_init_vpi(struct lpfc_vport *vport)
6fb120a7
JS
17986{
17987 LPFC_MBOXQ_t *mboxq;
17988 int rc = 0;
6a9c52cf 17989 int retval = MBX_SUCCESS;
6fb120a7 17990 uint32_t mbox_tmo;
76a95d75 17991 struct lpfc_hba *phba = vport->phba;
6fb120a7
JS
17992 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
17993 if (!mboxq)
17994 return -ENOMEM;
76a95d75 17995 lpfc_init_vpi(phba, mboxq, vport->vpi);
a183a15f 17996 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
6fb120a7 17997 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
6fb120a7 17998 if (rc != MBX_SUCCESS) {
76a95d75 17999 lpfc_printf_vlog(vport, KERN_ERR, LOG_SLI,
6fb120a7
JS
18000 "2022 INIT VPI Mailbox failed "
18001 "status %d, mbxStatus x%x\n", rc,
18002 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
6a9c52cf 18003 retval = -EIO;
6fb120a7 18004 }
6a9c52cf 18005 if (rc != MBX_TIMEOUT)
76a95d75 18006 mempool_free(mboxq, vport->phba->mbox_mem_pool);
6a9c52cf
JS
18007
18008 return retval;
6fb120a7
JS
18009}
18010
18011/**
18012 * lpfc_mbx_cmpl_add_fcf_record - add fcf mbox completion handler.
18013 * @phba: pointer to lpfc hba data structure.
18014 * @mboxq: Pointer to mailbox object.
18015 *
18016 * This routine is invoked to manually add a single FCF record. The caller
18017 * must pass a completely initialized FCF_Record. This routine takes
18018 * care of the nonembedded mailbox operations.
18019 **/
18020static void
18021lpfc_mbx_cmpl_add_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
18022{
18023 void *virt_addr;
18024 union lpfc_sli4_cfg_shdr *shdr;
18025 uint32_t shdr_status, shdr_add_status;
18026
18027 virt_addr = mboxq->sge_array->addr[0];
18028 /* The IOCTL status is embedded in the mailbox subheader. */
18029 shdr = (union lpfc_sli4_cfg_shdr *) virt_addr;
18030 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18031 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18032
18033 if ((shdr_status || shdr_add_status) &&
18034 (shdr_status != STATUS_FCF_IN_USE))
18035 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18036 "2558 ADD_FCF_RECORD mailbox failed with "
18037 "status x%x add_status x%x\n",
18038 shdr_status, shdr_add_status);
18039
18040 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18041}
18042
18043/**
18044 * lpfc_sli4_add_fcf_record - Manually add an FCF Record.
18045 * @phba: pointer to lpfc hba data structure.
18046 * @fcf_record: pointer to the initialized fcf record to add.
18047 *
18048 * This routine is invoked to manually add a single FCF record. The caller
18049 * must pass a completely initialized FCF_Record. This routine takes
18050 * care of the nonembedded mailbox operations.
18051 **/
18052int
18053lpfc_sli4_add_fcf_record(struct lpfc_hba *phba, struct fcf_record *fcf_record)
18054{
18055 int rc = 0;
18056 LPFC_MBOXQ_t *mboxq;
18057 uint8_t *bytep;
18058 void *virt_addr;
6fb120a7
JS
18059 struct lpfc_mbx_sge sge;
18060 uint32_t alloc_len, req_len;
18061 uint32_t fcfindex;
18062
18063 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18064 if (!mboxq) {
18065 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18066 "2009 Failed to allocate mbox for ADD_FCF cmd\n");
18067 return -ENOMEM;
18068 }
18069
18070 req_len = sizeof(struct fcf_record) + sizeof(union lpfc_sli4_cfg_shdr) +
18071 sizeof(uint32_t);
18072
18073 /* Allocate DMA memory and set up the non-embedded mailbox command */
18074 alloc_len = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18075 LPFC_MBOX_OPCODE_FCOE_ADD_FCF,
18076 req_len, LPFC_SLI4_MBX_NEMBED);
18077 if (alloc_len < req_len) {
18078 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18079 "2523 Allocated DMA memory size (x%x) is "
18080 "less than the requested DMA memory "
18081 "size (x%x)\n", alloc_len, req_len);
18082 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18083 return -ENOMEM;
18084 }
18085
18086 /*
18087 * Get the first SGE entry from the non-embedded DMA memory. This
18088 * routine only uses a single SGE.
18089 */
18090 lpfc_sli4_mbx_sge_get(mboxq, 0, &sge);
6fb120a7
JS
18091 virt_addr = mboxq->sge_array->addr[0];
18092 /*
18093 * Configure the FCF record for FCFI 0. This is the driver's
18094 * hardcoded default and gets used in nonFIP mode.
18095 */
18096 fcfindex = bf_get(lpfc_fcf_record_fcf_index, fcf_record);
18097 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr);
18098 lpfc_sli_pcimem_bcopy(&fcfindex, bytep, sizeof(uint32_t));
18099
18100 /*
18101 * Copy the fcf_index and the FCF Record Data. The data starts after
18102 * the FCoE header plus word10. The data copy needs to be endian
18103 * correct.
18104 */
18105 bytep += sizeof(uint32_t);
18106 lpfc_sli_pcimem_bcopy(fcf_record, bytep, sizeof(struct fcf_record));
18107 mboxq->vport = phba->pport;
18108 mboxq->mbox_cmpl = lpfc_mbx_cmpl_add_fcf_record;
18109 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18110 if (rc == MBX_NOT_FINISHED) {
18111 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18112 "2515 ADD_FCF_RECORD mailbox failed with "
18113 "status 0x%x\n", rc);
18114 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18115 rc = -EIO;
18116 } else
18117 rc = 0;
18118
18119 return rc;
18120}
18121
18122/**
18123 * lpfc_sli4_build_dflt_fcf_record - Build the driver's default FCF Record.
18124 * @phba: pointer to lpfc hba data structure.
18125 * @fcf_record: pointer to the fcf record to write the default data.
18126 * @fcf_index: FCF table entry index.
18127 *
18128 * This routine is invoked to build the driver's default FCF record. The
18129 * values used are hardcoded. This routine handles memory initialization.
18130 *
18131 **/
18132void
18133lpfc_sli4_build_dflt_fcf_record(struct lpfc_hba *phba,
18134 struct fcf_record *fcf_record,
18135 uint16_t fcf_index)
18136{
18137 memset(fcf_record, 0, sizeof(struct fcf_record));
18138 fcf_record->max_rcv_size = LPFC_FCOE_MAX_RCV_SIZE;
18139 fcf_record->fka_adv_period = LPFC_FCOE_FKA_ADV_PER;
18140 fcf_record->fip_priority = LPFC_FCOE_FIP_PRIORITY;
18141 bf_set(lpfc_fcf_record_mac_0, fcf_record, phba->fc_map[0]);
18142 bf_set(lpfc_fcf_record_mac_1, fcf_record, phba->fc_map[1]);
18143 bf_set(lpfc_fcf_record_mac_2, fcf_record, phba->fc_map[2]);
18144 bf_set(lpfc_fcf_record_mac_3, fcf_record, LPFC_FCOE_FCF_MAC3);
18145 bf_set(lpfc_fcf_record_mac_4, fcf_record, LPFC_FCOE_FCF_MAC4);
18146 bf_set(lpfc_fcf_record_mac_5, fcf_record, LPFC_FCOE_FCF_MAC5);
18147 bf_set(lpfc_fcf_record_fc_map_0, fcf_record, phba->fc_map[0]);
18148 bf_set(lpfc_fcf_record_fc_map_1, fcf_record, phba->fc_map[1]);
18149 bf_set(lpfc_fcf_record_fc_map_2, fcf_record, phba->fc_map[2]);
18150 bf_set(lpfc_fcf_record_fcf_valid, fcf_record, 1);
0c287589 18151 bf_set(lpfc_fcf_record_fcf_avail, fcf_record, 1);
6fb120a7
JS
18152 bf_set(lpfc_fcf_record_fcf_index, fcf_record, fcf_index);
18153 bf_set(lpfc_fcf_record_mac_addr_prov, fcf_record,
18154 LPFC_FCF_FPMA | LPFC_FCF_SPMA);
18155 /* Set the VLAN bit map */
18156 if (phba->valid_vlan) {
18157 fcf_record->vlan_bitmap[phba->vlan_id / 8]
18158 = 1 << (phba->vlan_id % 8);
18159 }
18160}
18161
18162/**
0c9ab6f5 18163 * lpfc_sli4_fcf_scan_read_fcf_rec - Read hba fcf record for fcf scan.
6fb120a7
JS
18164 * @phba: pointer to lpfc hba data structure.
18165 * @fcf_index: FCF table entry offset.
18166 *
0c9ab6f5
JS
18167 * This routine is invoked to scan the entire FCF table by reading FCF
18168 * record and processing it one at a time starting from the @fcf_index
18169 * for initial FCF discovery or fast FCF failover rediscovery.
18170 *
25985edc 18171 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5 18172 * otherwise.
6fb120a7
JS
18173 **/
18174int
0c9ab6f5 18175lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
6fb120a7
JS
18176{
18177 int rc = 0, error;
18178 LPFC_MBOXQ_t *mboxq;
6fb120a7 18179
32b9793f 18180 phba->fcoe_eventtag_at_fcf_scan = phba->fcoe_eventtag;
80c17849 18181 phba->fcoe_cvl_eventtag_attn = phba->fcoe_cvl_eventtag;
6fb120a7
JS
18182 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18183 if (!mboxq) {
18184 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18185 "2000 Failed to allocate mbox for "
18186 "READ_FCF cmd\n");
4d9ab994 18187 error = -ENOMEM;
0c9ab6f5 18188 goto fail_fcf_scan;
6fb120a7 18189 }
ecfd03c6 18190 /* Construct the read FCF record mailbox command */
0c9ab6f5 18191 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
ecfd03c6
JS
18192 if (rc) {
18193 error = -EINVAL;
0c9ab6f5 18194 goto fail_fcf_scan;
6fb120a7 18195 }
ecfd03c6 18196 /* Issue the mailbox command asynchronously */
6fb120a7 18197 mboxq->vport = phba->pport;
0c9ab6f5 18198 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_scan_read_fcf_rec;
a93ff37a
JS
18199
18200 spin_lock_irq(&phba->hbalock);
18201 phba->hba_flag |= FCF_TS_INPROG;
18202 spin_unlock_irq(&phba->hbalock);
18203
6fb120a7 18204 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
ecfd03c6 18205 if (rc == MBX_NOT_FINISHED)
6fb120a7 18206 error = -EIO;
ecfd03c6 18207 else {
38b92ef8
JS
18208 /* Reset eligible FCF count for new scan */
18209 if (fcf_index == LPFC_FCOE_FCF_GET_FIRST)
999d813f 18210 phba->fcf.eligible_fcf_cnt = 0;
6fb120a7 18211 error = 0;
32b9793f 18212 }
0c9ab6f5 18213fail_fcf_scan:
4d9ab994
JS
18214 if (error) {
18215 if (mboxq)
18216 lpfc_sli4_mbox_cmd_free(phba, mboxq);
a93ff37a 18217 /* FCF scan failed, clear FCF_TS_INPROG flag */
4d9ab994 18218 spin_lock_irq(&phba->hbalock);
a93ff37a 18219 phba->hba_flag &= ~FCF_TS_INPROG;
4d9ab994
JS
18220 spin_unlock_irq(&phba->hbalock);
18221 }
6fb120a7
JS
18222 return error;
18223}
a0c87cbd 18224
0c9ab6f5 18225/**
a93ff37a 18226 * lpfc_sli4_fcf_rr_read_fcf_rec - Read hba fcf record for roundrobin fcf.
0c9ab6f5
JS
18227 * @phba: pointer to lpfc hba data structure.
18228 * @fcf_index: FCF table entry offset.
18229 *
18230 * This routine is invoked to read an FCF record indicated by @fcf_index
a93ff37a 18231 * and to use it for FLOGI roundrobin FCF failover.
0c9ab6f5 18232 *
25985edc 18233 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18234 * otherwise.
18235 **/
18236int
18237lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18238{
18239 int rc = 0, error;
18240 LPFC_MBOXQ_t *mboxq;
18241
18242 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18243 if (!mboxq) {
18244 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18245 "2763 Failed to allocate mbox for "
18246 "READ_FCF cmd\n");
18247 error = -ENOMEM;
18248 goto fail_fcf_read;
18249 }
18250 /* Construct the read FCF record mailbox command */
18251 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18252 if (rc) {
18253 error = -EINVAL;
18254 goto fail_fcf_read;
18255 }
18256 /* Issue the mailbox command asynchronously */
18257 mboxq->vport = phba->pport;
18258 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_rr_read_fcf_rec;
18259 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18260 if (rc == MBX_NOT_FINISHED)
18261 error = -EIO;
18262 else
18263 error = 0;
18264
18265fail_fcf_read:
18266 if (error && mboxq)
18267 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18268 return error;
18269}
18270
18271/**
18272 * lpfc_sli4_read_fcf_rec - Read hba fcf record for update eligible fcf bmask.
18273 * @phba: pointer to lpfc hba data structure.
18274 * @fcf_index: FCF table entry offset.
18275 *
18276 * This routine is invoked to read an FCF record indicated by @fcf_index to
a93ff37a 18277 * determine whether it's eligible for FLOGI roundrobin failover list.
0c9ab6f5 18278 *
25985edc 18279 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18280 * otherwise.
18281 **/
18282int
18283lpfc_sli4_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18284{
18285 int rc = 0, error;
18286 LPFC_MBOXQ_t *mboxq;
18287
18288 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18289 if (!mboxq) {
18290 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18291 "2758 Failed to allocate mbox for "
18292 "READ_FCF cmd\n");
18293 error = -ENOMEM;
18294 goto fail_fcf_read;
18295 }
18296 /* Construct the read FCF record mailbox command */
18297 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18298 if (rc) {
18299 error = -EINVAL;
18300 goto fail_fcf_read;
18301 }
18302 /* Issue the mailbox command asynchronously */
18303 mboxq->vport = phba->pport;
18304 mboxq->mbox_cmpl = lpfc_mbx_cmpl_read_fcf_rec;
18305 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18306 if (rc == MBX_NOT_FINISHED)
18307 error = -EIO;
18308 else
18309 error = 0;
18310
18311fail_fcf_read:
18312 if (error && mboxq)
18313 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18314 return error;
18315}
18316
7d791df7 18317/**
f5cb5304 18318 * lpfc_check_next_fcf_pri_level
7d791df7
JS
18319 * phba pointer to the lpfc_hba struct for this port.
18320 * This routine is called from the lpfc_sli4_fcf_rr_next_index_get
18321 * routine when the rr_bmask is empty. The FCF indecies are put into the
18322 * rr_bmask based on their priority level. Starting from the highest priority
18323 * to the lowest. The most likely FCF candidate will be in the highest
18324 * priority group. When this routine is called it searches the fcf_pri list for
18325 * next lowest priority group and repopulates the rr_bmask with only those
18326 * fcf_indexes.
18327 * returns:
18328 * 1=success 0=failure
18329 **/
5d8b8167 18330static int
7d791df7
JS
18331lpfc_check_next_fcf_pri_level(struct lpfc_hba *phba)
18332{
18333 uint16_t next_fcf_pri;
18334 uint16_t last_index;
18335 struct lpfc_fcf_pri *fcf_pri;
18336 int rc;
18337 int ret = 0;
18338
18339 last_index = find_first_bit(phba->fcf.fcf_rr_bmask,
18340 LPFC_SLI4_FCF_TBL_INDX_MAX);
18341 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
18342 "3060 Last IDX %d\n", last_index);
2562669c
JS
18343
18344 /* Verify the priority list has 2 or more entries */
18345 spin_lock_irq(&phba->hbalock);
18346 if (list_empty(&phba->fcf.fcf_pri_list) ||
18347 list_is_singular(&phba->fcf.fcf_pri_list)) {
18348 spin_unlock_irq(&phba->hbalock);
7d791df7
JS
18349 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
18350 "3061 Last IDX %d\n", last_index);
18351 return 0; /* Empty rr list */
18352 }
2562669c
JS
18353 spin_unlock_irq(&phba->hbalock);
18354
7d791df7
JS
18355 next_fcf_pri = 0;
18356 /*
18357 * Clear the rr_bmask and set all of the bits that are at this
18358 * priority.
18359 */
18360 memset(phba->fcf.fcf_rr_bmask, 0,
18361 sizeof(*phba->fcf.fcf_rr_bmask));
18362 spin_lock_irq(&phba->hbalock);
18363 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18364 if (fcf_pri->fcf_rec.flag & LPFC_FCF_FLOGI_FAILED)
18365 continue;
18366 /*
18367 * the 1st priority that has not FLOGI failed
18368 * will be the highest.
18369 */
18370 if (!next_fcf_pri)
18371 next_fcf_pri = fcf_pri->fcf_rec.priority;
18372 spin_unlock_irq(&phba->hbalock);
18373 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18374 rc = lpfc_sli4_fcf_rr_index_set(phba,
18375 fcf_pri->fcf_rec.fcf_index);
18376 if (rc)
18377 return 0;
18378 }
18379 spin_lock_irq(&phba->hbalock);
18380 }
18381 /*
18382 * if next_fcf_pri was not set above and the list is not empty then
18383 * we have failed flogis on all of them. So reset flogi failed
4907cb7b 18384 * and start at the beginning.
7d791df7
JS
18385 */
18386 if (!next_fcf_pri && !list_empty(&phba->fcf.fcf_pri_list)) {
18387 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18388 fcf_pri->fcf_rec.flag &= ~LPFC_FCF_FLOGI_FAILED;
18389 /*
18390 * the 1st priority that has not FLOGI failed
18391 * will be the highest.
18392 */
18393 if (!next_fcf_pri)
18394 next_fcf_pri = fcf_pri->fcf_rec.priority;
18395 spin_unlock_irq(&phba->hbalock);
18396 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18397 rc = lpfc_sli4_fcf_rr_index_set(phba,
18398 fcf_pri->fcf_rec.fcf_index);
18399 if (rc)
18400 return 0;
18401 }
18402 spin_lock_irq(&phba->hbalock);
18403 }
18404 } else
18405 ret = 1;
18406 spin_unlock_irq(&phba->hbalock);
18407
18408 return ret;
18409}
0c9ab6f5
JS
18410/**
18411 * lpfc_sli4_fcf_rr_next_index_get - Get next eligible fcf record index
18412 * @phba: pointer to lpfc hba data structure.
18413 *
18414 * This routine is to get the next eligible FCF record index in a round
18415 * robin fashion. If the next eligible FCF record index equals to the
a93ff37a 18416 * initial roundrobin FCF record index, LPFC_FCOE_FCF_NEXT_NONE (0xFFFF)
0c9ab6f5
JS
18417 * shall be returned, otherwise, the next eligible FCF record's index
18418 * shall be returned.
18419 **/
18420uint16_t
18421lpfc_sli4_fcf_rr_next_index_get(struct lpfc_hba *phba)
18422{
18423 uint16_t next_fcf_index;
18424
421c6622 18425initial_priority:
3804dc84 18426 /* Search start from next bit of currently registered FCF index */
421c6622
JS
18427 next_fcf_index = phba->fcf.current_rec.fcf_indx;
18428
7d791df7 18429next_priority:
421c6622
JS
18430 /* Determine the next fcf index to check */
18431 next_fcf_index = (next_fcf_index + 1) % LPFC_SLI4_FCF_TBL_INDX_MAX;
0c9ab6f5
JS
18432 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18433 LPFC_SLI4_FCF_TBL_INDX_MAX,
3804dc84
JS
18434 next_fcf_index);
18435
0c9ab6f5 18436 /* Wrap around condition on phba->fcf.fcf_rr_bmask */
7d791df7
JS
18437 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18438 /*
18439 * If we have wrapped then we need to clear the bits that
18440 * have been tested so that we can detect when we should
18441 * change the priority level.
18442 */
0c9ab6f5
JS
18443 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18444 LPFC_SLI4_FCF_TBL_INDX_MAX, 0);
7d791df7
JS
18445 }
18446
3804dc84
JS
18447
18448 /* Check roundrobin failover list empty condition */
7d791df7
JS
18449 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX ||
18450 next_fcf_index == phba->fcf.current_rec.fcf_indx) {
18451 /*
18452 * If next fcf index is not found check if there are lower
18453 * Priority level fcf's in the fcf_priority list.
18454 * Set up the rr_bmask with all of the avaiable fcf bits
18455 * at that level and continue the selection process.
18456 */
18457 if (lpfc_check_next_fcf_pri_level(phba))
421c6622 18458 goto initial_priority;
3804dc84
JS
18459 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP,
18460 "2844 No roundrobin failover FCF available\n");
7d791df7
JS
18461 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX)
18462 return LPFC_FCOE_FCF_NEXT_NONE;
18463 else {
18464 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP,
18465 "3063 Only FCF available idx %d, flag %x\n",
18466 next_fcf_index,
18467 phba->fcf.fcf_pri[next_fcf_index].fcf_rec.flag);
18468 return next_fcf_index;
18469 }
3804dc84
JS
18470 }
18471
7d791df7
JS
18472 if (next_fcf_index < LPFC_SLI4_FCF_TBL_INDX_MAX &&
18473 phba->fcf.fcf_pri[next_fcf_index].fcf_rec.flag &
f5cb5304
JS
18474 LPFC_FCF_FLOGI_FAILED) {
18475 if (list_is_singular(&phba->fcf.fcf_pri_list))
18476 return LPFC_FCOE_FCF_NEXT_NONE;
18477
7d791df7 18478 goto next_priority;
f5cb5304 18479 }
7d791df7 18480
3804dc84 18481 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a
JS
18482 "2845 Get next roundrobin failover FCF (x%x)\n",
18483 next_fcf_index);
18484
0c9ab6f5
JS
18485 return next_fcf_index;
18486}
18487
18488/**
18489 * lpfc_sli4_fcf_rr_index_set - Set bmask with eligible fcf record index
18490 * @phba: pointer to lpfc hba data structure.
18491 *
18492 * This routine sets the FCF record index in to the eligible bmask for
a93ff37a 18493 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
18494 * does not go beyond the range of the driver allocated bmask dimension
18495 * before setting the bit.
18496 *
18497 * Returns 0 if the index bit successfully set, otherwise, it returns
18498 * -EINVAL.
18499 **/
18500int
18501lpfc_sli4_fcf_rr_index_set(struct lpfc_hba *phba, uint16_t fcf_index)
18502{
18503 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18504 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
18505 "2610 FCF (x%x) reached driver's book "
18506 "keeping dimension:x%x\n",
0c9ab6f5
JS
18507 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
18508 return -EINVAL;
18509 }
18510 /* Set the eligible FCF record index bmask */
18511 set_bit(fcf_index, phba->fcf.fcf_rr_bmask);
18512
3804dc84 18513 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18514 "2790 Set FCF (x%x) to roundrobin FCF failover "
3804dc84
JS
18515 "bmask\n", fcf_index);
18516
0c9ab6f5
JS
18517 return 0;
18518}
18519
18520/**
3804dc84 18521 * lpfc_sli4_fcf_rr_index_clear - Clear bmask from eligible fcf record index
0c9ab6f5
JS
18522 * @phba: pointer to lpfc hba data structure.
18523 *
18524 * This routine clears the FCF record index from the eligible bmask for
a93ff37a 18525 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
18526 * does not go beyond the range of the driver allocated bmask dimension
18527 * before clearing the bit.
18528 **/
18529void
18530lpfc_sli4_fcf_rr_index_clear(struct lpfc_hba *phba, uint16_t fcf_index)
18531{
9a803a74 18532 struct lpfc_fcf_pri *fcf_pri, *fcf_pri_next;
0c9ab6f5
JS
18533 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18534 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
18535 "2762 FCF (x%x) reached driver's book "
18536 "keeping dimension:x%x\n",
0c9ab6f5
JS
18537 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
18538 return;
18539 }
18540 /* Clear the eligible FCF record index bmask */
7d791df7 18541 spin_lock_irq(&phba->hbalock);
9a803a74
JS
18542 list_for_each_entry_safe(fcf_pri, fcf_pri_next, &phba->fcf.fcf_pri_list,
18543 list) {
7d791df7
JS
18544 if (fcf_pri->fcf_rec.fcf_index == fcf_index) {
18545 list_del_init(&fcf_pri->list);
18546 break;
18547 }
18548 }
18549 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 18550 clear_bit(fcf_index, phba->fcf.fcf_rr_bmask);
3804dc84
JS
18551
18552 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18553 "2791 Clear FCF (x%x) from roundrobin failover "
3804dc84 18554 "bmask\n", fcf_index);
0c9ab6f5
JS
18555}
18556
ecfd03c6
JS
18557/**
18558 * lpfc_mbx_cmpl_redisc_fcf_table - completion routine for rediscover FCF table
18559 * @phba: pointer to lpfc hba data structure.
18560 *
18561 * This routine is the completion routine for the rediscover FCF table mailbox
18562 * command. If the mailbox command returned failure, it will try to stop the
18563 * FCF rediscover wait timer.
18564 **/
5d8b8167 18565static void
ecfd03c6
JS
18566lpfc_mbx_cmpl_redisc_fcf_table(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
18567{
18568 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
18569 uint32_t shdr_status, shdr_add_status;
18570
18571 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
18572
18573 shdr_status = bf_get(lpfc_mbox_hdr_status,
18574 &redisc_fcf->header.cfg_shdr.response);
18575 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
18576 &redisc_fcf->header.cfg_shdr.response);
18577 if (shdr_status || shdr_add_status) {
0c9ab6f5 18578 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
ecfd03c6
JS
18579 "2746 Requesting for FCF rediscovery failed "
18580 "status x%x add_status x%x\n",
18581 shdr_status, shdr_add_status);
0c9ab6f5 18582 if (phba->fcf.fcf_flag & FCF_ACVL_DISC) {
fc2b989b 18583 spin_lock_irq(&phba->hbalock);
0c9ab6f5 18584 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b
JS
18585 spin_unlock_irq(&phba->hbalock);
18586 /*
18587 * CVL event triggered FCF rediscover request failed,
18588 * last resort to re-try current registered FCF entry.
18589 */
18590 lpfc_retry_pport_discovery(phba);
18591 } else {
18592 spin_lock_irq(&phba->hbalock);
0c9ab6f5 18593 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
fc2b989b
JS
18594 spin_unlock_irq(&phba->hbalock);
18595 /*
18596 * DEAD FCF event triggered FCF rediscover request
18597 * failed, last resort to fail over as a link down
18598 * to FCF registration.
18599 */
18600 lpfc_sli4_fcf_dead_failthrough(phba);
18601 }
0c9ab6f5
JS
18602 } else {
18603 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18604 "2775 Start FCF rediscover quiescent timer\n");
ecfd03c6
JS
18605 /*
18606 * Start FCF rediscovery wait timer for pending FCF
18607 * before rescan FCF record table.
18608 */
18609 lpfc_fcf_redisc_wait_start_timer(phba);
0c9ab6f5 18610 }
ecfd03c6
JS
18611
18612 mempool_free(mbox, phba->mbox_mem_pool);
18613}
18614
18615/**
3804dc84 18616 * lpfc_sli4_redisc_fcf_table - Request to rediscover entire FCF table by port.
ecfd03c6
JS
18617 * @phba: pointer to lpfc hba data structure.
18618 *
18619 * This routine is invoked to request for rediscovery of the entire FCF table
18620 * by the port.
18621 **/
18622int
18623lpfc_sli4_redisc_fcf_table(struct lpfc_hba *phba)
18624{
18625 LPFC_MBOXQ_t *mbox;
18626 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
18627 int rc, length;
18628
0c9ab6f5
JS
18629 /* Cancel retry delay timers to all vports before FCF rediscover */
18630 lpfc_cancel_all_vport_retry_delay_timer(phba);
18631
ecfd03c6
JS
18632 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18633 if (!mbox) {
18634 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18635 "2745 Failed to allocate mbox for "
18636 "requesting FCF rediscover.\n");
18637 return -ENOMEM;
18638 }
18639
18640 length = (sizeof(struct lpfc_mbx_redisc_fcf_tbl) -
18641 sizeof(struct lpfc_sli4_cfg_mhdr));
18642 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
18643 LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF,
18644 length, LPFC_SLI4_MBX_EMBED);
18645
18646 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
18647 /* Set count to 0 for invalidating the entire FCF database */
18648 bf_set(lpfc_mbx_redisc_fcf_count, redisc_fcf, 0);
18649
18650 /* Issue the mailbox command asynchronously */
18651 mbox->vport = phba->pport;
18652 mbox->mbox_cmpl = lpfc_mbx_cmpl_redisc_fcf_table;
18653 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
18654
18655 if (rc == MBX_NOT_FINISHED) {
18656 mempool_free(mbox, phba->mbox_mem_pool);
18657 return -EIO;
18658 }
18659 return 0;
18660}
18661
fc2b989b
JS
18662/**
18663 * lpfc_sli4_fcf_dead_failthrough - Failthrough routine to fcf dead event
18664 * @phba: pointer to lpfc hba data structure.
18665 *
18666 * This function is the failover routine as a last resort to the FCF DEAD
18667 * event when driver failed to perform fast FCF failover.
18668 **/
18669void
18670lpfc_sli4_fcf_dead_failthrough(struct lpfc_hba *phba)
18671{
18672 uint32_t link_state;
18673
18674 /*
18675 * Last resort as FCF DEAD event failover will treat this as
18676 * a link down, but save the link state because we don't want
18677 * it to be changed to Link Down unless it is already down.
18678 */
18679 link_state = phba->link_state;
18680 lpfc_linkdown(phba);
18681 phba->link_state = link_state;
18682
18683 /* Unregister FCF if no devices connected to it */
18684 lpfc_unregister_unused_fcf(phba);
18685}
18686
a0c87cbd 18687/**
026abb87 18688 * lpfc_sli_get_config_region23 - Get sli3 port region 23 data.
a0c87cbd 18689 * @phba: pointer to lpfc hba data structure.
026abb87 18690 * @rgn23_data: pointer to configure region 23 data.
a0c87cbd 18691 *
026abb87
JS
18692 * This function gets SLI3 port configure region 23 data through memory dump
18693 * mailbox command. When it successfully retrieves data, the size of the data
18694 * will be returned, otherwise, 0 will be returned.
a0c87cbd 18695 **/
026abb87
JS
18696static uint32_t
18697lpfc_sli_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
a0c87cbd
JS
18698{
18699 LPFC_MBOXQ_t *pmb = NULL;
18700 MAILBOX_t *mb;
026abb87 18701 uint32_t offset = 0;
a0c87cbd
JS
18702 int rc;
18703
026abb87
JS
18704 if (!rgn23_data)
18705 return 0;
18706
a0c87cbd
JS
18707 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18708 if (!pmb) {
18709 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
026abb87
JS
18710 "2600 failed to allocate mailbox memory\n");
18711 return 0;
a0c87cbd
JS
18712 }
18713 mb = &pmb->u.mb;
18714
a0c87cbd
JS
18715 do {
18716 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_23);
18717 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
18718
18719 if (rc != MBX_SUCCESS) {
18720 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
026abb87
JS
18721 "2601 failed to read config "
18722 "region 23, rc 0x%x Status 0x%x\n",
18723 rc, mb->mbxStatus);
a0c87cbd
JS
18724 mb->un.varDmp.word_cnt = 0;
18725 }
18726 /*
18727 * dump mem may return a zero when finished or we got a
18728 * mailbox error, either way we are done.
18729 */
18730 if (mb->un.varDmp.word_cnt == 0)
18731 break;
18732 if (mb->un.varDmp.word_cnt > DMP_RGN23_SIZE - offset)
18733 mb->un.varDmp.word_cnt = DMP_RGN23_SIZE - offset;
18734
18735 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
026abb87
JS
18736 rgn23_data + offset,
18737 mb->un.varDmp.word_cnt);
a0c87cbd
JS
18738 offset += mb->un.varDmp.word_cnt;
18739 } while (mb->un.varDmp.word_cnt && offset < DMP_RGN23_SIZE);
18740
026abb87
JS
18741 mempool_free(pmb, phba->mbox_mem_pool);
18742 return offset;
18743}
18744
18745/**
18746 * lpfc_sli4_get_config_region23 - Get sli4 port region 23 data.
18747 * @phba: pointer to lpfc hba data structure.
18748 * @rgn23_data: pointer to configure region 23 data.
18749 *
18750 * This function gets SLI4 port configure region 23 data through memory dump
18751 * mailbox command. When it successfully retrieves data, the size of the data
18752 * will be returned, otherwise, 0 will be returned.
18753 **/
18754static uint32_t
18755lpfc_sli4_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
18756{
18757 LPFC_MBOXQ_t *mboxq = NULL;
18758 struct lpfc_dmabuf *mp = NULL;
18759 struct lpfc_mqe *mqe;
18760 uint32_t data_length = 0;
18761 int rc;
18762
18763 if (!rgn23_data)
18764 return 0;
18765
18766 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18767 if (!mboxq) {
18768 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18769 "3105 failed to allocate mailbox memory\n");
18770 return 0;
18771 }
18772
18773 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq))
18774 goto out;
18775 mqe = &mboxq->u.mqe;
18776 mp = (struct lpfc_dmabuf *) mboxq->context1;
18777 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
18778 if (rc)
18779 goto out;
18780 data_length = mqe->un.mb_words[5];
18781 if (data_length == 0)
18782 goto out;
18783 if (data_length > DMP_RGN23_SIZE) {
18784 data_length = 0;
18785 goto out;
18786 }
18787 lpfc_sli_pcimem_bcopy((char *)mp->virt, rgn23_data, data_length);
18788out:
18789 mempool_free(mboxq, phba->mbox_mem_pool);
18790 if (mp) {
18791 lpfc_mbuf_free(phba, mp->virt, mp->phys);
18792 kfree(mp);
18793 }
18794 return data_length;
18795}
18796
18797/**
18798 * lpfc_sli_read_link_ste - Read region 23 to decide if link is disabled.
18799 * @phba: pointer to lpfc hba data structure.
18800 *
18801 * This function read region 23 and parse TLV for port status to
18802 * decide if the user disaled the port. If the TLV indicates the
18803 * port is disabled, the hba_flag is set accordingly.
18804 **/
18805void
18806lpfc_sli_read_link_ste(struct lpfc_hba *phba)
18807{
18808 uint8_t *rgn23_data = NULL;
18809 uint32_t if_type, data_size, sub_tlv_len, tlv_offset;
18810 uint32_t offset = 0;
18811
18812 /* Get adapter Region 23 data */
18813 rgn23_data = kzalloc(DMP_RGN23_SIZE, GFP_KERNEL);
18814 if (!rgn23_data)
18815 goto out;
18816
18817 if (phba->sli_rev < LPFC_SLI_REV4)
18818 data_size = lpfc_sli_get_config_region23(phba, rgn23_data);
18819 else {
18820 if_type = bf_get(lpfc_sli_intf_if_type,
18821 &phba->sli4_hba.sli_intf);
18822 if (if_type == LPFC_SLI_INTF_IF_TYPE_0)
18823 goto out;
18824 data_size = lpfc_sli4_get_config_region23(phba, rgn23_data);
18825 }
a0c87cbd
JS
18826
18827 if (!data_size)
18828 goto out;
18829
18830 /* Check the region signature first */
18831 if (memcmp(&rgn23_data[offset], LPFC_REGION23_SIGNATURE, 4)) {
18832 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18833 "2619 Config region 23 has bad signature\n");
18834 goto out;
18835 }
18836 offset += 4;
18837
18838 /* Check the data structure version */
18839 if (rgn23_data[offset] != LPFC_REGION23_VERSION) {
18840 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18841 "2620 Config region 23 has bad version\n");
18842 goto out;
18843 }
18844 offset += 4;
18845
18846 /* Parse TLV entries in the region */
18847 while (offset < data_size) {
18848 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC)
18849 break;
18850 /*
18851 * If the TLV is not driver specific TLV or driver id is
18852 * not linux driver id, skip the record.
18853 */
18854 if ((rgn23_data[offset] != DRIVER_SPECIFIC_TYPE) ||
18855 (rgn23_data[offset + 2] != LINUX_DRIVER_ID) ||
18856 (rgn23_data[offset + 3] != 0)) {
18857 offset += rgn23_data[offset + 1] * 4 + 4;
18858 continue;
18859 }
18860
18861 /* Driver found a driver specific TLV in the config region */
18862 sub_tlv_len = rgn23_data[offset + 1] * 4;
18863 offset += 4;
18864 tlv_offset = 0;
18865
18866 /*
18867 * Search for configured port state sub-TLV.
18868 */
18869 while ((offset < data_size) &&
18870 (tlv_offset < sub_tlv_len)) {
18871 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC) {
18872 offset += 4;
18873 tlv_offset += 4;
18874 break;
18875 }
18876 if (rgn23_data[offset] != PORT_STE_TYPE) {
18877 offset += rgn23_data[offset + 1] * 4 + 4;
18878 tlv_offset += rgn23_data[offset + 1] * 4 + 4;
18879 continue;
18880 }
18881
18882 /* This HBA contains PORT_STE configured */
18883 if (!rgn23_data[offset + 2])
18884 phba->hba_flag |= LINK_DISABLED;
18885
18886 goto out;
18887 }
18888 }
026abb87 18889
a0c87cbd 18890out:
a0c87cbd
JS
18891 kfree(rgn23_data);
18892 return;
18893}
695a814e 18894
52d52440
JS
18895/**
18896 * lpfc_wr_object - write an object to the firmware
18897 * @phba: HBA structure that indicates port to create a queue on.
18898 * @dmabuf_list: list of dmabufs to write to the port.
18899 * @size: the total byte value of the objects to write to the port.
18900 * @offset: the current offset to be used to start the transfer.
18901 *
18902 * This routine will create a wr_object mailbox command to send to the port.
18903 * the mailbox command will be constructed using the dma buffers described in
18904 * @dmabuf_list to create a list of BDEs. This routine will fill in as many
18905 * BDEs that the imbedded mailbox can support. The @offset variable will be
18906 * used to indicate the starting offset of the transfer and will also return
18907 * the offset after the write object mailbox has completed. @size is used to
18908 * determine the end of the object and whether the eof bit should be set.
18909 *
18910 * Return 0 is successful and offset will contain the the new offset to use
18911 * for the next write.
18912 * Return negative value for error cases.
18913 **/
18914int
18915lpfc_wr_object(struct lpfc_hba *phba, struct list_head *dmabuf_list,
18916 uint32_t size, uint32_t *offset)
18917{
18918 struct lpfc_mbx_wr_object *wr_object;
18919 LPFC_MBOXQ_t *mbox;
18920 int rc = 0, i = 0;
18921 uint32_t shdr_status, shdr_add_status;
18922 uint32_t mbox_tmo;
18923 union lpfc_sli4_cfg_shdr *shdr;
18924 struct lpfc_dmabuf *dmabuf;
18925 uint32_t written = 0;
18926
18927 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18928 if (!mbox)
18929 return -ENOMEM;
18930
18931 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
18932 LPFC_MBOX_OPCODE_WRITE_OBJECT,
18933 sizeof(struct lpfc_mbx_wr_object) -
18934 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
18935
18936 wr_object = (struct lpfc_mbx_wr_object *)&mbox->u.mqe.un.wr_object;
18937 wr_object->u.request.write_offset = *offset;
18938 sprintf((uint8_t *)wr_object->u.request.object_name, "/");
18939 wr_object->u.request.object_name[0] =
18940 cpu_to_le32(wr_object->u.request.object_name[0]);
18941 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 0);
18942 list_for_each_entry(dmabuf, dmabuf_list, list) {
18943 if (i >= LPFC_MBX_WR_CONFIG_MAX_BDE || written >= size)
18944 break;
18945 wr_object->u.request.bde[i].addrLow = putPaddrLow(dmabuf->phys);
18946 wr_object->u.request.bde[i].addrHigh =
18947 putPaddrHigh(dmabuf->phys);
18948 if (written + SLI4_PAGE_SIZE >= size) {
18949 wr_object->u.request.bde[i].tus.f.bdeSize =
18950 (size - written);
18951 written += (size - written);
18952 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 1);
18953 } else {
18954 wr_object->u.request.bde[i].tus.f.bdeSize =
18955 SLI4_PAGE_SIZE;
18956 written += SLI4_PAGE_SIZE;
18957 }
18958 i++;
18959 }
18960 wr_object->u.request.bde_count = i;
18961 bf_set(lpfc_wr_object_write_length, &wr_object->u.request, written);
18962 if (!phba->sli4_hba.intr_enable)
18963 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
18964 else {
a183a15f 18965 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
52d52440
JS
18966 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
18967 }
18968 /* The IOCTL status is embedded in the mailbox subheader. */
18969 shdr = (union lpfc_sli4_cfg_shdr *) &wr_object->header.cfg_shdr;
18970 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18971 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18972 if (rc != MBX_TIMEOUT)
18973 mempool_free(mbox, phba->mbox_mem_pool);
18974 if (shdr_status || shdr_add_status || rc) {
18975 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18976 "3025 Write Object mailbox failed with "
18977 "status x%x add_status x%x, mbx status x%x\n",
18978 shdr_status, shdr_add_status, rc);
18979 rc = -ENXIO;
1feb8204 18980 *offset = shdr_add_status;
52d52440
JS
18981 } else
18982 *offset += wr_object->u.response.actual_write_length;
18983 return rc;
18984}
18985
695a814e
JS
18986/**
18987 * lpfc_cleanup_pending_mbox - Free up vport discovery mailbox commands.
18988 * @vport: pointer to vport data structure.
18989 *
18990 * This function iterate through the mailboxq and clean up all REG_LOGIN
18991 * and REG_VPI mailbox commands associated with the vport. This function
18992 * is called when driver want to restart discovery of the vport due to
18993 * a Clear Virtual Link event.
18994 **/
18995void
18996lpfc_cleanup_pending_mbox(struct lpfc_vport *vport)
18997{
18998 struct lpfc_hba *phba = vport->phba;
18999 LPFC_MBOXQ_t *mb, *nextmb;
19000 struct lpfc_dmabuf *mp;
78730cfe 19001 struct lpfc_nodelist *ndlp;
d439d286 19002 struct lpfc_nodelist *act_mbx_ndlp = NULL;
589a52d6 19003 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
d439d286 19004 LIST_HEAD(mbox_cmd_list);
63e801ce 19005 uint8_t restart_loop;
695a814e 19006
d439d286 19007 /* Clean up internally queued mailbox commands with the vport */
695a814e
JS
19008 spin_lock_irq(&phba->hbalock);
19009 list_for_each_entry_safe(mb, nextmb, &phba->sli.mboxq, list) {
19010 if (mb->vport != vport)
19011 continue;
19012
19013 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19014 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19015 continue;
19016
d439d286
JS
19017 list_del(&mb->list);
19018 list_add_tail(&mb->list, &mbox_cmd_list);
19019 }
19020 /* Clean up active mailbox command with the vport */
19021 mb = phba->sli.mbox_active;
19022 if (mb && (mb->vport == vport)) {
19023 if ((mb->u.mb.mbxCommand == MBX_REG_LOGIN64) ||
19024 (mb->u.mb.mbxCommand == MBX_REG_VPI))
19025 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19026 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
19027 act_mbx_ndlp = (struct lpfc_nodelist *)mb->context2;
19028 /* Put reference count for delayed processing */
19029 act_mbx_ndlp = lpfc_nlp_get(act_mbx_ndlp);
19030 /* Unregister the RPI when mailbox complete */
19031 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19032 }
19033 }
63e801ce
JS
19034 /* Cleanup any mailbox completions which are not yet processed */
19035 do {
19036 restart_loop = 0;
19037 list_for_each_entry(mb, &phba->sli.mboxq_cmpl, list) {
19038 /*
19039 * If this mailox is already processed or it is
19040 * for another vport ignore it.
19041 */
19042 if ((mb->vport != vport) ||
19043 (mb->mbox_flag & LPFC_MBX_IMED_UNREG))
19044 continue;
19045
19046 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19047 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19048 continue;
19049
19050 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19051 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
19052 ndlp = (struct lpfc_nodelist *)mb->context2;
19053 /* Unregister the RPI when mailbox complete */
19054 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19055 restart_loop = 1;
19056 spin_unlock_irq(&phba->hbalock);
19057 spin_lock(shost->host_lock);
19058 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19059 spin_unlock(shost->host_lock);
19060 spin_lock_irq(&phba->hbalock);
19061 break;
19062 }
19063 }
19064 } while (restart_loop);
19065
d439d286
JS
19066 spin_unlock_irq(&phba->hbalock);
19067
19068 /* Release the cleaned-up mailbox commands */
19069 while (!list_empty(&mbox_cmd_list)) {
19070 list_remove_head(&mbox_cmd_list, mb, LPFC_MBOXQ_t, list);
695a814e
JS
19071 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
19072 mp = (struct lpfc_dmabuf *) (mb->context1);
19073 if (mp) {
19074 __lpfc_mbuf_free(phba, mp->virt, mp->phys);
19075 kfree(mp);
19076 }
78730cfe 19077 ndlp = (struct lpfc_nodelist *) mb->context2;
d439d286 19078 mb->context2 = NULL;
78730cfe 19079 if (ndlp) {
ec21b3b0 19080 spin_lock(shost->host_lock);
589a52d6 19081 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
ec21b3b0 19082 spin_unlock(shost->host_lock);
78730cfe 19083 lpfc_nlp_put(ndlp);
78730cfe 19084 }
695a814e 19085 }
695a814e
JS
19086 mempool_free(mb, phba->mbox_mem_pool);
19087 }
d439d286
JS
19088
19089 /* Release the ndlp with the cleaned-up active mailbox command */
19090 if (act_mbx_ndlp) {
19091 spin_lock(shost->host_lock);
19092 act_mbx_ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19093 spin_unlock(shost->host_lock);
19094 lpfc_nlp_put(act_mbx_ndlp);
695a814e 19095 }
695a814e
JS
19096}
19097
2a9bf3d0
JS
19098/**
19099 * lpfc_drain_txq - Drain the txq
19100 * @phba: Pointer to HBA context object.
19101 *
19102 * This function attempt to submit IOCBs on the txq
19103 * to the adapter. For SLI4 adapters, the txq contains
19104 * ELS IOCBs that have been deferred because the there
19105 * are no SGLs. This congestion can occur with large
19106 * vport counts during node discovery.
19107 **/
19108
19109uint32_t
19110lpfc_drain_txq(struct lpfc_hba *phba)
19111{
19112 LIST_HEAD(completions);
895427bd 19113 struct lpfc_sli_ring *pring;
2e706377 19114 struct lpfc_iocbq *piocbq = NULL;
2a9bf3d0
JS
19115 unsigned long iflags = 0;
19116 char *fail_msg = NULL;
19117 struct lpfc_sglq *sglq;
205e8240 19118 union lpfc_wqe128 wqe;
a2fc4aef 19119 uint32_t txq_cnt = 0;
dc19e3b4 19120 struct lpfc_queue *wq;
2a9bf3d0 19121
dc19e3b4
JS
19122 if (phba->link_flag & LS_MDS_LOOPBACK) {
19123 /* MDS WQE are posted only to first WQ*/
19124 wq = phba->sli4_hba.fcp_wq[0];
19125 if (unlikely(!wq))
19126 return 0;
19127 pring = wq->pring;
19128 } else {
19129 wq = phba->sli4_hba.els_wq;
19130 if (unlikely(!wq))
19131 return 0;
19132 pring = lpfc_phba_elsring(phba);
19133 }
19134
19135 if (unlikely(!pring) || list_empty(&pring->txq))
1234a6d5 19136 return 0;
895427bd 19137
398d81c9 19138 spin_lock_irqsave(&pring->ring_lock, iflags);
0e9bb8d7
JS
19139 list_for_each_entry(piocbq, &pring->txq, list) {
19140 txq_cnt++;
19141 }
19142
19143 if (txq_cnt > pring->txq_max)
19144 pring->txq_max = txq_cnt;
2a9bf3d0 19145
398d81c9 19146 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19147
0e9bb8d7 19148 while (!list_empty(&pring->txq)) {
398d81c9 19149 spin_lock_irqsave(&pring->ring_lock, iflags);
2a9bf3d0 19150
19ca7609 19151 piocbq = lpfc_sli_ringtx_get(phba, pring);
a629852a 19152 if (!piocbq) {
398d81c9 19153 spin_unlock_irqrestore(&pring->ring_lock, iflags);
a629852a
JS
19154 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19155 "2823 txq empty and txq_cnt is %d\n ",
0e9bb8d7 19156 txq_cnt);
a629852a
JS
19157 break;
19158 }
895427bd 19159 sglq = __lpfc_sli_get_els_sglq(phba, piocbq);
2a9bf3d0 19160 if (!sglq) {
19ca7609 19161 __lpfc_sli_ringtx_put(phba, pring, piocbq);
398d81c9 19162 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19163 break;
2a9bf3d0 19164 }
0e9bb8d7 19165 txq_cnt--;
2a9bf3d0
JS
19166
19167 /* The xri and iocb resources secured,
19168 * attempt to issue request
19169 */
6d368e53 19170 piocbq->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0
JS
19171 piocbq->sli4_xritag = sglq->sli4_xritag;
19172 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocbq, sglq))
19173 fail_msg = "to convert bpl to sgl";
205e8240 19174 else if (lpfc_sli4_iocb2wqe(phba, piocbq, &wqe))
2a9bf3d0 19175 fail_msg = "to convert iocb to wqe";
dc19e3b4 19176 else if (lpfc_sli4_wq_put(wq, &wqe))
2a9bf3d0
JS
19177 fail_msg = " - Wq is full";
19178 else
19179 lpfc_sli_ringtxcmpl_put(phba, pring, piocbq);
19180
19181 if (fail_msg) {
19182 /* Failed means we can't issue and need to cancel */
19183 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19184 "2822 IOCB failed %s iotag 0x%x "
19185 "xri 0x%x\n",
19186 fail_msg,
19187 piocbq->iotag, piocbq->sli4_xritag);
19188 list_add_tail(&piocbq->list, &completions);
19189 }
398d81c9 19190 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0
JS
19191 }
19192
2a9bf3d0
JS
19193 /* Cancel all the IOCBs that cannot be issued */
19194 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
19195 IOERR_SLI_ABORTED);
19196
0e9bb8d7 19197 return txq_cnt;
2a9bf3d0 19198}
895427bd
JS
19199
19200/**
19201 * lpfc_wqe_bpl2sgl - Convert the bpl/bde to a sgl.
19202 * @phba: Pointer to HBA context object.
19203 * @pwqe: Pointer to command WQE.
19204 * @sglq: Pointer to the scatter gather queue object.
19205 *
19206 * This routine converts the bpl or bde that is in the WQE
19207 * to a sgl list for the sli4 hardware. The physical address
19208 * of the bpl/bde is converted back to a virtual address.
19209 * If the WQE contains a BPL then the list of BDE's is
19210 * converted to sli4_sge's. If the WQE contains a single
19211 * BDE then it is converted to a single sli_sge.
19212 * The WQE is still in cpu endianness so the contents of
19213 * the bpl can be used without byte swapping.
19214 *
19215 * Returns valid XRI = Success, NO_XRI = Failure.
19216 */
19217static uint16_t
19218lpfc_wqe_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *pwqeq,
19219 struct lpfc_sglq *sglq)
19220{
19221 uint16_t xritag = NO_XRI;
19222 struct ulp_bde64 *bpl = NULL;
19223 struct ulp_bde64 bde;
19224 struct sli4_sge *sgl = NULL;
19225 struct lpfc_dmabuf *dmabuf;
205e8240 19226 union lpfc_wqe128 *wqe;
895427bd
JS
19227 int numBdes = 0;
19228 int i = 0;
19229 uint32_t offset = 0; /* accumulated offset in the sg request list */
19230 int inbound = 0; /* number of sg reply entries inbound from firmware */
19231 uint32_t cmd;
19232
19233 if (!pwqeq || !sglq)
19234 return xritag;
19235
19236 sgl = (struct sli4_sge *)sglq->sgl;
19237 wqe = &pwqeq->wqe;
19238 pwqeq->iocb.ulpIoTag = pwqeq->iotag;
19239
19240 cmd = bf_get(wqe_cmnd, &wqe->generic.wqe_com);
19241 if (cmd == CMD_XMIT_BLS_RSP64_WQE)
19242 return sglq->sli4_xritag;
19243 numBdes = pwqeq->rsvd2;
19244 if (numBdes) {
19245 /* The addrHigh and addrLow fields within the WQE
19246 * have not been byteswapped yet so there is no
19247 * need to swap them back.
19248 */
19249 if (pwqeq->context3)
19250 dmabuf = (struct lpfc_dmabuf *)pwqeq->context3;
19251 else
19252 return xritag;
19253
19254 bpl = (struct ulp_bde64 *)dmabuf->virt;
19255 if (!bpl)
19256 return xritag;
19257
19258 for (i = 0; i < numBdes; i++) {
19259 /* Should already be byte swapped. */
19260 sgl->addr_hi = bpl->addrHigh;
19261 sgl->addr_lo = bpl->addrLow;
19262
19263 sgl->word2 = le32_to_cpu(sgl->word2);
19264 if ((i+1) == numBdes)
19265 bf_set(lpfc_sli4_sge_last, sgl, 1);
19266 else
19267 bf_set(lpfc_sli4_sge_last, sgl, 0);
19268 /* swap the size field back to the cpu so we
19269 * can assign it to the sgl.
19270 */
19271 bde.tus.w = le32_to_cpu(bpl->tus.w);
19272 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
19273 /* The offsets in the sgl need to be accumulated
19274 * separately for the request and reply lists.
19275 * The request is always first, the reply follows.
19276 */
19277 switch (cmd) {
19278 case CMD_GEN_REQUEST64_WQE:
19279 /* add up the reply sg entries */
19280 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
19281 inbound++;
19282 /* first inbound? reset the offset */
19283 if (inbound == 1)
19284 offset = 0;
19285 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19286 bf_set(lpfc_sli4_sge_type, sgl,
19287 LPFC_SGE_TYPE_DATA);
19288 offset += bde.tus.f.bdeSize;
19289 break;
19290 case CMD_FCP_TRSP64_WQE:
19291 bf_set(lpfc_sli4_sge_offset, sgl, 0);
19292 bf_set(lpfc_sli4_sge_type, sgl,
19293 LPFC_SGE_TYPE_DATA);
19294 break;
19295 case CMD_FCP_TSEND64_WQE:
19296 case CMD_FCP_TRECEIVE64_WQE:
19297 bf_set(lpfc_sli4_sge_type, sgl,
19298 bpl->tus.f.bdeFlags);
19299 if (i < 3)
19300 offset = 0;
19301 else
19302 offset += bde.tus.f.bdeSize;
19303 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19304 break;
19305 }
19306 sgl->word2 = cpu_to_le32(sgl->word2);
19307 bpl++;
19308 sgl++;
19309 }
19310 } else if (wqe->gen_req.bde.tus.f.bdeFlags == BUFF_TYPE_BDE_64) {
19311 /* The addrHigh and addrLow fields of the BDE have not
19312 * been byteswapped yet so they need to be swapped
19313 * before putting them in the sgl.
19314 */
19315 sgl->addr_hi = cpu_to_le32(wqe->gen_req.bde.addrHigh);
19316 sgl->addr_lo = cpu_to_le32(wqe->gen_req.bde.addrLow);
19317 sgl->word2 = le32_to_cpu(sgl->word2);
19318 bf_set(lpfc_sli4_sge_last, sgl, 1);
19319 sgl->word2 = cpu_to_le32(sgl->word2);
19320 sgl->sge_len = cpu_to_le32(wqe->gen_req.bde.tus.f.bdeSize);
19321 }
19322 return sglq->sli4_xritag;
19323}
19324
19325/**
19326 * lpfc_sli4_issue_wqe - Issue an SLI4 Work Queue Entry (WQE)
19327 * @phba: Pointer to HBA context object.
19328 * @ring_number: Base sli ring number
19329 * @pwqe: Pointer to command WQE.
19330 **/
19331int
19332lpfc_sli4_issue_wqe(struct lpfc_hba *phba, uint32_t ring_number,
19333 struct lpfc_iocbq *pwqe)
19334{
205e8240 19335 union lpfc_wqe128 *wqe = &pwqe->wqe;
f358dd0c 19336 struct lpfc_nvmet_rcv_ctx *ctxp;
895427bd
JS
19337 struct lpfc_queue *wq;
19338 struct lpfc_sglq *sglq;
19339 struct lpfc_sli_ring *pring;
19340 unsigned long iflags;
cd22d605 19341 uint32_t ret = 0;
895427bd
JS
19342
19343 /* NVME_LS and NVME_LS ABTS requests. */
19344 if (pwqe->iocb_flag & LPFC_IO_NVME_LS) {
19345 pring = phba->sli4_hba.nvmels_wq->pring;
19346 spin_lock_irqsave(&pring->ring_lock, iflags);
19347 sglq = __lpfc_sli_get_els_sglq(phba, pwqe);
19348 if (!sglq) {
19349 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19350 return WQE_BUSY;
19351 }
19352 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19353 pwqe->sli4_xritag = sglq->sli4_xritag;
19354 if (lpfc_wqe_bpl2sgl(phba, pwqe, sglq) == NO_XRI) {
19355 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19356 return WQE_ERROR;
19357 }
19358 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19359 pwqe->sli4_xritag);
cd22d605
DK
19360 ret = lpfc_sli4_wq_put(phba->sli4_hba.nvmels_wq, wqe);
19361 if (ret) {
895427bd 19362 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19363 return ret;
895427bd 19364 }
cd22d605 19365
895427bd
JS
19366 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19367 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19368 return 0;
19369 }
19370
19371 /* NVME_FCREQ and NVME_ABTS requests */
19372 if (pwqe->iocb_flag & LPFC_IO_NVME) {
19373 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
19374 pring = phba->sli4_hba.nvme_wq[pwqe->hba_wqidx]->pring;
19375
19376 spin_lock_irqsave(&pring->ring_lock, iflags);
19377 wq = phba->sli4_hba.nvme_wq[pwqe->hba_wqidx];
19378 bf_set(wqe_cqid, &wqe->generic.wqe_com,
19379 phba->sli4_hba.nvme_cq[pwqe->hba_wqidx]->queue_id);
cd22d605
DK
19380 ret = lpfc_sli4_wq_put(wq, wqe);
19381 if (ret) {
895427bd 19382 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19383 return ret;
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JS
19384 }
19385 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19386 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19387 return 0;
19388 }
19389
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JS
19390 /* NVMET requests */
19391 if (pwqe->iocb_flag & LPFC_IO_NVMET) {
19392 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
19393 pring = phba->sli4_hba.nvme_wq[pwqe->hba_wqidx]->pring;
19394
19395 spin_lock_irqsave(&pring->ring_lock, iflags);
19396 ctxp = pwqe->context2;
6c621a22 19397 sglq = ctxp->ctxbuf->sglq;
f358dd0c
JS
19398 if (pwqe->sli4_xritag == NO_XRI) {
19399 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19400 pwqe->sli4_xritag = sglq->sli4_xritag;
19401 }
19402 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19403 pwqe->sli4_xritag);
19404 wq = phba->sli4_hba.nvme_wq[pwqe->hba_wqidx];
19405 bf_set(wqe_cqid, &wqe->generic.wqe_com,
19406 phba->sli4_hba.nvme_cq[pwqe->hba_wqidx]->queue_id);
cd22d605
DK
19407 ret = lpfc_sli4_wq_put(wq, wqe);
19408 if (ret) {
f358dd0c 19409 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19410 return ret;
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JS
19411 }
19412 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19413 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19414 return 0;
19415 }
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JS
19416 return WQE_ERROR;
19417}