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[SCSI] lpfc 8.2.6 : Multiple discovery fixes
[mirror_ubuntu-eoan-kernel.git] / drivers / scsi / lpfc / lpfc_sli.c
CommitLineData
dea3101e
JB		 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
1b32f6aa 4 * Copyright (C) 2004-2008 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB		 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e
JB		 20 *******************************************************************/
21
dea3101e
JB		 22#include <linux/blkdev.h>
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26
91886523 27#include <scsi/scsi.h>
dea3101e
JB		 28#include <scsi/scsi_cmnd.h>
29#include <scsi/scsi_device.h>
30#include <scsi/scsi_host.h>
f888ba3c 31#include <scsi/scsi_transport_fc.h>
dea3101e
JB		 32
33#include "lpfc_hw.h"
34#include "lpfc_sli.h"
35#include "lpfc_disc.h"
36#include "lpfc_scsi.h"
37#include "lpfc.h"
38#include "lpfc_crtn.h"
39#include "lpfc_logmsg.h"
40#include "lpfc_compat.h"
858c9f6c 41#include "lpfc_debugfs.h"
dea3101e
JB		 42
43/*
44 * Define macro to log: Mailbox command x%x cannot issue Data
45 * This allows multiple uses of lpfc_msgBlk0311
46 * w/o perturbing log msg utility.
47 */
92d7f7b0 48#define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
dea3101e
JB		 49 lpfc_printf_log(phba, \
50 KERN_INFO, \
51 LOG_MBOX | LOG_SLI, \
e8b62011 52 "(%d):0311 Mailbox command x%x cannot " \
92d7f7b0 53 "issue Data: x%x x%x x%x\n", \
92d7f7b0
JS		 54 pmbox->vport ? pmbox->vport->vpi : 0, \
55 pmbox->mb.mbxCommand, \
2e0fef85 56 phba->pport->port_state, \
dea3101e 57 psli->sli_flag, \
2e0fef85 58 flag)
dea3101e
JB		 59
60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
92d7f7b0
JS		 69 /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
70 * to the start of the ring, and the slot number of the
71 * desired iocb entry, calc a pointer to that entry.
72 */
ed957684
JS		 73static inline IOCB_t *
74lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
75{
76 return (IOCB_t *) (((char *) pring->cmdringaddr) +
77 pring->cmdidx * phba->iocb_cmd_size);
78}
79
80static inline IOCB_t *
81lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
82{
83 return (IOCB_t *) (((char *) pring->rspringaddr) +
84 pring->rspidx * phba->iocb_rsp_size);
85}
86
2e0fef85
JS		 87static struct lpfc_iocbq *
88__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC		 89{
90 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
91 struct lpfc_iocbq * iocbq = NULL;
92
93 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
94 return iocbq;
95}
96
2e0fef85
JS		 97struct lpfc_iocbq *
98lpfc_sli_get_iocbq(struct lpfc_hba *phba)
99{
100 struct lpfc_iocbq * iocbq = NULL;
101 unsigned long iflags;
102
103 spin_lock_irqsave(&phba->hbalock, iflags);
104 iocbq = __lpfc_sli_get_iocbq(phba);
105 spin_unlock_irqrestore(&phba->hbalock, iflags);
106 return iocbq;
107}
108
a6ababd2 109static void
2e0fef85 110__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 111{
2e0fef85 112 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30
JB		 113
114 /*
115 * Clean all volatile data fields, preserve iotag and node struct.
116 */
117 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
118 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
119}
120
2e0fef85
JS		 121void
122lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
123{
124 unsigned long iflags;
125
126 /*
127 * Clean all volatile data fields, preserve iotag and node struct.
128 */
129 spin_lock_irqsave(&phba->hbalock, iflags);
130 __lpfc_sli_release_iocbq(phba, iocbq);
131 spin_unlock_irqrestore(&phba->hbalock, iflags);
132}
133
dea3101e
JB		 134/*
135 * Translate the iocb command to an iocb command type used to decide the final
136 * disposition of each completed IOCB.
137 */
138static lpfc_iocb_type
139lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
140{
141 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
142
143 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
144 return 0;
145
146 switch (iocb_cmnd) {
147 case CMD_XMIT_SEQUENCE_CR:
148 case CMD_XMIT_SEQUENCE_CX:
149 case CMD_XMIT_BCAST_CN:
150 case CMD_XMIT_BCAST_CX:
151 case CMD_ELS_REQUEST_CR:
152 case CMD_ELS_REQUEST_CX:
153 case CMD_CREATE_XRI_CR:
154 case CMD_CREATE_XRI_CX:
155 case CMD_GET_RPI_CN:
156 case CMD_XMIT_ELS_RSP_CX:
157 case CMD_GET_RPI_CR:
158 case CMD_FCP_IWRITE_CR:
159 case CMD_FCP_IWRITE_CX:
160 case CMD_FCP_IREAD_CR:
161 case CMD_FCP_IREAD_CX:
162 case CMD_FCP_ICMND_CR:
163 case CMD_FCP_ICMND_CX:
f5603511
JS		 164 case CMD_FCP_TSEND_CX:
165 case CMD_FCP_TRSP_CX:
166 case CMD_FCP_TRECEIVE_CX:
167 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB		 168 case CMD_ADAPTER_MSG:
169 case CMD_ADAPTER_DUMP:
170 case CMD_XMIT_SEQUENCE64_CR:
171 case CMD_XMIT_SEQUENCE64_CX:
172 case CMD_XMIT_BCAST64_CN:
173 case CMD_XMIT_BCAST64_CX:
174 case CMD_ELS_REQUEST64_CR:
175 case CMD_ELS_REQUEST64_CX:
176 case CMD_FCP_IWRITE64_CR:
177 case CMD_FCP_IWRITE64_CX:
178 case CMD_FCP_IREAD64_CR:
179 case CMD_FCP_IREAD64_CX:
180 case CMD_FCP_ICMND64_CR:
181 case CMD_FCP_ICMND64_CX:
f5603511
JS		 182 case CMD_FCP_TSEND64_CX:
183 case CMD_FCP_TRSP64_CX:
184 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB		 185 case CMD_GEN_REQUEST64_CR:
186 case CMD_GEN_REQUEST64_CX:
187 case CMD_XMIT_ELS_RSP64_CX:
188 type = LPFC_SOL_IOCB;
189 break;
190 case CMD_ABORT_XRI_CN:
191 case CMD_ABORT_XRI_CX:
192 case CMD_CLOSE_XRI_CN:
193 case CMD_CLOSE_XRI_CX:
194 case CMD_XRI_ABORTED_CX:
195 case CMD_ABORT_MXRI64_CN:
196 type = LPFC_ABORT_IOCB;
197 break;
198 case CMD_RCV_SEQUENCE_CX:
199 case CMD_RCV_ELS_REQ_CX:
200 case CMD_RCV_SEQUENCE64_CX:
201 case CMD_RCV_ELS_REQ64_CX:
57127f15 202 case CMD_ASYNC_STATUS:
ed957684
JS		 203 case CMD_IOCB_RCV_SEQ64_CX:
204 case CMD_IOCB_RCV_ELS64_CX:
205 case CMD_IOCB_RCV_CONT64_CX:
3163f725 206 case CMD_IOCB_RET_XRI64_CX:
dea3101e
JB		 207 type = LPFC_UNSOL_IOCB;
208 break;
3163f725
JS		 209 case CMD_IOCB_XMIT_MSEQ64_CR:
210 case CMD_IOCB_XMIT_MSEQ64_CX:
211 case CMD_IOCB_RCV_SEQ_LIST64_CX:
212 case CMD_IOCB_RCV_ELS_LIST64_CX:
213 case CMD_IOCB_CLOSE_EXTENDED_CN:
214 case CMD_IOCB_ABORT_EXTENDED_CN:
215 case CMD_IOCB_RET_HBQE64_CN:
216 case CMD_IOCB_FCP_IBIDIR64_CR:
217 case CMD_IOCB_FCP_IBIDIR64_CX:
218 case CMD_IOCB_FCP_ITASKMGT64_CX:
219 case CMD_IOCB_LOGENTRY_CN:
220 case CMD_IOCB_LOGENTRY_ASYNC_CN:
221 printk("%s - Unhandled SLI-3 Command x%x\n",
222 __FUNCTION__, iocb_cmnd);
223 type = LPFC_UNKNOWN_IOCB;
224 break;
dea3101e
JB		 225 default:
226 type = LPFC_UNKNOWN_IOCB;
227 break;
228 }
229
230 return type;
231}
232
233static int
ed957684 234lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB		 235{
236 struct lpfc_sli *psli = &phba->sli;
ed957684
JS		 237 LPFC_MBOXQ_t *pmb;
238 MAILBOX_t *pmbox;
239 int i, rc, ret = 0;
dea3101e 240
ed957684
JS		 241 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
242 if (!pmb)
243 return -ENOMEM;
244 pmbox = &pmb->mb;
245 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 246 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB		 247 lpfc_config_ring(phba, i, pmb);
248 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
249 if (rc != MBX_SUCCESS) {
92d7f7b0 250 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 251 "0446 Adapter failed to init (%d), "
dea3101e
JB		 252 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
253 "ring %d\n",
e8b62011
JS		 254 rc, pmbox->mbxCommand,
255 pmbox->mbxStatus, i);
2e0fef85 256 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS		 257 ret = -ENXIO;
258 break;
dea3101e
JB		 259 }
260 }
ed957684
JS		 261 mempool_free(pmb, phba->mbox_mem_pool);
262 return ret;
dea3101e
JB		 263}
264
265static int
2e0fef85
JS		 266lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
267 struct lpfc_iocbq *piocb)
dea3101e 268{
dea3101e
JB		 269 list_add_tail(&piocb->list, &pring->txcmplq);
270 pring->txcmplq_cnt++;
92d7f7b0
JS		 271 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
272 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
273 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
274 if (!piocb->vport)
275 BUG();
276 else
277 mod_timer(&piocb->vport->els_tmofunc,
278 jiffies + HZ * (phba->fc_ratov << 1));
279 }
280
dea3101e 281
2e0fef85 282 return 0;
dea3101e
JB		 283}
284
285static struct lpfc_iocbq *
2e0fef85 286lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 287{
dea3101e
JB		 288 struct lpfc_iocbq *cmd_iocb;
289
858c9f6c
JS		 290 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
291 if (cmd_iocb != NULL)
dea3101e 292 pring->txq_cnt--;
2e0fef85 293 return cmd_iocb;
dea3101e
JB		 294}
295
296static IOCB_t *
297lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
298{
ed957684
JS		 299 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
300 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
301 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 302 uint32_t max_cmd_idx = pring->numCiocb;
dea3101e
JB		 303
304 if ((pring->next_cmdidx == pring->cmdidx) &&
305 (++pring->next_cmdidx >= max_cmd_idx))
306 pring->next_cmdidx = 0;
307
308 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
309
310 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
311
312 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
313 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 314 "0315 Ring %d issue: portCmdGet %d "
dea3101e 315 "is bigger then cmd ring %d\n",
e8b62011 316 pring->ringno,
dea3101e
JB		 317 pring->local_getidx, max_cmd_idx);
318
2e0fef85 319 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 320 /*
321 * All error attention handlers are posted to
322 * worker thread
323 */
324 phba->work_ha |= HA_ERATT;
325 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 326
327 /* hbalock should already be held */
dea3101e 328 if (phba->work_wait)
92d7f7b0 329 lpfc_worker_wake_up(phba);
dea3101e
JB		 330
331 return NULL;
332 }
333
334 if (pring->local_getidx == pring->next_cmdidx)
335 return NULL;
336 }
337
ed957684 338 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB		 339}
340
604a3e30 341uint16_t
2e0fef85 342lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 343{
2e0fef85
JS		 344 struct lpfc_iocbq **new_arr;
345 struct lpfc_iocbq **old_arr;
604a3e30
JB		 346 size_t new_len;
347 struct lpfc_sli *psli = &phba->sli;
348 uint16_t iotag;
dea3101e 349
2e0fef85 350 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 351 iotag = psli->last_iotag;
352 if(++iotag < psli->iocbq_lookup_len) {
353 psli->last_iotag = iotag;
354 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 355 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 356 iocbq->iotag = iotag;
357 return iotag;
2e0fef85 358 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB		 359 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
360 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85
JS		 361 spin_unlock_irq(&phba->hbalock);
362 new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
604a3e30
JB		 363 GFP_KERNEL);
364 if (new_arr) {
2e0fef85 365 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 366 old_arr = psli->iocbq_lookup;
367 if (new_len <= psli->iocbq_lookup_len) {
368 /* highly unprobable case */
369 kfree(new_arr);
370 iotag = psli->last_iotag;
371 if(++iotag < psli->iocbq_lookup_len) {
372 psli->last_iotag = iotag;
373 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 374 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 375 iocbq->iotag = iotag;
376 return iotag;
377 }
2e0fef85 378 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 379 return 0;
380 }
381 if (psli->iocbq_lookup)
382 memcpy(new_arr, old_arr,
383 ((psli->last_iotag + 1) *
311464ec 384 sizeof (struct lpfc_iocbq *)));
604a3e30
JB		 385 psli->iocbq_lookup = new_arr;
386 psli->iocbq_lookup_len = new_len;
387 psli->last_iotag = iotag;
388 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 389 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 390 iocbq->iotag = iotag;
391 kfree(old_arr);
392 return iotag;
393 }
8f6d98d2 394 } else
2e0fef85 395 spin_unlock_irq(&phba->hbalock);
dea3101e 396
604a3e30 397 lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
e8b62011
JS		 398 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
399 psli->last_iotag);
dea3101e 400
604a3e30 401 return 0;
dea3101e
JB		 402}
403
404static void
405lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
406 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
407{
408 /*
604a3e30 409 * Set up an iotag
dea3101e 410 */
604a3e30 411 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 412
a58cbd52
JS		 413 if (pring->ringno == LPFC_ELS_RING) {
414 lpfc_debugfs_slow_ring_trc(phba,
415 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
416 *(((uint32_t *) &nextiocb->iocb) + 4),
417 *(((uint32_t *) &nextiocb->iocb) + 6),
418 *(((uint32_t *) &nextiocb->iocb) + 7));
419 }
420
dea3101e
JB		 421 /*
422 * Issue iocb command to adapter
423 */
92d7f7b0 424 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB		 425 wmb();
426 pring->stats.iocb_cmd++;
427
428 /*
429 * If there is no completion routine to call, we can release the
430 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
431 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
432 */
433 if (nextiocb->iocb_cmpl)
434 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 435 else
2e0fef85 436 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB		 437
438 /*
439 * Let the HBA know what IOCB slot will be the next one the
440 * driver will put a command into.
441 */
442 pring->cmdidx = pring->next_cmdidx;
ed957684 443 writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB		 444}
445
446static void
2e0fef85 447lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 448{
449 int ringno = pring->ringno;
450
451 pring->flag |= LPFC_CALL_RING_AVAILABLE;
452
453 wmb();
454
455 /*
456 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
457 * The HBA will tell us when an IOCB entry is available.
458 */
459 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
460 readl(phba->CAregaddr); /* flush */
461
462 pring->stats.iocb_cmd_full++;
463}
464
465static void
2e0fef85 466lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 467{
468 int ringno = pring->ringno;
469
470 /*
471 * Tell the HBA that there is work to do in this ring.
472 */
473 wmb();
474 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
475 readl(phba->CAregaddr); /* flush */
476}
477
478static void
2e0fef85 479lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 480{
481 IOCB_t *iocb;
482 struct lpfc_iocbq *nextiocb;
483
484 /*
485 * Check to see if:
486 * (a) there is anything on the txq to send
487 * (b) link is up
488 * (c) link attention events can be processed (fcp ring only)
489 * (d) IOCB processing is not blocked by the outstanding mbox command.
490 */
491 if (pring->txq_cnt &&
2e0fef85 492 lpfc_is_link_up(phba) &&
dea3101e 493 (pring->ringno != phba->sli.fcp_ring ||
0b727fea 494 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e
JB		 495
496 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
497 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
498 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
499
500 if (iocb)
501 lpfc_sli_update_ring(phba, pring);
502 else
503 lpfc_sli_update_full_ring(phba, pring);
504 }
505
506 return;
507}
508
a6ababd2 509static struct lpfc_hbq_entry *
ed957684
JS		 510lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
511{
512 struct hbq_s *hbqp = &phba->hbqs[hbqno];
513
514 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
515 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
516 hbqp->next_hbqPutIdx = 0;
517
518 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 519 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS		 520 uint32_t getidx = le32_to_cpu(raw_index);
521
522 hbqp->local_hbqGetIdx = getidx;
523
524 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
525 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 526 LOG_SLI | LOG_VPORT,
e8b62011 527 "1802 HBQ %d: local_hbqGetIdx "
ed957684 528 "%u is > than hbqp->entry_count %u\n",
e8b62011 529 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS		 530 hbqp->entry_count);
531
532 phba->link_state = LPFC_HBA_ERROR;
533 return NULL;
534 }
535
536 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
537 return NULL;
538 }
539
51ef4c26
JS		 540 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
541 hbqp->hbqPutIdx;
ed957684
JS		 542}
543
544void
545lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
546{
92d7f7b0
JS		 547 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
548 struct hbq_dmabuf *hbq_buf;
3163f725 549 unsigned long flags;
51ef4c26 550 int i, hbq_count;
3163f725 551 uint32_t hbqno;
ed957684 552
51ef4c26 553 hbq_count = lpfc_sli_hbq_count();
ed957684 554 /* Return all memory used by all HBQs */
3163f725 555 spin_lock_irqsave(&phba->hbalock, flags);
51ef4c26
JS		 556 for (i = 0; i < hbq_count; ++i) {
557 list_for_each_entry_safe(dmabuf, next_dmabuf,
558 &phba->hbqs[i].hbq_buffer_list, list) {
559 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
560 list_del(&hbq_buf->dbuf.list);
561 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
562 }
a8adb832 563 phba->hbqs[i].buffer_count = 0;
ed957684 564 }
3163f725
JS		 565 /* Return all HBQ buffer that are in-fly */
566 list_for_each_entry_safe(dmabuf, next_dmabuf,
567 &phba->hbqbuf_in_list, list) {
568 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
569 list_del(&hbq_buf->dbuf.list);
570 if (hbq_buf->tag == -1) {
571 (phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer)
572 (phba, hbq_buf);
573 } else {
574 hbqno = hbq_buf->tag >> 16;
575 if (hbqno >= LPFC_MAX_HBQS)
576 (phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer)
577 (phba, hbq_buf);
578 else
579 (phba->hbqs[hbqno].hbq_free_buffer)(phba,
580 hbq_buf);
581 }
582 }
583
584 /* Mark the HBQs not in use */
585 phba->hbq_in_use = 0;
586 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684
JS		 587}
588
51ef4c26 589static struct lpfc_hbq_entry *
ed957684 590lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 591 struct hbq_dmabuf *hbq_buf)
ed957684
JS		 592{
593 struct lpfc_hbq_entry *hbqe;
92d7f7b0 594 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684
JS		 595
596 /* Get next HBQ entry slot to use */
597 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
598 if (hbqe) {
599 struct hbq_s *hbqp = &phba->hbqs[hbqno];
600
92d7f7b0
JS		 601 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
602 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
51ef4c26 603 hbqe->bde.tus.f.bdeSize = hbq_buf->size;
ed957684 604 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS		 605 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
606 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
607 /* Sync SLIM */
ed957684
JS		 608 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
609 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 610 /* flush */
ed957684 611 readl(phba->hbq_put + hbqno);
51ef4c26 612 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
ed957684 613 }
51ef4c26 614 return hbqe;
ed957684
JS		 615}
616
92d7f7b0
JS		 617static struct lpfc_hbq_init lpfc_els_hbq = {
618 .rn = 1,
619 .entry_count = 200,
620 .mask_count = 0,
621 .profile = 0,
51ef4c26 622 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0
JS		 623 .buffer_count = 0,
624 .init_count = 20,
625 .add_count = 5,
626};
ed957684 627
51ef4c26
JS		 628static struct lpfc_hbq_init lpfc_extra_hbq = {
629 .rn = 1,
630 .entry_count = 200,
631 .mask_count = 0,
632 .profile = 0,
633 .ring_mask = (1 << LPFC_EXTRA_RING),
634 .buffer_count = 0,
635 .init_count = 0,
636 .add_count = 5,
637};
638
78b2d852 639struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0 640 &lpfc_els_hbq,
51ef4c26 641 &lpfc_extra_hbq,
92d7f7b0 642};
ed957684 643
311464ec 644static int
92d7f7b0 645lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 646{
92d7f7b0 647 uint32_t i, start, end;
3163f725 648 unsigned long flags;
92d7f7b0 649 struct hbq_dmabuf *hbq_buffer;
ed957684 650
eafe1df9 651 if (!phba->hbqs[hbqno].hbq_alloc_buffer)
51ef4c26 652 return 0;
51ef4c26 653
a8adb832
JS		 654 start = phba->hbqs[hbqno].buffer_count;
655 end = count + start;
eafe1df9 656 if (end > lpfc_hbq_defs[hbqno]->entry_count)
92d7f7b0 657 end = lpfc_hbq_defs[hbqno]->entry_count;
ed957684 658
3163f725
JS		 659 /* Check whether HBQ is still in use */
660 spin_lock_irqsave(&phba->hbalock, flags);
eafe1df9
MW		 661 if (!phba->hbq_in_use)
662 goto out;
3163f725 663
ed957684 664 /* Populate HBQ entries */
92d7f7b0 665 for (i = start; i < end; i++) {
51ef4c26 666 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
92d7f7b0 667 if (!hbq_buffer)
eafe1df9 668 goto err;
92d7f7b0 669 hbq_buffer->tag = (i | (hbqno << 16));
51ef4c26 670 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
a8adb832 671 phba->hbqs[hbqno].buffer_count++;
51ef4c26
JS		 672 else
673 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684 674 }
3163f725 675
eafe1df9 676 out:
3163f725 677 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684 678 return 0;
eafe1df9
MW		 679 err:
680 spin_unlock_irqrestore(&phba->hbalock, flags);
681 return 1;
ed957684
JS		 682}
683
92d7f7b0
JS		 684int
685lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 686{
92d7f7b0
JS		 687 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
688 lpfc_hbq_defs[qno]->add_count));
689}
ed957684 690
a6ababd2 691static int
92d7f7b0
JS		 692lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
693{
694 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
695 lpfc_hbq_defs[qno]->init_count));
ed957684
JS		 696}
697
a6ababd2 698static struct hbq_dmabuf *
92d7f7b0 699lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 700{
92d7f7b0
JS		 701 struct lpfc_dmabuf *d_buf;
702 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS		 703 uint32_t hbqno;
704
705 hbqno = tag >> 16;
a0a74e45 706 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 707 return NULL;
ed957684 708
51ef4c26 709 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 710 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 711 if (hbq_buf->tag == tag) {
92d7f7b0 712 return hbq_buf;
ed957684
JS		 713 }
714 }
92d7f7b0 715 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 716 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 717 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 718 return NULL;
ed957684
JS		 719}
720
721void
51ef4c26 722lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS		 723{
724 uint32_t hbqno;
725
51ef4c26
JS		 726 if (hbq_buffer) {
727 hbqno = hbq_buffer->tag >> 16;
728 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
729 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
730 }
ed957684
JS		 731 }
732}
733
dea3101e
JB		 734static int
735lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
736{
737 uint8_t ret;
738
739 switch (mbxCommand) {
740 case MBX_LOAD_SM:
741 case MBX_READ_NV:
742 case MBX_WRITE_NV:
a8adb832 743 case MBX_WRITE_VPARMS:
dea3101e
JB		 744 case MBX_RUN_BIU_DIAG:
745 case MBX_INIT_LINK:
746 case MBX_DOWN_LINK:
747 case MBX_CONFIG_LINK:
748 case MBX_CONFIG_RING:
749 case MBX_RESET_RING:
750 case MBX_READ_CONFIG:
751 case MBX_READ_RCONFIG:
752 case MBX_READ_SPARM:
753 case MBX_READ_STATUS:
754 case MBX_READ_RPI:
755 case MBX_READ_XRI:
756 case MBX_READ_REV:
757 case MBX_READ_LNK_STAT:
758 case MBX_REG_LOGIN:
759 case MBX_UNREG_LOGIN:
760 case MBX_READ_LA:
761 case MBX_CLEAR_LA:
762 case MBX_DUMP_MEMORY:
763 case MBX_DUMP_CONTEXT:
764 case MBX_RUN_DIAGS:
765 case MBX_RESTART:
766 case MBX_UPDATE_CFG:
767 case MBX_DOWN_LOAD:
768 case MBX_DEL_LD_ENTRY:
769 case MBX_RUN_PROGRAM:
770 case MBX_SET_MASK:
09372820 771 case MBX_SET_VARIABLE:
dea3101e 772 case MBX_UNREG_D_ID:
41415862 773 case MBX_KILL_BOARD:
dea3101e 774 case MBX_CONFIG_FARP:
41415862 775 case MBX_BEACON:
dea3101e
JB		 776 case MBX_LOAD_AREA:
777 case MBX_RUN_BIU_DIAG64:
778 case MBX_CONFIG_PORT:
779 case MBX_READ_SPARM64:
780 case MBX_READ_RPI64:
781 case MBX_REG_LOGIN64:
782 case MBX_READ_LA64:
09372820 783 case MBX_WRITE_WWN:
dea3101e
JB		 784 case MBX_SET_DEBUG:
785 case MBX_LOAD_EXP_ROM:
57127f15 786 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS		 787 case MBX_REG_VPI:
788 case MBX_UNREG_VPI:
858c9f6c 789 case MBX_HEARTBEAT:
dea3101e
JB		 790 ret = mbxCommand;
791 break;
792 default:
793 ret = MBX_SHUTDOWN;
794 break;
795 }
2e0fef85 796 return ret;
dea3101e
JB		 797}
798static void
2e0fef85 799lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e
JB		 800{
801 wait_queue_head_t *pdone_q;
858c9f6c 802 unsigned long drvr_flag;
dea3101e
JB		 803
804 /*
805 * If pdone_q is empty, the driver thread gave up waiting and
806 * continued running.
807 */
7054a606 808 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 809 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e
JB		 810 pdone_q = (wait_queue_head_t *) pmboxq->context1;
811 if (pdone_q)
812 wake_up_interruptible(pdone_q);
858c9f6c 813 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB		 814 return;
815}
816
817void
2e0fef85 818lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e
JB		 819{
820 struct lpfc_dmabuf *mp;
7054a606
JS		 821 uint16_t rpi;
822 int rc;
823
dea3101e 824 mp = (struct lpfc_dmabuf *) (pmb->context1);
7054a606 825
dea3101e
JB		 826 if (mp) {
827 lpfc_mbuf_free(phba, mp->virt, mp->phys);
828 kfree(mp);
829 }
7054a606
JS		 830
831 /*
832 * If a REG_LOGIN succeeded after node is destroyed or node
833 * is in re-discovery driver need to cleanup the RPI.
834 */
2e0fef85
JS		 835 if (!(phba->pport->load_flag & FC_UNLOADING) &&
836 pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
837 !pmb->mb.mbxStatus) {
7054a606
JS		 838
839 rpi = pmb->mb.un.varWords[0];
92d7f7b0
JS		 840 lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
841 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS		 842 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
843 if (rc != MBX_NOT_FINISHED)
844 return;
845 }
846
2e0fef85 847 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB		 848 return;
849}
850
851int
2e0fef85 852lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 853{
92d7f7b0 854 MAILBOX_t *pmbox;
dea3101e 855 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS		 856 int rc;
857 LIST_HEAD(cmplq);
dea3101e
JB		 858
859 phba->sli.slistat.mbox_event++;
860
92d7f7b0
JS		 861 /* Get all completed mailboxe buffers into the cmplq */
862 spin_lock_irq(&phba->hbalock);
863 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
864 spin_unlock_irq(&phba->hbalock);
dea3101e 865
92d7f7b0
JS		 866 /* Get a Mailbox buffer to setup mailbox commands for callback */
867 do {
868 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
869 if (pmb == NULL)
870 break;
2e0fef85 871
92d7f7b0 872 pmbox = &pmb->mb;
dea3101e 873
858c9f6c
JS		 874 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
875 if (pmb->vport) {
876 lpfc_debugfs_disc_trc(pmb->vport,
877 LPFC_DISC_TRC_MBOX_VPORT,
878 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
879 (uint32_t)pmbox->mbxCommand,
880 pmbox->un.varWords[0],
881 pmbox->un.varWords[1]);
882 }
883 else {
884 lpfc_debugfs_disc_trc(phba->pport,
885 LPFC_DISC_TRC_MBOX,
886 "MBOX cmpl: cmd:x%x mb:x%x x%x",
887 (uint32_t)pmbox->mbxCommand,
888 pmbox->un.varWords[0],
889 pmbox->un.varWords[1]);
890 }
891 }
892
dea3101e
JB		 893 /*
894 * It is a fatal error if unknown mbox command completion.
895 */
896 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
897 MBX_SHUTDOWN) {
dea3101e 898 /* Unknow mailbox command compl */
92d7f7b0 899 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 900 "(%d):0323 Unknown Mailbox command "
92d7f7b0 901 "%x Cmpl\n",
92d7f7b0
JS		 902 pmb->vport ? pmb->vport->vpi : 0,
903 pmbox->mbxCommand);
2e0fef85 904 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 905 phba->work_hs = HS_FFER3;
906 lpfc_handle_eratt(phba);
92d7f7b0 907 continue;
dea3101e
JB		 908 }
909
dea3101e
JB		 910 if (pmbox->mbxStatus) {
911 phba->sli.slistat.mbox_stat_err++;
912 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
913 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0
JS		 914 lpfc_printf_log(phba, KERN_INFO,
915 LOG_MBOX | LOG_SLI,
e8b62011 916 "(%d):0305 Mbox cmd cmpl "
92d7f7b0
JS		 917 "error - RETRYing Data: x%x "
918 "x%x x%x x%x\n",
92d7f7b0
JS		 919 pmb->vport ? pmb->vport->vpi :0,
920 pmbox->mbxCommand,
921 pmbox->mbxStatus,
922 pmbox->un.varWords[0],
923 pmb->vport->port_state);
dea3101e
JB		 924 pmbox->mbxStatus = 0;
925 pmbox->mbxOwner = OWN_HOST;
2e0fef85 926 spin_lock_irq(&phba->hbalock);
dea3101e 927 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 928 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 929 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
930 if (rc == MBX_SUCCESS)
92d7f7b0 931 continue;
dea3101e
JB		 932 }
933 }
934
935 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 936 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 937 "(%d):0307 Mailbox cmd x%x Cmpl x%p "
dea3101e 938 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
92d7f7b0 939 pmb->vport ? pmb->vport->vpi : 0,
dea3101e
JB		 940 pmbox->mbxCommand,
941 pmb->mbox_cmpl,
942 *((uint32_t *) pmbox),
943 pmbox->un.varWords[0],
944 pmbox->un.varWords[1],
945 pmbox->un.varWords[2],
946 pmbox->un.varWords[3],
947 pmbox->un.varWords[4],
948 pmbox->un.varWords[5],
949 pmbox->un.varWords[6],
950 pmbox->un.varWords[7]);
951
92d7f7b0 952 if (pmb->mbox_cmpl)
dea3101e 953 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS		 954 } while (1);
955 return 0;
956}
dea3101e 957
92d7f7b0
JS		 958static struct lpfc_dmabuf *
959lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
960{
961 struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
51ef4c26
JS		 962 uint32_t hbqno;
963 void *virt; /* virtual address ptr */
964 dma_addr_t phys; /* mapped address */
3163f725
JS		 965 unsigned long flags;
966
967 /* Check whether HBQ is still in use */
968 spin_lock_irqsave(&phba->hbalock, flags);
969 if (!phba->hbq_in_use) {
970 spin_unlock_irqrestore(&phba->hbalock, flags);
971 return NULL;
972 }
dea3101e 973
92d7f7b0 974 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
3163f725
JS		 975 if (hbq_entry == NULL) {
976 spin_unlock_irqrestore(&phba->hbalock, flags);
92d7f7b0 977 return NULL;
3163f725 978 }
92d7f7b0 979 list_del(&hbq_entry->dbuf.list);
51ef4c26
JS		 980
981 hbqno = tag >> 16;
982 new_hbq_entry = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
3163f725
JS		 983 if (new_hbq_entry == NULL) {
984 list_add_tail(&hbq_entry->dbuf.list, &phba->hbqbuf_in_list);
985 spin_unlock_irqrestore(&phba->hbalock, flags);
92d7f7b0 986 return &hbq_entry->dbuf;
3163f725 987 }
92d7f7b0 988 new_hbq_entry->tag = -1;
51ef4c26
JS		 989 phys = new_hbq_entry->dbuf.phys;
990 virt = new_hbq_entry->dbuf.virt;
991 new_hbq_entry->dbuf.phys = hbq_entry->dbuf.phys;
992 new_hbq_entry->dbuf.virt = hbq_entry->dbuf.virt;
993 hbq_entry->dbuf.phys = phys;
994 hbq_entry->dbuf.virt = virt;
92d7f7b0 995 lpfc_sli_free_hbq(phba, hbq_entry);
3163f725
JS		 996 list_add_tail(&new_hbq_entry->dbuf.list, &phba->hbqbuf_in_list);
997 spin_unlock_irqrestore(&phba->hbalock, flags);
998
92d7f7b0 999 return &new_hbq_entry->dbuf;
dea3101e 1000}
92d7f7b0 1001
76bb24ef
JS		 1002static struct lpfc_dmabuf *
1003lpfc_sli_get_buff(struct lpfc_hba *phba,
1004 struct lpfc_sli_ring *pring,
1005 uint32_t tag)
1006{
1007 if (tag & QUE_BUFTAG_BIT)
1008 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
1009 else
1010 return lpfc_sli_replace_hbqbuff(phba, tag);
1011}
57127f15 1012
dea3101e
JB		 1013static int
1014lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1015 struct lpfc_iocbq *saveq)
1016{
1017 IOCB_t * irsp;
1018 WORD5 * w5p;
1019 uint32_t Rctl, Type;
1020 uint32_t match, i;
76bb24ef 1021 struct lpfc_iocbq *iocbq;
3163f725 1022 struct lpfc_dmabuf *dmzbuf;
dea3101e
JB		 1023
1024 match = 0;
1025 irsp = &(saveq->iocb);
57127f15 1026
9c2face6
JS		 1027 if (irsp->ulpStatus == IOSTAT_NEED_BUFFER)
1028 return 1;
57127f15
JS		 1029 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
1030 if (pring->lpfc_sli_rcv_async_status)
1031 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
1032 else
1033 lpfc_printf_log(phba,
1034 KERN_WARNING,
1035 LOG_SLI,
1036 "0316 Ring %d handler: unexpected "
1037 "ASYNC_STATUS iocb received evt_code "
1038 "0x%x\n",
1039 pring->ringno,
1040 irsp->un.asyncstat.evt_code);
1041 return 1;
1042 }
1043
3163f725
JS		 1044 if ((irsp->ulpCommand == CMD_IOCB_RET_XRI64_CX) &&
1045 (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)) {
1046 if (irsp->ulpBdeCount > 0) {
1047 dmzbuf = lpfc_sli_get_buff(phba, pring,
1048 irsp->un.ulpWord[3]);
1049 lpfc_in_buf_free(phba, dmzbuf);
1050 }
1051
1052 if (irsp->ulpBdeCount > 1) {
1053 dmzbuf = lpfc_sli_get_buff(phba, pring,
1054 irsp->unsli3.sli3Words[3]);
1055 lpfc_in_buf_free(phba, dmzbuf);
1056 }
1057
1058 if (irsp->ulpBdeCount > 2) {
1059 dmzbuf = lpfc_sli_get_buff(phba, pring,
1060 irsp->unsli3.sli3Words[7]);
1061 lpfc_in_buf_free(phba, dmzbuf);
1062 }
1063
1064 return 1;
1065 }
1066
92d7f7b0 1067 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS		 1068 if (irsp->ulpBdeCount != 0) {
1069 saveq->context2 = lpfc_sli_get_buff(phba, pring,
1070 irsp->un.ulpWord[3]);
1071 if (!saveq->context2)
1072 lpfc_printf_log(phba,
1073 KERN_ERR,
1074 LOG_SLI,
1075 "0341 Ring %d Cannot find buffer for "
1076 "an unsolicited iocb. tag 0x%x\n",
1077 pring->ringno,
1078 irsp->un.ulpWord[3]);
76bb24ef
JS		 1079 }
1080 if (irsp->ulpBdeCount == 2) {
1081 saveq->context3 = lpfc_sli_get_buff(phba, pring,
1082 irsp->unsli3.sli3Words[7]);
1083 if (!saveq->context3)
1084 lpfc_printf_log(phba,
1085 KERN_ERR,
1086 LOG_SLI,
1087 "0342 Ring %d Cannot find buffer for an"
1088 " unsolicited iocb. tag 0x%x\n",
1089 pring->ringno,
1090 irsp->unsli3.sli3Words[7]);
1091 }
1092 list_for_each_entry(iocbq, &saveq->list, list) {
76bb24ef 1093 irsp = &(iocbq->iocb);
76bb24ef
JS		 1094 if (irsp->ulpBdeCount != 0) {
1095 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
1096 irsp->un.ulpWord[3]);
9c2face6 1097 if (!iocbq->context2)
76bb24ef
JS		 1098 lpfc_printf_log(phba,
1099 KERN_ERR,
1100 LOG_SLI,
1101 "0343 Ring %d Cannot find "
1102 "buffer for an unsolicited iocb"
1103 ". tag 0x%x\n", pring->ringno,
92d7f7b0 1104 irsp->un.ulpWord[3]);
76bb24ef
JS		 1105 }
1106 if (irsp->ulpBdeCount == 2) {
1107 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 1108 irsp->unsli3.sli3Words[7]);
9c2face6 1109 if (!iocbq->context3)
76bb24ef
JS		 1110 lpfc_printf_log(phba,
1111 KERN_ERR,
1112 LOG_SLI,
1113 "0344 Ring %d Cannot find "
1114 "buffer for an unsolicited "
1115 "iocb. tag 0x%x\n",
1116 pring->ringno,
1117 irsp->unsli3.sli3Words[7]);
1118 }
1119 }
92d7f7b0 1120 }
9c2face6
JS		 1121 if (irsp->ulpBdeCount != 0 &&
1122 (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
1123 irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
1124 int found = 0;
1125
1126 /* search continue save q for same XRI */
1127 list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
1128 if (iocbq->iocb.ulpContext == saveq->iocb.ulpContext) {
1129 list_add_tail(&saveq->list, &iocbq->list);
1130 found = 1;
1131 break;
1132 }
1133 }
1134 if (!found)
1135 list_add_tail(&saveq->clist,
1136 &pring->iocb_continue_saveq);
1137 if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
1138 list_del_init(&iocbq->clist);
1139 saveq = iocbq;
1140 irsp = &(saveq->iocb);
1141 } else
1142 return 0;
1143 }
1144 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
1145 (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
1146 (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
1147 Rctl = FC_ELS_REQ;
1148 Type = FC_ELS_DATA;
1149 } else {
1150 w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
1151 Rctl = w5p->hcsw.Rctl;
1152 Type = w5p->hcsw.Type;
1153
1154 /* Firmware Workaround */
1155 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
1156 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
1157 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
1158 Rctl = FC_ELS_REQ;
1159 Type = FC_ELS_DATA;
1160 w5p->hcsw.Rctl = Rctl;
1161 w5p->hcsw.Type = Type;
1162 }
1163 }
92d7f7b0 1164
dea3101e
JB		 1165 /* unSolicited Responses */
1166 if (pring->prt[0].profile) {
cf5bf97e
JW		 1167 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
1168 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
1169 saveq);
dea3101e
JB		 1170 match = 1;
1171 } else {
1172 /* We must search, based on rctl / type
1173 for the right routine */
9c2face6
JS		 1174 for (i = 0; i < pring->num_mask; i++) {
1175 if ((pring->prt[i].rctl == Rctl)
1176 && (pring->prt[i].type == Type)) {
cf5bf97e
JW		 1177 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
1178 (pring->prt[i].lpfc_sli_rcv_unsol_event)
1179 (phba, pring, saveq);
dea3101e
JB		 1180 match = 1;
1181 break;
1182 }
1183 }
1184 }
1185 if (match == 0) {
1186 /* Unexpected Rctl / Type received */
1187 /* Ring <ringno> handler: unexpected
1188 Rctl <Rctl> Type <Type> received */
92d7f7b0 1189 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1190 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 1191 "Type x%x received\n",
e8b62011 1192 pring->ringno, Rctl, Type);
dea3101e 1193 }
92d7f7b0 1194 return 1;
dea3101e
JB		 1195}
1196
1197static struct lpfc_iocbq *
2e0fef85
JS		 1198lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
1199 struct lpfc_sli_ring *pring,
1200 struct lpfc_iocbq *prspiocb)
dea3101e 1201{
dea3101e
JB		 1202 struct lpfc_iocbq *cmd_iocb = NULL;
1203 uint16_t iotag;
1204
604a3e30
JB		 1205 iotag = prspiocb->iocb.ulpIoTag;
1206
1207 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
1208 cmd_iocb = phba->sli.iocbq_lookup[iotag];
92d7f7b0 1209 list_del_init(&cmd_iocb->list);
604a3e30
JB		 1210 pring->txcmplq_cnt--;
1211 return cmd_iocb;
dea3101e
JB		 1212 }
1213
dea3101e 1214 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1215 "0317 iotag x%x is out off "
604a3e30 1216 "range: max iotag x%x wd0 x%x\n",
e8b62011 1217 iotag, phba->sli.last_iotag,
604a3e30 1218 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB		 1219 return NULL;
1220}
1221
1222static int
2e0fef85 1223lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB		 1224 struct lpfc_iocbq *saveq)
1225{
2e0fef85 1226 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB		 1227 int rc = 1;
1228 unsigned long iflag;
1229
1230 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
2e0fef85 1231 spin_lock_irqsave(&phba->hbalock, iflag);
604a3e30 1232 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
2e0fef85
JS		 1233 spin_unlock_irqrestore(&phba->hbalock, iflag);
1234
dea3101e
JB		 1235 if (cmdiocbp) {
1236 if (cmdiocbp->iocb_cmpl) {
1237 /*
1238 * Post all ELS completions to the worker thread.
1239 * All other are passed to the completion callback.
1240 */
1241 if (pring->ringno == LPFC_ELS_RING) {
07951076
JS		 1242 if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
1243 cmdiocbp->iocb_flag &=
1244 ~LPFC_DRIVER_ABORTED;
1245 saveq->iocb.ulpStatus =
1246 IOSTAT_LOCAL_REJECT;
1247 saveq->iocb.un.ulpWord[4] =
1248 IOERR_SLI_ABORTED;
0ff10d46
JS		 1249
1250 /* Firmware could still be in progress
1251 * of DMAing payload, so don't free data
1252 * buffer till after a hbeat.
1253 */
1254 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
07951076 1255 }
dea3101e 1256 }
2e0fef85 1257 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB		 1258 } else
1259 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB		 1260 } else {
1261 /*
1262 * Unknown initiating command based on the response iotag.
1263 * This could be the case on the ELS ring because of
1264 * lpfc_els_abort().
1265 */
1266 if (pring->ringno != LPFC_ELS_RING) {
1267 /*
1268 * Ring <ringno> handler: unexpected completion IoTag
1269 * <IoTag>
1270 */
e8b62011
JS		 1271 lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
1272 "0322 Ring %d handler: "
1273 "unexpected completion IoTag x%x "
1274 "Data: x%x x%x x%x x%x\n",
1275 pring->ringno,
1276 saveq->iocb.ulpIoTag,
1277 saveq->iocb.ulpStatus,
1278 saveq->iocb.un.ulpWord[4],
1279 saveq->iocb.ulpCommand,
1280 saveq->iocb.ulpContext);
dea3101e
JB		 1281 }
1282 }
68876920 1283
dea3101e
JB		 1284 return rc;
1285}
1286
2e0fef85
JS		 1287static void
1288lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 1289{
ed957684
JS		 1290 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1291 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1292 &phba->slim2p->mbx.us.s2.port[pring->ringno];
875fbdfe
JSEC		 1293 /*
1294 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1295 * rsp ring <portRspMax>
1296 */
1297 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1298 "0312 Ring %d handler: portRspPut %d "
875fbdfe 1299 "is bigger then rsp ring %d\n",
e8b62011 1300 pring->ringno, le32_to_cpu(pgp->rspPutInx),
875fbdfe
JSEC		 1301 pring->numRiocb);
1302
2e0fef85 1303 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC		 1304
1305 /*
1306 * All error attention handlers are posted to
1307 * worker thread
1308 */
1309 phba->work_ha |= HA_ERATT;
1310 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 1311
1312 /* hbalock should already be held */
875fbdfe 1313 if (phba->work_wait)
92d7f7b0 1314 lpfc_worker_wake_up(phba);
875fbdfe
JSEC		 1315
1316 return;
1317}
1318
2e0fef85 1319void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
875fbdfe 1320{
2e0fef85
JS		 1321 struct lpfc_sli *psli = &phba->sli;
1322 struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
875fbdfe
JSEC		 1323 IOCB_t *irsp = NULL;
1324 IOCB_t *entry = NULL;
1325 struct lpfc_iocbq *cmdiocbq = NULL;
1326 struct lpfc_iocbq rspiocbq;
1327 struct lpfc_pgp *pgp;
1328 uint32_t status;
1329 uint32_t portRspPut, portRspMax;
1330 int type;
1331 uint32_t rsp_cmpl = 0;
875fbdfe 1332 uint32_t ha_copy;
2e0fef85 1333 unsigned long iflags;
875fbdfe
JSEC		 1334
1335 pring->stats.iocb_event++;
1336
ed957684
JS		 1337 pgp = (phba->sli_rev == 3) ?
1338 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1339 &phba->slim2p->mbx.us.s2.port[pring->ringno];
1340
875fbdfe
JSEC		 1341
1342 /*
1343 * The next available response entry should never exceed the maximum
1344 * entries. If it does, treat it as an adapter hardware error.
1345 */
1346 portRspMax = pring->numRiocb;
1347 portRspPut = le32_to_cpu(pgp->rspPutInx);
1348 if (unlikely(portRspPut >= portRspMax)) {
1349 lpfc_sli_rsp_pointers_error(phba, pring);
1350 return;
1351 }
1352
1353 rmb();
1354 while (pring->rspidx != portRspPut) {
ed957684 1355 entry = lpfc_resp_iocb(phba, pring);
875fbdfe
JSEC		 1356 if (++pring->rspidx >= portRspMax)
1357 pring->rspidx = 0;
1358
1359 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1360 (uint32_t *) &rspiocbq.iocb,
92d7f7b0 1361 phba->iocb_rsp_size);
875fbdfe
JSEC		 1362 irsp = &rspiocbq.iocb;
1363 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1364 pring->stats.iocb_rsp++;
1365 rsp_cmpl++;
1366
1367 if (unlikely(irsp->ulpStatus)) {
1368 /* Rsp ring <ringno> error: IOCB */
1369 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1370 "0326 Rsp Ring %d error: IOCB Data: "
875fbdfe 1371 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1372 pring->ringno,
875fbdfe
JSEC		 1373 irsp->un.ulpWord[0],
1374 irsp->un.ulpWord[1],
1375 irsp->un.ulpWord[2],
1376 irsp->un.ulpWord[3],
1377 irsp->un.ulpWord[4],
1378 irsp->un.ulpWord[5],
1379 *(((uint32_t *) irsp) + 6),
1380 *(((uint32_t *) irsp) + 7));
1381 }
1382
1383 switch (type) {
1384 case LPFC_ABORT_IOCB:
1385 case LPFC_SOL_IOCB:
1386 /*
1387 * Idle exchange closed via ABTS from port. No iocb
1388 * resources need to be recovered.
1389 */
1390 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1391 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 1392 "0314 IOCB cmd 0x%x "
1393 "processed. Skipping "
1394 "completion",
dca9479b 1395 irsp->ulpCommand);
875fbdfe
JSEC		 1396 break;
1397 }
1398
2e0fef85 1399 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1400 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1401 &rspiocbq);
2e0fef85 1402 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1403 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
1404 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1405 &rspiocbq);
1406 }
1407 break;
1408 default:
1409 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1410 char adaptermsg[LPFC_MAX_ADPTMSG];
1411 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1412 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1413 MAX_MSG_DATA);
898eb71c
JP		 1414 dev_warn(&((phba->pcidev)->dev),
1415 "lpfc%d: %s\n",
875fbdfe
JSEC		 1416 phba->brd_no, adaptermsg);
1417 } else {
1418 /* Unknown IOCB command */
1419 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1420 "0321 Unknown IOCB command "
875fbdfe 1421 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1422 type, irsp->ulpCommand,
875fbdfe
JSEC		 1423 irsp->ulpStatus,
1424 irsp->ulpIoTag,
1425 irsp->ulpContext);
1426 }
1427 break;
1428 }
1429
1430 /*
1431 * The response IOCB has been processed. Update the ring
1432 * pointer in SLIM. If the port response put pointer has not
1433 * been updated, sync the pgp->rspPutInx and fetch the new port
1434 * response put pointer.
1435 */
ed957684 1436 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
875fbdfe
JSEC		 1437
1438 if (pring->rspidx == portRspPut)
1439 portRspPut = le32_to_cpu(pgp->rspPutInx);
1440 }
1441
1442 ha_copy = readl(phba->HAregaddr);
1443 ha_copy >>= (LPFC_FCP_RING * 4);
1444
1445 if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
2e0fef85 1446 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1447 pring->stats.iocb_rsp_full++;
1448 status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
1449 writel(status, phba->CAregaddr);
1450 readl(phba->CAregaddr);
2e0fef85 1451 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1452 }
1453 if ((ha_copy & HA_R0CE_RSP) &&
1454 (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
2e0fef85 1455 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1456 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1457 pring->stats.iocb_cmd_empty++;
1458
1459 /* Force update of the local copy of cmdGetInx */
1460 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1461 lpfc_sli_resume_iocb(phba, pring);
1462
1463 if ((pring->lpfc_sli_cmd_available))
1464 (pring->lpfc_sli_cmd_available) (phba, pring);
1465
2e0fef85 1466 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1467 }
1468
1469 return;
1470}
1471
dea3101e
JB		 1472/*
1473 * This routine presumes LPFC_FCP_RING handling and doesn't bother
1474 * to check it explicitly.
1475 */
1476static int
2e0fef85
JS		 1477lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
1478 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1479{
ed957684
JS		 1480 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1481 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1482 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 1483 IOCB_t *irsp = NULL;
87f6eaff 1484 IOCB_t *entry = NULL;
dea3101e
JB		 1485 struct lpfc_iocbq *cmdiocbq = NULL;
1486 struct lpfc_iocbq rspiocbq;
dea3101e
JB		 1487 uint32_t status;
1488 uint32_t portRspPut, portRspMax;
1489 int rc = 1;
1490 lpfc_iocb_type type;
1491 unsigned long iflag;
1492 uint32_t rsp_cmpl = 0;
dea3101e 1493
2e0fef85 1494 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1495 pring->stats.iocb_event++;
1496
dea3101e
JB		 1497 /*
1498 * The next available response entry should never exceed the maximum
1499 * entries. If it does, treat it as an adapter hardware error.
1500 */
1501 portRspMax = pring->numRiocb;
1502 portRspPut = le32_to_cpu(pgp->rspPutInx);
1503 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 1504 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 1505 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1506 return 1;
1507 }
1508
1509 rmb();
1510 while (pring->rspidx != portRspPut) {
87f6eaff
JSEC		 1511 /*
1512 * Fetch an entry off the ring and copy it into a local data
1513 * structure. The copy involves a byte-swap since the
1514 * network byte order and pci byte orders are different.
1515 */
ed957684 1516 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 1517 phba->last_completion_time = jiffies;
875fbdfe
JSEC		 1518
1519 if (++pring->rspidx >= portRspMax)
1520 pring->rspidx = 0;
1521
87f6eaff
JSEC		 1522 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1523 (uint32_t *) &rspiocbq.iocb,
ed957684 1524 phba->iocb_rsp_size);
a4bc3379 1525 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC		 1526 irsp = &rspiocbq.iocb;
1527
dea3101e
JB		 1528 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1529 pring->stats.iocb_rsp++;
1530 rsp_cmpl++;
1531
1532 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS		 1533 /*
1534 * If resource errors reported from HBA, reduce
1535 * queuedepths of the SCSI device.
1536 */
1537 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1538 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1539 spin_unlock_irqrestore(&phba->hbalock, iflag);
1540 lpfc_adjust_queue_depth(phba);
1541 spin_lock_irqsave(&phba->hbalock, iflag);
1542 }
1543
dea3101e
JB		 1544 /* Rsp ring <ringno> error: IOCB */
1545 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1546 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 1547 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1548 pring->ringno,
92d7f7b0
JS		 1549 irsp->un.ulpWord[0],
1550 irsp->un.ulpWord[1],
1551 irsp->un.ulpWord[2],
1552 irsp->un.ulpWord[3],
1553 irsp->un.ulpWord[4],
1554 irsp->un.ulpWord[5],
1555 *(((uint32_t *) irsp) + 6),
1556 *(((uint32_t *) irsp) + 7));
dea3101e
JB		 1557 }
1558
1559 switch (type) {
1560 case LPFC_ABORT_IOCB:
1561 case LPFC_SOL_IOCB:
1562 /*
1563 * Idle exchange closed via ABTS from port. No iocb
1564 * resources need to be recovered.
1565 */
1566 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1567 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 1568 "0333 IOCB cmd 0x%x"
dca9479b 1569 " processed. Skipping"
92d7f7b0 1570 " completion\n",
dca9479b 1571 irsp->ulpCommand);
dea3101e
JB		 1572 break;
1573 }
1574
604a3e30
JB		 1575 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1576 &rspiocbq);
dea3101e 1577 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
b808608b
JW		 1578 if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
1579 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1580 &rspiocbq);
1581 } else {
2e0fef85
JS		 1582 spin_unlock_irqrestore(&phba->hbalock,
1583 iflag);
b808608b
JW		 1584 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1585 &rspiocbq);
2e0fef85 1586 spin_lock_irqsave(&phba->hbalock,
b808608b
JW		 1587 iflag);
1588 }
dea3101e
JB		 1589 }
1590 break;
a4bc3379 1591 case LPFC_UNSOL_IOCB:
2e0fef85 1592 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 1593 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 1594 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 1595 break;
dea3101e
JB		 1596 default:
1597 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1598 char adaptermsg[LPFC_MAX_ADPTMSG];
1599 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1600 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1601 MAX_MSG_DATA);
898eb71c
JP		 1602 dev_warn(&((phba->pcidev)->dev),
1603 "lpfc%d: %s\n",
dea3101e
JB		 1604 phba->brd_no, adaptermsg);
1605 } else {
1606 /* Unknown IOCB command */
1607 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1608 "0334 Unknown IOCB command "
92d7f7b0 1609 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1610 type, irsp->ulpCommand,
92d7f7b0
JS		 1611 irsp->ulpStatus,
1612 irsp->ulpIoTag,
1613 irsp->ulpContext);
dea3101e
JB		 1614 }
1615 break;
1616 }
1617
1618 /*
1619 * The response IOCB has been processed. Update the ring
1620 * pointer in SLIM. If the port response put pointer has not
1621 * been updated, sync the pgp->rspPutInx and fetch the new port
1622 * response put pointer.
1623 */
ed957684 1624 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e
JB		 1625
1626 if (pring->rspidx == portRspPut)
1627 portRspPut = le32_to_cpu(pgp->rspPutInx);
1628 }
1629
1630 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1631 pring->stats.iocb_rsp_full++;
1632 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1633 writel(status, phba->CAregaddr);
1634 readl(phba->CAregaddr);
1635 }
1636 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1637 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1638 pring->stats.iocb_cmd_empty++;
1639
1640 /* Force update of the local copy of cmdGetInx */
1641 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1642 lpfc_sli_resume_iocb(phba, pring);
1643
1644 if ((pring->lpfc_sli_cmd_available))
1645 (pring->lpfc_sli_cmd_available) (phba, pring);
1646
1647 }
1648
2e0fef85 1649 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1650 return rc;
1651}
1652
dea3101e 1653int
2e0fef85
JS		 1654lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
1655 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1656{
ed957684
JS		 1657 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1658 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1659 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e
JB		 1660 IOCB_t *entry;
1661 IOCB_t *irsp = NULL;
1662 struct lpfc_iocbq *rspiocbp = NULL;
1663 struct lpfc_iocbq *next_iocb;
1664 struct lpfc_iocbq *cmdiocbp;
1665 struct lpfc_iocbq *saveq;
dea3101e
JB		 1666 uint8_t iocb_cmd_type;
1667 lpfc_iocb_type type;
1668 uint32_t status, free_saveq;
1669 uint32_t portRspPut, portRspMax;
1670 int rc = 1;
1671 unsigned long iflag;
dea3101e 1672
2e0fef85 1673 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1674 pring->stats.iocb_event++;
1675
dea3101e
JB		 1676 /*
1677 * The next available response entry should never exceed the maximum
1678 * entries. If it does, treat it as an adapter hardware error.
1679 */
1680 portRspMax = pring->numRiocb;
1681 portRspPut = le32_to_cpu(pgp->rspPutInx);
1682 if (portRspPut >= portRspMax) {
1683 /*
1684 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1685 * rsp ring <portRspMax>
1686 */
ed957684 1687 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1688 "0303 Ring %d handler: portRspPut %d "
dea3101e 1689 "is bigger then rsp ring %d\n",
e8b62011 1690 pring->ringno, portRspPut, portRspMax);
dea3101e 1691
2e0fef85
JS		 1692 phba->link_state = LPFC_HBA_ERROR;
1693 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1694
1695 phba->work_hs = HS_FFER3;
1696 lpfc_handle_eratt(phba);
1697
1698 return 1;
1699 }
1700
1701 rmb();
dea3101e
JB		 1702 while (pring->rspidx != portRspPut) {
1703 /*
1704 * Build a completion list and call the appropriate handler.
1705 * The process is to get the next available response iocb, get
1706 * a free iocb from the list, copy the response data into the
1707 * free iocb, insert to the continuation list, and update the
1708 * next response index to slim. This process makes response
1709 * iocb's in the ring available to DMA as fast as possible but
1710 * pays a penalty for a copy operation. Since the iocb is
1711 * only 32 bytes, this penalty is considered small relative to
1712 * the PCI reads for register values and a slim write. When
1713 * the ulpLe field is set, the entire Command has been
1714 * received.
1715 */
ed957684
JS		 1716 entry = lpfc_resp_iocb(phba, pring);
1717
858c9f6c 1718 phba->last_completion_time = jiffies;
2e0fef85 1719 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB		 1720 if (rspiocbp == NULL) {
1721 printk(KERN_ERR "%s: out of buffers! Failing "
1722 "completion.\n", __FUNCTION__);
1723 break;
1724 }
1725
ed957684
JS		 1726 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
1727 phba->iocb_rsp_size);
dea3101e
JB		 1728 irsp = &rspiocbp->iocb;
1729
1730 if (++pring->rspidx >= portRspMax)
1731 pring->rspidx = 0;
1732
a58cbd52
JS		 1733 if (pring->ringno == LPFC_ELS_RING) {
1734 lpfc_debugfs_slow_ring_trc(phba,
1735 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1736 *(((uint32_t *) irsp) + 4),
1737 *(((uint32_t *) irsp) + 6),
1738 *(((uint32_t *) irsp) + 7));
1739 }
1740
ed957684 1741 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 1742
9c2face6 1743 list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
dea3101e
JB		 1744
1745 pring->iocb_continueq_cnt++;
1746 if (irsp->ulpLe) {
1747 /*
1748 * By default, the driver expects to free all resources
1749 * associated with this iocb completion.
1750 */
1751 free_saveq = 1;
1752 saveq = list_get_first(&pring->iocb_continueq,
1753 struct lpfc_iocbq, list);
1754 irsp = &(saveq->iocb);
1755 list_del_init(&pring->iocb_continueq);
1756 pring->iocb_continueq_cnt = 0;
1757
1758 pring->stats.iocb_rsp++;
1759
92d7f7b0
JS		 1760 /*
1761 * If resource errors reported from HBA, reduce
1762 * queuedepths of the SCSI device.
1763 */
1764 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1765 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1766 spin_unlock_irqrestore(&phba->hbalock, iflag);
1767 lpfc_adjust_queue_depth(phba);
1768 spin_lock_irqsave(&phba->hbalock, iflag);
1769 }
1770
dea3101e
JB		 1771 if (irsp->ulpStatus) {
1772 /* Rsp ring <ringno> error: IOCB */
ed957684 1773 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1774 "0328 Rsp Ring %d error: "
ed957684
JS		 1775 "IOCB Data: "
1776 "x%x x%x x%x x%x "
1777 "x%x x%x x%x x%x "
1778 "x%x x%x x%x x%x "
1779 "x%x x%x x%x x%x\n",
ed957684
JS		 1780 pring->ringno,
1781 irsp->un.ulpWord[0],
1782 irsp->un.ulpWord[1],
1783 irsp->un.ulpWord[2],
1784 irsp->un.ulpWord[3],
1785 irsp->un.ulpWord[4],
1786 irsp->un.ulpWord[5],
1787 *(((uint32_t *) irsp) + 6),
1788 *(((uint32_t *) irsp) + 7),
1789 *(((uint32_t *) irsp) + 8),
1790 *(((uint32_t *) irsp) + 9),
1791 *(((uint32_t *) irsp) + 10),
1792 *(((uint32_t *) irsp) + 11),
1793 *(((uint32_t *) irsp) + 12),
1794 *(((uint32_t *) irsp) + 13),
1795 *(((uint32_t *) irsp) + 14),
1796 *(((uint32_t *) irsp) + 15));
dea3101e
JB		 1797 }
1798
1799 /*
1800 * Fetch the IOCB command type and call the correct
1801 * completion routine. Solicited and Unsolicited
1802 * IOCBs on the ELS ring get freed back to the
1803 * lpfc_iocb_list by the discovery kernel thread.
1804 */
1805 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1806 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1807 if (type == LPFC_SOL_IOCB) {
9c2face6 1808 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1809 rc = lpfc_sli_process_sol_iocb(phba, pring,
2e0fef85
JS		 1810 saveq);
1811 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 1812 } else if (type == LPFC_UNSOL_IOCB) {
9c2face6 1813 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1814 rc = lpfc_sli_process_unsol_iocb(phba, pring,
2e0fef85
JS		 1815 saveq);
1816 spin_lock_irqsave(&phba->hbalock, iflag);
9c2face6
JS		 1817 if (!rc)
1818 free_saveq = 0;
dea3101e
JB		 1819 } else if (type == LPFC_ABORT_IOCB) {
1820 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1821 ((cmdiocbp =
604a3e30
JB		 1822 lpfc_sli_iocbq_lookup(phba, pring,
1823 saveq)))) {
dea3101e
JB		 1824 /* Call the specified completion
1825 routine */
1826 if (cmdiocbp->iocb_cmpl) {
1827 spin_unlock_irqrestore(
2e0fef85 1828 &phba->hbalock,
dea3101e
JB		 1829 iflag);
1830 (cmdiocbp->iocb_cmpl) (phba,
1831 cmdiocbp, saveq);
1832 spin_lock_irqsave(
2e0fef85 1833 &phba->hbalock,
dea3101e 1834 iflag);
604a3e30 1835 } else
2e0fef85 1836 __lpfc_sli_release_iocbq(phba,
604a3e30 1837 cmdiocbp);
dea3101e
JB		 1838 }
1839 } else if (type == LPFC_UNKNOWN_IOCB) {
1840 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1841
1842 char adaptermsg[LPFC_MAX_ADPTMSG];
1843
1844 memset(adaptermsg, 0,
1845 LPFC_MAX_ADPTMSG);
1846 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1847 MAX_MSG_DATA);
1848 dev_warn(&((phba->pcidev)->dev),
898eb71c 1849 "lpfc%d: %s\n",
dea3101e
JB		 1850 phba->brd_no, adaptermsg);
1851 } else {
1852 /* Unknown IOCB command */
92d7f7b0 1853 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1854 "0335 Unknown IOCB "
92d7f7b0
JS		 1855 "command Data: x%x "
1856 "x%x x%x x%x\n",
92d7f7b0
JS		 1857 irsp->ulpCommand,
1858 irsp->ulpStatus,
1859 irsp->ulpIoTag,
1860 irsp->ulpContext);
dea3101e
JB		 1861 }
1862 }
1863
1864 if (free_saveq) {
2e0fef85
JS		 1865 list_for_each_entry_safe(rspiocbp, next_iocb,
1866 &saveq->list, list) {
1867 list_del(&rspiocbp->list);
1868 __lpfc_sli_release_iocbq(phba,
1869 rspiocbp);
dea3101e 1870 }
2e0fef85 1871 __lpfc_sli_release_iocbq(phba, saveq);
dea3101e 1872 }
92d7f7b0 1873 rspiocbp = NULL;
dea3101e
JB		 1874 }
1875
1876 /*
1877 * If the port response put pointer has not been updated, sync
1878 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1879 * response put pointer.
1880 */
1881 if (pring->rspidx == portRspPut) {
1882 portRspPut = le32_to_cpu(pgp->rspPutInx);
1883 }
1884 } /* while (pring->rspidx != portRspPut) */
1885
92d7f7b0 1886 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB		 1887 /* At least one response entry has been freed */
1888 pring->stats.iocb_rsp_full++;
1889 /* SET RxRE_RSP in Chip Att register */
1890 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1891 writel(status, phba->CAregaddr);
1892 readl(phba->CAregaddr); /* flush */
1893 }
1894 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1895 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1896 pring->stats.iocb_cmd_empty++;
1897
1898 /* Force update of the local copy of cmdGetInx */
1899 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1900 lpfc_sli_resume_iocb(phba, pring);
1901
1902 if ((pring->lpfc_sli_cmd_available))
1903 (pring->lpfc_sli_cmd_available) (phba, pring);
1904
1905 }
1906
2e0fef85 1907 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1908 return rc;
1909}
1910
2e0fef85 1911void
dea3101e
JB		 1912lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1913{
2534ba75 1914 LIST_HEAD(completions);
dea3101e 1915 struct lpfc_iocbq *iocb, *next_iocb;
2534ba75 1916 IOCB_t *cmd = NULL;
dea3101e 1917
92d7f7b0
JS		 1918 if (pring->ringno == LPFC_ELS_RING) {
1919 lpfc_fabric_abort_hba(phba);
1920 }
1921
dea3101e
JB		 1922 /* Error everything on txq and txcmplq
1923 * First do the txq.
1924 */
2e0fef85 1925 spin_lock_irq(&phba->hbalock);
2534ba75 1926 list_splice_init(&pring->txq, &completions);
dea3101e 1927 pring->txq_cnt = 0;
dea3101e
JB		 1928
1929 /* Next issue ABTS for everything on the txcmplq */
2534ba75
JS		 1930 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
1931 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
dea3101e 1932
2e0fef85 1933 spin_unlock_irq(&phba->hbalock);
dea3101e 1934
2534ba75
JS		 1935 while (!list_empty(&completions)) {
1936 iocb = list_get_first(&completions, struct lpfc_iocbq, list);
1937 cmd = &iocb->iocb;
92d7f7b0 1938 list_del_init(&iocb->list);
dea3101e 1939
2e0fef85
JS		 1940 if (!iocb->iocb_cmpl)
1941 lpfc_sli_release_iocbq(phba, iocb);
1942 else {
dea3101e
JB		 1943 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1944 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
dea3101e 1945 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 1946 }
dea3101e 1947 }
dea3101e
JB		 1948}
1949
41415862 1950int
2e0fef85 1951lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
dea3101e 1952{
41415862
JW		 1953 uint32_t status;
1954 int i = 0;
1955 int retval = 0;
dea3101e 1956
41415862
JW		 1957 /* Read the HBA Host Status Register */
1958 status = readl(phba->HSregaddr);
dea3101e 1959
41415862
JW		 1960 /*
1961 * Check status register every 100ms for 5 retries, then every
1962 * 500ms for 5, then every 2.5 sec for 5, then reset board and
1963 * every 2.5 sec for 4.
1964 * Break our of the loop if errors occurred during init.
1965 */
1966 while (((status & mask) != mask) &&
1967 !(status & HS_FFERM) &&
1968 i++ < 20) {
dea3101e 1969
41415862
JW		 1970 if (i <= 5)
1971 msleep(10);
1972 else if (i <= 10)
1973 msleep(500);
1974 else
1975 msleep(2500);
dea3101e 1976
41415862 1977 if (i == 15) {
2e0fef85 1978 /* Do post */
92d7f7b0 1979 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW		 1980 lpfc_sli_brdrestart(phba);
1981 }
1982 /* Read the HBA Host Status Register */
1983 status = readl(phba->HSregaddr);
1984 }
dea3101e 1985
41415862
JW		 1986 /* Check to see if any errors occurred during init */
1987 if ((status & HS_FFERM) || (i >= 20)) {
2e0fef85 1988 phba->link_state = LPFC_HBA_ERROR;
41415862 1989 retval = 1;
dea3101e 1990 }
dea3101e 1991
41415862
JW		 1992 return retval;
1993}
dea3101e 1994
9290831f
JS		 1995#define BARRIER_TEST_PATTERN (0xdeadbeef)
1996
2e0fef85 1997void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 1998{
65a29c16
JS		 1999 uint32_t __iomem *resp_buf;
2000 uint32_t __iomem *mbox_buf;
9290831f
JS		 2001 volatile uint32_t mbox;
2002 uint32_t hc_copy;
2003 int i;
2004 uint8_t hdrtype;
2005
2006 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
2007 if (hdrtype != 0x80 ||
2008 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
2009 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
2010 return;
2011
2012 /*
2013 * Tell the other part of the chip to suspend temporarily all
2014 * its DMA activity.
2015 */
65a29c16 2016 resp_buf = phba->MBslimaddr;
9290831f
JS		 2017
2018 /* Disable the error attention */
2019 hc_copy = readl(phba->HCregaddr);
2020 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
2021 readl(phba->HCregaddr); /* flush */
2e0fef85 2022 phba->link_flag |= LS_IGNORE_ERATT;
9290831f
JS		 2023
2024 if (readl(phba->HAregaddr) & HA_ERATT) {
2025 /* Clear Chip error bit */
2026 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 2027 phba->pport->stopped = 1;
9290831f
JS		 2028 }
2029
2030 mbox = 0;
2031 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
2032 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
2033
2034 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 2035 mbox_buf = phba->MBslimaddr;
9290831f
JS		 2036 writel(mbox, mbox_buf);
2037
2038 for (i = 0;
2039 readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
2040 mdelay(1);
2041
2042 if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
2043 if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
2e0fef85 2044 phba->pport->stopped)
9290831f
JS		 2045 goto restore_hc;
2046 else
2047 goto clear_errat;
2048 }
2049
2050 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
2051 for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
2052 mdelay(1);
2053
2054clear_errat:
2055
2056 while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
2057 mdelay(1);
2058
2059 if (readl(phba->HAregaddr) & HA_ERATT) {
2060 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 2061 phba->pport->stopped = 1;
9290831f
JS		 2062 }
2063
2064restore_hc:
2e0fef85 2065 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS		 2066 writel(hc_copy, phba->HCregaddr);
2067 readl(phba->HCregaddr); /* flush */
2068}
2069
41415862 2070int
2e0fef85 2071lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW		 2072{
2073 struct lpfc_sli *psli;
2074 LPFC_MBOXQ_t *pmb;
2075 uint32_t status;
2076 uint32_t ha_copy;
2077 int retval;
2078 int i = 0;
dea3101e 2079
41415862 2080 psli = &phba->sli;
dea3101e 2081
41415862 2082 /* Kill HBA */
ed957684 2083 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 2084 "0329 Kill HBA Data: x%x x%x\n",
2085 phba->pport->port_state, psli->sli_flag);
41415862 2086
98c9ea5c
JS		 2087 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2088 if (!pmb)
41415862 2089 return 1;
41415862
JW		 2090
2091 /* Disable the error attention */
2e0fef85 2092 spin_lock_irq(&phba->hbalock);
41415862
JW		 2093 status = readl(phba->HCregaddr);
2094 status &= ~HC_ERINT_ENA;
2095 writel(status, phba->HCregaddr);
2096 readl(phba->HCregaddr); /* flush */
2e0fef85
JS		 2097 phba->link_flag |= LS_IGNORE_ERATT;
2098 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2099
2100 lpfc_kill_board(phba, pmb);
2101 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
2102 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2103
2104 if (retval != MBX_SUCCESS) {
2105 if (retval != MBX_BUSY)
2106 mempool_free(pmb, phba->mbox_mem_pool);
2e0fef85
JS		 2107 spin_lock_irq(&phba->hbalock);
2108 phba->link_flag &= ~LS_IGNORE_ERATT;
2109 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2110 return 1;
2111 }
2112
9290831f
JS		 2113 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
2114
41415862
JW		 2115 mempool_free(pmb, phba->mbox_mem_pool);
2116
2117 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
2118 * attention every 100ms for 3 seconds. If we don't get ERATT after
2119 * 3 seconds we still set HBA_ERROR state because the status of the
2120 * board is now undefined.
2121 */
2122 ha_copy = readl(phba->HAregaddr);
2123
2124 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
2125 mdelay(100);
2126 ha_copy = readl(phba->HAregaddr);
2127 }
2128
2129 del_timer_sync(&psli->mbox_tmo);
9290831f
JS		 2130 if (ha_copy & HA_ERATT) {
2131 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 2132 phba->pport->stopped = 1;
9290831f 2133 }
2e0fef85 2134 spin_lock_irq(&phba->hbalock);
41415862 2135 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85
JS		 2136 phba->link_flag &= ~LS_IGNORE_ERATT;
2137 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2138
2139 psli->mbox_active = NULL;
2140 lpfc_hba_down_post(phba);
2e0fef85 2141 phba->link_state = LPFC_HBA_ERROR;
41415862 2142
2e0fef85 2143 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB		 2144}
2145
41415862 2146int
2e0fef85 2147lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 2148{
41415862 2149 struct lpfc_sli *psli;
dea3101e 2150 struct lpfc_sli_ring *pring;
41415862 2151 uint16_t cfg_value;
dea3101e 2152 int i;
dea3101e 2153
41415862 2154 psli = &phba->sli;
dea3101e 2155
41415862
JW		 2156 /* Reset HBA */
2157 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 2158 "0325 Reset HBA Data: x%x x%x\n",
2e0fef85 2159 phba->pport->port_state, psli->sli_flag);
dea3101e
JB		 2160
2161 /* perform board reset */
2162 phba->fc_eventTag = 0;
2e0fef85
JS		 2163 phba->pport->fc_myDID = 0;
2164 phba->pport->fc_prevDID = 0;
dea3101e 2165
41415862
JW		 2166 /* Turn off parity checking and serr during the physical reset */
2167 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
2168 pci_write_config_word(phba->pcidev, PCI_COMMAND,
2169 (cfg_value &
2170 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
2171
1c067a42 2172 psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
41415862
JW		 2173 /* Now toggle INITFF bit in the Host Control Register */
2174 writel(HC_INITFF, phba->HCregaddr);
2175 mdelay(1);
2176 readl(phba->HCregaddr); /* flush */
2177 writel(0, phba->HCregaddr);
2178 readl(phba->HCregaddr); /* flush */
2179
2180 /* Restore PCI cmd register */
2181 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB		 2182
2183 /* Initialize relevant SLI info */
41415862
JW		 2184 for (i = 0; i < psli->num_rings; i++) {
2185 pring = &psli->ring[i];
dea3101e
JB		 2186 pring->flag = 0;
2187 pring->rspidx = 0;
2188 pring->next_cmdidx = 0;
2189 pring->local_getidx = 0;
2190 pring->cmdidx = 0;
2191 pring->missbufcnt = 0;
2192 }
dea3101e 2193
2e0fef85 2194 phba->link_state = LPFC_WARM_START;
41415862
JW		 2195 return 0;
2196}
2197
2198int
2e0fef85 2199lpfc_sli_brdrestart(struct lpfc_hba *phba)
41415862
JW		 2200{
2201 MAILBOX_t *mb;
2202 struct lpfc_sli *psli;
2203 uint16_t skip_post;
2204 volatile uint32_t word0;
2205 void __iomem *to_slim;
2206
2e0fef85 2207 spin_lock_irq(&phba->hbalock);
41415862
JW		 2208
2209 psli = &phba->sli;
2210
2211 /* Restart HBA */
2212 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 2213 "0337 Restart HBA Data: x%x x%x\n",
2e0fef85 2214 phba->pport->port_state, psli->sli_flag);
41415862
JW		 2215
2216 word0 = 0;
2217 mb = (MAILBOX_t *) &word0;
2218 mb->mbxCommand = MBX_RESTART;
2219 mb->mbxHc = 1;
2220
9290831f
JS		 2221 lpfc_reset_barrier(phba);
2222
41415862
JW		 2223 to_slim = phba->MBslimaddr;
2224 writel(*(uint32_t *) mb, to_slim);
2225 readl(to_slim); /* flush */
2226
2227 /* Only skip post after fc_ffinit is completed */
2e0fef85 2228 if (phba->pport->port_state) {
41415862
JW		 2229 skip_post = 1;
2230 word0 = 1; /* This is really setting up word1 */
dea3101e 2231 } else {
41415862
JW		 2232 skip_post = 0;
2233 word0 = 0; /* This is really setting up word1 */
dea3101e 2234 }
65a29c16 2235 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW		 2236 writel(*(uint32_t *) mb, to_slim);
2237 readl(to_slim); /* flush */
dea3101e 2238
41415862 2239 lpfc_sli_brdreset(phba);
2e0fef85
JS		 2240 phba->pport->stopped = 0;
2241 phba->link_state = LPFC_INIT_START;
41415862 2242
2e0fef85 2243 spin_unlock_irq(&phba->hbalock);
41415862 2244
64ba8818
JS		 2245 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
2246 psli->stats_start = get_seconds();
2247
41415862
JW		 2248 if (skip_post)
2249 mdelay(100);
2250 else
2251 mdelay(2000);
2252
2253 lpfc_hba_down_post(phba);
dea3101e
JB		 2254
2255 return 0;
2256}
2257
2258static int
2259lpfc_sli_chipset_init(struct lpfc_hba *phba)
2260{
2261 uint32_t status, i = 0;
2262
2263 /* Read the HBA Host Status Register */
2264 status = readl(phba->HSregaddr);
2265
2266 /* Check status register to see what current state is */
2267 i = 0;
2268 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
2269
2270 /* Check every 100ms for 5 retries, then every 500ms for 5, then
2271 * every 2.5 sec for 5, then reset board and every 2.5 sec for
2272 * 4.
2273 */
2274 if (i++ >= 20) {
2275 /* Adapter failed to init, timeout, status reg
2276 <status> */
ed957684 2277 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2278 "0436 Adapter failed to init, "
09372820
JS		 2279 "timeout, status reg x%x, "
2280 "FW Data: A8 x%x AC x%x\n", status,
2281 readl(phba->MBslimaddr + 0xa8),
2282 readl(phba->MBslimaddr + 0xac));
2e0fef85 2283 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2284 return -ETIMEDOUT;
2285 }
2286
2287 /* Check to see if any errors occurred during init */
2288 if (status & HS_FFERM) {
2289 /* ERROR: During chipset initialization */
2290 /* Adapter failed to init, chipset, status reg
2291 <status> */
ed957684 2292 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2293 "0437 Adapter failed to init, "
09372820
JS		 2294 "chipset, status reg x%x, "
2295 "FW Data: A8 x%x AC x%x\n", status,
2296 readl(phba->MBslimaddr + 0xa8),
2297 readl(phba->MBslimaddr + 0xac));
2e0fef85 2298 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2299 return -EIO;
2300 }
2301
2302 if (i <= 5) {
2303 msleep(10);
2304 } else if (i <= 10) {
2305 msleep(500);
2306 } else {
2307 msleep(2500);
2308 }
2309
2310 if (i == 15) {
2e0fef85 2311 /* Do post */
92d7f7b0 2312 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2313 lpfc_sli_brdrestart(phba);
dea3101e
JB		 2314 }
2315 /* Read the HBA Host Status Register */
2316 status = readl(phba->HSregaddr);
2317 }
2318
2319 /* Check to see if any errors occurred during init */
2320 if (status & HS_FFERM) {
2321 /* ERROR: During chipset initialization */
2322 /* Adapter failed to init, chipset, status reg <status> */
ed957684 2323 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2324 "0438 Adapter failed to init, chipset, "
09372820
JS		 2325 "status reg x%x, "
2326 "FW Data: A8 x%x AC x%x\n", status,
2327 readl(phba->MBslimaddr + 0xa8),
2328 readl(phba->MBslimaddr + 0xac));
2e0fef85 2329 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2330 return -EIO;
2331 }
2332
2333 /* Clear all interrupt enable conditions */
2334 writel(0, phba->HCregaddr);
2335 readl(phba->HCregaddr); /* flush */
2336
2337 /* setup host attn register */
2338 writel(0xffffffff, phba->HAregaddr);
2339 readl(phba->HAregaddr); /* flush */
2340 return 0;
2341}
2342
78b2d852 2343int
ed957684
JS		 2344lpfc_sli_hbq_count(void)
2345{
92d7f7b0 2346 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS		 2347}
2348
2349static int
2350lpfc_sli_hbq_entry_count(void)
2351{
2352 int hbq_count = lpfc_sli_hbq_count();
2353 int count = 0;
2354 int i;
2355
2356 for (i = 0; i < hbq_count; ++i)
92d7f7b0 2357 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS		 2358 return count;
2359}
2360
dea3101e 2361int
ed957684
JS		 2362lpfc_sli_hbq_size(void)
2363{
2364 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
2365}
2366
2367static int
2368lpfc_sli_hbq_setup(struct lpfc_hba *phba)
2369{
2370 int hbq_count = lpfc_sli_hbq_count();
2371 LPFC_MBOXQ_t *pmb;
2372 MAILBOX_t *pmbox;
2373 uint32_t hbqno;
2374 uint32_t hbq_entry_index;
ed957684 2375
92d7f7b0
JS		 2376 /* Get a Mailbox buffer to setup mailbox
2377 * commands for HBA initialization
2378 */
ed957684
JS		 2379 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2380
2381 if (!pmb)
2382 return -ENOMEM;
2383
2384 pmbox = &pmb->mb;
2385
2386 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
2387 phba->link_state = LPFC_INIT_MBX_CMDS;
3163f725 2388 phba->hbq_in_use = 1;
ed957684
JS		 2389
2390 hbq_entry_index = 0;
2391 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2392 phba->hbqs[hbqno].next_hbqPutIdx = 0;
2393 phba->hbqs[hbqno].hbqPutIdx = 0;
2394 phba->hbqs[hbqno].local_hbqGetIdx = 0;
2395 phba->hbqs[hbqno].entry_count =
92d7f7b0 2396 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS		 2397 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
2398 hbq_entry_index, pmb);
ed957684
JS		 2399 hbq_entry_index += phba->hbqs[hbqno].entry_count;
2400
2401 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
2402 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
2403 mbxStatus <status>, ring <num> */
2404
2405 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2406 LOG_SLI | LOG_VPORT,
e8b62011 2407 "1805 Adapter failed to init. "
ed957684 2408 "Data: x%x x%x x%x\n",
e8b62011 2409 pmbox->mbxCommand,
ed957684
JS		 2410 pmbox->mbxStatus, hbqno);
2411
2412 phba->link_state = LPFC_HBA_ERROR;
2413 mempool_free(pmb, phba->mbox_mem_pool);
ed957684
JS		 2414 return ENXIO;
2415 }
2416 }
2417 phba->hbq_count = hbq_count;
2418
ed957684
JS		 2419 mempool_free(pmb, phba->mbox_mem_pool);
2420
92d7f7b0
JS		 2421 /* Initially populate or replenish the HBQs */
2422 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2423 if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
2424 return -ENOMEM;
2425 }
ed957684
JS		 2426 return 0;
2427}
2428
2429static int
2430lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB		 2431{
2432 LPFC_MBOXQ_t *pmb;
2433 uint32_t resetcount = 0, rc = 0, done = 0;
2434
2435 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2436 if (!pmb) {
2e0fef85 2437 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2438 return -ENOMEM;
2439 }
2440
ed957684 2441 phba->sli_rev = sli_mode;
dea3101e 2442 while (resetcount < 2 && !done) {
2e0fef85 2443 spin_lock_irq(&phba->hbalock);
1c067a42 2444 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2445 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2446 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2447 lpfc_sli_brdrestart(phba);
dea3101e
JB		 2448 msleep(2500);
2449 rc = lpfc_sli_chipset_init(phba);
2450 if (rc)
2451 break;
2452
2e0fef85 2453 spin_lock_irq(&phba->hbalock);
1c067a42 2454 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2455 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 2456 resetcount++;
2457
ed957684
JS		 2458 /* Call pre CONFIG_PORT mailbox command initialization. A
2459 * value of 0 means the call was successful. Any other
2460 * nonzero value is a failure, but if ERESTART is returned,
2461 * the driver may reset the HBA and try again.
2462 */
dea3101e
JB		 2463 rc = lpfc_config_port_prep(phba);
2464 if (rc == -ERESTART) {
ed957684 2465 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e
JB		 2466 continue;
2467 } else if (rc) {
2468 break;
2469 }
2470
2e0fef85 2471 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB		 2472 lpfc_config_port(phba, pmb);
2473 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
ed957684 2474 if (rc != MBX_SUCCESS) {
dea3101e 2475 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2476 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 2477 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
e8b62011 2478 pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
2e0fef85 2479 spin_lock_irq(&phba->hbalock);
dea3101e 2480 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85
JS		 2481 spin_unlock_irq(&phba->hbalock);
2482 rc = -ENXIO;
ed957684
JS		 2483 } else {
2484 done = 1;
92d7f7b0
JS		 2485 phba->max_vpi = (phba->max_vpi &&
2486 pmb->mb.un.varCfgPort.gmv) != 0
2487 ? pmb->mb.un.varCfgPort.max_vpi
2488 : 0;
dea3101e
JB		 2489 }
2490 }
ed957684
JS		 2491
2492 if (!done) {
2493 rc = -EINVAL;
2494 goto do_prep_failed;
2495 }
2496
2497 if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
92d7f7b0 2498 (!pmb->mb.un.varCfgPort.cMA)) {
ed957684 2499 rc = -ENXIO;
ed957684 2500 }
ed957684 2501
92d7f7b0 2502do_prep_failed:
ed957684
JS		 2503 mempool_free(pmb, phba->mbox_mem_pool);
2504 return rc;
2505}
2506
2507int
2508lpfc_sli_hba_setup(struct lpfc_hba *phba)
2509{
2510 uint32_t rc;
92d7f7b0 2511 int mode = 3;
ed957684
JS		 2512
2513 switch (lpfc_sli_mode) {
2514 case 2:
78b2d852 2515 if (phba->cfg_enable_npiv) {
92d7f7b0 2516 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011 2517 "1824 NPIV enabled: Override lpfc_sli_mode "
92d7f7b0 2518 "parameter (%d) to auto (0).\n",
e8b62011 2519 lpfc_sli_mode);
92d7f7b0
JS		 2520 break;
2521 }
ed957684
JS		 2522 mode = 2;
2523 break;
2524 case 0:
2525 case 3:
2526 break;
2527 default:
92d7f7b0 2528 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2529 "1819 Unrecognized lpfc_sli_mode "
2530 "parameter: %d.\n", lpfc_sli_mode);
ed957684
JS		 2531
2532 break;
2533 }
2534
2535 rc = lpfc_do_config_port(phba, mode);
2536 if (rc && lpfc_sli_mode == 3)
92d7f7b0 2537 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2538 "1820 Unable to select SLI-3. "
2539 "Not supported by adapter.\n");
ed957684
JS		 2540 if (rc && mode != 2)
2541 rc = lpfc_do_config_port(phba, 2);
2542 if (rc)
dea3101e
JB		 2543 goto lpfc_sli_hba_setup_error;
2544
ed957684
JS		 2545 if (phba->sli_rev == 3) {
2546 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
2547 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
2548 phba->sli3_options |= LPFC_SLI3_ENABLED;
2549 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
2550
2551 } else {
2552 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
2553 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 2554 phba->sli3_options = 0;
ed957684
JS		 2555 }
2556
2557 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 2558 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
2559 phba->sli_rev, phba->max_vpi);
ed957684 2560 rc = lpfc_sli_ring_map(phba);
dea3101e
JB		 2561
2562 if (rc)
2563 goto lpfc_sli_hba_setup_error;
2564
92d7f7b0 2565 /* Init HBQs */
ed957684
JS		 2566
2567 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
2568 rc = lpfc_sli_hbq_setup(phba);
2569 if (rc)
2570 goto lpfc_sli_hba_setup_error;
2571 }
2572
dea3101e
JB		 2573 phba->sli.sli_flag |= LPFC_PROCESS_LA;
2574
2575 rc = lpfc_config_port_post(phba);
2576 if (rc)
2577 goto lpfc_sli_hba_setup_error;
2578
ed957684
JS		 2579 return rc;
2580
92d7f7b0 2581lpfc_sli_hba_setup_error:
2e0fef85 2582 phba->link_state = LPFC_HBA_ERROR;
ed957684 2583 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2584 "0445 Firmware initialization failed\n");
dea3101e
JB		 2585 return rc;
2586}
2587
dea3101e
JB		 2588/*! lpfc_mbox_timeout
2589 *
2590 * \pre
2591 * \post
2592 * \param hba Pointer to per struct lpfc_hba structure
2593 * \param l1 Pointer to the driver's mailbox queue.
2594 * \return
2595 * void
2596 *
2597 * \b Description:
2598 *
2599 * This routine handles mailbox timeout events at timer interrupt context.
2600 */
2601void
2602lpfc_mbox_timeout(unsigned long ptr)
2603{
92d7f7b0 2604 struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
dea3101e 2605 unsigned long iflag;
2e0fef85 2606 uint32_t tmo_posted;
dea3101e 2607
2e0fef85 2608 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
92d7f7b0 2609 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
2e0fef85
JS		 2610 if (!tmo_posted)
2611 phba->pport->work_port_events |= WORKER_MBOX_TMO;
2612 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
2613
2614 if (!tmo_posted) {
92d7f7b0 2615 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 2616 if (phba->work_wait)
92d7f7b0
JS		 2617 lpfc_worker_wake_up(phba);
2618 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 2619 }
dea3101e
JB		 2620}
2621
2622void
2623lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
2624{
2e0fef85
JS		 2625 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
2626 MAILBOX_t *mb = &pmbox->mb;
1dcb58e5
JS		 2627 struct lpfc_sli *psli = &phba->sli;
2628 struct lpfc_sli_ring *pring;
dea3101e 2629
2e0fef85 2630 if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
dea3101e
JB		 2631 return;
2632 }
2633
dea3101e 2634 /* Mbox cmd <mbxCommand> timeout */
ed957684 2635 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2636 "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
92d7f7b0
JS		 2637 mb->mbxCommand,
2638 phba->pport->port_state,
2639 phba->sli.sli_flag,
2640 phba->sli.mbox_active);
dea3101e 2641
1dcb58e5
JS		 2642 /* Setting state unknown so lpfc_sli_abort_iocb_ring
2643 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
2644 * it to fail all oustanding SCSI IO.
2645 */
2e0fef85
JS		 2646 spin_lock_irq(&phba->pport->work_port_lock);
2647 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
2648 spin_unlock_irq(&phba->pport->work_port_lock);
2649 spin_lock_irq(&phba->hbalock);
2650 phba->link_state = LPFC_LINK_UNKNOWN;
1dcb58e5 2651 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85 2652 spin_unlock_irq(&phba->hbalock);
1dcb58e5
JS		 2653
2654 pring = &psli->ring[psli->fcp_ring];
2655 lpfc_sli_abort_iocb_ring(phba, pring);
2656
2657 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
76bb24ef 2658 "0345 Resetting board due to mailbox timeout\n");
1dcb58e5
JS		 2659 /*
2660 * lpfc_offline calls lpfc_sli_hba_down which will clean up
2661 * on oustanding mailbox commands.
2662 */
13815c83
JS		 2663 /* If resets are disabled then set error state and return. */
2664 if (!phba->cfg_enable_hba_reset) {
2665 phba->link_state = LPFC_HBA_ERROR;
2666 return;
2667 }
1dcb58e5
JS		 2668 lpfc_offline_prep(phba);
2669 lpfc_offline(phba);
2670 lpfc_sli_brdrestart(phba);
58da1ffb 2671 lpfc_online(phba);
1dcb58e5 2672 lpfc_unblock_mgmt_io(phba);
dea3101e
JB		 2673 return;
2674}
2675
2676int
2e0fef85 2677lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
dea3101e 2678{
dea3101e 2679 MAILBOX_t *mb;
2e0fef85 2680 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB		 2681 uint32_t status, evtctr;
2682 uint32_t ha_copy;
2683 int i;
09372820 2684 unsigned long timeout;
dea3101e
JB		 2685 unsigned long drvr_flag = 0;
2686 volatile uint32_t word0, ldata;
2687 void __iomem *to_slim;
58da1ffb
JS		 2688 int processing_queue = 0;
2689
2690 spin_lock_irqsave(&phba->hbalock, drvr_flag);
2691 if (!pmbox) {
2692 /* processing mbox queue from intr_handler */
2693 processing_queue = 1;
2694 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2695 pmbox = lpfc_mbox_get(phba);
2696 if (!pmbox) {
2697 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
2698 return MBX_SUCCESS;
2699 }
2700 }
dea3101e 2701
ed957684 2702 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 2703 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684 2704 if(!pmbox->vport) {
58da1ffb 2705 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
ed957684 2706 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2707 LOG_MBOX | LOG_VPORT,
e8b62011 2708 "1806 Mbox x%x failed. No vport\n",
ed957684
JS		 2709 pmbox->mb.mbxCommand);
2710 dump_stack();
58da1ffb 2711 goto out_not_finished;
ed957684
JS		 2712 }
2713 }
2714
8d63f375 2715 /* If the PCI channel is in offline state, do not post mbox. */
58da1ffb
JS		 2716 if (unlikely(pci_channel_offline(phba->pcidev))) {
2717 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
2718 goto out_not_finished;
2719 }
8d63f375 2720
dea3101e 2721 psli = &phba->sli;
92d7f7b0 2722
dea3101e
JB		 2723 mb = &pmbox->mb;
2724 status = MBX_SUCCESS;
2725
2e0fef85
JS		 2726 if (phba->link_state == LPFC_HBA_ERROR) {
2727 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW		 2728
2729 /* Mbox command <mbxCommand> cannot issue */
7f5f3d0d 2730 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
58da1ffb 2731 goto out_not_finished;
41415862
JW		 2732 }
2733
9290831f
JS		 2734 if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
2735 !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
2e0fef85 2736 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7f5f3d0d 2737 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
58da1ffb 2738 goto out_not_finished;
9290831f
JS		 2739 }
2740
dea3101e
JB		 2741 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
2742 /* Polling for a mbox command when another one is already active
2743 * is not allowed in SLI. Also, the driver must have established
2744 * SLI2 mode to queue and process multiple mbox commands.
2745 */
2746
2747 if (flag & MBX_POLL) {
2e0fef85 2748 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB		 2749
2750 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2751 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
58da1ffb 2752 goto out_not_finished;
dea3101e
JB		 2753 }
2754
2755 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
2e0fef85 2756 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2757 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2758 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
58da1ffb 2759 goto out_not_finished;
dea3101e
JB		 2760 }
2761
dea3101e
JB		 2762 /* Another mailbox command is still being processed, queue this
2763 * command to be processed later.
2764 */
2765 lpfc_mbox_put(phba, pmbox);
2766
2767 /* Mbox cmd issue - BUSY */
ed957684 2768 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2769 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 2770 "x%x x%x x%x x%x\n",
92d7f7b0
JS		 2771 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
2772 mb->mbxCommand, phba->pport->port_state,
2773 psli->sli_flag, flag);
dea3101e
JB		 2774
2775 psli->slistat.mbox_busy++;
2e0fef85 2776 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2777
858c9f6c
JS		 2778 if (pmbox->vport) {
2779 lpfc_debugfs_disc_trc(pmbox->vport,
2780 LPFC_DISC_TRC_MBOX_VPORT,
2781 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
2782 (uint32_t)mb->mbxCommand,
2783 mb->un.varWords[0], mb->un.varWords[1]);
2784 }
2785 else {
2786 lpfc_debugfs_disc_trc(phba->pport,
2787 LPFC_DISC_TRC_MBOX,
2788 "MBOX Bsy: cmd:x%x mb:x%x x%x",
2789 (uint32_t)mb->mbxCommand,
2790 mb->un.varWords[0], mb->un.varWords[1]);
2791 }
2792
2e0fef85 2793 return MBX_BUSY;
dea3101e
JB		 2794 }
2795
dea3101e
JB		 2796 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2797
2798 /* If we are not polling, we MUST be in SLI2 mode */
2799 if (flag != MBX_POLL) {
41415862
JW		 2800 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
2801 (mb->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 2802 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2803 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2804 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2805 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
58da1ffb 2806 goto out_not_finished;
dea3101e
JB		 2807 }
2808 /* timeout active mbox command */
a309a6b6
JS		 2809 mod_timer(&psli->mbox_tmo, (jiffies +
2810 (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
dea3101e
JB		 2811 }
2812
2813 /* Mailbox cmd <cmd> issue */
ed957684 2814 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2815 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 2816 "x%x\n",
e8b62011 2817 pmbox->vport ? pmbox->vport->vpi : 0,
92d7f7b0
JS		 2818 mb->mbxCommand, phba->pport->port_state,
2819 psli->sli_flag, flag);
dea3101e 2820
858c9f6c
JS		 2821 if (mb->mbxCommand != MBX_HEARTBEAT) {
2822 if (pmbox->vport) {
2823 lpfc_debugfs_disc_trc(pmbox->vport,
2824 LPFC_DISC_TRC_MBOX_VPORT,
2825 "MBOX Send vport: cmd:x%x mb:x%x x%x",
2826 (uint32_t)mb->mbxCommand,
2827 mb->un.varWords[0], mb->un.varWords[1]);
2828 }
2829 else {
2830 lpfc_debugfs_disc_trc(phba->pport,
2831 LPFC_DISC_TRC_MBOX,
2832 "MBOX Send: cmd:x%x mb:x%x x%x",
2833 (uint32_t)mb->mbxCommand,
2834 mb->un.varWords[0], mb->un.varWords[1]);
2835 }
2836 }
2837
dea3101e
JB		 2838 psli->slistat.mbox_cmd++;
2839 evtctr = psli->slistat.mbox_event;
2840
2841 /* next set own bit for the adapter and copy over command word */
2842 mb->mbxOwner = OWN_CHIP;
2843
2844 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2845 /* First copy command data to host SLIM area */
4cc2da1d 2846 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
dea3101e 2847 } else {
9290831f 2848 if (mb->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 2849 /* copy command data into host mbox for cmpl */
4cc2da1d 2850 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
92d7f7b0 2851 MAILBOX_CMD_SIZE);
dea3101e
JB		 2852 }
2853
2854 /* First copy mbox command data to HBA SLIM, skip past first
2855 word */
2856 to_slim = phba->MBslimaddr + sizeof (uint32_t);
2857 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
2858 MAILBOX_CMD_SIZE - sizeof (uint32_t));
2859
2860 /* Next copy over first word, with mbxOwner set */
2861 ldata = *((volatile uint32_t *)mb);
2862 to_slim = phba->MBslimaddr;
2863 writel(ldata, to_slim);
2864 readl(to_slim); /* flush */
2865
2866 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2867 /* switch over to host mailbox */
2868 psli->sli_flag |= LPFC_SLI2_ACTIVE;
2869 }
2870 }
2871
2872 wmb();
dea3101e
JB		 2873
2874 switch (flag) {
2875 case MBX_NOWAIT:
09372820 2876 /* Set up reference to mailbox command */
dea3101e 2877 psli->mbox_active = pmbox;
09372820
JS		 2878 /* Interrupt board to do it */
2879 writel(CA_MBATT, phba->CAregaddr);
2880 readl(phba->CAregaddr); /* flush */
2881 /* Don't wait for it to finish, just return */
dea3101e
JB		 2882 break;
2883
2884 case MBX_POLL:
09372820 2885 /* Set up null reference to mailbox command */
dea3101e 2886 psli->mbox_active = NULL;
09372820
JS		 2887 /* Interrupt board to do it */
2888 writel(CA_MBATT, phba->CAregaddr);
2889 readl(phba->CAregaddr); /* flush */
2890
dea3101e
JB		 2891 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2892 /* First read mbox status word */
4cc2da1d 2893 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
dea3101e
JB		 2894 word0 = le32_to_cpu(word0);
2895 } else {
2896 /* First read mbox status word */
2897 word0 = readl(phba->MBslimaddr);
2898 }
2899
2900 /* Read the HBA Host Attention Register */
2901 ha_copy = readl(phba->HAregaddr);
09372820
JS		 2902 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2903 mb->mbxCommand) *
2904 1000) + jiffies;
2905 i = 0;
dea3101e 2906 /* Wait for command to complete */
41415862
JW		 2907 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
2908 (!(ha_copy & HA_MBATT) &&
2e0fef85 2909 (phba->link_state > LPFC_WARM_START))) {
09372820 2910 if (time_after(jiffies, timeout)) {
dea3101e 2911 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2912 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 2913 drvr_flag);
58da1ffb 2914 goto out_not_finished;
dea3101e
JB		 2915 }
2916
2917 /* Check if we took a mbox interrupt while we were
2918 polling */
2919 if (((word0 & OWN_CHIP) != OWN_CHIP)
2920 && (evtctr != psli->slistat.mbox_event))
2921 break;
2922
09372820
JS		 2923 if (i++ > 10) {
2924 spin_unlock_irqrestore(&phba->hbalock,
2925 drvr_flag);
2926 msleep(1);
2927 spin_lock_irqsave(&phba->hbalock, drvr_flag);
2928 }
dea3101e
JB		 2929
2930 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2931 /* First copy command data */
4cc2da1d
JSEC		 2932 word0 = *((volatile uint32_t *)
2933 &phba->slim2p->mbx);
dea3101e
JB		 2934 word0 = le32_to_cpu(word0);
2935 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2936 MAILBOX_t *slimmb;
2937 volatile uint32_t slimword0;
2938 /* Check real SLIM for any errors */
2939 slimword0 = readl(phba->MBslimaddr);
2940 slimmb = (MAILBOX_t *) & slimword0;
2941 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
2942 && slimmb->mbxStatus) {
2943 psli->sli_flag &=
2944 ~LPFC_SLI2_ACTIVE;
2945 word0 = slimword0;
2946 }
2947 }
2948 } else {
2949 /* First copy command data */
2950 word0 = readl(phba->MBslimaddr);
2951 }
2952 /* Read the HBA Host Attention Register */
2953 ha_copy = readl(phba->HAregaddr);
2954 }
2955
2956 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2957 /* copy results back to user */
4cc2da1d 2958 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
92d7f7b0 2959 MAILBOX_CMD_SIZE);
dea3101e
JB		 2960 } else {
2961 /* First copy command data */
2962 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
2963 MAILBOX_CMD_SIZE);
2964 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
2965 pmbox->context2) {
92d7f7b0 2966 lpfc_memcpy_from_slim((void *)pmbox->context2,
dea3101e
JB		 2967 phba->MBslimaddr + DMP_RSP_OFFSET,
2968 mb->un.varDmp.word_cnt);
2969 }
2970 }
2971
2972 writel(HA_MBATT, phba->HAregaddr);
2973 readl(phba->HAregaddr); /* flush */
2974
2975 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2976 status = mb->mbxStatus;
2977 }
2978
2e0fef85
JS		 2979 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
2980 return status;
58da1ffb
JS		 2981
2982out_not_finished:
2983 if (processing_queue) {
2984 pmbox->mb.mbxStatus = MBX_NOT_FINISHED;
2985 lpfc_mbox_cmpl_put(phba, pmbox);
2986 }
2987 return MBX_NOT_FINISHED;
dea3101e
JB		 2988}
2989
92d7f7b0
JS		 2990/*
2991 * Caller needs to hold lock.
2992 */
858c9f6c 2993static void
92d7f7b0 2994__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2995 struct lpfc_iocbq *piocb)
dea3101e
JB		 2996{
2997 /* Insert the caller's iocb in the txq tail for later processing. */
2998 list_add_tail(&piocb->list, &pring->txq);
2999 pring->txq_cnt++;
dea3101e
JB		 3000}
3001
3002static struct lpfc_iocbq *
3003lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 3004 struct lpfc_iocbq **piocb)
dea3101e
JB		 3005{
3006 struct lpfc_iocbq * nextiocb;
3007
3008 nextiocb = lpfc_sli_ringtx_get(phba, pring);
3009 if (!nextiocb) {
3010 nextiocb = *piocb;
3011 *piocb = NULL;
3012 }
3013
3014 return nextiocb;
3015}
3016
92d7f7b0
JS		 3017/*
3018 * Lockless version of lpfc_sli_issue_iocb.
3019 */
98c9ea5c 3020static int
92d7f7b0 3021__lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB		 3022 struct lpfc_iocbq *piocb, uint32_t flag)
3023{
3024 struct lpfc_iocbq *nextiocb;
3025 IOCB_t *iocb;
3026
92d7f7b0
JS		 3027 if (piocb->iocb_cmpl && (!piocb->vport) &&
3028 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
3029 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
3030 lpfc_printf_log(phba, KERN_ERR,
3031 LOG_SLI | LOG_VPORT,
e8b62011 3032 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS		 3033 piocb->iocb.ulpCommand);
3034 dump_stack();
3035 return IOCB_ERROR;
3036 }
3037
3038
8d63f375
LV		 3039 /* If the PCI channel is in offline state, do not post iocbs. */
3040 if (unlikely(pci_channel_offline(phba->pcidev)))
3041 return IOCB_ERROR;
3042
dea3101e
JB		 3043 /*
3044 * We should never get an IOCB if we are in a < LINK_DOWN state
3045 */
2e0fef85 3046 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB		 3047 return IOCB_ERROR;
3048
3049 /*
3050 * Check to see if we are blocking IOCB processing because of a
0b727fea 3051 * outstanding event.
dea3101e 3052 */
0b727fea 3053 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e
JB		 3054 goto iocb_busy;
3055
2e0fef85 3056 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 3057 /*
2680eeaa 3058 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB		 3059 * can be issued if the link is not up.
3060 */
3061 switch (piocb->iocb.ulpCommand) {
3062 case CMD_QUE_RING_BUF_CN:
3063 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB		 3064 /*
3065 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
3066 * completion, iocb_cmpl MUST be 0.
3067 */
3068 if (piocb->iocb_cmpl)
3069 piocb->iocb_cmpl = NULL;
3070 /*FALLTHROUGH*/
3071 case CMD_CREATE_XRI_CR:
2680eeaa
JS		 3072 case CMD_CLOSE_XRI_CN:
3073 case CMD_CLOSE_XRI_CX:
dea3101e
JB		 3074 break;
3075 default:
3076 goto iocb_busy;
3077 }
3078
3079 /*
3080 * For FCP commands, we must be in a state where we can process link
3081 * attention events.
3082 */
3083 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
92d7f7b0 3084 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 3085 goto iocb_busy;
92d7f7b0 3086 }
dea3101e 3087
dea3101e
JB		 3088 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
3089 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
3090 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
3091
3092 if (iocb)
3093 lpfc_sli_update_ring(phba, pring);
3094 else
3095 lpfc_sli_update_full_ring(phba, pring);
3096
3097 if (!piocb)
3098 return IOCB_SUCCESS;
3099
3100 goto out_busy;
3101
3102 iocb_busy:
3103 pring->stats.iocb_cmd_delay++;
3104
3105 out_busy:
3106
3107 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 3108 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB		 3109 return IOCB_SUCCESS;
3110 }
3111
3112 return IOCB_BUSY;
3113}
3114
92d7f7b0
JS		 3115
3116int
3117lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3118 struct lpfc_iocbq *piocb, uint32_t flag)
3119{
3120 unsigned long iflags;
3121 int rc;
3122
3123 spin_lock_irqsave(&phba->hbalock, iflags);
3124 rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
3125 spin_unlock_irqrestore(&phba->hbalock, iflags);
3126
3127 return rc;
3128}
3129
cf5bf97e
JW		 3130static int
3131lpfc_extra_ring_setup( struct lpfc_hba *phba)
3132{
3133 struct lpfc_sli *psli;
3134 struct lpfc_sli_ring *pring;
3135
3136 psli = &phba->sli;
3137
3138 /* Adjust cmd/rsp ring iocb entries more evenly */
a4bc3379
JS		 3139
3140 /* Take some away from the FCP ring */
cf5bf97e
JW		 3141 pring = &psli->ring[psli->fcp_ring];
3142 pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3143 pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3144 pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3145 pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
3146
a4bc3379
JS		 3147 /* and give them to the extra ring */
3148 pring = &psli->ring[psli->extra_ring];
3149
cf5bf97e
JW		 3150 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3151 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3152 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3153 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
3154
3155 /* Setup default profile for this ring */
3156 pring->iotag_max = 4096;
3157 pring->num_mask = 1;
3158 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS		 3159 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
3160 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW		 3161 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
3162 return 0;
3163}
3164
98c9ea5c 3165static void
57127f15
JS		 3166lpfc_sli_async_event_handler(struct lpfc_hba * phba,
3167 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
3168{
3169 IOCB_t *icmd;
3170 uint16_t evt_code;
3171 uint16_t temp;
3172 struct temp_event temp_event_data;
3173 struct Scsi_Host *shost;
3174
3175 icmd = &iocbq->iocb;
3176 evt_code = icmd->un.asyncstat.evt_code;
3177 temp = icmd->ulpContext;
3178
3179 if ((evt_code != ASYNC_TEMP_WARN) &&
3180 (evt_code != ASYNC_TEMP_SAFE)) {
3181 lpfc_printf_log(phba,
3182 KERN_ERR,
3183 LOG_SLI,
76bb24ef 3184 "0346 Ring %d handler: unexpected ASYNC_STATUS"
57127f15
JS		 3185 " evt_code 0x%x\n",
3186 pring->ringno,
3187 icmd->un.asyncstat.evt_code);
3188 return;
3189 }
3190 temp_event_data.data = (uint32_t)temp;
3191 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
3192 if (evt_code == ASYNC_TEMP_WARN) {
3193 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
3194 lpfc_printf_log(phba,
09372820 3195 KERN_ERR,
57127f15 3196 LOG_TEMP,
76bb24ef 3197 "0347 Adapter is very hot, please take "
57127f15
JS		 3198 "corrective action. temperature : %d Celsius\n",
3199 temp);
3200 }
3201 if (evt_code == ASYNC_TEMP_SAFE) {
3202 temp_event_data.event_code = LPFC_NORMAL_TEMP;
3203 lpfc_printf_log(phba,
09372820 3204 KERN_ERR,
57127f15
JS		 3205 LOG_TEMP,
3206 "0340 Adapter temperature is OK now. "
3207 "temperature : %d Celsius\n",
3208 temp);
3209 }
3210
3211 /* Send temperature change event to applications */
3212 shost = lpfc_shost_from_vport(phba->pport);
3213 fc_host_post_vendor_event(shost, fc_get_event_number(),
3214 sizeof(temp_event_data), (char *) &temp_event_data,
3215 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
3216
3217}
3218
3219
dea3101e
JB		 3220int
3221lpfc_sli_setup(struct lpfc_hba *phba)
3222{
ed957684 3223 int i, totiocbsize = 0;
dea3101e
JB		 3224 struct lpfc_sli *psli = &phba->sli;
3225 struct lpfc_sli_ring *pring;
3226
3227 psli->num_rings = MAX_CONFIGURED_RINGS;
3228 psli->sli_flag = 0;
3229 psli->fcp_ring = LPFC_FCP_RING;
3230 psli->next_ring = LPFC_FCP_NEXT_RING;
a4bc3379 3231 psli->extra_ring = LPFC_EXTRA_RING;
dea3101e 3232
604a3e30
JB		 3233 psli->iocbq_lookup = NULL;
3234 psli->iocbq_lookup_len = 0;
3235 psli->last_iotag = 0;
3236
dea3101e
JB		 3237 for (i = 0; i < psli->num_rings; i++) {
3238 pring = &psli->ring[i];
3239 switch (i) {
3240 case LPFC_FCP_RING: /* ring 0 - FCP */
3241 /* numCiocb and numRiocb are used in config_port */
3242 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
3243 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
3244 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3245 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3246 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3247 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
ed957684 3248 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3249 SLI3_IOCB_CMD_SIZE :
3250 SLI2_IOCB_CMD_SIZE;
ed957684 3251 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3252 SLI3_IOCB_RSP_SIZE :
3253 SLI2_IOCB_RSP_SIZE;
dea3101e
JB		 3254 pring->iotag_ctr = 0;
3255 pring->iotag_max =
92d7f7b0 3256 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB		 3257 pring->fast_iotag = pring->iotag_max;
3258 pring->num_mask = 0;
3259 break;
a4bc3379 3260 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e
JB		 3261 /* numCiocb and numRiocb are used in config_port */
3262 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
3263 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
ed957684 3264 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3265 SLI3_IOCB_CMD_SIZE :
3266 SLI2_IOCB_CMD_SIZE;
ed957684 3267 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3268 SLI3_IOCB_RSP_SIZE :
3269 SLI2_IOCB_RSP_SIZE;
2e0fef85 3270 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB		 3271 pring->num_mask = 0;
3272 break;
3273 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
3274 /* numCiocb and numRiocb are used in config_port */
3275 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
3276 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
ed957684 3277 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3278 SLI3_IOCB_CMD_SIZE :
3279 SLI2_IOCB_CMD_SIZE;
ed957684 3280 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3281 SLI3_IOCB_RSP_SIZE :
3282 SLI2_IOCB_RSP_SIZE;
dea3101e
JB		 3283 pring->fast_iotag = 0;
3284 pring->iotag_ctr = 0;
3285 pring->iotag_max = 4096;
57127f15
JS		 3286 pring->lpfc_sli_rcv_async_status =
3287 lpfc_sli_async_event_handler;
dea3101e
JB		 3288 pring->num_mask = 4;
3289 pring->prt[0].profile = 0; /* Mask 0 */
3290 pring->prt[0].rctl = FC_ELS_REQ;
3291 pring->prt[0].type = FC_ELS_DATA;
3292 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 3293 lpfc_els_unsol_event;
dea3101e
JB		 3294 pring->prt[1].profile = 0; /* Mask 1 */
3295 pring->prt[1].rctl = FC_ELS_RSP;
3296 pring->prt[1].type = FC_ELS_DATA;
3297 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 3298 lpfc_els_unsol_event;
dea3101e
JB		 3299 pring->prt[2].profile = 0; /* Mask 2 */
3300 /* NameServer Inquiry */
3301 pring->prt[2].rctl = FC_UNSOL_CTL;
3302 /* NameServer */
3303 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
3304 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 3305 lpfc_ct_unsol_event;
dea3101e
JB		 3306 pring->prt[3].profile = 0; /* Mask 3 */
3307 /* NameServer response */
3308 pring->prt[3].rctl = FC_SOL_CTL;
3309 /* NameServer */
3310 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
3311 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 3312 lpfc_ct_unsol_event;
dea3101e
JB		 3313 break;
3314 }
ed957684 3315 totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
92d7f7b0 3316 (pring->numRiocb * pring->sizeRiocb);
dea3101e 3317 }
ed957684 3318 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 3319 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS		 3320 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
3321 "SLI2 SLIM Data: x%x x%lx\n",
3322 phba->brd_no, totiocbsize,
3323 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 3324 }
cf5bf97e
JW		 3325 if (phba->cfg_multi_ring_support == 2)
3326 lpfc_extra_ring_setup(phba);
dea3101e
JB		 3327
3328 return 0;
3329}
3330
3331int
2e0fef85 3332lpfc_sli_queue_setup(struct lpfc_hba *phba)
dea3101e
JB		 3333{
3334 struct lpfc_sli *psli;
3335 struct lpfc_sli_ring *pring;
604a3e30 3336 int i;
dea3101e
JB		 3337
3338 psli = &phba->sli;
2e0fef85 3339 spin_lock_irq(&phba->hbalock);
dea3101e 3340 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 3341 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB		 3342 /* Initialize list headers for txq and txcmplq as double linked lists */
3343 for (i = 0; i < psli->num_rings; i++) {
3344 pring = &psli->ring[i];
3345 pring->ringno = i;
3346 pring->next_cmdidx = 0;
3347 pring->local_getidx = 0;
3348 pring->cmdidx = 0;
3349 INIT_LIST_HEAD(&pring->txq);
3350 INIT_LIST_HEAD(&pring->txcmplq);
3351 INIT_LIST_HEAD(&pring->iocb_continueq);
9c2face6 3352 INIT_LIST_HEAD(&pring->iocb_continue_saveq);
dea3101e 3353 INIT_LIST_HEAD(&pring->postbufq);
dea3101e 3354 }
2e0fef85
JS		 3355 spin_unlock_irq(&phba->hbalock);
3356 return 1;
dea3101e
JB		 3357}
3358
92d7f7b0
JS		 3359int
3360lpfc_sli_host_down(struct lpfc_vport *vport)
3361{
858c9f6c 3362 LIST_HEAD(completions);
92d7f7b0
JS		 3363 struct lpfc_hba *phba = vport->phba;
3364 struct lpfc_sli *psli = &phba->sli;
3365 struct lpfc_sli_ring *pring;
3366 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS		 3367 int i;
3368 unsigned long flags = 0;
3369 uint16_t prev_pring_flag;
3370
3371 lpfc_cleanup_discovery_resources(vport);
3372
3373 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0
JS		 3374 for (i = 0; i < psli->num_rings; i++) {
3375 pring = &psli->ring[i];
3376 prev_pring_flag = pring->flag;
858c9f6c
JS		 3377 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3378 pring->flag |= LPFC_DEFERRED_RING_EVENT;
92d7f7b0
JS		 3379 /*
3380 * Error everything on the txq since these iocbs have not been
3381 * given to the FW yet.
3382 */
92d7f7b0
JS		 3383 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
3384 if (iocb->vport != vport)
3385 continue;
858c9f6c 3386 list_move_tail(&iocb->list, &completions);
92d7f7b0 3387 pring->txq_cnt--;
92d7f7b0
JS		 3388 }
3389
3390 /* Next issue ABTS for everything on the txcmplq */
3391 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
3392 list) {
3393 if (iocb->vport != vport)
3394 continue;
3395 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3396 }
3397
3398 pring->flag = prev_pring_flag;
3399 }
3400
3401 spin_unlock_irqrestore(&phba->hbalock, flags);
3402
858c9f6c
JS		 3403 while (!list_empty(&completions)) {
3404 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
3405
3406 if (!iocb->iocb_cmpl)
3407 lpfc_sli_release_iocbq(phba, iocb);
3408 else {
3409 iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3410 iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
3411 (iocb->iocb_cmpl) (phba, iocb, iocb);
3412 }
3413 }
92d7f7b0
JS		 3414 return 1;
3415}
3416
dea3101e 3417int
2e0fef85 3418lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 3419{
2534ba75 3420 LIST_HEAD(completions);
2e0fef85 3421 struct lpfc_sli *psli = &phba->sli;
dea3101e 3422 struct lpfc_sli_ring *pring;
0ff10d46 3423 struct lpfc_dmabuf *buf_ptr;
dea3101e 3424 LPFC_MBOXQ_t *pmb;
2534ba75
JS		 3425 struct lpfc_iocbq *iocb;
3426 IOCB_t *cmd = NULL;
dea3101e
JB		 3427 int i;
3428 unsigned long flags = 0;
3429
dea3101e
JB		 3430 lpfc_hba_down_prep(phba);
3431
92d7f7b0
JS		 3432 lpfc_fabric_abort_hba(phba);
3433
2e0fef85 3434 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e
JB		 3435 for (i = 0; i < psli->num_rings; i++) {
3436 pring = &psli->ring[i];
858c9f6c
JS		 3437 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3438 pring->flag |= LPFC_DEFERRED_RING_EVENT;
dea3101e
JB		 3439
3440 /*
3441 * Error everything on the txq since these iocbs have not been
3442 * given to the FW yet.
3443 */
2534ba75 3444 list_splice_init(&pring->txq, &completions);
dea3101e
JB		 3445 pring->txq_cnt = 0;
3446
2534ba75 3447 }
2e0fef85 3448 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 3449
2534ba75 3450 while (!list_empty(&completions)) {
92d7f7b0 3451 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
2534ba75 3452 cmd = &iocb->iocb;
dea3101e 3453
2e0fef85
JS		 3454 if (!iocb->iocb_cmpl)
3455 lpfc_sli_release_iocbq(phba, iocb);
3456 else {
2534ba75
JS		 3457 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
3458 cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
3459 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 3460 }
dea3101e
JB		 3461 }
3462
0ff10d46
JS		 3463 spin_lock_irqsave(&phba->hbalock, flags);
3464 list_splice_init(&phba->elsbuf, &completions);
3465 phba->elsbuf_cnt = 0;
3466 phba->elsbuf_prev_cnt = 0;
3467 spin_unlock_irqrestore(&phba->hbalock, flags);
3468
3469 while (!list_empty(&completions)) {
3470 list_remove_head(&completions, buf_ptr,
3471 struct lpfc_dmabuf, list);
3472 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
3473 kfree(buf_ptr);
3474 }
3475
dea3101e
JB		 3476 /* Return any active mbox cmds */
3477 del_timer_sync(&psli->mbox_tmo);
92d7f7b0 3478 spin_lock_irqsave(&phba->hbalock, flags);
2e0fef85 3479
92d7f7b0 3480 spin_lock(&phba->pport->work_port_lock);
2e0fef85 3481 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
92d7f7b0 3482 spin_unlock(&phba->pport->work_port_lock);
2e0fef85 3483
92d7f7b0
JS		 3484 if (psli->mbox_active) {
3485 list_add_tail(&psli->mbox_active->list, &completions);
2e0fef85 3486 psli->mbox_active = NULL;
2e0fef85 3487 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
dea3101e 3488 }
dea3101e 3489
92d7f7b0
JS		 3490 /* Return any pending or completed mbox cmds */
3491 list_splice_init(&phba->sli.mboxq, &completions);
3492 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
3493 INIT_LIST_HEAD(&psli->mboxq);
3494 INIT_LIST_HEAD(&psli->mboxq_cmpl);
3495
3496 spin_unlock_irqrestore(&phba->hbalock, flags);
3497
3498 while (!list_empty(&completions)) {
3499 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
dea3101e
JB		 3500 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
3501 if (pmb->mbox_cmpl) {
dea3101e 3502 pmb->mbox_cmpl(phba,pmb);
dea3101e
JB		 3503 }
3504 }
dea3101e
JB		 3505 return 1;
3506}
3507
3508void
3509lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
3510{
3511 uint32_t *src = srcp;
3512 uint32_t *dest = destp;
3513 uint32_t ldata;
3514 int i;
3515
3516 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
3517 ldata = *src;
3518 ldata = le32_to_cpu(ldata);
3519 *dest = ldata;
3520 src++;
3521 dest++;
3522 }
3523}
3524
3525int
2e0fef85
JS		 3526lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3527 struct lpfc_dmabuf *mp)
dea3101e
JB		 3528{
3529 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
3530 later */
2e0fef85 3531 spin_lock_irq(&phba->hbalock);
dea3101e 3532 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 3533 pring->postbufq_cnt++;
2e0fef85 3534 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 3535 return 0;
3536}
3537
76bb24ef
JS		 3538uint32_t
3539lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
3540{
3541 spin_lock_irq(&phba->hbalock);
3542 phba->buffer_tag_count++;
3543 /*
3544 * Always set the QUE_BUFTAG_BIT to distiguish between
3545 * a tag assigned by HBQ.
3546 */
3547 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
3548 spin_unlock_irq(&phba->hbalock);
3549 return phba->buffer_tag_count;
3550}
3551
3552struct lpfc_dmabuf *
3553lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3554 uint32_t tag)
3555{
3556 struct lpfc_dmabuf *mp, *next_mp;
3557 struct list_head *slp = &pring->postbufq;
3558
3559 /* Search postbufq, from the begining, looking for a match on tag */
3560 spin_lock_irq(&phba->hbalock);
3561 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
3562 if (mp->buffer_tag == tag) {
3563 list_del_init(&mp->list);
3564 pring->postbufq_cnt--;
3565 spin_unlock_irq(&phba->hbalock);
3566 return mp;
3567 }
3568 }
3569
3570 spin_unlock_irq(&phba->hbalock);
3571 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3572 "0410 Cannot find virtual addr for buffer tag on "
3573 "ring %d Data x%lx x%p x%p x%x\n",
3574 pring->ringno, (unsigned long) tag,
3575 slp->next, slp->prev, pring->postbufq_cnt);
3576
3577 return NULL;
3578}
dea3101e
JB		 3579
3580struct lpfc_dmabuf *
3581lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3582 dma_addr_t phys)
3583{
3584 struct lpfc_dmabuf *mp, *next_mp;
3585 struct list_head *slp = &pring->postbufq;
3586
3587 /* Search postbufq, from the begining, looking for a match on phys */
2e0fef85 3588 spin_lock_irq(&phba->hbalock);
dea3101e
JB		 3589 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
3590 if (mp->phys == phys) {
3591 list_del_init(&mp->list);
3592 pring->postbufq_cnt--;
2e0fef85 3593 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 3594 return mp;
3595 }
3596 }
3597
2e0fef85 3598 spin_unlock_irq(&phba->hbalock);
dea3101e 3599 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 3600 "0410 Cannot find virtual addr for mapped buf on "
dea3101e 3601 "ring %d Data x%llx x%p x%p x%x\n",
e8b62011 3602 pring->ringno, (unsigned long long)phys,
dea3101e
JB		 3603 slp->next, slp->prev, pring->postbufq_cnt);
3604 return NULL;
3605}
3606
3607static void
2e0fef85
JS		 3608lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3609 struct lpfc_iocbq *rspiocb)
dea3101e 3610{
2e0fef85 3611 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 3612 uint16_t abort_iotag, abort_context;
92d7f7b0 3613 struct lpfc_iocbq *abort_iocb;
2680eeaa
JS		 3614 struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
3615
3616 abort_iocb = NULL;
2680eeaa
JS		 3617
3618 if (irsp->ulpStatus) {
3619 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
3620 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
3621
2e0fef85 3622 spin_lock_irq(&phba->hbalock);
2680eeaa
JS		 3623 if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
3624 abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
3625
92d7f7b0 3626 lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
e8b62011 3627 "0327 Cannot abort els iocb %p "
92d7f7b0
JS		 3628 "with tag %x context %x, abort status %x, "
3629 "abort code %x\n",
e8b62011
JS		 3630 abort_iocb, abort_iotag, abort_context,
3631 irsp->ulpStatus, irsp->un.ulpWord[4]);
2680eeaa 3632
58da1ffb
JS		 3633 /*
3634 * If the iocb is not found in Firmware queue the iocb
3635 * might have completed already. Do not free it again.
3636 */
3637 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
3638 (irsp->un.ulpWord[4] == IOERR_NO_XRI)) {
3639 spin_unlock_irq(&phba->hbalock);
3640 lpfc_sli_release_iocbq(phba, cmdiocb);
3641 return;
3642 }
2680eeaa
JS		 3643 /*
3644 * make sure we have the right iocbq before taking it
3645 * off the txcmplq and try to call completion routine.
3646 */
2e0fef85
JS		 3647 if (!abort_iocb ||
3648 abort_iocb->iocb.ulpContext != abort_context ||
3649 (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
3650 spin_unlock_irq(&phba->hbalock);
3651 else {
92d7f7b0 3652 list_del_init(&abort_iocb->list);
2680eeaa 3653 pring->txcmplq_cnt--;
2e0fef85 3654 spin_unlock_irq(&phba->hbalock);
2680eeaa 3655
0ff10d46
JS		 3656 /* Firmware could still be in progress of DMAing
3657 * payload, so don't free data buffer till after
3658 * a hbeat.
3659 */
3660 abort_iocb->iocb_flag |= LPFC_DELAY_MEM_FREE;
3661
92d7f7b0
JS		 3662 abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3663 abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3664 abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
3665 (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
2680eeaa
JS		 3666 }
3667 }
3668
604a3e30 3669 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB		 3670 return;
3671}
3672
92d7f7b0
JS		 3673static void
3674lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3675 struct lpfc_iocbq *rspiocb)
3676{
3677 IOCB_t *irsp = &rspiocb->iocb;
3678
3679 /* ELS cmd tag <ulpIoTag> completes */
3680 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
e8b62011 3681 "0133 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 3682 "x%x x%x x%x\n",
e8b62011 3683 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 3684 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS		 3685 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
3686 lpfc_ct_free_iocb(phba, cmdiocb);
3687 else
3688 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS		 3689 return;
3690}
3691
dea3101e 3692int
2e0fef85
JS		 3693lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3694 struct lpfc_iocbq *cmdiocb)
dea3101e 3695{
2e0fef85 3696 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 3697 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB		 3698 IOCB_t *icmd = NULL;
3699 IOCB_t *iabt = NULL;
07951076
JS		 3700 int retval = IOCB_ERROR;
3701
92d7f7b0
JS		 3702 /*
3703 * There are certain command types we don't want to abort. And we
3704 * don't want to abort commands that are already in the process of
3705 * being aborted.
07951076
JS		 3706 */
3707 icmd = &cmdiocb->iocb;
2e0fef85 3708 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS		 3709 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
3710 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS		 3711 return 0;
3712
858c9f6c
JS		 3713 /* If we're unloading, don't abort iocb on the ELS ring, but change the
3714 * callback so that nothing happens when it finishes.
07951076 3715 */
858c9f6c
JS		 3716 if ((vport->load_flag & FC_UNLOADING) &&
3717 (pring->ringno == LPFC_ELS_RING)) {
92d7f7b0
JS		 3718 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
3719 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
3720 else
3721 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
07951076 3722 goto abort_iotag_exit;
92d7f7b0 3723 }
dea3101e
JB		 3724
3725 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 3726 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB		 3727 if (abtsiocbp == NULL)
3728 return 0;
dea3101e 3729
07951076
JS		 3730 /* This signals the response to set the correct status
3731 * before calling the completion handler.
3732 */
3733 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
3734
dea3101e 3735 iabt = &abtsiocbp->iocb;
07951076
JS		 3736 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
3737 iabt->un.acxri.abortContextTag = icmd->ulpContext;
3738 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
3739 iabt->ulpLe = 1;
3740 iabt->ulpClass = icmd->ulpClass;
dea3101e 3741
2e0fef85 3742 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS		 3743 iabt->ulpCommand = CMD_ABORT_XRI_CN;
3744 else
3745 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 3746
07951076 3747 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
5b8bd0c9 3748
e8b62011
JS		 3749 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
3750 "0339 Abort xri x%x, original iotag x%x, "
3751 "abort cmd iotag x%x\n",
3752 iabt->un.acxri.abortContextTag,
3753 iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
92d7f7b0 3754 retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
dea3101e 3755
07951076 3756abort_iotag_exit:
2e0fef85
JS		 3757 /*
3758 * Caller to this routine should check for IOCB_ERROR
3759 * and handle it properly. This routine no longer removes
3760 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 3761 */
2e0fef85 3762 return retval;
dea3101e
JB		 3763}
3764
3765static int
51ef4c26
JS		 3766lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
3767 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 3768 lpfc_ctx_cmd ctx_cmd)
dea3101e 3769{
0bd4ca25
JSEC		 3770 struct lpfc_scsi_buf *lpfc_cmd;
3771 struct scsi_cmnd *cmnd;
dea3101e
JB		 3772 int rc = 1;
3773
0bd4ca25
JSEC		 3774 if (!(iocbq->iocb_flag & LPFC_IO_FCP))
3775 return rc;
3776
51ef4c26
JS		 3777 if (iocbq->vport != vport)
3778 return rc;
3779
0bd4ca25
JSEC		 3780 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
3781 cmnd = lpfc_cmd->pCmd;
3782
3783 if (cmnd == NULL)
dea3101e
JB		 3784 return rc;
3785
3786 switch (ctx_cmd) {
3787 case LPFC_CTX_LUN:
0bd4ca25
JSEC		 3788 if ((cmnd->device->id == tgt_id) &&
3789 (cmnd->device->lun == lun_id))
dea3101e
JB		 3790 rc = 0;
3791 break;
3792 case LPFC_CTX_TGT:
0bd4ca25 3793 if (cmnd->device->id == tgt_id)
dea3101e
JB		 3794 rc = 0;
3795 break;
dea3101e
JB		 3796 case LPFC_CTX_HOST:
3797 rc = 0;
3798 break;
3799 default:
3800 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
3801 __FUNCTION__, ctx_cmd);
3802 break;
3803 }
3804
3805 return rc;
3806}
3807
3808int
51ef4c26
JS		 3809lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
3810 lpfc_ctx_cmd ctx_cmd)
dea3101e 3811{
51ef4c26 3812 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC		 3813 struct lpfc_iocbq *iocbq;
3814 int sum, i;
dea3101e 3815
0bd4ca25
JSEC		 3816 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
3817 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3818
51ef4c26
JS		 3819 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
3820 ctx_cmd) == 0)
0bd4ca25 3821 sum++;
dea3101e 3822 }
0bd4ca25 3823
dea3101e
JB		 3824 return sum;
3825}
3826
5eb95af0 3827void
2e0fef85
JS		 3828lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3829 struct lpfc_iocbq *rspiocb)
5eb95af0 3830{
604a3e30 3831 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC		 3832 return;
3833}
3834
dea3101e 3835int
51ef4c26
JS		 3836lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
3837 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 3838{
51ef4c26 3839 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC		 3840 struct lpfc_iocbq *iocbq;
3841 struct lpfc_iocbq *abtsiocb;
dea3101e 3842 IOCB_t *cmd = NULL;
dea3101e 3843 int errcnt = 0, ret_val = 0;
0bd4ca25 3844 int i;
dea3101e 3845
0bd4ca25
JSEC		 3846 for (i = 1; i <= phba->sli.last_iotag; i++) {
3847 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3848
51ef4c26 3849 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 3850 abort_cmd) != 0)
dea3101e
JB		 3851 continue;
3852
3853 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 3854 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB		 3855 if (abtsiocb == NULL) {
3856 errcnt++;
3857 continue;
3858 }
dea3101e 3859
0bd4ca25 3860 cmd = &iocbq->iocb;
dea3101e
JB		 3861 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
3862 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
3863 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
3864 abtsiocb->iocb.ulpLe = 1;
3865 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2e0fef85 3866 abtsiocb->vport = phba->pport;
dea3101e 3867
2e0fef85 3868 if (lpfc_is_link_up(phba))
dea3101e
JB		 3869 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
3870 else
3871 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
3872
5eb95af0
JSEC		 3873 /* Setup callback routine and issue the command. */
3874 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
dea3101e
JB		 3875 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
3876 if (ret_val == IOCB_ERROR) {
604a3e30 3877 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB		 3878 errcnt++;
3879 continue;
3880 }
3881 }
3882
3883 return errcnt;
3884}
3885
68876920
JSEC		 3886static void
3887lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
3888 struct lpfc_iocbq *cmdiocbq,
3889 struct lpfc_iocbq *rspiocbq)
dea3101e 3890{
68876920
JSEC		 3891 wait_queue_head_t *pdone_q;
3892 unsigned long iflags;
dea3101e 3893
2e0fef85 3894 spin_lock_irqsave(&phba->hbalock, iflags);
68876920
JSEC		 3895 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
3896 if (cmdiocbq->context2 && rspiocbq)
3897 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
3898 &rspiocbq->iocb, sizeof(IOCB_t));
3899
3900 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC		 3901 if (pdone_q)
3902 wake_up(pdone_q);
858c9f6c 3903 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB		 3904 return;
3905}
3906
68876920
JSEC		 3907/*
3908 * Issue the caller's iocb and wait for its completion, but no longer than the
3909 * caller's timeout. Note that iocb_flags is cleared before the
3910 * lpfc_sli_issue_call since the wake routine sets a unique value and by
3911 * definition this is a wait function.
3912 */
92d7f7b0 3913
dea3101e 3914int
2e0fef85
JS		 3915lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
3916 struct lpfc_sli_ring *pring,
3917 struct lpfc_iocbq *piocb,
3918 struct lpfc_iocbq *prspiocbq,
68876920 3919 uint32_t timeout)
dea3101e 3920{
7259f0d0 3921 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC		 3922 long timeleft, timeout_req = 0;
3923 int retval = IOCB_SUCCESS;
875fbdfe 3924 uint32_t creg_val;
dea3101e
JB		 3925
3926 /*
68876920
JSEC		 3927 * If the caller has provided a response iocbq buffer, then context2
3928 * is NULL or its an error.
dea3101e 3929 */
68876920
JSEC		 3930 if (prspiocbq) {
3931 if (piocb->context2)
3932 return IOCB_ERROR;
3933 piocb->context2 = prspiocbq;
dea3101e
JB		 3934 }
3935
68876920
JSEC		 3936 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
3937 piocb->context_un.wait_queue = &done_q;
3938 piocb->iocb_flag &= ~LPFC_IO_WAKE;
dea3101e 3939
875fbdfe
JSEC		 3940 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3941 creg_val = readl(phba->HCregaddr);
3942 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
3943 writel(creg_val, phba->HCregaddr);
3944 readl(phba->HCregaddr); /* flush */
3945 }
3946
68876920
JSEC		 3947 retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
3948 if (retval == IOCB_SUCCESS) {
3949 timeout_req = timeout * HZ;
68876920
JSEC		 3950 timeleft = wait_event_timeout(done_q,
3951 piocb->iocb_flag & LPFC_IO_WAKE,
3952 timeout_req);
dea3101e 3953
7054a606
JS		 3954 if (piocb->iocb_flag & LPFC_IO_WAKE) {
3955 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3956 "0331 IOCB wake signaled\n");
7054a606 3957 } else if (timeleft == 0) {
68876920 3958 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3959 "0338 IOCB wait timeout error - no "
3960 "wake response Data x%x\n", timeout);
68876920 3961 retval = IOCB_TIMEDOUT;
7054a606 3962 } else {
68876920 3963 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3964 "0330 IOCB wake NOT set, "
3965 "Data x%x x%lx\n",
68876920
JSEC		 3966 timeout, (timeleft / jiffies));
3967 retval = IOCB_TIMEDOUT;
dea3101e 3968 }
68876920
JSEC		 3969 } else {
3970 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 3971 ":0332 IOCB wait issue failed, Data x%x\n",
3972 retval);
68876920 3973 retval = IOCB_ERROR;
dea3101e
JB		 3974 }
3975
875fbdfe
JSEC		 3976 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3977 creg_val = readl(phba->HCregaddr);
3978 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
3979 writel(creg_val, phba->HCregaddr);
3980 readl(phba->HCregaddr); /* flush */
3981 }
3982
68876920
JSEC		 3983 if (prspiocbq)
3984 piocb->context2 = NULL;
3985
3986 piocb->context_un.wait_queue = NULL;
3987 piocb->iocb_cmpl = NULL;
dea3101e
JB		 3988 return retval;
3989}
68876920 3990
dea3101e 3991int
2e0fef85 3992lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB		 3993 uint32_t timeout)
3994{
7259f0d0 3995 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
dea3101e 3996 int retval;
858c9f6c 3997 unsigned long flag;
dea3101e
JB		 3998
3999 /* The caller must leave context1 empty. */
98c9ea5c 4000 if (pmboxq->context1)
2e0fef85 4001 return MBX_NOT_FINISHED;
dea3101e
JB		 4002
4003 /* setup wake call as IOCB callback */
4004 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
4005 /* setup context field to pass wait_queue pointer to wake function */
4006 pmboxq->context1 = &done_q;
4007
dea3101e
JB		 4008 /* now issue the command */
4009 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
4010
4011 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
7054a606
JS		 4012 wait_event_interruptible_timeout(done_q,
4013 pmboxq->mbox_flag & LPFC_MBX_WAKE,
4014 timeout * HZ);
4015
858c9f6c 4016 spin_lock_irqsave(&phba->hbalock, flag);
dea3101e 4017 pmboxq->context1 = NULL;
7054a606
JS		 4018 /*
4019 * if LPFC_MBX_WAKE flag is set the mailbox is completed
4020 * else do not free the resources.
4021 */
4022 if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
dea3101e 4023 retval = MBX_SUCCESS;
858c9f6c 4024 else {
7054a606 4025 retval = MBX_TIMEOUT;
858c9f6c
JS		 4026 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
4027 }
4028 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e
JB		 4029 }
4030
dea3101e
JB		 4031 return retval;
4032}
4033
b4c02652
JS		 4034int
4035lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
4036{
2e0fef85 4037 struct lpfc_vport *vport = phba->pport;
b4c02652 4038 int i = 0;
ed957684 4039 uint32_t ha_copy;
b4c02652 4040
2e0fef85 4041 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
b4c02652
JS		 4042 if (i++ > LPFC_MBOX_TMO * 1000)
4043 return 1;
4044
ed957684
JS		 4045 /*
4046 * Call lpfc_sli_handle_mb_event only if a mailbox cmd
4047 * did finish. This way we won't get the misleading
4048 * "Stray Mailbox Interrupt" message.
4049 */
4050 spin_lock_irq(&phba->hbalock);
4051 ha_copy = phba->work_ha;
4052 phba->work_ha &= ~HA_MBATT;
4053 spin_unlock_irq(&phba->hbalock);
4054
4055 if (ha_copy & HA_MBATT)
4056 if (lpfc_sli_handle_mb_event(phba) == 0)
4057 i = 0;
b4c02652
JS		 4058
4059 msleep(1);
4060 }
4061
4062 return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
4063}
4064
dea3101e 4065irqreturn_t
7d12e780 4066lpfc_intr_handler(int irq, void *dev_id)
dea3101e 4067{
2e0fef85 4068 struct lpfc_hba *phba;
dea3101e
JB		 4069 uint32_t ha_copy;
4070 uint32_t work_ha_copy;
4071 unsigned long status;
dea3101e
JB		 4072 uint32_t control;
4073
92d7f7b0 4074 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS		 4075 struct lpfc_vport *vport;
4076 struct lpfc_nodelist *ndlp;
4077 struct lpfc_dmabuf *mp;
92d7f7b0
JS		 4078 LPFC_MBOXQ_t *pmb;
4079 int rc;
4080
dea3101e
JB		 4081 /*
4082 * Get the driver's phba structure from the dev_id and
4083 * assume the HBA is not interrupting.
4084 */
4085 phba = (struct lpfc_hba *) dev_id;
4086
4087 if (unlikely(!phba))
4088 return IRQ_NONE;
4089
8d63f375
LV		 4090 /* If the pci channel is offline, ignore all the interrupts. */
4091 if (unlikely(pci_channel_offline(phba->pcidev)))
4092 return IRQ_NONE;
4093
dea3101e
JB		 4094 phba->sli.slistat.sli_intr++;
4095
4096 /*
4097 * Call the HBA to see if it is interrupting. If not, don't claim
4098 * the interrupt
4099 */
4100
4101 /* Ignore all interrupts during initialization. */
2e0fef85 4102 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB		 4103 return IRQ_NONE;
4104
4105 /*
4106 * Read host attention register to determine interrupt source
4107 * Clear Attention Sources, except Error Attention (to
4108 * preserve status) and Link Attention
4109 */
2e0fef85 4110 spin_lock(&phba->hbalock);
dea3101e 4111 ha_copy = readl(phba->HAregaddr);
ebdbe65f
JS		 4112 /* If somebody is waiting to handle an eratt don't process it
4113 * here. The brdkill function will do this.
4114 */
2e0fef85 4115 if (phba->link_flag & LS_IGNORE_ERATT)
ebdbe65f 4116 ha_copy &= ~HA_ERATT;
dea3101e
JB		 4117 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
4118 readl(phba->HAregaddr); /* flush */
2e0fef85 4119 spin_unlock(&phba->hbalock);
dea3101e
JB		 4120
4121 if (unlikely(!ha_copy))
4122 return IRQ_NONE;
4123
4124 work_ha_copy = ha_copy & phba->work_ha_mask;
4125
4126 if (unlikely(work_ha_copy)) {
4127 if (work_ha_copy & HA_LATT) {
4128 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
4129 /*
4130 * Turn off Link Attention interrupts
4131 * until CLEAR_LA done
4132 */
2e0fef85 4133 spin_lock(&phba->hbalock);
dea3101e
JB		 4134 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
4135 control = readl(phba->HCregaddr);
4136 control &= ~HC_LAINT_ENA;
4137 writel(control, phba->HCregaddr);
4138 readl(phba->HCregaddr); /* flush */
2e0fef85 4139 spin_unlock(&phba->hbalock);
dea3101e
JB		 4140 }
4141 else
4142 work_ha_copy &= ~HA_LATT;
4143 }
4144
4145 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
858c9f6c
JS		 4146 /*
4147 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
4148 * the only slow ring.
4149 */
4150 status = (work_ha_copy &
4151 (HA_RXMASK << (4*LPFC_ELS_RING)));
4152 status >>= (4*LPFC_ELS_RING);
4153 if (status & HA_RXMASK) {
4154 spin_lock(&phba->hbalock);
4155 control = readl(phba->HCregaddr);
a58cbd52
JS		 4156
4157 lpfc_debugfs_slow_ring_trc(phba,
4158 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
4159 control, status,
4160 (uint32_t)phba->sli.slistat.sli_intr);
4161
858c9f6c 4162 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS		 4163 lpfc_debugfs_slow_ring_trc(phba,
4164 "ISR Disable ring:"
4165 "pwork:x%x hawork:x%x wait:x%x",
4166 phba->work_ha, work_ha_copy,
4167 (uint32_t)((unsigned long)
4168 phba->work_wait));
4169
858c9f6c
JS		 4170 control &=
4171 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB		 4172 writel(control, phba->HCregaddr);
4173 readl(phba->HCregaddr); /* flush */
dea3101e 4174 }
a58cbd52
JS		 4175 else {
4176 lpfc_debugfs_slow_ring_trc(phba,
4177 "ISR slow ring: pwork:"
4178 "x%x hawork:x%x wait:x%x",
4179 phba->work_ha, work_ha_copy,
4180 (uint32_t)((unsigned long)
4181 phba->work_wait));
4182 }
858c9f6c 4183 spin_unlock(&phba->hbalock);
dea3101e
JB		 4184 }
4185 }
4186
4187 if (work_ha_copy & HA_ERATT) {
dea3101e
JB		 4188 /*
4189 * There was a link/board error. Read the
4190 * status register to retrieve the error event
4191 * and process it.
4192 */
4193 phba->sli.slistat.err_attn_event++;
4194 /* Save status info */
4195 phba->work_hs = readl(phba->HSregaddr);
4196 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
4197 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
4198
4199 /* Clear Chip error bit */
4200 writel(HA_ERATT, phba->HAregaddr);
4201 readl(phba->HAregaddr); /* flush */
2e0fef85 4202 phba->pport->stopped = 1;
dea3101e
JB		 4203 }
4204
92d7f7b0
JS		 4205 if ((work_ha_copy & HA_MBATT) &&
4206 (phba->sli.mbox_active)) {
4207 pmb = phba->sli.mbox_active;
4208 pmbox = &pmb->mb;
4209 mbox = &phba->slim2p->mbx;
858c9f6c 4210 vport = pmb->vport;
92d7f7b0
JS		 4211
4212 /* First check out the status word */
4213 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
4214 if (pmbox->mbxOwner != OWN_HOST) {
4215 /*
4216 * Stray Mailbox Interrupt, mbxCommand <cmd>
4217 * mbxStatus <status>
4218 */
09372820 4219 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
92d7f7b0 4220 LOG_SLI,
e8b62011 4221 "(%d):0304 Stray Mailbox "
92d7f7b0
JS		 4222 "Interrupt mbxCommand x%x "
4223 "mbxStatus x%x\n",
e8b62011 4224 (vport ? vport->vpi : 0),
92d7f7b0
JS		 4225 pmbox->mbxCommand,
4226 pmbox->mbxStatus);
09372820
JS		 4227 /* clear mailbox attention bit */
4228 work_ha_copy &= ~HA_MBATT;
4229 } else {
4230 phba->last_completion_time = jiffies;
4231 del_timer(&phba->sli.mbox_tmo);
858c9f6c 4232
09372820
JS		 4233 phba->sli.mbox_active = NULL;
4234 if (pmb->mbox_cmpl) {
4235 lpfc_sli_pcimem_bcopy(mbox, pmbox,
4236 MAILBOX_CMD_SIZE);
4237 }
4238 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
4239 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
4240
4241 lpfc_debugfs_disc_trc(vport,
4242 LPFC_DISC_TRC_MBOX_VPORT,
4243 "MBOX dflt rpi: : "
4244 "status:x%x rpi:x%x",
4245 (uint32_t)pmbox->mbxStatus,
4246 pmbox->un.varWords[0], 0);
4247
4248 if (!pmbox->mbxStatus) {
4249 mp = (struct lpfc_dmabuf *)
4250 (pmb->context1);
4251 ndlp = (struct lpfc_nodelist *)
4252 pmb->context2;
4253
4254 /* Reg_LOGIN of dflt RPI was
4255 * successful. new lets get
4256 * rid of the RPI using the
4257 * same mbox buffer.
4258 */
4259 lpfc_unreg_login(phba,
4260 vport->vpi,
4261 pmbox->un.varWords[0],
4262 pmb);
4263 pmb->mbox_cmpl =
4264 lpfc_mbx_cmpl_dflt_rpi;
4265 pmb->context1 = mp;
4266 pmb->context2 = ndlp;
4267 pmb->vport = vport;
58da1ffb
JS		 4268 rc = lpfc_sli_issue_mbox(phba,
4269 pmb,
4270 MBX_NOWAIT);
4271 if (rc != MBX_BUSY)
4272 lpfc_printf_log(phba,
4273 KERN_ERR,
4274 LOG_MBOX | LOG_SLI,
4275 "0306 rc should have"
4276 "been MBX_BUSY");
09372820
JS		 4277 goto send_current_mbox;
4278 }
858c9f6c 4279 }
09372820
JS		 4280 spin_lock(&phba->pport->work_port_lock);
4281 phba->pport->work_port_events &=
4282 ~WORKER_MBOX_TMO;
4283 spin_unlock(&phba->pport->work_port_lock);
4284 lpfc_mbox_cmpl_put(phba, pmb);
858c9f6c 4285 }
92d7f7b0
JS		 4286 }
4287 if ((work_ha_copy & HA_MBATT) &&
4288 (phba->sli.mbox_active == NULL)) {
858c9f6c 4289send_current_mbox:
92d7f7b0 4290 /* Process next mailbox command if there is one */
58da1ffb
JS		 4291 do {
4292 rc = lpfc_sli_issue_mbox(phba, NULL,
4293 MBX_NOWAIT);
4294 } while (rc == MBX_NOT_FINISHED);
4295 if (rc != MBX_SUCCESS)
4296 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
4297 LOG_SLI, "0349 rc should be "
4298 "MBX_SUCCESS");
92d7f7b0
JS		 4299 }
4300
2e0fef85 4301 spin_lock(&phba->hbalock);
dea3101e
JB		 4302 phba->work_ha |= work_ha_copy;
4303 if (phba->work_wait)
92d7f7b0 4304 lpfc_worker_wake_up(phba);
2e0fef85 4305 spin_unlock(&phba->hbalock);
dea3101e
JB		 4306 }
4307
4308 ha_copy &= ~(phba->work_ha_mask);
4309
4310 /*
4311 * Process all events on FCP ring. Take the optimized path for
4312 * FCP IO. Any other IO is slow path and is handled by
4313 * the worker thread.
4314 */
4315 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
4316 status >>= (4*LPFC_FCP_RING);
858c9f6c 4317 if (status & HA_RXMASK)
dea3101e
JB		 4318 lpfc_sli_handle_fast_ring_event(phba,
4319 &phba->sli.ring[LPFC_FCP_RING],
4320 status);
a4bc3379
JS		 4321
4322 if (phba->cfg_multi_ring_support == 2) {
4323 /*
4324 * Process all events on extra ring. Take the optimized path
4325 * for extra ring IO. Any other IO is slow path and is handled
4326 * by the worker thread.
4327 */
4328 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
4329 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 4330 if (status & HA_RXMASK) {
a4bc3379
JS		 4331 lpfc_sli_handle_fast_ring_event(phba,
4332 &phba->sli.ring[LPFC_EXTRA_RING],
4333 status);
4334 }
4335 }
dea3101e
JB		 4336 return IRQ_HANDLED;
4337
4338} /* lpfc_intr_handler */
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