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1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
0d041215 4 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term *
3e21d1cb 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
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10 * *
11 * This program is free software; you can redistribute it and/or *
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12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
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22 *******************************************************************/
23
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24#include <linux/blkdev.h>
25#include <linux/pci.h>
26#include <linux/interrupt.h>
27#include <linux/delay.h>
5a0e3ad6 28#include <linux/slab.h>
1c2ba475 29#include <linux/lockdep.h>
dea3101e 30
91886523 31#include <scsi/scsi.h>
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32#include <scsi/scsi_cmnd.h>
33#include <scsi/scsi_device.h>
34#include <scsi/scsi_host.h>
f888ba3c 35#include <scsi/scsi_transport_fc.h>
da0436e9 36#include <scsi/fc/fc_fs.h>
0d878419 37#include <linux/aer.h>
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38#ifdef CONFIG_X86
39#include <asm/set_memory.h>
40#endif
dea3101e 41
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42#include <linux/nvme-fc-driver.h>
43
da0436e9 44#include "lpfc_hw4.h"
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45#include "lpfc_hw.h"
46#include "lpfc_sli.h"
da0436e9 47#include "lpfc_sli4.h"
ea2151b4 48#include "lpfc_nl.h"
dea3101e 49#include "lpfc_disc.h"
dea3101e 50#include "lpfc.h"
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51#include "lpfc_scsi.h"
52#include "lpfc_nvme.h"
f358dd0c 53#include "lpfc_nvmet.h"
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54#include "lpfc_crtn.h"
55#include "lpfc_logmsg.h"
56#include "lpfc_compat.h"
858c9f6c 57#include "lpfc_debugfs.h"
04c68496 58#include "lpfc_vport.h"
61bda8f7 59#include "lpfc_version.h"
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60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
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69
70/* Provide function prototypes local to this module. */
71static int lpfc_sli_issue_mbox_s4(struct lpfc_hba *, LPFC_MBOXQ_t *,
72 uint32_t);
73static int lpfc_sli4_read_rev(struct lpfc_hba *, LPFC_MBOXQ_t *,
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74 uint8_t *, uint32_t *);
75static struct lpfc_iocbq *lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *,
76 struct lpfc_iocbq *);
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77static void lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *,
78 struct hbq_dmabuf *);
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79static void lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
80 struct hbq_dmabuf *dmabuf);
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81static bool lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba,
82 struct lpfc_queue *cq, struct lpfc_cqe *cqe);
895427bd 83static int lpfc_sli4_post_sgl_list(struct lpfc_hba *, struct list_head *,
8a9d2e80 84 int);
f485c18d 85static void lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba,
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86 struct lpfc_queue *eq,
87 struct lpfc_eqe *eqe);
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88static bool lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba);
89static bool lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba);
0558056c 90
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91static IOCB_t *
92lpfc_get_iocb_from_iocbq(struct lpfc_iocbq *iocbq)
93{
94 return &iocbq->iocb;
95}
96
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97#if defined(CONFIG_64BIT) && defined(__LITTLE_ENDIAN)
98/**
99 * lpfc_sli4_pcimem_bcopy - SLI4 memory copy function
100 * @srcp: Source memory pointer.
101 * @destp: Destination memory pointer.
102 * @cnt: Number of words required to be copied.
103 * Must be a multiple of sizeof(uint64_t)
104 *
105 * This function is used for copying data between driver memory
106 * and the SLI WQ. This function also changes the endianness
107 * of each word if native endianness is different from SLI
108 * endianness. This function can be called with or without
109 * lock.
110 **/
d7b761b0 111static void
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112lpfc_sli4_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
113{
114 uint64_t *src = srcp;
115 uint64_t *dest = destp;
116 int i;
117
118 for (i = 0; i < (int)cnt; i += sizeof(uint64_t))
119 *dest++ = *src++;
120}
121#else
122#define lpfc_sli4_pcimem_bcopy(a, b, c) lpfc_sli_pcimem_bcopy(a, b, c)
123#endif
124
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125/**
126 * lpfc_sli4_wq_put - Put a Work Queue Entry on an Work Queue
127 * @q: The Work Queue to operate on.
128 * @wqe: The work Queue Entry to put on the Work queue.
129 *
130 * This routine will copy the contents of @wqe to the next available entry on
131 * the @q. This function will then ring the Work Queue Doorbell to signal the
132 * HBA to start processing the Work Queue Entry. This function returns 0 if
133 * successful. If no entries are available on @q then this function will return
134 * -ENOMEM.
135 * The caller is expected to hold the hbalock when calling this routine.
136 **/
cd22d605 137static int
205e8240 138lpfc_sli4_wq_put(struct lpfc_queue *q, union lpfc_wqe128 *wqe)
4f774513 139{
2e90f4b5 140 union lpfc_wqe *temp_wqe;
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141 struct lpfc_register doorbell;
142 uint32_t host_index;
027140ea 143 uint32_t idx;
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144 uint32_t i = 0;
145 uint8_t *tmp;
5cc167dd 146 u32 if_type;
4f774513 147
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148 /* sanity check on queue memory */
149 if (unlikely(!q))
150 return -ENOMEM;
9afbee3d 151 temp_wqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 152
4f774513 153 /* If the host has not yet processed the next entry then we are done */
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154 idx = ((q->host_index + 1) % q->entry_count);
155 if (idx == q->hba_index) {
b84daac9 156 q->WQ_overflow++;
cd22d605 157 return -EBUSY;
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158 }
159 q->WQ_posted++;
4f774513 160 /* set consumption flag every once in a while */
32517fc0 161 if (!((q->host_index + 1) % q->notify_interval))
f0d9bccc 162 bf_set(wqe_wqec, &wqe->generic.wqe_com, 1);
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163 else
164 bf_set(wqe_wqec, &wqe->generic.wqe_com, 0);
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165 if (q->phba->sli3_options & LPFC_SLI4_PHWQ_ENABLED)
166 bf_set(wqe_wqid, &wqe->generic.wqe_com, q->queue_id);
48f8fdb4 167 lpfc_sli4_pcimem_bcopy(wqe, temp_wqe, q->entry_size);
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168 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
169 /* write to DPP aperture taking advatage of Combined Writes */
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170 tmp = (uint8_t *)temp_wqe;
171#ifdef __raw_writeq
1351e69f 172 for (i = 0; i < q->entry_size; i += sizeof(uint64_t))
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173 __raw_writeq(*((uint64_t *)(tmp + i)),
174 q->dpp_regaddr + i);
175#else
176 for (i = 0; i < q->entry_size; i += sizeof(uint32_t))
177 __raw_writel(*((uint32_t *)(tmp + i)),
178 q->dpp_regaddr + i);
179#endif
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180 }
181 /* ensure WQE bcopy and DPP flushed before doorbell write */
6b3b3bdb 182 wmb();
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183
184 /* Update the host index before invoking device */
185 host_index = q->host_index;
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186
187 q->host_index = idx;
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188
189 /* Ring Doorbell */
190 doorbell.word0 = 0;
962bc51b 191 if (q->db_format == LPFC_DB_LIST_FORMAT) {
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192 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
193 bf_set(lpfc_if6_wq_db_list_fm_num_posted, &doorbell, 1);
194 bf_set(lpfc_if6_wq_db_list_fm_dpp, &doorbell, 1);
195 bf_set(lpfc_if6_wq_db_list_fm_dpp_id, &doorbell,
196 q->dpp_id);
197 bf_set(lpfc_if6_wq_db_list_fm_id, &doorbell,
198 q->queue_id);
199 } else {
200 bf_set(lpfc_wq_db_list_fm_num_posted, &doorbell, 1);
1351e69f 201 bf_set(lpfc_wq_db_list_fm_id, &doorbell, q->queue_id);
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202
203 /* Leave bits <23:16> clear for if_type 6 dpp */
204 if_type = bf_get(lpfc_sli_intf_if_type,
205 &q->phba->sli4_hba.sli_intf);
206 if (if_type != LPFC_SLI_INTF_IF_TYPE_6)
207 bf_set(lpfc_wq_db_list_fm_index, &doorbell,
208 host_index);
1351e69f 209 }
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210 } else if (q->db_format == LPFC_DB_RING_FORMAT) {
211 bf_set(lpfc_wq_db_ring_fm_num_posted, &doorbell, 1);
212 bf_set(lpfc_wq_db_ring_fm_id, &doorbell, q->queue_id);
213 } else {
214 return -EINVAL;
215 }
216 writel(doorbell.word0, q->db_regaddr);
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217
218 return 0;
219}
220
221/**
222 * lpfc_sli4_wq_release - Updates internal hba index for WQ
223 * @q: The Work Queue to operate on.
224 * @index: The index to advance the hba index to.
225 *
226 * This routine will update the HBA index of a queue to reflect consumption of
227 * Work Queue Entries by the HBA. When the HBA indicates that it has consumed
228 * an entry the host calls this function to update the queue's internal
229 * pointers. This routine returns the number of entries that were consumed by
230 * the HBA.
231 **/
232static uint32_t
233lpfc_sli4_wq_release(struct lpfc_queue *q, uint32_t index)
234{
235 uint32_t released = 0;
236
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237 /* sanity check on queue memory */
238 if (unlikely(!q))
239 return 0;
240
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241 if (q->hba_index == index)
242 return 0;
243 do {
244 q->hba_index = ((q->hba_index + 1) % q->entry_count);
245 released++;
246 } while (q->hba_index != index);
247 return released;
248}
249
250/**
251 * lpfc_sli4_mq_put - Put a Mailbox Queue Entry on an Mailbox Queue
252 * @q: The Mailbox Queue to operate on.
253 * @wqe: The Mailbox Queue Entry to put on the Work queue.
254 *
255 * This routine will copy the contents of @mqe to the next available entry on
256 * the @q. This function will then ring the Work Queue Doorbell to signal the
257 * HBA to start processing the Work Queue Entry. This function returns 0 if
258 * successful. If no entries are available on @q then this function will return
259 * -ENOMEM.
260 * The caller is expected to hold the hbalock when calling this routine.
261 **/
262static uint32_t
263lpfc_sli4_mq_put(struct lpfc_queue *q, struct lpfc_mqe *mqe)
264{
2e90f4b5 265 struct lpfc_mqe *temp_mqe;
4f774513 266 struct lpfc_register doorbell;
4f774513 267
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268 /* sanity check on queue memory */
269 if (unlikely(!q))
270 return -ENOMEM;
9afbee3d 271 temp_mqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 272
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273 /* If the host has not yet processed the next entry then we are done */
274 if (((q->host_index + 1) % q->entry_count) == q->hba_index)
275 return -ENOMEM;
48f8fdb4 276 lpfc_sli4_pcimem_bcopy(mqe, temp_mqe, q->entry_size);
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277 /* Save off the mailbox pointer for completion */
278 q->phba->mbox = (MAILBOX_t *)temp_mqe;
279
280 /* Update the host index before invoking device */
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281 q->host_index = ((q->host_index + 1) % q->entry_count);
282
283 /* Ring Doorbell */
284 doorbell.word0 = 0;
285 bf_set(lpfc_mq_doorbell_num_posted, &doorbell, 1);
286 bf_set(lpfc_mq_doorbell_id, &doorbell, q->queue_id);
287 writel(doorbell.word0, q->phba->sli4_hba.MQDBregaddr);
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288 return 0;
289}
290
291/**
292 * lpfc_sli4_mq_release - Updates internal hba index for MQ
293 * @q: The Mailbox Queue to operate on.
294 *
295 * This routine will update the HBA index of a queue to reflect consumption of
296 * a Mailbox Queue Entry by the HBA. When the HBA indicates that it has consumed
297 * an entry the host calls this function to update the queue's internal
298 * pointers. This routine returns the number of entries that were consumed by
299 * the HBA.
300 **/
301static uint32_t
302lpfc_sli4_mq_release(struct lpfc_queue *q)
303{
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304 /* sanity check on queue memory */
305 if (unlikely(!q))
306 return 0;
307
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308 /* Clear the mailbox pointer for completion */
309 q->phba->mbox = NULL;
310 q->hba_index = ((q->hba_index + 1) % q->entry_count);
311 return 1;
312}
313
314/**
315 * lpfc_sli4_eq_get - Gets the next valid EQE from a EQ
316 * @q: The Event Queue to get the first valid EQE from
317 *
318 * This routine will get the first valid Event Queue Entry from @q, update
319 * the queue's internal hba index, and return the EQE. If no valid EQEs are in
320 * the Queue (no more work to do), or the Queue is full of EQEs that have been
321 * processed, but not popped back to the HBA then this routine will return NULL.
322 **/
323static struct lpfc_eqe *
324lpfc_sli4_eq_get(struct lpfc_queue *q)
325{
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326 struct lpfc_eqe *eqe;
327
328 /* sanity check on queue memory */
329 if (unlikely(!q))
330 return NULL;
9afbee3d 331 eqe = lpfc_sli4_qe(q, q->host_index);
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332
333 /* If the next EQE is not valid then we are done */
7365f6fd 334 if (bf_get_le32(lpfc_eqe_valid, eqe) != q->qe_valid)
4f774513 335 return NULL;
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336
337 /*
338 * insert barrier for instruction interlock : data from the hardware
339 * must have the valid bit checked before it can be copied and acted
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340 * upon. Speculative instructions were allowing a bcopy at the start
341 * of lpfc_sli4_fp_handle_wcqe(), which is called immediately
342 * after our return, to copy data before the valid bit check above
343 * was done. As such, some of the copied data was stale. The barrier
344 * ensures the check is before any data is copied.
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345 */
346 mb();
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347 return eqe;
348}
349
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350/**
351 * lpfc_sli4_eq_clr_intr - Turn off interrupts from this EQ
352 * @q: The Event Queue to disable interrupts
353 *
354 **/
92f3b327 355void
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356lpfc_sli4_eq_clr_intr(struct lpfc_queue *q)
357{
358 struct lpfc_register doorbell;
359
360 doorbell.word0 = 0;
361 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
362 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
363 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
364 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
365 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 366 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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367}
368
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369/**
370 * lpfc_sli4_if6_eq_clr_intr - Turn off interrupts from this EQ
371 * @q: The Event Queue to disable interrupts
372 *
373 **/
92f3b327 374void
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375lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q)
376{
377 struct lpfc_register doorbell;
378
379 doorbell.word0 = 0;
aad59d5d 380 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
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381 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
382}
383
4f774513 384/**
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385 * lpfc_sli4_write_eq_db - write EQ DB for eqe's consumed or arm state
386 * @phba: adapter with EQ
4f774513 387 * @q: The Event Queue that the host has completed processing for.
32517fc0 388 * @count: Number of elements that have been consumed
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389 * @arm: Indicates whether the host wants to arms this CQ.
390 *
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391 * This routine will notify the HBA, by ringing the doorbell, that count
392 * number of EQEs have been processed. The @arm parameter indicates whether
393 * the queue should be rearmed when ringing the doorbell.
4f774513 394 **/
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395void
396lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
397 uint32_t count, bool arm)
4f774513 398{
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399 struct lpfc_register doorbell;
400
2e90f4b5 401 /* sanity check on queue memory */
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402 if (unlikely(!q || (count == 0 && !arm)))
403 return;
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404
405 /* ring doorbell for number popped */
406 doorbell.word0 = 0;
407 if (arm) {
408 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
409 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
410 }
32517fc0 411 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, count);
4f774513 412 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
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413 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
414 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
415 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 416 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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417 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
418 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
9dd35425 419 readl(q->phba->sli4_hba.EQDBregaddr);
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420}
421
27d6ac0a 422/**
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423 * lpfc_sli4_if6_write_eq_db - write EQ DB for eqe's consumed or arm state
424 * @phba: adapter with EQ
27d6ac0a 425 * @q: The Event Queue that the host has completed processing for.
32517fc0 426 * @count: Number of elements that have been consumed
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427 * @arm: Indicates whether the host wants to arms this CQ.
428 *
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429 * This routine will notify the HBA, by ringing the doorbell, that count
430 * number of EQEs have been processed. The @arm parameter indicates whether
431 * the queue should be rearmed when ringing the doorbell.
27d6ac0a 432 **/
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433void
434lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
435 uint32_t count, bool arm)
27d6ac0a 436{
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437 struct lpfc_register doorbell;
438
439 /* sanity check on queue memory */
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440 if (unlikely(!q || (count == 0 && !arm)))
441 return;
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442
443 /* ring doorbell for number popped */
444 doorbell.word0 = 0;
445 if (arm)
446 bf_set(lpfc_if6_eq_doorbell_arm, &doorbell, 1);
32517fc0 447 bf_set(lpfc_if6_eq_doorbell_num_released, &doorbell, count);
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448 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
449 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
450 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
451 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
452 readl(q->phba->sli4_hba.EQDBregaddr);
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453}
454
455static void
456__lpfc_sli4_consume_eqe(struct lpfc_hba *phba, struct lpfc_queue *eq,
457 struct lpfc_eqe *eqe)
458{
459 if (!phba->sli4_hba.pc_sli4_params.eqav)
460 bf_set_le32(lpfc_eqe_valid, eqe, 0);
461
462 eq->host_index = ((eq->host_index + 1) % eq->entry_count);
463
464 /* if the index wrapped around, toggle the valid bit */
465 if (phba->sli4_hba.pc_sli4_params.eqav && !eq->host_index)
466 eq->qe_valid = (eq->qe_valid) ? 0 : 1;
467}
468
469static void
470lpfc_sli4_eq_flush(struct lpfc_hba *phba, struct lpfc_queue *eq)
471{
472 struct lpfc_eqe *eqe;
473 uint32_t count = 0;
474
475 /* walk all the EQ entries and drop on the floor */
476 eqe = lpfc_sli4_eq_get(eq);
477 while (eqe) {
478 __lpfc_sli4_consume_eqe(phba, eq, eqe);
479 count++;
480 eqe = lpfc_sli4_eq_get(eq);
481 }
482
483 /* Clear and re-arm the EQ */
484 phba->sli4_hba.sli4_write_eq_db(phba, eq, count, LPFC_QUEUE_REARM);
485}
486
487static int
488lpfc_sli4_process_eq(struct lpfc_hba *phba, struct lpfc_queue *eq)
489{
490 struct lpfc_eqe *eqe;
491 int count = 0, consumed = 0;
492
493 if (cmpxchg(&eq->queue_claimed, 0, 1) != 0)
494 goto rearm_and_exit;
495
496 eqe = lpfc_sli4_eq_get(eq);
497 while (eqe) {
498 lpfc_sli4_hba_handle_eqe(phba, eq, eqe);
499 __lpfc_sli4_consume_eqe(phba, eq, eqe);
500
501 consumed++;
502 if (!(++count % eq->max_proc_limit))
503 break;
504
505 if (!(count % eq->notify_interval)) {
506 phba->sli4_hba.sli4_write_eq_db(phba, eq, consumed,
507 LPFC_QUEUE_NOARM);
508 consumed = 0;
509 }
510
511 eqe = lpfc_sli4_eq_get(eq);
512 }
513 eq->EQ_processed += count;
514
515 /* Track the max number of EQEs processed in 1 intr */
516 if (count > eq->EQ_max_eqe)
517 eq->EQ_max_eqe = count;
518
519 eq->queue_claimed = 0;
520
521rearm_and_exit:
522 /* Always clear and re-arm the EQ */
523 phba->sli4_hba.sli4_write_eq_db(phba, eq, consumed, LPFC_QUEUE_REARM);
524
525 return count;
27d6ac0a
JS
526}
527
4f774513
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528/**
529 * lpfc_sli4_cq_get - Gets the next valid CQE from a CQ
530 * @q: The Completion Queue to get the first valid CQE from
531 *
532 * This routine will get the first valid Completion Queue Entry from @q, update
533 * the queue's internal hba index, and return the CQE. If no valid CQEs are in
534 * the Queue (no more work to do), or the Queue is full of CQEs that have been
535 * processed, but not popped back to the HBA then this routine will return NULL.
536 **/
537static struct lpfc_cqe *
538lpfc_sli4_cq_get(struct lpfc_queue *q)
539{
540 struct lpfc_cqe *cqe;
541
2e90f4b5
JS
542 /* sanity check on queue memory */
543 if (unlikely(!q))
544 return NULL;
9afbee3d 545 cqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 546
4f774513 547 /* If the next CQE is not valid then we are done */
7365f6fd 548 if (bf_get_le32(lpfc_cqe_valid, cqe) != q->qe_valid)
4f774513 549 return NULL;
27f344eb
JS
550
551 /*
552 * insert barrier for instruction interlock : data from the hardware
553 * must have the valid bit checked before it can be copied and acted
2ea259ee
JS
554 * upon. Given what was seen in lpfc_sli4_cq_get() of speculative
555 * instructions allowing action on content before valid bit checked,
556 * add barrier here as well. May not be needed as "content" is a
557 * single 32-bit entity here (vs multi word structure for cq's).
27f344eb
JS
558 */
559 mb();
4f774513
JS
560 return cqe;
561}
562
32517fc0
JS
563static void
564__lpfc_sli4_consume_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
565 struct lpfc_cqe *cqe)
566{
567 if (!phba->sli4_hba.pc_sli4_params.cqav)
568 bf_set_le32(lpfc_cqe_valid, cqe, 0);
569
570 cq->host_index = ((cq->host_index + 1) % cq->entry_count);
571
572 /* if the index wrapped around, toggle the valid bit */
573 if (phba->sli4_hba.pc_sli4_params.cqav && !cq->host_index)
574 cq->qe_valid = (cq->qe_valid) ? 0 : 1;
575}
576
4f774513 577/**
32517fc0
JS
578 * lpfc_sli4_write_cq_db - write cq DB for entries consumed or arm state.
579 * @phba: the adapter with the CQ
4f774513 580 * @q: The Completion Queue that the host has completed processing for.
32517fc0 581 * @count: the number of elements that were consumed
4f774513
JS
582 * @arm: Indicates whether the host wants to arms this CQ.
583 *
32517fc0
JS
584 * This routine will notify the HBA, by ringing the doorbell, that the
585 * CQEs have been processed. The @arm parameter specifies whether the
586 * queue should be rearmed when ringing the doorbell.
4f774513 587 **/
32517fc0
JS
588void
589lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
590 uint32_t count, bool arm)
4f774513 591{
4f774513
JS
592 struct lpfc_register doorbell;
593
2e90f4b5 594 /* sanity check on queue memory */
32517fc0
JS
595 if (unlikely(!q || (count == 0 && !arm)))
596 return;
4f774513
JS
597
598 /* ring doorbell for number popped */
599 doorbell.word0 = 0;
600 if (arm)
601 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
32517fc0 602 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, count);
4f774513 603 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_COMPLETION);
6b5151fd
JS
604 bf_set(lpfc_eqcq_doorbell_cqid_hi, &doorbell,
605 (q->queue_id >> LPFC_CQID_HI_FIELD_SHIFT));
606 bf_set(lpfc_eqcq_doorbell_cqid_lo, &doorbell, q->queue_id);
9dd35425 607 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
4f774513
JS
608}
609
27d6ac0a 610/**
32517fc0
JS
611 * lpfc_sli4_if6_write_cq_db - write cq DB for entries consumed or arm state.
612 * @phba: the adapter with the CQ
27d6ac0a 613 * @q: The Completion Queue that the host has completed processing for.
32517fc0 614 * @count: the number of elements that were consumed
27d6ac0a
JS
615 * @arm: Indicates whether the host wants to arms this CQ.
616 *
32517fc0
JS
617 * This routine will notify the HBA, by ringing the doorbell, that the
618 * CQEs have been processed. The @arm parameter specifies whether the
619 * queue should be rearmed when ringing the doorbell.
27d6ac0a 620 **/
32517fc0
JS
621void
622lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
623 uint32_t count, bool arm)
27d6ac0a 624{
27d6ac0a
JS
625 struct lpfc_register doorbell;
626
627 /* sanity check on queue memory */
32517fc0
JS
628 if (unlikely(!q || (count == 0 && !arm)))
629 return;
27d6ac0a
JS
630
631 /* ring doorbell for number popped */
632 doorbell.word0 = 0;
633 if (arm)
634 bf_set(lpfc_if6_cq_doorbell_arm, &doorbell, 1);
32517fc0 635 bf_set(lpfc_if6_cq_doorbell_num_released, &doorbell, count);
27d6ac0a
JS
636 bf_set(lpfc_if6_cq_doorbell_cqid, &doorbell, q->queue_id);
637 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
27d6ac0a
JS
638}
639
4f774513
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640/**
641 * lpfc_sli4_rq_put - Put a Receive Buffer Queue Entry on a Receive Queue
642 * @q: The Header Receive Queue to operate on.
643 * @wqe: The Receive Queue Entry to put on the Receive queue.
644 *
645 * This routine will copy the contents of @wqe to the next available entry on
646 * the @q. This function will then ring the Receive Queue Doorbell to signal the
647 * HBA to start processing the Receive Queue Entry. This function returns the
648 * index that the rqe was copied to if successful. If no entries are available
649 * on @q then this function will return -ENOMEM.
650 * The caller is expected to hold the hbalock when calling this routine.
651 **/
895427bd 652int
4f774513
JS
653lpfc_sli4_rq_put(struct lpfc_queue *hq, struct lpfc_queue *dq,
654 struct lpfc_rqe *hrqe, struct lpfc_rqe *drqe)
655{
2e90f4b5
JS
656 struct lpfc_rqe *temp_hrqe;
657 struct lpfc_rqe *temp_drqe;
4f774513 658 struct lpfc_register doorbell;
cbc5de1b
JS
659 int hq_put_index;
660 int dq_put_index;
4f774513 661
2e90f4b5
JS
662 /* sanity check on queue memory */
663 if (unlikely(!hq) || unlikely(!dq))
664 return -ENOMEM;
cbc5de1b
JS
665 hq_put_index = hq->host_index;
666 dq_put_index = dq->host_index;
9afbee3d
JS
667 temp_hrqe = lpfc_sli4_qe(hq, hq_put_index);
668 temp_drqe = lpfc_sli4_qe(dq, dq_put_index);
2e90f4b5 669
4f774513
JS
670 if (hq->type != LPFC_HRQ || dq->type != LPFC_DRQ)
671 return -EINVAL;
cbc5de1b 672 if (hq_put_index != dq_put_index)
4f774513
JS
673 return -EINVAL;
674 /* If the host has not yet processed the next entry then we are done */
cbc5de1b 675 if (((hq_put_index + 1) % hq->entry_count) == hq->hba_index)
4f774513 676 return -EBUSY;
48f8fdb4
JS
677 lpfc_sli4_pcimem_bcopy(hrqe, temp_hrqe, hq->entry_size);
678 lpfc_sli4_pcimem_bcopy(drqe, temp_drqe, dq->entry_size);
4f774513
JS
679
680 /* Update the host index to point to the next slot */
cbc5de1b
JS
681 hq->host_index = ((hq_put_index + 1) % hq->entry_count);
682 dq->host_index = ((dq_put_index + 1) % dq->entry_count);
61f3d4bf 683 hq->RQ_buf_posted++;
4f774513
JS
684
685 /* Ring The Header Receive Queue Doorbell */
32517fc0 686 if (!(hq->host_index % hq->notify_interval)) {
4f774513 687 doorbell.word0 = 0;
962bc51b
JS
688 if (hq->db_format == LPFC_DB_RING_FORMAT) {
689 bf_set(lpfc_rq_db_ring_fm_num_posted, &doorbell,
32517fc0 690 hq->notify_interval);
962bc51b
JS
691 bf_set(lpfc_rq_db_ring_fm_id, &doorbell, hq->queue_id);
692 } else if (hq->db_format == LPFC_DB_LIST_FORMAT) {
693 bf_set(lpfc_rq_db_list_fm_num_posted, &doorbell,
32517fc0 694 hq->notify_interval);
962bc51b
JS
695 bf_set(lpfc_rq_db_list_fm_index, &doorbell,
696 hq->host_index);
697 bf_set(lpfc_rq_db_list_fm_id, &doorbell, hq->queue_id);
698 } else {
699 return -EINVAL;
700 }
701 writel(doorbell.word0, hq->db_regaddr);
4f774513 702 }
cbc5de1b 703 return hq_put_index;
4f774513
JS
704}
705
706/**
707 * lpfc_sli4_rq_release - Updates internal hba index for RQ
708 * @q: The Header Receive Queue to operate on.
709 *
710 * This routine will update the HBA index of a queue to reflect consumption of
711 * one Receive Queue Entry by the HBA. When the HBA indicates that it has
712 * consumed an entry the host calls this function to update the queue's
713 * internal pointers. This routine returns the number of entries that were
714 * consumed by the HBA.
715 **/
716static uint32_t
717lpfc_sli4_rq_release(struct lpfc_queue *hq, struct lpfc_queue *dq)
718{
2e90f4b5
JS
719 /* sanity check on queue memory */
720 if (unlikely(!hq) || unlikely(!dq))
721 return 0;
722
4f774513
JS
723 if ((hq->type != LPFC_HRQ) || (dq->type != LPFC_DRQ))
724 return 0;
725 hq->hba_index = ((hq->hba_index + 1) % hq->entry_count);
726 dq->hba_index = ((dq->hba_index + 1) % dq->entry_count);
727 return 1;
728}
729
e59058c4 730/**
3621a710 731 * lpfc_cmd_iocb - Get next command iocb entry in the ring
e59058c4
JS
732 * @phba: Pointer to HBA context object.
733 * @pring: Pointer to driver SLI ring object.
734 *
735 * This function returns pointer to next command iocb entry
736 * in the command ring. The caller must hold hbalock to prevent
737 * other threads consume the next command iocb.
738 * SLI-2/SLI-3 provide different sized iocbs.
739 **/
ed957684
JS
740static inline IOCB_t *
741lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
742{
7e56aa25
JS
743 return (IOCB_t *) (((char *) pring->sli.sli3.cmdringaddr) +
744 pring->sli.sli3.cmdidx * phba->iocb_cmd_size);
ed957684
JS
745}
746
e59058c4 747/**
3621a710 748 * lpfc_resp_iocb - Get next response iocb entry in the ring
e59058c4
JS
749 * @phba: Pointer to HBA context object.
750 * @pring: Pointer to driver SLI ring object.
751 *
752 * This function returns pointer to next response iocb entry
753 * in the response ring. The caller must hold hbalock to make sure
754 * that no other thread consume the next response iocb.
755 * SLI-2/SLI-3 provide different sized iocbs.
756 **/
ed957684
JS
757static inline IOCB_t *
758lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
759{
7e56aa25
JS
760 return (IOCB_t *) (((char *) pring->sli.sli3.rspringaddr) +
761 pring->sli.sli3.rspidx * phba->iocb_rsp_size);
ed957684
JS
762}
763
e59058c4 764/**
3621a710 765 * __lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
766 * @phba: Pointer to HBA context object.
767 *
768 * This function is called with hbalock held. This function
769 * allocates a new driver iocb object from the iocb pool. If the
770 * allocation is successful, it returns pointer to the newly
771 * allocated iocb object else it returns NULL.
772 **/
4f2e66c6 773struct lpfc_iocbq *
2e0fef85 774__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC
775{
776 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
777 struct lpfc_iocbq * iocbq = NULL;
778
1c2ba475
JT
779 lockdep_assert_held(&phba->hbalock);
780
0bd4ca25 781 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
2a9bf3d0
JS
782 if (iocbq)
783 phba->iocb_cnt++;
784 if (phba->iocb_cnt > phba->iocb_max)
785 phba->iocb_max = phba->iocb_cnt;
0bd4ca25
JSEC
786 return iocbq;
787}
788
da0436e9
JS
789/**
790 * __lpfc_clear_active_sglq - Remove the active sglq for this XRI.
791 * @phba: Pointer to HBA context object.
792 * @xritag: XRI value.
793 *
794 * This function clears the sglq pointer from the array of acive
795 * sglq's. The xritag that is passed in is used to index into the
796 * array. Before the xritag can be used it needs to be adjusted
797 * by subtracting the xribase.
798 *
799 * Returns sglq ponter = success, NULL = Failure.
800 **/
895427bd 801struct lpfc_sglq *
da0436e9
JS
802__lpfc_clear_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
803{
da0436e9 804 struct lpfc_sglq *sglq;
6d368e53
JS
805
806 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
807 phba->sli4_hba.lpfc_sglq_active_list[xritag] = NULL;
da0436e9
JS
808 return sglq;
809}
810
811/**
812 * __lpfc_get_active_sglq - Get the active sglq for this XRI.
813 * @phba: Pointer to HBA context object.
814 * @xritag: XRI value.
815 *
816 * This function returns the sglq pointer from the array of acive
817 * sglq's. The xritag that is passed in is used to index into the
818 * array. Before the xritag can be used it needs to be adjusted
819 * by subtracting the xribase.
820 *
821 * Returns sglq ponter = success, NULL = Failure.
822 **/
0f65ff68 823struct lpfc_sglq *
da0436e9
JS
824__lpfc_get_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
825{
da0436e9 826 struct lpfc_sglq *sglq;
6d368e53
JS
827
828 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
da0436e9
JS
829 return sglq;
830}
831
19ca7609 832/**
1151e3ec 833 * lpfc_clr_rrq_active - Clears RRQ active bit in xri_bitmap.
19ca7609
JS
834 * @phba: Pointer to HBA context object.
835 * @xritag: xri used in this exchange.
836 * @rrq: The RRQ to be cleared.
837 *
19ca7609 838 **/
1151e3ec
JS
839void
840lpfc_clr_rrq_active(struct lpfc_hba *phba,
841 uint16_t xritag,
842 struct lpfc_node_rrq *rrq)
19ca7609 843{
1151e3ec 844 struct lpfc_nodelist *ndlp = NULL;
19ca7609 845
1151e3ec
JS
846 if ((rrq->vport) && NLP_CHK_NODE_ACT(rrq->ndlp))
847 ndlp = lpfc_findnode_did(rrq->vport, rrq->nlp_DID);
19ca7609
JS
848
849 /* The target DID could have been swapped (cable swap)
850 * we should use the ndlp from the findnode if it is
851 * available.
852 */
1151e3ec 853 if ((!ndlp) && rrq->ndlp)
19ca7609
JS
854 ndlp = rrq->ndlp;
855
1151e3ec
JS
856 if (!ndlp)
857 goto out;
858
cff261f6 859 if (test_and_clear_bit(xritag, ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
860 rrq->send_rrq = 0;
861 rrq->xritag = 0;
862 rrq->rrq_stop_time = 0;
863 }
1151e3ec 864out:
19ca7609
JS
865 mempool_free(rrq, phba->rrq_pool);
866}
867
868/**
869 * lpfc_handle_rrq_active - Checks if RRQ has waithed RATOV.
870 * @phba: Pointer to HBA context object.
871 *
872 * This function is called with hbalock held. This function
873 * Checks if stop_time (ratov from setting rrq active) has
874 * been reached, if it has and the send_rrq flag is set then
875 * it will call lpfc_send_rrq. If the send_rrq flag is not set
876 * then it will just call the routine to clear the rrq and
877 * free the rrq resource.
878 * The timer is set to the next rrq that is going to expire before
879 * leaving the routine.
880 *
881 **/
882void
883lpfc_handle_rrq_active(struct lpfc_hba *phba)
884{
885 struct lpfc_node_rrq *rrq;
886 struct lpfc_node_rrq *nextrrq;
887 unsigned long next_time;
888 unsigned long iflags;
1151e3ec 889 LIST_HEAD(send_rrq);
19ca7609
JS
890
891 spin_lock_irqsave(&phba->hbalock, iflags);
892 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
256ec0d0 893 next_time = jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
19ca7609 894 list_for_each_entry_safe(rrq, nextrrq,
1151e3ec
JS
895 &phba->active_rrq_list, list) {
896 if (time_after(jiffies, rrq->rrq_stop_time))
897 list_move(&rrq->list, &send_rrq);
898 else if (time_before(rrq->rrq_stop_time, next_time))
19ca7609
JS
899 next_time = rrq->rrq_stop_time;
900 }
901 spin_unlock_irqrestore(&phba->hbalock, iflags);
06918ac5
JS
902 if ((!list_empty(&phba->active_rrq_list)) &&
903 (!(phba->pport->load_flag & FC_UNLOADING)))
19ca7609 904 mod_timer(&phba->rrq_tmr, next_time);
1151e3ec
JS
905 list_for_each_entry_safe(rrq, nextrrq, &send_rrq, list) {
906 list_del(&rrq->list);
ffd43814 907 if (!rrq->send_rrq) {
1151e3ec 908 /* this call will free the rrq */
ffd43814
BVA
909 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
910 } else if (lpfc_send_rrq(phba, rrq)) {
1151e3ec
JS
911 /* if we send the rrq then the completion handler
912 * will clear the bit in the xribitmap.
913 */
914 lpfc_clr_rrq_active(phba, rrq->xritag,
915 rrq);
916 }
917 }
19ca7609
JS
918}
919
920/**
921 * lpfc_get_active_rrq - Get the active RRQ for this exchange.
922 * @vport: Pointer to vport context object.
923 * @xri: The xri used in the exchange.
924 * @did: The targets DID for this exchange.
925 *
926 * returns NULL = rrq not found in the phba->active_rrq_list.
927 * rrq = rrq for this xri and target.
928 **/
929struct lpfc_node_rrq *
930lpfc_get_active_rrq(struct lpfc_vport *vport, uint16_t xri, uint32_t did)
931{
932 struct lpfc_hba *phba = vport->phba;
933 struct lpfc_node_rrq *rrq;
934 struct lpfc_node_rrq *nextrrq;
935 unsigned long iflags;
936
937 if (phba->sli_rev != LPFC_SLI_REV4)
938 return NULL;
939 spin_lock_irqsave(&phba->hbalock, iflags);
940 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list) {
941 if (rrq->vport == vport && rrq->xritag == xri &&
942 rrq->nlp_DID == did){
943 list_del(&rrq->list);
944 spin_unlock_irqrestore(&phba->hbalock, iflags);
945 return rrq;
946 }
947 }
948 spin_unlock_irqrestore(&phba->hbalock, iflags);
949 return NULL;
950}
951
952/**
953 * lpfc_cleanup_vports_rrqs - Remove and clear the active RRQ for this vport.
954 * @vport: Pointer to vport context object.
1151e3ec
JS
955 * @ndlp: Pointer to the lpfc_node_list structure.
956 * If ndlp is NULL Remove all active RRQs for this vport from the
957 * phba->active_rrq_list and clear the rrq.
958 * If ndlp is not NULL then only remove rrqs for this vport & this ndlp.
19ca7609
JS
959 **/
960void
1151e3ec 961lpfc_cleanup_vports_rrqs(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
19ca7609
JS
962
963{
964 struct lpfc_hba *phba = vport->phba;
965 struct lpfc_node_rrq *rrq;
966 struct lpfc_node_rrq *nextrrq;
967 unsigned long iflags;
1151e3ec 968 LIST_HEAD(rrq_list);
19ca7609
JS
969
970 if (phba->sli_rev != LPFC_SLI_REV4)
971 return;
1151e3ec
JS
972 if (!ndlp) {
973 lpfc_sli4_vport_delete_els_xri_aborted(vport);
974 lpfc_sli4_vport_delete_fcp_xri_aborted(vport);
19ca7609 975 }
1151e3ec
JS
976 spin_lock_irqsave(&phba->hbalock, iflags);
977 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list)
978 if ((rrq->vport == vport) && (!ndlp || rrq->ndlp == ndlp))
979 list_move(&rrq->list, &rrq_list);
19ca7609 980 spin_unlock_irqrestore(&phba->hbalock, iflags);
1151e3ec
JS
981
982 list_for_each_entry_safe(rrq, nextrrq, &rrq_list, list) {
983 list_del(&rrq->list);
984 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
985 }
19ca7609
JS
986}
987
19ca7609 988/**
1151e3ec 989 * lpfc_test_rrq_active - Test RRQ bit in xri_bitmap.
19ca7609
JS
990 * @phba: Pointer to HBA context object.
991 * @ndlp: Targets nodelist pointer for this exchange.
992 * @xritag the xri in the bitmap to test.
993 *
e2a8be56
JS
994 * This function returns:
995 * 0 = rrq not active for this xri
996 * 1 = rrq is valid for this xri.
19ca7609 997 **/
1151e3ec
JS
998int
999lpfc_test_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
19ca7609
JS
1000 uint16_t xritag)
1001{
19ca7609
JS
1002 if (!ndlp)
1003 return 0;
cff261f6
JS
1004 if (!ndlp->active_rrqs_xri_bitmap)
1005 return 0;
1006 if (test_bit(xritag, ndlp->active_rrqs_xri_bitmap))
258f84fa 1007 return 1;
19ca7609
JS
1008 else
1009 return 0;
1010}
1011
1012/**
1013 * lpfc_set_rrq_active - set RRQ active bit in xri_bitmap.
1014 * @phba: Pointer to HBA context object.
1015 * @ndlp: nodelist pointer for this target.
1016 * @xritag: xri used in this exchange.
1017 * @rxid: Remote Exchange ID.
1018 * @send_rrq: Flag used to determine if we should send rrq els cmd.
1019 *
1020 * This function takes the hbalock.
1021 * The active bit is always set in the active rrq xri_bitmap even
1022 * if there is no slot avaiable for the other rrq information.
1023 *
1024 * returns 0 rrq actived for this xri
1025 * < 0 No memory or invalid ndlp.
1026 **/
1027int
1028lpfc_set_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
b42c07c8 1029 uint16_t xritag, uint16_t rxid, uint16_t send_rrq)
19ca7609 1030{
19ca7609 1031 unsigned long iflags;
b42c07c8
JS
1032 struct lpfc_node_rrq *rrq;
1033 int empty;
1034
1035 if (!ndlp)
1036 return -EINVAL;
1037
1038 if (!phba->cfg_enable_rrq)
1039 return -EINVAL;
19ca7609
JS
1040
1041 spin_lock_irqsave(&phba->hbalock, iflags);
b42c07c8
JS
1042 if (phba->pport->load_flag & FC_UNLOADING) {
1043 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
1044 goto out;
1045 }
1046
1047 /*
1048 * set the active bit even if there is no mem available.
1049 */
1050 if (NLP_CHK_FREE_REQ(ndlp))
1051 goto out;
1052
1053 if (ndlp->vport && (ndlp->vport->load_flag & FC_UNLOADING))
1054 goto out;
1055
cff261f6
JS
1056 if (!ndlp->active_rrqs_xri_bitmap)
1057 goto out;
1058
1059 if (test_and_set_bit(xritag, ndlp->active_rrqs_xri_bitmap))
b42c07c8
JS
1060 goto out;
1061
19ca7609 1062 spin_unlock_irqrestore(&phba->hbalock, iflags);
b42c07c8
JS
1063 rrq = mempool_alloc(phba->rrq_pool, GFP_KERNEL);
1064 if (!rrq) {
1065 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1066 "3155 Unable to allocate RRQ xri:0x%x rxid:0x%x"
1067 " DID:0x%x Send:%d\n",
1068 xritag, rxid, ndlp->nlp_DID, send_rrq);
1069 return -EINVAL;
1070 }
e5771b4d
JS
1071 if (phba->cfg_enable_rrq == 1)
1072 rrq->send_rrq = send_rrq;
1073 else
1074 rrq->send_rrq = 0;
b42c07c8 1075 rrq->xritag = xritag;
256ec0d0
JS
1076 rrq->rrq_stop_time = jiffies +
1077 msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
b42c07c8
JS
1078 rrq->ndlp = ndlp;
1079 rrq->nlp_DID = ndlp->nlp_DID;
1080 rrq->vport = ndlp->vport;
1081 rrq->rxid = rxid;
b42c07c8
JS
1082 spin_lock_irqsave(&phba->hbalock, iflags);
1083 empty = list_empty(&phba->active_rrq_list);
1084 list_add_tail(&rrq->list, &phba->active_rrq_list);
1085 phba->hba_flag |= HBA_RRQ_ACTIVE;
1086 if (empty)
1087 lpfc_worker_wake_up(phba);
1088 spin_unlock_irqrestore(&phba->hbalock, iflags);
1089 return 0;
1090out:
1091 spin_unlock_irqrestore(&phba->hbalock, iflags);
1092 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1093 "2921 Can't set rrq active xri:0x%x rxid:0x%x"
1094 " DID:0x%x Send:%d\n",
1095 xritag, rxid, ndlp->nlp_DID, send_rrq);
1096 return -EINVAL;
19ca7609
JS
1097}
1098
da0436e9 1099/**
895427bd 1100 * __lpfc_sli_get_els_sglq - Allocates an iocb object from sgl pool
da0436e9 1101 * @phba: Pointer to HBA context object.
19ca7609 1102 * @piocb: Pointer to the iocbq.
da0436e9 1103 *
e2a8be56
JS
1104 * The driver calls this function with either the nvme ls ring lock
1105 * or the fc els ring lock held depending on the iocb usage. This function
1106 * gets a new driver sglq object from the sglq list. If the list is not empty
1107 * then it is successful, it returns pointer to the newly allocated sglq
1108 * object else it returns NULL.
da0436e9
JS
1109 **/
1110static struct lpfc_sglq *
895427bd 1111__lpfc_sli_get_els_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
da0436e9 1112{
895427bd 1113 struct list_head *lpfc_els_sgl_list = &phba->sli4_hba.lpfc_els_sgl_list;
da0436e9 1114 struct lpfc_sglq *sglq = NULL;
19ca7609 1115 struct lpfc_sglq *start_sglq = NULL;
c490850a 1116 struct lpfc_io_buf *lpfc_cmd;
19ca7609 1117 struct lpfc_nodelist *ndlp;
e2a8be56 1118 struct lpfc_sli_ring *pring = NULL;
19ca7609
JS
1119 int found = 0;
1120
e2a8be56
JS
1121 if (piocbq->iocb_flag & LPFC_IO_NVME_LS)
1122 pring = phba->sli4_hba.nvmels_wq->pring;
1123 else
1124 pring = lpfc_phba_elsring(phba);
1125
1126 lockdep_assert_held(&pring->ring_lock);
1c2ba475 1127
19ca7609 1128 if (piocbq->iocb_flag & LPFC_IO_FCP) {
c490850a 1129 lpfc_cmd = (struct lpfc_io_buf *) piocbq->context1;
19ca7609 1130 ndlp = lpfc_cmd->rdata->pnode;
be858b65 1131 } else if ((piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) &&
6c7cf486 1132 !(piocbq->iocb_flag & LPFC_IO_LIBDFC)) {
19ca7609 1133 ndlp = piocbq->context_un.ndlp;
6c7cf486
JS
1134 } else if (piocbq->iocb_flag & LPFC_IO_LIBDFC) {
1135 if (piocbq->iocb_flag & LPFC_IO_LOOPBACK)
1136 ndlp = NULL;
1137 else
1138 ndlp = piocbq->context_un.ndlp;
1139 } else {
19ca7609 1140 ndlp = piocbq->context1;
6c7cf486 1141 }
19ca7609 1142
895427bd
JS
1143 spin_lock(&phba->sli4_hba.sgl_list_lock);
1144 list_remove_head(lpfc_els_sgl_list, sglq, struct lpfc_sglq, list);
19ca7609
JS
1145 start_sglq = sglq;
1146 while (!found) {
1147 if (!sglq)
d11f54b7 1148 break;
895427bd
JS
1149 if (ndlp && ndlp->active_rrqs_xri_bitmap &&
1150 test_bit(sglq->sli4_lxritag,
1151 ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
1152 /* This xri has an rrq outstanding for this DID.
1153 * put it back in the list and get another xri.
1154 */
895427bd 1155 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609 1156 sglq = NULL;
895427bd 1157 list_remove_head(lpfc_els_sgl_list, sglq,
19ca7609
JS
1158 struct lpfc_sglq, list);
1159 if (sglq == start_sglq) {
14041bd1 1160 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609
JS
1161 sglq = NULL;
1162 break;
1163 } else
1164 continue;
1165 }
1166 sglq->ndlp = ndlp;
1167 found = 1;
6d368e53 1168 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
19ca7609
JS
1169 sglq->state = SGL_ALLOCATED;
1170 }
895427bd 1171 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1172 return sglq;
1173}
1174
f358dd0c
JS
1175/**
1176 * __lpfc_sli_get_nvmet_sglq - Allocates an iocb object from sgl pool
1177 * @phba: Pointer to HBA context object.
1178 * @piocb: Pointer to the iocbq.
1179 *
1180 * This function is called with the sgl_list lock held. This function
1181 * gets a new driver sglq object from the sglq list. If the
1182 * list is not empty then it is successful, it returns pointer to the newly
1183 * allocated sglq object else it returns NULL.
1184 **/
1185struct lpfc_sglq *
1186__lpfc_sli_get_nvmet_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
1187{
1188 struct list_head *lpfc_nvmet_sgl_list;
1189 struct lpfc_sglq *sglq = NULL;
1190
1191 lpfc_nvmet_sgl_list = &phba->sli4_hba.lpfc_nvmet_sgl_list;
1192
1193 lockdep_assert_held(&phba->sli4_hba.sgl_list_lock);
1194
1195 list_remove_head(lpfc_nvmet_sgl_list, sglq, struct lpfc_sglq, list);
1196 if (!sglq)
1197 return NULL;
1198 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
1199 sglq->state = SGL_ALLOCATED;
da0436e9
JS
1200 return sglq;
1201}
1202
e59058c4 1203/**
3621a710 1204 * lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
1205 * @phba: Pointer to HBA context object.
1206 *
1207 * This function is called with no lock held. This function
1208 * allocates a new driver iocb object from the iocb pool. If the
1209 * allocation is successful, it returns pointer to the newly
1210 * allocated iocb object else it returns NULL.
1211 **/
2e0fef85
JS
1212struct lpfc_iocbq *
1213lpfc_sli_get_iocbq(struct lpfc_hba *phba)
1214{
1215 struct lpfc_iocbq * iocbq = NULL;
1216 unsigned long iflags;
1217
1218 spin_lock_irqsave(&phba->hbalock, iflags);
1219 iocbq = __lpfc_sli_get_iocbq(phba);
1220 spin_unlock_irqrestore(&phba->hbalock, iflags);
1221 return iocbq;
1222}
1223
4f774513
JS
1224/**
1225 * __lpfc_sli_release_iocbq_s4 - Release iocb to the iocb pool
1226 * @phba: Pointer to HBA context object.
1227 * @iocbq: Pointer to driver iocb object.
1228 *
1229 * This function is called with hbalock held to release driver
1230 * iocb object to the iocb pool. The iotag in the iocb object
1231 * does not change for each use of the iocb object. This function
1232 * clears all other fields of the iocb object when it is freed.
1233 * The sqlq structure that holds the xritag and phys and virtual
1234 * mappings for the scatter gather list is retrieved from the
1235 * active array of sglq. The get of the sglq pointer also clears
1236 * the entry in the array. If the status of the IO indiactes that
1237 * this IO was aborted then the sglq entry it put on the
1238 * lpfc_abts_els_sgl_list until the CQ_ABORTED_XRI is received. If the
1239 * IO has good status or fails for any other reason then the sglq
895427bd 1240 * entry is added to the free list (lpfc_els_sgl_list).
4f774513
JS
1241 **/
1242static void
1243__lpfc_sli_release_iocbq_s4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1244{
1245 struct lpfc_sglq *sglq;
1246 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
2a9bf3d0 1247 unsigned long iflag = 0;
895427bd 1248 struct lpfc_sli_ring *pring;
4f774513 1249
1c2ba475
JT
1250 lockdep_assert_held(&phba->hbalock);
1251
4f774513
JS
1252 if (iocbq->sli4_xritag == NO_XRI)
1253 sglq = NULL;
1254 else
6d368e53
JS
1255 sglq = __lpfc_clear_active_sglq(phba, iocbq->sli4_lxritag);
1256
0e9bb8d7 1257
4f774513 1258 if (sglq) {
f358dd0c
JS
1259 if (iocbq->iocb_flag & LPFC_IO_NVMET) {
1260 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1261 iflag);
1262 sglq->state = SGL_FREED;
1263 sglq->ndlp = NULL;
1264 list_add_tail(&sglq->list,
1265 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1266 spin_unlock_irqrestore(
1267 &phba->sli4_hba.sgl_list_lock, iflag);
1268 goto out;
1269 }
1270
895427bd 1271 pring = phba->sli4_hba.els_wq->pring;
0f65ff68
JS
1272 if ((iocbq->iocb_flag & LPFC_EXCHANGE_BUSY) &&
1273 (sglq->state != SGL_XRI_ABORTED)) {
895427bd
JS
1274 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1275 iflag);
4f774513 1276 list_add(&sglq->list,
895427bd 1277 &phba->sli4_hba.lpfc_abts_els_sgl_list);
4f774513 1278 spin_unlock_irqrestore(
895427bd 1279 &phba->sli4_hba.sgl_list_lock, iflag);
0f65ff68 1280 } else {
895427bd
JS
1281 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1282 iflag);
0f65ff68 1283 sglq->state = SGL_FREED;
19ca7609 1284 sglq->ndlp = NULL;
fedd3b7b 1285 list_add_tail(&sglq->list,
895427bd
JS
1286 &phba->sli4_hba.lpfc_els_sgl_list);
1287 spin_unlock_irqrestore(
1288 &phba->sli4_hba.sgl_list_lock, iflag);
2a9bf3d0
JS
1289
1290 /* Check if TXQ queue needs to be serviced */
0e9bb8d7 1291 if (!list_empty(&pring->txq))
2a9bf3d0 1292 lpfc_worker_wake_up(phba);
0f65ff68 1293 }
4f774513
JS
1294 }
1295
f358dd0c 1296out:
4f774513
JS
1297 /*
1298 * Clean all volatile data fields, preserve iotag and node struct.
1299 */
1300 memset((char *)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
6d368e53 1301 iocbq->sli4_lxritag = NO_XRI;
4f774513 1302 iocbq->sli4_xritag = NO_XRI;
f358dd0c
JS
1303 iocbq->iocb_flag &= ~(LPFC_IO_NVME | LPFC_IO_NVMET |
1304 LPFC_IO_NVME_LS);
4f774513
JS
1305 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1306}
1307
2a9bf3d0 1308
e59058c4 1309/**
3772a991 1310 * __lpfc_sli_release_iocbq_s3 - Release iocb to the iocb pool
e59058c4
JS
1311 * @phba: Pointer to HBA context object.
1312 * @iocbq: Pointer to driver iocb object.
1313 *
1314 * This function is called with hbalock held to release driver
1315 * iocb object to the iocb pool. The iotag in the iocb object
1316 * does not change for each use of the iocb object. This function
1317 * clears all other fields of the iocb object when it is freed.
1318 **/
a6ababd2 1319static void
3772a991 1320__lpfc_sli_release_iocbq_s3(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 1321{
2e0fef85 1322 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30 1323
1c2ba475 1324 lockdep_assert_held(&phba->hbalock);
0e9bb8d7 1325
604a3e30
JB
1326 /*
1327 * Clean all volatile data fields, preserve iotag and node struct.
1328 */
1329 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
3772a991 1330 iocbq->sli4_xritag = NO_XRI;
604a3e30
JB
1331 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1332}
1333
3772a991
JS
1334/**
1335 * __lpfc_sli_release_iocbq - Release iocb to the iocb pool
1336 * @phba: Pointer to HBA context object.
1337 * @iocbq: Pointer to driver iocb object.
1338 *
1339 * This function is called with hbalock held to release driver
1340 * iocb object to the iocb pool. The iotag in the iocb object
1341 * does not change for each use of the iocb object. This function
1342 * clears all other fields of the iocb object when it is freed.
1343 **/
1344static void
1345__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1346{
1c2ba475
JT
1347 lockdep_assert_held(&phba->hbalock);
1348
3772a991 1349 phba->__lpfc_sli_release_iocbq(phba, iocbq);
2a9bf3d0 1350 phba->iocb_cnt--;
3772a991
JS
1351}
1352
e59058c4 1353/**
3621a710 1354 * lpfc_sli_release_iocbq - Release iocb to the iocb pool
e59058c4
JS
1355 * @phba: Pointer to HBA context object.
1356 * @iocbq: Pointer to driver iocb object.
1357 *
1358 * This function is called with no lock held to release the iocb to
1359 * iocb pool.
1360 **/
2e0fef85
JS
1361void
1362lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1363{
1364 unsigned long iflags;
1365
1366 /*
1367 * Clean all volatile data fields, preserve iotag and node struct.
1368 */
1369 spin_lock_irqsave(&phba->hbalock, iflags);
1370 __lpfc_sli_release_iocbq(phba, iocbq);
1371 spin_unlock_irqrestore(&phba->hbalock, iflags);
1372}
1373
a257bf90
JS
1374/**
1375 * lpfc_sli_cancel_iocbs - Cancel all iocbs from a list.
1376 * @phba: Pointer to HBA context object.
1377 * @iocblist: List of IOCBs.
1378 * @ulpstatus: ULP status in IOCB command field.
1379 * @ulpWord4: ULP word-4 in IOCB command field.
1380 *
1381 * This function is called with a list of IOCBs to cancel. It cancels the IOCB
1382 * on the list by invoking the complete callback function associated with the
1383 * IOCB with the provided @ulpstatus and @ulpword4 set to the IOCB commond
1384 * fields.
1385 **/
1386void
1387lpfc_sli_cancel_iocbs(struct lpfc_hba *phba, struct list_head *iocblist,
1388 uint32_t ulpstatus, uint32_t ulpWord4)
1389{
1390 struct lpfc_iocbq *piocb;
1391
1392 while (!list_empty(iocblist)) {
1393 list_remove_head(iocblist, piocb, struct lpfc_iocbq, list);
a257bf90
JS
1394 if (!piocb->iocb_cmpl)
1395 lpfc_sli_release_iocbq(phba, piocb);
1396 else {
1397 piocb->iocb.ulpStatus = ulpstatus;
1398 piocb->iocb.un.ulpWord[4] = ulpWord4;
1399 (piocb->iocb_cmpl) (phba, piocb, piocb);
1400 }
1401 }
1402 return;
1403}
1404
e59058c4 1405/**
3621a710
JS
1406 * lpfc_sli_iocb_cmd_type - Get the iocb type
1407 * @iocb_cmnd: iocb command code.
e59058c4
JS
1408 *
1409 * This function is called by ring event handler function to get the iocb type.
1410 * This function translates the iocb command to an iocb command type used to
1411 * decide the final disposition of each completed IOCB.
1412 * The function returns
1413 * LPFC_UNKNOWN_IOCB if it is an unsupported iocb
1414 * LPFC_SOL_IOCB if it is a solicited iocb completion
1415 * LPFC_ABORT_IOCB if it is an abort iocb
1416 * LPFC_UNSOL_IOCB if it is an unsolicited iocb
1417 *
1418 * The caller is not required to hold any lock.
1419 **/
dea3101e
JB
1420static lpfc_iocb_type
1421lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
1422{
1423 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
1424
1425 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
1426 return 0;
1427
1428 switch (iocb_cmnd) {
1429 case CMD_XMIT_SEQUENCE_CR:
1430 case CMD_XMIT_SEQUENCE_CX:
1431 case CMD_XMIT_BCAST_CN:
1432 case CMD_XMIT_BCAST_CX:
1433 case CMD_ELS_REQUEST_CR:
1434 case CMD_ELS_REQUEST_CX:
1435 case CMD_CREATE_XRI_CR:
1436 case CMD_CREATE_XRI_CX:
1437 case CMD_GET_RPI_CN:
1438 case CMD_XMIT_ELS_RSP_CX:
1439 case CMD_GET_RPI_CR:
1440 case CMD_FCP_IWRITE_CR:
1441 case CMD_FCP_IWRITE_CX:
1442 case CMD_FCP_IREAD_CR:
1443 case CMD_FCP_IREAD_CX:
1444 case CMD_FCP_ICMND_CR:
1445 case CMD_FCP_ICMND_CX:
f5603511
JS
1446 case CMD_FCP_TSEND_CX:
1447 case CMD_FCP_TRSP_CX:
1448 case CMD_FCP_TRECEIVE_CX:
1449 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB
1450 case CMD_ADAPTER_MSG:
1451 case CMD_ADAPTER_DUMP:
1452 case CMD_XMIT_SEQUENCE64_CR:
1453 case CMD_XMIT_SEQUENCE64_CX:
1454 case CMD_XMIT_BCAST64_CN:
1455 case CMD_XMIT_BCAST64_CX:
1456 case CMD_ELS_REQUEST64_CR:
1457 case CMD_ELS_REQUEST64_CX:
1458 case CMD_FCP_IWRITE64_CR:
1459 case CMD_FCP_IWRITE64_CX:
1460 case CMD_FCP_IREAD64_CR:
1461 case CMD_FCP_IREAD64_CX:
1462 case CMD_FCP_ICMND64_CR:
1463 case CMD_FCP_ICMND64_CX:
f5603511
JS
1464 case CMD_FCP_TSEND64_CX:
1465 case CMD_FCP_TRSP64_CX:
1466 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB
1467 case CMD_GEN_REQUEST64_CR:
1468 case CMD_GEN_REQUEST64_CX:
1469 case CMD_XMIT_ELS_RSP64_CX:
da0436e9
JS
1470 case DSSCMD_IWRITE64_CR:
1471 case DSSCMD_IWRITE64_CX:
1472 case DSSCMD_IREAD64_CR:
1473 case DSSCMD_IREAD64_CX:
dea3101e
JB
1474 type = LPFC_SOL_IOCB;
1475 break;
1476 case CMD_ABORT_XRI_CN:
1477 case CMD_ABORT_XRI_CX:
1478 case CMD_CLOSE_XRI_CN:
1479 case CMD_CLOSE_XRI_CX:
1480 case CMD_XRI_ABORTED_CX:
1481 case CMD_ABORT_MXRI64_CN:
6669f9bb 1482 case CMD_XMIT_BLS_RSP64_CX:
dea3101e
JB
1483 type = LPFC_ABORT_IOCB;
1484 break;
1485 case CMD_RCV_SEQUENCE_CX:
1486 case CMD_RCV_ELS_REQ_CX:
1487 case CMD_RCV_SEQUENCE64_CX:
1488 case CMD_RCV_ELS_REQ64_CX:
57127f15 1489 case CMD_ASYNC_STATUS:
ed957684
JS
1490 case CMD_IOCB_RCV_SEQ64_CX:
1491 case CMD_IOCB_RCV_ELS64_CX:
1492 case CMD_IOCB_RCV_CONT64_CX:
3163f725 1493 case CMD_IOCB_RET_XRI64_CX:
dea3101e
JB
1494 type = LPFC_UNSOL_IOCB;
1495 break;
3163f725
JS
1496 case CMD_IOCB_XMIT_MSEQ64_CR:
1497 case CMD_IOCB_XMIT_MSEQ64_CX:
1498 case CMD_IOCB_RCV_SEQ_LIST64_CX:
1499 case CMD_IOCB_RCV_ELS_LIST64_CX:
1500 case CMD_IOCB_CLOSE_EXTENDED_CN:
1501 case CMD_IOCB_ABORT_EXTENDED_CN:
1502 case CMD_IOCB_RET_HBQE64_CN:
1503 case CMD_IOCB_FCP_IBIDIR64_CR:
1504 case CMD_IOCB_FCP_IBIDIR64_CX:
1505 case CMD_IOCB_FCP_ITASKMGT64_CX:
1506 case CMD_IOCB_LOGENTRY_CN:
1507 case CMD_IOCB_LOGENTRY_ASYNC_CN:
1508 printk("%s - Unhandled SLI-3 Command x%x\n",
cadbd4a5 1509 __func__, iocb_cmnd);
3163f725
JS
1510 type = LPFC_UNKNOWN_IOCB;
1511 break;
dea3101e
JB
1512 default:
1513 type = LPFC_UNKNOWN_IOCB;
1514 break;
1515 }
1516
1517 return type;
1518}
1519
e59058c4 1520/**
3621a710 1521 * lpfc_sli_ring_map - Issue config_ring mbox for all rings
e59058c4
JS
1522 * @phba: Pointer to HBA context object.
1523 *
1524 * This function is called from SLI initialization code
1525 * to configure every ring of the HBA's SLI interface. The
1526 * caller is not required to hold any lock. This function issues
1527 * a config_ring mailbox command for each ring.
1528 * This function returns zero if successful else returns a negative
1529 * error code.
1530 **/
dea3101e 1531static int
ed957684 1532lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB
1533{
1534 struct lpfc_sli *psli = &phba->sli;
ed957684
JS
1535 LPFC_MBOXQ_t *pmb;
1536 MAILBOX_t *pmbox;
1537 int i, rc, ret = 0;
dea3101e 1538
ed957684
JS
1539 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1540 if (!pmb)
1541 return -ENOMEM;
04c68496 1542 pmbox = &pmb->u.mb;
ed957684 1543 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 1544 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB
1545 lpfc_config_ring(phba, i, pmb);
1546 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1547 if (rc != MBX_SUCCESS) {
92d7f7b0 1548 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1549 "0446 Adapter failed to init (%d), "
dea3101e
JB
1550 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
1551 "ring %d\n",
e8b62011
JS
1552 rc, pmbox->mbxCommand,
1553 pmbox->mbxStatus, i);
2e0fef85 1554 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS
1555 ret = -ENXIO;
1556 break;
dea3101e
JB
1557 }
1558 }
ed957684
JS
1559 mempool_free(pmb, phba->mbox_mem_pool);
1560 return ret;
dea3101e
JB
1561}
1562
e59058c4 1563/**
3621a710 1564 * lpfc_sli_ringtxcmpl_put - Adds new iocb to the txcmplq
e59058c4
JS
1565 * @phba: Pointer to HBA context object.
1566 * @pring: Pointer to driver SLI ring object.
1567 * @piocb: Pointer to the driver iocb object.
1568 *
e2a8be56
JS
1569 * The driver calls this function with the hbalock held for SLI3 ports or
1570 * the ring lock held for SLI4 ports. The function adds the
e59058c4
JS
1571 * new iocb to txcmplq of the given ring. This function always returns
1572 * 0. If this function is called for ELS ring, this function checks if
1573 * there is a vport associated with the ELS command. This function also
1574 * starts els_tmofunc timer if this is an ELS command.
1575 **/
dea3101e 1576static int
2e0fef85
JS
1577lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1578 struct lpfc_iocbq *piocb)
dea3101e 1579{
e2a8be56
JS
1580 if (phba->sli_rev == LPFC_SLI_REV4)
1581 lockdep_assert_held(&pring->ring_lock);
1582 else
1583 lockdep_assert_held(&phba->hbalock);
1c2ba475 1584
2319f847 1585 BUG_ON(!piocb);
22466da5 1586
dea3101e 1587 list_add_tail(&piocb->list, &pring->txcmplq);
4f2e66c6 1588 piocb->iocb_flag |= LPFC_IO_ON_TXCMPLQ;
c490850a 1589 pring->txcmplq_cnt++;
2a9bf3d0 1590
92d7f7b0
JS
1591 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
1592 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2319f847
MFO
1593 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
1594 BUG_ON(!piocb->vport);
1595 if (!(piocb->vport->load_flag & FC_UNLOADING))
1596 mod_timer(&piocb->vport->els_tmofunc,
1597 jiffies +
1598 msecs_to_jiffies(1000 * (phba->fc_ratov << 1)));
1599 }
dea3101e 1600
2e0fef85 1601 return 0;
dea3101e
JB
1602}
1603
e59058c4 1604/**
3621a710 1605 * lpfc_sli_ringtx_get - Get first element of the txq
e59058c4
JS
1606 * @phba: Pointer to HBA context object.
1607 * @pring: Pointer to driver SLI ring object.
1608 *
1609 * This function is called with hbalock held to get next
1610 * iocb in txq of the given ring. If there is any iocb in
1611 * the txq, the function returns first iocb in the list after
1612 * removing the iocb from the list, else it returns NULL.
1613 **/
2a9bf3d0 1614struct lpfc_iocbq *
2e0fef85 1615lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 1616{
dea3101e
JB
1617 struct lpfc_iocbq *cmd_iocb;
1618
1c2ba475
JT
1619 lockdep_assert_held(&phba->hbalock);
1620
858c9f6c 1621 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
2e0fef85 1622 return cmd_iocb;
dea3101e
JB
1623}
1624
e59058c4 1625/**
3621a710 1626 * lpfc_sli_next_iocb_slot - Get next iocb slot in the ring
e59058c4
JS
1627 * @phba: Pointer to HBA context object.
1628 * @pring: Pointer to driver SLI ring object.
1629 *
1630 * This function is called with hbalock held and the caller must post the
1631 * iocb without releasing the lock. If the caller releases the lock,
1632 * iocb slot returned by the function is not guaranteed to be available.
1633 * The function returns pointer to the next available iocb slot if there
1634 * is available slot in the ring, else it returns NULL.
1635 * If the get index of the ring is ahead of the put index, the function
1636 * will post an error attention event to the worker thread to take the
1637 * HBA to offline state.
1638 **/
dea3101e
JB
1639static IOCB_t *
1640lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1641{
34b02dcd 1642 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
7e56aa25 1643 uint32_t max_cmd_idx = pring->sli.sli3.numCiocb;
1c2ba475
JT
1644
1645 lockdep_assert_held(&phba->hbalock);
1646
7e56aa25
JS
1647 if ((pring->sli.sli3.next_cmdidx == pring->sli.sli3.cmdidx) &&
1648 (++pring->sli.sli3.next_cmdidx >= max_cmd_idx))
1649 pring->sli.sli3.next_cmdidx = 0;
dea3101e 1650
7e56aa25
JS
1651 if (unlikely(pring->sli.sli3.local_getidx ==
1652 pring->sli.sli3.next_cmdidx)) {
dea3101e 1653
7e56aa25 1654 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e 1655
7e56aa25 1656 if (unlikely(pring->sli.sli3.local_getidx >= max_cmd_idx)) {
dea3101e 1657 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1658 "0315 Ring %d issue: portCmdGet %d "
025dfdaf 1659 "is bigger than cmd ring %d\n",
e8b62011 1660 pring->ringno,
7e56aa25
JS
1661 pring->sli.sli3.local_getidx,
1662 max_cmd_idx);
dea3101e 1663
2e0fef85 1664 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
1665 /*
1666 * All error attention handlers are posted to
1667 * worker thread
1668 */
1669 phba->work_ha |= HA_ERATT;
1670 phba->work_hs = HS_FFER3;
92d7f7b0 1671
5e9d9b82 1672 lpfc_worker_wake_up(phba);
dea3101e
JB
1673
1674 return NULL;
1675 }
1676
7e56aa25 1677 if (pring->sli.sli3.local_getidx == pring->sli.sli3.next_cmdidx)
dea3101e
JB
1678 return NULL;
1679 }
1680
ed957684 1681 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB
1682}
1683
e59058c4 1684/**
3621a710 1685 * lpfc_sli_next_iotag - Get an iotag for the iocb
e59058c4
JS
1686 * @phba: Pointer to HBA context object.
1687 * @iocbq: Pointer to driver iocb object.
1688 *
1689 * This function gets an iotag for the iocb. If there is no unused iotag and
1690 * the iocbq_lookup_len < 0xffff, this function allocates a bigger iotag_lookup
1691 * array and assigns a new iotag.
1692 * The function returns the allocated iotag if successful, else returns zero.
1693 * Zero is not a valid iotag.
1694 * The caller is not required to hold any lock.
1695 **/
604a3e30 1696uint16_t
2e0fef85 1697lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 1698{
2e0fef85
JS
1699 struct lpfc_iocbq **new_arr;
1700 struct lpfc_iocbq **old_arr;
604a3e30
JB
1701 size_t new_len;
1702 struct lpfc_sli *psli = &phba->sli;
1703 uint16_t iotag;
dea3101e 1704
2e0fef85 1705 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1706 iotag = psli->last_iotag;
1707 if(++iotag < psli->iocbq_lookup_len) {
1708 psli->last_iotag = iotag;
1709 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1710 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1711 iocbq->iotag = iotag;
1712 return iotag;
2e0fef85 1713 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB
1714 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
1715 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85 1716 spin_unlock_irq(&phba->hbalock);
6396bb22 1717 new_arr = kcalloc(new_len, sizeof(struct lpfc_iocbq *),
604a3e30
JB
1718 GFP_KERNEL);
1719 if (new_arr) {
2e0fef85 1720 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1721 old_arr = psli->iocbq_lookup;
1722 if (new_len <= psli->iocbq_lookup_len) {
1723 /* highly unprobable case */
1724 kfree(new_arr);
1725 iotag = psli->last_iotag;
1726 if(++iotag < psli->iocbq_lookup_len) {
1727 psli->last_iotag = iotag;
1728 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1729 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1730 iocbq->iotag = iotag;
1731 return iotag;
1732 }
2e0fef85 1733 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1734 return 0;
1735 }
1736 if (psli->iocbq_lookup)
1737 memcpy(new_arr, old_arr,
1738 ((psli->last_iotag + 1) *
311464ec 1739 sizeof (struct lpfc_iocbq *)));
604a3e30
JB
1740 psli->iocbq_lookup = new_arr;
1741 psli->iocbq_lookup_len = new_len;
1742 psli->last_iotag = iotag;
1743 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1744 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1745 iocbq->iotag = iotag;
1746 kfree(old_arr);
1747 return iotag;
1748 }
8f6d98d2 1749 } else
2e0fef85 1750 spin_unlock_irq(&phba->hbalock);
dea3101e 1751
bc73905a 1752 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
1753 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
1754 psli->last_iotag);
dea3101e 1755
604a3e30 1756 return 0;
dea3101e
JB
1757}
1758
e59058c4 1759/**
3621a710 1760 * lpfc_sli_submit_iocb - Submit an iocb to the firmware
e59058c4
JS
1761 * @phba: Pointer to HBA context object.
1762 * @pring: Pointer to driver SLI ring object.
1763 * @iocb: Pointer to iocb slot in the ring.
1764 * @nextiocb: Pointer to driver iocb object which need to be
1765 * posted to firmware.
1766 *
1767 * This function is called with hbalock held to post a new iocb to
1768 * the firmware. This function copies the new iocb to ring iocb slot and
1769 * updates the ring pointers. It adds the new iocb to txcmplq if there is
1770 * a completion call back for this iocb else the function will free the
1771 * iocb object.
1772 **/
dea3101e
JB
1773static void
1774lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1775 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
1776{
1c2ba475 1777 lockdep_assert_held(&phba->hbalock);
dea3101e 1778 /*
604a3e30 1779 * Set up an iotag
dea3101e 1780 */
604a3e30 1781 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 1782
e2a0a9d6 1783
a58cbd52
JS
1784 if (pring->ringno == LPFC_ELS_RING) {
1785 lpfc_debugfs_slow_ring_trc(phba,
1786 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1787 *(((uint32_t *) &nextiocb->iocb) + 4),
1788 *(((uint32_t *) &nextiocb->iocb) + 6),
1789 *(((uint32_t *) &nextiocb->iocb) + 7));
1790 }
1791
dea3101e
JB
1792 /*
1793 * Issue iocb command to adapter
1794 */
92d7f7b0 1795 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB
1796 wmb();
1797 pring->stats.iocb_cmd++;
1798
1799 /*
1800 * If there is no completion routine to call, we can release the
1801 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
1802 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
1803 */
1804 if (nextiocb->iocb_cmpl)
1805 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 1806 else
2e0fef85 1807 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB
1808
1809 /*
1810 * Let the HBA know what IOCB slot will be the next one the
1811 * driver will put a command into.
1812 */
7e56aa25
JS
1813 pring->sli.sli3.cmdidx = pring->sli.sli3.next_cmdidx;
1814 writel(pring->sli.sli3.cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB
1815}
1816
e59058c4 1817/**
3621a710 1818 * lpfc_sli_update_full_ring - Update the chip attention register
e59058c4
JS
1819 * @phba: Pointer to HBA context object.
1820 * @pring: Pointer to driver SLI ring object.
1821 *
1822 * The caller is not required to hold any lock for calling this function.
1823 * This function updates the chip attention bits for the ring to inform firmware
1824 * that there are pending work to be done for this ring and requests an
1825 * interrupt when there is space available in the ring. This function is
1826 * called when the driver is unable to post more iocbs to the ring due
1827 * to unavailability of space in the ring.
1828 **/
dea3101e 1829static void
2e0fef85 1830lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1831{
1832 int ringno = pring->ringno;
1833
1834 pring->flag |= LPFC_CALL_RING_AVAILABLE;
1835
1836 wmb();
1837
1838 /*
1839 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
1840 * The HBA will tell us when an IOCB entry is available.
1841 */
1842 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
1843 readl(phba->CAregaddr); /* flush */
1844
1845 pring->stats.iocb_cmd_full++;
1846}
1847
e59058c4 1848/**
3621a710 1849 * lpfc_sli_update_ring - Update chip attention register
e59058c4
JS
1850 * @phba: Pointer to HBA context object.
1851 * @pring: Pointer to driver SLI ring object.
1852 *
1853 * This function updates the chip attention register bit for the
1854 * given ring to inform HBA that there is more work to be done
1855 * in this ring. The caller is not required to hold any lock.
1856 **/
dea3101e 1857static void
2e0fef85 1858lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1859{
1860 int ringno = pring->ringno;
1861
1862 /*
1863 * Tell the HBA that there is work to do in this ring.
1864 */
34b02dcd
JS
1865 if (!(phba->sli3_options & LPFC_SLI3_CRP_ENABLED)) {
1866 wmb();
1867 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
1868 readl(phba->CAregaddr); /* flush */
1869 }
dea3101e
JB
1870}
1871
e59058c4 1872/**
3621a710 1873 * lpfc_sli_resume_iocb - Process iocbs in the txq
e59058c4
JS
1874 * @phba: Pointer to HBA context object.
1875 * @pring: Pointer to driver SLI ring object.
1876 *
1877 * This function is called with hbalock held to post pending iocbs
1878 * in the txq to the firmware. This function is called when driver
1879 * detects space available in the ring.
1880 **/
dea3101e 1881static void
2e0fef85 1882lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1883{
1884 IOCB_t *iocb;
1885 struct lpfc_iocbq *nextiocb;
1886
1c2ba475
JT
1887 lockdep_assert_held(&phba->hbalock);
1888
dea3101e
JB
1889 /*
1890 * Check to see if:
1891 * (a) there is anything on the txq to send
1892 * (b) link is up
1893 * (c) link attention events can be processed (fcp ring only)
1894 * (d) IOCB processing is not blocked by the outstanding mbox command.
1895 */
0e9bb8d7
JS
1896
1897 if (lpfc_is_link_up(phba) &&
1898 (!list_empty(&pring->txq)) &&
895427bd 1899 (pring->ringno != LPFC_FCP_RING ||
0b727fea 1900 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e
JB
1901
1902 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
1903 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
1904 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
1905
1906 if (iocb)
1907 lpfc_sli_update_ring(phba, pring);
1908 else
1909 lpfc_sli_update_full_ring(phba, pring);
1910 }
1911
1912 return;
1913}
1914
e59058c4 1915/**
3621a710 1916 * lpfc_sli_next_hbq_slot - Get next hbq entry for the HBQ
e59058c4
JS
1917 * @phba: Pointer to HBA context object.
1918 * @hbqno: HBQ number.
1919 *
1920 * This function is called with hbalock held to get the next
1921 * available slot for the given HBQ. If there is free slot
1922 * available for the HBQ it will return pointer to the next available
1923 * HBQ entry else it will return NULL.
1924 **/
a6ababd2 1925static struct lpfc_hbq_entry *
ed957684
JS
1926lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
1927{
1928 struct hbq_s *hbqp = &phba->hbqs[hbqno];
1929
1c2ba475
JT
1930 lockdep_assert_held(&phba->hbalock);
1931
ed957684
JS
1932 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
1933 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
1934 hbqp->next_hbqPutIdx = 0;
1935
1936 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 1937 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS
1938 uint32_t getidx = le32_to_cpu(raw_index);
1939
1940 hbqp->local_hbqGetIdx = getidx;
1941
1942 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
1943 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 1944 LOG_SLI | LOG_VPORT,
e8b62011 1945 "1802 HBQ %d: local_hbqGetIdx "
ed957684 1946 "%u is > than hbqp->entry_count %u\n",
e8b62011 1947 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS
1948 hbqp->entry_count);
1949
1950 phba->link_state = LPFC_HBA_ERROR;
1951 return NULL;
1952 }
1953
1954 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
1955 return NULL;
1956 }
1957
51ef4c26
JS
1958 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
1959 hbqp->hbqPutIdx;
ed957684
JS
1960}
1961
e59058c4 1962/**
3621a710 1963 * lpfc_sli_hbqbuf_free_all - Free all the hbq buffers
e59058c4
JS
1964 * @phba: Pointer to HBA context object.
1965 *
1966 * This function is called with no lock held to free all the
1967 * hbq buffers while uninitializing the SLI interface. It also
1968 * frees the HBQ buffers returned by the firmware but not yet
1969 * processed by the upper layers.
1970 **/
ed957684
JS
1971void
1972lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
1973{
92d7f7b0
JS
1974 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
1975 struct hbq_dmabuf *hbq_buf;
3163f725 1976 unsigned long flags;
51ef4c26 1977 int i, hbq_count;
ed957684 1978
51ef4c26 1979 hbq_count = lpfc_sli_hbq_count();
ed957684 1980 /* Return all memory used by all HBQs */
3163f725 1981 spin_lock_irqsave(&phba->hbalock, flags);
51ef4c26
JS
1982 for (i = 0; i < hbq_count; ++i) {
1983 list_for_each_entry_safe(dmabuf, next_dmabuf,
1984 &phba->hbqs[i].hbq_buffer_list, list) {
1985 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
1986 list_del(&hbq_buf->dbuf.list);
1987 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
1988 }
a8adb832 1989 phba->hbqs[i].buffer_count = 0;
ed957684 1990 }
3163f725
JS
1991
1992 /* Mark the HBQs not in use */
1993 phba->hbq_in_use = 0;
1994 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684
JS
1995}
1996
e59058c4 1997/**
3621a710 1998 * lpfc_sli_hbq_to_firmware - Post the hbq buffer to firmware
e59058c4
JS
1999 * @phba: Pointer to HBA context object.
2000 * @hbqno: HBQ number.
2001 * @hbq_buf: Pointer to HBQ buffer.
2002 *
2003 * This function is called with the hbalock held to post a
2004 * hbq buffer to the firmware. If the function finds an empty
2005 * slot in the HBQ, it will post the buffer. The function will return
2006 * pointer to the hbq entry if it successfully post the buffer
2007 * else it will return NULL.
2008 **/
3772a991 2009static int
ed957684 2010lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 2011 struct hbq_dmabuf *hbq_buf)
3772a991 2012{
1c2ba475 2013 lockdep_assert_held(&phba->hbalock);
3772a991
JS
2014 return phba->lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buf);
2015}
2016
2017/**
2018 * lpfc_sli_hbq_to_firmware_s3 - Post the hbq buffer to SLI3 firmware
2019 * @phba: Pointer to HBA context object.
2020 * @hbqno: HBQ number.
2021 * @hbq_buf: Pointer to HBQ buffer.
2022 *
2023 * This function is called with the hbalock held to post a hbq buffer to the
2024 * firmware. If the function finds an empty slot in the HBQ, it will post the
2025 * buffer and place it on the hbq_buffer_list. The function will return zero if
2026 * it successfully post the buffer else it will return an error.
2027 **/
2028static int
2029lpfc_sli_hbq_to_firmware_s3(struct lpfc_hba *phba, uint32_t hbqno,
2030 struct hbq_dmabuf *hbq_buf)
ed957684
JS
2031{
2032 struct lpfc_hbq_entry *hbqe;
92d7f7b0 2033 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684 2034
1c2ba475 2035 lockdep_assert_held(&phba->hbalock);
ed957684
JS
2036 /* Get next HBQ entry slot to use */
2037 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
2038 if (hbqe) {
2039 struct hbq_s *hbqp = &phba->hbqs[hbqno];
2040
92d7f7b0
JS
2041 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
2042 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
895427bd 2043 hbqe->bde.tus.f.bdeSize = hbq_buf->total_size;
ed957684 2044 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS
2045 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
2046 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
2047 /* Sync SLIM */
ed957684
JS
2048 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
2049 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 2050 /* flush */
ed957684 2051 readl(phba->hbq_put + hbqno);
51ef4c26 2052 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
3772a991
JS
2053 return 0;
2054 } else
2055 return -ENOMEM;
ed957684
JS
2056}
2057
4f774513
JS
2058/**
2059 * lpfc_sli_hbq_to_firmware_s4 - Post the hbq buffer to SLI4 firmware
2060 * @phba: Pointer to HBA context object.
2061 * @hbqno: HBQ number.
2062 * @hbq_buf: Pointer to HBQ buffer.
2063 *
2064 * This function is called with the hbalock held to post an RQE to the SLI4
2065 * firmware. If able to post the RQE to the RQ it will queue the hbq entry to
2066 * the hbq_buffer_list and return zero, otherwise it will return an error.
2067 **/
2068static int
2069lpfc_sli_hbq_to_firmware_s4(struct lpfc_hba *phba, uint32_t hbqno,
2070 struct hbq_dmabuf *hbq_buf)
2071{
2072 int rc;
2073 struct lpfc_rqe hrqe;
2074 struct lpfc_rqe drqe;
895427bd
JS
2075 struct lpfc_queue *hrq;
2076 struct lpfc_queue *drq;
2077
2078 if (hbqno != LPFC_ELS_HBQ)
2079 return 1;
2080 hrq = phba->sli4_hba.hdr_rq;
2081 drq = phba->sli4_hba.dat_rq;
4f774513 2082
1c2ba475 2083 lockdep_assert_held(&phba->hbalock);
4f774513
JS
2084 hrqe.address_lo = putPaddrLow(hbq_buf->hbuf.phys);
2085 hrqe.address_hi = putPaddrHigh(hbq_buf->hbuf.phys);
2086 drqe.address_lo = putPaddrLow(hbq_buf->dbuf.phys);
2087 drqe.address_hi = putPaddrHigh(hbq_buf->dbuf.phys);
895427bd 2088 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
4f774513
JS
2089 if (rc < 0)
2090 return rc;
895427bd 2091 hbq_buf->tag = (rc | (hbqno << 16));
4f774513
JS
2092 list_add_tail(&hbq_buf->dbuf.list, &phba->hbqs[hbqno].hbq_buffer_list);
2093 return 0;
2094}
2095
e59058c4 2096/* HBQ for ELS and CT traffic. */
92d7f7b0
JS
2097static struct lpfc_hbq_init lpfc_els_hbq = {
2098 .rn = 1,
def9c7a9 2099 .entry_count = 256,
92d7f7b0
JS
2100 .mask_count = 0,
2101 .profile = 0,
51ef4c26 2102 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0 2103 .buffer_count = 0,
a257bf90
JS
2104 .init_count = 40,
2105 .add_count = 40,
92d7f7b0 2106};
ed957684 2107
e59058c4 2108/* Array of HBQs */
78b2d852 2109struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0
JS
2110 &lpfc_els_hbq,
2111};
ed957684 2112
e59058c4 2113/**
3621a710 2114 * lpfc_sli_hbqbuf_fill_hbqs - Post more hbq buffers to HBQ
e59058c4
JS
2115 * @phba: Pointer to HBA context object.
2116 * @hbqno: HBQ number.
2117 * @count: Number of HBQ buffers to be posted.
2118 *
d7c255b2
JS
2119 * This function is called with no lock held to post more hbq buffers to the
2120 * given HBQ. The function returns the number of HBQ buffers successfully
2121 * posted.
e59058c4 2122 **/
311464ec 2123static int
92d7f7b0 2124lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 2125{
d7c255b2 2126 uint32_t i, posted = 0;
3163f725 2127 unsigned long flags;
92d7f7b0 2128 struct hbq_dmabuf *hbq_buffer;
d7c255b2 2129 LIST_HEAD(hbq_buf_list);
eafe1df9 2130 if (!phba->hbqs[hbqno].hbq_alloc_buffer)
51ef4c26 2131 return 0;
51ef4c26 2132
d7c255b2
JS
2133 if ((phba->hbqs[hbqno].buffer_count + count) >
2134 lpfc_hbq_defs[hbqno]->entry_count)
2135 count = lpfc_hbq_defs[hbqno]->entry_count -
2136 phba->hbqs[hbqno].buffer_count;
2137 if (!count)
2138 return 0;
2139 /* Allocate HBQ entries */
2140 for (i = 0; i < count; i++) {
2141 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
2142 if (!hbq_buffer)
2143 break;
2144 list_add_tail(&hbq_buffer->dbuf.list, &hbq_buf_list);
2145 }
3163f725
JS
2146 /* Check whether HBQ is still in use */
2147 spin_lock_irqsave(&phba->hbalock, flags);
eafe1df9 2148 if (!phba->hbq_in_use)
d7c255b2
JS
2149 goto err;
2150 while (!list_empty(&hbq_buf_list)) {
2151 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2152 dbuf.list);
2153 hbq_buffer->tag = (phba->hbqs[hbqno].buffer_count |
2154 (hbqno << 16));
3772a991 2155 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
a8adb832 2156 phba->hbqs[hbqno].buffer_count++;
d7c255b2
JS
2157 posted++;
2158 } else
51ef4c26 2159 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684 2160 }
3163f725 2161 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2162 return posted;
2163err:
eafe1df9 2164 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2165 while (!list_empty(&hbq_buf_list)) {
2166 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2167 dbuf.list);
2168 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
2169 }
2170 return 0;
ed957684
JS
2171}
2172
e59058c4 2173/**
3621a710 2174 * lpfc_sli_hbqbuf_add_hbqs - Post more HBQ buffers to firmware
e59058c4
JS
2175 * @phba: Pointer to HBA context object.
2176 * @qno: HBQ number.
2177 *
2178 * This function posts more buffers to the HBQ. This function
d7c255b2
JS
2179 * is called with no lock held. The function returns the number of HBQ entries
2180 * successfully allocated.
e59058c4 2181 **/
92d7f7b0
JS
2182int
2183lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 2184{
def9c7a9
JS
2185 if (phba->sli_rev == LPFC_SLI_REV4)
2186 return 0;
2187 else
2188 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2189 lpfc_hbq_defs[qno]->add_count);
92d7f7b0 2190}
ed957684 2191
e59058c4 2192/**
3621a710 2193 * lpfc_sli_hbqbuf_init_hbqs - Post initial buffers to the HBQ
e59058c4
JS
2194 * @phba: Pointer to HBA context object.
2195 * @qno: HBQ queue number.
2196 *
2197 * This function is called from SLI initialization code path with
2198 * no lock held to post initial HBQ buffers to firmware. The
d7c255b2 2199 * function returns the number of HBQ entries successfully allocated.
e59058c4 2200 **/
a6ababd2 2201static int
92d7f7b0
JS
2202lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
2203{
def9c7a9
JS
2204 if (phba->sli_rev == LPFC_SLI_REV4)
2205 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
73d91e50 2206 lpfc_hbq_defs[qno]->entry_count);
def9c7a9
JS
2207 else
2208 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2209 lpfc_hbq_defs[qno]->init_count);
ed957684
JS
2210}
2211
3772a991
JS
2212/**
2213 * lpfc_sli_hbqbuf_get - Remove the first hbq off of an hbq list
2214 * @phba: Pointer to HBA context object.
2215 * @hbqno: HBQ number.
2216 *
2217 * This function removes the first hbq buffer on an hbq list and returns a
2218 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2219 **/
2220static struct hbq_dmabuf *
2221lpfc_sli_hbqbuf_get(struct list_head *rb_list)
2222{
2223 struct lpfc_dmabuf *d_buf;
2224
2225 list_remove_head(rb_list, d_buf, struct lpfc_dmabuf, list);
2226 if (!d_buf)
2227 return NULL;
2228 return container_of(d_buf, struct hbq_dmabuf, dbuf);
2229}
2230
2d7dbc4c
JS
2231/**
2232 * lpfc_sli_rqbuf_get - Remove the first dma buffer off of an RQ list
2233 * @phba: Pointer to HBA context object.
2234 * @hbqno: HBQ number.
2235 *
2236 * This function removes the first RQ buffer on an RQ buffer list and returns a
2237 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2238 **/
2239static struct rqb_dmabuf *
2240lpfc_sli_rqbuf_get(struct lpfc_hba *phba, struct lpfc_queue *hrq)
2241{
2242 struct lpfc_dmabuf *h_buf;
2243 struct lpfc_rqb *rqbp;
2244
2245 rqbp = hrq->rqbp;
2246 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
2247 struct lpfc_dmabuf, list);
2248 if (!h_buf)
2249 return NULL;
2250 rqbp->buffer_count--;
2251 return container_of(h_buf, struct rqb_dmabuf, hbuf);
2252}
2253
e59058c4 2254/**
3621a710 2255 * lpfc_sli_hbqbuf_find - Find the hbq buffer associated with a tag
e59058c4
JS
2256 * @phba: Pointer to HBA context object.
2257 * @tag: Tag of the hbq buffer.
2258 *
71892418
SH
2259 * This function searches for the hbq buffer associated with the given tag in
2260 * the hbq buffer list. If it finds the hbq buffer, it returns the hbq_buffer
2261 * otherwise it returns NULL.
e59058c4 2262 **/
a6ababd2 2263static struct hbq_dmabuf *
92d7f7b0 2264lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 2265{
92d7f7b0
JS
2266 struct lpfc_dmabuf *d_buf;
2267 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS
2268 uint32_t hbqno;
2269
2270 hbqno = tag >> 16;
a0a74e45 2271 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 2272 return NULL;
ed957684 2273
3772a991 2274 spin_lock_irq(&phba->hbalock);
51ef4c26 2275 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 2276 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 2277 if (hbq_buf->tag == tag) {
3772a991 2278 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2279 return hbq_buf;
ed957684
JS
2280 }
2281 }
3772a991 2282 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2283 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 2284 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 2285 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 2286 return NULL;
ed957684
JS
2287}
2288
e59058c4 2289/**
3621a710 2290 * lpfc_sli_free_hbq - Give back the hbq buffer to firmware
e59058c4
JS
2291 * @phba: Pointer to HBA context object.
2292 * @hbq_buffer: Pointer to HBQ buffer.
2293 *
2294 * This function is called with hbalock. This function gives back
2295 * the hbq buffer to firmware. If the HBQ does not have space to
2296 * post the buffer, it will free the buffer.
2297 **/
ed957684 2298void
51ef4c26 2299lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS
2300{
2301 uint32_t hbqno;
2302
51ef4c26
JS
2303 if (hbq_buffer) {
2304 hbqno = hbq_buffer->tag >> 16;
3772a991 2305 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
51ef4c26 2306 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS
2307 }
2308}
2309
e59058c4 2310/**
3621a710 2311 * lpfc_sli_chk_mbx_command - Check if the mailbox is a legitimate mailbox
e59058c4
JS
2312 * @mbxCommand: mailbox command code.
2313 *
2314 * This function is called by the mailbox event handler function to verify
2315 * that the completed mailbox command is a legitimate mailbox command. If the
2316 * completed mailbox is not known to the function, it will return MBX_SHUTDOWN
2317 * and the mailbox event handler will take the HBA offline.
2318 **/
dea3101e
JB
2319static int
2320lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
2321{
2322 uint8_t ret;
2323
2324 switch (mbxCommand) {
2325 case MBX_LOAD_SM:
2326 case MBX_READ_NV:
2327 case MBX_WRITE_NV:
a8adb832 2328 case MBX_WRITE_VPARMS:
dea3101e
JB
2329 case MBX_RUN_BIU_DIAG:
2330 case MBX_INIT_LINK:
2331 case MBX_DOWN_LINK:
2332 case MBX_CONFIG_LINK:
2333 case MBX_CONFIG_RING:
2334 case MBX_RESET_RING:
2335 case MBX_READ_CONFIG:
2336 case MBX_READ_RCONFIG:
2337 case MBX_READ_SPARM:
2338 case MBX_READ_STATUS:
2339 case MBX_READ_RPI:
2340 case MBX_READ_XRI:
2341 case MBX_READ_REV:
2342 case MBX_READ_LNK_STAT:
2343 case MBX_REG_LOGIN:
2344 case MBX_UNREG_LOGIN:
dea3101e
JB
2345 case MBX_CLEAR_LA:
2346 case MBX_DUMP_MEMORY:
2347 case MBX_DUMP_CONTEXT:
2348 case MBX_RUN_DIAGS:
2349 case MBX_RESTART:
2350 case MBX_UPDATE_CFG:
2351 case MBX_DOWN_LOAD:
2352 case MBX_DEL_LD_ENTRY:
2353 case MBX_RUN_PROGRAM:
2354 case MBX_SET_MASK:
09372820 2355 case MBX_SET_VARIABLE:
dea3101e 2356 case MBX_UNREG_D_ID:
41415862 2357 case MBX_KILL_BOARD:
dea3101e 2358 case MBX_CONFIG_FARP:
41415862 2359 case MBX_BEACON:
dea3101e
JB
2360 case MBX_LOAD_AREA:
2361 case MBX_RUN_BIU_DIAG64:
2362 case MBX_CONFIG_PORT:
2363 case MBX_READ_SPARM64:
2364 case MBX_READ_RPI64:
2365 case MBX_REG_LOGIN64:
76a95d75 2366 case MBX_READ_TOPOLOGY:
09372820 2367 case MBX_WRITE_WWN:
dea3101e
JB
2368 case MBX_SET_DEBUG:
2369 case MBX_LOAD_EXP_ROM:
57127f15 2370 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS
2371 case MBX_REG_VPI:
2372 case MBX_UNREG_VPI:
858c9f6c 2373 case MBX_HEARTBEAT:
84774a4d
JS
2374 case MBX_PORT_CAPABILITIES:
2375 case MBX_PORT_IOV_CONTROL:
04c68496
JS
2376 case MBX_SLI4_CONFIG:
2377 case MBX_SLI4_REQ_FTRS:
2378 case MBX_REG_FCFI:
2379 case MBX_UNREG_FCFI:
2380 case MBX_REG_VFI:
2381 case MBX_UNREG_VFI:
2382 case MBX_INIT_VPI:
2383 case MBX_INIT_VFI:
2384 case MBX_RESUME_RPI:
c7495937
JS
2385 case MBX_READ_EVENT_LOG_STATUS:
2386 case MBX_READ_EVENT_LOG:
dcf2a4e0
JS
2387 case MBX_SECURITY_MGMT:
2388 case MBX_AUTH_PORT:
940eb687 2389 case MBX_ACCESS_VDATA:
dea3101e
JB
2390 ret = mbxCommand;
2391 break;
2392 default:
2393 ret = MBX_SHUTDOWN;
2394 break;
2395 }
2e0fef85 2396 return ret;
dea3101e 2397}
e59058c4
JS
2398
2399/**
3621a710 2400 * lpfc_sli_wake_mbox_wait - lpfc_sli_issue_mbox_wait mbox completion handler
e59058c4
JS
2401 * @phba: Pointer to HBA context object.
2402 * @pmboxq: Pointer to mailbox command.
2403 *
2404 * This is completion handler function for mailbox commands issued from
2405 * lpfc_sli_issue_mbox_wait function. This function is called by the
2406 * mailbox event handler function with no lock held. This function
2407 * will wake up thread waiting on the wait queue pointed by context1
2408 * of the mailbox.
2409 **/
04c68496 2410void
2e0fef85 2411lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e 2412{
858c9f6c 2413 unsigned long drvr_flag;
e29d74f8 2414 struct completion *pmbox_done;
dea3101e
JB
2415
2416 /*
e29d74f8 2417 * If pmbox_done is empty, the driver thread gave up waiting and
dea3101e
JB
2418 * continued running.
2419 */
7054a606 2420 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 2421 spin_lock_irqsave(&phba->hbalock, drvr_flag);
e29d74f8
JS
2422 pmbox_done = (struct completion *)pmboxq->context3;
2423 if (pmbox_done)
2424 complete(pmbox_done);
858c9f6c 2425 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
2426 return;
2427}
2428
e59058c4
JS
2429
2430/**
3621a710 2431 * lpfc_sli_def_mbox_cmpl - Default mailbox completion handler
e59058c4
JS
2432 * @phba: Pointer to HBA context object.
2433 * @pmb: Pointer to mailbox object.
2434 *
2435 * This function is the default mailbox completion handler. It
2436 * frees the memory resources associated with the completed mailbox
2437 * command. If the completed command is a REG_LOGIN mailbox command,
2438 * this function will issue a UREG_LOGIN to re-claim the RPI.
2439 **/
dea3101e 2440void
2e0fef85 2441lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e 2442{
d439d286 2443 struct lpfc_vport *vport = pmb->vport;
dea3101e 2444 struct lpfc_dmabuf *mp;
d439d286 2445 struct lpfc_nodelist *ndlp;
5af5eee7 2446 struct Scsi_Host *shost;
04c68496 2447 uint16_t rpi, vpi;
7054a606
JS
2448 int rc;
2449
3e1f0718 2450 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
7054a606 2451
dea3101e
JB
2452 if (mp) {
2453 lpfc_mbuf_free(phba, mp->virt, mp->phys);
2454 kfree(mp);
2455 }
7054a606
JS
2456
2457 /*
2458 * If a REG_LOGIN succeeded after node is destroyed or node
2459 * is in re-discovery driver need to cleanup the RPI.
2460 */
2e0fef85 2461 if (!(phba->pport->load_flag & FC_UNLOADING) &&
04c68496
JS
2462 pmb->u.mb.mbxCommand == MBX_REG_LOGIN64 &&
2463 !pmb->u.mb.mbxStatus) {
2464 rpi = pmb->u.mb.un.varWords[0];
6d368e53 2465 vpi = pmb->u.mb.un.varRegLogin.vpi;
04c68496 2466 lpfc_unreg_login(phba, vpi, rpi, pmb);
de96e9c5 2467 pmb->vport = vport;
92d7f7b0 2468 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS
2469 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2470 if (rc != MBX_NOT_FINISHED)
2471 return;
2472 }
2473
695a814e
JS
2474 if ((pmb->u.mb.mbxCommand == MBX_REG_VPI) &&
2475 !(phba->pport->load_flag & FC_UNLOADING) &&
2476 !pmb->u.mb.mbxStatus) {
5af5eee7
JS
2477 shost = lpfc_shost_from_vport(vport);
2478 spin_lock_irq(shost->host_lock);
2479 vport->vpi_state |= LPFC_VPI_REGISTERED;
2480 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI;
2481 spin_unlock_irq(shost->host_lock);
695a814e
JS
2482 }
2483
d439d286 2484 if (pmb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 2485 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
d439d286 2486 lpfc_nlp_put(ndlp);
dea16bda
JS
2487 pmb->ctx_buf = NULL;
2488 pmb->ctx_ndlp = NULL;
2489 }
2490
2491 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2492 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
2493
2494 /* Check to see if there are any deferred events to process */
2495 if (ndlp) {
2496 lpfc_printf_vlog(
2497 vport,
2498 KERN_INFO, LOG_MBOX | LOG_DISCOVERY,
2499 "1438 UNREG cmpl deferred mbox x%x "
2500 "on NPort x%x Data: x%x x%x %p\n",
2501 ndlp->nlp_rpi, ndlp->nlp_DID,
2502 ndlp->nlp_flag, ndlp->nlp_defer_did, ndlp);
2503
2504 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2505 (ndlp->nlp_defer_did != NLP_EVT_NOTHING_PENDING)) {
00292e03 2506 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2507 ndlp->nlp_defer_did = NLP_EVT_NOTHING_PENDING;
2508 lpfc_issue_els_plogi(vport, ndlp->nlp_DID, 0);
00292e03 2509 } else {
4f1a2fef
JS
2510 if (ndlp->nlp_flag & NLP_RELEASE_RPI) {
2511 lpfc_sli4_free_rpi(vport->phba,
2512 ndlp->nlp_rpi);
2513 ndlp->nlp_flag &= ~NLP_RELEASE_RPI;
2514 }
00292e03 2515 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda 2516 }
9b164068 2517 pmb->ctx_ndlp = NULL;
dea16bda 2518 }
d439d286
JS
2519 }
2520
dcf2a4e0
JS
2521 /* Check security permission status on INIT_LINK mailbox command */
2522 if ((pmb->u.mb.mbxCommand == MBX_INIT_LINK) &&
2523 (pmb->u.mb.mbxStatus == MBXERR_SEC_NO_PERMISSION))
2524 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
2525 "2860 SLI authentication is required "
2526 "for INIT_LINK but has not done yet\n");
2527
04c68496
JS
2528 if (bf_get(lpfc_mqe_command, &pmb->u.mqe) == MBX_SLI4_CONFIG)
2529 lpfc_sli4_mbox_cmd_free(phba, pmb);
2530 else
2531 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2532}
be6bb941
JS
2533 /**
2534 * lpfc_sli4_unreg_rpi_cmpl_clr - mailbox completion handler
2535 * @phba: Pointer to HBA context object.
2536 * @pmb: Pointer to mailbox object.
2537 *
2538 * This function is the unreg rpi mailbox completion handler. It
2539 * frees the memory resources associated with the completed mailbox
2540 * command. An additional refrenece is put on the ndlp to prevent
2541 * lpfc_nlp_release from freeing the rpi bit in the bitmask before
2542 * the unreg mailbox command completes, this routine puts the
2543 * reference back.
2544 *
2545 **/
2546void
2547lpfc_sli4_unreg_rpi_cmpl_clr(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2548{
2549 struct lpfc_vport *vport = pmb->vport;
2550 struct lpfc_nodelist *ndlp;
2551
3e1f0718 2552 ndlp = pmb->ctx_ndlp;
be6bb941
JS
2553 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2554 if (phba->sli_rev == LPFC_SLI_REV4 &&
2555 (bf_get(lpfc_sli_intf_if_type,
27d6ac0a 2556 &phba->sli4_hba.sli_intf) >=
be6bb941
JS
2557 LPFC_SLI_INTF_IF_TYPE_2)) {
2558 if (ndlp) {
dea16bda
JS
2559 lpfc_printf_vlog(
2560 vport, KERN_INFO, LOG_MBOX | LOG_SLI,
2561 "0010 UNREG_LOGIN vpi:%x "
2562 "rpi:%x DID:%x defer x%x flg x%x "
2563 "map:%x %p\n",
2564 vport->vpi, ndlp->nlp_rpi,
2565 ndlp->nlp_DID, ndlp->nlp_defer_did,
2566 ndlp->nlp_flag,
2567 ndlp->nlp_usg_map, ndlp);
7c5e518c 2568 ndlp->nlp_flag &= ~NLP_LOGO_ACC;
be6bb941 2569 lpfc_nlp_put(ndlp);
dea16bda
JS
2570
2571 /* Check to see if there are any deferred
2572 * events to process
2573 */
2574 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2575 (ndlp->nlp_defer_did !=
2576 NLP_EVT_NOTHING_PENDING)) {
2577 lpfc_printf_vlog(
2578 vport, KERN_INFO, LOG_DISCOVERY,
2579 "4111 UNREG cmpl deferred "
2580 "clr x%x on "
2581 "NPort x%x Data: x%x %p\n",
2582 ndlp->nlp_rpi, ndlp->nlp_DID,
2583 ndlp->nlp_defer_did, ndlp);
00292e03 2584 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2585 ndlp->nlp_defer_did =
2586 NLP_EVT_NOTHING_PENDING;
2587 lpfc_issue_els_plogi(
2588 vport, ndlp->nlp_DID, 0);
00292e03 2589 } else {
4f1a2fef
JS
2590 if (ndlp->nlp_flag & NLP_RELEASE_RPI) {
2591 lpfc_sli4_free_rpi(
2592 vport->phba,
2593 ndlp->nlp_rpi);
2594 ndlp->nlp_flag &=
2595 ~NLP_RELEASE_RPI;
2596 }
00292e03 2597 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda 2598 }
be6bb941
JS
2599 }
2600 }
2601 }
2602
2603 mempool_free(pmb, phba->mbox_mem_pool);
2604}
dea3101e 2605
e59058c4 2606/**
3621a710 2607 * lpfc_sli_handle_mb_event - Handle mailbox completions from firmware
e59058c4
JS
2608 * @phba: Pointer to HBA context object.
2609 *
2610 * This function is called with no lock held. This function processes all
2611 * the completed mailbox commands and gives it to upper layers. The interrupt
2612 * service routine processes mailbox completion interrupt and adds completed
2613 * mailbox commands to the mboxq_cmpl queue and signals the worker thread.
2614 * Worker thread call lpfc_sli_handle_mb_event, which will return the
2615 * completed mailbox commands in mboxq_cmpl queue to the upper layers. This
2616 * function returns the mailbox commands to the upper layer by calling the
2617 * completion handler function of each mailbox.
2618 **/
dea3101e 2619int
2e0fef85 2620lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 2621{
92d7f7b0 2622 MAILBOX_t *pmbox;
dea3101e 2623 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS
2624 int rc;
2625 LIST_HEAD(cmplq);
dea3101e
JB
2626
2627 phba->sli.slistat.mbox_event++;
2628
92d7f7b0
JS
2629 /* Get all completed mailboxe buffers into the cmplq */
2630 spin_lock_irq(&phba->hbalock);
2631 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
2632 spin_unlock_irq(&phba->hbalock);
dea3101e 2633
92d7f7b0
JS
2634 /* Get a Mailbox buffer to setup mailbox commands for callback */
2635 do {
2636 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
2637 if (pmb == NULL)
2638 break;
2e0fef85 2639
04c68496 2640 pmbox = &pmb->u.mb;
dea3101e 2641
858c9f6c
JS
2642 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
2643 if (pmb->vport) {
2644 lpfc_debugfs_disc_trc(pmb->vport,
2645 LPFC_DISC_TRC_MBOX_VPORT,
2646 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
2647 (uint32_t)pmbox->mbxCommand,
2648 pmbox->un.varWords[0],
2649 pmbox->un.varWords[1]);
2650 }
2651 else {
2652 lpfc_debugfs_disc_trc(phba->pport,
2653 LPFC_DISC_TRC_MBOX,
2654 "MBOX cmpl: cmd:x%x mb:x%x x%x",
2655 (uint32_t)pmbox->mbxCommand,
2656 pmbox->un.varWords[0],
2657 pmbox->un.varWords[1]);
2658 }
2659 }
2660
dea3101e
JB
2661 /*
2662 * It is a fatal error if unknown mbox command completion.
2663 */
2664 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
2665 MBX_SHUTDOWN) {
af901ca1 2666 /* Unknown mailbox command compl */
92d7f7b0 2667 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2668 "(%d):0323 Unknown Mailbox command "
a183a15f 2669 "x%x (x%x/x%x) Cmpl\n",
92d7f7b0 2670 pmb->vport ? pmb->vport->vpi : 0,
04c68496 2671 pmbox->mbxCommand,
a183a15f
JS
2672 lpfc_sli_config_mbox_subsys_get(phba,
2673 pmb),
2674 lpfc_sli_config_mbox_opcode_get(phba,
2675 pmb));
2e0fef85 2676 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
2677 phba->work_hs = HS_FFER3;
2678 lpfc_handle_eratt(phba);
92d7f7b0 2679 continue;
dea3101e
JB
2680 }
2681
dea3101e
JB
2682 if (pmbox->mbxStatus) {
2683 phba->sli.slistat.mbox_stat_err++;
2684 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
2685 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0 2686 lpfc_printf_log(phba, KERN_INFO,
a183a15f
JS
2687 LOG_MBOX | LOG_SLI,
2688 "(%d):0305 Mbox cmd cmpl "
2689 "error - RETRYing Data: x%x "
2690 "(x%x/x%x) x%x x%x x%x\n",
2691 pmb->vport ? pmb->vport->vpi : 0,
2692 pmbox->mbxCommand,
2693 lpfc_sli_config_mbox_subsys_get(phba,
2694 pmb),
2695 lpfc_sli_config_mbox_opcode_get(phba,
2696 pmb),
2697 pmbox->mbxStatus,
2698 pmbox->un.varWords[0],
2699 pmb->vport->port_state);
dea3101e
JB
2700 pmbox->mbxStatus = 0;
2701 pmbox->mbxOwner = OWN_HOST;
dea3101e 2702 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
04c68496 2703 if (rc != MBX_NOT_FINISHED)
92d7f7b0 2704 continue;
dea3101e
JB
2705 }
2706 }
2707
2708 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 2709 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 2710 "(%d):0307 Mailbox cmd x%x (x%x/x%x) Cmpl x%p "
e74c03c8
JS
2711 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
2712 "x%x x%x x%x\n",
92d7f7b0 2713 pmb->vport ? pmb->vport->vpi : 0,
dea3101e 2714 pmbox->mbxCommand,
a183a15f
JS
2715 lpfc_sli_config_mbox_subsys_get(phba, pmb),
2716 lpfc_sli_config_mbox_opcode_get(phba, pmb),
dea3101e
JB
2717 pmb->mbox_cmpl,
2718 *((uint32_t *) pmbox),
2719 pmbox->un.varWords[0],
2720 pmbox->un.varWords[1],
2721 pmbox->un.varWords[2],
2722 pmbox->un.varWords[3],
2723 pmbox->un.varWords[4],
2724 pmbox->un.varWords[5],
2725 pmbox->un.varWords[6],
e74c03c8
JS
2726 pmbox->un.varWords[7],
2727 pmbox->un.varWords[8],
2728 pmbox->un.varWords[9],
2729 pmbox->un.varWords[10]);
dea3101e 2730
92d7f7b0 2731 if (pmb->mbox_cmpl)
dea3101e 2732 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS
2733 } while (1);
2734 return 0;
2735}
dea3101e 2736
e59058c4 2737/**
3621a710 2738 * lpfc_sli_get_buff - Get the buffer associated with the buffer tag
e59058c4
JS
2739 * @phba: Pointer to HBA context object.
2740 * @pring: Pointer to driver SLI ring object.
2741 * @tag: buffer tag.
2742 *
2743 * This function is called with no lock held. When QUE_BUFTAG_BIT bit
2744 * is set in the tag the buffer is posted for a particular exchange,
2745 * the function will return the buffer without replacing the buffer.
2746 * If the buffer is for unsolicited ELS or CT traffic, this function
2747 * returns the buffer and also posts another buffer to the firmware.
2748 **/
76bb24ef
JS
2749static struct lpfc_dmabuf *
2750lpfc_sli_get_buff(struct lpfc_hba *phba,
9f1e1b50
JS
2751 struct lpfc_sli_ring *pring,
2752 uint32_t tag)
76bb24ef 2753{
9f1e1b50
JS
2754 struct hbq_dmabuf *hbq_entry;
2755
76bb24ef
JS
2756 if (tag & QUE_BUFTAG_BIT)
2757 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
9f1e1b50
JS
2758 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
2759 if (!hbq_entry)
2760 return NULL;
2761 return &hbq_entry->dbuf;
76bb24ef 2762}
57127f15 2763
3772a991
JS
2764/**
2765 * lpfc_complete_unsol_iocb - Complete an unsolicited sequence
2766 * @phba: Pointer to HBA context object.
2767 * @pring: Pointer to driver SLI ring object.
2768 * @saveq: Pointer to the iocbq struct representing the sequence starting frame.
2769 * @fch_r_ctl: the r_ctl for the first frame of the sequence.
2770 * @fch_type: the type for the first frame of the sequence.
2771 *
2772 * This function is called with no lock held. This function uses the r_ctl and
2773 * type of the received sequence to find the correct callback function to call
2774 * to process the sequence.
2775 **/
2776static int
2777lpfc_complete_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2778 struct lpfc_iocbq *saveq, uint32_t fch_r_ctl,
2779 uint32_t fch_type)
2780{
2781 int i;
2782
f358dd0c
JS
2783 switch (fch_type) {
2784 case FC_TYPE_NVME:
d613b6a7 2785 lpfc_nvmet_unsol_ls_event(phba, pring, saveq);
f358dd0c
JS
2786 return 1;
2787 default:
2788 break;
2789 }
2790
3772a991
JS
2791 /* unSolicited Responses */
2792 if (pring->prt[0].profile) {
2793 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
2794 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
2795 saveq);
2796 return 1;
2797 }
2798 /* We must search, based on rctl / type
2799 for the right routine */
2800 for (i = 0; i < pring->num_mask; i++) {
2801 if ((pring->prt[i].rctl == fch_r_ctl) &&
2802 (pring->prt[i].type == fch_type)) {
2803 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
2804 (pring->prt[i].lpfc_sli_rcv_unsol_event)
2805 (phba, pring, saveq);
2806 return 1;
2807 }
2808 }
2809 return 0;
2810}
e59058c4
JS
2811
2812/**
3621a710 2813 * lpfc_sli_process_unsol_iocb - Unsolicited iocb handler
e59058c4
JS
2814 * @phba: Pointer to HBA context object.
2815 * @pring: Pointer to driver SLI ring object.
2816 * @saveq: Pointer to the unsolicited iocb.
2817 *
2818 * This function is called with no lock held by the ring event handler
2819 * when there is an unsolicited iocb posted to the response ring by the
2820 * firmware. This function gets the buffer associated with the iocbs
2821 * and calls the event handler for the ring. This function handles both
2822 * qring buffers and hbq buffers.
2823 * When the function returns 1 the caller can free the iocb object otherwise
2824 * upper layer functions will free the iocb objects.
2825 **/
dea3101e
JB
2826static int
2827lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2828 struct lpfc_iocbq *saveq)
2829{
2830 IOCB_t * irsp;
2831 WORD5 * w5p;
2832 uint32_t Rctl, Type;
76bb24ef 2833 struct lpfc_iocbq *iocbq;
3163f725 2834 struct lpfc_dmabuf *dmzbuf;
dea3101e 2835
dea3101e 2836 irsp = &(saveq->iocb);
57127f15
JS
2837
2838 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
2839 if (pring->lpfc_sli_rcv_async_status)
2840 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
2841 else
2842 lpfc_printf_log(phba,
2843 KERN_WARNING,
2844 LOG_SLI,
2845 "0316 Ring %d handler: unexpected "
2846 "ASYNC_STATUS iocb received evt_code "
2847 "0x%x\n",
2848 pring->ringno,
2849 irsp->un.asyncstat.evt_code);
2850 return 1;
2851 }
2852
3163f725
JS
2853 if ((irsp->ulpCommand == CMD_IOCB_RET_XRI64_CX) &&
2854 (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)) {
2855 if (irsp->ulpBdeCount > 0) {
2856 dmzbuf = lpfc_sli_get_buff(phba, pring,
2857 irsp->un.ulpWord[3]);
2858 lpfc_in_buf_free(phba, dmzbuf);
2859 }
2860
2861 if (irsp->ulpBdeCount > 1) {
2862 dmzbuf = lpfc_sli_get_buff(phba, pring,
2863 irsp->unsli3.sli3Words[3]);
2864 lpfc_in_buf_free(phba, dmzbuf);
2865 }
2866
2867 if (irsp->ulpBdeCount > 2) {
2868 dmzbuf = lpfc_sli_get_buff(phba, pring,
2869 irsp->unsli3.sli3Words[7]);
2870 lpfc_in_buf_free(phba, dmzbuf);
2871 }
2872
2873 return 1;
2874 }
2875
92d7f7b0 2876 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS
2877 if (irsp->ulpBdeCount != 0) {
2878 saveq->context2 = lpfc_sli_get_buff(phba, pring,
2879 irsp->un.ulpWord[3]);
2880 if (!saveq->context2)
2881 lpfc_printf_log(phba,
2882 KERN_ERR,
2883 LOG_SLI,
2884 "0341 Ring %d Cannot find buffer for "
2885 "an unsolicited iocb. tag 0x%x\n",
2886 pring->ringno,
2887 irsp->un.ulpWord[3]);
76bb24ef
JS
2888 }
2889 if (irsp->ulpBdeCount == 2) {
2890 saveq->context3 = lpfc_sli_get_buff(phba, pring,
2891 irsp->unsli3.sli3Words[7]);
2892 if (!saveq->context3)
2893 lpfc_printf_log(phba,
2894 KERN_ERR,
2895 LOG_SLI,
2896 "0342 Ring %d Cannot find buffer for an"
2897 " unsolicited iocb. tag 0x%x\n",
2898 pring->ringno,
2899 irsp->unsli3.sli3Words[7]);
2900 }
2901 list_for_each_entry(iocbq, &saveq->list, list) {
76bb24ef 2902 irsp = &(iocbq->iocb);
76bb24ef
JS
2903 if (irsp->ulpBdeCount != 0) {
2904 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
2905 irsp->un.ulpWord[3]);
9c2face6 2906 if (!iocbq->context2)
76bb24ef
JS
2907 lpfc_printf_log(phba,
2908 KERN_ERR,
2909 LOG_SLI,
2910 "0343 Ring %d Cannot find "
2911 "buffer for an unsolicited iocb"
2912 ". tag 0x%x\n", pring->ringno,
92d7f7b0 2913 irsp->un.ulpWord[3]);
76bb24ef
JS
2914 }
2915 if (irsp->ulpBdeCount == 2) {
2916 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 2917 irsp->unsli3.sli3Words[7]);
9c2face6 2918 if (!iocbq->context3)
76bb24ef
JS
2919 lpfc_printf_log(phba,
2920 KERN_ERR,
2921 LOG_SLI,
2922 "0344 Ring %d Cannot find "
2923 "buffer for an unsolicited "
2924 "iocb. tag 0x%x\n",
2925 pring->ringno,
2926 irsp->unsli3.sli3Words[7]);
2927 }
2928 }
92d7f7b0 2929 }
9c2face6
JS
2930 if (irsp->ulpBdeCount != 0 &&
2931 (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
2932 irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
2933 int found = 0;
2934
2935 /* search continue save q for same XRI */
2936 list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
7851fe2c
JS
2937 if (iocbq->iocb.unsli3.rcvsli3.ox_id ==
2938 saveq->iocb.unsli3.rcvsli3.ox_id) {
9c2face6
JS
2939 list_add_tail(&saveq->list, &iocbq->list);
2940 found = 1;
2941 break;
2942 }
2943 }
2944 if (!found)
2945 list_add_tail(&saveq->clist,
2946 &pring->iocb_continue_saveq);
2947 if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
2948 list_del_init(&iocbq->clist);
2949 saveq = iocbq;
2950 irsp = &(saveq->iocb);
2951 } else
2952 return 0;
2953 }
2954 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
2955 (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
2956 (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
6a9c52cf
JS
2957 Rctl = FC_RCTL_ELS_REQ;
2958 Type = FC_TYPE_ELS;
9c2face6
JS
2959 } else {
2960 w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
2961 Rctl = w5p->hcsw.Rctl;
2962 Type = w5p->hcsw.Type;
2963
2964 /* Firmware Workaround */
2965 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
2966 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
2967 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
6a9c52cf
JS
2968 Rctl = FC_RCTL_ELS_REQ;
2969 Type = FC_TYPE_ELS;
9c2face6
JS
2970 w5p->hcsw.Rctl = Rctl;
2971 w5p->hcsw.Type = Type;
2972 }
2973 }
92d7f7b0 2974
3772a991 2975 if (!lpfc_complete_unsol_iocb(phba, pring, saveq, Rctl, Type))
92d7f7b0 2976 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 2977 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 2978 "Type x%x received\n",
e8b62011 2979 pring->ringno, Rctl, Type);
3772a991 2980
92d7f7b0 2981 return 1;
dea3101e
JB
2982}
2983
e59058c4 2984/**
3621a710 2985 * lpfc_sli_iocbq_lookup - Find command iocb for the given response iocb
e59058c4
JS
2986 * @phba: Pointer to HBA context object.
2987 * @pring: Pointer to driver SLI ring object.
2988 * @prspiocb: Pointer to response iocb object.
2989 *
2990 * This function looks up the iocb_lookup table to get the command iocb
2991 * corresponding to the given response iocb using the iotag of the
e2a8be56
JS
2992 * response iocb. The driver calls this function with the hbalock held
2993 * for SLI3 ports or the ring lock held for SLI4 ports.
e59058c4
JS
2994 * This function returns the command iocb object if it finds the command
2995 * iocb else returns NULL.
2996 **/
dea3101e 2997static struct lpfc_iocbq *
2e0fef85
JS
2998lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
2999 struct lpfc_sli_ring *pring,
3000 struct lpfc_iocbq *prspiocb)
dea3101e 3001{
dea3101e
JB
3002 struct lpfc_iocbq *cmd_iocb = NULL;
3003 uint16_t iotag;
e2a8be56
JS
3004 spinlock_t *temp_lock = NULL;
3005 unsigned long iflag = 0;
3006
3007 if (phba->sli_rev == LPFC_SLI_REV4)
3008 temp_lock = &pring->ring_lock;
3009 else
3010 temp_lock = &phba->hbalock;
dea3101e 3011
e2a8be56 3012 spin_lock_irqsave(temp_lock, iflag);
604a3e30
JB
3013 iotag = prspiocb->iocb.ulpIoTag;
3014
3015 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3016 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6 3017 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
89533e9b
JS
3018 /* remove from txcmpl queue list */
3019 list_del_init(&cmd_iocb->list);
4f2e66c6 3020 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
c490850a 3021 pring->txcmplq_cnt--;
e2a8be56 3022 spin_unlock_irqrestore(temp_lock, iflag);
89533e9b 3023 return cmd_iocb;
2a9bf3d0 3024 }
dea3101e
JB
3025 }
3026
e2a8be56 3027 spin_unlock_irqrestore(temp_lock, iflag);
dea3101e 3028 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
89533e9b 3029 "0317 iotag x%x is out of "
604a3e30 3030 "range: max iotag x%x wd0 x%x\n",
e8b62011 3031 iotag, phba->sli.last_iotag,
604a3e30 3032 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB
3033 return NULL;
3034}
3035
3772a991
JS
3036/**
3037 * lpfc_sli_iocbq_lookup_by_tag - Find command iocb for the iotag
3038 * @phba: Pointer to HBA context object.
3039 * @pring: Pointer to driver SLI ring object.
3040 * @iotag: IOCB tag.
3041 *
3042 * This function looks up the iocb_lookup table to get the command iocb
e2a8be56
JS
3043 * corresponding to the given iotag. The driver calls this function with
3044 * the ring lock held because this function is an SLI4 port only helper.
3772a991
JS
3045 * This function returns the command iocb object if it finds the command
3046 * iocb else returns NULL.
3047 **/
3048static struct lpfc_iocbq *
3049lpfc_sli_iocbq_lookup_by_tag(struct lpfc_hba *phba,
3050 struct lpfc_sli_ring *pring, uint16_t iotag)
3051{
895427bd 3052 struct lpfc_iocbq *cmd_iocb = NULL;
e2a8be56
JS
3053 spinlock_t *temp_lock = NULL;
3054 unsigned long iflag = 0;
3772a991 3055
e2a8be56
JS
3056 if (phba->sli_rev == LPFC_SLI_REV4)
3057 temp_lock = &pring->ring_lock;
3058 else
3059 temp_lock = &phba->hbalock;
3060
3061 spin_lock_irqsave(temp_lock, iflag);
3772a991
JS
3062 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3063 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6
JS
3064 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
3065 /* remove from txcmpl queue list */
3066 list_del_init(&cmd_iocb->list);
3067 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
c490850a 3068 pring->txcmplq_cnt--;
e2a8be56 3069 spin_unlock_irqrestore(temp_lock, iflag);
4f2e66c6 3070 return cmd_iocb;
2a9bf3d0 3071 }
3772a991 3072 }
89533e9b 3073
e2a8be56 3074 spin_unlock_irqrestore(temp_lock, iflag);
3772a991 3075 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd
JS
3076 "0372 iotag x%x lookup error: max iotag (x%x) "
3077 "iocb_flag x%x\n",
3078 iotag, phba->sli.last_iotag,
3079 cmd_iocb ? cmd_iocb->iocb_flag : 0xffff);
3772a991
JS
3080 return NULL;
3081}
3082
e59058c4 3083/**
3621a710 3084 * lpfc_sli_process_sol_iocb - process solicited iocb completion
e59058c4
JS
3085 * @phba: Pointer to HBA context object.
3086 * @pring: Pointer to driver SLI ring object.
3087 * @saveq: Pointer to the response iocb to be processed.
3088 *
3089 * This function is called by the ring event handler for non-fcp
3090 * rings when there is a new response iocb in the response ring.
3091 * The caller is not required to hold any locks. This function
3092 * gets the command iocb associated with the response iocb and
3093 * calls the completion handler for the command iocb. If there
3094 * is no completion handler, the function will free the resources
3095 * associated with command iocb. If the response iocb is for
3096 * an already aborted command iocb, the status of the completion
3097 * is changed to IOSTAT_LOCAL_REJECT/IOERR_SLI_ABORTED.
3098 * This function always returns 1.
3099 **/
dea3101e 3100static int
2e0fef85 3101lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB
3102 struct lpfc_iocbq *saveq)
3103{
2e0fef85 3104 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB
3105 int rc = 1;
3106 unsigned long iflag;
3107
604a3e30 3108 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
dea3101e
JB
3109 if (cmdiocbp) {
3110 if (cmdiocbp->iocb_cmpl) {
ea2151b4
JS
3111 /*
3112 * If an ELS command failed send an event to mgmt
3113 * application.
3114 */
3115 if (saveq->iocb.ulpStatus &&
3116 (pring->ringno == LPFC_ELS_RING) &&
3117 (cmdiocbp->iocb.ulpCommand ==
3118 CMD_ELS_REQUEST64_CR))
3119 lpfc_send_els_failure_event(phba,
3120 cmdiocbp, saveq);
3121
dea3101e
JB
3122 /*
3123 * Post all ELS completions to the worker thread.
3124 * All other are passed to the completion callback.
3125 */
3126 if (pring->ringno == LPFC_ELS_RING) {
341af102
JS
3127 if ((phba->sli_rev < LPFC_SLI_REV4) &&
3128 (cmdiocbp->iocb_flag &
3129 LPFC_DRIVER_ABORTED)) {
3130 spin_lock_irqsave(&phba->hbalock,
3131 iflag);
07951076
JS
3132 cmdiocbp->iocb_flag &=
3133 ~LPFC_DRIVER_ABORTED;
341af102
JS
3134 spin_unlock_irqrestore(&phba->hbalock,
3135 iflag);
07951076
JS
3136 saveq->iocb.ulpStatus =
3137 IOSTAT_LOCAL_REJECT;
3138 saveq->iocb.un.ulpWord[4] =
3139 IOERR_SLI_ABORTED;
0ff10d46
JS
3140
3141 /* Firmware could still be in progress
3142 * of DMAing payload, so don't free data
3143 * buffer till after a hbeat.
3144 */
341af102
JS
3145 spin_lock_irqsave(&phba->hbalock,
3146 iflag);
0ff10d46 3147 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
341af102
JS
3148 spin_unlock_irqrestore(&phba->hbalock,
3149 iflag);
3150 }
0f65ff68
JS
3151 if (phba->sli_rev == LPFC_SLI_REV4) {
3152 if (saveq->iocb_flag &
3153 LPFC_EXCHANGE_BUSY) {
3154 /* Set cmdiocb flag for the
3155 * exchange busy so sgl (xri)
3156 * will not be released until
3157 * the abort xri is received
3158 * from hba.
3159 */
3160 spin_lock_irqsave(
3161 &phba->hbalock, iflag);
3162 cmdiocbp->iocb_flag |=
3163 LPFC_EXCHANGE_BUSY;
3164 spin_unlock_irqrestore(
3165 &phba->hbalock, iflag);
3166 }
3167 if (cmdiocbp->iocb_flag &
3168 LPFC_DRIVER_ABORTED) {
3169 /*
3170 * Clear LPFC_DRIVER_ABORTED
3171 * bit in case it was driver
3172 * initiated abort.
3173 */
3174 spin_lock_irqsave(
3175 &phba->hbalock, iflag);
3176 cmdiocbp->iocb_flag &=
3177 ~LPFC_DRIVER_ABORTED;
3178 spin_unlock_irqrestore(
3179 &phba->hbalock, iflag);
3180 cmdiocbp->iocb.ulpStatus =
3181 IOSTAT_LOCAL_REJECT;
3182 cmdiocbp->iocb.un.ulpWord[4] =
3183 IOERR_ABORT_REQUESTED;
3184 /*
3185 * For SLI4, irsiocb contains
3186 * NO_XRI in sli_xritag, it
3187 * shall not affect releasing
3188 * sgl (xri) process.
3189 */
3190 saveq->iocb.ulpStatus =
3191 IOSTAT_LOCAL_REJECT;
3192 saveq->iocb.un.ulpWord[4] =
3193 IOERR_SLI_ABORTED;
3194 spin_lock_irqsave(
3195 &phba->hbalock, iflag);
3196 saveq->iocb_flag |=
3197 LPFC_DELAY_MEM_FREE;
3198 spin_unlock_irqrestore(
3199 &phba->hbalock, iflag);
3200 }
07951076 3201 }
dea3101e 3202 }
2e0fef85 3203 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB
3204 } else
3205 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB
3206 } else {
3207 /*
3208 * Unknown initiating command based on the response iotag.
3209 * This could be the case on the ELS ring because of
3210 * lpfc_els_abort().
3211 */
3212 if (pring->ringno != LPFC_ELS_RING) {
3213 /*
3214 * Ring <ringno> handler: unexpected completion IoTag
3215 * <IoTag>
3216 */
a257bf90 3217 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
3218 "0322 Ring %d handler: "
3219 "unexpected completion IoTag x%x "
3220 "Data: x%x x%x x%x x%x\n",
3221 pring->ringno,
3222 saveq->iocb.ulpIoTag,
3223 saveq->iocb.ulpStatus,
3224 saveq->iocb.un.ulpWord[4],
3225 saveq->iocb.ulpCommand,
3226 saveq->iocb.ulpContext);
dea3101e
JB
3227 }
3228 }
68876920 3229
dea3101e
JB
3230 return rc;
3231}
3232
e59058c4 3233/**
3621a710 3234 * lpfc_sli_rsp_pointers_error - Response ring pointer error handler
e59058c4
JS
3235 * @phba: Pointer to HBA context object.
3236 * @pring: Pointer to driver SLI ring object.
3237 *
3238 * This function is called from the iocb ring event handlers when
3239 * put pointer is ahead of the get pointer for a ring. This function signal
3240 * an error attention condition to the worker thread and the worker
3241 * thread will transition the HBA to offline state.
3242 **/
2e0fef85
JS
3243static void
3244lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 3245{
34b02dcd 3246 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
875fbdfe 3247 /*
025dfdaf 3248 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
875fbdfe
JSEC
3249 * rsp ring <portRspMax>
3250 */
3251 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3252 "0312 Ring %d handler: portRspPut %d "
025dfdaf 3253 "is bigger than rsp ring %d\n",
e8b62011 3254 pring->ringno, le32_to_cpu(pgp->rspPutInx),
7e56aa25 3255 pring->sli.sli3.numRiocb);
875fbdfe 3256
2e0fef85 3257 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC
3258
3259 /*
3260 * All error attention handlers are posted to
3261 * worker thread
3262 */
3263 phba->work_ha |= HA_ERATT;
3264 phba->work_hs = HS_FFER3;
92d7f7b0 3265
5e9d9b82 3266 lpfc_worker_wake_up(phba);
875fbdfe
JSEC
3267
3268 return;
3269}
3270
9399627f 3271/**
3621a710 3272 * lpfc_poll_eratt - Error attention polling timer timeout handler
9399627f
JS
3273 * @ptr: Pointer to address of HBA context object.
3274 *
3275 * This function is invoked by the Error Attention polling timer when the
3276 * timer times out. It will check the SLI Error Attention register for
3277 * possible attention events. If so, it will post an Error Attention event
3278 * and wake up worker thread to process it. Otherwise, it will set up the
3279 * Error Attention polling timer for the next poll.
3280 **/
f22eb4d3 3281void lpfc_poll_eratt(struct timer_list *t)
9399627f
JS
3282{
3283 struct lpfc_hba *phba;
eb016566 3284 uint32_t eratt = 0;
aa6fbb75 3285 uint64_t sli_intr, cnt;
9399627f 3286
f22eb4d3 3287 phba = from_timer(phba, t, eratt_poll);
9399627f 3288
aa6fbb75
JS
3289 /* Here we will also keep track of interrupts per sec of the hba */
3290 sli_intr = phba->sli.slistat.sli_intr;
3291
3292 if (phba->sli.slistat.sli_prev_intr > sli_intr)
3293 cnt = (((uint64_t)(-1) - phba->sli.slistat.sli_prev_intr) +
3294 sli_intr);
3295 else
3296 cnt = (sli_intr - phba->sli.slistat.sli_prev_intr);
3297
65791f1f
JS
3298 /* 64-bit integer division not supported on 32-bit x86 - use do_div */
3299 do_div(cnt, phba->eratt_poll_interval);
aa6fbb75
JS
3300 phba->sli.slistat.sli_ips = cnt;
3301
3302 phba->sli.slistat.sli_prev_intr = sli_intr;
3303
9399627f
JS
3304 /* Check chip HA register for error event */
3305 eratt = lpfc_sli_check_eratt(phba);
3306
3307 if (eratt)
3308 /* Tell the worker thread there is work to do */
3309 lpfc_worker_wake_up(phba);
3310 else
3311 /* Restart the timer for next eratt poll */
256ec0d0
JS
3312 mod_timer(&phba->eratt_poll,
3313 jiffies +
65791f1f 3314 msecs_to_jiffies(1000 * phba->eratt_poll_interval));
9399627f
JS
3315 return;
3316}
3317
875fbdfe 3318
e59058c4 3319/**
3621a710 3320 * lpfc_sli_handle_fast_ring_event - Handle ring events on FCP ring
e59058c4
JS
3321 * @phba: Pointer to HBA context object.
3322 * @pring: Pointer to driver SLI ring object.
3323 * @mask: Host attention register mask for this ring.
3324 *
3325 * This function is called from the interrupt context when there is a ring
3326 * event for the fcp ring. The caller does not hold any lock.
3327 * The function processes each response iocb in the response ring until it
25985edc 3328 * finds an iocb with LE bit set and chains all the iocbs up to the iocb with
e59058c4
JS
3329 * LE bit set. The function will call the completion handler of the command iocb
3330 * if the response iocb indicates a completion for a command iocb or it is
3331 * an abort completion. The function will call lpfc_sli_process_unsol_iocb
3332 * function if this is an unsolicited iocb.
dea3101e 3333 * This routine presumes LPFC_FCP_RING handling and doesn't bother
45ed1190
JS
3334 * to check it explicitly.
3335 */
3336int
2e0fef85
JS
3337lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
3338 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3339{
34b02dcd 3340 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
dea3101e 3341 IOCB_t *irsp = NULL;
87f6eaff 3342 IOCB_t *entry = NULL;
dea3101e
JB
3343 struct lpfc_iocbq *cmdiocbq = NULL;
3344 struct lpfc_iocbq rspiocbq;
dea3101e
JB
3345 uint32_t status;
3346 uint32_t portRspPut, portRspMax;
3347 int rc = 1;
3348 lpfc_iocb_type type;
3349 unsigned long iflag;
3350 uint32_t rsp_cmpl = 0;
dea3101e 3351
2e0fef85 3352 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3353 pring->stats.iocb_event++;
3354
dea3101e
JB
3355 /*
3356 * The next available response entry should never exceed the maximum
3357 * entries. If it does, treat it as an adapter hardware error.
3358 */
7e56aa25 3359 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3360 portRspPut = le32_to_cpu(pgp->rspPutInx);
3361 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 3362 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 3363 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3364 return 1;
3365 }
45ed1190
JS
3366 if (phba->fcp_ring_in_use) {
3367 spin_unlock_irqrestore(&phba->hbalock, iflag);
3368 return 1;
3369 } else
3370 phba->fcp_ring_in_use = 1;
dea3101e
JB
3371
3372 rmb();
7e56aa25 3373 while (pring->sli.sli3.rspidx != portRspPut) {
87f6eaff
JSEC
3374 /*
3375 * Fetch an entry off the ring and copy it into a local data
3376 * structure. The copy involves a byte-swap since the
3377 * network byte order and pci byte orders are different.
3378 */
ed957684 3379 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 3380 phba->last_completion_time = jiffies;
875fbdfe 3381
7e56aa25
JS
3382 if (++pring->sli.sli3.rspidx >= portRspMax)
3383 pring->sli.sli3.rspidx = 0;
875fbdfe 3384
87f6eaff
JSEC
3385 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
3386 (uint32_t *) &rspiocbq.iocb,
ed957684 3387 phba->iocb_rsp_size);
a4bc3379 3388 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC
3389 irsp = &rspiocbq.iocb;
3390
dea3101e
JB
3391 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
3392 pring->stats.iocb_rsp++;
3393 rsp_cmpl++;
3394
3395 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS
3396 /*
3397 * If resource errors reported from HBA, reduce
3398 * queuedepths of the SCSI device.
3399 */
3400 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3401 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3402 IOERR_NO_RESOURCES)) {
92d7f7b0 3403 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3404 phba->lpfc_rampdown_queue_depth(phba);
92d7f7b0
JS
3405 spin_lock_irqsave(&phba->hbalock, iflag);
3406 }
3407
dea3101e
JB
3408 /* Rsp ring <ringno> error: IOCB */
3409 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3410 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 3411 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 3412 pring->ringno,
92d7f7b0
JS
3413 irsp->un.ulpWord[0],
3414 irsp->un.ulpWord[1],
3415 irsp->un.ulpWord[2],
3416 irsp->un.ulpWord[3],
3417 irsp->un.ulpWord[4],
3418 irsp->un.ulpWord[5],
d7c255b2
JS
3419 *(uint32_t *)&irsp->un1,
3420 *((uint32_t *)&irsp->un1 + 1));
dea3101e
JB
3421 }
3422
3423 switch (type) {
3424 case LPFC_ABORT_IOCB:
3425 case LPFC_SOL_IOCB:
3426 /*
3427 * Idle exchange closed via ABTS from port. No iocb
3428 * resources need to be recovered.
3429 */
3430 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 3431 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3432 "0333 IOCB cmd 0x%x"
dca9479b 3433 " processed. Skipping"
92d7f7b0 3434 " completion\n",
dca9479b 3435 irsp->ulpCommand);
dea3101e
JB
3436 break;
3437 }
3438
e2a8be56 3439 spin_unlock_irqrestore(&phba->hbalock, iflag);
604a3e30
JB
3440 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
3441 &rspiocbq);
e2a8be56 3442 spin_lock_irqsave(&phba->hbalock, iflag);
0f65ff68
JS
3443 if (unlikely(!cmdiocbq))
3444 break;
3445 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED)
3446 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3447 if (cmdiocbq->iocb_cmpl) {
3448 spin_unlock_irqrestore(&phba->hbalock, iflag);
3449 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
3450 &rspiocbq);
3451 spin_lock_irqsave(&phba->hbalock, iflag);
3452 }
dea3101e 3453 break;
a4bc3379 3454 case LPFC_UNSOL_IOCB:
2e0fef85 3455 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 3456 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 3457 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 3458 break;
dea3101e
JB
3459 default:
3460 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3461 char adaptermsg[LPFC_MAX_ADPTMSG];
3462 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3463 memcpy(&adaptermsg[0], (uint8_t *) irsp,
3464 MAX_MSG_DATA);
898eb71c
JP
3465 dev_warn(&((phba->pcidev)->dev),
3466 "lpfc%d: %s\n",
dea3101e
JB
3467 phba->brd_no, adaptermsg);
3468 } else {
3469 /* Unknown IOCB command */
3470 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3471 "0334 Unknown IOCB command "
92d7f7b0 3472 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 3473 type, irsp->ulpCommand,
92d7f7b0
JS
3474 irsp->ulpStatus,
3475 irsp->ulpIoTag,
3476 irsp->ulpContext);
dea3101e
JB
3477 }
3478 break;
3479 }
3480
3481 /*
3482 * The response IOCB has been processed. Update the ring
3483 * pointer in SLIM. If the port response put pointer has not
3484 * been updated, sync the pgp->rspPutInx and fetch the new port
3485 * response put pointer.
3486 */
7e56aa25
JS
3487 writel(pring->sli.sli3.rspidx,
3488 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3489
7e56aa25 3490 if (pring->sli.sli3.rspidx == portRspPut)
dea3101e
JB
3491 portRspPut = le32_to_cpu(pgp->rspPutInx);
3492 }
3493
3494 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
3495 pring->stats.iocb_rsp_full++;
3496 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3497 writel(status, phba->CAregaddr);
3498 readl(phba->CAregaddr);
3499 }
3500 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3501 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3502 pring->stats.iocb_cmd_empty++;
3503
3504 /* Force update of the local copy of cmdGetInx */
7e56aa25 3505 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3506 lpfc_sli_resume_iocb(phba, pring);
3507
3508 if ((pring->lpfc_sli_cmd_available))
3509 (pring->lpfc_sli_cmd_available) (phba, pring);
3510
3511 }
3512
45ed1190 3513 phba->fcp_ring_in_use = 0;
2e0fef85 3514 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3515 return rc;
3516}
3517
e59058c4 3518/**
3772a991
JS
3519 * lpfc_sli_sp_handle_rspiocb - Handle slow-path response iocb
3520 * @phba: Pointer to HBA context object.
3521 * @pring: Pointer to driver SLI ring object.
3522 * @rspiocbp: Pointer to driver response IOCB object.
3523 *
3524 * This function is called from the worker thread when there is a slow-path
3525 * response IOCB to process. This function chains all the response iocbs until
3526 * seeing the iocb with the LE bit set. The function will call
3527 * lpfc_sli_process_sol_iocb function if the response iocb indicates a
3528 * completion of a command iocb. The function will call the
3529 * lpfc_sli_process_unsol_iocb function if this is an unsolicited iocb.
3530 * The function frees the resources or calls the completion handler if this
3531 * iocb is an abort completion. The function returns NULL when the response
3532 * iocb has the LE bit set and all the chained iocbs are processed, otherwise
3533 * this function shall chain the iocb on to the iocb_continueq and return the
3534 * response iocb passed in.
3535 **/
3536static struct lpfc_iocbq *
3537lpfc_sli_sp_handle_rspiocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3538 struct lpfc_iocbq *rspiocbp)
3539{
3540 struct lpfc_iocbq *saveq;
3541 struct lpfc_iocbq *cmdiocbp;
3542 struct lpfc_iocbq *next_iocb;
3543 IOCB_t *irsp = NULL;
3544 uint32_t free_saveq;
3545 uint8_t iocb_cmd_type;
3546 lpfc_iocb_type type;
3547 unsigned long iflag;
3548 int rc;
3549
3550 spin_lock_irqsave(&phba->hbalock, iflag);
3551 /* First add the response iocb to the countinueq list */
3552 list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
3553 pring->iocb_continueq_cnt++;
3554
70f23fd6 3555 /* Now, determine whether the list is completed for processing */
3772a991
JS
3556 irsp = &rspiocbp->iocb;
3557 if (irsp->ulpLe) {
3558 /*
3559 * By default, the driver expects to free all resources
3560 * associated with this iocb completion.
3561 */
3562 free_saveq = 1;
3563 saveq = list_get_first(&pring->iocb_continueq,
3564 struct lpfc_iocbq, list);
3565 irsp = &(saveq->iocb);
3566 list_del_init(&pring->iocb_continueq);
3567 pring->iocb_continueq_cnt = 0;
3568
3569 pring->stats.iocb_rsp++;
3570
3571 /*
3572 * If resource errors reported from HBA, reduce
3573 * queuedepths of the SCSI device.
3574 */
3575 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3576 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3577 IOERR_NO_RESOURCES)) {
3772a991
JS
3578 spin_unlock_irqrestore(&phba->hbalock, iflag);
3579 phba->lpfc_rampdown_queue_depth(phba);
3580 spin_lock_irqsave(&phba->hbalock, iflag);
3581 }
3582
3583 if (irsp->ulpStatus) {
3584 /* Rsp ring <ringno> error: IOCB */
3585 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
3586 "0328 Rsp Ring %d error: "
3587 "IOCB Data: "
3588 "x%x x%x x%x x%x "
3589 "x%x x%x x%x x%x "
3590 "x%x x%x x%x x%x "
3591 "x%x x%x x%x x%x\n",
3592 pring->ringno,
3593 irsp->un.ulpWord[0],
3594 irsp->un.ulpWord[1],
3595 irsp->un.ulpWord[2],
3596 irsp->un.ulpWord[3],
3597 irsp->un.ulpWord[4],
3598 irsp->un.ulpWord[5],
3599 *(((uint32_t *) irsp) + 6),
3600 *(((uint32_t *) irsp) + 7),
3601 *(((uint32_t *) irsp) + 8),
3602 *(((uint32_t *) irsp) + 9),
3603 *(((uint32_t *) irsp) + 10),
3604 *(((uint32_t *) irsp) + 11),
3605 *(((uint32_t *) irsp) + 12),
3606 *(((uint32_t *) irsp) + 13),
3607 *(((uint32_t *) irsp) + 14),
3608 *(((uint32_t *) irsp) + 15));
3609 }
3610
3611 /*
3612 * Fetch the IOCB command type and call the correct completion
3613 * routine. Solicited and Unsolicited IOCBs on the ELS ring
3614 * get freed back to the lpfc_iocb_list by the discovery
3615 * kernel thread.
3616 */
3617 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
3618 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
3619 switch (type) {
3620 case LPFC_SOL_IOCB:
3621 spin_unlock_irqrestore(&phba->hbalock, iflag);
3622 rc = lpfc_sli_process_sol_iocb(phba, pring, saveq);
3623 spin_lock_irqsave(&phba->hbalock, iflag);
3624 break;
3625
3626 case LPFC_UNSOL_IOCB:
3627 spin_unlock_irqrestore(&phba->hbalock, iflag);
3628 rc = lpfc_sli_process_unsol_iocb(phba, pring, saveq);
3629 spin_lock_irqsave(&phba->hbalock, iflag);
3630 if (!rc)
3631 free_saveq = 0;
3632 break;
3633
3634 case LPFC_ABORT_IOCB:
3635 cmdiocbp = NULL;
e2a8be56
JS
3636 if (irsp->ulpCommand != CMD_XRI_ABORTED_CX) {
3637 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991
JS
3638 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring,
3639 saveq);
e2a8be56
JS
3640 spin_lock_irqsave(&phba->hbalock, iflag);
3641 }
3772a991
JS
3642 if (cmdiocbp) {
3643 /* Call the specified completion routine */
3644 if (cmdiocbp->iocb_cmpl) {
3645 spin_unlock_irqrestore(&phba->hbalock,
3646 iflag);
3647 (cmdiocbp->iocb_cmpl)(phba, cmdiocbp,
3648 saveq);
3649 spin_lock_irqsave(&phba->hbalock,
3650 iflag);
3651 } else
3652 __lpfc_sli_release_iocbq(phba,
3653 cmdiocbp);
3654 }
3655 break;
3656
3657 case LPFC_UNKNOWN_IOCB:
3658 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3659 char adaptermsg[LPFC_MAX_ADPTMSG];
3660 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3661 memcpy(&adaptermsg[0], (uint8_t *)irsp,
3662 MAX_MSG_DATA);
3663 dev_warn(&((phba->pcidev)->dev),
3664 "lpfc%d: %s\n",
3665 phba->brd_no, adaptermsg);
3666 } else {
3667 /* Unknown IOCB command */
3668 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3669 "0335 Unknown IOCB "
3670 "command Data: x%x "
3671 "x%x x%x x%x\n",
3672 irsp->ulpCommand,
3673 irsp->ulpStatus,
3674 irsp->ulpIoTag,
3675 irsp->ulpContext);
3676 }
3677 break;
3678 }
3679
3680 if (free_saveq) {
3681 list_for_each_entry_safe(rspiocbp, next_iocb,
3682 &saveq->list, list) {
61f35bff 3683 list_del_init(&rspiocbp->list);
3772a991
JS
3684 __lpfc_sli_release_iocbq(phba, rspiocbp);
3685 }
3686 __lpfc_sli_release_iocbq(phba, saveq);
3687 }
3688 rspiocbp = NULL;
3689 }
3690 spin_unlock_irqrestore(&phba->hbalock, iflag);
3691 return rspiocbp;
3692}
3693
3694/**
3695 * lpfc_sli_handle_slow_ring_event - Wrapper func for handling slow-path iocbs
e59058c4
JS
3696 * @phba: Pointer to HBA context object.
3697 * @pring: Pointer to driver SLI ring object.
3698 * @mask: Host attention register mask for this ring.
3699 *
3772a991
JS
3700 * This routine wraps the actual slow_ring event process routine from the
3701 * API jump table function pointer from the lpfc_hba struct.
e59058c4 3702 **/
3772a991 3703void
2e0fef85
JS
3704lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
3705 struct lpfc_sli_ring *pring, uint32_t mask)
3772a991
JS
3706{
3707 phba->lpfc_sli_handle_slow_ring_event(phba, pring, mask);
3708}
3709
3710/**
3711 * lpfc_sli_handle_slow_ring_event_s3 - Handle SLI3 ring event for non-FCP rings
3712 * @phba: Pointer to HBA context object.
3713 * @pring: Pointer to driver SLI ring object.
3714 * @mask: Host attention register mask for this ring.
3715 *
3716 * This function is called from the worker thread when there is a ring event
3717 * for non-fcp rings. The caller does not hold any lock. The function will
3718 * remove each response iocb in the response ring and calls the handle
3719 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3720 **/
3721static void
3722lpfc_sli_handle_slow_ring_event_s3(struct lpfc_hba *phba,
3723 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3724{
34b02dcd 3725 struct lpfc_pgp *pgp;
dea3101e
JB
3726 IOCB_t *entry;
3727 IOCB_t *irsp = NULL;
3728 struct lpfc_iocbq *rspiocbp = NULL;
dea3101e 3729 uint32_t portRspPut, portRspMax;
dea3101e 3730 unsigned long iflag;
3772a991 3731 uint32_t status;
dea3101e 3732
34b02dcd 3733 pgp = &phba->port_gp[pring->ringno];
2e0fef85 3734 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3735 pring->stats.iocb_event++;
3736
dea3101e
JB
3737 /*
3738 * The next available response entry should never exceed the maximum
3739 * entries. If it does, treat it as an adapter hardware error.
3740 */
7e56aa25 3741 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3742 portRspPut = le32_to_cpu(pgp->rspPutInx);
3743 if (portRspPut >= portRspMax) {
3744 /*
025dfdaf 3745 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
dea3101e
JB
3746 * rsp ring <portRspMax>
3747 */
ed957684 3748 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3749 "0303 Ring %d handler: portRspPut %d "
025dfdaf 3750 "is bigger than rsp ring %d\n",
e8b62011 3751 pring->ringno, portRspPut, portRspMax);
dea3101e 3752
2e0fef85
JS
3753 phba->link_state = LPFC_HBA_ERROR;
3754 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3755
3756 phba->work_hs = HS_FFER3;
3757 lpfc_handle_eratt(phba);
3758
3772a991 3759 return;
dea3101e
JB
3760 }
3761
3762 rmb();
7e56aa25 3763 while (pring->sli.sli3.rspidx != portRspPut) {
dea3101e
JB
3764 /*
3765 * Build a completion list and call the appropriate handler.
3766 * The process is to get the next available response iocb, get
3767 * a free iocb from the list, copy the response data into the
3768 * free iocb, insert to the continuation list, and update the
3769 * next response index to slim. This process makes response
3770 * iocb's in the ring available to DMA as fast as possible but
3771 * pays a penalty for a copy operation. Since the iocb is
3772 * only 32 bytes, this penalty is considered small relative to
3773 * the PCI reads for register values and a slim write. When
3774 * the ulpLe field is set, the entire Command has been
3775 * received.
3776 */
ed957684
JS
3777 entry = lpfc_resp_iocb(phba, pring);
3778
858c9f6c 3779 phba->last_completion_time = jiffies;
2e0fef85 3780 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
3781 if (rspiocbp == NULL) {
3782 printk(KERN_ERR "%s: out of buffers! Failing "
cadbd4a5 3783 "completion.\n", __func__);
dea3101e
JB
3784 break;
3785 }
3786
ed957684
JS
3787 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
3788 phba->iocb_rsp_size);
dea3101e
JB
3789 irsp = &rspiocbp->iocb;
3790
7e56aa25
JS
3791 if (++pring->sli.sli3.rspidx >= portRspMax)
3792 pring->sli.sli3.rspidx = 0;
dea3101e 3793
a58cbd52
JS
3794 if (pring->ringno == LPFC_ELS_RING) {
3795 lpfc_debugfs_slow_ring_trc(phba,
3796 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
3797 *(((uint32_t *) irsp) + 4),
3798 *(((uint32_t *) irsp) + 6),
3799 *(((uint32_t *) irsp) + 7));
3800 }
3801
7e56aa25
JS
3802 writel(pring->sli.sli3.rspidx,
3803 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3804
3772a991
JS
3805 spin_unlock_irqrestore(&phba->hbalock, iflag);
3806 /* Handle the response IOCB */
3807 rspiocbp = lpfc_sli_sp_handle_rspiocb(phba, pring, rspiocbp);
3808 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3809
3810 /*
3811 * If the port response put pointer has not been updated, sync
3812 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
3813 * response put pointer.
3814 */
7e56aa25 3815 if (pring->sli.sli3.rspidx == portRspPut) {
dea3101e
JB
3816 portRspPut = le32_to_cpu(pgp->rspPutInx);
3817 }
7e56aa25 3818 } /* while (pring->sli.sli3.rspidx != portRspPut) */
dea3101e 3819
92d7f7b0 3820 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB
3821 /* At least one response entry has been freed */
3822 pring->stats.iocb_rsp_full++;
3823 /* SET RxRE_RSP in Chip Att register */
3824 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3825 writel(status, phba->CAregaddr);
3826 readl(phba->CAregaddr); /* flush */
3827 }
3828 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3829 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3830 pring->stats.iocb_cmd_empty++;
3831
3832 /* Force update of the local copy of cmdGetInx */
7e56aa25 3833 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3834 lpfc_sli_resume_iocb(phba, pring);
3835
3836 if ((pring->lpfc_sli_cmd_available))
3837 (pring->lpfc_sli_cmd_available) (phba, pring);
3838
3839 }
3840
2e0fef85 3841 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3842 return;
dea3101e
JB
3843}
3844
4f774513
JS
3845/**
3846 * lpfc_sli_handle_slow_ring_event_s4 - Handle SLI4 slow-path els events
3847 * @phba: Pointer to HBA context object.
3848 * @pring: Pointer to driver SLI ring object.
3849 * @mask: Host attention register mask for this ring.
3850 *
3851 * This function is called from the worker thread when there is a pending
3852 * ELS response iocb on the driver internal slow-path response iocb worker
3853 * queue. The caller does not hold any lock. The function will remove each
3854 * response iocb from the response worker queue and calls the handle
3855 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3856 **/
3857static void
3858lpfc_sli_handle_slow_ring_event_s4(struct lpfc_hba *phba,
3859 struct lpfc_sli_ring *pring, uint32_t mask)
3860{
3861 struct lpfc_iocbq *irspiocbq;
4d9ab994
JS
3862 struct hbq_dmabuf *dmabuf;
3863 struct lpfc_cq_event *cq_event;
4f774513 3864 unsigned long iflag;
0ef01a2d 3865 int count = 0;
4f774513 3866
45ed1190
JS
3867 spin_lock_irqsave(&phba->hbalock, iflag);
3868 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
3869 spin_unlock_irqrestore(&phba->hbalock, iflag);
3870 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
4f774513
JS
3871 /* Get the response iocb from the head of work queue */
3872 spin_lock_irqsave(&phba->hbalock, iflag);
45ed1190 3873 list_remove_head(&phba->sli4_hba.sp_queue_event,
4d9ab994 3874 cq_event, struct lpfc_cq_event, list);
4f774513 3875 spin_unlock_irqrestore(&phba->hbalock, iflag);
4d9ab994
JS
3876
3877 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
3878 case CQE_CODE_COMPL_WQE:
3879 irspiocbq = container_of(cq_event, struct lpfc_iocbq,
3880 cq_event);
45ed1190
JS
3881 /* Translate ELS WCQE to response IOCBQ */
3882 irspiocbq = lpfc_sli4_els_wcqe_to_rspiocbq(phba,
3883 irspiocbq);
3884 if (irspiocbq)
3885 lpfc_sli_sp_handle_rspiocb(phba, pring,
3886 irspiocbq);
0ef01a2d 3887 count++;
4d9ab994
JS
3888 break;
3889 case CQE_CODE_RECEIVE:
7851fe2c 3890 case CQE_CODE_RECEIVE_V1:
4d9ab994
JS
3891 dmabuf = container_of(cq_event, struct hbq_dmabuf,
3892 cq_event);
3893 lpfc_sli4_handle_received_buffer(phba, dmabuf);
0ef01a2d 3894 count++;
4d9ab994
JS
3895 break;
3896 default:
3897 break;
3898 }
0ef01a2d
JS
3899
3900 /* Limit the number of events to 64 to avoid soft lockups */
3901 if (count == 64)
3902 break;
4f774513
JS
3903 }
3904}
3905
e59058c4 3906/**
3621a710 3907 * lpfc_sli_abort_iocb_ring - Abort all iocbs in the ring
e59058c4
JS
3908 * @phba: Pointer to HBA context object.
3909 * @pring: Pointer to driver SLI ring object.
3910 *
3911 * This function aborts all iocbs in the given ring and frees all the iocb
3912 * objects in txq. This function issues an abort iocb for all the iocb commands
3913 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3914 * the return of this function. The caller is not required to hold any locks.
3915 **/
2e0fef85 3916void
dea3101e
JB
3917lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
3918{
2534ba75 3919 LIST_HEAD(completions);
dea3101e 3920 struct lpfc_iocbq *iocb, *next_iocb;
dea3101e 3921
92d7f7b0
JS
3922 if (pring->ringno == LPFC_ELS_RING) {
3923 lpfc_fabric_abort_hba(phba);
3924 }
3925
dea3101e
JB
3926 /* Error everything on txq and txcmplq
3927 * First do the txq.
3928 */
db55fba8
JS
3929 if (phba->sli_rev >= LPFC_SLI_REV4) {
3930 spin_lock_irq(&pring->ring_lock);
3931 list_splice_init(&pring->txq, &completions);
3932 pring->txq_cnt = 0;
3933 spin_unlock_irq(&pring->ring_lock);
dea3101e 3934
db55fba8
JS
3935 spin_lock_irq(&phba->hbalock);
3936 /* Next issue ABTS for everything on the txcmplq */
3937 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3938 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3939 spin_unlock_irq(&phba->hbalock);
3940 } else {
3941 spin_lock_irq(&phba->hbalock);
3942 list_splice_init(&pring->txq, &completions);
3943 pring->txq_cnt = 0;
dea3101e 3944
db55fba8
JS
3945 /* Next issue ABTS for everything on the txcmplq */
3946 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3947 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3948 spin_unlock_irq(&phba->hbalock);
3949 }
dea3101e 3950
a257bf90
JS
3951 /* Cancel all the IOCBs from the completions list */
3952 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
3953 IOERR_SLI_ABORTED);
dea3101e
JB
3954}
3955
db55fba8
JS
3956/**
3957 * lpfc_sli_abort_fcp_rings - Abort all iocbs in all FCP rings
3958 * @phba: Pointer to HBA context object.
3959 * @pring: Pointer to driver SLI ring object.
3960 *
3961 * This function aborts all iocbs in FCP rings and frees all the iocb
3962 * objects in txq. This function issues an abort iocb for all the iocb commands
3963 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3964 * the return of this function. The caller is not required to hold any locks.
3965 **/
3966void
3967lpfc_sli_abort_fcp_rings(struct lpfc_hba *phba)
3968{
3969 struct lpfc_sli *psli = &phba->sli;
3970 struct lpfc_sli_ring *pring;
3971 uint32_t i;
3972
3973 /* Look on all the FCP Rings for the iotag */
3974 if (phba->sli_rev >= LPFC_SLI_REV4) {
cdb42bec
JS
3975 for (i = 0; i < phba->cfg_hdw_queue; i++) {
3976 pring = phba->sli4_hba.hdwq[i].fcp_wq->pring;
db55fba8
JS
3977 lpfc_sli_abort_iocb_ring(phba, pring);
3978 }
3979 } else {
895427bd 3980 pring = &psli->sli3_ring[LPFC_FCP_RING];
db55fba8
JS
3981 lpfc_sli_abort_iocb_ring(phba, pring);
3982 }
3983}
3984
a8e497d5 3985/**
3621a710 3986 * lpfc_sli_flush_fcp_rings - flush all iocbs in the fcp ring
a8e497d5
JS
3987 * @phba: Pointer to HBA context object.
3988 *
3989 * This function flushes all iocbs in the fcp ring and frees all the iocb
3990 * objects in txq and txcmplq. This function will not issue abort iocbs
3991 * for all the iocb commands in txcmplq, they will just be returned with
3992 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
3993 * slot has been permanently disabled.
3994 **/
3995void
3996lpfc_sli_flush_fcp_rings(struct lpfc_hba *phba)
3997{
3998 LIST_HEAD(txq);
3999 LIST_HEAD(txcmplq);
a8e497d5
JS
4000 struct lpfc_sli *psli = &phba->sli;
4001 struct lpfc_sli_ring *pring;
db55fba8 4002 uint32_t i;
c1dd9111 4003 struct lpfc_iocbq *piocb, *next_iocb;
a8e497d5
JS
4004
4005 spin_lock_irq(&phba->hbalock);
4f2e66c6
JS
4006 /* Indicate the I/O queues are flushed */
4007 phba->hba_flag |= HBA_FCP_IOQ_FLUSH;
a8e497d5
JS
4008 spin_unlock_irq(&phba->hbalock);
4009
db55fba8
JS
4010 /* Look on all the FCP Rings for the iotag */
4011 if (phba->sli_rev >= LPFC_SLI_REV4) {
cdb42bec
JS
4012 for (i = 0; i < phba->cfg_hdw_queue; i++) {
4013 pring = phba->sli4_hba.hdwq[i].fcp_wq->pring;
db55fba8
JS
4014
4015 spin_lock_irq(&pring->ring_lock);
4016 /* Retrieve everything on txq */
4017 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4018 list_for_each_entry_safe(piocb, next_iocb,
4019 &pring->txcmplq, list)
4020 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4021 /* Retrieve everything on the txcmplq */
4022 list_splice_init(&pring->txcmplq, &txcmplq);
4023 pring->txq_cnt = 0;
4024 pring->txcmplq_cnt = 0;
4025 spin_unlock_irq(&pring->ring_lock);
4026
4027 /* Flush the txq */
4028 lpfc_sli_cancel_iocbs(phba, &txq,
4029 IOSTAT_LOCAL_REJECT,
4030 IOERR_SLI_DOWN);
4031 /* Flush the txcmpq */
4032 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4033 IOSTAT_LOCAL_REJECT,
4034 IOERR_SLI_DOWN);
4035 }
4036 } else {
895427bd 4037 pring = &psli->sli3_ring[LPFC_FCP_RING];
a8e497d5 4038
db55fba8
JS
4039 spin_lock_irq(&phba->hbalock);
4040 /* Retrieve everything on txq */
4041 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4042 list_for_each_entry_safe(piocb, next_iocb,
4043 &pring->txcmplq, list)
4044 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4045 /* Retrieve everything on the txcmplq */
4046 list_splice_init(&pring->txcmplq, &txcmplq);
4047 pring->txq_cnt = 0;
4048 pring->txcmplq_cnt = 0;
4049 spin_unlock_irq(&phba->hbalock);
4050
4051 /* Flush the txq */
4052 lpfc_sli_cancel_iocbs(phba, &txq, IOSTAT_LOCAL_REJECT,
4053 IOERR_SLI_DOWN);
4054 /* Flush the txcmpq */
4055 lpfc_sli_cancel_iocbs(phba, &txcmplq, IOSTAT_LOCAL_REJECT,
4056 IOERR_SLI_DOWN);
4057 }
a8e497d5
JS
4058}
4059
895427bd
JS
4060/**
4061 * lpfc_sli_flush_nvme_rings - flush all wqes in the nvme rings
4062 * @phba: Pointer to HBA context object.
4063 *
4064 * This function flushes all wqes in the nvme rings and frees all resources
4065 * in the txcmplq. This function does not issue abort wqes for the IO
4066 * commands in txcmplq, they will just be returned with
4067 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
4068 * slot has been permanently disabled.
4069 **/
4070void
4071lpfc_sli_flush_nvme_rings(struct lpfc_hba *phba)
4072{
4073 LIST_HEAD(txcmplq);
4074 struct lpfc_sli_ring *pring;
4075 uint32_t i;
c1dd9111 4076 struct lpfc_iocbq *piocb, *next_iocb;
895427bd 4077
cdb42bec
JS
4078 if ((phba->sli_rev < LPFC_SLI_REV4) ||
4079 !(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
895427bd
JS
4080 return;
4081
4082 /* Hint to other driver operations that a flush is in progress. */
4083 spin_lock_irq(&phba->hbalock);
4084 phba->hba_flag |= HBA_NVME_IOQ_FLUSH;
4085 spin_unlock_irq(&phba->hbalock);
4086
4087 /* Cycle through all NVME rings and complete each IO with
4088 * a local driver reason code. This is a flush so no
4089 * abort exchange to FW.
4090 */
cdb42bec
JS
4091 for (i = 0; i < phba->cfg_hdw_queue; i++) {
4092 pring = phba->sli4_hba.hdwq[i].nvme_wq->pring;
895427bd 4093
895427bd 4094 spin_lock_irq(&pring->ring_lock);
c1dd9111
JS
4095 list_for_each_entry_safe(piocb, next_iocb,
4096 &pring->txcmplq, list)
4097 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
4098 /* Retrieve everything on the txcmplq */
895427bd
JS
4099 list_splice_init(&pring->txcmplq, &txcmplq);
4100 pring->txcmplq_cnt = 0;
4101 spin_unlock_irq(&pring->ring_lock);
4102
4103 /* Flush the txcmpq &&&PAE */
4104 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4105 IOSTAT_LOCAL_REJECT,
4106 IOERR_SLI_DOWN);
4107 }
4108}
4109
e59058c4 4110/**
3772a991 4111 * lpfc_sli_brdready_s3 - Check for sli3 host ready status
e59058c4
JS
4112 * @phba: Pointer to HBA context object.
4113 * @mask: Bit mask to be checked.
4114 *
4115 * This function reads the host status register and compares
4116 * with the provided bit mask to check if HBA completed
4117 * the restart. This function will wait in a loop for the
4118 * HBA to complete restart. If the HBA does not restart within
4119 * 15 iterations, the function will reset the HBA again. The
4120 * function returns 1 when HBA fail to restart otherwise returns
4121 * zero.
4122 **/
3772a991
JS
4123static int
4124lpfc_sli_brdready_s3(struct lpfc_hba *phba, uint32_t mask)
dea3101e 4125{
41415862
JW
4126 uint32_t status;
4127 int i = 0;
4128 int retval = 0;
dea3101e 4129
41415862 4130 /* Read the HBA Host Status Register */
9940b97b
JS
4131 if (lpfc_readl(phba->HSregaddr, &status))
4132 return 1;
dea3101e 4133
41415862
JW
4134 /*
4135 * Check status register every 100ms for 5 retries, then every
4136 * 500ms for 5, then every 2.5 sec for 5, then reset board and
4137 * every 2.5 sec for 4.
4138 * Break our of the loop if errors occurred during init.
4139 */
4140 while (((status & mask) != mask) &&
4141 !(status & HS_FFERM) &&
4142 i++ < 20) {
dea3101e 4143
41415862
JW
4144 if (i <= 5)
4145 msleep(10);
4146 else if (i <= 10)
4147 msleep(500);
4148 else
4149 msleep(2500);
dea3101e 4150
41415862 4151 if (i == 15) {
2e0fef85 4152 /* Do post */
92d7f7b0 4153 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW
4154 lpfc_sli_brdrestart(phba);
4155 }
4156 /* Read the HBA Host Status Register */
9940b97b
JS
4157 if (lpfc_readl(phba->HSregaddr, &status)) {
4158 retval = 1;
4159 break;
4160 }
41415862 4161 }
dea3101e 4162
41415862
JW
4163 /* Check to see if any errors occurred during init */
4164 if ((status & HS_FFERM) || (i >= 20)) {
e40a02c1
JS
4165 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4166 "2751 Adapter failed to restart, "
4167 "status reg x%x, FW Data: A8 x%x AC x%x\n",
4168 status,
4169 readl(phba->MBslimaddr + 0xa8),
4170 readl(phba->MBslimaddr + 0xac));
2e0fef85 4171 phba->link_state = LPFC_HBA_ERROR;
41415862 4172 retval = 1;
dea3101e 4173 }
dea3101e 4174
41415862
JW
4175 return retval;
4176}
dea3101e 4177
da0436e9
JS
4178/**
4179 * lpfc_sli_brdready_s4 - Check for sli4 host ready status
4180 * @phba: Pointer to HBA context object.
4181 * @mask: Bit mask to be checked.
4182 *
4183 * This function checks the host status register to check if HBA is
4184 * ready. This function will wait in a loop for the HBA to be ready
4185 * If the HBA is not ready , the function will will reset the HBA PCI
4186 * function again. The function returns 1 when HBA fail to be ready
4187 * otherwise returns zero.
4188 **/
4189static int
4190lpfc_sli_brdready_s4(struct lpfc_hba *phba, uint32_t mask)
4191{
4192 uint32_t status;
4193 int retval = 0;
4194
4195 /* Read the HBA Host Status Register */
4196 status = lpfc_sli4_post_status_check(phba);
4197
4198 if (status) {
4199 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
4200 lpfc_sli_brdrestart(phba);
4201 status = lpfc_sli4_post_status_check(phba);
4202 }
4203
4204 /* Check to see if any errors occurred during init */
4205 if (status) {
4206 phba->link_state = LPFC_HBA_ERROR;
4207 retval = 1;
4208 } else
4209 phba->sli4_hba.intr_enable = 0;
4210
4211 return retval;
4212}
4213
4214/**
4215 * lpfc_sli_brdready - Wrapper func for checking the hba readyness
4216 * @phba: Pointer to HBA context object.
4217 * @mask: Bit mask to be checked.
4218 *
4219 * This routine wraps the actual SLI3 or SLI4 hba readyness check routine
4220 * from the API jump table function pointer from the lpfc_hba struct.
4221 **/
4222int
4223lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
4224{
4225 return phba->lpfc_sli_brdready(phba, mask);
4226}
4227
9290831f
JS
4228#define BARRIER_TEST_PATTERN (0xdeadbeef)
4229
e59058c4 4230/**
3621a710 4231 * lpfc_reset_barrier - Make HBA ready for HBA reset
e59058c4
JS
4232 * @phba: Pointer to HBA context object.
4233 *
1b51197d
JS
4234 * This function is called before resetting an HBA. This function is called
4235 * with hbalock held and requests HBA to quiesce DMAs before a reset.
e59058c4 4236 **/
2e0fef85 4237void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 4238{
65a29c16
JS
4239 uint32_t __iomem *resp_buf;
4240 uint32_t __iomem *mbox_buf;
9290831f 4241 volatile uint32_t mbox;
9940b97b 4242 uint32_t hc_copy, ha_copy, resp_data;
9290831f
JS
4243 int i;
4244 uint8_t hdrtype;
4245
1c2ba475
JT
4246 lockdep_assert_held(&phba->hbalock);
4247
9290831f
JS
4248 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
4249 if (hdrtype != 0x80 ||
4250 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
4251 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
4252 return;
4253
4254 /*
4255 * Tell the other part of the chip to suspend temporarily all
4256 * its DMA activity.
4257 */
65a29c16 4258 resp_buf = phba->MBslimaddr;
9290831f
JS
4259
4260 /* Disable the error attention */
9940b97b
JS
4261 if (lpfc_readl(phba->HCregaddr, &hc_copy))
4262 return;
9290831f
JS
4263 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
4264 readl(phba->HCregaddr); /* flush */
2e0fef85 4265 phba->link_flag |= LS_IGNORE_ERATT;
9290831f 4266
9940b97b
JS
4267 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4268 return;
4269 if (ha_copy & HA_ERATT) {
9290831f
JS
4270 /* Clear Chip error bit */
4271 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4272 phba->pport->stopped = 1;
9290831f
JS
4273 }
4274
4275 mbox = 0;
4276 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
4277 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
4278
4279 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 4280 mbox_buf = phba->MBslimaddr;
9290831f
JS
4281 writel(mbox, mbox_buf);
4282
9940b97b
JS
4283 for (i = 0; i < 50; i++) {
4284 if (lpfc_readl((resp_buf + 1), &resp_data))
4285 return;
4286 if (resp_data != ~(BARRIER_TEST_PATTERN))
4287 mdelay(1);
4288 else
4289 break;
4290 }
4291 resp_data = 0;
4292 if (lpfc_readl((resp_buf + 1), &resp_data))
4293 return;
4294 if (resp_data != ~(BARRIER_TEST_PATTERN)) {
f4b4c68f 4295 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE ||
2e0fef85 4296 phba->pport->stopped)
9290831f
JS
4297 goto restore_hc;
4298 else
4299 goto clear_errat;
4300 }
4301
4302 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
9940b97b
JS
4303 resp_data = 0;
4304 for (i = 0; i < 500; i++) {
4305 if (lpfc_readl(resp_buf, &resp_data))
4306 return;
4307 if (resp_data != mbox)
4308 mdelay(1);
4309 else
4310 break;
4311 }
9290831f
JS
4312
4313clear_errat:
4314
9940b97b
JS
4315 while (++i < 500) {
4316 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4317 return;
4318 if (!(ha_copy & HA_ERATT))
4319 mdelay(1);
4320 else
4321 break;
4322 }
9290831f
JS
4323
4324 if (readl(phba->HAregaddr) & HA_ERATT) {
4325 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4326 phba->pport->stopped = 1;
9290831f
JS
4327 }
4328
4329restore_hc:
2e0fef85 4330 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS
4331 writel(hc_copy, phba->HCregaddr);
4332 readl(phba->HCregaddr); /* flush */
4333}
4334
e59058c4 4335/**
3621a710 4336 * lpfc_sli_brdkill - Issue a kill_board mailbox command
e59058c4
JS
4337 * @phba: Pointer to HBA context object.
4338 *
4339 * This function issues a kill_board mailbox command and waits for
4340 * the error attention interrupt. This function is called for stopping
4341 * the firmware processing. The caller is not required to hold any
4342 * locks. This function calls lpfc_hba_down_post function to free
4343 * any pending commands after the kill. The function will return 1 when it
4344 * fails to kill the board else will return 0.
4345 **/
41415862 4346int
2e0fef85 4347lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW
4348{
4349 struct lpfc_sli *psli;
4350 LPFC_MBOXQ_t *pmb;
4351 uint32_t status;
4352 uint32_t ha_copy;
4353 int retval;
4354 int i = 0;
dea3101e 4355
41415862 4356 psli = &phba->sli;
dea3101e 4357
41415862 4358 /* Kill HBA */
ed957684 4359 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS
4360 "0329 Kill HBA Data: x%x x%x\n",
4361 phba->pport->port_state, psli->sli_flag);
41415862 4362
98c9ea5c
JS
4363 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4364 if (!pmb)
41415862 4365 return 1;
41415862
JW
4366
4367 /* Disable the error attention */
2e0fef85 4368 spin_lock_irq(&phba->hbalock);
9940b97b
JS
4369 if (lpfc_readl(phba->HCregaddr, &status)) {
4370 spin_unlock_irq(&phba->hbalock);
4371 mempool_free(pmb, phba->mbox_mem_pool);
4372 return 1;
4373 }
41415862
JW
4374 status &= ~HC_ERINT_ENA;
4375 writel(status, phba->HCregaddr);
4376 readl(phba->HCregaddr); /* flush */
2e0fef85
JS
4377 phba->link_flag |= LS_IGNORE_ERATT;
4378 spin_unlock_irq(&phba->hbalock);
41415862
JW
4379
4380 lpfc_kill_board(phba, pmb);
4381 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
4382 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4383
4384 if (retval != MBX_SUCCESS) {
4385 if (retval != MBX_BUSY)
4386 mempool_free(pmb, phba->mbox_mem_pool);
e40a02c1
JS
4387 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4388 "2752 KILL_BOARD command failed retval %d\n",
4389 retval);
2e0fef85
JS
4390 spin_lock_irq(&phba->hbalock);
4391 phba->link_flag &= ~LS_IGNORE_ERATT;
4392 spin_unlock_irq(&phba->hbalock);
41415862
JW
4393 return 1;
4394 }
4395
f4b4c68f
JS
4396 spin_lock_irq(&phba->hbalock);
4397 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
4398 spin_unlock_irq(&phba->hbalock);
9290831f 4399
41415862
JW
4400 mempool_free(pmb, phba->mbox_mem_pool);
4401
4402 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
4403 * attention every 100ms for 3 seconds. If we don't get ERATT after
4404 * 3 seconds we still set HBA_ERROR state because the status of the
4405 * board is now undefined.
4406 */
9940b97b
JS
4407 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4408 return 1;
41415862
JW
4409 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
4410 mdelay(100);
9940b97b
JS
4411 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4412 return 1;
41415862
JW
4413 }
4414
4415 del_timer_sync(&psli->mbox_tmo);
9290831f
JS
4416 if (ha_copy & HA_ERATT) {
4417 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4418 phba->pport->stopped = 1;
9290831f 4419 }
2e0fef85 4420 spin_lock_irq(&phba->hbalock);
41415862 4421 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
04c68496 4422 psli->mbox_active = NULL;
2e0fef85
JS
4423 phba->link_flag &= ~LS_IGNORE_ERATT;
4424 spin_unlock_irq(&phba->hbalock);
41415862 4425
41415862 4426 lpfc_hba_down_post(phba);
2e0fef85 4427 phba->link_state = LPFC_HBA_ERROR;
41415862 4428
2e0fef85 4429 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB
4430}
4431
e59058c4 4432/**
3772a991 4433 * lpfc_sli_brdreset - Reset a sli-2 or sli-3 HBA
e59058c4
JS
4434 * @phba: Pointer to HBA context object.
4435 *
4436 * This function resets the HBA by writing HC_INITFF to the control
4437 * register. After the HBA resets, this function resets all the iocb ring
4438 * indices. This function disables PCI layer parity checking during
4439 * the reset.
4440 * This function returns 0 always.
4441 * The caller is not required to hold any locks.
4442 **/
41415862 4443int
2e0fef85 4444lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 4445{
41415862 4446 struct lpfc_sli *psli;
dea3101e 4447 struct lpfc_sli_ring *pring;
41415862 4448 uint16_t cfg_value;
dea3101e 4449 int i;
dea3101e 4450
41415862 4451 psli = &phba->sli;
dea3101e 4452
41415862
JW
4453 /* Reset HBA */
4454 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4455 "0325 Reset HBA Data: x%x x%x\n",
4492b739
JS
4456 (phba->pport) ? phba->pport->port_state : 0,
4457 psli->sli_flag);
dea3101e
JB
4458
4459 /* perform board reset */
4460 phba->fc_eventTag = 0;
4d9ab994 4461 phba->link_events = 0;
4492b739
JS
4462 if (phba->pport) {
4463 phba->pport->fc_myDID = 0;
4464 phba->pport->fc_prevDID = 0;
4465 }
dea3101e 4466
41415862 4467 /* Turn off parity checking and serr during the physical reset */
32a93100
JS
4468 if (pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value))
4469 return -EIO;
4470
41415862
JW
4471 pci_write_config_word(phba->pcidev, PCI_COMMAND,
4472 (cfg_value &
4473 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4474
3772a991
JS
4475 psli->sli_flag &= ~(LPFC_SLI_ACTIVE | LPFC_PROCESS_LA);
4476
41415862
JW
4477 /* Now toggle INITFF bit in the Host Control Register */
4478 writel(HC_INITFF, phba->HCregaddr);
4479 mdelay(1);
4480 readl(phba->HCregaddr); /* flush */
4481 writel(0, phba->HCregaddr);
4482 readl(phba->HCregaddr); /* flush */
4483
4484 /* Restore PCI cmd register */
4485 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB
4486
4487 /* Initialize relevant SLI info */
41415862 4488 for (i = 0; i < psli->num_rings; i++) {
895427bd 4489 pring = &psli->sli3_ring[i];
dea3101e 4490 pring->flag = 0;
7e56aa25
JS
4491 pring->sli.sli3.rspidx = 0;
4492 pring->sli.sli3.next_cmdidx = 0;
4493 pring->sli.sli3.local_getidx = 0;
4494 pring->sli.sli3.cmdidx = 0;
dea3101e
JB
4495 pring->missbufcnt = 0;
4496 }
dea3101e 4497
2e0fef85 4498 phba->link_state = LPFC_WARM_START;
41415862
JW
4499 return 0;
4500}
4501
e59058c4 4502/**
da0436e9
JS
4503 * lpfc_sli4_brdreset - Reset a sli-4 HBA
4504 * @phba: Pointer to HBA context object.
4505 *
4506 * This function resets a SLI4 HBA. This function disables PCI layer parity
4507 * checking during resets the device. The caller is not required to hold
4508 * any locks.
4509 *
4510 * This function returns 0 always.
4511 **/
4512int
4513lpfc_sli4_brdreset(struct lpfc_hba *phba)
4514{
4515 struct lpfc_sli *psli = &phba->sli;
4516 uint16_t cfg_value;
0293635e 4517 int rc = 0;
da0436e9
JS
4518
4519 /* Reset HBA */
4520 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
0293635e
JS
4521 "0295 Reset HBA Data: x%x x%x x%x\n",
4522 phba->pport->port_state, psli->sli_flag,
4523 phba->hba_flag);
da0436e9
JS
4524
4525 /* perform board reset */
4526 phba->fc_eventTag = 0;
4d9ab994 4527 phba->link_events = 0;
da0436e9
JS
4528 phba->pport->fc_myDID = 0;
4529 phba->pport->fc_prevDID = 0;
4530
da0436e9
JS
4531 spin_lock_irq(&phba->hbalock);
4532 psli->sli_flag &= ~(LPFC_PROCESS_LA);
4533 phba->fcf.fcf_flag = 0;
da0436e9
JS
4534 spin_unlock_irq(&phba->hbalock);
4535
0293635e
JS
4536 /* SLI4 INTF 2: if FW dump is being taken skip INIT_PORT */
4537 if (phba->hba_flag & HBA_FW_DUMP_OP) {
4538 phba->hba_flag &= ~HBA_FW_DUMP_OP;
4539 return rc;
4540 }
4541
da0436e9
JS
4542 /* Now physically reset the device */
4543 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4544 "0389 Performing PCI function reset!\n");
be858b65
JS
4545
4546 /* Turn off parity checking and serr during the physical reset */
32a93100
JS
4547 if (pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value)) {
4548 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4549 "3205 PCI read Config failed\n");
4550 return -EIO;
4551 }
4552
be858b65
JS
4553 pci_write_config_word(phba->pcidev, PCI_COMMAND, (cfg_value &
4554 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4555
88318816 4556 /* Perform FCoE PCI function reset before freeing queue memory */
27b01b82 4557 rc = lpfc_pci_function_reset(phba);
da0436e9 4558
be858b65
JS
4559 /* Restore PCI cmd register */
4560 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
4561
27b01b82 4562 return rc;
da0436e9
JS
4563}
4564
4565/**
4566 * lpfc_sli_brdrestart_s3 - Restart a sli-3 hba
e59058c4
JS
4567 * @phba: Pointer to HBA context object.
4568 *
4569 * This function is called in the SLI initialization code path to
4570 * restart the HBA. The caller is not required to hold any lock.
4571 * This function writes MBX_RESTART mailbox command to the SLIM and
4572 * resets the HBA. At the end of the function, it calls lpfc_hba_down_post
4573 * function to free any pending commands. The function enables
4574 * POST only during the first initialization. The function returns zero.
4575 * The function does not guarantee completion of MBX_RESTART mailbox
4576 * command before the return of this function.
4577 **/
da0436e9
JS
4578static int
4579lpfc_sli_brdrestart_s3(struct lpfc_hba *phba)
41415862
JW
4580{
4581 MAILBOX_t *mb;
4582 struct lpfc_sli *psli;
41415862
JW
4583 volatile uint32_t word0;
4584 void __iomem *to_slim;
0d878419 4585 uint32_t hba_aer_enabled;
41415862 4586
2e0fef85 4587 spin_lock_irq(&phba->hbalock);
41415862 4588
0d878419
JS
4589 /* Take PCIe device Advanced Error Reporting (AER) state */
4590 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4591
41415862
JW
4592 psli = &phba->sli;
4593
4594 /* Restart HBA */
4595 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4596 "0337 Restart HBA Data: x%x x%x\n",
4492b739
JS
4597 (phba->pport) ? phba->pport->port_state : 0,
4598 psli->sli_flag);
41415862
JW
4599
4600 word0 = 0;
4601 mb = (MAILBOX_t *) &word0;
4602 mb->mbxCommand = MBX_RESTART;
4603 mb->mbxHc = 1;
4604
9290831f
JS
4605 lpfc_reset_barrier(phba);
4606
41415862
JW
4607 to_slim = phba->MBslimaddr;
4608 writel(*(uint32_t *) mb, to_slim);
4609 readl(to_slim); /* flush */
4610
4611 /* Only skip post after fc_ffinit is completed */
4492b739 4612 if (phba->pport && phba->pport->port_state)
41415862 4613 word0 = 1; /* This is really setting up word1 */
eaf15d5b 4614 else
41415862 4615 word0 = 0; /* This is really setting up word1 */
65a29c16 4616 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW
4617 writel(*(uint32_t *) mb, to_slim);
4618 readl(to_slim); /* flush */
dea3101e 4619
41415862 4620 lpfc_sli_brdreset(phba);
4492b739
JS
4621 if (phba->pport)
4622 phba->pport->stopped = 0;
2e0fef85 4623 phba->link_state = LPFC_INIT_START;
da0436e9 4624 phba->hba_flag = 0;
2e0fef85 4625 spin_unlock_irq(&phba->hbalock);
41415862 4626
64ba8818 4627 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4628 psli->stats_start = ktime_get_seconds();
64ba8818 4629
eaf15d5b
JS
4630 /* Give the INITFF and Post time to settle. */
4631 mdelay(100);
41415862 4632
0d878419
JS
4633 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4634 if (hba_aer_enabled)
4635 pci_disable_pcie_error_reporting(phba->pcidev);
4636
41415862 4637 lpfc_hba_down_post(phba);
dea3101e
JB
4638
4639 return 0;
4640}
4641
da0436e9
JS
4642/**
4643 * lpfc_sli_brdrestart_s4 - Restart the sli-4 hba
4644 * @phba: Pointer to HBA context object.
4645 *
4646 * This function is called in the SLI initialization code path to restart
4647 * a SLI4 HBA. The caller is not required to hold any lock.
4648 * At the end of the function, it calls lpfc_hba_down_post function to
4649 * free any pending commands.
4650 **/
4651static int
4652lpfc_sli_brdrestart_s4(struct lpfc_hba *phba)
4653{
4654 struct lpfc_sli *psli = &phba->sli;
75baf696 4655 uint32_t hba_aer_enabled;
27b01b82 4656 int rc;
da0436e9
JS
4657
4658 /* Restart HBA */
4659 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4660 "0296 Restart HBA Data: x%x x%x\n",
4661 phba->pport->port_state, psli->sli_flag);
4662
75baf696
JS
4663 /* Take PCIe device Advanced Error Reporting (AER) state */
4664 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4665
27b01b82 4666 rc = lpfc_sli4_brdreset(phba);
5a9eeff5
JS
4667 if (rc)
4668 return rc;
da0436e9
JS
4669
4670 spin_lock_irq(&phba->hbalock);
4671 phba->pport->stopped = 0;
4672 phba->link_state = LPFC_INIT_START;
4673 phba->hba_flag = 0;
4674 spin_unlock_irq(&phba->hbalock);
4675
4676 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4677 psli->stats_start = ktime_get_seconds();
da0436e9 4678
75baf696
JS
4679 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4680 if (hba_aer_enabled)
4681 pci_disable_pcie_error_reporting(phba->pcidev);
4682
da0436e9 4683 lpfc_hba_down_post(phba);
569dbe84 4684 lpfc_sli4_queue_destroy(phba);
da0436e9 4685
27b01b82 4686 return rc;
da0436e9
JS
4687}
4688
4689/**
4690 * lpfc_sli_brdrestart - Wrapper func for restarting hba
4691 * @phba: Pointer to HBA context object.
4692 *
4693 * This routine wraps the actual SLI3 or SLI4 hba restart routine from the
4694 * API jump table function pointer from the lpfc_hba struct.
4695**/
4696int
4697lpfc_sli_brdrestart(struct lpfc_hba *phba)
4698{
4699 return phba->lpfc_sli_brdrestart(phba);
4700}
4701
e59058c4 4702/**
3621a710 4703 * lpfc_sli_chipset_init - Wait for the restart of the HBA after a restart
e59058c4
JS
4704 * @phba: Pointer to HBA context object.
4705 *
4706 * This function is called after a HBA restart to wait for successful
4707 * restart of the HBA. Successful restart of the HBA is indicated by
4708 * HS_FFRDY and HS_MBRDY bits. If the HBA fails to restart even after 15
4709 * iteration, the function will restart the HBA again. The function returns
4710 * zero if HBA successfully restarted else returns negative error code.
4711 **/
4492b739 4712int
dea3101e
JB
4713lpfc_sli_chipset_init(struct lpfc_hba *phba)
4714{
4715 uint32_t status, i = 0;
4716
4717 /* Read the HBA Host Status Register */
9940b97b
JS
4718 if (lpfc_readl(phba->HSregaddr, &status))
4719 return -EIO;
dea3101e
JB
4720
4721 /* Check status register to see what current state is */
4722 i = 0;
4723 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
4724
dcf2a4e0
JS
4725 /* Check every 10ms for 10 retries, then every 100ms for 90
4726 * retries, then every 1 sec for 50 retires for a total of
4727 * ~60 seconds before reset the board again and check every
4728 * 1 sec for 50 retries. The up to 60 seconds before the
4729 * board ready is required by the Falcon FIPS zeroization
4730 * complete, and any reset the board in between shall cause
4731 * restart of zeroization, further delay the board ready.
dea3101e 4732 */
dcf2a4e0 4733 if (i++ >= 200) {
dea3101e
JB
4734 /* Adapter failed to init, timeout, status reg
4735 <status> */
ed957684 4736 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4737 "0436 Adapter failed to init, "
09372820
JS
4738 "timeout, status reg x%x, "
4739 "FW Data: A8 x%x AC x%x\n", status,
4740 readl(phba->MBslimaddr + 0xa8),
4741 readl(phba->MBslimaddr + 0xac));
2e0fef85 4742 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4743 return -ETIMEDOUT;
4744 }
4745
4746 /* Check to see if any errors occurred during init */
4747 if (status & HS_FFERM) {
4748 /* ERROR: During chipset initialization */
4749 /* Adapter failed to init, chipset, status reg
4750 <status> */
ed957684 4751 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4752 "0437 Adapter failed to init, "
09372820
JS
4753 "chipset, status reg x%x, "
4754 "FW Data: A8 x%x AC x%x\n", status,
4755 readl(phba->MBslimaddr + 0xa8),
4756 readl(phba->MBslimaddr + 0xac));
2e0fef85 4757 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4758 return -EIO;
4759 }
4760
dcf2a4e0 4761 if (i <= 10)
dea3101e 4762 msleep(10);
dcf2a4e0
JS
4763 else if (i <= 100)
4764 msleep(100);
4765 else
4766 msleep(1000);
dea3101e 4767
dcf2a4e0
JS
4768 if (i == 150) {
4769 /* Do post */
92d7f7b0 4770 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4771 lpfc_sli_brdrestart(phba);
dea3101e
JB
4772 }
4773 /* Read the HBA Host Status Register */
9940b97b
JS
4774 if (lpfc_readl(phba->HSregaddr, &status))
4775 return -EIO;
dea3101e
JB
4776 }
4777
4778 /* Check to see if any errors occurred during init */
4779 if (status & HS_FFERM) {
4780 /* ERROR: During chipset initialization */
4781 /* Adapter failed to init, chipset, status reg <status> */
ed957684 4782 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4783 "0438 Adapter failed to init, chipset, "
09372820
JS
4784 "status reg x%x, "
4785 "FW Data: A8 x%x AC x%x\n", status,
4786 readl(phba->MBslimaddr + 0xa8),
4787 readl(phba->MBslimaddr + 0xac));
2e0fef85 4788 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4789 return -EIO;
4790 }
4791
4792 /* Clear all interrupt enable conditions */
4793 writel(0, phba->HCregaddr);
4794 readl(phba->HCregaddr); /* flush */
4795
4796 /* setup host attn register */
4797 writel(0xffffffff, phba->HAregaddr);
4798 readl(phba->HAregaddr); /* flush */
4799 return 0;
4800}
4801
e59058c4 4802/**
3621a710 4803 * lpfc_sli_hbq_count - Get the number of HBQs to be configured
e59058c4
JS
4804 *
4805 * This function calculates and returns the number of HBQs required to be
4806 * configured.
4807 **/
78b2d852 4808int
ed957684
JS
4809lpfc_sli_hbq_count(void)
4810{
92d7f7b0 4811 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS
4812}
4813
e59058c4 4814/**
3621a710 4815 * lpfc_sli_hbq_entry_count - Calculate total number of hbq entries
e59058c4
JS
4816 *
4817 * This function adds the number of hbq entries in every HBQ to get
4818 * the total number of hbq entries required for the HBA and returns
4819 * the total count.
4820 **/
ed957684
JS
4821static int
4822lpfc_sli_hbq_entry_count(void)
4823{
4824 int hbq_count = lpfc_sli_hbq_count();
4825 int count = 0;
4826 int i;
4827
4828 for (i = 0; i < hbq_count; ++i)
92d7f7b0 4829 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS
4830 return count;
4831}
4832
e59058c4 4833/**
3621a710 4834 * lpfc_sli_hbq_size - Calculate memory required for all hbq entries
e59058c4
JS
4835 *
4836 * This function calculates amount of memory required for all hbq entries
4837 * to be configured and returns the total memory required.
4838 **/
dea3101e 4839int
ed957684
JS
4840lpfc_sli_hbq_size(void)
4841{
4842 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
4843}
4844
e59058c4 4845/**
3621a710 4846 * lpfc_sli_hbq_setup - configure and initialize HBQs
e59058c4
JS
4847 * @phba: Pointer to HBA context object.
4848 *
4849 * This function is called during the SLI initialization to configure
4850 * all the HBQs and post buffers to the HBQ. The caller is not
4851 * required to hold any locks. This function will return zero if successful
4852 * else it will return negative error code.
4853 **/
ed957684
JS
4854static int
4855lpfc_sli_hbq_setup(struct lpfc_hba *phba)
4856{
4857 int hbq_count = lpfc_sli_hbq_count();
4858 LPFC_MBOXQ_t *pmb;
4859 MAILBOX_t *pmbox;
4860 uint32_t hbqno;
4861 uint32_t hbq_entry_index;
ed957684 4862
92d7f7b0
JS
4863 /* Get a Mailbox buffer to setup mailbox
4864 * commands for HBA initialization
4865 */
ed957684
JS
4866 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4867
4868 if (!pmb)
4869 return -ENOMEM;
4870
04c68496 4871 pmbox = &pmb->u.mb;
ed957684
JS
4872
4873 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
4874 phba->link_state = LPFC_INIT_MBX_CMDS;
3163f725 4875 phba->hbq_in_use = 1;
ed957684
JS
4876
4877 hbq_entry_index = 0;
4878 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
4879 phba->hbqs[hbqno].next_hbqPutIdx = 0;
4880 phba->hbqs[hbqno].hbqPutIdx = 0;
4881 phba->hbqs[hbqno].local_hbqGetIdx = 0;
4882 phba->hbqs[hbqno].entry_count =
92d7f7b0 4883 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS
4884 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
4885 hbq_entry_index, pmb);
ed957684
JS
4886 hbq_entry_index += phba->hbqs[hbqno].entry_count;
4887
4888 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
4889 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
4890 mbxStatus <status>, ring <num> */
4891
4892 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 4893 LOG_SLI | LOG_VPORT,
e8b62011 4894 "1805 Adapter failed to init. "
ed957684 4895 "Data: x%x x%x x%x\n",
e8b62011 4896 pmbox->mbxCommand,
ed957684
JS
4897 pmbox->mbxStatus, hbqno);
4898
4899 phba->link_state = LPFC_HBA_ERROR;
4900 mempool_free(pmb, phba->mbox_mem_pool);
6e7288d9 4901 return -ENXIO;
ed957684
JS
4902 }
4903 }
4904 phba->hbq_count = hbq_count;
4905
ed957684
JS
4906 mempool_free(pmb, phba->mbox_mem_pool);
4907
92d7f7b0 4908 /* Initially populate or replenish the HBQs */
d7c255b2
JS
4909 for (hbqno = 0; hbqno < hbq_count; ++hbqno)
4910 lpfc_sli_hbqbuf_init_hbqs(phba, hbqno);
ed957684
JS
4911 return 0;
4912}
4913
4f774513
JS
4914/**
4915 * lpfc_sli4_rb_setup - Initialize and post RBs to HBA
4916 * @phba: Pointer to HBA context object.
4917 *
4918 * This function is called during the SLI initialization to configure
4919 * all the HBQs and post buffers to the HBQ. The caller is not
4920 * required to hold any locks. This function will return zero if successful
4921 * else it will return negative error code.
4922 **/
4923static int
4924lpfc_sli4_rb_setup(struct lpfc_hba *phba)
4925{
4926 phba->hbq_in_use = 1;
895427bd
JS
4927 phba->hbqs[LPFC_ELS_HBQ].entry_count =
4928 lpfc_hbq_defs[LPFC_ELS_HBQ]->entry_count;
4f774513 4929 phba->hbq_count = 1;
895427bd 4930 lpfc_sli_hbqbuf_init_hbqs(phba, LPFC_ELS_HBQ);
4f774513 4931 /* Initially populate or replenish the HBQs */
4f774513
JS
4932 return 0;
4933}
4934
e59058c4 4935/**
3621a710 4936 * lpfc_sli_config_port - Issue config port mailbox command
e59058c4
JS
4937 * @phba: Pointer to HBA context object.
4938 * @sli_mode: sli mode - 2/3
4939 *
183b8021 4940 * This function is called by the sli initialization code path
e59058c4
JS
4941 * to issue config_port mailbox command. This function restarts the
4942 * HBA firmware and issues a config_port mailbox command to configure
4943 * the SLI interface in the sli mode specified by sli_mode
4944 * variable. The caller is not required to hold any locks.
4945 * The function returns 0 if successful, else returns negative error
4946 * code.
4947 **/
9399627f
JS
4948int
4949lpfc_sli_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB
4950{
4951 LPFC_MBOXQ_t *pmb;
4952 uint32_t resetcount = 0, rc = 0, done = 0;
4953
4954 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4955 if (!pmb) {
2e0fef85 4956 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4957 return -ENOMEM;
4958 }
4959
ed957684 4960 phba->sli_rev = sli_mode;
dea3101e 4961 while (resetcount < 2 && !done) {
2e0fef85 4962 spin_lock_irq(&phba->hbalock);
1c067a42 4963 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 4964 spin_unlock_irq(&phba->hbalock);
92d7f7b0 4965 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4966 lpfc_sli_brdrestart(phba);
dea3101e
JB
4967 rc = lpfc_sli_chipset_init(phba);
4968 if (rc)
4969 break;
4970
2e0fef85 4971 spin_lock_irq(&phba->hbalock);
1c067a42 4972 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 4973 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
4974 resetcount++;
4975
ed957684
JS
4976 /* Call pre CONFIG_PORT mailbox command initialization. A
4977 * value of 0 means the call was successful. Any other
4978 * nonzero value is a failure, but if ERESTART is returned,
4979 * the driver may reset the HBA and try again.
4980 */
dea3101e
JB
4981 rc = lpfc_config_port_prep(phba);
4982 if (rc == -ERESTART) {
ed957684 4983 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e 4984 continue;
34b02dcd 4985 } else if (rc)
dea3101e 4986 break;
6d368e53 4987
2e0fef85 4988 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
4989 lpfc_config_port(phba, pmb);
4990 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
34b02dcd
JS
4991 phba->sli3_options &= ~(LPFC_SLI3_NPIV_ENABLED |
4992 LPFC_SLI3_HBQ_ENABLED |
4993 LPFC_SLI3_CRP_ENABLED |
bc73905a 4994 LPFC_SLI3_DSS_ENABLED);
ed957684 4995 if (rc != MBX_SUCCESS) {
dea3101e 4996 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4997 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 4998 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
04c68496 4999 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus, 0);
2e0fef85 5000 spin_lock_irq(&phba->hbalock);
04c68496 5001 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
2e0fef85
JS
5002 spin_unlock_irq(&phba->hbalock);
5003 rc = -ENXIO;
04c68496
JS
5004 } else {
5005 /* Allow asynchronous mailbox command to go through */
5006 spin_lock_irq(&phba->hbalock);
5007 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
5008 spin_unlock_irq(&phba->hbalock);
ed957684 5009 done = 1;
cb69f7de
JS
5010
5011 if ((pmb->u.mb.un.varCfgPort.casabt == 1) &&
5012 (pmb->u.mb.un.varCfgPort.gasabt == 0))
5013 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5014 "3110 Port did not grant ASABT\n");
04c68496 5015 }
dea3101e 5016 }
ed957684
JS
5017 if (!done) {
5018 rc = -EINVAL;
5019 goto do_prep_failed;
5020 }
04c68496
JS
5021 if (pmb->u.mb.un.varCfgPort.sli_mode == 3) {
5022 if (!pmb->u.mb.un.varCfgPort.cMA) {
34b02dcd
JS
5023 rc = -ENXIO;
5024 goto do_prep_failed;
5025 }
04c68496 5026 if (phba->max_vpi && pmb->u.mb.un.varCfgPort.gmv) {
34b02dcd 5027 phba->sli3_options |= LPFC_SLI3_NPIV_ENABLED;
04c68496
JS
5028 phba->max_vpi = pmb->u.mb.un.varCfgPort.max_vpi;
5029 phba->max_vports = (phba->max_vpi > phba->max_vports) ?
5030 phba->max_vpi : phba->max_vports;
5031
34b02dcd
JS
5032 } else
5033 phba->max_vpi = 0;
bc73905a
JS
5034 phba->fips_level = 0;
5035 phba->fips_spec_rev = 0;
5036 if (pmb->u.mb.un.varCfgPort.gdss) {
04c68496 5037 phba->sli3_options |= LPFC_SLI3_DSS_ENABLED;
bc73905a
JS
5038 phba->fips_level = pmb->u.mb.un.varCfgPort.fips_level;
5039 phba->fips_spec_rev = pmb->u.mb.un.varCfgPort.fips_rev;
5040 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5041 "2850 Security Crypto Active. FIPS x%d "
5042 "(Spec Rev: x%d)",
5043 phba->fips_level, phba->fips_spec_rev);
5044 }
5045 if (pmb->u.mb.un.varCfgPort.sec_err) {
5046 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5047 "2856 Config Port Security Crypto "
5048 "Error: x%x ",
5049 pmb->u.mb.un.varCfgPort.sec_err);
5050 }
04c68496 5051 if (pmb->u.mb.un.varCfgPort.gerbm)
34b02dcd 5052 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
04c68496 5053 if (pmb->u.mb.un.varCfgPort.gcrp)
34b02dcd 5054 phba->sli3_options |= LPFC_SLI3_CRP_ENABLED;
6e7288d9
JS
5055
5056 phba->hbq_get = phba->mbox->us.s3_pgp.hbq_get;
5057 phba->port_gp = phba->mbox->us.s3_pgp.port;
e2a0a9d6 5058
f44ac12f
JS
5059 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
5060 if (pmb->u.mb.un.varCfgPort.gbg == 0) {
5061 phba->cfg_enable_bg = 0;
5062 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
e2a0a9d6
JS
5063 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5064 "0443 Adapter did not grant "
5065 "BlockGuard\n");
f44ac12f 5066 }
e2a0a9d6 5067 }
34b02dcd 5068 } else {
8f34f4ce 5069 phba->hbq_get = NULL;
34b02dcd 5070 phba->port_gp = phba->mbox->us.s2.port;
d7c255b2 5071 phba->max_vpi = 0;
ed957684 5072 }
92d7f7b0 5073do_prep_failed:
ed957684
JS
5074 mempool_free(pmb, phba->mbox_mem_pool);
5075 return rc;
5076}
5077
e59058c4
JS
5078
5079/**
183b8021 5080 * lpfc_sli_hba_setup - SLI initialization function
e59058c4
JS
5081 * @phba: Pointer to HBA context object.
5082 *
183b8021
MY
5083 * This function is the main SLI initialization function. This function
5084 * is called by the HBA initialization code, HBA reset code and HBA
e59058c4
JS
5085 * error attention handler code. Caller is not required to hold any
5086 * locks. This function issues config_port mailbox command to configure
5087 * the SLI, setup iocb rings and HBQ rings. In the end the function
5088 * calls the config_port_post function to issue init_link mailbox
5089 * command and to start the discovery. The function will return zero
5090 * if successful, else it will return negative error code.
5091 **/
ed957684
JS
5092int
5093lpfc_sli_hba_setup(struct lpfc_hba *phba)
5094{
5095 uint32_t rc;
6d368e53
JS
5096 int mode = 3, i;
5097 int longs;
ed957684 5098
12247e81 5099 switch (phba->cfg_sli_mode) {
ed957684 5100 case 2:
78b2d852 5101 if (phba->cfg_enable_npiv) {
92d7f7b0 5102 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81 5103 "1824 NPIV enabled: Override sli_mode "
92d7f7b0 5104 "parameter (%d) to auto (0).\n",
12247e81 5105 phba->cfg_sli_mode);
92d7f7b0
JS
5106 break;
5107 }
ed957684
JS
5108 mode = 2;
5109 break;
5110 case 0:
5111 case 3:
5112 break;
5113 default:
92d7f7b0 5114 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81
JS
5115 "1819 Unrecognized sli_mode parameter: %d.\n",
5116 phba->cfg_sli_mode);
ed957684
JS
5117
5118 break;
5119 }
b5c53958 5120 phba->fcp_embed_io = 0; /* SLI4 FC support only */
ed957684 5121
9399627f
JS
5122 rc = lpfc_sli_config_port(phba, mode);
5123
12247e81 5124 if (rc && phba->cfg_sli_mode == 3)
92d7f7b0 5125 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS
5126 "1820 Unable to select SLI-3. "
5127 "Not supported by adapter.\n");
ed957684 5128 if (rc && mode != 2)
9399627f 5129 rc = lpfc_sli_config_port(phba, 2);
4597663f
JS
5130 else if (rc && mode == 2)
5131 rc = lpfc_sli_config_port(phba, 3);
ed957684 5132 if (rc)
dea3101e
JB
5133 goto lpfc_sli_hba_setup_error;
5134
0d878419
JS
5135 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
5136 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
5137 rc = pci_enable_pcie_error_reporting(phba->pcidev);
5138 if (!rc) {
5139 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5140 "2709 This device supports "
5141 "Advanced Error Reporting (AER)\n");
5142 spin_lock_irq(&phba->hbalock);
5143 phba->hba_flag |= HBA_AER_ENABLED;
5144 spin_unlock_irq(&phba->hbalock);
5145 } else {
5146 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5147 "2708 This device does not support "
b069d7eb
JS
5148 "Advanced Error Reporting (AER): %d\n",
5149 rc);
0d878419
JS
5150 phba->cfg_aer_support = 0;
5151 }
5152 }
5153
ed957684
JS
5154 if (phba->sli_rev == 3) {
5155 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
5156 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
ed957684
JS
5157 } else {
5158 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
5159 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 5160 phba->sli3_options = 0;
ed957684
JS
5161 }
5162
5163 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
5164 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
5165 phba->sli_rev, phba->max_vpi);
ed957684 5166 rc = lpfc_sli_ring_map(phba);
dea3101e
JB
5167
5168 if (rc)
5169 goto lpfc_sli_hba_setup_error;
5170
6d368e53
JS
5171 /* Initialize VPIs. */
5172 if (phba->sli_rev == LPFC_SLI_REV3) {
5173 /*
5174 * The VPI bitmask and physical ID array are allocated
5175 * and initialized once only - at driver load. A port
5176 * reset doesn't need to reinitialize this memory.
5177 */
5178 if ((phba->vpi_bmask == NULL) && (phba->vpi_ids == NULL)) {
5179 longs = (phba->max_vpi + BITS_PER_LONG) / BITS_PER_LONG;
6396bb22
KC
5180 phba->vpi_bmask = kcalloc(longs,
5181 sizeof(unsigned long),
6d368e53
JS
5182 GFP_KERNEL);
5183 if (!phba->vpi_bmask) {
5184 rc = -ENOMEM;
5185 goto lpfc_sli_hba_setup_error;
5186 }
5187
6396bb22
KC
5188 phba->vpi_ids = kcalloc(phba->max_vpi + 1,
5189 sizeof(uint16_t),
5190 GFP_KERNEL);
6d368e53
JS
5191 if (!phba->vpi_ids) {
5192 kfree(phba->vpi_bmask);
5193 rc = -ENOMEM;
5194 goto lpfc_sli_hba_setup_error;
5195 }
5196 for (i = 0; i < phba->max_vpi; i++)
5197 phba->vpi_ids[i] = i;
5198 }
5199 }
5200
9399627f 5201 /* Init HBQs */
ed957684
JS
5202 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
5203 rc = lpfc_sli_hbq_setup(phba);
5204 if (rc)
5205 goto lpfc_sli_hba_setup_error;
5206 }
04c68496 5207 spin_lock_irq(&phba->hbalock);
dea3101e 5208 phba->sli.sli_flag |= LPFC_PROCESS_LA;
04c68496 5209 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
5210
5211 rc = lpfc_config_port_post(phba);
5212 if (rc)
5213 goto lpfc_sli_hba_setup_error;
5214
ed957684
JS
5215 return rc;
5216
92d7f7b0 5217lpfc_sli_hba_setup_error:
2e0fef85 5218 phba->link_state = LPFC_HBA_ERROR;
e40a02c1 5219 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 5220 "0445 Firmware initialization failed\n");
dea3101e
JB
5221 return rc;
5222}
5223
e59058c4 5224/**
da0436e9
JS
5225 * lpfc_sli4_read_fcoe_params - Read fcoe params from conf region
5226 * @phba: Pointer to HBA context object.
5227 * @mboxq: mailbox pointer.
5228 * This function issue a dump mailbox command to read config region
5229 * 23 and parse the records in the region and populate driver
5230 * data structure.
e59058c4 5231 **/
da0436e9 5232static int
ff78d8f9 5233lpfc_sli4_read_fcoe_params(struct lpfc_hba *phba)
dea3101e 5234{
ff78d8f9 5235 LPFC_MBOXQ_t *mboxq;
da0436e9
JS
5236 struct lpfc_dmabuf *mp;
5237 struct lpfc_mqe *mqe;
5238 uint32_t data_length;
5239 int rc;
dea3101e 5240
da0436e9
JS
5241 /* Program the default value of vlan_id and fc_map */
5242 phba->valid_vlan = 0;
5243 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5244 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5245 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
2e0fef85 5246
ff78d8f9
JS
5247 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5248 if (!mboxq)
da0436e9
JS
5249 return -ENOMEM;
5250
ff78d8f9
JS
5251 mqe = &mboxq->u.mqe;
5252 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq)) {
5253 rc = -ENOMEM;
5254 goto out_free_mboxq;
5255 }
5256
3e1f0718 5257 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
5258 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5259
5260 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
5261 "(%d):2571 Mailbox cmd x%x Status x%x "
5262 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5263 "x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5264 "CQ: x%x x%x x%x x%x\n",
5265 mboxq->vport ? mboxq->vport->vpi : 0,
5266 bf_get(lpfc_mqe_command, mqe),
5267 bf_get(lpfc_mqe_status, mqe),
5268 mqe->un.mb_words[0], mqe->un.mb_words[1],
5269 mqe->un.mb_words[2], mqe->un.mb_words[3],
5270 mqe->un.mb_words[4], mqe->un.mb_words[5],
5271 mqe->un.mb_words[6], mqe->un.mb_words[7],
5272 mqe->un.mb_words[8], mqe->un.mb_words[9],
5273 mqe->un.mb_words[10], mqe->un.mb_words[11],
5274 mqe->un.mb_words[12], mqe->un.mb_words[13],
5275 mqe->un.mb_words[14], mqe->un.mb_words[15],
5276 mqe->un.mb_words[16], mqe->un.mb_words[50],
5277 mboxq->mcqe.word0,
5278 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
5279 mboxq->mcqe.trailer);
5280
5281 if (rc) {
5282 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5283 kfree(mp);
ff78d8f9
JS
5284 rc = -EIO;
5285 goto out_free_mboxq;
da0436e9
JS
5286 }
5287 data_length = mqe->un.mb_words[5];
a0c87cbd 5288 if (data_length > DMP_RGN23_SIZE) {
d11e31dd
JS
5289 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5290 kfree(mp);
ff78d8f9
JS
5291 rc = -EIO;
5292 goto out_free_mboxq;
d11e31dd 5293 }
dea3101e 5294
da0436e9
JS
5295 lpfc_parse_fcoe_conf(phba, mp->virt, data_length);
5296 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5297 kfree(mp);
ff78d8f9
JS
5298 rc = 0;
5299
5300out_free_mboxq:
5301 mempool_free(mboxq, phba->mbox_mem_pool);
5302 return rc;
da0436e9 5303}
e59058c4
JS
5304
5305/**
da0436e9
JS
5306 * lpfc_sli4_read_rev - Issue READ_REV and collect vpd data
5307 * @phba: pointer to lpfc hba data structure.
5308 * @mboxq: pointer to the LPFC_MBOXQ_t structure.
5309 * @vpd: pointer to the memory to hold resulting port vpd data.
5310 * @vpd_size: On input, the number of bytes allocated to @vpd.
5311 * On output, the number of data bytes in @vpd.
e59058c4 5312 *
da0436e9
JS
5313 * This routine executes a READ_REV SLI4 mailbox command. In
5314 * addition, this routine gets the port vpd data.
5315 *
5316 * Return codes
af901ca1 5317 * 0 - successful
d439d286 5318 * -ENOMEM - could not allocated memory.
e59058c4 5319 **/
da0436e9
JS
5320static int
5321lpfc_sli4_read_rev(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
5322 uint8_t *vpd, uint32_t *vpd_size)
dea3101e 5323{
da0436e9
JS
5324 int rc = 0;
5325 uint32_t dma_size;
5326 struct lpfc_dmabuf *dmabuf;
5327 struct lpfc_mqe *mqe;
dea3101e 5328
da0436e9
JS
5329 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
5330 if (!dmabuf)
5331 return -ENOMEM;
5332
5333 /*
5334 * Get a DMA buffer for the vpd data resulting from the READ_REV
5335 * mailbox command.
a257bf90 5336 */
da0436e9 5337 dma_size = *vpd_size;
750afb08
LC
5338 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, dma_size,
5339 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
5340 if (!dmabuf->virt) {
5341 kfree(dmabuf);
5342 return -ENOMEM;
a257bf90
JS
5343 }
5344
da0436e9
JS
5345 /*
5346 * The SLI4 implementation of READ_REV conflicts at word1,
5347 * bits 31:16 and SLI4 adds vpd functionality not present
5348 * in SLI3. This code corrects the conflicts.
1dcb58e5 5349 */
da0436e9
JS
5350 lpfc_read_rev(phba, mboxq);
5351 mqe = &mboxq->u.mqe;
5352 mqe->un.read_rev.vpd_paddr_high = putPaddrHigh(dmabuf->phys);
5353 mqe->un.read_rev.vpd_paddr_low = putPaddrLow(dmabuf->phys);
5354 mqe->un.read_rev.word1 &= 0x0000FFFF;
5355 bf_set(lpfc_mbx_rd_rev_vpd, &mqe->un.read_rev, 1);
5356 bf_set(lpfc_mbx_rd_rev_avail_len, &mqe->un.read_rev, dma_size);
5357
5358 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5359 if (rc) {
5360 dma_free_coherent(&phba->pcidev->dev, dma_size,
5361 dmabuf->virt, dmabuf->phys);
def9c7a9 5362 kfree(dmabuf);
da0436e9
JS
5363 return -EIO;
5364 }
1dcb58e5 5365
da0436e9
JS
5366 /*
5367 * The available vpd length cannot be bigger than the
5368 * DMA buffer passed to the port. Catch the less than
5369 * case and update the caller's size.
5370 */
5371 if (mqe->un.read_rev.avail_vpd_len < *vpd_size)
5372 *vpd_size = mqe->un.read_rev.avail_vpd_len;
3772a991 5373
d7c47992
JS
5374 memcpy(vpd, dmabuf->virt, *vpd_size);
5375
da0436e9
JS
5376 dma_free_coherent(&phba->pcidev->dev, dma_size,
5377 dmabuf->virt, dmabuf->phys);
5378 kfree(dmabuf);
5379 return 0;
dea3101e
JB
5380}
5381
cd1c8301 5382/**
b3b4f3e1 5383 * lpfc_sli4_get_ctl_attr - Retrieve SLI4 device controller attributes
cd1c8301
JS
5384 * @phba: pointer to lpfc hba data structure.
5385 *
5386 * This routine retrieves SLI4 device physical port name this PCI function
5387 * is attached to.
5388 *
5389 * Return codes
4907cb7b 5390 * 0 - successful
b3b4f3e1 5391 * otherwise - failed to retrieve controller attributes
cd1c8301
JS
5392 **/
5393static int
b3b4f3e1 5394lpfc_sli4_get_ctl_attr(struct lpfc_hba *phba)
cd1c8301
JS
5395{
5396 LPFC_MBOXQ_t *mboxq;
cd1c8301
JS
5397 struct lpfc_mbx_get_cntl_attributes *mbx_cntl_attr;
5398 struct lpfc_controller_attribute *cntl_attr;
cd1c8301
JS
5399 void *virtaddr = NULL;
5400 uint32_t alloclen, reqlen;
5401 uint32_t shdr_status, shdr_add_status;
5402 union lpfc_sli4_cfg_shdr *shdr;
cd1c8301
JS
5403 int rc;
5404
cd1c8301
JS
5405 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5406 if (!mboxq)
5407 return -ENOMEM;
cd1c8301 5408
b3b4f3e1 5409 /* Send COMMON_GET_CNTL_ATTRIBUTES mbox cmd */
cd1c8301
JS
5410 reqlen = sizeof(struct lpfc_mbx_get_cntl_attributes);
5411 alloclen = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5412 LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES, reqlen,
5413 LPFC_SLI4_MBX_NEMBED);
b3b4f3e1 5414
cd1c8301
JS
5415 if (alloclen < reqlen) {
5416 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5417 "3084 Allocated DMA memory size (%d) is "
5418 "less than the requested DMA memory size "
5419 "(%d)\n", alloclen, reqlen);
5420 rc = -ENOMEM;
5421 goto out_free_mboxq;
5422 }
5423 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5424 virtaddr = mboxq->sge_array->addr[0];
5425 mbx_cntl_attr = (struct lpfc_mbx_get_cntl_attributes *)virtaddr;
5426 shdr = &mbx_cntl_attr->cfg_shdr;
5427 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5428 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5429 if (shdr_status || shdr_add_status || rc) {
5430 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5431 "3085 Mailbox x%x (x%x/x%x) failed, "
5432 "rc:x%x, status:x%x, add_status:x%x\n",
5433 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5434 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5435 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5436 rc, shdr_status, shdr_add_status);
5437 rc = -ENXIO;
5438 goto out_free_mboxq;
5439 }
b3b4f3e1 5440
cd1c8301
JS
5441 cntl_attr = &mbx_cntl_attr->cntl_attr;
5442 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
5443 phba->sli4_hba.lnk_info.lnk_tp =
5444 bf_get(lpfc_cntl_attr_lnk_type, cntl_attr);
5445 phba->sli4_hba.lnk_info.lnk_no =
5446 bf_get(lpfc_cntl_attr_lnk_numb, cntl_attr);
b3b4f3e1
JS
5447
5448 memset(phba->BIOSVersion, 0, sizeof(phba->BIOSVersion));
5449 strlcat(phba->BIOSVersion, (char *)cntl_attr->bios_ver_str,
5450 sizeof(phba->BIOSVersion));
5451
cd1c8301 5452 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
b3b4f3e1 5453 "3086 lnk_type:%d, lnk_numb:%d, bios_ver:%s\n",
cd1c8301 5454 phba->sli4_hba.lnk_info.lnk_tp,
b3b4f3e1
JS
5455 phba->sli4_hba.lnk_info.lnk_no,
5456 phba->BIOSVersion);
5457out_free_mboxq:
5458 if (rc != MBX_TIMEOUT) {
5459 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5460 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5461 else
5462 mempool_free(mboxq, phba->mbox_mem_pool);
5463 }
5464 return rc;
5465}
5466
5467/**
5468 * lpfc_sli4_retrieve_pport_name - Retrieve SLI4 device physical port name
5469 * @phba: pointer to lpfc hba data structure.
5470 *
5471 * This routine retrieves SLI4 device physical port name this PCI function
5472 * is attached to.
5473 *
5474 * Return codes
5475 * 0 - successful
5476 * otherwise - failed to retrieve physical port name
5477 **/
5478static int
5479lpfc_sli4_retrieve_pport_name(struct lpfc_hba *phba)
5480{
5481 LPFC_MBOXQ_t *mboxq;
5482 struct lpfc_mbx_get_port_name *get_port_name;
5483 uint32_t shdr_status, shdr_add_status;
5484 union lpfc_sli4_cfg_shdr *shdr;
5485 char cport_name = 0;
5486 int rc;
5487
5488 /* We assume nothing at this point */
5489 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5490 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_NON;
5491
5492 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5493 if (!mboxq)
5494 return -ENOMEM;
5495 /* obtain link type and link number via READ_CONFIG */
5496 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5497 lpfc_sli4_read_config(phba);
5498 if (phba->sli4_hba.lnk_info.lnk_dv == LPFC_LNK_DAT_VAL)
5499 goto retrieve_ppname;
5500
5501 /* obtain link type and link number via COMMON_GET_CNTL_ATTRIBUTES */
5502 rc = lpfc_sli4_get_ctl_attr(phba);
5503 if (rc)
5504 goto out_free_mboxq;
cd1c8301
JS
5505
5506retrieve_ppname:
5507 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5508 LPFC_MBOX_OPCODE_GET_PORT_NAME,
5509 sizeof(struct lpfc_mbx_get_port_name) -
5510 sizeof(struct lpfc_sli4_cfg_mhdr),
5511 LPFC_SLI4_MBX_EMBED);
5512 get_port_name = &mboxq->u.mqe.un.get_port_name;
5513 shdr = (union lpfc_sli4_cfg_shdr *)&get_port_name->header.cfg_shdr;
5514 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_OPCODE_VERSION_1);
5515 bf_set(lpfc_mbx_get_port_name_lnk_type, &get_port_name->u.request,
5516 phba->sli4_hba.lnk_info.lnk_tp);
5517 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5518 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5519 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5520 if (shdr_status || shdr_add_status || rc) {
5521 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5522 "3087 Mailbox x%x (x%x/x%x) failed: "
5523 "rc:x%x, status:x%x, add_status:x%x\n",
5524 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5525 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5526 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5527 rc, shdr_status, shdr_add_status);
5528 rc = -ENXIO;
5529 goto out_free_mboxq;
5530 }
5531 switch (phba->sli4_hba.lnk_info.lnk_no) {
5532 case LPFC_LINK_NUMBER_0:
5533 cport_name = bf_get(lpfc_mbx_get_port_name_name0,
5534 &get_port_name->u.response);
5535 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5536 break;
5537 case LPFC_LINK_NUMBER_1:
5538 cport_name = bf_get(lpfc_mbx_get_port_name_name1,
5539 &get_port_name->u.response);
5540 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5541 break;
5542 case LPFC_LINK_NUMBER_2:
5543 cport_name = bf_get(lpfc_mbx_get_port_name_name2,
5544 &get_port_name->u.response);
5545 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5546 break;
5547 case LPFC_LINK_NUMBER_3:
5548 cport_name = bf_get(lpfc_mbx_get_port_name_name3,
5549 &get_port_name->u.response);
5550 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5551 break;
5552 default:
5553 break;
5554 }
5555
5556 if (phba->sli4_hba.pport_name_sta == LPFC_SLI4_PPNAME_GET) {
5557 phba->Port[0] = cport_name;
5558 phba->Port[1] = '\0';
5559 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5560 "3091 SLI get port name: %s\n", phba->Port);
5561 }
5562
5563out_free_mboxq:
5564 if (rc != MBX_TIMEOUT) {
5565 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5566 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5567 else
5568 mempool_free(mboxq, phba->mbox_mem_pool);
5569 }
5570 return rc;
5571}
5572
e59058c4 5573/**
da0436e9
JS
5574 * lpfc_sli4_arm_cqeq_intr - Arm sli-4 device completion and event queues
5575 * @phba: pointer to lpfc hba data structure.
e59058c4 5576 *
da0436e9
JS
5577 * This routine is called to explicitly arm the SLI4 device's completion and
5578 * event queues
5579 **/
5580static void
5581lpfc_sli4_arm_cqeq_intr(struct lpfc_hba *phba)
5582{
895427bd 5583 int qidx;
b71413dd 5584 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
cdb42bec 5585 struct lpfc_sli4_hdw_queue *qp;
657add4e 5586 struct lpfc_queue *eq;
da0436e9 5587
32517fc0
JS
5588 sli4_hba->sli4_write_cq_db(phba, sli4_hba->mbx_cq, 0, LPFC_QUEUE_REARM);
5589 sli4_hba->sli4_write_cq_db(phba, sli4_hba->els_cq, 0, LPFC_QUEUE_REARM);
b71413dd 5590 if (sli4_hba->nvmels_cq)
32517fc0
JS
5591 sli4_hba->sli4_write_cq_db(phba, sli4_hba->nvmels_cq, 0,
5592 LPFC_QUEUE_REARM);
1ba981fd 5593
cdb42bec 5594 if (sli4_hba->hdwq) {
657add4e 5595 /* Loop thru all Hardware Queues */
cdb42bec 5596 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
657add4e
JS
5597 qp = &sli4_hba->hdwq[qidx];
5598 /* ARM the corresponding CQ */
5599 sli4_hba->sli4_write_cq_db(phba, qp->fcp_cq, 0,
32517fc0 5600 LPFC_QUEUE_REARM);
657add4e 5601 sli4_hba->sli4_write_cq_db(phba, qp->nvme_cq, 0,
32517fc0 5602 LPFC_QUEUE_REARM);
cdb42bec 5603 }
1ba981fd 5604
657add4e
JS
5605 /* Loop thru all IRQ vectors */
5606 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
5607 eq = sli4_hba->hba_eq_hdl[qidx].eq;
5608 /* ARM the corresponding EQ */
5609 sli4_hba->sli4_write_eq_db(phba, eq,
5610 0, LPFC_QUEUE_REARM);
5611 }
cdb42bec 5612 }
1ba981fd 5613
2d7dbc4c
JS
5614 if (phba->nvmet_support) {
5615 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) {
32517fc0
JS
5616 sli4_hba->sli4_write_cq_db(phba,
5617 sli4_hba->nvmet_cqset[qidx], 0,
2d7dbc4c
JS
5618 LPFC_QUEUE_REARM);
5619 }
2e90f4b5 5620 }
da0436e9
JS
5621}
5622
6d368e53
JS
5623/**
5624 * lpfc_sli4_get_avail_extnt_rsrc - Get available resource extent count.
5625 * @phba: Pointer to HBA context object.
5626 * @type: The resource extent type.
b76f2dc9
JS
5627 * @extnt_count: buffer to hold port available extent count.
5628 * @extnt_size: buffer to hold element count per extent.
6d368e53 5629 *
b76f2dc9
JS
5630 * This function calls the port and retrievs the number of available
5631 * extents and their size for a particular extent type.
5632 *
5633 * Returns: 0 if successful. Nonzero otherwise.
6d368e53 5634 **/
b76f2dc9 5635int
6d368e53
JS
5636lpfc_sli4_get_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type,
5637 uint16_t *extnt_count, uint16_t *extnt_size)
5638{
5639 int rc = 0;
5640 uint32_t length;
5641 uint32_t mbox_tmo;
5642 struct lpfc_mbx_get_rsrc_extent_info *rsrc_info;
5643 LPFC_MBOXQ_t *mbox;
5644
5645 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5646 if (!mbox)
5647 return -ENOMEM;
5648
5649 /* Find out how many extents are available for this resource type */
5650 length = (sizeof(struct lpfc_mbx_get_rsrc_extent_info) -
5651 sizeof(struct lpfc_sli4_cfg_mhdr));
5652 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5653 LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO,
5654 length, LPFC_SLI4_MBX_EMBED);
5655
5656 /* Send an extents count of 0 - the GET doesn't use it. */
5657 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
5658 LPFC_SLI4_MBX_EMBED);
5659 if (unlikely(rc)) {
5660 rc = -EIO;
5661 goto err_exit;
5662 }
5663
5664 if (!phba->sli4_hba.intr_enable)
5665 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5666 else {
a183a15f 5667 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5668 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5669 }
5670 if (unlikely(rc)) {
5671 rc = -EIO;
5672 goto err_exit;
5673 }
5674
5675 rsrc_info = &mbox->u.mqe.un.rsrc_extent_info;
5676 if (bf_get(lpfc_mbox_hdr_status,
5677 &rsrc_info->header.cfg_shdr.response)) {
5678 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5679 "2930 Failed to get resource extents "
5680 "Status 0x%x Add'l Status 0x%x\n",
5681 bf_get(lpfc_mbox_hdr_status,
5682 &rsrc_info->header.cfg_shdr.response),
5683 bf_get(lpfc_mbox_hdr_add_status,
5684 &rsrc_info->header.cfg_shdr.response));
5685 rc = -EIO;
5686 goto err_exit;
5687 }
5688
5689 *extnt_count = bf_get(lpfc_mbx_get_rsrc_extent_info_cnt,
5690 &rsrc_info->u.rsp);
5691 *extnt_size = bf_get(lpfc_mbx_get_rsrc_extent_info_size,
5692 &rsrc_info->u.rsp);
8a9d2e80
JS
5693
5694 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5695 "3162 Retrieved extents type-%d from port: count:%d, "
5696 "size:%d\n", type, *extnt_count, *extnt_size);
5697
5698err_exit:
6d368e53
JS
5699 mempool_free(mbox, phba->mbox_mem_pool);
5700 return rc;
5701}
5702
5703/**
5704 * lpfc_sli4_chk_avail_extnt_rsrc - Check for available SLI4 resource extents.
5705 * @phba: Pointer to HBA context object.
5706 * @type: The extent type to check.
5707 *
5708 * This function reads the current available extents from the port and checks
5709 * if the extent count or extent size has changed since the last access.
5710 * Callers use this routine post port reset to understand if there is a
5711 * extent reprovisioning requirement.
5712 *
5713 * Returns:
5714 * -Error: error indicates problem.
5715 * 1: Extent count or size has changed.
5716 * 0: No changes.
5717 **/
5718static int
5719lpfc_sli4_chk_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type)
5720{
5721 uint16_t curr_ext_cnt, rsrc_ext_cnt;
5722 uint16_t size_diff, rsrc_ext_size;
5723 int rc = 0;
5724 struct lpfc_rsrc_blks *rsrc_entry;
5725 struct list_head *rsrc_blk_list = NULL;
5726
5727 size_diff = 0;
5728 curr_ext_cnt = 0;
5729 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5730 &rsrc_ext_cnt,
5731 &rsrc_ext_size);
5732 if (unlikely(rc))
5733 return -EIO;
5734
5735 switch (type) {
5736 case LPFC_RSC_TYPE_FCOE_RPI:
5737 rsrc_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5738 break;
5739 case LPFC_RSC_TYPE_FCOE_VPI:
5740 rsrc_blk_list = &phba->lpfc_vpi_blk_list;
5741 break;
5742 case LPFC_RSC_TYPE_FCOE_XRI:
5743 rsrc_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5744 break;
5745 case LPFC_RSC_TYPE_FCOE_VFI:
5746 rsrc_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5747 break;
5748 default:
5749 break;
5750 }
5751
5752 list_for_each_entry(rsrc_entry, rsrc_blk_list, list) {
5753 curr_ext_cnt++;
5754 if (rsrc_entry->rsrc_size != rsrc_ext_size)
5755 size_diff++;
5756 }
5757
5758 if (curr_ext_cnt != rsrc_ext_cnt || size_diff != 0)
5759 rc = 1;
5760
5761 return rc;
5762}
5763
5764/**
5765 * lpfc_sli4_cfg_post_extnts -
5766 * @phba: Pointer to HBA context object.
5767 * @extnt_cnt - number of available extents.
5768 * @type - the extent type (rpi, xri, vfi, vpi).
5769 * @emb - buffer to hold either MBX_EMBED or MBX_NEMBED operation.
5770 * @mbox - pointer to the caller's allocated mailbox structure.
5771 *
5772 * This function executes the extents allocation request. It also
5773 * takes care of the amount of memory needed to allocate or get the
5774 * allocated extents. It is the caller's responsibility to evaluate
5775 * the response.
5776 *
5777 * Returns:
5778 * -Error: Error value describes the condition found.
5779 * 0: if successful
5780 **/
5781static int
8a9d2e80 5782lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t extnt_cnt,
6d368e53
JS
5783 uint16_t type, bool *emb, LPFC_MBOXQ_t *mbox)
5784{
5785 int rc = 0;
5786 uint32_t req_len;
5787 uint32_t emb_len;
5788 uint32_t alloc_len, mbox_tmo;
5789
5790 /* Calculate the total requested length of the dma memory */
8a9d2e80 5791 req_len = extnt_cnt * sizeof(uint16_t);
6d368e53
JS
5792
5793 /*
5794 * Calculate the size of an embedded mailbox. The uint32_t
5795 * accounts for extents-specific word.
5796 */
5797 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
5798 sizeof(uint32_t);
5799
5800 /*
5801 * Presume the allocation and response will fit into an embedded
5802 * mailbox. If not true, reconfigure to a non-embedded mailbox.
5803 */
5804 *emb = LPFC_SLI4_MBX_EMBED;
5805 if (req_len > emb_len) {
8a9d2e80 5806 req_len = extnt_cnt * sizeof(uint16_t) +
6d368e53
JS
5807 sizeof(union lpfc_sli4_cfg_shdr) +
5808 sizeof(uint32_t);
5809 *emb = LPFC_SLI4_MBX_NEMBED;
5810 }
5811
5812 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5813 LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT,
5814 req_len, *emb);
5815 if (alloc_len < req_len) {
5816 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
b76f2dc9 5817 "2982 Allocated DMA memory size (x%x) is "
6d368e53
JS
5818 "less than the requested DMA memory "
5819 "size (x%x)\n", alloc_len, req_len);
5820 return -ENOMEM;
5821 }
8a9d2e80 5822 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, extnt_cnt, type, *emb);
6d368e53
JS
5823 if (unlikely(rc))
5824 return -EIO;
5825
5826 if (!phba->sli4_hba.intr_enable)
5827 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5828 else {
a183a15f 5829 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5830 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5831 }
5832
5833 if (unlikely(rc))
5834 rc = -EIO;
5835 return rc;
5836}
5837
5838/**
5839 * lpfc_sli4_alloc_extent - Allocate an SLI4 resource extent.
5840 * @phba: Pointer to HBA context object.
5841 * @type: The resource extent type to allocate.
5842 *
5843 * This function allocates the number of elements for the specified
5844 * resource type.
5845 **/
5846static int
5847lpfc_sli4_alloc_extent(struct lpfc_hba *phba, uint16_t type)
5848{
5849 bool emb = false;
5850 uint16_t rsrc_id_cnt, rsrc_cnt, rsrc_size;
5851 uint16_t rsrc_id, rsrc_start, j, k;
5852 uint16_t *ids;
5853 int i, rc;
5854 unsigned long longs;
5855 unsigned long *bmask;
5856 struct lpfc_rsrc_blks *rsrc_blks;
5857 LPFC_MBOXQ_t *mbox;
5858 uint32_t length;
5859 struct lpfc_id_range *id_array = NULL;
5860 void *virtaddr = NULL;
5861 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
5862 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
5863 struct list_head *ext_blk_list;
5864
5865 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5866 &rsrc_cnt,
5867 &rsrc_size);
5868 if (unlikely(rc))
5869 return -EIO;
5870
5871 if ((rsrc_cnt == 0) || (rsrc_size == 0)) {
5872 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5873 "3009 No available Resource Extents "
5874 "for resource type 0x%x: Count: 0x%x, "
5875 "Size 0x%x\n", type, rsrc_cnt,
5876 rsrc_size);
5877 return -ENOMEM;
5878 }
5879
8a9d2e80
JS
5880 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_INIT | LOG_SLI,
5881 "2903 Post resource extents type-0x%x: "
5882 "count:%d, size %d\n", type, rsrc_cnt, rsrc_size);
6d368e53
JS
5883
5884 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5885 if (!mbox)
5886 return -ENOMEM;
5887
8a9d2e80 5888 rc = lpfc_sli4_cfg_post_extnts(phba, rsrc_cnt, type, &emb, mbox);
6d368e53
JS
5889 if (unlikely(rc)) {
5890 rc = -EIO;
5891 goto err_exit;
5892 }
5893
5894 /*
5895 * Figure out where the response is located. Then get local pointers
5896 * to the response data. The port does not guarantee to respond to
5897 * all extents counts request so update the local variable with the
5898 * allocated count from the port.
5899 */
5900 if (emb == LPFC_SLI4_MBX_EMBED) {
5901 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
5902 id_array = &rsrc_ext->u.rsp.id[0];
5903 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
5904 } else {
5905 virtaddr = mbox->sge_array->addr[0];
5906 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
5907 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
5908 id_array = &n_rsrc->id;
5909 }
5910
5911 longs = ((rsrc_cnt * rsrc_size) + BITS_PER_LONG - 1) / BITS_PER_LONG;
5912 rsrc_id_cnt = rsrc_cnt * rsrc_size;
5913
5914 /*
5915 * Based on the resource size and count, correct the base and max
5916 * resource values.
5917 */
5918 length = sizeof(struct lpfc_rsrc_blks);
5919 switch (type) {
5920 case LPFC_RSC_TYPE_FCOE_RPI:
6396bb22 5921 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
5922 sizeof(unsigned long),
5923 GFP_KERNEL);
5924 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
5925 rc = -ENOMEM;
5926 goto err_exit;
5927 }
6396bb22 5928 phba->sli4_hba.rpi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5929 sizeof(uint16_t),
5930 GFP_KERNEL);
5931 if (unlikely(!phba->sli4_hba.rpi_ids)) {
5932 kfree(phba->sli4_hba.rpi_bmask);
5933 rc = -ENOMEM;
5934 goto err_exit;
5935 }
5936
5937 /*
5938 * The next_rpi was initialized with the maximum available
5939 * count but the port may allocate a smaller number. Catch
5940 * that case and update the next_rpi.
5941 */
5942 phba->sli4_hba.next_rpi = rsrc_id_cnt;
5943
5944 /* Initialize local ptrs for common extent processing later. */
5945 bmask = phba->sli4_hba.rpi_bmask;
5946 ids = phba->sli4_hba.rpi_ids;
5947 ext_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5948 break;
5949 case LPFC_RSC_TYPE_FCOE_VPI:
6396bb22 5950 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
5951 GFP_KERNEL);
5952 if (unlikely(!phba->vpi_bmask)) {
5953 rc = -ENOMEM;
5954 goto err_exit;
5955 }
6396bb22 5956 phba->vpi_ids = kcalloc(rsrc_id_cnt, sizeof(uint16_t),
6d368e53
JS
5957 GFP_KERNEL);
5958 if (unlikely(!phba->vpi_ids)) {
5959 kfree(phba->vpi_bmask);
5960 rc = -ENOMEM;
5961 goto err_exit;
5962 }
5963
5964 /* Initialize local ptrs for common extent processing later. */
5965 bmask = phba->vpi_bmask;
5966 ids = phba->vpi_ids;
5967 ext_blk_list = &phba->lpfc_vpi_blk_list;
5968 break;
5969 case LPFC_RSC_TYPE_FCOE_XRI:
6396bb22 5970 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
5971 sizeof(unsigned long),
5972 GFP_KERNEL);
5973 if (unlikely(!phba->sli4_hba.xri_bmask)) {
5974 rc = -ENOMEM;
5975 goto err_exit;
5976 }
8a9d2e80 5977 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 5978 phba->sli4_hba.xri_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5979 sizeof(uint16_t),
5980 GFP_KERNEL);
5981 if (unlikely(!phba->sli4_hba.xri_ids)) {
5982 kfree(phba->sli4_hba.xri_bmask);
5983 rc = -ENOMEM;
5984 goto err_exit;
5985 }
5986
5987 /* Initialize local ptrs for common extent processing later. */
5988 bmask = phba->sli4_hba.xri_bmask;
5989 ids = phba->sli4_hba.xri_ids;
5990 ext_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5991 break;
5992 case LPFC_RSC_TYPE_FCOE_VFI:
6396bb22 5993 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
5994 sizeof(unsigned long),
5995 GFP_KERNEL);
5996 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
5997 rc = -ENOMEM;
5998 goto err_exit;
5999 }
6396bb22 6000 phba->sli4_hba.vfi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
6001 sizeof(uint16_t),
6002 GFP_KERNEL);
6003 if (unlikely(!phba->sli4_hba.vfi_ids)) {
6004 kfree(phba->sli4_hba.vfi_bmask);
6005 rc = -ENOMEM;
6006 goto err_exit;
6007 }
6008
6009 /* Initialize local ptrs for common extent processing later. */
6010 bmask = phba->sli4_hba.vfi_bmask;
6011 ids = phba->sli4_hba.vfi_ids;
6012 ext_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
6013 break;
6014 default:
6015 /* Unsupported Opcode. Fail call. */
6016 id_array = NULL;
6017 bmask = NULL;
6018 ids = NULL;
6019 ext_blk_list = NULL;
6020 goto err_exit;
6021 }
6022
6023 /*
6024 * Complete initializing the extent configuration with the
6025 * allocated ids assigned to this function. The bitmask serves
6026 * as an index into the array and manages the available ids. The
6027 * array just stores the ids communicated to the port via the wqes.
6028 */
6029 for (i = 0, j = 0, k = 0; i < rsrc_cnt; i++) {
6030 if ((i % 2) == 0)
6031 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_0,
6032 &id_array[k]);
6033 else
6034 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_1,
6035 &id_array[k]);
6036
6037 rsrc_blks = kzalloc(length, GFP_KERNEL);
6038 if (unlikely(!rsrc_blks)) {
6039 rc = -ENOMEM;
6040 kfree(bmask);
6041 kfree(ids);
6042 goto err_exit;
6043 }
6044 rsrc_blks->rsrc_start = rsrc_id;
6045 rsrc_blks->rsrc_size = rsrc_size;
6046 list_add_tail(&rsrc_blks->list, ext_blk_list);
6047 rsrc_start = rsrc_id;
895427bd 6048 if ((type == LPFC_RSC_TYPE_FCOE_XRI) && (j == 0)) {
5e5b511d 6049 phba->sli4_hba.io_xri_start = rsrc_start +
895427bd 6050 lpfc_sli4_get_iocb_cnt(phba);
895427bd 6051 }
6d368e53
JS
6052
6053 while (rsrc_id < (rsrc_start + rsrc_size)) {
6054 ids[j] = rsrc_id;
6055 rsrc_id++;
6056 j++;
6057 }
6058 /* Entire word processed. Get next word.*/
6059 if ((i % 2) == 1)
6060 k++;
6061 }
6062 err_exit:
6063 lpfc_sli4_mbox_cmd_free(phba, mbox);
6064 return rc;
6065}
6066
895427bd
JS
6067
6068
6d368e53
JS
6069/**
6070 * lpfc_sli4_dealloc_extent - Deallocate an SLI4 resource extent.
6071 * @phba: Pointer to HBA context object.
6072 * @type: the extent's type.
6073 *
6074 * This function deallocates all extents of a particular resource type.
6075 * SLI4 does not allow for deallocating a particular extent range. It
6076 * is the caller's responsibility to release all kernel memory resources.
6077 **/
6078static int
6079lpfc_sli4_dealloc_extent(struct lpfc_hba *phba, uint16_t type)
6080{
6081 int rc;
6082 uint32_t length, mbox_tmo = 0;
6083 LPFC_MBOXQ_t *mbox;
6084 struct lpfc_mbx_dealloc_rsrc_extents *dealloc_rsrc;
6085 struct lpfc_rsrc_blks *rsrc_blk, *rsrc_blk_next;
6086
6087 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6088 if (!mbox)
6089 return -ENOMEM;
6090
6091 /*
6092 * This function sends an embedded mailbox because it only sends the
6093 * the resource type. All extents of this type are released by the
6094 * port.
6095 */
6096 length = (sizeof(struct lpfc_mbx_dealloc_rsrc_extents) -
6097 sizeof(struct lpfc_sli4_cfg_mhdr));
6098 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6099 LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT,
6100 length, LPFC_SLI4_MBX_EMBED);
6101
6102 /* Send an extents count of 0 - the dealloc doesn't use it. */
6103 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
6104 LPFC_SLI4_MBX_EMBED);
6105 if (unlikely(rc)) {
6106 rc = -EIO;
6107 goto out_free_mbox;
6108 }
6109 if (!phba->sli4_hba.intr_enable)
6110 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6111 else {
a183a15f 6112 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
6113 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6114 }
6115 if (unlikely(rc)) {
6116 rc = -EIO;
6117 goto out_free_mbox;
6118 }
6119
6120 dealloc_rsrc = &mbox->u.mqe.un.dealloc_rsrc_extents;
6121 if (bf_get(lpfc_mbox_hdr_status,
6122 &dealloc_rsrc->header.cfg_shdr.response)) {
6123 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6124 "2919 Failed to release resource extents "
6125 "for type %d - Status 0x%x Add'l Status 0x%x. "
6126 "Resource memory not released.\n",
6127 type,
6128 bf_get(lpfc_mbox_hdr_status,
6129 &dealloc_rsrc->header.cfg_shdr.response),
6130 bf_get(lpfc_mbox_hdr_add_status,
6131 &dealloc_rsrc->header.cfg_shdr.response));
6132 rc = -EIO;
6133 goto out_free_mbox;
6134 }
6135
6136 /* Release kernel memory resources for the specific type. */
6137 switch (type) {
6138 case LPFC_RSC_TYPE_FCOE_VPI:
6139 kfree(phba->vpi_bmask);
6140 kfree(phba->vpi_ids);
6141 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6142 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6143 &phba->lpfc_vpi_blk_list, list) {
6144 list_del_init(&rsrc_blk->list);
6145 kfree(rsrc_blk);
6146 }
16a3a208 6147 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6148 break;
6149 case LPFC_RSC_TYPE_FCOE_XRI:
6150 kfree(phba->sli4_hba.xri_bmask);
6151 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6152 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6153 &phba->sli4_hba.lpfc_xri_blk_list, list) {
6154 list_del_init(&rsrc_blk->list);
6155 kfree(rsrc_blk);
6156 }
6157 break;
6158 case LPFC_RSC_TYPE_FCOE_VFI:
6159 kfree(phba->sli4_hba.vfi_bmask);
6160 kfree(phba->sli4_hba.vfi_ids);
6161 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6162 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6163 &phba->sli4_hba.lpfc_vfi_blk_list, list) {
6164 list_del_init(&rsrc_blk->list);
6165 kfree(rsrc_blk);
6166 }
6167 break;
6168 case LPFC_RSC_TYPE_FCOE_RPI:
6169 /* RPI bitmask and physical id array are cleaned up earlier. */
6170 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6171 &phba->sli4_hba.lpfc_rpi_blk_list, list) {
6172 list_del_init(&rsrc_blk->list);
6173 kfree(rsrc_blk);
6174 }
6175 break;
6176 default:
6177 break;
6178 }
6179
6180 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6181
6182 out_free_mbox:
6183 mempool_free(mbox, phba->mbox_mem_pool);
6184 return rc;
6185}
6186
bd4b3e5c 6187static void
7bdedb34
JS
6188lpfc_set_features(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox,
6189 uint32_t feature)
65791f1f 6190{
65791f1f 6191 uint32_t len;
65791f1f 6192
65791f1f
JS
6193 len = sizeof(struct lpfc_mbx_set_feature) -
6194 sizeof(struct lpfc_sli4_cfg_mhdr);
6195 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6196 LPFC_MBOX_OPCODE_SET_FEATURES, len,
6197 LPFC_SLI4_MBX_EMBED);
7bdedb34
JS
6198
6199 switch (feature) {
6200 case LPFC_SET_UE_RECOVERY:
6201 bf_set(lpfc_mbx_set_feature_UER,
6202 &mbox->u.mqe.un.set_feature, 1);
6203 mbox->u.mqe.un.set_feature.feature = LPFC_SET_UE_RECOVERY;
6204 mbox->u.mqe.un.set_feature.param_len = 8;
6205 break;
6206 case LPFC_SET_MDS_DIAGS:
6207 bf_set(lpfc_mbx_set_feature_mds,
6208 &mbox->u.mqe.un.set_feature, 1);
6209 bf_set(lpfc_mbx_set_feature_mds_deep_loopbk,
ae9e28f3 6210 &mbox->u.mqe.un.set_feature, 1);
7bdedb34
JS
6211 mbox->u.mqe.un.set_feature.feature = LPFC_SET_MDS_DIAGS;
6212 mbox->u.mqe.un.set_feature.param_len = 8;
6213 break;
65791f1f 6214 }
7bdedb34
JS
6215
6216 return;
65791f1f
JS
6217}
6218
1165a5c2
JS
6219/**
6220 * lpfc_ras_stop_fwlog: Disable FW logging by the adapter
6221 * @phba: Pointer to HBA context object.
6222 *
6223 * Disable FW logging into host memory on the adapter. To
6224 * be done before reading logs from the host memory.
6225 **/
6226void
6227lpfc_ras_stop_fwlog(struct lpfc_hba *phba)
6228{
6229 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6230
6231 ras_fwlog->ras_active = false;
6232
6233 /* Disable FW logging to host memory */
6234 writel(LPFC_CTL_PDEV_CTL_DDL_RAS,
6235 phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PDEV_CTL_OFFSET);
6236}
6237
d2cc9bcd
JS
6238/**
6239 * lpfc_sli4_ras_dma_free - Free memory allocated for FW logging.
6240 * @phba: Pointer to HBA context object.
6241 *
6242 * This function is called to free memory allocated for RAS FW logging
6243 * support in the driver.
6244 **/
6245void
6246lpfc_sli4_ras_dma_free(struct lpfc_hba *phba)
6247{
6248 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6249 struct lpfc_dmabuf *dmabuf, *next;
6250
6251 if (!list_empty(&ras_fwlog->fwlog_buff_list)) {
6252 list_for_each_entry_safe(dmabuf, next,
6253 &ras_fwlog->fwlog_buff_list,
6254 list) {
6255 list_del(&dmabuf->list);
6256 dma_free_coherent(&phba->pcidev->dev,
6257 LPFC_RAS_MAX_ENTRY_SIZE,
6258 dmabuf->virt, dmabuf->phys);
6259 kfree(dmabuf);
6260 }
6261 }
6262
6263 if (ras_fwlog->lwpd.virt) {
6264 dma_free_coherent(&phba->pcidev->dev,
6265 sizeof(uint32_t) * 2,
6266 ras_fwlog->lwpd.virt,
6267 ras_fwlog->lwpd.phys);
6268 ras_fwlog->lwpd.virt = NULL;
6269 }
6270
6271 ras_fwlog->ras_active = false;
6272}
6273
6274/**
6275 * lpfc_sli4_ras_dma_alloc: Allocate memory for FW support
6276 * @phba: Pointer to HBA context object.
6277 * @fwlog_buff_count: Count of buffers to be created.
6278 *
6279 * This routine DMA memory for Log Write Position Data[LPWD] and buffer
6280 * to update FW log is posted to the adapter.
6281 * Buffer count is calculated based on module param ras_fwlog_buffsize
6282 * Size of each buffer posted to FW is 64K.
6283 **/
6284
6285static int
6286lpfc_sli4_ras_dma_alloc(struct lpfc_hba *phba,
6287 uint32_t fwlog_buff_count)
6288{
6289 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6290 struct lpfc_dmabuf *dmabuf;
6291 int rc = 0, i = 0;
6292
6293 /* Initialize List */
6294 INIT_LIST_HEAD(&ras_fwlog->fwlog_buff_list);
6295
6296 /* Allocate memory for the LWPD */
6297 ras_fwlog->lwpd.virt = dma_alloc_coherent(&phba->pcidev->dev,
6298 sizeof(uint32_t) * 2,
6299 &ras_fwlog->lwpd.phys,
6300 GFP_KERNEL);
6301 if (!ras_fwlog->lwpd.virt) {
cb34990b 6302 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d2cc9bcd
JS
6303 "6185 LWPD Memory Alloc Failed\n");
6304
6305 return -ENOMEM;
6306 }
6307
6308 ras_fwlog->fw_buffcount = fwlog_buff_count;
6309 for (i = 0; i < ras_fwlog->fw_buffcount; i++) {
6310 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
6311 GFP_KERNEL);
6312 if (!dmabuf) {
6313 rc = -ENOMEM;
6314 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6315 "6186 Memory Alloc failed FW logging");
6316 goto free_mem;
6317 }
6318
750afb08 6319 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
d2cc9bcd 6320 LPFC_RAS_MAX_ENTRY_SIZE,
750afb08 6321 &dmabuf->phys, GFP_KERNEL);
d2cc9bcd
JS
6322 if (!dmabuf->virt) {
6323 kfree(dmabuf);
6324 rc = -ENOMEM;
6325 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6326 "6187 DMA Alloc Failed FW logging");
6327 goto free_mem;
6328 }
d2cc9bcd
JS
6329 dmabuf->buffer_tag = i;
6330 list_add_tail(&dmabuf->list, &ras_fwlog->fwlog_buff_list);
6331 }
6332
6333free_mem:
6334 if (rc)
6335 lpfc_sli4_ras_dma_free(phba);
6336
6337 return rc;
6338}
6339
6340/**
6341 * lpfc_sli4_ras_mbox_cmpl: Completion handler for RAS MBX command
6342 * @phba: pointer to lpfc hba data structure.
6343 * @pmboxq: pointer to the driver internal queue element for mailbox command.
6344 *
6345 * Completion handler for driver's RAS MBX command to the device.
6346 **/
6347static void
6348lpfc_sli4_ras_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
6349{
6350 MAILBOX_t *mb;
6351 union lpfc_sli4_cfg_shdr *shdr;
6352 uint32_t shdr_status, shdr_add_status;
6353 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6354
6355 mb = &pmb->u.mb;
6356
6357 shdr = (union lpfc_sli4_cfg_shdr *)
6358 &pmb->u.mqe.un.ras_fwlog.header.cfg_shdr;
6359 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
6360 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
6361
6362 if (mb->mbxStatus != MBX_SUCCESS || shdr_status) {
cb34990b 6363 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
d2cc9bcd
JS
6364 "6188 FW LOG mailbox "
6365 "completed with status x%x add_status x%x,"
6366 " mbx status x%x\n",
6367 shdr_status, shdr_add_status, mb->mbxStatus);
cb34990b
JS
6368
6369 ras_fwlog->ras_hwsupport = false;
d2cc9bcd
JS
6370 goto disable_ras;
6371 }
6372
6373 ras_fwlog->ras_active = true;
6374 mempool_free(pmb, phba->mbox_mem_pool);
6375
6376 return;
6377
6378disable_ras:
6379 /* Free RAS DMA memory */
6380 lpfc_sli4_ras_dma_free(phba);
6381 mempool_free(pmb, phba->mbox_mem_pool);
6382}
6383
6384/**
6385 * lpfc_sli4_ras_fwlog_init: Initialize memory and post RAS MBX command
6386 * @phba: pointer to lpfc hba data structure.
6387 * @fwlog_level: Logging verbosity level.
6388 * @fwlog_enable: Enable/Disable logging.
6389 *
6390 * Initialize memory and post mailbox command to enable FW logging in host
6391 * memory.
6392 **/
6393int
6394lpfc_sli4_ras_fwlog_init(struct lpfc_hba *phba,
6395 uint32_t fwlog_level,
6396 uint32_t fwlog_enable)
6397{
6398 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6399 struct lpfc_mbx_set_ras_fwlog *mbx_fwlog = NULL;
6400 struct lpfc_dmabuf *dmabuf;
6401 LPFC_MBOXQ_t *mbox;
6402 uint32_t len = 0, fwlog_buffsize, fwlog_entry_count;
6403 int rc = 0;
6404
6405 fwlog_buffsize = (LPFC_RAS_MIN_BUFF_POST_SIZE *
6406 phba->cfg_ras_fwlog_buffsize);
6407 fwlog_entry_count = (fwlog_buffsize/LPFC_RAS_MAX_ENTRY_SIZE);
6408
6409 /*
6410 * If re-enabling FW logging support use earlier allocated
6411 * DMA buffers while posting MBX command.
6412 **/
6413 if (!ras_fwlog->lwpd.virt) {
6414 rc = lpfc_sli4_ras_dma_alloc(phba, fwlog_entry_count);
6415 if (rc) {
6416 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
cb34990b 6417 "6189 FW Log Memory Allocation Failed");
d2cc9bcd
JS
6418 return rc;
6419 }
6420 }
6421
6422 /* Setup Mailbox command */
6423 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6424 if (!mbox) {
cb34990b 6425 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d2cc9bcd
JS
6426 "6190 RAS MBX Alloc Failed");
6427 rc = -ENOMEM;
6428 goto mem_free;
6429 }
6430
6431 ras_fwlog->fw_loglevel = fwlog_level;
6432 len = (sizeof(struct lpfc_mbx_set_ras_fwlog) -
6433 sizeof(struct lpfc_sli4_cfg_mhdr));
6434
6435 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_LOWLEVEL,
6436 LPFC_MBOX_OPCODE_SET_DIAG_LOG_OPTION,
6437 len, LPFC_SLI4_MBX_EMBED);
6438
6439 mbx_fwlog = (struct lpfc_mbx_set_ras_fwlog *)&mbox->u.mqe.un.ras_fwlog;
6440 bf_set(lpfc_fwlog_enable, &mbx_fwlog->u.request,
6441 fwlog_enable);
6442 bf_set(lpfc_fwlog_loglvl, &mbx_fwlog->u.request,
6443 ras_fwlog->fw_loglevel);
6444 bf_set(lpfc_fwlog_buffcnt, &mbx_fwlog->u.request,
6445 ras_fwlog->fw_buffcount);
6446 bf_set(lpfc_fwlog_buffsz, &mbx_fwlog->u.request,
6447 LPFC_RAS_MAX_ENTRY_SIZE/SLI4_PAGE_SIZE);
6448
6449 /* Update DMA buffer address */
6450 list_for_each_entry(dmabuf, &ras_fwlog->fwlog_buff_list, list) {
6451 memset(dmabuf->virt, 0, LPFC_RAS_MAX_ENTRY_SIZE);
6452
6453 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_lo =
6454 putPaddrLow(dmabuf->phys);
6455
6456 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_hi =
6457 putPaddrHigh(dmabuf->phys);
6458 }
6459
6460 /* Update LPWD address */
6461 mbx_fwlog->u.request.lwpd.addr_lo = putPaddrLow(ras_fwlog->lwpd.phys);
6462 mbx_fwlog->u.request.lwpd.addr_hi = putPaddrHigh(ras_fwlog->lwpd.phys);
6463
6464 mbox->vport = phba->pport;
6465 mbox->mbox_cmpl = lpfc_sli4_ras_mbox_cmpl;
6466
6467 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
6468
6469 if (rc == MBX_NOT_FINISHED) {
cb34990b
JS
6470 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6471 "6191 FW-Log Mailbox failed. "
d2cc9bcd
JS
6472 "status %d mbxStatus : x%x", rc,
6473 bf_get(lpfc_mqe_status, &mbox->u.mqe));
6474 mempool_free(mbox, phba->mbox_mem_pool);
6475 rc = -EIO;
6476 goto mem_free;
6477 } else
6478 rc = 0;
6479mem_free:
6480 if (rc)
6481 lpfc_sli4_ras_dma_free(phba);
6482
6483 return rc;
6484}
6485
6486/**
6487 * lpfc_sli4_ras_setup - Check if RAS supported on the adapter
6488 * @phba: Pointer to HBA context object.
6489 *
6490 * Check if RAS is supported on the adapter and initialize it.
6491 **/
6492void
6493lpfc_sli4_ras_setup(struct lpfc_hba *phba)
6494{
6495 /* Check RAS FW Log needs to be enabled or not */
6496 if (lpfc_check_fwlog_support(phba))
6497 return;
6498
6499 lpfc_sli4_ras_fwlog_init(phba, phba->cfg_ras_fwlog_level,
6500 LPFC_RAS_ENABLE_LOGGING);
6501}
6502
6d368e53
JS
6503/**
6504 * lpfc_sli4_alloc_resource_identifiers - Allocate all SLI4 resource extents.
6505 * @phba: Pointer to HBA context object.
6506 *
6507 * This function allocates all SLI4 resource identifiers.
6508 **/
6509int
6510lpfc_sli4_alloc_resource_identifiers(struct lpfc_hba *phba)
6511{
6512 int i, rc, error = 0;
6513 uint16_t count, base;
6514 unsigned long longs;
6515
ff78d8f9
JS
6516 if (!phba->sli4_hba.rpi_hdrs_in_use)
6517 phba->sli4_hba.next_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
6d368e53
JS
6518 if (phba->sli4_hba.extents_in_use) {
6519 /*
6520 * The port supports resource extents. The XRI, VPI, VFI, RPI
6521 * resource extent count must be read and allocated before
6522 * provisioning the resource id arrays.
6523 */
6524 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
6525 LPFC_IDX_RSRC_RDY) {
6526 /*
6527 * Extent-based resources are set - the driver could
6528 * be in a port reset. Figure out if any corrective
6529 * actions need to be taken.
6530 */
6531 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6532 LPFC_RSC_TYPE_FCOE_VFI);
6533 if (rc != 0)
6534 error++;
6535 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6536 LPFC_RSC_TYPE_FCOE_VPI);
6537 if (rc != 0)
6538 error++;
6539 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6540 LPFC_RSC_TYPE_FCOE_XRI);
6541 if (rc != 0)
6542 error++;
6543 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6544 LPFC_RSC_TYPE_FCOE_RPI);
6545 if (rc != 0)
6546 error++;
6547
6548 /*
6549 * It's possible that the number of resources
6550 * provided to this port instance changed between
6551 * resets. Detect this condition and reallocate
6552 * resources. Otherwise, there is no action.
6553 */
6554 if (error) {
6555 lpfc_printf_log(phba, KERN_INFO,
6556 LOG_MBOX | LOG_INIT,
6557 "2931 Detected extent resource "
6558 "change. Reallocating all "
6559 "extents.\n");
6560 rc = lpfc_sli4_dealloc_extent(phba,
6561 LPFC_RSC_TYPE_FCOE_VFI);
6562 rc = lpfc_sli4_dealloc_extent(phba,
6563 LPFC_RSC_TYPE_FCOE_VPI);
6564 rc = lpfc_sli4_dealloc_extent(phba,
6565 LPFC_RSC_TYPE_FCOE_XRI);
6566 rc = lpfc_sli4_dealloc_extent(phba,
6567 LPFC_RSC_TYPE_FCOE_RPI);
6568 } else
6569 return 0;
6570 }
6571
6572 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6573 if (unlikely(rc))
6574 goto err_exit;
6575
6576 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6577 if (unlikely(rc))
6578 goto err_exit;
6579
6580 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6581 if (unlikely(rc))
6582 goto err_exit;
6583
6584 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6585 if (unlikely(rc))
6586 goto err_exit;
6587 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6588 LPFC_IDX_RSRC_RDY);
6589 return rc;
6590 } else {
6591 /*
6592 * The port does not support resource extents. The XRI, VPI,
6593 * VFI, RPI resource ids were determined from READ_CONFIG.
6594 * Just allocate the bitmasks and provision the resource id
6595 * arrays. If a port reset is active, the resources don't
6596 * need any action - just exit.
6597 */
6598 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
ff78d8f9
JS
6599 LPFC_IDX_RSRC_RDY) {
6600 lpfc_sli4_dealloc_resource_identifiers(phba);
6601 lpfc_sli4_remove_rpis(phba);
6602 }
6d368e53
JS
6603 /* RPIs. */
6604 count = phba->sli4_hba.max_cfg_param.max_rpi;
0a630c27
JS
6605 if (count <= 0) {
6606 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6607 "3279 Invalid provisioning of "
6608 "rpi:%d\n", count);
6609 rc = -EINVAL;
6610 goto err_exit;
6611 }
6d368e53
JS
6612 base = phba->sli4_hba.max_cfg_param.rpi_base;
6613 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6614 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
6615 sizeof(unsigned long),
6616 GFP_KERNEL);
6617 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
6618 rc = -ENOMEM;
6619 goto err_exit;
6620 }
6396bb22 6621 phba->sli4_hba.rpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6622 GFP_KERNEL);
6623 if (unlikely(!phba->sli4_hba.rpi_ids)) {
6624 rc = -ENOMEM;
6625 goto free_rpi_bmask;
6626 }
6627
6628 for (i = 0; i < count; i++)
6629 phba->sli4_hba.rpi_ids[i] = base + i;
6630
6631 /* VPIs. */
6632 count = phba->sli4_hba.max_cfg_param.max_vpi;
0a630c27
JS
6633 if (count <= 0) {
6634 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6635 "3280 Invalid provisioning of "
6636 "vpi:%d\n", count);
6637 rc = -EINVAL;
6638 goto free_rpi_ids;
6639 }
6d368e53
JS
6640 base = phba->sli4_hba.max_cfg_param.vpi_base;
6641 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6642 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
6643 GFP_KERNEL);
6644 if (unlikely(!phba->vpi_bmask)) {
6645 rc = -ENOMEM;
6646 goto free_rpi_ids;
6647 }
6396bb22 6648 phba->vpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6649 GFP_KERNEL);
6650 if (unlikely(!phba->vpi_ids)) {
6651 rc = -ENOMEM;
6652 goto free_vpi_bmask;
6653 }
6654
6655 for (i = 0; i < count; i++)
6656 phba->vpi_ids[i] = base + i;
6657
6658 /* XRIs. */
6659 count = phba->sli4_hba.max_cfg_param.max_xri;
0a630c27
JS
6660 if (count <= 0) {
6661 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6662 "3281 Invalid provisioning of "
6663 "xri:%d\n", count);
6664 rc = -EINVAL;
6665 goto free_vpi_ids;
6666 }
6d368e53
JS
6667 base = phba->sli4_hba.max_cfg_param.xri_base;
6668 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6669 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
6670 sizeof(unsigned long),
6671 GFP_KERNEL);
6672 if (unlikely(!phba->sli4_hba.xri_bmask)) {
6673 rc = -ENOMEM;
6674 goto free_vpi_ids;
6675 }
41899be7 6676 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 6677 phba->sli4_hba.xri_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6678 GFP_KERNEL);
6679 if (unlikely(!phba->sli4_hba.xri_ids)) {
6680 rc = -ENOMEM;
6681 goto free_xri_bmask;
6682 }
6683
6684 for (i = 0; i < count; i++)
6685 phba->sli4_hba.xri_ids[i] = base + i;
6686
6687 /* VFIs. */
6688 count = phba->sli4_hba.max_cfg_param.max_vfi;
0a630c27
JS
6689 if (count <= 0) {
6690 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6691 "3282 Invalid provisioning of "
6692 "vfi:%d\n", count);
6693 rc = -EINVAL;
6694 goto free_xri_ids;
6695 }
6d368e53
JS
6696 base = phba->sli4_hba.max_cfg_param.vfi_base;
6697 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6698 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
6699 sizeof(unsigned long),
6700 GFP_KERNEL);
6701 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
6702 rc = -ENOMEM;
6703 goto free_xri_ids;
6704 }
6396bb22 6705 phba->sli4_hba.vfi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6706 GFP_KERNEL);
6707 if (unlikely(!phba->sli4_hba.vfi_ids)) {
6708 rc = -ENOMEM;
6709 goto free_vfi_bmask;
6710 }
6711
6712 for (i = 0; i < count; i++)
6713 phba->sli4_hba.vfi_ids[i] = base + i;
6714
6715 /*
6716 * Mark all resources ready. An HBA reset doesn't need
6717 * to reset the initialization.
6718 */
6719 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6720 LPFC_IDX_RSRC_RDY);
6721 return 0;
6722 }
6723
6724 free_vfi_bmask:
6725 kfree(phba->sli4_hba.vfi_bmask);
cd60be49 6726 phba->sli4_hba.vfi_bmask = NULL;
6d368e53
JS
6727 free_xri_ids:
6728 kfree(phba->sli4_hba.xri_ids);
cd60be49 6729 phba->sli4_hba.xri_ids = NULL;
6d368e53
JS
6730 free_xri_bmask:
6731 kfree(phba->sli4_hba.xri_bmask);
cd60be49 6732 phba->sli4_hba.xri_bmask = NULL;
6d368e53
JS
6733 free_vpi_ids:
6734 kfree(phba->vpi_ids);
cd60be49 6735 phba->vpi_ids = NULL;
6d368e53
JS
6736 free_vpi_bmask:
6737 kfree(phba->vpi_bmask);
cd60be49 6738 phba->vpi_bmask = NULL;
6d368e53
JS
6739 free_rpi_ids:
6740 kfree(phba->sli4_hba.rpi_ids);
cd60be49 6741 phba->sli4_hba.rpi_ids = NULL;
6d368e53
JS
6742 free_rpi_bmask:
6743 kfree(phba->sli4_hba.rpi_bmask);
cd60be49 6744 phba->sli4_hba.rpi_bmask = NULL;
6d368e53
JS
6745 err_exit:
6746 return rc;
6747}
6748
6749/**
6750 * lpfc_sli4_dealloc_resource_identifiers - Deallocate all SLI4 resource extents.
6751 * @phba: Pointer to HBA context object.
6752 *
6753 * This function allocates the number of elements for the specified
6754 * resource type.
6755 **/
6756int
6757lpfc_sli4_dealloc_resource_identifiers(struct lpfc_hba *phba)
6758{
6759 if (phba->sli4_hba.extents_in_use) {
6760 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6761 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6762 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6763 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6764 } else {
6765 kfree(phba->vpi_bmask);
16a3a208 6766 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6767 kfree(phba->vpi_ids);
6768 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6769 kfree(phba->sli4_hba.xri_bmask);
6770 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6771 kfree(phba->sli4_hba.vfi_bmask);
6772 kfree(phba->sli4_hba.vfi_ids);
6773 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6774 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6775 }
6776
6777 return 0;
6778}
6779
b76f2dc9
JS
6780/**
6781 * lpfc_sli4_get_allocated_extnts - Get the port's allocated extents.
6782 * @phba: Pointer to HBA context object.
6783 * @type: The resource extent type.
6784 * @extnt_count: buffer to hold port extent count response
6785 * @extnt_size: buffer to hold port extent size response.
6786 *
6787 * This function calls the port to read the host allocated extents
6788 * for a particular type.
6789 **/
6790int
6791lpfc_sli4_get_allocated_extnts(struct lpfc_hba *phba, uint16_t type,
6792 uint16_t *extnt_cnt, uint16_t *extnt_size)
6793{
6794 bool emb;
6795 int rc = 0;
6796 uint16_t curr_blks = 0;
6797 uint32_t req_len, emb_len;
6798 uint32_t alloc_len, mbox_tmo;
6799 struct list_head *blk_list_head;
6800 struct lpfc_rsrc_blks *rsrc_blk;
6801 LPFC_MBOXQ_t *mbox;
6802 void *virtaddr = NULL;
6803 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
6804 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
6805 union lpfc_sli4_cfg_shdr *shdr;
6806
6807 switch (type) {
6808 case LPFC_RSC_TYPE_FCOE_VPI:
6809 blk_list_head = &phba->lpfc_vpi_blk_list;
6810 break;
6811 case LPFC_RSC_TYPE_FCOE_XRI:
6812 blk_list_head = &phba->sli4_hba.lpfc_xri_blk_list;
6813 break;
6814 case LPFC_RSC_TYPE_FCOE_VFI:
6815 blk_list_head = &phba->sli4_hba.lpfc_vfi_blk_list;
6816 break;
6817 case LPFC_RSC_TYPE_FCOE_RPI:
6818 blk_list_head = &phba->sli4_hba.lpfc_rpi_blk_list;
6819 break;
6820 default:
6821 return -EIO;
6822 }
6823
6824 /* Count the number of extents currently allocatd for this type. */
6825 list_for_each_entry(rsrc_blk, blk_list_head, list) {
6826 if (curr_blks == 0) {
6827 /*
6828 * The GET_ALLOCATED mailbox does not return the size,
6829 * just the count. The size should be just the size
6830 * stored in the current allocated block and all sizes
6831 * for an extent type are the same so set the return
6832 * value now.
6833 */
6834 *extnt_size = rsrc_blk->rsrc_size;
6835 }
6836 curr_blks++;
6837 }
6838
b76f2dc9
JS
6839 /*
6840 * Calculate the size of an embedded mailbox. The uint32_t
6841 * accounts for extents-specific word.
6842 */
6843 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
6844 sizeof(uint32_t);
6845
6846 /*
6847 * Presume the allocation and response will fit into an embedded
6848 * mailbox. If not true, reconfigure to a non-embedded mailbox.
6849 */
6850 emb = LPFC_SLI4_MBX_EMBED;
6851 req_len = emb_len;
6852 if (req_len > emb_len) {
6853 req_len = curr_blks * sizeof(uint16_t) +
6854 sizeof(union lpfc_sli4_cfg_shdr) +
6855 sizeof(uint32_t);
6856 emb = LPFC_SLI4_MBX_NEMBED;
6857 }
6858
6859 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6860 if (!mbox)
6861 return -ENOMEM;
6862 memset(mbox, 0, sizeof(LPFC_MBOXQ_t));
6863
6864 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6865 LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT,
6866 req_len, emb);
6867 if (alloc_len < req_len) {
6868 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6869 "2983 Allocated DMA memory size (x%x) is "
6870 "less than the requested DMA memory "
6871 "size (x%x)\n", alloc_len, req_len);
6872 rc = -ENOMEM;
6873 goto err_exit;
6874 }
6875 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, curr_blks, type, emb);
6876 if (unlikely(rc)) {
6877 rc = -EIO;
6878 goto err_exit;
6879 }
6880
6881 if (!phba->sli4_hba.intr_enable)
6882 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6883 else {
a183a15f 6884 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
b76f2dc9
JS
6885 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6886 }
6887
6888 if (unlikely(rc)) {
6889 rc = -EIO;
6890 goto err_exit;
6891 }
6892
6893 /*
6894 * Figure out where the response is located. Then get local pointers
6895 * to the response data. The port does not guarantee to respond to
6896 * all extents counts request so update the local variable with the
6897 * allocated count from the port.
6898 */
6899 if (emb == LPFC_SLI4_MBX_EMBED) {
6900 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
6901 shdr = &rsrc_ext->header.cfg_shdr;
6902 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
6903 } else {
6904 virtaddr = mbox->sge_array->addr[0];
6905 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
6906 shdr = &n_rsrc->cfg_shdr;
6907 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
6908 }
6909
6910 if (bf_get(lpfc_mbox_hdr_status, &shdr->response)) {
6911 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6912 "2984 Failed to read allocated resources "
6913 "for type %d - Status 0x%x Add'l Status 0x%x.\n",
6914 type,
6915 bf_get(lpfc_mbox_hdr_status, &shdr->response),
6916 bf_get(lpfc_mbox_hdr_add_status, &shdr->response));
6917 rc = -EIO;
6918 goto err_exit;
6919 }
6920 err_exit:
6921 lpfc_sli4_mbox_cmd_free(phba, mbox);
6922 return rc;
6923}
6924
8a9d2e80 6925/**
0ef69968 6926 * lpfc_sli4_repost_sgl_list - Repost the buffers sgl pages as block
8a9d2e80 6927 * @phba: pointer to lpfc hba data structure.
895427bd
JS
6928 * @pring: Pointer to driver SLI ring object.
6929 * @sgl_list: linked link of sgl buffers to post
6930 * @cnt: number of linked list buffers
8a9d2e80 6931 *
895427bd 6932 * This routine walks the list of buffers that have been allocated and
8a9d2e80
JS
6933 * repost them to the port by using SGL block post. This is needed after a
6934 * pci_function_reset/warm_start or start. It attempts to construct blocks
895427bd
JS
6935 * of buffer sgls which contains contiguous xris and uses the non-embedded
6936 * SGL block post mailbox commands to post them to the port. For single
8a9d2e80
JS
6937 * buffer sgl with non-contiguous xri, if any, it shall use embedded SGL post
6938 * mailbox command for posting.
6939 *
6940 * Returns: 0 = success, non-zero failure.
6941 **/
6942static int
895427bd
JS
6943lpfc_sli4_repost_sgl_list(struct lpfc_hba *phba,
6944 struct list_head *sgl_list, int cnt)
8a9d2e80
JS
6945{
6946 struct lpfc_sglq *sglq_entry = NULL;
6947 struct lpfc_sglq *sglq_entry_next = NULL;
6948 struct lpfc_sglq *sglq_entry_first = NULL;
895427bd
JS
6949 int status, total_cnt;
6950 int post_cnt = 0, num_posted = 0, block_cnt = 0;
8a9d2e80
JS
6951 int last_xritag = NO_XRI;
6952 LIST_HEAD(prep_sgl_list);
6953 LIST_HEAD(blck_sgl_list);
6954 LIST_HEAD(allc_sgl_list);
6955 LIST_HEAD(post_sgl_list);
6956 LIST_HEAD(free_sgl_list);
6957
38c20673 6958 spin_lock_irq(&phba->hbalock);
895427bd
JS
6959 spin_lock(&phba->sli4_hba.sgl_list_lock);
6960 list_splice_init(sgl_list, &allc_sgl_list);
6961 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 6962 spin_unlock_irq(&phba->hbalock);
8a9d2e80 6963
895427bd 6964 total_cnt = cnt;
8a9d2e80
JS
6965 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
6966 &allc_sgl_list, list) {
6967 list_del_init(&sglq_entry->list);
6968 block_cnt++;
6969 if ((last_xritag != NO_XRI) &&
6970 (sglq_entry->sli4_xritag != last_xritag + 1)) {
6971 /* a hole in xri block, form a sgl posting block */
6972 list_splice_init(&prep_sgl_list, &blck_sgl_list);
6973 post_cnt = block_cnt - 1;
6974 /* prepare list for next posting block */
6975 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6976 block_cnt = 1;
6977 } else {
6978 /* prepare list for next posting block */
6979 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6980 /* enough sgls for non-embed sgl mbox command */
6981 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
6982 list_splice_init(&prep_sgl_list,
6983 &blck_sgl_list);
6984 post_cnt = block_cnt;
6985 block_cnt = 0;
6986 }
6987 }
6988 num_posted++;
6989
6990 /* keep track of last sgl's xritag */
6991 last_xritag = sglq_entry->sli4_xritag;
6992
895427bd
JS
6993 /* end of repost sgl list condition for buffers */
6994 if (num_posted == total_cnt) {
8a9d2e80
JS
6995 if (post_cnt == 0) {
6996 list_splice_init(&prep_sgl_list,
6997 &blck_sgl_list);
6998 post_cnt = block_cnt;
6999 } else if (block_cnt == 1) {
7000 status = lpfc_sli4_post_sgl(phba,
7001 sglq_entry->phys, 0,
7002 sglq_entry->sli4_xritag);
7003 if (!status) {
7004 /* successful, put sgl to posted list */
7005 list_add_tail(&sglq_entry->list,
7006 &post_sgl_list);
7007 } else {
7008 /* Failure, put sgl to free list */
7009 lpfc_printf_log(phba, KERN_WARNING,
7010 LOG_SLI,
895427bd 7011 "3159 Failed to post "
8a9d2e80
JS
7012 "sgl, xritag:x%x\n",
7013 sglq_entry->sli4_xritag);
7014 list_add_tail(&sglq_entry->list,
7015 &free_sgl_list);
711ea882 7016 total_cnt--;
8a9d2e80
JS
7017 }
7018 }
7019 }
7020
7021 /* continue until a nembed page worth of sgls */
7022 if (post_cnt == 0)
7023 continue;
7024
895427bd
JS
7025 /* post the buffer list sgls as a block */
7026 status = lpfc_sli4_post_sgl_list(phba, &blck_sgl_list,
7027 post_cnt);
8a9d2e80
JS
7028
7029 if (!status) {
7030 /* success, put sgl list to posted sgl list */
7031 list_splice_init(&blck_sgl_list, &post_sgl_list);
7032 } else {
7033 /* Failure, put sgl list to free sgl list */
7034 sglq_entry_first = list_first_entry(&blck_sgl_list,
7035 struct lpfc_sglq,
7036 list);
7037 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
895427bd 7038 "3160 Failed to post sgl-list, "
8a9d2e80
JS
7039 "xritag:x%x-x%x\n",
7040 sglq_entry_first->sli4_xritag,
7041 (sglq_entry_first->sli4_xritag +
7042 post_cnt - 1));
7043 list_splice_init(&blck_sgl_list, &free_sgl_list);
711ea882 7044 total_cnt -= post_cnt;
8a9d2e80
JS
7045 }
7046
7047 /* don't reset xirtag due to hole in xri block */
7048 if (block_cnt == 0)
7049 last_xritag = NO_XRI;
7050
895427bd 7051 /* reset sgl post count for next round of posting */
8a9d2e80
JS
7052 post_cnt = 0;
7053 }
7054
895427bd 7055 /* free the sgls failed to post */
8a9d2e80
JS
7056 lpfc_free_sgl_list(phba, &free_sgl_list);
7057
895427bd 7058 /* push sgls posted to the available list */
8a9d2e80 7059 if (!list_empty(&post_sgl_list)) {
38c20673 7060 spin_lock_irq(&phba->hbalock);
895427bd
JS
7061 spin_lock(&phba->sli4_hba.sgl_list_lock);
7062 list_splice_init(&post_sgl_list, sgl_list);
7063 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 7064 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
7065 } else {
7066 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 7067 "3161 Failure to post sgl to port.\n");
8a9d2e80
JS
7068 return -EIO;
7069 }
895427bd
JS
7070
7071 /* return the number of XRIs actually posted */
7072 return total_cnt;
8a9d2e80
JS
7073}
7074
0794d601 7075/**
5e5b511d 7076 * lpfc_sli4_repost_io_sgl_list - Repost all the allocated nvme buffer sgls
0794d601
JS
7077 * @phba: pointer to lpfc hba data structure.
7078 *
7079 * This routine walks the list of nvme buffers that have been allocated and
7080 * repost them to the port by using SGL block post. This is needed after a
7081 * pci_function_reset/warm_start or start. The lpfc_hba_down_post_s4 routine
7082 * is responsible for moving all nvme buffers on the lpfc_abts_nvme_sgl_list
5e5b511d 7083 * to the lpfc_io_buf_list. If the repost fails, reject all nvme buffers.
0794d601
JS
7084 *
7085 * Returns: 0 = success, non-zero failure.
7086 **/
3999df75 7087static int
5e5b511d 7088lpfc_sli4_repost_io_sgl_list(struct lpfc_hba *phba)
0794d601
JS
7089{
7090 LIST_HEAD(post_nblist);
7091 int num_posted, rc = 0;
7092
7093 /* get all NVME buffers need to repost to a local list */
5e5b511d 7094 lpfc_io_buf_flush(phba, &post_nblist);
0794d601
JS
7095
7096 /* post the list of nvme buffer sgls to port if available */
7097 if (!list_empty(&post_nblist)) {
5e5b511d
JS
7098 num_posted = lpfc_sli4_post_io_sgl_list(
7099 phba, &post_nblist, phba->sli4_hba.io_xri_cnt);
0794d601
JS
7100 /* failed to post any nvme buffer, return error */
7101 if (num_posted == 0)
7102 rc = -EIO;
7103 }
7104 return rc;
7105}
7106
3999df75 7107static void
61bda8f7
JS
7108lpfc_set_host_data(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
7109{
7110 uint32_t len;
7111
7112 len = sizeof(struct lpfc_mbx_set_host_data) -
7113 sizeof(struct lpfc_sli4_cfg_mhdr);
7114 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
7115 LPFC_MBOX_OPCODE_SET_HOST_DATA, len,
7116 LPFC_SLI4_MBX_EMBED);
7117
7118 mbox->u.mqe.un.set_host_data.param_id = LPFC_SET_HOST_OS_DRIVER_VERSION;
b2fd103b
JS
7119 mbox->u.mqe.un.set_host_data.param_len =
7120 LPFC_HOST_OS_DRIVER_VERSION_SIZE;
61bda8f7
JS
7121 snprintf(mbox->u.mqe.un.set_host_data.data,
7122 LPFC_HOST_OS_DRIVER_VERSION_SIZE,
7123 "Linux %s v"LPFC_DRIVER_VERSION,
7124 (phba->hba_flag & HBA_FCOE_MODE) ? "FCoE" : "FC");
7125}
7126
a8cf5dfe 7127int
6c621a22 7128lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
a8cf5dfe 7129 struct lpfc_queue *drq, int count, int idx)
6c621a22
JS
7130{
7131 int rc, i;
7132 struct lpfc_rqe hrqe;
7133 struct lpfc_rqe drqe;
7134 struct lpfc_rqb *rqbp;
411de511 7135 unsigned long flags;
6c621a22
JS
7136 struct rqb_dmabuf *rqb_buffer;
7137 LIST_HEAD(rqb_buf_list);
7138
411de511 7139 spin_lock_irqsave(&phba->hbalock, flags);
6c621a22
JS
7140 rqbp = hrq->rqbp;
7141 for (i = 0; i < count; i++) {
7142 /* IF RQ is already full, don't bother */
7143 if (rqbp->buffer_count + i >= rqbp->entry_count - 1)
7144 break;
7145 rqb_buffer = rqbp->rqb_alloc_buffer(phba);
7146 if (!rqb_buffer)
7147 break;
7148 rqb_buffer->hrq = hrq;
7149 rqb_buffer->drq = drq;
a8cf5dfe 7150 rqb_buffer->idx = idx;
6c621a22
JS
7151 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
7152 }
7153 while (!list_empty(&rqb_buf_list)) {
7154 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
7155 hbuf.list);
7156
7157 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
7158 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
7159 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
7160 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
7161 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
7162 if (rc < 0) {
411de511
JS
7163 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7164 "6421 Cannot post to HRQ %d: %x %x %x "
7165 "DRQ %x %x\n",
7166 hrq->queue_id,
7167 hrq->host_index,
7168 hrq->hba_index,
7169 hrq->entry_count,
7170 drq->host_index,
7171 drq->hba_index);
6c621a22
JS
7172 rqbp->rqb_free_buffer(phba, rqb_buffer);
7173 } else {
7174 list_add_tail(&rqb_buffer->hbuf.list,
7175 &rqbp->rqb_buffer_list);
7176 rqbp->buffer_count++;
7177 }
7178 }
411de511 7179 spin_unlock_irqrestore(&phba->hbalock, flags);
6c621a22
JS
7180 return 1;
7181}
7182
da0436e9 7183/**
183b8021 7184 * lpfc_sli4_hba_setup - SLI4 device initialization PCI function
da0436e9
JS
7185 * @phba: Pointer to HBA context object.
7186 *
183b8021
MY
7187 * This function is the main SLI4 device initialization PCI function. This
7188 * function is called by the HBA initialization code, HBA reset code and
da0436e9
JS
7189 * HBA error attention handler code. Caller is not required to hold any
7190 * locks.
7191 **/
7192int
7193lpfc_sli4_hba_setup(struct lpfc_hba *phba)
7194{
c490850a 7195 int rc, i, cnt, len;
da0436e9
JS
7196 LPFC_MBOXQ_t *mboxq;
7197 struct lpfc_mqe *mqe;
7198 uint8_t *vpd;
7199 uint32_t vpd_size;
7200 uint32_t ftr_rsp = 0;
7201 struct Scsi_Host *shost = lpfc_shost_from_vport(phba->pport);
7202 struct lpfc_vport *vport = phba->pport;
7203 struct lpfc_dmabuf *mp;
2d7dbc4c 7204 struct lpfc_rqb *rqbp;
da0436e9
JS
7205
7206 /* Perform a PCI function reset to start from clean */
7207 rc = lpfc_pci_function_reset(phba);
7208 if (unlikely(rc))
7209 return -ENODEV;
7210
7211 /* Check the HBA Host Status Register for readyness */
7212 rc = lpfc_sli4_post_status_check(phba);
7213 if (unlikely(rc))
7214 return -ENODEV;
7215 else {
7216 spin_lock_irq(&phba->hbalock);
7217 phba->sli.sli_flag |= LPFC_SLI_ACTIVE;
7218 spin_unlock_irq(&phba->hbalock);
7219 }
7220
7221 /*
7222 * Allocate a single mailbox container for initializing the
7223 * port.
7224 */
7225 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7226 if (!mboxq)
7227 return -ENOMEM;
7228
da0436e9 7229 /* Issue READ_REV to collect vpd and FW information. */
49198b37 7230 vpd_size = SLI4_PAGE_SIZE;
da0436e9
JS
7231 vpd = kzalloc(vpd_size, GFP_KERNEL);
7232 if (!vpd) {
7233 rc = -ENOMEM;
7234 goto out_free_mbox;
7235 }
7236
7237 rc = lpfc_sli4_read_rev(phba, mboxq, vpd, &vpd_size);
76a95d75
JS
7238 if (unlikely(rc)) {
7239 kfree(vpd);
7240 goto out_free_mbox;
7241 }
572709e2 7242
da0436e9 7243 mqe = &mboxq->u.mqe;
f1126688 7244 phba->sli_rev = bf_get(lpfc_mbx_rd_rev_sli_lvl, &mqe->un.read_rev);
b5c53958 7245 if (bf_get(lpfc_mbx_rd_rev_fcoe, &mqe->un.read_rev)) {
76a95d75 7246 phba->hba_flag |= HBA_FCOE_MODE;
b5c53958
JS
7247 phba->fcp_embed_io = 0; /* SLI4 FC support only */
7248 } else {
76a95d75 7249 phba->hba_flag &= ~HBA_FCOE_MODE;
b5c53958 7250 }
45ed1190
JS
7251
7252 if (bf_get(lpfc_mbx_rd_rev_cee_ver, &mqe->un.read_rev) ==
7253 LPFC_DCBX_CEE_MODE)
7254 phba->hba_flag |= HBA_FIP_SUPPORT;
7255 else
7256 phba->hba_flag &= ~HBA_FIP_SUPPORT;
7257
4f2e66c6
JS
7258 phba->hba_flag &= ~HBA_FCP_IOQ_FLUSH;
7259
c31098ce 7260 if (phba->sli_rev != LPFC_SLI_REV4) {
da0436e9
JS
7261 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7262 "0376 READ_REV Error. SLI Level %d "
7263 "FCoE enabled %d\n",
76a95d75 7264 phba->sli_rev, phba->hba_flag & HBA_FCOE_MODE);
da0436e9 7265 rc = -EIO;
76a95d75
JS
7266 kfree(vpd);
7267 goto out_free_mbox;
da0436e9 7268 }
cd1c8301 7269
ff78d8f9
JS
7270 /*
7271 * Continue initialization with default values even if driver failed
7272 * to read FCoE param config regions, only read parameters if the
7273 * board is FCoE
7274 */
7275 if (phba->hba_flag & HBA_FCOE_MODE &&
7276 lpfc_sli4_read_fcoe_params(phba))
7277 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_INIT,
7278 "2570 Failed to read FCoE parameters\n");
7279
cd1c8301
JS
7280 /*
7281 * Retrieve sli4 device physical port name, failure of doing it
7282 * is considered as non-fatal.
7283 */
7284 rc = lpfc_sli4_retrieve_pport_name(phba);
7285 if (!rc)
7286 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7287 "3080 Successful retrieving SLI4 device "
7288 "physical port name: %s.\n", phba->Port);
7289
b3b4f3e1
JS
7290 rc = lpfc_sli4_get_ctl_attr(phba);
7291 if (!rc)
7292 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7293 "8351 Successful retrieving SLI4 device "
7294 "CTL ATTR\n");
7295
da0436e9
JS
7296 /*
7297 * Evaluate the read rev and vpd data. Populate the driver
7298 * state with the results. If this routine fails, the failure
7299 * is not fatal as the driver will use generic values.
7300 */
7301 rc = lpfc_parse_vpd(phba, vpd, vpd_size);
7302 if (unlikely(!rc)) {
7303 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7304 "0377 Error %d parsing vpd. "
7305 "Using defaults.\n", rc);
7306 rc = 0;
7307 }
76a95d75 7308 kfree(vpd);
da0436e9 7309
f1126688
JS
7310 /* Save information as VPD data */
7311 phba->vpd.rev.biuRev = mqe->un.read_rev.first_hw_rev;
7312 phba->vpd.rev.smRev = mqe->un.read_rev.second_hw_rev;
4e565cf0
JS
7313
7314 /*
7315 * This is because first G7 ASIC doesn't support the standard
7316 * 0x5a NVME cmd descriptor type/subtype
7317 */
7318 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7319 LPFC_SLI_INTF_IF_TYPE_6) &&
7320 (phba->vpd.rev.biuRev == LPFC_G7_ASIC_1) &&
7321 (phba->vpd.rev.smRev == 0) &&
7322 (phba->cfg_nvme_embed_cmd == 1))
7323 phba->cfg_nvme_embed_cmd = 0;
7324
f1126688
JS
7325 phba->vpd.rev.endecRev = mqe->un.read_rev.third_hw_rev;
7326 phba->vpd.rev.fcphHigh = bf_get(lpfc_mbx_rd_rev_fcph_high,
7327 &mqe->un.read_rev);
7328 phba->vpd.rev.fcphLow = bf_get(lpfc_mbx_rd_rev_fcph_low,
7329 &mqe->un.read_rev);
7330 phba->vpd.rev.feaLevelHigh = bf_get(lpfc_mbx_rd_rev_ftr_lvl_high,
7331 &mqe->un.read_rev);
7332 phba->vpd.rev.feaLevelLow = bf_get(lpfc_mbx_rd_rev_ftr_lvl_low,
7333 &mqe->un.read_rev);
7334 phba->vpd.rev.sli1FwRev = mqe->un.read_rev.fw_id_rev;
7335 memcpy(phba->vpd.rev.sli1FwName, mqe->un.read_rev.fw_name, 16);
7336 phba->vpd.rev.sli2FwRev = mqe->un.read_rev.ulp_fw_id_rev;
7337 memcpy(phba->vpd.rev.sli2FwName, mqe->un.read_rev.ulp_fw_name, 16);
7338 phba->vpd.rev.opFwRev = mqe->un.read_rev.fw_id_rev;
7339 memcpy(phba->vpd.rev.opFwName, mqe->un.read_rev.fw_name, 16);
7340 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7341 "(%d):0380 READ_REV Status x%x "
7342 "fw_rev:%s fcphHi:%x fcphLo:%x flHi:%x flLo:%x\n",
7343 mboxq->vport ? mboxq->vport->vpi : 0,
7344 bf_get(lpfc_mqe_status, mqe),
7345 phba->vpd.rev.opFwName,
7346 phba->vpd.rev.fcphHigh, phba->vpd.rev.fcphLow,
7347 phba->vpd.rev.feaLevelHigh, phba->vpd.rev.feaLevelLow);
da0436e9 7348
572709e2
JS
7349 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
7350 rc = (phba->sli4_hba.max_cfg_param.max_xri >> 3);
7351 if (phba->pport->cfg_lun_queue_depth > rc) {
7352 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7353 "3362 LUN queue depth changed from %d to %d\n",
7354 phba->pport->cfg_lun_queue_depth, rc);
7355 phba->pport->cfg_lun_queue_depth = rc;
7356 }
7357
65791f1f 7358 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7bdedb34
JS
7359 LPFC_SLI_INTF_IF_TYPE_0) {
7360 lpfc_set_features(phba, mboxq, LPFC_SET_UE_RECOVERY);
7361 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7362 if (rc == MBX_SUCCESS) {
7363 phba->hba_flag |= HBA_RECOVERABLE_UE;
7364 /* Set 1Sec interval to detect UE */
7365 phba->eratt_poll_interval = 1;
7366 phba->sli4_hba.ue_to_sr = bf_get(
7367 lpfc_mbx_set_feature_UESR,
7368 &mboxq->u.mqe.un.set_feature);
7369 phba->sli4_hba.ue_to_rp = bf_get(
7370 lpfc_mbx_set_feature_UERP,
7371 &mboxq->u.mqe.un.set_feature);
7372 }
7373 }
7374
7375 if (phba->cfg_enable_mds_diags && phba->mds_diags_support) {
7376 /* Enable MDS Diagnostics only if the SLI Port supports it */
7377 lpfc_set_features(phba, mboxq, LPFC_SET_MDS_DIAGS);
7378 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7379 if (rc != MBX_SUCCESS)
7380 phba->mds_diags_support = 0;
7381 }
572709e2 7382
da0436e9
JS
7383 /*
7384 * Discover the port's supported feature set and match it against the
7385 * hosts requests.
7386 */
7387 lpfc_request_features(phba, mboxq);
7388 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7389 if (unlikely(rc)) {
7390 rc = -EIO;
76a95d75 7391 goto out_free_mbox;
da0436e9
JS
7392 }
7393
7394 /*
7395 * The port must support FCP initiator mode as this is the
7396 * only mode running in the host.
7397 */
7398 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_fcpi, &mqe->un.req_ftrs))) {
7399 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7400 "0378 No support for fcpi mode.\n");
7401 ftr_rsp++;
7402 }
0bc2b7c5
JS
7403
7404 /* Performance Hints are ONLY for FCoE */
7405 if (phba->hba_flag & HBA_FCOE_MODE) {
7406 if (bf_get(lpfc_mbx_rq_ftr_rsp_perfh, &mqe->un.req_ftrs))
7407 phba->sli3_options |= LPFC_SLI4_PERFH_ENABLED;
7408 else
7409 phba->sli3_options &= ~LPFC_SLI4_PERFH_ENABLED;
7410 }
7411
da0436e9
JS
7412 /*
7413 * If the port cannot support the host's requested features
7414 * then turn off the global config parameters to disable the
7415 * feature in the driver. This is not a fatal error.
7416 */
f44ac12f
JS
7417 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
7418 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs))) {
7419 phba->cfg_enable_bg = 0;
7420 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
bf08611b 7421 ftr_rsp++;
f44ac12f 7422 }
bf08611b 7423 }
da0436e9
JS
7424
7425 if (phba->max_vpi && phba->cfg_enable_npiv &&
7426 !(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7427 ftr_rsp++;
7428
7429 if (ftr_rsp) {
7430 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7431 "0379 Feature Mismatch Data: x%08x %08x "
7432 "x%x x%x x%x\n", mqe->un.req_ftrs.word2,
7433 mqe->un.req_ftrs.word3, phba->cfg_enable_bg,
7434 phba->cfg_enable_npiv, phba->max_vpi);
7435 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs)))
7436 phba->cfg_enable_bg = 0;
7437 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7438 phba->cfg_enable_npiv = 0;
7439 }
7440
7441 /* These SLI3 features are assumed in SLI4 */
7442 spin_lock_irq(&phba->hbalock);
7443 phba->sli3_options |= (LPFC_SLI3_NPIV_ENABLED | LPFC_SLI3_HBQ_ENABLED);
7444 spin_unlock_irq(&phba->hbalock);
7445
6d368e53
JS
7446 /*
7447 * Allocate all resources (xri,rpi,vpi,vfi) now. Subsequent
7448 * calls depends on these resources to complete port setup.
7449 */
7450 rc = lpfc_sli4_alloc_resource_identifiers(phba);
7451 if (rc) {
7452 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7453 "2920 Failed to alloc Resource IDs "
7454 "rc = x%x\n", rc);
7455 goto out_free_mbox;
7456 }
7457
61bda8f7
JS
7458 lpfc_set_host_data(phba, mboxq);
7459
7460 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7461 if (rc) {
7462 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7463 "2134 Failed to set host os driver version %x",
7464 rc);
7465 }
7466
da0436e9 7467 /* Read the port's service parameters. */
9f1177a3
JS
7468 rc = lpfc_read_sparam(phba, mboxq, vport->vpi);
7469 if (rc) {
7470 phba->link_state = LPFC_HBA_ERROR;
7471 rc = -ENOMEM;
76a95d75 7472 goto out_free_mbox;
9f1177a3
JS
7473 }
7474
da0436e9
JS
7475 mboxq->vport = vport;
7476 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3e1f0718 7477 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
7478 if (rc == MBX_SUCCESS) {
7479 memcpy(&vport->fc_sparam, mp->virt, sizeof(struct serv_parm));
7480 rc = 0;
7481 }
7482
7483 /*
7484 * This memory was allocated by the lpfc_read_sparam routine. Release
7485 * it to the mbuf pool.
7486 */
7487 lpfc_mbuf_free(phba, mp->virt, mp->phys);
7488 kfree(mp);
3e1f0718 7489 mboxq->ctx_buf = NULL;
da0436e9
JS
7490 if (unlikely(rc)) {
7491 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7492 "0382 READ_SPARAM command failed "
7493 "status %d, mbxStatus x%x\n",
7494 rc, bf_get(lpfc_mqe_status, mqe));
7495 phba->link_state = LPFC_HBA_ERROR;
7496 rc = -EIO;
76a95d75 7497 goto out_free_mbox;
da0436e9
JS
7498 }
7499
0558056c 7500 lpfc_update_vport_wwn(vport);
da0436e9
JS
7501
7502 /* Update the fc_host data structures with new wwn. */
7503 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
7504 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
7505
895427bd
JS
7506 /* Create all the SLI4 queues */
7507 rc = lpfc_sli4_queue_create(phba);
7508 if (rc) {
7509 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7510 "3089 Failed to allocate queues\n");
7511 rc = -ENODEV;
7512 goto out_free_mbox;
7513 }
7514 /* Set up all the queues to the device */
7515 rc = lpfc_sli4_queue_setup(phba);
7516 if (unlikely(rc)) {
7517 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7518 "0381 Error %d during queue setup.\n ", rc);
7519 goto out_stop_timers;
7520 }
7521 /* Initialize the driver internal SLI layer lists. */
7522 lpfc_sli4_setup(phba);
7523 lpfc_sli4_queue_init(phba);
7524
7525 /* update host els xri-sgl sizes and mappings */
7526 rc = lpfc_sli4_els_sgl_update(phba);
8a9d2e80
JS
7527 if (unlikely(rc)) {
7528 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7529 "1400 Failed to update xri-sgl size and "
7530 "mapping: %d\n", rc);
895427bd 7531 goto out_destroy_queue;
da0436e9
JS
7532 }
7533
8a9d2e80 7534 /* register the els sgl pool to the port */
895427bd
JS
7535 rc = lpfc_sli4_repost_sgl_list(phba, &phba->sli4_hba.lpfc_els_sgl_list,
7536 phba->sli4_hba.els_xri_cnt);
7537 if (unlikely(rc < 0)) {
8a9d2e80
JS
7538 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7539 "0582 Error %d during els sgl post "
7540 "operation\n", rc);
7541 rc = -ENODEV;
895427bd 7542 goto out_destroy_queue;
8a9d2e80 7543 }
895427bd 7544 phba->sli4_hba.els_xri_cnt = rc;
8a9d2e80 7545
f358dd0c
JS
7546 if (phba->nvmet_support) {
7547 /* update host nvmet xri-sgl sizes and mappings */
7548 rc = lpfc_sli4_nvmet_sgl_update(phba);
7549 if (unlikely(rc)) {
7550 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7551 "6308 Failed to update nvmet-sgl size "
7552 "and mapping: %d\n", rc);
7553 goto out_destroy_queue;
7554 }
7555
7556 /* register the nvmet sgl pool to the port */
7557 rc = lpfc_sli4_repost_sgl_list(
7558 phba,
7559 &phba->sli4_hba.lpfc_nvmet_sgl_list,
7560 phba->sli4_hba.nvmet_xri_cnt);
7561 if (unlikely(rc < 0)) {
7562 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7563 "3117 Error %d during nvmet "
7564 "sgl post\n", rc);
7565 rc = -ENODEV;
7566 goto out_destroy_queue;
7567 }
7568 phba->sli4_hba.nvmet_xri_cnt = rc;
6c621a22
JS
7569
7570 cnt = phba->cfg_iocb_cnt * 1024;
7571 /* We need 1 iocbq for every SGL, for IO processing */
7572 cnt += phba->sli4_hba.nvmet_xri_cnt;
f358dd0c 7573 } else {
0794d601 7574 /* update host common xri-sgl sizes and mappings */
5e5b511d 7575 rc = lpfc_sli4_io_sgl_update(phba);
895427bd
JS
7576 if (unlikely(rc)) {
7577 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
0794d601 7578 "6082 Failed to update nvme-sgl size "
895427bd
JS
7579 "and mapping: %d\n", rc);
7580 goto out_destroy_queue;
7581 }
7582
0794d601 7583 /* register the allocated common sgl pool to the port */
5e5b511d 7584 rc = lpfc_sli4_repost_io_sgl_list(phba);
895427bd
JS
7585 if (unlikely(rc)) {
7586 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
0794d601
JS
7587 "6116 Error %d during nvme sgl post "
7588 "operation\n", rc);
7589 /* Some NVME buffers were moved to abort nvme list */
7590 /* A pci function reset will repost them */
7591 rc = -ENODEV;
895427bd
JS
7592 goto out_destroy_queue;
7593 }
6c621a22 7594 cnt = phba->cfg_iocb_cnt * 1024;
11e644e2
JS
7595 }
7596
7597 if (!phba->sli.iocbq_lookup) {
6c621a22
JS
7598 /* Initialize and populate the iocb list per host */
7599 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11e644e2 7600 "2821 initialize iocb list %d total %d\n",
6c621a22
JS
7601 phba->cfg_iocb_cnt, cnt);
7602 rc = lpfc_init_iocb_list(phba, cnt);
7603 if (rc) {
7604 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11e644e2 7605 "1413 Failed to init iocb list.\n");
6c621a22
JS
7606 goto out_destroy_queue;
7607 }
895427bd
JS
7608 }
7609
11e644e2
JS
7610 if (phba->nvmet_support)
7611 lpfc_nvmet_create_targetport(phba);
7612
2d7dbc4c 7613 if (phba->nvmet_support && phba->cfg_nvmet_mrq) {
2d7dbc4c
JS
7614 /* Post initial buffers to all RQs created */
7615 for (i = 0; i < phba->cfg_nvmet_mrq; i++) {
7616 rqbp = phba->sli4_hba.nvmet_mrq_hdr[i]->rqbp;
7617 INIT_LIST_HEAD(&rqbp->rqb_buffer_list);
7618 rqbp->rqb_alloc_buffer = lpfc_sli4_nvmet_alloc;
7619 rqbp->rqb_free_buffer = lpfc_sli4_nvmet_free;
61f3d4bf 7620 rqbp->entry_count = LPFC_NVMET_RQE_DEF_COUNT;
2d7dbc4c
JS
7621 rqbp->buffer_count = 0;
7622
2d7dbc4c
JS
7623 lpfc_post_rq_buffer(
7624 phba, phba->sli4_hba.nvmet_mrq_hdr[i],
7625 phba->sli4_hba.nvmet_mrq_data[i],
2448e484 7626 phba->cfg_nvmet_mrq_post, i);
2d7dbc4c
JS
7627 }
7628 }
7629
da0436e9
JS
7630 /* Post the rpi header region to the device. */
7631 rc = lpfc_sli4_post_all_rpi_hdrs(phba);
7632 if (unlikely(rc)) {
7633 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7634 "0393 Error %d during rpi post operation\n",
7635 rc);
7636 rc = -ENODEV;
895427bd 7637 goto out_destroy_queue;
da0436e9 7638 }
97f2ecf1 7639 lpfc_sli4_node_prep(phba);
da0436e9 7640
895427bd 7641 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
2d7dbc4c 7642 if ((phba->nvmet_support == 0) || (phba->cfg_nvmet_mrq == 1)) {
895427bd
JS
7643 /*
7644 * The FC Port needs to register FCFI (index 0)
7645 */
7646 lpfc_reg_fcfi(phba, mboxq);
7647 mboxq->vport = phba->pport;
7648 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7649 if (rc != MBX_SUCCESS)
7650 goto out_unset_queue;
7651 rc = 0;
7652 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_fcfi,
7653 &mboxq->u.mqe.un.reg_fcfi);
2d7dbc4c
JS
7654 } else {
7655 /* We are a NVME Target mode with MRQ > 1 */
7656
7657 /* First register the FCFI */
7658 lpfc_reg_fcfi_mrq(phba, mboxq, 0);
7659 mboxq->vport = phba->pport;
7660 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7661 if (rc != MBX_SUCCESS)
7662 goto out_unset_queue;
7663 rc = 0;
7664 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_mrq_fcfi,
7665 &mboxq->u.mqe.un.reg_fcfi_mrq);
7666
7667 /* Next register the MRQs */
7668 lpfc_reg_fcfi_mrq(phba, mboxq, 1);
7669 mboxq->vport = phba->pport;
7670 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7671 if (rc != MBX_SUCCESS)
7672 goto out_unset_queue;
7673 rc = 0;
895427bd
JS
7674 }
7675 /* Check if the port is configured to be disabled */
7676 lpfc_sli_read_link_ste(phba);
da0436e9
JS
7677 }
7678
c490850a
JS
7679 /* Don't post more new bufs if repost already recovered
7680 * the nvme sgls.
7681 */
7682 if (phba->nvmet_support == 0) {
7683 if (phba->sli4_hba.io_xri_cnt == 0) {
7684 len = lpfc_new_io_buf(
7685 phba, phba->sli4_hba.io_xri_max);
7686 if (len == 0) {
7687 rc = -ENOMEM;
7688 goto out_unset_queue;
7689 }
7690
7691 if (phba->cfg_xri_rebalancing)
7692 lpfc_create_multixri_pools(phba);
7693 }
7694 } else {
7695 phba->cfg_xri_rebalancing = 0;
7696 }
7697
da0436e9
JS
7698 /* Allow asynchronous mailbox command to go through */
7699 spin_lock_irq(&phba->hbalock);
7700 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
7701 spin_unlock_irq(&phba->hbalock);
7702
7703 /* Post receive buffers to the device */
7704 lpfc_sli4_rb_setup(phba);
7705
fc2b989b
JS
7706 /* Reset HBA FCF states after HBA reset */
7707 phba->fcf.fcf_flag = 0;
7708 phba->fcf.current_rec.flag = 0;
7709
da0436e9 7710 /* Start the ELS watchdog timer */
8fa38513 7711 mod_timer(&vport->els_tmofunc,
256ec0d0 7712 jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov * 2)));
da0436e9
JS
7713
7714 /* Start heart beat timer */
7715 mod_timer(&phba->hb_tmofunc,
256ec0d0 7716 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
da0436e9
JS
7717 phba->hb_outstanding = 0;
7718 phba->last_completion_time = jiffies;
7719
32517fc0
JS
7720 /* start eq_delay heartbeat */
7721 if (phba->cfg_auto_imax)
7722 queue_delayed_work(phba->wq, &phba->eq_delay_work,
7723 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
7724
da0436e9 7725 /* Start error attention (ERATT) polling timer */
256ec0d0 7726 mod_timer(&phba->eratt_poll,
65791f1f 7727 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
da0436e9 7728
75baf696
JS
7729 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
7730 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
7731 rc = pci_enable_pcie_error_reporting(phba->pcidev);
7732 if (!rc) {
7733 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7734 "2829 This device supports "
7735 "Advanced Error Reporting (AER)\n");
7736 spin_lock_irq(&phba->hbalock);
7737 phba->hba_flag |= HBA_AER_ENABLED;
7738 spin_unlock_irq(&phba->hbalock);
7739 } else {
7740 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7741 "2830 This device does not support "
7742 "Advanced Error Reporting (AER)\n");
7743 phba->cfg_aer_support = 0;
7744 }
0a96e975 7745 rc = 0;
75baf696
JS
7746 }
7747
da0436e9
JS
7748 /*
7749 * The port is ready, set the host's link state to LINK_DOWN
7750 * in preparation for link interrupts.
7751 */
da0436e9
JS
7752 spin_lock_irq(&phba->hbalock);
7753 phba->link_state = LPFC_LINK_DOWN;
1dc5ec24
JS
7754
7755 /* Check if physical ports are trunked */
7756 if (bf_get(lpfc_conf_trunk_port0, &phba->sli4_hba))
7757 phba->trunk_link.link0.state = LPFC_LINK_DOWN;
7758 if (bf_get(lpfc_conf_trunk_port1, &phba->sli4_hba))
7759 phba->trunk_link.link1.state = LPFC_LINK_DOWN;
7760 if (bf_get(lpfc_conf_trunk_port2, &phba->sli4_hba))
7761 phba->trunk_link.link2.state = LPFC_LINK_DOWN;
7762 if (bf_get(lpfc_conf_trunk_port3, &phba->sli4_hba))
7763 phba->trunk_link.link3.state = LPFC_LINK_DOWN;
da0436e9 7764 spin_unlock_irq(&phba->hbalock);
1dc5ec24 7765
e8869f5b
JS
7766 /* Arm the CQs and then EQs on device */
7767 lpfc_sli4_arm_cqeq_intr(phba);
7768
7769 /* Indicate device interrupt mode */
7770 phba->sli4_hba.intr_enable = 1;
7771
026abb87
JS
7772 if (!(phba->hba_flag & HBA_FCOE_MODE) &&
7773 (phba->hba_flag & LINK_DISABLED)) {
7774 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7775 "3103 Adapter Link is disabled.\n");
7776 lpfc_down_link(phba, mboxq);
7777 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7778 if (rc != MBX_SUCCESS) {
7779 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7780 "3104 Adapter failed to issue "
7781 "DOWN_LINK mbox cmd, rc:x%x\n", rc);
c490850a 7782 goto out_io_buff_free;
026abb87
JS
7783 }
7784 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
1b51197d
JS
7785 /* don't perform init_link on SLI4 FC port loopback test */
7786 if (!(phba->link_flag & LS_LOOPBACK_MODE)) {
7787 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
7788 if (rc)
c490850a 7789 goto out_io_buff_free;
1b51197d 7790 }
5350d872
JS
7791 }
7792 mempool_free(mboxq, phba->mbox_mem_pool);
7793 return rc;
c490850a
JS
7794out_io_buff_free:
7795 /* Free allocated IO Buffers */
7796 lpfc_io_free(phba);
76a95d75 7797out_unset_queue:
da0436e9 7798 /* Unset all the queues set up in this routine when error out */
5350d872
JS
7799 lpfc_sli4_queue_unset(phba);
7800out_destroy_queue:
6c621a22 7801 lpfc_free_iocb_list(phba);
5350d872 7802 lpfc_sli4_queue_destroy(phba);
da0436e9 7803out_stop_timers:
5350d872 7804 lpfc_stop_hba_timers(phba);
da0436e9
JS
7805out_free_mbox:
7806 mempool_free(mboxq, phba->mbox_mem_pool);
7807 return rc;
7808}
7809
7810/**
7811 * lpfc_mbox_timeout - Timeout call back function for mbox timer
7812 * @ptr: context object - pointer to hba structure.
7813 *
7814 * This is the callback function for mailbox timer. The mailbox
7815 * timer is armed when a new mailbox command is issued and the timer
7816 * is deleted when the mailbox complete. The function is called by
7817 * the kernel timer code when a mailbox does not complete within
7818 * expected time. This function wakes up the worker thread to
7819 * process the mailbox timeout and returns. All the processing is
7820 * done by the worker thread function lpfc_mbox_timeout_handler.
7821 **/
7822void
f22eb4d3 7823lpfc_mbox_timeout(struct timer_list *t)
da0436e9 7824{
f22eb4d3 7825 struct lpfc_hba *phba = from_timer(phba, t, sli.mbox_tmo);
da0436e9
JS
7826 unsigned long iflag;
7827 uint32_t tmo_posted;
7828
7829 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
7830 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
7831 if (!tmo_posted)
7832 phba->pport->work_port_events |= WORKER_MBOX_TMO;
7833 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
7834
7835 if (!tmo_posted)
7836 lpfc_worker_wake_up(phba);
7837 return;
7838}
7839
e8d3c3b1
JS
7840/**
7841 * lpfc_sli4_mbox_completions_pending - check to see if any mailbox completions
7842 * are pending
7843 * @phba: Pointer to HBA context object.
7844 *
7845 * This function checks if any mailbox completions are present on the mailbox
7846 * completion queue.
7847 **/
3bb11fc5 7848static bool
e8d3c3b1
JS
7849lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba)
7850{
7851
7852 uint32_t idx;
7853 struct lpfc_queue *mcq;
7854 struct lpfc_mcqe *mcqe;
7855 bool pending_completions = false;
7365f6fd 7856 uint8_t qe_valid;
e8d3c3b1
JS
7857
7858 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7859 return false;
7860
7861 /* Check for completions on mailbox completion queue */
7862
7863 mcq = phba->sli4_hba.mbx_cq;
7864 idx = mcq->hba_index;
7365f6fd 7865 qe_valid = mcq->qe_valid;
9afbee3d
JS
7866 while (bf_get_le32(lpfc_cqe_valid,
7867 (struct lpfc_cqe *)lpfc_sli4_qe(mcq, idx)) == qe_valid) {
7868 mcqe = (struct lpfc_mcqe *)(lpfc_sli4_qe(mcq, idx));
e8d3c3b1
JS
7869 if (bf_get_le32(lpfc_trailer_completed, mcqe) &&
7870 (!bf_get_le32(lpfc_trailer_async, mcqe))) {
7871 pending_completions = true;
7872 break;
7873 }
7874 idx = (idx + 1) % mcq->entry_count;
7875 if (mcq->hba_index == idx)
7876 break;
7365f6fd
JS
7877
7878 /* if the index wrapped around, toggle the valid bit */
7879 if (phba->sli4_hba.pc_sli4_params.cqav && !idx)
7880 qe_valid = (qe_valid) ? 0 : 1;
e8d3c3b1
JS
7881 }
7882 return pending_completions;
7883
7884}
7885
7886/**
7887 * lpfc_sli4_process_missed_mbox_completions - process mbox completions
7888 * that were missed.
7889 * @phba: Pointer to HBA context object.
7890 *
7891 * For sli4, it is possible to miss an interrupt. As such mbox completions
7892 * maybe missed causing erroneous mailbox timeouts to occur. This function
7893 * checks to see if mbox completions are on the mailbox completion queue
7894 * and will process all the completions associated with the eq for the
7895 * mailbox completion queue.
7896 **/
d7b761b0 7897static bool
e8d3c3b1
JS
7898lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba)
7899{
b71413dd 7900 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
e8d3c3b1
JS
7901 uint32_t eqidx;
7902 struct lpfc_queue *fpeq = NULL;
657add4e 7903 struct lpfc_queue *eq;
e8d3c3b1
JS
7904 bool mbox_pending;
7905
7906 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7907 return false;
7908
657add4e
JS
7909 /* Find the EQ associated with the mbox CQ */
7910 if (sli4_hba->hdwq) {
7911 for (eqidx = 0; eqidx < phba->cfg_irq_chann; eqidx++) {
7912 eq = phba->sli4_hba.hba_eq_hdl[eqidx].eq;
7913 if (eq->queue_id == sli4_hba->mbx_cq->assoc_qid) {
7914 fpeq = eq;
e8d3c3b1
JS
7915 break;
7916 }
657add4e
JS
7917 }
7918 }
e8d3c3b1
JS
7919 if (!fpeq)
7920 return false;
7921
7922 /* Turn off interrupts from this EQ */
7923
b71413dd 7924 sli4_hba->sli4_eq_clr_intr(fpeq);
e8d3c3b1
JS
7925
7926 /* Check to see if a mbox completion is pending */
7927
7928 mbox_pending = lpfc_sli4_mbox_completions_pending(phba);
7929
7930 /*
7931 * If a mbox completion is pending, process all the events on EQ
7932 * associated with the mbox completion queue (this could include
7933 * mailbox commands, async events, els commands, receive queue data
7934 * and fcp commands)
7935 */
7936
7937 if (mbox_pending)
32517fc0
JS
7938 /* process and rearm the EQ */
7939 lpfc_sli4_process_eq(phba, fpeq);
7940 else
7941 /* Always clear and re-arm the EQ */
7942 sli4_hba->sli4_write_eq_db(phba, fpeq, 0, LPFC_QUEUE_REARM);
e8d3c3b1
JS
7943
7944 return mbox_pending;
7945
7946}
da0436e9
JS
7947
7948/**
7949 * lpfc_mbox_timeout_handler - Worker thread function to handle mailbox timeout
7950 * @phba: Pointer to HBA context object.
7951 *
7952 * This function is called from worker thread when a mailbox command times out.
7953 * The caller is not required to hold any locks. This function will reset the
7954 * HBA and recover all the pending commands.
7955 **/
7956void
7957lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
7958{
7959 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
eb016566
JS
7960 MAILBOX_t *mb = NULL;
7961
da0436e9 7962 struct lpfc_sli *psli = &phba->sli;
da0436e9 7963
e8d3c3b1
JS
7964 /* If the mailbox completed, process the completion and return */
7965 if (lpfc_sli4_process_missed_mbox_completions(phba))
7966 return;
7967
eb016566
JS
7968 if (pmbox != NULL)
7969 mb = &pmbox->u.mb;
da0436e9
JS
7970 /* Check the pmbox pointer first. There is a race condition
7971 * between the mbox timeout handler getting executed in the
7972 * worklist and the mailbox actually completing. When this
7973 * race condition occurs, the mbox_active will be NULL.
7974 */
7975 spin_lock_irq(&phba->hbalock);
7976 if (pmbox == NULL) {
7977 lpfc_printf_log(phba, KERN_WARNING,
7978 LOG_MBOX | LOG_SLI,
7979 "0353 Active Mailbox cleared - mailbox timeout "
7980 "exiting\n");
7981 spin_unlock_irq(&phba->hbalock);
7982 return;
7983 }
7984
7985 /* Mbox cmd <mbxCommand> timeout */
7986 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7987 "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
7988 mb->mbxCommand,
7989 phba->pport->port_state,
7990 phba->sli.sli_flag,
7991 phba->sli.mbox_active);
7992 spin_unlock_irq(&phba->hbalock);
7993
7994 /* Setting state unknown so lpfc_sli_abort_iocb_ring
7995 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
25985edc 7996 * it to fail all outstanding SCSI IO.
da0436e9
JS
7997 */
7998 spin_lock_irq(&phba->pport->work_port_lock);
7999 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
8000 spin_unlock_irq(&phba->pport->work_port_lock);
8001 spin_lock_irq(&phba->hbalock);
8002 phba->link_state = LPFC_LINK_UNKNOWN;
f4b4c68f 8003 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
da0436e9
JS
8004 spin_unlock_irq(&phba->hbalock);
8005
db55fba8 8006 lpfc_sli_abort_fcp_rings(phba);
da0436e9
JS
8007
8008 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8009 "0345 Resetting board due to mailbox timeout\n");
8010
8011 /* Reset the HBA device */
8012 lpfc_reset_hba(phba);
8013}
8014
8015/**
8016 * lpfc_sli_issue_mbox_s3 - Issue an SLI3 mailbox command to firmware
8017 * @phba: Pointer to HBA context object.
8018 * @pmbox: Pointer to mailbox object.
8019 * @flag: Flag indicating how the mailbox need to be processed.
8020 *
8021 * This function is called by discovery code and HBA management code
8022 * to submit a mailbox command to firmware with SLI-3 interface spec. This
8023 * function gets the hbalock to protect the data structures.
8024 * The mailbox command can be submitted in polling mode, in which case
8025 * this function will wait in a polling loop for the completion of the
8026 * mailbox.
8027 * If the mailbox is submitted in no_wait mode (not polling) the
8028 * function will submit the command and returns immediately without waiting
8029 * for the mailbox completion. The no_wait is supported only when HBA
8030 * is in SLI2/SLI3 mode - interrupts are enabled.
8031 * The SLI interface allows only one mailbox pending at a time. If the
8032 * mailbox is issued in polling mode and there is already a mailbox
8033 * pending, then the function will return an error. If the mailbox is issued
8034 * in NO_WAIT mode and there is a mailbox pending already, the function
8035 * will return MBX_BUSY after queuing the mailbox into mailbox queue.
8036 * The sli layer owns the mailbox object until the completion of mailbox
8037 * command if this function return MBX_BUSY or MBX_SUCCESS. For all other
8038 * return codes the caller owns the mailbox command after the return of
8039 * the function.
e59058c4 8040 **/
3772a991
JS
8041static int
8042lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
8043 uint32_t flag)
dea3101e 8044{
bf07bdea 8045 MAILBOX_t *mbx;
2e0fef85 8046 struct lpfc_sli *psli = &phba->sli;
dea3101e 8047 uint32_t status, evtctr;
9940b97b 8048 uint32_t ha_copy, hc_copy;
dea3101e 8049 int i;
09372820 8050 unsigned long timeout;
dea3101e 8051 unsigned long drvr_flag = 0;
34b02dcd 8052 uint32_t word0, ldata;
dea3101e 8053 void __iomem *to_slim;
58da1ffb
JS
8054 int processing_queue = 0;
8055
8056 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8057 if (!pmbox) {
8568a4d2 8058 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
58da1ffb 8059 /* processing mbox queue from intr_handler */
3772a991
JS
8060 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8061 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8062 return MBX_SUCCESS;
8063 }
58da1ffb 8064 processing_queue = 1;
58da1ffb
JS
8065 pmbox = lpfc_mbox_get(phba);
8066 if (!pmbox) {
8067 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8068 return MBX_SUCCESS;
8069 }
8070 }
dea3101e 8071
ed957684 8072 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 8073 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684 8074 if(!pmbox->vport) {
58da1ffb 8075 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
ed957684 8076 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 8077 LOG_MBOX | LOG_VPORT,
e8b62011 8078 "1806 Mbox x%x failed. No vport\n",
3772a991 8079 pmbox->u.mb.mbxCommand);
ed957684 8080 dump_stack();
58da1ffb 8081 goto out_not_finished;
ed957684
JS
8082 }
8083 }
8084
8d63f375 8085 /* If the PCI channel is in offline state, do not post mbox. */
58da1ffb
JS
8086 if (unlikely(pci_channel_offline(phba->pcidev))) {
8087 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8088 goto out_not_finished;
8089 }
8d63f375 8090
a257bf90
JS
8091 /* If HBA has a deferred error attention, fail the iocb. */
8092 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
8093 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8094 goto out_not_finished;
8095 }
8096
dea3101e 8097 psli = &phba->sli;
92d7f7b0 8098
bf07bdea 8099 mbx = &pmbox->u.mb;
dea3101e
JB
8100 status = MBX_SUCCESS;
8101
2e0fef85
JS
8102 if (phba->link_state == LPFC_HBA_ERROR) {
8103 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW
8104
8105 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8106 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8107 "(%d):0311 Mailbox command x%x cannot "
8108 "issue Data: x%x x%x\n",
8109 pmbox->vport ? pmbox->vport->vpi : 0,
8110 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
58da1ffb 8111 goto out_not_finished;
41415862
JW
8112 }
8113
bf07bdea 8114 if (mbx->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT) {
9940b97b
JS
8115 if (lpfc_readl(phba->HCregaddr, &hc_copy) ||
8116 !(hc_copy & HC_MBINT_ENA)) {
8117 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8118 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
3772a991
JS
8119 "(%d):2528 Mailbox command x%x cannot "
8120 "issue Data: x%x x%x\n",
8121 pmbox->vport ? pmbox->vport->vpi : 0,
8122 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
9940b97b
JS
8123 goto out_not_finished;
8124 }
9290831f
JS
8125 }
8126
dea3101e
JB
8127 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8128 /* Polling for a mbox command when another one is already active
8129 * is not allowed in SLI. Also, the driver must have established
8130 * SLI2 mode to queue and process multiple mbox commands.
8131 */
8132
8133 if (flag & MBX_POLL) {
2e0fef85 8134 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
8135
8136 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8137 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8138 "(%d):2529 Mailbox command x%x "
8139 "cannot issue Data: x%x x%x\n",
8140 pmbox->vport ? pmbox->vport->vpi : 0,
8141 pmbox->u.mb.mbxCommand,
8142 psli->sli_flag, flag);
58da1ffb 8143 goto out_not_finished;
dea3101e
JB
8144 }
8145
3772a991 8146 if (!(psli->sli_flag & LPFC_SLI_ACTIVE)) {
2e0fef85 8147 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8148 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8149 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8150 "(%d):2530 Mailbox command x%x "
8151 "cannot issue Data: x%x x%x\n",
8152 pmbox->vport ? pmbox->vport->vpi : 0,
8153 pmbox->u.mb.mbxCommand,
8154 psli->sli_flag, flag);
58da1ffb 8155 goto out_not_finished;
dea3101e
JB
8156 }
8157
dea3101e
JB
8158 /* Another mailbox command is still being processed, queue this
8159 * command to be processed later.
8160 */
8161 lpfc_mbox_put(phba, pmbox);
8162
8163 /* Mbox cmd issue - BUSY */
ed957684 8164 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8165 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 8166 "x%x x%x x%x x%x\n",
92d7f7b0 8167 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
e92974f6
JS
8168 mbx->mbxCommand,
8169 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8170 psli->sli_flag, flag);
dea3101e
JB
8171
8172 psli->slistat.mbox_busy++;
2e0fef85 8173 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8174
858c9f6c
JS
8175 if (pmbox->vport) {
8176 lpfc_debugfs_disc_trc(pmbox->vport,
8177 LPFC_DISC_TRC_MBOX_VPORT,
8178 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8179 (uint32_t)mbx->mbxCommand,
8180 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8181 }
8182 else {
8183 lpfc_debugfs_disc_trc(phba->pport,
8184 LPFC_DISC_TRC_MBOX,
8185 "MBOX Bsy: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8186 (uint32_t)mbx->mbxCommand,
8187 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8188 }
8189
2e0fef85 8190 return MBX_BUSY;
dea3101e
JB
8191 }
8192
dea3101e
JB
8193 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8194
8195 /* If we are not polling, we MUST be in SLI2 mode */
8196 if (flag != MBX_POLL) {
3772a991 8197 if (!(psli->sli_flag & LPFC_SLI_ACTIVE) &&
bf07bdea 8198 (mbx->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 8199 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8200 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8201 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8202 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8203 "(%d):2531 Mailbox command x%x "
8204 "cannot issue Data: x%x x%x\n",
8205 pmbox->vport ? pmbox->vport->vpi : 0,
8206 pmbox->u.mb.mbxCommand,
8207 psli->sli_flag, flag);
58da1ffb 8208 goto out_not_finished;
dea3101e
JB
8209 }
8210 /* timeout active mbox command */
256ec0d0
JS
8211 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8212 1000);
8213 mod_timer(&psli->mbox_tmo, jiffies + timeout);
dea3101e
JB
8214 }
8215
8216 /* Mailbox cmd <cmd> issue */
ed957684 8217 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8218 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 8219 "x%x\n",
e8b62011 8220 pmbox->vport ? pmbox->vport->vpi : 0,
e92974f6
JS
8221 mbx->mbxCommand,
8222 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8223 psli->sli_flag, flag);
dea3101e 8224
bf07bdea 8225 if (mbx->mbxCommand != MBX_HEARTBEAT) {
858c9f6c
JS
8226 if (pmbox->vport) {
8227 lpfc_debugfs_disc_trc(pmbox->vport,
8228 LPFC_DISC_TRC_MBOX_VPORT,
8229 "MBOX Send vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8230 (uint32_t)mbx->mbxCommand,
8231 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8232 }
8233 else {
8234 lpfc_debugfs_disc_trc(phba->pport,
8235 LPFC_DISC_TRC_MBOX,
8236 "MBOX Send: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8237 (uint32_t)mbx->mbxCommand,
8238 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8239 }
8240 }
8241
dea3101e
JB
8242 psli->slistat.mbox_cmd++;
8243 evtctr = psli->slistat.mbox_event;
8244
8245 /* next set own bit for the adapter and copy over command word */
bf07bdea 8246 mbx->mbxOwner = OWN_CHIP;
dea3101e 8247
3772a991 8248 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
7a470277
JS
8249 /* Populate mbox extension offset word. */
8250 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len) {
bf07bdea 8251 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8252 = (uint8_t *)phba->mbox_ext
8253 - (uint8_t *)phba->mbox;
8254 }
8255
8256 /* Copy the mailbox extension data */
3e1f0718
JS
8257 if (pmbox->in_ext_byte_len && pmbox->ctx_buf) {
8258 lpfc_sli_pcimem_bcopy(pmbox->ctx_buf,
8259 (uint8_t *)phba->mbox_ext,
8260 pmbox->in_ext_byte_len);
7a470277
JS
8261 }
8262 /* Copy command data to host SLIM area */
bf07bdea 8263 lpfc_sli_pcimem_bcopy(mbx, phba->mbox, MAILBOX_CMD_SIZE);
dea3101e 8264 } else {
7a470277
JS
8265 /* Populate mbox extension offset word. */
8266 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len)
bf07bdea 8267 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8268 = MAILBOX_HBA_EXT_OFFSET;
8269
8270 /* Copy the mailbox extension data */
3e1f0718 8271 if (pmbox->in_ext_byte_len && pmbox->ctx_buf)
7a470277
JS
8272 lpfc_memcpy_to_slim(phba->MBslimaddr +
8273 MAILBOX_HBA_EXT_OFFSET,
3e1f0718 8274 pmbox->ctx_buf, pmbox->in_ext_byte_len);
7a470277 8275
895427bd 8276 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8277 /* copy command data into host mbox for cmpl */
895427bd
JS
8278 lpfc_sli_pcimem_bcopy(mbx, phba->mbox,
8279 MAILBOX_CMD_SIZE);
dea3101e
JB
8280
8281 /* First copy mbox command data to HBA SLIM, skip past first
8282 word */
8283 to_slim = phba->MBslimaddr + sizeof (uint32_t);
bf07bdea 8284 lpfc_memcpy_to_slim(to_slim, &mbx->un.varWords[0],
dea3101e
JB
8285 MAILBOX_CMD_SIZE - sizeof (uint32_t));
8286
8287 /* Next copy over first word, with mbxOwner set */
bf07bdea 8288 ldata = *((uint32_t *)mbx);
dea3101e
JB
8289 to_slim = phba->MBslimaddr;
8290 writel(ldata, to_slim);
8291 readl(to_slim); /* flush */
8292
895427bd 8293 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8294 /* switch over to host mailbox */
3772a991 8295 psli->sli_flag |= LPFC_SLI_ACTIVE;
dea3101e
JB
8296 }
8297
8298 wmb();
dea3101e
JB
8299
8300 switch (flag) {
8301 case MBX_NOWAIT:
09372820 8302 /* Set up reference to mailbox command */
dea3101e 8303 psli->mbox_active = pmbox;
09372820
JS
8304 /* Interrupt board to do it */
8305 writel(CA_MBATT, phba->CAregaddr);
8306 readl(phba->CAregaddr); /* flush */
8307 /* Don't wait for it to finish, just return */
dea3101e
JB
8308 break;
8309
8310 case MBX_POLL:
09372820 8311 /* Set up null reference to mailbox command */
dea3101e 8312 psli->mbox_active = NULL;
09372820
JS
8313 /* Interrupt board to do it */
8314 writel(CA_MBATT, phba->CAregaddr);
8315 readl(phba->CAregaddr); /* flush */
8316
3772a991 8317 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8318 /* First read mbox status word */
34b02dcd 8319 word0 = *((uint32_t *)phba->mbox);
dea3101e
JB
8320 word0 = le32_to_cpu(word0);
8321 } else {
8322 /* First read mbox status word */
9940b97b
JS
8323 if (lpfc_readl(phba->MBslimaddr, &word0)) {
8324 spin_unlock_irqrestore(&phba->hbalock,
8325 drvr_flag);
8326 goto out_not_finished;
8327 }
dea3101e
JB
8328 }
8329
8330 /* Read the HBA Host Attention Register */
9940b97b
JS
8331 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8332 spin_unlock_irqrestore(&phba->hbalock,
8333 drvr_flag);
8334 goto out_not_finished;
8335 }
a183a15f
JS
8336 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8337 1000) + jiffies;
09372820 8338 i = 0;
dea3101e 8339 /* Wait for command to complete */
41415862
JW
8340 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
8341 (!(ha_copy & HA_MBATT) &&
2e0fef85 8342 (phba->link_state > LPFC_WARM_START))) {
09372820 8343 if (time_after(jiffies, timeout)) {
dea3101e 8344 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8345 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 8346 drvr_flag);
58da1ffb 8347 goto out_not_finished;
dea3101e
JB
8348 }
8349
8350 /* Check if we took a mbox interrupt while we were
8351 polling */
8352 if (((word0 & OWN_CHIP) != OWN_CHIP)
8353 && (evtctr != psli->slistat.mbox_event))
8354 break;
8355
09372820
JS
8356 if (i++ > 10) {
8357 spin_unlock_irqrestore(&phba->hbalock,
8358 drvr_flag);
8359 msleep(1);
8360 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8361 }
dea3101e 8362
3772a991 8363 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8364 /* First copy command data */
34b02dcd 8365 word0 = *((uint32_t *)phba->mbox);
dea3101e 8366 word0 = le32_to_cpu(word0);
bf07bdea 8367 if (mbx->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 8368 MAILBOX_t *slimmb;
34b02dcd 8369 uint32_t slimword0;
dea3101e
JB
8370 /* Check real SLIM for any errors */
8371 slimword0 = readl(phba->MBslimaddr);
8372 slimmb = (MAILBOX_t *) & slimword0;
8373 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
8374 && slimmb->mbxStatus) {
8375 psli->sli_flag &=
3772a991 8376 ~LPFC_SLI_ACTIVE;
dea3101e
JB
8377 word0 = slimword0;
8378 }
8379 }
8380 } else {
8381 /* First copy command data */
8382 word0 = readl(phba->MBslimaddr);
8383 }
8384 /* Read the HBA Host Attention Register */
9940b97b
JS
8385 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8386 spin_unlock_irqrestore(&phba->hbalock,
8387 drvr_flag);
8388 goto out_not_finished;
8389 }
dea3101e
JB
8390 }
8391
3772a991 8392 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8393 /* copy results back to user */
2ea259ee
JS
8394 lpfc_sli_pcimem_bcopy(phba->mbox, mbx,
8395 MAILBOX_CMD_SIZE);
7a470277 8396 /* Copy the mailbox extension data */
3e1f0718 8397 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
7a470277 8398 lpfc_sli_pcimem_bcopy(phba->mbox_ext,
3e1f0718 8399 pmbox->ctx_buf,
7a470277
JS
8400 pmbox->out_ext_byte_len);
8401 }
dea3101e
JB
8402 } else {
8403 /* First copy command data */
bf07bdea 8404 lpfc_memcpy_from_slim(mbx, phba->MBslimaddr,
2ea259ee 8405 MAILBOX_CMD_SIZE);
7a470277 8406 /* Copy the mailbox extension data */
3e1f0718
JS
8407 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
8408 lpfc_memcpy_from_slim(
8409 pmbox->ctx_buf,
7a470277
JS
8410 phba->MBslimaddr +
8411 MAILBOX_HBA_EXT_OFFSET,
8412 pmbox->out_ext_byte_len);
dea3101e
JB
8413 }
8414 }
8415
8416 writel(HA_MBATT, phba->HAregaddr);
8417 readl(phba->HAregaddr); /* flush */
8418
8419 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
bf07bdea 8420 status = mbx->mbxStatus;
dea3101e
JB
8421 }
8422
2e0fef85
JS
8423 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8424 return status;
58da1ffb
JS
8425
8426out_not_finished:
8427 if (processing_queue) {
da0436e9 8428 pmbox->u.mb.mbxStatus = MBX_NOT_FINISHED;
58da1ffb
JS
8429 lpfc_mbox_cmpl_put(phba, pmbox);
8430 }
8431 return MBX_NOT_FINISHED;
dea3101e
JB
8432}
8433
f1126688
JS
8434/**
8435 * lpfc_sli4_async_mbox_block - Block posting SLI4 asynchronous mailbox command
8436 * @phba: Pointer to HBA context object.
8437 *
8438 * The function blocks the posting of SLI4 asynchronous mailbox commands from
8439 * the driver internal pending mailbox queue. It will then try to wait out the
8440 * possible outstanding mailbox command before return.
8441 *
8442 * Returns:
8443 * 0 - the outstanding mailbox command completed; otherwise, the wait for
8444 * the outstanding mailbox command timed out.
8445 **/
8446static int
8447lpfc_sli4_async_mbox_block(struct lpfc_hba *phba)
8448{
8449 struct lpfc_sli *psli = &phba->sli;
f1126688 8450 int rc = 0;
a183a15f 8451 unsigned long timeout = 0;
f1126688
JS
8452
8453 /* Mark the asynchronous mailbox command posting as blocked */
8454 spin_lock_irq(&phba->hbalock);
8455 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
f1126688
JS
8456 /* Determine how long we might wait for the active mailbox
8457 * command to be gracefully completed by firmware.
8458 */
a183a15f
JS
8459 if (phba->sli.mbox_active)
8460 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
8461 phba->sli.mbox_active) *
8462 1000) + jiffies;
8463 spin_unlock_irq(&phba->hbalock);
8464
e8d3c3b1
JS
8465 /* Make sure the mailbox is really active */
8466 if (timeout)
8467 lpfc_sli4_process_missed_mbox_completions(phba);
8468
f1126688
JS
8469 /* Wait for the outstnading mailbox command to complete */
8470 while (phba->sli.mbox_active) {
8471 /* Check active mailbox complete status every 2ms */
8472 msleep(2);
8473 if (time_after(jiffies, timeout)) {
8474 /* Timeout, marked the outstanding cmd not complete */
8475 rc = 1;
8476 break;
8477 }
8478 }
8479
8480 /* Can not cleanly block async mailbox command, fails it */
8481 if (rc) {
8482 spin_lock_irq(&phba->hbalock);
8483 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8484 spin_unlock_irq(&phba->hbalock);
8485 }
8486 return rc;
8487}
8488
8489/**
8490 * lpfc_sli4_async_mbox_unblock - Block posting SLI4 async mailbox command
8491 * @phba: Pointer to HBA context object.
8492 *
8493 * The function unblocks and resume posting of SLI4 asynchronous mailbox
8494 * commands from the driver internal pending mailbox queue. It makes sure
8495 * that there is no outstanding mailbox command before resuming posting
8496 * asynchronous mailbox commands. If, for any reason, there is outstanding
8497 * mailbox command, it will try to wait it out before resuming asynchronous
8498 * mailbox command posting.
8499 **/
8500static void
8501lpfc_sli4_async_mbox_unblock(struct lpfc_hba *phba)
8502{
8503 struct lpfc_sli *psli = &phba->sli;
8504
8505 spin_lock_irq(&phba->hbalock);
8506 if (!(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8507 /* Asynchronous mailbox posting is not blocked, do nothing */
8508 spin_unlock_irq(&phba->hbalock);
8509 return;
8510 }
8511
8512 /* Outstanding synchronous mailbox command is guaranteed to be done,
8513 * successful or timeout, after timing-out the outstanding mailbox
8514 * command shall always be removed, so just unblock posting async
8515 * mailbox command and resume
8516 */
8517 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8518 spin_unlock_irq(&phba->hbalock);
8519
8520 /* wake up worker thread to post asynchronlous mailbox command */
8521 lpfc_worker_wake_up(phba);
8522}
8523
2d843edc
JS
8524/**
8525 * lpfc_sli4_wait_bmbx_ready - Wait for bootstrap mailbox register ready
8526 * @phba: Pointer to HBA context object.
8527 * @mboxq: Pointer to mailbox object.
8528 *
8529 * The function waits for the bootstrap mailbox register ready bit from
8530 * port for twice the regular mailbox command timeout value.
8531 *
8532 * 0 - no timeout on waiting for bootstrap mailbox register ready.
8533 * MBXERR_ERROR - wait for bootstrap mailbox register timed out.
8534 **/
8535static int
8536lpfc_sli4_wait_bmbx_ready(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8537{
8538 uint32_t db_ready;
8539 unsigned long timeout;
8540 struct lpfc_register bmbx_reg;
8541
8542 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, mboxq)
8543 * 1000) + jiffies;
8544
8545 do {
8546 bmbx_reg.word0 = readl(phba->sli4_hba.BMBXregaddr);
8547 db_ready = bf_get(lpfc_bmbx_rdy, &bmbx_reg);
8548 if (!db_ready)
e2ffe4d5 8549 mdelay(2);
2d843edc
JS
8550
8551 if (time_after(jiffies, timeout))
8552 return MBXERR_ERROR;
8553 } while (!db_ready);
8554
8555 return 0;
8556}
8557
da0436e9
JS
8558/**
8559 * lpfc_sli4_post_sync_mbox - Post an SLI4 mailbox to the bootstrap mailbox
8560 * @phba: Pointer to HBA context object.
8561 * @mboxq: Pointer to mailbox object.
8562 *
8563 * The function posts a mailbox to the port. The mailbox is expected
8564 * to be comletely filled in and ready for the port to operate on it.
8565 * This routine executes a synchronous completion operation on the
8566 * mailbox by polling for its completion.
8567 *
8568 * The caller must not be holding any locks when calling this routine.
8569 *
8570 * Returns:
8571 * MBX_SUCCESS - mailbox posted successfully
8572 * Any of the MBX error values.
8573 **/
8574static int
8575lpfc_sli4_post_sync_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8576{
8577 int rc = MBX_SUCCESS;
8578 unsigned long iflag;
da0436e9
JS
8579 uint32_t mcqe_status;
8580 uint32_t mbx_cmnd;
da0436e9
JS
8581 struct lpfc_sli *psli = &phba->sli;
8582 struct lpfc_mqe *mb = &mboxq->u.mqe;
8583 struct lpfc_bmbx_create *mbox_rgn;
8584 struct dma_address *dma_address;
da0436e9
JS
8585
8586 /*
8587 * Only one mailbox can be active to the bootstrap mailbox region
8588 * at a time and there is no queueing provided.
8589 */
8590 spin_lock_irqsave(&phba->hbalock, iflag);
8591 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8592 spin_unlock_irqrestore(&phba->hbalock, iflag);
8593 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8594 "(%d):2532 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8595 "cannot issue Data: x%x x%x\n",
8596 mboxq->vport ? mboxq->vport->vpi : 0,
8597 mboxq->u.mb.mbxCommand,
a183a15f
JS
8598 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8599 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8600 psli->sli_flag, MBX_POLL);
8601 return MBXERR_ERROR;
8602 }
8603 /* The server grabs the token and owns it until release */
8604 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8605 phba->sli.mbox_active = mboxq;
8606 spin_unlock_irqrestore(&phba->hbalock, iflag);
8607
2d843edc
JS
8608 /* wait for bootstrap mbox register for readyness */
8609 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8610 if (rc)
8611 goto exit;
da0436e9
JS
8612 /*
8613 * Initialize the bootstrap memory region to avoid stale data areas
8614 * in the mailbox post. Then copy the caller's mailbox contents to
8615 * the bmbx mailbox region.
8616 */
8617 mbx_cmnd = bf_get(lpfc_mqe_command, mb);
8618 memset(phba->sli4_hba.bmbx.avirt, 0, sizeof(struct lpfc_bmbx_create));
48f8fdb4
JS
8619 lpfc_sli4_pcimem_bcopy(mb, phba->sli4_hba.bmbx.avirt,
8620 sizeof(struct lpfc_mqe));
da0436e9
JS
8621
8622 /* Post the high mailbox dma address to the port and wait for ready. */
8623 dma_address = &phba->sli4_hba.bmbx.dma_address;
8624 writel(dma_address->addr_hi, phba->sli4_hba.BMBXregaddr);
8625
2d843edc
JS
8626 /* wait for bootstrap mbox register for hi-address write done */
8627 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8628 if (rc)
8629 goto exit;
da0436e9
JS
8630
8631 /* Post the low mailbox dma address to the port. */
8632 writel(dma_address->addr_lo, phba->sli4_hba.BMBXregaddr);
da0436e9 8633
2d843edc
JS
8634 /* wait for bootstrap mbox register for low address write done */
8635 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8636 if (rc)
8637 goto exit;
da0436e9
JS
8638
8639 /*
8640 * Read the CQ to ensure the mailbox has completed.
8641 * If so, update the mailbox status so that the upper layers
8642 * can complete the request normally.
8643 */
48f8fdb4
JS
8644 lpfc_sli4_pcimem_bcopy(phba->sli4_hba.bmbx.avirt, mb,
8645 sizeof(struct lpfc_mqe));
da0436e9 8646 mbox_rgn = (struct lpfc_bmbx_create *) phba->sli4_hba.bmbx.avirt;
48f8fdb4
JS
8647 lpfc_sli4_pcimem_bcopy(&mbox_rgn->mcqe, &mboxq->mcqe,
8648 sizeof(struct lpfc_mcqe));
da0436e9 8649 mcqe_status = bf_get(lpfc_mcqe_status, &mbox_rgn->mcqe);
0558056c
JS
8650 /*
8651 * When the CQE status indicates a failure and the mailbox status
8652 * indicates success then copy the CQE status into the mailbox status
8653 * (and prefix it with x4000).
8654 */
da0436e9 8655 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
0558056c
JS
8656 if (bf_get(lpfc_mqe_status, mb) == MBX_SUCCESS)
8657 bf_set(lpfc_mqe_status, mb,
8658 (LPFC_MBX_ERROR_RANGE | mcqe_status));
da0436e9 8659 rc = MBXERR_ERROR;
d7c47992
JS
8660 } else
8661 lpfc_sli4_swap_str(phba, mboxq);
da0436e9
JS
8662
8663 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8664 "(%d):0356 Mailbox cmd x%x (x%x/x%x) Status x%x "
da0436e9
JS
8665 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x"
8666 " x%x x%x CQ: x%x x%x x%x x%x\n",
a183a15f
JS
8667 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
8668 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8669 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8670 bf_get(lpfc_mqe_status, mb),
8671 mb->un.mb_words[0], mb->un.mb_words[1],
8672 mb->un.mb_words[2], mb->un.mb_words[3],
8673 mb->un.mb_words[4], mb->un.mb_words[5],
8674 mb->un.mb_words[6], mb->un.mb_words[7],
8675 mb->un.mb_words[8], mb->un.mb_words[9],
8676 mb->un.mb_words[10], mb->un.mb_words[11],
8677 mb->un.mb_words[12], mboxq->mcqe.word0,
8678 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
8679 mboxq->mcqe.trailer);
8680exit:
8681 /* We are holding the token, no needed for lock when release */
8682 spin_lock_irqsave(&phba->hbalock, iflag);
8683 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8684 phba->sli.mbox_active = NULL;
8685 spin_unlock_irqrestore(&phba->hbalock, iflag);
8686 return rc;
8687}
8688
8689/**
8690 * lpfc_sli_issue_mbox_s4 - Issue an SLI4 mailbox command to firmware
8691 * @phba: Pointer to HBA context object.
8692 * @pmbox: Pointer to mailbox object.
8693 * @flag: Flag indicating how the mailbox need to be processed.
8694 *
8695 * This function is called by discovery code and HBA management code to submit
8696 * a mailbox command to firmware with SLI-4 interface spec.
8697 *
8698 * Return codes the caller owns the mailbox command after the return of the
8699 * function.
8700 **/
8701static int
8702lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
8703 uint32_t flag)
8704{
8705 struct lpfc_sli *psli = &phba->sli;
8706 unsigned long iflags;
8707 int rc;
8708
b76f2dc9
JS
8709 /* dump from issue mailbox command if setup */
8710 lpfc_idiag_mbxacc_dump_issue_mbox(phba, &mboxq->u.mb);
8711
8fa38513
JS
8712 rc = lpfc_mbox_dev_check(phba);
8713 if (unlikely(rc)) {
8714 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8715 "(%d):2544 Mailbox command x%x (x%x/x%x) "
8fa38513
JS
8716 "cannot issue Data: x%x x%x\n",
8717 mboxq->vport ? mboxq->vport->vpi : 0,
8718 mboxq->u.mb.mbxCommand,
a183a15f
JS
8719 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8720 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
8fa38513
JS
8721 psli->sli_flag, flag);
8722 goto out_not_finished;
8723 }
8724
da0436e9
JS
8725 /* Detect polling mode and jump to a handler */
8726 if (!phba->sli4_hba.intr_enable) {
8727 if (flag == MBX_POLL)
8728 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8729 else
8730 rc = -EIO;
8731 if (rc != MBX_SUCCESS)
0558056c 8732 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
da0436e9 8733 "(%d):2541 Mailbox command x%x "
cc459f19
JS
8734 "(x%x/x%x) failure: "
8735 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8736 "Data: x%x x%x\n,",
da0436e9
JS
8737 mboxq->vport ? mboxq->vport->vpi : 0,
8738 mboxq->u.mb.mbxCommand,
a183a15f
JS
8739 lpfc_sli_config_mbox_subsys_get(phba,
8740 mboxq),
8741 lpfc_sli_config_mbox_opcode_get(phba,
8742 mboxq),
cc459f19
JS
8743 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8744 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8745 bf_get(lpfc_mcqe_ext_status,
8746 &mboxq->mcqe),
da0436e9
JS
8747 psli->sli_flag, flag);
8748 return rc;
8749 } else if (flag == MBX_POLL) {
f1126688
JS
8750 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
8751 "(%d):2542 Try to issue mailbox command "
7365f6fd 8752 "x%x (x%x/x%x) synchronously ahead of async "
f1126688 8753 "mailbox command queue: x%x x%x\n",
da0436e9
JS
8754 mboxq->vport ? mboxq->vport->vpi : 0,
8755 mboxq->u.mb.mbxCommand,
a183a15f
JS
8756 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8757 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9 8758 psli->sli_flag, flag);
f1126688
JS
8759 /* Try to block the asynchronous mailbox posting */
8760 rc = lpfc_sli4_async_mbox_block(phba);
8761 if (!rc) {
8762 /* Successfully blocked, now issue sync mbox cmd */
8763 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8764 if (rc != MBX_SUCCESS)
cc459f19 8765 lpfc_printf_log(phba, KERN_WARNING,
a183a15f 8766 LOG_MBOX | LOG_SLI,
cc459f19
JS
8767 "(%d):2597 Sync Mailbox command "
8768 "x%x (x%x/x%x) failure: "
8769 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8770 "Data: x%x x%x\n,",
8771 mboxq->vport ? mboxq->vport->vpi : 0,
a183a15f
JS
8772 mboxq->u.mb.mbxCommand,
8773 lpfc_sli_config_mbox_subsys_get(phba,
8774 mboxq),
8775 lpfc_sli_config_mbox_opcode_get(phba,
8776 mboxq),
cc459f19
JS
8777 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8778 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8779 bf_get(lpfc_mcqe_ext_status,
8780 &mboxq->mcqe),
a183a15f 8781 psli->sli_flag, flag);
f1126688
JS
8782 /* Unblock the async mailbox posting afterward */
8783 lpfc_sli4_async_mbox_unblock(phba);
8784 }
8785 return rc;
da0436e9
JS
8786 }
8787
8788 /* Now, interrupt mode asynchrous mailbox command */
8789 rc = lpfc_mbox_cmd_check(phba, mboxq);
8790 if (rc) {
8791 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8792 "(%d):2543 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8793 "cannot issue Data: x%x x%x\n",
8794 mboxq->vport ? mboxq->vport->vpi : 0,
8795 mboxq->u.mb.mbxCommand,
a183a15f
JS
8796 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8797 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8798 psli->sli_flag, flag);
8799 goto out_not_finished;
8800 }
da0436e9
JS
8801
8802 /* Put the mailbox command to the driver internal FIFO */
8803 psli->slistat.mbox_busy++;
8804 spin_lock_irqsave(&phba->hbalock, iflags);
8805 lpfc_mbox_put(phba, mboxq);
8806 spin_unlock_irqrestore(&phba->hbalock, iflags);
8807 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
8808 "(%d):0354 Mbox cmd issue - Enqueue Data: "
a183a15f 8809 "x%x (x%x/x%x) x%x x%x x%x\n",
da0436e9
JS
8810 mboxq->vport ? mboxq->vport->vpi : 0xffffff,
8811 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
a183a15f
JS
8812 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8813 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8814 phba->pport->port_state,
8815 psli->sli_flag, MBX_NOWAIT);
8816 /* Wake up worker thread to transport mailbox command from head */
8817 lpfc_worker_wake_up(phba);
8818
8819 return MBX_BUSY;
8820
8821out_not_finished:
8822 return MBX_NOT_FINISHED;
8823}
8824
8825/**
8826 * lpfc_sli4_post_async_mbox - Post an SLI4 mailbox command to device
8827 * @phba: Pointer to HBA context object.
8828 *
8829 * This function is called by worker thread to send a mailbox command to
8830 * SLI4 HBA firmware.
8831 *
8832 **/
8833int
8834lpfc_sli4_post_async_mbox(struct lpfc_hba *phba)
8835{
8836 struct lpfc_sli *psli = &phba->sli;
8837 LPFC_MBOXQ_t *mboxq;
8838 int rc = MBX_SUCCESS;
8839 unsigned long iflags;
8840 struct lpfc_mqe *mqe;
8841 uint32_t mbx_cmnd;
8842
8843 /* Check interrupt mode before post async mailbox command */
8844 if (unlikely(!phba->sli4_hba.intr_enable))
8845 return MBX_NOT_FINISHED;
8846
8847 /* Check for mailbox command service token */
8848 spin_lock_irqsave(&phba->hbalock, iflags);
8849 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8850 spin_unlock_irqrestore(&phba->hbalock, iflags);
8851 return MBX_NOT_FINISHED;
8852 }
8853 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8854 spin_unlock_irqrestore(&phba->hbalock, iflags);
8855 return MBX_NOT_FINISHED;
8856 }
8857 if (unlikely(phba->sli.mbox_active)) {
8858 spin_unlock_irqrestore(&phba->hbalock, iflags);
8859 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8860 "0384 There is pending active mailbox cmd\n");
8861 return MBX_NOT_FINISHED;
8862 }
8863 /* Take the mailbox command service token */
8864 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8865
8866 /* Get the next mailbox command from head of queue */
8867 mboxq = lpfc_mbox_get(phba);
8868
8869 /* If no more mailbox command waiting for post, we're done */
8870 if (!mboxq) {
8871 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8872 spin_unlock_irqrestore(&phba->hbalock, iflags);
8873 return MBX_SUCCESS;
8874 }
8875 phba->sli.mbox_active = mboxq;
8876 spin_unlock_irqrestore(&phba->hbalock, iflags);
8877
8878 /* Check device readiness for posting mailbox command */
8879 rc = lpfc_mbox_dev_check(phba);
8880 if (unlikely(rc))
8881 /* Driver clean routine will clean up pending mailbox */
8882 goto out_not_finished;
8883
8884 /* Prepare the mbox command to be posted */
8885 mqe = &mboxq->u.mqe;
8886 mbx_cmnd = bf_get(lpfc_mqe_command, mqe);
8887
8888 /* Start timer for the mbox_tmo and log some mailbox post messages */
8889 mod_timer(&psli->mbox_tmo, (jiffies +
256ec0d0 8890 msecs_to_jiffies(1000 * lpfc_mbox_tmo_val(phba, mboxq))));
da0436e9
JS
8891
8892 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8893 "(%d):0355 Mailbox cmd x%x (x%x/x%x) issue Data: "
da0436e9
JS
8894 "x%x x%x\n",
8895 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
a183a15f
JS
8896 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8897 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8898 phba->pport->port_state, psli->sli_flag);
8899
8900 if (mbx_cmnd != MBX_HEARTBEAT) {
8901 if (mboxq->vport) {
8902 lpfc_debugfs_disc_trc(mboxq->vport,
8903 LPFC_DISC_TRC_MBOX_VPORT,
8904 "MBOX Send vport: cmd:x%x mb:x%x x%x",
8905 mbx_cmnd, mqe->un.mb_words[0],
8906 mqe->un.mb_words[1]);
8907 } else {
8908 lpfc_debugfs_disc_trc(phba->pport,
8909 LPFC_DISC_TRC_MBOX,
8910 "MBOX Send: cmd:x%x mb:x%x x%x",
8911 mbx_cmnd, mqe->un.mb_words[0],
8912 mqe->un.mb_words[1]);
8913 }
8914 }
8915 psli->slistat.mbox_cmd++;
8916
8917 /* Post the mailbox command to the port */
8918 rc = lpfc_sli4_mq_put(phba->sli4_hba.mbx_wq, mqe);
8919 if (rc != MBX_SUCCESS) {
8920 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8921 "(%d):2533 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8922 "cannot issue Data: x%x x%x\n",
8923 mboxq->vport ? mboxq->vport->vpi : 0,
8924 mboxq->u.mb.mbxCommand,
a183a15f
JS
8925 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8926 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8927 psli->sli_flag, MBX_NOWAIT);
8928 goto out_not_finished;
8929 }
8930
8931 return rc;
8932
8933out_not_finished:
8934 spin_lock_irqsave(&phba->hbalock, iflags);
d7069f09
JS
8935 if (phba->sli.mbox_active) {
8936 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
8937 __lpfc_mbox_cmpl_put(phba, mboxq);
8938 /* Release the token */
8939 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8940 phba->sli.mbox_active = NULL;
8941 }
da0436e9
JS
8942 spin_unlock_irqrestore(&phba->hbalock, iflags);
8943
8944 return MBX_NOT_FINISHED;
8945}
8946
8947/**
8948 * lpfc_sli_issue_mbox - Wrapper func for issuing mailbox command
8949 * @phba: Pointer to HBA context object.
8950 * @pmbox: Pointer to mailbox object.
8951 * @flag: Flag indicating how the mailbox need to be processed.
8952 *
8953 * This routine wraps the actual SLI3 or SLI4 mailbox issuing routine from
8954 * the API jump table function pointer from the lpfc_hba struct.
8955 *
8956 * Return codes the caller owns the mailbox command after the return of the
8957 * function.
8958 **/
8959int
8960lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
8961{
8962 return phba->lpfc_sli_issue_mbox(phba, pmbox, flag);
8963}
8964
8965/**
25985edc 8966 * lpfc_mbox_api_table_setup - Set up mbox api function jump table
da0436e9
JS
8967 * @phba: The hba struct for which this call is being executed.
8968 * @dev_grp: The HBA PCI-Device group number.
8969 *
8970 * This routine sets up the mbox interface API function jump table in @phba
8971 * struct.
8972 * Returns: 0 - success, -ENODEV - failure.
8973 **/
8974int
8975lpfc_mbox_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
8976{
8977
8978 switch (dev_grp) {
8979 case LPFC_PCI_DEV_LP:
8980 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s3;
8981 phba->lpfc_sli_handle_slow_ring_event =
8982 lpfc_sli_handle_slow_ring_event_s3;
8983 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s3;
8984 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s3;
8985 phba->lpfc_sli_brdready = lpfc_sli_brdready_s3;
8986 break;
8987 case LPFC_PCI_DEV_OC:
8988 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s4;
8989 phba->lpfc_sli_handle_slow_ring_event =
8990 lpfc_sli_handle_slow_ring_event_s4;
8991 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s4;
8992 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s4;
8993 phba->lpfc_sli_brdready = lpfc_sli_brdready_s4;
8994 break;
8995 default:
8996 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8997 "1420 Invalid HBA PCI-device group: 0x%x\n",
8998 dev_grp);
8999 return -ENODEV;
9000 break;
9001 }
9002 return 0;
9003}
9004
e59058c4 9005/**
3621a710 9006 * __lpfc_sli_ringtx_put - Add an iocb to the txq
e59058c4
JS
9007 * @phba: Pointer to HBA context object.
9008 * @pring: Pointer to driver SLI ring object.
9009 * @piocb: Pointer to address of newly added command iocb.
9010 *
9011 * This function is called with hbalock held to add a command
9012 * iocb to the txq when SLI layer cannot submit the command iocb
9013 * to the ring.
9014 **/
2a9bf3d0 9015void
92d7f7b0 9016__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 9017 struct lpfc_iocbq *piocb)
dea3101e 9018{
1c2ba475 9019 lockdep_assert_held(&phba->hbalock);
dea3101e
JB
9020 /* Insert the caller's iocb in the txq tail for later processing. */
9021 list_add_tail(&piocb->list, &pring->txq);
dea3101e
JB
9022}
9023
e59058c4 9024/**
3621a710 9025 * lpfc_sli_next_iocb - Get the next iocb in the txq
e59058c4
JS
9026 * @phba: Pointer to HBA context object.
9027 * @pring: Pointer to driver SLI ring object.
9028 * @piocb: Pointer to address of newly added command iocb.
9029 *
9030 * This function is called with hbalock held before a new
9031 * iocb is submitted to the firmware. This function checks
9032 * txq to flush the iocbs in txq to Firmware before
9033 * submitting new iocbs to the Firmware.
9034 * If there are iocbs in the txq which need to be submitted
9035 * to firmware, lpfc_sli_next_iocb returns the first element
9036 * of the txq after dequeuing it from txq.
9037 * If there is no iocb in the txq then the function will return
9038 * *piocb and *piocb is set to NULL. Caller needs to check
9039 * *piocb to find if there are more commands in the txq.
9040 **/
dea3101e
JB
9041static struct lpfc_iocbq *
9042lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 9043 struct lpfc_iocbq **piocb)
dea3101e
JB
9044{
9045 struct lpfc_iocbq * nextiocb;
9046
1c2ba475
JT
9047 lockdep_assert_held(&phba->hbalock);
9048
dea3101e
JB
9049 nextiocb = lpfc_sli_ringtx_get(phba, pring);
9050 if (!nextiocb) {
9051 nextiocb = *piocb;
9052 *piocb = NULL;
9053 }
9054
9055 return nextiocb;
9056}
9057
e59058c4 9058/**
3772a991 9059 * __lpfc_sli_issue_iocb_s3 - SLI3 device lockless ver of lpfc_sli_issue_iocb
e59058c4 9060 * @phba: Pointer to HBA context object.
3772a991 9061 * @ring_number: SLI ring number to issue iocb on.
e59058c4
JS
9062 * @piocb: Pointer to command iocb.
9063 * @flag: Flag indicating if this command can be put into txq.
9064 *
3772a991
JS
9065 * __lpfc_sli_issue_iocb_s3 is used by other functions in the driver to issue
9066 * an iocb command to an HBA with SLI-3 interface spec. If the PCI slot is
9067 * recovering from error state, if HBA is resetting or if LPFC_STOP_IOCB_EVENT
9068 * flag is turned on, the function returns IOCB_ERROR. When the link is down,
9069 * this function allows only iocbs for posting buffers. This function finds
9070 * next available slot in the command ring and posts the command to the
9071 * available slot and writes the port attention register to request HBA start
9072 * processing new iocb. If there is no slot available in the ring and
9073 * flag & SLI_IOCB_RET_IOCB is set, the new iocb is added to the txq, otherwise
9074 * the function returns IOCB_BUSY.
e59058c4 9075 *
3772a991
JS
9076 * This function is called with hbalock held. The function will return success
9077 * after it successfully submit the iocb to firmware or after adding to the
9078 * txq.
e59058c4 9079 **/
98c9ea5c 9080static int
3772a991 9081__lpfc_sli_issue_iocb_s3(struct lpfc_hba *phba, uint32_t ring_number,
dea3101e
JB
9082 struct lpfc_iocbq *piocb, uint32_t flag)
9083{
9084 struct lpfc_iocbq *nextiocb;
9085 IOCB_t *iocb;
895427bd 9086 struct lpfc_sli_ring *pring = &phba->sli.sli3_ring[ring_number];
dea3101e 9087
1c2ba475
JT
9088 lockdep_assert_held(&phba->hbalock);
9089
92d7f7b0
JS
9090 if (piocb->iocb_cmpl && (!piocb->vport) &&
9091 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
9092 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
9093 lpfc_printf_log(phba, KERN_ERR,
9094 LOG_SLI | LOG_VPORT,
e8b62011 9095 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS
9096 piocb->iocb.ulpCommand);
9097 dump_stack();
9098 return IOCB_ERROR;
9099 }
9100
9101
8d63f375
LV
9102 /* If the PCI channel is in offline state, do not post iocbs. */
9103 if (unlikely(pci_channel_offline(phba->pcidev)))
9104 return IOCB_ERROR;
9105
a257bf90
JS
9106 /* If HBA has a deferred error attention, fail the iocb. */
9107 if (unlikely(phba->hba_flag & DEFER_ERATT))
9108 return IOCB_ERROR;
9109
dea3101e
JB
9110 /*
9111 * We should never get an IOCB if we are in a < LINK_DOWN state
9112 */
2e0fef85 9113 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB
9114 return IOCB_ERROR;
9115
9116 /*
9117 * Check to see if we are blocking IOCB processing because of a
0b727fea 9118 * outstanding event.
dea3101e 9119 */
0b727fea 9120 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e
JB
9121 goto iocb_busy;
9122
2e0fef85 9123 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 9124 /*
2680eeaa 9125 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB
9126 * can be issued if the link is not up.
9127 */
9128 switch (piocb->iocb.ulpCommand) {
84774a4d
JS
9129 case CMD_GEN_REQUEST64_CR:
9130 case CMD_GEN_REQUEST64_CX:
9131 if (!(phba->sli.sli_flag & LPFC_MENLO_MAINT) ||
9132 (piocb->iocb.un.genreq64.w5.hcsw.Rctl !=
6a9c52cf 9133 FC_RCTL_DD_UNSOL_CMD) ||
84774a4d
JS
9134 (piocb->iocb.un.genreq64.w5.hcsw.Type !=
9135 MENLO_TRANSPORT_TYPE))
9136
9137 goto iocb_busy;
9138 break;
dea3101e
JB
9139 case CMD_QUE_RING_BUF_CN:
9140 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB
9141 /*
9142 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
9143 * completion, iocb_cmpl MUST be 0.
9144 */
9145 if (piocb->iocb_cmpl)
9146 piocb->iocb_cmpl = NULL;
9147 /*FALLTHROUGH*/
9148 case CMD_CREATE_XRI_CR:
2680eeaa
JS
9149 case CMD_CLOSE_XRI_CN:
9150 case CMD_CLOSE_XRI_CX:
dea3101e
JB
9151 break;
9152 default:
9153 goto iocb_busy;
9154 }
9155
9156 /*
9157 * For FCP commands, we must be in a state where we can process link
9158 * attention events.
9159 */
895427bd 9160 } else if (unlikely(pring->ringno == LPFC_FCP_RING &&
92d7f7b0 9161 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 9162 goto iocb_busy;
92d7f7b0 9163 }
dea3101e 9164
dea3101e
JB
9165 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
9166 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
9167 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
9168
9169 if (iocb)
9170 lpfc_sli_update_ring(phba, pring);
9171 else
9172 lpfc_sli_update_full_ring(phba, pring);
9173
9174 if (!piocb)
9175 return IOCB_SUCCESS;
9176
9177 goto out_busy;
9178
9179 iocb_busy:
9180 pring->stats.iocb_cmd_delay++;
9181
9182 out_busy:
9183
9184 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 9185 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB
9186 return IOCB_SUCCESS;
9187 }
9188
9189 return IOCB_BUSY;
9190}
9191
3772a991 9192/**
4f774513
JS
9193 * lpfc_sli4_bpl2sgl - Convert the bpl/bde to a sgl.
9194 * @phba: Pointer to HBA context object.
9195 * @piocb: Pointer to command iocb.
9196 * @sglq: Pointer to the scatter gather queue object.
9197 *
9198 * This routine converts the bpl or bde that is in the IOCB
9199 * to a sgl list for the sli4 hardware. The physical address
9200 * of the bpl/bde is converted back to a virtual address.
9201 * If the IOCB contains a BPL then the list of BDE's is
9202 * converted to sli4_sge's. If the IOCB contains a single
9203 * BDE then it is converted to a single sli_sge.
9204 * The IOCB is still in cpu endianess so the contents of
9205 * the bpl can be used without byte swapping.
9206 *
9207 * Returns valid XRI = Success, NO_XRI = Failure.
9208**/
9209static uint16_t
9210lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
9211 struct lpfc_sglq *sglq)
3772a991 9212{
4f774513
JS
9213 uint16_t xritag = NO_XRI;
9214 struct ulp_bde64 *bpl = NULL;
9215 struct ulp_bde64 bde;
9216 struct sli4_sge *sgl = NULL;
1b51197d 9217 struct lpfc_dmabuf *dmabuf;
4f774513
JS
9218 IOCB_t *icmd;
9219 int numBdes = 0;
9220 int i = 0;
63e801ce
JS
9221 uint32_t offset = 0; /* accumulated offset in the sg request list */
9222 int inbound = 0; /* number of sg reply entries inbound from firmware */
3772a991 9223
4f774513
JS
9224 if (!piocbq || !sglq)
9225 return xritag;
9226
9227 sgl = (struct sli4_sge *)sglq->sgl;
9228 icmd = &piocbq->iocb;
6b5151fd
JS
9229 if (icmd->ulpCommand == CMD_XMIT_BLS_RSP64_CX)
9230 return sglq->sli4_xritag;
4f774513
JS
9231 if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
9232 numBdes = icmd->un.genreq64.bdl.bdeSize /
9233 sizeof(struct ulp_bde64);
9234 /* The addrHigh and addrLow fields within the IOCB
9235 * have not been byteswapped yet so there is no
9236 * need to swap them back.
9237 */
1b51197d
JS
9238 if (piocbq->context3)
9239 dmabuf = (struct lpfc_dmabuf *)piocbq->context3;
9240 else
9241 return xritag;
4f774513 9242
1b51197d 9243 bpl = (struct ulp_bde64 *)dmabuf->virt;
4f774513
JS
9244 if (!bpl)
9245 return xritag;
9246
9247 for (i = 0; i < numBdes; i++) {
9248 /* Should already be byte swapped. */
28baac74
JS
9249 sgl->addr_hi = bpl->addrHigh;
9250 sgl->addr_lo = bpl->addrLow;
9251
0558056c 9252 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9253 if ((i+1) == numBdes)
9254 bf_set(lpfc_sli4_sge_last, sgl, 1);
9255 else
9256 bf_set(lpfc_sli4_sge_last, sgl, 0);
28baac74
JS
9257 /* swap the size field back to the cpu so we
9258 * can assign it to the sgl.
9259 */
9260 bde.tus.w = le32_to_cpu(bpl->tus.w);
9261 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
63e801ce
JS
9262 /* The offsets in the sgl need to be accumulated
9263 * separately for the request and reply lists.
9264 * The request is always first, the reply follows.
9265 */
9266 if (piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) {
9267 /* add up the reply sg entries */
9268 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
9269 inbound++;
9270 /* first inbound? reset the offset */
9271 if (inbound == 1)
9272 offset = 0;
9273 bf_set(lpfc_sli4_sge_offset, sgl, offset);
f9bb2da1
JS
9274 bf_set(lpfc_sli4_sge_type, sgl,
9275 LPFC_SGE_TYPE_DATA);
63e801ce
JS
9276 offset += bde.tus.f.bdeSize;
9277 }
546fc854 9278 sgl->word2 = cpu_to_le32(sgl->word2);
4f774513
JS
9279 bpl++;
9280 sgl++;
9281 }
9282 } else if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BDE_64) {
9283 /* The addrHigh and addrLow fields of the BDE have not
9284 * been byteswapped yet so they need to be swapped
9285 * before putting them in the sgl.
9286 */
9287 sgl->addr_hi =
9288 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh);
9289 sgl->addr_lo =
9290 cpu_to_le32(icmd->un.genreq64.bdl.addrLow);
0558056c 9291 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9292 bf_set(lpfc_sli4_sge_last, sgl, 1);
9293 sgl->word2 = cpu_to_le32(sgl->word2);
28baac74
JS
9294 sgl->sge_len =
9295 cpu_to_le32(icmd->un.genreq64.bdl.bdeSize);
4f774513
JS
9296 }
9297 return sglq->sli4_xritag;
3772a991 9298}
92d7f7b0 9299
e59058c4 9300/**
4f774513 9301 * lpfc_sli_iocb2wqe - Convert the IOCB to a work queue entry.
e59058c4 9302 * @phba: Pointer to HBA context object.
4f774513
JS
9303 * @piocb: Pointer to command iocb.
9304 * @wqe: Pointer to the work queue entry.
e59058c4 9305 *
4f774513
JS
9306 * This routine converts the iocb command to its Work Queue Entry
9307 * equivalent. The wqe pointer should not have any fields set when
9308 * this routine is called because it will memcpy over them.
9309 * This routine does not set the CQ_ID or the WQEC bits in the
9310 * wqe.
e59058c4 9311 *
4f774513 9312 * Returns: 0 = Success, IOCB_ERROR = Failure.
e59058c4 9313 **/
cf5bf97e 9314static int
4f774513 9315lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
205e8240 9316 union lpfc_wqe128 *wqe)
cf5bf97e 9317{
5ffc266e 9318 uint32_t xmit_len = 0, total_len = 0;
4f774513
JS
9319 uint8_t ct = 0;
9320 uint32_t fip;
9321 uint32_t abort_tag;
9322 uint8_t command_type = ELS_COMMAND_NON_FIP;
9323 uint8_t cmnd;
9324 uint16_t xritag;
dcf2a4e0
JS
9325 uint16_t abrt_iotag;
9326 struct lpfc_iocbq *abrtiocbq;
4f774513 9327 struct ulp_bde64 *bpl = NULL;
f0d9bccc 9328 uint32_t els_id = LPFC_ELS_ID_DEFAULT;
5ffc266e
JS
9329 int numBdes, i;
9330 struct ulp_bde64 bde;
c31098ce 9331 struct lpfc_nodelist *ndlp;
ff78d8f9 9332 uint32_t *pcmd;
1b51197d 9333 uint32_t if_type;
4f774513 9334
45ed1190 9335 fip = phba->hba_flag & HBA_FIP_SUPPORT;
4f774513 9336 /* The fcp commands will set command type */
0c287589 9337 if (iocbq->iocb_flag & LPFC_IO_FCP)
4f774513 9338 command_type = FCP_COMMAND;
c868595d 9339 else if (fip && (iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK))
0c287589
JS
9340 command_type = ELS_COMMAND_FIP;
9341 else
9342 command_type = ELS_COMMAND_NON_FIP;
9343
b5c53958
JS
9344 if (phba->fcp_embed_io)
9345 memset(wqe, 0, sizeof(union lpfc_wqe128));
4f774513
JS
9346 /* Some of the fields are in the right position already */
9347 memcpy(wqe, &iocbq->iocb, sizeof(union lpfc_wqe));
ae9e28f3
JS
9348 if (iocbq->iocb.ulpCommand != CMD_SEND_FRAME) {
9349 /* The ct field has moved so reset */
9350 wqe->generic.wqe_com.word7 = 0;
9351 wqe->generic.wqe_com.word10 = 0;
9352 }
b5c53958
JS
9353
9354 abort_tag = (uint32_t) iocbq->iotag;
9355 xritag = iocbq->sli4_xritag;
4f774513
JS
9356 /* words0-2 bpl convert bde */
9357 if (iocbq->iocb.un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
5ffc266e
JS
9358 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9359 sizeof(struct ulp_bde64);
4f774513
JS
9360 bpl = (struct ulp_bde64 *)
9361 ((struct lpfc_dmabuf *)iocbq->context3)->virt;
9362 if (!bpl)
9363 return IOCB_ERROR;
cf5bf97e 9364
4f774513
JS
9365 /* Should already be byte swapped. */
9366 wqe->generic.bde.addrHigh = le32_to_cpu(bpl->addrHigh);
9367 wqe->generic.bde.addrLow = le32_to_cpu(bpl->addrLow);
9368 /* swap the size field back to the cpu so we
9369 * can assign it to the sgl.
9370 */
9371 wqe->generic.bde.tus.w = le32_to_cpu(bpl->tus.w);
5ffc266e
JS
9372 xmit_len = wqe->generic.bde.tus.f.bdeSize;
9373 total_len = 0;
9374 for (i = 0; i < numBdes; i++) {
9375 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
9376 total_len += bde.tus.f.bdeSize;
9377 }
4f774513 9378 } else
5ffc266e 9379 xmit_len = iocbq->iocb.un.fcpi64.bdl.bdeSize;
cf5bf97e 9380
4f774513
JS
9381 iocbq->iocb.ulpIoTag = iocbq->iotag;
9382 cmnd = iocbq->iocb.ulpCommand;
a4bc3379 9383
4f774513
JS
9384 switch (iocbq->iocb.ulpCommand) {
9385 case CMD_ELS_REQUEST64_CR:
93d1379e
JS
9386 if (iocbq->iocb_flag & LPFC_IO_LIBDFC)
9387 ndlp = iocbq->context_un.ndlp;
9388 else
9389 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513
JS
9390 if (!iocbq->iocb.ulpLe) {
9391 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9392 "2007 Only Limited Edition cmd Format"
9393 " supported 0x%x\n",
9394 iocbq->iocb.ulpCommand);
9395 return IOCB_ERROR;
9396 }
ff78d8f9 9397
5ffc266e 9398 wqe->els_req.payload_len = xmit_len;
4f774513
JS
9399 /* Els_reguest64 has a TMO */
9400 bf_set(wqe_tmo, &wqe->els_req.wqe_com,
9401 iocbq->iocb.ulpTimeout);
9402 /* Need a VF for word 4 set the vf bit*/
9403 bf_set(els_req64_vf, &wqe->els_req, 0);
9404 /* And a VFID for word 12 */
9405 bf_set(els_req64_vfid, &wqe->els_req, 0);
4f774513 9406 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
f0d9bccc
JS
9407 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9408 iocbq->iocb.ulpContext);
9409 bf_set(wqe_ct, &wqe->els_req.wqe_com, ct);
9410 bf_set(wqe_pu, &wqe->els_req.wqe_com, 0);
4f774513 9411 /* CCP CCPE PV PRI in word10 were set in the memcpy */
ff78d8f9 9412 if (command_type == ELS_COMMAND_FIP)
c868595d
JS
9413 els_id = ((iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK)
9414 >> LPFC_FIP_ELS_ID_SHIFT);
ff78d8f9
JS
9415 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9416 iocbq->context2)->virt);
1b51197d
JS
9417 if_type = bf_get(lpfc_sli_intf_if_type,
9418 &phba->sli4_hba.sli_intf);
27d6ac0a 9419 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
ff78d8f9 9420 if (pcmd && (*pcmd == ELS_CMD_FLOGI ||
cb69f7de 9421 *pcmd == ELS_CMD_SCR ||
f60cb93b 9422 *pcmd == ELS_CMD_RSCN_XMT ||
6b5151fd 9423 *pcmd == ELS_CMD_FDISC ||
bdcd2b92 9424 *pcmd == ELS_CMD_LOGO ||
ff78d8f9
JS
9425 *pcmd == ELS_CMD_PLOGI)) {
9426 bf_set(els_req64_sp, &wqe->els_req, 1);
9427 bf_set(els_req64_sid, &wqe->els_req,
9428 iocbq->vport->fc_myDID);
939723a4
JS
9429 if ((*pcmd == ELS_CMD_FLOGI) &&
9430 !(phba->fc_topology ==
9431 LPFC_TOPOLOGY_LOOP))
9432 bf_set(els_req64_sid, &wqe->els_req, 0);
ff78d8f9
JS
9433 bf_set(wqe_ct, &wqe->els_req.wqe_com, 1);
9434 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
a7dd9c0f 9435 phba->vpi_ids[iocbq->vport->vpi]);
3ef6d24c 9436 } else if (pcmd && iocbq->context1) {
ff78d8f9
JS
9437 bf_set(wqe_ct, &wqe->els_req.wqe_com, 0);
9438 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9439 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
9440 }
c868595d 9441 }
6d368e53
JS
9442 bf_set(wqe_temp_rpi, &wqe->els_req.wqe_com,
9443 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
f0d9bccc
JS
9444 bf_set(wqe_els_id, &wqe->els_req.wqe_com, els_id);
9445 bf_set(wqe_dbde, &wqe->els_req.wqe_com, 1);
9446 bf_set(wqe_iod, &wqe->els_req.wqe_com, LPFC_WQE_IOD_READ);
9447 bf_set(wqe_qosd, &wqe->els_req.wqe_com, 1);
9448 bf_set(wqe_lenloc, &wqe->els_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9449 bf_set(wqe_ebde_cnt, &wqe->els_req.wqe_com, 0);
af22741c 9450 wqe->els_req.max_response_payload_len = total_len - xmit_len;
7851fe2c 9451 break;
5ffc266e 9452 case CMD_XMIT_SEQUENCE64_CX:
f0d9bccc
JS
9453 bf_set(wqe_ctxt_tag, &wqe->xmit_sequence.wqe_com,
9454 iocbq->iocb.un.ulpWord[3]);
9455 bf_set(wqe_rcvoxid, &wqe->xmit_sequence.wqe_com,
7851fe2c 9456 iocbq->iocb.unsli3.rcvsli3.ox_id);
5ffc266e
JS
9457 /* The entire sequence is transmitted for this IOCB */
9458 xmit_len = total_len;
9459 cmnd = CMD_XMIT_SEQUENCE64_CR;
1b51197d
JS
9460 if (phba->link_flag & LS_LOOPBACK_MODE)
9461 bf_set(wqe_xo, &wqe->xmit_sequence.wge_ctl, 1);
5bd5f66c 9462 /* fall through */
4f774513 9463 case CMD_XMIT_SEQUENCE64_CR:
f0d9bccc
JS
9464 /* word3 iocb=io_tag32 wqe=reserved */
9465 wqe->xmit_sequence.rsvd3 = 0;
4f774513
JS
9466 /* word4 relative_offset memcpy */
9467 /* word5 r_ctl/df_ctl memcpy */
f0d9bccc
JS
9468 bf_set(wqe_pu, &wqe->xmit_sequence.wqe_com, 0);
9469 bf_set(wqe_dbde, &wqe->xmit_sequence.wqe_com, 1);
9470 bf_set(wqe_iod, &wqe->xmit_sequence.wqe_com,
9471 LPFC_WQE_IOD_WRITE);
9472 bf_set(wqe_lenloc, &wqe->xmit_sequence.wqe_com,
9473 LPFC_WQE_LENLOC_WORD12);
9474 bf_set(wqe_ebde_cnt, &wqe->xmit_sequence.wqe_com, 0);
5ffc266e
JS
9475 wqe->xmit_sequence.xmit_len = xmit_len;
9476 command_type = OTHER_COMMAND;
7851fe2c 9477 break;
4f774513 9478 case CMD_XMIT_BCAST64_CN:
f0d9bccc
JS
9479 /* word3 iocb=iotag32 wqe=seq_payload_len */
9480 wqe->xmit_bcast64.seq_payload_len = xmit_len;
4f774513
JS
9481 /* word4 iocb=rsvd wqe=rsvd */
9482 /* word5 iocb=rctl/type/df_ctl wqe=rctl/type/df_ctl memcpy */
9483 /* word6 iocb=ctxt_tag/io_tag wqe=ctxt_tag/xri */
f0d9bccc 9484 bf_set(wqe_ct, &wqe->xmit_bcast64.wqe_com,
4f774513 9485 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
f0d9bccc
JS
9486 bf_set(wqe_dbde, &wqe->xmit_bcast64.wqe_com, 1);
9487 bf_set(wqe_iod, &wqe->xmit_bcast64.wqe_com, LPFC_WQE_IOD_WRITE);
9488 bf_set(wqe_lenloc, &wqe->xmit_bcast64.wqe_com,
9489 LPFC_WQE_LENLOC_WORD3);
9490 bf_set(wqe_ebde_cnt, &wqe->xmit_bcast64.wqe_com, 0);
7851fe2c 9491 break;
4f774513
JS
9492 case CMD_FCP_IWRITE64_CR:
9493 command_type = FCP_COMMAND_DATA_OUT;
f0d9bccc
JS
9494 /* word3 iocb=iotag wqe=payload_offset_len */
9495 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9496 bf_set(payload_offset_len, &wqe->fcp_iwrite,
9497 xmit_len + sizeof(struct fcp_rsp));
9498 bf_set(cmd_buff_len, &wqe->fcp_iwrite,
9499 0);
f0d9bccc
JS
9500 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9501 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9502 bf_set(wqe_erp, &wqe->fcp_iwrite.wqe_com,
9503 iocbq->iocb.ulpFCP2Rcvy);
9504 bf_set(wqe_lnk, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpXS);
9505 /* Always open the exchange */
f0d9bccc
JS
9506 bf_set(wqe_iod, &wqe->fcp_iwrite.wqe_com, LPFC_WQE_IOD_WRITE);
9507 bf_set(wqe_lenloc, &wqe->fcp_iwrite.wqe_com,
9508 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9509 bf_set(wqe_pu, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9510 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 1);
1ba981fd
JS
9511 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9512 bf_set(wqe_oas, &wqe->fcp_iwrite.wqe_com, 1);
c92c841c
JS
9513 bf_set(wqe_ccpe, &wqe->fcp_iwrite.wqe_com, 1);
9514 if (iocbq->priority) {
9515 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9516 (iocbq->priority << 1));
9517 } else {
1ba981fd
JS
9518 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9519 (phba->cfg_XLanePriority << 1));
9520 }
9521 }
b5c53958
JS
9522 /* Note, word 10 is already initialized to 0 */
9523
414abe0a
JS
9524 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9525 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9526 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 1);
9527 else
9528 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 0);
9529
b5c53958 9530 if (phba->fcp_embed_io) {
c490850a 9531 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9532 struct sli4_sge *sgl;
b5c53958
JS
9533 struct fcp_cmnd *fcp_cmnd;
9534 uint32_t *ptr;
9535
9536 /* 128 byte wqe support here */
b5c53958
JS
9537
9538 lpfc_cmd = iocbq->context1;
0794d601 9539 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9540 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9541
9542 /* Word 0-2 - FCP_CMND */
205e8240 9543 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9544 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9545 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9546 wqe->generic.bde.addrHigh = 0;
9547 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9548
205e8240
JS
9549 bf_set(wqe_wqes, &wqe->fcp_iwrite.wqe_com, 1);
9550 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 0);
b5c53958
JS
9551
9552 /* Word 22-29 FCP CMND Payload */
205e8240 9553 ptr = &wqe->words[22];
b5c53958
JS
9554 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9555 }
7851fe2c 9556 break;
4f774513 9557 case CMD_FCP_IREAD64_CR:
f0d9bccc
JS
9558 /* word3 iocb=iotag wqe=payload_offset_len */
9559 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9560 bf_set(payload_offset_len, &wqe->fcp_iread,
9561 xmit_len + sizeof(struct fcp_rsp));
9562 bf_set(cmd_buff_len, &wqe->fcp_iread,
9563 0);
f0d9bccc
JS
9564 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9565 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9566 bf_set(wqe_erp, &wqe->fcp_iread.wqe_com,
9567 iocbq->iocb.ulpFCP2Rcvy);
9568 bf_set(wqe_lnk, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpXS);
f1126688 9569 /* Always open the exchange */
f0d9bccc
JS
9570 bf_set(wqe_iod, &wqe->fcp_iread.wqe_com, LPFC_WQE_IOD_READ);
9571 bf_set(wqe_lenloc, &wqe->fcp_iread.wqe_com,
9572 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9573 bf_set(wqe_pu, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9574 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 1);
1ba981fd
JS
9575 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9576 bf_set(wqe_oas, &wqe->fcp_iread.wqe_com, 1);
c92c841c
JS
9577 bf_set(wqe_ccpe, &wqe->fcp_iread.wqe_com, 1);
9578 if (iocbq->priority) {
9579 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9580 (iocbq->priority << 1));
9581 } else {
1ba981fd
JS
9582 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9583 (phba->cfg_XLanePriority << 1));
9584 }
9585 }
b5c53958
JS
9586 /* Note, word 10 is already initialized to 0 */
9587
414abe0a
JS
9588 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9589 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9590 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 1);
9591 else
9592 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 0);
9593
b5c53958 9594 if (phba->fcp_embed_io) {
c490850a 9595 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9596 struct sli4_sge *sgl;
b5c53958
JS
9597 struct fcp_cmnd *fcp_cmnd;
9598 uint32_t *ptr;
9599
9600 /* 128 byte wqe support here */
b5c53958
JS
9601
9602 lpfc_cmd = iocbq->context1;
0794d601 9603 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9604 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9605
9606 /* Word 0-2 - FCP_CMND */
205e8240 9607 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9608 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9609 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9610 wqe->generic.bde.addrHigh = 0;
9611 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9612
205e8240
JS
9613 bf_set(wqe_wqes, &wqe->fcp_iread.wqe_com, 1);
9614 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 0);
b5c53958
JS
9615
9616 /* Word 22-29 FCP CMND Payload */
205e8240 9617 ptr = &wqe->words[22];
b5c53958
JS
9618 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9619 }
7851fe2c 9620 break;
4f774513 9621 case CMD_FCP_ICMND64_CR:
0ba4b219
JS
9622 /* word3 iocb=iotag wqe=payload_offset_len */
9623 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
9624 bf_set(payload_offset_len, &wqe->fcp_icmd,
9625 xmit_len + sizeof(struct fcp_rsp));
9626 bf_set(cmd_buff_len, &wqe->fcp_icmd,
9627 0);
f0d9bccc 9628 /* word3 iocb=IO_TAG wqe=reserved */
f0d9bccc 9629 bf_set(wqe_pu, &wqe->fcp_icmd.wqe_com, 0);
4f774513 9630 /* Always open the exchange */
f0d9bccc
JS
9631 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 1);
9632 bf_set(wqe_iod, &wqe->fcp_icmd.wqe_com, LPFC_WQE_IOD_WRITE);
9633 bf_set(wqe_qosd, &wqe->fcp_icmd.wqe_com, 1);
9634 bf_set(wqe_lenloc, &wqe->fcp_icmd.wqe_com,
9635 LPFC_WQE_LENLOC_NONE);
2a94aea4
JS
9636 bf_set(wqe_erp, &wqe->fcp_icmd.wqe_com,
9637 iocbq->iocb.ulpFCP2Rcvy);
1ba981fd
JS
9638 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9639 bf_set(wqe_oas, &wqe->fcp_icmd.wqe_com, 1);
c92c841c
JS
9640 bf_set(wqe_ccpe, &wqe->fcp_icmd.wqe_com, 1);
9641 if (iocbq->priority) {
9642 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9643 (iocbq->priority << 1));
9644 } else {
1ba981fd
JS
9645 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9646 (phba->cfg_XLanePriority << 1));
9647 }
9648 }
b5c53958
JS
9649 /* Note, word 10 is already initialized to 0 */
9650
9651 if (phba->fcp_embed_io) {
c490850a 9652 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9653 struct sli4_sge *sgl;
b5c53958
JS
9654 struct fcp_cmnd *fcp_cmnd;
9655 uint32_t *ptr;
9656
9657 /* 128 byte wqe support here */
b5c53958
JS
9658
9659 lpfc_cmd = iocbq->context1;
0794d601 9660 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9661 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9662
9663 /* Word 0-2 - FCP_CMND */
205e8240 9664 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9665 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9666 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9667 wqe->generic.bde.addrHigh = 0;
9668 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9669
205e8240
JS
9670 bf_set(wqe_wqes, &wqe->fcp_icmd.wqe_com, 1);
9671 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 0);
b5c53958
JS
9672
9673 /* Word 22-29 FCP CMND Payload */
205e8240 9674 ptr = &wqe->words[22];
b5c53958
JS
9675 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9676 }
7851fe2c 9677 break;
4f774513 9678 case CMD_GEN_REQUEST64_CR:
63e801ce
JS
9679 /* For this command calculate the xmit length of the
9680 * request bde.
9681 */
9682 xmit_len = 0;
9683 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9684 sizeof(struct ulp_bde64);
9685 for (i = 0; i < numBdes; i++) {
63e801ce 9686 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
546fc854
JS
9687 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
9688 break;
63e801ce
JS
9689 xmit_len += bde.tus.f.bdeSize;
9690 }
f0d9bccc
JS
9691 /* word3 iocb=IO_TAG wqe=request_payload_len */
9692 wqe->gen_req.request_payload_len = xmit_len;
9693 /* word4 iocb=parameter wqe=relative_offset memcpy */
9694 /* word5 [rctl, type, df_ctl, la] copied in memcpy */
4f774513
JS
9695 /* word6 context tag copied in memcpy */
9696 if (iocbq->iocb.ulpCt_h || iocbq->iocb.ulpCt_l) {
9697 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
9698 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9699 "2015 Invalid CT %x command 0x%x\n",
9700 ct, iocbq->iocb.ulpCommand);
9701 return IOCB_ERROR;
9702 }
f0d9bccc
JS
9703 bf_set(wqe_ct, &wqe->gen_req.wqe_com, 0);
9704 bf_set(wqe_tmo, &wqe->gen_req.wqe_com, iocbq->iocb.ulpTimeout);
9705 bf_set(wqe_pu, &wqe->gen_req.wqe_com, iocbq->iocb.ulpPU);
9706 bf_set(wqe_dbde, &wqe->gen_req.wqe_com, 1);
9707 bf_set(wqe_iod, &wqe->gen_req.wqe_com, LPFC_WQE_IOD_READ);
9708 bf_set(wqe_qosd, &wqe->gen_req.wqe_com, 1);
9709 bf_set(wqe_lenloc, &wqe->gen_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9710 bf_set(wqe_ebde_cnt, &wqe->gen_req.wqe_com, 0);
af22741c 9711 wqe->gen_req.max_response_payload_len = total_len - xmit_len;
4f774513 9712 command_type = OTHER_COMMAND;
7851fe2c 9713 break;
4f774513 9714 case CMD_XMIT_ELS_RSP64_CX:
c31098ce 9715 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513 9716 /* words0-2 BDE memcpy */
f0d9bccc
JS
9717 /* word3 iocb=iotag32 wqe=response_payload_len */
9718 wqe->xmit_els_rsp.response_payload_len = xmit_len;
939723a4
JS
9719 /* word4 */
9720 wqe->xmit_els_rsp.word4 = 0;
4f774513
JS
9721 /* word5 iocb=rsvd wge=did */
9722 bf_set(wqe_els_did, &wqe->xmit_els_rsp.wqe_dest,
939723a4
JS
9723 iocbq->iocb.un.xseq64.xmit_els_remoteID);
9724
9725 if_type = bf_get(lpfc_sli_intf_if_type,
9726 &phba->sli4_hba.sli_intf);
27d6ac0a 9727 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
939723a4
JS
9728 if (iocbq->vport->fc_flag & FC_PT2PT) {
9729 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9730 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
9731 iocbq->vport->fc_myDID);
9732 if (iocbq->vport->fc_myDID == Fabric_DID) {
9733 bf_set(wqe_els_did,
9734 &wqe->xmit_els_rsp.wqe_dest, 0);
9735 }
9736 }
9737 }
f0d9bccc
JS
9738 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com,
9739 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9740 bf_set(wqe_pu, &wqe->xmit_els_rsp.wqe_com, iocbq->iocb.ulpPU);
9741 bf_set(wqe_rcvoxid, &wqe->xmit_els_rsp.wqe_com,
7851fe2c 9742 iocbq->iocb.unsli3.rcvsli3.ox_id);
4f774513 9743 if (!iocbq->iocb.ulpCt_h && iocbq->iocb.ulpCt_l)
f0d9bccc 9744 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
6d368e53 9745 phba->vpi_ids[iocbq->vport->vpi]);
f0d9bccc
JS
9746 bf_set(wqe_dbde, &wqe->xmit_els_rsp.wqe_com, 1);
9747 bf_set(wqe_iod, &wqe->xmit_els_rsp.wqe_com, LPFC_WQE_IOD_WRITE);
9748 bf_set(wqe_qosd, &wqe->xmit_els_rsp.wqe_com, 1);
9749 bf_set(wqe_lenloc, &wqe->xmit_els_rsp.wqe_com,
9750 LPFC_WQE_LENLOC_WORD3);
9751 bf_set(wqe_ebde_cnt, &wqe->xmit_els_rsp.wqe_com, 0);
6d368e53
JS
9752 bf_set(wqe_rsp_temp_rpi, &wqe->xmit_els_rsp,
9753 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
ff78d8f9
JS
9754 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9755 iocbq->context2)->virt);
9756 if (phba->fc_topology == LPFC_TOPOLOGY_LOOP) {
939723a4
JS
9757 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9758 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
ff78d8f9 9759 iocbq->vport->fc_myDID);
939723a4
JS
9760 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com, 1);
9761 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
ff78d8f9
JS
9762 phba->vpi_ids[phba->pport->vpi]);
9763 }
4f774513 9764 command_type = OTHER_COMMAND;
7851fe2c 9765 break;
4f774513
JS
9766 case CMD_CLOSE_XRI_CN:
9767 case CMD_ABORT_XRI_CN:
9768 case CMD_ABORT_XRI_CX:
9769 /* words 0-2 memcpy should be 0 rserved */
9770 /* port will send abts */
dcf2a4e0
JS
9771 abrt_iotag = iocbq->iocb.un.acxri.abortContextTag;
9772 if (abrt_iotag != 0 && abrt_iotag <= phba->sli.last_iotag) {
9773 abrtiocbq = phba->sli.iocbq_lookup[abrt_iotag];
9774 fip = abrtiocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK;
9775 } else
9776 fip = 0;
9777
9778 if ((iocbq->iocb.ulpCommand == CMD_CLOSE_XRI_CN) || fip)
4f774513 9779 /*
dcf2a4e0
JS
9780 * The link is down, or the command was ELS_FIP
9781 * so the fw does not need to send abts
4f774513
JS
9782 * on the wire.
9783 */
9784 bf_set(abort_cmd_ia, &wqe->abort_cmd, 1);
9785 else
9786 bf_set(abort_cmd_ia, &wqe->abort_cmd, 0);
9787 bf_set(abort_cmd_criteria, &wqe->abort_cmd, T_XRI_TAG);
f0d9bccc
JS
9788 /* word5 iocb=CONTEXT_TAG|IO_TAG wqe=reserved */
9789 wqe->abort_cmd.rsrvd5 = 0;
9790 bf_set(wqe_ct, &wqe->abort_cmd.wqe_com,
4f774513
JS
9791 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9792 abort_tag = iocbq->iocb.un.acxri.abortIoTag;
4f774513
JS
9793 /*
9794 * The abort handler will send us CMD_ABORT_XRI_CN or
9795 * CMD_CLOSE_XRI_CN and the fw only accepts CMD_ABORT_XRI_CX
9796 */
f0d9bccc
JS
9797 bf_set(wqe_cmnd, &wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
9798 bf_set(wqe_qosd, &wqe->abort_cmd.wqe_com, 1);
9799 bf_set(wqe_lenloc, &wqe->abort_cmd.wqe_com,
9800 LPFC_WQE_LENLOC_NONE);
4f774513
JS
9801 cmnd = CMD_ABORT_XRI_CX;
9802 command_type = OTHER_COMMAND;
9803 xritag = 0;
7851fe2c 9804 break;
6669f9bb 9805 case CMD_XMIT_BLS_RSP64_CX:
6b5151fd 9806 ndlp = (struct lpfc_nodelist *)iocbq->context1;
546fc854 9807 /* As BLS ABTS RSP WQE is very different from other WQEs,
6669f9bb
JS
9808 * we re-construct this WQE here based on information in
9809 * iocbq from scratch.
9810 */
9811 memset(wqe, 0, sizeof(union lpfc_wqe));
5ffc266e 9812 /* OX_ID is invariable to who sent ABTS to CT exchange */
6669f9bb 9813 bf_set(xmit_bls_rsp64_oxid, &wqe->xmit_bls_rsp,
546fc854
JS
9814 bf_get(lpfc_abts_oxid, &iocbq->iocb.un.bls_rsp));
9815 if (bf_get(lpfc_abts_orig, &iocbq->iocb.un.bls_rsp) ==
5ffc266e
JS
9816 LPFC_ABTS_UNSOL_INT) {
9817 /* ABTS sent by initiator to CT exchange, the
9818 * RX_ID field will be filled with the newly
9819 * allocated responder XRI.
9820 */
9821 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
9822 iocbq->sli4_xritag);
9823 } else {
9824 /* ABTS sent by responder to CT exchange, the
9825 * RX_ID field will be filled with the responder
9826 * RX_ID from ABTS.
9827 */
9828 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
546fc854 9829 bf_get(lpfc_abts_rxid, &iocbq->iocb.un.bls_rsp));
5ffc266e 9830 }
6669f9bb
JS
9831 bf_set(xmit_bls_rsp64_seqcnthi, &wqe->xmit_bls_rsp, 0xffff);
9832 bf_set(wqe_xmit_bls_pt, &wqe->xmit_bls_rsp.wqe_dest, 0x1);
6b5151fd
JS
9833
9834 /* Use CT=VPI */
9835 bf_set(wqe_els_did, &wqe->xmit_bls_rsp.wqe_dest,
9836 ndlp->nlp_DID);
9837 bf_set(xmit_bls_rsp64_temprpi, &wqe->xmit_bls_rsp,
9838 iocbq->iocb.ulpContext);
9839 bf_set(wqe_ct, &wqe->xmit_bls_rsp.wqe_com, 1);
6669f9bb 9840 bf_set(wqe_ctxt_tag, &wqe->xmit_bls_rsp.wqe_com,
6b5151fd 9841 phba->vpi_ids[phba->pport->vpi]);
f0d9bccc
JS
9842 bf_set(wqe_qosd, &wqe->xmit_bls_rsp.wqe_com, 1);
9843 bf_set(wqe_lenloc, &wqe->xmit_bls_rsp.wqe_com,
9844 LPFC_WQE_LENLOC_NONE);
6669f9bb
JS
9845 /* Overwrite the pre-set comnd type with OTHER_COMMAND */
9846 command_type = OTHER_COMMAND;
546fc854
JS
9847 if (iocbq->iocb.un.xseq64.w5.hcsw.Rctl == FC_RCTL_BA_RJT) {
9848 bf_set(xmit_bls_rsp64_rjt_vspec, &wqe->xmit_bls_rsp,
9849 bf_get(lpfc_vndr_code, &iocbq->iocb.un.bls_rsp));
9850 bf_set(xmit_bls_rsp64_rjt_expc, &wqe->xmit_bls_rsp,
9851 bf_get(lpfc_rsn_expln, &iocbq->iocb.un.bls_rsp));
9852 bf_set(xmit_bls_rsp64_rjt_rsnc, &wqe->xmit_bls_rsp,
9853 bf_get(lpfc_rsn_code, &iocbq->iocb.un.bls_rsp));
9854 }
9855
7851fe2c 9856 break;
ae9e28f3
JS
9857 case CMD_SEND_FRAME:
9858 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9859 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9860 return 0;
4f774513
JS
9861 case CMD_XRI_ABORTED_CX:
9862 case CMD_CREATE_XRI_CR: /* Do we expect to use this? */
4f774513
JS
9863 case CMD_IOCB_FCP_IBIDIR64_CR: /* bidirectional xfer */
9864 case CMD_FCP_TSEND64_CX: /* Target mode send xfer-ready */
9865 case CMD_FCP_TRSP64_CX: /* Target mode rcv */
9866 case CMD_FCP_AUTO_TRSP_CX: /* Auto target rsp */
9867 default:
9868 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9869 "2014 Invalid command 0x%x\n",
9870 iocbq->iocb.ulpCommand);
9871 return IOCB_ERROR;
7851fe2c 9872 break;
4f774513 9873 }
6d368e53 9874
8012cc38
JS
9875 if (iocbq->iocb_flag & LPFC_IO_DIF_PASS)
9876 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_PASSTHRU);
9877 else if (iocbq->iocb_flag & LPFC_IO_DIF_STRIP)
9878 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_STRIP);
9879 else if (iocbq->iocb_flag & LPFC_IO_DIF_INSERT)
9880 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_INSERT);
9881 iocbq->iocb_flag &= ~(LPFC_IO_DIF_PASS | LPFC_IO_DIF_STRIP |
9882 LPFC_IO_DIF_INSERT);
f0d9bccc
JS
9883 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9884 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9885 wqe->generic.wqe_com.abort_tag = abort_tag;
9886 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, command_type);
9887 bf_set(wqe_cmnd, &wqe->generic.wqe_com, cmnd);
9888 bf_set(wqe_class, &wqe->generic.wqe_com, iocbq->iocb.ulpClass);
9889 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
4f774513
JS
9890 return 0;
9891}
9892
9893/**
9894 * __lpfc_sli_issue_iocb_s4 - SLI4 device lockless ver of lpfc_sli_issue_iocb
9895 * @phba: Pointer to HBA context object.
9896 * @ring_number: SLI ring number to issue iocb on.
9897 * @piocb: Pointer to command iocb.
9898 * @flag: Flag indicating if this command can be put into txq.
9899 *
9900 * __lpfc_sli_issue_iocb_s4 is used by other functions in the driver to issue
9901 * an iocb command to an HBA with SLI-4 interface spec.
9902 *
9903 * This function is called with hbalock held. The function will return success
9904 * after it successfully submit the iocb to firmware or after adding to the
9905 * txq.
9906 **/
9907static int
9908__lpfc_sli_issue_iocb_s4(struct lpfc_hba *phba, uint32_t ring_number,
9909 struct lpfc_iocbq *piocb, uint32_t flag)
9910{
9911 struct lpfc_sglq *sglq;
205e8240 9912 union lpfc_wqe128 wqe;
1ba981fd 9913 struct lpfc_queue *wq;
895427bd 9914 struct lpfc_sli_ring *pring;
4f774513 9915
895427bd
JS
9916 /* Get the WQ */
9917 if ((piocb->iocb_flag & LPFC_IO_FCP) ||
9918 (piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
cdb42bec 9919 wq = phba->sli4_hba.hdwq[piocb->hba_wqidx].fcp_wq;
895427bd
JS
9920 } else {
9921 wq = phba->sli4_hba.els_wq;
9922 }
9923
9924 /* Get corresponding ring */
9925 pring = wq->pring;
1c2ba475 9926
b5c53958
JS
9927 /*
9928 * The WQE can be either 64 or 128 bytes,
b5c53958 9929 */
b5c53958 9930
cda7fa18 9931 lockdep_assert_held(&pring->ring_lock);
895427bd 9932
4f774513
JS
9933 if (piocb->sli4_xritag == NO_XRI) {
9934 if (piocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
6b5151fd 9935 piocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN)
4f774513
JS
9936 sglq = NULL;
9937 else {
0e9bb8d7 9938 if (!list_empty(&pring->txq)) {
2a9bf3d0
JS
9939 if (!(flag & SLI_IOCB_RET_IOCB)) {
9940 __lpfc_sli_ringtx_put(phba,
9941 pring, piocb);
9942 return IOCB_SUCCESS;
9943 } else {
9944 return IOCB_BUSY;
9945 }
9946 } else {
895427bd 9947 sglq = __lpfc_sli_get_els_sglq(phba, piocb);
2a9bf3d0
JS
9948 if (!sglq) {
9949 if (!(flag & SLI_IOCB_RET_IOCB)) {
9950 __lpfc_sli_ringtx_put(phba,
9951 pring,
9952 piocb);
9953 return IOCB_SUCCESS;
9954 } else
9955 return IOCB_BUSY;
9956 }
9957 }
4f774513 9958 }
2ea259ee 9959 } else if (piocb->iocb_flag & LPFC_IO_FCP)
6d368e53
JS
9960 /* These IO's already have an XRI and a mapped sgl. */
9961 sglq = NULL;
2ea259ee 9962 else {
6d368e53
JS
9963 /*
9964 * This is a continuation of a commandi,(CX) so this
4f774513
JS
9965 * sglq is on the active list
9966 */
edccdc17 9967 sglq = __lpfc_get_active_sglq(phba, piocb->sli4_lxritag);
4f774513
JS
9968 if (!sglq)
9969 return IOCB_ERROR;
9970 }
9971
9972 if (sglq) {
6d368e53 9973 piocb->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0 9974 piocb->sli4_xritag = sglq->sli4_xritag;
2a9bf3d0 9975 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocb, sglq))
4f774513
JS
9976 return IOCB_ERROR;
9977 }
9978
205e8240 9979 if (lpfc_sli4_iocb2wqe(phba, piocb, &wqe))
4f774513
JS
9980 return IOCB_ERROR;
9981
205e8240 9982 if (lpfc_sli4_wq_put(wq, &wqe))
895427bd 9983 return IOCB_ERROR;
4f774513
JS
9984 lpfc_sli_ringtxcmpl_put(phba, pring, piocb);
9985
9986 return 0;
9987}
9988
9989/**
9990 * __lpfc_sli_issue_iocb - Wrapper func of lockless version for issuing iocb
9991 *
9992 * This routine wraps the actual lockless version for issusing IOCB function
9993 * pointer from the lpfc_hba struct.
9994 *
9995 * Return codes:
b5c53958
JS
9996 * IOCB_ERROR - Error
9997 * IOCB_SUCCESS - Success
9998 * IOCB_BUSY - Busy
4f774513 9999 **/
2a9bf3d0 10000int
4f774513
JS
10001__lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
10002 struct lpfc_iocbq *piocb, uint32_t flag)
10003{
10004 return phba->__lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10005}
10006
10007/**
25985edc 10008 * lpfc_sli_api_table_setup - Set up sli api function jump table
4f774513
JS
10009 * @phba: The hba struct for which this call is being executed.
10010 * @dev_grp: The HBA PCI-Device group number.
10011 *
10012 * This routine sets up the SLI interface API function jump table in @phba
10013 * struct.
10014 * Returns: 0 - success, -ENODEV - failure.
10015 **/
10016int
10017lpfc_sli_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
10018{
10019
10020 switch (dev_grp) {
10021 case LPFC_PCI_DEV_LP:
10022 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s3;
10023 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s3;
10024 break;
10025 case LPFC_PCI_DEV_OC:
10026 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s4;
10027 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s4;
10028 break;
10029 default:
10030 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10031 "1419 Invalid HBA PCI-device group: 0x%x\n",
10032 dev_grp);
10033 return -ENODEV;
10034 break;
10035 }
10036 phba->lpfc_get_iocb_from_iocbq = lpfc_get_iocb_from_iocbq;
10037 return 0;
10038}
10039
a1efe163 10040/**
895427bd 10041 * lpfc_sli4_calc_ring - Calculates which ring to use
a1efe163 10042 * @phba: Pointer to HBA context object.
a1efe163
JS
10043 * @piocb: Pointer to command iocb.
10044 *
895427bd
JS
10045 * For SLI4 only, FCP IO can deferred to one fo many WQs, based on
10046 * hba_wqidx, thus we need to calculate the corresponding ring.
a1efe163 10047 * Since ABORTS must go on the same WQ of the command they are
895427bd 10048 * aborting, we use command's hba_wqidx.
a1efe163 10049 */
895427bd
JS
10050struct lpfc_sli_ring *
10051lpfc_sli4_calc_ring(struct lpfc_hba *phba, struct lpfc_iocbq *piocb)
9bd2bff5 10052{
c490850a 10053 struct lpfc_io_buf *lpfc_cmd;
5e5b511d 10054
895427bd 10055 if (piocb->iocb_flag & (LPFC_IO_FCP | LPFC_USE_FCPWQIDX)) {
cdb42bec 10056 if (unlikely(!phba->sli4_hba.hdwq))
7370d10a
JS
10057 return NULL;
10058 /*
10059 * for abort iocb hba_wqidx should already
10060 * be setup based on what work queue we used.
10061 */
10062 if (!(piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
c490850a 10063 lpfc_cmd = (struct lpfc_io_buf *)piocb->context1;
1fbf9742 10064 piocb->hba_wqidx = lpfc_cmd->hdwq_no;
9bd2bff5 10065 }
cdb42bec 10066 return phba->sli4_hba.hdwq[piocb->hba_wqidx].fcp_wq->pring;
895427bd
JS
10067 } else {
10068 if (unlikely(!phba->sli4_hba.els_wq))
10069 return NULL;
10070 piocb->hba_wqidx = 0;
10071 return phba->sli4_hba.els_wq->pring;
9bd2bff5 10072 }
9bd2bff5
JS
10073}
10074
4f774513
JS
10075/**
10076 * lpfc_sli_issue_iocb - Wrapper function for __lpfc_sli_issue_iocb
10077 * @phba: Pointer to HBA context object.
10078 * @pring: Pointer to driver SLI ring object.
10079 * @piocb: Pointer to command iocb.
10080 * @flag: Flag indicating if this command can be put into txq.
10081 *
10082 * lpfc_sli_issue_iocb is a wrapper around __lpfc_sli_issue_iocb
10083 * function. This function gets the hbalock and calls
10084 * __lpfc_sli_issue_iocb function and will return the error returned
10085 * by __lpfc_sli_issue_iocb function. This wrapper is used by
10086 * functions which do not hold hbalock.
10087 **/
10088int
10089lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
10090 struct lpfc_iocbq *piocb, uint32_t flag)
10091{
2a76a283 10092 struct lpfc_sli_ring *pring;
4f774513 10093 unsigned long iflags;
6a828b0f 10094 int rc;
4f774513 10095
7e56aa25 10096 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
10097 pring = lpfc_sli4_calc_ring(phba, piocb);
10098 if (unlikely(pring == NULL))
9bd2bff5 10099 return IOCB_ERROR;
ba20c853 10100
9bd2bff5
JS
10101 spin_lock_irqsave(&pring->ring_lock, iflags);
10102 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10103 spin_unlock_irqrestore(&pring->ring_lock, iflags);
7e56aa25
JS
10104 } else {
10105 /* For now, SLI2/3 will still use hbalock */
10106 spin_lock_irqsave(&phba->hbalock, iflags);
10107 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10108 spin_unlock_irqrestore(&phba->hbalock, iflags);
10109 }
4f774513
JS
10110 return rc;
10111}
10112
10113/**
10114 * lpfc_extra_ring_setup - Extra ring setup function
10115 * @phba: Pointer to HBA context object.
10116 *
10117 * This function is called while driver attaches with the
10118 * HBA to setup the extra ring. The extra ring is used
10119 * only when driver needs to support target mode functionality
10120 * or IP over FC functionalities.
10121 *
895427bd 10122 * This function is called with no lock held. SLI3 only.
4f774513
JS
10123 **/
10124static int
10125lpfc_extra_ring_setup( struct lpfc_hba *phba)
10126{
10127 struct lpfc_sli *psli;
10128 struct lpfc_sli_ring *pring;
10129
10130 psli = &phba->sli;
10131
10132 /* Adjust cmd/rsp ring iocb entries more evenly */
10133
10134 /* Take some away from the FCP ring */
895427bd 10135 pring = &psli->sli3_ring[LPFC_FCP_RING];
7e56aa25
JS
10136 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10137 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10138 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10139 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e 10140
a4bc3379 10141 /* and give them to the extra ring */
895427bd 10142 pring = &psli->sli3_ring[LPFC_EXTRA_RING];
a4bc3379 10143
7e56aa25
JS
10144 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10145 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10146 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10147 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e
JW
10148
10149 /* Setup default profile for this ring */
10150 pring->iotag_max = 4096;
10151 pring->num_mask = 1;
10152 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS
10153 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
10154 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW
10155 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
10156 return 0;
10157}
10158
cb69f7de
JS
10159/* lpfc_sli_abts_err_handler - handle a failed ABTS request from an SLI3 port.
10160 * @phba: Pointer to HBA context object.
10161 * @iocbq: Pointer to iocb object.
10162 *
10163 * The async_event handler calls this routine when it receives
10164 * an ASYNC_STATUS_CN event from the port. The port generates
10165 * this event when an Abort Sequence request to an rport fails
10166 * twice in succession. The abort could be originated by the
10167 * driver or by the port. The ABTS could have been for an ELS
10168 * or FCP IO. The port only generates this event when an ABTS
10169 * fails to complete after one retry.
10170 */
10171static void
10172lpfc_sli_abts_err_handler(struct lpfc_hba *phba,
10173 struct lpfc_iocbq *iocbq)
10174{
10175 struct lpfc_nodelist *ndlp = NULL;
10176 uint16_t rpi = 0, vpi = 0;
10177 struct lpfc_vport *vport = NULL;
10178
10179 /* The rpi in the ulpContext is vport-sensitive. */
10180 vpi = iocbq->iocb.un.asyncstat.sub_ctxt_tag;
10181 rpi = iocbq->iocb.ulpContext;
10182
10183 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10184 "3092 Port generated ABTS async event "
10185 "on vpi %d rpi %d status 0x%x\n",
10186 vpi, rpi, iocbq->iocb.ulpStatus);
10187
10188 vport = lpfc_find_vport_by_vpid(phba, vpi);
10189 if (!vport)
10190 goto err_exit;
10191 ndlp = lpfc_findnode_rpi(vport, rpi);
10192 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp))
10193 goto err_exit;
10194
10195 if (iocbq->iocb.ulpStatus == IOSTAT_LOCAL_REJECT)
10196 lpfc_sli_abts_recover_port(vport, ndlp);
10197 return;
10198
10199 err_exit:
10200 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10201 "3095 Event Context not found, no "
10202 "action on vpi %d rpi %d status 0x%x, reason 0x%x\n",
10203 iocbq->iocb.ulpContext, iocbq->iocb.ulpStatus,
10204 vpi, rpi);
10205}
10206
10207/* lpfc_sli4_abts_err_handler - handle a failed ABTS request from an SLI4 port.
10208 * @phba: pointer to HBA context object.
10209 * @ndlp: nodelist pointer for the impacted rport.
10210 * @axri: pointer to the wcqe containing the failed exchange.
10211 *
10212 * The driver calls this routine when it receives an ABORT_XRI_FCP CQE from the
10213 * port. The port generates this event when an abort exchange request to an
10214 * rport fails twice in succession with no reply. The abort could be originated
10215 * by the driver or by the port. The ABTS could have been for an ELS or FCP IO.
10216 */
10217void
10218lpfc_sli4_abts_err_handler(struct lpfc_hba *phba,
10219 struct lpfc_nodelist *ndlp,
10220 struct sli4_wcqe_xri_aborted *axri)
10221{
10222 struct lpfc_vport *vport;
5c1db2ac 10223 uint32_t ext_status = 0;
cb69f7de 10224
6b5151fd 10225 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) {
cb69f7de
JS
10226 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10227 "3115 Node Context not found, driver "
10228 "ignoring abts err event\n");
6b5151fd
JS
10229 return;
10230 }
10231
cb69f7de
JS
10232 vport = ndlp->vport;
10233 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10234 "3116 Port generated FCP XRI ABORT event on "
5c1db2ac 10235 "vpi %d rpi %d xri x%x status 0x%x parameter x%x\n",
8e668af5 10236 ndlp->vport->vpi, phba->sli4_hba.rpi_ids[ndlp->nlp_rpi],
cb69f7de 10237 bf_get(lpfc_wcqe_xa_xri, axri),
5c1db2ac
JS
10238 bf_get(lpfc_wcqe_xa_status, axri),
10239 axri->parameter);
cb69f7de 10240
5c1db2ac
JS
10241 /*
10242 * Catch the ABTS protocol failure case. Older OCe FW releases returned
10243 * LOCAL_REJECT and 0 for a failed ABTS exchange and later OCe and
10244 * LPe FW releases returned LOCAL_REJECT and SEQUENCE_TIMEOUT.
10245 */
e3d2b802 10246 ext_status = axri->parameter & IOERR_PARAM_MASK;
5c1db2ac
JS
10247 if ((bf_get(lpfc_wcqe_xa_status, axri) == IOSTAT_LOCAL_REJECT) &&
10248 ((ext_status == IOERR_SEQUENCE_TIMEOUT) || (ext_status == 0)))
cb69f7de
JS
10249 lpfc_sli_abts_recover_port(vport, ndlp);
10250}
10251
e59058c4 10252/**
3621a710 10253 * lpfc_sli_async_event_handler - ASYNC iocb handler function
e59058c4
JS
10254 * @phba: Pointer to HBA context object.
10255 * @pring: Pointer to driver SLI ring object.
10256 * @iocbq: Pointer to iocb object.
10257 *
10258 * This function is called by the slow ring event handler
10259 * function when there is an ASYNC event iocb in the ring.
10260 * This function is called with no lock held.
10261 * Currently this function handles only temperature related
10262 * ASYNC events. The function decodes the temperature sensor
10263 * event message and posts events for the management applications.
10264 **/
98c9ea5c 10265static void
57127f15
JS
10266lpfc_sli_async_event_handler(struct lpfc_hba * phba,
10267 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
10268{
10269 IOCB_t *icmd;
10270 uint16_t evt_code;
57127f15
JS
10271 struct temp_event temp_event_data;
10272 struct Scsi_Host *shost;
a257bf90 10273 uint32_t *iocb_w;
57127f15
JS
10274
10275 icmd = &iocbq->iocb;
10276 evt_code = icmd->un.asyncstat.evt_code;
57127f15 10277
cb69f7de
JS
10278 switch (evt_code) {
10279 case ASYNC_TEMP_WARN:
10280 case ASYNC_TEMP_SAFE:
10281 temp_event_data.data = (uint32_t) icmd->ulpContext;
10282 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
10283 if (evt_code == ASYNC_TEMP_WARN) {
10284 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
10285 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10286 "0347 Adapter is very hot, please take "
10287 "corrective action. temperature : %d Celsius\n",
10288 (uint32_t) icmd->ulpContext);
10289 } else {
10290 temp_event_data.event_code = LPFC_NORMAL_TEMP;
10291 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10292 "0340 Adapter temperature is OK now. "
10293 "temperature : %d Celsius\n",
10294 (uint32_t) icmd->ulpContext);
10295 }
10296
10297 /* Send temperature change event to applications */
10298 shost = lpfc_shost_from_vport(phba->pport);
10299 fc_host_post_vendor_event(shost, fc_get_event_number(),
10300 sizeof(temp_event_data), (char *) &temp_event_data,
10301 LPFC_NL_VENDOR_ID);
10302 break;
10303 case ASYNC_STATUS_CN:
10304 lpfc_sli_abts_err_handler(phba, iocbq);
10305 break;
10306 default:
a257bf90 10307 iocb_w = (uint32_t *) icmd;
cb69f7de 10308 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
76bb24ef 10309 "0346 Ring %d handler: unexpected ASYNC_STATUS"
e4e74273 10310 " evt_code 0x%x\n"
a257bf90
JS
10311 "W0 0x%08x W1 0x%08x W2 0x%08x W3 0x%08x\n"
10312 "W4 0x%08x W5 0x%08x W6 0x%08x W7 0x%08x\n"
10313 "W8 0x%08x W9 0x%08x W10 0x%08x W11 0x%08x\n"
10314 "W12 0x%08x W13 0x%08x W14 0x%08x W15 0x%08x\n",
cb69f7de 10315 pring->ringno, icmd->un.asyncstat.evt_code,
a257bf90
JS
10316 iocb_w[0], iocb_w[1], iocb_w[2], iocb_w[3],
10317 iocb_w[4], iocb_w[5], iocb_w[6], iocb_w[7],
10318 iocb_w[8], iocb_w[9], iocb_w[10], iocb_w[11],
10319 iocb_w[12], iocb_w[13], iocb_w[14], iocb_w[15]);
10320
cb69f7de 10321 break;
57127f15 10322 }
57127f15
JS
10323}
10324
10325
e59058c4 10326/**
895427bd 10327 * lpfc_sli4_setup - SLI ring setup function
e59058c4
JS
10328 * @phba: Pointer to HBA context object.
10329 *
10330 * lpfc_sli_setup sets up rings of the SLI interface with
10331 * number of iocbs per ring and iotags. This function is
10332 * called while driver attach to the HBA and before the
10333 * interrupts are enabled. So there is no need for locking.
10334 *
10335 * This function always returns 0.
10336 **/
dea3101e 10337int
895427bd
JS
10338lpfc_sli4_setup(struct lpfc_hba *phba)
10339{
10340 struct lpfc_sli_ring *pring;
10341
10342 pring = phba->sli4_hba.els_wq->pring;
10343 pring->num_mask = LPFC_MAX_RING_MASK;
10344 pring->prt[0].profile = 0; /* Mask 0 */
10345 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10346 pring->prt[0].type = FC_TYPE_ELS;
10347 pring->prt[0].lpfc_sli_rcv_unsol_event =
10348 lpfc_els_unsol_event;
10349 pring->prt[1].profile = 0; /* Mask 1 */
10350 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10351 pring->prt[1].type = FC_TYPE_ELS;
10352 pring->prt[1].lpfc_sli_rcv_unsol_event =
10353 lpfc_els_unsol_event;
10354 pring->prt[2].profile = 0; /* Mask 2 */
10355 /* NameServer Inquiry */
10356 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
10357 /* NameServer */
10358 pring->prt[2].type = FC_TYPE_CT;
10359 pring->prt[2].lpfc_sli_rcv_unsol_event =
10360 lpfc_ct_unsol_event;
10361 pring->prt[3].profile = 0; /* Mask 3 */
10362 /* NameServer response */
10363 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
10364 /* NameServer */
10365 pring->prt[3].type = FC_TYPE_CT;
10366 pring->prt[3].lpfc_sli_rcv_unsol_event =
10367 lpfc_ct_unsol_event;
10368 return 0;
10369}
10370
10371/**
10372 * lpfc_sli_setup - SLI ring setup function
10373 * @phba: Pointer to HBA context object.
10374 *
10375 * lpfc_sli_setup sets up rings of the SLI interface with
10376 * number of iocbs per ring and iotags. This function is
10377 * called while driver attach to the HBA and before the
10378 * interrupts are enabled. So there is no need for locking.
10379 *
10380 * This function always returns 0. SLI3 only.
10381 **/
10382int
dea3101e
JB
10383lpfc_sli_setup(struct lpfc_hba *phba)
10384{
ed957684 10385 int i, totiocbsize = 0;
dea3101e
JB
10386 struct lpfc_sli *psli = &phba->sli;
10387 struct lpfc_sli_ring *pring;
10388
2a76a283 10389 psli->num_rings = MAX_SLI3_CONFIGURED_RINGS;
dea3101e 10390 psli->sli_flag = 0;
dea3101e 10391
604a3e30
JB
10392 psli->iocbq_lookup = NULL;
10393 psli->iocbq_lookup_len = 0;
10394 psli->last_iotag = 0;
10395
dea3101e 10396 for (i = 0; i < psli->num_rings; i++) {
895427bd 10397 pring = &psli->sli3_ring[i];
dea3101e
JB
10398 switch (i) {
10399 case LPFC_FCP_RING: /* ring 0 - FCP */
10400 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10401 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
10402 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
10403 pring->sli.sli3.numCiocb +=
10404 SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10405 pring->sli.sli3.numRiocb +=
10406 SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10407 pring->sli.sli3.numCiocb +=
10408 SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10409 pring->sli.sli3.numRiocb +=
10410 SLI2_IOCB_RSP_R3XTRA_ENTRIES;
10411 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10412 SLI3_IOCB_CMD_SIZE :
10413 SLI2_IOCB_CMD_SIZE;
7e56aa25 10414 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10415 SLI3_IOCB_RSP_SIZE :
10416 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10417 pring->iotag_ctr = 0;
10418 pring->iotag_max =
92d7f7b0 10419 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB
10420 pring->fast_iotag = pring->iotag_max;
10421 pring->num_mask = 0;
10422 break;
a4bc3379 10423 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e 10424 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10425 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
10426 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
10427 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10428 SLI3_IOCB_CMD_SIZE :
10429 SLI2_IOCB_CMD_SIZE;
7e56aa25 10430 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10431 SLI3_IOCB_RSP_SIZE :
10432 SLI2_IOCB_RSP_SIZE;
2e0fef85 10433 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB
10434 pring->num_mask = 0;
10435 break;
10436 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
10437 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10438 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
10439 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
10440 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10441 SLI3_IOCB_CMD_SIZE :
10442 SLI2_IOCB_CMD_SIZE;
7e56aa25 10443 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10444 SLI3_IOCB_RSP_SIZE :
10445 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10446 pring->fast_iotag = 0;
10447 pring->iotag_ctr = 0;
10448 pring->iotag_max = 4096;
57127f15
JS
10449 pring->lpfc_sli_rcv_async_status =
10450 lpfc_sli_async_event_handler;
6669f9bb 10451 pring->num_mask = LPFC_MAX_RING_MASK;
dea3101e 10452 pring->prt[0].profile = 0; /* Mask 0 */
6a9c52cf
JS
10453 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10454 pring->prt[0].type = FC_TYPE_ELS;
dea3101e 10455 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 10456 lpfc_els_unsol_event;
dea3101e 10457 pring->prt[1].profile = 0; /* Mask 1 */
6a9c52cf
JS
10458 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10459 pring->prt[1].type = FC_TYPE_ELS;
dea3101e 10460 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 10461 lpfc_els_unsol_event;
dea3101e
JB
10462 pring->prt[2].profile = 0; /* Mask 2 */
10463 /* NameServer Inquiry */
6a9c52cf 10464 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
dea3101e 10465 /* NameServer */
6a9c52cf 10466 pring->prt[2].type = FC_TYPE_CT;
dea3101e 10467 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 10468 lpfc_ct_unsol_event;
dea3101e
JB
10469 pring->prt[3].profile = 0; /* Mask 3 */
10470 /* NameServer response */
6a9c52cf 10471 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
dea3101e 10472 /* NameServer */
6a9c52cf 10473 pring->prt[3].type = FC_TYPE_CT;
dea3101e 10474 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 10475 lpfc_ct_unsol_event;
dea3101e
JB
10476 break;
10477 }
7e56aa25
JS
10478 totiocbsize += (pring->sli.sli3.numCiocb *
10479 pring->sli.sli3.sizeCiocb) +
10480 (pring->sli.sli3.numRiocb * pring->sli.sli3.sizeRiocb);
dea3101e 10481 }
ed957684 10482 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 10483 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS
10484 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
10485 "SLI2 SLIM Data: x%x x%lx\n",
10486 phba->brd_no, totiocbsize,
10487 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 10488 }
cf5bf97e
JW
10489 if (phba->cfg_multi_ring_support == 2)
10490 lpfc_extra_ring_setup(phba);
dea3101e
JB
10491
10492 return 0;
10493}
10494
e59058c4 10495/**
895427bd 10496 * lpfc_sli4_queue_init - Queue initialization function
e59058c4
JS
10497 * @phba: Pointer to HBA context object.
10498 *
895427bd 10499 * lpfc_sli4_queue_init sets up mailbox queues and iocb queues for each
e59058c4
JS
10500 * ring. This function also initializes ring indices of each ring.
10501 * This function is called during the initialization of the SLI
10502 * interface of an HBA.
10503 * This function is called with no lock held and always returns
10504 * 1.
10505 **/
895427bd
JS
10506void
10507lpfc_sli4_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10508{
10509 struct lpfc_sli *psli;
10510 struct lpfc_sli_ring *pring;
604a3e30 10511 int i;
dea3101e
JB
10512
10513 psli = &phba->sli;
2e0fef85 10514 spin_lock_irq(&phba->hbalock);
dea3101e 10515 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10516 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e 10517 /* Initialize list headers for txq and txcmplq as double linked lists */
cdb42bec
JS
10518 for (i = 0; i < phba->cfg_hdw_queue; i++) {
10519 pring = phba->sli4_hba.hdwq[i].fcp_wq->pring;
895427bd
JS
10520 pring->flag = 0;
10521 pring->ringno = LPFC_FCP_RING;
c490850a 10522 pring->txcmplq_cnt = 0;
895427bd
JS
10523 INIT_LIST_HEAD(&pring->txq);
10524 INIT_LIST_HEAD(&pring->txcmplq);
10525 INIT_LIST_HEAD(&pring->iocb_continueq);
10526 spin_lock_init(&pring->ring_lock);
10527 }
10528 pring = phba->sli4_hba.els_wq->pring;
10529 pring->flag = 0;
10530 pring->ringno = LPFC_ELS_RING;
c490850a 10531 pring->txcmplq_cnt = 0;
895427bd
JS
10532 INIT_LIST_HEAD(&pring->txq);
10533 INIT_LIST_HEAD(&pring->txcmplq);
10534 INIT_LIST_HEAD(&pring->iocb_continueq);
10535 spin_lock_init(&pring->ring_lock);
dea3101e 10536
cdb42bec
JS
10537 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10538 for (i = 0; i < phba->cfg_hdw_queue; i++) {
10539 pring = phba->sli4_hba.hdwq[i].nvme_wq->pring;
c490850a 10540 pring->flag = 0;
cdb42bec 10541 pring->ringno = LPFC_FCP_RING;
c490850a 10542 pring->txcmplq_cnt = 0;
cdb42bec
JS
10543 INIT_LIST_HEAD(&pring->txq);
10544 INIT_LIST_HEAD(&pring->txcmplq);
10545 INIT_LIST_HEAD(&pring->iocb_continueq);
10546 spin_lock_init(&pring->ring_lock);
10547 }
895427bd
JS
10548 pring = phba->sli4_hba.nvmels_wq->pring;
10549 pring->flag = 0;
10550 pring->ringno = LPFC_ELS_RING;
c490850a 10551 pring->txcmplq_cnt = 0;
895427bd
JS
10552 INIT_LIST_HEAD(&pring->txq);
10553 INIT_LIST_HEAD(&pring->txcmplq);
10554 INIT_LIST_HEAD(&pring->iocb_continueq);
10555 spin_lock_init(&pring->ring_lock);
10556 }
10557
10558 spin_unlock_irq(&phba->hbalock);
10559}
10560
10561/**
10562 * lpfc_sli_queue_init - Queue initialization function
10563 * @phba: Pointer to HBA context object.
10564 *
10565 * lpfc_sli_queue_init sets up mailbox queues and iocb queues for each
10566 * ring. This function also initializes ring indices of each ring.
10567 * This function is called during the initialization of the SLI
10568 * interface of an HBA.
10569 * This function is called with no lock held and always returns
10570 * 1.
10571 **/
10572void
10573lpfc_sli_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10574{
10575 struct lpfc_sli *psli;
10576 struct lpfc_sli_ring *pring;
604a3e30 10577 int i;
dea3101e
JB
10578
10579 psli = &phba->sli;
2e0fef85 10580 spin_lock_irq(&phba->hbalock);
dea3101e 10581 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10582 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB
10583 /* Initialize list headers for txq and txcmplq as double linked lists */
10584 for (i = 0; i < psli->num_rings; i++) {
895427bd 10585 pring = &psli->sli3_ring[i];
dea3101e 10586 pring->ringno = i;
7e56aa25
JS
10587 pring->sli.sli3.next_cmdidx = 0;
10588 pring->sli.sli3.local_getidx = 0;
10589 pring->sli.sli3.cmdidx = 0;
dea3101e 10590 INIT_LIST_HEAD(&pring->iocb_continueq);
9c2face6 10591 INIT_LIST_HEAD(&pring->iocb_continue_saveq);
dea3101e 10592 INIT_LIST_HEAD(&pring->postbufq);
895427bd
JS
10593 pring->flag = 0;
10594 INIT_LIST_HEAD(&pring->txq);
10595 INIT_LIST_HEAD(&pring->txcmplq);
7e56aa25 10596 spin_lock_init(&pring->ring_lock);
dea3101e 10597 }
2e0fef85 10598 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10599}
10600
04c68496
JS
10601/**
10602 * lpfc_sli_mbox_sys_flush - Flush mailbox command sub-system
10603 * @phba: Pointer to HBA context object.
10604 *
10605 * This routine flushes the mailbox command subsystem. It will unconditionally
10606 * flush all the mailbox commands in the three possible stages in the mailbox
10607 * command sub-system: pending mailbox command queue; the outstanding mailbox
10608 * command; and completed mailbox command queue. It is caller's responsibility
10609 * to make sure that the driver is in the proper state to flush the mailbox
10610 * command sub-system. Namely, the posting of mailbox commands into the
10611 * pending mailbox command queue from the various clients must be stopped;
10612 * either the HBA is in a state that it will never works on the outstanding
10613 * mailbox command (such as in EEH or ERATT conditions) or the outstanding
10614 * mailbox command has been completed.
10615 **/
10616static void
10617lpfc_sli_mbox_sys_flush(struct lpfc_hba *phba)
10618{
10619 LIST_HEAD(completions);
10620 struct lpfc_sli *psli = &phba->sli;
10621 LPFC_MBOXQ_t *pmb;
10622 unsigned long iflag;
10623
523128e5
JS
10624 /* Disable softirqs, including timers from obtaining phba->hbalock */
10625 local_bh_disable();
10626
04c68496
JS
10627 /* Flush all the mailbox commands in the mbox system */
10628 spin_lock_irqsave(&phba->hbalock, iflag);
523128e5 10629
04c68496
JS
10630 /* The pending mailbox command queue */
10631 list_splice_init(&phba->sli.mboxq, &completions);
10632 /* The outstanding active mailbox command */
10633 if (psli->mbox_active) {
10634 list_add_tail(&psli->mbox_active->list, &completions);
10635 psli->mbox_active = NULL;
10636 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10637 }
10638 /* The completed mailbox command queue */
10639 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
10640 spin_unlock_irqrestore(&phba->hbalock, iflag);
10641
523128e5
JS
10642 /* Enable softirqs again, done with phba->hbalock */
10643 local_bh_enable();
10644
04c68496
JS
10645 /* Return all flushed mailbox commands with MBX_NOT_FINISHED status */
10646 while (!list_empty(&completions)) {
10647 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
10648 pmb->u.mb.mbxStatus = MBX_NOT_FINISHED;
10649 if (pmb->mbox_cmpl)
10650 pmb->mbox_cmpl(phba, pmb);
10651 }
10652}
10653
e59058c4 10654/**
3621a710 10655 * lpfc_sli_host_down - Vport cleanup function
e59058c4
JS
10656 * @vport: Pointer to virtual port object.
10657 *
10658 * lpfc_sli_host_down is called to clean up the resources
10659 * associated with a vport before destroying virtual
10660 * port data structures.
10661 * This function does following operations:
10662 * - Free discovery resources associated with this virtual
10663 * port.
10664 * - Free iocbs associated with this virtual port in
10665 * the txq.
10666 * - Send abort for all iocb commands associated with this
10667 * vport in txcmplq.
10668 *
10669 * This function is called with no lock held and always returns 1.
10670 **/
92d7f7b0
JS
10671int
10672lpfc_sli_host_down(struct lpfc_vport *vport)
10673{
858c9f6c 10674 LIST_HEAD(completions);
92d7f7b0
JS
10675 struct lpfc_hba *phba = vport->phba;
10676 struct lpfc_sli *psli = &phba->sli;
895427bd 10677 struct lpfc_queue *qp = NULL;
92d7f7b0
JS
10678 struct lpfc_sli_ring *pring;
10679 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS
10680 int i;
10681 unsigned long flags = 0;
10682 uint16_t prev_pring_flag;
10683
10684 lpfc_cleanup_discovery_resources(vport);
10685
10686 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0 10687
895427bd
JS
10688 /*
10689 * Error everything on the txq since these iocbs
10690 * have not been given to the FW yet.
10691 * Also issue ABTS for everything on the txcmplq
10692 */
10693 if (phba->sli_rev != LPFC_SLI_REV4) {
10694 for (i = 0; i < psli->num_rings; i++) {
10695 pring = &psli->sli3_ring[i];
10696 prev_pring_flag = pring->flag;
10697 /* Only slow rings */
10698 if (pring->ringno == LPFC_ELS_RING) {
10699 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10700 /* Set the lpfc data pending flag */
10701 set_bit(LPFC_DATA_READY, &phba->data_flags);
10702 }
10703 list_for_each_entry_safe(iocb, next_iocb,
10704 &pring->txq, list) {
10705 if (iocb->vport != vport)
10706 continue;
10707 list_move_tail(&iocb->list, &completions);
10708 }
10709 list_for_each_entry_safe(iocb, next_iocb,
10710 &pring->txcmplq, list) {
10711 if (iocb->vport != vport)
10712 continue;
10713 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10714 }
10715 pring->flag = prev_pring_flag;
10716 }
10717 } else {
10718 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10719 pring = qp->pring;
10720 if (!pring)
92d7f7b0 10721 continue;
895427bd
JS
10722 if (pring == phba->sli4_hba.els_wq->pring) {
10723 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10724 /* Set the lpfc data pending flag */
10725 set_bit(LPFC_DATA_READY, &phba->data_flags);
10726 }
10727 prev_pring_flag = pring->flag;
10728 spin_lock_irq(&pring->ring_lock);
10729 list_for_each_entry_safe(iocb, next_iocb,
10730 &pring->txq, list) {
10731 if (iocb->vport != vport)
10732 continue;
10733 list_move_tail(&iocb->list, &completions);
10734 }
10735 spin_unlock_irq(&pring->ring_lock);
10736 list_for_each_entry_safe(iocb, next_iocb,
10737 &pring->txcmplq, list) {
10738 if (iocb->vport != vport)
10739 continue;
10740 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10741 }
10742 pring->flag = prev_pring_flag;
92d7f7b0 10743 }
92d7f7b0 10744 }
92d7f7b0
JS
10745 spin_unlock_irqrestore(&phba->hbalock, flags);
10746
a257bf90
JS
10747 /* Cancel all the IOCBs from the completions list */
10748 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10749 IOERR_SLI_DOWN);
92d7f7b0
JS
10750 return 1;
10751}
10752
e59058c4 10753/**
3621a710 10754 * lpfc_sli_hba_down - Resource cleanup function for the HBA
e59058c4
JS
10755 * @phba: Pointer to HBA context object.
10756 *
10757 * This function cleans up all iocb, buffers, mailbox commands
10758 * while shutting down the HBA. This function is called with no
10759 * lock held and always returns 1.
10760 * This function does the following to cleanup driver resources:
10761 * - Free discovery resources for each virtual port
10762 * - Cleanup any pending fabric iocbs
10763 * - Iterate through the iocb txq and free each entry
10764 * in the list.
10765 * - Free up any buffer posted to the HBA
10766 * - Free mailbox commands in the mailbox queue.
10767 **/
dea3101e 10768int
2e0fef85 10769lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 10770{
2534ba75 10771 LIST_HEAD(completions);
2e0fef85 10772 struct lpfc_sli *psli = &phba->sli;
895427bd 10773 struct lpfc_queue *qp = NULL;
dea3101e 10774 struct lpfc_sli_ring *pring;
0ff10d46 10775 struct lpfc_dmabuf *buf_ptr;
dea3101e 10776 unsigned long flags = 0;
04c68496
JS
10777 int i;
10778
10779 /* Shutdown the mailbox command sub-system */
618a5230 10780 lpfc_sli_mbox_sys_shutdown(phba, LPFC_MBX_WAIT);
dea3101e 10781
dea3101e
JB
10782 lpfc_hba_down_prep(phba);
10783
523128e5
JS
10784 /* Disable softirqs, including timers from obtaining phba->hbalock */
10785 local_bh_disable();
10786
92d7f7b0
JS
10787 lpfc_fabric_abort_hba(phba);
10788
2e0fef85 10789 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e 10790
895427bd
JS
10791 /*
10792 * Error everything on the txq since these iocbs
10793 * have not been given to the FW yet.
10794 */
10795 if (phba->sli_rev != LPFC_SLI_REV4) {
10796 for (i = 0; i < psli->num_rings; i++) {
10797 pring = &psli->sli3_ring[i];
10798 /* Only slow rings */
10799 if (pring->ringno == LPFC_ELS_RING) {
10800 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10801 /* Set the lpfc data pending flag */
10802 set_bit(LPFC_DATA_READY, &phba->data_flags);
10803 }
10804 list_splice_init(&pring->txq, &completions);
10805 }
10806 } else {
10807 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10808 pring = qp->pring;
10809 if (!pring)
10810 continue;
10811 spin_lock_irq(&pring->ring_lock);
10812 list_splice_init(&pring->txq, &completions);
10813 spin_unlock_irq(&pring->ring_lock);
10814 if (pring == phba->sli4_hba.els_wq->pring) {
10815 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10816 /* Set the lpfc data pending flag */
10817 set_bit(LPFC_DATA_READY, &phba->data_flags);
10818 }
10819 }
2534ba75 10820 }
2e0fef85 10821 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 10822
a257bf90
JS
10823 /* Cancel all the IOCBs from the completions list */
10824 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10825 IOERR_SLI_DOWN);
dea3101e 10826
0ff10d46
JS
10827 spin_lock_irqsave(&phba->hbalock, flags);
10828 list_splice_init(&phba->elsbuf, &completions);
10829 phba->elsbuf_cnt = 0;
10830 phba->elsbuf_prev_cnt = 0;
10831 spin_unlock_irqrestore(&phba->hbalock, flags);
10832
10833 while (!list_empty(&completions)) {
10834 list_remove_head(&completions, buf_ptr,
10835 struct lpfc_dmabuf, list);
10836 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
10837 kfree(buf_ptr);
10838 }
10839
523128e5
JS
10840 /* Enable softirqs again, done with phba->hbalock */
10841 local_bh_enable();
10842
dea3101e
JB
10843 /* Return any active mbox cmds */
10844 del_timer_sync(&psli->mbox_tmo);
2e0fef85 10845
da0436e9 10846 spin_lock_irqsave(&phba->pport->work_port_lock, flags);
2e0fef85 10847 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
da0436e9 10848 spin_unlock_irqrestore(&phba->pport->work_port_lock, flags);
2e0fef85 10849
da0436e9
JS
10850 return 1;
10851}
10852
e59058c4 10853/**
3621a710 10854 * lpfc_sli_pcimem_bcopy - SLI memory copy function
e59058c4
JS
10855 * @srcp: Source memory pointer.
10856 * @destp: Destination memory pointer.
10857 * @cnt: Number of words required to be copied.
10858 *
10859 * This function is used for copying data between driver memory
10860 * and the SLI memory. This function also changes the endianness
10861 * of each word if native endianness is different from SLI
10862 * endianness. This function can be called with or without
10863 * lock.
10864 **/
dea3101e
JB
10865void
10866lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
10867{
10868 uint32_t *src = srcp;
10869 uint32_t *dest = destp;
10870 uint32_t ldata;
10871 int i;
10872
10873 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
10874 ldata = *src;
10875 ldata = le32_to_cpu(ldata);
10876 *dest = ldata;
10877 src++;
10878 dest++;
10879 }
10880}
10881
e59058c4 10882
a0c87cbd
JS
10883/**
10884 * lpfc_sli_bemem_bcopy - SLI memory copy function
10885 * @srcp: Source memory pointer.
10886 * @destp: Destination memory pointer.
10887 * @cnt: Number of words required to be copied.
10888 *
10889 * This function is used for copying data between a data structure
10890 * with big endian representation to local endianness.
10891 * This function can be called with or without lock.
10892 **/
10893void
10894lpfc_sli_bemem_bcopy(void *srcp, void *destp, uint32_t cnt)
10895{
10896 uint32_t *src = srcp;
10897 uint32_t *dest = destp;
10898 uint32_t ldata;
10899 int i;
10900
10901 for (i = 0; i < (int)cnt; i += sizeof(uint32_t)) {
10902 ldata = *src;
10903 ldata = be32_to_cpu(ldata);
10904 *dest = ldata;
10905 src++;
10906 dest++;
10907 }
10908}
10909
e59058c4 10910/**
3621a710 10911 * lpfc_sli_ringpostbuf_put - Function to add a buffer to postbufq
e59058c4
JS
10912 * @phba: Pointer to HBA context object.
10913 * @pring: Pointer to driver SLI ring object.
10914 * @mp: Pointer to driver buffer object.
10915 *
10916 * This function is called with no lock held.
10917 * It always return zero after adding the buffer to the postbufq
10918 * buffer list.
10919 **/
dea3101e 10920int
2e0fef85
JS
10921lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10922 struct lpfc_dmabuf *mp)
dea3101e
JB
10923{
10924 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
10925 later */
2e0fef85 10926 spin_lock_irq(&phba->hbalock);
dea3101e 10927 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 10928 pring->postbufq_cnt++;
2e0fef85 10929 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10930 return 0;
10931}
10932
e59058c4 10933/**
3621a710 10934 * lpfc_sli_get_buffer_tag - allocates a tag for a CMD_QUE_XRI64_CX buffer
e59058c4
JS
10935 * @phba: Pointer to HBA context object.
10936 *
10937 * When HBQ is enabled, buffers are searched based on tags. This function
10938 * allocates a tag for buffer posted using CMD_QUE_XRI64_CX iocb. The
10939 * tag is bit wise or-ed with QUE_BUFTAG_BIT to make sure that the tag
10940 * does not conflict with tags of buffer posted for unsolicited events.
10941 * The function returns the allocated tag. The function is called with
10942 * no locks held.
10943 **/
76bb24ef
JS
10944uint32_t
10945lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
10946{
10947 spin_lock_irq(&phba->hbalock);
10948 phba->buffer_tag_count++;
10949 /*
10950 * Always set the QUE_BUFTAG_BIT to distiguish between
10951 * a tag assigned by HBQ.
10952 */
10953 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
10954 spin_unlock_irq(&phba->hbalock);
10955 return phba->buffer_tag_count;
10956}
10957
e59058c4 10958/**
3621a710 10959 * lpfc_sli_ring_taggedbuf_get - find HBQ buffer associated with given tag
e59058c4
JS
10960 * @phba: Pointer to HBA context object.
10961 * @pring: Pointer to driver SLI ring object.
10962 * @tag: Buffer tag.
10963 *
10964 * Buffers posted using CMD_QUE_XRI64_CX iocb are in pring->postbufq
10965 * list. After HBA DMA data to these buffers, CMD_IOCB_RET_XRI64_CX
10966 * iocb is posted to the response ring with the tag of the buffer.
10967 * This function searches the pring->postbufq list using the tag
10968 * to find buffer associated with CMD_IOCB_RET_XRI64_CX
10969 * iocb. If the buffer is found then lpfc_dmabuf object of the
10970 * buffer is returned to the caller else NULL is returned.
10971 * This function is called with no lock held.
10972 **/
76bb24ef
JS
10973struct lpfc_dmabuf *
10974lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10975 uint32_t tag)
10976{
10977 struct lpfc_dmabuf *mp, *next_mp;
10978 struct list_head *slp = &pring->postbufq;
10979
25985edc 10980 /* Search postbufq, from the beginning, looking for a match on tag */
76bb24ef
JS
10981 spin_lock_irq(&phba->hbalock);
10982 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
10983 if (mp->buffer_tag == tag) {
10984 list_del_init(&mp->list);
10985 pring->postbufq_cnt--;
10986 spin_unlock_irq(&phba->hbalock);
10987 return mp;
10988 }
10989 }
10990
10991 spin_unlock_irq(&phba->hbalock);
10992 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 10993 "0402 Cannot find virtual addr for buffer tag on "
76bb24ef
JS
10994 "ring %d Data x%lx x%p x%p x%x\n",
10995 pring->ringno, (unsigned long) tag,
10996 slp->next, slp->prev, pring->postbufq_cnt);
10997
10998 return NULL;
10999}
dea3101e 11000
e59058c4 11001/**
3621a710 11002 * lpfc_sli_ringpostbuf_get - search buffers for unsolicited CT and ELS events
e59058c4
JS
11003 * @phba: Pointer to HBA context object.
11004 * @pring: Pointer to driver SLI ring object.
11005 * @phys: DMA address of the buffer.
11006 *
11007 * This function searches the buffer list using the dma_address
11008 * of unsolicited event to find the driver's lpfc_dmabuf object
11009 * corresponding to the dma_address. The function returns the
11010 * lpfc_dmabuf object if a buffer is found else it returns NULL.
11011 * This function is called by the ct and els unsolicited event
11012 * handlers to get the buffer associated with the unsolicited
11013 * event.
11014 *
11015 * This function is called with no lock held.
11016 **/
dea3101e
JB
11017struct lpfc_dmabuf *
11018lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11019 dma_addr_t phys)
11020{
11021 struct lpfc_dmabuf *mp, *next_mp;
11022 struct list_head *slp = &pring->postbufq;
11023
25985edc 11024 /* Search postbufq, from the beginning, looking for a match on phys */
2e0fef85 11025 spin_lock_irq(&phba->hbalock);
dea3101e
JB
11026 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
11027 if (mp->phys == phys) {
11028 list_del_init(&mp->list);
11029 pring->postbufq_cnt--;
2e0fef85 11030 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
11031 return mp;
11032 }
11033 }
11034
2e0fef85 11035 spin_unlock_irq(&phba->hbalock);
dea3101e 11036 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 11037 "0410 Cannot find virtual addr for mapped buf on "
dea3101e 11038 "ring %d Data x%llx x%p x%p x%x\n",
e8b62011 11039 pring->ringno, (unsigned long long)phys,
dea3101e
JB
11040 slp->next, slp->prev, pring->postbufq_cnt);
11041 return NULL;
11042}
11043
e59058c4 11044/**
3621a710 11045 * lpfc_sli_abort_els_cmpl - Completion handler for the els abort iocbs
e59058c4
JS
11046 * @phba: Pointer to HBA context object.
11047 * @cmdiocb: Pointer to driver command iocb object.
11048 * @rspiocb: Pointer to driver response iocb object.
11049 *
11050 * This function is the completion handler for the abort iocbs for
11051 * ELS commands. This function is called from the ELS ring event
11052 * handler with no lock held. This function frees memory resources
11053 * associated with the abort iocb.
11054 **/
dea3101e 11055static void
2e0fef85
JS
11056lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11057 struct lpfc_iocbq *rspiocb)
dea3101e 11058{
2e0fef85 11059 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 11060 uint16_t abort_iotag, abort_context;
ff78d8f9 11061 struct lpfc_iocbq *abort_iocb = NULL;
2680eeaa
JS
11062
11063 if (irsp->ulpStatus) {
ff78d8f9
JS
11064
11065 /*
11066 * Assume that the port already completed and returned, or
11067 * will return the iocb. Just Log the message.
11068 */
2680eeaa
JS
11069 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
11070 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
11071
2e0fef85 11072 spin_lock_irq(&phba->hbalock);
45ed1190 11073 if (phba->sli_rev < LPFC_SLI_REV4) {
faa832e9
JS
11074 if (irsp->ulpCommand == CMD_ABORT_XRI_CX &&
11075 irsp->ulpStatus == IOSTAT_LOCAL_REJECT &&
11076 irsp->un.ulpWord[4] == IOERR_ABORT_REQUESTED) {
11077 spin_unlock_irq(&phba->hbalock);
11078 goto release_iocb;
11079 }
45ed1190
JS
11080 if (abort_iotag != 0 &&
11081 abort_iotag <= phba->sli.last_iotag)
11082 abort_iocb =
11083 phba->sli.iocbq_lookup[abort_iotag];
11084 } else
11085 /* For sli4 the abort_tag is the XRI,
11086 * so the abort routine puts the iotag of the iocb
11087 * being aborted in the context field of the abort
11088 * IOCB.
11089 */
11090 abort_iocb = phba->sli.iocbq_lookup[abort_context];
2680eeaa 11091
2a9bf3d0
JS
11092 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS | LOG_SLI,
11093 "0327 Cannot abort els iocb %p "
11094 "with tag %x context %x, abort status %x, "
11095 "abort code %x\n",
11096 abort_iocb, abort_iotag, abort_context,
11097 irsp->ulpStatus, irsp->un.ulpWord[4]);
341af102 11098
ff78d8f9 11099 spin_unlock_irq(&phba->hbalock);
29601228
JS
11100 if (irsp->ulpStatus == IOSTAT_LOCAL_REJECT &&
11101 irsp->un.ulpWord[4] == IOERR_SLI_ABORTED)
11102 lpfc_sli_release_iocbq(phba, abort_iocb);
2680eeaa 11103 }
faa832e9 11104release_iocb:
604a3e30 11105 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB
11106 return;
11107}
11108
e59058c4 11109/**
3621a710 11110 * lpfc_ignore_els_cmpl - Completion handler for aborted ELS command
e59058c4
JS
11111 * @phba: Pointer to HBA context object.
11112 * @cmdiocb: Pointer to driver command iocb object.
11113 * @rspiocb: Pointer to driver response iocb object.
11114 *
11115 * The function is called from SLI ring event handler with no
11116 * lock held. This function is the completion handler for ELS commands
11117 * which are aborted. The function frees memory resources used for
11118 * the aborted ELS commands.
11119 **/
92d7f7b0
JS
11120static void
11121lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11122 struct lpfc_iocbq *rspiocb)
11123{
11124 IOCB_t *irsp = &rspiocb->iocb;
11125
11126 /* ELS cmd tag <ulpIoTag> completes */
11127 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
d7c255b2 11128 "0139 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 11129 "x%x x%x x%x\n",
e8b62011 11130 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 11131 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS
11132 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
11133 lpfc_ct_free_iocb(phba, cmdiocb);
11134 else
11135 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS
11136 return;
11137}
11138
e59058c4 11139/**
5af5eee7 11140 * lpfc_sli_abort_iotag_issue - Issue abort for a command iocb
e59058c4
JS
11141 * @phba: Pointer to HBA context object.
11142 * @pring: Pointer to driver SLI ring object.
11143 * @cmdiocb: Pointer to driver command iocb object.
11144 *
5af5eee7
JS
11145 * This function issues an abort iocb for the provided command iocb down to
11146 * the port. Other than the case the outstanding command iocb is an abort
11147 * request, this function issues abort out unconditionally. This function is
11148 * called with hbalock held. The function returns 0 when it fails due to
11149 * memory allocation failure or when the command iocb is an abort request.
e59058c4 11150 **/
5af5eee7
JS
11151static int
11152lpfc_sli_abort_iotag_issue(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 11153 struct lpfc_iocbq *cmdiocb)
dea3101e 11154{
2e0fef85 11155 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 11156 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB
11157 IOCB_t *icmd = NULL;
11158 IOCB_t *iabt = NULL;
5af5eee7 11159 int retval;
7e56aa25 11160 unsigned long iflags;
faa832e9 11161 struct lpfc_nodelist *ndlp;
07951076 11162
1c2ba475
JT
11163 lockdep_assert_held(&phba->hbalock);
11164
92d7f7b0
JS
11165 /*
11166 * There are certain command types we don't want to abort. And we
11167 * don't want to abort commands that are already in the process of
11168 * being aborted.
07951076
JS
11169 */
11170 icmd = &cmdiocb->iocb;
2e0fef85 11171 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS
11172 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11173 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS
11174 return 0;
11175
dea3101e 11176 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 11177 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
11178 if (abtsiocbp == NULL)
11179 return 0;
dea3101e 11180
07951076 11181 /* This signals the response to set the correct status
341af102 11182 * before calling the completion handler
07951076
JS
11183 */
11184 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
11185
dea3101e 11186 iabt = &abtsiocbp->iocb;
07951076
JS
11187 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
11188 iabt->un.acxri.abortContextTag = icmd->ulpContext;
45ed1190 11189 if (phba->sli_rev == LPFC_SLI_REV4) {
da0436e9 11190 iabt->un.acxri.abortIoTag = cmdiocb->sli4_xritag;
45ed1190 11191 iabt->un.acxri.abortContextTag = cmdiocb->iotag;
faa832e9 11192 } else {
da0436e9 11193 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
faa832e9
JS
11194 if (pring->ringno == LPFC_ELS_RING) {
11195 ndlp = (struct lpfc_nodelist *)(cmdiocb->context1);
11196 iabt->un.acxri.abortContextTag = ndlp->nlp_rpi;
11197 }
11198 }
07951076
JS
11199 iabt->ulpLe = 1;
11200 iabt->ulpClass = icmd->ulpClass;
dea3101e 11201
5ffc266e 11202 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11203 abtsiocbp->hba_wqidx = cmdiocb->hba_wqidx;
341af102
JS
11204 if (cmdiocb->iocb_flag & LPFC_IO_FCP)
11205 abtsiocbp->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11206 if (cmdiocb->iocb_flag & LPFC_IO_FOF)
11207 abtsiocbp->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11208
2e0fef85 11209 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS
11210 iabt->ulpCommand = CMD_ABORT_XRI_CN;
11211 else
11212 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 11213
07951076 11214 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
e6c6acc0 11215 abtsiocbp->vport = vport;
5b8bd0c9 11216
e8b62011
JS
11217 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
11218 "0339 Abort xri x%x, original iotag x%x, "
11219 "abort cmd iotag x%x\n",
2a9bf3d0 11220 iabt->un.acxri.abortIoTag,
e8b62011 11221 iabt->un.acxri.abortContextTag,
2a9bf3d0 11222 abtsiocbp->iotag);
7e56aa25
JS
11223
11224 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
11225 pring = lpfc_sli4_calc_ring(phba, abtsiocbp);
11226 if (unlikely(pring == NULL))
9bd2bff5 11227 return 0;
7e56aa25
JS
11228 /* Note: both hbalock and ring_lock need to be set here */
11229 spin_lock_irqsave(&pring->ring_lock, iflags);
11230 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11231 abtsiocbp, 0);
11232 spin_unlock_irqrestore(&pring->ring_lock, iflags);
11233 } else {
11234 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11235 abtsiocbp, 0);
11236 }
dea3101e 11237
d7c255b2
JS
11238 if (retval)
11239 __lpfc_sli_release_iocbq(phba, abtsiocbp);
5af5eee7
JS
11240
11241 /*
11242 * Caller to this routine should check for IOCB_ERROR
11243 * and handle it properly. This routine no longer removes
11244 * iocb off txcmplq and call compl in case of IOCB_ERROR.
11245 */
11246 return retval;
11247}
11248
11249/**
11250 * lpfc_sli_issue_abort_iotag - Abort function for a command iocb
11251 * @phba: Pointer to HBA context object.
11252 * @pring: Pointer to driver SLI ring object.
11253 * @cmdiocb: Pointer to driver command iocb object.
11254 *
11255 * This function issues an abort iocb for the provided command iocb. In case
11256 * of unloading, the abort iocb will not be issued to commands on the ELS
11257 * ring. Instead, the callback function shall be changed to those commands
11258 * so that nothing happens when them finishes. This function is called with
11259 * hbalock held. The function returns 0 when the command iocb is an abort
11260 * request.
11261 **/
11262int
11263lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11264 struct lpfc_iocbq *cmdiocb)
11265{
11266 struct lpfc_vport *vport = cmdiocb->vport;
11267 int retval = IOCB_ERROR;
11268 IOCB_t *icmd = NULL;
11269
1c2ba475
JT
11270 lockdep_assert_held(&phba->hbalock);
11271
5af5eee7
JS
11272 /*
11273 * There are certain command types we don't want to abort. And we
11274 * don't want to abort commands that are already in the process of
11275 * being aborted.
11276 */
11277 icmd = &cmdiocb->iocb;
11278 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
11279 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11280 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
11281 return 0;
11282
1234a6d5
DK
11283 if (!pring) {
11284 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11285 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11286 else
11287 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11288 goto abort_iotag_exit;
11289 }
11290
5af5eee7
JS
11291 /*
11292 * If we're unloading, don't abort iocb on the ELS ring, but change
11293 * the callback so that nothing happens when it finishes.
11294 */
11295 if ((vport->load_flag & FC_UNLOADING) &&
11296 (pring->ringno == LPFC_ELS_RING)) {
11297 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11298 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11299 else
11300 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11301 goto abort_iotag_exit;
11302 }
11303
11304 /* Now, we try to issue the abort to the cmdiocb out */
11305 retval = lpfc_sli_abort_iotag_issue(phba, pring, cmdiocb);
11306
07951076 11307abort_iotag_exit:
2e0fef85
JS
11308 /*
11309 * Caller to this routine should check for IOCB_ERROR
11310 * and handle it properly. This routine no longer removes
11311 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 11312 */
2e0fef85 11313 return retval;
dea3101e
JB
11314}
11315
5af5eee7
JS
11316/**
11317 * lpfc_sli_hba_iocb_abort - Abort all iocbs to an hba.
11318 * @phba: pointer to lpfc HBA data structure.
11319 *
11320 * This routine will abort all pending and outstanding iocbs to an HBA.
11321 **/
11322void
11323lpfc_sli_hba_iocb_abort(struct lpfc_hba *phba)
11324{
11325 struct lpfc_sli *psli = &phba->sli;
11326 struct lpfc_sli_ring *pring;
895427bd 11327 struct lpfc_queue *qp = NULL;
5af5eee7
JS
11328 int i;
11329
895427bd
JS
11330 if (phba->sli_rev != LPFC_SLI_REV4) {
11331 for (i = 0; i < psli->num_rings; i++) {
11332 pring = &psli->sli3_ring[i];
11333 lpfc_sli_abort_iocb_ring(phba, pring);
11334 }
11335 return;
11336 }
11337 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
11338 pring = qp->pring;
11339 if (!pring)
11340 continue;
db55fba8 11341 lpfc_sli_abort_iocb_ring(phba, pring);
5af5eee7
JS
11342 }
11343}
11344
e59058c4 11345/**
3621a710 11346 * lpfc_sli_validate_fcp_iocb - find commands associated with a vport or LUN
e59058c4
JS
11347 * @iocbq: Pointer to driver iocb object.
11348 * @vport: Pointer to driver virtual port object.
11349 * @tgt_id: SCSI ID of the target.
11350 * @lun_id: LUN ID of the scsi device.
11351 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST
11352 *
3621a710 11353 * This function acts as an iocb filter for functions which abort or count
e59058c4
JS
11354 * all FCP iocbs pending on a lun/SCSI target/SCSI host. It will return
11355 * 0 if the filtering criteria is met for the given iocb and will return
11356 * 1 if the filtering criteria is not met.
11357 * If ctx_cmd == LPFC_CTX_LUN, the function returns 0 only if the
11358 * given iocb is for the SCSI device specified by vport, tgt_id and
11359 * lun_id parameter.
11360 * If ctx_cmd == LPFC_CTX_TGT, the function returns 0 only if the
11361 * given iocb is for the SCSI target specified by vport and tgt_id
11362 * parameters.
11363 * If ctx_cmd == LPFC_CTX_HOST, the function returns 0 only if the
11364 * given iocb is for the SCSI host associated with the given vport.
11365 * This function is called with no locks held.
11366 **/
dea3101e 11367static int
51ef4c26
JS
11368lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
11369 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 11370 lpfc_ctx_cmd ctx_cmd)
dea3101e 11371{
c490850a 11372 struct lpfc_io_buf *lpfc_cmd;
dea3101e
JB
11373 int rc = 1;
11374
b0e83012 11375 if (iocbq->vport != vport)
0bd4ca25
JSEC
11376 return rc;
11377
b0e83012
JS
11378 if (!(iocbq->iocb_flag & LPFC_IO_FCP) ||
11379 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ))
51ef4c26
JS
11380 return rc;
11381
c490850a 11382 lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq);
0bd4ca25 11383
495a714c 11384 if (lpfc_cmd->pCmd == NULL)
dea3101e
JB
11385 return rc;
11386
11387 switch (ctx_cmd) {
11388 case LPFC_CTX_LUN:
b0e83012 11389 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c
JS
11390 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id) &&
11391 (scsilun_to_int(&lpfc_cmd->fcp_cmnd->fcp_lun) == lun_id))
dea3101e
JB
11392 rc = 0;
11393 break;
11394 case LPFC_CTX_TGT:
b0e83012 11395 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c 11396 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id))
dea3101e
JB
11397 rc = 0;
11398 break;
dea3101e
JB
11399 case LPFC_CTX_HOST:
11400 rc = 0;
11401 break;
11402 default:
11403 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
cadbd4a5 11404 __func__, ctx_cmd);
dea3101e
JB
11405 break;
11406 }
11407
11408 return rc;
11409}
11410
e59058c4 11411/**
3621a710 11412 * lpfc_sli_sum_iocb - Function to count the number of FCP iocbs pending
e59058c4
JS
11413 * @vport: Pointer to virtual port.
11414 * @tgt_id: SCSI ID of the target.
11415 * @lun_id: LUN ID of the scsi device.
11416 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11417 *
11418 * This function returns number of FCP commands pending for the vport.
11419 * When ctx_cmd == LPFC_CTX_LUN, the function returns number of FCP
11420 * commands pending on the vport associated with SCSI device specified
11421 * by tgt_id and lun_id parameters.
11422 * When ctx_cmd == LPFC_CTX_TGT, the function returns number of FCP
11423 * commands pending on the vport associated with SCSI target specified
11424 * by tgt_id parameter.
11425 * When ctx_cmd == LPFC_CTX_HOST, the function returns number of FCP
11426 * commands pending on the vport.
11427 * This function returns the number of iocbs which satisfy the filter.
11428 * This function is called without any lock held.
11429 **/
dea3101e 11430int
51ef4c26
JS
11431lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
11432 lpfc_ctx_cmd ctx_cmd)
dea3101e 11433{
51ef4c26 11434 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11435 struct lpfc_iocbq *iocbq;
11436 int sum, i;
dea3101e 11437
31979008 11438 spin_lock_irq(&phba->hbalock);
0bd4ca25
JSEC
11439 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
11440 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11441
51ef4c26
JS
11442 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
11443 ctx_cmd) == 0)
0bd4ca25 11444 sum++;
dea3101e 11445 }
31979008 11446 spin_unlock_irq(&phba->hbalock);
0bd4ca25 11447
dea3101e
JB
11448 return sum;
11449}
11450
e59058c4 11451/**
3621a710 11452 * lpfc_sli_abort_fcp_cmpl - Completion handler function for aborted FCP IOCBs
e59058c4
JS
11453 * @phba: Pointer to HBA context object
11454 * @cmdiocb: Pointer to command iocb object.
11455 * @rspiocb: Pointer to response iocb object.
11456 *
11457 * This function is called when an aborted FCP iocb completes. This
11458 * function is called by the ring event handler with no lock held.
11459 * This function frees the iocb.
11460 **/
5eb95af0 11461void
2e0fef85
JS
11462lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11463 struct lpfc_iocbq *rspiocb)
5eb95af0 11464{
cb69f7de 11465 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8e668af5 11466 "3096 ABORT_XRI_CN completing on rpi x%x "
cb69f7de
JS
11467 "original iotag x%x, abort cmd iotag x%x "
11468 "status 0x%x, reason 0x%x\n",
11469 cmdiocb->iocb.un.acxri.abortContextTag,
11470 cmdiocb->iocb.un.acxri.abortIoTag,
11471 cmdiocb->iotag, rspiocb->iocb.ulpStatus,
11472 rspiocb->iocb.un.ulpWord[4]);
604a3e30 11473 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC
11474 return;
11475}
11476
e59058c4 11477/**
3621a710 11478 * lpfc_sli_abort_iocb - issue abort for all commands on a host/target/LUN
e59058c4
JS
11479 * @vport: Pointer to virtual port.
11480 * @pring: Pointer to driver SLI ring object.
11481 * @tgt_id: SCSI ID of the target.
11482 * @lun_id: LUN ID of the scsi device.
11483 * @abort_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11484 *
11485 * This function sends an abort command for every SCSI command
11486 * associated with the given virtual port pending on the ring
11487 * filtered by lpfc_sli_validate_fcp_iocb function.
11488 * When abort_cmd == LPFC_CTX_LUN, the function sends abort only to the
11489 * FCP iocbs associated with lun specified by tgt_id and lun_id
11490 * parameters
11491 * When abort_cmd == LPFC_CTX_TGT, the function sends abort only to the
11492 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11493 * When abort_cmd == LPFC_CTX_HOST, the function sends abort to all
11494 * FCP iocbs associated with virtual port.
11495 * This function returns number of iocbs it failed to abort.
11496 * This function is called with no locks held.
11497 **/
dea3101e 11498int
51ef4c26
JS
11499lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11500 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 11501{
51ef4c26 11502 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11503 struct lpfc_iocbq *iocbq;
11504 struct lpfc_iocbq *abtsiocb;
ecbb227e 11505 struct lpfc_sli_ring *pring_s4;
dea3101e 11506 IOCB_t *cmd = NULL;
dea3101e 11507 int errcnt = 0, ret_val = 0;
0bd4ca25 11508 int i;
dea3101e 11509
b0e83012
JS
11510 /* all I/Os are in process of being flushed */
11511 if (phba->hba_flag & HBA_FCP_IOQ_FLUSH)
11512 return errcnt;
11513
0bd4ca25
JSEC
11514 for (i = 1; i <= phba->sli.last_iotag; i++) {
11515 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11516
51ef4c26 11517 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 11518 abort_cmd) != 0)
dea3101e
JB
11519 continue;
11520
afbd8d88
JS
11521 /*
11522 * If the iocbq is already being aborted, don't take a second
11523 * action, but do count it.
11524 */
11525 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11526 continue;
11527
dea3101e 11528 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 11529 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
11530 if (abtsiocb == NULL) {
11531 errcnt++;
11532 continue;
11533 }
dea3101e 11534
afbd8d88
JS
11535 /* indicate the IO is being aborted by the driver. */
11536 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11537
0bd4ca25 11538 cmd = &iocbq->iocb;
dea3101e
JB
11539 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11540 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
da0436e9
JS
11541 if (phba->sli_rev == LPFC_SLI_REV4)
11542 abtsiocb->iocb.un.acxri.abortIoTag = iocbq->sli4_xritag;
11543 else
11544 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
dea3101e
JB
11545 abtsiocb->iocb.ulpLe = 1;
11546 abtsiocb->iocb.ulpClass = cmd->ulpClass;
afbd8d88 11547 abtsiocb->vport = vport;
dea3101e 11548
5ffc266e 11549 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11550 abtsiocb->hba_wqidx = iocbq->hba_wqidx;
341af102
JS
11551 if (iocbq->iocb_flag & LPFC_IO_FCP)
11552 abtsiocb->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11553 if (iocbq->iocb_flag & LPFC_IO_FOF)
11554 abtsiocb->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11555
2e0fef85 11556 if (lpfc_is_link_up(phba))
dea3101e
JB
11557 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11558 else
11559 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11560
5eb95af0
JSEC
11561 /* Setup callback routine and issue the command. */
11562 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
ecbb227e
JS
11563 if (phba->sli_rev == LPFC_SLI_REV4) {
11564 pring_s4 = lpfc_sli4_calc_ring(phba, iocbq);
11565 if (!pring_s4)
11566 continue;
11567 ret_val = lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11568 abtsiocb, 0);
11569 } else
11570 ret_val = lpfc_sli_issue_iocb(phba, pring->ringno,
11571 abtsiocb, 0);
dea3101e 11572 if (ret_val == IOCB_ERROR) {
604a3e30 11573 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB
11574 errcnt++;
11575 continue;
11576 }
11577 }
11578
11579 return errcnt;
11580}
11581
98912dda
JS
11582/**
11583 * lpfc_sli_abort_taskmgmt - issue abort for all commands on a host/target/LUN
11584 * @vport: Pointer to virtual port.
11585 * @pring: Pointer to driver SLI ring object.
11586 * @tgt_id: SCSI ID of the target.
11587 * @lun_id: LUN ID of the scsi device.
11588 * @taskmgmt_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11589 *
11590 * This function sends an abort command for every SCSI command
11591 * associated with the given virtual port pending on the ring
11592 * filtered by lpfc_sli_validate_fcp_iocb function.
11593 * When taskmgmt_cmd == LPFC_CTX_LUN, the function sends abort only to the
11594 * FCP iocbs associated with lun specified by tgt_id and lun_id
11595 * parameters
11596 * When taskmgmt_cmd == LPFC_CTX_TGT, the function sends abort only to the
11597 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11598 * When taskmgmt_cmd == LPFC_CTX_HOST, the function sends abort to all
11599 * FCP iocbs associated with virtual port.
11600 * This function returns number of iocbs it aborted .
11601 * This function is called with no locks held right after a taskmgmt
11602 * command is sent.
11603 **/
11604int
11605lpfc_sli_abort_taskmgmt(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11606 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd cmd)
11607{
11608 struct lpfc_hba *phba = vport->phba;
c490850a 11609 struct lpfc_io_buf *lpfc_cmd;
98912dda 11610 struct lpfc_iocbq *abtsiocbq;
8c50d25c 11611 struct lpfc_nodelist *ndlp;
98912dda
JS
11612 struct lpfc_iocbq *iocbq;
11613 IOCB_t *icmd;
11614 int sum, i, ret_val;
11615 unsigned long iflags;
c2017260 11616 struct lpfc_sli_ring *pring_s4 = NULL;
98912dda 11617
59c68eaa 11618 spin_lock_irqsave(&phba->hbalock, iflags);
98912dda
JS
11619
11620 /* all I/Os are in process of being flushed */
11621 if (phba->hba_flag & HBA_FCP_IOQ_FLUSH) {
59c68eaa 11622 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11623 return 0;
11624 }
11625 sum = 0;
11626
11627 for (i = 1; i <= phba->sli.last_iotag; i++) {
11628 iocbq = phba->sli.iocbq_lookup[i];
11629
11630 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
11631 cmd) != 0)
11632 continue;
11633
c2017260
JS
11634 /* Guard against IO completion being called at same time */
11635 lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq);
11636 spin_lock(&lpfc_cmd->buf_lock);
11637
11638 if (!lpfc_cmd->pCmd) {
11639 spin_unlock(&lpfc_cmd->buf_lock);
11640 continue;
11641 }
11642
11643 if (phba->sli_rev == LPFC_SLI_REV4) {
11644 pring_s4 =
11645 phba->sli4_hba.hdwq[iocbq->hba_wqidx].fcp_wq->pring;
11646 if (!pring_s4) {
11647 spin_unlock(&lpfc_cmd->buf_lock);
11648 continue;
11649 }
11650 /* Note: both hbalock and ring_lock must be set here */
11651 spin_lock(&pring_s4->ring_lock);
11652 }
11653
98912dda
JS
11654 /*
11655 * If the iocbq is already being aborted, don't take a second
11656 * action, but do count it.
11657 */
c2017260
JS
11658 if ((iocbq->iocb_flag & LPFC_DRIVER_ABORTED) ||
11659 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ)) {
11660 if (phba->sli_rev == LPFC_SLI_REV4)
11661 spin_unlock(&pring_s4->ring_lock);
11662 spin_unlock(&lpfc_cmd->buf_lock);
98912dda 11663 continue;
c2017260 11664 }
98912dda
JS
11665
11666 /* issue ABTS for this IOCB based on iotag */
11667 abtsiocbq = __lpfc_sli_get_iocbq(phba);
c2017260
JS
11668 if (!abtsiocbq) {
11669 if (phba->sli_rev == LPFC_SLI_REV4)
11670 spin_unlock(&pring_s4->ring_lock);
11671 spin_unlock(&lpfc_cmd->buf_lock);
98912dda 11672 continue;
c2017260 11673 }
98912dda
JS
11674
11675 icmd = &iocbq->iocb;
11676 abtsiocbq->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11677 abtsiocbq->iocb.un.acxri.abortContextTag = icmd->ulpContext;
11678 if (phba->sli_rev == LPFC_SLI_REV4)
11679 abtsiocbq->iocb.un.acxri.abortIoTag =
11680 iocbq->sli4_xritag;
11681 else
11682 abtsiocbq->iocb.un.acxri.abortIoTag = icmd->ulpIoTag;
11683 abtsiocbq->iocb.ulpLe = 1;
11684 abtsiocbq->iocb.ulpClass = icmd->ulpClass;
11685 abtsiocbq->vport = vport;
11686
11687 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11688 abtsiocbq->hba_wqidx = iocbq->hba_wqidx;
98912dda
JS
11689 if (iocbq->iocb_flag & LPFC_IO_FCP)
11690 abtsiocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11691 if (iocbq->iocb_flag & LPFC_IO_FOF)
11692 abtsiocbq->iocb_flag |= LPFC_IO_FOF;
98912dda 11693
8c50d25c
JS
11694 ndlp = lpfc_cmd->rdata->pnode;
11695
11696 if (lpfc_is_link_up(phba) &&
11697 (ndlp && ndlp->nlp_state == NLP_STE_MAPPED_NODE))
98912dda
JS
11698 abtsiocbq->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11699 else
11700 abtsiocbq->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11701
11702 /* Setup callback routine and issue the command. */
11703 abtsiocbq->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
11704
11705 /*
11706 * Indicate the IO is being aborted by the driver and set
11707 * the caller's flag into the aborted IO.
11708 */
11709 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11710
11711 if (phba->sli_rev == LPFC_SLI_REV4) {
98912dda
JS
11712 ret_val = __lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11713 abtsiocbq, 0);
59c68eaa 11714 spin_unlock(&pring_s4->ring_lock);
98912dda
JS
11715 } else {
11716 ret_val = __lpfc_sli_issue_iocb(phba, pring->ringno,
11717 abtsiocbq, 0);
11718 }
11719
c2017260 11720 spin_unlock(&lpfc_cmd->buf_lock);
98912dda
JS
11721
11722 if (ret_val == IOCB_ERROR)
11723 __lpfc_sli_release_iocbq(phba, abtsiocbq);
11724 else
11725 sum++;
11726 }
59c68eaa 11727 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11728 return sum;
11729}
11730
e59058c4 11731/**
3621a710 11732 * lpfc_sli_wake_iocb_wait - lpfc_sli_issue_iocb_wait's completion handler
e59058c4
JS
11733 * @phba: Pointer to HBA context object.
11734 * @cmdiocbq: Pointer to command iocb.
11735 * @rspiocbq: Pointer to response iocb.
11736 *
11737 * This function is the completion handler for iocbs issued using
11738 * lpfc_sli_issue_iocb_wait function. This function is called by the
11739 * ring event handler function without any lock held. This function
11740 * can be called from both worker thread context and interrupt
11741 * context. This function also can be called from other thread which
11742 * cleans up the SLI layer objects.
11743 * This function copy the contents of the response iocb to the
11744 * response iocb memory object provided by the caller of
11745 * lpfc_sli_issue_iocb_wait and then wakes up the thread which
11746 * sleeps for the iocb completion.
11747 **/
68876920
JSEC
11748static void
11749lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
11750 struct lpfc_iocbq *cmdiocbq,
11751 struct lpfc_iocbq *rspiocbq)
dea3101e 11752{
68876920
JSEC
11753 wait_queue_head_t *pdone_q;
11754 unsigned long iflags;
c490850a 11755 struct lpfc_io_buf *lpfc_cmd;
dea3101e 11756
2e0fef85 11757 spin_lock_irqsave(&phba->hbalock, iflags);
5a0916b4
JS
11758 if (cmdiocbq->iocb_flag & LPFC_IO_WAKE_TMO) {
11759
11760 /*
11761 * A time out has occurred for the iocb. If a time out
11762 * completion handler has been supplied, call it. Otherwise,
11763 * just free the iocbq.
11764 */
11765
11766 spin_unlock_irqrestore(&phba->hbalock, iflags);
11767 cmdiocbq->iocb_cmpl = cmdiocbq->wait_iocb_cmpl;
11768 cmdiocbq->wait_iocb_cmpl = NULL;
11769 if (cmdiocbq->iocb_cmpl)
11770 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, NULL);
11771 else
11772 lpfc_sli_release_iocbq(phba, cmdiocbq);
11773 return;
11774 }
11775
68876920
JSEC
11776 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
11777 if (cmdiocbq->context2 && rspiocbq)
11778 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
11779 &rspiocbq->iocb, sizeof(IOCB_t));
11780
0f65ff68
JS
11781 /* Set the exchange busy flag for task management commands */
11782 if ((cmdiocbq->iocb_flag & LPFC_IO_FCP) &&
11783 !(cmdiocbq->iocb_flag & LPFC_IO_LIBDFC)) {
c490850a 11784 lpfc_cmd = container_of(cmdiocbq, struct lpfc_io_buf,
0f65ff68
JS
11785 cur_iocbq);
11786 lpfc_cmd->exch_busy = rspiocbq->iocb_flag & LPFC_EXCHANGE_BUSY;
11787 }
11788
68876920 11789 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC
11790 if (pdone_q)
11791 wake_up(pdone_q);
858c9f6c 11792 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB
11793 return;
11794}
11795
d11e31dd
JS
11796/**
11797 * lpfc_chk_iocb_flg - Test IOCB flag with lock held.
11798 * @phba: Pointer to HBA context object..
11799 * @piocbq: Pointer to command iocb.
11800 * @flag: Flag to test.
11801 *
11802 * This routine grabs the hbalock and then test the iocb_flag to
11803 * see if the passed in flag is set.
11804 * Returns:
11805 * 1 if flag is set.
11806 * 0 if flag is not set.
11807 **/
11808static int
11809lpfc_chk_iocb_flg(struct lpfc_hba *phba,
11810 struct lpfc_iocbq *piocbq, uint32_t flag)
11811{
11812 unsigned long iflags;
11813 int ret;
11814
11815 spin_lock_irqsave(&phba->hbalock, iflags);
11816 ret = piocbq->iocb_flag & flag;
11817 spin_unlock_irqrestore(&phba->hbalock, iflags);
11818 return ret;
11819
11820}
11821
e59058c4 11822/**
3621a710 11823 * lpfc_sli_issue_iocb_wait - Synchronous function to issue iocb commands
e59058c4
JS
11824 * @phba: Pointer to HBA context object..
11825 * @pring: Pointer to sli ring.
11826 * @piocb: Pointer to command iocb.
11827 * @prspiocbq: Pointer to response iocb.
11828 * @timeout: Timeout in number of seconds.
11829 *
11830 * This function issues the iocb to firmware and waits for the
5a0916b4
JS
11831 * iocb to complete. The iocb_cmpl field of the shall be used
11832 * to handle iocbs which time out. If the field is NULL, the
11833 * function shall free the iocbq structure. If more clean up is
11834 * needed, the caller is expected to provide a completion function
11835 * that will provide the needed clean up. If the iocb command is
11836 * not completed within timeout seconds, the function will either
11837 * free the iocbq structure (if iocb_cmpl == NULL) or execute the
11838 * completion function set in the iocb_cmpl field and then return
11839 * a status of IOCB_TIMEDOUT. The caller should not free the iocb
11840 * resources if this function returns IOCB_TIMEDOUT.
e59058c4
JS
11841 * The function waits for the iocb completion using an
11842 * non-interruptible wait.
11843 * This function will sleep while waiting for iocb completion.
11844 * So, this function should not be called from any context which
11845 * does not allow sleeping. Due to the same reason, this function
11846 * cannot be called with interrupt disabled.
11847 * This function assumes that the iocb completions occur while
11848 * this function sleep. So, this function cannot be called from
11849 * the thread which process iocb completion for this ring.
11850 * This function clears the iocb_flag of the iocb object before
11851 * issuing the iocb and the iocb completion handler sets this
11852 * flag and wakes this thread when the iocb completes.
11853 * The contents of the response iocb will be copied to prspiocbq
11854 * by the completion handler when the command completes.
11855 * This function returns IOCB_SUCCESS when success.
11856 * This function is called with no lock held.
11857 **/
dea3101e 11858int
2e0fef85 11859lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
da0436e9 11860 uint32_t ring_number,
2e0fef85
JS
11861 struct lpfc_iocbq *piocb,
11862 struct lpfc_iocbq *prspiocbq,
68876920 11863 uint32_t timeout)
dea3101e 11864{
7259f0d0 11865 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC
11866 long timeleft, timeout_req = 0;
11867 int retval = IOCB_SUCCESS;
875fbdfe 11868 uint32_t creg_val;
0e9bb8d7
JS
11869 struct lpfc_iocbq *iocb;
11870 int txq_cnt = 0;
11871 int txcmplq_cnt = 0;
895427bd 11872 struct lpfc_sli_ring *pring;
5a0916b4
JS
11873 unsigned long iflags;
11874 bool iocb_completed = true;
11875
895427bd
JS
11876 if (phba->sli_rev >= LPFC_SLI_REV4)
11877 pring = lpfc_sli4_calc_ring(phba, piocb);
11878 else
11879 pring = &phba->sli.sli3_ring[ring_number];
dea3101e 11880 /*
68876920
JSEC
11881 * If the caller has provided a response iocbq buffer, then context2
11882 * is NULL or its an error.
dea3101e 11883 */
68876920
JSEC
11884 if (prspiocbq) {
11885 if (piocb->context2)
11886 return IOCB_ERROR;
11887 piocb->context2 = prspiocbq;
dea3101e
JB
11888 }
11889
5a0916b4 11890 piocb->wait_iocb_cmpl = piocb->iocb_cmpl;
68876920
JSEC
11891 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
11892 piocb->context_un.wait_queue = &done_q;
5a0916b4 11893 piocb->iocb_flag &= ~(LPFC_IO_WAKE | LPFC_IO_WAKE_TMO);
dea3101e 11894
875fbdfe 11895 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
11896 if (lpfc_readl(phba->HCregaddr, &creg_val))
11897 return IOCB_ERROR;
875fbdfe
JSEC
11898 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
11899 writel(creg_val, phba->HCregaddr);
11900 readl(phba->HCregaddr); /* flush */
11901 }
11902
2a9bf3d0
JS
11903 retval = lpfc_sli_issue_iocb(phba, ring_number, piocb,
11904 SLI_IOCB_RET_IOCB);
68876920 11905 if (retval == IOCB_SUCCESS) {
256ec0d0 11906 timeout_req = msecs_to_jiffies(timeout * 1000);
68876920 11907 timeleft = wait_event_timeout(done_q,
d11e31dd 11908 lpfc_chk_iocb_flg(phba, piocb, LPFC_IO_WAKE),
68876920 11909 timeout_req);
5a0916b4
JS
11910 spin_lock_irqsave(&phba->hbalock, iflags);
11911 if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
11912
11913 /*
11914 * IOCB timed out. Inform the wake iocb wait
11915 * completion function and set local status
11916 */
dea3101e 11917
5a0916b4
JS
11918 iocb_completed = false;
11919 piocb->iocb_flag |= LPFC_IO_WAKE_TMO;
11920 }
11921 spin_unlock_irqrestore(&phba->hbalock, iflags);
11922 if (iocb_completed) {
7054a606 11923 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 11924 "0331 IOCB wake signaled\n");
53151bbb
JS
11925 /* Note: we are not indicating if the IOCB has a success
11926 * status or not - that's for the caller to check.
11927 * IOCB_SUCCESS means just that the command was sent and
11928 * completed. Not that it completed successfully.
11929 * */
7054a606 11930 } else if (timeleft == 0) {
68876920 11931 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
11932 "0338 IOCB wait timeout error - no "
11933 "wake response Data x%x\n", timeout);
68876920 11934 retval = IOCB_TIMEDOUT;
7054a606 11935 } else {
68876920 11936 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
11937 "0330 IOCB wake NOT set, "
11938 "Data x%x x%lx\n",
68876920
JSEC
11939 timeout, (timeleft / jiffies));
11940 retval = IOCB_TIMEDOUT;
dea3101e 11941 }
2a9bf3d0 11942 } else if (retval == IOCB_BUSY) {
0e9bb8d7
JS
11943 if (phba->cfg_log_verbose & LOG_SLI) {
11944 list_for_each_entry(iocb, &pring->txq, list) {
11945 txq_cnt++;
11946 }
11947 list_for_each_entry(iocb, &pring->txcmplq, list) {
11948 txcmplq_cnt++;
11949 }
11950 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
11951 "2818 Max IOCBs %d txq cnt %d txcmplq cnt %d\n",
11952 phba->iocb_cnt, txq_cnt, txcmplq_cnt);
11953 }
2a9bf3d0 11954 return retval;
68876920
JSEC
11955 } else {
11956 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
d7c255b2 11957 "0332 IOCB wait issue failed, Data x%x\n",
e8b62011 11958 retval);
68876920 11959 retval = IOCB_ERROR;
dea3101e
JB
11960 }
11961
875fbdfe 11962 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
11963 if (lpfc_readl(phba->HCregaddr, &creg_val))
11964 return IOCB_ERROR;
875fbdfe
JSEC
11965 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
11966 writel(creg_val, phba->HCregaddr);
11967 readl(phba->HCregaddr); /* flush */
11968 }
11969
68876920
JSEC
11970 if (prspiocbq)
11971 piocb->context2 = NULL;
11972
11973 piocb->context_un.wait_queue = NULL;
11974 piocb->iocb_cmpl = NULL;
dea3101e
JB
11975 return retval;
11976}
68876920 11977
e59058c4 11978/**
3621a710 11979 * lpfc_sli_issue_mbox_wait - Synchronous function to issue mailbox
e59058c4
JS
11980 * @phba: Pointer to HBA context object.
11981 * @pmboxq: Pointer to driver mailbox object.
11982 * @timeout: Timeout in number of seconds.
11983 *
11984 * This function issues the mailbox to firmware and waits for the
11985 * mailbox command to complete. If the mailbox command is not
11986 * completed within timeout seconds, it returns MBX_TIMEOUT.
11987 * The function waits for the mailbox completion using an
11988 * interruptible wait. If the thread is woken up due to a
11989 * signal, MBX_TIMEOUT error is returned to the caller. Caller
11990 * should not free the mailbox resources, if this function returns
11991 * MBX_TIMEOUT.
11992 * This function will sleep while waiting for mailbox completion.
11993 * So, this function should not be called from any context which
11994 * does not allow sleeping. Due to the same reason, this function
11995 * cannot be called with interrupt disabled.
11996 * This function assumes that the mailbox completion occurs while
11997 * this function sleep. So, this function cannot be called from
11998 * the worker thread which processes mailbox completion.
11999 * This function is called in the context of HBA management
12000 * applications.
12001 * This function returns MBX_SUCCESS when successful.
12002 * This function is called with no lock held.
12003 **/
dea3101e 12004int
2e0fef85 12005lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB
12006 uint32_t timeout)
12007{
e29d74f8 12008 struct completion mbox_done;
dea3101e 12009 int retval;
858c9f6c 12010 unsigned long flag;
dea3101e 12011
495a714c 12012 pmboxq->mbox_flag &= ~LPFC_MBX_WAKE;
dea3101e
JB
12013 /* setup wake call as IOCB callback */
12014 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
dea3101e 12015
e29d74f8
JS
12016 /* setup context3 field to pass wait_queue pointer to wake function */
12017 init_completion(&mbox_done);
12018 pmboxq->context3 = &mbox_done;
dea3101e
JB
12019 /* now issue the command */
12020 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
dea3101e 12021 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
e29d74f8
JS
12022 wait_for_completion_timeout(&mbox_done,
12023 msecs_to_jiffies(timeout * 1000));
7054a606 12024
858c9f6c 12025 spin_lock_irqsave(&phba->hbalock, flag);
e29d74f8 12026 pmboxq->context3 = NULL;
7054a606
JS
12027 /*
12028 * if LPFC_MBX_WAKE flag is set the mailbox is completed
12029 * else do not free the resources.
12030 */
d7c47992 12031 if (pmboxq->mbox_flag & LPFC_MBX_WAKE) {
dea3101e 12032 retval = MBX_SUCCESS;
d7c47992 12033 } else {
7054a606 12034 retval = MBX_TIMEOUT;
858c9f6c
JS
12035 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
12036 }
12037 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e 12038 }
dea3101e
JB
12039 return retval;
12040}
12041
e59058c4 12042/**
3772a991 12043 * lpfc_sli_mbox_sys_shutdown - shutdown mailbox command sub-system
e59058c4
JS
12044 * @phba: Pointer to HBA context.
12045 *
3772a991
JS
12046 * This function is called to shutdown the driver's mailbox sub-system.
12047 * It first marks the mailbox sub-system is in a block state to prevent
12048 * the asynchronous mailbox command from issued off the pending mailbox
12049 * command queue. If the mailbox command sub-system shutdown is due to
12050 * HBA error conditions such as EEH or ERATT, this routine shall invoke
12051 * the mailbox sub-system flush routine to forcefully bring down the
12052 * mailbox sub-system. Otherwise, if it is due to normal condition (such
12053 * as with offline or HBA function reset), this routine will wait for the
12054 * outstanding mailbox command to complete before invoking the mailbox
12055 * sub-system flush routine to gracefully bring down mailbox sub-system.
e59058c4 12056 **/
3772a991 12057void
618a5230 12058lpfc_sli_mbox_sys_shutdown(struct lpfc_hba *phba, int mbx_action)
b4c02652 12059{
3772a991 12060 struct lpfc_sli *psli = &phba->sli;
3772a991 12061 unsigned long timeout;
b4c02652 12062
618a5230
JS
12063 if (mbx_action == LPFC_MBX_NO_WAIT) {
12064 /* delay 100ms for port state */
12065 msleep(100);
12066 lpfc_sli_mbox_sys_flush(phba);
12067 return;
12068 }
a183a15f 12069 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
d7069f09 12070
523128e5
JS
12071 /* Disable softirqs, including timers from obtaining phba->hbalock */
12072 local_bh_disable();
12073
3772a991
JS
12074 spin_lock_irq(&phba->hbalock);
12075 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
b4c02652 12076
3772a991 12077 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
3772a991
JS
12078 /* Determine how long we might wait for the active mailbox
12079 * command to be gracefully completed by firmware.
12080 */
a183a15f
JS
12081 if (phba->sli.mbox_active)
12082 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
12083 phba->sli.mbox_active) *
12084 1000) + jiffies;
12085 spin_unlock_irq(&phba->hbalock);
12086
523128e5
JS
12087 /* Enable softirqs again, done with phba->hbalock */
12088 local_bh_enable();
12089
3772a991
JS
12090 while (phba->sli.mbox_active) {
12091 /* Check active mailbox complete status every 2ms */
12092 msleep(2);
12093 if (time_after(jiffies, timeout))
12094 /* Timeout, let the mailbox flush routine to
12095 * forcefully release active mailbox command
12096 */
12097 break;
12098 }
523128e5 12099 } else {
d7069f09
JS
12100 spin_unlock_irq(&phba->hbalock);
12101
523128e5
JS
12102 /* Enable softirqs again, done with phba->hbalock */
12103 local_bh_enable();
12104 }
12105
3772a991
JS
12106 lpfc_sli_mbox_sys_flush(phba);
12107}
ed957684 12108
3772a991
JS
12109/**
12110 * lpfc_sli_eratt_read - read sli-3 error attention events
12111 * @phba: Pointer to HBA context.
12112 *
12113 * This function is called to read the SLI3 device error attention registers
12114 * for possible error attention events. The caller must hold the hostlock
12115 * with spin_lock_irq().
12116 *
25985edc 12117 * This function returns 1 when there is Error Attention in the Host Attention
3772a991
JS
12118 * Register and returns 0 otherwise.
12119 **/
12120static int
12121lpfc_sli_eratt_read(struct lpfc_hba *phba)
12122{
12123 uint32_t ha_copy;
b4c02652 12124
3772a991 12125 /* Read chip Host Attention (HA) register */
9940b97b
JS
12126 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12127 goto unplug_err;
12128
3772a991
JS
12129 if (ha_copy & HA_ERATT) {
12130 /* Read host status register to retrieve error event */
9940b97b
JS
12131 if (lpfc_sli_read_hs(phba))
12132 goto unplug_err;
b4c02652 12133
3772a991
JS
12134 /* Check if there is a deferred error condition is active */
12135 if ((HS_FFER1 & phba->work_hs) &&
12136 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0 12137 HS_FFER6 | HS_FFER7 | HS_FFER8) & phba->work_hs)) {
3772a991 12138 phba->hba_flag |= DEFER_ERATT;
3772a991
JS
12139 /* Clear all interrupt enable conditions */
12140 writel(0, phba->HCregaddr);
12141 readl(phba->HCregaddr);
12142 }
12143
12144 /* Set the driver HA work bitmap */
3772a991
JS
12145 phba->work_ha |= HA_ERATT;
12146 /* Indicate polling handles this ERATT */
12147 phba->hba_flag |= HBA_ERATT_HANDLED;
3772a991
JS
12148 return 1;
12149 }
12150 return 0;
9940b97b
JS
12151
12152unplug_err:
12153 /* Set the driver HS work bitmap */
12154 phba->work_hs |= UNPLUG_ERR;
12155 /* Set the driver HA work bitmap */
12156 phba->work_ha |= HA_ERATT;
12157 /* Indicate polling handles this ERATT */
12158 phba->hba_flag |= HBA_ERATT_HANDLED;
12159 return 1;
b4c02652
JS
12160}
12161
da0436e9
JS
12162/**
12163 * lpfc_sli4_eratt_read - read sli-4 error attention events
12164 * @phba: Pointer to HBA context.
12165 *
12166 * This function is called to read the SLI4 device error attention registers
12167 * for possible error attention events. The caller must hold the hostlock
12168 * with spin_lock_irq().
12169 *
25985edc 12170 * This function returns 1 when there is Error Attention in the Host Attention
da0436e9
JS
12171 * Register and returns 0 otherwise.
12172 **/
12173static int
12174lpfc_sli4_eratt_read(struct lpfc_hba *phba)
12175{
12176 uint32_t uerr_sta_hi, uerr_sta_lo;
2fcee4bf
JS
12177 uint32_t if_type, portsmphr;
12178 struct lpfc_register portstat_reg;
da0436e9 12179
2fcee4bf
JS
12180 /*
12181 * For now, use the SLI4 device internal unrecoverable error
da0436e9
JS
12182 * registers for error attention. This can be changed later.
12183 */
2fcee4bf
JS
12184 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12185 switch (if_type) {
12186 case LPFC_SLI_INTF_IF_TYPE_0:
9940b97b
JS
12187 if (lpfc_readl(phba->sli4_hba.u.if_type0.UERRLOregaddr,
12188 &uerr_sta_lo) ||
12189 lpfc_readl(phba->sli4_hba.u.if_type0.UERRHIregaddr,
12190 &uerr_sta_hi)) {
12191 phba->work_hs |= UNPLUG_ERR;
12192 phba->work_ha |= HA_ERATT;
12193 phba->hba_flag |= HBA_ERATT_HANDLED;
12194 return 1;
12195 }
2fcee4bf
JS
12196 if ((~phba->sli4_hba.ue_mask_lo & uerr_sta_lo) ||
12197 (~phba->sli4_hba.ue_mask_hi & uerr_sta_hi)) {
12198 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12199 "1423 HBA Unrecoverable error: "
12200 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, "
12201 "ue_mask_lo_reg=0x%x, "
12202 "ue_mask_hi_reg=0x%x\n",
12203 uerr_sta_lo, uerr_sta_hi,
12204 phba->sli4_hba.ue_mask_lo,
12205 phba->sli4_hba.ue_mask_hi);
12206 phba->work_status[0] = uerr_sta_lo;
12207 phba->work_status[1] = uerr_sta_hi;
12208 phba->work_ha |= HA_ERATT;
12209 phba->hba_flag |= HBA_ERATT_HANDLED;
12210 return 1;
12211 }
12212 break;
12213 case LPFC_SLI_INTF_IF_TYPE_2:
27d6ac0a 12214 case LPFC_SLI_INTF_IF_TYPE_6:
9940b97b
JS
12215 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
12216 &portstat_reg.word0) ||
12217 lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
12218 &portsmphr)){
12219 phba->work_hs |= UNPLUG_ERR;
12220 phba->work_ha |= HA_ERATT;
12221 phba->hba_flag |= HBA_ERATT_HANDLED;
12222 return 1;
12223 }
2fcee4bf
JS
12224 if (bf_get(lpfc_sliport_status_err, &portstat_reg)) {
12225 phba->work_status[0] =
12226 readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
12227 phba->work_status[1] =
12228 readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
12229 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2e90f4b5 12230 "2885 Port Status Event: "
2fcee4bf
JS
12231 "port status reg 0x%x, "
12232 "port smphr reg 0x%x, "
12233 "error 1=0x%x, error 2=0x%x\n",
12234 portstat_reg.word0,
12235 portsmphr,
12236 phba->work_status[0],
12237 phba->work_status[1]);
12238 phba->work_ha |= HA_ERATT;
12239 phba->hba_flag |= HBA_ERATT_HANDLED;
12240 return 1;
12241 }
12242 break;
12243 case LPFC_SLI_INTF_IF_TYPE_1:
12244 default:
a747c9ce 12245 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
12246 "2886 HBA Error Attention on unsupported "
12247 "if type %d.", if_type);
a747c9ce 12248 return 1;
da0436e9 12249 }
2fcee4bf 12250
da0436e9
JS
12251 return 0;
12252}
12253
e59058c4 12254/**
3621a710 12255 * lpfc_sli_check_eratt - check error attention events
9399627f
JS
12256 * @phba: Pointer to HBA context.
12257 *
3772a991 12258 * This function is called from timer soft interrupt context to check HBA's
9399627f
JS
12259 * error attention register bit for error attention events.
12260 *
25985edc 12261 * This function returns 1 when there is Error Attention in the Host Attention
9399627f
JS
12262 * Register and returns 0 otherwise.
12263 **/
12264int
12265lpfc_sli_check_eratt(struct lpfc_hba *phba)
12266{
12267 uint32_t ha_copy;
12268
12269 /* If somebody is waiting to handle an eratt, don't process it
12270 * here. The brdkill function will do this.
12271 */
12272 if (phba->link_flag & LS_IGNORE_ERATT)
12273 return 0;
12274
12275 /* Check if interrupt handler handles this ERATT */
12276 spin_lock_irq(&phba->hbalock);
12277 if (phba->hba_flag & HBA_ERATT_HANDLED) {
12278 /* Interrupt handler has handled ERATT */
12279 spin_unlock_irq(&phba->hbalock);
12280 return 0;
12281 }
12282
a257bf90
JS
12283 /*
12284 * If there is deferred error attention, do not check for error
12285 * attention
12286 */
12287 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
12288 spin_unlock_irq(&phba->hbalock);
12289 return 0;
12290 }
12291
3772a991
JS
12292 /* If PCI channel is offline, don't process it */
12293 if (unlikely(pci_channel_offline(phba->pcidev))) {
9399627f 12294 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12295 return 0;
12296 }
12297
12298 switch (phba->sli_rev) {
12299 case LPFC_SLI_REV2:
12300 case LPFC_SLI_REV3:
12301 /* Read chip Host Attention (HA) register */
12302 ha_copy = lpfc_sli_eratt_read(phba);
12303 break;
da0436e9 12304 case LPFC_SLI_REV4:
2fcee4bf 12305 /* Read device Uncoverable Error (UERR) registers */
da0436e9
JS
12306 ha_copy = lpfc_sli4_eratt_read(phba);
12307 break;
3772a991
JS
12308 default:
12309 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12310 "0299 Invalid SLI revision (%d)\n",
12311 phba->sli_rev);
12312 ha_copy = 0;
12313 break;
9399627f
JS
12314 }
12315 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12316
12317 return ha_copy;
12318}
12319
12320/**
12321 * lpfc_intr_state_check - Check device state for interrupt handling
12322 * @phba: Pointer to HBA context.
12323 *
12324 * This inline routine checks whether a device or its PCI slot is in a state
12325 * that the interrupt should be handled.
12326 *
12327 * This function returns 0 if the device or the PCI slot is in a state that
12328 * interrupt should be handled, otherwise -EIO.
12329 */
12330static inline int
12331lpfc_intr_state_check(struct lpfc_hba *phba)
12332{
12333 /* If the pci channel is offline, ignore all the interrupts */
12334 if (unlikely(pci_channel_offline(phba->pcidev)))
12335 return -EIO;
12336
12337 /* Update device level interrupt statistics */
12338 phba->sli.slistat.sli_intr++;
12339
12340 /* Ignore all interrupts during initialization. */
12341 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
12342 return -EIO;
12343
9399627f
JS
12344 return 0;
12345}
12346
12347/**
3772a991 12348 * lpfc_sli_sp_intr_handler - Slow-path interrupt handler to SLI-3 device
e59058c4
JS
12349 * @irq: Interrupt number.
12350 * @dev_id: The device context pointer.
12351 *
9399627f 12352 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12353 * service routine when device with SLI-3 interface spec is enabled with
12354 * MSI-X multi-message interrupt mode and there are slow-path events in
12355 * the HBA. However, when the device is enabled with either MSI or Pin-IRQ
12356 * interrupt mode, this function is called as part of the device-level
12357 * interrupt handler. When the PCI slot is in error recovery or the HBA
12358 * is undergoing initialization, the interrupt handler will not process
12359 * the interrupt. The link attention and ELS ring attention events are
12360 * handled by the worker thread. The interrupt handler signals the worker
12361 * thread and returns for these events. This function is called without
12362 * any lock held. It gets the hbalock to access and update SLI data
9399627f
JS
12363 * structures.
12364 *
12365 * This function returns IRQ_HANDLED when interrupt is handled else it
12366 * returns IRQ_NONE.
e59058c4 12367 **/
dea3101e 12368irqreturn_t
3772a991 12369lpfc_sli_sp_intr_handler(int irq, void *dev_id)
dea3101e 12370{
2e0fef85 12371 struct lpfc_hba *phba;
a747c9ce 12372 uint32_t ha_copy, hc_copy;
dea3101e
JB
12373 uint32_t work_ha_copy;
12374 unsigned long status;
5b75da2f 12375 unsigned long iflag;
dea3101e
JB
12376 uint32_t control;
12377
92d7f7b0 12378 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS
12379 struct lpfc_vport *vport;
12380 struct lpfc_nodelist *ndlp;
12381 struct lpfc_dmabuf *mp;
92d7f7b0
JS
12382 LPFC_MBOXQ_t *pmb;
12383 int rc;
12384
dea3101e
JB
12385 /*
12386 * Get the driver's phba structure from the dev_id and
12387 * assume the HBA is not interrupting.
12388 */
9399627f 12389 phba = (struct lpfc_hba *)dev_id;
dea3101e
JB
12390
12391 if (unlikely(!phba))
12392 return IRQ_NONE;
12393
dea3101e 12394 /*
9399627f
JS
12395 * Stuff needs to be attented to when this function is invoked as an
12396 * individual interrupt handler in MSI-X multi-message interrupt mode
dea3101e 12397 */
9399627f 12398 if (phba->intr_type == MSIX) {
3772a991
JS
12399 /* Check device state for handling interrupt */
12400 if (lpfc_intr_state_check(phba))
9399627f
JS
12401 return IRQ_NONE;
12402 /* Need to read HA REG for slow-path events */
5b75da2f 12403 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12404 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12405 goto unplug_error;
9399627f
JS
12406 /* If somebody is waiting to handle an eratt don't process it
12407 * here. The brdkill function will do this.
12408 */
12409 if (phba->link_flag & LS_IGNORE_ERATT)
12410 ha_copy &= ~HA_ERATT;
12411 /* Check the need for handling ERATT in interrupt handler */
12412 if (ha_copy & HA_ERATT) {
12413 if (phba->hba_flag & HBA_ERATT_HANDLED)
12414 /* ERATT polling has handled ERATT */
12415 ha_copy &= ~HA_ERATT;
12416 else
12417 /* Indicate interrupt handler handles ERATT */
12418 phba->hba_flag |= HBA_ERATT_HANDLED;
12419 }
a257bf90
JS
12420
12421 /*
12422 * If there is deferred error attention, do not check for any
12423 * interrupt.
12424 */
12425 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12426 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12427 return IRQ_NONE;
12428 }
12429
9399627f 12430 /* Clear up only attention source related to slow-path */
9940b97b
JS
12431 if (lpfc_readl(phba->HCregaddr, &hc_copy))
12432 goto unplug_error;
12433
a747c9ce
JS
12434 writel(hc_copy & ~(HC_MBINT_ENA | HC_R2INT_ENA |
12435 HC_LAINT_ENA | HC_ERINT_ENA),
12436 phba->HCregaddr);
9399627f
JS
12437 writel((ha_copy & (HA_MBATT | HA_R2_CLR_MSK)),
12438 phba->HAregaddr);
a747c9ce 12439 writel(hc_copy, phba->HCregaddr);
9399627f 12440 readl(phba->HAregaddr); /* flush */
5b75da2f 12441 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12442 } else
12443 ha_copy = phba->ha_copy;
dea3101e 12444
dea3101e
JB
12445 work_ha_copy = ha_copy & phba->work_ha_mask;
12446
9399627f 12447 if (work_ha_copy) {
dea3101e
JB
12448 if (work_ha_copy & HA_LATT) {
12449 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
12450 /*
12451 * Turn off Link Attention interrupts
12452 * until CLEAR_LA done
12453 */
5b75da2f 12454 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12455 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
9940b97b
JS
12456 if (lpfc_readl(phba->HCregaddr, &control))
12457 goto unplug_error;
dea3101e
JB
12458 control &= ~HC_LAINT_ENA;
12459 writel(control, phba->HCregaddr);
12460 readl(phba->HCregaddr); /* flush */
5b75da2f 12461 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12462 }
12463 else
12464 work_ha_copy &= ~HA_LATT;
12465 }
12466
9399627f 12467 if (work_ha_copy & ~(HA_ERATT | HA_MBATT | HA_LATT)) {
858c9f6c
JS
12468 /*
12469 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
12470 * the only slow ring.
12471 */
12472 status = (work_ha_copy &
12473 (HA_RXMASK << (4*LPFC_ELS_RING)));
12474 status >>= (4*LPFC_ELS_RING);
12475 if (status & HA_RXMASK) {
5b75da2f 12476 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12477 if (lpfc_readl(phba->HCregaddr, &control))
12478 goto unplug_error;
a58cbd52
JS
12479
12480 lpfc_debugfs_slow_ring_trc(phba,
12481 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
12482 control, status,
12483 (uint32_t)phba->sli.slistat.sli_intr);
12484
858c9f6c 12485 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS
12486 lpfc_debugfs_slow_ring_trc(phba,
12487 "ISR Disable ring:"
12488 "pwork:x%x hawork:x%x wait:x%x",
12489 phba->work_ha, work_ha_copy,
12490 (uint32_t)((unsigned long)
5e9d9b82 12491 &phba->work_waitq));
a58cbd52 12492
858c9f6c
JS
12493 control &=
12494 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB
12495 writel(control, phba->HCregaddr);
12496 readl(phba->HCregaddr); /* flush */
dea3101e 12497 }
a58cbd52
JS
12498 else {
12499 lpfc_debugfs_slow_ring_trc(phba,
12500 "ISR slow ring: pwork:"
12501 "x%x hawork:x%x wait:x%x",
12502 phba->work_ha, work_ha_copy,
12503 (uint32_t)((unsigned long)
5e9d9b82 12504 &phba->work_waitq));
a58cbd52 12505 }
5b75da2f 12506 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12507 }
12508 }
5b75da2f 12509 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90 12510 if (work_ha_copy & HA_ERATT) {
9940b97b
JS
12511 if (lpfc_sli_read_hs(phba))
12512 goto unplug_error;
a257bf90
JS
12513 /*
12514 * Check if there is a deferred error condition
12515 * is active
12516 */
12517 if ((HS_FFER1 & phba->work_hs) &&
12518 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0
JS
12519 HS_FFER6 | HS_FFER7 | HS_FFER8) &
12520 phba->work_hs)) {
a257bf90
JS
12521 phba->hba_flag |= DEFER_ERATT;
12522 /* Clear all interrupt enable conditions */
12523 writel(0, phba->HCregaddr);
12524 readl(phba->HCregaddr);
12525 }
12526 }
12527
9399627f 12528 if ((work_ha_copy & HA_MBATT) && (phba->sli.mbox_active)) {
92d7f7b0 12529 pmb = phba->sli.mbox_active;
04c68496 12530 pmbox = &pmb->u.mb;
34b02dcd 12531 mbox = phba->mbox;
858c9f6c 12532 vport = pmb->vport;
92d7f7b0
JS
12533
12534 /* First check out the status word */
12535 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
12536 if (pmbox->mbxOwner != OWN_HOST) {
5b75da2f 12537 spin_unlock_irqrestore(&phba->hbalock, iflag);
92d7f7b0
JS
12538 /*
12539 * Stray Mailbox Interrupt, mbxCommand <cmd>
12540 * mbxStatus <status>
12541 */
09372820 12542 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
92d7f7b0 12543 LOG_SLI,
e8b62011 12544 "(%d):0304 Stray Mailbox "
92d7f7b0
JS
12545 "Interrupt mbxCommand x%x "
12546 "mbxStatus x%x\n",
e8b62011 12547 (vport ? vport->vpi : 0),
92d7f7b0
JS
12548 pmbox->mbxCommand,
12549 pmbox->mbxStatus);
09372820
JS
12550 /* clear mailbox attention bit */
12551 work_ha_copy &= ~HA_MBATT;
12552 } else {
97eab634 12553 phba->sli.mbox_active = NULL;
5b75da2f 12554 spin_unlock_irqrestore(&phba->hbalock, iflag);
09372820
JS
12555 phba->last_completion_time = jiffies;
12556 del_timer(&phba->sli.mbox_tmo);
09372820
JS
12557 if (pmb->mbox_cmpl) {
12558 lpfc_sli_pcimem_bcopy(mbox, pmbox,
12559 MAILBOX_CMD_SIZE);
7a470277 12560 if (pmb->out_ext_byte_len &&
3e1f0718 12561 pmb->ctx_buf)
7a470277
JS
12562 lpfc_sli_pcimem_bcopy(
12563 phba->mbox_ext,
3e1f0718 12564 pmb->ctx_buf,
7a470277 12565 pmb->out_ext_byte_len);
09372820
JS
12566 }
12567 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
12568 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
12569
12570 lpfc_debugfs_disc_trc(vport,
12571 LPFC_DISC_TRC_MBOX_VPORT,
12572 "MBOX dflt rpi: : "
12573 "status:x%x rpi:x%x",
12574 (uint32_t)pmbox->mbxStatus,
12575 pmbox->un.varWords[0], 0);
12576
12577 if (!pmbox->mbxStatus) {
12578 mp = (struct lpfc_dmabuf *)
3e1f0718 12579 (pmb->ctx_buf);
09372820 12580 ndlp = (struct lpfc_nodelist *)
3e1f0718 12581 pmb->ctx_ndlp;
09372820
JS
12582
12583 /* Reg_LOGIN of dflt RPI was
12584 * successful. new lets get
12585 * rid of the RPI using the
12586 * same mbox buffer.
12587 */
12588 lpfc_unreg_login(phba,
12589 vport->vpi,
12590 pmbox->un.varWords[0],
12591 pmb);
12592 pmb->mbox_cmpl =
12593 lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
12594 pmb->ctx_buf = mp;
12595 pmb->ctx_ndlp = ndlp;
09372820 12596 pmb->vport = vport;
58da1ffb
JS
12597 rc = lpfc_sli_issue_mbox(phba,
12598 pmb,
12599 MBX_NOWAIT);
12600 if (rc != MBX_BUSY)
12601 lpfc_printf_log(phba,
12602 KERN_ERR,
12603 LOG_MBOX | LOG_SLI,
d7c255b2 12604 "0350 rc should have"
6a9c52cf 12605 "been MBX_BUSY\n");
3772a991
JS
12606 if (rc != MBX_NOT_FINISHED)
12607 goto send_current_mbox;
09372820 12608 }
858c9f6c 12609 }
5b75da2f
JS
12610 spin_lock_irqsave(
12611 &phba->pport->work_port_lock,
12612 iflag);
09372820
JS
12613 phba->pport->work_port_events &=
12614 ~WORKER_MBOX_TMO;
5b75da2f
JS
12615 spin_unlock_irqrestore(
12616 &phba->pport->work_port_lock,
12617 iflag);
09372820 12618 lpfc_mbox_cmpl_put(phba, pmb);
858c9f6c 12619 }
97eab634 12620 } else
5b75da2f 12621 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f 12622
92d7f7b0
JS
12623 if ((work_ha_copy & HA_MBATT) &&
12624 (phba->sli.mbox_active == NULL)) {
858c9f6c 12625send_current_mbox:
92d7f7b0 12626 /* Process next mailbox command if there is one */
58da1ffb
JS
12627 do {
12628 rc = lpfc_sli_issue_mbox(phba, NULL,
12629 MBX_NOWAIT);
12630 } while (rc == MBX_NOT_FINISHED);
12631 if (rc != MBX_SUCCESS)
12632 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
12633 LOG_SLI, "0349 rc should be "
6a9c52cf 12634 "MBX_SUCCESS\n");
92d7f7b0
JS
12635 }
12636
5b75da2f 12637 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12638 phba->work_ha |= work_ha_copy;
5b75da2f 12639 spin_unlock_irqrestore(&phba->hbalock, iflag);
5e9d9b82 12640 lpfc_worker_wake_up(phba);
dea3101e 12641 }
9399627f 12642 return IRQ_HANDLED;
9940b97b
JS
12643unplug_error:
12644 spin_unlock_irqrestore(&phba->hbalock, iflag);
12645 return IRQ_HANDLED;
dea3101e 12646
3772a991 12647} /* lpfc_sli_sp_intr_handler */
9399627f
JS
12648
12649/**
3772a991 12650 * lpfc_sli_fp_intr_handler - Fast-path interrupt handler to SLI-3 device.
9399627f
JS
12651 * @irq: Interrupt number.
12652 * @dev_id: The device context pointer.
12653 *
12654 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12655 * service routine when device with SLI-3 interface spec is enabled with
12656 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
12657 * ring event in the HBA. However, when the device is enabled with either
12658 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
12659 * device-level interrupt handler. When the PCI slot is in error recovery
12660 * or the HBA is undergoing initialization, the interrupt handler will not
12661 * process the interrupt. The SCSI FCP fast-path ring event are handled in
12662 * the intrrupt context. This function is called without any lock held.
12663 * It gets the hbalock to access and update SLI data structures.
9399627f
JS
12664 *
12665 * This function returns IRQ_HANDLED when interrupt is handled else it
12666 * returns IRQ_NONE.
12667 **/
12668irqreturn_t
3772a991 12669lpfc_sli_fp_intr_handler(int irq, void *dev_id)
9399627f
JS
12670{
12671 struct lpfc_hba *phba;
12672 uint32_t ha_copy;
12673 unsigned long status;
5b75da2f 12674 unsigned long iflag;
895427bd 12675 struct lpfc_sli_ring *pring;
9399627f
JS
12676
12677 /* Get the driver's phba structure from the dev_id and
12678 * assume the HBA is not interrupting.
12679 */
12680 phba = (struct lpfc_hba *) dev_id;
12681
12682 if (unlikely(!phba))
12683 return IRQ_NONE;
12684
12685 /*
12686 * Stuff needs to be attented to when this function is invoked as an
12687 * individual interrupt handler in MSI-X multi-message interrupt mode
12688 */
12689 if (phba->intr_type == MSIX) {
3772a991
JS
12690 /* Check device state for handling interrupt */
12691 if (lpfc_intr_state_check(phba))
9399627f
JS
12692 return IRQ_NONE;
12693 /* Need to read HA REG for FCP ring and other ring events */
9940b97b
JS
12694 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12695 return IRQ_HANDLED;
9399627f 12696 /* Clear up only attention source related to fast-path */
5b75da2f 12697 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90
JS
12698 /*
12699 * If there is deferred error attention, do not check for
12700 * any interrupt.
12701 */
12702 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12703 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12704 return IRQ_NONE;
12705 }
9399627f
JS
12706 writel((ha_copy & (HA_R0_CLR_MSK | HA_R1_CLR_MSK)),
12707 phba->HAregaddr);
12708 readl(phba->HAregaddr); /* flush */
5b75da2f 12709 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12710 } else
12711 ha_copy = phba->ha_copy;
dea3101e
JB
12712
12713 /*
9399627f 12714 * Process all events on FCP ring. Take the optimized path for FCP IO.
dea3101e 12715 */
9399627f
JS
12716 ha_copy &= ~(phba->work_ha_mask);
12717
12718 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
dea3101e 12719 status >>= (4*LPFC_FCP_RING);
895427bd 12720 pring = &phba->sli.sli3_ring[LPFC_FCP_RING];
858c9f6c 12721 if (status & HA_RXMASK)
895427bd 12722 lpfc_sli_handle_fast_ring_event(phba, pring, status);
a4bc3379
JS
12723
12724 if (phba->cfg_multi_ring_support == 2) {
12725 /*
9399627f
JS
12726 * Process all events on extra ring. Take the optimized path
12727 * for extra ring IO.
a4bc3379 12728 */
9399627f 12729 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
a4bc3379 12730 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 12731 if (status & HA_RXMASK) {
a4bc3379 12732 lpfc_sli_handle_fast_ring_event(phba,
895427bd 12733 &phba->sli.sli3_ring[LPFC_EXTRA_RING],
a4bc3379
JS
12734 status);
12735 }
12736 }
dea3101e 12737 return IRQ_HANDLED;
3772a991 12738} /* lpfc_sli_fp_intr_handler */
9399627f
JS
12739
12740/**
3772a991 12741 * lpfc_sli_intr_handler - Device-level interrupt handler to SLI-3 device
9399627f
JS
12742 * @irq: Interrupt number.
12743 * @dev_id: The device context pointer.
12744 *
3772a991
JS
12745 * This function is the HBA device-level interrupt handler to device with
12746 * SLI-3 interface spec, called from the PCI layer when either MSI or
12747 * Pin-IRQ interrupt mode is enabled and there is an event in the HBA which
12748 * requires driver attention. This function invokes the slow-path interrupt
12749 * attention handling function and fast-path interrupt attention handling
12750 * function in turn to process the relevant HBA attention events. This
12751 * function is called without any lock held. It gets the hbalock to access
12752 * and update SLI data structures.
9399627f
JS
12753 *
12754 * This function returns IRQ_HANDLED when interrupt is handled, else it
12755 * returns IRQ_NONE.
12756 **/
12757irqreturn_t
3772a991 12758lpfc_sli_intr_handler(int irq, void *dev_id)
9399627f
JS
12759{
12760 struct lpfc_hba *phba;
12761 irqreturn_t sp_irq_rc, fp_irq_rc;
12762 unsigned long status1, status2;
a747c9ce 12763 uint32_t hc_copy;
9399627f
JS
12764
12765 /*
12766 * Get the driver's phba structure from the dev_id and
12767 * assume the HBA is not interrupting.
12768 */
12769 phba = (struct lpfc_hba *) dev_id;
12770
12771 if (unlikely(!phba))
12772 return IRQ_NONE;
12773
3772a991
JS
12774 /* Check device state for handling interrupt */
12775 if (lpfc_intr_state_check(phba))
9399627f
JS
12776 return IRQ_NONE;
12777
12778 spin_lock(&phba->hbalock);
9940b97b
JS
12779 if (lpfc_readl(phba->HAregaddr, &phba->ha_copy)) {
12780 spin_unlock(&phba->hbalock);
12781 return IRQ_HANDLED;
12782 }
12783
9399627f
JS
12784 if (unlikely(!phba->ha_copy)) {
12785 spin_unlock(&phba->hbalock);
12786 return IRQ_NONE;
12787 } else if (phba->ha_copy & HA_ERATT) {
12788 if (phba->hba_flag & HBA_ERATT_HANDLED)
12789 /* ERATT polling has handled ERATT */
12790 phba->ha_copy &= ~HA_ERATT;
12791 else
12792 /* Indicate interrupt handler handles ERATT */
12793 phba->hba_flag |= HBA_ERATT_HANDLED;
12794 }
12795
a257bf90
JS
12796 /*
12797 * If there is deferred error attention, do not check for any interrupt.
12798 */
12799 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
ec21b3b0 12800 spin_unlock(&phba->hbalock);
a257bf90
JS
12801 return IRQ_NONE;
12802 }
12803
9399627f 12804 /* Clear attention sources except link and error attentions */
9940b97b
JS
12805 if (lpfc_readl(phba->HCregaddr, &hc_copy)) {
12806 spin_unlock(&phba->hbalock);
12807 return IRQ_HANDLED;
12808 }
a747c9ce
JS
12809 writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA
12810 | HC_R2INT_ENA | HC_LAINT_ENA | HC_ERINT_ENA),
12811 phba->HCregaddr);
9399627f 12812 writel((phba->ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
a747c9ce 12813 writel(hc_copy, phba->HCregaddr);
9399627f
JS
12814 readl(phba->HAregaddr); /* flush */
12815 spin_unlock(&phba->hbalock);
12816
12817 /*
12818 * Invokes slow-path host attention interrupt handling as appropriate.
12819 */
12820
12821 /* status of events with mailbox and link attention */
12822 status1 = phba->ha_copy & (HA_MBATT | HA_LATT | HA_ERATT);
12823
12824 /* status of events with ELS ring */
12825 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_ELS_RING)));
12826 status2 >>= (4*LPFC_ELS_RING);
12827
12828 if (status1 || (status2 & HA_RXMASK))
3772a991 12829 sp_irq_rc = lpfc_sli_sp_intr_handler(irq, dev_id);
9399627f
JS
12830 else
12831 sp_irq_rc = IRQ_NONE;
12832
12833 /*
12834 * Invoke fast-path host attention interrupt handling as appropriate.
12835 */
12836
12837 /* status of events with FCP ring */
12838 status1 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
12839 status1 >>= (4*LPFC_FCP_RING);
12840
12841 /* status of events with extra ring */
12842 if (phba->cfg_multi_ring_support == 2) {
12843 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
12844 status2 >>= (4*LPFC_EXTRA_RING);
12845 } else
12846 status2 = 0;
12847
12848 if ((status1 & HA_RXMASK) || (status2 & HA_RXMASK))
3772a991 12849 fp_irq_rc = lpfc_sli_fp_intr_handler(irq, dev_id);
9399627f
JS
12850 else
12851 fp_irq_rc = IRQ_NONE;
dea3101e 12852
9399627f
JS
12853 /* Return device-level interrupt handling status */
12854 return (sp_irq_rc == IRQ_HANDLED) ? sp_irq_rc : fp_irq_rc;
3772a991 12855} /* lpfc_sli_intr_handler */
4f774513
JS
12856
12857/**
4f774513 12858 * lpfc_sli4_els_xri_abort_event_proc - Process els xri abort event
4f774513
JS
12859 * @phba: pointer to lpfc hba data structure.
12860 *
12861 * This routine is invoked by the worker thread to process all the pending
4f774513 12862 * SLI4 els abort xri events.
4f774513 12863 **/
4f774513 12864void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *phba)
4f774513
JS
12865{
12866 struct lpfc_cq_event *cq_event;
12867
4f774513 12868 /* First, declare the els xri abort event has been handled */
4f774513 12869 spin_lock_irq(&phba->hbalock);
4f774513 12870 phba->hba_flag &= ~ELS_XRI_ABORT_EVENT;
4f774513 12871 spin_unlock_irq(&phba->hbalock);
4f774513
JS
12872 /* Now, handle all the els xri abort events */
12873 while (!list_empty(&phba->sli4_hba.sp_els_xri_aborted_work_queue)) {
12874 /* Get the first event from the head of the event queue */
12875 spin_lock_irq(&phba->hbalock);
12876 list_remove_head(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
12877 cq_event, struct lpfc_cq_event, list);
12878 spin_unlock_irq(&phba->hbalock);
12879 /* Notify aborted XRI for ELS work queue */
12880 lpfc_sli4_els_xri_aborted(phba, &cq_event->cqe.wcqe_axri);
12881 /* Free the event processed back to the free pool */
12882 lpfc_sli4_cq_event_release(phba, cq_event);
12883 }
12884}
12885
341af102
JS
12886/**
12887 * lpfc_sli4_iocb_param_transfer - Transfer pIocbOut and cmpl status to pIocbIn
12888 * @phba: pointer to lpfc hba data structure
12889 * @pIocbIn: pointer to the rspiocbq
12890 * @pIocbOut: pointer to the cmdiocbq
12891 * @wcqe: pointer to the complete wcqe
12892 *
12893 * This routine transfers the fields of a command iocbq to a response iocbq
12894 * by copying all the IOCB fields from command iocbq and transferring the
12895 * completion status information from the complete wcqe.
12896 **/
4f774513 12897static void
341af102
JS
12898lpfc_sli4_iocb_param_transfer(struct lpfc_hba *phba,
12899 struct lpfc_iocbq *pIocbIn,
4f774513
JS
12900 struct lpfc_iocbq *pIocbOut,
12901 struct lpfc_wcqe_complete *wcqe)
12902{
af22741c 12903 int numBdes, i;
341af102 12904 unsigned long iflags;
af22741c
JS
12905 uint32_t status, max_response;
12906 struct lpfc_dmabuf *dmabuf;
12907 struct ulp_bde64 *bpl, bde;
4f774513
JS
12908 size_t offset = offsetof(struct lpfc_iocbq, iocb);
12909
12910 memcpy((char *)pIocbIn + offset, (char *)pIocbOut + offset,
12911 sizeof(struct lpfc_iocbq) - offset);
4f774513 12912 /* Map WCQE parameters into irspiocb parameters */
acd6859b
JS
12913 status = bf_get(lpfc_wcqe_c_status, wcqe);
12914 pIocbIn->iocb.ulpStatus = (status & LPFC_IOCB_STATUS_MASK);
4f774513
JS
12915 if (pIocbOut->iocb_flag & LPFC_IO_FCP)
12916 if (pIocbIn->iocb.ulpStatus == IOSTAT_FCP_RSP_ERROR)
12917 pIocbIn->iocb.un.fcpi.fcpi_parm =
12918 pIocbOut->iocb.un.fcpi.fcpi_parm -
12919 wcqe->total_data_placed;
12920 else
12921 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
695a814e 12922 else {
4f774513 12923 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
af22741c
JS
12924 switch (pIocbOut->iocb.ulpCommand) {
12925 case CMD_ELS_REQUEST64_CR:
12926 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
12927 bpl = (struct ulp_bde64 *)dmabuf->virt;
12928 bde.tus.w = le32_to_cpu(bpl[1].tus.w);
12929 max_response = bde.tus.f.bdeSize;
12930 break;
12931 case CMD_GEN_REQUEST64_CR:
12932 max_response = 0;
12933 if (!pIocbOut->context3)
12934 break;
12935 numBdes = pIocbOut->iocb.un.genreq64.bdl.bdeSize/
12936 sizeof(struct ulp_bde64);
12937 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
12938 bpl = (struct ulp_bde64 *)dmabuf->virt;
12939 for (i = 0; i < numBdes; i++) {
12940 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
12941 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
12942 max_response += bde.tus.f.bdeSize;
12943 }
12944 break;
12945 default:
12946 max_response = wcqe->total_data_placed;
12947 break;
12948 }
12949 if (max_response < wcqe->total_data_placed)
12950 pIocbIn->iocb.un.genreq64.bdl.bdeSize = max_response;
12951 else
12952 pIocbIn->iocb.un.genreq64.bdl.bdeSize =
12953 wcqe->total_data_placed;
695a814e 12954 }
341af102 12955
acd6859b
JS
12956 /* Convert BG errors for completion status */
12957 if (status == CQE_STATUS_DI_ERROR) {
12958 pIocbIn->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
12959
12960 if (bf_get(lpfc_wcqe_c_bg_edir, wcqe))
12961 pIocbIn->iocb.un.ulpWord[4] = IOERR_RX_DMA_FAILED;
12962 else
12963 pIocbIn->iocb.un.ulpWord[4] = IOERR_TX_DMA_FAILED;
12964
12965 pIocbIn->iocb.unsli3.sli3_bg.bgstat = 0;
12966 if (bf_get(lpfc_wcqe_c_bg_ge, wcqe)) /* Guard Check failed */
12967 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12968 BGS_GUARD_ERR_MASK;
12969 if (bf_get(lpfc_wcqe_c_bg_ae, wcqe)) /* App Tag Check failed */
12970 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12971 BGS_APPTAG_ERR_MASK;
12972 if (bf_get(lpfc_wcqe_c_bg_re, wcqe)) /* Ref Tag Check failed */
12973 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12974 BGS_REFTAG_ERR_MASK;
12975
12976 /* Check to see if there was any good data before the error */
12977 if (bf_get(lpfc_wcqe_c_bg_tdpv, wcqe)) {
12978 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12979 BGS_HI_WATER_MARK_PRESENT_MASK;
12980 pIocbIn->iocb.unsli3.sli3_bg.bghm =
12981 wcqe->total_data_placed;
12982 }
12983
12984 /*
12985 * Set ALL the error bits to indicate we don't know what
12986 * type of error it is.
12987 */
12988 if (!pIocbIn->iocb.unsli3.sli3_bg.bgstat)
12989 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12990 (BGS_REFTAG_ERR_MASK | BGS_APPTAG_ERR_MASK |
12991 BGS_GUARD_ERR_MASK);
12992 }
12993
341af102
JS
12994 /* Pick up HBA exchange busy condition */
12995 if (bf_get(lpfc_wcqe_c_xb, wcqe)) {
12996 spin_lock_irqsave(&phba->hbalock, iflags);
12997 pIocbIn->iocb_flag |= LPFC_EXCHANGE_BUSY;
12998 spin_unlock_irqrestore(&phba->hbalock, iflags);
12999 }
4f774513
JS
13000}
13001
45ed1190
JS
13002/**
13003 * lpfc_sli4_els_wcqe_to_rspiocbq - Get response iocbq from els wcqe
13004 * @phba: Pointer to HBA context object.
13005 * @wcqe: Pointer to work-queue completion queue entry.
13006 *
13007 * This routine handles an ELS work-queue completion event and construct
13008 * a pseudo response ELS IODBQ from the SLI4 ELS WCQE for the common
13009 * discovery engine to handle.
13010 *
13011 * Return: Pointer to the receive IOCBQ, NULL otherwise.
13012 **/
13013static struct lpfc_iocbq *
13014lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *phba,
13015 struct lpfc_iocbq *irspiocbq)
13016{
895427bd 13017 struct lpfc_sli_ring *pring;
45ed1190
JS
13018 struct lpfc_iocbq *cmdiocbq;
13019 struct lpfc_wcqe_complete *wcqe;
13020 unsigned long iflags;
13021
895427bd 13022 pring = lpfc_phba_elsring(phba);
1234a6d5
DK
13023 if (unlikely(!pring))
13024 return NULL;
895427bd 13025
45ed1190 13026 wcqe = &irspiocbq->cq_event.cqe.wcqe_cmpl;
45ed1190
JS
13027 pring->stats.iocb_event++;
13028 /* Look up the ELS command IOCB and create pseudo response IOCB */
13029 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13030 bf_get(lpfc_wcqe_c_request_tag, wcqe));
45ed1190
JS
13031 if (unlikely(!cmdiocbq)) {
13032 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13033 "0386 ELS complete with no corresponding "
401bb416
DK
13034 "cmdiocb: 0x%x 0x%x 0x%x 0x%x\n",
13035 wcqe->word0, wcqe->total_data_placed,
13036 wcqe->parameter, wcqe->word3);
45ed1190
JS
13037 lpfc_sli_release_iocbq(phba, irspiocbq);
13038 return NULL;
13039 }
13040
e2a8be56 13041 spin_lock_irqsave(&pring->ring_lock, iflags);
401bb416
DK
13042 /* Put the iocb back on the txcmplq */
13043 lpfc_sli_ringtxcmpl_put(phba, pring, cmdiocbq);
13044 spin_unlock_irqrestore(&pring->ring_lock, iflags);
13045
45ed1190 13046 /* Fake the irspiocbq and copy necessary response information */
341af102 13047 lpfc_sli4_iocb_param_transfer(phba, irspiocbq, cmdiocbq, wcqe);
45ed1190
JS
13048
13049 return irspiocbq;
13050}
13051
8a5ca109
JS
13052inline struct lpfc_cq_event *
13053lpfc_cq_event_setup(struct lpfc_hba *phba, void *entry, int size)
13054{
13055 struct lpfc_cq_event *cq_event;
13056
13057 /* Allocate a new internal CQ_EVENT entry */
13058 cq_event = lpfc_sli4_cq_event_alloc(phba);
13059 if (!cq_event) {
13060 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13061 "0602 Failed to alloc CQ_EVENT entry\n");
13062 return NULL;
13063 }
13064
13065 /* Move the CQE into the event */
13066 memcpy(&cq_event->cqe, entry, size);
13067 return cq_event;
13068}
13069
04c68496
JS
13070/**
13071 * lpfc_sli4_sp_handle_async_event - Handle an asynchroous event
13072 * @phba: Pointer to HBA context object.
13073 * @cqe: Pointer to mailbox completion queue entry.
13074 *
13075 * This routine process a mailbox completion queue entry with asynchrous
13076 * event.
13077 *
13078 * Return: true if work posted to worker thread, otherwise false.
13079 **/
13080static bool
13081lpfc_sli4_sp_handle_async_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13082{
13083 struct lpfc_cq_event *cq_event;
13084 unsigned long iflags;
13085
13086 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13087 "0392 Async Event: word0:x%x, word1:x%x, "
13088 "word2:x%x, word3:x%x\n", mcqe->word0,
13089 mcqe->mcqe_tag0, mcqe->mcqe_tag1, mcqe->trailer);
13090
8a5ca109
JS
13091 cq_event = lpfc_cq_event_setup(phba, mcqe, sizeof(struct lpfc_mcqe));
13092 if (!cq_event)
04c68496 13093 return false;
04c68496
JS
13094 spin_lock_irqsave(&phba->hbalock, iflags);
13095 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_asynce_work_queue);
13096 /* Set the async event flag */
13097 phba->hba_flag |= ASYNC_EVENT;
13098 spin_unlock_irqrestore(&phba->hbalock, iflags);
13099
13100 return true;
13101}
13102
13103/**
13104 * lpfc_sli4_sp_handle_mbox_event - Handle a mailbox completion event
13105 * @phba: Pointer to HBA context object.
13106 * @cqe: Pointer to mailbox completion queue entry.
13107 *
13108 * This routine process a mailbox completion queue entry with mailbox
13109 * completion event.
13110 *
13111 * Return: true if work posted to worker thread, otherwise false.
13112 **/
13113static bool
13114lpfc_sli4_sp_handle_mbox_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13115{
13116 uint32_t mcqe_status;
13117 MAILBOX_t *mbox, *pmbox;
13118 struct lpfc_mqe *mqe;
13119 struct lpfc_vport *vport;
13120 struct lpfc_nodelist *ndlp;
13121 struct lpfc_dmabuf *mp;
13122 unsigned long iflags;
13123 LPFC_MBOXQ_t *pmb;
13124 bool workposted = false;
13125 int rc;
13126
13127 /* If not a mailbox complete MCQE, out by checking mailbox consume */
13128 if (!bf_get(lpfc_trailer_completed, mcqe))
13129 goto out_no_mqe_complete;
13130
13131 /* Get the reference to the active mbox command */
13132 spin_lock_irqsave(&phba->hbalock, iflags);
13133 pmb = phba->sli.mbox_active;
13134 if (unlikely(!pmb)) {
13135 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13136 "1832 No pending MBOX command to handle\n");
13137 spin_unlock_irqrestore(&phba->hbalock, iflags);
13138 goto out_no_mqe_complete;
13139 }
13140 spin_unlock_irqrestore(&phba->hbalock, iflags);
13141 mqe = &pmb->u.mqe;
13142 pmbox = (MAILBOX_t *)&pmb->u.mqe;
13143 mbox = phba->mbox;
13144 vport = pmb->vport;
13145
13146 /* Reset heartbeat timer */
13147 phba->last_completion_time = jiffies;
13148 del_timer(&phba->sli.mbox_tmo);
13149
13150 /* Move mbox data to caller's mailbox region, do endian swapping */
13151 if (pmb->mbox_cmpl && mbox)
48f8fdb4 13152 lpfc_sli4_pcimem_bcopy(mbox, mqe, sizeof(struct lpfc_mqe));
04c68496 13153
73d91e50
JS
13154 /*
13155 * For mcqe errors, conditionally move a modified error code to
13156 * the mbox so that the error will not be missed.
13157 */
13158 mcqe_status = bf_get(lpfc_mcqe_status, mcqe);
13159 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
13160 if (bf_get(lpfc_mqe_status, mqe) == MBX_SUCCESS)
13161 bf_set(lpfc_mqe_status, mqe,
13162 (LPFC_MBX_ERROR_RANGE | mcqe_status));
13163 }
04c68496
JS
13164 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
13165 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
13166 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_MBOX_VPORT,
13167 "MBOX dflt rpi: status:x%x rpi:x%x",
13168 mcqe_status,
13169 pmbox->un.varWords[0], 0);
13170 if (mcqe_status == MB_CQE_STATUS_SUCCESS) {
3e1f0718
JS
13171 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
13172 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
04c68496
JS
13173 /* Reg_LOGIN of dflt RPI was successful. Now lets get
13174 * RID of the PPI using the same mbox buffer.
13175 */
13176 lpfc_unreg_login(phba, vport->vpi,
13177 pmbox->un.varWords[0], pmb);
13178 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
13179 pmb->ctx_buf = mp;
13180 pmb->ctx_ndlp = ndlp;
04c68496
JS
13181 pmb->vport = vport;
13182 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
13183 if (rc != MBX_BUSY)
13184 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
13185 LOG_SLI, "0385 rc should "
13186 "have been MBX_BUSY\n");
13187 if (rc != MBX_NOT_FINISHED)
13188 goto send_current_mbox;
13189 }
13190 }
13191 spin_lock_irqsave(&phba->pport->work_port_lock, iflags);
13192 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
13193 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflags);
13194
13195 /* There is mailbox completion work to do */
13196 spin_lock_irqsave(&phba->hbalock, iflags);
13197 __lpfc_mbox_cmpl_put(phba, pmb);
13198 phba->work_ha |= HA_MBATT;
13199 spin_unlock_irqrestore(&phba->hbalock, iflags);
13200 workposted = true;
13201
13202send_current_mbox:
13203 spin_lock_irqsave(&phba->hbalock, iflags);
13204 /* Release the mailbox command posting token */
13205 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13206 /* Setting active mailbox pointer need to be in sync to flag clear */
13207 phba->sli.mbox_active = NULL;
13208 spin_unlock_irqrestore(&phba->hbalock, iflags);
13209 /* Wake up worker thread to post the next pending mailbox command */
13210 lpfc_worker_wake_up(phba);
13211out_no_mqe_complete:
13212 if (bf_get(lpfc_trailer_consumed, mcqe))
13213 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
13214 return workposted;
13215}
13216
13217/**
13218 * lpfc_sli4_sp_handle_mcqe - Process a mailbox completion queue entry
13219 * @phba: Pointer to HBA context object.
13220 * @cqe: Pointer to mailbox completion queue entry.
13221 *
13222 * This routine process a mailbox completion queue entry, it invokes the
13223 * proper mailbox complete handling or asynchrous event handling routine
13224 * according to the MCQE's async bit.
13225 *
13226 * Return: true if work posted to worker thread, otherwise false.
13227 **/
13228static bool
32517fc0
JS
13229lpfc_sli4_sp_handle_mcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13230 struct lpfc_cqe *cqe)
04c68496
JS
13231{
13232 struct lpfc_mcqe mcqe;
13233 bool workposted;
13234
32517fc0
JS
13235 cq->CQ_mbox++;
13236
04c68496 13237 /* Copy the mailbox MCQE and convert endian order as needed */
48f8fdb4 13238 lpfc_sli4_pcimem_bcopy(cqe, &mcqe, sizeof(struct lpfc_mcqe));
04c68496
JS
13239
13240 /* Invoke the proper event handling routine */
13241 if (!bf_get(lpfc_trailer_async, &mcqe))
13242 workposted = lpfc_sli4_sp_handle_mbox_event(phba, &mcqe);
13243 else
13244 workposted = lpfc_sli4_sp_handle_async_event(phba, &mcqe);
13245 return workposted;
13246}
13247
4f774513
JS
13248/**
13249 * lpfc_sli4_sp_handle_els_wcqe - Handle els work-queue completion event
13250 * @phba: Pointer to HBA context object.
2a76a283 13251 * @cq: Pointer to associated CQ
4f774513
JS
13252 * @wcqe: Pointer to work-queue completion queue entry.
13253 *
13254 * This routine handles an ELS work-queue completion event.
13255 *
13256 * Return: true if work posted to worker thread, otherwise false.
13257 **/
13258static bool
2a76a283 13259lpfc_sli4_sp_handle_els_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13260 struct lpfc_wcqe_complete *wcqe)
13261{
4f774513
JS
13262 struct lpfc_iocbq *irspiocbq;
13263 unsigned long iflags;
2a76a283 13264 struct lpfc_sli_ring *pring = cq->pring;
0e9bb8d7
JS
13265 int txq_cnt = 0;
13266 int txcmplq_cnt = 0;
13267 int fcp_txcmplq_cnt = 0;
4f774513 13268
11f0e34f
JS
13269 /* Check for response status */
13270 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13271 /* Log the error status */
13272 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13273 "0357 ELS CQE error: status=x%x: "
13274 "CQE: %08x %08x %08x %08x\n",
13275 bf_get(lpfc_wcqe_c_status, wcqe),
13276 wcqe->word0, wcqe->total_data_placed,
13277 wcqe->parameter, wcqe->word3);
13278 }
13279
45ed1190 13280 /* Get an irspiocbq for later ELS response processing use */
4f774513
JS
13281 irspiocbq = lpfc_sli_get_iocbq(phba);
13282 if (!irspiocbq) {
0e9bb8d7
JS
13283 if (!list_empty(&pring->txq))
13284 txq_cnt++;
13285 if (!list_empty(&pring->txcmplq))
13286 txcmplq_cnt++;
4f774513 13287 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2a9bf3d0
JS
13288 "0387 NO IOCBQ data: txq_cnt=%d iocb_cnt=%d "
13289 "fcp_txcmplq_cnt=%d, els_txcmplq_cnt=%d\n",
0e9bb8d7
JS
13290 txq_cnt, phba->iocb_cnt,
13291 fcp_txcmplq_cnt,
13292 txcmplq_cnt);
45ed1190 13293 return false;
4f774513 13294 }
4f774513 13295
45ed1190
JS
13296 /* Save off the slow-path queue event for work thread to process */
13297 memcpy(&irspiocbq->cq_event.cqe.wcqe_cmpl, wcqe, sizeof(*wcqe));
4f774513 13298 spin_lock_irqsave(&phba->hbalock, iflags);
4d9ab994 13299 list_add_tail(&irspiocbq->cq_event.list,
45ed1190
JS
13300 &phba->sli4_hba.sp_queue_event);
13301 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513 13302 spin_unlock_irqrestore(&phba->hbalock, iflags);
4f774513 13303
45ed1190 13304 return true;
4f774513
JS
13305}
13306
13307/**
13308 * lpfc_sli4_sp_handle_rel_wcqe - Handle slow-path WQ entry consumed event
13309 * @phba: Pointer to HBA context object.
13310 * @wcqe: Pointer to work-queue completion queue entry.
13311 *
3f8b6fb7 13312 * This routine handles slow-path WQ entry consumed event by invoking the
4f774513
JS
13313 * proper WQ release routine to the slow-path WQ.
13314 **/
13315static void
13316lpfc_sli4_sp_handle_rel_wcqe(struct lpfc_hba *phba,
13317 struct lpfc_wcqe_release *wcqe)
13318{
2e90f4b5
JS
13319 /* sanity check on queue memory */
13320 if (unlikely(!phba->sli4_hba.els_wq))
13321 return;
4f774513
JS
13322 /* Check for the slow-path ELS work queue */
13323 if (bf_get(lpfc_wcqe_r_wq_id, wcqe) == phba->sli4_hba.els_wq->queue_id)
13324 lpfc_sli4_wq_release(phba->sli4_hba.els_wq,
13325 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
13326 else
13327 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13328 "2579 Slow-path wqe consume event carries "
13329 "miss-matched qid: wcqe-qid=x%x, sp-qid=x%x\n",
13330 bf_get(lpfc_wcqe_r_wqe_index, wcqe),
13331 phba->sli4_hba.els_wq->queue_id);
13332}
13333
13334/**
13335 * lpfc_sli4_sp_handle_abort_xri_wcqe - Handle a xri abort event
13336 * @phba: Pointer to HBA context object.
13337 * @cq: Pointer to a WQ completion queue.
13338 * @wcqe: Pointer to work-queue completion queue entry.
13339 *
13340 * This routine handles an XRI abort event.
13341 *
13342 * Return: true if work posted to worker thread, otherwise false.
13343 **/
13344static bool
13345lpfc_sli4_sp_handle_abort_xri_wcqe(struct lpfc_hba *phba,
13346 struct lpfc_queue *cq,
13347 struct sli4_wcqe_xri_aborted *wcqe)
13348{
13349 bool workposted = false;
13350 struct lpfc_cq_event *cq_event;
13351 unsigned long iflags;
13352
4f774513
JS
13353 switch (cq->subtype) {
13354 case LPFC_FCP:
5e5b511d
JS
13355 lpfc_sli4_fcp_xri_aborted(phba, wcqe, cq->hdwq);
13356 workposted = false;
4f774513 13357 break;
422c4cb7 13358 case LPFC_NVME_LS: /* NVME LS uses ELS resources */
4f774513 13359 case LPFC_ELS:
8a5ca109
JS
13360 cq_event = lpfc_cq_event_setup(
13361 phba, wcqe, sizeof(struct sli4_wcqe_xri_aborted));
13362 if (!cq_event)
13363 return false;
5e5b511d 13364 cq_event->hdwq = cq->hdwq;
4f774513
JS
13365 spin_lock_irqsave(&phba->hbalock, iflags);
13366 list_add_tail(&cq_event->list,
13367 &phba->sli4_hba.sp_els_xri_aborted_work_queue);
13368 /* Set the els xri abort event flag */
13369 phba->hba_flag |= ELS_XRI_ABORT_EVENT;
13370 spin_unlock_irqrestore(&phba->hbalock, iflags);
13371 workposted = true;
13372 break;
318083ad 13373 case LPFC_NVME:
8a5ca109
JS
13374 /* Notify aborted XRI for NVME work queue */
13375 if (phba->nvmet_support)
13376 lpfc_sli4_nvmet_xri_aborted(phba, wcqe);
13377 else
5e5b511d 13378 lpfc_sli4_nvme_xri_aborted(phba, wcqe, cq->hdwq);
8a5ca109
JS
13379
13380 workposted = false;
318083ad 13381 break;
4f774513
JS
13382 default:
13383 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
318083ad
JS
13384 "0603 Invalid CQ subtype %d: "
13385 "%08x %08x %08x %08x\n",
13386 cq->subtype, wcqe->word0, wcqe->parameter,
13387 wcqe->word2, wcqe->word3);
4f774513
JS
13388 workposted = false;
13389 break;
13390 }
13391 return workposted;
13392}
13393
e817e5d7
JS
13394#define FC_RCTL_MDS_DIAGS 0xF4
13395
4f774513
JS
13396/**
13397 * lpfc_sli4_sp_handle_rcqe - Process a receive-queue completion queue entry
13398 * @phba: Pointer to HBA context object.
13399 * @rcqe: Pointer to receive-queue completion queue entry.
13400 *
13401 * This routine process a receive-queue completion queue entry.
13402 *
13403 * Return: true if work posted to worker thread, otherwise false.
13404 **/
13405static bool
4d9ab994 13406lpfc_sli4_sp_handle_rcqe(struct lpfc_hba *phba, struct lpfc_rcqe *rcqe)
4f774513 13407{
4f774513 13408 bool workposted = false;
e817e5d7 13409 struct fc_frame_header *fc_hdr;
4f774513
JS
13410 struct lpfc_queue *hrq = phba->sli4_hba.hdr_rq;
13411 struct lpfc_queue *drq = phba->sli4_hba.dat_rq;
547077a4 13412 struct lpfc_nvmet_tgtport *tgtp;
4f774513 13413 struct hbq_dmabuf *dma_buf;
7851fe2c 13414 uint32_t status, rq_id;
4f774513
JS
13415 unsigned long iflags;
13416
2e90f4b5
JS
13417 /* sanity check on queue memory */
13418 if (unlikely(!hrq) || unlikely(!drq))
13419 return workposted;
13420
7851fe2c
JS
13421 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13422 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13423 else
13424 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13425 if (rq_id != hrq->queue_id)
4f774513
JS
13426 goto out;
13427
4d9ab994 13428 status = bf_get(lpfc_rcqe_status, rcqe);
4f774513
JS
13429 switch (status) {
13430 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13431 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13432 "2537 Receive Frame Truncated!!\n");
5bd5f66c 13433 /* fall through */
4f774513
JS
13434 case FC_STATUS_RQ_SUCCESS:
13435 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13436 lpfc_sli4_rq_release(hrq, drq);
4f774513
JS
13437 dma_buf = lpfc_sli_hbqbuf_get(&phba->hbqs[0].hbq_buffer_list);
13438 if (!dma_buf) {
b84daac9 13439 hrq->RQ_no_buf_found++;
4f774513
JS
13440 spin_unlock_irqrestore(&phba->hbalock, iflags);
13441 goto out;
13442 }
b84daac9 13443 hrq->RQ_rcv_buf++;
547077a4 13444 hrq->RQ_buf_posted--;
4d9ab994 13445 memcpy(&dma_buf->cq_event.cqe.rcqe_cmpl, rcqe, sizeof(*rcqe));
895427bd 13446
e817e5d7
JS
13447 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13448
13449 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
13450 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
13451 spin_unlock_irqrestore(&phba->hbalock, iflags);
13452 /* Handle MDS Loopback frames */
13453 lpfc_sli4_handle_mds_loopback(phba->pport, dma_buf);
13454 break;
13455 }
13456
13457 /* save off the frame for the work thread to process */
4d9ab994 13458 list_add_tail(&dma_buf->cq_event.list,
45ed1190 13459 &phba->sli4_hba.sp_queue_event);
4f774513 13460 /* Frame received */
45ed1190 13461 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513
JS
13462 spin_unlock_irqrestore(&phba->hbalock, iflags);
13463 workposted = true;
13464 break;
4f774513 13465 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13466 if (phba->nvmet_support) {
13467 tgtp = phba->targetport->private;
13468 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13469 "6402 RQE Error x%x, posted %d err_cnt "
13470 "%d: %x %x %x\n",
13471 status, hrq->RQ_buf_posted,
13472 hrq->RQ_no_posted_buf,
13473 atomic_read(&tgtp->rcv_fcp_cmd_in),
13474 atomic_read(&tgtp->rcv_fcp_cmd_out),
13475 atomic_read(&tgtp->xmt_fcp_release));
13476 }
13477 /* fallthrough */
13478
13479 case FC_STATUS_INSUFF_BUF_NEED_BUF:
b84daac9 13480 hrq->RQ_no_posted_buf++;
4f774513
JS
13481 /* Post more buffers if possible */
13482 spin_lock_irqsave(&phba->hbalock, iflags);
13483 phba->hba_flag |= HBA_POST_RECEIVE_BUFFER;
13484 spin_unlock_irqrestore(&phba->hbalock, iflags);
13485 workposted = true;
13486 break;
13487 }
13488out:
13489 return workposted;
4f774513
JS
13490}
13491
4d9ab994
JS
13492/**
13493 * lpfc_sli4_sp_handle_cqe - Process a slow path completion queue entry
13494 * @phba: Pointer to HBA context object.
13495 * @cq: Pointer to the completion queue.
32517fc0 13496 * @cqe: Pointer to a completion queue entry.
4d9ab994 13497 *
25985edc 13498 * This routine process a slow-path work-queue or receive queue completion queue
4d9ab994
JS
13499 * entry.
13500 *
13501 * Return: true if work posted to worker thread, otherwise false.
13502 **/
13503static bool
13504lpfc_sli4_sp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13505 struct lpfc_cqe *cqe)
13506{
45ed1190 13507 struct lpfc_cqe cqevt;
4d9ab994
JS
13508 bool workposted = false;
13509
13510 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 13511 lpfc_sli4_pcimem_bcopy(cqe, &cqevt, sizeof(struct lpfc_cqe));
4d9ab994
JS
13512
13513 /* Check and process for different type of WCQE and dispatch */
45ed1190 13514 switch (bf_get(lpfc_cqe_code, &cqevt)) {
4d9ab994 13515 case CQE_CODE_COMPL_WQE:
45ed1190 13516 /* Process the WQ/RQ complete event */
bc73905a 13517 phba->last_completion_time = jiffies;
2a76a283 13518 workposted = lpfc_sli4_sp_handle_els_wcqe(phba, cq,
45ed1190 13519 (struct lpfc_wcqe_complete *)&cqevt);
4d9ab994
JS
13520 break;
13521 case CQE_CODE_RELEASE_WQE:
13522 /* Process the WQ release event */
13523 lpfc_sli4_sp_handle_rel_wcqe(phba,
45ed1190 13524 (struct lpfc_wcqe_release *)&cqevt);
4d9ab994
JS
13525 break;
13526 case CQE_CODE_XRI_ABORTED:
13527 /* Process the WQ XRI abort event */
bc73905a 13528 phba->last_completion_time = jiffies;
4d9ab994 13529 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
45ed1190 13530 (struct sli4_wcqe_xri_aborted *)&cqevt);
4d9ab994
JS
13531 break;
13532 case CQE_CODE_RECEIVE:
7851fe2c 13533 case CQE_CODE_RECEIVE_V1:
4d9ab994 13534 /* Process the RQ event */
bc73905a 13535 phba->last_completion_time = jiffies;
4d9ab994 13536 workposted = lpfc_sli4_sp_handle_rcqe(phba,
45ed1190 13537 (struct lpfc_rcqe *)&cqevt);
4d9ab994
JS
13538 break;
13539 default:
13540 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13541 "0388 Not a valid WCQE code: x%x\n",
45ed1190 13542 bf_get(lpfc_cqe_code, &cqevt));
4d9ab994
JS
13543 break;
13544 }
13545 return workposted;
13546}
13547
4f774513
JS
13548/**
13549 * lpfc_sli4_sp_handle_eqe - Process a slow-path event queue entry
13550 * @phba: Pointer to HBA context object.
13551 * @eqe: Pointer to fast-path event queue entry.
13552 *
13553 * This routine process a event queue entry from the slow-path event queue.
13554 * It will check the MajorCode and MinorCode to determine this is for a
13555 * completion event on a completion queue, if not, an error shall be logged
13556 * and just return. Otherwise, it will get to the corresponding completion
13557 * queue and process all the entries on that completion queue, rearm the
13558 * completion queue, and then return.
13559 *
13560 **/
f485c18d 13561static void
67d12733
JS
13562lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
13563 struct lpfc_queue *speq)
4f774513 13564{
67d12733 13565 struct lpfc_queue *cq = NULL, *childq;
4f774513
JS
13566 uint16_t cqid;
13567
4f774513 13568 /* Get the reference to the corresponding CQ */
cb5172ea 13569 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
4f774513 13570
4f774513
JS
13571 list_for_each_entry(childq, &speq->child_list, list) {
13572 if (childq->queue_id == cqid) {
13573 cq = childq;
13574 break;
13575 }
13576 }
13577 if (unlikely(!cq)) {
75baf696
JS
13578 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
13579 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13580 "0365 Slow-path CQ identifier "
13581 "(%d) does not exist\n", cqid);
f485c18d 13582 return;
4f774513
JS
13583 }
13584
895427bd
JS
13585 /* Save EQ associated with this CQ */
13586 cq->assoc_qp = speq;
13587
6a828b0f 13588 if (!queue_work_on(cq->chann, phba->wq, &cq->spwork))
f485c18d
DK
13589 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13590 "0390 Cannot schedule soft IRQ "
13591 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
d6d189ce 13592 cqid, cq->queue_id, raw_smp_processor_id());
f485c18d
DK
13593}
13594
13595/**
32517fc0 13596 * __lpfc_sli4_process_cq - Process elements of a CQ
f485c18d 13597 * @phba: Pointer to HBA context object.
32517fc0
JS
13598 * @cq: Pointer to CQ to be processed
13599 * @handler: Routine to process each cqe
13600 * @delay: Pointer to usdelay to set in case of rescheduling of the handler
f485c18d 13601 *
32517fc0
JS
13602 * This routine processes completion queue entries in a CQ. While a valid
13603 * queue element is found, the handler is called. During processing checks
13604 * are made for periodic doorbell writes to let the hardware know of
13605 * element consumption.
13606 *
13607 * If the max limit on cqes to process is hit, or there are no more valid
13608 * entries, the loop stops. If we processed a sufficient number of elements,
13609 * meaning there is sufficient load, rather than rearming and generating
13610 * another interrupt, a cq rescheduling delay will be set. A delay of 0
13611 * indicates no rescheduling.
f485c18d 13612 *
32517fc0 13613 * Returns True if work scheduled, False otherwise.
f485c18d 13614 **/
32517fc0
JS
13615static bool
13616__lpfc_sli4_process_cq(struct lpfc_hba *phba, struct lpfc_queue *cq,
13617 bool (*handler)(struct lpfc_hba *, struct lpfc_queue *,
13618 struct lpfc_cqe *), unsigned long *delay)
f485c18d 13619{
f485c18d
DK
13620 struct lpfc_cqe *cqe;
13621 bool workposted = false;
32517fc0
JS
13622 int count = 0, consumed = 0;
13623 bool arm = true;
13624
13625 /* default - no reschedule */
13626 *delay = 0;
13627
13628 if (cmpxchg(&cq->queue_claimed, 0, 1) != 0)
13629 goto rearm_and_exit;
f485c18d 13630
4f774513 13631 /* Process all the entries to the CQ */
d74a89aa 13632 cq->q_flag = 0;
32517fc0
JS
13633 cqe = lpfc_sli4_cq_get(cq);
13634 while (cqe) {
32517fc0
JS
13635 workposted |= handler(phba, cq, cqe);
13636 __lpfc_sli4_consume_cqe(phba, cq, cqe);
13637
13638 consumed++;
13639 if (!(++count % cq->max_proc_limit))
13640 break;
13641
13642 if (!(count % cq->notify_interval)) {
13643 phba->sli4_hba.sli4_write_cq_db(phba, cq, consumed,
13644 LPFC_QUEUE_NOARM);
13645 consumed = 0;
13646 }
13647
d74a89aa
JS
13648 if (count == LPFC_NVMET_CQ_NOTIFY)
13649 cq->q_flag |= HBA_NVMET_CQ_NOTIFY;
13650
32517fc0
JS
13651 cqe = lpfc_sli4_cq_get(cq);
13652 }
13653 if (count >= phba->cfg_cq_poll_threshold) {
13654 *delay = 1;
13655 arm = false;
13656 }
13657
13658 /* Track the max number of CQEs processed in 1 EQ */
13659 if (count > cq->CQ_max_cqe)
13660 cq->CQ_max_cqe = count;
13661
13662 cq->assoc_qp->EQ_cqe_cnt += count;
13663
13664 /* Catch the no cq entry condition */
13665 if (unlikely(count == 0))
13666 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13667 "0369 No entry from completion queue "
13668 "qid=%d\n", cq->queue_id);
13669
13670 cq->queue_claimed = 0;
13671
13672rearm_and_exit:
13673 phba->sli4_hba.sli4_write_cq_db(phba, cq, consumed,
13674 arm ? LPFC_QUEUE_REARM : LPFC_QUEUE_NOARM);
13675
13676 return workposted;
13677}
13678
13679/**
13680 * lpfc_sli4_sp_process_cq - Process a slow-path event queue entry
13681 * @cq: pointer to CQ to process
13682 *
13683 * This routine calls the cq processing routine with a handler specific
13684 * to the type of queue bound to it.
13685 *
13686 * The CQ routine returns two values: the first is the calling status,
13687 * which indicates whether work was queued to the background discovery
13688 * thread. If true, the routine should wakeup the discovery thread;
13689 * the second is the delay parameter. If non-zero, rather than rearming
13690 * the CQ and yet another interrupt, the CQ handler should be queued so
13691 * that it is processed in a subsequent polling action. The value of
13692 * the delay indicates when to reschedule it.
13693 **/
13694static void
13695__lpfc_sli4_sp_process_cq(struct lpfc_queue *cq)
13696{
13697 struct lpfc_hba *phba = cq->phba;
13698 unsigned long delay;
13699 bool workposted = false;
13700
13701 /* Process and rearm the CQ */
4f774513
JS
13702 switch (cq->type) {
13703 case LPFC_MCQ:
32517fc0
JS
13704 workposted |= __lpfc_sli4_process_cq(phba, cq,
13705 lpfc_sli4_sp_handle_mcqe,
13706 &delay);
4f774513
JS
13707 break;
13708 case LPFC_WCQ:
32517fc0
JS
13709 if (cq->subtype == LPFC_FCP || cq->subtype == LPFC_NVME)
13710 workposted |= __lpfc_sli4_process_cq(phba, cq,
13711 lpfc_sli4_fp_handle_cqe,
13712 &delay);
13713 else
13714 workposted |= __lpfc_sli4_process_cq(phba, cq,
13715 lpfc_sli4_sp_handle_cqe,
13716 &delay);
4f774513
JS
13717 break;
13718 default:
13719 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13720 "0370 Invalid completion queue type (%d)\n",
13721 cq->type);
f485c18d 13722 return;
4f774513
JS
13723 }
13724
32517fc0
JS
13725 if (delay) {
13726 if (!queue_delayed_work_on(cq->chann, phba->wq,
13727 &cq->sched_spwork, delay))
13728 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13729 "0394 Cannot schedule soft IRQ "
13730 "for cqid=%d on CPU %d\n",
13731 cq->queue_id, cq->chann);
13732 }
4f774513
JS
13733
13734 /* wake up worker thread if there are works to be done */
13735 if (workposted)
13736 lpfc_worker_wake_up(phba);
13737}
13738
32517fc0
JS
13739/**
13740 * lpfc_sli4_sp_process_cq - slow-path work handler when started by
13741 * interrupt
13742 * @work: pointer to work element
13743 *
13744 * translates from the work handler and calls the slow-path handler.
13745 **/
13746static void
13747lpfc_sli4_sp_process_cq(struct work_struct *work)
13748{
13749 struct lpfc_queue *cq = container_of(work, struct lpfc_queue, spwork);
13750
13751 __lpfc_sli4_sp_process_cq(cq);
13752}
13753
13754/**
13755 * lpfc_sli4_dly_sp_process_cq - slow-path work handler when started by timer
13756 * @work: pointer to work element
13757 *
13758 * translates from the work handler and calls the slow-path handler.
13759 **/
13760static void
13761lpfc_sli4_dly_sp_process_cq(struct work_struct *work)
13762{
13763 struct lpfc_queue *cq = container_of(to_delayed_work(work),
13764 struct lpfc_queue, sched_spwork);
13765
13766 __lpfc_sli4_sp_process_cq(cq);
13767}
13768
4f774513
JS
13769/**
13770 * lpfc_sli4_fp_handle_fcp_wcqe - Process fast-path work queue completion entry
2a76a283
JS
13771 * @phba: Pointer to HBA context object.
13772 * @cq: Pointer to associated CQ
13773 * @wcqe: Pointer to work-queue completion queue entry.
4f774513
JS
13774 *
13775 * This routine process a fast-path work queue completion entry from fast-path
13776 * event queue for FCP command response completion.
13777 **/
13778static void
2a76a283 13779lpfc_sli4_fp_handle_fcp_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13780 struct lpfc_wcqe_complete *wcqe)
13781{
2a76a283 13782 struct lpfc_sli_ring *pring = cq->pring;
4f774513
JS
13783 struct lpfc_iocbq *cmdiocbq;
13784 struct lpfc_iocbq irspiocbq;
13785 unsigned long iflags;
13786
4f774513
JS
13787 /* Check for response status */
13788 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13789 /* If resource errors reported from HBA, reduce queue
13790 * depth of the SCSI device.
13791 */
e3d2b802
JS
13792 if (((bf_get(lpfc_wcqe_c_status, wcqe) ==
13793 IOSTAT_LOCAL_REJECT)) &&
13794 ((wcqe->parameter & IOERR_PARAM_MASK) ==
13795 IOERR_NO_RESOURCES))
4f774513 13796 phba->lpfc_rampdown_queue_depth(phba);
e3d2b802 13797
4f774513 13798 /* Log the error status */
11f0e34f
JS
13799 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13800 "0373 FCP CQE error: status=x%x: "
13801 "CQE: %08x %08x %08x %08x\n",
4f774513 13802 bf_get(lpfc_wcqe_c_status, wcqe),
11f0e34f
JS
13803 wcqe->word0, wcqe->total_data_placed,
13804 wcqe->parameter, wcqe->word3);
4f774513
JS
13805 }
13806
13807 /* Look up the FCP command IOCB and create pseudo response IOCB */
7e56aa25
JS
13808 spin_lock_irqsave(&pring->ring_lock, iflags);
13809 pring->stats.iocb_event++;
e2a8be56 13810 spin_unlock_irqrestore(&pring->ring_lock, iflags);
4f774513
JS
13811 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13812 bf_get(lpfc_wcqe_c_request_tag, wcqe));
4f774513
JS
13813 if (unlikely(!cmdiocbq)) {
13814 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13815 "0374 FCP complete with no corresponding "
13816 "cmdiocb: iotag (%d)\n",
13817 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13818 return;
13819 }
c8a4ce0b
DK
13820#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13821 cmdiocbq->isr_timestamp = cq->isr_timestamp;
13822#endif
895427bd
JS
13823 if (cmdiocbq->iocb_cmpl == NULL) {
13824 if (cmdiocbq->wqe_cmpl) {
13825 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13826 spin_lock_irqsave(&phba->hbalock, iflags);
13827 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13828 spin_unlock_irqrestore(&phba->hbalock, iflags);
13829 }
13830
13831 /* Pass the cmd_iocb and the wcqe to the upper layer */
13832 (cmdiocbq->wqe_cmpl)(phba, cmdiocbq, wcqe);
13833 return;
13834 }
4f774513
JS
13835 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13836 "0375 FCP cmdiocb not callback function "
13837 "iotag: (%d)\n",
13838 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13839 return;
13840 }
13841
13842 /* Fake the irspiocb and copy necessary response information */
341af102 13843 lpfc_sli4_iocb_param_transfer(phba, &irspiocbq, cmdiocbq, wcqe);
4f774513 13844
0f65ff68
JS
13845 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13846 spin_lock_irqsave(&phba->hbalock, iflags);
13847 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13848 spin_unlock_irqrestore(&phba->hbalock, iflags);
13849 }
13850
4f774513
JS
13851 /* Pass the cmd_iocb and the rsp state to the upper layer */
13852 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, &irspiocbq);
13853}
13854
13855/**
13856 * lpfc_sli4_fp_handle_rel_wcqe - Handle fast-path WQ entry consumed event
13857 * @phba: Pointer to HBA context object.
13858 * @cq: Pointer to completion queue.
13859 * @wcqe: Pointer to work-queue completion queue entry.
13860 *
3f8b6fb7 13861 * This routine handles an fast-path WQ entry consumed event by invoking the
4f774513
JS
13862 * proper WQ release routine to the slow-path WQ.
13863 **/
13864static void
13865lpfc_sli4_fp_handle_rel_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13866 struct lpfc_wcqe_release *wcqe)
13867{
13868 struct lpfc_queue *childwq;
13869 bool wqid_matched = false;
895427bd 13870 uint16_t hba_wqid;
4f774513
JS
13871
13872 /* Check for fast-path FCP work queue release */
895427bd 13873 hba_wqid = bf_get(lpfc_wcqe_r_wq_id, wcqe);
4f774513 13874 list_for_each_entry(childwq, &cq->child_list, list) {
895427bd 13875 if (childwq->queue_id == hba_wqid) {
4f774513
JS
13876 lpfc_sli4_wq_release(childwq,
13877 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
6e8e1c14
JS
13878 if (childwq->q_flag & HBA_NVMET_WQFULL)
13879 lpfc_nvmet_wqfull_process(phba, childwq);
4f774513
JS
13880 wqid_matched = true;
13881 break;
13882 }
13883 }
13884 /* Report warning log message if no match found */
13885 if (wqid_matched != true)
13886 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13887 "2580 Fast-path wqe consume event carries "
895427bd 13888 "miss-matched qid: wcqe-qid=x%x\n", hba_wqid);
4f774513
JS
13889}
13890
13891/**
2d7dbc4c
JS
13892 * lpfc_sli4_nvmet_handle_rcqe - Process a receive-queue completion queue entry
13893 * @phba: Pointer to HBA context object.
13894 * @rcqe: Pointer to receive-queue completion queue entry.
4f774513 13895 *
2d7dbc4c
JS
13896 * This routine process a receive-queue completion queue entry.
13897 *
13898 * Return: true if work posted to worker thread, otherwise false.
13899 **/
13900static bool
13901lpfc_sli4_nvmet_handle_rcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13902 struct lpfc_rcqe *rcqe)
13903{
13904 bool workposted = false;
13905 struct lpfc_queue *hrq;
13906 struct lpfc_queue *drq;
13907 struct rqb_dmabuf *dma_buf;
13908 struct fc_frame_header *fc_hdr;
547077a4 13909 struct lpfc_nvmet_tgtport *tgtp;
2d7dbc4c
JS
13910 uint32_t status, rq_id;
13911 unsigned long iflags;
13912 uint32_t fctl, idx;
13913
13914 if ((phba->nvmet_support == 0) ||
13915 (phba->sli4_hba.nvmet_cqset == NULL))
13916 return workposted;
13917
13918 idx = cq->queue_id - phba->sli4_hba.nvmet_cqset[0]->queue_id;
13919 hrq = phba->sli4_hba.nvmet_mrq_hdr[idx];
13920 drq = phba->sli4_hba.nvmet_mrq_data[idx];
13921
13922 /* sanity check on queue memory */
13923 if (unlikely(!hrq) || unlikely(!drq))
13924 return workposted;
13925
13926 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13927 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13928 else
13929 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13930
13931 if ((phba->nvmet_support == 0) ||
13932 (rq_id != hrq->queue_id))
13933 return workposted;
13934
13935 status = bf_get(lpfc_rcqe_status, rcqe);
13936 switch (status) {
13937 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13938 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13939 "6126 Receive Frame Truncated!!\n");
5bd5f66c 13940 /* fall through */
2d7dbc4c 13941 case FC_STATUS_RQ_SUCCESS:
2d7dbc4c 13942 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13943 lpfc_sli4_rq_release(hrq, drq);
2d7dbc4c
JS
13944 dma_buf = lpfc_sli_rqbuf_get(phba, hrq);
13945 if (!dma_buf) {
13946 hrq->RQ_no_buf_found++;
13947 spin_unlock_irqrestore(&phba->hbalock, iflags);
13948 goto out;
13949 }
13950 spin_unlock_irqrestore(&phba->hbalock, iflags);
13951 hrq->RQ_rcv_buf++;
547077a4 13952 hrq->RQ_buf_posted--;
2d7dbc4c
JS
13953 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13954
13955 /* Just some basic sanity checks on FCP Command frame */
13956 fctl = (fc_hdr->fh_f_ctl[0] << 16 |
13957 fc_hdr->fh_f_ctl[1] << 8 |
13958 fc_hdr->fh_f_ctl[2]);
13959 if (((fctl &
13960 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) !=
13961 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) ||
13962 (fc_hdr->fh_seq_cnt != 0)) /* 0 byte swapped is still 0 */
13963 goto drop;
13964
13965 if (fc_hdr->fh_type == FC_TYPE_FCP) {
d74a89aa 13966 dma_buf->bytes_recv = bf_get(lpfc_rcqe_length, rcqe);
d613b6a7 13967 lpfc_nvmet_unsol_fcp_event(
d74a89aa
JS
13968 phba, idx, dma_buf, cq->isr_timestamp,
13969 cq->q_flag & HBA_NVMET_CQ_NOTIFY);
2d7dbc4c
JS
13970 return false;
13971 }
13972drop:
22b738ac 13973 lpfc_rq_buf_free(phba, &dma_buf->hbuf);
2d7dbc4c 13974 break;
2d7dbc4c 13975 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13976 if (phba->nvmet_support) {
13977 tgtp = phba->targetport->private;
13978 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13979 "6401 RQE Error x%x, posted %d err_cnt "
13980 "%d: %x %x %x\n",
13981 status, hrq->RQ_buf_posted,
13982 hrq->RQ_no_posted_buf,
13983 atomic_read(&tgtp->rcv_fcp_cmd_in),
13984 atomic_read(&tgtp->rcv_fcp_cmd_out),
13985 atomic_read(&tgtp->xmt_fcp_release));
13986 }
13987 /* fallthrough */
13988
13989 case FC_STATUS_INSUFF_BUF_NEED_BUF:
2d7dbc4c
JS
13990 hrq->RQ_no_posted_buf++;
13991 /* Post more buffers if possible */
2d7dbc4c
JS
13992 break;
13993 }
13994out:
13995 return workposted;
13996}
13997
4f774513 13998/**
895427bd 13999 * lpfc_sli4_fp_handle_cqe - Process fast-path work queue completion entry
32517fc0 14000 * @phba: adapter with cq
4f774513
JS
14001 * @cq: Pointer to the completion queue.
14002 * @eqe: Pointer to fast-path completion queue entry.
14003 *
14004 * This routine process a fast-path work queue completion entry from fast-path
14005 * event queue for FCP command response completion.
32517fc0
JS
14006 *
14007 * Return: true if work posted to worker thread, otherwise false.
4f774513 14008 **/
32517fc0 14009static bool
895427bd 14010lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
14011 struct lpfc_cqe *cqe)
14012{
14013 struct lpfc_wcqe_release wcqe;
14014 bool workposted = false;
14015
14016 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 14017 lpfc_sli4_pcimem_bcopy(cqe, &wcqe, sizeof(struct lpfc_cqe));
4f774513
JS
14018
14019 /* Check and process for different type of WCQE and dispatch */
14020 switch (bf_get(lpfc_wcqe_c_code, &wcqe)) {
14021 case CQE_CODE_COMPL_WQE:
895427bd 14022 case CQE_CODE_NVME_ERSP:
b84daac9 14023 cq->CQ_wq++;
4f774513 14024 /* Process the WQ complete event */
98fc5dd9 14025 phba->last_completion_time = jiffies;
895427bd
JS
14026 if ((cq->subtype == LPFC_FCP) || (cq->subtype == LPFC_NVME))
14027 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
14028 (struct lpfc_wcqe_complete *)&wcqe);
14029 if (cq->subtype == LPFC_NVME_LS)
14030 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
4f774513
JS
14031 (struct lpfc_wcqe_complete *)&wcqe);
14032 break;
14033 case CQE_CODE_RELEASE_WQE:
b84daac9 14034 cq->CQ_release_wqe++;
4f774513
JS
14035 /* Process the WQ release event */
14036 lpfc_sli4_fp_handle_rel_wcqe(phba, cq,
14037 (struct lpfc_wcqe_release *)&wcqe);
14038 break;
14039 case CQE_CODE_XRI_ABORTED:
b84daac9 14040 cq->CQ_xri_aborted++;
4f774513 14041 /* Process the WQ XRI abort event */
bc73905a 14042 phba->last_completion_time = jiffies;
4f774513
JS
14043 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
14044 (struct sli4_wcqe_xri_aborted *)&wcqe);
14045 break;
895427bd
JS
14046 case CQE_CODE_RECEIVE_V1:
14047 case CQE_CODE_RECEIVE:
14048 phba->last_completion_time = jiffies;
2d7dbc4c
JS
14049 if (cq->subtype == LPFC_NVMET) {
14050 workposted = lpfc_sli4_nvmet_handle_rcqe(
14051 phba, cq, (struct lpfc_rcqe *)&wcqe);
14052 }
895427bd 14053 break;
4f774513
JS
14054 default:
14055 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 14056 "0144 Not a valid CQE code: x%x\n",
4f774513
JS
14057 bf_get(lpfc_wcqe_c_code, &wcqe));
14058 break;
14059 }
14060 return workposted;
14061}
14062
14063/**
67d12733 14064 * lpfc_sli4_hba_handle_eqe - Process a fast-path event queue entry
4f774513
JS
14065 * @phba: Pointer to HBA context object.
14066 * @eqe: Pointer to fast-path event queue entry.
14067 *
14068 * This routine process a event queue entry from the fast-path event queue.
14069 * It will check the MajorCode and MinorCode to determine this is for a
14070 * completion event on a completion queue, if not, an error shall be logged
14071 * and just return. Otherwise, it will get to the corresponding completion
14072 * queue and process all the entries on the completion queue, rearm the
14073 * completion queue, and then return.
14074 **/
f485c18d 14075static void
32517fc0
JS
14076lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba, struct lpfc_queue *eq,
14077 struct lpfc_eqe *eqe)
4f774513 14078{
895427bd 14079 struct lpfc_queue *cq = NULL;
32517fc0 14080 uint32_t qidx = eq->hdwq;
2d7dbc4c 14081 uint16_t cqid, id;
4f774513 14082
cb5172ea 14083 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
4f774513 14084 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
67d12733 14085 "0366 Not a valid completion "
4f774513 14086 "event: majorcode=x%x, minorcode=x%x\n",
cb5172ea
JS
14087 bf_get_le32(lpfc_eqe_major_code, eqe),
14088 bf_get_le32(lpfc_eqe_minor_code, eqe));
f485c18d 14089 return;
4f774513
JS
14090 }
14091
67d12733
JS
14092 /* Get the reference to the corresponding CQ */
14093 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
14094
6a828b0f
JS
14095 /* Use the fast lookup method first */
14096 if (cqid <= phba->sli4_hba.cq_max) {
14097 cq = phba->sli4_hba.cq_lookup[cqid];
14098 if (cq)
14099 goto work_cq;
cdb42bec
JS
14100 }
14101
14102 /* Next check for NVMET completion */
2d7dbc4c
JS
14103 if (phba->cfg_nvmet_mrq && phba->sli4_hba.nvmet_cqset) {
14104 id = phba->sli4_hba.nvmet_cqset[0]->queue_id;
14105 if ((cqid >= id) && (cqid < (id + phba->cfg_nvmet_mrq))) {
14106 /* Process NVMET unsol rcv */
14107 cq = phba->sli4_hba.nvmet_cqset[cqid - id];
14108 goto process_cq;
14109 }
67d12733
JS
14110 }
14111
895427bd
JS
14112 if (phba->sli4_hba.nvmels_cq &&
14113 (cqid == phba->sli4_hba.nvmels_cq->queue_id)) {
14114 /* Process NVME unsol rcv */
14115 cq = phba->sli4_hba.nvmels_cq;
14116 }
14117
14118 /* Otherwise this is a Slow path event */
14119 if (cq == NULL) {
cdb42bec
JS
14120 lpfc_sli4_sp_handle_eqe(phba, eqe,
14121 phba->sli4_hba.hdwq[qidx].hba_eq);
f485c18d 14122 return;
4f774513
JS
14123 }
14124
895427bd 14125process_cq:
4f774513
JS
14126 if (unlikely(cqid != cq->queue_id)) {
14127 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14128 "0368 Miss-matched fast-path completion "
14129 "queue identifier: eqcqid=%d, fcpcqid=%d\n",
14130 cqid, cq->queue_id);
f485c18d 14131 return;
4f774513
JS
14132 }
14133
6a828b0f 14134work_cq:
d74a89aa
JS
14135#if defined(CONFIG_SCSI_LPFC_DEBUG_FS)
14136 if (phba->ktime_on)
14137 cq->isr_timestamp = ktime_get_ns();
14138 else
14139 cq->isr_timestamp = 0;
14140#endif
45aa312e 14141 if (!queue_work_on(cq->chann, phba->wq, &cq->irqwork))
f485c18d
DK
14142 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14143 "0363 Cannot schedule soft IRQ "
14144 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
d6d189ce 14145 cqid, cq->queue_id, raw_smp_processor_id());
f485c18d
DK
14146}
14147
14148/**
32517fc0
JS
14149 * __lpfc_sli4_hba_process_cq - Process a fast-path event queue entry
14150 * @cq: Pointer to CQ to be processed
f485c18d 14151 *
32517fc0
JS
14152 * This routine calls the cq processing routine with the handler for
14153 * fast path CQEs.
14154 *
14155 * The CQ routine returns two values: the first is the calling status,
14156 * which indicates whether work was queued to the background discovery
14157 * thread. If true, the routine should wakeup the discovery thread;
14158 * the second is the delay parameter. If non-zero, rather than rearming
14159 * the CQ and yet another interrupt, the CQ handler should be queued so
14160 * that it is processed in a subsequent polling action. The value of
14161 * the delay indicates when to reschedule it.
f485c18d
DK
14162 **/
14163static void
32517fc0 14164__lpfc_sli4_hba_process_cq(struct lpfc_queue *cq)
f485c18d 14165{
f485c18d 14166 struct lpfc_hba *phba = cq->phba;
32517fc0 14167 unsigned long delay;
f485c18d 14168 bool workposted = false;
f485c18d 14169
32517fc0
JS
14170 /* process and rearm the CQ */
14171 workposted |= __lpfc_sli4_process_cq(phba, cq, lpfc_sli4_fp_handle_cqe,
14172 &delay);
4f774513 14173
32517fc0
JS
14174 if (delay) {
14175 if (!queue_delayed_work_on(cq->chann, phba->wq,
14176 &cq->sched_irqwork, delay))
14177 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14178 "0367 Cannot schedule soft IRQ "
14179 "for cqid=%d on CPU %d\n",
14180 cq->queue_id, cq->chann);
14181 }
4f774513
JS
14182
14183 /* wake up worker thread if there are works to be done */
14184 if (workposted)
14185 lpfc_worker_wake_up(phba);
14186}
14187
1ba981fd 14188/**
32517fc0
JS
14189 * lpfc_sli4_hba_process_cq - fast-path work handler when started by
14190 * interrupt
14191 * @work: pointer to work element
1ba981fd 14192 *
32517fc0 14193 * translates from the work handler and calls the fast-path handler.
1ba981fd
JS
14194 **/
14195static void
32517fc0 14196lpfc_sli4_hba_process_cq(struct work_struct *work)
1ba981fd 14197{
32517fc0 14198 struct lpfc_queue *cq = container_of(work, struct lpfc_queue, irqwork);
1ba981fd 14199
32517fc0 14200 __lpfc_sli4_hba_process_cq(cq);
1ba981fd
JS
14201}
14202
14203/**
32517fc0
JS
14204 * lpfc_sli4_hba_process_cq - fast-path work handler when started by timer
14205 * @work: pointer to work element
1ba981fd 14206 *
32517fc0 14207 * translates from the work handler and calls the fast-path handler.
1ba981fd 14208 **/
32517fc0
JS
14209static void
14210lpfc_sli4_dly_hba_process_cq(struct work_struct *work)
1ba981fd 14211{
32517fc0
JS
14212 struct lpfc_queue *cq = container_of(to_delayed_work(work),
14213 struct lpfc_queue, sched_irqwork);
1ba981fd 14214
32517fc0 14215 __lpfc_sli4_hba_process_cq(cq);
1ba981fd
JS
14216}
14217
4f774513 14218/**
67d12733 14219 * lpfc_sli4_hba_intr_handler - HBA interrupt handler to SLI-4 device
4f774513
JS
14220 * @irq: Interrupt number.
14221 * @dev_id: The device context pointer.
14222 *
14223 * This function is directly called from the PCI layer as an interrupt
14224 * service routine when device with SLI-4 interface spec is enabled with
14225 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
14226 * ring event in the HBA. However, when the device is enabled with either
14227 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
14228 * device-level interrupt handler. When the PCI slot is in error recovery
14229 * or the HBA is undergoing initialization, the interrupt handler will not
14230 * process the interrupt. The SCSI FCP fast-path ring event are handled in
14231 * the intrrupt context. This function is called without any lock held.
14232 * It gets the hbalock to access and update SLI data structures. Note that,
14233 * the FCP EQ to FCP CQ are one-to-one map such that the FCP EQ index is
14234 * equal to that of FCP CQ index.
14235 *
67d12733
JS
14236 * The link attention and ELS ring attention events are handled
14237 * by the worker thread. The interrupt handler signals the worker thread
14238 * and returns for these events. This function is called without any lock
14239 * held. It gets the hbalock to access and update SLI data structures.
14240 *
4f774513
JS
14241 * This function returns IRQ_HANDLED when interrupt is handled else it
14242 * returns IRQ_NONE.
14243 **/
14244irqreturn_t
67d12733 14245lpfc_sli4_hba_intr_handler(int irq, void *dev_id)
4f774513
JS
14246{
14247 struct lpfc_hba *phba;
895427bd 14248 struct lpfc_hba_eq_hdl *hba_eq_hdl;
4f774513 14249 struct lpfc_queue *fpeq;
4f774513
JS
14250 unsigned long iflag;
14251 int ecount = 0;
895427bd 14252 int hba_eqidx;
32517fc0
JS
14253 struct lpfc_eq_intr_info *eqi;
14254 uint32_t icnt;
4f774513
JS
14255
14256 /* Get the driver's phba structure from the dev_id */
895427bd
JS
14257 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
14258 phba = hba_eq_hdl->phba;
14259 hba_eqidx = hba_eq_hdl->idx;
4f774513
JS
14260
14261 if (unlikely(!phba))
14262 return IRQ_NONE;
cdb42bec 14263 if (unlikely(!phba->sli4_hba.hdwq))
5350d872 14264 return IRQ_NONE;
4f774513
JS
14265
14266 /* Get to the EQ struct associated with this vector */
657add4e 14267 fpeq = phba->sli4_hba.hba_eq_hdl[hba_eqidx].eq;
2e90f4b5
JS
14268 if (unlikely(!fpeq))
14269 return IRQ_NONE;
4f774513
JS
14270
14271 /* Check device state for handling interrupt */
14272 if (unlikely(lpfc_intr_state_check(phba))) {
14273 /* Check again for link_state with lock held */
14274 spin_lock_irqsave(&phba->hbalock, iflag);
14275 if (phba->link_state < LPFC_LINK_DOWN)
14276 /* Flush, clear interrupt, and rearm the EQ */
14277 lpfc_sli4_eq_flush(phba, fpeq);
14278 spin_unlock_irqrestore(&phba->hbalock, iflag);
14279 return IRQ_NONE;
14280 }
14281
32517fc0
JS
14282 eqi = phba->sli4_hba.eq_info;
14283 icnt = this_cpu_inc_return(eqi->icnt);
d6d189ce 14284 fpeq->last_cpu = raw_smp_processor_id();
4f774513 14285
32517fc0
JS
14286 if (icnt > LPFC_EQD_ISR_TRIGGER &&
14287 phba->cfg_irq_chann == 1 &&
14288 phba->cfg_auto_imax &&
14289 fpeq->q_mode != LPFC_MAX_AUTO_EQ_DELAY &&
14290 phba->sli.sli_flag & LPFC_SLI_USE_EQDR)
14291 lpfc_sli4_mod_hba_eq_delay(phba, fpeq, LPFC_MAX_AUTO_EQ_DELAY);
b84daac9 14292
32517fc0
JS
14293 /* process and rearm the EQ */
14294 ecount = lpfc_sli4_process_eq(phba, fpeq);
4f774513
JS
14295
14296 if (unlikely(ecount == 0)) {
b84daac9 14297 fpeq->EQ_no_entry++;
4f774513
JS
14298 if (phba->intr_type == MSIX)
14299 /* MSI-X treated interrupt served as no EQ share INT */
14300 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14301 "0358 MSI-X interrupt with no EQE\n");
14302 else
14303 /* Non MSI-X treated on interrupt as EQ share INT */
14304 return IRQ_NONE;
14305 }
14306
14307 return IRQ_HANDLED;
14308} /* lpfc_sli4_fp_intr_handler */
14309
14310/**
14311 * lpfc_sli4_intr_handler - Device-level interrupt handler for SLI-4 device
14312 * @irq: Interrupt number.
14313 * @dev_id: The device context pointer.
14314 *
14315 * This function is the device-level interrupt handler to device with SLI-4
14316 * interface spec, called from the PCI layer when either MSI or Pin-IRQ
14317 * interrupt mode is enabled and there is an event in the HBA which requires
14318 * driver attention. This function invokes the slow-path interrupt attention
14319 * handling function and fast-path interrupt attention handling function in
14320 * turn to process the relevant HBA attention events. This function is called
14321 * without any lock held. It gets the hbalock to access and update SLI data
14322 * structures.
14323 *
14324 * This function returns IRQ_HANDLED when interrupt is handled, else it
14325 * returns IRQ_NONE.
14326 **/
14327irqreturn_t
14328lpfc_sli4_intr_handler(int irq, void *dev_id)
14329{
14330 struct lpfc_hba *phba;
67d12733
JS
14331 irqreturn_t hba_irq_rc;
14332 bool hba_handled = false;
895427bd 14333 int qidx;
4f774513
JS
14334
14335 /* Get the driver's phba structure from the dev_id */
14336 phba = (struct lpfc_hba *)dev_id;
14337
14338 if (unlikely(!phba))
14339 return IRQ_NONE;
14340
4f774513
JS
14341 /*
14342 * Invoke fast-path host attention interrupt handling as appropriate.
14343 */
6a828b0f 14344 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
67d12733 14345 hba_irq_rc = lpfc_sli4_hba_intr_handler(irq,
895427bd 14346 &phba->sli4_hba.hba_eq_hdl[qidx]);
67d12733
JS
14347 if (hba_irq_rc == IRQ_HANDLED)
14348 hba_handled |= true;
4f774513
JS
14349 }
14350
67d12733 14351 return (hba_handled == true) ? IRQ_HANDLED : IRQ_NONE;
4f774513
JS
14352} /* lpfc_sli4_intr_handler */
14353
14354/**
14355 * lpfc_sli4_queue_free - free a queue structure and associated memory
14356 * @queue: The queue structure to free.
14357 *
b595076a 14358 * This function frees a queue structure and the DMAable memory used for
4f774513
JS
14359 * the host resident queue. This function must be called after destroying the
14360 * queue on the HBA.
14361 **/
14362void
14363lpfc_sli4_queue_free(struct lpfc_queue *queue)
14364{
14365 struct lpfc_dmabuf *dmabuf;
14366
14367 if (!queue)
14368 return;
14369
4645f7b5
JS
14370 if (!list_empty(&queue->wq_list))
14371 list_del(&queue->wq_list);
14372
4f774513
JS
14373 while (!list_empty(&queue->page_list)) {
14374 list_remove_head(&queue->page_list, dmabuf, struct lpfc_dmabuf,
14375 list);
81b96eda 14376 dma_free_coherent(&queue->phba->pcidev->dev, queue->page_size,
4f774513
JS
14377 dmabuf->virt, dmabuf->phys);
14378 kfree(dmabuf);
14379 }
895427bd
JS
14380 if (queue->rqbp) {
14381 lpfc_free_rq_buffer(queue->phba, queue);
14382 kfree(queue->rqbp);
14383 }
d1f525aa 14384
32517fc0
JS
14385 if (!list_empty(&queue->cpu_list))
14386 list_del(&queue->cpu_list);
14387
4f774513
JS
14388 kfree(queue);
14389 return;
14390}
14391
14392/**
14393 * lpfc_sli4_queue_alloc - Allocate and initialize a queue structure
14394 * @phba: The HBA that this queue is being created on.
81b96eda 14395 * @page_size: The size of a queue page
4f774513
JS
14396 * @entry_size: The size of each queue entry for this queue.
14397 * @entry count: The number of entries that this queue will handle.
c1a21ebc 14398 * @cpu: The cpu that will primarily utilize this queue.
4f774513
JS
14399 *
14400 * This function allocates a queue structure and the DMAable memory used for
14401 * the host resident queue. This function must be called before creating the
14402 * queue on the HBA.
14403 **/
14404struct lpfc_queue *
81b96eda 14405lpfc_sli4_queue_alloc(struct lpfc_hba *phba, uint32_t page_size,
c1a21ebc 14406 uint32_t entry_size, uint32_t entry_count, int cpu)
4f774513
JS
14407{
14408 struct lpfc_queue *queue;
14409 struct lpfc_dmabuf *dmabuf;
cb5172ea 14410 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
9afbee3d 14411 uint16_t x, pgcnt;
4f774513 14412
cb5172ea 14413 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 14414 hw_page_size = page_size;
cb5172ea 14415
9afbee3d
JS
14416 pgcnt = ALIGN(entry_size * entry_count, hw_page_size) / hw_page_size;
14417
14418 /* If needed, Adjust page count to match the max the adapter supports */
14419 if (pgcnt > phba->sli4_hba.pc_sli4_params.wqpcnt)
14420 pgcnt = phba->sli4_hba.pc_sli4_params.wqpcnt;
14421
c1a21ebc
JS
14422 queue = kzalloc_node(sizeof(*queue) + (sizeof(void *) * pgcnt),
14423 GFP_KERNEL, cpu_to_node(cpu));
4f774513
JS
14424 if (!queue)
14425 return NULL;
895427bd 14426
4f774513 14427 INIT_LIST_HEAD(&queue->list);
895427bd 14428 INIT_LIST_HEAD(&queue->wq_list);
6e8e1c14 14429 INIT_LIST_HEAD(&queue->wqfull_list);
4f774513
JS
14430 INIT_LIST_HEAD(&queue->page_list);
14431 INIT_LIST_HEAD(&queue->child_list);
32517fc0 14432 INIT_LIST_HEAD(&queue->cpu_list);
81b96eda
JS
14433
14434 /* Set queue parameters now. If the system cannot provide memory
14435 * resources, the free routine needs to know what was allocated.
14436 */
9afbee3d
JS
14437 queue->page_count = pgcnt;
14438 queue->q_pgs = (void **)&queue[1];
14439 queue->entry_cnt_per_pg = hw_page_size / entry_size;
81b96eda
JS
14440 queue->entry_size = entry_size;
14441 queue->entry_count = entry_count;
14442 queue->page_size = hw_page_size;
14443 queue->phba = phba;
14444
9afbee3d 14445 for (x = 0; x < queue->page_count; x++) {
c1a21ebc
JS
14446 dmabuf = kzalloc_node(sizeof(*dmabuf), GFP_KERNEL,
14447 dev_to_node(&phba->pcidev->dev));
4f774513
JS
14448 if (!dmabuf)
14449 goto out_fail;
750afb08
LC
14450 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
14451 hw_page_size, &dmabuf->phys,
14452 GFP_KERNEL);
4f774513
JS
14453 if (!dmabuf->virt) {
14454 kfree(dmabuf);
14455 goto out_fail;
14456 }
14457 dmabuf->buffer_tag = x;
14458 list_add_tail(&dmabuf->list, &queue->page_list);
9afbee3d
JS
14459 /* use lpfc_sli4_qe to index a paritcular entry in this page */
14460 queue->q_pgs[x] = dmabuf->virt;
4f774513 14461 }
f485c18d
DK
14462 INIT_WORK(&queue->irqwork, lpfc_sli4_hba_process_cq);
14463 INIT_WORK(&queue->spwork, lpfc_sli4_sp_process_cq);
32517fc0
JS
14464 INIT_DELAYED_WORK(&queue->sched_irqwork, lpfc_sli4_dly_hba_process_cq);
14465 INIT_DELAYED_WORK(&queue->sched_spwork, lpfc_sli4_dly_sp_process_cq);
4f774513 14466
32517fc0 14467 /* notify_interval will be set during q creation */
64eb4dcb 14468
4f774513
JS
14469 return queue;
14470out_fail:
14471 lpfc_sli4_queue_free(queue);
14472 return NULL;
14473}
14474
962bc51b
JS
14475/**
14476 * lpfc_dual_chute_pci_bar_map - Map pci base address register to host memory
14477 * @phba: HBA structure that indicates port to create a queue on.
14478 * @pci_barset: PCI BAR set flag.
14479 *
14480 * This function shall perform iomap of the specified PCI BAR address to host
14481 * memory address if not already done so and return it. The returned host
14482 * memory address can be NULL.
14483 */
14484static void __iomem *
14485lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset)
14486{
962bc51b
JS
14487 if (!phba->pcidev)
14488 return NULL;
962bc51b
JS
14489
14490 switch (pci_barset) {
14491 case WQ_PCI_BAR_0_AND_1:
962bc51b
JS
14492 return phba->pci_bar0_memmap_p;
14493 case WQ_PCI_BAR_2_AND_3:
962bc51b
JS
14494 return phba->pci_bar2_memmap_p;
14495 case WQ_PCI_BAR_4_AND_5:
962bc51b
JS
14496 return phba->pci_bar4_memmap_p;
14497 default:
14498 break;
14499 }
14500 return NULL;
14501}
14502
173edbb2 14503/**
cb733e35
JS
14504 * lpfc_modify_hba_eq_delay - Modify Delay Multiplier on EQs
14505 * @phba: HBA structure that EQs are on.
14506 * @startq: The starting EQ index to modify
14507 * @numq: The number of EQs (consecutive indexes) to modify
14508 * @usdelay: amount of delay
173edbb2 14509 *
cb733e35
JS
14510 * This function revises the EQ delay on 1 or more EQs. The EQ delay
14511 * is set either by writing to a register (if supported by the SLI Port)
14512 * or by mailbox command. The mailbox command allows several EQs to be
14513 * updated at once.
173edbb2 14514 *
cb733e35
JS
14515 * The @phba struct is used to send a mailbox command to HBA. The @startq
14516 * is used to get the starting EQ index to change. The @numq value is
14517 * used to specify how many consecutive EQ indexes, starting at EQ index,
14518 * are to be changed. This function is asynchronous and will wait for any
14519 * mailbox commands to finish before returning.
173edbb2 14520 *
cb733e35
JS
14521 * On success this function will return a zero. If unable to allocate
14522 * enough memory this function will return -ENOMEM. If a mailbox command
14523 * fails this function will return -ENXIO. Note: on ENXIO, some EQs may
14524 * have had their delay multipler changed.
173edbb2 14525 **/
cb733e35 14526void
0cf07f84 14527lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
cb733e35 14528 uint32_t numq, uint32_t usdelay)
173edbb2
JS
14529{
14530 struct lpfc_mbx_modify_eq_delay *eq_delay;
14531 LPFC_MBOXQ_t *mbox;
14532 struct lpfc_queue *eq;
cb733e35 14533 int cnt = 0, rc, length;
173edbb2 14534 uint32_t shdr_status, shdr_add_status;
cb733e35 14535 uint32_t dmult;
895427bd 14536 int qidx;
173edbb2 14537 union lpfc_sli4_cfg_shdr *shdr;
173edbb2 14538
6a828b0f 14539 if (startq >= phba->cfg_irq_chann)
cb733e35
JS
14540 return;
14541
14542 if (usdelay > 0xFFFF) {
14543 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP | LOG_NVME,
14544 "6429 usdelay %d too large. Scaled down to "
14545 "0xFFFF.\n", usdelay);
14546 usdelay = 0xFFFF;
14547 }
14548
14549 /* set values by EQ_DELAY register if supported */
14550 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
14551 for (qidx = startq; qidx < phba->cfg_irq_chann; qidx++) {
657add4e 14552 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
cb733e35
JS
14553 if (!eq)
14554 continue;
14555
32517fc0 14556 lpfc_sli4_mod_hba_eq_delay(phba, eq, usdelay);
cb733e35
JS
14557
14558 if (++cnt >= numq)
14559 break;
14560 }
cb733e35
JS
14561 return;
14562 }
14563
14564 /* Otherwise, set values by mailbox cmd */
173edbb2
JS
14565
14566 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
cb733e35
JS
14567 if (!mbox) {
14568 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_FCP | LOG_NVME,
14569 "6428 Failed allocating mailbox cmd buffer."
14570 " EQ delay was not set.\n");
14571 return;
14572 }
173edbb2
JS
14573 length = (sizeof(struct lpfc_mbx_modify_eq_delay) -
14574 sizeof(struct lpfc_sli4_cfg_mhdr));
14575 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14576 LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY,
14577 length, LPFC_SLI4_MBX_EMBED);
14578 eq_delay = &mbox->u.mqe.un.eq_delay;
14579
14580 /* Calculate delay multiper from maximum interrupt per second */
cb733e35
JS
14581 dmult = (usdelay * LPFC_DMULT_CONST) / LPFC_SEC_TO_USEC;
14582 if (dmult)
14583 dmult--;
0cf07f84
JS
14584 if (dmult > LPFC_DMULT_MAX)
14585 dmult = LPFC_DMULT_MAX;
173edbb2 14586
6a828b0f 14587 for (qidx = startq; qidx < phba->cfg_irq_chann; qidx++) {
657add4e 14588 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
173edbb2
JS
14589 if (!eq)
14590 continue;
cb733e35 14591 eq->q_mode = usdelay;
173edbb2
JS
14592 eq_delay->u.request.eq[cnt].eq_id = eq->queue_id;
14593 eq_delay->u.request.eq[cnt].phase = 0;
14594 eq_delay->u.request.eq[cnt].delay_multi = dmult;
0cf07f84 14595
cb733e35 14596 if (++cnt >= numq)
173edbb2
JS
14597 break;
14598 }
14599 eq_delay->u.request.num_eq = cnt;
14600
14601 mbox->vport = phba->pport;
14602 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
14603 mbox->ctx_buf = NULL;
14604 mbox->ctx_ndlp = NULL;
173edbb2
JS
14605 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14606 shdr = (union lpfc_sli4_cfg_shdr *) &eq_delay->header.cfg_shdr;
14607 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14608 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14609 if (shdr_status || shdr_add_status || rc) {
14610 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14611 "2512 MODIFY_EQ_DELAY mailbox failed with "
14612 "status x%x add_status x%x, mbx status x%x\n",
14613 shdr_status, shdr_add_status, rc);
173edbb2
JS
14614 }
14615 mempool_free(mbox, phba->mbox_mem_pool);
cb733e35 14616 return;
173edbb2
JS
14617}
14618
4f774513
JS
14619/**
14620 * lpfc_eq_create - Create an Event Queue on the HBA
14621 * @phba: HBA structure that indicates port to create a queue on.
14622 * @eq: The queue structure to use to create the event queue.
14623 * @imax: The maximum interrupt per second limit.
14624 *
14625 * This function creates an event queue, as detailed in @eq, on a port,
14626 * described by @phba by sending an EQ_CREATE mailbox command to the HBA.
14627 *
14628 * The @phba struct is used to send mailbox command to HBA. The @eq struct
14629 * is used to get the entry count and entry size that are necessary to
14630 * determine the number of pages to allocate and use for this queue. This
14631 * function will send the EQ_CREATE mailbox command to the HBA to setup the
14632 * event queue. This function is asynchronous and will wait for the mailbox
14633 * command to finish before continuing.
14634 *
14635 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14636 * memory this function will return -ENOMEM. If the queue create mailbox command
14637 * fails this function will return -ENXIO.
4f774513 14638 **/
a2fc4aef 14639int
ee02006b 14640lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
4f774513
JS
14641{
14642 struct lpfc_mbx_eq_create *eq_create;
14643 LPFC_MBOXQ_t *mbox;
14644 int rc, length, status = 0;
14645 struct lpfc_dmabuf *dmabuf;
14646 uint32_t shdr_status, shdr_add_status;
14647 union lpfc_sli4_cfg_shdr *shdr;
14648 uint16_t dmult;
49198b37
JS
14649 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14650
2e90f4b5
JS
14651 /* sanity check on queue memory */
14652 if (!eq)
14653 return -ENODEV;
49198b37
JS
14654 if (!phba->sli4_hba.pc_sli4_params.supported)
14655 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
14656
14657 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14658 if (!mbox)
14659 return -ENOMEM;
14660 length = (sizeof(struct lpfc_mbx_eq_create) -
14661 sizeof(struct lpfc_sli4_cfg_mhdr));
14662 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14663 LPFC_MBOX_OPCODE_EQ_CREATE,
14664 length, LPFC_SLI4_MBX_EMBED);
14665 eq_create = &mbox->u.mqe.un.eq_create;
7365f6fd 14666 shdr = (union lpfc_sli4_cfg_shdr *) &eq_create->header.cfg_shdr;
4f774513
JS
14667 bf_set(lpfc_mbx_eq_create_num_pages, &eq_create->u.request,
14668 eq->page_count);
14669 bf_set(lpfc_eq_context_size, &eq_create->u.request.context,
14670 LPFC_EQE_SIZE);
14671 bf_set(lpfc_eq_context_valid, &eq_create->u.request.context, 1);
7365f6fd
JS
14672
14673 /* Use version 2 of CREATE_EQ if eqav is set */
14674 if (phba->sli4_hba.pc_sli4_params.eqav) {
14675 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14676 LPFC_Q_CREATE_VERSION_2);
14677 bf_set(lpfc_eq_context_autovalid, &eq_create->u.request.context,
14678 phba->sli4_hba.pc_sli4_params.eqav);
14679 }
14680
2c9c5a00
JS
14681 /* don't setup delay multiplier using EQ_CREATE */
14682 dmult = 0;
4f774513
JS
14683 bf_set(lpfc_eq_context_delay_multi, &eq_create->u.request.context,
14684 dmult);
14685 switch (eq->entry_count) {
14686 default:
14687 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14688 "0360 Unsupported EQ count. (%d)\n",
14689 eq->entry_count);
04d210c9
JS
14690 if (eq->entry_count < 256) {
14691 status = -EINVAL;
14692 goto out;
14693 }
5bd5f66c 14694 /* fall through - otherwise default to smallest count */
4f774513
JS
14695 case 256:
14696 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14697 LPFC_EQ_CNT_256);
14698 break;
14699 case 512:
14700 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14701 LPFC_EQ_CNT_512);
14702 break;
14703 case 1024:
14704 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14705 LPFC_EQ_CNT_1024);
14706 break;
14707 case 2048:
14708 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14709 LPFC_EQ_CNT_2048);
14710 break;
14711 case 4096:
14712 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14713 LPFC_EQ_CNT_4096);
14714 break;
14715 }
14716 list_for_each_entry(dmabuf, &eq->page_list, list) {
49198b37 14717 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
14718 eq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
14719 putPaddrLow(dmabuf->phys);
14720 eq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
14721 putPaddrHigh(dmabuf->phys);
14722 }
14723 mbox->vport = phba->pport;
14724 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
14725 mbox->ctx_buf = NULL;
14726 mbox->ctx_ndlp = NULL;
4f774513 14727 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
4f774513
JS
14728 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14729 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14730 if (shdr_status || shdr_add_status || rc) {
14731 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14732 "2500 EQ_CREATE mailbox failed with "
14733 "status x%x add_status x%x, mbx status x%x\n",
14734 shdr_status, shdr_add_status, rc);
14735 status = -ENXIO;
14736 }
14737 eq->type = LPFC_EQ;
14738 eq->subtype = LPFC_NONE;
14739 eq->queue_id = bf_get(lpfc_mbx_eq_create_q_id, &eq_create->u.response);
14740 if (eq->queue_id == 0xFFFF)
14741 status = -ENXIO;
14742 eq->host_index = 0;
32517fc0
JS
14743 eq->notify_interval = LPFC_EQ_NOTIFY_INTRVL;
14744 eq->max_proc_limit = LPFC_EQ_MAX_PROC_LIMIT;
04d210c9 14745out:
8fa38513 14746 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
14747 return status;
14748}
14749
14750/**
14751 * lpfc_cq_create - Create a Completion Queue on the HBA
14752 * @phba: HBA structure that indicates port to create a queue on.
14753 * @cq: The queue structure to use to create the completion queue.
14754 * @eq: The event queue to bind this completion queue to.
14755 *
14756 * This function creates a completion queue, as detailed in @wq, on a port,
14757 * described by @phba by sending a CQ_CREATE mailbox command to the HBA.
14758 *
14759 * The @phba struct is used to send mailbox command to HBA. The @cq struct
14760 * is used to get the entry count and entry size that are necessary to
14761 * determine the number of pages to allocate and use for this queue. The @eq
14762 * is used to indicate which event queue to bind this completion queue to. This
14763 * function will send the CQ_CREATE mailbox command to the HBA to setup the
14764 * completion queue. This function is asynchronous and will wait for the mailbox
14765 * command to finish before continuing.
14766 *
14767 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14768 * memory this function will return -ENOMEM. If the queue create mailbox command
14769 * fails this function will return -ENXIO.
4f774513 14770 **/
a2fc4aef 14771int
4f774513
JS
14772lpfc_cq_create(struct lpfc_hba *phba, struct lpfc_queue *cq,
14773 struct lpfc_queue *eq, uint32_t type, uint32_t subtype)
14774{
14775 struct lpfc_mbx_cq_create *cq_create;
14776 struct lpfc_dmabuf *dmabuf;
14777 LPFC_MBOXQ_t *mbox;
14778 int rc, length, status = 0;
14779 uint32_t shdr_status, shdr_add_status;
14780 union lpfc_sli4_cfg_shdr *shdr;
49198b37 14781
2e90f4b5
JS
14782 /* sanity check on queue memory */
14783 if (!cq || !eq)
14784 return -ENODEV;
49198b37 14785
4f774513
JS
14786 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14787 if (!mbox)
14788 return -ENOMEM;
14789 length = (sizeof(struct lpfc_mbx_cq_create) -
14790 sizeof(struct lpfc_sli4_cfg_mhdr));
14791 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14792 LPFC_MBOX_OPCODE_CQ_CREATE,
14793 length, LPFC_SLI4_MBX_EMBED);
14794 cq_create = &mbox->u.mqe.un.cq_create;
5a6f133e 14795 shdr = (union lpfc_sli4_cfg_shdr *) &cq_create->header.cfg_shdr;
4f774513
JS
14796 bf_set(lpfc_mbx_cq_create_num_pages, &cq_create->u.request,
14797 cq->page_count);
14798 bf_set(lpfc_cq_context_event, &cq_create->u.request.context, 1);
14799 bf_set(lpfc_cq_context_valid, &cq_create->u.request.context, 1);
5a6f133e
JS
14800 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14801 phba->sli4_hba.pc_sli4_params.cqv);
14802 if (phba->sli4_hba.pc_sli4_params.cqv == LPFC_Q_CREATE_VERSION_2) {
81b96eda
JS
14803 bf_set(lpfc_mbx_cq_create_page_size, &cq_create->u.request,
14804 (cq->page_size / SLI4_PAGE_SIZE));
5a6f133e
JS
14805 bf_set(lpfc_cq_eq_id_2, &cq_create->u.request.context,
14806 eq->queue_id);
7365f6fd
JS
14807 bf_set(lpfc_cq_context_autovalid, &cq_create->u.request.context,
14808 phba->sli4_hba.pc_sli4_params.cqav);
5a6f133e
JS
14809 } else {
14810 bf_set(lpfc_cq_eq_id, &cq_create->u.request.context,
14811 eq->queue_id);
14812 }
4f774513 14813 switch (cq->entry_count) {
81b96eda
JS
14814 case 2048:
14815 case 4096:
14816 if (phba->sli4_hba.pc_sli4_params.cqv ==
14817 LPFC_Q_CREATE_VERSION_2) {
14818 cq_create->u.request.context.lpfc_cq_context_count =
14819 cq->entry_count;
14820 bf_set(lpfc_cq_context_count,
14821 &cq_create->u.request.context,
14822 LPFC_CQ_CNT_WORD7);
14823 break;
14824 }
5bd5f66c 14825 /* fall through */
4f774513
JS
14826 default:
14827 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2ea259ee 14828 "0361 Unsupported CQ count: "
64eb4dcb 14829 "entry cnt %d sz %d pg cnt %d\n",
2ea259ee 14830 cq->entry_count, cq->entry_size,
64eb4dcb 14831 cq->page_count);
4f4c1863
JS
14832 if (cq->entry_count < 256) {
14833 status = -EINVAL;
14834 goto out;
14835 }
5bd5f66c 14836 /* fall through - otherwise default to smallest count */
4f774513
JS
14837 case 256:
14838 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14839 LPFC_CQ_CNT_256);
14840 break;
14841 case 512:
14842 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14843 LPFC_CQ_CNT_512);
14844 break;
14845 case 1024:
14846 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14847 LPFC_CQ_CNT_1024);
14848 break;
14849 }
14850 list_for_each_entry(dmabuf, &cq->page_list, list) {
81b96eda 14851 memset(dmabuf->virt, 0, cq->page_size);
4f774513
JS
14852 cq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
14853 putPaddrLow(dmabuf->phys);
14854 cq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
14855 putPaddrHigh(dmabuf->phys);
14856 }
14857 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14858
14859 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
14860 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14861 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14862 if (shdr_status || shdr_add_status || rc) {
14863 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14864 "2501 CQ_CREATE mailbox failed with "
14865 "status x%x add_status x%x, mbx status x%x\n",
14866 shdr_status, shdr_add_status, rc);
14867 status = -ENXIO;
14868 goto out;
14869 }
14870 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
14871 if (cq->queue_id == 0xFFFF) {
14872 status = -ENXIO;
14873 goto out;
14874 }
14875 /* link the cq onto the parent eq child list */
14876 list_add_tail(&cq->list, &eq->child_list);
14877 /* Set up completion queue's type and subtype */
14878 cq->type = type;
14879 cq->subtype = subtype;
14880 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
2a622bfb 14881 cq->assoc_qid = eq->queue_id;
6a828b0f 14882 cq->assoc_qp = eq;
4f774513 14883 cq->host_index = 0;
32517fc0
JS
14884 cq->notify_interval = LPFC_CQ_NOTIFY_INTRVL;
14885 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit, cq->entry_count);
4f774513 14886
6a828b0f
JS
14887 if (cq->queue_id > phba->sli4_hba.cq_max)
14888 phba->sli4_hba.cq_max = cq->queue_id;
8fa38513
JS
14889out:
14890 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
14891 return status;
14892}
14893
2d7dbc4c
JS
14894/**
14895 * lpfc_cq_create_set - Create a set of Completion Queues on the HBA for MRQ
14896 * @phba: HBA structure that indicates port to create a queue on.
14897 * @cqp: The queue structure array to use to create the completion queues.
cdb42bec 14898 * @hdwq: The hardware queue array with the EQ to bind completion queues to.
2d7dbc4c
JS
14899 *
14900 * This function creates a set of completion queue, s to support MRQ
14901 * as detailed in @cqp, on a port,
14902 * described by @phba by sending a CREATE_CQ_SET mailbox command to the HBA.
14903 *
14904 * The @phba struct is used to send mailbox command to HBA. The @cq struct
14905 * is used to get the entry count and entry size that are necessary to
14906 * determine the number of pages to allocate and use for this queue. The @eq
14907 * is used to indicate which event queue to bind this completion queue to. This
14908 * function will send the CREATE_CQ_SET mailbox command to the HBA to setup the
14909 * completion queue. This function is asynchronous and will wait for the mailbox
14910 * command to finish before continuing.
14911 *
14912 * On success this function will return a zero. If unable to allocate enough
14913 * memory this function will return -ENOMEM. If the queue create mailbox command
14914 * fails this function will return -ENXIO.
14915 **/
14916int
14917lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
cdb42bec
JS
14918 struct lpfc_sli4_hdw_queue *hdwq, uint32_t type,
14919 uint32_t subtype)
2d7dbc4c
JS
14920{
14921 struct lpfc_queue *cq;
14922 struct lpfc_queue *eq;
14923 struct lpfc_mbx_cq_create_set *cq_set;
14924 struct lpfc_dmabuf *dmabuf;
14925 LPFC_MBOXQ_t *mbox;
14926 int rc, length, alloclen, status = 0;
14927 int cnt, idx, numcq, page_idx = 0;
14928 uint32_t shdr_status, shdr_add_status;
14929 union lpfc_sli4_cfg_shdr *shdr;
14930 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14931
14932 /* sanity check on queue memory */
14933 numcq = phba->cfg_nvmet_mrq;
cdb42bec 14934 if (!cqp || !hdwq || !numcq)
2d7dbc4c 14935 return -ENODEV;
2d7dbc4c
JS
14936
14937 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14938 if (!mbox)
14939 return -ENOMEM;
14940
14941 length = sizeof(struct lpfc_mbx_cq_create_set);
14942 length += ((numcq * cqp[0]->page_count) *
14943 sizeof(struct dma_address));
14944 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
14945 LPFC_MBOX_OPCODE_FCOE_CQ_CREATE_SET, length,
14946 LPFC_SLI4_MBX_NEMBED);
14947 if (alloclen < length) {
14948 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14949 "3098 Allocated DMA memory size (%d) is "
14950 "less than the requested DMA memory size "
14951 "(%d)\n", alloclen, length);
14952 status = -ENOMEM;
14953 goto out;
14954 }
14955 cq_set = mbox->sge_array->addr[0];
14956 shdr = (union lpfc_sli4_cfg_shdr *)&cq_set->cfg_shdr;
14957 bf_set(lpfc_mbox_hdr_version, &shdr->request, 0);
14958
14959 for (idx = 0; idx < numcq; idx++) {
14960 cq = cqp[idx];
cdb42bec 14961 eq = hdwq[idx].hba_eq;
2d7dbc4c
JS
14962 if (!cq || !eq) {
14963 status = -ENOMEM;
14964 goto out;
14965 }
81b96eda
JS
14966 if (!phba->sli4_hba.pc_sli4_params.supported)
14967 hw_page_size = cq->page_size;
2d7dbc4c
JS
14968
14969 switch (idx) {
14970 case 0:
14971 bf_set(lpfc_mbx_cq_create_set_page_size,
14972 &cq_set->u.request,
14973 (hw_page_size / SLI4_PAGE_SIZE));
14974 bf_set(lpfc_mbx_cq_create_set_num_pages,
14975 &cq_set->u.request, cq->page_count);
14976 bf_set(lpfc_mbx_cq_create_set_evt,
14977 &cq_set->u.request, 1);
14978 bf_set(lpfc_mbx_cq_create_set_valid,
14979 &cq_set->u.request, 1);
14980 bf_set(lpfc_mbx_cq_create_set_cqe_size,
14981 &cq_set->u.request, 0);
14982 bf_set(lpfc_mbx_cq_create_set_num_cq,
14983 &cq_set->u.request, numcq);
7365f6fd
JS
14984 bf_set(lpfc_mbx_cq_create_set_autovalid,
14985 &cq_set->u.request,
14986 phba->sli4_hba.pc_sli4_params.cqav);
2d7dbc4c 14987 switch (cq->entry_count) {
81b96eda
JS
14988 case 2048:
14989 case 4096:
14990 if (phba->sli4_hba.pc_sli4_params.cqv ==
14991 LPFC_Q_CREATE_VERSION_2) {
14992 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
14993 &cq_set->u.request,
14994 cq->entry_count);
14995 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
14996 &cq_set->u.request,
14997 LPFC_CQ_CNT_WORD7);
14998 break;
14999 }
5bd5f66c 15000 /* fall through */
2d7dbc4c
JS
15001 default:
15002 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15003 "3118 Bad CQ count. (%d)\n",
15004 cq->entry_count);
15005 if (cq->entry_count < 256) {
15006 status = -EINVAL;
15007 goto out;
15008 }
5bd5f66c 15009 /* fall through - otherwise default to smallest */
2d7dbc4c
JS
15010 case 256:
15011 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15012 &cq_set->u.request, LPFC_CQ_CNT_256);
15013 break;
15014 case 512:
15015 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15016 &cq_set->u.request, LPFC_CQ_CNT_512);
15017 break;
15018 case 1024:
15019 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15020 &cq_set->u.request, LPFC_CQ_CNT_1024);
15021 break;
15022 }
15023 bf_set(lpfc_mbx_cq_create_set_eq_id0,
15024 &cq_set->u.request, eq->queue_id);
15025 break;
15026 case 1:
15027 bf_set(lpfc_mbx_cq_create_set_eq_id1,
15028 &cq_set->u.request, eq->queue_id);
15029 break;
15030 case 2:
15031 bf_set(lpfc_mbx_cq_create_set_eq_id2,
15032 &cq_set->u.request, eq->queue_id);
15033 break;
15034 case 3:
15035 bf_set(lpfc_mbx_cq_create_set_eq_id3,
15036 &cq_set->u.request, eq->queue_id);
15037 break;
15038 case 4:
15039 bf_set(lpfc_mbx_cq_create_set_eq_id4,
15040 &cq_set->u.request, eq->queue_id);
15041 break;
15042 case 5:
15043 bf_set(lpfc_mbx_cq_create_set_eq_id5,
15044 &cq_set->u.request, eq->queue_id);
15045 break;
15046 case 6:
15047 bf_set(lpfc_mbx_cq_create_set_eq_id6,
15048 &cq_set->u.request, eq->queue_id);
15049 break;
15050 case 7:
15051 bf_set(lpfc_mbx_cq_create_set_eq_id7,
15052 &cq_set->u.request, eq->queue_id);
15053 break;
15054 case 8:
15055 bf_set(lpfc_mbx_cq_create_set_eq_id8,
15056 &cq_set->u.request, eq->queue_id);
15057 break;
15058 case 9:
15059 bf_set(lpfc_mbx_cq_create_set_eq_id9,
15060 &cq_set->u.request, eq->queue_id);
15061 break;
15062 case 10:
15063 bf_set(lpfc_mbx_cq_create_set_eq_id10,
15064 &cq_set->u.request, eq->queue_id);
15065 break;
15066 case 11:
15067 bf_set(lpfc_mbx_cq_create_set_eq_id11,
15068 &cq_set->u.request, eq->queue_id);
15069 break;
15070 case 12:
15071 bf_set(lpfc_mbx_cq_create_set_eq_id12,
15072 &cq_set->u.request, eq->queue_id);
15073 break;
15074 case 13:
15075 bf_set(lpfc_mbx_cq_create_set_eq_id13,
15076 &cq_set->u.request, eq->queue_id);
15077 break;
15078 case 14:
15079 bf_set(lpfc_mbx_cq_create_set_eq_id14,
15080 &cq_set->u.request, eq->queue_id);
15081 break;
15082 case 15:
15083 bf_set(lpfc_mbx_cq_create_set_eq_id15,
15084 &cq_set->u.request, eq->queue_id);
15085 break;
15086 }
15087
15088 /* link the cq onto the parent eq child list */
15089 list_add_tail(&cq->list, &eq->child_list);
15090 /* Set up completion queue's type and subtype */
15091 cq->type = type;
15092 cq->subtype = subtype;
15093 cq->assoc_qid = eq->queue_id;
6a828b0f 15094 cq->assoc_qp = eq;
2d7dbc4c 15095 cq->host_index = 0;
32517fc0
JS
15096 cq->notify_interval = LPFC_CQ_NOTIFY_INTRVL;
15097 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit,
15098 cq->entry_count);
81b96eda 15099 cq->chann = idx;
2d7dbc4c
JS
15100
15101 rc = 0;
15102 list_for_each_entry(dmabuf, &cq->page_list, list) {
15103 memset(dmabuf->virt, 0, hw_page_size);
15104 cnt = page_idx + dmabuf->buffer_tag;
15105 cq_set->u.request.page[cnt].addr_lo =
15106 putPaddrLow(dmabuf->phys);
15107 cq_set->u.request.page[cnt].addr_hi =
15108 putPaddrHigh(dmabuf->phys);
15109 rc++;
15110 }
15111 page_idx += rc;
15112 }
15113
15114 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15115
15116 /* The IOCTL status is embedded in the mailbox subheader. */
15117 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15118 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15119 if (shdr_status || shdr_add_status || rc) {
15120 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15121 "3119 CQ_CREATE_SET mailbox failed with "
15122 "status x%x add_status x%x, mbx status x%x\n",
15123 shdr_status, shdr_add_status, rc);
15124 status = -ENXIO;
15125 goto out;
15126 }
15127 rc = bf_get(lpfc_mbx_cq_create_set_base_id, &cq_set->u.response);
15128 if (rc == 0xFFFF) {
15129 status = -ENXIO;
15130 goto out;
15131 }
15132
15133 for (idx = 0; idx < numcq; idx++) {
15134 cq = cqp[idx];
15135 cq->queue_id = rc + idx;
6a828b0f
JS
15136 if (cq->queue_id > phba->sli4_hba.cq_max)
15137 phba->sli4_hba.cq_max = cq->queue_id;
2d7dbc4c
JS
15138 }
15139
15140out:
15141 lpfc_sli4_mbox_cmd_free(phba, mbox);
15142 return status;
15143}
15144
b19a061a
JS
15145/**
15146 * lpfc_mq_create_fb_init - Send MCC_CREATE without async events registration
15147 * @phba: HBA structure that indicates port to create a queue on.
15148 * @mq: The queue structure to use to create the mailbox queue.
15149 * @mbox: An allocated pointer to type LPFC_MBOXQ_t
15150 * @cq: The completion queue to associate with this cq.
15151 *
15152 * This function provides failback (fb) functionality when the
15153 * mq_create_ext fails on older FW generations. It's purpose is identical
15154 * to mq_create_ext otherwise.
15155 *
15156 * This routine cannot fail as all attributes were previously accessed and
15157 * initialized in mq_create_ext.
15158 **/
15159static void
15160lpfc_mq_create_fb_init(struct lpfc_hba *phba, struct lpfc_queue *mq,
15161 LPFC_MBOXQ_t *mbox, struct lpfc_queue *cq)
15162{
15163 struct lpfc_mbx_mq_create *mq_create;
15164 struct lpfc_dmabuf *dmabuf;
15165 int length;
15166
15167 length = (sizeof(struct lpfc_mbx_mq_create) -
15168 sizeof(struct lpfc_sli4_cfg_mhdr));
15169 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15170 LPFC_MBOX_OPCODE_MQ_CREATE,
15171 length, LPFC_SLI4_MBX_EMBED);
15172 mq_create = &mbox->u.mqe.un.mq_create;
15173 bf_set(lpfc_mbx_mq_create_num_pages, &mq_create->u.request,
15174 mq->page_count);
15175 bf_set(lpfc_mq_context_cq_id, &mq_create->u.request.context,
15176 cq->queue_id);
15177 bf_set(lpfc_mq_context_valid, &mq_create->u.request.context, 1);
15178 switch (mq->entry_count) {
15179 case 16:
5a6f133e
JS
15180 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15181 LPFC_MQ_RING_SIZE_16);
b19a061a
JS
15182 break;
15183 case 32:
5a6f133e
JS
15184 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15185 LPFC_MQ_RING_SIZE_32);
b19a061a
JS
15186 break;
15187 case 64:
5a6f133e
JS
15188 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15189 LPFC_MQ_RING_SIZE_64);
b19a061a
JS
15190 break;
15191 case 128:
5a6f133e
JS
15192 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15193 LPFC_MQ_RING_SIZE_128);
b19a061a
JS
15194 break;
15195 }
15196 list_for_each_entry(dmabuf, &mq->page_list, list) {
15197 mq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15198 putPaddrLow(dmabuf->phys);
15199 mq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15200 putPaddrHigh(dmabuf->phys);
15201 }
15202}
15203
04c68496
JS
15204/**
15205 * lpfc_mq_create - Create a mailbox Queue on the HBA
15206 * @phba: HBA structure that indicates port to create a queue on.
15207 * @mq: The queue structure to use to create the mailbox queue.
b19a061a
JS
15208 * @cq: The completion queue to associate with this cq.
15209 * @subtype: The queue's subtype.
04c68496
JS
15210 *
15211 * This function creates a mailbox queue, as detailed in @mq, on a port,
15212 * described by @phba by sending a MQ_CREATE mailbox command to the HBA.
15213 *
15214 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15215 * is used to get the entry count and entry size that are necessary to
15216 * determine the number of pages to allocate and use for this queue. This
15217 * function will send the MQ_CREATE mailbox command to the HBA to setup the
15218 * mailbox queue. This function is asynchronous and will wait for the mailbox
15219 * command to finish before continuing.
15220 *
15221 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15222 * memory this function will return -ENOMEM. If the queue create mailbox command
15223 * fails this function will return -ENXIO.
04c68496 15224 **/
b19a061a 15225int32_t
04c68496
JS
15226lpfc_mq_create(struct lpfc_hba *phba, struct lpfc_queue *mq,
15227 struct lpfc_queue *cq, uint32_t subtype)
15228{
15229 struct lpfc_mbx_mq_create *mq_create;
b19a061a 15230 struct lpfc_mbx_mq_create_ext *mq_create_ext;
04c68496
JS
15231 struct lpfc_dmabuf *dmabuf;
15232 LPFC_MBOXQ_t *mbox;
15233 int rc, length, status = 0;
15234 uint32_t shdr_status, shdr_add_status;
15235 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15236 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
04c68496 15237
2e90f4b5
JS
15238 /* sanity check on queue memory */
15239 if (!mq || !cq)
15240 return -ENODEV;
49198b37
JS
15241 if (!phba->sli4_hba.pc_sli4_params.supported)
15242 hw_page_size = SLI4_PAGE_SIZE;
b19a061a 15243
04c68496
JS
15244 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15245 if (!mbox)
15246 return -ENOMEM;
b19a061a 15247 length = (sizeof(struct lpfc_mbx_mq_create_ext) -
04c68496
JS
15248 sizeof(struct lpfc_sli4_cfg_mhdr));
15249 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
b19a061a 15250 LPFC_MBOX_OPCODE_MQ_CREATE_EXT,
04c68496 15251 length, LPFC_SLI4_MBX_EMBED);
b19a061a
JS
15252
15253 mq_create_ext = &mbox->u.mqe.un.mq_create_ext;
5a6f133e 15254 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create_ext->header.cfg_shdr;
70f3c073
JS
15255 bf_set(lpfc_mbx_mq_create_ext_num_pages,
15256 &mq_create_ext->u.request, mq->page_count);
15257 bf_set(lpfc_mbx_mq_create_ext_async_evt_link,
15258 &mq_create_ext->u.request, 1);
15259 bf_set(lpfc_mbx_mq_create_ext_async_evt_fip,
b19a061a
JS
15260 &mq_create_ext->u.request, 1);
15261 bf_set(lpfc_mbx_mq_create_ext_async_evt_group5,
15262 &mq_create_ext->u.request, 1);
70f3c073
JS
15263 bf_set(lpfc_mbx_mq_create_ext_async_evt_fc,
15264 &mq_create_ext->u.request, 1);
15265 bf_set(lpfc_mbx_mq_create_ext_async_evt_sli,
15266 &mq_create_ext->u.request, 1);
b19a061a 15267 bf_set(lpfc_mq_context_valid, &mq_create_ext->u.request.context, 1);
5a6f133e
JS
15268 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15269 phba->sli4_hba.pc_sli4_params.mqv);
15270 if (phba->sli4_hba.pc_sli4_params.mqv == LPFC_Q_CREATE_VERSION_1)
15271 bf_set(lpfc_mbx_mq_create_ext_cq_id, &mq_create_ext->u.request,
15272 cq->queue_id);
15273 else
15274 bf_set(lpfc_mq_context_cq_id, &mq_create_ext->u.request.context,
15275 cq->queue_id);
04c68496
JS
15276 switch (mq->entry_count) {
15277 default:
15278 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15279 "0362 Unsupported MQ count. (%d)\n",
15280 mq->entry_count);
4f4c1863
JS
15281 if (mq->entry_count < 16) {
15282 status = -EINVAL;
15283 goto out;
15284 }
5bd5f66c 15285 /* fall through - otherwise default to smallest count */
04c68496 15286 case 16:
5a6f133e
JS
15287 bf_set(lpfc_mq_context_ring_size,
15288 &mq_create_ext->u.request.context,
15289 LPFC_MQ_RING_SIZE_16);
04c68496
JS
15290 break;
15291 case 32:
5a6f133e
JS
15292 bf_set(lpfc_mq_context_ring_size,
15293 &mq_create_ext->u.request.context,
15294 LPFC_MQ_RING_SIZE_32);
04c68496
JS
15295 break;
15296 case 64:
5a6f133e
JS
15297 bf_set(lpfc_mq_context_ring_size,
15298 &mq_create_ext->u.request.context,
15299 LPFC_MQ_RING_SIZE_64);
04c68496
JS
15300 break;
15301 case 128:
5a6f133e
JS
15302 bf_set(lpfc_mq_context_ring_size,
15303 &mq_create_ext->u.request.context,
15304 LPFC_MQ_RING_SIZE_128);
04c68496
JS
15305 break;
15306 }
15307 list_for_each_entry(dmabuf, &mq->page_list, list) {
49198b37 15308 memset(dmabuf->virt, 0, hw_page_size);
b19a061a 15309 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_lo =
04c68496 15310 putPaddrLow(dmabuf->phys);
b19a061a 15311 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_hi =
04c68496
JS
15312 putPaddrHigh(dmabuf->phys);
15313 }
15314 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
b19a061a
JS
15315 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15316 &mq_create_ext->u.response);
15317 if (rc != MBX_SUCCESS) {
15318 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15319 "2795 MQ_CREATE_EXT failed with "
15320 "status x%x. Failback to MQ_CREATE.\n",
15321 rc);
15322 lpfc_mq_create_fb_init(phba, mq, mbox, cq);
15323 mq_create = &mbox->u.mqe.un.mq_create;
15324 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15325 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create->header.cfg_shdr;
15326 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15327 &mq_create->u.response);
15328 }
15329
04c68496 15330 /* The IOCTL status is embedded in the mailbox subheader. */
04c68496
JS
15331 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15332 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15333 if (shdr_status || shdr_add_status || rc) {
15334 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15335 "2502 MQ_CREATE mailbox failed with "
15336 "status x%x add_status x%x, mbx status x%x\n",
15337 shdr_status, shdr_add_status, rc);
15338 status = -ENXIO;
15339 goto out;
15340 }
04c68496
JS
15341 if (mq->queue_id == 0xFFFF) {
15342 status = -ENXIO;
15343 goto out;
15344 }
15345 mq->type = LPFC_MQ;
2a622bfb 15346 mq->assoc_qid = cq->queue_id;
04c68496
JS
15347 mq->subtype = subtype;
15348 mq->host_index = 0;
15349 mq->hba_index = 0;
15350
15351 /* link the mq onto the parent cq child list */
15352 list_add_tail(&mq->list, &cq->child_list);
15353out:
8fa38513 15354 mempool_free(mbox, phba->mbox_mem_pool);
04c68496
JS
15355 return status;
15356}
15357
4f774513
JS
15358/**
15359 * lpfc_wq_create - Create a Work Queue on the HBA
15360 * @phba: HBA structure that indicates port to create a queue on.
15361 * @wq: The queue structure to use to create the work queue.
15362 * @cq: The completion queue to bind this work queue to.
15363 * @subtype: The subtype of the work queue indicating its functionality.
15364 *
15365 * This function creates a work queue, as detailed in @wq, on a port, described
15366 * by @phba by sending a WQ_CREATE mailbox command to the HBA.
15367 *
15368 * The @phba struct is used to send mailbox command to HBA. The @wq struct
15369 * is used to get the entry count and entry size that are necessary to
15370 * determine the number of pages to allocate and use for this queue. The @cq
15371 * is used to indicate which completion queue to bind this work queue to. This
15372 * function will send the WQ_CREATE mailbox command to the HBA to setup the
15373 * work queue. This function is asynchronous and will wait for the mailbox
15374 * command to finish before continuing.
15375 *
15376 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15377 * memory this function will return -ENOMEM. If the queue create mailbox command
15378 * fails this function will return -ENXIO.
4f774513 15379 **/
a2fc4aef 15380int
4f774513
JS
15381lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq,
15382 struct lpfc_queue *cq, uint32_t subtype)
15383{
15384 struct lpfc_mbx_wq_create *wq_create;
15385 struct lpfc_dmabuf *dmabuf;
15386 LPFC_MBOXQ_t *mbox;
15387 int rc, length, status = 0;
15388 uint32_t shdr_status, shdr_add_status;
15389 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15390 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
5a6f133e 15391 struct dma_address *page;
962bc51b
JS
15392 void __iomem *bar_memmap_p;
15393 uint32_t db_offset;
15394 uint16_t pci_barset;
1351e69f
JS
15395 uint8_t dpp_barset;
15396 uint32_t dpp_offset;
15397 unsigned long pg_addr;
81b96eda 15398 uint8_t wq_create_version;
49198b37 15399
2e90f4b5
JS
15400 /* sanity check on queue memory */
15401 if (!wq || !cq)
15402 return -ENODEV;
49198b37 15403 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 15404 hw_page_size = wq->page_size;
4f774513
JS
15405
15406 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15407 if (!mbox)
15408 return -ENOMEM;
15409 length = (sizeof(struct lpfc_mbx_wq_create) -
15410 sizeof(struct lpfc_sli4_cfg_mhdr));
15411 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15412 LPFC_MBOX_OPCODE_FCOE_WQ_CREATE,
15413 length, LPFC_SLI4_MBX_EMBED);
15414 wq_create = &mbox->u.mqe.un.wq_create;
5a6f133e 15415 shdr = (union lpfc_sli4_cfg_shdr *) &wq_create->header.cfg_shdr;
4f774513
JS
15416 bf_set(lpfc_mbx_wq_create_num_pages, &wq_create->u.request,
15417 wq->page_count);
15418 bf_set(lpfc_mbx_wq_create_cq_id, &wq_create->u.request,
15419 cq->queue_id);
0c651878
JS
15420
15421 /* wqv is the earliest version supported, NOT the latest */
5a6f133e
JS
15422 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15423 phba->sli4_hba.pc_sli4_params.wqv);
962bc51b 15424
c176ffa0
JS
15425 if ((phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT) ||
15426 (wq->page_size > SLI4_PAGE_SIZE))
81b96eda
JS
15427 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15428 else
15429 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15430
0c651878 15431
1351e69f
JS
15432 if (phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT)
15433 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15434 else
15435 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15436
15437 switch (wq_create_version) {
0c651878 15438 case LPFC_Q_CREATE_VERSION_1:
5a6f133e
JS
15439 bf_set(lpfc_mbx_wq_create_wqe_count, &wq_create->u.request_1,
15440 wq->entry_count);
3f247de7
JS
15441 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15442 LPFC_Q_CREATE_VERSION_1);
15443
5a6f133e
JS
15444 switch (wq->entry_size) {
15445 default:
15446 case 64:
15447 bf_set(lpfc_mbx_wq_create_wqe_size,
15448 &wq_create->u.request_1,
15449 LPFC_WQ_WQE_SIZE_64);
15450 break;
15451 case 128:
15452 bf_set(lpfc_mbx_wq_create_wqe_size,
15453 &wq_create->u.request_1,
15454 LPFC_WQ_WQE_SIZE_128);
15455 break;
15456 }
1351e69f
JS
15457 /* Request DPP by default */
15458 bf_set(lpfc_mbx_wq_create_dpp_req, &wq_create->u.request_1, 1);
8ea73db4
JS
15459 bf_set(lpfc_mbx_wq_create_page_size,
15460 &wq_create->u.request_1,
81b96eda 15461 (wq->page_size / SLI4_PAGE_SIZE));
5a6f133e 15462 page = wq_create->u.request_1.page;
0c651878
JS
15463 break;
15464 default:
1351e69f
JS
15465 page = wq_create->u.request.page;
15466 break;
5a6f133e 15467 }
0c651878 15468
4f774513 15469 list_for_each_entry(dmabuf, &wq->page_list, list) {
49198b37 15470 memset(dmabuf->virt, 0, hw_page_size);
5a6f133e
JS
15471 page[dmabuf->buffer_tag].addr_lo = putPaddrLow(dmabuf->phys);
15472 page[dmabuf->buffer_tag].addr_hi = putPaddrHigh(dmabuf->phys);
4f774513 15473 }
962bc51b
JS
15474
15475 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15476 bf_set(lpfc_mbx_wq_create_dua, &wq_create->u.request, 1);
15477
4f774513
JS
15478 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15479 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15480 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15481 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15482 if (shdr_status || shdr_add_status || rc) {
15483 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15484 "2503 WQ_CREATE mailbox failed with "
15485 "status x%x add_status x%x, mbx status x%x\n",
15486 shdr_status, shdr_add_status, rc);
15487 status = -ENXIO;
15488 goto out;
15489 }
1351e69f
JS
15490
15491 if (wq_create_version == LPFC_Q_CREATE_VERSION_0)
15492 wq->queue_id = bf_get(lpfc_mbx_wq_create_q_id,
15493 &wq_create->u.response);
15494 else
15495 wq->queue_id = bf_get(lpfc_mbx_wq_create_v1_q_id,
15496 &wq_create->u.response_1);
15497
4f774513
JS
15498 if (wq->queue_id == 0xFFFF) {
15499 status = -ENXIO;
15500 goto out;
15501 }
1351e69f
JS
15502
15503 wq->db_format = LPFC_DB_LIST_FORMAT;
15504 if (wq_create_version == LPFC_Q_CREATE_VERSION_0) {
15505 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15506 wq->db_format = bf_get(lpfc_mbx_wq_create_db_format,
15507 &wq_create->u.response);
15508 if ((wq->db_format != LPFC_DB_LIST_FORMAT) &&
15509 (wq->db_format != LPFC_DB_RING_FORMAT)) {
15510 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15511 "3265 WQ[%d] doorbell format "
15512 "not supported: x%x\n",
15513 wq->queue_id, wq->db_format);
15514 status = -EINVAL;
15515 goto out;
15516 }
15517 pci_barset = bf_get(lpfc_mbx_wq_create_bar_set,
15518 &wq_create->u.response);
15519 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15520 pci_barset);
15521 if (!bar_memmap_p) {
15522 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15523 "3263 WQ[%d] failed to memmap "
15524 "pci barset:x%x\n",
15525 wq->queue_id, pci_barset);
15526 status = -ENOMEM;
15527 goto out;
15528 }
15529 db_offset = wq_create->u.response.doorbell_offset;
15530 if ((db_offset != LPFC_ULP0_WQ_DOORBELL) &&
15531 (db_offset != LPFC_ULP1_WQ_DOORBELL)) {
15532 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15533 "3252 WQ[%d] doorbell offset "
15534 "not supported: x%x\n",
15535 wq->queue_id, db_offset);
15536 status = -EINVAL;
15537 goto out;
15538 }
15539 wq->db_regaddr = bar_memmap_p + db_offset;
15540 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15541 "3264 WQ[%d]: barset:x%x, offset:x%x, "
15542 "format:x%x\n", wq->queue_id,
15543 pci_barset, db_offset, wq->db_format);
15544 } else
15545 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15546 } else {
1351e69f
JS
15547 /* Check if DPP was honored by the firmware */
15548 wq->dpp_enable = bf_get(lpfc_mbx_wq_create_dpp_rsp,
15549 &wq_create->u.response_1);
15550 if (wq->dpp_enable) {
15551 pci_barset = bf_get(lpfc_mbx_wq_create_v1_bar_set,
15552 &wq_create->u.response_1);
15553 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15554 pci_barset);
15555 if (!bar_memmap_p) {
15556 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15557 "3267 WQ[%d] failed to memmap "
15558 "pci barset:x%x\n",
15559 wq->queue_id, pci_barset);
15560 status = -ENOMEM;
15561 goto out;
15562 }
15563 db_offset = wq_create->u.response_1.doorbell_offset;
15564 wq->db_regaddr = bar_memmap_p + db_offset;
15565 wq->dpp_id = bf_get(lpfc_mbx_wq_create_dpp_id,
15566 &wq_create->u.response_1);
15567 dpp_barset = bf_get(lpfc_mbx_wq_create_dpp_bar,
15568 &wq_create->u.response_1);
15569 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15570 dpp_barset);
15571 if (!bar_memmap_p) {
15572 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15573 "3268 WQ[%d] failed to memmap "
15574 "pci barset:x%x\n",
15575 wq->queue_id, dpp_barset);
15576 status = -ENOMEM;
15577 goto out;
15578 }
15579 dpp_offset = wq_create->u.response_1.dpp_offset;
15580 wq->dpp_regaddr = bar_memmap_p + dpp_offset;
15581 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15582 "3271 WQ[%d]: barset:x%x, offset:x%x, "
15583 "dpp_id:x%x dpp_barset:x%x "
15584 "dpp_offset:x%x\n",
15585 wq->queue_id, pci_barset, db_offset,
15586 wq->dpp_id, dpp_barset, dpp_offset);
15587
15588 /* Enable combined writes for DPP aperture */
15589 pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK;
15590#ifdef CONFIG_X86
15591 rc = set_memory_wc(pg_addr, 1);
15592 if (rc) {
15593 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15594 "3272 Cannot setup Combined "
15595 "Write on WQ[%d] - disable DPP\n",
15596 wq->queue_id);
15597 phba->cfg_enable_dpp = 0;
15598 }
15599#else
15600 phba->cfg_enable_dpp = 0;
15601#endif
15602 } else
15603 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15604 }
895427bd
JS
15605 wq->pring = kzalloc(sizeof(struct lpfc_sli_ring), GFP_KERNEL);
15606 if (wq->pring == NULL) {
15607 status = -ENOMEM;
15608 goto out;
15609 }
4f774513 15610 wq->type = LPFC_WQ;
2a622bfb 15611 wq->assoc_qid = cq->queue_id;
4f774513
JS
15612 wq->subtype = subtype;
15613 wq->host_index = 0;
15614 wq->hba_index = 0;
32517fc0 15615 wq->notify_interval = LPFC_WQ_NOTIFY_INTRVL;
4f774513
JS
15616
15617 /* link the wq onto the parent cq child list */
15618 list_add_tail(&wq->list, &cq->child_list);
15619out:
8fa38513 15620 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15621 return status;
15622}
15623
15624/**
15625 * lpfc_rq_create - Create a Receive Queue on the HBA
15626 * @phba: HBA structure that indicates port to create a queue on.
15627 * @hrq: The queue structure to use to create the header receive queue.
15628 * @drq: The queue structure to use to create the data receive queue.
15629 * @cq: The completion queue to bind this work queue to.
15630 *
15631 * This function creates a receive buffer queue pair , as detailed in @hrq and
15632 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15633 * to the HBA.
15634 *
15635 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15636 * struct is used to get the entry count that is necessary to determine the
15637 * number of pages to use for this queue. The @cq is used to indicate which
15638 * completion queue to bind received buffers that are posted to these queues to.
15639 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15640 * receive queue pair. This function is asynchronous and will wait for the
15641 * mailbox command to finish before continuing.
15642 *
15643 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15644 * memory this function will return -ENOMEM. If the queue create mailbox command
15645 * fails this function will return -ENXIO.
4f774513 15646 **/
a2fc4aef 15647int
4f774513
JS
15648lpfc_rq_create(struct lpfc_hba *phba, struct lpfc_queue *hrq,
15649 struct lpfc_queue *drq, struct lpfc_queue *cq, uint32_t subtype)
15650{
15651 struct lpfc_mbx_rq_create *rq_create;
15652 struct lpfc_dmabuf *dmabuf;
15653 LPFC_MBOXQ_t *mbox;
15654 int rc, length, status = 0;
15655 uint32_t shdr_status, shdr_add_status;
15656 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15657 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
962bc51b
JS
15658 void __iomem *bar_memmap_p;
15659 uint32_t db_offset;
15660 uint16_t pci_barset;
49198b37 15661
2e90f4b5
JS
15662 /* sanity check on queue memory */
15663 if (!hrq || !drq || !cq)
15664 return -ENODEV;
49198b37
JS
15665 if (!phba->sli4_hba.pc_sli4_params.supported)
15666 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
15667
15668 if (hrq->entry_count != drq->entry_count)
15669 return -EINVAL;
15670 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15671 if (!mbox)
15672 return -ENOMEM;
15673 length = (sizeof(struct lpfc_mbx_rq_create) -
15674 sizeof(struct lpfc_sli4_cfg_mhdr));
15675 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15676 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15677 length, LPFC_SLI4_MBX_EMBED);
15678 rq_create = &mbox->u.mqe.un.rq_create;
5a6f133e
JS
15679 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
15680 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15681 phba->sli4_hba.pc_sli4_params.rqv);
15682 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15683 bf_set(lpfc_rq_context_rqe_count_1,
15684 &rq_create->u.request.context,
15685 hrq->entry_count);
15686 rq_create->u.request.context.buffer_size = LPFC_HDR_BUF_SIZE;
c31098ce
JS
15687 bf_set(lpfc_rq_context_rqe_size,
15688 &rq_create->u.request.context,
15689 LPFC_RQE_SIZE_8);
15690 bf_set(lpfc_rq_context_page_size,
15691 &rq_create->u.request.context,
8ea73db4 15692 LPFC_RQ_PAGE_SIZE_4096);
5a6f133e
JS
15693 } else {
15694 switch (hrq->entry_count) {
15695 default:
15696 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15697 "2535 Unsupported RQ count. (%d)\n",
15698 hrq->entry_count);
4f4c1863
JS
15699 if (hrq->entry_count < 512) {
15700 status = -EINVAL;
15701 goto out;
15702 }
5bd5f66c 15703 /* fall through - otherwise default to smallest count */
5a6f133e
JS
15704 case 512:
15705 bf_set(lpfc_rq_context_rqe_count,
15706 &rq_create->u.request.context,
15707 LPFC_RQ_RING_SIZE_512);
15708 break;
15709 case 1024:
15710 bf_set(lpfc_rq_context_rqe_count,
15711 &rq_create->u.request.context,
15712 LPFC_RQ_RING_SIZE_1024);
15713 break;
15714 case 2048:
15715 bf_set(lpfc_rq_context_rqe_count,
15716 &rq_create->u.request.context,
15717 LPFC_RQ_RING_SIZE_2048);
15718 break;
15719 case 4096:
15720 bf_set(lpfc_rq_context_rqe_count,
15721 &rq_create->u.request.context,
15722 LPFC_RQ_RING_SIZE_4096);
15723 break;
15724 }
15725 bf_set(lpfc_rq_context_buf_size, &rq_create->u.request.context,
15726 LPFC_HDR_BUF_SIZE);
4f774513
JS
15727 }
15728 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
15729 cq->queue_id);
15730 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
15731 hrq->page_count);
4f774513 15732 list_for_each_entry(dmabuf, &hrq->page_list, list) {
49198b37 15733 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
15734 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15735 putPaddrLow(dmabuf->phys);
15736 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15737 putPaddrHigh(dmabuf->phys);
15738 }
962bc51b
JS
15739 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15740 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
15741
4f774513
JS
15742 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15743 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15744 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15745 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15746 if (shdr_status || shdr_add_status || rc) {
15747 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15748 "2504 RQ_CREATE mailbox failed with "
15749 "status x%x add_status x%x, mbx status x%x\n",
15750 shdr_status, shdr_add_status, rc);
15751 status = -ENXIO;
15752 goto out;
15753 }
15754 hrq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15755 if (hrq->queue_id == 0xFFFF) {
15756 status = -ENXIO;
15757 goto out;
15758 }
962bc51b
JS
15759
15760 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15761 hrq->db_format = bf_get(lpfc_mbx_rq_create_db_format,
15762 &rq_create->u.response);
15763 if ((hrq->db_format != LPFC_DB_LIST_FORMAT) &&
15764 (hrq->db_format != LPFC_DB_RING_FORMAT)) {
15765 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15766 "3262 RQ [%d] doorbell format not "
15767 "supported: x%x\n", hrq->queue_id,
15768 hrq->db_format);
15769 status = -EINVAL;
15770 goto out;
15771 }
15772
15773 pci_barset = bf_get(lpfc_mbx_rq_create_bar_set,
15774 &rq_create->u.response);
15775 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba, pci_barset);
15776 if (!bar_memmap_p) {
15777 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15778 "3269 RQ[%d] failed to memmap pci "
15779 "barset:x%x\n", hrq->queue_id,
15780 pci_barset);
15781 status = -ENOMEM;
15782 goto out;
15783 }
15784
15785 db_offset = rq_create->u.response.doorbell_offset;
15786 if ((db_offset != LPFC_ULP0_RQ_DOORBELL) &&
15787 (db_offset != LPFC_ULP1_RQ_DOORBELL)) {
15788 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15789 "3270 RQ[%d] doorbell offset not "
15790 "supported: x%x\n", hrq->queue_id,
15791 db_offset);
15792 status = -EINVAL;
15793 goto out;
15794 }
15795 hrq->db_regaddr = bar_memmap_p + db_offset;
15796 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a22e7db3
JS
15797 "3266 RQ[qid:%d]: barset:x%x, offset:x%x, "
15798 "format:x%x\n", hrq->queue_id, pci_barset,
15799 db_offset, hrq->db_format);
962bc51b
JS
15800 } else {
15801 hrq->db_format = LPFC_DB_RING_FORMAT;
15802 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
15803 }
4f774513 15804 hrq->type = LPFC_HRQ;
2a622bfb 15805 hrq->assoc_qid = cq->queue_id;
4f774513
JS
15806 hrq->subtype = subtype;
15807 hrq->host_index = 0;
15808 hrq->hba_index = 0;
32517fc0 15809 hrq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
4f774513
JS
15810
15811 /* now create the data queue */
15812 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15813 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15814 length, LPFC_SLI4_MBX_EMBED);
5a6f133e
JS
15815 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15816 phba->sli4_hba.pc_sli4_params.rqv);
15817 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15818 bf_set(lpfc_rq_context_rqe_count_1,
c31098ce 15819 &rq_create->u.request.context, hrq->entry_count);
3c603be9
JS
15820 if (subtype == LPFC_NVMET)
15821 rq_create->u.request.context.buffer_size =
15822 LPFC_NVMET_DATA_BUF_SIZE;
15823 else
15824 rq_create->u.request.context.buffer_size =
15825 LPFC_DATA_BUF_SIZE;
c31098ce
JS
15826 bf_set(lpfc_rq_context_rqe_size, &rq_create->u.request.context,
15827 LPFC_RQE_SIZE_8);
15828 bf_set(lpfc_rq_context_page_size, &rq_create->u.request.context,
15829 (PAGE_SIZE/SLI4_PAGE_SIZE));
5a6f133e
JS
15830 } else {
15831 switch (drq->entry_count) {
15832 default:
15833 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15834 "2536 Unsupported RQ count. (%d)\n",
15835 drq->entry_count);
4f4c1863
JS
15836 if (drq->entry_count < 512) {
15837 status = -EINVAL;
15838 goto out;
15839 }
5bd5f66c 15840 /* fall through - otherwise default to smallest count */
5a6f133e
JS
15841 case 512:
15842 bf_set(lpfc_rq_context_rqe_count,
15843 &rq_create->u.request.context,
15844 LPFC_RQ_RING_SIZE_512);
15845 break;
15846 case 1024:
15847 bf_set(lpfc_rq_context_rqe_count,
15848 &rq_create->u.request.context,
15849 LPFC_RQ_RING_SIZE_1024);
15850 break;
15851 case 2048:
15852 bf_set(lpfc_rq_context_rqe_count,
15853 &rq_create->u.request.context,
15854 LPFC_RQ_RING_SIZE_2048);
15855 break;
15856 case 4096:
15857 bf_set(lpfc_rq_context_rqe_count,
15858 &rq_create->u.request.context,
15859 LPFC_RQ_RING_SIZE_4096);
15860 break;
15861 }
3c603be9
JS
15862 if (subtype == LPFC_NVMET)
15863 bf_set(lpfc_rq_context_buf_size,
15864 &rq_create->u.request.context,
15865 LPFC_NVMET_DATA_BUF_SIZE);
15866 else
15867 bf_set(lpfc_rq_context_buf_size,
15868 &rq_create->u.request.context,
15869 LPFC_DATA_BUF_SIZE);
4f774513
JS
15870 }
15871 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
15872 cq->queue_id);
15873 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
15874 drq->page_count);
4f774513
JS
15875 list_for_each_entry(dmabuf, &drq->page_list, list) {
15876 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15877 putPaddrLow(dmabuf->phys);
15878 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15879 putPaddrHigh(dmabuf->phys);
15880 }
962bc51b
JS
15881 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15882 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
4f774513
JS
15883 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15884 /* The IOCTL status is embedded in the mailbox subheader. */
15885 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
15886 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15887 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15888 if (shdr_status || shdr_add_status || rc) {
15889 status = -ENXIO;
15890 goto out;
15891 }
15892 drq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15893 if (drq->queue_id == 0xFFFF) {
15894 status = -ENXIO;
15895 goto out;
15896 }
15897 drq->type = LPFC_DRQ;
2a622bfb 15898 drq->assoc_qid = cq->queue_id;
4f774513
JS
15899 drq->subtype = subtype;
15900 drq->host_index = 0;
15901 drq->hba_index = 0;
32517fc0 15902 drq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
4f774513
JS
15903
15904 /* link the header and data RQs onto the parent cq child list */
15905 list_add_tail(&hrq->list, &cq->child_list);
15906 list_add_tail(&drq->list, &cq->child_list);
15907
15908out:
8fa38513 15909 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15910 return status;
15911}
15912
2d7dbc4c
JS
15913/**
15914 * lpfc_mrq_create - Create MRQ Receive Queues on the HBA
15915 * @phba: HBA structure that indicates port to create a queue on.
15916 * @hrqp: The queue structure array to use to create the header receive queues.
15917 * @drqp: The queue structure array to use to create the data receive queues.
15918 * @cqp: The completion queue array to bind these receive queues to.
15919 *
15920 * This function creates a receive buffer queue pair , as detailed in @hrq and
15921 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15922 * to the HBA.
15923 *
15924 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15925 * struct is used to get the entry count that is necessary to determine the
15926 * number of pages to use for this queue. The @cq is used to indicate which
15927 * completion queue to bind received buffers that are posted to these queues to.
15928 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15929 * receive queue pair. This function is asynchronous and will wait for the
15930 * mailbox command to finish before continuing.
15931 *
15932 * On success this function will return a zero. If unable to allocate enough
15933 * memory this function will return -ENOMEM. If the queue create mailbox command
15934 * fails this function will return -ENXIO.
15935 **/
15936int
15937lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
15938 struct lpfc_queue **drqp, struct lpfc_queue **cqp,
15939 uint32_t subtype)
15940{
15941 struct lpfc_queue *hrq, *drq, *cq;
15942 struct lpfc_mbx_rq_create_v2 *rq_create;
15943 struct lpfc_dmabuf *dmabuf;
15944 LPFC_MBOXQ_t *mbox;
15945 int rc, length, alloclen, status = 0;
15946 int cnt, idx, numrq, page_idx = 0;
15947 uint32_t shdr_status, shdr_add_status;
15948 union lpfc_sli4_cfg_shdr *shdr;
15949 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
15950
15951 numrq = phba->cfg_nvmet_mrq;
15952 /* sanity check on array memory */
15953 if (!hrqp || !drqp || !cqp || !numrq)
15954 return -ENODEV;
15955 if (!phba->sli4_hba.pc_sli4_params.supported)
15956 hw_page_size = SLI4_PAGE_SIZE;
15957
15958 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15959 if (!mbox)
15960 return -ENOMEM;
15961
15962 length = sizeof(struct lpfc_mbx_rq_create_v2);
15963 length += ((2 * numrq * hrqp[0]->page_count) *
15964 sizeof(struct dma_address));
15965
15966 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15967 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE, length,
15968 LPFC_SLI4_MBX_NEMBED);
15969 if (alloclen < length) {
15970 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15971 "3099 Allocated DMA memory size (%d) is "
15972 "less than the requested DMA memory size "
15973 "(%d)\n", alloclen, length);
15974 status = -ENOMEM;
15975 goto out;
15976 }
15977
15978
15979
15980 rq_create = mbox->sge_array->addr[0];
15981 shdr = (union lpfc_sli4_cfg_shdr *)&rq_create->cfg_shdr;
15982
15983 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_Q_CREATE_VERSION_2);
15984 cnt = 0;
15985
15986 for (idx = 0; idx < numrq; idx++) {
15987 hrq = hrqp[idx];
15988 drq = drqp[idx];
15989 cq = cqp[idx];
15990
2d7dbc4c
JS
15991 /* sanity check on queue memory */
15992 if (!hrq || !drq || !cq) {
15993 status = -ENODEV;
15994 goto out;
15995 }
15996
7aabe84b
JS
15997 if (hrq->entry_count != drq->entry_count) {
15998 status = -EINVAL;
15999 goto out;
16000 }
16001
2d7dbc4c
JS
16002 if (idx == 0) {
16003 bf_set(lpfc_mbx_rq_create_num_pages,
16004 &rq_create->u.request,
16005 hrq->page_count);
16006 bf_set(lpfc_mbx_rq_create_rq_cnt,
16007 &rq_create->u.request, (numrq * 2));
16008 bf_set(lpfc_mbx_rq_create_dnb, &rq_create->u.request,
16009 1);
16010 bf_set(lpfc_rq_context_base_cq,
16011 &rq_create->u.request.context,
16012 cq->queue_id);
16013 bf_set(lpfc_rq_context_data_size,
16014 &rq_create->u.request.context,
3c603be9 16015 LPFC_NVMET_DATA_BUF_SIZE);
2d7dbc4c
JS
16016 bf_set(lpfc_rq_context_hdr_size,
16017 &rq_create->u.request.context,
16018 LPFC_HDR_BUF_SIZE);
16019 bf_set(lpfc_rq_context_rqe_count_1,
16020 &rq_create->u.request.context,
16021 hrq->entry_count);
16022 bf_set(lpfc_rq_context_rqe_size,
16023 &rq_create->u.request.context,
16024 LPFC_RQE_SIZE_8);
16025 bf_set(lpfc_rq_context_page_size,
16026 &rq_create->u.request.context,
16027 (PAGE_SIZE/SLI4_PAGE_SIZE));
16028 }
16029 rc = 0;
16030 list_for_each_entry(dmabuf, &hrq->page_list, list) {
16031 memset(dmabuf->virt, 0, hw_page_size);
16032 cnt = page_idx + dmabuf->buffer_tag;
16033 rq_create->u.request.page[cnt].addr_lo =
16034 putPaddrLow(dmabuf->phys);
16035 rq_create->u.request.page[cnt].addr_hi =
16036 putPaddrHigh(dmabuf->phys);
16037 rc++;
16038 }
16039 page_idx += rc;
16040
16041 rc = 0;
16042 list_for_each_entry(dmabuf, &drq->page_list, list) {
16043 memset(dmabuf->virt, 0, hw_page_size);
16044 cnt = page_idx + dmabuf->buffer_tag;
16045 rq_create->u.request.page[cnt].addr_lo =
16046 putPaddrLow(dmabuf->phys);
16047 rq_create->u.request.page[cnt].addr_hi =
16048 putPaddrHigh(dmabuf->phys);
16049 rc++;
16050 }
16051 page_idx += rc;
16052
16053 hrq->db_format = LPFC_DB_RING_FORMAT;
16054 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16055 hrq->type = LPFC_HRQ;
16056 hrq->assoc_qid = cq->queue_id;
16057 hrq->subtype = subtype;
16058 hrq->host_index = 0;
16059 hrq->hba_index = 0;
32517fc0 16060 hrq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
2d7dbc4c
JS
16061
16062 drq->db_format = LPFC_DB_RING_FORMAT;
16063 drq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16064 drq->type = LPFC_DRQ;
16065 drq->assoc_qid = cq->queue_id;
16066 drq->subtype = subtype;
16067 drq->host_index = 0;
16068 drq->hba_index = 0;
32517fc0 16069 drq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
2d7dbc4c
JS
16070
16071 list_add_tail(&hrq->list, &cq->child_list);
16072 list_add_tail(&drq->list, &cq->child_list);
16073 }
16074
16075 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16076 /* The IOCTL status is embedded in the mailbox subheader. */
16077 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16078 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16079 if (shdr_status || shdr_add_status || rc) {
16080 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16081 "3120 RQ_CREATE mailbox failed with "
16082 "status x%x add_status x%x, mbx status x%x\n",
16083 shdr_status, shdr_add_status, rc);
16084 status = -ENXIO;
16085 goto out;
16086 }
16087 rc = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16088 if (rc == 0xFFFF) {
16089 status = -ENXIO;
16090 goto out;
16091 }
16092
16093 /* Initialize all RQs with associated queue id */
16094 for (idx = 0; idx < numrq; idx++) {
16095 hrq = hrqp[idx];
16096 hrq->queue_id = rc + (2 * idx);
16097 drq = drqp[idx];
16098 drq->queue_id = rc + (2 * idx) + 1;
16099 }
16100
16101out:
16102 lpfc_sli4_mbox_cmd_free(phba, mbox);
16103 return status;
16104}
16105
4f774513
JS
16106/**
16107 * lpfc_eq_destroy - Destroy an event Queue on the HBA
16108 * @eq: The queue structure associated with the queue to destroy.
16109 *
16110 * This function destroys a queue, as detailed in @eq by sending an mailbox
16111 * command, specific to the type of queue, to the HBA.
16112 *
16113 * The @eq struct is used to get the queue ID of the queue to destroy.
16114 *
16115 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16116 * command fails this function will return -ENXIO.
4f774513 16117 **/
a2fc4aef 16118int
4f774513
JS
16119lpfc_eq_destroy(struct lpfc_hba *phba, struct lpfc_queue *eq)
16120{
16121 LPFC_MBOXQ_t *mbox;
16122 int rc, length, status = 0;
16123 uint32_t shdr_status, shdr_add_status;
16124 union lpfc_sli4_cfg_shdr *shdr;
16125
2e90f4b5 16126 /* sanity check on queue memory */
4f774513
JS
16127 if (!eq)
16128 return -ENODEV;
32517fc0 16129
4f774513
JS
16130 mbox = mempool_alloc(eq->phba->mbox_mem_pool, GFP_KERNEL);
16131 if (!mbox)
16132 return -ENOMEM;
16133 length = (sizeof(struct lpfc_mbx_eq_destroy) -
16134 sizeof(struct lpfc_sli4_cfg_mhdr));
16135 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16136 LPFC_MBOX_OPCODE_EQ_DESTROY,
16137 length, LPFC_SLI4_MBX_EMBED);
16138 bf_set(lpfc_mbx_eq_destroy_q_id, &mbox->u.mqe.un.eq_destroy.u.request,
16139 eq->queue_id);
16140 mbox->vport = eq->phba->pport;
16141 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16142
16143 rc = lpfc_sli_issue_mbox(eq->phba, mbox, MBX_POLL);
16144 /* The IOCTL status is embedded in the mailbox subheader. */
16145 shdr = (union lpfc_sli4_cfg_shdr *)
16146 &mbox->u.mqe.un.eq_destroy.header.cfg_shdr;
16147 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16148 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16149 if (shdr_status || shdr_add_status || rc) {
16150 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16151 "2505 EQ_DESTROY mailbox failed with "
16152 "status x%x add_status x%x, mbx status x%x\n",
16153 shdr_status, shdr_add_status, rc);
16154 status = -ENXIO;
16155 }
16156
16157 /* Remove eq from any list */
16158 list_del_init(&eq->list);
8fa38513 16159 mempool_free(mbox, eq->phba->mbox_mem_pool);
4f774513
JS
16160 return status;
16161}
16162
16163/**
16164 * lpfc_cq_destroy - Destroy a Completion Queue on the HBA
16165 * @cq: The queue structure associated with the queue to destroy.
16166 *
16167 * This function destroys a queue, as detailed in @cq by sending an mailbox
16168 * command, specific to the type of queue, to the HBA.
16169 *
16170 * The @cq struct is used to get the queue ID of the queue to destroy.
16171 *
16172 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16173 * command fails this function will return -ENXIO.
4f774513 16174 **/
a2fc4aef 16175int
4f774513
JS
16176lpfc_cq_destroy(struct lpfc_hba *phba, struct lpfc_queue *cq)
16177{
16178 LPFC_MBOXQ_t *mbox;
16179 int rc, length, status = 0;
16180 uint32_t shdr_status, shdr_add_status;
16181 union lpfc_sli4_cfg_shdr *shdr;
16182
2e90f4b5 16183 /* sanity check on queue memory */
4f774513
JS
16184 if (!cq)
16185 return -ENODEV;
16186 mbox = mempool_alloc(cq->phba->mbox_mem_pool, GFP_KERNEL);
16187 if (!mbox)
16188 return -ENOMEM;
16189 length = (sizeof(struct lpfc_mbx_cq_destroy) -
16190 sizeof(struct lpfc_sli4_cfg_mhdr));
16191 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16192 LPFC_MBOX_OPCODE_CQ_DESTROY,
16193 length, LPFC_SLI4_MBX_EMBED);
16194 bf_set(lpfc_mbx_cq_destroy_q_id, &mbox->u.mqe.un.cq_destroy.u.request,
16195 cq->queue_id);
16196 mbox->vport = cq->phba->pport;
16197 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16198 rc = lpfc_sli_issue_mbox(cq->phba, mbox, MBX_POLL);
16199 /* The IOCTL status is embedded in the mailbox subheader. */
16200 shdr = (union lpfc_sli4_cfg_shdr *)
16201 &mbox->u.mqe.un.wq_create.header.cfg_shdr;
16202 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16203 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16204 if (shdr_status || shdr_add_status || rc) {
16205 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16206 "2506 CQ_DESTROY mailbox failed with "
16207 "status x%x add_status x%x, mbx status x%x\n",
16208 shdr_status, shdr_add_status, rc);
16209 status = -ENXIO;
16210 }
16211 /* Remove cq from any list */
16212 list_del_init(&cq->list);
8fa38513 16213 mempool_free(mbox, cq->phba->mbox_mem_pool);
4f774513
JS
16214 return status;
16215}
16216
04c68496
JS
16217/**
16218 * lpfc_mq_destroy - Destroy a Mailbox Queue on the HBA
16219 * @qm: The queue structure associated with the queue to destroy.
16220 *
16221 * This function destroys a queue, as detailed in @mq by sending an mailbox
16222 * command, specific to the type of queue, to the HBA.
16223 *
16224 * The @mq struct is used to get the queue ID of the queue to destroy.
16225 *
16226 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16227 * command fails this function will return -ENXIO.
04c68496 16228 **/
a2fc4aef 16229int
04c68496
JS
16230lpfc_mq_destroy(struct lpfc_hba *phba, struct lpfc_queue *mq)
16231{
16232 LPFC_MBOXQ_t *mbox;
16233 int rc, length, status = 0;
16234 uint32_t shdr_status, shdr_add_status;
16235 union lpfc_sli4_cfg_shdr *shdr;
16236
2e90f4b5 16237 /* sanity check on queue memory */
04c68496
JS
16238 if (!mq)
16239 return -ENODEV;
16240 mbox = mempool_alloc(mq->phba->mbox_mem_pool, GFP_KERNEL);
16241 if (!mbox)
16242 return -ENOMEM;
16243 length = (sizeof(struct lpfc_mbx_mq_destroy) -
16244 sizeof(struct lpfc_sli4_cfg_mhdr));
16245 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16246 LPFC_MBOX_OPCODE_MQ_DESTROY,
16247 length, LPFC_SLI4_MBX_EMBED);
16248 bf_set(lpfc_mbx_mq_destroy_q_id, &mbox->u.mqe.un.mq_destroy.u.request,
16249 mq->queue_id);
16250 mbox->vport = mq->phba->pport;
16251 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16252 rc = lpfc_sli_issue_mbox(mq->phba, mbox, MBX_POLL);
16253 /* The IOCTL status is embedded in the mailbox subheader. */
16254 shdr = (union lpfc_sli4_cfg_shdr *)
16255 &mbox->u.mqe.un.mq_destroy.header.cfg_shdr;
16256 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16257 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16258 if (shdr_status || shdr_add_status || rc) {
16259 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16260 "2507 MQ_DESTROY mailbox failed with "
16261 "status x%x add_status x%x, mbx status x%x\n",
16262 shdr_status, shdr_add_status, rc);
16263 status = -ENXIO;
16264 }
16265 /* Remove mq from any list */
16266 list_del_init(&mq->list);
8fa38513 16267 mempool_free(mbox, mq->phba->mbox_mem_pool);
04c68496
JS
16268 return status;
16269}
16270
4f774513
JS
16271/**
16272 * lpfc_wq_destroy - Destroy a Work Queue on the HBA
16273 * @wq: The queue structure associated with the queue to destroy.
16274 *
16275 * This function destroys a queue, as detailed in @wq by sending an mailbox
16276 * command, specific to the type of queue, to the HBA.
16277 *
16278 * The @wq struct is used to get the queue ID of the queue to destroy.
16279 *
16280 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16281 * command fails this function will return -ENXIO.
4f774513 16282 **/
a2fc4aef 16283int
4f774513
JS
16284lpfc_wq_destroy(struct lpfc_hba *phba, struct lpfc_queue *wq)
16285{
16286 LPFC_MBOXQ_t *mbox;
16287 int rc, length, status = 0;
16288 uint32_t shdr_status, shdr_add_status;
16289 union lpfc_sli4_cfg_shdr *shdr;
16290
2e90f4b5 16291 /* sanity check on queue memory */
4f774513
JS
16292 if (!wq)
16293 return -ENODEV;
16294 mbox = mempool_alloc(wq->phba->mbox_mem_pool, GFP_KERNEL);
16295 if (!mbox)
16296 return -ENOMEM;
16297 length = (sizeof(struct lpfc_mbx_wq_destroy) -
16298 sizeof(struct lpfc_sli4_cfg_mhdr));
16299 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16300 LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY,
16301 length, LPFC_SLI4_MBX_EMBED);
16302 bf_set(lpfc_mbx_wq_destroy_q_id, &mbox->u.mqe.un.wq_destroy.u.request,
16303 wq->queue_id);
16304 mbox->vport = wq->phba->pport;
16305 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16306 rc = lpfc_sli_issue_mbox(wq->phba, mbox, MBX_POLL);
16307 shdr = (union lpfc_sli4_cfg_shdr *)
16308 &mbox->u.mqe.un.wq_destroy.header.cfg_shdr;
16309 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16310 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16311 if (shdr_status || shdr_add_status || rc) {
16312 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16313 "2508 WQ_DESTROY mailbox failed with "
16314 "status x%x add_status x%x, mbx status x%x\n",
16315 shdr_status, shdr_add_status, rc);
16316 status = -ENXIO;
16317 }
16318 /* Remove wq from any list */
16319 list_del_init(&wq->list);
d1f525aa
JS
16320 kfree(wq->pring);
16321 wq->pring = NULL;
8fa38513 16322 mempool_free(mbox, wq->phba->mbox_mem_pool);
4f774513
JS
16323 return status;
16324}
16325
16326/**
16327 * lpfc_rq_destroy - Destroy a Receive Queue on the HBA
16328 * @rq: The queue structure associated with the queue to destroy.
16329 *
16330 * This function destroys a queue, as detailed in @rq by sending an mailbox
16331 * command, specific to the type of queue, to the HBA.
16332 *
16333 * The @rq struct is used to get the queue ID of the queue to destroy.
16334 *
16335 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16336 * command fails this function will return -ENXIO.
4f774513 16337 **/
a2fc4aef 16338int
4f774513
JS
16339lpfc_rq_destroy(struct lpfc_hba *phba, struct lpfc_queue *hrq,
16340 struct lpfc_queue *drq)
16341{
16342 LPFC_MBOXQ_t *mbox;
16343 int rc, length, status = 0;
16344 uint32_t shdr_status, shdr_add_status;
16345 union lpfc_sli4_cfg_shdr *shdr;
16346
2e90f4b5 16347 /* sanity check on queue memory */
4f774513
JS
16348 if (!hrq || !drq)
16349 return -ENODEV;
16350 mbox = mempool_alloc(hrq->phba->mbox_mem_pool, GFP_KERNEL);
16351 if (!mbox)
16352 return -ENOMEM;
16353 length = (sizeof(struct lpfc_mbx_rq_destroy) -
fedd3b7b 16354 sizeof(struct lpfc_sli4_cfg_mhdr));
4f774513
JS
16355 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16356 LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY,
16357 length, LPFC_SLI4_MBX_EMBED);
16358 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16359 hrq->queue_id);
16360 mbox->vport = hrq->phba->pport;
16361 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16362 rc = lpfc_sli_issue_mbox(hrq->phba, mbox, MBX_POLL);
16363 /* The IOCTL status is embedded in the mailbox subheader. */
16364 shdr = (union lpfc_sli4_cfg_shdr *)
16365 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16366 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16367 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16368 if (shdr_status || shdr_add_status || rc) {
16369 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16370 "2509 RQ_DESTROY mailbox failed with "
16371 "status x%x add_status x%x, mbx status x%x\n",
16372 shdr_status, shdr_add_status, rc);
16373 if (rc != MBX_TIMEOUT)
16374 mempool_free(mbox, hrq->phba->mbox_mem_pool);
16375 return -ENXIO;
16376 }
16377 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16378 drq->queue_id);
16379 rc = lpfc_sli_issue_mbox(drq->phba, mbox, MBX_POLL);
16380 shdr = (union lpfc_sli4_cfg_shdr *)
16381 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16382 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16383 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16384 if (shdr_status || shdr_add_status || rc) {
16385 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16386 "2510 RQ_DESTROY mailbox failed with "
16387 "status x%x add_status x%x, mbx status x%x\n",
16388 shdr_status, shdr_add_status, rc);
16389 status = -ENXIO;
16390 }
16391 list_del_init(&hrq->list);
16392 list_del_init(&drq->list);
8fa38513 16393 mempool_free(mbox, hrq->phba->mbox_mem_pool);
4f774513
JS
16394 return status;
16395}
16396
16397/**
16398 * lpfc_sli4_post_sgl - Post scatter gather list for an XRI to HBA
16399 * @phba: The virtual port for which this call being executed.
16400 * @pdma_phys_addr0: Physical address of the 1st SGL page.
16401 * @pdma_phys_addr1: Physical address of the 2nd SGL page.
16402 * @xritag: the xritag that ties this io to the SGL pages.
16403 *
16404 * This routine will post the sgl pages for the IO that has the xritag
16405 * that is in the iocbq structure. The xritag is assigned during iocbq
16406 * creation and persists for as long as the driver is loaded.
16407 * if the caller has fewer than 256 scatter gather segments to map then
16408 * pdma_phys_addr1 should be 0.
16409 * If the caller needs to map more than 256 scatter gather segment then
16410 * pdma_phys_addr1 should be a valid physical address.
16411 * physical address for SGLs must be 64 byte aligned.
16412 * If you are going to map 2 SGL's then the first one must have 256 entries
16413 * the second sgl can have between 1 and 256 entries.
16414 *
16415 * Return codes:
16416 * 0 - Success
16417 * -ENXIO, -ENOMEM - Failure
16418 **/
16419int
16420lpfc_sli4_post_sgl(struct lpfc_hba *phba,
16421 dma_addr_t pdma_phys_addr0,
16422 dma_addr_t pdma_phys_addr1,
16423 uint16_t xritag)
16424{
16425 struct lpfc_mbx_post_sgl_pages *post_sgl_pages;
16426 LPFC_MBOXQ_t *mbox;
16427 int rc;
16428 uint32_t shdr_status, shdr_add_status;
6d368e53 16429 uint32_t mbox_tmo;
4f774513
JS
16430 union lpfc_sli4_cfg_shdr *shdr;
16431
16432 if (xritag == NO_XRI) {
16433 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16434 "0364 Invalid param:\n");
16435 return -EINVAL;
16436 }
16437
16438 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16439 if (!mbox)
16440 return -ENOMEM;
16441
16442 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16443 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16444 sizeof(struct lpfc_mbx_post_sgl_pages) -
fedd3b7b 16445 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
4f774513
JS
16446
16447 post_sgl_pages = (struct lpfc_mbx_post_sgl_pages *)
16448 &mbox->u.mqe.un.post_sgl_pages;
16449 bf_set(lpfc_post_sgl_pages_xri, post_sgl_pages, xritag);
16450 bf_set(lpfc_post_sgl_pages_xricnt, post_sgl_pages, 1);
16451
16452 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_lo =
16453 cpu_to_le32(putPaddrLow(pdma_phys_addr0));
16454 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_hi =
16455 cpu_to_le32(putPaddrHigh(pdma_phys_addr0));
16456
16457 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_lo =
16458 cpu_to_le32(putPaddrLow(pdma_phys_addr1));
16459 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_hi =
16460 cpu_to_le32(putPaddrHigh(pdma_phys_addr1));
16461 if (!phba->sli4_hba.intr_enable)
16462 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6d368e53 16463 else {
a183a15f 16464 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
16465 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16466 }
4f774513
JS
16467 /* The IOCTL status is embedded in the mailbox subheader. */
16468 shdr = (union lpfc_sli4_cfg_shdr *) &post_sgl_pages->header.cfg_shdr;
16469 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16470 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16471 if (rc != MBX_TIMEOUT)
16472 mempool_free(mbox, phba->mbox_mem_pool);
16473 if (shdr_status || shdr_add_status || rc) {
16474 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16475 "2511 POST_SGL mailbox failed with "
16476 "status x%x add_status x%x, mbx status x%x\n",
16477 shdr_status, shdr_add_status, rc);
4f774513
JS
16478 }
16479 return 0;
16480}
4f774513 16481
6d368e53 16482/**
88a2cfbb 16483 * lpfc_sli4_alloc_xri - Get an available rpi in the device's range
6d368e53
JS
16484 * @phba: pointer to lpfc hba data structure.
16485 *
16486 * This routine is invoked to post rpi header templates to the
88a2cfbb
JS
16487 * HBA consistent with the SLI-4 interface spec. This routine
16488 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
16489 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6d368e53 16490 *
88a2cfbb
JS
16491 * Returns
16492 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
16493 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
16494 **/
5d8b8167 16495static uint16_t
6d368e53
JS
16496lpfc_sli4_alloc_xri(struct lpfc_hba *phba)
16497{
16498 unsigned long xri;
16499
16500 /*
16501 * Fetch the next logical xri. Because this index is logical,
16502 * the driver starts at 0 each time.
16503 */
16504 spin_lock_irq(&phba->hbalock);
16505 xri = find_next_zero_bit(phba->sli4_hba.xri_bmask,
16506 phba->sli4_hba.max_cfg_param.max_xri, 0);
16507 if (xri >= phba->sli4_hba.max_cfg_param.max_xri) {
16508 spin_unlock_irq(&phba->hbalock);
16509 return NO_XRI;
16510 } else {
16511 set_bit(xri, phba->sli4_hba.xri_bmask);
16512 phba->sli4_hba.max_cfg_param.xri_used++;
6d368e53 16513 }
6d368e53
JS
16514 spin_unlock_irq(&phba->hbalock);
16515 return xri;
16516}
16517
16518/**
16519 * lpfc_sli4_free_xri - Release an xri for reuse.
16520 * @phba: pointer to lpfc hba data structure.
16521 *
16522 * This routine is invoked to release an xri to the pool of
16523 * available rpis maintained by the driver.
16524 **/
5d8b8167 16525static void
6d368e53
JS
16526__lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16527{
16528 if (test_and_clear_bit(xri, phba->sli4_hba.xri_bmask)) {
6d368e53
JS
16529 phba->sli4_hba.max_cfg_param.xri_used--;
16530 }
16531}
16532
16533/**
16534 * lpfc_sli4_free_xri - Release an xri for reuse.
16535 * @phba: pointer to lpfc hba data structure.
16536 *
16537 * This routine is invoked to release an xri to the pool of
16538 * available rpis maintained by the driver.
16539 **/
16540void
16541lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16542{
16543 spin_lock_irq(&phba->hbalock);
16544 __lpfc_sli4_free_xri(phba, xri);
16545 spin_unlock_irq(&phba->hbalock);
16546}
16547
4f774513
JS
16548/**
16549 * lpfc_sli4_next_xritag - Get an xritag for the io
16550 * @phba: Pointer to HBA context object.
16551 *
16552 * This function gets an xritag for the iocb. If there is no unused xritag
16553 * it will return 0xffff.
16554 * The function returns the allocated xritag if successful, else returns zero.
16555 * Zero is not a valid xritag.
16556 * The caller is not required to hold any lock.
16557 **/
16558uint16_t
16559lpfc_sli4_next_xritag(struct lpfc_hba *phba)
16560{
6d368e53 16561 uint16_t xri_index;
4f774513 16562
6d368e53 16563 xri_index = lpfc_sli4_alloc_xri(phba);
81378052
JS
16564 if (xri_index == NO_XRI)
16565 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
16566 "2004 Failed to allocate XRI.last XRITAG is %d"
16567 " Max XRI is %d, Used XRI is %d\n",
16568 xri_index,
16569 phba->sli4_hba.max_cfg_param.max_xri,
16570 phba->sli4_hba.max_cfg_param.xri_used);
16571 return xri_index;
4f774513
JS
16572}
16573
16574/**
895427bd 16575 * lpfc_sli4_post_sgl_list - post a block of ELS sgls to the port.
4f774513 16576 * @phba: pointer to lpfc hba data structure.
8a9d2e80
JS
16577 * @post_sgl_list: pointer to els sgl entry list.
16578 * @count: number of els sgl entries on the list.
4f774513
JS
16579 *
16580 * This routine is invoked to post a block of driver's sgl pages to the
16581 * HBA using non-embedded mailbox command. No Lock is held. This routine
16582 * is only called when the driver is loading and after all IO has been
16583 * stopped.
16584 **/
8a9d2e80 16585static int
895427bd 16586lpfc_sli4_post_sgl_list(struct lpfc_hba *phba,
8a9d2e80
JS
16587 struct list_head *post_sgl_list,
16588 int post_cnt)
4f774513 16589{
8a9d2e80 16590 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
4f774513
JS
16591 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16592 struct sgl_page_pairs *sgl_pg_pairs;
16593 void *viraddr;
16594 LPFC_MBOXQ_t *mbox;
16595 uint32_t reqlen, alloclen, pg_pairs;
16596 uint32_t mbox_tmo;
8a9d2e80
JS
16597 uint16_t xritag_start = 0;
16598 int rc = 0;
4f774513
JS
16599 uint32_t shdr_status, shdr_add_status;
16600 union lpfc_sli4_cfg_shdr *shdr;
16601
895427bd 16602 reqlen = post_cnt * sizeof(struct sgl_page_pairs) +
4f774513 16603 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16604 if (reqlen > SLI4_PAGE_SIZE) {
895427bd 16605 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4f774513
JS
16606 "2559 Block sgl registration required DMA "
16607 "size (%d) great than a page\n", reqlen);
16608 return -ENOMEM;
16609 }
895427bd 16610
4f774513 16611 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6d368e53 16612 if (!mbox)
4f774513 16613 return -ENOMEM;
4f774513
JS
16614
16615 /* Allocate DMA memory and set up the non-embedded mailbox command */
16616 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16617 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES, reqlen,
16618 LPFC_SLI4_MBX_NEMBED);
16619
16620 if (alloclen < reqlen) {
16621 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16622 "0285 Allocated DMA memory size (%d) is "
16623 "less than the requested DMA memory "
16624 "size (%d)\n", alloclen, reqlen);
16625 lpfc_sli4_mbox_cmd_free(phba, mbox);
16626 return -ENOMEM;
16627 }
4f774513 16628 /* Set up the SGL pages in the non-embedded DMA pages */
6d368e53 16629 viraddr = mbox->sge_array->addr[0];
4f774513
JS
16630 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16631 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16632
8a9d2e80
JS
16633 pg_pairs = 0;
16634 list_for_each_entry_safe(sglq_entry, sglq_next, post_sgl_list, list) {
4f774513
JS
16635 /* Set up the sge entry */
16636 sgl_pg_pairs->sgl_pg0_addr_lo =
16637 cpu_to_le32(putPaddrLow(sglq_entry->phys));
16638 sgl_pg_pairs->sgl_pg0_addr_hi =
16639 cpu_to_le32(putPaddrHigh(sglq_entry->phys));
16640 sgl_pg_pairs->sgl_pg1_addr_lo =
16641 cpu_to_le32(putPaddrLow(0));
16642 sgl_pg_pairs->sgl_pg1_addr_hi =
16643 cpu_to_le32(putPaddrHigh(0));
6d368e53 16644
4f774513
JS
16645 /* Keep the first xritag on the list */
16646 if (pg_pairs == 0)
16647 xritag_start = sglq_entry->sli4_xritag;
16648 sgl_pg_pairs++;
8a9d2e80 16649 pg_pairs++;
4f774513 16650 }
6d368e53
JS
16651
16652 /* Complete initialization and perform endian conversion. */
4f774513 16653 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
895427bd 16654 bf_set(lpfc_post_sgl_pages_xricnt, sgl, post_cnt);
4f774513 16655 sgl->word0 = cpu_to_le32(sgl->word0);
895427bd 16656
4f774513
JS
16657 if (!phba->sli4_hba.intr_enable)
16658 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16659 else {
a183a15f 16660 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16661 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16662 }
16663 shdr = (union lpfc_sli4_cfg_shdr *) &sgl->cfg_shdr;
16664 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16665 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16666 if (rc != MBX_TIMEOUT)
16667 lpfc_sli4_mbox_cmd_free(phba, mbox);
16668 if (shdr_status || shdr_add_status || rc) {
16669 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16670 "2513 POST_SGL_BLOCK mailbox command failed "
16671 "status x%x add_status x%x mbx status x%x\n",
16672 shdr_status, shdr_add_status, rc);
16673 rc = -ENXIO;
16674 }
16675 return rc;
16676}
16677
16678/**
5e5b511d 16679 * lpfc_sli4_post_io_sgl_block - post a block of nvme sgl list to firmware
4f774513 16680 * @phba: pointer to lpfc hba data structure.
0794d601 16681 * @nblist: pointer to nvme buffer list.
4f774513
JS
16682 * @count: number of scsi buffers on the list.
16683 *
16684 * This routine is invoked to post a block of @count scsi sgl pages from a
0794d601 16685 * SCSI buffer list @nblist to the HBA using non-embedded mailbox command.
4f774513
JS
16686 * No Lock is held.
16687 *
16688 **/
0794d601 16689static int
5e5b511d
JS
16690lpfc_sli4_post_io_sgl_block(struct lpfc_hba *phba, struct list_head *nblist,
16691 int count)
4f774513 16692{
c490850a 16693 struct lpfc_io_buf *lpfc_ncmd;
4f774513
JS
16694 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16695 struct sgl_page_pairs *sgl_pg_pairs;
16696 void *viraddr;
16697 LPFC_MBOXQ_t *mbox;
16698 uint32_t reqlen, alloclen, pg_pairs;
16699 uint32_t mbox_tmo;
16700 uint16_t xritag_start = 0;
16701 int rc = 0;
16702 uint32_t shdr_status, shdr_add_status;
16703 dma_addr_t pdma_phys_bpl1;
16704 union lpfc_sli4_cfg_shdr *shdr;
16705
16706 /* Calculate the requested length of the dma memory */
8a9d2e80 16707 reqlen = count * sizeof(struct sgl_page_pairs) +
4f774513 16708 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16709 if (reqlen > SLI4_PAGE_SIZE) {
4f774513 16710 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
0794d601 16711 "6118 Block sgl registration required DMA "
4f774513
JS
16712 "size (%d) great than a page\n", reqlen);
16713 return -ENOMEM;
16714 }
16715 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16716 if (!mbox) {
16717 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
0794d601 16718 "6119 Failed to allocate mbox cmd memory\n");
4f774513
JS
16719 return -ENOMEM;
16720 }
16721
16722 /* Allocate DMA memory and set up the non-embedded mailbox command */
16723 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
0794d601
JS
16724 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16725 reqlen, LPFC_SLI4_MBX_NEMBED);
4f774513
JS
16726
16727 if (alloclen < reqlen) {
16728 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
0794d601 16729 "6120 Allocated DMA memory size (%d) is "
4f774513
JS
16730 "less than the requested DMA memory "
16731 "size (%d)\n", alloclen, reqlen);
16732 lpfc_sli4_mbox_cmd_free(phba, mbox);
16733 return -ENOMEM;
16734 }
6d368e53 16735
4f774513 16736 /* Get the first SGE entry from the non-embedded DMA memory */
4f774513
JS
16737 viraddr = mbox->sge_array->addr[0];
16738
16739 /* Set up the SGL pages in the non-embedded DMA pages */
16740 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16741 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16742
16743 pg_pairs = 0;
0794d601 16744 list_for_each_entry(lpfc_ncmd, nblist, list) {
4f774513
JS
16745 /* Set up the sge entry */
16746 sgl_pg_pairs->sgl_pg0_addr_lo =
0794d601 16747 cpu_to_le32(putPaddrLow(lpfc_ncmd->dma_phys_sgl));
4f774513 16748 sgl_pg_pairs->sgl_pg0_addr_hi =
0794d601 16749 cpu_to_le32(putPaddrHigh(lpfc_ncmd->dma_phys_sgl));
4f774513 16750 if (phba->cfg_sg_dma_buf_size > SGL_PAGE_SIZE)
0794d601
JS
16751 pdma_phys_bpl1 = lpfc_ncmd->dma_phys_sgl +
16752 SGL_PAGE_SIZE;
4f774513
JS
16753 else
16754 pdma_phys_bpl1 = 0;
16755 sgl_pg_pairs->sgl_pg1_addr_lo =
16756 cpu_to_le32(putPaddrLow(pdma_phys_bpl1));
16757 sgl_pg_pairs->sgl_pg1_addr_hi =
16758 cpu_to_le32(putPaddrHigh(pdma_phys_bpl1));
16759 /* Keep the first xritag on the list */
16760 if (pg_pairs == 0)
0794d601 16761 xritag_start = lpfc_ncmd->cur_iocbq.sli4_xritag;
4f774513
JS
16762 sgl_pg_pairs++;
16763 pg_pairs++;
16764 }
16765 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
16766 bf_set(lpfc_post_sgl_pages_xricnt, sgl, pg_pairs);
16767 /* Perform endian conversion if necessary */
16768 sgl->word0 = cpu_to_le32(sgl->word0);
16769
0794d601 16770 if (!phba->sli4_hba.intr_enable) {
4f774513 16771 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
0794d601 16772 } else {
a183a15f 16773 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16774 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16775 }
0794d601 16776 shdr = (union lpfc_sli4_cfg_shdr *)&sgl->cfg_shdr;
4f774513
JS
16777 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16778 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16779 if (rc != MBX_TIMEOUT)
16780 lpfc_sli4_mbox_cmd_free(phba, mbox);
16781 if (shdr_status || shdr_add_status || rc) {
16782 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
0794d601 16783 "6125 POST_SGL_BLOCK mailbox command failed "
4f774513
JS
16784 "status x%x add_status x%x mbx status x%x\n",
16785 shdr_status, shdr_add_status, rc);
16786 rc = -ENXIO;
16787 }
16788 return rc;
16789}
16790
0794d601 16791/**
5e5b511d 16792 * lpfc_sli4_post_io_sgl_list - Post blocks of nvme buffer sgls from a list
0794d601
JS
16793 * @phba: pointer to lpfc hba data structure.
16794 * @post_nblist: pointer to the nvme buffer list.
16795 *
16796 * This routine walks a list of nvme buffers that was passed in. It attempts
16797 * to construct blocks of nvme buffer sgls which contains contiguous xris and
16798 * uses the non-embedded SGL block post mailbox commands to post to the port.
16799 * For single NVME buffer sgl with non-contiguous xri, if any, it shall use
16800 * embedded SGL post mailbox command for posting. The @post_nblist passed in
16801 * must be local list, thus no lock is needed when manipulate the list.
16802 *
16803 * Returns: 0 = failure, non-zero number of successfully posted buffers.
16804 **/
16805int
5e5b511d
JS
16806lpfc_sli4_post_io_sgl_list(struct lpfc_hba *phba,
16807 struct list_head *post_nblist, int sb_count)
0794d601 16808{
c490850a 16809 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
0794d601
JS
16810 int status, sgl_size;
16811 int post_cnt = 0, block_cnt = 0, num_posting = 0, num_posted = 0;
16812 dma_addr_t pdma_phys_sgl1;
16813 int last_xritag = NO_XRI;
16814 int cur_xritag;
0794d601
JS
16815 LIST_HEAD(prep_nblist);
16816 LIST_HEAD(blck_nblist);
16817 LIST_HEAD(nvme_nblist);
16818
16819 /* sanity check */
16820 if (sb_count <= 0)
16821 return -EINVAL;
16822
16823 sgl_size = phba->cfg_sg_dma_buf_size;
16824 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, post_nblist, list) {
16825 list_del_init(&lpfc_ncmd->list);
16826 block_cnt++;
16827 if ((last_xritag != NO_XRI) &&
16828 (lpfc_ncmd->cur_iocbq.sli4_xritag != last_xritag + 1)) {
16829 /* a hole in xri block, form a sgl posting block */
16830 list_splice_init(&prep_nblist, &blck_nblist);
16831 post_cnt = block_cnt - 1;
16832 /* prepare list for next posting block */
16833 list_add_tail(&lpfc_ncmd->list, &prep_nblist);
16834 block_cnt = 1;
16835 } else {
16836 /* prepare list for next posting block */
16837 list_add_tail(&lpfc_ncmd->list, &prep_nblist);
16838 /* enough sgls for non-embed sgl mbox command */
16839 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
16840 list_splice_init(&prep_nblist, &blck_nblist);
16841 post_cnt = block_cnt;
16842 block_cnt = 0;
16843 }
16844 }
16845 num_posting++;
16846 last_xritag = lpfc_ncmd->cur_iocbq.sli4_xritag;
16847
16848 /* end of repost sgl list condition for NVME buffers */
16849 if (num_posting == sb_count) {
16850 if (post_cnt == 0) {
16851 /* last sgl posting block */
16852 list_splice_init(&prep_nblist, &blck_nblist);
16853 post_cnt = block_cnt;
16854 } else if (block_cnt == 1) {
16855 /* last single sgl with non-contiguous xri */
16856 if (sgl_size > SGL_PAGE_SIZE)
16857 pdma_phys_sgl1 =
16858 lpfc_ncmd->dma_phys_sgl +
16859 SGL_PAGE_SIZE;
16860 else
16861 pdma_phys_sgl1 = 0;
16862 cur_xritag = lpfc_ncmd->cur_iocbq.sli4_xritag;
16863 status = lpfc_sli4_post_sgl(
16864 phba, lpfc_ncmd->dma_phys_sgl,
16865 pdma_phys_sgl1, cur_xritag);
16866 if (status) {
c490850a
JS
16867 /* Post error. Buffer unavailable. */
16868 lpfc_ncmd->flags |=
16869 LPFC_SBUF_NOT_POSTED;
0794d601 16870 } else {
c490850a
JS
16871 /* Post success. Bffer available. */
16872 lpfc_ncmd->flags &=
16873 ~LPFC_SBUF_NOT_POSTED;
0794d601
JS
16874 lpfc_ncmd->status = IOSTAT_SUCCESS;
16875 num_posted++;
16876 }
16877 /* success, put on NVME buffer sgl list */
16878 list_add_tail(&lpfc_ncmd->list, &nvme_nblist);
16879 }
16880 }
16881
16882 /* continue until a nembed page worth of sgls */
16883 if (post_cnt == 0)
16884 continue;
16885
16886 /* post block of NVME buffer list sgls */
5e5b511d
JS
16887 status = lpfc_sli4_post_io_sgl_block(phba, &blck_nblist,
16888 post_cnt);
0794d601
JS
16889
16890 /* don't reset xirtag due to hole in xri block */
16891 if (block_cnt == 0)
16892 last_xritag = NO_XRI;
4f774513 16893
0794d601
JS
16894 /* reset NVME buffer post count for next round of posting */
16895 post_cnt = 0;
4f774513 16896
0794d601
JS
16897 /* put posted NVME buffer-sgl posted on NVME buffer sgl list */
16898 while (!list_empty(&blck_nblist)) {
16899 list_remove_head(&blck_nblist, lpfc_ncmd,
c490850a 16900 struct lpfc_io_buf, list);
0794d601 16901 if (status) {
c490850a
JS
16902 /* Post error. Mark buffer unavailable. */
16903 lpfc_ncmd->flags |= LPFC_SBUF_NOT_POSTED;
0794d601 16904 } else {
c490850a
JS
16905 /* Post success, Mark buffer available. */
16906 lpfc_ncmd->flags &= ~LPFC_SBUF_NOT_POSTED;
0794d601
JS
16907 lpfc_ncmd->status = IOSTAT_SUCCESS;
16908 num_posted++;
16909 }
16910 list_add_tail(&lpfc_ncmd->list, &nvme_nblist);
16911 }
4f774513 16912 }
0794d601 16913 /* Push NVME buffers with sgl posted to the available list */
5e5b511d
JS
16914 lpfc_io_buf_replenish(phba, &nvme_nblist);
16915
0794d601 16916 return num_posted;
4f774513
JS
16917}
16918
16919/**
16920 * lpfc_fc_frame_check - Check that this frame is a valid frame to handle
16921 * @phba: pointer to lpfc_hba struct that the frame was received on
16922 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
16923 *
16924 * This function checks the fields in the @fc_hdr to see if the FC frame is a
16925 * valid type of frame that the LPFC driver will handle. This function will
16926 * return a zero if the frame is a valid frame or a non zero value when the
16927 * frame does not pass the check.
16928 **/
16929static int
16930lpfc_fc_frame_check(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr)
16931{
474ffb74 16932 /* make rctl_names static to save stack space */
4f774513 16933 struct fc_vft_header *fc_vft_hdr;
546fc854 16934 uint32_t *header = (uint32_t *) fc_hdr;
4f774513
JS
16935
16936 switch (fc_hdr->fh_r_ctl) {
16937 case FC_RCTL_DD_UNCAT: /* uncategorized information */
16938 case FC_RCTL_DD_SOL_DATA: /* solicited data */
16939 case FC_RCTL_DD_UNSOL_CTL: /* unsolicited control */
16940 case FC_RCTL_DD_SOL_CTL: /* solicited control or reply */
16941 case FC_RCTL_DD_UNSOL_DATA: /* unsolicited data */
16942 case FC_RCTL_DD_DATA_DESC: /* data descriptor */
16943 case FC_RCTL_DD_UNSOL_CMD: /* unsolicited command */
16944 case FC_RCTL_DD_CMD_STATUS: /* command status */
16945 case FC_RCTL_ELS_REQ: /* extended link services request */
16946 case FC_RCTL_ELS_REP: /* extended link services reply */
16947 case FC_RCTL_ELS4_REQ: /* FC-4 ELS request */
16948 case FC_RCTL_ELS4_REP: /* FC-4 ELS reply */
16949 case FC_RCTL_BA_NOP: /* basic link service NOP */
16950 case FC_RCTL_BA_ABTS: /* basic link service abort */
16951 case FC_RCTL_BA_RMC: /* remove connection */
16952 case FC_RCTL_BA_ACC: /* basic accept */
16953 case FC_RCTL_BA_RJT: /* basic reject */
16954 case FC_RCTL_BA_PRMT:
16955 case FC_RCTL_ACK_1: /* acknowledge_1 */
16956 case FC_RCTL_ACK_0: /* acknowledge_0 */
16957 case FC_RCTL_P_RJT: /* port reject */
16958 case FC_RCTL_F_RJT: /* fabric reject */
16959 case FC_RCTL_P_BSY: /* port busy */
16960 case FC_RCTL_F_BSY: /* fabric busy to data frame */
16961 case FC_RCTL_F_BSYL: /* fabric busy to link control frame */
16962 case FC_RCTL_LCR: /* link credit reset */
ae9e28f3 16963 case FC_RCTL_MDS_DIAGS: /* MDS Diagnostics */
4f774513
JS
16964 case FC_RCTL_END: /* end */
16965 break;
16966 case FC_RCTL_VFTH: /* Virtual Fabric tagging Header */
16967 fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
16968 fc_hdr = &((struct fc_frame_header *)fc_vft_hdr)[1];
16969 return lpfc_fc_frame_check(phba, fc_hdr);
16970 default:
16971 goto drop;
16972 }
ae9e28f3 16973
4f774513
JS
16974 switch (fc_hdr->fh_type) {
16975 case FC_TYPE_BLS:
16976 case FC_TYPE_ELS:
16977 case FC_TYPE_FCP:
16978 case FC_TYPE_CT:
895427bd 16979 case FC_TYPE_NVME:
4f774513
JS
16980 break;
16981 case FC_TYPE_IP:
16982 case FC_TYPE_ILS:
16983 default:
16984 goto drop;
16985 }
546fc854 16986
4f774513 16987 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
78e1d200 16988 "2538 Received frame rctl:x%x, type:x%x, "
88f43a08 16989 "frame Data:%08x %08x %08x %08x %08x %08x %08x\n",
78e1d200
JS
16990 fc_hdr->fh_r_ctl, fc_hdr->fh_type,
16991 be32_to_cpu(header[0]), be32_to_cpu(header[1]),
16992 be32_to_cpu(header[2]), be32_to_cpu(header[3]),
16993 be32_to_cpu(header[4]), be32_to_cpu(header[5]),
16994 be32_to_cpu(header[6]));
4f774513
JS
16995 return 0;
16996drop:
16997 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS,
78e1d200
JS
16998 "2539 Dropped frame rctl:x%x type:x%x\n",
16999 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
4f774513
JS
17000 return 1;
17001}
17002
17003/**
17004 * lpfc_fc_hdr_get_vfi - Get the VFI from an FC frame
17005 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17006 *
17007 * This function processes the FC header to retrieve the VFI from the VF
17008 * header, if one exists. This function will return the VFI if one exists
17009 * or 0 if no VSAN Header exists.
17010 **/
17011static uint32_t
17012lpfc_fc_hdr_get_vfi(struct fc_frame_header *fc_hdr)
17013{
17014 struct fc_vft_header *fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
17015
17016 if (fc_hdr->fh_r_ctl != FC_RCTL_VFTH)
17017 return 0;
17018 return bf_get(fc_vft_hdr_vf_id, fc_vft_hdr);
17019}
17020
17021/**
17022 * lpfc_fc_frame_to_vport - Finds the vport that a frame is destined to
17023 * @phba: Pointer to the HBA structure to search for the vport on
17024 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17025 * @fcfi: The FC Fabric ID that the frame came from
17026 *
17027 * This function searches the @phba for a vport that matches the content of the
17028 * @fc_hdr passed in and the @fcfi. This function uses the @fc_hdr to fetch the
17029 * VFI, if the Virtual Fabric Tagging Header exists, and the DID. This function
17030 * returns the matching vport pointer or NULL if unable to match frame to a
17031 * vport.
17032 **/
17033static struct lpfc_vport *
17034lpfc_fc_frame_to_vport(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr,
895427bd 17035 uint16_t fcfi, uint32_t did)
4f774513
JS
17036{
17037 struct lpfc_vport **vports;
17038 struct lpfc_vport *vport = NULL;
17039 int i;
939723a4 17040
bf08611b
JS
17041 if (did == Fabric_DID)
17042 return phba->pport;
939723a4
JS
17043 if ((phba->pport->fc_flag & FC_PT2PT) &&
17044 !(phba->link_state == LPFC_HBA_READY))
17045 return phba->pport;
17046
4f774513 17047 vports = lpfc_create_vport_work_array(phba);
895427bd 17048 if (vports != NULL) {
4f774513
JS
17049 for (i = 0; i <= phba->max_vpi && vports[i] != NULL; i++) {
17050 if (phba->fcf.fcfi == fcfi &&
17051 vports[i]->vfi == lpfc_fc_hdr_get_vfi(fc_hdr) &&
17052 vports[i]->fc_myDID == did) {
17053 vport = vports[i];
17054 break;
17055 }
17056 }
895427bd 17057 }
4f774513
JS
17058 lpfc_destroy_vport_work_array(phba, vports);
17059 return vport;
17060}
17061
45ed1190
JS
17062/**
17063 * lpfc_update_rcv_time_stamp - Update vport's rcv seq time stamp
17064 * @vport: The vport to work on.
17065 *
17066 * This function updates the receive sequence time stamp for this vport. The
17067 * receive sequence time stamp indicates the time that the last frame of the
17068 * the sequence that has been idle for the longest amount of time was received.
17069 * the driver uses this time stamp to indicate if any received sequences have
17070 * timed out.
17071 **/
5d8b8167 17072static void
45ed1190
JS
17073lpfc_update_rcv_time_stamp(struct lpfc_vport *vport)
17074{
17075 struct lpfc_dmabuf *h_buf;
17076 struct hbq_dmabuf *dmabuf = NULL;
17077
17078 /* get the oldest sequence on the rcv list */
17079 h_buf = list_get_first(&vport->rcv_buffer_list,
17080 struct lpfc_dmabuf, list);
17081 if (!h_buf)
17082 return;
17083 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17084 vport->rcv_buffer_time_stamp = dmabuf->time_stamp;
17085}
17086
17087/**
17088 * lpfc_cleanup_rcv_buffers - Cleans up all outstanding receive sequences.
17089 * @vport: The vport that the received sequences were sent to.
17090 *
17091 * This function cleans up all outstanding received sequences. This is called
17092 * by the driver when a link event or user action invalidates all the received
17093 * sequences.
17094 **/
17095void
17096lpfc_cleanup_rcv_buffers(struct lpfc_vport *vport)
17097{
17098 struct lpfc_dmabuf *h_buf, *hnext;
17099 struct lpfc_dmabuf *d_buf, *dnext;
17100 struct hbq_dmabuf *dmabuf = NULL;
17101
17102 /* start with the oldest sequence on the rcv list */
17103 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17104 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17105 list_del_init(&dmabuf->hbuf.list);
17106 list_for_each_entry_safe(d_buf, dnext,
17107 &dmabuf->dbuf.list, list) {
17108 list_del_init(&d_buf->list);
17109 lpfc_in_buf_free(vport->phba, d_buf);
17110 }
17111 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17112 }
17113}
17114
17115/**
17116 * lpfc_rcv_seq_check_edtov - Cleans up timed out receive sequences.
17117 * @vport: The vport that the received sequences were sent to.
17118 *
17119 * This function determines whether any received sequences have timed out by
17120 * first checking the vport's rcv_buffer_time_stamp. If this time_stamp
17121 * indicates that there is at least one timed out sequence this routine will
17122 * go through the received sequences one at a time from most inactive to most
17123 * active to determine which ones need to be cleaned up. Once it has determined
17124 * that a sequence needs to be cleaned up it will simply free up the resources
17125 * without sending an abort.
17126 **/
17127void
17128lpfc_rcv_seq_check_edtov(struct lpfc_vport *vport)
17129{
17130 struct lpfc_dmabuf *h_buf, *hnext;
17131 struct lpfc_dmabuf *d_buf, *dnext;
17132 struct hbq_dmabuf *dmabuf = NULL;
17133 unsigned long timeout;
17134 int abort_count = 0;
17135
17136 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17137 vport->rcv_buffer_time_stamp);
17138 if (list_empty(&vport->rcv_buffer_list) ||
17139 time_before(jiffies, timeout))
17140 return;
17141 /* start with the oldest sequence on the rcv list */
17142 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17143 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17144 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17145 dmabuf->time_stamp);
17146 if (time_before(jiffies, timeout))
17147 break;
17148 abort_count++;
17149 list_del_init(&dmabuf->hbuf.list);
17150 list_for_each_entry_safe(d_buf, dnext,
17151 &dmabuf->dbuf.list, list) {
17152 list_del_init(&d_buf->list);
17153 lpfc_in_buf_free(vport->phba, d_buf);
17154 }
17155 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17156 }
17157 if (abort_count)
17158 lpfc_update_rcv_time_stamp(vport);
17159}
17160
4f774513
JS
17161/**
17162 * lpfc_fc_frame_add - Adds a frame to the vport's list of received sequences
17163 * @dmabuf: pointer to a dmabuf that describes the hdr and data of the FC frame
17164 *
17165 * This function searches through the existing incomplete sequences that have
17166 * been sent to this @vport. If the frame matches one of the incomplete
17167 * sequences then the dbuf in the @dmabuf is added to the list of frames that
17168 * make up that sequence. If no sequence is found that matches this frame then
17169 * the function will add the hbuf in the @dmabuf to the @vport's rcv_buffer_list
17170 * This function returns a pointer to the first dmabuf in the sequence list that
17171 * the frame was linked to.
17172 **/
17173static struct hbq_dmabuf *
17174lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17175{
17176 struct fc_frame_header *new_hdr;
17177 struct fc_frame_header *temp_hdr;
17178 struct lpfc_dmabuf *d_buf;
17179 struct lpfc_dmabuf *h_buf;
17180 struct hbq_dmabuf *seq_dmabuf = NULL;
17181 struct hbq_dmabuf *temp_dmabuf = NULL;
4360ca9c 17182 uint8_t found = 0;
4f774513 17183
4d9ab994 17184 INIT_LIST_HEAD(&dmabuf->dbuf.list);
45ed1190 17185 dmabuf->time_stamp = jiffies;
4f774513 17186 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
4360ca9c 17187
4f774513
JS
17188 /* Use the hdr_buf to find the sequence that this frame belongs to */
17189 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17190 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17191 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17192 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17193 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17194 continue;
17195 /* found a pending sequence that matches this frame */
17196 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17197 break;
17198 }
17199 if (!seq_dmabuf) {
17200 /*
17201 * This indicates first frame received for this sequence.
17202 * Queue the buffer on the vport's rcv_buffer_list.
17203 */
17204 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
45ed1190 17205 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17206 return dmabuf;
17207 }
17208 temp_hdr = seq_dmabuf->hbuf.virt;
eeead811
JS
17209 if (be16_to_cpu(new_hdr->fh_seq_cnt) <
17210 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4d9ab994
JS
17211 list_del_init(&seq_dmabuf->hbuf.list);
17212 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
17213 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
45ed1190 17214 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17215 return dmabuf;
17216 }
45ed1190
JS
17217 /* move this sequence to the tail to indicate a young sequence */
17218 list_move_tail(&seq_dmabuf->hbuf.list, &vport->rcv_buffer_list);
17219 seq_dmabuf->time_stamp = jiffies;
17220 lpfc_update_rcv_time_stamp(vport);
eeead811
JS
17221 if (list_empty(&seq_dmabuf->dbuf.list)) {
17222 temp_hdr = dmabuf->hbuf.virt;
17223 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
17224 return seq_dmabuf;
17225 }
4f774513 17226 /* find the correct place in the sequence to insert this frame */
4360ca9c
JS
17227 d_buf = list_entry(seq_dmabuf->dbuf.list.prev, typeof(*d_buf), list);
17228 while (!found) {
4f774513
JS
17229 temp_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17230 temp_hdr = (struct fc_frame_header *)temp_dmabuf->hbuf.virt;
17231 /*
17232 * If the frame's sequence count is greater than the frame on
17233 * the list then insert the frame right after this frame
17234 */
eeead811
JS
17235 if (be16_to_cpu(new_hdr->fh_seq_cnt) >
17236 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4f774513 17237 list_add(&dmabuf->dbuf.list, &temp_dmabuf->dbuf.list);
4360ca9c
JS
17238 found = 1;
17239 break;
4f774513 17240 }
4360ca9c
JS
17241
17242 if (&d_buf->list == &seq_dmabuf->dbuf.list)
17243 break;
17244 d_buf = list_entry(d_buf->list.prev, typeof(*d_buf), list);
4f774513 17245 }
4360ca9c
JS
17246
17247 if (found)
17248 return seq_dmabuf;
4f774513
JS
17249 return NULL;
17250}
17251
6669f9bb
JS
17252/**
17253 * lpfc_sli4_abort_partial_seq - Abort partially assembled unsol sequence
17254 * @vport: pointer to a vitural port
17255 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17256 *
17257 * This function tries to abort from the partially assembed sequence, described
17258 * by the information from basic abbort @dmabuf. It checks to see whether such
17259 * partially assembled sequence held by the driver. If so, it shall free up all
17260 * the frames from the partially assembled sequence.
17261 *
17262 * Return
17263 * true -- if there is matching partially assembled sequence present and all
17264 * the frames freed with the sequence;
17265 * false -- if there is no matching partially assembled sequence present so
17266 * nothing got aborted in the lower layer driver
17267 **/
17268static bool
17269lpfc_sli4_abort_partial_seq(struct lpfc_vport *vport,
17270 struct hbq_dmabuf *dmabuf)
17271{
17272 struct fc_frame_header *new_hdr;
17273 struct fc_frame_header *temp_hdr;
17274 struct lpfc_dmabuf *d_buf, *n_buf, *h_buf;
17275 struct hbq_dmabuf *seq_dmabuf = NULL;
17276
17277 /* Use the hdr_buf to find the sequence that matches this frame */
17278 INIT_LIST_HEAD(&dmabuf->dbuf.list);
17279 INIT_LIST_HEAD(&dmabuf->hbuf.list);
17280 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17281 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17282 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17283 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17284 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17285 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17286 continue;
17287 /* found a pending sequence that matches this frame */
17288 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17289 break;
17290 }
17291
17292 /* Free up all the frames from the partially assembled sequence */
17293 if (seq_dmabuf) {
17294 list_for_each_entry_safe(d_buf, n_buf,
17295 &seq_dmabuf->dbuf.list, list) {
17296 list_del_init(&d_buf->list);
17297 lpfc_in_buf_free(vport->phba, d_buf);
17298 }
17299 return true;
17300 }
17301 return false;
17302}
17303
6dd9e31c
JS
17304/**
17305 * lpfc_sli4_abort_ulp_seq - Abort assembled unsol sequence from ulp
17306 * @vport: pointer to a vitural port
17307 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17308 *
17309 * This function tries to abort from the assembed sequence from upper level
17310 * protocol, described by the information from basic abbort @dmabuf. It
17311 * checks to see whether such pending context exists at upper level protocol.
17312 * If so, it shall clean up the pending context.
17313 *
17314 * Return
17315 * true -- if there is matching pending context of the sequence cleaned
17316 * at ulp;
17317 * false -- if there is no matching pending context of the sequence present
17318 * at ulp.
17319 **/
17320static bool
17321lpfc_sli4_abort_ulp_seq(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17322{
17323 struct lpfc_hba *phba = vport->phba;
17324 int handled;
17325
17326 /* Accepting abort at ulp with SLI4 only */
17327 if (phba->sli_rev < LPFC_SLI_REV4)
17328 return false;
17329
17330 /* Register all caring upper level protocols to attend abort */
17331 handled = lpfc_ct_handle_unsol_abort(phba, dmabuf);
17332 if (handled)
17333 return true;
17334
17335 return false;
17336}
17337
6669f9bb 17338/**
546fc854 17339 * lpfc_sli4_seq_abort_rsp_cmpl - BLS ABORT RSP seq abort iocb complete handler
6669f9bb
JS
17340 * @phba: Pointer to HBA context object.
17341 * @cmd_iocbq: pointer to the command iocbq structure.
17342 * @rsp_iocbq: pointer to the response iocbq structure.
17343 *
546fc854 17344 * This function handles the sequence abort response iocb command complete
6669f9bb
JS
17345 * event. It properly releases the memory allocated to the sequence abort
17346 * accept iocb.
17347 **/
17348static void
546fc854 17349lpfc_sli4_seq_abort_rsp_cmpl(struct lpfc_hba *phba,
6669f9bb
JS
17350 struct lpfc_iocbq *cmd_iocbq,
17351 struct lpfc_iocbq *rsp_iocbq)
17352{
6dd9e31c
JS
17353 struct lpfc_nodelist *ndlp;
17354
17355 if (cmd_iocbq) {
17356 ndlp = (struct lpfc_nodelist *)cmd_iocbq->context1;
17357 lpfc_nlp_put(ndlp);
17358 lpfc_nlp_not_used(ndlp);
6669f9bb 17359 lpfc_sli_release_iocbq(phba, cmd_iocbq);
6dd9e31c 17360 }
6b5151fd
JS
17361
17362 /* Failure means BLS ABORT RSP did not get delivered to remote node*/
17363 if (rsp_iocbq && rsp_iocbq->iocb.ulpStatus)
17364 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17365 "3154 BLS ABORT RSP failed, data: x%x/x%x\n",
17366 rsp_iocbq->iocb.ulpStatus,
17367 rsp_iocbq->iocb.un.ulpWord[4]);
6669f9bb
JS
17368}
17369
6d368e53
JS
17370/**
17371 * lpfc_sli4_xri_inrange - check xri is in range of xris owned by driver.
17372 * @phba: Pointer to HBA context object.
17373 * @xri: xri id in transaction.
17374 *
17375 * This function validates the xri maps to the known range of XRIs allocated an
17376 * used by the driver.
17377 **/
7851fe2c 17378uint16_t
6d368e53
JS
17379lpfc_sli4_xri_inrange(struct lpfc_hba *phba,
17380 uint16_t xri)
17381{
a2fc4aef 17382 uint16_t i;
6d368e53
JS
17383
17384 for (i = 0; i < phba->sli4_hba.max_cfg_param.max_xri; i++) {
17385 if (xri == phba->sli4_hba.xri_ids[i])
17386 return i;
17387 }
17388 return NO_XRI;
17389}
17390
6669f9bb 17391/**
546fc854 17392 * lpfc_sli4_seq_abort_rsp - bls rsp to sequence abort
6669f9bb
JS
17393 * @phba: Pointer to HBA context object.
17394 * @fc_hdr: pointer to a FC frame header.
17395 *
546fc854 17396 * This function sends a basic response to a previous unsol sequence abort
6669f9bb
JS
17397 * event after aborting the sequence handling.
17398 **/
86c67379 17399void
6dd9e31c
JS
17400lpfc_sli4_seq_abort_rsp(struct lpfc_vport *vport,
17401 struct fc_frame_header *fc_hdr, bool aborted)
6669f9bb 17402{
6dd9e31c 17403 struct lpfc_hba *phba = vport->phba;
6669f9bb
JS
17404 struct lpfc_iocbq *ctiocb = NULL;
17405 struct lpfc_nodelist *ndlp;
ee0f4fe1 17406 uint16_t oxid, rxid, xri, lxri;
5ffc266e 17407 uint32_t sid, fctl;
6669f9bb 17408 IOCB_t *icmd;
546fc854 17409 int rc;
6669f9bb
JS
17410
17411 if (!lpfc_is_link_up(phba))
17412 return;
17413
17414 sid = sli4_sid_from_fc_hdr(fc_hdr);
17415 oxid = be16_to_cpu(fc_hdr->fh_ox_id);
5ffc266e 17416 rxid = be16_to_cpu(fc_hdr->fh_rx_id);
6669f9bb 17417
6dd9e31c 17418 ndlp = lpfc_findnode_did(vport, sid);
6669f9bb 17419 if (!ndlp) {
9d3d340d 17420 ndlp = lpfc_nlp_init(vport, sid);
6dd9e31c
JS
17421 if (!ndlp) {
17422 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17423 "1268 Failed to allocate ndlp for "
17424 "oxid:x%x SID:x%x\n", oxid, sid);
17425 return;
17426 }
6dd9e31c
JS
17427 /* Put ndlp onto pport node list */
17428 lpfc_enqueue_node(vport, ndlp);
17429 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
17430 /* re-setup ndlp without removing from node list */
17431 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
17432 if (!ndlp) {
17433 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17434 "3275 Failed to active ndlp found "
17435 "for oxid:x%x SID:x%x\n", oxid, sid);
17436 return;
17437 }
6669f9bb
JS
17438 }
17439
546fc854 17440 /* Allocate buffer for rsp iocb */
6669f9bb
JS
17441 ctiocb = lpfc_sli_get_iocbq(phba);
17442 if (!ctiocb)
17443 return;
17444
5ffc266e
JS
17445 /* Extract the F_CTL field from FC_HDR */
17446 fctl = sli4_fctl_from_fc_hdr(fc_hdr);
17447
6669f9bb 17448 icmd = &ctiocb->iocb;
6669f9bb 17449 icmd->un.xseq64.bdl.bdeSize = 0;
5ffc266e 17450 icmd->un.xseq64.bdl.ulpIoTag32 = 0;
6669f9bb
JS
17451 icmd->un.xseq64.w5.hcsw.Dfctl = 0;
17452 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_ACC;
17453 icmd->un.xseq64.w5.hcsw.Type = FC_TYPE_BLS;
17454
17455 /* Fill in the rest of iocb fields */
17456 icmd->ulpCommand = CMD_XMIT_BLS_RSP64_CX;
17457 icmd->ulpBdeCount = 0;
17458 icmd->ulpLe = 1;
17459 icmd->ulpClass = CLASS3;
6d368e53 17460 icmd->ulpContext = phba->sli4_hba.rpi_ids[ndlp->nlp_rpi];
6dd9e31c 17461 ctiocb->context1 = lpfc_nlp_get(ndlp);
6669f9bb 17462
6669f9bb 17463 ctiocb->vport = phba->pport;
546fc854 17464 ctiocb->iocb_cmpl = lpfc_sli4_seq_abort_rsp_cmpl;
6d368e53 17465 ctiocb->sli4_lxritag = NO_XRI;
546fc854
JS
17466 ctiocb->sli4_xritag = NO_XRI;
17467
ee0f4fe1
JS
17468 if (fctl & FC_FC_EX_CTX)
17469 /* Exchange responder sent the abort so we
17470 * own the oxid.
17471 */
17472 xri = oxid;
17473 else
17474 xri = rxid;
17475 lxri = lpfc_sli4_xri_inrange(phba, xri);
17476 if (lxri != NO_XRI)
17477 lpfc_set_rrq_active(phba, ndlp, lxri,
17478 (xri == oxid) ? rxid : oxid, 0);
6dd9e31c
JS
17479 /* For BA_ABTS from exchange responder, if the logical xri with
17480 * the oxid maps to the FCP XRI range, the port no longer has
17481 * that exchange context, send a BLS_RJT. Override the IOCB for
17482 * a BA_RJT.
17483 */
17484 if ((fctl & FC_FC_EX_CTX) &&
895427bd 17485 (lxri > lpfc_sli4_get_iocb_cnt(phba))) {
6dd9e31c
JS
17486 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17487 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17488 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17489 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17490 }
17491
17492 /* If BA_ABTS failed to abort a partially assembled receive sequence,
17493 * the driver no longer has that exchange, send a BLS_RJT. Override
17494 * the IOCB for a BA_RJT.
546fc854 17495 */
6dd9e31c 17496 if (aborted == false) {
546fc854
JS
17497 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17498 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17499 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17500 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17501 }
6669f9bb 17502
5ffc266e
JS
17503 if (fctl & FC_FC_EX_CTX) {
17504 /* ABTS sent by responder to CT exchange, construction
17505 * of BA_ACC will use OX_ID from ABTS for the XRI_TAG
17506 * field and RX_ID from ABTS for RX_ID field.
17507 */
546fc854 17508 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_RSP);
5ffc266e
JS
17509 } else {
17510 /* ABTS sent by initiator to CT exchange, construction
17511 * of BA_ACC will need to allocate a new XRI as for the
f09c3acc 17512 * XRI_TAG field.
5ffc266e 17513 */
546fc854 17514 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_INT);
5ffc266e 17515 }
f09c3acc 17516 bf_set(lpfc_abts_rxid, &icmd->un.bls_rsp, rxid);
546fc854 17517 bf_set(lpfc_abts_oxid, &icmd->un.bls_rsp, oxid);
5ffc266e 17518
546fc854 17519 /* Xmit CT abts response on exchange <xid> */
6dd9e31c
JS
17520 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,
17521 "1200 Send BLS cmd x%x on oxid x%x Data: x%x\n",
17522 icmd->un.xseq64.w5.hcsw.Rctl, oxid, phba->link_state);
546fc854
JS
17523
17524 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, ctiocb, 0);
17525 if (rc == IOCB_ERROR) {
6dd9e31c
JS
17526 lpfc_printf_vlog(vport, KERN_ERR, LOG_ELS,
17527 "2925 Failed to issue CT ABTS RSP x%x on "
17528 "xri x%x, Data x%x\n",
17529 icmd->un.xseq64.w5.hcsw.Rctl, oxid,
17530 phba->link_state);
17531 lpfc_nlp_put(ndlp);
17532 ctiocb->context1 = NULL;
546fc854
JS
17533 lpfc_sli_release_iocbq(phba, ctiocb);
17534 }
6669f9bb
JS
17535}
17536
17537/**
17538 * lpfc_sli4_handle_unsol_abort - Handle sli-4 unsolicited abort event
17539 * @vport: Pointer to the vport on which this sequence was received
17540 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17541 *
17542 * This function handles an SLI-4 unsolicited abort event. If the unsolicited
17543 * receive sequence is only partially assembed by the driver, it shall abort
17544 * the partially assembled frames for the sequence. Otherwise, if the
17545 * unsolicited receive sequence has been completely assembled and passed to
17546 * the Upper Layer Protocol (UPL), it then mark the per oxid status for the
17547 * unsolicited sequence has been aborted. After that, it will issue a basic
17548 * accept to accept the abort.
17549 **/
5d8b8167 17550static void
6669f9bb
JS
17551lpfc_sli4_handle_unsol_abort(struct lpfc_vport *vport,
17552 struct hbq_dmabuf *dmabuf)
17553{
17554 struct lpfc_hba *phba = vport->phba;
17555 struct fc_frame_header fc_hdr;
5ffc266e 17556 uint32_t fctl;
6dd9e31c 17557 bool aborted;
6669f9bb 17558
6669f9bb
JS
17559 /* Make a copy of fc_hdr before the dmabuf being released */
17560 memcpy(&fc_hdr, dmabuf->hbuf.virt, sizeof(struct fc_frame_header));
5ffc266e 17561 fctl = sli4_fctl_from_fc_hdr(&fc_hdr);
6669f9bb 17562
5ffc266e 17563 if (fctl & FC_FC_EX_CTX) {
6dd9e31c
JS
17564 /* ABTS by responder to exchange, no cleanup needed */
17565 aborted = true;
5ffc266e 17566 } else {
6dd9e31c
JS
17567 /* ABTS by initiator to exchange, need to do cleanup */
17568 aborted = lpfc_sli4_abort_partial_seq(vport, dmabuf);
17569 if (aborted == false)
17570 aborted = lpfc_sli4_abort_ulp_seq(vport, dmabuf);
5ffc266e 17571 }
6dd9e31c
JS
17572 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17573
86c67379
JS
17574 if (phba->nvmet_support) {
17575 lpfc_nvmet_rcv_unsol_abort(vport, &fc_hdr);
17576 return;
17577 }
17578
6dd9e31c
JS
17579 /* Respond with BA_ACC or BA_RJT accordingly */
17580 lpfc_sli4_seq_abort_rsp(vport, &fc_hdr, aborted);
6669f9bb
JS
17581}
17582
4f774513
JS
17583/**
17584 * lpfc_seq_complete - Indicates if a sequence is complete
17585 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17586 *
17587 * This function checks the sequence, starting with the frame described by
17588 * @dmabuf, to see if all the frames associated with this sequence are present.
17589 * the frames associated with this sequence are linked to the @dmabuf using the
17590 * dbuf list. This function looks for two major things. 1) That the first frame
17591 * has a sequence count of zero. 2) There is a frame with last frame of sequence
17592 * set. 3) That there are no holes in the sequence count. The function will
17593 * return 1 when the sequence is complete, otherwise it will return 0.
17594 **/
17595static int
17596lpfc_seq_complete(struct hbq_dmabuf *dmabuf)
17597{
17598 struct fc_frame_header *hdr;
17599 struct lpfc_dmabuf *d_buf;
17600 struct hbq_dmabuf *seq_dmabuf;
17601 uint32_t fctl;
17602 int seq_count = 0;
17603
17604 hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17605 /* make sure first fame of sequence has a sequence count of zero */
17606 if (hdr->fh_seq_cnt != seq_count)
17607 return 0;
17608 fctl = (hdr->fh_f_ctl[0] << 16 |
17609 hdr->fh_f_ctl[1] << 8 |
17610 hdr->fh_f_ctl[2]);
17611 /* If last frame of sequence we can return success. */
17612 if (fctl & FC_FC_END_SEQ)
17613 return 1;
17614 list_for_each_entry(d_buf, &dmabuf->dbuf.list, list) {
17615 seq_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17616 hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17617 /* If there is a hole in the sequence count then fail. */
eeead811 17618 if (++seq_count != be16_to_cpu(hdr->fh_seq_cnt))
4f774513
JS
17619 return 0;
17620 fctl = (hdr->fh_f_ctl[0] << 16 |
17621 hdr->fh_f_ctl[1] << 8 |
17622 hdr->fh_f_ctl[2]);
17623 /* If last frame of sequence we can return success. */
17624 if (fctl & FC_FC_END_SEQ)
17625 return 1;
17626 }
17627 return 0;
17628}
17629
17630/**
17631 * lpfc_prep_seq - Prep sequence for ULP processing
17632 * @vport: Pointer to the vport on which this sequence was received
17633 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17634 *
17635 * This function takes a sequence, described by a list of frames, and creates
17636 * a list of iocbq structures to describe the sequence. This iocbq list will be
17637 * used to issue to the generic unsolicited sequence handler. This routine
17638 * returns a pointer to the first iocbq in the list. If the function is unable
17639 * to allocate an iocbq then it throw out the received frames that were not
17640 * able to be described and return a pointer to the first iocbq. If unable to
17641 * allocate any iocbqs (including the first) this function will return NULL.
17642 **/
17643static struct lpfc_iocbq *
17644lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
17645{
7851fe2c 17646 struct hbq_dmabuf *hbq_buf;
4f774513
JS
17647 struct lpfc_dmabuf *d_buf, *n_buf;
17648 struct lpfc_iocbq *first_iocbq, *iocbq;
17649 struct fc_frame_header *fc_hdr;
17650 uint32_t sid;
7851fe2c 17651 uint32_t len, tot_len;
eeead811 17652 struct ulp_bde64 *pbde;
4f774513
JS
17653
17654 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17655 /* remove from receive buffer list */
17656 list_del_init(&seq_dmabuf->hbuf.list);
45ed1190 17657 lpfc_update_rcv_time_stamp(vport);
4f774513 17658 /* get the Remote Port's SID */
6669f9bb 17659 sid = sli4_sid_from_fc_hdr(fc_hdr);
7851fe2c 17660 tot_len = 0;
4f774513
JS
17661 /* Get an iocbq struct to fill in. */
17662 first_iocbq = lpfc_sli_get_iocbq(vport->phba);
17663 if (first_iocbq) {
17664 /* Initialize the first IOCB. */
8fa38513 17665 first_iocbq->iocb.unsli3.rcvsli3.acc_len = 0;
4f774513 17666 first_iocbq->iocb.ulpStatus = IOSTAT_SUCCESS;
895427bd 17667 first_iocbq->vport = vport;
939723a4
JS
17668
17669 /* Check FC Header to see what TYPE of frame we are rcv'ing */
17670 if (sli4_type_from_fc_hdr(fc_hdr) == FC_TYPE_ELS) {
17671 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_ELS64_CX;
17672 first_iocbq->iocb.un.rcvels.parmRo =
17673 sli4_did_from_fc_hdr(fc_hdr);
17674 first_iocbq->iocb.ulpPU = PARM_NPIV_DID;
17675 } else
17676 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_SEQ64_CX;
7851fe2c
JS
17677 first_iocbq->iocb.ulpContext = NO_XRI;
17678 first_iocbq->iocb.unsli3.rcvsli3.ox_id =
17679 be16_to_cpu(fc_hdr->fh_ox_id);
17680 /* iocbq is prepped for internal consumption. Physical vpi. */
17681 first_iocbq->iocb.unsli3.rcvsli3.vpi =
17682 vport->phba->vpi_ids[vport->vpi];
4f774513 17683 /* put the first buffer into the first IOCBq */
48a5a664
JS
17684 tot_len = bf_get(lpfc_rcqe_length,
17685 &seq_dmabuf->cq_event.cqe.rcqe_cmpl);
17686
4f774513
JS
17687 first_iocbq->context2 = &seq_dmabuf->dbuf;
17688 first_iocbq->context3 = NULL;
17689 first_iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17690 if (tot_len > LPFC_DATA_BUF_SIZE)
17691 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17692 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17693 else
17694 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize = tot_len;
17695
4f774513 17696 first_iocbq->iocb.un.rcvels.remoteID = sid;
48a5a664 17697
7851fe2c 17698 first_iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
4f774513
JS
17699 }
17700 iocbq = first_iocbq;
17701 /*
17702 * Each IOCBq can have two Buffers assigned, so go through the list
17703 * of buffers for this sequence and save two buffers in each IOCBq
17704 */
17705 list_for_each_entry_safe(d_buf, n_buf, &seq_dmabuf->dbuf.list, list) {
17706 if (!iocbq) {
17707 lpfc_in_buf_free(vport->phba, d_buf);
17708 continue;
17709 }
17710 if (!iocbq->context3) {
17711 iocbq->context3 = d_buf;
17712 iocbq->iocb.ulpBdeCount++;
7851fe2c
JS
17713 /* We need to get the size out of the right CQE */
17714 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17715 len = bf_get(lpfc_rcqe_length,
17716 &hbq_buf->cq_event.cqe.rcqe_cmpl);
48a5a664
JS
17717 pbde = (struct ulp_bde64 *)
17718 &iocbq->iocb.unsli3.sli3Words[4];
17719 if (len > LPFC_DATA_BUF_SIZE)
17720 pbde->tus.f.bdeSize = LPFC_DATA_BUF_SIZE;
17721 else
17722 pbde->tus.f.bdeSize = len;
17723
7851fe2c
JS
17724 iocbq->iocb.unsli3.rcvsli3.acc_len += len;
17725 tot_len += len;
4f774513
JS
17726 } else {
17727 iocbq = lpfc_sli_get_iocbq(vport->phba);
17728 if (!iocbq) {
17729 if (first_iocbq) {
17730 first_iocbq->iocb.ulpStatus =
17731 IOSTAT_FCP_RSP_ERROR;
17732 first_iocbq->iocb.un.ulpWord[4] =
17733 IOERR_NO_RESOURCES;
17734 }
17735 lpfc_in_buf_free(vport->phba, d_buf);
17736 continue;
17737 }
48a5a664
JS
17738 /* We need to get the size out of the right CQE */
17739 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17740 len = bf_get(lpfc_rcqe_length,
17741 &hbq_buf->cq_event.cqe.rcqe_cmpl);
4f774513
JS
17742 iocbq->context2 = d_buf;
17743 iocbq->context3 = NULL;
17744 iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17745 if (len > LPFC_DATA_BUF_SIZE)
17746 iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17747 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17748 else
17749 iocbq->iocb.un.cont64[0].tus.f.bdeSize = len;
7851fe2c 17750
7851fe2c
JS
17751 tot_len += len;
17752 iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
17753
4f774513
JS
17754 iocbq->iocb.un.rcvels.remoteID = sid;
17755 list_add_tail(&iocbq->list, &first_iocbq->list);
17756 }
17757 }
17758 return first_iocbq;
17759}
17760
6669f9bb
JS
17761static void
17762lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *vport,
17763 struct hbq_dmabuf *seq_dmabuf)
17764{
17765 struct fc_frame_header *fc_hdr;
17766 struct lpfc_iocbq *iocbq, *curr_iocb, *next_iocb;
17767 struct lpfc_hba *phba = vport->phba;
17768
17769 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17770 iocbq = lpfc_prep_seq(vport, seq_dmabuf);
17771 if (!iocbq) {
17772 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17773 "2707 Ring %d handler: Failed to allocate "
17774 "iocb Rctl x%x Type x%x received\n",
17775 LPFC_ELS_RING,
17776 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17777 return;
17778 }
17779 if (!lpfc_complete_unsol_iocb(phba,
895427bd 17780 phba->sli4_hba.els_wq->pring,
6669f9bb
JS
17781 iocbq, fc_hdr->fh_r_ctl,
17782 fc_hdr->fh_type))
6d368e53 17783 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6669f9bb
JS
17784 "2540 Ring %d handler: unexpected Rctl "
17785 "x%x Type x%x received\n",
17786 LPFC_ELS_RING,
17787 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17788
17789 /* Free iocb created in lpfc_prep_seq */
17790 list_for_each_entry_safe(curr_iocb, next_iocb,
17791 &iocbq->list, list) {
17792 list_del_init(&curr_iocb->list);
17793 lpfc_sli_release_iocbq(phba, curr_iocb);
17794 }
17795 lpfc_sli_release_iocbq(phba, iocbq);
17796}
17797
ae9e28f3
JS
17798static void
17799lpfc_sli4_mds_loopback_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
17800 struct lpfc_iocbq *rspiocb)
17801{
17802 struct lpfc_dmabuf *pcmd = cmdiocb->context2;
17803
17804 if (pcmd && pcmd->virt)
771db5c0 17805 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3
JS
17806 kfree(pcmd);
17807 lpfc_sli_release_iocbq(phba, cmdiocb);
e817e5d7 17808 lpfc_drain_txq(phba);
ae9e28f3
JS
17809}
17810
17811static void
17812lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
17813 struct hbq_dmabuf *dmabuf)
17814{
17815 struct fc_frame_header *fc_hdr;
17816 struct lpfc_hba *phba = vport->phba;
17817 struct lpfc_iocbq *iocbq = NULL;
17818 union lpfc_wqe *wqe;
17819 struct lpfc_dmabuf *pcmd = NULL;
17820 uint32_t frame_len;
17821 int rc;
e817e5d7 17822 unsigned long iflags;
ae9e28f3
JS
17823
17824 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17825 frame_len = bf_get(lpfc_rcqe_length, &dmabuf->cq_event.cqe.rcqe_cmpl);
17826
17827 /* Send the received frame back */
17828 iocbq = lpfc_sli_get_iocbq(phba);
e817e5d7
JS
17829 if (!iocbq) {
17830 /* Queue cq event and wakeup worker thread to process it */
17831 spin_lock_irqsave(&phba->hbalock, iflags);
17832 list_add_tail(&dmabuf->cq_event.list,
17833 &phba->sli4_hba.sp_queue_event);
17834 phba->hba_flag |= HBA_SP_QUEUE_EVT;
17835 spin_unlock_irqrestore(&phba->hbalock, iflags);
17836 lpfc_worker_wake_up(phba);
17837 return;
17838 }
ae9e28f3
JS
17839
17840 /* Allocate buffer for command payload */
17841 pcmd = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
17842 if (pcmd)
771db5c0 17843 pcmd->virt = dma_pool_alloc(phba->lpfc_drb_pool, GFP_KERNEL,
ae9e28f3
JS
17844 &pcmd->phys);
17845 if (!pcmd || !pcmd->virt)
17846 goto exit;
17847
17848 INIT_LIST_HEAD(&pcmd->list);
17849
17850 /* copyin the payload */
17851 memcpy(pcmd->virt, dmabuf->dbuf.virt, frame_len);
17852
17853 /* fill in BDE's for command */
17854 iocbq->iocb.un.xseq64.bdl.addrHigh = putPaddrHigh(pcmd->phys);
17855 iocbq->iocb.un.xseq64.bdl.addrLow = putPaddrLow(pcmd->phys);
17856 iocbq->iocb.un.xseq64.bdl.bdeFlags = BUFF_TYPE_BDE_64;
17857 iocbq->iocb.un.xseq64.bdl.bdeSize = frame_len;
17858
17859 iocbq->context2 = pcmd;
17860 iocbq->vport = vport;
17861 iocbq->iocb_flag &= ~LPFC_FIP_ELS_ID_MASK;
17862 iocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
17863
17864 /*
17865 * Setup rest of the iocb as though it were a WQE
17866 * Build the SEND_FRAME WQE
17867 */
17868 wqe = (union lpfc_wqe *)&iocbq->iocb;
17869
17870 wqe->send_frame.frame_len = frame_len;
17871 wqe->send_frame.fc_hdr_wd0 = be32_to_cpu(*((uint32_t *)fc_hdr));
17872 wqe->send_frame.fc_hdr_wd1 = be32_to_cpu(*((uint32_t *)fc_hdr + 1));
17873 wqe->send_frame.fc_hdr_wd2 = be32_to_cpu(*((uint32_t *)fc_hdr + 2));
17874 wqe->send_frame.fc_hdr_wd3 = be32_to_cpu(*((uint32_t *)fc_hdr + 3));
17875 wqe->send_frame.fc_hdr_wd4 = be32_to_cpu(*((uint32_t *)fc_hdr + 4));
17876 wqe->send_frame.fc_hdr_wd5 = be32_to_cpu(*((uint32_t *)fc_hdr + 5));
17877
17878 iocbq->iocb.ulpCommand = CMD_SEND_FRAME;
17879 iocbq->iocb.ulpLe = 1;
17880 iocbq->iocb_cmpl = lpfc_sli4_mds_loopback_cmpl;
17881 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, iocbq, 0);
17882 if (rc == IOCB_ERROR)
17883 goto exit;
17884
17885 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17886 return;
17887
17888exit:
17889 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
17890 "2023 Unable to process MDS loopback frame\n");
17891 if (pcmd && pcmd->virt)
771db5c0 17892 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3 17893 kfree(pcmd);
401bb416
DK
17894 if (iocbq)
17895 lpfc_sli_release_iocbq(phba, iocbq);
ae9e28f3
JS
17896 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17897}
17898
4f774513
JS
17899/**
17900 * lpfc_sli4_handle_received_buffer - Handle received buffers from firmware
17901 * @phba: Pointer to HBA context object.
17902 *
17903 * This function is called with no lock held. This function processes all
17904 * the received buffers and gives it to upper layers when a received buffer
17905 * indicates that it is the final frame in the sequence. The interrupt
895427bd 17906 * service routine processes received buffers at interrupt contexts.
4f774513
JS
17907 * Worker thread calls lpfc_sli4_handle_received_buffer, which will call the
17908 * appropriate receive function when the final frame in a sequence is received.
17909 **/
4d9ab994
JS
17910void
17911lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,
17912 struct hbq_dmabuf *dmabuf)
4f774513 17913{
4d9ab994 17914 struct hbq_dmabuf *seq_dmabuf;
4f774513
JS
17915 struct fc_frame_header *fc_hdr;
17916 struct lpfc_vport *vport;
17917 uint32_t fcfi;
939723a4 17918 uint32_t did;
4f774513 17919
4f774513 17920 /* Process each received buffer */
4d9ab994 17921 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
2ea259ee 17922
e817e5d7
JS
17923 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
17924 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
17925 vport = phba->pport;
17926 /* Handle MDS Loopback frames */
17927 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
17928 return;
17929 }
17930
4d9ab994
JS
17931 /* check to see if this a valid type of frame */
17932 if (lpfc_fc_frame_check(phba, fc_hdr)) {
17933 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17934 return;
17935 }
2ea259ee 17936
7851fe2c
JS
17937 if ((bf_get(lpfc_cqe_code,
17938 &dmabuf->cq_event.cqe.rcqe_cmpl) == CQE_CODE_RECEIVE_V1))
17939 fcfi = bf_get(lpfc_rcqe_fcf_id_v1,
17940 &dmabuf->cq_event.cqe.rcqe_cmpl);
17941 else
17942 fcfi = bf_get(lpfc_rcqe_fcf_id,
17943 &dmabuf->cq_event.cqe.rcqe_cmpl);
939723a4 17944
895427bd
JS
17945 /* d_id this frame is directed to */
17946 did = sli4_did_from_fc_hdr(fc_hdr);
17947
17948 vport = lpfc_fc_frame_to_vport(phba, fc_hdr, fcfi, did);
939723a4 17949 if (!vport) {
4d9ab994
JS
17950 /* throw out the frame */
17951 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17952 return;
17953 }
939723a4 17954
939723a4
JS
17955 /* vport is registered unless we rcv a FLOGI directed to Fabric_DID */
17956 if (!(vport->vpi_state & LPFC_VPI_REGISTERED) &&
17957 (did != Fabric_DID)) {
17958 /*
17959 * Throw out the frame if we are not pt2pt.
17960 * The pt2pt protocol allows for discovery frames
17961 * to be received without a registered VPI.
17962 */
17963 if (!(vport->fc_flag & FC_PT2PT) ||
17964 (phba->link_state == LPFC_HBA_READY)) {
17965 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17966 return;
17967 }
17968 }
17969
6669f9bb
JS
17970 /* Handle the basic abort sequence (BA_ABTS) event */
17971 if (fc_hdr->fh_r_ctl == FC_RCTL_BA_ABTS) {
17972 lpfc_sli4_handle_unsol_abort(vport, dmabuf);
17973 return;
17974 }
17975
4d9ab994
JS
17976 /* Link this frame */
17977 seq_dmabuf = lpfc_fc_frame_add(vport, dmabuf);
17978 if (!seq_dmabuf) {
17979 /* unable to add frame to vport - throw it out */
17980 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17981 return;
17982 }
17983 /* If not last frame in sequence continue processing frames. */
def9c7a9 17984 if (!lpfc_seq_complete(seq_dmabuf))
4d9ab994 17985 return;
def9c7a9 17986
6669f9bb
JS
17987 /* Send the complete sequence to the upper layer protocol */
17988 lpfc_sli4_send_seq_to_ulp(vport, seq_dmabuf);
4f774513 17989}
6fb120a7
JS
17990
17991/**
17992 * lpfc_sli4_post_all_rpi_hdrs - Post the rpi header memory region to the port
17993 * @phba: pointer to lpfc hba data structure.
17994 *
17995 * This routine is invoked to post rpi header templates to the
17996 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
17997 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
17998 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
17999 *
18000 * This routine does not require any locks. It's usage is expected
18001 * to be driver load or reset recovery when the driver is
18002 * sequential.
18003 *
18004 * Return codes
af901ca1 18005 * 0 - successful
d439d286 18006 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18007 * When this error occurs, the driver is not guaranteed
18008 * to have any rpi regions posted to the device and
18009 * must either attempt to repost the regions or take a
18010 * fatal error.
18011 **/
18012int
18013lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *phba)
18014{
18015 struct lpfc_rpi_hdr *rpi_page;
18016 uint32_t rc = 0;
6d368e53
JS
18017 uint16_t lrpi = 0;
18018
18019 /* SLI4 ports that support extents do not require RPI headers. */
18020 if (!phba->sli4_hba.rpi_hdrs_in_use)
18021 goto exit;
18022 if (phba->sli4_hba.extents_in_use)
18023 return -EIO;
6fb120a7 18024
6fb120a7 18025 list_for_each_entry(rpi_page, &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6d368e53
JS
18026 /*
18027 * Assign the rpi headers a physical rpi only if the driver
18028 * has not initialized those resources. A port reset only
18029 * needs the headers posted.
18030 */
18031 if (bf_get(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags) !=
18032 LPFC_RPI_RSRC_RDY)
18033 rpi_page->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
18034
6fb120a7
JS
18035 rc = lpfc_sli4_post_rpi_hdr(phba, rpi_page);
18036 if (rc != MBX_SUCCESS) {
18037 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18038 "2008 Error %d posting all rpi "
18039 "headers\n", rc);
18040 rc = -EIO;
18041 break;
18042 }
18043 }
18044
6d368e53
JS
18045 exit:
18046 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags,
18047 LPFC_RPI_RSRC_RDY);
6fb120a7
JS
18048 return rc;
18049}
18050
18051/**
18052 * lpfc_sli4_post_rpi_hdr - Post an rpi header memory region to the port
18053 * @phba: pointer to lpfc hba data structure.
18054 * @rpi_page: pointer to the rpi memory region.
18055 *
18056 * This routine is invoked to post a single rpi header to the
18057 * HBA consistent with the SLI-4 interface spec. This memory region
18058 * maps up to 64 rpi context regions.
18059 *
18060 * Return codes
af901ca1 18061 * 0 - successful
d439d286
JS
18062 * -ENOMEM - No available memory
18063 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18064 **/
18065int
18066lpfc_sli4_post_rpi_hdr(struct lpfc_hba *phba, struct lpfc_rpi_hdr *rpi_page)
18067{
18068 LPFC_MBOXQ_t *mboxq;
18069 struct lpfc_mbx_post_hdr_tmpl *hdr_tmpl;
18070 uint32_t rc = 0;
6fb120a7
JS
18071 uint32_t shdr_status, shdr_add_status;
18072 union lpfc_sli4_cfg_shdr *shdr;
18073
6d368e53
JS
18074 /* SLI4 ports that support extents do not require RPI headers. */
18075 if (!phba->sli4_hba.rpi_hdrs_in_use)
18076 return rc;
18077 if (phba->sli4_hba.extents_in_use)
18078 return -EIO;
18079
6fb120a7
JS
18080 /* The port is notified of the header region via a mailbox command. */
18081 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18082 if (!mboxq) {
18083 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18084 "2001 Unable to allocate memory for issuing "
18085 "SLI_CONFIG_SPECIAL mailbox command\n");
18086 return -ENOMEM;
18087 }
18088
18089 /* Post all rpi memory regions to the port. */
18090 hdr_tmpl = &mboxq->u.mqe.un.hdr_tmpl;
6fb120a7
JS
18091 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18092 LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE,
18093 sizeof(struct lpfc_mbx_post_hdr_tmpl) -
fedd3b7b
JS
18094 sizeof(struct lpfc_sli4_cfg_mhdr),
18095 LPFC_SLI4_MBX_EMBED);
6d368e53
JS
18096
18097
18098 /* Post the physical rpi to the port for this rpi header. */
6fb120a7
JS
18099 bf_set(lpfc_mbx_post_hdr_tmpl_rpi_offset, hdr_tmpl,
18100 rpi_page->start_rpi);
6d368e53
JS
18101 bf_set(lpfc_mbx_post_hdr_tmpl_page_cnt,
18102 hdr_tmpl, rpi_page->page_count);
18103
6fb120a7
JS
18104 hdr_tmpl->rpi_paddr_lo = putPaddrLow(rpi_page->dmabuf->phys);
18105 hdr_tmpl->rpi_paddr_hi = putPaddrHigh(rpi_page->dmabuf->phys);
f1126688 18106 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6fb120a7
JS
18107 shdr = (union lpfc_sli4_cfg_shdr *) &hdr_tmpl->header.cfg_shdr;
18108 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18109 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18110 if (rc != MBX_TIMEOUT)
18111 mempool_free(mboxq, phba->mbox_mem_pool);
18112 if (shdr_status || shdr_add_status || rc) {
18113 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18114 "2514 POST_RPI_HDR mailbox failed with "
18115 "status x%x add_status x%x, mbx status x%x\n",
18116 shdr_status, shdr_add_status, rc);
18117 rc = -ENXIO;
845d9e8d
JS
18118 } else {
18119 /*
18120 * The next_rpi stores the next logical module-64 rpi value used
18121 * to post physical rpis in subsequent rpi postings.
18122 */
18123 spin_lock_irq(&phba->hbalock);
18124 phba->sli4_hba.next_rpi = rpi_page->next_rpi;
18125 spin_unlock_irq(&phba->hbalock);
6fb120a7
JS
18126 }
18127 return rc;
18128}
18129
18130/**
18131 * lpfc_sli4_alloc_rpi - Get an available rpi in the device's range
18132 * @phba: pointer to lpfc hba data structure.
18133 *
18134 * This routine is invoked to post rpi header templates to the
18135 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18136 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18137 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18138 *
18139 * Returns
af901ca1 18140 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
6fb120a7
JS
18141 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
18142 **/
18143int
18144lpfc_sli4_alloc_rpi(struct lpfc_hba *phba)
18145{
6d368e53
JS
18146 unsigned long rpi;
18147 uint16_t max_rpi, rpi_limit;
18148 uint16_t rpi_remaining, lrpi = 0;
6fb120a7 18149 struct lpfc_rpi_hdr *rpi_hdr;
4902b381 18150 unsigned long iflag;
6fb120a7 18151
6fb120a7 18152 /*
6d368e53
JS
18153 * Fetch the next logical rpi. Because this index is logical,
18154 * the driver starts at 0 each time.
6fb120a7 18155 */
4902b381 18156 spin_lock_irqsave(&phba->hbalock, iflag);
be6bb941
JS
18157 max_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
18158 rpi_limit = phba->sli4_hba.next_rpi;
18159
6d368e53
JS
18160 rpi = find_next_zero_bit(phba->sli4_hba.rpi_bmask, rpi_limit, 0);
18161 if (rpi >= rpi_limit)
6fb120a7
JS
18162 rpi = LPFC_RPI_ALLOC_ERROR;
18163 else {
18164 set_bit(rpi, phba->sli4_hba.rpi_bmask);
18165 phba->sli4_hba.max_cfg_param.rpi_used++;
18166 phba->sli4_hba.rpi_count++;
18167 }
be6bb941
JS
18168 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
18169 "0001 rpi:%x max:%x lim:%x\n",
18170 (int) rpi, max_rpi, rpi_limit);
6fb120a7
JS
18171
18172 /*
18173 * Don't try to allocate more rpi header regions if the device limit
6d368e53 18174 * has been exhausted.
6fb120a7
JS
18175 */
18176 if ((rpi == LPFC_RPI_ALLOC_ERROR) &&
18177 (phba->sli4_hba.rpi_count >= max_rpi)) {
4902b381 18178 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18179 return rpi;
18180 }
18181
6d368e53
JS
18182 /*
18183 * RPI header postings are not required for SLI4 ports capable of
18184 * extents.
18185 */
18186 if (!phba->sli4_hba.rpi_hdrs_in_use) {
4902b381 18187 spin_unlock_irqrestore(&phba->hbalock, iflag);
6d368e53
JS
18188 return rpi;
18189 }
18190
6fb120a7
JS
18191 /*
18192 * If the driver is running low on rpi resources, allocate another
18193 * page now. Note that the next_rpi value is used because
18194 * it represents how many are actually in use whereas max_rpi notes
18195 * how many are supported max by the device.
18196 */
6d368e53 18197 rpi_remaining = phba->sli4_hba.next_rpi - phba->sli4_hba.rpi_count;
4902b381 18198 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18199 if (rpi_remaining < LPFC_RPI_LOW_WATER_MARK) {
18200 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
18201 if (!rpi_hdr) {
18202 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18203 "2002 Error Could not grow rpi "
18204 "count\n");
18205 } else {
6d368e53
JS
18206 lrpi = rpi_hdr->start_rpi;
18207 rpi_hdr->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
6fb120a7
JS
18208 lpfc_sli4_post_rpi_hdr(phba, rpi_hdr);
18209 }
18210 }
18211
18212 return rpi;
18213}
18214
d7c47992
JS
18215/**
18216 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18217 * @phba: pointer to lpfc hba data structure.
18218 *
18219 * This routine is invoked to release an rpi to the pool of
18220 * available rpis maintained by the driver.
18221 **/
5d8b8167 18222static void
d7c47992
JS
18223__lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18224{
18225 if (test_and_clear_bit(rpi, phba->sli4_hba.rpi_bmask)) {
18226 phba->sli4_hba.rpi_count--;
18227 phba->sli4_hba.max_cfg_param.rpi_used--;
18228 }
18229}
18230
6fb120a7
JS
18231/**
18232 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18233 * @phba: pointer to lpfc hba data structure.
18234 *
18235 * This routine is invoked to release an rpi to the pool of
18236 * available rpis maintained by the driver.
18237 **/
18238void
18239lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18240{
18241 spin_lock_irq(&phba->hbalock);
d7c47992 18242 __lpfc_sli4_free_rpi(phba, rpi);
6fb120a7
JS
18243 spin_unlock_irq(&phba->hbalock);
18244}
18245
18246/**
18247 * lpfc_sli4_remove_rpis - Remove the rpi bitmask region
18248 * @phba: pointer to lpfc hba data structure.
18249 *
18250 * This routine is invoked to remove the memory region that
18251 * provided rpi via a bitmask.
18252 **/
18253void
18254lpfc_sli4_remove_rpis(struct lpfc_hba *phba)
18255{
18256 kfree(phba->sli4_hba.rpi_bmask);
6d368e53
JS
18257 kfree(phba->sli4_hba.rpi_ids);
18258 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6fb120a7
JS
18259}
18260
18261/**
18262 * lpfc_sli4_resume_rpi - Remove the rpi bitmask region
18263 * @phba: pointer to lpfc hba data structure.
18264 *
18265 * This routine is invoked to remove the memory region that
18266 * provided rpi via a bitmask.
18267 **/
18268int
6b5151fd
JS
18269lpfc_sli4_resume_rpi(struct lpfc_nodelist *ndlp,
18270 void (*cmpl)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *arg)
6fb120a7
JS
18271{
18272 LPFC_MBOXQ_t *mboxq;
18273 struct lpfc_hba *phba = ndlp->phba;
18274 int rc;
18275
18276 /* The port is notified of the header region via a mailbox command. */
18277 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18278 if (!mboxq)
18279 return -ENOMEM;
18280
18281 /* Post all rpi memory regions to the port. */
18282 lpfc_resume_rpi(mboxq, ndlp);
6b5151fd
JS
18283 if (cmpl) {
18284 mboxq->mbox_cmpl = cmpl;
3e1f0718
JS
18285 mboxq->ctx_buf = arg;
18286 mboxq->ctx_ndlp = ndlp;
72859909
JS
18287 } else
18288 mboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6b5151fd 18289 mboxq->vport = ndlp->vport;
6fb120a7
JS
18290 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18291 if (rc == MBX_NOT_FINISHED) {
18292 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18293 "2010 Resume RPI Mailbox failed "
18294 "status %d, mbxStatus x%x\n", rc,
18295 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
18296 mempool_free(mboxq, phba->mbox_mem_pool);
18297 return -EIO;
18298 }
18299 return 0;
18300}
18301
18302/**
18303 * lpfc_sli4_init_vpi - Initialize a vpi with the port
76a95d75 18304 * @vport: Pointer to the vport for which the vpi is being initialized
6fb120a7 18305 *
76a95d75 18306 * This routine is invoked to activate a vpi with the port.
6fb120a7
JS
18307 *
18308 * Returns:
18309 * 0 success
18310 * -Evalue otherwise
18311 **/
18312int
76a95d75 18313lpfc_sli4_init_vpi(struct lpfc_vport *vport)
6fb120a7
JS
18314{
18315 LPFC_MBOXQ_t *mboxq;
18316 int rc = 0;
6a9c52cf 18317 int retval = MBX_SUCCESS;
6fb120a7 18318 uint32_t mbox_tmo;
76a95d75 18319 struct lpfc_hba *phba = vport->phba;
6fb120a7
JS
18320 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18321 if (!mboxq)
18322 return -ENOMEM;
76a95d75 18323 lpfc_init_vpi(phba, mboxq, vport->vpi);
a183a15f 18324 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
6fb120a7 18325 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
6fb120a7 18326 if (rc != MBX_SUCCESS) {
76a95d75 18327 lpfc_printf_vlog(vport, KERN_ERR, LOG_SLI,
6fb120a7
JS
18328 "2022 INIT VPI Mailbox failed "
18329 "status %d, mbxStatus x%x\n", rc,
18330 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
6a9c52cf 18331 retval = -EIO;
6fb120a7 18332 }
6a9c52cf 18333 if (rc != MBX_TIMEOUT)
76a95d75 18334 mempool_free(mboxq, vport->phba->mbox_mem_pool);
6a9c52cf
JS
18335
18336 return retval;
6fb120a7
JS
18337}
18338
18339/**
18340 * lpfc_mbx_cmpl_add_fcf_record - add fcf mbox completion handler.
18341 * @phba: pointer to lpfc hba data structure.
18342 * @mboxq: Pointer to mailbox object.
18343 *
18344 * This routine is invoked to manually add a single FCF record. The caller
18345 * must pass a completely initialized FCF_Record. This routine takes
18346 * care of the nonembedded mailbox operations.
18347 **/
18348static void
18349lpfc_mbx_cmpl_add_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
18350{
18351 void *virt_addr;
18352 union lpfc_sli4_cfg_shdr *shdr;
18353 uint32_t shdr_status, shdr_add_status;
18354
18355 virt_addr = mboxq->sge_array->addr[0];
18356 /* The IOCTL status is embedded in the mailbox subheader. */
18357 shdr = (union lpfc_sli4_cfg_shdr *) virt_addr;
18358 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18359 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18360
18361 if ((shdr_status || shdr_add_status) &&
18362 (shdr_status != STATUS_FCF_IN_USE))
18363 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18364 "2558 ADD_FCF_RECORD mailbox failed with "
18365 "status x%x add_status x%x\n",
18366 shdr_status, shdr_add_status);
18367
18368 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18369}
18370
18371/**
18372 * lpfc_sli4_add_fcf_record - Manually add an FCF Record.
18373 * @phba: pointer to lpfc hba data structure.
18374 * @fcf_record: pointer to the initialized fcf record to add.
18375 *
18376 * This routine is invoked to manually add a single FCF record. The caller
18377 * must pass a completely initialized FCF_Record. This routine takes
18378 * care of the nonembedded mailbox operations.
18379 **/
18380int
18381lpfc_sli4_add_fcf_record(struct lpfc_hba *phba, struct fcf_record *fcf_record)
18382{
18383 int rc = 0;
18384 LPFC_MBOXQ_t *mboxq;
18385 uint8_t *bytep;
18386 void *virt_addr;
6fb120a7
JS
18387 struct lpfc_mbx_sge sge;
18388 uint32_t alloc_len, req_len;
18389 uint32_t fcfindex;
18390
18391 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18392 if (!mboxq) {
18393 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18394 "2009 Failed to allocate mbox for ADD_FCF cmd\n");
18395 return -ENOMEM;
18396 }
18397
18398 req_len = sizeof(struct fcf_record) + sizeof(union lpfc_sli4_cfg_shdr) +
18399 sizeof(uint32_t);
18400
18401 /* Allocate DMA memory and set up the non-embedded mailbox command */
18402 alloc_len = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18403 LPFC_MBOX_OPCODE_FCOE_ADD_FCF,
18404 req_len, LPFC_SLI4_MBX_NEMBED);
18405 if (alloc_len < req_len) {
18406 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18407 "2523 Allocated DMA memory size (x%x) is "
18408 "less than the requested DMA memory "
18409 "size (x%x)\n", alloc_len, req_len);
18410 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18411 return -ENOMEM;
18412 }
18413
18414 /*
18415 * Get the first SGE entry from the non-embedded DMA memory. This
18416 * routine only uses a single SGE.
18417 */
18418 lpfc_sli4_mbx_sge_get(mboxq, 0, &sge);
6fb120a7
JS
18419 virt_addr = mboxq->sge_array->addr[0];
18420 /*
18421 * Configure the FCF record for FCFI 0. This is the driver's
18422 * hardcoded default and gets used in nonFIP mode.
18423 */
18424 fcfindex = bf_get(lpfc_fcf_record_fcf_index, fcf_record);
18425 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr);
18426 lpfc_sli_pcimem_bcopy(&fcfindex, bytep, sizeof(uint32_t));
18427
18428 /*
18429 * Copy the fcf_index and the FCF Record Data. The data starts after
18430 * the FCoE header plus word10. The data copy needs to be endian
18431 * correct.
18432 */
18433 bytep += sizeof(uint32_t);
18434 lpfc_sli_pcimem_bcopy(fcf_record, bytep, sizeof(struct fcf_record));
18435 mboxq->vport = phba->pport;
18436 mboxq->mbox_cmpl = lpfc_mbx_cmpl_add_fcf_record;
18437 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18438 if (rc == MBX_NOT_FINISHED) {
18439 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18440 "2515 ADD_FCF_RECORD mailbox failed with "
18441 "status 0x%x\n", rc);
18442 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18443 rc = -EIO;
18444 } else
18445 rc = 0;
18446
18447 return rc;
18448}
18449
18450/**
18451 * lpfc_sli4_build_dflt_fcf_record - Build the driver's default FCF Record.
18452 * @phba: pointer to lpfc hba data structure.
18453 * @fcf_record: pointer to the fcf record to write the default data.
18454 * @fcf_index: FCF table entry index.
18455 *
18456 * This routine is invoked to build the driver's default FCF record. The
18457 * values used are hardcoded. This routine handles memory initialization.
18458 *
18459 **/
18460void
18461lpfc_sli4_build_dflt_fcf_record(struct lpfc_hba *phba,
18462 struct fcf_record *fcf_record,
18463 uint16_t fcf_index)
18464{
18465 memset(fcf_record, 0, sizeof(struct fcf_record));
18466 fcf_record->max_rcv_size = LPFC_FCOE_MAX_RCV_SIZE;
18467 fcf_record->fka_adv_period = LPFC_FCOE_FKA_ADV_PER;
18468 fcf_record->fip_priority = LPFC_FCOE_FIP_PRIORITY;
18469 bf_set(lpfc_fcf_record_mac_0, fcf_record, phba->fc_map[0]);
18470 bf_set(lpfc_fcf_record_mac_1, fcf_record, phba->fc_map[1]);
18471 bf_set(lpfc_fcf_record_mac_2, fcf_record, phba->fc_map[2]);
18472 bf_set(lpfc_fcf_record_mac_3, fcf_record, LPFC_FCOE_FCF_MAC3);
18473 bf_set(lpfc_fcf_record_mac_4, fcf_record, LPFC_FCOE_FCF_MAC4);
18474 bf_set(lpfc_fcf_record_mac_5, fcf_record, LPFC_FCOE_FCF_MAC5);
18475 bf_set(lpfc_fcf_record_fc_map_0, fcf_record, phba->fc_map[0]);
18476 bf_set(lpfc_fcf_record_fc_map_1, fcf_record, phba->fc_map[1]);
18477 bf_set(lpfc_fcf_record_fc_map_2, fcf_record, phba->fc_map[2]);
18478 bf_set(lpfc_fcf_record_fcf_valid, fcf_record, 1);
0c287589 18479 bf_set(lpfc_fcf_record_fcf_avail, fcf_record, 1);
6fb120a7
JS
18480 bf_set(lpfc_fcf_record_fcf_index, fcf_record, fcf_index);
18481 bf_set(lpfc_fcf_record_mac_addr_prov, fcf_record,
18482 LPFC_FCF_FPMA | LPFC_FCF_SPMA);
18483 /* Set the VLAN bit map */
18484 if (phba->valid_vlan) {
18485 fcf_record->vlan_bitmap[phba->vlan_id / 8]
18486 = 1 << (phba->vlan_id % 8);
18487 }
18488}
18489
18490/**
0c9ab6f5 18491 * lpfc_sli4_fcf_scan_read_fcf_rec - Read hba fcf record for fcf scan.
6fb120a7
JS
18492 * @phba: pointer to lpfc hba data structure.
18493 * @fcf_index: FCF table entry offset.
18494 *
0c9ab6f5
JS
18495 * This routine is invoked to scan the entire FCF table by reading FCF
18496 * record and processing it one at a time starting from the @fcf_index
18497 * for initial FCF discovery or fast FCF failover rediscovery.
18498 *
25985edc 18499 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5 18500 * otherwise.
6fb120a7
JS
18501 **/
18502int
0c9ab6f5 18503lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
6fb120a7
JS
18504{
18505 int rc = 0, error;
18506 LPFC_MBOXQ_t *mboxq;
6fb120a7 18507
32b9793f 18508 phba->fcoe_eventtag_at_fcf_scan = phba->fcoe_eventtag;
80c17849 18509 phba->fcoe_cvl_eventtag_attn = phba->fcoe_cvl_eventtag;
6fb120a7
JS
18510 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18511 if (!mboxq) {
18512 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18513 "2000 Failed to allocate mbox for "
18514 "READ_FCF cmd\n");
4d9ab994 18515 error = -ENOMEM;
0c9ab6f5 18516 goto fail_fcf_scan;
6fb120a7 18517 }
ecfd03c6 18518 /* Construct the read FCF record mailbox command */
0c9ab6f5 18519 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
ecfd03c6
JS
18520 if (rc) {
18521 error = -EINVAL;
0c9ab6f5 18522 goto fail_fcf_scan;
6fb120a7 18523 }
ecfd03c6 18524 /* Issue the mailbox command asynchronously */
6fb120a7 18525 mboxq->vport = phba->pport;
0c9ab6f5 18526 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_scan_read_fcf_rec;
a93ff37a
JS
18527
18528 spin_lock_irq(&phba->hbalock);
18529 phba->hba_flag |= FCF_TS_INPROG;
18530 spin_unlock_irq(&phba->hbalock);
18531
6fb120a7 18532 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
ecfd03c6 18533 if (rc == MBX_NOT_FINISHED)
6fb120a7 18534 error = -EIO;
ecfd03c6 18535 else {
38b92ef8
JS
18536 /* Reset eligible FCF count for new scan */
18537 if (fcf_index == LPFC_FCOE_FCF_GET_FIRST)
999d813f 18538 phba->fcf.eligible_fcf_cnt = 0;
6fb120a7 18539 error = 0;
32b9793f 18540 }
0c9ab6f5 18541fail_fcf_scan:
4d9ab994
JS
18542 if (error) {
18543 if (mboxq)
18544 lpfc_sli4_mbox_cmd_free(phba, mboxq);
a93ff37a 18545 /* FCF scan failed, clear FCF_TS_INPROG flag */
4d9ab994 18546 spin_lock_irq(&phba->hbalock);
a93ff37a 18547 phba->hba_flag &= ~FCF_TS_INPROG;
4d9ab994
JS
18548 spin_unlock_irq(&phba->hbalock);
18549 }
6fb120a7
JS
18550 return error;
18551}
a0c87cbd 18552
0c9ab6f5 18553/**
a93ff37a 18554 * lpfc_sli4_fcf_rr_read_fcf_rec - Read hba fcf record for roundrobin fcf.
0c9ab6f5
JS
18555 * @phba: pointer to lpfc hba data structure.
18556 * @fcf_index: FCF table entry offset.
18557 *
18558 * This routine is invoked to read an FCF record indicated by @fcf_index
a93ff37a 18559 * and to use it for FLOGI roundrobin FCF failover.
0c9ab6f5 18560 *
25985edc 18561 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18562 * otherwise.
18563 **/
18564int
18565lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18566{
18567 int rc = 0, error;
18568 LPFC_MBOXQ_t *mboxq;
18569
18570 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18571 if (!mboxq) {
18572 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18573 "2763 Failed to allocate mbox for "
18574 "READ_FCF cmd\n");
18575 error = -ENOMEM;
18576 goto fail_fcf_read;
18577 }
18578 /* Construct the read FCF record mailbox command */
18579 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18580 if (rc) {
18581 error = -EINVAL;
18582 goto fail_fcf_read;
18583 }
18584 /* Issue the mailbox command asynchronously */
18585 mboxq->vport = phba->pport;
18586 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_rr_read_fcf_rec;
18587 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18588 if (rc == MBX_NOT_FINISHED)
18589 error = -EIO;
18590 else
18591 error = 0;
18592
18593fail_fcf_read:
18594 if (error && mboxq)
18595 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18596 return error;
18597}
18598
18599/**
18600 * lpfc_sli4_read_fcf_rec - Read hba fcf record for update eligible fcf bmask.
18601 * @phba: pointer to lpfc hba data structure.
18602 * @fcf_index: FCF table entry offset.
18603 *
18604 * This routine is invoked to read an FCF record indicated by @fcf_index to
a93ff37a 18605 * determine whether it's eligible for FLOGI roundrobin failover list.
0c9ab6f5 18606 *
25985edc 18607 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18608 * otherwise.
18609 **/
18610int
18611lpfc_sli4_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18612{
18613 int rc = 0, error;
18614 LPFC_MBOXQ_t *mboxq;
18615
18616 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18617 if (!mboxq) {
18618 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18619 "2758 Failed to allocate mbox for "
18620 "READ_FCF cmd\n");
18621 error = -ENOMEM;
18622 goto fail_fcf_read;
18623 }
18624 /* Construct the read FCF record mailbox command */
18625 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18626 if (rc) {
18627 error = -EINVAL;
18628 goto fail_fcf_read;
18629 }
18630 /* Issue the mailbox command asynchronously */
18631 mboxq->vport = phba->pport;
18632 mboxq->mbox_cmpl = lpfc_mbx_cmpl_read_fcf_rec;
18633 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18634 if (rc == MBX_NOT_FINISHED)
18635 error = -EIO;
18636 else
18637 error = 0;
18638
18639fail_fcf_read:
18640 if (error && mboxq)
18641 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18642 return error;
18643}
18644
7d791df7 18645/**
f5cb5304 18646 * lpfc_check_next_fcf_pri_level
7d791df7
JS
18647 * phba pointer to the lpfc_hba struct for this port.
18648 * This routine is called from the lpfc_sli4_fcf_rr_next_index_get
18649 * routine when the rr_bmask is empty. The FCF indecies are put into the
18650 * rr_bmask based on their priority level. Starting from the highest priority
18651 * to the lowest. The most likely FCF candidate will be in the highest
18652 * priority group. When this routine is called it searches the fcf_pri list for
18653 * next lowest priority group and repopulates the rr_bmask with only those
18654 * fcf_indexes.
18655 * returns:
18656 * 1=success 0=failure
18657 **/
5d8b8167 18658static int
7d791df7
JS
18659lpfc_check_next_fcf_pri_level(struct lpfc_hba *phba)
18660{
18661 uint16_t next_fcf_pri;
18662 uint16_t last_index;
18663 struct lpfc_fcf_pri *fcf_pri;
18664 int rc;
18665 int ret = 0;
18666
18667 last_index = find_first_bit(phba->fcf.fcf_rr_bmask,
18668 LPFC_SLI4_FCF_TBL_INDX_MAX);
18669 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
18670 "3060 Last IDX %d\n", last_index);
2562669c
JS
18671
18672 /* Verify the priority list has 2 or more entries */
18673 spin_lock_irq(&phba->hbalock);
18674 if (list_empty(&phba->fcf.fcf_pri_list) ||
18675 list_is_singular(&phba->fcf.fcf_pri_list)) {
18676 spin_unlock_irq(&phba->hbalock);
7d791df7
JS
18677 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
18678 "3061 Last IDX %d\n", last_index);
18679 return 0; /* Empty rr list */
18680 }
2562669c
JS
18681 spin_unlock_irq(&phba->hbalock);
18682
7d791df7
JS
18683 next_fcf_pri = 0;
18684 /*
18685 * Clear the rr_bmask and set all of the bits that are at this
18686 * priority.
18687 */
18688 memset(phba->fcf.fcf_rr_bmask, 0,
18689 sizeof(*phba->fcf.fcf_rr_bmask));
18690 spin_lock_irq(&phba->hbalock);
18691 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18692 if (fcf_pri->fcf_rec.flag & LPFC_FCF_FLOGI_FAILED)
18693 continue;
18694 /*
18695 * the 1st priority that has not FLOGI failed
18696 * will be the highest.
18697 */
18698 if (!next_fcf_pri)
18699 next_fcf_pri = fcf_pri->fcf_rec.priority;
18700 spin_unlock_irq(&phba->hbalock);
18701 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18702 rc = lpfc_sli4_fcf_rr_index_set(phba,
18703 fcf_pri->fcf_rec.fcf_index);
18704 if (rc)
18705 return 0;
18706 }
18707 spin_lock_irq(&phba->hbalock);
18708 }
18709 /*
18710 * if next_fcf_pri was not set above and the list is not empty then
18711 * we have failed flogis on all of them. So reset flogi failed
4907cb7b 18712 * and start at the beginning.
7d791df7
JS
18713 */
18714 if (!next_fcf_pri && !list_empty(&phba->fcf.fcf_pri_list)) {
18715 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18716 fcf_pri->fcf_rec.flag &= ~LPFC_FCF_FLOGI_FAILED;
18717 /*
18718 * the 1st priority that has not FLOGI failed
18719 * will be the highest.
18720 */
18721 if (!next_fcf_pri)
18722 next_fcf_pri = fcf_pri->fcf_rec.priority;
18723 spin_unlock_irq(&phba->hbalock);
18724 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18725 rc = lpfc_sli4_fcf_rr_index_set(phba,
18726 fcf_pri->fcf_rec.fcf_index);
18727 if (rc)
18728 return 0;
18729 }
18730 spin_lock_irq(&phba->hbalock);
18731 }
18732 } else
18733 ret = 1;
18734 spin_unlock_irq(&phba->hbalock);
18735
18736 return ret;
18737}
0c9ab6f5
JS
18738/**
18739 * lpfc_sli4_fcf_rr_next_index_get - Get next eligible fcf record index
18740 * @phba: pointer to lpfc hba data structure.
18741 *
18742 * This routine is to get the next eligible FCF record index in a round
18743 * robin fashion. If the next eligible FCF record index equals to the
a93ff37a 18744 * initial roundrobin FCF record index, LPFC_FCOE_FCF_NEXT_NONE (0xFFFF)
0c9ab6f5
JS
18745 * shall be returned, otherwise, the next eligible FCF record's index
18746 * shall be returned.
18747 **/
18748uint16_t
18749lpfc_sli4_fcf_rr_next_index_get(struct lpfc_hba *phba)
18750{
18751 uint16_t next_fcf_index;
18752
421c6622 18753initial_priority:
3804dc84 18754 /* Search start from next bit of currently registered FCF index */
421c6622
JS
18755 next_fcf_index = phba->fcf.current_rec.fcf_indx;
18756
7d791df7 18757next_priority:
421c6622
JS
18758 /* Determine the next fcf index to check */
18759 next_fcf_index = (next_fcf_index + 1) % LPFC_SLI4_FCF_TBL_INDX_MAX;
0c9ab6f5
JS
18760 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18761 LPFC_SLI4_FCF_TBL_INDX_MAX,
3804dc84
JS
18762 next_fcf_index);
18763
0c9ab6f5 18764 /* Wrap around condition on phba->fcf.fcf_rr_bmask */
7d791df7
JS
18765 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18766 /*
18767 * If we have wrapped then we need to clear the bits that
18768 * have been tested so that we can detect when we should
18769 * change the priority level.
18770 */
0c9ab6f5
JS
18771 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18772 LPFC_SLI4_FCF_TBL_INDX_MAX, 0);
7d791df7
JS
18773 }
18774
3804dc84
JS
18775
18776 /* Check roundrobin failover list empty condition */
7d791df7
JS
18777 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX ||
18778 next_fcf_index == phba->fcf.current_rec.fcf_indx) {
18779 /*
18780 * If next fcf index is not found check if there are lower
18781 * Priority level fcf's in the fcf_priority list.
18782 * Set up the rr_bmask with all of the avaiable fcf bits
18783 * at that level and continue the selection process.
18784 */
18785 if (lpfc_check_next_fcf_pri_level(phba))
421c6622 18786 goto initial_priority;
3804dc84
JS
18787 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP,
18788 "2844 No roundrobin failover FCF available\n");
036cad1f
JS
18789
18790 return LPFC_FCOE_FCF_NEXT_NONE;
3804dc84
JS
18791 }
18792
7d791df7
JS
18793 if (next_fcf_index < LPFC_SLI4_FCF_TBL_INDX_MAX &&
18794 phba->fcf.fcf_pri[next_fcf_index].fcf_rec.flag &
f5cb5304
JS
18795 LPFC_FCF_FLOGI_FAILED) {
18796 if (list_is_singular(&phba->fcf.fcf_pri_list))
18797 return LPFC_FCOE_FCF_NEXT_NONE;
18798
7d791df7 18799 goto next_priority;
f5cb5304 18800 }
7d791df7 18801
3804dc84 18802 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a
JS
18803 "2845 Get next roundrobin failover FCF (x%x)\n",
18804 next_fcf_index);
18805
0c9ab6f5
JS
18806 return next_fcf_index;
18807}
18808
18809/**
18810 * lpfc_sli4_fcf_rr_index_set - Set bmask with eligible fcf record index
18811 * @phba: pointer to lpfc hba data structure.
18812 *
18813 * This routine sets the FCF record index in to the eligible bmask for
a93ff37a 18814 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
18815 * does not go beyond the range of the driver allocated bmask dimension
18816 * before setting the bit.
18817 *
18818 * Returns 0 if the index bit successfully set, otherwise, it returns
18819 * -EINVAL.
18820 **/
18821int
18822lpfc_sli4_fcf_rr_index_set(struct lpfc_hba *phba, uint16_t fcf_index)
18823{
18824 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18825 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
18826 "2610 FCF (x%x) reached driver's book "
18827 "keeping dimension:x%x\n",
0c9ab6f5
JS
18828 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
18829 return -EINVAL;
18830 }
18831 /* Set the eligible FCF record index bmask */
18832 set_bit(fcf_index, phba->fcf.fcf_rr_bmask);
18833
3804dc84 18834 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18835 "2790 Set FCF (x%x) to roundrobin FCF failover "
3804dc84
JS
18836 "bmask\n", fcf_index);
18837
0c9ab6f5
JS
18838 return 0;
18839}
18840
18841/**
3804dc84 18842 * lpfc_sli4_fcf_rr_index_clear - Clear bmask from eligible fcf record index
0c9ab6f5
JS
18843 * @phba: pointer to lpfc hba data structure.
18844 *
18845 * This routine clears the FCF record index from the eligible bmask for
a93ff37a 18846 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
18847 * does not go beyond the range of the driver allocated bmask dimension
18848 * before clearing the bit.
18849 **/
18850void
18851lpfc_sli4_fcf_rr_index_clear(struct lpfc_hba *phba, uint16_t fcf_index)
18852{
9a803a74 18853 struct lpfc_fcf_pri *fcf_pri, *fcf_pri_next;
0c9ab6f5
JS
18854 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18855 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
18856 "2762 FCF (x%x) reached driver's book "
18857 "keeping dimension:x%x\n",
0c9ab6f5
JS
18858 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
18859 return;
18860 }
18861 /* Clear the eligible FCF record index bmask */
7d791df7 18862 spin_lock_irq(&phba->hbalock);
9a803a74
JS
18863 list_for_each_entry_safe(fcf_pri, fcf_pri_next, &phba->fcf.fcf_pri_list,
18864 list) {
7d791df7
JS
18865 if (fcf_pri->fcf_rec.fcf_index == fcf_index) {
18866 list_del_init(&fcf_pri->list);
18867 break;
18868 }
18869 }
18870 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 18871 clear_bit(fcf_index, phba->fcf.fcf_rr_bmask);
3804dc84
JS
18872
18873 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18874 "2791 Clear FCF (x%x) from roundrobin failover "
3804dc84 18875 "bmask\n", fcf_index);
0c9ab6f5
JS
18876}
18877
ecfd03c6
JS
18878/**
18879 * lpfc_mbx_cmpl_redisc_fcf_table - completion routine for rediscover FCF table
18880 * @phba: pointer to lpfc hba data structure.
18881 *
18882 * This routine is the completion routine for the rediscover FCF table mailbox
18883 * command. If the mailbox command returned failure, it will try to stop the
18884 * FCF rediscover wait timer.
18885 **/
5d8b8167 18886static void
ecfd03c6
JS
18887lpfc_mbx_cmpl_redisc_fcf_table(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
18888{
18889 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
18890 uint32_t shdr_status, shdr_add_status;
18891
18892 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
18893
18894 shdr_status = bf_get(lpfc_mbox_hdr_status,
18895 &redisc_fcf->header.cfg_shdr.response);
18896 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
18897 &redisc_fcf->header.cfg_shdr.response);
18898 if (shdr_status || shdr_add_status) {
0c9ab6f5 18899 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
ecfd03c6
JS
18900 "2746 Requesting for FCF rediscovery failed "
18901 "status x%x add_status x%x\n",
18902 shdr_status, shdr_add_status);
0c9ab6f5 18903 if (phba->fcf.fcf_flag & FCF_ACVL_DISC) {
fc2b989b 18904 spin_lock_irq(&phba->hbalock);
0c9ab6f5 18905 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b
JS
18906 spin_unlock_irq(&phba->hbalock);
18907 /*
18908 * CVL event triggered FCF rediscover request failed,
18909 * last resort to re-try current registered FCF entry.
18910 */
18911 lpfc_retry_pport_discovery(phba);
18912 } else {
18913 spin_lock_irq(&phba->hbalock);
0c9ab6f5 18914 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
fc2b989b
JS
18915 spin_unlock_irq(&phba->hbalock);
18916 /*
18917 * DEAD FCF event triggered FCF rediscover request
18918 * failed, last resort to fail over as a link down
18919 * to FCF registration.
18920 */
18921 lpfc_sli4_fcf_dead_failthrough(phba);
18922 }
0c9ab6f5
JS
18923 } else {
18924 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18925 "2775 Start FCF rediscover quiescent timer\n");
ecfd03c6
JS
18926 /*
18927 * Start FCF rediscovery wait timer for pending FCF
18928 * before rescan FCF record table.
18929 */
18930 lpfc_fcf_redisc_wait_start_timer(phba);
0c9ab6f5 18931 }
ecfd03c6
JS
18932
18933 mempool_free(mbox, phba->mbox_mem_pool);
18934}
18935
18936/**
3804dc84 18937 * lpfc_sli4_redisc_fcf_table - Request to rediscover entire FCF table by port.
ecfd03c6
JS
18938 * @phba: pointer to lpfc hba data structure.
18939 *
18940 * This routine is invoked to request for rediscovery of the entire FCF table
18941 * by the port.
18942 **/
18943int
18944lpfc_sli4_redisc_fcf_table(struct lpfc_hba *phba)
18945{
18946 LPFC_MBOXQ_t *mbox;
18947 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
18948 int rc, length;
18949
0c9ab6f5
JS
18950 /* Cancel retry delay timers to all vports before FCF rediscover */
18951 lpfc_cancel_all_vport_retry_delay_timer(phba);
18952
ecfd03c6
JS
18953 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18954 if (!mbox) {
18955 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18956 "2745 Failed to allocate mbox for "
18957 "requesting FCF rediscover.\n");
18958 return -ENOMEM;
18959 }
18960
18961 length = (sizeof(struct lpfc_mbx_redisc_fcf_tbl) -
18962 sizeof(struct lpfc_sli4_cfg_mhdr));
18963 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
18964 LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF,
18965 length, LPFC_SLI4_MBX_EMBED);
18966
18967 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
18968 /* Set count to 0 for invalidating the entire FCF database */
18969 bf_set(lpfc_mbx_redisc_fcf_count, redisc_fcf, 0);
18970
18971 /* Issue the mailbox command asynchronously */
18972 mbox->vport = phba->pport;
18973 mbox->mbox_cmpl = lpfc_mbx_cmpl_redisc_fcf_table;
18974 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
18975
18976 if (rc == MBX_NOT_FINISHED) {
18977 mempool_free(mbox, phba->mbox_mem_pool);
18978 return -EIO;
18979 }
18980 return 0;
18981}
18982
fc2b989b
JS
18983/**
18984 * lpfc_sli4_fcf_dead_failthrough - Failthrough routine to fcf dead event
18985 * @phba: pointer to lpfc hba data structure.
18986 *
18987 * This function is the failover routine as a last resort to the FCF DEAD
18988 * event when driver failed to perform fast FCF failover.
18989 **/
18990void
18991lpfc_sli4_fcf_dead_failthrough(struct lpfc_hba *phba)
18992{
18993 uint32_t link_state;
18994
18995 /*
18996 * Last resort as FCF DEAD event failover will treat this as
18997 * a link down, but save the link state because we don't want
18998 * it to be changed to Link Down unless it is already down.
18999 */
19000 link_state = phba->link_state;
19001 lpfc_linkdown(phba);
19002 phba->link_state = link_state;
19003
19004 /* Unregister FCF if no devices connected to it */
19005 lpfc_unregister_unused_fcf(phba);
19006}
19007
a0c87cbd 19008/**
026abb87 19009 * lpfc_sli_get_config_region23 - Get sli3 port region 23 data.
a0c87cbd 19010 * @phba: pointer to lpfc hba data structure.
026abb87 19011 * @rgn23_data: pointer to configure region 23 data.
a0c87cbd 19012 *
026abb87
JS
19013 * This function gets SLI3 port configure region 23 data through memory dump
19014 * mailbox command. When it successfully retrieves data, the size of the data
19015 * will be returned, otherwise, 0 will be returned.
a0c87cbd 19016 **/
026abb87
JS
19017static uint32_t
19018lpfc_sli_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
a0c87cbd
JS
19019{
19020 LPFC_MBOXQ_t *pmb = NULL;
19021 MAILBOX_t *mb;
026abb87 19022 uint32_t offset = 0;
a0c87cbd
JS
19023 int rc;
19024
026abb87
JS
19025 if (!rgn23_data)
19026 return 0;
19027
a0c87cbd
JS
19028 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19029 if (!pmb) {
19030 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
026abb87
JS
19031 "2600 failed to allocate mailbox memory\n");
19032 return 0;
a0c87cbd
JS
19033 }
19034 mb = &pmb->u.mb;
19035
a0c87cbd
JS
19036 do {
19037 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_23);
19038 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
19039
19040 if (rc != MBX_SUCCESS) {
19041 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
026abb87
JS
19042 "2601 failed to read config "
19043 "region 23, rc 0x%x Status 0x%x\n",
19044 rc, mb->mbxStatus);
a0c87cbd
JS
19045 mb->un.varDmp.word_cnt = 0;
19046 }
19047 /*
19048 * dump mem may return a zero when finished or we got a
19049 * mailbox error, either way we are done.
19050 */
19051 if (mb->un.varDmp.word_cnt == 0)
19052 break;
19053 if (mb->un.varDmp.word_cnt > DMP_RGN23_SIZE - offset)
19054 mb->un.varDmp.word_cnt = DMP_RGN23_SIZE - offset;
19055
19056 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
026abb87
JS
19057 rgn23_data + offset,
19058 mb->un.varDmp.word_cnt);
a0c87cbd
JS
19059 offset += mb->un.varDmp.word_cnt;
19060 } while (mb->un.varDmp.word_cnt && offset < DMP_RGN23_SIZE);
19061
026abb87
JS
19062 mempool_free(pmb, phba->mbox_mem_pool);
19063 return offset;
19064}
19065
19066/**
19067 * lpfc_sli4_get_config_region23 - Get sli4 port region 23 data.
19068 * @phba: pointer to lpfc hba data structure.
19069 * @rgn23_data: pointer to configure region 23 data.
19070 *
19071 * This function gets SLI4 port configure region 23 data through memory dump
19072 * mailbox command. When it successfully retrieves data, the size of the data
19073 * will be returned, otherwise, 0 will be returned.
19074 **/
19075static uint32_t
19076lpfc_sli4_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
19077{
19078 LPFC_MBOXQ_t *mboxq = NULL;
19079 struct lpfc_dmabuf *mp = NULL;
19080 struct lpfc_mqe *mqe;
19081 uint32_t data_length = 0;
19082 int rc;
19083
19084 if (!rgn23_data)
19085 return 0;
19086
19087 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19088 if (!mboxq) {
19089 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19090 "3105 failed to allocate mailbox memory\n");
19091 return 0;
19092 }
19093
19094 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq))
19095 goto out;
19096 mqe = &mboxq->u.mqe;
3e1f0718 19097 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
026abb87
JS
19098 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
19099 if (rc)
19100 goto out;
19101 data_length = mqe->un.mb_words[5];
19102 if (data_length == 0)
19103 goto out;
19104 if (data_length > DMP_RGN23_SIZE) {
19105 data_length = 0;
19106 goto out;
19107 }
19108 lpfc_sli_pcimem_bcopy((char *)mp->virt, rgn23_data, data_length);
19109out:
19110 mempool_free(mboxq, phba->mbox_mem_pool);
19111 if (mp) {
19112 lpfc_mbuf_free(phba, mp->virt, mp->phys);
19113 kfree(mp);
19114 }
19115 return data_length;
19116}
19117
19118/**
19119 * lpfc_sli_read_link_ste - Read region 23 to decide if link is disabled.
19120 * @phba: pointer to lpfc hba data structure.
19121 *
19122 * This function read region 23 and parse TLV for port status to
19123 * decide if the user disaled the port. If the TLV indicates the
19124 * port is disabled, the hba_flag is set accordingly.
19125 **/
19126void
19127lpfc_sli_read_link_ste(struct lpfc_hba *phba)
19128{
19129 uint8_t *rgn23_data = NULL;
19130 uint32_t if_type, data_size, sub_tlv_len, tlv_offset;
19131 uint32_t offset = 0;
19132
19133 /* Get adapter Region 23 data */
19134 rgn23_data = kzalloc(DMP_RGN23_SIZE, GFP_KERNEL);
19135 if (!rgn23_data)
19136 goto out;
19137
19138 if (phba->sli_rev < LPFC_SLI_REV4)
19139 data_size = lpfc_sli_get_config_region23(phba, rgn23_data);
19140 else {
19141 if_type = bf_get(lpfc_sli_intf_if_type,
19142 &phba->sli4_hba.sli_intf);
19143 if (if_type == LPFC_SLI_INTF_IF_TYPE_0)
19144 goto out;
19145 data_size = lpfc_sli4_get_config_region23(phba, rgn23_data);
19146 }
a0c87cbd
JS
19147
19148 if (!data_size)
19149 goto out;
19150
19151 /* Check the region signature first */
19152 if (memcmp(&rgn23_data[offset], LPFC_REGION23_SIGNATURE, 4)) {
19153 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19154 "2619 Config region 23 has bad signature\n");
19155 goto out;
19156 }
19157 offset += 4;
19158
19159 /* Check the data structure version */
19160 if (rgn23_data[offset] != LPFC_REGION23_VERSION) {
19161 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19162 "2620 Config region 23 has bad version\n");
19163 goto out;
19164 }
19165 offset += 4;
19166
19167 /* Parse TLV entries in the region */
19168 while (offset < data_size) {
19169 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC)
19170 break;
19171 /*
19172 * If the TLV is not driver specific TLV or driver id is
19173 * not linux driver id, skip the record.
19174 */
19175 if ((rgn23_data[offset] != DRIVER_SPECIFIC_TYPE) ||
19176 (rgn23_data[offset + 2] != LINUX_DRIVER_ID) ||
19177 (rgn23_data[offset + 3] != 0)) {
19178 offset += rgn23_data[offset + 1] * 4 + 4;
19179 continue;
19180 }
19181
19182 /* Driver found a driver specific TLV in the config region */
19183 sub_tlv_len = rgn23_data[offset + 1] * 4;
19184 offset += 4;
19185 tlv_offset = 0;
19186
19187 /*
19188 * Search for configured port state sub-TLV.
19189 */
19190 while ((offset < data_size) &&
19191 (tlv_offset < sub_tlv_len)) {
19192 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC) {
19193 offset += 4;
19194 tlv_offset += 4;
19195 break;
19196 }
19197 if (rgn23_data[offset] != PORT_STE_TYPE) {
19198 offset += rgn23_data[offset + 1] * 4 + 4;
19199 tlv_offset += rgn23_data[offset + 1] * 4 + 4;
19200 continue;
19201 }
19202
19203 /* This HBA contains PORT_STE configured */
19204 if (!rgn23_data[offset + 2])
19205 phba->hba_flag |= LINK_DISABLED;
19206
19207 goto out;
19208 }
19209 }
026abb87 19210
a0c87cbd 19211out:
a0c87cbd
JS
19212 kfree(rgn23_data);
19213 return;
19214}
695a814e 19215
52d52440
JS
19216/**
19217 * lpfc_wr_object - write an object to the firmware
19218 * @phba: HBA structure that indicates port to create a queue on.
19219 * @dmabuf_list: list of dmabufs to write to the port.
19220 * @size: the total byte value of the objects to write to the port.
19221 * @offset: the current offset to be used to start the transfer.
19222 *
19223 * This routine will create a wr_object mailbox command to send to the port.
19224 * the mailbox command will be constructed using the dma buffers described in
19225 * @dmabuf_list to create a list of BDEs. This routine will fill in as many
19226 * BDEs that the imbedded mailbox can support. The @offset variable will be
19227 * used to indicate the starting offset of the transfer and will also return
19228 * the offset after the write object mailbox has completed. @size is used to
19229 * determine the end of the object and whether the eof bit should be set.
19230 *
19231 * Return 0 is successful and offset will contain the the new offset to use
19232 * for the next write.
19233 * Return negative value for error cases.
19234 **/
19235int
19236lpfc_wr_object(struct lpfc_hba *phba, struct list_head *dmabuf_list,
19237 uint32_t size, uint32_t *offset)
19238{
19239 struct lpfc_mbx_wr_object *wr_object;
19240 LPFC_MBOXQ_t *mbox;
19241 int rc = 0, i = 0;
5021267a 19242 uint32_t shdr_status, shdr_add_status, shdr_change_status;
52d52440 19243 uint32_t mbox_tmo;
52d52440
JS
19244 struct lpfc_dmabuf *dmabuf;
19245 uint32_t written = 0;
5021267a 19246 bool check_change_status = false;
52d52440
JS
19247
19248 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19249 if (!mbox)
19250 return -ENOMEM;
19251
19252 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
19253 LPFC_MBOX_OPCODE_WRITE_OBJECT,
19254 sizeof(struct lpfc_mbx_wr_object) -
19255 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
19256
19257 wr_object = (struct lpfc_mbx_wr_object *)&mbox->u.mqe.un.wr_object;
19258 wr_object->u.request.write_offset = *offset;
19259 sprintf((uint8_t *)wr_object->u.request.object_name, "/");
19260 wr_object->u.request.object_name[0] =
19261 cpu_to_le32(wr_object->u.request.object_name[0]);
19262 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 0);
19263 list_for_each_entry(dmabuf, dmabuf_list, list) {
19264 if (i >= LPFC_MBX_WR_CONFIG_MAX_BDE || written >= size)
19265 break;
19266 wr_object->u.request.bde[i].addrLow = putPaddrLow(dmabuf->phys);
19267 wr_object->u.request.bde[i].addrHigh =
19268 putPaddrHigh(dmabuf->phys);
19269 if (written + SLI4_PAGE_SIZE >= size) {
19270 wr_object->u.request.bde[i].tus.f.bdeSize =
19271 (size - written);
19272 written += (size - written);
19273 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 1);
5021267a
JS
19274 bf_set(lpfc_wr_object_eas, &wr_object->u.request, 1);
19275 check_change_status = true;
52d52440
JS
19276 } else {
19277 wr_object->u.request.bde[i].tus.f.bdeSize =
19278 SLI4_PAGE_SIZE;
19279 written += SLI4_PAGE_SIZE;
19280 }
19281 i++;
19282 }
19283 wr_object->u.request.bde_count = i;
19284 bf_set(lpfc_wr_object_write_length, &wr_object->u.request, written);
19285 if (!phba->sli4_hba.intr_enable)
19286 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
19287 else {
a183a15f 19288 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
52d52440
JS
19289 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
19290 }
19291 /* The IOCTL status is embedded in the mailbox subheader. */
5021267a
JS
19292 shdr_status = bf_get(lpfc_mbox_hdr_status,
19293 &wr_object->header.cfg_shdr.response);
19294 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
19295 &wr_object->header.cfg_shdr.response);
19296 if (check_change_status) {
19297 shdr_change_status = bf_get(lpfc_wr_object_change_status,
19298 &wr_object->u.response);
19299 switch (shdr_change_status) {
19300 case (LPFC_CHANGE_STATUS_PHYS_DEV_RESET):
19301 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19302 "3198 Firmware write complete: System "
19303 "reboot required to instantiate\n");
19304 break;
19305 case (LPFC_CHANGE_STATUS_FW_RESET):
19306 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19307 "3199 Firmware write complete: Firmware"
19308 " reset required to instantiate\n");
19309 break;
19310 case (LPFC_CHANGE_STATUS_PORT_MIGRATION):
19311 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19312 "3200 Firmware write complete: Port "
19313 "Migration or PCI Reset required to "
19314 "instantiate\n");
19315 break;
19316 case (LPFC_CHANGE_STATUS_PCI_RESET):
19317 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19318 "3201 Firmware write complete: PCI "
19319 "Reset required to instantiate\n");
19320 break;
19321 default:
19322 break;
19323 }
19324 }
52d52440
JS
19325 if (rc != MBX_TIMEOUT)
19326 mempool_free(mbox, phba->mbox_mem_pool);
19327 if (shdr_status || shdr_add_status || rc) {
19328 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19329 "3025 Write Object mailbox failed with "
19330 "status x%x add_status x%x, mbx status x%x\n",
19331 shdr_status, shdr_add_status, rc);
19332 rc = -ENXIO;
1feb8204 19333 *offset = shdr_add_status;
52d52440
JS
19334 } else
19335 *offset += wr_object->u.response.actual_write_length;
19336 return rc;
19337}
19338
695a814e
JS
19339/**
19340 * lpfc_cleanup_pending_mbox - Free up vport discovery mailbox commands.
19341 * @vport: pointer to vport data structure.
19342 *
19343 * This function iterate through the mailboxq and clean up all REG_LOGIN
19344 * and REG_VPI mailbox commands associated with the vport. This function
19345 * is called when driver want to restart discovery of the vport due to
19346 * a Clear Virtual Link event.
19347 **/
19348void
19349lpfc_cleanup_pending_mbox(struct lpfc_vport *vport)
19350{
19351 struct lpfc_hba *phba = vport->phba;
19352 LPFC_MBOXQ_t *mb, *nextmb;
19353 struct lpfc_dmabuf *mp;
78730cfe 19354 struct lpfc_nodelist *ndlp;
d439d286 19355 struct lpfc_nodelist *act_mbx_ndlp = NULL;
589a52d6 19356 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
d439d286 19357 LIST_HEAD(mbox_cmd_list);
63e801ce 19358 uint8_t restart_loop;
695a814e 19359
d439d286 19360 /* Clean up internally queued mailbox commands with the vport */
695a814e
JS
19361 spin_lock_irq(&phba->hbalock);
19362 list_for_each_entry_safe(mb, nextmb, &phba->sli.mboxq, list) {
19363 if (mb->vport != vport)
19364 continue;
19365
19366 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19367 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19368 continue;
19369
d439d286
JS
19370 list_del(&mb->list);
19371 list_add_tail(&mb->list, &mbox_cmd_list);
19372 }
19373 /* Clean up active mailbox command with the vport */
19374 mb = phba->sli.mbox_active;
19375 if (mb && (mb->vport == vport)) {
19376 if ((mb->u.mb.mbxCommand == MBX_REG_LOGIN64) ||
19377 (mb->u.mb.mbxCommand == MBX_REG_VPI))
19378 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19379 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19380 act_mbx_ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
d439d286
JS
19381 /* Put reference count for delayed processing */
19382 act_mbx_ndlp = lpfc_nlp_get(act_mbx_ndlp);
19383 /* Unregister the RPI when mailbox complete */
19384 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19385 }
19386 }
63e801ce
JS
19387 /* Cleanup any mailbox completions which are not yet processed */
19388 do {
19389 restart_loop = 0;
19390 list_for_each_entry(mb, &phba->sli.mboxq_cmpl, list) {
19391 /*
19392 * If this mailox is already processed or it is
19393 * for another vport ignore it.
19394 */
19395 if ((mb->vport != vport) ||
19396 (mb->mbox_flag & LPFC_MBX_IMED_UNREG))
19397 continue;
19398
19399 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19400 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19401 continue;
19402
19403 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19404 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19405 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
63e801ce
JS
19406 /* Unregister the RPI when mailbox complete */
19407 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19408 restart_loop = 1;
19409 spin_unlock_irq(&phba->hbalock);
19410 spin_lock(shost->host_lock);
19411 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19412 spin_unlock(shost->host_lock);
19413 spin_lock_irq(&phba->hbalock);
19414 break;
19415 }
19416 }
19417 } while (restart_loop);
19418
d439d286
JS
19419 spin_unlock_irq(&phba->hbalock);
19420
19421 /* Release the cleaned-up mailbox commands */
19422 while (!list_empty(&mbox_cmd_list)) {
19423 list_remove_head(&mbox_cmd_list, mb, LPFC_MBOXQ_t, list);
695a814e 19424 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19425 mp = (struct lpfc_dmabuf *)(mb->ctx_buf);
695a814e
JS
19426 if (mp) {
19427 __lpfc_mbuf_free(phba, mp->virt, mp->phys);
19428 kfree(mp);
19429 }
3e1f0718
JS
19430 mb->ctx_buf = NULL;
19431 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
19432 mb->ctx_ndlp = NULL;
78730cfe 19433 if (ndlp) {
ec21b3b0 19434 spin_lock(shost->host_lock);
589a52d6 19435 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
ec21b3b0 19436 spin_unlock(shost->host_lock);
78730cfe 19437 lpfc_nlp_put(ndlp);
78730cfe 19438 }
695a814e 19439 }
695a814e
JS
19440 mempool_free(mb, phba->mbox_mem_pool);
19441 }
d439d286
JS
19442
19443 /* Release the ndlp with the cleaned-up active mailbox command */
19444 if (act_mbx_ndlp) {
19445 spin_lock(shost->host_lock);
19446 act_mbx_ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19447 spin_unlock(shost->host_lock);
19448 lpfc_nlp_put(act_mbx_ndlp);
695a814e 19449 }
695a814e
JS
19450}
19451
2a9bf3d0
JS
19452/**
19453 * lpfc_drain_txq - Drain the txq
19454 * @phba: Pointer to HBA context object.
19455 *
19456 * This function attempt to submit IOCBs on the txq
19457 * to the adapter. For SLI4 adapters, the txq contains
19458 * ELS IOCBs that have been deferred because the there
19459 * are no SGLs. This congestion can occur with large
19460 * vport counts during node discovery.
19461 **/
19462
19463uint32_t
19464lpfc_drain_txq(struct lpfc_hba *phba)
19465{
19466 LIST_HEAD(completions);
895427bd 19467 struct lpfc_sli_ring *pring;
2e706377 19468 struct lpfc_iocbq *piocbq = NULL;
2a9bf3d0
JS
19469 unsigned long iflags = 0;
19470 char *fail_msg = NULL;
19471 struct lpfc_sglq *sglq;
205e8240 19472 union lpfc_wqe128 wqe;
a2fc4aef 19473 uint32_t txq_cnt = 0;
dc19e3b4 19474 struct lpfc_queue *wq;
2a9bf3d0 19475
dc19e3b4
JS
19476 if (phba->link_flag & LS_MDS_LOOPBACK) {
19477 /* MDS WQE are posted only to first WQ*/
cdb42bec 19478 wq = phba->sli4_hba.hdwq[0].fcp_wq;
dc19e3b4
JS
19479 if (unlikely(!wq))
19480 return 0;
19481 pring = wq->pring;
19482 } else {
19483 wq = phba->sli4_hba.els_wq;
19484 if (unlikely(!wq))
19485 return 0;
19486 pring = lpfc_phba_elsring(phba);
19487 }
19488
19489 if (unlikely(!pring) || list_empty(&pring->txq))
1234a6d5 19490 return 0;
895427bd 19491
398d81c9 19492 spin_lock_irqsave(&pring->ring_lock, iflags);
0e9bb8d7
JS
19493 list_for_each_entry(piocbq, &pring->txq, list) {
19494 txq_cnt++;
19495 }
19496
19497 if (txq_cnt > pring->txq_max)
19498 pring->txq_max = txq_cnt;
2a9bf3d0 19499
398d81c9 19500 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19501
0e9bb8d7 19502 while (!list_empty(&pring->txq)) {
398d81c9 19503 spin_lock_irqsave(&pring->ring_lock, iflags);
2a9bf3d0 19504
19ca7609 19505 piocbq = lpfc_sli_ringtx_get(phba, pring);
a629852a 19506 if (!piocbq) {
398d81c9 19507 spin_unlock_irqrestore(&pring->ring_lock, iflags);
a629852a
JS
19508 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19509 "2823 txq empty and txq_cnt is %d\n ",
0e9bb8d7 19510 txq_cnt);
a629852a
JS
19511 break;
19512 }
895427bd 19513 sglq = __lpfc_sli_get_els_sglq(phba, piocbq);
2a9bf3d0 19514 if (!sglq) {
19ca7609 19515 __lpfc_sli_ringtx_put(phba, pring, piocbq);
398d81c9 19516 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19517 break;
2a9bf3d0 19518 }
0e9bb8d7 19519 txq_cnt--;
2a9bf3d0
JS
19520
19521 /* The xri and iocb resources secured,
19522 * attempt to issue request
19523 */
6d368e53 19524 piocbq->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0
JS
19525 piocbq->sli4_xritag = sglq->sli4_xritag;
19526 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocbq, sglq))
19527 fail_msg = "to convert bpl to sgl";
205e8240 19528 else if (lpfc_sli4_iocb2wqe(phba, piocbq, &wqe))
2a9bf3d0 19529 fail_msg = "to convert iocb to wqe";
dc19e3b4 19530 else if (lpfc_sli4_wq_put(wq, &wqe))
2a9bf3d0
JS
19531 fail_msg = " - Wq is full";
19532 else
19533 lpfc_sli_ringtxcmpl_put(phba, pring, piocbq);
19534
19535 if (fail_msg) {
19536 /* Failed means we can't issue and need to cancel */
19537 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19538 "2822 IOCB failed %s iotag 0x%x "
19539 "xri 0x%x\n",
19540 fail_msg,
19541 piocbq->iotag, piocbq->sli4_xritag);
19542 list_add_tail(&piocbq->list, &completions);
19543 }
398d81c9 19544 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0
JS
19545 }
19546
2a9bf3d0
JS
19547 /* Cancel all the IOCBs that cannot be issued */
19548 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
19549 IOERR_SLI_ABORTED);
19550
0e9bb8d7 19551 return txq_cnt;
2a9bf3d0 19552}
895427bd
JS
19553
19554/**
19555 * lpfc_wqe_bpl2sgl - Convert the bpl/bde to a sgl.
19556 * @phba: Pointer to HBA context object.
19557 * @pwqe: Pointer to command WQE.
19558 * @sglq: Pointer to the scatter gather queue object.
19559 *
19560 * This routine converts the bpl or bde that is in the WQE
19561 * to a sgl list for the sli4 hardware. The physical address
19562 * of the bpl/bde is converted back to a virtual address.
19563 * If the WQE contains a BPL then the list of BDE's is
19564 * converted to sli4_sge's. If the WQE contains a single
19565 * BDE then it is converted to a single sli_sge.
19566 * The WQE is still in cpu endianness so the contents of
19567 * the bpl can be used without byte swapping.
19568 *
19569 * Returns valid XRI = Success, NO_XRI = Failure.
19570 */
19571static uint16_t
19572lpfc_wqe_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *pwqeq,
19573 struct lpfc_sglq *sglq)
19574{
19575 uint16_t xritag = NO_XRI;
19576 struct ulp_bde64 *bpl = NULL;
19577 struct ulp_bde64 bde;
19578 struct sli4_sge *sgl = NULL;
19579 struct lpfc_dmabuf *dmabuf;
205e8240 19580 union lpfc_wqe128 *wqe;
895427bd
JS
19581 int numBdes = 0;
19582 int i = 0;
19583 uint32_t offset = 0; /* accumulated offset in the sg request list */
19584 int inbound = 0; /* number of sg reply entries inbound from firmware */
19585 uint32_t cmd;
19586
19587 if (!pwqeq || !sglq)
19588 return xritag;
19589
19590 sgl = (struct sli4_sge *)sglq->sgl;
19591 wqe = &pwqeq->wqe;
19592 pwqeq->iocb.ulpIoTag = pwqeq->iotag;
19593
19594 cmd = bf_get(wqe_cmnd, &wqe->generic.wqe_com);
19595 if (cmd == CMD_XMIT_BLS_RSP64_WQE)
19596 return sglq->sli4_xritag;
19597 numBdes = pwqeq->rsvd2;
19598 if (numBdes) {
19599 /* The addrHigh and addrLow fields within the WQE
19600 * have not been byteswapped yet so there is no
19601 * need to swap them back.
19602 */
19603 if (pwqeq->context3)
19604 dmabuf = (struct lpfc_dmabuf *)pwqeq->context3;
19605 else
19606 return xritag;
19607
19608 bpl = (struct ulp_bde64 *)dmabuf->virt;
19609 if (!bpl)
19610 return xritag;
19611
19612 for (i = 0; i < numBdes; i++) {
19613 /* Should already be byte swapped. */
19614 sgl->addr_hi = bpl->addrHigh;
19615 sgl->addr_lo = bpl->addrLow;
19616
19617 sgl->word2 = le32_to_cpu(sgl->word2);
19618 if ((i+1) == numBdes)
19619 bf_set(lpfc_sli4_sge_last, sgl, 1);
19620 else
19621 bf_set(lpfc_sli4_sge_last, sgl, 0);
19622 /* swap the size field back to the cpu so we
19623 * can assign it to the sgl.
19624 */
19625 bde.tus.w = le32_to_cpu(bpl->tus.w);
19626 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
19627 /* The offsets in the sgl need to be accumulated
19628 * separately for the request and reply lists.
19629 * The request is always first, the reply follows.
19630 */
19631 switch (cmd) {
19632 case CMD_GEN_REQUEST64_WQE:
19633 /* add up the reply sg entries */
19634 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
19635 inbound++;
19636 /* first inbound? reset the offset */
19637 if (inbound == 1)
19638 offset = 0;
19639 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19640 bf_set(lpfc_sli4_sge_type, sgl,
19641 LPFC_SGE_TYPE_DATA);
19642 offset += bde.tus.f.bdeSize;
19643 break;
19644 case CMD_FCP_TRSP64_WQE:
19645 bf_set(lpfc_sli4_sge_offset, sgl, 0);
19646 bf_set(lpfc_sli4_sge_type, sgl,
19647 LPFC_SGE_TYPE_DATA);
19648 break;
19649 case CMD_FCP_TSEND64_WQE:
19650 case CMD_FCP_TRECEIVE64_WQE:
19651 bf_set(lpfc_sli4_sge_type, sgl,
19652 bpl->tus.f.bdeFlags);
19653 if (i < 3)
19654 offset = 0;
19655 else
19656 offset += bde.tus.f.bdeSize;
19657 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19658 break;
19659 }
19660 sgl->word2 = cpu_to_le32(sgl->word2);
19661 bpl++;
19662 sgl++;
19663 }
19664 } else if (wqe->gen_req.bde.tus.f.bdeFlags == BUFF_TYPE_BDE_64) {
19665 /* The addrHigh and addrLow fields of the BDE have not
19666 * been byteswapped yet so they need to be swapped
19667 * before putting them in the sgl.
19668 */
19669 sgl->addr_hi = cpu_to_le32(wqe->gen_req.bde.addrHigh);
19670 sgl->addr_lo = cpu_to_le32(wqe->gen_req.bde.addrLow);
19671 sgl->word2 = le32_to_cpu(sgl->word2);
19672 bf_set(lpfc_sli4_sge_last, sgl, 1);
19673 sgl->word2 = cpu_to_le32(sgl->word2);
19674 sgl->sge_len = cpu_to_le32(wqe->gen_req.bde.tus.f.bdeSize);
19675 }
19676 return sglq->sli4_xritag;
19677}
19678
19679/**
19680 * lpfc_sli4_issue_wqe - Issue an SLI4 Work Queue Entry (WQE)
19681 * @phba: Pointer to HBA context object.
19682 * @ring_number: Base sli ring number
19683 * @pwqe: Pointer to command WQE.
19684 **/
19685int
1fbf9742 19686lpfc_sli4_issue_wqe(struct lpfc_hba *phba, struct lpfc_sli4_hdw_queue *qp,
895427bd
JS
19687 struct lpfc_iocbq *pwqe)
19688{
205e8240 19689 union lpfc_wqe128 *wqe = &pwqe->wqe;
f358dd0c 19690 struct lpfc_nvmet_rcv_ctx *ctxp;
895427bd
JS
19691 struct lpfc_queue *wq;
19692 struct lpfc_sglq *sglq;
19693 struct lpfc_sli_ring *pring;
19694 unsigned long iflags;
cd22d605 19695 uint32_t ret = 0;
895427bd
JS
19696
19697 /* NVME_LS and NVME_LS ABTS requests. */
19698 if (pwqe->iocb_flag & LPFC_IO_NVME_LS) {
19699 pring = phba->sli4_hba.nvmels_wq->pring;
6a828b0f
JS
19700 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
19701 qp, wq_access);
895427bd
JS
19702 sglq = __lpfc_sli_get_els_sglq(phba, pwqe);
19703 if (!sglq) {
19704 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19705 return WQE_BUSY;
19706 }
19707 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19708 pwqe->sli4_xritag = sglq->sli4_xritag;
19709 if (lpfc_wqe_bpl2sgl(phba, pwqe, sglq) == NO_XRI) {
19710 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19711 return WQE_ERROR;
19712 }
19713 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19714 pwqe->sli4_xritag);
cd22d605
DK
19715 ret = lpfc_sli4_wq_put(phba->sli4_hba.nvmels_wq, wqe);
19716 if (ret) {
895427bd 19717 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19718 return ret;
895427bd 19719 }
cd22d605 19720
895427bd
JS
19721 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19722 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19723 return 0;
19724 }
19725
19726 /* NVME_FCREQ and NVME_ABTS requests */
19727 if (pwqe->iocb_flag & LPFC_IO_NVME) {
19728 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
1fbf9742
JS
19729 wq = qp->nvme_wq;
19730 pring = wq->pring;
895427bd 19731
1fbf9742 19732 bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->nvme_cq_map);
895427bd 19733
6a828b0f
JS
19734 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
19735 qp, wq_access);
cd22d605
DK
19736 ret = lpfc_sli4_wq_put(wq, wqe);
19737 if (ret) {
895427bd 19738 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19739 return ret;
895427bd
JS
19740 }
19741 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19742 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19743 return 0;
19744 }
19745
f358dd0c
JS
19746 /* NVMET requests */
19747 if (pwqe->iocb_flag & LPFC_IO_NVMET) {
19748 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
1fbf9742
JS
19749 wq = qp->nvme_wq;
19750 pring = wq->pring;
f358dd0c 19751
f358dd0c 19752 ctxp = pwqe->context2;
6c621a22 19753 sglq = ctxp->ctxbuf->sglq;
f358dd0c
JS
19754 if (pwqe->sli4_xritag == NO_XRI) {
19755 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19756 pwqe->sli4_xritag = sglq->sli4_xritag;
19757 }
19758 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19759 pwqe->sli4_xritag);
1fbf9742
JS
19760 bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->nvme_cq_map);
19761
6a828b0f
JS
19762 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
19763 qp, wq_access);
cd22d605
DK
19764 ret = lpfc_sli4_wq_put(wq, wqe);
19765 if (ret) {
f358dd0c 19766 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19767 return ret;
f358dd0c
JS
19768 }
19769 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19770 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19771 return 0;
19772 }
895427bd
JS
19773 return WQE_ERROR;
19774}
c490850a
JS
19775
19776#ifdef LPFC_MXP_STAT
19777/**
19778 * lpfc_snapshot_mxp - Snapshot pbl, pvt and busy count
19779 * @phba: pointer to lpfc hba data structure.
19780 * @hwqid: belong to which HWQ.
19781 *
19782 * The purpose of this routine is to take a snapshot of pbl, pvt and busy count
19783 * 15 seconds after a test case is running.
19784 *
19785 * The user should call lpfc_debugfs_multixripools_write before running a test
19786 * case to clear stat_snapshot_taken. Then the user starts a test case. During
19787 * test case is running, stat_snapshot_taken is incremented by 1 every time when
19788 * this routine is called from heartbeat timer. When stat_snapshot_taken is
19789 * equal to LPFC_MXP_SNAPSHOT_TAKEN, a snapshot is taken.
19790 **/
19791void lpfc_snapshot_mxp(struct lpfc_hba *phba, u32 hwqid)
19792{
19793 struct lpfc_sli4_hdw_queue *qp;
19794 struct lpfc_multixri_pool *multixri_pool;
19795 struct lpfc_pvt_pool *pvt_pool;
19796 struct lpfc_pbl_pool *pbl_pool;
19797 u32 txcmplq_cnt;
19798
19799 qp = &phba->sli4_hba.hdwq[hwqid];
19800 multixri_pool = qp->p_multixri_pool;
19801 if (!multixri_pool)
19802 return;
19803
19804 if (multixri_pool->stat_snapshot_taken == LPFC_MXP_SNAPSHOT_TAKEN) {
19805 pvt_pool = &qp->p_multixri_pool->pvt_pool;
19806 pbl_pool = &qp->p_multixri_pool->pbl_pool;
19807 txcmplq_cnt = qp->fcp_wq->pring->txcmplq_cnt;
19808 if (qp->nvme_wq)
19809 txcmplq_cnt += qp->nvme_wq->pring->txcmplq_cnt;
19810
19811 multixri_pool->stat_pbl_count = pbl_pool->count;
19812 multixri_pool->stat_pvt_count = pvt_pool->count;
19813 multixri_pool->stat_busy_count = txcmplq_cnt;
19814 }
19815
19816 multixri_pool->stat_snapshot_taken++;
19817}
19818#endif
19819
19820/**
19821 * lpfc_adjust_pvt_pool_count - Adjust private pool count
19822 * @phba: pointer to lpfc hba data structure.
19823 * @hwqid: belong to which HWQ.
19824 *
19825 * This routine moves some XRIs from private to public pool when private pool
19826 * is not busy.
19827 **/
19828void lpfc_adjust_pvt_pool_count(struct lpfc_hba *phba, u32 hwqid)
19829{
19830 struct lpfc_multixri_pool *multixri_pool;
19831 u32 io_req_count;
19832 u32 prev_io_req_count;
19833
19834 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
19835 if (!multixri_pool)
19836 return;
19837 io_req_count = multixri_pool->io_req_count;
19838 prev_io_req_count = multixri_pool->prev_io_req_count;
19839
19840 if (prev_io_req_count != io_req_count) {
19841 /* Private pool is busy */
19842 multixri_pool->prev_io_req_count = io_req_count;
19843 } else {
19844 /* Private pool is not busy.
19845 * Move XRIs from private to public pool.
19846 */
19847 lpfc_move_xri_pvt_to_pbl(phba, hwqid);
19848 }
19849}
19850
19851/**
19852 * lpfc_adjust_high_watermark - Adjust high watermark
19853 * @phba: pointer to lpfc hba data structure.
19854 * @hwqid: belong to which HWQ.
19855 *
19856 * This routine sets high watermark as number of outstanding XRIs,
19857 * but make sure the new value is between xri_limit/2 and xri_limit.
19858 **/
19859void lpfc_adjust_high_watermark(struct lpfc_hba *phba, u32 hwqid)
19860{
19861 u32 new_watermark;
19862 u32 watermark_max;
19863 u32 watermark_min;
19864 u32 xri_limit;
19865 u32 txcmplq_cnt;
19866 u32 abts_io_bufs;
19867 struct lpfc_multixri_pool *multixri_pool;
19868 struct lpfc_sli4_hdw_queue *qp;
19869
19870 qp = &phba->sli4_hba.hdwq[hwqid];
19871 multixri_pool = qp->p_multixri_pool;
19872 if (!multixri_pool)
19873 return;
19874 xri_limit = multixri_pool->xri_limit;
19875
19876 watermark_max = xri_limit;
19877 watermark_min = xri_limit / 2;
19878
19879 txcmplq_cnt = qp->fcp_wq->pring->txcmplq_cnt;
19880 abts_io_bufs = qp->abts_scsi_io_bufs;
19881 if (qp->nvme_wq) {
19882 txcmplq_cnt += qp->nvme_wq->pring->txcmplq_cnt;
19883 abts_io_bufs += qp->abts_nvme_io_bufs;
19884 }
19885
19886 new_watermark = txcmplq_cnt + abts_io_bufs;
19887 new_watermark = min(watermark_max, new_watermark);
19888 new_watermark = max(watermark_min, new_watermark);
19889 multixri_pool->pvt_pool.high_watermark = new_watermark;
19890
19891#ifdef LPFC_MXP_STAT
19892 multixri_pool->stat_max_hwm = max(multixri_pool->stat_max_hwm,
19893 new_watermark);
19894#endif
19895}
19896
19897/**
19898 * lpfc_move_xri_pvt_to_pbl - Move some XRIs from private to public pool
19899 * @phba: pointer to lpfc hba data structure.
19900 * @hwqid: belong to which HWQ.
19901 *
19902 * This routine is called from hearbeat timer when pvt_pool is idle.
19903 * All free XRIs are moved from private to public pool on hwqid with 2 steps.
19904 * The first step moves (all - low_watermark) amount of XRIs.
19905 * The second step moves the rest of XRIs.
19906 **/
19907void lpfc_move_xri_pvt_to_pbl(struct lpfc_hba *phba, u32 hwqid)
19908{
19909 struct lpfc_pbl_pool *pbl_pool;
19910 struct lpfc_pvt_pool *pvt_pool;
6a828b0f 19911 struct lpfc_sli4_hdw_queue *qp;
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JS
19912 struct lpfc_io_buf *lpfc_ncmd;
19913 struct lpfc_io_buf *lpfc_ncmd_next;
19914 unsigned long iflag;
19915 struct list_head tmp_list;
19916 u32 tmp_count;
19917
6a828b0f
JS
19918 qp = &phba->sli4_hba.hdwq[hwqid];
19919 pbl_pool = &qp->p_multixri_pool->pbl_pool;
19920 pvt_pool = &qp->p_multixri_pool->pvt_pool;
c490850a
JS
19921 tmp_count = 0;
19922
6a828b0f
JS
19923 lpfc_qp_spin_lock_irqsave(&pbl_pool->lock, iflag, qp, mv_to_pub_pool);
19924 lpfc_qp_spin_lock(&pvt_pool->lock, qp, mv_from_pvt_pool);
c490850a
JS
19925
19926 if (pvt_pool->count > pvt_pool->low_watermark) {
19927 /* Step 1: move (all - low_watermark) from pvt_pool
19928 * to pbl_pool
19929 */
19930
19931 /* Move low watermark of bufs from pvt_pool to tmp_list */
19932 INIT_LIST_HEAD(&tmp_list);
19933 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
19934 &pvt_pool->list, list) {
19935 list_move_tail(&lpfc_ncmd->list, &tmp_list);
19936 tmp_count++;
19937 if (tmp_count >= pvt_pool->low_watermark)
19938 break;
19939 }
19940
19941 /* Move all bufs from pvt_pool to pbl_pool */
19942 list_splice_init(&pvt_pool->list, &pbl_pool->list);
19943
19944 /* Move all bufs from tmp_list to pvt_pool */
19945 list_splice(&tmp_list, &pvt_pool->list);
19946
19947 pbl_pool->count += (pvt_pool->count - tmp_count);
19948 pvt_pool->count = tmp_count;
19949 } else {
19950 /* Step 2: move the rest from pvt_pool to pbl_pool */
19951 list_splice_init(&pvt_pool->list, &pbl_pool->list);
19952 pbl_pool->count += pvt_pool->count;
19953 pvt_pool->count = 0;
19954 }
19955
19956 spin_unlock(&pvt_pool->lock);
19957 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
19958}
19959
19960/**
19961 * _lpfc_move_xri_pbl_to_pvt - Move some XRIs from public to private pool
19962 * @phba: pointer to lpfc hba data structure
19963 * @pbl_pool: specified public free XRI pool
19964 * @pvt_pool: specified private free XRI pool
19965 * @count: number of XRIs to move
19966 *
19967 * This routine tries to move some free common bufs from the specified pbl_pool
19968 * to the specified pvt_pool. It might move less than count XRIs if there's not
19969 * enough in public pool.
19970 *
19971 * Return:
19972 * true - if XRIs are successfully moved from the specified pbl_pool to the
19973 * specified pvt_pool
19974 * false - if the specified pbl_pool is empty or locked by someone else
19975 **/
19976static bool
6a828b0f
JS
19977_lpfc_move_xri_pbl_to_pvt(struct lpfc_hba *phba, struct lpfc_sli4_hdw_queue *qp,
19978 struct lpfc_pbl_pool *pbl_pool,
c490850a
JS
19979 struct lpfc_pvt_pool *pvt_pool, u32 count)
19980{
19981 struct lpfc_io_buf *lpfc_ncmd;
19982 struct lpfc_io_buf *lpfc_ncmd_next;
19983 unsigned long iflag;
19984 int ret;
19985
19986 ret = spin_trylock_irqsave(&pbl_pool->lock, iflag);
19987 if (ret) {
19988 if (pbl_pool->count) {
19989 /* Move a batch of XRIs from public to private pool */
6a828b0f 19990 lpfc_qp_spin_lock(&pvt_pool->lock, qp, mv_to_pvt_pool);
c490850a
JS
19991 list_for_each_entry_safe(lpfc_ncmd,
19992 lpfc_ncmd_next,
19993 &pbl_pool->list,
19994 list) {
19995 list_move_tail(&lpfc_ncmd->list,
19996 &pvt_pool->list);
19997 pvt_pool->count++;
19998 pbl_pool->count--;
19999 count--;
20000 if (count == 0)
20001 break;
20002 }
20003
20004 spin_unlock(&pvt_pool->lock);
20005 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20006 return true;
20007 }
20008 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20009 }
20010
20011 return false;
20012}
20013
20014/**
20015 * lpfc_move_xri_pbl_to_pvt - Move some XRIs from public to private pool
20016 * @phba: pointer to lpfc hba data structure.
20017 * @hwqid: belong to which HWQ.
20018 * @count: number of XRIs to move
20019 *
20020 * This routine tries to find some free common bufs in one of public pools with
20021 * Round Robin method. The search always starts from local hwqid, then the next
20022 * HWQ which was found last time (rrb_next_hwqid). Once a public pool is found,
20023 * a batch of free common bufs are moved to private pool on hwqid.
20024 * It might move less than count XRIs if there's not enough in public pool.
20025 **/
20026void lpfc_move_xri_pbl_to_pvt(struct lpfc_hba *phba, u32 hwqid, u32 count)
20027{
20028 struct lpfc_multixri_pool *multixri_pool;
20029 struct lpfc_multixri_pool *next_multixri_pool;
20030 struct lpfc_pvt_pool *pvt_pool;
20031 struct lpfc_pbl_pool *pbl_pool;
6a828b0f 20032 struct lpfc_sli4_hdw_queue *qp;
c490850a
JS
20033 u32 next_hwqid;
20034 u32 hwq_count;
20035 int ret;
20036
6a828b0f
JS
20037 qp = &phba->sli4_hba.hdwq[hwqid];
20038 multixri_pool = qp->p_multixri_pool;
c490850a
JS
20039 pvt_pool = &multixri_pool->pvt_pool;
20040 pbl_pool = &multixri_pool->pbl_pool;
20041
20042 /* Check if local pbl_pool is available */
6a828b0f 20043 ret = _lpfc_move_xri_pbl_to_pvt(phba, qp, pbl_pool, pvt_pool, count);
c490850a
JS
20044 if (ret) {
20045#ifdef LPFC_MXP_STAT
20046 multixri_pool->local_pbl_hit_count++;
20047#endif
20048 return;
20049 }
20050
20051 hwq_count = phba->cfg_hdw_queue;
20052
20053 /* Get the next hwqid which was found last time */
20054 next_hwqid = multixri_pool->rrb_next_hwqid;
20055
20056 do {
20057 /* Go to next hwq */
20058 next_hwqid = (next_hwqid + 1) % hwq_count;
20059
20060 next_multixri_pool =
20061 phba->sli4_hba.hdwq[next_hwqid].p_multixri_pool;
20062 pbl_pool = &next_multixri_pool->pbl_pool;
20063
20064 /* Check if the public free xri pool is available */
20065 ret = _lpfc_move_xri_pbl_to_pvt(
6a828b0f 20066 phba, qp, pbl_pool, pvt_pool, count);
c490850a
JS
20067
20068 /* Exit while-loop if success or all hwqid are checked */
20069 } while (!ret && next_hwqid != multixri_pool->rrb_next_hwqid);
20070
20071 /* Starting point for the next time */
20072 multixri_pool->rrb_next_hwqid = next_hwqid;
20073
20074 if (!ret) {
20075 /* stats: all public pools are empty*/
20076 multixri_pool->pbl_empty_count++;
20077 }
20078
20079#ifdef LPFC_MXP_STAT
20080 if (ret) {
20081 if (next_hwqid == hwqid)
20082 multixri_pool->local_pbl_hit_count++;
20083 else
20084 multixri_pool->other_pbl_hit_count++;
20085 }
20086#endif
20087}
20088
20089/**
20090 * lpfc_keep_pvt_pool_above_lowwm - Keep pvt_pool above low watermark
20091 * @phba: pointer to lpfc hba data structure.
20092 * @qp: belong to which HWQ.
20093 *
20094 * This routine get a batch of XRIs from pbl_pool if pvt_pool is less than
20095 * low watermark.
20096 **/
20097void lpfc_keep_pvt_pool_above_lowwm(struct lpfc_hba *phba, u32 hwqid)
20098{
20099 struct lpfc_multixri_pool *multixri_pool;
20100 struct lpfc_pvt_pool *pvt_pool;
20101
20102 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
20103 pvt_pool = &multixri_pool->pvt_pool;
20104
20105 if (pvt_pool->count < pvt_pool->low_watermark)
20106 lpfc_move_xri_pbl_to_pvt(phba, hwqid, XRI_BATCH);
20107}
20108
20109/**
20110 * lpfc_release_io_buf - Return one IO buf back to free pool
20111 * @phba: pointer to lpfc hba data structure.
20112 * @lpfc_ncmd: IO buf to be returned.
20113 * @qp: belong to which HWQ.
20114 *
20115 * This routine returns one IO buf back to free pool. If this is an urgent IO,
20116 * the IO buf is returned to expedite pool. If cfg_xri_rebalancing==1,
20117 * the IO buf is returned to pbl_pool or pvt_pool based on watermark and
20118 * xri_limit. If cfg_xri_rebalancing==0, the IO buf is returned to
20119 * lpfc_io_buf_list_put.
20120 **/
20121void lpfc_release_io_buf(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_ncmd,
20122 struct lpfc_sli4_hdw_queue *qp)
20123{
20124 unsigned long iflag;
20125 struct lpfc_pbl_pool *pbl_pool;
20126 struct lpfc_pvt_pool *pvt_pool;
20127 struct lpfc_epd_pool *epd_pool;
20128 u32 txcmplq_cnt;
20129 u32 xri_owned;
20130 u32 xri_limit;
20131 u32 abts_io_bufs;
20132
20133 /* MUST zero fields if buffer is reused by another protocol */
20134 lpfc_ncmd->nvmeCmd = NULL;
20135 lpfc_ncmd->cur_iocbq.wqe_cmpl = NULL;
20136 lpfc_ncmd->cur_iocbq.iocb_cmpl = NULL;
20137
20138 if (phba->cfg_xri_rebalancing) {
20139 if (lpfc_ncmd->expedite) {
20140 /* Return to expedite pool */
20141 epd_pool = &phba->epd_pool;
20142 spin_lock_irqsave(&epd_pool->lock, iflag);
20143 list_add_tail(&lpfc_ncmd->list, &epd_pool->list);
20144 epd_pool->count++;
20145 spin_unlock_irqrestore(&epd_pool->lock, iflag);
20146 return;
20147 }
20148
20149 /* Avoid invalid access if an IO sneaks in and is being rejected
20150 * just _after_ xri pools are destroyed in lpfc_offline.
20151 * Nothing much can be done at this point.
20152 */
20153 if (!qp->p_multixri_pool)
20154 return;
20155
20156 pbl_pool = &qp->p_multixri_pool->pbl_pool;
20157 pvt_pool = &qp->p_multixri_pool->pvt_pool;
20158
20159 txcmplq_cnt = qp->fcp_wq->pring->txcmplq_cnt;
20160 abts_io_bufs = qp->abts_scsi_io_bufs;
20161 if (qp->nvme_wq) {
20162 txcmplq_cnt += qp->nvme_wq->pring->txcmplq_cnt;
20163 abts_io_bufs += qp->abts_nvme_io_bufs;
20164 }
20165
20166 xri_owned = pvt_pool->count + txcmplq_cnt + abts_io_bufs;
20167 xri_limit = qp->p_multixri_pool->xri_limit;
20168
20169#ifdef LPFC_MXP_STAT
20170 if (xri_owned <= xri_limit)
20171 qp->p_multixri_pool->below_limit_count++;
20172 else
20173 qp->p_multixri_pool->above_limit_count++;
20174#endif
20175
20176 /* XRI goes to either public or private free xri pool
20177 * based on watermark and xri_limit
20178 */
20179 if ((pvt_pool->count < pvt_pool->low_watermark) ||
20180 (xri_owned < xri_limit &&
20181 pvt_pool->count < pvt_pool->high_watermark)) {
6a828b0f
JS
20182 lpfc_qp_spin_lock_irqsave(&pvt_pool->lock, iflag,
20183 qp, free_pvt_pool);
c490850a
JS
20184 list_add_tail(&lpfc_ncmd->list,
20185 &pvt_pool->list);
20186 pvt_pool->count++;
20187 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20188 } else {
6a828b0f
JS
20189 lpfc_qp_spin_lock_irqsave(&pbl_pool->lock, iflag,
20190 qp, free_pub_pool);
c490850a
JS
20191 list_add_tail(&lpfc_ncmd->list,
20192 &pbl_pool->list);
20193 pbl_pool->count++;
20194 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20195 }
20196 } else {
6a828b0f
JS
20197 lpfc_qp_spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag,
20198 qp, free_xri);
c490850a
JS
20199 list_add_tail(&lpfc_ncmd->list,
20200 &qp->lpfc_io_buf_list_put);
20201 qp->put_io_bufs++;
20202 spin_unlock_irqrestore(&qp->io_buf_list_put_lock,
20203 iflag);
20204 }
20205}
20206
20207/**
20208 * lpfc_get_io_buf_from_private_pool - Get one free IO buf from private pool
20209 * @phba: pointer to lpfc hba data structure.
20210 * @pvt_pool: pointer to private pool data structure.
20211 * @ndlp: pointer to lpfc nodelist data structure.
20212 *
20213 * This routine tries to get one free IO buf from private pool.
20214 *
20215 * Return:
20216 * pointer to one free IO buf - if private pool is not empty
20217 * NULL - if private pool is empty
20218 **/
20219static struct lpfc_io_buf *
20220lpfc_get_io_buf_from_private_pool(struct lpfc_hba *phba,
6a828b0f 20221 struct lpfc_sli4_hdw_queue *qp,
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20222 struct lpfc_pvt_pool *pvt_pool,
20223 struct lpfc_nodelist *ndlp)
20224{
20225 struct lpfc_io_buf *lpfc_ncmd;
20226 struct lpfc_io_buf *lpfc_ncmd_next;
20227 unsigned long iflag;
20228
6a828b0f 20229 lpfc_qp_spin_lock_irqsave(&pvt_pool->lock, iflag, qp, alloc_pvt_pool);
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20230 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20231 &pvt_pool->list, list) {
20232 if (lpfc_test_rrq_active(
20233 phba, ndlp, lpfc_ncmd->cur_iocbq.sli4_lxritag))
20234 continue;
20235 list_del(&lpfc_ncmd->list);
20236 pvt_pool->count--;
20237 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20238 return lpfc_ncmd;
20239 }
20240 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20241
20242 return NULL;
20243}
20244
20245/**
20246 * lpfc_get_io_buf_from_expedite_pool - Get one free IO buf from expedite pool
20247 * @phba: pointer to lpfc hba data structure.
20248 *
20249 * This routine tries to get one free IO buf from expedite pool.
20250 *
20251 * Return:
20252 * pointer to one free IO buf - if expedite pool is not empty
20253 * NULL - if expedite pool is empty
20254 **/
20255static struct lpfc_io_buf *
20256lpfc_get_io_buf_from_expedite_pool(struct lpfc_hba *phba)
20257{
20258 struct lpfc_io_buf *lpfc_ncmd;
20259 struct lpfc_io_buf *lpfc_ncmd_next;
20260 unsigned long iflag;
20261 struct lpfc_epd_pool *epd_pool;
20262
20263 epd_pool = &phba->epd_pool;
20264 lpfc_ncmd = NULL;
20265
20266 spin_lock_irqsave(&epd_pool->lock, iflag);
20267 if (epd_pool->count > 0) {
20268 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20269 &epd_pool->list, list) {
20270 list_del(&lpfc_ncmd->list);
20271 epd_pool->count--;
20272 break;
20273 }
20274 }
20275 spin_unlock_irqrestore(&epd_pool->lock, iflag);
20276
20277 return lpfc_ncmd;
20278}
20279
20280/**
20281 * lpfc_get_io_buf_from_multixri_pools - Get one free IO bufs
20282 * @phba: pointer to lpfc hba data structure.
20283 * @ndlp: pointer to lpfc nodelist data structure.
20284 * @hwqid: belong to which HWQ
20285 * @expedite: 1 means this request is urgent.
20286 *
20287 * This routine will do the following actions and then return a pointer to
20288 * one free IO buf.
20289 *
20290 * 1. If private free xri count is empty, move some XRIs from public to
20291 * private pool.
20292 * 2. Get one XRI from private free xri pool.
20293 * 3. If we fail to get one from pvt_pool and this is an expedite request,
20294 * get one free xri from expedite pool.
20295 *
20296 * Note: ndlp is only used on SCSI side for RRQ testing.
20297 * The caller should pass NULL for ndlp on NVME side.
20298 *
20299 * Return:
20300 * pointer to one free IO buf - if private pool is not empty
20301 * NULL - if private pool is empty
20302 **/
20303static struct lpfc_io_buf *
20304lpfc_get_io_buf_from_multixri_pools(struct lpfc_hba *phba,
20305 struct lpfc_nodelist *ndlp,
20306 int hwqid, int expedite)
20307{
20308 struct lpfc_sli4_hdw_queue *qp;
20309 struct lpfc_multixri_pool *multixri_pool;
20310 struct lpfc_pvt_pool *pvt_pool;
20311 struct lpfc_io_buf *lpfc_ncmd;
20312
20313 qp = &phba->sli4_hba.hdwq[hwqid];
20314 lpfc_ncmd = NULL;
20315 multixri_pool = qp->p_multixri_pool;
20316 pvt_pool = &multixri_pool->pvt_pool;
20317 multixri_pool->io_req_count++;
20318
20319 /* If pvt_pool is empty, move some XRIs from public to private pool */
20320 if (pvt_pool->count == 0)
20321 lpfc_move_xri_pbl_to_pvt(phba, hwqid, XRI_BATCH);
20322
20323 /* Get one XRI from private free xri pool */
6a828b0f 20324 lpfc_ncmd = lpfc_get_io_buf_from_private_pool(phba, qp, pvt_pool, ndlp);
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20325
20326 if (lpfc_ncmd) {
20327 lpfc_ncmd->hdwq = qp;
20328 lpfc_ncmd->hdwq_no = hwqid;
20329 } else if (expedite) {
20330 /* If we fail to get one from pvt_pool and this is an expedite
20331 * request, get one free xri from expedite pool.
20332 */
20333 lpfc_ncmd = lpfc_get_io_buf_from_expedite_pool(phba);
20334 }
20335
20336 return lpfc_ncmd;
20337}
20338
20339static inline struct lpfc_io_buf *
20340lpfc_io_buf(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, int idx)
20341{
20342 struct lpfc_sli4_hdw_queue *qp;
20343 struct lpfc_io_buf *lpfc_cmd, *lpfc_cmd_next;
20344
20345 qp = &phba->sli4_hba.hdwq[idx];
20346 list_for_each_entry_safe(lpfc_cmd, lpfc_cmd_next,
20347 &qp->lpfc_io_buf_list_get, list) {
20348 if (lpfc_test_rrq_active(phba, ndlp,
20349 lpfc_cmd->cur_iocbq.sli4_lxritag))
20350 continue;
20351
20352 if (lpfc_cmd->flags & LPFC_SBUF_NOT_POSTED)
20353 continue;
20354
20355 list_del_init(&lpfc_cmd->list);
20356 qp->get_io_bufs--;
20357 lpfc_cmd->hdwq = qp;
20358 lpfc_cmd->hdwq_no = idx;
20359 return lpfc_cmd;
20360 }
20361 return NULL;
20362}
20363
20364/**
20365 * lpfc_get_io_buf - Get one IO buffer from free pool
20366 * @phba: The HBA for which this call is being executed.
20367 * @ndlp: pointer to lpfc nodelist data structure.
20368 * @hwqid: belong to which HWQ
20369 * @expedite: 1 means this request is urgent.
20370 *
20371 * This routine gets one IO buffer from free pool. If cfg_xri_rebalancing==1,
20372 * removes a IO buffer from multiXRI pools. If cfg_xri_rebalancing==0, removes
20373 * a IO buffer from head of @hdwq io_buf_list and returns to caller.
20374 *
20375 * Note: ndlp is only used on SCSI side for RRQ testing.
20376 * The caller should pass NULL for ndlp on NVME side.
20377 *
20378 * Return codes:
20379 * NULL - Error
20380 * Pointer to lpfc_io_buf - Success
20381 **/
20382struct lpfc_io_buf *lpfc_get_io_buf(struct lpfc_hba *phba,
20383 struct lpfc_nodelist *ndlp,
20384 u32 hwqid, int expedite)
20385{
20386 struct lpfc_sli4_hdw_queue *qp;
20387 unsigned long iflag;
20388 struct lpfc_io_buf *lpfc_cmd;
20389
20390 qp = &phba->sli4_hba.hdwq[hwqid];
20391 lpfc_cmd = NULL;
20392
20393 if (phba->cfg_xri_rebalancing)
20394 lpfc_cmd = lpfc_get_io_buf_from_multixri_pools(
20395 phba, ndlp, hwqid, expedite);
20396 else {
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20397 lpfc_qp_spin_lock_irqsave(&qp->io_buf_list_get_lock, iflag,
20398 qp, alloc_xri_get);
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20399 if (qp->get_io_bufs > LPFC_NVME_EXPEDITE_XRICNT || expedite)
20400 lpfc_cmd = lpfc_io_buf(phba, ndlp, hwqid);
20401 if (!lpfc_cmd) {
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20402 lpfc_qp_spin_lock(&qp->io_buf_list_put_lock,
20403 qp, alloc_xri_put);
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20404 list_splice(&qp->lpfc_io_buf_list_put,
20405 &qp->lpfc_io_buf_list_get);
20406 qp->get_io_bufs += qp->put_io_bufs;
20407 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
20408 qp->put_io_bufs = 0;
20409 spin_unlock(&qp->io_buf_list_put_lock);
20410 if (qp->get_io_bufs > LPFC_NVME_EXPEDITE_XRICNT ||
20411 expedite)
20412 lpfc_cmd = lpfc_io_buf(phba, ndlp, hwqid);
20413 }
20414 spin_unlock_irqrestore(&qp->io_buf_list_get_lock, iflag);
20415 }
20416
20417 return lpfc_cmd;
20418}