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[SCSI] lpfc 8.2.2 : Miscellaneous management and logging mods
[mirror_ubuntu-jammy-kernel.git] / drivers / scsi / lpfc / lpfc_sli.c
CommitLineData
dea3101e
JB		 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
9413afff 4 * Copyright (C) 2004-2007 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB		 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e
JB		 20 *******************************************************************/
21
dea3101e
JB		 22#include <linux/blkdev.h>
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26
91886523 27#include <scsi/scsi.h>
dea3101e
JB		 28#include <scsi/scsi_cmnd.h>
29#include <scsi/scsi_device.h>
30#include <scsi/scsi_host.h>
f888ba3c 31#include <scsi/scsi_transport_fc.h>
dea3101e
JB		 32
33#include "lpfc_hw.h"
34#include "lpfc_sli.h"
35#include "lpfc_disc.h"
36#include "lpfc_scsi.h"
37#include "lpfc.h"
38#include "lpfc_crtn.h"
39#include "lpfc_logmsg.h"
40#include "lpfc_compat.h"
858c9f6c 41#include "lpfc_debugfs.h"
dea3101e
JB		 42
43/*
44 * Define macro to log: Mailbox command x%x cannot issue Data
45 * This allows multiple uses of lpfc_msgBlk0311
46 * w/o perturbing log msg utility.
47 */
92d7f7b0 48#define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
dea3101e
JB		 49 lpfc_printf_log(phba, \
50 KERN_INFO, \
51 LOG_MBOX | LOG_SLI, \
e8b62011 52 "(%d):0311 Mailbox command x%x cannot " \
92d7f7b0 53 "issue Data: x%x x%x x%x\n", \
92d7f7b0
JS		 54 pmbox->vport ? pmbox->vport->vpi : 0, \
55 pmbox->mb.mbxCommand, \
2e0fef85 56 phba->pport->port_state, \
dea3101e 57 psli->sli_flag, \
2e0fef85 58 flag)
dea3101e
JB		 59
60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
92d7f7b0
JS		 69 /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
70 * to the start of the ring, and the slot number of the
71 * desired iocb entry, calc a pointer to that entry.
72 */
ed957684
JS		 73static inline IOCB_t *
74lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
75{
76 return (IOCB_t *) (((char *) pring->cmdringaddr) +
77 pring->cmdidx * phba->iocb_cmd_size);
78}
79
80static inline IOCB_t *
81lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
82{
83 return (IOCB_t *) (((char *) pring->rspringaddr) +
84 pring->rspidx * phba->iocb_rsp_size);
85}
86
2e0fef85
JS		 87static struct lpfc_iocbq *
88__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC		 89{
90 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
91 struct lpfc_iocbq * iocbq = NULL;
92
93 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
94 return iocbq;
95}
96
2e0fef85
JS		 97struct lpfc_iocbq *
98lpfc_sli_get_iocbq(struct lpfc_hba *phba)
99{
100 struct lpfc_iocbq * iocbq = NULL;
101 unsigned long iflags;
102
103 spin_lock_irqsave(&phba->hbalock, iflags);
104 iocbq = __lpfc_sli_get_iocbq(phba);
105 spin_unlock_irqrestore(&phba->hbalock, iflags);
106 return iocbq;
107}
108
604a3e30 109void
2e0fef85 110__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 111{
2e0fef85 112 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30
JB		 113
114 /*
115 * Clean all volatile data fields, preserve iotag and node struct.
116 */
117 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
118 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
119}
120
2e0fef85
JS		 121void
122lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
123{
124 unsigned long iflags;
125
126 /*
127 * Clean all volatile data fields, preserve iotag and node struct.
128 */
129 spin_lock_irqsave(&phba->hbalock, iflags);
130 __lpfc_sli_release_iocbq(phba, iocbq);
131 spin_unlock_irqrestore(&phba->hbalock, iflags);
132}
133
dea3101e
JB		 134/*
135 * Translate the iocb command to an iocb command type used to decide the final
136 * disposition of each completed IOCB.
137 */
138static lpfc_iocb_type
139lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
140{
141 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
142
143 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
144 return 0;
145
146 switch (iocb_cmnd) {
147 case CMD_XMIT_SEQUENCE_CR:
148 case CMD_XMIT_SEQUENCE_CX:
149 case CMD_XMIT_BCAST_CN:
150 case CMD_XMIT_BCAST_CX:
151 case CMD_ELS_REQUEST_CR:
152 case CMD_ELS_REQUEST_CX:
153 case CMD_CREATE_XRI_CR:
154 case CMD_CREATE_XRI_CX:
155 case CMD_GET_RPI_CN:
156 case CMD_XMIT_ELS_RSP_CX:
157 case CMD_GET_RPI_CR:
158 case CMD_FCP_IWRITE_CR:
159 case CMD_FCP_IWRITE_CX:
160 case CMD_FCP_IREAD_CR:
161 case CMD_FCP_IREAD_CX:
162 case CMD_FCP_ICMND_CR:
163 case CMD_FCP_ICMND_CX:
f5603511
JS		 164 case CMD_FCP_TSEND_CX:
165 case CMD_FCP_TRSP_CX:
166 case CMD_FCP_TRECEIVE_CX:
167 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB		 168 case CMD_ADAPTER_MSG:
169 case CMD_ADAPTER_DUMP:
170 case CMD_XMIT_SEQUENCE64_CR:
171 case CMD_XMIT_SEQUENCE64_CX:
172 case CMD_XMIT_BCAST64_CN:
173 case CMD_XMIT_BCAST64_CX:
174 case CMD_ELS_REQUEST64_CR:
175 case CMD_ELS_REQUEST64_CX:
176 case CMD_FCP_IWRITE64_CR:
177 case CMD_FCP_IWRITE64_CX:
178 case CMD_FCP_IREAD64_CR:
179 case CMD_FCP_IREAD64_CX:
180 case CMD_FCP_ICMND64_CR:
181 case CMD_FCP_ICMND64_CX:
f5603511
JS		 182 case CMD_FCP_TSEND64_CX:
183 case CMD_FCP_TRSP64_CX:
184 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB		 185 case CMD_GEN_REQUEST64_CR:
186 case CMD_GEN_REQUEST64_CX:
187 case CMD_XMIT_ELS_RSP64_CX:
188 type = LPFC_SOL_IOCB;
189 break;
190 case CMD_ABORT_XRI_CN:
191 case CMD_ABORT_XRI_CX:
192 case CMD_CLOSE_XRI_CN:
193 case CMD_CLOSE_XRI_CX:
194 case CMD_XRI_ABORTED_CX:
195 case CMD_ABORT_MXRI64_CN:
196 type = LPFC_ABORT_IOCB;
197 break;
198 case CMD_RCV_SEQUENCE_CX:
199 case CMD_RCV_ELS_REQ_CX:
200 case CMD_RCV_SEQUENCE64_CX:
201 case CMD_RCV_ELS_REQ64_CX:
ed957684
JS		 202 case CMD_IOCB_RCV_SEQ64_CX:
203 case CMD_IOCB_RCV_ELS64_CX:
204 case CMD_IOCB_RCV_CONT64_CX:
dea3101e
JB		 205 type = LPFC_UNSOL_IOCB;
206 break;
207 default:
208 type = LPFC_UNKNOWN_IOCB;
209 break;
210 }
211
212 return type;
213}
214
215static int
ed957684 216lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB		 217{
218 struct lpfc_sli *psli = &phba->sli;
ed957684
JS		 219 LPFC_MBOXQ_t *pmb;
220 MAILBOX_t *pmbox;
221 int i, rc, ret = 0;
dea3101e 222
ed957684
JS		 223 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
224 if (!pmb)
225 return -ENOMEM;
226 pmbox = &pmb->mb;
227 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 228 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB		 229 lpfc_config_ring(phba, i, pmb);
230 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
231 if (rc != MBX_SUCCESS) {
92d7f7b0 232 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 233 "0446 Adapter failed to init (%d), "
dea3101e
JB		 234 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
235 "ring %d\n",
e8b62011
JS		 236 rc, pmbox->mbxCommand,
237 pmbox->mbxStatus, i);
2e0fef85 238 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS		 239 ret = -ENXIO;
240 break;
dea3101e
JB		 241 }
242 }
ed957684
JS		 243 mempool_free(pmb, phba->mbox_mem_pool);
244 return ret;
dea3101e
JB		 245}
246
247static int
2e0fef85
JS		 248lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
249 struct lpfc_iocbq *piocb)
dea3101e 250{
dea3101e
JB		 251 list_add_tail(&piocb->list, &pring->txcmplq);
252 pring->txcmplq_cnt++;
92d7f7b0
JS		 253 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
254 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
255 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
256 if (!piocb->vport)
257 BUG();
258 else
259 mod_timer(&piocb->vport->els_tmofunc,
260 jiffies + HZ * (phba->fc_ratov << 1));
261 }
262
dea3101e 263
2e0fef85 264 return 0;
dea3101e
JB		 265}
266
267static struct lpfc_iocbq *
2e0fef85 268lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 269{
dea3101e
JB		 270 struct lpfc_iocbq *cmd_iocb;
271
858c9f6c
JS		 272 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
273 if (cmd_iocb != NULL)
dea3101e 274 pring->txq_cnt--;
2e0fef85 275 return cmd_iocb;
dea3101e
JB		 276}
277
278static IOCB_t *
279lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
280{
ed957684
JS		 281 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
282 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
283 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 284 uint32_t max_cmd_idx = pring->numCiocb;
dea3101e
JB		 285
286 if ((pring->next_cmdidx == pring->cmdidx) &&
287 (++pring->next_cmdidx >= max_cmd_idx))
288 pring->next_cmdidx = 0;
289
290 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
291
292 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
293
294 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
295 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 296 "0315 Ring %d issue: portCmdGet %d "
dea3101e 297 "is bigger then cmd ring %d\n",
e8b62011 298 pring->ringno,
dea3101e
JB		 299 pring->local_getidx, max_cmd_idx);
300
2e0fef85 301 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 302 /*
303 * All error attention handlers are posted to
304 * worker thread
305 */
306 phba->work_ha |= HA_ERATT;
307 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 308
309 /* hbalock should already be held */
dea3101e 310 if (phba->work_wait)
92d7f7b0 311 lpfc_worker_wake_up(phba);
dea3101e
JB		 312
313 return NULL;
314 }
315
316 if (pring->local_getidx == pring->next_cmdidx)
317 return NULL;
318 }
319
ed957684 320 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB		 321}
322
604a3e30 323uint16_t
2e0fef85 324lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 325{
2e0fef85
JS		 326 struct lpfc_iocbq **new_arr;
327 struct lpfc_iocbq **old_arr;
604a3e30
JB		 328 size_t new_len;
329 struct lpfc_sli *psli = &phba->sli;
330 uint16_t iotag;
dea3101e 331
2e0fef85 332 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 333 iotag = psli->last_iotag;
334 if(++iotag < psli->iocbq_lookup_len) {
335 psli->last_iotag = iotag;
336 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 337 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 338 iocbq->iotag = iotag;
339 return iotag;
2e0fef85 340 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB		 341 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
342 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85
JS		 343 spin_unlock_irq(&phba->hbalock);
344 new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
604a3e30
JB		 345 GFP_KERNEL);
346 if (new_arr) {
2e0fef85 347 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 348 old_arr = psli->iocbq_lookup;
349 if (new_len <= psli->iocbq_lookup_len) {
350 /* highly unprobable case */
351 kfree(new_arr);
352 iotag = psli->last_iotag;
353 if(++iotag < psli->iocbq_lookup_len) {
354 psli->last_iotag = iotag;
355 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 356 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 357 iocbq->iotag = iotag;
358 return iotag;
359 }
2e0fef85 360 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 361 return 0;
362 }
363 if (psli->iocbq_lookup)
364 memcpy(new_arr, old_arr,
365 ((psli->last_iotag + 1) *
366 sizeof (struct lpfc_iocbq *)));
367 psli->iocbq_lookup = new_arr;
368 psli->iocbq_lookup_len = new_len;
369 psli->last_iotag = iotag;
370 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 371 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 372 iocbq->iotag = iotag;
373 kfree(old_arr);
374 return iotag;
375 }
8f6d98d2 376 } else
2e0fef85 377 spin_unlock_irq(&phba->hbalock);
dea3101e 378
604a3e30 379 lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
e8b62011
JS		 380 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
381 psli->last_iotag);
dea3101e 382
604a3e30 383 return 0;
dea3101e
JB		 384}
385
386static void
387lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
388 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
389{
390 /*
604a3e30 391 * Set up an iotag
dea3101e 392 */
604a3e30 393 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 394
a58cbd52
JS		 395 if (pring->ringno == LPFC_ELS_RING) {
396 lpfc_debugfs_slow_ring_trc(phba,
397 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
398 *(((uint32_t *) &nextiocb->iocb) + 4),
399 *(((uint32_t *) &nextiocb->iocb) + 6),
400 *(((uint32_t *) &nextiocb->iocb) + 7));
401 }
402
dea3101e
JB		 403 /*
404 * Issue iocb command to adapter
405 */
92d7f7b0 406 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB		 407 wmb();
408 pring->stats.iocb_cmd++;
409
410 /*
411 * If there is no completion routine to call, we can release the
412 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
413 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
414 */
415 if (nextiocb->iocb_cmpl)
416 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 417 else
2e0fef85 418 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB		 419
420 /*
421 * Let the HBA know what IOCB slot will be the next one the
422 * driver will put a command into.
423 */
424 pring->cmdidx = pring->next_cmdidx;
ed957684 425 writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB		 426}
427
428static void
2e0fef85 429lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 430{
431 int ringno = pring->ringno;
432
433 pring->flag |= LPFC_CALL_RING_AVAILABLE;
434
435 wmb();
436
437 /*
438 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
439 * The HBA will tell us when an IOCB entry is available.
440 */
441 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
442 readl(phba->CAregaddr); /* flush */
443
444 pring->stats.iocb_cmd_full++;
445}
446
447static void
2e0fef85 448lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 449{
450 int ringno = pring->ringno;
451
452 /*
453 * Tell the HBA that there is work to do in this ring.
454 */
455 wmb();
456 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
457 readl(phba->CAregaddr); /* flush */
458}
459
460static void
2e0fef85 461lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 462{
463 IOCB_t *iocb;
464 struct lpfc_iocbq *nextiocb;
465
466 /*
467 * Check to see if:
468 * (a) there is anything on the txq to send
469 * (b) link is up
470 * (c) link attention events can be processed (fcp ring only)
471 * (d) IOCB processing is not blocked by the outstanding mbox command.
472 */
473 if (pring->txq_cnt &&
2e0fef85 474 lpfc_is_link_up(phba) &&
dea3101e
JB		 475 (pring->ringno != phba->sli.fcp_ring ||
476 phba->sli.sli_flag & LPFC_PROCESS_LA) &&
477 !(pring->flag & LPFC_STOP_IOCB_MBX)) {
478
479 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
480 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
481 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
482
483 if (iocb)
484 lpfc_sli_update_ring(phba, pring);
485 else
486 lpfc_sli_update_full_ring(phba, pring);
487 }
488
489 return;
490}
491
492/* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
493static void
2e0fef85 494lpfc_sli_turn_on_ring(struct lpfc_hba *phba, int ringno)
dea3101e 495{
ed957684
JS		 496 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
497 &phba->slim2p->mbx.us.s3_pgp.port[ringno] :
498 &phba->slim2p->mbx.us.s2.port[ringno];
2e0fef85 499 unsigned long iflags;
dea3101e
JB		 500
501 /* If the ring is active, flag it */
2e0fef85 502 spin_lock_irqsave(&phba->hbalock, iflags);
dea3101e
JB		 503 if (phba->sli.ring[ringno].cmdringaddr) {
504 if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
505 phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
506 /*
507 * Force update of the local copy of cmdGetInx
508 */
509 phba->sli.ring[ringno].local_getidx
510 = le32_to_cpu(pgp->cmdGetInx);
dea3101e 511 lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
dea3101e
JB		 512 }
513 }
2e0fef85 514 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB		 515}
516
ed957684
JS		 517struct lpfc_hbq_entry *
518lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
519{
520 struct hbq_s *hbqp = &phba->hbqs[hbqno];
521
522 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
523 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
524 hbqp->next_hbqPutIdx = 0;
525
526 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 527 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS		 528 uint32_t getidx = le32_to_cpu(raw_index);
529
530 hbqp->local_hbqGetIdx = getidx;
531
532 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
533 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 534 LOG_SLI | LOG_VPORT,
e8b62011 535 "1802 HBQ %d: local_hbqGetIdx "
ed957684 536 "%u is > than hbqp->entry_count %u\n",
e8b62011 537 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS		 538 hbqp->entry_count);
539
540 phba->link_state = LPFC_HBA_ERROR;
541 return NULL;
542 }
543
544 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
545 return NULL;
546 }
547
548 return (struct lpfc_hbq_entry *) phba->hbqslimp.virt + hbqp->hbqPutIdx;
549}
550
551void
552lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
553{
92d7f7b0
JS		 554 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
555 struct hbq_dmabuf *hbq_buf;
ed957684 556
ed957684 557 /* Return all memory used by all HBQs */
92d7f7b0
JS		 558 list_for_each_entry_safe(dmabuf, next_dmabuf,
559 &phba->hbq_buffer_list, list) {
560 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
561 list_del(&hbq_buf->dbuf.list);
562 lpfc_hbq_free(phba, hbq_buf->dbuf.virt, hbq_buf->dbuf.phys);
563 kfree(hbq_buf);
ed957684 564 }
ed957684
JS		 565}
566
567static void
568lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 569 struct hbq_dmabuf *hbq_buf)
ed957684
JS		 570{
571 struct lpfc_hbq_entry *hbqe;
92d7f7b0 572 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684
JS		 573
574 /* Get next HBQ entry slot to use */
575 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
576 if (hbqe) {
577 struct hbq_s *hbqp = &phba->hbqs[hbqno];
578
92d7f7b0
JS		 579 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
580 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
ed957684
JS		 581 hbqe->bde.tus.f.bdeSize = FCELSSIZE;
582 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS		 583 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
584 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
585 /* Sync SLIM */
ed957684
JS		 586 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
587 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 588 /* flush */
ed957684 589 readl(phba->hbq_put + hbqno);
92d7f7b0 590 list_add_tail(&hbq_buf->dbuf.list, &phba->hbq_buffer_list);
ed957684
JS		 591 }
592}
593
92d7f7b0
JS		 594static struct lpfc_hbq_init lpfc_els_hbq = {
595 .rn = 1,
596 .entry_count = 200,
597 .mask_count = 0,
598 .profile = 0,
599 .ring_mask = 1 << LPFC_ELS_RING,
600 .buffer_count = 0,
601 .init_count = 20,
602 .add_count = 5,
603};
ed957684 604
78b2d852 605struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0
JS		 606 &lpfc_els_hbq,
607};
ed957684
JS		 608
609int
92d7f7b0 610lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 611{
92d7f7b0
JS		 612 uint32_t i, start, end;
613 struct hbq_dmabuf *hbq_buffer;
ed957684 614
92d7f7b0
JS		 615 start = lpfc_hbq_defs[hbqno]->buffer_count;
616 end = count + lpfc_hbq_defs[hbqno]->buffer_count;
617 if (end > lpfc_hbq_defs[hbqno]->entry_count) {
618 end = lpfc_hbq_defs[hbqno]->entry_count;
619 }
ed957684
JS		 620
621 /* Populate HBQ entries */
92d7f7b0
JS		 622 for (i = start; i < end; i++) {
623 hbq_buffer = kmalloc(sizeof(struct hbq_dmabuf),
624 GFP_KERNEL);
625 if (!hbq_buffer)
626 return 1;
627 hbq_buffer->dbuf.virt = lpfc_hbq_alloc(phba, MEM_PRI,
628 &hbq_buffer->dbuf.phys);
629 if (hbq_buffer->dbuf.virt == NULL)
630 return 1;
631 hbq_buffer->tag = (i | (hbqno << 16));
632 lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer);
633 lpfc_hbq_defs[hbqno]->buffer_count++;
ed957684
JS		 634 }
635 return 0;
636}
637
92d7f7b0
JS		 638int
639lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 640{
92d7f7b0
JS		 641 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
642 lpfc_hbq_defs[qno]->add_count));
643}
ed957684 644
92d7f7b0
JS		 645int
646lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
647{
648 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
649 lpfc_hbq_defs[qno]->init_count));
ed957684
JS		 650}
651
92d7f7b0
JS		 652struct hbq_dmabuf *
653lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 654{
92d7f7b0
JS		 655 struct lpfc_dmabuf *d_buf;
656 struct hbq_dmabuf *hbq_buf;
ed957684 657
92d7f7b0
JS		 658 list_for_each_entry(d_buf, &phba->hbq_buffer_list, list) {
659 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
660 if ((hbq_buf->tag & 0xffff) == tag) {
661 return hbq_buf;
ed957684
JS		 662 }
663 }
92d7f7b0 664 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011
JS		 665 "1803 Bad hbq tag. Data: x%x x%x\n",
666 tag, lpfc_hbq_defs[tag >> 16]->buffer_count);
92d7f7b0 667 return NULL;
ed957684
JS		 668}
669
670void
671lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *sp)
672{
673 uint32_t hbqno;
674
675 if (sp) {
676 hbqno = sp->tag >> 16;
677 lpfc_sli_hbq_to_firmware(phba, hbqno, sp);
678 }
679}
680
dea3101e
JB		 681static int
682lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
683{
684 uint8_t ret;
685
686 switch (mbxCommand) {
687 case MBX_LOAD_SM:
688 case MBX_READ_NV:
689 case MBX_WRITE_NV:
690 case MBX_RUN_BIU_DIAG:
691 case MBX_INIT_LINK:
692 case MBX_DOWN_LINK:
693 case MBX_CONFIG_LINK:
694 case MBX_CONFIG_RING:
695 case MBX_RESET_RING:
696 case MBX_READ_CONFIG:
697 case MBX_READ_RCONFIG:
698 case MBX_READ_SPARM:
699 case MBX_READ_STATUS:
700 case MBX_READ_RPI:
701 case MBX_READ_XRI:
702 case MBX_READ_REV:
703 case MBX_READ_LNK_STAT:
704 case MBX_REG_LOGIN:
705 case MBX_UNREG_LOGIN:
706 case MBX_READ_LA:
707 case MBX_CLEAR_LA:
708 case MBX_DUMP_MEMORY:
709 case MBX_DUMP_CONTEXT:
710 case MBX_RUN_DIAGS:
711 case MBX_RESTART:
712 case MBX_UPDATE_CFG:
713 case MBX_DOWN_LOAD:
714 case MBX_DEL_LD_ENTRY:
715 case MBX_RUN_PROGRAM:
716 case MBX_SET_MASK:
717 case MBX_SET_SLIM:
718 case MBX_UNREG_D_ID:
41415862 719 case MBX_KILL_BOARD:
dea3101e 720 case MBX_CONFIG_FARP:
41415862 721 case MBX_BEACON:
dea3101e
JB		 722 case MBX_LOAD_AREA:
723 case MBX_RUN_BIU_DIAG64:
724 case MBX_CONFIG_PORT:
725 case MBX_READ_SPARM64:
726 case MBX_READ_RPI64:
727 case MBX_REG_LOGIN64:
728 case MBX_READ_LA64:
729 case MBX_FLASH_WR_ULA:
730 case MBX_SET_DEBUG:
731 case MBX_LOAD_EXP_ROM:
92d7f7b0
JS		 732 case MBX_REG_VPI:
733 case MBX_UNREG_VPI:
858c9f6c 734 case MBX_HEARTBEAT:
dea3101e
JB		 735 ret = mbxCommand;
736 break;
737 default:
738 ret = MBX_SHUTDOWN;
739 break;
740 }
2e0fef85 741 return ret;
dea3101e
JB		 742}
743static void
2e0fef85 744lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e
JB		 745{
746 wait_queue_head_t *pdone_q;
858c9f6c 747 unsigned long drvr_flag;
dea3101e
JB		 748
749 /*
750 * If pdone_q is empty, the driver thread gave up waiting and
751 * continued running.
752 */
7054a606 753 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 754 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e
JB		 755 pdone_q = (wait_queue_head_t *) pmboxq->context1;
756 if (pdone_q)
757 wake_up_interruptible(pdone_q);
858c9f6c 758 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB		 759 return;
760}
761
762void
2e0fef85 763lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e
JB		 764{
765 struct lpfc_dmabuf *mp;
7054a606
JS		 766 uint16_t rpi;
767 int rc;
768
dea3101e 769 mp = (struct lpfc_dmabuf *) (pmb->context1);
7054a606 770
dea3101e
JB		 771 if (mp) {
772 lpfc_mbuf_free(phba, mp->virt, mp->phys);
773 kfree(mp);
774 }
7054a606
JS		 775
776 /*
777 * If a REG_LOGIN succeeded after node is destroyed or node
778 * is in re-discovery driver need to cleanup the RPI.
779 */
2e0fef85
JS		 780 if (!(phba->pport->load_flag & FC_UNLOADING) &&
781 pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
782 !pmb->mb.mbxStatus) {
7054a606
JS		 783
784 rpi = pmb->mb.un.varWords[0];
92d7f7b0
JS		 785 lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
786 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS		 787 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
788 if (rc != MBX_NOT_FINISHED)
789 return;
790 }
791
2e0fef85 792 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB		 793 return;
794}
795
796int
2e0fef85 797lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 798{
92d7f7b0 799 MAILBOX_t *pmbox;
dea3101e 800 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS		 801 int rc;
802 LIST_HEAD(cmplq);
dea3101e
JB		 803
804 phba->sli.slistat.mbox_event++;
805
92d7f7b0
JS		 806 /* Get all completed mailboxe buffers into the cmplq */
807 spin_lock_irq(&phba->hbalock);
808 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
809 spin_unlock_irq(&phba->hbalock);
dea3101e 810
92d7f7b0
JS		 811 /* Get a Mailbox buffer to setup mailbox commands for callback */
812 do {
813 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
814 if (pmb == NULL)
815 break;
2e0fef85 816
92d7f7b0 817 pmbox = &pmb->mb;
dea3101e 818
858c9f6c
JS		 819 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
820 if (pmb->vport) {
821 lpfc_debugfs_disc_trc(pmb->vport,
822 LPFC_DISC_TRC_MBOX_VPORT,
823 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
824 (uint32_t)pmbox->mbxCommand,
825 pmbox->un.varWords[0],
826 pmbox->un.varWords[1]);
827 }
828 else {
829 lpfc_debugfs_disc_trc(phba->pport,
830 LPFC_DISC_TRC_MBOX,
831 "MBOX cmpl: cmd:x%x mb:x%x x%x",
832 (uint32_t)pmbox->mbxCommand,
833 pmbox->un.varWords[0],
834 pmbox->un.varWords[1]);
835 }
836 }
837
dea3101e
JB		 838 /*
839 * It is a fatal error if unknown mbox command completion.
840 */
841 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
842 MBX_SHUTDOWN) {
dea3101e 843 /* Unknow mailbox command compl */
92d7f7b0 844 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 845 "(%d):0323 Unknown Mailbox command "
92d7f7b0 846 "%x Cmpl\n",
92d7f7b0
JS		 847 pmb->vport ? pmb->vport->vpi : 0,
848 pmbox->mbxCommand);
2e0fef85 849 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 850 phba->work_hs = HS_FFER3;
851 lpfc_handle_eratt(phba);
92d7f7b0 852 continue;
dea3101e
JB		 853 }
854
dea3101e
JB		 855 if (pmbox->mbxStatus) {
856 phba->sli.slistat.mbox_stat_err++;
857 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
858 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0
JS		 859 lpfc_printf_log(phba, KERN_INFO,
860 LOG_MBOX | LOG_SLI,
e8b62011 861 "(%d):0305 Mbox cmd cmpl "
92d7f7b0
JS		 862 "error - RETRYing Data: x%x "
863 "x%x x%x x%x\n",
92d7f7b0
JS		 864 pmb->vport ? pmb->vport->vpi :0,
865 pmbox->mbxCommand,
866 pmbox->mbxStatus,
867 pmbox->un.varWords[0],
868 pmb->vport->port_state);
dea3101e
JB		 869 pmbox->mbxStatus = 0;
870 pmbox->mbxOwner = OWN_HOST;
2e0fef85 871 spin_lock_irq(&phba->hbalock);
dea3101e 872 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 873 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 874 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
875 if (rc == MBX_SUCCESS)
92d7f7b0 876 continue;
dea3101e
JB		 877 }
878 }
879
880 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 881 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 882 "(%d):0307 Mailbox cmd x%x Cmpl x%p "
dea3101e 883 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
92d7f7b0 884 pmb->vport ? pmb->vport->vpi : 0,
dea3101e
JB		 885 pmbox->mbxCommand,
886 pmb->mbox_cmpl,
887 *((uint32_t *) pmbox),
888 pmbox->un.varWords[0],
889 pmbox->un.varWords[1],
890 pmbox->un.varWords[2],
891 pmbox->un.varWords[3],
892 pmbox->un.varWords[4],
893 pmbox->un.varWords[5],
894 pmbox->un.varWords[6],
895 pmbox->un.varWords[7]);
896
92d7f7b0 897 if (pmb->mbox_cmpl)
dea3101e 898 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS		 899 } while (1);
900 return 0;
901}
dea3101e 902
92d7f7b0
JS		 903static struct lpfc_dmabuf *
904lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
905{
906 struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
dea3101e 907
92d7f7b0
JS		 908 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
909 if (hbq_entry == NULL)
910 return NULL;
911 list_del(&hbq_entry->dbuf.list);
912 new_hbq_entry = kmalloc(sizeof(struct hbq_dmabuf), GFP_ATOMIC);
913 if (new_hbq_entry == NULL)
914 return &hbq_entry->dbuf;
915 new_hbq_entry->dbuf = hbq_entry->dbuf;
916 new_hbq_entry->tag = -1;
917 hbq_entry->dbuf.virt = lpfc_hbq_alloc(phba, 0, &hbq_entry->dbuf.phys);
918 if (hbq_entry->dbuf.virt == NULL) {
919 kfree(new_hbq_entry);
920 return &hbq_entry->dbuf;
921 }
922 lpfc_sli_free_hbq(phba, hbq_entry);
923 return &new_hbq_entry->dbuf;
dea3101e 924}
92d7f7b0 925
dea3101e
JB		 926static int
927lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
928 struct lpfc_iocbq *saveq)
929{
930 IOCB_t * irsp;
931 WORD5 * w5p;
932 uint32_t Rctl, Type;
933 uint32_t match, i;
934
935 match = 0;
936 irsp = &(saveq->iocb);
937 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
ed957684
JS		 938 || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)
939 || (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)
940 || (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX)) {
dea3101e
JB		 941 Rctl = FC_ELS_REQ;
942 Type = FC_ELS_DATA;
943 } else {
944 w5p =
945 (WORD5 *) & (saveq->iocb.un.
946 ulpWord[5]);
947 Rctl = w5p->hcsw.Rctl;
948 Type = w5p->hcsw.Type;
949
950 /* Firmware Workaround */
951 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
92d7f7b0
JS		 952 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
953 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
dea3101e
JB		 954 Rctl = FC_ELS_REQ;
955 Type = FC_ELS_DATA;
956 w5p->hcsw.Rctl = Rctl;
957 w5p->hcsw.Type = Type;
958 }
959 }
92d7f7b0
JS		 960
961 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
962 if (irsp->ulpBdeCount != 0)
963 saveq->context2 = lpfc_sli_replace_hbqbuff(phba,
964 irsp->un.ulpWord[3]);
965 if (irsp->ulpBdeCount == 2)
966 saveq->context3 = lpfc_sli_replace_hbqbuff(phba,
967 irsp->un.ulpWord[15]);
968 }
969
dea3101e
JB		 970 /* unSolicited Responses */
971 if (pring->prt[0].profile) {
cf5bf97e
JW		 972 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
973 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
974 saveq);
dea3101e
JB		 975 match = 1;
976 } else {
977 /* We must search, based on rctl / type
978 for the right routine */
979 for (i = 0; i < pring->num_mask;
980 i++) {
981 if ((pring->prt[i].rctl ==
982 Rctl)
983 && (pring->prt[i].
984 type == Type)) {
cf5bf97e
JW		 985 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
986 (pring->prt[i].lpfc_sli_rcv_unsol_event)
987 (phba, pring, saveq);
dea3101e
JB		 988 match = 1;
989 break;
990 }
991 }
992 }
993 if (match == 0) {
994 /* Unexpected Rctl / Type received */
995 /* Ring <ringno> handler: unexpected
996 Rctl <Rctl> Type <Type> received */
92d7f7b0 997 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 998 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 999 "Type x%x received\n",
e8b62011 1000 pring->ringno, Rctl, Type);
dea3101e 1001 }
92d7f7b0 1002 return 1;
dea3101e
JB		 1003}
1004
1005static struct lpfc_iocbq *
2e0fef85
JS		 1006lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
1007 struct lpfc_sli_ring *pring,
1008 struct lpfc_iocbq *prspiocb)
dea3101e 1009{
dea3101e
JB		 1010 struct lpfc_iocbq *cmd_iocb = NULL;
1011 uint16_t iotag;
1012
604a3e30
JB		 1013 iotag = prspiocb->iocb.ulpIoTag;
1014
1015 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
1016 cmd_iocb = phba->sli.iocbq_lookup[iotag];
92d7f7b0 1017 list_del_init(&cmd_iocb->list);
604a3e30
JB		 1018 pring->txcmplq_cnt--;
1019 return cmd_iocb;
dea3101e
JB		 1020 }
1021
dea3101e 1022 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1023 "0317 iotag x%x is out off "
604a3e30 1024 "range: max iotag x%x wd0 x%x\n",
e8b62011 1025 iotag, phba->sli.last_iotag,
604a3e30 1026 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB		 1027 return NULL;
1028}
1029
1030static int
2e0fef85 1031lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB		 1032 struct lpfc_iocbq *saveq)
1033{
2e0fef85 1034 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB		 1035 int rc = 1;
1036 unsigned long iflag;
1037
1038 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
2e0fef85 1039 spin_lock_irqsave(&phba->hbalock, iflag);
604a3e30 1040 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
2e0fef85
JS		 1041 spin_unlock_irqrestore(&phba->hbalock, iflag);
1042
dea3101e
JB		 1043 if (cmdiocbp) {
1044 if (cmdiocbp->iocb_cmpl) {
1045 /*
1046 * Post all ELS completions to the worker thread.
1047 * All other are passed to the completion callback.
1048 */
1049 if (pring->ringno == LPFC_ELS_RING) {
07951076
JS		 1050 if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
1051 cmdiocbp->iocb_flag &=
1052 ~LPFC_DRIVER_ABORTED;
1053 saveq->iocb.ulpStatus =
1054 IOSTAT_LOCAL_REJECT;
1055 saveq->iocb.un.ulpWord[4] =
1056 IOERR_SLI_ABORTED;
1057 }
dea3101e 1058 }
2e0fef85 1059 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB		 1060 } else
1061 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB		 1062 } else {
1063 /*
1064 * Unknown initiating command based on the response iotag.
1065 * This could be the case on the ELS ring because of
1066 * lpfc_els_abort().
1067 */
1068 if (pring->ringno != LPFC_ELS_RING) {
1069 /*
1070 * Ring <ringno> handler: unexpected completion IoTag
1071 * <IoTag>
1072 */
e8b62011
JS		 1073 lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
1074 "0322 Ring %d handler: "
1075 "unexpected completion IoTag x%x "
1076 "Data: x%x x%x x%x x%x\n",
1077 pring->ringno,
1078 saveq->iocb.ulpIoTag,
1079 saveq->iocb.ulpStatus,
1080 saveq->iocb.un.ulpWord[4],
1081 saveq->iocb.ulpCommand,
1082 saveq->iocb.ulpContext);
dea3101e
JB		 1083 }
1084 }
68876920 1085
dea3101e
JB		 1086 return rc;
1087}
1088
2e0fef85
JS		 1089static void
1090lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 1091{
ed957684
JS		 1092 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1093 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1094 &phba->slim2p->mbx.us.s2.port[pring->ringno];
875fbdfe
JSEC		 1095 /*
1096 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1097 * rsp ring <portRspMax>
1098 */
1099 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1100 "0312 Ring %d handler: portRspPut %d "
875fbdfe 1101 "is bigger then rsp ring %d\n",
e8b62011 1102 pring->ringno, le32_to_cpu(pgp->rspPutInx),
875fbdfe
JSEC		 1103 pring->numRiocb);
1104
2e0fef85 1105 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC		 1106
1107 /*
1108 * All error attention handlers are posted to
1109 * worker thread
1110 */
1111 phba->work_ha |= HA_ERATT;
1112 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 1113
1114 /* hbalock should already be held */
875fbdfe 1115 if (phba->work_wait)
92d7f7b0 1116 lpfc_worker_wake_up(phba);
875fbdfe
JSEC		 1117
1118 return;
1119}
1120
2e0fef85 1121void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
875fbdfe 1122{
2e0fef85
JS		 1123 struct lpfc_sli *psli = &phba->sli;
1124 struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
875fbdfe
JSEC		 1125 IOCB_t *irsp = NULL;
1126 IOCB_t *entry = NULL;
1127 struct lpfc_iocbq *cmdiocbq = NULL;
1128 struct lpfc_iocbq rspiocbq;
1129 struct lpfc_pgp *pgp;
1130 uint32_t status;
1131 uint32_t portRspPut, portRspMax;
1132 int type;
1133 uint32_t rsp_cmpl = 0;
875fbdfe 1134 uint32_t ha_copy;
2e0fef85 1135 unsigned long iflags;
875fbdfe
JSEC		 1136
1137 pring->stats.iocb_event++;
1138
ed957684
JS		 1139 pgp = (phba->sli_rev == 3) ?
1140 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1141 &phba->slim2p->mbx.us.s2.port[pring->ringno];
1142
875fbdfe
JSEC		 1143
1144 /*
1145 * The next available response entry should never exceed the maximum
1146 * entries. If it does, treat it as an adapter hardware error.
1147 */
1148 portRspMax = pring->numRiocb;
1149 portRspPut = le32_to_cpu(pgp->rspPutInx);
1150 if (unlikely(portRspPut >= portRspMax)) {
1151 lpfc_sli_rsp_pointers_error(phba, pring);
1152 return;
1153 }
1154
1155 rmb();
1156 while (pring->rspidx != portRspPut) {
ed957684 1157 entry = lpfc_resp_iocb(phba, pring);
875fbdfe
JSEC		 1158 if (++pring->rspidx >= portRspMax)
1159 pring->rspidx = 0;
1160
1161 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1162 (uint32_t *) &rspiocbq.iocb,
92d7f7b0 1163 phba->iocb_rsp_size);
875fbdfe
JSEC		 1164 irsp = &rspiocbq.iocb;
1165 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1166 pring->stats.iocb_rsp++;
1167 rsp_cmpl++;
1168
1169 if (unlikely(irsp->ulpStatus)) {
1170 /* Rsp ring <ringno> error: IOCB */
1171 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1172 "0326 Rsp Ring %d error: IOCB Data: "
875fbdfe 1173 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1174 pring->ringno,
875fbdfe
JSEC		 1175 irsp->un.ulpWord[0],
1176 irsp->un.ulpWord[1],
1177 irsp->un.ulpWord[2],
1178 irsp->un.ulpWord[3],
1179 irsp->un.ulpWord[4],
1180 irsp->un.ulpWord[5],
1181 *(((uint32_t *) irsp) + 6),
1182 *(((uint32_t *) irsp) + 7));
1183 }
1184
1185 switch (type) {
1186 case LPFC_ABORT_IOCB:
1187 case LPFC_SOL_IOCB:
1188 /*
1189 * Idle exchange closed via ABTS from port. No iocb
1190 * resources need to be recovered.
1191 */
1192 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1193 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 1194 "0314 IOCB cmd 0x%x "
1195 "processed. Skipping "
1196 "completion",
dca9479b 1197 irsp->ulpCommand);
875fbdfe
JSEC		 1198 break;
1199 }
1200
2e0fef85 1201 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1202 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1203 &rspiocbq);
2e0fef85 1204 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1205 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
1206 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1207 &rspiocbq);
1208 }
1209 break;
1210 default:
1211 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1212 char adaptermsg[LPFC_MAX_ADPTMSG];
1213 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1214 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1215 MAX_MSG_DATA);
1216 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
1217 phba->brd_no, adaptermsg);
1218 } else {
1219 /* Unknown IOCB command */
1220 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1221 "0321 Unknown IOCB command "
875fbdfe 1222 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1223 type, irsp->ulpCommand,
875fbdfe
JSEC		 1224 irsp->ulpStatus,
1225 irsp->ulpIoTag,
1226 irsp->ulpContext);
1227 }
1228 break;
1229 }
1230
1231 /*
1232 * The response IOCB has been processed. Update the ring
1233 * pointer in SLIM. If the port response put pointer has not
1234 * been updated, sync the pgp->rspPutInx and fetch the new port
1235 * response put pointer.
1236 */
ed957684 1237 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
875fbdfe
JSEC		 1238
1239 if (pring->rspidx == portRspPut)
1240 portRspPut = le32_to_cpu(pgp->rspPutInx);
1241 }
1242
1243 ha_copy = readl(phba->HAregaddr);
1244 ha_copy >>= (LPFC_FCP_RING * 4);
1245
1246 if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
2e0fef85 1247 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1248 pring->stats.iocb_rsp_full++;
1249 status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
1250 writel(status, phba->CAregaddr);
1251 readl(phba->CAregaddr);
2e0fef85 1252 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1253 }
1254 if ((ha_copy & HA_R0CE_RSP) &&
1255 (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
2e0fef85 1256 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1257 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1258 pring->stats.iocb_cmd_empty++;
1259
1260 /* Force update of the local copy of cmdGetInx */
1261 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1262 lpfc_sli_resume_iocb(phba, pring);
1263
1264 if ((pring->lpfc_sli_cmd_available))
1265 (pring->lpfc_sli_cmd_available) (phba, pring);
1266
2e0fef85 1267 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1268 }
1269
1270 return;
1271}
1272
dea3101e
JB		 1273/*
1274 * This routine presumes LPFC_FCP_RING handling and doesn't bother
1275 * to check it explicitly.
1276 */
1277static int
2e0fef85
JS		 1278lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
1279 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1280{
ed957684
JS		 1281 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1282 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1283 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 1284 IOCB_t *irsp = NULL;
87f6eaff 1285 IOCB_t *entry = NULL;
dea3101e
JB		 1286 struct lpfc_iocbq *cmdiocbq = NULL;
1287 struct lpfc_iocbq rspiocbq;
dea3101e
JB		 1288 uint32_t status;
1289 uint32_t portRspPut, portRspMax;
1290 int rc = 1;
1291 lpfc_iocb_type type;
1292 unsigned long iflag;
1293 uint32_t rsp_cmpl = 0;
dea3101e 1294
2e0fef85 1295 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1296 pring->stats.iocb_event++;
1297
dea3101e
JB		 1298 /*
1299 * The next available response entry should never exceed the maximum
1300 * entries. If it does, treat it as an adapter hardware error.
1301 */
1302 portRspMax = pring->numRiocb;
1303 portRspPut = le32_to_cpu(pgp->rspPutInx);
1304 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 1305 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 1306 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1307 return 1;
1308 }
1309
1310 rmb();
1311 while (pring->rspidx != portRspPut) {
87f6eaff
JSEC		 1312 /*
1313 * Fetch an entry off the ring and copy it into a local data
1314 * structure. The copy involves a byte-swap since the
1315 * network byte order and pci byte orders are different.
1316 */
ed957684 1317 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 1318 phba->last_completion_time = jiffies;
875fbdfe
JSEC		 1319
1320 if (++pring->rspidx >= portRspMax)
1321 pring->rspidx = 0;
1322
87f6eaff
JSEC		 1323 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1324 (uint32_t *) &rspiocbq.iocb,
ed957684 1325 phba->iocb_rsp_size);
a4bc3379 1326 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC		 1327 irsp = &rspiocbq.iocb;
1328
dea3101e
JB		 1329 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1330 pring->stats.iocb_rsp++;
1331 rsp_cmpl++;
1332
1333 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS		 1334 /*
1335 * If resource errors reported from HBA, reduce
1336 * queuedepths of the SCSI device.
1337 */
1338 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1339 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1340 spin_unlock_irqrestore(&phba->hbalock, iflag);
1341 lpfc_adjust_queue_depth(phba);
1342 spin_lock_irqsave(&phba->hbalock, iflag);
1343 }
1344
dea3101e
JB		 1345 /* Rsp ring <ringno> error: IOCB */
1346 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1347 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 1348 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1349 pring->ringno,
92d7f7b0
JS		 1350 irsp->un.ulpWord[0],
1351 irsp->un.ulpWord[1],
1352 irsp->un.ulpWord[2],
1353 irsp->un.ulpWord[3],
1354 irsp->un.ulpWord[4],
1355 irsp->un.ulpWord[5],
1356 *(((uint32_t *) irsp) + 6),
1357 *(((uint32_t *) irsp) + 7));
dea3101e
JB		 1358 }
1359
1360 switch (type) {
1361 case LPFC_ABORT_IOCB:
1362 case LPFC_SOL_IOCB:
1363 /*
1364 * Idle exchange closed via ABTS from port. No iocb
1365 * resources need to be recovered.
1366 */
1367 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1368 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 1369 "0333 IOCB cmd 0x%x"
dca9479b 1370 " processed. Skipping"
92d7f7b0 1371 " completion\n",
dca9479b 1372 irsp->ulpCommand);
dea3101e
JB		 1373 break;
1374 }
1375
604a3e30
JB		 1376 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1377 &rspiocbq);
dea3101e 1378 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
b808608b
JW		 1379 if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
1380 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1381 &rspiocbq);
1382 } else {
2e0fef85
JS		 1383 spin_unlock_irqrestore(&phba->hbalock,
1384 iflag);
b808608b
JW		 1385 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1386 &rspiocbq);
2e0fef85 1387 spin_lock_irqsave(&phba->hbalock,
b808608b
JW		 1388 iflag);
1389 }
dea3101e
JB		 1390 }
1391 break;
a4bc3379 1392 case LPFC_UNSOL_IOCB:
2e0fef85 1393 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 1394 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 1395 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 1396 break;
dea3101e
JB		 1397 default:
1398 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1399 char adaptermsg[LPFC_MAX_ADPTMSG];
1400 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1401 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1402 MAX_MSG_DATA);
1403 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
1404 phba->brd_no, adaptermsg);
1405 } else {
1406 /* Unknown IOCB command */
1407 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1408 "0334 Unknown IOCB command "
92d7f7b0 1409 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1410 type, irsp->ulpCommand,
92d7f7b0
JS		 1411 irsp->ulpStatus,
1412 irsp->ulpIoTag,
1413 irsp->ulpContext);
dea3101e
JB		 1414 }
1415 break;
1416 }
1417
1418 /*
1419 * The response IOCB has been processed. Update the ring
1420 * pointer in SLIM. If the port response put pointer has not
1421 * been updated, sync the pgp->rspPutInx and fetch the new port
1422 * response put pointer.
1423 */
ed957684 1424 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e
JB		 1425
1426 if (pring->rspidx == portRspPut)
1427 portRspPut = le32_to_cpu(pgp->rspPutInx);
1428 }
1429
1430 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1431 pring->stats.iocb_rsp_full++;
1432 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1433 writel(status, phba->CAregaddr);
1434 readl(phba->CAregaddr);
1435 }
1436 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1437 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1438 pring->stats.iocb_cmd_empty++;
1439
1440 /* Force update of the local copy of cmdGetInx */
1441 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1442 lpfc_sli_resume_iocb(phba, pring);
1443
1444 if ((pring->lpfc_sli_cmd_available))
1445 (pring->lpfc_sli_cmd_available) (phba, pring);
1446
1447 }
1448
2e0fef85 1449 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1450 return rc;
1451}
1452
dea3101e 1453int
2e0fef85
JS		 1454lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
1455 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1456{
ed957684
JS		 1457 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1458 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1459 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e
JB		 1460 IOCB_t *entry;
1461 IOCB_t *irsp = NULL;
1462 struct lpfc_iocbq *rspiocbp = NULL;
1463 struct lpfc_iocbq *next_iocb;
1464 struct lpfc_iocbq *cmdiocbp;
1465 struct lpfc_iocbq *saveq;
dea3101e
JB		 1466 uint8_t iocb_cmd_type;
1467 lpfc_iocb_type type;
1468 uint32_t status, free_saveq;
1469 uint32_t portRspPut, portRspMax;
1470 int rc = 1;
1471 unsigned long iflag;
dea3101e 1472
2e0fef85 1473 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1474 pring->stats.iocb_event++;
1475
dea3101e
JB		 1476 /*
1477 * The next available response entry should never exceed the maximum
1478 * entries. If it does, treat it as an adapter hardware error.
1479 */
1480 portRspMax = pring->numRiocb;
1481 portRspPut = le32_to_cpu(pgp->rspPutInx);
1482 if (portRspPut >= portRspMax) {
1483 /*
1484 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1485 * rsp ring <portRspMax>
1486 */
ed957684 1487 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1488 "0303 Ring %d handler: portRspPut %d "
dea3101e 1489 "is bigger then rsp ring %d\n",
e8b62011 1490 pring->ringno, portRspPut, portRspMax);
dea3101e 1491
2e0fef85
JS		 1492 phba->link_state = LPFC_HBA_ERROR;
1493 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1494
1495 phba->work_hs = HS_FFER3;
1496 lpfc_handle_eratt(phba);
1497
1498 return 1;
1499 }
1500
1501 rmb();
dea3101e
JB		 1502 while (pring->rspidx != portRspPut) {
1503 /*
1504 * Build a completion list and call the appropriate handler.
1505 * The process is to get the next available response iocb, get
1506 * a free iocb from the list, copy the response data into the
1507 * free iocb, insert to the continuation list, and update the
1508 * next response index to slim. This process makes response
1509 * iocb's in the ring available to DMA as fast as possible but
1510 * pays a penalty for a copy operation. Since the iocb is
1511 * only 32 bytes, this penalty is considered small relative to
1512 * the PCI reads for register values and a slim write. When
1513 * the ulpLe field is set, the entire Command has been
1514 * received.
1515 */
ed957684
JS		 1516 entry = lpfc_resp_iocb(phba, pring);
1517
858c9f6c 1518 phba->last_completion_time = jiffies;
2e0fef85 1519 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB		 1520 if (rspiocbp == NULL) {
1521 printk(KERN_ERR "%s: out of buffers! Failing "
1522 "completion.\n", __FUNCTION__);
1523 break;
1524 }
1525
ed957684
JS		 1526 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
1527 phba->iocb_rsp_size);
dea3101e
JB		 1528 irsp = &rspiocbp->iocb;
1529
1530 if (++pring->rspidx >= portRspMax)
1531 pring->rspidx = 0;
1532
a58cbd52
JS		 1533 if (pring->ringno == LPFC_ELS_RING) {
1534 lpfc_debugfs_slow_ring_trc(phba,
1535 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1536 *(((uint32_t *) irsp) + 4),
1537 *(((uint32_t *) irsp) + 6),
1538 *(((uint32_t *) irsp) + 7));
1539 }
1540
ed957684 1541 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e
JB		 1542
1543 if (list_empty(&(pring->iocb_continueq))) {
1544 list_add(&rspiocbp->list, &(pring->iocb_continueq));
1545 } else {
1546 list_add_tail(&rspiocbp->list,
1547 &(pring->iocb_continueq));
1548 }
1549
1550 pring->iocb_continueq_cnt++;
1551 if (irsp->ulpLe) {
1552 /*
1553 * By default, the driver expects to free all resources
1554 * associated with this iocb completion.
1555 */
1556 free_saveq = 1;
1557 saveq = list_get_first(&pring->iocb_continueq,
1558 struct lpfc_iocbq, list);
1559 irsp = &(saveq->iocb);
1560 list_del_init(&pring->iocb_continueq);
1561 pring->iocb_continueq_cnt = 0;
1562
1563 pring->stats.iocb_rsp++;
1564
92d7f7b0
JS		 1565 /*
1566 * If resource errors reported from HBA, reduce
1567 * queuedepths of the SCSI device.
1568 */
1569 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1570 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1571 spin_unlock_irqrestore(&phba->hbalock, iflag);
1572 lpfc_adjust_queue_depth(phba);
1573 spin_lock_irqsave(&phba->hbalock, iflag);
1574 }
1575
dea3101e
JB		 1576 if (irsp->ulpStatus) {
1577 /* Rsp ring <ringno> error: IOCB */
ed957684 1578 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1579 "0328 Rsp Ring %d error: "
ed957684
JS		 1580 "IOCB Data: "
1581 "x%x x%x x%x x%x "
1582 "x%x x%x x%x x%x "
1583 "x%x x%x x%x x%x "
1584 "x%x x%x x%x x%x\n",
ed957684
JS		 1585 pring->ringno,
1586 irsp->un.ulpWord[0],
1587 irsp->un.ulpWord[1],
1588 irsp->un.ulpWord[2],
1589 irsp->un.ulpWord[3],
1590 irsp->un.ulpWord[4],
1591 irsp->un.ulpWord[5],
1592 *(((uint32_t *) irsp) + 6),
1593 *(((uint32_t *) irsp) + 7),
1594 *(((uint32_t *) irsp) + 8),
1595 *(((uint32_t *) irsp) + 9),
1596 *(((uint32_t *) irsp) + 10),
1597 *(((uint32_t *) irsp) + 11),
1598 *(((uint32_t *) irsp) + 12),
1599 *(((uint32_t *) irsp) + 13),
1600 *(((uint32_t *) irsp) + 14),
1601 *(((uint32_t *) irsp) + 15));
dea3101e
JB		 1602 }
1603
1604 /*
1605 * Fetch the IOCB command type and call the correct
1606 * completion routine. Solicited and Unsolicited
1607 * IOCBs on the ELS ring get freed back to the
1608 * lpfc_iocb_list by the discovery kernel thread.
1609 */
1610 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1611 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1612 if (type == LPFC_SOL_IOCB) {
2e0fef85 1613 spin_unlock_irqrestore(&phba->hbalock,
dea3101e
JB		 1614 iflag);
1615 rc = lpfc_sli_process_sol_iocb(phba, pring,
2e0fef85
JS		 1616 saveq);
1617 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 1618 } else if (type == LPFC_UNSOL_IOCB) {
2e0fef85 1619 spin_unlock_irqrestore(&phba->hbalock,
dea3101e
JB		 1620 iflag);
1621 rc = lpfc_sli_process_unsol_iocb(phba, pring,
2e0fef85
JS		 1622 saveq);
1623 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1624 } else if (type == LPFC_ABORT_IOCB) {
1625 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1626 ((cmdiocbp =
604a3e30
JB		 1627 lpfc_sli_iocbq_lookup(phba, pring,
1628 saveq)))) {
dea3101e
JB		 1629 /* Call the specified completion
1630 routine */
1631 if (cmdiocbp->iocb_cmpl) {
1632 spin_unlock_irqrestore(
2e0fef85 1633 &phba->hbalock,
dea3101e
JB		 1634 iflag);
1635 (cmdiocbp->iocb_cmpl) (phba,
1636 cmdiocbp, saveq);
1637 spin_lock_irqsave(
2e0fef85 1638 &phba->hbalock,
dea3101e 1639 iflag);
604a3e30 1640 } else
2e0fef85 1641 __lpfc_sli_release_iocbq(phba,
604a3e30 1642 cmdiocbp);
dea3101e
JB		 1643 }
1644 } else if (type == LPFC_UNKNOWN_IOCB) {
1645 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1646
1647 char adaptermsg[LPFC_MAX_ADPTMSG];
1648
1649 memset(adaptermsg, 0,
1650 LPFC_MAX_ADPTMSG);
1651 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1652 MAX_MSG_DATA);
1653 dev_warn(&((phba->pcidev)->dev),
1654 "lpfc%d: %s",
1655 phba->brd_no, adaptermsg);
1656 } else {
1657 /* Unknown IOCB command */
92d7f7b0 1658 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1659 "0335 Unknown IOCB "
92d7f7b0
JS		 1660 "command Data: x%x "
1661 "x%x x%x x%x\n",
92d7f7b0
JS		 1662 irsp->ulpCommand,
1663 irsp->ulpStatus,
1664 irsp->ulpIoTag,
1665 irsp->ulpContext);
dea3101e
JB		 1666 }
1667 }
1668
1669 if (free_saveq) {
2e0fef85
JS		 1670 list_for_each_entry_safe(rspiocbp, next_iocb,
1671 &saveq->list, list) {
1672 list_del(&rspiocbp->list);
1673 __lpfc_sli_release_iocbq(phba,
1674 rspiocbp);
dea3101e 1675 }
2e0fef85 1676 __lpfc_sli_release_iocbq(phba, saveq);
dea3101e 1677 }
92d7f7b0 1678 rspiocbp = NULL;
dea3101e
JB		 1679 }
1680
1681 /*
1682 * If the port response put pointer has not been updated, sync
1683 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1684 * response put pointer.
1685 */
1686 if (pring->rspidx == portRspPut) {
1687 portRspPut = le32_to_cpu(pgp->rspPutInx);
1688 }
1689 } /* while (pring->rspidx != portRspPut) */
1690
92d7f7b0 1691 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB		 1692 /* At least one response entry has been freed */
1693 pring->stats.iocb_rsp_full++;
1694 /* SET RxRE_RSP in Chip Att register */
1695 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1696 writel(status, phba->CAregaddr);
1697 readl(phba->CAregaddr); /* flush */
1698 }
1699 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1700 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1701 pring->stats.iocb_cmd_empty++;
1702
1703 /* Force update of the local copy of cmdGetInx */
1704 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1705 lpfc_sli_resume_iocb(phba, pring);
1706
1707 if ((pring->lpfc_sli_cmd_available))
1708 (pring->lpfc_sli_cmd_available) (phba, pring);
1709
1710 }
1711
2e0fef85 1712 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1713 return rc;
1714}
1715
2e0fef85 1716void
dea3101e
JB		 1717lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1718{
2534ba75 1719 LIST_HEAD(completions);
dea3101e 1720 struct lpfc_iocbq *iocb, *next_iocb;
2534ba75 1721 IOCB_t *cmd = NULL;
dea3101e 1722
92d7f7b0
JS		 1723 if (pring->ringno == LPFC_ELS_RING) {
1724 lpfc_fabric_abort_hba(phba);
1725 }
1726
dea3101e
JB		 1727 /* Error everything on txq and txcmplq
1728 * First do the txq.
1729 */
2e0fef85 1730 spin_lock_irq(&phba->hbalock);
2534ba75 1731 list_splice_init(&pring->txq, &completions);
dea3101e 1732 pring->txq_cnt = 0;
dea3101e
JB		 1733
1734 /* Next issue ABTS for everything on the txcmplq */
2534ba75
JS		 1735 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
1736 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
dea3101e 1737
2e0fef85 1738 spin_unlock_irq(&phba->hbalock);
dea3101e 1739
2534ba75
JS		 1740 while (!list_empty(&completions)) {
1741 iocb = list_get_first(&completions, struct lpfc_iocbq, list);
1742 cmd = &iocb->iocb;
92d7f7b0 1743 list_del_init(&iocb->list);
dea3101e 1744
2e0fef85
JS		 1745 if (!iocb->iocb_cmpl)
1746 lpfc_sli_release_iocbq(phba, iocb);
1747 else {
dea3101e
JB		 1748 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1749 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
dea3101e 1750 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 1751 }
dea3101e 1752 }
dea3101e
JB		 1753}
1754
41415862 1755int
2e0fef85 1756lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
dea3101e 1757{
41415862
JW		 1758 uint32_t status;
1759 int i = 0;
1760 int retval = 0;
dea3101e 1761
41415862
JW		 1762 /* Read the HBA Host Status Register */
1763 status = readl(phba->HSregaddr);
dea3101e 1764
41415862
JW		 1765 /*
1766 * Check status register every 100ms for 5 retries, then every
1767 * 500ms for 5, then every 2.5 sec for 5, then reset board and
1768 * every 2.5 sec for 4.
1769 * Break our of the loop if errors occurred during init.
1770 */
1771 while (((status & mask) != mask) &&
1772 !(status & HS_FFERM) &&
1773 i++ < 20) {
dea3101e 1774
41415862
JW		 1775 if (i <= 5)
1776 msleep(10);
1777 else if (i <= 10)
1778 msleep(500);
1779 else
1780 msleep(2500);
dea3101e 1781
41415862 1782 if (i == 15) {
2e0fef85 1783 /* Do post */
92d7f7b0 1784 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW		 1785 lpfc_sli_brdrestart(phba);
1786 }
1787 /* Read the HBA Host Status Register */
1788 status = readl(phba->HSregaddr);
1789 }
dea3101e 1790
41415862
JW		 1791 /* Check to see if any errors occurred during init */
1792 if ((status & HS_FFERM) || (i >= 20)) {
2e0fef85 1793 phba->link_state = LPFC_HBA_ERROR;
41415862 1794 retval = 1;
dea3101e 1795 }
dea3101e 1796
41415862
JW		 1797 return retval;
1798}
dea3101e 1799
9290831f
JS		 1800#define BARRIER_TEST_PATTERN (0xdeadbeef)
1801
2e0fef85 1802void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 1803{
65a29c16
JS		 1804 uint32_t __iomem *resp_buf;
1805 uint32_t __iomem *mbox_buf;
9290831f
JS		 1806 volatile uint32_t mbox;
1807 uint32_t hc_copy;
1808 int i;
1809 uint8_t hdrtype;
1810
1811 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
1812 if (hdrtype != 0x80 ||
1813 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
1814 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
1815 return;
1816
1817 /*
1818 * Tell the other part of the chip to suspend temporarily all
1819 * its DMA activity.
1820 */
65a29c16 1821 resp_buf = phba->MBslimaddr;
9290831f
JS		 1822
1823 /* Disable the error attention */
1824 hc_copy = readl(phba->HCregaddr);
1825 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
1826 readl(phba->HCregaddr); /* flush */
2e0fef85 1827 phba->link_flag |= LS_IGNORE_ERATT;
9290831f
JS		 1828
1829 if (readl(phba->HAregaddr) & HA_ERATT) {
1830 /* Clear Chip error bit */
1831 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 1832 phba->pport->stopped = 1;
9290831f
JS		 1833 }
1834
1835 mbox = 0;
1836 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
1837 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
1838
1839 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 1840 mbox_buf = phba->MBslimaddr;
9290831f
JS		 1841 writel(mbox, mbox_buf);
1842
1843 for (i = 0;
1844 readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
1845 mdelay(1);
1846
1847 if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
1848 if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
2e0fef85 1849 phba->pport->stopped)
9290831f
JS		 1850 goto restore_hc;
1851 else
1852 goto clear_errat;
1853 }
1854
1855 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
1856 for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
1857 mdelay(1);
1858
1859clear_errat:
1860
1861 while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
1862 mdelay(1);
1863
1864 if (readl(phba->HAregaddr) & HA_ERATT) {
1865 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 1866 phba->pport->stopped = 1;
9290831f
JS		 1867 }
1868
1869restore_hc:
2e0fef85 1870 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS		 1871 writel(hc_copy, phba->HCregaddr);
1872 readl(phba->HCregaddr); /* flush */
1873}
1874
41415862 1875int
2e0fef85 1876lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW		 1877{
1878 struct lpfc_sli *psli;
1879 LPFC_MBOXQ_t *pmb;
1880 uint32_t status;
1881 uint32_t ha_copy;
1882 int retval;
1883 int i = 0;
dea3101e 1884
41415862 1885 psli = &phba->sli;
dea3101e 1886
41415862 1887 /* Kill HBA */
ed957684 1888 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 1889 "0329 Kill HBA Data: x%x x%x\n",
1890 phba->pport->port_state, psli->sli_flag);
41415862
JW		 1891
1892 if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9290831f 1893 GFP_KERNEL)) == 0)
41415862 1894 return 1;
41415862
JW		 1895
1896 /* Disable the error attention */
2e0fef85 1897 spin_lock_irq(&phba->hbalock);
41415862
JW		 1898 status = readl(phba->HCregaddr);
1899 status &= ~HC_ERINT_ENA;
1900 writel(status, phba->HCregaddr);
1901 readl(phba->HCregaddr); /* flush */
2e0fef85
JS		 1902 phba->link_flag |= LS_IGNORE_ERATT;
1903 spin_unlock_irq(&phba->hbalock);
41415862
JW		 1904
1905 lpfc_kill_board(phba, pmb);
1906 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1907 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
1908
1909 if (retval != MBX_SUCCESS) {
1910 if (retval != MBX_BUSY)
1911 mempool_free(pmb, phba->mbox_mem_pool);
2e0fef85
JS		 1912 spin_lock_irq(&phba->hbalock);
1913 phba->link_flag &= ~LS_IGNORE_ERATT;
1914 spin_unlock_irq(&phba->hbalock);
41415862
JW		 1915 return 1;
1916 }
1917
9290831f
JS		 1918 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
1919
41415862
JW		 1920 mempool_free(pmb, phba->mbox_mem_pool);
1921
1922 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
1923 * attention every 100ms for 3 seconds. If we don't get ERATT after
1924 * 3 seconds we still set HBA_ERROR state because the status of the
1925 * board is now undefined.
1926 */
1927 ha_copy = readl(phba->HAregaddr);
1928
1929 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
1930 mdelay(100);
1931 ha_copy = readl(phba->HAregaddr);
1932 }
1933
1934 del_timer_sync(&psli->mbox_tmo);
9290831f
JS		 1935 if (ha_copy & HA_ERATT) {
1936 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 1937 phba->pport->stopped = 1;
9290831f 1938 }
2e0fef85 1939 spin_lock_irq(&phba->hbalock);
41415862 1940 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85
JS		 1941 phba->link_flag &= ~LS_IGNORE_ERATT;
1942 spin_unlock_irq(&phba->hbalock);
41415862
JW		 1943
1944 psli->mbox_active = NULL;
1945 lpfc_hba_down_post(phba);
2e0fef85 1946 phba->link_state = LPFC_HBA_ERROR;
41415862 1947
2e0fef85 1948 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB		 1949}
1950
41415862 1951int
2e0fef85 1952lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 1953{
41415862 1954 struct lpfc_sli *psli;
dea3101e 1955 struct lpfc_sli_ring *pring;
41415862 1956 uint16_t cfg_value;
dea3101e 1957 int i;
dea3101e 1958
41415862 1959 psli = &phba->sli;
dea3101e 1960
41415862
JW		 1961 /* Reset HBA */
1962 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 1963 "0325 Reset HBA Data: x%x x%x\n",
2e0fef85 1964 phba->pport->port_state, psli->sli_flag);
dea3101e
JB		 1965
1966 /* perform board reset */
1967 phba->fc_eventTag = 0;
2e0fef85
JS		 1968 phba->pport->fc_myDID = 0;
1969 phba->pport->fc_prevDID = 0;
dea3101e 1970
41415862
JW		 1971 /* Turn off parity checking and serr during the physical reset */
1972 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
1973 pci_write_config_word(phba->pcidev, PCI_COMMAND,
1974 (cfg_value &
1975 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
1976
1c067a42 1977 psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
41415862
JW		 1978 /* Now toggle INITFF bit in the Host Control Register */
1979 writel(HC_INITFF, phba->HCregaddr);
1980 mdelay(1);
1981 readl(phba->HCregaddr); /* flush */
1982 writel(0, phba->HCregaddr);
1983 readl(phba->HCregaddr); /* flush */
1984
1985 /* Restore PCI cmd register */
1986 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB		 1987
1988 /* Initialize relevant SLI info */
41415862
JW		 1989 for (i = 0; i < psli->num_rings; i++) {
1990 pring = &psli->ring[i];
dea3101e
JB		 1991 pring->flag = 0;
1992 pring->rspidx = 0;
1993 pring->next_cmdidx = 0;
1994 pring->local_getidx = 0;
1995 pring->cmdidx = 0;
1996 pring->missbufcnt = 0;
1997 }
dea3101e 1998
2e0fef85 1999 phba->link_state = LPFC_WARM_START;
41415862
JW		 2000 return 0;
2001}
2002
2003int
2e0fef85 2004lpfc_sli_brdrestart(struct lpfc_hba *phba)
41415862
JW		 2005{
2006 MAILBOX_t *mb;
2007 struct lpfc_sli *psli;
2008 uint16_t skip_post;
2009 volatile uint32_t word0;
2010 void __iomem *to_slim;
2011
2e0fef85 2012 spin_lock_irq(&phba->hbalock);
41415862
JW		 2013
2014 psli = &phba->sli;
2015
2016 /* Restart HBA */
2017 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 2018 "0337 Restart HBA Data: x%x x%x\n",
2e0fef85 2019 phba->pport->port_state, psli->sli_flag);
41415862
JW		 2020
2021 word0 = 0;
2022 mb = (MAILBOX_t *) &word0;
2023 mb->mbxCommand = MBX_RESTART;
2024 mb->mbxHc = 1;
2025
9290831f
JS		 2026 lpfc_reset_barrier(phba);
2027
41415862
JW		 2028 to_slim = phba->MBslimaddr;
2029 writel(*(uint32_t *) mb, to_slim);
2030 readl(to_slim); /* flush */
2031
2032 /* Only skip post after fc_ffinit is completed */
2e0fef85 2033 if (phba->pport->port_state) {
41415862
JW		 2034 skip_post = 1;
2035 word0 = 1; /* This is really setting up word1 */
dea3101e 2036 } else {
41415862
JW		 2037 skip_post = 0;
2038 word0 = 0; /* This is really setting up word1 */
dea3101e 2039 }
65a29c16 2040 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW		 2041 writel(*(uint32_t *) mb, to_slim);
2042 readl(to_slim); /* flush */
dea3101e 2043
41415862 2044 lpfc_sli_brdreset(phba);
2e0fef85
JS		 2045 phba->pport->stopped = 0;
2046 phba->link_state = LPFC_INIT_START;
41415862 2047
2e0fef85 2048 spin_unlock_irq(&phba->hbalock);
41415862 2049
64ba8818
JS		 2050 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
2051 psli->stats_start = get_seconds();
2052
41415862
JW		 2053 if (skip_post)
2054 mdelay(100);
2055 else
2056 mdelay(2000);
2057
2058 lpfc_hba_down_post(phba);
dea3101e
JB		 2059
2060 return 0;
2061}
2062
2063static int
2064lpfc_sli_chipset_init(struct lpfc_hba *phba)
2065{
2066 uint32_t status, i = 0;
2067
2068 /* Read the HBA Host Status Register */
2069 status = readl(phba->HSregaddr);
2070
2071 /* Check status register to see what current state is */
2072 i = 0;
2073 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
2074
2075 /* Check every 100ms for 5 retries, then every 500ms for 5, then
2076 * every 2.5 sec for 5, then reset board and every 2.5 sec for
2077 * 4.
2078 */
2079 if (i++ >= 20) {
2080 /* Adapter failed to init, timeout, status reg
2081 <status> */
ed957684 2082 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 2083 "0436 Adapter failed to init, "
2084 "timeout, status reg x%x\n", status);
2e0fef85 2085 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2086 return -ETIMEDOUT;
2087 }
2088
2089 /* Check to see if any errors occurred during init */
2090 if (status & HS_FFERM) {
2091 /* ERROR: During chipset initialization */
2092 /* Adapter failed to init, chipset, status reg
2093 <status> */
ed957684 2094 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 2095 "0437 Adapter failed to init, "
2096 "chipset, status reg x%x\n", status);
2e0fef85 2097 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2098 return -EIO;
2099 }
2100
2101 if (i <= 5) {
2102 msleep(10);
2103 } else if (i <= 10) {
2104 msleep(500);
2105 } else {
2106 msleep(2500);
2107 }
2108
2109 if (i == 15) {
2e0fef85 2110 /* Do post */
92d7f7b0 2111 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2112 lpfc_sli_brdrestart(phba);
dea3101e
JB		 2113 }
2114 /* Read the HBA Host Status Register */
2115 status = readl(phba->HSregaddr);
2116 }
2117
2118 /* Check to see if any errors occurred during init */
2119 if (status & HS_FFERM) {
2120 /* ERROR: During chipset initialization */
2121 /* Adapter failed to init, chipset, status reg <status> */
ed957684 2122 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 2123 "0438 Adapter failed to init, chipset, "
2124 "status reg x%x\n", status);
2e0fef85 2125 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2126 return -EIO;
2127 }
2128
2129 /* Clear all interrupt enable conditions */
2130 writel(0, phba->HCregaddr);
2131 readl(phba->HCregaddr); /* flush */
2132
2133 /* setup host attn register */
2134 writel(0xffffffff, phba->HAregaddr);
2135 readl(phba->HAregaddr); /* flush */
2136 return 0;
2137}
2138
78b2d852 2139int
ed957684
JS		 2140lpfc_sli_hbq_count(void)
2141{
92d7f7b0 2142 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS		 2143}
2144
2145static int
2146lpfc_sli_hbq_entry_count(void)
2147{
2148 int hbq_count = lpfc_sli_hbq_count();
2149 int count = 0;
2150 int i;
2151
2152 for (i = 0; i < hbq_count; ++i)
92d7f7b0 2153 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS		 2154 return count;
2155}
2156
dea3101e 2157int
ed957684
JS		 2158lpfc_sli_hbq_size(void)
2159{
2160 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
2161}
2162
2163static int
2164lpfc_sli_hbq_setup(struct lpfc_hba *phba)
2165{
2166 int hbq_count = lpfc_sli_hbq_count();
2167 LPFC_MBOXQ_t *pmb;
2168 MAILBOX_t *pmbox;
2169 uint32_t hbqno;
2170 uint32_t hbq_entry_index;
ed957684 2171
92d7f7b0
JS		 2172 /* Get a Mailbox buffer to setup mailbox
2173 * commands for HBA initialization
2174 */
ed957684
JS		 2175 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2176
2177 if (!pmb)
2178 return -ENOMEM;
2179
2180 pmbox = &pmb->mb;
2181
2182 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
2183 phba->link_state = LPFC_INIT_MBX_CMDS;
2184
2185 hbq_entry_index = 0;
2186 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2187 phba->hbqs[hbqno].next_hbqPutIdx = 0;
2188 phba->hbqs[hbqno].hbqPutIdx = 0;
2189 phba->hbqs[hbqno].local_hbqGetIdx = 0;
2190 phba->hbqs[hbqno].entry_count =
92d7f7b0
JS		 2191 lpfc_hbq_defs[hbqno]->entry_count;
2192 lpfc_config_hbq(phba, lpfc_hbq_defs[hbqno], hbq_entry_index,
2193 pmb);
ed957684
JS		 2194 hbq_entry_index += phba->hbqs[hbqno].entry_count;
2195
2196 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
2197 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
2198 mbxStatus <status>, ring <num> */
2199
2200 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2201 LOG_SLI | LOG_VPORT,
e8b62011 2202 "1805 Adapter failed to init. "
ed957684 2203 "Data: x%x x%x x%x\n",
e8b62011 2204 pmbox->mbxCommand,
ed957684
JS		 2205 pmbox->mbxStatus, hbqno);
2206
2207 phba->link_state = LPFC_HBA_ERROR;
2208 mempool_free(pmb, phba->mbox_mem_pool);
ed957684
JS		 2209 return ENXIO;
2210 }
2211 }
2212 phba->hbq_count = hbq_count;
2213
ed957684
JS		 2214 mempool_free(pmb, phba->mbox_mem_pool);
2215
92d7f7b0
JS		 2216 /* Initially populate or replenish the HBQs */
2217 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2218 if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
2219 return -ENOMEM;
2220 }
ed957684
JS		 2221 return 0;
2222}
2223
2224static int
2225lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB		 2226{
2227 LPFC_MBOXQ_t *pmb;
2228 uint32_t resetcount = 0, rc = 0, done = 0;
2229
2230 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2231 if (!pmb) {
2e0fef85 2232 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2233 return -ENOMEM;
2234 }
2235
ed957684 2236 phba->sli_rev = sli_mode;
dea3101e 2237 while (resetcount < 2 && !done) {
2e0fef85 2238 spin_lock_irq(&phba->hbalock);
1c067a42 2239 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2240 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2241 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2242 lpfc_sli_brdrestart(phba);
dea3101e
JB		 2243 msleep(2500);
2244 rc = lpfc_sli_chipset_init(phba);
2245 if (rc)
2246 break;
2247
2e0fef85 2248 spin_lock_irq(&phba->hbalock);
1c067a42 2249 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2250 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 2251 resetcount++;
2252
ed957684
JS		 2253 /* Call pre CONFIG_PORT mailbox command initialization. A
2254 * value of 0 means the call was successful. Any other
2255 * nonzero value is a failure, but if ERESTART is returned,
2256 * the driver may reset the HBA and try again.
2257 */
dea3101e
JB		 2258 rc = lpfc_config_port_prep(phba);
2259 if (rc == -ERESTART) {
ed957684 2260 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e
JB		 2261 continue;
2262 } else if (rc) {
2263 break;
2264 }
2265
2e0fef85 2266 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB		 2267 lpfc_config_port(phba, pmb);
2268 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
ed957684 2269 if (rc != MBX_SUCCESS) {
dea3101e 2270 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2271 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 2272 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
e8b62011 2273 pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
2e0fef85 2274 spin_lock_irq(&phba->hbalock);
dea3101e 2275 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85
JS		 2276 spin_unlock_irq(&phba->hbalock);
2277 rc = -ENXIO;
ed957684
JS		 2278 } else {
2279 done = 1;
92d7f7b0
JS		 2280 phba->max_vpi = (phba->max_vpi &&
2281 pmb->mb.un.varCfgPort.gmv) != 0
2282 ? pmb->mb.un.varCfgPort.max_vpi
2283 : 0;
dea3101e
JB		 2284 }
2285 }
ed957684
JS		 2286
2287 if (!done) {
2288 rc = -EINVAL;
2289 goto do_prep_failed;
2290 }
2291
2292 if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
92d7f7b0 2293 (!pmb->mb.un.varCfgPort.cMA)) {
ed957684
JS		 2294 rc = -ENXIO;
2295 goto do_prep_failed;
2296 }
2297 return rc;
2298
92d7f7b0 2299do_prep_failed:
ed957684
JS		 2300 mempool_free(pmb, phba->mbox_mem_pool);
2301 return rc;
2302}
2303
2304int
2305lpfc_sli_hba_setup(struct lpfc_hba *phba)
2306{
2307 uint32_t rc;
92d7f7b0 2308 int mode = 3;
ed957684
JS		 2309
2310 switch (lpfc_sli_mode) {
2311 case 2:
78b2d852 2312 if (phba->cfg_enable_npiv) {
92d7f7b0 2313 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011 2314 "1824 NPIV enabled: Override lpfc_sli_mode "
92d7f7b0 2315 "parameter (%d) to auto (0).\n",
e8b62011 2316 lpfc_sli_mode);
92d7f7b0
JS		 2317 break;
2318 }
ed957684
JS		 2319 mode = 2;
2320 break;
2321 case 0:
2322 case 3:
2323 break;
2324 default:
92d7f7b0 2325 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2326 "1819 Unrecognized lpfc_sli_mode "
2327 "parameter: %d.\n", lpfc_sli_mode);
ed957684
JS		 2328
2329 break;
2330 }
2331
2332 rc = lpfc_do_config_port(phba, mode);
2333 if (rc && lpfc_sli_mode == 3)
92d7f7b0 2334 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2335 "1820 Unable to select SLI-3. "
2336 "Not supported by adapter.\n");
ed957684
JS		 2337 if (rc && mode != 2)
2338 rc = lpfc_do_config_port(phba, 2);
2339 if (rc)
dea3101e
JB		 2340 goto lpfc_sli_hba_setup_error;
2341
ed957684
JS		 2342 if (phba->sli_rev == 3) {
2343 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
2344 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
2345 phba->sli3_options |= LPFC_SLI3_ENABLED;
2346 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
2347
2348 } else {
2349 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
2350 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 2351 phba->sli3_options = 0;
ed957684
JS		 2352 }
2353
2354 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 2355 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
2356 phba->sli_rev, phba->max_vpi);
ed957684 2357 rc = lpfc_sli_ring_map(phba);
dea3101e
JB		 2358
2359 if (rc)
2360 goto lpfc_sli_hba_setup_error;
2361
92d7f7b0 2362 /* Init HBQs */
ed957684
JS		 2363
2364 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
2365 rc = lpfc_sli_hbq_setup(phba);
2366 if (rc)
2367 goto lpfc_sli_hba_setup_error;
2368 }
2369
dea3101e
JB		 2370 phba->sli.sli_flag |= LPFC_PROCESS_LA;
2371
2372 rc = lpfc_config_port_post(phba);
2373 if (rc)
2374 goto lpfc_sli_hba_setup_error;
2375
ed957684
JS		 2376 return rc;
2377
92d7f7b0 2378lpfc_sli_hba_setup_error:
2e0fef85 2379 phba->link_state = LPFC_HBA_ERROR;
ed957684 2380 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2381 "0445 Firmware initialization failed\n");
dea3101e
JB		 2382 return rc;
2383}
2384
dea3101e
JB		 2385/*! lpfc_mbox_timeout
2386 *
2387 * \pre
2388 * \post
2389 * \param hba Pointer to per struct lpfc_hba structure
2390 * \param l1 Pointer to the driver's mailbox queue.
2391 * \return
2392 * void
2393 *
2394 * \b Description:
2395 *
2396 * This routine handles mailbox timeout events at timer interrupt context.
2397 */
2398void
2399lpfc_mbox_timeout(unsigned long ptr)
2400{
92d7f7b0 2401 struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
dea3101e 2402 unsigned long iflag;
2e0fef85 2403 uint32_t tmo_posted;
dea3101e 2404
2e0fef85 2405 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
92d7f7b0 2406 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
2e0fef85
JS		 2407 if (!tmo_posted)
2408 phba->pport->work_port_events |= WORKER_MBOX_TMO;
2409 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
2410
2411 if (!tmo_posted) {
92d7f7b0 2412 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 2413 if (phba->work_wait)
92d7f7b0
JS		 2414 lpfc_worker_wake_up(phba);
2415 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 2416 }
dea3101e
JB		 2417}
2418
2419void
2420lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
2421{
2e0fef85
JS		 2422 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
2423 MAILBOX_t *mb = &pmbox->mb;
1dcb58e5
JS		 2424 struct lpfc_sli *psli = &phba->sli;
2425 struct lpfc_sli_ring *pring;
dea3101e 2426
2e0fef85 2427 if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
dea3101e
JB		 2428 return;
2429 }
2430
dea3101e 2431 /* Mbox cmd <mbxCommand> timeout */
ed957684 2432 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2433 "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
92d7f7b0
JS		 2434 mb->mbxCommand,
2435 phba->pport->port_state,
2436 phba->sli.sli_flag,
2437 phba->sli.mbox_active);
dea3101e 2438
1dcb58e5
JS		 2439 /* Setting state unknown so lpfc_sli_abort_iocb_ring
2440 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
2441 * it to fail all oustanding SCSI IO.
2442 */
2e0fef85
JS		 2443 spin_lock_irq(&phba->pport->work_port_lock);
2444 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
2445 spin_unlock_irq(&phba->pport->work_port_lock);
2446 spin_lock_irq(&phba->hbalock);
2447 phba->link_state = LPFC_LINK_UNKNOWN;
2448 phba->pport->fc_flag |= FC_ESTABLISH_LINK;
1dcb58e5 2449 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85 2450 spin_unlock_irq(&phba->hbalock);
1dcb58e5
JS		 2451
2452 pring = &psli->ring[psli->fcp_ring];
2453 lpfc_sli_abort_iocb_ring(phba, pring);
2454
2455 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2456 "0316 Resetting board due to mailbox timeout\n");
1dcb58e5
JS		 2457 /*
2458 * lpfc_offline calls lpfc_sli_hba_down which will clean up
2459 * on oustanding mailbox commands.
2460 */
2461 lpfc_offline_prep(phba);
2462 lpfc_offline(phba);
2463 lpfc_sli_brdrestart(phba);
2464 if (lpfc_online(phba) == 0) /* Initialize the HBA */
2465 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
2466 lpfc_unblock_mgmt_io(phba);
dea3101e
JB		 2467 return;
2468}
2469
2470int
2e0fef85 2471lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
dea3101e 2472{
dea3101e 2473 MAILBOX_t *mb;
2e0fef85 2474 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB		 2475 uint32_t status, evtctr;
2476 uint32_t ha_copy;
2477 int i;
2478 unsigned long drvr_flag = 0;
2479 volatile uint32_t word0, ldata;
2480 void __iomem *to_slim;
2481
ed957684 2482 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 2483 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684
JS		 2484 if(!pmbox->vport) {
2485 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2486 LOG_MBOX | LOG_VPORT,
e8b62011 2487 "1806 Mbox x%x failed. No vport\n",
ed957684
JS		 2488 pmbox->mb.mbxCommand);
2489 dump_stack();
2490 return MBXERR_ERROR;
2491 }
2492 }
2493
92d7f7b0 2494
8d63f375
LV		 2495 /* If the PCI channel is in offline state, do not post mbox. */
2496 if (unlikely(pci_channel_offline(phba->pcidev)))
2497 return MBX_NOT_FINISHED;
2498
2e0fef85 2499 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e 2500 psli = &phba->sli;
92d7f7b0
JS		 2501
2502
dea3101e
JB		 2503 mb = &pmbox->mb;
2504 status = MBX_SUCCESS;
2505
2e0fef85
JS		 2506 if (phba->link_state == LPFC_HBA_ERROR) {
2507 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW		 2508
2509 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2510 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
2e0fef85 2511 return MBX_NOT_FINISHED;
41415862
JW		 2512 }
2513
9290831f
JS		 2514 if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
2515 !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
2e0fef85 2516 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
92d7f7b0 2517 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
2e0fef85 2518 return MBX_NOT_FINISHED;
9290831f
JS		 2519 }
2520
dea3101e
JB		 2521 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
2522 /* Polling for a mbox command when another one is already active
2523 * is not allowed in SLI. Also, the driver must have established
2524 * SLI2 mode to queue and process multiple mbox commands.
2525 */
2526
2527 if (flag & MBX_POLL) {
2e0fef85 2528 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB		 2529
2530 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2531 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2532 return MBX_NOT_FINISHED;
dea3101e
JB		 2533 }
2534
2535 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
2e0fef85 2536 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2537 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2538 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2539 return MBX_NOT_FINISHED;
dea3101e
JB		 2540 }
2541
2542 /* Handle STOP IOCB processing flag. This is only meaningful
2543 * if we are not polling for mbox completion.
2544 */
2545 if (flag & MBX_STOP_IOCB) {
2546 flag &= ~MBX_STOP_IOCB;
2547 /* Now flag each ring */
2548 for (i = 0; i < psli->num_rings; i++) {
2549 /* If the ring is active, flag it */
2550 if (psli->ring[i].cmdringaddr) {
2551 psli->ring[i].flag |=
2552 LPFC_STOP_IOCB_MBX;
2553 }
2554 }
2555 }
2556
2557 /* Another mailbox command is still being processed, queue this
2558 * command to be processed later.
2559 */
2560 lpfc_mbox_put(phba, pmbox);
2561
2562 /* Mbox cmd issue - BUSY */
ed957684 2563 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2564 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 2565 "x%x x%x x%x x%x\n",
92d7f7b0
JS		 2566 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
2567 mb->mbxCommand, phba->pport->port_state,
2568 psli->sli_flag, flag);
dea3101e
JB		 2569
2570 psli->slistat.mbox_busy++;
2e0fef85 2571 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2572
858c9f6c
JS		 2573 if (pmbox->vport) {
2574 lpfc_debugfs_disc_trc(pmbox->vport,
2575 LPFC_DISC_TRC_MBOX_VPORT,
2576 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
2577 (uint32_t)mb->mbxCommand,
2578 mb->un.varWords[0], mb->un.varWords[1]);
2579 }
2580 else {
2581 lpfc_debugfs_disc_trc(phba->pport,
2582 LPFC_DISC_TRC_MBOX,
2583 "MBOX Bsy: cmd:x%x mb:x%x x%x",
2584 (uint32_t)mb->mbxCommand,
2585 mb->un.varWords[0], mb->un.varWords[1]);
2586 }
2587
2e0fef85 2588 return MBX_BUSY;
dea3101e
JB		 2589 }
2590
2591 /* Handle STOP IOCB processing flag. This is only meaningful
2592 * if we are not polling for mbox completion.
2593 */
2594 if (flag & MBX_STOP_IOCB) {
2595 flag &= ~MBX_STOP_IOCB;
2596 if (flag == MBX_NOWAIT) {
2597 /* Now flag each ring */
2598 for (i = 0; i < psli->num_rings; i++) {
2599 /* If the ring is active, flag it */
2600 if (psli->ring[i].cmdringaddr) {
2601 psli->ring[i].flag |=
2602 LPFC_STOP_IOCB_MBX;
2603 }
2604 }
2605 }
2606 }
2607
2608 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2609
2610 /* If we are not polling, we MUST be in SLI2 mode */
2611 if (flag != MBX_POLL) {
41415862
JW		 2612 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
2613 (mb->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 2614 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2615 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2616 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2617 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2618 return MBX_NOT_FINISHED;
dea3101e
JB		 2619 }
2620 /* timeout active mbox command */
a309a6b6
JS		 2621 mod_timer(&psli->mbox_tmo, (jiffies +
2622 (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
dea3101e
JB		 2623 }
2624
2625 /* Mailbox cmd <cmd> issue */
ed957684 2626 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2627 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 2628 "x%x\n",
e8b62011 2629 pmbox->vport ? pmbox->vport->vpi : 0,
92d7f7b0
JS		 2630 mb->mbxCommand, phba->pport->port_state,
2631 psli->sli_flag, flag);
dea3101e 2632
858c9f6c
JS		 2633 if (mb->mbxCommand != MBX_HEARTBEAT) {
2634 if (pmbox->vport) {
2635 lpfc_debugfs_disc_trc(pmbox->vport,
2636 LPFC_DISC_TRC_MBOX_VPORT,
2637 "MBOX Send vport: cmd:x%x mb:x%x x%x",
2638 (uint32_t)mb->mbxCommand,
2639 mb->un.varWords[0], mb->un.varWords[1]);
2640 }
2641 else {
2642 lpfc_debugfs_disc_trc(phba->pport,
2643 LPFC_DISC_TRC_MBOX,
2644 "MBOX Send: cmd:x%x mb:x%x x%x",
2645 (uint32_t)mb->mbxCommand,
2646 mb->un.varWords[0], mb->un.varWords[1]);
2647 }
2648 }
2649
dea3101e
JB		 2650 psli->slistat.mbox_cmd++;
2651 evtctr = psli->slistat.mbox_event;
2652
2653 /* next set own bit for the adapter and copy over command word */
2654 mb->mbxOwner = OWN_CHIP;
2655
2656 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2657 /* First copy command data to host SLIM area */
4cc2da1d 2658 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
dea3101e 2659 } else {
9290831f 2660 if (mb->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 2661 /* copy command data into host mbox for cmpl */
4cc2da1d 2662 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
92d7f7b0 2663 MAILBOX_CMD_SIZE);
dea3101e
JB		 2664 }
2665
2666 /* First copy mbox command data to HBA SLIM, skip past first
2667 word */
2668 to_slim = phba->MBslimaddr + sizeof (uint32_t);
2669 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
2670 MAILBOX_CMD_SIZE - sizeof (uint32_t));
2671
2672 /* Next copy over first word, with mbxOwner set */
2673 ldata = *((volatile uint32_t *)mb);
2674 to_slim = phba->MBslimaddr;
2675 writel(ldata, to_slim);
2676 readl(to_slim); /* flush */
2677
2678 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2679 /* switch over to host mailbox */
2680 psli->sli_flag |= LPFC_SLI2_ACTIVE;
2681 }
2682 }
2683
2684 wmb();
2685 /* interrupt board to doit right away */
2686 writel(CA_MBATT, phba->CAregaddr);
2687 readl(phba->CAregaddr); /* flush */
2688
2689 switch (flag) {
2690 case MBX_NOWAIT:
2691 /* Don't wait for it to finish, just return */
2692 psli->mbox_active = pmbox;
2693 break;
2694
2695 case MBX_POLL:
dea3101e
JB		 2696 psli->mbox_active = NULL;
2697 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2698 /* First read mbox status word */
4cc2da1d 2699 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
dea3101e
JB		 2700 word0 = le32_to_cpu(word0);
2701 } else {
2702 /* First read mbox status word */
2703 word0 = readl(phba->MBslimaddr);
2704 }
2705
2706 /* Read the HBA Host Attention Register */
2707 ha_copy = readl(phba->HAregaddr);
2708
a309a6b6
JS		 2709 i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
2710 i *= 1000; /* Convert to ms */
2711
dea3101e 2712 /* Wait for command to complete */
41415862
JW		 2713 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
2714 (!(ha_copy & HA_MBATT) &&
2e0fef85 2715 (phba->link_state > LPFC_WARM_START))) {
a309a6b6 2716 if (i-- <= 0) {
dea3101e 2717 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2718 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 2719 drvr_flag);
2e0fef85 2720 return MBX_NOT_FINISHED;
dea3101e
JB		 2721 }
2722
2723 /* Check if we took a mbox interrupt while we were
2724 polling */
2725 if (((word0 & OWN_CHIP) != OWN_CHIP)
2726 && (evtctr != psli->slistat.mbox_event))
2727 break;
2728
2e0fef85 2729 spin_unlock_irqrestore(&phba->hbalock,
dea3101e
JB		 2730 drvr_flag);
2731
1dcb58e5 2732 msleep(1);
dea3101e 2733
2e0fef85 2734 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e
JB		 2735
2736 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2737 /* First copy command data */
4cc2da1d
JSEC		 2738 word0 = *((volatile uint32_t *)
2739 &phba->slim2p->mbx);
dea3101e
JB		 2740 word0 = le32_to_cpu(word0);
2741 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2742 MAILBOX_t *slimmb;
2743 volatile uint32_t slimword0;
2744 /* Check real SLIM for any errors */
2745 slimword0 = readl(phba->MBslimaddr);
2746 slimmb = (MAILBOX_t *) & slimword0;
2747 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
2748 && slimmb->mbxStatus) {
2749 psli->sli_flag &=
2750 ~LPFC_SLI2_ACTIVE;
2751 word0 = slimword0;
2752 }
2753 }
2754 } else {
2755 /* First copy command data */
2756 word0 = readl(phba->MBslimaddr);
2757 }
2758 /* Read the HBA Host Attention Register */
2759 ha_copy = readl(phba->HAregaddr);
2760 }
2761
2762 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2763 /* copy results back to user */
4cc2da1d 2764 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
92d7f7b0 2765 MAILBOX_CMD_SIZE);
dea3101e
JB		 2766 } else {
2767 /* First copy command data */
2768 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
2769 MAILBOX_CMD_SIZE);
2770 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
2771 pmbox->context2) {
92d7f7b0 2772 lpfc_memcpy_from_slim((void *)pmbox->context2,
dea3101e
JB		 2773 phba->MBslimaddr + DMP_RSP_OFFSET,
2774 mb->un.varDmp.word_cnt);
2775 }
2776 }
2777
2778 writel(HA_MBATT, phba->HAregaddr);
2779 readl(phba->HAregaddr); /* flush */
2780
2781 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2782 status = mb->mbxStatus;
2783 }
2784
2e0fef85
JS		 2785 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
2786 return status;
dea3101e
JB		 2787}
2788
92d7f7b0
JS		 2789/*
2790 * Caller needs to hold lock.
2791 */
858c9f6c 2792static void
92d7f7b0 2793__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2794 struct lpfc_iocbq *piocb)
dea3101e
JB		 2795{
2796 /* Insert the caller's iocb in the txq tail for later processing. */
2797 list_add_tail(&piocb->list, &pring->txq);
2798 pring->txq_cnt++;
dea3101e
JB		 2799}
2800
2801static struct lpfc_iocbq *
2802lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2803 struct lpfc_iocbq **piocb)
dea3101e
JB		 2804{
2805 struct lpfc_iocbq * nextiocb;
2806
2807 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2808 if (!nextiocb) {
2809 nextiocb = *piocb;
2810 *piocb = NULL;
2811 }
2812
2813 return nextiocb;
2814}
2815
92d7f7b0
JS		 2816/*
2817 * Lockless version of lpfc_sli_issue_iocb.
2818 */
dea3101e 2819int
92d7f7b0 2820__lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB		 2821 struct lpfc_iocbq *piocb, uint32_t flag)
2822{
2823 struct lpfc_iocbq *nextiocb;
2824 IOCB_t *iocb;
2825
92d7f7b0
JS		 2826 if (piocb->iocb_cmpl && (!piocb->vport) &&
2827 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2828 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
2829 lpfc_printf_log(phba, KERN_ERR,
2830 LOG_SLI | LOG_VPORT,
e8b62011 2831 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS		 2832 piocb->iocb.ulpCommand);
2833 dump_stack();
2834 return IOCB_ERROR;
2835 }
2836
2837
8d63f375
LV		 2838 /* If the PCI channel is in offline state, do not post iocbs. */
2839 if (unlikely(pci_channel_offline(phba->pcidev)))
2840 return IOCB_ERROR;
2841
dea3101e
JB		 2842 /*
2843 * We should never get an IOCB if we are in a < LINK_DOWN state
2844 */
2e0fef85 2845 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB		 2846 return IOCB_ERROR;
2847
2848 /*
2849 * Check to see if we are blocking IOCB processing because of a
2850 * outstanding mbox command.
2851 */
2852 if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
2853 goto iocb_busy;
2854
2e0fef85 2855 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 2856 /*
2680eeaa 2857 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB		 2858 * can be issued if the link is not up.
2859 */
2860 switch (piocb->iocb.ulpCommand) {
2861 case CMD_QUE_RING_BUF_CN:
2862 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB		 2863 /*
2864 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
2865 * completion, iocb_cmpl MUST be 0.
2866 */
2867 if (piocb->iocb_cmpl)
2868 piocb->iocb_cmpl = NULL;
2869 /*FALLTHROUGH*/
2870 case CMD_CREATE_XRI_CR:
2680eeaa
JS		 2871 case CMD_CLOSE_XRI_CN:
2872 case CMD_CLOSE_XRI_CX:
dea3101e
JB		 2873 break;
2874 default:
2875 goto iocb_busy;
2876 }
2877
2878 /*
2879 * For FCP commands, we must be in a state where we can process link
2880 * attention events.
2881 */
2882 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
92d7f7b0 2883 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 2884 goto iocb_busy;
92d7f7b0 2885 }
dea3101e 2886
dea3101e
JB		 2887 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
2888 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
2889 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
2890
2891 if (iocb)
2892 lpfc_sli_update_ring(phba, pring);
2893 else
2894 lpfc_sli_update_full_ring(phba, pring);
2895
2896 if (!piocb)
2897 return IOCB_SUCCESS;
2898
2899 goto out_busy;
2900
2901 iocb_busy:
2902 pring->stats.iocb_cmd_delay++;
2903
2904 out_busy:
2905
2906 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 2907 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB		 2908 return IOCB_SUCCESS;
2909 }
2910
2911 return IOCB_BUSY;
2912}
2913
92d7f7b0
JS		 2914
2915int
2916lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2917 struct lpfc_iocbq *piocb, uint32_t flag)
2918{
2919 unsigned long iflags;
2920 int rc;
2921
2922 spin_lock_irqsave(&phba->hbalock, iflags);
2923 rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
2924 spin_unlock_irqrestore(&phba->hbalock, iflags);
2925
2926 return rc;
2927}
2928
cf5bf97e
JW		 2929static int
2930lpfc_extra_ring_setup( struct lpfc_hba *phba)
2931{
2932 struct lpfc_sli *psli;
2933 struct lpfc_sli_ring *pring;
2934
2935 psli = &phba->sli;
2936
2937 /* Adjust cmd/rsp ring iocb entries more evenly */
a4bc3379
JS		 2938
2939 /* Take some away from the FCP ring */
cf5bf97e
JW		 2940 pring = &psli->ring[psli->fcp_ring];
2941 pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2942 pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2943 pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2944 pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2945
a4bc3379
JS		 2946 /* and give them to the extra ring */
2947 pring = &psli->ring[psli->extra_ring];
2948
cf5bf97e
JW		 2949 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2950 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2951 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2952 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2953
2954 /* Setup default profile for this ring */
2955 pring->iotag_max = 4096;
2956 pring->num_mask = 1;
2957 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS		 2958 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
2959 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW		 2960 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
2961 return 0;
2962}
2963
dea3101e
JB		 2964int
2965lpfc_sli_setup(struct lpfc_hba *phba)
2966{
ed957684 2967 int i, totiocbsize = 0;
dea3101e
JB		 2968 struct lpfc_sli *psli = &phba->sli;
2969 struct lpfc_sli_ring *pring;
2970
2971 psli->num_rings = MAX_CONFIGURED_RINGS;
2972 psli->sli_flag = 0;
2973 psli->fcp_ring = LPFC_FCP_RING;
2974 psli->next_ring = LPFC_FCP_NEXT_RING;
a4bc3379 2975 psli->extra_ring = LPFC_EXTRA_RING;
dea3101e 2976
604a3e30
JB		 2977 psli->iocbq_lookup = NULL;
2978 psli->iocbq_lookup_len = 0;
2979 psli->last_iotag = 0;
2980
dea3101e
JB		 2981 for (i = 0; i < psli->num_rings; i++) {
2982 pring = &psli->ring[i];
2983 switch (i) {
2984 case LPFC_FCP_RING: /* ring 0 - FCP */
2985 /* numCiocb and numRiocb are used in config_port */
2986 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
2987 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
2988 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2989 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2990 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2991 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
ed957684 2992 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 2993 SLI3_IOCB_CMD_SIZE :
2994 SLI2_IOCB_CMD_SIZE;
ed957684 2995 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 2996 SLI3_IOCB_RSP_SIZE :
2997 SLI2_IOCB_RSP_SIZE;
dea3101e
JB		 2998 pring->iotag_ctr = 0;
2999 pring->iotag_max =
92d7f7b0 3000 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB		 3001 pring->fast_iotag = pring->iotag_max;
3002 pring->num_mask = 0;
3003 break;
a4bc3379 3004 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e
JB		 3005 /* numCiocb and numRiocb are used in config_port */
3006 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
3007 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
ed957684 3008 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3009 SLI3_IOCB_CMD_SIZE :
3010 SLI2_IOCB_CMD_SIZE;
ed957684 3011 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3012 SLI3_IOCB_RSP_SIZE :
3013 SLI2_IOCB_RSP_SIZE;
2e0fef85 3014 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB		 3015 pring->num_mask = 0;
3016 break;
3017 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
3018 /* numCiocb and numRiocb are used in config_port */
3019 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
3020 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
ed957684 3021 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3022 SLI3_IOCB_CMD_SIZE :
3023 SLI2_IOCB_CMD_SIZE;
ed957684 3024 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3025 SLI3_IOCB_RSP_SIZE :
3026 SLI2_IOCB_RSP_SIZE;
dea3101e
JB		 3027 pring->fast_iotag = 0;
3028 pring->iotag_ctr = 0;
3029 pring->iotag_max = 4096;
3030 pring->num_mask = 4;
3031 pring->prt[0].profile = 0; /* Mask 0 */
3032 pring->prt[0].rctl = FC_ELS_REQ;
3033 pring->prt[0].type = FC_ELS_DATA;
3034 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 3035 lpfc_els_unsol_event;
dea3101e
JB		 3036 pring->prt[1].profile = 0; /* Mask 1 */
3037 pring->prt[1].rctl = FC_ELS_RSP;
3038 pring->prt[1].type = FC_ELS_DATA;
3039 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 3040 lpfc_els_unsol_event;
dea3101e
JB		 3041 pring->prt[2].profile = 0; /* Mask 2 */
3042 /* NameServer Inquiry */
3043 pring->prt[2].rctl = FC_UNSOL_CTL;
3044 /* NameServer */
3045 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
3046 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 3047 lpfc_ct_unsol_event;
dea3101e
JB		 3048 pring->prt[3].profile = 0; /* Mask 3 */
3049 /* NameServer response */
3050 pring->prt[3].rctl = FC_SOL_CTL;
3051 /* NameServer */
3052 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
3053 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 3054 lpfc_ct_unsol_event;
dea3101e
JB		 3055 break;
3056 }
ed957684 3057 totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
92d7f7b0 3058 (pring->numRiocb * pring->sizeRiocb);
dea3101e 3059 }
ed957684 3060 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 3061 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS		 3062 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
3063 "SLI2 SLIM Data: x%x x%lx\n",
3064 phba->brd_no, totiocbsize,
3065 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 3066 }
cf5bf97e
JW		 3067 if (phba->cfg_multi_ring_support == 2)
3068 lpfc_extra_ring_setup(phba);
dea3101e
JB		 3069
3070 return 0;
3071}
3072
3073int
2e0fef85 3074lpfc_sli_queue_setup(struct lpfc_hba *phba)
dea3101e
JB		 3075{
3076 struct lpfc_sli *psli;
3077 struct lpfc_sli_ring *pring;
604a3e30 3078 int i;
dea3101e
JB		 3079
3080 psli = &phba->sli;
2e0fef85 3081 spin_lock_irq(&phba->hbalock);
dea3101e 3082 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 3083 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB		 3084 /* Initialize list headers for txq and txcmplq as double linked lists */
3085 for (i = 0; i < psli->num_rings; i++) {
3086 pring = &psli->ring[i];
3087 pring->ringno = i;
3088 pring->next_cmdidx = 0;
3089 pring->local_getidx = 0;
3090 pring->cmdidx = 0;
3091 INIT_LIST_HEAD(&pring->txq);
3092 INIT_LIST_HEAD(&pring->txcmplq);
3093 INIT_LIST_HEAD(&pring->iocb_continueq);
3094 INIT_LIST_HEAD(&pring->postbufq);
dea3101e 3095 }
2e0fef85
JS		 3096 spin_unlock_irq(&phba->hbalock);
3097 return 1;
dea3101e
JB		 3098}
3099
92d7f7b0
JS		 3100int
3101lpfc_sli_host_down(struct lpfc_vport *vport)
3102{
858c9f6c 3103 LIST_HEAD(completions);
92d7f7b0
JS		 3104 struct lpfc_hba *phba = vport->phba;
3105 struct lpfc_sli *psli = &phba->sli;
3106 struct lpfc_sli_ring *pring;
3107 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS		 3108 int i;
3109 unsigned long flags = 0;
3110 uint16_t prev_pring_flag;
3111
3112 lpfc_cleanup_discovery_resources(vport);
3113
3114 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0
JS		 3115 for (i = 0; i < psli->num_rings; i++) {
3116 pring = &psli->ring[i];
3117 prev_pring_flag = pring->flag;
858c9f6c
JS		 3118 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3119 pring->flag |= LPFC_DEFERRED_RING_EVENT;
92d7f7b0
JS		 3120 /*
3121 * Error everything on the txq since these iocbs have not been
3122 * given to the FW yet.
3123 */
92d7f7b0
JS		 3124 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
3125 if (iocb->vport != vport)
3126 continue;
858c9f6c 3127 list_move_tail(&iocb->list, &completions);
92d7f7b0 3128 pring->txq_cnt--;
92d7f7b0
JS		 3129 }
3130
3131 /* Next issue ABTS for everything on the txcmplq */
3132 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
3133 list) {
3134 if (iocb->vport != vport)
3135 continue;
3136 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3137 }
3138
3139 pring->flag = prev_pring_flag;
3140 }
3141
3142 spin_unlock_irqrestore(&phba->hbalock, flags);
3143
858c9f6c
JS		 3144 while (!list_empty(&completions)) {
3145 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
3146
3147 if (!iocb->iocb_cmpl)
3148 lpfc_sli_release_iocbq(phba, iocb);
3149 else {
3150 iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3151 iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
3152 (iocb->iocb_cmpl) (phba, iocb, iocb);
3153 }
3154 }
92d7f7b0
JS		 3155 return 1;
3156}
3157
dea3101e 3158int
2e0fef85 3159lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 3160{
2534ba75 3161 LIST_HEAD(completions);
2e0fef85 3162 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB		 3163 struct lpfc_sli_ring *pring;
3164 LPFC_MBOXQ_t *pmb;
2534ba75
JS		 3165 struct lpfc_iocbq *iocb;
3166 IOCB_t *cmd = NULL;
dea3101e
JB		 3167 int i;
3168 unsigned long flags = 0;
3169
dea3101e
JB		 3170 lpfc_hba_down_prep(phba);
3171
92d7f7b0
JS		 3172 lpfc_fabric_abort_hba(phba);
3173
2e0fef85 3174 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e
JB		 3175 for (i = 0; i < psli->num_rings; i++) {
3176 pring = &psli->ring[i];
858c9f6c
JS		 3177 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3178 pring->flag |= LPFC_DEFERRED_RING_EVENT;
dea3101e
JB		 3179
3180 /*
3181 * Error everything on the txq since these iocbs have not been
3182 * given to the FW yet.
3183 */
2534ba75 3184 list_splice_init(&pring->txq, &completions);
dea3101e
JB		 3185 pring->txq_cnt = 0;
3186
2534ba75 3187 }
2e0fef85 3188 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 3189
2534ba75 3190 while (!list_empty(&completions)) {
92d7f7b0 3191 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
2534ba75 3192 cmd = &iocb->iocb;
dea3101e 3193
2e0fef85
JS		 3194 if (!iocb->iocb_cmpl)
3195 lpfc_sli_release_iocbq(phba, iocb);
3196 else {
2534ba75
JS		 3197 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
3198 cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
3199 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 3200 }
dea3101e
JB		 3201 }
3202
dea3101e
JB		 3203 /* Return any active mbox cmds */
3204 del_timer_sync(&psli->mbox_tmo);
92d7f7b0 3205 spin_lock_irqsave(&phba->hbalock, flags);
2e0fef85 3206
92d7f7b0 3207 spin_lock(&phba->pport->work_port_lock);
2e0fef85 3208 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
92d7f7b0 3209 spin_unlock(&phba->pport->work_port_lock);
2e0fef85 3210
92d7f7b0
JS		 3211 if (psli->mbox_active) {
3212 list_add_tail(&psli->mbox_active->list, &completions);
2e0fef85 3213 psli->mbox_active = NULL;
2e0fef85 3214 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
dea3101e 3215 }
dea3101e 3216
92d7f7b0
JS		 3217 /* Return any pending or completed mbox cmds */
3218 list_splice_init(&phba->sli.mboxq, &completions);
3219 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
3220 INIT_LIST_HEAD(&psli->mboxq);
3221 INIT_LIST_HEAD(&psli->mboxq_cmpl);
3222
3223 spin_unlock_irqrestore(&phba->hbalock, flags);
3224
3225 while (!list_empty(&completions)) {
3226 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
dea3101e
JB		 3227 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
3228 if (pmb->mbox_cmpl) {
dea3101e 3229 pmb->mbox_cmpl(phba,pmb);
dea3101e
JB		 3230 }
3231 }
dea3101e
JB		 3232 return 1;
3233}
3234
3235void
3236lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
3237{
3238 uint32_t *src = srcp;
3239 uint32_t *dest = destp;
3240 uint32_t ldata;
3241 int i;
3242
3243 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
3244 ldata = *src;
3245 ldata = le32_to_cpu(ldata);
3246 *dest = ldata;
3247 src++;
3248 dest++;
3249 }
3250}
3251
3252int
2e0fef85
JS		 3253lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3254 struct lpfc_dmabuf *mp)
dea3101e
JB		 3255{
3256 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
3257 later */
2e0fef85 3258 spin_lock_irq(&phba->hbalock);
dea3101e 3259 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 3260 pring->postbufq_cnt++;
2e0fef85 3261 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 3262 return 0;
3263}
3264
3265
3266struct lpfc_dmabuf *
3267lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3268 dma_addr_t phys)
3269{
3270 struct lpfc_dmabuf *mp, *next_mp;
3271 struct list_head *slp = &pring->postbufq;
3272
3273 /* Search postbufq, from the begining, looking for a match on phys */
2e0fef85 3274 spin_lock_irq(&phba->hbalock);
dea3101e
JB		 3275 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
3276 if (mp->phys == phys) {
3277 list_del_init(&mp->list);
3278 pring->postbufq_cnt--;
2e0fef85 3279 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 3280 return mp;
3281 }
3282 }
3283
2e0fef85 3284 spin_unlock_irq(&phba->hbalock);
dea3101e 3285 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 3286 "0410 Cannot find virtual addr for mapped buf on "
dea3101e 3287 "ring %d Data x%llx x%p x%p x%x\n",
e8b62011 3288 pring->ringno, (unsigned long long)phys,
dea3101e
JB		 3289 slp->next, slp->prev, pring->postbufq_cnt);
3290 return NULL;
3291}
3292
3293static void
2e0fef85
JS		 3294lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3295 struct lpfc_iocbq *rspiocb)
dea3101e 3296{
2e0fef85 3297 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 3298 uint16_t abort_iotag, abort_context;
92d7f7b0 3299 struct lpfc_iocbq *abort_iocb;
2680eeaa
JS		 3300 struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
3301
3302 abort_iocb = NULL;
2680eeaa
JS		 3303
3304 if (irsp->ulpStatus) {
3305 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
3306 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
3307
2e0fef85 3308 spin_lock_irq(&phba->hbalock);
2680eeaa
JS		 3309 if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
3310 abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
3311
92d7f7b0 3312 lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
e8b62011 3313 "0327 Cannot abort els iocb %p "
92d7f7b0
JS		 3314 "with tag %x context %x, abort status %x, "
3315 "abort code %x\n",
e8b62011
JS		 3316 abort_iocb, abort_iotag, abort_context,
3317 irsp->ulpStatus, irsp->un.ulpWord[4]);
2680eeaa
JS		 3318
3319 /*
3320 * make sure we have the right iocbq before taking it
3321 * off the txcmplq and try to call completion routine.
3322 */
2e0fef85
JS		 3323 if (!abort_iocb ||
3324 abort_iocb->iocb.ulpContext != abort_context ||
3325 (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
3326 spin_unlock_irq(&phba->hbalock);
3327 else {
92d7f7b0 3328 list_del_init(&abort_iocb->list);
2680eeaa 3329 pring->txcmplq_cnt--;
2e0fef85 3330 spin_unlock_irq(&phba->hbalock);
2680eeaa 3331
92d7f7b0
JS		 3332 abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3333 abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3334 abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
3335 (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
2680eeaa
JS		 3336 }
3337 }
3338
604a3e30 3339 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB		 3340 return;
3341}
3342
92d7f7b0
JS		 3343static void
3344lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3345 struct lpfc_iocbq *rspiocb)
3346{
3347 IOCB_t *irsp = &rspiocb->iocb;
3348
3349 /* ELS cmd tag <ulpIoTag> completes */
3350 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
e8b62011 3351 "0133 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 3352 "x%x x%x x%x\n",
e8b62011 3353 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 3354 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS		 3355 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
3356 lpfc_ct_free_iocb(phba, cmdiocb);
3357 else
3358 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS		 3359 return;
3360}
3361
dea3101e 3362int
2e0fef85
JS		 3363lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3364 struct lpfc_iocbq *cmdiocb)
dea3101e 3365{
2e0fef85 3366 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 3367 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB		 3368 IOCB_t *icmd = NULL;
3369 IOCB_t *iabt = NULL;
07951076
JS		 3370 int retval = IOCB_ERROR;
3371
92d7f7b0
JS		 3372 /*
3373 * There are certain command types we don't want to abort. And we
3374 * don't want to abort commands that are already in the process of
3375 * being aborted.
07951076
JS		 3376 */
3377 icmd = &cmdiocb->iocb;
2e0fef85 3378 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS		 3379 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
3380 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS		 3381 return 0;
3382
858c9f6c
JS		 3383 /* If we're unloading, don't abort iocb on the ELS ring, but change the
3384 * callback so that nothing happens when it finishes.
07951076 3385 */
858c9f6c
JS		 3386 if ((vport->load_flag & FC_UNLOADING) &&
3387 (pring->ringno == LPFC_ELS_RING)) {
92d7f7b0
JS		 3388 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
3389 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
3390 else
3391 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
07951076 3392 goto abort_iotag_exit;
92d7f7b0 3393 }
dea3101e
JB		 3394
3395 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 3396 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB		 3397 if (abtsiocbp == NULL)
3398 return 0;
dea3101e 3399
07951076
JS		 3400 /* This signals the response to set the correct status
3401 * before calling the completion handler.
3402 */
3403 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
3404
dea3101e 3405 iabt = &abtsiocbp->iocb;
07951076
JS		 3406 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
3407 iabt->un.acxri.abortContextTag = icmd->ulpContext;
3408 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
3409 iabt->ulpLe = 1;
3410 iabt->ulpClass = icmd->ulpClass;
dea3101e 3411
2e0fef85 3412 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS		 3413 iabt->ulpCommand = CMD_ABORT_XRI_CN;
3414 else
3415 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 3416
07951076 3417 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
5b8bd0c9 3418
e8b62011
JS		 3419 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
3420 "0339 Abort xri x%x, original iotag x%x, "
3421 "abort cmd iotag x%x\n",
3422 iabt->un.acxri.abortContextTag,
3423 iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
92d7f7b0 3424 retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
dea3101e 3425
07951076 3426abort_iotag_exit:
2e0fef85
JS		 3427 /*
3428 * Caller to this routine should check for IOCB_ERROR
3429 * and handle it properly. This routine no longer removes
3430 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 3431 */
2e0fef85 3432 return retval;
dea3101e
JB		 3433}
3434
3435static int
0bd4ca25
JSEC		 3436lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id,
3437 uint64_t lun_id, uint32_t ctx,
3438 lpfc_ctx_cmd ctx_cmd)
dea3101e 3439{
0bd4ca25
JSEC		 3440 struct lpfc_scsi_buf *lpfc_cmd;
3441 struct scsi_cmnd *cmnd;
dea3101e
JB		 3442 int rc = 1;
3443
0bd4ca25
JSEC		 3444 if (!(iocbq->iocb_flag & LPFC_IO_FCP))
3445 return rc;
3446
3447 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
3448 cmnd = lpfc_cmd->pCmd;
3449
3450 if (cmnd == NULL)
dea3101e
JB		 3451 return rc;
3452
3453 switch (ctx_cmd) {
3454 case LPFC_CTX_LUN:
0bd4ca25
JSEC		 3455 if ((cmnd->device->id == tgt_id) &&
3456 (cmnd->device->lun == lun_id))
dea3101e
JB		 3457 rc = 0;
3458 break;
3459 case LPFC_CTX_TGT:
0bd4ca25 3460 if (cmnd->device->id == tgt_id)
dea3101e
JB		 3461 rc = 0;
3462 break;
3463 case LPFC_CTX_CTX:
0bd4ca25 3464 if (iocbq->iocb.ulpContext == ctx)
dea3101e 3465 rc = 0;
0bd4ca25 3466 break;
dea3101e
JB		 3467 case LPFC_CTX_HOST:
3468 rc = 0;
3469 break;
3470 default:
3471 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
3472 __FUNCTION__, ctx_cmd);
3473 break;
3474 }
3475
3476 return rc;
3477}
3478
3479int
3480lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 3481 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
dea3101e 3482{
0bd4ca25
JSEC		 3483 struct lpfc_iocbq *iocbq;
3484 int sum, i;
dea3101e 3485
0bd4ca25
JSEC		 3486 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
3487 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3488
0bd4ca25
JSEC		 3489 if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
3490 0, ctx_cmd) == 0)
3491 sum++;
dea3101e 3492 }
0bd4ca25 3493
dea3101e
JB		 3494 return sum;
3495}
3496
5eb95af0 3497void
2e0fef85
JS		 3498lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3499 struct lpfc_iocbq *rspiocb)
5eb95af0 3500{
604a3e30 3501 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC		 3502 return;
3503}
3504
dea3101e
JB		 3505int
3506lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3507 uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
3508 lpfc_ctx_cmd abort_cmd)
3509{
0bd4ca25
JSEC		 3510 struct lpfc_iocbq *iocbq;
3511 struct lpfc_iocbq *abtsiocb;
dea3101e 3512 IOCB_t *cmd = NULL;
dea3101e 3513 int errcnt = 0, ret_val = 0;
0bd4ca25 3514 int i;
dea3101e 3515
0bd4ca25
JSEC		 3516 for (i = 1; i <= phba->sli.last_iotag; i++) {
3517 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3518
2e0fef85
JS		 3519 if (lpfc_sli_validate_fcp_iocb(iocbq, tgt_id, lun_id, 0,
3520 abort_cmd) != 0)
dea3101e
JB		 3521 continue;
3522
3523 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 3524 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB		 3525 if (abtsiocb == NULL) {
3526 errcnt++;
3527 continue;
3528 }
dea3101e 3529
0bd4ca25 3530 cmd = &iocbq->iocb;
dea3101e
JB		 3531 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
3532 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
3533 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
3534 abtsiocb->iocb.ulpLe = 1;
3535 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2e0fef85 3536 abtsiocb->vport = phba->pport;
dea3101e 3537
2e0fef85 3538 if (lpfc_is_link_up(phba))
dea3101e
JB		 3539 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
3540 else
3541 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
3542
5eb95af0
JSEC		 3543 /* Setup callback routine and issue the command. */
3544 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
dea3101e
JB		 3545 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
3546 if (ret_val == IOCB_ERROR) {
604a3e30 3547 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB		 3548 errcnt++;
3549 continue;
3550 }
3551 }
3552
3553 return errcnt;
3554}
3555
68876920
JSEC		 3556static void
3557lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
3558 struct lpfc_iocbq *cmdiocbq,
3559 struct lpfc_iocbq *rspiocbq)
dea3101e 3560{
68876920
JSEC		 3561 wait_queue_head_t *pdone_q;
3562 unsigned long iflags;
dea3101e 3563
2e0fef85 3564 spin_lock_irqsave(&phba->hbalock, iflags);
68876920
JSEC		 3565 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
3566 if (cmdiocbq->context2 && rspiocbq)
3567 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
3568 &rspiocbq->iocb, sizeof(IOCB_t));
3569
3570 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC		 3571 if (pdone_q)
3572 wake_up(pdone_q);
858c9f6c 3573 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB		 3574 return;
3575}
3576
68876920
JSEC		 3577/*
3578 * Issue the caller's iocb and wait for its completion, but no longer than the
3579 * caller's timeout. Note that iocb_flags is cleared before the
3580 * lpfc_sli_issue_call since the wake routine sets a unique value and by
3581 * definition this is a wait function.
3582 */
92d7f7b0 3583
dea3101e 3584int
2e0fef85
JS		 3585lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
3586 struct lpfc_sli_ring *pring,
3587 struct lpfc_iocbq *piocb,
3588 struct lpfc_iocbq *prspiocbq,
68876920 3589 uint32_t timeout)
dea3101e 3590{
7259f0d0 3591 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC		 3592 long timeleft, timeout_req = 0;
3593 int retval = IOCB_SUCCESS;
875fbdfe 3594 uint32_t creg_val;
dea3101e
JB		 3595
3596 /*
68876920
JSEC		 3597 * If the caller has provided a response iocbq buffer, then context2
3598 * is NULL or its an error.
dea3101e 3599 */
68876920
JSEC		 3600 if (prspiocbq) {
3601 if (piocb->context2)
3602 return IOCB_ERROR;
3603 piocb->context2 = prspiocbq;
dea3101e
JB		 3604 }
3605
68876920
JSEC		 3606 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
3607 piocb->context_un.wait_queue = &done_q;
3608 piocb->iocb_flag &= ~LPFC_IO_WAKE;
dea3101e 3609
875fbdfe
JSEC		 3610 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3611 creg_val = readl(phba->HCregaddr);
3612 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
3613 writel(creg_val, phba->HCregaddr);
3614 readl(phba->HCregaddr); /* flush */
3615 }
3616
68876920
JSEC		 3617 retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
3618 if (retval == IOCB_SUCCESS) {
3619 timeout_req = timeout * HZ;
68876920
JSEC		 3620 timeleft = wait_event_timeout(done_q,
3621 piocb->iocb_flag & LPFC_IO_WAKE,
3622 timeout_req);
dea3101e 3623
7054a606
JS		 3624 if (piocb->iocb_flag & LPFC_IO_WAKE) {
3625 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3626 "0331 IOCB wake signaled\n");
7054a606 3627 } else if (timeleft == 0) {
68876920 3628 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3629 "0338 IOCB wait timeout error - no "
3630 "wake response Data x%x\n", timeout);
68876920 3631 retval = IOCB_TIMEDOUT;
7054a606 3632 } else {
68876920 3633 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3634 "0330 IOCB wake NOT set, "
3635 "Data x%x x%lx\n",
68876920
JSEC		 3636 timeout, (timeleft / jiffies));
3637 retval = IOCB_TIMEDOUT;
dea3101e 3638 }
68876920
JSEC		 3639 } else {
3640 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 3641 ":0332 IOCB wait issue failed, Data x%x\n",
3642 retval);
68876920 3643 retval = IOCB_ERROR;
dea3101e
JB		 3644 }
3645
875fbdfe
JSEC		 3646 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3647 creg_val = readl(phba->HCregaddr);
3648 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
3649 writel(creg_val, phba->HCregaddr);
3650 readl(phba->HCregaddr); /* flush */
3651 }
3652
68876920
JSEC		 3653 if (prspiocbq)
3654 piocb->context2 = NULL;
3655
3656 piocb->context_un.wait_queue = NULL;
3657 piocb->iocb_cmpl = NULL;
dea3101e
JB		 3658 return retval;
3659}
68876920 3660
dea3101e 3661int
2e0fef85 3662lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB		 3663 uint32_t timeout)
3664{
7259f0d0 3665 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
dea3101e 3666 int retval;
858c9f6c 3667 unsigned long flag;
dea3101e
JB		 3668
3669 /* The caller must leave context1 empty. */
92d7f7b0 3670 if (pmboxq->context1 != 0)
2e0fef85 3671 return MBX_NOT_FINISHED;
dea3101e
JB		 3672
3673 /* setup wake call as IOCB callback */
3674 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
3675 /* setup context field to pass wait_queue pointer to wake function */
3676 pmboxq->context1 = &done_q;
3677
dea3101e
JB		 3678 /* now issue the command */
3679 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
3680
3681 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
7054a606
JS		 3682 wait_event_interruptible_timeout(done_q,
3683 pmboxq->mbox_flag & LPFC_MBX_WAKE,
3684 timeout * HZ);
3685
858c9f6c 3686 spin_lock_irqsave(&phba->hbalock, flag);
dea3101e 3687 pmboxq->context1 = NULL;
7054a606
JS		 3688 /*
3689 * if LPFC_MBX_WAKE flag is set the mailbox is completed
3690 * else do not free the resources.
3691 */
3692 if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
dea3101e 3693 retval = MBX_SUCCESS;
858c9f6c 3694 else {
7054a606 3695 retval = MBX_TIMEOUT;
858c9f6c
JS		 3696 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3697 }
3698 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e
JB		 3699 }
3700
dea3101e
JB		 3701 return retval;
3702}
3703
b4c02652
JS		 3704int
3705lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
3706{
2e0fef85 3707 struct lpfc_vport *vport = phba->pport;
b4c02652 3708 int i = 0;
ed957684 3709 uint32_t ha_copy;
b4c02652 3710
2e0fef85 3711 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
b4c02652
JS		 3712 if (i++ > LPFC_MBOX_TMO * 1000)
3713 return 1;
3714
ed957684
JS		 3715 /*
3716 * Call lpfc_sli_handle_mb_event only if a mailbox cmd
3717 * did finish. This way we won't get the misleading
3718 * "Stray Mailbox Interrupt" message.
3719 */
3720 spin_lock_irq(&phba->hbalock);
3721 ha_copy = phba->work_ha;
3722 phba->work_ha &= ~HA_MBATT;
3723 spin_unlock_irq(&phba->hbalock);
3724
3725 if (ha_copy & HA_MBATT)
3726 if (lpfc_sli_handle_mb_event(phba) == 0)
3727 i = 0;
b4c02652
JS		 3728
3729 msleep(1);
3730 }
3731
3732 return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
3733}
3734
dea3101e 3735irqreturn_t
7d12e780 3736lpfc_intr_handler(int irq, void *dev_id)
dea3101e 3737{
2e0fef85 3738 struct lpfc_hba *phba;
dea3101e
JB		 3739 uint32_t ha_copy;
3740 uint32_t work_ha_copy;
3741 unsigned long status;
3742 int i;
3743 uint32_t control;
3744
92d7f7b0 3745 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS		 3746 struct lpfc_vport *vport;
3747 struct lpfc_nodelist *ndlp;
3748 struct lpfc_dmabuf *mp;
92d7f7b0
JS		 3749 LPFC_MBOXQ_t *pmb;
3750 int rc;
3751
dea3101e
JB		 3752 /*
3753 * Get the driver's phba structure from the dev_id and
3754 * assume the HBA is not interrupting.
3755 */
3756 phba = (struct lpfc_hba *) dev_id;
3757
3758 if (unlikely(!phba))
3759 return IRQ_NONE;
3760
8d63f375
LV		 3761 /* If the pci channel is offline, ignore all the interrupts. */
3762 if (unlikely(pci_channel_offline(phba->pcidev)))
3763 return IRQ_NONE;
3764
dea3101e
JB		 3765 phba->sli.slistat.sli_intr++;
3766
3767 /*
3768 * Call the HBA to see if it is interrupting. If not, don't claim
3769 * the interrupt
3770 */
3771
3772 /* Ignore all interrupts during initialization. */
2e0fef85 3773 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB		 3774 return IRQ_NONE;
3775
3776 /*
3777 * Read host attention register to determine interrupt source
3778 * Clear Attention Sources, except Error Attention (to
3779 * preserve status) and Link Attention
3780 */
2e0fef85 3781 spin_lock(&phba->hbalock);
dea3101e 3782 ha_copy = readl(phba->HAregaddr);
ebdbe65f
JS		 3783 /* If somebody is waiting to handle an eratt don't process it
3784 * here. The brdkill function will do this.
3785 */
2e0fef85 3786 if (phba->link_flag & LS_IGNORE_ERATT)
ebdbe65f 3787 ha_copy &= ~HA_ERATT;
dea3101e
JB		 3788 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
3789 readl(phba->HAregaddr); /* flush */
2e0fef85 3790 spin_unlock(&phba->hbalock);
dea3101e
JB		 3791
3792 if (unlikely(!ha_copy))
3793 return IRQ_NONE;
3794
3795 work_ha_copy = ha_copy & phba->work_ha_mask;
3796
3797 if (unlikely(work_ha_copy)) {
3798 if (work_ha_copy & HA_LATT) {
3799 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
3800 /*
3801 * Turn off Link Attention interrupts
3802 * until CLEAR_LA done
3803 */
2e0fef85 3804 spin_lock(&phba->hbalock);
dea3101e
JB		 3805 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
3806 control = readl(phba->HCregaddr);
3807 control &= ~HC_LAINT_ENA;
3808 writel(control, phba->HCregaddr);
3809 readl(phba->HCregaddr); /* flush */
2e0fef85 3810 spin_unlock(&phba->hbalock);
dea3101e
JB		 3811 }
3812 else
3813 work_ha_copy &= ~HA_LATT;
3814 }
3815
3816 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
858c9f6c
JS		 3817 /*
3818 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
3819 * the only slow ring.
3820 */
3821 status = (work_ha_copy &
3822 (HA_RXMASK << (4*LPFC_ELS_RING)));
3823 status >>= (4*LPFC_ELS_RING);
3824 if (status & HA_RXMASK) {
3825 spin_lock(&phba->hbalock);
3826 control = readl(phba->HCregaddr);
a58cbd52
JS		 3827
3828 lpfc_debugfs_slow_ring_trc(phba,
3829 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
3830 control, status,
3831 (uint32_t)phba->sli.slistat.sli_intr);
3832
858c9f6c 3833 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS		 3834 lpfc_debugfs_slow_ring_trc(phba,
3835 "ISR Disable ring:"
3836 "pwork:x%x hawork:x%x wait:x%x",
3837 phba->work_ha, work_ha_copy,
3838 (uint32_t)((unsigned long)
3839 phba->work_wait));
3840
858c9f6c
JS		 3841 control &=
3842 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB		 3843 writel(control, phba->HCregaddr);
3844 readl(phba->HCregaddr); /* flush */
dea3101e 3845 }
a58cbd52
JS		 3846 else {
3847 lpfc_debugfs_slow_ring_trc(phba,
3848 "ISR slow ring: pwork:"
3849 "x%x hawork:x%x wait:x%x",
3850 phba->work_ha, work_ha_copy,
3851 (uint32_t)((unsigned long)
3852 phba->work_wait));
3853 }
858c9f6c 3854 spin_unlock(&phba->hbalock);
dea3101e
JB		 3855 }
3856 }
3857
3858 if (work_ha_copy & HA_ERATT) {
2e0fef85 3859 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 3860 /*
3861 * There was a link/board error. Read the
3862 * status register to retrieve the error event
3863 * and process it.
3864 */
3865 phba->sli.slistat.err_attn_event++;
3866 /* Save status info */
3867 phba->work_hs = readl(phba->HSregaddr);
3868 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
3869 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
3870
3871 /* Clear Chip error bit */
3872 writel(HA_ERATT, phba->HAregaddr);
3873 readl(phba->HAregaddr); /* flush */
2e0fef85 3874 phba->pport->stopped = 1;
dea3101e
JB		 3875 }
3876
92d7f7b0
JS		 3877 if ((work_ha_copy & HA_MBATT) &&
3878 (phba->sli.mbox_active)) {
3879 pmb = phba->sli.mbox_active;
3880 pmbox = &pmb->mb;
3881 mbox = &phba->slim2p->mbx;
858c9f6c 3882 vport = pmb->vport;
92d7f7b0
JS		 3883
3884 /* First check out the status word */
3885 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
3886 if (pmbox->mbxOwner != OWN_HOST) {
3887 /*
3888 * Stray Mailbox Interrupt, mbxCommand <cmd>
3889 * mbxStatus <status>
3890 */
3891 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX |
3892 LOG_SLI,
e8b62011 3893 "(%d):0304 Stray Mailbox "
92d7f7b0
JS		 3894 "Interrupt mbxCommand x%x "
3895 "mbxStatus x%x\n",
e8b62011 3896 (vport ? vport->vpi : 0),
92d7f7b0
JS		 3897 pmbox->mbxCommand,
3898 pmbox->mbxStatus);
3899 }
858c9f6c 3900 phba->last_completion_time = jiffies;
92d7f7b0
JS		 3901 del_timer_sync(&phba->sli.mbox_tmo);
3902
92d7f7b0
JS		 3903 phba->sli.mbox_active = NULL;
3904 if (pmb->mbox_cmpl) {
3905 lpfc_sli_pcimem_bcopy(mbox, pmbox,
3906 MAILBOX_CMD_SIZE);
3907 }
858c9f6c
JS		 3908 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
3909 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
3910
3911 lpfc_debugfs_disc_trc(vport,
3912 LPFC_DISC_TRC_MBOX_VPORT,
3913 "MBOX dflt rpi: : status:x%x rpi:x%x",
3914 (uint32_t)pmbox->mbxStatus,
3915 pmbox->un.varWords[0], 0);
3916
3917 if ( !pmbox->mbxStatus) {
3918 mp = (struct lpfc_dmabuf *)
3919 (pmb->context1);
3920 ndlp = (struct lpfc_nodelist *)
3921 pmb->context2;
3922
3923 /* Reg_LOGIN of dflt RPI was successful.
3924 * new lets get rid of the RPI using the
3925 * same mbox buffer.
3926 */
3927 lpfc_unreg_login(phba, vport->vpi,
3928 pmbox->un.varWords[0], pmb);
3929 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
3930 pmb->context1 = mp;
3931 pmb->context2 = ndlp;
3932 pmb->vport = vport;
3933 spin_lock(&phba->hbalock);
3934 phba->sli.sli_flag &=
3935 ~LPFC_SLI_MBOX_ACTIVE;
3936 spin_unlock(&phba->hbalock);
3937 goto send_current_mbox;
3938 }
3939 }
3940 spin_lock(&phba->pport->work_port_lock);
3941 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
3942 spin_unlock(&phba->pport->work_port_lock);
92d7f7b0
JS		 3943 lpfc_mbox_cmpl_put(phba, pmb);
3944 }
3945 if ((work_ha_copy & HA_MBATT) &&
3946 (phba->sli.mbox_active == NULL)) {
3947send_next_mbox:
3948 spin_lock(&phba->hbalock);
3949 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
3950 pmb = lpfc_mbox_get(phba);
3951 spin_unlock(&phba->hbalock);
858c9f6c 3952send_current_mbox:
92d7f7b0
JS		 3953 /* Process next mailbox command if there is one */
3954 if (pmb != NULL) {
3955 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
3956 if (rc == MBX_NOT_FINISHED) {
3957 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
3958 lpfc_mbox_cmpl_put(phba, pmb);
3959 goto send_next_mbox;
3960 }
3961 } else {
3962 /* Turn on IOCB processing */
3963 for (i = 0; i < phba->sli.num_rings; i++)
3964 lpfc_sli_turn_on_ring(phba, i);
3965 }
3966
3967 }
3968
2e0fef85 3969 spin_lock(&phba->hbalock);
dea3101e
JB		 3970 phba->work_ha |= work_ha_copy;
3971 if (phba->work_wait)
92d7f7b0 3972 lpfc_worker_wake_up(phba);
2e0fef85 3973 spin_unlock(&phba->hbalock);
dea3101e
JB		 3974 }
3975
3976 ha_copy &= ~(phba->work_ha_mask);
3977
3978 /*
3979 * Process all events on FCP ring. Take the optimized path for
3980 * FCP IO. Any other IO is slow path and is handled by
3981 * the worker thread.
3982 */
3983 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
3984 status >>= (4*LPFC_FCP_RING);
858c9f6c 3985 if (status & HA_RXMASK)
dea3101e
JB		 3986 lpfc_sli_handle_fast_ring_event(phba,
3987 &phba->sli.ring[LPFC_FCP_RING],
3988 status);
a4bc3379
JS		 3989
3990 if (phba->cfg_multi_ring_support == 2) {
3991 /*
3992 * Process all events on extra ring. Take the optimized path
3993 * for extra ring IO. Any other IO is slow path and is handled
3994 * by the worker thread.
3995 */
3996 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
3997 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 3998 if (status & HA_RXMASK) {
a4bc3379
JS		 3999 lpfc_sli_handle_fast_ring_event(phba,
4000 &phba->sli.ring[LPFC_EXTRA_RING],
4001 status);
4002 }
4003 }
dea3101e
JB		 4004 return IRQ_HANDLED;
4005
4006} /* lpfc_intr_handler */
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