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1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
128bddac 4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
3e21d1cb 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
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10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
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12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
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22 *******************************************************************/
23
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24#include <linux/blkdev.h>
25#include <linux/pci.h>
26#include <linux/interrupt.h>
27#include <linux/delay.h>
5a0e3ad6 28#include <linux/slab.h>
1c2ba475 29#include <linux/lockdep.h>
dea3101e 30
91886523 31#include <scsi/scsi.h>
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32#include <scsi/scsi_cmnd.h>
33#include <scsi/scsi_device.h>
34#include <scsi/scsi_host.h>
f888ba3c 35#include <scsi/scsi_transport_fc.h>
da0436e9 36#include <scsi/fc/fc_fs.h>
0d878419 37#include <linux/aer.h>
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38#ifdef CONFIG_X86
39#include <asm/set_memory.h>
40#endif
dea3101e 41
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42#include <linux/nvme-fc-driver.h>
43
da0436e9 44#include "lpfc_hw4.h"
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45#include "lpfc_hw.h"
46#include "lpfc_sli.h"
da0436e9 47#include "lpfc_sli4.h"
ea2151b4 48#include "lpfc_nl.h"
dea3101e 49#include "lpfc_disc.h"
dea3101e 50#include "lpfc.h"
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51#include "lpfc_scsi.h"
52#include "lpfc_nvme.h"
f358dd0c 53#include "lpfc_nvmet.h"
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54#include "lpfc_crtn.h"
55#include "lpfc_logmsg.h"
56#include "lpfc_compat.h"
858c9f6c 57#include "lpfc_debugfs.h"
04c68496 58#include "lpfc_vport.h"
61bda8f7 59#include "lpfc_version.h"
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60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
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69
70/* Provide function prototypes local to this module. */
71static int lpfc_sli_issue_mbox_s4(struct lpfc_hba *, LPFC_MBOXQ_t *,
72 uint32_t);
73static int lpfc_sli4_read_rev(struct lpfc_hba *, LPFC_MBOXQ_t *,
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74 uint8_t *, uint32_t *);
75static struct lpfc_iocbq *lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *,
76 struct lpfc_iocbq *);
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77static void lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *,
78 struct hbq_dmabuf *);
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79static void lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
80 struct hbq_dmabuf *dmabuf);
895427bd 81static int lpfc_sli4_fp_handle_cqe(struct lpfc_hba *, struct lpfc_queue *,
0558056c 82 struct lpfc_cqe *);
895427bd 83static int lpfc_sli4_post_sgl_list(struct lpfc_hba *, struct list_head *,
8a9d2e80 84 int);
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85static void lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba,
86 struct lpfc_eqe *eqe, uint32_t qidx);
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87static bool lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba);
88static bool lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba);
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89static int lpfc_sli4_abort_nvme_io(struct lpfc_hba *phba,
90 struct lpfc_sli_ring *pring,
91 struct lpfc_iocbq *cmdiocb);
0558056c 92
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93static IOCB_t *
94lpfc_get_iocb_from_iocbq(struct lpfc_iocbq *iocbq)
95{
96 return &iocbq->iocb;
97}
98
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99#if defined(CONFIG_64BIT) && defined(__LITTLE_ENDIAN)
100/**
101 * lpfc_sli4_pcimem_bcopy - SLI4 memory copy function
102 * @srcp: Source memory pointer.
103 * @destp: Destination memory pointer.
104 * @cnt: Number of words required to be copied.
105 * Must be a multiple of sizeof(uint64_t)
106 *
107 * This function is used for copying data between driver memory
108 * and the SLI WQ. This function also changes the endianness
109 * of each word if native endianness is different from SLI
110 * endianness. This function can be called with or without
111 * lock.
112 **/
113void
114lpfc_sli4_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
115{
116 uint64_t *src = srcp;
117 uint64_t *dest = destp;
118 int i;
119
120 for (i = 0; i < (int)cnt; i += sizeof(uint64_t))
121 *dest++ = *src++;
122}
123#else
124#define lpfc_sli4_pcimem_bcopy(a, b, c) lpfc_sli_pcimem_bcopy(a, b, c)
125#endif
126
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127/**
128 * lpfc_sli4_wq_put - Put a Work Queue Entry on an Work Queue
129 * @q: The Work Queue to operate on.
130 * @wqe: The work Queue Entry to put on the Work queue.
131 *
132 * This routine will copy the contents of @wqe to the next available entry on
133 * the @q. This function will then ring the Work Queue Doorbell to signal the
134 * HBA to start processing the Work Queue Entry. This function returns 0 if
135 * successful. If no entries are available on @q then this function will return
136 * -ENOMEM.
137 * The caller is expected to hold the hbalock when calling this routine.
138 **/
cd22d605 139static int
205e8240 140lpfc_sli4_wq_put(struct lpfc_queue *q, union lpfc_wqe128 *wqe)
4f774513 141{
2e90f4b5 142 union lpfc_wqe *temp_wqe;
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143 struct lpfc_register doorbell;
144 uint32_t host_index;
027140ea 145 uint32_t idx;
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146 uint32_t i = 0;
147 uint8_t *tmp;
5cc167dd 148 u32 if_type;
4f774513 149
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150 /* sanity check on queue memory */
151 if (unlikely(!q))
152 return -ENOMEM;
153 temp_wqe = q->qe[q->host_index].wqe;
154
4f774513 155 /* If the host has not yet processed the next entry then we are done */
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156 idx = ((q->host_index + 1) % q->entry_count);
157 if (idx == q->hba_index) {
b84daac9 158 q->WQ_overflow++;
cd22d605 159 return -EBUSY;
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160 }
161 q->WQ_posted++;
4f774513 162 /* set consumption flag every once in a while */
ff78d8f9 163 if (!((q->host_index + 1) % q->entry_repost))
f0d9bccc 164 bf_set(wqe_wqec, &wqe->generic.wqe_com, 1);
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165 else
166 bf_set(wqe_wqec, &wqe->generic.wqe_com, 0);
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167 if (q->phba->sli3_options & LPFC_SLI4_PHWQ_ENABLED)
168 bf_set(wqe_wqid, &wqe->generic.wqe_com, q->queue_id);
48f8fdb4 169 lpfc_sli4_pcimem_bcopy(wqe, temp_wqe, q->entry_size);
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170 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
171 /* write to DPP aperture taking advatage of Combined Writes */
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172 tmp = (uint8_t *)temp_wqe;
173#ifdef __raw_writeq
1351e69f 174 for (i = 0; i < q->entry_size; i += sizeof(uint64_t))
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175 __raw_writeq(*((uint64_t *)(tmp + i)),
176 q->dpp_regaddr + i);
177#else
178 for (i = 0; i < q->entry_size; i += sizeof(uint32_t))
179 __raw_writel(*((uint32_t *)(tmp + i)),
180 q->dpp_regaddr + i);
181#endif
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182 }
183 /* ensure WQE bcopy and DPP flushed before doorbell write */
6b3b3bdb 184 wmb();
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185
186 /* Update the host index before invoking device */
187 host_index = q->host_index;
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188
189 q->host_index = idx;
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190
191 /* Ring Doorbell */
192 doorbell.word0 = 0;
962bc51b 193 if (q->db_format == LPFC_DB_LIST_FORMAT) {
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194 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
195 bf_set(lpfc_if6_wq_db_list_fm_num_posted, &doorbell, 1);
196 bf_set(lpfc_if6_wq_db_list_fm_dpp, &doorbell, 1);
197 bf_set(lpfc_if6_wq_db_list_fm_dpp_id, &doorbell,
198 q->dpp_id);
199 bf_set(lpfc_if6_wq_db_list_fm_id, &doorbell,
200 q->queue_id);
201 } else {
202 bf_set(lpfc_wq_db_list_fm_num_posted, &doorbell, 1);
1351e69f 203 bf_set(lpfc_wq_db_list_fm_id, &doorbell, q->queue_id);
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204
205 /* Leave bits <23:16> clear for if_type 6 dpp */
206 if_type = bf_get(lpfc_sli_intf_if_type,
207 &q->phba->sli4_hba.sli_intf);
208 if (if_type != LPFC_SLI_INTF_IF_TYPE_6)
209 bf_set(lpfc_wq_db_list_fm_index, &doorbell,
210 host_index);
1351e69f 211 }
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212 } else if (q->db_format == LPFC_DB_RING_FORMAT) {
213 bf_set(lpfc_wq_db_ring_fm_num_posted, &doorbell, 1);
214 bf_set(lpfc_wq_db_ring_fm_id, &doorbell, q->queue_id);
215 } else {
216 return -EINVAL;
217 }
218 writel(doorbell.word0, q->db_regaddr);
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219
220 return 0;
221}
222
223/**
224 * lpfc_sli4_wq_release - Updates internal hba index for WQ
225 * @q: The Work Queue to operate on.
226 * @index: The index to advance the hba index to.
227 *
228 * This routine will update the HBA index of a queue to reflect consumption of
229 * Work Queue Entries by the HBA. When the HBA indicates that it has consumed
230 * an entry the host calls this function to update the queue's internal
231 * pointers. This routine returns the number of entries that were consumed by
232 * the HBA.
233 **/
234static uint32_t
235lpfc_sli4_wq_release(struct lpfc_queue *q, uint32_t index)
236{
237 uint32_t released = 0;
238
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239 /* sanity check on queue memory */
240 if (unlikely(!q))
241 return 0;
242
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243 if (q->hba_index == index)
244 return 0;
245 do {
246 q->hba_index = ((q->hba_index + 1) % q->entry_count);
247 released++;
248 } while (q->hba_index != index);
249 return released;
250}
251
252/**
253 * lpfc_sli4_mq_put - Put a Mailbox Queue Entry on an Mailbox Queue
254 * @q: The Mailbox Queue to operate on.
255 * @wqe: The Mailbox Queue Entry to put on the Work queue.
256 *
257 * This routine will copy the contents of @mqe to the next available entry on
258 * the @q. This function will then ring the Work Queue Doorbell to signal the
259 * HBA to start processing the Work Queue Entry. This function returns 0 if
260 * successful. If no entries are available on @q then this function will return
261 * -ENOMEM.
262 * The caller is expected to hold the hbalock when calling this routine.
263 **/
264static uint32_t
265lpfc_sli4_mq_put(struct lpfc_queue *q, struct lpfc_mqe *mqe)
266{
2e90f4b5 267 struct lpfc_mqe *temp_mqe;
4f774513 268 struct lpfc_register doorbell;
4f774513 269
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270 /* sanity check on queue memory */
271 if (unlikely(!q))
272 return -ENOMEM;
273 temp_mqe = q->qe[q->host_index].mqe;
274
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275 /* If the host has not yet processed the next entry then we are done */
276 if (((q->host_index + 1) % q->entry_count) == q->hba_index)
277 return -ENOMEM;
48f8fdb4 278 lpfc_sli4_pcimem_bcopy(mqe, temp_mqe, q->entry_size);
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279 /* Save off the mailbox pointer for completion */
280 q->phba->mbox = (MAILBOX_t *)temp_mqe;
281
282 /* Update the host index before invoking device */
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283 q->host_index = ((q->host_index + 1) % q->entry_count);
284
285 /* Ring Doorbell */
286 doorbell.word0 = 0;
287 bf_set(lpfc_mq_doorbell_num_posted, &doorbell, 1);
288 bf_set(lpfc_mq_doorbell_id, &doorbell, q->queue_id);
289 writel(doorbell.word0, q->phba->sli4_hba.MQDBregaddr);
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290 return 0;
291}
292
293/**
294 * lpfc_sli4_mq_release - Updates internal hba index for MQ
295 * @q: The Mailbox Queue to operate on.
296 *
297 * This routine will update the HBA index of a queue to reflect consumption of
298 * a Mailbox Queue Entry by the HBA. When the HBA indicates that it has consumed
299 * an entry the host calls this function to update the queue's internal
300 * pointers. This routine returns the number of entries that were consumed by
301 * the HBA.
302 **/
303static uint32_t
304lpfc_sli4_mq_release(struct lpfc_queue *q)
305{
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306 /* sanity check on queue memory */
307 if (unlikely(!q))
308 return 0;
309
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310 /* Clear the mailbox pointer for completion */
311 q->phba->mbox = NULL;
312 q->hba_index = ((q->hba_index + 1) % q->entry_count);
313 return 1;
314}
315
316/**
317 * lpfc_sli4_eq_get - Gets the next valid EQE from a EQ
318 * @q: The Event Queue to get the first valid EQE from
319 *
320 * This routine will get the first valid Event Queue Entry from @q, update
321 * the queue's internal hba index, and return the EQE. If no valid EQEs are in
322 * the Queue (no more work to do), or the Queue is full of EQEs that have been
323 * processed, but not popped back to the HBA then this routine will return NULL.
324 **/
325static struct lpfc_eqe *
326lpfc_sli4_eq_get(struct lpfc_queue *q)
327{
7365f6fd 328 struct lpfc_hba *phba;
2e90f4b5 329 struct lpfc_eqe *eqe;
027140ea 330 uint32_t idx;
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331
332 /* sanity check on queue memory */
333 if (unlikely(!q))
334 return NULL;
7365f6fd 335 phba = q->phba;
2e90f4b5 336 eqe = q->qe[q->hba_index].eqe;
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337
338 /* If the next EQE is not valid then we are done */
7365f6fd 339 if (bf_get_le32(lpfc_eqe_valid, eqe) != q->qe_valid)
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340 return NULL;
341 /* If the host has not yet processed the next entry then we are done */
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342 idx = ((q->hba_index + 1) % q->entry_count);
343 if (idx == q->host_index)
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344 return NULL;
345
027140ea 346 q->hba_index = idx;
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347 /* if the index wrapped around, toggle the valid bit */
348 if (phba->sli4_hba.pc_sli4_params.eqav && !q->hba_index)
349 q->qe_valid = (q->qe_valid) ? 0 : 1;
350
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351
352 /*
353 * insert barrier for instruction interlock : data from the hardware
354 * must have the valid bit checked before it can be copied and acted
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355 * upon. Speculative instructions were allowing a bcopy at the start
356 * of lpfc_sli4_fp_handle_wcqe(), which is called immediately
357 * after our return, to copy data before the valid bit check above
358 * was done. As such, some of the copied data was stale. The barrier
359 * ensures the check is before any data is copied.
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360 */
361 mb();
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362 return eqe;
363}
364
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365/**
366 * lpfc_sli4_eq_clr_intr - Turn off interrupts from this EQ
367 * @q: The Event Queue to disable interrupts
368 *
369 **/
b71413dd 370inline void
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371lpfc_sli4_eq_clr_intr(struct lpfc_queue *q)
372{
373 struct lpfc_register doorbell;
374
375 doorbell.word0 = 0;
376 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
377 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
378 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
379 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
380 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 381 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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382}
383
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384/**
385 * lpfc_sli4_if6_eq_clr_intr - Turn off interrupts from this EQ
386 * @q: The Event Queue to disable interrupts
387 *
388 **/
389inline void
390lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q)
391{
392 struct lpfc_register doorbell;
393
394 doorbell.word0 = 0;
aad59d5d 395 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
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396 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
397}
398
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399/**
400 * lpfc_sli4_eq_release - Indicates the host has finished processing an EQ
401 * @q: The Event Queue that the host has completed processing for.
402 * @arm: Indicates whether the host wants to arms this CQ.
403 *
404 * This routine will mark all Event Queue Entries on @q, from the last
405 * known completed entry to the last entry that was processed, as completed
406 * by clearing the valid bit for each completion queue entry. Then it will
407 * notify the HBA, by ringing the doorbell, that the EQEs have been processed.
408 * The internal host index in the @q will be updated by this routine to indicate
409 * that the host has finished processing the entries. The @arm parameter
410 * indicates that the queue should be rearmed when ringing the doorbell.
411 *
412 * This function will return the number of EQEs that were popped.
413 **/
414uint32_t
415lpfc_sli4_eq_release(struct lpfc_queue *q, bool arm)
416{
417 uint32_t released = 0;
7365f6fd 418 struct lpfc_hba *phba;
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419 struct lpfc_eqe *temp_eqe;
420 struct lpfc_register doorbell;
421
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422 /* sanity check on queue memory */
423 if (unlikely(!q))
424 return 0;
7365f6fd 425 phba = q->phba;
2e90f4b5 426
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427 /* while there are valid entries */
428 while (q->hba_index != q->host_index) {
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429 if (!phba->sli4_hba.pc_sli4_params.eqav) {
430 temp_eqe = q->qe[q->host_index].eqe;
431 bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
432 }
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433 released++;
434 q->host_index = ((q->host_index + 1) % q->entry_count);
435 }
436 if (unlikely(released == 0 && !arm))
437 return 0;
438
439 /* ring doorbell for number popped */
440 doorbell.word0 = 0;
441 if (arm) {
442 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
443 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
444 }
445 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, released);
446 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
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447 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
448 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
449 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 450 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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451 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
452 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
9dd35425 453 readl(q->phba->sli4_hba.EQDBregaddr);
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454 return released;
455}
456
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457/**
458 * lpfc_sli4_if6_eq_release - Indicates the host has finished processing an EQ
459 * @q: The Event Queue that the host has completed processing for.
460 * @arm: Indicates whether the host wants to arms this CQ.
461 *
462 * This routine will mark all Event Queue Entries on @q, from the last
463 * known completed entry to the last entry that was processed, as completed
464 * by clearing the valid bit for each completion queue entry. Then it will
465 * notify the HBA, by ringing the doorbell, that the EQEs have been processed.
466 * The internal host index in the @q will be updated by this routine to indicate
467 * that the host has finished processing the entries. The @arm parameter
468 * indicates that the queue should be rearmed when ringing the doorbell.
469 *
470 * This function will return the number of EQEs that were popped.
471 **/
472uint32_t
473lpfc_sli4_if6_eq_release(struct lpfc_queue *q, bool arm)
474{
475 uint32_t released = 0;
7365f6fd 476 struct lpfc_hba *phba;
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477 struct lpfc_eqe *temp_eqe;
478 struct lpfc_register doorbell;
479
480 /* sanity check on queue memory */
481 if (unlikely(!q))
482 return 0;
7365f6fd 483 phba = q->phba;
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484
485 /* while there are valid entries */
486 while (q->hba_index != q->host_index) {
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487 if (!phba->sli4_hba.pc_sli4_params.eqav) {
488 temp_eqe = q->qe[q->host_index].eqe;
489 bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
490 }
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491 released++;
492 q->host_index = ((q->host_index + 1) % q->entry_count);
493 }
494 if (unlikely(released == 0 && !arm))
495 return 0;
496
497 /* ring doorbell for number popped */
498 doorbell.word0 = 0;
499 if (arm)
500 bf_set(lpfc_if6_eq_doorbell_arm, &doorbell, 1);
501 bf_set(lpfc_if6_eq_doorbell_num_released, &doorbell, released);
502 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
503 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
504 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
505 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
506 readl(q->phba->sli4_hba.EQDBregaddr);
507 return released;
508}
509
4f774513
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510/**
511 * lpfc_sli4_cq_get - Gets the next valid CQE from a CQ
512 * @q: The Completion Queue to get the first valid CQE from
513 *
514 * This routine will get the first valid Completion Queue Entry from @q, update
515 * the queue's internal hba index, and return the CQE. If no valid CQEs are in
516 * the Queue (no more work to do), or the Queue is full of CQEs that have been
517 * processed, but not popped back to the HBA then this routine will return NULL.
518 **/
519static struct lpfc_cqe *
520lpfc_sli4_cq_get(struct lpfc_queue *q)
521{
7365f6fd 522 struct lpfc_hba *phba;
4f774513 523 struct lpfc_cqe *cqe;
027140ea 524 uint32_t idx;
4f774513 525
2e90f4b5
JS
526 /* sanity check on queue memory */
527 if (unlikely(!q))
528 return NULL;
7365f6fd
JS
529 phba = q->phba;
530 cqe = q->qe[q->hba_index].cqe;
2e90f4b5 531
4f774513 532 /* If the next CQE is not valid then we are done */
7365f6fd 533 if (bf_get_le32(lpfc_cqe_valid, cqe) != q->qe_valid)
4f774513
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534 return NULL;
535 /* If the host has not yet processed the next entry then we are done */
027140ea
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536 idx = ((q->hba_index + 1) % q->entry_count);
537 if (idx == q->host_index)
4f774513
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538 return NULL;
539
027140ea 540 q->hba_index = idx;
7365f6fd
JS
541 /* if the index wrapped around, toggle the valid bit */
542 if (phba->sli4_hba.pc_sli4_params.cqav && !q->hba_index)
543 q->qe_valid = (q->qe_valid) ? 0 : 1;
27f344eb
JS
544
545 /*
546 * insert barrier for instruction interlock : data from the hardware
547 * must have the valid bit checked before it can be copied and acted
2ea259ee
JS
548 * upon. Given what was seen in lpfc_sli4_cq_get() of speculative
549 * instructions allowing action on content before valid bit checked,
550 * add barrier here as well. May not be needed as "content" is a
551 * single 32-bit entity here (vs multi word structure for cq's).
27f344eb
JS
552 */
553 mb();
4f774513
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554 return cqe;
555}
556
557/**
558 * lpfc_sli4_cq_release - Indicates the host has finished processing a CQ
559 * @q: The Completion Queue that the host has completed processing for.
560 * @arm: Indicates whether the host wants to arms this CQ.
561 *
562 * This routine will mark all Completion queue entries on @q, from the last
563 * known completed entry to the last entry that was processed, as completed
564 * by clearing the valid bit for each completion queue entry. Then it will
565 * notify the HBA, by ringing the doorbell, that the CQEs have been processed.
566 * The internal host index in the @q will be updated by this routine to indicate
567 * that the host has finished processing the entries. The @arm parameter
568 * indicates that the queue should be rearmed when ringing the doorbell.
569 *
570 * This function will return the number of CQEs that were released.
571 **/
572uint32_t
573lpfc_sli4_cq_release(struct lpfc_queue *q, bool arm)
574{
575 uint32_t released = 0;
7365f6fd 576 struct lpfc_hba *phba;
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577 struct lpfc_cqe *temp_qe;
578 struct lpfc_register doorbell;
579
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580 /* sanity check on queue memory */
581 if (unlikely(!q))
582 return 0;
7365f6fd
JS
583 phba = q->phba;
584
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585 /* while there are valid entries */
586 while (q->hba_index != q->host_index) {
7365f6fd
JS
587 if (!phba->sli4_hba.pc_sli4_params.cqav) {
588 temp_qe = q->qe[q->host_index].cqe;
589 bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
590 }
4f774513
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591 released++;
592 q->host_index = ((q->host_index + 1) % q->entry_count);
593 }
594 if (unlikely(released == 0 && !arm))
595 return 0;
596
597 /* ring doorbell for number popped */
598 doorbell.word0 = 0;
599 if (arm)
600 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
601 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, released);
602 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_COMPLETION);
6b5151fd
JS
603 bf_set(lpfc_eqcq_doorbell_cqid_hi, &doorbell,
604 (q->queue_id >> LPFC_CQID_HI_FIELD_SHIFT));
605 bf_set(lpfc_eqcq_doorbell_cqid_lo, &doorbell, q->queue_id);
9dd35425 606 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
4f774513
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607 return released;
608}
609
27d6ac0a
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610/**
611 * lpfc_sli4_if6_cq_release - Indicates the host has finished processing a CQ
612 * @q: The Completion Queue that the host has completed processing for.
613 * @arm: Indicates whether the host wants to arms this CQ.
614 *
615 * This routine will mark all Completion queue entries on @q, from the last
616 * known completed entry to the last entry that was processed, as completed
617 * by clearing the valid bit for each completion queue entry. Then it will
618 * notify the HBA, by ringing the doorbell, that the CQEs have been processed.
619 * The internal host index in the @q will be updated by this routine to indicate
620 * that the host has finished processing the entries. The @arm parameter
621 * indicates that the queue should be rearmed when ringing the doorbell.
622 *
623 * This function will return the number of CQEs that were released.
624 **/
625uint32_t
626lpfc_sli4_if6_cq_release(struct lpfc_queue *q, bool arm)
627{
628 uint32_t released = 0;
7365f6fd 629 struct lpfc_hba *phba;
27d6ac0a
JS
630 struct lpfc_cqe *temp_qe;
631 struct lpfc_register doorbell;
632
633 /* sanity check on queue memory */
634 if (unlikely(!q))
635 return 0;
7365f6fd
JS
636 phba = q->phba;
637
27d6ac0a
JS
638 /* while there are valid entries */
639 while (q->hba_index != q->host_index) {
7365f6fd
JS
640 if (!phba->sli4_hba.pc_sli4_params.cqav) {
641 temp_qe = q->qe[q->host_index].cqe;
642 bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
643 }
27d6ac0a
JS
644 released++;
645 q->host_index = ((q->host_index + 1) % q->entry_count);
646 }
647 if (unlikely(released == 0 && !arm))
648 return 0;
649
650 /* ring doorbell for number popped */
651 doorbell.word0 = 0;
652 if (arm)
653 bf_set(lpfc_if6_cq_doorbell_arm, &doorbell, 1);
654 bf_set(lpfc_if6_cq_doorbell_num_released, &doorbell, released);
655 bf_set(lpfc_if6_cq_doorbell_cqid, &doorbell, q->queue_id);
656 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
657 return released;
658}
659
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660/**
661 * lpfc_sli4_rq_put - Put a Receive Buffer Queue Entry on a Receive Queue
662 * @q: The Header Receive Queue to operate on.
663 * @wqe: The Receive Queue Entry to put on the Receive queue.
664 *
665 * This routine will copy the contents of @wqe to the next available entry on
666 * the @q. This function will then ring the Receive Queue Doorbell to signal the
667 * HBA to start processing the Receive Queue Entry. This function returns the
668 * index that the rqe was copied to if successful. If no entries are available
669 * on @q then this function will return -ENOMEM.
670 * The caller is expected to hold the hbalock when calling this routine.
671 **/
895427bd 672int
4f774513
JS
673lpfc_sli4_rq_put(struct lpfc_queue *hq, struct lpfc_queue *dq,
674 struct lpfc_rqe *hrqe, struct lpfc_rqe *drqe)
675{
2e90f4b5
JS
676 struct lpfc_rqe *temp_hrqe;
677 struct lpfc_rqe *temp_drqe;
4f774513 678 struct lpfc_register doorbell;
cbc5de1b
JS
679 int hq_put_index;
680 int dq_put_index;
4f774513 681
2e90f4b5
JS
682 /* sanity check on queue memory */
683 if (unlikely(!hq) || unlikely(!dq))
684 return -ENOMEM;
cbc5de1b
JS
685 hq_put_index = hq->host_index;
686 dq_put_index = dq->host_index;
687 temp_hrqe = hq->qe[hq_put_index].rqe;
688 temp_drqe = dq->qe[dq_put_index].rqe;
2e90f4b5 689
4f774513
JS
690 if (hq->type != LPFC_HRQ || dq->type != LPFC_DRQ)
691 return -EINVAL;
cbc5de1b 692 if (hq_put_index != dq_put_index)
4f774513
JS
693 return -EINVAL;
694 /* If the host has not yet processed the next entry then we are done */
cbc5de1b 695 if (((hq_put_index + 1) % hq->entry_count) == hq->hba_index)
4f774513 696 return -EBUSY;
48f8fdb4
JS
697 lpfc_sli4_pcimem_bcopy(hrqe, temp_hrqe, hq->entry_size);
698 lpfc_sli4_pcimem_bcopy(drqe, temp_drqe, dq->entry_size);
4f774513
JS
699
700 /* Update the host index to point to the next slot */
cbc5de1b
JS
701 hq->host_index = ((hq_put_index + 1) % hq->entry_count);
702 dq->host_index = ((dq_put_index + 1) % dq->entry_count);
61f3d4bf 703 hq->RQ_buf_posted++;
4f774513
JS
704
705 /* Ring The Header Receive Queue Doorbell */
73d91e50 706 if (!(hq->host_index % hq->entry_repost)) {
4f774513 707 doorbell.word0 = 0;
962bc51b
JS
708 if (hq->db_format == LPFC_DB_RING_FORMAT) {
709 bf_set(lpfc_rq_db_ring_fm_num_posted, &doorbell,
710 hq->entry_repost);
711 bf_set(lpfc_rq_db_ring_fm_id, &doorbell, hq->queue_id);
712 } else if (hq->db_format == LPFC_DB_LIST_FORMAT) {
713 bf_set(lpfc_rq_db_list_fm_num_posted, &doorbell,
714 hq->entry_repost);
715 bf_set(lpfc_rq_db_list_fm_index, &doorbell,
716 hq->host_index);
717 bf_set(lpfc_rq_db_list_fm_id, &doorbell, hq->queue_id);
718 } else {
719 return -EINVAL;
720 }
721 writel(doorbell.word0, hq->db_regaddr);
4f774513 722 }
cbc5de1b 723 return hq_put_index;
4f774513
JS
724}
725
726/**
727 * lpfc_sli4_rq_release - Updates internal hba index for RQ
728 * @q: The Header Receive Queue to operate on.
729 *
730 * This routine will update the HBA index of a queue to reflect consumption of
731 * one Receive Queue Entry by the HBA. When the HBA indicates that it has
732 * consumed an entry the host calls this function to update the queue's
733 * internal pointers. This routine returns the number of entries that were
734 * consumed by the HBA.
735 **/
736static uint32_t
737lpfc_sli4_rq_release(struct lpfc_queue *hq, struct lpfc_queue *dq)
738{
2e90f4b5
JS
739 /* sanity check on queue memory */
740 if (unlikely(!hq) || unlikely(!dq))
741 return 0;
742
4f774513
JS
743 if ((hq->type != LPFC_HRQ) || (dq->type != LPFC_DRQ))
744 return 0;
745 hq->hba_index = ((hq->hba_index + 1) % hq->entry_count);
746 dq->hba_index = ((dq->hba_index + 1) % dq->entry_count);
747 return 1;
748}
749
e59058c4 750/**
3621a710 751 * lpfc_cmd_iocb - Get next command iocb entry in the ring
e59058c4
JS
752 * @phba: Pointer to HBA context object.
753 * @pring: Pointer to driver SLI ring object.
754 *
755 * This function returns pointer to next command iocb entry
756 * in the command ring. The caller must hold hbalock to prevent
757 * other threads consume the next command iocb.
758 * SLI-2/SLI-3 provide different sized iocbs.
759 **/
ed957684
JS
760static inline IOCB_t *
761lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
762{
7e56aa25
JS
763 return (IOCB_t *) (((char *) pring->sli.sli3.cmdringaddr) +
764 pring->sli.sli3.cmdidx * phba->iocb_cmd_size);
ed957684
JS
765}
766
e59058c4 767/**
3621a710 768 * lpfc_resp_iocb - Get next response iocb entry in the ring
e59058c4
JS
769 * @phba: Pointer to HBA context object.
770 * @pring: Pointer to driver SLI ring object.
771 *
772 * This function returns pointer to next response iocb entry
773 * in the response ring. The caller must hold hbalock to make sure
774 * that no other thread consume the next response iocb.
775 * SLI-2/SLI-3 provide different sized iocbs.
776 **/
ed957684
JS
777static inline IOCB_t *
778lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
779{
7e56aa25
JS
780 return (IOCB_t *) (((char *) pring->sli.sli3.rspringaddr) +
781 pring->sli.sli3.rspidx * phba->iocb_rsp_size);
ed957684
JS
782}
783
e59058c4 784/**
3621a710 785 * __lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
786 * @phba: Pointer to HBA context object.
787 *
788 * This function is called with hbalock held. This function
789 * allocates a new driver iocb object from the iocb pool. If the
790 * allocation is successful, it returns pointer to the newly
791 * allocated iocb object else it returns NULL.
792 **/
4f2e66c6 793struct lpfc_iocbq *
2e0fef85 794__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC
795{
796 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
797 struct lpfc_iocbq * iocbq = NULL;
798
1c2ba475
JT
799 lockdep_assert_held(&phba->hbalock);
800
0bd4ca25 801 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
2a9bf3d0
JS
802 if (iocbq)
803 phba->iocb_cnt++;
804 if (phba->iocb_cnt > phba->iocb_max)
805 phba->iocb_max = phba->iocb_cnt;
0bd4ca25
JSEC
806 return iocbq;
807}
808
da0436e9
JS
809/**
810 * __lpfc_clear_active_sglq - Remove the active sglq for this XRI.
811 * @phba: Pointer to HBA context object.
812 * @xritag: XRI value.
813 *
814 * This function clears the sglq pointer from the array of acive
815 * sglq's. The xritag that is passed in is used to index into the
816 * array. Before the xritag can be used it needs to be adjusted
817 * by subtracting the xribase.
818 *
819 * Returns sglq ponter = success, NULL = Failure.
820 **/
895427bd 821struct lpfc_sglq *
da0436e9
JS
822__lpfc_clear_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
823{
da0436e9 824 struct lpfc_sglq *sglq;
6d368e53
JS
825
826 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
827 phba->sli4_hba.lpfc_sglq_active_list[xritag] = NULL;
da0436e9
JS
828 return sglq;
829}
830
831/**
832 * __lpfc_get_active_sglq - Get the active sglq for this XRI.
833 * @phba: Pointer to HBA context object.
834 * @xritag: XRI value.
835 *
836 * This function returns the sglq pointer from the array of acive
837 * sglq's. The xritag that is passed in is used to index into the
838 * array. Before the xritag can be used it needs to be adjusted
839 * by subtracting the xribase.
840 *
841 * Returns sglq ponter = success, NULL = Failure.
842 **/
0f65ff68 843struct lpfc_sglq *
da0436e9
JS
844__lpfc_get_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
845{
da0436e9 846 struct lpfc_sglq *sglq;
6d368e53
JS
847
848 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
da0436e9
JS
849 return sglq;
850}
851
19ca7609 852/**
1151e3ec 853 * lpfc_clr_rrq_active - Clears RRQ active bit in xri_bitmap.
19ca7609
JS
854 * @phba: Pointer to HBA context object.
855 * @xritag: xri used in this exchange.
856 * @rrq: The RRQ to be cleared.
857 *
19ca7609 858 **/
1151e3ec
JS
859void
860lpfc_clr_rrq_active(struct lpfc_hba *phba,
861 uint16_t xritag,
862 struct lpfc_node_rrq *rrq)
19ca7609 863{
1151e3ec 864 struct lpfc_nodelist *ndlp = NULL;
19ca7609 865
1151e3ec
JS
866 if ((rrq->vport) && NLP_CHK_NODE_ACT(rrq->ndlp))
867 ndlp = lpfc_findnode_did(rrq->vport, rrq->nlp_DID);
19ca7609
JS
868
869 /* The target DID could have been swapped (cable swap)
870 * we should use the ndlp from the findnode if it is
871 * available.
872 */
1151e3ec 873 if ((!ndlp) && rrq->ndlp)
19ca7609
JS
874 ndlp = rrq->ndlp;
875
1151e3ec
JS
876 if (!ndlp)
877 goto out;
878
cff261f6 879 if (test_and_clear_bit(xritag, ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
880 rrq->send_rrq = 0;
881 rrq->xritag = 0;
882 rrq->rrq_stop_time = 0;
883 }
1151e3ec 884out:
19ca7609
JS
885 mempool_free(rrq, phba->rrq_pool);
886}
887
888/**
889 * lpfc_handle_rrq_active - Checks if RRQ has waithed RATOV.
890 * @phba: Pointer to HBA context object.
891 *
892 * This function is called with hbalock held. This function
893 * Checks if stop_time (ratov from setting rrq active) has
894 * been reached, if it has and the send_rrq flag is set then
895 * it will call lpfc_send_rrq. If the send_rrq flag is not set
896 * then it will just call the routine to clear the rrq and
897 * free the rrq resource.
898 * The timer is set to the next rrq that is going to expire before
899 * leaving the routine.
900 *
901 **/
902void
903lpfc_handle_rrq_active(struct lpfc_hba *phba)
904{
905 struct lpfc_node_rrq *rrq;
906 struct lpfc_node_rrq *nextrrq;
907 unsigned long next_time;
908 unsigned long iflags;
1151e3ec 909 LIST_HEAD(send_rrq);
19ca7609
JS
910
911 spin_lock_irqsave(&phba->hbalock, iflags);
912 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
256ec0d0 913 next_time = jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
19ca7609 914 list_for_each_entry_safe(rrq, nextrrq,
1151e3ec
JS
915 &phba->active_rrq_list, list) {
916 if (time_after(jiffies, rrq->rrq_stop_time))
917 list_move(&rrq->list, &send_rrq);
918 else if (time_before(rrq->rrq_stop_time, next_time))
19ca7609
JS
919 next_time = rrq->rrq_stop_time;
920 }
921 spin_unlock_irqrestore(&phba->hbalock, iflags);
06918ac5
JS
922 if ((!list_empty(&phba->active_rrq_list)) &&
923 (!(phba->pport->load_flag & FC_UNLOADING)))
19ca7609 924 mod_timer(&phba->rrq_tmr, next_time);
1151e3ec
JS
925 list_for_each_entry_safe(rrq, nextrrq, &send_rrq, list) {
926 list_del(&rrq->list);
927 if (!rrq->send_rrq)
928 /* this call will free the rrq */
929 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
930 else if (lpfc_send_rrq(phba, rrq)) {
931 /* if we send the rrq then the completion handler
932 * will clear the bit in the xribitmap.
933 */
934 lpfc_clr_rrq_active(phba, rrq->xritag,
935 rrq);
936 }
937 }
19ca7609
JS
938}
939
940/**
941 * lpfc_get_active_rrq - Get the active RRQ for this exchange.
942 * @vport: Pointer to vport context object.
943 * @xri: The xri used in the exchange.
944 * @did: The targets DID for this exchange.
945 *
946 * returns NULL = rrq not found in the phba->active_rrq_list.
947 * rrq = rrq for this xri and target.
948 **/
949struct lpfc_node_rrq *
950lpfc_get_active_rrq(struct lpfc_vport *vport, uint16_t xri, uint32_t did)
951{
952 struct lpfc_hba *phba = vport->phba;
953 struct lpfc_node_rrq *rrq;
954 struct lpfc_node_rrq *nextrrq;
955 unsigned long iflags;
956
957 if (phba->sli_rev != LPFC_SLI_REV4)
958 return NULL;
959 spin_lock_irqsave(&phba->hbalock, iflags);
960 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list) {
961 if (rrq->vport == vport && rrq->xritag == xri &&
962 rrq->nlp_DID == did){
963 list_del(&rrq->list);
964 spin_unlock_irqrestore(&phba->hbalock, iflags);
965 return rrq;
966 }
967 }
968 spin_unlock_irqrestore(&phba->hbalock, iflags);
969 return NULL;
970}
971
972/**
973 * lpfc_cleanup_vports_rrqs - Remove and clear the active RRQ for this vport.
974 * @vport: Pointer to vport context object.
1151e3ec
JS
975 * @ndlp: Pointer to the lpfc_node_list structure.
976 * If ndlp is NULL Remove all active RRQs for this vport from the
977 * phba->active_rrq_list and clear the rrq.
978 * If ndlp is not NULL then only remove rrqs for this vport & this ndlp.
19ca7609
JS
979 **/
980void
1151e3ec 981lpfc_cleanup_vports_rrqs(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
19ca7609
JS
982
983{
984 struct lpfc_hba *phba = vport->phba;
985 struct lpfc_node_rrq *rrq;
986 struct lpfc_node_rrq *nextrrq;
987 unsigned long iflags;
1151e3ec 988 LIST_HEAD(rrq_list);
19ca7609
JS
989
990 if (phba->sli_rev != LPFC_SLI_REV4)
991 return;
1151e3ec
JS
992 if (!ndlp) {
993 lpfc_sli4_vport_delete_els_xri_aborted(vport);
994 lpfc_sli4_vport_delete_fcp_xri_aborted(vport);
19ca7609 995 }
1151e3ec
JS
996 spin_lock_irqsave(&phba->hbalock, iflags);
997 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list)
998 if ((rrq->vport == vport) && (!ndlp || rrq->ndlp == ndlp))
999 list_move(&rrq->list, &rrq_list);
19ca7609 1000 spin_unlock_irqrestore(&phba->hbalock, iflags);
1151e3ec
JS
1001
1002 list_for_each_entry_safe(rrq, nextrrq, &rrq_list, list) {
1003 list_del(&rrq->list);
1004 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
1005 }
19ca7609
JS
1006}
1007
19ca7609 1008/**
1151e3ec 1009 * lpfc_test_rrq_active - Test RRQ bit in xri_bitmap.
19ca7609
JS
1010 * @phba: Pointer to HBA context object.
1011 * @ndlp: Targets nodelist pointer for this exchange.
1012 * @xritag the xri in the bitmap to test.
1013 *
1014 * This function is called with hbalock held. This function
1015 * returns 0 = rrq not active for this xri
1016 * 1 = rrq is valid for this xri.
1017 **/
1151e3ec
JS
1018int
1019lpfc_test_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
19ca7609
JS
1020 uint16_t xritag)
1021{
1c2ba475 1022 lockdep_assert_held(&phba->hbalock);
19ca7609
JS
1023 if (!ndlp)
1024 return 0;
cff261f6
JS
1025 if (!ndlp->active_rrqs_xri_bitmap)
1026 return 0;
1027 if (test_bit(xritag, ndlp->active_rrqs_xri_bitmap))
19ca7609
JS
1028 return 1;
1029 else
1030 return 0;
1031}
1032
1033/**
1034 * lpfc_set_rrq_active - set RRQ active bit in xri_bitmap.
1035 * @phba: Pointer to HBA context object.
1036 * @ndlp: nodelist pointer for this target.
1037 * @xritag: xri used in this exchange.
1038 * @rxid: Remote Exchange ID.
1039 * @send_rrq: Flag used to determine if we should send rrq els cmd.
1040 *
1041 * This function takes the hbalock.
1042 * The active bit is always set in the active rrq xri_bitmap even
1043 * if there is no slot avaiable for the other rrq information.
1044 *
1045 * returns 0 rrq actived for this xri
1046 * < 0 No memory or invalid ndlp.
1047 **/
1048int
1049lpfc_set_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
b42c07c8 1050 uint16_t xritag, uint16_t rxid, uint16_t send_rrq)
19ca7609 1051{
19ca7609 1052 unsigned long iflags;
b42c07c8
JS
1053 struct lpfc_node_rrq *rrq;
1054 int empty;
1055
1056 if (!ndlp)
1057 return -EINVAL;
1058
1059 if (!phba->cfg_enable_rrq)
1060 return -EINVAL;
19ca7609
JS
1061
1062 spin_lock_irqsave(&phba->hbalock, iflags);
b42c07c8
JS
1063 if (phba->pport->load_flag & FC_UNLOADING) {
1064 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
1065 goto out;
1066 }
1067
1068 /*
1069 * set the active bit even if there is no mem available.
1070 */
1071 if (NLP_CHK_FREE_REQ(ndlp))
1072 goto out;
1073
1074 if (ndlp->vport && (ndlp->vport->load_flag & FC_UNLOADING))
1075 goto out;
1076
cff261f6
JS
1077 if (!ndlp->active_rrqs_xri_bitmap)
1078 goto out;
1079
1080 if (test_and_set_bit(xritag, ndlp->active_rrqs_xri_bitmap))
b42c07c8
JS
1081 goto out;
1082
19ca7609 1083 spin_unlock_irqrestore(&phba->hbalock, iflags);
b42c07c8
JS
1084 rrq = mempool_alloc(phba->rrq_pool, GFP_KERNEL);
1085 if (!rrq) {
1086 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1087 "3155 Unable to allocate RRQ xri:0x%x rxid:0x%x"
1088 " DID:0x%x Send:%d\n",
1089 xritag, rxid, ndlp->nlp_DID, send_rrq);
1090 return -EINVAL;
1091 }
e5771b4d
JS
1092 if (phba->cfg_enable_rrq == 1)
1093 rrq->send_rrq = send_rrq;
1094 else
1095 rrq->send_rrq = 0;
b42c07c8 1096 rrq->xritag = xritag;
256ec0d0
JS
1097 rrq->rrq_stop_time = jiffies +
1098 msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
b42c07c8
JS
1099 rrq->ndlp = ndlp;
1100 rrq->nlp_DID = ndlp->nlp_DID;
1101 rrq->vport = ndlp->vport;
1102 rrq->rxid = rxid;
b42c07c8
JS
1103 spin_lock_irqsave(&phba->hbalock, iflags);
1104 empty = list_empty(&phba->active_rrq_list);
1105 list_add_tail(&rrq->list, &phba->active_rrq_list);
1106 phba->hba_flag |= HBA_RRQ_ACTIVE;
1107 if (empty)
1108 lpfc_worker_wake_up(phba);
1109 spin_unlock_irqrestore(&phba->hbalock, iflags);
1110 return 0;
1111out:
1112 spin_unlock_irqrestore(&phba->hbalock, iflags);
1113 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1114 "2921 Can't set rrq active xri:0x%x rxid:0x%x"
1115 " DID:0x%x Send:%d\n",
1116 xritag, rxid, ndlp->nlp_DID, send_rrq);
1117 return -EINVAL;
19ca7609
JS
1118}
1119
da0436e9 1120/**
895427bd 1121 * __lpfc_sli_get_els_sglq - Allocates an iocb object from sgl pool
da0436e9 1122 * @phba: Pointer to HBA context object.
19ca7609 1123 * @piocb: Pointer to the iocbq.
da0436e9 1124 *
dafe8cea 1125 * This function is called with the ring lock held. This function
6d368e53 1126 * gets a new driver sglq object from the sglq list. If the
da0436e9
JS
1127 * list is not empty then it is successful, it returns pointer to the newly
1128 * allocated sglq object else it returns NULL.
1129 **/
1130static struct lpfc_sglq *
895427bd 1131__lpfc_sli_get_els_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
da0436e9 1132{
895427bd 1133 struct list_head *lpfc_els_sgl_list = &phba->sli4_hba.lpfc_els_sgl_list;
da0436e9 1134 struct lpfc_sglq *sglq = NULL;
19ca7609 1135 struct lpfc_sglq *start_sglq = NULL;
19ca7609
JS
1136 struct lpfc_scsi_buf *lpfc_cmd;
1137 struct lpfc_nodelist *ndlp;
1138 int found = 0;
1139
1c2ba475
JT
1140 lockdep_assert_held(&phba->hbalock);
1141
19ca7609
JS
1142 if (piocbq->iocb_flag & LPFC_IO_FCP) {
1143 lpfc_cmd = (struct lpfc_scsi_buf *) piocbq->context1;
1144 ndlp = lpfc_cmd->rdata->pnode;
be858b65 1145 } else if ((piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) &&
6c7cf486 1146 !(piocbq->iocb_flag & LPFC_IO_LIBDFC)) {
19ca7609 1147 ndlp = piocbq->context_un.ndlp;
6c7cf486
JS
1148 } else if (piocbq->iocb_flag & LPFC_IO_LIBDFC) {
1149 if (piocbq->iocb_flag & LPFC_IO_LOOPBACK)
1150 ndlp = NULL;
1151 else
1152 ndlp = piocbq->context_un.ndlp;
1153 } else {
19ca7609 1154 ndlp = piocbq->context1;
6c7cf486 1155 }
19ca7609 1156
895427bd
JS
1157 spin_lock(&phba->sli4_hba.sgl_list_lock);
1158 list_remove_head(lpfc_els_sgl_list, sglq, struct lpfc_sglq, list);
19ca7609
JS
1159 start_sglq = sglq;
1160 while (!found) {
1161 if (!sglq)
d11f54b7 1162 break;
895427bd
JS
1163 if (ndlp && ndlp->active_rrqs_xri_bitmap &&
1164 test_bit(sglq->sli4_lxritag,
1165 ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
1166 /* This xri has an rrq outstanding for this DID.
1167 * put it back in the list and get another xri.
1168 */
895427bd 1169 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609 1170 sglq = NULL;
895427bd 1171 list_remove_head(lpfc_els_sgl_list, sglq,
19ca7609
JS
1172 struct lpfc_sglq, list);
1173 if (sglq == start_sglq) {
14041bd1 1174 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609
JS
1175 sglq = NULL;
1176 break;
1177 } else
1178 continue;
1179 }
1180 sglq->ndlp = ndlp;
1181 found = 1;
6d368e53 1182 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
19ca7609
JS
1183 sglq->state = SGL_ALLOCATED;
1184 }
895427bd 1185 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1186 return sglq;
1187}
1188
f358dd0c
JS
1189/**
1190 * __lpfc_sli_get_nvmet_sglq - Allocates an iocb object from sgl pool
1191 * @phba: Pointer to HBA context object.
1192 * @piocb: Pointer to the iocbq.
1193 *
1194 * This function is called with the sgl_list lock held. This function
1195 * gets a new driver sglq object from the sglq list. If the
1196 * list is not empty then it is successful, it returns pointer to the newly
1197 * allocated sglq object else it returns NULL.
1198 **/
1199struct lpfc_sglq *
1200__lpfc_sli_get_nvmet_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
1201{
1202 struct list_head *lpfc_nvmet_sgl_list;
1203 struct lpfc_sglq *sglq = NULL;
1204
1205 lpfc_nvmet_sgl_list = &phba->sli4_hba.lpfc_nvmet_sgl_list;
1206
1207 lockdep_assert_held(&phba->sli4_hba.sgl_list_lock);
1208
1209 list_remove_head(lpfc_nvmet_sgl_list, sglq, struct lpfc_sglq, list);
1210 if (!sglq)
1211 return NULL;
1212 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
1213 sglq->state = SGL_ALLOCATED;
da0436e9
JS
1214 return sglq;
1215}
1216
e59058c4 1217/**
3621a710 1218 * lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
1219 * @phba: Pointer to HBA context object.
1220 *
1221 * This function is called with no lock held. This function
1222 * allocates a new driver iocb object from the iocb pool. If the
1223 * allocation is successful, it returns pointer to the newly
1224 * allocated iocb object else it returns NULL.
1225 **/
2e0fef85
JS
1226struct lpfc_iocbq *
1227lpfc_sli_get_iocbq(struct lpfc_hba *phba)
1228{
1229 struct lpfc_iocbq * iocbq = NULL;
1230 unsigned long iflags;
1231
1232 spin_lock_irqsave(&phba->hbalock, iflags);
1233 iocbq = __lpfc_sli_get_iocbq(phba);
1234 spin_unlock_irqrestore(&phba->hbalock, iflags);
1235 return iocbq;
1236}
1237
4f774513
JS
1238/**
1239 * __lpfc_sli_release_iocbq_s4 - Release iocb to the iocb pool
1240 * @phba: Pointer to HBA context object.
1241 * @iocbq: Pointer to driver iocb object.
1242 *
1243 * This function is called with hbalock held to release driver
1244 * iocb object to the iocb pool. The iotag in the iocb object
1245 * does not change for each use of the iocb object. This function
1246 * clears all other fields of the iocb object when it is freed.
1247 * The sqlq structure that holds the xritag and phys and virtual
1248 * mappings for the scatter gather list is retrieved from the
1249 * active array of sglq. The get of the sglq pointer also clears
1250 * the entry in the array. If the status of the IO indiactes that
1251 * this IO was aborted then the sglq entry it put on the
1252 * lpfc_abts_els_sgl_list until the CQ_ABORTED_XRI is received. If the
1253 * IO has good status or fails for any other reason then the sglq
895427bd 1254 * entry is added to the free list (lpfc_els_sgl_list).
4f774513
JS
1255 **/
1256static void
1257__lpfc_sli_release_iocbq_s4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1258{
1259 struct lpfc_sglq *sglq;
1260 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
2a9bf3d0 1261 unsigned long iflag = 0;
895427bd 1262 struct lpfc_sli_ring *pring;
4f774513 1263
1c2ba475
JT
1264 lockdep_assert_held(&phba->hbalock);
1265
4f774513
JS
1266 if (iocbq->sli4_xritag == NO_XRI)
1267 sglq = NULL;
1268 else
6d368e53
JS
1269 sglq = __lpfc_clear_active_sglq(phba, iocbq->sli4_lxritag);
1270
0e9bb8d7 1271
4f774513 1272 if (sglq) {
f358dd0c
JS
1273 if (iocbq->iocb_flag & LPFC_IO_NVMET) {
1274 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1275 iflag);
1276 sglq->state = SGL_FREED;
1277 sglq->ndlp = NULL;
1278 list_add_tail(&sglq->list,
1279 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1280 spin_unlock_irqrestore(
1281 &phba->sli4_hba.sgl_list_lock, iflag);
1282 goto out;
1283 }
1284
895427bd 1285 pring = phba->sli4_hba.els_wq->pring;
0f65ff68
JS
1286 if ((iocbq->iocb_flag & LPFC_EXCHANGE_BUSY) &&
1287 (sglq->state != SGL_XRI_ABORTED)) {
895427bd
JS
1288 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1289 iflag);
4f774513 1290 list_add(&sglq->list,
895427bd 1291 &phba->sli4_hba.lpfc_abts_els_sgl_list);
4f774513 1292 spin_unlock_irqrestore(
895427bd 1293 &phba->sli4_hba.sgl_list_lock, iflag);
0f65ff68 1294 } else {
895427bd
JS
1295 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1296 iflag);
0f65ff68 1297 sglq->state = SGL_FREED;
19ca7609 1298 sglq->ndlp = NULL;
fedd3b7b 1299 list_add_tail(&sglq->list,
895427bd
JS
1300 &phba->sli4_hba.lpfc_els_sgl_list);
1301 spin_unlock_irqrestore(
1302 &phba->sli4_hba.sgl_list_lock, iflag);
2a9bf3d0
JS
1303
1304 /* Check if TXQ queue needs to be serviced */
0e9bb8d7 1305 if (!list_empty(&pring->txq))
2a9bf3d0 1306 lpfc_worker_wake_up(phba);
0f65ff68 1307 }
4f774513
JS
1308 }
1309
f358dd0c 1310out:
4f774513
JS
1311 /*
1312 * Clean all volatile data fields, preserve iotag and node struct.
1313 */
1314 memset((char *)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
6d368e53 1315 iocbq->sli4_lxritag = NO_XRI;
4f774513 1316 iocbq->sli4_xritag = NO_XRI;
f358dd0c
JS
1317 iocbq->iocb_flag &= ~(LPFC_IO_NVME | LPFC_IO_NVMET |
1318 LPFC_IO_NVME_LS);
4f774513
JS
1319 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1320}
1321
2a9bf3d0 1322
e59058c4 1323/**
3772a991 1324 * __lpfc_sli_release_iocbq_s3 - Release iocb to the iocb pool
e59058c4
JS
1325 * @phba: Pointer to HBA context object.
1326 * @iocbq: Pointer to driver iocb object.
1327 *
1328 * This function is called with hbalock held to release driver
1329 * iocb object to the iocb pool. The iotag in the iocb object
1330 * does not change for each use of the iocb object. This function
1331 * clears all other fields of the iocb object when it is freed.
1332 **/
a6ababd2 1333static void
3772a991 1334__lpfc_sli_release_iocbq_s3(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 1335{
2e0fef85 1336 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30 1337
1c2ba475 1338 lockdep_assert_held(&phba->hbalock);
0e9bb8d7 1339
604a3e30
JB
1340 /*
1341 * Clean all volatile data fields, preserve iotag and node struct.
1342 */
1343 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
3772a991 1344 iocbq->sli4_xritag = NO_XRI;
604a3e30
JB
1345 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1346}
1347
3772a991
JS
1348/**
1349 * __lpfc_sli_release_iocbq - Release iocb to the iocb pool
1350 * @phba: Pointer to HBA context object.
1351 * @iocbq: Pointer to driver iocb object.
1352 *
1353 * This function is called with hbalock held to release driver
1354 * iocb object to the iocb pool. The iotag in the iocb object
1355 * does not change for each use of the iocb object. This function
1356 * clears all other fields of the iocb object when it is freed.
1357 **/
1358static void
1359__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1360{
1c2ba475
JT
1361 lockdep_assert_held(&phba->hbalock);
1362
3772a991 1363 phba->__lpfc_sli_release_iocbq(phba, iocbq);
2a9bf3d0 1364 phba->iocb_cnt--;
3772a991
JS
1365}
1366
e59058c4 1367/**
3621a710 1368 * lpfc_sli_release_iocbq - Release iocb to the iocb pool
e59058c4
JS
1369 * @phba: Pointer to HBA context object.
1370 * @iocbq: Pointer to driver iocb object.
1371 *
1372 * This function is called with no lock held to release the iocb to
1373 * iocb pool.
1374 **/
2e0fef85
JS
1375void
1376lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1377{
1378 unsigned long iflags;
1379
1380 /*
1381 * Clean all volatile data fields, preserve iotag and node struct.
1382 */
1383 spin_lock_irqsave(&phba->hbalock, iflags);
1384 __lpfc_sli_release_iocbq(phba, iocbq);
1385 spin_unlock_irqrestore(&phba->hbalock, iflags);
1386}
1387
a257bf90
JS
1388/**
1389 * lpfc_sli_cancel_iocbs - Cancel all iocbs from a list.
1390 * @phba: Pointer to HBA context object.
1391 * @iocblist: List of IOCBs.
1392 * @ulpstatus: ULP status in IOCB command field.
1393 * @ulpWord4: ULP word-4 in IOCB command field.
1394 *
1395 * This function is called with a list of IOCBs to cancel. It cancels the IOCB
1396 * on the list by invoking the complete callback function associated with the
1397 * IOCB with the provided @ulpstatus and @ulpword4 set to the IOCB commond
1398 * fields.
1399 **/
1400void
1401lpfc_sli_cancel_iocbs(struct lpfc_hba *phba, struct list_head *iocblist,
1402 uint32_t ulpstatus, uint32_t ulpWord4)
1403{
1404 struct lpfc_iocbq *piocb;
1405
1406 while (!list_empty(iocblist)) {
1407 list_remove_head(iocblist, piocb, struct lpfc_iocbq, list);
a257bf90
JS
1408 if (!piocb->iocb_cmpl)
1409 lpfc_sli_release_iocbq(phba, piocb);
1410 else {
1411 piocb->iocb.ulpStatus = ulpstatus;
1412 piocb->iocb.un.ulpWord[4] = ulpWord4;
1413 (piocb->iocb_cmpl) (phba, piocb, piocb);
1414 }
1415 }
1416 return;
1417}
1418
e59058c4 1419/**
3621a710
JS
1420 * lpfc_sli_iocb_cmd_type - Get the iocb type
1421 * @iocb_cmnd: iocb command code.
e59058c4
JS
1422 *
1423 * This function is called by ring event handler function to get the iocb type.
1424 * This function translates the iocb command to an iocb command type used to
1425 * decide the final disposition of each completed IOCB.
1426 * The function returns
1427 * LPFC_UNKNOWN_IOCB if it is an unsupported iocb
1428 * LPFC_SOL_IOCB if it is a solicited iocb completion
1429 * LPFC_ABORT_IOCB if it is an abort iocb
1430 * LPFC_UNSOL_IOCB if it is an unsolicited iocb
1431 *
1432 * The caller is not required to hold any lock.
1433 **/
dea3101e
JB
1434static lpfc_iocb_type
1435lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
1436{
1437 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
1438
1439 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
1440 return 0;
1441
1442 switch (iocb_cmnd) {
1443 case CMD_XMIT_SEQUENCE_CR:
1444 case CMD_XMIT_SEQUENCE_CX:
1445 case CMD_XMIT_BCAST_CN:
1446 case CMD_XMIT_BCAST_CX:
1447 case CMD_ELS_REQUEST_CR:
1448 case CMD_ELS_REQUEST_CX:
1449 case CMD_CREATE_XRI_CR:
1450 case CMD_CREATE_XRI_CX:
1451 case CMD_GET_RPI_CN:
1452 case CMD_XMIT_ELS_RSP_CX:
1453 case CMD_GET_RPI_CR:
1454 case CMD_FCP_IWRITE_CR:
1455 case CMD_FCP_IWRITE_CX:
1456 case CMD_FCP_IREAD_CR:
1457 case CMD_FCP_IREAD_CX:
1458 case CMD_FCP_ICMND_CR:
1459 case CMD_FCP_ICMND_CX:
f5603511
JS
1460 case CMD_FCP_TSEND_CX:
1461 case CMD_FCP_TRSP_CX:
1462 case CMD_FCP_TRECEIVE_CX:
1463 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB
1464 case CMD_ADAPTER_MSG:
1465 case CMD_ADAPTER_DUMP:
1466 case CMD_XMIT_SEQUENCE64_CR:
1467 case CMD_XMIT_SEQUENCE64_CX:
1468 case CMD_XMIT_BCAST64_CN:
1469 case CMD_XMIT_BCAST64_CX:
1470 case CMD_ELS_REQUEST64_CR:
1471 case CMD_ELS_REQUEST64_CX:
1472 case CMD_FCP_IWRITE64_CR:
1473 case CMD_FCP_IWRITE64_CX:
1474 case CMD_FCP_IREAD64_CR:
1475 case CMD_FCP_IREAD64_CX:
1476 case CMD_FCP_ICMND64_CR:
1477 case CMD_FCP_ICMND64_CX:
f5603511
JS
1478 case CMD_FCP_TSEND64_CX:
1479 case CMD_FCP_TRSP64_CX:
1480 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB
1481 case CMD_GEN_REQUEST64_CR:
1482 case CMD_GEN_REQUEST64_CX:
1483 case CMD_XMIT_ELS_RSP64_CX:
da0436e9
JS
1484 case DSSCMD_IWRITE64_CR:
1485 case DSSCMD_IWRITE64_CX:
1486 case DSSCMD_IREAD64_CR:
1487 case DSSCMD_IREAD64_CX:
dea3101e
JB
1488 type = LPFC_SOL_IOCB;
1489 break;
1490 case CMD_ABORT_XRI_CN:
1491 case CMD_ABORT_XRI_CX:
1492 case CMD_CLOSE_XRI_CN:
1493 case CMD_CLOSE_XRI_CX:
1494 case CMD_XRI_ABORTED_CX:
1495 case CMD_ABORT_MXRI64_CN:
6669f9bb 1496 case CMD_XMIT_BLS_RSP64_CX:
dea3101e
JB
1497 type = LPFC_ABORT_IOCB;
1498 break;
1499 case CMD_RCV_SEQUENCE_CX:
1500 case CMD_RCV_ELS_REQ_CX:
1501 case CMD_RCV_SEQUENCE64_CX:
1502 case CMD_RCV_ELS_REQ64_CX:
57127f15 1503 case CMD_ASYNC_STATUS:
ed957684
JS
1504 case CMD_IOCB_RCV_SEQ64_CX:
1505 case CMD_IOCB_RCV_ELS64_CX:
1506 case CMD_IOCB_RCV_CONT64_CX:
3163f725 1507 case CMD_IOCB_RET_XRI64_CX:
dea3101e
JB
1508 type = LPFC_UNSOL_IOCB;
1509 break;
3163f725
JS
1510 case CMD_IOCB_XMIT_MSEQ64_CR:
1511 case CMD_IOCB_XMIT_MSEQ64_CX:
1512 case CMD_IOCB_RCV_SEQ_LIST64_CX:
1513 case CMD_IOCB_RCV_ELS_LIST64_CX:
1514 case CMD_IOCB_CLOSE_EXTENDED_CN:
1515 case CMD_IOCB_ABORT_EXTENDED_CN:
1516 case CMD_IOCB_RET_HBQE64_CN:
1517 case CMD_IOCB_FCP_IBIDIR64_CR:
1518 case CMD_IOCB_FCP_IBIDIR64_CX:
1519 case CMD_IOCB_FCP_ITASKMGT64_CX:
1520 case CMD_IOCB_LOGENTRY_CN:
1521 case CMD_IOCB_LOGENTRY_ASYNC_CN:
1522 printk("%s - Unhandled SLI-3 Command x%x\n",
cadbd4a5 1523 __func__, iocb_cmnd);
3163f725
JS
1524 type = LPFC_UNKNOWN_IOCB;
1525 break;
dea3101e
JB
1526 default:
1527 type = LPFC_UNKNOWN_IOCB;
1528 break;
1529 }
1530
1531 return type;
1532}
1533
e59058c4 1534/**
3621a710 1535 * lpfc_sli_ring_map - Issue config_ring mbox for all rings
e59058c4
JS
1536 * @phba: Pointer to HBA context object.
1537 *
1538 * This function is called from SLI initialization code
1539 * to configure every ring of the HBA's SLI interface. The
1540 * caller is not required to hold any lock. This function issues
1541 * a config_ring mailbox command for each ring.
1542 * This function returns zero if successful else returns a negative
1543 * error code.
1544 **/
dea3101e 1545static int
ed957684 1546lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB
1547{
1548 struct lpfc_sli *psli = &phba->sli;
ed957684
JS
1549 LPFC_MBOXQ_t *pmb;
1550 MAILBOX_t *pmbox;
1551 int i, rc, ret = 0;
dea3101e 1552
ed957684
JS
1553 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1554 if (!pmb)
1555 return -ENOMEM;
04c68496 1556 pmbox = &pmb->u.mb;
ed957684 1557 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 1558 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB
1559 lpfc_config_ring(phba, i, pmb);
1560 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1561 if (rc != MBX_SUCCESS) {
92d7f7b0 1562 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1563 "0446 Adapter failed to init (%d), "
dea3101e
JB
1564 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
1565 "ring %d\n",
e8b62011
JS
1566 rc, pmbox->mbxCommand,
1567 pmbox->mbxStatus, i);
2e0fef85 1568 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS
1569 ret = -ENXIO;
1570 break;
dea3101e
JB
1571 }
1572 }
ed957684
JS
1573 mempool_free(pmb, phba->mbox_mem_pool);
1574 return ret;
dea3101e
JB
1575}
1576
e59058c4 1577/**
3621a710 1578 * lpfc_sli_ringtxcmpl_put - Adds new iocb to the txcmplq
e59058c4
JS
1579 * @phba: Pointer to HBA context object.
1580 * @pring: Pointer to driver SLI ring object.
1581 * @piocb: Pointer to the driver iocb object.
1582 *
1583 * This function is called with hbalock held. The function adds the
1584 * new iocb to txcmplq of the given ring. This function always returns
1585 * 0. If this function is called for ELS ring, this function checks if
1586 * there is a vport associated with the ELS command. This function also
1587 * starts els_tmofunc timer if this is an ELS command.
1588 **/
dea3101e 1589static int
2e0fef85
JS
1590lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1591 struct lpfc_iocbq *piocb)
dea3101e 1592{
1c2ba475
JT
1593 lockdep_assert_held(&phba->hbalock);
1594
2319f847 1595 BUG_ON(!piocb);
22466da5 1596
dea3101e 1597 list_add_tail(&piocb->list, &pring->txcmplq);
4f2e66c6 1598 piocb->iocb_flag |= LPFC_IO_ON_TXCMPLQ;
2a9bf3d0 1599
92d7f7b0
JS
1600 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
1601 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2319f847
MFO
1602 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
1603 BUG_ON(!piocb->vport);
1604 if (!(piocb->vport->load_flag & FC_UNLOADING))
1605 mod_timer(&piocb->vport->els_tmofunc,
1606 jiffies +
1607 msecs_to_jiffies(1000 * (phba->fc_ratov << 1)));
1608 }
dea3101e 1609
2e0fef85 1610 return 0;
dea3101e
JB
1611}
1612
e59058c4 1613/**
3621a710 1614 * lpfc_sli_ringtx_get - Get first element of the txq
e59058c4
JS
1615 * @phba: Pointer to HBA context object.
1616 * @pring: Pointer to driver SLI ring object.
1617 *
1618 * This function is called with hbalock held to get next
1619 * iocb in txq of the given ring. If there is any iocb in
1620 * the txq, the function returns first iocb in the list after
1621 * removing the iocb from the list, else it returns NULL.
1622 **/
2a9bf3d0 1623struct lpfc_iocbq *
2e0fef85 1624lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 1625{
dea3101e
JB
1626 struct lpfc_iocbq *cmd_iocb;
1627
1c2ba475
JT
1628 lockdep_assert_held(&phba->hbalock);
1629
858c9f6c 1630 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
2e0fef85 1631 return cmd_iocb;
dea3101e
JB
1632}
1633
e59058c4 1634/**
3621a710 1635 * lpfc_sli_next_iocb_slot - Get next iocb slot in the ring
e59058c4
JS
1636 * @phba: Pointer to HBA context object.
1637 * @pring: Pointer to driver SLI ring object.
1638 *
1639 * This function is called with hbalock held and the caller must post the
1640 * iocb without releasing the lock. If the caller releases the lock,
1641 * iocb slot returned by the function is not guaranteed to be available.
1642 * The function returns pointer to the next available iocb slot if there
1643 * is available slot in the ring, else it returns NULL.
1644 * If the get index of the ring is ahead of the put index, the function
1645 * will post an error attention event to the worker thread to take the
1646 * HBA to offline state.
1647 **/
dea3101e
JB
1648static IOCB_t *
1649lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1650{
34b02dcd 1651 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
7e56aa25 1652 uint32_t max_cmd_idx = pring->sli.sli3.numCiocb;
1c2ba475
JT
1653
1654 lockdep_assert_held(&phba->hbalock);
1655
7e56aa25
JS
1656 if ((pring->sli.sli3.next_cmdidx == pring->sli.sli3.cmdidx) &&
1657 (++pring->sli.sli3.next_cmdidx >= max_cmd_idx))
1658 pring->sli.sli3.next_cmdidx = 0;
dea3101e 1659
7e56aa25
JS
1660 if (unlikely(pring->sli.sli3.local_getidx ==
1661 pring->sli.sli3.next_cmdidx)) {
dea3101e 1662
7e56aa25 1663 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e 1664
7e56aa25 1665 if (unlikely(pring->sli.sli3.local_getidx >= max_cmd_idx)) {
dea3101e 1666 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1667 "0315 Ring %d issue: portCmdGet %d "
025dfdaf 1668 "is bigger than cmd ring %d\n",
e8b62011 1669 pring->ringno,
7e56aa25
JS
1670 pring->sli.sli3.local_getidx,
1671 max_cmd_idx);
dea3101e 1672
2e0fef85 1673 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
1674 /*
1675 * All error attention handlers are posted to
1676 * worker thread
1677 */
1678 phba->work_ha |= HA_ERATT;
1679 phba->work_hs = HS_FFER3;
92d7f7b0 1680
5e9d9b82 1681 lpfc_worker_wake_up(phba);
dea3101e
JB
1682
1683 return NULL;
1684 }
1685
7e56aa25 1686 if (pring->sli.sli3.local_getidx == pring->sli.sli3.next_cmdidx)
dea3101e
JB
1687 return NULL;
1688 }
1689
ed957684 1690 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB
1691}
1692
e59058c4 1693/**
3621a710 1694 * lpfc_sli_next_iotag - Get an iotag for the iocb
e59058c4
JS
1695 * @phba: Pointer to HBA context object.
1696 * @iocbq: Pointer to driver iocb object.
1697 *
1698 * This function gets an iotag for the iocb. If there is no unused iotag and
1699 * the iocbq_lookup_len < 0xffff, this function allocates a bigger iotag_lookup
1700 * array and assigns a new iotag.
1701 * The function returns the allocated iotag if successful, else returns zero.
1702 * Zero is not a valid iotag.
1703 * The caller is not required to hold any lock.
1704 **/
604a3e30 1705uint16_t
2e0fef85 1706lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 1707{
2e0fef85
JS
1708 struct lpfc_iocbq **new_arr;
1709 struct lpfc_iocbq **old_arr;
604a3e30
JB
1710 size_t new_len;
1711 struct lpfc_sli *psli = &phba->sli;
1712 uint16_t iotag;
dea3101e 1713
2e0fef85 1714 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1715 iotag = psli->last_iotag;
1716 if(++iotag < psli->iocbq_lookup_len) {
1717 psli->last_iotag = iotag;
1718 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1719 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1720 iocbq->iotag = iotag;
1721 return iotag;
2e0fef85 1722 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB
1723 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
1724 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85 1725 spin_unlock_irq(&phba->hbalock);
6396bb22 1726 new_arr = kcalloc(new_len, sizeof(struct lpfc_iocbq *),
604a3e30
JB
1727 GFP_KERNEL);
1728 if (new_arr) {
2e0fef85 1729 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1730 old_arr = psli->iocbq_lookup;
1731 if (new_len <= psli->iocbq_lookup_len) {
1732 /* highly unprobable case */
1733 kfree(new_arr);
1734 iotag = psli->last_iotag;
1735 if(++iotag < psli->iocbq_lookup_len) {
1736 psli->last_iotag = iotag;
1737 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1738 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1739 iocbq->iotag = iotag;
1740 return iotag;
1741 }
2e0fef85 1742 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1743 return 0;
1744 }
1745 if (psli->iocbq_lookup)
1746 memcpy(new_arr, old_arr,
1747 ((psli->last_iotag + 1) *
311464ec 1748 sizeof (struct lpfc_iocbq *)));
604a3e30
JB
1749 psli->iocbq_lookup = new_arr;
1750 psli->iocbq_lookup_len = new_len;
1751 psli->last_iotag = iotag;
1752 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1753 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1754 iocbq->iotag = iotag;
1755 kfree(old_arr);
1756 return iotag;
1757 }
8f6d98d2 1758 } else
2e0fef85 1759 spin_unlock_irq(&phba->hbalock);
dea3101e 1760
bc73905a 1761 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
1762 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
1763 psli->last_iotag);
dea3101e 1764
604a3e30 1765 return 0;
dea3101e
JB
1766}
1767
e59058c4 1768/**
3621a710 1769 * lpfc_sli_submit_iocb - Submit an iocb to the firmware
e59058c4
JS
1770 * @phba: Pointer to HBA context object.
1771 * @pring: Pointer to driver SLI ring object.
1772 * @iocb: Pointer to iocb slot in the ring.
1773 * @nextiocb: Pointer to driver iocb object which need to be
1774 * posted to firmware.
1775 *
1776 * This function is called with hbalock held to post a new iocb to
1777 * the firmware. This function copies the new iocb to ring iocb slot and
1778 * updates the ring pointers. It adds the new iocb to txcmplq if there is
1779 * a completion call back for this iocb else the function will free the
1780 * iocb object.
1781 **/
dea3101e
JB
1782static void
1783lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1784 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
1785{
1c2ba475 1786 lockdep_assert_held(&phba->hbalock);
dea3101e 1787 /*
604a3e30 1788 * Set up an iotag
dea3101e 1789 */
604a3e30 1790 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 1791
e2a0a9d6 1792
a58cbd52
JS
1793 if (pring->ringno == LPFC_ELS_RING) {
1794 lpfc_debugfs_slow_ring_trc(phba,
1795 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1796 *(((uint32_t *) &nextiocb->iocb) + 4),
1797 *(((uint32_t *) &nextiocb->iocb) + 6),
1798 *(((uint32_t *) &nextiocb->iocb) + 7));
1799 }
1800
dea3101e
JB
1801 /*
1802 * Issue iocb command to adapter
1803 */
92d7f7b0 1804 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB
1805 wmb();
1806 pring->stats.iocb_cmd++;
1807
1808 /*
1809 * If there is no completion routine to call, we can release the
1810 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
1811 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
1812 */
1813 if (nextiocb->iocb_cmpl)
1814 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 1815 else
2e0fef85 1816 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB
1817
1818 /*
1819 * Let the HBA know what IOCB slot will be the next one the
1820 * driver will put a command into.
1821 */
7e56aa25
JS
1822 pring->sli.sli3.cmdidx = pring->sli.sli3.next_cmdidx;
1823 writel(pring->sli.sli3.cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB
1824}
1825
e59058c4 1826/**
3621a710 1827 * lpfc_sli_update_full_ring - Update the chip attention register
e59058c4
JS
1828 * @phba: Pointer to HBA context object.
1829 * @pring: Pointer to driver SLI ring object.
1830 *
1831 * The caller is not required to hold any lock for calling this function.
1832 * This function updates the chip attention bits for the ring to inform firmware
1833 * that there are pending work to be done for this ring and requests an
1834 * interrupt when there is space available in the ring. This function is
1835 * called when the driver is unable to post more iocbs to the ring due
1836 * to unavailability of space in the ring.
1837 **/
dea3101e 1838static void
2e0fef85 1839lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1840{
1841 int ringno = pring->ringno;
1842
1843 pring->flag |= LPFC_CALL_RING_AVAILABLE;
1844
1845 wmb();
1846
1847 /*
1848 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
1849 * The HBA will tell us when an IOCB entry is available.
1850 */
1851 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
1852 readl(phba->CAregaddr); /* flush */
1853
1854 pring->stats.iocb_cmd_full++;
1855}
1856
e59058c4 1857/**
3621a710 1858 * lpfc_sli_update_ring - Update chip attention register
e59058c4
JS
1859 * @phba: Pointer to HBA context object.
1860 * @pring: Pointer to driver SLI ring object.
1861 *
1862 * This function updates the chip attention register bit for the
1863 * given ring to inform HBA that there is more work to be done
1864 * in this ring. The caller is not required to hold any lock.
1865 **/
dea3101e 1866static void
2e0fef85 1867lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1868{
1869 int ringno = pring->ringno;
1870
1871 /*
1872 * Tell the HBA that there is work to do in this ring.
1873 */
34b02dcd
JS
1874 if (!(phba->sli3_options & LPFC_SLI3_CRP_ENABLED)) {
1875 wmb();
1876 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
1877 readl(phba->CAregaddr); /* flush */
1878 }
dea3101e
JB
1879}
1880
e59058c4 1881/**
3621a710 1882 * lpfc_sli_resume_iocb - Process iocbs in the txq
e59058c4
JS
1883 * @phba: Pointer to HBA context object.
1884 * @pring: Pointer to driver SLI ring object.
1885 *
1886 * This function is called with hbalock held to post pending iocbs
1887 * in the txq to the firmware. This function is called when driver
1888 * detects space available in the ring.
1889 **/
dea3101e 1890static void
2e0fef85 1891lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1892{
1893 IOCB_t *iocb;
1894 struct lpfc_iocbq *nextiocb;
1895
1c2ba475
JT
1896 lockdep_assert_held(&phba->hbalock);
1897
dea3101e
JB
1898 /*
1899 * Check to see if:
1900 * (a) there is anything on the txq to send
1901 * (b) link is up
1902 * (c) link attention events can be processed (fcp ring only)
1903 * (d) IOCB processing is not blocked by the outstanding mbox command.
1904 */
0e9bb8d7
JS
1905
1906 if (lpfc_is_link_up(phba) &&
1907 (!list_empty(&pring->txq)) &&
895427bd 1908 (pring->ringno != LPFC_FCP_RING ||
0b727fea 1909 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e
JB
1910
1911 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
1912 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
1913 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
1914
1915 if (iocb)
1916 lpfc_sli_update_ring(phba, pring);
1917 else
1918 lpfc_sli_update_full_ring(phba, pring);
1919 }
1920
1921 return;
1922}
1923
e59058c4 1924/**
3621a710 1925 * lpfc_sli_next_hbq_slot - Get next hbq entry for the HBQ
e59058c4
JS
1926 * @phba: Pointer to HBA context object.
1927 * @hbqno: HBQ number.
1928 *
1929 * This function is called with hbalock held to get the next
1930 * available slot for the given HBQ. If there is free slot
1931 * available for the HBQ it will return pointer to the next available
1932 * HBQ entry else it will return NULL.
1933 **/
a6ababd2 1934static struct lpfc_hbq_entry *
ed957684
JS
1935lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
1936{
1937 struct hbq_s *hbqp = &phba->hbqs[hbqno];
1938
1c2ba475
JT
1939 lockdep_assert_held(&phba->hbalock);
1940
ed957684
JS
1941 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
1942 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
1943 hbqp->next_hbqPutIdx = 0;
1944
1945 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 1946 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS
1947 uint32_t getidx = le32_to_cpu(raw_index);
1948
1949 hbqp->local_hbqGetIdx = getidx;
1950
1951 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
1952 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 1953 LOG_SLI | LOG_VPORT,
e8b62011 1954 "1802 HBQ %d: local_hbqGetIdx "
ed957684 1955 "%u is > than hbqp->entry_count %u\n",
e8b62011 1956 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS
1957 hbqp->entry_count);
1958
1959 phba->link_state = LPFC_HBA_ERROR;
1960 return NULL;
1961 }
1962
1963 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
1964 return NULL;
1965 }
1966
51ef4c26
JS
1967 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
1968 hbqp->hbqPutIdx;
ed957684
JS
1969}
1970
e59058c4 1971/**
3621a710 1972 * lpfc_sli_hbqbuf_free_all - Free all the hbq buffers
e59058c4
JS
1973 * @phba: Pointer to HBA context object.
1974 *
1975 * This function is called with no lock held to free all the
1976 * hbq buffers while uninitializing the SLI interface. It also
1977 * frees the HBQ buffers returned by the firmware but not yet
1978 * processed by the upper layers.
1979 **/
ed957684
JS
1980void
1981lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
1982{
92d7f7b0
JS
1983 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
1984 struct hbq_dmabuf *hbq_buf;
3163f725 1985 unsigned long flags;
51ef4c26 1986 int i, hbq_count;
ed957684 1987
51ef4c26 1988 hbq_count = lpfc_sli_hbq_count();
ed957684 1989 /* Return all memory used by all HBQs */
3163f725 1990 spin_lock_irqsave(&phba->hbalock, flags);
51ef4c26
JS
1991 for (i = 0; i < hbq_count; ++i) {
1992 list_for_each_entry_safe(dmabuf, next_dmabuf,
1993 &phba->hbqs[i].hbq_buffer_list, list) {
1994 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
1995 list_del(&hbq_buf->dbuf.list);
1996 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
1997 }
a8adb832 1998 phba->hbqs[i].buffer_count = 0;
ed957684 1999 }
3163f725
JS
2000
2001 /* Mark the HBQs not in use */
2002 phba->hbq_in_use = 0;
2003 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684
JS
2004}
2005
e59058c4 2006/**
3621a710 2007 * lpfc_sli_hbq_to_firmware - Post the hbq buffer to firmware
e59058c4
JS
2008 * @phba: Pointer to HBA context object.
2009 * @hbqno: HBQ number.
2010 * @hbq_buf: Pointer to HBQ buffer.
2011 *
2012 * This function is called with the hbalock held to post a
2013 * hbq buffer to the firmware. If the function finds an empty
2014 * slot in the HBQ, it will post the buffer. The function will return
2015 * pointer to the hbq entry if it successfully post the buffer
2016 * else it will return NULL.
2017 **/
3772a991 2018static int
ed957684 2019lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 2020 struct hbq_dmabuf *hbq_buf)
3772a991 2021{
1c2ba475 2022 lockdep_assert_held(&phba->hbalock);
3772a991
JS
2023 return phba->lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buf);
2024}
2025
2026/**
2027 * lpfc_sli_hbq_to_firmware_s3 - Post the hbq buffer to SLI3 firmware
2028 * @phba: Pointer to HBA context object.
2029 * @hbqno: HBQ number.
2030 * @hbq_buf: Pointer to HBQ buffer.
2031 *
2032 * This function is called with the hbalock held to post a hbq buffer to the
2033 * firmware. If the function finds an empty slot in the HBQ, it will post the
2034 * buffer and place it on the hbq_buffer_list. The function will return zero if
2035 * it successfully post the buffer else it will return an error.
2036 **/
2037static int
2038lpfc_sli_hbq_to_firmware_s3(struct lpfc_hba *phba, uint32_t hbqno,
2039 struct hbq_dmabuf *hbq_buf)
ed957684
JS
2040{
2041 struct lpfc_hbq_entry *hbqe;
92d7f7b0 2042 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684 2043
1c2ba475 2044 lockdep_assert_held(&phba->hbalock);
ed957684
JS
2045 /* Get next HBQ entry slot to use */
2046 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
2047 if (hbqe) {
2048 struct hbq_s *hbqp = &phba->hbqs[hbqno];
2049
92d7f7b0
JS
2050 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
2051 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
895427bd 2052 hbqe->bde.tus.f.bdeSize = hbq_buf->total_size;
ed957684 2053 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS
2054 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
2055 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
2056 /* Sync SLIM */
ed957684
JS
2057 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
2058 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 2059 /* flush */
ed957684 2060 readl(phba->hbq_put + hbqno);
51ef4c26 2061 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
3772a991
JS
2062 return 0;
2063 } else
2064 return -ENOMEM;
ed957684
JS
2065}
2066
4f774513
JS
2067/**
2068 * lpfc_sli_hbq_to_firmware_s4 - Post the hbq buffer to SLI4 firmware
2069 * @phba: Pointer to HBA context object.
2070 * @hbqno: HBQ number.
2071 * @hbq_buf: Pointer to HBQ buffer.
2072 *
2073 * This function is called with the hbalock held to post an RQE to the SLI4
2074 * firmware. If able to post the RQE to the RQ it will queue the hbq entry to
2075 * the hbq_buffer_list and return zero, otherwise it will return an error.
2076 **/
2077static int
2078lpfc_sli_hbq_to_firmware_s4(struct lpfc_hba *phba, uint32_t hbqno,
2079 struct hbq_dmabuf *hbq_buf)
2080{
2081 int rc;
2082 struct lpfc_rqe hrqe;
2083 struct lpfc_rqe drqe;
895427bd
JS
2084 struct lpfc_queue *hrq;
2085 struct lpfc_queue *drq;
2086
2087 if (hbqno != LPFC_ELS_HBQ)
2088 return 1;
2089 hrq = phba->sli4_hba.hdr_rq;
2090 drq = phba->sli4_hba.dat_rq;
4f774513 2091
1c2ba475 2092 lockdep_assert_held(&phba->hbalock);
4f774513
JS
2093 hrqe.address_lo = putPaddrLow(hbq_buf->hbuf.phys);
2094 hrqe.address_hi = putPaddrHigh(hbq_buf->hbuf.phys);
2095 drqe.address_lo = putPaddrLow(hbq_buf->dbuf.phys);
2096 drqe.address_hi = putPaddrHigh(hbq_buf->dbuf.phys);
895427bd 2097 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
4f774513
JS
2098 if (rc < 0)
2099 return rc;
895427bd 2100 hbq_buf->tag = (rc | (hbqno << 16));
4f774513
JS
2101 list_add_tail(&hbq_buf->dbuf.list, &phba->hbqs[hbqno].hbq_buffer_list);
2102 return 0;
2103}
2104
e59058c4 2105/* HBQ for ELS and CT traffic. */
92d7f7b0
JS
2106static struct lpfc_hbq_init lpfc_els_hbq = {
2107 .rn = 1,
def9c7a9 2108 .entry_count = 256,
92d7f7b0
JS
2109 .mask_count = 0,
2110 .profile = 0,
51ef4c26 2111 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0 2112 .buffer_count = 0,
a257bf90
JS
2113 .init_count = 40,
2114 .add_count = 40,
92d7f7b0 2115};
ed957684 2116
e59058c4 2117/* Array of HBQs */
78b2d852 2118struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0
JS
2119 &lpfc_els_hbq,
2120};
ed957684 2121
e59058c4 2122/**
3621a710 2123 * lpfc_sli_hbqbuf_fill_hbqs - Post more hbq buffers to HBQ
e59058c4
JS
2124 * @phba: Pointer to HBA context object.
2125 * @hbqno: HBQ number.
2126 * @count: Number of HBQ buffers to be posted.
2127 *
d7c255b2
JS
2128 * This function is called with no lock held to post more hbq buffers to the
2129 * given HBQ. The function returns the number of HBQ buffers successfully
2130 * posted.
e59058c4 2131 **/
311464ec 2132static int
92d7f7b0 2133lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 2134{
d7c255b2 2135 uint32_t i, posted = 0;
3163f725 2136 unsigned long flags;
92d7f7b0 2137 struct hbq_dmabuf *hbq_buffer;
d7c255b2 2138 LIST_HEAD(hbq_buf_list);
eafe1df9 2139 if (!phba->hbqs[hbqno].hbq_alloc_buffer)
51ef4c26 2140 return 0;
51ef4c26 2141
d7c255b2
JS
2142 if ((phba->hbqs[hbqno].buffer_count + count) >
2143 lpfc_hbq_defs[hbqno]->entry_count)
2144 count = lpfc_hbq_defs[hbqno]->entry_count -
2145 phba->hbqs[hbqno].buffer_count;
2146 if (!count)
2147 return 0;
2148 /* Allocate HBQ entries */
2149 for (i = 0; i < count; i++) {
2150 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
2151 if (!hbq_buffer)
2152 break;
2153 list_add_tail(&hbq_buffer->dbuf.list, &hbq_buf_list);
2154 }
3163f725
JS
2155 /* Check whether HBQ is still in use */
2156 spin_lock_irqsave(&phba->hbalock, flags);
eafe1df9 2157 if (!phba->hbq_in_use)
d7c255b2
JS
2158 goto err;
2159 while (!list_empty(&hbq_buf_list)) {
2160 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2161 dbuf.list);
2162 hbq_buffer->tag = (phba->hbqs[hbqno].buffer_count |
2163 (hbqno << 16));
3772a991 2164 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
a8adb832 2165 phba->hbqs[hbqno].buffer_count++;
d7c255b2
JS
2166 posted++;
2167 } else
51ef4c26 2168 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684 2169 }
3163f725 2170 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2171 return posted;
2172err:
eafe1df9 2173 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2174 while (!list_empty(&hbq_buf_list)) {
2175 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2176 dbuf.list);
2177 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
2178 }
2179 return 0;
ed957684
JS
2180}
2181
e59058c4 2182/**
3621a710 2183 * lpfc_sli_hbqbuf_add_hbqs - Post more HBQ buffers to firmware
e59058c4
JS
2184 * @phba: Pointer to HBA context object.
2185 * @qno: HBQ number.
2186 *
2187 * This function posts more buffers to the HBQ. This function
d7c255b2
JS
2188 * is called with no lock held. The function returns the number of HBQ entries
2189 * successfully allocated.
e59058c4 2190 **/
92d7f7b0
JS
2191int
2192lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 2193{
def9c7a9
JS
2194 if (phba->sli_rev == LPFC_SLI_REV4)
2195 return 0;
2196 else
2197 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2198 lpfc_hbq_defs[qno]->add_count);
92d7f7b0 2199}
ed957684 2200
e59058c4 2201/**
3621a710 2202 * lpfc_sli_hbqbuf_init_hbqs - Post initial buffers to the HBQ
e59058c4
JS
2203 * @phba: Pointer to HBA context object.
2204 * @qno: HBQ queue number.
2205 *
2206 * This function is called from SLI initialization code path with
2207 * no lock held to post initial HBQ buffers to firmware. The
d7c255b2 2208 * function returns the number of HBQ entries successfully allocated.
e59058c4 2209 **/
a6ababd2 2210static int
92d7f7b0
JS
2211lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
2212{
def9c7a9
JS
2213 if (phba->sli_rev == LPFC_SLI_REV4)
2214 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
73d91e50 2215 lpfc_hbq_defs[qno]->entry_count);
def9c7a9
JS
2216 else
2217 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2218 lpfc_hbq_defs[qno]->init_count);
ed957684
JS
2219}
2220
3772a991
JS
2221/**
2222 * lpfc_sli_hbqbuf_get - Remove the first hbq off of an hbq list
2223 * @phba: Pointer to HBA context object.
2224 * @hbqno: HBQ number.
2225 *
2226 * This function removes the first hbq buffer on an hbq list and returns a
2227 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2228 **/
2229static struct hbq_dmabuf *
2230lpfc_sli_hbqbuf_get(struct list_head *rb_list)
2231{
2232 struct lpfc_dmabuf *d_buf;
2233
2234 list_remove_head(rb_list, d_buf, struct lpfc_dmabuf, list);
2235 if (!d_buf)
2236 return NULL;
2237 return container_of(d_buf, struct hbq_dmabuf, dbuf);
2238}
2239
2d7dbc4c
JS
2240/**
2241 * lpfc_sli_rqbuf_get - Remove the first dma buffer off of an RQ list
2242 * @phba: Pointer to HBA context object.
2243 * @hbqno: HBQ number.
2244 *
2245 * This function removes the first RQ buffer on an RQ buffer list and returns a
2246 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2247 **/
2248static struct rqb_dmabuf *
2249lpfc_sli_rqbuf_get(struct lpfc_hba *phba, struct lpfc_queue *hrq)
2250{
2251 struct lpfc_dmabuf *h_buf;
2252 struct lpfc_rqb *rqbp;
2253
2254 rqbp = hrq->rqbp;
2255 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
2256 struct lpfc_dmabuf, list);
2257 if (!h_buf)
2258 return NULL;
2259 rqbp->buffer_count--;
2260 return container_of(h_buf, struct rqb_dmabuf, hbuf);
2261}
2262
e59058c4 2263/**
3621a710 2264 * lpfc_sli_hbqbuf_find - Find the hbq buffer associated with a tag
e59058c4
JS
2265 * @phba: Pointer to HBA context object.
2266 * @tag: Tag of the hbq buffer.
2267 *
71892418
SH
2268 * This function searches for the hbq buffer associated with the given tag in
2269 * the hbq buffer list. If it finds the hbq buffer, it returns the hbq_buffer
2270 * otherwise it returns NULL.
e59058c4 2271 **/
a6ababd2 2272static struct hbq_dmabuf *
92d7f7b0 2273lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 2274{
92d7f7b0
JS
2275 struct lpfc_dmabuf *d_buf;
2276 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS
2277 uint32_t hbqno;
2278
2279 hbqno = tag >> 16;
a0a74e45 2280 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 2281 return NULL;
ed957684 2282
3772a991 2283 spin_lock_irq(&phba->hbalock);
51ef4c26 2284 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 2285 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 2286 if (hbq_buf->tag == tag) {
3772a991 2287 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2288 return hbq_buf;
ed957684
JS
2289 }
2290 }
3772a991 2291 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2292 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 2293 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 2294 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 2295 return NULL;
ed957684
JS
2296}
2297
e59058c4 2298/**
3621a710 2299 * lpfc_sli_free_hbq - Give back the hbq buffer to firmware
e59058c4
JS
2300 * @phba: Pointer to HBA context object.
2301 * @hbq_buffer: Pointer to HBQ buffer.
2302 *
2303 * This function is called with hbalock. This function gives back
2304 * the hbq buffer to firmware. If the HBQ does not have space to
2305 * post the buffer, it will free the buffer.
2306 **/
ed957684 2307void
51ef4c26 2308lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS
2309{
2310 uint32_t hbqno;
2311
51ef4c26
JS
2312 if (hbq_buffer) {
2313 hbqno = hbq_buffer->tag >> 16;
3772a991 2314 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
51ef4c26 2315 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS
2316 }
2317}
2318
e59058c4 2319/**
3621a710 2320 * lpfc_sli_chk_mbx_command - Check if the mailbox is a legitimate mailbox
e59058c4
JS
2321 * @mbxCommand: mailbox command code.
2322 *
2323 * This function is called by the mailbox event handler function to verify
2324 * that the completed mailbox command is a legitimate mailbox command. If the
2325 * completed mailbox is not known to the function, it will return MBX_SHUTDOWN
2326 * and the mailbox event handler will take the HBA offline.
2327 **/
dea3101e
JB
2328static int
2329lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
2330{
2331 uint8_t ret;
2332
2333 switch (mbxCommand) {
2334 case MBX_LOAD_SM:
2335 case MBX_READ_NV:
2336 case MBX_WRITE_NV:
a8adb832 2337 case MBX_WRITE_VPARMS:
dea3101e
JB
2338 case MBX_RUN_BIU_DIAG:
2339 case MBX_INIT_LINK:
2340 case MBX_DOWN_LINK:
2341 case MBX_CONFIG_LINK:
2342 case MBX_CONFIG_RING:
2343 case MBX_RESET_RING:
2344 case MBX_READ_CONFIG:
2345 case MBX_READ_RCONFIG:
2346 case MBX_READ_SPARM:
2347 case MBX_READ_STATUS:
2348 case MBX_READ_RPI:
2349 case MBX_READ_XRI:
2350 case MBX_READ_REV:
2351 case MBX_READ_LNK_STAT:
2352 case MBX_REG_LOGIN:
2353 case MBX_UNREG_LOGIN:
dea3101e
JB
2354 case MBX_CLEAR_LA:
2355 case MBX_DUMP_MEMORY:
2356 case MBX_DUMP_CONTEXT:
2357 case MBX_RUN_DIAGS:
2358 case MBX_RESTART:
2359 case MBX_UPDATE_CFG:
2360 case MBX_DOWN_LOAD:
2361 case MBX_DEL_LD_ENTRY:
2362 case MBX_RUN_PROGRAM:
2363 case MBX_SET_MASK:
09372820 2364 case MBX_SET_VARIABLE:
dea3101e 2365 case MBX_UNREG_D_ID:
41415862 2366 case MBX_KILL_BOARD:
dea3101e 2367 case MBX_CONFIG_FARP:
41415862 2368 case MBX_BEACON:
dea3101e
JB
2369 case MBX_LOAD_AREA:
2370 case MBX_RUN_BIU_DIAG64:
2371 case MBX_CONFIG_PORT:
2372 case MBX_READ_SPARM64:
2373 case MBX_READ_RPI64:
2374 case MBX_REG_LOGIN64:
76a95d75 2375 case MBX_READ_TOPOLOGY:
09372820 2376 case MBX_WRITE_WWN:
dea3101e
JB
2377 case MBX_SET_DEBUG:
2378 case MBX_LOAD_EXP_ROM:
57127f15 2379 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS
2380 case MBX_REG_VPI:
2381 case MBX_UNREG_VPI:
858c9f6c 2382 case MBX_HEARTBEAT:
84774a4d
JS
2383 case MBX_PORT_CAPABILITIES:
2384 case MBX_PORT_IOV_CONTROL:
04c68496
JS
2385 case MBX_SLI4_CONFIG:
2386 case MBX_SLI4_REQ_FTRS:
2387 case MBX_REG_FCFI:
2388 case MBX_UNREG_FCFI:
2389 case MBX_REG_VFI:
2390 case MBX_UNREG_VFI:
2391 case MBX_INIT_VPI:
2392 case MBX_INIT_VFI:
2393 case MBX_RESUME_RPI:
c7495937
JS
2394 case MBX_READ_EVENT_LOG_STATUS:
2395 case MBX_READ_EVENT_LOG:
dcf2a4e0
JS
2396 case MBX_SECURITY_MGMT:
2397 case MBX_AUTH_PORT:
940eb687 2398 case MBX_ACCESS_VDATA:
dea3101e
JB
2399 ret = mbxCommand;
2400 break;
2401 default:
2402 ret = MBX_SHUTDOWN;
2403 break;
2404 }
2e0fef85 2405 return ret;
dea3101e 2406}
e59058c4
JS
2407
2408/**
3621a710 2409 * lpfc_sli_wake_mbox_wait - lpfc_sli_issue_mbox_wait mbox completion handler
e59058c4
JS
2410 * @phba: Pointer to HBA context object.
2411 * @pmboxq: Pointer to mailbox command.
2412 *
2413 * This is completion handler function for mailbox commands issued from
2414 * lpfc_sli_issue_mbox_wait function. This function is called by the
2415 * mailbox event handler function with no lock held. This function
2416 * will wake up thread waiting on the wait queue pointed by context1
2417 * of the mailbox.
2418 **/
04c68496 2419void
2e0fef85 2420lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e 2421{
858c9f6c 2422 unsigned long drvr_flag;
e29d74f8 2423 struct completion *pmbox_done;
dea3101e
JB
2424
2425 /*
e29d74f8 2426 * If pmbox_done is empty, the driver thread gave up waiting and
dea3101e
JB
2427 * continued running.
2428 */
7054a606 2429 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 2430 spin_lock_irqsave(&phba->hbalock, drvr_flag);
e29d74f8
JS
2431 pmbox_done = (struct completion *)pmboxq->context3;
2432 if (pmbox_done)
2433 complete(pmbox_done);
858c9f6c 2434 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
2435 return;
2436}
2437
e59058c4
JS
2438
2439/**
3621a710 2440 * lpfc_sli_def_mbox_cmpl - Default mailbox completion handler
e59058c4
JS
2441 * @phba: Pointer to HBA context object.
2442 * @pmb: Pointer to mailbox object.
2443 *
2444 * This function is the default mailbox completion handler. It
2445 * frees the memory resources associated with the completed mailbox
2446 * command. If the completed command is a REG_LOGIN mailbox command,
2447 * this function will issue a UREG_LOGIN to re-claim the RPI.
2448 **/
dea3101e 2449void
2e0fef85 2450lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e 2451{
d439d286 2452 struct lpfc_vport *vport = pmb->vport;
dea3101e 2453 struct lpfc_dmabuf *mp;
d439d286 2454 struct lpfc_nodelist *ndlp;
5af5eee7 2455 struct Scsi_Host *shost;
04c68496 2456 uint16_t rpi, vpi;
7054a606
JS
2457 int rc;
2458
dea3101e 2459 mp = (struct lpfc_dmabuf *) (pmb->context1);
7054a606 2460
dea3101e
JB
2461 if (mp) {
2462 lpfc_mbuf_free(phba, mp->virt, mp->phys);
2463 kfree(mp);
2464 }
7054a606
JS
2465
2466 /*
2467 * If a REG_LOGIN succeeded after node is destroyed or node
2468 * is in re-discovery driver need to cleanup the RPI.
2469 */
2e0fef85 2470 if (!(phba->pport->load_flag & FC_UNLOADING) &&
04c68496
JS
2471 pmb->u.mb.mbxCommand == MBX_REG_LOGIN64 &&
2472 !pmb->u.mb.mbxStatus) {
2473 rpi = pmb->u.mb.un.varWords[0];
6d368e53 2474 vpi = pmb->u.mb.un.varRegLogin.vpi;
04c68496 2475 lpfc_unreg_login(phba, vpi, rpi, pmb);
de96e9c5 2476 pmb->vport = vport;
92d7f7b0 2477 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS
2478 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2479 if (rc != MBX_NOT_FINISHED)
2480 return;
2481 }
2482
695a814e
JS
2483 if ((pmb->u.mb.mbxCommand == MBX_REG_VPI) &&
2484 !(phba->pport->load_flag & FC_UNLOADING) &&
2485 !pmb->u.mb.mbxStatus) {
5af5eee7
JS
2486 shost = lpfc_shost_from_vport(vport);
2487 spin_lock_irq(shost->host_lock);
2488 vport->vpi_state |= LPFC_VPI_REGISTERED;
2489 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI;
2490 spin_unlock_irq(shost->host_lock);
695a814e
JS
2491 }
2492
d439d286
JS
2493 if (pmb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
2494 ndlp = (struct lpfc_nodelist *)pmb->context2;
2495 lpfc_nlp_put(ndlp);
2496 pmb->context2 = NULL;
2497 }
2498
dcf2a4e0
JS
2499 /* Check security permission status on INIT_LINK mailbox command */
2500 if ((pmb->u.mb.mbxCommand == MBX_INIT_LINK) &&
2501 (pmb->u.mb.mbxStatus == MBXERR_SEC_NO_PERMISSION))
2502 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
2503 "2860 SLI authentication is required "
2504 "for INIT_LINK but has not done yet\n");
2505
04c68496
JS
2506 if (bf_get(lpfc_mqe_command, &pmb->u.mqe) == MBX_SLI4_CONFIG)
2507 lpfc_sli4_mbox_cmd_free(phba, pmb);
2508 else
2509 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2510}
be6bb941
JS
2511 /**
2512 * lpfc_sli4_unreg_rpi_cmpl_clr - mailbox completion handler
2513 * @phba: Pointer to HBA context object.
2514 * @pmb: Pointer to mailbox object.
2515 *
2516 * This function is the unreg rpi mailbox completion handler. It
2517 * frees the memory resources associated with the completed mailbox
2518 * command. An additional refrenece is put on the ndlp to prevent
2519 * lpfc_nlp_release from freeing the rpi bit in the bitmask before
2520 * the unreg mailbox command completes, this routine puts the
2521 * reference back.
2522 *
2523 **/
2524void
2525lpfc_sli4_unreg_rpi_cmpl_clr(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2526{
2527 struct lpfc_vport *vport = pmb->vport;
2528 struct lpfc_nodelist *ndlp;
2529
2530 ndlp = pmb->context1;
2531 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2532 if (phba->sli_rev == LPFC_SLI_REV4 &&
2533 (bf_get(lpfc_sli_intf_if_type,
27d6ac0a 2534 &phba->sli4_hba.sli_intf) >=
be6bb941
JS
2535 LPFC_SLI_INTF_IF_TYPE_2)) {
2536 if (ndlp) {
2537 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
2538 "0010 UNREG_LOGIN vpi:%x "
2539 "rpi:%x DID:%x map:%x %p\n",
2540 vport->vpi, ndlp->nlp_rpi,
2541 ndlp->nlp_DID,
2542 ndlp->nlp_usg_map, ndlp);
7c5e518c 2543 ndlp->nlp_flag &= ~NLP_LOGO_ACC;
be6bb941
JS
2544 lpfc_nlp_put(ndlp);
2545 }
2546 }
2547 }
2548
2549 mempool_free(pmb, phba->mbox_mem_pool);
2550}
dea3101e 2551
e59058c4 2552/**
3621a710 2553 * lpfc_sli_handle_mb_event - Handle mailbox completions from firmware
e59058c4
JS
2554 * @phba: Pointer to HBA context object.
2555 *
2556 * This function is called with no lock held. This function processes all
2557 * the completed mailbox commands and gives it to upper layers. The interrupt
2558 * service routine processes mailbox completion interrupt and adds completed
2559 * mailbox commands to the mboxq_cmpl queue and signals the worker thread.
2560 * Worker thread call lpfc_sli_handle_mb_event, which will return the
2561 * completed mailbox commands in mboxq_cmpl queue to the upper layers. This
2562 * function returns the mailbox commands to the upper layer by calling the
2563 * completion handler function of each mailbox.
2564 **/
dea3101e 2565int
2e0fef85 2566lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 2567{
92d7f7b0 2568 MAILBOX_t *pmbox;
dea3101e 2569 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS
2570 int rc;
2571 LIST_HEAD(cmplq);
dea3101e
JB
2572
2573 phba->sli.slistat.mbox_event++;
2574
92d7f7b0
JS
2575 /* Get all completed mailboxe buffers into the cmplq */
2576 spin_lock_irq(&phba->hbalock);
2577 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
2578 spin_unlock_irq(&phba->hbalock);
dea3101e 2579
92d7f7b0
JS
2580 /* Get a Mailbox buffer to setup mailbox commands for callback */
2581 do {
2582 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
2583 if (pmb == NULL)
2584 break;
2e0fef85 2585
04c68496 2586 pmbox = &pmb->u.mb;
dea3101e 2587
858c9f6c
JS
2588 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
2589 if (pmb->vport) {
2590 lpfc_debugfs_disc_trc(pmb->vport,
2591 LPFC_DISC_TRC_MBOX_VPORT,
2592 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
2593 (uint32_t)pmbox->mbxCommand,
2594 pmbox->un.varWords[0],
2595 pmbox->un.varWords[1]);
2596 }
2597 else {
2598 lpfc_debugfs_disc_trc(phba->pport,
2599 LPFC_DISC_TRC_MBOX,
2600 "MBOX cmpl: cmd:x%x mb:x%x x%x",
2601 (uint32_t)pmbox->mbxCommand,
2602 pmbox->un.varWords[0],
2603 pmbox->un.varWords[1]);
2604 }
2605 }
2606
dea3101e
JB
2607 /*
2608 * It is a fatal error if unknown mbox command completion.
2609 */
2610 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
2611 MBX_SHUTDOWN) {
af901ca1 2612 /* Unknown mailbox command compl */
92d7f7b0 2613 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2614 "(%d):0323 Unknown Mailbox command "
a183a15f 2615 "x%x (x%x/x%x) Cmpl\n",
92d7f7b0 2616 pmb->vport ? pmb->vport->vpi : 0,
04c68496 2617 pmbox->mbxCommand,
a183a15f
JS
2618 lpfc_sli_config_mbox_subsys_get(phba,
2619 pmb),
2620 lpfc_sli_config_mbox_opcode_get(phba,
2621 pmb));
2e0fef85 2622 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
2623 phba->work_hs = HS_FFER3;
2624 lpfc_handle_eratt(phba);
92d7f7b0 2625 continue;
dea3101e
JB
2626 }
2627
dea3101e
JB
2628 if (pmbox->mbxStatus) {
2629 phba->sli.slistat.mbox_stat_err++;
2630 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
2631 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0 2632 lpfc_printf_log(phba, KERN_INFO,
a183a15f
JS
2633 LOG_MBOX | LOG_SLI,
2634 "(%d):0305 Mbox cmd cmpl "
2635 "error - RETRYing Data: x%x "
2636 "(x%x/x%x) x%x x%x x%x\n",
2637 pmb->vport ? pmb->vport->vpi : 0,
2638 pmbox->mbxCommand,
2639 lpfc_sli_config_mbox_subsys_get(phba,
2640 pmb),
2641 lpfc_sli_config_mbox_opcode_get(phba,
2642 pmb),
2643 pmbox->mbxStatus,
2644 pmbox->un.varWords[0],
2645 pmb->vport->port_state);
dea3101e
JB
2646 pmbox->mbxStatus = 0;
2647 pmbox->mbxOwner = OWN_HOST;
dea3101e 2648 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
04c68496 2649 if (rc != MBX_NOT_FINISHED)
92d7f7b0 2650 continue;
dea3101e
JB
2651 }
2652 }
2653
2654 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 2655 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 2656 "(%d):0307 Mailbox cmd x%x (x%x/x%x) Cmpl x%p "
e74c03c8
JS
2657 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
2658 "x%x x%x x%x\n",
92d7f7b0 2659 pmb->vport ? pmb->vport->vpi : 0,
dea3101e 2660 pmbox->mbxCommand,
a183a15f
JS
2661 lpfc_sli_config_mbox_subsys_get(phba, pmb),
2662 lpfc_sli_config_mbox_opcode_get(phba, pmb),
dea3101e
JB
2663 pmb->mbox_cmpl,
2664 *((uint32_t *) pmbox),
2665 pmbox->un.varWords[0],
2666 pmbox->un.varWords[1],
2667 pmbox->un.varWords[2],
2668 pmbox->un.varWords[3],
2669 pmbox->un.varWords[4],
2670 pmbox->un.varWords[5],
2671 pmbox->un.varWords[6],
e74c03c8
JS
2672 pmbox->un.varWords[7],
2673 pmbox->un.varWords[8],
2674 pmbox->un.varWords[9],
2675 pmbox->un.varWords[10]);
dea3101e 2676
92d7f7b0 2677 if (pmb->mbox_cmpl)
dea3101e 2678 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS
2679 } while (1);
2680 return 0;
2681}
dea3101e 2682
e59058c4 2683/**
3621a710 2684 * lpfc_sli_get_buff - Get the buffer associated with the buffer tag
e59058c4
JS
2685 * @phba: Pointer to HBA context object.
2686 * @pring: Pointer to driver SLI ring object.
2687 * @tag: buffer tag.
2688 *
2689 * This function is called with no lock held. When QUE_BUFTAG_BIT bit
2690 * is set in the tag the buffer is posted for a particular exchange,
2691 * the function will return the buffer without replacing the buffer.
2692 * If the buffer is for unsolicited ELS or CT traffic, this function
2693 * returns the buffer and also posts another buffer to the firmware.
2694 **/
76bb24ef
JS
2695static struct lpfc_dmabuf *
2696lpfc_sli_get_buff(struct lpfc_hba *phba,
9f1e1b50
JS
2697 struct lpfc_sli_ring *pring,
2698 uint32_t tag)
76bb24ef 2699{
9f1e1b50
JS
2700 struct hbq_dmabuf *hbq_entry;
2701
76bb24ef
JS
2702 if (tag & QUE_BUFTAG_BIT)
2703 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
9f1e1b50
JS
2704 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
2705 if (!hbq_entry)
2706 return NULL;
2707 return &hbq_entry->dbuf;
76bb24ef 2708}
57127f15 2709
3772a991
JS
2710/**
2711 * lpfc_complete_unsol_iocb - Complete an unsolicited sequence
2712 * @phba: Pointer to HBA context object.
2713 * @pring: Pointer to driver SLI ring object.
2714 * @saveq: Pointer to the iocbq struct representing the sequence starting frame.
2715 * @fch_r_ctl: the r_ctl for the first frame of the sequence.
2716 * @fch_type: the type for the first frame of the sequence.
2717 *
2718 * This function is called with no lock held. This function uses the r_ctl and
2719 * type of the received sequence to find the correct callback function to call
2720 * to process the sequence.
2721 **/
2722static int
2723lpfc_complete_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2724 struct lpfc_iocbq *saveq, uint32_t fch_r_ctl,
2725 uint32_t fch_type)
2726{
2727 int i;
2728
f358dd0c
JS
2729 switch (fch_type) {
2730 case FC_TYPE_NVME:
d613b6a7 2731 lpfc_nvmet_unsol_ls_event(phba, pring, saveq);
f358dd0c
JS
2732 return 1;
2733 default:
2734 break;
2735 }
2736
3772a991
JS
2737 /* unSolicited Responses */
2738 if (pring->prt[0].profile) {
2739 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
2740 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
2741 saveq);
2742 return 1;
2743 }
2744 /* We must search, based on rctl / type
2745 for the right routine */
2746 for (i = 0; i < pring->num_mask; i++) {
2747 if ((pring->prt[i].rctl == fch_r_ctl) &&
2748 (pring->prt[i].type == fch_type)) {
2749 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
2750 (pring->prt[i].lpfc_sli_rcv_unsol_event)
2751 (phba, pring, saveq);
2752 return 1;
2753 }
2754 }
2755 return 0;
2756}
e59058c4
JS
2757
2758/**
3621a710 2759 * lpfc_sli_process_unsol_iocb - Unsolicited iocb handler
e59058c4
JS
2760 * @phba: Pointer to HBA context object.
2761 * @pring: Pointer to driver SLI ring object.
2762 * @saveq: Pointer to the unsolicited iocb.
2763 *
2764 * This function is called with no lock held by the ring event handler
2765 * when there is an unsolicited iocb posted to the response ring by the
2766 * firmware. This function gets the buffer associated with the iocbs
2767 * and calls the event handler for the ring. This function handles both
2768 * qring buffers and hbq buffers.
2769 * When the function returns 1 the caller can free the iocb object otherwise
2770 * upper layer functions will free the iocb objects.
2771 **/
dea3101e
JB
2772static int
2773lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2774 struct lpfc_iocbq *saveq)
2775{
2776 IOCB_t * irsp;
2777 WORD5 * w5p;
2778 uint32_t Rctl, Type;
76bb24ef 2779 struct lpfc_iocbq *iocbq;
3163f725 2780 struct lpfc_dmabuf *dmzbuf;
dea3101e 2781
dea3101e 2782 irsp = &(saveq->iocb);
57127f15
JS
2783
2784 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
2785 if (pring->lpfc_sli_rcv_async_status)
2786 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
2787 else
2788 lpfc_printf_log(phba,
2789 KERN_WARNING,
2790 LOG_SLI,
2791 "0316 Ring %d handler: unexpected "
2792 "ASYNC_STATUS iocb received evt_code "
2793 "0x%x\n",
2794 pring->ringno,
2795 irsp->un.asyncstat.evt_code);
2796 return 1;
2797 }
2798
3163f725
JS
2799 if ((irsp->ulpCommand == CMD_IOCB_RET_XRI64_CX) &&
2800 (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)) {
2801 if (irsp->ulpBdeCount > 0) {
2802 dmzbuf = lpfc_sli_get_buff(phba, pring,
2803 irsp->un.ulpWord[3]);
2804 lpfc_in_buf_free(phba, dmzbuf);
2805 }
2806
2807 if (irsp->ulpBdeCount > 1) {
2808 dmzbuf = lpfc_sli_get_buff(phba, pring,
2809 irsp->unsli3.sli3Words[3]);
2810 lpfc_in_buf_free(phba, dmzbuf);
2811 }
2812
2813 if (irsp->ulpBdeCount > 2) {
2814 dmzbuf = lpfc_sli_get_buff(phba, pring,
2815 irsp->unsli3.sli3Words[7]);
2816 lpfc_in_buf_free(phba, dmzbuf);
2817 }
2818
2819 return 1;
2820 }
2821
92d7f7b0 2822 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS
2823 if (irsp->ulpBdeCount != 0) {
2824 saveq->context2 = lpfc_sli_get_buff(phba, pring,
2825 irsp->un.ulpWord[3]);
2826 if (!saveq->context2)
2827 lpfc_printf_log(phba,
2828 KERN_ERR,
2829 LOG_SLI,
2830 "0341 Ring %d Cannot find buffer for "
2831 "an unsolicited iocb. tag 0x%x\n",
2832 pring->ringno,
2833 irsp->un.ulpWord[3]);
76bb24ef
JS
2834 }
2835 if (irsp->ulpBdeCount == 2) {
2836 saveq->context3 = lpfc_sli_get_buff(phba, pring,
2837 irsp->unsli3.sli3Words[7]);
2838 if (!saveq->context3)
2839 lpfc_printf_log(phba,
2840 KERN_ERR,
2841 LOG_SLI,
2842 "0342 Ring %d Cannot find buffer for an"
2843 " unsolicited iocb. tag 0x%x\n",
2844 pring->ringno,
2845 irsp->unsli3.sli3Words[7]);
2846 }
2847 list_for_each_entry(iocbq, &saveq->list, list) {
76bb24ef 2848 irsp = &(iocbq->iocb);
76bb24ef
JS
2849 if (irsp->ulpBdeCount != 0) {
2850 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
2851 irsp->un.ulpWord[3]);
9c2face6 2852 if (!iocbq->context2)
76bb24ef
JS
2853 lpfc_printf_log(phba,
2854 KERN_ERR,
2855 LOG_SLI,
2856 "0343 Ring %d Cannot find "
2857 "buffer for an unsolicited iocb"
2858 ". tag 0x%x\n", pring->ringno,
92d7f7b0 2859 irsp->un.ulpWord[3]);
76bb24ef
JS
2860 }
2861 if (irsp->ulpBdeCount == 2) {
2862 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 2863 irsp->unsli3.sli3Words[7]);
9c2face6 2864 if (!iocbq->context3)
76bb24ef
JS
2865 lpfc_printf_log(phba,
2866 KERN_ERR,
2867 LOG_SLI,
2868 "0344 Ring %d Cannot find "
2869 "buffer for an unsolicited "
2870 "iocb. tag 0x%x\n",
2871 pring->ringno,
2872 irsp->unsli3.sli3Words[7]);
2873 }
2874 }
92d7f7b0 2875 }
9c2face6
JS
2876 if (irsp->ulpBdeCount != 0 &&
2877 (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
2878 irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
2879 int found = 0;
2880
2881 /* search continue save q for same XRI */
2882 list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
7851fe2c
JS
2883 if (iocbq->iocb.unsli3.rcvsli3.ox_id ==
2884 saveq->iocb.unsli3.rcvsli3.ox_id) {
9c2face6
JS
2885 list_add_tail(&saveq->list, &iocbq->list);
2886 found = 1;
2887 break;
2888 }
2889 }
2890 if (!found)
2891 list_add_tail(&saveq->clist,
2892 &pring->iocb_continue_saveq);
2893 if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
2894 list_del_init(&iocbq->clist);
2895 saveq = iocbq;
2896 irsp = &(saveq->iocb);
2897 } else
2898 return 0;
2899 }
2900 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
2901 (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
2902 (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
6a9c52cf
JS
2903 Rctl = FC_RCTL_ELS_REQ;
2904 Type = FC_TYPE_ELS;
9c2face6
JS
2905 } else {
2906 w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
2907 Rctl = w5p->hcsw.Rctl;
2908 Type = w5p->hcsw.Type;
2909
2910 /* Firmware Workaround */
2911 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
2912 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
2913 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
6a9c52cf
JS
2914 Rctl = FC_RCTL_ELS_REQ;
2915 Type = FC_TYPE_ELS;
9c2face6
JS
2916 w5p->hcsw.Rctl = Rctl;
2917 w5p->hcsw.Type = Type;
2918 }
2919 }
92d7f7b0 2920
3772a991 2921 if (!lpfc_complete_unsol_iocb(phba, pring, saveq, Rctl, Type))
92d7f7b0 2922 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 2923 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 2924 "Type x%x received\n",
e8b62011 2925 pring->ringno, Rctl, Type);
3772a991 2926
92d7f7b0 2927 return 1;
dea3101e
JB
2928}
2929
e59058c4 2930/**
3621a710 2931 * lpfc_sli_iocbq_lookup - Find command iocb for the given response iocb
e59058c4
JS
2932 * @phba: Pointer to HBA context object.
2933 * @pring: Pointer to driver SLI ring object.
2934 * @prspiocb: Pointer to response iocb object.
2935 *
2936 * This function looks up the iocb_lookup table to get the command iocb
2937 * corresponding to the given response iocb using the iotag of the
341b2aa8
DK
2938 * response iocb. This function is called with the hbalock held
2939 * for sli3 devices or the ring_lock for sli4 devices.
e59058c4
JS
2940 * This function returns the command iocb object if it finds the command
2941 * iocb else returns NULL.
2942 **/
dea3101e 2943static struct lpfc_iocbq *
2e0fef85
JS
2944lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
2945 struct lpfc_sli_ring *pring,
2946 struct lpfc_iocbq *prspiocb)
dea3101e 2947{
dea3101e
JB
2948 struct lpfc_iocbq *cmd_iocb = NULL;
2949 uint16_t iotag;
1c2ba475 2950 lockdep_assert_held(&phba->hbalock);
dea3101e 2951
604a3e30
JB
2952 iotag = prspiocb->iocb.ulpIoTag;
2953
2954 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
2955 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6 2956 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
89533e9b
JS
2957 /* remove from txcmpl queue list */
2958 list_del_init(&cmd_iocb->list);
4f2e66c6 2959 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
89533e9b 2960 return cmd_iocb;
2a9bf3d0 2961 }
dea3101e
JB
2962 }
2963
dea3101e 2964 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
89533e9b 2965 "0317 iotag x%x is out of "
604a3e30 2966 "range: max iotag x%x wd0 x%x\n",
e8b62011 2967 iotag, phba->sli.last_iotag,
604a3e30 2968 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB
2969 return NULL;
2970}
2971
3772a991
JS
2972/**
2973 * lpfc_sli_iocbq_lookup_by_tag - Find command iocb for the iotag
2974 * @phba: Pointer to HBA context object.
2975 * @pring: Pointer to driver SLI ring object.
2976 * @iotag: IOCB tag.
2977 *
2978 * This function looks up the iocb_lookup table to get the command iocb
2979 * corresponding to the given iotag. This function is called with the
2980 * hbalock held.
2981 * This function returns the command iocb object if it finds the command
2982 * iocb else returns NULL.
2983 **/
2984static struct lpfc_iocbq *
2985lpfc_sli_iocbq_lookup_by_tag(struct lpfc_hba *phba,
2986 struct lpfc_sli_ring *pring, uint16_t iotag)
2987{
895427bd 2988 struct lpfc_iocbq *cmd_iocb = NULL;
3772a991 2989
1c2ba475 2990 lockdep_assert_held(&phba->hbalock);
3772a991
JS
2991 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
2992 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6
JS
2993 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
2994 /* remove from txcmpl queue list */
2995 list_del_init(&cmd_iocb->list);
2996 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
4f2e66c6 2997 return cmd_iocb;
2a9bf3d0 2998 }
3772a991 2999 }
89533e9b 3000
3772a991 3001 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd
JS
3002 "0372 iotag x%x lookup error: max iotag (x%x) "
3003 "iocb_flag x%x\n",
3004 iotag, phba->sli.last_iotag,
3005 cmd_iocb ? cmd_iocb->iocb_flag : 0xffff);
3772a991
JS
3006 return NULL;
3007}
3008
e59058c4 3009/**
3621a710 3010 * lpfc_sli_process_sol_iocb - process solicited iocb completion
e59058c4
JS
3011 * @phba: Pointer to HBA context object.
3012 * @pring: Pointer to driver SLI ring object.
3013 * @saveq: Pointer to the response iocb to be processed.
3014 *
3015 * This function is called by the ring event handler for non-fcp
3016 * rings when there is a new response iocb in the response ring.
3017 * The caller is not required to hold any locks. This function
3018 * gets the command iocb associated with the response iocb and
3019 * calls the completion handler for the command iocb. If there
3020 * is no completion handler, the function will free the resources
3021 * associated with command iocb. If the response iocb is for
3022 * an already aborted command iocb, the status of the completion
3023 * is changed to IOSTAT_LOCAL_REJECT/IOERR_SLI_ABORTED.
3024 * This function always returns 1.
3025 **/
dea3101e 3026static int
2e0fef85 3027lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB
3028 struct lpfc_iocbq *saveq)
3029{
2e0fef85 3030 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB
3031 int rc = 1;
3032 unsigned long iflag;
3033
3034 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
341b2aa8
DK
3035 if (phba->sli_rev == LPFC_SLI_REV4)
3036 spin_lock_irqsave(&pring->ring_lock, iflag);
3037 else
3038 spin_lock_irqsave(&phba->hbalock, iflag);
604a3e30 3039 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
341b2aa8
DK
3040 if (phba->sli_rev == LPFC_SLI_REV4)
3041 spin_unlock_irqrestore(&pring->ring_lock, iflag);
3042 else
3043 spin_unlock_irqrestore(&phba->hbalock, iflag);
2e0fef85 3044
dea3101e
JB
3045 if (cmdiocbp) {
3046 if (cmdiocbp->iocb_cmpl) {
ea2151b4
JS
3047 /*
3048 * If an ELS command failed send an event to mgmt
3049 * application.
3050 */
3051 if (saveq->iocb.ulpStatus &&
3052 (pring->ringno == LPFC_ELS_RING) &&
3053 (cmdiocbp->iocb.ulpCommand ==
3054 CMD_ELS_REQUEST64_CR))
3055 lpfc_send_els_failure_event(phba,
3056 cmdiocbp, saveq);
3057
dea3101e
JB
3058 /*
3059 * Post all ELS completions to the worker thread.
3060 * All other are passed to the completion callback.
3061 */
3062 if (pring->ringno == LPFC_ELS_RING) {
341af102
JS
3063 if ((phba->sli_rev < LPFC_SLI_REV4) &&
3064 (cmdiocbp->iocb_flag &
3065 LPFC_DRIVER_ABORTED)) {
3066 spin_lock_irqsave(&phba->hbalock,
3067 iflag);
07951076
JS
3068 cmdiocbp->iocb_flag &=
3069 ~LPFC_DRIVER_ABORTED;
341af102
JS
3070 spin_unlock_irqrestore(&phba->hbalock,
3071 iflag);
07951076
JS
3072 saveq->iocb.ulpStatus =
3073 IOSTAT_LOCAL_REJECT;
3074 saveq->iocb.un.ulpWord[4] =
3075 IOERR_SLI_ABORTED;
0ff10d46
JS
3076
3077 /* Firmware could still be in progress
3078 * of DMAing payload, so don't free data
3079 * buffer till after a hbeat.
3080 */
341af102
JS
3081 spin_lock_irqsave(&phba->hbalock,
3082 iflag);
0ff10d46 3083 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
341af102
JS
3084 spin_unlock_irqrestore(&phba->hbalock,
3085 iflag);
3086 }
0f65ff68
JS
3087 if (phba->sli_rev == LPFC_SLI_REV4) {
3088 if (saveq->iocb_flag &
3089 LPFC_EXCHANGE_BUSY) {
3090 /* Set cmdiocb flag for the
3091 * exchange busy so sgl (xri)
3092 * will not be released until
3093 * the abort xri is received
3094 * from hba.
3095 */
3096 spin_lock_irqsave(
3097 &phba->hbalock, iflag);
3098 cmdiocbp->iocb_flag |=
3099 LPFC_EXCHANGE_BUSY;
3100 spin_unlock_irqrestore(
3101 &phba->hbalock, iflag);
3102 }
3103 if (cmdiocbp->iocb_flag &
3104 LPFC_DRIVER_ABORTED) {
3105 /*
3106 * Clear LPFC_DRIVER_ABORTED
3107 * bit in case it was driver
3108 * initiated abort.
3109 */
3110 spin_lock_irqsave(
3111 &phba->hbalock, iflag);
3112 cmdiocbp->iocb_flag &=
3113 ~LPFC_DRIVER_ABORTED;
3114 spin_unlock_irqrestore(
3115 &phba->hbalock, iflag);
3116 cmdiocbp->iocb.ulpStatus =
3117 IOSTAT_LOCAL_REJECT;
3118 cmdiocbp->iocb.un.ulpWord[4] =
3119 IOERR_ABORT_REQUESTED;
3120 /*
3121 * For SLI4, irsiocb contains
3122 * NO_XRI in sli_xritag, it
3123 * shall not affect releasing
3124 * sgl (xri) process.
3125 */
3126 saveq->iocb.ulpStatus =
3127 IOSTAT_LOCAL_REJECT;
3128 saveq->iocb.un.ulpWord[4] =
3129 IOERR_SLI_ABORTED;
3130 spin_lock_irqsave(
3131 &phba->hbalock, iflag);
3132 saveq->iocb_flag |=
3133 LPFC_DELAY_MEM_FREE;
3134 spin_unlock_irqrestore(
3135 &phba->hbalock, iflag);
3136 }
07951076 3137 }
dea3101e 3138 }
2e0fef85 3139 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB
3140 } else
3141 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB
3142 } else {
3143 /*
3144 * Unknown initiating command based on the response iotag.
3145 * This could be the case on the ELS ring because of
3146 * lpfc_els_abort().
3147 */
3148 if (pring->ringno != LPFC_ELS_RING) {
3149 /*
3150 * Ring <ringno> handler: unexpected completion IoTag
3151 * <IoTag>
3152 */
a257bf90 3153 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
3154 "0322 Ring %d handler: "
3155 "unexpected completion IoTag x%x "
3156 "Data: x%x x%x x%x x%x\n",
3157 pring->ringno,
3158 saveq->iocb.ulpIoTag,
3159 saveq->iocb.ulpStatus,
3160 saveq->iocb.un.ulpWord[4],
3161 saveq->iocb.ulpCommand,
3162 saveq->iocb.ulpContext);
dea3101e
JB
3163 }
3164 }
68876920 3165
dea3101e
JB
3166 return rc;
3167}
3168
e59058c4 3169/**
3621a710 3170 * lpfc_sli_rsp_pointers_error - Response ring pointer error handler
e59058c4
JS
3171 * @phba: Pointer to HBA context object.
3172 * @pring: Pointer to driver SLI ring object.
3173 *
3174 * This function is called from the iocb ring event handlers when
3175 * put pointer is ahead of the get pointer for a ring. This function signal
3176 * an error attention condition to the worker thread and the worker
3177 * thread will transition the HBA to offline state.
3178 **/
2e0fef85
JS
3179static void
3180lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 3181{
34b02dcd 3182 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
875fbdfe 3183 /*
025dfdaf 3184 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
875fbdfe
JSEC
3185 * rsp ring <portRspMax>
3186 */
3187 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3188 "0312 Ring %d handler: portRspPut %d "
025dfdaf 3189 "is bigger than rsp ring %d\n",
e8b62011 3190 pring->ringno, le32_to_cpu(pgp->rspPutInx),
7e56aa25 3191 pring->sli.sli3.numRiocb);
875fbdfe 3192
2e0fef85 3193 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC
3194
3195 /*
3196 * All error attention handlers are posted to
3197 * worker thread
3198 */
3199 phba->work_ha |= HA_ERATT;
3200 phba->work_hs = HS_FFER3;
92d7f7b0 3201
5e9d9b82 3202 lpfc_worker_wake_up(phba);
875fbdfe
JSEC
3203
3204 return;
3205}
3206
9399627f 3207/**
3621a710 3208 * lpfc_poll_eratt - Error attention polling timer timeout handler
9399627f
JS
3209 * @ptr: Pointer to address of HBA context object.
3210 *
3211 * This function is invoked by the Error Attention polling timer when the
3212 * timer times out. It will check the SLI Error Attention register for
3213 * possible attention events. If so, it will post an Error Attention event
3214 * and wake up worker thread to process it. Otherwise, it will set up the
3215 * Error Attention polling timer for the next poll.
3216 **/
f22eb4d3 3217void lpfc_poll_eratt(struct timer_list *t)
9399627f
JS
3218{
3219 struct lpfc_hba *phba;
eb016566 3220 uint32_t eratt = 0;
aa6fbb75 3221 uint64_t sli_intr, cnt;
9399627f 3222
f22eb4d3 3223 phba = from_timer(phba, t, eratt_poll);
9399627f 3224
aa6fbb75
JS
3225 /* Here we will also keep track of interrupts per sec of the hba */
3226 sli_intr = phba->sli.slistat.sli_intr;
3227
3228 if (phba->sli.slistat.sli_prev_intr > sli_intr)
3229 cnt = (((uint64_t)(-1) - phba->sli.slistat.sli_prev_intr) +
3230 sli_intr);
3231 else
3232 cnt = (sli_intr - phba->sli.slistat.sli_prev_intr);
3233
65791f1f
JS
3234 /* 64-bit integer division not supported on 32-bit x86 - use do_div */
3235 do_div(cnt, phba->eratt_poll_interval);
aa6fbb75
JS
3236 phba->sli.slistat.sli_ips = cnt;
3237
3238 phba->sli.slistat.sli_prev_intr = sli_intr;
3239
9399627f
JS
3240 /* Check chip HA register for error event */
3241 eratt = lpfc_sli_check_eratt(phba);
3242
3243 if (eratt)
3244 /* Tell the worker thread there is work to do */
3245 lpfc_worker_wake_up(phba);
3246 else
3247 /* Restart the timer for next eratt poll */
256ec0d0
JS
3248 mod_timer(&phba->eratt_poll,
3249 jiffies +
65791f1f 3250 msecs_to_jiffies(1000 * phba->eratt_poll_interval));
9399627f
JS
3251 return;
3252}
3253
875fbdfe 3254
e59058c4 3255/**
3621a710 3256 * lpfc_sli_handle_fast_ring_event - Handle ring events on FCP ring
e59058c4
JS
3257 * @phba: Pointer to HBA context object.
3258 * @pring: Pointer to driver SLI ring object.
3259 * @mask: Host attention register mask for this ring.
3260 *
3261 * This function is called from the interrupt context when there is a ring
3262 * event for the fcp ring. The caller does not hold any lock.
3263 * The function processes each response iocb in the response ring until it
25985edc 3264 * finds an iocb with LE bit set and chains all the iocbs up to the iocb with
e59058c4
JS
3265 * LE bit set. The function will call the completion handler of the command iocb
3266 * if the response iocb indicates a completion for a command iocb or it is
3267 * an abort completion. The function will call lpfc_sli_process_unsol_iocb
3268 * function if this is an unsolicited iocb.
dea3101e 3269 * This routine presumes LPFC_FCP_RING handling and doesn't bother
45ed1190
JS
3270 * to check it explicitly.
3271 */
3272int
2e0fef85
JS
3273lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
3274 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3275{
34b02dcd 3276 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
dea3101e 3277 IOCB_t *irsp = NULL;
87f6eaff 3278 IOCB_t *entry = NULL;
dea3101e
JB
3279 struct lpfc_iocbq *cmdiocbq = NULL;
3280 struct lpfc_iocbq rspiocbq;
dea3101e
JB
3281 uint32_t status;
3282 uint32_t portRspPut, portRspMax;
3283 int rc = 1;
3284 lpfc_iocb_type type;
3285 unsigned long iflag;
3286 uint32_t rsp_cmpl = 0;
dea3101e 3287
2e0fef85 3288 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3289 pring->stats.iocb_event++;
3290
dea3101e
JB
3291 /*
3292 * The next available response entry should never exceed the maximum
3293 * entries. If it does, treat it as an adapter hardware error.
3294 */
7e56aa25 3295 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3296 portRspPut = le32_to_cpu(pgp->rspPutInx);
3297 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 3298 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 3299 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3300 return 1;
3301 }
45ed1190
JS
3302 if (phba->fcp_ring_in_use) {
3303 spin_unlock_irqrestore(&phba->hbalock, iflag);
3304 return 1;
3305 } else
3306 phba->fcp_ring_in_use = 1;
dea3101e
JB
3307
3308 rmb();
7e56aa25 3309 while (pring->sli.sli3.rspidx != portRspPut) {
87f6eaff
JSEC
3310 /*
3311 * Fetch an entry off the ring and copy it into a local data
3312 * structure. The copy involves a byte-swap since the
3313 * network byte order and pci byte orders are different.
3314 */
ed957684 3315 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 3316 phba->last_completion_time = jiffies;
875fbdfe 3317
7e56aa25
JS
3318 if (++pring->sli.sli3.rspidx >= portRspMax)
3319 pring->sli.sli3.rspidx = 0;
875fbdfe 3320
87f6eaff
JSEC
3321 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
3322 (uint32_t *) &rspiocbq.iocb,
ed957684 3323 phba->iocb_rsp_size);
a4bc3379 3324 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC
3325 irsp = &rspiocbq.iocb;
3326
dea3101e
JB
3327 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
3328 pring->stats.iocb_rsp++;
3329 rsp_cmpl++;
3330
3331 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS
3332 /*
3333 * If resource errors reported from HBA, reduce
3334 * queuedepths of the SCSI device.
3335 */
3336 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3337 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3338 IOERR_NO_RESOURCES)) {
92d7f7b0 3339 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3340 phba->lpfc_rampdown_queue_depth(phba);
92d7f7b0
JS
3341 spin_lock_irqsave(&phba->hbalock, iflag);
3342 }
3343
dea3101e
JB
3344 /* Rsp ring <ringno> error: IOCB */
3345 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3346 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 3347 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 3348 pring->ringno,
92d7f7b0
JS
3349 irsp->un.ulpWord[0],
3350 irsp->un.ulpWord[1],
3351 irsp->un.ulpWord[2],
3352 irsp->un.ulpWord[3],
3353 irsp->un.ulpWord[4],
3354 irsp->un.ulpWord[5],
d7c255b2
JS
3355 *(uint32_t *)&irsp->un1,
3356 *((uint32_t *)&irsp->un1 + 1));
dea3101e
JB
3357 }
3358
3359 switch (type) {
3360 case LPFC_ABORT_IOCB:
3361 case LPFC_SOL_IOCB:
3362 /*
3363 * Idle exchange closed via ABTS from port. No iocb
3364 * resources need to be recovered.
3365 */
3366 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 3367 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3368 "0333 IOCB cmd 0x%x"
dca9479b 3369 " processed. Skipping"
92d7f7b0 3370 " completion\n",
dca9479b 3371 irsp->ulpCommand);
dea3101e
JB
3372 break;
3373 }
3374
604a3e30
JB
3375 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
3376 &rspiocbq);
0f65ff68
JS
3377 if (unlikely(!cmdiocbq))
3378 break;
3379 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED)
3380 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3381 if (cmdiocbq->iocb_cmpl) {
3382 spin_unlock_irqrestore(&phba->hbalock, iflag);
3383 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
3384 &rspiocbq);
3385 spin_lock_irqsave(&phba->hbalock, iflag);
3386 }
dea3101e 3387 break;
a4bc3379 3388 case LPFC_UNSOL_IOCB:
2e0fef85 3389 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 3390 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 3391 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 3392 break;
dea3101e
JB
3393 default:
3394 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3395 char adaptermsg[LPFC_MAX_ADPTMSG];
3396 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3397 memcpy(&adaptermsg[0], (uint8_t *) irsp,
3398 MAX_MSG_DATA);
898eb71c
JP
3399 dev_warn(&((phba->pcidev)->dev),
3400 "lpfc%d: %s\n",
dea3101e
JB
3401 phba->brd_no, adaptermsg);
3402 } else {
3403 /* Unknown IOCB command */
3404 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3405 "0334 Unknown IOCB command "
92d7f7b0 3406 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 3407 type, irsp->ulpCommand,
92d7f7b0
JS
3408 irsp->ulpStatus,
3409 irsp->ulpIoTag,
3410 irsp->ulpContext);
dea3101e
JB
3411 }
3412 break;
3413 }
3414
3415 /*
3416 * The response IOCB has been processed. Update the ring
3417 * pointer in SLIM. If the port response put pointer has not
3418 * been updated, sync the pgp->rspPutInx and fetch the new port
3419 * response put pointer.
3420 */
7e56aa25
JS
3421 writel(pring->sli.sli3.rspidx,
3422 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3423
7e56aa25 3424 if (pring->sli.sli3.rspidx == portRspPut)
dea3101e
JB
3425 portRspPut = le32_to_cpu(pgp->rspPutInx);
3426 }
3427
3428 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
3429 pring->stats.iocb_rsp_full++;
3430 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3431 writel(status, phba->CAregaddr);
3432 readl(phba->CAregaddr);
3433 }
3434 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3435 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3436 pring->stats.iocb_cmd_empty++;
3437
3438 /* Force update of the local copy of cmdGetInx */
7e56aa25 3439 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3440 lpfc_sli_resume_iocb(phba, pring);
3441
3442 if ((pring->lpfc_sli_cmd_available))
3443 (pring->lpfc_sli_cmd_available) (phba, pring);
3444
3445 }
3446
45ed1190 3447 phba->fcp_ring_in_use = 0;
2e0fef85 3448 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3449 return rc;
3450}
3451
e59058c4 3452/**
3772a991
JS
3453 * lpfc_sli_sp_handle_rspiocb - Handle slow-path response iocb
3454 * @phba: Pointer to HBA context object.
3455 * @pring: Pointer to driver SLI ring object.
3456 * @rspiocbp: Pointer to driver response IOCB object.
3457 *
3458 * This function is called from the worker thread when there is a slow-path
3459 * response IOCB to process. This function chains all the response iocbs until
3460 * seeing the iocb with the LE bit set. The function will call
3461 * lpfc_sli_process_sol_iocb function if the response iocb indicates a
3462 * completion of a command iocb. The function will call the
3463 * lpfc_sli_process_unsol_iocb function if this is an unsolicited iocb.
3464 * The function frees the resources or calls the completion handler if this
3465 * iocb is an abort completion. The function returns NULL when the response
3466 * iocb has the LE bit set and all the chained iocbs are processed, otherwise
3467 * this function shall chain the iocb on to the iocb_continueq and return the
3468 * response iocb passed in.
3469 **/
3470static struct lpfc_iocbq *
3471lpfc_sli_sp_handle_rspiocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3472 struct lpfc_iocbq *rspiocbp)
3473{
3474 struct lpfc_iocbq *saveq;
3475 struct lpfc_iocbq *cmdiocbp;
3476 struct lpfc_iocbq *next_iocb;
3477 IOCB_t *irsp = NULL;
3478 uint32_t free_saveq;
3479 uint8_t iocb_cmd_type;
3480 lpfc_iocb_type type;
3481 unsigned long iflag;
3482 int rc;
3483
3484 spin_lock_irqsave(&phba->hbalock, iflag);
3485 /* First add the response iocb to the countinueq list */
3486 list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
3487 pring->iocb_continueq_cnt++;
3488
70f23fd6 3489 /* Now, determine whether the list is completed for processing */
3772a991
JS
3490 irsp = &rspiocbp->iocb;
3491 if (irsp->ulpLe) {
3492 /*
3493 * By default, the driver expects to free all resources
3494 * associated with this iocb completion.
3495 */
3496 free_saveq = 1;
3497 saveq = list_get_first(&pring->iocb_continueq,
3498 struct lpfc_iocbq, list);
3499 irsp = &(saveq->iocb);
3500 list_del_init(&pring->iocb_continueq);
3501 pring->iocb_continueq_cnt = 0;
3502
3503 pring->stats.iocb_rsp++;
3504
3505 /*
3506 * If resource errors reported from HBA, reduce
3507 * queuedepths of the SCSI device.
3508 */
3509 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3510 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3511 IOERR_NO_RESOURCES)) {
3772a991
JS
3512 spin_unlock_irqrestore(&phba->hbalock, iflag);
3513 phba->lpfc_rampdown_queue_depth(phba);
3514 spin_lock_irqsave(&phba->hbalock, iflag);
3515 }
3516
3517 if (irsp->ulpStatus) {
3518 /* Rsp ring <ringno> error: IOCB */
3519 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
3520 "0328 Rsp Ring %d error: "
3521 "IOCB Data: "
3522 "x%x x%x x%x x%x "
3523 "x%x x%x x%x x%x "
3524 "x%x x%x x%x x%x "
3525 "x%x x%x x%x x%x\n",
3526 pring->ringno,
3527 irsp->un.ulpWord[0],
3528 irsp->un.ulpWord[1],
3529 irsp->un.ulpWord[2],
3530 irsp->un.ulpWord[3],
3531 irsp->un.ulpWord[4],
3532 irsp->un.ulpWord[5],
3533 *(((uint32_t *) irsp) + 6),
3534 *(((uint32_t *) irsp) + 7),
3535 *(((uint32_t *) irsp) + 8),
3536 *(((uint32_t *) irsp) + 9),
3537 *(((uint32_t *) irsp) + 10),
3538 *(((uint32_t *) irsp) + 11),
3539 *(((uint32_t *) irsp) + 12),
3540 *(((uint32_t *) irsp) + 13),
3541 *(((uint32_t *) irsp) + 14),
3542 *(((uint32_t *) irsp) + 15));
3543 }
3544
3545 /*
3546 * Fetch the IOCB command type and call the correct completion
3547 * routine. Solicited and Unsolicited IOCBs on the ELS ring
3548 * get freed back to the lpfc_iocb_list by the discovery
3549 * kernel thread.
3550 */
3551 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
3552 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
3553 switch (type) {
3554 case LPFC_SOL_IOCB:
3555 spin_unlock_irqrestore(&phba->hbalock, iflag);
3556 rc = lpfc_sli_process_sol_iocb(phba, pring, saveq);
3557 spin_lock_irqsave(&phba->hbalock, iflag);
3558 break;
3559
3560 case LPFC_UNSOL_IOCB:
3561 spin_unlock_irqrestore(&phba->hbalock, iflag);
3562 rc = lpfc_sli_process_unsol_iocb(phba, pring, saveq);
3563 spin_lock_irqsave(&phba->hbalock, iflag);
3564 if (!rc)
3565 free_saveq = 0;
3566 break;
3567
3568 case LPFC_ABORT_IOCB:
3569 cmdiocbp = NULL;
3570 if (irsp->ulpCommand != CMD_XRI_ABORTED_CX)
3571 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring,
3572 saveq);
3573 if (cmdiocbp) {
3574 /* Call the specified completion routine */
3575 if (cmdiocbp->iocb_cmpl) {
3576 spin_unlock_irqrestore(&phba->hbalock,
3577 iflag);
3578 (cmdiocbp->iocb_cmpl)(phba, cmdiocbp,
3579 saveq);
3580 spin_lock_irqsave(&phba->hbalock,
3581 iflag);
3582 } else
3583 __lpfc_sli_release_iocbq(phba,
3584 cmdiocbp);
3585 }
3586 break;
3587
3588 case LPFC_UNKNOWN_IOCB:
3589 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3590 char adaptermsg[LPFC_MAX_ADPTMSG];
3591 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3592 memcpy(&adaptermsg[0], (uint8_t *)irsp,
3593 MAX_MSG_DATA);
3594 dev_warn(&((phba->pcidev)->dev),
3595 "lpfc%d: %s\n",
3596 phba->brd_no, adaptermsg);
3597 } else {
3598 /* Unknown IOCB command */
3599 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3600 "0335 Unknown IOCB "
3601 "command Data: x%x "
3602 "x%x x%x x%x\n",
3603 irsp->ulpCommand,
3604 irsp->ulpStatus,
3605 irsp->ulpIoTag,
3606 irsp->ulpContext);
3607 }
3608 break;
3609 }
3610
3611 if (free_saveq) {
3612 list_for_each_entry_safe(rspiocbp, next_iocb,
3613 &saveq->list, list) {
61f35bff 3614 list_del_init(&rspiocbp->list);
3772a991
JS
3615 __lpfc_sli_release_iocbq(phba, rspiocbp);
3616 }
3617 __lpfc_sli_release_iocbq(phba, saveq);
3618 }
3619 rspiocbp = NULL;
3620 }
3621 spin_unlock_irqrestore(&phba->hbalock, iflag);
3622 return rspiocbp;
3623}
3624
3625/**
3626 * lpfc_sli_handle_slow_ring_event - Wrapper func for handling slow-path iocbs
e59058c4
JS
3627 * @phba: Pointer to HBA context object.
3628 * @pring: Pointer to driver SLI ring object.
3629 * @mask: Host attention register mask for this ring.
3630 *
3772a991
JS
3631 * This routine wraps the actual slow_ring event process routine from the
3632 * API jump table function pointer from the lpfc_hba struct.
e59058c4 3633 **/
3772a991 3634void
2e0fef85
JS
3635lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
3636 struct lpfc_sli_ring *pring, uint32_t mask)
3772a991
JS
3637{
3638 phba->lpfc_sli_handle_slow_ring_event(phba, pring, mask);
3639}
3640
3641/**
3642 * lpfc_sli_handle_slow_ring_event_s3 - Handle SLI3 ring event for non-FCP rings
3643 * @phba: Pointer to HBA context object.
3644 * @pring: Pointer to driver SLI ring object.
3645 * @mask: Host attention register mask for this ring.
3646 *
3647 * This function is called from the worker thread when there is a ring event
3648 * for non-fcp rings. The caller does not hold any lock. The function will
3649 * remove each response iocb in the response ring and calls the handle
3650 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3651 **/
3652static void
3653lpfc_sli_handle_slow_ring_event_s3(struct lpfc_hba *phba,
3654 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3655{
34b02dcd 3656 struct lpfc_pgp *pgp;
dea3101e
JB
3657 IOCB_t *entry;
3658 IOCB_t *irsp = NULL;
3659 struct lpfc_iocbq *rspiocbp = NULL;
dea3101e 3660 uint32_t portRspPut, portRspMax;
dea3101e 3661 unsigned long iflag;
3772a991 3662 uint32_t status;
dea3101e 3663
34b02dcd 3664 pgp = &phba->port_gp[pring->ringno];
2e0fef85 3665 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3666 pring->stats.iocb_event++;
3667
dea3101e
JB
3668 /*
3669 * The next available response entry should never exceed the maximum
3670 * entries. If it does, treat it as an adapter hardware error.
3671 */
7e56aa25 3672 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3673 portRspPut = le32_to_cpu(pgp->rspPutInx);
3674 if (portRspPut >= portRspMax) {
3675 /*
025dfdaf 3676 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
dea3101e
JB
3677 * rsp ring <portRspMax>
3678 */
ed957684 3679 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3680 "0303 Ring %d handler: portRspPut %d "
025dfdaf 3681 "is bigger than rsp ring %d\n",
e8b62011 3682 pring->ringno, portRspPut, portRspMax);
dea3101e 3683
2e0fef85
JS
3684 phba->link_state = LPFC_HBA_ERROR;
3685 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3686
3687 phba->work_hs = HS_FFER3;
3688 lpfc_handle_eratt(phba);
3689
3772a991 3690 return;
dea3101e
JB
3691 }
3692
3693 rmb();
7e56aa25 3694 while (pring->sli.sli3.rspidx != portRspPut) {
dea3101e
JB
3695 /*
3696 * Build a completion list and call the appropriate handler.
3697 * The process is to get the next available response iocb, get
3698 * a free iocb from the list, copy the response data into the
3699 * free iocb, insert to the continuation list, and update the
3700 * next response index to slim. This process makes response
3701 * iocb's in the ring available to DMA as fast as possible but
3702 * pays a penalty for a copy operation. Since the iocb is
3703 * only 32 bytes, this penalty is considered small relative to
3704 * the PCI reads for register values and a slim write. When
3705 * the ulpLe field is set, the entire Command has been
3706 * received.
3707 */
ed957684
JS
3708 entry = lpfc_resp_iocb(phba, pring);
3709
858c9f6c 3710 phba->last_completion_time = jiffies;
2e0fef85 3711 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
3712 if (rspiocbp == NULL) {
3713 printk(KERN_ERR "%s: out of buffers! Failing "
cadbd4a5 3714 "completion.\n", __func__);
dea3101e
JB
3715 break;
3716 }
3717
ed957684
JS
3718 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
3719 phba->iocb_rsp_size);
dea3101e
JB
3720 irsp = &rspiocbp->iocb;
3721
7e56aa25
JS
3722 if (++pring->sli.sli3.rspidx >= portRspMax)
3723 pring->sli.sli3.rspidx = 0;
dea3101e 3724
a58cbd52
JS
3725 if (pring->ringno == LPFC_ELS_RING) {
3726 lpfc_debugfs_slow_ring_trc(phba,
3727 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
3728 *(((uint32_t *) irsp) + 4),
3729 *(((uint32_t *) irsp) + 6),
3730 *(((uint32_t *) irsp) + 7));
3731 }
3732
7e56aa25
JS
3733 writel(pring->sli.sli3.rspidx,
3734 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3735
3772a991
JS
3736 spin_unlock_irqrestore(&phba->hbalock, iflag);
3737 /* Handle the response IOCB */
3738 rspiocbp = lpfc_sli_sp_handle_rspiocb(phba, pring, rspiocbp);
3739 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3740
3741 /*
3742 * If the port response put pointer has not been updated, sync
3743 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
3744 * response put pointer.
3745 */
7e56aa25 3746 if (pring->sli.sli3.rspidx == portRspPut) {
dea3101e
JB
3747 portRspPut = le32_to_cpu(pgp->rspPutInx);
3748 }
7e56aa25 3749 } /* while (pring->sli.sli3.rspidx != portRspPut) */
dea3101e 3750
92d7f7b0 3751 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB
3752 /* At least one response entry has been freed */
3753 pring->stats.iocb_rsp_full++;
3754 /* SET RxRE_RSP in Chip Att register */
3755 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3756 writel(status, phba->CAregaddr);
3757 readl(phba->CAregaddr); /* flush */
3758 }
3759 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3760 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3761 pring->stats.iocb_cmd_empty++;
3762
3763 /* Force update of the local copy of cmdGetInx */
7e56aa25 3764 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3765 lpfc_sli_resume_iocb(phba, pring);
3766
3767 if ((pring->lpfc_sli_cmd_available))
3768 (pring->lpfc_sli_cmd_available) (phba, pring);
3769
3770 }
3771
2e0fef85 3772 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3773 return;
dea3101e
JB
3774}
3775
4f774513
JS
3776/**
3777 * lpfc_sli_handle_slow_ring_event_s4 - Handle SLI4 slow-path els events
3778 * @phba: Pointer to HBA context object.
3779 * @pring: Pointer to driver SLI ring object.
3780 * @mask: Host attention register mask for this ring.
3781 *
3782 * This function is called from the worker thread when there is a pending
3783 * ELS response iocb on the driver internal slow-path response iocb worker
3784 * queue. The caller does not hold any lock. The function will remove each
3785 * response iocb from the response worker queue and calls the handle
3786 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3787 **/
3788static void
3789lpfc_sli_handle_slow_ring_event_s4(struct lpfc_hba *phba,
3790 struct lpfc_sli_ring *pring, uint32_t mask)
3791{
3792 struct lpfc_iocbq *irspiocbq;
4d9ab994
JS
3793 struct hbq_dmabuf *dmabuf;
3794 struct lpfc_cq_event *cq_event;
4f774513 3795 unsigned long iflag;
0ef01a2d 3796 int count = 0;
4f774513 3797
45ed1190
JS
3798 spin_lock_irqsave(&phba->hbalock, iflag);
3799 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
3800 spin_unlock_irqrestore(&phba->hbalock, iflag);
3801 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
4f774513
JS
3802 /* Get the response iocb from the head of work queue */
3803 spin_lock_irqsave(&phba->hbalock, iflag);
45ed1190 3804 list_remove_head(&phba->sli4_hba.sp_queue_event,
4d9ab994 3805 cq_event, struct lpfc_cq_event, list);
4f774513 3806 spin_unlock_irqrestore(&phba->hbalock, iflag);
4d9ab994
JS
3807
3808 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
3809 case CQE_CODE_COMPL_WQE:
3810 irspiocbq = container_of(cq_event, struct lpfc_iocbq,
3811 cq_event);
45ed1190
JS
3812 /* Translate ELS WCQE to response IOCBQ */
3813 irspiocbq = lpfc_sli4_els_wcqe_to_rspiocbq(phba,
3814 irspiocbq);
3815 if (irspiocbq)
3816 lpfc_sli_sp_handle_rspiocb(phba, pring,
3817 irspiocbq);
0ef01a2d 3818 count++;
4d9ab994
JS
3819 break;
3820 case CQE_CODE_RECEIVE:
7851fe2c 3821 case CQE_CODE_RECEIVE_V1:
4d9ab994
JS
3822 dmabuf = container_of(cq_event, struct hbq_dmabuf,
3823 cq_event);
3824 lpfc_sli4_handle_received_buffer(phba, dmabuf);
0ef01a2d 3825 count++;
4d9ab994
JS
3826 break;
3827 default:
3828 break;
3829 }
0ef01a2d
JS
3830
3831 /* Limit the number of events to 64 to avoid soft lockups */
3832 if (count == 64)
3833 break;
4f774513
JS
3834 }
3835}
3836
e59058c4 3837/**
3621a710 3838 * lpfc_sli_abort_iocb_ring - Abort all iocbs in the ring
e59058c4
JS
3839 * @phba: Pointer to HBA context object.
3840 * @pring: Pointer to driver SLI ring object.
3841 *
3842 * This function aborts all iocbs in the given ring and frees all the iocb
3843 * objects in txq. This function issues an abort iocb for all the iocb commands
3844 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3845 * the return of this function. The caller is not required to hold any locks.
3846 **/
2e0fef85 3847void
dea3101e
JB
3848lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
3849{
2534ba75 3850 LIST_HEAD(completions);
dea3101e 3851 struct lpfc_iocbq *iocb, *next_iocb;
dea3101e 3852
92d7f7b0
JS
3853 if (pring->ringno == LPFC_ELS_RING) {
3854 lpfc_fabric_abort_hba(phba);
3855 }
3856
dea3101e
JB
3857 /* Error everything on txq and txcmplq
3858 * First do the txq.
3859 */
db55fba8
JS
3860 if (phba->sli_rev >= LPFC_SLI_REV4) {
3861 spin_lock_irq(&pring->ring_lock);
3862 list_splice_init(&pring->txq, &completions);
3863 pring->txq_cnt = 0;
3864 spin_unlock_irq(&pring->ring_lock);
dea3101e 3865
db55fba8
JS
3866 spin_lock_irq(&phba->hbalock);
3867 /* Next issue ABTS for everything on the txcmplq */
3868 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3869 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3870 spin_unlock_irq(&phba->hbalock);
3871 } else {
3872 spin_lock_irq(&phba->hbalock);
3873 list_splice_init(&pring->txq, &completions);
3874 pring->txq_cnt = 0;
dea3101e 3875
db55fba8
JS
3876 /* Next issue ABTS for everything on the txcmplq */
3877 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3878 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3879 spin_unlock_irq(&phba->hbalock);
3880 }
dea3101e 3881
a257bf90
JS
3882 /* Cancel all the IOCBs from the completions list */
3883 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
3884 IOERR_SLI_ABORTED);
dea3101e
JB
3885}
3886
895427bd
JS
3887/**
3888 * lpfc_sli_abort_wqe_ring - Abort all iocbs in the ring
3889 * @phba: Pointer to HBA context object.
3890 * @pring: Pointer to driver SLI ring object.
3891 *
3892 * This function aborts all iocbs in the given ring and frees all the iocb
3893 * objects in txq. This function issues an abort iocb for all the iocb commands
3894 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3895 * the return of this function. The caller is not required to hold any locks.
3896 **/
3897void
3898lpfc_sli_abort_wqe_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
3899{
3900 LIST_HEAD(completions);
3901 struct lpfc_iocbq *iocb, *next_iocb;
3902
3903 if (pring->ringno == LPFC_ELS_RING)
3904 lpfc_fabric_abort_hba(phba);
3905
3906 spin_lock_irq(&phba->hbalock);
3907 /* Next issue ABTS for everything on the txcmplq */
3908 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3909 lpfc_sli4_abort_nvme_io(phba, pring, iocb);
3910 spin_unlock_irq(&phba->hbalock);
3911}
3912
3913
db55fba8
JS
3914/**
3915 * lpfc_sli_abort_fcp_rings - Abort all iocbs in all FCP rings
3916 * @phba: Pointer to HBA context object.
3917 * @pring: Pointer to driver SLI ring object.
3918 *
3919 * This function aborts all iocbs in FCP rings and frees all the iocb
3920 * objects in txq. This function issues an abort iocb for all the iocb commands
3921 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3922 * the return of this function. The caller is not required to hold any locks.
3923 **/
3924void
3925lpfc_sli_abort_fcp_rings(struct lpfc_hba *phba)
3926{
3927 struct lpfc_sli *psli = &phba->sli;
3928 struct lpfc_sli_ring *pring;
3929 uint32_t i;
3930
3931 /* Look on all the FCP Rings for the iotag */
3932 if (phba->sli_rev >= LPFC_SLI_REV4) {
3933 for (i = 0; i < phba->cfg_fcp_io_channel; i++) {
895427bd 3934 pring = phba->sli4_hba.fcp_wq[i]->pring;
db55fba8
JS
3935 lpfc_sli_abort_iocb_ring(phba, pring);
3936 }
3937 } else {
895427bd 3938 pring = &psli->sli3_ring[LPFC_FCP_RING];
db55fba8
JS
3939 lpfc_sli_abort_iocb_ring(phba, pring);
3940 }
3941}
3942
895427bd
JS
3943/**
3944 * lpfc_sli_abort_nvme_rings - Abort all wqes in all NVME rings
3945 * @phba: Pointer to HBA context object.
3946 *
3947 * This function aborts all wqes in NVME rings. This function issues an
3948 * abort wqe for all the outstanding IO commands in txcmplq. The iocbs in
3949 * the txcmplq is not guaranteed to complete before the return of this
3950 * function. The caller is not required to hold any locks.
3951 **/
3952void
3953lpfc_sli_abort_nvme_rings(struct lpfc_hba *phba)
3954{
3955 struct lpfc_sli_ring *pring;
3956 uint32_t i;
3957
3958 if (phba->sli_rev < LPFC_SLI_REV4)
3959 return;
3960
3961 /* Abort all IO on each NVME ring. */
3962 for (i = 0; i < phba->cfg_nvme_io_channel; i++) {
3963 pring = phba->sli4_hba.nvme_wq[i]->pring;
3964 lpfc_sli_abort_wqe_ring(phba, pring);
3965 }
3966}
3967
db55fba8 3968
a8e497d5 3969/**
3621a710 3970 * lpfc_sli_flush_fcp_rings - flush all iocbs in the fcp ring
a8e497d5
JS
3971 * @phba: Pointer to HBA context object.
3972 *
3973 * This function flushes all iocbs in the fcp ring and frees all the iocb
3974 * objects in txq and txcmplq. This function will not issue abort iocbs
3975 * for all the iocb commands in txcmplq, they will just be returned with
3976 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
3977 * slot has been permanently disabled.
3978 **/
3979void
3980lpfc_sli_flush_fcp_rings(struct lpfc_hba *phba)
3981{
3982 LIST_HEAD(txq);
3983 LIST_HEAD(txcmplq);
a8e497d5
JS
3984 struct lpfc_sli *psli = &phba->sli;
3985 struct lpfc_sli_ring *pring;
db55fba8 3986 uint32_t i;
c1dd9111 3987 struct lpfc_iocbq *piocb, *next_iocb;
a8e497d5
JS
3988
3989 spin_lock_irq(&phba->hbalock);
4f2e66c6
JS
3990 /* Indicate the I/O queues are flushed */
3991 phba->hba_flag |= HBA_FCP_IOQ_FLUSH;
a8e497d5
JS
3992 spin_unlock_irq(&phba->hbalock);
3993
db55fba8
JS
3994 /* Look on all the FCP Rings for the iotag */
3995 if (phba->sli_rev >= LPFC_SLI_REV4) {
3996 for (i = 0; i < phba->cfg_fcp_io_channel; i++) {
895427bd 3997 pring = phba->sli4_hba.fcp_wq[i]->pring;
db55fba8
JS
3998
3999 spin_lock_irq(&pring->ring_lock);
4000 /* Retrieve everything on txq */
4001 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4002 list_for_each_entry_safe(piocb, next_iocb,
4003 &pring->txcmplq, list)
4004 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4005 /* Retrieve everything on the txcmplq */
4006 list_splice_init(&pring->txcmplq, &txcmplq);
4007 pring->txq_cnt = 0;
4008 pring->txcmplq_cnt = 0;
4009 spin_unlock_irq(&pring->ring_lock);
4010
4011 /* Flush the txq */
4012 lpfc_sli_cancel_iocbs(phba, &txq,
4013 IOSTAT_LOCAL_REJECT,
4014 IOERR_SLI_DOWN);
4015 /* Flush the txcmpq */
4016 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4017 IOSTAT_LOCAL_REJECT,
4018 IOERR_SLI_DOWN);
4019 }
4020 } else {
895427bd 4021 pring = &psli->sli3_ring[LPFC_FCP_RING];
a8e497d5 4022
db55fba8
JS
4023 spin_lock_irq(&phba->hbalock);
4024 /* Retrieve everything on txq */
4025 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4026 list_for_each_entry_safe(piocb, next_iocb,
4027 &pring->txcmplq, list)
4028 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4029 /* Retrieve everything on the txcmplq */
4030 list_splice_init(&pring->txcmplq, &txcmplq);
4031 pring->txq_cnt = 0;
4032 pring->txcmplq_cnt = 0;
4033 spin_unlock_irq(&phba->hbalock);
4034
4035 /* Flush the txq */
4036 lpfc_sli_cancel_iocbs(phba, &txq, IOSTAT_LOCAL_REJECT,
4037 IOERR_SLI_DOWN);
4038 /* Flush the txcmpq */
4039 lpfc_sli_cancel_iocbs(phba, &txcmplq, IOSTAT_LOCAL_REJECT,
4040 IOERR_SLI_DOWN);
4041 }
a8e497d5
JS
4042}
4043
895427bd
JS
4044/**
4045 * lpfc_sli_flush_nvme_rings - flush all wqes in the nvme rings
4046 * @phba: Pointer to HBA context object.
4047 *
4048 * This function flushes all wqes in the nvme rings and frees all resources
4049 * in the txcmplq. This function does not issue abort wqes for the IO
4050 * commands in txcmplq, they will just be returned with
4051 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
4052 * slot has been permanently disabled.
4053 **/
4054void
4055lpfc_sli_flush_nvme_rings(struct lpfc_hba *phba)
4056{
4057 LIST_HEAD(txcmplq);
4058 struct lpfc_sli_ring *pring;
4059 uint32_t i;
c1dd9111 4060 struct lpfc_iocbq *piocb, *next_iocb;
895427bd
JS
4061
4062 if (phba->sli_rev < LPFC_SLI_REV4)
4063 return;
4064
4065 /* Hint to other driver operations that a flush is in progress. */
4066 spin_lock_irq(&phba->hbalock);
4067 phba->hba_flag |= HBA_NVME_IOQ_FLUSH;
4068 spin_unlock_irq(&phba->hbalock);
4069
4070 /* Cycle through all NVME rings and complete each IO with
4071 * a local driver reason code. This is a flush so no
4072 * abort exchange to FW.
4073 */
4074 for (i = 0; i < phba->cfg_nvme_io_channel; i++) {
4075 pring = phba->sli4_hba.nvme_wq[i]->pring;
4076
895427bd 4077 spin_lock_irq(&pring->ring_lock);
c1dd9111
JS
4078 list_for_each_entry_safe(piocb, next_iocb,
4079 &pring->txcmplq, list)
4080 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
4081 /* Retrieve everything on the txcmplq */
895427bd
JS
4082 list_splice_init(&pring->txcmplq, &txcmplq);
4083 pring->txcmplq_cnt = 0;
4084 spin_unlock_irq(&pring->ring_lock);
4085
4086 /* Flush the txcmpq &&&PAE */
4087 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4088 IOSTAT_LOCAL_REJECT,
4089 IOERR_SLI_DOWN);
4090 }
4091}
4092
e59058c4 4093/**
3772a991 4094 * lpfc_sli_brdready_s3 - Check for sli3 host ready status
e59058c4
JS
4095 * @phba: Pointer to HBA context object.
4096 * @mask: Bit mask to be checked.
4097 *
4098 * This function reads the host status register and compares
4099 * with the provided bit mask to check if HBA completed
4100 * the restart. This function will wait in a loop for the
4101 * HBA to complete restart. If the HBA does not restart within
4102 * 15 iterations, the function will reset the HBA again. The
4103 * function returns 1 when HBA fail to restart otherwise returns
4104 * zero.
4105 **/
3772a991
JS
4106static int
4107lpfc_sli_brdready_s3(struct lpfc_hba *phba, uint32_t mask)
dea3101e 4108{
41415862
JW
4109 uint32_t status;
4110 int i = 0;
4111 int retval = 0;
dea3101e 4112
41415862 4113 /* Read the HBA Host Status Register */
9940b97b
JS
4114 if (lpfc_readl(phba->HSregaddr, &status))
4115 return 1;
dea3101e 4116
41415862
JW
4117 /*
4118 * Check status register every 100ms for 5 retries, then every
4119 * 500ms for 5, then every 2.5 sec for 5, then reset board and
4120 * every 2.5 sec for 4.
4121 * Break our of the loop if errors occurred during init.
4122 */
4123 while (((status & mask) != mask) &&
4124 !(status & HS_FFERM) &&
4125 i++ < 20) {
dea3101e 4126
41415862
JW
4127 if (i <= 5)
4128 msleep(10);
4129 else if (i <= 10)
4130 msleep(500);
4131 else
4132 msleep(2500);
dea3101e 4133
41415862 4134 if (i == 15) {
2e0fef85 4135 /* Do post */
92d7f7b0 4136 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW
4137 lpfc_sli_brdrestart(phba);
4138 }
4139 /* Read the HBA Host Status Register */
9940b97b
JS
4140 if (lpfc_readl(phba->HSregaddr, &status)) {
4141 retval = 1;
4142 break;
4143 }
41415862 4144 }
dea3101e 4145
41415862
JW
4146 /* Check to see if any errors occurred during init */
4147 if ((status & HS_FFERM) || (i >= 20)) {
e40a02c1
JS
4148 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4149 "2751 Adapter failed to restart, "
4150 "status reg x%x, FW Data: A8 x%x AC x%x\n",
4151 status,
4152 readl(phba->MBslimaddr + 0xa8),
4153 readl(phba->MBslimaddr + 0xac));
2e0fef85 4154 phba->link_state = LPFC_HBA_ERROR;
41415862 4155 retval = 1;
dea3101e 4156 }
dea3101e 4157
41415862
JW
4158 return retval;
4159}
dea3101e 4160
da0436e9
JS
4161/**
4162 * lpfc_sli_brdready_s4 - Check for sli4 host ready status
4163 * @phba: Pointer to HBA context object.
4164 * @mask: Bit mask to be checked.
4165 *
4166 * This function checks the host status register to check if HBA is
4167 * ready. This function will wait in a loop for the HBA to be ready
4168 * If the HBA is not ready , the function will will reset the HBA PCI
4169 * function again. The function returns 1 when HBA fail to be ready
4170 * otherwise returns zero.
4171 **/
4172static int
4173lpfc_sli_brdready_s4(struct lpfc_hba *phba, uint32_t mask)
4174{
4175 uint32_t status;
4176 int retval = 0;
4177
4178 /* Read the HBA Host Status Register */
4179 status = lpfc_sli4_post_status_check(phba);
4180
4181 if (status) {
4182 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
4183 lpfc_sli_brdrestart(phba);
4184 status = lpfc_sli4_post_status_check(phba);
4185 }
4186
4187 /* Check to see if any errors occurred during init */
4188 if (status) {
4189 phba->link_state = LPFC_HBA_ERROR;
4190 retval = 1;
4191 } else
4192 phba->sli4_hba.intr_enable = 0;
4193
4194 return retval;
4195}
4196
4197/**
4198 * lpfc_sli_brdready - Wrapper func for checking the hba readyness
4199 * @phba: Pointer to HBA context object.
4200 * @mask: Bit mask to be checked.
4201 *
4202 * This routine wraps the actual SLI3 or SLI4 hba readyness check routine
4203 * from the API jump table function pointer from the lpfc_hba struct.
4204 **/
4205int
4206lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
4207{
4208 return phba->lpfc_sli_brdready(phba, mask);
4209}
4210
9290831f
JS
4211#define BARRIER_TEST_PATTERN (0xdeadbeef)
4212
e59058c4 4213/**
3621a710 4214 * lpfc_reset_barrier - Make HBA ready for HBA reset
e59058c4
JS
4215 * @phba: Pointer to HBA context object.
4216 *
1b51197d
JS
4217 * This function is called before resetting an HBA. This function is called
4218 * with hbalock held and requests HBA to quiesce DMAs before a reset.
e59058c4 4219 **/
2e0fef85 4220void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 4221{
65a29c16
JS
4222 uint32_t __iomem *resp_buf;
4223 uint32_t __iomem *mbox_buf;
9290831f 4224 volatile uint32_t mbox;
9940b97b 4225 uint32_t hc_copy, ha_copy, resp_data;
9290831f
JS
4226 int i;
4227 uint8_t hdrtype;
4228
1c2ba475
JT
4229 lockdep_assert_held(&phba->hbalock);
4230
9290831f
JS
4231 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
4232 if (hdrtype != 0x80 ||
4233 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
4234 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
4235 return;
4236
4237 /*
4238 * Tell the other part of the chip to suspend temporarily all
4239 * its DMA activity.
4240 */
65a29c16 4241 resp_buf = phba->MBslimaddr;
9290831f
JS
4242
4243 /* Disable the error attention */
9940b97b
JS
4244 if (lpfc_readl(phba->HCregaddr, &hc_copy))
4245 return;
9290831f
JS
4246 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
4247 readl(phba->HCregaddr); /* flush */
2e0fef85 4248 phba->link_flag |= LS_IGNORE_ERATT;
9290831f 4249
9940b97b
JS
4250 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4251 return;
4252 if (ha_copy & HA_ERATT) {
9290831f
JS
4253 /* Clear Chip error bit */
4254 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4255 phba->pport->stopped = 1;
9290831f
JS
4256 }
4257
4258 mbox = 0;
4259 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
4260 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
4261
4262 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 4263 mbox_buf = phba->MBslimaddr;
9290831f
JS
4264 writel(mbox, mbox_buf);
4265
9940b97b
JS
4266 for (i = 0; i < 50; i++) {
4267 if (lpfc_readl((resp_buf + 1), &resp_data))
4268 return;
4269 if (resp_data != ~(BARRIER_TEST_PATTERN))
4270 mdelay(1);
4271 else
4272 break;
4273 }
4274 resp_data = 0;
4275 if (lpfc_readl((resp_buf + 1), &resp_data))
4276 return;
4277 if (resp_data != ~(BARRIER_TEST_PATTERN)) {
f4b4c68f 4278 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE ||
2e0fef85 4279 phba->pport->stopped)
9290831f
JS
4280 goto restore_hc;
4281 else
4282 goto clear_errat;
4283 }
4284
4285 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
9940b97b
JS
4286 resp_data = 0;
4287 for (i = 0; i < 500; i++) {
4288 if (lpfc_readl(resp_buf, &resp_data))
4289 return;
4290 if (resp_data != mbox)
4291 mdelay(1);
4292 else
4293 break;
4294 }
9290831f
JS
4295
4296clear_errat:
4297
9940b97b
JS
4298 while (++i < 500) {
4299 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4300 return;
4301 if (!(ha_copy & HA_ERATT))
4302 mdelay(1);
4303 else
4304 break;
4305 }
9290831f
JS
4306
4307 if (readl(phba->HAregaddr) & HA_ERATT) {
4308 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4309 phba->pport->stopped = 1;
9290831f
JS
4310 }
4311
4312restore_hc:
2e0fef85 4313 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS
4314 writel(hc_copy, phba->HCregaddr);
4315 readl(phba->HCregaddr); /* flush */
4316}
4317
e59058c4 4318/**
3621a710 4319 * lpfc_sli_brdkill - Issue a kill_board mailbox command
e59058c4
JS
4320 * @phba: Pointer to HBA context object.
4321 *
4322 * This function issues a kill_board mailbox command and waits for
4323 * the error attention interrupt. This function is called for stopping
4324 * the firmware processing. The caller is not required to hold any
4325 * locks. This function calls lpfc_hba_down_post function to free
4326 * any pending commands after the kill. The function will return 1 when it
4327 * fails to kill the board else will return 0.
4328 **/
41415862 4329int
2e0fef85 4330lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW
4331{
4332 struct lpfc_sli *psli;
4333 LPFC_MBOXQ_t *pmb;
4334 uint32_t status;
4335 uint32_t ha_copy;
4336 int retval;
4337 int i = 0;
dea3101e 4338
41415862 4339 psli = &phba->sli;
dea3101e 4340
41415862 4341 /* Kill HBA */
ed957684 4342 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS
4343 "0329 Kill HBA Data: x%x x%x\n",
4344 phba->pport->port_state, psli->sli_flag);
41415862 4345
98c9ea5c
JS
4346 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4347 if (!pmb)
41415862 4348 return 1;
41415862
JW
4349
4350 /* Disable the error attention */
2e0fef85 4351 spin_lock_irq(&phba->hbalock);
9940b97b
JS
4352 if (lpfc_readl(phba->HCregaddr, &status)) {
4353 spin_unlock_irq(&phba->hbalock);
4354 mempool_free(pmb, phba->mbox_mem_pool);
4355 return 1;
4356 }
41415862
JW
4357 status &= ~HC_ERINT_ENA;
4358 writel(status, phba->HCregaddr);
4359 readl(phba->HCregaddr); /* flush */
2e0fef85
JS
4360 phba->link_flag |= LS_IGNORE_ERATT;
4361 spin_unlock_irq(&phba->hbalock);
41415862
JW
4362
4363 lpfc_kill_board(phba, pmb);
4364 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
4365 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4366
4367 if (retval != MBX_SUCCESS) {
4368 if (retval != MBX_BUSY)
4369 mempool_free(pmb, phba->mbox_mem_pool);
e40a02c1
JS
4370 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4371 "2752 KILL_BOARD command failed retval %d\n",
4372 retval);
2e0fef85
JS
4373 spin_lock_irq(&phba->hbalock);
4374 phba->link_flag &= ~LS_IGNORE_ERATT;
4375 spin_unlock_irq(&phba->hbalock);
41415862
JW
4376 return 1;
4377 }
4378
f4b4c68f
JS
4379 spin_lock_irq(&phba->hbalock);
4380 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
4381 spin_unlock_irq(&phba->hbalock);
9290831f 4382
41415862
JW
4383 mempool_free(pmb, phba->mbox_mem_pool);
4384
4385 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
4386 * attention every 100ms for 3 seconds. If we don't get ERATT after
4387 * 3 seconds we still set HBA_ERROR state because the status of the
4388 * board is now undefined.
4389 */
9940b97b
JS
4390 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4391 return 1;
41415862
JW
4392 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
4393 mdelay(100);
9940b97b
JS
4394 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4395 return 1;
41415862
JW
4396 }
4397
4398 del_timer_sync(&psli->mbox_tmo);
9290831f
JS
4399 if (ha_copy & HA_ERATT) {
4400 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4401 phba->pport->stopped = 1;
9290831f 4402 }
2e0fef85 4403 spin_lock_irq(&phba->hbalock);
41415862 4404 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
04c68496 4405 psli->mbox_active = NULL;
2e0fef85
JS
4406 phba->link_flag &= ~LS_IGNORE_ERATT;
4407 spin_unlock_irq(&phba->hbalock);
41415862 4408
41415862 4409 lpfc_hba_down_post(phba);
2e0fef85 4410 phba->link_state = LPFC_HBA_ERROR;
41415862 4411
2e0fef85 4412 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB
4413}
4414
e59058c4 4415/**
3772a991 4416 * lpfc_sli_brdreset - Reset a sli-2 or sli-3 HBA
e59058c4
JS
4417 * @phba: Pointer to HBA context object.
4418 *
4419 * This function resets the HBA by writing HC_INITFF to the control
4420 * register. After the HBA resets, this function resets all the iocb ring
4421 * indices. This function disables PCI layer parity checking during
4422 * the reset.
4423 * This function returns 0 always.
4424 * The caller is not required to hold any locks.
4425 **/
41415862 4426int
2e0fef85 4427lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 4428{
41415862 4429 struct lpfc_sli *psli;
dea3101e 4430 struct lpfc_sli_ring *pring;
41415862 4431 uint16_t cfg_value;
dea3101e 4432 int i;
dea3101e 4433
41415862 4434 psli = &phba->sli;
dea3101e 4435
41415862
JW
4436 /* Reset HBA */
4437 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4438 "0325 Reset HBA Data: x%x x%x\n",
4492b739
JS
4439 (phba->pport) ? phba->pport->port_state : 0,
4440 psli->sli_flag);
dea3101e
JB
4441
4442 /* perform board reset */
4443 phba->fc_eventTag = 0;
4d9ab994 4444 phba->link_events = 0;
4492b739
JS
4445 if (phba->pport) {
4446 phba->pport->fc_myDID = 0;
4447 phba->pport->fc_prevDID = 0;
4448 }
dea3101e 4449
41415862
JW
4450 /* Turn off parity checking and serr during the physical reset */
4451 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
4452 pci_write_config_word(phba->pcidev, PCI_COMMAND,
4453 (cfg_value &
4454 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4455
3772a991
JS
4456 psli->sli_flag &= ~(LPFC_SLI_ACTIVE | LPFC_PROCESS_LA);
4457
41415862
JW
4458 /* Now toggle INITFF bit in the Host Control Register */
4459 writel(HC_INITFF, phba->HCregaddr);
4460 mdelay(1);
4461 readl(phba->HCregaddr); /* flush */
4462 writel(0, phba->HCregaddr);
4463 readl(phba->HCregaddr); /* flush */
4464
4465 /* Restore PCI cmd register */
4466 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB
4467
4468 /* Initialize relevant SLI info */
41415862 4469 for (i = 0; i < psli->num_rings; i++) {
895427bd 4470 pring = &psli->sli3_ring[i];
dea3101e 4471 pring->flag = 0;
7e56aa25
JS
4472 pring->sli.sli3.rspidx = 0;
4473 pring->sli.sli3.next_cmdidx = 0;
4474 pring->sli.sli3.local_getidx = 0;
4475 pring->sli.sli3.cmdidx = 0;
dea3101e
JB
4476 pring->missbufcnt = 0;
4477 }
dea3101e 4478
2e0fef85 4479 phba->link_state = LPFC_WARM_START;
41415862
JW
4480 return 0;
4481}
4482
e59058c4 4483/**
da0436e9
JS
4484 * lpfc_sli4_brdreset - Reset a sli-4 HBA
4485 * @phba: Pointer to HBA context object.
4486 *
4487 * This function resets a SLI4 HBA. This function disables PCI layer parity
4488 * checking during resets the device. The caller is not required to hold
4489 * any locks.
4490 *
4491 * This function returns 0 always.
4492 **/
4493int
4494lpfc_sli4_brdreset(struct lpfc_hba *phba)
4495{
4496 struct lpfc_sli *psli = &phba->sli;
4497 uint16_t cfg_value;
0293635e 4498 int rc = 0;
da0436e9
JS
4499
4500 /* Reset HBA */
4501 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
0293635e
JS
4502 "0295 Reset HBA Data: x%x x%x x%x\n",
4503 phba->pport->port_state, psli->sli_flag,
4504 phba->hba_flag);
da0436e9
JS
4505
4506 /* perform board reset */
4507 phba->fc_eventTag = 0;
4d9ab994 4508 phba->link_events = 0;
da0436e9
JS
4509 phba->pport->fc_myDID = 0;
4510 phba->pport->fc_prevDID = 0;
4511
da0436e9
JS
4512 spin_lock_irq(&phba->hbalock);
4513 psli->sli_flag &= ~(LPFC_PROCESS_LA);
4514 phba->fcf.fcf_flag = 0;
da0436e9
JS
4515 spin_unlock_irq(&phba->hbalock);
4516
0293635e
JS
4517 /* SLI4 INTF 2: if FW dump is being taken skip INIT_PORT */
4518 if (phba->hba_flag & HBA_FW_DUMP_OP) {
4519 phba->hba_flag &= ~HBA_FW_DUMP_OP;
4520 return rc;
4521 }
4522
da0436e9
JS
4523 /* Now physically reset the device */
4524 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4525 "0389 Performing PCI function reset!\n");
be858b65
JS
4526
4527 /* Turn off parity checking and serr during the physical reset */
4528 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
4529 pci_write_config_word(phba->pcidev, PCI_COMMAND, (cfg_value &
4530 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4531
88318816 4532 /* Perform FCoE PCI function reset before freeing queue memory */
27b01b82 4533 rc = lpfc_pci_function_reset(phba);
da0436e9 4534
be858b65
JS
4535 /* Restore PCI cmd register */
4536 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
4537
27b01b82 4538 return rc;
da0436e9
JS
4539}
4540
4541/**
4542 * lpfc_sli_brdrestart_s3 - Restart a sli-3 hba
e59058c4
JS
4543 * @phba: Pointer to HBA context object.
4544 *
4545 * This function is called in the SLI initialization code path to
4546 * restart the HBA. The caller is not required to hold any lock.
4547 * This function writes MBX_RESTART mailbox command to the SLIM and
4548 * resets the HBA. At the end of the function, it calls lpfc_hba_down_post
4549 * function to free any pending commands. The function enables
4550 * POST only during the first initialization. The function returns zero.
4551 * The function does not guarantee completion of MBX_RESTART mailbox
4552 * command before the return of this function.
4553 **/
da0436e9
JS
4554static int
4555lpfc_sli_brdrestart_s3(struct lpfc_hba *phba)
41415862
JW
4556{
4557 MAILBOX_t *mb;
4558 struct lpfc_sli *psli;
41415862
JW
4559 volatile uint32_t word0;
4560 void __iomem *to_slim;
0d878419 4561 uint32_t hba_aer_enabled;
41415862 4562
2e0fef85 4563 spin_lock_irq(&phba->hbalock);
41415862 4564
0d878419
JS
4565 /* Take PCIe device Advanced Error Reporting (AER) state */
4566 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4567
41415862
JW
4568 psli = &phba->sli;
4569
4570 /* Restart HBA */
4571 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4572 "0337 Restart HBA Data: x%x x%x\n",
4492b739
JS
4573 (phba->pport) ? phba->pport->port_state : 0,
4574 psli->sli_flag);
41415862
JW
4575
4576 word0 = 0;
4577 mb = (MAILBOX_t *) &word0;
4578 mb->mbxCommand = MBX_RESTART;
4579 mb->mbxHc = 1;
4580
9290831f
JS
4581 lpfc_reset_barrier(phba);
4582
41415862
JW
4583 to_slim = phba->MBslimaddr;
4584 writel(*(uint32_t *) mb, to_slim);
4585 readl(to_slim); /* flush */
4586
4587 /* Only skip post after fc_ffinit is completed */
4492b739 4588 if (phba->pport && phba->pport->port_state)
41415862 4589 word0 = 1; /* This is really setting up word1 */
eaf15d5b 4590 else
41415862 4591 word0 = 0; /* This is really setting up word1 */
65a29c16 4592 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW
4593 writel(*(uint32_t *) mb, to_slim);
4594 readl(to_slim); /* flush */
dea3101e 4595
41415862 4596 lpfc_sli_brdreset(phba);
4492b739
JS
4597 if (phba->pport)
4598 phba->pport->stopped = 0;
2e0fef85 4599 phba->link_state = LPFC_INIT_START;
da0436e9 4600 phba->hba_flag = 0;
2e0fef85 4601 spin_unlock_irq(&phba->hbalock);
41415862 4602
64ba8818 4603 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4604 psli->stats_start = ktime_get_seconds();
64ba8818 4605
eaf15d5b
JS
4606 /* Give the INITFF and Post time to settle. */
4607 mdelay(100);
41415862 4608
0d878419
JS
4609 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4610 if (hba_aer_enabled)
4611 pci_disable_pcie_error_reporting(phba->pcidev);
4612
41415862 4613 lpfc_hba_down_post(phba);
dea3101e
JB
4614
4615 return 0;
4616}
4617
da0436e9
JS
4618/**
4619 * lpfc_sli_brdrestart_s4 - Restart the sli-4 hba
4620 * @phba: Pointer to HBA context object.
4621 *
4622 * This function is called in the SLI initialization code path to restart
4623 * a SLI4 HBA. The caller is not required to hold any lock.
4624 * At the end of the function, it calls lpfc_hba_down_post function to
4625 * free any pending commands.
4626 **/
4627static int
4628lpfc_sli_brdrestart_s4(struct lpfc_hba *phba)
4629{
4630 struct lpfc_sli *psli = &phba->sli;
75baf696 4631 uint32_t hba_aer_enabled;
27b01b82 4632 int rc;
da0436e9
JS
4633
4634 /* Restart HBA */
4635 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4636 "0296 Restart HBA Data: x%x x%x\n",
4637 phba->pport->port_state, psli->sli_flag);
4638
75baf696
JS
4639 /* Take PCIe device Advanced Error Reporting (AER) state */
4640 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4641
27b01b82 4642 rc = lpfc_sli4_brdreset(phba);
da0436e9
JS
4643
4644 spin_lock_irq(&phba->hbalock);
4645 phba->pport->stopped = 0;
4646 phba->link_state = LPFC_INIT_START;
4647 phba->hba_flag = 0;
4648 spin_unlock_irq(&phba->hbalock);
4649
4650 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4651 psli->stats_start = ktime_get_seconds();
da0436e9 4652
75baf696
JS
4653 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4654 if (hba_aer_enabled)
4655 pci_disable_pcie_error_reporting(phba->pcidev);
4656
da0436e9 4657 lpfc_hba_down_post(phba);
569dbe84 4658 lpfc_sli4_queue_destroy(phba);
da0436e9 4659
27b01b82 4660 return rc;
da0436e9
JS
4661}
4662
4663/**
4664 * lpfc_sli_brdrestart - Wrapper func for restarting hba
4665 * @phba: Pointer to HBA context object.
4666 *
4667 * This routine wraps the actual SLI3 or SLI4 hba restart routine from the
4668 * API jump table function pointer from the lpfc_hba struct.
4669**/
4670int
4671lpfc_sli_brdrestart(struct lpfc_hba *phba)
4672{
4673 return phba->lpfc_sli_brdrestart(phba);
4674}
4675
e59058c4 4676/**
3621a710 4677 * lpfc_sli_chipset_init - Wait for the restart of the HBA after a restart
e59058c4
JS
4678 * @phba: Pointer to HBA context object.
4679 *
4680 * This function is called after a HBA restart to wait for successful
4681 * restart of the HBA. Successful restart of the HBA is indicated by
4682 * HS_FFRDY and HS_MBRDY bits. If the HBA fails to restart even after 15
4683 * iteration, the function will restart the HBA again. The function returns
4684 * zero if HBA successfully restarted else returns negative error code.
4685 **/
4492b739 4686int
dea3101e
JB
4687lpfc_sli_chipset_init(struct lpfc_hba *phba)
4688{
4689 uint32_t status, i = 0;
4690
4691 /* Read the HBA Host Status Register */
9940b97b
JS
4692 if (lpfc_readl(phba->HSregaddr, &status))
4693 return -EIO;
dea3101e
JB
4694
4695 /* Check status register to see what current state is */
4696 i = 0;
4697 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
4698
dcf2a4e0
JS
4699 /* Check every 10ms for 10 retries, then every 100ms for 90
4700 * retries, then every 1 sec for 50 retires for a total of
4701 * ~60 seconds before reset the board again and check every
4702 * 1 sec for 50 retries. The up to 60 seconds before the
4703 * board ready is required by the Falcon FIPS zeroization
4704 * complete, and any reset the board in between shall cause
4705 * restart of zeroization, further delay the board ready.
dea3101e 4706 */
dcf2a4e0 4707 if (i++ >= 200) {
dea3101e
JB
4708 /* Adapter failed to init, timeout, status reg
4709 <status> */
ed957684 4710 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4711 "0436 Adapter failed to init, "
09372820
JS
4712 "timeout, status reg x%x, "
4713 "FW Data: A8 x%x AC x%x\n", status,
4714 readl(phba->MBslimaddr + 0xa8),
4715 readl(phba->MBslimaddr + 0xac));
2e0fef85 4716 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4717 return -ETIMEDOUT;
4718 }
4719
4720 /* Check to see if any errors occurred during init */
4721 if (status & HS_FFERM) {
4722 /* ERROR: During chipset initialization */
4723 /* Adapter failed to init, chipset, status reg
4724 <status> */
ed957684 4725 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4726 "0437 Adapter failed to init, "
09372820
JS
4727 "chipset, status reg x%x, "
4728 "FW Data: A8 x%x AC x%x\n", status,
4729 readl(phba->MBslimaddr + 0xa8),
4730 readl(phba->MBslimaddr + 0xac));
2e0fef85 4731 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4732 return -EIO;
4733 }
4734
dcf2a4e0 4735 if (i <= 10)
dea3101e 4736 msleep(10);
dcf2a4e0
JS
4737 else if (i <= 100)
4738 msleep(100);
4739 else
4740 msleep(1000);
dea3101e 4741
dcf2a4e0
JS
4742 if (i == 150) {
4743 /* Do post */
92d7f7b0 4744 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4745 lpfc_sli_brdrestart(phba);
dea3101e
JB
4746 }
4747 /* Read the HBA Host Status Register */
9940b97b
JS
4748 if (lpfc_readl(phba->HSregaddr, &status))
4749 return -EIO;
dea3101e
JB
4750 }
4751
4752 /* Check to see if any errors occurred during init */
4753 if (status & HS_FFERM) {
4754 /* ERROR: During chipset initialization */
4755 /* Adapter failed to init, chipset, status reg <status> */
ed957684 4756 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4757 "0438 Adapter failed to init, chipset, "
09372820
JS
4758 "status reg x%x, "
4759 "FW Data: A8 x%x AC x%x\n", status,
4760 readl(phba->MBslimaddr + 0xa8),
4761 readl(phba->MBslimaddr + 0xac));
2e0fef85 4762 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4763 return -EIO;
4764 }
4765
4766 /* Clear all interrupt enable conditions */
4767 writel(0, phba->HCregaddr);
4768 readl(phba->HCregaddr); /* flush */
4769
4770 /* setup host attn register */
4771 writel(0xffffffff, phba->HAregaddr);
4772 readl(phba->HAregaddr); /* flush */
4773 return 0;
4774}
4775
e59058c4 4776/**
3621a710 4777 * lpfc_sli_hbq_count - Get the number of HBQs to be configured
e59058c4
JS
4778 *
4779 * This function calculates and returns the number of HBQs required to be
4780 * configured.
4781 **/
78b2d852 4782int
ed957684
JS
4783lpfc_sli_hbq_count(void)
4784{
92d7f7b0 4785 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS
4786}
4787
e59058c4 4788/**
3621a710 4789 * lpfc_sli_hbq_entry_count - Calculate total number of hbq entries
e59058c4
JS
4790 *
4791 * This function adds the number of hbq entries in every HBQ to get
4792 * the total number of hbq entries required for the HBA and returns
4793 * the total count.
4794 **/
ed957684
JS
4795static int
4796lpfc_sli_hbq_entry_count(void)
4797{
4798 int hbq_count = lpfc_sli_hbq_count();
4799 int count = 0;
4800 int i;
4801
4802 for (i = 0; i < hbq_count; ++i)
92d7f7b0 4803 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS
4804 return count;
4805}
4806
e59058c4 4807/**
3621a710 4808 * lpfc_sli_hbq_size - Calculate memory required for all hbq entries
e59058c4
JS
4809 *
4810 * This function calculates amount of memory required for all hbq entries
4811 * to be configured and returns the total memory required.
4812 **/
dea3101e 4813int
ed957684
JS
4814lpfc_sli_hbq_size(void)
4815{
4816 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
4817}
4818
e59058c4 4819/**
3621a710 4820 * lpfc_sli_hbq_setup - configure and initialize HBQs
e59058c4
JS
4821 * @phba: Pointer to HBA context object.
4822 *
4823 * This function is called during the SLI initialization to configure
4824 * all the HBQs and post buffers to the HBQ. The caller is not
4825 * required to hold any locks. This function will return zero if successful
4826 * else it will return negative error code.
4827 **/
ed957684
JS
4828static int
4829lpfc_sli_hbq_setup(struct lpfc_hba *phba)
4830{
4831 int hbq_count = lpfc_sli_hbq_count();
4832 LPFC_MBOXQ_t *pmb;
4833 MAILBOX_t *pmbox;
4834 uint32_t hbqno;
4835 uint32_t hbq_entry_index;
ed957684 4836
92d7f7b0
JS
4837 /* Get a Mailbox buffer to setup mailbox
4838 * commands for HBA initialization
4839 */
ed957684
JS
4840 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4841
4842 if (!pmb)
4843 return -ENOMEM;
4844
04c68496 4845 pmbox = &pmb->u.mb;
ed957684
JS
4846
4847 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
4848 phba->link_state = LPFC_INIT_MBX_CMDS;
3163f725 4849 phba->hbq_in_use = 1;
ed957684
JS
4850
4851 hbq_entry_index = 0;
4852 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
4853 phba->hbqs[hbqno].next_hbqPutIdx = 0;
4854 phba->hbqs[hbqno].hbqPutIdx = 0;
4855 phba->hbqs[hbqno].local_hbqGetIdx = 0;
4856 phba->hbqs[hbqno].entry_count =
92d7f7b0 4857 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS
4858 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
4859 hbq_entry_index, pmb);
ed957684
JS
4860 hbq_entry_index += phba->hbqs[hbqno].entry_count;
4861
4862 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
4863 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
4864 mbxStatus <status>, ring <num> */
4865
4866 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 4867 LOG_SLI | LOG_VPORT,
e8b62011 4868 "1805 Adapter failed to init. "
ed957684 4869 "Data: x%x x%x x%x\n",
e8b62011 4870 pmbox->mbxCommand,
ed957684
JS
4871 pmbox->mbxStatus, hbqno);
4872
4873 phba->link_state = LPFC_HBA_ERROR;
4874 mempool_free(pmb, phba->mbox_mem_pool);
6e7288d9 4875 return -ENXIO;
ed957684
JS
4876 }
4877 }
4878 phba->hbq_count = hbq_count;
4879
ed957684
JS
4880 mempool_free(pmb, phba->mbox_mem_pool);
4881
92d7f7b0 4882 /* Initially populate or replenish the HBQs */
d7c255b2
JS
4883 for (hbqno = 0; hbqno < hbq_count; ++hbqno)
4884 lpfc_sli_hbqbuf_init_hbqs(phba, hbqno);
ed957684
JS
4885 return 0;
4886}
4887
4f774513
JS
4888/**
4889 * lpfc_sli4_rb_setup - Initialize and post RBs to HBA
4890 * @phba: Pointer to HBA context object.
4891 *
4892 * This function is called during the SLI initialization to configure
4893 * all the HBQs and post buffers to the HBQ. The caller is not
4894 * required to hold any locks. This function will return zero if successful
4895 * else it will return negative error code.
4896 **/
4897static int
4898lpfc_sli4_rb_setup(struct lpfc_hba *phba)
4899{
4900 phba->hbq_in_use = 1;
895427bd
JS
4901 phba->hbqs[LPFC_ELS_HBQ].entry_count =
4902 lpfc_hbq_defs[LPFC_ELS_HBQ]->entry_count;
4f774513 4903 phba->hbq_count = 1;
895427bd 4904 lpfc_sli_hbqbuf_init_hbqs(phba, LPFC_ELS_HBQ);
4f774513 4905 /* Initially populate or replenish the HBQs */
4f774513
JS
4906 return 0;
4907}
4908
e59058c4 4909/**
3621a710 4910 * lpfc_sli_config_port - Issue config port mailbox command
e59058c4
JS
4911 * @phba: Pointer to HBA context object.
4912 * @sli_mode: sli mode - 2/3
4913 *
183b8021 4914 * This function is called by the sli initialization code path
e59058c4
JS
4915 * to issue config_port mailbox command. This function restarts the
4916 * HBA firmware and issues a config_port mailbox command to configure
4917 * the SLI interface in the sli mode specified by sli_mode
4918 * variable. The caller is not required to hold any locks.
4919 * The function returns 0 if successful, else returns negative error
4920 * code.
4921 **/
9399627f
JS
4922int
4923lpfc_sli_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB
4924{
4925 LPFC_MBOXQ_t *pmb;
4926 uint32_t resetcount = 0, rc = 0, done = 0;
4927
4928 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4929 if (!pmb) {
2e0fef85 4930 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4931 return -ENOMEM;
4932 }
4933
ed957684 4934 phba->sli_rev = sli_mode;
dea3101e 4935 while (resetcount < 2 && !done) {
2e0fef85 4936 spin_lock_irq(&phba->hbalock);
1c067a42 4937 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 4938 spin_unlock_irq(&phba->hbalock);
92d7f7b0 4939 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4940 lpfc_sli_brdrestart(phba);
dea3101e
JB
4941 rc = lpfc_sli_chipset_init(phba);
4942 if (rc)
4943 break;
4944
2e0fef85 4945 spin_lock_irq(&phba->hbalock);
1c067a42 4946 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 4947 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
4948 resetcount++;
4949
ed957684
JS
4950 /* Call pre CONFIG_PORT mailbox command initialization. A
4951 * value of 0 means the call was successful. Any other
4952 * nonzero value is a failure, but if ERESTART is returned,
4953 * the driver may reset the HBA and try again.
4954 */
dea3101e
JB
4955 rc = lpfc_config_port_prep(phba);
4956 if (rc == -ERESTART) {
ed957684 4957 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e 4958 continue;
34b02dcd 4959 } else if (rc)
dea3101e 4960 break;
6d368e53 4961
2e0fef85 4962 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
4963 lpfc_config_port(phba, pmb);
4964 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
34b02dcd
JS
4965 phba->sli3_options &= ~(LPFC_SLI3_NPIV_ENABLED |
4966 LPFC_SLI3_HBQ_ENABLED |
4967 LPFC_SLI3_CRP_ENABLED |
bc73905a
JS
4968 LPFC_SLI3_BG_ENABLED |
4969 LPFC_SLI3_DSS_ENABLED);
ed957684 4970 if (rc != MBX_SUCCESS) {
dea3101e 4971 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4972 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 4973 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
04c68496 4974 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus, 0);
2e0fef85 4975 spin_lock_irq(&phba->hbalock);
04c68496 4976 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
2e0fef85
JS
4977 spin_unlock_irq(&phba->hbalock);
4978 rc = -ENXIO;
04c68496
JS
4979 } else {
4980 /* Allow asynchronous mailbox command to go through */
4981 spin_lock_irq(&phba->hbalock);
4982 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
4983 spin_unlock_irq(&phba->hbalock);
ed957684 4984 done = 1;
cb69f7de
JS
4985
4986 if ((pmb->u.mb.un.varCfgPort.casabt == 1) &&
4987 (pmb->u.mb.un.varCfgPort.gasabt == 0))
4988 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
4989 "3110 Port did not grant ASABT\n");
04c68496 4990 }
dea3101e 4991 }
ed957684
JS
4992 if (!done) {
4993 rc = -EINVAL;
4994 goto do_prep_failed;
4995 }
04c68496
JS
4996 if (pmb->u.mb.un.varCfgPort.sli_mode == 3) {
4997 if (!pmb->u.mb.un.varCfgPort.cMA) {
34b02dcd
JS
4998 rc = -ENXIO;
4999 goto do_prep_failed;
5000 }
04c68496 5001 if (phba->max_vpi && pmb->u.mb.un.varCfgPort.gmv) {
34b02dcd 5002 phba->sli3_options |= LPFC_SLI3_NPIV_ENABLED;
04c68496
JS
5003 phba->max_vpi = pmb->u.mb.un.varCfgPort.max_vpi;
5004 phba->max_vports = (phba->max_vpi > phba->max_vports) ?
5005 phba->max_vpi : phba->max_vports;
5006
34b02dcd
JS
5007 } else
5008 phba->max_vpi = 0;
bc73905a
JS
5009 phba->fips_level = 0;
5010 phba->fips_spec_rev = 0;
5011 if (pmb->u.mb.un.varCfgPort.gdss) {
04c68496 5012 phba->sli3_options |= LPFC_SLI3_DSS_ENABLED;
bc73905a
JS
5013 phba->fips_level = pmb->u.mb.un.varCfgPort.fips_level;
5014 phba->fips_spec_rev = pmb->u.mb.un.varCfgPort.fips_rev;
5015 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5016 "2850 Security Crypto Active. FIPS x%d "
5017 "(Spec Rev: x%d)",
5018 phba->fips_level, phba->fips_spec_rev);
5019 }
5020 if (pmb->u.mb.un.varCfgPort.sec_err) {
5021 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5022 "2856 Config Port Security Crypto "
5023 "Error: x%x ",
5024 pmb->u.mb.un.varCfgPort.sec_err);
5025 }
04c68496 5026 if (pmb->u.mb.un.varCfgPort.gerbm)
34b02dcd 5027 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
04c68496 5028 if (pmb->u.mb.un.varCfgPort.gcrp)
34b02dcd 5029 phba->sli3_options |= LPFC_SLI3_CRP_ENABLED;
6e7288d9
JS
5030
5031 phba->hbq_get = phba->mbox->us.s3_pgp.hbq_get;
5032 phba->port_gp = phba->mbox->us.s3_pgp.port;
e2a0a9d6 5033
f44ac12f
JS
5034 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
5035 if (pmb->u.mb.un.varCfgPort.gbg == 0) {
5036 phba->cfg_enable_bg = 0;
5037 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
e2a0a9d6
JS
5038 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5039 "0443 Adapter did not grant "
5040 "BlockGuard\n");
f44ac12f 5041 }
e2a0a9d6 5042 }
34b02dcd 5043 } else {
8f34f4ce 5044 phba->hbq_get = NULL;
34b02dcd 5045 phba->port_gp = phba->mbox->us.s2.port;
d7c255b2 5046 phba->max_vpi = 0;
ed957684 5047 }
92d7f7b0 5048do_prep_failed:
ed957684
JS
5049 mempool_free(pmb, phba->mbox_mem_pool);
5050 return rc;
5051}
5052
e59058c4
JS
5053
5054/**
183b8021 5055 * lpfc_sli_hba_setup - SLI initialization function
e59058c4
JS
5056 * @phba: Pointer to HBA context object.
5057 *
183b8021
MY
5058 * This function is the main SLI initialization function. This function
5059 * is called by the HBA initialization code, HBA reset code and HBA
e59058c4
JS
5060 * error attention handler code. Caller is not required to hold any
5061 * locks. This function issues config_port mailbox command to configure
5062 * the SLI, setup iocb rings and HBQ rings. In the end the function
5063 * calls the config_port_post function to issue init_link mailbox
5064 * command and to start the discovery. The function will return zero
5065 * if successful, else it will return negative error code.
5066 **/
ed957684
JS
5067int
5068lpfc_sli_hba_setup(struct lpfc_hba *phba)
5069{
5070 uint32_t rc;
6d368e53
JS
5071 int mode = 3, i;
5072 int longs;
ed957684 5073
12247e81 5074 switch (phba->cfg_sli_mode) {
ed957684 5075 case 2:
78b2d852 5076 if (phba->cfg_enable_npiv) {
92d7f7b0 5077 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81 5078 "1824 NPIV enabled: Override sli_mode "
92d7f7b0 5079 "parameter (%d) to auto (0).\n",
12247e81 5080 phba->cfg_sli_mode);
92d7f7b0
JS
5081 break;
5082 }
ed957684
JS
5083 mode = 2;
5084 break;
5085 case 0:
5086 case 3:
5087 break;
5088 default:
92d7f7b0 5089 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81
JS
5090 "1819 Unrecognized sli_mode parameter: %d.\n",
5091 phba->cfg_sli_mode);
ed957684
JS
5092
5093 break;
5094 }
b5c53958 5095 phba->fcp_embed_io = 0; /* SLI4 FC support only */
ed957684 5096
9399627f
JS
5097 rc = lpfc_sli_config_port(phba, mode);
5098
12247e81 5099 if (rc && phba->cfg_sli_mode == 3)
92d7f7b0 5100 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS
5101 "1820 Unable to select SLI-3. "
5102 "Not supported by adapter.\n");
ed957684 5103 if (rc && mode != 2)
9399627f 5104 rc = lpfc_sli_config_port(phba, 2);
4597663f
JS
5105 else if (rc && mode == 2)
5106 rc = lpfc_sli_config_port(phba, 3);
ed957684 5107 if (rc)
dea3101e
JB
5108 goto lpfc_sli_hba_setup_error;
5109
0d878419
JS
5110 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
5111 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
5112 rc = pci_enable_pcie_error_reporting(phba->pcidev);
5113 if (!rc) {
5114 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5115 "2709 This device supports "
5116 "Advanced Error Reporting (AER)\n");
5117 spin_lock_irq(&phba->hbalock);
5118 phba->hba_flag |= HBA_AER_ENABLED;
5119 spin_unlock_irq(&phba->hbalock);
5120 } else {
5121 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5122 "2708 This device does not support "
b069d7eb
JS
5123 "Advanced Error Reporting (AER): %d\n",
5124 rc);
0d878419
JS
5125 phba->cfg_aer_support = 0;
5126 }
5127 }
5128
ed957684
JS
5129 if (phba->sli_rev == 3) {
5130 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
5131 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
ed957684
JS
5132 } else {
5133 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
5134 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 5135 phba->sli3_options = 0;
ed957684
JS
5136 }
5137
5138 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
5139 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
5140 phba->sli_rev, phba->max_vpi);
ed957684 5141 rc = lpfc_sli_ring_map(phba);
dea3101e
JB
5142
5143 if (rc)
5144 goto lpfc_sli_hba_setup_error;
5145
6d368e53
JS
5146 /* Initialize VPIs. */
5147 if (phba->sli_rev == LPFC_SLI_REV3) {
5148 /*
5149 * The VPI bitmask and physical ID array are allocated
5150 * and initialized once only - at driver load. A port
5151 * reset doesn't need to reinitialize this memory.
5152 */
5153 if ((phba->vpi_bmask == NULL) && (phba->vpi_ids == NULL)) {
5154 longs = (phba->max_vpi + BITS_PER_LONG) / BITS_PER_LONG;
6396bb22
KC
5155 phba->vpi_bmask = kcalloc(longs,
5156 sizeof(unsigned long),
6d368e53
JS
5157 GFP_KERNEL);
5158 if (!phba->vpi_bmask) {
5159 rc = -ENOMEM;
5160 goto lpfc_sli_hba_setup_error;
5161 }
5162
6396bb22
KC
5163 phba->vpi_ids = kcalloc(phba->max_vpi + 1,
5164 sizeof(uint16_t),
5165 GFP_KERNEL);
6d368e53
JS
5166 if (!phba->vpi_ids) {
5167 kfree(phba->vpi_bmask);
5168 rc = -ENOMEM;
5169 goto lpfc_sli_hba_setup_error;
5170 }
5171 for (i = 0; i < phba->max_vpi; i++)
5172 phba->vpi_ids[i] = i;
5173 }
5174 }
5175
9399627f 5176 /* Init HBQs */
ed957684
JS
5177 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
5178 rc = lpfc_sli_hbq_setup(phba);
5179 if (rc)
5180 goto lpfc_sli_hba_setup_error;
5181 }
04c68496 5182 spin_lock_irq(&phba->hbalock);
dea3101e 5183 phba->sli.sli_flag |= LPFC_PROCESS_LA;
04c68496 5184 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
5185
5186 rc = lpfc_config_port_post(phba);
5187 if (rc)
5188 goto lpfc_sli_hba_setup_error;
5189
ed957684
JS
5190 return rc;
5191
92d7f7b0 5192lpfc_sli_hba_setup_error:
2e0fef85 5193 phba->link_state = LPFC_HBA_ERROR;
e40a02c1 5194 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 5195 "0445 Firmware initialization failed\n");
dea3101e
JB
5196 return rc;
5197}
5198
e59058c4 5199/**
da0436e9
JS
5200 * lpfc_sli4_read_fcoe_params - Read fcoe params from conf region
5201 * @phba: Pointer to HBA context object.
5202 * @mboxq: mailbox pointer.
5203 * This function issue a dump mailbox command to read config region
5204 * 23 and parse the records in the region and populate driver
5205 * data structure.
e59058c4 5206 **/
da0436e9 5207static int
ff78d8f9 5208lpfc_sli4_read_fcoe_params(struct lpfc_hba *phba)
dea3101e 5209{
ff78d8f9 5210 LPFC_MBOXQ_t *mboxq;
da0436e9
JS
5211 struct lpfc_dmabuf *mp;
5212 struct lpfc_mqe *mqe;
5213 uint32_t data_length;
5214 int rc;
dea3101e 5215
da0436e9
JS
5216 /* Program the default value of vlan_id and fc_map */
5217 phba->valid_vlan = 0;
5218 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5219 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5220 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
2e0fef85 5221
ff78d8f9
JS
5222 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5223 if (!mboxq)
da0436e9
JS
5224 return -ENOMEM;
5225
ff78d8f9
JS
5226 mqe = &mboxq->u.mqe;
5227 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq)) {
5228 rc = -ENOMEM;
5229 goto out_free_mboxq;
5230 }
5231
da0436e9
JS
5232 mp = (struct lpfc_dmabuf *) mboxq->context1;
5233 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5234
5235 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
5236 "(%d):2571 Mailbox cmd x%x Status x%x "
5237 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5238 "x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5239 "CQ: x%x x%x x%x x%x\n",
5240 mboxq->vport ? mboxq->vport->vpi : 0,
5241 bf_get(lpfc_mqe_command, mqe),
5242 bf_get(lpfc_mqe_status, mqe),
5243 mqe->un.mb_words[0], mqe->un.mb_words[1],
5244 mqe->un.mb_words[2], mqe->un.mb_words[3],
5245 mqe->un.mb_words[4], mqe->un.mb_words[5],
5246 mqe->un.mb_words[6], mqe->un.mb_words[7],
5247 mqe->un.mb_words[8], mqe->un.mb_words[9],
5248 mqe->un.mb_words[10], mqe->un.mb_words[11],
5249 mqe->un.mb_words[12], mqe->un.mb_words[13],
5250 mqe->un.mb_words[14], mqe->un.mb_words[15],
5251 mqe->un.mb_words[16], mqe->un.mb_words[50],
5252 mboxq->mcqe.word0,
5253 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
5254 mboxq->mcqe.trailer);
5255
5256 if (rc) {
5257 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5258 kfree(mp);
ff78d8f9
JS
5259 rc = -EIO;
5260 goto out_free_mboxq;
da0436e9
JS
5261 }
5262 data_length = mqe->un.mb_words[5];
a0c87cbd 5263 if (data_length > DMP_RGN23_SIZE) {
d11e31dd
JS
5264 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5265 kfree(mp);
ff78d8f9
JS
5266 rc = -EIO;
5267 goto out_free_mboxq;
d11e31dd 5268 }
dea3101e 5269
da0436e9
JS
5270 lpfc_parse_fcoe_conf(phba, mp->virt, data_length);
5271 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5272 kfree(mp);
ff78d8f9
JS
5273 rc = 0;
5274
5275out_free_mboxq:
5276 mempool_free(mboxq, phba->mbox_mem_pool);
5277 return rc;
da0436e9 5278}
e59058c4
JS
5279
5280/**
da0436e9
JS
5281 * lpfc_sli4_read_rev - Issue READ_REV and collect vpd data
5282 * @phba: pointer to lpfc hba data structure.
5283 * @mboxq: pointer to the LPFC_MBOXQ_t structure.
5284 * @vpd: pointer to the memory to hold resulting port vpd data.
5285 * @vpd_size: On input, the number of bytes allocated to @vpd.
5286 * On output, the number of data bytes in @vpd.
e59058c4 5287 *
da0436e9
JS
5288 * This routine executes a READ_REV SLI4 mailbox command. In
5289 * addition, this routine gets the port vpd data.
5290 *
5291 * Return codes
af901ca1 5292 * 0 - successful
d439d286 5293 * -ENOMEM - could not allocated memory.
e59058c4 5294 **/
da0436e9
JS
5295static int
5296lpfc_sli4_read_rev(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
5297 uint8_t *vpd, uint32_t *vpd_size)
dea3101e 5298{
da0436e9
JS
5299 int rc = 0;
5300 uint32_t dma_size;
5301 struct lpfc_dmabuf *dmabuf;
5302 struct lpfc_mqe *mqe;
dea3101e 5303
da0436e9
JS
5304 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
5305 if (!dmabuf)
5306 return -ENOMEM;
5307
5308 /*
5309 * Get a DMA buffer for the vpd data resulting from the READ_REV
5310 * mailbox command.
a257bf90 5311 */
da0436e9 5312 dma_size = *vpd_size;
1aee383d
JP
5313 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, dma_size,
5314 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
5315 if (!dmabuf->virt) {
5316 kfree(dmabuf);
5317 return -ENOMEM;
a257bf90
JS
5318 }
5319
da0436e9
JS
5320 /*
5321 * The SLI4 implementation of READ_REV conflicts at word1,
5322 * bits 31:16 and SLI4 adds vpd functionality not present
5323 * in SLI3. This code corrects the conflicts.
1dcb58e5 5324 */
da0436e9
JS
5325 lpfc_read_rev(phba, mboxq);
5326 mqe = &mboxq->u.mqe;
5327 mqe->un.read_rev.vpd_paddr_high = putPaddrHigh(dmabuf->phys);
5328 mqe->un.read_rev.vpd_paddr_low = putPaddrLow(dmabuf->phys);
5329 mqe->un.read_rev.word1 &= 0x0000FFFF;
5330 bf_set(lpfc_mbx_rd_rev_vpd, &mqe->un.read_rev, 1);
5331 bf_set(lpfc_mbx_rd_rev_avail_len, &mqe->un.read_rev, dma_size);
5332
5333 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5334 if (rc) {
5335 dma_free_coherent(&phba->pcidev->dev, dma_size,
5336 dmabuf->virt, dmabuf->phys);
def9c7a9 5337 kfree(dmabuf);
da0436e9
JS
5338 return -EIO;
5339 }
1dcb58e5 5340
da0436e9
JS
5341 /*
5342 * The available vpd length cannot be bigger than the
5343 * DMA buffer passed to the port. Catch the less than
5344 * case and update the caller's size.
5345 */
5346 if (mqe->un.read_rev.avail_vpd_len < *vpd_size)
5347 *vpd_size = mqe->un.read_rev.avail_vpd_len;
3772a991 5348
d7c47992
JS
5349 memcpy(vpd, dmabuf->virt, *vpd_size);
5350
da0436e9
JS
5351 dma_free_coherent(&phba->pcidev->dev, dma_size,
5352 dmabuf->virt, dmabuf->phys);
5353 kfree(dmabuf);
5354 return 0;
dea3101e
JB
5355}
5356
cd1c8301
JS
5357/**
5358 * lpfc_sli4_retrieve_pport_name - Retrieve SLI4 device physical port name
5359 * @phba: pointer to lpfc hba data structure.
5360 *
5361 * This routine retrieves SLI4 device physical port name this PCI function
5362 * is attached to.
5363 *
5364 * Return codes
4907cb7b 5365 * 0 - successful
cd1c8301
JS
5366 * otherwise - failed to retrieve physical port name
5367 **/
5368static int
5369lpfc_sli4_retrieve_pport_name(struct lpfc_hba *phba)
5370{
5371 LPFC_MBOXQ_t *mboxq;
cd1c8301
JS
5372 struct lpfc_mbx_get_cntl_attributes *mbx_cntl_attr;
5373 struct lpfc_controller_attribute *cntl_attr;
5374 struct lpfc_mbx_get_port_name *get_port_name;
5375 void *virtaddr = NULL;
5376 uint32_t alloclen, reqlen;
5377 uint32_t shdr_status, shdr_add_status;
5378 union lpfc_sli4_cfg_shdr *shdr;
5379 char cport_name = 0;
5380 int rc;
5381
5382 /* We assume nothing at this point */
5383 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5384 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_NON;
5385
5386 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5387 if (!mboxq)
5388 return -ENOMEM;
cd1c8301 5389 /* obtain link type and link number via READ_CONFIG */
ff78d8f9
JS
5390 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5391 lpfc_sli4_read_config(phba);
5392 if (phba->sli4_hba.lnk_info.lnk_dv == LPFC_LNK_DAT_VAL)
5393 goto retrieve_ppname;
cd1c8301
JS
5394
5395 /* obtain link type and link number via COMMON_GET_CNTL_ATTRIBUTES */
5396 reqlen = sizeof(struct lpfc_mbx_get_cntl_attributes);
5397 alloclen = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5398 LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES, reqlen,
5399 LPFC_SLI4_MBX_NEMBED);
5400 if (alloclen < reqlen) {
5401 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5402 "3084 Allocated DMA memory size (%d) is "
5403 "less than the requested DMA memory size "
5404 "(%d)\n", alloclen, reqlen);
5405 rc = -ENOMEM;
5406 goto out_free_mboxq;
5407 }
5408 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5409 virtaddr = mboxq->sge_array->addr[0];
5410 mbx_cntl_attr = (struct lpfc_mbx_get_cntl_attributes *)virtaddr;
5411 shdr = &mbx_cntl_attr->cfg_shdr;
5412 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5413 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5414 if (shdr_status || shdr_add_status || rc) {
5415 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5416 "3085 Mailbox x%x (x%x/x%x) failed, "
5417 "rc:x%x, status:x%x, add_status:x%x\n",
5418 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5419 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5420 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5421 rc, shdr_status, shdr_add_status);
5422 rc = -ENXIO;
5423 goto out_free_mboxq;
5424 }
5425 cntl_attr = &mbx_cntl_attr->cntl_attr;
5426 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
5427 phba->sli4_hba.lnk_info.lnk_tp =
5428 bf_get(lpfc_cntl_attr_lnk_type, cntl_attr);
5429 phba->sli4_hba.lnk_info.lnk_no =
5430 bf_get(lpfc_cntl_attr_lnk_numb, cntl_attr);
5431 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5432 "3086 lnk_type:%d, lnk_numb:%d\n",
5433 phba->sli4_hba.lnk_info.lnk_tp,
5434 phba->sli4_hba.lnk_info.lnk_no);
5435
5436retrieve_ppname:
5437 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5438 LPFC_MBOX_OPCODE_GET_PORT_NAME,
5439 sizeof(struct lpfc_mbx_get_port_name) -
5440 sizeof(struct lpfc_sli4_cfg_mhdr),
5441 LPFC_SLI4_MBX_EMBED);
5442 get_port_name = &mboxq->u.mqe.un.get_port_name;
5443 shdr = (union lpfc_sli4_cfg_shdr *)&get_port_name->header.cfg_shdr;
5444 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_OPCODE_VERSION_1);
5445 bf_set(lpfc_mbx_get_port_name_lnk_type, &get_port_name->u.request,
5446 phba->sli4_hba.lnk_info.lnk_tp);
5447 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5448 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5449 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5450 if (shdr_status || shdr_add_status || rc) {
5451 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5452 "3087 Mailbox x%x (x%x/x%x) failed: "
5453 "rc:x%x, status:x%x, add_status:x%x\n",
5454 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5455 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5456 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5457 rc, shdr_status, shdr_add_status);
5458 rc = -ENXIO;
5459 goto out_free_mboxq;
5460 }
5461 switch (phba->sli4_hba.lnk_info.lnk_no) {
5462 case LPFC_LINK_NUMBER_0:
5463 cport_name = bf_get(lpfc_mbx_get_port_name_name0,
5464 &get_port_name->u.response);
5465 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5466 break;
5467 case LPFC_LINK_NUMBER_1:
5468 cport_name = bf_get(lpfc_mbx_get_port_name_name1,
5469 &get_port_name->u.response);
5470 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5471 break;
5472 case LPFC_LINK_NUMBER_2:
5473 cport_name = bf_get(lpfc_mbx_get_port_name_name2,
5474 &get_port_name->u.response);
5475 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5476 break;
5477 case LPFC_LINK_NUMBER_3:
5478 cport_name = bf_get(lpfc_mbx_get_port_name_name3,
5479 &get_port_name->u.response);
5480 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5481 break;
5482 default:
5483 break;
5484 }
5485
5486 if (phba->sli4_hba.pport_name_sta == LPFC_SLI4_PPNAME_GET) {
5487 phba->Port[0] = cport_name;
5488 phba->Port[1] = '\0';
5489 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5490 "3091 SLI get port name: %s\n", phba->Port);
5491 }
5492
5493out_free_mboxq:
5494 if (rc != MBX_TIMEOUT) {
5495 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5496 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5497 else
5498 mempool_free(mboxq, phba->mbox_mem_pool);
5499 }
5500 return rc;
5501}
5502
e59058c4 5503/**
da0436e9
JS
5504 * lpfc_sli4_arm_cqeq_intr - Arm sli-4 device completion and event queues
5505 * @phba: pointer to lpfc hba data structure.
e59058c4 5506 *
da0436e9
JS
5507 * This routine is called to explicitly arm the SLI4 device's completion and
5508 * event queues
5509 **/
5510static void
5511lpfc_sli4_arm_cqeq_intr(struct lpfc_hba *phba)
5512{
895427bd 5513 int qidx;
b71413dd 5514 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
da0436e9 5515
b71413dd
JS
5516 sli4_hba->sli4_cq_release(sli4_hba->mbx_cq, LPFC_QUEUE_REARM);
5517 sli4_hba->sli4_cq_release(sli4_hba->els_cq, LPFC_QUEUE_REARM);
5518 if (sli4_hba->nvmels_cq)
5519 sli4_hba->sli4_cq_release(sli4_hba->nvmels_cq,
895427bd
JS
5520 LPFC_QUEUE_REARM);
5521
b71413dd 5522 if (sli4_hba->fcp_cq)
895427bd 5523 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
b71413dd 5524 sli4_hba->sli4_cq_release(sli4_hba->fcp_cq[qidx],
895427bd
JS
5525 LPFC_QUEUE_REARM);
5526
b71413dd 5527 if (sli4_hba->nvme_cq)
895427bd 5528 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
b71413dd 5529 sli4_hba->sli4_cq_release(sli4_hba->nvme_cq[qidx],
895427bd 5530 LPFC_QUEUE_REARM);
1ba981fd 5531
f38fa0bb 5532 if (phba->cfg_fof)
b71413dd 5533 sli4_hba->sli4_cq_release(sli4_hba->oas_cq, LPFC_QUEUE_REARM);
1ba981fd 5534
b71413dd 5535 if (sli4_hba->hba_eq)
895427bd 5536 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
b71413dd
JS
5537 sli4_hba->sli4_eq_release(sli4_hba->hba_eq[qidx],
5538 LPFC_QUEUE_REARM);
1ba981fd 5539
2d7dbc4c
JS
5540 if (phba->nvmet_support) {
5541 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) {
b71413dd
JS
5542 sli4_hba->sli4_cq_release(
5543 sli4_hba->nvmet_cqset[qidx],
2d7dbc4c
JS
5544 LPFC_QUEUE_REARM);
5545 }
2e90f4b5 5546 }
1ba981fd
JS
5547
5548 if (phba->cfg_fof)
b71413dd 5549 sli4_hba->sli4_eq_release(sli4_hba->fof_eq, LPFC_QUEUE_REARM);
da0436e9
JS
5550}
5551
6d368e53
JS
5552/**
5553 * lpfc_sli4_get_avail_extnt_rsrc - Get available resource extent count.
5554 * @phba: Pointer to HBA context object.
5555 * @type: The resource extent type.
b76f2dc9
JS
5556 * @extnt_count: buffer to hold port available extent count.
5557 * @extnt_size: buffer to hold element count per extent.
6d368e53 5558 *
b76f2dc9
JS
5559 * This function calls the port and retrievs the number of available
5560 * extents and their size for a particular extent type.
5561 *
5562 * Returns: 0 if successful. Nonzero otherwise.
6d368e53 5563 **/
b76f2dc9 5564int
6d368e53
JS
5565lpfc_sli4_get_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type,
5566 uint16_t *extnt_count, uint16_t *extnt_size)
5567{
5568 int rc = 0;
5569 uint32_t length;
5570 uint32_t mbox_tmo;
5571 struct lpfc_mbx_get_rsrc_extent_info *rsrc_info;
5572 LPFC_MBOXQ_t *mbox;
5573
5574 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5575 if (!mbox)
5576 return -ENOMEM;
5577
5578 /* Find out how many extents are available for this resource type */
5579 length = (sizeof(struct lpfc_mbx_get_rsrc_extent_info) -
5580 sizeof(struct lpfc_sli4_cfg_mhdr));
5581 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5582 LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO,
5583 length, LPFC_SLI4_MBX_EMBED);
5584
5585 /* Send an extents count of 0 - the GET doesn't use it. */
5586 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
5587 LPFC_SLI4_MBX_EMBED);
5588 if (unlikely(rc)) {
5589 rc = -EIO;
5590 goto err_exit;
5591 }
5592
5593 if (!phba->sli4_hba.intr_enable)
5594 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5595 else {
a183a15f 5596 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5597 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5598 }
5599 if (unlikely(rc)) {
5600 rc = -EIO;
5601 goto err_exit;
5602 }
5603
5604 rsrc_info = &mbox->u.mqe.un.rsrc_extent_info;
5605 if (bf_get(lpfc_mbox_hdr_status,
5606 &rsrc_info->header.cfg_shdr.response)) {
5607 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5608 "2930 Failed to get resource extents "
5609 "Status 0x%x Add'l Status 0x%x\n",
5610 bf_get(lpfc_mbox_hdr_status,
5611 &rsrc_info->header.cfg_shdr.response),
5612 bf_get(lpfc_mbox_hdr_add_status,
5613 &rsrc_info->header.cfg_shdr.response));
5614 rc = -EIO;
5615 goto err_exit;
5616 }
5617
5618 *extnt_count = bf_get(lpfc_mbx_get_rsrc_extent_info_cnt,
5619 &rsrc_info->u.rsp);
5620 *extnt_size = bf_get(lpfc_mbx_get_rsrc_extent_info_size,
5621 &rsrc_info->u.rsp);
8a9d2e80
JS
5622
5623 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5624 "3162 Retrieved extents type-%d from port: count:%d, "
5625 "size:%d\n", type, *extnt_count, *extnt_size);
5626
5627err_exit:
6d368e53
JS
5628 mempool_free(mbox, phba->mbox_mem_pool);
5629 return rc;
5630}
5631
5632/**
5633 * lpfc_sli4_chk_avail_extnt_rsrc - Check for available SLI4 resource extents.
5634 * @phba: Pointer to HBA context object.
5635 * @type: The extent type to check.
5636 *
5637 * This function reads the current available extents from the port and checks
5638 * if the extent count or extent size has changed since the last access.
5639 * Callers use this routine post port reset to understand if there is a
5640 * extent reprovisioning requirement.
5641 *
5642 * Returns:
5643 * -Error: error indicates problem.
5644 * 1: Extent count or size has changed.
5645 * 0: No changes.
5646 **/
5647static int
5648lpfc_sli4_chk_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type)
5649{
5650 uint16_t curr_ext_cnt, rsrc_ext_cnt;
5651 uint16_t size_diff, rsrc_ext_size;
5652 int rc = 0;
5653 struct lpfc_rsrc_blks *rsrc_entry;
5654 struct list_head *rsrc_blk_list = NULL;
5655
5656 size_diff = 0;
5657 curr_ext_cnt = 0;
5658 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5659 &rsrc_ext_cnt,
5660 &rsrc_ext_size);
5661 if (unlikely(rc))
5662 return -EIO;
5663
5664 switch (type) {
5665 case LPFC_RSC_TYPE_FCOE_RPI:
5666 rsrc_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5667 break;
5668 case LPFC_RSC_TYPE_FCOE_VPI:
5669 rsrc_blk_list = &phba->lpfc_vpi_blk_list;
5670 break;
5671 case LPFC_RSC_TYPE_FCOE_XRI:
5672 rsrc_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5673 break;
5674 case LPFC_RSC_TYPE_FCOE_VFI:
5675 rsrc_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5676 break;
5677 default:
5678 break;
5679 }
5680
5681 list_for_each_entry(rsrc_entry, rsrc_blk_list, list) {
5682 curr_ext_cnt++;
5683 if (rsrc_entry->rsrc_size != rsrc_ext_size)
5684 size_diff++;
5685 }
5686
5687 if (curr_ext_cnt != rsrc_ext_cnt || size_diff != 0)
5688 rc = 1;
5689
5690 return rc;
5691}
5692
5693/**
5694 * lpfc_sli4_cfg_post_extnts -
5695 * @phba: Pointer to HBA context object.
5696 * @extnt_cnt - number of available extents.
5697 * @type - the extent type (rpi, xri, vfi, vpi).
5698 * @emb - buffer to hold either MBX_EMBED or MBX_NEMBED operation.
5699 * @mbox - pointer to the caller's allocated mailbox structure.
5700 *
5701 * This function executes the extents allocation request. It also
5702 * takes care of the amount of memory needed to allocate or get the
5703 * allocated extents. It is the caller's responsibility to evaluate
5704 * the response.
5705 *
5706 * Returns:
5707 * -Error: Error value describes the condition found.
5708 * 0: if successful
5709 **/
5710static int
8a9d2e80 5711lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t extnt_cnt,
6d368e53
JS
5712 uint16_t type, bool *emb, LPFC_MBOXQ_t *mbox)
5713{
5714 int rc = 0;
5715 uint32_t req_len;
5716 uint32_t emb_len;
5717 uint32_t alloc_len, mbox_tmo;
5718
5719 /* Calculate the total requested length of the dma memory */
8a9d2e80 5720 req_len = extnt_cnt * sizeof(uint16_t);
6d368e53
JS
5721
5722 /*
5723 * Calculate the size of an embedded mailbox. The uint32_t
5724 * accounts for extents-specific word.
5725 */
5726 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
5727 sizeof(uint32_t);
5728
5729 /*
5730 * Presume the allocation and response will fit into an embedded
5731 * mailbox. If not true, reconfigure to a non-embedded mailbox.
5732 */
5733 *emb = LPFC_SLI4_MBX_EMBED;
5734 if (req_len > emb_len) {
8a9d2e80 5735 req_len = extnt_cnt * sizeof(uint16_t) +
6d368e53
JS
5736 sizeof(union lpfc_sli4_cfg_shdr) +
5737 sizeof(uint32_t);
5738 *emb = LPFC_SLI4_MBX_NEMBED;
5739 }
5740
5741 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5742 LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT,
5743 req_len, *emb);
5744 if (alloc_len < req_len) {
5745 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
b76f2dc9 5746 "2982 Allocated DMA memory size (x%x) is "
6d368e53
JS
5747 "less than the requested DMA memory "
5748 "size (x%x)\n", alloc_len, req_len);
5749 return -ENOMEM;
5750 }
8a9d2e80 5751 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, extnt_cnt, type, *emb);
6d368e53
JS
5752 if (unlikely(rc))
5753 return -EIO;
5754
5755 if (!phba->sli4_hba.intr_enable)
5756 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5757 else {
a183a15f 5758 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5759 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5760 }
5761
5762 if (unlikely(rc))
5763 rc = -EIO;
5764 return rc;
5765}
5766
5767/**
5768 * lpfc_sli4_alloc_extent - Allocate an SLI4 resource extent.
5769 * @phba: Pointer to HBA context object.
5770 * @type: The resource extent type to allocate.
5771 *
5772 * This function allocates the number of elements for the specified
5773 * resource type.
5774 **/
5775static int
5776lpfc_sli4_alloc_extent(struct lpfc_hba *phba, uint16_t type)
5777{
5778 bool emb = false;
5779 uint16_t rsrc_id_cnt, rsrc_cnt, rsrc_size;
5780 uint16_t rsrc_id, rsrc_start, j, k;
5781 uint16_t *ids;
5782 int i, rc;
5783 unsigned long longs;
5784 unsigned long *bmask;
5785 struct lpfc_rsrc_blks *rsrc_blks;
5786 LPFC_MBOXQ_t *mbox;
5787 uint32_t length;
5788 struct lpfc_id_range *id_array = NULL;
5789 void *virtaddr = NULL;
5790 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
5791 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
5792 struct list_head *ext_blk_list;
5793
5794 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5795 &rsrc_cnt,
5796 &rsrc_size);
5797 if (unlikely(rc))
5798 return -EIO;
5799
5800 if ((rsrc_cnt == 0) || (rsrc_size == 0)) {
5801 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5802 "3009 No available Resource Extents "
5803 "for resource type 0x%x: Count: 0x%x, "
5804 "Size 0x%x\n", type, rsrc_cnt,
5805 rsrc_size);
5806 return -ENOMEM;
5807 }
5808
8a9d2e80
JS
5809 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_INIT | LOG_SLI,
5810 "2903 Post resource extents type-0x%x: "
5811 "count:%d, size %d\n", type, rsrc_cnt, rsrc_size);
6d368e53
JS
5812
5813 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5814 if (!mbox)
5815 return -ENOMEM;
5816
8a9d2e80 5817 rc = lpfc_sli4_cfg_post_extnts(phba, rsrc_cnt, type, &emb, mbox);
6d368e53
JS
5818 if (unlikely(rc)) {
5819 rc = -EIO;
5820 goto err_exit;
5821 }
5822
5823 /*
5824 * Figure out where the response is located. Then get local pointers
5825 * to the response data. The port does not guarantee to respond to
5826 * all extents counts request so update the local variable with the
5827 * allocated count from the port.
5828 */
5829 if (emb == LPFC_SLI4_MBX_EMBED) {
5830 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
5831 id_array = &rsrc_ext->u.rsp.id[0];
5832 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
5833 } else {
5834 virtaddr = mbox->sge_array->addr[0];
5835 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
5836 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
5837 id_array = &n_rsrc->id;
5838 }
5839
5840 longs = ((rsrc_cnt * rsrc_size) + BITS_PER_LONG - 1) / BITS_PER_LONG;
5841 rsrc_id_cnt = rsrc_cnt * rsrc_size;
5842
5843 /*
5844 * Based on the resource size and count, correct the base and max
5845 * resource values.
5846 */
5847 length = sizeof(struct lpfc_rsrc_blks);
5848 switch (type) {
5849 case LPFC_RSC_TYPE_FCOE_RPI:
6396bb22 5850 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
5851 sizeof(unsigned long),
5852 GFP_KERNEL);
5853 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
5854 rc = -ENOMEM;
5855 goto err_exit;
5856 }
6396bb22 5857 phba->sli4_hba.rpi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5858 sizeof(uint16_t),
5859 GFP_KERNEL);
5860 if (unlikely(!phba->sli4_hba.rpi_ids)) {
5861 kfree(phba->sli4_hba.rpi_bmask);
5862 rc = -ENOMEM;
5863 goto err_exit;
5864 }
5865
5866 /*
5867 * The next_rpi was initialized with the maximum available
5868 * count but the port may allocate a smaller number. Catch
5869 * that case and update the next_rpi.
5870 */
5871 phba->sli4_hba.next_rpi = rsrc_id_cnt;
5872
5873 /* Initialize local ptrs for common extent processing later. */
5874 bmask = phba->sli4_hba.rpi_bmask;
5875 ids = phba->sli4_hba.rpi_ids;
5876 ext_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5877 break;
5878 case LPFC_RSC_TYPE_FCOE_VPI:
6396bb22 5879 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
5880 GFP_KERNEL);
5881 if (unlikely(!phba->vpi_bmask)) {
5882 rc = -ENOMEM;
5883 goto err_exit;
5884 }
6396bb22 5885 phba->vpi_ids = kcalloc(rsrc_id_cnt, sizeof(uint16_t),
6d368e53
JS
5886 GFP_KERNEL);
5887 if (unlikely(!phba->vpi_ids)) {
5888 kfree(phba->vpi_bmask);
5889 rc = -ENOMEM;
5890 goto err_exit;
5891 }
5892
5893 /* Initialize local ptrs for common extent processing later. */
5894 bmask = phba->vpi_bmask;
5895 ids = phba->vpi_ids;
5896 ext_blk_list = &phba->lpfc_vpi_blk_list;
5897 break;
5898 case LPFC_RSC_TYPE_FCOE_XRI:
6396bb22 5899 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
5900 sizeof(unsigned long),
5901 GFP_KERNEL);
5902 if (unlikely(!phba->sli4_hba.xri_bmask)) {
5903 rc = -ENOMEM;
5904 goto err_exit;
5905 }
8a9d2e80 5906 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 5907 phba->sli4_hba.xri_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5908 sizeof(uint16_t),
5909 GFP_KERNEL);
5910 if (unlikely(!phba->sli4_hba.xri_ids)) {
5911 kfree(phba->sli4_hba.xri_bmask);
5912 rc = -ENOMEM;
5913 goto err_exit;
5914 }
5915
5916 /* Initialize local ptrs for common extent processing later. */
5917 bmask = phba->sli4_hba.xri_bmask;
5918 ids = phba->sli4_hba.xri_ids;
5919 ext_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5920 break;
5921 case LPFC_RSC_TYPE_FCOE_VFI:
6396bb22 5922 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
5923 sizeof(unsigned long),
5924 GFP_KERNEL);
5925 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
5926 rc = -ENOMEM;
5927 goto err_exit;
5928 }
6396bb22 5929 phba->sli4_hba.vfi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5930 sizeof(uint16_t),
5931 GFP_KERNEL);
5932 if (unlikely(!phba->sli4_hba.vfi_ids)) {
5933 kfree(phba->sli4_hba.vfi_bmask);
5934 rc = -ENOMEM;
5935 goto err_exit;
5936 }
5937
5938 /* Initialize local ptrs for common extent processing later. */
5939 bmask = phba->sli4_hba.vfi_bmask;
5940 ids = phba->sli4_hba.vfi_ids;
5941 ext_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5942 break;
5943 default:
5944 /* Unsupported Opcode. Fail call. */
5945 id_array = NULL;
5946 bmask = NULL;
5947 ids = NULL;
5948 ext_blk_list = NULL;
5949 goto err_exit;
5950 }
5951
5952 /*
5953 * Complete initializing the extent configuration with the
5954 * allocated ids assigned to this function. The bitmask serves
5955 * as an index into the array and manages the available ids. The
5956 * array just stores the ids communicated to the port via the wqes.
5957 */
5958 for (i = 0, j = 0, k = 0; i < rsrc_cnt; i++) {
5959 if ((i % 2) == 0)
5960 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_0,
5961 &id_array[k]);
5962 else
5963 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_1,
5964 &id_array[k]);
5965
5966 rsrc_blks = kzalloc(length, GFP_KERNEL);
5967 if (unlikely(!rsrc_blks)) {
5968 rc = -ENOMEM;
5969 kfree(bmask);
5970 kfree(ids);
5971 goto err_exit;
5972 }
5973 rsrc_blks->rsrc_start = rsrc_id;
5974 rsrc_blks->rsrc_size = rsrc_size;
5975 list_add_tail(&rsrc_blks->list, ext_blk_list);
5976 rsrc_start = rsrc_id;
895427bd 5977 if ((type == LPFC_RSC_TYPE_FCOE_XRI) && (j == 0)) {
6d368e53 5978 phba->sli4_hba.scsi_xri_start = rsrc_start +
895427bd
JS
5979 lpfc_sli4_get_iocb_cnt(phba);
5980 phba->sli4_hba.nvme_xri_start =
5981 phba->sli4_hba.scsi_xri_start +
5982 phba->sli4_hba.scsi_xri_max;
5983 }
6d368e53
JS
5984
5985 while (rsrc_id < (rsrc_start + rsrc_size)) {
5986 ids[j] = rsrc_id;
5987 rsrc_id++;
5988 j++;
5989 }
5990 /* Entire word processed. Get next word.*/
5991 if ((i % 2) == 1)
5992 k++;
5993 }
5994 err_exit:
5995 lpfc_sli4_mbox_cmd_free(phba, mbox);
5996 return rc;
5997}
5998
895427bd
JS
5999
6000
6d368e53
JS
6001/**
6002 * lpfc_sli4_dealloc_extent - Deallocate an SLI4 resource extent.
6003 * @phba: Pointer to HBA context object.
6004 * @type: the extent's type.
6005 *
6006 * This function deallocates all extents of a particular resource type.
6007 * SLI4 does not allow for deallocating a particular extent range. It
6008 * is the caller's responsibility to release all kernel memory resources.
6009 **/
6010static int
6011lpfc_sli4_dealloc_extent(struct lpfc_hba *phba, uint16_t type)
6012{
6013 int rc;
6014 uint32_t length, mbox_tmo = 0;
6015 LPFC_MBOXQ_t *mbox;
6016 struct lpfc_mbx_dealloc_rsrc_extents *dealloc_rsrc;
6017 struct lpfc_rsrc_blks *rsrc_blk, *rsrc_blk_next;
6018
6019 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6020 if (!mbox)
6021 return -ENOMEM;
6022
6023 /*
6024 * This function sends an embedded mailbox because it only sends the
6025 * the resource type. All extents of this type are released by the
6026 * port.
6027 */
6028 length = (sizeof(struct lpfc_mbx_dealloc_rsrc_extents) -
6029 sizeof(struct lpfc_sli4_cfg_mhdr));
6030 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6031 LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT,
6032 length, LPFC_SLI4_MBX_EMBED);
6033
6034 /* Send an extents count of 0 - the dealloc doesn't use it. */
6035 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
6036 LPFC_SLI4_MBX_EMBED);
6037 if (unlikely(rc)) {
6038 rc = -EIO;
6039 goto out_free_mbox;
6040 }
6041 if (!phba->sli4_hba.intr_enable)
6042 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6043 else {
a183a15f 6044 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
6045 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6046 }
6047 if (unlikely(rc)) {
6048 rc = -EIO;
6049 goto out_free_mbox;
6050 }
6051
6052 dealloc_rsrc = &mbox->u.mqe.un.dealloc_rsrc_extents;
6053 if (bf_get(lpfc_mbox_hdr_status,
6054 &dealloc_rsrc->header.cfg_shdr.response)) {
6055 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6056 "2919 Failed to release resource extents "
6057 "for type %d - Status 0x%x Add'l Status 0x%x. "
6058 "Resource memory not released.\n",
6059 type,
6060 bf_get(lpfc_mbox_hdr_status,
6061 &dealloc_rsrc->header.cfg_shdr.response),
6062 bf_get(lpfc_mbox_hdr_add_status,
6063 &dealloc_rsrc->header.cfg_shdr.response));
6064 rc = -EIO;
6065 goto out_free_mbox;
6066 }
6067
6068 /* Release kernel memory resources for the specific type. */
6069 switch (type) {
6070 case LPFC_RSC_TYPE_FCOE_VPI:
6071 kfree(phba->vpi_bmask);
6072 kfree(phba->vpi_ids);
6073 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6074 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6075 &phba->lpfc_vpi_blk_list, list) {
6076 list_del_init(&rsrc_blk->list);
6077 kfree(rsrc_blk);
6078 }
16a3a208 6079 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6080 break;
6081 case LPFC_RSC_TYPE_FCOE_XRI:
6082 kfree(phba->sli4_hba.xri_bmask);
6083 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6084 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6085 &phba->sli4_hba.lpfc_xri_blk_list, list) {
6086 list_del_init(&rsrc_blk->list);
6087 kfree(rsrc_blk);
6088 }
6089 break;
6090 case LPFC_RSC_TYPE_FCOE_VFI:
6091 kfree(phba->sli4_hba.vfi_bmask);
6092 kfree(phba->sli4_hba.vfi_ids);
6093 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6094 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6095 &phba->sli4_hba.lpfc_vfi_blk_list, list) {
6096 list_del_init(&rsrc_blk->list);
6097 kfree(rsrc_blk);
6098 }
6099 break;
6100 case LPFC_RSC_TYPE_FCOE_RPI:
6101 /* RPI bitmask and physical id array are cleaned up earlier. */
6102 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6103 &phba->sli4_hba.lpfc_rpi_blk_list, list) {
6104 list_del_init(&rsrc_blk->list);
6105 kfree(rsrc_blk);
6106 }
6107 break;
6108 default:
6109 break;
6110 }
6111
6112 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6113
6114 out_free_mbox:
6115 mempool_free(mbox, phba->mbox_mem_pool);
6116 return rc;
6117}
6118
bd4b3e5c 6119static void
7bdedb34
JS
6120lpfc_set_features(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox,
6121 uint32_t feature)
65791f1f 6122{
65791f1f 6123 uint32_t len;
65791f1f 6124
65791f1f
JS
6125 len = sizeof(struct lpfc_mbx_set_feature) -
6126 sizeof(struct lpfc_sli4_cfg_mhdr);
6127 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6128 LPFC_MBOX_OPCODE_SET_FEATURES, len,
6129 LPFC_SLI4_MBX_EMBED);
7bdedb34
JS
6130
6131 switch (feature) {
6132 case LPFC_SET_UE_RECOVERY:
6133 bf_set(lpfc_mbx_set_feature_UER,
6134 &mbox->u.mqe.un.set_feature, 1);
6135 mbox->u.mqe.un.set_feature.feature = LPFC_SET_UE_RECOVERY;
6136 mbox->u.mqe.un.set_feature.param_len = 8;
6137 break;
6138 case LPFC_SET_MDS_DIAGS:
6139 bf_set(lpfc_mbx_set_feature_mds,
6140 &mbox->u.mqe.un.set_feature, 1);
6141 bf_set(lpfc_mbx_set_feature_mds_deep_loopbk,
ae9e28f3 6142 &mbox->u.mqe.un.set_feature, 1);
7bdedb34
JS
6143 mbox->u.mqe.un.set_feature.feature = LPFC_SET_MDS_DIAGS;
6144 mbox->u.mqe.un.set_feature.param_len = 8;
6145 break;
65791f1f 6146 }
7bdedb34
JS
6147
6148 return;
65791f1f
JS
6149}
6150
d2cc9bcd
JS
6151/**
6152 * lpfc_sli4_ras_dma_free - Free memory allocated for FW logging.
6153 * @phba: Pointer to HBA context object.
6154 *
6155 * This function is called to free memory allocated for RAS FW logging
6156 * support in the driver.
6157 **/
6158void
6159lpfc_sli4_ras_dma_free(struct lpfc_hba *phba)
6160{
6161 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6162 struct lpfc_dmabuf *dmabuf, *next;
6163
6164 if (!list_empty(&ras_fwlog->fwlog_buff_list)) {
6165 list_for_each_entry_safe(dmabuf, next,
6166 &ras_fwlog->fwlog_buff_list,
6167 list) {
6168 list_del(&dmabuf->list);
6169 dma_free_coherent(&phba->pcidev->dev,
6170 LPFC_RAS_MAX_ENTRY_SIZE,
6171 dmabuf->virt, dmabuf->phys);
6172 kfree(dmabuf);
6173 }
6174 }
6175
6176 if (ras_fwlog->lwpd.virt) {
6177 dma_free_coherent(&phba->pcidev->dev,
6178 sizeof(uint32_t) * 2,
6179 ras_fwlog->lwpd.virt,
6180 ras_fwlog->lwpd.phys);
6181 ras_fwlog->lwpd.virt = NULL;
6182 }
6183
6184 ras_fwlog->ras_active = false;
6185}
6186
6187/**
6188 * lpfc_sli4_ras_dma_alloc: Allocate memory for FW support
6189 * @phba: Pointer to HBA context object.
6190 * @fwlog_buff_count: Count of buffers to be created.
6191 *
6192 * This routine DMA memory for Log Write Position Data[LPWD] and buffer
6193 * to update FW log is posted to the adapter.
6194 * Buffer count is calculated based on module param ras_fwlog_buffsize
6195 * Size of each buffer posted to FW is 64K.
6196 **/
6197
6198static int
6199lpfc_sli4_ras_dma_alloc(struct lpfc_hba *phba,
6200 uint32_t fwlog_buff_count)
6201{
6202 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6203 struct lpfc_dmabuf *dmabuf;
6204 int rc = 0, i = 0;
6205
6206 /* Initialize List */
6207 INIT_LIST_HEAD(&ras_fwlog->fwlog_buff_list);
6208
6209 /* Allocate memory for the LWPD */
6210 ras_fwlog->lwpd.virt = dma_alloc_coherent(&phba->pcidev->dev,
6211 sizeof(uint32_t) * 2,
6212 &ras_fwlog->lwpd.phys,
6213 GFP_KERNEL);
6214 if (!ras_fwlog->lwpd.virt) {
6215 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6216 "6185 LWPD Memory Alloc Failed\n");
6217
6218 return -ENOMEM;
6219 }
6220
6221 ras_fwlog->fw_buffcount = fwlog_buff_count;
6222 for (i = 0; i < ras_fwlog->fw_buffcount; i++) {
6223 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
6224 GFP_KERNEL);
6225 if (!dmabuf) {
6226 rc = -ENOMEM;
6227 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6228 "6186 Memory Alloc failed FW logging");
6229 goto free_mem;
6230 }
6231
6232 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
6233 LPFC_RAS_MAX_ENTRY_SIZE,
6234 &dmabuf->phys,
6235 GFP_KERNEL);
6236 if (!dmabuf->virt) {
6237 kfree(dmabuf);
6238 rc = -ENOMEM;
6239 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6240 "6187 DMA Alloc Failed FW logging");
6241 goto free_mem;
6242 }
6243 memset(dmabuf->virt, 0, LPFC_RAS_MAX_ENTRY_SIZE);
6244 dmabuf->buffer_tag = i;
6245 list_add_tail(&dmabuf->list, &ras_fwlog->fwlog_buff_list);
6246 }
6247
6248free_mem:
6249 if (rc)
6250 lpfc_sli4_ras_dma_free(phba);
6251
6252 return rc;
6253}
6254
6255/**
6256 * lpfc_sli4_ras_mbox_cmpl: Completion handler for RAS MBX command
6257 * @phba: pointer to lpfc hba data structure.
6258 * @pmboxq: pointer to the driver internal queue element for mailbox command.
6259 *
6260 * Completion handler for driver's RAS MBX command to the device.
6261 **/
6262static void
6263lpfc_sli4_ras_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
6264{
6265 MAILBOX_t *mb;
6266 union lpfc_sli4_cfg_shdr *shdr;
6267 uint32_t shdr_status, shdr_add_status;
6268 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6269
6270 mb = &pmb->u.mb;
6271
6272 shdr = (union lpfc_sli4_cfg_shdr *)
6273 &pmb->u.mqe.un.ras_fwlog.header.cfg_shdr;
6274 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
6275 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
6276
6277 if (mb->mbxStatus != MBX_SUCCESS || shdr_status) {
6278 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
6279 "6188 FW LOG mailbox "
6280 "completed with status x%x add_status x%x,"
6281 " mbx status x%x\n",
6282 shdr_status, shdr_add_status, mb->mbxStatus);
6283 goto disable_ras;
6284 }
6285
6286 ras_fwlog->ras_active = true;
6287 mempool_free(pmb, phba->mbox_mem_pool);
6288
6289 return;
6290
6291disable_ras:
6292 /* Free RAS DMA memory */
6293 lpfc_sli4_ras_dma_free(phba);
6294 mempool_free(pmb, phba->mbox_mem_pool);
6295}
6296
6297/**
6298 * lpfc_sli4_ras_fwlog_init: Initialize memory and post RAS MBX command
6299 * @phba: pointer to lpfc hba data structure.
6300 * @fwlog_level: Logging verbosity level.
6301 * @fwlog_enable: Enable/Disable logging.
6302 *
6303 * Initialize memory and post mailbox command to enable FW logging in host
6304 * memory.
6305 **/
6306int
6307lpfc_sli4_ras_fwlog_init(struct lpfc_hba *phba,
6308 uint32_t fwlog_level,
6309 uint32_t fwlog_enable)
6310{
6311 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6312 struct lpfc_mbx_set_ras_fwlog *mbx_fwlog = NULL;
6313 struct lpfc_dmabuf *dmabuf;
6314 LPFC_MBOXQ_t *mbox;
6315 uint32_t len = 0, fwlog_buffsize, fwlog_entry_count;
6316 int rc = 0;
6317
6318 fwlog_buffsize = (LPFC_RAS_MIN_BUFF_POST_SIZE *
6319 phba->cfg_ras_fwlog_buffsize);
6320 fwlog_entry_count = (fwlog_buffsize/LPFC_RAS_MAX_ENTRY_SIZE);
6321
6322 /*
6323 * If re-enabling FW logging support use earlier allocated
6324 * DMA buffers while posting MBX command.
6325 **/
6326 if (!ras_fwlog->lwpd.virt) {
6327 rc = lpfc_sli4_ras_dma_alloc(phba, fwlog_entry_count);
6328 if (rc) {
6329 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6330 "6189 RAS FW Log Support Not Enabled");
6331 return rc;
6332 }
6333 }
6334
6335 /* Setup Mailbox command */
6336 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6337 if (!mbox) {
6338 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6339 "6190 RAS MBX Alloc Failed");
6340 rc = -ENOMEM;
6341 goto mem_free;
6342 }
6343
6344 ras_fwlog->fw_loglevel = fwlog_level;
6345 len = (sizeof(struct lpfc_mbx_set_ras_fwlog) -
6346 sizeof(struct lpfc_sli4_cfg_mhdr));
6347
6348 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_LOWLEVEL,
6349 LPFC_MBOX_OPCODE_SET_DIAG_LOG_OPTION,
6350 len, LPFC_SLI4_MBX_EMBED);
6351
6352 mbx_fwlog = (struct lpfc_mbx_set_ras_fwlog *)&mbox->u.mqe.un.ras_fwlog;
6353 bf_set(lpfc_fwlog_enable, &mbx_fwlog->u.request,
6354 fwlog_enable);
6355 bf_set(lpfc_fwlog_loglvl, &mbx_fwlog->u.request,
6356 ras_fwlog->fw_loglevel);
6357 bf_set(lpfc_fwlog_buffcnt, &mbx_fwlog->u.request,
6358 ras_fwlog->fw_buffcount);
6359 bf_set(lpfc_fwlog_buffsz, &mbx_fwlog->u.request,
6360 LPFC_RAS_MAX_ENTRY_SIZE/SLI4_PAGE_SIZE);
6361
6362 /* Update DMA buffer address */
6363 list_for_each_entry(dmabuf, &ras_fwlog->fwlog_buff_list, list) {
6364 memset(dmabuf->virt, 0, LPFC_RAS_MAX_ENTRY_SIZE);
6365
6366 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_lo =
6367 putPaddrLow(dmabuf->phys);
6368
6369 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_hi =
6370 putPaddrHigh(dmabuf->phys);
6371 }
6372
6373 /* Update LPWD address */
6374 mbx_fwlog->u.request.lwpd.addr_lo = putPaddrLow(ras_fwlog->lwpd.phys);
6375 mbx_fwlog->u.request.lwpd.addr_hi = putPaddrHigh(ras_fwlog->lwpd.phys);
6376
6377 mbox->vport = phba->pport;
6378 mbox->mbox_cmpl = lpfc_sli4_ras_mbox_cmpl;
6379
6380 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
6381
6382 if (rc == MBX_NOT_FINISHED) {
6383 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6384 "6191 RAS Mailbox failed. "
6385 "status %d mbxStatus : x%x", rc,
6386 bf_get(lpfc_mqe_status, &mbox->u.mqe));
6387 mempool_free(mbox, phba->mbox_mem_pool);
6388 rc = -EIO;
6389 goto mem_free;
6390 } else
6391 rc = 0;
6392mem_free:
6393 if (rc)
6394 lpfc_sli4_ras_dma_free(phba);
6395
6396 return rc;
6397}
6398
6399/**
6400 * lpfc_sli4_ras_setup - Check if RAS supported on the adapter
6401 * @phba: Pointer to HBA context object.
6402 *
6403 * Check if RAS is supported on the adapter and initialize it.
6404 **/
6405void
6406lpfc_sli4_ras_setup(struct lpfc_hba *phba)
6407{
6408 /* Check RAS FW Log needs to be enabled or not */
6409 if (lpfc_check_fwlog_support(phba))
6410 return;
6411
6412 lpfc_sli4_ras_fwlog_init(phba, phba->cfg_ras_fwlog_level,
6413 LPFC_RAS_ENABLE_LOGGING);
6414}
6415
6d368e53
JS
6416/**
6417 * lpfc_sli4_alloc_resource_identifiers - Allocate all SLI4 resource extents.
6418 * @phba: Pointer to HBA context object.
6419 *
6420 * This function allocates all SLI4 resource identifiers.
6421 **/
6422int
6423lpfc_sli4_alloc_resource_identifiers(struct lpfc_hba *phba)
6424{
6425 int i, rc, error = 0;
6426 uint16_t count, base;
6427 unsigned long longs;
6428
ff78d8f9
JS
6429 if (!phba->sli4_hba.rpi_hdrs_in_use)
6430 phba->sli4_hba.next_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
6d368e53
JS
6431 if (phba->sli4_hba.extents_in_use) {
6432 /*
6433 * The port supports resource extents. The XRI, VPI, VFI, RPI
6434 * resource extent count must be read and allocated before
6435 * provisioning the resource id arrays.
6436 */
6437 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
6438 LPFC_IDX_RSRC_RDY) {
6439 /*
6440 * Extent-based resources are set - the driver could
6441 * be in a port reset. Figure out if any corrective
6442 * actions need to be taken.
6443 */
6444 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6445 LPFC_RSC_TYPE_FCOE_VFI);
6446 if (rc != 0)
6447 error++;
6448 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6449 LPFC_RSC_TYPE_FCOE_VPI);
6450 if (rc != 0)
6451 error++;
6452 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6453 LPFC_RSC_TYPE_FCOE_XRI);
6454 if (rc != 0)
6455 error++;
6456 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6457 LPFC_RSC_TYPE_FCOE_RPI);
6458 if (rc != 0)
6459 error++;
6460
6461 /*
6462 * It's possible that the number of resources
6463 * provided to this port instance changed between
6464 * resets. Detect this condition and reallocate
6465 * resources. Otherwise, there is no action.
6466 */
6467 if (error) {
6468 lpfc_printf_log(phba, KERN_INFO,
6469 LOG_MBOX | LOG_INIT,
6470 "2931 Detected extent resource "
6471 "change. Reallocating all "
6472 "extents.\n");
6473 rc = lpfc_sli4_dealloc_extent(phba,
6474 LPFC_RSC_TYPE_FCOE_VFI);
6475 rc = lpfc_sli4_dealloc_extent(phba,
6476 LPFC_RSC_TYPE_FCOE_VPI);
6477 rc = lpfc_sli4_dealloc_extent(phba,
6478 LPFC_RSC_TYPE_FCOE_XRI);
6479 rc = lpfc_sli4_dealloc_extent(phba,
6480 LPFC_RSC_TYPE_FCOE_RPI);
6481 } else
6482 return 0;
6483 }
6484
6485 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6486 if (unlikely(rc))
6487 goto err_exit;
6488
6489 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6490 if (unlikely(rc))
6491 goto err_exit;
6492
6493 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6494 if (unlikely(rc))
6495 goto err_exit;
6496
6497 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6498 if (unlikely(rc))
6499 goto err_exit;
6500 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6501 LPFC_IDX_RSRC_RDY);
6502 return rc;
6503 } else {
6504 /*
6505 * The port does not support resource extents. The XRI, VPI,
6506 * VFI, RPI resource ids were determined from READ_CONFIG.
6507 * Just allocate the bitmasks and provision the resource id
6508 * arrays. If a port reset is active, the resources don't
6509 * need any action - just exit.
6510 */
6511 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
ff78d8f9
JS
6512 LPFC_IDX_RSRC_RDY) {
6513 lpfc_sli4_dealloc_resource_identifiers(phba);
6514 lpfc_sli4_remove_rpis(phba);
6515 }
6d368e53
JS
6516 /* RPIs. */
6517 count = phba->sli4_hba.max_cfg_param.max_rpi;
0a630c27
JS
6518 if (count <= 0) {
6519 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6520 "3279 Invalid provisioning of "
6521 "rpi:%d\n", count);
6522 rc = -EINVAL;
6523 goto err_exit;
6524 }
6d368e53
JS
6525 base = phba->sli4_hba.max_cfg_param.rpi_base;
6526 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6527 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
6528 sizeof(unsigned long),
6529 GFP_KERNEL);
6530 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
6531 rc = -ENOMEM;
6532 goto err_exit;
6533 }
6396bb22 6534 phba->sli4_hba.rpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6535 GFP_KERNEL);
6536 if (unlikely(!phba->sli4_hba.rpi_ids)) {
6537 rc = -ENOMEM;
6538 goto free_rpi_bmask;
6539 }
6540
6541 for (i = 0; i < count; i++)
6542 phba->sli4_hba.rpi_ids[i] = base + i;
6543
6544 /* VPIs. */
6545 count = phba->sli4_hba.max_cfg_param.max_vpi;
0a630c27
JS
6546 if (count <= 0) {
6547 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6548 "3280 Invalid provisioning of "
6549 "vpi:%d\n", count);
6550 rc = -EINVAL;
6551 goto free_rpi_ids;
6552 }
6d368e53
JS
6553 base = phba->sli4_hba.max_cfg_param.vpi_base;
6554 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6555 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
6556 GFP_KERNEL);
6557 if (unlikely(!phba->vpi_bmask)) {
6558 rc = -ENOMEM;
6559 goto free_rpi_ids;
6560 }
6396bb22 6561 phba->vpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6562 GFP_KERNEL);
6563 if (unlikely(!phba->vpi_ids)) {
6564 rc = -ENOMEM;
6565 goto free_vpi_bmask;
6566 }
6567
6568 for (i = 0; i < count; i++)
6569 phba->vpi_ids[i] = base + i;
6570
6571 /* XRIs. */
6572 count = phba->sli4_hba.max_cfg_param.max_xri;
0a630c27
JS
6573 if (count <= 0) {
6574 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6575 "3281 Invalid provisioning of "
6576 "xri:%d\n", count);
6577 rc = -EINVAL;
6578 goto free_vpi_ids;
6579 }
6d368e53
JS
6580 base = phba->sli4_hba.max_cfg_param.xri_base;
6581 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6582 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
6583 sizeof(unsigned long),
6584 GFP_KERNEL);
6585 if (unlikely(!phba->sli4_hba.xri_bmask)) {
6586 rc = -ENOMEM;
6587 goto free_vpi_ids;
6588 }
41899be7 6589 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 6590 phba->sli4_hba.xri_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6591 GFP_KERNEL);
6592 if (unlikely(!phba->sli4_hba.xri_ids)) {
6593 rc = -ENOMEM;
6594 goto free_xri_bmask;
6595 }
6596
6597 for (i = 0; i < count; i++)
6598 phba->sli4_hba.xri_ids[i] = base + i;
6599
6600 /* VFIs. */
6601 count = phba->sli4_hba.max_cfg_param.max_vfi;
0a630c27
JS
6602 if (count <= 0) {
6603 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6604 "3282 Invalid provisioning of "
6605 "vfi:%d\n", count);
6606 rc = -EINVAL;
6607 goto free_xri_ids;
6608 }
6d368e53
JS
6609 base = phba->sli4_hba.max_cfg_param.vfi_base;
6610 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6611 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
6612 sizeof(unsigned long),
6613 GFP_KERNEL);
6614 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
6615 rc = -ENOMEM;
6616 goto free_xri_ids;
6617 }
6396bb22 6618 phba->sli4_hba.vfi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6619 GFP_KERNEL);
6620 if (unlikely(!phba->sli4_hba.vfi_ids)) {
6621 rc = -ENOMEM;
6622 goto free_vfi_bmask;
6623 }
6624
6625 for (i = 0; i < count; i++)
6626 phba->sli4_hba.vfi_ids[i] = base + i;
6627
6628 /*
6629 * Mark all resources ready. An HBA reset doesn't need
6630 * to reset the initialization.
6631 */
6632 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6633 LPFC_IDX_RSRC_RDY);
6634 return 0;
6635 }
6636
6637 free_vfi_bmask:
6638 kfree(phba->sli4_hba.vfi_bmask);
cd60be49 6639 phba->sli4_hba.vfi_bmask = NULL;
6d368e53
JS
6640 free_xri_ids:
6641 kfree(phba->sli4_hba.xri_ids);
cd60be49 6642 phba->sli4_hba.xri_ids = NULL;
6d368e53
JS
6643 free_xri_bmask:
6644 kfree(phba->sli4_hba.xri_bmask);
cd60be49 6645 phba->sli4_hba.xri_bmask = NULL;
6d368e53
JS
6646 free_vpi_ids:
6647 kfree(phba->vpi_ids);
cd60be49 6648 phba->vpi_ids = NULL;
6d368e53
JS
6649 free_vpi_bmask:
6650 kfree(phba->vpi_bmask);
cd60be49 6651 phba->vpi_bmask = NULL;
6d368e53
JS
6652 free_rpi_ids:
6653 kfree(phba->sli4_hba.rpi_ids);
cd60be49 6654 phba->sli4_hba.rpi_ids = NULL;
6d368e53
JS
6655 free_rpi_bmask:
6656 kfree(phba->sli4_hba.rpi_bmask);
cd60be49 6657 phba->sli4_hba.rpi_bmask = NULL;
6d368e53
JS
6658 err_exit:
6659 return rc;
6660}
6661
6662/**
6663 * lpfc_sli4_dealloc_resource_identifiers - Deallocate all SLI4 resource extents.
6664 * @phba: Pointer to HBA context object.
6665 *
6666 * This function allocates the number of elements for the specified
6667 * resource type.
6668 **/
6669int
6670lpfc_sli4_dealloc_resource_identifiers(struct lpfc_hba *phba)
6671{
6672 if (phba->sli4_hba.extents_in_use) {
6673 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6674 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6675 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6676 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6677 } else {
6678 kfree(phba->vpi_bmask);
16a3a208 6679 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6680 kfree(phba->vpi_ids);
6681 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6682 kfree(phba->sli4_hba.xri_bmask);
6683 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6684 kfree(phba->sli4_hba.vfi_bmask);
6685 kfree(phba->sli4_hba.vfi_ids);
6686 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6687 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6688 }
6689
6690 return 0;
6691}
6692
b76f2dc9
JS
6693/**
6694 * lpfc_sli4_get_allocated_extnts - Get the port's allocated extents.
6695 * @phba: Pointer to HBA context object.
6696 * @type: The resource extent type.
6697 * @extnt_count: buffer to hold port extent count response
6698 * @extnt_size: buffer to hold port extent size response.
6699 *
6700 * This function calls the port to read the host allocated extents
6701 * for a particular type.
6702 **/
6703int
6704lpfc_sli4_get_allocated_extnts(struct lpfc_hba *phba, uint16_t type,
6705 uint16_t *extnt_cnt, uint16_t *extnt_size)
6706{
6707 bool emb;
6708 int rc = 0;
6709 uint16_t curr_blks = 0;
6710 uint32_t req_len, emb_len;
6711 uint32_t alloc_len, mbox_tmo;
6712 struct list_head *blk_list_head;
6713 struct lpfc_rsrc_blks *rsrc_blk;
6714 LPFC_MBOXQ_t *mbox;
6715 void *virtaddr = NULL;
6716 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
6717 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
6718 union lpfc_sli4_cfg_shdr *shdr;
6719
6720 switch (type) {
6721 case LPFC_RSC_TYPE_FCOE_VPI:
6722 blk_list_head = &phba->lpfc_vpi_blk_list;
6723 break;
6724 case LPFC_RSC_TYPE_FCOE_XRI:
6725 blk_list_head = &phba->sli4_hba.lpfc_xri_blk_list;
6726 break;
6727 case LPFC_RSC_TYPE_FCOE_VFI:
6728 blk_list_head = &phba->sli4_hba.lpfc_vfi_blk_list;
6729 break;
6730 case LPFC_RSC_TYPE_FCOE_RPI:
6731 blk_list_head = &phba->sli4_hba.lpfc_rpi_blk_list;
6732 break;
6733 default:
6734 return -EIO;
6735 }
6736
6737 /* Count the number of extents currently allocatd for this type. */
6738 list_for_each_entry(rsrc_blk, blk_list_head, list) {
6739 if (curr_blks == 0) {
6740 /*
6741 * The GET_ALLOCATED mailbox does not return the size,
6742 * just the count. The size should be just the size
6743 * stored in the current allocated block and all sizes
6744 * for an extent type are the same so set the return
6745 * value now.
6746 */
6747 *extnt_size = rsrc_blk->rsrc_size;
6748 }
6749 curr_blks++;
6750 }
6751
b76f2dc9
JS
6752 /*
6753 * Calculate the size of an embedded mailbox. The uint32_t
6754 * accounts for extents-specific word.
6755 */
6756 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
6757 sizeof(uint32_t);
6758
6759 /*
6760 * Presume the allocation and response will fit into an embedded
6761 * mailbox. If not true, reconfigure to a non-embedded mailbox.
6762 */
6763 emb = LPFC_SLI4_MBX_EMBED;
6764 req_len = emb_len;
6765 if (req_len > emb_len) {
6766 req_len = curr_blks * sizeof(uint16_t) +
6767 sizeof(union lpfc_sli4_cfg_shdr) +
6768 sizeof(uint32_t);
6769 emb = LPFC_SLI4_MBX_NEMBED;
6770 }
6771
6772 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6773 if (!mbox)
6774 return -ENOMEM;
6775 memset(mbox, 0, sizeof(LPFC_MBOXQ_t));
6776
6777 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6778 LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT,
6779 req_len, emb);
6780 if (alloc_len < req_len) {
6781 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6782 "2983 Allocated DMA memory size (x%x) is "
6783 "less than the requested DMA memory "
6784 "size (x%x)\n", alloc_len, req_len);
6785 rc = -ENOMEM;
6786 goto err_exit;
6787 }
6788 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, curr_blks, type, emb);
6789 if (unlikely(rc)) {
6790 rc = -EIO;
6791 goto err_exit;
6792 }
6793
6794 if (!phba->sli4_hba.intr_enable)
6795 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6796 else {
a183a15f 6797 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
b76f2dc9
JS
6798 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6799 }
6800
6801 if (unlikely(rc)) {
6802 rc = -EIO;
6803 goto err_exit;
6804 }
6805
6806 /*
6807 * Figure out where the response is located. Then get local pointers
6808 * to the response data. The port does not guarantee to respond to
6809 * all extents counts request so update the local variable with the
6810 * allocated count from the port.
6811 */
6812 if (emb == LPFC_SLI4_MBX_EMBED) {
6813 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
6814 shdr = &rsrc_ext->header.cfg_shdr;
6815 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
6816 } else {
6817 virtaddr = mbox->sge_array->addr[0];
6818 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
6819 shdr = &n_rsrc->cfg_shdr;
6820 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
6821 }
6822
6823 if (bf_get(lpfc_mbox_hdr_status, &shdr->response)) {
6824 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6825 "2984 Failed to read allocated resources "
6826 "for type %d - Status 0x%x Add'l Status 0x%x.\n",
6827 type,
6828 bf_get(lpfc_mbox_hdr_status, &shdr->response),
6829 bf_get(lpfc_mbox_hdr_add_status, &shdr->response));
6830 rc = -EIO;
6831 goto err_exit;
6832 }
6833 err_exit:
6834 lpfc_sli4_mbox_cmd_free(phba, mbox);
6835 return rc;
6836}
6837
8a9d2e80 6838/**
0ef69968 6839 * lpfc_sli4_repost_sgl_list - Repost the buffers sgl pages as block
8a9d2e80 6840 * @phba: pointer to lpfc hba data structure.
895427bd
JS
6841 * @pring: Pointer to driver SLI ring object.
6842 * @sgl_list: linked link of sgl buffers to post
6843 * @cnt: number of linked list buffers
8a9d2e80 6844 *
895427bd 6845 * This routine walks the list of buffers that have been allocated and
8a9d2e80
JS
6846 * repost them to the port by using SGL block post. This is needed after a
6847 * pci_function_reset/warm_start or start. It attempts to construct blocks
895427bd
JS
6848 * of buffer sgls which contains contiguous xris and uses the non-embedded
6849 * SGL block post mailbox commands to post them to the port. For single
8a9d2e80
JS
6850 * buffer sgl with non-contiguous xri, if any, it shall use embedded SGL post
6851 * mailbox command for posting.
6852 *
6853 * Returns: 0 = success, non-zero failure.
6854 **/
6855static int
895427bd
JS
6856lpfc_sli4_repost_sgl_list(struct lpfc_hba *phba,
6857 struct list_head *sgl_list, int cnt)
8a9d2e80
JS
6858{
6859 struct lpfc_sglq *sglq_entry = NULL;
6860 struct lpfc_sglq *sglq_entry_next = NULL;
6861 struct lpfc_sglq *sglq_entry_first = NULL;
895427bd
JS
6862 int status, total_cnt;
6863 int post_cnt = 0, num_posted = 0, block_cnt = 0;
8a9d2e80
JS
6864 int last_xritag = NO_XRI;
6865 LIST_HEAD(prep_sgl_list);
6866 LIST_HEAD(blck_sgl_list);
6867 LIST_HEAD(allc_sgl_list);
6868 LIST_HEAD(post_sgl_list);
6869 LIST_HEAD(free_sgl_list);
6870
38c20673 6871 spin_lock_irq(&phba->hbalock);
895427bd
JS
6872 spin_lock(&phba->sli4_hba.sgl_list_lock);
6873 list_splice_init(sgl_list, &allc_sgl_list);
6874 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 6875 spin_unlock_irq(&phba->hbalock);
8a9d2e80 6876
895427bd 6877 total_cnt = cnt;
8a9d2e80
JS
6878 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
6879 &allc_sgl_list, list) {
6880 list_del_init(&sglq_entry->list);
6881 block_cnt++;
6882 if ((last_xritag != NO_XRI) &&
6883 (sglq_entry->sli4_xritag != last_xritag + 1)) {
6884 /* a hole in xri block, form a sgl posting block */
6885 list_splice_init(&prep_sgl_list, &blck_sgl_list);
6886 post_cnt = block_cnt - 1;
6887 /* prepare list for next posting block */
6888 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6889 block_cnt = 1;
6890 } else {
6891 /* prepare list for next posting block */
6892 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6893 /* enough sgls for non-embed sgl mbox command */
6894 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
6895 list_splice_init(&prep_sgl_list,
6896 &blck_sgl_list);
6897 post_cnt = block_cnt;
6898 block_cnt = 0;
6899 }
6900 }
6901 num_posted++;
6902
6903 /* keep track of last sgl's xritag */
6904 last_xritag = sglq_entry->sli4_xritag;
6905
895427bd
JS
6906 /* end of repost sgl list condition for buffers */
6907 if (num_posted == total_cnt) {
8a9d2e80
JS
6908 if (post_cnt == 0) {
6909 list_splice_init(&prep_sgl_list,
6910 &blck_sgl_list);
6911 post_cnt = block_cnt;
6912 } else if (block_cnt == 1) {
6913 status = lpfc_sli4_post_sgl(phba,
6914 sglq_entry->phys, 0,
6915 sglq_entry->sli4_xritag);
6916 if (!status) {
6917 /* successful, put sgl to posted list */
6918 list_add_tail(&sglq_entry->list,
6919 &post_sgl_list);
6920 } else {
6921 /* Failure, put sgl to free list */
6922 lpfc_printf_log(phba, KERN_WARNING,
6923 LOG_SLI,
895427bd 6924 "3159 Failed to post "
8a9d2e80
JS
6925 "sgl, xritag:x%x\n",
6926 sglq_entry->sli4_xritag);
6927 list_add_tail(&sglq_entry->list,
6928 &free_sgl_list);
711ea882 6929 total_cnt--;
8a9d2e80
JS
6930 }
6931 }
6932 }
6933
6934 /* continue until a nembed page worth of sgls */
6935 if (post_cnt == 0)
6936 continue;
6937
895427bd
JS
6938 /* post the buffer list sgls as a block */
6939 status = lpfc_sli4_post_sgl_list(phba, &blck_sgl_list,
6940 post_cnt);
8a9d2e80
JS
6941
6942 if (!status) {
6943 /* success, put sgl list to posted sgl list */
6944 list_splice_init(&blck_sgl_list, &post_sgl_list);
6945 } else {
6946 /* Failure, put sgl list to free sgl list */
6947 sglq_entry_first = list_first_entry(&blck_sgl_list,
6948 struct lpfc_sglq,
6949 list);
6950 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
895427bd 6951 "3160 Failed to post sgl-list, "
8a9d2e80
JS
6952 "xritag:x%x-x%x\n",
6953 sglq_entry_first->sli4_xritag,
6954 (sglq_entry_first->sli4_xritag +
6955 post_cnt - 1));
6956 list_splice_init(&blck_sgl_list, &free_sgl_list);
711ea882 6957 total_cnt -= post_cnt;
8a9d2e80
JS
6958 }
6959
6960 /* don't reset xirtag due to hole in xri block */
6961 if (block_cnt == 0)
6962 last_xritag = NO_XRI;
6963
895427bd 6964 /* reset sgl post count for next round of posting */
8a9d2e80
JS
6965 post_cnt = 0;
6966 }
6967
895427bd 6968 /* free the sgls failed to post */
8a9d2e80
JS
6969 lpfc_free_sgl_list(phba, &free_sgl_list);
6970
895427bd 6971 /* push sgls posted to the available list */
8a9d2e80 6972 if (!list_empty(&post_sgl_list)) {
38c20673 6973 spin_lock_irq(&phba->hbalock);
895427bd
JS
6974 spin_lock(&phba->sli4_hba.sgl_list_lock);
6975 list_splice_init(&post_sgl_list, sgl_list);
6976 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 6977 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
6978 } else {
6979 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 6980 "3161 Failure to post sgl to port.\n");
8a9d2e80
JS
6981 return -EIO;
6982 }
895427bd
JS
6983
6984 /* return the number of XRIs actually posted */
6985 return total_cnt;
8a9d2e80
JS
6986}
6987
61bda8f7
JS
6988void
6989lpfc_set_host_data(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
6990{
6991 uint32_t len;
6992
6993 len = sizeof(struct lpfc_mbx_set_host_data) -
6994 sizeof(struct lpfc_sli4_cfg_mhdr);
6995 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6996 LPFC_MBOX_OPCODE_SET_HOST_DATA, len,
6997 LPFC_SLI4_MBX_EMBED);
6998
6999 mbox->u.mqe.un.set_host_data.param_id = LPFC_SET_HOST_OS_DRIVER_VERSION;
b2fd103b
JS
7000 mbox->u.mqe.un.set_host_data.param_len =
7001 LPFC_HOST_OS_DRIVER_VERSION_SIZE;
61bda8f7
JS
7002 snprintf(mbox->u.mqe.un.set_host_data.data,
7003 LPFC_HOST_OS_DRIVER_VERSION_SIZE,
7004 "Linux %s v"LPFC_DRIVER_VERSION,
7005 (phba->hba_flag & HBA_FCOE_MODE) ? "FCoE" : "FC");
7006}
7007
a8cf5dfe 7008int
6c621a22 7009lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
a8cf5dfe 7010 struct lpfc_queue *drq, int count, int idx)
6c621a22
JS
7011{
7012 int rc, i;
7013 struct lpfc_rqe hrqe;
7014 struct lpfc_rqe drqe;
7015 struct lpfc_rqb *rqbp;
411de511 7016 unsigned long flags;
6c621a22
JS
7017 struct rqb_dmabuf *rqb_buffer;
7018 LIST_HEAD(rqb_buf_list);
7019
411de511 7020 spin_lock_irqsave(&phba->hbalock, flags);
6c621a22
JS
7021 rqbp = hrq->rqbp;
7022 for (i = 0; i < count; i++) {
7023 /* IF RQ is already full, don't bother */
7024 if (rqbp->buffer_count + i >= rqbp->entry_count - 1)
7025 break;
7026 rqb_buffer = rqbp->rqb_alloc_buffer(phba);
7027 if (!rqb_buffer)
7028 break;
7029 rqb_buffer->hrq = hrq;
7030 rqb_buffer->drq = drq;
a8cf5dfe 7031 rqb_buffer->idx = idx;
6c621a22
JS
7032 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
7033 }
7034 while (!list_empty(&rqb_buf_list)) {
7035 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
7036 hbuf.list);
7037
7038 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
7039 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
7040 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
7041 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
7042 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
7043 if (rc < 0) {
411de511
JS
7044 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7045 "6421 Cannot post to HRQ %d: %x %x %x "
7046 "DRQ %x %x\n",
7047 hrq->queue_id,
7048 hrq->host_index,
7049 hrq->hba_index,
7050 hrq->entry_count,
7051 drq->host_index,
7052 drq->hba_index);
6c621a22
JS
7053 rqbp->rqb_free_buffer(phba, rqb_buffer);
7054 } else {
7055 list_add_tail(&rqb_buffer->hbuf.list,
7056 &rqbp->rqb_buffer_list);
7057 rqbp->buffer_count++;
7058 }
7059 }
411de511 7060 spin_unlock_irqrestore(&phba->hbalock, flags);
6c621a22
JS
7061 return 1;
7062}
7063
da0436e9 7064/**
183b8021 7065 * lpfc_sli4_hba_setup - SLI4 device initialization PCI function
da0436e9
JS
7066 * @phba: Pointer to HBA context object.
7067 *
183b8021
MY
7068 * This function is the main SLI4 device initialization PCI function. This
7069 * function is called by the HBA initialization code, HBA reset code and
da0436e9
JS
7070 * HBA error attention handler code. Caller is not required to hold any
7071 * locks.
7072 **/
7073int
7074lpfc_sli4_hba_setup(struct lpfc_hba *phba)
7075{
6c621a22 7076 int rc, i, cnt;
da0436e9
JS
7077 LPFC_MBOXQ_t *mboxq;
7078 struct lpfc_mqe *mqe;
7079 uint8_t *vpd;
7080 uint32_t vpd_size;
7081 uint32_t ftr_rsp = 0;
7082 struct Scsi_Host *shost = lpfc_shost_from_vport(phba->pport);
7083 struct lpfc_vport *vport = phba->pport;
7084 struct lpfc_dmabuf *mp;
2d7dbc4c 7085 struct lpfc_rqb *rqbp;
da0436e9
JS
7086
7087 /* Perform a PCI function reset to start from clean */
7088 rc = lpfc_pci_function_reset(phba);
7089 if (unlikely(rc))
7090 return -ENODEV;
7091
7092 /* Check the HBA Host Status Register for readyness */
7093 rc = lpfc_sli4_post_status_check(phba);
7094 if (unlikely(rc))
7095 return -ENODEV;
7096 else {
7097 spin_lock_irq(&phba->hbalock);
7098 phba->sli.sli_flag |= LPFC_SLI_ACTIVE;
7099 spin_unlock_irq(&phba->hbalock);
7100 }
7101
7102 /*
7103 * Allocate a single mailbox container for initializing the
7104 * port.
7105 */
7106 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7107 if (!mboxq)
7108 return -ENOMEM;
7109
da0436e9 7110 /* Issue READ_REV to collect vpd and FW information. */
49198b37 7111 vpd_size = SLI4_PAGE_SIZE;
da0436e9
JS
7112 vpd = kzalloc(vpd_size, GFP_KERNEL);
7113 if (!vpd) {
7114 rc = -ENOMEM;
7115 goto out_free_mbox;
7116 }
7117
7118 rc = lpfc_sli4_read_rev(phba, mboxq, vpd, &vpd_size);
76a95d75
JS
7119 if (unlikely(rc)) {
7120 kfree(vpd);
7121 goto out_free_mbox;
7122 }
572709e2 7123
da0436e9 7124 mqe = &mboxq->u.mqe;
f1126688 7125 phba->sli_rev = bf_get(lpfc_mbx_rd_rev_sli_lvl, &mqe->un.read_rev);
b5c53958 7126 if (bf_get(lpfc_mbx_rd_rev_fcoe, &mqe->un.read_rev)) {
76a95d75 7127 phba->hba_flag |= HBA_FCOE_MODE;
b5c53958
JS
7128 phba->fcp_embed_io = 0; /* SLI4 FC support only */
7129 } else {
76a95d75 7130 phba->hba_flag &= ~HBA_FCOE_MODE;
b5c53958 7131 }
45ed1190
JS
7132
7133 if (bf_get(lpfc_mbx_rd_rev_cee_ver, &mqe->un.read_rev) ==
7134 LPFC_DCBX_CEE_MODE)
7135 phba->hba_flag |= HBA_FIP_SUPPORT;
7136 else
7137 phba->hba_flag &= ~HBA_FIP_SUPPORT;
7138
4f2e66c6
JS
7139 phba->hba_flag &= ~HBA_FCP_IOQ_FLUSH;
7140
c31098ce 7141 if (phba->sli_rev != LPFC_SLI_REV4) {
da0436e9
JS
7142 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7143 "0376 READ_REV Error. SLI Level %d "
7144 "FCoE enabled %d\n",
76a95d75 7145 phba->sli_rev, phba->hba_flag & HBA_FCOE_MODE);
da0436e9 7146 rc = -EIO;
76a95d75
JS
7147 kfree(vpd);
7148 goto out_free_mbox;
da0436e9 7149 }
cd1c8301 7150
ff78d8f9
JS
7151 /*
7152 * Continue initialization with default values even if driver failed
7153 * to read FCoE param config regions, only read parameters if the
7154 * board is FCoE
7155 */
7156 if (phba->hba_flag & HBA_FCOE_MODE &&
7157 lpfc_sli4_read_fcoe_params(phba))
7158 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_INIT,
7159 "2570 Failed to read FCoE parameters\n");
7160
cd1c8301
JS
7161 /*
7162 * Retrieve sli4 device physical port name, failure of doing it
7163 * is considered as non-fatal.
7164 */
7165 rc = lpfc_sli4_retrieve_pport_name(phba);
7166 if (!rc)
7167 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7168 "3080 Successful retrieving SLI4 device "
7169 "physical port name: %s.\n", phba->Port);
7170
da0436e9
JS
7171 /*
7172 * Evaluate the read rev and vpd data. Populate the driver
7173 * state with the results. If this routine fails, the failure
7174 * is not fatal as the driver will use generic values.
7175 */
7176 rc = lpfc_parse_vpd(phba, vpd, vpd_size);
7177 if (unlikely(!rc)) {
7178 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7179 "0377 Error %d parsing vpd. "
7180 "Using defaults.\n", rc);
7181 rc = 0;
7182 }
76a95d75 7183 kfree(vpd);
da0436e9 7184
f1126688
JS
7185 /* Save information as VPD data */
7186 phba->vpd.rev.biuRev = mqe->un.read_rev.first_hw_rev;
7187 phba->vpd.rev.smRev = mqe->un.read_rev.second_hw_rev;
4e565cf0
JS
7188
7189 /*
7190 * This is because first G7 ASIC doesn't support the standard
7191 * 0x5a NVME cmd descriptor type/subtype
7192 */
7193 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7194 LPFC_SLI_INTF_IF_TYPE_6) &&
7195 (phba->vpd.rev.biuRev == LPFC_G7_ASIC_1) &&
7196 (phba->vpd.rev.smRev == 0) &&
7197 (phba->cfg_nvme_embed_cmd == 1))
7198 phba->cfg_nvme_embed_cmd = 0;
7199
f1126688
JS
7200 phba->vpd.rev.endecRev = mqe->un.read_rev.third_hw_rev;
7201 phba->vpd.rev.fcphHigh = bf_get(lpfc_mbx_rd_rev_fcph_high,
7202 &mqe->un.read_rev);
7203 phba->vpd.rev.fcphLow = bf_get(lpfc_mbx_rd_rev_fcph_low,
7204 &mqe->un.read_rev);
7205 phba->vpd.rev.feaLevelHigh = bf_get(lpfc_mbx_rd_rev_ftr_lvl_high,
7206 &mqe->un.read_rev);
7207 phba->vpd.rev.feaLevelLow = bf_get(lpfc_mbx_rd_rev_ftr_lvl_low,
7208 &mqe->un.read_rev);
7209 phba->vpd.rev.sli1FwRev = mqe->un.read_rev.fw_id_rev;
7210 memcpy(phba->vpd.rev.sli1FwName, mqe->un.read_rev.fw_name, 16);
7211 phba->vpd.rev.sli2FwRev = mqe->un.read_rev.ulp_fw_id_rev;
7212 memcpy(phba->vpd.rev.sli2FwName, mqe->un.read_rev.ulp_fw_name, 16);
7213 phba->vpd.rev.opFwRev = mqe->un.read_rev.fw_id_rev;
7214 memcpy(phba->vpd.rev.opFwName, mqe->un.read_rev.fw_name, 16);
7215 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7216 "(%d):0380 READ_REV Status x%x "
7217 "fw_rev:%s fcphHi:%x fcphLo:%x flHi:%x flLo:%x\n",
7218 mboxq->vport ? mboxq->vport->vpi : 0,
7219 bf_get(lpfc_mqe_status, mqe),
7220 phba->vpd.rev.opFwName,
7221 phba->vpd.rev.fcphHigh, phba->vpd.rev.fcphLow,
7222 phba->vpd.rev.feaLevelHigh, phba->vpd.rev.feaLevelLow);
da0436e9 7223
572709e2
JS
7224 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
7225 rc = (phba->sli4_hba.max_cfg_param.max_xri >> 3);
7226 if (phba->pport->cfg_lun_queue_depth > rc) {
7227 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7228 "3362 LUN queue depth changed from %d to %d\n",
7229 phba->pport->cfg_lun_queue_depth, rc);
7230 phba->pport->cfg_lun_queue_depth = rc;
7231 }
7232
65791f1f 7233 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7bdedb34
JS
7234 LPFC_SLI_INTF_IF_TYPE_0) {
7235 lpfc_set_features(phba, mboxq, LPFC_SET_UE_RECOVERY);
7236 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7237 if (rc == MBX_SUCCESS) {
7238 phba->hba_flag |= HBA_RECOVERABLE_UE;
7239 /* Set 1Sec interval to detect UE */
7240 phba->eratt_poll_interval = 1;
7241 phba->sli4_hba.ue_to_sr = bf_get(
7242 lpfc_mbx_set_feature_UESR,
7243 &mboxq->u.mqe.un.set_feature);
7244 phba->sli4_hba.ue_to_rp = bf_get(
7245 lpfc_mbx_set_feature_UERP,
7246 &mboxq->u.mqe.un.set_feature);
7247 }
7248 }
7249
7250 if (phba->cfg_enable_mds_diags && phba->mds_diags_support) {
7251 /* Enable MDS Diagnostics only if the SLI Port supports it */
7252 lpfc_set_features(phba, mboxq, LPFC_SET_MDS_DIAGS);
7253 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7254 if (rc != MBX_SUCCESS)
7255 phba->mds_diags_support = 0;
7256 }
572709e2 7257
da0436e9
JS
7258 /*
7259 * Discover the port's supported feature set and match it against the
7260 * hosts requests.
7261 */
7262 lpfc_request_features(phba, mboxq);
7263 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7264 if (unlikely(rc)) {
7265 rc = -EIO;
76a95d75 7266 goto out_free_mbox;
da0436e9
JS
7267 }
7268
7269 /*
7270 * The port must support FCP initiator mode as this is the
7271 * only mode running in the host.
7272 */
7273 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_fcpi, &mqe->un.req_ftrs))) {
7274 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7275 "0378 No support for fcpi mode.\n");
7276 ftr_rsp++;
7277 }
0bc2b7c5
JS
7278
7279 /* Performance Hints are ONLY for FCoE */
7280 if (phba->hba_flag & HBA_FCOE_MODE) {
7281 if (bf_get(lpfc_mbx_rq_ftr_rsp_perfh, &mqe->un.req_ftrs))
7282 phba->sli3_options |= LPFC_SLI4_PERFH_ENABLED;
7283 else
7284 phba->sli3_options &= ~LPFC_SLI4_PERFH_ENABLED;
7285 }
7286
da0436e9
JS
7287 /*
7288 * If the port cannot support the host's requested features
7289 * then turn off the global config parameters to disable the
7290 * feature in the driver. This is not a fatal error.
7291 */
f44ac12f
JS
7292 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
7293 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs))) {
7294 phba->cfg_enable_bg = 0;
7295 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
bf08611b 7296 ftr_rsp++;
f44ac12f 7297 }
bf08611b 7298 }
da0436e9
JS
7299
7300 if (phba->max_vpi && phba->cfg_enable_npiv &&
7301 !(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7302 ftr_rsp++;
7303
7304 if (ftr_rsp) {
7305 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7306 "0379 Feature Mismatch Data: x%08x %08x "
7307 "x%x x%x x%x\n", mqe->un.req_ftrs.word2,
7308 mqe->un.req_ftrs.word3, phba->cfg_enable_bg,
7309 phba->cfg_enable_npiv, phba->max_vpi);
7310 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs)))
7311 phba->cfg_enable_bg = 0;
7312 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7313 phba->cfg_enable_npiv = 0;
7314 }
7315
7316 /* These SLI3 features are assumed in SLI4 */
7317 spin_lock_irq(&phba->hbalock);
7318 phba->sli3_options |= (LPFC_SLI3_NPIV_ENABLED | LPFC_SLI3_HBQ_ENABLED);
7319 spin_unlock_irq(&phba->hbalock);
7320
6d368e53
JS
7321 /*
7322 * Allocate all resources (xri,rpi,vpi,vfi) now. Subsequent
7323 * calls depends on these resources to complete port setup.
7324 */
7325 rc = lpfc_sli4_alloc_resource_identifiers(phba);
7326 if (rc) {
7327 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7328 "2920 Failed to alloc Resource IDs "
7329 "rc = x%x\n", rc);
7330 goto out_free_mbox;
7331 }
7332
61bda8f7
JS
7333 lpfc_set_host_data(phba, mboxq);
7334
7335 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7336 if (rc) {
7337 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7338 "2134 Failed to set host os driver version %x",
7339 rc);
7340 }
7341
da0436e9 7342 /* Read the port's service parameters. */
9f1177a3
JS
7343 rc = lpfc_read_sparam(phba, mboxq, vport->vpi);
7344 if (rc) {
7345 phba->link_state = LPFC_HBA_ERROR;
7346 rc = -ENOMEM;
76a95d75 7347 goto out_free_mbox;
9f1177a3
JS
7348 }
7349
da0436e9
JS
7350 mboxq->vport = vport;
7351 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7352 mp = (struct lpfc_dmabuf *) mboxq->context1;
7353 if (rc == MBX_SUCCESS) {
7354 memcpy(&vport->fc_sparam, mp->virt, sizeof(struct serv_parm));
7355 rc = 0;
7356 }
7357
7358 /*
7359 * This memory was allocated by the lpfc_read_sparam routine. Release
7360 * it to the mbuf pool.
7361 */
7362 lpfc_mbuf_free(phba, mp->virt, mp->phys);
7363 kfree(mp);
7364 mboxq->context1 = NULL;
7365 if (unlikely(rc)) {
7366 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7367 "0382 READ_SPARAM command failed "
7368 "status %d, mbxStatus x%x\n",
7369 rc, bf_get(lpfc_mqe_status, mqe));
7370 phba->link_state = LPFC_HBA_ERROR;
7371 rc = -EIO;
76a95d75 7372 goto out_free_mbox;
da0436e9
JS
7373 }
7374
0558056c 7375 lpfc_update_vport_wwn(vport);
da0436e9
JS
7376
7377 /* Update the fc_host data structures with new wwn. */
7378 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
7379 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
7380
895427bd
JS
7381 /* Create all the SLI4 queues */
7382 rc = lpfc_sli4_queue_create(phba);
7383 if (rc) {
7384 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7385 "3089 Failed to allocate queues\n");
7386 rc = -ENODEV;
7387 goto out_free_mbox;
7388 }
7389 /* Set up all the queues to the device */
7390 rc = lpfc_sli4_queue_setup(phba);
7391 if (unlikely(rc)) {
7392 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7393 "0381 Error %d during queue setup.\n ", rc);
7394 goto out_stop_timers;
7395 }
7396 /* Initialize the driver internal SLI layer lists. */
7397 lpfc_sli4_setup(phba);
7398 lpfc_sli4_queue_init(phba);
7399
7400 /* update host els xri-sgl sizes and mappings */
7401 rc = lpfc_sli4_els_sgl_update(phba);
8a9d2e80
JS
7402 if (unlikely(rc)) {
7403 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7404 "1400 Failed to update xri-sgl size and "
7405 "mapping: %d\n", rc);
895427bd 7406 goto out_destroy_queue;
da0436e9
JS
7407 }
7408
8a9d2e80 7409 /* register the els sgl pool to the port */
895427bd
JS
7410 rc = lpfc_sli4_repost_sgl_list(phba, &phba->sli4_hba.lpfc_els_sgl_list,
7411 phba->sli4_hba.els_xri_cnt);
7412 if (unlikely(rc < 0)) {
8a9d2e80
JS
7413 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7414 "0582 Error %d during els sgl post "
7415 "operation\n", rc);
7416 rc = -ENODEV;
895427bd 7417 goto out_destroy_queue;
8a9d2e80 7418 }
895427bd 7419 phba->sli4_hba.els_xri_cnt = rc;
8a9d2e80 7420
f358dd0c
JS
7421 if (phba->nvmet_support) {
7422 /* update host nvmet xri-sgl sizes and mappings */
7423 rc = lpfc_sli4_nvmet_sgl_update(phba);
7424 if (unlikely(rc)) {
7425 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7426 "6308 Failed to update nvmet-sgl size "
7427 "and mapping: %d\n", rc);
7428 goto out_destroy_queue;
7429 }
7430
7431 /* register the nvmet sgl pool to the port */
7432 rc = lpfc_sli4_repost_sgl_list(
7433 phba,
7434 &phba->sli4_hba.lpfc_nvmet_sgl_list,
7435 phba->sli4_hba.nvmet_xri_cnt);
7436 if (unlikely(rc < 0)) {
7437 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7438 "3117 Error %d during nvmet "
7439 "sgl post\n", rc);
7440 rc = -ENODEV;
7441 goto out_destroy_queue;
7442 }
7443 phba->sli4_hba.nvmet_xri_cnt = rc;
6c621a22
JS
7444
7445 cnt = phba->cfg_iocb_cnt * 1024;
7446 /* We need 1 iocbq for every SGL, for IO processing */
7447 cnt += phba->sli4_hba.nvmet_xri_cnt;
f358dd0c 7448 } else {
895427bd
JS
7449 /* update host scsi xri-sgl sizes and mappings */
7450 rc = lpfc_sli4_scsi_sgl_update(phba);
7451 if (unlikely(rc)) {
7452 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7453 "6309 Failed to update scsi-sgl size "
7454 "and mapping: %d\n", rc);
7455 goto out_destroy_queue;
7456 }
7457
7458 /* update host nvme xri-sgl sizes and mappings */
7459 rc = lpfc_sli4_nvme_sgl_update(phba);
7460 if (unlikely(rc)) {
7461 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7462 "6082 Failed to update nvme-sgl size "
7463 "and mapping: %d\n", rc);
7464 goto out_destroy_queue;
7465 }
6c621a22
JS
7466
7467 cnt = phba->cfg_iocb_cnt * 1024;
11e644e2
JS
7468 }
7469
7470 if (!phba->sli.iocbq_lookup) {
6c621a22
JS
7471 /* Initialize and populate the iocb list per host */
7472 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11e644e2 7473 "2821 initialize iocb list %d total %d\n",
6c621a22
JS
7474 phba->cfg_iocb_cnt, cnt);
7475 rc = lpfc_init_iocb_list(phba, cnt);
7476 if (rc) {
7477 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11e644e2 7478 "1413 Failed to init iocb list.\n");
6c621a22
JS
7479 goto out_destroy_queue;
7480 }
895427bd
JS
7481 }
7482
11e644e2
JS
7483 if (phba->nvmet_support)
7484 lpfc_nvmet_create_targetport(phba);
7485
2d7dbc4c 7486 if (phba->nvmet_support && phba->cfg_nvmet_mrq) {
2d7dbc4c
JS
7487 /* Post initial buffers to all RQs created */
7488 for (i = 0; i < phba->cfg_nvmet_mrq; i++) {
7489 rqbp = phba->sli4_hba.nvmet_mrq_hdr[i]->rqbp;
7490 INIT_LIST_HEAD(&rqbp->rqb_buffer_list);
7491 rqbp->rqb_alloc_buffer = lpfc_sli4_nvmet_alloc;
7492 rqbp->rqb_free_buffer = lpfc_sli4_nvmet_free;
61f3d4bf 7493 rqbp->entry_count = LPFC_NVMET_RQE_DEF_COUNT;
2d7dbc4c
JS
7494 rqbp->buffer_count = 0;
7495
2d7dbc4c
JS
7496 lpfc_post_rq_buffer(
7497 phba, phba->sli4_hba.nvmet_mrq_hdr[i],
7498 phba->sli4_hba.nvmet_mrq_data[i],
2448e484 7499 phba->cfg_nvmet_mrq_post, i);
2d7dbc4c
JS
7500 }
7501 }
7502
895427bd
JS
7503 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
7504 /* register the allocated scsi sgl pool to the port */
7505 rc = lpfc_sli4_repost_scsi_sgl_list(phba);
7506 if (unlikely(rc)) {
7507 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7508 "0383 Error %d during scsi sgl post "
7509 "operation\n", rc);
7510 /* Some Scsi buffers were moved to abort scsi list */
7511 /* A pci function reset will repost them */
7512 rc = -ENODEV;
7513 goto out_destroy_queue;
7514 }
da0436e9
JS
7515 }
7516
01649561
JS
7517 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
7518 (phba->nvmet_support == 0)) {
7519
7520 /* register the allocated nvme sgl pool to the port */
7521 rc = lpfc_repost_nvme_sgl_list(phba);
7522 if (unlikely(rc)) {
7523 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7524 "6116 Error %d during nvme sgl post "
7525 "operation\n", rc);
7526 /* Some NVME buffers were moved to abort nvme list */
7527 /* A pci function reset will repost them */
7528 rc = -ENODEV;
7529 goto out_destroy_queue;
7530 }
da0436e9
JS
7531 }
7532
7533 /* Post the rpi header region to the device. */
7534 rc = lpfc_sli4_post_all_rpi_hdrs(phba);
7535 if (unlikely(rc)) {
7536 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7537 "0393 Error %d during rpi post operation\n",
7538 rc);
7539 rc = -ENODEV;
895427bd 7540 goto out_destroy_queue;
da0436e9 7541 }
97f2ecf1 7542 lpfc_sli4_node_prep(phba);
da0436e9 7543
895427bd 7544 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
2d7dbc4c 7545 if ((phba->nvmet_support == 0) || (phba->cfg_nvmet_mrq == 1)) {
895427bd
JS
7546 /*
7547 * The FC Port needs to register FCFI (index 0)
7548 */
7549 lpfc_reg_fcfi(phba, mboxq);
7550 mboxq->vport = phba->pport;
7551 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7552 if (rc != MBX_SUCCESS)
7553 goto out_unset_queue;
7554 rc = 0;
7555 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_fcfi,
7556 &mboxq->u.mqe.un.reg_fcfi);
2d7dbc4c
JS
7557 } else {
7558 /* We are a NVME Target mode with MRQ > 1 */
7559
7560 /* First register the FCFI */
7561 lpfc_reg_fcfi_mrq(phba, mboxq, 0);
7562 mboxq->vport = phba->pport;
7563 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7564 if (rc != MBX_SUCCESS)
7565 goto out_unset_queue;
7566 rc = 0;
7567 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_mrq_fcfi,
7568 &mboxq->u.mqe.un.reg_fcfi_mrq);
7569
7570 /* Next register the MRQs */
7571 lpfc_reg_fcfi_mrq(phba, mboxq, 1);
7572 mboxq->vport = phba->pport;
7573 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7574 if (rc != MBX_SUCCESS)
7575 goto out_unset_queue;
7576 rc = 0;
895427bd
JS
7577 }
7578 /* Check if the port is configured to be disabled */
7579 lpfc_sli_read_link_ste(phba);
da0436e9
JS
7580 }
7581
7582 /* Arm the CQs and then EQs on device */
7583 lpfc_sli4_arm_cqeq_intr(phba);
7584
7585 /* Indicate device interrupt mode */
7586 phba->sli4_hba.intr_enable = 1;
7587
7588 /* Allow asynchronous mailbox command to go through */
7589 spin_lock_irq(&phba->hbalock);
7590 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
7591 spin_unlock_irq(&phba->hbalock);
7592
7593 /* Post receive buffers to the device */
7594 lpfc_sli4_rb_setup(phba);
7595
fc2b989b
JS
7596 /* Reset HBA FCF states after HBA reset */
7597 phba->fcf.fcf_flag = 0;
7598 phba->fcf.current_rec.flag = 0;
7599
da0436e9 7600 /* Start the ELS watchdog timer */
8fa38513 7601 mod_timer(&vport->els_tmofunc,
256ec0d0 7602 jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov * 2)));
da0436e9
JS
7603
7604 /* Start heart beat timer */
7605 mod_timer(&phba->hb_tmofunc,
256ec0d0 7606 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
da0436e9
JS
7607 phba->hb_outstanding = 0;
7608 phba->last_completion_time = jiffies;
7609
7610 /* Start error attention (ERATT) polling timer */
256ec0d0 7611 mod_timer(&phba->eratt_poll,
65791f1f 7612 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
da0436e9 7613
75baf696
JS
7614 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
7615 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
7616 rc = pci_enable_pcie_error_reporting(phba->pcidev);
7617 if (!rc) {
7618 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7619 "2829 This device supports "
7620 "Advanced Error Reporting (AER)\n");
7621 spin_lock_irq(&phba->hbalock);
7622 phba->hba_flag |= HBA_AER_ENABLED;
7623 spin_unlock_irq(&phba->hbalock);
7624 } else {
7625 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7626 "2830 This device does not support "
7627 "Advanced Error Reporting (AER)\n");
7628 phba->cfg_aer_support = 0;
7629 }
0a96e975 7630 rc = 0;
75baf696
JS
7631 }
7632
da0436e9
JS
7633 /*
7634 * The port is ready, set the host's link state to LINK_DOWN
7635 * in preparation for link interrupts.
7636 */
da0436e9
JS
7637 spin_lock_irq(&phba->hbalock);
7638 phba->link_state = LPFC_LINK_DOWN;
7639 spin_unlock_irq(&phba->hbalock);
026abb87
JS
7640 if (!(phba->hba_flag & HBA_FCOE_MODE) &&
7641 (phba->hba_flag & LINK_DISABLED)) {
7642 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7643 "3103 Adapter Link is disabled.\n");
7644 lpfc_down_link(phba, mboxq);
7645 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7646 if (rc != MBX_SUCCESS) {
7647 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7648 "3104 Adapter failed to issue "
7649 "DOWN_LINK mbox cmd, rc:x%x\n", rc);
7650 goto out_unset_queue;
7651 }
7652 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
1b51197d
JS
7653 /* don't perform init_link on SLI4 FC port loopback test */
7654 if (!(phba->link_flag & LS_LOOPBACK_MODE)) {
7655 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
7656 if (rc)
7657 goto out_unset_queue;
7658 }
5350d872
JS
7659 }
7660 mempool_free(mboxq, phba->mbox_mem_pool);
7661 return rc;
76a95d75 7662out_unset_queue:
da0436e9 7663 /* Unset all the queues set up in this routine when error out */
5350d872
JS
7664 lpfc_sli4_queue_unset(phba);
7665out_destroy_queue:
6c621a22 7666 lpfc_free_iocb_list(phba);
5350d872 7667 lpfc_sli4_queue_destroy(phba);
da0436e9 7668out_stop_timers:
5350d872 7669 lpfc_stop_hba_timers(phba);
da0436e9
JS
7670out_free_mbox:
7671 mempool_free(mboxq, phba->mbox_mem_pool);
7672 return rc;
7673}
7674
7675/**
7676 * lpfc_mbox_timeout - Timeout call back function for mbox timer
7677 * @ptr: context object - pointer to hba structure.
7678 *
7679 * This is the callback function for mailbox timer. The mailbox
7680 * timer is armed when a new mailbox command is issued and the timer
7681 * is deleted when the mailbox complete. The function is called by
7682 * the kernel timer code when a mailbox does not complete within
7683 * expected time. This function wakes up the worker thread to
7684 * process the mailbox timeout and returns. All the processing is
7685 * done by the worker thread function lpfc_mbox_timeout_handler.
7686 **/
7687void
f22eb4d3 7688lpfc_mbox_timeout(struct timer_list *t)
da0436e9 7689{
f22eb4d3 7690 struct lpfc_hba *phba = from_timer(phba, t, sli.mbox_tmo);
da0436e9
JS
7691 unsigned long iflag;
7692 uint32_t tmo_posted;
7693
7694 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
7695 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
7696 if (!tmo_posted)
7697 phba->pport->work_port_events |= WORKER_MBOX_TMO;
7698 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
7699
7700 if (!tmo_posted)
7701 lpfc_worker_wake_up(phba);
7702 return;
7703}
7704
e8d3c3b1
JS
7705/**
7706 * lpfc_sli4_mbox_completions_pending - check to see if any mailbox completions
7707 * are pending
7708 * @phba: Pointer to HBA context object.
7709 *
7710 * This function checks if any mailbox completions are present on the mailbox
7711 * completion queue.
7712 **/
3bb11fc5 7713static bool
e8d3c3b1
JS
7714lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba)
7715{
7716
7717 uint32_t idx;
7718 struct lpfc_queue *mcq;
7719 struct lpfc_mcqe *mcqe;
7720 bool pending_completions = false;
7365f6fd 7721 uint8_t qe_valid;
e8d3c3b1
JS
7722
7723 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7724 return false;
7725
7726 /* Check for completions on mailbox completion queue */
7727
7728 mcq = phba->sli4_hba.mbx_cq;
7729 idx = mcq->hba_index;
7365f6fd
JS
7730 qe_valid = mcq->qe_valid;
7731 while (bf_get_le32(lpfc_cqe_valid, mcq->qe[idx].cqe) == qe_valid) {
e8d3c3b1
JS
7732 mcqe = (struct lpfc_mcqe *)mcq->qe[idx].cqe;
7733 if (bf_get_le32(lpfc_trailer_completed, mcqe) &&
7734 (!bf_get_le32(lpfc_trailer_async, mcqe))) {
7735 pending_completions = true;
7736 break;
7737 }
7738 idx = (idx + 1) % mcq->entry_count;
7739 if (mcq->hba_index == idx)
7740 break;
7365f6fd
JS
7741
7742 /* if the index wrapped around, toggle the valid bit */
7743 if (phba->sli4_hba.pc_sli4_params.cqav && !idx)
7744 qe_valid = (qe_valid) ? 0 : 1;
e8d3c3b1
JS
7745 }
7746 return pending_completions;
7747
7748}
7749
7750/**
7751 * lpfc_sli4_process_missed_mbox_completions - process mbox completions
7752 * that were missed.
7753 * @phba: Pointer to HBA context object.
7754 *
7755 * For sli4, it is possible to miss an interrupt. As such mbox completions
7756 * maybe missed causing erroneous mailbox timeouts to occur. This function
7757 * checks to see if mbox completions are on the mailbox completion queue
7758 * and will process all the completions associated with the eq for the
7759 * mailbox completion queue.
7760 **/
7761bool
7762lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba)
7763{
b71413dd 7764 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
e8d3c3b1
JS
7765 uint32_t eqidx;
7766 struct lpfc_queue *fpeq = NULL;
7767 struct lpfc_eqe *eqe;
7768 bool mbox_pending;
7769
7770 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7771 return false;
7772
7773 /* Find the eq associated with the mcq */
7774
b71413dd 7775 if (sli4_hba->hba_eq)
895427bd 7776 for (eqidx = 0; eqidx < phba->io_channel_irqs; eqidx++)
b71413dd
JS
7777 if (sli4_hba->hba_eq[eqidx]->queue_id ==
7778 sli4_hba->mbx_cq->assoc_qid) {
7779 fpeq = sli4_hba->hba_eq[eqidx];
e8d3c3b1
JS
7780 break;
7781 }
7782 if (!fpeq)
7783 return false;
7784
7785 /* Turn off interrupts from this EQ */
7786
b71413dd 7787 sli4_hba->sli4_eq_clr_intr(fpeq);
e8d3c3b1
JS
7788
7789 /* Check to see if a mbox completion is pending */
7790
7791 mbox_pending = lpfc_sli4_mbox_completions_pending(phba);
7792
7793 /*
7794 * If a mbox completion is pending, process all the events on EQ
7795 * associated with the mbox completion queue (this could include
7796 * mailbox commands, async events, els commands, receive queue data
7797 * and fcp commands)
7798 */
7799
7800 if (mbox_pending)
7801 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
7802 lpfc_sli4_hba_handle_eqe(phba, eqe, eqidx);
7803 fpeq->EQ_processed++;
7804 }
7805
7806 /* Always clear and re-arm the EQ */
7807
b71413dd 7808 sli4_hba->sli4_eq_release(fpeq, LPFC_QUEUE_REARM);
e8d3c3b1
JS
7809
7810 return mbox_pending;
7811
7812}
da0436e9
JS
7813
7814/**
7815 * lpfc_mbox_timeout_handler - Worker thread function to handle mailbox timeout
7816 * @phba: Pointer to HBA context object.
7817 *
7818 * This function is called from worker thread when a mailbox command times out.
7819 * The caller is not required to hold any locks. This function will reset the
7820 * HBA and recover all the pending commands.
7821 **/
7822void
7823lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
7824{
7825 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
eb016566
JS
7826 MAILBOX_t *mb = NULL;
7827
da0436e9 7828 struct lpfc_sli *psli = &phba->sli;
da0436e9 7829
e8d3c3b1
JS
7830 /* If the mailbox completed, process the completion and return */
7831 if (lpfc_sli4_process_missed_mbox_completions(phba))
7832 return;
7833
eb016566
JS
7834 if (pmbox != NULL)
7835 mb = &pmbox->u.mb;
da0436e9
JS
7836 /* Check the pmbox pointer first. There is a race condition
7837 * between the mbox timeout handler getting executed in the
7838 * worklist and the mailbox actually completing. When this
7839 * race condition occurs, the mbox_active will be NULL.
7840 */
7841 spin_lock_irq(&phba->hbalock);
7842 if (pmbox == NULL) {
7843 lpfc_printf_log(phba, KERN_WARNING,
7844 LOG_MBOX | LOG_SLI,
7845 "0353 Active Mailbox cleared - mailbox timeout "
7846 "exiting\n");
7847 spin_unlock_irq(&phba->hbalock);
7848 return;
7849 }
7850
7851 /* Mbox cmd <mbxCommand> timeout */
7852 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7853 "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
7854 mb->mbxCommand,
7855 phba->pport->port_state,
7856 phba->sli.sli_flag,
7857 phba->sli.mbox_active);
7858 spin_unlock_irq(&phba->hbalock);
7859
7860 /* Setting state unknown so lpfc_sli_abort_iocb_ring
7861 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
25985edc 7862 * it to fail all outstanding SCSI IO.
da0436e9
JS
7863 */
7864 spin_lock_irq(&phba->pport->work_port_lock);
7865 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
7866 spin_unlock_irq(&phba->pport->work_port_lock);
7867 spin_lock_irq(&phba->hbalock);
7868 phba->link_state = LPFC_LINK_UNKNOWN;
f4b4c68f 7869 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
da0436e9
JS
7870 spin_unlock_irq(&phba->hbalock);
7871
db55fba8 7872 lpfc_sli_abort_fcp_rings(phba);
da0436e9
JS
7873
7874 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7875 "0345 Resetting board due to mailbox timeout\n");
7876
7877 /* Reset the HBA device */
7878 lpfc_reset_hba(phba);
7879}
7880
7881/**
7882 * lpfc_sli_issue_mbox_s3 - Issue an SLI3 mailbox command to firmware
7883 * @phba: Pointer to HBA context object.
7884 * @pmbox: Pointer to mailbox object.
7885 * @flag: Flag indicating how the mailbox need to be processed.
7886 *
7887 * This function is called by discovery code and HBA management code
7888 * to submit a mailbox command to firmware with SLI-3 interface spec. This
7889 * function gets the hbalock to protect the data structures.
7890 * The mailbox command can be submitted in polling mode, in which case
7891 * this function will wait in a polling loop for the completion of the
7892 * mailbox.
7893 * If the mailbox is submitted in no_wait mode (not polling) the
7894 * function will submit the command and returns immediately without waiting
7895 * for the mailbox completion. The no_wait is supported only when HBA
7896 * is in SLI2/SLI3 mode - interrupts are enabled.
7897 * The SLI interface allows only one mailbox pending at a time. If the
7898 * mailbox is issued in polling mode and there is already a mailbox
7899 * pending, then the function will return an error. If the mailbox is issued
7900 * in NO_WAIT mode and there is a mailbox pending already, the function
7901 * will return MBX_BUSY after queuing the mailbox into mailbox queue.
7902 * The sli layer owns the mailbox object until the completion of mailbox
7903 * command if this function return MBX_BUSY or MBX_SUCCESS. For all other
7904 * return codes the caller owns the mailbox command after the return of
7905 * the function.
e59058c4 7906 **/
3772a991
JS
7907static int
7908lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
7909 uint32_t flag)
dea3101e 7910{
bf07bdea 7911 MAILBOX_t *mbx;
2e0fef85 7912 struct lpfc_sli *psli = &phba->sli;
dea3101e 7913 uint32_t status, evtctr;
9940b97b 7914 uint32_t ha_copy, hc_copy;
dea3101e 7915 int i;
09372820 7916 unsigned long timeout;
dea3101e 7917 unsigned long drvr_flag = 0;
34b02dcd 7918 uint32_t word0, ldata;
dea3101e 7919 void __iomem *to_slim;
58da1ffb
JS
7920 int processing_queue = 0;
7921
7922 spin_lock_irqsave(&phba->hbalock, drvr_flag);
7923 if (!pmbox) {
8568a4d2 7924 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
58da1ffb 7925 /* processing mbox queue from intr_handler */
3772a991
JS
7926 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
7927 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7928 return MBX_SUCCESS;
7929 }
58da1ffb 7930 processing_queue = 1;
58da1ffb
JS
7931 pmbox = lpfc_mbox_get(phba);
7932 if (!pmbox) {
7933 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7934 return MBX_SUCCESS;
7935 }
7936 }
dea3101e 7937
ed957684 7938 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 7939 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684 7940 if(!pmbox->vport) {
58da1ffb 7941 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
ed957684 7942 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 7943 LOG_MBOX | LOG_VPORT,
e8b62011 7944 "1806 Mbox x%x failed. No vport\n",
3772a991 7945 pmbox->u.mb.mbxCommand);
ed957684 7946 dump_stack();
58da1ffb 7947 goto out_not_finished;
ed957684
JS
7948 }
7949 }
7950
8d63f375 7951 /* If the PCI channel is in offline state, do not post mbox. */
58da1ffb
JS
7952 if (unlikely(pci_channel_offline(phba->pcidev))) {
7953 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7954 goto out_not_finished;
7955 }
8d63f375 7956
a257bf90
JS
7957 /* If HBA has a deferred error attention, fail the iocb. */
7958 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
7959 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7960 goto out_not_finished;
7961 }
7962
dea3101e 7963 psli = &phba->sli;
92d7f7b0 7964
bf07bdea 7965 mbx = &pmbox->u.mb;
dea3101e
JB
7966 status = MBX_SUCCESS;
7967
2e0fef85
JS
7968 if (phba->link_state == LPFC_HBA_ERROR) {
7969 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW
7970
7971 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
7972 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7973 "(%d):0311 Mailbox command x%x cannot "
7974 "issue Data: x%x x%x\n",
7975 pmbox->vport ? pmbox->vport->vpi : 0,
7976 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
58da1ffb 7977 goto out_not_finished;
41415862
JW
7978 }
7979
bf07bdea 7980 if (mbx->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT) {
9940b97b
JS
7981 if (lpfc_readl(phba->HCregaddr, &hc_copy) ||
7982 !(hc_copy & HC_MBINT_ENA)) {
7983 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7984 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
3772a991
JS
7985 "(%d):2528 Mailbox command x%x cannot "
7986 "issue Data: x%x x%x\n",
7987 pmbox->vport ? pmbox->vport->vpi : 0,
7988 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
9940b97b
JS
7989 goto out_not_finished;
7990 }
9290831f
JS
7991 }
7992
dea3101e
JB
7993 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
7994 /* Polling for a mbox command when another one is already active
7995 * is not allowed in SLI. Also, the driver must have established
7996 * SLI2 mode to queue and process multiple mbox commands.
7997 */
7998
7999 if (flag & MBX_POLL) {
2e0fef85 8000 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
8001
8002 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8003 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8004 "(%d):2529 Mailbox command x%x "
8005 "cannot issue Data: x%x x%x\n",
8006 pmbox->vport ? pmbox->vport->vpi : 0,
8007 pmbox->u.mb.mbxCommand,
8008 psli->sli_flag, flag);
58da1ffb 8009 goto out_not_finished;
dea3101e
JB
8010 }
8011
3772a991 8012 if (!(psli->sli_flag & LPFC_SLI_ACTIVE)) {
2e0fef85 8013 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8014 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8015 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8016 "(%d):2530 Mailbox command x%x "
8017 "cannot issue Data: x%x x%x\n",
8018 pmbox->vport ? pmbox->vport->vpi : 0,
8019 pmbox->u.mb.mbxCommand,
8020 psli->sli_flag, flag);
58da1ffb 8021 goto out_not_finished;
dea3101e
JB
8022 }
8023
dea3101e
JB
8024 /* Another mailbox command is still being processed, queue this
8025 * command to be processed later.
8026 */
8027 lpfc_mbox_put(phba, pmbox);
8028
8029 /* Mbox cmd issue - BUSY */
ed957684 8030 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8031 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 8032 "x%x x%x x%x x%x\n",
92d7f7b0 8033 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
e92974f6
JS
8034 mbx->mbxCommand,
8035 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8036 psli->sli_flag, flag);
dea3101e
JB
8037
8038 psli->slistat.mbox_busy++;
2e0fef85 8039 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8040
858c9f6c
JS
8041 if (pmbox->vport) {
8042 lpfc_debugfs_disc_trc(pmbox->vport,
8043 LPFC_DISC_TRC_MBOX_VPORT,
8044 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8045 (uint32_t)mbx->mbxCommand,
8046 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8047 }
8048 else {
8049 lpfc_debugfs_disc_trc(phba->pport,
8050 LPFC_DISC_TRC_MBOX,
8051 "MBOX Bsy: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8052 (uint32_t)mbx->mbxCommand,
8053 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8054 }
8055
2e0fef85 8056 return MBX_BUSY;
dea3101e
JB
8057 }
8058
dea3101e
JB
8059 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8060
8061 /* If we are not polling, we MUST be in SLI2 mode */
8062 if (flag != MBX_POLL) {
3772a991 8063 if (!(psli->sli_flag & LPFC_SLI_ACTIVE) &&
bf07bdea 8064 (mbx->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 8065 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8066 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8067 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8068 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8069 "(%d):2531 Mailbox command x%x "
8070 "cannot issue Data: x%x x%x\n",
8071 pmbox->vport ? pmbox->vport->vpi : 0,
8072 pmbox->u.mb.mbxCommand,
8073 psli->sli_flag, flag);
58da1ffb 8074 goto out_not_finished;
dea3101e
JB
8075 }
8076 /* timeout active mbox command */
256ec0d0
JS
8077 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8078 1000);
8079 mod_timer(&psli->mbox_tmo, jiffies + timeout);
dea3101e
JB
8080 }
8081
8082 /* Mailbox cmd <cmd> issue */
ed957684 8083 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8084 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 8085 "x%x\n",
e8b62011 8086 pmbox->vport ? pmbox->vport->vpi : 0,
e92974f6
JS
8087 mbx->mbxCommand,
8088 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8089 psli->sli_flag, flag);
dea3101e 8090
bf07bdea 8091 if (mbx->mbxCommand != MBX_HEARTBEAT) {
858c9f6c
JS
8092 if (pmbox->vport) {
8093 lpfc_debugfs_disc_trc(pmbox->vport,
8094 LPFC_DISC_TRC_MBOX_VPORT,
8095 "MBOX Send vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8096 (uint32_t)mbx->mbxCommand,
8097 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8098 }
8099 else {
8100 lpfc_debugfs_disc_trc(phba->pport,
8101 LPFC_DISC_TRC_MBOX,
8102 "MBOX Send: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8103 (uint32_t)mbx->mbxCommand,
8104 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8105 }
8106 }
8107
dea3101e
JB
8108 psli->slistat.mbox_cmd++;
8109 evtctr = psli->slistat.mbox_event;
8110
8111 /* next set own bit for the adapter and copy over command word */
bf07bdea 8112 mbx->mbxOwner = OWN_CHIP;
dea3101e 8113
3772a991 8114 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
7a470277
JS
8115 /* Populate mbox extension offset word. */
8116 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len) {
bf07bdea 8117 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8118 = (uint8_t *)phba->mbox_ext
8119 - (uint8_t *)phba->mbox;
8120 }
8121
8122 /* Copy the mailbox extension data */
8123 if (pmbox->in_ext_byte_len && pmbox->context2) {
8124 lpfc_sli_pcimem_bcopy(pmbox->context2,
8125 (uint8_t *)phba->mbox_ext,
8126 pmbox->in_ext_byte_len);
8127 }
8128 /* Copy command data to host SLIM area */
bf07bdea 8129 lpfc_sli_pcimem_bcopy(mbx, phba->mbox, MAILBOX_CMD_SIZE);
dea3101e 8130 } else {
7a470277
JS
8131 /* Populate mbox extension offset word. */
8132 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len)
bf07bdea 8133 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8134 = MAILBOX_HBA_EXT_OFFSET;
8135
8136 /* Copy the mailbox extension data */
895427bd 8137 if (pmbox->in_ext_byte_len && pmbox->context2)
7a470277
JS
8138 lpfc_memcpy_to_slim(phba->MBslimaddr +
8139 MAILBOX_HBA_EXT_OFFSET,
8140 pmbox->context2, pmbox->in_ext_byte_len);
8141
895427bd 8142 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8143 /* copy command data into host mbox for cmpl */
895427bd
JS
8144 lpfc_sli_pcimem_bcopy(mbx, phba->mbox,
8145 MAILBOX_CMD_SIZE);
dea3101e
JB
8146
8147 /* First copy mbox command data to HBA SLIM, skip past first
8148 word */
8149 to_slim = phba->MBslimaddr + sizeof (uint32_t);
bf07bdea 8150 lpfc_memcpy_to_slim(to_slim, &mbx->un.varWords[0],
dea3101e
JB
8151 MAILBOX_CMD_SIZE - sizeof (uint32_t));
8152
8153 /* Next copy over first word, with mbxOwner set */
bf07bdea 8154 ldata = *((uint32_t *)mbx);
dea3101e
JB
8155 to_slim = phba->MBslimaddr;
8156 writel(ldata, to_slim);
8157 readl(to_slim); /* flush */
8158
895427bd 8159 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8160 /* switch over to host mailbox */
3772a991 8161 psli->sli_flag |= LPFC_SLI_ACTIVE;
dea3101e
JB
8162 }
8163
8164 wmb();
dea3101e
JB
8165
8166 switch (flag) {
8167 case MBX_NOWAIT:
09372820 8168 /* Set up reference to mailbox command */
dea3101e 8169 psli->mbox_active = pmbox;
09372820
JS
8170 /* Interrupt board to do it */
8171 writel(CA_MBATT, phba->CAregaddr);
8172 readl(phba->CAregaddr); /* flush */
8173 /* Don't wait for it to finish, just return */
dea3101e
JB
8174 break;
8175
8176 case MBX_POLL:
09372820 8177 /* Set up null reference to mailbox command */
dea3101e 8178 psli->mbox_active = NULL;
09372820
JS
8179 /* Interrupt board to do it */
8180 writel(CA_MBATT, phba->CAregaddr);
8181 readl(phba->CAregaddr); /* flush */
8182
3772a991 8183 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8184 /* First read mbox status word */
34b02dcd 8185 word0 = *((uint32_t *)phba->mbox);
dea3101e
JB
8186 word0 = le32_to_cpu(word0);
8187 } else {
8188 /* First read mbox status word */
9940b97b
JS
8189 if (lpfc_readl(phba->MBslimaddr, &word0)) {
8190 spin_unlock_irqrestore(&phba->hbalock,
8191 drvr_flag);
8192 goto out_not_finished;
8193 }
dea3101e
JB
8194 }
8195
8196 /* Read the HBA Host Attention Register */
9940b97b
JS
8197 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8198 spin_unlock_irqrestore(&phba->hbalock,
8199 drvr_flag);
8200 goto out_not_finished;
8201 }
a183a15f
JS
8202 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8203 1000) + jiffies;
09372820 8204 i = 0;
dea3101e 8205 /* Wait for command to complete */
41415862
JW
8206 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
8207 (!(ha_copy & HA_MBATT) &&
2e0fef85 8208 (phba->link_state > LPFC_WARM_START))) {
09372820 8209 if (time_after(jiffies, timeout)) {
dea3101e 8210 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8211 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 8212 drvr_flag);
58da1ffb 8213 goto out_not_finished;
dea3101e
JB
8214 }
8215
8216 /* Check if we took a mbox interrupt while we were
8217 polling */
8218 if (((word0 & OWN_CHIP) != OWN_CHIP)
8219 && (evtctr != psli->slistat.mbox_event))
8220 break;
8221
09372820
JS
8222 if (i++ > 10) {
8223 spin_unlock_irqrestore(&phba->hbalock,
8224 drvr_flag);
8225 msleep(1);
8226 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8227 }
dea3101e 8228
3772a991 8229 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8230 /* First copy command data */
34b02dcd 8231 word0 = *((uint32_t *)phba->mbox);
dea3101e 8232 word0 = le32_to_cpu(word0);
bf07bdea 8233 if (mbx->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 8234 MAILBOX_t *slimmb;
34b02dcd 8235 uint32_t slimword0;
dea3101e
JB
8236 /* Check real SLIM for any errors */
8237 slimword0 = readl(phba->MBslimaddr);
8238 slimmb = (MAILBOX_t *) & slimword0;
8239 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
8240 && slimmb->mbxStatus) {
8241 psli->sli_flag &=
3772a991 8242 ~LPFC_SLI_ACTIVE;
dea3101e
JB
8243 word0 = slimword0;
8244 }
8245 }
8246 } else {
8247 /* First copy command data */
8248 word0 = readl(phba->MBslimaddr);
8249 }
8250 /* Read the HBA Host Attention Register */
9940b97b
JS
8251 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8252 spin_unlock_irqrestore(&phba->hbalock,
8253 drvr_flag);
8254 goto out_not_finished;
8255 }
dea3101e
JB
8256 }
8257
3772a991 8258 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8259 /* copy results back to user */
2ea259ee
JS
8260 lpfc_sli_pcimem_bcopy(phba->mbox, mbx,
8261 MAILBOX_CMD_SIZE);
7a470277
JS
8262 /* Copy the mailbox extension data */
8263 if (pmbox->out_ext_byte_len && pmbox->context2) {
8264 lpfc_sli_pcimem_bcopy(phba->mbox_ext,
8265 pmbox->context2,
8266 pmbox->out_ext_byte_len);
8267 }
dea3101e
JB
8268 } else {
8269 /* First copy command data */
bf07bdea 8270 lpfc_memcpy_from_slim(mbx, phba->MBslimaddr,
2ea259ee 8271 MAILBOX_CMD_SIZE);
7a470277
JS
8272 /* Copy the mailbox extension data */
8273 if (pmbox->out_ext_byte_len && pmbox->context2) {
8274 lpfc_memcpy_from_slim(pmbox->context2,
8275 phba->MBslimaddr +
8276 MAILBOX_HBA_EXT_OFFSET,
8277 pmbox->out_ext_byte_len);
dea3101e
JB
8278 }
8279 }
8280
8281 writel(HA_MBATT, phba->HAregaddr);
8282 readl(phba->HAregaddr); /* flush */
8283
8284 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
bf07bdea 8285 status = mbx->mbxStatus;
dea3101e
JB
8286 }
8287
2e0fef85
JS
8288 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8289 return status;
58da1ffb
JS
8290
8291out_not_finished:
8292 if (processing_queue) {
da0436e9 8293 pmbox->u.mb.mbxStatus = MBX_NOT_FINISHED;
58da1ffb
JS
8294 lpfc_mbox_cmpl_put(phba, pmbox);
8295 }
8296 return MBX_NOT_FINISHED;
dea3101e
JB
8297}
8298
f1126688
JS
8299/**
8300 * lpfc_sli4_async_mbox_block - Block posting SLI4 asynchronous mailbox command
8301 * @phba: Pointer to HBA context object.
8302 *
8303 * The function blocks the posting of SLI4 asynchronous mailbox commands from
8304 * the driver internal pending mailbox queue. It will then try to wait out the
8305 * possible outstanding mailbox command before return.
8306 *
8307 * Returns:
8308 * 0 - the outstanding mailbox command completed; otherwise, the wait for
8309 * the outstanding mailbox command timed out.
8310 **/
8311static int
8312lpfc_sli4_async_mbox_block(struct lpfc_hba *phba)
8313{
8314 struct lpfc_sli *psli = &phba->sli;
f1126688 8315 int rc = 0;
a183a15f 8316 unsigned long timeout = 0;
f1126688
JS
8317
8318 /* Mark the asynchronous mailbox command posting as blocked */
8319 spin_lock_irq(&phba->hbalock);
8320 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
f1126688
JS
8321 /* Determine how long we might wait for the active mailbox
8322 * command to be gracefully completed by firmware.
8323 */
a183a15f
JS
8324 if (phba->sli.mbox_active)
8325 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
8326 phba->sli.mbox_active) *
8327 1000) + jiffies;
8328 spin_unlock_irq(&phba->hbalock);
8329
e8d3c3b1
JS
8330 /* Make sure the mailbox is really active */
8331 if (timeout)
8332 lpfc_sli4_process_missed_mbox_completions(phba);
8333
f1126688
JS
8334 /* Wait for the outstnading mailbox command to complete */
8335 while (phba->sli.mbox_active) {
8336 /* Check active mailbox complete status every 2ms */
8337 msleep(2);
8338 if (time_after(jiffies, timeout)) {
8339 /* Timeout, marked the outstanding cmd not complete */
8340 rc = 1;
8341 break;
8342 }
8343 }
8344
8345 /* Can not cleanly block async mailbox command, fails it */
8346 if (rc) {
8347 spin_lock_irq(&phba->hbalock);
8348 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8349 spin_unlock_irq(&phba->hbalock);
8350 }
8351 return rc;
8352}
8353
8354/**
8355 * lpfc_sli4_async_mbox_unblock - Block posting SLI4 async mailbox command
8356 * @phba: Pointer to HBA context object.
8357 *
8358 * The function unblocks and resume posting of SLI4 asynchronous mailbox
8359 * commands from the driver internal pending mailbox queue. It makes sure
8360 * that there is no outstanding mailbox command before resuming posting
8361 * asynchronous mailbox commands. If, for any reason, there is outstanding
8362 * mailbox command, it will try to wait it out before resuming asynchronous
8363 * mailbox command posting.
8364 **/
8365static void
8366lpfc_sli4_async_mbox_unblock(struct lpfc_hba *phba)
8367{
8368 struct lpfc_sli *psli = &phba->sli;
8369
8370 spin_lock_irq(&phba->hbalock);
8371 if (!(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8372 /* Asynchronous mailbox posting is not blocked, do nothing */
8373 spin_unlock_irq(&phba->hbalock);
8374 return;
8375 }
8376
8377 /* Outstanding synchronous mailbox command is guaranteed to be done,
8378 * successful or timeout, after timing-out the outstanding mailbox
8379 * command shall always be removed, so just unblock posting async
8380 * mailbox command and resume
8381 */
8382 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8383 spin_unlock_irq(&phba->hbalock);
8384
8385 /* wake up worker thread to post asynchronlous mailbox command */
8386 lpfc_worker_wake_up(phba);
8387}
8388
2d843edc
JS
8389/**
8390 * lpfc_sli4_wait_bmbx_ready - Wait for bootstrap mailbox register ready
8391 * @phba: Pointer to HBA context object.
8392 * @mboxq: Pointer to mailbox object.
8393 *
8394 * The function waits for the bootstrap mailbox register ready bit from
8395 * port for twice the regular mailbox command timeout value.
8396 *
8397 * 0 - no timeout on waiting for bootstrap mailbox register ready.
8398 * MBXERR_ERROR - wait for bootstrap mailbox register timed out.
8399 **/
8400static int
8401lpfc_sli4_wait_bmbx_ready(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8402{
8403 uint32_t db_ready;
8404 unsigned long timeout;
8405 struct lpfc_register bmbx_reg;
8406
8407 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, mboxq)
8408 * 1000) + jiffies;
8409
8410 do {
8411 bmbx_reg.word0 = readl(phba->sli4_hba.BMBXregaddr);
8412 db_ready = bf_get(lpfc_bmbx_rdy, &bmbx_reg);
8413 if (!db_ready)
8414 msleep(2);
8415
8416 if (time_after(jiffies, timeout))
8417 return MBXERR_ERROR;
8418 } while (!db_ready);
8419
8420 return 0;
8421}
8422
da0436e9
JS
8423/**
8424 * lpfc_sli4_post_sync_mbox - Post an SLI4 mailbox to the bootstrap mailbox
8425 * @phba: Pointer to HBA context object.
8426 * @mboxq: Pointer to mailbox object.
8427 *
8428 * The function posts a mailbox to the port. The mailbox is expected
8429 * to be comletely filled in and ready for the port to operate on it.
8430 * This routine executes a synchronous completion operation on the
8431 * mailbox by polling for its completion.
8432 *
8433 * The caller must not be holding any locks when calling this routine.
8434 *
8435 * Returns:
8436 * MBX_SUCCESS - mailbox posted successfully
8437 * Any of the MBX error values.
8438 **/
8439static int
8440lpfc_sli4_post_sync_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8441{
8442 int rc = MBX_SUCCESS;
8443 unsigned long iflag;
da0436e9
JS
8444 uint32_t mcqe_status;
8445 uint32_t mbx_cmnd;
da0436e9
JS
8446 struct lpfc_sli *psli = &phba->sli;
8447 struct lpfc_mqe *mb = &mboxq->u.mqe;
8448 struct lpfc_bmbx_create *mbox_rgn;
8449 struct dma_address *dma_address;
da0436e9
JS
8450
8451 /*
8452 * Only one mailbox can be active to the bootstrap mailbox region
8453 * at a time and there is no queueing provided.
8454 */
8455 spin_lock_irqsave(&phba->hbalock, iflag);
8456 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8457 spin_unlock_irqrestore(&phba->hbalock, iflag);
8458 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8459 "(%d):2532 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8460 "cannot issue Data: x%x x%x\n",
8461 mboxq->vport ? mboxq->vport->vpi : 0,
8462 mboxq->u.mb.mbxCommand,
a183a15f
JS
8463 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8464 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8465 psli->sli_flag, MBX_POLL);
8466 return MBXERR_ERROR;
8467 }
8468 /* The server grabs the token and owns it until release */
8469 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8470 phba->sli.mbox_active = mboxq;
8471 spin_unlock_irqrestore(&phba->hbalock, iflag);
8472
2d843edc
JS
8473 /* wait for bootstrap mbox register for readyness */
8474 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8475 if (rc)
8476 goto exit;
8477
da0436e9
JS
8478 /*
8479 * Initialize the bootstrap memory region to avoid stale data areas
8480 * in the mailbox post. Then copy the caller's mailbox contents to
8481 * the bmbx mailbox region.
8482 */
8483 mbx_cmnd = bf_get(lpfc_mqe_command, mb);
8484 memset(phba->sli4_hba.bmbx.avirt, 0, sizeof(struct lpfc_bmbx_create));
48f8fdb4
JS
8485 lpfc_sli4_pcimem_bcopy(mb, phba->sli4_hba.bmbx.avirt,
8486 sizeof(struct lpfc_mqe));
da0436e9
JS
8487
8488 /* Post the high mailbox dma address to the port and wait for ready. */
8489 dma_address = &phba->sli4_hba.bmbx.dma_address;
8490 writel(dma_address->addr_hi, phba->sli4_hba.BMBXregaddr);
8491
2d843edc
JS
8492 /* wait for bootstrap mbox register for hi-address write done */
8493 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8494 if (rc)
8495 goto exit;
da0436e9
JS
8496
8497 /* Post the low mailbox dma address to the port. */
8498 writel(dma_address->addr_lo, phba->sli4_hba.BMBXregaddr);
da0436e9 8499
2d843edc
JS
8500 /* wait for bootstrap mbox register for low address write done */
8501 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8502 if (rc)
8503 goto exit;
da0436e9
JS
8504
8505 /*
8506 * Read the CQ to ensure the mailbox has completed.
8507 * If so, update the mailbox status so that the upper layers
8508 * can complete the request normally.
8509 */
48f8fdb4
JS
8510 lpfc_sli4_pcimem_bcopy(phba->sli4_hba.bmbx.avirt, mb,
8511 sizeof(struct lpfc_mqe));
da0436e9 8512 mbox_rgn = (struct lpfc_bmbx_create *) phba->sli4_hba.bmbx.avirt;
48f8fdb4
JS
8513 lpfc_sli4_pcimem_bcopy(&mbox_rgn->mcqe, &mboxq->mcqe,
8514 sizeof(struct lpfc_mcqe));
da0436e9 8515 mcqe_status = bf_get(lpfc_mcqe_status, &mbox_rgn->mcqe);
0558056c
JS
8516 /*
8517 * When the CQE status indicates a failure and the mailbox status
8518 * indicates success then copy the CQE status into the mailbox status
8519 * (and prefix it with x4000).
8520 */
da0436e9 8521 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
0558056c
JS
8522 if (bf_get(lpfc_mqe_status, mb) == MBX_SUCCESS)
8523 bf_set(lpfc_mqe_status, mb,
8524 (LPFC_MBX_ERROR_RANGE | mcqe_status));
da0436e9 8525 rc = MBXERR_ERROR;
d7c47992
JS
8526 } else
8527 lpfc_sli4_swap_str(phba, mboxq);
da0436e9
JS
8528
8529 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8530 "(%d):0356 Mailbox cmd x%x (x%x/x%x) Status x%x "
da0436e9
JS
8531 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x"
8532 " x%x x%x CQ: x%x x%x x%x x%x\n",
a183a15f
JS
8533 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
8534 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8535 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8536 bf_get(lpfc_mqe_status, mb),
8537 mb->un.mb_words[0], mb->un.mb_words[1],
8538 mb->un.mb_words[2], mb->un.mb_words[3],
8539 mb->un.mb_words[4], mb->un.mb_words[5],
8540 mb->un.mb_words[6], mb->un.mb_words[7],
8541 mb->un.mb_words[8], mb->un.mb_words[9],
8542 mb->un.mb_words[10], mb->un.mb_words[11],
8543 mb->un.mb_words[12], mboxq->mcqe.word0,
8544 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
8545 mboxq->mcqe.trailer);
8546exit:
8547 /* We are holding the token, no needed for lock when release */
8548 spin_lock_irqsave(&phba->hbalock, iflag);
8549 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8550 phba->sli.mbox_active = NULL;
8551 spin_unlock_irqrestore(&phba->hbalock, iflag);
8552 return rc;
8553}
8554
8555/**
8556 * lpfc_sli_issue_mbox_s4 - Issue an SLI4 mailbox command to firmware
8557 * @phba: Pointer to HBA context object.
8558 * @pmbox: Pointer to mailbox object.
8559 * @flag: Flag indicating how the mailbox need to be processed.
8560 *
8561 * This function is called by discovery code and HBA management code to submit
8562 * a mailbox command to firmware with SLI-4 interface spec.
8563 *
8564 * Return codes the caller owns the mailbox command after the return of the
8565 * function.
8566 **/
8567static int
8568lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
8569 uint32_t flag)
8570{
8571 struct lpfc_sli *psli = &phba->sli;
8572 unsigned long iflags;
8573 int rc;
8574
b76f2dc9
JS
8575 /* dump from issue mailbox command if setup */
8576 lpfc_idiag_mbxacc_dump_issue_mbox(phba, &mboxq->u.mb);
8577
8fa38513
JS
8578 rc = lpfc_mbox_dev_check(phba);
8579 if (unlikely(rc)) {
8580 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8581 "(%d):2544 Mailbox command x%x (x%x/x%x) "
8fa38513
JS
8582 "cannot issue Data: x%x x%x\n",
8583 mboxq->vport ? mboxq->vport->vpi : 0,
8584 mboxq->u.mb.mbxCommand,
a183a15f
JS
8585 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8586 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
8fa38513
JS
8587 psli->sli_flag, flag);
8588 goto out_not_finished;
8589 }
8590
da0436e9
JS
8591 /* Detect polling mode and jump to a handler */
8592 if (!phba->sli4_hba.intr_enable) {
8593 if (flag == MBX_POLL)
8594 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8595 else
8596 rc = -EIO;
8597 if (rc != MBX_SUCCESS)
0558056c 8598 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
da0436e9 8599 "(%d):2541 Mailbox command x%x "
cc459f19
JS
8600 "(x%x/x%x) failure: "
8601 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8602 "Data: x%x x%x\n,",
da0436e9
JS
8603 mboxq->vport ? mboxq->vport->vpi : 0,
8604 mboxq->u.mb.mbxCommand,
a183a15f
JS
8605 lpfc_sli_config_mbox_subsys_get(phba,
8606 mboxq),
8607 lpfc_sli_config_mbox_opcode_get(phba,
8608 mboxq),
cc459f19
JS
8609 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8610 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8611 bf_get(lpfc_mcqe_ext_status,
8612 &mboxq->mcqe),
da0436e9
JS
8613 psli->sli_flag, flag);
8614 return rc;
8615 } else if (flag == MBX_POLL) {
f1126688
JS
8616 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
8617 "(%d):2542 Try to issue mailbox command "
7365f6fd 8618 "x%x (x%x/x%x) synchronously ahead of async "
f1126688 8619 "mailbox command queue: x%x x%x\n",
da0436e9
JS
8620 mboxq->vport ? mboxq->vport->vpi : 0,
8621 mboxq->u.mb.mbxCommand,
a183a15f
JS
8622 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8623 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9 8624 psli->sli_flag, flag);
f1126688
JS
8625 /* Try to block the asynchronous mailbox posting */
8626 rc = lpfc_sli4_async_mbox_block(phba);
8627 if (!rc) {
8628 /* Successfully blocked, now issue sync mbox cmd */
8629 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8630 if (rc != MBX_SUCCESS)
cc459f19 8631 lpfc_printf_log(phba, KERN_WARNING,
a183a15f 8632 LOG_MBOX | LOG_SLI,
cc459f19
JS
8633 "(%d):2597 Sync Mailbox command "
8634 "x%x (x%x/x%x) failure: "
8635 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8636 "Data: x%x x%x\n,",
8637 mboxq->vport ? mboxq->vport->vpi : 0,
a183a15f
JS
8638 mboxq->u.mb.mbxCommand,
8639 lpfc_sli_config_mbox_subsys_get(phba,
8640 mboxq),
8641 lpfc_sli_config_mbox_opcode_get(phba,
8642 mboxq),
cc459f19
JS
8643 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8644 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8645 bf_get(lpfc_mcqe_ext_status,
8646 &mboxq->mcqe),
a183a15f 8647 psli->sli_flag, flag);
f1126688
JS
8648 /* Unblock the async mailbox posting afterward */
8649 lpfc_sli4_async_mbox_unblock(phba);
8650 }
8651 return rc;
da0436e9
JS
8652 }
8653
8654 /* Now, interrupt mode asynchrous mailbox command */
8655 rc = lpfc_mbox_cmd_check(phba, mboxq);
8656 if (rc) {
8657 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8658 "(%d):2543 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8659 "cannot issue Data: x%x x%x\n",
8660 mboxq->vport ? mboxq->vport->vpi : 0,
8661 mboxq->u.mb.mbxCommand,
a183a15f
JS
8662 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8663 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8664 psli->sli_flag, flag);
8665 goto out_not_finished;
8666 }
da0436e9
JS
8667
8668 /* Put the mailbox command to the driver internal FIFO */
8669 psli->slistat.mbox_busy++;
8670 spin_lock_irqsave(&phba->hbalock, iflags);
8671 lpfc_mbox_put(phba, mboxq);
8672 spin_unlock_irqrestore(&phba->hbalock, iflags);
8673 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
8674 "(%d):0354 Mbox cmd issue - Enqueue Data: "
a183a15f 8675 "x%x (x%x/x%x) x%x x%x x%x\n",
da0436e9
JS
8676 mboxq->vport ? mboxq->vport->vpi : 0xffffff,
8677 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
a183a15f
JS
8678 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8679 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8680 phba->pport->port_state,
8681 psli->sli_flag, MBX_NOWAIT);
8682 /* Wake up worker thread to transport mailbox command from head */
8683 lpfc_worker_wake_up(phba);
8684
8685 return MBX_BUSY;
8686
8687out_not_finished:
8688 return MBX_NOT_FINISHED;
8689}
8690
8691/**
8692 * lpfc_sli4_post_async_mbox - Post an SLI4 mailbox command to device
8693 * @phba: Pointer to HBA context object.
8694 *
8695 * This function is called by worker thread to send a mailbox command to
8696 * SLI4 HBA firmware.
8697 *
8698 **/
8699int
8700lpfc_sli4_post_async_mbox(struct lpfc_hba *phba)
8701{
8702 struct lpfc_sli *psli = &phba->sli;
8703 LPFC_MBOXQ_t *mboxq;
8704 int rc = MBX_SUCCESS;
8705 unsigned long iflags;
8706 struct lpfc_mqe *mqe;
8707 uint32_t mbx_cmnd;
8708
8709 /* Check interrupt mode before post async mailbox command */
8710 if (unlikely(!phba->sli4_hba.intr_enable))
8711 return MBX_NOT_FINISHED;
8712
8713 /* Check for mailbox command service token */
8714 spin_lock_irqsave(&phba->hbalock, iflags);
8715 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8716 spin_unlock_irqrestore(&phba->hbalock, iflags);
8717 return MBX_NOT_FINISHED;
8718 }
8719 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8720 spin_unlock_irqrestore(&phba->hbalock, iflags);
8721 return MBX_NOT_FINISHED;
8722 }
8723 if (unlikely(phba->sli.mbox_active)) {
8724 spin_unlock_irqrestore(&phba->hbalock, iflags);
8725 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8726 "0384 There is pending active mailbox cmd\n");
8727 return MBX_NOT_FINISHED;
8728 }
8729 /* Take the mailbox command service token */
8730 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8731
8732 /* Get the next mailbox command from head of queue */
8733 mboxq = lpfc_mbox_get(phba);
8734
8735 /* If no more mailbox command waiting for post, we're done */
8736 if (!mboxq) {
8737 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8738 spin_unlock_irqrestore(&phba->hbalock, iflags);
8739 return MBX_SUCCESS;
8740 }
8741 phba->sli.mbox_active = mboxq;
8742 spin_unlock_irqrestore(&phba->hbalock, iflags);
8743
8744 /* Check device readiness for posting mailbox command */
8745 rc = lpfc_mbox_dev_check(phba);
8746 if (unlikely(rc))
8747 /* Driver clean routine will clean up pending mailbox */
8748 goto out_not_finished;
8749
8750 /* Prepare the mbox command to be posted */
8751 mqe = &mboxq->u.mqe;
8752 mbx_cmnd = bf_get(lpfc_mqe_command, mqe);
8753
8754 /* Start timer for the mbox_tmo and log some mailbox post messages */
8755 mod_timer(&psli->mbox_tmo, (jiffies +
256ec0d0 8756 msecs_to_jiffies(1000 * lpfc_mbox_tmo_val(phba, mboxq))));
da0436e9
JS
8757
8758 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8759 "(%d):0355 Mailbox cmd x%x (x%x/x%x) issue Data: "
da0436e9
JS
8760 "x%x x%x\n",
8761 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
a183a15f
JS
8762 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8763 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8764 phba->pport->port_state, psli->sli_flag);
8765
8766 if (mbx_cmnd != MBX_HEARTBEAT) {
8767 if (mboxq->vport) {
8768 lpfc_debugfs_disc_trc(mboxq->vport,
8769 LPFC_DISC_TRC_MBOX_VPORT,
8770 "MBOX Send vport: cmd:x%x mb:x%x x%x",
8771 mbx_cmnd, mqe->un.mb_words[0],
8772 mqe->un.mb_words[1]);
8773 } else {
8774 lpfc_debugfs_disc_trc(phba->pport,
8775 LPFC_DISC_TRC_MBOX,
8776 "MBOX Send: cmd:x%x mb:x%x x%x",
8777 mbx_cmnd, mqe->un.mb_words[0],
8778 mqe->un.mb_words[1]);
8779 }
8780 }
8781 psli->slistat.mbox_cmd++;
8782
8783 /* Post the mailbox command to the port */
8784 rc = lpfc_sli4_mq_put(phba->sli4_hba.mbx_wq, mqe);
8785 if (rc != MBX_SUCCESS) {
8786 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8787 "(%d):2533 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8788 "cannot issue Data: x%x x%x\n",
8789 mboxq->vport ? mboxq->vport->vpi : 0,
8790 mboxq->u.mb.mbxCommand,
a183a15f
JS
8791 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8792 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8793 psli->sli_flag, MBX_NOWAIT);
8794 goto out_not_finished;
8795 }
8796
8797 return rc;
8798
8799out_not_finished:
8800 spin_lock_irqsave(&phba->hbalock, iflags);
d7069f09
JS
8801 if (phba->sli.mbox_active) {
8802 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
8803 __lpfc_mbox_cmpl_put(phba, mboxq);
8804 /* Release the token */
8805 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8806 phba->sli.mbox_active = NULL;
8807 }
da0436e9
JS
8808 spin_unlock_irqrestore(&phba->hbalock, iflags);
8809
8810 return MBX_NOT_FINISHED;
8811}
8812
8813/**
8814 * lpfc_sli_issue_mbox - Wrapper func for issuing mailbox command
8815 * @phba: Pointer to HBA context object.
8816 * @pmbox: Pointer to mailbox object.
8817 * @flag: Flag indicating how the mailbox need to be processed.
8818 *
8819 * This routine wraps the actual SLI3 or SLI4 mailbox issuing routine from
8820 * the API jump table function pointer from the lpfc_hba struct.
8821 *
8822 * Return codes the caller owns the mailbox command after the return of the
8823 * function.
8824 **/
8825int
8826lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
8827{
8828 return phba->lpfc_sli_issue_mbox(phba, pmbox, flag);
8829}
8830
8831/**
25985edc 8832 * lpfc_mbox_api_table_setup - Set up mbox api function jump table
da0436e9
JS
8833 * @phba: The hba struct for which this call is being executed.
8834 * @dev_grp: The HBA PCI-Device group number.
8835 *
8836 * This routine sets up the mbox interface API function jump table in @phba
8837 * struct.
8838 * Returns: 0 - success, -ENODEV - failure.
8839 **/
8840int
8841lpfc_mbox_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
8842{
8843
8844 switch (dev_grp) {
8845 case LPFC_PCI_DEV_LP:
8846 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s3;
8847 phba->lpfc_sli_handle_slow_ring_event =
8848 lpfc_sli_handle_slow_ring_event_s3;
8849 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s3;
8850 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s3;
8851 phba->lpfc_sli_brdready = lpfc_sli_brdready_s3;
8852 break;
8853 case LPFC_PCI_DEV_OC:
8854 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s4;
8855 phba->lpfc_sli_handle_slow_ring_event =
8856 lpfc_sli_handle_slow_ring_event_s4;
8857 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s4;
8858 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s4;
8859 phba->lpfc_sli_brdready = lpfc_sli_brdready_s4;
8860 break;
8861 default:
8862 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8863 "1420 Invalid HBA PCI-device group: 0x%x\n",
8864 dev_grp);
8865 return -ENODEV;
8866 break;
8867 }
8868 return 0;
8869}
8870
e59058c4 8871/**
3621a710 8872 * __lpfc_sli_ringtx_put - Add an iocb to the txq
e59058c4
JS
8873 * @phba: Pointer to HBA context object.
8874 * @pring: Pointer to driver SLI ring object.
8875 * @piocb: Pointer to address of newly added command iocb.
8876 *
8877 * This function is called with hbalock held to add a command
8878 * iocb to the txq when SLI layer cannot submit the command iocb
8879 * to the ring.
8880 **/
2a9bf3d0 8881void
92d7f7b0 8882__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 8883 struct lpfc_iocbq *piocb)
dea3101e 8884{
1c2ba475 8885 lockdep_assert_held(&phba->hbalock);
dea3101e
JB
8886 /* Insert the caller's iocb in the txq tail for later processing. */
8887 list_add_tail(&piocb->list, &pring->txq);
dea3101e
JB
8888}
8889
e59058c4 8890/**
3621a710 8891 * lpfc_sli_next_iocb - Get the next iocb in the txq
e59058c4
JS
8892 * @phba: Pointer to HBA context object.
8893 * @pring: Pointer to driver SLI ring object.
8894 * @piocb: Pointer to address of newly added command iocb.
8895 *
8896 * This function is called with hbalock held before a new
8897 * iocb is submitted to the firmware. This function checks
8898 * txq to flush the iocbs in txq to Firmware before
8899 * submitting new iocbs to the Firmware.
8900 * If there are iocbs in the txq which need to be submitted
8901 * to firmware, lpfc_sli_next_iocb returns the first element
8902 * of the txq after dequeuing it from txq.
8903 * If there is no iocb in the txq then the function will return
8904 * *piocb and *piocb is set to NULL. Caller needs to check
8905 * *piocb to find if there are more commands in the txq.
8906 **/
dea3101e
JB
8907static struct lpfc_iocbq *
8908lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 8909 struct lpfc_iocbq **piocb)
dea3101e
JB
8910{
8911 struct lpfc_iocbq * nextiocb;
8912
1c2ba475
JT
8913 lockdep_assert_held(&phba->hbalock);
8914
dea3101e
JB
8915 nextiocb = lpfc_sli_ringtx_get(phba, pring);
8916 if (!nextiocb) {
8917 nextiocb = *piocb;
8918 *piocb = NULL;
8919 }
8920
8921 return nextiocb;
8922}
8923
e59058c4 8924/**
3772a991 8925 * __lpfc_sli_issue_iocb_s3 - SLI3 device lockless ver of lpfc_sli_issue_iocb
e59058c4 8926 * @phba: Pointer to HBA context object.
3772a991 8927 * @ring_number: SLI ring number to issue iocb on.
e59058c4
JS
8928 * @piocb: Pointer to command iocb.
8929 * @flag: Flag indicating if this command can be put into txq.
8930 *
3772a991
JS
8931 * __lpfc_sli_issue_iocb_s3 is used by other functions in the driver to issue
8932 * an iocb command to an HBA with SLI-3 interface spec. If the PCI slot is
8933 * recovering from error state, if HBA is resetting or if LPFC_STOP_IOCB_EVENT
8934 * flag is turned on, the function returns IOCB_ERROR. When the link is down,
8935 * this function allows only iocbs for posting buffers. This function finds
8936 * next available slot in the command ring and posts the command to the
8937 * available slot and writes the port attention register to request HBA start
8938 * processing new iocb. If there is no slot available in the ring and
8939 * flag & SLI_IOCB_RET_IOCB is set, the new iocb is added to the txq, otherwise
8940 * the function returns IOCB_BUSY.
e59058c4 8941 *
3772a991
JS
8942 * This function is called with hbalock held. The function will return success
8943 * after it successfully submit the iocb to firmware or after adding to the
8944 * txq.
e59058c4 8945 **/
98c9ea5c 8946static int
3772a991 8947__lpfc_sli_issue_iocb_s3(struct lpfc_hba *phba, uint32_t ring_number,
dea3101e
JB
8948 struct lpfc_iocbq *piocb, uint32_t flag)
8949{
8950 struct lpfc_iocbq *nextiocb;
8951 IOCB_t *iocb;
895427bd 8952 struct lpfc_sli_ring *pring = &phba->sli.sli3_ring[ring_number];
dea3101e 8953
1c2ba475
JT
8954 lockdep_assert_held(&phba->hbalock);
8955
92d7f7b0
JS
8956 if (piocb->iocb_cmpl && (!piocb->vport) &&
8957 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
8958 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
8959 lpfc_printf_log(phba, KERN_ERR,
8960 LOG_SLI | LOG_VPORT,
e8b62011 8961 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS
8962 piocb->iocb.ulpCommand);
8963 dump_stack();
8964 return IOCB_ERROR;
8965 }
8966
8967
8d63f375
LV
8968 /* If the PCI channel is in offline state, do not post iocbs. */
8969 if (unlikely(pci_channel_offline(phba->pcidev)))
8970 return IOCB_ERROR;
8971
a257bf90
JS
8972 /* If HBA has a deferred error attention, fail the iocb. */
8973 if (unlikely(phba->hba_flag & DEFER_ERATT))
8974 return IOCB_ERROR;
8975
dea3101e
JB
8976 /*
8977 * We should never get an IOCB if we are in a < LINK_DOWN state
8978 */
2e0fef85 8979 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB
8980 return IOCB_ERROR;
8981
8982 /*
8983 * Check to see if we are blocking IOCB processing because of a
0b727fea 8984 * outstanding event.
dea3101e 8985 */
0b727fea 8986 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e
JB
8987 goto iocb_busy;
8988
2e0fef85 8989 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 8990 /*
2680eeaa 8991 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB
8992 * can be issued if the link is not up.
8993 */
8994 switch (piocb->iocb.ulpCommand) {
84774a4d
JS
8995 case CMD_GEN_REQUEST64_CR:
8996 case CMD_GEN_REQUEST64_CX:
8997 if (!(phba->sli.sli_flag & LPFC_MENLO_MAINT) ||
8998 (piocb->iocb.un.genreq64.w5.hcsw.Rctl !=
6a9c52cf 8999 FC_RCTL_DD_UNSOL_CMD) ||
84774a4d
JS
9000 (piocb->iocb.un.genreq64.w5.hcsw.Type !=
9001 MENLO_TRANSPORT_TYPE))
9002
9003 goto iocb_busy;
9004 break;
dea3101e
JB
9005 case CMD_QUE_RING_BUF_CN:
9006 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB
9007 /*
9008 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
9009 * completion, iocb_cmpl MUST be 0.
9010 */
9011 if (piocb->iocb_cmpl)
9012 piocb->iocb_cmpl = NULL;
9013 /*FALLTHROUGH*/
9014 case CMD_CREATE_XRI_CR:
2680eeaa
JS
9015 case CMD_CLOSE_XRI_CN:
9016 case CMD_CLOSE_XRI_CX:
dea3101e
JB
9017 break;
9018 default:
9019 goto iocb_busy;
9020 }
9021
9022 /*
9023 * For FCP commands, we must be in a state where we can process link
9024 * attention events.
9025 */
895427bd 9026 } else if (unlikely(pring->ringno == LPFC_FCP_RING &&
92d7f7b0 9027 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 9028 goto iocb_busy;
92d7f7b0 9029 }
dea3101e 9030
dea3101e
JB
9031 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
9032 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
9033 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
9034
9035 if (iocb)
9036 lpfc_sli_update_ring(phba, pring);
9037 else
9038 lpfc_sli_update_full_ring(phba, pring);
9039
9040 if (!piocb)
9041 return IOCB_SUCCESS;
9042
9043 goto out_busy;
9044
9045 iocb_busy:
9046 pring->stats.iocb_cmd_delay++;
9047
9048 out_busy:
9049
9050 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 9051 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB
9052 return IOCB_SUCCESS;
9053 }
9054
9055 return IOCB_BUSY;
9056}
9057
3772a991 9058/**
4f774513
JS
9059 * lpfc_sli4_bpl2sgl - Convert the bpl/bde to a sgl.
9060 * @phba: Pointer to HBA context object.
9061 * @piocb: Pointer to command iocb.
9062 * @sglq: Pointer to the scatter gather queue object.
9063 *
9064 * This routine converts the bpl or bde that is in the IOCB
9065 * to a sgl list for the sli4 hardware. The physical address
9066 * of the bpl/bde is converted back to a virtual address.
9067 * If the IOCB contains a BPL then the list of BDE's is
9068 * converted to sli4_sge's. If the IOCB contains a single
9069 * BDE then it is converted to a single sli_sge.
9070 * The IOCB is still in cpu endianess so the contents of
9071 * the bpl can be used without byte swapping.
9072 *
9073 * Returns valid XRI = Success, NO_XRI = Failure.
9074**/
9075static uint16_t
9076lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
9077 struct lpfc_sglq *sglq)
3772a991 9078{
4f774513
JS
9079 uint16_t xritag = NO_XRI;
9080 struct ulp_bde64 *bpl = NULL;
9081 struct ulp_bde64 bde;
9082 struct sli4_sge *sgl = NULL;
1b51197d 9083 struct lpfc_dmabuf *dmabuf;
4f774513
JS
9084 IOCB_t *icmd;
9085 int numBdes = 0;
9086 int i = 0;
63e801ce
JS
9087 uint32_t offset = 0; /* accumulated offset in the sg request list */
9088 int inbound = 0; /* number of sg reply entries inbound from firmware */
3772a991 9089
4f774513
JS
9090 if (!piocbq || !sglq)
9091 return xritag;
9092
9093 sgl = (struct sli4_sge *)sglq->sgl;
9094 icmd = &piocbq->iocb;
6b5151fd
JS
9095 if (icmd->ulpCommand == CMD_XMIT_BLS_RSP64_CX)
9096 return sglq->sli4_xritag;
4f774513
JS
9097 if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
9098 numBdes = icmd->un.genreq64.bdl.bdeSize /
9099 sizeof(struct ulp_bde64);
9100 /* The addrHigh and addrLow fields within the IOCB
9101 * have not been byteswapped yet so there is no
9102 * need to swap them back.
9103 */
1b51197d
JS
9104 if (piocbq->context3)
9105 dmabuf = (struct lpfc_dmabuf *)piocbq->context3;
9106 else
9107 return xritag;
4f774513 9108
1b51197d 9109 bpl = (struct ulp_bde64 *)dmabuf->virt;
4f774513
JS
9110 if (!bpl)
9111 return xritag;
9112
9113 for (i = 0; i < numBdes; i++) {
9114 /* Should already be byte swapped. */
28baac74
JS
9115 sgl->addr_hi = bpl->addrHigh;
9116 sgl->addr_lo = bpl->addrLow;
9117
0558056c 9118 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9119 if ((i+1) == numBdes)
9120 bf_set(lpfc_sli4_sge_last, sgl, 1);
9121 else
9122 bf_set(lpfc_sli4_sge_last, sgl, 0);
28baac74
JS
9123 /* swap the size field back to the cpu so we
9124 * can assign it to the sgl.
9125 */
9126 bde.tus.w = le32_to_cpu(bpl->tus.w);
9127 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
63e801ce
JS
9128 /* The offsets in the sgl need to be accumulated
9129 * separately for the request and reply lists.
9130 * The request is always first, the reply follows.
9131 */
9132 if (piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) {
9133 /* add up the reply sg entries */
9134 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
9135 inbound++;
9136 /* first inbound? reset the offset */
9137 if (inbound == 1)
9138 offset = 0;
9139 bf_set(lpfc_sli4_sge_offset, sgl, offset);
f9bb2da1
JS
9140 bf_set(lpfc_sli4_sge_type, sgl,
9141 LPFC_SGE_TYPE_DATA);
63e801ce
JS
9142 offset += bde.tus.f.bdeSize;
9143 }
546fc854 9144 sgl->word2 = cpu_to_le32(sgl->word2);
4f774513
JS
9145 bpl++;
9146 sgl++;
9147 }
9148 } else if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BDE_64) {
9149 /* The addrHigh and addrLow fields of the BDE have not
9150 * been byteswapped yet so they need to be swapped
9151 * before putting them in the sgl.
9152 */
9153 sgl->addr_hi =
9154 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh);
9155 sgl->addr_lo =
9156 cpu_to_le32(icmd->un.genreq64.bdl.addrLow);
0558056c 9157 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9158 bf_set(lpfc_sli4_sge_last, sgl, 1);
9159 sgl->word2 = cpu_to_le32(sgl->word2);
28baac74
JS
9160 sgl->sge_len =
9161 cpu_to_le32(icmd->un.genreq64.bdl.bdeSize);
4f774513
JS
9162 }
9163 return sglq->sli4_xritag;
3772a991 9164}
92d7f7b0 9165
e59058c4 9166/**
4f774513 9167 * lpfc_sli_iocb2wqe - Convert the IOCB to a work queue entry.
e59058c4 9168 * @phba: Pointer to HBA context object.
4f774513
JS
9169 * @piocb: Pointer to command iocb.
9170 * @wqe: Pointer to the work queue entry.
e59058c4 9171 *
4f774513
JS
9172 * This routine converts the iocb command to its Work Queue Entry
9173 * equivalent. The wqe pointer should not have any fields set when
9174 * this routine is called because it will memcpy over them.
9175 * This routine does not set the CQ_ID or the WQEC bits in the
9176 * wqe.
e59058c4 9177 *
4f774513 9178 * Returns: 0 = Success, IOCB_ERROR = Failure.
e59058c4 9179 **/
cf5bf97e 9180static int
4f774513 9181lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
205e8240 9182 union lpfc_wqe128 *wqe)
cf5bf97e 9183{
5ffc266e 9184 uint32_t xmit_len = 0, total_len = 0;
4f774513
JS
9185 uint8_t ct = 0;
9186 uint32_t fip;
9187 uint32_t abort_tag;
9188 uint8_t command_type = ELS_COMMAND_NON_FIP;
9189 uint8_t cmnd;
9190 uint16_t xritag;
dcf2a4e0
JS
9191 uint16_t abrt_iotag;
9192 struct lpfc_iocbq *abrtiocbq;
4f774513 9193 struct ulp_bde64 *bpl = NULL;
f0d9bccc 9194 uint32_t els_id = LPFC_ELS_ID_DEFAULT;
5ffc266e
JS
9195 int numBdes, i;
9196 struct ulp_bde64 bde;
c31098ce 9197 struct lpfc_nodelist *ndlp;
ff78d8f9 9198 uint32_t *pcmd;
1b51197d 9199 uint32_t if_type;
4f774513 9200
45ed1190 9201 fip = phba->hba_flag & HBA_FIP_SUPPORT;
4f774513 9202 /* The fcp commands will set command type */
0c287589 9203 if (iocbq->iocb_flag & LPFC_IO_FCP)
4f774513 9204 command_type = FCP_COMMAND;
c868595d 9205 else if (fip && (iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK))
0c287589
JS
9206 command_type = ELS_COMMAND_FIP;
9207 else
9208 command_type = ELS_COMMAND_NON_FIP;
9209
b5c53958
JS
9210 if (phba->fcp_embed_io)
9211 memset(wqe, 0, sizeof(union lpfc_wqe128));
4f774513
JS
9212 /* Some of the fields are in the right position already */
9213 memcpy(wqe, &iocbq->iocb, sizeof(union lpfc_wqe));
ae9e28f3
JS
9214 if (iocbq->iocb.ulpCommand != CMD_SEND_FRAME) {
9215 /* The ct field has moved so reset */
9216 wqe->generic.wqe_com.word7 = 0;
9217 wqe->generic.wqe_com.word10 = 0;
9218 }
b5c53958
JS
9219
9220 abort_tag = (uint32_t) iocbq->iotag;
9221 xritag = iocbq->sli4_xritag;
4f774513
JS
9222 /* words0-2 bpl convert bde */
9223 if (iocbq->iocb.un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
5ffc266e
JS
9224 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9225 sizeof(struct ulp_bde64);
4f774513
JS
9226 bpl = (struct ulp_bde64 *)
9227 ((struct lpfc_dmabuf *)iocbq->context3)->virt;
9228 if (!bpl)
9229 return IOCB_ERROR;
cf5bf97e 9230
4f774513
JS
9231 /* Should already be byte swapped. */
9232 wqe->generic.bde.addrHigh = le32_to_cpu(bpl->addrHigh);
9233 wqe->generic.bde.addrLow = le32_to_cpu(bpl->addrLow);
9234 /* swap the size field back to the cpu so we
9235 * can assign it to the sgl.
9236 */
9237 wqe->generic.bde.tus.w = le32_to_cpu(bpl->tus.w);
5ffc266e
JS
9238 xmit_len = wqe->generic.bde.tus.f.bdeSize;
9239 total_len = 0;
9240 for (i = 0; i < numBdes; i++) {
9241 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
9242 total_len += bde.tus.f.bdeSize;
9243 }
4f774513 9244 } else
5ffc266e 9245 xmit_len = iocbq->iocb.un.fcpi64.bdl.bdeSize;
cf5bf97e 9246
4f774513
JS
9247 iocbq->iocb.ulpIoTag = iocbq->iotag;
9248 cmnd = iocbq->iocb.ulpCommand;
a4bc3379 9249
4f774513
JS
9250 switch (iocbq->iocb.ulpCommand) {
9251 case CMD_ELS_REQUEST64_CR:
93d1379e
JS
9252 if (iocbq->iocb_flag & LPFC_IO_LIBDFC)
9253 ndlp = iocbq->context_un.ndlp;
9254 else
9255 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513
JS
9256 if (!iocbq->iocb.ulpLe) {
9257 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9258 "2007 Only Limited Edition cmd Format"
9259 " supported 0x%x\n",
9260 iocbq->iocb.ulpCommand);
9261 return IOCB_ERROR;
9262 }
ff78d8f9 9263
5ffc266e 9264 wqe->els_req.payload_len = xmit_len;
4f774513
JS
9265 /* Els_reguest64 has a TMO */
9266 bf_set(wqe_tmo, &wqe->els_req.wqe_com,
9267 iocbq->iocb.ulpTimeout);
9268 /* Need a VF for word 4 set the vf bit*/
9269 bf_set(els_req64_vf, &wqe->els_req, 0);
9270 /* And a VFID for word 12 */
9271 bf_set(els_req64_vfid, &wqe->els_req, 0);
4f774513 9272 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
f0d9bccc
JS
9273 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9274 iocbq->iocb.ulpContext);
9275 bf_set(wqe_ct, &wqe->els_req.wqe_com, ct);
9276 bf_set(wqe_pu, &wqe->els_req.wqe_com, 0);
4f774513 9277 /* CCP CCPE PV PRI in word10 were set in the memcpy */
ff78d8f9 9278 if (command_type == ELS_COMMAND_FIP)
c868595d
JS
9279 els_id = ((iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK)
9280 >> LPFC_FIP_ELS_ID_SHIFT);
ff78d8f9
JS
9281 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9282 iocbq->context2)->virt);
1b51197d
JS
9283 if_type = bf_get(lpfc_sli_intf_if_type,
9284 &phba->sli4_hba.sli_intf);
27d6ac0a 9285 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
ff78d8f9 9286 if (pcmd && (*pcmd == ELS_CMD_FLOGI ||
cb69f7de 9287 *pcmd == ELS_CMD_SCR ||
6b5151fd 9288 *pcmd == ELS_CMD_FDISC ||
bdcd2b92 9289 *pcmd == ELS_CMD_LOGO ||
ff78d8f9
JS
9290 *pcmd == ELS_CMD_PLOGI)) {
9291 bf_set(els_req64_sp, &wqe->els_req, 1);
9292 bf_set(els_req64_sid, &wqe->els_req,
9293 iocbq->vport->fc_myDID);
939723a4
JS
9294 if ((*pcmd == ELS_CMD_FLOGI) &&
9295 !(phba->fc_topology ==
9296 LPFC_TOPOLOGY_LOOP))
9297 bf_set(els_req64_sid, &wqe->els_req, 0);
ff78d8f9
JS
9298 bf_set(wqe_ct, &wqe->els_req.wqe_com, 1);
9299 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
a7dd9c0f 9300 phba->vpi_ids[iocbq->vport->vpi]);
3ef6d24c 9301 } else if (pcmd && iocbq->context1) {
ff78d8f9
JS
9302 bf_set(wqe_ct, &wqe->els_req.wqe_com, 0);
9303 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9304 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
9305 }
c868595d 9306 }
6d368e53
JS
9307 bf_set(wqe_temp_rpi, &wqe->els_req.wqe_com,
9308 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
f0d9bccc
JS
9309 bf_set(wqe_els_id, &wqe->els_req.wqe_com, els_id);
9310 bf_set(wqe_dbde, &wqe->els_req.wqe_com, 1);
9311 bf_set(wqe_iod, &wqe->els_req.wqe_com, LPFC_WQE_IOD_READ);
9312 bf_set(wqe_qosd, &wqe->els_req.wqe_com, 1);
9313 bf_set(wqe_lenloc, &wqe->els_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9314 bf_set(wqe_ebde_cnt, &wqe->els_req.wqe_com, 0);
af22741c 9315 wqe->els_req.max_response_payload_len = total_len - xmit_len;
7851fe2c 9316 break;
5ffc266e 9317 case CMD_XMIT_SEQUENCE64_CX:
f0d9bccc
JS
9318 bf_set(wqe_ctxt_tag, &wqe->xmit_sequence.wqe_com,
9319 iocbq->iocb.un.ulpWord[3]);
9320 bf_set(wqe_rcvoxid, &wqe->xmit_sequence.wqe_com,
7851fe2c 9321 iocbq->iocb.unsli3.rcvsli3.ox_id);
5ffc266e
JS
9322 /* The entire sequence is transmitted for this IOCB */
9323 xmit_len = total_len;
9324 cmnd = CMD_XMIT_SEQUENCE64_CR;
1b51197d
JS
9325 if (phba->link_flag & LS_LOOPBACK_MODE)
9326 bf_set(wqe_xo, &wqe->xmit_sequence.wge_ctl, 1);
4f774513 9327 case CMD_XMIT_SEQUENCE64_CR:
f0d9bccc
JS
9328 /* word3 iocb=io_tag32 wqe=reserved */
9329 wqe->xmit_sequence.rsvd3 = 0;
4f774513
JS
9330 /* word4 relative_offset memcpy */
9331 /* word5 r_ctl/df_ctl memcpy */
f0d9bccc
JS
9332 bf_set(wqe_pu, &wqe->xmit_sequence.wqe_com, 0);
9333 bf_set(wqe_dbde, &wqe->xmit_sequence.wqe_com, 1);
9334 bf_set(wqe_iod, &wqe->xmit_sequence.wqe_com,
9335 LPFC_WQE_IOD_WRITE);
9336 bf_set(wqe_lenloc, &wqe->xmit_sequence.wqe_com,
9337 LPFC_WQE_LENLOC_WORD12);
9338 bf_set(wqe_ebde_cnt, &wqe->xmit_sequence.wqe_com, 0);
5ffc266e
JS
9339 wqe->xmit_sequence.xmit_len = xmit_len;
9340 command_type = OTHER_COMMAND;
7851fe2c 9341 break;
4f774513 9342 case CMD_XMIT_BCAST64_CN:
f0d9bccc
JS
9343 /* word3 iocb=iotag32 wqe=seq_payload_len */
9344 wqe->xmit_bcast64.seq_payload_len = xmit_len;
4f774513
JS
9345 /* word4 iocb=rsvd wqe=rsvd */
9346 /* word5 iocb=rctl/type/df_ctl wqe=rctl/type/df_ctl memcpy */
9347 /* word6 iocb=ctxt_tag/io_tag wqe=ctxt_tag/xri */
f0d9bccc 9348 bf_set(wqe_ct, &wqe->xmit_bcast64.wqe_com,
4f774513 9349 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
f0d9bccc
JS
9350 bf_set(wqe_dbde, &wqe->xmit_bcast64.wqe_com, 1);
9351 bf_set(wqe_iod, &wqe->xmit_bcast64.wqe_com, LPFC_WQE_IOD_WRITE);
9352 bf_set(wqe_lenloc, &wqe->xmit_bcast64.wqe_com,
9353 LPFC_WQE_LENLOC_WORD3);
9354 bf_set(wqe_ebde_cnt, &wqe->xmit_bcast64.wqe_com, 0);
7851fe2c 9355 break;
4f774513
JS
9356 case CMD_FCP_IWRITE64_CR:
9357 command_type = FCP_COMMAND_DATA_OUT;
f0d9bccc
JS
9358 /* word3 iocb=iotag wqe=payload_offset_len */
9359 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9360 bf_set(payload_offset_len, &wqe->fcp_iwrite,
9361 xmit_len + sizeof(struct fcp_rsp));
9362 bf_set(cmd_buff_len, &wqe->fcp_iwrite,
9363 0);
f0d9bccc
JS
9364 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9365 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9366 bf_set(wqe_erp, &wqe->fcp_iwrite.wqe_com,
9367 iocbq->iocb.ulpFCP2Rcvy);
9368 bf_set(wqe_lnk, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpXS);
9369 /* Always open the exchange */
f0d9bccc
JS
9370 bf_set(wqe_iod, &wqe->fcp_iwrite.wqe_com, LPFC_WQE_IOD_WRITE);
9371 bf_set(wqe_lenloc, &wqe->fcp_iwrite.wqe_com,
9372 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9373 bf_set(wqe_pu, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9374 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 1);
1ba981fd
JS
9375 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9376 bf_set(wqe_oas, &wqe->fcp_iwrite.wqe_com, 1);
c92c841c
JS
9377 bf_set(wqe_ccpe, &wqe->fcp_iwrite.wqe_com, 1);
9378 if (iocbq->priority) {
9379 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9380 (iocbq->priority << 1));
9381 } else {
1ba981fd
JS
9382 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9383 (phba->cfg_XLanePriority << 1));
9384 }
9385 }
b5c53958
JS
9386 /* Note, word 10 is already initialized to 0 */
9387
414abe0a
JS
9388 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9389 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9390 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 1);
9391 else
9392 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 0);
9393
b5c53958
JS
9394 if (phba->fcp_embed_io) {
9395 struct lpfc_scsi_buf *lpfc_cmd;
9396 struct sli4_sge *sgl;
b5c53958
JS
9397 struct fcp_cmnd *fcp_cmnd;
9398 uint32_t *ptr;
9399
9400 /* 128 byte wqe support here */
b5c53958
JS
9401
9402 lpfc_cmd = iocbq->context1;
9403 sgl = (struct sli4_sge *)lpfc_cmd->fcp_bpl;
9404 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9405
9406 /* Word 0-2 - FCP_CMND */
205e8240 9407 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9408 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9409 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9410 wqe->generic.bde.addrHigh = 0;
9411 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9412
205e8240
JS
9413 bf_set(wqe_wqes, &wqe->fcp_iwrite.wqe_com, 1);
9414 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 0);
b5c53958
JS
9415
9416 /* Word 22-29 FCP CMND Payload */
205e8240 9417 ptr = &wqe->words[22];
b5c53958
JS
9418 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9419 }
7851fe2c 9420 break;
4f774513 9421 case CMD_FCP_IREAD64_CR:
f0d9bccc
JS
9422 /* word3 iocb=iotag wqe=payload_offset_len */
9423 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9424 bf_set(payload_offset_len, &wqe->fcp_iread,
9425 xmit_len + sizeof(struct fcp_rsp));
9426 bf_set(cmd_buff_len, &wqe->fcp_iread,
9427 0);
f0d9bccc
JS
9428 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9429 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9430 bf_set(wqe_erp, &wqe->fcp_iread.wqe_com,
9431 iocbq->iocb.ulpFCP2Rcvy);
9432 bf_set(wqe_lnk, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpXS);
f1126688 9433 /* Always open the exchange */
f0d9bccc
JS
9434 bf_set(wqe_iod, &wqe->fcp_iread.wqe_com, LPFC_WQE_IOD_READ);
9435 bf_set(wqe_lenloc, &wqe->fcp_iread.wqe_com,
9436 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9437 bf_set(wqe_pu, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9438 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 1);
1ba981fd
JS
9439 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9440 bf_set(wqe_oas, &wqe->fcp_iread.wqe_com, 1);
c92c841c
JS
9441 bf_set(wqe_ccpe, &wqe->fcp_iread.wqe_com, 1);
9442 if (iocbq->priority) {
9443 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9444 (iocbq->priority << 1));
9445 } else {
1ba981fd
JS
9446 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9447 (phba->cfg_XLanePriority << 1));
9448 }
9449 }
b5c53958
JS
9450 /* Note, word 10 is already initialized to 0 */
9451
414abe0a
JS
9452 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9453 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9454 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 1);
9455 else
9456 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 0);
9457
b5c53958
JS
9458 if (phba->fcp_embed_io) {
9459 struct lpfc_scsi_buf *lpfc_cmd;
9460 struct sli4_sge *sgl;
b5c53958
JS
9461 struct fcp_cmnd *fcp_cmnd;
9462 uint32_t *ptr;
9463
9464 /* 128 byte wqe support here */
b5c53958
JS
9465
9466 lpfc_cmd = iocbq->context1;
9467 sgl = (struct sli4_sge *)lpfc_cmd->fcp_bpl;
9468 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9469
9470 /* Word 0-2 - FCP_CMND */
205e8240 9471 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9472 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9473 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9474 wqe->generic.bde.addrHigh = 0;
9475 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9476
205e8240
JS
9477 bf_set(wqe_wqes, &wqe->fcp_iread.wqe_com, 1);
9478 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 0);
b5c53958
JS
9479
9480 /* Word 22-29 FCP CMND Payload */
205e8240 9481 ptr = &wqe->words[22];
b5c53958
JS
9482 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9483 }
7851fe2c 9484 break;
4f774513 9485 case CMD_FCP_ICMND64_CR:
0ba4b219
JS
9486 /* word3 iocb=iotag wqe=payload_offset_len */
9487 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
9488 bf_set(payload_offset_len, &wqe->fcp_icmd,
9489 xmit_len + sizeof(struct fcp_rsp));
9490 bf_set(cmd_buff_len, &wqe->fcp_icmd,
9491 0);
f0d9bccc 9492 /* word3 iocb=IO_TAG wqe=reserved */
f0d9bccc 9493 bf_set(wqe_pu, &wqe->fcp_icmd.wqe_com, 0);
4f774513 9494 /* Always open the exchange */
f0d9bccc
JS
9495 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 1);
9496 bf_set(wqe_iod, &wqe->fcp_icmd.wqe_com, LPFC_WQE_IOD_WRITE);
9497 bf_set(wqe_qosd, &wqe->fcp_icmd.wqe_com, 1);
9498 bf_set(wqe_lenloc, &wqe->fcp_icmd.wqe_com,
9499 LPFC_WQE_LENLOC_NONE);
2a94aea4
JS
9500 bf_set(wqe_erp, &wqe->fcp_icmd.wqe_com,
9501 iocbq->iocb.ulpFCP2Rcvy);
1ba981fd
JS
9502 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9503 bf_set(wqe_oas, &wqe->fcp_icmd.wqe_com, 1);
c92c841c
JS
9504 bf_set(wqe_ccpe, &wqe->fcp_icmd.wqe_com, 1);
9505 if (iocbq->priority) {
9506 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9507 (iocbq->priority << 1));
9508 } else {
1ba981fd
JS
9509 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9510 (phba->cfg_XLanePriority << 1));
9511 }
9512 }
b5c53958
JS
9513 /* Note, word 10 is already initialized to 0 */
9514
9515 if (phba->fcp_embed_io) {
9516 struct lpfc_scsi_buf *lpfc_cmd;
9517 struct sli4_sge *sgl;
b5c53958
JS
9518 struct fcp_cmnd *fcp_cmnd;
9519 uint32_t *ptr;
9520
9521 /* 128 byte wqe support here */
b5c53958
JS
9522
9523 lpfc_cmd = iocbq->context1;
9524 sgl = (struct sli4_sge *)lpfc_cmd->fcp_bpl;
9525 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9526
9527 /* Word 0-2 - FCP_CMND */
205e8240 9528 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9529 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9530 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9531 wqe->generic.bde.addrHigh = 0;
9532 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9533
205e8240
JS
9534 bf_set(wqe_wqes, &wqe->fcp_icmd.wqe_com, 1);
9535 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 0);
b5c53958
JS
9536
9537 /* Word 22-29 FCP CMND Payload */
205e8240 9538 ptr = &wqe->words[22];
b5c53958
JS
9539 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9540 }
7851fe2c 9541 break;
4f774513 9542 case CMD_GEN_REQUEST64_CR:
63e801ce
JS
9543 /* For this command calculate the xmit length of the
9544 * request bde.
9545 */
9546 xmit_len = 0;
9547 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9548 sizeof(struct ulp_bde64);
9549 for (i = 0; i < numBdes; i++) {
63e801ce 9550 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
546fc854
JS
9551 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
9552 break;
63e801ce
JS
9553 xmit_len += bde.tus.f.bdeSize;
9554 }
f0d9bccc
JS
9555 /* word3 iocb=IO_TAG wqe=request_payload_len */
9556 wqe->gen_req.request_payload_len = xmit_len;
9557 /* word4 iocb=parameter wqe=relative_offset memcpy */
9558 /* word5 [rctl, type, df_ctl, la] copied in memcpy */
4f774513
JS
9559 /* word6 context tag copied in memcpy */
9560 if (iocbq->iocb.ulpCt_h || iocbq->iocb.ulpCt_l) {
9561 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
9562 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9563 "2015 Invalid CT %x command 0x%x\n",
9564 ct, iocbq->iocb.ulpCommand);
9565 return IOCB_ERROR;
9566 }
f0d9bccc
JS
9567 bf_set(wqe_ct, &wqe->gen_req.wqe_com, 0);
9568 bf_set(wqe_tmo, &wqe->gen_req.wqe_com, iocbq->iocb.ulpTimeout);
9569 bf_set(wqe_pu, &wqe->gen_req.wqe_com, iocbq->iocb.ulpPU);
9570 bf_set(wqe_dbde, &wqe->gen_req.wqe_com, 1);
9571 bf_set(wqe_iod, &wqe->gen_req.wqe_com, LPFC_WQE_IOD_READ);
9572 bf_set(wqe_qosd, &wqe->gen_req.wqe_com, 1);
9573 bf_set(wqe_lenloc, &wqe->gen_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9574 bf_set(wqe_ebde_cnt, &wqe->gen_req.wqe_com, 0);
af22741c 9575 wqe->gen_req.max_response_payload_len = total_len - xmit_len;
4f774513 9576 command_type = OTHER_COMMAND;
7851fe2c 9577 break;
4f774513 9578 case CMD_XMIT_ELS_RSP64_CX:
c31098ce 9579 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513 9580 /* words0-2 BDE memcpy */
f0d9bccc
JS
9581 /* word3 iocb=iotag32 wqe=response_payload_len */
9582 wqe->xmit_els_rsp.response_payload_len = xmit_len;
939723a4
JS
9583 /* word4 */
9584 wqe->xmit_els_rsp.word4 = 0;
4f774513
JS
9585 /* word5 iocb=rsvd wge=did */
9586 bf_set(wqe_els_did, &wqe->xmit_els_rsp.wqe_dest,
939723a4
JS
9587 iocbq->iocb.un.xseq64.xmit_els_remoteID);
9588
9589 if_type = bf_get(lpfc_sli_intf_if_type,
9590 &phba->sli4_hba.sli_intf);
27d6ac0a 9591 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
939723a4
JS
9592 if (iocbq->vport->fc_flag & FC_PT2PT) {
9593 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9594 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
9595 iocbq->vport->fc_myDID);
9596 if (iocbq->vport->fc_myDID == Fabric_DID) {
9597 bf_set(wqe_els_did,
9598 &wqe->xmit_els_rsp.wqe_dest, 0);
9599 }
9600 }
9601 }
f0d9bccc
JS
9602 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com,
9603 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9604 bf_set(wqe_pu, &wqe->xmit_els_rsp.wqe_com, iocbq->iocb.ulpPU);
9605 bf_set(wqe_rcvoxid, &wqe->xmit_els_rsp.wqe_com,
7851fe2c 9606 iocbq->iocb.unsli3.rcvsli3.ox_id);
4f774513 9607 if (!iocbq->iocb.ulpCt_h && iocbq->iocb.ulpCt_l)
f0d9bccc 9608 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
6d368e53 9609 phba->vpi_ids[iocbq->vport->vpi]);
f0d9bccc
JS
9610 bf_set(wqe_dbde, &wqe->xmit_els_rsp.wqe_com, 1);
9611 bf_set(wqe_iod, &wqe->xmit_els_rsp.wqe_com, LPFC_WQE_IOD_WRITE);
9612 bf_set(wqe_qosd, &wqe->xmit_els_rsp.wqe_com, 1);
9613 bf_set(wqe_lenloc, &wqe->xmit_els_rsp.wqe_com,
9614 LPFC_WQE_LENLOC_WORD3);
9615 bf_set(wqe_ebde_cnt, &wqe->xmit_els_rsp.wqe_com, 0);
6d368e53
JS
9616 bf_set(wqe_rsp_temp_rpi, &wqe->xmit_els_rsp,
9617 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
ff78d8f9
JS
9618 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9619 iocbq->context2)->virt);
9620 if (phba->fc_topology == LPFC_TOPOLOGY_LOOP) {
939723a4
JS
9621 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9622 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
ff78d8f9 9623 iocbq->vport->fc_myDID);
939723a4
JS
9624 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com, 1);
9625 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
ff78d8f9
JS
9626 phba->vpi_ids[phba->pport->vpi]);
9627 }
4f774513 9628 command_type = OTHER_COMMAND;
7851fe2c 9629 break;
4f774513
JS
9630 case CMD_CLOSE_XRI_CN:
9631 case CMD_ABORT_XRI_CN:
9632 case CMD_ABORT_XRI_CX:
9633 /* words 0-2 memcpy should be 0 rserved */
9634 /* port will send abts */
dcf2a4e0
JS
9635 abrt_iotag = iocbq->iocb.un.acxri.abortContextTag;
9636 if (abrt_iotag != 0 && abrt_iotag <= phba->sli.last_iotag) {
9637 abrtiocbq = phba->sli.iocbq_lookup[abrt_iotag];
9638 fip = abrtiocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK;
9639 } else
9640 fip = 0;
9641
9642 if ((iocbq->iocb.ulpCommand == CMD_CLOSE_XRI_CN) || fip)
4f774513 9643 /*
dcf2a4e0
JS
9644 * The link is down, or the command was ELS_FIP
9645 * so the fw does not need to send abts
4f774513
JS
9646 * on the wire.
9647 */
9648 bf_set(abort_cmd_ia, &wqe->abort_cmd, 1);
9649 else
9650 bf_set(abort_cmd_ia, &wqe->abort_cmd, 0);
9651 bf_set(abort_cmd_criteria, &wqe->abort_cmd, T_XRI_TAG);
f0d9bccc
JS
9652 /* word5 iocb=CONTEXT_TAG|IO_TAG wqe=reserved */
9653 wqe->abort_cmd.rsrvd5 = 0;
9654 bf_set(wqe_ct, &wqe->abort_cmd.wqe_com,
4f774513
JS
9655 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9656 abort_tag = iocbq->iocb.un.acxri.abortIoTag;
4f774513
JS
9657 /*
9658 * The abort handler will send us CMD_ABORT_XRI_CN or
9659 * CMD_CLOSE_XRI_CN and the fw only accepts CMD_ABORT_XRI_CX
9660 */
f0d9bccc
JS
9661 bf_set(wqe_cmnd, &wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
9662 bf_set(wqe_qosd, &wqe->abort_cmd.wqe_com, 1);
9663 bf_set(wqe_lenloc, &wqe->abort_cmd.wqe_com,
9664 LPFC_WQE_LENLOC_NONE);
4f774513
JS
9665 cmnd = CMD_ABORT_XRI_CX;
9666 command_type = OTHER_COMMAND;
9667 xritag = 0;
7851fe2c 9668 break;
6669f9bb 9669 case CMD_XMIT_BLS_RSP64_CX:
6b5151fd 9670 ndlp = (struct lpfc_nodelist *)iocbq->context1;
546fc854 9671 /* As BLS ABTS RSP WQE is very different from other WQEs,
6669f9bb
JS
9672 * we re-construct this WQE here based on information in
9673 * iocbq from scratch.
9674 */
9675 memset(wqe, 0, sizeof(union lpfc_wqe));
5ffc266e 9676 /* OX_ID is invariable to who sent ABTS to CT exchange */
6669f9bb 9677 bf_set(xmit_bls_rsp64_oxid, &wqe->xmit_bls_rsp,
546fc854
JS
9678 bf_get(lpfc_abts_oxid, &iocbq->iocb.un.bls_rsp));
9679 if (bf_get(lpfc_abts_orig, &iocbq->iocb.un.bls_rsp) ==
5ffc266e
JS
9680 LPFC_ABTS_UNSOL_INT) {
9681 /* ABTS sent by initiator to CT exchange, the
9682 * RX_ID field will be filled with the newly
9683 * allocated responder XRI.
9684 */
9685 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
9686 iocbq->sli4_xritag);
9687 } else {
9688 /* ABTS sent by responder to CT exchange, the
9689 * RX_ID field will be filled with the responder
9690 * RX_ID from ABTS.
9691 */
9692 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
546fc854 9693 bf_get(lpfc_abts_rxid, &iocbq->iocb.un.bls_rsp));
5ffc266e 9694 }
6669f9bb
JS
9695 bf_set(xmit_bls_rsp64_seqcnthi, &wqe->xmit_bls_rsp, 0xffff);
9696 bf_set(wqe_xmit_bls_pt, &wqe->xmit_bls_rsp.wqe_dest, 0x1);
6b5151fd
JS
9697
9698 /* Use CT=VPI */
9699 bf_set(wqe_els_did, &wqe->xmit_bls_rsp.wqe_dest,
9700 ndlp->nlp_DID);
9701 bf_set(xmit_bls_rsp64_temprpi, &wqe->xmit_bls_rsp,
9702 iocbq->iocb.ulpContext);
9703 bf_set(wqe_ct, &wqe->xmit_bls_rsp.wqe_com, 1);
6669f9bb 9704 bf_set(wqe_ctxt_tag, &wqe->xmit_bls_rsp.wqe_com,
6b5151fd 9705 phba->vpi_ids[phba->pport->vpi]);
f0d9bccc
JS
9706 bf_set(wqe_qosd, &wqe->xmit_bls_rsp.wqe_com, 1);
9707 bf_set(wqe_lenloc, &wqe->xmit_bls_rsp.wqe_com,
9708 LPFC_WQE_LENLOC_NONE);
6669f9bb
JS
9709 /* Overwrite the pre-set comnd type with OTHER_COMMAND */
9710 command_type = OTHER_COMMAND;
546fc854
JS
9711 if (iocbq->iocb.un.xseq64.w5.hcsw.Rctl == FC_RCTL_BA_RJT) {
9712 bf_set(xmit_bls_rsp64_rjt_vspec, &wqe->xmit_bls_rsp,
9713 bf_get(lpfc_vndr_code, &iocbq->iocb.un.bls_rsp));
9714 bf_set(xmit_bls_rsp64_rjt_expc, &wqe->xmit_bls_rsp,
9715 bf_get(lpfc_rsn_expln, &iocbq->iocb.un.bls_rsp));
9716 bf_set(xmit_bls_rsp64_rjt_rsnc, &wqe->xmit_bls_rsp,
9717 bf_get(lpfc_rsn_code, &iocbq->iocb.un.bls_rsp));
9718 }
9719
7851fe2c 9720 break;
ae9e28f3
JS
9721 case CMD_SEND_FRAME:
9722 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9723 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9724 return 0;
4f774513
JS
9725 case CMD_XRI_ABORTED_CX:
9726 case CMD_CREATE_XRI_CR: /* Do we expect to use this? */
4f774513
JS
9727 case CMD_IOCB_FCP_IBIDIR64_CR: /* bidirectional xfer */
9728 case CMD_FCP_TSEND64_CX: /* Target mode send xfer-ready */
9729 case CMD_FCP_TRSP64_CX: /* Target mode rcv */
9730 case CMD_FCP_AUTO_TRSP_CX: /* Auto target rsp */
9731 default:
9732 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9733 "2014 Invalid command 0x%x\n",
9734 iocbq->iocb.ulpCommand);
9735 return IOCB_ERROR;
7851fe2c 9736 break;
4f774513 9737 }
6d368e53 9738
8012cc38
JS
9739 if (iocbq->iocb_flag & LPFC_IO_DIF_PASS)
9740 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_PASSTHRU);
9741 else if (iocbq->iocb_flag & LPFC_IO_DIF_STRIP)
9742 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_STRIP);
9743 else if (iocbq->iocb_flag & LPFC_IO_DIF_INSERT)
9744 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_INSERT);
9745 iocbq->iocb_flag &= ~(LPFC_IO_DIF_PASS | LPFC_IO_DIF_STRIP |
9746 LPFC_IO_DIF_INSERT);
f0d9bccc
JS
9747 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9748 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9749 wqe->generic.wqe_com.abort_tag = abort_tag;
9750 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, command_type);
9751 bf_set(wqe_cmnd, &wqe->generic.wqe_com, cmnd);
9752 bf_set(wqe_class, &wqe->generic.wqe_com, iocbq->iocb.ulpClass);
9753 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
4f774513
JS
9754 return 0;
9755}
9756
9757/**
9758 * __lpfc_sli_issue_iocb_s4 - SLI4 device lockless ver of lpfc_sli_issue_iocb
9759 * @phba: Pointer to HBA context object.
9760 * @ring_number: SLI ring number to issue iocb on.
9761 * @piocb: Pointer to command iocb.
9762 * @flag: Flag indicating if this command can be put into txq.
9763 *
9764 * __lpfc_sli_issue_iocb_s4 is used by other functions in the driver to issue
9765 * an iocb command to an HBA with SLI-4 interface spec.
9766 *
9767 * This function is called with hbalock held. The function will return success
9768 * after it successfully submit the iocb to firmware or after adding to the
9769 * txq.
9770 **/
9771static int
9772__lpfc_sli_issue_iocb_s4(struct lpfc_hba *phba, uint32_t ring_number,
9773 struct lpfc_iocbq *piocb, uint32_t flag)
9774{
9775 struct lpfc_sglq *sglq;
205e8240 9776 union lpfc_wqe128 wqe;
1ba981fd 9777 struct lpfc_queue *wq;
895427bd 9778 struct lpfc_sli_ring *pring;
4f774513 9779
895427bd
JS
9780 /* Get the WQ */
9781 if ((piocb->iocb_flag & LPFC_IO_FCP) ||
9782 (piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
9783 if (!phba->cfg_fof || (!(piocb->iocb_flag & LPFC_IO_OAS)))
9784 wq = phba->sli4_hba.fcp_wq[piocb->hba_wqidx];
9785 else
9786 wq = phba->sli4_hba.oas_wq;
9787 } else {
9788 wq = phba->sli4_hba.els_wq;
9789 }
9790
9791 /* Get corresponding ring */
9792 pring = wq->pring;
1c2ba475 9793
b5c53958
JS
9794 /*
9795 * The WQE can be either 64 or 128 bytes,
b5c53958 9796 */
b5c53958 9797
895427bd
JS
9798 lockdep_assert_held(&phba->hbalock);
9799
4f774513
JS
9800 if (piocb->sli4_xritag == NO_XRI) {
9801 if (piocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
6b5151fd 9802 piocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN)
4f774513
JS
9803 sglq = NULL;
9804 else {
0e9bb8d7 9805 if (!list_empty(&pring->txq)) {
2a9bf3d0
JS
9806 if (!(flag & SLI_IOCB_RET_IOCB)) {
9807 __lpfc_sli_ringtx_put(phba,
9808 pring, piocb);
9809 return IOCB_SUCCESS;
9810 } else {
9811 return IOCB_BUSY;
9812 }
9813 } else {
895427bd 9814 sglq = __lpfc_sli_get_els_sglq(phba, piocb);
2a9bf3d0
JS
9815 if (!sglq) {
9816 if (!(flag & SLI_IOCB_RET_IOCB)) {
9817 __lpfc_sli_ringtx_put(phba,
9818 pring,
9819 piocb);
9820 return IOCB_SUCCESS;
9821 } else
9822 return IOCB_BUSY;
9823 }
9824 }
4f774513 9825 }
2ea259ee 9826 } else if (piocb->iocb_flag & LPFC_IO_FCP)
6d368e53
JS
9827 /* These IO's already have an XRI and a mapped sgl. */
9828 sglq = NULL;
2ea259ee 9829 else {
6d368e53
JS
9830 /*
9831 * This is a continuation of a commandi,(CX) so this
4f774513
JS
9832 * sglq is on the active list
9833 */
edccdc17 9834 sglq = __lpfc_get_active_sglq(phba, piocb->sli4_lxritag);
4f774513
JS
9835 if (!sglq)
9836 return IOCB_ERROR;
9837 }
9838
9839 if (sglq) {
6d368e53 9840 piocb->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0 9841 piocb->sli4_xritag = sglq->sli4_xritag;
2a9bf3d0 9842 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocb, sglq))
4f774513
JS
9843 return IOCB_ERROR;
9844 }
9845
205e8240 9846 if (lpfc_sli4_iocb2wqe(phba, piocb, &wqe))
4f774513
JS
9847 return IOCB_ERROR;
9848
205e8240 9849 if (lpfc_sli4_wq_put(wq, &wqe))
895427bd 9850 return IOCB_ERROR;
4f774513
JS
9851 lpfc_sli_ringtxcmpl_put(phba, pring, piocb);
9852
9853 return 0;
9854}
9855
9856/**
9857 * __lpfc_sli_issue_iocb - Wrapper func of lockless version for issuing iocb
9858 *
9859 * This routine wraps the actual lockless version for issusing IOCB function
9860 * pointer from the lpfc_hba struct.
9861 *
9862 * Return codes:
b5c53958
JS
9863 * IOCB_ERROR - Error
9864 * IOCB_SUCCESS - Success
9865 * IOCB_BUSY - Busy
4f774513 9866 **/
2a9bf3d0 9867int
4f774513
JS
9868__lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
9869 struct lpfc_iocbq *piocb, uint32_t flag)
9870{
9871 return phba->__lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
9872}
9873
9874/**
25985edc 9875 * lpfc_sli_api_table_setup - Set up sli api function jump table
4f774513
JS
9876 * @phba: The hba struct for which this call is being executed.
9877 * @dev_grp: The HBA PCI-Device group number.
9878 *
9879 * This routine sets up the SLI interface API function jump table in @phba
9880 * struct.
9881 * Returns: 0 - success, -ENODEV - failure.
9882 **/
9883int
9884lpfc_sli_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
9885{
9886
9887 switch (dev_grp) {
9888 case LPFC_PCI_DEV_LP:
9889 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s3;
9890 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s3;
9891 break;
9892 case LPFC_PCI_DEV_OC:
9893 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s4;
9894 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s4;
9895 break;
9896 default:
9897 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9898 "1419 Invalid HBA PCI-device group: 0x%x\n",
9899 dev_grp);
9900 return -ENODEV;
9901 break;
9902 }
9903 phba->lpfc_get_iocb_from_iocbq = lpfc_get_iocb_from_iocbq;
9904 return 0;
9905}
9906
a1efe163 9907/**
895427bd 9908 * lpfc_sli4_calc_ring - Calculates which ring to use
a1efe163 9909 * @phba: Pointer to HBA context object.
a1efe163
JS
9910 * @piocb: Pointer to command iocb.
9911 *
895427bd
JS
9912 * For SLI4 only, FCP IO can deferred to one fo many WQs, based on
9913 * hba_wqidx, thus we need to calculate the corresponding ring.
a1efe163 9914 * Since ABORTS must go on the same WQ of the command they are
895427bd 9915 * aborting, we use command's hba_wqidx.
a1efe163 9916 */
895427bd
JS
9917struct lpfc_sli_ring *
9918lpfc_sli4_calc_ring(struct lpfc_hba *phba, struct lpfc_iocbq *piocb)
9bd2bff5 9919{
895427bd 9920 if (piocb->iocb_flag & (LPFC_IO_FCP | LPFC_USE_FCPWQIDX)) {
8b0dff14 9921 if (!(phba->cfg_fof) ||
895427bd 9922 (!(piocb->iocb_flag & LPFC_IO_FOF))) {
8b0dff14 9923 if (unlikely(!phba->sli4_hba.fcp_wq))
895427bd 9924 return NULL;
8b0dff14 9925 /*
895427bd 9926 * for abort iocb hba_wqidx should already
8b0dff14
JS
9927 * be setup based on what work queue we used.
9928 */
8e036a94 9929 if (!(piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
895427bd 9930 piocb->hba_wqidx =
8b0dff14
JS
9931 lpfc_sli4_scmd_to_wqidx_distr(phba,
9932 piocb->context1);
8e036a94
DK
9933 piocb->hba_wqidx = piocb->hba_wqidx %
9934 phba->cfg_fcp_io_channel;
9935 }
895427bd 9936 return phba->sli4_hba.fcp_wq[piocb->hba_wqidx]->pring;
8b0dff14
JS
9937 } else {
9938 if (unlikely(!phba->sli4_hba.oas_wq))
895427bd
JS
9939 return NULL;
9940 piocb->hba_wqidx = 0;
9941 return phba->sli4_hba.oas_wq->pring;
9bd2bff5 9942 }
895427bd
JS
9943 } else {
9944 if (unlikely(!phba->sli4_hba.els_wq))
9945 return NULL;
9946 piocb->hba_wqidx = 0;
9947 return phba->sli4_hba.els_wq->pring;
9bd2bff5 9948 }
9bd2bff5
JS
9949}
9950
4f774513
JS
9951/**
9952 * lpfc_sli_issue_iocb - Wrapper function for __lpfc_sli_issue_iocb
9953 * @phba: Pointer to HBA context object.
9954 * @pring: Pointer to driver SLI ring object.
9955 * @piocb: Pointer to command iocb.
9956 * @flag: Flag indicating if this command can be put into txq.
9957 *
9958 * lpfc_sli_issue_iocb is a wrapper around __lpfc_sli_issue_iocb
9959 * function. This function gets the hbalock and calls
9960 * __lpfc_sli_issue_iocb function and will return the error returned
9961 * by __lpfc_sli_issue_iocb function. This wrapper is used by
9962 * functions which do not hold hbalock.
9963 **/
9964int
9965lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
9966 struct lpfc_iocbq *piocb, uint32_t flag)
9967{
895427bd 9968 struct lpfc_hba_eq_hdl *hba_eq_hdl;
2a76a283 9969 struct lpfc_sli_ring *pring;
ba20c853
JS
9970 struct lpfc_queue *fpeq;
9971 struct lpfc_eqe *eqe;
4f774513 9972 unsigned long iflags;
2a76a283 9973 int rc, idx;
4f774513 9974
7e56aa25 9975 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
9976 pring = lpfc_sli4_calc_ring(phba, piocb);
9977 if (unlikely(pring == NULL))
9bd2bff5 9978 return IOCB_ERROR;
ba20c853 9979
9bd2bff5
JS
9980 spin_lock_irqsave(&pring->ring_lock, iflags);
9981 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
9982 spin_unlock_irqrestore(&pring->ring_lock, iflags);
ba20c853 9983
9bd2bff5 9984 if (lpfc_fcp_look_ahead && (piocb->iocb_flag & LPFC_IO_FCP)) {
895427bd
JS
9985 idx = piocb->hba_wqidx;
9986 hba_eq_hdl = &phba->sli4_hba.hba_eq_hdl[idx];
4f774513 9987
895427bd 9988 if (atomic_dec_and_test(&hba_eq_hdl->hba_eq_in_use)) {
ba20c853 9989
9bd2bff5
JS
9990 /* Get associated EQ with this index */
9991 fpeq = phba->sli4_hba.hba_eq[idx];
ba20c853 9992
9bd2bff5 9993 /* Turn off interrupts from this EQ */
b71413dd 9994 phba->sli4_hba.sli4_eq_clr_intr(fpeq);
ba20c853 9995
9bd2bff5
JS
9996 /*
9997 * Process all the events on FCP EQ
9998 */
9999 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
10000 lpfc_sli4_hba_handle_eqe(phba,
10001 eqe, idx);
10002 fpeq->EQ_processed++;
ba20c853 10003 }
ba20c853 10004
9bd2bff5 10005 /* Always clear and re-arm the EQ */
b71413dd 10006 phba->sli4_hba.sli4_eq_release(fpeq,
9bd2bff5
JS
10007 LPFC_QUEUE_REARM);
10008 }
895427bd 10009 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
2a76a283 10010 }
7e56aa25
JS
10011 } else {
10012 /* For now, SLI2/3 will still use hbalock */
10013 spin_lock_irqsave(&phba->hbalock, iflags);
10014 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10015 spin_unlock_irqrestore(&phba->hbalock, iflags);
10016 }
4f774513
JS
10017 return rc;
10018}
10019
10020/**
10021 * lpfc_extra_ring_setup - Extra ring setup function
10022 * @phba: Pointer to HBA context object.
10023 *
10024 * This function is called while driver attaches with the
10025 * HBA to setup the extra ring. The extra ring is used
10026 * only when driver needs to support target mode functionality
10027 * or IP over FC functionalities.
10028 *
895427bd 10029 * This function is called with no lock held. SLI3 only.
4f774513
JS
10030 **/
10031static int
10032lpfc_extra_ring_setup( struct lpfc_hba *phba)
10033{
10034 struct lpfc_sli *psli;
10035 struct lpfc_sli_ring *pring;
10036
10037 psli = &phba->sli;
10038
10039 /* Adjust cmd/rsp ring iocb entries more evenly */
10040
10041 /* Take some away from the FCP ring */
895427bd 10042 pring = &psli->sli3_ring[LPFC_FCP_RING];
7e56aa25
JS
10043 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10044 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10045 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10046 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e 10047
a4bc3379 10048 /* and give them to the extra ring */
895427bd 10049 pring = &psli->sli3_ring[LPFC_EXTRA_RING];
a4bc3379 10050
7e56aa25
JS
10051 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10052 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10053 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10054 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e
JW
10055
10056 /* Setup default profile for this ring */
10057 pring->iotag_max = 4096;
10058 pring->num_mask = 1;
10059 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS
10060 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
10061 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW
10062 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
10063 return 0;
10064}
10065
cb69f7de
JS
10066/* lpfc_sli_abts_err_handler - handle a failed ABTS request from an SLI3 port.
10067 * @phba: Pointer to HBA context object.
10068 * @iocbq: Pointer to iocb object.
10069 *
10070 * The async_event handler calls this routine when it receives
10071 * an ASYNC_STATUS_CN event from the port. The port generates
10072 * this event when an Abort Sequence request to an rport fails
10073 * twice in succession. The abort could be originated by the
10074 * driver or by the port. The ABTS could have been for an ELS
10075 * or FCP IO. The port only generates this event when an ABTS
10076 * fails to complete after one retry.
10077 */
10078static void
10079lpfc_sli_abts_err_handler(struct lpfc_hba *phba,
10080 struct lpfc_iocbq *iocbq)
10081{
10082 struct lpfc_nodelist *ndlp = NULL;
10083 uint16_t rpi = 0, vpi = 0;
10084 struct lpfc_vport *vport = NULL;
10085
10086 /* The rpi in the ulpContext is vport-sensitive. */
10087 vpi = iocbq->iocb.un.asyncstat.sub_ctxt_tag;
10088 rpi = iocbq->iocb.ulpContext;
10089
10090 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10091 "3092 Port generated ABTS async event "
10092 "on vpi %d rpi %d status 0x%x\n",
10093 vpi, rpi, iocbq->iocb.ulpStatus);
10094
10095 vport = lpfc_find_vport_by_vpid(phba, vpi);
10096 if (!vport)
10097 goto err_exit;
10098 ndlp = lpfc_findnode_rpi(vport, rpi);
10099 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp))
10100 goto err_exit;
10101
10102 if (iocbq->iocb.ulpStatus == IOSTAT_LOCAL_REJECT)
10103 lpfc_sli_abts_recover_port(vport, ndlp);
10104 return;
10105
10106 err_exit:
10107 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10108 "3095 Event Context not found, no "
10109 "action on vpi %d rpi %d status 0x%x, reason 0x%x\n",
10110 iocbq->iocb.ulpContext, iocbq->iocb.ulpStatus,
10111 vpi, rpi);
10112}
10113
10114/* lpfc_sli4_abts_err_handler - handle a failed ABTS request from an SLI4 port.
10115 * @phba: pointer to HBA context object.
10116 * @ndlp: nodelist pointer for the impacted rport.
10117 * @axri: pointer to the wcqe containing the failed exchange.
10118 *
10119 * The driver calls this routine when it receives an ABORT_XRI_FCP CQE from the
10120 * port. The port generates this event when an abort exchange request to an
10121 * rport fails twice in succession with no reply. The abort could be originated
10122 * by the driver or by the port. The ABTS could have been for an ELS or FCP IO.
10123 */
10124void
10125lpfc_sli4_abts_err_handler(struct lpfc_hba *phba,
10126 struct lpfc_nodelist *ndlp,
10127 struct sli4_wcqe_xri_aborted *axri)
10128{
10129 struct lpfc_vport *vport;
5c1db2ac 10130 uint32_t ext_status = 0;
cb69f7de 10131
6b5151fd 10132 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) {
cb69f7de
JS
10133 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10134 "3115 Node Context not found, driver "
10135 "ignoring abts err event\n");
6b5151fd
JS
10136 return;
10137 }
10138
cb69f7de
JS
10139 vport = ndlp->vport;
10140 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10141 "3116 Port generated FCP XRI ABORT event on "
5c1db2ac 10142 "vpi %d rpi %d xri x%x status 0x%x parameter x%x\n",
8e668af5 10143 ndlp->vport->vpi, phba->sli4_hba.rpi_ids[ndlp->nlp_rpi],
cb69f7de 10144 bf_get(lpfc_wcqe_xa_xri, axri),
5c1db2ac
JS
10145 bf_get(lpfc_wcqe_xa_status, axri),
10146 axri->parameter);
cb69f7de 10147
5c1db2ac
JS
10148 /*
10149 * Catch the ABTS protocol failure case. Older OCe FW releases returned
10150 * LOCAL_REJECT and 0 for a failed ABTS exchange and later OCe and
10151 * LPe FW releases returned LOCAL_REJECT and SEQUENCE_TIMEOUT.
10152 */
e3d2b802 10153 ext_status = axri->parameter & IOERR_PARAM_MASK;
5c1db2ac
JS
10154 if ((bf_get(lpfc_wcqe_xa_status, axri) == IOSTAT_LOCAL_REJECT) &&
10155 ((ext_status == IOERR_SEQUENCE_TIMEOUT) || (ext_status == 0)))
cb69f7de
JS
10156 lpfc_sli_abts_recover_port(vport, ndlp);
10157}
10158
e59058c4 10159/**
3621a710 10160 * lpfc_sli_async_event_handler - ASYNC iocb handler function
e59058c4
JS
10161 * @phba: Pointer to HBA context object.
10162 * @pring: Pointer to driver SLI ring object.
10163 * @iocbq: Pointer to iocb object.
10164 *
10165 * This function is called by the slow ring event handler
10166 * function when there is an ASYNC event iocb in the ring.
10167 * This function is called with no lock held.
10168 * Currently this function handles only temperature related
10169 * ASYNC events. The function decodes the temperature sensor
10170 * event message and posts events for the management applications.
10171 **/
98c9ea5c 10172static void
57127f15
JS
10173lpfc_sli_async_event_handler(struct lpfc_hba * phba,
10174 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
10175{
10176 IOCB_t *icmd;
10177 uint16_t evt_code;
57127f15
JS
10178 struct temp_event temp_event_data;
10179 struct Scsi_Host *shost;
a257bf90 10180 uint32_t *iocb_w;
57127f15
JS
10181
10182 icmd = &iocbq->iocb;
10183 evt_code = icmd->un.asyncstat.evt_code;
57127f15 10184
cb69f7de
JS
10185 switch (evt_code) {
10186 case ASYNC_TEMP_WARN:
10187 case ASYNC_TEMP_SAFE:
10188 temp_event_data.data = (uint32_t) icmd->ulpContext;
10189 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
10190 if (evt_code == ASYNC_TEMP_WARN) {
10191 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
10192 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10193 "0347 Adapter is very hot, please take "
10194 "corrective action. temperature : %d Celsius\n",
10195 (uint32_t) icmd->ulpContext);
10196 } else {
10197 temp_event_data.event_code = LPFC_NORMAL_TEMP;
10198 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10199 "0340 Adapter temperature is OK now. "
10200 "temperature : %d Celsius\n",
10201 (uint32_t) icmd->ulpContext);
10202 }
10203
10204 /* Send temperature change event to applications */
10205 shost = lpfc_shost_from_vport(phba->pport);
10206 fc_host_post_vendor_event(shost, fc_get_event_number(),
10207 sizeof(temp_event_data), (char *) &temp_event_data,
10208 LPFC_NL_VENDOR_ID);
10209 break;
10210 case ASYNC_STATUS_CN:
10211 lpfc_sli_abts_err_handler(phba, iocbq);
10212 break;
10213 default:
a257bf90 10214 iocb_w = (uint32_t *) icmd;
cb69f7de 10215 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
76bb24ef 10216 "0346 Ring %d handler: unexpected ASYNC_STATUS"
e4e74273 10217 " evt_code 0x%x\n"
a257bf90
JS
10218 "W0 0x%08x W1 0x%08x W2 0x%08x W3 0x%08x\n"
10219 "W4 0x%08x W5 0x%08x W6 0x%08x W7 0x%08x\n"
10220 "W8 0x%08x W9 0x%08x W10 0x%08x W11 0x%08x\n"
10221 "W12 0x%08x W13 0x%08x W14 0x%08x W15 0x%08x\n",
cb69f7de 10222 pring->ringno, icmd->un.asyncstat.evt_code,
a257bf90
JS
10223 iocb_w[0], iocb_w[1], iocb_w[2], iocb_w[3],
10224 iocb_w[4], iocb_w[5], iocb_w[6], iocb_w[7],
10225 iocb_w[8], iocb_w[9], iocb_w[10], iocb_w[11],
10226 iocb_w[12], iocb_w[13], iocb_w[14], iocb_w[15]);
10227
cb69f7de 10228 break;
57127f15 10229 }
57127f15
JS
10230}
10231
10232
e59058c4 10233/**
895427bd 10234 * lpfc_sli4_setup - SLI ring setup function
e59058c4
JS
10235 * @phba: Pointer to HBA context object.
10236 *
10237 * lpfc_sli_setup sets up rings of the SLI interface with
10238 * number of iocbs per ring and iotags. This function is
10239 * called while driver attach to the HBA and before the
10240 * interrupts are enabled. So there is no need for locking.
10241 *
10242 * This function always returns 0.
10243 **/
dea3101e 10244int
895427bd
JS
10245lpfc_sli4_setup(struct lpfc_hba *phba)
10246{
10247 struct lpfc_sli_ring *pring;
10248
10249 pring = phba->sli4_hba.els_wq->pring;
10250 pring->num_mask = LPFC_MAX_RING_MASK;
10251 pring->prt[0].profile = 0; /* Mask 0 */
10252 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10253 pring->prt[0].type = FC_TYPE_ELS;
10254 pring->prt[0].lpfc_sli_rcv_unsol_event =
10255 lpfc_els_unsol_event;
10256 pring->prt[1].profile = 0; /* Mask 1 */
10257 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10258 pring->prt[1].type = FC_TYPE_ELS;
10259 pring->prt[1].lpfc_sli_rcv_unsol_event =
10260 lpfc_els_unsol_event;
10261 pring->prt[2].profile = 0; /* Mask 2 */
10262 /* NameServer Inquiry */
10263 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
10264 /* NameServer */
10265 pring->prt[2].type = FC_TYPE_CT;
10266 pring->prt[2].lpfc_sli_rcv_unsol_event =
10267 lpfc_ct_unsol_event;
10268 pring->prt[3].profile = 0; /* Mask 3 */
10269 /* NameServer response */
10270 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
10271 /* NameServer */
10272 pring->prt[3].type = FC_TYPE_CT;
10273 pring->prt[3].lpfc_sli_rcv_unsol_event =
10274 lpfc_ct_unsol_event;
10275 return 0;
10276}
10277
10278/**
10279 * lpfc_sli_setup - SLI ring setup function
10280 * @phba: Pointer to HBA context object.
10281 *
10282 * lpfc_sli_setup sets up rings of the SLI interface with
10283 * number of iocbs per ring and iotags. This function is
10284 * called while driver attach to the HBA and before the
10285 * interrupts are enabled. So there is no need for locking.
10286 *
10287 * This function always returns 0. SLI3 only.
10288 **/
10289int
dea3101e
JB
10290lpfc_sli_setup(struct lpfc_hba *phba)
10291{
ed957684 10292 int i, totiocbsize = 0;
dea3101e
JB
10293 struct lpfc_sli *psli = &phba->sli;
10294 struct lpfc_sli_ring *pring;
10295
2a76a283 10296 psli->num_rings = MAX_SLI3_CONFIGURED_RINGS;
dea3101e 10297 psli->sli_flag = 0;
dea3101e 10298
604a3e30
JB
10299 psli->iocbq_lookup = NULL;
10300 psli->iocbq_lookup_len = 0;
10301 psli->last_iotag = 0;
10302
dea3101e 10303 for (i = 0; i < psli->num_rings; i++) {
895427bd 10304 pring = &psli->sli3_ring[i];
dea3101e
JB
10305 switch (i) {
10306 case LPFC_FCP_RING: /* ring 0 - FCP */
10307 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10308 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
10309 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
10310 pring->sli.sli3.numCiocb +=
10311 SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10312 pring->sli.sli3.numRiocb +=
10313 SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10314 pring->sli.sli3.numCiocb +=
10315 SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10316 pring->sli.sli3.numRiocb +=
10317 SLI2_IOCB_RSP_R3XTRA_ENTRIES;
10318 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10319 SLI3_IOCB_CMD_SIZE :
10320 SLI2_IOCB_CMD_SIZE;
7e56aa25 10321 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10322 SLI3_IOCB_RSP_SIZE :
10323 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10324 pring->iotag_ctr = 0;
10325 pring->iotag_max =
92d7f7b0 10326 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB
10327 pring->fast_iotag = pring->iotag_max;
10328 pring->num_mask = 0;
10329 break;
a4bc3379 10330 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e 10331 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10332 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
10333 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
10334 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10335 SLI3_IOCB_CMD_SIZE :
10336 SLI2_IOCB_CMD_SIZE;
7e56aa25 10337 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10338 SLI3_IOCB_RSP_SIZE :
10339 SLI2_IOCB_RSP_SIZE;
2e0fef85 10340 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB
10341 pring->num_mask = 0;
10342 break;
10343 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
10344 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10345 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
10346 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
10347 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10348 SLI3_IOCB_CMD_SIZE :
10349 SLI2_IOCB_CMD_SIZE;
7e56aa25 10350 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10351 SLI3_IOCB_RSP_SIZE :
10352 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10353 pring->fast_iotag = 0;
10354 pring->iotag_ctr = 0;
10355 pring->iotag_max = 4096;
57127f15
JS
10356 pring->lpfc_sli_rcv_async_status =
10357 lpfc_sli_async_event_handler;
6669f9bb 10358 pring->num_mask = LPFC_MAX_RING_MASK;
dea3101e 10359 pring->prt[0].profile = 0; /* Mask 0 */
6a9c52cf
JS
10360 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10361 pring->prt[0].type = FC_TYPE_ELS;
dea3101e 10362 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 10363 lpfc_els_unsol_event;
dea3101e 10364 pring->prt[1].profile = 0; /* Mask 1 */
6a9c52cf
JS
10365 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10366 pring->prt[1].type = FC_TYPE_ELS;
dea3101e 10367 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 10368 lpfc_els_unsol_event;
dea3101e
JB
10369 pring->prt[2].profile = 0; /* Mask 2 */
10370 /* NameServer Inquiry */
6a9c52cf 10371 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
dea3101e 10372 /* NameServer */
6a9c52cf 10373 pring->prt[2].type = FC_TYPE_CT;
dea3101e 10374 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 10375 lpfc_ct_unsol_event;
dea3101e
JB
10376 pring->prt[3].profile = 0; /* Mask 3 */
10377 /* NameServer response */
6a9c52cf 10378 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
dea3101e 10379 /* NameServer */
6a9c52cf 10380 pring->prt[3].type = FC_TYPE_CT;
dea3101e 10381 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 10382 lpfc_ct_unsol_event;
dea3101e
JB
10383 break;
10384 }
7e56aa25
JS
10385 totiocbsize += (pring->sli.sli3.numCiocb *
10386 pring->sli.sli3.sizeCiocb) +
10387 (pring->sli.sli3.numRiocb * pring->sli.sli3.sizeRiocb);
dea3101e 10388 }
ed957684 10389 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 10390 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS
10391 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
10392 "SLI2 SLIM Data: x%x x%lx\n",
10393 phba->brd_no, totiocbsize,
10394 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 10395 }
cf5bf97e
JW
10396 if (phba->cfg_multi_ring_support == 2)
10397 lpfc_extra_ring_setup(phba);
dea3101e
JB
10398
10399 return 0;
10400}
10401
e59058c4 10402/**
895427bd 10403 * lpfc_sli4_queue_init - Queue initialization function
e59058c4
JS
10404 * @phba: Pointer to HBA context object.
10405 *
895427bd 10406 * lpfc_sli4_queue_init sets up mailbox queues and iocb queues for each
e59058c4
JS
10407 * ring. This function also initializes ring indices of each ring.
10408 * This function is called during the initialization of the SLI
10409 * interface of an HBA.
10410 * This function is called with no lock held and always returns
10411 * 1.
10412 **/
895427bd
JS
10413void
10414lpfc_sli4_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10415{
10416 struct lpfc_sli *psli;
10417 struct lpfc_sli_ring *pring;
604a3e30 10418 int i;
dea3101e
JB
10419
10420 psli = &phba->sli;
2e0fef85 10421 spin_lock_irq(&phba->hbalock);
dea3101e 10422 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10423 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e 10424 /* Initialize list headers for txq and txcmplq as double linked lists */
895427bd
JS
10425 for (i = 0; i < phba->cfg_fcp_io_channel; i++) {
10426 pring = phba->sli4_hba.fcp_wq[i]->pring;
68e814f5 10427 pring->flag = 0;
895427bd 10428 pring->ringno = LPFC_FCP_RING;
dea3101e
JB
10429 INIT_LIST_HEAD(&pring->txq);
10430 INIT_LIST_HEAD(&pring->txcmplq);
10431 INIT_LIST_HEAD(&pring->iocb_continueq);
7e56aa25 10432 spin_lock_init(&pring->ring_lock);
dea3101e 10433 }
895427bd
JS
10434 for (i = 0; i < phba->cfg_nvme_io_channel; i++) {
10435 pring = phba->sli4_hba.nvme_wq[i]->pring;
10436 pring->flag = 0;
10437 pring->ringno = LPFC_FCP_RING;
10438 INIT_LIST_HEAD(&pring->txq);
10439 INIT_LIST_HEAD(&pring->txcmplq);
10440 INIT_LIST_HEAD(&pring->iocb_continueq);
10441 spin_lock_init(&pring->ring_lock);
10442 }
10443 pring = phba->sli4_hba.els_wq->pring;
10444 pring->flag = 0;
10445 pring->ringno = LPFC_ELS_RING;
10446 INIT_LIST_HEAD(&pring->txq);
10447 INIT_LIST_HEAD(&pring->txcmplq);
10448 INIT_LIST_HEAD(&pring->iocb_continueq);
10449 spin_lock_init(&pring->ring_lock);
dea3101e 10450
895427bd
JS
10451 if (phba->cfg_nvme_io_channel) {
10452 pring = phba->sli4_hba.nvmels_wq->pring;
10453 pring->flag = 0;
10454 pring->ringno = LPFC_ELS_RING;
10455 INIT_LIST_HEAD(&pring->txq);
10456 INIT_LIST_HEAD(&pring->txcmplq);
10457 INIT_LIST_HEAD(&pring->iocb_continueq);
10458 spin_lock_init(&pring->ring_lock);
10459 }
10460
10461 if (phba->cfg_fof) {
10462 pring = phba->sli4_hba.oas_wq->pring;
10463 pring->flag = 0;
10464 pring->ringno = LPFC_FCP_RING;
10465 INIT_LIST_HEAD(&pring->txq);
10466 INIT_LIST_HEAD(&pring->txcmplq);
10467 INIT_LIST_HEAD(&pring->iocb_continueq);
10468 spin_lock_init(&pring->ring_lock);
10469 }
10470
10471 spin_unlock_irq(&phba->hbalock);
10472}
10473
10474/**
10475 * lpfc_sli_queue_init - Queue initialization function
10476 * @phba: Pointer to HBA context object.
10477 *
10478 * lpfc_sli_queue_init sets up mailbox queues and iocb queues for each
10479 * ring. This function also initializes ring indices of each ring.
10480 * This function is called during the initialization of the SLI
10481 * interface of an HBA.
10482 * This function is called with no lock held and always returns
10483 * 1.
10484 **/
10485void
10486lpfc_sli_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10487{
10488 struct lpfc_sli *psli;
10489 struct lpfc_sli_ring *pring;
604a3e30 10490 int i;
dea3101e
JB
10491
10492 psli = &phba->sli;
2e0fef85 10493 spin_lock_irq(&phba->hbalock);
dea3101e 10494 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10495 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB
10496 /* Initialize list headers for txq and txcmplq as double linked lists */
10497 for (i = 0; i < psli->num_rings; i++) {
895427bd 10498 pring = &psli->sli3_ring[i];
dea3101e 10499 pring->ringno = i;
7e56aa25
JS
10500 pring->sli.sli3.next_cmdidx = 0;
10501 pring->sli.sli3.local_getidx = 0;
10502 pring->sli.sli3.cmdidx = 0;
dea3101e 10503 INIT_LIST_HEAD(&pring->iocb_continueq);
9c2face6 10504 INIT_LIST_HEAD(&pring->iocb_continue_saveq);
dea3101e 10505 INIT_LIST_HEAD(&pring->postbufq);
895427bd
JS
10506 pring->flag = 0;
10507 INIT_LIST_HEAD(&pring->txq);
10508 INIT_LIST_HEAD(&pring->txcmplq);
7e56aa25 10509 spin_lock_init(&pring->ring_lock);
dea3101e 10510 }
2e0fef85 10511 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10512}
10513
04c68496
JS
10514/**
10515 * lpfc_sli_mbox_sys_flush - Flush mailbox command sub-system
10516 * @phba: Pointer to HBA context object.
10517 *
10518 * This routine flushes the mailbox command subsystem. It will unconditionally
10519 * flush all the mailbox commands in the three possible stages in the mailbox
10520 * command sub-system: pending mailbox command queue; the outstanding mailbox
10521 * command; and completed mailbox command queue. It is caller's responsibility
10522 * to make sure that the driver is in the proper state to flush the mailbox
10523 * command sub-system. Namely, the posting of mailbox commands into the
10524 * pending mailbox command queue from the various clients must be stopped;
10525 * either the HBA is in a state that it will never works on the outstanding
10526 * mailbox command (such as in EEH or ERATT conditions) or the outstanding
10527 * mailbox command has been completed.
10528 **/
10529static void
10530lpfc_sli_mbox_sys_flush(struct lpfc_hba *phba)
10531{
10532 LIST_HEAD(completions);
10533 struct lpfc_sli *psli = &phba->sli;
10534 LPFC_MBOXQ_t *pmb;
10535 unsigned long iflag;
10536
523128e5
JS
10537 /* Disable softirqs, including timers from obtaining phba->hbalock */
10538 local_bh_disable();
10539
04c68496
JS
10540 /* Flush all the mailbox commands in the mbox system */
10541 spin_lock_irqsave(&phba->hbalock, iflag);
523128e5 10542
04c68496
JS
10543 /* The pending mailbox command queue */
10544 list_splice_init(&phba->sli.mboxq, &completions);
10545 /* The outstanding active mailbox command */
10546 if (psli->mbox_active) {
10547 list_add_tail(&psli->mbox_active->list, &completions);
10548 psli->mbox_active = NULL;
10549 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10550 }
10551 /* The completed mailbox command queue */
10552 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
10553 spin_unlock_irqrestore(&phba->hbalock, iflag);
10554
523128e5
JS
10555 /* Enable softirqs again, done with phba->hbalock */
10556 local_bh_enable();
10557
04c68496
JS
10558 /* Return all flushed mailbox commands with MBX_NOT_FINISHED status */
10559 while (!list_empty(&completions)) {
10560 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
10561 pmb->u.mb.mbxStatus = MBX_NOT_FINISHED;
10562 if (pmb->mbox_cmpl)
10563 pmb->mbox_cmpl(phba, pmb);
10564 }
10565}
10566
e59058c4 10567/**
3621a710 10568 * lpfc_sli_host_down - Vport cleanup function
e59058c4
JS
10569 * @vport: Pointer to virtual port object.
10570 *
10571 * lpfc_sli_host_down is called to clean up the resources
10572 * associated with a vport before destroying virtual
10573 * port data structures.
10574 * This function does following operations:
10575 * - Free discovery resources associated with this virtual
10576 * port.
10577 * - Free iocbs associated with this virtual port in
10578 * the txq.
10579 * - Send abort for all iocb commands associated with this
10580 * vport in txcmplq.
10581 *
10582 * This function is called with no lock held and always returns 1.
10583 **/
92d7f7b0
JS
10584int
10585lpfc_sli_host_down(struct lpfc_vport *vport)
10586{
858c9f6c 10587 LIST_HEAD(completions);
92d7f7b0
JS
10588 struct lpfc_hba *phba = vport->phba;
10589 struct lpfc_sli *psli = &phba->sli;
895427bd 10590 struct lpfc_queue *qp = NULL;
92d7f7b0
JS
10591 struct lpfc_sli_ring *pring;
10592 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS
10593 int i;
10594 unsigned long flags = 0;
10595 uint16_t prev_pring_flag;
10596
10597 lpfc_cleanup_discovery_resources(vport);
10598
10599 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0 10600
895427bd
JS
10601 /*
10602 * Error everything on the txq since these iocbs
10603 * have not been given to the FW yet.
10604 * Also issue ABTS for everything on the txcmplq
10605 */
10606 if (phba->sli_rev != LPFC_SLI_REV4) {
10607 for (i = 0; i < psli->num_rings; i++) {
10608 pring = &psli->sli3_ring[i];
10609 prev_pring_flag = pring->flag;
10610 /* Only slow rings */
10611 if (pring->ringno == LPFC_ELS_RING) {
10612 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10613 /* Set the lpfc data pending flag */
10614 set_bit(LPFC_DATA_READY, &phba->data_flags);
10615 }
10616 list_for_each_entry_safe(iocb, next_iocb,
10617 &pring->txq, list) {
10618 if (iocb->vport != vport)
10619 continue;
10620 list_move_tail(&iocb->list, &completions);
10621 }
10622 list_for_each_entry_safe(iocb, next_iocb,
10623 &pring->txcmplq, list) {
10624 if (iocb->vport != vport)
10625 continue;
10626 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10627 }
10628 pring->flag = prev_pring_flag;
10629 }
10630 } else {
10631 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10632 pring = qp->pring;
10633 if (!pring)
92d7f7b0 10634 continue;
895427bd
JS
10635 if (pring == phba->sli4_hba.els_wq->pring) {
10636 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10637 /* Set the lpfc data pending flag */
10638 set_bit(LPFC_DATA_READY, &phba->data_flags);
10639 }
10640 prev_pring_flag = pring->flag;
10641 spin_lock_irq(&pring->ring_lock);
10642 list_for_each_entry_safe(iocb, next_iocb,
10643 &pring->txq, list) {
10644 if (iocb->vport != vport)
10645 continue;
10646 list_move_tail(&iocb->list, &completions);
10647 }
10648 spin_unlock_irq(&pring->ring_lock);
10649 list_for_each_entry_safe(iocb, next_iocb,
10650 &pring->txcmplq, list) {
10651 if (iocb->vport != vport)
10652 continue;
10653 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10654 }
10655 pring->flag = prev_pring_flag;
92d7f7b0 10656 }
92d7f7b0 10657 }
92d7f7b0
JS
10658 spin_unlock_irqrestore(&phba->hbalock, flags);
10659
a257bf90
JS
10660 /* Cancel all the IOCBs from the completions list */
10661 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10662 IOERR_SLI_DOWN);
92d7f7b0
JS
10663 return 1;
10664}
10665
e59058c4 10666/**
3621a710 10667 * lpfc_sli_hba_down - Resource cleanup function for the HBA
e59058c4
JS
10668 * @phba: Pointer to HBA context object.
10669 *
10670 * This function cleans up all iocb, buffers, mailbox commands
10671 * while shutting down the HBA. This function is called with no
10672 * lock held and always returns 1.
10673 * This function does the following to cleanup driver resources:
10674 * - Free discovery resources for each virtual port
10675 * - Cleanup any pending fabric iocbs
10676 * - Iterate through the iocb txq and free each entry
10677 * in the list.
10678 * - Free up any buffer posted to the HBA
10679 * - Free mailbox commands in the mailbox queue.
10680 **/
dea3101e 10681int
2e0fef85 10682lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 10683{
2534ba75 10684 LIST_HEAD(completions);
2e0fef85 10685 struct lpfc_sli *psli = &phba->sli;
895427bd 10686 struct lpfc_queue *qp = NULL;
dea3101e 10687 struct lpfc_sli_ring *pring;
0ff10d46 10688 struct lpfc_dmabuf *buf_ptr;
dea3101e 10689 unsigned long flags = 0;
04c68496
JS
10690 int i;
10691
10692 /* Shutdown the mailbox command sub-system */
618a5230 10693 lpfc_sli_mbox_sys_shutdown(phba, LPFC_MBX_WAIT);
dea3101e 10694
dea3101e
JB
10695 lpfc_hba_down_prep(phba);
10696
523128e5
JS
10697 /* Disable softirqs, including timers from obtaining phba->hbalock */
10698 local_bh_disable();
10699
92d7f7b0
JS
10700 lpfc_fabric_abort_hba(phba);
10701
2e0fef85 10702 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e 10703
895427bd
JS
10704 /*
10705 * Error everything on the txq since these iocbs
10706 * have not been given to the FW yet.
10707 */
10708 if (phba->sli_rev != LPFC_SLI_REV4) {
10709 for (i = 0; i < psli->num_rings; i++) {
10710 pring = &psli->sli3_ring[i];
10711 /* Only slow rings */
10712 if (pring->ringno == LPFC_ELS_RING) {
10713 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10714 /* Set the lpfc data pending flag */
10715 set_bit(LPFC_DATA_READY, &phba->data_flags);
10716 }
10717 list_splice_init(&pring->txq, &completions);
10718 }
10719 } else {
10720 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10721 pring = qp->pring;
10722 if (!pring)
10723 continue;
10724 spin_lock_irq(&pring->ring_lock);
10725 list_splice_init(&pring->txq, &completions);
10726 spin_unlock_irq(&pring->ring_lock);
10727 if (pring == phba->sli4_hba.els_wq->pring) {
10728 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10729 /* Set the lpfc data pending flag */
10730 set_bit(LPFC_DATA_READY, &phba->data_flags);
10731 }
10732 }
2534ba75 10733 }
2e0fef85 10734 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 10735
a257bf90
JS
10736 /* Cancel all the IOCBs from the completions list */
10737 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10738 IOERR_SLI_DOWN);
dea3101e 10739
0ff10d46
JS
10740 spin_lock_irqsave(&phba->hbalock, flags);
10741 list_splice_init(&phba->elsbuf, &completions);
10742 phba->elsbuf_cnt = 0;
10743 phba->elsbuf_prev_cnt = 0;
10744 spin_unlock_irqrestore(&phba->hbalock, flags);
10745
10746 while (!list_empty(&completions)) {
10747 list_remove_head(&completions, buf_ptr,
10748 struct lpfc_dmabuf, list);
10749 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
10750 kfree(buf_ptr);
10751 }
10752
523128e5
JS
10753 /* Enable softirqs again, done with phba->hbalock */
10754 local_bh_enable();
10755
dea3101e
JB
10756 /* Return any active mbox cmds */
10757 del_timer_sync(&psli->mbox_tmo);
2e0fef85 10758
da0436e9 10759 spin_lock_irqsave(&phba->pport->work_port_lock, flags);
2e0fef85 10760 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
da0436e9 10761 spin_unlock_irqrestore(&phba->pport->work_port_lock, flags);
2e0fef85 10762
da0436e9
JS
10763 return 1;
10764}
10765
e59058c4 10766/**
3621a710 10767 * lpfc_sli_pcimem_bcopy - SLI memory copy function
e59058c4
JS
10768 * @srcp: Source memory pointer.
10769 * @destp: Destination memory pointer.
10770 * @cnt: Number of words required to be copied.
10771 *
10772 * This function is used for copying data between driver memory
10773 * and the SLI memory. This function also changes the endianness
10774 * of each word if native endianness is different from SLI
10775 * endianness. This function can be called with or without
10776 * lock.
10777 **/
dea3101e
JB
10778void
10779lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
10780{
10781 uint32_t *src = srcp;
10782 uint32_t *dest = destp;
10783 uint32_t ldata;
10784 int i;
10785
10786 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
10787 ldata = *src;
10788 ldata = le32_to_cpu(ldata);
10789 *dest = ldata;
10790 src++;
10791 dest++;
10792 }
10793}
10794
e59058c4 10795
a0c87cbd
JS
10796/**
10797 * lpfc_sli_bemem_bcopy - SLI memory copy function
10798 * @srcp: Source memory pointer.
10799 * @destp: Destination memory pointer.
10800 * @cnt: Number of words required to be copied.
10801 *
10802 * This function is used for copying data between a data structure
10803 * with big endian representation to local endianness.
10804 * This function can be called with or without lock.
10805 **/
10806void
10807lpfc_sli_bemem_bcopy(void *srcp, void *destp, uint32_t cnt)
10808{
10809 uint32_t *src = srcp;
10810 uint32_t *dest = destp;
10811 uint32_t ldata;
10812 int i;
10813
10814 for (i = 0; i < (int)cnt; i += sizeof(uint32_t)) {
10815 ldata = *src;
10816 ldata = be32_to_cpu(ldata);
10817 *dest = ldata;
10818 src++;
10819 dest++;
10820 }
10821}
10822
e59058c4 10823/**
3621a710 10824 * lpfc_sli_ringpostbuf_put - Function to add a buffer to postbufq
e59058c4
JS
10825 * @phba: Pointer to HBA context object.
10826 * @pring: Pointer to driver SLI ring object.
10827 * @mp: Pointer to driver buffer object.
10828 *
10829 * This function is called with no lock held.
10830 * It always return zero after adding the buffer to the postbufq
10831 * buffer list.
10832 **/
dea3101e 10833int
2e0fef85
JS
10834lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10835 struct lpfc_dmabuf *mp)
dea3101e
JB
10836{
10837 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
10838 later */
2e0fef85 10839 spin_lock_irq(&phba->hbalock);
dea3101e 10840 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 10841 pring->postbufq_cnt++;
2e0fef85 10842 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10843 return 0;
10844}
10845
e59058c4 10846/**
3621a710 10847 * lpfc_sli_get_buffer_tag - allocates a tag for a CMD_QUE_XRI64_CX buffer
e59058c4
JS
10848 * @phba: Pointer to HBA context object.
10849 *
10850 * When HBQ is enabled, buffers are searched based on tags. This function
10851 * allocates a tag for buffer posted using CMD_QUE_XRI64_CX iocb. The
10852 * tag is bit wise or-ed with QUE_BUFTAG_BIT to make sure that the tag
10853 * does not conflict with tags of buffer posted for unsolicited events.
10854 * The function returns the allocated tag. The function is called with
10855 * no locks held.
10856 **/
76bb24ef
JS
10857uint32_t
10858lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
10859{
10860 spin_lock_irq(&phba->hbalock);
10861 phba->buffer_tag_count++;
10862 /*
10863 * Always set the QUE_BUFTAG_BIT to distiguish between
10864 * a tag assigned by HBQ.
10865 */
10866 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
10867 spin_unlock_irq(&phba->hbalock);
10868 return phba->buffer_tag_count;
10869}
10870
e59058c4 10871/**
3621a710 10872 * lpfc_sli_ring_taggedbuf_get - find HBQ buffer associated with given tag
e59058c4
JS
10873 * @phba: Pointer to HBA context object.
10874 * @pring: Pointer to driver SLI ring object.
10875 * @tag: Buffer tag.
10876 *
10877 * Buffers posted using CMD_QUE_XRI64_CX iocb are in pring->postbufq
10878 * list. After HBA DMA data to these buffers, CMD_IOCB_RET_XRI64_CX
10879 * iocb is posted to the response ring with the tag of the buffer.
10880 * This function searches the pring->postbufq list using the tag
10881 * to find buffer associated with CMD_IOCB_RET_XRI64_CX
10882 * iocb. If the buffer is found then lpfc_dmabuf object of the
10883 * buffer is returned to the caller else NULL is returned.
10884 * This function is called with no lock held.
10885 **/
76bb24ef
JS
10886struct lpfc_dmabuf *
10887lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10888 uint32_t tag)
10889{
10890 struct lpfc_dmabuf *mp, *next_mp;
10891 struct list_head *slp = &pring->postbufq;
10892
25985edc 10893 /* Search postbufq, from the beginning, looking for a match on tag */
76bb24ef
JS
10894 spin_lock_irq(&phba->hbalock);
10895 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
10896 if (mp->buffer_tag == tag) {
10897 list_del_init(&mp->list);
10898 pring->postbufq_cnt--;
10899 spin_unlock_irq(&phba->hbalock);
10900 return mp;
10901 }
10902 }
10903
10904 spin_unlock_irq(&phba->hbalock);
10905 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 10906 "0402 Cannot find virtual addr for buffer tag on "
76bb24ef
JS
10907 "ring %d Data x%lx x%p x%p x%x\n",
10908 pring->ringno, (unsigned long) tag,
10909 slp->next, slp->prev, pring->postbufq_cnt);
10910
10911 return NULL;
10912}
dea3101e 10913
e59058c4 10914/**
3621a710 10915 * lpfc_sli_ringpostbuf_get - search buffers for unsolicited CT and ELS events
e59058c4
JS
10916 * @phba: Pointer to HBA context object.
10917 * @pring: Pointer to driver SLI ring object.
10918 * @phys: DMA address of the buffer.
10919 *
10920 * This function searches the buffer list using the dma_address
10921 * of unsolicited event to find the driver's lpfc_dmabuf object
10922 * corresponding to the dma_address. The function returns the
10923 * lpfc_dmabuf object if a buffer is found else it returns NULL.
10924 * This function is called by the ct and els unsolicited event
10925 * handlers to get the buffer associated with the unsolicited
10926 * event.
10927 *
10928 * This function is called with no lock held.
10929 **/
dea3101e
JB
10930struct lpfc_dmabuf *
10931lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10932 dma_addr_t phys)
10933{
10934 struct lpfc_dmabuf *mp, *next_mp;
10935 struct list_head *slp = &pring->postbufq;
10936
25985edc 10937 /* Search postbufq, from the beginning, looking for a match on phys */
2e0fef85 10938 spin_lock_irq(&phba->hbalock);
dea3101e
JB
10939 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
10940 if (mp->phys == phys) {
10941 list_del_init(&mp->list);
10942 pring->postbufq_cnt--;
2e0fef85 10943 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10944 return mp;
10945 }
10946 }
10947
2e0fef85 10948 spin_unlock_irq(&phba->hbalock);
dea3101e 10949 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 10950 "0410 Cannot find virtual addr for mapped buf on "
dea3101e 10951 "ring %d Data x%llx x%p x%p x%x\n",
e8b62011 10952 pring->ringno, (unsigned long long)phys,
dea3101e
JB
10953 slp->next, slp->prev, pring->postbufq_cnt);
10954 return NULL;
10955}
10956
e59058c4 10957/**
3621a710 10958 * lpfc_sli_abort_els_cmpl - Completion handler for the els abort iocbs
e59058c4
JS
10959 * @phba: Pointer to HBA context object.
10960 * @cmdiocb: Pointer to driver command iocb object.
10961 * @rspiocb: Pointer to driver response iocb object.
10962 *
10963 * This function is the completion handler for the abort iocbs for
10964 * ELS commands. This function is called from the ELS ring event
10965 * handler with no lock held. This function frees memory resources
10966 * associated with the abort iocb.
10967 **/
dea3101e 10968static void
2e0fef85
JS
10969lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
10970 struct lpfc_iocbq *rspiocb)
dea3101e 10971{
2e0fef85 10972 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 10973 uint16_t abort_iotag, abort_context;
ff78d8f9 10974 struct lpfc_iocbq *abort_iocb = NULL;
2680eeaa
JS
10975
10976 if (irsp->ulpStatus) {
ff78d8f9
JS
10977
10978 /*
10979 * Assume that the port already completed and returned, or
10980 * will return the iocb. Just Log the message.
10981 */
2680eeaa
JS
10982 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
10983 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
10984
2e0fef85 10985 spin_lock_irq(&phba->hbalock);
45ed1190 10986 if (phba->sli_rev < LPFC_SLI_REV4) {
faa832e9
JS
10987 if (irsp->ulpCommand == CMD_ABORT_XRI_CX &&
10988 irsp->ulpStatus == IOSTAT_LOCAL_REJECT &&
10989 irsp->un.ulpWord[4] == IOERR_ABORT_REQUESTED) {
10990 spin_unlock_irq(&phba->hbalock);
10991 goto release_iocb;
10992 }
45ed1190
JS
10993 if (abort_iotag != 0 &&
10994 abort_iotag <= phba->sli.last_iotag)
10995 abort_iocb =
10996 phba->sli.iocbq_lookup[abort_iotag];
10997 } else
10998 /* For sli4 the abort_tag is the XRI,
10999 * so the abort routine puts the iotag of the iocb
11000 * being aborted in the context field of the abort
11001 * IOCB.
11002 */
11003 abort_iocb = phba->sli.iocbq_lookup[abort_context];
2680eeaa 11004
2a9bf3d0
JS
11005 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS | LOG_SLI,
11006 "0327 Cannot abort els iocb %p "
11007 "with tag %x context %x, abort status %x, "
11008 "abort code %x\n",
11009 abort_iocb, abort_iotag, abort_context,
11010 irsp->ulpStatus, irsp->un.ulpWord[4]);
341af102 11011
ff78d8f9 11012 spin_unlock_irq(&phba->hbalock);
2680eeaa 11013 }
faa832e9 11014release_iocb:
604a3e30 11015 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB
11016 return;
11017}
11018
e59058c4 11019/**
3621a710 11020 * lpfc_ignore_els_cmpl - Completion handler for aborted ELS command
e59058c4
JS
11021 * @phba: Pointer to HBA context object.
11022 * @cmdiocb: Pointer to driver command iocb object.
11023 * @rspiocb: Pointer to driver response iocb object.
11024 *
11025 * The function is called from SLI ring event handler with no
11026 * lock held. This function is the completion handler for ELS commands
11027 * which are aborted. The function frees memory resources used for
11028 * the aborted ELS commands.
11029 **/
92d7f7b0
JS
11030static void
11031lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11032 struct lpfc_iocbq *rspiocb)
11033{
11034 IOCB_t *irsp = &rspiocb->iocb;
11035
11036 /* ELS cmd tag <ulpIoTag> completes */
11037 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
d7c255b2 11038 "0139 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 11039 "x%x x%x x%x\n",
e8b62011 11040 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 11041 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS
11042 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
11043 lpfc_ct_free_iocb(phba, cmdiocb);
11044 else
11045 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS
11046 return;
11047}
11048
e59058c4 11049/**
5af5eee7 11050 * lpfc_sli_abort_iotag_issue - Issue abort for a command iocb
e59058c4
JS
11051 * @phba: Pointer to HBA context object.
11052 * @pring: Pointer to driver SLI ring object.
11053 * @cmdiocb: Pointer to driver command iocb object.
11054 *
5af5eee7
JS
11055 * This function issues an abort iocb for the provided command iocb down to
11056 * the port. Other than the case the outstanding command iocb is an abort
11057 * request, this function issues abort out unconditionally. This function is
11058 * called with hbalock held. The function returns 0 when it fails due to
11059 * memory allocation failure or when the command iocb is an abort request.
e59058c4 11060 **/
5af5eee7
JS
11061static int
11062lpfc_sli_abort_iotag_issue(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 11063 struct lpfc_iocbq *cmdiocb)
dea3101e 11064{
2e0fef85 11065 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 11066 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB
11067 IOCB_t *icmd = NULL;
11068 IOCB_t *iabt = NULL;
5af5eee7 11069 int retval;
7e56aa25 11070 unsigned long iflags;
faa832e9 11071 struct lpfc_nodelist *ndlp;
07951076 11072
1c2ba475
JT
11073 lockdep_assert_held(&phba->hbalock);
11074
92d7f7b0
JS
11075 /*
11076 * There are certain command types we don't want to abort. And we
11077 * don't want to abort commands that are already in the process of
11078 * being aborted.
07951076
JS
11079 */
11080 icmd = &cmdiocb->iocb;
2e0fef85 11081 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS
11082 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11083 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS
11084 return 0;
11085
dea3101e 11086 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 11087 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
11088 if (abtsiocbp == NULL)
11089 return 0;
dea3101e 11090
07951076 11091 /* This signals the response to set the correct status
341af102 11092 * before calling the completion handler
07951076
JS
11093 */
11094 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
11095
dea3101e 11096 iabt = &abtsiocbp->iocb;
07951076
JS
11097 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
11098 iabt->un.acxri.abortContextTag = icmd->ulpContext;
45ed1190 11099 if (phba->sli_rev == LPFC_SLI_REV4) {
da0436e9 11100 iabt->un.acxri.abortIoTag = cmdiocb->sli4_xritag;
45ed1190 11101 iabt->un.acxri.abortContextTag = cmdiocb->iotag;
faa832e9 11102 } else {
da0436e9 11103 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
faa832e9
JS
11104 if (pring->ringno == LPFC_ELS_RING) {
11105 ndlp = (struct lpfc_nodelist *)(cmdiocb->context1);
11106 iabt->un.acxri.abortContextTag = ndlp->nlp_rpi;
11107 }
11108 }
07951076
JS
11109 iabt->ulpLe = 1;
11110 iabt->ulpClass = icmd->ulpClass;
dea3101e 11111
5ffc266e 11112 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11113 abtsiocbp->hba_wqidx = cmdiocb->hba_wqidx;
341af102
JS
11114 if (cmdiocb->iocb_flag & LPFC_IO_FCP)
11115 abtsiocbp->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11116 if (cmdiocb->iocb_flag & LPFC_IO_FOF)
11117 abtsiocbp->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11118
2e0fef85 11119 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS
11120 iabt->ulpCommand = CMD_ABORT_XRI_CN;
11121 else
11122 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 11123
07951076 11124 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
e6c6acc0 11125 abtsiocbp->vport = vport;
5b8bd0c9 11126
e8b62011
JS
11127 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
11128 "0339 Abort xri x%x, original iotag x%x, "
11129 "abort cmd iotag x%x\n",
2a9bf3d0 11130 iabt->un.acxri.abortIoTag,
e8b62011 11131 iabt->un.acxri.abortContextTag,
2a9bf3d0 11132 abtsiocbp->iotag);
7e56aa25
JS
11133
11134 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
11135 pring = lpfc_sli4_calc_ring(phba, abtsiocbp);
11136 if (unlikely(pring == NULL))
9bd2bff5 11137 return 0;
7e56aa25
JS
11138 /* Note: both hbalock and ring_lock need to be set here */
11139 spin_lock_irqsave(&pring->ring_lock, iflags);
11140 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11141 abtsiocbp, 0);
11142 spin_unlock_irqrestore(&pring->ring_lock, iflags);
11143 } else {
11144 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11145 abtsiocbp, 0);
11146 }
dea3101e 11147
d7c255b2
JS
11148 if (retval)
11149 __lpfc_sli_release_iocbq(phba, abtsiocbp);
5af5eee7
JS
11150
11151 /*
11152 * Caller to this routine should check for IOCB_ERROR
11153 * and handle it properly. This routine no longer removes
11154 * iocb off txcmplq and call compl in case of IOCB_ERROR.
11155 */
11156 return retval;
11157}
11158
11159/**
11160 * lpfc_sli_issue_abort_iotag - Abort function for a command iocb
11161 * @phba: Pointer to HBA context object.
11162 * @pring: Pointer to driver SLI ring object.
11163 * @cmdiocb: Pointer to driver command iocb object.
11164 *
11165 * This function issues an abort iocb for the provided command iocb. In case
11166 * of unloading, the abort iocb will not be issued to commands on the ELS
11167 * ring. Instead, the callback function shall be changed to those commands
11168 * so that nothing happens when them finishes. This function is called with
11169 * hbalock held. The function returns 0 when the command iocb is an abort
11170 * request.
11171 **/
11172int
11173lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11174 struct lpfc_iocbq *cmdiocb)
11175{
11176 struct lpfc_vport *vport = cmdiocb->vport;
11177 int retval = IOCB_ERROR;
11178 IOCB_t *icmd = NULL;
11179
1c2ba475
JT
11180 lockdep_assert_held(&phba->hbalock);
11181
5af5eee7
JS
11182 /*
11183 * There are certain command types we don't want to abort. And we
11184 * don't want to abort commands that are already in the process of
11185 * being aborted.
11186 */
11187 icmd = &cmdiocb->iocb;
11188 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
11189 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11190 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
11191 return 0;
11192
1234a6d5
DK
11193 if (!pring) {
11194 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11195 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11196 else
11197 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11198 goto abort_iotag_exit;
11199 }
11200
5af5eee7
JS
11201 /*
11202 * If we're unloading, don't abort iocb on the ELS ring, but change
11203 * the callback so that nothing happens when it finishes.
11204 */
11205 if ((vport->load_flag & FC_UNLOADING) &&
11206 (pring->ringno == LPFC_ELS_RING)) {
11207 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11208 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11209 else
11210 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11211 goto abort_iotag_exit;
11212 }
11213
11214 /* Now, we try to issue the abort to the cmdiocb out */
11215 retval = lpfc_sli_abort_iotag_issue(phba, pring, cmdiocb);
11216
07951076 11217abort_iotag_exit:
2e0fef85
JS
11218 /*
11219 * Caller to this routine should check for IOCB_ERROR
11220 * and handle it properly. This routine no longer removes
11221 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 11222 */
2e0fef85 11223 return retval;
dea3101e
JB
11224}
11225
895427bd
JS
11226/**
11227 * lpfc_sli4_abort_nvme_io - Issue abort for a command iocb
11228 * @phba: Pointer to HBA context object.
11229 * @pring: Pointer to driver SLI ring object.
11230 * @cmdiocb: Pointer to driver command iocb object.
11231 *
11232 * This function issues an abort iocb for the provided command iocb down to
11233 * the port. Other than the case the outstanding command iocb is an abort
11234 * request, this function issues abort out unconditionally. This function is
11235 * called with hbalock held. The function returns 0 when it fails due to
11236 * memory allocation failure or when the command iocb is an abort request.
11237 **/
11238static int
11239lpfc_sli4_abort_nvme_io(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11240 struct lpfc_iocbq *cmdiocb)
11241{
11242 struct lpfc_vport *vport = cmdiocb->vport;
11243 struct lpfc_iocbq *abtsiocbp;
205e8240 11244 union lpfc_wqe128 *abts_wqe;
895427bd
JS
11245 int retval;
11246
11247 /*
11248 * There are certain command types we don't want to abort. And we
11249 * don't want to abort commands that are already in the process of
11250 * being aborted.
11251 */
11252 if (cmdiocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
11253 cmdiocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN ||
11254 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
11255 return 0;
11256
11257 /* issue ABTS for this io based on iotag */
11258 abtsiocbp = __lpfc_sli_get_iocbq(phba);
11259 if (abtsiocbp == NULL)
11260 return 0;
11261
11262 /* This signals the response to set the correct status
11263 * before calling the completion handler
11264 */
11265 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
11266
11267 /* Complete prepping the abort wqe and issue to the FW. */
11268 abts_wqe = &abtsiocbp->wqe;
11269 bf_set(abort_cmd_ia, &abts_wqe->abort_cmd, 0);
11270 bf_set(abort_cmd_criteria, &abts_wqe->abort_cmd, T_XRI_TAG);
11271
11272 /* Explicitly set reserved fields to zero.*/
11273 abts_wqe->abort_cmd.rsrvd4 = 0;
11274 abts_wqe->abort_cmd.rsrvd5 = 0;
11275
11276 /* WQE Common - word 6. Context is XRI tag. Set 0. */
11277 bf_set(wqe_xri_tag, &abts_wqe->abort_cmd.wqe_com, 0);
11278 bf_set(wqe_ctxt_tag, &abts_wqe->abort_cmd.wqe_com, 0);
11279
11280 /* word 7 */
11281 bf_set(wqe_ct, &abts_wqe->abort_cmd.wqe_com, 0);
11282 bf_set(wqe_cmnd, &abts_wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
11283 bf_set(wqe_class, &abts_wqe->abort_cmd.wqe_com,
11284 cmdiocb->iocb.ulpClass);
11285
11286 /* word 8 - tell the FW to abort the IO associated with this
11287 * outstanding exchange ID.
11288 */
11289 abts_wqe->abort_cmd.wqe_com.abort_tag = cmdiocb->sli4_xritag;
11290
11291 /* word 9 - this is the iotag for the abts_wqe completion. */
11292 bf_set(wqe_reqtag, &abts_wqe->abort_cmd.wqe_com,
11293 abtsiocbp->iotag);
11294
11295 /* word 10 */
11296 bf_set(wqe_wqid, &abts_wqe->abort_cmd.wqe_com, cmdiocb->hba_wqidx);
11297 bf_set(wqe_qosd, &abts_wqe->abort_cmd.wqe_com, 1);
11298 bf_set(wqe_lenloc, &abts_wqe->abort_cmd.wqe_com, LPFC_WQE_LENLOC_NONE);
11299
11300 /* word 11 */
11301 bf_set(wqe_cmd_type, &abts_wqe->abort_cmd.wqe_com, OTHER_COMMAND);
11302 bf_set(wqe_wqec, &abts_wqe->abort_cmd.wqe_com, 1);
11303 bf_set(wqe_cqid, &abts_wqe->abort_cmd.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
11304
11305 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
11306 abtsiocbp->iocb_flag |= LPFC_IO_NVME;
11307 abtsiocbp->vport = vport;
01649561 11308 abtsiocbp->wqe_cmpl = lpfc_nvme_abort_fcreq_cmpl;
895427bd 11309 retval = lpfc_sli4_issue_wqe(phba, LPFC_FCP_RING, abtsiocbp);
cd22d605 11310 if (retval) {
895427bd
JS
11311 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME,
11312 "6147 Failed abts issue_wqe with status x%x "
11313 "for oxid x%x\n",
11314 retval, cmdiocb->sli4_xritag);
11315 lpfc_sli_release_iocbq(phba, abtsiocbp);
11316 return retval;
11317 }
11318
11319 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME,
11320 "6148 Drv Abort NVME Request Issued for "
11321 "ox_id x%x on reqtag x%x\n",
11322 cmdiocb->sli4_xritag,
11323 abtsiocbp->iotag);
11324
11325 return retval;
11326}
11327
5af5eee7
JS
11328/**
11329 * lpfc_sli_hba_iocb_abort - Abort all iocbs to an hba.
11330 * @phba: pointer to lpfc HBA data structure.
11331 *
11332 * This routine will abort all pending and outstanding iocbs to an HBA.
11333 **/
11334void
11335lpfc_sli_hba_iocb_abort(struct lpfc_hba *phba)
11336{
11337 struct lpfc_sli *psli = &phba->sli;
11338 struct lpfc_sli_ring *pring;
895427bd 11339 struct lpfc_queue *qp = NULL;
5af5eee7
JS
11340 int i;
11341
895427bd
JS
11342 if (phba->sli_rev != LPFC_SLI_REV4) {
11343 for (i = 0; i < psli->num_rings; i++) {
11344 pring = &psli->sli3_ring[i];
11345 lpfc_sli_abort_iocb_ring(phba, pring);
11346 }
11347 return;
11348 }
11349 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
11350 pring = qp->pring;
11351 if (!pring)
11352 continue;
db55fba8 11353 lpfc_sli_abort_iocb_ring(phba, pring);
5af5eee7
JS
11354 }
11355}
11356
e59058c4 11357/**
3621a710 11358 * lpfc_sli_validate_fcp_iocb - find commands associated with a vport or LUN
e59058c4
JS
11359 * @iocbq: Pointer to driver iocb object.
11360 * @vport: Pointer to driver virtual port object.
11361 * @tgt_id: SCSI ID of the target.
11362 * @lun_id: LUN ID of the scsi device.
11363 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST
11364 *
3621a710 11365 * This function acts as an iocb filter for functions which abort or count
e59058c4
JS
11366 * all FCP iocbs pending on a lun/SCSI target/SCSI host. It will return
11367 * 0 if the filtering criteria is met for the given iocb and will return
11368 * 1 if the filtering criteria is not met.
11369 * If ctx_cmd == LPFC_CTX_LUN, the function returns 0 only if the
11370 * given iocb is for the SCSI device specified by vport, tgt_id and
11371 * lun_id parameter.
11372 * If ctx_cmd == LPFC_CTX_TGT, the function returns 0 only if the
11373 * given iocb is for the SCSI target specified by vport and tgt_id
11374 * parameters.
11375 * If ctx_cmd == LPFC_CTX_HOST, the function returns 0 only if the
11376 * given iocb is for the SCSI host associated with the given vport.
11377 * This function is called with no locks held.
11378 **/
dea3101e 11379static int
51ef4c26
JS
11380lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
11381 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 11382 lpfc_ctx_cmd ctx_cmd)
dea3101e 11383{
0bd4ca25 11384 struct lpfc_scsi_buf *lpfc_cmd;
dea3101e
JB
11385 int rc = 1;
11386
b0e83012 11387 if (iocbq->vport != vport)
0bd4ca25
JSEC
11388 return rc;
11389
b0e83012
JS
11390 if (!(iocbq->iocb_flag & LPFC_IO_FCP) ||
11391 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ))
51ef4c26
JS
11392 return rc;
11393
0bd4ca25 11394 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
0bd4ca25 11395
495a714c 11396 if (lpfc_cmd->pCmd == NULL)
dea3101e
JB
11397 return rc;
11398
11399 switch (ctx_cmd) {
11400 case LPFC_CTX_LUN:
b0e83012 11401 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c
JS
11402 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id) &&
11403 (scsilun_to_int(&lpfc_cmd->fcp_cmnd->fcp_lun) == lun_id))
dea3101e
JB
11404 rc = 0;
11405 break;
11406 case LPFC_CTX_TGT:
b0e83012 11407 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c 11408 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id))
dea3101e
JB
11409 rc = 0;
11410 break;
dea3101e
JB
11411 case LPFC_CTX_HOST:
11412 rc = 0;
11413 break;
11414 default:
11415 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
cadbd4a5 11416 __func__, ctx_cmd);
dea3101e
JB
11417 break;
11418 }
11419
11420 return rc;
11421}
11422
e59058c4 11423/**
3621a710 11424 * lpfc_sli_sum_iocb - Function to count the number of FCP iocbs pending
e59058c4
JS
11425 * @vport: Pointer to virtual port.
11426 * @tgt_id: SCSI ID of the target.
11427 * @lun_id: LUN ID of the scsi device.
11428 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11429 *
11430 * This function returns number of FCP commands pending for the vport.
11431 * When ctx_cmd == LPFC_CTX_LUN, the function returns number of FCP
11432 * commands pending on the vport associated with SCSI device specified
11433 * by tgt_id and lun_id parameters.
11434 * When ctx_cmd == LPFC_CTX_TGT, the function returns number of FCP
11435 * commands pending on the vport associated with SCSI target specified
11436 * by tgt_id parameter.
11437 * When ctx_cmd == LPFC_CTX_HOST, the function returns number of FCP
11438 * commands pending on the vport.
11439 * This function returns the number of iocbs which satisfy the filter.
11440 * This function is called without any lock held.
11441 **/
dea3101e 11442int
51ef4c26
JS
11443lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
11444 lpfc_ctx_cmd ctx_cmd)
dea3101e 11445{
51ef4c26 11446 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11447 struct lpfc_iocbq *iocbq;
11448 int sum, i;
dea3101e 11449
31979008 11450 spin_lock_irq(&phba->hbalock);
0bd4ca25
JSEC
11451 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
11452 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11453
51ef4c26
JS
11454 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
11455 ctx_cmd) == 0)
0bd4ca25 11456 sum++;
dea3101e 11457 }
31979008 11458 spin_unlock_irq(&phba->hbalock);
0bd4ca25 11459
dea3101e
JB
11460 return sum;
11461}
11462
e59058c4 11463/**
3621a710 11464 * lpfc_sli_abort_fcp_cmpl - Completion handler function for aborted FCP IOCBs
e59058c4
JS
11465 * @phba: Pointer to HBA context object
11466 * @cmdiocb: Pointer to command iocb object.
11467 * @rspiocb: Pointer to response iocb object.
11468 *
11469 * This function is called when an aborted FCP iocb completes. This
11470 * function is called by the ring event handler with no lock held.
11471 * This function frees the iocb.
11472 **/
5eb95af0 11473void
2e0fef85
JS
11474lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11475 struct lpfc_iocbq *rspiocb)
5eb95af0 11476{
cb69f7de 11477 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8e668af5 11478 "3096 ABORT_XRI_CN completing on rpi x%x "
cb69f7de
JS
11479 "original iotag x%x, abort cmd iotag x%x "
11480 "status 0x%x, reason 0x%x\n",
11481 cmdiocb->iocb.un.acxri.abortContextTag,
11482 cmdiocb->iocb.un.acxri.abortIoTag,
11483 cmdiocb->iotag, rspiocb->iocb.ulpStatus,
11484 rspiocb->iocb.un.ulpWord[4]);
604a3e30 11485 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC
11486 return;
11487}
11488
e59058c4 11489/**
3621a710 11490 * lpfc_sli_abort_iocb - issue abort for all commands on a host/target/LUN
e59058c4
JS
11491 * @vport: Pointer to virtual port.
11492 * @pring: Pointer to driver SLI ring object.
11493 * @tgt_id: SCSI ID of the target.
11494 * @lun_id: LUN ID of the scsi device.
11495 * @abort_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11496 *
11497 * This function sends an abort command for every SCSI command
11498 * associated with the given virtual port pending on the ring
11499 * filtered by lpfc_sli_validate_fcp_iocb function.
11500 * When abort_cmd == LPFC_CTX_LUN, the function sends abort only to the
11501 * FCP iocbs associated with lun specified by tgt_id and lun_id
11502 * parameters
11503 * When abort_cmd == LPFC_CTX_TGT, the function sends abort only to the
11504 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11505 * When abort_cmd == LPFC_CTX_HOST, the function sends abort to all
11506 * FCP iocbs associated with virtual port.
11507 * This function returns number of iocbs it failed to abort.
11508 * This function is called with no locks held.
11509 **/
dea3101e 11510int
51ef4c26
JS
11511lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11512 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 11513{
51ef4c26 11514 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11515 struct lpfc_iocbq *iocbq;
11516 struct lpfc_iocbq *abtsiocb;
ecbb227e 11517 struct lpfc_sli_ring *pring_s4;
dea3101e 11518 IOCB_t *cmd = NULL;
dea3101e 11519 int errcnt = 0, ret_val = 0;
0bd4ca25 11520 int i;
dea3101e 11521
b0e83012
JS
11522 /* all I/Os are in process of being flushed */
11523 if (phba->hba_flag & HBA_FCP_IOQ_FLUSH)
11524 return errcnt;
11525
0bd4ca25
JSEC
11526 for (i = 1; i <= phba->sli.last_iotag; i++) {
11527 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11528
51ef4c26 11529 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 11530 abort_cmd) != 0)
dea3101e
JB
11531 continue;
11532
afbd8d88
JS
11533 /*
11534 * If the iocbq is already being aborted, don't take a second
11535 * action, but do count it.
11536 */
11537 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11538 continue;
11539
dea3101e 11540 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 11541 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
11542 if (abtsiocb == NULL) {
11543 errcnt++;
11544 continue;
11545 }
dea3101e 11546
afbd8d88
JS
11547 /* indicate the IO is being aborted by the driver. */
11548 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11549
0bd4ca25 11550 cmd = &iocbq->iocb;
dea3101e
JB
11551 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11552 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
da0436e9
JS
11553 if (phba->sli_rev == LPFC_SLI_REV4)
11554 abtsiocb->iocb.un.acxri.abortIoTag = iocbq->sli4_xritag;
11555 else
11556 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
dea3101e
JB
11557 abtsiocb->iocb.ulpLe = 1;
11558 abtsiocb->iocb.ulpClass = cmd->ulpClass;
afbd8d88 11559 abtsiocb->vport = vport;
dea3101e 11560
5ffc266e 11561 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11562 abtsiocb->hba_wqidx = iocbq->hba_wqidx;
341af102
JS
11563 if (iocbq->iocb_flag & LPFC_IO_FCP)
11564 abtsiocb->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11565 if (iocbq->iocb_flag & LPFC_IO_FOF)
11566 abtsiocb->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11567
2e0fef85 11568 if (lpfc_is_link_up(phba))
dea3101e
JB
11569 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11570 else
11571 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11572
5eb95af0
JSEC
11573 /* Setup callback routine and issue the command. */
11574 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
ecbb227e
JS
11575 if (phba->sli_rev == LPFC_SLI_REV4) {
11576 pring_s4 = lpfc_sli4_calc_ring(phba, iocbq);
11577 if (!pring_s4)
11578 continue;
11579 ret_val = lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11580 abtsiocb, 0);
11581 } else
11582 ret_val = lpfc_sli_issue_iocb(phba, pring->ringno,
11583 abtsiocb, 0);
dea3101e 11584 if (ret_val == IOCB_ERROR) {
604a3e30 11585 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB
11586 errcnt++;
11587 continue;
11588 }
11589 }
11590
11591 return errcnt;
11592}
11593
98912dda
JS
11594/**
11595 * lpfc_sli_abort_taskmgmt - issue abort for all commands on a host/target/LUN
11596 * @vport: Pointer to virtual port.
11597 * @pring: Pointer to driver SLI ring object.
11598 * @tgt_id: SCSI ID of the target.
11599 * @lun_id: LUN ID of the scsi device.
11600 * @taskmgmt_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11601 *
11602 * This function sends an abort command for every SCSI command
11603 * associated with the given virtual port pending on the ring
11604 * filtered by lpfc_sli_validate_fcp_iocb function.
11605 * When taskmgmt_cmd == LPFC_CTX_LUN, the function sends abort only to the
11606 * FCP iocbs associated with lun specified by tgt_id and lun_id
11607 * parameters
11608 * When taskmgmt_cmd == LPFC_CTX_TGT, the function sends abort only to the
11609 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11610 * When taskmgmt_cmd == LPFC_CTX_HOST, the function sends abort to all
11611 * FCP iocbs associated with virtual port.
11612 * This function returns number of iocbs it aborted .
11613 * This function is called with no locks held right after a taskmgmt
11614 * command is sent.
11615 **/
11616int
11617lpfc_sli_abort_taskmgmt(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11618 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd cmd)
11619{
11620 struct lpfc_hba *phba = vport->phba;
8c50d25c 11621 struct lpfc_scsi_buf *lpfc_cmd;
98912dda 11622 struct lpfc_iocbq *abtsiocbq;
8c50d25c 11623 struct lpfc_nodelist *ndlp;
98912dda
JS
11624 struct lpfc_iocbq *iocbq;
11625 IOCB_t *icmd;
11626 int sum, i, ret_val;
11627 unsigned long iflags;
11628 struct lpfc_sli_ring *pring_s4;
98912dda 11629
59c68eaa 11630 spin_lock_irqsave(&phba->hbalock, iflags);
98912dda
JS
11631
11632 /* all I/Os are in process of being flushed */
11633 if (phba->hba_flag & HBA_FCP_IOQ_FLUSH) {
59c68eaa 11634 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11635 return 0;
11636 }
11637 sum = 0;
11638
11639 for (i = 1; i <= phba->sli.last_iotag; i++) {
11640 iocbq = phba->sli.iocbq_lookup[i];
11641
11642 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
11643 cmd) != 0)
11644 continue;
11645
11646 /*
11647 * If the iocbq is already being aborted, don't take a second
11648 * action, but do count it.
11649 */
11650 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11651 continue;
11652
11653 /* issue ABTS for this IOCB based on iotag */
11654 abtsiocbq = __lpfc_sli_get_iocbq(phba);
11655 if (abtsiocbq == NULL)
11656 continue;
11657
11658 icmd = &iocbq->iocb;
11659 abtsiocbq->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11660 abtsiocbq->iocb.un.acxri.abortContextTag = icmd->ulpContext;
11661 if (phba->sli_rev == LPFC_SLI_REV4)
11662 abtsiocbq->iocb.un.acxri.abortIoTag =
11663 iocbq->sli4_xritag;
11664 else
11665 abtsiocbq->iocb.un.acxri.abortIoTag = icmd->ulpIoTag;
11666 abtsiocbq->iocb.ulpLe = 1;
11667 abtsiocbq->iocb.ulpClass = icmd->ulpClass;
11668 abtsiocbq->vport = vport;
11669
11670 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11671 abtsiocbq->hba_wqidx = iocbq->hba_wqidx;
98912dda
JS
11672 if (iocbq->iocb_flag & LPFC_IO_FCP)
11673 abtsiocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11674 if (iocbq->iocb_flag & LPFC_IO_FOF)
11675 abtsiocbq->iocb_flag |= LPFC_IO_FOF;
98912dda 11676
8c50d25c
JS
11677 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
11678 ndlp = lpfc_cmd->rdata->pnode;
11679
11680 if (lpfc_is_link_up(phba) &&
11681 (ndlp && ndlp->nlp_state == NLP_STE_MAPPED_NODE))
98912dda
JS
11682 abtsiocbq->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11683 else
11684 abtsiocbq->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11685
11686 /* Setup callback routine and issue the command. */
11687 abtsiocbq->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
11688
11689 /*
11690 * Indicate the IO is being aborted by the driver and set
11691 * the caller's flag into the aborted IO.
11692 */
11693 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11694
11695 if (phba->sli_rev == LPFC_SLI_REV4) {
59c68eaa
JS
11696 pring_s4 = lpfc_sli4_calc_ring(phba, abtsiocbq);
11697 if (!pring_s4)
895427bd 11698 continue;
98912dda 11699 /* Note: both hbalock and ring_lock must be set here */
59c68eaa 11700 spin_lock(&pring_s4->ring_lock);
98912dda
JS
11701 ret_val = __lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11702 abtsiocbq, 0);
59c68eaa 11703 spin_unlock(&pring_s4->ring_lock);
98912dda
JS
11704 } else {
11705 ret_val = __lpfc_sli_issue_iocb(phba, pring->ringno,
11706 abtsiocbq, 0);
11707 }
11708
11709
11710 if (ret_val == IOCB_ERROR)
11711 __lpfc_sli_release_iocbq(phba, abtsiocbq);
11712 else
11713 sum++;
11714 }
59c68eaa 11715 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11716 return sum;
11717}
11718
e59058c4 11719/**
3621a710 11720 * lpfc_sli_wake_iocb_wait - lpfc_sli_issue_iocb_wait's completion handler
e59058c4
JS
11721 * @phba: Pointer to HBA context object.
11722 * @cmdiocbq: Pointer to command iocb.
11723 * @rspiocbq: Pointer to response iocb.
11724 *
11725 * This function is the completion handler for iocbs issued using
11726 * lpfc_sli_issue_iocb_wait function. This function is called by the
11727 * ring event handler function without any lock held. This function
11728 * can be called from both worker thread context and interrupt
11729 * context. This function also can be called from other thread which
11730 * cleans up the SLI layer objects.
11731 * This function copy the contents of the response iocb to the
11732 * response iocb memory object provided by the caller of
11733 * lpfc_sli_issue_iocb_wait and then wakes up the thread which
11734 * sleeps for the iocb completion.
11735 **/
68876920
JSEC
11736static void
11737lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
11738 struct lpfc_iocbq *cmdiocbq,
11739 struct lpfc_iocbq *rspiocbq)
dea3101e 11740{
68876920
JSEC
11741 wait_queue_head_t *pdone_q;
11742 unsigned long iflags;
0f65ff68 11743 struct lpfc_scsi_buf *lpfc_cmd;
dea3101e 11744
2e0fef85 11745 spin_lock_irqsave(&phba->hbalock, iflags);
5a0916b4
JS
11746 if (cmdiocbq->iocb_flag & LPFC_IO_WAKE_TMO) {
11747
11748 /*
11749 * A time out has occurred for the iocb. If a time out
11750 * completion handler has been supplied, call it. Otherwise,
11751 * just free the iocbq.
11752 */
11753
11754 spin_unlock_irqrestore(&phba->hbalock, iflags);
11755 cmdiocbq->iocb_cmpl = cmdiocbq->wait_iocb_cmpl;
11756 cmdiocbq->wait_iocb_cmpl = NULL;
11757 if (cmdiocbq->iocb_cmpl)
11758 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, NULL);
11759 else
11760 lpfc_sli_release_iocbq(phba, cmdiocbq);
11761 return;
11762 }
11763
68876920
JSEC
11764 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
11765 if (cmdiocbq->context2 && rspiocbq)
11766 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
11767 &rspiocbq->iocb, sizeof(IOCB_t));
11768
0f65ff68
JS
11769 /* Set the exchange busy flag for task management commands */
11770 if ((cmdiocbq->iocb_flag & LPFC_IO_FCP) &&
11771 !(cmdiocbq->iocb_flag & LPFC_IO_LIBDFC)) {
11772 lpfc_cmd = container_of(cmdiocbq, struct lpfc_scsi_buf,
11773 cur_iocbq);
11774 lpfc_cmd->exch_busy = rspiocbq->iocb_flag & LPFC_EXCHANGE_BUSY;
11775 }
11776
68876920 11777 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC
11778 if (pdone_q)
11779 wake_up(pdone_q);
858c9f6c 11780 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB
11781 return;
11782}
11783
d11e31dd
JS
11784/**
11785 * lpfc_chk_iocb_flg - Test IOCB flag with lock held.
11786 * @phba: Pointer to HBA context object..
11787 * @piocbq: Pointer to command iocb.
11788 * @flag: Flag to test.
11789 *
11790 * This routine grabs the hbalock and then test the iocb_flag to
11791 * see if the passed in flag is set.
11792 * Returns:
11793 * 1 if flag is set.
11794 * 0 if flag is not set.
11795 **/
11796static int
11797lpfc_chk_iocb_flg(struct lpfc_hba *phba,
11798 struct lpfc_iocbq *piocbq, uint32_t flag)
11799{
11800 unsigned long iflags;
11801 int ret;
11802
11803 spin_lock_irqsave(&phba->hbalock, iflags);
11804 ret = piocbq->iocb_flag & flag;
11805 spin_unlock_irqrestore(&phba->hbalock, iflags);
11806 return ret;
11807
11808}
11809
e59058c4 11810/**
3621a710 11811 * lpfc_sli_issue_iocb_wait - Synchronous function to issue iocb commands
e59058c4
JS
11812 * @phba: Pointer to HBA context object..
11813 * @pring: Pointer to sli ring.
11814 * @piocb: Pointer to command iocb.
11815 * @prspiocbq: Pointer to response iocb.
11816 * @timeout: Timeout in number of seconds.
11817 *
11818 * This function issues the iocb to firmware and waits for the
5a0916b4
JS
11819 * iocb to complete. The iocb_cmpl field of the shall be used
11820 * to handle iocbs which time out. If the field is NULL, the
11821 * function shall free the iocbq structure. If more clean up is
11822 * needed, the caller is expected to provide a completion function
11823 * that will provide the needed clean up. If the iocb command is
11824 * not completed within timeout seconds, the function will either
11825 * free the iocbq structure (if iocb_cmpl == NULL) or execute the
11826 * completion function set in the iocb_cmpl field and then return
11827 * a status of IOCB_TIMEDOUT. The caller should not free the iocb
11828 * resources if this function returns IOCB_TIMEDOUT.
e59058c4
JS
11829 * The function waits for the iocb completion using an
11830 * non-interruptible wait.
11831 * This function will sleep while waiting for iocb completion.
11832 * So, this function should not be called from any context which
11833 * does not allow sleeping. Due to the same reason, this function
11834 * cannot be called with interrupt disabled.
11835 * This function assumes that the iocb completions occur while
11836 * this function sleep. So, this function cannot be called from
11837 * the thread which process iocb completion for this ring.
11838 * This function clears the iocb_flag of the iocb object before
11839 * issuing the iocb and the iocb completion handler sets this
11840 * flag and wakes this thread when the iocb completes.
11841 * The contents of the response iocb will be copied to prspiocbq
11842 * by the completion handler when the command completes.
11843 * This function returns IOCB_SUCCESS when success.
11844 * This function is called with no lock held.
11845 **/
dea3101e 11846int
2e0fef85 11847lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
da0436e9 11848 uint32_t ring_number,
2e0fef85
JS
11849 struct lpfc_iocbq *piocb,
11850 struct lpfc_iocbq *prspiocbq,
68876920 11851 uint32_t timeout)
dea3101e 11852{
7259f0d0 11853 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC
11854 long timeleft, timeout_req = 0;
11855 int retval = IOCB_SUCCESS;
875fbdfe 11856 uint32_t creg_val;
0e9bb8d7
JS
11857 struct lpfc_iocbq *iocb;
11858 int txq_cnt = 0;
11859 int txcmplq_cnt = 0;
895427bd 11860 struct lpfc_sli_ring *pring;
5a0916b4
JS
11861 unsigned long iflags;
11862 bool iocb_completed = true;
11863
895427bd
JS
11864 if (phba->sli_rev >= LPFC_SLI_REV4)
11865 pring = lpfc_sli4_calc_ring(phba, piocb);
11866 else
11867 pring = &phba->sli.sli3_ring[ring_number];
dea3101e 11868 /*
68876920
JSEC
11869 * If the caller has provided a response iocbq buffer, then context2
11870 * is NULL or its an error.
dea3101e 11871 */
68876920
JSEC
11872 if (prspiocbq) {
11873 if (piocb->context2)
11874 return IOCB_ERROR;
11875 piocb->context2 = prspiocbq;
dea3101e
JB
11876 }
11877
5a0916b4 11878 piocb->wait_iocb_cmpl = piocb->iocb_cmpl;
68876920
JSEC
11879 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
11880 piocb->context_un.wait_queue = &done_q;
5a0916b4 11881 piocb->iocb_flag &= ~(LPFC_IO_WAKE | LPFC_IO_WAKE_TMO);
dea3101e 11882
875fbdfe 11883 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
11884 if (lpfc_readl(phba->HCregaddr, &creg_val))
11885 return IOCB_ERROR;
875fbdfe
JSEC
11886 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
11887 writel(creg_val, phba->HCregaddr);
11888 readl(phba->HCregaddr); /* flush */
11889 }
11890
2a9bf3d0
JS
11891 retval = lpfc_sli_issue_iocb(phba, ring_number, piocb,
11892 SLI_IOCB_RET_IOCB);
68876920 11893 if (retval == IOCB_SUCCESS) {
256ec0d0 11894 timeout_req = msecs_to_jiffies(timeout * 1000);
68876920 11895 timeleft = wait_event_timeout(done_q,
d11e31dd 11896 lpfc_chk_iocb_flg(phba, piocb, LPFC_IO_WAKE),
68876920 11897 timeout_req);
5a0916b4
JS
11898 spin_lock_irqsave(&phba->hbalock, iflags);
11899 if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
11900
11901 /*
11902 * IOCB timed out. Inform the wake iocb wait
11903 * completion function and set local status
11904 */
dea3101e 11905
5a0916b4
JS
11906 iocb_completed = false;
11907 piocb->iocb_flag |= LPFC_IO_WAKE_TMO;
11908 }
11909 spin_unlock_irqrestore(&phba->hbalock, iflags);
11910 if (iocb_completed) {
7054a606 11911 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 11912 "0331 IOCB wake signaled\n");
53151bbb
JS
11913 /* Note: we are not indicating if the IOCB has a success
11914 * status or not - that's for the caller to check.
11915 * IOCB_SUCCESS means just that the command was sent and
11916 * completed. Not that it completed successfully.
11917 * */
7054a606 11918 } else if (timeleft == 0) {
68876920 11919 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
11920 "0338 IOCB wait timeout error - no "
11921 "wake response Data x%x\n", timeout);
68876920 11922 retval = IOCB_TIMEDOUT;
7054a606 11923 } else {
68876920 11924 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
11925 "0330 IOCB wake NOT set, "
11926 "Data x%x x%lx\n",
68876920
JSEC
11927 timeout, (timeleft / jiffies));
11928 retval = IOCB_TIMEDOUT;
dea3101e 11929 }
2a9bf3d0 11930 } else if (retval == IOCB_BUSY) {
0e9bb8d7
JS
11931 if (phba->cfg_log_verbose & LOG_SLI) {
11932 list_for_each_entry(iocb, &pring->txq, list) {
11933 txq_cnt++;
11934 }
11935 list_for_each_entry(iocb, &pring->txcmplq, list) {
11936 txcmplq_cnt++;
11937 }
11938 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
11939 "2818 Max IOCBs %d txq cnt %d txcmplq cnt %d\n",
11940 phba->iocb_cnt, txq_cnt, txcmplq_cnt);
11941 }
2a9bf3d0 11942 return retval;
68876920
JSEC
11943 } else {
11944 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
d7c255b2 11945 "0332 IOCB wait issue failed, Data x%x\n",
e8b62011 11946 retval);
68876920 11947 retval = IOCB_ERROR;
dea3101e
JB
11948 }
11949
875fbdfe 11950 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
11951 if (lpfc_readl(phba->HCregaddr, &creg_val))
11952 return IOCB_ERROR;
875fbdfe
JSEC
11953 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
11954 writel(creg_val, phba->HCregaddr);
11955 readl(phba->HCregaddr); /* flush */
11956 }
11957
68876920
JSEC
11958 if (prspiocbq)
11959 piocb->context2 = NULL;
11960
11961 piocb->context_un.wait_queue = NULL;
11962 piocb->iocb_cmpl = NULL;
dea3101e
JB
11963 return retval;
11964}
68876920 11965
e59058c4 11966/**
3621a710 11967 * lpfc_sli_issue_mbox_wait - Synchronous function to issue mailbox
e59058c4
JS
11968 * @phba: Pointer to HBA context object.
11969 * @pmboxq: Pointer to driver mailbox object.
11970 * @timeout: Timeout in number of seconds.
11971 *
11972 * This function issues the mailbox to firmware and waits for the
11973 * mailbox command to complete. If the mailbox command is not
11974 * completed within timeout seconds, it returns MBX_TIMEOUT.
11975 * The function waits for the mailbox completion using an
11976 * interruptible wait. If the thread is woken up due to a
11977 * signal, MBX_TIMEOUT error is returned to the caller. Caller
11978 * should not free the mailbox resources, if this function returns
11979 * MBX_TIMEOUT.
11980 * This function will sleep while waiting for mailbox completion.
11981 * So, this function should not be called from any context which
11982 * does not allow sleeping. Due to the same reason, this function
11983 * cannot be called with interrupt disabled.
11984 * This function assumes that the mailbox completion occurs while
11985 * this function sleep. So, this function cannot be called from
11986 * the worker thread which processes mailbox completion.
11987 * This function is called in the context of HBA management
11988 * applications.
11989 * This function returns MBX_SUCCESS when successful.
11990 * This function is called with no lock held.
11991 **/
dea3101e 11992int
2e0fef85 11993lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB
11994 uint32_t timeout)
11995{
e29d74f8 11996 struct completion mbox_done;
dea3101e 11997 int retval;
858c9f6c 11998 unsigned long flag;
dea3101e 11999
495a714c 12000 pmboxq->mbox_flag &= ~LPFC_MBX_WAKE;
dea3101e
JB
12001 /* setup wake call as IOCB callback */
12002 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
dea3101e 12003
e29d74f8
JS
12004 /* setup context3 field to pass wait_queue pointer to wake function */
12005 init_completion(&mbox_done);
12006 pmboxq->context3 = &mbox_done;
dea3101e
JB
12007 /* now issue the command */
12008 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
dea3101e 12009 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
e29d74f8
JS
12010 wait_for_completion_timeout(&mbox_done,
12011 msecs_to_jiffies(timeout * 1000));
7054a606 12012
858c9f6c 12013 spin_lock_irqsave(&phba->hbalock, flag);
e29d74f8 12014 pmboxq->context3 = NULL;
7054a606
JS
12015 /*
12016 * if LPFC_MBX_WAKE flag is set the mailbox is completed
12017 * else do not free the resources.
12018 */
d7c47992 12019 if (pmboxq->mbox_flag & LPFC_MBX_WAKE) {
dea3101e 12020 retval = MBX_SUCCESS;
d7c47992 12021 } else {
7054a606 12022 retval = MBX_TIMEOUT;
858c9f6c
JS
12023 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
12024 }
12025 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e 12026 }
dea3101e
JB
12027 return retval;
12028}
12029
e59058c4 12030/**
3772a991 12031 * lpfc_sli_mbox_sys_shutdown - shutdown mailbox command sub-system
e59058c4
JS
12032 * @phba: Pointer to HBA context.
12033 *
3772a991
JS
12034 * This function is called to shutdown the driver's mailbox sub-system.
12035 * It first marks the mailbox sub-system is in a block state to prevent
12036 * the asynchronous mailbox command from issued off the pending mailbox
12037 * command queue. If the mailbox command sub-system shutdown is due to
12038 * HBA error conditions such as EEH or ERATT, this routine shall invoke
12039 * the mailbox sub-system flush routine to forcefully bring down the
12040 * mailbox sub-system. Otherwise, if it is due to normal condition (such
12041 * as with offline or HBA function reset), this routine will wait for the
12042 * outstanding mailbox command to complete before invoking the mailbox
12043 * sub-system flush routine to gracefully bring down mailbox sub-system.
e59058c4 12044 **/
3772a991 12045void
618a5230 12046lpfc_sli_mbox_sys_shutdown(struct lpfc_hba *phba, int mbx_action)
b4c02652 12047{
3772a991 12048 struct lpfc_sli *psli = &phba->sli;
3772a991 12049 unsigned long timeout;
b4c02652 12050
618a5230
JS
12051 if (mbx_action == LPFC_MBX_NO_WAIT) {
12052 /* delay 100ms for port state */
12053 msleep(100);
12054 lpfc_sli_mbox_sys_flush(phba);
12055 return;
12056 }
a183a15f 12057 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
d7069f09 12058
523128e5
JS
12059 /* Disable softirqs, including timers from obtaining phba->hbalock */
12060 local_bh_disable();
12061
3772a991
JS
12062 spin_lock_irq(&phba->hbalock);
12063 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
b4c02652 12064
3772a991 12065 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
3772a991
JS
12066 /* Determine how long we might wait for the active mailbox
12067 * command to be gracefully completed by firmware.
12068 */
a183a15f
JS
12069 if (phba->sli.mbox_active)
12070 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
12071 phba->sli.mbox_active) *
12072 1000) + jiffies;
12073 spin_unlock_irq(&phba->hbalock);
12074
523128e5
JS
12075 /* Enable softirqs again, done with phba->hbalock */
12076 local_bh_enable();
12077
3772a991
JS
12078 while (phba->sli.mbox_active) {
12079 /* Check active mailbox complete status every 2ms */
12080 msleep(2);
12081 if (time_after(jiffies, timeout))
12082 /* Timeout, let the mailbox flush routine to
12083 * forcefully release active mailbox command
12084 */
12085 break;
12086 }
523128e5 12087 } else {
d7069f09
JS
12088 spin_unlock_irq(&phba->hbalock);
12089
523128e5
JS
12090 /* Enable softirqs again, done with phba->hbalock */
12091 local_bh_enable();
12092 }
12093
3772a991
JS
12094 lpfc_sli_mbox_sys_flush(phba);
12095}
ed957684 12096
3772a991
JS
12097/**
12098 * lpfc_sli_eratt_read - read sli-3 error attention events
12099 * @phba: Pointer to HBA context.
12100 *
12101 * This function is called to read the SLI3 device error attention registers
12102 * for possible error attention events. The caller must hold the hostlock
12103 * with spin_lock_irq().
12104 *
25985edc 12105 * This function returns 1 when there is Error Attention in the Host Attention
3772a991
JS
12106 * Register and returns 0 otherwise.
12107 **/
12108static int
12109lpfc_sli_eratt_read(struct lpfc_hba *phba)
12110{
12111 uint32_t ha_copy;
b4c02652 12112
3772a991 12113 /* Read chip Host Attention (HA) register */
9940b97b
JS
12114 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12115 goto unplug_err;
12116
3772a991
JS
12117 if (ha_copy & HA_ERATT) {
12118 /* Read host status register to retrieve error event */
9940b97b
JS
12119 if (lpfc_sli_read_hs(phba))
12120 goto unplug_err;
b4c02652 12121
3772a991
JS
12122 /* Check if there is a deferred error condition is active */
12123 if ((HS_FFER1 & phba->work_hs) &&
12124 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0 12125 HS_FFER6 | HS_FFER7 | HS_FFER8) & phba->work_hs)) {
3772a991 12126 phba->hba_flag |= DEFER_ERATT;
3772a991
JS
12127 /* Clear all interrupt enable conditions */
12128 writel(0, phba->HCregaddr);
12129 readl(phba->HCregaddr);
12130 }
12131
12132 /* Set the driver HA work bitmap */
3772a991
JS
12133 phba->work_ha |= HA_ERATT;
12134 /* Indicate polling handles this ERATT */
12135 phba->hba_flag |= HBA_ERATT_HANDLED;
3772a991
JS
12136 return 1;
12137 }
12138 return 0;
9940b97b
JS
12139
12140unplug_err:
12141 /* Set the driver HS work bitmap */
12142 phba->work_hs |= UNPLUG_ERR;
12143 /* Set the driver HA work bitmap */
12144 phba->work_ha |= HA_ERATT;
12145 /* Indicate polling handles this ERATT */
12146 phba->hba_flag |= HBA_ERATT_HANDLED;
12147 return 1;
b4c02652
JS
12148}
12149
da0436e9
JS
12150/**
12151 * lpfc_sli4_eratt_read - read sli-4 error attention events
12152 * @phba: Pointer to HBA context.
12153 *
12154 * This function is called to read the SLI4 device error attention registers
12155 * for possible error attention events. The caller must hold the hostlock
12156 * with spin_lock_irq().
12157 *
25985edc 12158 * This function returns 1 when there is Error Attention in the Host Attention
da0436e9
JS
12159 * Register and returns 0 otherwise.
12160 **/
12161static int
12162lpfc_sli4_eratt_read(struct lpfc_hba *phba)
12163{
12164 uint32_t uerr_sta_hi, uerr_sta_lo;
2fcee4bf
JS
12165 uint32_t if_type, portsmphr;
12166 struct lpfc_register portstat_reg;
da0436e9 12167
2fcee4bf
JS
12168 /*
12169 * For now, use the SLI4 device internal unrecoverable error
da0436e9
JS
12170 * registers for error attention. This can be changed later.
12171 */
2fcee4bf
JS
12172 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12173 switch (if_type) {
12174 case LPFC_SLI_INTF_IF_TYPE_0:
9940b97b
JS
12175 if (lpfc_readl(phba->sli4_hba.u.if_type0.UERRLOregaddr,
12176 &uerr_sta_lo) ||
12177 lpfc_readl(phba->sli4_hba.u.if_type0.UERRHIregaddr,
12178 &uerr_sta_hi)) {
12179 phba->work_hs |= UNPLUG_ERR;
12180 phba->work_ha |= HA_ERATT;
12181 phba->hba_flag |= HBA_ERATT_HANDLED;
12182 return 1;
12183 }
2fcee4bf
JS
12184 if ((~phba->sli4_hba.ue_mask_lo & uerr_sta_lo) ||
12185 (~phba->sli4_hba.ue_mask_hi & uerr_sta_hi)) {
12186 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12187 "1423 HBA Unrecoverable error: "
12188 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, "
12189 "ue_mask_lo_reg=0x%x, "
12190 "ue_mask_hi_reg=0x%x\n",
12191 uerr_sta_lo, uerr_sta_hi,
12192 phba->sli4_hba.ue_mask_lo,
12193 phba->sli4_hba.ue_mask_hi);
12194 phba->work_status[0] = uerr_sta_lo;
12195 phba->work_status[1] = uerr_sta_hi;
12196 phba->work_ha |= HA_ERATT;
12197 phba->hba_flag |= HBA_ERATT_HANDLED;
12198 return 1;
12199 }
12200 break;
12201 case LPFC_SLI_INTF_IF_TYPE_2:
27d6ac0a 12202 case LPFC_SLI_INTF_IF_TYPE_6:
9940b97b
JS
12203 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
12204 &portstat_reg.word0) ||
12205 lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
12206 &portsmphr)){
12207 phba->work_hs |= UNPLUG_ERR;
12208 phba->work_ha |= HA_ERATT;
12209 phba->hba_flag |= HBA_ERATT_HANDLED;
12210 return 1;
12211 }
2fcee4bf
JS
12212 if (bf_get(lpfc_sliport_status_err, &portstat_reg)) {
12213 phba->work_status[0] =
12214 readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
12215 phba->work_status[1] =
12216 readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
12217 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2e90f4b5 12218 "2885 Port Status Event: "
2fcee4bf
JS
12219 "port status reg 0x%x, "
12220 "port smphr reg 0x%x, "
12221 "error 1=0x%x, error 2=0x%x\n",
12222 portstat_reg.word0,
12223 portsmphr,
12224 phba->work_status[0],
12225 phba->work_status[1]);
12226 phba->work_ha |= HA_ERATT;
12227 phba->hba_flag |= HBA_ERATT_HANDLED;
12228 return 1;
12229 }
12230 break;
12231 case LPFC_SLI_INTF_IF_TYPE_1:
12232 default:
a747c9ce 12233 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
12234 "2886 HBA Error Attention on unsupported "
12235 "if type %d.", if_type);
a747c9ce 12236 return 1;
da0436e9 12237 }
2fcee4bf 12238
da0436e9
JS
12239 return 0;
12240}
12241
e59058c4 12242/**
3621a710 12243 * lpfc_sli_check_eratt - check error attention events
9399627f
JS
12244 * @phba: Pointer to HBA context.
12245 *
3772a991 12246 * This function is called from timer soft interrupt context to check HBA's
9399627f
JS
12247 * error attention register bit for error attention events.
12248 *
25985edc 12249 * This function returns 1 when there is Error Attention in the Host Attention
9399627f
JS
12250 * Register and returns 0 otherwise.
12251 **/
12252int
12253lpfc_sli_check_eratt(struct lpfc_hba *phba)
12254{
12255 uint32_t ha_copy;
12256
12257 /* If somebody is waiting to handle an eratt, don't process it
12258 * here. The brdkill function will do this.
12259 */
12260 if (phba->link_flag & LS_IGNORE_ERATT)
12261 return 0;
12262
12263 /* Check if interrupt handler handles this ERATT */
12264 spin_lock_irq(&phba->hbalock);
12265 if (phba->hba_flag & HBA_ERATT_HANDLED) {
12266 /* Interrupt handler has handled ERATT */
12267 spin_unlock_irq(&phba->hbalock);
12268 return 0;
12269 }
12270
a257bf90
JS
12271 /*
12272 * If there is deferred error attention, do not check for error
12273 * attention
12274 */
12275 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
12276 spin_unlock_irq(&phba->hbalock);
12277 return 0;
12278 }
12279
3772a991
JS
12280 /* If PCI channel is offline, don't process it */
12281 if (unlikely(pci_channel_offline(phba->pcidev))) {
9399627f 12282 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12283 return 0;
12284 }
12285
12286 switch (phba->sli_rev) {
12287 case LPFC_SLI_REV2:
12288 case LPFC_SLI_REV3:
12289 /* Read chip Host Attention (HA) register */
12290 ha_copy = lpfc_sli_eratt_read(phba);
12291 break;
da0436e9 12292 case LPFC_SLI_REV4:
2fcee4bf 12293 /* Read device Uncoverable Error (UERR) registers */
da0436e9
JS
12294 ha_copy = lpfc_sli4_eratt_read(phba);
12295 break;
3772a991
JS
12296 default:
12297 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12298 "0299 Invalid SLI revision (%d)\n",
12299 phba->sli_rev);
12300 ha_copy = 0;
12301 break;
9399627f
JS
12302 }
12303 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12304
12305 return ha_copy;
12306}
12307
12308/**
12309 * lpfc_intr_state_check - Check device state for interrupt handling
12310 * @phba: Pointer to HBA context.
12311 *
12312 * This inline routine checks whether a device or its PCI slot is in a state
12313 * that the interrupt should be handled.
12314 *
12315 * This function returns 0 if the device or the PCI slot is in a state that
12316 * interrupt should be handled, otherwise -EIO.
12317 */
12318static inline int
12319lpfc_intr_state_check(struct lpfc_hba *phba)
12320{
12321 /* If the pci channel is offline, ignore all the interrupts */
12322 if (unlikely(pci_channel_offline(phba->pcidev)))
12323 return -EIO;
12324
12325 /* Update device level interrupt statistics */
12326 phba->sli.slistat.sli_intr++;
12327
12328 /* Ignore all interrupts during initialization. */
12329 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
12330 return -EIO;
12331
9399627f
JS
12332 return 0;
12333}
12334
12335/**
3772a991 12336 * lpfc_sli_sp_intr_handler - Slow-path interrupt handler to SLI-3 device
e59058c4
JS
12337 * @irq: Interrupt number.
12338 * @dev_id: The device context pointer.
12339 *
9399627f 12340 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12341 * service routine when device with SLI-3 interface spec is enabled with
12342 * MSI-X multi-message interrupt mode and there are slow-path events in
12343 * the HBA. However, when the device is enabled with either MSI or Pin-IRQ
12344 * interrupt mode, this function is called as part of the device-level
12345 * interrupt handler. When the PCI slot is in error recovery or the HBA
12346 * is undergoing initialization, the interrupt handler will not process
12347 * the interrupt. The link attention and ELS ring attention events are
12348 * handled by the worker thread. The interrupt handler signals the worker
12349 * thread and returns for these events. This function is called without
12350 * any lock held. It gets the hbalock to access and update SLI data
9399627f
JS
12351 * structures.
12352 *
12353 * This function returns IRQ_HANDLED when interrupt is handled else it
12354 * returns IRQ_NONE.
e59058c4 12355 **/
dea3101e 12356irqreturn_t
3772a991 12357lpfc_sli_sp_intr_handler(int irq, void *dev_id)
dea3101e 12358{
2e0fef85 12359 struct lpfc_hba *phba;
a747c9ce 12360 uint32_t ha_copy, hc_copy;
dea3101e
JB
12361 uint32_t work_ha_copy;
12362 unsigned long status;
5b75da2f 12363 unsigned long iflag;
dea3101e
JB
12364 uint32_t control;
12365
92d7f7b0 12366 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS
12367 struct lpfc_vport *vport;
12368 struct lpfc_nodelist *ndlp;
12369 struct lpfc_dmabuf *mp;
92d7f7b0
JS
12370 LPFC_MBOXQ_t *pmb;
12371 int rc;
12372
dea3101e
JB
12373 /*
12374 * Get the driver's phba structure from the dev_id and
12375 * assume the HBA is not interrupting.
12376 */
9399627f 12377 phba = (struct lpfc_hba *)dev_id;
dea3101e
JB
12378
12379 if (unlikely(!phba))
12380 return IRQ_NONE;
12381
dea3101e 12382 /*
9399627f
JS
12383 * Stuff needs to be attented to when this function is invoked as an
12384 * individual interrupt handler in MSI-X multi-message interrupt mode
dea3101e 12385 */
9399627f 12386 if (phba->intr_type == MSIX) {
3772a991
JS
12387 /* Check device state for handling interrupt */
12388 if (lpfc_intr_state_check(phba))
9399627f
JS
12389 return IRQ_NONE;
12390 /* Need to read HA REG for slow-path events */
5b75da2f 12391 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12392 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12393 goto unplug_error;
9399627f
JS
12394 /* If somebody is waiting to handle an eratt don't process it
12395 * here. The brdkill function will do this.
12396 */
12397 if (phba->link_flag & LS_IGNORE_ERATT)
12398 ha_copy &= ~HA_ERATT;
12399 /* Check the need for handling ERATT in interrupt handler */
12400 if (ha_copy & HA_ERATT) {
12401 if (phba->hba_flag & HBA_ERATT_HANDLED)
12402 /* ERATT polling has handled ERATT */
12403 ha_copy &= ~HA_ERATT;
12404 else
12405 /* Indicate interrupt handler handles ERATT */
12406 phba->hba_flag |= HBA_ERATT_HANDLED;
12407 }
a257bf90
JS
12408
12409 /*
12410 * If there is deferred error attention, do not check for any
12411 * interrupt.
12412 */
12413 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12414 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12415 return IRQ_NONE;
12416 }
12417
9399627f 12418 /* Clear up only attention source related to slow-path */
9940b97b
JS
12419 if (lpfc_readl(phba->HCregaddr, &hc_copy))
12420 goto unplug_error;
12421
a747c9ce
JS
12422 writel(hc_copy & ~(HC_MBINT_ENA | HC_R2INT_ENA |
12423 HC_LAINT_ENA | HC_ERINT_ENA),
12424 phba->HCregaddr);
9399627f
JS
12425 writel((ha_copy & (HA_MBATT | HA_R2_CLR_MSK)),
12426 phba->HAregaddr);
a747c9ce 12427 writel(hc_copy, phba->HCregaddr);
9399627f 12428 readl(phba->HAregaddr); /* flush */
5b75da2f 12429 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12430 } else
12431 ha_copy = phba->ha_copy;
dea3101e 12432
dea3101e
JB
12433 work_ha_copy = ha_copy & phba->work_ha_mask;
12434
9399627f 12435 if (work_ha_copy) {
dea3101e
JB
12436 if (work_ha_copy & HA_LATT) {
12437 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
12438 /*
12439 * Turn off Link Attention interrupts
12440 * until CLEAR_LA done
12441 */
5b75da2f 12442 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12443 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
9940b97b
JS
12444 if (lpfc_readl(phba->HCregaddr, &control))
12445 goto unplug_error;
dea3101e
JB
12446 control &= ~HC_LAINT_ENA;
12447 writel(control, phba->HCregaddr);
12448 readl(phba->HCregaddr); /* flush */
5b75da2f 12449 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12450 }
12451 else
12452 work_ha_copy &= ~HA_LATT;
12453 }
12454
9399627f 12455 if (work_ha_copy & ~(HA_ERATT | HA_MBATT | HA_LATT)) {
858c9f6c
JS
12456 /*
12457 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
12458 * the only slow ring.
12459 */
12460 status = (work_ha_copy &
12461 (HA_RXMASK << (4*LPFC_ELS_RING)));
12462 status >>= (4*LPFC_ELS_RING);
12463 if (status & HA_RXMASK) {
5b75da2f 12464 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12465 if (lpfc_readl(phba->HCregaddr, &control))
12466 goto unplug_error;
a58cbd52
JS
12467
12468 lpfc_debugfs_slow_ring_trc(phba,
12469 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
12470 control, status,
12471 (uint32_t)phba->sli.slistat.sli_intr);
12472
858c9f6c 12473 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS
12474 lpfc_debugfs_slow_ring_trc(phba,
12475 "ISR Disable ring:"
12476 "pwork:x%x hawork:x%x wait:x%x",
12477 phba->work_ha, work_ha_copy,
12478 (uint32_t)((unsigned long)
5e9d9b82 12479 &phba->work_waitq));
a58cbd52 12480
858c9f6c
JS
12481 control &=
12482 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB
12483 writel(control, phba->HCregaddr);
12484 readl(phba->HCregaddr); /* flush */
dea3101e 12485 }
a58cbd52
JS
12486 else {
12487 lpfc_debugfs_slow_ring_trc(phba,
12488 "ISR slow ring: pwork:"
12489 "x%x hawork:x%x wait:x%x",
12490 phba->work_ha, work_ha_copy,
12491 (uint32_t)((unsigned long)
5e9d9b82 12492 &phba->work_waitq));
a58cbd52 12493 }
5b75da2f 12494 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12495 }
12496 }
5b75da2f 12497 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90 12498 if (work_ha_copy & HA_ERATT) {
9940b97b
JS
12499 if (lpfc_sli_read_hs(phba))
12500 goto unplug_error;
a257bf90
JS
12501 /*
12502 * Check if there is a deferred error condition
12503 * is active
12504 */
12505 if ((HS_FFER1 & phba->work_hs) &&
12506 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0
JS
12507 HS_FFER6 | HS_FFER7 | HS_FFER8) &
12508 phba->work_hs)) {
a257bf90
JS
12509 phba->hba_flag |= DEFER_ERATT;
12510 /* Clear all interrupt enable conditions */
12511 writel(0, phba->HCregaddr);
12512 readl(phba->HCregaddr);
12513 }
12514 }
12515
9399627f 12516 if ((work_ha_copy & HA_MBATT) && (phba->sli.mbox_active)) {
92d7f7b0 12517 pmb = phba->sli.mbox_active;
04c68496 12518 pmbox = &pmb->u.mb;
34b02dcd 12519 mbox = phba->mbox;
858c9f6c 12520 vport = pmb->vport;
92d7f7b0
JS
12521
12522 /* First check out the status word */
12523 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
12524 if (pmbox->mbxOwner != OWN_HOST) {
5b75da2f 12525 spin_unlock_irqrestore(&phba->hbalock, iflag);
92d7f7b0
JS
12526 /*
12527 * Stray Mailbox Interrupt, mbxCommand <cmd>
12528 * mbxStatus <status>
12529 */
09372820 12530 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
92d7f7b0 12531 LOG_SLI,
e8b62011 12532 "(%d):0304 Stray Mailbox "
92d7f7b0
JS
12533 "Interrupt mbxCommand x%x "
12534 "mbxStatus x%x\n",
e8b62011 12535 (vport ? vport->vpi : 0),
92d7f7b0
JS
12536 pmbox->mbxCommand,
12537 pmbox->mbxStatus);
09372820
JS
12538 /* clear mailbox attention bit */
12539 work_ha_copy &= ~HA_MBATT;
12540 } else {
97eab634 12541 phba->sli.mbox_active = NULL;
5b75da2f 12542 spin_unlock_irqrestore(&phba->hbalock, iflag);
09372820
JS
12543 phba->last_completion_time = jiffies;
12544 del_timer(&phba->sli.mbox_tmo);
09372820
JS
12545 if (pmb->mbox_cmpl) {
12546 lpfc_sli_pcimem_bcopy(mbox, pmbox,
12547 MAILBOX_CMD_SIZE);
7a470277
JS
12548 if (pmb->out_ext_byte_len &&
12549 pmb->context2)
12550 lpfc_sli_pcimem_bcopy(
12551 phba->mbox_ext,
12552 pmb->context2,
12553 pmb->out_ext_byte_len);
09372820
JS
12554 }
12555 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
12556 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
12557
12558 lpfc_debugfs_disc_trc(vport,
12559 LPFC_DISC_TRC_MBOX_VPORT,
12560 "MBOX dflt rpi: : "
12561 "status:x%x rpi:x%x",
12562 (uint32_t)pmbox->mbxStatus,
12563 pmbox->un.varWords[0], 0);
12564
12565 if (!pmbox->mbxStatus) {
12566 mp = (struct lpfc_dmabuf *)
12567 (pmb->context1);
12568 ndlp = (struct lpfc_nodelist *)
12569 pmb->context2;
12570
12571 /* Reg_LOGIN of dflt RPI was
12572 * successful. new lets get
12573 * rid of the RPI using the
12574 * same mbox buffer.
12575 */
12576 lpfc_unreg_login(phba,
12577 vport->vpi,
12578 pmbox->un.varWords[0],
12579 pmb);
12580 pmb->mbox_cmpl =
12581 lpfc_mbx_cmpl_dflt_rpi;
12582 pmb->context1 = mp;
12583 pmb->context2 = ndlp;
12584 pmb->vport = vport;
58da1ffb
JS
12585 rc = lpfc_sli_issue_mbox(phba,
12586 pmb,
12587 MBX_NOWAIT);
12588 if (rc != MBX_BUSY)
12589 lpfc_printf_log(phba,
12590 KERN_ERR,
12591 LOG_MBOX | LOG_SLI,
d7c255b2 12592 "0350 rc should have"
6a9c52cf 12593 "been MBX_BUSY\n");
3772a991
JS
12594 if (rc != MBX_NOT_FINISHED)
12595 goto send_current_mbox;
09372820 12596 }
858c9f6c 12597 }
5b75da2f
JS
12598 spin_lock_irqsave(
12599 &phba->pport->work_port_lock,
12600 iflag);
09372820
JS
12601 phba->pport->work_port_events &=
12602 ~WORKER_MBOX_TMO;
5b75da2f
JS
12603 spin_unlock_irqrestore(
12604 &phba->pport->work_port_lock,
12605 iflag);
09372820 12606 lpfc_mbox_cmpl_put(phba, pmb);
858c9f6c 12607 }
97eab634 12608 } else
5b75da2f 12609 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f 12610
92d7f7b0
JS
12611 if ((work_ha_copy & HA_MBATT) &&
12612 (phba->sli.mbox_active == NULL)) {
858c9f6c 12613send_current_mbox:
92d7f7b0 12614 /* Process next mailbox command if there is one */
58da1ffb
JS
12615 do {
12616 rc = lpfc_sli_issue_mbox(phba, NULL,
12617 MBX_NOWAIT);
12618 } while (rc == MBX_NOT_FINISHED);
12619 if (rc != MBX_SUCCESS)
12620 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
12621 LOG_SLI, "0349 rc should be "
6a9c52cf 12622 "MBX_SUCCESS\n");
92d7f7b0
JS
12623 }
12624
5b75da2f 12625 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12626 phba->work_ha |= work_ha_copy;
5b75da2f 12627 spin_unlock_irqrestore(&phba->hbalock, iflag);
5e9d9b82 12628 lpfc_worker_wake_up(phba);
dea3101e 12629 }
9399627f 12630 return IRQ_HANDLED;
9940b97b
JS
12631unplug_error:
12632 spin_unlock_irqrestore(&phba->hbalock, iflag);
12633 return IRQ_HANDLED;
dea3101e 12634
3772a991 12635} /* lpfc_sli_sp_intr_handler */
9399627f
JS
12636
12637/**
3772a991 12638 * lpfc_sli_fp_intr_handler - Fast-path interrupt handler to SLI-3 device.
9399627f
JS
12639 * @irq: Interrupt number.
12640 * @dev_id: The device context pointer.
12641 *
12642 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12643 * service routine when device with SLI-3 interface spec is enabled with
12644 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
12645 * ring event in the HBA. However, when the device is enabled with either
12646 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
12647 * device-level interrupt handler. When the PCI slot is in error recovery
12648 * or the HBA is undergoing initialization, the interrupt handler will not
12649 * process the interrupt. The SCSI FCP fast-path ring event are handled in
12650 * the intrrupt context. This function is called without any lock held.
12651 * It gets the hbalock to access and update SLI data structures.
9399627f
JS
12652 *
12653 * This function returns IRQ_HANDLED when interrupt is handled else it
12654 * returns IRQ_NONE.
12655 **/
12656irqreturn_t
3772a991 12657lpfc_sli_fp_intr_handler(int irq, void *dev_id)
9399627f
JS
12658{
12659 struct lpfc_hba *phba;
12660 uint32_t ha_copy;
12661 unsigned long status;
5b75da2f 12662 unsigned long iflag;
895427bd 12663 struct lpfc_sli_ring *pring;
9399627f
JS
12664
12665 /* Get the driver's phba structure from the dev_id and
12666 * assume the HBA is not interrupting.
12667 */
12668 phba = (struct lpfc_hba *) dev_id;
12669
12670 if (unlikely(!phba))
12671 return IRQ_NONE;
12672
12673 /*
12674 * Stuff needs to be attented to when this function is invoked as an
12675 * individual interrupt handler in MSI-X multi-message interrupt mode
12676 */
12677 if (phba->intr_type == MSIX) {
3772a991
JS
12678 /* Check device state for handling interrupt */
12679 if (lpfc_intr_state_check(phba))
9399627f
JS
12680 return IRQ_NONE;
12681 /* Need to read HA REG for FCP ring and other ring events */
9940b97b
JS
12682 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12683 return IRQ_HANDLED;
9399627f 12684 /* Clear up only attention source related to fast-path */
5b75da2f 12685 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90
JS
12686 /*
12687 * If there is deferred error attention, do not check for
12688 * any interrupt.
12689 */
12690 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12691 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12692 return IRQ_NONE;
12693 }
9399627f
JS
12694 writel((ha_copy & (HA_R0_CLR_MSK | HA_R1_CLR_MSK)),
12695 phba->HAregaddr);
12696 readl(phba->HAregaddr); /* flush */
5b75da2f 12697 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12698 } else
12699 ha_copy = phba->ha_copy;
dea3101e
JB
12700
12701 /*
9399627f 12702 * Process all events on FCP ring. Take the optimized path for FCP IO.
dea3101e 12703 */
9399627f
JS
12704 ha_copy &= ~(phba->work_ha_mask);
12705
12706 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
dea3101e 12707 status >>= (4*LPFC_FCP_RING);
895427bd 12708 pring = &phba->sli.sli3_ring[LPFC_FCP_RING];
858c9f6c 12709 if (status & HA_RXMASK)
895427bd 12710 lpfc_sli_handle_fast_ring_event(phba, pring, status);
a4bc3379
JS
12711
12712 if (phba->cfg_multi_ring_support == 2) {
12713 /*
9399627f
JS
12714 * Process all events on extra ring. Take the optimized path
12715 * for extra ring IO.
a4bc3379 12716 */
9399627f 12717 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
a4bc3379 12718 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 12719 if (status & HA_RXMASK) {
a4bc3379 12720 lpfc_sli_handle_fast_ring_event(phba,
895427bd 12721 &phba->sli.sli3_ring[LPFC_EXTRA_RING],
a4bc3379
JS
12722 status);
12723 }
12724 }
dea3101e 12725 return IRQ_HANDLED;
3772a991 12726} /* lpfc_sli_fp_intr_handler */
9399627f
JS
12727
12728/**
3772a991 12729 * lpfc_sli_intr_handler - Device-level interrupt handler to SLI-3 device
9399627f
JS
12730 * @irq: Interrupt number.
12731 * @dev_id: The device context pointer.
12732 *
3772a991
JS
12733 * This function is the HBA device-level interrupt handler to device with
12734 * SLI-3 interface spec, called from the PCI layer when either MSI or
12735 * Pin-IRQ interrupt mode is enabled and there is an event in the HBA which
12736 * requires driver attention. This function invokes the slow-path interrupt
12737 * attention handling function and fast-path interrupt attention handling
12738 * function in turn to process the relevant HBA attention events. This
12739 * function is called without any lock held. It gets the hbalock to access
12740 * and update SLI data structures.
9399627f
JS
12741 *
12742 * This function returns IRQ_HANDLED when interrupt is handled, else it
12743 * returns IRQ_NONE.
12744 **/
12745irqreturn_t
3772a991 12746lpfc_sli_intr_handler(int irq, void *dev_id)
9399627f
JS
12747{
12748 struct lpfc_hba *phba;
12749 irqreturn_t sp_irq_rc, fp_irq_rc;
12750 unsigned long status1, status2;
a747c9ce 12751 uint32_t hc_copy;
9399627f
JS
12752
12753 /*
12754 * Get the driver's phba structure from the dev_id and
12755 * assume the HBA is not interrupting.
12756 */
12757 phba = (struct lpfc_hba *) dev_id;
12758
12759 if (unlikely(!phba))
12760 return IRQ_NONE;
12761
3772a991
JS
12762 /* Check device state for handling interrupt */
12763 if (lpfc_intr_state_check(phba))
9399627f
JS
12764 return IRQ_NONE;
12765
12766 spin_lock(&phba->hbalock);
9940b97b
JS
12767 if (lpfc_readl(phba->HAregaddr, &phba->ha_copy)) {
12768 spin_unlock(&phba->hbalock);
12769 return IRQ_HANDLED;
12770 }
12771
9399627f
JS
12772 if (unlikely(!phba->ha_copy)) {
12773 spin_unlock(&phba->hbalock);
12774 return IRQ_NONE;
12775 } else if (phba->ha_copy & HA_ERATT) {
12776 if (phba->hba_flag & HBA_ERATT_HANDLED)
12777 /* ERATT polling has handled ERATT */
12778 phba->ha_copy &= ~HA_ERATT;
12779 else
12780 /* Indicate interrupt handler handles ERATT */
12781 phba->hba_flag |= HBA_ERATT_HANDLED;
12782 }
12783
a257bf90
JS
12784 /*
12785 * If there is deferred error attention, do not check for any interrupt.
12786 */
12787 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
ec21b3b0 12788 spin_unlock(&phba->hbalock);
a257bf90
JS
12789 return IRQ_NONE;
12790 }
12791
9399627f 12792 /* Clear attention sources except link and error attentions */
9940b97b
JS
12793 if (lpfc_readl(phba->HCregaddr, &hc_copy)) {
12794 spin_unlock(&phba->hbalock);
12795 return IRQ_HANDLED;
12796 }
a747c9ce
JS
12797 writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA
12798 | HC_R2INT_ENA | HC_LAINT_ENA | HC_ERINT_ENA),
12799 phba->HCregaddr);
9399627f 12800 writel((phba->ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
a747c9ce 12801 writel(hc_copy, phba->HCregaddr);
9399627f
JS
12802 readl(phba->HAregaddr); /* flush */
12803 spin_unlock(&phba->hbalock);
12804
12805 /*
12806 * Invokes slow-path host attention interrupt handling as appropriate.
12807 */
12808
12809 /* status of events with mailbox and link attention */
12810 status1 = phba->ha_copy & (HA_MBATT | HA_LATT | HA_ERATT);
12811
12812 /* status of events with ELS ring */
12813 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_ELS_RING)));
12814 status2 >>= (4*LPFC_ELS_RING);
12815
12816 if (status1 || (status2 & HA_RXMASK))
3772a991 12817 sp_irq_rc = lpfc_sli_sp_intr_handler(irq, dev_id);
9399627f
JS
12818 else
12819 sp_irq_rc = IRQ_NONE;
12820
12821 /*
12822 * Invoke fast-path host attention interrupt handling as appropriate.
12823 */
12824
12825 /* status of events with FCP ring */
12826 status1 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
12827 status1 >>= (4*LPFC_FCP_RING);
12828
12829 /* status of events with extra ring */
12830 if (phba->cfg_multi_ring_support == 2) {
12831 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
12832 status2 >>= (4*LPFC_EXTRA_RING);
12833 } else
12834 status2 = 0;
12835
12836 if ((status1 & HA_RXMASK) || (status2 & HA_RXMASK))
3772a991 12837 fp_irq_rc = lpfc_sli_fp_intr_handler(irq, dev_id);
9399627f
JS
12838 else
12839 fp_irq_rc = IRQ_NONE;
dea3101e 12840
9399627f
JS
12841 /* Return device-level interrupt handling status */
12842 return (sp_irq_rc == IRQ_HANDLED) ? sp_irq_rc : fp_irq_rc;
3772a991 12843} /* lpfc_sli_intr_handler */
4f774513
JS
12844
12845/**
12846 * lpfc_sli4_fcp_xri_abort_event_proc - Process fcp xri abort event
12847 * @phba: pointer to lpfc hba data structure.
12848 *
12849 * This routine is invoked by the worker thread to process all the pending
12850 * SLI4 FCP abort XRI events.
12851 **/
12852void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *phba)
12853{
12854 struct lpfc_cq_event *cq_event;
12855
12856 /* First, declare the fcp xri abort event has been handled */
12857 spin_lock_irq(&phba->hbalock);
12858 phba->hba_flag &= ~FCP_XRI_ABORT_EVENT;
12859 spin_unlock_irq(&phba->hbalock);
12860 /* Now, handle all the fcp xri abort events */
12861 while (!list_empty(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue)) {
12862 /* Get the first event from the head of the event queue */
12863 spin_lock_irq(&phba->hbalock);
12864 list_remove_head(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
12865 cq_event, struct lpfc_cq_event, list);
12866 spin_unlock_irq(&phba->hbalock);
12867 /* Notify aborted XRI for FCP work queue */
12868 lpfc_sli4_fcp_xri_aborted(phba, &cq_event->cqe.wcqe_axri);
12869 /* Free the event processed back to the free pool */
12870 lpfc_sli4_cq_event_release(phba, cq_event);
12871 }
12872}
12873
12874/**
12875 * lpfc_sli4_els_xri_abort_event_proc - Process els xri abort event
12876 * @phba: pointer to lpfc hba data structure.
12877 *
12878 * This routine is invoked by the worker thread to process all the pending
12879 * SLI4 els abort xri events.
12880 **/
12881void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *phba)
12882{
12883 struct lpfc_cq_event *cq_event;
12884
12885 /* First, declare the els xri abort event has been handled */
12886 spin_lock_irq(&phba->hbalock);
12887 phba->hba_flag &= ~ELS_XRI_ABORT_EVENT;
12888 spin_unlock_irq(&phba->hbalock);
12889 /* Now, handle all the els xri abort events */
12890 while (!list_empty(&phba->sli4_hba.sp_els_xri_aborted_work_queue)) {
12891 /* Get the first event from the head of the event queue */
12892 spin_lock_irq(&phba->hbalock);
12893 list_remove_head(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
12894 cq_event, struct lpfc_cq_event, list);
12895 spin_unlock_irq(&phba->hbalock);
12896 /* Notify aborted XRI for ELS work queue */
12897 lpfc_sli4_els_xri_aborted(phba, &cq_event->cqe.wcqe_axri);
12898 /* Free the event processed back to the free pool */
12899 lpfc_sli4_cq_event_release(phba, cq_event);
12900 }
12901}
12902
341af102
JS
12903/**
12904 * lpfc_sli4_iocb_param_transfer - Transfer pIocbOut and cmpl status to pIocbIn
12905 * @phba: pointer to lpfc hba data structure
12906 * @pIocbIn: pointer to the rspiocbq
12907 * @pIocbOut: pointer to the cmdiocbq
12908 * @wcqe: pointer to the complete wcqe
12909 *
12910 * This routine transfers the fields of a command iocbq to a response iocbq
12911 * by copying all the IOCB fields from command iocbq and transferring the
12912 * completion status information from the complete wcqe.
12913 **/
4f774513 12914static void
341af102
JS
12915lpfc_sli4_iocb_param_transfer(struct lpfc_hba *phba,
12916 struct lpfc_iocbq *pIocbIn,
4f774513
JS
12917 struct lpfc_iocbq *pIocbOut,
12918 struct lpfc_wcqe_complete *wcqe)
12919{
af22741c 12920 int numBdes, i;
341af102 12921 unsigned long iflags;
af22741c
JS
12922 uint32_t status, max_response;
12923 struct lpfc_dmabuf *dmabuf;
12924 struct ulp_bde64 *bpl, bde;
4f774513
JS
12925 size_t offset = offsetof(struct lpfc_iocbq, iocb);
12926
12927 memcpy((char *)pIocbIn + offset, (char *)pIocbOut + offset,
12928 sizeof(struct lpfc_iocbq) - offset);
4f774513 12929 /* Map WCQE parameters into irspiocb parameters */
acd6859b
JS
12930 status = bf_get(lpfc_wcqe_c_status, wcqe);
12931 pIocbIn->iocb.ulpStatus = (status & LPFC_IOCB_STATUS_MASK);
4f774513
JS
12932 if (pIocbOut->iocb_flag & LPFC_IO_FCP)
12933 if (pIocbIn->iocb.ulpStatus == IOSTAT_FCP_RSP_ERROR)
12934 pIocbIn->iocb.un.fcpi.fcpi_parm =
12935 pIocbOut->iocb.un.fcpi.fcpi_parm -
12936 wcqe->total_data_placed;
12937 else
12938 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
695a814e 12939 else {
4f774513 12940 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
af22741c
JS
12941 switch (pIocbOut->iocb.ulpCommand) {
12942 case CMD_ELS_REQUEST64_CR:
12943 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
12944 bpl = (struct ulp_bde64 *)dmabuf->virt;
12945 bde.tus.w = le32_to_cpu(bpl[1].tus.w);
12946 max_response = bde.tus.f.bdeSize;
12947 break;
12948 case CMD_GEN_REQUEST64_CR:
12949 max_response = 0;
12950 if (!pIocbOut->context3)
12951 break;
12952 numBdes = pIocbOut->iocb.un.genreq64.bdl.bdeSize/
12953 sizeof(struct ulp_bde64);
12954 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
12955 bpl = (struct ulp_bde64 *)dmabuf->virt;
12956 for (i = 0; i < numBdes; i++) {
12957 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
12958 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
12959 max_response += bde.tus.f.bdeSize;
12960 }
12961 break;
12962 default:
12963 max_response = wcqe->total_data_placed;
12964 break;
12965 }
12966 if (max_response < wcqe->total_data_placed)
12967 pIocbIn->iocb.un.genreq64.bdl.bdeSize = max_response;
12968 else
12969 pIocbIn->iocb.un.genreq64.bdl.bdeSize =
12970 wcqe->total_data_placed;
695a814e 12971 }
341af102 12972
acd6859b
JS
12973 /* Convert BG errors for completion status */
12974 if (status == CQE_STATUS_DI_ERROR) {
12975 pIocbIn->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
12976
12977 if (bf_get(lpfc_wcqe_c_bg_edir, wcqe))
12978 pIocbIn->iocb.un.ulpWord[4] = IOERR_RX_DMA_FAILED;
12979 else
12980 pIocbIn->iocb.un.ulpWord[4] = IOERR_TX_DMA_FAILED;
12981
12982 pIocbIn->iocb.unsli3.sli3_bg.bgstat = 0;
12983 if (bf_get(lpfc_wcqe_c_bg_ge, wcqe)) /* Guard Check failed */
12984 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12985 BGS_GUARD_ERR_MASK;
12986 if (bf_get(lpfc_wcqe_c_bg_ae, wcqe)) /* App Tag Check failed */
12987 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12988 BGS_APPTAG_ERR_MASK;
12989 if (bf_get(lpfc_wcqe_c_bg_re, wcqe)) /* Ref Tag Check failed */
12990 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12991 BGS_REFTAG_ERR_MASK;
12992
12993 /* Check to see if there was any good data before the error */
12994 if (bf_get(lpfc_wcqe_c_bg_tdpv, wcqe)) {
12995 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12996 BGS_HI_WATER_MARK_PRESENT_MASK;
12997 pIocbIn->iocb.unsli3.sli3_bg.bghm =
12998 wcqe->total_data_placed;
12999 }
13000
13001 /*
13002 * Set ALL the error bits to indicate we don't know what
13003 * type of error it is.
13004 */
13005 if (!pIocbIn->iocb.unsli3.sli3_bg.bgstat)
13006 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13007 (BGS_REFTAG_ERR_MASK | BGS_APPTAG_ERR_MASK |
13008 BGS_GUARD_ERR_MASK);
13009 }
13010
341af102
JS
13011 /* Pick up HBA exchange busy condition */
13012 if (bf_get(lpfc_wcqe_c_xb, wcqe)) {
13013 spin_lock_irqsave(&phba->hbalock, iflags);
13014 pIocbIn->iocb_flag |= LPFC_EXCHANGE_BUSY;
13015 spin_unlock_irqrestore(&phba->hbalock, iflags);
13016 }
4f774513
JS
13017}
13018
45ed1190
JS
13019/**
13020 * lpfc_sli4_els_wcqe_to_rspiocbq - Get response iocbq from els wcqe
13021 * @phba: Pointer to HBA context object.
13022 * @wcqe: Pointer to work-queue completion queue entry.
13023 *
13024 * This routine handles an ELS work-queue completion event and construct
13025 * a pseudo response ELS IODBQ from the SLI4 ELS WCQE for the common
13026 * discovery engine to handle.
13027 *
13028 * Return: Pointer to the receive IOCBQ, NULL otherwise.
13029 **/
13030static struct lpfc_iocbq *
13031lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *phba,
13032 struct lpfc_iocbq *irspiocbq)
13033{
895427bd 13034 struct lpfc_sli_ring *pring;
45ed1190
JS
13035 struct lpfc_iocbq *cmdiocbq;
13036 struct lpfc_wcqe_complete *wcqe;
13037 unsigned long iflags;
13038
895427bd 13039 pring = lpfc_phba_elsring(phba);
1234a6d5
DK
13040 if (unlikely(!pring))
13041 return NULL;
895427bd 13042
45ed1190 13043 wcqe = &irspiocbq->cq_event.cqe.wcqe_cmpl;
7e56aa25 13044 spin_lock_irqsave(&pring->ring_lock, iflags);
45ed1190
JS
13045 pring->stats.iocb_event++;
13046 /* Look up the ELS command IOCB and create pseudo response IOCB */
13047 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13048 bf_get(lpfc_wcqe_c_request_tag, wcqe));
45ed1190 13049 if (unlikely(!cmdiocbq)) {
401bb416 13050 spin_unlock_irqrestore(&pring->ring_lock, iflags);
45ed1190
JS
13051 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13052 "0386 ELS complete with no corresponding "
401bb416
DK
13053 "cmdiocb: 0x%x 0x%x 0x%x 0x%x\n",
13054 wcqe->word0, wcqe->total_data_placed,
13055 wcqe->parameter, wcqe->word3);
45ed1190
JS
13056 lpfc_sli_release_iocbq(phba, irspiocbq);
13057 return NULL;
13058 }
13059
401bb416
DK
13060 /* Put the iocb back on the txcmplq */
13061 lpfc_sli_ringtxcmpl_put(phba, pring, cmdiocbq);
13062 spin_unlock_irqrestore(&pring->ring_lock, iflags);
13063
45ed1190 13064 /* Fake the irspiocbq and copy necessary response information */
341af102 13065 lpfc_sli4_iocb_param_transfer(phba, irspiocbq, cmdiocbq, wcqe);
45ed1190
JS
13066
13067 return irspiocbq;
13068}
13069
8a5ca109
JS
13070inline struct lpfc_cq_event *
13071lpfc_cq_event_setup(struct lpfc_hba *phba, void *entry, int size)
13072{
13073 struct lpfc_cq_event *cq_event;
13074
13075 /* Allocate a new internal CQ_EVENT entry */
13076 cq_event = lpfc_sli4_cq_event_alloc(phba);
13077 if (!cq_event) {
13078 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13079 "0602 Failed to alloc CQ_EVENT entry\n");
13080 return NULL;
13081 }
13082
13083 /* Move the CQE into the event */
13084 memcpy(&cq_event->cqe, entry, size);
13085 return cq_event;
13086}
13087
04c68496
JS
13088/**
13089 * lpfc_sli4_sp_handle_async_event - Handle an asynchroous event
13090 * @phba: Pointer to HBA context object.
13091 * @cqe: Pointer to mailbox completion queue entry.
13092 *
13093 * This routine process a mailbox completion queue entry with asynchrous
13094 * event.
13095 *
13096 * Return: true if work posted to worker thread, otherwise false.
13097 **/
13098static bool
13099lpfc_sli4_sp_handle_async_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13100{
13101 struct lpfc_cq_event *cq_event;
13102 unsigned long iflags;
13103
13104 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13105 "0392 Async Event: word0:x%x, word1:x%x, "
13106 "word2:x%x, word3:x%x\n", mcqe->word0,
13107 mcqe->mcqe_tag0, mcqe->mcqe_tag1, mcqe->trailer);
13108
8a5ca109
JS
13109 cq_event = lpfc_cq_event_setup(phba, mcqe, sizeof(struct lpfc_mcqe));
13110 if (!cq_event)
04c68496 13111 return false;
04c68496
JS
13112 spin_lock_irqsave(&phba->hbalock, iflags);
13113 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_asynce_work_queue);
13114 /* Set the async event flag */
13115 phba->hba_flag |= ASYNC_EVENT;
13116 spin_unlock_irqrestore(&phba->hbalock, iflags);
13117
13118 return true;
13119}
13120
13121/**
13122 * lpfc_sli4_sp_handle_mbox_event - Handle a mailbox completion event
13123 * @phba: Pointer to HBA context object.
13124 * @cqe: Pointer to mailbox completion queue entry.
13125 *
13126 * This routine process a mailbox completion queue entry with mailbox
13127 * completion event.
13128 *
13129 * Return: true if work posted to worker thread, otherwise false.
13130 **/
13131static bool
13132lpfc_sli4_sp_handle_mbox_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13133{
13134 uint32_t mcqe_status;
13135 MAILBOX_t *mbox, *pmbox;
13136 struct lpfc_mqe *mqe;
13137 struct lpfc_vport *vport;
13138 struct lpfc_nodelist *ndlp;
13139 struct lpfc_dmabuf *mp;
13140 unsigned long iflags;
13141 LPFC_MBOXQ_t *pmb;
13142 bool workposted = false;
13143 int rc;
13144
13145 /* If not a mailbox complete MCQE, out by checking mailbox consume */
13146 if (!bf_get(lpfc_trailer_completed, mcqe))
13147 goto out_no_mqe_complete;
13148
13149 /* Get the reference to the active mbox command */
13150 spin_lock_irqsave(&phba->hbalock, iflags);
13151 pmb = phba->sli.mbox_active;
13152 if (unlikely(!pmb)) {
13153 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13154 "1832 No pending MBOX command to handle\n");
13155 spin_unlock_irqrestore(&phba->hbalock, iflags);
13156 goto out_no_mqe_complete;
13157 }
13158 spin_unlock_irqrestore(&phba->hbalock, iflags);
13159 mqe = &pmb->u.mqe;
13160 pmbox = (MAILBOX_t *)&pmb->u.mqe;
13161 mbox = phba->mbox;
13162 vport = pmb->vport;
13163
13164 /* Reset heartbeat timer */
13165 phba->last_completion_time = jiffies;
13166 del_timer(&phba->sli.mbox_tmo);
13167
13168 /* Move mbox data to caller's mailbox region, do endian swapping */
13169 if (pmb->mbox_cmpl && mbox)
48f8fdb4 13170 lpfc_sli4_pcimem_bcopy(mbox, mqe, sizeof(struct lpfc_mqe));
04c68496 13171
73d91e50
JS
13172 /*
13173 * For mcqe errors, conditionally move a modified error code to
13174 * the mbox so that the error will not be missed.
13175 */
13176 mcqe_status = bf_get(lpfc_mcqe_status, mcqe);
13177 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
13178 if (bf_get(lpfc_mqe_status, mqe) == MBX_SUCCESS)
13179 bf_set(lpfc_mqe_status, mqe,
13180 (LPFC_MBX_ERROR_RANGE | mcqe_status));
13181 }
04c68496
JS
13182 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
13183 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
13184 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_MBOX_VPORT,
13185 "MBOX dflt rpi: status:x%x rpi:x%x",
13186 mcqe_status,
13187 pmbox->un.varWords[0], 0);
13188 if (mcqe_status == MB_CQE_STATUS_SUCCESS) {
13189 mp = (struct lpfc_dmabuf *)(pmb->context1);
13190 ndlp = (struct lpfc_nodelist *)pmb->context2;
13191 /* Reg_LOGIN of dflt RPI was successful. Now lets get
13192 * RID of the PPI using the same mbox buffer.
13193 */
13194 lpfc_unreg_login(phba, vport->vpi,
13195 pmbox->un.varWords[0], pmb);
13196 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
13197 pmb->context1 = mp;
13198 pmb->context2 = ndlp;
13199 pmb->vport = vport;
13200 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
13201 if (rc != MBX_BUSY)
13202 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
13203 LOG_SLI, "0385 rc should "
13204 "have been MBX_BUSY\n");
13205 if (rc != MBX_NOT_FINISHED)
13206 goto send_current_mbox;
13207 }
13208 }
13209 spin_lock_irqsave(&phba->pport->work_port_lock, iflags);
13210 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
13211 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflags);
13212
13213 /* There is mailbox completion work to do */
13214 spin_lock_irqsave(&phba->hbalock, iflags);
13215 __lpfc_mbox_cmpl_put(phba, pmb);
13216 phba->work_ha |= HA_MBATT;
13217 spin_unlock_irqrestore(&phba->hbalock, iflags);
13218 workposted = true;
13219
13220send_current_mbox:
13221 spin_lock_irqsave(&phba->hbalock, iflags);
13222 /* Release the mailbox command posting token */
13223 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13224 /* Setting active mailbox pointer need to be in sync to flag clear */
13225 phba->sli.mbox_active = NULL;
13226 spin_unlock_irqrestore(&phba->hbalock, iflags);
13227 /* Wake up worker thread to post the next pending mailbox command */
13228 lpfc_worker_wake_up(phba);
13229out_no_mqe_complete:
13230 if (bf_get(lpfc_trailer_consumed, mcqe))
13231 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
13232 return workposted;
13233}
13234
13235/**
13236 * lpfc_sli4_sp_handle_mcqe - Process a mailbox completion queue entry
13237 * @phba: Pointer to HBA context object.
13238 * @cqe: Pointer to mailbox completion queue entry.
13239 *
13240 * This routine process a mailbox completion queue entry, it invokes the
13241 * proper mailbox complete handling or asynchrous event handling routine
13242 * according to the MCQE's async bit.
13243 *
13244 * Return: true if work posted to worker thread, otherwise false.
13245 **/
13246static bool
13247lpfc_sli4_sp_handle_mcqe(struct lpfc_hba *phba, struct lpfc_cqe *cqe)
13248{
13249 struct lpfc_mcqe mcqe;
13250 bool workposted;
13251
13252 /* Copy the mailbox MCQE and convert endian order as needed */
48f8fdb4 13253 lpfc_sli4_pcimem_bcopy(cqe, &mcqe, sizeof(struct lpfc_mcqe));
04c68496
JS
13254
13255 /* Invoke the proper event handling routine */
13256 if (!bf_get(lpfc_trailer_async, &mcqe))
13257 workposted = lpfc_sli4_sp_handle_mbox_event(phba, &mcqe);
13258 else
13259 workposted = lpfc_sli4_sp_handle_async_event(phba, &mcqe);
13260 return workposted;
13261}
13262
4f774513
JS
13263/**
13264 * lpfc_sli4_sp_handle_els_wcqe - Handle els work-queue completion event
13265 * @phba: Pointer to HBA context object.
2a76a283 13266 * @cq: Pointer to associated CQ
4f774513
JS
13267 * @wcqe: Pointer to work-queue completion queue entry.
13268 *
13269 * This routine handles an ELS work-queue completion event.
13270 *
13271 * Return: true if work posted to worker thread, otherwise false.
13272 **/
13273static bool
2a76a283 13274lpfc_sli4_sp_handle_els_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13275 struct lpfc_wcqe_complete *wcqe)
13276{
4f774513
JS
13277 struct lpfc_iocbq *irspiocbq;
13278 unsigned long iflags;
2a76a283 13279 struct lpfc_sli_ring *pring = cq->pring;
0e9bb8d7
JS
13280 int txq_cnt = 0;
13281 int txcmplq_cnt = 0;
13282 int fcp_txcmplq_cnt = 0;
4f774513 13283
11f0e34f
JS
13284 /* Check for response status */
13285 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13286 /* Log the error status */
13287 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13288 "0357 ELS CQE error: status=x%x: "
13289 "CQE: %08x %08x %08x %08x\n",
13290 bf_get(lpfc_wcqe_c_status, wcqe),
13291 wcqe->word0, wcqe->total_data_placed,
13292 wcqe->parameter, wcqe->word3);
13293 }
13294
45ed1190 13295 /* Get an irspiocbq for later ELS response processing use */
4f774513
JS
13296 irspiocbq = lpfc_sli_get_iocbq(phba);
13297 if (!irspiocbq) {
0e9bb8d7
JS
13298 if (!list_empty(&pring->txq))
13299 txq_cnt++;
13300 if (!list_empty(&pring->txcmplq))
13301 txcmplq_cnt++;
4f774513 13302 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2a9bf3d0
JS
13303 "0387 NO IOCBQ data: txq_cnt=%d iocb_cnt=%d "
13304 "fcp_txcmplq_cnt=%d, els_txcmplq_cnt=%d\n",
0e9bb8d7
JS
13305 txq_cnt, phba->iocb_cnt,
13306 fcp_txcmplq_cnt,
13307 txcmplq_cnt);
45ed1190 13308 return false;
4f774513 13309 }
4f774513 13310
45ed1190
JS
13311 /* Save off the slow-path queue event for work thread to process */
13312 memcpy(&irspiocbq->cq_event.cqe.wcqe_cmpl, wcqe, sizeof(*wcqe));
4f774513 13313 spin_lock_irqsave(&phba->hbalock, iflags);
4d9ab994 13314 list_add_tail(&irspiocbq->cq_event.list,
45ed1190
JS
13315 &phba->sli4_hba.sp_queue_event);
13316 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513 13317 spin_unlock_irqrestore(&phba->hbalock, iflags);
4f774513 13318
45ed1190 13319 return true;
4f774513
JS
13320}
13321
13322/**
13323 * lpfc_sli4_sp_handle_rel_wcqe - Handle slow-path WQ entry consumed event
13324 * @phba: Pointer to HBA context object.
13325 * @wcqe: Pointer to work-queue completion queue entry.
13326 *
3f8b6fb7 13327 * This routine handles slow-path WQ entry consumed event by invoking the
4f774513
JS
13328 * proper WQ release routine to the slow-path WQ.
13329 **/
13330static void
13331lpfc_sli4_sp_handle_rel_wcqe(struct lpfc_hba *phba,
13332 struct lpfc_wcqe_release *wcqe)
13333{
2e90f4b5
JS
13334 /* sanity check on queue memory */
13335 if (unlikely(!phba->sli4_hba.els_wq))
13336 return;
4f774513
JS
13337 /* Check for the slow-path ELS work queue */
13338 if (bf_get(lpfc_wcqe_r_wq_id, wcqe) == phba->sli4_hba.els_wq->queue_id)
13339 lpfc_sli4_wq_release(phba->sli4_hba.els_wq,
13340 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
13341 else
13342 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13343 "2579 Slow-path wqe consume event carries "
13344 "miss-matched qid: wcqe-qid=x%x, sp-qid=x%x\n",
13345 bf_get(lpfc_wcqe_r_wqe_index, wcqe),
13346 phba->sli4_hba.els_wq->queue_id);
13347}
13348
13349/**
13350 * lpfc_sli4_sp_handle_abort_xri_wcqe - Handle a xri abort event
13351 * @phba: Pointer to HBA context object.
13352 * @cq: Pointer to a WQ completion queue.
13353 * @wcqe: Pointer to work-queue completion queue entry.
13354 *
13355 * This routine handles an XRI abort event.
13356 *
13357 * Return: true if work posted to worker thread, otherwise false.
13358 **/
13359static bool
13360lpfc_sli4_sp_handle_abort_xri_wcqe(struct lpfc_hba *phba,
13361 struct lpfc_queue *cq,
13362 struct sli4_wcqe_xri_aborted *wcqe)
13363{
13364 bool workposted = false;
13365 struct lpfc_cq_event *cq_event;
13366 unsigned long iflags;
13367
4f774513
JS
13368 switch (cq->subtype) {
13369 case LPFC_FCP:
8a5ca109
JS
13370 cq_event = lpfc_cq_event_setup(
13371 phba, wcqe, sizeof(struct sli4_wcqe_xri_aborted));
13372 if (!cq_event)
13373 return false;
4f774513
JS
13374 spin_lock_irqsave(&phba->hbalock, iflags);
13375 list_add_tail(&cq_event->list,
13376 &phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
13377 /* Set the fcp xri abort event flag */
13378 phba->hba_flag |= FCP_XRI_ABORT_EVENT;
13379 spin_unlock_irqrestore(&phba->hbalock, iflags);
13380 workposted = true;
13381 break;
422c4cb7 13382 case LPFC_NVME_LS: /* NVME LS uses ELS resources */
4f774513 13383 case LPFC_ELS:
8a5ca109
JS
13384 cq_event = lpfc_cq_event_setup(
13385 phba, wcqe, sizeof(struct sli4_wcqe_xri_aborted));
13386 if (!cq_event)
13387 return false;
4f774513
JS
13388 spin_lock_irqsave(&phba->hbalock, iflags);
13389 list_add_tail(&cq_event->list,
13390 &phba->sli4_hba.sp_els_xri_aborted_work_queue);
13391 /* Set the els xri abort event flag */
13392 phba->hba_flag |= ELS_XRI_ABORT_EVENT;
13393 spin_unlock_irqrestore(&phba->hbalock, iflags);
13394 workposted = true;
13395 break;
318083ad 13396 case LPFC_NVME:
8a5ca109
JS
13397 /* Notify aborted XRI for NVME work queue */
13398 if (phba->nvmet_support)
13399 lpfc_sli4_nvmet_xri_aborted(phba, wcqe);
13400 else
13401 lpfc_sli4_nvme_xri_aborted(phba, wcqe);
13402
13403 workposted = false;
318083ad 13404 break;
4f774513
JS
13405 default:
13406 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
318083ad
JS
13407 "0603 Invalid CQ subtype %d: "
13408 "%08x %08x %08x %08x\n",
13409 cq->subtype, wcqe->word0, wcqe->parameter,
13410 wcqe->word2, wcqe->word3);
4f774513
JS
13411 workposted = false;
13412 break;
13413 }
13414 return workposted;
13415}
13416
4f774513
JS
13417/**
13418 * lpfc_sli4_sp_handle_rcqe - Process a receive-queue completion queue entry
13419 * @phba: Pointer to HBA context object.
13420 * @rcqe: Pointer to receive-queue completion queue entry.
13421 *
13422 * This routine process a receive-queue completion queue entry.
13423 *
13424 * Return: true if work posted to worker thread, otherwise false.
13425 **/
13426static bool
4d9ab994 13427lpfc_sli4_sp_handle_rcqe(struct lpfc_hba *phba, struct lpfc_rcqe *rcqe)
4f774513 13428{
4f774513
JS
13429 bool workposted = false;
13430 struct lpfc_queue *hrq = phba->sli4_hba.hdr_rq;
13431 struct lpfc_queue *drq = phba->sli4_hba.dat_rq;
547077a4 13432 struct lpfc_nvmet_tgtport *tgtp;
4f774513 13433 struct hbq_dmabuf *dma_buf;
7851fe2c 13434 uint32_t status, rq_id;
4f774513
JS
13435 unsigned long iflags;
13436
2e90f4b5
JS
13437 /* sanity check on queue memory */
13438 if (unlikely(!hrq) || unlikely(!drq))
13439 return workposted;
13440
7851fe2c
JS
13441 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13442 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13443 else
13444 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13445 if (rq_id != hrq->queue_id)
4f774513
JS
13446 goto out;
13447
4d9ab994 13448 status = bf_get(lpfc_rcqe_status, rcqe);
4f774513
JS
13449 switch (status) {
13450 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13451 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13452 "2537 Receive Frame Truncated!!\n");
13453 case FC_STATUS_RQ_SUCCESS:
13454 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13455 lpfc_sli4_rq_release(hrq, drq);
4f774513
JS
13456 dma_buf = lpfc_sli_hbqbuf_get(&phba->hbqs[0].hbq_buffer_list);
13457 if (!dma_buf) {
b84daac9 13458 hrq->RQ_no_buf_found++;
4f774513
JS
13459 spin_unlock_irqrestore(&phba->hbalock, iflags);
13460 goto out;
13461 }
b84daac9 13462 hrq->RQ_rcv_buf++;
547077a4 13463 hrq->RQ_buf_posted--;
4d9ab994 13464 memcpy(&dma_buf->cq_event.cqe.rcqe_cmpl, rcqe, sizeof(*rcqe));
895427bd 13465
4f774513 13466 /* save off the frame for the word thread to process */
4d9ab994 13467 list_add_tail(&dma_buf->cq_event.list,
45ed1190 13468 &phba->sli4_hba.sp_queue_event);
4f774513 13469 /* Frame received */
45ed1190 13470 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513
JS
13471 spin_unlock_irqrestore(&phba->hbalock, iflags);
13472 workposted = true;
13473 break;
4f774513 13474 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13475 if (phba->nvmet_support) {
13476 tgtp = phba->targetport->private;
13477 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13478 "6402 RQE Error x%x, posted %d err_cnt "
13479 "%d: %x %x %x\n",
13480 status, hrq->RQ_buf_posted,
13481 hrq->RQ_no_posted_buf,
13482 atomic_read(&tgtp->rcv_fcp_cmd_in),
13483 atomic_read(&tgtp->rcv_fcp_cmd_out),
13484 atomic_read(&tgtp->xmt_fcp_release));
13485 }
13486 /* fallthrough */
13487
13488 case FC_STATUS_INSUFF_BUF_NEED_BUF:
b84daac9 13489 hrq->RQ_no_posted_buf++;
4f774513
JS
13490 /* Post more buffers if possible */
13491 spin_lock_irqsave(&phba->hbalock, iflags);
13492 phba->hba_flag |= HBA_POST_RECEIVE_BUFFER;
13493 spin_unlock_irqrestore(&phba->hbalock, iflags);
13494 workposted = true;
13495 break;
13496 }
13497out:
13498 return workposted;
4f774513
JS
13499}
13500
4d9ab994
JS
13501/**
13502 * lpfc_sli4_sp_handle_cqe - Process a slow path completion queue entry
13503 * @phba: Pointer to HBA context object.
13504 * @cq: Pointer to the completion queue.
13505 * @wcqe: Pointer to a completion queue entry.
13506 *
25985edc 13507 * This routine process a slow-path work-queue or receive queue completion queue
4d9ab994
JS
13508 * entry.
13509 *
13510 * Return: true if work posted to worker thread, otherwise false.
13511 **/
13512static bool
13513lpfc_sli4_sp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13514 struct lpfc_cqe *cqe)
13515{
45ed1190 13516 struct lpfc_cqe cqevt;
4d9ab994
JS
13517 bool workposted = false;
13518
13519 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 13520 lpfc_sli4_pcimem_bcopy(cqe, &cqevt, sizeof(struct lpfc_cqe));
4d9ab994
JS
13521
13522 /* Check and process for different type of WCQE and dispatch */
45ed1190 13523 switch (bf_get(lpfc_cqe_code, &cqevt)) {
4d9ab994 13524 case CQE_CODE_COMPL_WQE:
45ed1190 13525 /* Process the WQ/RQ complete event */
bc73905a 13526 phba->last_completion_time = jiffies;
2a76a283 13527 workposted = lpfc_sli4_sp_handle_els_wcqe(phba, cq,
45ed1190 13528 (struct lpfc_wcqe_complete *)&cqevt);
4d9ab994
JS
13529 break;
13530 case CQE_CODE_RELEASE_WQE:
13531 /* Process the WQ release event */
13532 lpfc_sli4_sp_handle_rel_wcqe(phba,
45ed1190 13533 (struct lpfc_wcqe_release *)&cqevt);
4d9ab994
JS
13534 break;
13535 case CQE_CODE_XRI_ABORTED:
13536 /* Process the WQ XRI abort event */
bc73905a 13537 phba->last_completion_time = jiffies;
4d9ab994 13538 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
45ed1190 13539 (struct sli4_wcqe_xri_aborted *)&cqevt);
4d9ab994
JS
13540 break;
13541 case CQE_CODE_RECEIVE:
7851fe2c 13542 case CQE_CODE_RECEIVE_V1:
4d9ab994 13543 /* Process the RQ event */
bc73905a 13544 phba->last_completion_time = jiffies;
4d9ab994 13545 workposted = lpfc_sli4_sp_handle_rcqe(phba,
45ed1190 13546 (struct lpfc_rcqe *)&cqevt);
4d9ab994
JS
13547 break;
13548 default:
13549 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13550 "0388 Not a valid WCQE code: x%x\n",
45ed1190 13551 bf_get(lpfc_cqe_code, &cqevt));
4d9ab994
JS
13552 break;
13553 }
13554 return workposted;
13555}
13556
4f774513
JS
13557/**
13558 * lpfc_sli4_sp_handle_eqe - Process a slow-path event queue entry
13559 * @phba: Pointer to HBA context object.
13560 * @eqe: Pointer to fast-path event queue entry.
13561 *
13562 * This routine process a event queue entry from the slow-path event queue.
13563 * It will check the MajorCode and MinorCode to determine this is for a
13564 * completion event on a completion queue, if not, an error shall be logged
13565 * and just return. Otherwise, it will get to the corresponding completion
13566 * queue and process all the entries on that completion queue, rearm the
13567 * completion queue, and then return.
13568 *
13569 **/
f485c18d 13570static void
67d12733
JS
13571lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
13572 struct lpfc_queue *speq)
4f774513 13573{
67d12733 13574 struct lpfc_queue *cq = NULL, *childq;
4f774513
JS
13575 uint16_t cqid;
13576
4f774513 13577 /* Get the reference to the corresponding CQ */
cb5172ea 13578 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
4f774513 13579
4f774513
JS
13580 list_for_each_entry(childq, &speq->child_list, list) {
13581 if (childq->queue_id == cqid) {
13582 cq = childq;
13583 break;
13584 }
13585 }
13586 if (unlikely(!cq)) {
75baf696
JS
13587 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
13588 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13589 "0365 Slow-path CQ identifier "
13590 "(%d) does not exist\n", cqid);
f485c18d 13591 return;
4f774513
JS
13592 }
13593
895427bd
JS
13594 /* Save EQ associated with this CQ */
13595 cq->assoc_qp = speq;
13596
f485c18d
DK
13597 if (!queue_work(phba->wq, &cq->spwork))
13598 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13599 "0390 Cannot schedule soft IRQ "
13600 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
13601 cqid, cq->queue_id, smp_processor_id());
13602}
13603
13604/**
13605 * lpfc_sli4_sp_process_cq - Process a slow-path event queue entry
13606 * @phba: Pointer to HBA context object.
13607 *
13608 * This routine process a event queue entry from the slow-path event queue.
13609 * It will check the MajorCode and MinorCode to determine this is for a
13610 * completion event on a completion queue, if not, an error shall be logged
13611 * and just return. Otherwise, it will get to the corresponding completion
13612 * queue and process all the entries on that completion queue, rearm the
13613 * completion queue, and then return.
13614 *
13615 **/
13616static void
13617lpfc_sli4_sp_process_cq(struct work_struct *work)
13618{
13619 struct lpfc_queue *cq =
13620 container_of(work, struct lpfc_queue, spwork);
13621 struct lpfc_hba *phba = cq->phba;
13622 struct lpfc_cqe *cqe;
13623 bool workposted = false;
13624 int ccount = 0;
13625
4f774513
JS
13626 /* Process all the entries to the CQ */
13627 switch (cq->type) {
13628 case LPFC_MCQ:
13629 while ((cqe = lpfc_sli4_cq_get(cq))) {
13630 workposted |= lpfc_sli4_sp_handle_mcqe(phba, cqe);
f485c18d 13631 if (!(++ccount % cq->entry_repost))
7869da18 13632 break;
b84daac9 13633 cq->CQ_mbox++;
4f774513
JS
13634 }
13635 break;
13636 case LPFC_WCQ:
13637 while ((cqe = lpfc_sli4_cq_get(cq))) {
c8a4ce0b
DK
13638 if (cq->subtype == LPFC_FCP ||
13639 cq->subtype == LPFC_NVME) {
13640#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13641 if (phba->ktime_on)
13642 cq->isr_timestamp = ktime_get_ns();
13643 else
13644 cq->isr_timestamp = 0;
13645#endif
895427bd 13646 workposted |= lpfc_sli4_fp_handle_cqe(phba, cq,
0558056c 13647 cqe);
c8a4ce0b 13648 } else {
0558056c
JS
13649 workposted |= lpfc_sli4_sp_handle_cqe(phba, cq,
13650 cqe);
c8a4ce0b 13651 }
f485c18d 13652 if (!(++ccount % cq->entry_repost))
7869da18 13653 break;
4f774513 13654 }
b84daac9
JS
13655
13656 /* Track the max number of CQEs processed in 1 EQ */
f485c18d
DK
13657 if (ccount > cq->CQ_max_cqe)
13658 cq->CQ_max_cqe = ccount;
4f774513
JS
13659 break;
13660 default:
13661 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13662 "0370 Invalid completion queue type (%d)\n",
13663 cq->type);
f485c18d 13664 return;
4f774513
JS
13665 }
13666
13667 /* Catch the no cq entry condition, log an error */
f485c18d 13668 if (unlikely(ccount == 0))
4f774513
JS
13669 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13670 "0371 No entry from the CQ: identifier "
13671 "(x%x), type (%d)\n", cq->queue_id, cq->type);
13672
13673 /* In any case, flash and re-arm the RCQ */
b71413dd 13674 phba->sli4_hba.sli4_cq_release(cq, LPFC_QUEUE_REARM);
4f774513
JS
13675
13676 /* wake up worker thread if there are works to be done */
13677 if (workposted)
13678 lpfc_worker_wake_up(phba);
13679}
13680
13681/**
13682 * lpfc_sli4_fp_handle_fcp_wcqe - Process fast-path work queue completion entry
2a76a283
JS
13683 * @phba: Pointer to HBA context object.
13684 * @cq: Pointer to associated CQ
13685 * @wcqe: Pointer to work-queue completion queue entry.
4f774513
JS
13686 *
13687 * This routine process a fast-path work queue completion entry from fast-path
13688 * event queue for FCP command response completion.
13689 **/
13690static void
2a76a283 13691lpfc_sli4_fp_handle_fcp_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13692 struct lpfc_wcqe_complete *wcqe)
13693{
2a76a283 13694 struct lpfc_sli_ring *pring = cq->pring;
4f774513
JS
13695 struct lpfc_iocbq *cmdiocbq;
13696 struct lpfc_iocbq irspiocbq;
13697 unsigned long iflags;
13698
4f774513
JS
13699 /* Check for response status */
13700 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13701 /* If resource errors reported from HBA, reduce queue
13702 * depth of the SCSI device.
13703 */
e3d2b802
JS
13704 if (((bf_get(lpfc_wcqe_c_status, wcqe) ==
13705 IOSTAT_LOCAL_REJECT)) &&
13706 ((wcqe->parameter & IOERR_PARAM_MASK) ==
13707 IOERR_NO_RESOURCES))
4f774513 13708 phba->lpfc_rampdown_queue_depth(phba);
e3d2b802 13709
4f774513 13710 /* Log the error status */
11f0e34f
JS
13711 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13712 "0373 FCP CQE error: status=x%x: "
13713 "CQE: %08x %08x %08x %08x\n",
4f774513 13714 bf_get(lpfc_wcqe_c_status, wcqe),
11f0e34f
JS
13715 wcqe->word0, wcqe->total_data_placed,
13716 wcqe->parameter, wcqe->word3);
4f774513
JS
13717 }
13718
13719 /* Look up the FCP command IOCB and create pseudo response IOCB */
7e56aa25
JS
13720 spin_lock_irqsave(&pring->ring_lock, iflags);
13721 pring->stats.iocb_event++;
4f774513
JS
13722 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13723 bf_get(lpfc_wcqe_c_request_tag, wcqe));
7e56aa25 13724 spin_unlock_irqrestore(&pring->ring_lock, iflags);
4f774513
JS
13725 if (unlikely(!cmdiocbq)) {
13726 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13727 "0374 FCP complete with no corresponding "
13728 "cmdiocb: iotag (%d)\n",
13729 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13730 return;
13731 }
c8a4ce0b
DK
13732#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13733 cmdiocbq->isr_timestamp = cq->isr_timestamp;
13734#endif
895427bd
JS
13735 if (cmdiocbq->iocb_cmpl == NULL) {
13736 if (cmdiocbq->wqe_cmpl) {
13737 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13738 spin_lock_irqsave(&phba->hbalock, iflags);
13739 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13740 spin_unlock_irqrestore(&phba->hbalock, iflags);
13741 }
13742
13743 /* Pass the cmd_iocb and the wcqe to the upper layer */
13744 (cmdiocbq->wqe_cmpl)(phba, cmdiocbq, wcqe);
13745 return;
13746 }
4f774513
JS
13747 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13748 "0375 FCP cmdiocb not callback function "
13749 "iotag: (%d)\n",
13750 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13751 return;
13752 }
13753
13754 /* Fake the irspiocb and copy necessary response information */
341af102 13755 lpfc_sli4_iocb_param_transfer(phba, &irspiocbq, cmdiocbq, wcqe);
4f774513 13756
0f65ff68
JS
13757 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13758 spin_lock_irqsave(&phba->hbalock, iflags);
13759 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13760 spin_unlock_irqrestore(&phba->hbalock, iflags);
13761 }
13762
4f774513
JS
13763 /* Pass the cmd_iocb and the rsp state to the upper layer */
13764 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, &irspiocbq);
13765}
13766
13767/**
13768 * lpfc_sli4_fp_handle_rel_wcqe - Handle fast-path WQ entry consumed event
13769 * @phba: Pointer to HBA context object.
13770 * @cq: Pointer to completion queue.
13771 * @wcqe: Pointer to work-queue completion queue entry.
13772 *
3f8b6fb7 13773 * This routine handles an fast-path WQ entry consumed event by invoking the
4f774513
JS
13774 * proper WQ release routine to the slow-path WQ.
13775 **/
13776static void
13777lpfc_sli4_fp_handle_rel_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13778 struct lpfc_wcqe_release *wcqe)
13779{
13780 struct lpfc_queue *childwq;
13781 bool wqid_matched = false;
895427bd 13782 uint16_t hba_wqid;
4f774513
JS
13783
13784 /* Check for fast-path FCP work queue release */
895427bd 13785 hba_wqid = bf_get(lpfc_wcqe_r_wq_id, wcqe);
4f774513 13786 list_for_each_entry(childwq, &cq->child_list, list) {
895427bd 13787 if (childwq->queue_id == hba_wqid) {
4f774513
JS
13788 lpfc_sli4_wq_release(childwq,
13789 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
6e8e1c14
JS
13790 if (childwq->q_flag & HBA_NVMET_WQFULL)
13791 lpfc_nvmet_wqfull_process(phba, childwq);
4f774513
JS
13792 wqid_matched = true;
13793 break;
13794 }
13795 }
13796 /* Report warning log message if no match found */
13797 if (wqid_matched != true)
13798 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13799 "2580 Fast-path wqe consume event carries "
895427bd 13800 "miss-matched qid: wcqe-qid=x%x\n", hba_wqid);
4f774513
JS
13801}
13802
13803/**
2d7dbc4c
JS
13804 * lpfc_sli4_nvmet_handle_rcqe - Process a receive-queue completion queue entry
13805 * @phba: Pointer to HBA context object.
13806 * @rcqe: Pointer to receive-queue completion queue entry.
4f774513 13807 *
2d7dbc4c
JS
13808 * This routine process a receive-queue completion queue entry.
13809 *
13810 * Return: true if work posted to worker thread, otherwise false.
13811 **/
13812static bool
13813lpfc_sli4_nvmet_handle_rcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13814 struct lpfc_rcqe *rcqe)
13815{
13816 bool workposted = false;
13817 struct lpfc_queue *hrq;
13818 struct lpfc_queue *drq;
13819 struct rqb_dmabuf *dma_buf;
13820 struct fc_frame_header *fc_hdr;
547077a4 13821 struct lpfc_nvmet_tgtport *tgtp;
2d7dbc4c
JS
13822 uint32_t status, rq_id;
13823 unsigned long iflags;
13824 uint32_t fctl, idx;
13825
13826 if ((phba->nvmet_support == 0) ||
13827 (phba->sli4_hba.nvmet_cqset == NULL))
13828 return workposted;
13829
13830 idx = cq->queue_id - phba->sli4_hba.nvmet_cqset[0]->queue_id;
13831 hrq = phba->sli4_hba.nvmet_mrq_hdr[idx];
13832 drq = phba->sli4_hba.nvmet_mrq_data[idx];
13833
13834 /* sanity check on queue memory */
13835 if (unlikely(!hrq) || unlikely(!drq))
13836 return workposted;
13837
13838 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13839 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13840 else
13841 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13842
13843 if ((phba->nvmet_support == 0) ||
13844 (rq_id != hrq->queue_id))
13845 return workposted;
13846
13847 status = bf_get(lpfc_rcqe_status, rcqe);
13848 switch (status) {
13849 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13850 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13851 "6126 Receive Frame Truncated!!\n");
78e1d200 13852 /* Drop thru */
2d7dbc4c 13853 case FC_STATUS_RQ_SUCCESS:
2d7dbc4c 13854 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13855 lpfc_sli4_rq_release(hrq, drq);
2d7dbc4c
JS
13856 dma_buf = lpfc_sli_rqbuf_get(phba, hrq);
13857 if (!dma_buf) {
13858 hrq->RQ_no_buf_found++;
13859 spin_unlock_irqrestore(&phba->hbalock, iflags);
13860 goto out;
13861 }
13862 spin_unlock_irqrestore(&phba->hbalock, iflags);
13863 hrq->RQ_rcv_buf++;
547077a4 13864 hrq->RQ_buf_posted--;
2d7dbc4c
JS
13865 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13866
13867 /* Just some basic sanity checks on FCP Command frame */
13868 fctl = (fc_hdr->fh_f_ctl[0] << 16 |
13869 fc_hdr->fh_f_ctl[1] << 8 |
13870 fc_hdr->fh_f_ctl[2]);
13871 if (((fctl &
13872 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) !=
13873 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) ||
13874 (fc_hdr->fh_seq_cnt != 0)) /* 0 byte swapped is still 0 */
13875 goto drop;
13876
13877 if (fc_hdr->fh_type == FC_TYPE_FCP) {
13878 dma_buf->bytes_recv = bf_get(lpfc_rcqe_length, rcqe);
d613b6a7 13879 lpfc_nvmet_unsol_fcp_event(
66d7ce93 13880 phba, idx, dma_buf,
c8a4ce0b 13881 cq->isr_timestamp);
2d7dbc4c
JS
13882 return false;
13883 }
13884drop:
13885 lpfc_in_buf_free(phba, &dma_buf->dbuf);
13886 break;
2d7dbc4c 13887 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13888 if (phba->nvmet_support) {
13889 tgtp = phba->targetport->private;
13890 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13891 "6401 RQE Error x%x, posted %d err_cnt "
13892 "%d: %x %x %x\n",
13893 status, hrq->RQ_buf_posted,
13894 hrq->RQ_no_posted_buf,
13895 atomic_read(&tgtp->rcv_fcp_cmd_in),
13896 atomic_read(&tgtp->rcv_fcp_cmd_out),
13897 atomic_read(&tgtp->xmt_fcp_release));
13898 }
13899 /* fallthrough */
13900
13901 case FC_STATUS_INSUFF_BUF_NEED_BUF:
2d7dbc4c
JS
13902 hrq->RQ_no_posted_buf++;
13903 /* Post more buffers if possible */
2d7dbc4c
JS
13904 break;
13905 }
13906out:
13907 return workposted;
13908}
13909
4f774513 13910/**
895427bd 13911 * lpfc_sli4_fp_handle_cqe - Process fast-path work queue completion entry
4f774513
JS
13912 * @cq: Pointer to the completion queue.
13913 * @eqe: Pointer to fast-path completion queue entry.
13914 *
13915 * This routine process a fast-path work queue completion entry from fast-path
13916 * event queue for FCP command response completion.
13917 **/
13918static int
895427bd 13919lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13920 struct lpfc_cqe *cqe)
13921{
13922 struct lpfc_wcqe_release wcqe;
13923 bool workposted = false;
13924
13925 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 13926 lpfc_sli4_pcimem_bcopy(cqe, &wcqe, sizeof(struct lpfc_cqe));
4f774513
JS
13927
13928 /* Check and process for different type of WCQE and dispatch */
13929 switch (bf_get(lpfc_wcqe_c_code, &wcqe)) {
13930 case CQE_CODE_COMPL_WQE:
895427bd 13931 case CQE_CODE_NVME_ERSP:
b84daac9 13932 cq->CQ_wq++;
4f774513 13933 /* Process the WQ complete event */
98fc5dd9 13934 phba->last_completion_time = jiffies;
895427bd
JS
13935 if ((cq->subtype == LPFC_FCP) || (cq->subtype == LPFC_NVME))
13936 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
13937 (struct lpfc_wcqe_complete *)&wcqe);
13938 if (cq->subtype == LPFC_NVME_LS)
13939 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
4f774513
JS
13940 (struct lpfc_wcqe_complete *)&wcqe);
13941 break;
13942 case CQE_CODE_RELEASE_WQE:
b84daac9 13943 cq->CQ_release_wqe++;
4f774513
JS
13944 /* Process the WQ release event */
13945 lpfc_sli4_fp_handle_rel_wcqe(phba, cq,
13946 (struct lpfc_wcqe_release *)&wcqe);
13947 break;
13948 case CQE_CODE_XRI_ABORTED:
b84daac9 13949 cq->CQ_xri_aborted++;
4f774513 13950 /* Process the WQ XRI abort event */
bc73905a 13951 phba->last_completion_time = jiffies;
4f774513
JS
13952 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
13953 (struct sli4_wcqe_xri_aborted *)&wcqe);
13954 break;
895427bd
JS
13955 case CQE_CODE_RECEIVE_V1:
13956 case CQE_CODE_RECEIVE:
13957 phba->last_completion_time = jiffies;
2d7dbc4c
JS
13958 if (cq->subtype == LPFC_NVMET) {
13959 workposted = lpfc_sli4_nvmet_handle_rcqe(
13960 phba, cq, (struct lpfc_rcqe *)&wcqe);
13961 }
895427bd 13962 break;
4f774513
JS
13963 default:
13964 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 13965 "0144 Not a valid CQE code: x%x\n",
4f774513
JS
13966 bf_get(lpfc_wcqe_c_code, &wcqe));
13967 break;
13968 }
13969 return workposted;
13970}
13971
13972/**
67d12733 13973 * lpfc_sli4_hba_handle_eqe - Process a fast-path event queue entry
4f774513
JS
13974 * @phba: Pointer to HBA context object.
13975 * @eqe: Pointer to fast-path event queue entry.
13976 *
13977 * This routine process a event queue entry from the fast-path event queue.
13978 * It will check the MajorCode and MinorCode to determine this is for a
13979 * completion event on a completion queue, if not, an error shall be logged
13980 * and just return. Otherwise, it will get to the corresponding completion
13981 * queue and process all the entries on the completion queue, rearm the
13982 * completion queue, and then return.
13983 **/
f485c18d 13984static void
67d12733
JS
13985lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
13986 uint32_t qidx)
4f774513 13987{
895427bd 13988 struct lpfc_queue *cq = NULL;
2d7dbc4c 13989 uint16_t cqid, id;
4f774513 13990
cb5172ea 13991 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
4f774513 13992 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
67d12733 13993 "0366 Not a valid completion "
4f774513 13994 "event: majorcode=x%x, minorcode=x%x\n",
cb5172ea
JS
13995 bf_get_le32(lpfc_eqe_major_code, eqe),
13996 bf_get_le32(lpfc_eqe_minor_code, eqe));
f485c18d 13997 return;
4f774513
JS
13998 }
13999
67d12733
JS
14000 /* Get the reference to the corresponding CQ */
14001 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
14002
2d7dbc4c
JS
14003 if (phba->cfg_nvmet_mrq && phba->sli4_hba.nvmet_cqset) {
14004 id = phba->sli4_hba.nvmet_cqset[0]->queue_id;
14005 if ((cqid >= id) && (cqid < (id + phba->cfg_nvmet_mrq))) {
14006 /* Process NVMET unsol rcv */
14007 cq = phba->sli4_hba.nvmet_cqset[cqid - id];
14008 goto process_cq;
14009 }
67d12733
JS
14010 }
14011
895427bd
JS
14012 if (phba->sli4_hba.nvme_cq_map &&
14013 (cqid == phba->sli4_hba.nvme_cq_map[qidx])) {
f358dd0c 14014 /* Process NVME / NVMET command completion */
895427bd
JS
14015 cq = phba->sli4_hba.nvme_cq[qidx];
14016 goto process_cq;
2e90f4b5 14017 }
67d12733 14018
895427bd
JS
14019 if (phba->sli4_hba.fcp_cq_map &&
14020 (cqid == phba->sli4_hba.fcp_cq_map[qidx])) {
14021 /* Process FCP command completion */
14022 cq = phba->sli4_hba.fcp_cq[qidx];
14023 goto process_cq;
2e90f4b5 14024 }
895427bd
JS
14025
14026 if (phba->sli4_hba.nvmels_cq &&
14027 (cqid == phba->sli4_hba.nvmels_cq->queue_id)) {
14028 /* Process NVME unsol rcv */
14029 cq = phba->sli4_hba.nvmels_cq;
14030 }
14031
14032 /* Otherwise this is a Slow path event */
14033 if (cq == NULL) {
f485c18d
DK
14034 lpfc_sli4_sp_handle_eqe(phba, eqe, phba->sli4_hba.hba_eq[qidx]);
14035 return;
4f774513
JS
14036 }
14037
895427bd 14038process_cq:
4f774513
JS
14039 if (unlikely(cqid != cq->queue_id)) {
14040 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14041 "0368 Miss-matched fast-path completion "
14042 "queue identifier: eqcqid=%d, fcpcqid=%d\n",
14043 cqid, cq->queue_id);
f485c18d 14044 return;
4f774513
JS
14045 }
14046
895427bd
JS
14047 /* Save EQ associated with this CQ */
14048 cq->assoc_qp = phba->sli4_hba.hba_eq[qidx];
14049
f485c18d
DK
14050 if (!queue_work(phba->wq, &cq->irqwork))
14051 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14052 "0363 Cannot schedule soft IRQ "
14053 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
14054 cqid, cq->queue_id, smp_processor_id());
14055}
14056
14057/**
14058 * lpfc_sli4_hba_process_cq - Process a fast-path event queue entry
14059 * @phba: Pointer to HBA context object.
14060 * @eqe: Pointer to fast-path event queue entry.
14061 *
14062 * This routine process a event queue entry from the fast-path event queue.
14063 * It will check the MajorCode and MinorCode to determine this is for a
14064 * completion event on a completion queue, if not, an error shall be logged
14065 * and just return. Otherwise, it will get to the corresponding completion
14066 * queue and process all the entries on the completion queue, rearm the
14067 * completion queue, and then return.
14068 **/
14069static void
14070lpfc_sli4_hba_process_cq(struct work_struct *work)
14071{
14072 struct lpfc_queue *cq =
14073 container_of(work, struct lpfc_queue, irqwork);
14074 struct lpfc_hba *phba = cq->phba;
14075 struct lpfc_cqe *cqe;
14076 bool workposted = false;
14077 int ccount = 0;
14078
4f774513
JS
14079 /* Process all the entries to the CQ */
14080 while ((cqe = lpfc_sli4_cq_get(cq))) {
c8a4ce0b
DK
14081#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
14082 if (phba->ktime_on)
14083 cq->isr_timestamp = ktime_get_ns();
14084 else
14085 cq->isr_timestamp = 0;
14086#endif
895427bd 14087 workposted |= lpfc_sli4_fp_handle_cqe(phba, cq, cqe);
f485c18d 14088 if (!(++ccount % cq->entry_repost))
7869da18 14089 break;
4f774513
JS
14090 }
14091
b84daac9 14092 /* Track the max number of CQEs processed in 1 EQ */
f485c18d
DK
14093 if (ccount > cq->CQ_max_cqe)
14094 cq->CQ_max_cqe = ccount;
14095 cq->assoc_qp->EQ_cqe_cnt += ccount;
b84daac9 14096
4f774513 14097 /* Catch the no cq entry condition */
f485c18d 14098 if (unlikely(ccount == 0))
4f774513
JS
14099 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14100 "0369 No entry from fast-path completion "
14101 "queue fcpcqid=%d\n", cq->queue_id);
14102
14103 /* In any case, flash and re-arm the CQ */
b71413dd 14104 phba->sli4_hba.sli4_cq_release(cq, LPFC_QUEUE_REARM);
4f774513
JS
14105
14106 /* wake up worker thread if there are works to be done */
14107 if (workposted)
14108 lpfc_worker_wake_up(phba);
14109}
14110
14111static void
14112lpfc_sli4_eq_flush(struct lpfc_hba *phba, struct lpfc_queue *eq)
14113{
14114 struct lpfc_eqe *eqe;
14115
14116 /* walk all the EQ entries and drop on the floor */
14117 while ((eqe = lpfc_sli4_eq_get(eq)))
14118 ;
14119
14120 /* Clear and re-arm the EQ */
b71413dd 14121 phba->sli4_hba.sli4_eq_release(eq, LPFC_QUEUE_REARM);
4f774513
JS
14122}
14123
1ba981fd
JS
14124
14125/**
14126 * lpfc_sli4_fof_handle_eqe - Process a Flash Optimized Fabric event queue
14127 * entry
14128 * @phba: Pointer to HBA context object.
14129 * @eqe: Pointer to fast-path event queue entry.
14130 *
14131 * This routine process a event queue entry from the Flash Optimized Fabric
14132 * event queue. It will check the MajorCode and MinorCode to determine this
14133 * is for a completion event on a completion queue, if not, an error shall be
14134 * logged and just return. Otherwise, it will get to the corresponding
14135 * completion queue and process all the entries on the completion queue, rearm
14136 * the completion queue, and then return.
14137 **/
14138static void
14139lpfc_sli4_fof_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe)
14140{
14141 struct lpfc_queue *cq;
1ba981fd 14142 uint16_t cqid;
1ba981fd
JS
14143
14144 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
14145 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14146 "9147 Not a valid completion "
14147 "event: majorcode=x%x, minorcode=x%x\n",
14148 bf_get_le32(lpfc_eqe_major_code, eqe),
14149 bf_get_le32(lpfc_eqe_minor_code, eqe));
14150 return;
14151 }
14152
14153 /* Get the reference to the corresponding CQ */
14154 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
14155
14156 /* Next check for OAS */
14157 cq = phba->sli4_hba.oas_cq;
14158 if (unlikely(!cq)) {
14159 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
14160 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14161 "9148 OAS completion queue "
14162 "does not exist\n");
14163 return;
14164 }
14165
14166 if (unlikely(cqid != cq->queue_id)) {
14167 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14168 "9149 Miss-matched fast-path compl "
14169 "queue id: eqcqid=%d, fcpcqid=%d\n",
14170 cqid, cq->queue_id);
14171 return;
14172 }
14173
d41b65bc
JS
14174 /* Save EQ associated with this CQ */
14175 cq->assoc_qp = phba->sli4_hba.fof_eq;
14176
f485c18d
DK
14177 /* CQ work will be processed on CPU affinitized to this IRQ */
14178 if (!queue_work(phba->wq, &cq->irqwork))
1ba981fd 14179 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
f485c18d
DK
14180 "0367 Cannot schedule soft IRQ "
14181 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
14182 cqid, cq->queue_id, smp_processor_id());
1ba981fd
JS
14183}
14184
14185/**
14186 * lpfc_sli4_fof_intr_handler - HBA interrupt handler to SLI-4 device
14187 * @irq: Interrupt number.
14188 * @dev_id: The device context pointer.
14189 *
14190 * This function is directly called from the PCI layer as an interrupt
14191 * service routine when device with SLI-4 interface spec is enabled with
14192 * MSI-X multi-message interrupt mode and there is a Flash Optimized Fabric
14193 * IOCB ring event in the HBA. However, when the device is enabled with either
14194 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
14195 * device-level interrupt handler. When the PCI slot is in error recovery
14196 * or the HBA is undergoing initialization, the interrupt handler will not
14197 * process the interrupt. The Flash Optimized Fabric ring event are handled in
14198 * the intrrupt context. This function is called without any lock held.
14199 * It gets the hbalock to access and update SLI data structures. Note that,
14200 * the EQ to CQ are one-to-one map such that the EQ index is
14201 * equal to that of CQ index.
14202 *
14203 * This function returns IRQ_HANDLED when interrupt is handled else it
14204 * returns IRQ_NONE.
14205 **/
14206irqreturn_t
14207lpfc_sli4_fof_intr_handler(int irq, void *dev_id)
14208{
14209 struct lpfc_hba *phba;
895427bd 14210 struct lpfc_hba_eq_hdl *hba_eq_hdl;
1ba981fd
JS
14211 struct lpfc_queue *eq;
14212 struct lpfc_eqe *eqe;
14213 unsigned long iflag;
14214 int ecount = 0;
1ba981fd
JS
14215
14216 /* Get the driver's phba structure from the dev_id */
895427bd
JS
14217 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
14218 phba = hba_eq_hdl->phba;
1ba981fd
JS
14219
14220 if (unlikely(!phba))
14221 return IRQ_NONE;
14222
14223 /* Get to the EQ struct associated with this vector */
14224 eq = phba->sli4_hba.fof_eq;
14225 if (unlikely(!eq))
14226 return IRQ_NONE;
14227
14228 /* Check device state for handling interrupt */
14229 if (unlikely(lpfc_intr_state_check(phba))) {
1ba981fd
JS
14230 /* Check again for link_state with lock held */
14231 spin_lock_irqsave(&phba->hbalock, iflag);
14232 if (phba->link_state < LPFC_LINK_DOWN)
14233 /* Flush, clear interrupt, and rearm the EQ */
14234 lpfc_sli4_eq_flush(phba, eq);
14235 spin_unlock_irqrestore(&phba->hbalock, iflag);
14236 return IRQ_NONE;
14237 }
14238
14239 /*
14240 * Process all the event on FCP fast-path EQ
14241 */
14242 while ((eqe = lpfc_sli4_eq_get(eq))) {
14243 lpfc_sli4_fof_handle_eqe(phba, eqe);
14244 if (!(++ecount % eq->entry_repost))
7869da18 14245 break;
1ba981fd
JS
14246 eq->EQ_processed++;
14247 }
14248
14249 /* Track the max number of EQEs processed in 1 intr */
14250 if (ecount > eq->EQ_max_eqe)
14251 eq->EQ_max_eqe = ecount;
14252
14253
14254 if (unlikely(ecount == 0)) {
14255 eq->EQ_no_entry++;
14256
14257 if (phba->intr_type == MSIX)
14258 /* MSI-X treated interrupt served as no EQ share INT */
14259 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14260 "9145 MSI-X interrupt with no EQE\n");
14261 else {
14262 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14263 "9146 ISR interrupt with no EQE\n");
14264 /* Non MSI-X treated on interrupt as EQ share INT */
14265 return IRQ_NONE;
14266 }
14267 }
14268 /* Always clear and re-arm the fast-path EQ */
b71413dd 14269 phba->sli4_hba.sli4_eq_release(eq, LPFC_QUEUE_REARM);
1ba981fd
JS
14270 return IRQ_HANDLED;
14271}
14272
4f774513 14273/**
67d12733 14274 * lpfc_sli4_hba_intr_handler - HBA interrupt handler to SLI-4 device
4f774513
JS
14275 * @irq: Interrupt number.
14276 * @dev_id: The device context pointer.
14277 *
14278 * This function is directly called from the PCI layer as an interrupt
14279 * service routine when device with SLI-4 interface spec is enabled with
14280 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
14281 * ring event in the HBA. However, when the device is enabled with either
14282 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
14283 * device-level interrupt handler. When the PCI slot is in error recovery
14284 * or the HBA is undergoing initialization, the interrupt handler will not
14285 * process the interrupt. The SCSI FCP fast-path ring event are handled in
14286 * the intrrupt context. This function is called without any lock held.
14287 * It gets the hbalock to access and update SLI data structures. Note that,
14288 * the FCP EQ to FCP CQ are one-to-one map such that the FCP EQ index is
14289 * equal to that of FCP CQ index.
14290 *
67d12733
JS
14291 * The link attention and ELS ring attention events are handled
14292 * by the worker thread. The interrupt handler signals the worker thread
14293 * and returns for these events. This function is called without any lock
14294 * held. It gets the hbalock to access and update SLI data structures.
14295 *
4f774513
JS
14296 * This function returns IRQ_HANDLED when interrupt is handled else it
14297 * returns IRQ_NONE.
14298 **/
14299irqreturn_t
67d12733 14300lpfc_sli4_hba_intr_handler(int irq, void *dev_id)
4f774513
JS
14301{
14302 struct lpfc_hba *phba;
895427bd 14303 struct lpfc_hba_eq_hdl *hba_eq_hdl;
4f774513
JS
14304 struct lpfc_queue *fpeq;
14305 struct lpfc_eqe *eqe;
14306 unsigned long iflag;
14307 int ecount = 0;
895427bd 14308 int hba_eqidx;
4f774513
JS
14309
14310 /* Get the driver's phba structure from the dev_id */
895427bd
JS
14311 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
14312 phba = hba_eq_hdl->phba;
14313 hba_eqidx = hba_eq_hdl->idx;
4f774513
JS
14314
14315 if (unlikely(!phba))
14316 return IRQ_NONE;
67d12733 14317 if (unlikely(!phba->sli4_hba.hba_eq))
5350d872 14318 return IRQ_NONE;
4f774513
JS
14319
14320 /* Get to the EQ struct associated with this vector */
895427bd 14321 fpeq = phba->sli4_hba.hba_eq[hba_eqidx];
2e90f4b5
JS
14322 if (unlikely(!fpeq))
14323 return IRQ_NONE;
4f774513 14324
ba20c853 14325 if (lpfc_fcp_look_ahead) {
895427bd 14326 if (atomic_dec_and_test(&hba_eq_hdl->hba_eq_in_use))
b71413dd 14327 phba->sli4_hba.sli4_eq_clr_intr(fpeq);
ba20c853 14328 else {
895427bd 14329 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
ba20c853
JS
14330 return IRQ_NONE;
14331 }
14332 }
14333
4f774513
JS
14334 /* Check device state for handling interrupt */
14335 if (unlikely(lpfc_intr_state_check(phba))) {
14336 /* Check again for link_state with lock held */
14337 spin_lock_irqsave(&phba->hbalock, iflag);
14338 if (phba->link_state < LPFC_LINK_DOWN)
14339 /* Flush, clear interrupt, and rearm the EQ */
14340 lpfc_sli4_eq_flush(phba, fpeq);
14341 spin_unlock_irqrestore(&phba->hbalock, iflag);
ba20c853 14342 if (lpfc_fcp_look_ahead)
895427bd 14343 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
4f774513
JS
14344 return IRQ_NONE;
14345 }
14346
14347 /*
14348 * Process all the event on FCP fast-path EQ
14349 */
14350 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
f485c18d
DK
14351 lpfc_sli4_hba_handle_eqe(phba, eqe, hba_eqidx);
14352 if (!(++ecount % fpeq->entry_repost))
7869da18 14353 break;
b84daac9 14354 fpeq->EQ_processed++;
4f774513
JS
14355 }
14356
b84daac9
JS
14357 /* Track the max number of EQEs processed in 1 intr */
14358 if (ecount > fpeq->EQ_max_eqe)
14359 fpeq->EQ_max_eqe = ecount;
14360
4f774513 14361 /* Always clear and re-arm the fast-path EQ */
b71413dd 14362 phba->sli4_hba.sli4_eq_release(fpeq, LPFC_QUEUE_REARM);
4f774513
JS
14363
14364 if (unlikely(ecount == 0)) {
b84daac9 14365 fpeq->EQ_no_entry++;
ba20c853
JS
14366
14367 if (lpfc_fcp_look_ahead) {
895427bd 14368 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
ba20c853
JS
14369 return IRQ_NONE;
14370 }
14371
4f774513
JS
14372 if (phba->intr_type == MSIX)
14373 /* MSI-X treated interrupt served as no EQ share INT */
14374 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14375 "0358 MSI-X interrupt with no EQE\n");
14376 else
14377 /* Non MSI-X treated on interrupt as EQ share INT */
14378 return IRQ_NONE;
14379 }
14380
ba20c853 14381 if (lpfc_fcp_look_ahead)
895427bd
JS
14382 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
14383
4f774513
JS
14384 return IRQ_HANDLED;
14385} /* lpfc_sli4_fp_intr_handler */
14386
14387/**
14388 * lpfc_sli4_intr_handler - Device-level interrupt handler for SLI-4 device
14389 * @irq: Interrupt number.
14390 * @dev_id: The device context pointer.
14391 *
14392 * This function is the device-level interrupt handler to device with SLI-4
14393 * interface spec, called from the PCI layer when either MSI or Pin-IRQ
14394 * interrupt mode is enabled and there is an event in the HBA which requires
14395 * driver attention. This function invokes the slow-path interrupt attention
14396 * handling function and fast-path interrupt attention handling function in
14397 * turn to process the relevant HBA attention events. This function is called
14398 * without any lock held. It gets the hbalock to access and update SLI data
14399 * structures.
14400 *
14401 * This function returns IRQ_HANDLED when interrupt is handled, else it
14402 * returns IRQ_NONE.
14403 **/
14404irqreturn_t
14405lpfc_sli4_intr_handler(int irq, void *dev_id)
14406{
14407 struct lpfc_hba *phba;
67d12733
JS
14408 irqreturn_t hba_irq_rc;
14409 bool hba_handled = false;
895427bd 14410 int qidx;
4f774513
JS
14411
14412 /* Get the driver's phba structure from the dev_id */
14413 phba = (struct lpfc_hba *)dev_id;
14414
14415 if (unlikely(!phba))
14416 return IRQ_NONE;
14417
4f774513
JS
14418 /*
14419 * Invoke fast-path host attention interrupt handling as appropriate.
14420 */
895427bd 14421 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++) {
67d12733 14422 hba_irq_rc = lpfc_sli4_hba_intr_handler(irq,
895427bd 14423 &phba->sli4_hba.hba_eq_hdl[qidx]);
67d12733
JS
14424 if (hba_irq_rc == IRQ_HANDLED)
14425 hba_handled |= true;
4f774513
JS
14426 }
14427
1ba981fd
JS
14428 if (phba->cfg_fof) {
14429 hba_irq_rc = lpfc_sli4_fof_intr_handler(irq,
895427bd 14430 &phba->sli4_hba.hba_eq_hdl[qidx]);
1ba981fd
JS
14431 if (hba_irq_rc == IRQ_HANDLED)
14432 hba_handled |= true;
14433 }
14434
67d12733 14435 return (hba_handled == true) ? IRQ_HANDLED : IRQ_NONE;
4f774513
JS
14436} /* lpfc_sli4_intr_handler */
14437
14438/**
14439 * lpfc_sli4_queue_free - free a queue structure and associated memory
14440 * @queue: The queue structure to free.
14441 *
b595076a 14442 * This function frees a queue structure and the DMAable memory used for
4f774513
JS
14443 * the host resident queue. This function must be called after destroying the
14444 * queue on the HBA.
14445 **/
14446void
14447lpfc_sli4_queue_free(struct lpfc_queue *queue)
14448{
14449 struct lpfc_dmabuf *dmabuf;
14450
14451 if (!queue)
14452 return;
14453
14454 while (!list_empty(&queue->page_list)) {
14455 list_remove_head(&queue->page_list, dmabuf, struct lpfc_dmabuf,
14456 list);
81b96eda 14457 dma_free_coherent(&queue->phba->pcidev->dev, queue->page_size,
4f774513
JS
14458 dmabuf->virt, dmabuf->phys);
14459 kfree(dmabuf);
14460 }
895427bd
JS
14461 if (queue->rqbp) {
14462 lpfc_free_rq_buffer(queue->phba, queue);
14463 kfree(queue->rqbp);
14464 }
d1f525aa
JS
14465
14466 if (!list_empty(&queue->wq_list))
14467 list_del(&queue->wq_list);
14468
4f774513
JS
14469 kfree(queue);
14470 return;
14471}
14472
14473/**
14474 * lpfc_sli4_queue_alloc - Allocate and initialize a queue structure
14475 * @phba: The HBA that this queue is being created on.
81b96eda 14476 * @page_size: The size of a queue page
4f774513
JS
14477 * @entry_size: The size of each queue entry for this queue.
14478 * @entry count: The number of entries that this queue will handle.
14479 *
14480 * This function allocates a queue structure and the DMAable memory used for
14481 * the host resident queue. This function must be called before creating the
14482 * queue on the HBA.
14483 **/
14484struct lpfc_queue *
81b96eda
JS
14485lpfc_sli4_queue_alloc(struct lpfc_hba *phba, uint32_t page_size,
14486 uint32_t entry_size, uint32_t entry_count)
4f774513
JS
14487{
14488 struct lpfc_queue *queue;
14489 struct lpfc_dmabuf *dmabuf;
14490 int x, total_qe_count;
14491 void *dma_pointer;
cb5172ea 14492 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
4f774513 14493
cb5172ea 14494 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 14495 hw_page_size = page_size;
cb5172ea 14496
4f774513
JS
14497 queue = kzalloc(sizeof(struct lpfc_queue) +
14498 (sizeof(union sli4_qe) * entry_count), GFP_KERNEL);
14499 if (!queue)
14500 return NULL;
cb5172ea
JS
14501 queue->page_count = (ALIGN(entry_size * entry_count,
14502 hw_page_size))/hw_page_size;
895427bd
JS
14503
14504 /* If needed, Adjust page count to match the max the adapter supports */
14505 if (queue->page_count > phba->sli4_hba.pc_sli4_params.wqpcnt)
14506 queue->page_count = phba->sli4_hba.pc_sli4_params.wqpcnt;
14507
4f774513 14508 INIT_LIST_HEAD(&queue->list);
895427bd 14509 INIT_LIST_HEAD(&queue->wq_list);
6e8e1c14 14510 INIT_LIST_HEAD(&queue->wqfull_list);
4f774513
JS
14511 INIT_LIST_HEAD(&queue->page_list);
14512 INIT_LIST_HEAD(&queue->child_list);
81b96eda
JS
14513
14514 /* Set queue parameters now. If the system cannot provide memory
14515 * resources, the free routine needs to know what was allocated.
14516 */
14517 queue->entry_size = entry_size;
14518 queue->entry_count = entry_count;
14519 queue->page_size = hw_page_size;
14520 queue->phba = phba;
14521
4f774513
JS
14522 for (x = 0, total_qe_count = 0; x < queue->page_count; x++) {
14523 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
14524 if (!dmabuf)
14525 goto out_fail;
1aee383d
JP
14526 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
14527 hw_page_size, &dmabuf->phys,
14528 GFP_KERNEL);
4f774513
JS
14529 if (!dmabuf->virt) {
14530 kfree(dmabuf);
14531 goto out_fail;
14532 }
14533 dmabuf->buffer_tag = x;
14534 list_add_tail(&dmabuf->list, &queue->page_list);
14535 /* initialize queue's entry array */
14536 dma_pointer = dmabuf->virt;
14537 for (; total_qe_count < entry_count &&
cb5172ea 14538 dma_pointer < (hw_page_size + dmabuf->virt);
4f774513
JS
14539 total_qe_count++, dma_pointer += entry_size) {
14540 queue->qe[total_qe_count].address = dma_pointer;
14541 }
14542 }
f485c18d
DK
14543 INIT_WORK(&queue->irqwork, lpfc_sli4_hba_process_cq);
14544 INIT_WORK(&queue->spwork, lpfc_sli4_sp_process_cq);
4f774513 14545
64eb4dcb
JS
14546 /* entry_repost will be set during q creation */
14547
4f774513
JS
14548 return queue;
14549out_fail:
14550 lpfc_sli4_queue_free(queue);
14551 return NULL;
14552}
14553
962bc51b
JS
14554/**
14555 * lpfc_dual_chute_pci_bar_map - Map pci base address register to host memory
14556 * @phba: HBA structure that indicates port to create a queue on.
14557 * @pci_barset: PCI BAR set flag.
14558 *
14559 * This function shall perform iomap of the specified PCI BAR address to host
14560 * memory address if not already done so and return it. The returned host
14561 * memory address can be NULL.
14562 */
14563static void __iomem *
14564lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset)
14565{
962bc51b
JS
14566 if (!phba->pcidev)
14567 return NULL;
962bc51b
JS
14568
14569 switch (pci_barset) {
14570 case WQ_PCI_BAR_0_AND_1:
962bc51b
JS
14571 return phba->pci_bar0_memmap_p;
14572 case WQ_PCI_BAR_2_AND_3:
962bc51b
JS
14573 return phba->pci_bar2_memmap_p;
14574 case WQ_PCI_BAR_4_AND_5:
962bc51b
JS
14575 return phba->pci_bar4_memmap_p;
14576 default:
14577 break;
14578 }
14579 return NULL;
14580}
14581
173edbb2 14582/**
895427bd 14583 * lpfc_modify_hba_eq_delay - Modify Delay Multiplier on FCP EQs
173edbb2
JS
14584 * @phba: HBA structure that indicates port to create a queue on.
14585 * @startq: The starting FCP EQ to modify
14586 *
14587 * This function sends an MODIFY_EQ_DELAY mailbox command to the HBA.
43140ca6
JS
14588 * The command allows up to LPFC_MAX_EQ_DELAY_EQID_CNT EQ ID's to be
14589 * updated in one mailbox command.
173edbb2
JS
14590 *
14591 * The @phba struct is used to send mailbox command to HBA. The @startq
14592 * is used to get the starting FCP EQ to change.
14593 * This function is asynchronous and will wait for the mailbox
14594 * command to finish before continuing.
14595 *
14596 * On success this function will return a zero. If unable to allocate enough
14597 * memory this function will return -ENOMEM. If the queue create mailbox command
14598 * fails this function will return -ENXIO.
14599 **/
a2fc4aef 14600int
0cf07f84
JS
14601lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
14602 uint32_t numq, uint32_t imax)
173edbb2
JS
14603{
14604 struct lpfc_mbx_modify_eq_delay *eq_delay;
14605 LPFC_MBOXQ_t *mbox;
14606 struct lpfc_queue *eq;
14607 int cnt, rc, length, status = 0;
14608 uint32_t shdr_status, shdr_add_status;
0cf07f84 14609 uint32_t result, val;
895427bd 14610 int qidx;
173edbb2
JS
14611 union lpfc_sli4_cfg_shdr *shdr;
14612 uint16_t dmult;
14613
895427bd 14614 if (startq >= phba->io_channel_irqs)
173edbb2
JS
14615 return 0;
14616
14617 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14618 if (!mbox)
14619 return -ENOMEM;
14620 length = (sizeof(struct lpfc_mbx_modify_eq_delay) -
14621 sizeof(struct lpfc_sli4_cfg_mhdr));
14622 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14623 LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY,
14624 length, LPFC_SLI4_MBX_EMBED);
14625 eq_delay = &mbox->u.mqe.un.eq_delay;
14626
14627 /* Calculate delay multiper from maximum interrupt per second */
0cf07f84 14628 result = imax / phba->io_channel_irqs;
895427bd 14629 if (result > LPFC_DMULT_CONST || result == 0)
ee02006b
JS
14630 dmult = 0;
14631 else
14632 dmult = LPFC_DMULT_CONST/result - 1;
0cf07f84
JS
14633 if (dmult > LPFC_DMULT_MAX)
14634 dmult = LPFC_DMULT_MAX;
173edbb2
JS
14635
14636 cnt = 0;
895427bd
JS
14637 for (qidx = startq; qidx < phba->io_channel_irqs; qidx++) {
14638 eq = phba->sli4_hba.hba_eq[qidx];
173edbb2
JS
14639 if (!eq)
14640 continue;
0cf07f84 14641 eq->q_mode = imax;
173edbb2
JS
14642 eq_delay->u.request.eq[cnt].eq_id = eq->queue_id;
14643 eq_delay->u.request.eq[cnt].phase = 0;
14644 eq_delay->u.request.eq[cnt].delay_multi = dmult;
14645 cnt++;
0cf07f84
JS
14646
14647 /* q_mode is only used for auto_imax */
14648 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
14649 /* Use EQ Delay Register method for q_mode */
14650
14651 /* Convert for EQ Delay register */
14652 val = phba->cfg_fcp_imax;
14653 if (val) {
14654 /* First, interrupts per sec per EQ */
14655 val = phba->cfg_fcp_imax /
14656 phba->io_channel_irqs;
14657
14658 /* us delay between each interrupt */
14659 val = LPFC_SEC_TO_USEC / val;
14660 }
14661 eq->q_mode = val;
14662 } else {
14663 eq->q_mode = imax;
14664 }
14665
14666 if (cnt >= numq)
173edbb2
JS
14667 break;
14668 }
14669 eq_delay->u.request.num_eq = cnt;
14670
14671 mbox->vport = phba->pport;
14672 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
14673 mbox->context1 = NULL;
14674 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14675 shdr = (union lpfc_sli4_cfg_shdr *) &eq_delay->header.cfg_shdr;
14676 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14677 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14678 if (shdr_status || shdr_add_status || rc) {
14679 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14680 "2512 MODIFY_EQ_DELAY mailbox failed with "
14681 "status x%x add_status x%x, mbx status x%x\n",
14682 shdr_status, shdr_add_status, rc);
14683 status = -ENXIO;
14684 }
14685 mempool_free(mbox, phba->mbox_mem_pool);
14686 return status;
14687}
14688
4f774513
JS
14689/**
14690 * lpfc_eq_create - Create an Event Queue on the HBA
14691 * @phba: HBA structure that indicates port to create a queue on.
14692 * @eq: The queue structure to use to create the event queue.
14693 * @imax: The maximum interrupt per second limit.
14694 *
14695 * This function creates an event queue, as detailed in @eq, on a port,
14696 * described by @phba by sending an EQ_CREATE mailbox command to the HBA.
14697 *
14698 * The @phba struct is used to send mailbox command to HBA. The @eq struct
14699 * is used to get the entry count and entry size that are necessary to
14700 * determine the number of pages to allocate and use for this queue. This
14701 * function will send the EQ_CREATE mailbox command to the HBA to setup the
14702 * event queue. This function is asynchronous and will wait for the mailbox
14703 * command to finish before continuing.
14704 *
14705 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14706 * memory this function will return -ENOMEM. If the queue create mailbox command
14707 * fails this function will return -ENXIO.
4f774513 14708 **/
a2fc4aef 14709int
ee02006b 14710lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
4f774513
JS
14711{
14712 struct lpfc_mbx_eq_create *eq_create;
14713 LPFC_MBOXQ_t *mbox;
14714 int rc, length, status = 0;
14715 struct lpfc_dmabuf *dmabuf;
14716 uint32_t shdr_status, shdr_add_status;
14717 union lpfc_sli4_cfg_shdr *shdr;
14718 uint16_t dmult;
49198b37
JS
14719 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14720
2e90f4b5
JS
14721 /* sanity check on queue memory */
14722 if (!eq)
14723 return -ENODEV;
49198b37
JS
14724 if (!phba->sli4_hba.pc_sli4_params.supported)
14725 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
14726
14727 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14728 if (!mbox)
14729 return -ENOMEM;
14730 length = (sizeof(struct lpfc_mbx_eq_create) -
14731 sizeof(struct lpfc_sli4_cfg_mhdr));
14732 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14733 LPFC_MBOX_OPCODE_EQ_CREATE,
14734 length, LPFC_SLI4_MBX_EMBED);
14735 eq_create = &mbox->u.mqe.un.eq_create;
7365f6fd 14736 shdr = (union lpfc_sli4_cfg_shdr *) &eq_create->header.cfg_shdr;
4f774513
JS
14737 bf_set(lpfc_mbx_eq_create_num_pages, &eq_create->u.request,
14738 eq->page_count);
14739 bf_set(lpfc_eq_context_size, &eq_create->u.request.context,
14740 LPFC_EQE_SIZE);
14741 bf_set(lpfc_eq_context_valid, &eq_create->u.request.context, 1);
7365f6fd
JS
14742
14743 /* Use version 2 of CREATE_EQ if eqav is set */
14744 if (phba->sli4_hba.pc_sli4_params.eqav) {
14745 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14746 LPFC_Q_CREATE_VERSION_2);
14747 bf_set(lpfc_eq_context_autovalid, &eq_create->u.request.context,
14748 phba->sli4_hba.pc_sli4_params.eqav);
14749 }
14750
2c9c5a00
JS
14751 /* don't setup delay multiplier using EQ_CREATE */
14752 dmult = 0;
4f774513
JS
14753 bf_set(lpfc_eq_context_delay_multi, &eq_create->u.request.context,
14754 dmult);
14755 switch (eq->entry_count) {
14756 default:
14757 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14758 "0360 Unsupported EQ count. (%d)\n",
14759 eq->entry_count);
14760 if (eq->entry_count < 256)
14761 return -EINVAL;
14762 /* otherwise default to smallest count (drop through) */
14763 case 256:
14764 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14765 LPFC_EQ_CNT_256);
14766 break;
14767 case 512:
14768 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14769 LPFC_EQ_CNT_512);
14770 break;
14771 case 1024:
14772 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14773 LPFC_EQ_CNT_1024);
14774 break;
14775 case 2048:
14776 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14777 LPFC_EQ_CNT_2048);
14778 break;
14779 case 4096:
14780 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14781 LPFC_EQ_CNT_4096);
14782 break;
14783 }
14784 list_for_each_entry(dmabuf, &eq->page_list, list) {
49198b37 14785 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
14786 eq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
14787 putPaddrLow(dmabuf->phys);
14788 eq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
14789 putPaddrHigh(dmabuf->phys);
14790 }
14791 mbox->vport = phba->pport;
14792 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
14793 mbox->context1 = NULL;
14794 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
4f774513
JS
14795 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14796 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14797 if (shdr_status || shdr_add_status || rc) {
14798 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14799 "2500 EQ_CREATE mailbox failed with "
14800 "status x%x add_status x%x, mbx status x%x\n",
14801 shdr_status, shdr_add_status, rc);
14802 status = -ENXIO;
14803 }
14804 eq->type = LPFC_EQ;
14805 eq->subtype = LPFC_NONE;
14806 eq->queue_id = bf_get(lpfc_mbx_eq_create_q_id, &eq_create->u.response);
14807 if (eq->queue_id == 0xFFFF)
14808 status = -ENXIO;
14809 eq->host_index = 0;
14810 eq->hba_index = 0;
64eb4dcb 14811 eq->entry_repost = LPFC_EQ_REPOST;
4f774513 14812
8fa38513 14813 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
14814 return status;
14815}
14816
14817/**
14818 * lpfc_cq_create - Create a Completion Queue on the HBA
14819 * @phba: HBA structure that indicates port to create a queue on.
14820 * @cq: The queue structure to use to create the completion queue.
14821 * @eq: The event queue to bind this completion queue to.
14822 *
14823 * This function creates a completion queue, as detailed in @wq, on a port,
14824 * described by @phba by sending a CQ_CREATE mailbox command to the HBA.
14825 *
14826 * The @phba struct is used to send mailbox command to HBA. The @cq struct
14827 * is used to get the entry count and entry size that are necessary to
14828 * determine the number of pages to allocate and use for this queue. The @eq
14829 * is used to indicate which event queue to bind this completion queue to. This
14830 * function will send the CQ_CREATE mailbox command to the HBA to setup the
14831 * completion queue. This function is asynchronous and will wait for the mailbox
14832 * command to finish before continuing.
14833 *
14834 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14835 * memory this function will return -ENOMEM. If the queue create mailbox command
14836 * fails this function will return -ENXIO.
4f774513 14837 **/
a2fc4aef 14838int
4f774513
JS
14839lpfc_cq_create(struct lpfc_hba *phba, struct lpfc_queue *cq,
14840 struct lpfc_queue *eq, uint32_t type, uint32_t subtype)
14841{
14842 struct lpfc_mbx_cq_create *cq_create;
14843 struct lpfc_dmabuf *dmabuf;
14844 LPFC_MBOXQ_t *mbox;
14845 int rc, length, status = 0;
14846 uint32_t shdr_status, shdr_add_status;
14847 union lpfc_sli4_cfg_shdr *shdr;
49198b37 14848
2e90f4b5
JS
14849 /* sanity check on queue memory */
14850 if (!cq || !eq)
14851 return -ENODEV;
49198b37 14852
4f774513
JS
14853 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14854 if (!mbox)
14855 return -ENOMEM;
14856 length = (sizeof(struct lpfc_mbx_cq_create) -
14857 sizeof(struct lpfc_sli4_cfg_mhdr));
14858 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14859 LPFC_MBOX_OPCODE_CQ_CREATE,
14860 length, LPFC_SLI4_MBX_EMBED);
14861 cq_create = &mbox->u.mqe.un.cq_create;
5a6f133e 14862 shdr = (union lpfc_sli4_cfg_shdr *) &cq_create->header.cfg_shdr;
4f774513
JS
14863 bf_set(lpfc_mbx_cq_create_num_pages, &cq_create->u.request,
14864 cq->page_count);
14865 bf_set(lpfc_cq_context_event, &cq_create->u.request.context, 1);
14866 bf_set(lpfc_cq_context_valid, &cq_create->u.request.context, 1);
5a6f133e
JS
14867 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14868 phba->sli4_hba.pc_sli4_params.cqv);
14869 if (phba->sli4_hba.pc_sli4_params.cqv == LPFC_Q_CREATE_VERSION_2) {
81b96eda
JS
14870 bf_set(lpfc_mbx_cq_create_page_size, &cq_create->u.request,
14871 (cq->page_size / SLI4_PAGE_SIZE));
5a6f133e
JS
14872 bf_set(lpfc_cq_eq_id_2, &cq_create->u.request.context,
14873 eq->queue_id);
7365f6fd
JS
14874 bf_set(lpfc_cq_context_autovalid, &cq_create->u.request.context,
14875 phba->sli4_hba.pc_sli4_params.cqav);
5a6f133e
JS
14876 } else {
14877 bf_set(lpfc_cq_eq_id, &cq_create->u.request.context,
14878 eq->queue_id);
14879 }
4f774513 14880 switch (cq->entry_count) {
81b96eda
JS
14881 case 2048:
14882 case 4096:
14883 if (phba->sli4_hba.pc_sli4_params.cqv ==
14884 LPFC_Q_CREATE_VERSION_2) {
14885 cq_create->u.request.context.lpfc_cq_context_count =
14886 cq->entry_count;
14887 bf_set(lpfc_cq_context_count,
14888 &cq_create->u.request.context,
14889 LPFC_CQ_CNT_WORD7);
14890 break;
14891 }
14892 /* Fall Thru */
4f774513
JS
14893 default:
14894 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2ea259ee 14895 "0361 Unsupported CQ count: "
64eb4dcb 14896 "entry cnt %d sz %d pg cnt %d\n",
2ea259ee 14897 cq->entry_count, cq->entry_size,
64eb4dcb 14898 cq->page_count);
4f4c1863
JS
14899 if (cq->entry_count < 256) {
14900 status = -EINVAL;
14901 goto out;
14902 }
4f774513
JS
14903 /* otherwise default to smallest count (drop through) */
14904 case 256:
14905 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14906 LPFC_CQ_CNT_256);
14907 break;
14908 case 512:
14909 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14910 LPFC_CQ_CNT_512);
14911 break;
14912 case 1024:
14913 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14914 LPFC_CQ_CNT_1024);
14915 break;
14916 }
14917 list_for_each_entry(dmabuf, &cq->page_list, list) {
81b96eda 14918 memset(dmabuf->virt, 0, cq->page_size);
4f774513
JS
14919 cq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
14920 putPaddrLow(dmabuf->phys);
14921 cq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
14922 putPaddrHigh(dmabuf->phys);
14923 }
14924 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14925
14926 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
14927 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14928 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14929 if (shdr_status || shdr_add_status || rc) {
14930 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14931 "2501 CQ_CREATE mailbox failed with "
14932 "status x%x add_status x%x, mbx status x%x\n",
14933 shdr_status, shdr_add_status, rc);
14934 status = -ENXIO;
14935 goto out;
14936 }
14937 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
14938 if (cq->queue_id == 0xFFFF) {
14939 status = -ENXIO;
14940 goto out;
14941 }
14942 /* link the cq onto the parent eq child list */
14943 list_add_tail(&cq->list, &eq->child_list);
14944 /* Set up completion queue's type and subtype */
14945 cq->type = type;
14946 cq->subtype = subtype;
14947 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
2a622bfb 14948 cq->assoc_qid = eq->queue_id;
4f774513
JS
14949 cq->host_index = 0;
14950 cq->hba_index = 0;
64eb4dcb 14951 cq->entry_repost = LPFC_CQ_REPOST;
4f774513 14952
8fa38513
JS
14953out:
14954 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
14955 return status;
14956}
14957
2d7dbc4c
JS
14958/**
14959 * lpfc_cq_create_set - Create a set of Completion Queues on the HBA for MRQ
14960 * @phba: HBA structure that indicates port to create a queue on.
14961 * @cqp: The queue structure array to use to create the completion queues.
14962 * @eqp: The event queue array to bind these completion queues to.
14963 *
14964 * This function creates a set of completion queue, s to support MRQ
14965 * as detailed in @cqp, on a port,
14966 * described by @phba by sending a CREATE_CQ_SET mailbox command to the HBA.
14967 *
14968 * The @phba struct is used to send mailbox command to HBA. The @cq struct
14969 * is used to get the entry count and entry size that are necessary to
14970 * determine the number of pages to allocate and use for this queue. The @eq
14971 * is used to indicate which event queue to bind this completion queue to. This
14972 * function will send the CREATE_CQ_SET mailbox command to the HBA to setup the
14973 * completion queue. This function is asynchronous and will wait for the mailbox
14974 * command to finish before continuing.
14975 *
14976 * On success this function will return a zero. If unable to allocate enough
14977 * memory this function will return -ENOMEM. If the queue create mailbox command
14978 * fails this function will return -ENXIO.
14979 **/
14980int
14981lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
14982 struct lpfc_queue **eqp, uint32_t type, uint32_t subtype)
14983{
14984 struct lpfc_queue *cq;
14985 struct lpfc_queue *eq;
14986 struct lpfc_mbx_cq_create_set *cq_set;
14987 struct lpfc_dmabuf *dmabuf;
14988 LPFC_MBOXQ_t *mbox;
14989 int rc, length, alloclen, status = 0;
14990 int cnt, idx, numcq, page_idx = 0;
14991 uint32_t shdr_status, shdr_add_status;
14992 union lpfc_sli4_cfg_shdr *shdr;
14993 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14994
14995 /* sanity check on queue memory */
14996 numcq = phba->cfg_nvmet_mrq;
14997 if (!cqp || !eqp || !numcq)
14998 return -ENODEV;
2d7dbc4c
JS
14999
15000 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15001 if (!mbox)
15002 return -ENOMEM;
15003
15004 length = sizeof(struct lpfc_mbx_cq_create_set);
15005 length += ((numcq * cqp[0]->page_count) *
15006 sizeof(struct dma_address));
15007 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15008 LPFC_MBOX_OPCODE_FCOE_CQ_CREATE_SET, length,
15009 LPFC_SLI4_MBX_NEMBED);
15010 if (alloclen < length) {
15011 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15012 "3098 Allocated DMA memory size (%d) is "
15013 "less than the requested DMA memory size "
15014 "(%d)\n", alloclen, length);
15015 status = -ENOMEM;
15016 goto out;
15017 }
15018 cq_set = mbox->sge_array->addr[0];
15019 shdr = (union lpfc_sli4_cfg_shdr *)&cq_set->cfg_shdr;
15020 bf_set(lpfc_mbox_hdr_version, &shdr->request, 0);
15021
15022 for (idx = 0; idx < numcq; idx++) {
15023 cq = cqp[idx];
15024 eq = eqp[idx];
15025 if (!cq || !eq) {
15026 status = -ENOMEM;
15027 goto out;
15028 }
81b96eda
JS
15029 if (!phba->sli4_hba.pc_sli4_params.supported)
15030 hw_page_size = cq->page_size;
2d7dbc4c
JS
15031
15032 switch (idx) {
15033 case 0:
15034 bf_set(lpfc_mbx_cq_create_set_page_size,
15035 &cq_set->u.request,
15036 (hw_page_size / SLI4_PAGE_SIZE));
15037 bf_set(lpfc_mbx_cq_create_set_num_pages,
15038 &cq_set->u.request, cq->page_count);
15039 bf_set(lpfc_mbx_cq_create_set_evt,
15040 &cq_set->u.request, 1);
15041 bf_set(lpfc_mbx_cq_create_set_valid,
15042 &cq_set->u.request, 1);
15043 bf_set(lpfc_mbx_cq_create_set_cqe_size,
15044 &cq_set->u.request, 0);
15045 bf_set(lpfc_mbx_cq_create_set_num_cq,
15046 &cq_set->u.request, numcq);
7365f6fd
JS
15047 bf_set(lpfc_mbx_cq_create_set_autovalid,
15048 &cq_set->u.request,
15049 phba->sli4_hba.pc_sli4_params.cqav);
2d7dbc4c 15050 switch (cq->entry_count) {
81b96eda
JS
15051 case 2048:
15052 case 4096:
15053 if (phba->sli4_hba.pc_sli4_params.cqv ==
15054 LPFC_Q_CREATE_VERSION_2) {
15055 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15056 &cq_set->u.request,
15057 cq->entry_count);
15058 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15059 &cq_set->u.request,
15060 LPFC_CQ_CNT_WORD7);
15061 break;
15062 }
15063 /* Fall Thru */
2d7dbc4c
JS
15064 default:
15065 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15066 "3118 Bad CQ count. (%d)\n",
15067 cq->entry_count);
15068 if (cq->entry_count < 256) {
15069 status = -EINVAL;
15070 goto out;
15071 }
15072 /* otherwise default to smallest (drop thru) */
15073 case 256:
15074 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15075 &cq_set->u.request, LPFC_CQ_CNT_256);
15076 break;
15077 case 512:
15078 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15079 &cq_set->u.request, LPFC_CQ_CNT_512);
15080 break;
15081 case 1024:
15082 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15083 &cq_set->u.request, LPFC_CQ_CNT_1024);
15084 break;
15085 }
15086 bf_set(lpfc_mbx_cq_create_set_eq_id0,
15087 &cq_set->u.request, eq->queue_id);
15088 break;
15089 case 1:
15090 bf_set(lpfc_mbx_cq_create_set_eq_id1,
15091 &cq_set->u.request, eq->queue_id);
15092 break;
15093 case 2:
15094 bf_set(lpfc_mbx_cq_create_set_eq_id2,
15095 &cq_set->u.request, eq->queue_id);
15096 break;
15097 case 3:
15098 bf_set(lpfc_mbx_cq_create_set_eq_id3,
15099 &cq_set->u.request, eq->queue_id);
15100 break;
15101 case 4:
15102 bf_set(lpfc_mbx_cq_create_set_eq_id4,
15103 &cq_set->u.request, eq->queue_id);
15104 break;
15105 case 5:
15106 bf_set(lpfc_mbx_cq_create_set_eq_id5,
15107 &cq_set->u.request, eq->queue_id);
15108 break;
15109 case 6:
15110 bf_set(lpfc_mbx_cq_create_set_eq_id6,
15111 &cq_set->u.request, eq->queue_id);
15112 break;
15113 case 7:
15114 bf_set(lpfc_mbx_cq_create_set_eq_id7,
15115 &cq_set->u.request, eq->queue_id);
15116 break;
15117 case 8:
15118 bf_set(lpfc_mbx_cq_create_set_eq_id8,
15119 &cq_set->u.request, eq->queue_id);
15120 break;
15121 case 9:
15122 bf_set(lpfc_mbx_cq_create_set_eq_id9,
15123 &cq_set->u.request, eq->queue_id);
15124 break;
15125 case 10:
15126 bf_set(lpfc_mbx_cq_create_set_eq_id10,
15127 &cq_set->u.request, eq->queue_id);
15128 break;
15129 case 11:
15130 bf_set(lpfc_mbx_cq_create_set_eq_id11,
15131 &cq_set->u.request, eq->queue_id);
15132 break;
15133 case 12:
15134 bf_set(lpfc_mbx_cq_create_set_eq_id12,
15135 &cq_set->u.request, eq->queue_id);
15136 break;
15137 case 13:
15138 bf_set(lpfc_mbx_cq_create_set_eq_id13,
15139 &cq_set->u.request, eq->queue_id);
15140 break;
15141 case 14:
15142 bf_set(lpfc_mbx_cq_create_set_eq_id14,
15143 &cq_set->u.request, eq->queue_id);
15144 break;
15145 case 15:
15146 bf_set(lpfc_mbx_cq_create_set_eq_id15,
15147 &cq_set->u.request, eq->queue_id);
15148 break;
15149 }
15150
15151 /* link the cq onto the parent eq child list */
15152 list_add_tail(&cq->list, &eq->child_list);
15153 /* Set up completion queue's type and subtype */
15154 cq->type = type;
15155 cq->subtype = subtype;
15156 cq->assoc_qid = eq->queue_id;
15157 cq->host_index = 0;
15158 cq->hba_index = 0;
64eb4dcb 15159 cq->entry_repost = LPFC_CQ_REPOST;
81b96eda 15160 cq->chann = idx;
2d7dbc4c
JS
15161
15162 rc = 0;
15163 list_for_each_entry(dmabuf, &cq->page_list, list) {
15164 memset(dmabuf->virt, 0, hw_page_size);
15165 cnt = page_idx + dmabuf->buffer_tag;
15166 cq_set->u.request.page[cnt].addr_lo =
15167 putPaddrLow(dmabuf->phys);
15168 cq_set->u.request.page[cnt].addr_hi =
15169 putPaddrHigh(dmabuf->phys);
15170 rc++;
15171 }
15172 page_idx += rc;
15173 }
15174
15175 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15176
15177 /* The IOCTL status is embedded in the mailbox subheader. */
15178 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15179 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15180 if (shdr_status || shdr_add_status || rc) {
15181 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15182 "3119 CQ_CREATE_SET mailbox failed with "
15183 "status x%x add_status x%x, mbx status x%x\n",
15184 shdr_status, shdr_add_status, rc);
15185 status = -ENXIO;
15186 goto out;
15187 }
15188 rc = bf_get(lpfc_mbx_cq_create_set_base_id, &cq_set->u.response);
15189 if (rc == 0xFFFF) {
15190 status = -ENXIO;
15191 goto out;
15192 }
15193
15194 for (idx = 0; idx < numcq; idx++) {
15195 cq = cqp[idx];
15196 cq->queue_id = rc + idx;
15197 }
15198
15199out:
15200 lpfc_sli4_mbox_cmd_free(phba, mbox);
15201 return status;
15202}
15203
b19a061a
JS
15204/**
15205 * lpfc_mq_create_fb_init - Send MCC_CREATE without async events registration
15206 * @phba: HBA structure that indicates port to create a queue on.
15207 * @mq: The queue structure to use to create the mailbox queue.
15208 * @mbox: An allocated pointer to type LPFC_MBOXQ_t
15209 * @cq: The completion queue to associate with this cq.
15210 *
15211 * This function provides failback (fb) functionality when the
15212 * mq_create_ext fails on older FW generations. It's purpose is identical
15213 * to mq_create_ext otherwise.
15214 *
15215 * This routine cannot fail as all attributes were previously accessed and
15216 * initialized in mq_create_ext.
15217 **/
15218static void
15219lpfc_mq_create_fb_init(struct lpfc_hba *phba, struct lpfc_queue *mq,
15220 LPFC_MBOXQ_t *mbox, struct lpfc_queue *cq)
15221{
15222 struct lpfc_mbx_mq_create *mq_create;
15223 struct lpfc_dmabuf *dmabuf;
15224 int length;
15225
15226 length = (sizeof(struct lpfc_mbx_mq_create) -
15227 sizeof(struct lpfc_sli4_cfg_mhdr));
15228 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15229 LPFC_MBOX_OPCODE_MQ_CREATE,
15230 length, LPFC_SLI4_MBX_EMBED);
15231 mq_create = &mbox->u.mqe.un.mq_create;
15232 bf_set(lpfc_mbx_mq_create_num_pages, &mq_create->u.request,
15233 mq->page_count);
15234 bf_set(lpfc_mq_context_cq_id, &mq_create->u.request.context,
15235 cq->queue_id);
15236 bf_set(lpfc_mq_context_valid, &mq_create->u.request.context, 1);
15237 switch (mq->entry_count) {
15238 case 16:
5a6f133e
JS
15239 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15240 LPFC_MQ_RING_SIZE_16);
b19a061a
JS
15241 break;
15242 case 32:
5a6f133e
JS
15243 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15244 LPFC_MQ_RING_SIZE_32);
b19a061a
JS
15245 break;
15246 case 64:
5a6f133e
JS
15247 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15248 LPFC_MQ_RING_SIZE_64);
b19a061a
JS
15249 break;
15250 case 128:
5a6f133e
JS
15251 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15252 LPFC_MQ_RING_SIZE_128);
b19a061a
JS
15253 break;
15254 }
15255 list_for_each_entry(dmabuf, &mq->page_list, list) {
15256 mq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15257 putPaddrLow(dmabuf->phys);
15258 mq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15259 putPaddrHigh(dmabuf->phys);
15260 }
15261}
15262
04c68496
JS
15263/**
15264 * lpfc_mq_create - Create a mailbox Queue on the HBA
15265 * @phba: HBA structure that indicates port to create a queue on.
15266 * @mq: The queue structure to use to create the mailbox queue.
b19a061a
JS
15267 * @cq: The completion queue to associate with this cq.
15268 * @subtype: The queue's subtype.
04c68496
JS
15269 *
15270 * This function creates a mailbox queue, as detailed in @mq, on a port,
15271 * described by @phba by sending a MQ_CREATE mailbox command to the HBA.
15272 *
15273 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15274 * is used to get the entry count and entry size that are necessary to
15275 * determine the number of pages to allocate and use for this queue. This
15276 * function will send the MQ_CREATE mailbox command to the HBA to setup the
15277 * mailbox queue. This function is asynchronous and will wait for the mailbox
15278 * command to finish before continuing.
15279 *
15280 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15281 * memory this function will return -ENOMEM. If the queue create mailbox command
15282 * fails this function will return -ENXIO.
04c68496 15283 **/
b19a061a 15284int32_t
04c68496
JS
15285lpfc_mq_create(struct lpfc_hba *phba, struct lpfc_queue *mq,
15286 struct lpfc_queue *cq, uint32_t subtype)
15287{
15288 struct lpfc_mbx_mq_create *mq_create;
b19a061a 15289 struct lpfc_mbx_mq_create_ext *mq_create_ext;
04c68496
JS
15290 struct lpfc_dmabuf *dmabuf;
15291 LPFC_MBOXQ_t *mbox;
15292 int rc, length, status = 0;
15293 uint32_t shdr_status, shdr_add_status;
15294 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15295 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
04c68496 15296
2e90f4b5
JS
15297 /* sanity check on queue memory */
15298 if (!mq || !cq)
15299 return -ENODEV;
49198b37
JS
15300 if (!phba->sli4_hba.pc_sli4_params.supported)
15301 hw_page_size = SLI4_PAGE_SIZE;
b19a061a 15302
04c68496
JS
15303 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15304 if (!mbox)
15305 return -ENOMEM;
b19a061a 15306 length = (sizeof(struct lpfc_mbx_mq_create_ext) -
04c68496
JS
15307 sizeof(struct lpfc_sli4_cfg_mhdr));
15308 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
b19a061a 15309 LPFC_MBOX_OPCODE_MQ_CREATE_EXT,
04c68496 15310 length, LPFC_SLI4_MBX_EMBED);
b19a061a
JS
15311
15312 mq_create_ext = &mbox->u.mqe.un.mq_create_ext;
5a6f133e 15313 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create_ext->header.cfg_shdr;
70f3c073
JS
15314 bf_set(lpfc_mbx_mq_create_ext_num_pages,
15315 &mq_create_ext->u.request, mq->page_count);
15316 bf_set(lpfc_mbx_mq_create_ext_async_evt_link,
15317 &mq_create_ext->u.request, 1);
15318 bf_set(lpfc_mbx_mq_create_ext_async_evt_fip,
b19a061a
JS
15319 &mq_create_ext->u.request, 1);
15320 bf_set(lpfc_mbx_mq_create_ext_async_evt_group5,
15321 &mq_create_ext->u.request, 1);
70f3c073
JS
15322 bf_set(lpfc_mbx_mq_create_ext_async_evt_fc,
15323 &mq_create_ext->u.request, 1);
15324 bf_set(lpfc_mbx_mq_create_ext_async_evt_sli,
15325 &mq_create_ext->u.request, 1);
b19a061a 15326 bf_set(lpfc_mq_context_valid, &mq_create_ext->u.request.context, 1);
5a6f133e
JS
15327 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15328 phba->sli4_hba.pc_sli4_params.mqv);
15329 if (phba->sli4_hba.pc_sli4_params.mqv == LPFC_Q_CREATE_VERSION_1)
15330 bf_set(lpfc_mbx_mq_create_ext_cq_id, &mq_create_ext->u.request,
15331 cq->queue_id);
15332 else
15333 bf_set(lpfc_mq_context_cq_id, &mq_create_ext->u.request.context,
15334 cq->queue_id);
04c68496
JS
15335 switch (mq->entry_count) {
15336 default:
15337 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15338 "0362 Unsupported MQ count. (%d)\n",
15339 mq->entry_count);
4f4c1863
JS
15340 if (mq->entry_count < 16) {
15341 status = -EINVAL;
15342 goto out;
15343 }
04c68496
JS
15344 /* otherwise default to smallest count (drop through) */
15345 case 16:
5a6f133e
JS
15346 bf_set(lpfc_mq_context_ring_size,
15347 &mq_create_ext->u.request.context,
15348 LPFC_MQ_RING_SIZE_16);
04c68496
JS
15349 break;
15350 case 32:
5a6f133e
JS
15351 bf_set(lpfc_mq_context_ring_size,
15352 &mq_create_ext->u.request.context,
15353 LPFC_MQ_RING_SIZE_32);
04c68496
JS
15354 break;
15355 case 64:
5a6f133e
JS
15356 bf_set(lpfc_mq_context_ring_size,
15357 &mq_create_ext->u.request.context,
15358 LPFC_MQ_RING_SIZE_64);
04c68496
JS
15359 break;
15360 case 128:
5a6f133e
JS
15361 bf_set(lpfc_mq_context_ring_size,
15362 &mq_create_ext->u.request.context,
15363 LPFC_MQ_RING_SIZE_128);
04c68496
JS
15364 break;
15365 }
15366 list_for_each_entry(dmabuf, &mq->page_list, list) {
49198b37 15367 memset(dmabuf->virt, 0, hw_page_size);
b19a061a 15368 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_lo =
04c68496 15369 putPaddrLow(dmabuf->phys);
b19a061a 15370 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_hi =
04c68496
JS
15371 putPaddrHigh(dmabuf->phys);
15372 }
15373 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
b19a061a
JS
15374 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15375 &mq_create_ext->u.response);
15376 if (rc != MBX_SUCCESS) {
15377 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15378 "2795 MQ_CREATE_EXT failed with "
15379 "status x%x. Failback to MQ_CREATE.\n",
15380 rc);
15381 lpfc_mq_create_fb_init(phba, mq, mbox, cq);
15382 mq_create = &mbox->u.mqe.un.mq_create;
15383 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15384 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create->header.cfg_shdr;
15385 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15386 &mq_create->u.response);
15387 }
15388
04c68496 15389 /* The IOCTL status is embedded in the mailbox subheader. */
04c68496
JS
15390 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15391 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15392 if (shdr_status || shdr_add_status || rc) {
15393 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15394 "2502 MQ_CREATE mailbox failed with "
15395 "status x%x add_status x%x, mbx status x%x\n",
15396 shdr_status, shdr_add_status, rc);
15397 status = -ENXIO;
15398 goto out;
15399 }
04c68496
JS
15400 if (mq->queue_id == 0xFFFF) {
15401 status = -ENXIO;
15402 goto out;
15403 }
15404 mq->type = LPFC_MQ;
2a622bfb 15405 mq->assoc_qid = cq->queue_id;
04c68496
JS
15406 mq->subtype = subtype;
15407 mq->host_index = 0;
15408 mq->hba_index = 0;
64eb4dcb 15409 mq->entry_repost = LPFC_MQ_REPOST;
04c68496
JS
15410
15411 /* link the mq onto the parent cq child list */
15412 list_add_tail(&mq->list, &cq->child_list);
15413out:
8fa38513 15414 mempool_free(mbox, phba->mbox_mem_pool);
04c68496
JS
15415 return status;
15416}
15417
4f774513
JS
15418/**
15419 * lpfc_wq_create - Create a Work Queue on the HBA
15420 * @phba: HBA structure that indicates port to create a queue on.
15421 * @wq: The queue structure to use to create the work queue.
15422 * @cq: The completion queue to bind this work queue to.
15423 * @subtype: The subtype of the work queue indicating its functionality.
15424 *
15425 * This function creates a work queue, as detailed in @wq, on a port, described
15426 * by @phba by sending a WQ_CREATE mailbox command to the HBA.
15427 *
15428 * The @phba struct is used to send mailbox command to HBA. The @wq struct
15429 * is used to get the entry count and entry size that are necessary to
15430 * determine the number of pages to allocate and use for this queue. The @cq
15431 * is used to indicate which completion queue to bind this work queue to. This
15432 * function will send the WQ_CREATE mailbox command to the HBA to setup the
15433 * work queue. This function is asynchronous and will wait for the mailbox
15434 * command to finish before continuing.
15435 *
15436 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15437 * memory this function will return -ENOMEM. If the queue create mailbox command
15438 * fails this function will return -ENXIO.
4f774513 15439 **/
a2fc4aef 15440int
4f774513
JS
15441lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq,
15442 struct lpfc_queue *cq, uint32_t subtype)
15443{
15444 struct lpfc_mbx_wq_create *wq_create;
15445 struct lpfc_dmabuf *dmabuf;
15446 LPFC_MBOXQ_t *mbox;
15447 int rc, length, status = 0;
15448 uint32_t shdr_status, shdr_add_status;
15449 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15450 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
5a6f133e 15451 struct dma_address *page;
962bc51b
JS
15452 void __iomem *bar_memmap_p;
15453 uint32_t db_offset;
15454 uint16_t pci_barset;
1351e69f
JS
15455 uint8_t dpp_barset;
15456 uint32_t dpp_offset;
15457 unsigned long pg_addr;
81b96eda 15458 uint8_t wq_create_version;
49198b37 15459
2e90f4b5
JS
15460 /* sanity check on queue memory */
15461 if (!wq || !cq)
15462 return -ENODEV;
49198b37 15463 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 15464 hw_page_size = wq->page_size;
4f774513
JS
15465
15466 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15467 if (!mbox)
15468 return -ENOMEM;
15469 length = (sizeof(struct lpfc_mbx_wq_create) -
15470 sizeof(struct lpfc_sli4_cfg_mhdr));
15471 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15472 LPFC_MBOX_OPCODE_FCOE_WQ_CREATE,
15473 length, LPFC_SLI4_MBX_EMBED);
15474 wq_create = &mbox->u.mqe.un.wq_create;
5a6f133e 15475 shdr = (union lpfc_sli4_cfg_shdr *) &wq_create->header.cfg_shdr;
4f774513
JS
15476 bf_set(lpfc_mbx_wq_create_num_pages, &wq_create->u.request,
15477 wq->page_count);
15478 bf_set(lpfc_mbx_wq_create_cq_id, &wq_create->u.request,
15479 cq->queue_id);
0c651878
JS
15480
15481 /* wqv is the earliest version supported, NOT the latest */
5a6f133e
JS
15482 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15483 phba->sli4_hba.pc_sli4_params.wqv);
962bc51b 15484
c176ffa0
JS
15485 if ((phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT) ||
15486 (wq->page_size > SLI4_PAGE_SIZE))
81b96eda
JS
15487 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15488 else
15489 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15490
0c651878 15491
1351e69f
JS
15492 if (phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT)
15493 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15494 else
15495 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15496
15497 switch (wq_create_version) {
0c651878 15498 case LPFC_Q_CREATE_VERSION_1:
5a6f133e
JS
15499 bf_set(lpfc_mbx_wq_create_wqe_count, &wq_create->u.request_1,
15500 wq->entry_count);
3f247de7
JS
15501 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15502 LPFC_Q_CREATE_VERSION_1);
15503
5a6f133e
JS
15504 switch (wq->entry_size) {
15505 default:
15506 case 64:
15507 bf_set(lpfc_mbx_wq_create_wqe_size,
15508 &wq_create->u.request_1,
15509 LPFC_WQ_WQE_SIZE_64);
15510 break;
15511 case 128:
15512 bf_set(lpfc_mbx_wq_create_wqe_size,
15513 &wq_create->u.request_1,
15514 LPFC_WQ_WQE_SIZE_128);
15515 break;
15516 }
1351e69f
JS
15517 /* Request DPP by default */
15518 bf_set(lpfc_mbx_wq_create_dpp_req, &wq_create->u.request_1, 1);
8ea73db4
JS
15519 bf_set(lpfc_mbx_wq_create_page_size,
15520 &wq_create->u.request_1,
81b96eda 15521 (wq->page_size / SLI4_PAGE_SIZE));
5a6f133e 15522 page = wq_create->u.request_1.page;
0c651878
JS
15523 break;
15524 default:
1351e69f
JS
15525 page = wq_create->u.request.page;
15526 break;
5a6f133e 15527 }
0c651878 15528
4f774513 15529 list_for_each_entry(dmabuf, &wq->page_list, list) {
49198b37 15530 memset(dmabuf->virt, 0, hw_page_size);
5a6f133e
JS
15531 page[dmabuf->buffer_tag].addr_lo = putPaddrLow(dmabuf->phys);
15532 page[dmabuf->buffer_tag].addr_hi = putPaddrHigh(dmabuf->phys);
4f774513 15533 }
962bc51b
JS
15534
15535 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15536 bf_set(lpfc_mbx_wq_create_dua, &wq_create->u.request, 1);
15537
4f774513
JS
15538 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15539 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15540 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15541 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15542 if (shdr_status || shdr_add_status || rc) {
15543 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15544 "2503 WQ_CREATE mailbox failed with "
15545 "status x%x add_status x%x, mbx status x%x\n",
15546 shdr_status, shdr_add_status, rc);
15547 status = -ENXIO;
15548 goto out;
15549 }
1351e69f
JS
15550
15551 if (wq_create_version == LPFC_Q_CREATE_VERSION_0)
15552 wq->queue_id = bf_get(lpfc_mbx_wq_create_q_id,
15553 &wq_create->u.response);
15554 else
15555 wq->queue_id = bf_get(lpfc_mbx_wq_create_v1_q_id,
15556 &wq_create->u.response_1);
15557
4f774513
JS
15558 if (wq->queue_id == 0xFFFF) {
15559 status = -ENXIO;
15560 goto out;
15561 }
1351e69f
JS
15562
15563 wq->db_format = LPFC_DB_LIST_FORMAT;
15564 if (wq_create_version == LPFC_Q_CREATE_VERSION_0) {
15565 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15566 wq->db_format = bf_get(lpfc_mbx_wq_create_db_format,
15567 &wq_create->u.response);
15568 if ((wq->db_format != LPFC_DB_LIST_FORMAT) &&
15569 (wq->db_format != LPFC_DB_RING_FORMAT)) {
15570 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15571 "3265 WQ[%d] doorbell format "
15572 "not supported: x%x\n",
15573 wq->queue_id, wq->db_format);
15574 status = -EINVAL;
15575 goto out;
15576 }
15577 pci_barset = bf_get(lpfc_mbx_wq_create_bar_set,
15578 &wq_create->u.response);
15579 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15580 pci_barset);
15581 if (!bar_memmap_p) {
15582 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15583 "3263 WQ[%d] failed to memmap "
15584 "pci barset:x%x\n",
15585 wq->queue_id, pci_barset);
15586 status = -ENOMEM;
15587 goto out;
15588 }
15589 db_offset = wq_create->u.response.doorbell_offset;
15590 if ((db_offset != LPFC_ULP0_WQ_DOORBELL) &&
15591 (db_offset != LPFC_ULP1_WQ_DOORBELL)) {
15592 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15593 "3252 WQ[%d] doorbell offset "
15594 "not supported: x%x\n",
15595 wq->queue_id, db_offset);
15596 status = -EINVAL;
15597 goto out;
15598 }
15599 wq->db_regaddr = bar_memmap_p + db_offset;
15600 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15601 "3264 WQ[%d]: barset:x%x, offset:x%x, "
15602 "format:x%x\n", wq->queue_id,
15603 pci_barset, db_offset, wq->db_format);
15604 } else
15605 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15606 } else {
1351e69f
JS
15607 /* Check if DPP was honored by the firmware */
15608 wq->dpp_enable = bf_get(lpfc_mbx_wq_create_dpp_rsp,
15609 &wq_create->u.response_1);
15610 if (wq->dpp_enable) {
15611 pci_barset = bf_get(lpfc_mbx_wq_create_v1_bar_set,
15612 &wq_create->u.response_1);
15613 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15614 pci_barset);
15615 if (!bar_memmap_p) {
15616 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15617 "3267 WQ[%d] failed to memmap "
15618 "pci barset:x%x\n",
15619 wq->queue_id, pci_barset);
15620 status = -ENOMEM;
15621 goto out;
15622 }
15623 db_offset = wq_create->u.response_1.doorbell_offset;
15624 wq->db_regaddr = bar_memmap_p + db_offset;
15625 wq->dpp_id = bf_get(lpfc_mbx_wq_create_dpp_id,
15626 &wq_create->u.response_1);
15627 dpp_barset = bf_get(lpfc_mbx_wq_create_dpp_bar,
15628 &wq_create->u.response_1);
15629 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15630 dpp_barset);
15631 if (!bar_memmap_p) {
15632 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15633 "3268 WQ[%d] failed to memmap "
15634 "pci barset:x%x\n",
15635 wq->queue_id, dpp_barset);
15636 status = -ENOMEM;
15637 goto out;
15638 }
15639 dpp_offset = wq_create->u.response_1.dpp_offset;
15640 wq->dpp_regaddr = bar_memmap_p + dpp_offset;
15641 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15642 "3271 WQ[%d]: barset:x%x, offset:x%x, "
15643 "dpp_id:x%x dpp_barset:x%x "
15644 "dpp_offset:x%x\n",
15645 wq->queue_id, pci_barset, db_offset,
15646 wq->dpp_id, dpp_barset, dpp_offset);
15647
15648 /* Enable combined writes for DPP aperture */
15649 pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK;
15650#ifdef CONFIG_X86
15651 rc = set_memory_wc(pg_addr, 1);
15652 if (rc) {
15653 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15654 "3272 Cannot setup Combined "
15655 "Write on WQ[%d] - disable DPP\n",
15656 wq->queue_id);
15657 phba->cfg_enable_dpp = 0;
15658 }
15659#else
15660 phba->cfg_enable_dpp = 0;
15661#endif
15662 } else
15663 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15664 }
895427bd
JS
15665 wq->pring = kzalloc(sizeof(struct lpfc_sli_ring), GFP_KERNEL);
15666 if (wq->pring == NULL) {
15667 status = -ENOMEM;
15668 goto out;
15669 }
4f774513 15670 wq->type = LPFC_WQ;
2a622bfb 15671 wq->assoc_qid = cq->queue_id;
4f774513
JS
15672 wq->subtype = subtype;
15673 wq->host_index = 0;
15674 wq->hba_index = 0;
ff78d8f9 15675 wq->entry_repost = LPFC_RELEASE_NOTIFICATION_INTERVAL;
4f774513
JS
15676
15677 /* link the wq onto the parent cq child list */
15678 list_add_tail(&wq->list, &cq->child_list);
15679out:
8fa38513 15680 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15681 return status;
15682}
15683
15684/**
15685 * lpfc_rq_create - Create a Receive Queue on the HBA
15686 * @phba: HBA structure that indicates port to create a queue on.
15687 * @hrq: The queue structure to use to create the header receive queue.
15688 * @drq: The queue structure to use to create the data receive queue.
15689 * @cq: The completion queue to bind this work queue to.
15690 *
15691 * This function creates a receive buffer queue pair , as detailed in @hrq and
15692 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15693 * to the HBA.
15694 *
15695 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15696 * struct is used to get the entry count that is necessary to determine the
15697 * number of pages to use for this queue. The @cq is used to indicate which
15698 * completion queue to bind received buffers that are posted to these queues to.
15699 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15700 * receive queue pair. This function is asynchronous and will wait for the
15701 * mailbox command to finish before continuing.
15702 *
15703 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15704 * memory this function will return -ENOMEM. If the queue create mailbox command
15705 * fails this function will return -ENXIO.
4f774513 15706 **/
a2fc4aef 15707int
4f774513
JS
15708lpfc_rq_create(struct lpfc_hba *phba, struct lpfc_queue *hrq,
15709 struct lpfc_queue *drq, struct lpfc_queue *cq, uint32_t subtype)
15710{
15711 struct lpfc_mbx_rq_create *rq_create;
15712 struct lpfc_dmabuf *dmabuf;
15713 LPFC_MBOXQ_t *mbox;
15714 int rc, length, status = 0;
15715 uint32_t shdr_status, shdr_add_status;
15716 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15717 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
962bc51b
JS
15718 void __iomem *bar_memmap_p;
15719 uint32_t db_offset;
15720 uint16_t pci_barset;
49198b37 15721
2e90f4b5
JS
15722 /* sanity check on queue memory */
15723 if (!hrq || !drq || !cq)
15724 return -ENODEV;
49198b37
JS
15725 if (!phba->sli4_hba.pc_sli4_params.supported)
15726 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
15727
15728 if (hrq->entry_count != drq->entry_count)
15729 return -EINVAL;
15730 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15731 if (!mbox)
15732 return -ENOMEM;
15733 length = (sizeof(struct lpfc_mbx_rq_create) -
15734 sizeof(struct lpfc_sli4_cfg_mhdr));
15735 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15736 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15737 length, LPFC_SLI4_MBX_EMBED);
15738 rq_create = &mbox->u.mqe.un.rq_create;
5a6f133e
JS
15739 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
15740 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15741 phba->sli4_hba.pc_sli4_params.rqv);
15742 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15743 bf_set(lpfc_rq_context_rqe_count_1,
15744 &rq_create->u.request.context,
15745 hrq->entry_count);
15746 rq_create->u.request.context.buffer_size = LPFC_HDR_BUF_SIZE;
c31098ce
JS
15747 bf_set(lpfc_rq_context_rqe_size,
15748 &rq_create->u.request.context,
15749 LPFC_RQE_SIZE_8);
15750 bf_set(lpfc_rq_context_page_size,
15751 &rq_create->u.request.context,
8ea73db4 15752 LPFC_RQ_PAGE_SIZE_4096);
5a6f133e
JS
15753 } else {
15754 switch (hrq->entry_count) {
15755 default:
15756 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15757 "2535 Unsupported RQ count. (%d)\n",
15758 hrq->entry_count);
4f4c1863
JS
15759 if (hrq->entry_count < 512) {
15760 status = -EINVAL;
15761 goto out;
15762 }
5a6f133e
JS
15763 /* otherwise default to smallest count (drop through) */
15764 case 512:
15765 bf_set(lpfc_rq_context_rqe_count,
15766 &rq_create->u.request.context,
15767 LPFC_RQ_RING_SIZE_512);
15768 break;
15769 case 1024:
15770 bf_set(lpfc_rq_context_rqe_count,
15771 &rq_create->u.request.context,
15772 LPFC_RQ_RING_SIZE_1024);
15773 break;
15774 case 2048:
15775 bf_set(lpfc_rq_context_rqe_count,
15776 &rq_create->u.request.context,
15777 LPFC_RQ_RING_SIZE_2048);
15778 break;
15779 case 4096:
15780 bf_set(lpfc_rq_context_rqe_count,
15781 &rq_create->u.request.context,
15782 LPFC_RQ_RING_SIZE_4096);
15783 break;
15784 }
15785 bf_set(lpfc_rq_context_buf_size, &rq_create->u.request.context,
15786 LPFC_HDR_BUF_SIZE);
4f774513
JS
15787 }
15788 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
15789 cq->queue_id);
15790 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
15791 hrq->page_count);
4f774513 15792 list_for_each_entry(dmabuf, &hrq->page_list, list) {
49198b37 15793 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
15794 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15795 putPaddrLow(dmabuf->phys);
15796 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15797 putPaddrHigh(dmabuf->phys);
15798 }
962bc51b
JS
15799 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15800 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
15801
4f774513
JS
15802 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15803 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15804 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15805 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15806 if (shdr_status || shdr_add_status || rc) {
15807 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15808 "2504 RQ_CREATE mailbox failed with "
15809 "status x%x add_status x%x, mbx status x%x\n",
15810 shdr_status, shdr_add_status, rc);
15811 status = -ENXIO;
15812 goto out;
15813 }
15814 hrq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15815 if (hrq->queue_id == 0xFFFF) {
15816 status = -ENXIO;
15817 goto out;
15818 }
962bc51b
JS
15819
15820 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15821 hrq->db_format = bf_get(lpfc_mbx_rq_create_db_format,
15822 &rq_create->u.response);
15823 if ((hrq->db_format != LPFC_DB_LIST_FORMAT) &&
15824 (hrq->db_format != LPFC_DB_RING_FORMAT)) {
15825 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15826 "3262 RQ [%d] doorbell format not "
15827 "supported: x%x\n", hrq->queue_id,
15828 hrq->db_format);
15829 status = -EINVAL;
15830 goto out;
15831 }
15832
15833 pci_barset = bf_get(lpfc_mbx_rq_create_bar_set,
15834 &rq_create->u.response);
15835 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba, pci_barset);
15836 if (!bar_memmap_p) {
15837 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15838 "3269 RQ[%d] failed to memmap pci "
15839 "barset:x%x\n", hrq->queue_id,
15840 pci_barset);
15841 status = -ENOMEM;
15842 goto out;
15843 }
15844
15845 db_offset = rq_create->u.response.doorbell_offset;
15846 if ((db_offset != LPFC_ULP0_RQ_DOORBELL) &&
15847 (db_offset != LPFC_ULP1_RQ_DOORBELL)) {
15848 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15849 "3270 RQ[%d] doorbell offset not "
15850 "supported: x%x\n", hrq->queue_id,
15851 db_offset);
15852 status = -EINVAL;
15853 goto out;
15854 }
15855 hrq->db_regaddr = bar_memmap_p + db_offset;
15856 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a22e7db3
JS
15857 "3266 RQ[qid:%d]: barset:x%x, offset:x%x, "
15858 "format:x%x\n", hrq->queue_id, pci_barset,
15859 db_offset, hrq->db_format);
962bc51b
JS
15860 } else {
15861 hrq->db_format = LPFC_DB_RING_FORMAT;
15862 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
15863 }
4f774513 15864 hrq->type = LPFC_HRQ;
2a622bfb 15865 hrq->assoc_qid = cq->queue_id;
4f774513
JS
15866 hrq->subtype = subtype;
15867 hrq->host_index = 0;
15868 hrq->hba_index = 0;
61f3d4bf 15869 hrq->entry_repost = LPFC_RQ_REPOST;
4f774513
JS
15870
15871 /* now create the data queue */
15872 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15873 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15874 length, LPFC_SLI4_MBX_EMBED);
5a6f133e
JS
15875 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15876 phba->sli4_hba.pc_sli4_params.rqv);
15877 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15878 bf_set(lpfc_rq_context_rqe_count_1,
c31098ce 15879 &rq_create->u.request.context, hrq->entry_count);
3c603be9
JS
15880 if (subtype == LPFC_NVMET)
15881 rq_create->u.request.context.buffer_size =
15882 LPFC_NVMET_DATA_BUF_SIZE;
15883 else
15884 rq_create->u.request.context.buffer_size =
15885 LPFC_DATA_BUF_SIZE;
c31098ce
JS
15886 bf_set(lpfc_rq_context_rqe_size, &rq_create->u.request.context,
15887 LPFC_RQE_SIZE_8);
15888 bf_set(lpfc_rq_context_page_size, &rq_create->u.request.context,
15889 (PAGE_SIZE/SLI4_PAGE_SIZE));
5a6f133e
JS
15890 } else {
15891 switch (drq->entry_count) {
15892 default:
15893 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15894 "2536 Unsupported RQ count. (%d)\n",
15895 drq->entry_count);
4f4c1863
JS
15896 if (drq->entry_count < 512) {
15897 status = -EINVAL;
15898 goto out;
15899 }
5a6f133e
JS
15900 /* otherwise default to smallest count (drop through) */
15901 case 512:
15902 bf_set(lpfc_rq_context_rqe_count,
15903 &rq_create->u.request.context,
15904 LPFC_RQ_RING_SIZE_512);
15905 break;
15906 case 1024:
15907 bf_set(lpfc_rq_context_rqe_count,
15908 &rq_create->u.request.context,
15909 LPFC_RQ_RING_SIZE_1024);
15910 break;
15911 case 2048:
15912 bf_set(lpfc_rq_context_rqe_count,
15913 &rq_create->u.request.context,
15914 LPFC_RQ_RING_SIZE_2048);
15915 break;
15916 case 4096:
15917 bf_set(lpfc_rq_context_rqe_count,
15918 &rq_create->u.request.context,
15919 LPFC_RQ_RING_SIZE_4096);
15920 break;
15921 }
3c603be9
JS
15922 if (subtype == LPFC_NVMET)
15923 bf_set(lpfc_rq_context_buf_size,
15924 &rq_create->u.request.context,
15925 LPFC_NVMET_DATA_BUF_SIZE);
15926 else
15927 bf_set(lpfc_rq_context_buf_size,
15928 &rq_create->u.request.context,
15929 LPFC_DATA_BUF_SIZE);
4f774513
JS
15930 }
15931 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
15932 cq->queue_id);
15933 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
15934 drq->page_count);
4f774513
JS
15935 list_for_each_entry(dmabuf, &drq->page_list, list) {
15936 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15937 putPaddrLow(dmabuf->phys);
15938 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15939 putPaddrHigh(dmabuf->phys);
15940 }
962bc51b
JS
15941 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15942 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
4f774513
JS
15943 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15944 /* The IOCTL status is embedded in the mailbox subheader. */
15945 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
15946 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15947 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15948 if (shdr_status || shdr_add_status || rc) {
15949 status = -ENXIO;
15950 goto out;
15951 }
15952 drq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15953 if (drq->queue_id == 0xFFFF) {
15954 status = -ENXIO;
15955 goto out;
15956 }
15957 drq->type = LPFC_DRQ;
2a622bfb 15958 drq->assoc_qid = cq->queue_id;
4f774513
JS
15959 drq->subtype = subtype;
15960 drq->host_index = 0;
15961 drq->hba_index = 0;
61f3d4bf 15962 drq->entry_repost = LPFC_RQ_REPOST;
4f774513
JS
15963
15964 /* link the header and data RQs onto the parent cq child list */
15965 list_add_tail(&hrq->list, &cq->child_list);
15966 list_add_tail(&drq->list, &cq->child_list);
15967
15968out:
8fa38513 15969 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15970 return status;
15971}
15972
2d7dbc4c
JS
15973/**
15974 * lpfc_mrq_create - Create MRQ Receive Queues on the HBA
15975 * @phba: HBA structure that indicates port to create a queue on.
15976 * @hrqp: The queue structure array to use to create the header receive queues.
15977 * @drqp: The queue structure array to use to create the data receive queues.
15978 * @cqp: The completion queue array to bind these receive queues to.
15979 *
15980 * This function creates a receive buffer queue pair , as detailed in @hrq and
15981 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15982 * to the HBA.
15983 *
15984 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15985 * struct is used to get the entry count that is necessary to determine the
15986 * number of pages to use for this queue. The @cq is used to indicate which
15987 * completion queue to bind received buffers that are posted to these queues to.
15988 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15989 * receive queue pair. This function is asynchronous and will wait for the
15990 * mailbox command to finish before continuing.
15991 *
15992 * On success this function will return a zero. If unable to allocate enough
15993 * memory this function will return -ENOMEM. If the queue create mailbox command
15994 * fails this function will return -ENXIO.
15995 **/
15996int
15997lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
15998 struct lpfc_queue **drqp, struct lpfc_queue **cqp,
15999 uint32_t subtype)
16000{
16001 struct lpfc_queue *hrq, *drq, *cq;
16002 struct lpfc_mbx_rq_create_v2 *rq_create;
16003 struct lpfc_dmabuf *dmabuf;
16004 LPFC_MBOXQ_t *mbox;
16005 int rc, length, alloclen, status = 0;
16006 int cnt, idx, numrq, page_idx = 0;
16007 uint32_t shdr_status, shdr_add_status;
16008 union lpfc_sli4_cfg_shdr *shdr;
16009 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
16010
16011 numrq = phba->cfg_nvmet_mrq;
16012 /* sanity check on array memory */
16013 if (!hrqp || !drqp || !cqp || !numrq)
16014 return -ENODEV;
16015 if (!phba->sli4_hba.pc_sli4_params.supported)
16016 hw_page_size = SLI4_PAGE_SIZE;
16017
16018 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16019 if (!mbox)
16020 return -ENOMEM;
16021
16022 length = sizeof(struct lpfc_mbx_rq_create_v2);
16023 length += ((2 * numrq * hrqp[0]->page_count) *
16024 sizeof(struct dma_address));
16025
16026 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16027 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE, length,
16028 LPFC_SLI4_MBX_NEMBED);
16029 if (alloclen < length) {
16030 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16031 "3099 Allocated DMA memory size (%d) is "
16032 "less than the requested DMA memory size "
16033 "(%d)\n", alloclen, length);
16034 status = -ENOMEM;
16035 goto out;
16036 }
16037
16038
16039
16040 rq_create = mbox->sge_array->addr[0];
16041 shdr = (union lpfc_sli4_cfg_shdr *)&rq_create->cfg_shdr;
16042
16043 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_Q_CREATE_VERSION_2);
16044 cnt = 0;
16045
16046 for (idx = 0; idx < numrq; idx++) {
16047 hrq = hrqp[idx];
16048 drq = drqp[idx];
16049 cq = cqp[idx];
16050
2d7dbc4c
JS
16051 /* sanity check on queue memory */
16052 if (!hrq || !drq || !cq) {
16053 status = -ENODEV;
16054 goto out;
16055 }
16056
7aabe84b
JS
16057 if (hrq->entry_count != drq->entry_count) {
16058 status = -EINVAL;
16059 goto out;
16060 }
16061
2d7dbc4c
JS
16062 if (idx == 0) {
16063 bf_set(lpfc_mbx_rq_create_num_pages,
16064 &rq_create->u.request,
16065 hrq->page_count);
16066 bf_set(lpfc_mbx_rq_create_rq_cnt,
16067 &rq_create->u.request, (numrq * 2));
16068 bf_set(lpfc_mbx_rq_create_dnb, &rq_create->u.request,
16069 1);
16070 bf_set(lpfc_rq_context_base_cq,
16071 &rq_create->u.request.context,
16072 cq->queue_id);
16073 bf_set(lpfc_rq_context_data_size,
16074 &rq_create->u.request.context,
3c603be9 16075 LPFC_NVMET_DATA_BUF_SIZE);
2d7dbc4c
JS
16076 bf_set(lpfc_rq_context_hdr_size,
16077 &rq_create->u.request.context,
16078 LPFC_HDR_BUF_SIZE);
16079 bf_set(lpfc_rq_context_rqe_count_1,
16080 &rq_create->u.request.context,
16081 hrq->entry_count);
16082 bf_set(lpfc_rq_context_rqe_size,
16083 &rq_create->u.request.context,
16084 LPFC_RQE_SIZE_8);
16085 bf_set(lpfc_rq_context_page_size,
16086 &rq_create->u.request.context,
16087 (PAGE_SIZE/SLI4_PAGE_SIZE));
16088 }
16089 rc = 0;
16090 list_for_each_entry(dmabuf, &hrq->page_list, list) {
16091 memset(dmabuf->virt, 0, hw_page_size);
16092 cnt = page_idx + dmabuf->buffer_tag;
16093 rq_create->u.request.page[cnt].addr_lo =
16094 putPaddrLow(dmabuf->phys);
16095 rq_create->u.request.page[cnt].addr_hi =
16096 putPaddrHigh(dmabuf->phys);
16097 rc++;
16098 }
16099 page_idx += rc;
16100
16101 rc = 0;
16102 list_for_each_entry(dmabuf, &drq->page_list, list) {
16103 memset(dmabuf->virt, 0, hw_page_size);
16104 cnt = page_idx + dmabuf->buffer_tag;
16105 rq_create->u.request.page[cnt].addr_lo =
16106 putPaddrLow(dmabuf->phys);
16107 rq_create->u.request.page[cnt].addr_hi =
16108 putPaddrHigh(dmabuf->phys);
16109 rc++;
16110 }
16111 page_idx += rc;
16112
16113 hrq->db_format = LPFC_DB_RING_FORMAT;
16114 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16115 hrq->type = LPFC_HRQ;
16116 hrq->assoc_qid = cq->queue_id;
16117 hrq->subtype = subtype;
16118 hrq->host_index = 0;
16119 hrq->hba_index = 0;
61f3d4bf 16120 hrq->entry_repost = LPFC_RQ_REPOST;
2d7dbc4c
JS
16121
16122 drq->db_format = LPFC_DB_RING_FORMAT;
16123 drq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16124 drq->type = LPFC_DRQ;
16125 drq->assoc_qid = cq->queue_id;
16126 drq->subtype = subtype;
16127 drq->host_index = 0;
16128 drq->hba_index = 0;
61f3d4bf 16129 drq->entry_repost = LPFC_RQ_REPOST;
2d7dbc4c
JS
16130
16131 list_add_tail(&hrq->list, &cq->child_list);
16132 list_add_tail(&drq->list, &cq->child_list);
16133 }
16134
16135 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16136 /* The IOCTL status is embedded in the mailbox subheader. */
16137 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16138 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16139 if (shdr_status || shdr_add_status || rc) {
16140 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16141 "3120 RQ_CREATE mailbox failed with "
16142 "status x%x add_status x%x, mbx status x%x\n",
16143 shdr_status, shdr_add_status, rc);
16144 status = -ENXIO;
16145 goto out;
16146 }
16147 rc = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16148 if (rc == 0xFFFF) {
16149 status = -ENXIO;
16150 goto out;
16151 }
16152
16153 /* Initialize all RQs with associated queue id */
16154 for (idx = 0; idx < numrq; idx++) {
16155 hrq = hrqp[idx];
16156 hrq->queue_id = rc + (2 * idx);
16157 drq = drqp[idx];
16158 drq->queue_id = rc + (2 * idx) + 1;
16159 }
16160
16161out:
16162 lpfc_sli4_mbox_cmd_free(phba, mbox);
16163 return status;
16164}
16165
4f774513
JS
16166/**
16167 * lpfc_eq_destroy - Destroy an event Queue on the HBA
16168 * @eq: The queue structure associated with the queue to destroy.
16169 *
16170 * This function destroys a queue, as detailed in @eq by sending an mailbox
16171 * command, specific to the type of queue, to the HBA.
16172 *
16173 * The @eq struct is used to get the queue ID of the queue to destroy.
16174 *
16175 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16176 * command fails this function will return -ENXIO.
4f774513 16177 **/
a2fc4aef 16178int
4f774513
JS
16179lpfc_eq_destroy(struct lpfc_hba *phba, struct lpfc_queue *eq)
16180{
16181 LPFC_MBOXQ_t *mbox;
16182 int rc, length, status = 0;
16183 uint32_t shdr_status, shdr_add_status;
16184 union lpfc_sli4_cfg_shdr *shdr;
16185
2e90f4b5 16186 /* sanity check on queue memory */
4f774513
JS
16187 if (!eq)
16188 return -ENODEV;
16189 mbox = mempool_alloc(eq->phba->mbox_mem_pool, GFP_KERNEL);
16190 if (!mbox)
16191 return -ENOMEM;
16192 length = (sizeof(struct lpfc_mbx_eq_destroy) -
16193 sizeof(struct lpfc_sli4_cfg_mhdr));
16194 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16195 LPFC_MBOX_OPCODE_EQ_DESTROY,
16196 length, LPFC_SLI4_MBX_EMBED);
16197 bf_set(lpfc_mbx_eq_destroy_q_id, &mbox->u.mqe.un.eq_destroy.u.request,
16198 eq->queue_id);
16199 mbox->vport = eq->phba->pport;
16200 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16201
16202 rc = lpfc_sli_issue_mbox(eq->phba, mbox, MBX_POLL);
16203 /* The IOCTL status is embedded in the mailbox subheader. */
16204 shdr = (union lpfc_sli4_cfg_shdr *)
16205 &mbox->u.mqe.un.eq_destroy.header.cfg_shdr;
16206 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16207 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16208 if (shdr_status || shdr_add_status || rc) {
16209 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16210 "2505 EQ_DESTROY mailbox failed with "
16211 "status x%x add_status x%x, mbx status x%x\n",
16212 shdr_status, shdr_add_status, rc);
16213 status = -ENXIO;
16214 }
16215
16216 /* Remove eq from any list */
16217 list_del_init(&eq->list);
8fa38513 16218 mempool_free(mbox, eq->phba->mbox_mem_pool);
4f774513
JS
16219 return status;
16220}
16221
16222/**
16223 * lpfc_cq_destroy - Destroy a Completion Queue on the HBA
16224 * @cq: The queue structure associated with the queue to destroy.
16225 *
16226 * This function destroys a queue, as detailed in @cq by sending an mailbox
16227 * command, specific to the type of queue, to the HBA.
16228 *
16229 * The @cq struct is used to get the queue ID of the queue to destroy.
16230 *
16231 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16232 * command fails this function will return -ENXIO.
4f774513 16233 **/
a2fc4aef 16234int
4f774513
JS
16235lpfc_cq_destroy(struct lpfc_hba *phba, struct lpfc_queue *cq)
16236{
16237 LPFC_MBOXQ_t *mbox;
16238 int rc, length, status = 0;
16239 uint32_t shdr_status, shdr_add_status;
16240 union lpfc_sli4_cfg_shdr *shdr;
16241
2e90f4b5 16242 /* sanity check on queue memory */
4f774513
JS
16243 if (!cq)
16244 return -ENODEV;
16245 mbox = mempool_alloc(cq->phba->mbox_mem_pool, GFP_KERNEL);
16246 if (!mbox)
16247 return -ENOMEM;
16248 length = (sizeof(struct lpfc_mbx_cq_destroy) -
16249 sizeof(struct lpfc_sli4_cfg_mhdr));
16250 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16251 LPFC_MBOX_OPCODE_CQ_DESTROY,
16252 length, LPFC_SLI4_MBX_EMBED);
16253 bf_set(lpfc_mbx_cq_destroy_q_id, &mbox->u.mqe.un.cq_destroy.u.request,
16254 cq->queue_id);
16255 mbox->vport = cq->phba->pport;
16256 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16257 rc = lpfc_sli_issue_mbox(cq->phba, mbox, MBX_POLL);
16258 /* The IOCTL status is embedded in the mailbox subheader. */
16259 shdr = (union lpfc_sli4_cfg_shdr *)
16260 &mbox->u.mqe.un.wq_create.header.cfg_shdr;
16261 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16262 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16263 if (shdr_status || shdr_add_status || rc) {
16264 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16265 "2506 CQ_DESTROY mailbox failed with "
16266 "status x%x add_status x%x, mbx status x%x\n",
16267 shdr_status, shdr_add_status, rc);
16268 status = -ENXIO;
16269 }
16270 /* Remove cq from any list */
16271 list_del_init(&cq->list);
8fa38513 16272 mempool_free(mbox, cq->phba->mbox_mem_pool);
4f774513
JS
16273 return status;
16274}
16275
04c68496
JS
16276/**
16277 * lpfc_mq_destroy - Destroy a Mailbox Queue on the HBA
16278 * @qm: The queue structure associated with the queue to destroy.
16279 *
16280 * This function destroys a queue, as detailed in @mq by sending an mailbox
16281 * command, specific to the type of queue, to the HBA.
16282 *
16283 * The @mq struct is used to get the queue ID of the queue to destroy.
16284 *
16285 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16286 * command fails this function will return -ENXIO.
04c68496 16287 **/
a2fc4aef 16288int
04c68496
JS
16289lpfc_mq_destroy(struct lpfc_hba *phba, struct lpfc_queue *mq)
16290{
16291 LPFC_MBOXQ_t *mbox;
16292 int rc, length, status = 0;
16293 uint32_t shdr_status, shdr_add_status;
16294 union lpfc_sli4_cfg_shdr *shdr;
16295
2e90f4b5 16296 /* sanity check on queue memory */
04c68496
JS
16297 if (!mq)
16298 return -ENODEV;
16299 mbox = mempool_alloc(mq->phba->mbox_mem_pool, GFP_KERNEL);
16300 if (!mbox)
16301 return -ENOMEM;
16302 length = (sizeof(struct lpfc_mbx_mq_destroy) -
16303 sizeof(struct lpfc_sli4_cfg_mhdr));
16304 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16305 LPFC_MBOX_OPCODE_MQ_DESTROY,
16306 length, LPFC_SLI4_MBX_EMBED);
16307 bf_set(lpfc_mbx_mq_destroy_q_id, &mbox->u.mqe.un.mq_destroy.u.request,
16308 mq->queue_id);
16309 mbox->vport = mq->phba->pport;
16310 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16311 rc = lpfc_sli_issue_mbox(mq->phba, mbox, MBX_POLL);
16312 /* The IOCTL status is embedded in the mailbox subheader. */
16313 shdr = (union lpfc_sli4_cfg_shdr *)
16314 &mbox->u.mqe.un.mq_destroy.header.cfg_shdr;
16315 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16316 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16317 if (shdr_status || shdr_add_status || rc) {
16318 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16319 "2507 MQ_DESTROY mailbox failed with "
16320 "status x%x add_status x%x, mbx status x%x\n",
16321 shdr_status, shdr_add_status, rc);
16322 status = -ENXIO;
16323 }
16324 /* Remove mq from any list */
16325 list_del_init(&mq->list);
8fa38513 16326 mempool_free(mbox, mq->phba->mbox_mem_pool);
04c68496
JS
16327 return status;
16328}
16329
4f774513
JS
16330/**
16331 * lpfc_wq_destroy - Destroy a Work Queue on the HBA
16332 * @wq: The queue structure associated with the queue to destroy.
16333 *
16334 * This function destroys a queue, as detailed in @wq by sending an mailbox
16335 * command, specific to the type of queue, to the HBA.
16336 *
16337 * The @wq struct is used to get the queue ID of the queue to destroy.
16338 *
16339 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16340 * command fails this function will return -ENXIO.
4f774513 16341 **/
a2fc4aef 16342int
4f774513
JS
16343lpfc_wq_destroy(struct lpfc_hba *phba, struct lpfc_queue *wq)
16344{
16345 LPFC_MBOXQ_t *mbox;
16346 int rc, length, status = 0;
16347 uint32_t shdr_status, shdr_add_status;
16348 union lpfc_sli4_cfg_shdr *shdr;
16349
2e90f4b5 16350 /* sanity check on queue memory */
4f774513
JS
16351 if (!wq)
16352 return -ENODEV;
16353 mbox = mempool_alloc(wq->phba->mbox_mem_pool, GFP_KERNEL);
16354 if (!mbox)
16355 return -ENOMEM;
16356 length = (sizeof(struct lpfc_mbx_wq_destroy) -
16357 sizeof(struct lpfc_sli4_cfg_mhdr));
16358 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16359 LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY,
16360 length, LPFC_SLI4_MBX_EMBED);
16361 bf_set(lpfc_mbx_wq_destroy_q_id, &mbox->u.mqe.un.wq_destroy.u.request,
16362 wq->queue_id);
16363 mbox->vport = wq->phba->pport;
16364 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16365 rc = lpfc_sli_issue_mbox(wq->phba, mbox, MBX_POLL);
16366 shdr = (union lpfc_sli4_cfg_shdr *)
16367 &mbox->u.mqe.un.wq_destroy.header.cfg_shdr;
16368 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16369 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16370 if (shdr_status || shdr_add_status || rc) {
16371 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16372 "2508 WQ_DESTROY mailbox failed with "
16373 "status x%x add_status x%x, mbx status x%x\n",
16374 shdr_status, shdr_add_status, rc);
16375 status = -ENXIO;
16376 }
16377 /* Remove wq from any list */
16378 list_del_init(&wq->list);
d1f525aa
JS
16379 kfree(wq->pring);
16380 wq->pring = NULL;
8fa38513 16381 mempool_free(mbox, wq->phba->mbox_mem_pool);
4f774513
JS
16382 return status;
16383}
16384
16385/**
16386 * lpfc_rq_destroy - Destroy a Receive Queue on the HBA
16387 * @rq: The queue structure associated with the queue to destroy.
16388 *
16389 * This function destroys a queue, as detailed in @rq by sending an mailbox
16390 * command, specific to the type of queue, to the HBA.
16391 *
16392 * The @rq struct is used to get the queue ID of the queue to destroy.
16393 *
16394 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16395 * command fails this function will return -ENXIO.
4f774513 16396 **/
a2fc4aef 16397int
4f774513
JS
16398lpfc_rq_destroy(struct lpfc_hba *phba, struct lpfc_queue *hrq,
16399 struct lpfc_queue *drq)
16400{
16401 LPFC_MBOXQ_t *mbox;
16402 int rc, length, status = 0;
16403 uint32_t shdr_status, shdr_add_status;
16404 union lpfc_sli4_cfg_shdr *shdr;
16405
2e90f4b5 16406 /* sanity check on queue memory */
4f774513
JS
16407 if (!hrq || !drq)
16408 return -ENODEV;
16409 mbox = mempool_alloc(hrq->phba->mbox_mem_pool, GFP_KERNEL);
16410 if (!mbox)
16411 return -ENOMEM;
16412 length = (sizeof(struct lpfc_mbx_rq_destroy) -
fedd3b7b 16413 sizeof(struct lpfc_sli4_cfg_mhdr));
4f774513
JS
16414 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16415 LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY,
16416 length, LPFC_SLI4_MBX_EMBED);
16417 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16418 hrq->queue_id);
16419 mbox->vport = hrq->phba->pport;
16420 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16421 rc = lpfc_sli_issue_mbox(hrq->phba, mbox, MBX_POLL);
16422 /* The IOCTL status is embedded in the mailbox subheader. */
16423 shdr = (union lpfc_sli4_cfg_shdr *)
16424 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16425 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16426 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16427 if (shdr_status || shdr_add_status || rc) {
16428 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16429 "2509 RQ_DESTROY mailbox failed with "
16430 "status x%x add_status x%x, mbx status x%x\n",
16431 shdr_status, shdr_add_status, rc);
16432 if (rc != MBX_TIMEOUT)
16433 mempool_free(mbox, hrq->phba->mbox_mem_pool);
16434 return -ENXIO;
16435 }
16436 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16437 drq->queue_id);
16438 rc = lpfc_sli_issue_mbox(drq->phba, mbox, MBX_POLL);
16439 shdr = (union lpfc_sli4_cfg_shdr *)
16440 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16441 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16442 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16443 if (shdr_status || shdr_add_status || rc) {
16444 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16445 "2510 RQ_DESTROY mailbox failed with "
16446 "status x%x add_status x%x, mbx status x%x\n",
16447 shdr_status, shdr_add_status, rc);
16448 status = -ENXIO;
16449 }
16450 list_del_init(&hrq->list);
16451 list_del_init(&drq->list);
8fa38513 16452 mempool_free(mbox, hrq->phba->mbox_mem_pool);
4f774513
JS
16453 return status;
16454}
16455
16456/**
16457 * lpfc_sli4_post_sgl - Post scatter gather list for an XRI to HBA
16458 * @phba: The virtual port for which this call being executed.
16459 * @pdma_phys_addr0: Physical address of the 1st SGL page.
16460 * @pdma_phys_addr1: Physical address of the 2nd SGL page.
16461 * @xritag: the xritag that ties this io to the SGL pages.
16462 *
16463 * This routine will post the sgl pages for the IO that has the xritag
16464 * that is in the iocbq structure. The xritag is assigned during iocbq
16465 * creation and persists for as long as the driver is loaded.
16466 * if the caller has fewer than 256 scatter gather segments to map then
16467 * pdma_phys_addr1 should be 0.
16468 * If the caller needs to map more than 256 scatter gather segment then
16469 * pdma_phys_addr1 should be a valid physical address.
16470 * physical address for SGLs must be 64 byte aligned.
16471 * If you are going to map 2 SGL's then the first one must have 256 entries
16472 * the second sgl can have between 1 and 256 entries.
16473 *
16474 * Return codes:
16475 * 0 - Success
16476 * -ENXIO, -ENOMEM - Failure
16477 **/
16478int
16479lpfc_sli4_post_sgl(struct lpfc_hba *phba,
16480 dma_addr_t pdma_phys_addr0,
16481 dma_addr_t pdma_phys_addr1,
16482 uint16_t xritag)
16483{
16484 struct lpfc_mbx_post_sgl_pages *post_sgl_pages;
16485 LPFC_MBOXQ_t *mbox;
16486 int rc;
16487 uint32_t shdr_status, shdr_add_status;
6d368e53 16488 uint32_t mbox_tmo;
4f774513
JS
16489 union lpfc_sli4_cfg_shdr *shdr;
16490
16491 if (xritag == NO_XRI) {
16492 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16493 "0364 Invalid param:\n");
16494 return -EINVAL;
16495 }
16496
16497 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16498 if (!mbox)
16499 return -ENOMEM;
16500
16501 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16502 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16503 sizeof(struct lpfc_mbx_post_sgl_pages) -
fedd3b7b 16504 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
4f774513
JS
16505
16506 post_sgl_pages = (struct lpfc_mbx_post_sgl_pages *)
16507 &mbox->u.mqe.un.post_sgl_pages;
16508 bf_set(lpfc_post_sgl_pages_xri, post_sgl_pages, xritag);
16509 bf_set(lpfc_post_sgl_pages_xricnt, post_sgl_pages, 1);
16510
16511 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_lo =
16512 cpu_to_le32(putPaddrLow(pdma_phys_addr0));
16513 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_hi =
16514 cpu_to_le32(putPaddrHigh(pdma_phys_addr0));
16515
16516 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_lo =
16517 cpu_to_le32(putPaddrLow(pdma_phys_addr1));
16518 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_hi =
16519 cpu_to_le32(putPaddrHigh(pdma_phys_addr1));
16520 if (!phba->sli4_hba.intr_enable)
16521 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6d368e53 16522 else {
a183a15f 16523 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
16524 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16525 }
4f774513
JS
16526 /* The IOCTL status is embedded in the mailbox subheader. */
16527 shdr = (union lpfc_sli4_cfg_shdr *) &post_sgl_pages->header.cfg_shdr;
16528 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16529 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16530 if (rc != MBX_TIMEOUT)
16531 mempool_free(mbox, phba->mbox_mem_pool);
16532 if (shdr_status || shdr_add_status || rc) {
16533 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16534 "2511 POST_SGL mailbox failed with "
16535 "status x%x add_status x%x, mbx status x%x\n",
16536 shdr_status, shdr_add_status, rc);
4f774513
JS
16537 }
16538 return 0;
16539}
4f774513 16540
6d368e53 16541/**
88a2cfbb 16542 * lpfc_sli4_alloc_xri - Get an available rpi in the device's range
6d368e53
JS
16543 * @phba: pointer to lpfc hba data structure.
16544 *
16545 * This routine is invoked to post rpi header templates to the
88a2cfbb
JS
16546 * HBA consistent with the SLI-4 interface spec. This routine
16547 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
16548 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6d368e53 16549 *
88a2cfbb
JS
16550 * Returns
16551 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
16552 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
16553 **/
5d8b8167 16554static uint16_t
6d368e53
JS
16555lpfc_sli4_alloc_xri(struct lpfc_hba *phba)
16556{
16557 unsigned long xri;
16558
16559 /*
16560 * Fetch the next logical xri. Because this index is logical,
16561 * the driver starts at 0 each time.
16562 */
16563 spin_lock_irq(&phba->hbalock);
16564 xri = find_next_zero_bit(phba->sli4_hba.xri_bmask,
16565 phba->sli4_hba.max_cfg_param.max_xri, 0);
16566 if (xri >= phba->sli4_hba.max_cfg_param.max_xri) {
16567 spin_unlock_irq(&phba->hbalock);
16568 return NO_XRI;
16569 } else {
16570 set_bit(xri, phba->sli4_hba.xri_bmask);
16571 phba->sli4_hba.max_cfg_param.xri_used++;
6d368e53 16572 }
6d368e53
JS
16573 spin_unlock_irq(&phba->hbalock);
16574 return xri;
16575}
16576
16577/**
16578 * lpfc_sli4_free_xri - Release an xri for reuse.
16579 * @phba: pointer to lpfc hba data structure.
16580 *
16581 * This routine is invoked to release an xri to the pool of
16582 * available rpis maintained by the driver.
16583 **/
5d8b8167 16584static void
6d368e53
JS
16585__lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16586{
16587 if (test_and_clear_bit(xri, phba->sli4_hba.xri_bmask)) {
6d368e53
JS
16588 phba->sli4_hba.max_cfg_param.xri_used--;
16589 }
16590}
16591
16592/**
16593 * lpfc_sli4_free_xri - Release an xri for reuse.
16594 * @phba: pointer to lpfc hba data structure.
16595 *
16596 * This routine is invoked to release an xri to the pool of
16597 * available rpis maintained by the driver.
16598 **/
16599void
16600lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16601{
16602 spin_lock_irq(&phba->hbalock);
16603 __lpfc_sli4_free_xri(phba, xri);
16604 spin_unlock_irq(&phba->hbalock);
16605}
16606
4f774513
JS
16607/**
16608 * lpfc_sli4_next_xritag - Get an xritag for the io
16609 * @phba: Pointer to HBA context object.
16610 *
16611 * This function gets an xritag for the iocb. If there is no unused xritag
16612 * it will return 0xffff.
16613 * The function returns the allocated xritag if successful, else returns zero.
16614 * Zero is not a valid xritag.
16615 * The caller is not required to hold any lock.
16616 **/
16617uint16_t
16618lpfc_sli4_next_xritag(struct lpfc_hba *phba)
16619{
6d368e53 16620 uint16_t xri_index;
4f774513 16621
6d368e53 16622 xri_index = lpfc_sli4_alloc_xri(phba);
81378052
JS
16623 if (xri_index == NO_XRI)
16624 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
16625 "2004 Failed to allocate XRI.last XRITAG is %d"
16626 " Max XRI is %d, Used XRI is %d\n",
16627 xri_index,
16628 phba->sli4_hba.max_cfg_param.max_xri,
16629 phba->sli4_hba.max_cfg_param.xri_used);
16630 return xri_index;
4f774513
JS
16631}
16632
16633/**
895427bd 16634 * lpfc_sli4_post_sgl_list - post a block of ELS sgls to the port.
4f774513 16635 * @phba: pointer to lpfc hba data structure.
8a9d2e80
JS
16636 * @post_sgl_list: pointer to els sgl entry list.
16637 * @count: number of els sgl entries on the list.
4f774513
JS
16638 *
16639 * This routine is invoked to post a block of driver's sgl pages to the
16640 * HBA using non-embedded mailbox command. No Lock is held. This routine
16641 * is only called when the driver is loading and after all IO has been
16642 * stopped.
16643 **/
8a9d2e80 16644static int
895427bd 16645lpfc_sli4_post_sgl_list(struct lpfc_hba *phba,
8a9d2e80
JS
16646 struct list_head *post_sgl_list,
16647 int post_cnt)
4f774513 16648{
8a9d2e80 16649 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
4f774513
JS
16650 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16651 struct sgl_page_pairs *sgl_pg_pairs;
16652 void *viraddr;
16653 LPFC_MBOXQ_t *mbox;
16654 uint32_t reqlen, alloclen, pg_pairs;
16655 uint32_t mbox_tmo;
8a9d2e80
JS
16656 uint16_t xritag_start = 0;
16657 int rc = 0;
4f774513
JS
16658 uint32_t shdr_status, shdr_add_status;
16659 union lpfc_sli4_cfg_shdr *shdr;
16660
895427bd 16661 reqlen = post_cnt * sizeof(struct sgl_page_pairs) +
4f774513 16662 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16663 if (reqlen > SLI4_PAGE_SIZE) {
895427bd 16664 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4f774513
JS
16665 "2559 Block sgl registration required DMA "
16666 "size (%d) great than a page\n", reqlen);
16667 return -ENOMEM;
16668 }
895427bd 16669
4f774513 16670 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6d368e53 16671 if (!mbox)
4f774513 16672 return -ENOMEM;
4f774513
JS
16673
16674 /* Allocate DMA memory and set up the non-embedded mailbox command */
16675 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16676 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES, reqlen,
16677 LPFC_SLI4_MBX_NEMBED);
16678
16679 if (alloclen < reqlen) {
16680 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16681 "0285 Allocated DMA memory size (%d) is "
16682 "less than the requested DMA memory "
16683 "size (%d)\n", alloclen, reqlen);
16684 lpfc_sli4_mbox_cmd_free(phba, mbox);
16685 return -ENOMEM;
16686 }
4f774513 16687 /* Set up the SGL pages in the non-embedded DMA pages */
6d368e53 16688 viraddr = mbox->sge_array->addr[0];
4f774513
JS
16689 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16690 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16691
8a9d2e80
JS
16692 pg_pairs = 0;
16693 list_for_each_entry_safe(sglq_entry, sglq_next, post_sgl_list, list) {
4f774513
JS
16694 /* Set up the sge entry */
16695 sgl_pg_pairs->sgl_pg0_addr_lo =
16696 cpu_to_le32(putPaddrLow(sglq_entry->phys));
16697 sgl_pg_pairs->sgl_pg0_addr_hi =
16698 cpu_to_le32(putPaddrHigh(sglq_entry->phys));
16699 sgl_pg_pairs->sgl_pg1_addr_lo =
16700 cpu_to_le32(putPaddrLow(0));
16701 sgl_pg_pairs->sgl_pg1_addr_hi =
16702 cpu_to_le32(putPaddrHigh(0));
6d368e53 16703
4f774513
JS
16704 /* Keep the first xritag on the list */
16705 if (pg_pairs == 0)
16706 xritag_start = sglq_entry->sli4_xritag;
16707 sgl_pg_pairs++;
8a9d2e80 16708 pg_pairs++;
4f774513 16709 }
6d368e53
JS
16710
16711 /* Complete initialization and perform endian conversion. */
4f774513 16712 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
895427bd 16713 bf_set(lpfc_post_sgl_pages_xricnt, sgl, post_cnt);
4f774513 16714 sgl->word0 = cpu_to_le32(sgl->word0);
895427bd 16715
4f774513
JS
16716 if (!phba->sli4_hba.intr_enable)
16717 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16718 else {
a183a15f 16719 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16720 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16721 }
16722 shdr = (union lpfc_sli4_cfg_shdr *) &sgl->cfg_shdr;
16723 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16724 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16725 if (rc != MBX_TIMEOUT)
16726 lpfc_sli4_mbox_cmd_free(phba, mbox);
16727 if (shdr_status || shdr_add_status || rc) {
16728 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16729 "2513 POST_SGL_BLOCK mailbox command failed "
16730 "status x%x add_status x%x mbx status x%x\n",
16731 shdr_status, shdr_add_status, rc);
16732 rc = -ENXIO;
16733 }
16734 return rc;
16735}
16736
16737/**
16738 * lpfc_sli4_post_scsi_sgl_block - post a block of scsi sgl list to firmware
16739 * @phba: pointer to lpfc hba data structure.
16740 * @sblist: pointer to scsi buffer list.
16741 * @count: number of scsi buffers on the list.
16742 *
16743 * This routine is invoked to post a block of @count scsi sgl pages from a
16744 * SCSI buffer list @sblist to the HBA using non-embedded mailbox command.
16745 * No Lock is held.
16746 *
16747 **/
16748int
8a9d2e80
JS
16749lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *phba,
16750 struct list_head *sblist,
16751 int count)
4f774513
JS
16752{
16753 struct lpfc_scsi_buf *psb;
16754 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16755 struct sgl_page_pairs *sgl_pg_pairs;
16756 void *viraddr;
16757 LPFC_MBOXQ_t *mbox;
16758 uint32_t reqlen, alloclen, pg_pairs;
16759 uint32_t mbox_tmo;
16760 uint16_t xritag_start = 0;
16761 int rc = 0;
16762 uint32_t shdr_status, shdr_add_status;
16763 dma_addr_t pdma_phys_bpl1;
16764 union lpfc_sli4_cfg_shdr *shdr;
16765
16766 /* Calculate the requested length of the dma memory */
8a9d2e80 16767 reqlen = count * sizeof(struct sgl_page_pairs) +
4f774513 16768 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16769 if (reqlen > SLI4_PAGE_SIZE) {
4f774513
JS
16770 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
16771 "0217 Block sgl registration required DMA "
16772 "size (%d) great than a page\n", reqlen);
16773 return -ENOMEM;
16774 }
16775 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16776 if (!mbox) {
16777 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16778 "0283 Failed to allocate mbox cmd memory\n");
16779 return -ENOMEM;
16780 }
16781
16782 /* Allocate DMA memory and set up the non-embedded mailbox command */
16783 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16784 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES, reqlen,
16785 LPFC_SLI4_MBX_NEMBED);
16786
16787 if (alloclen < reqlen) {
16788 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16789 "2561 Allocated DMA memory size (%d) is "
16790 "less than the requested DMA memory "
16791 "size (%d)\n", alloclen, reqlen);
16792 lpfc_sli4_mbox_cmd_free(phba, mbox);
16793 return -ENOMEM;
16794 }
6d368e53 16795
4f774513 16796 /* Get the first SGE entry from the non-embedded DMA memory */
4f774513
JS
16797 viraddr = mbox->sge_array->addr[0];
16798
16799 /* Set up the SGL pages in the non-embedded DMA pages */
16800 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16801 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16802
16803 pg_pairs = 0;
16804 list_for_each_entry(psb, sblist, list) {
16805 /* Set up the sge entry */
16806 sgl_pg_pairs->sgl_pg0_addr_lo =
16807 cpu_to_le32(putPaddrLow(psb->dma_phys_bpl));
16808 sgl_pg_pairs->sgl_pg0_addr_hi =
16809 cpu_to_le32(putPaddrHigh(psb->dma_phys_bpl));
16810 if (phba->cfg_sg_dma_buf_size > SGL_PAGE_SIZE)
16811 pdma_phys_bpl1 = psb->dma_phys_bpl + SGL_PAGE_SIZE;
16812 else
16813 pdma_phys_bpl1 = 0;
16814 sgl_pg_pairs->sgl_pg1_addr_lo =
16815 cpu_to_le32(putPaddrLow(pdma_phys_bpl1));
16816 sgl_pg_pairs->sgl_pg1_addr_hi =
16817 cpu_to_le32(putPaddrHigh(pdma_phys_bpl1));
16818 /* Keep the first xritag on the list */
16819 if (pg_pairs == 0)
16820 xritag_start = psb->cur_iocbq.sli4_xritag;
16821 sgl_pg_pairs++;
16822 pg_pairs++;
16823 }
16824 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
16825 bf_set(lpfc_post_sgl_pages_xricnt, sgl, pg_pairs);
16826 /* Perform endian conversion if necessary */
16827 sgl->word0 = cpu_to_le32(sgl->word0);
16828
16829 if (!phba->sli4_hba.intr_enable)
16830 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16831 else {
a183a15f 16832 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16833 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16834 }
16835 shdr = (union lpfc_sli4_cfg_shdr *) &sgl->cfg_shdr;
16836 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16837 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16838 if (rc != MBX_TIMEOUT)
16839 lpfc_sli4_mbox_cmd_free(phba, mbox);
16840 if (shdr_status || shdr_add_status || rc) {
16841 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16842 "2564 POST_SGL_BLOCK mailbox command failed "
16843 "status x%x add_status x%x mbx status x%x\n",
16844 shdr_status, shdr_add_status, rc);
16845 rc = -ENXIO;
16846 }
16847 return rc;
16848}
16849
16850/**
16851 * lpfc_fc_frame_check - Check that this frame is a valid frame to handle
16852 * @phba: pointer to lpfc_hba struct that the frame was received on
16853 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
16854 *
16855 * This function checks the fields in the @fc_hdr to see if the FC frame is a
16856 * valid type of frame that the LPFC driver will handle. This function will
16857 * return a zero if the frame is a valid frame or a non zero value when the
16858 * frame does not pass the check.
16859 **/
16860static int
16861lpfc_fc_frame_check(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr)
16862{
474ffb74 16863 /* make rctl_names static to save stack space */
4f774513 16864 struct fc_vft_header *fc_vft_hdr;
546fc854 16865 uint32_t *header = (uint32_t *) fc_hdr;
4f774513 16866
ae9e28f3
JS
16867#define FC_RCTL_MDS_DIAGS 0xF4
16868
4f774513
JS
16869 switch (fc_hdr->fh_r_ctl) {
16870 case FC_RCTL_DD_UNCAT: /* uncategorized information */
16871 case FC_RCTL_DD_SOL_DATA: /* solicited data */
16872 case FC_RCTL_DD_UNSOL_CTL: /* unsolicited control */
16873 case FC_RCTL_DD_SOL_CTL: /* solicited control or reply */
16874 case FC_RCTL_DD_UNSOL_DATA: /* unsolicited data */
16875 case FC_RCTL_DD_DATA_DESC: /* data descriptor */
16876 case FC_RCTL_DD_UNSOL_CMD: /* unsolicited command */
16877 case FC_RCTL_DD_CMD_STATUS: /* command status */
16878 case FC_RCTL_ELS_REQ: /* extended link services request */
16879 case FC_RCTL_ELS_REP: /* extended link services reply */
16880 case FC_RCTL_ELS4_REQ: /* FC-4 ELS request */
16881 case FC_RCTL_ELS4_REP: /* FC-4 ELS reply */
16882 case FC_RCTL_BA_NOP: /* basic link service NOP */
16883 case FC_RCTL_BA_ABTS: /* basic link service abort */
16884 case FC_RCTL_BA_RMC: /* remove connection */
16885 case FC_RCTL_BA_ACC: /* basic accept */
16886 case FC_RCTL_BA_RJT: /* basic reject */
16887 case FC_RCTL_BA_PRMT:
16888 case FC_RCTL_ACK_1: /* acknowledge_1 */
16889 case FC_RCTL_ACK_0: /* acknowledge_0 */
16890 case FC_RCTL_P_RJT: /* port reject */
16891 case FC_RCTL_F_RJT: /* fabric reject */
16892 case FC_RCTL_P_BSY: /* port busy */
16893 case FC_RCTL_F_BSY: /* fabric busy to data frame */
16894 case FC_RCTL_F_BSYL: /* fabric busy to link control frame */
16895 case FC_RCTL_LCR: /* link credit reset */
ae9e28f3 16896 case FC_RCTL_MDS_DIAGS: /* MDS Diagnostics */
4f774513
JS
16897 case FC_RCTL_END: /* end */
16898 break;
16899 case FC_RCTL_VFTH: /* Virtual Fabric tagging Header */
16900 fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
16901 fc_hdr = &((struct fc_frame_header *)fc_vft_hdr)[1];
16902 return lpfc_fc_frame_check(phba, fc_hdr);
16903 default:
16904 goto drop;
16905 }
ae9e28f3
JS
16906
16907#define FC_TYPE_VENDOR_UNIQUE 0xFF
16908
4f774513
JS
16909 switch (fc_hdr->fh_type) {
16910 case FC_TYPE_BLS:
16911 case FC_TYPE_ELS:
16912 case FC_TYPE_FCP:
16913 case FC_TYPE_CT:
895427bd 16914 case FC_TYPE_NVME:
ae9e28f3 16915 case FC_TYPE_VENDOR_UNIQUE:
4f774513
JS
16916 break;
16917 case FC_TYPE_IP:
16918 case FC_TYPE_ILS:
16919 default:
16920 goto drop;
16921 }
546fc854 16922
4f774513 16923 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
78e1d200 16924 "2538 Received frame rctl:x%x, type:x%x, "
88f43a08 16925 "frame Data:%08x %08x %08x %08x %08x %08x %08x\n",
78e1d200
JS
16926 fc_hdr->fh_r_ctl, fc_hdr->fh_type,
16927 be32_to_cpu(header[0]), be32_to_cpu(header[1]),
16928 be32_to_cpu(header[2]), be32_to_cpu(header[3]),
16929 be32_to_cpu(header[4]), be32_to_cpu(header[5]),
16930 be32_to_cpu(header[6]));
4f774513
JS
16931 return 0;
16932drop:
16933 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS,
78e1d200
JS
16934 "2539 Dropped frame rctl:x%x type:x%x\n",
16935 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
4f774513
JS
16936 return 1;
16937}
16938
16939/**
16940 * lpfc_fc_hdr_get_vfi - Get the VFI from an FC frame
16941 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
16942 *
16943 * This function processes the FC header to retrieve the VFI from the VF
16944 * header, if one exists. This function will return the VFI if one exists
16945 * or 0 if no VSAN Header exists.
16946 **/
16947static uint32_t
16948lpfc_fc_hdr_get_vfi(struct fc_frame_header *fc_hdr)
16949{
16950 struct fc_vft_header *fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
16951
16952 if (fc_hdr->fh_r_ctl != FC_RCTL_VFTH)
16953 return 0;
16954 return bf_get(fc_vft_hdr_vf_id, fc_vft_hdr);
16955}
16956
16957/**
16958 * lpfc_fc_frame_to_vport - Finds the vport that a frame is destined to
16959 * @phba: Pointer to the HBA structure to search for the vport on
16960 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
16961 * @fcfi: The FC Fabric ID that the frame came from
16962 *
16963 * This function searches the @phba for a vport that matches the content of the
16964 * @fc_hdr passed in and the @fcfi. This function uses the @fc_hdr to fetch the
16965 * VFI, if the Virtual Fabric Tagging Header exists, and the DID. This function
16966 * returns the matching vport pointer or NULL if unable to match frame to a
16967 * vport.
16968 **/
16969static struct lpfc_vport *
16970lpfc_fc_frame_to_vport(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr,
895427bd 16971 uint16_t fcfi, uint32_t did)
4f774513
JS
16972{
16973 struct lpfc_vport **vports;
16974 struct lpfc_vport *vport = NULL;
16975 int i;
939723a4 16976
bf08611b
JS
16977 if (did == Fabric_DID)
16978 return phba->pport;
939723a4
JS
16979 if ((phba->pport->fc_flag & FC_PT2PT) &&
16980 !(phba->link_state == LPFC_HBA_READY))
16981 return phba->pport;
16982
4f774513 16983 vports = lpfc_create_vport_work_array(phba);
895427bd 16984 if (vports != NULL) {
4f774513
JS
16985 for (i = 0; i <= phba->max_vpi && vports[i] != NULL; i++) {
16986 if (phba->fcf.fcfi == fcfi &&
16987 vports[i]->vfi == lpfc_fc_hdr_get_vfi(fc_hdr) &&
16988 vports[i]->fc_myDID == did) {
16989 vport = vports[i];
16990 break;
16991 }
16992 }
895427bd 16993 }
4f774513
JS
16994 lpfc_destroy_vport_work_array(phba, vports);
16995 return vport;
16996}
16997
45ed1190
JS
16998/**
16999 * lpfc_update_rcv_time_stamp - Update vport's rcv seq time stamp
17000 * @vport: The vport to work on.
17001 *
17002 * This function updates the receive sequence time stamp for this vport. The
17003 * receive sequence time stamp indicates the time that the last frame of the
17004 * the sequence that has been idle for the longest amount of time was received.
17005 * the driver uses this time stamp to indicate if any received sequences have
17006 * timed out.
17007 **/
5d8b8167 17008static void
45ed1190
JS
17009lpfc_update_rcv_time_stamp(struct lpfc_vport *vport)
17010{
17011 struct lpfc_dmabuf *h_buf;
17012 struct hbq_dmabuf *dmabuf = NULL;
17013
17014 /* get the oldest sequence on the rcv list */
17015 h_buf = list_get_first(&vport->rcv_buffer_list,
17016 struct lpfc_dmabuf, list);
17017 if (!h_buf)
17018 return;
17019 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17020 vport->rcv_buffer_time_stamp = dmabuf->time_stamp;
17021}
17022
17023/**
17024 * lpfc_cleanup_rcv_buffers - Cleans up all outstanding receive sequences.
17025 * @vport: The vport that the received sequences were sent to.
17026 *
17027 * This function cleans up all outstanding received sequences. This is called
17028 * by the driver when a link event or user action invalidates all the received
17029 * sequences.
17030 **/
17031void
17032lpfc_cleanup_rcv_buffers(struct lpfc_vport *vport)
17033{
17034 struct lpfc_dmabuf *h_buf, *hnext;
17035 struct lpfc_dmabuf *d_buf, *dnext;
17036 struct hbq_dmabuf *dmabuf = NULL;
17037
17038 /* start with the oldest sequence on the rcv list */
17039 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17040 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17041 list_del_init(&dmabuf->hbuf.list);
17042 list_for_each_entry_safe(d_buf, dnext,
17043 &dmabuf->dbuf.list, list) {
17044 list_del_init(&d_buf->list);
17045 lpfc_in_buf_free(vport->phba, d_buf);
17046 }
17047 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17048 }
17049}
17050
17051/**
17052 * lpfc_rcv_seq_check_edtov - Cleans up timed out receive sequences.
17053 * @vport: The vport that the received sequences were sent to.
17054 *
17055 * This function determines whether any received sequences have timed out by
17056 * first checking the vport's rcv_buffer_time_stamp. If this time_stamp
17057 * indicates that there is at least one timed out sequence this routine will
17058 * go through the received sequences one at a time from most inactive to most
17059 * active to determine which ones need to be cleaned up. Once it has determined
17060 * that a sequence needs to be cleaned up it will simply free up the resources
17061 * without sending an abort.
17062 **/
17063void
17064lpfc_rcv_seq_check_edtov(struct lpfc_vport *vport)
17065{
17066 struct lpfc_dmabuf *h_buf, *hnext;
17067 struct lpfc_dmabuf *d_buf, *dnext;
17068 struct hbq_dmabuf *dmabuf = NULL;
17069 unsigned long timeout;
17070 int abort_count = 0;
17071
17072 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17073 vport->rcv_buffer_time_stamp);
17074 if (list_empty(&vport->rcv_buffer_list) ||
17075 time_before(jiffies, timeout))
17076 return;
17077 /* start with the oldest sequence on the rcv list */
17078 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17079 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17080 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17081 dmabuf->time_stamp);
17082 if (time_before(jiffies, timeout))
17083 break;
17084 abort_count++;
17085 list_del_init(&dmabuf->hbuf.list);
17086 list_for_each_entry_safe(d_buf, dnext,
17087 &dmabuf->dbuf.list, list) {
17088 list_del_init(&d_buf->list);
17089 lpfc_in_buf_free(vport->phba, d_buf);
17090 }
17091 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17092 }
17093 if (abort_count)
17094 lpfc_update_rcv_time_stamp(vport);
17095}
17096
4f774513
JS
17097/**
17098 * lpfc_fc_frame_add - Adds a frame to the vport's list of received sequences
17099 * @dmabuf: pointer to a dmabuf that describes the hdr and data of the FC frame
17100 *
17101 * This function searches through the existing incomplete sequences that have
17102 * been sent to this @vport. If the frame matches one of the incomplete
17103 * sequences then the dbuf in the @dmabuf is added to the list of frames that
17104 * make up that sequence. If no sequence is found that matches this frame then
17105 * the function will add the hbuf in the @dmabuf to the @vport's rcv_buffer_list
17106 * This function returns a pointer to the first dmabuf in the sequence list that
17107 * the frame was linked to.
17108 **/
17109static struct hbq_dmabuf *
17110lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17111{
17112 struct fc_frame_header *new_hdr;
17113 struct fc_frame_header *temp_hdr;
17114 struct lpfc_dmabuf *d_buf;
17115 struct lpfc_dmabuf *h_buf;
17116 struct hbq_dmabuf *seq_dmabuf = NULL;
17117 struct hbq_dmabuf *temp_dmabuf = NULL;
4360ca9c 17118 uint8_t found = 0;
4f774513 17119
4d9ab994 17120 INIT_LIST_HEAD(&dmabuf->dbuf.list);
45ed1190 17121 dmabuf->time_stamp = jiffies;
4f774513 17122 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
4360ca9c 17123
4f774513
JS
17124 /* Use the hdr_buf to find the sequence that this frame belongs to */
17125 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17126 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17127 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17128 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17129 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17130 continue;
17131 /* found a pending sequence that matches this frame */
17132 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17133 break;
17134 }
17135 if (!seq_dmabuf) {
17136 /*
17137 * This indicates first frame received for this sequence.
17138 * Queue the buffer on the vport's rcv_buffer_list.
17139 */
17140 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
45ed1190 17141 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17142 return dmabuf;
17143 }
17144 temp_hdr = seq_dmabuf->hbuf.virt;
eeead811
JS
17145 if (be16_to_cpu(new_hdr->fh_seq_cnt) <
17146 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4d9ab994
JS
17147 list_del_init(&seq_dmabuf->hbuf.list);
17148 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
17149 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
45ed1190 17150 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17151 return dmabuf;
17152 }
45ed1190
JS
17153 /* move this sequence to the tail to indicate a young sequence */
17154 list_move_tail(&seq_dmabuf->hbuf.list, &vport->rcv_buffer_list);
17155 seq_dmabuf->time_stamp = jiffies;
17156 lpfc_update_rcv_time_stamp(vport);
eeead811
JS
17157 if (list_empty(&seq_dmabuf->dbuf.list)) {
17158 temp_hdr = dmabuf->hbuf.virt;
17159 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
17160 return seq_dmabuf;
17161 }
4f774513 17162 /* find the correct place in the sequence to insert this frame */
4360ca9c
JS
17163 d_buf = list_entry(seq_dmabuf->dbuf.list.prev, typeof(*d_buf), list);
17164 while (!found) {
4f774513
JS
17165 temp_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17166 temp_hdr = (struct fc_frame_header *)temp_dmabuf->hbuf.virt;
17167 /*
17168 * If the frame's sequence count is greater than the frame on
17169 * the list then insert the frame right after this frame
17170 */
eeead811
JS
17171 if (be16_to_cpu(new_hdr->fh_seq_cnt) >
17172 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4f774513 17173 list_add(&dmabuf->dbuf.list, &temp_dmabuf->dbuf.list);
4360ca9c
JS
17174 found = 1;
17175 break;
4f774513 17176 }
4360ca9c
JS
17177
17178 if (&d_buf->list == &seq_dmabuf->dbuf.list)
17179 break;
17180 d_buf = list_entry(d_buf->list.prev, typeof(*d_buf), list);
4f774513 17181 }
4360ca9c
JS
17182
17183 if (found)
17184 return seq_dmabuf;
4f774513
JS
17185 return NULL;
17186}
17187
6669f9bb
JS
17188/**
17189 * lpfc_sli4_abort_partial_seq - Abort partially assembled unsol sequence
17190 * @vport: pointer to a vitural port
17191 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17192 *
17193 * This function tries to abort from the partially assembed sequence, described
17194 * by the information from basic abbort @dmabuf. It checks to see whether such
17195 * partially assembled sequence held by the driver. If so, it shall free up all
17196 * the frames from the partially assembled sequence.
17197 *
17198 * Return
17199 * true -- if there is matching partially assembled sequence present and all
17200 * the frames freed with the sequence;
17201 * false -- if there is no matching partially assembled sequence present so
17202 * nothing got aborted in the lower layer driver
17203 **/
17204static bool
17205lpfc_sli4_abort_partial_seq(struct lpfc_vport *vport,
17206 struct hbq_dmabuf *dmabuf)
17207{
17208 struct fc_frame_header *new_hdr;
17209 struct fc_frame_header *temp_hdr;
17210 struct lpfc_dmabuf *d_buf, *n_buf, *h_buf;
17211 struct hbq_dmabuf *seq_dmabuf = NULL;
17212
17213 /* Use the hdr_buf to find the sequence that matches this frame */
17214 INIT_LIST_HEAD(&dmabuf->dbuf.list);
17215 INIT_LIST_HEAD(&dmabuf->hbuf.list);
17216 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17217 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17218 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17219 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17220 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17221 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17222 continue;
17223 /* found a pending sequence that matches this frame */
17224 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17225 break;
17226 }
17227
17228 /* Free up all the frames from the partially assembled sequence */
17229 if (seq_dmabuf) {
17230 list_for_each_entry_safe(d_buf, n_buf,
17231 &seq_dmabuf->dbuf.list, list) {
17232 list_del_init(&d_buf->list);
17233 lpfc_in_buf_free(vport->phba, d_buf);
17234 }
17235 return true;
17236 }
17237 return false;
17238}
17239
6dd9e31c
JS
17240/**
17241 * lpfc_sli4_abort_ulp_seq - Abort assembled unsol sequence from ulp
17242 * @vport: pointer to a vitural port
17243 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17244 *
17245 * This function tries to abort from the assembed sequence from upper level
17246 * protocol, described by the information from basic abbort @dmabuf. It
17247 * checks to see whether such pending context exists at upper level protocol.
17248 * If so, it shall clean up the pending context.
17249 *
17250 * Return
17251 * true -- if there is matching pending context of the sequence cleaned
17252 * at ulp;
17253 * false -- if there is no matching pending context of the sequence present
17254 * at ulp.
17255 **/
17256static bool
17257lpfc_sli4_abort_ulp_seq(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17258{
17259 struct lpfc_hba *phba = vport->phba;
17260 int handled;
17261
17262 /* Accepting abort at ulp with SLI4 only */
17263 if (phba->sli_rev < LPFC_SLI_REV4)
17264 return false;
17265
17266 /* Register all caring upper level protocols to attend abort */
17267 handled = lpfc_ct_handle_unsol_abort(phba, dmabuf);
17268 if (handled)
17269 return true;
17270
17271 return false;
17272}
17273
6669f9bb 17274/**
546fc854 17275 * lpfc_sli4_seq_abort_rsp_cmpl - BLS ABORT RSP seq abort iocb complete handler
6669f9bb
JS
17276 * @phba: Pointer to HBA context object.
17277 * @cmd_iocbq: pointer to the command iocbq structure.
17278 * @rsp_iocbq: pointer to the response iocbq structure.
17279 *
546fc854 17280 * This function handles the sequence abort response iocb command complete
6669f9bb
JS
17281 * event. It properly releases the memory allocated to the sequence abort
17282 * accept iocb.
17283 **/
17284static void
546fc854 17285lpfc_sli4_seq_abort_rsp_cmpl(struct lpfc_hba *phba,
6669f9bb
JS
17286 struct lpfc_iocbq *cmd_iocbq,
17287 struct lpfc_iocbq *rsp_iocbq)
17288{
6dd9e31c
JS
17289 struct lpfc_nodelist *ndlp;
17290
17291 if (cmd_iocbq) {
17292 ndlp = (struct lpfc_nodelist *)cmd_iocbq->context1;
17293 lpfc_nlp_put(ndlp);
17294 lpfc_nlp_not_used(ndlp);
6669f9bb 17295 lpfc_sli_release_iocbq(phba, cmd_iocbq);
6dd9e31c 17296 }
6b5151fd
JS
17297
17298 /* Failure means BLS ABORT RSP did not get delivered to remote node*/
17299 if (rsp_iocbq && rsp_iocbq->iocb.ulpStatus)
17300 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17301 "3154 BLS ABORT RSP failed, data: x%x/x%x\n",
17302 rsp_iocbq->iocb.ulpStatus,
17303 rsp_iocbq->iocb.un.ulpWord[4]);
6669f9bb
JS
17304}
17305
6d368e53
JS
17306/**
17307 * lpfc_sli4_xri_inrange - check xri is in range of xris owned by driver.
17308 * @phba: Pointer to HBA context object.
17309 * @xri: xri id in transaction.
17310 *
17311 * This function validates the xri maps to the known range of XRIs allocated an
17312 * used by the driver.
17313 **/
7851fe2c 17314uint16_t
6d368e53
JS
17315lpfc_sli4_xri_inrange(struct lpfc_hba *phba,
17316 uint16_t xri)
17317{
a2fc4aef 17318 uint16_t i;
6d368e53
JS
17319
17320 for (i = 0; i < phba->sli4_hba.max_cfg_param.max_xri; i++) {
17321 if (xri == phba->sli4_hba.xri_ids[i])
17322 return i;
17323 }
17324 return NO_XRI;
17325}
17326
6669f9bb 17327/**
546fc854 17328 * lpfc_sli4_seq_abort_rsp - bls rsp to sequence abort
6669f9bb
JS
17329 * @phba: Pointer to HBA context object.
17330 * @fc_hdr: pointer to a FC frame header.
17331 *
546fc854 17332 * This function sends a basic response to a previous unsol sequence abort
6669f9bb
JS
17333 * event after aborting the sequence handling.
17334 **/
86c67379 17335void
6dd9e31c
JS
17336lpfc_sli4_seq_abort_rsp(struct lpfc_vport *vport,
17337 struct fc_frame_header *fc_hdr, bool aborted)
6669f9bb 17338{
6dd9e31c 17339 struct lpfc_hba *phba = vport->phba;
6669f9bb
JS
17340 struct lpfc_iocbq *ctiocb = NULL;
17341 struct lpfc_nodelist *ndlp;
ee0f4fe1 17342 uint16_t oxid, rxid, xri, lxri;
5ffc266e 17343 uint32_t sid, fctl;
6669f9bb 17344 IOCB_t *icmd;
546fc854 17345 int rc;
6669f9bb
JS
17346
17347 if (!lpfc_is_link_up(phba))
17348 return;
17349
17350 sid = sli4_sid_from_fc_hdr(fc_hdr);
17351 oxid = be16_to_cpu(fc_hdr->fh_ox_id);
5ffc266e 17352 rxid = be16_to_cpu(fc_hdr->fh_rx_id);
6669f9bb 17353
6dd9e31c 17354 ndlp = lpfc_findnode_did(vport, sid);
6669f9bb 17355 if (!ndlp) {
9d3d340d 17356 ndlp = lpfc_nlp_init(vport, sid);
6dd9e31c
JS
17357 if (!ndlp) {
17358 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17359 "1268 Failed to allocate ndlp for "
17360 "oxid:x%x SID:x%x\n", oxid, sid);
17361 return;
17362 }
6dd9e31c
JS
17363 /* Put ndlp onto pport node list */
17364 lpfc_enqueue_node(vport, ndlp);
17365 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
17366 /* re-setup ndlp without removing from node list */
17367 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
17368 if (!ndlp) {
17369 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17370 "3275 Failed to active ndlp found "
17371 "for oxid:x%x SID:x%x\n", oxid, sid);
17372 return;
17373 }
6669f9bb
JS
17374 }
17375
546fc854 17376 /* Allocate buffer for rsp iocb */
6669f9bb
JS
17377 ctiocb = lpfc_sli_get_iocbq(phba);
17378 if (!ctiocb)
17379 return;
17380
5ffc266e
JS
17381 /* Extract the F_CTL field from FC_HDR */
17382 fctl = sli4_fctl_from_fc_hdr(fc_hdr);
17383
6669f9bb 17384 icmd = &ctiocb->iocb;
6669f9bb 17385 icmd->un.xseq64.bdl.bdeSize = 0;
5ffc266e 17386 icmd->un.xseq64.bdl.ulpIoTag32 = 0;
6669f9bb
JS
17387 icmd->un.xseq64.w5.hcsw.Dfctl = 0;
17388 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_ACC;
17389 icmd->un.xseq64.w5.hcsw.Type = FC_TYPE_BLS;
17390
17391 /* Fill in the rest of iocb fields */
17392 icmd->ulpCommand = CMD_XMIT_BLS_RSP64_CX;
17393 icmd->ulpBdeCount = 0;
17394 icmd->ulpLe = 1;
17395 icmd->ulpClass = CLASS3;
6d368e53 17396 icmd->ulpContext = phba->sli4_hba.rpi_ids[ndlp->nlp_rpi];
6dd9e31c 17397 ctiocb->context1 = lpfc_nlp_get(ndlp);
6669f9bb 17398
6669f9bb
JS
17399 ctiocb->iocb_cmpl = NULL;
17400 ctiocb->vport = phba->pport;
546fc854 17401 ctiocb->iocb_cmpl = lpfc_sli4_seq_abort_rsp_cmpl;
6d368e53 17402 ctiocb->sli4_lxritag = NO_XRI;
546fc854
JS
17403 ctiocb->sli4_xritag = NO_XRI;
17404
ee0f4fe1
JS
17405 if (fctl & FC_FC_EX_CTX)
17406 /* Exchange responder sent the abort so we
17407 * own the oxid.
17408 */
17409 xri = oxid;
17410 else
17411 xri = rxid;
17412 lxri = lpfc_sli4_xri_inrange(phba, xri);
17413 if (lxri != NO_XRI)
17414 lpfc_set_rrq_active(phba, ndlp, lxri,
17415 (xri == oxid) ? rxid : oxid, 0);
6dd9e31c
JS
17416 /* For BA_ABTS from exchange responder, if the logical xri with
17417 * the oxid maps to the FCP XRI range, the port no longer has
17418 * that exchange context, send a BLS_RJT. Override the IOCB for
17419 * a BA_RJT.
17420 */
17421 if ((fctl & FC_FC_EX_CTX) &&
895427bd 17422 (lxri > lpfc_sli4_get_iocb_cnt(phba))) {
6dd9e31c
JS
17423 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17424 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17425 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17426 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17427 }
17428
17429 /* If BA_ABTS failed to abort a partially assembled receive sequence,
17430 * the driver no longer has that exchange, send a BLS_RJT. Override
17431 * the IOCB for a BA_RJT.
546fc854 17432 */
6dd9e31c 17433 if (aborted == false) {
546fc854
JS
17434 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17435 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17436 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17437 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17438 }
6669f9bb 17439
5ffc266e
JS
17440 if (fctl & FC_FC_EX_CTX) {
17441 /* ABTS sent by responder to CT exchange, construction
17442 * of BA_ACC will use OX_ID from ABTS for the XRI_TAG
17443 * field and RX_ID from ABTS for RX_ID field.
17444 */
546fc854 17445 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_RSP);
5ffc266e
JS
17446 } else {
17447 /* ABTS sent by initiator to CT exchange, construction
17448 * of BA_ACC will need to allocate a new XRI as for the
f09c3acc 17449 * XRI_TAG field.
5ffc266e 17450 */
546fc854 17451 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_INT);
5ffc266e 17452 }
f09c3acc 17453 bf_set(lpfc_abts_rxid, &icmd->un.bls_rsp, rxid);
546fc854 17454 bf_set(lpfc_abts_oxid, &icmd->un.bls_rsp, oxid);
5ffc266e 17455
546fc854 17456 /* Xmit CT abts response on exchange <xid> */
6dd9e31c
JS
17457 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,
17458 "1200 Send BLS cmd x%x on oxid x%x Data: x%x\n",
17459 icmd->un.xseq64.w5.hcsw.Rctl, oxid, phba->link_state);
546fc854
JS
17460
17461 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, ctiocb, 0);
17462 if (rc == IOCB_ERROR) {
6dd9e31c
JS
17463 lpfc_printf_vlog(vport, KERN_ERR, LOG_ELS,
17464 "2925 Failed to issue CT ABTS RSP x%x on "
17465 "xri x%x, Data x%x\n",
17466 icmd->un.xseq64.w5.hcsw.Rctl, oxid,
17467 phba->link_state);
17468 lpfc_nlp_put(ndlp);
17469 ctiocb->context1 = NULL;
546fc854
JS
17470 lpfc_sli_release_iocbq(phba, ctiocb);
17471 }
6669f9bb
JS
17472}
17473
17474/**
17475 * lpfc_sli4_handle_unsol_abort - Handle sli-4 unsolicited abort event
17476 * @vport: Pointer to the vport on which this sequence was received
17477 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17478 *
17479 * This function handles an SLI-4 unsolicited abort event. If the unsolicited
17480 * receive sequence is only partially assembed by the driver, it shall abort
17481 * the partially assembled frames for the sequence. Otherwise, if the
17482 * unsolicited receive sequence has been completely assembled and passed to
17483 * the Upper Layer Protocol (UPL), it then mark the per oxid status for the
17484 * unsolicited sequence has been aborted. After that, it will issue a basic
17485 * accept to accept the abort.
17486 **/
5d8b8167 17487static void
6669f9bb
JS
17488lpfc_sli4_handle_unsol_abort(struct lpfc_vport *vport,
17489 struct hbq_dmabuf *dmabuf)
17490{
17491 struct lpfc_hba *phba = vport->phba;
17492 struct fc_frame_header fc_hdr;
5ffc266e 17493 uint32_t fctl;
6dd9e31c 17494 bool aborted;
6669f9bb 17495
6669f9bb
JS
17496 /* Make a copy of fc_hdr before the dmabuf being released */
17497 memcpy(&fc_hdr, dmabuf->hbuf.virt, sizeof(struct fc_frame_header));
5ffc266e 17498 fctl = sli4_fctl_from_fc_hdr(&fc_hdr);
6669f9bb 17499
5ffc266e 17500 if (fctl & FC_FC_EX_CTX) {
6dd9e31c
JS
17501 /* ABTS by responder to exchange, no cleanup needed */
17502 aborted = true;
5ffc266e 17503 } else {
6dd9e31c
JS
17504 /* ABTS by initiator to exchange, need to do cleanup */
17505 aborted = lpfc_sli4_abort_partial_seq(vport, dmabuf);
17506 if (aborted == false)
17507 aborted = lpfc_sli4_abort_ulp_seq(vport, dmabuf);
5ffc266e 17508 }
6dd9e31c
JS
17509 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17510
86c67379
JS
17511 if (phba->nvmet_support) {
17512 lpfc_nvmet_rcv_unsol_abort(vport, &fc_hdr);
17513 return;
17514 }
17515
6dd9e31c
JS
17516 /* Respond with BA_ACC or BA_RJT accordingly */
17517 lpfc_sli4_seq_abort_rsp(vport, &fc_hdr, aborted);
6669f9bb
JS
17518}
17519
4f774513
JS
17520/**
17521 * lpfc_seq_complete - Indicates if a sequence is complete
17522 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17523 *
17524 * This function checks the sequence, starting with the frame described by
17525 * @dmabuf, to see if all the frames associated with this sequence are present.
17526 * the frames associated with this sequence are linked to the @dmabuf using the
17527 * dbuf list. This function looks for two major things. 1) That the first frame
17528 * has a sequence count of zero. 2) There is a frame with last frame of sequence
17529 * set. 3) That there are no holes in the sequence count. The function will
17530 * return 1 when the sequence is complete, otherwise it will return 0.
17531 **/
17532static int
17533lpfc_seq_complete(struct hbq_dmabuf *dmabuf)
17534{
17535 struct fc_frame_header *hdr;
17536 struct lpfc_dmabuf *d_buf;
17537 struct hbq_dmabuf *seq_dmabuf;
17538 uint32_t fctl;
17539 int seq_count = 0;
17540
17541 hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17542 /* make sure first fame of sequence has a sequence count of zero */
17543 if (hdr->fh_seq_cnt != seq_count)
17544 return 0;
17545 fctl = (hdr->fh_f_ctl[0] << 16 |
17546 hdr->fh_f_ctl[1] << 8 |
17547 hdr->fh_f_ctl[2]);
17548 /* If last frame of sequence we can return success. */
17549 if (fctl & FC_FC_END_SEQ)
17550 return 1;
17551 list_for_each_entry(d_buf, &dmabuf->dbuf.list, list) {
17552 seq_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17553 hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17554 /* If there is a hole in the sequence count then fail. */
eeead811 17555 if (++seq_count != be16_to_cpu(hdr->fh_seq_cnt))
4f774513
JS
17556 return 0;
17557 fctl = (hdr->fh_f_ctl[0] << 16 |
17558 hdr->fh_f_ctl[1] << 8 |
17559 hdr->fh_f_ctl[2]);
17560 /* If last frame of sequence we can return success. */
17561 if (fctl & FC_FC_END_SEQ)
17562 return 1;
17563 }
17564 return 0;
17565}
17566
17567/**
17568 * lpfc_prep_seq - Prep sequence for ULP processing
17569 * @vport: Pointer to the vport on which this sequence was received
17570 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17571 *
17572 * This function takes a sequence, described by a list of frames, and creates
17573 * a list of iocbq structures to describe the sequence. This iocbq list will be
17574 * used to issue to the generic unsolicited sequence handler. This routine
17575 * returns a pointer to the first iocbq in the list. If the function is unable
17576 * to allocate an iocbq then it throw out the received frames that were not
17577 * able to be described and return a pointer to the first iocbq. If unable to
17578 * allocate any iocbqs (including the first) this function will return NULL.
17579 **/
17580static struct lpfc_iocbq *
17581lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
17582{
7851fe2c 17583 struct hbq_dmabuf *hbq_buf;
4f774513
JS
17584 struct lpfc_dmabuf *d_buf, *n_buf;
17585 struct lpfc_iocbq *first_iocbq, *iocbq;
17586 struct fc_frame_header *fc_hdr;
17587 uint32_t sid;
7851fe2c 17588 uint32_t len, tot_len;
eeead811 17589 struct ulp_bde64 *pbde;
4f774513
JS
17590
17591 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17592 /* remove from receive buffer list */
17593 list_del_init(&seq_dmabuf->hbuf.list);
45ed1190 17594 lpfc_update_rcv_time_stamp(vport);
4f774513 17595 /* get the Remote Port's SID */
6669f9bb 17596 sid = sli4_sid_from_fc_hdr(fc_hdr);
7851fe2c 17597 tot_len = 0;
4f774513
JS
17598 /* Get an iocbq struct to fill in. */
17599 first_iocbq = lpfc_sli_get_iocbq(vport->phba);
17600 if (first_iocbq) {
17601 /* Initialize the first IOCB. */
8fa38513 17602 first_iocbq->iocb.unsli3.rcvsli3.acc_len = 0;
4f774513 17603 first_iocbq->iocb.ulpStatus = IOSTAT_SUCCESS;
895427bd 17604 first_iocbq->vport = vport;
939723a4
JS
17605
17606 /* Check FC Header to see what TYPE of frame we are rcv'ing */
17607 if (sli4_type_from_fc_hdr(fc_hdr) == FC_TYPE_ELS) {
17608 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_ELS64_CX;
17609 first_iocbq->iocb.un.rcvels.parmRo =
17610 sli4_did_from_fc_hdr(fc_hdr);
17611 first_iocbq->iocb.ulpPU = PARM_NPIV_DID;
17612 } else
17613 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_SEQ64_CX;
7851fe2c
JS
17614 first_iocbq->iocb.ulpContext = NO_XRI;
17615 first_iocbq->iocb.unsli3.rcvsli3.ox_id =
17616 be16_to_cpu(fc_hdr->fh_ox_id);
17617 /* iocbq is prepped for internal consumption. Physical vpi. */
17618 first_iocbq->iocb.unsli3.rcvsli3.vpi =
17619 vport->phba->vpi_ids[vport->vpi];
4f774513 17620 /* put the first buffer into the first IOCBq */
48a5a664
JS
17621 tot_len = bf_get(lpfc_rcqe_length,
17622 &seq_dmabuf->cq_event.cqe.rcqe_cmpl);
17623
4f774513
JS
17624 first_iocbq->context2 = &seq_dmabuf->dbuf;
17625 first_iocbq->context3 = NULL;
17626 first_iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17627 if (tot_len > LPFC_DATA_BUF_SIZE)
17628 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17629 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17630 else
17631 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize = tot_len;
17632
4f774513 17633 first_iocbq->iocb.un.rcvels.remoteID = sid;
48a5a664 17634
7851fe2c 17635 first_iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
4f774513
JS
17636 }
17637 iocbq = first_iocbq;
17638 /*
17639 * Each IOCBq can have two Buffers assigned, so go through the list
17640 * of buffers for this sequence and save two buffers in each IOCBq
17641 */
17642 list_for_each_entry_safe(d_buf, n_buf, &seq_dmabuf->dbuf.list, list) {
17643 if (!iocbq) {
17644 lpfc_in_buf_free(vport->phba, d_buf);
17645 continue;
17646 }
17647 if (!iocbq->context3) {
17648 iocbq->context3 = d_buf;
17649 iocbq->iocb.ulpBdeCount++;
7851fe2c
JS
17650 /* We need to get the size out of the right CQE */
17651 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17652 len = bf_get(lpfc_rcqe_length,
17653 &hbq_buf->cq_event.cqe.rcqe_cmpl);
48a5a664
JS
17654 pbde = (struct ulp_bde64 *)
17655 &iocbq->iocb.unsli3.sli3Words[4];
17656 if (len > LPFC_DATA_BUF_SIZE)
17657 pbde->tus.f.bdeSize = LPFC_DATA_BUF_SIZE;
17658 else
17659 pbde->tus.f.bdeSize = len;
17660
7851fe2c
JS
17661 iocbq->iocb.unsli3.rcvsli3.acc_len += len;
17662 tot_len += len;
4f774513
JS
17663 } else {
17664 iocbq = lpfc_sli_get_iocbq(vport->phba);
17665 if (!iocbq) {
17666 if (first_iocbq) {
17667 first_iocbq->iocb.ulpStatus =
17668 IOSTAT_FCP_RSP_ERROR;
17669 first_iocbq->iocb.un.ulpWord[4] =
17670 IOERR_NO_RESOURCES;
17671 }
17672 lpfc_in_buf_free(vport->phba, d_buf);
17673 continue;
17674 }
48a5a664
JS
17675 /* We need to get the size out of the right CQE */
17676 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17677 len = bf_get(lpfc_rcqe_length,
17678 &hbq_buf->cq_event.cqe.rcqe_cmpl);
4f774513
JS
17679 iocbq->context2 = d_buf;
17680 iocbq->context3 = NULL;
17681 iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17682 if (len > LPFC_DATA_BUF_SIZE)
17683 iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17684 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17685 else
17686 iocbq->iocb.un.cont64[0].tus.f.bdeSize = len;
7851fe2c 17687
7851fe2c
JS
17688 tot_len += len;
17689 iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
17690
4f774513
JS
17691 iocbq->iocb.un.rcvels.remoteID = sid;
17692 list_add_tail(&iocbq->list, &first_iocbq->list);
17693 }
17694 }
17695 return first_iocbq;
17696}
17697
6669f9bb
JS
17698static void
17699lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *vport,
17700 struct hbq_dmabuf *seq_dmabuf)
17701{
17702 struct fc_frame_header *fc_hdr;
17703 struct lpfc_iocbq *iocbq, *curr_iocb, *next_iocb;
17704 struct lpfc_hba *phba = vport->phba;
17705
17706 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17707 iocbq = lpfc_prep_seq(vport, seq_dmabuf);
17708 if (!iocbq) {
17709 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17710 "2707 Ring %d handler: Failed to allocate "
17711 "iocb Rctl x%x Type x%x received\n",
17712 LPFC_ELS_RING,
17713 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17714 return;
17715 }
17716 if (!lpfc_complete_unsol_iocb(phba,
895427bd 17717 phba->sli4_hba.els_wq->pring,
6669f9bb
JS
17718 iocbq, fc_hdr->fh_r_ctl,
17719 fc_hdr->fh_type))
6d368e53 17720 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6669f9bb
JS
17721 "2540 Ring %d handler: unexpected Rctl "
17722 "x%x Type x%x received\n",
17723 LPFC_ELS_RING,
17724 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17725
17726 /* Free iocb created in lpfc_prep_seq */
17727 list_for_each_entry_safe(curr_iocb, next_iocb,
17728 &iocbq->list, list) {
17729 list_del_init(&curr_iocb->list);
17730 lpfc_sli_release_iocbq(phba, curr_iocb);
17731 }
17732 lpfc_sli_release_iocbq(phba, iocbq);
17733}
17734
ae9e28f3
JS
17735static void
17736lpfc_sli4_mds_loopback_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
17737 struct lpfc_iocbq *rspiocb)
17738{
17739 struct lpfc_dmabuf *pcmd = cmdiocb->context2;
17740
17741 if (pcmd && pcmd->virt)
771db5c0 17742 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3
JS
17743 kfree(pcmd);
17744 lpfc_sli_release_iocbq(phba, cmdiocb);
17745}
17746
17747static void
17748lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
17749 struct hbq_dmabuf *dmabuf)
17750{
17751 struct fc_frame_header *fc_hdr;
17752 struct lpfc_hba *phba = vport->phba;
17753 struct lpfc_iocbq *iocbq = NULL;
17754 union lpfc_wqe *wqe;
17755 struct lpfc_dmabuf *pcmd = NULL;
17756 uint32_t frame_len;
17757 int rc;
17758
17759 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17760 frame_len = bf_get(lpfc_rcqe_length, &dmabuf->cq_event.cqe.rcqe_cmpl);
17761
17762 /* Send the received frame back */
17763 iocbq = lpfc_sli_get_iocbq(phba);
17764 if (!iocbq)
17765 goto exit;
17766
17767 /* Allocate buffer for command payload */
17768 pcmd = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
17769 if (pcmd)
771db5c0 17770 pcmd->virt = dma_pool_alloc(phba->lpfc_drb_pool, GFP_KERNEL,
ae9e28f3
JS
17771 &pcmd->phys);
17772 if (!pcmd || !pcmd->virt)
17773 goto exit;
17774
17775 INIT_LIST_HEAD(&pcmd->list);
17776
17777 /* copyin the payload */
17778 memcpy(pcmd->virt, dmabuf->dbuf.virt, frame_len);
17779
17780 /* fill in BDE's for command */
17781 iocbq->iocb.un.xseq64.bdl.addrHigh = putPaddrHigh(pcmd->phys);
17782 iocbq->iocb.un.xseq64.bdl.addrLow = putPaddrLow(pcmd->phys);
17783 iocbq->iocb.un.xseq64.bdl.bdeFlags = BUFF_TYPE_BDE_64;
17784 iocbq->iocb.un.xseq64.bdl.bdeSize = frame_len;
17785
17786 iocbq->context2 = pcmd;
17787 iocbq->vport = vport;
17788 iocbq->iocb_flag &= ~LPFC_FIP_ELS_ID_MASK;
17789 iocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
17790
17791 /*
17792 * Setup rest of the iocb as though it were a WQE
17793 * Build the SEND_FRAME WQE
17794 */
17795 wqe = (union lpfc_wqe *)&iocbq->iocb;
17796
17797 wqe->send_frame.frame_len = frame_len;
17798 wqe->send_frame.fc_hdr_wd0 = be32_to_cpu(*((uint32_t *)fc_hdr));
17799 wqe->send_frame.fc_hdr_wd1 = be32_to_cpu(*((uint32_t *)fc_hdr + 1));
17800 wqe->send_frame.fc_hdr_wd2 = be32_to_cpu(*((uint32_t *)fc_hdr + 2));
17801 wqe->send_frame.fc_hdr_wd3 = be32_to_cpu(*((uint32_t *)fc_hdr + 3));
17802 wqe->send_frame.fc_hdr_wd4 = be32_to_cpu(*((uint32_t *)fc_hdr + 4));
17803 wqe->send_frame.fc_hdr_wd5 = be32_to_cpu(*((uint32_t *)fc_hdr + 5));
17804
17805 iocbq->iocb.ulpCommand = CMD_SEND_FRAME;
17806 iocbq->iocb.ulpLe = 1;
17807 iocbq->iocb_cmpl = lpfc_sli4_mds_loopback_cmpl;
17808 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, iocbq, 0);
17809 if (rc == IOCB_ERROR)
17810 goto exit;
17811
17812 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17813 return;
17814
17815exit:
17816 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
17817 "2023 Unable to process MDS loopback frame\n");
17818 if (pcmd && pcmd->virt)
771db5c0 17819 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3 17820 kfree(pcmd);
401bb416
DK
17821 if (iocbq)
17822 lpfc_sli_release_iocbq(phba, iocbq);
ae9e28f3
JS
17823 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17824}
17825
4f774513
JS
17826/**
17827 * lpfc_sli4_handle_received_buffer - Handle received buffers from firmware
17828 * @phba: Pointer to HBA context object.
17829 *
17830 * This function is called with no lock held. This function processes all
17831 * the received buffers and gives it to upper layers when a received buffer
17832 * indicates that it is the final frame in the sequence. The interrupt
895427bd 17833 * service routine processes received buffers at interrupt contexts.
4f774513
JS
17834 * Worker thread calls lpfc_sli4_handle_received_buffer, which will call the
17835 * appropriate receive function when the final frame in a sequence is received.
17836 **/
4d9ab994
JS
17837void
17838lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,
17839 struct hbq_dmabuf *dmabuf)
4f774513 17840{
4d9ab994 17841 struct hbq_dmabuf *seq_dmabuf;
4f774513
JS
17842 struct fc_frame_header *fc_hdr;
17843 struct lpfc_vport *vport;
17844 uint32_t fcfi;
939723a4 17845 uint32_t did;
4f774513 17846
4f774513 17847 /* Process each received buffer */
4d9ab994 17848 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
2ea259ee 17849
4d9ab994
JS
17850 /* check to see if this a valid type of frame */
17851 if (lpfc_fc_frame_check(phba, fc_hdr)) {
17852 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17853 return;
17854 }
2ea259ee 17855
7851fe2c
JS
17856 if ((bf_get(lpfc_cqe_code,
17857 &dmabuf->cq_event.cqe.rcqe_cmpl) == CQE_CODE_RECEIVE_V1))
17858 fcfi = bf_get(lpfc_rcqe_fcf_id_v1,
17859 &dmabuf->cq_event.cqe.rcqe_cmpl);
17860 else
17861 fcfi = bf_get(lpfc_rcqe_fcf_id,
17862 &dmabuf->cq_event.cqe.rcqe_cmpl);
939723a4 17863
ae9e28f3
JS
17864 if (fc_hdr->fh_r_ctl == 0xF4 && fc_hdr->fh_type == 0xFF) {
17865 vport = phba->pport;
17866 /* Handle MDS Loopback frames */
17867 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
17868 return;
17869 }
17870
895427bd
JS
17871 /* d_id this frame is directed to */
17872 did = sli4_did_from_fc_hdr(fc_hdr);
17873
17874 vport = lpfc_fc_frame_to_vport(phba, fc_hdr, fcfi, did);
939723a4 17875 if (!vport) {
4d9ab994
JS
17876 /* throw out the frame */
17877 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17878 return;
17879 }
939723a4 17880
939723a4
JS
17881 /* vport is registered unless we rcv a FLOGI directed to Fabric_DID */
17882 if (!(vport->vpi_state & LPFC_VPI_REGISTERED) &&
17883 (did != Fabric_DID)) {
17884 /*
17885 * Throw out the frame if we are not pt2pt.
17886 * The pt2pt protocol allows for discovery frames
17887 * to be received without a registered VPI.
17888 */
17889 if (!(vport->fc_flag & FC_PT2PT) ||
17890 (phba->link_state == LPFC_HBA_READY)) {
17891 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17892 return;
17893 }
17894 }
17895
6669f9bb
JS
17896 /* Handle the basic abort sequence (BA_ABTS) event */
17897 if (fc_hdr->fh_r_ctl == FC_RCTL_BA_ABTS) {
17898 lpfc_sli4_handle_unsol_abort(vport, dmabuf);
17899 return;
17900 }
17901
4d9ab994
JS
17902 /* Link this frame */
17903 seq_dmabuf = lpfc_fc_frame_add(vport, dmabuf);
17904 if (!seq_dmabuf) {
17905 /* unable to add frame to vport - throw it out */
17906 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17907 return;
17908 }
17909 /* If not last frame in sequence continue processing frames. */
def9c7a9 17910 if (!lpfc_seq_complete(seq_dmabuf))
4d9ab994 17911 return;
def9c7a9 17912
6669f9bb
JS
17913 /* Send the complete sequence to the upper layer protocol */
17914 lpfc_sli4_send_seq_to_ulp(vport, seq_dmabuf);
4f774513 17915}
6fb120a7
JS
17916
17917/**
17918 * lpfc_sli4_post_all_rpi_hdrs - Post the rpi header memory region to the port
17919 * @phba: pointer to lpfc hba data structure.
17920 *
17921 * This routine is invoked to post rpi header templates to the
17922 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
17923 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
17924 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
17925 *
17926 * This routine does not require any locks. It's usage is expected
17927 * to be driver load or reset recovery when the driver is
17928 * sequential.
17929 *
17930 * Return codes
af901ca1 17931 * 0 - successful
d439d286 17932 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
17933 * When this error occurs, the driver is not guaranteed
17934 * to have any rpi regions posted to the device and
17935 * must either attempt to repost the regions or take a
17936 * fatal error.
17937 **/
17938int
17939lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *phba)
17940{
17941 struct lpfc_rpi_hdr *rpi_page;
17942 uint32_t rc = 0;
6d368e53
JS
17943 uint16_t lrpi = 0;
17944
17945 /* SLI4 ports that support extents do not require RPI headers. */
17946 if (!phba->sli4_hba.rpi_hdrs_in_use)
17947 goto exit;
17948 if (phba->sli4_hba.extents_in_use)
17949 return -EIO;
6fb120a7 17950
6fb120a7 17951 list_for_each_entry(rpi_page, &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6d368e53
JS
17952 /*
17953 * Assign the rpi headers a physical rpi only if the driver
17954 * has not initialized those resources. A port reset only
17955 * needs the headers posted.
17956 */
17957 if (bf_get(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags) !=
17958 LPFC_RPI_RSRC_RDY)
17959 rpi_page->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
17960
6fb120a7
JS
17961 rc = lpfc_sli4_post_rpi_hdr(phba, rpi_page);
17962 if (rc != MBX_SUCCESS) {
17963 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17964 "2008 Error %d posting all rpi "
17965 "headers\n", rc);
17966 rc = -EIO;
17967 break;
17968 }
17969 }
17970
6d368e53
JS
17971 exit:
17972 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags,
17973 LPFC_RPI_RSRC_RDY);
6fb120a7
JS
17974 return rc;
17975}
17976
17977/**
17978 * lpfc_sli4_post_rpi_hdr - Post an rpi header memory region to the port
17979 * @phba: pointer to lpfc hba data structure.
17980 * @rpi_page: pointer to the rpi memory region.
17981 *
17982 * This routine is invoked to post a single rpi header to the
17983 * HBA consistent with the SLI-4 interface spec. This memory region
17984 * maps up to 64 rpi context regions.
17985 *
17986 * Return codes
af901ca1 17987 * 0 - successful
d439d286
JS
17988 * -ENOMEM - No available memory
17989 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
17990 **/
17991int
17992lpfc_sli4_post_rpi_hdr(struct lpfc_hba *phba, struct lpfc_rpi_hdr *rpi_page)
17993{
17994 LPFC_MBOXQ_t *mboxq;
17995 struct lpfc_mbx_post_hdr_tmpl *hdr_tmpl;
17996 uint32_t rc = 0;
6fb120a7
JS
17997 uint32_t shdr_status, shdr_add_status;
17998 union lpfc_sli4_cfg_shdr *shdr;
17999
6d368e53
JS
18000 /* SLI4 ports that support extents do not require RPI headers. */
18001 if (!phba->sli4_hba.rpi_hdrs_in_use)
18002 return rc;
18003 if (phba->sli4_hba.extents_in_use)
18004 return -EIO;
18005
6fb120a7
JS
18006 /* The port is notified of the header region via a mailbox command. */
18007 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18008 if (!mboxq) {
18009 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18010 "2001 Unable to allocate memory for issuing "
18011 "SLI_CONFIG_SPECIAL mailbox command\n");
18012 return -ENOMEM;
18013 }
18014
18015 /* Post all rpi memory regions to the port. */
18016 hdr_tmpl = &mboxq->u.mqe.un.hdr_tmpl;
6fb120a7
JS
18017 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18018 LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE,
18019 sizeof(struct lpfc_mbx_post_hdr_tmpl) -
fedd3b7b
JS
18020 sizeof(struct lpfc_sli4_cfg_mhdr),
18021 LPFC_SLI4_MBX_EMBED);
6d368e53
JS
18022
18023
18024 /* Post the physical rpi to the port for this rpi header. */
6fb120a7
JS
18025 bf_set(lpfc_mbx_post_hdr_tmpl_rpi_offset, hdr_tmpl,
18026 rpi_page->start_rpi);
6d368e53
JS
18027 bf_set(lpfc_mbx_post_hdr_tmpl_page_cnt,
18028 hdr_tmpl, rpi_page->page_count);
18029
6fb120a7
JS
18030 hdr_tmpl->rpi_paddr_lo = putPaddrLow(rpi_page->dmabuf->phys);
18031 hdr_tmpl->rpi_paddr_hi = putPaddrHigh(rpi_page->dmabuf->phys);
f1126688 18032 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6fb120a7
JS
18033 shdr = (union lpfc_sli4_cfg_shdr *) &hdr_tmpl->header.cfg_shdr;
18034 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18035 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18036 if (rc != MBX_TIMEOUT)
18037 mempool_free(mboxq, phba->mbox_mem_pool);
18038 if (shdr_status || shdr_add_status || rc) {
18039 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18040 "2514 POST_RPI_HDR mailbox failed with "
18041 "status x%x add_status x%x, mbx status x%x\n",
18042 shdr_status, shdr_add_status, rc);
18043 rc = -ENXIO;
845d9e8d
JS
18044 } else {
18045 /*
18046 * The next_rpi stores the next logical module-64 rpi value used
18047 * to post physical rpis in subsequent rpi postings.
18048 */
18049 spin_lock_irq(&phba->hbalock);
18050 phba->sli4_hba.next_rpi = rpi_page->next_rpi;
18051 spin_unlock_irq(&phba->hbalock);
6fb120a7
JS
18052 }
18053 return rc;
18054}
18055
18056/**
18057 * lpfc_sli4_alloc_rpi - Get an available rpi in the device's range
18058 * @phba: pointer to lpfc hba data structure.
18059 *
18060 * This routine is invoked to post rpi header templates to the
18061 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18062 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18063 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18064 *
18065 * Returns
af901ca1 18066 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
6fb120a7
JS
18067 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
18068 **/
18069int
18070lpfc_sli4_alloc_rpi(struct lpfc_hba *phba)
18071{
6d368e53
JS
18072 unsigned long rpi;
18073 uint16_t max_rpi, rpi_limit;
18074 uint16_t rpi_remaining, lrpi = 0;
6fb120a7 18075 struct lpfc_rpi_hdr *rpi_hdr;
4902b381 18076 unsigned long iflag;
6fb120a7 18077
6fb120a7 18078 /*
6d368e53
JS
18079 * Fetch the next logical rpi. Because this index is logical,
18080 * the driver starts at 0 each time.
6fb120a7 18081 */
4902b381 18082 spin_lock_irqsave(&phba->hbalock, iflag);
be6bb941
JS
18083 max_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
18084 rpi_limit = phba->sli4_hba.next_rpi;
18085
6d368e53
JS
18086 rpi = find_next_zero_bit(phba->sli4_hba.rpi_bmask, rpi_limit, 0);
18087 if (rpi >= rpi_limit)
6fb120a7
JS
18088 rpi = LPFC_RPI_ALLOC_ERROR;
18089 else {
18090 set_bit(rpi, phba->sli4_hba.rpi_bmask);
18091 phba->sli4_hba.max_cfg_param.rpi_used++;
18092 phba->sli4_hba.rpi_count++;
18093 }
be6bb941
JS
18094 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
18095 "0001 rpi:%x max:%x lim:%x\n",
18096 (int) rpi, max_rpi, rpi_limit);
6fb120a7
JS
18097
18098 /*
18099 * Don't try to allocate more rpi header regions if the device limit
6d368e53 18100 * has been exhausted.
6fb120a7
JS
18101 */
18102 if ((rpi == LPFC_RPI_ALLOC_ERROR) &&
18103 (phba->sli4_hba.rpi_count >= max_rpi)) {
4902b381 18104 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18105 return rpi;
18106 }
18107
6d368e53
JS
18108 /*
18109 * RPI header postings are not required for SLI4 ports capable of
18110 * extents.
18111 */
18112 if (!phba->sli4_hba.rpi_hdrs_in_use) {
4902b381 18113 spin_unlock_irqrestore(&phba->hbalock, iflag);
6d368e53
JS
18114 return rpi;
18115 }
18116
6fb120a7
JS
18117 /*
18118 * If the driver is running low on rpi resources, allocate another
18119 * page now. Note that the next_rpi value is used because
18120 * it represents how many are actually in use whereas max_rpi notes
18121 * how many are supported max by the device.
18122 */
6d368e53 18123 rpi_remaining = phba->sli4_hba.next_rpi - phba->sli4_hba.rpi_count;
4902b381 18124 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18125 if (rpi_remaining < LPFC_RPI_LOW_WATER_MARK) {
18126 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
18127 if (!rpi_hdr) {
18128 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18129 "2002 Error Could not grow rpi "
18130 "count\n");
18131 } else {
6d368e53
JS
18132 lrpi = rpi_hdr->start_rpi;
18133 rpi_hdr->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
6fb120a7
JS
18134 lpfc_sli4_post_rpi_hdr(phba, rpi_hdr);
18135 }
18136 }
18137
18138 return rpi;
18139}
18140
d7c47992
JS
18141/**
18142 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18143 * @phba: pointer to lpfc hba data structure.
18144 *
18145 * This routine is invoked to release an rpi to the pool of
18146 * available rpis maintained by the driver.
18147 **/
5d8b8167 18148static void
d7c47992
JS
18149__lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18150{
18151 if (test_and_clear_bit(rpi, phba->sli4_hba.rpi_bmask)) {
18152 phba->sli4_hba.rpi_count--;
18153 phba->sli4_hba.max_cfg_param.rpi_used--;
18154 }
18155}
18156
6fb120a7
JS
18157/**
18158 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18159 * @phba: pointer to lpfc hba data structure.
18160 *
18161 * This routine is invoked to release an rpi to the pool of
18162 * available rpis maintained by the driver.
18163 **/
18164void
18165lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18166{
18167 spin_lock_irq(&phba->hbalock);
d7c47992 18168 __lpfc_sli4_free_rpi(phba, rpi);
6fb120a7
JS
18169 spin_unlock_irq(&phba->hbalock);
18170}
18171
18172/**
18173 * lpfc_sli4_remove_rpis - Remove the rpi bitmask region
18174 * @phba: pointer to lpfc hba data structure.
18175 *
18176 * This routine is invoked to remove the memory region that
18177 * provided rpi via a bitmask.
18178 **/
18179void
18180lpfc_sli4_remove_rpis(struct lpfc_hba *phba)
18181{
18182 kfree(phba->sli4_hba.rpi_bmask);
6d368e53
JS
18183 kfree(phba->sli4_hba.rpi_ids);
18184 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6fb120a7
JS
18185}
18186
18187/**
18188 * lpfc_sli4_resume_rpi - Remove the rpi bitmask region
18189 * @phba: pointer to lpfc hba data structure.
18190 *
18191 * This routine is invoked to remove the memory region that
18192 * provided rpi via a bitmask.
18193 **/
18194int
6b5151fd
JS
18195lpfc_sli4_resume_rpi(struct lpfc_nodelist *ndlp,
18196 void (*cmpl)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *arg)
6fb120a7
JS
18197{
18198 LPFC_MBOXQ_t *mboxq;
18199 struct lpfc_hba *phba = ndlp->phba;
18200 int rc;
18201
18202 /* The port is notified of the header region via a mailbox command. */
18203 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18204 if (!mboxq)
18205 return -ENOMEM;
18206
18207 /* Post all rpi memory regions to the port. */
18208 lpfc_resume_rpi(mboxq, ndlp);
6b5151fd
JS
18209 if (cmpl) {
18210 mboxq->mbox_cmpl = cmpl;
18211 mboxq->context1 = arg;
18212 mboxq->context2 = ndlp;
72859909
JS
18213 } else
18214 mboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6b5151fd 18215 mboxq->vport = ndlp->vport;
6fb120a7
JS
18216 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18217 if (rc == MBX_NOT_FINISHED) {
18218 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18219 "2010 Resume RPI Mailbox failed "
18220 "status %d, mbxStatus x%x\n", rc,
18221 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
18222 mempool_free(mboxq, phba->mbox_mem_pool);
18223 return -EIO;
18224 }
18225 return 0;
18226}
18227
18228/**
18229 * lpfc_sli4_init_vpi - Initialize a vpi with the port
76a95d75 18230 * @vport: Pointer to the vport for which the vpi is being initialized
6fb120a7 18231 *
76a95d75 18232 * This routine is invoked to activate a vpi with the port.
6fb120a7
JS
18233 *
18234 * Returns:
18235 * 0 success
18236 * -Evalue otherwise
18237 **/
18238int
76a95d75 18239lpfc_sli4_init_vpi(struct lpfc_vport *vport)
6fb120a7
JS
18240{
18241 LPFC_MBOXQ_t *mboxq;
18242 int rc = 0;
6a9c52cf 18243 int retval = MBX_SUCCESS;
6fb120a7 18244 uint32_t mbox_tmo;
76a95d75 18245 struct lpfc_hba *phba = vport->phba;
6fb120a7
JS
18246 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18247 if (!mboxq)
18248 return -ENOMEM;
76a95d75 18249 lpfc_init_vpi(phba, mboxq, vport->vpi);
a183a15f 18250 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
6fb120a7 18251 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
6fb120a7 18252 if (rc != MBX_SUCCESS) {
76a95d75 18253 lpfc_printf_vlog(vport, KERN_ERR, LOG_SLI,
6fb120a7
JS
18254 "2022 INIT VPI Mailbox failed "
18255 "status %d, mbxStatus x%x\n", rc,
18256 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
6a9c52cf 18257 retval = -EIO;
6fb120a7 18258 }
6a9c52cf 18259 if (rc != MBX_TIMEOUT)
76a95d75 18260 mempool_free(mboxq, vport->phba->mbox_mem_pool);
6a9c52cf
JS
18261
18262 return retval;
6fb120a7
JS
18263}
18264
18265/**
18266 * lpfc_mbx_cmpl_add_fcf_record - add fcf mbox completion handler.
18267 * @phba: pointer to lpfc hba data structure.
18268 * @mboxq: Pointer to mailbox object.
18269 *
18270 * This routine is invoked to manually add a single FCF record. The caller
18271 * must pass a completely initialized FCF_Record. This routine takes
18272 * care of the nonembedded mailbox operations.
18273 **/
18274static void
18275lpfc_mbx_cmpl_add_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
18276{
18277 void *virt_addr;
18278 union lpfc_sli4_cfg_shdr *shdr;
18279 uint32_t shdr_status, shdr_add_status;
18280
18281 virt_addr = mboxq->sge_array->addr[0];
18282 /* The IOCTL status is embedded in the mailbox subheader. */
18283 shdr = (union lpfc_sli4_cfg_shdr *) virt_addr;
18284 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18285 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18286
18287 if ((shdr_status || shdr_add_status) &&
18288 (shdr_status != STATUS_FCF_IN_USE))
18289 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18290 "2558 ADD_FCF_RECORD mailbox failed with "
18291 "status x%x add_status x%x\n",
18292 shdr_status, shdr_add_status);
18293
18294 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18295}
18296
18297/**
18298 * lpfc_sli4_add_fcf_record - Manually add an FCF Record.
18299 * @phba: pointer to lpfc hba data structure.
18300 * @fcf_record: pointer to the initialized fcf record to add.
18301 *
18302 * This routine is invoked to manually add a single FCF record. The caller
18303 * must pass a completely initialized FCF_Record. This routine takes
18304 * care of the nonembedded mailbox operations.
18305 **/
18306int
18307lpfc_sli4_add_fcf_record(struct lpfc_hba *phba, struct fcf_record *fcf_record)
18308{
18309 int rc = 0;
18310 LPFC_MBOXQ_t *mboxq;
18311 uint8_t *bytep;
18312 void *virt_addr;
6fb120a7
JS
18313 struct lpfc_mbx_sge sge;
18314 uint32_t alloc_len, req_len;
18315 uint32_t fcfindex;
18316
18317 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18318 if (!mboxq) {
18319 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18320 "2009 Failed to allocate mbox for ADD_FCF cmd\n");
18321 return -ENOMEM;
18322 }
18323
18324 req_len = sizeof(struct fcf_record) + sizeof(union lpfc_sli4_cfg_shdr) +
18325 sizeof(uint32_t);
18326
18327 /* Allocate DMA memory and set up the non-embedded mailbox command */
18328 alloc_len = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18329 LPFC_MBOX_OPCODE_FCOE_ADD_FCF,
18330 req_len, LPFC_SLI4_MBX_NEMBED);
18331 if (alloc_len < req_len) {
18332 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18333 "2523 Allocated DMA memory size (x%x) is "
18334 "less than the requested DMA memory "
18335 "size (x%x)\n", alloc_len, req_len);
18336 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18337 return -ENOMEM;
18338 }
18339
18340 /*
18341 * Get the first SGE entry from the non-embedded DMA memory. This
18342 * routine only uses a single SGE.
18343 */
18344 lpfc_sli4_mbx_sge_get(mboxq, 0, &sge);
6fb120a7
JS
18345 virt_addr = mboxq->sge_array->addr[0];
18346 /*
18347 * Configure the FCF record for FCFI 0. This is the driver's
18348 * hardcoded default and gets used in nonFIP mode.
18349 */
18350 fcfindex = bf_get(lpfc_fcf_record_fcf_index, fcf_record);
18351 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr);
18352 lpfc_sli_pcimem_bcopy(&fcfindex, bytep, sizeof(uint32_t));
18353
18354 /*
18355 * Copy the fcf_index and the FCF Record Data. The data starts after
18356 * the FCoE header plus word10. The data copy needs to be endian
18357 * correct.
18358 */
18359 bytep += sizeof(uint32_t);
18360 lpfc_sli_pcimem_bcopy(fcf_record, bytep, sizeof(struct fcf_record));
18361 mboxq->vport = phba->pport;
18362 mboxq->mbox_cmpl = lpfc_mbx_cmpl_add_fcf_record;
18363 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18364 if (rc == MBX_NOT_FINISHED) {
18365 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18366 "2515 ADD_FCF_RECORD mailbox failed with "
18367 "status 0x%x\n", rc);
18368 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18369 rc = -EIO;
18370 } else
18371 rc = 0;
18372
18373 return rc;
18374}
18375
18376/**
18377 * lpfc_sli4_build_dflt_fcf_record - Build the driver's default FCF Record.
18378 * @phba: pointer to lpfc hba data structure.
18379 * @fcf_record: pointer to the fcf record to write the default data.
18380 * @fcf_index: FCF table entry index.
18381 *
18382 * This routine is invoked to build the driver's default FCF record. The
18383 * values used are hardcoded. This routine handles memory initialization.
18384 *
18385 **/
18386void
18387lpfc_sli4_build_dflt_fcf_record(struct lpfc_hba *phba,
18388 struct fcf_record *fcf_record,
18389 uint16_t fcf_index)
18390{
18391 memset(fcf_record, 0, sizeof(struct fcf_record));
18392 fcf_record->max_rcv_size = LPFC_FCOE_MAX_RCV_SIZE;
18393 fcf_record->fka_adv_period = LPFC_FCOE_FKA_ADV_PER;
18394 fcf_record->fip_priority = LPFC_FCOE_FIP_PRIORITY;
18395 bf_set(lpfc_fcf_record_mac_0, fcf_record, phba->fc_map[0]);
18396 bf_set(lpfc_fcf_record_mac_1, fcf_record, phba->fc_map[1]);
18397 bf_set(lpfc_fcf_record_mac_2, fcf_record, phba->fc_map[2]);
18398 bf_set(lpfc_fcf_record_mac_3, fcf_record, LPFC_FCOE_FCF_MAC3);
18399 bf_set(lpfc_fcf_record_mac_4, fcf_record, LPFC_FCOE_FCF_MAC4);
18400 bf_set(lpfc_fcf_record_mac_5, fcf_record, LPFC_FCOE_FCF_MAC5);
18401 bf_set(lpfc_fcf_record_fc_map_0, fcf_record, phba->fc_map[0]);
18402 bf_set(lpfc_fcf_record_fc_map_1, fcf_record, phba->fc_map[1]);
18403 bf_set(lpfc_fcf_record_fc_map_2, fcf_record, phba->fc_map[2]);
18404 bf_set(lpfc_fcf_record_fcf_valid, fcf_record, 1);
0c287589 18405 bf_set(lpfc_fcf_record_fcf_avail, fcf_record, 1);
6fb120a7
JS
18406 bf_set(lpfc_fcf_record_fcf_index, fcf_record, fcf_index);
18407 bf_set(lpfc_fcf_record_mac_addr_prov, fcf_record,
18408 LPFC_FCF_FPMA | LPFC_FCF_SPMA);
18409 /* Set the VLAN bit map */
18410 if (phba->valid_vlan) {
18411 fcf_record->vlan_bitmap[phba->vlan_id / 8]
18412 = 1 << (phba->vlan_id % 8);
18413 }
18414}
18415
18416/**
0c9ab6f5 18417 * lpfc_sli4_fcf_scan_read_fcf_rec - Read hba fcf record for fcf scan.
6fb120a7
JS
18418 * @phba: pointer to lpfc hba data structure.
18419 * @fcf_index: FCF table entry offset.
18420 *
0c9ab6f5
JS
18421 * This routine is invoked to scan the entire FCF table by reading FCF
18422 * record and processing it one at a time starting from the @fcf_index
18423 * for initial FCF discovery or fast FCF failover rediscovery.
18424 *
25985edc 18425 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5 18426 * otherwise.
6fb120a7
JS
18427 **/
18428int
0c9ab6f5 18429lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
6fb120a7
JS
18430{
18431 int rc = 0, error;
18432 LPFC_MBOXQ_t *mboxq;
6fb120a7 18433
32b9793f 18434 phba->fcoe_eventtag_at_fcf_scan = phba->fcoe_eventtag;
80c17849 18435 phba->fcoe_cvl_eventtag_attn = phba->fcoe_cvl_eventtag;
6fb120a7
JS
18436 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18437 if (!mboxq) {
18438 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18439 "2000 Failed to allocate mbox for "
18440 "READ_FCF cmd\n");
4d9ab994 18441 error = -ENOMEM;
0c9ab6f5 18442 goto fail_fcf_scan;
6fb120a7 18443 }
ecfd03c6 18444 /* Construct the read FCF record mailbox command */
0c9ab6f5 18445 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
ecfd03c6
JS
18446 if (rc) {
18447 error = -EINVAL;
0c9ab6f5 18448 goto fail_fcf_scan;
6fb120a7 18449 }
ecfd03c6 18450 /* Issue the mailbox command asynchronously */
6fb120a7 18451 mboxq->vport = phba->pport;
0c9ab6f5 18452 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_scan_read_fcf_rec;
a93ff37a
JS
18453
18454 spin_lock_irq(&phba->hbalock);
18455 phba->hba_flag |= FCF_TS_INPROG;
18456 spin_unlock_irq(&phba->hbalock);
18457
6fb120a7 18458 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
ecfd03c6 18459 if (rc == MBX_NOT_FINISHED)
6fb120a7 18460 error = -EIO;
ecfd03c6 18461 else {
38b92ef8
JS
18462 /* Reset eligible FCF count for new scan */
18463 if (fcf_index == LPFC_FCOE_FCF_GET_FIRST)
999d813f 18464 phba->fcf.eligible_fcf_cnt = 0;
6fb120a7 18465 error = 0;
32b9793f 18466 }
0c9ab6f5 18467fail_fcf_scan:
4d9ab994
JS
18468 if (error) {
18469 if (mboxq)
18470 lpfc_sli4_mbox_cmd_free(phba, mboxq);
a93ff37a 18471 /* FCF scan failed, clear FCF_TS_INPROG flag */
4d9ab994 18472 spin_lock_irq(&phba->hbalock);
a93ff37a 18473 phba->hba_flag &= ~FCF_TS_INPROG;
4d9ab994
JS
18474 spin_unlock_irq(&phba->hbalock);
18475 }
6fb120a7
JS
18476 return error;
18477}
a0c87cbd 18478
0c9ab6f5 18479/**
a93ff37a 18480 * lpfc_sli4_fcf_rr_read_fcf_rec - Read hba fcf record for roundrobin fcf.
0c9ab6f5
JS
18481 * @phba: pointer to lpfc hba data structure.
18482 * @fcf_index: FCF table entry offset.
18483 *
18484 * This routine is invoked to read an FCF record indicated by @fcf_index
a93ff37a 18485 * and to use it for FLOGI roundrobin FCF failover.
0c9ab6f5 18486 *
25985edc 18487 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18488 * otherwise.
18489 **/
18490int
18491lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18492{
18493 int rc = 0, error;
18494 LPFC_MBOXQ_t *mboxq;
18495
18496 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18497 if (!mboxq) {
18498 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18499 "2763 Failed to allocate mbox for "
18500 "READ_FCF cmd\n");
18501 error = -ENOMEM;
18502 goto fail_fcf_read;
18503 }
18504 /* Construct the read FCF record mailbox command */
18505 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18506 if (rc) {
18507 error = -EINVAL;
18508 goto fail_fcf_read;
18509 }
18510 /* Issue the mailbox command asynchronously */
18511 mboxq->vport = phba->pport;
18512 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_rr_read_fcf_rec;
18513 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18514 if (rc == MBX_NOT_FINISHED)
18515 error = -EIO;
18516 else
18517 error = 0;
18518
18519fail_fcf_read:
18520 if (error && mboxq)
18521 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18522 return error;
18523}
18524
18525/**
18526 * lpfc_sli4_read_fcf_rec - Read hba fcf record for update eligible fcf bmask.
18527 * @phba: pointer to lpfc hba data structure.
18528 * @fcf_index: FCF table entry offset.
18529 *
18530 * This routine is invoked to read an FCF record indicated by @fcf_index to
a93ff37a 18531 * determine whether it's eligible for FLOGI roundrobin failover list.
0c9ab6f5 18532 *
25985edc 18533 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18534 * otherwise.
18535 **/
18536int
18537lpfc_sli4_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18538{
18539 int rc = 0, error;
18540 LPFC_MBOXQ_t *mboxq;
18541
18542 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18543 if (!mboxq) {
18544 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18545 "2758 Failed to allocate mbox for "
18546 "READ_FCF cmd\n");
18547 error = -ENOMEM;
18548 goto fail_fcf_read;
18549 }
18550 /* Construct the read FCF record mailbox command */
18551 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18552 if (rc) {
18553 error = -EINVAL;
18554 goto fail_fcf_read;
18555 }
18556 /* Issue the mailbox command asynchronously */
18557 mboxq->vport = phba->pport;
18558 mboxq->mbox_cmpl = lpfc_mbx_cmpl_read_fcf_rec;
18559 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18560 if (rc == MBX_NOT_FINISHED)
18561 error = -EIO;
18562 else
18563 error = 0;
18564
18565fail_fcf_read:
18566 if (error && mboxq)
18567 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18568 return error;
18569}
18570
7d791df7 18571/**
f5cb5304 18572 * lpfc_check_next_fcf_pri_level
7d791df7
JS
18573 * phba pointer to the lpfc_hba struct for this port.
18574 * This routine is called from the lpfc_sli4_fcf_rr_next_index_get
18575 * routine when the rr_bmask is empty. The FCF indecies are put into the
18576 * rr_bmask based on their priority level. Starting from the highest priority
18577 * to the lowest. The most likely FCF candidate will be in the highest
18578 * priority group. When this routine is called it searches the fcf_pri list for
18579 * next lowest priority group and repopulates the rr_bmask with only those
18580 * fcf_indexes.
18581 * returns:
18582 * 1=success 0=failure
18583 **/
5d8b8167 18584static int
7d791df7
JS
18585lpfc_check_next_fcf_pri_level(struct lpfc_hba *phba)
18586{
18587 uint16_t next_fcf_pri;
18588 uint16_t last_index;
18589 struct lpfc_fcf_pri *fcf_pri;
18590 int rc;
18591 int ret = 0;
18592
18593 last_index = find_first_bit(phba->fcf.fcf_rr_bmask,
18594 LPFC_SLI4_FCF_TBL_INDX_MAX);
18595 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
18596 "3060 Last IDX %d\n", last_index);
2562669c
JS
18597
18598 /* Verify the priority list has 2 or more entries */
18599 spin_lock_irq(&phba->hbalock);
18600 if (list_empty(&phba->fcf.fcf_pri_list) ||
18601 list_is_singular(&phba->fcf.fcf_pri_list)) {
18602 spin_unlock_irq(&phba->hbalock);
7d791df7
JS
18603 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
18604 "3061 Last IDX %d\n", last_index);
18605 return 0; /* Empty rr list */
18606 }
2562669c
JS
18607 spin_unlock_irq(&phba->hbalock);
18608
7d791df7
JS
18609 next_fcf_pri = 0;
18610 /*
18611 * Clear the rr_bmask and set all of the bits that are at this
18612 * priority.
18613 */
18614 memset(phba->fcf.fcf_rr_bmask, 0,
18615 sizeof(*phba->fcf.fcf_rr_bmask));
18616 spin_lock_irq(&phba->hbalock);
18617 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18618 if (fcf_pri->fcf_rec.flag & LPFC_FCF_FLOGI_FAILED)
18619 continue;
18620 /*
18621 * the 1st priority that has not FLOGI failed
18622 * will be the highest.
18623 */
18624 if (!next_fcf_pri)
18625 next_fcf_pri = fcf_pri->fcf_rec.priority;
18626 spin_unlock_irq(&phba->hbalock);
18627 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18628 rc = lpfc_sli4_fcf_rr_index_set(phba,
18629 fcf_pri->fcf_rec.fcf_index);
18630 if (rc)
18631 return 0;
18632 }
18633 spin_lock_irq(&phba->hbalock);
18634 }
18635 /*
18636 * if next_fcf_pri was not set above and the list is not empty then
18637 * we have failed flogis on all of them. So reset flogi failed
4907cb7b 18638 * and start at the beginning.
7d791df7
JS
18639 */
18640 if (!next_fcf_pri && !list_empty(&phba->fcf.fcf_pri_list)) {
18641 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18642 fcf_pri->fcf_rec.flag &= ~LPFC_FCF_FLOGI_FAILED;
18643 /*
18644 * the 1st priority that has not FLOGI failed
18645 * will be the highest.
18646 */
18647 if (!next_fcf_pri)
18648 next_fcf_pri = fcf_pri->fcf_rec.priority;
18649 spin_unlock_irq(&phba->hbalock);
18650 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18651 rc = lpfc_sli4_fcf_rr_index_set(phba,
18652 fcf_pri->fcf_rec.fcf_index);
18653 if (rc)
18654 return 0;
18655 }
18656 spin_lock_irq(&phba->hbalock);
18657 }
18658 } else
18659 ret = 1;
18660 spin_unlock_irq(&phba->hbalock);
18661
18662 return ret;
18663}
0c9ab6f5
JS
18664/**
18665 * lpfc_sli4_fcf_rr_next_index_get - Get next eligible fcf record index
18666 * @phba: pointer to lpfc hba data structure.
18667 *
18668 * This routine is to get the next eligible FCF record index in a round
18669 * robin fashion. If the next eligible FCF record index equals to the
a93ff37a 18670 * initial roundrobin FCF record index, LPFC_FCOE_FCF_NEXT_NONE (0xFFFF)
0c9ab6f5
JS
18671 * shall be returned, otherwise, the next eligible FCF record's index
18672 * shall be returned.
18673 **/
18674uint16_t
18675lpfc_sli4_fcf_rr_next_index_get(struct lpfc_hba *phba)
18676{
18677 uint16_t next_fcf_index;
18678
421c6622 18679initial_priority:
3804dc84 18680 /* Search start from next bit of currently registered FCF index */
421c6622
JS
18681 next_fcf_index = phba->fcf.current_rec.fcf_indx;
18682
7d791df7 18683next_priority:
421c6622
JS
18684 /* Determine the next fcf index to check */
18685 next_fcf_index = (next_fcf_index + 1) % LPFC_SLI4_FCF_TBL_INDX_MAX;
0c9ab6f5
JS
18686 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18687 LPFC_SLI4_FCF_TBL_INDX_MAX,
3804dc84
JS
18688 next_fcf_index);
18689
0c9ab6f5 18690 /* Wrap around condition on phba->fcf.fcf_rr_bmask */
7d791df7
JS
18691 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18692 /*
18693 * If we have wrapped then we need to clear the bits that
18694 * have been tested so that we can detect when we should
18695 * change the priority level.
18696 */
0c9ab6f5
JS
18697 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18698 LPFC_SLI4_FCF_TBL_INDX_MAX, 0);
7d791df7
JS
18699 }
18700
3804dc84
JS
18701
18702 /* Check roundrobin failover list empty condition */
7d791df7
JS
18703 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX ||
18704 next_fcf_index == phba->fcf.current_rec.fcf_indx) {
18705 /*
18706 * If next fcf index is not found check if there are lower
18707 * Priority level fcf's in the fcf_priority list.
18708 * Set up the rr_bmask with all of the avaiable fcf bits
18709 * at that level and continue the selection process.
18710 */
18711 if (lpfc_check_next_fcf_pri_level(phba))
421c6622 18712 goto initial_priority;
3804dc84
JS
18713 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP,
18714 "2844 No roundrobin failover FCF available\n");
036cad1f
JS
18715
18716 return LPFC_FCOE_FCF_NEXT_NONE;
3804dc84
JS
18717 }
18718
7d791df7
JS
18719 if (next_fcf_index < LPFC_SLI4_FCF_TBL_INDX_MAX &&
18720 phba->fcf.fcf_pri[next_fcf_index].fcf_rec.flag &
f5cb5304
JS
18721 LPFC_FCF_FLOGI_FAILED) {
18722 if (list_is_singular(&phba->fcf.fcf_pri_list))
18723 return LPFC_FCOE_FCF_NEXT_NONE;
18724
7d791df7 18725 goto next_priority;
f5cb5304 18726 }
7d791df7 18727
3804dc84 18728 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a
JS
18729 "2845 Get next roundrobin failover FCF (x%x)\n",
18730 next_fcf_index);
18731
0c9ab6f5
JS
18732 return next_fcf_index;
18733}
18734
18735/**
18736 * lpfc_sli4_fcf_rr_index_set - Set bmask with eligible fcf record index
18737 * @phba: pointer to lpfc hba data structure.
18738 *
18739 * This routine sets the FCF record index in to the eligible bmask for
a93ff37a 18740 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
18741 * does not go beyond the range of the driver allocated bmask dimension
18742 * before setting the bit.
18743 *
18744 * Returns 0 if the index bit successfully set, otherwise, it returns
18745 * -EINVAL.
18746 **/
18747int
18748lpfc_sli4_fcf_rr_index_set(struct lpfc_hba *phba, uint16_t fcf_index)
18749{
18750 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18751 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
18752 "2610 FCF (x%x) reached driver's book "
18753 "keeping dimension:x%x\n",
0c9ab6f5
JS
18754 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
18755 return -EINVAL;
18756 }
18757 /* Set the eligible FCF record index bmask */
18758 set_bit(fcf_index, phba->fcf.fcf_rr_bmask);
18759
3804dc84 18760 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18761 "2790 Set FCF (x%x) to roundrobin FCF failover "
3804dc84
JS
18762 "bmask\n", fcf_index);
18763
0c9ab6f5
JS
18764 return 0;
18765}
18766
18767/**
3804dc84 18768 * lpfc_sli4_fcf_rr_index_clear - Clear bmask from eligible fcf record index
0c9ab6f5
JS
18769 * @phba: pointer to lpfc hba data structure.
18770 *
18771 * This routine clears the FCF record index from the eligible bmask for
a93ff37a 18772 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
18773 * does not go beyond the range of the driver allocated bmask dimension
18774 * before clearing the bit.
18775 **/
18776void
18777lpfc_sli4_fcf_rr_index_clear(struct lpfc_hba *phba, uint16_t fcf_index)
18778{
9a803a74 18779 struct lpfc_fcf_pri *fcf_pri, *fcf_pri_next;
0c9ab6f5
JS
18780 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18781 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
18782 "2762 FCF (x%x) reached driver's book "
18783 "keeping dimension:x%x\n",
0c9ab6f5
JS
18784 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
18785 return;
18786 }
18787 /* Clear the eligible FCF record index bmask */
7d791df7 18788 spin_lock_irq(&phba->hbalock);
9a803a74
JS
18789 list_for_each_entry_safe(fcf_pri, fcf_pri_next, &phba->fcf.fcf_pri_list,
18790 list) {
7d791df7
JS
18791 if (fcf_pri->fcf_rec.fcf_index == fcf_index) {
18792 list_del_init(&fcf_pri->list);
18793 break;
18794 }
18795 }
18796 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 18797 clear_bit(fcf_index, phba->fcf.fcf_rr_bmask);
3804dc84
JS
18798
18799 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18800 "2791 Clear FCF (x%x) from roundrobin failover "
3804dc84 18801 "bmask\n", fcf_index);
0c9ab6f5
JS
18802}
18803
ecfd03c6
JS
18804/**
18805 * lpfc_mbx_cmpl_redisc_fcf_table - completion routine for rediscover FCF table
18806 * @phba: pointer to lpfc hba data structure.
18807 *
18808 * This routine is the completion routine for the rediscover FCF table mailbox
18809 * command. If the mailbox command returned failure, it will try to stop the
18810 * FCF rediscover wait timer.
18811 **/
5d8b8167 18812static void
ecfd03c6
JS
18813lpfc_mbx_cmpl_redisc_fcf_table(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
18814{
18815 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
18816 uint32_t shdr_status, shdr_add_status;
18817
18818 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
18819
18820 shdr_status = bf_get(lpfc_mbox_hdr_status,
18821 &redisc_fcf->header.cfg_shdr.response);
18822 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
18823 &redisc_fcf->header.cfg_shdr.response);
18824 if (shdr_status || shdr_add_status) {
0c9ab6f5 18825 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
ecfd03c6
JS
18826 "2746 Requesting for FCF rediscovery failed "
18827 "status x%x add_status x%x\n",
18828 shdr_status, shdr_add_status);
0c9ab6f5 18829 if (phba->fcf.fcf_flag & FCF_ACVL_DISC) {
fc2b989b 18830 spin_lock_irq(&phba->hbalock);
0c9ab6f5 18831 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b
JS
18832 spin_unlock_irq(&phba->hbalock);
18833 /*
18834 * CVL event triggered FCF rediscover request failed,
18835 * last resort to re-try current registered FCF entry.
18836 */
18837 lpfc_retry_pport_discovery(phba);
18838 } else {
18839 spin_lock_irq(&phba->hbalock);
0c9ab6f5 18840 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
fc2b989b
JS
18841 spin_unlock_irq(&phba->hbalock);
18842 /*
18843 * DEAD FCF event triggered FCF rediscover request
18844 * failed, last resort to fail over as a link down
18845 * to FCF registration.
18846 */
18847 lpfc_sli4_fcf_dead_failthrough(phba);
18848 }
0c9ab6f5
JS
18849 } else {
18850 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18851 "2775 Start FCF rediscover quiescent timer\n");
ecfd03c6
JS
18852 /*
18853 * Start FCF rediscovery wait timer for pending FCF
18854 * before rescan FCF record table.
18855 */
18856 lpfc_fcf_redisc_wait_start_timer(phba);
0c9ab6f5 18857 }
ecfd03c6
JS
18858
18859 mempool_free(mbox, phba->mbox_mem_pool);
18860}
18861
18862/**
3804dc84 18863 * lpfc_sli4_redisc_fcf_table - Request to rediscover entire FCF table by port.
ecfd03c6
JS
18864 * @phba: pointer to lpfc hba data structure.
18865 *
18866 * This routine is invoked to request for rediscovery of the entire FCF table
18867 * by the port.
18868 **/
18869int
18870lpfc_sli4_redisc_fcf_table(struct lpfc_hba *phba)
18871{
18872 LPFC_MBOXQ_t *mbox;
18873 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
18874 int rc, length;
18875
0c9ab6f5
JS
18876 /* Cancel retry delay timers to all vports before FCF rediscover */
18877 lpfc_cancel_all_vport_retry_delay_timer(phba);
18878
ecfd03c6
JS
18879 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18880 if (!mbox) {
18881 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18882 "2745 Failed to allocate mbox for "
18883 "requesting FCF rediscover.\n");
18884 return -ENOMEM;
18885 }
18886
18887 length = (sizeof(struct lpfc_mbx_redisc_fcf_tbl) -
18888 sizeof(struct lpfc_sli4_cfg_mhdr));
18889 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
18890 LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF,
18891 length, LPFC_SLI4_MBX_EMBED);
18892
18893 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
18894 /* Set count to 0 for invalidating the entire FCF database */
18895 bf_set(lpfc_mbx_redisc_fcf_count, redisc_fcf, 0);
18896
18897 /* Issue the mailbox command asynchronously */
18898 mbox->vport = phba->pport;
18899 mbox->mbox_cmpl = lpfc_mbx_cmpl_redisc_fcf_table;
18900 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
18901
18902 if (rc == MBX_NOT_FINISHED) {
18903 mempool_free(mbox, phba->mbox_mem_pool);
18904 return -EIO;
18905 }
18906 return 0;
18907}
18908
fc2b989b
JS
18909/**
18910 * lpfc_sli4_fcf_dead_failthrough - Failthrough routine to fcf dead event
18911 * @phba: pointer to lpfc hba data structure.
18912 *
18913 * This function is the failover routine as a last resort to the FCF DEAD
18914 * event when driver failed to perform fast FCF failover.
18915 **/
18916void
18917lpfc_sli4_fcf_dead_failthrough(struct lpfc_hba *phba)
18918{
18919 uint32_t link_state;
18920
18921 /*
18922 * Last resort as FCF DEAD event failover will treat this as
18923 * a link down, but save the link state because we don't want
18924 * it to be changed to Link Down unless it is already down.
18925 */
18926 link_state = phba->link_state;
18927 lpfc_linkdown(phba);
18928 phba->link_state = link_state;
18929
18930 /* Unregister FCF if no devices connected to it */
18931 lpfc_unregister_unused_fcf(phba);
18932}
18933
a0c87cbd 18934/**
026abb87 18935 * lpfc_sli_get_config_region23 - Get sli3 port region 23 data.
a0c87cbd 18936 * @phba: pointer to lpfc hba data structure.
026abb87 18937 * @rgn23_data: pointer to configure region 23 data.
a0c87cbd 18938 *
026abb87
JS
18939 * This function gets SLI3 port configure region 23 data through memory dump
18940 * mailbox command. When it successfully retrieves data, the size of the data
18941 * will be returned, otherwise, 0 will be returned.
a0c87cbd 18942 **/
026abb87
JS
18943static uint32_t
18944lpfc_sli_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
a0c87cbd
JS
18945{
18946 LPFC_MBOXQ_t *pmb = NULL;
18947 MAILBOX_t *mb;
026abb87 18948 uint32_t offset = 0;
a0c87cbd
JS
18949 int rc;
18950
026abb87
JS
18951 if (!rgn23_data)
18952 return 0;
18953
a0c87cbd
JS
18954 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18955 if (!pmb) {
18956 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
026abb87
JS
18957 "2600 failed to allocate mailbox memory\n");
18958 return 0;
a0c87cbd
JS
18959 }
18960 mb = &pmb->u.mb;
18961
a0c87cbd
JS
18962 do {
18963 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_23);
18964 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
18965
18966 if (rc != MBX_SUCCESS) {
18967 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
026abb87
JS
18968 "2601 failed to read config "
18969 "region 23, rc 0x%x Status 0x%x\n",
18970 rc, mb->mbxStatus);
a0c87cbd
JS
18971 mb->un.varDmp.word_cnt = 0;
18972 }
18973 /*
18974 * dump mem may return a zero when finished or we got a
18975 * mailbox error, either way we are done.
18976 */
18977 if (mb->un.varDmp.word_cnt == 0)
18978 break;
18979 if (mb->un.varDmp.word_cnt > DMP_RGN23_SIZE - offset)
18980 mb->un.varDmp.word_cnt = DMP_RGN23_SIZE - offset;
18981
18982 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
026abb87
JS
18983 rgn23_data + offset,
18984 mb->un.varDmp.word_cnt);
a0c87cbd
JS
18985 offset += mb->un.varDmp.word_cnt;
18986 } while (mb->un.varDmp.word_cnt && offset < DMP_RGN23_SIZE);
18987
026abb87
JS
18988 mempool_free(pmb, phba->mbox_mem_pool);
18989 return offset;
18990}
18991
18992/**
18993 * lpfc_sli4_get_config_region23 - Get sli4 port region 23 data.
18994 * @phba: pointer to lpfc hba data structure.
18995 * @rgn23_data: pointer to configure region 23 data.
18996 *
18997 * This function gets SLI4 port configure region 23 data through memory dump
18998 * mailbox command. When it successfully retrieves data, the size of the data
18999 * will be returned, otherwise, 0 will be returned.
19000 **/
19001static uint32_t
19002lpfc_sli4_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
19003{
19004 LPFC_MBOXQ_t *mboxq = NULL;
19005 struct lpfc_dmabuf *mp = NULL;
19006 struct lpfc_mqe *mqe;
19007 uint32_t data_length = 0;
19008 int rc;
19009
19010 if (!rgn23_data)
19011 return 0;
19012
19013 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19014 if (!mboxq) {
19015 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19016 "3105 failed to allocate mailbox memory\n");
19017 return 0;
19018 }
19019
19020 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq))
19021 goto out;
19022 mqe = &mboxq->u.mqe;
19023 mp = (struct lpfc_dmabuf *) mboxq->context1;
19024 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
19025 if (rc)
19026 goto out;
19027 data_length = mqe->un.mb_words[5];
19028 if (data_length == 0)
19029 goto out;
19030 if (data_length > DMP_RGN23_SIZE) {
19031 data_length = 0;
19032 goto out;
19033 }
19034 lpfc_sli_pcimem_bcopy((char *)mp->virt, rgn23_data, data_length);
19035out:
19036 mempool_free(mboxq, phba->mbox_mem_pool);
19037 if (mp) {
19038 lpfc_mbuf_free(phba, mp->virt, mp->phys);
19039 kfree(mp);
19040 }
19041 return data_length;
19042}
19043
19044/**
19045 * lpfc_sli_read_link_ste - Read region 23 to decide if link is disabled.
19046 * @phba: pointer to lpfc hba data structure.
19047 *
19048 * This function read region 23 and parse TLV for port status to
19049 * decide if the user disaled the port. If the TLV indicates the
19050 * port is disabled, the hba_flag is set accordingly.
19051 **/
19052void
19053lpfc_sli_read_link_ste(struct lpfc_hba *phba)
19054{
19055 uint8_t *rgn23_data = NULL;
19056 uint32_t if_type, data_size, sub_tlv_len, tlv_offset;
19057 uint32_t offset = 0;
19058
19059 /* Get adapter Region 23 data */
19060 rgn23_data = kzalloc(DMP_RGN23_SIZE, GFP_KERNEL);
19061 if (!rgn23_data)
19062 goto out;
19063
19064 if (phba->sli_rev < LPFC_SLI_REV4)
19065 data_size = lpfc_sli_get_config_region23(phba, rgn23_data);
19066 else {
19067 if_type = bf_get(lpfc_sli_intf_if_type,
19068 &phba->sli4_hba.sli_intf);
19069 if (if_type == LPFC_SLI_INTF_IF_TYPE_0)
19070 goto out;
19071 data_size = lpfc_sli4_get_config_region23(phba, rgn23_data);
19072 }
a0c87cbd
JS
19073
19074 if (!data_size)
19075 goto out;
19076
19077 /* Check the region signature first */
19078 if (memcmp(&rgn23_data[offset], LPFC_REGION23_SIGNATURE, 4)) {
19079 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19080 "2619 Config region 23 has bad signature\n");
19081 goto out;
19082 }
19083 offset += 4;
19084
19085 /* Check the data structure version */
19086 if (rgn23_data[offset] != LPFC_REGION23_VERSION) {
19087 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19088 "2620 Config region 23 has bad version\n");
19089 goto out;
19090 }
19091 offset += 4;
19092
19093 /* Parse TLV entries in the region */
19094 while (offset < data_size) {
19095 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC)
19096 break;
19097 /*
19098 * If the TLV is not driver specific TLV or driver id is
19099 * not linux driver id, skip the record.
19100 */
19101 if ((rgn23_data[offset] != DRIVER_SPECIFIC_TYPE) ||
19102 (rgn23_data[offset + 2] != LINUX_DRIVER_ID) ||
19103 (rgn23_data[offset + 3] != 0)) {
19104 offset += rgn23_data[offset + 1] * 4 + 4;
19105 continue;
19106 }
19107
19108 /* Driver found a driver specific TLV in the config region */
19109 sub_tlv_len = rgn23_data[offset + 1] * 4;
19110 offset += 4;
19111 tlv_offset = 0;
19112
19113 /*
19114 * Search for configured port state sub-TLV.
19115 */
19116 while ((offset < data_size) &&
19117 (tlv_offset < sub_tlv_len)) {
19118 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC) {
19119 offset += 4;
19120 tlv_offset += 4;
19121 break;
19122 }
19123 if (rgn23_data[offset] != PORT_STE_TYPE) {
19124 offset += rgn23_data[offset + 1] * 4 + 4;
19125 tlv_offset += rgn23_data[offset + 1] * 4 + 4;
19126 continue;
19127 }
19128
19129 /* This HBA contains PORT_STE configured */
19130 if (!rgn23_data[offset + 2])
19131 phba->hba_flag |= LINK_DISABLED;
19132
19133 goto out;
19134 }
19135 }
026abb87 19136
a0c87cbd 19137out:
a0c87cbd
JS
19138 kfree(rgn23_data);
19139 return;
19140}
695a814e 19141
52d52440
JS
19142/**
19143 * lpfc_wr_object - write an object to the firmware
19144 * @phba: HBA structure that indicates port to create a queue on.
19145 * @dmabuf_list: list of dmabufs to write to the port.
19146 * @size: the total byte value of the objects to write to the port.
19147 * @offset: the current offset to be used to start the transfer.
19148 *
19149 * This routine will create a wr_object mailbox command to send to the port.
19150 * the mailbox command will be constructed using the dma buffers described in
19151 * @dmabuf_list to create a list of BDEs. This routine will fill in as many
19152 * BDEs that the imbedded mailbox can support. The @offset variable will be
19153 * used to indicate the starting offset of the transfer and will also return
19154 * the offset after the write object mailbox has completed. @size is used to
19155 * determine the end of the object and whether the eof bit should be set.
19156 *
19157 * Return 0 is successful and offset will contain the the new offset to use
19158 * for the next write.
19159 * Return negative value for error cases.
19160 **/
19161int
19162lpfc_wr_object(struct lpfc_hba *phba, struct list_head *dmabuf_list,
19163 uint32_t size, uint32_t *offset)
19164{
19165 struct lpfc_mbx_wr_object *wr_object;
19166 LPFC_MBOXQ_t *mbox;
19167 int rc = 0, i = 0;
19168 uint32_t shdr_status, shdr_add_status;
19169 uint32_t mbox_tmo;
19170 union lpfc_sli4_cfg_shdr *shdr;
19171 struct lpfc_dmabuf *dmabuf;
19172 uint32_t written = 0;
19173
19174 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19175 if (!mbox)
19176 return -ENOMEM;
19177
19178 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
19179 LPFC_MBOX_OPCODE_WRITE_OBJECT,
19180 sizeof(struct lpfc_mbx_wr_object) -
19181 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
19182
19183 wr_object = (struct lpfc_mbx_wr_object *)&mbox->u.mqe.un.wr_object;
19184 wr_object->u.request.write_offset = *offset;
19185 sprintf((uint8_t *)wr_object->u.request.object_name, "/");
19186 wr_object->u.request.object_name[0] =
19187 cpu_to_le32(wr_object->u.request.object_name[0]);
19188 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 0);
19189 list_for_each_entry(dmabuf, dmabuf_list, list) {
19190 if (i >= LPFC_MBX_WR_CONFIG_MAX_BDE || written >= size)
19191 break;
19192 wr_object->u.request.bde[i].addrLow = putPaddrLow(dmabuf->phys);
19193 wr_object->u.request.bde[i].addrHigh =
19194 putPaddrHigh(dmabuf->phys);
19195 if (written + SLI4_PAGE_SIZE >= size) {
19196 wr_object->u.request.bde[i].tus.f.bdeSize =
19197 (size - written);
19198 written += (size - written);
19199 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 1);
19200 } else {
19201 wr_object->u.request.bde[i].tus.f.bdeSize =
19202 SLI4_PAGE_SIZE;
19203 written += SLI4_PAGE_SIZE;
19204 }
19205 i++;
19206 }
19207 wr_object->u.request.bde_count = i;
19208 bf_set(lpfc_wr_object_write_length, &wr_object->u.request, written);
19209 if (!phba->sli4_hba.intr_enable)
19210 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
19211 else {
a183a15f 19212 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
52d52440
JS
19213 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
19214 }
19215 /* The IOCTL status is embedded in the mailbox subheader. */
19216 shdr = (union lpfc_sli4_cfg_shdr *) &wr_object->header.cfg_shdr;
19217 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
19218 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
19219 if (rc != MBX_TIMEOUT)
19220 mempool_free(mbox, phba->mbox_mem_pool);
19221 if (shdr_status || shdr_add_status || rc) {
19222 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19223 "3025 Write Object mailbox failed with "
19224 "status x%x add_status x%x, mbx status x%x\n",
19225 shdr_status, shdr_add_status, rc);
19226 rc = -ENXIO;
1feb8204 19227 *offset = shdr_add_status;
52d52440
JS
19228 } else
19229 *offset += wr_object->u.response.actual_write_length;
19230 return rc;
19231}
19232
695a814e
JS
19233/**
19234 * lpfc_cleanup_pending_mbox - Free up vport discovery mailbox commands.
19235 * @vport: pointer to vport data structure.
19236 *
19237 * This function iterate through the mailboxq and clean up all REG_LOGIN
19238 * and REG_VPI mailbox commands associated with the vport. This function
19239 * is called when driver want to restart discovery of the vport due to
19240 * a Clear Virtual Link event.
19241 **/
19242void
19243lpfc_cleanup_pending_mbox(struct lpfc_vport *vport)
19244{
19245 struct lpfc_hba *phba = vport->phba;
19246 LPFC_MBOXQ_t *mb, *nextmb;
19247 struct lpfc_dmabuf *mp;
78730cfe 19248 struct lpfc_nodelist *ndlp;
d439d286 19249 struct lpfc_nodelist *act_mbx_ndlp = NULL;
589a52d6 19250 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
d439d286 19251 LIST_HEAD(mbox_cmd_list);
63e801ce 19252 uint8_t restart_loop;
695a814e 19253
d439d286 19254 /* Clean up internally queued mailbox commands with the vport */
695a814e
JS
19255 spin_lock_irq(&phba->hbalock);
19256 list_for_each_entry_safe(mb, nextmb, &phba->sli.mboxq, list) {
19257 if (mb->vport != vport)
19258 continue;
19259
19260 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19261 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19262 continue;
19263
d439d286
JS
19264 list_del(&mb->list);
19265 list_add_tail(&mb->list, &mbox_cmd_list);
19266 }
19267 /* Clean up active mailbox command with the vport */
19268 mb = phba->sli.mbox_active;
19269 if (mb && (mb->vport == vport)) {
19270 if ((mb->u.mb.mbxCommand == MBX_REG_LOGIN64) ||
19271 (mb->u.mb.mbxCommand == MBX_REG_VPI))
19272 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19273 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
19274 act_mbx_ndlp = (struct lpfc_nodelist *)mb->context2;
19275 /* Put reference count for delayed processing */
19276 act_mbx_ndlp = lpfc_nlp_get(act_mbx_ndlp);
19277 /* Unregister the RPI when mailbox complete */
19278 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19279 }
19280 }
63e801ce
JS
19281 /* Cleanup any mailbox completions which are not yet processed */
19282 do {
19283 restart_loop = 0;
19284 list_for_each_entry(mb, &phba->sli.mboxq_cmpl, list) {
19285 /*
19286 * If this mailox is already processed or it is
19287 * for another vport ignore it.
19288 */
19289 if ((mb->vport != vport) ||
19290 (mb->mbox_flag & LPFC_MBX_IMED_UNREG))
19291 continue;
19292
19293 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19294 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19295 continue;
19296
19297 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19298 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
19299 ndlp = (struct lpfc_nodelist *)mb->context2;
19300 /* Unregister the RPI when mailbox complete */
19301 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19302 restart_loop = 1;
19303 spin_unlock_irq(&phba->hbalock);
19304 spin_lock(shost->host_lock);
19305 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19306 spin_unlock(shost->host_lock);
19307 spin_lock_irq(&phba->hbalock);
19308 break;
19309 }
19310 }
19311 } while (restart_loop);
19312
d439d286
JS
19313 spin_unlock_irq(&phba->hbalock);
19314
19315 /* Release the cleaned-up mailbox commands */
19316 while (!list_empty(&mbox_cmd_list)) {
19317 list_remove_head(&mbox_cmd_list, mb, LPFC_MBOXQ_t, list);
695a814e
JS
19318 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
19319 mp = (struct lpfc_dmabuf *) (mb->context1);
19320 if (mp) {
19321 __lpfc_mbuf_free(phba, mp->virt, mp->phys);
19322 kfree(mp);
19323 }
78730cfe 19324 ndlp = (struct lpfc_nodelist *) mb->context2;
d439d286 19325 mb->context2 = NULL;
78730cfe 19326 if (ndlp) {
ec21b3b0 19327 spin_lock(shost->host_lock);
589a52d6 19328 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
ec21b3b0 19329 spin_unlock(shost->host_lock);
78730cfe 19330 lpfc_nlp_put(ndlp);
78730cfe 19331 }
695a814e 19332 }
695a814e
JS
19333 mempool_free(mb, phba->mbox_mem_pool);
19334 }
d439d286
JS
19335
19336 /* Release the ndlp with the cleaned-up active mailbox command */
19337 if (act_mbx_ndlp) {
19338 spin_lock(shost->host_lock);
19339 act_mbx_ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19340 spin_unlock(shost->host_lock);
19341 lpfc_nlp_put(act_mbx_ndlp);
695a814e 19342 }
695a814e
JS
19343}
19344
2a9bf3d0
JS
19345/**
19346 * lpfc_drain_txq - Drain the txq
19347 * @phba: Pointer to HBA context object.
19348 *
19349 * This function attempt to submit IOCBs on the txq
19350 * to the adapter. For SLI4 adapters, the txq contains
19351 * ELS IOCBs that have been deferred because the there
19352 * are no SGLs. This congestion can occur with large
19353 * vport counts during node discovery.
19354 **/
19355
19356uint32_t
19357lpfc_drain_txq(struct lpfc_hba *phba)
19358{
19359 LIST_HEAD(completions);
895427bd 19360 struct lpfc_sli_ring *pring;
2e706377 19361 struct lpfc_iocbq *piocbq = NULL;
2a9bf3d0
JS
19362 unsigned long iflags = 0;
19363 char *fail_msg = NULL;
19364 struct lpfc_sglq *sglq;
205e8240 19365 union lpfc_wqe128 wqe;
a2fc4aef 19366 uint32_t txq_cnt = 0;
dc19e3b4 19367 struct lpfc_queue *wq;
2a9bf3d0 19368
dc19e3b4
JS
19369 if (phba->link_flag & LS_MDS_LOOPBACK) {
19370 /* MDS WQE are posted only to first WQ*/
19371 wq = phba->sli4_hba.fcp_wq[0];
19372 if (unlikely(!wq))
19373 return 0;
19374 pring = wq->pring;
19375 } else {
19376 wq = phba->sli4_hba.els_wq;
19377 if (unlikely(!wq))
19378 return 0;
19379 pring = lpfc_phba_elsring(phba);
19380 }
19381
19382 if (unlikely(!pring) || list_empty(&pring->txq))
1234a6d5 19383 return 0;
895427bd 19384
398d81c9 19385 spin_lock_irqsave(&pring->ring_lock, iflags);
0e9bb8d7
JS
19386 list_for_each_entry(piocbq, &pring->txq, list) {
19387 txq_cnt++;
19388 }
19389
19390 if (txq_cnt > pring->txq_max)
19391 pring->txq_max = txq_cnt;
2a9bf3d0 19392
398d81c9 19393 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19394
0e9bb8d7 19395 while (!list_empty(&pring->txq)) {
398d81c9 19396 spin_lock_irqsave(&pring->ring_lock, iflags);
2a9bf3d0 19397
19ca7609 19398 piocbq = lpfc_sli_ringtx_get(phba, pring);
a629852a 19399 if (!piocbq) {
398d81c9 19400 spin_unlock_irqrestore(&pring->ring_lock, iflags);
a629852a
JS
19401 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19402 "2823 txq empty and txq_cnt is %d\n ",
0e9bb8d7 19403 txq_cnt);
a629852a
JS
19404 break;
19405 }
895427bd 19406 sglq = __lpfc_sli_get_els_sglq(phba, piocbq);
2a9bf3d0 19407 if (!sglq) {
19ca7609 19408 __lpfc_sli_ringtx_put(phba, pring, piocbq);
398d81c9 19409 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19410 break;
2a9bf3d0 19411 }
0e9bb8d7 19412 txq_cnt--;
2a9bf3d0
JS
19413
19414 /* The xri and iocb resources secured,
19415 * attempt to issue request
19416 */
6d368e53 19417 piocbq->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0
JS
19418 piocbq->sli4_xritag = sglq->sli4_xritag;
19419 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocbq, sglq))
19420 fail_msg = "to convert bpl to sgl";
205e8240 19421 else if (lpfc_sli4_iocb2wqe(phba, piocbq, &wqe))
2a9bf3d0 19422 fail_msg = "to convert iocb to wqe";
dc19e3b4 19423 else if (lpfc_sli4_wq_put(wq, &wqe))
2a9bf3d0
JS
19424 fail_msg = " - Wq is full";
19425 else
19426 lpfc_sli_ringtxcmpl_put(phba, pring, piocbq);
19427
19428 if (fail_msg) {
19429 /* Failed means we can't issue and need to cancel */
19430 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19431 "2822 IOCB failed %s iotag 0x%x "
19432 "xri 0x%x\n",
19433 fail_msg,
19434 piocbq->iotag, piocbq->sli4_xritag);
19435 list_add_tail(&piocbq->list, &completions);
19436 }
398d81c9 19437 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0
JS
19438 }
19439
2a9bf3d0
JS
19440 /* Cancel all the IOCBs that cannot be issued */
19441 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
19442 IOERR_SLI_ABORTED);
19443
0e9bb8d7 19444 return txq_cnt;
2a9bf3d0 19445}
895427bd
JS
19446
19447/**
19448 * lpfc_wqe_bpl2sgl - Convert the bpl/bde to a sgl.
19449 * @phba: Pointer to HBA context object.
19450 * @pwqe: Pointer to command WQE.
19451 * @sglq: Pointer to the scatter gather queue object.
19452 *
19453 * This routine converts the bpl or bde that is in the WQE
19454 * to a sgl list for the sli4 hardware. The physical address
19455 * of the bpl/bde is converted back to a virtual address.
19456 * If the WQE contains a BPL then the list of BDE's is
19457 * converted to sli4_sge's. If the WQE contains a single
19458 * BDE then it is converted to a single sli_sge.
19459 * The WQE is still in cpu endianness so the contents of
19460 * the bpl can be used without byte swapping.
19461 *
19462 * Returns valid XRI = Success, NO_XRI = Failure.
19463 */
19464static uint16_t
19465lpfc_wqe_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *pwqeq,
19466 struct lpfc_sglq *sglq)
19467{
19468 uint16_t xritag = NO_XRI;
19469 struct ulp_bde64 *bpl = NULL;
19470 struct ulp_bde64 bde;
19471 struct sli4_sge *sgl = NULL;
19472 struct lpfc_dmabuf *dmabuf;
205e8240 19473 union lpfc_wqe128 *wqe;
895427bd
JS
19474 int numBdes = 0;
19475 int i = 0;
19476 uint32_t offset = 0; /* accumulated offset in the sg request list */
19477 int inbound = 0; /* number of sg reply entries inbound from firmware */
19478 uint32_t cmd;
19479
19480 if (!pwqeq || !sglq)
19481 return xritag;
19482
19483 sgl = (struct sli4_sge *)sglq->sgl;
19484 wqe = &pwqeq->wqe;
19485 pwqeq->iocb.ulpIoTag = pwqeq->iotag;
19486
19487 cmd = bf_get(wqe_cmnd, &wqe->generic.wqe_com);
19488 if (cmd == CMD_XMIT_BLS_RSP64_WQE)
19489 return sglq->sli4_xritag;
19490 numBdes = pwqeq->rsvd2;
19491 if (numBdes) {
19492 /* The addrHigh and addrLow fields within the WQE
19493 * have not been byteswapped yet so there is no
19494 * need to swap them back.
19495 */
19496 if (pwqeq->context3)
19497 dmabuf = (struct lpfc_dmabuf *)pwqeq->context3;
19498 else
19499 return xritag;
19500
19501 bpl = (struct ulp_bde64 *)dmabuf->virt;
19502 if (!bpl)
19503 return xritag;
19504
19505 for (i = 0; i < numBdes; i++) {
19506 /* Should already be byte swapped. */
19507 sgl->addr_hi = bpl->addrHigh;
19508 sgl->addr_lo = bpl->addrLow;
19509
19510 sgl->word2 = le32_to_cpu(sgl->word2);
19511 if ((i+1) == numBdes)
19512 bf_set(lpfc_sli4_sge_last, sgl, 1);
19513 else
19514 bf_set(lpfc_sli4_sge_last, sgl, 0);
19515 /* swap the size field back to the cpu so we
19516 * can assign it to the sgl.
19517 */
19518 bde.tus.w = le32_to_cpu(bpl->tus.w);
19519 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
19520 /* The offsets in the sgl need to be accumulated
19521 * separately for the request and reply lists.
19522 * The request is always first, the reply follows.
19523 */
19524 switch (cmd) {
19525 case CMD_GEN_REQUEST64_WQE:
19526 /* add up the reply sg entries */
19527 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
19528 inbound++;
19529 /* first inbound? reset the offset */
19530 if (inbound == 1)
19531 offset = 0;
19532 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19533 bf_set(lpfc_sli4_sge_type, sgl,
19534 LPFC_SGE_TYPE_DATA);
19535 offset += bde.tus.f.bdeSize;
19536 break;
19537 case CMD_FCP_TRSP64_WQE:
19538 bf_set(lpfc_sli4_sge_offset, sgl, 0);
19539 bf_set(lpfc_sli4_sge_type, sgl,
19540 LPFC_SGE_TYPE_DATA);
19541 break;
19542 case CMD_FCP_TSEND64_WQE:
19543 case CMD_FCP_TRECEIVE64_WQE:
19544 bf_set(lpfc_sli4_sge_type, sgl,
19545 bpl->tus.f.bdeFlags);
19546 if (i < 3)
19547 offset = 0;
19548 else
19549 offset += bde.tus.f.bdeSize;
19550 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19551 break;
19552 }
19553 sgl->word2 = cpu_to_le32(sgl->word2);
19554 bpl++;
19555 sgl++;
19556 }
19557 } else if (wqe->gen_req.bde.tus.f.bdeFlags == BUFF_TYPE_BDE_64) {
19558 /* The addrHigh and addrLow fields of the BDE have not
19559 * been byteswapped yet so they need to be swapped
19560 * before putting them in the sgl.
19561 */
19562 sgl->addr_hi = cpu_to_le32(wqe->gen_req.bde.addrHigh);
19563 sgl->addr_lo = cpu_to_le32(wqe->gen_req.bde.addrLow);
19564 sgl->word2 = le32_to_cpu(sgl->word2);
19565 bf_set(lpfc_sli4_sge_last, sgl, 1);
19566 sgl->word2 = cpu_to_le32(sgl->word2);
19567 sgl->sge_len = cpu_to_le32(wqe->gen_req.bde.tus.f.bdeSize);
19568 }
19569 return sglq->sli4_xritag;
19570}
19571
19572/**
19573 * lpfc_sli4_issue_wqe - Issue an SLI4 Work Queue Entry (WQE)
19574 * @phba: Pointer to HBA context object.
19575 * @ring_number: Base sli ring number
19576 * @pwqe: Pointer to command WQE.
19577 **/
19578int
19579lpfc_sli4_issue_wqe(struct lpfc_hba *phba, uint32_t ring_number,
19580 struct lpfc_iocbq *pwqe)
19581{
205e8240 19582 union lpfc_wqe128 *wqe = &pwqe->wqe;
f358dd0c 19583 struct lpfc_nvmet_rcv_ctx *ctxp;
895427bd
JS
19584 struct lpfc_queue *wq;
19585 struct lpfc_sglq *sglq;
19586 struct lpfc_sli_ring *pring;
19587 unsigned long iflags;
cd22d605 19588 uint32_t ret = 0;
895427bd
JS
19589
19590 /* NVME_LS and NVME_LS ABTS requests. */
19591 if (pwqe->iocb_flag & LPFC_IO_NVME_LS) {
19592 pring = phba->sli4_hba.nvmels_wq->pring;
19593 spin_lock_irqsave(&pring->ring_lock, iflags);
19594 sglq = __lpfc_sli_get_els_sglq(phba, pwqe);
19595 if (!sglq) {
19596 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19597 return WQE_BUSY;
19598 }
19599 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19600 pwqe->sli4_xritag = sglq->sli4_xritag;
19601 if (lpfc_wqe_bpl2sgl(phba, pwqe, sglq) == NO_XRI) {
19602 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19603 return WQE_ERROR;
19604 }
19605 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19606 pwqe->sli4_xritag);
cd22d605
DK
19607 ret = lpfc_sli4_wq_put(phba->sli4_hba.nvmels_wq, wqe);
19608 if (ret) {
895427bd 19609 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19610 return ret;
895427bd 19611 }
cd22d605 19612
895427bd
JS
19613 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19614 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19615 return 0;
19616 }
19617
19618 /* NVME_FCREQ and NVME_ABTS requests */
19619 if (pwqe->iocb_flag & LPFC_IO_NVME) {
19620 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
19621 pring = phba->sli4_hba.nvme_wq[pwqe->hba_wqidx]->pring;
19622
19623 spin_lock_irqsave(&pring->ring_lock, iflags);
19624 wq = phba->sli4_hba.nvme_wq[pwqe->hba_wqidx];
19625 bf_set(wqe_cqid, &wqe->generic.wqe_com,
19626 phba->sli4_hba.nvme_cq[pwqe->hba_wqidx]->queue_id);
cd22d605
DK
19627 ret = lpfc_sli4_wq_put(wq, wqe);
19628 if (ret) {
895427bd 19629 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19630 return ret;
895427bd
JS
19631 }
19632 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19633 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19634 return 0;
19635 }
19636
f358dd0c
JS
19637 /* NVMET requests */
19638 if (pwqe->iocb_flag & LPFC_IO_NVMET) {
19639 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
19640 pring = phba->sli4_hba.nvme_wq[pwqe->hba_wqidx]->pring;
19641
19642 spin_lock_irqsave(&pring->ring_lock, iflags);
19643 ctxp = pwqe->context2;
6c621a22 19644 sglq = ctxp->ctxbuf->sglq;
f358dd0c
JS
19645 if (pwqe->sli4_xritag == NO_XRI) {
19646 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19647 pwqe->sli4_xritag = sglq->sli4_xritag;
19648 }
19649 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19650 pwqe->sli4_xritag);
19651 wq = phba->sli4_hba.nvme_wq[pwqe->hba_wqidx];
19652 bf_set(wqe_cqid, &wqe->generic.wqe_com,
19653 phba->sli4_hba.nvme_cq[pwqe->hba_wqidx]->queue_id);
cd22d605
DK
19654 ret = lpfc_sli4_wq_put(wq, wqe);
19655 if (ret) {
f358dd0c 19656 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19657 return ret;
f358dd0c
JS
19658 }
19659 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19660 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19661 return 0;
19662 }
895427bd
JS
19663 return WQE_ERROR;
19664}