]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blame - drivers/scsi/lpfc/lpfc_sli.c
projects / mirror_ubuntu-jammy-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[SCSI] aacraid: improve queue balancing
[mirror_ubuntu-jammy-kernel.git] / drivers / scsi / lpfc / lpfc_sli.c
CommitLineData
dea3101e
JB		 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
9413afff 4 * Copyright (C) 2004-2007 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB		 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e
JB		 20 *******************************************************************/
21
dea3101e
JB		 22#include <linux/blkdev.h>
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26
91886523 27#include <scsi/scsi.h>
dea3101e
JB		 28#include <scsi/scsi_cmnd.h>
29#include <scsi/scsi_device.h>
30#include <scsi/scsi_host.h>
f888ba3c 31#include <scsi/scsi_transport_fc.h>
dea3101e
JB		 32
33#include "lpfc_hw.h"
34#include "lpfc_sli.h"
35#include "lpfc_disc.h"
36#include "lpfc_scsi.h"
37#include "lpfc.h"
38#include "lpfc_crtn.h"
39#include "lpfc_logmsg.h"
40#include "lpfc_compat.h"
858c9f6c 41#include "lpfc_debugfs.h"
dea3101e
JB		 42
43/*
44 * Define macro to log: Mailbox command x%x cannot issue Data
45 * This allows multiple uses of lpfc_msgBlk0311
46 * w/o perturbing log msg utility.
47 */
92d7f7b0 48#define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
dea3101e
JB		 49 lpfc_printf_log(phba, \
50 KERN_INFO, \
51 LOG_MBOX | LOG_SLI, \
e8b62011 52 "(%d):0311 Mailbox command x%x cannot " \
92d7f7b0 53 "issue Data: x%x x%x x%x\n", \
92d7f7b0
JS		 54 pmbox->vport ? pmbox->vport->vpi : 0, \
55 pmbox->mb.mbxCommand, \
2e0fef85 56 phba->pport->port_state, \
dea3101e 57 psli->sli_flag, \
2e0fef85 58 flag)
dea3101e
JB		 59
60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
92d7f7b0
JS		 69 /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
70 * to the start of the ring, and the slot number of the
71 * desired iocb entry, calc a pointer to that entry.
72 */
ed957684
JS		 73static inline IOCB_t *
74lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
75{
76 return (IOCB_t *) (((char *) pring->cmdringaddr) +
77 pring->cmdidx * phba->iocb_cmd_size);
78}
79
80static inline IOCB_t *
81lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
82{
83 return (IOCB_t *) (((char *) pring->rspringaddr) +
84 pring->rspidx * phba->iocb_rsp_size);
85}
86
2e0fef85
JS		 87static struct lpfc_iocbq *
88__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC		 89{
90 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
91 struct lpfc_iocbq * iocbq = NULL;
92
93 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
94 return iocbq;
95}
96
2e0fef85
JS		 97struct lpfc_iocbq *
98lpfc_sli_get_iocbq(struct lpfc_hba *phba)
99{
100 struct lpfc_iocbq * iocbq = NULL;
101 unsigned long iflags;
102
103 spin_lock_irqsave(&phba->hbalock, iflags);
104 iocbq = __lpfc_sli_get_iocbq(phba);
105 spin_unlock_irqrestore(&phba->hbalock, iflags);
106 return iocbq;
107}
108
a6ababd2 109static void
2e0fef85 110__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 111{
2e0fef85 112 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30
JB		 113
114 /*
115 * Clean all volatile data fields, preserve iotag and node struct.
116 */
117 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
118 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
119}
120
2e0fef85
JS		 121void
122lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
123{
124 unsigned long iflags;
125
126 /*
127 * Clean all volatile data fields, preserve iotag and node struct.
128 */
129 spin_lock_irqsave(&phba->hbalock, iflags);
130 __lpfc_sli_release_iocbq(phba, iocbq);
131 spin_unlock_irqrestore(&phba->hbalock, iflags);
132}
133
dea3101e
JB		 134/*
135 * Translate the iocb command to an iocb command type used to decide the final
136 * disposition of each completed IOCB.
137 */
138static lpfc_iocb_type
139lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
140{
141 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
142
143 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
144 return 0;
145
146 switch (iocb_cmnd) {
147 case CMD_XMIT_SEQUENCE_CR:
148 case CMD_XMIT_SEQUENCE_CX:
149 case CMD_XMIT_BCAST_CN:
150 case CMD_XMIT_BCAST_CX:
151 case CMD_ELS_REQUEST_CR:
152 case CMD_ELS_REQUEST_CX:
153 case CMD_CREATE_XRI_CR:
154 case CMD_CREATE_XRI_CX:
155 case CMD_GET_RPI_CN:
156 case CMD_XMIT_ELS_RSP_CX:
157 case CMD_GET_RPI_CR:
158 case CMD_FCP_IWRITE_CR:
159 case CMD_FCP_IWRITE_CX:
160 case CMD_FCP_IREAD_CR:
161 case CMD_FCP_IREAD_CX:
162 case CMD_FCP_ICMND_CR:
163 case CMD_FCP_ICMND_CX:
f5603511
JS		 164 case CMD_FCP_TSEND_CX:
165 case CMD_FCP_TRSP_CX:
166 case CMD_FCP_TRECEIVE_CX:
167 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB		 168 case CMD_ADAPTER_MSG:
169 case CMD_ADAPTER_DUMP:
170 case CMD_XMIT_SEQUENCE64_CR:
171 case CMD_XMIT_SEQUENCE64_CX:
172 case CMD_XMIT_BCAST64_CN:
173 case CMD_XMIT_BCAST64_CX:
174 case CMD_ELS_REQUEST64_CR:
175 case CMD_ELS_REQUEST64_CX:
176 case CMD_FCP_IWRITE64_CR:
177 case CMD_FCP_IWRITE64_CX:
178 case CMD_FCP_IREAD64_CR:
179 case CMD_FCP_IREAD64_CX:
180 case CMD_FCP_ICMND64_CR:
181 case CMD_FCP_ICMND64_CX:
f5603511
JS		 182 case CMD_FCP_TSEND64_CX:
183 case CMD_FCP_TRSP64_CX:
184 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB		 185 case CMD_GEN_REQUEST64_CR:
186 case CMD_GEN_REQUEST64_CX:
187 case CMD_XMIT_ELS_RSP64_CX:
188 type = LPFC_SOL_IOCB;
189 break;
190 case CMD_ABORT_XRI_CN:
191 case CMD_ABORT_XRI_CX:
192 case CMD_CLOSE_XRI_CN:
193 case CMD_CLOSE_XRI_CX:
194 case CMD_XRI_ABORTED_CX:
195 case CMD_ABORT_MXRI64_CN:
196 type = LPFC_ABORT_IOCB;
197 break;
198 case CMD_RCV_SEQUENCE_CX:
199 case CMD_RCV_ELS_REQ_CX:
200 case CMD_RCV_SEQUENCE64_CX:
201 case CMD_RCV_ELS_REQ64_CX:
57127f15 202 case CMD_ASYNC_STATUS:
ed957684
JS		 203 case CMD_IOCB_RCV_SEQ64_CX:
204 case CMD_IOCB_RCV_ELS64_CX:
205 case CMD_IOCB_RCV_CONT64_CX:
dea3101e
JB		 206 type = LPFC_UNSOL_IOCB;
207 break;
208 default:
209 type = LPFC_UNKNOWN_IOCB;
210 break;
211 }
212
213 return type;
214}
215
216static int
ed957684 217lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB		 218{
219 struct lpfc_sli *psli = &phba->sli;
ed957684
JS		 220 LPFC_MBOXQ_t *pmb;
221 MAILBOX_t *pmbox;
222 int i, rc, ret = 0;
dea3101e 223
ed957684
JS		 224 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
225 if (!pmb)
226 return -ENOMEM;
227 pmbox = &pmb->mb;
228 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 229 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB		 230 lpfc_config_ring(phba, i, pmb);
231 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
232 if (rc != MBX_SUCCESS) {
92d7f7b0 233 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 234 "0446 Adapter failed to init (%d), "
dea3101e
JB		 235 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
236 "ring %d\n",
e8b62011
JS		 237 rc, pmbox->mbxCommand,
238 pmbox->mbxStatus, i);
2e0fef85 239 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS		 240 ret = -ENXIO;
241 break;
dea3101e
JB		 242 }
243 }
ed957684
JS		 244 mempool_free(pmb, phba->mbox_mem_pool);
245 return ret;
dea3101e
JB		 246}
247
248static int
2e0fef85
JS		 249lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
250 struct lpfc_iocbq *piocb)
dea3101e 251{
dea3101e
JB		 252 list_add_tail(&piocb->list, &pring->txcmplq);
253 pring->txcmplq_cnt++;
92d7f7b0
JS		 254 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
255 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
256 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
257 if (!piocb->vport)
258 BUG();
259 else
260 mod_timer(&piocb->vport->els_tmofunc,
261 jiffies + HZ * (phba->fc_ratov << 1));
262 }
263
dea3101e 264
2e0fef85 265 return 0;
dea3101e
JB		 266}
267
268static struct lpfc_iocbq *
2e0fef85 269lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 270{
dea3101e
JB		 271 struct lpfc_iocbq *cmd_iocb;
272
858c9f6c
JS		 273 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
274 if (cmd_iocb != NULL)
dea3101e 275 pring->txq_cnt--;
2e0fef85 276 return cmd_iocb;
dea3101e
JB		 277}
278
279static IOCB_t *
280lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
281{
ed957684
JS		 282 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
283 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
284 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 285 uint32_t max_cmd_idx = pring->numCiocb;
dea3101e
JB		 286
287 if ((pring->next_cmdidx == pring->cmdidx) &&
288 (++pring->next_cmdidx >= max_cmd_idx))
289 pring->next_cmdidx = 0;
290
291 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
292
293 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
294
295 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
296 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 297 "0315 Ring %d issue: portCmdGet %d "
dea3101e 298 "is bigger then cmd ring %d\n",
e8b62011 299 pring->ringno,
dea3101e
JB		 300 pring->local_getidx, max_cmd_idx);
301
2e0fef85 302 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 303 /*
304 * All error attention handlers are posted to
305 * worker thread
306 */
307 phba->work_ha |= HA_ERATT;
308 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 309
310 /* hbalock should already be held */
dea3101e 311 if (phba->work_wait)
92d7f7b0 312 lpfc_worker_wake_up(phba);
dea3101e
JB		 313
314 return NULL;
315 }
316
317 if (pring->local_getidx == pring->next_cmdidx)
318 return NULL;
319 }
320
ed957684 321 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB		 322}
323
604a3e30 324uint16_t
2e0fef85 325lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 326{
2e0fef85
JS		 327 struct lpfc_iocbq **new_arr;
328 struct lpfc_iocbq **old_arr;
604a3e30
JB		 329 size_t new_len;
330 struct lpfc_sli *psli = &phba->sli;
331 uint16_t iotag;
dea3101e 332
2e0fef85 333 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 334 iotag = psli->last_iotag;
335 if(++iotag < psli->iocbq_lookup_len) {
336 psli->last_iotag = iotag;
337 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 338 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 339 iocbq->iotag = iotag;
340 return iotag;
2e0fef85 341 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB		 342 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
343 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85
JS		 344 spin_unlock_irq(&phba->hbalock);
345 new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
604a3e30
JB		 346 GFP_KERNEL);
347 if (new_arr) {
2e0fef85 348 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 349 old_arr = psli->iocbq_lookup;
350 if (new_len <= psli->iocbq_lookup_len) {
351 /* highly unprobable case */
352 kfree(new_arr);
353 iotag = psli->last_iotag;
354 if(++iotag < psli->iocbq_lookup_len) {
355 psli->last_iotag = iotag;
356 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 357 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 358 iocbq->iotag = iotag;
359 return iotag;
360 }
2e0fef85 361 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 362 return 0;
363 }
364 if (psli->iocbq_lookup)
365 memcpy(new_arr, old_arr,
366 ((psli->last_iotag + 1) *
311464ec 367 sizeof (struct lpfc_iocbq *)));
604a3e30
JB		 368 psli->iocbq_lookup = new_arr;
369 psli->iocbq_lookup_len = new_len;
370 psli->last_iotag = iotag;
371 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 372 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 373 iocbq->iotag = iotag;
374 kfree(old_arr);
375 return iotag;
376 }
8f6d98d2 377 } else
2e0fef85 378 spin_unlock_irq(&phba->hbalock);
dea3101e 379
604a3e30 380 lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
e8b62011
JS		 381 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
382 psli->last_iotag);
dea3101e 383
604a3e30 384 return 0;
dea3101e
JB		 385}
386
387static void
388lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
389 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
390{
391 /*
604a3e30 392 * Set up an iotag
dea3101e 393 */
604a3e30 394 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 395
a58cbd52
JS		 396 if (pring->ringno == LPFC_ELS_RING) {
397 lpfc_debugfs_slow_ring_trc(phba,
398 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
399 *(((uint32_t *) &nextiocb->iocb) + 4),
400 *(((uint32_t *) &nextiocb->iocb) + 6),
401 *(((uint32_t *) &nextiocb->iocb) + 7));
402 }
403
dea3101e
JB		 404 /*
405 * Issue iocb command to adapter
406 */
92d7f7b0 407 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB		 408 wmb();
409 pring->stats.iocb_cmd++;
410
411 /*
412 * If there is no completion routine to call, we can release the
413 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
414 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
415 */
416 if (nextiocb->iocb_cmpl)
417 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 418 else
2e0fef85 419 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB		 420
421 /*
422 * Let the HBA know what IOCB slot will be the next one the
423 * driver will put a command into.
424 */
425 pring->cmdidx = pring->next_cmdidx;
ed957684 426 writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB		 427}
428
429static void
2e0fef85 430lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 431{
432 int ringno = pring->ringno;
433
434 pring->flag |= LPFC_CALL_RING_AVAILABLE;
435
436 wmb();
437
438 /*
439 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
440 * The HBA will tell us when an IOCB entry is available.
441 */
442 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
443 readl(phba->CAregaddr); /* flush */
444
445 pring->stats.iocb_cmd_full++;
446}
447
448static void
2e0fef85 449lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 450{
451 int ringno = pring->ringno;
452
453 /*
454 * Tell the HBA that there is work to do in this ring.
455 */
456 wmb();
457 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
458 readl(phba->CAregaddr); /* flush */
459}
460
461static void
2e0fef85 462lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB		 463{
464 IOCB_t *iocb;
465 struct lpfc_iocbq *nextiocb;
466
467 /*
468 * Check to see if:
469 * (a) there is anything on the txq to send
470 * (b) link is up
471 * (c) link attention events can be processed (fcp ring only)
472 * (d) IOCB processing is not blocked by the outstanding mbox command.
473 */
474 if (pring->txq_cnt &&
2e0fef85 475 lpfc_is_link_up(phba) &&
dea3101e 476 (pring->ringno != phba->sli.fcp_ring ||
0b727fea 477 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e
JB		 478
479 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
480 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
481 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
482
483 if (iocb)
484 lpfc_sli_update_ring(phba, pring);
485 else
486 lpfc_sli_update_full_ring(phba, pring);
487 }
488
489 return;
490}
491
a6ababd2 492static struct lpfc_hbq_entry *
ed957684
JS		 493lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
494{
495 struct hbq_s *hbqp = &phba->hbqs[hbqno];
496
497 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
498 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
499 hbqp->next_hbqPutIdx = 0;
500
501 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 502 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS		 503 uint32_t getidx = le32_to_cpu(raw_index);
504
505 hbqp->local_hbqGetIdx = getidx;
506
507 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
508 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 509 LOG_SLI | LOG_VPORT,
e8b62011 510 "1802 HBQ %d: local_hbqGetIdx "
ed957684 511 "%u is > than hbqp->entry_count %u\n",
e8b62011 512 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS		 513 hbqp->entry_count);
514
515 phba->link_state = LPFC_HBA_ERROR;
516 return NULL;
517 }
518
519 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
520 return NULL;
521 }
522
51ef4c26
JS		 523 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
524 hbqp->hbqPutIdx;
ed957684
JS		 525}
526
527void
528lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
529{
92d7f7b0
JS		 530 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
531 struct hbq_dmabuf *hbq_buf;
51ef4c26 532 int i, hbq_count;
ed957684 533
51ef4c26 534 hbq_count = lpfc_sli_hbq_count();
ed957684 535 /* Return all memory used by all HBQs */
51ef4c26
JS		 536 for (i = 0; i < hbq_count; ++i) {
537 list_for_each_entry_safe(dmabuf, next_dmabuf,
538 &phba->hbqs[i].hbq_buffer_list, list) {
539 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
540 list_del(&hbq_buf->dbuf.list);
541 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
542 }
a8adb832 543 phba->hbqs[i].buffer_count = 0;
ed957684 544 }
ed957684
JS		 545}
546
51ef4c26 547static struct lpfc_hbq_entry *
ed957684 548lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 549 struct hbq_dmabuf *hbq_buf)
ed957684
JS		 550{
551 struct lpfc_hbq_entry *hbqe;
92d7f7b0 552 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684
JS		 553
554 /* Get next HBQ entry slot to use */
555 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
556 if (hbqe) {
557 struct hbq_s *hbqp = &phba->hbqs[hbqno];
558
92d7f7b0
JS		 559 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
560 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
51ef4c26 561 hbqe->bde.tus.f.bdeSize = hbq_buf->size;
ed957684 562 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS		 563 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
564 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
565 /* Sync SLIM */
ed957684
JS		 566 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
567 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 568 /* flush */
ed957684 569 readl(phba->hbq_put + hbqno);
51ef4c26 570 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
ed957684 571 }
51ef4c26 572 return hbqe;
ed957684
JS		 573}
574
92d7f7b0
JS		 575static struct lpfc_hbq_init lpfc_els_hbq = {
576 .rn = 1,
577 .entry_count = 200,
578 .mask_count = 0,
579 .profile = 0,
51ef4c26 580 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0
JS		 581 .buffer_count = 0,
582 .init_count = 20,
583 .add_count = 5,
584};
ed957684 585
51ef4c26
JS		 586static struct lpfc_hbq_init lpfc_extra_hbq = {
587 .rn = 1,
588 .entry_count = 200,
589 .mask_count = 0,
590 .profile = 0,
591 .ring_mask = (1 << LPFC_EXTRA_RING),
592 .buffer_count = 0,
593 .init_count = 0,
594 .add_count = 5,
595};
596
78b2d852 597struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0 598 &lpfc_els_hbq,
51ef4c26 599 &lpfc_extra_hbq,
92d7f7b0 600};
ed957684 601
311464ec 602static int
92d7f7b0 603lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 604{
92d7f7b0
JS		 605 uint32_t i, start, end;
606 struct hbq_dmabuf *hbq_buffer;
ed957684 607
51ef4c26
JS		 608 if (!phba->hbqs[hbqno].hbq_alloc_buffer) {
609 return 0;
610 }
611
a8adb832
JS		 612 start = phba->hbqs[hbqno].buffer_count;
613 end = count + start;
92d7f7b0
JS		 614 if (end > lpfc_hbq_defs[hbqno]->entry_count) {
615 end = lpfc_hbq_defs[hbqno]->entry_count;
616 }
ed957684
JS		 617
618 /* Populate HBQ entries */
92d7f7b0 619 for (i = start; i < end; i++) {
51ef4c26 620 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
92d7f7b0
JS		 621 if (!hbq_buffer)
622 return 1;
92d7f7b0 623 hbq_buffer->tag = (i | (hbqno << 16));
51ef4c26 624 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
a8adb832 625 phba->hbqs[hbqno].buffer_count++;
51ef4c26
JS		 626 else
627 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS		 628 }
629 return 0;
630}
631
92d7f7b0
JS		 632int
633lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 634{
92d7f7b0
JS		 635 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
636 lpfc_hbq_defs[qno]->add_count));
637}
ed957684 638
a6ababd2 639static int
92d7f7b0
JS		 640lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
641{
642 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
643 lpfc_hbq_defs[qno]->init_count));
ed957684
JS		 644}
645
a6ababd2 646static struct hbq_dmabuf *
92d7f7b0 647lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 648{
92d7f7b0
JS		 649 struct lpfc_dmabuf *d_buf;
650 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS		 651 uint32_t hbqno;
652
653 hbqno = tag >> 16;
a0a74e45 654 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 655 return NULL;
ed957684 656
51ef4c26 657 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 658 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 659 if (hbq_buf->tag == tag) {
92d7f7b0 660 return hbq_buf;
ed957684
JS		 661 }
662 }
92d7f7b0 663 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 664 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 665 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 666 return NULL;
ed957684
JS		 667}
668
669void
51ef4c26 670lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS		 671{
672 uint32_t hbqno;
673
51ef4c26
JS		 674 if (hbq_buffer) {
675 hbqno = hbq_buffer->tag >> 16;
676 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
677 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
678 }
ed957684
JS		 679 }
680}
681
dea3101e
JB		 682static int
683lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
684{
685 uint8_t ret;
686
687 switch (mbxCommand) {
688 case MBX_LOAD_SM:
689 case MBX_READ_NV:
690 case MBX_WRITE_NV:
a8adb832 691 case MBX_WRITE_VPARMS:
dea3101e
JB		 692 case MBX_RUN_BIU_DIAG:
693 case MBX_INIT_LINK:
694 case MBX_DOWN_LINK:
695 case MBX_CONFIG_LINK:
696 case MBX_CONFIG_RING:
697 case MBX_RESET_RING:
698 case MBX_READ_CONFIG:
699 case MBX_READ_RCONFIG:
700 case MBX_READ_SPARM:
701 case MBX_READ_STATUS:
702 case MBX_READ_RPI:
703 case MBX_READ_XRI:
704 case MBX_READ_REV:
705 case MBX_READ_LNK_STAT:
706 case MBX_REG_LOGIN:
707 case MBX_UNREG_LOGIN:
708 case MBX_READ_LA:
709 case MBX_CLEAR_LA:
710 case MBX_DUMP_MEMORY:
711 case MBX_DUMP_CONTEXT:
712 case MBX_RUN_DIAGS:
713 case MBX_RESTART:
714 case MBX_UPDATE_CFG:
715 case MBX_DOWN_LOAD:
716 case MBX_DEL_LD_ENTRY:
717 case MBX_RUN_PROGRAM:
718 case MBX_SET_MASK:
719 case MBX_SET_SLIM:
720 case MBX_UNREG_D_ID:
41415862 721 case MBX_KILL_BOARD:
dea3101e 722 case MBX_CONFIG_FARP:
41415862 723 case MBX_BEACON:
dea3101e
JB		 724 case MBX_LOAD_AREA:
725 case MBX_RUN_BIU_DIAG64:
726 case MBX_CONFIG_PORT:
727 case MBX_READ_SPARM64:
728 case MBX_READ_RPI64:
729 case MBX_REG_LOGIN64:
730 case MBX_READ_LA64:
731 case MBX_FLASH_WR_ULA:
732 case MBX_SET_DEBUG:
733 case MBX_LOAD_EXP_ROM:
57127f15 734 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS		 735 case MBX_REG_VPI:
736 case MBX_UNREG_VPI:
858c9f6c 737 case MBX_HEARTBEAT:
dea3101e
JB		 738 ret = mbxCommand;
739 break;
740 default:
741 ret = MBX_SHUTDOWN;
742 break;
743 }
2e0fef85 744 return ret;
dea3101e
JB		 745}
746static void
2e0fef85 747lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e
JB		 748{
749 wait_queue_head_t *pdone_q;
858c9f6c 750 unsigned long drvr_flag;
dea3101e
JB		 751
752 /*
753 * If pdone_q is empty, the driver thread gave up waiting and
754 * continued running.
755 */
7054a606 756 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 757 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e
JB		 758 pdone_q = (wait_queue_head_t *) pmboxq->context1;
759 if (pdone_q)
760 wake_up_interruptible(pdone_q);
858c9f6c 761 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB		 762 return;
763}
764
765void
2e0fef85 766lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e
JB		 767{
768 struct lpfc_dmabuf *mp;
7054a606
JS		 769 uint16_t rpi;
770 int rc;
771
dea3101e 772 mp = (struct lpfc_dmabuf *) (pmb->context1);
7054a606 773
dea3101e
JB		 774 if (mp) {
775 lpfc_mbuf_free(phba, mp->virt, mp->phys);
776 kfree(mp);
777 }
7054a606
JS		 778
779 /*
780 * If a REG_LOGIN succeeded after node is destroyed or node
781 * is in re-discovery driver need to cleanup the RPI.
782 */
2e0fef85
JS		 783 if (!(phba->pport->load_flag & FC_UNLOADING) &&
784 pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
785 !pmb->mb.mbxStatus) {
7054a606
JS		 786
787 rpi = pmb->mb.un.varWords[0];
92d7f7b0
JS		 788 lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
789 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS		 790 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
791 if (rc != MBX_NOT_FINISHED)
792 return;
793 }
794
2e0fef85 795 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB		 796 return;
797}
798
799int
2e0fef85 800lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 801{
92d7f7b0 802 MAILBOX_t *pmbox;
dea3101e 803 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS		 804 int rc;
805 LIST_HEAD(cmplq);
dea3101e
JB		 806
807 phba->sli.slistat.mbox_event++;
808
92d7f7b0
JS		 809 /* Get all completed mailboxe buffers into the cmplq */
810 spin_lock_irq(&phba->hbalock);
811 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
812 spin_unlock_irq(&phba->hbalock);
dea3101e 813
92d7f7b0
JS		 814 /* Get a Mailbox buffer to setup mailbox commands for callback */
815 do {
816 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
817 if (pmb == NULL)
818 break;
2e0fef85 819
92d7f7b0 820 pmbox = &pmb->mb;
dea3101e 821
858c9f6c
JS		 822 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
823 if (pmb->vport) {
824 lpfc_debugfs_disc_trc(pmb->vport,
825 LPFC_DISC_TRC_MBOX_VPORT,
826 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
827 (uint32_t)pmbox->mbxCommand,
828 pmbox->un.varWords[0],
829 pmbox->un.varWords[1]);
830 }
831 else {
832 lpfc_debugfs_disc_trc(phba->pport,
833 LPFC_DISC_TRC_MBOX,
834 "MBOX cmpl: cmd:x%x mb:x%x x%x",
835 (uint32_t)pmbox->mbxCommand,
836 pmbox->un.varWords[0],
837 pmbox->un.varWords[1]);
838 }
839 }
840
dea3101e
JB		 841 /*
842 * It is a fatal error if unknown mbox command completion.
843 */
844 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
845 MBX_SHUTDOWN) {
dea3101e 846 /* Unknow mailbox command compl */
92d7f7b0 847 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 848 "(%d):0323 Unknown Mailbox command "
92d7f7b0 849 "%x Cmpl\n",
92d7f7b0
JS		 850 pmb->vport ? pmb->vport->vpi : 0,
851 pmbox->mbxCommand);
2e0fef85 852 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 853 phba->work_hs = HS_FFER3;
854 lpfc_handle_eratt(phba);
92d7f7b0 855 continue;
dea3101e
JB		 856 }
857
dea3101e
JB		 858 if (pmbox->mbxStatus) {
859 phba->sli.slistat.mbox_stat_err++;
860 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
861 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0
JS		 862 lpfc_printf_log(phba, KERN_INFO,
863 LOG_MBOX | LOG_SLI,
e8b62011 864 "(%d):0305 Mbox cmd cmpl "
92d7f7b0
JS		 865 "error - RETRYing Data: x%x "
866 "x%x x%x x%x\n",
92d7f7b0
JS		 867 pmb->vport ? pmb->vport->vpi :0,
868 pmbox->mbxCommand,
869 pmbox->mbxStatus,
870 pmbox->un.varWords[0],
871 pmb->vport->port_state);
dea3101e
JB		 872 pmbox->mbxStatus = 0;
873 pmbox->mbxOwner = OWN_HOST;
2e0fef85 874 spin_lock_irq(&phba->hbalock);
dea3101e 875 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 876 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 877 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
878 if (rc == MBX_SUCCESS)
92d7f7b0 879 continue;
dea3101e
JB		 880 }
881 }
882
883 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 884 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 885 "(%d):0307 Mailbox cmd x%x Cmpl x%p "
dea3101e 886 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
92d7f7b0 887 pmb->vport ? pmb->vport->vpi : 0,
dea3101e
JB		 888 pmbox->mbxCommand,
889 pmb->mbox_cmpl,
890 *((uint32_t *) pmbox),
891 pmbox->un.varWords[0],
892 pmbox->un.varWords[1],
893 pmbox->un.varWords[2],
894 pmbox->un.varWords[3],
895 pmbox->un.varWords[4],
896 pmbox->un.varWords[5],
897 pmbox->un.varWords[6],
898 pmbox->un.varWords[7]);
899
92d7f7b0 900 if (pmb->mbox_cmpl)
dea3101e 901 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS		 902 } while (1);
903 return 0;
904}
dea3101e 905
92d7f7b0
JS		 906static struct lpfc_dmabuf *
907lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
908{
909 struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
51ef4c26
JS		 910 uint32_t hbqno;
911 void *virt; /* virtual address ptr */
912 dma_addr_t phys; /* mapped address */
dea3101e 913
92d7f7b0
JS		 914 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
915 if (hbq_entry == NULL)
916 return NULL;
917 list_del(&hbq_entry->dbuf.list);
51ef4c26
JS		 918
919 hbqno = tag >> 16;
920 new_hbq_entry = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
92d7f7b0
JS		 921 if (new_hbq_entry == NULL)
922 return &hbq_entry->dbuf;
92d7f7b0 923 new_hbq_entry->tag = -1;
51ef4c26
JS		 924 phys = new_hbq_entry->dbuf.phys;
925 virt = new_hbq_entry->dbuf.virt;
926 new_hbq_entry->dbuf.phys = hbq_entry->dbuf.phys;
927 new_hbq_entry->dbuf.virt = hbq_entry->dbuf.virt;
928 hbq_entry->dbuf.phys = phys;
929 hbq_entry->dbuf.virt = virt;
92d7f7b0
JS		 930 lpfc_sli_free_hbq(phba, hbq_entry);
931 return &new_hbq_entry->dbuf;
dea3101e 932}
92d7f7b0 933
76bb24ef
JS		 934static struct lpfc_dmabuf *
935lpfc_sli_get_buff(struct lpfc_hba *phba,
936 struct lpfc_sli_ring *pring,
937 uint32_t tag)
938{
939 if (tag & QUE_BUFTAG_BIT)
940 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
941 else
942 return lpfc_sli_replace_hbqbuff(phba, tag);
943}
57127f15 944
dea3101e
JB		 945static int
946lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
947 struct lpfc_iocbq *saveq)
948{
949 IOCB_t * irsp;
950 WORD5 * w5p;
951 uint32_t Rctl, Type;
952 uint32_t match, i;
76bb24ef 953 struct lpfc_iocbq *iocbq;
dea3101e
JB		 954
955 match = 0;
956 irsp = &(saveq->iocb);
57127f15
JS		 957
958 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
959 if (pring->lpfc_sli_rcv_async_status)
960 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
961 else
962 lpfc_printf_log(phba,
963 KERN_WARNING,
964 LOG_SLI,
965 "0316 Ring %d handler: unexpected "
966 "ASYNC_STATUS iocb received evt_code "
967 "0x%x\n",
968 pring->ringno,
969 irsp->un.asyncstat.evt_code);
970 return 1;
971 }
972
dea3101e 973 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
ed957684
JS		 974 || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)
975 || (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)
976 || (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX)) {
dea3101e
JB		 977 Rctl = FC_ELS_REQ;
978 Type = FC_ELS_DATA;
979 } else {
980 w5p =
981 (WORD5 *) & (saveq->iocb.un.
982 ulpWord[5]);
983 Rctl = w5p->hcsw.Rctl;
984 Type = w5p->hcsw.Type;
985
986 /* Firmware Workaround */
987 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
92d7f7b0
JS		 988 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
989 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
dea3101e
JB		 990 Rctl = FC_ELS_REQ;
991 Type = FC_ELS_DATA;
992 w5p->hcsw.Rctl = Rctl;
993 w5p->hcsw.Type = Type;
994 }
995 }
92d7f7b0
JS		 996
997 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS		 998 struct lpfc_hbq_entry *hbqe_1, *hbqe_2;
999 hbqe_1 = (struct lpfc_hbq_entry *) &saveq->iocb.un.ulpWord[0];
1000 hbqe_2 = (struct lpfc_hbq_entry *) &saveq->iocb.
1001 unsli3.sli3Words[4];
1002
1003 if (irsp->ulpBdeCount != 0) {
1004 saveq->context2 = lpfc_sli_get_buff(phba, pring,
1005 irsp->un.ulpWord[3]);
1006 if (!saveq->context2)
1007 lpfc_printf_log(phba,
1008 KERN_ERR,
1009 LOG_SLI,
1010 "0341 Ring %d Cannot find buffer for "
1011 "an unsolicited iocb. tag 0x%x\n",
1012 pring->ringno,
1013 irsp->un.ulpWord[3]);
1014
1015 }
1016 if (irsp->ulpBdeCount == 2) {
1017 saveq->context3 = lpfc_sli_get_buff(phba, pring,
1018 irsp->unsli3.sli3Words[7]);
1019 if (!saveq->context3)
1020 lpfc_printf_log(phba,
1021 KERN_ERR,
1022 LOG_SLI,
1023 "0342 Ring %d Cannot find buffer for an"
1024 " unsolicited iocb. tag 0x%x\n",
1025 pring->ringno,
1026 irsp->unsli3.sli3Words[7]);
1027 }
1028 list_for_each_entry(iocbq, &saveq->list, list) {
1029 hbqe_1 = (struct lpfc_hbq_entry *) &iocbq->iocb.
1030 un.ulpWord[0];
1031 hbqe_2 = (struct lpfc_hbq_entry *) &iocbq->iocb.
1032 unsli3.sli3Words[4];
1033 irsp = &(iocbq->iocb);
1034
1035 if (irsp->ulpBdeCount != 0) {
1036 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
1037 irsp->un.ulpWord[3]);
1038 if (!saveq->context2)
1039 lpfc_printf_log(phba,
1040 KERN_ERR,
1041 LOG_SLI,
1042 "0343 Ring %d Cannot find "
1043 "buffer for an unsolicited iocb"
1044 ". tag 0x%x\n", pring->ringno,
92d7f7b0 1045 irsp->un.ulpWord[3]);
76bb24ef
JS		 1046 }
1047 if (irsp->ulpBdeCount == 2) {
1048 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 1049 irsp->unsli3.sli3Words[7]);
76bb24ef
JS		 1050 if (!saveq->context3)
1051 lpfc_printf_log(phba,
1052 KERN_ERR,
1053 LOG_SLI,
1054 "0344 Ring %d Cannot find "
1055 "buffer for an unsolicited "
1056 "iocb. tag 0x%x\n",
1057 pring->ringno,
1058 irsp->unsli3.sli3Words[7]);
1059 }
1060 }
92d7f7b0
JS		 1061 }
1062
dea3101e
JB		 1063 /* unSolicited Responses */
1064 if (pring->prt[0].profile) {
cf5bf97e
JW		 1065 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
1066 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
1067 saveq);
dea3101e
JB		 1068 match = 1;
1069 } else {
1070 /* We must search, based on rctl / type
1071 for the right routine */
1072 for (i = 0; i < pring->num_mask;
1073 i++) {
1074 if ((pring->prt[i].rctl ==
1075 Rctl)
1076 && (pring->prt[i].
1077 type == Type)) {
cf5bf97e
JW		 1078 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
1079 (pring->prt[i].lpfc_sli_rcv_unsol_event)
1080 (phba, pring, saveq);
dea3101e
JB		 1081 match = 1;
1082 break;
1083 }
1084 }
1085 }
1086 if (match == 0) {
1087 /* Unexpected Rctl / Type received */
1088 /* Ring <ringno> handler: unexpected
1089 Rctl <Rctl> Type <Type> received */
92d7f7b0 1090 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1091 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 1092 "Type x%x received\n",
e8b62011 1093 pring->ringno, Rctl, Type);
dea3101e 1094 }
92d7f7b0 1095 return 1;
dea3101e
JB		 1096}
1097
1098static struct lpfc_iocbq *
2e0fef85
JS		 1099lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
1100 struct lpfc_sli_ring *pring,
1101 struct lpfc_iocbq *prspiocb)
dea3101e 1102{
dea3101e
JB		 1103 struct lpfc_iocbq *cmd_iocb = NULL;
1104 uint16_t iotag;
1105
604a3e30
JB		 1106 iotag = prspiocb->iocb.ulpIoTag;
1107
1108 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
1109 cmd_iocb = phba->sli.iocbq_lookup[iotag];
92d7f7b0 1110 list_del_init(&cmd_iocb->list);
604a3e30
JB		 1111 pring->txcmplq_cnt--;
1112 return cmd_iocb;
dea3101e
JB		 1113 }
1114
dea3101e 1115 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1116 "0317 iotag x%x is out off "
604a3e30 1117 "range: max iotag x%x wd0 x%x\n",
e8b62011 1118 iotag, phba->sli.last_iotag,
604a3e30 1119 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB		 1120 return NULL;
1121}
1122
1123static int
2e0fef85 1124lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB		 1125 struct lpfc_iocbq *saveq)
1126{
2e0fef85 1127 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB		 1128 int rc = 1;
1129 unsigned long iflag;
1130
1131 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
2e0fef85 1132 spin_lock_irqsave(&phba->hbalock, iflag);
604a3e30 1133 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
2e0fef85
JS		 1134 spin_unlock_irqrestore(&phba->hbalock, iflag);
1135
dea3101e
JB		 1136 if (cmdiocbp) {
1137 if (cmdiocbp->iocb_cmpl) {
1138 /*
1139 * Post all ELS completions to the worker thread.
1140 * All other are passed to the completion callback.
1141 */
1142 if (pring->ringno == LPFC_ELS_RING) {
07951076
JS		 1143 if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
1144 cmdiocbp->iocb_flag &=
1145 ~LPFC_DRIVER_ABORTED;
1146 saveq->iocb.ulpStatus =
1147 IOSTAT_LOCAL_REJECT;
1148 saveq->iocb.un.ulpWord[4] =
1149 IOERR_SLI_ABORTED;
1150 }
dea3101e 1151 }
2e0fef85 1152 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB		 1153 } else
1154 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB		 1155 } else {
1156 /*
1157 * Unknown initiating command based on the response iotag.
1158 * This could be the case on the ELS ring because of
1159 * lpfc_els_abort().
1160 */
1161 if (pring->ringno != LPFC_ELS_RING) {
1162 /*
1163 * Ring <ringno> handler: unexpected completion IoTag
1164 * <IoTag>
1165 */
e8b62011
JS		 1166 lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
1167 "0322 Ring %d handler: "
1168 "unexpected completion IoTag x%x "
1169 "Data: x%x x%x x%x x%x\n",
1170 pring->ringno,
1171 saveq->iocb.ulpIoTag,
1172 saveq->iocb.ulpStatus,
1173 saveq->iocb.un.ulpWord[4],
1174 saveq->iocb.ulpCommand,
1175 saveq->iocb.ulpContext);
dea3101e
JB		 1176 }
1177 }
68876920 1178
dea3101e
JB		 1179 return rc;
1180}
1181
2e0fef85
JS		 1182static void
1183lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 1184{
ed957684
JS		 1185 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1186 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1187 &phba->slim2p->mbx.us.s2.port[pring->ringno];
875fbdfe
JSEC		 1188 /*
1189 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1190 * rsp ring <portRspMax>
1191 */
1192 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1193 "0312 Ring %d handler: portRspPut %d "
875fbdfe 1194 "is bigger then rsp ring %d\n",
e8b62011 1195 pring->ringno, le32_to_cpu(pgp->rspPutInx),
875fbdfe
JSEC		 1196 pring->numRiocb);
1197
2e0fef85 1198 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC		 1199
1200 /*
1201 * All error attention handlers are posted to
1202 * worker thread
1203 */
1204 phba->work_ha |= HA_ERATT;
1205 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 1206
1207 /* hbalock should already be held */
875fbdfe 1208 if (phba->work_wait)
92d7f7b0 1209 lpfc_worker_wake_up(phba);
875fbdfe
JSEC		 1210
1211 return;
1212}
1213
2e0fef85 1214void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
875fbdfe 1215{
2e0fef85
JS		 1216 struct lpfc_sli *psli = &phba->sli;
1217 struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
875fbdfe
JSEC		 1218 IOCB_t *irsp = NULL;
1219 IOCB_t *entry = NULL;
1220 struct lpfc_iocbq *cmdiocbq = NULL;
1221 struct lpfc_iocbq rspiocbq;
1222 struct lpfc_pgp *pgp;
1223 uint32_t status;
1224 uint32_t portRspPut, portRspMax;
1225 int type;
1226 uint32_t rsp_cmpl = 0;
875fbdfe 1227 uint32_t ha_copy;
2e0fef85 1228 unsigned long iflags;
875fbdfe
JSEC		 1229
1230 pring->stats.iocb_event++;
1231
ed957684
JS		 1232 pgp = (phba->sli_rev == 3) ?
1233 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1234 &phba->slim2p->mbx.us.s2.port[pring->ringno];
1235
875fbdfe
JSEC		 1236
1237 /*
1238 * The next available response entry should never exceed the maximum
1239 * entries. If it does, treat it as an adapter hardware error.
1240 */
1241 portRspMax = pring->numRiocb;
1242 portRspPut = le32_to_cpu(pgp->rspPutInx);
1243 if (unlikely(portRspPut >= portRspMax)) {
1244 lpfc_sli_rsp_pointers_error(phba, pring);
1245 return;
1246 }
1247
1248 rmb();
1249 while (pring->rspidx != portRspPut) {
ed957684 1250 entry = lpfc_resp_iocb(phba, pring);
875fbdfe
JSEC		 1251 if (++pring->rspidx >= portRspMax)
1252 pring->rspidx = 0;
1253
1254 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1255 (uint32_t *) &rspiocbq.iocb,
92d7f7b0 1256 phba->iocb_rsp_size);
875fbdfe
JSEC		 1257 irsp = &rspiocbq.iocb;
1258 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1259 pring->stats.iocb_rsp++;
1260 rsp_cmpl++;
1261
1262 if (unlikely(irsp->ulpStatus)) {
1263 /* Rsp ring <ringno> error: IOCB */
1264 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1265 "0326 Rsp Ring %d error: IOCB Data: "
875fbdfe 1266 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1267 pring->ringno,
875fbdfe
JSEC		 1268 irsp->un.ulpWord[0],
1269 irsp->un.ulpWord[1],
1270 irsp->un.ulpWord[2],
1271 irsp->un.ulpWord[3],
1272 irsp->un.ulpWord[4],
1273 irsp->un.ulpWord[5],
1274 *(((uint32_t *) irsp) + 6),
1275 *(((uint32_t *) irsp) + 7));
1276 }
1277
1278 switch (type) {
1279 case LPFC_ABORT_IOCB:
1280 case LPFC_SOL_IOCB:
1281 /*
1282 * Idle exchange closed via ABTS from port. No iocb
1283 * resources need to be recovered.
1284 */
1285 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1286 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 1287 "0314 IOCB cmd 0x%x "
1288 "processed. Skipping "
1289 "completion",
dca9479b 1290 irsp->ulpCommand);
875fbdfe
JSEC		 1291 break;
1292 }
1293
2e0fef85 1294 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1295 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1296 &rspiocbq);
2e0fef85 1297 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1298 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
1299 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1300 &rspiocbq);
1301 }
1302 break;
1303 default:
1304 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1305 char adaptermsg[LPFC_MAX_ADPTMSG];
1306 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1307 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1308 MAX_MSG_DATA);
898eb71c
JP		 1309 dev_warn(&((phba->pcidev)->dev),
1310 "lpfc%d: %s\n",
875fbdfe
JSEC		 1311 phba->brd_no, adaptermsg);
1312 } else {
1313 /* Unknown IOCB command */
1314 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1315 "0321 Unknown IOCB command "
875fbdfe 1316 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1317 type, irsp->ulpCommand,
875fbdfe
JSEC		 1318 irsp->ulpStatus,
1319 irsp->ulpIoTag,
1320 irsp->ulpContext);
1321 }
1322 break;
1323 }
1324
1325 /*
1326 * The response IOCB has been processed. Update the ring
1327 * pointer in SLIM. If the port response put pointer has not
1328 * been updated, sync the pgp->rspPutInx and fetch the new port
1329 * response put pointer.
1330 */
ed957684 1331 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
875fbdfe
JSEC		 1332
1333 if (pring->rspidx == portRspPut)
1334 portRspPut = le32_to_cpu(pgp->rspPutInx);
1335 }
1336
1337 ha_copy = readl(phba->HAregaddr);
1338 ha_copy >>= (LPFC_FCP_RING * 4);
1339
1340 if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
2e0fef85 1341 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1342 pring->stats.iocb_rsp_full++;
1343 status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
1344 writel(status, phba->CAregaddr);
1345 readl(phba->CAregaddr);
2e0fef85 1346 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1347 }
1348 if ((ha_copy & HA_R0CE_RSP) &&
1349 (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
2e0fef85 1350 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1351 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1352 pring->stats.iocb_cmd_empty++;
1353
1354 /* Force update of the local copy of cmdGetInx */
1355 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1356 lpfc_sli_resume_iocb(phba, pring);
1357
1358 if ((pring->lpfc_sli_cmd_available))
1359 (pring->lpfc_sli_cmd_available) (phba, pring);
1360
2e0fef85 1361 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1362 }
1363
1364 return;
1365}
1366
dea3101e
JB		 1367/*
1368 * This routine presumes LPFC_FCP_RING handling and doesn't bother
1369 * to check it explicitly.
1370 */
1371static int
2e0fef85
JS		 1372lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
1373 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1374{
ed957684
JS		 1375 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1376 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1377 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 1378 IOCB_t *irsp = NULL;
87f6eaff 1379 IOCB_t *entry = NULL;
dea3101e
JB		 1380 struct lpfc_iocbq *cmdiocbq = NULL;
1381 struct lpfc_iocbq rspiocbq;
dea3101e
JB		 1382 uint32_t status;
1383 uint32_t portRspPut, portRspMax;
1384 int rc = 1;
1385 lpfc_iocb_type type;
1386 unsigned long iflag;
1387 uint32_t rsp_cmpl = 0;
dea3101e 1388
2e0fef85 1389 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1390 pring->stats.iocb_event++;
1391
dea3101e
JB		 1392 /*
1393 * The next available response entry should never exceed the maximum
1394 * entries. If it does, treat it as an adapter hardware error.
1395 */
1396 portRspMax = pring->numRiocb;
1397 portRspPut = le32_to_cpu(pgp->rspPutInx);
1398 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 1399 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 1400 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1401 return 1;
1402 }
1403
1404 rmb();
1405 while (pring->rspidx != portRspPut) {
87f6eaff
JSEC		 1406 /*
1407 * Fetch an entry off the ring and copy it into a local data
1408 * structure. The copy involves a byte-swap since the
1409 * network byte order and pci byte orders are different.
1410 */
ed957684 1411 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 1412 phba->last_completion_time = jiffies;
875fbdfe
JSEC		 1413
1414 if (++pring->rspidx >= portRspMax)
1415 pring->rspidx = 0;
1416
87f6eaff
JSEC		 1417 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1418 (uint32_t *) &rspiocbq.iocb,
ed957684 1419 phba->iocb_rsp_size);
a4bc3379 1420 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC		 1421 irsp = &rspiocbq.iocb;
1422
dea3101e
JB		 1423 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1424 pring->stats.iocb_rsp++;
1425 rsp_cmpl++;
1426
1427 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS		 1428 /*
1429 * If resource errors reported from HBA, reduce
1430 * queuedepths of the SCSI device.
1431 */
1432 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1433 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1434 spin_unlock_irqrestore(&phba->hbalock, iflag);
1435 lpfc_adjust_queue_depth(phba);
1436 spin_lock_irqsave(&phba->hbalock, iflag);
1437 }
1438
dea3101e
JB		 1439 /* Rsp ring <ringno> error: IOCB */
1440 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1441 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 1442 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1443 pring->ringno,
92d7f7b0
JS		 1444 irsp->un.ulpWord[0],
1445 irsp->un.ulpWord[1],
1446 irsp->un.ulpWord[2],
1447 irsp->un.ulpWord[3],
1448 irsp->un.ulpWord[4],
1449 irsp->un.ulpWord[5],
1450 *(((uint32_t *) irsp) + 6),
1451 *(((uint32_t *) irsp) + 7));
dea3101e
JB		 1452 }
1453
1454 switch (type) {
1455 case LPFC_ABORT_IOCB:
1456 case LPFC_SOL_IOCB:
1457 /*
1458 * Idle exchange closed via ABTS from port. No iocb
1459 * resources need to be recovered.
1460 */
1461 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1462 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 1463 "0333 IOCB cmd 0x%x"
dca9479b 1464 " processed. Skipping"
92d7f7b0 1465 " completion\n",
dca9479b 1466 irsp->ulpCommand);
dea3101e
JB		 1467 break;
1468 }
1469
604a3e30
JB		 1470 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1471 &rspiocbq);
dea3101e 1472 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
b808608b
JW		 1473 if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
1474 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1475 &rspiocbq);
1476 } else {
2e0fef85
JS		 1477 spin_unlock_irqrestore(&phba->hbalock,
1478 iflag);
b808608b
JW		 1479 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1480 &rspiocbq);
2e0fef85 1481 spin_lock_irqsave(&phba->hbalock,
b808608b
JW		 1482 iflag);
1483 }
dea3101e
JB		 1484 }
1485 break;
a4bc3379 1486 case LPFC_UNSOL_IOCB:
2e0fef85 1487 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 1488 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 1489 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 1490 break;
dea3101e
JB		 1491 default:
1492 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1493 char adaptermsg[LPFC_MAX_ADPTMSG];
1494 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1495 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1496 MAX_MSG_DATA);
898eb71c
JP		 1497 dev_warn(&((phba->pcidev)->dev),
1498 "lpfc%d: %s\n",
dea3101e
JB		 1499 phba->brd_no, adaptermsg);
1500 } else {
1501 /* Unknown IOCB command */
1502 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1503 "0334 Unknown IOCB command "
92d7f7b0 1504 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1505 type, irsp->ulpCommand,
92d7f7b0
JS		 1506 irsp->ulpStatus,
1507 irsp->ulpIoTag,
1508 irsp->ulpContext);
dea3101e
JB		 1509 }
1510 break;
1511 }
1512
1513 /*
1514 * The response IOCB has been processed. Update the ring
1515 * pointer in SLIM. If the port response put pointer has not
1516 * been updated, sync the pgp->rspPutInx and fetch the new port
1517 * response put pointer.
1518 */
ed957684 1519 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e
JB		 1520
1521 if (pring->rspidx == portRspPut)
1522 portRspPut = le32_to_cpu(pgp->rspPutInx);
1523 }
1524
1525 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1526 pring->stats.iocb_rsp_full++;
1527 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1528 writel(status, phba->CAregaddr);
1529 readl(phba->CAregaddr);
1530 }
1531 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1532 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1533 pring->stats.iocb_cmd_empty++;
1534
1535 /* Force update of the local copy of cmdGetInx */
1536 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1537 lpfc_sli_resume_iocb(phba, pring);
1538
1539 if ((pring->lpfc_sli_cmd_available))
1540 (pring->lpfc_sli_cmd_available) (phba, pring);
1541
1542 }
1543
2e0fef85 1544 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1545 return rc;
1546}
1547
dea3101e 1548int
2e0fef85
JS		 1549lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
1550 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1551{
ed957684
JS		 1552 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1553 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1554 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e
JB		 1555 IOCB_t *entry;
1556 IOCB_t *irsp = NULL;
1557 struct lpfc_iocbq *rspiocbp = NULL;
1558 struct lpfc_iocbq *next_iocb;
1559 struct lpfc_iocbq *cmdiocbp;
1560 struct lpfc_iocbq *saveq;
dea3101e
JB		 1561 uint8_t iocb_cmd_type;
1562 lpfc_iocb_type type;
1563 uint32_t status, free_saveq;
1564 uint32_t portRspPut, portRspMax;
1565 int rc = 1;
1566 unsigned long iflag;
dea3101e 1567
2e0fef85 1568 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1569 pring->stats.iocb_event++;
1570
dea3101e
JB		 1571 /*
1572 * The next available response entry should never exceed the maximum
1573 * entries. If it does, treat it as an adapter hardware error.
1574 */
1575 portRspMax = pring->numRiocb;
1576 portRspPut = le32_to_cpu(pgp->rspPutInx);
1577 if (portRspPut >= portRspMax) {
1578 /*
1579 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1580 * rsp ring <portRspMax>
1581 */
ed957684 1582 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1583 "0303 Ring %d handler: portRspPut %d "
dea3101e 1584 "is bigger then rsp ring %d\n",
e8b62011 1585 pring->ringno, portRspPut, portRspMax);
dea3101e 1586
2e0fef85
JS		 1587 phba->link_state = LPFC_HBA_ERROR;
1588 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1589
1590 phba->work_hs = HS_FFER3;
1591 lpfc_handle_eratt(phba);
1592
1593 return 1;
1594 }
1595
1596 rmb();
dea3101e
JB		 1597 while (pring->rspidx != portRspPut) {
1598 /*
1599 * Build a completion list and call the appropriate handler.
1600 * The process is to get the next available response iocb, get
1601 * a free iocb from the list, copy the response data into the
1602 * free iocb, insert to the continuation list, and update the
1603 * next response index to slim. This process makes response
1604 * iocb's in the ring available to DMA as fast as possible but
1605 * pays a penalty for a copy operation. Since the iocb is
1606 * only 32 bytes, this penalty is considered small relative to
1607 * the PCI reads for register values and a slim write. When
1608 * the ulpLe field is set, the entire Command has been
1609 * received.
1610 */
ed957684
JS		 1611 entry = lpfc_resp_iocb(phba, pring);
1612
858c9f6c 1613 phba->last_completion_time = jiffies;
2e0fef85 1614 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB		 1615 if (rspiocbp == NULL) {
1616 printk(KERN_ERR "%s: out of buffers! Failing "
1617 "completion.\n", __FUNCTION__);
1618 break;
1619 }
1620
ed957684
JS		 1621 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
1622 phba->iocb_rsp_size);
dea3101e
JB		 1623 irsp = &rspiocbp->iocb;
1624
1625 if (++pring->rspidx >= portRspMax)
1626 pring->rspidx = 0;
1627
a58cbd52
JS		 1628 if (pring->ringno == LPFC_ELS_RING) {
1629 lpfc_debugfs_slow_ring_trc(phba,
1630 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1631 *(((uint32_t *) irsp) + 4),
1632 *(((uint32_t *) irsp) + 6),
1633 *(((uint32_t *) irsp) + 7));
1634 }
1635
ed957684 1636 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e
JB		 1637
1638 if (list_empty(&(pring->iocb_continueq))) {
1639 list_add(&rspiocbp->list, &(pring->iocb_continueq));
1640 } else {
1641 list_add_tail(&rspiocbp->list,
1642 &(pring->iocb_continueq));
1643 }
1644
1645 pring->iocb_continueq_cnt++;
1646 if (irsp->ulpLe) {
1647 /*
1648 * By default, the driver expects to free all resources
1649 * associated with this iocb completion.
1650 */
1651 free_saveq = 1;
1652 saveq = list_get_first(&pring->iocb_continueq,
1653 struct lpfc_iocbq, list);
1654 irsp = &(saveq->iocb);
1655 list_del_init(&pring->iocb_continueq);
1656 pring->iocb_continueq_cnt = 0;
1657
1658 pring->stats.iocb_rsp++;
1659
92d7f7b0
JS		 1660 /*
1661 * If resource errors reported from HBA, reduce
1662 * queuedepths of the SCSI device.
1663 */
1664 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1665 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1666 spin_unlock_irqrestore(&phba->hbalock, iflag);
1667 lpfc_adjust_queue_depth(phba);
1668 spin_lock_irqsave(&phba->hbalock, iflag);
1669 }
1670
dea3101e
JB		 1671 if (irsp->ulpStatus) {
1672 /* Rsp ring <ringno> error: IOCB */
ed957684 1673 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1674 "0328 Rsp Ring %d error: "
ed957684
JS		 1675 "IOCB Data: "
1676 "x%x x%x x%x x%x "
1677 "x%x x%x x%x x%x "
1678 "x%x x%x x%x x%x "
1679 "x%x x%x x%x x%x\n",
ed957684
JS		 1680 pring->ringno,
1681 irsp->un.ulpWord[0],
1682 irsp->un.ulpWord[1],
1683 irsp->un.ulpWord[2],
1684 irsp->un.ulpWord[3],
1685 irsp->un.ulpWord[4],
1686 irsp->un.ulpWord[5],
1687 *(((uint32_t *) irsp) + 6),
1688 *(((uint32_t *) irsp) + 7),
1689 *(((uint32_t *) irsp) + 8),
1690 *(((uint32_t *) irsp) + 9),
1691 *(((uint32_t *) irsp) + 10),
1692 *(((uint32_t *) irsp) + 11),
1693 *(((uint32_t *) irsp) + 12),
1694 *(((uint32_t *) irsp) + 13),
1695 *(((uint32_t *) irsp) + 14),
1696 *(((uint32_t *) irsp) + 15));
dea3101e
JB		 1697 }
1698
1699 /*
1700 * Fetch the IOCB command type and call the correct
1701 * completion routine. Solicited and Unsolicited
1702 * IOCBs on the ELS ring get freed back to the
1703 * lpfc_iocb_list by the discovery kernel thread.
1704 */
1705 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1706 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1707 if (type == LPFC_SOL_IOCB) {
2e0fef85 1708 spin_unlock_irqrestore(&phba->hbalock,
dea3101e
JB		 1709 iflag);
1710 rc = lpfc_sli_process_sol_iocb(phba, pring,
2e0fef85
JS		 1711 saveq);
1712 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 1713 } else if (type == LPFC_UNSOL_IOCB) {
2e0fef85 1714 spin_unlock_irqrestore(&phba->hbalock,
dea3101e
JB		 1715 iflag);
1716 rc = lpfc_sli_process_unsol_iocb(phba, pring,
2e0fef85
JS		 1717 saveq);
1718 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB		 1719 } else if (type == LPFC_ABORT_IOCB) {
1720 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1721 ((cmdiocbp =
604a3e30
JB		 1722 lpfc_sli_iocbq_lookup(phba, pring,
1723 saveq)))) {
dea3101e
JB		 1724 /* Call the specified completion
1725 routine */
1726 if (cmdiocbp->iocb_cmpl) {
1727 spin_unlock_irqrestore(
2e0fef85 1728 &phba->hbalock,
dea3101e
JB		 1729 iflag);
1730 (cmdiocbp->iocb_cmpl) (phba,
1731 cmdiocbp, saveq);
1732 spin_lock_irqsave(
2e0fef85 1733 &phba->hbalock,
dea3101e 1734 iflag);
604a3e30 1735 } else
2e0fef85 1736 __lpfc_sli_release_iocbq(phba,
604a3e30 1737 cmdiocbp);
dea3101e
JB		 1738 }
1739 } else if (type == LPFC_UNKNOWN_IOCB) {
1740 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1741
1742 char adaptermsg[LPFC_MAX_ADPTMSG];
1743
1744 memset(adaptermsg, 0,
1745 LPFC_MAX_ADPTMSG);
1746 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1747 MAX_MSG_DATA);
1748 dev_warn(&((phba->pcidev)->dev),
898eb71c 1749 "lpfc%d: %s\n",
dea3101e
JB		 1750 phba->brd_no, adaptermsg);
1751 } else {
1752 /* Unknown IOCB command */
92d7f7b0 1753 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1754 "0335 Unknown IOCB "
92d7f7b0
JS		 1755 "command Data: x%x "
1756 "x%x x%x x%x\n",
92d7f7b0
JS		 1757 irsp->ulpCommand,
1758 irsp->ulpStatus,
1759 irsp->ulpIoTag,
1760 irsp->ulpContext);
dea3101e
JB		 1761 }
1762 }
1763
1764 if (free_saveq) {
2e0fef85
JS		 1765 list_for_each_entry_safe(rspiocbp, next_iocb,
1766 &saveq->list, list) {
1767 list_del(&rspiocbp->list);
1768 __lpfc_sli_release_iocbq(phba,
1769 rspiocbp);
dea3101e 1770 }
2e0fef85 1771 __lpfc_sli_release_iocbq(phba, saveq);
dea3101e 1772 }
92d7f7b0 1773 rspiocbp = NULL;
dea3101e
JB		 1774 }
1775
1776 /*
1777 * If the port response put pointer has not been updated, sync
1778 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1779 * response put pointer.
1780 */
1781 if (pring->rspidx == portRspPut) {
1782 portRspPut = le32_to_cpu(pgp->rspPutInx);
1783 }
1784 } /* while (pring->rspidx != portRspPut) */
1785
92d7f7b0 1786 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB		 1787 /* At least one response entry has been freed */
1788 pring->stats.iocb_rsp_full++;
1789 /* SET RxRE_RSP in Chip Att register */
1790 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1791 writel(status, phba->CAregaddr);
1792 readl(phba->CAregaddr); /* flush */
1793 }
1794 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1795 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1796 pring->stats.iocb_cmd_empty++;
1797
1798 /* Force update of the local copy of cmdGetInx */
1799 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1800 lpfc_sli_resume_iocb(phba, pring);
1801
1802 if ((pring->lpfc_sli_cmd_available))
1803 (pring->lpfc_sli_cmd_available) (phba, pring);
1804
1805 }
1806
2e0fef85 1807 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB		 1808 return rc;
1809}
1810
2e0fef85 1811void
dea3101e
JB		 1812lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1813{
2534ba75 1814 LIST_HEAD(completions);
dea3101e 1815 struct lpfc_iocbq *iocb, *next_iocb;
2534ba75 1816 IOCB_t *cmd = NULL;
dea3101e 1817
92d7f7b0
JS		 1818 if (pring->ringno == LPFC_ELS_RING) {
1819 lpfc_fabric_abort_hba(phba);
1820 }
1821
dea3101e
JB		 1822 /* Error everything on txq and txcmplq
1823 * First do the txq.
1824 */
2e0fef85 1825 spin_lock_irq(&phba->hbalock);
2534ba75 1826 list_splice_init(&pring->txq, &completions);
dea3101e 1827 pring->txq_cnt = 0;
dea3101e
JB		 1828
1829 /* Next issue ABTS for everything on the txcmplq */
2534ba75
JS		 1830 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
1831 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
dea3101e 1832
2e0fef85 1833 spin_unlock_irq(&phba->hbalock);
dea3101e 1834
2534ba75
JS		 1835 while (!list_empty(&completions)) {
1836 iocb = list_get_first(&completions, struct lpfc_iocbq, list);
1837 cmd = &iocb->iocb;
92d7f7b0 1838 list_del_init(&iocb->list);
dea3101e 1839
2e0fef85
JS		 1840 if (!iocb->iocb_cmpl)
1841 lpfc_sli_release_iocbq(phba, iocb);
1842 else {
dea3101e
JB		 1843 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1844 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
dea3101e 1845 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 1846 }
dea3101e 1847 }
dea3101e
JB		 1848}
1849
41415862 1850int
2e0fef85 1851lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
dea3101e 1852{
41415862
JW		 1853 uint32_t status;
1854 int i = 0;
1855 int retval = 0;
dea3101e 1856
41415862
JW		 1857 /* Read the HBA Host Status Register */
1858 status = readl(phba->HSregaddr);
dea3101e 1859
41415862
JW		 1860 /*
1861 * Check status register every 100ms for 5 retries, then every
1862 * 500ms for 5, then every 2.5 sec for 5, then reset board and
1863 * every 2.5 sec for 4.
1864 * Break our of the loop if errors occurred during init.
1865 */
1866 while (((status & mask) != mask) &&
1867 !(status & HS_FFERM) &&
1868 i++ < 20) {
dea3101e 1869
41415862
JW		 1870 if (i <= 5)
1871 msleep(10);
1872 else if (i <= 10)
1873 msleep(500);
1874 else
1875 msleep(2500);
dea3101e 1876
41415862 1877 if (i == 15) {
2e0fef85 1878 /* Do post */
92d7f7b0 1879 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW		 1880 lpfc_sli_brdrestart(phba);
1881 }
1882 /* Read the HBA Host Status Register */
1883 status = readl(phba->HSregaddr);
1884 }
dea3101e 1885
41415862
JW		 1886 /* Check to see if any errors occurred during init */
1887 if ((status & HS_FFERM) || (i >= 20)) {
2e0fef85 1888 phba->link_state = LPFC_HBA_ERROR;
41415862 1889 retval = 1;
dea3101e 1890 }
dea3101e 1891
41415862
JW		 1892 return retval;
1893}
dea3101e 1894
9290831f
JS		 1895#define BARRIER_TEST_PATTERN (0xdeadbeef)
1896
2e0fef85 1897void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 1898{
65a29c16
JS		 1899 uint32_t __iomem *resp_buf;
1900 uint32_t __iomem *mbox_buf;
9290831f
JS		 1901 volatile uint32_t mbox;
1902 uint32_t hc_copy;
1903 int i;
1904 uint8_t hdrtype;
1905
1906 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
1907 if (hdrtype != 0x80 ||
1908 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
1909 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
1910 return;
1911
1912 /*
1913 * Tell the other part of the chip to suspend temporarily all
1914 * its DMA activity.
1915 */
65a29c16 1916 resp_buf = phba->MBslimaddr;
9290831f
JS		 1917
1918 /* Disable the error attention */
1919 hc_copy = readl(phba->HCregaddr);
1920 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
1921 readl(phba->HCregaddr); /* flush */
2e0fef85 1922 phba->link_flag |= LS_IGNORE_ERATT;
9290831f
JS		 1923
1924 if (readl(phba->HAregaddr) & HA_ERATT) {
1925 /* Clear Chip error bit */
1926 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 1927 phba->pport->stopped = 1;
9290831f
JS		 1928 }
1929
1930 mbox = 0;
1931 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
1932 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
1933
1934 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 1935 mbox_buf = phba->MBslimaddr;
9290831f
JS		 1936 writel(mbox, mbox_buf);
1937
1938 for (i = 0;
1939 readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
1940 mdelay(1);
1941
1942 if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
1943 if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
2e0fef85 1944 phba->pport->stopped)
9290831f
JS		 1945 goto restore_hc;
1946 else
1947 goto clear_errat;
1948 }
1949
1950 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
1951 for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
1952 mdelay(1);
1953
1954clear_errat:
1955
1956 while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
1957 mdelay(1);
1958
1959 if (readl(phba->HAregaddr) & HA_ERATT) {
1960 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 1961 phba->pport->stopped = 1;
9290831f
JS		 1962 }
1963
1964restore_hc:
2e0fef85 1965 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS		 1966 writel(hc_copy, phba->HCregaddr);
1967 readl(phba->HCregaddr); /* flush */
1968}
1969
41415862 1970int
2e0fef85 1971lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW		 1972{
1973 struct lpfc_sli *psli;
1974 LPFC_MBOXQ_t *pmb;
1975 uint32_t status;
1976 uint32_t ha_copy;
1977 int retval;
1978 int i = 0;
dea3101e 1979
41415862 1980 psli = &phba->sli;
dea3101e 1981
41415862 1982 /* Kill HBA */
ed957684 1983 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 1984 "0329 Kill HBA Data: x%x x%x\n",
1985 phba->pport->port_state, psli->sli_flag);
41415862 1986
98c9ea5c
JS		 1987 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1988 if (!pmb)
41415862 1989 return 1;
41415862
JW		 1990
1991 /* Disable the error attention */
2e0fef85 1992 spin_lock_irq(&phba->hbalock);
41415862
JW		 1993 status = readl(phba->HCregaddr);
1994 status &= ~HC_ERINT_ENA;
1995 writel(status, phba->HCregaddr);
1996 readl(phba->HCregaddr); /* flush */
2e0fef85
JS		 1997 phba->link_flag |= LS_IGNORE_ERATT;
1998 spin_unlock_irq(&phba->hbalock);
41415862
JW		 1999
2000 lpfc_kill_board(phba, pmb);
2001 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
2002 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2003
2004 if (retval != MBX_SUCCESS) {
2005 if (retval != MBX_BUSY)
2006 mempool_free(pmb, phba->mbox_mem_pool);
2e0fef85
JS		 2007 spin_lock_irq(&phba->hbalock);
2008 phba->link_flag &= ~LS_IGNORE_ERATT;
2009 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2010 return 1;
2011 }
2012
9290831f
JS		 2013 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
2014
41415862
JW		 2015 mempool_free(pmb, phba->mbox_mem_pool);
2016
2017 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
2018 * attention every 100ms for 3 seconds. If we don't get ERATT after
2019 * 3 seconds we still set HBA_ERROR state because the status of the
2020 * board is now undefined.
2021 */
2022 ha_copy = readl(phba->HAregaddr);
2023
2024 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
2025 mdelay(100);
2026 ha_copy = readl(phba->HAregaddr);
2027 }
2028
2029 del_timer_sync(&psli->mbox_tmo);
9290831f
JS		 2030 if (ha_copy & HA_ERATT) {
2031 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 2032 phba->pport->stopped = 1;
9290831f 2033 }
2e0fef85 2034 spin_lock_irq(&phba->hbalock);
41415862 2035 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85
JS		 2036 phba->link_flag &= ~LS_IGNORE_ERATT;
2037 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2038
2039 psli->mbox_active = NULL;
2040 lpfc_hba_down_post(phba);
2e0fef85 2041 phba->link_state = LPFC_HBA_ERROR;
41415862 2042
2e0fef85 2043 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB		 2044}
2045
41415862 2046int
2e0fef85 2047lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 2048{
41415862 2049 struct lpfc_sli *psli;
dea3101e 2050 struct lpfc_sli_ring *pring;
41415862 2051 uint16_t cfg_value;
dea3101e 2052 int i;
dea3101e 2053
41415862 2054 psli = &phba->sli;
dea3101e 2055
41415862
JW		 2056 /* Reset HBA */
2057 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 2058 "0325 Reset HBA Data: x%x x%x\n",
2e0fef85 2059 phba->pport->port_state, psli->sli_flag);
dea3101e
JB		 2060
2061 /* perform board reset */
2062 phba->fc_eventTag = 0;
2e0fef85
JS		 2063 phba->pport->fc_myDID = 0;
2064 phba->pport->fc_prevDID = 0;
dea3101e 2065
41415862
JW		 2066 /* Turn off parity checking and serr during the physical reset */
2067 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
2068 pci_write_config_word(phba->pcidev, PCI_COMMAND,
2069 (cfg_value &
2070 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
2071
1c067a42 2072 psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
41415862
JW		 2073 /* Now toggle INITFF bit in the Host Control Register */
2074 writel(HC_INITFF, phba->HCregaddr);
2075 mdelay(1);
2076 readl(phba->HCregaddr); /* flush */
2077 writel(0, phba->HCregaddr);
2078 readl(phba->HCregaddr); /* flush */
2079
2080 /* Restore PCI cmd register */
2081 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB		 2082
2083 /* Initialize relevant SLI info */
41415862
JW		 2084 for (i = 0; i < psli->num_rings; i++) {
2085 pring = &psli->ring[i];
dea3101e
JB		 2086 pring->flag = 0;
2087 pring->rspidx = 0;
2088 pring->next_cmdidx = 0;
2089 pring->local_getidx = 0;
2090 pring->cmdidx = 0;
2091 pring->missbufcnt = 0;
2092 }
dea3101e 2093
2e0fef85 2094 phba->link_state = LPFC_WARM_START;
41415862
JW		 2095 return 0;
2096}
2097
2098int
2e0fef85 2099lpfc_sli_brdrestart(struct lpfc_hba *phba)
41415862
JW		 2100{
2101 MAILBOX_t *mb;
2102 struct lpfc_sli *psli;
2103 uint16_t skip_post;
2104 volatile uint32_t word0;
2105 void __iomem *to_slim;
2106
2e0fef85 2107 spin_lock_irq(&phba->hbalock);
41415862
JW		 2108
2109 psli = &phba->sli;
2110
2111 /* Restart HBA */
2112 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 2113 "0337 Restart HBA Data: x%x x%x\n",
2e0fef85 2114 phba->pport->port_state, psli->sli_flag);
41415862
JW		 2115
2116 word0 = 0;
2117 mb = (MAILBOX_t *) &word0;
2118 mb->mbxCommand = MBX_RESTART;
2119 mb->mbxHc = 1;
2120
9290831f
JS		 2121 lpfc_reset_barrier(phba);
2122
41415862
JW		 2123 to_slim = phba->MBslimaddr;
2124 writel(*(uint32_t *) mb, to_slim);
2125 readl(to_slim); /* flush */
2126
2127 /* Only skip post after fc_ffinit is completed */
2e0fef85 2128 if (phba->pport->port_state) {
41415862
JW		 2129 skip_post = 1;
2130 word0 = 1; /* This is really setting up word1 */
dea3101e 2131 } else {
41415862
JW		 2132 skip_post = 0;
2133 word0 = 0; /* This is really setting up word1 */
dea3101e 2134 }
65a29c16 2135 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW		 2136 writel(*(uint32_t *) mb, to_slim);
2137 readl(to_slim); /* flush */
dea3101e 2138
41415862 2139 lpfc_sli_brdreset(phba);
2e0fef85
JS		 2140 phba->pport->stopped = 0;
2141 phba->link_state = LPFC_INIT_START;
41415862 2142
2e0fef85 2143 spin_unlock_irq(&phba->hbalock);
41415862 2144
64ba8818
JS		 2145 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
2146 psli->stats_start = get_seconds();
2147
41415862
JW		 2148 if (skip_post)
2149 mdelay(100);
2150 else
2151 mdelay(2000);
2152
2153 lpfc_hba_down_post(phba);
dea3101e
JB		 2154
2155 return 0;
2156}
2157
2158static int
2159lpfc_sli_chipset_init(struct lpfc_hba *phba)
2160{
2161 uint32_t status, i = 0;
2162
2163 /* Read the HBA Host Status Register */
2164 status = readl(phba->HSregaddr);
2165
2166 /* Check status register to see what current state is */
2167 i = 0;
2168 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
2169
2170 /* Check every 100ms for 5 retries, then every 500ms for 5, then
2171 * every 2.5 sec for 5, then reset board and every 2.5 sec for
2172 * 4.
2173 */
2174 if (i++ >= 20) {
2175 /* Adapter failed to init, timeout, status reg
2176 <status> */
ed957684 2177 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 2178 "0436 Adapter failed to init, "
2179 "timeout, status reg x%x\n", status);
2e0fef85 2180 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2181 return -ETIMEDOUT;
2182 }
2183
2184 /* Check to see if any errors occurred during init */
2185 if (status & HS_FFERM) {
2186 /* ERROR: During chipset initialization */
2187 /* Adapter failed to init, chipset, status reg
2188 <status> */
ed957684 2189 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 2190 "0437 Adapter failed to init, "
2191 "chipset, status reg x%x\n", status);
2e0fef85 2192 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2193 return -EIO;
2194 }
2195
2196 if (i <= 5) {
2197 msleep(10);
2198 } else if (i <= 10) {
2199 msleep(500);
2200 } else {
2201 msleep(2500);
2202 }
2203
2204 if (i == 15) {
2e0fef85 2205 /* Do post */
92d7f7b0 2206 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2207 lpfc_sli_brdrestart(phba);
dea3101e
JB		 2208 }
2209 /* Read the HBA Host Status Register */
2210 status = readl(phba->HSregaddr);
2211 }
2212
2213 /* Check to see if any errors occurred during init */
2214 if (status & HS_FFERM) {
2215 /* ERROR: During chipset initialization */
2216 /* Adapter failed to init, chipset, status reg <status> */
ed957684 2217 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 2218 "0438 Adapter failed to init, chipset, "
2219 "status reg x%x\n", status);
2e0fef85 2220 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2221 return -EIO;
2222 }
2223
2224 /* Clear all interrupt enable conditions */
2225 writel(0, phba->HCregaddr);
2226 readl(phba->HCregaddr); /* flush */
2227
2228 /* setup host attn register */
2229 writel(0xffffffff, phba->HAregaddr);
2230 readl(phba->HAregaddr); /* flush */
2231 return 0;
2232}
2233
78b2d852 2234int
ed957684
JS		 2235lpfc_sli_hbq_count(void)
2236{
92d7f7b0 2237 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS		 2238}
2239
2240static int
2241lpfc_sli_hbq_entry_count(void)
2242{
2243 int hbq_count = lpfc_sli_hbq_count();
2244 int count = 0;
2245 int i;
2246
2247 for (i = 0; i < hbq_count; ++i)
92d7f7b0 2248 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS		 2249 return count;
2250}
2251
dea3101e 2252int
ed957684
JS		 2253lpfc_sli_hbq_size(void)
2254{
2255 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
2256}
2257
2258static int
2259lpfc_sli_hbq_setup(struct lpfc_hba *phba)
2260{
2261 int hbq_count = lpfc_sli_hbq_count();
2262 LPFC_MBOXQ_t *pmb;
2263 MAILBOX_t *pmbox;
2264 uint32_t hbqno;
2265 uint32_t hbq_entry_index;
ed957684 2266
92d7f7b0
JS		 2267 /* Get a Mailbox buffer to setup mailbox
2268 * commands for HBA initialization
2269 */
ed957684
JS		 2270 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2271
2272 if (!pmb)
2273 return -ENOMEM;
2274
2275 pmbox = &pmb->mb;
2276
2277 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
2278 phba->link_state = LPFC_INIT_MBX_CMDS;
2279
2280 hbq_entry_index = 0;
2281 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2282 phba->hbqs[hbqno].next_hbqPutIdx = 0;
2283 phba->hbqs[hbqno].hbqPutIdx = 0;
2284 phba->hbqs[hbqno].local_hbqGetIdx = 0;
2285 phba->hbqs[hbqno].entry_count =
92d7f7b0 2286 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS		 2287 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
2288 hbq_entry_index, pmb);
ed957684
JS		 2289 hbq_entry_index += phba->hbqs[hbqno].entry_count;
2290
2291 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
2292 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
2293 mbxStatus <status>, ring <num> */
2294
2295 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2296 LOG_SLI | LOG_VPORT,
e8b62011 2297 "1805 Adapter failed to init. "
ed957684 2298 "Data: x%x x%x x%x\n",
e8b62011 2299 pmbox->mbxCommand,
ed957684
JS		 2300 pmbox->mbxStatus, hbqno);
2301
2302 phba->link_state = LPFC_HBA_ERROR;
2303 mempool_free(pmb, phba->mbox_mem_pool);
ed957684
JS		 2304 return ENXIO;
2305 }
2306 }
2307 phba->hbq_count = hbq_count;
2308
ed957684
JS		 2309 mempool_free(pmb, phba->mbox_mem_pool);
2310
92d7f7b0
JS		 2311 /* Initially populate or replenish the HBQs */
2312 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2313 if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
2314 return -ENOMEM;
2315 }
ed957684
JS		 2316 return 0;
2317}
2318
2319static int
2320lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB		 2321{
2322 LPFC_MBOXQ_t *pmb;
2323 uint32_t resetcount = 0, rc = 0, done = 0;
2324
2325 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2326 if (!pmb) {
2e0fef85 2327 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 2328 return -ENOMEM;
2329 }
2330
ed957684 2331 phba->sli_rev = sli_mode;
dea3101e 2332 while (resetcount < 2 && !done) {
2e0fef85 2333 spin_lock_irq(&phba->hbalock);
1c067a42 2334 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2335 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2336 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2337 lpfc_sli_brdrestart(phba);
dea3101e
JB		 2338 msleep(2500);
2339 rc = lpfc_sli_chipset_init(phba);
2340 if (rc)
2341 break;
2342
2e0fef85 2343 spin_lock_irq(&phba->hbalock);
1c067a42 2344 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2345 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 2346 resetcount++;
2347
ed957684
JS		 2348 /* Call pre CONFIG_PORT mailbox command initialization. A
2349 * value of 0 means the call was successful. Any other
2350 * nonzero value is a failure, but if ERESTART is returned,
2351 * the driver may reset the HBA and try again.
2352 */
dea3101e
JB		 2353 rc = lpfc_config_port_prep(phba);
2354 if (rc == -ERESTART) {
ed957684 2355 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e
JB		 2356 continue;
2357 } else if (rc) {
2358 break;
2359 }
2360
2e0fef85 2361 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB		 2362 lpfc_config_port(phba, pmb);
2363 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
ed957684 2364 if (rc != MBX_SUCCESS) {
dea3101e 2365 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2366 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 2367 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
e8b62011 2368 pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
2e0fef85 2369 spin_lock_irq(&phba->hbalock);
dea3101e 2370 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85
JS		 2371 spin_unlock_irq(&phba->hbalock);
2372 rc = -ENXIO;
ed957684
JS		 2373 } else {
2374 done = 1;
92d7f7b0
JS		 2375 phba->max_vpi = (phba->max_vpi &&
2376 pmb->mb.un.varCfgPort.gmv) != 0
2377 ? pmb->mb.un.varCfgPort.max_vpi
2378 : 0;
dea3101e
JB		 2379 }
2380 }
ed957684
JS		 2381
2382 if (!done) {
2383 rc = -EINVAL;
2384 goto do_prep_failed;
2385 }
2386
2387 if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
92d7f7b0 2388 (!pmb->mb.un.varCfgPort.cMA)) {
ed957684
JS		 2389 rc = -ENXIO;
2390 goto do_prep_failed;
2391 }
2392 return rc;
2393
92d7f7b0 2394do_prep_failed:
ed957684
JS		 2395 mempool_free(pmb, phba->mbox_mem_pool);
2396 return rc;
2397}
2398
2399int
2400lpfc_sli_hba_setup(struct lpfc_hba *phba)
2401{
2402 uint32_t rc;
92d7f7b0 2403 int mode = 3;
ed957684
JS		 2404
2405 switch (lpfc_sli_mode) {
2406 case 2:
78b2d852 2407 if (phba->cfg_enable_npiv) {
92d7f7b0 2408 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011 2409 "1824 NPIV enabled: Override lpfc_sli_mode "
92d7f7b0 2410 "parameter (%d) to auto (0).\n",
e8b62011 2411 lpfc_sli_mode);
92d7f7b0
JS		 2412 break;
2413 }
ed957684
JS		 2414 mode = 2;
2415 break;
2416 case 0:
2417 case 3:
2418 break;
2419 default:
92d7f7b0 2420 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2421 "1819 Unrecognized lpfc_sli_mode "
2422 "parameter: %d.\n", lpfc_sli_mode);
ed957684
JS		 2423
2424 break;
2425 }
2426
2427 rc = lpfc_do_config_port(phba, mode);
2428 if (rc && lpfc_sli_mode == 3)
92d7f7b0 2429 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2430 "1820 Unable to select SLI-3. "
2431 "Not supported by adapter.\n");
ed957684
JS		 2432 if (rc && mode != 2)
2433 rc = lpfc_do_config_port(phba, 2);
2434 if (rc)
dea3101e
JB		 2435 goto lpfc_sli_hba_setup_error;
2436
ed957684
JS		 2437 if (phba->sli_rev == 3) {
2438 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
2439 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
2440 phba->sli3_options |= LPFC_SLI3_ENABLED;
2441 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
2442
2443 } else {
2444 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
2445 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 2446 phba->sli3_options = 0;
ed957684
JS		 2447 }
2448
2449 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 2450 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
2451 phba->sli_rev, phba->max_vpi);
ed957684 2452 rc = lpfc_sli_ring_map(phba);
dea3101e
JB		 2453
2454 if (rc)
2455 goto lpfc_sli_hba_setup_error;
2456
92d7f7b0 2457 /* Init HBQs */
ed957684
JS		 2458
2459 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
2460 rc = lpfc_sli_hbq_setup(phba);
2461 if (rc)
2462 goto lpfc_sli_hba_setup_error;
2463 }
2464
dea3101e
JB		 2465 phba->sli.sli_flag |= LPFC_PROCESS_LA;
2466
2467 rc = lpfc_config_port_post(phba);
2468 if (rc)
2469 goto lpfc_sli_hba_setup_error;
2470
ed957684
JS		 2471 return rc;
2472
92d7f7b0 2473lpfc_sli_hba_setup_error:
2e0fef85 2474 phba->link_state = LPFC_HBA_ERROR;
ed957684 2475 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2476 "0445 Firmware initialization failed\n");
dea3101e
JB		 2477 return rc;
2478}
2479
dea3101e
JB		 2480/*! lpfc_mbox_timeout
2481 *
2482 * \pre
2483 * \post
2484 * \param hba Pointer to per struct lpfc_hba structure
2485 * \param l1 Pointer to the driver's mailbox queue.
2486 * \return
2487 * void
2488 *
2489 * \b Description:
2490 *
2491 * This routine handles mailbox timeout events at timer interrupt context.
2492 */
2493void
2494lpfc_mbox_timeout(unsigned long ptr)
2495{
92d7f7b0 2496 struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
dea3101e 2497 unsigned long iflag;
2e0fef85 2498 uint32_t tmo_posted;
dea3101e 2499
2e0fef85 2500 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
92d7f7b0 2501 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
2e0fef85
JS		 2502 if (!tmo_posted)
2503 phba->pport->work_port_events |= WORKER_MBOX_TMO;
2504 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
2505
2506 if (!tmo_posted) {
92d7f7b0 2507 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 2508 if (phba->work_wait)
92d7f7b0
JS		 2509 lpfc_worker_wake_up(phba);
2510 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 2511 }
dea3101e
JB		 2512}
2513
2514void
2515lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
2516{
2e0fef85
JS		 2517 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
2518 MAILBOX_t *mb = &pmbox->mb;
1dcb58e5
JS		 2519 struct lpfc_sli *psli = &phba->sli;
2520 struct lpfc_sli_ring *pring;
dea3101e 2521
2e0fef85 2522 if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
dea3101e
JB		 2523 return;
2524 }
2525
dea3101e 2526 /* Mbox cmd <mbxCommand> timeout */
ed957684 2527 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2528 "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
92d7f7b0
JS		 2529 mb->mbxCommand,
2530 phba->pport->port_state,
2531 phba->sli.sli_flag,
2532 phba->sli.mbox_active);
dea3101e 2533
1dcb58e5
JS		 2534 /* Setting state unknown so lpfc_sli_abort_iocb_ring
2535 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
2536 * it to fail all oustanding SCSI IO.
2537 */
2e0fef85
JS		 2538 spin_lock_irq(&phba->pport->work_port_lock);
2539 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
2540 spin_unlock_irq(&phba->pport->work_port_lock);
2541 spin_lock_irq(&phba->hbalock);
2542 phba->link_state = LPFC_LINK_UNKNOWN;
2543 phba->pport->fc_flag |= FC_ESTABLISH_LINK;
1dcb58e5 2544 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85 2545 spin_unlock_irq(&phba->hbalock);
1dcb58e5
JS		 2546
2547 pring = &psli->ring[psli->fcp_ring];
2548 lpfc_sli_abort_iocb_ring(phba, pring);
2549
2550 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
76bb24ef 2551 "0345 Resetting board due to mailbox timeout\n");
1dcb58e5
JS		 2552 /*
2553 * lpfc_offline calls lpfc_sli_hba_down which will clean up
2554 * on oustanding mailbox commands.
2555 */
2556 lpfc_offline_prep(phba);
2557 lpfc_offline(phba);
2558 lpfc_sli_brdrestart(phba);
2559 if (lpfc_online(phba) == 0) /* Initialize the HBA */
2560 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
2561 lpfc_unblock_mgmt_io(phba);
dea3101e
JB		 2562 return;
2563}
2564
2565int
2e0fef85 2566lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
dea3101e 2567{
dea3101e 2568 MAILBOX_t *mb;
2e0fef85 2569 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB		 2570 uint32_t status, evtctr;
2571 uint32_t ha_copy;
2572 int i;
2573 unsigned long drvr_flag = 0;
2574 volatile uint32_t word0, ldata;
2575 void __iomem *to_slim;
2576
ed957684 2577 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 2578 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684
JS		 2579 if(!pmbox->vport) {
2580 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2581 LOG_MBOX | LOG_VPORT,
e8b62011 2582 "1806 Mbox x%x failed. No vport\n",
ed957684
JS		 2583 pmbox->mb.mbxCommand);
2584 dump_stack();
2585 return MBXERR_ERROR;
2586 }
2587 }
2588
92d7f7b0 2589
8d63f375
LV		 2590 /* If the PCI channel is in offline state, do not post mbox. */
2591 if (unlikely(pci_channel_offline(phba->pcidev)))
2592 return MBX_NOT_FINISHED;
2593
2e0fef85 2594 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e 2595 psli = &phba->sli;
92d7f7b0
JS		 2596
2597
dea3101e
JB		 2598 mb = &pmbox->mb;
2599 status = MBX_SUCCESS;
2600
2e0fef85
JS		 2601 if (phba->link_state == LPFC_HBA_ERROR) {
2602 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW		 2603
2604 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2605 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
2e0fef85 2606 return MBX_NOT_FINISHED;
41415862
JW		 2607 }
2608
9290831f
JS		 2609 if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
2610 !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
2e0fef85 2611 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
92d7f7b0 2612 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
2e0fef85 2613 return MBX_NOT_FINISHED;
9290831f
JS		 2614 }
2615
dea3101e
JB		 2616 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
2617 /* Polling for a mbox command when another one is already active
2618 * is not allowed in SLI. Also, the driver must have established
2619 * SLI2 mode to queue and process multiple mbox commands.
2620 */
2621
2622 if (flag & MBX_POLL) {
2e0fef85 2623 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB		 2624
2625 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2626 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2627 return MBX_NOT_FINISHED;
dea3101e
JB		 2628 }
2629
2630 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
2e0fef85 2631 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2632 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2633 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2634 return MBX_NOT_FINISHED;
dea3101e
JB		 2635 }
2636
dea3101e
JB		 2637 /* Another mailbox command is still being processed, queue this
2638 * command to be processed later.
2639 */
2640 lpfc_mbox_put(phba, pmbox);
2641
2642 /* Mbox cmd issue - BUSY */
ed957684 2643 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2644 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 2645 "x%x x%x x%x x%x\n",
92d7f7b0
JS		 2646 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
2647 mb->mbxCommand, phba->pport->port_state,
2648 psli->sli_flag, flag);
dea3101e
JB		 2649
2650 psli->slistat.mbox_busy++;
2e0fef85 2651 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2652
858c9f6c
JS		 2653 if (pmbox->vport) {
2654 lpfc_debugfs_disc_trc(pmbox->vport,
2655 LPFC_DISC_TRC_MBOX_VPORT,
2656 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
2657 (uint32_t)mb->mbxCommand,
2658 mb->un.varWords[0], mb->un.varWords[1]);
2659 }
2660 else {
2661 lpfc_debugfs_disc_trc(phba->pport,
2662 LPFC_DISC_TRC_MBOX,
2663 "MBOX Bsy: cmd:x%x mb:x%x x%x",
2664 (uint32_t)mb->mbxCommand,
2665 mb->un.varWords[0], mb->un.varWords[1]);
2666 }
2667
2e0fef85 2668 return MBX_BUSY;
dea3101e
JB		 2669 }
2670
dea3101e
JB		 2671 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2672
2673 /* If we are not polling, we MUST be in SLI2 mode */
2674 if (flag != MBX_POLL) {
41415862
JW		 2675 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
2676 (mb->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 2677 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2678 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2679 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2680 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2681 return MBX_NOT_FINISHED;
dea3101e
JB		 2682 }
2683 /* timeout active mbox command */
a309a6b6
JS		 2684 mod_timer(&psli->mbox_tmo, (jiffies +
2685 (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
dea3101e
JB		 2686 }
2687
2688 /* Mailbox cmd <cmd> issue */
ed957684 2689 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2690 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 2691 "x%x\n",
e8b62011 2692 pmbox->vport ? pmbox->vport->vpi : 0,
92d7f7b0
JS		 2693 mb->mbxCommand, phba->pport->port_state,
2694 psli->sli_flag, flag);
dea3101e 2695
858c9f6c
JS		 2696 if (mb->mbxCommand != MBX_HEARTBEAT) {
2697 if (pmbox->vport) {
2698 lpfc_debugfs_disc_trc(pmbox->vport,
2699 LPFC_DISC_TRC_MBOX_VPORT,
2700 "MBOX Send vport: cmd:x%x mb:x%x x%x",
2701 (uint32_t)mb->mbxCommand,
2702 mb->un.varWords[0], mb->un.varWords[1]);
2703 }
2704 else {
2705 lpfc_debugfs_disc_trc(phba->pport,
2706 LPFC_DISC_TRC_MBOX,
2707 "MBOX Send: cmd:x%x mb:x%x x%x",
2708 (uint32_t)mb->mbxCommand,
2709 mb->un.varWords[0], mb->un.varWords[1]);
2710 }
2711 }
2712
dea3101e
JB		 2713 psli->slistat.mbox_cmd++;
2714 evtctr = psli->slistat.mbox_event;
2715
2716 /* next set own bit for the adapter and copy over command word */
2717 mb->mbxOwner = OWN_CHIP;
2718
2719 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2720 /* First copy command data to host SLIM area */
4cc2da1d 2721 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
dea3101e 2722 } else {
9290831f 2723 if (mb->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 2724 /* copy command data into host mbox for cmpl */
4cc2da1d 2725 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
92d7f7b0 2726 MAILBOX_CMD_SIZE);
dea3101e
JB		 2727 }
2728
2729 /* First copy mbox command data to HBA SLIM, skip past first
2730 word */
2731 to_slim = phba->MBslimaddr + sizeof (uint32_t);
2732 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
2733 MAILBOX_CMD_SIZE - sizeof (uint32_t));
2734
2735 /* Next copy over first word, with mbxOwner set */
2736 ldata = *((volatile uint32_t *)mb);
2737 to_slim = phba->MBslimaddr;
2738 writel(ldata, to_slim);
2739 readl(to_slim); /* flush */
2740
2741 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2742 /* switch over to host mailbox */
2743 psli->sli_flag |= LPFC_SLI2_ACTIVE;
2744 }
2745 }
2746
2747 wmb();
2748 /* interrupt board to doit right away */
2749 writel(CA_MBATT, phba->CAregaddr);
2750 readl(phba->CAregaddr); /* flush */
2751
2752 switch (flag) {
2753 case MBX_NOWAIT:
2754 /* Don't wait for it to finish, just return */
2755 psli->mbox_active = pmbox;
2756 break;
2757
2758 case MBX_POLL:
dea3101e
JB		 2759 psli->mbox_active = NULL;
2760 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2761 /* First read mbox status word */
4cc2da1d 2762 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
dea3101e
JB		 2763 word0 = le32_to_cpu(word0);
2764 } else {
2765 /* First read mbox status word */
2766 word0 = readl(phba->MBslimaddr);
2767 }
2768
2769 /* Read the HBA Host Attention Register */
2770 ha_copy = readl(phba->HAregaddr);
2771
a309a6b6
JS		 2772 i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
2773 i *= 1000; /* Convert to ms */
2774
dea3101e 2775 /* Wait for command to complete */
41415862
JW		 2776 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
2777 (!(ha_copy & HA_MBATT) &&
2e0fef85 2778 (phba->link_state > LPFC_WARM_START))) {
a309a6b6 2779 if (i-- <= 0) {
dea3101e 2780 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2781 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 2782 drvr_flag);
2e0fef85 2783 return MBX_NOT_FINISHED;
dea3101e
JB		 2784 }
2785
2786 /* Check if we took a mbox interrupt while we were
2787 polling */
2788 if (((word0 & OWN_CHIP) != OWN_CHIP)
2789 && (evtctr != psli->slistat.mbox_event))
2790 break;
2791
2e0fef85 2792 spin_unlock_irqrestore(&phba->hbalock,
dea3101e
JB		 2793 drvr_flag);
2794
1dcb58e5 2795 msleep(1);
dea3101e 2796
2e0fef85 2797 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e
JB		 2798
2799 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2800 /* First copy command data */
4cc2da1d
JSEC		 2801 word0 = *((volatile uint32_t *)
2802 &phba->slim2p->mbx);
dea3101e
JB		 2803 word0 = le32_to_cpu(word0);
2804 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2805 MAILBOX_t *slimmb;
2806 volatile uint32_t slimword0;
2807 /* Check real SLIM for any errors */
2808 slimword0 = readl(phba->MBslimaddr);
2809 slimmb = (MAILBOX_t *) & slimword0;
2810 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
2811 && slimmb->mbxStatus) {
2812 psli->sli_flag &=
2813 ~LPFC_SLI2_ACTIVE;
2814 word0 = slimword0;
2815 }
2816 }
2817 } else {
2818 /* First copy command data */
2819 word0 = readl(phba->MBslimaddr);
2820 }
2821 /* Read the HBA Host Attention Register */
2822 ha_copy = readl(phba->HAregaddr);
2823 }
2824
2825 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2826 /* copy results back to user */
4cc2da1d 2827 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
92d7f7b0 2828 MAILBOX_CMD_SIZE);
dea3101e
JB		 2829 } else {
2830 /* First copy command data */
2831 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
2832 MAILBOX_CMD_SIZE);
2833 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
2834 pmbox->context2) {
92d7f7b0 2835 lpfc_memcpy_from_slim((void *)pmbox->context2,
dea3101e
JB		 2836 phba->MBslimaddr + DMP_RSP_OFFSET,
2837 mb->un.varDmp.word_cnt);
2838 }
2839 }
2840
2841 writel(HA_MBATT, phba->HAregaddr);
2842 readl(phba->HAregaddr); /* flush */
2843
2844 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2845 status = mb->mbxStatus;
2846 }
2847
2e0fef85
JS		 2848 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
2849 return status;
dea3101e
JB		 2850}
2851
92d7f7b0
JS		 2852/*
2853 * Caller needs to hold lock.
2854 */
858c9f6c 2855static void
92d7f7b0 2856__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2857 struct lpfc_iocbq *piocb)
dea3101e
JB		 2858{
2859 /* Insert the caller's iocb in the txq tail for later processing. */
2860 list_add_tail(&piocb->list, &pring->txq);
2861 pring->txq_cnt++;
dea3101e
JB		 2862}
2863
2864static struct lpfc_iocbq *
2865lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2866 struct lpfc_iocbq **piocb)
dea3101e
JB		 2867{
2868 struct lpfc_iocbq * nextiocb;
2869
2870 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2871 if (!nextiocb) {
2872 nextiocb = *piocb;
2873 *piocb = NULL;
2874 }
2875
2876 return nextiocb;
2877}
2878
92d7f7b0
JS		 2879/*
2880 * Lockless version of lpfc_sli_issue_iocb.
2881 */
98c9ea5c 2882static int
92d7f7b0 2883__lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB		 2884 struct lpfc_iocbq *piocb, uint32_t flag)
2885{
2886 struct lpfc_iocbq *nextiocb;
2887 IOCB_t *iocb;
2888
92d7f7b0
JS		 2889 if (piocb->iocb_cmpl && (!piocb->vport) &&
2890 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2891 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
2892 lpfc_printf_log(phba, KERN_ERR,
2893 LOG_SLI | LOG_VPORT,
e8b62011 2894 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS		 2895 piocb->iocb.ulpCommand);
2896 dump_stack();
2897 return IOCB_ERROR;
2898 }
2899
2900
8d63f375
LV		 2901 /* If the PCI channel is in offline state, do not post iocbs. */
2902 if (unlikely(pci_channel_offline(phba->pcidev)))
2903 return IOCB_ERROR;
2904
dea3101e
JB		 2905 /*
2906 * We should never get an IOCB if we are in a < LINK_DOWN state
2907 */
2e0fef85 2908 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB		 2909 return IOCB_ERROR;
2910
2911 /*
2912 * Check to see if we are blocking IOCB processing because of a
0b727fea 2913 * outstanding event.
dea3101e 2914 */
0b727fea 2915 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e
JB		 2916 goto iocb_busy;
2917
2e0fef85 2918 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 2919 /*
2680eeaa 2920 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB		 2921 * can be issued if the link is not up.
2922 */
2923 switch (piocb->iocb.ulpCommand) {
2924 case CMD_QUE_RING_BUF_CN:
2925 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB		 2926 /*
2927 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
2928 * completion, iocb_cmpl MUST be 0.
2929 */
2930 if (piocb->iocb_cmpl)
2931 piocb->iocb_cmpl = NULL;
2932 /*FALLTHROUGH*/
2933 case CMD_CREATE_XRI_CR:
2680eeaa
JS		 2934 case CMD_CLOSE_XRI_CN:
2935 case CMD_CLOSE_XRI_CX:
dea3101e
JB		 2936 break;
2937 default:
2938 goto iocb_busy;
2939 }
2940
2941 /*
2942 * For FCP commands, we must be in a state where we can process link
2943 * attention events.
2944 */
2945 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
92d7f7b0 2946 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 2947 goto iocb_busy;
92d7f7b0 2948 }
dea3101e 2949
dea3101e
JB		 2950 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
2951 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
2952 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
2953
2954 if (iocb)
2955 lpfc_sli_update_ring(phba, pring);
2956 else
2957 lpfc_sli_update_full_ring(phba, pring);
2958
2959 if (!piocb)
2960 return IOCB_SUCCESS;
2961
2962 goto out_busy;
2963
2964 iocb_busy:
2965 pring->stats.iocb_cmd_delay++;
2966
2967 out_busy:
2968
2969 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 2970 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB		 2971 return IOCB_SUCCESS;
2972 }
2973
2974 return IOCB_BUSY;
2975}
2976
92d7f7b0
JS		 2977
2978int
2979lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2980 struct lpfc_iocbq *piocb, uint32_t flag)
2981{
2982 unsigned long iflags;
2983 int rc;
2984
2985 spin_lock_irqsave(&phba->hbalock, iflags);
2986 rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
2987 spin_unlock_irqrestore(&phba->hbalock, iflags);
2988
2989 return rc;
2990}
2991
cf5bf97e
JW		 2992static int
2993lpfc_extra_ring_setup( struct lpfc_hba *phba)
2994{
2995 struct lpfc_sli *psli;
2996 struct lpfc_sli_ring *pring;
2997
2998 psli = &phba->sli;
2999
3000 /* Adjust cmd/rsp ring iocb entries more evenly */
a4bc3379
JS		 3001
3002 /* Take some away from the FCP ring */
cf5bf97e
JW		 3003 pring = &psli->ring[psli->fcp_ring];
3004 pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3005 pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3006 pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3007 pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
3008
a4bc3379
JS		 3009 /* and give them to the extra ring */
3010 pring = &psli->ring[psli->extra_ring];
3011
cf5bf97e
JW		 3012 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3013 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3014 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3015 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
3016
3017 /* Setup default profile for this ring */
3018 pring->iotag_max = 4096;
3019 pring->num_mask = 1;
3020 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS		 3021 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
3022 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW		 3023 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
3024 return 0;
3025}
3026
98c9ea5c 3027static void
57127f15
JS		 3028lpfc_sli_async_event_handler(struct lpfc_hba * phba,
3029 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
3030{
3031 IOCB_t *icmd;
3032 uint16_t evt_code;
3033 uint16_t temp;
3034 struct temp_event temp_event_data;
3035 struct Scsi_Host *shost;
3036
3037 icmd = &iocbq->iocb;
3038 evt_code = icmd->un.asyncstat.evt_code;
3039 temp = icmd->ulpContext;
3040
3041 if ((evt_code != ASYNC_TEMP_WARN) &&
3042 (evt_code != ASYNC_TEMP_SAFE)) {
3043 lpfc_printf_log(phba,
3044 KERN_ERR,
3045 LOG_SLI,
76bb24ef 3046 "0346 Ring %d handler: unexpected ASYNC_STATUS"
57127f15
JS		 3047 " evt_code 0x%x\n",
3048 pring->ringno,
3049 icmd->un.asyncstat.evt_code);
3050 return;
3051 }
3052 temp_event_data.data = (uint32_t)temp;
3053 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
3054 if (evt_code == ASYNC_TEMP_WARN) {
3055 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
3056 lpfc_printf_log(phba,
3057 KERN_WARNING,
3058 LOG_TEMP,
76bb24ef 3059 "0347 Adapter is very hot, please take "
57127f15
JS		 3060 "corrective action. temperature : %d Celsius\n",
3061 temp);
3062 }
3063 if (evt_code == ASYNC_TEMP_SAFE) {
3064 temp_event_data.event_code = LPFC_NORMAL_TEMP;
3065 lpfc_printf_log(phba,
3066 KERN_INFO,
3067 LOG_TEMP,
3068 "0340 Adapter temperature is OK now. "
3069 "temperature : %d Celsius\n",
3070 temp);
3071 }
3072
3073 /* Send temperature change event to applications */
3074 shost = lpfc_shost_from_vport(phba->pport);
3075 fc_host_post_vendor_event(shost, fc_get_event_number(),
3076 sizeof(temp_event_data), (char *) &temp_event_data,
3077 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
3078
3079}
3080
3081
dea3101e
JB		 3082int
3083lpfc_sli_setup(struct lpfc_hba *phba)
3084{
ed957684 3085 int i, totiocbsize = 0;
dea3101e
JB		 3086 struct lpfc_sli *psli = &phba->sli;
3087 struct lpfc_sli_ring *pring;
3088
3089 psli->num_rings = MAX_CONFIGURED_RINGS;
3090 psli->sli_flag = 0;
3091 psli->fcp_ring = LPFC_FCP_RING;
3092 psli->next_ring = LPFC_FCP_NEXT_RING;
a4bc3379 3093 psli->extra_ring = LPFC_EXTRA_RING;
dea3101e 3094
604a3e30
JB		 3095 psli->iocbq_lookup = NULL;
3096 psli->iocbq_lookup_len = 0;
3097 psli->last_iotag = 0;
3098
dea3101e
JB		 3099 for (i = 0; i < psli->num_rings; i++) {
3100 pring = &psli->ring[i];
3101 switch (i) {
3102 case LPFC_FCP_RING: /* ring 0 - FCP */
3103 /* numCiocb and numRiocb are used in config_port */
3104 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
3105 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
3106 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3107 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3108 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3109 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
ed957684 3110 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3111 SLI3_IOCB_CMD_SIZE :
3112 SLI2_IOCB_CMD_SIZE;
ed957684 3113 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3114 SLI3_IOCB_RSP_SIZE :
3115 SLI2_IOCB_RSP_SIZE;
dea3101e
JB		 3116 pring->iotag_ctr = 0;
3117 pring->iotag_max =
92d7f7b0 3118 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB		 3119 pring->fast_iotag = pring->iotag_max;
3120 pring->num_mask = 0;
3121 break;
a4bc3379 3122 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e
JB		 3123 /* numCiocb and numRiocb are used in config_port */
3124 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
3125 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
ed957684 3126 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3127 SLI3_IOCB_CMD_SIZE :
3128 SLI2_IOCB_CMD_SIZE;
ed957684 3129 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3130 SLI3_IOCB_RSP_SIZE :
3131 SLI2_IOCB_RSP_SIZE;
2e0fef85 3132 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB		 3133 pring->num_mask = 0;
3134 break;
3135 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
3136 /* numCiocb and numRiocb are used in config_port */
3137 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
3138 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
ed957684 3139 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3140 SLI3_IOCB_CMD_SIZE :
3141 SLI2_IOCB_CMD_SIZE;
ed957684 3142 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3143 SLI3_IOCB_RSP_SIZE :
3144 SLI2_IOCB_RSP_SIZE;
dea3101e
JB		 3145 pring->fast_iotag = 0;
3146 pring->iotag_ctr = 0;
3147 pring->iotag_max = 4096;
57127f15
JS		 3148 pring->lpfc_sli_rcv_async_status =
3149 lpfc_sli_async_event_handler;
dea3101e
JB		 3150 pring->num_mask = 4;
3151 pring->prt[0].profile = 0; /* Mask 0 */
3152 pring->prt[0].rctl = FC_ELS_REQ;
3153 pring->prt[0].type = FC_ELS_DATA;
3154 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 3155 lpfc_els_unsol_event;
dea3101e
JB		 3156 pring->prt[1].profile = 0; /* Mask 1 */
3157 pring->prt[1].rctl = FC_ELS_RSP;
3158 pring->prt[1].type = FC_ELS_DATA;
3159 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 3160 lpfc_els_unsol_event;
dea3101e
JB		 3161 pring->prt[2].profile = 0; /* Mask 2 */
3162 /* NameServer Inquiry */
3163 pring->prt[2].rctl = FC_UNSOL_CTL;
3164 /* NameServer */
3165 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
3166 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 3167 lpfc_ct_unsol_event;
dea3101e
JB		 3168 pring->prt[3].profile = 0; /* Mask 3 */
3169 /* NameServer response */
3170 pring->prt[3].rctl = FC_SOL_CTL;
3171 /* NameServer */
3172 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
3173 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 3174 lpfc_ct_unsol_event;
dea3101e
JB		 3175 break;
3176 }
ed957684 3177 totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
92d7f7b0 3178 (pring->numRiocb * pring->sizeRiocb);
dea3101e 3179 }
ed957684 3180 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 3181 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS		 3182 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
3183 "SLI2 SLIM Data: x%x x%lx\n",
3184 phba->brd_no, totiocbsize,
3185 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 3186 }
cf5bf97e
JW		 3187 if (phba->cfg_multi_ring_support == 2)
3188 lpfc_extra_ring_setup(phba);
dea3101e
JB		 3189
3190 return 0;
3191}
3192
3193int
2e0fef85 3194lpfc_sli_queue_setup(struct lpfc_hba *phba)
dea3101e
JB		 3195{
3196 struct lpfc_sli *psli;
3197 struct lpfc_sli_ring *pring;
604a3e30 3198 int i;
dea3101e
JB		 3199
3200 psli = &phba->sli;
2e0fef85 3201 spin_lock_irq(&phba->hbalock);
dea3101e 3202 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 3203 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB		 3204 /* Initialize list headers for txq and txcmplq as double linked lists */
3205 for (i = 0; i < psli->num_rings; i++) {
3206 pring = &psli->ring[i];
3207 pring->ringno = i;
3208 pring->next_cmdidx = 0;
3209 pring->local_getidx = 0;
3210 pring->cmdidx = 0;
3211 INIT_LIST_HEAD(&pring->txq);
3212 INIT_LIST_HEAD(&pring->txcmplq);
3213 INIT_LIST_HEAD(&pring->iocb_continueq);
3214 INIT_LIST_HEAD(&pring->postbufq);
dea3101e 3215 }
2e0fef85
JS		 3216 spin_unlock_irq(&phba->hbalock);
3217 return 1;
dea3101e
JB		 3218}
3219
92d7f7b0
JS		 3220int
3221lpfc_sli_host_down(struct lpfc_vport *vport)
3222{
858c9f6c 3223 LIST_HEAD(completions);
92d7f7b0
JS		 3224 struct lpfc_hba *phba = vport->phba;
3225 struct lpfc_sli *psli = &phba->sli;
3226 struct lpfc_sli_ring *pring;
3227 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS		 3228 int i;
3229 unsigned long flags = 0;
3230 uint16_t prev_pring_flag;
3231
3232 lpfc_cleanup_discovery_resources(vport);
3233
3234 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0
JS		 3235 for (i = 0; i < psli->num_rings; i++) {
3236 pring = &psli->ring[i];
3237 prev_pring_flag = pring->flag;
858c9f6c
JS		 3238 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3239 pring->flag |= LPFC_DEFERRED_RING_EVENT;
92d7f7b0
JS		 3240 /*
3241 * Error everything on the txq since these iocbs have not been
3242 * given to the FW yet.
3243 */
92d7f7b0
JS		 3244 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
3245 if (iocb->vport != vport)
3246 continue;
858c9f6c 3247 list_move_tail(&iocb->list, &completions);
92d7f7b0 3248 pring->txq_cnt--;
92d7f7b0
JS		 3249 }
3250
3251 /* Next issue ABTS for everything on the txcmplq */
3252 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
3253 list) {
3254 if (iocb->vport != vport)
3255 continue;
3256 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3257 }
3258
3259 pring->flag = prev_pring_flag;
3260 }
3261
3262 spin_unlock_irqrestore(&phba->hbalock, flags);
3263
858c9f6c
JS		 3264 while (!list_empty(&completions)) {
3265 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
3266
3267 if (!iocb->iocb_cmpl)
3268 lpfc_sli_release_iocbq(phba, iocb);
3269 else {
3270 iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3271 iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
3272 (iocb->iocb_cmpl) (phba, iocb, iocb);
3273 }
3274 }
92d7f7b0
JS		 3275 return 1;
3276}
3277
dea3101e 3278int
2e0fef85 3279lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 3280{
2534ba75 3281 LIST_HEAD(completions);
2e0fef85 3282 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB		 3283 struct lpfc_sli_ring *pring;
3284 LPFC_MBOXQ_t *pmb;
2534ba75
JS		 3285 struct lpfc_iocbq *iocb;
3286 IOCB_t *cmd = NULL;
dea3101e
JB		 3287 int i;
3288 unsigned long flags = 0;
3289
dea3101e
JB		 3290 lpfc_hba_down_prep(phba);
3291
92d7f7b0
JS		 3292 lpfc_fabric_abort_hba(phba);
3293
2e0fef85 3294 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e
JB		 3295 for (i = 0; i < psli->num_rings; i++) {
3296 pring = &psli->ring[i];
858c9f6c
JS		 3297 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3298 pring->flag |= LPFC_DEFERRED_RING_EVENT;
dea3101e
JB		 3299
3300 /*
3301 * Error everything on the txq since these iocbs have not been
3302 * given to the FW yet.
3303 */
2534ba75 3304 list_splice_init(&pring->txq, &completions);
dea3101e
JB		 3305 pring->txq_cnt = 0;
3306
2534ba75 3307 }
2e0fef85 3308 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 3309
2534ba75 3310 while (!list_empty(&completions)) {
92d7f7b0 3311 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
2534ba75 3312 cmd = &iocb->iocb;
dea3101e 3313
2e0fef85
JS		 3314 if (!iocb->iocb_cmpl)
3315 lpfc_sli_release_iocbq(phba, iocb);
3316 else {
2534ba75
JS		 3317 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
3318 cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
3319 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 3320 }
dea3101e
JB		 3321 }
3322
dea3101e
JB		 3323 /* Return any active mbox cmds */
3324 del_timer_sync(&psli->mbox_tmo);
92d7f7b0 3325 spin_lock_irqsave(&phba->hbalock, flags);
2e0fef85 3326
92d7f7b0 3327 spin_lock(&phba->pport->work_port_lock);
2e0fef85 3328 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
92d7f7b0 3329 spin_unlock(&phba->pport->work_port_lock);
2e0fef85 3330
92d7f7b0
JS		 3331 if (psli->mbox_active) {
3332 list_add_tail(&psli->mbox_active->list, &completions);
2e0fef85 3333 psli->mbox_active = NULL;
2e0fef85 3334 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
dea3101e 3335 }
dea3101e 3336
92d7f7b0
JS		 3337 /* Return any pending or completed mbox cmds */
3338 list_splice_init(&phba->sli.mboxq, &completions);
3339 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
3340 INIT_LIST_HEAD(&psli->mboxq);
3341 INIT_LIST_HEAD(&psli->mboxq_cmpl);
3342
3343 spin_unlock_irqrestore(&phba->hbalock, flags);
3344
3345 while (!list_empty(&completions)) {
3346 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
dea3101e
JB		 3347 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
3348 if (pmb->mbox_cmpl) {
dea3101e 3349 pmb->mbox_cmpl(phba,pmb);
dea3101e
JB		 3350 }
3351 }
dea3101e
JB		 3352 return 1;
3353}
3354
3355void
3356lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
3357{
3358 uint32_t *src = srcp;
3359 uint32_t *dest = destp;
3360 uint32_t ldata;
3361 int i;
3362
3363 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
3364 ldata = *src;
3365 ldata = le32_to_cpu(ldata);
3366 *dest = ldata;
3367 src++;
3368 dest++;
3369 }
3370}
3371
3372int
2e0fef85
JS		 3373lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3374 struct lpfc_dmabuf *mp)
dea3101e
JB		 3375{
3376 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
3377 later */
2e0fef85 3378 spin_lock_irq(&phba->hbalock);
dea3101e 3379 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 3380 pring->postbufq_cnt++;
2e0fef85 3381 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 3382 return 0;
3383}
3384
76bb24ef
JS		 3385uint32_t
3386lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
3387{
3388 spin_lock_irq(&phba->hbalock);
3389 phba->buffer_tag_count++;
3390 /*
3391 * Always set the QUE_BUFTAG_BIT to distiguish between
3392 * a tag assigned by HBQ.
3393 */
3394 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
3395 spin_unlock_irq(&phba->hbalock);
3396 return phba->buffer_tag_count;
3397}
3398
3399struct lpfc_dmabuf *
3400lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3401 uint32_t tag)
3402{
3403 struct lpfc_dmabuf *mp, *next_mp;
3404 struct list_head *slp = &pring->postbufq;
3405
3406 /* Search postbufq, from the begining, looking for a match on tag */
3407 spin_lock_irq(&phba->hbalock);
3408 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
3409 if (mp->buffer_tag == tag) {
3410 list_del_init(&mp->list);
3411 pring->postbufq_cnt--;
3412 spin_unlock_irq(&phba->hbalock);
3413 return mp;
3414 }
3415 }
3416
3417 spin_unlock_irq(&phba->hbalock);
3418 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3419 "0410 Cannot find virtual addr for buffer tag on "
3420 "ring %d Data x%lx x%p x%p x%x\n",
3421 pring->ringno, (unsigned long) tag,
3422 slp->next, slp->prev, pring->postbufq_cnt);
3423
3424 return NULL;
3425}
dea3101e
JB		 3426
3427struct lpfc_dmabuf *
3428lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3429 dma_addr_t phys)
3430{
3431 struct lpfc_dmabuf *mp, *next_mp;
3432 struct list_head *slp = &pring->postbufq;
3433
3434 /* Search postbufq, from the begining, looking for a match on phys */
2e0fef85 3435 spin_lock_irq(&phba->hbalock);
dea3101e
JB		 3436 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
3437 if (mp->phys == phys) {
3438 list_del_init(&mp->list);
3439 pring->postbufq_cnt--;
2e0fef85 3440 spin_unlock_irq(&phba->hbalock);
dea3101e
JB		 3441 return mp;
3442 }
3443 }
3444
2e0fef85 3445 spin_unlock_irq(&phba->hbalock);
dea3101e 3446 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 3447 "0410 Cannot find virtual addr for mapped buf on "
dea3101e 3448 "ring %d Data x%llx x%p x%p x%x\n",
e8b62011 3449 pring->ringno, (unsigned long long)phys,
dea3101e
JB		 3450 slp->next, slp->prev, pring->postbufq_cnt);
3451 return NULL;
3452}
3453
3454static void
2e0fef85
JS		 3455lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3456 struct lpfc_iocbq *rspiocb)
dea3101e 3457{
2e0fef85 3458 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 3459 uint16_t abort_iotag, abort_context;
92d7f7b0 3460 struct lpfc_iocbq *abort_iocb;
2680eeaa
JS		 3461 struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
3462
3463 abort_iocb = NULL;
2680eeaa
JS		 3464
3465 if (irsp->ulpStatus) {
3466 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
3467 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
3468
2e0fef85 3469 spin_lock_irq(&phba->hbalock);
2680eeaa
JS		 3470 if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
3471 abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
3472
92d7f7b0 3473 lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
e8b62011 3474 "0327 Cannot abort els iocb %p "
92d7f7b0
JS		 3475 "with tag %x context %x, abort status %x, "
3476 "abort code %x\n",
e8b62011
JS		 3477 abort_iocb, abort_iotag, abort_context,
3478 irsp->ulpStatus, irsp->un.ulpWord[4]);
2680eeaa
JS		 3479
3480 /*
3481 * make sure we have the right iocbq before taking it
3482 * off the txcmplq and try to call completion routine.
3483 */
2e0fef85
JS		 3484 if (!abort_iocb ||
3485 abort_iocb->iocb.ulpContext != abort_context ||
3486 (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
3487 spin_unlock_irq(&phba->hbalock);
3488 else {
92d7f7b0 3489 list_del_init(&abort_iocb->list);
2680eeaa 3490 pring->txcmplq_cnt--;
2e0fef85 3491 spin_unlock_irq(&phba->hbalock);
2680eeaa 3492
92d7f7b0
JS		 3493 abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3494 abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3495 abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
3496 (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
2680eeaa
JS		 3497 }
3498 }
3499
604a3e30 3500 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB		 3501 return;
3502}
3503
92d7f7b0
JS		 3504static void
3505lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3506 struct lpfc_iocbq *rspiocb)
3507{
3508 IOCB_t *irsp = &rspiocb->iocb;
3509
3510 /* ELS cmd tag <ulpIoTag> completes */
3511 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
e8b62011 3512 "0133 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 3513 "x%x x%x x%x\n",
e8b62011 3514 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 3515 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS		 3516 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
3517 lpfc_ct_free_iocb(phba, cmdiocb);
3518 else
3519 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS		 3520 return;
3521}
3522
dea3101e 3523int
2e0fef85
JS		 3524lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3525 struct lpfc_iocbq *cmdiocb)
dea3101e 3526{
2e0fef85 3527 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 3528 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB		 3529 IOCB_t *icmd = NULL;
3530 IOCB_t *iabt = NULL;
07951076
JS		 3531 int retval = IOCB_ERROR;
3532
92d7f7b0
JS		 3533 /*
3534 * There are certain command types we don't want to abort. And we
3535 * don't want to abort commands that are already in the process of
3536 * being aborted.
07951076
JS		 3537 */
3538 icmd = &cmdiocb->iocb;
2e0fef85 3539 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS		 3540 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
3541 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS		 3542 return 0;
3543
858c9f6c
JS		 3544 /* If we're unloading, don't abort iocb on the ELS ring, but change the
3545 * callback so that nothing happens when it finishes.
07951076 3546 */
858c9f6c
JS		 3547 if ((vport->load_flag & FC_UNLOADING) &&
3548 (pring->ringno == LPFC_ELS_RING)) {
92d7f7b0
JS		 3549 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
3550 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
3551 else
3552 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
07951076 3553 goto abort_iotag_exit;
92d7f7b0 3554 }
dea3101e
JB		 3555
3556 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 3557 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB		 3558 if (abtsiocbp == NULL)
3559 return 0;
dea3101e 3560
07951076
JS		 3561 /* This signals the response to set the correct status
3562 * before calling the completion handler.
3563 */
3564 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
3565
dea3101e 3566 iabt = &abtsiocbp->iocb;
07951076
JS		 3567 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
3568 iabt->un.acxri.abortContextTag = icmd->ulpContext;
3569 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
3570 iabt->ulpLe = 1;
3571 iabt->ulpClass = icmd->ulpClass;
dea3101e 3572
2e0fef85 3573 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS		 3574 iabt->ulpCommand = CMD_ABORT_XRI_CN;
3575 else
3576 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 3577
07951076 3578 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
5b8bd0c9 3579
e8b62011
JS		 3580 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
3581 "0339 Abort xri x%x, original iotag x%x, "
3582 "abort cmd iotag x%x\n",
3583 iabt->un.acxri.abortContextTag,
3584 iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
92d7f7b0 3585 retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
dea3101e 3586
07951076 3587abort_iotag_exit:
2e0fef85
JS		 3588 /*
3589 * Caller to this routine should check for IOCB_ERROR
3590 * and handle it properly. This routine no longer removes
3591 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 3592 */
2e0fef85 3593 return retval;
dea3101e
JB		 3594}
3595
3596static int
51ef4c26
JS		 3597lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
3598 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 3599 lpfc_ctx_cmd ctx_cmd)
dea3101e 3600{
0bd4ca25
JSEC		 3601 struct lpfc_scsi_buf *lpfc_cmd;
3602 struct scsi_cmnd *cmnd;
dea3101e
JB		 3603 int rc = 1;
3604
0bd4ca25
JSEC		 3605 if (!(iocbq->iocb_flag & LPFC_IO_FCP))
3606 return rc;
3607
51ef4c26
JS		 3608 if (iocbq->vport != vport)
3609 return rc;
3610
0bd4ca25
JSEC		 3611 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
3612 cmnd = lpfc_cmd->pCmd;
3613
3614 if (cmnd == NULL)
dea3101e
JB		 3615 return rc;
3616
3617 switch (ctx_cmd) {
3618 case LPFC_CTX_LUN:
0bd4ca25
JSEC		 3619 if ((cmnd->device->id == tgt_id) &&
3620 (cmnd->device->lun == lun_id))
dea3101e
JB		 3621 rc = 0;
3622 break;
3623 case LPFC_CTX_TGT:
0bd4ca25 3624 if (cmnd->device->id == tgt_id)
dea3101e
JB		 3625 rc = 0;
3626 break;
dea3101e
JB		 3627 case LPFC_CTX_HOST:
3628 rc = 0;
3629 break;
3630 default:
3631 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
3632 __FUNCTION__, ctx_cmd);
3633 break;
3634 }
3635
3636 return rc;
3637}
3638
3639int
51ef4c26
JS		 3640lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
3641 lpfc_ctx_cmd ctx_cmd)
dea3101e 3642{
51ef4c26 3643 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC		 3644 struct lpfc_iocbq *iocbq;
3645 int sum, i;
dea3101e 3646
0bd4ca25
JSEC		 3647 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
3648 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3649
51ef4c26
JS		 3650 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
3651 ctx_cmd) == 0)
0bd4ca25 3652 sum++;
dea3101e 3653 }
0bd4ca25 3654
dea3101e
JB		 3655 return sum;
3656}
3657
5eb95af0 3658void
2e0fef85
JS		 3659lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3660 struct lpfc_iocbq *rspiocb)
5eb95af0 3661{
604a3e30 3662 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC		 3663 return;
3664}
3665
dea3101e 3666int
51ef4c26
JS		 3667lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
3668 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 3669{
51ef4c26 3670 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC		 3671 struct lpfc_iocbq *iocbq;
3672 struct lpfc_iocbq *abtsiocb;
dea3101e 3673 IOCB_t *cmd = NULL;
dea3101e 3674 int errcnt = 0, ret_val = 0;
0bd4ca25 3675 int i;
dea3101e 3676
0bd4ca25
JSEC		 3677 for (i = 1; i <= phba->sli.last_iotag; i++) {
3678 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3679
51ef4c26 3680 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 3681 abort_cmd) != 0)
dea3101e
JB		 3682 continue;
3683
3684 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 3685 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB		 3686 if (abtsiocb == NULL) {
3687 errcnt++;
3688 continue;
3689 }
dea3101e 3690
0bd4ca25 3691 cmd = &iocbq->iocb;
dea3101e
JB		 3692 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
3693 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
3694 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
3695 abtsiocb->iocb.ulpLe = 1;
3696 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2e0fef85 3697 abtsiocb->vport = phba->pport;
dea3101e 3698
2e0fef85 3699 if (lpfc_is_link_up(phba))
dea3101e
JB		 3700 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
3701 else
3702 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
3703
5eb95af0
JSEC		 3704 /* Setup callback routine and issue the command. */
3705 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
dea3101e
JB		 3706 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
3707 if (ret_val == IOCB_ERROR) {
604a3e30 3708 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB		 3709 errcnt++;
3710 continue;
3711 }
3712 }
3713
3714 return errcnt;
3715}
3716
68876920
JSEC		 3717static void
3718lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
3719 struct lpfc_iocbq *cmdiocbq,
3720 struct lpfc_iocbq *rspiocbq)
dea3101e 3721{
68876920
JSEC		 3722 wait_queue_head_t *pdone_q;
3723 unsigned long iflags;
dea3101e 3724
2e0fef85 3725 spin_lock_irqsave(&phba->hbalock, iflags);
68876920
JSEC		 3726 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
3727 if (cmdiocbq->context2 && rspiocbq)
3728 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
3729 &rspiocbq->iocb, sizeof(IOCB_t));
3730
3731 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC		 3732 if (pdone_q)
3733 wake_up(pdone_q);
858c9f6c 3734 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB		 3735 return;
3736}
3737
68876920
JSEC		 3738/*
3739 * Issue the caller's iocb and wait for its completion, but no longer than the
3740 * caller's timeout. Note that iocb_flags is cleared before the
3741 * lpfc_sli_issue_call since the wake routine sets a unique value and by
3742 * definition this is a wait function.
3743 */
92d7f7b0 3744
dea3101e 3745int
2e0fef85
JS		 3746lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
3747 struct lpfc_sli_ring *pring,
3748 struct lpfc_iocbq *piocb,
3749 struct lpfc_iocbq *prspiocbq,
68876920 3750 uint32_t timeout)
dea3101e 3751{
7259f0d0 3752 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC		 3753 long timeleft, timeout_req = 0;
3754 int retval = IOCB_SUCCESS;
875fbdfe 3755 uint32_t creg_val;
dea3101e
JB		 3756
3757 /*
68876920
JSEC		 3758 * If the caller has provided a response iocbq buffer, then context2
3759 * is NULL or its an error.
dea3101e 3760 */
68876920
JSEC		 3761 if (prspiocbq) {
3762 if (piocb->context2)
3763 return IOCB_ERROR;
3764 piocb->context2 = prspiocbq;
dea3101e
JB		 3765 }
3766
68876920
JSEC		 3767 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
3768 piocb->context_un.wait_queue = &done_q;
3769 piocb->iocb_flag &= ~LPFC_IO_WAKE;
dea3101e 3770
875fbdfe
JSEC		 3771 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3772 creg_val = readl(phba->HCregaddr);
3773 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
3774 writel(creg_val, phba->HCregaddr);
3775 readl(phba->HCregaddr); /* flush */
3776 }
3777
68876920
JSEC		 3778 retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
3779 if (retval == IOCB_SUCCESS) {
3780 timeout_req = timeout * HZ;
68876920
JSEC		 3781 timeleft = wait_event_timeout(done_q,
3782 piocb->iocb_flag & LPFC_IO_WAKE,
3783 timeout_req);
dea3101e 3784
7054a606
JS		 3785 if (piocb->iocb_flag & LPFC_IO_WAKE) {
3786 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3787 "0331 IOCB wake signaled\n");
7054a606 3788 } else if (timeleft == 0) {
68876920 3789 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3790 "0338 IOCB wait timeout error - no "
3791 "wake response Data x%x\n", timeout);
68876920 3792 retval = IOCB_TIMEDOUT;
7054a606 3793 } else {
68876920 3794 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3795 "0330 IOCB wake NOT set, "
3796 "Data x%x x%lx\n",
68876920
JSEC		 3797 timeout, (timeleft / jiffies));
3798 retval = IOCB_TIMEDOUT;
dea3101e 3799 }
68876920
JSEC		 3800 } else {
3801 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 3802 ":0332 IOCB wait issue failed, Data x%x\n",
3803 retval);
68876920 3804 retval = IOCB_ERROR;
dea3101e
JB		 3805 }
3806
875fbdfe
JSEC		 3807 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3808 creg_val = readl(phba->HCregaddr);
3809 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
3810 writel(creg_val, phba->HCregaddr);
3811 readl(phba->HCregaddr); /* flush */
3812 }
3813
68876920
JSEC		 3814 if (prspiocbq)
3815 piocb->context2 = NULL;
3816
3817 piocb->context_un.wait_queue = NULL;
3818 piocb->iocb_cmpl = NULL;
dea3101e
JB		 3819 return retval;
3820}
68876920 3821
dea3101e 3822int
2e0fef85 3823lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB		 3824 uint32_t timeout)
3825{
7259f0d0 3826 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
dea3101e 3827 int retval;
858c9f6c 3828 unsigned long flag;
dea3101e
JB		 3829
3830 /* The caller must leave context1 empty. */
98c9ea5c 3831 if (pmboxq->context1)
2e0fef85 3832 return MBX_NOT_FINISHED;
dea3101e
JB		 3833
3834 /* setup wake call as IOCB callback */
3835 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
3836 /* setup context field to pass wait_queue pointer to wake function */
3837 pmboxq->context1 = &done_q;
3838
dea3101e
JB		 3839 /* now issue the command */
3840 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
3841
3842 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
7054a606
JS		 3843 wait_event_interruptible_timeout(done_q,
3844 pmboxq->mbox_flag & LPFC_MBX_WAKE,
3845 timeout * HZ);
3846
858c9f6c 3847 spin_lock_irqsave(&phba->hbalock, flag);
dea3101e 3848 pmboxq->context1 = NULL;
7054a606
JS		 3849 /*
3850 * if LPFC_MBX_WAKE flag is set the mailbox is completed
3851 * else do not free the resources.
3852 */
3853 if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
dea3101e 3854 retval = MBX_SUCCESS;
858c9f6c 3855 else {
7054a606 3856 retval = MBX_TIMEOUT;
858c9f6c
JS		 3857 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3858 }
3859 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e
JB		 3860 }
3861
dea3101e
JB		 3862 return retval;
3863}
3864
b4c02652
JS		 3865int
3866lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
3867{
2e0fef85 3868 struct lpfc_vport *vport = phba->pport;
b4c02652 3869 int i = 0;
ed957684 3870 uint32_t ha_copy;
b4c02652 3871
2e0fef85 3872 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
b4c02652
JS		 3873 if (i++ > LPFC_MBOX_TMO * 1000)
3874 return 1;
3875
ed957684
JS		 3876 /*
3877 * Call lpfc_sli_handle_mb_event only if a mailbox cmd
3878 * did finish. This way we won't get the misleading
3879 * "Stray Mailbox Interrupt" message.
3880 */
3881 spin_lock_irq(&phba->hbalock);
3882 ha_copy = phba->work_ha;
3883 phba->work_ha &= ~HA_MBATT;
3884 spin_unlock_irq(&phba->hbalock);
3885
3886 if (ha_copy & HA_MBATT)
3887 if (lpfc_sli_handle_mb_event(phba) == 0)
3888 i = 0;
b4c02652
JS		 3889
3890 msleep(1);
3891 }
3892
3893 return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
3894}
3895
dea3101e 3896irqreturn_t
7d12e780 3897lpfc_intr_handler(int irq, void *dev_id)
dea3101e 3898{
2e0fef85 3899 struct lpfc_hba *phba;
dea3101e
JB		 3900 uint32_t ha_copy;
3901 uint32_t work_ha_copy;
3902 unsigned long status;
dea3101e
JB		 3903 uint32_t control;
3904
92d7f7b0 3905 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS		 3906 struct lpfc_vport *vport;
3907 struct lpfc_nodelist *ndlp;
3908 struct lpfc_dmabuf *mp;
92d7f7b0
JS		 3909 LPFC_MBOXQ_t *pmb;
3910 int rc;
3911
dea3101e
JB		 3912 /*
3913 * Get the driver's phba structure from the dev_id and
3914 * assume the HBA is not interrupting.
3915 */
3916 phba = (struct lpfc_hba *) dev_id;
3917
3918 if (unlikely(!phba))
3919 return IRQ_NONE;
3920
8d63f375
LV		 3921 /* If the pci channel is offline, ignore all the interrupts. */
3922 if (unlikely(pci_channel_offline(phba->pcidev)))
3923 return IRQ_NONE;
3924
dea3101e
JB		 3925 phba->sli.slistat.sli_intr++;
3926
3927 /*
3928 * Call the HBA to see if it is interrupting. If not, don't claim
3929 * the interrupt
3930 */
3931
3932 /* Ignore all interrupts during initialization. */
2e0fef85 3933 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB		 3934 return IRQ_NONE;
3935
3936 /*
3937 * Read host attention register to determine interrupt source
3938 * Clear Attention Sources, except Error Attention (to
3939 * preserve status) and Link Attention
3940 */
2e0fef85 3941 spin_lock(&phba->hbalock);
dea3101e 3942 ha_copy = readl(phba->HAregaddr);
ebdbe65f
JS		 3943 /* If somebody is waiting to handle an eratt don't process it
3944 * here. The brdkill function will do this.
3945 */
2e0fef85 3946 if (phba->link_flag & LS_IGNORE_ERATT)
ebdbe65f 3947 ha_copy &= ~HA_ERATT;
dea3101e
JB		 3948 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
3949 readl(phba->HAregaddr); /* flush */
2e0fef85 3950 spin_unlock(&phba->hbalock);
dea3101e
JB		 3951
3952 if (unlikely(!ha_copy))
3953 return IRQ_NONE;
3954
3955 work_ha_copy = ha_copy & phba->work_ha_mask;
3956
3957 if (unlikely(work_ha_copy)) {
3958 if (work_ha_copy & HA_LATT) {
3959 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
3960 /*
3961 * Turn off Link Attention interrupts
3962 * until CLEAR_LA done
3963 */
2e0fef85 3964 spin_lock(&phba->hbalock);
dea3101e
JB		 3965 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
3966 control = readl(phba->HCregaddr);
3967 control &= ~HC_LAINT_ENA;
3968 writel(control, phba->HCregaddr);
3969 readl(phba->HCregaddr); /* flush */
2e0fef85 3970 spin_unlock(&phba->hbalock);
dea3101e
JB		 3971 }
3972 else
3973 work_ha_copy &= ~HA_LATT;
3974 }
3975
3976 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
858c9f6c
JS		 3977 /*
3978 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
3979 * the only slow ring.
3980 */
3981 status = (work_ha_copy &
3982 (HA_RXMASK << (4*LPFC_ELS_RING)));
3983 status >>= (4*LPFC_ELS_RING);
3984 if (status & HA_RXMASK) {
3985 spin_lock(&phba->hbalock);
3986 control = readl(phba->HCregaddr);
a58cbd52
JS		 3987
3988 lpfc_debugfs_slow_ring_trc(phba,
3989 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
3990 control, status,
3991 (uint32_t)phba->sli.slistat.sli_intr);
3992
858c9f6c 3993 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS		 3994 lpfc_debugfs_slow_ring_trc(phba,
3995 "ISR Disable ring:"
3996 "pwork:x%x hawork:x%x wait:x%x",
3997 phba->work_ha, work_ha_copy,
3998 (uint32_t)((unsigned long)
3999 phba->work_wait));
4000
858c9f6c
JS		 4001 control &=
4002 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB		 4003 writel(control, phba->HCregaddr);
4004 readl(phba->HCregaddr); /* flush */
dea3101e 4005 }
a58cbd52
JS		 4006 else {
4007 lpfc_debugfs_slow_ring_trc(phba,
4008 "ISR slow ring: pwork:"
4009 "x%x hawork:x%x wait:x%x",
4010 phba->work_ha, work_ha_copy,
4011 (uint32_t)((unsigned long)
4012 phba->work_wait));
4013 }
858c9f6c 4014 spin_unlock(&phba->hbalock);
dea3101e
JB		 4015 }
4016 }
4017
4018 if (work_ha_copy & HA_ERATT) {
2e0fef85 4019 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB		 4020 /*
4021 * There was a link/board error. Read the
4022 * status register to retrieve the error event
4023 * and process it.
4024 */
4025 phba->sli.slistat.err_attn_event++;
4026 /* Save status info */
4027 phba->work_hs = readl(phba->HSregaddr);
4028 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
4029 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
4030
4031 /* Clear Chip error bit */
4032 writel(HA_ERATT, phba->HAregaddr);
4033 readl(phba->HAregaddr); /* flush */
2e0fef85 4034 phba->pport->stopped = 1;
dea3101e
JB		 4035 }
4036
92d7f7b0
JS		 4037 if ((work_ha_copy & HA_MBATT) &&
4038 (phba->sli.mbox_active)) {
4039 pmb = phba->sli.mbox_active;
4040 pmbox = &pmb->mb;
4041 mbox = &phba->slim2p->mbx;
858c9f6c 4042 vport = pmb->vport;
92d7f7b0
JS		 4043
4044 /* First check out the status word */
4045 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
4046 if (pmbox->mbxOwner != OWN_HOST) {
4047 /*
4048 * Stray Mailbox Interrupt, mbxCommand <cmd>
4049 * mbxStatus <status>
4050 */
4051 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX |
4052 LOG_SLI,
e8b62011 4053 "(%d):0304 Stray Mailbox "
92d7f7b0
JS		 4054 "Interrupt mbxCommand x%x "
4055 "mbxStatus x%x\n",
e8b62011 4056 (vport ? vport->vpi : 0),
92d7f7b0
JS		 4057 pmbox->mbxCommand,
4058 pmbox->mbxStatus);
4059 }
858c9f6c 4060 phba->last_completion_time = jiffies;
92d7f7b0
JS		 4061 del_timer_sync(&phba->sli.mbox_tmo);
4062
92d7f7b0
JS		 4063 phba->sli.mbox_active = NULL;
4064 if (pmb->mbox_cmpl) {
4065 lpfc_sli_pcimem_bcopy(mbox, pmbox,
4066 MAILBOX_CMD_SIZE);
4067 }
858c9f6c
JS		 4068 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
4069 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
4070
4071 lpfc_debugfs_disc_trc(vport,
4072 LPFC_DISC_TRC_MBOX_VPORT,
4073 "MBOX dflt rpi: : status:x%x rpi:x%x",
4074 (uint32_t)pmbox->mbxStatus,
4075 pmbox->un.varWords[0], 0);
4076
4077 if ( !pmbox->mbxStatus) {
4078 mp = (struct lpfc_dmabuf *)
4079 (pmb->context1);
4080 ndlp = (struct lpfc_nodelist *)
4081 pmb->context2;
4082
4083 /* Reg_LOGIN of dflt RPI was successful.
4084 * new lets get rid of the RPI using the
4085 * same mbox buffer.
4086 */
4087 lpfc_unreg_login(phba, vport->vpi,
4088 pmbox->un.varWords[0], pmb);
4089 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
4090 pmb->context1 = mp;
4091 pmb->context2 = ndlp;
4092 pmb->vport = vport;
4093 spin_lock(&phba->hbalock);
4094 phba->sli.sli_flag &=
4095 ~LPFC_SLI_MBOX_ACTIVE;
4096 spin_unlock(&phba->hbalock);
4097 goto send_current_mbox;
4098 }
4099 }
4100 spin_lock(&phba->pport->work_port_lock);
4101 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
4102 spin_unlock(&phba->pport->work_port_lock);
92d7f7b0
JS		 4103 lpfc_mbox_cmpl_put(phba, pmb);
4104 }
4105 if ((work_ha_copy & HA_MBATT) &&
4106 (phba->sli.mbox_active == NULL)) {
4107send_next_mbox:
4108 spin_lock(&phba->hbalock);
4109 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
4110 pmb = lpfc_mbox_get(phba);
4111 spin_unlock(&phba->hbalock);
858c9f6c 4112send_current_mbox:
92d7f7b0
JS		 4113 /* Process next mailbox command if there is one */
4114 if (pmb != NULL) {
4115 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4116 if (rc == MBX_NOT_FINISHED) {
4117 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
4118 lpfc_mbox_cmpl_put(phba, pmb);
4119 goto send_next_mbox;
4120 }
92d7f7b0
JS		 4121 }
4122
4123 }
4124
2e0fef85 4125 spin_lock(&phba->hbalock);
dea3101e
JB		 4126 phba->work_ha |= work_ha_copy;
4127 if (phba->work_wait)
92d7f7b0 4128 lpfc_worker_wake_up(phba);
2e0fef85 4129 spin_unlock(&phba->hbalock);
dea3101e
JB		 4130 }
4131
4132 ha_copy &= ~(phba->work_ha_mask);
4133
4134 /*
4135 * Process all events on FCP ring. Take the optimized path for
4136 * FCP IO. Any other IO is slow path and is handled by
4137 * the worker thread.
4138 */
4139 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
4140 status >>= (4*LPFC_FCP_RING);
858c9f6c 4141 if (status & HA_RXMASK)
dea3101e
JB		 4142 lpfc_sli_handle_fast_ring_event(phba,
4143 &phba->sli.ring[LPFC_FCP_RING],
4144 status);
a4bc3379
JS		 4145
4146 if (phba->cfg_multi_ring_support == 2) {
4147 /*
4148 * Process all events on extra ring. Take the optimized path
4149 * for extra ring IO. Any other IO is slow path and is handled
4150 * by the worker thread.
4151 */
4152 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
4153 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 4154 if (status & HA_RXMASK) {
a4bc3379
JS		 4155 lpfc_sli_handle_fast_ring_event(phba,
4156 &phba->sli.ring[LPFC_EXTRA_RING],
4157 status);
4158 }
4159 }
dea3101e
JB		 4160 return IRQ_HANDLED;
4161
4162} /* lpfc_intr_handler */
Ubuntu Jammy Linux kernel mirror