]> git.proxmox.com Git - mirror_ubuntu-kernels.git/blame - drivers/scsi/lpfc/lpfc_sli.c
projects / mirror_ubuntu-kernels.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branches 'release', 'ejd', 'sony' and 'wmi' into release
[mirror_ubuntu-kernels.git] / drivers / scsi / lpfc / lpfc_sli.c
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
1b32f6aa 4 * Copyright (C) 2004-2008 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e 20 *******************************************************************/
21
dea3101e 22#include <linux/blkdev.h>
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26
91886523 27#include <scsi/scsi.h>
dea3101e 28#include <scsi/scsi_cmnd.h>
29#include <scsi/scsi_device.h>
30#include <scsi/scsi_host.h>
f888ba3c 31#include <scsi/scsi_transport_fc.h>
dea3101e 32
33#include "lpfc_hw.h"
34#include "lpfc_sli.h"
35#include "lpfc_disc.h"
36#include "lpfc_scsi.h"
37#include "lpfc.h"
38#include "lpfc_crtn.h"
39#include "lpfc_logmsg.h"
40#include "lpfc_compat.h"
858c9f6c 41#include "lpfc_debugfs.h"
dea3101e 42
43/*
44 * Define macro to log: Mailbox command x%x cannot issue Data
45 * This allows multiple uses of lpfc_msgBlk0311
46 * w/o perturbing log msg utility.
47 */
92d7f7b0 48#define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
dea3101e 49 lpfc_printf_log(phba, \
50 KERN_INFO, \
51 LOG_MBOX | LOG_SLI, \
e8b62011 52 "(%d):0311 Mailbox command x%x cannot " \
92d7f7b0 53 "issue Data: x%x x%x x%x\n", \
92d7f7b0
JS		 54 pmbox->vport ? pmbox->vport->vpi : 0, \
55 pmbox->mb.mbxCommand, \
2e0fef85 56 phba->pport->port_state, \
dea3101e 57 psli->sli_flag, \
2e0fef85 58 flag)
dea3101e 59
60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
92d7f7b0
JS		 69 /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
70 * to the start of the ring, and the slot number of the
71 * desired iocb entry, calc a pointer to that entry.
72 */
ed957684
JS		 73static inline IOCB_t *
74lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
75{
76 return (IOCB_t *) (((char *) pring->cmdringaddr) +
77 pring->cmdidx * phba->iocb_cmd_size);
78}
79
80static inline IOCB_t *
81lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
82{
83 return (IOCB_t *) (((char *) pring->rspringaddr) +
84 pring->rspidx * phba->iocb_rsp_size);
85}
86
2e0fef85
JS		 87static struct lpfc_iocbq *
88__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC		 89{
90 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
91 struct lpfc_iocbq * iocbq = NULL;
92
93 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
94 return iocbq;
95}
96
2e0fef85
JS		 97struct lpfc_iocbq *
98lpfc_sli_get_iocbq(struct lpfc_hba *phba)
99{
100 struct lpfc_iocbq * iocbq = NULL;
101 unsigned long iflags;
102
103 spin_lock_irqsave(&phba->hbalock, iflags);
104 iocbq = __lpfc_sli_get_iocbq(phba);
105 spin_unlock_irqrestore(&phba->hbalock, iflags);
106 return iocbq;
107}
108
a6ababd2 109static void
2e0fef85 110__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 111{
2e0fef85 112 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30
JB		 113
114 /*
115 * Clean all volatile data fields, preserve iotag and node struct.
116 */
117 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
118 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
119}
120
2e0fef85
JS		 121void
122lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
123{
124 unsigned long iflags;
125
126 /*
127 * Clean all volatile data fields, preserve iotag and node struct.
128 */
129 spin_lock_irqsave(&phba->hbalock, iflags);
130 __lpfc_sli_release_iocbq(phba, iocbq);
131 spin_unlock_irqrestore(&phba->hbalock, iflags);
132}
133
dea3101e 134/*
135 * Translate the iocb command to an iocb command type used to decide the final
136 * disposition of each completed IOCB.
137 */
138static lpfc_iocb_type
139lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
140{
141 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
142
143 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
144 return 0;
145
146 switch (iocb_cmnd) {
147 case CMD_XMIT_SEQUENCE_CR:
148 case CMD_XMIT_SEQUENCE_CX:
149 case CMD_XMIT_BCAST_CN:
150 case CMD_XMIT_BCAST_CX:
151 case CMD_ELS_REQUEST_CR:
152 case CMD_ELS_REQUEST_CX:
153 case CMD_CREATE_XRI_CR:
154 case CMD_CREATE_XRI_CX:
155 case CMD_GET_RPI_CN:
156 case CMD_XMIT_ELS_RSP_CX:
157 case CMD_GET_RPI_CR:
158 case CMD_FCP_IWRITE_CR:
159 case CMD_FCP_IWRITE_CX:
160 case CMD_FCP_IREAD_CR:
161 case CMD_FCP_IREAD_CX:
162 case CMD_FCP_ICMND_CR:
163 case CMD_FCP_ICMND_CX:
f5603511
JS		 164 case CMD_FCP_TSEND_CX:
165 case CMD_FCP_TRSP_CX:
166 case CMD_FCP_TRECEIVE_CX:
167 case CMD_FCP_AUTO_TRSP_CX:
dea3101e 168 case CMD_ADAPTER_MSG:
169 case CMD_ADAPTER_DUMP:
170 case CMD_XMIT_SEQUENCE64_CR:
171 case CMD_XMIT_SEQUENCE64_CX:
172 case CMD_XMIT_BCAST64_CN:
173 case CMD_XMIT_BCAST64_CX:
174 case CMD_ELS_REQUEST64_CR:
175 case CMD_ELS_REQUEST64_CX:
176 case CMD_FCP_IWRITE64_CR:
177 case CMD_FCP_IWRITE64_CX:
178 case CMD_FCP_IREAD64_CR:
179 case CMD_FCP_IREAD64_CX:
180 case CMD_FCP_ICMND64_CR:
181 case CMD_FCP_ICMND64_CX:
f5603511
JS		 182 case CMD_FCP_TSEND64_CX:
183 case CMD_FCP_TRSP64_CX:
184 case CMD_FCP_TRECEIVE64_CX:
dea3101e 185 case CMD_GEN_REQUEST64_CR:
186 case CMD_GEN_REQUEST64_CX:
187 case CMD_XMIT_ELS_RSP64_CX:
188 type = LPFC_SOL_IOCB;
189 break;
190 case CMD_ABORT_XRI_CN:
191 case CMD_ABORT_XRI_CX:
192 case CMD_CLOSE_XRI_CN:
193 case CMD_CLOSE_XRI_CX:
194 case CMD_XRI_ABORTED_CX:
195 case CMD_ABORT_MXRI64_CN:
196 type = LPFC_ABORT_IOCB;
197 break;
198 case CMD_RCV_SEQUENCE_CX:
199 case CMD_RCV_ELS_REQ_CX:
200 case CMD_RCV_SEQUENCE64_CX:
201 case CMD_RCV_ELS_REQ64_CX:
57127f15 202 case CMD_ASYNC_STATUS:
ed957684
JS		 203 case CMD_IOCB_RCV_SEQ64_CX:
204 case CMD_IOCB_RCV_ELS64_CX:
205 case CMD_IOCB_RCV_CONT64_CX:
3163f725 206 case CMD_IOCB_RET_XRI64_CX:
dea3101e 207 type = LPFC_UNSOL_IOCB;
208 break;
3163f725
JS		 209 case CMD_IOCB_XMIT_MSEQ64_CR:
210 case CMD_IOCB_XMIT_MSEQ64_CX:
211 case CMD_IOCB_RCV_SEQ_LIST64_CX:
212 case CMD_IOCB_RCV_ELS_LIST64_CX:
213 case CMD_IOCB_CLOSE_EXTENDED_CN:
214 case CMD_IOCB_ABORT_EXTENDED_CN:
215 case CMD_IOCB_RET_HBQE64_CN:
216 case CMD_IOCB_FCP_IBIDIR64_CR:
217 case CMD_IOCB_FCP_IBIDIR64_CX:
218 case CMD_IOCB_FCP_ITASKMGT64_CX:
219 case CMD_IOCB_LOGENTRY_CN:
220 case CMD_IOCB_LOGENTRY_ASYNC_CN:
221 printk("%s - Unhandled SLI-3 Command x%x\n",
222 __FUNCTION__, iocb_cmnd);
223 type = LPFC_UNKNOWN_IOCB;
224 break;
dea3101e 225 default:
226 type = LPFC_UNKNOWN_IOCB;
227 break;
228 }
229
230 return type;
231}
232
233static int
ed957684 234lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e 235{
236 struct lpfc_sli *psli = &phba->sli;
ed957684
JS		 237 LPFC_MBOXQ_t *pmb;
238 MAILBOX_t *pmbox;
239 int i, rc, ret = 0;
dea3101e 240
ed957684
JS		 241 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
242 if (!pmb)
243 return -ENOMEM;
244 pmbox = &pmb->mb;
245 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 246 for (i = 0; i < psli->num_rings; i++) {
dea3101e 247 lpfc_config_ring(phba, i, pmb);
248 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
249 if (rc != MBX_SUCCESS) {
92d7f7b0 250 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 251 "0446 Adapter failed to init (%d), "
dea3101e 252 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
253 "ring %d\n",
e8b62011
JS		 254 rc, pmbox->mbxCommand,
255 pmbox->mbxStatus, i);
2e0fef85 256 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS		 257 ret = -ENXIO;
258 break;
dea3101e 259 }
260 }
ed957684
JS		 261 mempool_free(pmb, phba->mbox_mem_pool);
262 return ret;
dea3101e 263}
264
265static int
2e0fef85
JS		 266lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
267 struct lpfc_iocbq *piocb)
dea3101e 268{
dea3101e 269 list_add_tail(&piocb->list, &pring->txcmplq);
270 pring->txcmplq_cnt++;
92d7f7b0
JS		 271 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
272 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
273 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
274 if (!piocb->vport)
275 BUG();
276 else
277 mod_timer(&piocb->vport->els_tmofunc,
278 jiffies + HZ * (phba->fc_ratov << 1));
279 }
280
dea3101e 281
2e0fef85 282 return 0;
dea3101e 283}
284
285static struct lpfc_iocbq *
2e0fef85 286lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 287{
dea3101e 288 struct lpfc_iocbq *cmd_iocb;
289
858c9f6c
JS		 290 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
291 if (cmd_iocb != NULL)
dea3101e 292 pring->txq_cnt--;
2e0fef85 293 return cmd_iocb;
dea3101e 294}
295
296static IOCB_t *
297lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
298{
ed957684
JS		 299 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
300 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
301 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 302 uint32_t max_cmd_idx = pring->numCiocb;
dea3101e 303
304 if ((pring->next_cmdidx == pring->cmdidx) &&
305 (++pring->next_cmdidx >= max_cmd_idx))
306 pring->next_cmdidx = 0;
307
308 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
309
310 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
311
312 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
313 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 314 "0315 Ring %d issue: portCmdGet %d "
dea3101e 315 "is bigger then cmd ring %d\n",
e8b62011 316 pring->ringno,
dea3101e 317 pring->local_getidx, max_cmd_idx);
318
2e0fef85 319 phba->link_state = LPFC_HBA_ERROR;
dea3101e 320 /*
321 * All error attention handlers are posted to
322 * worker thread
323 */
324 phba->work_ha |= HA_ERATT;
325 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 326
327 /* hbalock should already be held */
dea3101e 328 if (phba->work_wait)
92d7f7b0 329 lpfc_worker_wake_up(phba);
dea3101e 330
331 return NULL;
332 }
333
334 if (pring->local_getidx == pring->next_cmdidx)
335 return NULL;
336 }
337
ed957684 338 return lpfc_cmd_iocb(phba, pring);
dea3101e 339}
340
604a3e30 341uint16_t
2e0fef85 342lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 343{
2e0fef85
JS		 344 struct lpfc_iocbq **new_arr;
345 struct lpfc_iocbq **old_arr;
604a3e30
JB		 346 size_t new_len;
347 struct lpfc_sli *psli = &phba->sli;
348 uint16_t iotag;
dea3101e 349
2e0fef85 350 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 351 iotag = psli->last_iotag;
352 if(++iotag < psli->iocbq_lookup_len) {
353 psli->last_iotag = iotag;
354 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 355 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 356 iocbq->iotag = iotag;
357 return iotag;
2e0fef85 358 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB		 359 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
360 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85
JS		 361 spin_unlock_irq(&phba->hbalock);
362 new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
604a3e30
JB		 363 GFP_KERNEL);
364 if (new_arr) {
2e0fef85 365 spin_lock_irq(&phba->hbalock);
604a3e30
JB		 366 old_arr = psli->iocbq_lookup;
367 if (new_len <= psli->iocbq_lookup_len) {
368 /* highly unprobable case */
369 kfree(new_arr);
370 iotag = psli->last_iotag;
371 if(++iotag < psli->iocbq_lookup_len) {
372 psli->last_iotag = iotag;
373 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 374 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 375 iocbq->iotag = iotag;
376 return iotag;
377 }
2e0fef85 378 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 379 return 0;
380 }
381 if (psli->iocbq_lookup)
382 memcpy(new_arr, old_arr,
383 ((psli->last_iotag + 1) *
311464ec 384 sizeof (struct lpfc_iocbq *)));
604a3e30
JB		 385 psli->iocbq_lookup = new_arr;
386 psli->iocbq_lookup_len = new_len;
387 psli->last_iotag = iotag;
388 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 389 spin_unlock_irq(&phba->hbalock);
604a3e30
JB		 390 iocbq->iotag = iotag;
391 kfree(old_arr);
392 return iotag;
393 }
8f6d98d2 394 } else
2e0fef85 395 spin_unlock_irq(&phba->hbalock);
dea3101e 396
604a3e30 397 lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
e8b62011
JS		 398 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
399 psli->last_iotag);
dea3101e 400
604a3e30 401 return 0;
dea3101e 402}
403
404static void
405lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
406 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
407{
408 /*
604a3e30 409 * Set up an iotag
dea3101e 410 */
604a3e30 411 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 412
a58cbd52
JS		 413 if (pring->ringno == LPFC_ELS_RING) {
414 lpfc_debugfs_slow_ring_trc(phba,
415 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
416 *(((uint32_t *) &nextiocb->iocb) + 4),
417 *(((uint32_t *) &nextiocb->iocb) + 6),
418 *(((uint32_t *) &nextiocb->iocb) + 7));
419 }
420
dea3101e 421 /*
422 * Issue iocb command to adapter
423 */
92d7f7b0 424 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e 425 wmb();
426 pring->stats.iocb_cmd++;
427
428 /*
429 * If there is no completion routine to call, we can release the
430 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
431 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
432 */
433 if (nextiocb->iocb_cmpl)
434 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 435 else
2e0fef85 436 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e 437
438 /*
439 * Let the HBA know what IOCB slot will be the next one the
440 * driver will put a command into.
441 */
442 pring->cmdidx = pring->next_cmdidx;
ed957684 443 writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e 444}
445
446static void
2e0fef85 447lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 448{
449 int ringno = pring->ringno;
450
451 pring->flag |= LPFC_CALL_RING_AVAILABLE;
452
453 wmb();
454
455 /*
456 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
457 * The HBA will tell us when an IOCB entry is available.
458 */
459 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
460 readl(phba->CAregaddr); /* flush */
461
462 pring->stats.iocb_cmd_full++;
463}
464
465static void
2e0fef85 466lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 467{
468 int ringno = pring->ringno;
469
470 /*
471 * Tell the HBA that there is work to do in this ring.
472 */
473 wmb();
474 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
475 readl(phba->CAregaddr); /* flush */
476}
477
478static void
2e0fef85 479lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 480{
481 IOCB_t *iocb;
482 struct lpfc_iocbq *nextiocb;
483
484 /*
485 * Check to see if:
486 * (a) there is anything on the txq to send
487 * (b) link is up
488 * (c) link attention events can be processed (fcp ring only)
489 * (d) IOCB processing is not blocked by the outstanding mbox command.
490 */
491 if (pring->txq_cnt &&
2e0fef85 492 lpfc_is_link_up(phba) &&
dea3101e 493 (pring->ringno != phba->sli.fcp_ring ||
0b727fea 494 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e 495
496 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
497 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
498 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
499
500 if (iocb)
501 lpfc_sli_update_ring(phba, pring);
502 else
503 lpfc_sli_update_full_ring(phba, pring);
504 }
505
506 return;
507}
508
a6ababd2 509static struct lpfc_hbq_entry *
ed957684
JS		 510lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
511{
512 struct hbq_s *hbqp = &phba->hbqs[hbqno];
513
514 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
515 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
516 hbqp->next_hbqPutIdx = 0;
517
518 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 519 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS		 520 uint32_t getidx = le32_to_cpu(raw_index);
521
522 hbqp->local_hbqGetIdx = getidx;
523
524 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
525 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 526 LOG_SLI | LOG_VPORT,
e8b62011 527 "1802 HBQ %d: local_hbqGetIdx "
ed957684 528 "%u is > than hbqp->entry_count %u\n",
e8b62011 529 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS		 530 hbqp->entry_count);
531
532 phba->link_state = LPFC_HBA_ERROR;
533 return NULL;
534 }
535
536 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
537 return NULL;
538 }
539
51ef4c26
JS		 540 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
541 hbqp->hbqPutIdx;
ed957684
JS		 542}
543
544void
545lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
546{
92d7f7b0
JS		 547 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
548 struct hbq_dmabuf *hbq_buf;
3163f725 549 unsigned long flags;
51ef4c26 550 int i, hbq_count;
3163f725 551 uint32_t hbqno;
ed957684 552
51ef4c26 553 hbq_count = lpfc_sli_hbq_count();
ed957684 554 /* Return all memory used by all HBQs */
3163f725 555 spin_lock_irqsave(&phba->hbalock, flags);
51ef4c26
JS		 556 for (i = 0; i < hbq_count; ++i) {
557 list_for_each_entry_safe(dmabuf, next_dmabuf,
558 &phba->hbqs[i].hbq_buffer_list, list) {
559 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
560 list_del(&hbq_buf->dbuf.list);
561 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
562 }
a8adb832 563 phba->hbqs[i].buffer_count = 0;
ed957684 564 }
3163f725
JS		 565 /* Return all HBQ buffer that are in-fly */
566 list_for_each_entry_safe(dmabuf, next_dmabuf,
567 &phba->hbqbuf_in_list, list) {
568 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
569 list_del(&hbq_buf->dbuf.list);
570 if (hbq_buf->tag == -1) {
571 (phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer)
572 (phba, hbq_buf);
573 } else {
574 hbqno = hbq_buf->tag >> 16;
575 if (hbqno >= LPFC_MAX_HBQS)
576 (phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer)
577 (phba, hbq_buf);
578 else
579 (phba->hbqs[hbqno].hbq_free_buffer)(phba,
580 hbq_buf);
581 }
582 }
583
584 /* Mark the HBQs not in use */
585 phba->hbq_in_use = 0;
586 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684
JS		 587}
588
51ef4c26 589static struct lpfc_hbq_entry *
ed957684 590lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 591 struct hbq_dmabuf *hbq_buf)
ed957684
JS		 592{
593 struct lpfc_hbq_entry *hbqe;
92d7f7b0 594 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684
JS		 595
596 /* Get next HBQ entry slot to use */
597 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
598 if (hbqe) {
599 struct hbq_s *hbqp = &phba->hbqs[hbqno];
600
92d7f7b0
JS		 601 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
602 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
51ef4c26 603 hbqe->bde.tus.f.bdeSize = hbq_buf->size;
ed957684 604 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS		 605 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
606 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
607 /* Sync SLIM */
ed957684
JS		 608 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
609 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 610 /* flush */
ed957684 611 readl(phba->hbq_put + hbqno);
51ef4c26 612 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
ed957684 613 }
51ef4c26 614 return hbqe;
ed957684
JS		 615}
616
92d7f7b0
JS		 617static struct lpfc_hbq_init lpfc_els_hbq = {
618 .rn = 1,
619 .entry_count = 200,
620 .mask_count = 0,
621 .profile = 0,
51ef4c26 622 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0
JS		 623 .buffer_count = 0,
624 .init_count = 20,
625 .add_count = 5,
626};
ed957684 627
51ef4c26
JS		 628static struct lpfc_hbq_init lpfc_extra_hbq = {
629 .rn = 1,
630 .entry_count = 200,
631 .mask_count = 0,
632 .profile = 0,
633 .ring_mask = (1 << LPFC_EXTRA_RING),
634 .buffer_count = 0,
635 .init_count = 0,
636 .add_count = 5,
637};
638
78b2d852 639struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0 640 &lpfc_els_hbq,
51ef4c26 641 &lpfc_extra_hbq,
92d7f7b0 642};
ed957684 643
311464ec 644static int
92d7f7b0 645lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 646{
92d7f7b0 647 uint32_t i, start, end;
3163f725 648 unsigned long flags;
92d7f7b0 649 struct hbq_dmabuf *hbq_buffer;
ed957684 650
eafe1df9 651 if (!phba->hbqs[hbqno].hbq_alloc_buffer)
51ef4c26 652 return 0;
51ef4c26 653
a8adb832
JS		 654 start = phba->hbqs[hbqno].buffer_count;
655 end = count + start;
eafe1df9 656 if (end > lpfc_hbq_defs[hbqno]->entry_count)
92d7f7b0 657 end = lpfc_hbq_defs[hbqno]->entry_count;
ed957684 658
3163f725
JS		 659 /* Check whether HBQ is still in use */
660 spin_lock_irqsave(&phba->hbalock, flags);
eafe1df9
MW		 661 if (!phba->hbq_in_use)
662 goto out;
3163f725 663
ed957684 664 /* Populate HBQ entries */
92d7f7b0 665 for (i = start; i < end; i++) {
51ef4c26 666 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
92d7f7b0 667 if (!hbq_buffer)
eafe1df9 668 goto err;
92d7f7b0 669 hbq_buffer->tag = (i | (hbqno << 16));
51ef4c26 670 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
a8adb832 671 phba->hbqs[hbqno].buffer_count++;
51ef4c26
JS		 672 else
673 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684 674 }
3163f725 675
eafe1df9 676 out:
3163f725 677 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684 678 return 0;
eafe1df9
MW		 679 err:
680 spin_unlock_irqrestore(&phba->hbalock, flags);
681 return 1;
ed957684
JS		 682}
683
92d7f7b0
JS		 684int
685lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 686{
92d7f7b0
JS		 687 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
688 lpfc_hbq_defs[qno]->add_count));
689}
ed957684 690
a6ababd2 691static int
92d7f7b0
JS		 692lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
693{
694 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
695 lpfc_hbq_defs[qno]->init_count));
ed957684
JS		 696}
697
a6ababd2 698static struct hbq_dmabuf *
92d7f7b0 699lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 700{
92d7f7b0
JS		 701 struct lpfc_dmabuf *d_buf;
702 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS		 703 uint32_t hbqno;
704
705 hbqno = tag >> 16;
a0a74e45 706 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 707 return NULL;
ed957684 708
51ef4c26 709 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 710 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 711 if (hbq_buf->tag == tag) {
92d7f7b0 712 return hbq_buf;
ed957684
JS		 713 }
714 }
92d7f7b0 715 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 716 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 717 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 718 return NULL;
ed957684
JS		 719}
720
721void
51ef4c26 722lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS		 723{
724 uint32_t hbqno;
725
51ef4c26
JS		 726 if (hbq_buffer) {
727 hbqno = hbq_buffer->tag >> 16;
728 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
729 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
730 }
ed957684
JS		 731 }
732}
733
dea3101e 734static int
735lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
736{
737 uint8_t ret;
738
739 switch (mbxCommand) {
740 case MBX_LOAD_SM:
741 case MBX_READ_NV:
742 case MBX_WRITE_NV:
a8adb832 743 case MBX_WRITE_VPARMS:
dea3101e 744 case MBX_RUN_BIU_DIAG:
745 case MBX_INIT_LINK:
746 case MBX_DOWN_LINK:
747 case MBX_CONFIG_LINK:
748 case MBX_CONFIG_RING:
749 case MBX_RESET_RING:
750 case MBX_READ_CONFIG:
751 case MBX_READ_RCONFIG:
752 case MBX_READ_SPARM:
753 case MBX_READ_STATUS:
754 case MBX_READ_RPI:
755 case MBX_READ_XRI:
756 case MBX_READ_REV:
757 case MBX_READ_LNK_STAT:
758 case MBX_REG_LOGIN:
759 case MBX_UNREG_LOGIN:
760 case MBX_READ_LA:
761 case MBX_CLEAR_LA:
762 case MBX_DUMP_MEMORY:
763 case MBX_DUMP_CONTEXT:
764 case MBX_RUN_DIAGS:
765 case MBX_RESTART:
766 case MBX_UPDATE_CFG:
767 case MBX_DOWN_LOAD:
768 case MBX_DEL_LD_ENTRY:
769 case MBX_RUN_PROGRAM:
770 case MBX_SET_MASK:
09372820 771 case MBX_SET_VARIABLE:
dea3101e 772 case MBX_UNREG_D_ID:
41415862 773 case MBX_KILL_BOARD:
dea3101e 774 case MBX_CONFIG_FARP:
41415862 775 case MBX_BEACON:
dea3101e 776 case MBX_LOAD_AREA:
777 case MBX_RUN_BIU_DIAG64:
778 case MBX_CONFIG_PORT:
779 case MBX_READ_SPARM64:
780 case MBX_READ_RPI64:
781 case MBX_REG_LOGIN64:
782 case MBX_READ_LA64:
09372820 783 case MBX_WRITE_WWN:
dea3101e 784 case MBX_SET_DEBUG:
785 case MBX_LOAD_EXP_ROM:
57127f15 786 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS		 787 case MBX_REG_VPI:
788 case MBX_UNREG_VPI:
858c9f6c 789 case MBX_HEARTBEAT:
dea3101e 790 ret = mbxCommand;
791 break;
792 default:
793 ret = MBX_SHUTDOWN;
794 break;
795 }
2e0fef85 796 return ret;
dea3101e 797}
798static void
2e0fef85 799lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e 800{
801 wait_queue_head_t *pdone_q;
858c9f6c 802 unsigned long drvr_flag;
dea3101e 803
804 /*
805 * If pdone_q is empty, the driver thread gave up waiting and
806 * continued running.
807 */
7054a606 808 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 809 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e 810 pdone_q = (wait_queue_head_t *) pmboxq->context1;
811 if (pdone_q)
812 wake_up_interruptible(pdone_q);
858c9f6c 813 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 814 return;
815}
816
817void
2e0fef85 818lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e 819{
820 struct lpfc_dmabuf *mp;
7054a606
JS		 821 uint16_t rpi;
822 int rc;
823
dea3101e 824 mp = (struct lpfc_dmabuf *) (pmb->context1);
7054a606 825
dea3101e 826 if (mp) {
827 lpfc_mbuf_free(phba, mp->virt, mp->phys);
828 kfree(mp);
829 }
7054a606
JS		 830
831 /*
832 * If a REG_LOGIN succeeded after node is destroyed or node
833 * is in re-discovery driver need to cleanup the RPI.
834 */
2e0fef85
JS		 835 if (!(phba->pport->load_flag & FC_UNLOADING) &&
836 pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
837 !pmb->mb.mbxStatus) {
7054a606
JS		 838
839 rpi = pmb->mb.un.varWords[0];
92d7f7b0
JS		 840 lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
841 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS		 842 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
843 if (rc != MBX_NOT_FINISHED)
844 return;
845 }
846
2e0fef85 847 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 848 return;
849}
850
851int
2e0fef85 852lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 853{
92d7f7b0 854 MAILBOX_t *pmbox;
dea3101e 855 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS		 856 int rc;
857 LIST_HEAD(cmplq);
dea3101e 858
859 phba->sli.slistat.mbox_event++;
860
92d7f7b0
JS		 861 /* Get all completed mailboxe buffers into the cmplq */
862 spin_lock_irq(&phba->hbalock);
863 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
864 spin_unlock_irq(&phba->hbalock);
dea3101e 865
92d7f7b0
JS		 866 /* Get a Mailbox buffer to setup mailbox commands for callback */
867 do {
868 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
869 if (pmb == NULL)
870 break;
2e0fef85 871
92d7f7b0 872 pmbox = &pmb->mb;
dea3101e 873
858c9f6c
JS		 874 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
875 if (pmb->vport) {
876 lpfc_debugfs_disc_trc(pmb->vport,
877 LPFC_DISC_TRC_MBOX_VPORT,
878 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
879 (uint32_t)pmbox->mbxCommand,
880 pmbox->un.varWords[0],
881 pmbox->un.varWords[1]);
882 }
883 else {
884 lpfc_debugfs_disc_trc(phba->pport,
885 LPFC_DISC_TRC_MBOX,
886 "MBOX cmpl: cmd:x%x mb:x%x x%x",
887 (uint32_t)pmbox->mbxCommand,
888 pmbox->un.varWords[0],
889 pmbox->un.varWords[1]);
890 }
891 }
892
dea3101e 893 /*
894 * It is a fatal error if unknown mbox command completion.
895 */
896 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
897 MBX_SHUTDOWN) {
dea3101e 898 /* Unknow mailbox command compl */
92d7f7b0 899 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 900 "(%d):0323 Unknown Mailbox command "
92d7f7b0 901 "%x Cmpl\n",
92d7f7b0
JS		 902 pmb->vport ? pmb->vport->vpi : 0,
903 pmbox->mbxCommand);
2e0fef85 904 phba->link_state = LPFC_HBA_ERROR;
dea3101e 905 phba->work_hs = HS_FFER3;
906 lpfc_handle_eratt(phba);
92d7f7b0 907 continue;
dea3101e 908 }
909
dea3101e 910 if (pmbox->mbxStatus) {
911 phba->sli.slistat.mbox_stat_err++;
912 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
913 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0
JS		 914 lpfc_printf_log(phba, KERN_INFO,
915 LOG_MBOX | LOG_SLI,
e8b62011 916 "(%d):0305 Mbox cmd cmpl "
92d7f7b0
JS		 917 "error - RETRYing Data: x%x "
918 "x%x x%x x%x\n",
92d7f7b0
JS		 919 pmb->vport ? pmb->vport->vpi :0,
920 pmbox->mbxCommand,
921 pmbox->mbxStatus,
922 pmbox->un.varWords[0],
923 pmb->vport->port_state);
dea3101e 924 pmbox->mbxStatus = 0;
925 pmbox->mbxOwner = OWN_HOST;
2e0fef85 926 spin_lock_irq(&phba->hbalock);
dea3101e 927 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 928 spin_unlock_irq(&phba->hbalock);
dea3101e 929 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
930 if (rc == MBX_SUCCESS)
92d7f7b0 931 continue;
dea3101e 932 }
933 }
934
935 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 936 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 937 "(%d):0307 Mailbox cmd x%x Cmpl x%p "
dea3101e 938 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
92d7f7b0 939 pmb->vport ? pmb->vport->vpi : 0,
dea3101e 940 pmbox->mbxCommand,
941 pmb->mbox_cmpl,
942 *((uint32_t *) pmbox),
943 pmbox->un.varWords[0],
944 pmbox->un.varWords[1],
945 pmbox->un.varWords[2],
946 pmbox->un.varWords[3],
947 pmbox->un.varWords[4],
948 pmbox->un.varWords[5],
949 pmbox->un.varWords[6],
950 pmbox->un.varWords[7]);
951
92d7f7b0 952 if (pmb->mbox_cmpl)
dea3101e 953 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS		 954 } while (1);
955 return 0;
956}
dea3101e 957
92d7f7b0
JS		 958static struct lpfc_dmabuf *
959lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
960{
961 struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
51ef4c26
JS		 962 uint32_t hbqno;
963 void *virt; /* virtual address ptr */
964 dma_addr_t phys; /* mapped address */
3163f725
JS		 965 unsigned long flags;
966
967 /* Check whether HBQ is still in use */
968 spin_lock_irqsave(&phba->hbalock, flags);
969 if (!phba->hbq_in_use) {
970 spin_unlock_irqrestore(&phba->hbalock, flags);
971 return NULL;
972 }
dea3101e 973
92d7f7b0 974 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
3163f725
JS		 975 if (hbq_entry == NULL) {
976 spin_unlock_irqrestore(&phba->hbalock, flags);
92d7f7b0 977 return NULL;
3163f725 978 }
92d7f7b0 979 list_del(&hbq_entry->dbuf.list);
51ef4c26
JS		 980
981 hbqno = tag >> 16;
982 new_hbq_entry = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
3163f725
JS		 983 if (new_hbq_entry == NULL) {
984 list_add_tail(&hbq_entry->dbuf.list, &phba->hbqbuf_in_list);
985 spin_unlock_irqrestore(&phba->hbalock, flags);
92d7f7b0 986 return &hbq_entry->dbuf;
3163f725 987 }
92d7f7b0 988 new_hbq_entry->tag = -1;
51ef4c26
JS		 989 phys = new_hbq_entry->dbuf.phys;
990 virt = new_hbq_entry->dbuf.virt;
991 new_hbq_entry->dbuf.phys = hbq_entry->dbuf.phys;
992 new_hbq_entry->dbuf.virt = hbq_entry->dbuf.virt;
993 hbq_entry->dbuf.phys = phys;
994 hbq_entry->dbuf.virt = virt;
92d7f7b0 995 lpfc_sli_free_hbq(phba, hbq_entry);
3163f725
JS		 996 list_add_tail(&new_hbq_entry->dbuf.list, &phba->hbqbuf_in_list);
997 spin_unlock_irqrestore(&phba->hbalock, flags);
998
92d7f7b0 999 return &new_hbq_entry->dbuf;
dea3101e 1000}
92d7f7b0 1001
76bb24ef
JS		 1002static struct lpfc_dmabuf *
1003lpfc_sli_get_buff(struct lpfc_hba *phba,
1004 struct lpfc_sli_ring *pring,
1005 uint32_t tag)
1006{
1007 if (tag & QUE_BUFTAG_BIT)
1008 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
1009 else
1010 return lpfc_sli_replace_hbqbuff(phba, tag);
1011}
57127f15 1012
dea3101e 1013static int
1014lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1015 struct lpfc_iocbq *saveq)
1016{
1017 IOCB_t * irsp;
1018 WORD5 * w5p;
1019 uint32_t Rctl, Type;
1020 uint32_t match, i;
76bb24ef 1021 struct lpfc_iocbq *iocbq;
3163f725 1022 struct lpfc_dmabuf *dmzbuf;
dea3101e 1023
1024 match = 0;
1025 irsp = &(saveq->iocb);
57127f15 1026
9c2face6
JS		 1027 if (irsp->ulpStatus == IOSTAT_NEED_BUFFER)
1028 return 1;
57127f15
JS		 1029 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
1030 if (pring->lpfc_sli_rcv_async_status)
1031 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
1032 else
1033 lpfc_printf_log(phba,
1034 KERN_WARNING,
1035 LOG_SLI,
1036 "0316 Ring %d handler: unexpected "
1037 "ASYNC_STATUS iocb received evt_code "
1038 "0x%x\n",
1039 pring->ringno,
1040 irsp->un.asyncstat.evt_code);
1041 return 1;
1042 }
1043
3163f725
JS		 1044 if ((irsp->ulpCommand == CMD_IOCB_RET_XRI64_CX) &&
1045 (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)) {
1046 if (irsp->ulpBdeCount > 0) {
1047 dmzbuf = lpfc_sli_get_buff(phba, pring,
1048 irsp->un.ulpWord[3]);
1049 lpfc_in_buf_free(phba, dmzbuf);
1050 }
1051
1052 if (irsp->ulpBdeCount > 1) {
1053 dmzbuf = lpfc_sli_get_buff(phba, pring,
1054 irsp->unsli3.sli3Words[3]);
1055 lpfc_in_buf_free(phba, dmzbuf);
1056 }
1057
1058 if (irsp->ulpBdeCount > 2) {
1059 dmzbuf = lpfc_sli_get_buff(phba, pring,
1060 irsp->unsli3.sli3Words[7]);
1061 lpfc_in_buf_free(phba, dmzbuf);
1062 }
1063
1064 return 1;
1065 }
1066
92d7f7b0 1067 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS		 1068 if (irsp->ulpBdeCount != 0) {
1069 saveq->context2 = lpfc_sli_get_buff(phba, pring,
1070 irsp->un.ulpWord[3]);
1071 if (!saveq->context2)
1072 lpfc_printf_log(phba,
1073 KERN_ERR,
1074 LOG_SLI,
1075 "0341 Ring %d Cannot find buffer for "
1076 "an unsolicited iocb. tag 0x%x\n",
1077 pring->ringno,
1078 irsp->un.ulpWord[3]);
76bb24ef
JS		 1079 }
1080 if (irsp->ulpBdeCount == 2) {
1081 saveq->context3 = lpfc_sli_get_buff(phba, pring,
1082 irsp->unsli3.sli3Words[7]);
1083 if (!saveq->context3)
1084 lpfc_printf_log(phba,
1085 KERN_ERR,
1086 LOG_SLI,
1087 "0342 Ring %d Cannot find buffer for an"
1088 " unsolicited iocb. tag 0x%x\n",
1089 pring->ringno,
1090 irsp->unsli3.sli3Words[7]);
1091 }
1092 list_for_each_entry(iocbq, &saveq->list, list) {
76bb24ef 1093 irsp = &(iocbq->iocb);
76bb24ef
JS		 1094 if (irsp->ulpBdeCount != 0) {
1095 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
1096 irsp->un.ulpWord[3]);
9c2face6 1097 if (!iocbq->context2)
76bb24ef
JS		 1098 lpfc_printf_log(phba,
1099 KERN_ERR,
1100 LOG_SLI,
1101 "0343 Ring %d Cannot find "
1102 "buffer for an unsolicited iocb"
1103 ". tag 0x%x\n", pring->ringno,
92d7f7b0 1104 irsp->un.ulpWord[3]);
76bb24ef
JS		 1105 }
1106 if (irsp->ulpBdeCount == 2) {
1107 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 1108 irsp->unsli3.sli3Words[7]);
9c2face6 1109 if (!iocbq->context3)
76bb24ef
JS		 1110 lpfc_printf_log(phba,
1111 KERN_ERR,
1112 LOG_SLI,
1113 "0344 Ring %d Cannot find "
1114 "buffer for an unsolicited "
1115 "iocb. tag 0x%x\n",
1116 pring->ringno,
1117 irsp->unsli3.sli3Words[7]);
1118 }
1119 }
92d7f7b0 1120 }
9c2face6
JS		 1121 if (irsp->ulpBdeCount != 0 &&
1122 (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
1123 irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
1124 int found = 0;
1125
1126 /* search continue save q for same XRI */
1127 list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
1128 if (iocbq->iocb.ulpContext == saveq->iocb.ulpContext) {
1129 list_add_tail(&saveq->list, &iocbq->list);
1130 found = 1;
1131 break;
1132 }
1133 }
1134 if (!found)
1135 list_add_tail(&saveq->clist,
1136 &pring->iocb_continue_saveq);
1137 if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
1138 list_del_init(&iocbq->clist);
1139 saveq = iocbq;
1140 irsp = &(saveq->iocb);
1141 } else
1142 return 0;
1143 }
1144 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
1145 (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
1146 (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
1147 Rctl = FC_ELS_REQ;
1148 Type = FC_ELS_DATA;
1149 } else {
1150 w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
1151 Rctl = w5p->hcsw.Rctl;
1152 Type = w5p->hcsw.Type;
1153
1154 /* Firmware Workaround */
1155 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
1156 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
1157 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
1158 Rctl = FC_ELS_REQ;
1159 Type = FC_ELS_DATA;
1160 w5p->hcsw.Rctl = Rctl;
1161 w5p->hcsw.Type = Type;
1162 }
1163 }
92d7f7b0 1164
dea3101e 1165 /* unSolicited Responses */
1166 if (pring->prt[0].profile) {
cf5bf97e
JW		 1167 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
1168 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
1169 saveq);
dea3101e 1170 match = 1;
1171 } else {
1172 /* We must search, based on rctl / type
1173 for the right routine */
9c2face6
JS		 1174 for (i = 0; i < pring->num_mask; i++) {
1175 if ((pring->prt[i].rctl == Rctl)
1176 && (pring->prt[i].type == Type)) {
cf5bf97e
JW		 1177 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
1178 (pring->prt[i].lpfc_sli_rcv_unsol_event)
1179 (phba, pring, saveq);
dea3101e 1180 match = 1;
1181 break;
1182 }
1183 }
1184 }
1185 if (match == 0) {
1186 /* Unexpected Rctl / Type received */
1187 /* Ring <ringno> handler: unexpected
1188 Rctl <Rctl> Type <Type> received */
92d7f7b0 1189 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1190 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 1191 "Type x%x received\n",
e8b62011 1192 pring->ringno, Rctl, Type);
dea3101e 1193 }
92d7f7b0 1194 return 1;
dea3101e 1195}
1196
1197static struct lpfc_iocbq *
2e0fef85
JS		 1198lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
1199 struct lpfc_sli_ring *pring,
1200 struct lpfc_iocbq *prspiocb)
dea3101e 1201{
dea3101e 1202 struct lpfc_iocbq *cmd_iocb = NULL;
1203 uint16_t iotag;
1204
604a3e30
JB		 1205 iotag = prspiocb->iocb.ulpIoTag;
1206
1207 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
1208 cmd_iocb = phba->sli.iocbq_lookup[iotag];
92d7f7b0 1209 list_del_init(&cmd_iocb->list);
604a3e30
JB		 1210 pring->txcmplq_cnt--;
1211 return cmd_iocb;
dea3101e 1212 }
1213
dea3101e 1214 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1215 "0317 iotag x%x is out off "
604a3e30 1216 "range: max iotag x%x wd0 x%x\n",
e8b62011 1217 iotag, phba->sli.last_iotag,
604a3e30 1218 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e 1219 return NULL;
1220}
1221
1222static int
2e0fef85 1223lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e 1224 struct lpfc_iocbq *saveq)
1225{
2e0fef85 1226 struct lpfc_iocbq *cmdiocbp;
dea3101e 1227 int rc = 1;
1228 unsigned long iflag;
1229
1230 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
2e0fef85 1231 spin_lock_irqsave(&phba->hbalock, iflag);
604a3e30 1232 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
2e0fef85
JS		 1233 spin_unlock_irqrestore(&phba->hbalock, iflag);
1234
dea3101e 1235 if (cmdiocbp) {
1236 if (cmdiocbp->iocb_cmpl) {
1237 /*
1238 * Post all ELS completions to the worker thread.
1239 * All other are passed to the completion callback.
1240 */
1241 if (pring->ringno == LPFC_ELS_RING) {
07951076
JS		 1242 if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
1243 cmdiocbp->iocb_flag &=
1244 ~LPFC_DRIVER_ABORTED;
1245 saveq->iocb.ulpStatus =
1246 IOSTAT_LOCAL_REJECT;
1247 saveq->iocb.un.ulpWord[4] =
1248 IOERR_SLI_ABORTED;
0ff10d46
JS		 1249
1250 /* Firmware could still be in progress
1251 * of DMAing payload, so don't free data
1252 * buffer till after a hbeat.
1253 */
1254 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
07951076 1255 }
dea3101e 1256 }
2e0fef85 1257 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB		 1258 } else
1259 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e 1260 } else {
1261 /*
1262 * Unknown initiating command based on the response iotag.
1263 * This could be the case on the ELS ring because of
1264 * lpfc_els_abort().
1265 */
1266 if (pring->ringno != LPFC_ELS_RING) {
1267 /*
1268 * Ring <ringno> handler: unexpected completion IoTag
1269 * <IoTag>
1270 */
e8b62011
JS		 1271 lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
1272 "0322 Ring %d handler: "
1273 "unexpected completion IoTag x%x "
1274 "Data: x%x x%x x%x x%x\n",
1275 pring->ringno,
1276 saveq->iocb.ulpIoTag,
1277 saveq->iocb.ulpStatus,
1278 saveq->iocb.un.ulpWord[4],
1279 saveq->iocb.ulpCommand,
1280 saveq->iocb.ulpContext);
dea3101e 1281 }
1282 }
68876920 1283
dea3101e 1284 return rc;
1285}
1286
2e0fef85
JS		 1287static void
1288lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 1289{
ed957684
JS		 1290 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1291 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1292 &phba->slim2p->mbx.us.s2.port[pring->ringno];
875fbdfe
JSEC		 1293 /*
1294 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1295 * rsp ring <portRspMax>
1296 */
1297 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1298 "0312 Ring %d handler: portRspPut %d "
875fbdfe 1299 "is bigger then rsp ring %d\n",
e8b62011 1300 pring->ringno, le32_to_cpu(pgp->rspPutInx),
875fbdfe
JSEC		 1301 pring->numRiocb);
1302
2e0fef85 1303 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC		 1304
1305 /*
1306 * All error attention handlers are posted to
1307 * worker thread
1308 */
1309 phba->work_ha |= HA_ERATT;
1310 phba->work_hs = HS_FFER3;
92d7f7b0
JS		 1311
1312 /* hbalock should already be held */
875fbdfe 1313 if (phba->work_wait)
92d7f7b0 1314 lpfc_worker_wake_up(phba);
875fbdfe
JSEC		 1315
1316 return;
1317}
1318
2e0fef85 1319void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
875fbdfe 1320{
2e0fef85
JS		 1321 struct lpfc_sli *psli = &phba->sli;
1322 struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
875fbdfe
JSEC		 1323 IOCB_t *irsp = NULL;
1324 IOCB_t *entry = NULL;
1325 struct lpfc_iocbq *cmdiocbq = NULL;
1326 struct lpfc_iocbq rspiocbq;
1327 struct lpfc_pgp *pgp;
1328 uint32_t status;
1329 uint32_t portRspPut, portRspMax;
1330 int type;
1331 uint32_t rsp_cmpl = 0;
875fbdfe 1332 uint32_t ha_copy;
2e0fef85 1333 unsigned long iflags;
875fbdfe
JSEC		 1334
1335 pring->stats.iocb_event++;
1336
ed957684
JS		 1337 pgp = (phba->sli_rev == 3) ?
1338 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1339 &phba->slim2p->mbx.us.s2.port[pring->ringno];
1340
875fbdfe
JSEC		 1341
1342 /*
1343 * The next available response entry should never exceed the maximum
1344 * entries. If it does, treat it as an adapter hardware error.
1345 */
1346 portRspMax = pring->numRiocb;
1347 portRspPut = le32_to_cpu(pgp->rspPutInx);
1348 if (unlikely(portRspPut >= portRspMax)) {
1349 lpfc_sli_rsp_pointers_error(phba, pring);
1350 return;
1351 }
1352
1353 rmb();
1354 while (pring->rspidx != portRspPut) {
ed957684 1355 entry = lpfc_resp_iocb(phba, pring);
875fbdfe
JSEC		 1356 if (++pring->rspidx >= portRspMax)
1357 pring->rspidx = 0;
1358
1359 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1360 (uint32_t *) &rspiocbq.iocb,
92d7f7b0 1361 phba->iocb_rsp_size);
875fbdfe
JSEC		 1362 irsp = &rspiocbq.iocb;
1363 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1364 pring->stats.iocb_rsp++;
1365 rsp_cmpl++;
1366
1367 if (unlikely(irsp->ulpStatus)) {
1368 /* Rsp ring <ringno> error: IOCB */
1369 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1370 "0326 Rsp Ring %d error: IOCB Data: "
875fbdfe 1371 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1372 pring->ringno,
875fbdfe
JSEC		 1373 irsp->un.ulpWord[0],
1374 irsp->un.ulpWord[1],
1375 irsp->un.ulpWord[2],
1376 irsp->un.ulpWord[3],
1377 irsp->un.ulpWord[4],
1378 irsp->un.ulpWord[5],
1379 *(((uint32_t *) irsp) + 6),
1380 *(((uint32_t *) irsp) + 7));
1381 }
1382
1383 switch (type) {
1384 case LPFC_ABORT_IOCB:
1385 case LPFC_SOL_IOCB:
1386 /*
1387 * Idle exchange closed via ABTS from port. No iocb
1388 * resources need to be recovered.
1389 */
1390 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1391 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 1392 "0314 IOCB cmd 0x%x "
1393 "processed. Skipping "
1394 "completion",
dca9479b 1395 irsp->ulpCommand);
875fbdfe
JSEC		 1396 break;
1397 }
1398
2e0fef85 1399 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1400 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1401 &rspiocbq);
2e0fef85 1402 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1403 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
1404 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1405 &rspiocbq);
1406 }
1407 break;
1408 default:
1409 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1410 char adaptermsg[LPFC_MAX_ADPTMSG];
1411 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1412 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1413 MAX_MSG_DATA);
898eb71c
JP		 1414 dev_warn(&((phba->pcidev)->dev),
1415 "lpfc%d: %s\n",
875fbdfe
JSEC		 1416 phba->brd_no, adaptermsg);
1417 } else {
1418 /* Unknown IOCB command */
1419 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1420 "0321 Unknown IOCB command "
875fbdfe 1421 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1422 type, irsp->ulpCommand,
875fbdfe
JSEC		 1423 irsp->ulpStatus,
1424 irsp->ulpIoTag,
1425 irsp->ulpContext);
1426 }
1427 break;
1428 }
1429
1430 /*
1431 * The response IOCB has been processed. Update the ring
1432 * pointer in SLIM. If the port response put pointer has not
1433 * been updated, sync the pgp->rspPutInx and fetch the new port
1434 * response put pointer.
1435 */
ed957684 1436 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
875fbdfe
JSEC		 1437
1438 if (pring->rspidx == portRspPut)
1439 portRspPut = le32_to_cpu(pgp->rspPutInx);
1440 }
1441
1442 ha_copy = readl(phba->HAregaddr);
1443 ha_copy >>= (LPFC_FCP_RING * 4);
1444
1445 if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
2e0fef85 1446 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1447 pring->stats.iocb_rsp_full++;
1448 status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
1449 writel(status, phba->CAregaddr);
1450 readl(phba->CAregaddr);
2e0fef85 1451 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1452 }
1453 if ((ha_copy & HA_R0CE_RSP) &&
1454 (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
2e0fef85 1455 spin_lock_irqsave(&phba->hbalock, iflags);
875fbdfe
JSEC		 1456 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1457 pring->stats.iocb_cmd_empty++;
1458
1459 /* Force update of the local copy of cmdGetInx */
1460 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1461 lpfc_sli_resume_iocb(phba, pring);
1462
1463 if ((pring->lpfc_sli_cmd_available))
1464 (pring->lpfc_sli_cmd_available) (phba, pring);
1465
2e0fef85 1466 spin_unlock_irqrestore(&phba->hbalock, iflags);
875fbdfe
JSEC		 1467 }
1468
1469 return;
1470}
1471
dea3101e 1472/*
1473 * This routine presumes LPFC_FCP_RING handling and doesn't bother
1474 * to check it explicitly.
1475 */
1476static int
2e0fef85
JS		 1477lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
1478 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1479{
ed957684
JS		 1480 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1481 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1482 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 1483 IOCB_t *irsp = NULL;
87f6eaff 1484 IOCB_t *entry = NULL;
dea3101e 1485 struct lpfc_iocbq *cmdiocbq = NULL;
1486 struct lpfc_iocbq rspiocbq;
dea3101e 1487 uint32_t status;
1488 uint32_t portRspPut, portRspMax;
1489 int rc = 1;
1490 lpfc_iocb_type type;
1491 unsigned long iflag;
1492 uint32_t rsp_cmpl = 0;
dea3101e 1493
2e0fef85 1494 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 1495 pring->stats.iocb_event++;
1496
dea3101e 1497 /*
1498 * The next available response entry should never exceed the maximum
1499 * entries. If it does, treat it as an adapter hardware error.
1500 */
1501 portRspMax = pring->numRiocb;
1502 portRspPut = le32_to_cpu(pgp->rspPutInx);
1503 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 1504 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 1505 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1506 return 1;
1507 }
1508
1509 rmb();
1510 while (pring->rspidx != portRspPut) {
87f6eaff
JSEC		 1511 /*
1512 * Fetch an entry off the ring and copy it into a local data
1513 * structure. The copy involves a byte-swap since the
1514 * network byte order and pci byte orders are different.
1515 */
ed957684 1516 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 1517 phba->last_completion_time = jiffies;
875fbdfe
JSEC		 1518
1519 if (++pring->rspidx >= portRspMax)
1520 pring->rspidx = 0;
1521
87f6eaff
JSEC		 1522 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1523 (uint32_t *) &rspiocbq.iocb,
ed957684 1524 phba->iocb_rsp_size);
a4bc3379 1525 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC		 1526 irsp = &rspiocbq.iocb;
1527
dea3101e 1528 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1529 pring->stats.iocb_rsp++;
1530 rsp_cmpl++;
1531
1532 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS		 1533 /*
1534 * If resource errors reported from HBA, reduce
1535 * queuedepths of the SCSI device.
1536 */
1537 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1538 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1539 spin_unlock_irqrestore(&phba->hbalock, iflag);
1540 lpfc_adjust_queue_depth(phba);
1541 spin_lock_irqsave(&phba->hbalock, iflag);
1542 }
1543
dea3101e 1544 /* Rsp ring <ringno> error: IOCB */
1545 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1546 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 1547 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 1548 pring->ringno,
92d7f7b0
JS		 1549 irsp->un.ulpWord[0],
1550 irsp->un.ulpWord[1],
1551 irsp->un.ulpWord[2],
1552 irsp->un.ulpWord[3],
1553 irsp->un.ulpWord[4],
1554 irsp->un.ulpWord[5],
1555 *(((uint32_t *) irsp) + 6),
1556 *(((uint32_t *) irsp) + 7));
dea3101e 1557 }
1558
1559 switch (type) {
1560 case LPFC_ABORT_IOCB:
1561 case LPFC_SOL_IOCB:
1562 /*
1563 * Idle exchange closed via ABTS from port. No iocb
1564 * resources need to be recovered.
1565 */
1566 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 1567 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 1568 "0333 IOCB cmd 0x%x"
dca9479b 1569 " processed. Skipping"
92d7f7b0 1570 " completion\n",
dca9479b 1571 irsp->ulpCommand);
dea3101e 1572 break;
1573 }
1574
604a3e30
JB		 1575 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1576 &rspiocbq);
dea3101e 1577 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
b808608b
JW		 1578 if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
1579 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1580 &rspiocbq);
1581 } else {
2e0fef85
JS		 1582 spin_unlock_irqrestore(&phba->hbalock,
1583 iflag);
b808608b
JW		 1584 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1585 &rspiocbq);
2e0fef85 1586 spin_lock_irqsave(&phba->hbalock,
b808608b
JW		 1587 iflag);
1588 }
dea3101e 1589 }
1590 break;
a4bc3379 1591 case LPFC_UNSOL_IOCB:
2e0fef85 1592 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 1593 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 1594 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 1595 break;
dea3101e 1596 default:
1597 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1598 char adaptermsg[LPFC_MAX_ADPTMSG];
1599 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1600 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1601 MAX_MSG_DATA);
898eb71c
JP		 1602 dev_warn(&((phba->pcidev)->dev),
1603 "lpfc%d: %s\n",
dea3101e 1604 phba->brd_no, adaptermsg);
1605 } else {
1606 /* Unknown IOCB command */
1607 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1608 "0334 Unknown IOCB command "
92d7f7b0 1609 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 1610 type, irsp->ulpCommand,
92d7f7b0
JS		 1611 irsp->ulpStatus,
1612 irsp->ulpIoTag,
1613 irsp->ulpContext);
dea3101e 1614 }
1615 break;
1616 }
1617
1618 /*
1619 * The response IOCB has been processed. Update the ring
1620 * pointer in SLIM. If the port response put pointer has not
1621 * been updated, sync the pgp->rspPutInx and fetch the new port
1622 * response put pointer.
1623 */
ed957684 1624 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 1625
1626 if (pring->rspidx == portRspPut)
1627 portRspPut = le32_to_cpu(pgp->rspPutInx);
1628 }
1629
1630 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1631 pring->stats.iocb_rsp_full++;
1632 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1633 writel(status, phba->CAregaddr);
1634 readl(phba->CAregaddr);
1635 }
1636 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1637 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1638 pring->stats.iocb_cmd_empty++;
1639
1640 /* Force update of the local copy of cmdGetInx */
1641 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1642 lpfc_sli_resume_iocb(phba, pring);
1643
1644 if ((pring->lpfc_sli_cmd_available))
1645 (pring->lpfc_sli_cmd_available) (phba, pring);
1646
1647 }
1648
2e0fef85 1649 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1650 return rc;
1651}
1652
dea3101e 1653int
2e0fef85
JS		 1654lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
1655 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 1656{
ed957684
JS		 1657 struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
1658 &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
1659 &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea3101e 1660 IOCB_t *entry;
1661 IOCB_t *irsp = NULL;
1662 struct lpfc_iocbq *rspiocbp = NULL;
1663 struct lpfc_iocbq *next_iocb;
1664 struct lpfc_iocbq *cmdiocbp;
1665 struct lpfc_iocbq *saveq;
dea3101e 1666 uint8_t iocb_cmd_type;
1667 lpfc_iocb_type type;
1668 uint32_t status, free_saveq;
1669 uint32_t portRspPut, portRspMax;
1670 int rc = 1;
1671 unsigned long iflag;
dea3101e 1672
2e0fef85 1673 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 1674 pring->stats.iocb_event++;
1675
dea3101e 1676 /*
1677 * The next available response entry should never exceed the maximum
1678 * entries. If it does, treat it as an adapter hardware error.
1679 */
1680 portRspMax = pring->numRiocb;
1681 portRspPut = le32_to_cpu(pgp->rspPutInx);
1682 if (portRspPut >= portRspMax) {
1683 /*
1684 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1685 * rsp ring <portRspMax>
1686 */
ed957684 1687 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1688 "0303 Ring %d handler: portRspPut %d "
dea3101e 1689 "is bigger then rsp ring %d\n",
e8b62011 1690 pring->ringno, portRspPut, portRspMax);
dea3101e 1691
2e0fef85
JS		 1692 phba->link_state = LPFC_HBA_ERROR;
1693 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1694
1695 phba->work_hs = HS_FFER3;
1696 lpfc_handle_eratt(phba);
1697
1698 return 1;
1699 }
1700
1701 rmb();
dea3101e 1702 while (pring->rspidx != portRspPut) {
1703 /*
1704 * Build a completion list and call the appropriate handler.
1705 * The process is to get the next available response iocb, get
1706 * a free iocb from the list, copy the response data into the
1707 * free iocb, insert to the continuation list, and update the
1708 * next response index to slim. This process makes response
1709 * iocb's in the ring available to DMA as fast as possible but
1710 * pays a penalty for a copy operation. Since the iocb is
1711 * only 32 bytes, this penalty is considered small relative to
1712 * the PCI reads for register values and a slim write. When
1713 * the ulpLe field is set, the entire Command has been
1714 * received.
1715 */
ed957684
JS		 1716 entry = lpfc_resp_iocb(phba, pring);
1717
858c9f6c 1718 phba->last_completion_time = jiffies;
2e0fef85 1719 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e 1720 if (rspiocbp == NULL) {
1721 printk(KERN_ERR "%s: out of buffers! Failing "
1722 "completion.\n", __FUNCTION__);
1723 break;
1724 }
1725
ed957684
JS		 1726 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
1727 phba->iocb_rsp_size);
dea3101e 1728 irsp = &rspiocbp->iocb;
1729
1730 if (++pring->rspidx >= portRspMax)
1731 pring->rspidx = 0;
1732
a58cbd52
JS		 1733 if (pring->ringno == LPFC_ELS_RING) {
1734 lpfc_debugfs_slow_ring_trc(phba,
1735 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1736 *(((uint32_t *) irsp) + 4),
1737 *(((uint32_t *) irsp) + 6),
1738 *(((uint32_t *) irsp) + 7));
1739 }
1740
ed957684 1741 writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 1742
9c2face6 1743 list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
dea3101e 1744
1745 pring->iocb_continueq_cnt++;
1746 if (irsp->ulpLe) {
1747 /*
1748 * By default, the driver expects to free all resources
1749 * associated with this iocb completion.
1750 */
1751 free_saveq = 1;
1752 saveq = list_get_first(&pring->iocb_continueq,
1753 struct lpfc_iocbq, list);
1754 irsp = &(saveq->iocb);
1755 list_del_init(&pring->iocb_continueq);
1756 pring->iocb_continueq_cnt = 0;
1757
1758 pring->stats.iocb_rsp++;
1759
92d7f7b0
JS		 1760 /*
1761 * If resource errors reported from HBA, reduce
1762 * queuedepths of the SCSI device.
1763 */
1764 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
1765 (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
1766 spin_unlock_irqrestore(&phba->hbalock, iflag);
1767 lpfc_adjust_queue_depth(phba);
1768 spin_lock_irqsave(&phba->hbalock, iflag);
1769 }
1770
dea3101e 1771 if (irsp->ulpStatus) {
1772 /* Rsp ring <ringno> error: IOCB */
ed957684 1773 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 1774 "0328 Rsp Ring %d error: "
ed957684
JS		 1775 "IOCB Data: "
1776 "x%x x%x x%x x%x "
1777 "x%x x%x x%x x%x "
1778 "x%x x%x x%x x%x "
1779 "x%x x%x x%x x%x\n",
ed957684
JS		 1780 pring->ringno,
1781 irsp->un.ulpWord[0],
1782 irsp->un.ulpWord[1],
1783 irsp->un.ulpWord[2],
1784 irsp->un.ulpWord[3],
1785 irsp->un.ulpWord[4],
1786 irsp->un.ulpWord[5],
1787 *(((uint32_t *) irsp) + 6),
1788 *(((uint32_t *) irsp) + 7),
1789 *(((uint32_t *) irsp) + 8),
1790 *(((uint32_t *) irsp) + 9),
1791 *(((uint32_t *) irsp) + 10),
1792 *(((uint32_t *) irsp) + 11),
1793 *(((uint32_t *) irsp) + 12),
1794 *(((uint32_t *) irsp) + 13),
1795 *(((uint32_t *) irsp) + 14),
1796 *(((uint32_t *) irsp) + 15));
dea3101e 1797 }
1798
1799 /*
1800 * Fetch the IOCB command type and call the correct
1801 * completion routine. Solicited and Unsolicited
1802 * IOCBs on the ELS ring get freed back to the
1803 * lpfc_iocb_list by the discovery kernel thread.
1804 */
1805 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1806 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1807 if (type == LPFC_SOL_IOCB) {
9c2face6 1808 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1809 rc = lpfc_sli_process_sol_iocb(phba, pring,
2e0fef85
JS		 1810 saveq);
1811 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 1812 } else if (type == LPFC_UNSOL_IOCB) {
9c2face6 1813 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1814 rc = lpfc_sli_process_unsol_iocb(phba, pring,
2e0fef85
JS		 1815 saveq);
1816 spin_lock_irqsave(&phba->hbalock, iflag);
9c2face6
JS		 1817 if (!rc)
1818 free_saveq = 0;
dea3101e 1819 } else if (type == LPFC_ABORT_IOCB) {
1820 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1821 ((cmdiocbp =
604a3e30
JB		 1822 lpfc_sli_iocbq_lookup(phba, pring,
1823 saveq)))) {
dea3101e 1824 /* Call the specified completion
1825 routine */
1826 if (cmdiocbp->iocb_cmpl) {
1827 spin_unlock_irqrestore(
2e0fef85 1828 &phba->hbalock,
dea3101e 1829 iflag);
1830 (cmdiocbp->iocb_cmpl) (phba,
1831 cmdiocbp, saveq);
1832 spin_lock_irqsave(
2e0fef85 1833 &phba->hbalock,
dea3101e 1834 iflag);
604a3e30 1835 } else
2e0fef85 1836 __lpfc_sli_release_iocbq(phba,
604a3e30 1837 cmdiocbp);
dea3101e 1838 }
1839 } else if (type == LPFC_UNKNOWN_IOCB) {
1840 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1841
1842 char adaptermsg[LPFC_MAX_ADPTMSG];
1843
1844 memset(adaptermsg, 0,
1845 LPFC_MAX_ADPTMSG);
1846 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1847 MAX_MSG_DATA);
1848 dev_warn(&((phba->pcidev)->dev),
898eb71c 1849 "lpfc%d: %s\n",
dea3101e 1850 phba->brd_no, adaptermsg);
1851 } else {
1852 /* Unknown IOCB command */
92d7f7b0 1853 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1854 "0335 Unknown IOCB "
92d7f7b0
JS		 1855 "command Data: x%x "
1856 "x%x x%x x%x\n",
92d7f7b0
JS		 1857 irsp->ulpCommand,
1858 irsp->ulpStatus,
1859 irsp->ulpIoTag,
1860 irsp->ulpContext);
dea3101e 1861 }
1862 }
1863
1864 if (free_saveq) {
2e0fef85
JS		 1865 list_for_each_entry_safe(rspiocbp, next_iocb,
1866 &saveq->list, list) {
1867 list_del(&rspiocbp->list);
1868 __lpfc_sli_release_iocbq(phba,
1869 rspiocbp);
dea3101e 1870 }
2e0fef85 1871 __lpfc_sli_release_iocbq(phba, saveq);
dea3101e 1872 }
92d7f7b0 1873 rspiocbp = NULL;
dea3101e 1874 }
1875
1876 /*
1877 * If the port response put pointer has not been updated, sync
1878 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1879 * response put pointer.
1880 */
1881 if (pring->rspidx == portRspPut) {
1882 portRspPut = le32_to_cpu(pgp->rspPutInx);
1883 }
1884 } /* while (pring->rspidx != portRspPut) */
1885
92d7f7b0 1886 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e 1887 /* At least one response entry has been freed */
1888 pring->stats.iocb_rsp_full++;
1889 /* SET RxRE_RSP in Chip Att register */
1890 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1891 writel(status, phba->CAregaddr);
1892 readl(phba->CAregaddr); /* flush */
1893 }
1894 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1895 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1896 pring->stats.iocb_cmd_empty++;
1897
1898 /* Force update of the local copy of cmdGetInx */
1899 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1900 lpfc_sli_resume_iocb(phba, pring);
1901
1902 if ((pring->lpfc_sli_cmd_available))
1903 (pring->lpfc_sli_cmd_available) (phba, pring);
1904
1905 }
1906
2e0fef85 1907 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 1908 return rc;
1909}
1910
2e0fef85 1911void
dea3101e 1912lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1913{
2534ba75 1914 LIST_HEAD(completions);
dea3101e 1915 struct lpfc_iocbq *iocb, *next_iocb;
2534ba75 1916 IOCB_t *cmd = NULL;
dea3101e 1917
92d7f7b0
JS		 1918 if (pring->ringno == LPFC_ELS_RING) {
1919 lpfc_fabric_abort_hba(phba);
1920 }
1921
dea3101e 1922 /* Error everything on txq and txcmplq
1923 * First do the txq.
1924 */
2e0fef85 1925 spin_lock_irq(&phba->hbalock);
2534ba75 1926 list_splice_init(&pring->txq, &completions);
dea3101e 1927 pring->txq_cnt = 0;
dea3101e 1928
1929 /* Next issue ABTS for everything on the txcmplq */
2534ba75
JS		 1930 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
1931 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
dea3101e 1932
2e0fef85 1933 spin_unlock_irq(&phba->hbalock);
dea3101e 1934
2534ba75
JS		 1935 while (!list_empty(&completions)) {
1936 iocb = list_get_first(&completions, struct lpfc_iocbq, list);
1937 cmd = &iocb->iocb;
92d7f7b0 1938 list_del_init(&iocb->list);
dea3101e 1939
2e0fef85
JS		 1940 if (!iocb->iocb_cmpl)
1941 lpfc_sli_release_iocbq(phba, iocb);
1942 else {
dea3101e 1943 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1944 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
dea3101e 1945 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 1946 }
dea3101e 1947 }
dea3101e 1948}
1949
41415862 1950int
2e0fef85 1951lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
dea3101e 1952{
41415862
JW		 1953 uint32_t status;
1954 int i = 0;
1955 int retval = 0;
dea3101e 1956
41415862
JW		 1957 /* Read the HBA Host Status Register */
1958 status = readl(phba->HSregaddr);
dea3101e 1959
41415862
JW		 1960 /*
1961 * Check status register every 100ms for 5 retries, then every
1962 * 500ms for 5, then every 2.5 sec for 5, then reset board and
1963 * every 2.5 sec for 4.
1964 * Break our of the loop if errors occurred during init.
1965 */
1966 while (((status & mask) != mask) &&
1967 !(status & HS_FFERM) &&
1968 i++ < 20) {
dea3101e 1969
41415862
JW		 1970 if (i <= 5)
1971 msleep(10);
1972 else if (i <= 10)
1973 msleep(500);
1974 else
1975 msleep(2500);
dea3101e 1976
41415862 1977 if (i == 15) {
2e0fef85 1978 /* Do post */
92d7f7b0 1979 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW		 1980 lpfc_sli_brdrestart(phba);
1981 }
1982 /* Read the HBA Host Status Register */
1983 status = readl(phba->HSregaddr);
1984 }
dea3101e 1985
41415862
JW		 1986 /* Check to see if any errors occurred during init */
1987 if ((status & HS_FFERM) || (i >= 20)) {
2e0fef85 1988 phba->link_state = LPFC_HBA_ERROR;
41415862 1989 retval = 1;
dea3101e 1990 }
dea3101e 1991
41415862
JW		 1992 return retval;
1993}
dea3101e 1994
9290831f
JS		 1995#define BARRIER_TEST_PATTERN (0xdeadbeef)
1996
2e0fef85 1997void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 1998{
65a29c16
JS		 1999 uint32_t __iomem *resp_buf;
2000 uint32_t __iomem *mbox_buf;
9290831f
JS		 2001 volatile uint32_t mbox;
2002 uint32_t hc_copy;
2003 int i;
2004 uint8_t hdrtype;
2005
2006 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
2007 if (hdrtype != 0x80 ||
2008 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
2009 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
2010 return;
2011
2012 /*
2013 * Tell the other part of the chip to suspend temporarily all
2014 * its DMA activity.
2015 */
65a29c16 2016 resp_buf = phba->MBslimaddr;
9290831f
JS		 2017
2018 /* Disable the error attention */
2019 hc_copy = readl(phba->HCregaddr);
2020 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
2021 readl(phba->HCregaddr); /* flush */
2e0fef85 2022 phba->link_flag |= LS_IGNORE_ERATT;
9290831f
JS		 2023
2024 if (readl(phba->HAregaddr) & HA_ERATT) {
2025 /* Clear Chip error bit */
2026 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 2027 phba->pport->stopped = 1;
9290831f
JS		 2028 }
2029
2030 mbox = 0;
2031 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
2032 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
2033
2034 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 2035 mbox_buf = phba->MBslimaddr;
9290831f
JS		 2036 writel(mbox, mbox_buf);
2037
2038 for (i = 0;
2039 readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
2040 mdelay(1);
2041
2042 if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
2043 if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
2e0fef85 2044 phba->pport->stopped)
9290831f
JS		 2045 goto restore_hc;
2046 else
2047 goto clear_errat;
2048 }
2049
2050 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
2051 for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
2052 mdelay(1);
2053
2054clear_errat:
2055
2056 while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
2057 mdelay(1);
2058
2059 if (readl(phba->HAregaddr) & HA_ERATT) {
2060 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 2061 phba->pport->stopped = 1;
9290831f
JS		 2062 }
2063
2064restore_hc:
2e0fef85 2065 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS		 2066 writel(hc_copy, phba->HCregaddr);
2067 readl(phba->HCregaddr); /* flush */
2068}
2069
41415862 2070int
2e0fef85 2071lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW		 2072{
2073 struct lpfc_sli *psli;
2074 LPFC_MBOXQ_t *pmb;
2075 uint32_t status;
2076 uint32_t ha_copy;
2077 int retval;
2078 int i = 0;
dea3101e 2079
41415862 2080 psli = &phba->sli;
dea3101e 2081
41415862 2082 /* Kill HBA */
ed957684 2083 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 2084 "0329 Kill HBA Data: x%x x%x\n",
2085 phba->pport->port_state, psli->sli_flag);
41415862 2086
98c9ea5c
JS		 2087 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2088 if (!pmb)
41415862 2089 return 1;
41415862
JW		 2090
2091 /* Disable the error attention */
2e0fef85 2092 spin_lock_irq(&phba->hbalock);
41415862
JW		 2093 status = readl(phba->HCregaddr);
2094 status &= ~HC_ERINT_ENA;
2095 writel(status, phba->HCregaddr);
2096 readl(phba->HCregaddr); /* flush */
2e0fef85
JS		 2097 phba->link_flag |= LS_IGNORE_ERATT;
2098 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2099
2100 lpfc_kill_board(phba, pmb);
2101 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
2102 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2103
2104 if (retval != MBX_SUCCESS) {
2105 if (retval != MBX_BUSY)
2106 mempool_free(pmb, phba->mbox_mem_pool);
2e0fef85
JS		 2107 spin_lock_irq(&phba->hbalock);
2108 phba->link_flag &= ~LS_IGNORE_ERATT;
2109 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2110 return 1;
2111 }
2112
9290831f
JS		 2113 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
2114
41415862
JW		 2115 mempool_free(pmb, phba->mbox_mem_pool);
2116
2117 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
2118 * attention every 100ms for 3 seconds. If we don't get ERATT after
2119 * 3 seconds we still set HBA_ERROR state because the status of the
2120 * board is now undefined.
2121 */
2122 ha_copy = readl(phba->HAregaddr);
2123
2124 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
2125 mdelay(100);
2126 ha_copy = readl(phba->HAregaddr);
2127 }
2128
2129 del_timer_sync(&psli->mbox_tmo);
9290831f
JS		 2130 if (ha_copy & HA_ERATT) {
2131 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 2132 phba->pport->stopped = 1;
9290831f 2133 }
2e0fef85 2134 spin_lock_irq(&phba->hbalock);
41415862 2135 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85
JS		 2136 phba->link_flag &= ~LS_IGNORE_ERATT;
2137 spin_unlock_irq(&phba->hbalock);
41415862
JW		 2138
2139 psli->mbox_active = NULL;
2140 lpfc_hba_down_post(phba);
2e0fef85 2141 phba->link_state = LPFC_HBA_ERROR;
41415862 2142
2e0fef85 2143 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e 2144}
2145
41415862 2146int
2e0fef85 2147lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 2148{
41415862 2149 struct lpfc_sli *psli;
dea3101e 2150 struct lpfc_sli_ring *pring;
41415862 2151 uint16_t cfg_value;
dea3101e 2152 int i;
dea3101e 2153
41415862 2154 psli = &phba->sli;
dea3101e 2155
41415862
JW		 2156 /* Reset HBA */
2157 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 2158 "0325 Reset HBA Data: x%x x%x\n",
2e0fef85 2159 phba->pport->port_state, psli->sli_flag);
dea3101e 2160
2161 /* perform board reset */
2162 phba->fc_eventTag = 0;
2e0fef85
JS		 2163 phba->pport->fc_myDID = 0;
2164 phba->pport->fc_prevDID = 0;
dea3101e 2165
41415862
JW		 2166 /* Turn off parity checking and serr during the physical reset */
2167 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
2168 pci_write_config_word(phba->pcidev, PCI_COMMAND,
2169 (cfg_value &
2170 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
2171
1c067a42 2172 psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
41415862
JW		 2173 /* Now toggle INITFF bit in the Host Control Register */
2174 writel(HC_INITFF, phba->HCregaddr);
2175 mdelay(1);
2176 readl(phba->HCregaddr); /* flush */
2177 writel(0, phba->HCregaddr);
2178 readl(phba->HCregaddr); /* flush */
2179
2180 /* Restore PCI cmd register */
2181 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e 2182
2183 /* Initialize relevant SLI info */
41415862
JW		 2184 for (i = 0; i < psli->num_rings; i++) {
2185 pring = &psli->ring[i];
dea3101e 2186 pring->flag = 0;
2187 pring->rspidx = 0;
2188 pring->next_cmdidx = 0;
2189 pring->local_getidx = 0;
2190 pring->cmdidx = 0;
2191 pring->missbufcnt = 0;
2192 }
dea3101e 2193
2e0fef85 2194 phba->link_state = LPFC_WARM_START;
41415862
JW		 2195 return 0;
2196}
2197
2198int
2e0fef85 2199lpfc_sli_brdrestart(struct lpfc_hba *phba)
41415862
JW		 2200{
2201 MAILBOX_t *mb;
2202 struct lpfc_sli *psli;
2203 uint16_t skip_post;
2204 volatile uint32_t word0;
2205 void __iomem *to_slim;
2206
2e0fef85 2207 spin_lock_irq(&phba->hbalock);
41415862
JW		 2208
2209 psli = &phba->sli;
2210
2211 /* Restart HBA */
2212 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 2213 "0337 Restart HBA Data: x%x x%x\n",
2e0fef85 2214 phba->pport->port_state, psli->sli_flag);
41415862
JW		 2215
2216 word0 = 0;
2217 mb = (MAILBOX_t *) &word0;
2218 mb->mbxCommand = MBX_RESTART;
2219 mb->mbxHc = 1;
2220
9290831f
JS		 2221 lpfc_reset_barrier(phba);
2222
41415862
JW		 2223 to_slim = phba->MBslimaddr;
2224 writel(*(uint32_t *) mb, to_slim);
2225 readl(to_slim); /* flush */
2226
2227 /* Only skip post after fc_ffinit is completed */
2e0fef85 2228 if (phba->pport->port_state) {
41415862
JW		 2229 skip_post = 1;
2230 word0 = 1; /* This is really setting up word1 */
dea3101e 2231 } else {
41415862
JW		 2232 skip_post = 0;
2233 word0 = 0; /* This is really setting up word1 */
dea3101e 2234 }
65a29c16 2235 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW		 2236 writel(*(uint32_t *) mb, to_slim);
2237 readl(to_slim); /* flush */
dea3101e 2238
41415862 2239 lpfc_sli_brdreset(phba);
2e0fef85
JS		 2240 phba->pport->stopped = 0;
2241 phba->link_state = LPFC_INIT_START;
41415862 2242
2e0fef85 2243 spin_unlock_irq(&phba->hbalock);
41415862 2244
64ba8818
JS		 2245 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
2246 psli->stats_start = get_seconds();
2247
41415862
JW		 2248 if (skip_post)
2249 mdelay(100);
2250 else
2251 mdelay(2000);
2252
2253 lpfc_hba_down_post(phba);
dea3101e 2254
2255 return 0;
2256}
2257
2258static int
2259lpfc_sli_chipset_init(struct lpfc_hba *phba)
2260{
2261 uint32_t status, i = 0;
2262
2263 /* Read the HBA Host Status Register */
2264 status = readl(phba->HSregaddr);
2265
2266 /* Check status register to see what current state is */
2267 i = 0;
2268 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
2269
2270 /* Check every 100ms for 5 retries, then every 500ms for 5, then
2271 * every 2.5 sec for 5, then reset board and every 2.5 sec for
2272 * 4.
2273 */
2274 if (i++ >= 20) {
2275 /* Adapter failed to init, timeout, status reg
2276 <status> */
ed957684 2277 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2278 "0436 Adapter failed to init, "
09372820
JS		 2279 "timeout, status reg x%x, "
2280 "FW Data: A8 x%x AC x%x\n", status,
2281 readl(phba->MBslimaddr + 0xa8),
2282 readl(phba->MBslimaddr + 0xac));
2e0fef85 2283 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2284 return -ETIMEDOUT;
2285 }
2286
2287 /* Check to see if any errors occurred during init */
2288 if (status & HS_FFERM) {
2289 /* ERROR: During chipset initialization */
2290 /* Adapter failed to init, chipset, status reg
2291 <status> */
ed957684 2292 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2293 "0437 Adapter failed to init, "
09372820
JS		 2294 "chipset, status reg x%x, "
2295 "FW Data: A8 x%x AC x%x\n", status,
2296 readl(phba->MBslimaddr + 0xa8),
2297 readl(phba->MBslimaddr + 0xac));
2e0fef85 2298 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2299 return -EIO;
2300 }
2301
2302 if (i <= 5) {
2303 msleep(10);
2304 } else if (i <= 10) {
2305 msleep(500);
2306 } else {
2307 msleep(2500);
2308 }
2309
2310 if (i == 15) {
2e0fef85 2311 /* Do post */
92d7f7b0 2312 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2313 lpfc_sli_brdrestart(phba);
dea3101e 2314 }
2315 /* Read the HBA Host Status Register */
2316 status = readl(phba->HSregaddr);
2317 }
2318
2319 /* Check to see if any errors occurred during init */
2320 if (status & HS_FFERM) {
2321 /* ERROR: During chipset initialization */
2322 /* Adapter failed to init, chipset, status reg <status> */
ed957684 2323 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2324 "0438 Adapter failed to init, chipset, "
09372820
JS		 2325 "status reg x%x, "
2326 "FW Data: A8 x%x AC x%x\n", status,
2327 readl(phba->MBslimaddr + 0xa8),
2328 readl(phba->MBslimaddr + 0xac));
2e0fef85 2329 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2330 return -EIO;
2331 }
2332
2333 /* Clear all interrupt enable conditions */
2334 writel(0, phba->HCregaddr);
2335 readl(phba->HCregaddr); /* flush */
2336
2337 /* setup host attn register */
2338 writel(0xffffffff, phba->HAregaddr);
2339 readl(phba->HAregaddr); /* flush */
2340 return 0;
2341}
2342
78b2d852 2343int
ed957684
JS		 2344lpfc_sli_hbq_count(void)
2345{
92d7f7b0 2346 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS		 2347}
2348
2349static int
2350lpfc_sli_hbq_entry_count(void)
2351{
2352 int hbq_count = lpfc_sli_hbq_count();
2353 int count = 0;
2354 int i;
2355
2356 for (i = 0; i < hbq_count; ++i)
92d7f7b0 2357 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS		 2358 return count;
2359}
2360
dea3101e 2361int
ed957684
JS		 2362lpfc_sli_hbq_size(void)
2363{
2364 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
2365}
2366
2367static int
2368lpfc_sli_hbq_setup(struct lpfc_hba *phba)
2369{
2370 int hbq_count = lpfc_sli_hbq_count();
2371 LPFC_MBOXQ_t *pmb;
2372 MAILBOX_t *pmbox;
2373 uint32_t hbqno;
2374 uint32_t hbq_entry_index;
ed957684 2375
92d7f7b0
JS		 2376 /* Get a Mailbox buffer to setup mailbox
2377 * commands for HBA initialization
2378 */
ed957684
JS		 2379 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2380
2381 if (!pmb)
2382 return -ENOMEM;
2383
2384 pmbox = &pmb->mb;
2385
2386 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
2387 phba->link_state = LPFC_INIT_MBX_CMDS;
3163f725 2388 phba->hbq_in_use = 1;
ed957684
JS		 2389
2390 hbq_entry_index = 0;
2391 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2392 phba->hbqs[hbqno].next_hbqPutIdx = 0;
2393 phba->hbqs[hbqno].hbqPutIdx = 0;
2394 phba->hbqs[hbqno].local_hbqGetIdx = 0;
2395 phba->hbqs[hbqno].entry_count =
92d7f7b0 2396 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS		 2397 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
2398 hbq_entry_index, pmb);
ed957684
JS		 2399 hbq_entry_index += phba->hbqs[hbqno].entry_count;
2400
2401 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
2402 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
2403 mbxStatus <status>, ring <num> */
2404
2405 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2406 LOG_SLI | LOG_VPORT,
e8b62011 2407 "1805 Adapter failed to init. "
ed957684 2408 "Data: x%x x%x x%x\n",
e8b62011 2409 pmbox->mbxCommand,
ed957684
JS		 2410 pmbox->mbxStatus, hbqno);
2411
2412 phba->link_state = LPFC_HBA_ERROR;
2413 mempool_free(pmb, phba->mbox_mem_pool);
ed957684
JS		 2414 return ENXIO;
2415 }
2416 }
2417 phba->hbq_count = hbq_count;
2418
ed957684
JS		 2419 mempool_free(pmb, phba->mbox_mem_pool);
2420
92d7f7b0
JS		 2421 /* Initially populate or replenish the HBQs */
2422 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
2423 if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
2424 return -ENOMEM;
2425 }
ed957684
JS		 2426 return 0;
2427}
2428
2429static int
2430lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e 2431{
2432 LPFC_MBOXQ_t *pmb;
2433 uint32_t resetcount = 0, rc = 0, done = 0;
2434
2435 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2436 if (!pmb) {
2e0fef85 2437 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2438 return -ENOMEM;
2439 }
2440
ed957684 2441 phba->sli_rev = sli_mode;
dea3101e 2442 while (resetcount < 2 && !done) {
2e0fef85 2443 spin_lock_irq(&phba->hbalock);
1c067a42 2444 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2445 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2446 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 2447 lpfc_sli_brdrestart(phba);
dea3101e 2448 msleep(2500);
2449 rc = lpfc_sli_chipset_init(phba);
2450 if (rc)
2451 break;
2452
2e0fef85 2453 spin_lock_irq(&phba->hbalock);
1c067a42 2454 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2455 spin_unlock_irq(&phba->hbalock);
dea3101e 2456 resetcount++;
2457
ed957684
JS		 2458 /* Call pre CONFIG_PORT mailbox command initialization. A
2459 * value of 0 means the call was successful. Any other
2460 * nonzero value is a failure, but if ERESTART is returned,
2461 * the driver may reset the HBA and try again.
2462 */
dea3101e 2463 rc = lpfc_config_port_prep(phba);
2464 if (rc == -ERESTART) {
ed957684 2465 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e 2466 continue;
2467 } else if (rc) {
2468 break;
2469 }
2470
2e0fef85 2471 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 2472 lpfc_config_port(phba, pmb);
2473 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
ed957684 2474 if (rc != MBX_SUCCESS) {
dea3101e 2475 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 2476 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 2477 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
e8b62011 2478 pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
2e0fef85 2479 spin_lock_irq(&phba->hbalock);
dea3101e 2480 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85
JS		 2481 spin_unlock_irq(&phba->hbalock);
2482 rc = -ENXIO;
ed957684
JS		 2483 } else {
2484 done = 1;
92d7f7b0
JS		 2485 phba->max_vpi = (phba->max_vpi &&
2486 pmb->mb.un.varCfgPort.gmv) != 0
2487 ? pmb->mb.un.varCfgPort.max_vpi
2488 : 0;
dea3101e 2489 }
2490 }
ed957684
JS		 2491
2492 if (!done) {
2493 rc = -EINVAL;
2494 goto do_prep_failed;
2495 }
2496
2497 if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
92d7f7b0 2498 (!pmb->mb.un.varCfgPort.cMA)) {
ed957684 2499 rc = -ENXIO;
ed957684 2500 }
ed957684 2501
92d7f7b0 2502do_prep_failed:
ed957684
JS		 2503 mempool_free(pmb, phba->mbox_mem_pool);
2504 return rc;
2505}
2506
2507int
2508lpfc_sli_hba_setup(struct lpfc_hba *phba)
2509{
2510 uint32_t rc;
92d7f7b0 2511 int mode = 3;
ed957684
JS		 2512
2513 switch (lpfc_sli_mode) {
2514 case 2:
78b2d852 2515 if (phba->cfg_enable_npiv) {
92d7f7b0 2516 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011 2517 "1824 NPIV enabled: Override lpfc_sli_mode "
92d7f7b0 2518 "parameter (%d) to auto (0).\n",
e8b62011 2519 lpfc_sli_mode);
92d7f7b0
JS		 2520 break;
2521 }
ed957684
JS		 2522 mode = 2;
2523 break;
2524 case 0:
2525 case 3:
2526 break;
2527 default:
92d7f7b0 2528 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2529 "1819 Unrecognized lpfc_sli_mode "
2530 "parameter: %d.\n", lpfc_sli_mode);
ed957684
JS		 2531
2532 break;
2533 }
2534
2535 rc = lpfc_do_config_port(phba, mode);
2536 if (rc && lpfc_sli_mode == 3)
92d7f7b0 2537 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS		 2538 "1820 Unable to select SLI-3. "
2539 "Not supported by adapter.\n");
ed957684
JS		 2540 if (rc && mode != 2)
2541 rc = lpfc_do_config_port(phba, 2);
2542 if (rc)
dea3101e 2543 goto lpfc_sli_hba_setup_error;
2544
ed957684
JS		 2545 if (phba->sli_rev == 3) {
2546 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
2547 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
2548 phba->sli3_options |= LPFC_SLI3_ENABLED;
2549 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
2550
2551 } else {
2552 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
2553 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 2554 phba->sli3_options = 0;
ed957684
JS		 2555 }
2556
2557 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 2558 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
2559 phba->sli_rev, phba->max_vpi);
ed957684 2560 rc = lpfc_sli_ring_map(phba);
dea3101e 2561
2562 if (rc)
2563 goto lpfc_sli_hba_setup_error;
2564
92d7f7b0 2565 /* Init HBQs */
ed957684
JS		 2566
2567 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
2568 rc = lpfc_sli_hbq_setup(phba);
2569 if (rc)
2570 goto lpfc_sli_hba_setup_error;
2571 }
2572
dea3101e 2573 phba->sli.sli_flag |= LPFC_PROCESS_LA;
2574
2575 rc = lpfc_config_port_post(phba);
2576 if (rc)
2577 goto lpfc_sli_hba_setup_error;
2578
ed957684
JS		 2579 return rc;
2580
92d7f7b0 2581lpfc_sli_hba_setup_error:
2e0fef85 2582 phba->link_state = LPFC_HBA_ERROR;
ed957684 2583 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2584 "0445 Firmware initialization failed\n");
dea3101e 2585 return rc;
2586}
2587
dea3101e 2588/*! lpfc_mbox_timeout
2589 *
2590 * \pre
2591 * \post
2592 * \param hba Pointer to per struct lpfc_hba structure
2593 * \param l1 Pointer to the driver's mailbox queue.
2594 * \return
2595 * void
2596 *
2597 * \b Description:
2598 *
2599 * This routine handles mailbox timeout events at timer interrupt context.
2600 */
2601void
2602lpfc_mbox_timeout(unsigned long ptr)
2603{
92d7f7b0 2604 struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
dea3101e 2605 unsigned long iflag;
2e0fef85 2606 uint32_t tmo_posted;
dea3101e 2607
2e0fef85 2608 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
92d7f7b0 2609 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
2e0fef85
JS		 2610 if (!tmo_posted)
2611 phba->pport->work_port_events |= WORKER_MBOX_TMO;
2612 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
2613
2614 if (!tmo_posted) {
92d7f7b0 2615 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 2616 if (phba->work_wait)
92d7f7b0
JS		 2617 lpfc_worker_wake_up(phba);
2618 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 2619 }
dea3101e 2620}
2621
2622void
2623lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
2624{
2e0fef85
JS		 2625 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
2626 MAILBOX_t *mb = &pmbox->mb;
1dcb58e5
JS		 2627 struct lpfc_sli *psli = &phba->sli;
2628 struct lpfc_sli_ring *pring;
dea3101e 2629
2e0fef85 2630 if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
dea3101e 2631 return;
2632 }
2633
dea3101e 2634 /* Mbox cmd <mbxCommand> timeout */
ed957684 2635 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2636 "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
92d7f7b0
JS		 2637 mb->mbxCommand,
2638 phba->pport->port_state,
2639 phba->sli.sli_flag,
2640 phba->sli.mbox_active);
dea3101e 2641
1dcb58e5
JS		 2642 /* Setting state unknown so lpfc_sli_abort_iocb_ring
2643 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
2644 * it to fail all oustanding SCSI IO.
2645 */
2e0fef85
JS		 2646 spin_lock_irq(&phba->pport->work_port_lock);
2647 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
2648 spin_unlock_irq(&phba->pport->work_port_lock);
2649 spin_lock_irq(&phba->hbalock);
2650 phba->link_state = LPFC_LINK_UNKNOWN;
2651 phba->pport->fc_flag |= FC_ESTABLISH_LINK;
1dcb58e5 2652 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
2e0fef85 2653 spin_unlock_irq(&phba->hbalock);
1dcb58e5
JS		 2654
2655 pring = &psli->ring[psli->fcp_ring];
2656 lpfc_sli_abort_iocb_ring(phba, pring);
2657
2658 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
76bb24ef 2659 "0345 Resetting board due to mailbox timeout\n");
1dcb58e5
JS		 2660 /*
2661 * lpfc_offline calls lpfc_sli_hba_down which will clean up
2662 * on oustanding mailbox commands.
2663 */
13815c83
JS		 2664 /* If resets are disabled then set error state and return. */
2665 if (!phba->cfg_enable_hba_reset) {
2666 phba->link_state = LPFC_HBA_ERROR;
2667 return;
2668 }
1dcb58e5
JS		 2669 lpfc_offline_prep(phba);
2670 lpfc_offline(phba);
2671 lpfc_sli_brdrestart(phba);
2672 if (lpfc_online(phba) == 0) /* Initialize the HBA */
2673 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
2674 lpfc_unblock_mgmt_io(phba);
dea3101e 2675 return;
2676}
2677
2678int
2e0fef85 2679lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
dea3101e 2680{
dea3101e 2681 MAILBOX_t *mb;
2e0fef85 2682 struct lpfc_sli *psli = &phba->sli;
dea3101e 2683 uint32_t status, evtctr;
2684 uint32_t ha_copy;
2685 int i;
09372820 2686 unsigned long timeout;
dea3101e 2687 unsigned long drvr_flag = 0;
2688 volatile uint32_t word0, ldata;
2689 void __iomem *to_slim;
2690
ed957684 2691 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 2692 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684
JS		 2693 if(!pmbox->vport) {
2694 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 2695 LOG_MBOX | LOG_VPORT,
e8b62011 2696 "1806 Mbox x%x failed. No vport\n",
ed957684
JS		 2697 pmbox->mb.mbxCommand);
2698 dump_stack();
fa4066b6 2699 return MBX_NOT_FINISHED;
ed957684
JS		 2700 }
2701 }
2702
92d7f7b0 2703
8d63f375
LV		 2704 /* If the PCI channel is in offline state, do not post mbox. */
2705 if (unlikely(pci_channel_offline(phba->pcidev)))
2706 return MBX_NOT_FINISHED;
2707
2e0fef85 2708 spin_lock_irqsave(&phba->hbalock, drvr_flag);
dea3101e 2709 psli = &phba->sli;
92d7f7b0
JS		 2710
2711
dea3101e 2712 mb = &pmbox->mb;
2713 status = MBX_SUCCESS;
2714
2e0fef85
JS		 2715 if (phba->link_state == LPFC_HBA_ERROR) {
2716 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW		 2717
2718 /* Mbox command <mbxCommand> cannot issue */
7f5f3d0d 2719 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2720 return MBX_NOT_FINISHED;
41415862
JW		 2721 }
2722
9290831f
JS		 2723 if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
2724 !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
2e0fef85 2725 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
7f5f3d0d 2726 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2727 return MBX_NOT_FINISHED;
9290831f
JS		 2728 }
2729
dea3101e 2730 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
2731 /* Polling for a mbox command when another one is already active
2732 * is not allowed in SLI. Also, the driver must have established
2733 * SLI2 mode to queue and process multiple mbox commands.
2734 */
2735
2736 if (flag & MBX_POLL) {
2e0fef85 2737 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2738
2739 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2740 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2741 return MBX_NOT_FINISHED;
dea3101e 2742 }
2743
2744 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
2e0fef85 2745 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2746 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2747 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2748 return MBX_NOT_FINISHED;
dea3101e 2749 }
2750
dea3101e 2751 /* Another mailbox command is still being processed, queue this
2752 * command to be processed later.
2753 */
2754 lpfc_mbox_put(phba, pmbox);
2755
2756 /* Mbox cmd issue - BUSY */
ed957684 2757 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2758 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 2759 "x%x x%x x%x x%x\n",
92d7f7b0
JS		 2760 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
2761 mb->mbxCommand, phba->pport->port_state,
2762 psli->sli_flag, flag);
dea3101e 2763
2764 psli->slistat.mbox_busy++;
2e0fef85 2765 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2766
858c9f6c
JS		 2767 if (pmbox->vport) {
2768 lpfc_debugfs_disc_trc(pmbox->vport,
2769 LPFC_DISC_TRC_MBOX_VPORT,
2770 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
2771 (uint32_t)mb->mbxCommand,
2772 mb->un.varWords[0], mb->un.varWords[1]);
2773 }
2774 else {
2775 lpfc_debugfs_disc_trc(phba->pport,
2776 LPFC_DISC_TRC_MBOX,
2777 "MBOX Bsy: cmd:x%x mb:x%x x%x",
2778 (uint32_t)mb->mbxCommand,
2779 mb->un.varWords[0], mb->un.varWords[1]);
2780 }
2781
2e0fef85 2782 return MBX_BUSY;
dea3101e 2783 }
2784
dea3101e 2785 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2786
2787 /* If we are not polling, we MUST be in SLI2 mode */
2788 if (flag != MBX_POLL) {
41415862
JW		 2789 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
2790 (mb->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 2791 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2792 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2793 /* Mbox command <mbxCommand> cannot issue */
92d7f7b0 2794 LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
2e0fef85 2795 return MBX_NOT_FINISHED;
dea3101e 2796 }
2797 /* timeout active mbox command */
a309a6b6
JS		 2798 mod_timer(&psli->mbox_tmo, (jiffies +
2799 (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
dea3101e 2800 }
2801
2802 /* Mailbox cmd <cmd> issue */
ed957684 2803 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 2804 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 2805 "x%x\n",
e8b62011 2806 pmbox->vport ? pmbox->vport->vpi : 0,
92d7f7b0
JS		 2807 mb->mbxCommand, phba->pport->port_state,
2808 psli->sli_flag, flag);
dea3101e 2809
858c9f6c
JS		 2810 if (mb->mbxCommand != MBX_HEARTBEAT) {
2811 if (pmbox->vport) {
2812 lpfc_debugfs_disc_trc(pmbox->vport,
2813 LPFC_DISC_TRC_MBOX_VPORT,
2814 "MBOX Send vport: cmd:x%x mb:x%x x%x",
2815 (uint32_t)mb->mbxCommand,
2816 mb->un.varWords[0], mb->un.varWords[1]);
2817 }
2818 else {
2819 lpfc_debugfs_disc_trc(phba->pport,
2820 LPFC_DISC_TRC_MBOX,
2821 "MBOX Send: cmd:x%x mb:x%x x%x",
2822 (uint32_t)mb->mbxCommand,
2823 mb->un.varWords[0], mb->un.varWords[1]);
2824 }
2825 }
2826
dea3101e 2827 psli->slistat.mbox_cmd++;
2828 evtctr = psli->slistat.mbox_event;
2829
2830 /* next set own bit for the adapter and copy over command word */
2831 mb->mbxOwner = OWN_CHIP;
2832
2833 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2834 /* First copy command data to host SLIM area */
4cc2da1d 2835 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
dea3101e 2836 } else {
9290831f 2837 if (mb->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 2838 /* copy command data into host mbox for cmpl */
4cc2da1d 2839 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
92d7f7b0 2840 MAILBOX_CMD_SIZE);
dea3101e 2841 }
2842
2843 /* First copy mbox command data to HBA SLIM, skip past first
2844 word */
2845 to_slim = phba->MBslimaddr + sizeof (uint32_t);
2846 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
2847 MAILBOX_CMD_SIZE - sizeof (uint32_t));
2848
2849 /* Next copy over first word, with mbxOwner set */
2850 ldata = *((volatile uint32_t *)mb);
2851 to_slim = phba->MBslimaddr;
2852 writel(ldata, to_slim);
2853 readl(to_slim); /* flush */
2854
2855 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2856 /* switch over to host mailbox */
2857 psli->sli_flag |= LPFC_SLI2_ACTIVE;
2858 }
2859 }
2860
2861 wmb();
dea3101e 2862
2863 switch (flag) {
2864 case MBX_NOWAIT:
09372820 2865 /* Set up reference to mailbox command */
dea3101e 2866 psli->mbox_active = pmbox;
09372820
JS		 2867 /* Interrupt board to do it */
2868 writel(CA_MBATT, phba->CAregaddr);
2869 readl(phba->CAregaddr); /* flush */
2870 /* Don't wait for it to finish, just return */
dea3101e 2871 break;
2872
2873 case MBX_POLL:
09372820 2874 /* Set up null reference to mailbox command */
dea3101e 2875 psli->mbox_active = NULL;
09372820
JS		 2876 /* Interrupt board to do it */
2877 writel(CA_MBATT, phba->CAregaddr);
2878 readl(phba->CAregaddr); /* flush */
2879
dea3101e 2880 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2881 /* First read mbox status word */
4cc2da1d 2882 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
dea3101e 2883 word0 = le32_to_cpu(word0);
2884 } else {
2885 /* First read mbox status word */
2886 word0 = readl(phba->MBslimaddr);
2887 }
2888
2889 /* Read the HBA Host Attention Register */
2890 ha_copy = readl(phba->HAregaddr);
09372820
JS		 2891 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2892 mb->mbxCommand) *
2893 1000) + jiffies;
2894 i = 0;
dea3101e 2895 /* Wait for command to complete */
41415862
JW		 2896 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
2897 (!(ha_copy & HA_MBATT) &&
2e0fef85 2898 (phba->link_state > LPFC_WARM_START))) {
09372820 2899 if (time_after(jiffies, timeout)) {
dea3101e 2900 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 2901 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 2902 drvr_flag);
2e0fef85 2903 return MBX_NOT_FINISHED;
dea3101e 2904 }
2905
2906 /* Check if we took a mbox interrupt while we were
2907 polling */
2908 if (((word0 & OWN_CHIP) != OWN_CHIP)
2909 && (evtctr != psli->slistat.mbox_event))
2910 break;
2911
09372820
JS		 2912 if (i++ > 10) {
2913 spin_unlock_irqrestore(&phba->hbalock,
2914 drvr_flag);
2915 msleep(1);
2916 spin_lock_irqsave(&phba->hbalock, drvr_flag);
2917 }
dea3101e 2918
2919 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2920 /* First copy command data */
4cc2da1d
JSEC		 2921 word0 = *((volatile uint32_t *)
2922 &phba->slim2p->mbx);
dea3101e 2923 word0 = le32_to_cpu(word0);
2924 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2925 MAILBOX_t *slimmb;
2926 volatile uint32_t slimword0;
2927 /* Check real SLIM for any errors */
2928 slimword0 = readl(phba->MBslimaddr);
2929 slimmb = (MAILBOX_t *) & slimword0;
2930 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
2931 && slimmb->mbxStatus) {
2932 psli->sli_flag &=
2933 ~LPFC_SLI2_ACTIVE;
2934 word0 = slimword0;
2935 }
2936 }
2937 } else {
2938 /* First copy command data */
2939 word0 = readl(phba->MBslimaddr);
2940 }
2941 /* Read the HBA Host Attention Register */
2942 ha_copy = readl(phba->HAregaddr);
2943 }
2944
2945 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea3101e 2946 /* copy results back to user */
4cc2da1d 2947 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
92d7f7b0 2948 MAILBOX_CMD_SIZE);
dea3101e 2949 } else {
2950 /* First copy command data */
2951 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
2952 MAILBOX_CMD_SIZE);
2953 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
2954 pmbox->context2) {
92d7f7b0 2955 lpfc_memcpy_from_slim((void *)pmbox->context2,
dea3101e 2956 phba->MBslimaddr + DMP_RSP_OFFSET,
2957 mb->un.varDmp.word_cnt);
2958 }
2959 }
2960
2961 writel(HA_MBATT, phba->HAregaddr);
2962 readl(phba->HAregaddr); /* flush */
2963
2964 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2965 status = mb->mbxStatus;
2966 }
2967
2e0fef85
JS		 2968 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
2969 return status;
dea3101e 2970}
2971
92d7f7b0
JS		 2972/*
2973 * Caller needs to hold lock.
2974 */
858c9f6c 2975static void
92d7f7b0 2976__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2977 struct lpfc_iocbq *piocb)
dea3101e 2978{
2979 /* Insert the caller's iocb in the txq tail for later processing. */
2980 list_add_tail(&piocb->list, &pring->txq);
2981 pring->txq_cnt++;
dea3101e 2982}
2983
2984static struct lpfc_iocbq *
2985lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 2986 struct lpfc_iocbq **piocb)
dea3101e 2987{
2988 struct lpfc_iocbq * nextiocb;
2989
2990 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2991 if (!nextiocb) {
2992 nextiocb = *piocb;
2993 *piocb = NULL;
2994 }
2995
2996 return nextiocb;
2997}
2998
92d7f7b0
JS		 2999/*
3000 * Lockless version of lpfc_sli_issue_iocb.
3001 */
98c9ea5c 3002static int
92d7f7b0 3003__lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e 3004 struct lpfc_iocbq *piocb, uint32_t flag)
3005{
3006 struct lpfc_iocbq *nextiocb;
3007 IOCB_t *iocb;
3008
92d7f7b0
JS		 3009 if (piocb->iocb_cmpl && (!piocb->vport) &&
3010 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
3011 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
3012 lpfc_printf_log(phba, KERN_ERR,
3013 LOG_SLI | LOG_VPORT,
e8b62011 3014 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS		 3015 piocb->iocb.ulpCommand);
3016 dump_stack();
3017 return IOCB_ERROR;
3018 }
3019
3020
8d63f375
LV		 3021 /* If the PCI channel is in offline state, do not post iocbs. */
3022 if (unlikely(pci_channel_offline(phba->pcidev)))
3023 return IOCB_ERROR;
3024
dea3101e 3025 /*
3026 * We should never get an IOCB if we are in a < LINK_DOWN state
3027 */
2e0fef85 3028 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e 3029 return IOCB_ERROR;
3030
3031 /*
3032 * Check to see if we are blocking IOCB processing because of a
0b727fea 3033 * outstanding event.
dea3101e 3034 */
0b727fea 3035 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e 3036 goto iocb_busy;
3037
2e0fef85 3038 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 3039 /*
2680eeaa 3040 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e 3041 * can be issued if the link is not up.
3042 */
3043 switch (piocb->iocb.ulpCommand) {
3044 case CMD_QUE_RING_BUF_CN:
3045 case CMD_QUE_RING_BUF64_CN:
dea3101e 3046 /*
3047 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
3048 * completion, iocb_cmpl MUST be 0.
3049 */
3050 if (piocb->iocb_cmpl)
3051 piocb->iocb_cmpl = NULL;
3052 /*FALLTHROUGH*/
3053 case CMD_CREATE_XRI_CR:
2680eeaa
JS		 3054 case CMD_CLOSE_XRI_CN:
3055 case CMD_CLOSE_XRI_CX:
dea3101e 3056 break;
3057 default:
3058 goto iocb_busy;
3059 }
3060
3061 /*
3062 * For FCP commands, we must be in a state where we can process link
3063 * attention events.
3064 */
3065 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
92d7f7b0 3066 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 3067 goto iocb_busy;
92d7f7b0 3068 }
dea3101e 3069
dea3101e 3070 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
3071 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
3072 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
3073
3074 if (iocb)
3075 lpfc_sli_update_ring(phba, pring);
3076 else
3077 lpfc_sli_update_full_ring(phba, pring);
3078
3079 if (!piocb)
3080 return IOCB_SUCCESS;
3081
3082 goto out_busy;
3083
3084 iocb_busy:
3085 pring->stats.iocb_cmd_delay++;
3086
3087 out_busy:
3088
3089 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 3090 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e 3091 return IOCB_SUCCESS;
3092 }
3093
3094 return IOCB_BUSY;
3095}
3096
92d7f7b0
JS		 3097
3098int
3099lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3100 struct lpfc_iocbq *piocb, uint32_t flag)
3101{
3102 unsigned long iflags;
3103 int rc;
3104
3105 spin_lock_irqsave(&phba->hbalock, iflags);
3106 rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
3107 spin_unlock_irqrestore(&phba->hbalock, iflags);
3108
3109 return rc;
3110}
3111
cf5bf97e
JW		 3112static int
3113lpfc_extra_ring_setup( struct lpfc_hba *phba)
3114{
3115 struct lpfc_sli *psli;
3116 struct lpfc_sli_ring *pring;
3117
3118 psli = &phba->sli;
3119
3120 /* Adjust cmd/rsp ring iocb entries more evenly */
a4bc3379
JS		 3121
3122 /* Take some away from the FCP ring */
cf5bf97e
JW		 3123 pring = &psli->ring[psli->fcp_ring];
3124 pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3125 pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3126 pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3127 pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
3128
a4bc3379
JS		 3129 /* and give them to the extra ring */
3130 pring = &psli->ring[psli->extra_ring];
3131
cf5bf97e
JW		 3132 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3133 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3134 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3135 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
3136
3137 /* Setup default profile for this ring */
3138 pring->iotag_max = 4096;
3139 pring->num_mask = 1;
3140 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS		 3141 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
3142 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW		 3143 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
3144 return 0;
3145}
3146
98c9ea5c 3147static void
57127f15
JS		 3148lpfc_sli_async_event_handler(struct lpfc_hba * phba,
3149 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
3150{
3151 IOCB_t *icmd;
3152 uint16_t evt_code;
3153 uint16_t temp;
3154 struct temp_event temp_event_data;
3155 struct Scsi_Host *shost;
3156
3157 icmd = &iocbq->iocb;
3158 evt_code = icmd->un.asyncstat.evt_code;
3159 temp = icmd->ulpContext;
3160
3161 if ((evt_code != ASYNC_TEMP_WARN) &&
3162 (evt_code != ASYNC_TEMP_SAFE)) {
3163 lpfc_printf_log(phba,
3164 KERN_ERR,
3165 LOG_SLI,
76bb24ef 3166 "0346 Ring %d handler: unexpected ASYNC_STATUS"
57127f15
JS		 3167 " evt_code 0x%x\n",
3168 pring->ringno,
3169 icmd->un.asyncstat.evt_code);
3170 return;
3171 }
3172 temp_event_data.data = (uint32_t)temp;
3173 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
3174 if (evt_code == ASYNC_TEMP_WARN) {
3175 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
3176 lpfc_printf_log(phba,
09372820 3177 KERN_ERR,
57127f15 3178 LOG_TEMP,
76bb24ef 3179 "0347 Adapter is very hot, please take "
57127f15
JS		 3180 "corrective action. temperature : %d Celsius\n",
3181 temp);
3182 }
3183 if (evt_code == ASYNC_TEMP_SAFE) {
3184 temp_event_data.event_code = LPFC_NORMAL_TEMP;
3185 lpfc_printf_log(phba,
09372820 3186 KERN_ERR,
57127f15
JS		 3187 LOG_TEMP,
3188 "0340 Adapter temperature is OK now. "
3189 "temperature : %d Celsius\n",
3190 temp);
3191 }
3192
3193 /* Send temperature change event to applications */
3194 shost = lpfc_shost_from_vport(phba->pport);
3195 fc_host_post_vendor_event(shost, fc_get_event_number(),
3196 sizeof(temp_event_data), (char *) &temp_event_data,
3197 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
3198
3199}
3200
3201
dea3101e 3202int
3203lpfc_sli_setup(struct lpfc_hba *phba)
3204{
ed957684 3205 int i, totiocbsize = 0;
dea3101e 3206 struct lpfc_sli *psli = &phba->sli;
3207 struct lpfc_sli_ring *pring;
3208
3209 psli->num_rings = MAX_CONFIGURED_RINGS;
3210 psli->sli_flag = 0;
3211 psli->fcp_ring = LPFC_FCP_RING;
3212 psli->next_ring = LPFC_FCP_NEXT_RING;
a4bc3379 3213 psli->extra_ring = LPFC_EXTRA_RING;
dea3101e 3214
604a3e30
JB		 3215 psli->iocbq_lookup = NULL;
3216 psli->iocbq_lookup_len = 0;
3217 psli->last_iotag = 0;
3218
dea3101e 3219 for (i = 0; i < psli->num_rings; i++) {
3220 pring = &psli->ring[i];
3221 switch (i) {
3222 case LPFC_FCP_RING: /* ring 0 - FCP */
3223 /* numCiocb and numRiocb are used in config_port */
3224 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
3225 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
3226 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
3227 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
3228 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
3229 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
ed957684 3230 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3231 SLI3_IOCB_CMD_SIZE :
3232 SLI2_IOCB_CMD_SIZE;
ed957684 3233 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3234 SLI3_IOCB_RSP_SIZE :
3235 SLI2_IOCB_RSP_SIZE;
dea3101e 3236 pring->iotag_ctr = 0;
3237 pring->iotag_max =
92d7f7b0 3238 (phba->cfg_hba_queue_depth * 2);
dea3101e 3239 pring->fast_iotag = pring->iotag_max;
3240 pring->num_mask = 0;
3241 break;
a4bc3379 3242 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e 3243 /* numCiocb and numRiocb are used in config_port */
3244 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
3245 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
ed957684 3246 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3247 SLI3_IOCB_CMD_SIZE :
3248 SLI2_IOCB_CMD_SIZE;
ed957684 3249 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3250 SLI3_IOCB_RSP_SIZE :
3251 SLI2_IOCB_RSP_SIZE;
2e0fef85 3252 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e 3253 pring->num_mask = 0;
3254 break;
3255 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
3256 /* numCiocb and numRiocb are used in config_port */
3257 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
3258 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
ed957684 3259 pring->sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3260 SLI3_IOCB_CMD_SIZE :
3261 SLI2_IOCB_CMD_SIZE;
ed957684 3262 pring->sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS		 3263 SLI3_IOCB_RSP_SIZE :
3264 SLI2_IOCB_RSP_SIZE;
dea3101e 3265 pring->fast_iotag = 0;
3266 pring->iotag_ctr = 0;
3267 pring->iotag_max = 4096;
57127f15
JS		 3268 pring->lpfc_sli_rcv_async_status =
3269 lpfc_sli_async_event_handler;
dea3101e 3270 pring->num_mask = 4;
3271 pring->prt[0].profile = 0; /* Mask 0 */
3272 pring->prt[0].rctl = FC_ELS_REQ;
3273 pring->prt[0].type = FC_ELS_DATA;
3274 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 3275 lpfc_els_unsol_event;
dea3101e 3276 pring->prt[1].profile = 0; /* Mask 1 */
3277 pring->prt[1].rctl = FC_ELS_RSP;
3278 pring->prt[1].type = FC_ELS_DATA;
3279 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 3280 lpfc_els_unsol_event;
dea3101e 3281 pring->prt[2].profile = 0; /* Mask 2 */
3282 /* NameServer Inquiry */
3283 pring->prt[2].rctl = FC_UNSOL_CTL;
3284 /* NameServer */
3285 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
3286 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 3287 lpfc_ct_unsol_event;
dea3101e 3288 pring->prt[3].profile = 0; /* Mask 3 */
3289 /* NameServer response */
3290 pring->prt[3].rctl = FC_SOL_CTL;
3291 /* NameServer */
3292 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
3293 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 3294 lpfc_ct_unsol_event;
dea3101e 3295 break;
3296 }
ed957684 3297 totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
92d7f7b0 3298 (pring->numRiocb * pring->sizeRiocb);
dea3101e 3299 }
ed957684 3300 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 3301 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS		 3302 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
3303 "SLI2 SLIM Data: x%x x%lx\n",
3304 phba->brd_no, totiocbsize,
3305 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 3306 }
cf5bf97e
JW		 3307 if (phba->cfg_multi_ring_support == 2)
3308 lpfc_extra_ring_setup(phba);
dea3101e 3309
3310 return 0;
3311}
3312
3313int
2e0fef85 3314lpfc_sli_queue_setup(struct lpfc_hba *phba)
dea3101e 3315{
3316 struct lpfc_sli *psli;
3317 struct lpfc_sli_ring *pring;
604a3e30 3318 int i;
dea3101e 3319
3320 psli = &phba->sli;
2e0fef85 3321 spin_lock_irq(&phba->hbalock);
dea3101e 3322 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 3323 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e 3324 /* Initialize list headers for txq and txcmplq as double linked lists */
3325 for (i = 0; i < psli->num_rings; i++) {
3326 pring = &psli->ring[i];
3327 pring->ringno = i;
3328 pring->next_cmdidx = 0;
3329 pring->local_getidx = 0;
3330 pring->cmdidx = 0;
3331 INIT_LIST_HEAD(&pring->txq);
3332 INIT_LIST_HEAD(&pring->txcmplq);
3333 INIT_LIST_HEAD(&pring->iocb_continueq);
9c2face6 3334 INIT_LIST_HEAD(&pring->iocb_continue_saveq);
dea3101e 3335 INIT_LIST_HEAD(&pring->postbufq);
dea3101e 3336 }
2e0fef85
JS		 3337 spin_unlock_irq(&phba->hbalock);
3338 return 1;
dea3101e 3339}
3340
92d7f7b0
JS		 3341int
3342lpfc_sli_host_down(struct lpfc_vport *vport)
3343{
858c9f6c 3344 LIST_HEAD(completions);
92d7f7b0
JS		 3345 struct lpfc_hba *phba = vport->phba;
3346 struct lpfc_sli *psli = &phba->sli;
3347 struct lpfc_sli_ring *pring;
3348 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS		 3349 int i;
3350 unsigned long flags = 0;
3351 uint16_t prev_pring_flag;
3352
3353 lpfc_cleanup_discovery_resources(vport);
3354
3355 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0
JS		 3356 for (i = 0; i < psli->num_rings; i++) {
3357 pring = &psli->ring[i];
3358 prev_pring_flag = pring->flag;
858c9f6c
JS		 3359 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3360 pring->flag |= LPFC_DEFERRED_RING_EVENT;
92d7f7b0
JS		 3361 /*
3362 * Error everything on the txq since these iocbs have not been
3363 * given to the FW yet.
3364 */
92d7f7b0
JS		 3365 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
3366 if (iocb->vport != vport)
3367 continue;
858c9f6c 3368 list_move_tail(&iocb->list, &completions);
92d7f7b0 3369 pring->txq_cnt--;
92d7f7b0
JS		 3370 }
3371
3372 /* Next issue ABTS for everything on the txcmplq */
3373 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
3374 list) {
3375 if (iocb->vport != vport)
3376 continue;
3377 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3378 }
3379
3380 pring->flag = prev_pring_flag;
3381 }
3382
3383 spin_unlock_irqrestore(&phba->hbalock, flags);
3384
858c9f6c
JS		 3385 while (!list_empty(&completions)) {
3386 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
3387
3388 if (!iocb->iocb_cmpl)
3389 lpfc_sli_release_iocbq(phba, iocb);
3390 else {
3391 iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3392 iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
3393 (iocb->iocb_cmpl) (phba, iocb, iocb);
3394 }
3395 }
92d7f7b0
JS		 3396 return 1;
3397}
3398
dea3101e 3399int
2e0fef85 3400lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 3401{
2534ba75 3402 LIST_HEAD(completions);
2e0fef85 3403 struct lpfc_sli *psli = &phba->sli;
dea3101e 3404 struct lpfc_sli_ring *pring;
0ff10d46 3405 struct lpfc_dmabuf *buf_ptr;
dea3101e 3406 LPFC_MBOXQ_t *pmb;
2534ba75
JS		 3407 struct lpfc_iocbq *iocb;
3408 IOCB_t *cmd = NULL;
dea3101e 3409 int i;
3410 unsigned long flags = 0;
3411
dea3101e 3412 lpfc_hba_down_prep(phba);
3413
92d7f7b0
JS		 3414 lpfc_fabric_abort_hba(phba);
3415
2e0fef85 3416 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e 3417 for (i = 0; i < psli->num_rings; i++) {
3418 pring = &psli->ring[i];
858c9f6c
JS		 3419 if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
3420 pring->flag |= LPFC_DEFERRED_RING_EVENT;
dea3101e 3421
3422 /*
3423 * Error everything on the txq since these iocbs have not been
3424 * given to the FW yet.
3425 */
2534ba75 3426 list_splice_init(&pring->txq, &completions);
dea3101e 3427 pring->txq_cnt = 0;
3428
2534ba75 3429 }
2e0fef85 3430 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 3431
2534ba75 3432 while (!list_empty(&completions)) {
92d7f7b0 3433 list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
2534ba75 3434 cmd = &iocb->iocb;
dea3101e 3435
2e0fef85
JS		 3436 if (!iocb->iocb_cmpl)
3437 lpfc_sli_release_iocbq(phba, iocb);
3438 else {
2534ba75
JS		 3439 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
3440 cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
3441 (iocb->iocb_cmpl) (phba, iocb, iocb);
2e0fef85 3442 }
dea3101e 3443 }
3444
0ff10d46
JS		 3445 spin_lock_irqsave(&phba->hbalock, flags);
3446 list_splice_init(&phba->elsbuf, &completions);
3447 phba->elsbuf_cnt = 0;
3448 phba->elsbuf_prev_cnt = 0;
3449 spin_unlock_irqrestore(&phba->hbalock, flags);
3450
3451 while (!list_empty(&completions)) {
3452 list_remove_head(&completions, buf_ptr,
3453 struct lpfc_dmabuf, list);
3454 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
3455 kfree(buf_ptr);
3456 }
3457
dea3101e 3458 /* Return any active mbox cmds */
3459 del_timer_sync(&psli->mbox_tmo);
92d7f7b0 3460 spin_lock_irqsave(&phba->hbalock, flags);
2e0fef85 3461
92d7f7b0 3462 spin_lock(&phba->pport->work_port_lock);
2e0fef85 3463 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
92d7f7b0 3464 spin_unlock(&phba->pport->work_port_lock);
2e0fef85 3465
92d7f7b0
JS		 3466 if (psli->mbox_active) {
3467 list_add_tail(&psli->mbox_active->list, &completions);
2e0fef85 3468 psli->mbox_active = NULL;
2e0fef85 3469 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
dea3101e 3470 }
dea3101e 3471
92d7f7b0
JS		 3472 /* Return any pending or completed mbox cmds */
3473 list_splice_init(&phba->sli.mboxq, &completions);
3474 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
3475 INIT_LIST_HEAD(&psli->mboxq);
3476 INIT_LIST_HEAD(&psli->mboxq_cmpl);
3477
3478 spin_unlock_irqrestore(&phba->hbalock, flags);
3479
3480 while (!list_empty(&completions)) {
3481 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
dea3101e 3482 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
3483 if (pmb->mbox_cmpl) {
dea3101e 3484 pmb->mbox_cmpl(phba,pmb);
dea3101e 3485 }
3486 }
dea3101e 3487 return 1;
3488}
3489
3490void
3491lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
3492{
3493 uint32_t *src = srcp;
3494 uint32_t *dest = destp;
3495 uint32_t ldata;
3496 int i;
3497
3498 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
3499 ldata = *src;
3500 ldata = le32_to_cpu(ldata);
3501 *dest = ldata;
3502 src++;
3503 dest++;
3504 }
3505}
3506
3507int
2e0fef85
JS		 3508lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3509 struct lpfc_dmabuf *mp)
dea3101e 3510{
3511 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
3512 later */
2e0fef85 3513 spin_lock_irq(&phba->hbalock);
dea3101e 3514 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 3515 pring->postbufq_cnt++;
2e0fef85 3516 spin_unlock_irq(&phba->hbalock);
dea3101e 3517 return 0;
3518}
3519
76bb24ef
JS		 3520uint32_t
3521lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
3522{
3523 spin_lock_irq(&phba->hbalock);
3524 phba->buffer_tag_count++;
3525 /*
3526 * Always set the QUE_BUFTAG_BIT to distiguish between
3527 * a tag assigned by HBQ.
3528 */
3529 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
3530 spin_unlock_irq(&phba->hbalock);
3531 return phba->buffer_tag_count;
3532}
3533
3534struct lpfc_dmabuf *
3535lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3536 uint32_t tag)
3537{
3538 struct lpfc_dmabuf *mp, *next_mp;
3539 struct list_head *slp = &pring->postbufq;
3540
3541 /* Search postbufq, from the begining, looking for a match on tag */
3542 spin_lock_irq(&phba->hbalock);
3543 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
3544 if (mp->buffer_tag == tag) {
3545 list_del_init(&mp->list);
3546 pring->postbufq_cnt--;
3547 spin_unlock_irq(&phba->hbalock);
3548 return mp;
3549 }
3550 }
3551
3552 spin_unlock_irq(&phba->hbalock);
3553 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3554 "0410 Cannot find virtual addr for buffer tag on "
3555 "ring %d Data x%lx x%p x%p x%x\n",
3556 pring->ringno, (unsigned long) tag,
3557 slp->next, slp->prev, pring->postbufq_cnt);
3558
3559 return NULL;
3560}
dea3101e 3561
3562struct lpfc_dmabuf *
3563lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3564 dma_addr_t phys)
3565{
3566 struct lpfc_dmabuf *mp, *next_mp;
3567 struct list_head *slp = &pring->postbufq;
3568
3569 /* Search postbufq, from the begining, looking for a match on phys */
2e0fef85 3570 spin_lock_irq(&phba->hbalock);
dea3101e 3571 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
3572 if (mp->phys == phys) {
3573 list_del_init(&mp->list);
3574 pring->postbufq_cnt--;
2e0fef85 3575 spin_unlock_irq(&phba->hbalock);
dea3101e 3576 return mp;
3577 }
3578 }
3579
2e0fef85 3580 spin_unlock_irq(&phba->hbalock);
dea3101e 3581 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 3582 "0410 Cannot find virtual addr for mapped buf on "
dea3101e 3583 "ring %d Data x%llx x%p x%p x%x\n",
e8b62011 3584 pring->ringno, (unsigned long long)phys,
dea3101e 3585 slp->next, slp->prev, pring->postbufq_cnt);
3586 return NULL;
3587}
3588
3589static void
2e0fef85
JS		 3590lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3591 struct lpfc_iocbq *rspiocb)
dea3101e 3592{
2e0fef85 3593 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 3594 uint16_t abort_iotag, abort_context;
92d7f7b0 3595 struct lpfc_iocbq *abort_iocb;
2680eeaa
JS		 3596 struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
3597
3598 abort_iocb = NULL;
2680eeaa
JS		 3599
3600 if (irsp->ulpStatus) {
3601 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
3602 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
3603
2e0fef85 3604 spin_lock_irq(&phba->hbalock);
2680eeaa
JS		 3605 if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
3606 abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
3607
92d7f7b0 3608 lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
e8b62011 3609 "0327 Cannot abort els iocb %p "
92d7f7b0
JS		 3610 "with tag %x context %x, abort status %x, "
3611 "abort code %x\n",
e8b62011
JS		 3612 abort_iocb, abort_iotag, abort_context,
3613 irsp->ulpStatus, irsp->un.ulpWord[4]);
2680eeaa
JS		 3614
3615 /*
3616 * make sure we have the right iocbq before taking it
3617 * off the txcmplq and try to call completion routine.
3618 */
2e0fef85
JS		 3619 if (!abort_iocb ||
3620 abort_iocb->iocb.ulpContext != abort_context ||
3621 (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
3622 spin_unlock_irq(&phba->hbalock);
3623 else {
92d7f7b0 3624 list_del_init(&abort_iocb->list);
2680eeaa 3625 pring->txcmplq_cnt--;
2e0fef85 3626 spin_unlock_irq(&phba->hbalock);
2680eeaa 3627
0ff10d46
JS		 3628 /* Firmware could still be in progress of DMAing
3629 * payload, so don't free data buffer till after
3630 * a hbeat.
3631 */
3632 abort_iocb->iocb_flag |= LPFC_DELAY_MEM_FREE;
3633
92d7f7b0
JS		 3634 abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3635 abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
3636 abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
3637 (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
2680eeaa
JS		 3638 }
3639 }
3640
604a3e30 3641 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e 3642 return;
3643}
3644
92d7f7b0
JS		 3645static void
3646lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3647 struct lpfc_iocbq *rspiocb)
3648{
3649 IOCB_t *irsp = &rspiocb->iocb;
3650
3651 /* ELS cmd tag <ulpIoTag> completes */
3652 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
e8b62011 3653 "0133 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 3654 "x%x x%x x%x\n",
e8b62011 3655 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 3656 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS		 3657 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
3658 lpfc_ct_free_iocb(phba, cmdiocb);
3659 else
3660 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS		 3661 return;
3662}
3663
dea3101e 3664int
2e0fef85
JS		 3665lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3666 struct lpfc_iocbq *cmdiocb)
dea3101e 3667{
2e0fef85 3668 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 3669 struct lpfc_iocbq *abtsiocbp;
dea3101e 3670 IOCB_t *icmd = NULL;
3671 IOCB_t *iabt = NULL;
07951076
JS		 3672 int retval = IOCB_ERROR;
3673
92d7f7b0
JS		 3674 /*
3675 * There are certain command types we don't want to abort. And we
3676 * don't want to abort commands that are already in the process of
3677 * being aborted.
07951076
JS		 3678 */
3679 icmd = &cmdiocb->iocb;
2e0fef85 3680 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS		 3681 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
3682 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS		 3683 return 0;
3684
858c9f6c
JS		 3685 /* If we're unloading, don't abort iocb on the ELS ring, but change the
3686 * callback so that nothing happens when it finishes.
07951076 3687 */
858c9f6c
JS		 3688 if ((vport->load_flag & FC_UNLOADING) &&
3689 (pring->ringno == LPFC_ELS_RING)) {
92d7f7b0
JS		 3690 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
3691 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
3692 else
3693 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
07951076 3694 goto abort_iotag_exit;
92d7f7b0 3695 }
dea3101e 3696
3697 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 3698 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e 3699 if (abtsiocbp == NULL)
3700 return 0;
dea3101e 3701
07951076
JS		 3702 /* This signals the response to set the correct status
3703 * before calling the completion handler.
3704 */
3705 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
3706
dea3101e 3707 iabt = &abtsiocbp->iocb;
07951076
JS		 3708 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
3709 iabt->un.acxri.abortContextTag = icmd->ulpContext;
3710 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
3711 iabt->ulpLe = 1;
3712 iabt->ulpClass = icmd->ulpClass;
dea3101e 3713
2e0fef85 3714 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS		 3715 iabt->ulpCommand = CMD_ABORT_XRI_CN;
3716 else
3717 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 3718
07951076 3719 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
5b8bd0c9 3720
e8b62011
JS		 3721 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
3722 "0339 Abort xri x%x, original iotag x%x, "
3723 "abort cmd iotag x%x\n",
3724 iabt->un.acxri.abortContextTag,
3725 iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
92d7f7b0 3726 retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
dea3101e 3727
07951076 3728abort_iotag_exit:
2e0fef85
JS		 3729 /*
3730 * Caller to this routine should check for IOCB_ERROR
3731 * and handle it properly. This routine no longer removes
3732 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 3733 */
2e0fef85 3734 return retval;
dea3101e 3735}
3736
3737static int
51ef4c26
JS		 3738lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
3739 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 3740 lpfc_ctx_cmd ctx_cmd)
dea3101e 3741{
0bd4ca25
JSEC		 3742 struct lpfc_scsi_buf *lpfc_cmd;
3743 struct scsi_cmnd *cmnd;
dea3101e 3744 int rc = 1;
3745
0bd4ca25
JSEC		 3746 if (!(iocbq->iocb_flag & LPFC_IO_FCP))
3747 return rc;
3748
51ef4c26
JS		 3749 if (iocbq->vport != vport)
3750 return rc;
3751
0bd4ca25
JSEC		 3752 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
3753 cmnd = lpfc_cmd->pCmd;
3754
3755 if (cmnd == NULL)
dea3101e 3756 return rc;
3757
3758 switch (ctx_cmd) {
3759 case LPFC_CTX_LUN:
0bd4ca25
JSEC		 3760 if ((cmnd->device->id == tgt_id) &&
3761 (cmnd->device->lun == lun_id))
dea3101e 3762 rc = 0;
3763 break;
3764 case LPFC_CTX_TGT:
0bd4ca25 3765 if (cmnd->device->id == tgt_id)
dea3101e 3766 rc = 0;
3767 break;
dea3101e 3768 case LPFC_CTX_HOST:
3769 rc = 0;
3770 break;
3771 default:
3772 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
3773 __FUNCTION__, ctx_cmd);
3774 break;
3775 }
3776
3777 return rc;
3778}
3779
3780int
51ef4c26
JS		 3781lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
3782 lpfc_ctx_cmd ctx_cmd)
dea3101e 3783{
51ef4c26 3784 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC		 3785 struct lpfc_iocbq *iocbq;
3786 int sum, i;
dea3101e 3787
0bd4ca25
JSEC		 3788 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
3789 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3790
51ef4c26
JS		 3791 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
3792 ctx_cmd) == 0)
0bd4ca25 3793 sum++;
dea3101e 3794 }
0bd4ca25 3795
dea3101e 3796 return sum;
3797}
3798
5eb95af0 3799void
2e0fef85
JS		 3800lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3801 struct lpfc_iocbq *rspiocb)
5eb95af0 3802{
604a3e30 3803 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC		 3804 return;
3805}
3806
dea3101e 3807int
51ef4c26
JS		 3808lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
3809 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 3810{
51ef4c26 3811 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC		 3812 struct lpfc_iocbq *iocbq;
3813 struct lpfc_iocbq *abtsiocb;
dea3101e 3814 IOCB_t *cmd = NULL;
dea3101e 3815 int errcnt = 0, ret_val = 0;
0bd4ca25 3816 int i;
dea3101e 3817
0bd4ca25
JSEC		 3818 for (i = 1; i <= phba->sli.last_iotag; i++) {
3819 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 3820
51ef4c26 3821 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 3822 abort_cmd) != 0)
dea3101e 3823 continue;
3824
3825 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 3826 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e 3827 if (abtsiocb == NULL) {
3828 errcnt++;
3829 continue;
3830 }
dea3101e 3831
0bd4ca25 3832 cmd = &iocbq->iocb;
dea3101e 3833 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
3834 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
3835 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
3836 abtsiocb->iocb.ulpLe = 1;
3837 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2e0fef85 3838 abtsiocb->vport = phba->pport;
dea3101e 3839
2e0fef85 3840 if (lpfc_is_link_up(phba))
dea3101e 3841 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
3842 else
3843 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
3844
5eb95af0
JSEC		 3845 /* Setup callback routine and issue the command. */
3846 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
dea3101e 3847 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
3848 if (ret_val == IOCB_ERROR) {
604a3e30 3849 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e 3850 errcnt++;
3851 continue;
3852 }
3853 }
3854
3855 return errcnt;
3856}
3857
68876920
JSEC		 3858static void
3859lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
3860 struct lpfc_iocbq *cmdiocbq,
3861 struct lpfc_iocbq *rspiocbq)
dea3101e 3862{
68876920
JSEC		 3863 wait_queue_head_t *pdone_q;
3864 unsigned long iflags;
dea3101e 3865
2e0fef85 3866 spin_lock_irqsave(&phba->hbalock, iflags);
68876920
JSEC		 3867 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
3868 if (cmdiocbq->context2 && rspiocbq)
3869 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
3870 &rspiocbq->iocb, sizeof(IOCB_t));
3871
3872 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC		 3873 if (pdone_q)
3874 wake_up(pdone_q);
858c9f6c 3875 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e 3876 return;
3877}
3878
68876920
JSEC		 3879/*
3880 * Issue the caller's iocb and wait for its completion, but no longer than the
3881 * caller's timeout. Note that iocb_flags is cleared before the
3882 * lpfc_sli_issue_call since the wake routine sets a unique value and by
3883 * definition this is a wait function.
3884 */
92d7f7b0 3885
dea3101e 3886int
2e0fef85
JS		 3887lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
3888 struct lpfc_sli_ring *pring,
3889 struct lpfc_iocbq *piocb,
3890 struct lpfc_iocbq *prspiocbq,
68876920 3891 uint32_t timeout)
dea3101e 3892{
7259f0d0 3893 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC		 3894 long timeleft, timeout_req = 0;
3895 int retval = IOCB_SUCCESS;
875fbdfe 3896 uint32_t creg_val;
dea3101e 3897
3898 /*
68876920
JSEC		 3899 * If the caller has provided a response iocbq buffer, then context2
3900 * is NULL or its an error.
dea3101e 3901 */
68876920
JSEC		 3902 if (prspiocbq) {
3903 if (piocb->context2)
3904 return IOCB_ERROR;
3905 piocb->context2 = prspiocbq;
dea3101e 3906 }
3907
68876920
JSEC		 3908 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
3909 piocb->context_un.wait_queue = &done_q;
3910 piocb->iocb_flag &= ~LPFC_IO_WAKE;
dea3101e 3911
875fbdfe
JSEC		 3912 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3913 creg_val = readl(phba->HCregaddr);
3914 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
3915 writel(creg_val, phba->HCregaddr);
3916 readl(phba->HCregaddr); /* flush */
3917 }
3918
68876920
JSEC		 3919 retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
3920 if (retval == IOCB_SUCCESS) {
3921 timeout_req = timeout * HZ;
68876920
JSEC		 3922 timeleft = wait_event_timeout(done_q,
3923 piocb->iocb_flag & LPFC_IO_WAKE,
3924 timeout_req);
dea3101e 3925
7054a606
JS		 3926 if (piocb->iocb_flag & LPFC_IO_WAKE) {
3927 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3928 "0331 IOCB wake signaled\n");
7054a606 3929 } else if (timeleft == 0) {
68876920 3930 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3931 "0338 IOCB wait timeout error - no "
3932 "wake response Data x%x\n", timeout);
68876920 3933 retval = IOCB_TIMEDOUT;
7054a606 3934 } else {
68876920 3935 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS		 3936 "0330 IOCB wake NOT set, "
3937 "Data x%x x%lx\n",
68876920
JSEC		 3938 timeout, (timeleft / jiffies));
3939 retval = IOCB_TIMEDOUT;
dea3101e 3940 }
68876920
JSEC		 3941 } else {
3942 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS		 3943 ":0332 IOCB wait issue failed, Data x%x\n",
3944 retval);
68876920 3945 retval = IOCB_ERROR;
dea3101e 3946 }
3947
875fbdfe
JSEC		 3948 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3949 creg_val = readl(phba->HCregaddr);
3950 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
3951 writel(creg_val, phba->HCregaddr);
3952 readl(phba->HCregaddr); /* flush */
3953 }
3954
68876920
JSEC		 3955 if (prspiocbq)
3956 piocb->context2 = NULL;
3957
3958 piocb->context_un.wait_queue = NULL;
3959 piocb->iocb_cmpl = NULL;
dea3101e 3960 return retval;
3961}
68876920 3962
dea3101e 3963int
2e0fef85 3964lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e 3965 uint32_t timeout)
3966{
7259f0d0 3967 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
dea3101e 3968 int retval;
858c9f6c 3969 unsigned long flag;
dea3101e 3970
3971 /* The caller must leave context1 empty. */
98c9ea5c 3972 if (pmboxq->context1)
2e0fef85 3973 return MBX_NOT_FINISHED;
dea3101e 3974
3975 /* setup wake call as IOCB callback */
3976 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
3977 /* setup context field to pass wait_queue pointer to wake function */
3978 pmboxq->context1 = &done_q;
3979
dea3101e 3980 /* now issue the command */
3981 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
3982
3983 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
7054a606
JS		 3984 wait_event_interruptible_timeout(done_q,
3985 pmboxq->mbox_flag & LPFC_MBX_WAKE,
3986 timeout * HZ);
3987
858c9f6c 3988 spin_lock_irqsave(&phba->hbalock, flag);
dea3101e 3989 pmboxq->context1 = NULL;
7054a606
JS		 3990 /*
3991 * if LPFC_MBX_WAKE flag is set the mailbox is completed
3992 * else do not free the resources.
3993 */
3994 if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
dea3101e 3995 retval = MBX_SUCCESS;
858c9f6c 3996 else {
7054a606 3997 retval = MBX_TIMEOUT;
858c9f6c
JS		 3998 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3999 }
4000 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e 4001 }
4002
dea3101e 4003 return retval;
4004}
4005
b4c02652
JS		 4006int
4007lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
4008{
2e0fef85 4009 struct lpfc_vport *vport = phba->pport;
b4c02652 4010 int i = 0;
ed957684 4011 uint32_t ha_copy;
b4c02652 4012
2e0fef85 4013 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
b4c02652
JS		 4014 if (i++ > LPFC_MBOX_TMO * 1000)
4015 return 1;
4016
ed957684
JS		 4017 /*
4018 * Call lpfc_sli_handle_mb_event only if a mailbox cmd
4019 * did finish. This way we won't get the misleading
4020 * "Stray Mailbox Interrupt" message.
4021 */
4022 spin_lock_irq(&phba->hbalock);
4023 ha_copy = phba->work_ha;
4024 phba->work_ha &= ~HA_MBATT;
4025 spin_unlock_irq(&phba->hbalock);
4026
4027 if (ha_copy & HA_MBATT)
4028 if (lpfc_sli_handle_mb_event(phba) == 0)
4029 i = 0;
b4c02652
JS		 4030
4031 msleep(1);
4032 }
4033
4034 return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
4035}
4036
dea3101e 4037irqreturn_t
7d12e780 4038lpfc_intr_handler(int irq, void *dev_id)
dea3101e 4039{
2e0fef85 4040 struct lpfc_hba *phba;
dea3101e 4041 uint32_t ha_copy;
4042 uint32_t work_ha_copy;
4043 unsigned long status;
dea3101e 4044 uint32_t control;
4045
92d7f7b0 4046 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS		 4047 struct lpfc_vport *vport;
4048 struct lpfc_nodelist *ndlp;
4049 struct lpfc_dmabuf *mp;
92d7f7b0
JS		 4050 LPFC_MBOXQ_t *pmb;
4051 int rc;
4052
dea3101e 4053 /*
4054 * Get the driver's phba structure from the dev_id and
4055 * assume the HBA is not interrupting.
4056 */
4057 phba = (struct lpfc_hba *) dev_id;
4058
4059 if (unlikely(!phba))
4060 return IRQ_NONE;
4061
8d63f375
LV		 4062 /* If the pci channel is offline, ignore all the interrupts. */
4063 if (unlikely(pci_channel_offline(phba->pcidev)))
4064 return IRQ_NONE;
4065
dea3101e 4066 phba->sli.slistat.sli_intr++;
4067
4068 /*
4069 * Call the HBA to see if it is interrupting. If not, don't claim
4070 * the interrupt
4071 */
4072
4073 /* Ignore all interrupts during initialization. */
2e0fef85 4074 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e 4075 return IRQ_NONE;
4076
4077 /*
4078 * Read host attention register to determine interrupt source
4079 * Clear Attention Sources, except Error Attention (to
4080 * preserve status) and Link Attention
4081 */
2e0fef85 4082 spin_lock(&phba->hbalock);
dea3101e 4083 ha_copy = readl(phba->HAregaddr);
ebdbe65f
JS		 4084 /* If somebody is waiting to handle an eratt don't process it
4085 * here. The brdkill function will do this.
4086 */
2e0fef85 4087 if (phba->link_flag & LS_IGNORE_ERATT)
ebdbe65f 4088 ha_copy &= ~HA_ERATT;
dea3101e 4089 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
4090 readl(phba->HAregaddr); /* flush */
2e0fef85 4091 spin_unlock(&phba->hbalock);
dea3101e 4092
4093 if (unlikely(!ha_copy))
4094 return IRQ_NONE;
4095
4096 work_ha_copy = ha_copy & phba->work_ha_mask;
4097
4098 if (unlikely(work_ha_copy)) {
4099 if (work_ha_copy & HA_LATT) {
4100 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
4101 /*
4102 * Turn off Link Attention interrupts
4103 * until CLEAR_LA done
4104 */
2e0fef85 4105 spin_lock(&phba->hbalock);
dea3101e 4106 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
4107 control = readl(phba->HCregaddr);
4108 control &= ~HC_LAINT_ENA;
4109 writel(control, phba->HCregaddr);
4110 readl(phba->HCregaddr); /* flush */
2e0fef85 4111 spin_unlock(&phba->hbalock);
dea3101e 4112 }
4113 else
4114 work_ha_copy &= ~HA_LATT;
4115 }
4116
4117 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
858c9f6c
JS		 4118 /*
4119 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
4120 * the only slow ring.
4121 */
4122 status = (work_ha_copy &
4123 (HA_RXMASK << (4*LPFC_ELS_RING)));
4124 status >>= (4*LPFC_ELS_RING);
4125 if (status & HA_RXMASK) {
4126 spin_lock(&phba->hbalock);
4127 control = readl(phba->HCregaddr);
a58cbd52
JS		 4128
4129 lpfc_debugfs_slow_ring_trc(phba,
4130 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
4131 control, status,
4132 (uint32_t)phba->sli.slistat.sli_intr);
4133
858c9f6c 4134 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS		 4135 lpfc_debugfs_slow_ring_trc(phba,
4136 "ISR Disable ring:"
4137 "pwork:x%x hawork:x%x wait:x%x",
4138 phba->work_ha, work_ha_copy,
4139 (uint32_t)((unsigned long)
4140 phba->work_wait));
4141
858c9f6c
JS		 4142 control &=
4143 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e 4144 writel(control, phba->HCregaddr);
4145 readl(phba->HCregaddr); /* flush */
dea3101e 4146 }
a58cbd52
JS		 4147 else {
4148 lpfc_debugfs_slow_ring_trc(phba,
4149 "ISR slow ring: pwork:"
4150 "x%x hawork:x%x wait:x%x",
4151 phba->work_ha, work_ha_copy,
4152 (uint32_t)((unsigned long)
4153 phba->work_wait));
4154 }
858c9f6c 4155 spin_unlock(&phba->hbalock);
dea3101e 4156 }
4157 }
4158
4159 if (work_ha_copy & HA_ERATT) {
dea3101e 4160 /*
4161 * There was a link/board error. Read the
4162 * status register to retrieve the error event
4163 * and process it.
4164 */
4165 phba->sli.slistat.err_attn_event++;
4166 /* Save status info */
4167 phba->work_hs = readl(phba->HSregaddr);
4168 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
4169 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
4170
4171 /* Clear Chip error bit */
4172 writel(HA_ERATT, phba->HAregaddr);
4173 readl(phba->HAregaddr); /* flush */
2e0fef85 4174 phba->pport->stopped = 1;
dea3101e 4175 }
4176
92d7f7b0
JS		 4177 if ((work_ha_copy & HA_MBATT) &&
4178 (phba->sli.mbox_active)) {
4179 pmb = phba->sli.mbox_active;
4180 pmbox = &pmb->mb;
4181 mbox = &phba->slim2p->mbx;
858c9f6c 4182 vport = pmb->vport;
92d7f7b0
JS		 4183
4184 /* First check out the status word */
4185 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
4186 if (pmbox->mbxOwner != OWN_HOST) {
4187 /*
4188 * Stray Mailbox Interrupt, mbxCommand <cmd>
4189 * mbxStatus <status>
4190 */
09372820 4191 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
92d7f7b0 4192 LOG_SLI,
e8b62011 4193 "(%d):0304 Stray Mailbox "
92d7f7b0
JS		 4194 "Interrupt mbxCommand x%x "
4195 "mbxStatus x%x\n",
e8b62011 4196 (vport ? vport->vpi : 0),
92d7f7b0
JS		 4197 pmbox->mbxCommand,
4198 pmbox->mbxStatus);
09372820
JS		 4199 /* clear mailbox attention bit */
4200 work_ha_copy &= ~HA_MBATT;
4201 } else {
4202 phba->last_completion_time = jiffies;
4203 del_timer(&phba->sli.mbox_tmo);
858c9f6c 4204
09372820
JS		 4205 phba->sli.mbox_active = NULL;
4206 if (pmb->mbox_cmpl) {
4207 lpfc_sli_pcimem_bcopy(mbox, pmbox,
4208 MAILBOX_CMD_SIZE);
4209 }
4210 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
4211 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
4212
4213 lpfc_debugfs_disc_trc(vport,
4214 LPFC_DISC_TRC_MBOX_VPORT,
4215 "MBOX dflt rpi: : "
4216 "status:x%x rpi:x%x",
4217 (uint32_t)pmbox->mbxStatus,
4218 pmbox->un.varWords[0], 0);
4219
4220 if (!pmbox->mbxStatus) {
4221 mp = (struct lpfc_dmabuf *)
4222 (pmb->context1);
4223 ndlp = (struct lpfc_nodelist *)
4224 pmb->context2;
4225
4226 /* Reg_LOGIN of dflt RPI was
4227 * successful. new lets get
4228 * rid of the RPI using the
4229 * same mbox buffer.
4230 */
4231 lpfc_unreg_login(phba,
4232 vport->vpi,
4233 pmbox->un.varWords[0],
4234 pmb);
4235 pmb->mbox_cmpl =
4236 lpfc_mbx_cmpl_dflt_rpi;
4237 pmb->context1 = mp;
4238 pmb->context2 = ndlp;
4239 pmb->vport = vport;
4240 spin_lock(&phba->hbalock);
4241 phba->sli.sli_flag &=
4242 ~LPFC_SLI_MBOX_ACTIVE;
4243 spin_unlock(&phba->hbalock);
4244 goto send_current_mbox;
4245 }
858c9f6c 4246 }
09372820
JS		 4247 spin_lock(&phba->pport->work_port_lock);
4248 phba->pport->work_port_events &=
4249 ~WORKER_MBOX_TMO;
4250 spin_unlock(&phba->pport->work_port_lock);
4251 lpfc_mbox_cmpl_put(phba, pmb);
858c9f6c 4252 }
92d7f7b0
JS		 4253 }
4254 if ((work_ha_copy & HA_MBATT) &&
4255 (phba->sli.mbox_active == NULL)) {
4256send_next_mbox:
4257 spin_lock(&phba->hbalock);
4258 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
4259 pmb = lpfc_mbox_get(phba);
4260 spin_unlock(&phba->hbalock);
858c9f6c 4261send_current_mbox:
92d7f7b0
JS		 4262 /* Process next mailbox command if there is one */
4263 if (pmb != NULL) {
4264 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4265 if (rc == MBX_NOT_FINISHED) {
4266 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
4267 lpfc_mbox_cmpl_put(phba, pmb);
4268 goto send_next_mbox;
4269 }
92d7f7b0
JS		 4270 }
4271
4272 }
4273
2e0fef85 4274 spin_lock(&phba->hbalock);
dea3101e 4275 phba->work_ha |= work_ha_copy;
4276 if (phba->work_wait)
92d7f7b0 4277 lpfc_worker_wake_up(phba);
2e0fef85 4278 spin_unlock(&phba->hbalock);
dea3101e 4279 }
4280
4281 ha_copy &= ~(phba->work_ha_mask);
4282
4283 /*
4284 * Process all events on FCP ring. Take the optimized path for
4285 * FCP IO. Any other IO is slow path and is handled by
4286 * the worker thread.
4287 */
4288 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
4289 status >>= (4*LPFC_FCP_RING);
858c9f6c 4290 if (status & HA_RXMASK)
dea3101e 4291 lpfc_sli_handle_fast_ring_event(phba,
4292 &phba->sli.ring[LPFC_FCP_RING],
4293 status);
a4bc3379
JS		 4294
4295 if (phba->cfg_multi_ring_support == 2) {
4296 /*
4297 * Process all events on extra ring. Take the optimized path
4298 * for extra ring IO. Any other IO is slow path and is handled
4299 * by the worker thread.
4300 */
4301 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
4302 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 4303 if (status & HA_RXMASK) {
a4bc3379
JS		 4304 lpfc_sli_handle_fast_ring_event(phba,
4305 &phba->sli.ring[LPFC_EXTRA_RING],
4306 status);
4307 }
4308 }
dea3101e 4309 return IRQ_HANDLED;
4310
4311} /* lpfc_intr_handler */
Ubuntu combined Linux kernel mirror