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1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
0d041215 4 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term *
3e21d1cb 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
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10 * *
11 * This program is free software; you can redistribute it and/or *
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12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
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22 *******************************************************************/
23
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24#include <linux/blkdev.h>
25#include <linux/pci.h>
26#include <linux/interrupt.h>
27#include <linux/delay.h>
5a0e3ad6 28#include <linux/slab.h>
1c2ba475 29#include <linux/lockdep.h>
dea3101e 30
91886523 31#include <scsi/scsi.h>
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32#include <scsi/scsi_cmnd.h>
33#include <scsi/scsi_device.h>
34#include <scsi/scsi_host.h>
f888ba3c 35#include <scsi/scsi_transport_fc.h>
da0436e9 36#include <scsi/fc/fc_fs.h>
0d878419 37#include <linux/aer.h>
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38#ifdef CONFIG_X86
39#include <asm/set_memory.h>
40#endif
dea3101e 41
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42#include <linux/nvme-fc-driver.h>
43
da0436e9 44#include "lpfc_hw4.h"
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45#include "lpfc_hw.h"
46#include "lpfc_sli.h"
da0436e9 47#include "lpfc_sli4.h"
ea2151b4 48#include "lpfc_nl.h"
dea3101e 49#include "lpfc_disc.h"
dea3101e 50#include "lpfc.h"
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51#include "lpfc_scsi.h"
52#include "lpfc_nvme.h"
f358dd0c 53#include "lpfc_nvmet.h"
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54#include "lpfc_crtn.h"
55#include "lpfc_logmsg.h"
56#include "lpfc_compat.h"
858c9f6c 57#include "lpfc_debugfs.h"
04c68496 58#include "lpfc_vport.h"
61bda8f7 59#include "lpfc_version.h"
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60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
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69
70/* Provide function prototypes local to this module. */
71static int lpfc_sli_issue_mbox_s4(struct lpfc_hba *, LPFC_MBOXQ_t *,
72 uint32_t);
73static int lpfc_sli4_read_rev(struct lpfc_hba *, LPFC_MBOXQ_t *,
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74 uint8_t *, uint32_t *);
75static struct lpfc_iocbq *lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *,
76 struct lpfc_iocbq *);
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77static void lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *,
78 struct hbq_dmabuf *);
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79static void lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
80 struct hbq_dmabuf *dmabuf);
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81static bool lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba,
82 struct lpfc_queue *cq, struct lpfc_cqe *cqe);
895427bd 83static int lpfc_sli4_post_sgl_list(struct lpfc_hba *, struct list_head *,
8a9d2e80 84 int);
f485c18d 85static void lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba,
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86 struct lpfc_queue *eq,
87 struct lpfc_eqe *eqe);
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88static bool lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba);
89static bool lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba);
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90static struct lpfc_cqe *lpfc_sli4_cq_get(struct lpfc_queue *q);
91static void __lpfc_sli4_consume_cqe(struct lpfc_hba *phba,
92 struct lpfc_queue *cq,
93 struct lpfc_cqe *cqe);
0558056c 94
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95static IOCB_t *
96lpfc_get_iocb_from_iocbq(struct lpfc_iocbq *iocbq)
97{
98 return &iocbq->iocb;
99}
100
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101#if defined(CONFIG_64BIT) && defined(__LITTLE_ENDIAN)
102/**
103 * lpfc_sli4_pcimem_bcopy - SLI4 memory copy function
104 * @srcp: Source memory pointer.
105 * @destp: Destination memory pointer.
106 * @cnt: Number of words required to be copied.
107 * Must be a multiple of sizeof(uint64_t)
108 *
109 * This function is used for copying data between driver memory
110 * and the SLI WQ. This function also changes the endianness
111 * of each word if native endianness is different from SLI
112 * endianness. This function can be called with or without
113 * lock.
114 **/
d7b761b0 115static void
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116lpfc_sli4_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
117{
118 uint64_t *src = srcp;
119 uint64_t *dest = destp;
120 int i;
121
122 for (i = 0; i < (int)cnt; i += sizeof(uint64_t))
123 *dest++ = *src++;
124}
125#else
126#define lpfc_sli4_pcimem_bcopy(a, b, c) lpfc_sli_pcimem_bcopy(a, b, c)
127#endif
128
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129/**
130 * lpfc_sli4_wq_put - Put a Work Queue Entry on an Work Queue
131 * @q: The Work Queue to operate on.
132 * @wqe: The work Queue Entry to put on the Work queue.
133 *
134 * This routine will copy the contents of @wqe to the next available entry on
135 * the @q. This function will then ring the Work Queue Doorbell to signal the
136 * HBA to start processing the Work Queue Entry. This function returns 0 if
137 * successful. If no entries are available on @q then this function will return
138 * -ENOMEM.
139 * The caller is expected to hold the hbalock when calling this routine.
140 **/
cd22d605 141static int
205e8240 142lpfc_sli4_wq_put(struct lpfc_queue *q, union lpfc_wqe128 *wqe)
4f774513 143{
2e90f4b5 144 union lpfc_wqe *temp_wqe;
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145 struct lpfc_register doorbell;
146 uint32_t host_index;
027140ea 147 uint32_t idx;
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148 uint32_t i = 0;
149 uint8_t *tmp;
5cc167dd 150 u32 if_type;
4f774513 151
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152 /* sanity check on queue memory */
153 if (unlikely(!q))
154 return -ENOMEM;
9afbee3d 155 temp_wqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 156
4f774513 157 /* If the host has not yet processed the next entry then we are done */
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158 idx = ((q->host_index + 1) % q->entry_count);
159 if (idx == q->hba_index) {
b84daac9 160 q->WQ_overflow++;
cd22d605 161 return -EBUSY;
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162 }
163 q->WQ_posted++;
4f774513 164 /* set consumption flag every once in a while */
32517fc0 165 if (!((q->host_index + 1) % q->notify_interval))
f0d9bccc 166 bf_set(wqe_wqec, &wqe->generic.wqe_com, 1);
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167 else
168 bf_set(wqe_wqec, &wqe->generic.wqe_com, 0);
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169 if (q->phba->sli3_options & LPFC_SLI4_PHWQ_ENABLED)
170 bf_set(wqe_wqid, &wqe->generic.wqe_com, q->queue_id);
48f8fdb4 171 lpfc_sli4_pcimem_bcopy(wqe, temp_wqe, q->entry_size);
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172 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
173 /* write to DPP aperture taking advatage of Combined Writes */
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174 tmp = (uint8_t *)temp_wqe;
175#ifdef __raw_writeq
1351e69f 176 for (i = 0; i < q->entry_size; i += sizeof(uint64_t))
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177 __raw_writeq(*((uint64_t *)(tmp + i)),
178 q->dpp_regaddr + i);
179#else
180 for (i = 0; i < q->entry_size; i += sizeof(uint32_t))
181 __raw_writel(*((uint32_t *)(tmp + i)),
182 q->dpp_regaddr + i);
183#endif
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184 }
185 /* ensure WQE bcopy and DPP flushed before doorbell write */
6b3b3bdb 186 wmb();
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187
188 /* Update the host index before invoking device */
189 host_index = q->host_index;
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190
191 q->host_index = idx;
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192
193 /* Ring Doorbell */
194 doorbell.word0 = 0;
962bc51b 195 if (q->db_format == LPFC_DB_LIST_FORMAT) {
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196 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
197 bf_set(lpfc_if6_wq_db_list_fm_num_posted, &doorbell, 1);
198 bf_set(lpfc_if6_wq_db_list_fm_dpp, &doorbell, 1);
199 bf_set(lpfc_if6_wq_db_list_fm_dpp_id, &doorbell,
200 q->dpp_id);
201 bf_set(lpfc_if6_wq_db_list_fm_id, &doorbell,
202 q->queue_id);
203 } else {
204 bf_set(lpfc_wq_db_list_fm_num_posted, &doorbell, 1);
1351e69f 205 bf_set(lpfc_wq_db_list_fm_id, &doorbell, q->queue_id);
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206
207 /* Leave bits <23:16> clear for if_type 6 dpp */
208 if_type = bf_get(lpfc_sli_intf_if_type,
209 &q->phba->sli4_hba.sli_intf);
210 if (if_type != LPFC_SLI_INTF_IF_TYPE_6)
211 bf_set(lpfc_wq_db_list_fm_index, &doorbell,
212 host_index);
1351e69f 213 }
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214 } else if (q->db_format == LPFC_DB_RING_FORMAT) {
215 bf_set(lpfc_wq_db_ring_fm_num_posted, &doorbell, 1);
216 bf_set(lpfc_wq_db_ring_fm_id, &doorbell, q->queue_id);
217 } else {
218 return -EINVAL;
219 }
220 writel(doorbell.word0, q->db_regaddr);
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221
222 return 0;
223}
224
225/**
226 * lpfc_sli4_wq_release - Updates internal hba index for WQ
227 * @q: The Work Queue to operate on.
228 * @index: The index to advance the hba index to.
229 *
230 * This routine will update the HBA index of a queue to reflect consumption of
231 * Work Queue Entries by the HBA. When the HBA indicates that it has consumed
232 * an entry the host calls this function to update the queue's internal
233 * pointers. This routine returns the number of entries that were consumed by
234 * the HBA.
235 **/
236static uint32_t
237lpfc_sli4_wq_release(struct lpfc_queue *q, uint32_t index)
238{
239 uint32_t released = 0;
240
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241 /* sanity check on queue memory */
242 if (unlikely(!q))
243 return 0;
244
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245 if (q->hba_index == index)
246 return 0;
247 do {
248 q->hba_index = ((q->hba_index + 1) % q->entry_count);
249 released++;
250 } while (q->hba_index != index);
251 return released;
252}
253
254/**
255 * lpfc_sli4_mq_put - Put a Mailbox Queue Entry on an Mailbox Queue
256 * @q: The Mailbox Queue to operate on.
257 * @wqe: The Mailbox Queue Entry to put on the Work queue.
258 *
259 * This routine will copy the contents of @mqe to the next available entry on
260 * the @q. This function will then ring the Work Queue Doorbell to signal the
261 * HBA to start processing the Work Queue Entry. This function returns 0 if
262 * successful. If no entries are available on @q then this function will return
263 * -ENOMEM.
264 * The caller is expected to hold the hbalock when calling this routine.
265 **/
266static uint32_t
267lpfc_sli4_mq_put(struct lpfc_queue *q, struct lpfc_mqe *mqe)
268{
2e90f4b5 269 struct lpfc_mqe *temp_mqe;
4f774513 270 struct lpfc_register doorbell;
4f774513 271
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272 /* sanity check on queue memory */
273 if (unlikely(!q))
274 return -ENOMEM;
9afbee3d 275 temp_mqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 276
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277 /* If the host has not yet processed the next entry then we are done */
278 if (((q->host_index + 1) % q->entry_count) == q->hba_index)
279 return -ENOMEM;
48f8fdb4 280 lpfc_sli4_pcimem_bcopy(mqe, temp_mqe, q->entry_size);
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281 /* Save off the mailbox pointer for completion */
282 q->phba->mbox = (MAILBOX_t *)temp_mqe;
283
284 /* Update the host index before invoking device */
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285 q->host_index = ((q->host_index + 1) % q->entry_count);
286
287 /* Ring Doorbell */
288 doorbell.word0 = 0;
289 bf_set(lpfc_mq_doorbell_num_posted, &doorbell, 1);
290 bf_set(lpfc_mq_doorbell_id, &doorbell, q->queue_id);
291 writel(doorbell.word0, q->phba->sli4_hba.MQDBregaddr);
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292 return 0;
293}
294
295/**
296 * lpfc_sli4_mq_release - Updates internal hba index for MQ
297 * @q: The Mailbox Queue to operate on.
298 *
299 * This routine will update the HBA index of a queue to reflect consumption of
300 * a Mailbox Queue Entry by the HBA. When the HBA indicates that it has consumed
301 * an entry the host calls this function to update the queue's internal
302 * pointers. This routine returns the number of entries that were consumed by
303 * the HBA.
304 **/
305static uint32_t
306lpfc_sli4_mq_release(struct lpfc_queue *q)
307{
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308 /* sanity check on queue memory */
309 if (unlikely(!q))
310 return 0;
311
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312 /* Clear the mailbox pointer for completion */
313 q->phba->mbox = NULL;
314 q->hba_index = ((q->hba_index + 1) % q->entry_count);
315 return 1;
316}
317
318/**
319 * lpfc_sli4_eq_get - Gets the next valid EQE from a EQ
320 * @q: The Event Queue to get the first valid EQE from
321 *
322 * This routine will get the first valid Event Queue Entry from @q, update
323 * the queue's internal hba index, and return the EQE. If no valid EQEs are in
324 * the Queue (no more work to do), or the Queue is full of EQEs that have been
325 * processed, but not popped back to the HBA then this routine will return NULL.
326 **/
327static struct lpfc_eqe *
328lpfc_sli4_eq_get(struct lpfc_queue *q)
329{
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330 struct lpfc_eqe *eqe;
331
332 /* sanity check on queue memory */
333 if (unlikely(!q))
334 return NULL;
9afbee3d 335 eqe = lpfc_sli4_qe(q, q->host_index);
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336
337 /* If the next EQE is not valid then we are done */
7365f6fd 338 if (bf_get_le32(lpfc_eqe_valid, eqe) != q->qe_valid)
4f774513 339 return NULL;
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340
341 /*
342 * insert barrier for instruction interlock : data from the hardware
343 * must have the valid bit checked before it can be copied and acted
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344 * upon. Speculative instructions were allowing a bcopy at the start
345 * of lpfc_sli4_fp_handle_wcqe(), which is called immediately
346 * after our return, to copy data before the valid bit check above
347 * was done. As such, some of the copied data was stale. The barrier
348 * ensures the check is before any data is copied.
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349 */
350 mb();
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351 return eqe;
352}
353
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354/**
355 * lpfc_sli4_eq_clr_intr - Turn off interrupts from this EQ
356 * @q: The Event Queue to disable interrupts
357 *
358 **/
92f3b327 359void
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360lpfc_sli4_eq_clr_intr(struct lpfc_queue *q)
361{
362 struct lpfc_register doorbell;
363
364 doorbell.word0 = 0;
365 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
366 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
367 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
368 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
369 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 370 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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371}
372
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373/**
374 * lpfc_sli4_if6_eq_clr_intr - Turn off interrupts from this EQ
375 * @q: The Event Queue to disable interrupts
376 *
377 **/
92f3b327 378void
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379lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q)
380{
381 struct lpfc_register doorbell;
382
383 doorbell.word0 = 0;
aad59d5d 384 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
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385 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
386}
387
4f774513 388/**
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389 * lpfc_sli4_write_eq_db - write EQ DB for eqe's consumed or arm state
390 * @phba: adapter with EQ
4f774513 391 * @q: The Event Queue that the host has completed processing for.
32517fc0 392 * @count: Number of elements that have been consumed
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393 * @arm: Indicates whether the host wants to arms this CQ.
394 *
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395 * This routine will notify the HBA, by ringing the doorbell, that count
396 * number of EQEs have been processed. The @arm parameter indicates whether
397 * the queue should be rearmed when ringing the doorbell.
4f774513 398 **/
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399void
400lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
401 uint32_t count, bool arm)
4f774513 402{
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403 struct lpfc_register doorbell;
404
2e90f4b5 405 /* sanity check on queue memory */
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406 if (unlikely(!q || (count == 0 && !arm)))
407 return;
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408
409 /* ring doorbell for number popped */
410 doorbell.word0 = 0;
411 if (arm) {
412 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
413 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
414 }
32517fc0 415 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, count);
4f774513 416 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
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417 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
418 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
419 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 420 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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421 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
422 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
9dd35425 423 readl(q->phba->sli4_hba.EQDBregaddr);
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424}
425
27d6ac0a 426/**
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427 * lpfc_sli4_if6_write_eq_db - write EQ DB for eqe's consumed or arm state
428 * @phba: adapter with EQ
27d6ac0a 429 * @q: The Event Queue that the host has completed processing for.
32517fc0 430 * @count: Number of elements that have been consumed
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431 * @arm: Indicates whether the host wants to arms this CQ.
432 *
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433 * This routine will notify the HBA, by ringing the doorbell, that count
434 * number of EQEs have been processed. The @arm parameter indicates whether
435 * the queue should be rearmed when ringing the doorbell.
27d6ac0a 436 **/
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437void
438lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
439 uint32_t count, bool arm)
27d6ac0a 440{
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441 struct lpfc_register doorbell;
442
443 /* sanity check on queue memory */
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444 if (unlikely(!q || (count == 0 && !arm)))
445 return;
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446
447 /* ring doorbell for number popped */
448 doorbell.word0 = 0;
449 if (arm)
450 bf_set(lpfc_if6_eq_doorbell_arm, &doorbell, 1);
32517fc0 451 bf_set(lpfc_if6_eq_doorbell_num_released, &doorbell, count);
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452 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
453 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
454 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
455 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
456 readl(q->phba->sli4_hba.EQDBregaddr);
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457}
458
459static void
460__lpfc_sli4_consume_eqe(struct lpfc_hba *phba, struct lpfc_queue *eq,
461 struct lpfc_eqe *eqe)
462{
463 if (!phba->sli4_hba.pc_sli4_params.eqav)
464 bf_set_le32(lpfc_eqe_valid, eqe, 0);
465
466 eq->host_index = ((eq->host_index + 1) % eq->entry_count);
467
468 /* if the index wrapped around, toggle the valid bit */
469 if (phba->sli4_hba.pc_sli4_params.eqav && !eq->host_index)
470 eq->qe_valid = (eq->qe_valid) ? 0 : 1;
471}
472
473static void
24c7c0a6 474lpfc_sli4_eqcq_flush(struct lpfc_hba *phba, struct lpfc_queue *eq)
32517fc0 475{
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JS
476 struct lpfc_eqe *eqe = NULL;
477 u32 eq_count = 0, cq_count = 0;
478 struct lpfc_cqe *cqe = NULL;
479 struct lpfc_queue *cq = NULL, *childq = NULL;
480 int cqid = 0;
32517fc0
JS
481
482 /* walk all the EQ entries and drop on the floor */
483 eqe = lpfc_sli4_eq_get(eq);
484 while (eqe) {
24c7c0a6
JS
485 /* Get the reference to the corresponding CQ */
486 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
487 cq = NULL;
488
489 list_for_each_entry(childq, &eq->child_list, list) {
490 if (childq->queue_id == cqid) {
491 cq = childq;
492 break;
493 }
494 }
495 /* If CQ is valid, iterate through it and drop all the CQEs */
496 if (cq) {
497 cqe = lpfc_sli4_cq_get(cq);
498 while (cqe) {
499 __lpfc_sli4_consume_cqe(phba, cq, cqe);
500 cq_count++;
501 cqe = lpfc_sli4_cq_get(cq);
502 }
503 /* Clear and re-arm the CQ */
504 phba->sli4_hba.sli4_write_cq_db(phba, cq, cq_count,
505 LPFC_QUEUE_REARM);
506 cq_count = 0;
507 }
32517fc0 508 __lpfc_sli4_consume_eqe(phba, eq, eqe);
24c7c0a6 509 eq_count++;
32517fc0
JS
510 eqe = lpfc_sli4_eq_get(eq);
511 }
512
513 /* Clear and re-arm the EQ */
24c7c0a6 514 phba->sli4_hba.sli4_write_eq_db(phba, eq, eq_count, LPFC_QUEUE_REARM);
32517fc0
JS
515}
516
517static int
518lpfc_sli4_process_eq(struct lpfc_hba *phba, struct lpfc_queue *eq)
519{
520 struct lpfc_eqe *eqe;
521 int count = 0, consumed = 0;
522
523 if (cmpxchg(&eq->queue_claimed, 0, 1) != 0)
524 goto rearm_and_exit;
525
526 eqe = lpfc_sli4_eq_get(eq);
527 while (eqe) {
528 lpfc_sli4_hba_handle_eqe(phba, eq, eqe);
529 __lpfc_sli4_consume_eqe(phba, eq, eqe);
530
531 consumed++;
532 if (!(++count % eq->max_proc_limit))
533 break;
534
535 if (!(count % eq->notify_interval)) {
536 phba->sli4_hba.sli4_write_eq_db(phba, eq, consumed,
537 LPFC_QUEUE_NOARM);
538 consumed = 0;
539 }
540
541 eqe = lpfc_sli4_eq_get(eq);
542 }
543 eq->EQ_processed += count;
544
545 /* Track the max number of EQEs processed in 1 intr */
546 if (count > eq->EQ_max_eqe)
547 eq->EQ_max_eqe = count;
548
549 eq->queue_claimed = 0;
550
551rearm_and_exit:
552 /* Always clear and re-arm the EQ */
553 phba->sli4_hba.sli4_write_eq_db(phba, eq, consumed, LPFC_QUEUE_REARM);
554
555 return count;
27d6ac0a
JS
556}
557
4f774513
JS
558/**
559 * lpfc_sli4_cq_get - Gets the next valid CQE from a CQ
560 * @q: The Completion Queue to get the first valid CQE from
561 *
562 * This routine will get the first valid Completion Queue Entry from @q, update
563 * the queue's internal hba index, and return the CQE. If no valid CQEs are in
564 * the Queue (no more work to do), or the Queue is full of CQEs that have been
565 * processed, but not popped back to the HBA then this routine will return NULL.
566 **/
567static struct lpfc_cqe *
568lpfc_sli4_cq_get(struct lpfc_queue *q)
569{
570 struct lpfc_cqe *cqe;
571
2e90f4b5
JS
572 /* sanity check on queue memory */
573 if (unlikely(!q))
574 return NULL;
9afbee3d 575 cqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 576
4f774513 577 /* If the next CQE is not valid then we are done */
7365f6fd 578 if (bf_get_le32(lpfc_cqe_valid, cqe) != q->qe_valid)
4f774513 579 return NULL;
27f344eb
JS
580
581 /*
582 * insert barrier for instruction interlock : data from the hardware
583 * must have the valid bit checked before it can be copied and acted
2ea259ee
JS
584 * upon. Given what was seen in lpfc_sli4_cq_get() of speculative
585 * instructions allowing action on content before valid bit checked,
586 * add barrier here as well. May not be needed as "content" is a
587 * single 32-bit entity here (vs multi word structure for cq's).
27f344eb
JS
588 */
589 mb();
4f774513
JS
590 return cqe;
591}
592
32517fc0
JS
593static void
594__lpfc_sli4_consume_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
595 struct lpfc_cqe *cqe)
596{
597 if (!phba->sli4_hba.pc_sli4_params.cqav)
598 bf_set_le32(lpfc_cqe_valid, cqe, 0);
599
600 cq->host_index = ((cq->host_index + 1) % cq->entry_count);
601
602 /* if the index wrapped around, toggle the valid bit */
603 if (phba->sli4_hba.pc_sli4_params.cqav && !cq->host_index)
604 cq->qe_valid = (cq->qe_valid) ? 0 : 1;
605}
606
4f774513 607/**
32517fc0
JS
608 * lpfc_sli4_write_cq_db - write cq DB for entries consumed or arm state.
609 * @phba: the adapter with the CQ
4f774513 610 * @q: The Completion Queue that the host has completed processing for.
32517fc0 611 * @count: the number of elements that were consumed
4f774513
JS
612 * @arm: Indicates whether the host wants to arms this CQ.
613 *
32517fc0
JS
614 * This routine will notify the HBA, by ringing the doorbell, that the
615 * CQEs have been processed. The @arm parameter specifies whether the
616 * queue should be rearmed when ringing the doorbell.
4f774513 617 **/
32517fc0
JS
618void
619lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
620 uint32_t count, bool arm)
4f774513 621{
4f774513
JS
622 struct lpfc_register doorbell;
623
2e90f4b5 624 /* sanity check on queue memory */
32517fc0
JS
625 if (unlikely(!q || (count == 0 && !arm)))
626 return;
4f774513
JS
627
628 /* ring doorbell for number popped */
629 doorbell.word0 = 0;
630 if (arm)
631 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
32517fc0 632 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, count);
4f774513 633 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_COMPLETION);
6b5151fd
JS
634 bf_set(lpfc_eqcq_doorbell_cqid_hi, &doorbell,
635 (q->queue_id >> LPFC_CQID_HI_FIELD_SHIFT));
636 bf_set(lpfc_eqcq_doorbell_cqid_lo, &doorbell, q->queue_id);
9dd35425 637 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
4f774513
JS
638}
639
27d6ac0a 640/**
32517fc0
JS
641 * lpfc_sli4_if6_write_cq_db - write cq DB for entries consumed or arm state.
642 * @phba: the adapter with the CQ
27d6ac0a 643 * @q: The Completion Queue that the host has completed processing for.
32517fc0 644 * @count: the number of elements that were consumed
27d6ac0a
JS
645 * @arm: Indicates whether the host wants to arms this CQ.
646 *
32517fc0
JS
647 * This routine will notify the HBA, by ringing the doorbell, that the
648 * CQEs have been processed. The @arm parameter specifies whether the
649 * queue should be rearmed when ringing the doorbell.
27d6ac0a 650 **/
32517fc0
JS
651void
652lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
653 uint32_t count, bool arm)
27d6ac0a 654{
27d6ac0a
JS
655 struct lpfc_register doorbell;
656
657 /* sanity check on queue memory */
32517fc0
JS
658 if (unlikely(!q || (count == 0 && !arm)))
659 return;
27d6ac0a
JS
660
661 /* ring doorbell for number popped */
662 doorbell.word0 = 0;
663 if (arm)
664 bf_set(lpfc_if6_cq_doorbell_arm, &doorbell, 1);
32517fc0 665 bf_set(lpfc_if6_cq_doorbell_num_released, &doorbell, count);
27d6ac0a
JS
666 bf_set(lpfc_if6_cq_doorbell_cqid, &doorbell, q->queue_id);
667 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
27d6ac0a
JS
668}
669
4f774513
JS
670/**
671 * lpfc_sli4_rq_put - Put a Receive Buffer Queue Entry on a Receive Queue
672 * @q: The Header Receive Queue to operate on.
673 * @wqe: The Receive Queue Entry to put on the Receive queue.
674 *
675 * This routine will copy the contents of @wqe to the next available entry on
676 * the @q. This function will then ring the Receive Queue Doorbell to signal the
677 * HBA to start processing the Receive Queue Entry. This function returns the
678 * index that the rqe was copied to if successful. If no entries are available
679 * on @q then this function will return -ENOMEM.
680 * The caller is expected to hold the hbalock when calling this routine.
681 **/
895427bd 682int
4f774513
JS
683lpfc_sli4_rq_put(struct lpfc_queue *hq, struct lpfc_queue *dq,
684 struct lpfc_rqe *hrqe, struct lpfc_rqe *drqe)
685{
2e90f4b5
JS
686 struct lpfc_rqe *temp_hrqe;
687 struct lpfc_rqe *temp_drqe;
4f774513 688 struct lpfc_register doorbell;
cbc5de1b
JS
689 int hq_put_index;
690 int dq_put_index;
4f774513 691
2e90f4b5
JS
692 /* sanity check on queue memory */
693 if (unlikely(!hq) || unlikely(!dq))
694 return -ENOMEM;
cbc5de1b
JS
695 hq_put_index = hq->host_index;
696 dq_put_index = dq->host_index;
9afbee3d
JS
697 temp_hrqe = lpfc_sli4_qe(hq, hq_put_index);
698 temp_drqe = lpfc_sli4_qe(dq, dq_put_index);
2e90f4b5 699
4f774513
JS
700 if (hq->type != LPFC_HRQ || dq->type != LPFC_DRQ)
701 return -EINVAL;
cbc5de1b 702 if (hq_put_index != dq_put_index)
4f774513
JS
703 return -EINVAL;
704 /* If the host has not yet processed the next entry then we are done */
cbc5de1b 705 if (((hq_put_index + 1) % hq->entry_count) == hq->hba_index)
4f774513 706 return -EBUSY;
48f8fdb4
JS
707 lpfc_sli4_pcimem_bcopy(hrqe, temp_hrqe, hq->entry_size);
708 lpfc_sli4_pcimem_bcopy(drqe, temp_drqe, dq->entry_size);
4f774513
JS
709
710 /* Update the host index to point to the next slot */
cbc5de1b
JS
711 hq->host_index = ((hq_put_index + 1) % hq->entry_count);
712 dq->host_index = ((dq_put_index + 1) % dq->entry_count);
61f3d4bf 713 hq->RQ_buf_posted++;
4f774513
JS
714
715 /* Ring The Header Receive Queue Doorbell */
32517fc0 716 if (!(hq->host_index % hq->notify_interval)) {
4f774513 717 doorbell.word0 = 0;
962bc51b
JS
718 if (hq->db_format == LPFC_DB_RING_FORMAT) {
719 bf_set(lpfc_rq_db_ring_fm_num_posted, &doorbell,
32517fc0 720 hq->notify_interval);
962bc51b
JS
721 bf_set(lpfc_rq_db_ring_fm_id, &doorbell, hq->queue_id);
722 } else if (hq->db_format == LPFC_DB_LIST_FORMAT) {
723 bf_set(lpfc_rq_db_list_fm_num_posted, &doorbell,
32517fc0 724 hq->notify_interval);
962bc51b
JS
725 bf_set(lpfc_rq_db_list_fm_index, &doorbell,
726 hq->host_index);
727 bf_set(lpfc_rq_db_list_fm_id, &doorbell, hq->queue_id);
728 } else {
729 return -EINVAL;
730 }
731 writel(doorbell.word0, hq->db_regaddr);
4f774513 732 }
cbc5de1b 733 return hq_put_index;
4f774513
JS
734}
735
736/**
737 * lpfc_sli4_rq_release - Updates internal hba index for RQ
738 * @q: The Header Receive Queue to operate on.
739 *
740 * This routine will update the HBA index of a queue to reflect consumption of
741 * one Receive Queue Entry by the HBA. When the HBA indicates that it has
742 * consumed an entry the host calls this function to update the queue's
743 * internal pointers. This routine returns the number of entries that were
744 * consumed by the HBA.
745 **/
746static uint32_t
747lpfc_sli4_rq_release(struct lpfc_queue *hq, struct lpfc_queue *dq)
748{
2e90f4b5
JS
749 /* sanity check on queue memory */
750 if (unlikely(!hq) || unlikely(!dq))
751 return 0;
752
4f774513
JS
753 if ((hq->type != LPFC_HRQ) || (dq->type != LPFC_DRQ))
754 return 0;
755 hq->hba_index = ((hq->hba_index + 1) % hq->entry_count);
756 dq->hba_index = ((dq->hba_index + 1) % dq->entry_count);
757 return 1;
758}
759
e59058c4 760/**
3621a710 761 * lpfc_cmd_iocb - Get next command iocb entry in the ring
e59058c4
JS
762 * @phba: Pointer to HBA context object.
763 * @pring: Pointer to driver SLI ring object.
764 *
765 * This function returns pointer to next command iocb entry
766 * in the command ring. The caller must hold hbalock to prevent
767 * other threads consume the next command iocb.
768 * SLI-2/SLI-3 provide different sized iocbs.
769 **/
ed957684
JS
770static inline IOCB_t *
771lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
772{
7e56aa25
JS
773 return (IOCB_t *) (((char *) pring->sli.sli3.cmdringaddr) +
774 pring->sli.sli3.cmdidx * phba->iocb_cmd_size);
ed957684
JS
775}
776
e59058c4 777/**
3621a710 778 * lpfc_resp_iocb - Get next response iocb entry in the ring
e59058c4
JS
779 * @phba: Pointer to HBA context object.
780 * @pring: Pointer to driver SLI ring object.
781 *
782 * This function returns pointer to next response iocb entry
783 * in the response ring. The caller must hold hbalock to make sure
784 * that no other thread consume the next response iocb.
785 * SLI-2/SLI-3 provide different sized iocbs.
786 **/
ed957684
JS
787static inline IOCB_t *
788lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
789{
7e56aa25
JS
790 return (IOCB_t *) (((char *) pring->sli.sli3.rspringaddr) +
791 pring->sli.sli3.rspidx * phba->iocb_rsp_size);
ed957684
JS
792}
793
e59058c4 794/**
3621a710 795 * __lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
796 * @phba: Pointer to HBA context object.
797 *
798 * This function is called with hbalock held. This function
799 * allocates a new driver iocb object from the iocb pool. If the
800 * allocation is successful, it returns pointer to the newly
801 * allocated iocb object else it returns NULL.
802 **/
4f2e66c6 803struct lpfc_iocbq *
2e0fef85 804__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC
805{
806 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
807 struct lpfc_iocbq * iocbq = NULL;
808
1c2ba475
JT
809 lockdep_assert_held(&phba->hbalock);
810
0bd4ca25 811 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
2a9bf3d0
JS
812 if (iocbq)
813 phba->iocb_cnt++;
814 if (phba->iocb_cnt > phba->iocb_max)
815 phba->iocb_max = phba->iocb_cnt;
0bd4ca25
JSEC
816 return iocbq;
817}
818
da0436e9
JS
819/**
820 * __lpfc_clear_active_sglq - Remove the active sglq for this XRI.
821 * @phba: Pointer to HBA context object.
822 * @xritag: XRI value.
823 *
824 * This function clears the sglq pointer from the array of acive
825 * sglq's. The xritag that is passed in is used to index into the
826 * array. Before the xritag can be used it needs to be adjusted
827 * by subtracting the xribase.
828 *
829 * Returns sglq ponter = success, NULL = Failure.
830 **/
895427bd 831struct lpfc_sglq *
da0436e9
JS
832__lpfc_clear_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
833{
da0436e9 834 struct lpfc_sglq *sglq;
6d368e53
JS
835
836 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
837 phba->sli4_hba.lpfc_sglq_active_list[xritag] = NULL;
da0436e9
JS
838 return sglq;
839}
840
841/**
842 * __lpfc_get_active_sglq - Get the active sglq for this XRI.
843 * @phba: Pointer to HBA context object.
844 * @xritag: XRI value.
845 *
846 * This function returns the sglq pointer from the array of acive
847 * sglq's. The xritag that is passed in is used to index into the
848 * array. Before the xritag can be used it needs to be adjusted
849 * by subtracting the xribase.
850 *
851 * Returns sglq ponter = success, NULL = Failure.
852 **/
0f65ff68 853struct lpfc_sglq *
da0436e9
JS
854__lpfc_get_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
855{
da0436e9 856 struct lpfc_sglq *sglq;
6d368e53
JS
857
858 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
da0436e9
JS
859 return sglq;
860}
861
19ca7609 862/**
1151e3ec 863 * lpfc_clr_rrq_active - Clears RRQ active bit in xri_bitmap.
19ca7609
JS
864 * @phba: Pointer to HBA context object.
865 * @xritag: xri used in this exchange.
866 * @rrq: The RRQ to be cleared.
867 *
19ca7609 868 **/
1151e3ec
JS
869void
870lpfc_clr_rrq_active(struct lpfc_hba *phba,
871 uint16_t xritag,
872 struct lpfc_node_rrq *rrq)
19ca7609 873{
1151e3ec 874 struct lpfc_nodelist *ndlp = NULL;
19ca7609 875
1151e3ec
JS
876 if ((rrq->vport) && NLP_CHK_NODE_ACT(rrq->ndlp))
877 ndlp = lpfc_findnode_did(rrq->vport, rrq->nlp_DID);
19ca7609
JS
878
879 /* The target DID could have been swapped (cable swap)
880 * we should use the ndlp from the findnode if it is
881 * available.
882 */
1151e3ec 883 if ((!ndlp) && rrq->ndlp)
19ca7609
JS
884 ndlp = rrq->ndlp;
885
1151e3ec
JS
886 if (!ndlp)
887 goto out;
888
cff261f6 889 if (test_and_clear_bit(xritag, ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
890 rrq->send_rrq = 0;
891 rrq->xritag = 0;
892 rrq->rrq_stop_time = 0;
893 }
1151e3ec 894out:
19ca7609
JS
895 mempool_free(rrq, phba->rrq_pool);
896}
897
898/**
899 * lpfc_handle_rrq_active - Checks if RRQ has waithed RATOV.
900 * @phba: Pointer to HBA context object.
901 *
902 * This function is called with hbalock held. This function
903 * Checks if stop_time (ratov from setting rrq active) has
904 * been reached, if it has and the send_rrq flag is set then
905 * it will call lpfc_send_rrq. If the send_rrq flag is not set
906 * then it will just call the routine to clear the rrq and
907 * free the rrq resource.
908 * The timer is set to the next rrq that is going to expire before
909 * leaving the routine.
910 *
911 **/
912void
913lpfc_handle_rrq_active(struct lpfc_hba *phba)
914{
915 struct lpfc_node_rrq *rrq;
916 struct lpfc_node_rrq *nextrrq;
917 unsigned long next_time;
918 unsigned long iflags;
1151e3ec 919 LIST_HEAD(send_rrq);
19ca7609
JS
920
921 spin_lock_irqsave(&phba->hbalock, iflags);
922 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
256ec0d0 923 next_time = jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
19ca7609 924 list_for_each_entry_safe(rrq, nextrrq,
1151e3ec
JS
925 &phba->active_rrq_list, list) {
926 if (time_after(jiffies, rrq->rrq_stop_time))
927 list_move(&rrq->list, &send_rrq);
928 else if (time_before(rrq->rrq_stop_time, next_time))
19ca7609
JS
929 next_time = rrq->rrq_stop_time;
930 }
931 spin_unlock_irqrestore(&phba->hbalock, iflags);
06918ac5
JS
932 if ((!list_empty(&phba->active_rrq_list)) &&
933 (!(phba->pport->load_flag & FC_UNLOADING)))
19ca7609 934 mod_timer(&phba->rrq_tmr, next_time);
1151e3ec
JS
935 list_for_each_entry_safe(rrq, nextrrq, &send_rrq, list) {
936 list_del(&rrq->list);
ffd43814 937 if (!rrq->send_rrq) {
1151e3ec 938 /* this call will free the rrq */
ffd43814
BVA
939 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
940 } else if (lpfc_send_rrq(phba, rrq)) {
1151e3ec
JS
941 /* if we send the rrq then the completion handler
942 * will clear the bit in the xribitmap.
943 */
944 lpfc_clr_rrq_active(phba, rrq->xritag,
945 rrq);
946 }
947 }
19ca7609
JS
948}
949
950/**
951 * lpfc_get_active_rrq - Get the active RRQ for this exchange.
952 * @vport: Pointer to vport context object.
953 * @xri: The xri used in the exchange.
954 * @did: The targets DID for this exchange.
955 *
956 * returns NULL = rrq not found in the phba->active_rrq_list.
957 * rrq = rrq for this xri and target.
958 **/
959struct lpfc_node_rrq *
960lpfc_get_active_rrq(struct lpfc_vport *vport, uint16_t xri, uint32_t did)
961{
962 struct lpfc_hba *phba = vport->phba;
963 struct lpfc_node_rrq *rrq;
964 struct lpfc_node_rrq *nextrrq;
965 unsigned long iflags;
966
967 if (phba->sli_rev != LPFC_SLI_REV4)
968 return NULL;
969 spin_lock_irqsave(&phba->hbalock, iflags);
970 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list) {
971 if (rrq->vport == vport && rrq->xritag == xri &&
972 rrq->nlp_DID == did){
973 list_del(&rrq->list);
974 spin_unlock_irqrestore(&phba->hbalock, iflags);
975 return rrq;
976 }
977 }
978 spin_unlock_irqrestore(&phba->hbalock, iflags);
979 return NULL;
980}
981
982/**
983 * lpfc_cleanup_vports_rrqs - Remove and clear the active RRQ for this vport.
984 * @vport: Pointer to vport context object.
1151e3ec
JS
985 * @ndlp: Pointer to the lpfc_node_list structure.
986 * If ndlp is NULL Remove all active RRQs for this vport from the
987 * phba->active_rrq_list and clear the rrq.
988 * If ndlp is not NULL then only remove rrqs for this vport & this ndlp.
19ca7609
JS
989 **/
990void
1151e3ec 991lpfc_cleanup_vports_rrqs(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
19ca7609
JS
992
993{
994 struct lpfc_hba *phba = vport->phba;
995 struct lpfc_node_rrq *rrq;
996 struct lpfc_node_rrq *nextrrq;
997 unsigned long iflags;
1151e3ec 998 LIST_HEAD(rrq_list);
19ca7609
JS
999
1000 if (phba->sli_rev != LPFC_SLI_REV4)
1001 return;
1151e3ec
JS
1002 if (!ndlp) {
1003 lpfc_sli4_vport_delete_els_xri_aborted(vport);
1004 lpfc_sli4_vport_delete_fcp_xri_aborted(vport);
19ca7609 1005 }
1151e3ec
JS
1006 spin_lock_irqsave(&phba->hbalock, iflags);
1007 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list)
1008 if ((rrq->vport == vport) && (!ndlp || rrq->ndlp == ndlp))
1009 list_move(&rrq->list, &rrq_list);
19ca7609 1010 spin_unlock_irqrestore(&phba->hbalock, iflags);
1151e3ec
JS
1011
1012 list_for_each_entry_safe(rrq, nextrrq, &rrq_list, list) {
1013 list_del(&rrq->list);
1014 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
1015 }
19ca7609
JS
1016}
1017
19ca7609 1018/**
1151e3ec 1019 * lpfc_test_rrq_active - Test RRQ bit in xri_bitmap.
19ca7609
JS
1020 * @phba: Pointer to HBA context object.
1021 * @ndlp: Targets nodelist pointer for this exchange.
1022 * @xritag the xri in the bitmap to test.
1023 *
e2a8be56
JS
1024 * This function returns:
1025 * 0 = rrq not active for this xri
1026 * 1 = rrq is valid for this xri.
19ca7609 1027 **/
1151e3ec
JS
1028int
1029lpfc_test_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
19ca7609
JS
1030 uint16_t xritag)
1031{
19ca7609
JS
1032 if (!ndlp)
1033 return 0;
cff261f6
JS
1034 if (!ndlp->active_rrqs_xri_bitmap)
1035 return 0;
1036 if (test_bit(xritag, ndlp->active_rrqs_xri_bitmap))
258f84fa 1037 return 1;
19ca7609
JS
1038 else
1039 return 0;
1040}
1041
1042/**
1043 * lpfc_set_rrq_active - set RRQ active bit in xri_bitmap.
1044 * @phba: Pointer to HBA context object.
1045 * @ndlp: nodelist pointer for this target.
1046 * @xritag: xri used in this exchange.
1047 * @rxid: Remote Exchange ID.
1048 * @send_rrq: Flag used to determine if we should send rrq els cmd.
1049 *
1050 * This function takes the hbalock.
1051 * The active bit is always set in the active rrq xri_bitmap even
1052 * if there is no slot avaiable for the other rrq information.
1053 *
1054 * returns 0 rrq actived for this xri
1055 * < 0 No memory or invalid ndlp.
1056 **/
1057int
1058lpfc_set_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
b42c07c8 1059 uint16_t xritag, uint16_t rxid, uint16_t send_rrq)
19ca7609 1060{
19ca7609 1061 unsigned long iflags;
b42c07c8
JS
1062 struct lpfc_node_rrq *rrq;
1063 int empty;
1064
1065 if (!ndlp)
1066 return -EINVAL;
1067
1068 if (!phba->cfg_enable_rrq)
1069 return -EINVAL;
19ca7609
JS
1070
1071 spin_lock_irqsave(&phba->hbalock, iflags);
b42c07c8
JS
1072 if (phba->pport->load_flag & FC_UNLOADING) {
1073 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
1074 goto out;
1075 }
1076
1077 /*
1078 * set the active bit even if there is no mem available.
1079 */
1080 if (NLP_CHK_FREE_REQ(ndlp))
1081 goto out;
1082
1083 if (ndlp->vport && (ndlp->vport->load_flag & FC_UNLOADING))
1084 goto out;
1085
cff261f6
JS
1086 if (!ndlp->active_rrqs_xri_bitmap)
1087 goto out;
1088
1089 if (test_and_set_bit(xritag, ndlp->active_rrqs_xri_bitmap))
b42c07c8
JS
1090 goto out;
1091
19ca7609 1092 spin_unlock_irqrestore(&phba->hbalock, iflags);
b42c07c8
JS
1093 rrq = mempool_alloc(phba->rrq_pool, GFP_KERNEL);
1094 if (!rrq) {
1095 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1096 "3155 Unable to allocate RRQ xri:0x%x rxid:0x%x"
1097 " DID:0x%x Send:%d\n",
1098 xritag, rxid, ndlp->nlp_DID, send_rrq);
1099 return -EINVAL;
1100 }
e5771b4d
JS
1101 if (phba->cfg_enable_rrq == 1)
1102 rrq->send_rrq = send_rrq;
1103 else
1104 rrq->send_rrq = 0;
b42c07c8 1105 rrq->xritag = xritag;
256ec0d0
JS
1106 rrq->rrq_stop_time = jiffies +
1107 msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
b42c07c8
JS
1108 rrq->ndlp = ndlp;
1109 rrq->nlp_DID = ndlp->nlp_DID;
1110 rrq->vport = ndlp->vport;
1111 rrq->rxid = rxid;
b42c07c8
JS
1112 spin_lock_irqsave(&phba->hbalock, iflags);
1113 empty = list_empty(&phba->active_rrq_list);
1114 list_add_tail(&rrq->list, &phba->active_rrq_list);
1115 phba->hba_flag |= HBA_RRQ_ACTIVE;
1116 if (empty)
1117 lpfc_worker_wake_up(phba);
1118 spin_unlock_irqrestore(&phba->hbalock, iflags);
1119 return 0;
1120out:
1121 spin_unlock_irqrestore(&phba->hbalock, iflags);
1122 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1123 "2921 Can't set rrq active xri:0x%x rxid:0x%x"
1124 " DID:0x%x Send:%d\n",
1125 xritag, rxid, ndlp->nlp_DID, send_rrq);
1126 return -EINVAL;
19ca7609
JS
1127}
1128
da0436e9 1129/**
895427bd 1130 * __lpfc_sli_get_els_sglq - Allocates an iocb object from sgl pool
da0436e9 1131 * @phba: Pointer to HBA context object.
19ca7609 1132 * @piocb: Pointer to the iocbq.
da0436e9 1133 *
e2a8be56
JS
1134 * The driver calls this function with either the nvme ls ring lock
1135 * or the fc els ring lock held depending on the iocb usage. This function
1136 * gets a new driver sglq object from the sglq list. If the list is not empty
1137 * then it is successful, it returns pointer to the newly allocated sglq
1138 * object else it returns NULL.
da0436e9
JS
1139 **/
1140static struct lpfc_sglq *
895427bd 1141__lpfc_sli_get_els_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
da0436e9 1142{
895427bd 1143 struct list_head *lpfc_els_sgl_list = &phba->sli4_hba.lpfc_els_sgl_list;
da0436e9 1144 struct lpfc_sglq *sglq = NULL;
19ca7609 1145 struct lpfc_sglq *start_sglq = NULL;
c490850a 1146 struct lpfc_io_buf *lpfc_cmd;
19ca7609 1147 struct lpfc_nodelist *ndlp;
e2a8be56 1148 struct lpfc_sli_ring *pring = NULL;
19ca7609
JS
1149 int found = 0;
1150
e2a8be56
JS
1151 if (piocbq->iocb_flag & LPFC_IO_NVME_LS)
1152 pring = phba->sli4_hba.nvmels_wq->pring;
1153 else
1154 pring = lpfc_phba_elsring(phba);
1155
1156 lockdep_assert_held(&pring->ring_lock);
1c2ba475 1157
19ca7609 1158 if (piocbq->iocb_flag & LPFC_IO_FCP) {
c490850a 1159 lpfc_cmd = (struct lpfc_io_buf *) piocbq->context1;
19ca7609 1160 ndlp = lpfc_cmd->rdata->pnode;
be858b65 1161 } else if ((piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) &&
6c7cf486 1162 !(piocbq->iocb_flag & LPFC_IO_LIBDFC)) {
19ca7609 1163 ndlp = piocbq->context_un.ndlp;
6c7cf486
JS
1164 } else if (piocbq->iocb_flag & LPFC_IO_LIBDFC) {
1165 if (piocbq->iocb_flag & LPFC_IO_LOOPBACK)
1166 ndlp = NULL;
1167 else
1168 ndlp = piocbq->context_un.ndlp;
1169 } else {
19ca7609 1170 ndlp = piocbq->context1;
6c7cf486 1171 }
19ca7609 1172
895427bd
JS
1173 spin_lock(&phba->sli4_hba.sgl_list_lock);
1174 list_remove_head(lpfc_els_sgl_list, sglq, struct lpfc_sglq, list);
19ca7609
JS
1175 start_sglq = sglq;
1176 while (!found) {
1177 if (!sglq)
d11f54b7 1178 break;
895427bd
JS
1179 if (ndlp && ndlp->active_rrqs_xri_bitmap &&
1180 test_bit(sglq->sli4_lxritag,
1181 ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
1182 /* This xri has an rrq outstanding for this DID.
1183 * put it back in the list and get another xri.
1184 */
895427bd 1185 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609 1186 sglq = NULL;
895427bd 1187 list_remove_head(lpfc_els_sgl_list, sglq,
19ca7609
JS
1188 struct lpfc_sglq, list);
1189 if (sglq == start_sglq) {
14041bd1 1190 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609
JS
1191 sglq = NULL;
1192 break;
1193 } else
1194 continue;
1195 }
1196 sglq->ndlp = ndlp;
1197 found = 1;
6d368e53 1198 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
19ca7609
JS
1199 sglq->state = SGL_ALLOCATED;
1200 }
895427bd 1201 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1202 return sglq;
1203}
1204
f358dd0c
JS
1205/**
1206 * __lpfc_sli_get_nvmet_sglq - Allocates an iocb object from sgl pool
1207 * @phba: Pointer to HBA context object.
1208 * @piocb: Pointer to the iocbq.
1209 *
1210 * This function is called with the sgl_list lock held. This function
1211 * gets a new driver sglq object from the sglq list. If the
1212 * list is not empty then it is successful, it returns pointer to the newly
1213 * allocated sglq object else it returns NULL.
1214 **/
1215struct lpfc_sglq *
1216__lpfc_sli_get_nvmet_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
1217{
1218 struct list_head *lpfc_nvmet_sgl_list;
1219 struct lpfc_sglq *sglq = NULL;
1220
1221 lpfc_nvmet_sgl_list = &phba->sli4_hba.lpfc_nvmet_sgl_list;
1222
1223 lockdep_assert_held(&phba->sli4_hba.sgl_list_lock);
1224
1225 list_remove_head(lpfc_nvmet_sgl_list, sglq, struct lpfc_sglq, list);
1226 if (!sglq)
1227 return NULL;
1228 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
1229 sglq->state = SGL_ALLOCATED;
da0436e9
JS
1230 return sglq;
1231}
1232
e59058c4 1233/**
3621a710 1234 * lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
1235 * @phba: Pointer to HBA context object.
1236 *
1237 * This function is called with no lock held. This function
1238 * allocates a new driver iocb object from the iocb pool. If the
1239 * allocation is successful, it returns pointer to the newly
1240 * allocated iocb object else it returns NULL.
1241 **/
2e0fef85
JS
1242struct lpfc_iocbq *
1243lpfc_sli_get_iocbq(struct lpfc_hba *phba)
1244{
1245 struct lpfc_iocbq * iocbq = NULL;
1246 unsigned long iflags;
1247
1248 spin_lock_irqsave(&phba->hbalock, iflags);
1249 iocbq = __lpfc_sli_get_iocbq(phba);
1250 spin_unlock_irqrestore(&phba->hbalock, iflags);
1251 return iocbq;
1252}
1253
4f774513
JS
1254/**
1255 * __lpfc_sli_release_iocbq_s4 - Release iocb to the iocb pool
1256 * @phba: Pointer to HBA context object.
1257 * @iocbq: Pointer to driver iocb object.
1258 *
1259 * This function is called with hbalock held to release driver
1260 * iocb object to the iocb pool. The iotag in the iocb object
1261 * does not change for each use of the iocb object. This function
1262 * clears all other fields of the iocb object when it is freed.
1263 * The sqlq structure that holds the xritag and phys and virtual
1264 * mappings for the scatter gather list is retrieved from the
1265 * active array of sglq. The get of the sglq pointer also clears
1266 * the entry in the array. If the status of the IO indiactes that
1267 * this IO was aborted then the sglq entry it put on the
1268 * lpfc_abts_els_sgl_list until the CQ_ABORTED_XRI is received. If the
1269 * IO has good status or fails for any other reason then the sglq
895427bd 1270 * entry is added to the free list (lpfc_els_sgl_list).
4f774513
JS
1271 **/
1272static void
1273__lpfc_sli_release_iocbq_s4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1274{
1275 struct lpfc_sglq *sglq;
1276 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
2a9bf3d0 1277 unsigned long iflag = 0;
895427bd 1278 struct lpfc_sli_ring *pring;
4f774513 1279
1c2ba475
JT
1280 lockdep_assert_held(&phba->hbalock);
1281
4f774513
JS
1282 if (iocbq->sli4_xritag == NO_XRI)
1283 sglq = NULL;
1284 else
6d368e53
JS
1285 sglq = __lpfc_clear_active_sglq(phba, iocbq->sli4_lxritag);
1286
0e9bb8d7 1287
4f774513 1288 if (sglq) {
f358dd0c
JS
1289 if (iocbq->iocb_flag & LPFC_IO_NVMET) {
1290 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1291 iflag);
1292 sglq->state = SGL_FREED;
1293 sglq->ndlp = NULL;
1294 list_add_tail(&sglq->list,
1295 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1296 spin_unlock_irqrestore(
1297 &phba->sli4_hba.sgl_list_lock, iflag);
1298 goto out;
1299 }
1300
895427bd 1301 pring = phba->sli4_hba.els_wq->pring;
0f65ff68
JS
1302 if ((iocbq->iocb_flag & LPFC_EXCHANGE_BUSY) &&
1303 (sglq->state != SGL_XRI_ABORTED)) {
895427bd
JS
1304 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1305 iflag);
4f774513 1306 list_add(&sglq->list,
895427bd 1307 &phba->sli4_hba.lpfc_abts_els_sgl_list);
4f774513 1308 spin_unlock_irqrestore(
895427bd 1309 &phba->sli4_hba.sgl_list_lock, iflag);
0f65ff68 1310 } else {
895427bd
JS
1311 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1312 iflag);
0f65ff68 1313 sglq->state = SGL_FREED;
19ca7609 1314 sglq->ndlp = NULL;
fedd3b7b 1315 list_add_tail(&sglq->list,
895427bd
JS
1316 &phba->sli4_hba.lpfc_els_sgl_list);
1317 spin_unlock_irqrestore(
1318 &phba->sli4_hba.sgl_list_lock, iflag);
2a9bf3d0
JS
1319
1320 /* Check if TXQ queue needs to be serviced */
0e9bb8d7 1321 if (!list_empty(&pring->txq))
2a9bf3d0 1322 lpfc_worker_wake_up(phba);
0f65ff68 1323 }
4f774513
JS
1324 }
1325
f358dd0c 1326out:
4f774513
JS
1327 /*
1328 * Clean all volatile data fields, preserve iotag and node struct.
1329 */
1330 memset((char *)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
6d368e53 1331 iocbq->sli4_lxritag = NO_XRI;
4f774513 1332 iocbq->sli4_xritag = NO_XRI;
f358dd0c
JS
1333 iocbq->iocb_flag &= ~(LPFC_IO_NVME | LPFC_IO_NVMET |
1334 LPFC_IO_NVME_LS);
4f774513
JS
1335 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1336}
1337
2a9bf3d0 1338
e59058c4 1339/**
3772a991 1340 * __lpfc_sli_release_iocbq_s3 - Release iocb to the iocb pool
e59058c4
JS
1341 * @phba: Pointer to HBA context object.
1342 * @iocbq: Pointer to driver iocb object.
1343 *
1344 * This function is called with hbalock held to release driver
1345 * iocb object to the iocb pool. The iotag in the iocb object
1346 * does not change for each use of the iocb object. This function
1347 * clears all other fields of the iocb object when it is freed.
1348 **/
a6ababd2 1349static void
3772a991 1350__lpfc_sli_release_iocbq_s3(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 1351{
2e0fef85 1352 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30 1353
1c2ba475 1354 lockdep_assert_held(&phba->hbalock);
0e9bb8d7 1355
604a3e30
JB
1356 /*
1357 * Clean all volatile data fields, preserve iotag and node struct.
1358 */
1359 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
3772a991 1360 iocbq->sli4_xritag = NO_XRI;
604a3e30
JB
1361 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1362}
1363
3772a991
JS
1364/**
1365 * __lpfc_sli_release_iocbq - Release iocb to the iocb pool
1366 * @phba: Pointer to HBA context object.
1367 * @iocbq: Pointer to driver iocb object.
1368 *
1369 * This function is called with hbalock held to release driver
1370 * iocb object to the iocb pool. The iotag in the iocb object
1371 * does not change for each use of the iocb object. This function
1372 * clears all other fields of the iocb object when it is freed.
1373 **/
1374static void
1375__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1376{
1c2ba475
JT
1377 lockdep_assert_held(&phba->hbalock);
1378
3772a991 1379 phba->__lpfc_sli_release_iocbq(phba, iocbq);
2a9bf3d0 1380 phba->iocb_cnt--;
3772a991
JS
1381}
1382
e59058c4 1383/**
3621a710 1384 * lpfc_sli_release_iocbq - Release iocb to the iocb pool
e59058c4
JS
1385 * @phba: Pointer to HBA context object.
1386 * @iocbq: Pointer to driver iocb object.
1387 *
1388 * This function is called with no lock held to release the iocb to
1389 * iocb pool.
1390 **/
2e0fef85
JS
1391void
1392lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1393{
1394 unsigned long iflags;
1395
1396 /*
1397 * Clean all volatile data fields, preserve iotag and node struct.
1398 */
1399 spin_lock_irqsave(&phba->hbalock, iflags);
1400 __lpfc_sli_release_iocbq(phba, iocbq);
1401 spin_unlock_irqrestore(&phba->hbalock, iflags);
1402}
1403
a257bf90
JS
1404/**
1405 * lpfc_sli_cancel_iocbs - Cancel all iocbs from a list.
1406 * @phba: Pointer to HBA context object.
1407 * @iocblist: List of IOCBs.
1408 * @ulpstatus: ULP status in IOCB command field.
1409 * @ulpWord4: ULP word-4 in IOCB command field.
1410 *
1411 * This function is called with a list of IOCBs to cancel. It cancels the IOCB
1412 * on the list by invoking the complete callback function associated with the
1413 * IOCB with the provided @ulpstatus and @ulpword4 set to the IOCB commond
1414 * fields.
1415 **/
1416void
1417lpfc_sli_cancel_iocbs(struct lpfc_hba *phba, struct list_head *iocblist,
1418 uint32_t ulpstatus, uint32_t ulpWord4)
1419{
1420 struct lpfc_iocbq *piocb;
1421
1422 while (!list_empty(iocblist)) {
1423 list_remove_head(iocblist, piocb, struct lpfc_iocbq, list);
84f2ddf8
JS
1424 if (!piocb->iocb_cmpl) {
1425 if (piocb->iocb_flag & LPFC_IO_NVME)
1426 lpfc_nvme_cancel_iocb(phba, piocb);
1427 else
1428 lpfc_sli_release_iocbq(phba, piocb);
1429 } else {
a257bf90
JS
1430 piocb->iocb.ulpStatus = ulpstatus;
1431 piocb->iocb.un.ulpWord[4] = ulpWord4;
1432 (piocb->iocb_cmpl) (phba, piocb, piocb);
1433 }
1434 }
1435 return;
1436}
1437
e59058c4 1438/**
3621a710
JS
1439 * lpfc_sli_iocb_cmd_type - Get the iocb type
1440 * @iocb_cmnd: iocb command code.
e59058c4
JS
1441 *
1442 * This function is called by ring event handler function to get the iocb type.
1443 * This function translates the iocb command to an iocb command type used to
1444 * decide the final disposition of each completed IOCB.
1445 * The function returns
1446 * LPFC_UNKNOWN_IOCB if it is an unsupported iocb
1447 * LPFC_SOL_IOCB if it is a solicited iocb completion
1448 * LPFC_ABORT_IOCB if it is an abort iocb
1449 * LPFC_UNSOL_IOCB if it is an unsolicited iocb
1450 *
1451 * The caller is not required to hold any lock.
1452 **/
dea3101e
JB
1453static lpfc_iocb_type
1454lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
1455{
1456 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
1457
1458 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
1459 return 0;
1460
1461 switch (iocb_cmnd) {
1462 case CMD_XMIT_SEQUENCE_CR:
1463 case CMD_XMIT_SEQUENCE_CX:
1464 case CMD_XMIT_BCAST_CN:
1465 case CMD_XMIT_BCAST_CX:
1466 case CMD_ELS_REQUEST_CR:
1467 case CMD_ELS_REQUEST_CX:
1468 case CMD_CREATE_XRI_CR:
1469 case CMD_CREATE_XRI_CX:
1470 case CMD_GET_RPI_CN:
1471 case CMD_XMIT_ELS_RSP_CX:
1472 case CMD_GET_RPI_CR:
1473 case CMD_FCP_IWRITE_CR:
1474 case CMD_FCP_IWRITE_CX:
1475 case CMD_FCP_IREAD_CR:
1476 case CMD_FCP_IREAD_CX:
1477 case CMD_FCP_ICMND_CR:
1478 case CMD_FCP_ICMND_CX:
f5603511
JS
1479 case CMD_FCP_TSEND_CX:
1480 case CMD_FCP_TRSP_CX:
1481 case CMD_FCP_TRECEIVE_CX:
1482 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB
1483 case CMD_ADAPTER_MSG:
1484 case CMD_ADAPTER_DUMP:
1485 case CMD_XMIT_SEQUENCE64_CR:
1486 case CMD_XMIT_SEQUENCE64_CX:
1487 case CMD_XMIT_BCAST64_CN:
1488 case CMD_XMIT_BCAST64_CX:
1489 case CMD_ELS_REQUEST64_CR:
1490 case CMD_ELS_REQUEST64_CX:
1491 case CMD_FCP_IWRITE64_CR:
1492 case CMD_FCP_IWRITE64_CX:
1493 case CMD_FCP_IREAD64_CR:
1494 case CMD_FCP_IREAD64_CX:
1495 case CMD_FCP_ICMND64_CR:
1496 case CMD_FCP_ICMND64_CX:
f5603511
JS
1497 case CMD_FCP_TSEND64_CX:
1498 case CMD_FCP_TRSP64_CX:
1499 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB
1500 case CMD_GEN_REQUEST64_CR:
1501 case CMD_GEN_REQUEST64_CX:
1502 case CMD_XMIT_ELS_RSP64_CX:
da0436e9
JS
1503 case DSSCMD_IWRITE64_CR:
1504 case DSSCMD_IWRITE64_CX:
1505 case DSSCMD_IREAD64_CR:
1506 case DSSCMD_IREAD64_CX:
dea3101e
JB
1507 type = LPFC_SOL_IOCB;
1508 break;
1509 case CMD_ABORT_XRI_CN:
1510 case CMD_ABORT_XRI_CX:
1511 case CMD_CLOSE_XRI_CN:
1512 case CMD_CLOSE_XRI_CX:
1513 case CMD_XRI_ABORTED_CX:
1514 case CMD_ABORT_MXRI64_CN:
6669f9bb 1515 case CMD_XMIT_BLS_RSP64_CX:
dea3101e
JB
1516 type = LPFC_ABORT_IOCB;
1517 break;
1518 case CMD_RCV_SEQUENCE_CX:
1519 case CMD_RCV_ELS_REQ_CX:
1520 case CMD_RCV_SEQUENCE64_CX:
1521 case CMD_RCV_ELS_REQ64_CX:
57127f15 1522 case CMD_ASYNC_STATUS:
ed957684
JS
1523 case CMD_IOCB_RCV_SEQ64_CX:
1524 case CMD_IOCB_RCV_ELS64_CX:
1525 case CMD_IOCB_RCV_CONT64_CX:
3163f725 1526 case CMD_IOCB_RET_XRI64_CX:
dea3101e
JB
1527 type = LPFC_UNSOL_IOCB;
1528 break;
3163f725
JS
1529 case CMD_IOCB_XMIT_MSEQ64_CR:
1530 case CMD_IOCB_XMIT_MSEQ64_CX:
1531 case CMD_IOCB_RCV_SEQ_LIST64_CX:
1532 case CMD_IOCB_RCV_ELS_LIST64_CX:
1533 case CMD_IOCB_CLOSE_EXTENDED_CN:
1534 case CMD_IOCB_ABORT_EXTENDED_CN:
1535 case CMD_IOCB_RET_HBQE64_CN:
1536 case CMD_IOCB_FCP_IBIDIR64_CR:
1537 case CMD_IOCB_FCP_IBIDIR64_CX:
1538 case CMD_IOCB_FCP_ITASKMGT64_CX:
1539 case CMD_IOCB_LOGENTRY_CN:
1540 case CMD_IOCB_LOGENTRY_ASYNC_CN:
1541 printk("%s - Unhandled SLI-3 Command x%x\n",
cadbd4a5 1542 __func__, iocb_cmnd);
3163f725
JS
1543 type = LPFC_UNKNOWN_IOCB;
1544 break;
dea3101e
JB
1545 default:
1546 type = LPFC_UNKNOWN_IOCB;
1547 break;
1548 }
1549
1550 return type;
1551}
1552
e59058c4 1553/**
3621a710 1554 * lpfc_sli_ring_map - Issue config_ring mbox for all rings
e59058c4
JS
1555 * @phba: Pointer to HBA context object.
1556 *
1557 * This function is called from SLI initialization code
1558 * to configure every ring of the HBA's SLI interface. The
1559 * caller is not required to hold any lock. This function issues
1560 * a config_ring mailbox command for each ring.
1561 * This function returns zero if successful else returns a negative
1562 * error code.
1563 **/
dea3101e 1564static int
ed957684 1565lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB
1566{
1567 struct lpfc_sli *psli = &phba->sli;
ed957684
JS
1568 LPFC_MBOXQ_t *pmb;
1569 MAILBOX_t *pmbox;
1570 int i, rc, ret = 0;
dea3101e 1571
ed957684
JS
1572 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1573 if (!pmb)
1574 return -ENOMEM;
04c68496 1575 pmbox = &pmb->u.mb;
ed957684 1576 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 1577 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB
1578 lpfc_config_ring(phba, i, pmb);
1579 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1580 if (rc != MBX_SUCCESS) {
92d7f7b0 1581 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1582 "0446 Adapter failed to init (%d), "
dea3101e
JB
1583 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
1584 "ring %d\n",
e8b62011
JS
1585 rc, pmbox->mbxCommand,
1586 pmbox->mbxStatus, i);
2e0fef85 1587 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS
1588 ret = -ENXIO;
1589 break;
dea3101e
JB
1590 }
1591 }
ed957684
JS
1592 mempool_free(pmb, phba->mbox_mem_pool);
1593 return ret;
dea3101e
JB
1594}
1595
e59058c4 1596/**
3621a710 1597 * lpfc_sli_ringtxcmpl_put - Adds new iocb to the txcmplq
e59058c4
JS
1598 * @phba: Pointer to HBA context object.
1599 * @pring: Pointer to driver SLI ring object.
1600 * @piocb: Pointer to the driver iocb object.
1601 *
e2a8be56
JS
1602 * The driver calls this function with the hbalock held for SLI3 ports or
1603 * the ring lock held for SLI4 ports. The function adds the
e59058c4
JS
1604 * new iocb to txcmplq of the given ring. This function always returns
1605 * 0. If this function is called for ELS ring, this function checks if
1606 * there is a vport associated with the ELS command. This function also
1607 * starts els_tmofunc timer if this is an ELS command.
1608 **/
dea3101e 1609static int
2e0fef85
JS
1610lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1611 struct lpfc_iocbq *piocb)
dea3101e 1612{
e2a8be56
JS
1613 if (phba->sli_rev == LPFC_SLI_REV4)
1614 lockdep_assert_held(&pring->ring_lock);
1615 else
1616 lockdep_assert_held(&phba->hbalock);
1c2ba475 1617
2319f847 1618 BUG_ON(!piocb);
22466da5 1619
dea3101e 1620 list_add_tail(&piocb->list, &pring->txcmplq);
4f2e66c6 1621 piocb->iocb_flag |= LPFC_IO_ON_TXCMPLQ;
c490850a 1622 pring->txcmplq_cnt++;
2a9bf3d0 1623
92d7f7b0
JS
1624 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
1625 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2319f847
MFO
1626 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
1627 BUG_ON(!piocb->vport);
1628 if (!(piocb->vport->load_flag & FC_UNLOADING))
1629 mod_timer(&piocb->vport->els_tmofunc,
1630 jiffies +
1631 msecs_to_jiffies(1000 * (phba->fc_ratov << 1)));
1632 }
dea3101e 1633
2e0fef85 1634 return 0;
dea3101e
JB
1635}
1636
e59058c4 1637/**
3621a710 1638 * lpfc_sli_ringtx_get - Get first element of the txq
e59058c4
JS
1639 * @phba: Pointer to HBA context object.
1640 * @pring: Pointer to driver SLI ring object.
1641 *
1642 * This function is called with hbalock held to get next
1643 * iocb in txq of the given ring. If there is any iocb in
1644 * the txq, the function returns first iocb in the list after
1645 * removing the iocb from the list, else it returns NULL.
1646 **/
2a9bf3d0 1647struct lpfc_iocbq *
2e0fef85 1648lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 1649{
dea3101e
JB
1650 struct lpfc_iocbq *cmd_iocb;
1651
1c2ba475
JT
1652 lockdep_assert_held(&phba->hbalock);
1653
858c9f6c 1654 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
2e0fef85 1655 return cmd_iocb;
dea3101e
JB
1656}
1657
e59058c4 1658/**
3621a710 1659 * lpfc_sli_next_iocb_slot - Get next iocb slot in the ring
e59058c4
JS
1660 * @phba: Pointer to HBA context object.
1661 * @pring: Pointer to driver SLI ring object.
1662 *
1663 * This function is called with hbalock held and the caller must post the
1664 * iocb without releasing the lock. If the caller releases the lock,
1665 * iocb slot returned by the function is not guaranteed to be available.
1666 * The function returns pointer to the next available iocb slot if there
1667 * is available slot in the ring, else it returns NULL.
1668 * If the get index of the ring is ahead of the put index, the function
1669 * will post an error attention event to the worker thread to take the
1670 * HBA to offline state.
1671 **/
dea3101e
JB
1672static IOCB_t *
1673lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1674{
34b02dcd 1675 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
7e56aa25 1676 uint32_t max_cmd_idx = pring->sli.sli3.numCiocb;
1c2ba475
JT
1677
1678 lockdep_assert_held(&phba->hbalock);
1679
7e56aa25
JS
1680 if ((pring->sli.sli3.next_cmdidx == pring->sli.sli3.cmdidx) &&
1681 (++pring->sli.sli3.next_cmdidx >= max_cmd_idx))
1682 pring->sli.sli3.next_cmdidx = 0;
dea3101e 1683
7e56aa25
JS
1684 if (unlikely(pring->sli.sli3.local_getidx ==
1685 pring->sli.sli3.next_cmdidx)) {
dea3101e 1686
7e56aa25 1687 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e 1688
7e56aa25 1689 if (unlikely(pring->sli.sli3.local_getidx >= max_cmd_idx)) {
dea3101e 1690 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1691 "0315 Ring %d issue: portCmdGet %d "
025dfdaf 1692 "is bigger than cmd ring %d\n",
e8b62011 1693 pring->ringno,
7e56aa25
JS
1694 pring->sli.sli3.local_getidx,
1695 max_cmd_idx);
dea3101e 1696
2e0fef85 1697 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
1698 /*
1699 * All error attention handlers are posted to
1700 * worker thread
1701 */
1702 phba->work_ha |= HA_ERATT;
1703 phba->work_hs = HS_FFER3;
92d7f7b0 1704
5e9d9b82 1705 lpfc_worker_wake_up(phba);
dea3101e
JB
1706
1707 return NULL;
1708 }
1709
7e56aa25 1710 if (pring->sli.sli3.local_getidx == pring->sli.sli3.next_cmdidx)
dea3101e
JB
1711 return NULL;
1712 }
1713
ed957684 1714 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB
1715}
1716
e59058c4 1717/**
3621a710 1718 * lpfc_sli_next_iotag - Get an iotag for the iocb
e59058c4
JS
1719 * @phba: Pointer to HBA context object.
1720 * @iocbq: Pointer to driver iocb object.
1721 *
1722 * This function gets an iotag for the iocb. If there is no unused iotag and
1723 * the iocbq_lookup_len < 0xffff, this function allocates a bigger iotag_lookup
1724 * array and assigns a new iotag.
1725 * The function returns the allocated iotag if successful, else returns zero.
1726 * Zero is not a valid iotag.
1727 * The caller is not required to hold any lock.
1728 **/
604a3e30 1729uint16_t
2e0fef85 1730lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 1731{
2e0fef85
JS
1732 struct lpfc_iocbq **new_arr;
1733 struct lpfc_iocbq **old_arr;
604a3e30
JB
1734 size_t new_len;
1735 struct lpfc_sli *psli = &phba->sli;
1736 uint16_t iotag;
dea3101e 1737
2e0fef85 1738 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1739 iotag = psli->last_iotag;
1740 if(++iotag < psli->iocbq_lookup_len) {
1741 psli->last_iotag = iotag;
1742 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1743 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1744 iocbq->iotag = iotag;
1745 return iotag;
2e0fef85 1746 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB
1747 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
1748 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85 1749 spin_unlock_irq(&phba->hbalock);
6396bb22 1750 new_arr = kcalloc(new_len, sizeof(struct lpfc_iocbq *),
604a3e30
JB
1751 GFP_KERNEL);
1752 if (new_arr) {
2e0fef85 1753 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1754 old_arr = psli->iocbq_lookup;
1755 if (new_len <= psli->iocbq_lookup_len) {
1756 /* highly unprobable case */
1757 kfree(new_arr);
1758 iotag = psli->last_iotag;
1759 if(++iotag < psli->iocbq_lookup_len) {
1760 psli->last_iotag = iotag;
1761 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1762 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1763 iocbq->iotag = iotag;
1764 return iotag;
1765 }
2e0fef85 1766 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1767 return 0;
1768 }
1769 if (psli->iocbq_lookup)
1770 memcpy(new_arr, old_arr,
1771 ((psli->last_iotag + 1) *
311464ec 1772 sizeof (struct lpfc_iocbq *)));
604a3e30
JB
1773 psli->iocbq_lookup = new_arr;
1774 psli->iocbq_lookup_len = new_len;
1775 psli->last_iotag = iotag;
1776 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1777 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1778 iocbq->iotag = iotag;
1779 kfree(old_arr);
1780 return iotag;
1781 }
8f6d98d2 1782 } else
2e0fef85 1783 spin_unlock_irq(&phba->hbalock);
dea3101e 1784
bc73905a 1785 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
1786 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
1787 psli->last_iotag);
dea3101e 1788
604a3e30 1789 return 0;
dea3101e
JB
1790}
1791
e59058c4 1792/**
3621a710 1793 * lpfc_sli_submit_iocb - Submit an iocb to the firmware
e59058c4
JS
1794 * @phba: Pointer to HBA context object.
1795 * @pring: Pointer to driver SLI ring object.
1796 * @iocb: Pointer to iocb slot in the ring.
1797 * @nextiocb: Pointer to driver iocb object which need to be
1798 * posted to firmware.
1799 *
1800 * This function is called with hbalock held to post a new iocb to
1801 * the firmware. This function copies the new iocb to ring iocb slot and
1802 * updates the ring pointers. It adds the new iocb to txcmplq if there is
1803 * a completion call back for this iocb else the function will free the
1804 * iocb object.
1805 **/
dea3101e
JB
1806static void
1807lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1808 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
1809{
1c2ba475 1810 lockdep_assert_held(&phba->hbalock);
dea3101e 1811 /*
604a3e30 1812 * Set up an iotag
dea3101e 1813 */
604a3e30 1814 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 1815
e2a0a9d6 1816
a58cbd52
JS
1817 if (pring->ringno == LPFC_ELS_RING) {
1818 lpfc_debugfs_slow_ring_trc(phba,
1819 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1820 *(((uint32_t *) &nextiocb->iocb) + 4),
1821 *(((uint32_t *) &nextiocb->iocb) + 6),
1822 *(((uint32_t *) &nextiocb->iocb) + 7));
1823 }
1824
dea3101e
JB
1825 /*
1826 * Issue iocb command to adapter
1827 */
92d7f7b0 1828 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB
1829 wmb();
1830 pring->stats.iocb_cmd++;
1831
1832 /*
1833 * If there is no completion routine to call, we can release the
1834 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
1835 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
1836 */
1837 if (nextiocb->iocb_cmpl)
1838 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 1839 else
2e0fef85 1840 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB
1841
1842 /*
1843 * Let the HBA know what IOCB slot will be the next one the
1844 * driver will put a command into.
1845 */
7e56aa25
JS
1846 pring->sli.sli3.cmdidx = pring->sli.sli3.next_cmdidx;
1847 writel(pring->sli.sli3.cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB
1848}
1849
e59058c4 1850/**
3621a710 1851 * lpfc_sli_update_full_ring - Update the chip attention register
e59058c4
JS
1852 * @phba: Pointer to HBA context object.
1853 * @pring: Pointer to driver SLI ring object.
1854 *
1855 * The caller is not required to hold any lock for calling this function.
1856 * This function updates the chip attention bits for the ring to inform firmware
1857 * that there are pending work to be done for this ring and requests an
1858 * interrupt when there is space available in the ring. This function is
1859 * called when the driver is unable to post more iocbs to the ring due
1860 * to unavailability of space in the ring.
1861 **/
dea3101e 1862static void
2e0fef85 1863lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1864{
1865 int ringno = pring->ringno;
1866
1867 pring->flag |= LPFC_CALL_RING_AVAILABLE;
1868
1869 wmb();
1870
1871 /*
1872 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
1873 * The HBA will tell us when an IOCB entry is available.
1874 */
1875 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
1876 readl(phba->CAregaddr); /* flush */
1877
1878 pring->stats.iocb_cmd_full++;
1879}
1880
e59058c4 1881/**
3621a710 1882 * lpfc_sli_update_ring - Update chip attention register
e59058c4
JS
1883 * @phba: Pointer to HBA context object.
1884 * @pring: Pointer to driver SLI ring object.
1885 *
1886 * This function updates the chip attention register bit for the
1887 * given ring to inform HBA that there is more work to be done
1888 * in this ring. The caller is not required to hold any lock.
1889 **/
dea3101e 1890static void
2e0fef85 1891lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1892{
1893 int ringno = pring->ringno;
1894
1895 /*
1896 * Tell the HBA that there is work to do in this ring.
1897 */
34b02dcd
JS
1898 if (!(phba->sli3_options & LPFC_SLI3_CRP_ENABLED)) {
1899 wmb();
1900 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
1901 readl(phba->CAregaddr); /* flush */
1902 }
dea3101e
JB
1903}
1904
e59058c4 1905/**
3621a710 1906 * lpfc_sli_resume_iocb - Process iocbs in the txq
e59058c4
JS
1907 * @phba: Pointer to HBA context object.
1908 * @pring: Pointer to driver SLI ring object.
1909 *
1910 * This function is called with hbalock held to post pending iocbs
1911 * in the txq to the firmware. This function is called when driver
1912 * detects space available in the ring.
1913 **/
dea3101e 1914static void
2e0fef85 1915lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1916{
1917 IOCB_t *iocb;
1918 struct lpfc_iocbq *nextiocb;
1919
1c2ba475
JT
1920 lockdep_assert_held(&phba->hbalock);
1921
dea3101e
JB
1922 /*
1923 * Check to see if:
1924 * (a) there is anything on the txq to send
1925 * (b) link is up
1926 * (c) link attention events can be processed (fcp ring only)
1927 * (d) IOCB processing is not blocked by the outstanding mbox command.
1928 */
0e9bb8d7
JS
1929
1930 if (lpfc_is_link_up(phba) &&
1931 (!list_empty(&pring->txq)) &&
895427bd 1932 (pring->ringno != LPFC_FCP_RING ||
0b727fea 1933 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e
JB
1934
1935 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
1936 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
1937 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
1938
1939 if (iocb)
1940 lpfc_sli_update_ring(phba, pring);
1941 else
1942 lpfc_sli_update_full_ring(phba, pring);
1943 }
1944
1945 return;
1946}
1947
e59058c4 1948/**
3621a710 1949 * lpfc_sli_next_hbq_slot - Get next hbq entry for the HBQ
e59058c4
JS
1950 * @phba: Pointer to HBA context object.
1951 * @hbqno: HBQ number.
1952 *
1953 * This function is called with hbalock held to get the next
1954 * available slot for the given HBQ. If there is free slot
1955 * available for the HBQ it will return pointer to the next available
1956 * HBQ entry else it will return NULL.
1957 **/
a6ababd2 1958static struct lpfc_hbq_entry *
ed957684
JS
1959lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
1960{
1961 struct hbq_s *hbqp = &phba->hbqs[hbqno];
1962
1c2ba475
JT
1963 lockdep_assert_held(&phba->hbalock);
1964
ed957684
JS
1965 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
1966 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
1967 hbqp->next_hbqPutIdx = 0;
1968
1969 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 1970 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS
1971 uint32_t getidx = le32_to_cpu(raw_index);
1972
1973 hbqp->local_hbqGetIdx = getidx;
1974
1975 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
1976 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 1977 LOG_SLI | LOG_VPORT,
e8b62011 1978 "1802 HBQ %d: local_hbqGetIdx "
ed957684 1979 "%u is > than hbqp->entry_count %u\n",
e8b62011 1980 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS
1981 hbqp->entry_count);
1982
1983 phba->link_state = LPFC_HBA_ERROR;
1984 return NULL;
1985 }
1986
1987 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
1988 return NULL;
1989 }
1990
51ef4c26
JS
1991 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
1992 hbqp->hbqPutIdx;
ed957684
JS
1993}
1994
e59058c4 1995/**
3621a710 1996 * lpfc_sli_hbqbuf_free_all - Free all the hbq buffers
e59058c4
JS
1997 * @phba: Pointer to HBA context object.
1998 *
1999 * This function is called with no lock held to free all the
2000 * hbq buffers while uninitializing the SLI interface. It also
2001 * frees the HBQ buffers returned by the firmware but not yet
2002 * processed by the upper layers.
2003 **/
ed957684
JS
2004void
2005lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
2006{
92d7f7b0
JS
2007 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
2008 struct hbq_dmabuf *hbq_buf;
3163f725 2009 unsigned long flags;
51ef4c26 2010 int i, hbq_count;
ed957684 2011
51ef4c26 2012 hbq_count = lpfc_sli_hbq_count();
ed957684 2013 /* Return all memory used by all HBQs */
3163f725 2014 spin_lock_irqsave(&phba->hbalock, flags);
51ef4c26
JS
2015 for (i = 0; i < hbq_count; ++i) {
2016 list_for_each_entry_safe(dmabuf, next_dmabuf,
2017 &phba->hbqs[i].hbq_buffer_list, list) {
2018 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
2019 list_del(&hbq_buf->dbuf.list);
2020 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
2021 }
a8adb832 2022 phba->hbqs[i].buffer_count = 0;
ed957684 2023 }
3163f725
JS
2024
2025 /* Mark the HBQs not in use */
2026 phba->hbq_in_use = 0;
2027 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684
JS
2028}
2029
e59058c4 2030/**
3621a710 2031 * lpfc_sli_hbq_to_firmware - Post the hbq buffer to firmware
e59058c4
JS
2032 * @phba: Pointer to HBA context object.
2033 * @hbqno: HBQ number.
2034 * @hbq_buf: Pointer to HBQ buffer.
2035 *
2036 * This function is called with the hbalock held to post a
2037 * hbq buffer to the firmware. If the function finds an empty
2038 * slot in the HBQ, it will post the buffer. The function will return
2039 * pointer to the hbq entry if it successfully post the buffer
2040 * else it will return NULL.
2041 **/
3772a991 2042static int
ed957684 2043lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 2044 struct hbq_dmabuf *hbq_buf)
3772a991 2045{
1c2ba475 2046 lockdep_assert_held(&phba->hbalock);
3772a991
JS
2047 return phba->lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buf);
2048}
2049
2050/**
2051 * lpfc_sli_hbq_to_firmware_s3 - Post the hbq buffer to SLI3 firmware
2052 * @phba: Pointer to HBA context object.
2053 * @hbqno: HBQ number.
2054 * @hbq_buf: Pointer to HBQ buffer.
2055 *
2056 * This function is called with the hbalock held to post a hbq buffer to the
2057 * firmware. If the function finds an empty slot in the HBQ, it will post the
2058 * buffer and place it on the hbq_buffer_list. The function will return zero if
2059 * it successfully post the buffer else it will return an error.
2060 **/
2061static int
2062lpfc_sli_hbq_to_firmware_s3(struct lpfc_hba *phba, uint32_t hbqno,
2063 struct hbq_dmabuf *hbq_buf)
ed957684
JS
2064{
2065 struct lpfc_hbq_entry *hbqe;
92d7f7b0 2066 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684 2067
1c2ba475 2068 lockdep_assert_held(&phba->hbalock);
ed957684
JS
2069 /* Get next HBQ entry slot to use */
2070 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
2071 if (hbqe) {
2072 struct hbq_s *hbqp = &phba->hbqs[hbqno];
2073
92d7f7b0
JS
2074 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
2075 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
895427bd 2076 hbqe->bde.tus.f.bdeSize = hbq_buf->total_size;
ed957684 2077 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS
2078 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
2079 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
2080 /* Sync SLIM */
ed957684
JS
2081 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
2082 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 2083 /* flush */
ed957684 2084 readl(phba->hbq_put + hbqno);
51ef4c26 2085 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
3772a991
JS
2086 return 0;
2087 } else
2088 return -ENOMEM;
ed957684
JS
2089}
2090
4f774513
JS
2091/**
2092 * lpfc_sli_hbq_to_firmware_s4 - Post the hbq buffer to SLI4 firmware
2093 * @phba: Pointer to HBA context object.
2094 * @hbqno: HBQ number.
2095 * @hbq_buf: Pointer to HBQ buffer.
2096 *
2097 * This function is called with the hbalock held to post an RQE to the SLI4
2098 * firmware. If able to post the RQE to the RQ it will queue the hbq entry to
2099 * the hbq_buffer_list and return zero, otherwise it will return an error.
2100 **/
2101static int
2102lpfc_sli_hbq_to_firmware_s4(struct lpfc_hba *phba, uint32_t hbqno,
2103 struct hbq_dmabuf *hbq_buf)
2104{
2105 int rc;
2106 struct lpfc_rqe hrqe;
2107 struct lpfc_rqe drqe;
895427bd
JS
2108 struct lpfc_queue *hrq;
2109 struct lpfc_queue *drq;
2110
2111 if (hbqno != LPFC_ELS_HBQ)
2112 return 1;
2113 hrq = phba->sli4_hba.hdr_rq;
2114 drq = phba->sli4_hba.dat_rq;
4f774513 2115
1c2ba475 2116 lockdep_assert_held(&phba->hbalock);
4f774513
JS
2117 hrqe.address_lo = putPaddrLow(hbq_buf->hbuf.phys);
2118 hrqe.address_hi = putPaddrHigh(hbq_buf->hbuf.phys);
2119 drqe.address_lo = putPaddrLow(hbq_buf->dbuf.phys);
2120 drqe.address_hi = putPaddrHigh(hbq_buf->dbuf.phys);
895427bd 2121 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
4f774513
JS
2122 if (rc < 0)
2123 return rc;
895427bd 2124 hbq_buf->tag = (rc | (hbqno << 16));
4f774513
JS
2125 list_add_tail(&hbq_buf->dbuf.list, &phba->hbqs[hbqno].hbq_buffer_list);
2126 return 0;
2127}
2128
e59058c4 2129/* HBQ for ELS and CT traffic. */
92d7f7b0
JS
2130static struct lpfc_hbq_init lpfc_els_hbq = {
2131 .rn = 1,
def9c7a9 2132 .entry_count = 256,
92d7f7b0
JS
2133 .mask_count = 0,
2134 .profile = 0,
51ef4c26 2135 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0 2136 .buffer_count = 0,
a257bf90
JS
2137 .init_count = 40,
2138 .add_count = 40,
92d7f7b0 2139};
ed957684 2140
e59058c4 2141/* Array of HBQs */
78b2d852 2142struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0
JS
2143 &lpfc_els_hbq,
2144};
ed957684 2145
e59058c4 2146/**
3621a710 2147 * lpfc_sli_hbqbuf_fill_hbqs - Post more hbq buffers to HBQ
e59058c4
JS
2148 * @phba: Pointer to HBA context object.
2149 * @hbqno: HBQ number.
2150 * @count: Number of HBQ buffers to be posted.
2151 *
d7c255b2
JS
2152 * This function is called with no lock held to post more hbq buffers to the
2153 * given HBQ. The function returns the number of HBQ buffers successfully
2154 * posted.
e59058c4 2155 **/
311464ec 2156static int
92d7f7b0 2157lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 2158{
d7c255b2 2159 uint32_t i, posted = 0;
3163f725 2160 unsigned long flags;
92d7f7b0 2161 struct hbq_dmabuf *hbq_buffer;
d7c255b2 2162 LIST_HEAD(hbq_buf_list);
eafe1df9 2163 if (!phba->hbqs[hbqno].hbq_alloc_buffer)
51ef4c26 2164 return 0;
51ef4c26 2165
d7c255b2
JS
2166 if ((phba->hbqs[hbqno].buffer_count + count) >
2167 lpfc_hbq_defs[hbqno]->entry_count)
2168 count = lpfc_hbq_defs[hbqno]->entry_count -
2169 phba->hbqs[hbqno].buffer_count;
2170 if (!count)
2171 return 0;
2172 /* Allocate HBQ entries */
2173 for (i = 0; i < count; i++) {
2174 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
2175 if (!hbq_buffer)
2176 break;
2177 list_add_tail(&hbq_buffer->dbuf.list, &hbq_buf_list);
2178 }
3163f725
JS
2179 /* Check whether HBQ is still in use */
2180 spin_lock_irqsave(&phba->hbalock, flags);
eafe1df9 2181 if (!phba->hbq_in_use)
d7c255b2
JS
2182 goto err;
2183 while (!list_empty(&hbq_buf_list)) {
2184 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2185 dbuf.list);
2186 hbq_buffer->tag = (phba->hbqs[hbqno].buffer_count |
2187 (hbqno << 16));
3772a991 2188 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
a8adb832 2189 phba->hbqs[hbqno].buffer_count++;
d7c255b2
JS
2190 posted++;
2191 } else
51ef4c26 2192 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684 2193 }
3163f725 2194 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2195 return posted;
2196err:
eafe1df9 2197 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2198 while (!list_empty(&hbq_buf_list)) {
2199 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2200 dbuf.list);
2201 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
2202 }
2203 return 0;
ed957684
JS
2204}
2205
e59058c4 2206/**
3621a710 2207 * lpfc_sli_hbqbuf_add_hbqs - Post more HBQ buffers to firmware
e59058c4
JS
2208 * @phba: Pointer to HBA context object.
2209 * @qno: HBQ number.
2210 *
2211 * This function posts more buffers to the HBQ. This function
d7c255b2
JS
2212 * is called with no lock held. The function returns the number of HBQ entries
2213 * successfully allocated.
e59058c4 2214 **/
92d7f7b0
JS
2215int
2216lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 2217{
def9c7a9
JS
2218 if (phba->sli_rev == LPFC_SLI_REV4)
2219 return 0;
2220 else
2221 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2222 lpfc_hbq_defs[qno]->add_count);
92d7f7b0 2223}
ed957684 2224
e59058c4 2225/**
3621a710 2226 * lpfc_sli_hbqbuf_init_hbqs - Post initial buffers to the HBQ
e59058c4
JS
2227 * @phba: Pointer to HBA context object.
2228 * @qno: HBQ queue number.
2229 *
2230 * This function is called from SLI initialization code path with
2231 * no lock held to post initial HBQ buffers to firmware. The
d7c255b2 2232 * function returns the number of HBQ entries successfully allocated.
e59058c4 2233 **/
a6ababd2 2234static int
92d7f7b0
JS
2235lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
2236{
def9c7a9
JS
2237 if (phba->sli_rev == LPFC_SLI_REV4)
2238 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
73d91e50 2239 lpfc_hbq_defs[qno]->entry_count);
def9c7a9
JS
2240 else
2241 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2242 lpfc_hbq_defs[qno]->init_count);
ed957684
JS
2243}
2244
3772a991
JS
2245/**
2246 * lpfc_sli_hbqbuf_get - Remove the first hbq off of an hbq list
2247 * @phba: Pointer to HBA context object.
2248 * @hbqno: HBQ number.
2249 *
2250 * This function removes the first hbq buffer on an hbq list and returns a
2251 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2252 **/
2253static struct hbq_dmabuf *
2254lpfc_sli_hbqbuf_get(struct list_head *rb_list)
2255{
2256 struct lpfc_dmabuf *d_buf;
2257
2258 list_remove_head(rb_list, d_buf, struct lpfc_dmabuf, list);
2259 if (!d_buf)
2260 return NULL;
2261 return container_of(d_buf, struct hbq_dmabuf, dbuf);
2262}
2263
2d7dbc4c
JS
2264/**
2265 * lpfc_sli_rqbuf_get - Remove the first dma buffer off of an RQ list
2266 * @phba: Pointer to HBA context object.
2267 * @hbqno: HBQ number.
2268 *
2269 * This function removes the first RQ buffer on an RQ buffer list and returns a
2270 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2271 **/
2272static struct rqb_dmabuf *
2273lpfc_sli_rqbuf_get(struct lpfc_hba *phba, struct lpfc_queue *hrq)
2274{
2275 struct lpfc_dmabuf *h_buf;
2276 struct lpfc_rqb *rqbp;
2277
2278 rqbp = hrq->rqbp;
2279 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
2280 struct lpfc_dmabuf, list);
2281 if (!h_buf)
2282 return NULL;
2283 rqbp->buffer_count--;
2284 return container_of(h_buf, struct rqb_dmabuf, hbuf);
2285}
2286
e59058c4 2287/**
3621a710 2288 * lpfc_sli_hbqbuf_find - Find the hbq buffer associated with a tag
e59058c4
JS
2289 * @phba: Pointer to HBA context object.
2290 * @tag: Tag of the hbq buffer.
2291 *
71892418
SH
2292 * This function searches for the hbq buffer associated with the given tag in
2293 * the hbq buffer list. If it finds the hbq buffer, it returns the hbq_buffer
2294 * otherwise it returns NULL.
e59058c4 2295 **/
a6ababd2 2296static struct hbq_dmabuf *
92d7f7b0 2297lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 2298{
92d7f7b0
JS
2299 struct lpfc_dmabuf *d_buf;
2300 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS
2301 uint32_t hbqno;
2302
2303 hbqno = tag >> 16;
a0a74e45 2304 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 2305 return NULL;
ed957684 2306
3772a991 2307 spin_lock_irq(&phba->hbalock);
51ef4c26 2308 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 2309 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 2310 if (hbq_buf->tag == tag) {
3772a991 2311 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2312 return hbq_buf;
ed957684
JS
2313 }
2314 }
3772a991 2315 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2316 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 2317 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 2318 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 2319 return NULL;
ed957684
JS
2320}
2321
e59058c4 2322/**
3621a710 2323 * lpfc_sli_free_hbq - Give back the hbq buffer to firmware
e59058c4
JS
2324 * @phba: Pointer to HBA context object.
2325 * @hbq_buffer: Pointer to HBQ buffer.
2326 *
2327 * This function is called with hbalock. This function gives back
2328 * the hbq buffer to firmware. If the HBQ does not have space to
2329 * post the buffer, it will free the buffer.
2330 **/
ed957684 2331void
51ef4c26 2332lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS
2333{
2334 uint32_t hbqno;
2335
51ef4c26
JS
2336 if (hbq_buffer) {
2337 hbqno = hbq_buffer->tag >> 16;
3772a991 2338 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
51ef4c26 2339 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS
2340 }
2341}
2342
e59058c4 2343/**
3621a710 2344 * lpfc_sli_chk_mbx_command - Check if the mailbox is a legitimate mailbox
e59058c4
JS
2345 * @mbxCommand: mailbox command code.
2346 *
2347 * This function is called by the mailbox event handler function to verify
2348 * that the completed mailbox command is a legitimate mailbox command. If the
2349 * completed mailbox is not known to the function, it will return MBX_SHUTDOWN
2350 * and the mailbox event handler will take the HBA offline.
2351 **/
dea3101e
JB
2352static int
2353lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
2354{
2355 uint8_t ret;
2356
2357 switch (mbxCommand) {
2358 case MBX_LOAD_SM:
2359 case MBX_READ_NV:
2360 case MBX_WRITE_NV:
a8adb832 2361 case MBX_WRITE_VPARMS:
dea3101e
JB
2362 case MBX_RUN_BIU_DIAG:
2363 case MBX_INIT_LINK:
2364 case MBX_DOWN_LINK:
2365 case MBX_CONFIG_LINK:
2366 case MBX_CONFIG_RING:
2367 case MBX_RESET_RING:
2368 case MBX_READ_CONFIG:
2369 case MBX_READ_RCONFIG:
2370 case MBX_READ_SPARM:
2371 case MBX_READ_STATUS:
2372 case MBX_READ_RPI:
2373 case MBX_READ_XRI:
2374 case MBX_READ_REV:
2375 case MBX_READ_LNK_STAT:
2376 case MBX_REG_LOGIN:
2377 case MBX_UNREG_LOGIN:
dea3101e
JB
2378 case MBX_CLEAR_LA:
2379 case MBX_DUMP_MEMORY:
2380 case MBX_DUMP_CONTEXT:
2381 case MBX_RUN_DIAGS:
2382 case MBX_RESTART:
2383 case MBX_UPDATE_CFG:
2384 case MBX_DOWN_LOAD:
2385 case MBX_DEL_LD_ENTRY:
2386 case MBX_RUN_PROGRAM:
2387 case MBX_SET_MASK:
09372820 2388 case MBX_SET_VARIABLE:
dea3101e 2389 case MBX_UNREG_D_ID:
41415862 2390 case MBX_KILL_BOARD:
dea3101e 2391 case MBX_CONFIG_FARP:
41415862 2392 case MBX_BEACON:
dea3101e
JB
2393 case MBX_LOAD_AREA:
2394 case MBX_RUN_BIU_DIAG64:
2395 case MBX_CONFIG_PORT:
2396 case MBX_READ_SPARM64:
2397 case MBX_READ_RPI64:
2398 case MBX_REG_LOGIN64:
76a95d75 2399 case MBX_READ_TOPOLOGY:
09372820 2400 case MBX_WRITE_WWN:
dea3101e
JB
2401 case MBX_SET_DEBUG:
2402 case MBX_LOAD_EXP_ROM:
57127f15 2403 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS
2404 case MBX_REG_VPI:
2405 case MBX_UNREG_VPI:
858c9f6c 2406 case MBX_HEARTBEAT:
84774a4d
JS
2407 case MBX_PORT_CAPABILITIES:
2408 case MBX_PORT_IOV_CONTROL:
04c68496
JS
2409 case MBX_SLI4_CONFIG:
2410 case MBX_SLI4_REQ_FTRS:
2411 case MBX_REG_FCFI:
2412 case MBX_UNREG_FCFI:
2413 case MBX_REG_VFI:
2414 case MBX_UNREG_VFI:
2415 case MBX_INIT_VPI:
2416 case MBX_INIT_VFI:
2417 case MBX_RESUME_RPI:
c7495937
JS
2418 case MBX_READ_EVENT_LOG_STATUS:
2419 case MBX_READ_EVENT_LOG:
dcf2a4e0
JS
2420 case MBX_SECURITY_MGMT:
2421 case MBX_AUTH_PORT:
940eb687 2422 case MBX_ACCESS_VDATA:
dea3101e
JB
2423 ret = mbxCommand;
2424 break;
2425 default:
2426 ret = MBX_SHUTDOWN;
2427 break;
2428 }
2e0fef85 2429 return ret;
dea3101e 2430}
e59058c4
JS
2431
2432/**
3621a710 2433 * lpfc_sli_wake_mbox_wait - lpfc_sli_issue_mbox_wait mbox completion handler
e59058c4
JS
2434 * @phba: Pointer to HBA context object.
2435 * @pmboxq: Pointer to mailbox command.
2436 *
2437 * This is completion handler function for mailbox commands issued from
2438 * lpfc_sli_issue_mbox_wait function. This function is called by the
2439 * mailbox event handler function with no lock held. This function
2440 * will wake up thread waiting on the wait queue pointed by context1
2441 * of the mailbox.
2442 **/
04c68496 2443void
2e0fef85 2444lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e 2445{
858c9f6c 2446 unsigned long drvr_flag;
e29d74f8 2447 struct completion *pmbox_done;
dea3101e
JB
2448
2449 /*
e29d74f8 2450 * If pmbox_done is empty, the driver thread gave up waiting and
dea3101e
JB
2451 * continued running.
2452 */
7054a606 2453 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 2454 spin_lock_irqsave(&phba->hbalock, drvr_flag);
e29d74f8
JS
2455 pmbox_done = (struct completion *)pmboxq->context3;
2456 if (pmbox_done)
2457 complete(pmbox_done);
858c9f6c 2458 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
2459 return;
2460}
2461
b95b2119
JS
2462static void
2463__lpfc_sli_rpi_release(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
2464{
2465 unsigned long iflags;
2466
2467 if (ndlp->nlp_flag & NLP_RELEASE_RPI) {
2468 lpfc_sli4_free_rpi(vport->phba, ndlp->nlp_rpi);
2469 spin_lock_irqsave(&vport->phba->ndlp_lock, iflags);
2470 ndlp->nlp_flag &= ~NLP_RELEASE_RPI;
2471 ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR;
2472 spin_unlock_irqrestore(&vport->phba->ndlp_lock, iflags);
2473 }
2474 ndlp->nlp_flag &= ~NLP_UNREG_INP;
2475}
e59058c4
JS
2476
2477/**
3621a710 2478 * lpfc_sli_def_mbox_cmpl - Default mailbox completion handler
e59058c4
JS
2479 * @phba: Pointer to HBA context object.
2480 * @pmb: Pointer to mailbox object.
2481 *
2482 * This function is the default mailbox completion handler. It
2483 * frees the memory resources associated with the completed mailbox
2484 * command. If the completed command is a REG_LOGIN mailbox command,
2485 * this function will issue a UREG_LOGIN to re-claim the RPI.
2486 **/
dea3101e 2487void
2e0fef85 2488lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e 2489{
d439d286 2490 struct lpfc_vport *vport = pmb->vport;
dea3101e 2491 struct lpfc_dmabuf *mp;
d439d286 2492 struct lpfc_nodelist *ndlp;
5af5eee7 2493 struct Scsi_Host *shost;
04c68496 2494 uint16_t rpi, vpi;
7054a606
JS
2495 int rc;
2496
3e1f0718 2497 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
7054a606 2498
dea3101e
JB
2499 if (mp) {
2500 lpfc_mbuf_free(phba, mp->virt, mp->phys);
2501 kfree(mp);
2502 }
7054a606
JS
2503
2504 /*
2505 * If a REG_LOGIN succeeded after node is destroyed or node
2506 * is in re-discovery driver need to cleanup the RPI.
2507 */
2e0fef85 2508 if (!(phba->pport->load_flag & FC_UNLOADING) &&
04c68496
JS
2509 pmb->u.mb.mbxCommand == MBX_REG_LOGIN64 &&
2510 !pmb->u.mb.mbxStatus) {
2511 rpi = pmb->u.mb.un.varWords[0];
6d368e53 2512 vpi = pmb->u.mb.un.varRegLogin.vpi;
04c68496 2513 lpfc_unreg_login(phba, vpi, rpi, pmb);
de96e9c5 2514 pmb->vport = vport;
92d7f7b0 2515 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS
2516 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2517 if (rc != MBX_NOT_FINISHED)
2518 return;
2519 }
2520
695a814e
JS
2521 if ((pmb->u.mb.mbxCommand == MBX_REG_VPI) &&
2522 !(phba->pport->load_flag & FC_UNLOADING) &&
2523 !pmb->u.mb.mbxStatus) {
5af5eee7
JS
2524 shost = lpfc_shost_from_vport(vport);
2525 spin_lock_irq(shost->host_lock);
2526 vport->vpi_state |= LPFC_VPI_REGISTERED;
2527 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI;
2528 spin_unlock_irq(shost->host_lock);
695a814e
JS
2529 }
2530
d439d286 2531 if (pmb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 2532 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
d439d286 2533 lpfc_nlp_put(ndlp);
dea16bda
JS
2534 pmb->ctx_buf = NULL;
2535 pmb->ctx_ndlp = NULL;
2536 }
2537
2538 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2539 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
2540
2541 /* Check to see if there are any deferred events to process */
2542 if (ndlp) {
2543 lpfc_printf_vlog(
2544 vport,
2545 KERN_INFO, LOG_MBOX | LOG_DISCOVERY,
2546 "1438 UNREG cmpl deferred mbox x%x "
32350664 2547 "on NPort x%x Data: x%x x%x %px\n",
dea16bda
JS
2548 ndlp->nlp_rpi, ndlp->nlp_DID,
2549 ndlp->nlp_flag, ndlp->nlp_defer_did, ndlp);
2550
2551 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2552 (ndlp->nlp_defer_did != NLP_EVT_NOTHING_PENDING)) {
00292e03 2553 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2554 ndlp->nlp_defer_did = NLP_EVT_NOTHING_PENDING;
2555 lpfc_issue_els_plogi(vport, ndlp->nlp_DID, 0);
00292e03 2556 } else {
b95b2119 2557 __lpfc_sli_rpi_release(vport, ndlp);
dea16bda 2558 }
97acd001
JS
2559 if (vport->load_flag & FC_UNLOADING)
2560 lpfc_nlp_put(ndlp);
9b164068 2561 pmb->ctx_ndlp = NULL;
dea16bda 2562 }
d439d286
JS
2563 }
2564
dcf2a4e0
JS
2565 /* Check security permission status on INIT_LINK mailbox command */
2566 if ((pmb->u.mb.mbxCommand == MBX_INIT_LINK) &&
2567 (pmb->u.mb.mbxStatus == MBXERR_SEC_NO_PERMISSION))
2568 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
2569 "2860 SLI authentication is required "
2570 "for INIT_LINK but has not done yet\n");
2571
04c68496
JS
2572 if (bf_get(lpfc_mqe_command, &pmb->u.mqe) == MBX_SLI4_CONFIG)
2573 lpfc_sli4_mbox_cmd_free(phba, pmb);
2574 else
2575 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2576}
be6bb941
JS
2577 /**
2578 * lpfc_sli4_unreg_rpi_cmpl_clr - mailbox completion handler
2579 * @phba: Pointer to HBA context object.
2580 * @pmb: Pointer to mailbox object.
2581 *
2582 * This function is the unreg rpi mailbox completion handler. It
2583 * frees the memory resources associated with the completed mailbox
2584 * command. An additional refrenece is put on the ndlp to prevent
2585 * lpfc_nlp_release from freeing the rpi bit in the bitmask before
2586 * the unreg mailbox command completes, this routine puts the
2587 * reference back.
2588 *
2589 **/
2590void
2591lpfc_sli4_unreg_rpi_cmpl_clr(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2592{
2593 struct lpfc_vport *vport = pmb->vport;
2594 struct lpfc_nodelist *ndlp;
2595
3e1f0718 2596 ndlp = pmb->ctx_ndlp;
be6bb941
JS
2597 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2598 if (phba->sli_rev == LPFC_SLI_REV4 &&
2599 (bf_get(lpfc_sli_intf_if_type,
27d6ac0a 2600 &phba->sli4_hba.sli_intf) >=
be6bb941
JS
2601 LPFC_SLI_INTF_IF_TYPE_2)) {
2602 if (ndlp) {
dea16bda
JS
2603 lpfc_printf_vlog(
2604 vport, KERN_INFO, LOG_MBOX | LOG_SLI,
2605 "0010 UNREG_LOGIN vpi:%x "
2606 "rpi:%x DID:%x defer x%x flg x%x "
32350664 2607 "map:%x %px\n",
dea16bda
JS
2608 vport->vpi, ndlp->nlp_rpi,
2609 ndlp->nlp_DID, ndlp->nlp_defer_did,
2610 ndlp->nlp_flag,
2611 ndlp->nlp_usg_map, ndlp);
7c5e518c 2612 ndlp->nlp_flag &= ~NLP_LOGO_ACC;
be6bb941 2613 lpfc_nlp_put(ndlp);
dea16bda
JS
2614
2615 /* Check to see if there are any deferred
2616 * events to process
2617 */
2618 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2619 (ndlp->nlp_defer_did !=
2620 NLP_EVT_NOTHING_PENDING)) {
2621 lpfc_printf_vlog(
2622 vport, KERN_INFO, LOG_DISCOVERY,
2623 "4111 UNREG cmpl deferred "
2624 "clr x%x on "
32350664 2625 "NPort x%x Data: x%x x%px\n",
dea16bda
JS
2626 ndlp->nlp_rpi, ndlp->nlp_DID,
2627 ndlp->nlp_defer_did, ndlp);
00292e03 2628 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2629 ndlp->nlp_defer_did =
2630 NLP_EVT_NOTHING_PENDING;
2631 lpfc_issue_els_plogi(
2632 vport, ndlp->nlp_DID, 0);
00292e03 2633 } else {
b95b2119 2634 __lpfc_sli_rpi_release(vport, ndlp);
dea16bda 2635 }
be6bb941
JS
2636 }
2637 }
2638 }
2639
2640 mempool_free(pmb, phba->mbox_mem_pool);
2641}
dea3101e 2642
e59058c4 2643/**
3621a710 2644 * lpfc_sli_handle_mb_event - Handle mailbox completions from firmware
e59058c4
JS
2645 * @phba: Pointer to HBA context object.
2646 *
2647 * This function is called with no lock held. This function processes all
2648 * the completed mailbox commands and gives it to upper layers. The interrupt
2649 * service routine processes mailbox completion interrupt and adds completed
2650 * mailbox commands to the mboxq_cmpl queue and signals the worker thread.
2651 * Worker thread call lpfc_sli_handle_mb_event, which will return the
2652 * completed mailbox commands in mboxq_cmpl queue to the upper layers. This
2653 * function returns the mailbox commands to the upper layer by calling the
2654 * completion handler function of each mailbox.
2655 **/
dea3101e 2656int
2e0fef85 2657lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 2658{
92d7f7b0 2659 MAILBOX_t *pmbox;
dea3101e 2660 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS
2661 int rc;
2662 LIST_HEAD(cmplq);
dea3101e
JB
2663
2664 phba->sli.slistat.mbox_event++;
2665
92d7f7b0
JS
2666 /* Get all completed mailboxe buffers into the cmplq */
2667 spin_lock_irq(&phba->hbalock);
2668 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
2669 spin_unlock_irq(&phba->hbalock);
dea3101e 2670
92d7f7b0
JS
2671 /* Get a Mailbox buffer to setup mailbox commands for callback */
2672 do {
2673 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
2674 if (pmb == NULL)
2675 break;
2e0fef85 2676
04c68496 2677 pmbox = &pmb->u.mb;
dea3101e 2678
858c9f6c
JS
2679 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
2680 if (pmb->vport) {
2681 lpfc_debugfs_disc_trc(pmb->vport,
2682 LPFC_DISC_TRC_MBOX_VPORT,
2683 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
2684 (uint32_t)pmbox->mbxCommand,
2685 pmbox->un.varWords[0],
2686 pmbox->un.varWords[1]);
2687 }
2688 else {
2689 lpfc_debugfs_disc_trc(phba->pport,
2690 LPFC_DISC_TRC_MBOX,
2691 "MBOX cmpl: cmd:x%x mb:x%x x%x",
2692 (uint32_t)pmbox->mbxCommand,
2693 pmbox->un.varWords[0],
2694 pmbox->un.varWords[1]);
2695 }
2696 }
2697
dea3101e
JB
2698 /*
2699 * It is a fatal error if unknown mbox command completion.
2700 */
2701 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
2702 MBX_SHUTDOWN) {
af901ca1 2703 /* Unknown mailbox command compl */
92d7f7b0 2704 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2705 "(%d):0323 Unknown Mailbox command "
a183a15f 2706 "x%x (x%x/x%x) Cmpl\n",
43bfea1b
JS
2707 pmb->vport ? pmb->vport->vpi :
2708 LPFC_VPORT_UNKNOWN,
04c68496 2709 pmbox->mbxCommand,
a183a15f
JS
2710 lpfc_sli_config_mbox_subsys_get(phba,
2711 pmb),
2712 lpfc_sli_config_mbox_opcode_get(phba,
2713 pmb));
2e0fef85 2714 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
2715 phba->work_hs = HS_FFER3;
2716 lpfc_handle_eratt(phba);
92d7f7b0 2717 continue;
dea3101e
JB
2718 }
2719
dea3101e
JB
2720 if (pmbox->mbxStatus) {
2721 phba->sli.slistat.mbox_stat_err++;
2722 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
2723 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0 2724 lpfc_printf_log(phba, KERN_INFO,
a183a15f
JS
2725 LOG_MBOX | LOG_SLI,
2726 "(%d):0305 Mbox cmd cmpl "
2727 "error - RETRYing Data: x%x "
2728 "(x%x/x%x) x%x x%x x%x\n",
43bfea1b
JS
2729 pmb->vport ? pmb->vport->vpi :
2730 LPFC_VPORT_UNKNOWN,
a183a15f
JS
2731 pmbox->mbxCommand,
2732 lpfc_sli_config_mbox_subsys_get(phba,
2733 pmb),
2734 lpfc_sli_config_mbox_opcode_get(phba,
2735 pmb),
2736 pmbox->mbxStatus,
2737 pmbox->un.varWords[0],
43bfea1b
JS
2738 pmb->vport ? pmb->vport->port_state :
2739 LPFC_VPORT_UNKNOWN);
dea3101e
JB
2740 pmbox->mbxStatus = 0;
2741 pmbox->mbxOwner = OWN_HOST;
dea3101e 2742 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
04c68496 2743 if (rc != MBX_NOT_FINISHED)
92d7f7b0 2744 continue;
dea3101e
JB
2745 }
2746 }
2747
2748 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 2749 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
2d44d165 2750 "(%d):0307 Mailbox cmd x%x (x%x/x%x) Cmpl %ps "
e74c03c8
JS
2751 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
2752 "x%x x%x x%x\n",
92d7f7b0 2753 pmb->vport ? pmb->vport->vpi : 0,
dea3101e 2754 pmbox->mbxCommand,
a183a15f
JS
2755 lpfc_sli_config_mbox_subsys_get(phba, pmb),
2756 lpfc_sli_config_mbox_opcode_get(phba, pmb),
dea3101e
JB
2757 pmb->mbox_cmpl,
2758 *((uint32_t *) pmbox),
2759 pmbox->un.varWords[0],
2760 pmbox->un.varWords[1],
2761 pmbox->un.varWords[2],
2762 pmbox->un.varWords[3],
2763 pmbox->un.varWords[4],
2764 pmbox->un.varWords[5],
2765 pmbox->un.varWords[6],
e74c03c8
JS
2766 pmbox->un.varWords[7],
2767 pmbox->un.varWords[8],
2768 pmbox->un.varWords[9],
2769 pmbox->un.varWords[10]);
dea3101e 2770
92d7f7b0 2771 if (pmb->mbox_cmpl)
dea3101e 2772 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS
2773 } while (1);
2774 return 0;
2775}
dea3101e 2776
e59058c4 2777/**
3621a710 2778 * lpfc_sli_get_buff - Get the buffer associated with the buffer tag
e59058c4
JS
2779 * @phba: Pointer to HBA context object.
2780 * @pring: Pointer to driver SLI ring object.
2781 * @tag: buffer tag.
2782 *
2783 * This function is called with no lock held. When QUE_BUFTAG_BIT bit
2784 * is set in the tag the buffer is posted for a particular exchange,
2785 * the function will return the buffer without replacing the buffer.
2786 * If the buffer is for unsolicited ELS or CT traffic, this function
2787 * returns the buffer and also posts another buffer to the firmware.
2788 **/
76bb24ef
JS
2789static struct lpfc_dmabuf *
2790lpfc_sli_get_buff(struct lpfc_hba *phba,
9f1e1b50
JS
2791 struct lpfc_sli_ring *pring,
2792 uint32_t tag)
76bb24ef 2793{
9f1e1b50
JS
2794 struct hbq_dmabuf *hbq_entry;
2795
76bb24ef
JS
2796 if (tag & QUE_BUFTAG_BIT)
2797 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
9f1e1b50
JS
2798 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
2799 if (!hbq_entry)
2800 return NULL;
2801 return &hbq_entry->dbuf;
76bb24ef 2802}
57127f15 2803
3772a991
JS
2804/**
2805 * lpfc_complete_unsol_iocb - Complete an unsolicited sequence
2806 * @phba: Pointer to HBA context object.
2807 * @pring: Pointer to driver SLI ring object.
2808 * @saveq: Pointer to the iocbq struct representing the sequence starting frame.
2809 * @fch_r_ctl: the r_ctl for the first frame of the sequence.
2810 * @fch_type: the type for the first frame of the sequence.
2811 *
2812 * This function is called with no lock held. This function uses the r_ctl and
2813 * type of the received sequence to find the correct callback function to call
2814 * to process the sequence.
2815 **/
2816static int
2817lpfc_complete_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2818 struct lpfc_iocbq *saveq, uint32_t fch_r_ctl,
2819 uint32_t fch_type)
2820{
2821 int i;
2822
f358dd0c
JS
2823 switch (fch_type) {
2824 case FC_TYPE_NVME:
d613b6a7 2825 lpfc_nvmet_unsol_ls_event(phba, pring, saveq);
f358dd0c
JS
2826 return 1;
2827 default:
2828 break;
2829 }
2830
3772a991
JS
2831 /* unSolicited Responses */
2832 if (pring->prt[0].profile) {
2833 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
2834 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
2835 saveq);
2836 return 1;
2837 }
2838 /* We must search, based on rctl / type
2839 for the right routine */
2840 for (i = 0; i < pring->num_mask; i++) {
2841 if ((pring->prt[i].rctl == fch_r_ctl) &&
2842 (pring->prt[i].type == fch_type)) {
2843 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
2844 (pring->prt[i].lpfc_sli_rcv_unsol_event)
2845 (phba, pring, saveq);
2846 return 1;
2847 }
2848 }
2849 return 0;
2850}
e59058c4
JS
2851
2852/**
3621a710 2853 * lpfc_sli_process_unsol_iocb - Unsolicited iocb handler
e59058c4
JS
2854 * @phba: Pointer to HBA context object.
2855 * @pring: Pointer to driver SLI ring object.
2856 * @saveq: Pointer to the unsolicited iocb.
2857 *
2858 * This function is called with no lock held by the ring event handler
2859 * when there is an unsolicited iocb posted to the response ring by the
2860 * firmware. This function gets the buffer associated with the iocbs
2861 * and calls the event handler for the ring. This function handles both
2862 * qring buffers and hbq buffers.
2863 * When the function returns 1 the caller can free the iocb object otherwise
2864 * upper layer functions will free the iocb objects.
2865 **/
dea3101e
JB
2866static int
2867lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2868 struct lpfc_iocbq *saveq)
2869{
2870 IOCB_t * irsp;
2871 WORD5 * w5p;
2872 uint32_t Rctl, Type;
76bb24ef 2873 struct lpfc_iocbq *iocbq;
3163f725 2874 struct lpfc_dmabuf *dmzbuf;
dea3101e 2875
dea3101e 2876 irsp = &(saveq->iocb);
57127f15
JS
2877
2878 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
2879 if (pring->lpfc_sli_rcv_async_status)
2880 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
2881 else
2882 lpfc_printf_log(phba,
2883 KERN_WARNING,
2884 LOG_SLI,
2885 "0316 Ring %d handler: unexpected "
2886 "ASYNC_STATUS iocb received evt_code "
2887 "0x%x\n",
2888 pring->ringno,
2889 irsp->un.asyncstat.evt_code);
2890 return 1;
2891 }
2892
3163f725
JS
2893 if ((irsp->ulpCommand == CMD_IOCB_RET_XRI64_CX) &&
2894 (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)) {
2895 if (irsp->ulpBdeCount > 0) {
2896 dmzbuf = lpfc_sli_get_buff(phba, pring,
2897 irsp->un.ulpWord[3]);
2898 lpfc_in_buf_free(phba, dmzbuf);
2899 }
2900
2901 if (irsp->ulpBdeCount > 1) {
2902 dmzbuf = lpfc_sli_get_buff(phba, pring,
2903 irsp->unsli3.sli3Words[3]);
2904 lpfc_in_buf_free(phba, dmzbuf);
2905 }
2906
2907 if (irsp->ulpBdeCount > 2) {
2908 dmzbuf = lpfc_sli_get_buff(phba, pring,
2909 irsp->unsli3.sli3Words[7]);
2910 lpfc_in_buf_free(phba, dmzbuf);
2911 }
2912
2913 return 1;
2914 }
2915
92d7f7b0 2916 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS
2917 if (irsp->ulpBdeCount != 0) {
2918 saveq->context2 = lpfc_sli_get_buff(phba, pring,
2919 irsp->un.ulpWord[3]);
2920 if (!saveq->context2)
2921 lpfc_printf_log(phba,
2922 KERN_ERR,
2923 LOG_SLI,
2924 "0341 Ring %d Cannot find buffer for "
2925 "an unsolicited iocb. tag 0x%x\n",
2926 pring->ringno,
2927 irsp->un.ulpWord[3]);
76bb24ef
JS
2928 }
2929 if (irsp->ulpBdeCount == 2) {
2930 saveq->context3 = lpfc_sli_get_buff(phba, pring,
2931 irsp->unsli3.sli3Words[7]);
2932 if (!saveq->context3)
2933 lpfc_printf_log(phba,
2934 KERN_ERR,
2935 LOG_SLI,
2936 "0342 Ring %d Cannot find buffer for an"
2937 " unsolicited iocb. tag 0x%x\n",
2938 pring->ringno,
2939 irsp->unsli3.sli3Words[7]);
2940 }
2941 list_for_each_entry(iocbq, &saveq->list, list) {
76bb24ef 2942 irsp = &(iocbq->iocb);
76bb24ef
JS
2943 if (irsp->ulpBdeCount != 0) {
2944 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
2945 irsp->un.ulpWord[3]);
9c2face6 2946 if (!iocbq->context2)
76bb24ef
JS
2947 lpfc_printf_log(phba,
2948 KERN_ERR,
2949 LOG_SLI,
2950 "0343 Ring %d Cannot find "
2951 "buffer for an unsolicited iocb"
2952 ". tag 0x%x\n", pring->ringno,
92d7f7b0 2953 irsp->un.ulpWord[3]);
76bb24ef
JS
2954 }
2955 if (irsp->ulpBdeCount == 2) {
2956 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 2957 irsp->unsli3.sli3Words[7]);
9c2face6 2958 if (!iocbq->context3)
76bb24ef
JS
2959 lpfc_printf_log(phba,
2960 KERN_ERR,
2961 LOG_SLI,
2962 "0344 Ring %d Cannot find "
2963 "buffer for an unsolicited "
2964 "iocb. tag 0x%x\n",
2965 pring->ringno,
2966 irsp->unsli3.sli3Words[7]);
2967 }
2968 }
92d7f7b0 2969 }
9c2face6
JS
2970 if (irsp->ulpBdeCount != 0 &&
2971 (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
2972 irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
2973 int found = 0;
2974
2975 /* search continue save q for same XRI */
2976 list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
7851fe2c
JS
2977 if (iocbq->iocb.unsli3.rcvsli3.ox_id ==
2978 saveq->iocb.unsli3.rcvsli3.ox_id) {
9c2face6
JS
2979 list_add_tail(&saveq->list, &iocbq->list);
2980 found = 1;
2981 break;
2982 }
2983 }
2984 if (!found)
2985 list_add_tail(&saveq->clist,
2986 &pring->iocb_continue_saveq);
2987 if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
2988 list_del_init(&iocbq->clist);
2989 saveq = iocbq;
2990 irsp = &(saveq->iocb);
2991 } else
2992 return 0;
2993 }
2994 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
2995 (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
2996 (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
6a9c52cf
JS
2997 Rctl = FC_RCTL_ELS_REQ;
2998 Type = FC_TYPE_ELS;
9c2face6
JS
2999 } else {
3000 w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
3001 Rctl = w5p->hcsw.Rctl;
3002 Type = w5p->hcsw.Type;
3003
3004 /* Firmware Workaround */
3005 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
3006 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
3007 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
6a9c52cf
JS
3008 Rctl = FC_RCTL_ELS_REQ;
3009 Type = FC_TYPE_ELS;
9c2face6
JS
3010 w5p->hcsw.Rctl = Rctl;
3011 w5p->hcsw.Type = Type;
3012 }
3013 }
92d7f7b0 3014
3772a991 3015 if (!lpfc_complete_unsol_iocb(phba, pring, saveq, Rctl, Type))
92d7f7b0 3016 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3017 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 3018 "Type x%x received\n",
e8b62011 3019 pring->ringno, Rctl, Type);
3772a991 3020
92d7f7b0 3021 return 1;
dea3101e
JB
3022}
3023
e59058c4 3024/**
3621a710 3025 * lpfc_sli_iocbq_lookup - Find command iocb for the given response iocb
e59058c4
JS
3026 * @phba: Pointer to HBA context object.
3027 * @pring: Pointer to driver SLI ring object.
3028 * @prspiocb: Pointer to response iocb object.
3029 *
3030 * This function looks up the iocb_lookup table to get the command iocb
3031 * corresponding to the given response iocb using the iotag of the
e2a8be56
JS
3032 * response iocb. The driver calls this function with the hbalock held
3033 * for SLI3 ports or the ring lock held for SLI4 ports.
e59058c4
JS
3034 * This function returns the command iocb object if it finds the command
3035 * iocb else returns NULL.
3036 **/
dea3101e 3037static struct lpfc_iocbq *
2e0fef85
JS
3038lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
3039 struct lpfc_sli_ring *pring,
3040 struct lpfc_iocbq *prspiocb)
dea3101e 3041{
dea3101e
JB
3042 struct lpfc_iocbq *cmd_iocb = NULL;
3043 uint16_t iotag;
e2a8be56
JS
3044 spinlock_t *temp_lock = NULL;
3045 unsigned long iflag = 0;
3046
3047 if (phba->sli_rev == LPFC_SLI_REV4)
3048 temp_lock = &pring->ring_lock;
3049 else
3050 temp_lock = &phba->hbalock;
dea3101e 3051
e2a8be56 3052 spin_lock_irqsave(temp_lock, iflag);
604a3e30
JB
3053 iotag = prspiocb->iocb.ulpIoTag;
3054
3055 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3056 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6 3057 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
89533e9b
JS
3058 /* remove from txcmpl queue list */
3059 list_del_init(&cmd_iocb->list);
4f2e66c6 3060 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
c490850a 3061 pring->txcmplq_cnt--;
e2a8be56 3062 spin_unlock_irqrestore(temp_lock, iflag);
89533e9b 3063 return cmd_iocb;
2a9bf3d0 3064 }
dea3101e
JB
3065 }
3066
e2a8be56 3067 spin_unlock_irqrestore(temp_lock, iflag);
dea3101e 3068 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
89533e9b 3069 "0317 iotag x%x is out of "
604a3e30 3070 "range: max iotag x%x wd0 x%x\n",
e8b62011 3071 iotag, phba->sli.last_iotag,
604a3e30 3072 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB
3073 return NULL;
3074}
3075
3772a991
JS
3076/**
3077 * lpfc_sli_iocbq_lookup_by_tag - Find command iocb for the iotag
3078 * @phba: Pointer to HBA context object.
3079 * @pring: Pointer to driver SLI ring object.
3080 * @iotag: IOCB tag.
3081 *
3082 * This function looks up the iocb_lookup table to get the command iocb
e2a8be56
JS
3083 * corresponding to the given iotag. The driver calls this function with
3084 * the ring lock held because this function is an SLI4 port only helper.
3772a991
JS
3085 * This function returns the command iocb object if it finds the command
3086 * iocb else returns NULL.
3087 **/
3088static struct lpfc_iocbq *
3089lpfc_sli_iocbq_lookup_by_tag(struct lpfc_hba *phba,
3090 struct lpfc_sli_ring *pring, uint16_t iotag)
3091{
895427bd 3092 struct lpfc_iocbq *cmd_iocb = NULL;
e2a8be56
JS
3093 spinlock_t *temp_lock = NULL;
3094 unsigned long iflag = 0;
3772a991 3095
e2a8be56
JS
3096 if (phba->sli_rev == LPFC_SLI_REV4)
3097 temp_lock = &pring->ring_lock;
3098 else
3099 temp_lock = &phba->hbalock;
3100
3101 spin_lock_irqsave(temp_lock, iflag);
3772a991
JS
3102 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3103 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6
JS
3104 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
3105 /* remove from txcmpl queue list */
3106 list_del_init(&cmd_iocb->list);
3107 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
c490850a 3108 pring->txcmplq_cnt--;
e2a8be56 3109 spin_unlock_irqrestore(temp_lock, iflag);
4f2e66c6 3110 return cmd_iocb;
2a9bf3d0 3111 }
3772a991 3112 }
89533e9b 3113
e2a8be56 3114 spin_unlock_irqrestore(temp_lock, iflag);
3772a991 3115 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd
JS
3116 "0372 iotag x%x lookup error: max iotag (x%x) "
3117 "iocb_flag x%x\n",
3118 iotag, phba->sli.last_iotag,
3119 cmd_iocb ? cmd_iocb->iocb_flag : 0xffff);
3772a991
JS
3120 return NULL;
3121}
3122
e59058c4 3123/**
3621a710 3124 * lpfc_sli_process_sol_iocb - process solicited iocb completion
e59058c4
JS
3125 * @phba: Pointer to HBA context object.
3126 * @pring: Pointer to driver SLI ring object.
3127 * @saveq: Pointer to the response iocb to be processed.
3128 *
3129 * This function is called by the ring event handler for non-fcp
3130 * rings when there is a new response iocb in the response ring.
3131 * The caller is not required to hold any locks. This function
3132 * gets the command iocb associated with the response iocb and
3133 * calls the completion handler for the command iocb. If there
3134 * is no completion handler, the function will free the resources
3135 * associated with command iocb. If the response iocb is for
3136 * an already aborted command iocb, the status of the completion
3137 * is changed to IOSTAT_LOCAL_REJECT/IOERR_SLI_ABORTED.
3138 * This function always returns 1.
3139 **/
dea3101e 3140static int
2e0fef85 3141lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB
3142 struct lpfc_iocbq *saveq)
3143{
2e0fef85 3144 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB
3145 int rc = 1;
3146 unsigned long iflag;
3147
604a3e30 3148 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
dea3101e
JB
3149 if (cmdiocbp) {
3150 if (cmdiocbp->iocb_cmpl) {
ea2151b4
JS
3151 /*
3152 * If an ELS command failed send an event to mgmt
3153 * application.
3154 */
3155 if (saveq->iocb.ulpStatus &&
3156 (pring->ringno == LPFC_ELS_RING) &&
3157 (cmdiocbp->iocb.ulpCommand ==
3158 CMD_ELS_REQUEST64_CR))
3159 lpfc_send_els_failure_event(phba,
3160 cmdiocbp, saveq);
3161
dea3101e
JB
3162 /*
3163 * Post all ELS completions to the worker thread.
3164 * All other are passed to the completion callback.
3165 */
3166 if (pring->ringno == LPFC_ELS_RING) {
341af102
JS
3167 if ((phba->sli_rev < LPFC_SLI_REV4) &&
3168 (cmdiocbp->iocb_flag &
3169 LPFC_DRIVER_ABORTED)) {
3170 spin_lock_irqsave(&phba->hbalock,
3171 iflag);
07951076
JS
3172 cmdiocbp->iocb_flag &=
3173 ~LPFC_DRIVER_ABORTED;
341af102
JS
3174 spin_unlock_irqrestore(&phba->hbalock,
3175 iflag);
07951076
JS
3176 saveq->iocb.ulpStatus =
3177 IOSTAT_LOCAL_REJECT;
3178 saveq->iocb.un.ulpWord[4] =
3179 IOERR_SLI_ABORTED;
0ff10d46
JS
3180
3181 /* Firmware could still be in progress
3182 * of DMAing payload, so don't free data
3183 * buffer till after a hbeat.
3184 */
341af102
JS
3185 spin_lock_irqsave(&phba->hbalock,
3186 iflag);
0ff10d46 3187 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
341af102
JS
3188 spin_unlock_irqrestore(&phba->hbalock,
3189 iflag);
3190 }
0f65ff68
JS
3191 if (phba->sli_rev == LPFC_SLI_REV4) {
3192 if (saveq->iocb_flag &
3193 LPFC_EXCHANGE_BUSY) {
3194 /* Set cmdiocb flag for the
3195 * exchange busy so sgl (xri)
3196 * will not be released until
3197 * the abort xri is received
3198 * from hba.
3199 */
3200 spin_lock_irqsave(
3201 &phba->hbalock, iflag);
3202 cmdiocbp->iocb_flag |=
3203 LPFC_EXCHANGE_BUSY;
3204 spin_unlock_irqrestore(
3205 &phba->hbalock, iflag);
3206 }
3207 if (cmdiocbp->iocb_flag &
3208 LPFC_DRIVER_ABORTED) {
3209 /*
3210 * Clear LPFC_DRIVER_ABORTED
3211 * bit in case it was driver
3212 * initiated abort.
3213 */
3214 spin_lock_irqsave(
3215 &phba->hbalock, iflag);
3216 cmdiocbp->iocb_flag &=
3217 ~LPFC_DRIVER_ABORTED;
3218 spin_unlock_irqrestore(
3219 &phba->hbalock, iflag);
3220 cmdiocbp->iocb.ulpStatus =
3221 IOSTAT_LOCAL_REJECT;
3222 cmdiocbp->iocb.un.ulpWord[4] =
3223 IOERR_ABORT_REQUESTED;
3224 /*
3225 * For SLI4, irsiocb contains
3226 * NO_XRI in sli_xritag, it
3227 * shall not affect releasing
3228 * sgl (xri) process.
3229 */
3230 saveq->iocb.ulpStatus =
3231 IOSTAT_LOCAL_REJECT;
3232 saveq->iocb.un.ulpWord[4] =
3233 IOERR_SLI_ABORTED;
3234 spin_lock_irqsave(
3235 &phba->hbalock, iflag);
3236 saveq->iocb_flag |=
3237 LPFC_DELAY_MEM_FREE;
3238 spin_unlock_irqrestore(
3239 &phba->hbalock, iflag);
3240 }
07951076 3241 }
dea3101e 3242 }
2e0fef85 3243 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB
3244 } else
3245 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB
3246 } else {
3247 /*
3248 * Unknown initiating command based on the response iotag.
3249 * This could be the case on the ELS ring because of
3250 * lpfc_els_abort().
3251 */
3252 if (pring->ringno != LPFC_ELS_RING) {
3253 /*
3254 * Ring <ringno> handler: unexpected completion IoTag
3255 * <IoTag>
3256 */
a257bf90 3257 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
3258 "0322 Ring %d handler: "
3259 "unexpected completion IoTag x%x "
3260 "Data: x%x x%x x%x x%x\n",
3261 pring->ringno,
3262 saveq->iocb.ulpIoTag,
3263 saveq->iocb.ulpStatus,
3264 saveq->iocb.un.ulpWord[4],
3265 saveq->iocb.ulpCommand,
3266 saveq->iocb.ulpContext);
dea3101e
JB
3267 }
3268 }
68876920 3269
dea3101e
JB
3270 return rc;
3271}
3272
e59058c4 3273/**
3621a710 3274 * lpfc_sli_rsp_pointers_error - Response ring pointer error handler
e59058c4
JS
3275 * @phba: Pointer to HBA context object.
3276 * @pring: Pointer to driver SLI ring object.
3277 *
3278 * This function is called from the iocb ring event handlers when
3279 * put pointer is ahead of the get pointer for a ring. This function signal
3280 * an error attention condition to the worker thread and the worker
3281 * thread will transition the HBA to offline state.
3282 **/
2e0fef85
JS
3283static void
3284lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 3285{
34b02dcd 3286 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
875fbdfe 3287 /*
025dfdaf 3288 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
875fbdfe
JSEC
3289 * rsp ring <portRspMax>
3290 */
3291 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3292 "0312 Ring %d handler: portRspPut %d "
025dfdaf 3293 "is bigger than rsp ring %d\n",
e8b62011 3294 pring->ringno, le32_to_cpu(pgp->rspPutInx),
7e56aa25 3295 pring->sli.sli3.numRiocb);
875fbdfe 3296
2e0fef85 3297 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC
3298
3299 /*
3300 * All error attention handlers are posted to
3301 * worker thread
3302 */
3303 phba->work_ha |= HA_ERATT;
3304 phba->work_hs = HS_FFER3;
92d7f7b0 3305
5e9d9b82 3306 lpfc_worker_wake_up(phba);
875fbdfe
JSEC
3307
3308 return;
3309}
3310
9399627f 3311/**
3621a710 3312 * lpfc_poll_eratt - Error attention polling timer timeout handler
9399627f
JS
3313 * @ptr: Pointer to address of HBA context object.
3314 *
3315 * This function is invoked by the Error Attention polling timer when the
3316 * timer times out. It will check the SLI Error Attention register for
3317 * possible attention events. If so, it will post an Error Attention event
3318 * and wake up worker thread to process it. Otherwise, it will set up the
3319 * Error Attention polling timer for the next poll.
3320 **/
f22eb4d3 3321void lpfc_poll_eratt(struct timer_list *t)
9399627f
JS
3322{
3323 struct lpfc_hba *phba;
eb016566 3324 uint32_t eratt = 0;
aa6fbb75 3325 uint64_t sli_intr, cnt;
9399627f 3326
f22eb4d3 3327 phba = from_timer(phba, t, eratt_poll);
9399627f 3328
aa6fbb75
JS
3329 /* Here we will also keep track of interrupts per sec of the hba */
3330 sli_intr = phba->sli.slistat.sli_intr;
3331
3332 if (phba->sli.slistat.sli_prev_intr > sli_intr)
3333 cnt = (((uint64_t)(-1) - phba->sli.slistat.sli_prev_intr) +
3334 sli_intr);
3335 else
3336 cnt = (sli_intr - phba->sli.slistat.sli_prev_intr);
3337
65791f1f
JS
3338 /* 64-bit integer division not supported on 32-bit x86 - use do_div */
3339 do_div(cnt, phba->eratt_poll_interval);
aa6fbb75
JS
3340 phba->sli.slistat.sli_ips = cnt;
3341
3342 phba->sli.slistat.sli_prev_intr = sli_intr;
3343
9399627f
JS
3344 /* Check chip HA register for error event */
3345 eratt = lpfc_sli_check_eratt(phba);
3346
3347 if (eratt)
3348 /* Tell the worker thread there is work to do */
3349 lpfc_worker_wake_up(phba);
3350 else
3351 /* Restart the timer for next eratt poll */
256ec0d0
JS
3352 mod_timer(&phba->eratt_poll,
3353 jiffies +
65791f1f 3354 msecs_to_jiffies(1000 * phba->eratt_poll_interval));
9399627f
JS
3355 return;
3356}
3357
875fbdfe 3358
e59058c4 3359/**
3621a710 3360 * lpfc_sli_handle_fast_ring_event - Handle ring events on FCP ring
e59058c4
JS
3361 * @phba: Pointer to HBA context object.
3362 * @pring: Pointer to driver SLI ring object.
3363 * @mask: Host attention register mask for this ring.
3364 *
3365 * This function is called from the interrupt context when there is a ring
3366 * event for the fcp ring. The caller does not hold any lock.
3367 * The function processes each response iocb in the response ring until it
25985edc 3368 * finds an iocb with LE bit set and chains all the iocbs up to the iocb with
e59058c4
JS
3369 * LE bit set. The function will call the completion handler of the command iocb
3370 * if the response iocb indicates a completion for a command iocb or it is
3371 * an abort completion. The function will call lpfc_sli_process_unsol_iocb
3372 * function if this is an unsolicited iocb.
dea3101e 3373 * This routine presumes LPFC_FCP_RING handling and doesn't bother
45ed1190
JS
3374 * to check it explicitly.
3375 */
3376int
2e0fef85
JS
3377lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
3378 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3379{
34b02dcd 3380 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
dea3101e 3381 IOCB_t *irsp = NULL;
87f6eaff 3382 IOCB_t *entry = NULL;
dea3101e
JB
3383 struct lpfc_iocbq *cmdiocbq = NULL;
3384 struct lpfc_iocbq rspiocbq;
dea3101e
JB
3385 uint32_t status;
3386 uint32_t portRspPut, portRspMax;
3387 int rc = 1;
3388 lpfc_iocb_type type;
3389 unsigned long iflag;
3390 uint32_t rsp_cmpl = 0;
dea3101e 3391
2e0fef85 3392 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3393 pring->stats.iocb_event++;
3394
dea3101e
JB
3395 /*
3396 * The next available response entry should never exceed the maximum
3397 * entries. If it does, treat it as an adapter hardware error.
3398 */
7e56aa25 3399 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3400 portRspPut = le32_to_cpu(pgp->rspPutInx);
3401 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 3402 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 3403 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3404 return 1;
3405 }
45ed1190
JS
3406 if (phba->fcp_ring_in_use) {
3407 spin_unlock_irqrestore(&phba->hbalock, iflag);
3408 return 1;
3409 } else
3410 phba->fcp_ring_in_use = 1;
dea3101e
JB
3411
3412 rmb();
7e56aa25 3413 while (pring->sli.sli3.rspidx != portRspPut) {
87f6eaff
JSEC
3414 /*
3415 * Fetch an entry off the ring and copy it into a local data
3416 * structure. The copy involves a byte-swap since the
3417 * network byte order and pci byte orders are different.
3418 */
ed957684 3419 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 3420 phba->last_completion_time = jiffies;
875fbdfe 3421
7e56aa25
JS
3422 if (++pring->sli.sli3.rspidx >= portRspMax)
3423 pring->sli.sli3.rspidx = 0;
875fbdfe 3424
87f6eaff
JSEC
3425 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
3426 (uint32_t *) &rspiocbq.iocb,
ed957684 3427 phba->iocb_rsp_size);
a4bc3379 3428 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC
3429 irsp = &rspiocbq.iocb;
3430
dea3101e
JB
3431 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
3432 pring->stats.iocb_rsp++;
3433 rsp_cmpl++;
3434
3435 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS
3436 /*
3437 * If resource errors reported from HBA, reduce
3438 * queuedepths of the SCSI device.
3439 */
3440 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3441 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3442 IOERR_NO_RESOURCES)) {
92d7f7b0 3443 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3444 phba->lpfc_rampdown_queue_depth(phba);
92d7f7b0
JS
3445 spin_lock_irqsave(&phba->hbalock, iflag);
3446 }
3447
dea3101e
JB
3448 /* Rsp ring <ringno> error: IOCB */
3449 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3450 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 3451 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 3452 pring->ringno,
92d7f7b0
JS
3453 irsp->un.ulpWord[0],
3454 irsp->un.ulpWord[1],
3455 irsp->un.ulpWord[2],
3456 irsp->un.ulpWord[3],
3457 irsp->un.ulpWord[4],
3458 irsp->un.ulpWord[5],
d7c255b2
JS
3459 *(uint32_t *)&irsp->un1,
3460 *((uint32_t *)&irsp->un1 + 1));
dea3101e
JB
3461 }
3462
3463 switch (type) {
3464 case LPFC_ABORT_IOCB:
3465 case LPFC_SOL_IOCB:
3466 /*
3467 * Idle exchange closed via ABTS from port. No iocb
3468 * resources need to be recovered.
3469 */
3470 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 3471 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3472 "0333 IOCB cmd 0x%x"
dca9479b 3473 " processed. Skipping"
92d7f7b0 3474 " completion\n",
dca9479b 3475 irsp->ulpCommand);
dea3101e
JB
3476 break;
3477 }
3478
e2a8be56 3479 spin_unlock_irqrestore(&phba->hbalock, iflag);
604a3e30
JB
3480 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
3481 &rspiocbq);
e2a8be56 3482 spin_lock_irqsave(&phba->hbalock, iflag);
0f65ff68
JS
3483 if (unlikely(!cmdiocbq))
3484 break;
3485 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED)
3486 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3487 if (cmdiocbq->iocb_cmpl) {
3488 spin_unlock_irqrestore(&phba->hbalock, iflag);
3489 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
3490 &rspiocbq);
3491 spin_lock_irqsave(&phba->hbalock, iflag);
3492 }
dea3101e 3493 break;
a4bc3379 3494 case LPFC_UNSOL_IOCB:
2e0fef85 3495 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 3496 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 3497 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 3498 break;
dea3101e
JB
3499 default:
3500 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3501 char adaptermsg[LPFC_MAX_ADPTMSG];
3502 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3503 memcpy(&adaptermsg[0], (uint8_t *) irsp,
3504 MAX_MSG_DATA);
898eb71c
JP
3505 dev_warn(&((phba->pcidev)->dev),
3506 "lpfc%d: %s\n",
dea3101e
JB
3507 phba->brd_no, adaptermsg);
3508 } else {
3509 /* Unknown IOCB command */
3510 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3511 "0334 Unknown IOCB command "
92d7f7b0 3512 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 3513 type, irsp->ulpCommand,
92d7f7b0
JS
3514 irsp->ulpStatus,
3515 irsp->ulpIoTag,
3516 irsp->ulpContext);
dea3101e
JB
3517 }
3518 break;
3519 }
3520
3521 /*
3522 * The response IOCB has been processed. Update the ring
3523 * pointer in SLIM. If the port response put pointer has not
3524 * been updated, sync the pgp->rspPutInx and fetch the new port
3525 * response put pointer.
3526 */
7e56aa25
JS
3527 writel(pring->sli.sli3.rspidx,
3528 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3529
7e56aa25 3530 if (pring->sli.sli3.rspidx == portRspPut)
dea3101e
JB
3531 portRspPut = le32_to_cpu(pgp->rspPutInx);
3532 }
3533
3534 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
3535 pring->stats.iocb_rsp_full++;
3536 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3537 writel(status, phba->CAregaddr);
3538 readl(phba->CAregaddr);
3539 }
3540 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3541 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3542 pring->stats.iocb_cmd_empty++;
3543
3544 /* Force update of the local copy of cmdGetInx */
7e56aa25 3545 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3546 lpfc_sli_resume_iocb(phba, pring);
3547
3548 if ((pring->lpfc_sli_cmd_available))
3549 (pring->lpfc_sli_cmd_available) (phba, pring);
3550
3551 }
3552
45ed1190 3553 phba->fcp_ring_in_use = 0;
2e0fef85 3554 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3555 return rc;
3556}
3557
e59058c4 3558/**
3772a991
JS
3559 * lpfc_sli_sp_handle_rspiocb - Handle slow-path response iocb
3560 * @phba: Pointer to HBA context object.
3561 * @pring: Pointer to driver SLI ring object.
3562 * @rspiocbp: Pointer to driver response IOCB object.
3563 *
3564 * This function is called from the worker thread when there is a slow-path
3565 * response IOCB to process. This function chains all the response iocbs until
3566 * seeing the iocb with the LE bit set. The function will call
3567 * lpfc_sli_process_sol_iocb function if the response iocb indicates a
3568 * completion of a command iocb. The function will call the
3569 * lpfc_sli_process_unsol_iocb function if this is an unsolicited iocb.
3570 * The function frees the resources or calls the completion handler if this
3571 * iocb is an abort completion. The function returns NULL when the response
3572 * iocb has the LE bit set and all the chained iocbs are processed, otherwise
3573 * this function shall chain the iocb on to the iocb_continueq and return the
3574 * response iocb passed in.
3575 **/
3576static struct lpfc_iocbq *
3577lpfc_sli_sp_handle_rspiocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3578 struct lpfc_iocbq *rspiocbp)
3579{
3580 struct lpfc_iocbq *saveq;
3581 struct lpfc_iocbq *cmdiocbp;
3582 struct lpfc_iocbq *next_iocb;
3583 IOCB_t *irsp = NULL;
3584 uint32_t free_saveq;
3585 uint8_t iocb_cmd_type;
3586 lpfc_iocb_type type;
3587 unsigned long iflag;
3588 int rc;
3589
3590 spin_lock_irqsave(&phba->hbalock, iflag);
3591 /* First add the response iocb to the countinueq list */
3592 list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
3593 pring->iocb_continueq_cnt++;
3594
70f23fd6 3595 /* Now, determine whether the list is completed for processing */
3772a991
JS
3596 irsp = &rspiocbp->iocb;
3597 if (irsp->ulpLe) {
3598 /*
3599 * By default, the driver expects to free all resources
3600 * associated with this iocb completion.
3601 */
3602 free_saveq = 1;
3603 saveq = list_get_first(&pring->iocb_continueq,
3604 struct lpfc_iocbq, list);
3605 irsp = &(saveq->iocb);
3606 list_del_init(&pring->iocb_continueq);
3607 pring->iocb_continueq_cnt = 0;
3608
3609 pring->stats.iocb_rsp++;
3610
3611 /*
3612 * If resource errors reported from HBA, reduce
3613 * queuedepths of the SCSI device.
3614 */
3615 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3616 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3617 IOERR_NO_RESOURCES)) {
3772a991
JS
3618 spin_unlock_irqrestore(&phba->hbalock, iflag);
3619 phba->lpfc_rampdown_queue_depth(phba);
3620 spin_lock_irqsave(&phba->hbalock, iflag);
3621 }
3622
3623 if (irsp->ulpStatus) {
3624 /* Rsp ring <ringno> error: IOCB */
3625 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
3626 "0328 Rsp Ring %d error: "
3627 "IOCB Data: "
3628 "x%x x%x x%x x%x "
3629 "x%x x%x x%x x%x "
3630 "x%x x%x x%x x%x "
3631 "x%x x%x x%x x%x\n",
3632 pring->ringno,
3633 irsp->un.ulpWord[0],
3634 irsp->un.ulpWord[1],
3635 irsp->un.ulpWord[2],
3636 irsp->un.ulpWord[3],
3637 irsp->un.ulpWord[4],
3638 irsp->un.ulpWord[5],
3639 *(((uint32_t *) irsp) + 6),
3640 *(((uint32_t *) irsp) + 7),
3641 *(((uint32_t *) irsp) + 8),
3642 *(((uint32_t *) irsp) + 9),
3643 *(((uint32_t *) irsp) + 10),
3644 *(((uint32_t *) irsp) + 11),
3645 *(((uint32_t *) irsp) + 12),
3646 *(((uint32_t *) irsp) + 13),
3647 *(((uint32_t *) irsp) + 14),
3648 *(((uint32_t *) irsp) + 15));
3649 }
3650
3651 /*
3652 * Fetch the IOCB command type and call the correct completion
3653 * routine. Solicited and Unsolicited IOCBs on the ELS ring
3654 * get freed back to the lpfc_iocb_list by the discovery
3655 * kernel thread.
3656 */
3657 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
3658 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
3659 switch (type) {
3660 case LPFC_SOL_IOCB:
3661 spin_unlock_irqrestore(&phba->hbalock, iflag);
3662 rc = lpfc_sli_process_sol_iocb(phba, pring, saveq);
3663 spin_lock_irqsave(&phba->hbalock, iflag);
3664 break;
3665
3666 case LPFC_UNSOL_IOCB:
3667 spin_unlock_irqrestore(&phba->hbalock, iflag);
3668 rc = lpfc_sli_process_unsol_iocb(phba, pring, saveq);
3669 spin_lock_irqsave(&phba->hbalock, iflag);
3670 if (!rc)
3671 free_saveq = 0;
3672 break;
3673
3674 case LPFC_ABORT_IOCB:
3675 cmdiocbp = NULL;
e2a8be56
JS
3676 if (irsp->ulpCommand != CMD_XRI_ABORTED_CX) {
3677 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991
JS
3678 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring,
3679 saveq);
e2a8be56
JS
3680 spin_lock_irqsave(&phba->hbalock, iflag);
3681 }
3772a991
JS
3682 if (cmdiocbp) {
3683 /* Call the specified completion routine */
3684 if (cmdiocbp->iocb_cmpl) {
3685 spin_unlock_irqrestore(&phba->hbalock,
3686 iflag);
3687 (cmdiocbp->iocb_cmpl)(phba, cmdiocbp,
3688 saveq);
3689 spin_lock_irqsave(&phba->hbalock,
3690 iflag);
3691 } else
3692 __lpfc_sli_release_iocbq(phba,
3693 cmdiocbp);
3694 }
3695 break;
3696
3697 case LPFC_UNKNOWN_IOCB:
3698 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3699 char adaptermsg[LPFC_MAX_ADPTMSG];
3700 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3701 memcpy(&adaptermsg[0], (uint8_t *)irsp,
3702 MAX_MSG_DATA);
3703 dev_warn(&((phba->pcidev)->dev),
3704 "lpfc%d: %s\n",
3705 phba->brd_no, adaptermsg);
3706 } else {
3707 /* Unknown IOCB command */
3708 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3709 "0335 Unknown IOCB "
3710 "command Data: x%x "
3711 "x%x x%x x%x\n",
3712 irsp->ulpCommand,
3713 irsp->ulpStatus,
3714 irsp->ulpIoTag,
3715 irsp->ulpContext);
3716 }
3717 break;
3718 }
3719
3720 if (free_saveq) {
3721 list_for_each_entry_safe(rspiocbp, next_iocb,
3722 &saveq->list, list) {
61f35bff 3723 list_del_init(&rspiocbp->list);
3772a991
JS
3724 __lpfc_sli_release_iocbq(phba, rspiocbp);
3725 }
3726 __lpfc_sli_release_iocbq(phba, saveq);
3727 }
3728 rspiocbp = NULL;
3729 }
3730 spin_unlock_irqrestore(&phba->hbalock, iflag);
3731 return rspiocbp;
3732}
3733
3734/**
3735 * lpfc_sli_handle_slow_ring_event - Wrapper func for handling slow-path iocbs
e59058c4
JS
3736 * @phba: Pointer to HBA context object.
3737 * @pring: Pointer to driver SLI ring object.
3738 * @mask: Host attention register mask for this ring.
3739 *
3772a991
JS
3740 * This routine wraps the actual slow_ring event process routine from the
3741 * API jump table function pointer from the lpfc_hba struct.
e59058c4 3742 **/
3772a991 3743void
2e0fef85
JS
3744lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
3745 struct lpfc_sli_ring *pring, uint32_t mask)
3772a991
JS
3746{
3747 phba->lpfc_sli_handle_slow_ring_event(phba, pring, mask);
3748}
3749
3750/**
3751 * lpfc_sli_handle_slow_ring_event_s3 - Handle SLI3 ring event for non-FCP rings
3752 * @phba: Pointer to HBA context object.
3753 * @pring: Pointer to driver SLI ring object.
3754 * @mask: Host attention register mask for this ring.
3755 *
3756 * This function is called from the worker thread when there is a ring event
3757 * for non-fcp rings. The caller does not hold any lock. The function will
3758 * remove each response iocb in the response ring and calls the handle
3759 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3760 **/
3761static void
3762lpfc_sli_handle_slow_ring_event_s3(struct lpfc_hba *phba,
3763 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3764{
34b02dcd 3765 struct lpfc_pgp *pgp;
dea3101e
JB
3766 IOCB_t *entry;
3767 IOCB_t *irsp = NULL;
3768 struct lpfc_iocbq *rspiocbp = NULL;
dea3101e 3769 uint32_t portRspPut, portRspMax;
dea3101e 3770 unsigned long iflag;
3772a991 3771 uint32_t status;
dea3101e 3772
34b02dcd 3773 pgp = &phba->port_gp[pring->ringno];
2e0fef85 3774 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3775 pring->stats.iocb_event++;
3776
dea3101e
JB
3777 /*
3778 * The next available response entry should never exceed the maximum
3779 * entries. If it does, treat it as an adapter hardware error.
3780 */
7e56aa25 3781 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3782 portRspPut = le32_to_cpu(pgp->rspPutInx);
3783 if (portRspPut >= portRspMax) {
3784 /*
025dfdaf 3785 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
dea3101e
JB
3786 * rsp ring <portRspMax>
3787 */
ed957684 3788 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3789 "0303 Ring %d handler: portRspPut %d "
025dfdaf 3790 "is bigger than rsp ring %d\n",
e8b62011 3791 pring->ringno, portRspPut, portRspMax);
dea3101e 3792
2e0fef85
JS
3793 phba->link_state = LPFC_HBA_ERROR;
3794 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3795
3796 phba->work_hs = HS_FFER3;
3797 lpfc_handle_eratt(phba);
3798
3772a991 3799 return;
dea3101e
JB
3800 }
3801
3802 rmb();
7e56aa25 3803 while (pring->sli.sli3.rspidx != portRspPut) {
dea3101e
JB
3804 /*
3805 * Build a completion list and call the appropriate handler.
3806 * The process is to get the next available response iocb, get
3807 * a free iocb from the list, copy the response data into the
3808 * free iocb, insert to the continuation list, and update the
3809 * next response index to slim. This process makes response
3810 * iocb's in the ring available to DMA as fast as possible but
3811 * pays a penalty for a copy operation. Since the iocb is
3812 * only 32 bytes, this penalty is considered small relative to
3813 * the PCI reads for register values and a slim write. When
3814 * the ulpLe field is set, the entire Command has been
3815 * received.
3816 */
ed957684
JS
3817 entry = lpfc_resp_iocb(phba, pring);
3818
858c9f6c 3819 phba->last_completion_time = jiffies;
2e0fef85 3820 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
3821 if (rspiocbp == NULL) {
3822 printk(KERN_ERR "%s: out of buffers! Failing "
cadbd4a5 3823 "completion.\n", __func__);
dea3101e
JB
3824 break;
3825 }
3826
ed957684
JS
3827 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
3828 phba->iocb_rsp_size);
dea3101e
JB
3829 irsp = &rspiocbp->iocb;
3830
7e56aa25
JS
3831 if (++pring->sli.sli3.rspidx >= portRspMax)
3832 pring->sli.sli3.rspidx = 0;
dea3101e 3833
a58cbd52
JS
3834 if (pring->ringno == LPFC_ELS_RING) {
3835 lpfc_debugfs_slow_ring_trc(phba,
3836 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
3837 *(((uint32_t *) irsp) + 4),
3838 *(((uint32_t *) irsp) + 6),
3839 *(((uint32_t *) irsp) + 7));
3840 }
3841
7e56aa25
JS
3842 writel(pring->sli.sli3.rspidx,
3843 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3844
3772a991
JS
3845 spin_unlock_irqrestore(&phba->hbalock, iflag);
3846 /* Handle the response IOCB */
3847 rspiocbp = lpfc_sli_sp_handle_rspiocb(phba, pring, rspiocbp);
3848 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3849
3850 /*
3851 * If the port response put pointer has not been updated, sync
3852 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
3853 * response put pointer.
3854 */
7e56aa25 3855 if (pring->sli.sli3.rspidx == portRspPut) {
dea3101e
JB
3856 portRspPut = le32_to_cpu(pgp->rspPutInx);
3857 }
7e56aa25 3858 } /* while (pring->sli.sli3.rspidx != portRspPut) */
dea3101e 3859
92d7f7b0 3860 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB
3861 /* At least one response entry has been freed */
3862 pring->stats.iocb_rsp_full++;
3863 /* SET RxRE_RSP in Chip Att register */
3864 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3865 writel(status, phba->CAregaddr);
3866 readl(phba->CAregaddr); /* flush */
3867 }
3868 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3869 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3870 pring->stats.iocb_cmd_empty++;
3871
3872 /* Force update of the local copy of cmdGetInx */
7e56aa25 3873 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3874 lpfc_sli_resume_iocb(phba, pring);
3875
3876 if ((pring->lpfc_sli_cmd_available))
3877 (pring->lpfc_sli_cmd_available) (phba, pring);
3878
3879 }
3880
2e0fef85 3881 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3882 return;
dea3101e
JB
3883}
3884
4f774513
JS
3885/**
3886 * lpfc_sli_handle_slow_ring_event_s4 - Handle SLI4 slow-path els events
3887 * @phba: Pointer to HBA context object.
3888 * @pring: Pointer to driver SLI ring object.
3889 * @mask: Host attention register mask for this ring.
3890 *
3891 * This function is called from the worker thread when there is a pending
3892 * ELS response iocb on the driver internal slow-path response iocb worker
3893 * queue. The caller does not hold any lock. The function will remove each
3894 * response iocb from the response worker queue and calls the handle
3895 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3896 **/
3897static void
3898lpfc_sli_handle_slow_ring_event_s4(struct lpfc_hba *phba,
3899 struct lpfc_sli_ring *pring, uint32_t mask)
3900{
3901 struct lpfc_iocbq *irspiocbq;
4d9ab994
JS
3902 struct hbq_dmabuf *dmabuf;
3903 struct lpfc_cq_event *cq_event;
4f774513 3904 unsigned long iflag;
0ef01a2d 3905 int count = 0;
4f774513 3906
45ed1190
JS
3907 spin_lock_irqsave(&phba->hbalock, iflag);
3908 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
3909 spin_unlock_irqrestore(&phba->hbalock, iflag);
3910 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
4f774513
JS
3911 /* Get the response iocb from the head of work queue */
3912 spin_lock_irqsave(&phba->hbalock, iflag);
45ed1190 3913 list_remove_head(&phba->sli4_hba.sp_queue_event,
4d9ab994 3914 cq_event, struct lpfc_cq_event, list);
4f774513 3915 spin_unlock_irqrestore(&phba->hbalock, iflag);
4d9ab994
JS
3916
3917 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
3918 case CQE_CODE_COMPL_WQE:
3919 irspiocbq = container_of(cq_event, struct lpfc_iocbq,
3920 cq_event);
45ed1190
JS
3921 /* Translate ELS WCQE to response IOCBQ */
3922 irspiocbq = lpfc_sli4_els_wcqe_to_rspiocbq(phba,
3923 irspiocbq);
3924 if (irspiocbq)
3925 lpfc_sli_sp_handle_rspiocb(phba, pring,
3926 irspiocbq);
0ef01a2d 3927 count++;
4d9ab994
JS
3928 break;
3929 case CQE_CODE_RECEIVE:
7851fe2c 3930 case CQE_CODE_RECEIVE_V1:
4d9ab994
JS
3931 dmabuf = container_of(cq_event, struct hbq_dmabuf,
3932 cq_event);
3933 lpfc_sli4_handle_received_buffer(phba, dmabuf);
0ef01a2d 3934 count++;
4d9ab994
JS
3935 break;
3936 default:
3937 break;
3938 }
0ef01a2d
JS
3939
3940 /* Limit the number of events to 64 to avoid soft lockups */
3941 if (count == 64)
3942 break;
4f774513
JS
3943 }
3944}
3945
e59058c4 3946/**
3621a710 3947 * lpfc_sli_abort_iocb_ring - Abort all iocbs in the ring
e59058c4
JS
3948 * @phba: Pointer to HBA context object.
3949 * @pring: Pointer to driver SLI ring object.
3950 *
3951 * This function aborts all iocbs in the given ring and frees all the iocb
3952 * objects in txq. This function issues an abort iocb for all the iocb commands
3953 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3954 * the return of this function. The caller is not required to hold any locks.
3955 **/
2e0fef85 3956void
dea3101e
JB
3957lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
3958{
2534ba75 3959 LIST_HEAD(completions);
dea3101e 3960 struct lpfc_iocbq *iocb, *next_iocb;
dea3101e 3961
92d7f7b0
JS
3962 if (pring->ringno == LPFC_ELS_RING) {
3963 lpfc_fabric_abort_hba(phba);
3964 }
3965
dea3101e
JB
3966 /* Error everything on txq and txcmplq
3967 * First do the txq.
3968 */
db55fba8
JS
3969 if (phba->sli_rev >= LPFC_SLI_REV4) {
3970 spin_lock_irq(&pring->ring_lock);
3971 list_splice_init(&pring->txq, &completions);
3972 pring->txq_cnt = 0;
3973 spin_unlock_irq(&pring->ring_lock);
dea3101e 3974
db55fba8
JS
3975 spin_lock_irq(&phba->hbalock);
3976 /* Next issue ABTS for everything on the txcmplq */
3977 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3978 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3979 spin_unlock_irq(&phba->hbalock);
3980 } else {
3981 spin_lock_irq(&phba->hbalock);
3982 list_splice_init(&pring->txq, &completions);
3983 pring->txq_cnt = 0;
dea3101e 3984
db55fba8
JS
3985 /* Next issue ABTS for everything on the txcmplq */
3986 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3987 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3988 spin_unlock_irq(&phba->hbalock);
3989 }
dea3101e 3990
a257bf90
JS
3991 /* Cancel all the IOCBs from the completions list */
3992 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
3993 IOERR_SLI_ABORTED);
dea3101e
JB
3994}
3995
db55fba8
JS
3996/**
3997 * lpfc_sli_abort_fcp_rings - Abort all iocbs in all FCP rings
3998 * @phba: Pointer to HBA context object.
3999 * @pring: Pointer to driver SLI ring object.
4000 *
4001 * This function aborts all iocbs in FCP rings and frees all the iocb
4002 * objects in txq. This function issues an abort iocb for all the iocb commands
4003 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
4004 * the return of this function. The caller is not required to hold any locks.
4005 **/
4006void
4007lpfc_sli_abort_fcp_rings(struct lpfc_hba *phba)
4008{
4009 struct lpfc_sli *psli = &phba->sli;
4010 struct lpfc_sli_ring *pring;
4011 uint32_t i;
4012
4013 /* Look on all the FCP Rings for the iotag */
4014 if (phba->sli_rev >= LPFC_SLI_REV4) {
cdb42bec 4015 for (i = 0; i < phba->cfg_hdw_queue; i++) {
c00f62e6 4016 pring = phba->sli4_hba.hdwq[i].io_wq->pring;
db55fba8
JS
4017 lpfc_sli_abort_iocb_ring(phba, pring);
4018 }
4019 } else {
895427bd 4020 pring = &psli->sli3_ring[LPFC_FCP_RING];
db55fba8
JS
4021 lpfc_sli_abort_iocb_ring(phba, pring);
4022 }
4023}
4024
a8e497d5 4025/**
c00f62e6 4026 * lpfc_sli_flush_io_rings - flush all iocbs in the IO ring
a8e497d5
JS
4027 * @phba: Pointer to HBA context object.
4028 *
c00f62e6 4029 * This function flushes all iocbs in the IO ring and frees all the iocb
a8e497d5
JS
4030 * objects in txq and txcmplq. This function will not issue abort iocbs
4031 * for all the iocb commands in txcmplq, they will just be returned with
4032 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
4033 * slot has been permanently disabled.
4034 **/
4035void
c00f62e6 4036lpfc_sli_flush_io_rings(struct lpfc_hba *phba)
a8e497d5
JS
4037{
4038 LIST_HEAD(txq);
4039 LIST_HEAD(txcmplq);
a8e497d5
JS
4040 struct lpfc_sli *psli = &phba->sli;
4041 struct lpfc_sli_ring *pring;
db55fba8 4042 uint32_t i;
c1dd9111 4043 struct lpfc_iocbq *piocb, *next_iocb;
a8e497d5
JS
4044
4045 spin_lock_irq(&phba->hbalock);
4f2e66c6 4046 /* Indicate the I/O queues are flushed */
c00f62e6 4047 phba->hba_flag |= HBA_IOQ_FLUSH;
a8e497d5
JS
4048 spin_unlock_irq(&phba->hbalock);
4049
db55fba8
JS
4050 /* Look on all the FCP Rings for the iotag */
4051 if (phba->sli_rev >= LPFC_SLI_REV4) {
cdb42bec 4052 for (i = 0; i < phba->cfg_hdw_queue; i++) {
c00f62e6 4053 pring = phba->sli4_hba.hdwq[i].io_wq->pring;
db55fba8
JS
4054
4055 spin_lock_irq(&pring->ring_lock);
4056 /* Retrieve everything on txq */
4057 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4058 list_for_each_entry_safe(piocb, next_iocb,
4059 &pring->txcmplq, list)
4060 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4061 /* Retrieve everything on the txcmplq */
4062 list_splice_init(&pring->txcmplq, &txcmplq);
4063 pring->txq_cnt = 0;
4064 pring->txcmplq_cnt = 0;
4065 spin_unlock_irq(&pring->ring_lock);
4066
4067 /* Flush the txq */
4068 lpfc_sli_cancel_iocbs(phba, &txq,
4069 IOSTAT_LOCAL_REJECT,
4070 IOERR_SLI_DOWN);
4071 /* Flush the txcmpq */
4072 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4073 IOSTAT_LOCAL_REJECT,
4074 IOERR_SLI_DOWN);
4075 }
4076 } else {
895427bd 4077 pring = &psli->sli3_ring[LPFC_FCP_RING];
a8e497d5 4078
db55fba8
JS
4079 spin_lock_irq(&phba->hbalock);
4080 /* Retrieve everything on txq */
4081 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4082 list_for_each_entry_safe(piocb, next_iocb,
4083 &pring->txcmplq, list)
4084 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4085 /* Retrieve everything on the txcmplq */
4086 list_splice_init(&pring->txcmplq, &txcmplq);
4087 pring->txq_cnt = 0;
4088 pring->txcmplq_cnt = 0;
4089 spin_unlock_irq(&phba->hbalock);
4090
4091 /* Flush the txq */
4092 lpfc_sli_cancel_iocbs(phba, &txq, IOSTAT_LOCAL_REJECT,
4093 IOERR_SLI_DOWN);
4094 /* Flush the txcmpq */
4095 lpfc_sli_cancel_iocbs(phba, &txcmplq, IOSTAT_LOCAL_REJECT,
4096 IOERR_SLI_DOWN);
4097 }
a8e497d5
JS
4098}
4099
e59058c4 4100/**
3772a991 4101 * lpfc_sli_brdready_s3 - Check for sli3 host ready status
e59058c4
JS
4102 * @phba: Pointer to HBA context object.
4103 * @mask: Bit mask to be checked.
4104 *
4105 * This function reads the host status register and compares
4106 * with the provided bit mask to check if HBA completed
4107 * the restart. This function will wait in a loop for the
4108 * HBA to complete restart. If the HBA does not restart within
4109 * 15 iterations, the function will reset the HBA again. The
4110 * function returns 1 when HBA fail to restart otherwise returns
4111 * zero.
4112 **/
3772a991
JS
4113static int
4114lpfc_sli_brdready_s3(struct lpfc_hba *phba, uint32_t mask)
dea3101e 4115{
41415862
JW
4116 uint32_t status;
4117 int i = 0;
4118 int retval = 0;
dea3101e 4119
41415862 4120 /* Read the HBA Host Status Register */
9940b97b
JS
4121 if (lpfc_readl(phba->HSregaddr, &status))
4122 return 1;
dea3101e 4123
41415862
JW
4124 /*
4125 * Check status register every 100ms for 5 retries, then every
4126 * 500ms for 5, then every 2.5 sec for 5, then reset board and
4127 * every 2.5 sec for 4.
4128 * Break our of the loop if errors occurred during init.
4129 */
4130 while (((status & mask) != mask) &&
4131 !(status & HS_FFERM) &&
4132 i++ < 20) {
dea3101e 4133
41415862
JW
4134 if (i <= 5)
4135 msleep(10);
4136 else if (i <= 10)
4137 msleep(500);
4138 else
4139 msleep(2500);
dea3101e 4140
41415862 4141 if (i == 15) {
2e0fef85 4142 /* Do post */
92d7f7b0 4143 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW
4144 lpfc_sli_brdrestart(phba);
4145 }
4146 /* Read the HBA Host Status Register */
9940b97b
JS
4147 if (lpfc_readl(phba->HSregaddr, &status)) {
4148 retval = 1;
4149 break;
4150 }
41415862 4151 }
dea3101e 4152
41415862
JW
4153 /* Check to see if any errors occurred during init */
4154 if ((status & HS_FFERM) || (i >= 20)) {
e40a02c1
JS
4155 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4156 "2751 Adapter failed to restart, "
4157 "status reg x%x, FW Data: A8 x%x AC x%x\n",
4158 status,
4159 readl(phba->MBslimaddr + 0xa8),
4160 readl(phba->MBslimaddr + 0xac));
2e0fef85 4161 phba->link_state = LPFC_HBA_ERROR;
41415862 4162 retval = 1;
dea3101e 4163 }
dea3101e 4164
41415862
JW
4165 return retval;
4166}
dea3101e 4167
da0436e9
JS
4168/**
4169 * lpfc_sli_brdready_s4 - Check for sli4 host ready status
4170 * @phba: Pointer to HBA context object.
4171 * @mask: Bit mask to be checked.
4172 *
4173 * This function checks the host status register to check if HBA is
4174 * ready. This function will wait in a loop for the HBA to be ready
4175 * If the HBA is not ready , the function will will reset the HBA PCI
4176 * function again. The function returns 1 when HBA fail to be ready
4177 * otherwise returns zero.
4178 **/
4179static int
4180lpfc_sli_brdready_s4(struct lpfc_hba *phba, uint32_t mask)
4181{
4182 uint32_t status;
4183 int retval = 0;
4184
4185 /* Read the HBA Host Status Register */
4186 status = lpfc_sli4_post_status_check(phba);
4187
4188 if (status) {
4189 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
4190 lpfc_sli_brdrestart(phba);
4191 status = lpfc_sli4_post_status_check(phba);
4192 }
4193
4194 /* Check to see if any errors occurred during init */
4195 if (status) {
4196 phba->link_state = LPFC_HBA_ERROR;
4197 retval = 1;
4198 } else
4199 phba->sli4_hba.intr_enable = 0;
4200
4201 return retval;
4202}
4203
4204/**
4205 * lpfc_sli_brdready - Wrapper func for checking the hba readyness
4206 * @phba: Pointer to HBA context object.
4207 * @mask: Bit mask to be checked.
4208 *
4209 * This routine wraps the actual SLI3 or SLI4 hba readyness check routine
4210 * from the API jump table function pointer from the lpfc_hba struct.
4211 **/
4212int
4213lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
4214{
4215 return phba->lpfc_sli_brdready(phba, mask);
4216}
4217
9290831f
JS
4218#define BARRIER_TEST_PATTERN (0xdeadbeef)
4219
e59058c4 4220/**
3621a710 4221 * lpfc_reset_barrier - Make HBA ready for HBA reset
e59058c4
JS
4222 * @phba: Pointer to HBA context object.
4223 *
1b51197d
JS
4224 * This function is called before resetting an HBA. This function is called
4225 * with hbalock held and requests HBA to quiesce DMAs before a reset.
e59058c4 4226 **/
2e0fef85 4227void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 4228{
65a29c16
JS
4229 uint32_t __iomem *resp_buf;
4230 uint32_t __iomem *mbox_buf;
9290831f 4231 volatile uint32_t mbox;
9940b97b 4232 uint32_t hc_copy, ha_copy, resp_data;
9290831f
JS
4233 int i;
4234 uint8_t hdrtype;
4235
1c2ba475
JT
4236 lockdep_assert_held(&phba->hbalock);
4237
9290831f
JS
4238 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
4239 if (hdrtype != 0x80 ||
4240 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
4241 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
4242 return;
4243
4244 /*
4245 * Tell the other part of the chip to suspend temporarily all
4246 * its DMA activity.
4247 */
65a29c16 4248 resp_buf = phba->MBslimaddr;
9290831f
JS
4249
4250 /* Disable the error attention */
9940b97b
JS
4251 if (lpfc_readl(phba->HCregaddr, &hc_copy))
4252 return;
9290831f
JS
4253 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
4254 readl(phba->HCregaddr); /* flush */
2e0fef85 4255 phba->link_flag |= LS_IGNORE_ERATT;
9290831f 4256
9940b97b
JS
4257 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4258 return;
4259 if (ha_copy & HA_ERATT) {
9290831f
JS
4260 /* Clear Chip error bit */
4261 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4262 phba->pport->stopped = 1;
9290831f
JS
4263 }
4264
4265 mbox = 0;
4266 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
4267 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
4268
4269 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 4270 mbox_buf = phba->MBslimaddr;
9290831f
JS
4271 writel(mbox, mbox_buf);
4272
9940b97b
JS
4273 for (i = 0; i < 50; i++) {
4274 if (lpfc_readl((resp_buf + 1), &resp_data))
4275 return;
4276 if (resp_data != ~(BARRIER_TEST_PATTERN))
4277 mdelay(1);
4278 else
4279 break;
4280 }
4281 resp_data = 0;
4282 if (lpfc_readl((resp_buf + 1), &resp_data))
4283 return;
4284 if (resp_data != ~(BARRIER_TEST_PATTERN)) {
f4b4c68f 4285 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE ||
2e0fef85 4286 phba->pport->stopped)
9290831f
JS
4287 goto restore_hc;
4288 else
4289 goto clear_errat;
4290 }
4291
4292 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
9940b97b
JS
4293 resp_data = 0;
4294 for (i = 0; i < 500; i++) {
4295 if (lpfc_readl(resp_buf, &resp_data))
4296 return;
4297 if (resp_data != mbox)
4298 mdelay(1);
4299 else
4300 break;
4301 }
9290831f
JS
4302
4303clear_errat:
4304
9940b97b
JS
4305 while (++i < 500) {
4306 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4307 return;
4308 if (!(ha_copy & HA_ERATT))
4309 mdelay(1);
4310 else
4311 break;
4312 }
9290831f
JS
4313
4314 if (readl(phba->HAregaddr) & HA_ERATT) {
4315 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4316 phba->pport->stopped = 1;
9290831f
JS
4317 }
4318
4319restore_hc:
2e0fef85 4320 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS
4321 writel(hc_copy, phba->HCregaddr);
4322 readl(phba->HCregaddr); /* flush */
4323}
4324
e59058c4 4325/**
3621a710 4326 * lpfc_sli_brdkill - Issue a kill_board mailbox command
e59058c4
JS
4327 * @phba: Pointer to HBA context object.
4328 *
4329 * This function issues a kill_board mailbox command and waits for
4330 * the error attention interrupt. This function is called for stopping
4331 * the firmware processing. The caller is not required to hold any
4332 * locks. This function calls lpfc_hba_down_post function to free
4333 * any pending commands after the kill. The function will return 1 when it
4334 * fails to kill the board else will return 0.
4335 **/
41415862 4336int
2e0fef85 4337lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW
4338{
4339 struct lpfc_sli *psli;
4340 LPFC_MBOXQ_t *pmb;
4341 uint32_t status;
4342 uint32_t ha_copy;
4343 int retval;
4344 int i = 0;
dea3101e 4345
41415862 4346 psli = &phba->sli;
dea3101e 4347
41415862 4348 /* Kill HBA */
ed957684 4349 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS
4350 "0329 Kill HBA Data: x%x x%x\n",
4351 phba->pport->port_state, psli->sli_flag);
41415862 4352
98c9ea5c
JS
4353 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4354 if (!pmb)
41415862 4355 return 1;
41415862
JW
4356
4357 /* Disable the error attention */
2e0fef85 4358 spin_lock_irq(&phba->hbalock);
9940b97b
JS
4359 if (lpfc_readl(phba->HCregaddr, &status)) {
4360 spin_unlock_irq(&phba->hbalock);
4361 mempool_free(pmb, phba->mbox_mem_pool);
4362 return 1;
4363 }
41415862
JW
4364 status &= ~HC_ERINT_ENA;
4365 writel(status, phba->HCregaddr);
4366 readl(phba->HCregaddr); /* flush */
2e0fef85
JS
4367 phba->link_flag |= LS_IGNORE_ERATT;
4368 spin_unlock_irq(&phba->hbalock);
41415862
JW
4369
4370 lpfc_kill_board(phba, pmb);
4371 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
4372 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4373
4374 if (retval != MBX_SUCCESS) {
4375 if (retval != MBX_BUSY)
4376 mempool_free(pmb, phba->mbox_mem_pool);
e40a02c1
JS
4377 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4378 "2752 KILL_BOARD command failed retval %d\n",
4379 retval);
2e0fef85
JS
4380 spin_lock_irq(&phba->hbalock);
4381 phba->link_flag &= ~LS_IGNORE_ERATT;
4382 spin_unlock_irq(&phba->hbalock);
41415862
JW
4383 return 1;
4384 }
4385
f4b4c68f
JS
4386 spin_lock_irq(&phba->hbalock);
4387 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
4388 spin_unlock_irq(&phba->hbalock);
9290831f 4389
41415862
JW
4390 mempool_free(pmb, phba->mbox_mem_pool);
4391
4392 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
4393 * attention every 100ms for 3 seconds. If we don't get ERATT after
4394 * 3 seconds we still set HBA_ERROR state because the status of the
4395 * board is now undefined.
4396 */
9940b97b
JS
4397 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4398 return 1;
41415862
JW
4399 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
4400 mdelay(100);
9940b97b
JS
4401 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4402 return 1;
41415862
JW
4403 }
4404
4405 del_timer_sync(&psli->mbox_tmo);
9290831f
JS
4406 if (ha_copy & HA_ERATT) {
4407 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4408 phba->pport->stopped = 1;
9290831f 4409 }
2e0fef85 4410 spin_lock_irq(&phba->hbalock);
41415862 4411 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
04c68496 4412 psli->mbox_active = NULL;
2e0fef85
JS
4413 phba->link_flag &= ~LS_IGNORE_ERATT;
4414 spin_unlock_irq(&phba->hbalock);
41415862 4415
41415862 4416 lpfc_hba_down_post(phba);
2e0fef85 4417 phba->link_state = LPFC_HBA_ERROR;
41415862 4418
2e0fef85 4419 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB
4420}
4421
e59058c4 4422/**
3772a991 4423 * lpfc_sli_brdreset - Reset a sli-2 or sli-3 HBA
e59058c4
JS
4424 * @phba: Pointer to HBA context object.
4425 *
4426 * This function resets the HBA by writing HC_INITFF to the control
4427 * register. After the HBA resets, this function resets all the iocb ring
4428 * indices. This function disables PCI layer parity checking during
4429 * the reset.
4430 * This function returns 0 always.
4431 * The caller is not required to hold any locks.
4432 **/
41415862 4433int
2e0fef85 4434lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 4435{
41415862 4436 struct lpfc_sli *psli;
dea3101e 4437 struct lpfc_sli_ring *pring;
41415862 4438 uint16_t cfg_value;
dea3101e 4439 int i;
dea3101e 4440
41415862 4441 psli = &phba->sli;
dea3101e 4442
41415862
JW
4443 /* Reset HBA */
4444 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4445 "0325 Reset HBA Data: x%x x%x\n",
4492b739
JS
4446 (phba->pport) ? phba->pport->port_state : 0,
4447 psli->sli_flag);
dea3101e
JB
4448
4449 /* perform board reset */
4450 phba->fc_eventTag = 0;
4d9ab994 4451 phba->link_events = 0;
4492b739
JS
4452 if (phba->pport) {
4453 phba->pport->fc_myDID = 0;
4454 phba->pport->fc_prevDID = 0;
4455 }
dea3101e 4456
41415862 4457 /* Turn off parity checking and serr during the physical reset */
32a93100
JS
4458 if (pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value))
4459 return -EIO;
4460
41415862
JW
4461 pci_write_config_word(phba->pcidev, PCI_COMMAND,
4462 (cfg_value &
4463 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4464
3772a991
JS
4465 psli->sli_flag &= ~(LPFC_SLI_ACTIVE | LPFC_PROCESS_LA);
4466
41415862
JW
4467 /* Now toggle INITFF bit in the Host Control Register */
4468 writel(HC_INITFF, phba->HCregaddr);
4469 mdelay(1);
4470 readl(phba->HCregaddr); /* flush */
4471 writel(0, phba->HCregaddr);
4472 readl(phba->HCregaddr); /* flush */
4473
4474 /* Restore PCI cmd register */
4475 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB
4476
4477 /* Initialize relevant SLI info */
41415862 4478 for (i = 0; i < psli->num_rings; i++) {
895427bd 4479 pring = &psli->sli3_ring[i];
dea3101e 4480 pring->flag = 0;
7e56aa25
JS
4481 pring->sli.sli3.rspidx = 0;
4482 pring->sli.sli3.next_cmdidx = 0;
4483 pring->sli.sli3.local_getidx = 0;
4484 pring->sli.sli3.cmdidx = 0;
dea3101e
JB
4485 pring->missbufcnt = 0;
4486 }
dea3101e 4487
2e0fef85 4488 phba->link_state = LPFC_WARM_START;
41415862
JW
4489 return 0;
4490}
4491
e59058c4 4492/**
da0436e9
JS
4493 * lpfc_sli4_brdreset - Reset a sli-4 HBA
4494 * @phba: Pointer to HBA context object.
4495 *
4496 * This function resets a SLI4 HBA. This function disables PCI layer parity
4497 * checking during resets the device. The caller is not required to hold
4498 * any locks.
4499 *
8c24a4f6 4500 * This function returns 0 on success else returns negative error code.
da0436e9
JS
4501 **/
4502int
4503lpfc_sli4_brdreset(struct lpfc_hba *phba)
4504{
4505 struct lpfc_sli *psli = &phba->sli;
4506 uint16_t cfg_value;
0293635e 4507 int rc = 0;
da0436e9
JS
4508
4509 /* Reset HBA */
4510 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
0293635e
JS
4511 "0295 Reset HBA Data: x%x x%x x%x\n",
4512 phba->pport->port_state, psli->sli_flag,
4513 phba->hba_flag);
da0436e9
JS
4514
4515 /* perform board reset */
4516 phba->fc_eventTag = 0;
4d9ab994 4517 phba->link_events = 0;
da0436e9
JS
4518 phba->pport->fc_myDID = 0;
4519 phba->pport->fc_prevDID = 0;
4520
da0436e9
JS
4521 spin_lock_irq(&phba->hbalock);
4522 psli->sli_flag &= ~(LPFC_PROCESS_LA);
4523 phba->fcf.fcf_flag = 0;
da0436e9
JS
4524 spin_unlock_irq(&phba->hbalock);
4525
0293635e
JS
4526 /* SLI4 INTF 2: if FW dump is being taken skip INIT_PORT */
4527 if (phba->hba_flag & HBA_FW_DUMP_OP) {
4528 phba->hba_flag &= ~HBA_FW_DUMP_OP;
4529 return rc;
4530 }
4531
da0436e9
JS
4532 /* Now physically reset the device */
4533 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4534 "0389 Performing PCI function reset!\n");
be858b65
JS
4535
4536 /* Turn off parity checking and serr during the physical reset */
32a93100
JS
4537 if (pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value)) {
4538 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4539 "3205 PCI read Config failed\n");
4540 return -EIO;
4541 }
4542
be858b65
JS
4543 pci_write_config_word(phba->pcidev, PCI_COMMAND, (cfg_value &
4544 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4545
88318816 4546 /* Perform FCoE PCI function reset before freeing queue memory */
27b01b82 4547 rc = lpfc_pci_function_reset(phba);
da0436e9 4548
be858b65
JS
4549 /* Restore PCI cmd register */
4550 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
4551
27b01b82 4552 return rc;
da0436e9
JS
4553}
4554
4555/**
4556 * lpfc_sli_brdrestart_s3 - Restart a sli-3 hba
e59058c4
JS
4557 * @phba: Pointer to HBA context object.
4558 *
4559 * This function is called in the SLI initialization code path to
4560 * restart the HBA. The caller is not required to hold any lock.
4561 * This function writes MBX_RESTART mailbox command to the SLIM and
4562 * resets the HBA. At the end of the function, it calls lpfc_hba_down_post
4563 * function to free any pending commands. The function enables
4564 * POST only during the first initialization. The function returns zero.
4565 * The function does not guarantee completion of MBX_RESTART mailbox
4566 * command before the return of this function.
4567 **/
da0436e9
JS
4568static int
4569lpfc_sli_brdrestart_s3(struct lpfc_hba *phba)
41415862
JW
4570{
4571 MAILBOX_t *mb;
4572 struct lpfc_sli *psli;
41415862
JW
4573 volatile uint32_t word0;
4574 void __iomem *to_slim;
0d878419 4575 uint32_t hba_aer_enabled;
41415862 4576
2e0fef85 4577 spin_lock_irq(&phba->hbalock);
41415862 4578
0d878419
JS
4579 /* Take PCIe device Advanced Error Reporting (AER) state */
4580 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4581
41415862
JW
4582 psli = &phba->sli;
4583
4584 /* Restart HBA */
4585 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4586 "0337 Restart HBA Data: x%x x%x\n",
4492b739
JS
4587 (phba->pport) ? phba->pport->port_state : 0,
4588 psli->sli_flag);
41415862
JW
4589
4590 word0 = 0;
4591 mb = (MAILBOX_t *) &word0;
4592 mb->mbxCommand = MBX_RESTART;
4593 mb->mbxHc = 1;
4594
9290831f
JS
4595 lpfc_reset_barrier(phba);
4596
41415862
JW
4597 to_slim = phba->MBslimaddr;
4598 writel(*(uint32_t *) mb, to_slim);
4599 readl(to_slim); /* flush */
4600
4601 /* Only skip post after fc_ffinit is completed */
4492b739 4602 if (phba->pport && phba->pport->port_state)
41415862 4603 word0 = 1; /* This is really setting up word1 */
eaf15d5b 4604 else
41415862 4605 word0 = 0; /* This is really setting up word1 */
65a29c16 4606 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW
4607 writel(*(uint32_t *) mb, to_slim);
4608 readl(to_slim); /* flush */
dea3101e 4609
41415862 4610 lpfc_sli_brdreset(phba);
4492b739
JS
4611 if (phba->pport)
4612 phba->pport->stopped = 0;
2e0fef85 4613 phba->link_state = LPFC_INIT_START;
da0436e9 4614 phba->hba_flag = 0;
2e0fef85 4615 spin_unlock_irq(&phba->hbalock);
41415862 4616
64ba8818 4617 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4618 psli->stats_start = ktime_get_seconds();
64ba8818 4619
eaf15d5b
JS
4620 /* Give the INITFF and Post time to settle. */
4621 mdelay(100);
41415862 4622
0d878419
JS
4623 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4624 if (hba_aer_enabled)
4625 pci_disable_pcie_error_reporting(phba->pcidev);
4626
41415862 4627 lpfc_hba_down_post(phba);
dea3101e
JB
4628
4629 return 0;
4630}
4631
da0436e9
JS
4632/**
4633 * lpfc_sli_brdrestart_s4 - Restart the sli-4 hba
4634 * @phba: Pointer to HBA context object.
4635 *
4636 * This function is called in the SLI initialization code path to restart
4637 * a SLI4 HBA. The caller is not required to hold any lock.
4638 * At the end of the function, it calls lpfc_hba_down_post function to
4639 * free any pending commands.
4640 **/
4641static int
4642lpfc_sli_brdrestart_s4(struct lpfc_hba *phba)
4643{
4644 struct lpfc_sli *psli = &phba->sli;
75baf696 4645 uint32_t hba_aer_enabled;
27b01b82 4646 int rc;
da0436e9
JS
4647
4648 /* Restart HBA */
4649 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4650 "0296 Restart HBA Data: x%x x%x\n",
4651 phba->pport->port_state, psli->sli_flag);
4652
75baf696
JS
4653 /* Take PCIe device Advanced Error Reporting (AER) state */
4654 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4655
27b01b82 4656 rc = lpfc_sli4_brdreset(phba);
4fb86a6b
JS
4657 if (rc) {
4658 phba->link_state = LPFC_HBA_ERROR;
4659 goto hba_down_queue;
4660 }
da0436e9
JS
4661
4662 spin_lock_irq(&phba->hbalock);
4663 phba->pport->stopped = 0;
4664 phba->link_state = LPFC_INIT_START;
4665 phba->hba_flag = 0;
4666 spin_unlock_irq(&phba->hbalock);
4667
4668 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4669 psli->stats_start = ktime_get_seconds();
da0436e9 4670
75baf696
JS
4671 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4672 if (hba_aer_enabled)
4673 pci_disable_pcie_error_reporting(phba->pcidev);
4674
4fb86a6b 4675hba_down_queue:
da0436e9 4676 lpfc_hba_down_post(phba);
569dbe84 4677 lpfc_sli4_queue_destroy(phba);
da0436e9 4678
27b01b82 4679 return rc;
da0436e9
JS
4680}
4681
4682/**
4683 * lpfc_sli_brdrestart - Wrapper func for restarting hba
4684 * @phba: Pointer to HBA context object.
4685 *
4686 * This routine wraps the actual SLI3 or SLI4 hba restart routine from the
4687 * API jump table function pointer from the lpfc_hba struct.
4688**/
4689int
4690lpfc_sli_brdrestart(struct lpfc_hba *phba)
4691{
4692 return phba->lpfc_sli_brdrestart(phba);
4693}
4694
e59058c4 4695/**
3621a710 4696 * lpfc_sli_chipset_init - Wait for the restart of the HBA after a restart
e59058c4
JS
4697 * @phba: Pointer to HBA context object.
4698 *
4699 * This function is called after a HBA restart to wait for successful
4700 * restart of the HBA. Successful restart of the HBA is indicated by
4701 * HS_FFRDY and HS_MBRDY bits. If the HBA fails to restart even after 15
4702 * iteration, the function will restart the HBA again. The function returns
4703 * zero if HBA successfully restarted else returns negative error code.
4704 **/
4492b739 4705int
dea3101e
JB
4706lpfc_sli_chipset_init(struct lpfc_hba *phba)
4707{
4708 uint32_t status, i = 0;
4709
4710 /* Read the HBA Host Status Register */
9940b97b
JS
4711 if (lpfc_readl(phba->HSregaddr, &status))
4712 return -EIO;
dea3101e
JB
4713
4714 /* Check status register to see what current state is */
4715 i = 0;
4716 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
4717
dcf2a4e0
JS
4718 /* Check every 10ms for 10 retries, then every 100ms for 90
4719 * retries, then every 1 sec for 50 retires for a total of
4720 * ~60 seconds before reset the board again and check every
4721 * 1 sec for 50 retries. The up to 60 seconds before the
4722 * board ready is required by the Falcon FIPS zeroization
4723 * complete, and any reset the board in between shall cause
4724 * restart of zeroization, further delay the board ready.
dea3101e 4725 */
dcf2a4e0 4726 if (i++ >= 200) {
dea3101e
JB
4727 /* Adapter failed to init, timeout, status reg
4728 <status> */
ed957684 4729 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4730 "0436 Adapter failed to init, "
09372820
JS
4731 "timeout, status reg x%x, "
4732 "FW Data: A8 x%x AC x%x\n", status,
4733 readl(phba->MBslimaddr + 0xa8),
4734 readl(phba->MBslimaddr + 0xac));
2e0fef85 4735 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4736 return -ETIMEDOUT;
4737 }
4738
4739 /* Check to see if any errors occurred during init */
4740 if (status & HS_FFERM) {
4741 /* ERROR: During chipset initialization */
4742 /* Adapter failed to init, chipset, status reg
4743 <status> */
ed957684 4744 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4745 "0437 Adapter failed to init, "
09372820
JS
4746 "chipset, status reg x%x, "
4747 "FW Data: A8 x%x AC x%x\n", status,
4748 readl(phba->MBslimaddr + 0xa8),
4749 readl(phba->MBslimaddr + 0xac));
2e0fef85 4750 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4751 return -EIO;
4752 }
4753
dcf2a4e0 4754 if (i <= 10)
dea3101e 4755 msleep(10);
dcf2a4e0
JS
4756 else if (i <= 100)
4757 msleep(100);
4758 else
4759 msleep(1000);
dea3101e 4760
dcf2a4e0
JS
4761 if (i == 150) {
4762 /* Do post */
92d7f7b0 4763 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4764 lpfc_sli_brdrestart(phba);
dea3101e
JB
4765 }
4766 /* Read the HBA Host Status Register */
9940b97b
JS
4767 if (lpfc_readl(phba->HSregaddr, &status))
4768 return -EIO;
dea3101e
JB
4769 }
4770
4771 /* Check to see if any errors occurred during init */
4772 if (status & HS_FFERM) {
4773 /* ERROR: During chipset initialization */
4774 /* Adapter failed to init, chipset, status reg <status> */
ed957684 4775 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4776 "0438 Adapter failed to init, chipset, "
09372820
JS
4777 "status reg x%x, "
4778 "FW Data: A8 x%x AC x%x\n", status,
4779 readl(phba->MBslimaddr + 0xa8),
4780 readl(phba->MBslimaddr + 0xac));
2e0fef85 4781 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4782 return -EIO;
4783 }
4784
4785 /* Clear all interrupt enable conditions */
4786 writel(0, phba->HCregaddr);
4787 readl(phba->HCregaddr); /* flush */
4788
4789 /* setup host attn register */
4790 writel(0xffffffff, phba->HAregaddr);
4791 readl(phba->HAregaddr); /* flush */
4792 return 0;
4793}
4794
e59058c4 4795/**
3621a710 4796 * lpfc_sli_hbq_count - Get the number of HBQs to be configured
e59058c4
JS
4797 *
4798 * This function calculates and returns the number of HBQs required to be
4799 * configured.
4800 **/
78b2d852 4801int
ed957684
JS
4802lpfc_sli_hbq_count(void)
4803{
92d7f7b0 4804 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS
4805}
4806
e59058c4 4807/**
3621a710 4808 * lpfc_sli_hbq_entry_count - Calculate total number of hbq entries
e59058c4
JS
4809 *
4810 * This function adds the number of hbq entries in every HBQ to get
4811 * the total number of hbq entries required for the HBA and returns
4812 * the total count.
4813 **/
ed957684
JS
4814static int
4815lpfc_sli_hbq_entry_count(void)
4816{
4817 int hbq_count = lpfc_sli_hbq_count();
4818 int count = 0;
4819 int i;
4820
4821 for (i = 0; i < hbq_count; ++i)
92d7f7b0 4822 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS
4823 return count;
4824}
4825
e59058c4 4826/**
3621a710 4827 * lpfc_sli_hbq_size - Calculate memory required for all hbq entries
e59058c4
JS
4828 *
4829 * This function calculates amount of memory required for all hbq entries
4830 * to be configured and returns the total memory required.
4831 **/
dea3101e 4832int
ed957684
JS
4833lpfc_sli_hbq_size(void)
4834{
4835 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
4836}
4837
e59058c4 4838/**
3621a710 4839 * lpfc_sli_hbq_setup - configure and initialize HBQs
e59058c4
JS
4840 * @phba: Pointer to HBA context object.
4841 *
4842 * This function is called during the SLI initialization to configure
4843 * all the HBQs and post buffers to the HBQ. The caller is not
4844 * required to hold any locks. This function will return zero if successful
4845 * else it will return negative error code.
4846 **/
ed957684
JS
4847static int
4848lpfc_sli_hbq_setup(struct lpfc_hba *phba)
4849{
4850 int hbq_count = lpfc_sli_hbq_count();
4851 LPFC_MBOXQ_t *pmb;
4852 MAILBOX_t *pmbox;
4853 uint32_t hbqno;
4854 uint32_t hbq_entry_index;
ed957684 4855
92d7f7b0
JS
4856 /* Get a Mailbox buffer to setup mailbox
4857 * commands for HBA initialization
4858 */
ed957684
JS
4859 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4860
4861 if (!pmb)
4862 return -ENOMEM;
4863
04c68496 4864 pmbox = &pmb->u.mb;
ed957684
JS
4865
4866 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
4867 phba->link_state = LPFC_INIT_MBX_CMDS;
3163f725 4868 phba->hbq_in_use = 1;
ed957684
JS
4869
4870 hbq_entry_index = 0;
4871 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
4872 phba->hbqs[hbqno].next_hbqPutIdx = 0;
4873 phba->hbqs[hbqno].hbqPutIdx = 0;
4874 phba->hbqs[hbqno].local_hbqGetIdx = 0;
4875 phba->hbqs[hbqno].entry_count =
92d7f7b0 4876 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS
4877 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
4878 hbq_entry_index, pmb);
ed957684
JS
4879 hbq_entry_index += phba->hbqs[hbqno].entry_count;
4880
4881 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
4882 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
4883 mbxStatus <status>, ring <num> */
4884
4885 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 4886 LOG_SLI | LOG_VPORT,
e8b62011 4887 "1805 Adapter failed to init. "
ed957684 4888 "Data: x%x x%x x%x\n",
e8b62011 4889 pmbox->mbxCommand,
ed957684
JS
4890 pmbox->mbxStatus, hbqno);
4891
4892 phba->link_state = LPFC_HBA_ERROR;
4893 mempool_free(pmb, phba->mbox_mem_pool);
6e7288d9 4894 return -ENXIO;
ed957684
JS
4895 }
4896 }
4897 phba->hbq_count = hbq_count;
4898
ed957684
JS
4899 mempool_free(pmb, phba->mbox_mem_pool);
4900
92d7f7b0 4901 /* Initially populate or replenish the HBQs */
d7c255b2
JS
4902 for (hbqno = 0; hbqno < hbq_count; ++hbqno)
4903 lpfc_sli_hbqbuf_init_hbqs(phba, hbqno);
ed957684
JS
4904 return 0;
4905}
4906
4f774513
JS
4907/**
4908 * lpfc_sli4_rb_setup - Initialize and post RBs to HBA
4909 * @phba: Pointer to HBA context object.
4910 *
4911 * This function is called during the SLI initialization to configure
4912 * all the HBQs and post buffers to the HBQ. The caller is not
4913 * required to hold any locks. This function will return zero if successful
4914 * else it will return negative error code.
4915 **/
4916static int
4917lpfc_sli4_rb_setup(struct lpfc_hba *phba)
4918{
4919 phba->hbq_in_use = 1;
895427bd
JS
4920 phba->hbqs[LPFC_ELS_HBQ].entry_count =
4921 lpfc_hbq_defs[LPFC_ELS_HBQ]->entry_count;
4f774513 4922 phba->hbq_count = 1;
895427bd 4923 lpfc_sli_hbqbuf_init_hbqs(phba, LPFC_ELS_HBQ);
4f774513 4924 /* Initially populate or replenish the HBQs */
4f774513
JS
4925 return 0;
4926}
4927
e59058c4 4928/**
3621a710 4929 * lpfc_sli_config_port - Issue config port mailbox command
e59058c4
JS
4930 * @phba: Pointer to HBA context object.
4931 * @sli_mode: sli mode - 2/3
4932 *
183b8021 4933 * This function is called by the sli initialization code path
e59058c4
JS
4934 * to issue config_port mailbox command. This function restarts the
4935 * HBA firmware and issues a config_port mailbox command to configure
4936 * the SLI interface in the sli mode specified by sli_mode
4937 * variable. The caller is not required to hold any locks.
4938 * The function returns 0 if successful, else returns negative error
4939 * code.
4940 **/
9399627f
JS
4941int
4942lpfc_sli_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB
4943{
4944 LPFC_MBOXQ_t *pmb;
4945 uint32_t resetcount = 0, rc = 0, done = 0;
4946
4947 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4948 if (!pmb) {
2e0fef85 4949 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4950 return -ENOMEM;
4951 }
4952
ed957684 4953 phba->sli_rev = sli_mode;
dea3101e 4954 while (resetcount < 2 && !done) {
2e0fef85 4955 spin_lock_irq(&phba->hbalock);
1c067a42 4956 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 4957 spin_unlock_irq(&phba->hbalock);
92d7f7b0 4958 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4959 lpfc_sli_brdrestart(phba);
dea3101e
JB
4960 rc = lpfc_sli_chipset_init(phba);
4961 if (rc)
4962 break;
4963
2e0fef85 4964 spin_lock_irq(&phba->hbalock);
1c067a42 4965 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 4966 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
4967 resetcount++;
4968
ed957684
JS
4969 /* Call pre CONFIG_PORT mailbox command initialization. A
4970 * value of 0 means the call was successful. Any other
4971 * nonzero value is a failure, but if ERESTART is returned,
4972 * the driver may reset the HBA and try again.
4973 */
dea3101e
JB
4974 rc = lpfc_config_port_prep(phba);
4975 if (rc == -ERESTART) {
ed957684 4976 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e 4977 continue;
34b02dcd 4978 } else if (rc)
dea3101e 4979 break;
6d368e53 4980
2e0fef85 4981 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
4982 lpfc_config_port(phba, pmb);
4983 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
34b02dcd
JS
4984 phba->sli3_options &= ~(LPFC_SLI3_NPIV_ENABLED |
4985 LPFC_SLI3_HBQ_ENABLED |
4986 LPFC_SLI3_CRP_ENABLED |
bc73905a 4987 LPFC_SLI3_DSS_ENABLED);
ed957684 4988 if (rc != MBX_SUCCESS) {
dea3101e 4989 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4990 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 4991 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
04c68496 4992 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus, 0);
2e0fef85 4993 spin_lock_irq(&phba->hbalock);
04c68496 4994 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
2e0fef85
JS
4995 spin_unlock_irq(&phba->hbalock);
4996 rc = -ENXIO;
04c68496
JS
4997 } else {
4998 /* Allow asynchronous mailbox command to go through */
4999 spin_lock_irq(&phba->hbalock);
5000 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
5001 spin_unlock_irq(&phba->hbalock);
ed957684 5002 done = 1;
cb69f7de
JS
5003
5004 if ((pmb->u.mb.un.varCfgPort.casabt == 1) &&
5005 (pmb->u.mb.un.varCfgPort.gasabt == 0))
5006 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5007 "3110 Port did not grant ASABT\n");
04c68496 5008 }
dea3101e 5009 }
ed957684
JS
5010 if (!done) {
5011 rc = -EINVAL;
5012 goto do_prep_failed;
5013 }
04c68496
JS
5014 if (pmb->u.mb.un.varCfgPort.sli_mode == 3) {
5015 if (!pmb->u.mb.un.varCfgPort.cMA) {
34b02dcd
JS
5016 rc = -ENXIO;
5017 goto do_prep_failed;
5018 }
04c68496 5019 if (phba->max_vpi && pmb->u.mb.un.varCfgPort.gmv) {
34b02dcd 5020 phba->sli3_options |= LPFC_SLI3_NPIV_ENABLED;
04c68496
JS
5021 phba->max_vpi = pmb->u.mb.un.varCfgPort.max_vpi;
5022 phba->max_vports = (phba->max_vpi > phba->max_vports) ?
5023 phba->max_vpi : phba->max_vports;
5024
34b02dcd
JS
5025 } else
5026 phba->max_vpi = 0;
bc73905a
JS
5027 phba->fips_level = 0;
5028 phba->fips_spec_rev = 0;
5029 if (pmb->u.mb.un.varCfgPort.gdss) {
04c68496 5030 phba->sli3_options |= LPFC_SLI3_DSS_ENABLED;
bc73905a
JS
5031 phba->fips_level = pmb->u.mb.un.varCfgPort.fips_level;
5032 phba->fips_spec_rev = pmb->u.mb.un.varCfgPort.fips_rev;
5033 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5034 "2850 Security Crypto Active. FIPS x%d "
5035 "(Spec Rev: x%d)",
5036 phba->fips_level, phba->fips_spec_rev);
5037 }
5038 if (pmb->u.mb.un.varCfgPort.sec_err) {
5039 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5040 "2856 Config Port Security Crypto "
5041 "Error: x%x ",
5042 pmb->u.mb.un.varCfgPort.sec_err);
5043 }
04c68496 5044 if (pmb->u.mb.un.varCfgPort.gerbm)
34b02dcd 5045 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
04c68496 5046 if (pmb->u.mb.un.varCfgPort.gcrp)
34b02dcd 5047 phba->sli3_options |= LPFC_SLI3_CRP_ENABLED;
6e7288d9
JS
5048
5049 phba->hbq_get = phba->mbox->us.s3_pgp.hbq_get;
5050 phba->port_gp = phba->mbox->us.s3_pgp.port;
e2a0a9d6 5051
f44ac12f
JS
5052 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
5053 if (pmb->u.mb.un.varCfgPort.gbg == 0) {
5054 phba->cfg_enable_bg = 0;
5055 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
e2a0a9d6
JS
5056 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5057 "0443 Adapter did not grant "
5058 "BlockGuard\n");
f44ac12f 5059 }
e2a0a9d6 5060 }
34b02dcd 5061 } else {
8f34f4ce 5062 phba->hbq_get = NULL;
34b02dcd 5063 phba->port_gp = phba->mbox->us.s2.port;
d7c255b2 5064 phba->max_vpi = 0;
ed957684 5065 }
92d7f7b0 5066do_prep_failed:
ed957684
JS
5067 mempool_free(pmb, phba->mbox_mem_pool);
5068 return rc;
5069}
5070
e59058c4
JS
5071
5072/**
183b8021 5073 * lpfc_sli_hba_setup - SLI initialization function
e59058c4
JS
5074 * @phba: Pointer to HBA context object.
5075 *
183b8021
MY
5076 * This function is the main SLI initialization function. This function
5077 * is called by the HBA initialization code, HBA reset code and HBA
e59058c4
JS
5078 * error attention handler code. Caller is not required to hold any
5079 * locks. This function issues config_port mailbox command to configure
5080 * the SLI, setup iocb rings and HBQ rings. In the end the function
5081 * calls the config_port_post function to issue init_link mailbox
5082 * command and to start the discovery. The function will return zero
5083 * if successful, else it will return negative error code.
5084 **/
ed957684
JS
5085int
5086lpfc_sli_hba_setup(struct lpfc_hba *phba)
5087{
5088 uint32_t rc;
6d368e53
JS
5089 int mode = 3, i;
5090 int longs;
ed957684 5091
12247e81 5092 switch (phba->cfg_sli_mode) {
ed957684 5093 case 2:
78b2d852 5094 if (phba->cfg_enable_npiv) {
92d7f7b0 5095 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81 5096 "1824 NPIV enabled: Override sli_mode "
92d7f7b0 5097 "parameter (%d) to auto (0).\n",
12247e81 5098 phba->cfg_sli_mode);
92d7f7b0
JS
5099 break;
5100 }
ed957684
JS
5101 mode = 2;
5102 break;
5103 case 0:
5104 case 3:
5105 break;
5106 default:
92d7f7b0 5107 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81
JS
5108 "1819 Unrecognized sli_mode parameter: %d.\n",
5109 phba->cfg_sli_mode);
ed957684
JS
5110
5111 break;
5112 }
b5c53958 5113 phba->fcp_embed_io = 0; /* SLI4 FC support only */
ed957684 5114
9399627f
JS
5115 rc = lpfc_sli_config_port(phba, mode);
5116
12247e81 5117 if (rc && phba->cfg_sli_mode == 3)
92d7f7b0 5118 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS
5119 "1820 Unable to select SLI-3. "
5120 "Not supported by adapter.\n");
ed957684 5121 if (rc && mode != 2)
9399627f 5122 rc = lpfc_sli_config_port(phba, 2);
4597663f
JS
5123 else if (rc && mode == 2)
5124 rc = lpfc_sli_config_port(phba, 3);
ed957684 5125 if (rc)
dea3101e
JB
5126 goto lpfc_sli_hba_setup_error;
5127
0d878419
JS
5128 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
5129 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
5130 rc = pci_enable_pcie_error_reporting(phba->pcidev);
5131 if (!rc) {
5132 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5133 "2709 This device supports "
5134 "Advanced Error Reporting (AER)\n");
5135 spin_lock_irq(&phba->hbalock);
5136 phba->hba_flag |= HBA_AER_ENABLED;
5137 spin_unlock_irq(&phba->hbalock);
5138 } else {
5139 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5140 "2708 This device does not support "
b069d7eb
JS
5141 "Advanced Error Reporting (AER): %d\n",
5142 rc);
0d878419
JS
5143 phba->cfg_aer_support = 0;
5144 }
5145 }
5146
ed957684
JS
5147 if (phba->sli_rev == 3) {
5148 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
5149 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
ed957684
JS
5150 } else {
5151 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
5152 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 5153 phba->sli3_options = 0;
ed957684
JS
5154 }
5155
5156 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
5157 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
5158 phba->sli_rev, phba->max_vpi);
ed957684 5159 rc = lpfc_sli_ring_map(phba);
dea3101e
JB
5160
5161 if (rc)
5162 goto lpfc_sli_hba_setup_error;
5163
6d368e53
JS
5164 /* Initialize VPIs. */
5165 if (phba->sli_rev == LPFC_SLI_REV3) {
5166 /*
5167 * The VPI bitmask and physical ID array are allocated
5168 * and initialized once only - at driver load. A port
5169 * reset doesn't need to reinitialize this memory.
5170 */
5171 if ((phba->vpi_bmask == NULL) && (phba->vpi_ids == NULL)) {
5172 longs = (phba->max_vpi + BITS_PER_LONG) / BITS_PER_LONG;
6396bb22
KC
5173 phba->vpi_bmask = kcalloc(longs,
5174 sizeof(unsigned long),
6d368e53
JS
5175 GFP_KERNEL);
5176 if (!phba->vpi_bmask) {
5177 rc = -ENOMEM;
5178 goto lpfc_sli_hba_setup_error;
5179 }
5180
6396bb22
KC
5181 phba->vpi_ids = kcalloc(phba->max_vpi + 1,
5182 sizeof(uint16_t),
5183 GFP_KERNEL);
6d368e53
JS
5184 if (!phba->vpi_ids) {
5185 kfree(phba->vpi_bmask);
5186 rc = -ENOMEM;
5187 goto lpfc_sli_hba_setup_error;
5188 }
5189 for (i = 0; i < phba->max_vpi; i++)
5190 phba->vpi_ids[i] = i;
5191 }
5192 }
5193
9399627f 5194 /* Init HBQs */
ed957684
JS
5195 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
5196 rc = lpfc_sli_hbq_setup(phba);
5197 if (rc)
5198 goto lpfc_sli_hba_setup_error;
5199 }
04c68496 5200 spin_lock_irq(&phba->hbalock);
dea3101e 5201 phba->sli.sli_flag |= LPFC_PROCESS_LA;
04c68496 5202 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
5203
5204 rc = lpfc_config_port_post(phba);
5205 if (rc)
5206 goto lpfc_sli_hba_setup_error;
5207
ed957684
JS
5208 return rc;
5209
92d7f7b0 5210lpfc_sli_hba_setup_error:
2e0fef85 5211 phba->link_state = LPFC_HBA_ERROR;
e40a02c1 5212 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 5213 "0445 Firmware initialization failed\n");
dea3101e
JB
5214 return rc;
5215}
5216
e59058c4 5217/**
da0436e9
JS
5218 * lpfc_sli4_read_fcoe_params - Read fcoe params from conf region
5219 * @phba: Pointer to HBA context object.
5220 * @mboxq: mailbox pointer.
5221 * This function issue a dump mailbox command to read config region
5222 * 23 and parse the records in the region and populate driver
5223 * data structure.
e59058c4 5224 **/
da0436e9 5225static int
ff78d8f9 5226lpfc_sli4_read_fcoe_params(struct lpfc_hba *phba)
dea3101e 5227{
ff78d8f9 5228 LPFC_MBOXQ_t *mboxq;
da0436e9
JS
5229 struct lpfc_dmabuf *mp;
5230 struct lpfc_mqe *mqe;
5231 uint32_t data_length;
5232 int rc;
dea3101e 5233
da0436e9
JS
5234 /* Program the default value of vlan_id and fc_map */
5235 phba->valid_vlan = 0;
5236 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5237 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5238 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
2e0fef85 5239
ff78d8f9
JS
5240 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5241 if (!mboxq)
da0436e9
JS
5242 return -ENOMEM;
5243
ff78d8f9
JS
5244 mqe = &mboxq->u.mqe;
5245 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq)) {
5246 rc = -ENOMEM;
5247 goto out_free_mboxq;
5248 }
5249
3e1f0718 5250 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
5251 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5252
5253 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
5254 "(%d):2571 Mailbox cmd x%x Status x%x "
5255 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5256 "x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5257 "CQ: x%x x%x x%x x%x\n",
5258 mboxq->vport ? mboxq->vport->vpi : 0,
5259 bf_get(lpfc_mqe_command, mqe),
5260 bf_get(lpfc_mqe_status, mqe),
5261 mqe->un.mb_words[0], mqe->un.mb_words[1],
5262 mqe->un.mb_words[2], mqe->un.mb_words[3],
5263 mqe->un.mb_words[4], mqe->un.mb_words[5],
5264 mqe->un.mb_words[6], mqe->un.mb_words[7],
5265 mqe->un.mb_words[8], mqe->un.mb_words[9],
5266 mqe->un.mb_words[10], mqe->un.mb_words[11],
5267 mqe->un.mb_words[12], mqe->un.mb_words[13],
5268 mqe->un.mb_words[14], mqe->un.mb_words[15],
5269 mqe->un.mb_words[16], mqe->un.mb_words[50],
5270 mboxq->mcqe.word0,
5271 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
5272 mboxq->mcqe.trailer);
5273
5274 if (rc) {
5275 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5276 kfree(mp);
ff78d8f9
JS
5277 rc = -EIO;
5278 goto out_free_mboxq;
da0436e9
JS
5279 }
5280 data_length = mqe->un.mb_words[5];
a0c87cbd 5281 if (data_length > DMP_RGN23_SIZE) {
d11e31dd
JS
5282 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5283 kfree(mp);
ff78d8f9
JS
5284 rc = -EIO;
5285 goto out_free_mboxq;
d11e31dd 5286 }
dea3101e 5287
da0436e9
JS
5288 lpfc_parse_fcoe_conf(phba, mp->virt, data_length);
5289 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5290 kfree(mp);
ff78d8f9
JS
5291 rc = 0;
5292
5293out_free_mboxq:
5294 mempool_free(mboxq, phba->mbox_mem_pool);
5295 return rc;
da0436e9 5296}
e59058c4
JS
5297
5298/**
da0436e9
JS
5299 * lpfc_sli4_read_rev - Issue READ_REV and collect vpd data
5300 * @phba: pointer to lpfc hba data structure.
5301 * @mboxq: pointer to the LPFC_MBOXQ_t structure.
5302 * @vpd: pointer to the memory to hold resulting port vpd data.
5303 * @vpd_size: On input, the number of bytes allocated to @vpd.
5304 * On output, the number of data bytes in @vpd.
e59058c4 5305 *
da0436e9
JS
5306 * This routine executes a READ_REV SLI4 mailbox command. In
5307 * addition, this routine gets the port vpd data.
5308 *
5309 * Return codes
af901ca1 5310 * 0 - successful
d439d286 5311 * -ENOMEM - could not allocated memory.
e59058c4 5312 **/
da0436e9
JS
5313static int
5314lpfc_sli4_read_rev(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
5315 uint8_t *vpd, uint32_t *vpd_size)
dea3101e 5316{
da0436e9
JS
5317 int rc = 0;
5318 uint32_t dma_size;
5319 struct lpfc_dmabuf *dmabuf;
5320 struct lpfc_mqe *mqe;
dea3101e 5321
da0436e9
JS
5322 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
5323 if (!dmabuf)
5324 return -ENOMEM;
5325
5326 /*
5327 * Get a DMA buffer for the vpd data resulting from the READ_REV
5328 * mailbox command.
a257bf90 5329 */
da0436e9 5330 dma_size = *vpd_size;
750afb08
LC
5331 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, dma_size,
5332 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
5333 if (!dmabuf->virt) {
5334 kfree(dmabuf);
5335 return -ENOMEM;
a257bf90
JS
5336 }
5337
da0436e9
JS
5338 /*
5339 * The SLI4 implementation of READ_REV conflicts at word1,
5340 * bits 31:16 and SLI4 adds vpd functionality not present
5341 * in SLI3. This code corrects the conflicts.
1dcb58e5 5342 */
da0436e9
JS
5343 lpfc_read_rev(phba, mboxq);
5344 mqe = &mboxq->u.mqe;
5345 mqe->un.read_rev.vpd_paddr_high = putPaddrHigh(dmabuf->phys);
5346 mqe->un.read_rev.vpd_paddr_low = putPaddrLow(dmabuf->phys);
5347 mqe->un.read_rev.word1 &= 0x0000FFFF;
5348 bf_set(lpfc_mbx_rd_rev_vpd, &mqe->un.read_rev, 1);
5349 bf_set(lpfc_mbx_rd_rev_avail_len, &mqe->un.read_rev, dma_size);
5350
5351 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5352 if (rc) {
5353 dma_free_coherent(&phba->pcidev->dev, dma_size,
5354 dmabuf->virt, dmabuf->phys);
def9c7a9 5355 kfree(dmabuf);
da0436e9
JS
5356 return -EIO;
5357 }
1dcb58e5 5358
da0436e9
JS
5359 /*
5360 * The available vpd length cannot be bigger than the
5361 * DMA buffer passed to the port. Catch the less than
5362 * case and update the caller's size.
5363 */
5364 if (mqe->un.read_rev.avail_vpd_len < *vpd_size)
5365 *vpd_size = mqe->un.read_rev.avail_vpd_len;
3772a991 5366
d7c47992
JS
5367 memcpy(vpd, dmabuf->virt, *vpd_size);
5368
da0436e9
JS
5369 dma_free_coherent(&phba->pcidev->dev, dma_size,
5370 dmabuf->virt, dmabuf->phys);
5371 kfree(dmabuf);
5372 return 0;
dea3101e
JB
5373}
5374
cd1c8301 5375/**
b3b4f3e1 5376 * lpfc_sli4_get_ctl_attr - Retrieve SLI4 device controller attributes
cd1c8301
JS
5377 * @phba: pointer to lpfc hba data structure.
5378 *
5379 * This routine retrieves SLI4 device physical port name this PCI function
5380 * is attached to.
5381 *
5382 * Return codes
4907cb7b 5383 * 0 - successful
b3b4f3e1 5384 * otherwise - failed to retrieve controller attributes
cd1c8301
JS
5385 **/
5386static int
b3b4f3e1 5387lpfc_sli4_get_ctl_attr(struct lpfc_hba *phba)
cd1c8301
JS
5388{
5389 LPFC_MBOXQ_t *mboxq;
cd1c8301
JS
5390 struct lpfc_mbx_get_cntl_attributes *mbx_cntl_attr;
5391 struct lpfc_controller_attribute *cntl_attr;
cd1c8301
JS
5392 void *virtaddr = NULL;
5393 uint32_t alloclen, reqlen;
5394 uint32_t shdr_status, shdr_add_status;
5395 union lpfc_sli4_cfg_shdr *shdr;
cd1c8301
JS
5396 int rc;
5397
cd1c8301
JS
5398 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5399 if (!mboxq)
5400 return -ENOMEM;
cd1c8301 5401
b3b4f3e1 5402 /* Send COMMON_GET_CNTL_ATTRIBUTES mbox cmd */
cd1c8301
JS
5403 reqlen = sizeof(struct lpfc_mbx_get_cntl_attributes);
5404 alloclen = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5405 LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES, reqlen,
5406 LPFC_SLI4_MBX_NEMBED);
b3b4f3e1 5407
cd1c8301
JS
5408 if (alloclen < reqlen) {
5409 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5410 "3084 Allocated DMA memory size (%d) is "
5411 "less than the requested DMA memory size "
5412 "(%d)\n", alloclen, reqlen);
5413 rc = -ENOMEM;
5414 goto out_free_mboxq;
5415 }
5416 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5417 virtaddr = mboxq->sge_array->addr[0];
5418 mbx_cntl_attr = (struct lpfc_mbx_get_cntl_attributes *)virtaddr;
5419 shdr = &mbx_cntl_attr->cfg_shdr;
5420 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5421 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5422 if (shdr_status || shdr_add_status || rc) {
5423 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5424 "3085 Mailbox x%x (x%x/x%x) failed, "
5425 "rc:x%x, status:x%x, add_status:x%x\n",
5426 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5427 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5428 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5429 rc, shdr_status, shdr_add_status);
5430 rc = -ENXIO;
5431 goto out_free_mboxq;
5432 }
b3b4f3e1 5433
cd1c8301
JS
5434 cntl_attr = &mbx_cntl_attr->cntl_attr;
5435 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
5436 phba->sli4_hba.lnk_info.lnk_tp =
5437 bf_get(lpfc_cntl_attr_lnk_type, cntl_attr);
5438 phba->sli4_hba.lnk_info.lnk_no =
5439 bf_get(lpfc_cntl_attr_lnk_numb, cntl_attr);
b3b4f3e1
JS
5440
5441 memset(phba->BIOSVersion, 0, sizeof(phba->BIOSVersion));
5442 strlcat(phba->BIOSVersion, (char *)cntl_attr->bios_ver_str,
5443 sizeof(phba->BIOSVersion));
5444
cd1c8301 5445 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
b3b4f3e1 5446 "3086 lnk_type:%d, lnk_numb:%d, bios_ver:%s\n",
cd1c8301 5447 phba->sli4_hba.lnk_info.lnk_tp,
b3b4f3e1
JS
5448 phba->sli4_hba.lnk_info.lnk_no,
5449 phba->BIOSVersion);
5450out_free_mboxq:
5451 if (rc != MBX_TIMEOUT) {
5452 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5453 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5454 else
5455 mempool_free(mboxq, phba->mbox_mem_pool);
5456 }
5457 return rc;
5458}
5459
5460/**
5461 * lpfc_sli4_retrieve_pport_name - Retrieve SLI4 device physical port name
5462 * @phba: pointer to lpfc hba data structure.
5463 *
5464 * This routine retrieves SLI4 device physical port name this PCI function
5465 * is attached to.
5466 *
5467 * Return codes
5468 * 0 - successful
5469 * otherwise - failed to retrieve physical port name
5470 **/
5471static int
5472lpfc_sli4_retrieve_pport_name(struct lpfc_hba *phba)
5473{
5474 LPFC_MBOXQ_t *mboxq;
5475 struct lpfc_mbx_get_port_name *get_port_name;
5476 uint32_t shdr_status, shdr_add_status;
5477 union lpfc_sli4_cfg_shdr *shdr;
5478 char cport_name = 0;
5479 int rc;
5480
5481 /* We assume nothing at this point */
5482 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5483 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_NON;
5484
5485 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5486 if (!mboxq)
5487 return -ENOMEM;
5488 /* obtain link type and link number via READ_CONFIG */
5489 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5490 lpfc_sli4_read_config(phba);
5491 if (phba->sli4_hba.lnk_info.lnk_dv == LPFC_LNK_DAT_VAL)
5492 goto retrieve_ppname;
5493
5494 /* obtain link type and link number via COMMON_GET_CNTL_ATTRIBUTES */
5495 rc = lpfc_sli4_get_ctl_attr(phba);
5496 if (rc)
5497 goto out_free_mboxq;
cd1c8301
JS
5498
5499retrieve_ppname:
5500 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5501 LPFC_MBOX_OPCODE_GET_PORT_NAME,
5502 sizeof(struct lpfc_mbx_get_port_name) -
5503 sizeof(struct lpfc_sli4_cfg_mhdr),
5504 LPFC_SLI4_MBX_EMBED);
5505 get_port_name = &mboxq->u.mqe.un.get_port_name;
5506 shdr = (union lpfc_sli4_cfg_shdr *)&get_port_name->header.cfg_shdr;
5507 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_OPCODE_VERSION_1);
5508 bf_set(lpfc_mbx_get_port_name_lnk_type, &get_port_name->u.request,
5509 phba->sli4_hba.lnk_info.lnk_tp);
5510 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5511 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5512 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5513 if (shdr_status || shdr_add_status || rc) {
5514 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5515 "3087 Mailbox x%x (x%x/x%x) failed: "
5516 "rc:x%x, status:x%x, add_status:x%x\n",
5517 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5518 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5519 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5520 rc, shdr_status, shdr_add_status);
5521 rc = -ENXIO;
5522 goto out_free_mboxq;
5523 }
5524 switch (phba->sli4_hba.lnk_info.lnk_no) {
5525 case LPFC_LINK_NUMBER_0:
5526 cport_name = bf_get(lpfc_mbx_get_port_name_name0,
5527 &get_port_name->u.response);
5528 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5529 break;
5530 case LPFC_LINK_NUMBER_1:
5531 cport_name = bf_get(lpfc_mbx_get_port_name_name1,
5532 &get_port_name->u.response);
5533 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5534 break;
5535 case LPFC_LINK_NUMBER_2:
5536 cport_name = bf_get(lpfc_mbx_get_port_name_name2,
5537 &get_port_name->u.response);
5538 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5539 break;
5540 case LPFC_LINK_NUMBER_3:
5541 cport_name = bf_get(lpfc_mbx_get_port_name_name3,
5542 &get_port_name->u.response);
5543 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5544 break;
5545 default:
5546 break;
5547 }
5548
5549 if (phba->sli4_hba.pport_name_sta == LPFC_SLI4_PPNAME_GET) {
5550 phba->Port[0] = cport_name;
5551 phba->Port[1] = '\0';
5552 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5553 "3091 SLI get port name: %s\n", phba->Port);
5554 }
5555
5556out_free_mboxq:
5557 if (rc != MBX_TIMEOUT) {
5558 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5559 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5560 else
5561 mempool_free(mboxq, phba->mbox_mem_pool);
5562 }
5563 return rc;
5564}
5565
e59058c4 5566/**
da0436e9
JS
5567 * lpfc_sli4_arm_cqeq_intr - Arm sli-4 device completion and event queues
5568 * @phba: pointer to lpfc hba data structure.
e59058c4 5569 *
da0436e9
JS
5570 * This routine is called to explicitly arm the SLI4 device's completion and
5571 * event queues
5572 **/
5573static void
5574lpfc_sli4_arm_cqeq_intr(struct lpfc_hba *phba)
5575{
895427bd 5576 int qidx;
b71413dd 5577 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
cdb42bec 5578 struct lpfc_sli4_hdw_queue *qp;
657add4e 5579 struct lpfc_queue *eq;
da0436e9 5580
32517fc0
JS
5581 sli4_hba->sli4_write_cq_db(phba, sli4_hba->mbx_cq, 0, LPFC_QUEUE_REARM);
5582 sli4_hba->sli4_write_cq_db(phba, sli4_hba->els_cq, 0, LPFC_QUEUE_REARM);
b71413dd 5583 if (sli4_hba->nvmels_cq)
32517fc0
JS
5584 sli4_hba->sli4_write_cq_db(phba, sli4_hba->nvmels_cq, 0,
5585 LPFC_QUEUE_REARM);
1ba981fd 5586
cdb42bec 5587 if (sli4_hba->hdwq) {
657add4e 5588 /* Loop thru all Hardware Queues */
cdb42bec 5589 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
657add4e
JS
5590 qp = &sli4_hba->hdwq[qidx];
5591 /* ARM the corresponding CQ */
01f2ef6d 5592 sli4_hba->sli4_write_cq_db(phba, qp->io_cq, 0,
c00f62e6 5593 LPFC_QUEUE_REARM);
cdb42bec 5594 }
1ba981fd 5595
657add4e
JS
5596 /* Loop thru all IRQ vectors */
5597 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
5598 eq = sli4_hba->hba_eq_hdl[qidx].eq;
5599 /* ARM the corresponding EQ */
5600 sli4_hba->sli4_write_eq_db(phba, eq,
5601 0, LPFC_QUEUE_REARM);
5602 }
cdb42bec 5603 }
1ba981fd 5604
2d7dbc4c
JS
5605 if (phba->nvmet_support) {
5606 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) {
32517fc0
JS
5607 sli4_hba->sli4_write_cq_db(phba,
5608 sli4_hba->nvmet_cqset[qidx], 0,
2d7dbc4c
JS
5609 LPFC_QUEUE_REARM);
5610 }
2e90f4b5 5611 }
da0436e9
JS
5612}
5613
6d368e53
JS
5614/**
5615 * lpfc_sli4_get_avail_extnt_rsrc - Get available resource extent count.
5616 * @phba: Pointer to HBA context object.
5617 * @type: The resource extent type.
b76f2dc9
JS
5618 * @extnt_count: buffer to hold port available extent count.
5619 * @extnt_size: buffer to hold element count per extent.
6d368e53 5620 *
b76f2dc9
JS
5621 * This function calls the port and retrievs the number of available
5622 * extents and their size for a particular extent type.
5623 *
5624 * Returns: 0 if successful. Nonzero otherwise.
6d368e53 5625 **/
b76f2dc9 5626int
6d368e53
JS
5627lpfc_sli4_get_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type,
5628 uint16_t *extnt_count, uint16_t *extnt_size)
5629{
5630 int rc = 0;
5631 uint32_t length;
5632 uint32_t mbox_tmo;
5633 struct lpfc_mbx_get_rsrc_extent_info *rsrc_info;
5634 LPFC_MBOXQ_t *mbox;
5635
5636 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5637 if (!mbox)
5638 return -ENOMEM;
5639
5640 /* Find out how many extents are available for this resource type */
5641 length = (sizeof(struct lpfc_mbx_get_rsrc_extent_info) -
5642 sizeof(struct lpfc_sli4_cfg_mhdr));
5643 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5644 LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO,
5645 length, LPFC_SLI4_MBX_EMBED);
5646
5647 /* Send an extents count of 0 - the GET doesn't use it. */
5648 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
5649 LPFC_SLI4_MBX_EMBED);
5650 if (unlikely(rc)) {
5651 rc = -EIO;
5652 goto err_exit;
5653 }
5654
5655 if (!phba->sli4_hba.intr_enable)
5656 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5657 else {
a183a15f 5658 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5659 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5660 }
5661 if (unlikely(rc)) {
5662 rc = -EIO;
5663 goto err_exit;
5664 }
5665
5666 rsrc_info = &mbox->u.mqe.un.rsrc_extent_info;
5667 if (bf_get(lpfc_mbox_hdr_status,
5668 &rsrc_info->header.cfg_shdr.response)) {
5669 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5670 "2930 Failed to get resource extents "
5671 "Status 0x%x Add'l Status 0x%x\n",
5672 bf_get(lpfc_mbox_hdr_status,
5673 &rsrc_info->header.cfg_shdr.response),
5674 bf_get(lpfc_mbox_hdr_add_status,
5675 &rsrc_info->header.cfg_shdr.response));
5676 rc = -EIO;
5677 goto err_exit;
5678 }
5679
5680 *extnt_count = bf_get(lpfc_mbx_get_rsrc_extent_info_cnt,
5681 &rsrc_info->u.rsp);
5682 *extnt_size = bf_get(lpfc_mbx_get_rsrc_extent_info_size,
5683 &rsrc_info->u.rsp);
8a9d2e80
JS
5684
5685 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5686 "3162 Retrieved extents type-%d from port: count:%d, "
5687 "size:%d\n", type, *extnt_count, *extnt_size);
5688
5689err_exit:
6d368e53
JS
5690 mempool_free(mbox, phba->mbox_mem_pool);
5691 return rc;
5692}
5693
5694/**
5695 * lpfc_sli4_chk_avail_extnt_rsrc - Check for available SLI4 resource extents.
5696 * @phba: Pointer to HBA context object.
5697 * @type: The extent type to check.
5698 *
5699 * This function reads the current available extents from the port and checks
5700 * if the extent count or extent size has changed since the last access.
5701 * Callers use this routine post port reset to understand if there is a
5702 * extent reprovisioning requirement.
5703 *
5704 * Returns:
5705 * -Error: error indicates problem.
5706 * 1: Extent count or size has changed.
5707 * 0: No changes.
5708 **/
5709static int
5710lpfc_sli4_chk_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type)
5711{
5712 uint16_t curr_ext_cnt, rsrc_ext_cnt;
5713 uint16_t size_diff, rsrc_ext_size;
5714 int rc = 0;
5715 struct lpfc_rsrc_blks *rsrc_entry;
5716 struct list_head *rsrc_blk_list = NULL;
5717
5718 size_diff = 0;
5719 curr_ext_cnt = 0;
5720 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5721 &rsrc_ext_cnt,
5722 &rsrc_ext_size);
5723 if (unlikely(rc))
5724 return -EIO;
5725
5726 switch (type) {
5727 case LPFC_RSC_TYPE_FCOE_RPI:
5728 rsrc_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5729 break;
5730 case LPFC_RSC_TYPE_FCOE_VPI:
5731 rsrc_blk_list = &phba->lpfc_vpi_blk_list;
5732 break;
5733 case LPFC_RSC_TYPE_FCOE_XRI:
5734 rsrc_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5735 break;
5736 case LPFC_RSC_TYPE_FCOE_VFI:
5737 rsrc_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5738 break;
5739 default:
5740 break;
5741 }
5742
5743 list_for_each_entry(rsrc_entry, rsrc_blk_list, list) {
5744 curr_ext_cnt++;
5745 if (rsrc_entry->rsrc_size != rsrc_ext_size)
5746 size_diff++;
5747 }
5748
5749 if (curr_ext_cnt != rsrc_ext_cnt || size_diff != 0)
5750 rc = 1;
5751
5752 return rc;
5753}
5754
5755/**
5756 * lpfc_sli4_cfg_post_extnts -
5757 * @phba: Pointer to HBA context object.
5758 * @extnt_cnt - number of available extents.
5759 * @type - the extent type (rpi, xri, vfi, vpi).
5760 * @emb - buffer to hold either MBX_EMBED or MBX_NEMBED operation.
5761 * @mbox - pointer to the caller's allocated mailbox structure.
5762 *
5763 * This function executes the extents allocation request. It also
5764 * takes care of the amount of memory needed to allocate or get the
5765 * allocated extents. It is the caller's responsibility to evaluate
5766 * the response.
5767 *
5768 * Returns:
5769 * -Error: Error value describes the condition found.
5770 * 0: if successful
5771 **/
5772static int
8a9d2e80 5773lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t extnt_cnt,
6d368e53
JS
5774 uint16_t type, bool *emb, LPFC_MBOXQ_t *mbox)
5775{
5776 int rc = 0;
5777 uint32_t req_len;
5778 uint32_t emb_len;
5779 uint32_t alloc_len, mbox_tmo;
5780
5781 /* Calculate the total requested length of the dma memory */
8a9d2e80 5782 req_len = extnt_cnt * sizeof(uint16_t);
6d368e53
JS
5783
5784 /*
5785 * Calculate the size of an embedded mailbox. The uint32_t
5786 * accounts for extents-specific word.
5787 */
5788 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
5789 sizeof(uint32_t);
5790
5791 /*
5792 * Presume the allocation and response will fit into an embedded
5793 * mailbox. If not true, reconfigure to a non-embedded mailbox.
5794 */
5795 *emb = LPFC_SLI4_MBX_EMBED;
5796 if (req_len > emb_len) {
8a9d2e80 5797 req_len = extnt_cnt * sizeof(uint16_t) +
6d368e53
JS
5798 sizeof(union lpfc_sli4_cfg_shdr) +
5799 sizeof(uint32_t);
5800 *emb = LPFC_SLI4_MBX_NEMBED;
5801 }
5802
5803 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5804 LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT,
5805 req_len, *emb);
5806 if (alloc_len < req_len) {
5807 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
b76f2dc9 5808 "2982 Allocated DMA memory size (x%x) is "
6d368e53
JS
5809 "less than the requested DMA memory "
5810 "size (x%x)\n", alloc_len, req_len);
5811 return -ENOMEM;
5812 }
8a9d2e80 5813 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, extnt_cnt, type, *emb);
6d368e53
JS
5814 if (unlikely(rc))
5815 return -EIO;
5816
5817 if (!phba->sli4_hba.intr_enable)
5818 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5819 else {
a183a15f 5820 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5821 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5822 }
5823
5824 if (unlikely(rc))
5825 rc = -EIO;
5826 return rc;
5827}
5828
5829/**
5830 * lpfc_sli4_alloc_extent - Allocate an SLI4 resource extent.
5831 * @phba: Pointer to HBA context object.
5832 * @type: The resource extent type to allocate.
5833 *
5834 * This function allocates the number of elements for the specified
5835 * resource type.
5836 **/
5837static int
5838lpfc_sli4_alloc_extent(struct lpfc_hba *phba, uint16_t type)
5839{
5840 bool emb = false;
5841 uint16_t rsrc_id_cnt, rsrc_cnt, rsrc_size;
5842 uint16_t rsrc_id, rsrc_start, j, k;
5843 uint16_t *ids;
5844 int i, rc;
5845 unsigned long longs;
5846 unsigned long *bmask;
5847 struct lpfc_rsrc_blks *rsrc_blks;
5848 LPFC_MBOXQ_t *mbox;
5849 uint32_t length;
5850 struct lpfc_id_range *id_array = NULL;
5851 void *virtaddr = NULL;
5852 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
5853 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
5854 struct list_head *ext_blk_list;
5855
5856 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5857 &rsrc_cnt,
5858 &rsrc_size);
5859 if (unlikely(rc))
5860 return -EIO;
5861
5862 if ((rsrc_cnt == 0) || (rsrc_size == 0)) {
5863 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5864 "3009 No available Resource Extents "
5865 "for resource type 0x%x: Count: 0x%x, "
5866 "Size 0x%x\n", type, rsrc_cnt,
5867 rsrc_size);
5868 return -ENOMEM;
5869 }
5870
8a9d2e80
JS
5871 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_INIT | LOG_SLI,
5872 "2903 Post resource extents type-0x%x: "
5873 "count:%d, size %d\n", type, rsrc_cnt, rsrc_size);
6d368e53
JS
5874
5875 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5876 if (!mbox)
5877 return -ENOMEM;
5878
8a9d2e80 5879 rc = lpfc_sli4_cfg_post_extnts(phba, rsrc_cnt, type, &emb, mbox);
6d368e53
JS
5880 if (unlikely(rc)) {
5881 rc = -EIO;
5882 goto err_exit;
5883 }
5884
5885 /*
5886 * Figure out where the response is located. Then get local pointers
5887 * to the response data. The port does not guarantee to respond to
5888 * all extents counts request so update the local variable with the
5889 * allocated count from the port.
5890 */
5891 if (emb == LPFC_SLI4_MBX_EMBED) {
5892 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
5893 id_array = &rsrc_ext->u.rsp.id[0];
5894 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
5895 } else {
5896 virtaddr = mbox->sge_array->addr[0];
5897 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
5898 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
5899 id_array = &n_rsrc->id;
5900 }
5901
5902 longs = ((rsrc_cnt * rsrc_size) + BITS_PER_LONG - 1) / BITS_PER_LONG;
5903 rsrc_id_cnt = rsrc_cnt * rsrc_size;
5904
5905 /*
5906 * Based on the resource size and count, correct the base and max
5907 * resource values.
5908 */
5909 length = sizeof(struct lpfc_rsrc_blks);
5910 switch (type) {
5911 case LPFC_RSC_TYPE_FCOE_RPI:
6396bb22 5912 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
5913 sizeof(unsigned long),
5914 GFP_KERNEL);
5915 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
5916 rc = -ENOMEM;
5917 goto err_exit;
5918 }
6396bb22 5919 phba->sli4_hba.rpi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5920 sizeof(uint16_t),
5921 GFP_KERNEL);
5922 if (unlikely(!phba->sli4_hba.rpi_ids)) {
5923 kfree(phba->sli4_hba.rpi_bmask);
5924 rc = -ENOMEM;
5925 goto err_exit;
5926 }
5927
5928 /*
5929 * The next_rpi was initialized with the maximum available
5930 * count but the port may allocate a smaller number. Catch
5931 * that case and update the next_rpi.
5932 */
5933 phba->sli4_hba.next_rpi = rsrc_id_cnt;
5934
5935 /* Initialize local ptrs for common extent processing later. */
5936 bmask = phba->sli4_hba.rpi_bmask;
5937 ids = phba->sli4_hba.rpi_ids;
5938 ext_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5939 break;
5940 case LPFC_RSC_TYPE_FCOE_VPI:
6396bb22 5941 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
5942 GFP_KERNEL);
5943 if (unlikely(!phba->vpi_bmask)) {
5944 rc = -ENOMEM;
5945 goto err_exit;
5946 }
6396bb22 5947 phba->vpi_ids = kcalloc(rsrc_id_cnt, sizeof(uint16_t),
6d368e53
JS
5948 GFP_KERNEL);
5949 if (unlikely(!phba->vpi_ids)) {
5950 kfree(phba->vpi_bmask);
5951 rc = -ENOMEM;
5952 goto err_exit;
5953 }
5954
5955 /* Initialize local ptrs for common extent processing later. */
5956 bmask = phba->vpi_bmask;
5957 ids = phba->vpi_ids;
5958 ext_blk_list = &phba->lpfc_vpi_blk_list;
5959 break;
5960 case LPFC_RSC_TYPE_FCOE_XRI:
6396bb22 5961 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
5962 sizeof(unsigned long),
5963 GFP_KERNEL);
5964 if (unlikely(!phba->sli4_hba.xri_bmask)) {
5965 rc = -ENOMEM;
5966 goto err_exit;
5967 }
8a9d2e80 5968 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 5969 phba->sli4_hba.xri_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5970 sizeof(uint16_t),
5971 GFP_KERNEL);
5972 if (unlikely(!phba->sli4_hba.xri_ids)) {
5973 kfree(phba->sli4_hba.xri_bmask);
5974 rc = -ENOMEM;
5975 goto err_exit;
5976 }
5977
5978 /* Initialize local ptrs for common extent processing later. */
5979 bmask = phba->sli4_hba.xri_bmask;
5980 ids = phba->sli4_hba.xri_ids;
5981 ext_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5982 break;
5983 case LPFC_RSC_TYPE_FCOE_VFI:
6396bb22 5984 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
5985 sizeof(unsigned long),
5986 GFP_KERNEL);
5987 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
5988 rc = -ENOMEM;
5989 goto err_exit;
5990 }
6396bb22 5991 phba->sli4_hba.vfi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5992 sizeof(uint16_t),
5993 GFP_KERNEL);
5994 if (unlikely(!phba->sli4_hba.vfi_ids)) {
5995 kfree(phba->sli4_hba.vfi_bmask);
5996 rc = -ENOMEM;
5997 goto err_exit;
5998 }
5999
6000 /* Initialize local ptrs for common extent processing later. */
6001 bmask = phba->sli4_hba.vfi_bmask;
6002 ids = phba->sli4_hba.vfi_ids;
6003 ext_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
6004 break;
6005 default:
6006 /* Unsupported Opcode. Fail call. */
6007 id_array = NULL;
6008 bmask = NULL;
6009 ids = NULL;
6010 ext_blk_list = NULL;
6011 goto err_exit;
6012 }
6013
6014 /*
6015 * Complete initializing the extent configuration with the
6016 * allocated ids assigned to this function. The bitmask serves
6017 * as an index into the array and manages the available ids. The
6018 * array just stores the ids communicated to the port via the wqes.
6019 */
6020 for (i = 0, j = 0, k = 0; i < rsrc_cnt; i++) {
6021 if ((i % 2) == 0)
6022 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_0,
6023 &id_array[k]);
6024 else
6025 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_1,
6026 &id_array[k]);
6027
6028 rsrc_blks = kzalloc(length, GFP_KERNEL);
6029 if (unlikely(!rsrc_blks)) {
6030 rc = -ENOMEM;
6031 kfree(bmask);
6032 kfree(ids);
6033 goto err_exit;
6034 }
6035 rsrc_blks->rsrc_start = rsrc_id;
6036 rsrc_blks->rsrc_size = rsrc_size;
6037 list_add_tail(&rsrc_blks->list, ext_blk_list);
6038 rsrc_start = rsrc_id;
895427bd 6039 if ((type == LPFC_RSC_TYPE_FCOE_XRI) && (j == 0)) {
5e5b511d 6040 phba->sli4_hba.io_xri_start = rsrc_start +
895427bd 6041 lpfc_sli4_get_iocb_cnt(phba);
895427bd 6042 }
6d368e53
JS
6043
6044 while (rsrc_id < (rsrc_start + rsrc_size)) {
6045 ids[j] = rsrc_id;
6046 rsrc_id++;
6047 j++;
6048 }
6049 /* Entire word processed. Get next word.*/
6050 if ((i % 2) == 1)
6051 k++;
6052 }
6053 err_exit:
6054 lpfc_sli4_mbox_cmd_free(phba, mbox);
6055 return rc;
6056}
6057
895427bd
JS
6058
6059
6d368e53
JS
6060/**
6061 * lpfc_sli4_dealloc_extent - Deallocate an SLI4 resource extent.
6062 * @phba: Pointer to HBA context object.
6063 * @type: the extent's type.
6064 *
6065 * This function deallocates all extents of a particular resource type.
6066 * SLI4 does not allow for deallocating a particular extent range. It
6067 * is the caller's responsibility to release all kernel memory resources.
6068 **/
6069static int
6070lpfc_sli4_dealloc_extent(struct lpfc_hba *phba, uint16_t type)
6071{
6072 int rc;
6073 uint32_t length, mbox_tmo = 0;
6074 LPFC_MBOXQ_t *mbox;
6075 struct lpfc_mbx_dealloc_rsrc_extents *dealloc_rsrc;
6076 struct lpfc_rsrc_blks *rsrc_blk, *rsrc_blk_next;
6077
6078 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6079 if (!mbox)
6080 return -ENOMEM;
6081
6082 /*
6083 * This function sends an embedded mailbox because it only sends the
6084 * the resource type. All extents of this type are released by the
6085 * port.
6086 */
6087 length = (sizeof(struct lpfc_mbx_dealloc_rsrc_extents) -
6088 sizeof(struct lpfc_sli4_cfg_mhdr));
6089 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6090 LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT,
6091 length, LPFC_SLI4_MBX_EMBED);
6092
6093 /* Send an extents count of 0 - the dealloc doesn't use it. */
6094 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
6095 LPFC_SLI4_MBX_EMBED);
6096 if (unlikely(rc)) {
6097 rc = -EIO;
6098 goto out_free_mbox;
6099 }
6100 if (!phba->sli4_hba.intr_enable)
6101 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6102 else {
a183a15f 6103 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
6104 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6105 }
6106 if (unlikely(rc)) {
6107 rc = -EIO;
6108 goto out_free_mbox;
6109 }
6110
6111 dealloc_rsrc = &mbox->u.mqe.un.dealloc_rsrc_extents;
6112 if (bf_get(lpfc_mbox_hdr_status,
6113 &dealloc_rsrc->header.cfg_shdr.response)) {
6114 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6115 "2919 Failed to release resource extents "
6116 "for type %d - Status 0x%x Add'l Status 0x%x. "
6117 "Resource memory not released.\n",
6118 type,
6119 bf_get(lpfc_mbox_hdr_status,
6120 &dealloc_rsrc->header.cfg_shdr.response),
6121 bf_get(lpfc_mbox_hdr_add_status,
6122 &dealloc_rsrc->header.cfg_shdr.response));
6123 rc = -EIO;
6124 goto out_free_mbox;
6125 }
6126
6127 /* Release kernel memory resources for the specific type. */
6128 switch (type) {
6129 case LPFC_RSC_TYPE_FCOE_VPI:
6130 kfree(phba->vpi_bmask);
6131 kfree(phba->vpi_ids);
6132 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6133 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6134 &phba->lpfc_vpi_blk_list, list) {
6135 list_del_init(&rsrc_blk->list);
6136 kfree(rsrc_blk);
6137 }
16a3a208 6138 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6139 break;
6140 case LPFC_RSC_TYPE_FCOE_XRI:
6141 kfree(phba->sli4_hba.xri_bmask);
6142 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6143 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6144 &phba->sli4_hba.lpfc_xri_blk_list, list) {
6145 list_del_init(&rsrc_blk->list);
6146 kfree(rsrc_blk);
6147 }
6148 break;
6149 case LPFC_RSC_TYPE_FCOE_VFI:
6150 kfree(phba->sli4_hba.vfi_bmask);
6151 kfree(phba->sli4_hba.vfi_ids);
6152 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6153 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6154 &phba->sli4_hba.lpfc_vfi_blk_list, list) {
6155 list_del_init(&rsrc_blk->list);
6156 kfree(rsrc_blk);
6157 }
6158 break;
6159 case LPFC_RSC_TYPE_FCOE_RPI:
6160 /* RPI bitmask and physical id array are cleaned up earlier. */
6161 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6162 &phba->sli4_hba.lpfc_rpi_blk_list, list) {
6163 list_del_init(&rsrc_blk->list);
6164 kfree(rsrc_blk);
6165 }
6166 break;
6167 default:
6168 break;
6169 }
6170
6171 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6172
6173 out_free_mbox:
6174 mempool_free(mbox, phba->mbox_mem_pool);
6175 return rc;
6176}
6177
bd4b3e5c 6178static void
7bdedb34
JS
6179lpfc_set_features(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox,
6180 uint32_t feature)
65791f1f 6181{
65791f1f 6182 uint32_t len;
65791f1f 6183
65791f1f
JS
6184 len = sizeof(struct lpfc_mbx_set_feature) -
6185 sizeof(struct lpfc_sli4_cfg_mhdr);
6186 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6187 LPFC_MBOX_OPCODE_SET_FEATURES, len,
6188 LPFC_SLI4_MBX_EMBED);
7bdedb34
JS
6189
6190 switch (feature) {
6191 case LPFC_SET_UE_RECOVERY:
6192 bf_set(lpfc_mbx_set_feature_UER,
6193 &mbox->u.mqe.un.set_feature, 1);
6194 mbox->u.mqe.un.set_feature.feature = LPFC_SET_UE_RECOVERY;
6195 mbox->u.mqe.un.set_feature.param_len = 8;
6196 break;
6197 case LPFC_SET_MDS_DIAGS:
6198 bf_set(lpfc_mbx_set_feature_mds,
6199 &mbox->u.mqe.un.set_feature, 1);
6200 bf_set(lpfc_mbx_set_feature_mds_deep_loopbk,
ae9e28f3 6201 &mbox->u.mqe.un.set_feature, 1);
7bdedb34
JS
6202 mbox->u.mqe.un.set_feature.feature = LPFC_SET_MDS_DIAGS;
6203 mbox->u.mqe.un.set_feature.param_len = 8;
6204 break;
65791f1f 6205 }
7bdedb34
JS
6206
6207 return;
65791f1f
JS
6208}
6209
1165a5c2
JS
6210/**
6211 * lpfc_ras_stop_fwlog: Disable FW logging by the adapter
6212 * @phba: Pointer to HBA context object.
6213 *
6214 * Disable FW logging into host memory on the adapter. To
6215 * be done before reading logs from the host memory.
6216 **/
6217void
6218lpfc_ras_stop_fwlog(struct lpfc_hba *phba)
6219{
6220 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6221
95bfc6d8
JS
6222 spin_lock_irq(&phba->hbalock);
6223 ras_fwlog->state = INACTIVE;
6224 spin_unlock_irq(&phba->hbalock);
1165a5c2
JS
6225
6226 /* Disable FW logging to host memory */
6227 writel(LPFC_CTL_PDEV_CTL_DDL_RAS,
6228 phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PDEV_CTL_OFFSET);
95bfc6d8
JS
6229
6230 /* Wait 10ms for firmware to stop using DMA buffer */
6231 usleep_range(10 * 1000, 20 * 1000);
1165a5c2
JS
6232}
6233
d2cc9bcd
JS
6234/**
6235 * lpfc_sli4_ras_dma_free - Free memory allocated for FW logging.
6236 * @phba: Pointer to HBA context object.
6237 *
6238 * This function is called to free memory allocated for RAS FW logging
6239 * support in the driver.
6240 **/
6241void
6242lpfc_sli4_ras_dma_free(struct lpfc_hba *phba)
6243{
6244 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6245 struct lpfc_dmabuf *dmabuf, *next;
6246
6247 if (!list_empty(&ras_fwlog->fwlog_buff_list)) {
6248 list_for_each_entry_safe(dmabuf, next,
6249 &ras_fwlog->fwlog_buff_list,
6250 list) {
6251 list_del(&dmabuf->list);
6252 dma_free_coherent(&phba->pcidev->dev,
6253 LPFC_RAS_MAX_ENTRY_SIZE,
6254 dmabuf->virt, dmabuf->phys);
6255 kfree(dmabuf);
6256 }
6257 }
6258
6259 if (ras_fwlog->lwpd.virt) {
6260 dma_free_coherent(&phba->pcidev->dev,
6261 sizeof(uint32_t) * 2,
6262 ras_fwlog->lwpd.virt,
6263 ras_fwlog->lwpd.phys);
6264 ras_fwlog->lwpd.virt = NULL;
6265 }
6266
95bfc6d8
JS
6267 spin_lock_irq(&phba->hbalock);
6268 ras_fwlog->state = INACTIVE;
6269 spin_unlock_irq(&phba->hbalock);
d2cc9bcd
JS
6270}
6271
6272/**
6273 * lpfc_sli4_ras_dma_alloc: Allocate memory for FW support
6274 * @phba: Pointer to HBA context object.
6275 * @fwlog_buff_count: Count of buffers to be created.
6276 *
6277 * This routine DMA memory for Log Write Position Data[LPWD] and buffer
6278 * to update FW log is posted to the adapter.
6279 * Buffer count is calculated based on module param ras_fwlog_buffsize
6280 * Size of each buffer posted to FW is 64K.
6281 **/
6282
6283static int
6284lpfc_sli4_ras_dma_alloc(struct lpfc_hba *phba,
6285 uint32_t fwlog_buff_count)
6286{
6287 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6288 struct lpfc_dmabuf *dmabuf;
6289 int rc = 0, i = 0;
6290
6291 /* Initialize List */
6292 INIT_LIST_HEAD(&ras_fwlog->fwlog_buff_list);
6293
6294 /* Allocate memory for the LWPD */
6295 ras_fwlog->lwpd.virt = dma_alloc_coherent(&phba->pcidev->dev,
6296 sizeof(uint32_t) * 2,
6297 &ras_fwlog->lwpd.phys,
6298 GFP_KERNEL);
6299 if (!ras_fwlog->lwpd.virt) {
cb34990b 6300 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d2cc9bcd
JS
6301 "6185 LWPD Memory Alloc Failed\n");
6302
6303 return -ENOMEM;
6304 }
6305
6306 ras_fwlog->fw_buffcount = fwlog_buff_count;
6307 for (i = 0; i < ras_fwlog->fw_buffcount; i++) {
6308 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
6309 GFP_KERNEL);
6310 if (!dmabuf) {
6311 rc = -ENOMEM;
6312 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6313 "6186 Memory Alloc failed FW logging");
6314 goto free_mem;
6315 }
6316
750afb08 6317 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
d2cc9bcd 6318 LPFC_RAS_MAX_ENTRY_SIZE,
750afb08 6319 &dmabuf->phys, GFP_KERNEL);
d2cc9bcd
JS
6320 if (!dmabuf->virt) {
6321 kfree(dmabuf);
6322 rc = -ENOMEM;
6323 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6324 "6187 DMA Alloc Failed FW logging");
6325 goto free_mem;
6326 }
d2cc9bcd
JS
6327 dmabuf->buffer_tag = i;
6328 list_add_tail(&dmabuf->list, &ras_fwlog->fwlog_buff_list);
6329 }
6330
6331free_mem:
6332 if (rc)
6333 lpfc_sli4_ras_dma_free(phba);
6334
6335 return rc;
6336}
6337
6338/**
6339 * lpfc_sli4_ras_mbox_cmpl: Completion handler for RAS MBX command
6340 * @phba: pointer to lpfc hba data structure.
6341 * @pmboxq: pointer to the driver internal queue element for mailbox command.
6342 *
6343 * Completion handler for driver's RAS MBX command to the device.
6344 **/
6345static void
6346lpfc_sli4_ras_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
6347{
6348 MAILBOX_t *mb;
6349 union lpfc_sli4_cfg_shdr *shdr;
6350 uint32_t shdr_status, shdr_add_status;
6351 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6352
6353 mb = &pmb->u.mb;
6354
6355 shdr = (union lpfc_sli4_cfg_shdr *)
6356 &pmb->u.mqe.un.ras_fwlog.header.cfg_shdr;
6357 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
6358 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
6359
6360 if (mb->mbxStatus != MBX_SUCCESS || shdr_status) {
cb34990b 6361 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
d2cc9bcd
JS
6362 "6188 FW LOG mailbox "
6363 "completed with status x%x add_status x%x,"
6364 " mbx status x%x\n",
6365 shdr_status, shdr_add_status, mb->mbxStatus);
cb34990b
JS
6366
6367 ras_fwlog->ras_hwsupport = false;
d2cc9bcd
JS
6368 goto disable_ras;
6369 }
6370
95bfc6d8
JS
6371 spin_lock_irq(&phba->hbalock);
6372 ras_fwlog->state = ACTIVE;
6373 spin_unlock_irq(&phba->hbalock);
d2cc9bcd
JS
6374 mempool_free(pmb, phba->mbox_mem_pool);
6375
6376 return;
6377
6378disable_ras:
6379 /* Free RAS DMA memory */
6380 lpfc_sli4_ras_dma_free(phba);
6381 mempool_free(pmb, phba->mbox_mem_pool);
6382}
6383
6384/**
6385 * lpfc_sli4_ras_fwlog_init: Initialize memory and post RAS MBX command
6386 * @phba: pointer to lpfc hba data structure.
6387 * @fwlog_level: Logging verbosity level.
6388 * @fwlog_enable: Enable/Disable logging.
6389 *
6390 * Initialize memory and post mailbox command to enable FW logging in host
6391 * memory.
6392 **/
6393int
6394lpfc_sli4_ras_fwlog_init(struct lpfc_hba *phba,
6395 uint32_t fwlog_level,
6396 uint32_t fwlog_enable)
6397{
6398 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6399 struct lpfc_mbx_set_ras_fwlog *mbx_fwlog = NULL;
6400 struct lpfc_dmabuf *dmabuf;
6401 LPFC_MBOXQ_t *mbox;
6402 uint32_t len = 0, fwlog_buffsize, fwlog_entry_count;
6403 int rc = 0;
6404
95bfc6d8
JS
6405 spin_lock_irq(&phba->hbalock);
6406 ras_fwlog->state = INACTIVE;
6407 spin_unlock_irq(&phba->hbalock);
6408
d2cc9bcd
JS
6409 fwlog_buffsize = (LPFC_RAS_MIN_BUFF_POST_SIZE *
6410 phba->cfg_ras_fwlog_buffsize);
6411 fwlog_entry_count = (fwlog_buffsize/LPFC_RAS_MAX_ENTRY_SIZE);
6412
6413 /*
6414 * If re-enabling FW logging support use earlier allocated
6415 * DMA buffers while posting MBX command.
6416 **/
6417 if (!ras_fwlog->lwpd.virt) {
6418 rc = lpfc_sli4_ras_dma_alloc(phba, fwlog_entry_count);
6419 if (rc) {
6420 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
cb34990b 6421 "6189 FW Log Memory Allocation Failed");
d2cc9bcd
JS
6422 return rc;
6423 }
6424 }
6425
6426 /* Setup Mailbox command */
6427 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6428 if (!mbox) {
cb34990b 6429 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d2cc9bcd
JS
6430 "6190 RAS MBX Alloc Failed");
6431 rc = -ENOMEM;
6432 goto mem_free;
6433 }
6434
6435 ras_fwlog->fw_loglevel = fwlog_level;
6436 len = (sizeof(struct lpfc_mbx_set_ras_fwlog) -
6437 sizeof(struct lpfc_sli4_cfg_mhdr));
6438
6439 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_LOWLEVEL,
6440 LPFC_MBOX_OPCODE_SET_DIAG_LOG_OPTION,
6441 len, LPFC_SLI4_MBX_EMBED);
6442
6443 mbx_fwlog = (struct lpfc_mbx_set_ras_fwlog *)&mbox->u.mqe.un.ras_fwlog;
6444 bf_set(lpfc_fwlog_enable, &mbx_fwlog->u.request,
6445 fwlog_enable);
6446 bf_set(lpfc_fwlog_loglvl, &mbx_fwlog->u.request,
6447 ras_fwlog->fw_loglevel);
6448 bf_set(lpfc_fwlog_buffcnt, &mbx_fwlog->u.request,
6449 ras_fwlog->fw_buffcount);
6450 bf_set(lpfc_fwlog_buffsz, &mbx_fwlog->u.request,
6451 LPFC_RAS_MAX_ENTRY_SIZE/SLI4_PAGE_SIZE);
6452
6453 /* Update DMA buffer address */
6454 list_for_each_entry(dmabuf, &ras_fwlog->fwlog_buff_list, list) {
6455 memset(dmabuf->virt, 0, LPFC_RAS_MAX_ENTRY_SIZE);
6456
6457 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_lo =
6458 putPaddrLow(dmabuf->phys);
6459
6460 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_hi =
6461 putPaddrHigh(dmabuf->phys);
6462 }
6463
6464 /* Update LPWD address */
6465 mbx_fwlog->u.request.lwpd.addr_lo = putPaddrLow(ras_fwlog->lwpd.phys);
6466 mbx_fwlog->u.request.lwpd.addr_hi = putPaddrHigh(ras_fwlog->lwpd.phys);
6467
95bfc6d8
JS
6468 spin_lock_irq(&phba->hbalock);
6469 ras_fwlog->state = REG_INPROGRESS;
6470 spin_unlock_irq(&phba->hbalock);
d2cc9bcd
JS
6471 mbox->vport = phba->pport;
6472 mbox->mbox_cmpl = lpfc_sli4_ras_mbox_cmpl;
6473
6474 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
6475
6476 if (rc == MBX_NOT_FINISHED) {
cb34990b
JS
6477 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6478 "6191 FW-Log Mailbox failed. "
d2cc9bcd
JS
6479 "status %d mbxStatus : x%x", rc,
6480 bf_get(lpfc_mqe_status, &mbox->u.mqe));
6481 mempool_free(mbox, phba->mbox_mem_pool);
6482 rc = -EIO;
6483 goto mem_free;
6484 } else
6485 rc = 0;
6486mem_free:
6487 if (rc)
6488 lpfc_sli4_ras_dma_free(phba);
6489
6490 return rc;
6491}
6492
6493/**
6494 * lpfc_sli4_ras_setup - Check if RAS supported on the adapter
6495 * @phba: Pointer to HBA context object.
6496 *
6497 * Check if RAS is supported on the adapter and initialize it.
6498 **/
6499void
6500lpfc_sli4_ras_setup(struct lpfc_hba *phba)
6501{
6502 /* Check RAS FW Log needs to be enabled or not */
6503 if (lpfc_check_fwlog_support(phba))
6504 return;
6505
6506 lpfc_sli4_ras_fwlog_init(phba, phba->cfg_ras_fwlog_level,
6507 LPFC_RAS_ENABLE_LOGGING);
6508}
6509
6d368e53
JS
6510/**
6511 * lpfc_sli4_alloc_resource_identifiers - Allocate all SLI4 resource extents.
6512 * @phba: Pointer to HBA context object.
6513 *
6514 * This function allocates all SLI4 resource identifiers.
6515 **/
6516int
6517lpfc_sli4_alloc_resource_identifiers(struct lpfc_hba *phba)
6518{
6519 int i, rc, error = 0;
6520 uint16_t count, base;
6521 unsigned long longs;
6522
ff78d8f9
JS
6523 if (!phba->sli4_hba.rpi_hdrs_in_use)
6524 phba->sli4_hba.next_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
6d368e53
JS
6525 if (phba->sli4_hba.extents_in_use) {
6526 /*
6527 * The port supports resource extents. The XRI, VPI, VFI, RPI
6528 * resource extent count must be read and allocated before
6529 * provisioning the resource id arrays.
6530 */
6531 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
6532 LPFC_IDX_RSRC_RDY) {
6533 /*
6534 * Extent-based resources are set - the driver could
6535 * be in a port reset. Figure out if any corrective
6536 * actions need to be taken.
6537 */
6538 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6539 LPFC_RSC_TYPE_FCOE_VFI);
6540 if (rc != 0)
6541 error++;
6542 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6543 LPFC_RSC_TYPE_FCOE_VPI);
6544 if (rc != 0)
6545 error++;
6546 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6547 LPFC_RSC_TYPE_FCOE_XRI);
6548 if (rc != 0)
6549 error++;
6550 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6551 LPFC_RSC_TYPE_FCOE_RPI);
6552 if (rc != 0)
6553 error++;
6554
6555 /*
6556 * It's possible that the number of resources
6557 * provided to this port instance changed between
6558 * resets. Detect this condition and reallocate
6559 * resources. Otherwise, there is no action.
6560 */
6561 if (error) {
6562 lpfc_printf_log(phba, KERN_INFO,
6563 LOG_MBOX | LOG_INIT,
6564 "2931 Detected extent resource "
6565 "change. Reallocating all "
6566 "extents.\n");
6567 rc = lpfc_sli4_dealloc_extent(phba,
6568 LPFC_RSC_TYPE_FCOE_VFI);
6569 rc = lpfc_sli4_dealloc_extent(phba,
6570 LPFC_RSC_TYPE_FCOE_VPI);
6571 rc = lpfc_sli4_dealloc_extent(phba,
6572 LPFC_RSC_TYPE_FCOE_XRI);
6573 rc = lpfc_sli4_dealloc_extent(phba,
6574 LPFC_RSC_TYPE_FCOE_RPI);
6575 } else
6576 return 0;
6577 }
6578
6579 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6580 if (unlikely(rc))
6581 goto err_exit;
6582
6583 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6584 if (unlikely(rc))
6585 goto err_exit;
6586
6587 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6588 if (unlikely(rc))
6589 goto err_exit;
6590
6591 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6592 if (unlikely(rc))
6593 goto err_exit;
6594 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6595 LPFC_IDX_RSRC_RDY);
6596 return rc;
6597 } else {
6598 /*
6599 * The port does not support resource extents. The XRI, VPI,
6600 * VFI, RPI resource ids were determined from READ_CONFIG.
6601 * Just allocate the bitmasks and provision the resource id
6602 * arrays. If a port reset is active, the resources don't
6603 * need any action - just exit.
6604 */
6605 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
ff78d8f9
JS
6606 LPFC_IDX_RSRC_RDY) {
6607 lpfc_sli4_dealloc_resource_identifiers(phba);
6608 lpfc_sli4_remove_rpis(phba);
6609 }
6d368e53
JS
6610 /* RPIs. */
6611 count = phba->sli4_hba.max_cfg_param.max_rpi;
0a630c27
JS
6612 if (count <= 0) {
6613 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6614 "3279 Invalid provisioning of "
6615 "rpi:%d\n", count);
6616 rc = -EINVAL;
6617 goto err_exit;
6618 }
6d368e53
JS
6619 base = phba->sli4_hba.max_cfg_param.rpi_base;
6620 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6621 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
6622 sizeof(unsigned long),
6623 GFP_KERNEL);
6624 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
6625 rc = -ENOMEM;
6626 goto err_exit;
6627 }
6396bb22 6628 phba->sli4_hba.rpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6629 GFP_KERNEL);
6630 if (unlikely(!phba->sli4_hba.rpi_ids)) {
6631 rc = -ENOMEM;
6632 goto free_rpi_bmask;
6633 }
6634
6635 for (i = 0; i < count; i++)
6636 phba->sli4_hba.rpi_ids[i] = base + i;
6637
6638 /* VPIs. */
6639 count = phba->sli4_hba.max_cfg_param.max_vpi;
0a630c27
JS
6640 if (count <= 0) {
6641 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6642 "3280 Invalid provisioning of "
6643 "vpi:%d\n", count);
6644 rc = -EINVAL;
6645 goto free_rpi_ids;
6646 }
6d368e53
JS
6647 base = phba->sli4_hba.max_cfg_param.vpi_base;
6648 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6649 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
6650 GFP_KERNEL);
6651 if (unlikely(!phba->vpi_bmask)) {
6652 rc = -ENOMEM;
6653 goto free_rpi_ids;
6654 }
6396bb22 6655 phba->vpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6656 GFP_KERNEL);
6657 if (unlikely(!phba->vpi_ids)) {
6658 rc = -ENOMEM;
6659 goto free_vpi_bmask;
6660 }
6661
6662 for (i = 0; i < count; i++)
6663 phba->vpi_ids[i] = base + i;
6664
6665 /* XRIs. */
6666 count = phba->sli4_hba.max_cfg_param.max_xri;
0a630c27
JS
6667 if (count <= 0) {
6668 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6669 "3281 Invalid provisioning of "
6670 "xri:%d\n", count);
6671 rc = -EINVAL;
6672 goto free_vpi_ids;
6673 }
6d368e53
JS
6674 base = phba->sli4_hba.max_cfg_param.xri_base;
6675 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6676 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
6677 sizeof(unsigned long),
6678 GFP_KERNEL);
6679 if (unlikely(!phba->sli4_hba.xri_bmask)) {
6680 rc = -ENOMEM;
6681 goto free_vpi_ids;
6682 }
41899be7 6683 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 6684 phba->sli4_hba.xri_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6685 GFP_KERNEL);
6686 if (unlikely(!phba->sli4_hba.xri_ids)) {
6687 rc = -ENOMEM;
6688 goto free_xri_bmask;
6689 }
6690
6691 for (i = 0; i < count; i++)
6692 phba->sli4_hba.xri_ids[i] = base + i;
6693
6694 /* VFIs. */
6695 count = phba->sli4_hba.max_cfg_param.max_vfi;
0a630c27
JS
6696 if (count <= 0) {
6697 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6698 "3282 Invalid provisioning of "
6699 "vfi:%d\n", count);
6700 rc = -EINVAL;
6701 goto free_xri_ids;
6702 }
6d368e53
JS
6703 base = phba->sli4_hba.max_cfg_param.vfi_base;
6704 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6705 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
6706 sizeof(unsigned long),
6707 GFP_KERNEL);
6708 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
6709 rc = -ENOMEM;
6710 goto free_xri_ids;
6711 }
6396bb22 6712 phba->sli4_hba.vfi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6713 GFP_KERNEL);
6714 if (unlikely(!phba->sli4_hba.vfi_ids)) {
6715 rc = -ENOMEM;
6716 goto free_vfi_bmask;
6717 }
6718
6719 for (i = 0; i < count; i++)
6720 phba->sli4_hba.vfi_ids[i] = base + i;
6721
6722 /*
6723 * Mark all resources ready. An HBA reset doesn't need
6724 * to reset the initialization.
6725 */
6726 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6727 LPFC_IDX_RSRC_RDY);
6728 return 0;
6729 }
6730
6731 free_vfi_bmask:
6732 kfree(phba->sli4_hba.vfi_bmask);
cd60be49 6733 phba->sli4_hba.vfi_bmask = NULL;
6d368e53
JS
6734 free_xri_ids:
6735 kfree(phba->sli4_hba.xri_ids);
cd60be49 6736 phba->sli4_hba.xri_ids = NULL;
6d368e53
JS
6737 free_xri_bmask:
6738 kfree(phba->sli4_hba.xri_bmask);
cd60be49 6739 phba->sli4_hba.xri_bmask = NULL;
6d368e53
JS
6740 free_vpi_ids:
6741 kfree(phba->vpi_ids);
cd60be49 6742 phba->vpi_ids = NULL;
6d368e53
JS
6743 free_vpi_bmask:
6744 kfree(phba->vpi_bmask);
cd60be49 6745 phba->vpi_bmask = NULL;
6d368e53
JS
6746 free_rpi_ids:
6747 kfree(phba->sli4_hba.rpi_ids);
cd60be49 6748 phba->sli4_hba.rpi_ids = NULL;
6d368e53
JS
6749 free_rpi_bmask:
6750 kfree(phba->sli4_hba.rpi_bmask);
cd60be49 6751 phba->sli4_hba.rpi_bmask = NULL;
6d368e53
JS
6752 err_exit:
6753 return rc;
6754}
6755
6756/**
6757 * lpfc_sli4_dealloc_resource_identifiers - Deallocate all SLI4 resource extents.
6758 * @phba: Pointer to HBA context object.
6759 *
6760 * This function allocates the number of elements for the specified
6761 * resource type.
6762 **/
6763int
6764lpfc_sli4_dealloc_resource_identifiers(struct lpfc_hba *phba)
6765{
6766 if (phba->sli4_hba.extents_in_use) {
6767 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6768 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6769 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6770 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6771 } else {
6772 kfree(phba->vpi_bmask);
16a3a208 6773 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6774 kfree(phba->vpi_ids);
6775 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6776 kfree(phba->sli4_hba.xri_bmask);
6777 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6778 kfree(phba->sli4_hba.vfi_bmask);
6779 kfree(phba->sli4_hba.vfi_ids);
6780 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6781 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6782 }
6783
6784 return 0;
6785}
6786
b76f2dc9
JS
6787/**
6788 * lpfc_sli4_get_allocated_extnts - Get the port's allocated extents.
6789 * @phba: Pointer to HBA context object.
6790 * @type: The resource extent type.
6791 * @extnt_count: buffer to hold port extent count response
6792 * @extnt_size: buffer to hold port extent size response.
6793 *
6794 * This function calls the port to read the host allocated extents
6795 * for a particular type.
6796 **/
6797int
6798lpfc_sli4_get_allocated_extnts(struct lpfc_hba *phba, uint16_t type,
6799 uint16_t *extnt_cnt, uint16_t *extnt_size)
6800{
6801 bool emb;
6802 int rc = 0;
6803 uint16_t curr_blks = 0;
6804 uint32_t req_len, emb_len;
6805 uint32_t alloc_len, mbox_tmo;
6806 struct list_head *blk_list_head;
6807 struct lpfc_rsrc_blks *rsrc_blk;
6808 LPFC_MBOXQ_t *mbox;
6809 void *virtaddr = NULL;
6810 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
6811 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
6812 union lpfc_sli4_cfg_shdr *shdr;
6813
6814 switch (type) {
6815 case LPFC_RSC_TYPE_FCOE_VPI:
6816 blk_list_head = &phba->lpfc_vpi_blk_list;
6817 break;
6818 case LPFC_RSC_TYPE_FCOE_XRI:
6819 blk_list_head = &phba->sli4_hba.lpfc_xri_blk_list;
6820 break;
6821 case LPFC_RSC_TYPE_FCOE_VFI:
6822 blk_list_head = &phba->sli4_hba.lpfc_vfi_blk_list;
6823 break;
6824 case LPFC_RSC_TYPE_FCOE_RPI:
6825 blk_list_head = &phba->sli4_hba.lpfc_rpi_blk_list;
6826 break;
6827 default:
6828 return -EIO;
6829 }
6830
6831 /* Count the number of extents currently allocatd for this type. */
6832 list_for_each_entry(rsrc_blk, blk_list_head, list) {
6833 if (curr_blks == 0) {
6834 /*
6835 * The GET_ALLOCATED mailbox does not return the size,
6836 * just the count. The size should be just the size
6837 * stored in the current allocated block and all sizes
6838 * for an extent type are the same so set the return
6839 * value now.
6840 */
6841 *extnt_size = rsrc_blk->rsrc_size;
6842 }
6843 curr_blks++;
6844 }
6845
b76f2dc9
JS
6846 /*
6847 * Calculate the size of an embedded mailbox. The uint32_t
6848 * accounts for extents-specific word.
6849 */
6850 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
6851 sizeof(uint32_t);
6852
6853 /*
6854 * Presume the allocation and response will fit into an embedded
6855 * mailbox. If not true, reconfigure to a non-embedded mailbox.
6856 */
6857 emb = LPFC_SLI4_MBX_EMBED;
6858 req_len = emb_len;
6859 if (req_len > emb_len) {
6860 req_len = curr_blks * sizeof(uint16_t) +
6861 sizeof(union lpfc_sli4_cfg_shdr) +
6862 sizeof(uint32_t);
6863 emb = LPFC_SLI4_MBX_NEMBED;
6864 }
6865
6866 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6867 if (!mbox)
6868 return -ENOMEM;
6869 memset(mbox, 0, sizeof(LPFC_MBOXQ_t));
6870
6871 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6872 LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT,
6873 req_len, emb);
6874 if (alloc_len < req_len) {
6875 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6876 "2983 Allocated DMA memory size (x%x) is "
6877 "less than the requested DMA memory "
6878 "size (x%x)\n", alloc_len, req_len);
6879 rc = -ENOMEM;
6880 goto err_exit;
6881 }
6882 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, curr_blks, type, emb);
6883 if (unlikely(rc)) {
6884 rc = -EIO;
6885 goto err_exit;
6886 }
6887
6888 if (!phba->sli4_hba.intr_enable)
6889 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6890 else {
a183a15f 6891 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
b76f2dc9
JS
6892 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6893 }
6894
6895 if (unlikely(rc)) {
6896 rc = -EIO;
6897 goto err_exit;
6898 }
6899
6900 /*
6901 * Figure out where the response is located. Then get local pointers
6902 * to the response data. The port does not guarantee to respond to
6903 * all extents counts request so update the local variable with the
6904 * allocated count from the port.
6905 */
6906 if (emb == LPFC_SLI4_MBX_EMBED) {
6907 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
6908 shdr = &rsrc_ext->header.cfg_shdr;
6909 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
6910 } else {
6911 virtaddr = mbox->sge_array->addr[0];
6912 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
6913 shdr = &n_rsrc->cfg_shdr;
6914 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
6915 }
6916
6917 if (bf_get(lpfc_mbox_hdr_status, &shdr->response)) {
6918 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6919 "2984 Failed to read allocated resources "
6920 "for type %d - Status 0x%x Add'l Status 0x%x.\n",
6921 type,
6922 bf_get(lpfc_mbox_hdr_status, &shdr->response),
6923 bf_get(lpfc_mbox_hdr_add_status, &shdr->response));
6924 rc = -EIO;
6925 goto err_exit;
6926 }
6927 err_exit:
6928 lpfc_sli4_mbox_cmd_free(phba, mbox);
6929 return rc;
6930}
6931
8a9d2e80 6932/**
0ef69968 6933 * lpfc_sli4_repost_sgl_list - Repost the buffers sgl pages as block
8a9d2e80 6934 * @phba: pointer to lpfc hba data structure.
895427bd
JS
6935 * @pring: Pointer to driver SLI ring object.
6936 * @sgl_list: linked link of sgl buffers to post
6937 * @cnt: number of linked list buffers
8a9d2e80 6938 *
895427bd 6939 * This routine walks the list of buffers that have been allocated and
8a9d2e80
JS
6940 * repost them to the port by using SGL block post. This is needed after a
6941 * pci_function_reset/warm_start or start. It attempts to construct blocks
895427bd
JS
6942 * of buffer sgls which contains contiguous xris and uses the non-embedded
6943 * SGL block post mailbox commands to post them to the port. For single
8a9d2e80
JS
6944 * buffer sgl with non-contiguous xri, if any, it shall use embedded SGL post
6945 * mailbox command for posting.
6946 *
6947 * Returns: 0 = success, non-zero failure.
6948 **/
6949static int
895427bd
JS
6950lpfc_sli4_repost_sgl_list(struct lpfc_hba *phba,
6951 struct list_head *sgl_list, int cnt)
8a9d2e80
JS
6952{
6953 struct lpfc_sglq *sglq_entry = NULL;
6954 struct lpfc_sglq *sglq_entry_next = NULL;
6955 struct lpfc_sglq *sglq_entry_first = NULL;
895427bd
JS
6956 int status, total_cnt;
6957 int post_cnt = 0, num_posted = 0, block_cnt = 0;
8a9d2e80
JS
6958 int last_xritag = NO_XRI;
6959 LIST_HEAD(prep_sgl_list);
6960 LIST_HEAD(blck_sgl_list);
6961 LIST_HEAD(allc_sgl_list);
6962 LIST_HEAD(post_sgl_list);
6963 LIST_HEAD(free_sgl_list);
6964
38c20673 6965 spin_lock_irq(&phba->hbalock);
895427bd
JS
6966 spin_lock(&phba->sli4_hba.sgl_list_lock);
6967 list_splice_init(sgl_list, &allc_sgl_list);
6968 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 6969 spin_unlock_irq(&phba->hbalock);
8a9d2e80 6970
895427bd 6971 total_cnt = cnt;
8a9d2e80
JS
6972 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
6973 &allc_sgl_list, list) {
6974 list_del_init(&sglq_entry->list);
6975 block_cnt++;
6976 if ((last_xritag != NO_XRI) &&
6977 (sglq_entry->sli4_xritag != last_xritag + 1)) {
6978 /* a hole in xri block, form a sgl posting block */
6979 list_splice_init(&prep_sgl_list, &blck_sgl_list);
6980 post_cnt = block_cnt - 1;
6981 /* prepare list for next posting block */
6982 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6983 block_cnt = 1;
6984 } else {
6985 /* prepare list for next posting block */
6986 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6987 /* enough sgls for non-embed sgl mbox command */
6988 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
6989 list_splice_init(&prep_sgl_list,
6990 &blck_sgl_list);
6991 post_cnt = block_cnt;
6992 block_cnt = 0;
6993 }
6994 }
6995 num_posted++;
6996
6997 /* keep track of last sgl's xritag */
6998 last_xritag = sglq_entry->sli4_xritag;
6999
895427bd
JS
7000 /* end of repost sgl list condition for buffers */
7001 if (num_posted == total_cnt) {
8a9d2e80
JS
7002 if (post_cnt == 0) {
7003 list_splice_init(&prep_sgl_list,
7004 &blck_sgl_list);
7005 post_cnt = block_cnt;
7006 } else if (block_cnt == 1) {
7007 status = lpfc_sli4_post_sgl(phba,
7008 sglq_entry->phys, 0,
7009 sglq_entry->sli4_xritag);
7010 if (!status) {
7011 /* successful, put sgl to posted list */
7012 list_add_tail(&sglq_entry->list,
7013 &post_sgl_list);
7014 } else {
7015 /* Failure, put sgl to free list */
7016 lpfc_printf_log(phba, KERN_WARNING,
7017 LOG_SLI,
895427bd 7018 "3159 Failed to post "
8a9d2e80
JS
7019 "sgl, xritag:x%x\n",
7020 sglq_entry->sli4_xritag);
7021 list_add_tail(&sglq_entry->list,
7022 &free_sgl_list);
711ea882 7023 total_cnt--;
8a9d2e80
JS
7024 }
7025 }
7026 }
7027
7028 /* continue until a nembed page worth of sgls */
7029 if (post_cnt == 0)
7030 continue;
7031
895427bd
JS
7032 /* post the buffer list sgls as a block */
7033 status = lpfc_sli4_post_sgl_list(phba, &blck_sgl_list,
7034 post_cnt);
8a9d2e80
JS
7035
7036 if (!status) {
7037 /* success, put sgl list to posted sgl list */
7038 list_splice_init(&blck_sgl_list, &post_sgl_list);
7039 } else {
7040 /* Failure, put sgl list to free sgl list */
7041 sglq_entry_first = list_first_entry(&blck_sgl_list,
7042 struct lpfc_sglq,
7043 list);
7044 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
895427bd 7045 "3160 Failed to post sgl-list, "
8a9d2e80
JS
7046 "xritag:x%x-x%x\n",
7047 sglq_entry_first->sli4_xritag,
7048 (sglq_entry_first->sli4_xritag +
7049 post_cnt - 1));
7050 list_splice_init(&blck_sgl_list, &free_sgl_list);
711ea882 7051 total_cnt -= post_cnt;
8a9d2e80
JS
7052 }
7053
7054 /* don't reset xirtag due to hole in xri block */
7055 if (block_cnt == 0)
7056 last_xritag = NO_XRI;
7057
895427bd 7058 /* reset sgl post count for next round of posting */
8a9d2e80
JS
7059 post_cnt = 0;
7060 }
7061
895427bd 7062 /* free the sgls failed to post */
8a9d2e80
JS
7063 lpfc_free_sgl_list(phba, &free_sgl_list);
7064
895427bd 7065 /* push sgls posted to the available list */
8a9d2e80 7066 if (!list_empty(&post_sgl_list)) {
38c20673 7067 spin_lock_irq(&phba->hbalock);
895427bd
JS
7068 spin_lock(&phba->sli4_hba.sgl_list_lock);
7069 list_splice_init(&post_sgl_list, sgl_list);
7070 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 7071 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
7072 } else {
7073 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 7074 "3161 Failure to post sgl to port.\n");
8a9d2e80
JS
7075 return -EIO;
7076 }
895427bd
JS
7077
7078 /* return the number of XRIs actually posted */
7079 return total_cnt;
8a9d2e80
JS
7080}
7081
0794d601 7082/**
5e5b511d 7083 * lpfc_sli4_repost_io_sgl_list - Repost all the allocated nvme buffer sgls
0794d601
JS
7084 * @phba: pointer to lpfc hba data structure.
7085 *
7086 * This routine walks the list of nvme buffers that have been allocated and
7087 * repost them to the port by using SGL block post. This is needed after a
7088 * pci_function_reset/warm_start or start. The lpfc_hba_down_post_s4 routine
7089 * is responsible for moving all nvme buffers on the lpfc_abts_nvme_sgl_list
5e5b511d 7090 * to the lpfc_io_buf_list. If the repost fails, reject all nvme buffers.
0794d601
JS
7091 *
7092 * Returns: 0 = success, non-zero failure.
7093 **/
3999df75 7094static int
5e5b511d 7095lpfc_sli4_repost_io_sgl_list(struct lpfc_hba *phba)
0794d601
JS
7096{
7097 LIST_HEAD(post_nblist);
7098 int num_posted, rc = 0;
7099
7100 /* get all NVME buffers need to repost to a local list */
5e5b511d 7101 lpfc_io_buf_flush(phba, &post_nblist);
0794d601
JS
7102
7103 /* post the list of nvme buffer sgls to port if available */
7104 if (!list_empty(&post_nblist)) {
5e5b511d
JS
7105 num_posted = lpfc_sli4_post_io_sgl_list(
7106 phba, &post_nblist, phba->sli4_hba.io_xri_cnt);
0794d601
JS
7107 /* failed to post any nvme buffer, return error */
7108 if (num_posted == 0)
7109 rc = -EIO;
7110 }
7111 return rc;
7112}
7113
3999df75 7114static void
61bda8f7
JS
7115lpfc_set_host_data(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
7116{
7117 uint32_t len;
7118
7119 len = sizeof(struct lpfc_mbx_set_host_data) -
7120 sizeof(struct lpfc_sli4_cfg_mhdr);
7121 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
7122 LPFC_MBOX_OPCODE_SET_HOST_DATA, len,
7123 LPFC_SLI4_MBX_EMBED);
7124
7125 mbox->u.mqe.un.set_host_data.param_id = LPFC_SET_HOST_OS_DRIVER_VERSION;
b2fd103b
JS
7126 mbox->u.mqe.un.set_host_data.param_len =
7127 LPFC_HOST_OS_DRIVER_VERSION_SIZE;
61bda8f7
JS
7128 snprintf(mbox->u.mqe.un.set_host_data.data,
7129 LPFC_HOST_OS_DRIVER_VERSION_SIZE,
7130 "Linux %s v"LPFC_DRIVER_VERSION,
7131 (phba->hba_flag & HBA_FCOE_MODE) ? "FCoE" : "FC");
7132}
7133
a8cf5dfe 7134int
6c621a22 7135lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
a8cf5dfe 7136 struct lpfc_queue *drq, int count, int idx)
6c621a22
JS
7137{
7138 int rc, i;
7139 struct lpfc_rqe hrqe;
7140 struct lpfc_rqe drqe;
7141 struct lpfc_rqb *rqbp;
411de511 7142 unsigned long flags;
6c621a22
JS
7143 struct rqb_dmabuf *rqb_buffer;
7144 LIST_HEAD(rqb_buf_list);
7145
411de511 7146 spin_lock_irqsave(&phba->hbalock, flags);
6c621a22
JS
7147 rqbp = hrq->rqbp;
7148 for (i = 0; i < count; i++) {
7149 /* IF RQ is already full, don't bother */
7150 if (rqbp->buffer_count + i >= rqbp->entry_count - 1)
7151 break;
7152 rqb_buffer = rqbp->rqb_alloc_buffer(phba);
7153 if (!rqb_buffer)
7154 break;
7155 rqb_buffer->hrq = hrq;
7156 rqb_buffer->drq = drq;
a8cf5dfe 7157 rqb_buffer->idx = idx;
6c621a22
JS
7158 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
7159 }
7160 while (!list_empty(&rqb_buf_list)) {
7161 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
7162 hbuf.list);
7163
7164 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
7165 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
7166 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
7167 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
7168 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
7169 if (rc < 0) {
411de511
JS
7170 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7171 "6421 Cannot post to HRQ %d: %x %x %x "
7172 "DRQ %x %x\n",
7173 hrq->queue_id,
7174 hrq->host_index,
7175 hrq->hba_index,
7176 hrq->entry_count,
7177 drq->host_index,
7178 drq->hba_index);
6c621a22
JS
7179 rqbp->rqb_free_buffer(phba, rqb_buffer);
7180 } else {
7181 list_add_tail(&rqb_buffer->hbuf.list,
7182 &rqbp->rqb_buffer_list);
7183 rqbp->buffer_count++;
7184 }
7185 }
411de511 7186 spin_unlock_irqrestore(&phba->hbalock, flags);
6c621a22
JS
7187 return 1;
7188}
7189
da0436e9 7190/**
183b8021 7191 * lpfc_sli4_hba_setup - SLI4 device initialization PCI function
da0436e9
JS
7192 * @phba: Pointer to HBA context object.
7193 *
183b8021
MY
7194 * This function is the main SLI4 device initialization PCI function. This
7195 * function is called by the HBA initialization code, HBA reset code and
da0436e9
JS
7196 * HBA error attention handler code. Caller is not required to hold any
7197 * locks.
7198 **/
7199int
7200lpfc_sli4_hba_setup(struct lpfc_hba *phba)
7201{
c490850a 7202 int rc, i, cnt, len;
da0436e9
JS
7203 LPFC_MBOXQ_t *mboxq;
7204 struct lpfc_mqe *mqe;
7205 uint8_t *vpd;
7206 uint32_t vpd_size;
7207 uint32_t ftr_rsp = 0;
7208 struct Scsi_Host *shost = lpfc_shost_from_vport(phba->pport);
7209 struct lpfc_vport *vport = phba->pport;
7210 struct lpfc_dmabuf *mp;
2d7dbc4c 7211 struct lpfc_rqb *rqbp;
da0436e9
JS
7212
7213 /* Perform a PCI function reset to start from clean */
7214 rc = lpfc_pci_function_reset(phba);
7215 if (unlikely(rc))
7216 return -ENODEV;
7217
7218 /* Check the HBA Host Status Register for readyness */
7219 rc = lpfc_sli4_post_status_check(phba);
7220 if (unlikely(rc))
7221 return -ENODEV;
7222 else {
7223 spin_lock_irq(&phba->hbalock);
7224 phba->sli.sli_flag |= LPFC_SLI_ACTIVE;
7225 spin_unlock_irq(&phba->hbalock);
7226 }
7227
7228 /*
7229 * Allocate a single mailbox container for initializing the
7230 * port.
7231 */
7232 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7233 if (!mboxq)
7234 return -ENOMEM;
7235
da0436e9 7236 /* Issue READ_REV to collect vpd and FW information. */
49198b37 7237 vpd_size = SLI4_PAGE_SIZE;
da0436e9
JS
7238 vpd = kzalloc(vpd_size, GFP_KERNEL);
7239 if (!vpd) {
7240 rc = -ENOMEM;
7241 goto out_free_mbox;
7242 }
7243
7244 rc = lpfc_sli4_read_rev(phba, mboxq, vpd, &vpd_size);
76a95d75
JS
7245 if (unlikely(rc)) {
7246 kfree(vpd);
7247 goto out_free_mbox;
7248 }
572709e2 7249
da0436e9 7250 mqe = &mboxq->u.mqe;
f1126688 7251 phba->sli_rev = bf_get(lpfc_mbx_rd_rev_sli_lvl, &mqe->un.read_rev);
b5c53958 7252 if (bf_get(lpfc_mbx_rd_rev_fcoe, &mqe->un.read_rev)) {
76a95d75 7253 phba->hba_flag |= HBA_FCOE_MODE;
b5c53958
JS
7254 phba->fcp_embed_io = 0; /* SLI4 FC support only */
7255 } else {
76a95d75 7256 phba->hba_flag &= ~HBA_FCOE_MODE;
b5c53958 7257 }
45ed1190
JS
7258
7259 if (bf_get(lpfc_mbx_rd_rev_cee_ver, &mqe->un.read_rev) ==
7260 LPFC_DCBX_CEE_MODE)
7261 phba->hba_flag |= HBA_FIP_SUPPORT;
7262 else
7263 phba->hba_flag &= ~HBA_FIP_SUPPORT;
7264
c00f62e6 7265 phba->hba_flag &= ~HBA_IOQ_FLUSH;
4f2e66c6 7266
c31098ce 7267 if (phba->sli_rev != LPFC_SLI_REV4) {
da0436e9
JS
7268 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7269 "0376 READ_REV Error. SLI Level %d "
7270 "FCoE enabled %d\n",
76a95d75 7271 phba->sli_rev, phba->hba_flag & HBA_FCOE_MODE);
da0436e9 7272 rc = -EIO;
76a95d75
JS
7273 kfree(vpd);
7274 goto out_free_mbox;
da0436e9 7275 }
cd1c8301 7276
ff78d8f9
JS
7277 /*
7278 * Continue initialization with default values even if driver failed
7279 * to read FCoE param config regions, only read parameters if the
7280 * board is FCoE
7281 */
7282 if (phba->hba_flag & HBA_FCOE_MODE &&
7283 lpfc_sli4_read_fcoe_params(phba))
7284 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_INIT,
7285 "2570 Failed to read FCoE parameters\n");
7286
cd1c8301
JS
7287 /*
7288 * Retrieve sli4 device physical port name, failure of doing it
7289 * is considered as non-fatal.
7290 */
7291 rc = lpfc_sli4_retrieve_pport_name(phba);
7292 if (!rc)
7293 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7294 "3080 Successful retrieving SLI4 device "
7295 "physical port name: %s.\n", phba->Port);
7296
b3b4f3e1
JS
7297 rc = lpfc_sli4_get_ctl_attr(phba);
7298 if (!rc)
7299 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7300 "8351 Successful retrieving SLI4 device "
7301 "CTL ATTR\n");
7302
da0436e9
JS
7303 /*
7304 * Evaluate the read rev and vpd data. Populate the driver
7305 * state with the results. If this routine fails, the failure
7306 * is not fatal as the driver will use generic values.
7307 */
7308 rc = lpfc_parse_vpd(phba, vpd, vpd_size);
7309 if (unlikely(!rc)) {
7310 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7311 "0377 Error %d parsing vpd. "
7312 "Using defaults.\n", rc);
7313 rc = 0;
7314 }
76a95d75 7315 kfree(vpd);
da0436e9 7316
f1126688
JS
7317 /* Save information as VPD data */
7318 phba->vpd.rev.biuRev = mqe->un.read_rev.first_hw_rev;
7319 phba->vpd.rev.smRev = mqe->un.read_rev.second_hw_rev;
4e565cf0
JS
7320
7321 /*
7322 * This is because first G7 ASIC doesn't support the standard
7323 * 0x5a NVME cmd descriptor type/subtype
7324 */
7325 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7326 LPFC_SLI_INTF_IF_TYPE_6) &&
7327 (phba->vpd.rev.biuRev == LPFC_G7_ASIC_1) &&
7328 (phba->vpd.rev.smRev == 0) &&
7329 (phba->cfg_nvme_embed_cmd == 1))
7330 phba->cfg_nvme_embed_cmd = 0;
7331
f1126688
JS
7332 phba->vpd.rev.endecRev = mqe->un.read_rev.third_hw_rev;
7333 phba->vpd.rev.fcphHigh = bf_get(lpfc_mbx_rd_rev_fcph_high,
7334 &mqe->un.read_rev);
7335 phba->vpd.rev.fcphLow = bf_get(lpfc_mbx_rd_rev_fcph_low,
7336 &mqe->un.read_rev);
7337 phba->vpd.rev.feaLevelHigh = bf_get(lpfc_mbx_rd_rev_ftr_lvl_high,
7338 &mqe->un.read_rev);
7339 phba->vpd.rev.feaLevelLow = bf_get(lpfc_mbx_rd_rev_ftr_lvl_low,
7340 &mqe->un.read_rev);
7341 phba->vpd.rev.sli1FwRev = mqe->un.read_rev.fw_id_rev;
7342 memcpy(phba->vpd.rev.sli1FwName, mqe->un.read_rev.fw_name, 16);
7343 phba->vpd.rev.sli2FwRev = mqe->un.read_rev.ulp_fw_id_rev;
7344 memcpy(phba->vpd.rev.sli2FwName, mqe->un.read_rev.ulp_fw_name, 16);
7345 phba->vpd.rev.opFwRev = mqe->un.read_rev.fw_id_rev;
7346 memcpy(phba->vpd.rev.opFwName, mqe->un.read_rev.fw_name, 16);
7347 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7348 "(%d):0380 READ_REV Status x%x "
7349 "fw_rev:%s fcphHi:%x fcphLo:%x flHi:%x flLo:%x\n",
7350 mboxq->vport ? mboxq->vport->vpi : 0,
7351 bf_get(lpfc_mqe_status, mqe),
7352 phba->vpd.rev.opFwName,
7353 phba->vpd.rev.fcphHigh, phba->vpd.rev.fcphLow,
7354 phba->vpd.rev.feaLevelHigh, phba->vpd.rev.feaLevelLow);
da0436e9 7355
572709e2
JS
7356 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
7357 rc = (phba->sli4_hba.max_cfg_param.max_xri >> 3);
7358 if (phba->pport->cfg_lun_queue_depth > rc) {
7359 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7360 "3362 LUN queue depth changed from %d to %d\n",
7361 phba->pport->cfg_lun_queue_depth, rc);
7362 phba->pport->cfg_lun_queue_depth = rc;
7363 }
7364
65791f1f 7365 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7bdedb34
JS
7366 LPFC_SLI_INTF_IF_TYPE_0) {
7367 lpfc_set_features(phba, mboxq, LPFC_SET_UE_RECOVERY);
7368 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7369 if (rc == MBX_SUCCESS) {
7370 phba->hba_flag |= HBA_RECOVERABLE_UE;
7371 /* Set 1Sec interval to detect UE */
7372 phba->eratt_poll_interval = 1;
7373 phba->sli4_hba.ue_to_sr = bf_get(
7374 lpfc_mbx_set_feature_UESR,
7375 &mboxq->u.mqe.un.set_feature);
7376 phba->sli4_hba.ue_to_rp = bf_get(
7377 lpfc_mbx_set_feature_UERP,
7378 &mboxq->u.mqe.un.set_feature);
7379 }
7380 }
7381
7382 if (phba->cfg_enable_mds_diags && phba->mds_diags_support) {
7383 /* Enable MDS Diagnostics only if the SLI Port supports it */
7384 lpfc_set_features(phba, mboxq, LPFC_SET_MDS_DIAGS);
7385 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7386 if (rc != MBX_SUCCESS)
7387 phba->mds_diags_support = 0;
7388 }
572709e2 7389
da0436e9
JS
7390 /*
7391 * Discover the port's supported feature set and match it against the
7392 * hosts requests.
7393 */
7394 lpfc_request_features(phba, mboxq);
7395 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7396 if (unlikely(rc)) {
7397 rc = -EIO;
76a95d75 7398 goto out_free_mbox;
da0436e9
JS
7399 }
7400
7401 /*
7402 * The port must support FCP initiator mode as this is the
7403 * only mode running in the host.
7404 */
7405 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_fcpi, &mqe->un.req_ftrs))) {
7406 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7407 "0378 No support for fcpi mode.\n");
7408 ftr_rsp++;
7409 }
0bc2b7c5
JS
7410
7411 /* Performance Hints are ONLY for FCoE */
7412 if (phba->hba_flag & HBA_FCOE_MODE) {
7413 if (bf_get(lpfc_mbx_rq_ftr_rsp_perfh, &mqe->un.req_ftrs))
7414 phba->sli3_options |= LPFC_SLI4_PERFH_ENABLED;
7415 else
7416 phba->sli3_options &= ~LPFC_SLI4_PERFH_ENABLED;
7417 }
7418
da0436e9
JS
7419 /*
7420 * If the port cannot support the host's requested features
7421 * then turn off the global config parameters to disable the
7422 * feature in the driver. This is not a fatal error.
7423 */
f44ac12f
JS
7424 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
7425 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs))) {
7426 phba->cfg_enable_bg = 0;
7427 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
bf08611b 7428 ftr_rsp++;
f44ac12f 7429 }
bf08611b 7430 }
da0436e9
JS
7431
7432 if (phba->max_vpi && phba->cfg_enable_npiv &&
7433 !(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7434 ftr_rsp++;
7435
7436 if (ftr_rsp) {
7437 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7438 "0379 Feature Mismatch Data: x%08x %08x "
7439 "x%x x%x x%x\n", mqe->un.req_ftrs.word2,
7440 mqe->un.req_ftrs.word3, phba->cfg_enable_bg,
7441 phba->cfg_enable_npiv, phba->max_vpi);
7442 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs)))
7443 phba->cfg_enable_bg = 0;
7444 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7445 phba->cfg_enable_npiv = 0;
7446 }
7447
7448 /* These SLI3 features are assumed in SLI4 */
7449 spin_lock_irq(&phba->hbalock);
7450 phba->sli3_options |= (LPFC_SLI3_NPIV_ENABLED | LPFC_SLI3_HBQ_ENABLED);
7451 spin_unlock_irq(&phba->hbalock);
7452
6d368e53
JS
7453 /*
7454 * Allocate all resources (xri,rpi,vpi,vfi) now. Subsequent
7455 * calls depends on these resources to complete port setup.
7456 */
7457 rc = lpfc_sli4_alloc_resource_identifiers(phba);
7458 if (rc) {
7459 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7460 "2920 Failed to alloc Resource IDs "
7461 "rc = x%x\n", rc);
7462 goto out_free_mbox;
7463 }
7464
61bda8f7
JS
7465 lpfc_set_host_data(phba, mboxq);
7466
7467 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7468 if (rc) {
7469 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7470 "2134 Failed to set host os driver version %x",
7471 rc);
7472 }
7473
da0436e9 7474 /* Read the port's service parameters. */
9f1177a3
JS
7475 rc = lpfc_read_sparam(phba, mboxq, vport->vpi);
7476 if (rc) {
7477 phba->link_state = LPFC_HBA_ERROR;
7478 rc = -ENOMEM;
76a95d75 7479 goto out_free_mbox;
9f1177a3
JS
7480 }
7481
da0436e9
JS
7482 mboxq->vport = vport;
7483 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3e1f0718 7484 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
7485 if (rc == MBX_SUCCESS) {
7486 memcpy(&vport->fc_sparam, mp->virt, sizeof(struct serv_parm));
7487 rc = 0;
7488 }
7489
7490 /*
7491 * This memory was allocated by the lpfc_read_sparam routine. Release
7492 * it to the mbuf pool.
7493 */
7494 lpfc_mbuf_free(phba, mp->virt, mp->phys);
7495 kfree(mp);
3e1f0718 7496 mboxq->ctx_buf = NULL;
da0436e9
JS
7497 if (unlikely(rc)) {
7498 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7499 "0382 READ_SPARAM command failed "
7500 "status %d, mbxStatus x%x\n",
7501 rc, bf_get(lpfc_mqe_status, mqe));
7502 phba->link_state = LPFC_HBA_ERROR;
7503 rc = -EIO;
76a95d75 7504 goto out_free_mbox;
da0436e9
JS
7505 }
7506
0558056c 7507 lpfc_update_vport_wwn(vport);
da0436e9
JS
7508
7509 /* Update the fc_host data structures with new wwn. */
7510 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
7511 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
7512
895427bd
JS
7513 /* Create all the SLI4 queues */
7514 rc = lpfc_sli4_queue_create(phba);
7515 if (rc) {
7516 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7517 "3089 Failed to allocate queues\n");
7518 rc = -ENODEV;
7519 goto out_free_mbox;
7520 }
7521 /* Set up all the queues to the device */
7522 rc = lpfc_sli4_queue_setup(phba);
7523 if (unlikely(rc)) {
7524 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7525 "0381 Error %d during queue setup.\n ", rc);
7526 goto out_stop_timers;
7527 }
7528 /* Initialize the driver internal SLI layer lists. */
7529 lpfc_sli4_setup(phba);
7530 lpfc_sli4_queue_init(phba);
7531
7532 /* update host els xri-sgl sizes and mappings */
7533 rc = lpfc_sli4_els_sgl_update(phba);
8a9d2e80
JS
7534 if (unlikely(rc)) {
7535 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7536 "1400 Failed to update xri-sgl size and "
7537 "mapping: %d\n", rc);
895427bd 7538 goto out_destroy_queue;
da0436e9
JS
7539 }
7540
8a9d2e80 7541 /* register the els sgl pool to the port */
895427bd
JS
7542 rc = lpfc_sli4_repost_sgl_list(phba, &phba->sli4_hba.lpfc_els_sgl_list,
7543 phba->sli4_hba.els_xri_cnt);
7544 if (unlikely(rc < 0)) {
8a9d2e80
JS
7545 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7546 "0582 Error %d during els sgl post "
7547 "operation\n", rc);
7548 rc = -ENODEV;
895427bd 7549 goto out_destroy_queue;
8a9d2e80 7550 }
895427bd 7551 phba->sli4_hba.els_xri_cnt = rc;
8a9d2e80 7552
f358dd0c
JS
7553 if (phba->nvmet_support) {
7554 /* update host nvmet xri-sgl sizes and mappings */
7555 rc = lpfc_sli4_nvmet_sgl_update(phba);
7556 if (unlikely(rc)) {
7557 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7558 "6308 Failed to update nvmet-sgl size "
7559 "and mapping: %d\n", rc);
7560 goto out_destroy_queue;
7561 }
7562
7563 /* register the nvmet sgl pool to the port */
7564 rc = lpfc_sli4_repost_sgl_list(
7565 phba,
7566 &phba->sli4_hba.lpfc_nvmet_sgl_list,
7567 phba->sli4_hba.nvmet_xri_cnt);
7568 if (unlikely(rc < 0)) {
7569 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7570 "3117 Error %d during nvmet "
7571 "sgl post\n", rc);
7572 rc = -ENODEV;
7573 goto out_destroy_queue;
7574 }
7575 phba->sli4_hba.nvmet_xri_cnt = rc;
6c621a22 7576
a5f7337f
JS
7577 /* We allocate an iocbq for every receive context SGL.
7578 * The additional allocation is for abort and ls handling.
7579 */
7580 cnt = phba->sli4_hba.nvmet_xri_cnt +
7581 phba->sli4_hba.max_cfg_param.max_xri;
f358dd0c 7582 } else {
0794d601 7583 /* update host common xri-sgl sizes and mappings */
5e5b511d 7584 rc = lpfc_sli4_io_sgl_update(phba);
895427bd
JS
7585 if (unlikely(rc)) {
7586 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
0794d601 7587 "6082 Failed to update nvme-sgl size "
895427bd
JS
7588 "and mapping: %d\n", rc);
7589 goto out_destroy_queue;
7590 }
7591
0794d601 7592 /* register the allocated common sgl pool to the port */
5e5b511d 7593 rc = lpfc_sli4_repost_io_sgl_list(phba);
895427bd
JS
7594 if (unlikely(rc)) {
7595 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
0794d601
JS
7596 "6116 Error %d during nvme sgl post "
7597 "operation\n", rc);
7598 /* Some NVME buffers were moved to abort nvme list */
7599 /* A pci function reset will repost them */
7600 rc = -ENODEV;
895427bd
JS
7601 goto out_destroy_queue;
7602 }
a5f7337f
JS
7603 /* Each lpfc_io_buf job structure has an iocbq element.
7604 * This cnt provides for abort, els, ct and ls requests.
7605 */
7606 cnt = phba->sli4_hba.max_cfg_param.max_xri;
11e644e2
JS
7607 }
7608
7609 if (!phba->sli.iocbq_lookup) {
6c621a22
JS
7610 /* Initialize and populate the iocb list per host */
7611 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a5f7337f
JS
7612 "2821 initialize iocb list with %d entries\n",
7613 cnt);
6c621a22
JS
7614 rc = lpfc_init_iocb_list(phba, cnt);
7615 if (rc) {
7616 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11e644e2 7617 "1413 Failed to init iocb list.\n");
6c621a22
JS
7618 goto out_destroy_queue;
7619 }
895427bd
JS
7620 }
7621
11e644e2
JS
7622 if (phba->nvmet_support)
7623 lpfc_nvmet_create_targetport(phba);
7624
2d7dbc4c 7625 if (phba->nvmet_support && phba->cfg_nvmet_mrq) {
2d7dbc4c
JS
7626 /* Post initial buffers to all RQs created */
7627 for (i = 0; i < phba->cfg_nvmet_mrq; i++) {
7628 rqbp = phba->sli4_hba.nvmet_mrq_hdr[i]->rqbp;
7629 INIT_LIST_HEAD(&rqbp->rqb_buffer_list);
7630 rqbp->rqb_alloc_buffer = lpfc_sli4_nvmet_alloc;
7631 rqbp->rqb_free_buffer = lpfc_sli4_nvmet_free;
61f3d4bf 7632 rqbp->entry_count = LPFC_NVMET_RQE_DEF_COUNT;
2d7dbc4c
JS
7633 rqbp->buffer_count = 0;
7634
2d7dbc4c
JS
7635 lpfc_post_rq_buffer(
7636 phba, phba->sli4_hba.nvmet_mrq_hdr[i],
7637 phba->sli4_hba.nvmet_mrq_data[i],
2448e484 7638 phba->cfg_nvmet_mrq_post, i);
2d7dbc4c
JS
7639 }
7640 }
7641
da0436e9
JS
7642 /* Post the rpi header region to the device. */
7643 rc = lpfc_sli4_post_all_rpi_hdrs(phba);
7644 if (unlikely(rc)) {
7645 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7646 "0393 Error %d during rpi post operation\n",
7647 rc);
7648 rc = -ENODEV;
895427bd 7649 goto out_destroy_queue;
da0436e9 7650 }
97f2ecf1 7651 lpfc_sli4_node_prep(phba);
da0436e9 7652
895427bd 7653 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
2d7dbc4c 7654 if ((phba->nvmet_support == 0) || (phba->cfg_nvmet_mrq == 1)) {
895427bd
JS
7655 /*
7656 * The FC Port needs to register FCFI (index 0)
7657 */
7658 lpfc_reg_fcfi(phba, mboxq);
7659 mboxq->vport = phba->pport;
7660 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7661 if (rc != MBX_SUCCESS)
7662 goto out_unset_queue;
7663 rc = 0;
7664 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_fcfi,
7665 &mboxq->u.mqe.un.reg_fcfi);
2d7dbc4c
JS
7666 } else {
7667 /* We are a NVME Target mode with MRQ > 1 */
7668
7669 /* First register the FCFI */
7670 lpfc_reg_fcfi_mrq(phba, mboxq, 0);
7671 mboxq->vport = phba->pport;
7672 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7673 if (rc != MBX_SUCCESS)
7674 goto out_unset_queue;
7675 rc = 0;
7676 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_mrq_fcfi,
7677 &mboxq->u.mqe.un.reg_fcfi_mrq);
7678
7679 /* Next register the MRQs */
7680 lpfc_reg_fcfi_mrq(phba, mboxq, 1);
7681 mboxq->vport = phba->pport;
7682 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7683 if (rc != MBX_SUCCESS)
7684 goto out_unset_queue;
7685 rc = 0;
895427bd
JS
7686 }
7687 /* Check if the port is configured to be disabled */
7688 lpfc_sli_read_link_ste(phba);
da0436e9
JS
7689 }
7690
c490850a
JS
7691 /* Don't post more new bufs if repost already recovered
7692 * the nvme sgls.
7693 */
7694 if (phba->nvmet_support == 0) {
7695 if (phba->sli4_hba.io_xri_cnt == 0) {
7696 len = lpfc_new_io_buf(
7697 phba, phba->sli4_hba.io_xri_max);
7698 if (len == 0) {
7699 rc = -ENOMEM;
7700 goto out_unset_queue;
7701 }
7702
7703 if (phba->cfg_xri_rebalancing)
7704 lpfc_create_multixri_pools(phba);
7705 }
7706 } else {
7707 phba->cfg_xri_rebalancing = 0;
7708 }
7709
da0436e9
JS
7710 /* Allow asynchronous mailbox command to go through */
7711 spin_lock_irq(&phba->hbalock);
7712 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
7713 spin_unlock_irq(&phba->hbalock);
7714
7715 /* Post receive buffers to the device */
7716 lpfc_sli4_rb_setup(phba);
7717
fc2b989b
JS
7718 /* Reset HBA FCF states after HBA reset */
7719 phba->fcf.fcf_flag = 0;
7720 phba->fcf.current_rec.flag = 0;
7721
da0436e9 7722 /* Start the ELS watchdog timer */
8fa38513 7723 mod_timer(&vport->els_tmofunc,
256ec0d0 7724 jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov * 2)));
da0436e9
JS
7725
7726 /* Start heart beat timer */
7727 mod_timer(&phba->hb_tmofunc,
256ec0d0 7728 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
da0436e9
JS
7729 phba->hb_outstanding = 0;
7730 phba->last_completion_time = jiffies;
7731
32517fc0
JS
7732 /* start eq_delay heartbeat */
7733 if (phba->cfg_auto_imax)
7734 queue_delayed_work(phba->wq, &phba->eq_delay_work,
7735 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
7736
da0436e9 7737 /* Start error attention (ERATT) polling timer */
256ec0d0 7738 mod_timer(&phba->eratt_poll,
65791f1f 7739 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
da0436e9 7740
75baf696
JS
7741 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
7742 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
7743 rc = pci_enable_pcie_error_reporting(phba->pcidev);
7744 if (!rc) {
7745 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7746 "2829 This device supports "
7747 "Advanced Error Reporting (AER)\n");
7748 spin_lock_irq(&phba->hbalock);
7749 phba->hba_flag |= HBA_AER_ENABLED;
7750 spin_unlock_irq(&phba->hbalock);
7751 } else {
7752 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7753 "2830 This device does not support "
7754 "Advanced Error Reporting (AER)\n");
7755 phba->cfg_aer_support = 0;
7756 }
0a96e975 7757 rc = 0;
75baf696
JS
7758 }
7759
da0436e9
JS
7760 /*
7761 * The port is ready, set the host's link state to LINK_DOWN
7762 * in preparation for link interrupts.
7763 */
da0436e9
JS
7764 spin_lock_irq(&phba->hbalock);
7765 phba->link_state = LPFC_LINK_DOWN;
1dc5ec24
JS
7766
7767 /* Check if physical ports are trunked */
7768 if (bf_get(lpfc_conf_trunk_port0, &phba->sli4_hba))
7769 phba->trunk_link.link0.state = LPFC_LINK_DOWN;
7770 if (bf_get(lpfc_conf_trunk_port1, &phba->sli4_hba))
7771 phba->trunk_link.link1.state = LPFC_LINK_DOWN;
7772 if (bf_get(lpfc_conf_trunk_port2, &phba->sli4_hba))
7773 phba->trunk_link.link2.state = LPFC_LINK_DOWN;
7774 if (bf_get(lpfc_conf_trunk_port3, &phba->sli4_hba))
7775 phba->trunk_link.link3.state = LPFC_LINK_DOWN;
da0436e9 7776 spin_unlock_irq(&phba->hbalock);
1dc5ec24 7777
e8869f5b
JS
7778 /* Arm the CQs and then EQs on device */
7779 lpfc_sli4_arm_cqeq_intr(phba);
7780
7781 /* Indicate device interrupt mode */
7782 phba->sli4_hba.intr_enable = 1;
7783
026abb87
JS
7784 if (!(phba->hba_flag & HBA_FCOE_MODE) &&
7785 (phba->hba_flag & LINK_DISABLED)) {
7786 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7787 "3103 Adapter Link is disabled.\n");
7788 lpfc_down_link(phba, mboxq);
7789 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7790 if (rc != MBX_SUCCESS) {
7791 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7792 "3104 Adapter failed to issue "
7793 "DOWN_LINK mbox cmd, rc:x%x\n", rc);
c490850a 7794 goto out_io_buff_free;
026abb87
JS
7795 }
7796 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
1b51197d
JS
7797 /* don't perform init_link on SLI4 FC port loopback test */
7798 if (!(phba->link_flag & LS_LOOPBACK_MODE)) {
7799 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
7800 if (rc)
c490850a 7801 goto out_io_buff_free;
1b51197d 7802 }
5350d872
JS
7803 }
7804 mempool_free(mboxq, phba->mbox_mem_pool);
7805 return rc;
c490850a
JS
7806out_io_buff_free:
7807 /* Free allocated IO Buffers */
7808 lpfc_io_free(phba);
76a95d75 7809out_unset_queue:
da0436e9 7810 /* Unset all the queues set up in this routine when error out */
5350d872
JS
7811 lpfc_sli4_queue_unset(phba);
7812out_destroy_queue:
6c621a22 7813 lpfc_free_iocb_list(phba);
5350d872 7814 lpfc_sli4_queue_destroy(phba);
da0436e9 7815out_stop_timers:
5350d872 7816 lpfc_stop_hba_timers(phba);
da0436e9
JS
7817out_free_mbox:
7818 mempool_free(mboxq, phba->mbox_mem_pool);
7819 return rc;
7820}
7821
7822/**
7823 * lpfc_mbox_timeout - Timeout call back function for mbox timer
7824 * @ptr: context object - pointer to hba structure.
7825 *
7826 * This is the callback function for mailbox timer. The mailbox
7827 * timer is armed when a new mailbox command is issued and the timer
7828 * is deleted when the mailbox complete. The function is called by
7829 * the kernel timer code when a mailbox does not complete within
7830 * expected time. This function wakes up the worker thread to
7831 * process the mailbox timeout and returns. All the processing is
7832 * done by the worker thread function lpfc_mbox_timeout_handler.
7833 **/
7834void
f22eb4d3 7835lpfc_mbox_timeout(struct timer_list *t)
da0436e9 7836{
f22eb4d3 7837 struct lpfc_hba *phba = from_timer(phba, t, sli.mbox_tmo);
da0436e9
JS
7838 unsigned long iflag;
7839 uint32_t tmo_posted;
7840
7841 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
7842 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
7843 if (!tmo_posted)
7844 phba->pport->work_port_events |= WORKER_MBOX_TMO;
7845 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
7846
7847 if (!tmo_posted)
7848 lpfc_worker_wake_up(phba);
7849 return;
7850}
7851
e8d3c3b1
JS
7852/**
7853 * lpfc_sli4_mbox_completions_pending - check to see if any mailbox completions
7854 * are pending
7855 * @phba: Pointer to HBA context object.
7856 *
7857 * This function checks if any mailbox completions are present on the mailbox
7858 * completion queue.
7859 **/
3bb11fc5 7860static bool
e8d3c3b1
JS
7861lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba)
7862{
7863
7864 uint32_t idx;
7865 struct lpfc_queue *mcq;
7866 struct lpfc_mcqe *mcqe;
7867 bool pending_completions = false;
7365f6fd 7868 uint8_t qe_valid;
e8d3c3b1
JS
7869
7870 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7871 return false;
7872
7873 /* Check for completions on mailbox completion queue */
7874
7875 mcq = phba->sli4_hba.mbx_cq;
7876 idx = mcq->hba_index;
7365f6fd 7877 qe_valid = mcq->qe_valid;
9afbee3d
JS
7878 while (bf_get_le32(lpfc_cqe_valid,
7879 (struct lpfc_cqe *)lpfc_sli4_qe(mcq, idx)) == qe_valid) {
7880 mcqe = (struct lpfc_mcqe *)(lpfc_sli4_qe(mcq, idx));
e8d3c3b1
JS
7881 if (bf_get_le32(lpfc_trailer_completed, mcqe) &&
7882 (!bf_get_le32(lpfc_trailer_async, mcqe))) {
7883 pending_completions = true;
7884 break;
7885 }
7886 idx = (idx + 1) % mcq->entry_count;
7887 if (mcq->hba_index == idx)
7888 break;
7365f6fd
JS
7889
7890 /* if the index wrapped around, toggle the valid bit */
7891 if (phba->sli4_hba.pc_sli4_params.cqav && !idx)
7892 qe_valid = (qe_valid) ? 0 : 1;
e8d3c3b1
JS
7893 }
7894 return pending_completions;
7895
7896}
7897
7898/**
7899 * lpfc_sli4_process_missed_mbox_completions - process mbox completions
7900 * that were missed.
7901 * @phba: Pointer to HBA context object.
7902 *
7903 * For sli4, it is possible to miss an interrupt. As such mbox completions
7904 * maybe missed causing erroneous mailbox timeouts to occur. This function
7905 * checks to see if mbox completions are on the mailbox completion queue
7906 * and will process all the completions associated with the eq for the
7907 * mailbox completion queue.
7908 **/
d7b761b0 7909static bool
e8d3c3b1
JS
7910lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba)
7911{
b71413dd 7912 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
e8d3c3b1
JS
7913 uint32_t eqidx;
7914 struct lpfc_queue *fpeq = NULL;
657add4e 7915 struct lpfc_queue *eq;
e8d3c3b1
JS
7916 bool mbox_pending;
7917
7918 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7919 return false;
7920
657add4e
JS
7921 /* Find the EQ associated with the mbox CQ */
7922 if (sli4_hba->hdwq) {
7923 for (eqidx = 0; eqidx < phba->cfg_irq_chann; eqidx++) {
7924 eq = phba->sli4_hba.hba_eq_hdl[eqidx].eq;
7925 if (eq->queue_id == sli4_hba->mbx_cq->assoc_qid) {
7926 fpeq = eq;
e8d3c3b1
JS
7927 break;
7928 }
657add4e
JS
7929 }
7930 }
e8d3c3b1
JS
7931 if (!fpeq)
7932 return false;
7933
7934 /* Turn off interrupts from this EQ */
7935
b71413dd 7936 sli4_hba->sli4_eq_clr_intr(fpeq);
e8d3c3b1
JS
7937
7938 /* Check to see if a mbox completion is pending */
7939
7940 mbox_pending = lpfc_sli4_mbox_completions_pending(phba);
7941
7942 /*
7943 * If a mbox completion is pending, process all the events on EQ
7944 * associated with the mbox completion queue (this could include
7945 * mailbox commands, async events, els commands, receive queue data
7946 * and fcp commands)
7947 */
7948
7949 if (mbox_pending)
32517fc0
JS
7950 /* process and rearm the EQ */
7951 lpfc_sli4_process_eq(phba, fpeq);
7952 else
7953 /* Always clear and re-arm the EQ */
7954 sli4_hba->sli4_write_eq_db(phba, fpeq, 0, LPFC_QUEUE_REARM);
e8d3c3b1
JS
7955
7956 return mbox_pending;
7957
7958}
da0436e9
JS
7959
7960/**
7961 * lpfc_mbox_timeout_handler - Worker thread function to handle mailbox timeout
7962 * @phba: Pointer to HBA context object.
7963 *
7964 * This function is called from worker thread when a mailbox command times out.
7965 * The caller is not required to hold any locks. This function will reset the
7966 * HBA and recover all the pending commands.
7967 **/
7968void
7969lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
7970{
7971 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
eb016566
JS
7972 MAILBOX_t *mb = NULL;
7973
da0436e9 7974 struct lpfc_sli *psli = &phba->sli;
da0436e9 7975
e8d3c3b1
JS
7976 /* If the mailbox completed, process the completion and return */
7977 if (lpfc_sli4_process_missed_mbox_completions(phba))
7978 return;
7979
eb016566
JS
7980 if (pmbox != NULL)
7981 mb = &pmbox->u.mb;
da0436e9
JS
7982 /* Check the pmbox pointer first. There is a race condition
7983 * between the mbox timeout handler getting executed in the
7984 * worklist and the mailbox actually completing. When this
7985 * race condition occurs, the mbox_active will be NULL.
7986 */
7987 spin_lock_irq(&phba->hbalock);
7988 if (pmbox == NULL) {
7989 lpfc_printf_log(phba, KERN_WARNING,
7990 LOG_MBOX | LOG_SLI,
7991 "0353 Active Mailbox cleared - mailbox timeout "
7992 "exiting\n");
7993 spin_unlock_irq(&phba->hbalock);
7994 return;
7995 }
7996
7997 /* Mbox cmd <mbxCommand> timeout */
7998 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
32350664 7999 "0310 Mailbox command x%x timeout Data: x%x x%x x%px\n",
da0436e9
JS
8000 mb->mbxCommand,
8001 phba->pport->port_state,
8002 phba->sli.sli_flag,
8003 phba->sli.mbox_active);
8004 spin_unlock_irq(&phba->hbalock);
8005
8006 /* Setting state unknown so lpfc_sli_abort_iocb_ring
8007 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
25985edc 8008 * it to fail all outstanding SCSI IO.
da0436e9
JS
8009 */
8010 spin_lock_irq(&phba->pport->work_port_lock);
8011 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
8012 spin_unlock_irq(&phba->pport->work_port_lock);
8013 spin_lock_irq(&phba->hbalock);
8014 phba->link_state = LPFC_LINK_UNKNOWN;
f4b4c68f 8015 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
da0436e9
JS
8016 spin_unlock_irq(&phba->hbalock);
8017
db55fba8 8018 lpfc_sli_abort_fcp_rings(phba);
da0436e9
JS
8019
8020 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8021 "0345 Resetting board due to mailbox timeout\n");
8022
8023 /* Reset the HBA device */
8024 lpfc_reset_hba(phba);
8025}
8026
8027/**
8028 * lpfc_sli_issue_mbox_s3 - Issue an SLI3 mailbox command to firmware
8029 * @phba: Pointer to HBA context object.
8030 * @pmbox: Pointer to mailbox object.
8031 * @flag: Flag indicating how the mailbox need to be processed.
8032 *
8033 * This function is called by discovery code and HBA management code
8034 * to submit a mailbox command to firmware with SLI-3 interface spec. This
8035 * function gets the hbalock to protect the data structures.
8036 * The mailbox command can be submitted in polling mode, in which case
8037 * this function will wait in a polling loop for the completion of the
8038 * mailbox.
8039 * If the mailbox is submitted in no_wait mode (not polling) the
8040 * function will submit the command and returns immediately without waiting
8041 * for the mailbox completion. The no_wait is supported only when HBA
8042 * is in SLI2/SLI3 mode - interrupts are enabled.
8043 * The SLI interface allows only one mailbox pending at a time. If the
8044 * mailbox is issued in polling mode and there is already a mailbox
8045 * pending, then the function will return an error. If the mailbox is issued
8046 * in NO_WAIT mode and there is a mailbox pending already, the function
8047 * will return MBX_BUSY after queuing the mailbox into mailbox queue.
8048 * The sli layer owns the mailbox object until the completion of mailbox
8049 * command if this function return MBX_BUSY or MBX_SUCCESS. For all other
8050 * return codes the caller owns the mailbox command after the return of
8051 * the function.
e59058c4 8052 **/
3772a991
JS
8053static int
8054lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
8055 uint32_t flag)
dea3101e 8056{
bf07bdea 8057 MAILBOX_t *mbx;
2e0fef85 8058 struct lpfc_sli *psli = &phba->sli;
dea3101e 8059 uint32_t status, evtctr;
9940b97b 8060 uint32_t ha_copy, hc_copy;
dea3101e 8061 int i;
09372820 8062 unsigned long timeout;
dea3101e 8063 unsigned long drvr_flag = 0;
34b02dcd 8064 uint32_t word0, ldata;
dea3101e 8065 void __iomem *to_slim;
58da1ffb
JS
8066 int processing_queue = 0;
8067
8068 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8069 if (!pmbox) {
8568a4d2 8070 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
58da1ffb 8071 /* processing mbox queue from intr_handler */
3772a991
JS
8072 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8073 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8074 return MBX_SUCCESS;
8075 }
58da1ffb 8076 processing_queue = 1;
58da1ffb
JS
8077 pmbox = lpfc_mbox_get(phba);
8078 if (!pmbox) {
8079 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8080 return MBX_SUCCESS;
8081 }
8082 }
dea3101e 8083
ed957684 8084 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 8085 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684 8086 if(!pmbox->vport) {
58da1ffb 8087 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
ed957684 8088 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 8089 LOG_MBOX | LOG_VPORT,
e8b62011 8090 "1806 Mbox x%x failed. No vport\n",
3772a991 8091 pmbox->u.mb.mbxCommand);
ed957684 8092 dump_stack();
58da1ffb 8093 goto out_not_finished;
ed957684
JS
8094 }
8095 }
8096
8d63f375 8097 /* If the PCI channel is in offline state, do not post mbox. */
58da1ffb
JS
8098 if (unlikely(pci_channel_offline(phba->pcidev))) {
8099 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8100 goto out_not_finished;
8101 }
8d63f375 8102
a257bf90
JS
8103 /* If HBA has a deferred error attention, fail the iocb. */
8104 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
8105 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8106 goto out_not_finished;
8107 }
8108
dea3101e 8109 psli = &phba->sli;
92d7f7b0 8110
bf07bdea 8111 mbx = &pmbox->u.mb;
dea3101e
JB
8112 status = MBX_SUCCESS;
8113
2e0fef85
JS
8114 if (phba->link_state == LPFC_HBA_ERROR) {
8115 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW
8116
8117 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8118 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8119 "(%d):0311 Mailbox command x%x cannot "
8120 "issue Data: x%x x%x\n",
8121 pmbox->vport ? pmbox->vport->vpi : 0,
8122 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
58da1ffb 8123 goto out_not_finished;
41415862
JW
8124 }
8125
bf07bdea 8126 if (mbx->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT) {
9940b97b
JS
8127 if (lpfc_readl(phba->HCregaddr, &hc_copy) ||
8128 !(hc_copy & HC_MBINT_ENA)) {
8129 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8130 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
3772a991
JS
8131 "(%d):2528 Mailbox command x%x cannot "
8132 "issue Data: x%x x%x\n",
8133 pmbox->vport ? pmbox->vport->vpi : 0,
8134 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
9940b97b
JS
8135 goto out_not_finished;
8136 }
9290831f
JS
8137 }
8138
dea3101e
JB
8139 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8140 /* Polling for a mbox command when another one is already active
8141 * is not allowed in SLI. Also, the driver must have established
8142 * SLI2 mode to queue and process multiple mbox commands.
8143 */
8144
8145 if (flag & MBX_POLL) {
2e0fef85 8146 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
8147
8148 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8149 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8150 "(%d):2529 Mailbox command x%x "
8151 "cannot issue Data: x%x x%x\n",
8152 pmbox->vport ? pmbox->vport->vpi : 0,
8153 pmbox->u.mb.mbxCommand,
8154 psli->sli_flag, flag);
58da1ffb 8155 goto out_not_finished;
dea3101e
JB
8156 }
8157
3772a991 8158 if (!(psli->sli_flag & LPFC_SLI_ACTIVE)) {
2e0fef85 8159 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8160 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8161 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8162 "(%d):2530 Mailbox command x%x "
8163 "cannot issue Data: x%x x%x\n",
8164 pmbox->vport ? pmbox->vport->vpi : 0,
8165 pmbox->u.mb.mbxCommand,
8166 psli->sli_flag, flag);
58da1ffb 8167 goto out_not_finished;
dea3101e
JB
8168 }
8169
dea3101e
JB
8170 /* Another mailbox command is still being processed, queue this
8171 * command to be processed later.
8172 */
8173 lpfc_mbox_put(phba, pmbox);
8174
8175 /* Mbox cmd issue - BUSY */
ed957684 8176 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8177 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 8178 "x%x x%x x%x x%x\n",
92d7f7b0 8179 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
e92974f6
JS
8180 mbx->mbxCommand,
8181 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8182 psli->sli_flag, flag);
dea3101e
JB
8183
8184 psli->slistat.mbox_busy++;
2e0fef85 8185 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8186
858c9f6c
JS
8187 if (pmbox->vport) {
8188 lpfc_debugfs_disc_trc(pmbox->vport,
8189 LPFC_DISC_TRC_MBOX_VPORT,
8190 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8191 (uint32_t)mbx->mbxCommand,
8192 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8193 }
8194 else {
8195 lpfc_debugfs_disc_trc(phba->pport,
8196 LPFC_DISC_TRC_MBOX,
8197 "MBOX Bsy: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8198 (uint32_t)mbx->mbxCommand,
8199 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8200 }
8201
2e0fef85 8202 return MBX_BUSY;
dea3101e
JB
8203 }
8204
dea3101e
JB
8205 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8206
8207 /* If we are not polling, we MUST be in SLI2 mode */
8208 if (flag != MBX_POLL) {
3772a991 8209 if (!(psli->sli_flag & LPFC_SLI_ACTIVE) &&
bf07bdea 8210 (mbx->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 8211 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8212 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8213 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8214 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8215 "(%d):2531 Mailbox command x%x "
8216 "cannot issue Data: x%x x%x\n",
8217 pmbox->vport ? pmbox->vport->vpi : 0,
8218 pmbox->u.mb.mbxCommand,
8219 psli->sli_flag, flag);
58da1ffb 8220 goto out_not_finished;
dea3101e
JB
8221 }
8222 /* timeout active mbox command */
256ec0d0
JS
8223 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8224 1000);
8225 mod_timer(&psli->mbox_tmo, jiffies + timeout);
dea3101e
JB
8226 }
8227
8228 /* Mailbox cmd <cmd> issue */
ed957684 8229 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8230 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 8231 "x%x\n",
e8b62011 8232 pmbox->vport ? pmbox->vport->vpi : 0,
e92974f6
JS
8233 mbx->mbxCommand,
8234 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8235 psli->sli_flag, flag);
dea3101e 8236
bf07bdea 8237 if (mbx->mbxCommand != MBX_HEARTBEAT) {
858c9f6c
JS
8238 if (pmbox->vport) {
8239 lpfc_debugfs_disc_trc(pmbox->vport,
8240 LPFC_DISC_TRC_MBOX_VPORT,
8241 "MBOX Send vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8242 (uint32_t)mbx->mbxCommand,
8243 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8244 }
8245 else {
8246 lpfc_debugfs_disc_trc(phba->pport,
8247 LPFC_DISC_TRC_MBOX,
8248 "MBOX Send: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8249 (uint32_t)mbx->mbxCommand,
8250 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8251 }
8252 }
8253
dea3101e
JB
8254 psli->slistat.mbox_cmd++;
8255 evtctr = psli->slistat.mbox_event;
8256
8257 /* next set own bit for the adapter and copy over command word */
bf07bdea 8258 mbx->mbxOwner = OWN_CHIP;
dea3101e 8259
3772a991 8260 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
7a470277
JS
8261 /* Populate mbox extension offset word. */
8262 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len) {
bf07bdea 8263 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8264 = (uint8_t *)phba->mbox_ext
8265 - (uint8_t *)phba->mbox;
8266 }
8267
8268 /* Copy the mailbox extension data */
3e1f0718
JS
8269 if (pmbox->in_ext_byte_len && pmbox->ctx_buf) {
8270 lpfc_sli_pcimem_bcopy(pmbox->ctx_buf,
8271 (uint8_t *)phba->mbox_ext,
8272 pmbox->in_ext_byte_len);
7a470277
JS
8273 }
8274 /* Copy command data to host SLIM area */
bf07bdea 8275 lpfc_sli_pcimem_bcopy(mbx, phba->mbox, MAILBOX_CMD_SIZE);
dea3101e 8276 } else {
7a470277
JS
8277 /* Populate mbox extension offset word. */
8278 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len)
bf07bdea 8279 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8280 = MAILBOX_HBA_EXT_OFFSET;
8281
8282 /* Copy the mailbox extension data */
3e1f0718 8283 if (pmbox->in_ext_byte_len && pmbox->ctx_buf)
7a470277
JS
8284 lpfc_memcpy_to_slim(phba->MBslimaddr +
8285 MAILBOX_HBA_EXT_OFFSET,
3e1f0718 8286 pmbox->ctx_buf, pmbox->in_ext_byte_len);
7a470277 8287
895427bd 8288 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8289 /* copy command data into host mbox for cmpl */
895427bd
JS
8290 lpfc_sli_pcimem_bcopy(mbx, phba->mbox,
8291 MAILBOX_CMD_SIZE);
dea3101e
JB
8292
8293 /* First copy mbox command data to HBA SLIM, skip past first
8294 word */
8295 to_slim = phba->MBslimaddr + sizeof (uint32_t);
bf07bdea 8296 lpfc_memcpy_to_slim(to_slim, &mbx->un.varWords[0],
dea3101e
JB
8297 MAILBOX_CMD_SIZE - sizeof (uint32_t));
8298
8299 /* Next copy over first word, with mbxOwner set */
bf07bdea 8300 ldata = *((uint32_t *)mbx);
dea3101e
JB
8301 to_slim = phba->MBslimaddr;
8302 writel(ldata, to_slim);
8303 readl(to_slim); /* flush */
8304
895427bd 8305 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8306 /* switch over to host mailbox */
3772a991 8307 psli->sli_flag |= LPFC_SLI_ACTIVE;
dea3101e
JB
8308 }
8309
8310 wmb();
dea3101e
JB
8311
8312 switch (flag) {
8313 case MBX_NOWAIT:
09372820 8314 /* Set up reference to mailbox command */
dea3101e 8315 psli->mbox_active = pmbox;
09372820
JS
8316 /* Interrupt board to do it */
8317 writel(CA_MBATT, phba->CAregaddr);
8318 readl(phba->CAregaddr); /* flush */
8319 /* Don't wait for it to finish, just return */
dea3101e
JB
8320 break;
8321
8322 case MBX_POLL:
09372820 8323 /* Set up null reference to mailbox command */
dea3101e 8324 psli->mbox_active = NULL;
09372820
JS
8325 /* Interrupt board to do it */
8326 writel(CA_MBATT, phba->CAregaddr);
8327 readl(phba->CAregaddr); /* flush */
8328
3772a991 8329 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8330 /* First read mbox status word */
34b02dcd 8331 word0 = *((uint32_t *)phba->mbox);
dea3101e
JB
8332 word0 = le32_to_cpu(word0);
8333 } else {
8334 /* First read mbox status word */
9940b97b
JS
8335 if (lpfc_readl(phba->MBslimaddr, &word0)) {
8336 spin_unlock_irqrestore(&phba->hbalock,
8337 drvr_flag);
8338 goto out_not_finished;
8339 }
dea3101e
JB
8340 }
8341
8342 /* Read the HBA Host Attention Register */
9940b97b
JS
8343 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8344 spin_unlock_irqrestore(&phba->hbalock,
8345 drvr_flag);
8346 goto out_not_finished;
8347 }
a183a15f
JS
8348 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8349 1000) + jiffies;
09372820 8350 i = 0;
dea3101e 8351 /* Wait for command to complete */
41415862
JW
8352 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
8353 (!(ha_copy & HA_MBATT) &&
2e0fef85 8354 (phba->link_state > LPFC_WARM_START))) {
09372820 8355 if (time_after(jiffies, timeout)) {
dea3101e 8356 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8357 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 8358 drvr_flag);
58da1ffb 8359 goto out_not_finished;
dea3101e
JB
8360 }
8361
8362 /* Check if we took a mbox interrupt while we were
8363 polling */
8364 if (((word0 & OWN_CHIP) != OWN_CHIP)
8365 && (evtctr != psli->slistat.mbox_event))
8366 break;
8367
09372820
JS
8368 if (i++ > 10) {
8369 spin_unlock_irqrestore(&phba->hbalock,
8370 drvr_flag);
8371 msleep(1);
8372 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8373 }
dea3101e 8374
3772a991 8375 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8376 /* First copy command data */
34b02dcd 8377 word0 = *((uint32_t *)phba->mbox);
dea3101e 8378 word0 = le32_to_cpu(word0);
bf07bdea 8379 if (mbx->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 8380 MAILBOX_t *slimmb;
34b02dcd 8381 uint32_t slimword0;
dea3101e
JB
8382 /* Check real SLIM for any errors */
8383 slimword0 = readl(phba->MBslimaddr);
8384 slimmb = (MAILBOX_t *) & slimword0;
8385 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
8386 && slimmb->mbxStatus) {
8387 psli->sli_flag &=
3772a991 8388 ~LPFC_SLI_ACTIVE;
dea3101e
JB
8389 word0 = slimword0;
8390 }
8391 }
8392 } else {
8393 /* First copy command data */
8394 word0 = readl(phba->MBslimaddr);
8395 }
8396 /* Read the HBA Host Attention Register */
9940b97b
JS
8397 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8398 spin_unlock_irqrestore(&phba->hbalock,
8399 drvr_flag);
8400 goto out_not_finished;
8401 }
dea3101e
JB
8402 }
8403
3772a991 8404 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8405 /* copy results back to user */
2ea259ee
JS
8406 lpfc_sli_pcimem_bcopy(phba->mbox, mbx,
8407 MAILBOX_CMD_SIZE);
7a470277 8408 /* Copy the mailbox extension data */
3e1f0718 8409 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
7a470277 8410 lpfc_sli_pcimem_bcopy(phba->mbox_ext,
3e1f0718 8411 pmbox->ctx_buf,
7a470277
JS
8412 pmbox->out_ext_byte_len);
8413 }
dea3101e
JB
8414 } else {
8415 /* First copy command data */
bf07bdea 8416 lpfc_memcpy_from_slim(mbx, phba->MBslimaddr,
2ea259ee 8417 MAILBOX_CMD_SIZE);
7a470277 8418 /* Copy the mailbox extension data */
3e1f0718
JS
8419 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
8420 lpfc_memcpy_from_slim(
8421 pmbox->ctx_buf,
7a470277
JS
8422 phba->MBslimaddr +
8423 MAILBOX_HBA_EXT_OFFSET,
8424 pmbox->out_ext_byte_len);
dea3101e
JB
8425 }
8426 }
8427
8428 writel(HA_MBATT, phba->HAregaddr);
8429 readl(phba->HAregaddr); /* flush */
8430
8431 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
bf07bdea 8432 status = mbx->mbxStatus;
dea3101e
JB
8433 }
8434
2e0fef85
JS
8435 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8436 return status;
58da1ffb
JS
8437
8438out_not_finished:
8439 if (processing_queue) {
da0436e9 8440 pmbox->u.mb.mbxStatus = MBX_NOT_FINISHED;
58da1ffb
JS
8441 lpfc_mbox_cmpl_put(phba, pmbox);
8442 }
8443 return MBX_NOT_FINISHED;
dea3101e
JB
8444}
8445
f1126688
JS
8446/**
8447 * lpfc_sli4_async_mbox_block - Block posting SLI4 asynchronous mailbox command
8448 * @phba: Pointer to HBA context object.
8449 *
8450 * The function blocks the posting of SLI4 asynchronous mailbox commands from
8451 * the driver internal pending mailbox queue. It will then try to wait out the
8452 * possible outstanding mailbox command before return.
8453 *
8454 * Returns:
8455 * 0 - the outstanding mailbox command completed; otherwise, the wait for
8456 * the outstanding mailbox command timed out.
8457 **/
8458static int
8459lpfc_sli4_async_mbox_block(struct lpfc_hba *phba)
8460{
8461 struct lpfc_sli *psli = &phba->sli;
f1126688 8462 int rc = 0;
a183a15f 8463 unsigned long timeout = 0;
f1126688
JS
8464
8465 /* Mark the asynchronous mailbox command posting as blocked */
8466 spin_lock_irq(&phba->hbalock);
8467 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
f1126688
JS
8468 /* Determine how long we might wait for the active mailbox
8469 * command to be gracefully completed by firmware.
8470 */
a183a15f
JS
8471 if (phba->sli.mbox_active)
8472 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
8473 phba->sli.mbox_active) *
8474 1000) + jiffies;
8475 spin_unlock_irq(&phba->hbalock);
8476
e8d3c3b1
JS
8477 /* Make sure the mailbox is really active */
8478 if (timeout)
8479 lpfc_sli4_process_missed_mbox_completions(phba);
8480
f1126688
JS
8481 /* Wait for the outstnading mailbox command to complete */
8482 while (phba->sli.mbox_active) {
8483 /* Check active mailbox complete status every 2ms */
8484 msleep(2);
8485 if (time_after(jiffies, timeout)) {
8486 /* Timeout, marked the outstanding cmd not complete */
8487 rc = 1;
8488 break;
8489 }
8490 }
8491
8492 /* Can not cleanly block async mailbox command, fails it */
8493 if (rc) {
8494 spin_lock_irq(&phba->hbalock);
8495 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8496 spin_unlock_irq(&phba->hbalock);
8497 }
8498 return rc;
8499}
8500
8501/**
8502 * lpfc_sli4_async_mbox_unblock - Block posting SLI4 async mailbox command
8503 * @phba: Pointer to HBA context object.
8504 *
8505 * The function unblocks and resume posting of SLI4 asynchronous mailbox
8506 * commands from the driver internal pending mailbox queue. It makes sure
8507 * that there is no outstanding mailbox command before resuming posting
8508 * asynchronous mailbox commands. If, for any reason, there is outstanding
8509 * mailbox command, it will try to wait it out before resuming asynchronous
8510 * mailbox command posting.
8511 **/
8512static void
8513lpfc_sli4_async_mbox_unblock(struct lpfc_hba *phba)
8514{
8515 struct lpfc_sli *psli = &phba->sli;
8516
8517 spin_lock_irq(&phba->hbalock);
8518 if (!(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8519 /* Asynchronous mailbox posting is not blocked, do nothing */
8520 spin_unlock_irq(&phba->hbalock);
8521 return;
8522 }
8523
8524 /* Outstanding synchronous mailbox command is guaranteed to be done,
8525 * successful or timeout, after timing-out the outstanding mailbox
8526 * command shall always be removed, so just unblock posting async
8527 * mailbox command and resume
8528 */
8529 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8530 spin_unlock_irq(&phba->hbalock);
8531
8532 /* wake up worker thread to post asynchronlous mailbox command */
8533 lpfc_worker_wake_up(phba);
8534}
8535
2d843edc
JS
8536/**
8537 * lpfc_sli4_wait_bmbx_ready - Wait for bootstrap mailbox register ready
8538 * @phba: Pointer to HBA context object.
8539 * @mboxq: Pointer to mailbox object.
8540 *
8541 * The function waits for the bootstrap mailbox register ready bit from
8542 * port for twice the regular mailbox command timeout value.
8543 *
8544 * 0 - no timeout on waiting for bootstrap mailbox register ready.
8545 * MBXERR_ERROR - wait for bootstrap mailbox register timed out.
8546 **/
8547static int
8548lpfc_sli4_wait_bmbx_ready(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8549{
8550 uint32_t db_ready;
8551 unsigned long timeout;
8552 struct lpfc_register bmbx_reg;
8553
8554 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, mboxq)
8555 * 1000) + jiffies;
8556
8557 do {
8558 bmbx_reg.word0 = readl(phba->sli4_hba.BMBXregaddr);
8559 db_ready = bf_get(lpfc_bmbx_rdy, &bmbx_reg);
8560 if (!db_ready)
e2ffe4d5 8561 mdelay(2);
2d843edc
JS
8562
8563 if (time_after(jiffies, timeout))
8564 return MBXERR_ERROR;
8565 } while (!db_ready);
8566
8567 return 0;
8568}
8569
da0436e9
JS
8570/**
8571 * lpfc_sli4_post_sync_mbox - Post an SLI4 mailbox to the bootstrap mailbox
8572 * @phba: Pointer to HBA context object.
8573 * @mboxq: Pointer to mailbox object.
8574 *
8575 * The function posts a mailbox to the port. The mailbox is expected
8576 * to be comletely filled in and ready for the port to operate on it.
8577 * This routine executes a synchronous completion operation on the
8578 * mailbox by polling for its completion.
8579 *
8580 * The caller must not be holding any locks when calling this routine.
8581 *
8582 * Returns:
8583 * MBX_SUCCESS - mailbox posted successfully
8584 * Any of the MBX error values.
8585 **/
8586static int
8587lpfc_sli4_post_sync_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8588{
8589 int rc = MBX_SUCCESS;
8590 unsigned long iflag;
da0436e9
JS
8591 uint32_t mcqe_status;
8592 uint32_t mbx_cmnd;
da0436e9
JS
8593 struct lpfc_sli *psli = &phba->sli;
8594 struct lpfc_mqe *mb = &mboxq->u.mqe;
8595 struct lpfc_bmbx_create *mbox_rgn;
8596 struct dma_address *dma_address;
da0436e9
JS
8597
8598 /*
8599 * Only one mailbox can be active to the bootstrap mailbox region
8600 * at a time and there is no queueing provided.
8601 */
8602 spin_lock_irqsave(&phba->hbalock, iflag);
8603 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8604 spin_unlock_irqrestore(&phba->hbalock, iflag);
8605 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8606 "(%d):2532 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8607 "cannot issue Data: x%x x%x\n",
8608 mboxq->vport ? mboxq->vport->vpi : 0,
8609 mboxq->u.mb.mbxCommand,
a183a15f
JS
8610 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8611 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8612 psli->sli_flag, MBX_POLL);
8613 return MBXERR_ERROR;
8614 }
8615 /* The server grabs the token and owns it until release */
8616 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8617 phba->sli.mbox_active = mboxq;
8618 spin_unlock_irqrestore(&phba->hbalock, iflag);
8619
2d843edc
JS
8620 /* wait for bootstrap mbox register for readyness */
8621 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8622 if (rc)
8623 goto exit;
da0436e9
JS
8624 /*
8625 * Initialize the bootstrap memory region to avoid stale data areas
8626 * in the mailbox post. Then copy the caller's mailbox contents to
8627 * the bmbx mailbox region.
8628 */
8629 mbx_cmnd = bf_get(lpfc_mqe_command, mb);
8630 memset(phba->sli4_hba.bmbx.avirt, 0, sizeof(struct lpfc_bmbx_create));
48f8fdb4
JS
8631 lpfc_sli4_pcimem_bcopy(mb, phba->sli4_hba.bmbx.avirt,
8632 sizeof(struct lpfc_mqe));
da0436e9
JS
8633
8634 /* Post the high mailbox dma address to the port and wait for ready. */
8635 dma_address = &phba->sli4_hba.bmbx.dma_address;
8636 writel(dma_address->addr_hi, phba->sli4_hba.BMBXregaddr);
8637
2d843edc
JS
8638 /* wait for bootstrap mbox register for hi-address write done */
8639 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8640 if (rc)
8641 goto exit;
da0436e9
JS
8642
8643 /* Post the low mailbox dma address to the port. */
8644 writel(dma_address->addr_lo, phba->sli4_hba.BMBXregaddr);
da0436e9 8645
2d843edc
JS
8646 /* wait for bootstrap mbox register for low address write done */
8647 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8648 if (rc)
8649 goto exit;
da0436e9
JS
8650
8651 /*
8652 * Read the CQ to ensure the mailbox has completed.
8653 * If so, update the mailbox status so that the upper layers
8654 * can complete the request normally.
8655 */
48f8fdb4
JS
8656 lpfc_sli4_pcimem_bcopy(phba->sli4_hba.bmbx.avirt, mb,
8657 sizeof(struct lpfc_mqe));
da0436e9 8658 mbox_rgn = (struct lpfc_bmbx_create *) phba->sli4_hba.bmbx.avirt;
48f8fdb4
JS
8659 lpfc_sli4_pcimem_bcopy(&mbox_rgn->mcqe, &mboxq->mcqe,
8660 sizeof(struct lpfc_mcqe));
da0436e9 8661 mcqe_status = bf_get(lpfc_mcqe_status, &mbox_rgn->mcqe);
0558056c
JS
8662 /*
8663 * When the CQE status indicates a failure and the mailbox status
8664 * indicates success then copy the CQE status into the mailbox status
8665 * (and prefix it with x4000).
8666 */
da0436e9 8667 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
0558056c
JS
8668 if (bf_get(lpfc_mqe_status, mb) == MBX_SUCCESS)
8669 bf_set(lpfc_mqe_status, mb,
8670 (LPFC_MBX_ERROR_RANGE | mcqe_status));
da0436e9 8671 rc = MBXERR_ERROR;
d7c47992
JS
8672 } else
8673 lpfc_sli4_swap_str(phba, mboxq);
da0436e9
JS
8674
8675 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8676 "(%d):0356 Mailbox cmd x%x (x%x/x%x) Status x%x "
da0436e9
JS
8677 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x"
8678 " x%x x%x CQ: x%x x%x x%x x%x\n",
a183a15f
JS
8679 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
8680 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8681 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8682 bf_get(lpfc_mqe_status, mb),
8683 mb->un.mb_words[0], mb->un.mb_words[1],
8684 mb->un.mb_words[2], mb->un.mb_words[3],
8685 mb->un.mb_words[4], mb->un.mb_words[5],
8686 mb->un.mb_words[6], mb->un.mb_words[7],
8687 mb->un.mb_words[8], mb->un.mb_words[9],
8688 mb->un.mb_words[10], mb->un.mb_words[11],
8689 mb->un.mb_words[12], mboxq->mcqe.word0,
8690 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
8691 mboxq->mcqe.trailer);
8692exit:
8693 /* We are holding the token, no needed for lock when release */
8694 spin_lock_irqsave(&phba->hbalock, iflag);
8695 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8696 phba->sli.mbox_active = NULL;
8697 spin_unlock_irqrestore(&phba->hbalock, iflag);
8698 return rc;
8699}
8700
8701/**
8702 * lpfc_sli_issue_mbox_s4 - Issue an SLI4 mailbox command to firmware
8703 * @phba: Pointer to HBA context object.
8704 * @pmbox: Pointer to mailbox object.
8705 * @flag: Flag indicating how the mailbox need to be processed.
8706 *
8707 * This function is called by discovery code and HBA management code to submit
8708 * a mailbox command to firmware with SLI-4 interface spec.
8709 *
8710 * Return codes the caller owns the mailbox command after the return of the
8711 * function.
8712 **/
8713static int
8714lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
8715 uint32_t flag)
8716{
8717 struct lpfc_sli *psli = &phba->sli;
8718 unsigned long iflags;
8719 int rc;
8720
b76f2dc9
JS
8721 /* dump from issue mailbox command if setup */
8722 lpfc_idiag_mbxacc_dump_issue_mbox(phba, &mboxq->u.mb);
8723
8fa38513
JS
8724 rc = lpfc_mbox_dev_check(phba);
8725 if (unlikely(rc)) {
8726 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8727 "(%d):2544 Mailbox command x%x (x%x/x%x) "
8fa38513
JS
8728 "cannot issue Data: x%x x%x\n",
8729 mboxq->vport ? mboxq->vport->vpi : 0,
8730 mboxq->u.mb.mbxCommand,
a183a15f
JS
8731 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8732 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
8fa38513
JS
8733 psli->sli_flag, flag);
8734 goto out_not_finished;
8735 }
8736
da0436e9
JS
8737 /* Detect polling mode and jump to a handler */
8738 if (!phba->sli4_hba.intr_enable) {
8739 if (flag == MBX_POLL)
8740 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8741 else
8742 rc = -EIO;
8743 if (rc != MBX_SUCCESS)
0558056c 8744 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
da0436e9 8745 "(%d):2541 Mailbox command x%x "
cc459f19
JS
8746 "(x%x/x%x) failure: "
8747 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8748 "Data: x%x x%x\n,",
da0436e9
JS
8749 mboxq->vport ? mboxq->vport->vpi : 0,
8750 mboxq->u.mb.mbxCommand,
a183a15f
JS
8751 lpfc_sli_config_mbox_subsys_get(phba,
8752 mboxq),
8753 lpfc_sli_config_mbox_opcode_get(phba,
8754 mboxq),
cc459f19
JS
8755 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8756 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8757 bf_get(lpfc_mcqe_ext_status,
8758 &mboxq->mcqe),
da0436e9
JS
8759 psli->sli_flag, flag);
8760 return rc;
8761 } else if (flag == MBX_POLL) {
f1126688
JS
8762 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
8763 "(%d):2542 Try to issue mailbox command "
7365f6fd 8764 "x%x (x%x/x%x) synchronously ahead of async "
f1126688 8765 "mailbox command queue: x%x x%x\n",
da0436e9
JS
8766 mboxq->vport ? mboxq->vport->vpi : 0,
8767 mboxq->u.mb.mbxCommand,
a183a15f
JS
8768 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8769 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9 8770 psli->sli_flag, flag);
f1126688
JS
8771 /* Try to block the asynchronous mailbox posting */
8772 rc = lpfc_sli4_async_mbox_block(phba);
8773 if (!rc) {
8774 /* Successfully blocked, now issue sync mbox cmd */
8775 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8776 if (rc != MBX_SUCCESS)
cc459f19 8777 lpfc_printf_log(phba, KERN_WARNING,
a183a15f 8778 LOG_MBOX | LOG_SLI,
cc459f19
JS
8779 "(%d):2597 Sync Mailbox command "
8780 "x%x (x%x/x%x) failure: "
8781 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8782 "Data: x%x x%x\n,",
8783 mboxq->vport ? mboxq->vport->vpi : 0,
a183a15f
JS
8784 mboxq->u.mb.mbxCommand,
8785 lpfc_sli_config_mbox_subsys_get(phba,
8786 mboxq),
8787 lpfc_sli_config_mbox_opcode_get(phba,
8788 mboxq),
cc459f19
JS
8789 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8790 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8791 bf_get(lpfc_mcqe_ext_status,
8792 &mboxq->mcqe),
a183a15f 8793 psli->sli_flag, flag);
f1126688
JS
8794 /* Unblock the async mailbox posting afterward */
8795 lpfc_sli4_async_mbox_unblock(phba);
8796 }
8797 return rc;
da0436e9
JS
8798 }
8799
8800 /* Now, interrupt mode asynchrous mailbox command */
8801 rc = lpfc_mbox_cmd_check(phba, mboxq);
8802 if (rc) {
8803 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8804 "(%d):2543 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8805 "cannot issue Data: x%x x%x\n",
8806 mboxq->vport ? mboxq->vport->vpi : 0,
8807 mboxq->u.mb.mbxCommand,
a183a15f
JS
8808 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8809 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8810 psli->sli_flag, flag);
8811 goto out_not_finished;
8812 }
da0436e9
JS
8813
8814 /* Put the mailbox command to the driver internal FIFO */
8815 psli->slistat.mbox_busy++;
8816 spin_lock_irqsave(&phba->hbalock, iflags);
8817 lpfc_mbox_put(phba, mboxq);
8818 spin_unlock_irqrestore(&phba->hbalock, iflags);
8819 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
8820 "(%d):0354 Mbox cmd issue - Enqueue Data: "
a183a15f 8821 "x%x (x%x/x%x) x%x x%x x%x\n",
da0436e9
JS
8822 mboxq->vport ? mboxq->vport->vpi : 0xffffff,
8823 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
a183a15f
JS
8824 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8825 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8826 phba->pport->port_state,
8827 psli->sli_flag, MBX_NOWAIT);
8828 /* Wake up worker thread to transport mailbox command from head */
8829 lpfc_worker_wake_up(phba);
8830
8831 return MBX_BUSY;
8832
8833out_not_finished:
8834 return MBX_NOT_FINISHED;
8835}
8836
8837/**
8838 * lpfc_sli4_post_async_mbox - Post an SLI4 mailbox command to device
8839 * @phba: Pointer to HBA context object.
8840 *
8841 * This function is called by worker thread to send a mailbox command to
8842 * SLI4 HBA firmware.
8843 *
8844 **/
8845int
8846lpfc_sli4_post_async_mbox(struct lpfc_hba *phba)
8847{
8848 struct lpfc_sli *psli = &phba->sli;
8849 LPFC_MBOXQ_t *mboxq;
8850 int rc = MBX_SUCCESS;
8851 unsigned long iflags;
8852 struct lpfc_mqe *mqe;
8853 uint32_t mbx_cmnd;
8854
8855 /* Check interrupt mode before post async mailbox command */
8856 if (unlikely(!phba->sli4_hba.intr_enable))
8857 return MBX_NOT_FINISHED;
8858
8859 /* Check for mailbox command service token */
8860 spin_lock_irqsave(&phba->hbalock, iflags);
8861 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8862 spin_unlock_irqrestore(&phba->hbalock, iflags);
8863 return MBX_NOT_FINISHED;
8864 }
8865 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8866 spin_unlock_irqrestore(&phba->hbalock, iflags);
8867 return MBX_NOT_FINISHED;
8868 }
8869 if (unlikely(phba->sli.mbox_active)) {
8870 spin_unlock_irqrestore(&phba->hbalock, iflags);
8871 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8872 "0384 There is pending active mailbox cmd\n");
8873 return MBX_NOT_FINISHED;
8874 }
8875 /* Take the mailbox command service token */
8876 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8877
8878 /* Get the next mailbox command from head of queue */
8879 mboxq = lpfc_mbox_get(phba);
8880
8881 /* If no more mailbox command waiting for post, we're done */
8882 if (!mboxq) {
8883 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8884 spin_unlock_irqrestore(&phba->hbalock, iflags);
8885 return MBX_SUCCESS;
8886 }
8887 phba->sli.mbox_active = mboxq;
8888 spin_unlock_irqrestore(&phba->hbalock, iflags);
8889
8890 /* Check device readiness for posting mailbox command */
8891 rc = lpfc_mbox_dev_check(phba);
8892 if (unlikely(rc))
8893 /* Driver clean routine will clean up pending mailbox */
8894 goto out_not_finished;
8895
8896 /* Prepare the mbox command to be posted */
8897 mqe = &mboxq->u.mqe;
8898 mbx_cmnd = bf_get(lpfc_mqe_command, mqe);
8899
8900 /* Start timer for the mbox_tmo and log some mailbox post messages */
8901 mod_timer(&psli->mbox_tmo, (jiffies +
256ec0d0 8902 msecs_to_jiffies(1000 * lpfc_mbox_tmo_val(phba, mboxq))));
da0436e9
JS
8903
8904 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8905 "(%d):0355 Mailbox cmd x%x (x%x/x%x) issue Data: "
da0436e9
JS
8906 "x%x x%x\n",
8907 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
a183a15f
JS
8908 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8909 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8910 phba->pport->port_state, psli->sli_flag);
8911
8912 if (mbx_cmnd != MBX_HEARTBEAT) {
8913 if (mboxq->vport) {
8914 lpfc_debugfs_disc_trc(mboxq->vport,
8915 LPFC_DISC_TRC_MBOX_VPORT,
8916 "MBOX Send vport: cmd:x%x mb:x%x x%x",
8917 mbx_cmnd, mqe->un.mb_words[0],
8918 mqe->un.mb_words[1]);
8919 } else {
8920 lpfc_debugfs_disc_trc(phba->pport,
8921 LPFC_DISC_TRC_MBOX,
8922 "MBOX Send: cmd:x%x mb:x%x x%x",
8923 mbx_cmnd, mqe->un.mb_words[0],
8924 mqe->un.mb_words[1]);
8925 }
8926 }
8927 psli->slistat.mbox_cmd++;
8928
8929 /* Post the mailbox command to the port */
8930 rc = lpfc_sli4_mq_put(phba->sli4_hba.mbx_wq, mqe);
8931 if (rc != MBX_SUCCESS) {
8932 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8933 "(%d):2533 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8934 "cannot issue Data: x%x x%x\n",
8935 mboxq->vport ? mboxq->vport->vpi : 0,
8936 mboxq->u.mb.mbxCommand,
a183a15f
JS
8937 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8938 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8939 psli->sli_flag, MBX_NOWAIT);
8940 goto out_not_finished;
8941 }
8942
8943 return rc;
8944
8945out_not_finished:
8946 spin_lock_irqsave(&phba->hbalock, iflags);
d7069f09
JS
8947 if (phba->sli.mbox_active) {
8948 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
8949 __lpfc_mbox_cmpl_put(phba, mboxq);
8950 /* Release the token */
8951 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8952 phba->sli.mbox_active = NULL;
8953 }
da0436e9
JS
8954 spin_unlock_irqrestore(&phba->hbalock, iflags);
8955
8956 return MBX_NOT_FINISHED;
8957}
8958
8959/**
8960 * lpfc_sli_issue_mbox - Wrapper func for issuing mailbox command
8961 * @phba: Pointer to HBA context object.
8962 * @pmbox: Pointer to mailbox object.
8963 * @flag: Flag indicating how the mailbox need to be processed.
8964 *
8965 * This routine wraps the actual SLI3 or SLI4 mailbox issuing routine from
8966 * the API jump table function pointer from the lpfc_hba struct.
8967 *
8968 * Return codes the caller owns the mailbox command after the return of the
8969 * function.
8970 **/
8971int
8972lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
8973{
8974 return phba->lpfc_sli_issue_mbox(phba, pmbox, flag);
8975}
8976
8977/**
25985edc 8978 * lpfc_mbox_api_table_setup - Set up mbox api function jump table
da0436e9
JS
8979 * @phba: The hba struct for which this call is being executed.
8980 * @dev_grp: The HBA PCI-Device group number.
8981 *
8982 * This routine sets up the mbox interface API function jump table in @phba
8983 * struct.
8984 * Returns: 0 - success, -ENODEV - failure.
8985 **/
8986int
8987lpfc_mbox_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
8988{
8989
8990 switch (dev_grp) {
8991 case LPFC_PCI_DEV_LP:
8992 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s3;
8993 phba->lpfc_sli_handle_slow_ring_event =
8994 lpfc_sli_handle_slow_ring_event_s3;
8995 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s3;
8996 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s3;
8997 phba->lpfc_sli_brdready = lpfc_sli_brdready_s3;
8998 break;
8999 case LPFC_PCI_DEV_OC:
9000 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s4;
9001 phba->lpfc_sli_handle_slow_ring_event =
9002 lpfc_sli_handle_slow_ring_event_s4;
9003 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s4;
9004 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s4;
9005 phba->lpfc_sli_brdready = lpfc_sli_brdready_s4;
9006 break;
9007 default:
9008 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9009 "1420 Invalid HBA PCI-device group: 0x%x\n",
9010 dev_grp);
9011 return -ENODEV;
9012 break;
9013 }
9014 return 0;
9015}
9016
e59058c4 9017/**
3621a710 9018 * __lpfc_sli_ringtx_put - Add an iocb to the txq
e59058c4
JS
9019 * @phba: Pointer to HBA context object.
9020 * @pring: Pointer to driver SLI ring object.
9021 * @piocb: Pointer to address of newly added command iocb.
9022 *
27f3efd6
JS
9023 * This function is called with hbalock held for SLI3 ports or
9024 * the ring lock held for SLI4 ports to add a command
e59058c4
JS
9025 * iocb to the txq when SLI layer cannot submit the command iocb
9026 * to the ring.
9027 **/
2a9bf3d0 9028void
92d7f7b0 9029__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 9030 struct lpfc_iocbq *piocb)
dea3101e 9031{
27f3efd6
JS
9032 if (phba->sli_rev == LPFC_SLI_REV4)
9033 lockdep_assert_held(&pring->ring_lock);
9034 else
9035 lockdep_assert_held(&phba->hbalock);
dea3101e
JB
9036 /* Insert the caller's iocb in the txq tail for later processing. */
9037 list_add_tail(&piocb->list, &pring->txq);
dea3101e
JB
9038}
9039
e59058c4 9040/**
3621a710 9041 * lpfc_sli_next_iocb - Get the next iocb in the txq
e59058c4
JS
9042 * @phba: Pointer to HBA context object.
9043 * @pring: Pointer to driver SLI ring object.
9044 * @piocb: Pointer to address of newly added command iocb.
9045 *
9046 * This function is called with hbalock held before a new
9047 * iocb is submitted to the firmware. This function checks
9048 * txq to flush the iocbs in txq to Firmware before
9049 * submitting new iocbs to the Firmware.
9050 * If there are iocbs in the txq which need to be submitted
9051 * to firmware, lpfc_sli_next_iocb returns the first element
9052 * of the txq after dequeuing it from txq.
9053 * If there is no iocb in the txq then the function will return
9054 * *piocb and *piocb is set to NULL. Caller needs to check
9055 * *piocb to find if there are more commands in the txq.
9056 **/
dea3101e
JB
9057static struct lpfc_iocbq *
9058lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 9059 struct lpfc_iocbq **piocb)
dea3101e
JB
9060{
9061 struct lpfc_iocbq * nextiocb;
9062
1c2ba475
JT
9063 lockdep_assert_held(&phba->hbalock);
9064
dea3101e
JB
9065 nextiocb = lpfc_sli_ringtx_get(phba, pring);
9066 if (!nextiocb) {
9067 nextiocb = *piocb;
9068 *piocb = NULL;
9069 }
9070
9071 return nextiocb;
9072}
9073
e59058c4 9074/**
3772a991 9075 * __lpfc_sli_issue_iocb_s3 - SLI3 device lockless ver of lpfc_sli_issue_iocb
e59058c4 9076 * @phba: Pointer to HBA context object.
3772a991 9077 * @ring_number: SLI ring number to issue iocb on.
e59058c4
JS
9078 * @piocb: Pointer to command iocb.
9079 * @flag: Flag indicating if this command can be put into txq.
9080 *
3772a991
JS
9081 * __lpfc_sli_issue_iocb_s3 is used by other functions in the driver to issue
9082 * an iocb command to an HBA with SLI-3 interface spec. If the PCI slot is
9083 * recovering from error state, if HBA is resetting or if LPFC_STOP_IOCB_EVENT
9084 * flag is turned on, the function returns IOCB_ERROR. When the link is down,
9085 * this function allows only iocbs for posting buffers. This function finds
9086 * next available slot in the command ring and posts the command to the
9087 * available slot and writes the port attention register to request HBA start
9088 * processing new iocb. If there is no slot available in the ring and
9089 * flag & SLI_IOCB_RET_IOCB is set, the new iocb is added to the txq, otherwise
9090 * the function returns IOCB_BUSY.
e59058c4 9091 *
3772a991
JS
9092 * This function is called with hbalock held. The function will return success
9093 * after it successfully submit the iocb to firmware or after adding to the
9094 * txq.
e59058c4 9095 **/
98c9ea5c 9096static int
3772a991 9097__lpfc_sli_issue_iocb_s3(struct lpfc_hba *phba, uint32_t ring_number,
dea3101e
JB
9098 struct lpfc_iocbq *piocb, uint32_t flag)
9099{
9100 struct lpfc_iocbq *nextiocb;
9101 IOCB_t *iocb;
895427bd 9102 struct lpfc_sli_ring *pring = &phba->sli.sli3_ring[ring_number];
dea3101e 9103
1c2ba475
JT
9104 lockdep_assert_held(&phba->hbalock);
9105
92d7f7b0
JS
9106 if (piocb->iocb_cmpl && (!piocb->vport) &&
9107 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
9108 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
9109 lpfc_printf_log(phba, KERN_ERR,
9110 LOG_SLI | LOG_VPORT,
e8b62011 9111 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS
9112 piocb->iocb.ulpCommand);
9113 dump_stack();
9114 return IOCB_ERROR;
9115 }
9116
9117
8d63f375
LV
9118 /* If the PCI channel is in offline state, do not post iocbs. */
9119 if (unlikely(pci_channel_offline(phba->pcidev)))
9120 return IOCB_ERROR;
9121
a257bf90
JS
9122 /* If HBA has a deferred error attention, fail the iocb. */
9123 if (unlikely(phba->hba_flag & DEFER_ERATT))
9124 return IOCB_ERROR;
9125
dea3101e
JB
9126 /*
9127 * We should never get an IOCB if we are in a < LINK_DOWN state
9128 */
2e0fef85 9129 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB
9130 return IOCB_ERROR;
9131
9132 /*
9133 * Check to see if we are blocking IOCB processing because of a
0b727fea 9134 * outstanding event.
dea3101e 9135 */
0b727fea 9136 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e
JB
9137 goto iocb_busy;
9138
2e0fef85 9139 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 9140 /*
2680eeaa 9141 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB
9142 * can be issued if the link is not up.
9143 */
9144 switch (piocb->iocb.ulpCommand) {
84774a4d
JS
9145 case CMD_GEN_REQUEST64_CR:
9146 case CMD_GEN_REQUEST64_CX:
9147 if (!(phba->sli.sli_flag & LPFC_MENLO_MAINT) ||
9148 (piocb->iocb.un.genreq64.w5.hcsw.Rctl !=
6a9c52cf 9149 FC_RCTL_DD_UNSOL_CMD) ||
84774a4d
JS
9150 (piocb->iocb.un.genreq64.w5.hcsw.Type !=
9151 MENLO_TRANSPORT_TYPE))
9152
9153 goto iocb_busy;
9154 break;
dea3101e
JB
9155 case CMD_QUE_RING_BUF_CN:
9156 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB
9157 /*
9158 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
9159 * completion, iocb_cmpl MUST be 0.
9160 */
9161 if (piocb->iocb_cmpl)
9162 piocb->iocb_cmpl = NULL;
9163 /*FALLTHROUGH*/
9164 case CMD_CREATE_XRI_CR:
2680eeaa
JS
9165 case CMD_CLOSE_XRI_CN:
9166 case CMD_CLOSE_XRI_CX:
dea3101e
JB
9167 break;
9168 default:
9169 goto iocb_busy;
9170 }
9171
9172 /*
9173 * For FCP commands, we must be in a state where we can process link
9174 * attention events.
9175 */
895427bd 9176 } else if (unlikely(pring->ringno == LPFC_FCP_RING &&
92d7f7b0 9177 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 9178 goto iocb_busy;
92d7f7b0 9179 }
dea3101e 9180
dea3101e
JB
9181 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
9182 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
9183 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
9184
9185 if (iocb)
9186 lpfc_sli_update_ring(phba, pring);
9187 else
9188 lpfc_sli_update_full_ring(phba, pring);
9189
9190 if (!piocb)
9191 return IOCB_SUCCESS;
9192
9193 goto out_busy;
9194
9195 iocb_busy:
9196 pring->stats.iocb_cmd_delay++;
9197
9198 out_busy:
9199
9200 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 9201 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB
9202 return IOCB_SUCCESS;
9203 }
9204
9205 return IOCB_BUSY;
9206}
9207
3772a991 9208/**
4f774513
JS
9209 * lpfc_sli4_bpl2sgl - Convert the bpl/bde to a sgl.
9210 * @phba: Pointer to HBA context object.
9211 * @piocb: Pointer to command iocb.
9212 * @sglq: Pointer to the scatter gather queue object.
9213 *
9214 * This routine converts the bpl or bde that is in the IOCB
9215 * to a sgl list for the sli4 hardware. The physical address
9216 * of the bpl/bde is converted back to a virtual address.
9217 * If the IOCB contains a BPL then the list of BDE's is
9218 * converted to sli4_sge's. If the IOCB contains a single
9219 * BDE then it is converted to a single sli_sge.
9220 * The IOCB is still in cpu endianess so the contents of
9221 * the bpl can be used without byte swapping.
9222 *
9223 * Returns valid XRI = Success, NO_XRI = Failure.
9224**/
9225static uint16_t
9226lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
9227 struct lpfc_sglq *sglq)
3772a991 9228{
4f774513
JS
9229 uint16_t xritag = NO_XRI;
9230 struct ulp_bde64 *bpl = NULL;
9231 struct ulp_bde64 bde;
9232 struct sli4_sge *sgl = NULL;
1b51197d 9233 struct lpfc_dmabuf *dmabuf;
4f774513
JS
9234 IOCB_t *icmd;
9235 int numBdes = 0;
9236 int i = 0;
63e801ce
JS
9237 uint32_t offset = 0; /* accumulated offset in the sg request list */
9238 int inbound = 0; /* number of sg reply entries inbound from firmware */
3772a991 9239
4f774513
JS
9240 if (!piocbq || !sglq)
9241 return xritag;
9242
9243 sgl = (struct sli4_sge *)sglq->sgl;
9244 icmd = &piocbq->iocb;
6b5151fd
JS
9245 if (icmd->ulpCommand == CMD_XMIT_BLS_RSP64_CX)
9246 return sglq->sli4_xritag;
4f774513
JS
9247 if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
9248 numBdes = icmd->un.genreq64.bdl.bdeSize /
9249 sizeof(struct ulp_bde64);
9250 /* The addrHigh and addrLow fields within the IOCB
9251 * have not been byteswapped yet so there is no
9252 * need to swap them back.
9253 */
1b51197d
JS
9254 if (piocbq->context3)
9255 dmabuf = (struct lpfc_dmabuf *)piocbq->context3;
9256 else
9257 return xritag;
4f774513 9258
1b51197d 9259 bpl = (struct ulp_bde64 *)dmabuf->virt;
4f774513
JS
9260 if (!bpl)
9261 return xritag;
9262
9263 for (i = 0; i < numBdes; i++) {
9264 /* Should already be byte swapped. */
28baac74
JS
9265 sgl->addr_hi = bpl->addrHigh;
9266 sgl->addr_lo = bpl->addrLow;
9267
0558056c 9268 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9269 if ((i+1) == numBdes)
9270 bf_set(lpfc_sli4_sge_last, sgl, 1);
9271 else
9272 bf_set(lpfc_sli4_sge_last, sgl, 0);
28baac74
JS
9273 /* swap the size field back to the cpu so we
9274 * can assign it to the sgl.
9275 */
9276 bde.tus.w = le32_to_cpu(bpl->tus.w);
9277 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
63e801ce
JS
9278 /* The offsets in the sgl need to be accumulated
9279 * separately for the request and reply lists.
9280 * The request is always first, the reply follows.
9281 */
9282 if (piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) {
9283 /* add up the reply sg entries */
9284 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
9285 inbound++;
9286 /* first inbound? reset the offset */
9287 if (inbound == 1)
9288 offset = 0;
9289 bf_set(lpfc_sli4_sge_offset, sgl, offset);
f9bb2da1
JS
9290 bf_set(lpfc_sli4_sge_type, sgl,
9291 LPFC_SGE_TYPE_DATA);
63e801ce
JS
9292 offset += bde.tus.f.bdeSize;
9293 }
546fc854 9294 sgl->word2 = cpu_to_le32(sgl->word2);
4f774513
JS
9295 bpl++;
9296 sgl++;
9297 }
9298 } else if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BDE_64) {
9299 /* The addrHigh and addrLow fields of the BDE have not
9300 * been byteswapped yet so they need to be swapped
9301 * before putting them in the sgl.
9302 */
9303 sgl->addr_hi =
9304 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh);
9305 sgl->addr_lo =
9306 cpu_to_le32(icmd->un.genreq64.bdl.addrLow);
0558056c 9307 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9308 bf_set(lpfc_sli4_sge_last, sgl, 1);
9309 sgl->word2 = cpu_to_le32(sgl->word2);
28baac74
JS
9310 sgl->sge_len =
9311 cpu_to_le32(icmd->un.genreq64.bdl.bdeSize);
4f774513
JS
9312 }
9313 return sglq->sli4_xritag;
3772a991 9314}
92d7f7b0 9315
e59058c4 9316/**
4f774513 9317 * lpfc_sli_iocb2wqe - Convert the IOCB to a work queue entry.
e59058c4 9318 * @phba: Pointer to HBA context object.
4f774513
JS
9319 * @piocb: Pointer to command iocb.
9320 * @wqe: Pointer to the work queue entry.
e59058c4 9321 *
4f774513
JS
9322 * This routine converts the iocb command to its Work Queue Entry
9323 * equivalent. The wqe pointer should not have any fields set when
9324 * this routine is called because it will memcpy over them.
9325 * This routine does not set the CQ_ID or the WQEC bits in the
9326 * wqe.
e59058c4 9327 *
4f774513 9328 * Returns: 0 = Success, IOCB_ERROR = Failure.
e59058c4 9329 **/
cf5bf97e 9330static int
4f774513 9331lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
205e8240 9332 union lpfc_wqe128 *wqe)
cf5bf97e 9333{
5ffc266e 9334 uint32_t xmit_len = 0, total_len = 0;
4f774513
JS
9335 uint8_t ct = 0;
9336 uint32_t fip;
9337 uint32_t abort_tag;
9338 uint8_t command_type = ELS_COMMAND_NON_FIP;
9339 uint8_t cmnd;
9340 uint16_t xritag;
dcf2a4e0
JS
9341 uint16_t abrt_iotag;
9342 struct lpfc_iocbq *abrtiocbq;
4f774513 9343 struct ulp_bde64 *bpl = NULL;
f0d9bccc 9344 uint32_t els_id = LPFC_ELS_ID_DEFAULT;
5ffc266e
JS
9345 int numBdes, i;
9346 struct ulp_bde64 bde;
c31098ce 9347 struct lpfc_nodelist *ndlp;
ff78d8f9 9348 uint32_t *pcmd;
1b51197d 9349 uint32_t if_type;
4f774513 9350
45ed1190 9351 fip = phba->hba_flag & HBA_FIP_SUPPORT;
4f774513 9352 /* The fcp commands will set command type */
0c287589 9353 if (iocbq->iocb_flag & LPFC_IO_FCP)
4f774513 9354 command_type = FCP_COMMAND;
c868595d 9355 else if (fip && (iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK))
0c287589
JS
9356 command_type = ELS_COMMAND_FIP;
9357 else
9358 command_type = ELS_COMMAND_NON_FIP;
9359
b5c53958
JS
9360 if (phba->fcp_embed_io)
9361 memset(wqe, 0, sizeof(union lpfc_wqe128));
4f774513
JS
9362 /* Some of the fields are in the right position already */
9363 memcpy(wqe, &iocbq->iocb, sizeof(union lpfc_wqe));
e62245d9
JS
9364 /* The ct field has moved so reset */
9365 wqe->generic.wqe_com.word7 = 0;
9366 wqe->generic.wqe_com.word10 = 0;
b5c53958
JS
9367
9368 abort_tag = (uint32_t) iocbq->iotag;
9369 xritag = iocbq->sli4_xritag;
4f774513
JS
9370 /* words0-2 bpl convert bde */
9371 if (iocbq->iocb.un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
5ffc266e
JS
9372 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9373 sizeof(struct ulp_bde64);
4f774513
JS
9374 bpl = (struct ulp_bde64 *)
9375 ((struct lpfc_dmabuf *)iocbq->context3)->virt;
9376 if (!bpl)
9377 return IOCB_ERROR;
cf5bf97e 9378
4f774513
JS
9379 /* Should already be byte swapped. */
9380 wqe->generic.bde.addrHigh = le32_to_cpu(bpl->addrHigh);
9381 wqe->generic.bde.addrLow = le32_to_cpu(bpl->addrLow);
9382 /* swap the size field back to the cpu so we
9383 * can assign it to the sgl.
9384 */
9385 wqe->generic.bde.tus.w = le32_to_cpu(bpl->tus.w);
5ffc266e
JS
9386 xmit_len = wqe->generic.bde.tus.f.bdeSize;
9387 total_len = 0;
9388 for (i = 0; i < numBdes; i++) {
9389 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
9390 total_len += bde.tus.f.bdeSize;
9391 }
4f774513 9392 } else
5ffc266e 9393 xmit_len = iocbq->iocb.un.fcpi64.bdl.bdeSize;
cf5bf97e 9394
4f774513
JS
9395 iocbq->iocb.ulpIoTag = iocbq->iotag;
9396 cmnd = iocbq->iocb.ulpCommand;
a4bc3379 9397
4f774513
JS
9398 switch (iocbq->iocb.ulpCommand) {
9399 case CMD_ELS_REQUEST64_CR:
93d1379e
JS
9400 if (iocbq->iocb_flag & LPFC_IO_LIBDFC)
9401 ndlp = iocbq->context_un.ndlp;
9402 else
9403 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513
JS
9404 if (!iocbq->iocb.ulpLe) {
9405 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9406 "2007 Only Limited Edition cmd Format"
9407 " supported 0x%x\n",
9408 iocbq->iocb.ulpCommand);
9409 return IOCB_ERROR;
9410 }
ff78d8f9 9411
5ffc266e 9412 wqe->els_req.payload_len = xmit_len;
4f774513
JS
9413 /* Els_reguest64 has a TMO */
9414 bf_set(wqe_tmo, &wqe->els_req.wqe_com,
9415 iocbq->iocb.ulpTimeout);
9416 /* Need a VF for word 4 set the vf bit*/
9417 bf_set(els_req64_vf, &wqe->els_req, 0);
9418 /* And a VFID for word 12 */
9419 bf_set(els_req64_vfid, &wqe->els_req, 0);
4f774513 9420 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
f0d9bccc
JS
9421 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9422 iocbq->iocb.ulpContext);
9423 bf_set(wqe_ct, &wqe->els_req.wqe_com, ct);
9424 bf_set(wqe_pu, &wqe->els_req.wqe_com, 0);
4f774513 9425 /* CCP CCPE PV PRI in word10 were set in the memcpy */
ff78d8f9 9426 if (command_type == ELS_COMMAND_FIP)
c868595d
JS
9427 els_id = ((iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK)
9428 >> LPFC_FIP_ELS_ID_SHIFT);
ff78d8f9
JS
9429 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9430 iocbq->context2)->virt);
1b51197d
JS
9431 if_type = bf_get(lpfc_sli_intf_if_type,
9432 &phba->sli4_hba.sli_intf);
27d6ac0a 9433 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
ff78d8f9 9434 if (pcmd && (*pcmd == ELS_CMD_FLOGI ||
cb69f7de 9435 *pcmd == ELS_CMD_SCR ||
f60cb93b 9436 *pcmd == ELS_CMD_RSCN_XMT ||
6b5151fd 9437 *pcmd == ELS_CMD_FDISC ||
bdcd2b92 9438 *pcmd == ELS_CMD_LOGO ||
ff78d8f9
JS
9439 *pcmd == ELS_CMD_PLOGI)) {
9440 bf_set(els_req64_sp, &wqe->els_req, 1);
9441 bf_set(els_req64_sid, &wqe->els_req,
9442 iocbq->vport->fc_myDID);
939723a4
JS
9443 if ((*pcmd == ELS_CMD_FLOGI) &&
9444 !(phba->fc_topology ==
9445 LPFC_TOPOLOGY_LOOP))
9446 bf_set(els_req64_sid, &wqe->els_req, 0);
ff78d8f9
JS
9447 bf_set(wqe_ct, &wqe->els_req.wqe_com, 1);
9448 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
a7dd9c0f 9449 phba->vpi_ids[iocbq->vport->vpi]);
3ef6d24c 9450 } else if (pcmd && iocbq->context1) {
ff78d8f9
JS
9451 bf_set(wqe_ct, &wqe->els_req.wqe_com, 0);
9452 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9453 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
9454 }
c868595d 9455 }
6d368e53
JS
9456 bf_set(wqe_temp_rpi, &wqe->els_req.wqe_com,
9457 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
f0d9bccc
JS
9458 bf_set(wqe_els_id, &wqe->els_req.wqe_com, els_id);
9459 bf_set(wqe_dbde, &wqe->els_req.wqe_com, 1);
9460 bf_set(wqe_iod, &wqe->els_req.wqe_com, LPFC_WQE_IOD_READ);
9461 bf_set(wqe_qosd, &wqe->els_req.wqe_com, 1);
9462 bf_set(wqe_lenloc, &wqe->els_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9463 bf_set(wqe_ebde_cnt, &wqe->els_req.wqe_com, 0);
af22741c 9464 wqe->els_req.max_response_payload_len = total_len - xmit_len;
7851fe2c 9465 break;
5ffc266e 9466 case CMD_XMIT_SEQUENCE64_CX:
f0d9bccc
JS
9467 bf_set(wqe_ctxt_tag, &wqe->xmit_sequence.wqe_com,
9468 iocbq->iocb.un.ulpWord[3]);
9469 bf_set(wqe_rcvoxid, &wqe->xmit_sequence.wqe_com,
7851fe2c 9470 iocbq->iocb.unsli3.rcvsli3.ox_id);
5ffc266e
JS
9471 /* The entire sequence is transmitted for this IOCB */
9472 xmit_len = total_len;
9473 cmnd = CMD_XMIT_SEQUENCE64_CR;
1b51197d
JS
9474 if (phba->link_flag & LS_LOOPBACK_MODE)
9475 bf_set(wqe_xo, &wqe->xmit_sequence.wge_ctl, 1);
5bd5f66c 9476 /* fall through */
4f774513 9477 case CMD_XMIT_SEQUENCE64_CR:
f0d9bccc
JS
9478 /* word3 iocb=io_tag32 wqe=reserved */
9479 wqe->xmit_sequence.rsvd3 = 0;
4f774513
JS
9480 /* word4 relative_offset memcpy */
9481 /* word5 r_ctl/df_ctl memcpy */
f0d9bccc
JS
9482 bf_set(wqe_pu, &wqe->xmit_sequence.wqe_com, 0);
9483 bf_set(wqe_dbde, &wqe->xmit_sequence.wqe_com, 1);
9484 bf_set(wqe_iod, &wqe->xmit_sequence.wqe_com,
9485 LPFC_WQE_IOD_WRITE);
9486 bf_set(wqe_lenloc, &wqe->xmit_sequence.wqe_com,
9487 LPFC_WQE_LENLOC_WORD12);
9488 bf_set(wqe_ebde_cnt, &wqe->xmit_sequence.wqe_com, 0);
5ffc266e
JS
9489 wqe->xmit_sequence.xmit_len = xmit_len;
9490 command_type = OTHER_COMMAND;
7851fe2c 9491 break;
4f774513 9492 case CMD_XMIT_BCAST64_CN:
f0d9bccc
JS
9493 /* word3 iocb=iotag32 wqe=seq_payload_len */
9494 wqe->xmit_bcast64.seq_payload_len = xmit_len;
4f774513
JS
9495 /* word4 iocb=rsvd wqe=rsvd */
9496 /* word5 iocb=rctl/type/df_ctl wqe=rctl/type/df_ctl memcpy */
9497 /* word6 iocb=ctxt_tag/io_tag wqe=ctxt_tag/xri */
f0d9bccc 9498 bf_set(wqe_ct, &wqe->xmit_bcast64.wqe_com,
4f774513 9499 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
f0d9bccc
JS
9500 bf_set(wqe_dbde, &wqe->xmit_bcast64.wqe_com, 1);
9501 bf_set(wqe_iod, &wqe->xmit_bcast64.wqe_com, LPFC_WQE_IOD_WRITE);
9502 bf_set(wqe_lenloc, &wqe->xmit_bcast64.wqe_com,
9503 LPFC_WQE_LENLOC_WORD3);
9504 bf_set(wqe_ebde_cnt, &wqe->xmit_bcast64.wqe_com, 0);
7851fe2c 9505 break;
4f774513
JS
9506 case CMD_FCP_IWRITE64_CR:
9507 command_type = FCP_COMMAND_DATA_OUT;
f0d9bccc
JS
9508 /* word3 iocb=iotag wqe=payload_offset_len */
9509 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9510 bf_set(payload_offset_len, &wqe->fcp_iwrite,
9511 xmit_len + sizeof(struct fcp_rsp));
9512 bf_set(cmd_buff_len, &wqe->fcp_iwrite,
9513 0);
f0d9bccc
JS
9514 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9515 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9516 bf_set(wqe_erp, &wqe->fcp_iwrite.wqe_com,
9517 iocbq->iocb.ulpFCP2Rcvy);
9518 bf_set(wqe_lnk, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpXS);
9519 /* Always open the exchange */
f0d9bccc
JS
9520 bf_set(wqe_iod, &wqe->fcp_iwrite.wqe_com, LPFC_WQE_IOD_WRITE);
9521 bf_set(wqe_lenloc, &wqe->fcp_iwrite.wqe_com,
9522 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9523 bf_set(wqe_pu, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9524 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 1);
1ba981fd
JS
9525 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9526 bf_set(wqe_oas, &wqe->fcp_iwrite.wqe_com, 1);
c92c841c
JS
9527 bf_set(wqe_ccpe, &wqe->fcp_iwrite.wqe_com, 1);
9528 if (iocbq->priority) {
9529 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9530 (iocbq->priority << 1));
9531 } else {
1ba981fd
JS
9532 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9533 (phba->cfg_XLanePriority << 1));
9534 }
9535 }
b5c53958
JS
9536 /* Note, word 10 is already initialized to 0 */
9537
414abe0a
JS
9538 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9539 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9540 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 1);
9541 else
9542 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 0);
9543
b5c53958 9544 if (phba->fcp_embed_io) {
c490850a 9545 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9546 struct sli4_sge *sgl;
b5c53958
JS
9547 struct fcp_cmnd *fcp_cmnd;
9548 uint32_t *ptr;
9549
9550 /* 128 byte wqe support here */
b5c53958
JS
9551
9552 lpfc_cmd = iocbq->context1;
0794d601 9553 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9554 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9555
9556 /* Word 0-2 - FCP_CMND */
205e8240 9557 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9558 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9559 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9560 wqe->generic.bde.addrHigh = 0;
9561 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9562
205e8240
JS
9563 bf_set(wqe_wqes, &wqe->fcp_iwrite.wqe_com, 1);
9564 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 0);
b5c53958
JS
9565
9566 /* Word 22-29 FCP CMND Payload */
205e8240 9567 ptr = &wqe->words[22];
b5c53958
JS
9568 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9569 }
7851fe2c 9570 break;
4f774513 9571 case CMD_FCP_IREAD64_CR:
f0d9bccc
JS
9572 /* word3 iocb=iotag wqe=payload_offset_len */
9573 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9574 bf_set(payload_offset_len, &wqe->fcp_iread,
9575 xmit_len + sizeof(struct fcp_rsp));
9576 bf_set(cmd_buff_len, &wqe->fcp_iread,
9577 0);
f0d9bccc
JS
9578 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9579 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9580 bf_set(wqe_erp, &wqe->fcp_iread.wqe_com,
9581 iocbq->iocb.ulpFCP2Rcvy);
9582 bf_set(wqe_lnk, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpXS);
f1126688 9583 /* Always open the exchange */
f0d9bccc
JS
9584 bf_set(wqe_iod, &wqe->fcp_iread.wqe_com, LPFC_WQE_IOD_READ);
9585 bf_set(wqe_lenloc, &wqe->fcp_iread.wqe_com,
9586 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9587 bf_set(wqe_pu, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9588 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 1);
1ba981fd
JS
9589 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9590 bf_set(wqe_oas, &wqe->fcp_iread.wqe_com, 1);
c92c841c
JS
9591 bf_set(wqe_ccpe, &wqe->fcp_iread.wqe_com, 1);
9592 if (iocbq->priority) {
9593 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9594 (iocbq->priority << 1));
9595 } else {
1ba981fd
JS
9596 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9597 (phba->cfg_XLanePriority << 1));
9598 }
9599 }
b5c53958
JS
9600 /* Note, word 10 is already initialized to 0 */
9601
414abe0a
JS
9602 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9603 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9604 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 1);
9605 else
9606 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 0);
9607
b5c53958 9608 if (phba->fcp_embed_io) {
c490850a 9609 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9610 struct sli4_sge *sgl;
b5c53958
JS
9611 struct fcp_cmnd *fcp_cmnd;
9612 uint32_t *ptr;
9613
9614 /* 128 byte wqe support here */
b5c53958
JS
9615
9616 lpfc_cmd = iocbq->context1;
0794d601 9617 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9618 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9619
9620 /* Word 0-2 - FCP_CMND */
205e8240 9621 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9622 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9623 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9624 wqe->generic.bde.addrHigh = 0;
9625 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9626
205e8240
JS
9627 bf_set(wqe_wqes, &wqe->fcp_iread.wqe_com, 1);
9628 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 0);
b5c53958
JS
9629
9630 /* Word 22-29 FCP CMND Payload */
205e8240 9631 ptr = &wqe->words[22];
b5c53958
JS
9632 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9633 }
7851fe2c 9634 break;
4f774513 9635 case CMD_FCP_ICMND64_CR:
0ba4b219
JS
9636 /* word3 iocb=iotag wqe=payload_offset_len */
9637 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
9638 bf_set(payload_offset_len, &wqe->fcp_icmd,
9639 xmit_len + sizeof(struct fcp_rsp));
9640 bf_set(cmd_buff_len, &wqe->fcp_icmd,
9641 0);
f0d9bccc 9642 /* word3 iocb=IO_TAG wqe=reserved */
f0d9bccc 9643 bf_set(wqe_pu, &wqe->fcp_icmd.wqe_com, 0);
4f774513 9644 /* Always open the exchange */
f0d9bccc
JS
9645 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 1);
9646 bf_set(wqe_iod, &wqe->fcp_icmd.wqe_com, LPFC_WQE_IOD_WRITE);
9647 bf_set(wqe_qosd, &wqe->fcp_icmd.wqe_com, 1);
9648 bf_set(wqe_lenloc, &wqe->fcp_icmd.wqe_com,
9649 LPFC_WQE_LENLOC_NONE);
2a94aea4
JS
9650 bf_set(wqe_erp, &wqe->fcp_icmd.wqe_com,
9651 iocbq->iocb.ulpFCP2Rcvy);
1ba981fd
JS
9652 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9653 bf_set(wqe_oas, &wqe->fcp_icmd.wqe_com, 1);
c92c841c
JS
9654 bf_set(wqe_ccpe, &wqe->fcp_icmd.wqe_com, 1);
9655 if (iocbq->priority) {
9656 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9657 (iocbq->priority << 1));
9658 } else {
1ba981fd
JS
9659 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9660 (phba->cfg_XLanePriority << 1));
9661 }
9662 }
b5c53958
JS
9663 /* Note, word 10 is already initialized to 0 */
9664
9665 if (phba->fcp_embed_io) {
c490850a 9666 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9667 struct sli4_sge *sgl;
b5c53958
JS
9668 struct fcp_cmnd *fcp_cmnd;
9669 uint32_t *ptr;
9670
9671 /* 128 byte wqe support here */
b5c53958
JS
9672
9673 lpfc_cmd = iocbq->context1;
0794d601 9674 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9675 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9676
9677 /* Word 0-2 - FCP_CMND */
205e8240 9678 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9679 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9680 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9681 wqe->generic.bde.addrHigh = 0;
9682 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9683
205e8240
JS
9684 bf_set(wqe_wqes, &wqe->fcp_icmd.wqe_com, 1);
9685 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 0);
b5c53958
JS
9686
9687 /* Word 22-29 FCP CMND Payload */
205e8240 9688 ptr = &wqe->words[22];
b5c53958
JS
9689 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9690 }
7851fe2c 9691 break;
4f774513 9692 case CMD_GEN_REQUEST64_CR:
63e801ce
JS
9693 /* For this command calculate the xmit length of the
9694 * request bde.
9695 */
9696 xmit_len = 0;
9697 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9698 sizeof(struct ulp_bde64);
9699 for (i = 0; i < numBdes; i++) {
63e801ce 9700 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
546fc854
JS
9701 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
9702 break;
63e801ce
JS
9703 xmit_len += bde.tus.f.bdeSize;
9704 }
f0d9bccc
JS
9705 /* word3 iocb=IO_TAG wqe=request_payload_len */
9706 wqe->gen_req.request_payload_len = xmit_len;
9707 /* word4 iocb=parameter wqe=relative_offset memcpy */
9708 /* word5 [rctl, type, df_ctl, la] copied in memcpy */
4f774513
JS
9709 /* word6 context tag copied in memcpy */
9710 if (iocbq->iocb.ulpCt_h || iocbq->iocb.ulpCt_l) {
9711 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
9712 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9713 "2015 Invalid CT %x command 0x%x\n",
9714 ct, iocbq->iocb.ulpCommand);
9715 return IOCB_ERROR;
9716 }
f0d9bccc
JS
9717 bf_set(wqe_ct, &wqe->gen_req.wqe_com, 0);
9718 bf_set(wqe_tmo, &wqe->gen_req.wqe_com, iocbq->iocb.ulpTimeout);
9719 bf_set(wqe_pu, &wqe->gen_req.wqe_com, iocbq->iocb.ulpPU);
9720 bf_set(wqe_dbde, &wqe->gen_req.wqe_com, 1);
9721 bf_set(wqe_iod, &wqe->gen_req.wqe_com, LPFC_WQE_IOD_READ);
9722 bf_set(wqe_qosd, &wqe->gen_req.wqe_com, 1);
9723 bf_set(wqe_lenloc, &wqe->gen_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9724 bf_set(wqe_ebde_cnt, &wqe->gen_req.wqe_com, 0);
af22741c 9725 wqe->gen_req.max_response_payload_len = total_len - xmit_len;
4f774513 9726 command_type = OTHER_COMMAND;
7851fe2c 9727 break;
4f774513 9728 case CMD_XMIT_ELS_RSP64_CX:
c31098ce 9729 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513 9730 /* words0-2 BDE memcpy */
f0d9bccc
JS
9731 /* word3 iocb=iotag32 wqe=response_payload_len */
9732 wqe->xmit_els_rsp.response_payload_len = xmit_len;
939723a4
JS
9733 /* word4 */
9734 wqe->xmit_els_rsp.word4 = 0;
4f774513
JS
9735 /* word5 iocb=rsvd wge=did */
9736 bf_set(wqe_els_did, &wqe->xmit_els_rsp.wqe_dest,
939723a4
JS
9737 iocbq->iocb.un.xseq64.xmit_els_remoteID);
9738
9739 if_type = bf_get(lpfc_sli_intf_if_type,
9740 &phba->sli4_hba.sli_intf);
27d6ac0a 9741 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
939723a4
JS
9742 if (iocbq->vport->fc_flag & FC_PT2PT) {
9743 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9744 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
9745 iocbq->vport->fc_myDID);
9746 if (iocbq->vport->fc_myDID == Fabric_DID) {
9747 bf_set(wqe_els_did,
9748 &wqe->xmit_els_rsp.wqe_dest, 0);
9749 }
9750 }
9751 }
f0d9bccc
JS
9752 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com,
9753 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9754 bf_set(wqe_pu, &wqe->xmit_els_rsp.wqe_com, iocbq->iocb.ulpPU);
9755 bf_set(wqe_rcvoxid, &wqe->xmit_els_rsp.wqe_com,
7851fe2c 9756 iocbq->iocb.unsli3.rcvsli3.ox_id);
4f774513 9757 if (!iocbq->iocb.ulpCt_h && iocbq->iocb.ulpCt_l)
f0d9bccc 9758 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
6d368e53 9759 phba->vpi_ids[iocbq->vport->vpi]);
f0d9bccc
JS
9760 bf_set(wqe_dbde, &wqe->xmit_els_rsp.wqe_com, 1);
9761 bf_set(wqe_iod, &wqe->xmit_els_rsp.wqe_com, LPFC_WQE_IOD_WRITE);
9762 bf_set(wqe_qosd, &wqe->xmit_els_rsp.wqe_com, 1);
9763 bf_set(wqe_lenloc, &wqe->xmit_els_rsp.wqe_com,
9764 LPFC_WQE_LENLOC_WORD3);
9765 bf_set(wqe_ebde_cnt, &wqe->xmit_els_rsp.wqe_com, 0);
6d368e53
JS
9766 bf_set(wqe_rsp_temp_rpi, &wqe->xmit_els_rsp,
9767 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
ff78d8f9
JS
9768 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9769 iocbq->context2)->virt);
9770 if (phba->fc_topology == LPFC_TOPOLOGY_LOOP) {
939723a4
JS
9771 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9772 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
ff78d8f9 9773 iocbq->vport->fc_myDID);
939723a4
JS
9774 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com, 1);
9775 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
ff78d8f9
JS
9776 phba->vpi_ids[phba->pport->vpi]);
9777 }
4f774513 9778 command_type = OTHER_COMMAND;
7851fe2c 9779 break;
4f774513
JS
9780 case CMD_CLOSE_XRI_CN:
9781 case CMD_ABORT_XRI_CN:
9782 case CMD_ABORT_XRI_CX:
9783 /* words 0-2 memcpy should be 0 rserved */
9784 /* port will send abts */
dcf2a4e0
JS
9785 abrt_iotag = iocbq->iocb.un.acxri.abortContextTag;
9786 if (abrt_iotag != 0 && abrt_iotag <= phba->sli.last_iotag) {
9787 abrtiocbq = phba->sli.iocbq_lookup[abrt_iotag];
9788 fip = abrtiocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK;
9789 } else
9790 fip = 0;
9791
9792 if ((iocbq->iocb.ulpCommand == CMD_CLOSE_XRI_CN) || fip)
4f774513 9793 /*
dcf2a4e0
JS
9794 * The link is down, or the command was ELS_FIP
9795 * so the fw does not need to send abts
4f774513
JS
9796 * on the wire.
9797 */
9798 bf_set(abort_cmd_ia, &wqe->abort_cmd, 1);
9799 else
9800 bf_set(abort_cmd_ia, &wqe->abort_cmd, 0);
9801 bf_set(abort_cmd_criteria, &wqe->abort_cmd, T_XRI_TAG);
f0d9bccc
JS
9802 /* word5 iocb=CONTEXT_TAG|IO_TAG wqe=reserved */
9803 wqe->abort_cmd.rsrvd5 = 0;
9804 bf_set(wqe_ct, &wqe->abort_cmd.wqe_com,
4f774513
JS
9805 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9806 abort_tag = iocbq->iocb.un.acxri.abortIoTag;
4f774513
JS
9807 /*
9808 * The abort handler will send us CMD_ABORT_XRI_CN or
9809 * CMD_CLOSE_XRI_CN and the fw only accepts CMD_ABORT_XRI_CX
9810 */
f0d9bccc
JS
9811 bf_set(wqe_cmnd, &wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
9812 bf_set(wqe_qosd, &wqe->abort_cmd.wqe_com, 1);
9813 bf_set(wqe_lenloc, &wqe->abort_cmd.wqe_com,
9814 LPFC_WQE_LENLOC_NONE);
4f774513
JS
9815 cmnd = CMD_ABORT_XRI_CX;
9816 command_type = OTHER_COMMAND;
9817 xritag = 0;
7851fe2c 9818 break;
6669f9bb 9819 case CMD_XMIT_BLS_RSP64_CX:
6b5151fd 9820 ndlp = (struct lpfc_nodelist *)iocbq->context1;
546fc854 9821 /* As BLS ABTS RSP WQE is very different from other WQEs,
6669f9bb
JS
9822 * we re-construct this WQE here based on information in
9823 * iocbq from scratch.
9824 */
d9f492a1 9825 memset(wqe, 0, sizeof(*wqe));
5ffc266e 9826 /* OX_ID is invariable to who sent ABTS to CT exchange */
6669f9bb 9827 bf_set(xmit_bls_rsp64_oxid, &wqe->xmit_bls_rsp,
546fc854
JS
9828 bf_get(lpfc_abts_oxid, &iocbq->iocb.un.bls_rsp));
9829 if (bf_get(lpfc_abts_orig, &iocbq->iocb.un.bls_rsp) ==
5ffc266e
JS
9830 LPFC_ABTS_UNSOL_INT) {
9831 /* ABTS sent by initiator to CT exchange, the
9832 * RX_ID field will be filled with the newly
9833 * allocated responder XRI.
9834 */
9835 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
9836 iocbq->sli4_xritag);
9837 } else {
9838 /* ABTS sent by responder to CT exchange, the
9839 * RX_ID field will be filled with the responder
9840 * RX_ID from ABTS.
9841 */
9842 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
546fc854 9843 bf_get(lpfc_abts_rxid, &iocbq->iocb.un.bls_rsp));
5ffc266e 9844 }
6669f9bb
JS
9845 bf_set(xmit_bls_rsp64_seqcnthi, &wqe->xmit_bls_rsp, 0xffff);
9846 bf_set(wqe_xmit_bls_pt, &wqe->xmit_bls_rsp.wqe_dest, 0x1);
6b5151fd
JS
9847
9848 /* Use CT=VPI */
9849 bf_set(wqe_els_did, &wqe->xmit_bls_rsp.wqe_dest,
9850 ndlp->nlp_DID);
9851 bf_set(xmit_bls_rsp64_temprpi, &wqe->xmit_bls_rsp,
9852 iocbq->iocb.ulpContext);
9853 bf_set(wqe_ct, &wqe->xmit_bls_rsp.wqe_com, 1);
6669f9bb 9854 bf_set(wqe_ctxt_tag, &wqe->xmit_bls_rsp.wqe_com,
6b5151fd 9855 phba->vpi_ids[phba->pport->vpi]);
f0d9bccc
JS
9856 bf_set(wqe_qosd, &wqe->xmit_bls_rsp.wqe_com, 1);
9857 bf_set(wqe_lenloc, &wqe->xmit_bls_rsp.wqe_com,
9858 LPFC_WQE_LENLOC_NONE);
6669f9bb
JS
9859 /* Overwrite the pre-set comnd type with OTHER_COMMAND */
9860 command_type = OTHER_COMMAND;
546fc854
JS
9861 if (iocbq->iocb.un.xseq64.w5.hcsw.Rctl == FC_RCTL_BA_RJT) {
9862 bf_set(xmit_bls_rsp64_rjt_vspec, &wqe->xmit_bls_rsp,
9863 bf_get(lpfc_vndr_code, &iocbq->iocb.un.bls_rsp));
9864 bf_set(xmit_bls_rsp64_rjt_expc, &wqe->xmit_bls_rsp,
9865 bf_get(lpfc_rsn_expln, &iocbq->iocb.un.bls_rsp));
9866 bf_set(xmit_bls_rsp64_rjt_rsnc, &wqe->xmit_bls_rsp,
9867 bf_get(lpfc_rsn_code, &iocbq->iocb.un.bls_rsp));
9868 }
9869
7851fe2c 9870 break;
ae9e28f3 9871 case CMD_SEND_FRAME:
e62245d9
JS
9872 bf_set(wqe_cmnd, &wqe->generic.wqe_com, CMD_SEND_FRAME);
9873 bf_set(wqe_sof, &wqe->generic.wqe_com, 0x2E); /* SOF byte */
9874 bf_set(wqe_eof, &wqe->generic.wqe_com, 0x41); /* EOF byte */
9875 bf_set(wqe_lenloc, &wqe->generic.wqe_com, 1);
9876 bf_set(wqe_xbl, &wqe->generic.wqe_com, 1);
9877 bf_set(wqe_dbde, &wqe->generic.wqe_com, 1);
9878 bf_set(wqe_xc, &wqe->generic.wqe_com, 1);
9879 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, 0xA);
9880 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
ae9e28f3
JS
9881 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9882 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9883 return 0;
4f774513
JS
9884 case CMD_XRI_ABORTED_CX:
9885 case CMD_CREATE_XRI_CR: /* Do we expect to use this? */
4f774513
JS
9886 case CMD_IOCB_FCP_IBIDIR64_CR: /* bidirectional xfer */
9887 case CMD_FCP_TSEND64_CX: /* Target mode send xfer-ready */
9888 case CMD_FCP_TRSP64_CX: /* Target mode rcv */
9889 case CMD_FCP_AUTO_TRSP_CX: /* Auto target rsp */
9890 default:
9891 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9892 "2014 Invalid command 0x%x\n",
9893 iocbq->iocb.ulpCommand);
9894 return IOCB_ERROR;
7851fe2c 9895 break;
4f774513 9896 }
6d368e53 9897
8012cc38
JS
9898 if (iocbq->iocb_flag & LPFC_IO_DIF_PASS)
9899 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_PASSTHRU);
9900 else if (iocbq->iocb_flag & LPFC_IO_DIF_STRIP)
9901 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_STRIP);
9902 else if (iocbq->iocb_flag & LPFC_IO_DIF_INSERT)
9903 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_INSERT);
9904 iocbq->iocb_flag &= ~(LPFC_IO_DIF_PASS | LPFC_IO_DIF_STRIP |
9905 LPFC_IO_DIF_INSERT);
f0d9bccc
JS
9906 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9907 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9908 wqe->generic.wqe_com.abort_tag = abort_tag;
9909 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, command_type);
9910 bf_set(wqe_cmnd, &wqe->generic.wqe_com, cmnd);
9911 bf_set(wqe_class, &wqe->generic.wqe_com, iocbq->iocb.ulpClass);
9912 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
4f774513
JS
9913 return 0;
9914}
9915
9916/**
9917 * __lpfc_sli_issue_iocb_s4 - SLI4 device lockless ver of lpfc_sli_issue_iocb
9918 * @phba: Pointer to HBA context object.
9919 * @ring_number: SLI ring number to issue iocb on.
9920 * @piocb: Pointer to command iocb.
9921 * @flag: Flag indicating if this command can be put into txq.
9922 *
9923 * __lpfc_sli_issue_iocb_s4 is used by other functions in the driver to issue
9924 * an iocb command to an HBA with SLI-4 interface spec.
9925 *
27f3efd6 9926 * This function is called with ringlock held. The function will return success
4f774513
JS
9927 * after it successfully submit the iocb to firmware or after adding to the
9928 * txq.
9929 **/
9930static int
9931__lpfc_sli_issue_iocb_s4(struct lpfc_hba *phba, uint32_t ring_number,
9932 struct lpfc_iocbq *piocb, uint32_t flag)
9933{
9934 struct lpfc_sglq *sglq;
205e8240 9935 union lpfc_wqe128 wqe;
1ba981fd 9936 struct lpfc_queue *wq;
895427bd 9937 struct lpfc_sli_ring *pring;
4f774513 9938
895427bd
JS
9939 /* Get the WQ */
9940 if ((piocb->iocb_flag & LPFC_IO_FCP) ||
9941 (piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
c00f62e6 9942 wq = phba->sli4_hba.hdwq[piocb->hba_wqidx].io_wq;
895427bd
JS
9943 } else {
9944 wq = phba->sli4_hba.els_wq;
9945 }
9946
9947 /* Get corresponding ring */
9948 pring = wq->pring;
1c2ba475 9949
b5c53958
JS
9950 /*
9951 * The WQE can be either 64 or 128 bytes,
b5c53958 9952 */
b5c53958 9953
cda7fa18 9954 lockdep_assert_held(&pring->ring_lock);
895427bd 9955
4f774513
JS
9956 if (piocb->sli4_xritag == NO_XRI) {
9957 if (piocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
6b5151fd 9958 piocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN)
4f774513
JS
9959 sglq = NULL;
9960 else {
0e9bb8d7 9961 if (!list_empty(&pring->txq)) {
2a9bf3d0
JS
9962 if (!(flag & SLI_IOCB_RET_IOCB)) {
9963 __lpfc_sli_ringtx_put(phba,
9964 pring, piocb);
9965 return IOCB_SUCCESS;
9966 } else {
9967 return IOCB_BUSY;
9968 }
9969 } else {
895427bd 9970 sglq = __lpfc_sli_get_els_sglq(phba, piocb);
2a9bf3d0
JS
9971 if (!sglq) {
9972 if (!(flag & SLI_IOCB_RET_IOCB)) {
9973 __lpfc_sli_ringtx_put(phba,
9974 pring,
9975 piocb);
9976 return IOCB_SUCCESS;
9977 } else
9978 return IOCB_BUSY;
9979 }
9980 }
4f774513 9981 }
2ea259ee 9982 } else if (piocb->iocb_flag & LPFC_IO_FCP)
6d368e53
JS
9983 /* These IO's already have an XRI and a mapped sgl. */
9984 sglq = NULL;
2ea259ee 9985 else {
6d368e53
JS
9986 /*
9987 * This is a continuation of a commandi,(CX) so this
4f774513
JS
9988 * sglq is on the active list
9989 */
edccdc17 9990 sglq = __lpfc_get_active_sglq(phba, piocb->sli4_lxritag);
4f774513
JS
9991 if (!sglq)
9992 return IOCB_ERROR;
9993 }
9994
9995 if (sglq) {
6d368e53 9996 piocb->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0 9997 piocb->sli4_xritag = sglq->sli4_xritag;
2a9bf3d0 9998 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocb, sglq))
4f774513
JS
9999 return IOCB_ERROR;
10000 }
10001
205e8240 10002 if (lpfc_sli4_iocb2wqe(phba, piocb, &wqe))
4f774513
JS
10003 return IOCB_ERROR;
10004
205e8240 10005 if (lpfc_sli4_wq_put(wq, &wqe))
895427bd 10006 return IOCB_ERROR;
4f774513
JS
10007 lpfc_sli_ringtxcmpl_put(phba, pring, piocb);
10008
10009 return 0;
10010}
10011
10012/**
10013 * __lpfc_sli_issue_iocb - Wrapper func of lockless version for issuing iocb
10014 *
10015 * This routine wraps the actual lockless version for issusing IOCB function
10016 * pointer from the lpfc_hba struct.
10017 *
10018 * Return codes:
b5c53958
JS
10019 * IOCB_ERROR - Error
10020 * IOCB_SUCCESS - Success
10021 * IOCB_BUSY - Busy
4f774513 10022 **/
2a9bf3d0 10023int
4f774513
JS
10024__lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
10025 struct lpfc_iocbq *piocb, uint32_t flag)
10026{
10027 return phba->__lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10028}
10029
10030/**
25985edc 10031 * lpfc_sli_api_table_setup - Set up sli api function jump table
4f774513
JS
10032 * @phba: The hba struct for which this call is being executed.
10033 * @dev_grp: The HBA PCI-Device group number.
10034 *
10035 * This routine sets up the SLI interface API function jump table in @phba
10036 * struct.
10037 * Returns: 0 - success, -ENODEV - failure.
10038 **/
10039int
10040lpfc_sli_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
10041{
10042
10043 switch (dev_grp) {
10044 case LPFC_PCI_DEV_LP:
10045 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s3;
10046 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s3;
10047 break;
10048 case LPFC_PCI_DEV_OC:
10049 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s4;
10050 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s4;
10051 break;
10052 default:
10053 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10054 "1419 Invalid HBA PCI-device group: 0x%x\n",
10055 dev_grp);
10056 return -ENODEV;
10057 break;
10058 }
10059 phba->lpfc_get_iocb_from_iocbq = lpfc_get_iocb_from_iocbq;
10060 return 0;
10061}
10062
a1efe163 10063/**
895427bd 10064 * lpfc_sli4_calc_ring - Calculates which ring to use
a1efe163 10065 * @phba: Pointer to HBA context object.
a1efe163
JS
10066 * @piocb: Pointer to command iocb.
10067 *
895427bd
JS
10068 * For SLI4 only, FCP IO can deferred to one fo many WQs, based on
10069 * hba_wqidx, thus we need to calculate the corresponding ring.
a1efe163 10070 * Since ABORTS must go on the same WQ of the command they are
895427bd 10071 * aborting, we use command's hba_wqidx.
a1efe163 10072 */
895427bd
JS
10073struct lpfc_sli_ring *
10074lpfc_sli4_calc_ring(struct lpfc_hba *phba, struct lpfc_iocbq *piocb)
9bd2bff5 10075{
c490850a 10076 struct lpfc_io_buf *lpfc_cmd;
5e5b511d 10077
895427bd 10078 if (piocb->iocb_flag & (LPFC_IO_FCP | LPFC_USE_FCPWQIDX)) {
cdb42bec 10079 if (unlikely(!phba->sli4_hba.hdwq))
7370d10a
JS
10080 return NULL;
10081 /*
10082 * for abort iocb hba_wqidx should already
10083 * be setup based on what work queue we used.
10084 */
10085 if (!(piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
c490850a 10086 lpfc_cmd = (struct lpfc_io_buf *)piocb->context1;
1fbf9742 10087 piocb->hba_wqidx = lpfc_cmd->hdwq_no;
9bd2bff5 10088 }
c00f62e6 10089 return phba->sli4_hba.hdwq[piocb->hba_wqidx].io_wq->pring;
895427bd
JS
10090 } else {
10091 if (unlikely(!phba->sli4_hba.els_wq))
10092 return NULL;
10093 piocb->hba_wqidx = 0;
10094 return phba->sli4_hba.els_wq->pring;
9bd2bff5 10095 }
9bd2bff5
JS
10096}
10097
4f774513
JS
10098/**
10099 * lpfc_sli_issue_iocb - Wrapper function for __lpfc_sli_issue_iocb
10100 * @phba: Pointer to HBA context object.
10101 * @pring: Pointer to driver SLI ring object.
10102 * @piocb: Pointer to command iocb.
10103 * @flag: Flag indicating if this command can be put into txq.
10104 *
10105 * lpfc_sli_issue_iocb is a wrapper around __lpfc_sli_issue_iocb
10106 * function. This function gets the hbalock and calls
10107 * __lpfc_sli_issue_iocb function and will return the error returned
10108 * by __lpfc_sli_issue_iocb function. This wrapper is used by
10109 * functions which do not hold hbalock.
10110 **/
10111int
10112lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
10113 struct lpfc_iocbq *piocb, uint32_t flag)
10114{
2a76a283 10115 struct lpfc_sli_ring *pring;
4f774513 10116 unsigned long iflags;
6a828b0f 10117 int rc;
4f774513 10118
7e56aa25 10119 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
10120 pring = lpfc_sli4_calc_ring(phba, piocb);
10121 if (unlikely(pring == NULL))
9bd2bff5 10122 return IOCB_ERROR;
ba20c853 10123
9bd2bff5
JS
10124 spin_lock_irqsave(&pring->ring_lock, iflags);
10125 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10126 spin_unlock_irqrestore(&pring->ring_lock, iflags);
7e56aa25
JS
10127 } else {
10128 /* For now, SLI2/3 will still use hbalock */
10129 spin_lock_irqsave(&phba->hbalock, iflags);
10130 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10131 spin_unlock_irqrestore(&phba->hbalock, iflags);
10132 }
4f774513
JS
10133 return rc;
10134}
10135
10136/**
10137 * lpfc_extra_ring_setup - Extra ring setup function
10138 * @phba: Pointer to HBA context object.
10139 *
10140 * This function is called while driver attaches with the
10141 * HBA to setup the extra ring. The extra ring is used
10142 * only when driver needs to support target mode functionality
10143 * or IP over FC functionalities.
10144 *
895427bd 10145 * This function is called with no lock held. SLI3 only.
4f774513
JS
10146 **/
10147static int
10148lpfc_extra_ring_setup( struct lpfc_hba *phba)
10149{
10150 struct lpfc_sli *psli;
10151 struct lpfc_sli_ring *pring;
10152
10153 psli = &phba->sli;
10154
10155 /* Adjust cmd/rsp ring iocb entries more evenly */
10156
10157 /* Take some away from the FCP ring */
895427bd 10158 pring = &psli->sli3_ring[LPFC_FCP_RING];
7e56aa25
JS
10159 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10160 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10161 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10162 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e 10163
a4bc3379 10164 /* and give them to the extra ring */
895427bd 10165 pring = &psli->sli3_ring[LPFC_EXTRA_RING];
a4bc3379 10166
7e56aa25
JS
10167 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10168 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10169 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10170 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e
JW
10171
10172 /* Setup default profile for this ring */
10173 pring->iotag_max = 4096;
10174 pring->num_mask = 1;
10175 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS
10176 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
10177 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW
10178 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
10179 return 0;
10180}
10181
cb69f7de
JS
10182/* lpfc_sli_abts_err_handler - handle a failed ABTS request from an SLI3 port.
10183 * @phba: Pointer to HBA context object.
10184 * @iocbq: Pointer to iocb object.
10185 *
10186 * The async_event handler calls this routine when it receives
10187 * an ASYNC_STATUS_CN event from the port. The port generates
10188 * this event when an Abort Sequence request to an rport fails
10189 * twice in succession. The abort could be originated by the
10190 * driver or by the port. The ABTS could have been for an ELS
10191 * or FCP IO. The port only generates this event when an ABTS
10192 * fails to complete after one retry.
10193 */
10194static void
10195lpfc_sli_abts_err_handler(struct lpfc_hba *phba,
10196 struct lpfc_iocbq *iocbq)
10197{
10198 struct lpfc_nodelist *ndlp = NULL;
10199 uint16_t rpi = 0, vpi = 0;
10200 struct lpfc_vport *vport = NULL;
10201
10202 /* The rpi in the ulpContext is vport-sensitive. */
10203 vpi = iocbq->iocb.un.asyncstat.sub_ctxt_tag;
10204 rpi = iocbq->iocb.ulpContext;
10205
10206 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10207 "3092 Port generated ABTS async event "
10208 "on vpi %d rpi %d status 0x%x\n",
10209 vpi, rpi, iocbq->iocb.ulpStatus);
10210
10211 vport = lpfc_find_vport_by_vpid(phba, vpi);
10212 if (!vport)
10213 goto err_exit;
10214 ndlp = lpfc_findnode_rpi(vport, rpi);
10215 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp))
10216 goto err_exit;
10217
10218 if (iocbq->iocb.ulpStatus == IOSTAT_LOCAL_REJECT)
10219 lpfc_sli_abts_recover_port(vport, ndlp);
10220 return;
10221
10222 err_exit:
10223 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10224 "3095 Event Context not found, no "
10225 "action on vpi %d rpi %d status 0x%x, reason 0x%x\n",
10226 iocbq->iocb.ulpContext, iocbq->iocb.ulpStatus,
10227 vpi, rpi);
10228}
10229
10230/* lpfc_sli4_abts_err_handler - handle a failed ABTS request from an SLI4 port.
10231 * @phba: pointer to HBA context object.
10232 * @ndlp: nodelist pointer for the impacted rport.
10233 * @axri: pointer to the wcqe containing the failed exchange.
10234 *
10235 * The driver calls this routine when it receives an ABORT_XRI_FCP CQE from the
10236 * port. The port generates this event when an abort exchange request to an
10237 * rport fails twice in succession with no reply. The abort could be originated
10238 * by the driver or by the port. The ABTS could have been for an ELS or FCP IO.
10239 */
10240void
10241lpfc_sli4_abts_err_handler(struct lpfc_hba *phba,
10242 struct lpfc_nodelist *ndlp,
10243 struct sli4_wcqe_xri_aborted *axri)
10244{
10245 struct lpfc_vport *vport;
5c1db2ac 10246 uint32_t ext_status = 0;
cb69f7de 10247
6b5151fd 10248 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) {
cb69f7de
JS
10249 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10250 "3115 Node Context not found, driver "
10251 "ignoring abts err event\n");
6b5151fd
JS
10252 return;
10253 }
10254
cb69f7de
JS
10255 vport = ndlp->vport;
10256 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10257 "3116 Port generated FCP XRI ABORT event on "
5c1db2ac 10258 "vpi %d rpi %d xri x%x status 0x%x parameter x%x\n",
8e668af5 10259 ndlp->vport->vpi, phba->sli4_hba.rpi_ids[ndlp->nlp_rpi],
cb69f7de 10260 bf_get(lpfc_wcqe_xa_xri, axri),
5c1db2ac
JS
10261 bf_get(lpfc_wcqe_xa_status, axri),
10262 axri->parameter);
cb69f7de 10263
5c1db2ac
JS
10264 /*
10265 * Catch the ABTS protocol failure case. Older OCe FW releases returned
10266 * LOCAL_REJECT and 0 for a failed ABTS exchange and later OCe and
10267 * LPe FW releases returned LOCAL_REJECT and SEQUENCE_TIMEOUT.
10268 */
e3d2b802 10269 ext_status = axri->parameter & IOERR_PARAM_MASK;
5c1db2ac
JS
10270 if ((bf_get(lpfc_wcqe_xa_status, axri) == IOSTAT_LOCAL_REJECT) &&
10271 ((ext_status == IOERR_SEQUENCE_TIMEOUT) || (ext_status == 0)))
cb69f7de
JS
10272 lpfc_sli_abts_recover_port(vport, ndlp);
10273}
10274
e59058c4 10275/**
3621a710 10276 * lpfc_sli_async_event_handler - ASYNC iocb handler function
e59058c4
JS
10277 * @phba: Pointer to HBA context object.
10278 * @pring: Pointer to driver SLI ring object.
10279 * @iocbq: Pointer to iocb object.
10280 *
10281 * This function is called by the slow ring event handler
10282 * function when there is an ASYNC event iocb in the ring.
10283 * This function is called with no lock held.
10284 * Currently this function handles only temperature related
10285 * ASYNC events. The function decodes the temperature sensor
10286 * event message and posts events for the management applications.
10287 **/
98c9ea5c 10288static void
57127f15
JS
10289lpfc_sli_async_event_handler(struct lpfc_hba * phba,
10290 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
10291{
10292 IOCB_t *icmd;
10293 uint16_t evt_code;
57127f15
JS
10294 struct temp_event temp_event_data;
10295 struct Scsi_Host *shost;
a257bf90 10296 uint32_t *iocb_w;
57127f15
JS
10297
10298 icmd = &iocbq->iocb;
10299 evt_code = icmd->un.asyncstat.evt_code;
57127f15 10300
cb69f7de
JS
10301 switch (evt_code) {
10302 case ASYNC_TEMP_WARN:
10303 case ASYNC_TEMP_SAFE:
10304 temp_event_data.data = (uint32_t) icmd->ulpContext;
10305 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
10306 if (evt_code == ASYNC_TEMP_WARN) {
10307 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
10308 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10309 "0347 Adapter is very hot, please take "
10310 "corrective action. temperature : %d Celsius\n",
10311 (uint32_t) icmd->ulpContext);
10312 } else {
10313 temp_event_data.event_code = LPFC_NORMAL_TEMP;
10314 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10315 "0340 Adapter temperature is OK now. "
10316 "temperature : %d Celsius\n",
10317 (uint32_t) icmd->ulpContext);
10318 }
10319
10320 /* Send temperature change event to applications */
10321 shost = lpfc_shost_from_vport(phba->pport);
10322 fc_host_post_vendor_event(shost, fc_get_event_number(),
10323 sizeof(temp_event_data), (char *) &temp_event_data,
10324 LPFC_NL_VENDOR_ID);
10325 break;
10326 case ASYNC_STATUS_CN:
10327 lpfc_sli_abts_err_handler(phba, iocbq);
10328 break;
10329 default:
a257bf90 10330 iocb_w = (uint32_t *) icmd;
cb69f7de 10331 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
76bb24ef 10332 "0346 Ring %d handler: unexpected ASYNC_STATUS"
e4e74273 10333 " evt_code 0x%x\n"
a257bf90
JS
10334 "W0 0x%08x W1 0x%08x W2 0x%08x W3 0x%08x\n"
10335 "W4 0x%08x W5 0x%08x W6 0x%08x W7 0x%08x\n"
10336 "W8 0x%08x W9 0x%08x W10 0x%08x W11 0x%08x\n"
10337 "W12 0x%08x W13 0x%08x W14 0x%08x W15 0x%08x\n",
cb69f7de 10338 pring->ringno, icmd->un.asyncstat.evt_code,
a257bf90
JS
10339 iocb_w[0], iocb_w[1], iocb_w[2], iocb_w[3],
10340 iocb_w[4], iocb_w[5], iocb_w[6], iocb_w[7],
10341 iocb_w[8], iocb_w[9], iocb_w[10], iocb_w[11],
10342 iocb_w[12], iocb_w[13], iocb_w[14], iocb_w[15]);
10343
cb69f7de 10344 break;
57127f15 10345 }
57127f15
JS
10346}
10347
10348
e59058c4 10349/**
895427bd 10350 * lpfc_sli4_setup - SLI ring setup function
e59058c4
JS
10351 * @phba: Pointer to HBA context object.
10352 *
10353 * lpfc_sli_setup sets up rings of the SLI interface with
10354 * number of iocbs per ring and iotags. This function is
10355 * called while driver attach to the HBA and before the
10356 * interrupts are enabled. So there is no need for locking.
10357 *
10358 * This function always returns 0.
10359 **/
dea3101e 10360int
895427bd
JS
10361lpfc_sli4_setup(struct lpfc_hba *phba)
10362{
10363 struct lpfc_sli_ring *pring;
10364
10365 pring = phba->sli4_hba.els_wq->pring;
10366 pring->num_mask = LPFC_MAX_RING_MASK;
10367 pring->prt[0].profile = 0; /* Mask 0 */
10368 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10369 pring->prt[0].type = FC_TYPE_ELS;
10370 pring->prt[0].lpfc_sli_rcv_unsol_event =
10371 lpfc_els_unsol_event;
10372 pring->prt[1].profile = 0; /* Mask 1 */
10373 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10374 pring->prt[1].type = FC_TYPE_ELS;
10375 pring->prt[1].lpfc_sli_rcv_unsol_event =
10376 lpfc_els_unsol_event;
10377 pring->prt[2].profile = 0; /* Mask 2 */
10378 /* NameServer Inquiry */
10379 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
10380 /* NameServer */
10381 pring->prt[2].type = FC_TYPE_CT;
10382 pring->prt[2].lpfc_sli_rcv_unsol_event =
10383 lpfc_ct_unsol_event;
10384 pring->prt[3].profile = 0; /* Mask 3 */
10385 /* NameServer response */
10386 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
10387 /* NameServer */
10388 pring->prt[3].type = FC_TYPE_CT;
10389 pring->prt[3].lpfc_sli_rcv_unsol_event =
10390 lpfc_ct_unsol_event;
10391 return 0;
10392}
10393
10394/**
10395 * lpfc_sli_setup - SLI ring setup function
10396 * @phba: Pointer to HBA context object.
10397 *
10398 * lpfc_sli_setup sets up rings of the SLI interface with
10399 * number of iocbs per ring and iotags. This function is
10400 * called while driver attach to the HBA and before the
10401 * interrupts are enabled. So there is no need for locking.
10402 *
10403 * This function always returns 0. SLI3 only.
10404 **/
10405int
dea3101e
JB
10406lpfc_sli_setup(struct lpfc_hba *phba)
10407{
ed957684 10408 int i, totiocbsize = 0;
dea3101e
JB
10409 struct lpfc_sli *psli = &phba->sli;
10410 struct lpfc_sli_ring *pring;
10411
2a76a283 10412 psli->num_rings = MAX_SLI3_CONFIGURED_RINGS;
dea3101e 10413 psli->sli_flag = 0;
dea3101e 10414
604a3e30
JB
10415 psli->iocbq_lookup = NULL;
10416 psli->iocbq_lookup_len = 0;
10417 psli->last_iotag = 0;
10418
dea3101e 10419 for (i = 0; i < psli->num_rings; i++) {
895427bd 10420 pring = &psli->sli3_ring[i];
dea3101e
JB
10421 switch (i) {
10422 case LPFC_FCP_RING: /* ring 0 - FCP */
10423 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10424 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
10425 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
10426 pring->sli.sli3.numCiocb +=
10427 SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10428 pring->sli.sli3.numRiocb +=
10429 SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10430 pring->sli.sli3.numCiocb +=
10431 SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10432 pring->sli.sli3.numRiocb +=
10433 SLI2_IOCB_RSP_R3XTRA_ENTRIES;
10434 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10435 SLI3_IOCB_CMD_SIZE :
10436 SLI2_IOCB_CMD_SIZE;
7e56aa25 10437 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10438 SLI3_IOCB_RSP_SIZE :
10439 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10440 pring->iotag_ctr = 0;
10441 pring->iotag_max =
92d7f7b0 10442 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB
10443 pring->fast_iotag = pring->iotag_max;
10444 pring->num_mask = 0;
10445 break;
a4bc3379 10446 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e 10447 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10448 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
10449 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
10450 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10451 SLI3_IOCB_CMD_SIZE :
10452 SLI2_IOCB_CMD_SIZE;
7e56aa25 10453 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10454 SLI3_IOCB_RSP_SIZE :
10455 SLI2_IOCB_RSP_SIZE;
2e0fef85 10456 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB
10457 pring->num_mask = 0;
10458 break;
10459 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
10460 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10461 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
10462 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
10463 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10464 SLI3_IOCB_CMD_SIZE :
10465 SLI2_IOCB_CMD_SIZE;
7e56aa25 10466 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10467 SLI3_IOCB_RSP_SIZE :
10468 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10469 pring->fast_iotag = 0;
10470 pring->iotag_ctr = 0;
10471 pring->iotag_max = 4096;
57127f15
JS
10472 pring->lpfc_sli_rcv_async_status =
10473 lpfc_sli_async_event_handler;
6669f9bb 10474 pring->num_mask = LPFC_MAX_RING_MASK;
dea3101e 10475 pring->prt[0].profile = 0; /* Mask 0 */
6a9c52cf
JS
10476 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10477 pring->prt[0].type = FC_TYPE_ELS;
dea3101e 10478 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 10479 lpfc_els_unsol_event;
dea3101e 10480 pring->prt[1].profile = 0; /* Mask 1 */
6a9c52cf
JS
10481 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10482 pring->prt[1].type = FC_TYPE_ELS;
dea3101e 10483 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 10484 lpfc_els_unsol_event;
dea3101e
JB
10485 pring->prt[2].profile = 0; /* Mask 2 */
10486 /* NameServer Inquiry */
6a9c52cf 10487 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
dea3101e 10488 /* NameServer */
6a9c52cf 10489 pring->prt[2].type = FC_TYPE_CT;
dea3101e 10490 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 10491 lpfc_ct_unsol_event;
dea3101e
JB
10492 pring->prt[3].profile = 0; /* Mask 3 */
10493 /* NameServer response */
6a9c52cf 10494 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
dea3101e 10495 /* NameServer */
6a9c52cf 10496 pring->prt[3].type = FC_TYPE_CT;
dea3101e 10497 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 10498 lpfc_ct_unsol_event;
dea3101e
JB
10499 break;
10500 }
7e56aa25
JS
10501 totiocbsize += (pring->sli.sli3.numCiocb *
10502 pring->sli.sli3.sizeCiocb) +
10503 (pring->sli.sli3.numRiocb * pring->sli.sli3.sizeRiocb);
dea3101e 10504 }
ed957684 10505 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 10506 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS
10507 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
10508 "SLI2 SLIM Data: x%x x%lx\n",
10509 phba->brd_no, totiocbsize,
10510 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 10511 }
cf5bf97e
JW
10512 if (phba->cfg_multi_ring_support == 2)
10513 lpfc_extra_ring_setup(phba);
dea3101e
JB
10514
10515 return 0;
10516}
10517
e59058c4 10518/**
895427bd 10519 * lpfc_sli4_queue_init - Queue initialization function
e59058c4
JS
10520 * @phba: Pointer to HBA context object.
10521 *
895427bd 10522 * lpfc_sli4_queue_init sets up mailbox queues and iocb queues for each
e59058c4
JS
10523 * ring. This function also initializes ring indices of each ring.
10524 * This function is called during the initialization of the SLI
10525 * interface of an HBA.
10526 * This function is called with no lock held and always returns
10527 * 1.
10528 **/
895427bd
JS
10529void
10530lpfc_sli4_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10531{
10532 struct lpfc_sli *psli;
10533 struct lpfc_sli_ring *pring;
604a3e30 10534 int i;
dea3101e
JB
10535
10536 psli = &phba->sli;
2e0fef85 10537 spin_lock_irq(&phba->hbalock);
dea3101e 10538 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10539 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e 10540 /* Initialize list headers for txq and txcmplq as double linked lists */
cdb42bec 10541 for (i = 0; i < phba->cfg_hdw_queue; i++) {
c00f62e6 10542 pring = phba->sli4_hba.hdwq[i].io_wq->pring;
895427bd
JS
10543 pring->flag = 0;
10544 pring->ringno = LPFC_FCP_RING;
c490850a 10545 pring->txcmplq_cnt = 0;
895427bd
JS
10546 INIT_LIST_HEAD(&pring->txq);
10547 INIT_LIST_HEAD(&pring->txcmplq);
10548 INIT_LIST_HEAD(&pring->iocb_continueq);
10549 spin_lock_init(&pring->ring_lock);
10550 }
10551 pring = phba->sli4_hba.els_wq->pring;
10552 pring->flag = 0;
10553 pring->ringno = LPFC_ELS_RING;
c490850a 10554 pring->txcmplq_cnt = 0;
895427bd
JS
10555 INIT_LIST_HEAD(&pring->txq);
10556 INIT_LIST_HEAD(&pring->txcmplq);
10557 INIT_LIST_HEAD(&pring->iocb_continueq);
10558 spin_lock_init(&pring->ring_lock);
dea3101e 10559
cdb42bec 10560 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
10561 pring = phba->sli4_hba.nvmels_wq->pring;
10562 pring->flag = 0;
10563 pring->ringno = LPFC_ELS_RING;
c490850a 10564 pring->txcmplq_cnt = 0;
895427bd
JS
10565 INIT_LIST_HEAD(&pring->txq);
10566 INIT_LIST_HEAD(&pring->txcmplq);
10567 INIT_LIST_HEAD(&pring->iocb_continueq);
10568 spin_lock_init(&pring->ring_lock);
10569 }
10570
10571 spin_unlock_irq(&phba->hbalock);
10572}
10573
10574/**
10575 * lpfc_sli_queue_init - Queue initialization function
10576 * @phba: Pointer to HBA context object.
10577 *
10578 * lpfc_sli_queue_init sets up mailbox queues and iocb queues for each
10579 * ring. This function also initializes ring indices of each ring.
10580 * This function is called during the initialization of the SLI
10581 * interface of an HBA.
10582 * This function is called with no lock held and always returns
10583 * 1.
10584 **/
10585void
10586lpfc_sli_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10587{
10588 struct lpfc_sli *psli;
10589 struct lpfc_sli_ring *pring;
604a3e30 10590 int i;
dea3101e
JB
10591
10592 psli = &phba->sli;
2e0fef85 10593 spin_lock_irq(&phba->hbalock);
dea3101e 10594 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10595 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB
10596 /* Initialize list headers for txq and txcmplq as double linked lists */
10597 for (i = 0; i < psli->num_rings; i++) {
895427bd 10598 pring = &psli->sli3_ring[i];
dea3101e 10599 pring->ringno = i;
7e56aa25
JS
10600 pring->sli.sli3.next_cmdidx = 0;
10601 pring->sli.sli3.local_getidx = 0;
10602 pring->sli.sli3.cmdidx = 0;
dea3101e 10603 INIT_LIST_HEAD(&pring->iocb_continueq);
9c2face6 10604 INIT_LIST_HEAD(&pring->iocb_continue_saveq);
dea3101e 10605 INIT_LIST_HEAD(&pring->postbufq);
895427bd
JS
10606 pring->flag = 0;
10607 INIT_LIST_HEAD(&pring->txq);
10608 INIT_LIST_HEAD(&pring->txcmplq);
7e56aa25 10609 spin_lock_init(&pring->ring_lock);
dea3101e 10610 }
2e0fef85 10611 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10612}
10613
04c68496
JS
10614/**
10615 * lpfc_sli_mbox_sys_flush - Flush mailbox command sub-system
10616 * @phba: Pointer to HBA context object.
10617 *
10618 * This routine flushes the mailbox command subsystem. It will unconditionally
10619 * flush all the mailbox commands in the three possible stages in the mailbox
10620 * command sub-system: pending mailbox command queue; the outstanding mailbox
10621 * command; and completed mailbox command queue. It is caller's responsibility
10622 * to make sure that the driver is in the proper state to flush the mailbox
10623 * command sub-system. Namely, the posting of mailbox commands into the
10624 * pending mailbox command queue from the various clients must be stopped;
10625 * either the HBA is in a state that it will never works on the outstanding
10626 * mailbox command (such as in EEH or ERATT conditions) or the outstanding
10627 * mailbox command has been completed.
10628 **/
10629static void
10630lpfc_sli_mbox_sys_flush(struct lpfc_hba *phba)
10631{
10632 LIST_HEAD(completions);
10633 struct lpfc_sli *psli = &phba->sli;
10634 LPFC_MBOXQ_t *pmb;
10635 unsigned long iflag;
10636
523128e5
JS
10637 /* Disable softirqs, including timers from obtaining phba->hbalock */
10638 local_bh_disable();
10639
04c68496
JS
10640 /* Flush all the mailbox commands in the mbox system */
10641 spin_lock_irqsave(&phba->hbalock, iflag);
523128e5 10642
04c68496
JS
10643 /* The pending mailbox command queue */
10644 list_splice_init(&phba->sli.mboxq, &completions);
10645 /* The outstanding active mailbox command */
10646 if (psli->mbox_active) {
10647 list_add_tail(&psli->mbox_active->list, &completions);
10648 psli->mbox_active = NULL;
10649 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10650 }
10651 /* The completed mailbox command queue */
10652 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
10653 spin_unlock_irqrestore(&phba->hbalock, iflag);
10654
523128e5
JS
10655 /* Enable softirqs again, done with phba->hbalock */
10656 local_bh_enable();
10657
04c68496
JS
10658 /* Return all flushed mailbox commands with MBX_NOT_FINISHED status */
10659 while (!list_empty(&completions)) {
10660 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
10661 pmb->u.mb.mbxStatus = MBX_NOT_FINISHED;
10662 if (pmb->mbox_cmpl)
10663 pmb->mbox_cmpl(phba, pmb);
10664 }
10665}
10666
e59058c4 10667/**
3621a710 10668 * lpfc_sli_host_down - Vport cleanup function
e59058c4
JS
10669 * @vport: Pointer to virtual port object.
10670 *
10671 * lpfc_sli_host_down is called to clean up the resources
10672 * associated with a vport before destroying virtual
10673 * port data structures.
10674 * This function does following operations:
10675 * - Free discovery resources associated with this virtual
10676 * port.
10677 * - Free iocbs associated with this virtual port in
10678 * the txq.
10679 * - Send abort for all iocb commands associated with this
10680 * vport in txcmplq.
10681 *
10682 * This function is called with no lock held and always returns 1.
10683 **/
92d7f7b0
JS
10684int
10685lpfc_sli_host_down(struct lpfc_vport *vport)
10686{
858c9f6c 10687 LIST_HEAD(completions);
92d7f7b0
JS
10688 struct lpfc_hba *phba = vport->phba;
10689 struct lpfc_sli *psli = &phba->sli;
895427bd 10690 struct lpfc_queue *qp = NULL;
92d7f7b0
JS
10691 struct lpfc_sli_ring *pring;
10692 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS
10693 int i;
10694 unsigned long flags = 0;
10695 uint16_t prev_pring_flag;
10696
10697 lpfc_cleanup_discovery_resources(vport);
10698
10699 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0 10700
895427bd
JS
10701 /*
10702 * Error everything on the txq since these iocbs
10703 * have not been given to the FW yet.
10704 * Also issue ABTS for everything on the txcmplq
10705 */
10706 if (phba->sli_rev != LPFC_SLI_REV4) {
10707 for (i = 0; i < psli->num_rings; i++) {
10708 pring = &psli->sli3_ring[i];
10709 prev_pring_flag = pring->flag;
10710 /* Only slow rings */
10711 if (pring->ringno == LPFC_ELS_RING) {
10712 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10713 /* Set the lpfc data pending flag */
10714 set_bit(LPFC_DATA_READY, &phba->data_flags);
10715 }
10716 list_for_each_entry_safe(iocb, next_iocb,
10717 &pring->txq, list) {
10718 if (iocb->vport != vport)
10719 continue;
10720 list_move_tail(&iocb->list, &completions);
10721 }
10722 list_for_each_entry_safe(iocb, next_iocb,
10723 &pring->txcmplq, list) {
10724 if (iocb->vport != vport)
10725 continue;
10726 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10727 }
10728 pring->flag = prev_pring_flag;
10729 }
10730 } else {
10731 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10732 pring = qp->pring;
10733 if (!pring)
92d7f7b0 10734 continue;
895427bd
JS
10735 if (pring == phba->sli4_hba.els_wq->pring) {
10736 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10737 /* Set the lpfc data pending flag */
10738 set_bit(LPFC_DATA_READY, &phba->data_flags);
10739 }
10740 prev_pring_flag = pring->flag;
65a3df63 10741 spin_lock(&pring->ring_lock);
895427bd
JS
10742 list_for_each_entry_safe(iocb, next_iocb,
10743 &pring->txq, list) {
10744 if (iocb->vport != vport)
10745 continue;
10746 list_move_tail(&iocb->list, &completions);
10747 }
65a3df63 10748 spin_unlock(&pring->ring_lock);
895427bd
JS
10749 list_for_each_entry_safe(iocb, next_iocb,
10750 &pring->txcmplq, list) {
10751 if (iocb->vport != vport)
10752 continue;
10753 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10754 }
10755 pring->flag = prev_pring_flag;
92d7f7b0 10756 }
92d7f7b0 10757 }
92d7f7b0
JS
10758 spin_unlock_irqrestore(&phba->hbalock, flags);
10759
a257bf90
JS
10760 /* Cancel all the IOCBs from the completions list */
10761 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10762 IOERR_SLI_DOWN);
92d7f7b0
JS
10763 return 1;
10764}
10765
e59058c4 10766/**
3621a710 10767 * lpfc_sli_hba_down - Resource cleanup function for the HBA
e59058c4
JS
10768 * @phba: Pointer to HBA context object.
10769 *
10770 * This function cleans up all iocb, buffers, mailbox commands
10771 * while shutting down the HBA. This function is called with no
10772 * lock held and always returns 1.
10773 * This function does the following to cleanup driver resources:
10774 * - Free discovery resources for each virtual port
10775 * - Cleanup any pending fabric iocbs
10776 * - Iterate through the iocb txq and free each entry
10777 * in the list.
10778 * - Free up any buffer posted to the HBA
10779 * - Free mailbox commands in the mailbox queue.
10780 **/
dea3101e 10781int
2e0fef85 10782lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 10783{
2534ba75 10784 LIST_HEAD(completions);
2e0fef85 10785 struct lpfc_sli *psli = &phba->sli;
895427bd 10786 struct lpfc_queue *qp = NULL;
dea3101e 10787 struct lpfc_sli_ring *pring;
0ff10d46 10788 struct lpfc_dmabuf *buf_ptr;
dea3101e 10789 unsigned long flags = 0;
04c68496
JS
10790 int i;
10791
10792 /* Shutdown the mailbox command sub-system */
618a5230 10793 lpfc_sli_mbox_sys_shutdown(phba, LPFC_MBX_WAIT);
dea3101e 10794
dea3101e
JB
10795 lpfc_hba_down_prep(phba);
10796
523128e5
JS
10797 /* Disable softirqs, including timers from obtaining phba->hbalock */
10798 local_bh_disable();
10799
92d7f7b0
JS
10800 lpfc_fabric_abort_hba(phba);
10801
2e0fef85 10802 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e 10803
895427bd
JS
10804 /*
10805 * Error everything on the txq since these iocbs
10806 * have not been given to the FW yet.
10807 */
10808 if (phba->sli_rev != LPFC_SLI_REV4) {
10809 for (i = 0; i < psli->num_rings; i++) {
10810 pring = &psli->sli3_ring[i];
10811 /* Only slow rings */
10812 if (pring->ringno == LPFC_ELS_RING) {
10813 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10814 /* Set the lpfc data pending flag */
10815 set_bit(LPFC_DATA_READY, &phba->data_flags);
10816 }
10817 list_splice_init(&pring->txq, &completions);
10818 }
10819 } else {
10820 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10821 pring = qp->pring;
10822 if (!pring)
10823 continue;
4b0a42be 10824 spin_lock(&pring->ring_lock);
895427bd 10825 list_splice_init(&pring->txq, &completions);
4b0a42be 10826 spin_unlock(&pring->ring_lock);
895427bd
JS
10827 if (pring == phba->sli4_hba.els_wq->pring) {
10828 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10829 /* Set the lpfc data pending flag */
10830 set_bit(LPFC_DATA_READY, &phba->data_flags);
10831 }
10832 }
2534ba75 10833 }
2e0fef85 10834 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 10835
a257bf90
JS
10836 /* Cancel all the IOCBs from the completions list */
10837 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10838 IOERR_SLI_DOWN);
dea3101e 10839
0ff10d46
JS
10840 spin_lock_irqsave(&phba->hbalock, flags);
10841 list_splice_init(&phba->elsbuf, &completions);
10842 phba->elsbuf_cnt = 0;
10843 phba->elsbuf_prev_cnt = 0;
10844 spin_unlock_irqrestore(&phba->hbalock, flags);
10845
10846 while (!list_empty(&completions)) {
10847 list_remove_head(&completions, buf_ptr,
10848 struct lpfc_dmabuf, list);
10849 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
10850 kfree(buf_ptr);
10851 }
10852
523128e5
JS
10853 /* Enable softirqs again, done with phba->hbalock */
10854 local_bh_enable();
10855
dea3101e
JB
10856 /* Return any active mbox cmds */
10857 del_timer_sync(&psli->mbox_tmo);
2e0fef85 10858
da0436e9 10859 spin_lock_irqsave(&phba->pport->work_port_lock, flags);
2e0fef85 10860 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
da0436e9 10861 spin_unlock_irqrestore(&phba->pport->work_port_lock, flags);
2e0fef85 10862
da0436e9
JS
10863 return 1;
10864}
10865
e59058c4 10866/**
3621a710 10867 * lpfc_sli_pcimem_bcopy - SLI memory copy function
e59058c4
JS
10868 * @srcp: Source memory pointer.
10869 * @destp: Destination memory pointer.
10870 * @cnt: Number of words required to be copied.
10871 *
10872 * This function is used for copying data between driver memory
10873 * and the SLI memory. This function also changes the endianness
10874 * of each word if native endianness is different from SLI
10875 * endianness. This function can be called with or without
10876 * lock.
10877 **/
dea3101e
JB
10878void
10879lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
10880{
10881 uint32_t *src = srcp;
10882 uint32_t *dest = destp;
10883 uint32_t ldata;
10884 int i;
10885
10886 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
10887 ldata = *src;
10888 ldata = le32_to_cpu(ldata);
10889 *dest = ldata;
10890 src++;
10891 dest++;
10892 }
10893}
10894
e59058c4 10895
a0c87cbd
JS
10896/**
10897 * lpfc_sli_bemem_bcopy - SLI memory copy function
10898 * @srcp: Source memory pointer.
10899 * @destp: Destination memory pointer.
10900 * @cnt: Number of words required to be copied.
10901 *
10902 * This function is used for copying data between a data structure
10903 * with big endian representation to local endianness.
10904 * This function can be called with or without lock.
10905 **/
10906void
10907lpfc_sli_bemem_bcopy(void *srcp, void *destp, uint32_t cnt)
10908{
10909 uint32_t *src = srcp;
10910 uint32_t *dest = destp;
10911 uint32_t ldata;
10912 int i;
10913
10914 for (i = 0; i < (int)cnt; i += sizeof(uint32_t)) {
10915 ldata = *src;
10916 ldata = be32_to_cpu(ldata);
10917 *dest = ldata;
10918 src++;
10919 dest++;
10920 }
10921}
10922
e59058c4 10923/**
3621a710 10924 * lpfc_sli_ringpostbuf_put - Function to add a buffer to postbufq
e59058c4
JS
10925 * @phba: Pointer to HBA context object.
10926 * @pring: Pointer to driver SLI ring object.
10927 * @mp: Pointer to driver buffer object.
10928 *
10929 * This function is called with no lock held.
10930 * It always return zero after adding the buffer to the postbufq
10931 * buffer list.
10932 **/
dea3101e 10933int
2e0fef85
JS
10934lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10935 struct lpfc_dmabuf *mp)
dea3101e
JB
10936{
10937 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
10938 later */
2e0fef85 10939 spin_lock_irq(&phba->hbalock);
dea3101e 10940 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 10941 pring->postbufq_cnt++;
2e0fef85 10942 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10943 return 0;
10944}
10945
e59058c4 10946/**
3621a710 10947 * lpfc_sli_get_buffer_tag - allocates a tag for a CMD_QUE_XRI64_CX buffer
e59058c4
JS
10948 * @phba: Pointer to HBA context object.
10949 *
10950 * When HBQ is enabled, buffers are searched based on tags. This function
10951 * allocates a tag for buffer posted using CMD_QUE_XRI64_CX iocb. The
10952 * tag is bit wise or-ed with QUE_BUFTAG_BIT to make sure that the tag
10953 * does not conflict with tags of buffer posted for unsolicited events.
10954 * The function returns the allocated tag. The function is called with
10955 * no locks held.
10956 **/
76bb24ef
JS
10957uint32_t
10958lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
10959{
10960 spin_lock_irq(&phba->hbalock);
10961 phba->buffer_tag_count++;
10962 /*
10963 * Always set the QUE_BUFTAG_BIT to distiguish between
10964 * a tag assigned by HBQ.
10965 */
10966 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
10967 spin_unlock_irq(&phba->hbalock);
10968 return phba->buffer_tag_count;
10969}
10970
e59058c4 10971/**
3621a710 10972 * lpfc_sli_ring_taggedbuf_get - find HBQ buffer associated with given tag
e59058c4
JS
10973 * @phba: Pointer to HBA context object.
10974 * @pring: Pointer to driver SLI ring object.
10975 * @tag: Buffer tag.
10976 *
10977 * Buffers posted using CMD_QUE_XRI64_CX iocb are in pring->postbufq
10978 * list. After HBA DMA data to these buffers, CMD_IOCB_RET_XRI64_CX
10979 * iocb is posted to the response ring with the tag of the buffer.
10980 * This function searches the pring->postbufq list using the tag
10981 * to find buffer associated with CMD_IOCB_RET_XRI64_CX
10982 * iocb. If the buffer is found then lpfc_dmabuf object of the
10983 * buffer is returned to the caller else NULL is returned.
10984 * This function is called with no lock held.
10985 **/
76bb24ef
JS
10986struct lpfc_dmabuf *
10987lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10988 uint32_t tag)
10989{
10990 struct lpfc_dmabuf *mp, *next_mp;
10991 struct list_head *slp = &pring->postbufq;
10992
25985edc 10993 /* Search postbufq, from the beginning, looking for a match on tag */
76bb24ef
JS
10994 spin_lock_irq(&phba->hbalock);
10995 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
10996 if (mp->buffer_tag == tag) {
10997 list_del_init(&mp->list);
10998 pring->postbufq_cnt--;
10999 spin_unlock_irq(&phba->hbalock);
11000 return mp;
11001 }
11002 }
11003
11004 spin_unlock_irq(&phba->hbalock);
11005 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 11006 "0402 Cannot find virtual addr for buffer tag on "
32350664 11007 "ring %d Data x%lx x%px x%px x%x\n",
76bb24ef
JS
11008 pring->ringno, (unsigned long) tag,
11009 slp->next, slp->prev, pring->postbufq_cnt);
11010
11011 return NULL;
11012}
dea3101e 11013
e59058c4 11014/**
3621a710 11015 * lpfc_sli_ringpostbuf_get - search buffers for unsolicited CT and ELS events
e59058c4
JS
11016 * @phba: Pointer to HBA context object.
11017 * @pring: Pointer to driver SLI ring object.
11018 * @phys: DMA address of the buffer.
11019 *
11020 * This function searches the buffer list using the dma_address
11021 * of unsolicited event to find the driver's lpfc_dmabuf object
11022 * corresponding to the dma_address. The function returns the
11023 * lpfc_dmabuf object if a buffer is found else it returns NULL.
11024 * This function is called by the ct and els unsolicited event
11025 * handlers to get the buffer associated with the unsolicited
11026 * event.
11027 *
11028 * This function is called with no lock held.
11029 **/
dea3101e
JB
11030struct lpfc_dmabuf *
11031lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11032 dma_addr_t phys)
11033{
11034 struct lpfc_dmabuf *mp, *next_mp;
11035 struct list_head *slp = &pring->postbufq;
11036
25985edc 11037 /* Search postbufq, from the beginning, looking for a match on phys */
2e0fef85 11038 spin_lock_irq(&phba->hbalock);
dea3101e
JB
11039 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
11040 if (mp->phys == phys) {
11041 list_del_init(&mp->list);
11042 pring->postbufq_cnt--;
2e0fef85 11043 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
11044 return mp;
11045 }
11046 }
11047
2e0fef85 11048 spin_unlock_irq(&phba->hbalock);
dea3101e 11049 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 11050 "0410 Cannot find virtual addr for mapped buf on "
32350664 11051 "ring %d Data x%llx x%px x%px x%x\n",
e8b62011 11052 pring->ringno, (unsigned long long)phys,
dea3101e
JB
11053 slp->next, slp->prev, pring->postbufq_cnt);
11054 return NULL;
11055}
11056
e59058c4 11057/**
3621a710 11058 * lpfc_sli_abort_els_cmpl - Completion handler for the els abort iocbs
e59058c4
JS
11059 * @phba: Pointer to HBA context object.
11060 * @cmdiocb: Pointer to driver command iocb object.
11061 * @rspiocb: Pointer to driver response iocb object.
11062 *
11063 * This function is the completion handler for the abort iocbs for
11064 * ELS commands. This function is called from the ELS ring event
11065 * handler with no lock held. This function frees memory resources
11066 * associated with the abort iocb.
11067 **/
dea3101e 11068static void
2e0fef85
JS
11069lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11070 struct lpfc_iocbq *rspiocb)
dea3101e 11071{
2e0fef85 11072 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 11073 uint16_t abort_iotag, abort_context;
ff78d8f9 11074 struct lpfc_iocbq *abort_iocb = NULL;
2680eeaa
JS
11075
11076 if (irsp->ulpStatus) {
ff78d8f9
JS
11077
11078 /*
11079 * Assume that the port already completed and returned, or
11080 * will return the iocb. Just Log the message.
11081 */
2680eeaa
JS
11082 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
11083 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
11084
2e0fef85 11085 spin_lock_irq(&phba->hbalock);
45ed1190 11086 if (phba->sli_rev < LPFC_SLI_REV4) {
faa832e9
JS
11087 if (irsp->ulpCommand == CMD_ABORT_XRI_CX &&
11088 irsp->ulpStatus == IOSTAT_LOCAL_REJECT &&
11089 irsp->un.ulpWord[4] == IOERR_ABORT_REQUESTED) {
11090 spin_unlock_irq(&phba->hbalock);
11091 goto release_iocb;
11092 }
45ed1190
JS
11093 if (abort_iotag != 0 &&
11094 abort_iotag <= phba->sli.last_iotag)
11095 abort_iocb =
11096 phba->sli.iocbq_lookup[abort_iotag];
11097 } else
11098 /* For sli4 the abort_tag is the XRI,
11099 * so the abort routine puts the iotag of the iocb
11100 * being aborted in the context field of the abort
11101 * IOCB.
11102 */
11103 abort_iocb = phba->sli.iocbq_lookup[abort_context];
2680eeaa 11104
2a9bf3d0 11105 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS | LOG_SLI,
32350664 11106 "0327 Cannot abort els iocb x%px "
2a9bf3d0
JS
11107 "with tag %x context %x, abort status %x, "
11108 "abort code %x\n",
11109 abort_iocb, abort_iotag, abort_context,
11110 irsp->ulpStatus, irsp->un.ulpWord[4]);
341af102 11111
ff78d8f9 11112 spin_unlock_irq(&phba->hbalock);
2680eeaa 11113 }
faa832e9 11114release_iocb:
604a3e30 11115 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB
11116 return;
11117}
11118
e59058c4 11119/**
3621a710 11120 * lpfc_ignore_els_cmpl - Completion handler for aborted ELS command
e59058c4
JS
11121 * @phba: Pointer to HBA context object.
11122 * @cmdiocb: Pointer to driver command iocb object.
11123 * @rspiocb: Pointer to driver response iocb object.
11124 *
11125 * The function is called from SLI ring event handler with no
11126 * lock held. This function is the completion handler for ELS commands
11127 * which are aborted. The function frees memory resources used for
11128 * the aborted ELS commands.
11129 **/
92d7f7b0
JS
11130static void
11131lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11132 struct lpfc_iocbq *rspiocb)
11133{
11134 IOCB_t *irsp = &rspiocb->iocb;
11135
11136 /* ELS cmd tag <ulpIoTag> completes */
11137 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
d7c255b2 11138 "0139 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 11139 "x%x x%x x%x\n",
e8b62011 11140 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 11141 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS
11142 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
11143 lpfc_ct_free_iocb(phba, cmdiocb);
11144 else
11145 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS
11146 return;
11147}
11148
e59058c4 11149/**
5af5eee7 11150 * lpfc_sli_abort_iotag_issue - Issue abort for a command iocb
e59058c4
JS
11151 * @phba: Pointer to HBA context object.
11152 * @pring: Pointer to driver SLI ring object.
11153 * @cmdiocb: Pointer to driver command iocb object.
11154 *
5af5eee7
JS
11155 * This function issues an abort iocb for the provided command iocb down to
11156 * the port. Other than the case the outstanding command iocb is an abort
11157 * request, this function issues abort out unconditionally. This function is
11158 * called with hbalock held. The function returns 0 when it fails due to
11159 * memory allocation failure or when the command iocb is an abort request.
e59058c4 11160 **/
5af5eee7
JS
11161static int
11162lpfc_sli_abort_iotag_issue(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 11163 struct lpfc_iocbq *cmdiocb)
dea3101e 11164{
2e0fef85 11165 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 11166 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB
11167 IOCB_t *icmd = NULL;
11168 IOCB_t *iabt = NULL;
5af5eee7 11169 int retval;
7e56aa25 11170 unsigned long iflags;
faa832e9 11171 struct lpfc_nodelist *ndlp;
07951076 11172
1c2ba475
JT
11173 lockdep_assert_held(&phba->hbalock);
11174
92d7f7b0
JS
11175 /*
11176 * There are certain command types we don't want to abort. And we
11177 * don't want to abort commands that are already in the process of
11178 * being aborted.
07951076
JS
11179 */
11180 icmd = &cmdiocb->iocb;
2e0fef85 11181 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS
11182 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11183 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS
11184 return 0;
11185
dea3101e 11186 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 11187 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
11188 if (abtsiocbp == NULL)
11189 return 0;
dea3101e 11190
07951076 11191 /* This signals the response to set the correct status
341af102 11192 * before calling the completion handler
07951076
JS
11193 */
11194 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
11195
dea3101e 11196 iabt = &abtsiocbp->iocb;
07951076
JS
11197 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
11198 iabt->un.acxri.abortContextTag = icmd->ulpContext;
45ed1190 11199 if (phba->sli_rev == LPFC_SLI_REV4) {
da0436e9 11200 iabt->un.acxri.abortIoTag = cmdiocb->sli4_xritag;
45ed1190 11201 iabt->un.acxri.abortContextTag = cmdiocb->iotag;
faa832e9 11202 } else {
da0436e9 11203 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
faa832e9
JS
11204 if (pring->ringno == LPFC_ELS_RING) {
11205 ndlp = (struct lpfc_nodelist *)(cmdiocb->context1);
11206 iabt->un.acxri.abortContextTag = ndlp->nlp_rpi;
11207 }
11208 }
07951076
JS
11209 iabt->ulpLe = 1;
11210 iabt->ulpClass = icmd->ulpClass;
dea3101e 11211
5ffc266e 11212 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11213 abtsiocbp->hba_wqidx = cmdiocb->hba_wqidx;
341af102
JS
11214 if (cmdiocb->iocb_flag & LPFC_IO_FCP)
11215 abtsiocbp->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11216 if (cmdiocb->iocb_flag & LPFC_IO_FOF)
11217 abtsiocbp->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11218
2e0fef85 11219 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS
11220 iabt->ulpCommand = CMD_ABORT_XRI_CN;
11221 else
11222 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 11223
07951076 11224 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
e6c6acc0 11225 abtsiocbp->vport = vport;
5b8bd0c9 11226
e8b62011
JS
11227 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
11228 "0339 Abort xri x%x, original iotag x%x, "
11229 "abort cmd iotag x%x\n",
2a9bf3d0 11230 iabt->un.acxri.abortIoTag,
e8b62011 11231 iabt->un.acxri.abortContextTag,
2a9bf3d0 11232 abtsiocbp->iotag);
7e56aa25
JS
11233
11234 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
11235 pring = lpfc_sli4_calc_ring(phba, abtsiocbp);
11236 if (unlikely(pring == NULL))
9bd2bff5 11237 return 0;
7e56aa25
JS
11238 /* Note: both hbalock and ring_lock need to be set here */
11239 spin_lock_irqsave(&pring->ring_lock, iflags);
11240 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11241 abtsiocbp, 0);
11242 spin_unlock_irqrestore(&pring->ring_lock, iflags);
11243 } else {
11244 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11245 abtsiocbp, 0);
11246 }
dea3101e 11247
d7c255b2
JS
11248 if (retval)
11249 __lpfc_sli_release_iocbq(phba, abtsiocbp);
5af5eee7
JS
11250
11251 /*
11252 * Caller to this routine should check for IOCB_ERROR
11253 * and handle it properly. This routine no longer removes
11254 * iocb off txcmplq and call compl in case of IOCB_ERROR.
11255 */
11256 return retval;
11257}
11258
11259/**
11260 * lpfc_sli_issue_abort_iotag - Abort function for a command iocb
11261 * @phba: Pointer to HBA context object.
11262 * @pring: Pointer to driver SLI ring object.
11263 * @cmdiocb: Pointer to driver command iocb object.
11264 *
11265 * This function issues an abort iocb for the provided command iocb. In case
11266 * of unloading, the abort iocb will not be issued to commands on the ELS
11267 * ring. Instead, the callback function shall be changed to those commands
11268 * so that nothing happens when them finishes. This function is called with
11269 * hbalock held. The function returns 0 when the command iocb is an abort
11270 * request.
11271 **/
11272int
11273lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11274 struct lpfc_iocbq *cmdiocb)
11275{
11276 struct lpfc_vport *vport = cmdiocb->vport;
11277 int retval = IOCB_ERROR;
11278 IOCB_t *icmd = NULL;
11279
1c2ba475
JT
11280 lockdep_assert_held(&phba->hbalock);
11281
5af5eee7
JS
11282 /*
11283 * There are certain command types we don't want to abort. And we
11284 * don't want to abort commands that are already in the process of
11285 * being aborted.
11286 */
11287 icmd = &cmdiocb->iocb;
11288 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
11289 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11290 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
11291 return 0;
11292
1234a6d5
DK
11293 if (!pring) {
11294 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11295 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11296 else
11297 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11298 goto abort_iotag_exit;
11299 }
11300
5af5eee7
JS
11301 /*
11302 * If we're unloading, don't abort iocb on the ELS ring, but change
11303 * the callback so that nothing happens when it finishes.
11304 */
11305 if ((vport->load_flag & FC_UNLOADING) &&
11306 (pring->ringno == LPFC_ELS_RING)) {
11307 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11308 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11309 else
11310 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11311 goto abort_iotag_exit;
11312 }
11313
11314 /* Now, we try to issue the abort to the cmdiocb out */
11315 retval = lpfc_sli_abort_iotag_issue(phba, pring, cmdiocb);
11316
07951076 11317abort_iotag_exit:
2e0fef85
JS
11318 /*
11319 * Caller to this routine should check for IOCB_ERROR
11320 * and handle it properly. This routine no longer removes
11321 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 11322 */
2e0fef85 11323 return retval;
dea3101e
JB
11324}
11325
5af5eee7
JS
11326/**
11327 * lpfc_sli_hba_iocb_abort - Abort all iocbs to an hba.
11328 * @phba: pointer to lpfc HBA data structure.
11329 *
11330 * This routine will abort all pending and outstanding iocbs to an HBA.
11331 **/
11332void
11333lpfc_sli_hba_iocb_abort(struct lpfc_hba *phba)
11334{
11335 struct lpfc_sli *psli = &phba->sli;
11336 struct lpfc_sli_ring *pring;
895427bd 11337 struct lpfc_queue *qp = NULL;
5af5eee7
JS
11338 int i;
11339
895427bd
JS
11340 if (phba->sli_rev != LPFC_SLI_REV4) {
11341 for (i = 0; i < psli->num_rings; i++) {
11342 pring = &psli->sli3_ring[i];
11343 lpfc_sli_abort_iocb_ring(phba, pring);
11344 }
11345 return;
11346 }
11347 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
11348 pring = qp->pring;
11349 if (!pring)
11350 continue;
db55fba8 11351 lpfc_sli_abort_iocb_ring(phba, pring);
5af5eee7
JS
11352 }
11353}
11354
e59058c4 11355/**
3621a710 11356 * lpfc_sli_validate_fcp_iocb - find commands associated with a vport or LUN
e59058c4
JS
11357 * @iocbq: Pointer to driver iocb object.
11358 * @vport: Pointer to driver virtual port object.
11359 * @tgt_id: SCSI ID of the target.
11360 * @lun_id: LUN ID of the scsi device.
11361 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST
11362 *
3621a710 11363 * This function acts as an iocb filter for functions which abort or count
e59058c4
JS
11364 * all FCP iocbs pending on a lun/SCSI target/SCSI host. It will return
11365 * 0 if the filtering criteria is met for the given iocb and will return
11366 * 1 if the filtering criteria is not met.
11367 * If ctx_cmd == LPFC_CTX_LUN, the function returns 0 only if the
11368 * given iocb is for the SCSI device specified by vport, tgt_id and
11369 * lun_id parameter.
11370 * If ctx_cmd == LPFC_CTX_TGT, the function returns 0 only if the
11371 * given iocb is for the SCSI target specified by vport and tgt_id
11372 * parameters.
11373 * If ctx_cmd == LPFC_CTX_HOST, the function returns 0 only if the
11374 * given iocb is for the SCSI host associated with the given vport.
11375 * This function is called with no locks held.
11376 **/
dea3101e 11377static int
51ef4c26
JS
11378lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
11379 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 11380 lpfc_ctx_cmd ctx_cmd)
dea3101e 11381{
c490850a 11382 struct lpfc_io_buf *lpfc_cmd;
dea3101e
JB
11383 int rc = 1;
11384
b0e83012 11385 if (iocbq->vport != vport)
0bd4ca25
JSEC
11386 return rc;
11387
b0e83012
JS
11388 if (!(iocbq->iocb_flag & LPFC_IO_FCP) ||
11389 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ))
51ef4c26
JS
11390 return rc;
11391
c490850a 11392 lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq);
0bd4ca25 11393
495a714c 11394 if (lpfc_cmd->pCmd == NULL)
dea3101e
JB
11395 return rc;
11396
11397 switch (ctx_cmd) {
11398 case LPFC_CTX_LUN:
b0e83012 11399 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c
JS
11400 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id) &&
11401 (scsilun_to_int(&lpfc_cmd->fcp_cmnd->fcp_lun) == lun_id))
dea3101e
JB
11402 rc = 0;
11403 break;
11404 case LPFC_CTX_TGT:
b0e83012 11405 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c 11406 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id))
dea3101e
JB
11407 rc = 0;
11408 break;
dea3101e
JB
11409 case LPFC_CTX_HOST:
11410 rc = 0;
11411 break;
11412 default:
11413 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
cadbd4a5 11414 __func__, ctx_cmd);
dea3101e
JB
11415 break;
11416 }
11417
11418 return rc;
11419}
11420
e59058c4 11421/**
3621a710 11422 * lpfc_sli_sum_iocb - Function to count the number of FCP iocbs pending
e59058c4
JS
11423 * @vport: Pointer to virtual port.
11424 * @tgt_id: SCSI ID of the target.
11425 * @lun_id: LUN ID of the scsi device.
11426 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11427 *
11428 * This function returns number of FCP commands pending for the vport.
11429 * When ctx_cmd == LPFC_CTX_LUN, the function returns number of FCP
11430 * commands pending on the vport associated with SCSI device specified
11431 * by tgt_id and lun_id parameters.
11432 * When ctx_cmd == LPFC_CTX_TGT, the function returns number of FCP
11433 * commands pending on the vport associated with SCSI target specified
11434 * by tgt_id parameter.
11435 * When ctx_cmd == LPFC_CTX_HOST, the function returns number of FCP
11436 * commands pending on the vport.
11437 * This function returns the number of iocbs which satisfy the filter.
11438 * This function is called without any lock held.
11439 **/
dea3101e 11440int
51ef4c26
JS
11441lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
11442 lpfc_ctx_cmd ctx_cmd)
dea3101e 11443{
51ef4c26 11444 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11445 struct lpfc_iocbq *iocbq;
11446 int sum, i;
dea3101e 11447
31979008 11448 spin_lock_irq(&phba->hbalock);
0bd4ca25
JSEC
11449 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
11450 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11451
51ef4c26
JS
11452 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
11453 ctx_cmd) == 0)
0bd4ca25 11454 sum++;
dea3101e 11455 }
31979008 11456 spin_unlock_irq(&phba->hbalock);
0bd4ca25 11457
dea3101e
JB
11458 return sum;
11459}
11460
e59058c4 11461/**
3621a710 11462 * lpfc_sli_abort_fcp_cmpl - Completion handler function for aborted FCP IOCBs
e59058c4
JS
11463 * @phba: Pointer to HBA context object
11464 * @cmdiocb: Pointer to command iocb object.
11465 * @rspiocb: Pointer to response iocb object.
11466 *
11467 * This function is called when an aborted FCP iocb completes. This
11468 * function is called by the ring event handler with no lock held.
11469 * This function frees the iocb.
11470 **/
5eb95af0 11471void
2e0fef85
JS
11472lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11473 struct lpfc_iocbq *rspiocb)
5eb95af0 11474{
cb69f7de 11475 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8e668af5 11476 "3096 ABORT_XRI_CN completing on rpi x%x "
cb69f7de
JS
11477 "original iotag x%x, abort cmd iotag x%x "
11478 "status 0x%x, reason 0x%x\n",
11479 cmdiocb->iocb.un.acxri.abortContextTag,
11480 cmdiocb->iocb.un.acxri.abortIoTag,
11481 cmdiocb->iotag, rspiocb->iocb.ulpStatus,
11482 rspiocb->iocb.un.ulpWord[4]);
604a3e30 11483 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC
11484 return;
11485}
11486
e59058c4 11487/**
3621a710 11488 * lpfc_sli_abort_iocb - issue abort for all commands on a host/target/LUN
e59058c4
JS
11489 * @vport: Pointer to virtual port.
11490 * @pring: Pointer to driver SLI ring object.
11491 * @tgt_id: SCSI ID of the target.
11492 * @lun_id: LUN ID of the scsi device.
11493 * @abort_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11494 *
11495 * This function sends an abort command for every SCSI command
11496 * associated with the given virtual port pending on the ring
11497 * filtered by lpfc_sli_validate_fcp_iocb function.
11498 * When abort_cmd == LPFC_CTX_LUN, the function sends abort only to the
11499 * FCP iocbs associated with lun specified by tgt_id and lun_id
11500 * parameters
11501 * When abort_cmd == LPFC_CTX_TGT, the function sends abort only to the
11502 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11503 * When abort_cmd == LPFC_CTX_HOST, the function sends abort to all
11504 * FCP iocbs associated with virtual port.
11505 * This function returns number of iocbs it failed to abort.
11506 * This function is called with no locks held.
11507 **/
dea3101e 11508int
51ef4c26
JS
11509lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11510 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 11511{
51ef4c26 11512 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11513 struct lpfc_iocbq *iocbq;
11514 struct lpfc_iocbq *abtsiocb;
ecbb227e 11515 struct lpfc_sli_ring *pring_s4;
dea3101e 11516 IOCB_t *cmd = NULL;
dea3101e 11517 int errcnt = 0, ret_val = 0;
0bd4ca25 11518 int i;
dea3101e 11519
b0e83012 11520 /* all I/Os are in process of being flushed */
c00f62e6 11521 if (phba->hba_flag & HBA_IOQ_FLUSH)
b0e83012
JS
11522 return errcnt;
11523
0bd4ca25
JSEC
11524 for (i = 1; i <= phba->sli.last_iotag; i++) {
11525 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11526
51ef4c26 11527 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 11528 abort_cmd) != 0)
dea3101e
JB
11529 continue;
11530
afbd8d88
JS
11531 /*
11532 * If the iocbq is already being aborted, don't take a second
11533 * action, but do count it.
11534 */
11535 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11536 continue;
11537
dea3101e 11538 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 11539 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
11540 if (abtsiocb == NULL) {
11541 errcnt++;
11542 continue;
11543 }
dea3101e 11544
afbd8d88
JS
11545 /* indicate the IO is being aborted by the driver. */
11546 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11547
0bd4ca25 11548 cmd = &iocbq->iocb;
dea3101e
JB
11549 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11550 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
da0436e9
JS
11551 if (phba->sli_rev == LPFC_SLI_REV4)
11552 abtsiocb->iocb.un.acxri.abortIoTag = iocbq->sli4_xritag;
11553 else
11554 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
dea3101e
JB
11555 abtsiocb->iocb.ulpLe = 1;
11556 abtsiocb->iocb.ulpClass = cmd->ulpClass;
afbd8d88 11557 abtsiocb->vport = vport;
dea3101e 11558
5ffc266e 11559 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11560 abtsiocb->hba_wqidx = iocbq->hba_wqidx;
341af102
JS
11561 if (iocbq->iocb_flag & LPFC_IO_FCP)
11562 abtsiocb->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11563 if (iocbq->iocb_flag & LPFC_IO_FOF)
11564 abtsiocb->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11565
2e0fef85 11566 if (lpfc_is_link_up(phba))
dea3101e
JB
11567 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11568 else
11569 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11570
5eb95af0
JSEC
11571 /* Setup callback routine and issue the command. */
11572 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
ecbb227e
JS
11573 if (phba->sli_rev == LPFC_SLI_REV4) {
11574 pring_s4 = lpfc_sli4_calc_ring(phba, iocbq);
11575 if (!pring_s4)
11576 continue;
11577 ret_val = lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11578 abtsiocb, 0);
11579 } else
11580 ret_val = lpfc_sli_issue_iocb(phba, pring->ringno,
11581 abtsiocb, 0);
dea3101e 11582 if (ret_val == IOCB_ERROR) {
604a3e30 11583 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB
11584 errcnt++;
11585 continue;
11586 }
11587 }
11588
11589 return errcnt;
11590}
11591
98912dda
JS
11592/**
11593 * lpfc_sli_abort_taskmgmt - issue abort for all commands on a host/target/LUN
11594 * @vport: Pointer to virtual port.
11595 * @pring: Pointer to driver SLI ring object.
11596 * @tgt_id: SCSI ID of the target.
11597 * @lun_id: LUN ID of the scsi device.
11598 * @taskmgmt_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11599 *
11600 * This function sends an abort command for every SCSI command
11601 * associated with the given virtual port pending on the ring
11602 * filtered by lpfc_sli_validate_fcp_iocb function.
11603 * When taskmgmt_cmd == LPFC_CTX_LUN, the function sends abort only to the
11604 * FCP iocbs associated with lun specified by tgt_id and lun_id
11605 * parameters
11606 * When taskmgmt_cmd == LPFC_CTX_TGT, the function sends abort only to the
11607 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11608 * When taskmgmt_cmd == LPFC_CTX_HOST, the function sends abort to all
11609 * FCP iocbs associated with virtual port.
11610 * This function returns number of iocbs it aborted .
11611 * This function is called with no locks held right after a taskmgmt
11612 * command is sent.
11613 **/
11614int
11615lpfc_sli_abort_taskmgmt(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11616 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd cmd)
11617{
11618 struct lpfc_hba *phba = vport->phba;
c490850a 11619 struct lpfc_io_buf *lpfc_cmd;
98912dda 11620 struct lpfc_iocbq *abtsiocbq;
8c50d25c 11621 struct lpfc_nodelist *ndlp;
98912dda
JS
11622 struct lpfc_iocbq *iocbq;
11623 IOCB_t *icmd;
11624 int sum, i, ret_val;
11625 unsigned long iflags;
c2017260 11626 struct lpfc_sli_ring *pring_s4 = NULL;
98912dda 11627
59c68eaa 11628 spin_lock_irqsave(&phba->hbalock, iflags);
98912dda
JS
11629
11630 /* all I/Os are in process of being flushed */
c00f62e6 11631 if (phba->hba_flag & HBA_IOQ_FLUSH) {
59c68eaa 11632 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11633 return 0;
11634 }
11635 sum = 0;
11636
11637 for (i = 1; i <= phba->sli.last_iotag; i++) {
11638 iocbq = phba->sli.iocbq_lookup[i];
11639
11640 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
11641 cmd) != 0)
11642 continue;
11643
c2017260
JS
11644 /* Guard against IO completion being called at same time */
11645 lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq);
11646 spin_lock(&lpfc_cmd->buf_lock);
11647
11648 if (!lpfc_cmd->pCmd) {
11649 spin_unlock(&lpfc_cmd->buf_lock);
11650 continue;
11651 }
11652
11653 if (phba->sli_rev == LPFC_SLI_REV4) {
11654 pring_s4 =
c00f62e6 11655 phba->sli4_hba.hdwq[iocbq->hba_wqidx].io_wq->pring;
c2017260
JS
11656 if (!pring_s4) {
11657 spin_unlock(&lpfc_cmd->buf_lock);
11658 continue;
11659 }
11660 /* Note: both hbalock and ring_lock must be set here */
11661 spin_lock(&pring_s4->ring_lock);
11662 }
11663
98912dda
JS
11664 /*
11665 * If the iocbq is already being aborted, don't take a second
11666 * action, but do count it.
11667 */
c2017260
JS
11668 if ((iocbq->iocb_flag & LPFC_DRIVER_ABORTED) ||
11669 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ)) {
11670 if (phba->sli_rev == LPFC_SLI_REV4)
11671 spin_unlock(&pring_s4->ring_lock);
11672 spin_unlock(&lpfc_cmd->buf_lock);
98912dda 11673 continue;
c2017260 11674 }
98912dda
JS
11675
11676 /* issue ABTS for this IOCB based on iotag */
11677 abtsiocbq = __lpfc_sli_get_iocbq(phba);
c2017260
JS
11678 if (!abtsiocbq) {
11679 if (phba->sli_rev == LPFC_SLI_REV4)
11680 spin_unlock(&pring_s4->ring_lock);
11681 spin_unlock(&lpfc_cmd->buf_lock);
98912dda 11682 continue;
c2017260 11683 }
98912dda
JS
11684
11685 icmd = &iocbq->iocb;
11686 abtsiocbq->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11687 abtsiocbq->iocb.un.acxri.abortContextTag = icmd->ulpContext;
11688 if (phba->sli_rev == LPFC_SLI_REV4)
11689 abtsiocbq->iocb.un.acxri.abortIoTag =
11690 iocbq->sli4_xritag;
11691 else
11692 abtsiocbq->iocb.un.acxri.abortIoTag = icmd->ulpIoTag;
11693 abtsiocbq->iocb.ulpLe = 1;
11694 abtsiocbq->iocb.ulpClass = icmd->ulpClass;
11695 abtsiocbq->vport = vport;
11696
11697 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11698 abtsiocbq->hba_wqidx = iocbq->hba_wqidx;
98912dda
JS
11699 if (iocbq->iocb_flag & LPFC_IO_FCP)
11700 abtsiocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11701 if (iocbq->iocb_flag & LPFC_IO_FOF)
11702 abtsiocbq->iocb_flag |= LPFC_IO_FOF;
98912dda 11703
8c50d25c
JS
11704 ndlp = lpfc_cmd->rdata->pnode;
11705
11706 if (lpfc_is_link_up(phba) &&
11707 (ndlp && ndlp->nlp_state == NLP_STE_MAPPED_NODE))
98912dda
JS
11708 abtsiocbq->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11709 else
11710 abtsiocbq->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11711
11712 /* Setup callback routine and issue the command. */
11713 abtsiocbq->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
11714
11715 /*
11716 * Indicate the IO is being aborted by the driver and set
11717 * the caller's flag into the aborted IO.
11718 */
11719 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11720
11721 if (phba->sli_rev == LPFC_SLI_REV4) {
98912dda
JS
11722 ret_val = __lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11723 abtsiocbq, 0);
59c68eaa 11724 spin_unlock(&pring_s4->ring_lock);
98912dda
JS
11725 } else {
11726 ret_val = __lpfc_sli_issue_iocb(phba, pring->ringno,
11727 abtsiocbq, 0);
11728 }
11729
c2017260 11730 spin_unlock(&lpfc_cmd->buf_lock);
98912dda
JS
11731
11732 if (ret_val == IOCB_ERROR)
11733 __lpfc_sli_release_iocbq(phba, abtsiocbq);
11734 else
11735 sum++;
11736 }
59c68eaa 11737 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11738 return sum;
11739}
11740
e59058c4 11741/**
3621a710 11742 * lpfc_sli_wake_iocb_wait - lpfc_sli_issue_iocb_wait's completion handler
e59058c4
JS
11743 * @phba: Pointer to HBA context object.
11744 * @cmdiocbq: Pointer to command iocb.
11745 * @rspiocbq: Pointer to response iocb.
11746 *
11747 * This function is the completion handler for iocbs issued using
11748 * lpfc_sli_issue_iocb_wait function. This function is called by the
11749 * ring event handler function without any lock held. This function
11750 * can be called from both worker thread context and interrupt
11751 * context. This function also can be called from other thread which
11752 * cleans up the SLI layer objects.
11753 * This function copy the contents of the response iocb to the
11754 * response iocb memory object provided by the caller of
11755 * lpfc_sli_issue_iocb_wait and then wakes up the thread which
11756 * sleeps for the iocb completion.
11757 **/
68876920
JSEC
11758static void
11759lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
11760 struct lpfc_iocbq *cmdiocbq,
11761 struct lpfc_iocbq *rspiocbq)
dea3101e 11762{
68876920
JSEC
11763 wait_queue_head_t *pdone_q;
11764 unsigned long iflags;
c490850a 11765 struct lpfc_io_buf *lpfc_cmd;
dea3101e 11766
2e0fef85 11767 spin_lock_irqsave(&phba->hbalock, iflags);
5a0916b4
JS
11768 if (cmdiocbq->iocb_flag & LPFC_IO_WAKE_TMO) {
11769
11770 /*
11771 * A time out has occurred for the iocb. If a time out
11772 * completion handler has been supplied, call it. Otherwise,
11773 * just free the iocbq.
11774 */
11775
11776 spin_unlock_irqrestore(&phba->hbalock, iflags);
11777 cmdiocbq->iocb_cmpl = cmdiocbq->wait_iocb_cmpl;
11778 cmdiocbq->wait_iocb_cmpl = NULL;
11779 if (cmdiocbq->iocb_cmpl)
11780 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, NULL);
11781 else
11782 lpfc_sli_release_iocbq(phba, cmdiocbq);
11783 return;
11784 }
11785
68876920
JSEC
11786 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
11787 if (cmdiocbq->context2 && rspiocbq)
11788 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
11789 &rspiocbq->iocb, sizeof(IOCB_t));
11790
0f65ff68
JS
11791 /* Set the exchange busy flag for task management commands */
11792 if ((cmdiocbq->iocb_flag & LPFC_IO_FCP) &&
11793 !(cmdiocbq->iocb_flag & LPFC_IO_LIBDFC)) {
c490850a 11794 lpfc_cmd = container_of(cmdiocbq, struct lpfc_io_buf,
0f65ff68 11795 cur_iocbq);
324e1c40
JS
11796 if (rspiocbq && (rspiocbq->iocb_flag & LPFC_EXCHANGE_BUSY))
11797 lpfc_cmd->flags |= LPFC_SBUF_XBUSY;
11798 else
11799 lpfc_cmd->flags &= ~LPFC_SBUF_XBUSY;
0f65ff68
JS
11800 }
11801
68876920 11802 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC
11803 if (pdone_q)
11804 wake_up(pdone_q);
858c9f6c 11805 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB
11806 return;
11807}
11808
d11e31dd
JS
11809/**
11810 * lpfc_chk_iocb_flg - Test IOCB flag with lock held.
11811 * @phba: Pointer to HBA context object..
11812 * @piocbq: Pointer to command iocb.
11813 * @flag: Flag to test.
11814 *
11815 * This routine grabs the hbalock and then test the iocb_flag to
11816 * see if the passed in flag is set.
11817 * Returns:
11818 * 1 if flag is set.
11819 * 0 if flag is not set.
11820 **/
11821static int
11822lpfc_chk_iocb_flg(struct lpfc_hba *phba,
11823 struct lpfc_iocbq *piocbq, uint32_t flag)
11824{
11825 unsigned long iflags;
11826 int ret;
11827
11828 spin_lock_irqsave(&phba->hbalock, iflags);
11829 ret = piocbq->iocb_flag & flag;
11830 spin_unlock_irqrestore(&phba->hbalock, iflags);
11831 return ret;
11832
11833}
11834
e59058c4 11835/**
3621a710 11836 * lpfc_sli_issue_iocb_wait - Synchronous function to issue iocb commands
e59058c4
JS
11837 * @phba: Pointer to HBA context object..
11838 * @pring: Pointer to sli ring.
11839 * @piocb: Pointer to command iocb.
11840 * @prspiocbq: Pointer to response iocb.
11841 * @timeout: Timeout in number of seconds.
11842 *
11843 * This function issues the iocb to firmware and waits for the
5a0916b4
JS
11844 * iocb to complete. The iocb_cmpl field of the shall be used
11845 * to handle iocbs which time out. If the field is NULL, the
11846 * function shall free the iocbq structure. If more clean up is
11847 * needed, the caller is expected to provide a completion function
11848 * that will provide the needed clean up. If the iocb command is
11849 * not completed within timeout seconds, the function will either
11850 * free the iocbq structure (if iocb_cmpl == NULL) or execute the
11851 * completion function set in the iocb_cmpl field and then return
11852 * a status of IOCB_TIMEDOUT. The caller should not free the iocb
11853 * resources if this function returns IOCB_TIMEDOUT.
e59058c4
JS
11854 * The function waits for the iocb completion using an
11855 * non-interruptible wait.
11856 * This function will sleep while waiting for iocb completion.
11857 * So, this function should not be called from any context which
11858 * does not allow sleeping. Due to the same reason, this function
11859 * cannot be called with interrupt disabled.
11860 * This function assumes that the iocb completions occur while
11861 * this function sleep. So, this function cannot be called from
11862 * the thread which process iocb completion for this ring.
11863 * This function clears the iocb_flag of the iocb object before
11864 * issuing the iocb and the iocb completion handler sets this
11865 * flag and wakes this thread when the iocb completes.
11866 * The contents of the response iocb will be copied to prspiocbq
11867 * by the completion handler when the command completes.
11868 * This function returns IOCB_SUCCESS when success.
11869 * This function is called with no lock held.
11870 **/
dea3101e 11871int
2e0fef85 11872lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
da0436e9 11873 uint32_t ring_number,
2e0fef85
JS
11874 struct lpfc_iocbq *piocb,
11875 struct lpfc_iocbq *prspiocbq,
68876920 11876 uint32_t timeout)
dea3101e 11877{
7259f0d0 11878 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC
11879 long timeleft, timeout_req = 0;
11880 int retval = IOCB_SUCCESS;
875fbdfe 11881 uint32_t creg_val;
0e9bb8d7
JS
11882 struct lpfc_iocbq *iocb;
11883 int txq_cnt = 0;
11884 int txcmplq_cnt = 0;
895427bd 11885 struct lpfc_sli_ring *pring;
5a0916b4
JS
11886 unsigned long iflags;
11887 bool iocb_completed = true;
11888
895427bd
JS
11889 if (phba->sli_rev >= LPFC_SLI_REV4)
11890 pring = lpfc_sli4_calc_ring(phba, piocb);
11891 else
11892 pring = &phba->sli.sli3_ring[ring_number];
dea3101e 11893 /*
68876920
JSEC
11894 * If the caller has provided a response iocbq buffer, then context2
11895 * is NULL or its an error.
dea3101e 11896 */
68876920
JSEC
11897 if (prspiocbq) {
11898 if (piocb->context2)
11899 return IOCB_ERROR;
11900 piocb->context2 = prspiocbq;
dea3101e
JB
11901 }
11902
5a0916b4 11903 piocb->wait_iocb_cmpl = piocb->iocb_cmpl;
68876920
JSEC
11904 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
11905 piocb->context_un.wait_queue = &done_q;
5a0916b4 11906 piocb->iocb_flag &= ~(LPFC_IO_WAKE | LPFC_IO_WAKE_TMO);
dea3101e 11907
875fbdfe 11908 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
11909 if (lpfc_readl(phba->HCregaddr, &creg_val))
11910 return IOCB_ERROR;
875fbdfe
JSEC
11911 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
11912 writel(creg_val, phba->HCregaddr);
11913 readl(phba->HCregaddr); /* flush */
11914 }
11915
2a9bf3d0
JS
11916 retval = lpfc_sli_issue_iocb(phba, ring_number, piocb,
11917 SLI_IOCB_RET_IOCB);
68876920 11918 if (retval == IOCB_SUCCESS) {
256ec0d0 11919 timeout_req = msecs_to_jiffies(timeout * 1000);
68876920 11920 timeleft = wait_event_timeout(done_q,
d11e31dd 11921 lpfc_chk_iocb_flg(phba, piocb, LPFC_IO_WAKE),
68876920 11922 timeout_req);
5a0916b4
JS
11923 spin_lock_irqsave(&phba->hbalock, iflags);
11924 if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
11925
11926 /*
11927 * IOCB timed out. Inform the wake iocb wait
11928 * completion function and set local status
11929 */
dea3101e 11930
5a0916b4
JS
11931 iocb_completed = false;
11932 piocb->iocb_flag |= LPFC_IO_WAKE_TMO;
11933 }
11934 spin_unlock_irqrestore(&phba->hbalock, iflags);
11935 if (iocb_completed) {
7054a606 11936 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 11937 "0331 IOCB wake signaled\n");
53151bbb
JS
11938 /* Note: we are not indicating if the IOCB has a success
11939 * status or not - that's for the caller to check.
11940 * IOCB_SUCCESS means just that the command was sent and
11941 * completed. Not that it completed successfully.
11942 * */
7054a606 11943 } else if (timeleft == 0) {
68876920 11944 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
11945 "0338 IOCB wait timeout error - no "
11946 "wake response Data x%x\n", timeout);
68876920 11947 retval = IOCB_TIMEDOUT;
7054a606 11948 } else {
68876920 11949 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
11950 "0330 IOCB wake NOT set, "
11951 "Data x%x x%lx\n",
68876920
JSEC
11952 timeout, (timeleft / jiffies));
11953 retval = IOCB_TIMEDOUT;
dea3101e 11954 }
2a9bf3d0 11955 } else if (retval == IOCB_BUSY) {
0e9bb8d7
JS
11956 if (phba->cfg_log_verbose & LOG_SLI) {
11957 list_for_each_entry(iocb, &pring->txq, list) {
11958 txq_cnt++;
11959 }
11960 list_for_each_entry(iocb, &pring->txcmplq, list) {
11961 txcmplq_cnt++;
11962 }
11963 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
11964 "2818 Max IOCBs %d txq cnt %d txcmplq cnt %d\n",
11965 phba->iocb_cnt, txq_cnt, txcmplq_cnt);
11966 }
2a9bf3d0 11967 return retval;
68876920
JSEC
11968 } else {
11969 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
d7c255b2 11970 "0332 IOCB wait issue failed, Data x%x\n",
e8b62011 11971 retval);
68876920 11972 retval = IOCB_ERROR;
dea3101e
JB
11973 }
11974
875fbdfe 11975 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
11976 if (lpfc_readl(phba->HCregaddr, &creg_val))
11977 return IOCB_ERROR;
875fbdfe
JSEC
11978 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
11979 writel(creg_val, phba->HCregaddr);
11980 readl(phba->HCregaddr); /* flush */
11981 }
11982
68876920
JSEC
11983 if (prspiocbq)
11984 piocb->context2 = NULL;
11985
11986 piocb->context_un.wait_queue = NULL;
11987 piocb->iocb_cmpl = NULL;
dea3101e
JB
11988 return retval;
11989}
68876920 11990
e59058c4 11991/**
3621a710 11992 * lpfc_sli_issue_mbox_wait - Synchronous function to issue mailbox
e59058c4
JS
11993 * @phba: Pointer to HBA context object.
11994 * @pmboxq: Pointer to driver mailbox object.
11995 * @timeout: Timeout in number of seconds.
11996 *
11997 * This function issues the mailbox to firmware and waits for the
11998 * mailbox command to complete. If the mailbox command is not
11999 * completed within timeout seconds, it returns MBX_TIMEOUT.
12000 * The function waits for the mailbox completion using an
12001 * interruptible wait. If the thread is woken up due to a
12002 * signal, MBX_TIMEOUT error is returned to the caller. Caller
12003 * should not free the mailbox resources, if this function returns
12004 * MBX_TIMEOUT.
12005 * This function will sleep while waiting for mailbox completion.
12006 * So, this function should not be called from any context which
12007 * does not allow sleeping. Due to the same reason, this function
12008 * cannot be called with interrupt disabled.
12009 * This function assumes that the mailbox completion occurs while
12010 * this function sleep. So, this function cannot be called from
12011 * the worker thread which processes mailbox completion.
12012 * This function is called in the context of HBA management
12013 * applications.
12014 * This function returns MBX_SUCCESS when successful.
12015 * This function is called with no lock held.
12016 **/
dea3101e 12017int
2e0fef85 12018lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB
12019 uint32_t timeout)
12020{
e29d74f8 12021 struct completion mbox_done;
dea3101e 12022 int retval;
858c9f6c 12023 unsigned long flag;
dea3101e 12024
495a714c 12025 pmboxq->mbox_flag &= ~LPFC_MBX_WAKE;
dea3101e
JB
12026 /* setup wake call as IOCB callback */
12027 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
dea3101e 12028
e29d74f8
JS
12029 /* setup context3 field to pass wait_queue pointer to wake function */
12030 init_completion(&mbox_done);
12031 pmboxq->context3 = &mbox_done;
dea3101e
JB
12032 /* now issue the command */
12033 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
dea3101e 12034 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
e29d74f8
JS
12035 wait_for_completion_timeout(&mbox_done,
12036 msecs_to_jiffies(timeout * 1000));
7054a606 12037
858c9f6c 12038 spin_lock_irqsave(&phba->hbalock, flag);
e29d74f8 12039 pmboxq->context3 = NULL;
7054a606
JS
12040 /*
12041 * if LPFC_MBX_WAKE flag is set the mailbox is completed
12042 * else do not free the resources.
12043 */
d7c47992 12044 if (pmboxq->mbox_flag & LPFC_MBX_WAKE) {
dea3101e 12045 retval = MBX_SUCCESS;
d7c47992 12046 } else {
7054a606 12047 retval = MBX_TIMEOUT;
858c9f6c
JS
12048 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
12049 }
12050 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e 12051 }
dea3101e
JB
12052 return retval;
12053}
12054
e59058c4 12055/**
3772a991 12056 * lpfc_sli_mbox_sys_shutdown - shutdown mailbox command sub-system
e59058c4
JS
12057 * @phba: Pointer to HBA context.
12058 *
3772a991
JS
12059 * This function is called to shutdown the driver's mailbox sub-system.
12060 * It first marks the mailbox sub-system is in a block state to prevent
12061 * the asynchronous mailbox command from issued off the pending mailbox
12062 * command queue. If the mailbox command sub-system shutdown is due to
12063 * HBA error conditions such as EEH or ERATT, this routine shall invoke
12064 * the mailbox sub-system flush routine to forcefully bring down the
12065 * mailbox sub-system. Otherwise, if it is due to normal condition (such
12066 * as with offline or HBA function reset), this routine will wait for the
12067 * outstanding mailbox command to complete before invoking the mailbox
12068 * sub-system flush routine to gracefully bring down mailbox sub-system.
e59058c4 12069 **/
3772a991 12070void
618a5230 12071lpfc_sli_mbox_sys_shutdown(struct lpfc_hba *phba, int mbx_action)
b4c02652 12072{
3772a991 12073 struct lpfc_sli *psli = &phba->sli;
3772a991 12074 unsigned long timeout;
b4c02652 12075
618a5230
JS
12076 if (mbx_action == LPFC_MBX_NO_WAIT) {
12077 /* delay 100ms for port state */
12078 msleep(100);
12079 lpfc_sli_mbox_sys_flush(phba);
12080 return;
12081 }
a183a15f 12082 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
d7069f09 12083
523128e5
JS
12084 /* Disable softirqs, including timers from obtaining phba->hbalock */
12085 local_bh_disable();
12086
3772a991
JS
12087 spin_lock_irq(&phba->hbalock);
12088 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
b4c02652 12089
3772a991 12090 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
3772a991
JS
12091 /* Determine how long we might wait for the active mailbox
12092 * command to be gracefully completed by firmware.
12093 */
a183a15f
JS
12094 if (phba->sli.mbox_active)
12095 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
12096 phba->sli.mbox_active) *
12097 1000) + jiffies;
12098 spin_unlock_irq(&phba->hbalock);
12099
523128e5
JS
12100 /* Enable softirqs again, done with phba->hbalock */
12101 local_bh_enable();
12102
3772a991
JS
12103 while (phba->sli.mbox_active) {
12104 /* Check active mailbox complete status every 2ms */
12105 msleep(2);
12106 if (time_after(jiffies, timeout))
12107 /* Timeout, let the mailbox flush routine to
12108 * forcefully release active mailbox command
12109 */
12110 break;
12111 }
523128e5 12112 } else {
d7069f09
JS
12113 spin_unlock_irq(&phba->hbalock);
12114
523128e5
JS
12115 /* Enable softirqs again, done with phba->hbalock */
12116 local_bh_enable();
12117 }
12118
3772a991
JS
12119 lpfc_sli_mbox_sys_flush(phba);
12120}
ed957684 12121
3772a991
JS
12122/**
12123 * lpfc_sli_eratt_read - read sli-3 error attention events
12124 * @phba: Pointer to HBA context.
12125 *
12126 * This function is called to read the SLI3 device error attention registers
12127 * for possible error attention events. The caller must hold the hostlock
12128 * with spin_lock_irq().
12129 *
25985edc 12130 * This function returns 1 when there is Error Attention in the Host Attention
3772a991
JS
12131 * Register and returns 0 otherwise.
12132 **/
12133static int
12134lpfc_sli_eratt_read(struct lpfc_hba *phba)
12135{
12136 uint32_t ha_copy;
b4c02652 12137
3772a991 12138 /* Read chip Host Attention (HA) register */
9940b97b
JS
12139 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12140 goto unplug_err;
12141
3772a991
JS
12142 if (ha_copy & HA_ERATT) {
12143 /* Read host status register to retrieve error event */
9940b97b
JS
12144 if (lpfc_sli_read_hs(phba))
12145 goto unplug_err;
b4c02652 12146
3772a991
JS
12147 /* Check if there is a deferred error condition is active */
12148 if ((HS_FFER1 & phba->work_hs) &&
12149 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0 12150 HS_FFER6 | HS_FFER7 | HS_FFER8) & phba->work_hs)) {
3772a991 12151 phba->hba_flag |= DEFER_ERATT;
3772a991
JS
12152 /* Clear all interrupt enable conditions */
12153 writel(0, phba->HCregaddr);
12154 readl(phba->HCregaddr);
12155 }
12156
12157 /* Set the driver HA work bitmap */
3772a991
JS
12158 phba->work_ha |= HA_ERATT;
12159 /* Indicate polling handles this ERATT */
12160 phba->hba_flag |= HBA_ERATT_HANDLED;
3772a991
JS
12161 return 1;
12162 }
12163 return 0;
9940b97b
JS
12164
12165unplug_err:
12166 /* Set the driver HS work bitmap */
12167 phba->work_hs |= UNPLUG_ERR;
12168 /* Set the driver HA work bitmap */
12169 phba->work_ha |= HA_ERATT;
12170 /* Indicate polling handles this ERATT */
12171 phba->hba_flag |= HBA_ERATT_HANDLED;
12172 return 1;
b4c02652
JS
12173}
12174
da0436e9
JS
12175/**
12176 * lpfc_sli4_eratt_read - read sli-4 error attention events
12177 * @phba: Pointer to HBA context.
12178 *
12179 * This function is called to read the SLI4 device error attention registers
12180 * for possible error attention events. The caller must hold the hostlock
12181 * with spin_lock_irq().
12182 *
25985edc 12183 * This function returns 1 when there is Error Attention in the Host Attention
da0436e9
JS
12184 * Register and returns 0 otherwise.
12185 **/
12186static int
12187lpfc_sli4_eratt_read(struct lpfc_hba *phba)
12188{
12189 uint32_t uerr_sta_hi, uerr_sta_lo;
2fcee4bf
JS
12190 uint32_t if_type, portsmphr;
12191 struct lpfc_register portstat_reg;
da0436e9 12192
2fcee4bf
JS
12193 /*
12194 * For now, use the SLI4 device internal unrecoverable error
da0436e9
JS
12195 * registers for error attention. This can be changed later.
12196 */
2fcee4bf
JS
12197 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12198 switch (if_type) {
12199 case LPFC_SLI_INTF_IF_TYPE_0:
9940b97b
JS
12200 if (lpfc_readl(phba->sli4_hba.u.if_type0.UERRLOregaddr,
12201 &uerr_sta_lo) ||
12202 lpfc_readl(phba->sli4_hba.u.if_type0.UERRHIregaddr,
12203 &uerr_sta_hi)) {
12204 phba->work_hs |= UNPLUG_ERR;
12205 phba->work_ha |= HA_ERATT;
12206 phba->hba_flag |= HBA_ERATT_HANDLED;
12207 return 1;
12208 }
2fcee4bf
JS
12209 if ((~phba->sli4_hba.ue_mask_lo & uerr_sta_lo) ||
12210 (~phba->sli4_hba.ue_mask_hi & uerr_sta_hi)) {
12211 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12212 "1423 HBA Unrecoverable error: "
12213 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, "
12214 "ue_mask_lo_reg=0x%x, "
12215 "ue_mask_hi_reg=0x%x\n",
12216 uerr_sta_lo, uerr_sta_hi,
12217 phba->sli4_hba.ue_mask_lo,
12218 phba->sli4_hba.ue_mask_hi);
12219 phba->work_status[0] = uerr_sta_lo;
12220 phba->work_status[1] = uerr_sta_hi;
12221 phba->work_ha |= HA_ERATT;
12222 phba->hba_flag |= HBA_ERATT_HANDLED;
12223 return 1;
12224 }
12225 break;
12226 case LPFC_SLI_INTF_IF_TYPE_2:
27d6ac0a 12227 case LPFC_SLI_INTF_IF_TYPE_6:
9940b97b
JS
12228 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
12229 &portstat_reg.word0) ||
12230 lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
12231 &portsmphr)){
12232 phba->work_hs |= UNPLUG_ERR;
12233 phba->work_ha |= HA_ERATT;
12234 phba->hba_flag |= HBA_ERATT_HANDLED;
12235 return 1;
12236 }
2fcee4bf
JS
12237 if (bf_get(lpfc_sliport_status_err, &portstat_reg)) {
12238 phba->work_status[0] =
12239 readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
12240 phba->work_status[1] =
12241 readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
12242 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2e90f4b5 12243 "2885 Port Status Event: "
2fcee4bf
JS
12244 "port status reg 0x%x, "
12245 "port smphr reg 0x%x, "
12246 "error 1=0x%x, error 2=0x%x\n",
12247 portstat_reg.word0,
12248 portsmphr,
12249 phba->work_status[0],
12250 phba->work_status[1]);
12251 phba->work_ha |= HA_ERATT;
12252 phba->hba_flag |= HBA_ERATT_HANDLED;
12253 return 1;
12254 }
12255 break;
12256 case LPFC_SLI_INTF_IF_TYPE_1:
12257 default:
a747c9ce 12258 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
12259 "2886 HBA Error Attention on unsupported "
12260 "if type %d.", if_type);
a747c9ce 12261 return 1;
da0436e9 12262 }
2fcee4bf 12263
da0436e9
JS
12264 return 0;
12265}
12266
e59058c4 12267/**
3621a710 12268 * lpfc_sli_check_eratt - check error attention events
9399627f
JS
12269 * @phba: Pointer to HBA context.
12270 *
3772a991 12271 * This function is called from timer soft interrupt context to check HBA's
9399627f
JS
12272 * error attention register bit for error attention events.
12273 *
25985edc 12274 * This function returns 1 when there is Error Attention in the Host Attention
9399627f
JS
12275 * Register and returns 0 otherwise.
12276 **/
12277int
12278lpfc_sli_check_eratt(struct lpfc_hba *phba)
12279{
12280 uint32_t ha_copy;
12281
12282 /* If somebody is waiting to handle an eratt, don't process it
12283 * here. The brdkill function will do this.
12284 */
12285 if (phba->link_flag & LS_IGNORE_ERATT)
12286 return 0;
12287
12288 /* Check if interrupt handler handles this ERATT */
12289 spin_lock_irq(&phba->hbalock);
12290 if (phba->hba_flag & HBA_ERATT_HANDLED) {
12291 /* Interrupt handler has handled ERATT */
12292 spin_unlock_irq(&phba->hbalock);
12293 return 0;
12294 }
12295
a257bf90
JS
12296 /*
12297 * If there is deferred error attention, do not check for error
12298 * attention
12299 */
12300 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
12301 spin_unlock_irq(&phba->hbalock);
12302 return 0;
12303 }
12304
3772a991
JS
12305 /* If PCI channel is offline, don't process it */
12306 if (unlikely(pci_channel_offline(phba->pcidev))) {
9399627f 12307 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12308 return 0;
12309 }
12310
12311 switch (phba->sli_rev) {
12312 case LPFC_SLI_REV2:
12313 case LPFC_SLI_REV3:
12314 /* Read chip Host Attention (HA) register */
12315 ha_copy = lpfc_sli_eratt_read(phba);
12316 break;
da0436e9 12317 case LPFC_SLI_REV4:
2fcee4bf 12318 /* Read device Uncoverable Error (UERR) registers */
da0436e9
JS
12319 ha_copy = lpfc_sli4_eratt_read(phba);
12320 break;
3772a991
JS
12321 default:
12322 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12323 "0299 Invalid SLI revision (%d)\n",
12324 phba->sli_rev);
12325 ha_copy = 0;
12326 break;
9399627f
JS
12327 }
12328 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12329
12330 return ha_copy;
12331}
12332
12333/**
12334 * lpfc_intr_state_check - Check device state for interrupt handling
12335 * @phba: Pointer to HBA context.
12336 *
12337 * This inline routine checks whether a device or its PCI slot is in a state
12338 * that the interrupt should be handled.
12339 *
12340 * This function returns 0 if the device or the PCI slot is in a state that
12341 * interrupt should be handled, otherwise -EIO.
12342 */
12343static inline int
12344lpfc_intr_state_check(struct lpfc_hba *phba)
12345{
12346 /* If the pci channel is offline, ignore all the interrupts */
12347 if (unlikely(pci_channel_offline(phba->pcidev)))
12348 return -EIO;
12349
12350 /* Update device level interrupt statistics */
12351 phba->sli.slistat.sli_intr++;
12352
12353 /* Ignore all interrupts during initialization. */
12354 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
12355 return -EIO;
12356
9399627f
JS
12357 return 0;
12358}
12359
12360/**
3772a991 12361 * lpfc_sli_sp_intr_handler - Slow-path interrupt handler to SLI-3 device
e59058c4
JS
12362 * @irq: Interrupt number.
12363 * @dev_id: The device context pointer.
12364 *
9399627f 12365 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12366 * service routine when device with SLI-3 interface spec is enabled with
12367 * MSI-X multi-message interrupt mode and there are slow-path events in
12368 * the HBA. However, when the device is enabled with either MSI or Pin-IRQ
12369 * interrupt mode, this function is called as part of the device-level
12370 * interrupt handler. When the PCI slot is in error recovery or the HBA
12371 * is undergoing initialization, the interrupt handler will not process
12372 * the interrupt. The link attention and ELS ring attention events are
12373 * handled by the worker thread. The interrupt handler signals the worker
12374 * thread and returns for these events. This function is called without
12375 * any lock held. It gets the hbalock to access and update SLI data
9399627f
JS
12376 * structures.
12377 *
12378 * This function returns IRQ_HANDLED when interrupt is handled else it
12379 * returns IRQ_NONE.
e59058c4 12380 **/
dea3101e 12381irqreturn_t
3772a991 12382lpfc_sli_sp_intr_handler(int irq, void *dev_id)
dea3101e 12383{
2e0fef85 12384 struct lpfc_hba *phba;
a747c9ce 12385 uint32_t ha_copy, hc_copy;
dea3101e
JB
12386 uint32_t work_ha_copy;
12387 unsigned long status;
5b75da2f 12388 unsigned long iflag;
dea3101e
JB
12389 uint32_t control;
12390
92d7f7b0 12391 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS
12392 struct lpfc_vport *vport;
12393 struct lpfc_nodelist *ndlp;
12394 struct lpfc_dmabuf *mp;
92d7f7b0
JS
12395 LPFC_MBOXQ_t *pmb;
12396 int rc;
12397
dea3101e
JB
12398 /*
12399 * Get the driver's phba structure from the dev_id and
12400 * assume the HBA is not interrupting.
12401 */
9399627f 12402 phba = (struct lpfc_hba *)dev_id;
dea3101e
JB
12403
12404 if (unlikely(!phba))
12405 return IRQ_NONE;
12406
dea3101e 12407 /*
9399627f
JS
12408 * Stuff needs to be attented to when this function is invoked as an
12409 * individual interrupt handler in MSI-X multi-message interrupt mode
dea3101e 12410 */
9399627f 12411 if (phba->intr_type == MSIX) {
3772a991
JS
12412 /* Check device state for handling interrupt */
12413 if (lpfc_intr_state_check(phba))
9399627f
JS
12414 return IRQ_NONE;
12415 /* Need to read HA REG for slow-path events */
5b75da2f 12416 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12417 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12418 goto unplug_error;
9399627f
JS
12419 /* If somebody is waiting to handle an eratt don't process it
12420 * here. The brdkill function will do this.
12421 */
12422 if (phba->link_flag & LS_IGNORE_ERATT)
12423 ha_copy &= ~HA_ERATT;
12424 /* Check the need for handling ERATT in interrupt handler */
12425 if (ha_copy & HA_ERATT) {
12426 if (phba->hba_flag & HBA_ERATT_HANDLED)
12427 /* ERATT polling has handled ERATT */
12428 ha_copy &= ~HA_ERATT;
12429 else
12430 /* Indicate interrupt handler handles ERATT */
12431 phba->hba_flag |= HBA_ERATT_HANDLED;
12432 }
a257bf90
JS
12433
12434 /*
12435 * If there is deferred error attention, do not check for any
12436 * interrupt.
12437 */
12438 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12439 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12440 return IRQ_NONE;
12441 }
12442
9399627f 12443 /* Clear up only attention source related to slow-path */
9940b97b
JS
12444 if (lpfc_readl(phba->HCregaddr, &hc_copy))
12445 goto unplug_error;
12446
a747c9ce
JS
12447 writel(hc_copy & ~(HC_MBINT_ENA | HC_R2INT_ENA |
12448 HC_LAINT_ENA | HC_ERINT_ENA),
12449 phba->HCregaddr);
9399627f
JS
12450 writel((ha_copy & (HA_MBATT | HA_R2_CLR_MSK)),
12451 phba->HAregaddr);
a747c9ce 12452 writel(hc_copy, phba->HCregaddr);
9399627f 12453 readl(phba->HAregaddr); /* flush */
5b75da2f 12454 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12455 } else
12456 ha_copy = phba->ha_copy;
dea3101e 12457
dea3101e
JB
12458 work_ha_copy = ha_copy & phba->work_ha_mask;
12459
9399627f 12460 if (work_ha_copy) {
dea3101e
JB
12461 if (work_ha_copy & HA_LATT) {
12462 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
12463 /*
12464 * Turn off Link Attention interrupts
12465 * until CLEAR_LA done
12466 */
5b75da2f 12467 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12468 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
9940b97b
JS
12469 if (lpfc_readl(phba->HCregaddr, &control))
12470 goto unplug_error;
dea3101e
JB
12471 control &= ~HC_LAINT_ENA;
12472 writel(control, phba->HCregaddr);
12473 readl(phba->HCregaddr); /* flush */
5b75da2f 12474 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12475 }
12476 else
12477 work_ha_copy &= ~HA_LATT;
12478 }
12479
9399627f 12480 if (work_ha_copy & ~(HA_ERATT | HA_MBATT | HA_LATT)) {
858c9f6c
JS
12481 /*
12482 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
12483 * the only slow ring.
12484 */
12485 status = (work_ha_copy &
12486 (HA_RXMASK << (4*LPFC_ELS_RING)));
12487 status >>= (4*LPFC_ELS_RING);
12488 if (status & HA_RXMASK) {
5b75da2f 12489 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12490 if (lpfc_readl(phba->HCregaddr, &control))
12491 goto unplug_error;
a58cbd52
JS
12492
12493 lpfc_debugfs_slow_ring_trc(phba,
12494 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
12495 control, status,
12496 (uint32_t)phba->sli.slistat.sli_intr);
12497
858c9f6c 12498 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS
12499 lpfc_debugfs_slow_ring_trc(phba,
12500 "ISR Disable ring:"
12501 "pwork:x%x hawork:x%x wait:x%x",
12502 phba->work_ha, work_ha_copy,
12503 (uint32_t)((unsigned long)
5e9d9b82 12504 &phba->work_waitq));
a58cbd52 12505
858c9f6c
JS
12506 control &=
12507 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB
12508 writel(control, phba->HCregaddr);
12509 readl(phba->HCregaddr); /* flush */
dea3101e 12510 }
a58cbd52
JS
12511 else {
12512 lpfc_debugfs_slow_ring_trc(phba,
12513 "ISR slow ring: pwork:"
12514 "x%x hawork:x%x wait:x%x",
12515 phba->work_ha, work_ha_copy,
12516 (uint32_t)((unsigned long)
5e9d9b82 12517 &phba->work_waitq));
a58cbd52 12518 }
5b75da2f 12519 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12520 }
12521 }
5b75da2f 12522 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90 12523 if (work_ha_copy & HA_ERATT) {
9940b97b
JS
12524 if (lpfc_sli_read_hs(phba))
12525 goto unplug_error;
a257bf90
JS
12526 /*
12527 * Check if there is a deferred error condition
12528 * is active
12529 */
12530 if ((HS_FFER1 & phba->work_hs) &&
12531 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0
JS
12532 HS_FFER6 | HS_FFER7 | HS_FFER8) &
12533 phba->work_hs)) {
a257bf90
JS
12534 phba->hba_flag |= DEFER_ERATT;
12535 /* Clear all interrupt enable conditions */
12536 writel(0, phba->HCregaddr);
12537 readl(phba->HCregaddr);
12538 }
12539 }
12540
9399627f 12541 if ((work_ha_copy & HA_MBATT) && (phba->sli.mbox_active)) {
92d7f7b0 12542 pmb = phba->sli.mbox_active;
04c68496 12543 pmbox = &pmb->u.mb;
34b02dcd 12544 mbox = phba->mbox;
858c9f6c 12545 vport = pmb->vport;
92d7f7b0
JS
12546
12547 /* First check out the status word */
12548 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
12549 if (pmbox->mbxOwner != OWN_HOST) {
5b75da2f 12550 spin_unlock_irqrestore(&phba->hbalock, iflag);
92d7f7b0
JS
12551 /*
12552 * Stray Mailbox Interrupt, mbxCommand <cmd>
12553 * mbxStatus <status>
12554 */
09372820 12555 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
92d7f7b0 12556 LOG_SLI,
e8b62011 12557 "(%d):0304 Stray Mailbox "
92d7f7b0
JS
12558 "Interrupt mbxCommand x%x "
12559 "mbxStatus x%x\n",
e8b62011 12560 (vport ? vport->vpi : 0),
92d7f7b0
JS
12561 pmbox->mbxCommand,
12562 pmbox->mbxStatus);
09372820
JS
12563 /* clear mailbox attention bit */
12564 work_ha_copy &= ~HA_MBATT;
12565 } else {
97eab634 12566 phba->sli.mbox_active = NULL;
5b75da2f 12567 spin_unlock_irqrestore(&phba->hbalock, iflag);
09372820
JS
12568 phba->last_completion_time = jiffies;
12569 del_timer(&phba->sli.mbox_tmo);
09372820
JS
12570 if (pmb->mbox_cmpl) {
12571 lpfc_sli_pcimem_bcopy(mbox, pmbox,
12572 MAILBOX_CMD_SIZE);
7a470277 12573 if (pmb->out_ext_byte_len &&
3e1f0718 12574 pmb->ctx_buf)
7a470277
JS
12575 lpfc_sli_pcimem_bcopy(
12576 phba->mbox_ext,
3e1f0718 12577 pmb->ctx_buf,
7a470277 12578 pmb->out_ext_byte_len);
09372820
JS
12579 }
12580 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
12581 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
12582
12583 lpfc_debugfs_disc_trc(vport,
12584 LPFC_DISC_TRC_MBOX_VPORT,
12585 "MBOX dflt rpi: : "
12586 "status:x%x rpi:x%x",
12587 (uint32_t)pmbox->mbxStatus,
12588 pmbox->un.varWords[0], 0);
12589
12590 if (!pmbox->mbxStatus) {
12591 mp = (struct lpfc_dmabuf *)
3e1f0718 12592 (pmb->ctx_buf);
09372820 12593 ndlp = (struct lpfc_nodelist *)
3e1f0718 12594 pmb->ctx_ndlp;
09372820
JS
12595
12596 /* Reg_LOGIN of dflt RPI was
12597 * successful. new lets get
12598 * rid of the RPI using the
12599 * same mbox buffer.
12600 */
12601 lpfc_unreg_login(phba,
12602 vport->vpi,
12603 pmbox->un.varWords[0],
12604 pmb);
12605 pmb->mbox_cmpl =
12606 lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
12607 pmb->ctx_buf = mp;
12608 pmb->ctx_ndlp = ndlp;
09372820 12609 pmb->vport = vport;
58da1ffb
JS
12610 rc = lpfc_sli_issue_mbox(phba,
12611 pmb,
12612 MBX_NOWAIT);
12613 if (rc != MBX_BUSY)
12614 lpfc_printf_log(phba,
12615 KERN_ERR,
12616 LOG_MBOX | LOG_SLI,
d7c255b2 12617 "0350 rc should have"
6a9c52cf 12618 "been MBX_BUSY\n");
3772a991
JS
12619 if (rc != MBX_NOT_FINISHED)
12620 goto send_current_mbox;
09372820 12621 }
858c9f6c 12622 }
5b75da2f
JS
12623 spin_lock_irqsave(
12624 &phba->pport->work_port_lock,
12625 iflag);
09372820
JS
12626 phba->pport->work_port_events &=
12627 ~WORKER_MBOX_TMO;
5b75da2f
JS
12628 spin_unlock_irqrestore(
12629 &phba->pport->work_port_lock,
12630 iflag);
09372820 12631 lpfc_mbox_cmpl_put(phba, pmb);
858c9f6c 12632 }
97eab634 12633 } else
5b75da2f 12634 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f 12635
92d7f7b0
JS
12636 if ((work_ha_copy & HA_MBATT) &&
12637 (phba->sli.mbox_active == NULL)) {
858c9f6c 12638send_current_mbox:
92d7f7b0 12639 /* Process next mailbox command if there is one */
58da1ffb
JS
12640 do {
12641 rc = lpfc_sli_issue_mbox(phba, NULL,
12642 MBX_NOWAIT);
12643 } while (rc == MBX_NOT_FINISHED);
12644 if (rc != MBX_SUCCESS)
12645 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
12646 LOG_SLI, "0349 rc should be "
6a9c52cf 12647 "MBX_SUCCESS\n");
92d7f7b0
JS
12648 }
12649
5b75da2f 12650 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12651 phba->work_ha |= work_ha_copy;
5b75da2f 12652 spin_unlock_irqrestore(&phba->hbalock, iflag);
5e9d9b82 12653 lpfc_worker_wake_up(phba);
dea3101e 12654 }
9399627f 12655 return IRQ_HANDLED;
9940b97b
JS
12656unplug_error:
12657 spin_unlock_irqrestore(&phba->hbalock, iflag);
12658 return IRQ_HANDLED;
dea3101e 12659
3772a991 12660} /* lpfc_sli_sp_intr_handler */
9399627f
JS
12661
12662/**
3772a991 12663 * lpfc_sli_fp_intr_handler - Fast-path interrupt handler to SLI-3 device.
9399627f
JS
12664 * @irq: Interrupt number.
12665 * @dev_id: The device context pointer.
12666 *
12667 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12668 * service routine when device with SLI-3 interface spec is enabled with
12669 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
12670 * ring event in the HBA. However, when the device is enabled with either
12671 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
12672 * device-level interrupt handler. When the PCI slot is in error recovery
12673 * or the HBA is undergoing initialization, the interrupt handler will not
12674 * process the interrupt. The SCSI FCP fast-path ring event are handled in
12675 * the intrrupt context. This function is called without any lock held.
12676 * It gets the hbalock to access and update SLI data structures.
9399627f
JS
12677 *
12678 * This function returns IRQ_HANDLED when interrupt is handled else it
12679 * returns IRQ_NONE.
12680 **/
12681irqreturn_t
3772a991 12682lpfc_sli_fp_intr_handler(int irq, void *dev_id)
9399627f
JS
12683{
12684 struct lpfc_hba *phba;
12685 uint32_t ha_copy;
12686 unsigned long status;
5b75da2f 12687 unsigned long iflag;
895427bd 12688 struct lpfc_sli_ring *pring;
9399627f
JS
12689
12690 /* Get the driver's phba structure from the dev_id and
12691 * assume the HBA is not interrupting.
12692 */
12693 phba = (struct lpfc_hba *) dev_id;
12694
12695 if (unlikely(!phba))
12696 return IRQ_NONE;
12697
12698 /*
12699 * Stuff needs to be attented to when this function is invoked as an
12700 * individual interrupt handler in MSI-X multi-message interrupt mode
12701 */
12702 if (phba->intr_type == MSIX) {
3772a991
JS
12703 /* Check device state for handling interrupt */
12704 if (lpfc_intr_state_check(phba))
9399627f
JS
12705 return IRQ_NONE;
12706 /* Need to read HA REG for FCP ring and other ring events */
9940b97b
JS
12707 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12708 return IRQ_HANDLED;
9399627f 12709 /* Clear up only attention source related to fast-path */
5b75da2f 12710 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90
JS
12711 /*
12712 * If there is deferred error attention, do not check for
12713 * any interrupt.
12714 */
12715 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12716 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12717 return IRQ_NONE;
12718 }
9399627f
JS
12719 writel((ha_copy & (HA_R0_CLR_MSK | HA_R1_CLR_MSK)),
12720 phba->HAregaddr);
12721 readl(phba->HAregaddr); /* flush */
5b75da2f 12722 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12723 } else
12724 ha_copy = phba->ha_copy;
dea3101e
JB
12725
12726 /*
9399627f 12727 * Process all events on FCP ring. Take the optimized path for FCP IO.
dea3101e 12728 */
9399627f
JS
12729 ha_copy &= ~(phba->work_ha_mask);
12730
12731 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
dea3101e 12732 status >>= (4*LPFC_FCP_RING);
895427bd 12733 pring = &phba->sli.sli3_ring[LPFC_FCP_RING];
858c9f6c 12734 if (status & HA_RXMASK)
895427bd 12735 lpfc_sli_handle_fast_ring_event(phba, pring, status);
a4bc3379
JS
12736
12737 if (phba->cfg_multi_ring_support == 2) {
12738 /*
9399627f
JS
12739 * Process all events on extra ring. Take the optimized path
12740 * for extra ring IO.
a4bc3379 12741 */
9399627f 12742 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
a4bc3379 12743 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 12744 if (status & HA_RXMASK) {
a4bc3379 12745 lpfc_sli_handle_fast_ring_event(phba,
895427bd 12746 &phba->sli.sli3_ring[LPFC_EXTRA_RING],
a4bc3379
JS
12747 status);
12748 }
12749 }
dea3101e 12750 return IRQ_HANDLED;
3772a991 12751} /* lpfc_sli_fp_intr_handler */
9399627f
JS
12752
12753/**
3772a991 12754 * lpfc_sli_intr_handler - Device-level interrupt handler to SLI-3 device
9399627f
JS
12755 * @irq: Interrupt number.
12756 * @dev_id: The device context pointer.
12757 *
3772a991
JS
12758 * This function is the HBA device-level interrupt handler to device with
12759 * SLI-3 interface spec, called from the PCI layer when either MSI or
12760 * Pin-IRQ interrupt mode is enabled and there is an event in the HBA which
12761 * requires driver attention. This function invokes the slow-path interrupt
12762 * attention handling function and fast-path interrupt attention handling
12763 * function in turn to process the relevant HBA attention events. This
12764 * function is called without any lock held. It gets the hbalock to access
12765 * and update SLI data structures.
9399627f
JS
12766 *
12767 * This function returns IRQ_HANDLED when interrupt is handled, else it
12768 * returns IRQ_NONE.
12769 **/
12770irqreturn_t
3772a991 12771lpfc_sli_intr_handler(int irq, void *dev_id)
9399627f
JS
12772{
12773 struct lpfc_hba *phba;
12774 irqreturn_t sp_irq_rc, fp_irq_rc;
12775 unsigned long status1, status2;
a747c9ce 12776 uint32_t hc_copy;
9399627f
JS
12777
12778 /*
12779 * Get the driver's phba structure from the dev_id and
12780 * assume the HBA is not interrupting.
12781 */
12782 phba = (struct lpfc_hba *) dev_id;
12783
12784 if (unlikely(!phba))
12785 return IRQ_NONE;
12786
3772a991
JS
12787 /* Check device state for handling interrupt */
12788 if (lpfc_intr_state_check(phba))
9399627f
JS
12789 return IRQ_NONE;
12790
12791 spin_lock(&phba->hbalock);
9940b97b
JS
12792 if (lpfc_readl(phba->HAregaddr, &phba->ha_copy)) {
12793 spin_unlock(&phba->hbalock);
12794 return IRQ_HANDLED;
12795 }
12796
9399627f
JS
12797 if (unlikely(!phba->ha_copy)) {
12798 spin_unlock(&phba->hbalock);
12799 return IRQ_NONE;
12800 } else if (phba->ha_copy & HA_ERATT) {
12801 if (phba->hba_flag & HBA_ERATT_HANDLED)
12802 /* ERATT polling has handled ERATT */
12803 phba->ha_copy &= ~HA_ERATT;
12804 else
12805 /* Indicate interrupt handler handles ERATT */
12806 phba->hba_flag |= HBA_ERATT_HANDLED;
12807 }
12808
a257bf90
JS
12809 /*
12810 * If there is deferred error attention, do not check for any interrupt.
12811 */
12812 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
ec21b3b0 12813 spin_unlock(&phba->hbalock);
a257bf90
JS
12814 return IRQ_NONE;
12815 }
12816
9399627f 12817 /* Clear attention sources except link and error attentions */
9940b97b
JS
12818 if (lpfc_readl(phba->HCregaddr, &hc_copy)) {
12819 spin_unlock(&phba->hbalock);
12820 return IRQ_HANDLED;
12821 }
a747c9ce
JS
12822 writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA
12823 | HC_R2INT_ENA | HC_LAINT_ENA | HC_ERINT_ENA),
12824 phba->HCregaddr);
9399627f 12825 writel((phba->ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
a747c9ce 12826 writel(hc_copy, phba->HCregaddr);
9399627f
JS
12827 readl(phba->HAregaddr); /* flush */
12828 spin_unlock(&phba->hbalock);
12829
12830 /*
12831 * Invokes slow-path host attention interrupt handling as appropriate.
12832 */
12833
12834 /* status of events with mailbox and link attention */
12835 status1 = phba->ha_copy & (HA_MBATT | HA_LATT | HA_ERATT);
12836
12837 /* status of events with ELS ring */
12838 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_ELS_RING)));
12839 status2 >>= (4*LPFC_ELS_RING);
12840
12841 if (status1 || (status2 & HA_RXMASK))
3772a991 12842 sp_irq_rc = lpfc_sli_sp_intr_handler(irq, dev_id);
9399627f
JS
12843 else
12844 sp_irq_rc = IRQ_NONE;
12845
12846 /*
12847 * Invoke fast-path host attention interrupt handling as appropriate.
12848 */
12849
12850 /* status of events with FCP ring */
12851 status1 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
12852 status1 >>= (4*LPFC_FCP_RING);
12853
12854 /* status of events with extra ring */
12855 if (phba->cfg_multi_ring_support == 2) {
12856 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
12857 status2 >>= (4*LPFC_EXTRA_RING);
12858 } else
12859 status2 = 0;
12860
12861 if ((status1 & HA_RXMASK) || (status2 & HA_RXMASK))
3772a991 12862 fp_irq_rc = lpfc_sli_fp_intr_handler(irq, dev_id);
9399627f
JS
12863 else
12864 fp_irq_rc = IRQ_NONE;
dea3101e 12865
9399627f
JS
12866 /* Return device-level interrupt handling status */
12867 return (sp_irq_rc == IRQ_HANDLED) ? sp_irq_rc : fp_irq_rc;
3772a991 12868} /* lpfc_sli_intr_handler */
4f774513
JS
12869
12870/**
4f774513 12871 * lpfc_sli4_els_xri_abort_event_proc - Process els xri abort event
4f774513
JS
12872 * @phba: pointer to lpfc hba data structure.
12873 *
12874 * This routine is invoked by the worker thread to process all the pending
4f774513 12875 * SLI4 els abort xri events.
4f774513 12876 **/
4f774513 12877void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *phba)
4f774513
JS
12878{
12879 struct lpfc_cq_event *cq_event;
12880
4f774513 12881 /* First, declare the els xri abort event has been handled */
4f774513 12882 spin_lock_irq(&phba->hbalock);
4f774513 12883 phba->hba_flag &= ~ELS_XRI_ABORT_EVENT;
4f774513 12884 spin_unlock_irq(&phba->hbalock);
4f774513
JS
12885 /* Now, handle all the els xri abort events */
12886 while (!list_empty(&phba->sli4_hba.sp_els_xri_aborted_work_queue)) {
12887 /* Get the first event from the head of the event queue */
12888 spin_lock_irq(&phba->hbalock);
12889 list_remove_head(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
12890 cq_event, struct lpfc_cq_event, list);
12891 spin_unlock_irq(&phba->hbalock);
12892 /* Notify aborted XRI for ELS work queue */
12893 lpfc_sli4_els_xri_aborted(phba, &cq_event->cqe.wcqe_axri);
12894 /* Free the event processed back to the free pool */
12895 lpfc_sli4_cq_event_release(phba, cq_event);
12896 }
12897}
12898
341af102
JS
12899/**
12900 * lpfc_sli4_iocb_param_transfer - Transfer pIocbOut and cmpl status to pIocbIn
12901 * @phba: pointer to lpfc hba data structure
12902 * @pIocbIn: pointer to the rspiocbq
12903 * @pIocbOut: pointer to the cmdiocbq
12904 * @wcqe: pointer to the complete wcqe
12905 *
12906 * This routine transfers the fields of a command iocbq to a response iocbq
12907 * by copying all the IOCB fields from command iocbq and transferring the
12908 * completion status information from the complete wcqe.
12909 **/
4f774513 12910static void
341af102
JS
12911lpfc_sli4_iocb_param_transfer(struct lpfc_hba *phba,
12912 struct lpfc_iocbq *pIocbIn,
4f774513
JS
12913 struct lpfc_iocbq *pIocbOut,
12914 struct lpfc_wcqe_complete *wcqe)
12915{
af22741c 12916 int numBdes, i;
341af102 12917 unsigned long iflags;
af22741c
JS
12918 uint32_t status, max_response;
12919 struct lpfc_dmabuf *dmabuf;
12920 struct ulp_bde64 *bpl, bde;
4f774513
JS
12921 size_t offset = offsetof(struct lpfc_iocbq, iocb);
12922
12923 memcpy((char *)pIocbIn + offset, (char *)pIocbOut + offset,
12924 sizeof(struct lpfc_iocbq) - offset);
4f774513 12925 /* Map WCQE parameters into irspiocb parameters */
acd6859b
JS
12926 status = bf_get(lpfc_wcqe_c_status, wcqe);
12927 pIocbIn->iocb.ulpStatus = (status & LPFC_IOCB_STATUS_MASK);
4f774513
JS
12928 if (pIocbOut->iocb_flag & LPFC_IO_FCP)
12929 if (pIocbIn->iocb.ulpStatus == IOSTAT_FCP_RSP_ERROR)
12930 pIocbIn->iocb.un.fcpi.fcpi_parm =
12931 pIocbOut->iocb.un.fcpi.fcpi_parm -
12932 wcqe->total_data_placed;
12933 else
12934 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
695a814e 12935 else {
4f774513 12936 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
af22741c
JS
12937 switch (pIocbOut->iocb.ulpCommand) {
12938 case CMD_ELS_REQUEST64_CR:
12939 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
12940 bpl = (struct ulp_bde64 *)dmabuf->virt;
12941 bde.tus.w = le32_to_cpu(bpl[1].tus.w);
12942 max_response = bde.tus.f.bdeSize;
12943 break;
12944 case CMD_GEN_REQUEST64_CR:
12945 max_response = 0;
12946 if (!pIocbOut->context3)
12947 break;
12948 numBdes = pIocbOut->iocb.un.genreq64.bdl.bdeSize/
12949 sizeof(struct ulp_bde64);
12950 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
12951 bpl = (struct ulp_bde64 *)dmabuf->virt;
12952 for (i = 0; i < numBdes; i++) {
12953 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
12954 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
12955 max_response += bde.tus.f.bdeSize;
12956 }
12957 break;
12958 default:
12959 max_response = wcqe->total_data_placed;
12960 break;
12961 }
12962 if (max_response < wcqe->total_data_placed)
12963 pIocbIn->iocb.un.genreq64.bdl.bdeSize = max_response;
12964 else
12965 pIocbIn->iocb.un.genreq64.bdl.bdeSize =
12966 wcqe->total_data_placed;
695a814e 12967 }
341af102 12968
acd6859b
JS
12969 /* Convert BG errors for completion status */
12970 if (status == CQE_STATUS_DI_ERROR) {
12971 pIocbIn->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
12972
12973 if (bf_get(lpfc_wcqe_c_bg_edir, wcqe))
12974 pIocbIn->iocb.un.ulpWord[4] = IOERR_RX_DMA_FAILED;
12975 else
12976 pIocbIn->iocb.un.ulpWord[4] = IOERR_TX_DMA_FAILED;
12977
12978 pIocbIn->iocb.unsli3.sli3_bg.bgstat = 0;
12979 if (bf_get(lpfc_wcqe_c_bg_ge, wcqe)) /* Guard Check failed */
12980 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12981 BGS_GUARD_ERR_MASK;
12982 if (bf_get(lpfc_wcqe_c_bg_ae, wcqe)) /* App Tag Check failed */
12983 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12984 BGS_APPTAG_ERR_MASK;
12985 if (bf_get(lpfc_wcqe_c_bg_re, wcqe)) /* Ref Tag Check failed */
12986 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12987 BGS_REFTAG_ERR_MASK;
12988
12989 /* Check to see if there was any good data before the error */
12990 if (bf_get(lpfc_wcqe_c_bg_tdpv, wcqe)) {
12991 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
12992 BGS_HI_WATER_MARK_PRESENT_MASK;
12993 pIocbIn->iocb.unsli3.sli3_bg.bghm =
12994 wcqe->total_data_placed;
12995 }
12996
12997 /*
12998 * Set ALL the error bits to indicate we don't know what
12999 * type of error it is.
13000 */
13001 if (!pIocbIn->iocb.unsli3.sli3_bg.bgstat)
13002 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13003 (BGS_REFTAG_ERR_MASK | BGS_APPTAG_ERR_MASK |
13004 BGS_GUARD_ERR_MASK);
13005 }
13006
341af102
JS
13007 /* Pick up HBA exchange busy condition */
13008 if (bf_get(lpfc_wcqe_c_xb, wcqe)) {
13009 spin_lock_irqsave(&phba->hbalock, iflags);
13010 pIocbIn->iocb_flag |= LPFC_EXCHANGE_BUSY;
13011 spin_unlock_irqrestore(&phba->hbalock, iflags);
13012 }
4f774513
JS
13013}
13014
45ed1190
JS
13015/**
13016 * lpfc_sli4_els_wcqe_to_rspiocbq - Get response iocbq from els wcqe
13017 * @phba: Pointer to HBA context object.
13018 * @wcqe: Pointer to work-queue completion queue entry.
13019 *
13020 * This routine handles an ELS work-queue completion event and construct
13021 * a pseudo response ELS IODBQ from the SLI4 ELS WCQE for the common
13022 * discovery engine to handle.
13023 *
13024 * Return: Pointer to the receive IOCBQ, NULL otherwise.
13025 **/
13026static struct lpfc_iocbq *
13027lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *phba,
13028 struct lpfc_iocbq *irspiocbq)
13029{
895427bd 13030 struct lpfc_sli_ring *pring;
45ed1190
JS
13031 struct lpfc_iocbq *cmdiocbq;
13032 struct lpfc_wcqe_complete *wcqe;
13033 unsigned long iflags;
13034
895427bd 13035 pring = lpfc_phba_elsring(phba);
1234a6d5
DK
13036 if (unlikely(!pring))
13037 return NULL;
895427bd 13038
45ed1190 13039 wcqe = &irspiocbq->cq_event.cqe.wcqe_cmpl;
45ed1190
JS
13040 pring->stats.iocb_event++;
13041 /* Look up the ELS command IOCB and create pseudo response IOCB */
13042 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13043 bf_get(lpfc_wcqe_c_request_tag, wcqe));
45ed1190
JS
13044 if (unlikely(!cmdiocbq)) {
13045 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13046 "0386 ELS complete with no corresponding "
401bb416
DK
13047 "cmdiocb: 0x%x 0x%x 0x%x 0x%x\n",
13048 wcqe->word0, wcqe->total_data_placed,
13049 wcqe->parameter, wcqe->word3);
45ed1190
JS
13050 lpfc_sli_release_iocbq(phba, irspiocbq);
13051 return NULL;
13052 }
13053
e2a8be56 13054 spin_lock_irqsave(&pring->ring_lock, iflags);
401bb416
DK
13055 /* Put the iocb back on the txcmplq */
13056 lpfc_sli_ringtxcmpl_put(phba, pring, cmdiocbq);
13057 spin_unlock_irqrestore(&pring->ring_lock, iflags);
13058
45ed1190 13059 /* Fake the irspiocbq and copy necessary response information */
341af102 13060 lpfc_sli4_iocb_param_transfer(phba, irspiocbq, cmdiocbq, wcqe);
45ed1190
JS
13061
13062 return irspiocbq;
13063}
13064
8a5ca109
JS
13065inline struct lpfc_cq_event *
13066lpfc_cq_event_setup(struct lpfc_hba *phba, void *entry, int size)
13067{
13068 struct lpfc_cq_event *cq_event;
13069
13070 /* Allocate a new internal CQ_EVENT entry */
13071 cq_event = lpfc_sli4_cq_event_alloc(phba);
13072 if (!cq_event) {
13073 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13074 "0602 Failed to alloc CQ_EVENT entry\n");
13075 return NULL;
13076 }
13077
13078 /* Move the CQE into the event */
13079 memcpy(&cq_event->cqe, entry, size);
13080 return cq_event;
13081}
13082
04c68496
JS
13083/**
13084 * lpfc_sli4_sp_handle_async_event - Handle an asynchroous event
13085 * @phba: Pointer to HBA context object.
13086 * @cqe: Pointer to mailbox completion queue entry.
13087 *
13088 * This routine process a mailbox completion queue entry with asynchrous
13089 * event.
13090 *
13091 * Return: true if work posted to worker thread, otherwise false.
13092 **/
13093static bool
13094lpfc_sli4_sp_handle_async_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13095{
13096 struct lpfc_cq_event *cq_event;
13097 unsigned long iflags;
13098
13099 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13100 "0392 Async Event: word0:x%x, word1:x%x, "
13101 "word2:x%x, word3:x%x\n", mcqe->word0,
13102 mcqe->mcqe_tag0, mcqe->mcqe_tag1, mcqe->trailer);
13103
8a5ca109
JS
13104 cq_event = lpfc_cq_event_setup(phba, mcqe, sizeof(struct lpfc_mcqe));
13105 if (!cq_event)
04c68496 13106 return false;
04c68496
JS
13107 spin_lock_irqsave(&phba->hbalock, iflags);
13108 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_asynce_work_queue);
13109 /* Set the async event flag */
13110 phba->hba_flag |= ASYNC_EVENT;
13111 spin_unlock_irqrestore(&phba->hbalock, iflags);
13112
13113 return true;
13114}
13115
13116/**
13117 * lpfc_sli4_sp_handle_mbox_event - Handle a mailbox completion event
13118 * @phba: Pointer to HBA context object.
13119 * @cqe: Pointer to mailbox completion queue entry.
13120 *
13121 * This routine process a mailbox completion queue entry with mailbox
13122 * completion event.
13123 *
13124 * Return: true if work posted to worker thread, otherwise false.
13125 **/
13126static bool
13127lpfc_sli4_sp_handle_mbox_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13128{
13129 uint32_t mcqe_status;
13130 MAILBOX_t *mbox, *pmbox;
13131 struct lpfc_mqe *mqe;
13132 struct lpfc_vport *vport;
13133 struct lpfc_nodelist *ndlp;
13134 struct lpfc_dmabuf *mp;
13135 unsigned long iflags;
13136 LPFC_MBOXQ_t *pmb;
13137 bool workposted = false;
13138 int rc;
13139
13140 /* If not a mailbox complete MCQE, out by checking mailbox consume */
13141 if (!bf_get(lpfc_trailer_completed, mcqe))
13142 goto out_no_mqe_complete;
13143
13144 /* Get the reference to the active mbox command */
13145 spin_lock_irqsave(&phba->hbalock, iflags);
13146 pmb = phba->sli.mbox_active;
13147 if (unlikely(!pmb)) {
13148 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13149 "1832 No pending MBOX command to handle\n");
13150 spin_unlock_irqrestore(&phba->hbalock, iflags);
13151 goto out_no_mqe_complete;
13152 }
13153 spin_unlock_irqrestore(&phba->hbalock, iflags);
13154 mqe = &pmb->u.mqe;
13155 pmbox = (MAILBOX_t *)&pmb->u.mqe;
13156 mbox = phba->mbox;
13157 vport = pmb->vport;
13158
13159 /* Reset heartbeat timer */
13160 phba->last_completion_time = jiffies;
13161 del_timer(&phba->sli.mbox_tmo);
13162
13163 /* Move mbox data to caller's mailbox region, do endian swapping */
13164 if (pmb->mbox_cmpl && mbox)
48f8fdb4 13165 lpfc_sli4_pcimem_bcopy(mbox, mqe, sizeof(struct lpfc_mqe));
04c68496 13166
73d91e50
JS
13167 /*
13168 * For mcqe errors, conditionally move a modified error code to
13169 * the mbox so that the error will not be missed.
13170 */
13171 mcqe_status = bf_get(lpfc_mcqe_status, mcqe);
13172 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
13173 if (bf_get(lpfc_mqe_status, mqe) == MBX_SUCCESS)
13174 bf_set(lpfc_mqe_status, mqe,
13175 (LPFC_MBX_ERROR_RANGE | mcqe_status));
13176 }
04c68496
JS
13177 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
13178 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
13179 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_MBOX_VPORT,
13180 "MBOX dflt rpi: status:x%x rpi:x%x",
13181 mcqe_status,
13182 pmbox->un.varWords[0], 0);
13183 if (mcqe_status == MB_CQE_STATUS_SUCCESS) {
3e1f0718
JS
13184 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
13185 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
04c68496
JS
13186 /* Reg_LOGIN of dflt RPI was successful. Now lets get
13187 * RID of the PPI using the same mbox buffer.
13188 */
13189 lpfc_unreg_login(phba, vport->vpi,
13190 pmbox->un.varWords[0], pmb);
13191 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
13192 pmb->ctx_buf = mp;
13193 pmb->ctx_ndlp = ndlp;
04c68496
JS
13194 pmb->vport = vport;
13195 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
13196 if (rc != MBX_BUSY)
13197 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
13198 LOG_SLI, "0385 rc should "
13199 "have been MBX_BUSY\n");
13200 if (rc != MBX_NOT_FINISHED)
13201 goto send_current_mbox;
13202 }
13203 }
13204 spin_lock_irqsave(&phba->pport->work_port_lock, iflags);
13205 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
13206 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflags);
13207
13208 /* There is mailbox completion work to do */
13209 spin_lock_irqsave(&phba->hbalock, iflags);
13210 __lpfc_mbox_cmpl_put(phba, pmb);
13211 phba->work_ha |= HA_MBATT;
13212 spin_unlock_irqrestore(&phba->hbalock, iflags);
13213 workposted = true;
13214
13215send_current_mbox:
13216 spin_lock_irqsave(&phba->hbalock, iflags);
13217 /* Release the mailbox command posting token */
13218 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13219 /* Setting active mailbox pointer need to be in sync to flag clear */
13220 phba->sli.mbox_active = NULL;
07b85824
JS
13221 if (bf_get(lpfc_trailer_consumed, mcqe))
13222 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
04c68496
JS
13223 spin_unlock_irqrestore(&phba->hbalock, iflags);
13224 /* Wake up worker thread to post the next pending mailbox command */
13225 lpfc_worker_wake_up(phba);
07b85824
JS
13226 return workposted;
13227
04c68496 13228out_no_mqe_complete:
07b85824 13229 spin_lock_irqsave(&phba->hbalock, iflags);
04c68496
JS
13230 if (bf_get(lpfc_trailer_consumed, mcqe))
13231 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
07b85824
JS
13232 spin_unlock_irqrestore(&phba->hbalock, iflags);
13233 return false;
04c68496
JS
13234}
13235
13236/**
13237 * lpfc_sli4_sp_handle_mcqe - Process a mailbox completion queue entry
13238 * @phba: Pointer to HBA context object.
13239 * @cqe: Pointer to mailbox completion queue entry.
13240 *
13241 * This routine process a mailbox completion queue entry, it invokes the
13242 * proper mailbox complete handling or asynchrous event handling routine
13243 * according to the MCQE's async bit.
13244 *
13245 * Return: true if work posted to worker thread, otherwise false.
13246 **/
13247static bool
32517fc0
JS
13248lpfc_sli4_sp_handle_mcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13249 struct lpfc_cqe *cqe)
04c68496
JS
13250{
13251 struct lpfc_mcqe mcqe;
13252 bool workposted;
13253
32517fc0
JS
13254 cq->CQ_mbox++;
13255
04c68496 13256 /* Copy the mailbox MCQE and convert endian order as needed */
48f8fdb4 13257 lpfc_sli4_pcimem_bcopy(cqe, &mcqe, sizeof(struct lpfc_mcqe));
04c68496
JS
13258
13259 /* Invoke the proper event handling routine */
13260 if (!bf_get(lpfc_trailer_async, &mcqe))
13261 workposted = lpfc_sli4_sp_handle_mbox_event(phba, &mcqe);
13262 else
13263 workposted = lpfc_sli4_sp_handle_async_event(phba, &mcqe);
13264 return workposted;
13265}
13266
4f774513
JS
13267/**
13268 * lpfc_sli4_sp_handle_els_wcqe - Handle els work-queue completion event
13269 * @phba: Pointer to HBA context object.
2a76a283 13270 * @cq: Pointer to associated CQ
4f774513
JS
13271 * @wcqe: Pointer to work-queue completion queue entry.
13272 *
13273 * This routine handles an ELS work-queue completion event.
13274 *
13275 * Return: true if work posted to worker thread, otherwise false.
13276 **/
13277static bool
2a76a283 13278lpfc_sli4_sp_handle_els_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13279 struct lpfc_wcqe_complete *wcqe)
13280{
4f774513
JS
13281 struct lpfc_iocbq *irspiocbq;
13282 unsigned long iflags;
2a76a283 13283 struct lpfc_sli_ring *pring = cq->pring;
0e9bb8d7
JS
13284 int txq_cnt = 0;
13285 int txcmplq_cnt = 0;
4f774513 13286
11f0e34f
JS
13287 /* Check for response status */
13288 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13289 /* Log the error status */
13290 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13291 "0357 ELS CQE error: status=x%x: "
13292 "CQE: %08x %08x %08x %08x\n",
13293 bf_get(lpfc_wcqe_c_status, wcqe),
13294 wcqe->word0, wcqe->total_data_placed,
13295 wcqe->parameter, wcqe->word3);
13296 }
13297
45ed1190 13298 /* Get an irspiocbq for later ELS response processing use */
4f774513
JS
13299 irspiocbq = lpfc_sli_get_iocbq(phba);
13300 if (!irspiocbq) {
0e9bb8d7
JS
13301 if (!list_empty(&pring->txq))
13302 txq_cnt++;
13303 if (!list_empty(&pring->txcmplq))
13304 txcmplq_cnt++;
4f774513 13305 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2a9bf3d0 13306 "0387 NO IOCBQ data: txq_cnt=%d iocb_cnt=%d "
ff349bca 13307 "els_txcmplq_cnt=%d\n",
0e9bb8d7 13308 txq_cnt, phba->iocb_cnt,
0e9bb8d7 13309 txcmplq_cnt);
45ed1190 13310 return false;
4f774513 13311 }
4f774513 13312
45ed1190
JS
13313 /* Save off the slow-path queue event for work thread to process */
13314 memcpy(&irspiocbq->cq_event.cqe.wcqe_cmpl, wcqe, sizeof(*wcqe));
4f774513 13315 spin_lock_irqsave(&phba->hbalock, iflags);
4d9ab994 13316 list_add_tail(&irspiocbq->cq_event.list,
45ed1190
JS
13317 &phba->sli4_hba.sp_queue_event);
13318 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513 13319 spin_unlock_irqrestore(&phba->hbalock, iflags);
4f774513 13320
45ed1190 13321 return true;
4f774513
JS
13322}
13323
13324/**
13325 * lpfc_sli4_sp_handle_rel_wcqe - Handle slow-path WQ entry consumed event
13326 * @phba: Pointer to HBA context object.
13327 * @wcqe: Pointer to work-queue completion queue entry.
13328 *
3f8b6fb7 13329 * This routine handles slow-path WQ entry consumed event by invoking the
4f774513
JS
13330 * proper WQ release routine to the slow-path WQ.
13331 **/
13332static void
13333lpfc_sli4_sp_handle_rel_wcqe(struct lpfc_hba *phba,
13334 struct lpfc_wcqe_release *wcqe)
13335{
2e90f4b5
JS
13336 /* sanity check on queue memory */
13337 if (unlikely(!phba->sli4_hba.els_wq))
13338 return;
4f774513
JS
13339 /* Check for the slow-path ELS work queue */
13340 if (bf_get(lpfc_wcqe_r_wq_id, wcqe) == phba->sli4_hba.els_wq->queue_id)
13341 lpfc_sli4_wq_release(phba->sli4_hba.els_wq,
13342 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
13343 else
13344 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13345 "2579 Slow-path wqe consume event carries "
13346 "miss-matched qid: wcqe-qid=x%x, sp-qid=x%x\n",
13347 bf_get(lpfc_wcqe_r_wqe_index, wcqe),
13348 phba->sli4_hba.els_wq->queue_id);
13349}
13350
13351/**
13352 * lpfc_sli4_sp_handle_abort_xri_wcqe - Handle a xri abort event
13353 * @phba: Pointer to HBA context object.
13354 * @cq: Pointer to a WQ completion queue.
13355 * @wcqe: Pointer to work-queue completion queue entry.
13356 *
13357 * This routine handles an XRI abort event.
13358 *
13359 * Return: true if work posted to worker thread, otherwise false.
13360 **/
13361static bool
13362lpfc_sli4_sp_handle_abort_xri_wcqe(struct lpfc_hba *phba,
13363 struct lpfc_queue *cq,
13364 struct sli4_wcqe_xri_aborted *wcqe)
13365{
13366 bool workposted = false;
13367 struct lpfc_cq_event *cq_event;
13368 unsigned long iflags;
13369
4f774513 13370 switch (cq->subtype) {
c00f62e6
JS
13371 case LPFC_IO:
13372 lpfc_sli4_io_xri_aborted(phba, wcqe, cq->hdwq);
13373 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13374 /* Notify aborted XRI for NVME work queue */
13375 if (phba->nvmet_support)
13376 lpfc_sli4_nvmet_xri_aborted(phba, wcqe);
13377 }
5e5b511d 13378 workposted = false;
4f774513 13379 break;
422c4cb7 13380 case LPFC_NVME_LS: /* NVME LS uses ELS resources */
4f774513 13381 case LPFC_ELS:
8a5ca109
JS
13382 cq_event = lpfc_cq_event_setup(
13383 phba, wcqe, sizeof(struct sli4_wcqe_xri_aborted));
13384 if (!cq_event)
13385 return false;
5e5b511d 13386 cq_event->hdwq = cq->hdwq;
4f774513
JS
13387 spin_lock_irqsave(&phba->hbalock, iflags);
13388 list_add_tail(&cq_event->list,
13389 &phba->sli4_hba.sp_els_xri_aborted_work_queue);
13390 /* Set the els xri abort event flag */
13391 phba->hba_flag |= ELS_XRI_ABORT_EVENT;
13392 spin_unlock_irqrestore(&phba->hbalock, iflags);
13393 workposted = true;
13394 break;
13395 default:
13396 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
318083ad
JS
13397 "0603 Invalid CQ subtype %d: "
13398 "%08x %08x %08x %08x\n",
13399 cq->subtype, wcqe->word0, wcqe->parameter,
13400 wcqe->word2, wcqe->word3);
4f774513
JS
13401 workposted = false;
13402 break;
13403 }
13404 return workposted;
13405}
13406
e817e5d7
JS
13407#define FC_RCTL_MDS_DIAGS 0xF4
13408
4f774513
JS
13409/**
13410 * lpfc_sli4_sp_handle_rcqe - Process a receive-queue completion queue entry
13411 * @phba: Pointer to HBA context object.
13412 * @rcqe: Pointer to receive-queue completion queue entry.
13413 *
13414 * This routine process a receive-queue completion queue entry.
13415 *
13416 * Return: true if work posted to worker thread, otherwise false.
13417 **/
13418static bool
4d9ab994 13419lpfc_sli4_sp_handle_rcqe(struct lpfc_hba *phba, struct lpfc_rcqe *rcqe)
4f774513 13420{
4f774513 13421 bool workposted = false;
e817e5d7 13422 struct fc_frame_header *fc_hdr;
4f774513
JS
13423 struct lpfc_queue *hrq = phba->sli4_hba.hdr_rq;
13424 struct lpfc_queue *drq = phba->sli4_hba.dat_rq;
547077a4 13425 struct lpfc_nvmet_tgtport *tgtp;
4f774513 13426 struct hbq_dmabuf *dma_buf;
7851fe2c 13427 uint32_t status, rq_id;
4f774513
JS
13428 unsigned long iflags;
13429
2e90f4b5
JS
13430 /* sanity check on queue memory */
13431 if (unlikely(!hrq) || unlikely(!drq))
13432 return workposted;
13433
7851fe2c
JS
13434 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13435 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13436 else
13437 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13438 if (rq_id != hrq->queue_id)
4f774513
JS
13439 goto out;
13440
4d9ab994 13441 status = bf_get(lpfc_rcqe_status, rcqe);
4f774513
JS
13442 switch (status) {
13443 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13444 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13445 "2537 Receive Frame Truncated!!\n");
5bd5f66c 13446 /* fall through */
4f774513
JS
13447 case FC_STATUS_RQ_SUCCESS:
13448 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13449 lpfc_sli4_rq_release(hrq, drq);
4f774513
JS
13450 dma_buf = lpfc_sli_hbqbuf_get(&phba->hbqs[0].hbq_buffer_list);
13451 if (!dma_buf) {
b84daac9 13452 hrq->RQ_no_buf_found++;
4f774513
JS
13453 spin_unlock_irqrestore(&phba->hbalock, iflags);
13454 goto out;
13455 }
b84daac9 13456 hrq->RQ_rcv_buf++;
547077a4 13457 hrq->RQ_buf_posted--;
4d9ab994 13458 memcpy(&dma_buf->cq_event.cqe.rcqe_cmpl, rcqe, sizeof(*rcqe));
895427bd 13459
e817e5d7
JS
13460 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13461
13462 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
13463 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
13464 spin_unlock_irqrestore(&phba->hbalock, iflags);
13465 /* Handle MDS Loopback frames */
13466 lpfc_sli4_handle_mds_loopback(phba->pport, dma_buf);
13467 break;
13468 }
13469
13470 /* save off the frame for the work thread to process */
4d9ab994 13471 list_add_tail(&dma_buf->cq_event.list,
45ed1190 13472 &phba->sli4_hba.sp_queue_event);
4f774513 13473 /* Frame received */
45ed1190 13474 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513
JS
13475 spin_unlock_irqrestore(&phba->hbalock, iflags);
13476 workposted = true;
13477 break;
4f774513 13478 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13479 if (phba->nvmet_support) {
13480 tgtp = phba->targetport->private;
13481 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13482 "6402 RQE Error x%x, posted %d err_cnt "
13483 "%d: %x %x %x\n",
13484 status, hrq->RQ_buf_posted,
13485 hrq->RQ_no_posted_buf,
13486 atomic_read(&tgtp->rcv_fcp_cmd_in),
13487 atomic_read(&tgtp->rcv_fcp_cmd_out),
13488 atomic_read(&tgtp->xmt_fcp_release));
13489 }
13490 /* fallthrough */
13491
13492 case FC_STATUS_INSUFF_BUF_NEED_BUF:
b84daac9 13493 hrq->RQ_no_posted_buf++;
4f774513
JS
13494 /* Post more buffers if possible */
13495 spin_lock_irqsave(&phba->hbalock, iflags);
13496 phba->hba_flag |= HBA_POST_RECEIVE_BUFFER;
13497 spin_unlock_irqrestore(&phba->hbalock, iflags);
13498 workposted = true;
13499 break;
13500 }
13501out:
13502 return workposted;
4f774513
JS
13503}
13504
4d9ab994
JS
13505/**
13506 * lpfc_sli4_sp_handle_cqe - Process a slow path completion queue entry
13507 * @phba: Pointer to HBA context object.
13508 * @cq: Pointer to the completion queue.
32517fc0 13509 * @cqe: Pointer to a completion queue entry.
4d9ab994 13510 *
25985edc 13511 * This routine process a slow-path work-queue or receive queue completion queue
4d9ab994
JS
13512 * entry.
13513 *
13514 * Return: true if work posted to worker thread, otherwise false.
13515 **/
13516static bool
13517lpfc_sli4_sp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13518 struct lpfc_cqe *cqe)
13519{
45ed1190 13520 struct lpfc_cqe cqevt;
4d9ab994
JS
13521 bool workposted = false;
13522
13523 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 13524 lpfc_sli4_pcimem_bcopy(cqe, &cqevt, sizeof(struct lpfc_cqe));
4d9ab994
JS
13525
13526 /* Check and process for different type of WCQE and dispatch */
45ed1190 13527 switch (bf_get(lpfc_cqe_code, &cqevt)) {
4d9ab994 13528 case CQE_CODE_COMPL_WQE:
45ed1190 13529 /* Process the WQ/RQ complete event */
bc73905a 13530 phba->last_completion_time = jiffies;
2a76a283 13531 workposted = lpfc_sli4_sp_handle_els_wcqe(phba, cq,
45ed1190 13532 (struct lpfc_wcqe_complete *)&cqevt);
4d9ab994
JS
13533 break;
13534 case CQE_CODE_RELEASE_WQE:
13535 /* Process the WQ release event */
13536 lpfc_sli4_sp_handle_rel_wcqe(phba,
45ed1190 13537 (struct lpfc_wcqe_release *)&cqevt);
4d9ab994
JS
13538 break;
13539 case CQE_CODE_XRI_ABORTED:
13540 /* Process the WQ XRI abort event */
bc73905a 13541 phba->last_completion_time = jiffies;
4d9ab994 13542 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
45ed1190 13543 (struct sli4_wcqe_xri_aborted *)&cqevt);
4d9ab994
JS
13544 break;
13545 case CQE_CODE_RECEIVE:
7851fe2c 13546 case CQE_CODE_RECEIVE_V1:
4d9ab994 13547 /* Process the RQ event */
bc73905a 13548 phba->last_completion_time = jiffies;
4d9ab994 13549 workposted = lpfc_sli4_sp_handle_rcqe(phba,
45ed1190 13550 (struct lpfc_rcqe *)&cqevt);
4d9ab994
JS
13551 break;
13552 default:
13553 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13554 "0388 Not a valid WCQE code: x%x\n",
45ed1190 13555 bf_get(lpfc_cqe_code, &cqevt));
4d9ab994
JS
13556 break;
13557 }
13558 return workposted;
13559}
13560
4f774513
JS
13561/**
13562 * lpfc_sli4_sp_handle_eqe - Process a slow-path event queue entry
13563 * @phba: Pointer to HBA context object.
13564 * @eqe: Pointer to fast-path event queue entry.
13565 *
13566 * This routine process a event queue entry from the slow-path event queue.
13567 * It will check the MajorCode and MinorCode to determine this is for a
13568 * completion event on a completion queue, if not, an error shall be logged
13569 * and just return. Otherwise, it will get to the corresponding completion
13570 * queue and process all the entries on that completion queue, rearm the
13571 * completion queue, and then return.
13572 *
13573 **/
f485c18d 13574static void
67d12733
JS
13575lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
13576 struct lpfc_queue *speq)
4f774513 13577{
67d12733 13578 struct lpfc_queue *cq = NULL, *childq;
4f774513
JS
13579 uint16_t cqid;
13580
4f774513 13581 /* Get the reference to the corresponding CQ */
cb5172ea 13582 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
4f774513 13583
4f774513
JS
13584 list_for_each_entry(childq, &speq->child_list, list) {
13585 if (childq->queue_id == cqid) {
13586 cq = childq;
13587 break;
13588 }
13589 }
13590 if (unlikely(!cq)) {
75baf696
JS
13591 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
13592 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13593 "0365 Slow-path CQ identifier "
13594 "(%d) does not exist\n", cqid);
f485c18d 13595 return;
4f774513
JS
13596 }
13597
895427bd
JS
13598 /* Save EQ associated with this CQ */
13599 cq->assoc_qp = speq;
13600
6a828b0f 13601 if (!queue_work_on(cq->chann, phba->wq, &cq->spwork))
f485c18d
DK
13602 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13603 "0390 Cannot schedule soft IRQ "
13604 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
d6d189ce 13605 cqid, cq->queue_id, raw_smp_processor_id());
f485c18d
DK
13606}
13607
13608/**
32517fc0 13609 * __lpfc_sli4_process_cq - Process elements of a CQ
f485c18d 13610 * @phba: Pointer to HBA context object.
32517fc0
JS
13611 * @cq: Pointer to CQ to be processed
13612 * @handler: Routine to process each cqe
13613 * @delay: Pointer to usdelay to set in case of rescheduling of the handler
f485c18d 13614 *
32517fc0
JS
13615 * This routine processes completion queue entries in a CQ. While a valid
13616 * queue element is found, the handler is called. During processing checks
13617 * are made for periodic doorbell writes to let the hardware know of
13618 * element consumption.
13619 *
13620 * If the max limit on cqes to process is hit, or there are no more valid
13621 * entries, the loop stops. If we processed a sufficient number of elements,
13622 * meaning there is sufficient load, rather than rearming and generating
13623 * another interrupt, a cq rescheduling delay will be set. A delay of 0
13624 * indicates no rescheduling.
f485c18d 13625 *
32517fc0 13626 * Returns True if work scheduled, False otherwise.
f485c18d 13627 **/
32517fc0
JS
13628static bool
13629__lpfc_sli4_process_cq(struct lpfc_hba *phba, struct lpfc_queue *cq,
13630 bool (*handler)(struct lpfc_hba *, struct lpfc_queue *,
13631 struct lpfc_cqe *), unsigned long *delay)
f485c18d 13632{
f485c18d
DK
13633 struct lpfc_cqe *cqe;
13634 bool workposted = false;
32517fc0
JS
13635 int count = 0, consumed = 0;
13636 bool arm = true;
13637
13638 /* default - no reschedule */
13639 *delay = 0;
13640
13641 if (cmpxchg(&cq->queue_claimed, 0, 1) != 0)
13642 goto rearm_and_exit;
f485c18d 13643
4f774513 13644 /* Process all the entries to the CQ */
d74a89aa 13645 cq->q_flag = 0;
32517fc0
JS
13646 cqe = lpfc_sli4_cq_get(cq);
13647 while (cqe) {
32517fc0
JS
13648 workposted |= handler(phba, cq, cqe);
13649 __lpfc_sli4_consume_cqe(phba, cq, cqe);
13650
13651 consumed++;
13652 if (!(++count % cq->max_proc_limit))
13653 break;
13654
13655 if (!(count % cq->notify_interval)) {
13656 phba->sli4_hba.sli4_write_cq_db(phba, cq, consumed,
13657 LPFC_QUEUE_NOARM);
13658 consumed = 0;
8156d378 13659 cq->assoc_qp->q_flag |= HBA_EQ_DELAY_CHK;
32517fc0
JS
13660 }
13661
d74a89aa
JS
13662 if (count == LPFC_NVMET_CQ_NOTIFY)
13663 cq->q_flag |= HBA_NVMET_CQ_NOTIFY;
13664
32517fc0
JS
13665 cqe = lpfc_sli4_cq_get(cq);
13666 }
13667 if (count >= phba->cfg_cq_poll_threshold) {
13668 *delay = 1;
13669 arm = false;
13670 }
13671
13672 /* Track the max number of CQEs processed in 1 EQ */
13673 if (count > cq->CQ_max_cqe)
13674 cq->CQ_max_cqe = count;
13675
13676 cq->assoc_qp->EQ_cqe_cnt += count;
13677
13678 /* Catch the no cq entry condition */
13679 if (unlikely(count == 0))
13680 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13681 "0369 No entry from completion queue "
13682 "qid=%d\n", cq->queue_id);
13683
13684 cq->queue_claimed = 0;
13685
13686rearm_and_exit:
13687 phba->sli4_hba.sli4_write_cq_db(phba, cq, consumed,
13688 arm ? LPFC_QUEUE_REARM : LPFC_QUEUE_NOARM);
13689
13690 return workposted;
13691}
13692
13693/**
13694 * lpfc_sli4_sp_process_cq - Process a slow-path event queue entry
13695 * @cq: pointer to CQ to process
13696 *
13697 * This routine calls the cq processing routine with a handler specific
13698 * to the type of queue bound to it.
13699 *
13700 * The CQ routine returns two values: the first is the calling status,
13701 * which indicates whether work was queued to the background discovery
13702 * thread. If true, the routine should wakeup the discovery thread;
13703 * the second is the delay parameter. If non-zero, rather than rearming
13704 * the CQ and yet another interrupt, the CQ handler should be queued so
13705 * that it is processed in a subsequent polling action. The value of
13706 * the delay indicates when to reschedule it.
13707 **/
13708static void
13709__lpfc_sli4_sp_process_cq(struct lpfc_queue *cq)
13710{
13711 struct lpfc_hba *phba = cq->phba;
13712 unsigned long delay;
13713 bool workposted = false;
13714
13715 /* Process and rearm the CQ */
4f774513
JS
13716 switch (cq->type) {
13717 case LPFC_MCQ:
32517fc0
JS
13718 workposted |= __lpfc_sli4_process_cq(phba, cq,
13719 lpfc_sli4_sp_handle_mcqe,
13720 &delay);
4f774513
JS
13721 break;
13722 case LPFC_WCQ:
c00f62e6 13723 if (cq->subtype == LPFC_IO)
32517fc0
JS
13724 workposted |= __lpfc_sli4_process_cq(phba, cq,
13725 lpfc_sli4_fp_handle_cqe,
13726 &delay);
13727 else
13728 workposted |= __lpfc_sli4_process_cq(phba, cq,
13729 lpfc_sli4_sp_handle_cqe,
13730 &delay);
4f774513
JS
13731 break;
13732 default:
13733 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13734 "0370 Invalid completion queue type (%d)\n",
13735 cq->type);
f485c18d 13736 return;
4f774513
JS
13737 }
13738
32517fc0
JS
13739 if (delay) {
13740 if (!queue_delayed_work_on(cq->chann, phba->wq,
13741 &cq->sched_spwork, delay))
13742 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13743 "0394 Cannot schedule soft IRQ "
13744 "for cqid=%d on CPU %d\n",
13745 cq->queue_id, cq->chann);
13746 }
4f774513
JS
13747
13748 /* wake up worker thread if there are works to be done */
13749 if (workposted)
13750 lpfc_worker_wake_up(phba);
13751}
13752
32517fc0
JS
13753/**
13754 * lpfc_sli4_sp_process_cq - slow-path work handler when started by
13755 * interrupt
13756 * @work: pointer to work element
13757 *
13758 * translates from the work handler and calls the slow-path handler.
13759 **/
13760static void
13761lpfc_sli4_sp_process_cq(struct work_struct *work)
13762{
13763 struct lpfc_queue *cq = container_of(work, struct lpfc_queue, spwork);
13764
13765 __lpfc_sli4_sp_process_cq(cq);
13766}
13767
13768/**
13769 * lpfc_sli4_dly_sp_process_cq - slow-path work handler when started by timer
13770 * @work: pointer to work element
13771 *
13772 * translates from the work handler and calls the slow-path handler.
13773 **/
13774static void
13775lpfc_sli4_dly_sp_process_cq(struct work_struct *work)
13776{
13777 struct lpfc_queue *cq = container_of(to_delayed_work(work),
13778 struct lpfc_queue, sched_spwork);
13779
13780 __lpfc_sli4_sp_process_cq(cq);
13781}
13782
4f774513
JS
13783/**
13784 * lpfc_sli4_fp_handle_fcp_wcqe - Process fast-path work queue completion entry
2a76a283
JS
13785 * @phba: Pointer to HBA context object.
13786 * @cq: Pointer to associated CQ
13787 * @wcqe: Pointer to work-queue completion queue entry.
4f774513
JS
13788 *
13789 * This routine process a fast-path work queue completion entry from fast-path
13790 * event queue for FCP command response completion.
13791 **/
13792static void
2a76a283 13793lpfc_sli4_fp_handle_fcp_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13794 struct lpfc_wcqe_complete *wcqe)
13795{
2a76a283 13796 struct lpfc_sli_ring *pring = cq->pring;
4f774513
JS
13797 struct lpfc_iocbq *cmdiocbq;
13798 struct lpfc_iocbq irspiocbq;
13799 unsigned long iflags;
13800
4f774513
JS
13801 /* Check for response status */
13802 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13803 /* If resource errors reported from HBA, reduce queue
13804 * depth of the SCSI device.
13805 */
e3d2b802
JS
13806 if (((bf_get(lpfc_wcqe_c_status, wcqe) ==
13807 IOSTAT_LOCAL_REJECT)) &&
13808 ((wcqe->parameter & IOERR_PARAM_MASK) ==
13809 IOERR_NO_RESOURCES))
4f774513 13810 phba->lpfc_rampdown_queue_depth(phba);
e3d2b802 13811
4f774513 13812 /* Log the error status */
11f0e34f
JS
13813 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13814 "0373 FCP CQE error: status=x%x: "
13815 "CQE: %08x %08x %08x %08x\n",
4f774513 13816 bf_get(lpfc_wcqe_c_status, wcqe),
11f0e34f
JS
13817 wcqe->word0, wcqe->total_data_placed,
13818 wcqe->parameter, wcqe->word3);
4f774513
JS
13819 }
13820
13821 /* Look up the FCP command IOCB and create pseudo response IOCB */
7e56aa25
JS
13822 spin_lock_irqsave(&pring->ring_lock, iflags);
13823 pring->stats.iocb_event++;
e2a8be56 13824 spin_unlock_irqrestore(&pring->ring_lock, iflags);
4f774513
JS
13825 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13826 bf_get(lpfc_wcqe_c_request_tag, wcqe));
4f774513
JS
13827 if (unlikely(!cmdiocbq)) {
13828 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13829 "0374 FCP complete with no corresponding "
13830 "cmdiocb: iotag (%d)\n",
13831 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13832 return;
13833 }
c8a4ce0b
DK
13834#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13835 cmdiocbq->isr_timestamp = cq->isr_timestamp;
13836#endif
895427bd
JS
13837 if (cmdiocbq->iocb_cmpl == NULL) {
13838 if (cmdiocbq->wqe_cmpl) {
13839 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13840 spin_lock_irqsave(&phba->hbalock, iflags);
13841 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13842 spin_unlock_irqrestore(&phba->hbalock, iflags);
13843 }
13844
13845 /* Pass the cmd_iocb and the wcqe to the upper layer */
13846 (cmdiocbq->wqe_cmpl)(phba, cmdiocbq, wcqe);
13847 return;
13848 }
4f774513
JS
13849 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13850 "0375 FCP cmdiocb not callback function "
13851 "iotag: (%d)\n",
13852 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13853 return;
13854 }
13855
13856 /* Fake the irspiocb and copy necessary response information */
341af102 13857 lpfc_sli4_iocb_param_transfer(phba, &irspiocbq, cmdiocbq, wcqe);
4f774513 13858
0f65ff68
JS
13859 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13860 spin_lock_irqsave(&phba->hbalock, iflags);
13861 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13862 spin_unlock_irqrestore(&phba->hbalock, iflags);
13863 }
13864
4f774513
JS
13865 /* Pass the cmd_iocb and the rsp state to the upper layer */
13866 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, &irspiocbq);
13867}
13868
13869/**
13870 * lpfc_sli4_fp_handle_rel_wcqe - Handle fast-path WQ entry consumed event
13871 * @phba: Pointer to HBA context object.
13872 * @cq: Pointer to completion queue.
13873 * @wcqe: Pointer to work-queue completion queue entry.
13874 *
3f8b6fb7 13875 * This routine handles an fast-path WQ entry consumed event by invoking the
4f774513
JS
13876 * proper WQ release routine to the slow-path WQ.
13877 **/
13878static void
13879lpfc_sli4_fp_handle_rel_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13880 struct lpfc_wcqe_release *wcqe)
13881{
13882 struct lpfc_queue *childwq;
13883 bool wqid_matched = false;
895427bd 13884 uint16_t hba_wqid;
4f774513
JS
13885
13886 /* Check for fast-path FCP work queue release */
895427bd 13887 hba_wqid = bf_get(lpfc_wcqe_r_wq_id, wcqe);
4f774513 13888 list_for_each_entry(childwq, &cq->child_list, list) {
895427bd 13889 if (childwq->queue_id == hba_wqid) {
4f774513
JS
13890 lpfc_sli4_wq_release(childwq,
13891 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
6e8e1c14
JS
13892 if (childwq->q_flag & HBA_NVMET_WQFULL)
13893 lpfc_nvmet_wqfull_process(phba, childwq);
4f774513
JS
13894 wqid_matched = true;
13895 break;
13896 }
13897 }
13898 /* Report warning log message if no match found */
13899 if (wqid_matched != true)
13900 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13901 "2580 Fast-path wqe consume event carries "
895427bd 13902 "miss-matched qid: wcqe-qid=x%x\n", hba_wqid);
4f774513
JS
13903}
13904
13905/**
2d7dbc4c
JS
13906 * lpfc_sli4_nvmet_handle_rcqe - Process a receive-queue completion queue entry
13907 * @phba: Pointer to HBA context object.
13908 * @rcqe: Pointer to receive-queue completion queue entry.
4f774513 13909 *
2d7dbc4c
JS
13910 * This routine process a receive-queue completion queue entry.
13911 *
13912 * Return: true if work posted to worker thread, otherwise false.
13913 **/
13914static bool
13915lpfc_sli4_nvmet_handle_rcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13916 struct lpfc_rcqe *rcqe)
13917{
13918 bool workposted = false;
13919 struct lpfc_queue *hrq;
13920 struct lpfc_queue *drq;
13921 struct rqb_dmabuf *dma_buf;
13922 struct fc_frame_header *fc_hdr;
547077a4 13923 struct lpfc_nvmet_tgtport *tgtp;
2d7dbc4c
JS
13924 uint32_t status, rq_id;
13925 unsigned long iflags;
13926 uint32_t fctl, idx;
13927
13928 if ((phba->nvmet_support == 0) ||
13929 (phba->sli4_hba.nvmet_cqset == NULL))
13930 return workposted;
13931
13932 idx = cq->queue_id - phba->sli4_hba.nvmet_cqset[0]->queue_id;
13933 hrq = phba->sli4_hba.nvmet_mrq_hdr[idx];
13934 drq = phba->sli4_hba.nvmet_mrq_data[idx];
13935
13936 /* sanity check on queue memory */
13937 if (unlikely(!hrq) || unlikely(!drq))
13938 return workposted;
13939
13940 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13941 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13942 else
13943 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13944
13945 if ((phba->nvmet_support == 0) ||
13946 (rq_id != hrq->queue_id))
13947 return workposted;
13948
13949 status = bf_get(lpfc_rcqe_status, rcqe);
13950 switch (status) {
13951 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13952 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13953 "6126 Receive Frame Truncated!!\n");
5bd5f66c 13954 /* fall through */
2d7dbc4c 13955 case FC_STATUS_RQ_SUCCESS:
2d7dbc4c 13956 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13957 lpfc_sli4_rq_release(hrq, drq);
2d7dbc4c
JS
13958 dma_buf = lpfc_sli_rqbuf_get(phba, hrq);
13959 if (!dma_buf) {
13960 hrq->RQ_no_buf_found++;
13961 spin_unlock_irqrestore(&phba->hbalock, iflags);
13962 goto out;
13963 }
13964 spin_unlock_irqrestore(&phba->hbalock, iflags);
13965 hrq->RQ_rcv_buf++;
547077a4 13966 hrq->RQ_buf_posted--;
2d7dbc4c
JS
13967 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13968
13969 /* Just some basic sanity checks on FCP Command frame */
13970 fctl = (fc_hdr->fh_f_ctl[0] << 16 |
13971 fc_hdr->fh_f_ctl[1] << 8 |
13972 fc_hdr->fh_f_ctl[2]);
13973 if (((fctl &
13974 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) !=
13975 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) ||
13976 (fc_hdr->fh_seq_cnt != 0)) /* 0 byte swapped is still 0 */
13977 goto drop;
13978
13979 if (fc_hdr->fh_type == FC_TYPE_FCP) {
d74a89aa 13980 dma_buf->bytes_recv = bf_get(lpfc_rcqe_length, rcqe);
d613b6a7 13981 lpfc_nvmet_unsol_fcp_event(
d74a89aa
JS
13982 phba, idx, dma_buf, cq->isr_timestamp,
13983 cq->q_flag & HBA_NVMET_CQ_NOTIFY);
2d7dbc4c
JS
13984 return false;
13985 }
13986drop:
22b738ac 13987 lpfc_rq_buf_free(phba, &dma_buf->hbuf);
2d7dbc4c 13988 break;
2d7dbc4c 13989 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13990 if (phba->nvmet_support) {
13991 tgtp = phba->targetport->private;
13992 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13993 "6401 RQE Error x%x, posted %d err_cnt "
13994 "%d: %x %x %x\n",
13995 status, hrq->RQ_buf_posted,
13996 hrq->RQ_no_posted_buf,
13997 atomic_read(&tgtp->rcv_fcp_cmd_in),
13998 atomic_read(&tgtp->rcv_fcp_cmd_out),
13999 atomic_read(&tgtp->xmt_fcp_release));
14000 }
14001 /* fallthrough */
14002
14003 case FC_STATUS_INSUFF_BUF_NEED_BUF:
2d7dbc4c
JS
14004 hrq->RQ_no_posted_buf++;
14005 /* Post more buffers if possible */
2d7dbc4c
JS
14006 break;
14007 }
14008out:
14009 return workposted;
14010}
14011
4f774513 14012/**
895427bd 14013 * lpfc_sli4_fp_handle_cqe - Process fast-path work queue completion entry
32517fc0 14014 * @phba: adapter with cq
4f774513
JS
14015 * @cq: Pointer to the completion queue.
14016 * @eqe: Pointer to fast-path completion queue entry.
14017 *
14018 * This routine process a fast-path work queue completion entry from fast-path
14019 * event queue for FCP command response completion.
32517fc0
JS
14020 *
14021 * Return: true if work posted to worker thread, otherwise false.
4f774513 14022 **/
32517fc0 14023static bool
895427bd 14024lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
14025 struct lpfc_cqe *cqe)
14026{
14027 struct lpfc_wcqe_release wcqe;
14028 bool workposted = false;
14029
14030 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 14031 lpfc_sli4_pcimem_bcopy(cqe, &wcqe, sizeof(struct lpfc_cqe));
4f774513
JS
14032
14033 /* Check and process for different type of WCQE and dispatch */
14034 switch (bf_get(lpfc_wcqe_c_code, &wcqe)) {
14035 case CQE_CODE_COMPL_WQE:
895427bd 14036 case CQE_CODE_NVME_ERSP:
b84daac9 14037 cq->CQ_wq++;
4f774513 14038 /* Process the WQ complete event */
98fc5dd9 14039 phba->last_completion_time = jiffies;
c00f62e6 14040 if (cq->subtype == LPFC_IO || cq->subtype == LPFC_NVME_LS)
895427bd 14041 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
4f774513
JS
14042 (struct lpfc_wcqe_complete *)&wcqe);
14043 break;
14044 case CQE_CODE_RELEASE_WQE:
b84daac9 14045 cq->CQ_release_wqe++;
4f774513
JS
14046 /* Process the WQ release event */
14047 lpfc_sli4_fp_handle_rel_wcqe(phba, cq,
14048 (struct lpfc_wcqe_release *)&wcqe);
14049 break;
14050 case CQE_CODE_XRI_ABORTED:
b84daac9 14051 cq->CQ_xri_aborted++;
4f774513 14052 /* Process the WQ XRI abort event */
bc73905a 14053 phba->last_completion_time = jiffies;
4f774513
JS
14054 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
14055 (struct sli4_wcqe_xri_aborted *)&wcqe);
14056 break;
895427bd
JS
14057 case CQE_CODE_RECEIVE_V1:
14058 case CQE_CODE_RECEIVE:
14059 phba->last_completion_time = jiffies;
2d7dbc4c
JS
14060 if (cq->subtype == LPFC_NVMET) {
14061 workposted = lpfc_sli4_nvmet_handle_rcqe(
14062 phba, cq, (struct lpfc_rcqe *)&wcqe);
14063 }
895427bd 14064 break;
4f774513
JS
14065 default:
14066 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 14067 "0144 Not a valid CQE code: x%x\n",
4f774513
JS
14068 bf_get(lpfc_wcqe_c_code, &wcqe));
14069 break;
14070 }
14071 return workposted;
14072}
14073
14074/**
67d12733 14075 * lpfc_sli4_hba_handle_eqe - Process a fast-path event queue entry
4f774513
JS
14076 * @phba: Pointer to HBA context object.
14077 * @eqe: Pointer to fast-path event queue entry.
14078 *
14079 * This routine process a event queue entry from the fast-path event queue.
14080 * It will check the MajorCode and MinorCode to determine this is for a
14081 * completion event on a completion queue, if not, an error shall be logged
14082 * and just return. Otherwise, it will get to the corresponding completion
14083 * queue and process all the entries on the completion queue, rearm the
14084 * completion queue, and then return.
14085 **/
f485c18d 14086static void
32517fc0
JS
14087lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba, struct lpfc_queue *eq,
14088 struct lpfc_eqe *eqe)
4f774513 14089{
895427bd 14090 struct lpfc_queue *cq = NULL;
32517fc0 14091 uint32_t qidx = eq->hdwq;
2d7dbc4c 14092 uint16_t cqid, id;
4f774513 14093
cb5172ea 14094 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
4f774513 14095 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
67d12733 14096 "0366 Not a valid completion "
4f774513 14097 "event: majorcode=x%x, minorcode=x%x\n",
cb5172ea
JS
14098 bf_get_le32(lpfc_eqe_major_code, eqe),
14099 bf_get_le32(lpfc_eqe_minor_code, eqe));
f485c18d 14100 return;
4f774513
JS
14101 }
14102
67d12733
JS
14103 /* Get the reference to the corresponding CQ */
14104 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
14105
6a828b0f
JS
14106 /* Use the fast lookup method first */
14107 if (cqid <= phba->sli4_hba.cq_max) {
14108 cq = phba->sli4_hba.cq_lookup[cqid];
14109 if (cq)
14110 goto work_cq;
cdb42bec
JS
14111 }
14112
14113 /* Next check for NVMET completion */
2d7dbc4c
JS
14114 if (phba->cfg_nvmet_mrq && phba->sli4_hba.nvmet_cqset) {
14115 id = phba->sli4_hba.nvmet_cqset[0]->queue_id;
14116 if ((cqid >= id) && (cqid < (id + phba->cfg_nvmet_mrq))) {
14117 /* Process NVMET unsol rcv */
14118 cq = phba->sli4_hba.nvmet_cqset[cqid - id];
14119 goto process_cq;
14120 }
67d12733
JS
14121 }
14122
895427bd
JS
14123 if (phba->sli4_hba.nvmels_cq &&
14124 (cqid == phba->sli4_hba.nvmels_cq->queue_id)) {
14125 /* Process NVME unsol rcv */
14126 cq = phba->sli4_hba.nvmels_cq;
14127 }
14128
14129 /* Otherwise this is a Slow path event */
14130 if (cq == NULL) {
cdb42bec
JS
14131 lpfc_sli4_sp_handle_eqe(phba, eqe,
14132 phba->sli4_hba.hdwq[qidx].hba_eq);
f485c18d 14133 return;
4f774513
JS
14134 }
14135
895427bd 14136process_cq:
4f774513
JS
14137 if (unlikely(cqid != cq->queue_id)) {
14138 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14139 "0368 Miss-matched fast-path completion "
14140 "queue identifier: eqcqid=%d, fcpcqid=%d\n",
14141 cqid, cq->queue_id);
f485c18d 14142 return;
4f774513
JS
14143 }
14144
6a828b0f 14145work_cq:
d74a89aa
JS
14146#if defined(CONFIG_SCSI_LPFC_DEBUG_FS)
14147 if (phba->ktime_on)
14148 cq->isr_timestamp = ktime_get_ns();
14149 else
14150 cq->isr_timestamp = 0;
14151#endif
45aa312e 14152 if (!queue_work_on(cq->chann, phba->wq, &cq->irqwork))
f485c18d
DK
14153 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14154 "0363 Cannot schedule soft IRQ "
14155 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
d6d189ce 14156 cqid, cq->queue_id, raw_smp_processor_id());
f485c18d
DK
14157}
14158
14159/**
32517fc0
JS
14160 * __lpfc_sli4_hba_process_cq - Process a fast-path event queue entry
14161 * @cq: Pointer to CQ to be processed
f485c18d 14162 *
32517fc0
JS
14163 * This routine calls the cq processing routine with the handler for
14164 * fast path CQEs.
14165 *
14166 * The CQ routine returns two values: the first is the calling status,
14167 * which indicates whether work was queued to the background discovery
14168 * thread. If true, the routine should wakeup the discovery thread;
14169 * the second is the delay parameter. If non-zero, rather than rearming
14170 * the CQ and yet another interrupt, the CQ handler should be queued so
14171 * that it is processed in a subsequent polling action. The value of
14172 * the delay indicates when to reschedule it.
f485c18d
DK
14173 **/
14174static void
32517fc0 14175__lpfc_sli4_hba_process_cq(struct lpfc_queue *cq)
f485c18d 14176{
f485c18d 14177 struct lpfc_hba *phba = cq->phba;
32517fc0 14178 unsigned long delay;
f485c18d 14179 bool workposted = false;
f485c18d 14180
32517fc0
JS
14181 /* process and rearm the CQ */
14182 workposted |= __lpfc_sli4_process_cq(phba, cq, lpfc_sli4_fp_handle_cqe,
14183 &delay);
4f774513 14184
32517fc0
JS
14185 if (delay) {
14186 if (!queue_delayed_work_on(cq->chann, phba->wq,
14187 &cq->sched_irqwork, delay))
14188 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14189 "0367 Cannot schedule soft IRQ "
14190 "for cqid=%d on CPU %d\n",
14191 cq->queue_id, cq->chann);
14192 }
4f774513
JS
14193
14194 /* wake up worker thread if there are works to be done */
14195 if (workposted)
14196 lpfc_worker_wake_up(phba);
14197}
14198
1ba981fd 14199/**
32517fc0
JS
14200 * lpfc_sli4_hba_process_cq - fast-path work handler when started by
14201 * interrupt
14202 * @work: pointer to work element
1ba981fd 14203 *
32517fc0 14204 * translates from the work handler and calls the fast-path handler.
1ba981fd
JS
14205 **/
14206static void
32517fc0 14207lpfc_sli4_hba_process_cq(struct work_struct *work)
1ba981fd 14208{
32517fc0 14209 struct lpfc_queue *cq = container_of(work, struct lpfc_queue, irqwork);
1ba981fd 14210
32517fc0 14211 __lpfc_sli4_hba_process_cq(cq);
1ba981fd
JS
14212}
14213
14214/**
32517fc0
JS
14215 * lpfc_sli4_hba_process_cq - fast-path work handler when started by timer
14216 * @work: pointer to work element
1ba981fd 14217 *
32517fc0 14218 * translates from the work handler and calls the fast-path handler.
1ba981fd 14219 **/
32517fc0
JS
14220static void
14221lpfc_sli4_dly_hba_process_cq(struct work_struct *work)
1ba981fd 14222{
32517fc0
JS
14223 struct lpfc_queue *cq = container_of(to_delayed_work(work),
14224 struct lpfc_queue, sched_irqwork);
1ba981fd 14225
32517fc0 14226 __lpfc_sli4_hba_process_cq(cq);
1ba981fd
JS
14227}
14228
4f774513 14229/**
67d12733 14230 * lpfc_sli4_hba_intr_handler - HBA interrupt handler to SLI-4 device
4f774513
JS
14231 * @irq: Interrupt number.
14232 * @dev_id: The device context pointer.
14233 *
14234 * This function is directly called from the PCI layer as an interrupt
14235 * service routine when device with SLI-4 interface spec is enabled with
14236 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
14237 * ring event in the HBA. However, when the device is enabled with either
14238 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
14239 * device-level interrupt handler. When the PCI slot is in error recovery
14240 * or the HBA is undergoing initialization, the interrupt handler will not
14241 * process the interrupt. The SCSI FCP fast-path ring event are handled in
14242 * the intrrupt context. This function is called without any lock held.
14243 * It gets the hbalock to access and update SLI data structures. Note that,
14244 * the FCP EQ to FCP CQ are one-to-one map such that the FCP EQ index is
14245 * equal to that of FCP CQ index.
14246 *
67d12733
JS
14247 * The link attention and ELS ring attention events are handled
14248 * by the worker thread. The interrupt handler signals the worker thread
14249 * and returns for these events. This function is called without any lock
14250 * held. It gets the hbalock to access and update SLI data structures.
14251 *
4f774513
JS
14252 * This function returns IRQ_HANDLED when interrupt is handled else it
14253 * returns IRQ_NONE.
14254 **/
14255irqreturn_t
67d12733 14256lpfc_sli4_hba_intr_handler(int irq, void *dev_id)
4f774513
JS
14257{
14258 struct lpfc_hba *phba;
895427bd 14259 struct lpfc_hba_eq_hdl *hba_eq_hdl;
4f774513 14260 struct lpfc_queue *fpeq;
4f774513
JS
14261 unsigned long iflag;
14262 int ecount = 0;
895427bd 14263 int hba_eqidx;
32517fc0
JS
14264 struct lpfc_eq_intr_info *eqi;
14265 uint32_t icnt;
4f774513
JS
14266
14267 /* Get the driver's phba structure from the dev_id */
895427bd
JS
14268 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
14269 phba = hba_eq_hdl->phba;
14270 hba_eqidx = hba_eq_hdl->idx;
4f774513
JS
14271
14272 if (unlikely(!phba))
14273 return IRQ_NONE;
cdb42bec 14274 if (unlikely(!phba->sli4_hba.hdwq))
5350d872 14275 return IRQ_NONE;
4f774513
JS
14276
14277 /* Get to the EQ struct associated with this vector */
657add4e 14278 fpeq = phba->sli4_hba.hba_eq_hdl[hba_eqidx].eq;
2e90f4b5
JS
14279 if (unlikely(!fpeq))
14280 return IRQ_NONE;
4f774513
JS
14281
14282 /* Check device state for handling interrupt */
14283 if (unlikely(lpfc_intr_state_check(phba))) {
14284 /* Check again for link_state with lock held */
14285 spin_lock_irqsave(&phba->hbalock, iflag);
14286 if (phba->link_state < LPFC_LINK_DOWN)
14287 /* Flush, clear interrupt, and rearm the EQ */
24c7c0a6 14288 lpfc_sli4_eqcq_flush(phba, fpeq);
4f774513
JS
14289 spin_unlock_irqrestore(&phba->hbalock, iflag);
14290 return IRQ_NONE;
14291 }
14292
32517fc0
JS
14293 eqi = phba->sli4_hba.eq_info;
14294 icnt = this_cpu_inc_return(eqi->icnt);
d6d189ce 14295 fpeq->last_cpu = raw_smp_processor_id();
4f774513 14296
32517fc0 14297 if (icnt > LPFC_EQD_ISR_TRIGGER &&
8156d378 14298 fpeq->q_flag & HBA_EQ_DELAY_CHK &&
32517fc0
JS
14299 phba->cfg_auto_imax &&
14300 fpeq->q_mode != LPFC_MAX_AUTO_EQ_DELAY &&
14301 phba->sli.sli_flag & LPFC_SLI_USE_EQDR)
14302 lpfc_sli4_mod_hba_eq_delay(phba, fpeq, LPFC_MAX_AUTO_EQ_DELAY);
b84daac9 14303
32517fc0
JS
14304 /* process and rearm the EQ */
14305 ecount = lpfc_sli4_process_eq(phba, fpeq);
4f774513
JS
14306
14307 if (unlikely(ecount == 0)) {
b84daac9 14308 fpeq->EQ_no_entry++;
4f774513
JS
14309 if (phba->intr_type == MSIX)
14310 /* MSI-X treated interrupt served as no EQ share INT */
14311 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14312 "0358 MSI-X interrupt with no EQE\n");
14313 else
14314 /* Non MSI-X treated on interrupt as EQ share INT */
14315 return IRQ_NONE;
14316 }
14317
14318 return IRQ_HANDLED;
14319} /* lpfc_sli4_fp_intr_handler */
14320
14321/**
14322 * lpfc_sli4_intr_handler - Device-level interrupt handler for SLI-4 device
14323 * @irq: Interrupt number.
14324 * @dev_id: The device context pointer.
14325 *
14326 * This function is the device-level interrupt handler to device with SLI-4
14327 * interface spec, called from the PCI layer when either MSI or Pin-IRQ
14328 * interrupt mode is enabled and there is an event in the HBA which requires
14329 * driver attention. This function invokes the slow-path interrupt attention
14330 * handling function and fast-path interrupt attention handling function in
14331 * turn to process the relevant HBA attention events. This function is called
14332 * without any lock held. It gets the hbalock to access and update SLI data
14333 * structures.
14334 *
14335 * This function returns IRQ_HANDLED when interrupt is handled, else it
14336 * returns IRQ_NONE.
14337 **/
14338irqreturn_t
14339lpfc_sli4_intr_handler(int irq, void *dev_id)
14340{
14341 struct lpfc_hba *phba;
67d12733
JS
14342 irqreturn_t hba_irq_rc;
14343 bool hba_handled = false;
895427bd 14344 int qidx;
4f774513
JS
14345
14346 /* Get the driver's phba structure from the dev_id */
14347 phba = (struct lpfc_hba *)dev_id;
14348
14349 if (unlikely(!phba))
14350 return IRQ_NONE;
14351
4f774513
JS
14352 /*
14353 * Invoke fast-path host attention interrupt handling as appropriate.
14354 */
6a828b0f 14355 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
67d12733 14356 hba_irq_rc = lpfc_sli4_hba_intr_handler(irq,
895427bd 14357 &phba->sli4_hba.hba_eq_hdl[qidx]);
67d12733
JS
14358 if (hba_irq_rc == IRQ_HANDLED)
14359 hba_handled |= true;
4f774513
JS
14360 }
14361
67d12733 14362 return (hba_handled == true) ? IRQ_HANDLED : IRQ_NONE;
4f774513
JS
14363} /* lpfc_sli4_intr_handler */
14364
14365/**
14366 * lpfc_sli4_queue_free - free a queue structure and associated memory
14367 * @queue: The queue structure to free.
14368 *
b595076a 14369 * This function frees a queue structure and the DMAable memory used for
4f774513
JS
14370 * the host resident queue. This function must be called after destroying the
14371 * queue on the HBA.
14372 **/
14373void
14374lpfc_sli4_queue_free(struct lpfc_queue *queue)
14375{
14376 struct lpfc_dmabuf *dmabuf;
14377
14378 if (!queue)
14379 return;
14380
4645f7b5
JS
14381 if (!list_empty(&queue->wq_list))
14382 list_del(&queue->wq_list);
14383
4f774513
JS
14384 while (!list_empty(&queue->page_list)) {
14385 list_remove_head(&queue->page_list, dmabuf, struct lpfc_dmabuf,
14386 list);
81b96eda 14387 dma_free_coherent(&queue->phba->pcidev->dev, queue->page_size,
4f774513
JS
14388 dmabuf->virt, dmabuf->phys);
14389 kfree(dmabuf);
14390 }
895427bd
JS
14391 if (queue->rqbp) {
14392 lpfc_free_rq_buffer(queue->phba, queue);
14393 kfree(queue->rqbp);
14394 }
d1f525aa 14395
32517fc0
JS
14396 if (!list_empty(&queue->cpu_list))
14397 list_del(&queue->cpu_list);
14398
4f774513
JS
14399 kfree(queue);
14400 return;
14401}
14402
14403/**
14404 * lpfc_sli4_queue_alloc - Allocate and initialize a queue structure
14405 * @phba: The HBA that this queue is being created on.
81b96eda 14406 * @page_size: The size of a queue page
4f774513
JS
14407 * @entry_size: The size of each queue entry for this queue.
14408 * @entry count: The number of entries that this queue will handle.
c1a21ebc 14409 * @cpu: The cpu that will primarily utilize this queue.
4f774513
JS
14410 *
14411 * This function allocates a queue structure and the DMAable memory used for
14412 * the host resident queue. This function must be called before creating the
14413 * queue on the HBA.
14414 **/
14415struct lpfc_queue *
81b96eda 14416lpfc_sli4_queue_alloc(struct lpfc_hba *phba, uint32_t page_size,
c1a21ebc 14417 uint32_t entry_size, uint32_t entry_count, int cpu)
4f774513
JS
14418{
14419 struct lpfc_queue *queue;
14420 struct lpfc_dmabuf *dmabuf;
cb5172ea 14421 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
9afbee3d 14422 uint16_t x, pgcnt;
4f774513 14423
cb5172ea 14424 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 14425 hw_page_size = page_size;
cb5172ea 14426
9afbee3d
JS
14427 pgcnt = ALIGN(entry_size * entry_count, hw_page_size) / hw_page_size;
14428
14429 /* If needed, Adjust page count to match the max the adapter supports */
14430 if (pgcnt > phba->sli4_hba.pc_sli4_params.wqpcnt)
14431 pgcnt = phba->sli4_hba.pc_sli4_params.wqpcnt;
14432
c1a21ebc
JS
14433 queue = kzalloc_node(sizeof(*queue) + (sizeof(void *) * pgcnt),
14434 GFP_KERNEL, cpu_to_node(cpu));
4f774513
JS
14435 if (!queue)
14436 return NULL;
895427bd 14437
4f774513 14438 INIT_LIST_HEAD(&queue->list);
895427bd 14439 INIT_LIST_HEAD(&queue->wq_list);
6e8e1c14 14440 INIT_LIST_HEAD(&queue->wqfull_list);
4f774513
JS
14441 INIT_LIST_HEAD(&queue->page_list);
14442 INIT_LIST_HEAD(&queue->child_list);
32517fc0 14443 INIT_LIST_HEAD(&queue->cpu_list);
81b96eda
JS
14444
14445 /* Set queue parameters now. If the system cannot provide memory
14446 * resources, the free routine needs to know what was allocated.
14447 */
9afbee3d
JS
14448 queue->page_count = pgcnt;
14449 queue->q_pgs = (void **)&queue[1];
14450 queue->entry_cnt_per_pg = hw_page_size / entry_size;
81b96eda
JS
14451 queue->entry_size = entry_size;
14452 queue->entry_count = entry_count;
14453 queue->page_size = hw_page_size;
14454 queue->phba = phba;
14455
9afbee3d 14456 for (x = 0; x < queue->page_count; x++) {
c1a21ebc
JS
14457 dmabuf = kzalloc_node(sizeof(*dmabuf), GFP_KERNEL,
14458 dev_to_node(&phba->pcidev->dev));
4f774513
JS
14459 if (!dmabuf)
14460 goto out_fail;
750afb08
LC
14461 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
14462 hw_page_size, &dmabuf->phys,
14463 GFP_KERNEL);
4f774513
JS
14464 if (!dmabuf->virt) {
14465 kfree(dmabuf);
14466 goto out_fail;
14467 }
14468 dmabuf->buffer_tag = x;
14469 list_add_tail(&dmabuf->list, &queue->page_list);
9afbee3d
JS
14470 /* use lpfc_sli4_qe to index a paritcular entry in this page */
14471 queue->q_pgs[x] = dmabuf->virt;
4f774513 14472 }
f485c18d
DK
14473 INIT_WORK(&queue->irqwork, lpfc_sli4_hba_process_cq);
14474 INIT_WORK(&queue->spwork, lpfc_sli4_sp_process_cq);
32517fc0
JS
14475 INIT_DELAYED_WORK(&queue->sched_irqwork, lpfc_sli4_dly_hba_process_cq);
14476 INIT_DELAYED_WORK(&queue->sched_spwork, lpfc_sli4_dly_sp_process_cq);
4f774513 14477
32517fc0 14478 /* notify_interval will be set during q creation */
64eb4dcb 14479
4f774513
JS
14480 return queue;
14481out_fail:
14482 lpfc_sli4_queue_free(queue);
14483 return NULL;
14484}
14485
962bc51b
JS
14486/**
14487 * lpfc_dual_chute_pci_bar_map - Map pci base address register to host memory
14488 * @phba: HBA structure that indicates port to create a queue on.
14489 * @pci_barset: PCI BAR set flag.
14490 *
14491 * This function shall perform iomap of the specified PCI BAR address to host
14492 * memory address if not already done so and return it. The returned host
14493 * memory address can be NULL.
14494 */
14495static void __iomem *
14496lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset)
14497{
962bc51b
JS
14498 if (!phba->pcidev)
14499 return NULL;
962bc51b
JS
14500
14501 switch (pci_barset) {
14502 case WQ_PCI_BAR_0_AND_1:
962bc51b
JS
14503 return phba->pci_bar0_memmap_p;
14504 case WQ_PCI_BAR_2_AND_3:
962bc51b
JS
14505 return phba->pci_bar2_memmap_p;
14506 case WQ_PCI_BAR_4_AND_5:
962bc51b
JS
14507 return phba->pci_bar4_memmap_p;
14508 default:
14509 break;
14510 }
14511 return NULL;
14512}
14513
173edbb2 14514/**
cb733e35
JS
14515 * lpfc_modify_hba_eq_delay - Modify Delay Multiplier on EQs
14516 * @phba: HBA structure that EQs are on.
14517 * @startq: The starting EQ index to modify
14518 * @numq: The number of EQs (consecutive indexes) to modify
14519 * @usdelay: amount of delay
173edbb2 14520 *
cb733e35
JS
14521 * This function revises the EQ delay on 1 or more EQs. The EQ delay
14522 * is set either by writing to a register (if supported by the SLI Port)
14523 * or by mailbox command. The mailbox command allows several EQs to be
14524 * updated at once.
173edbb2 14525 *
cb733e35
JS
14526 * The @phba struct is used to send a mailbox command to HBA. The @startq
14527 * is used to get the starting EQ index to change. The @numq value is
14528 * used to specify how many consecutive EQ indexes, starting at EQ index,
14529 * are to be changed. This function is asynchronous and will wait for any
14530 * mailbox commands to finish before returning.
173edbb2 14531 *
cb733e35
JS
14532 * On success this function will return a zero. If unable to allocate
14533 * enough memory this function will return -ENOMEM. If a mailbox command
14534 * fails this function will return -ENXIO. Note: on ENXIO, some EQs may
14535 * have had their delay multipler changed.
173edbb2 14536 **/
cb733e35 14537void
0cf07f84 14538lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
cb733e35 14539 uint32_t numq, uint32_t usdelay)
173edbb2
JS
14540{
14541 struct lpfc_mbx_modify_eq_delay *eq_delay;
14542 LPFC_MBOXQ_t *mbox;
14543 struct lpfc_queue *eq;
cb733e35 14544 int cnt = 0, rc, length;
173edbb2 14545 uint32_t shdr_status, shdr_add_status;
cb733e35 14546 uint32_t dmult;
895427bd 14547 int qidx;
173edbb2 14548 union lpfc_sli4_cfg_shdr *shdr;
173edbb2 14549
6a828b0f 14550 if (startq >= phba->cfg_irq_chann)
cb733e35
JS
14551 return;
14552
14553 if (usdelay > 0xFFFF) {
14554 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP | LOG_NVME,
14555 "6429 usdelay %d too large. Scaled down to "
14556 "0xFFFF.\n", usdelay);
14557 usdelay = 0xFFFF;
14558 }
14559
14560 /* set values by EQ_DELAY register if supported */
14561 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
14562 for (qidx = startq; qidx < phba->cfg_irq_chann; qidx++) {
657add4e 14563 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
cb733e35
JS
14564 if (!eq)
14565 continue;
14566
32517fc0 14567 lpfc_sli4_mod_hba_eq_delay(phba, eq, usdelay);
cb733e35
JS
14568
14569 if (++cnt >= numq)
14570 break;
14571 }
cb733e35
JS
14572 return;
14573 }
14574
14575 /* Otherwise, set values by mailbox cmd */
173edbb2
JS
14576
14577 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
cb733e35
JS
14578 if (!mbox) {
14579 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_FCP | LOG_NVME,
14580 "6428 Failed allocating mailbox cmd buffer."
14581 " EQ delay was not set.\n");
14582 return;
14583 }
173edbb2
JS
14584 length = (sizeof(struct lpfc_mbx_modify_eq_delay) -
14585 sizeof(struct lpfc_sli4_cfg_mhdr));
14586 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14587 LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY,
14588 length, LPFC_SLI4_MBX_EMBED);
14589 eq_delay = &mbox->u.mqe.un.eq_delay;
14590
14591 /* Calculate delay multiper from maximum interrupt per second */
cb733e35
JS
14592 dmult = (usdelay * LPFC_DMULT_CONST) / LPFC_SEC_TO_USEC;
14593 if (dmult)
14594 dmult--;
0cf07f84
JS
14595 if (dmult > LPFC_DMULT_MAX)
14596 dmult = LPFC_DMULT_MAX;
173edbb2 14597
6a828b0f 14598 for (qidx = startq; qidx < phba->cfg_irq_chann; qidx++) {
657add4e 14599 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
173edbb2
JS
14600 if (!eq)
14601 continue;
cb733e35 14602 eq->q_mode = usdelay;
173edbb2
JS
14603 eq_delay->u.request.eq[cnt].eq_id = eq->queue_id;
14604 eq_delay->u.request.eq[cnt].phase = 0;
14605 eq_delay->u.request.eq[cnt].delay_multi = dmult;
0cf07f84 14606
cb733e35 14607 if (++cnt >= numq)
173edbb2
JS
14608 break;
14609 }
14610 eq_delay->u.request.num_eq = cnt;
14611
14612 mbox->vport = phba->pport;
14613 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
14614 mbox->ctx_buf = NULL;
14615 mbox->ctx_ndlp = NULL;
173edbb2
JS
14616 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14617 shdr = (union lpfc_sli4_cfg_shdr *) &eq_delay->header.cfg_shdr;
14618 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14619 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14620 if (shdr_status || shdr_add_status || rc) {
14621 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14622 "2512 MODIFY_EQ_DELAY mailbox failed with "
14623 "status x%x add_status x%x, mbx status x%x\n",
14624 shdr_status, shdr_add_status, rc);
173edbb2
JS
14625 }
14626 mempool_free(mbox, phba->mbox_mem_pool);
cb733e35 14627 return;
173edbb2
JS
14628}
14629
4f774513
JS
14630/**
14631 * lpfc_eq_create - Create an Event Queue on the HBA
14632 * @phba: HBA structure that indicates port to create a queue on.
14633 * @eq: The queue structure to use to create the event queue.
14634 * @imax: The maximum interrupt per second limit.
14635 *
14636 * This function creates an event queue, as detailed in @eq, on a port,
14637 * described by @phba by sending an EQ_CREATE mailbox command to the HBA.
14638 *
14639 * The @phba struct is used to send mailbox command to HBA. The @eq struct
14640 * is used to get the entry count and entry size that are necessary to
14641 * determine the number of pages to allocate and use for this queue. This
14642 * function will send the EQ_CREATE mailbox command to the HBA to setup the
14643 * event queue. This function is asynchronous and will wait for the mailbox
14644 * command to finish before continuing.
14645 *
14646 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14647 * memory this function will return -ENOMEM. If the queue create mailbox command
14648 * fails this function will return -ENXIO.
4f774513 14649 **/
a2fc4aef 14650int
ee02006b 14651lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
4f774513
JS
14652{
14653 struct lpfc_mbx_eq_create *eq_create;
14654 LPFC_MBOXQ_t *mbox;
14655 int rc, length, status = 0;
14656 struct lpfc_dmabuf *dmabuf;
14657 uint32_t shdr_status, shdr_add_status;
14658 union lpfc_sli4_cfg_shdr *shdr;
14659 uint16_t dmult;
49198b37
JS
14660 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14661
2e90f4b5
JS
14662 /* sanity check on queue memory */
14663 if (!eq)
14664 return -ENODEV;
49198b37
JS
14665 if (!phba->sli4_hba.pc_sli4_params.supported)
14666 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
14667
14668 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14669 if (!mbox)
14670 return -ENOMEM;
14671 length = (sizeof(struct lpfc_mbx_eq_create) -
14672 sizeof(struct lpfc_sli4_cfg_mhdr));
14673 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14674 LPFC_MBOX_OPCODE_EQ_CREATE,
14675 length, LPFC_SLI4_MBX_EMBED);
14676 eq_create = &mbox->u.mqe.un.eq_create;
7365f6fd 14677 shdr = (union lpfc_sli4_cfg_shdr *) &eq_create->header.cfg_shdr;
4f774513
JS
14678 bf_set(lpfc_mbx_eq_create_num_pages, &eq_create->u.request,
14679 eq->page_count);
14680 bf_set(lpfc_eq_context_size, &eq_create->u.request.context,
14681 LPFC_EQE_SIZE);
14682 bf_set(lpfc_eq_context_valid, &eq_create->u.request.context, 1);
7365f6fd
JS
14683
14684 /* Use version 2 of CREATE_EQ if eqav is set */
14685 if (phba->sli4_hba.pc_sli4_params.eqav) {
14686 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14687 LPFC_Q_CREATE_VERSION_2);
14688 bf_set(lpfc_eq_context_autovalid, &eq_create->u.request.context,
14689 phba->sli4_hba.pc_sli4_params.eqav);
14690 }
14691
2c9c5a00
JS
14692 /* don't setup delay multiplier using EQ_CREATE */
14693 dmult = 0;
4f774513
JS
14694 bf_set(lpfc_eq_context_delay_multi, &eq_create->u.request.context,
14695 dmult);
14696 switch (eq->entry_count) {
14697 default:
14698 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14699 "0360 Unsupported EQ count. (%d)\n",
14700 eq->entry_count);
04d210c9
JS
14701 if (eq->entry_count < 256) {
14702 status = -EINVAL;
14703 goto out;
14704 }
5bd5f66c 14705 /* fall through - otherwise default to smallest count */
4f774513
JS
14706 case 256:
14707 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14708 LPFC_EQ_CNT_256);
14709 break;
14710 case 512:
14711 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14712 LPFC_EQ_CNT_512);
14713 break;
14714 case 1024:
14715 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14716 LPFC_EQ_CNT_1024);
14717 break;
14718 case 2048:
14719 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14720 LPFC_EQ_CNT_2048);
14721 break;
14722 case 4096:
14723 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14724 LPFC_EQ_CNT_4096);
14725 break;
14726 }
14727 list_for_each_entry(dmabuf, &eq->page_list, list) {
49198b37 14728 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
14729 eq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
14730 putPaddrLow(dmabuf->phys);
14731 eq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
14732 putPaddrHigh(dmabuf->phys);
14733 }
14734 mbox->vport = phba->pport;
14735 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
14736 mbox->ctx_buf = NULL;
14737 mbox->ctx_ndlp = NULL;
4f774513 14738 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
4f774513
JS
14739 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14740 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14741 if (shdr_status || shdr_add_status || rc) {
14742 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14743 "2500 EQ_CREATE mailbox failed with "
14744 "status x%x add_status x%x, mbx status x%x\n",
14745 shdr_status, shdr_add_status, rc);
14746 status = -ENXIO;
14747 }
14748 eq->type = LPFC_EQ;
14749 eq->subtype = LPFC_NONE;
14750 eq->queue_id = bf_get(lpfc_mbx_eq_create_q_id, &eq_create->u.response);
14751 if (eq->queue_id == 0xFFFF)
14752 status = -ENXIO;
14753 eq->host_index = 0;
32517fc0
JS
14754 eq->notify_interval = LPFC_EQ_NOTIFY_INTRVL;
14755 eq->max_proc_limit = LPFC_EQ_MAX_PROC_LIMIT;
04d210c9 14756out:
8fa38513 14757 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
14758 return status;
14759}
14760
14761/**
14762 * lpfc_cq_create - Create a Completion Queue on the HBA
14763 * @phba: HBA structure that indicates port to create a queue on.
14764 * @cq: The queue structure to use to create the completion queue.
14765 * @eq: The event queue to bind this completion queue to.
14766 *
14767 * This function creates a completion queue, as detailed in @wq, on a port,
14768 * described by @phba by sending a CQ_CREATE mailbox command to the HBA.
14769 *
14770 * The @phba struct is used to send mailbox command to HBA. The @cq struct
14771 * is used to get the entry count and entry size that are necessary to
14772 * determine the number of pages to allocate and use for this queue. The @eq
14773 * is used to indicate which event queue to bind this completion queue to. This
14774 * function will send the CQ_CREATE mailbox command to the HBA to setup the
14775 * completion queue. This function is asynchronous and will wait for the mailbox
14776 * command to finish before continuing.
14777 *
14778 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14779 * memory this function will return -ENOMEM. If the queue create mailbox command
14780 * fails this function will return -ENXIO.
4f774513 14781 **/
a2fc4aef 14782int
4f774513
JS
14783lpfc_cq_create(struct lpfc_hba *phba, struct lpfc_queue *cq,
14784 struct lpfc_queue *eq, uint32_t type, uint32_t subtype)
14785{
14786 struct lpfc_mbx_cq_create *cq_create;
14787 struct lpfc_dmabuf *dmabuf;
14788 LPFC_MBOXQ_t *mbox;
14789 int rc, length, status = 0;
14790 uint32_t shdr_status, shdr_add_status;
14791 union lpfc_sli4_cfg_shdr *shdr;
49198b37 14792
2e90f4b5
JS
14793 /* sanity check on queue memory */
14794 if (!cq || !eq)
14795 return -ENODEV;
49198b37 14796
4f774513
JS
14797 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14798 if (!mbox)
14799 return -ENOMEM;
14800 length = (sizeof(struct lpfc_mbx_cq_create) -
14801 sizeof(struct lpfc_sli4_cfg_mhdr));
14802 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14803 LPFC_MBOX_OPCODE_CQ_CREATE,
14804 length, LPFC_SLI4_MBX_EMBED);
14805 cq_create = &mbox->u.mqe.un.cq_create;
5a6f133e 14806 shdr = (union lpfc_sli4_cfg_shdr *) &cq_create->header.cfg_shdr;
4f774513
JS
14807 bf_set(lpfc_mbx_cq_create_num_pages, &cq_create->u.request,
14808 cq->page_count);
14809 bf_set(lpfc_cq_context_event, &cq_create->u.request.context, 1);
14810 bf_set(lpfc_cq_context_valid, &cq_create->u.request.context, 1);
5a6f133e
JS
14811 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14812 phba->sli4_hba.pc_sli4_params.cqv);
14813 if (phba->sli4_hba.pc_sli4_params.cqv == LPFC_Q_CREATE_VERSION_2) {
81b96eda
JS
14814 bf_set(lpfc_mbx_cq_create_page_size, &cq_create->u.request,
14815 (cq->page_size / SLI4_PAGE_SIZE));
5a6f133e
JS
14816 bf_set(lpfc_cq_eq_id_2, &cq_create->u.request.context,
14817 eq->queue_id);
7365f6fd
JS
14818 bf_set(lpfc_cq_context_autovalid, &cq_create->u.request.context,
14819 phba->sli4_hba.pc_sli4_params.cqav);
5a6f133e
JS
14820 } else {
14821 bf_set(lpfc_cq_eq_id, &cq_create->u.request.context,
14822 eq->queue_id);
14823 }
4f774513 14824 switch (cq->entry_count) {
81b96eda
JS
14825 case 2048:
14826 case 4096:
14827 if (phba->sli4_hba.pc_sli4_params.cqv ==
14828 LPFC_Q_CREATE_VERSION_2) {
14829 cq_create->u.request.context.lpfc_cq_context_count =
14830 cq->entry_count;
14831 bf_set(lpfc_cq_context_count,
14832 &cq_create->u.request.context,
14833 LPFC_CQ_CNT_WORD7);
14834 break;
14835 }
5bd5f66c 14836 /* fall through */
4f774513
JS
14837 default:
14838 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2ea259ee 14839 "0361 Unsupported CQ count: "
64eb4dcb 14840 "entry cnt %d sz %d pg cnt %d\n",
2ea259ee 14841 cq->entry_count, cq->entry_size,
64eb4dcb 14842 cq->page_count);
4f4c1863
JS
14843 if (cq->entry_count < 256) {
14844 status = -EINVAL;
14845 goto out;
14846 }
5bd5f66c 14847 /* fall through - otherwise default to smallest count */
4f774513
JS
14848 case 256:
14849 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14850 LPFC_CQ_CNT_256);
14851 break;
14852 case 512:
14853 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14854 LPFC_CQ_CNT_512);
14855 break;
14856 case 1024:
14857 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14858 LPFC_CQ_CNT_1024);
14859 break;
14860 }
14861 list_for_each_entry(dmabuf, &cq->page_list, list) {
81b96eda 14862 memset(dmabuf->virt, 0, cq->page_size);
4f774513
JS
14863 cq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
14864 putPaddrLow(dmabuf->phys);
14865 cq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
14866 putPaddrHigh(dmabuf->phys);
14867 }
14868 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14869
14870 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
14871 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14872 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14873 if (shdr_status || shdr_add_status || rc) {
14874 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14875 "2501 CQ_CREATE mailbox failed with "
14876 "status x%x add_status x%x, mbx status x%x\n",
14877 shdr_status, shdr_add_status, rc);
14878 status = -ENXIO;
14879 goto out;
14880 }
14881 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
14882 if (cq->queue_id == 0xFFFF) {
14883 status = -ENXIO;
14884 goto out;
14885 }
14886 /* link the cq onto the parent eq child list */
14887 list_add_tail(&cq->list, &eq->child_list);
14888 /* Set up completion queue's type and subtype */
14889 cq->type = type;
14890 cq->subtype = subtype;
14891 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
2a622bfb 14892 cq->assoc_qid = eq->queue_id;
6a828b0f 14893 cq->assoc_qp = eq;
4f774513 14894 cq->host_index = 0;
32517fc0
JS
14895 cq->notify_interval = LPFC_CQ_NOTIFY_INTRVL;
14896 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit, cq->entry_count);
4f774513 14897
6a828b0f
JS
14898 if (cq->queue_id > phba->sli4_hba.cq_max)
14899 phba->sli4_hba.cq_max = cq->queue_id;
8fa38513
JS
14900out:
14901 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
14902 return status;
14903}
14904
2d7dbc4c
JS
14905/**
14906 * lpfc_cq_create_set - Create a set of Completion Queues on the HBA for MRQ
14907 * @phba: HBA structure that indicates port to create a queue on.
14908 * @cqp: The queue structure array to use to create the completion queues.
cdb42bec 14909 * @hdwq: The hardware queue array with the EQ to bind completion queues to.
2d7dbc4c
JS
14910 *
14911 * This function creates a set of completion queue, s to support MRQ
14912 * as detailed in @cqp, on a port,
14913 * described by @phba by sending a CREATE_CQ_SET mailbox command to the HBA.
14914 *
14915 * The @phba struct is used to send mailbox command to HBA. The @cq struct
14916 * is used to get the entry count and entry size that are necessary to
14917 * determine the number of pages to allocate and use for this queue. The @eq
14918 * is used to indicate which event queue to bind this completion queue to. This
14919 * function will send the CREATE_CQ_SET mailbox command to the HBA to setup the
14920 * completion queue. This function is asynchronous and will wait for the mailbox
14921 * command to finish before continuing.
14922 *
14923 * On success this function will return a zero. If unable to allocate enough
14924 * memory this function will return -ENOMEM. If the queue create mailbox command
14925 * fails this function will return -ENXIO.
14926 **/
14927int
14928lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
cdb42bec
JS
14929 struct lpfc_sli4_hdw_queue *hdwq, uint32_t type,
14930 uint32_t subtype)
2d7dbc4c
JS
14931{
14932 struct lpfc_queue *cq;
14933 struct lpfc_queue *eq;
14934 struct lpfc_mbx_cq_create_set *cq_set;
14935 struct lpfc_dmabuf *dmabuf;
14936 LPFC_MBOXQ_t *mbox;
14937 int rc, length, alloclen, status = 0;
14938 int cnt, idx, numcq, page_idx = 0;
14939 uint32_t shdr_status, shdr_add_status;
14940 union lpfc_sli4_cfg_shdr *shdr;
14941 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14942
14943 /* sanity check on queue memory */
14944 numcq = phba->cfg_nvmet_mrq;
cdb42bec 14945 if (!cqp || !hdwq || !numcq)
2d7dbc4c 14946 return -ENODEV;
2d7dbc4c
JS
14947
14948 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14949 if (!mbox)
14950 return -ENOMEM;
14951
14952 length = sizeof(struct lpfc_mbx_cq_create_set);
14953 length += ((numcq * cqp[0]->page_count) *
14954 sizeof(struct dma_address));
14955 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
14956 LPFC_MBOX_OPCODE_FCOE_CQ_CREATE_SET, length,
14957 LPFC_SLI4_MBX_NEMBED);
14958 if (alloclen < length) {
14959 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14960 "3098 Allocated DMA memory size (%d) is "
14961 "less than the requested DMA memory size "
14962 "(%d)\n", alloclen, length);
14963 status = -ENOMEM;
14964 goto out;
14965 }
14966 cq_set = mbox->sge_array->addr[0];
14967 shdr = (union lpfc_sli4_cfg_shdr *)&cq_set->cfg_shdr;
14968 bf_set(lpfc_mbox_hdr_version, &shdr->request, 0);
14969
14970 for (idx = 0; idx < numcq; idx++) {
14971 cq = cqp[idx];
cdb42bec 14972 eq = hdwq[idx].hba_eq;
2d7dbc4c
JS
14973 if (!cq || !eq) {
14974 status = -ENOMEM;
14975 goto out;
14976 }
81b96eda
JS
14977 if (!phba->sli4_hba.pc_sli4_params.supported)
14978 hw_page_size = cq->page_size;
2d7dbc4c
JS
14979
14980 switch (idx) {
14981 case 0:
14982 bf_set(lpfc_mbx_cq_create_set_page_size,
14983 &cq_set->u.request,
14984 (hw_page_size / SLI4_PAGE_SIZE));
14985 bf_set(lpfc_mbx_cq_create_set_num_pages,
14986 &cq_set->u.request, cq->page_count);
14987 bf_set(lpfc_mbx_cq_create_set_evt,
14988 &cq_set->u.request, 1);
14989 bf_set(lpfc_mbx_cq_create_set_valid,
14990 &cq_set->u.request, 1);
14991 bf_set(lpfc_mbx_cq_create_set_cqe_size,
14992 &cq_set->u.request, 0);
14993 bf_set(lpfc_mbx_cq_create_set_num_cq,
14994 &cq_set->u.request, numcq);
7365f6fd
JS
14995 bf_set(lpfc_mbx_cq_create_set_autovalid,
14996 &cq_set->u.request,
14997 phba->sli4_hba.pc_sli4_params.cqav);
2d7dbc4c 14998 switch (cq->entry_count) {
81b96eda
JS
14999 case 2048:
15000 case 4096:
15001 if (phba->sli4_hba.pc_sli4_params.cqv ==
15002 LPFC_Q_CREATE_VERSION_2) {
15003 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15004 &cq_set->u.request,
15005 cq->entry_count);
15006 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15007 &cq_set->u.request,
15008 LPFC_CQ_CNT_WORD7);
15009 break;
15010 }
5bd5f66c 15011 /* fall through */
2d7dbc4c
JS
15012 default:
15013 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15014 "3118 Bad CQ count. (%d)\n",
15015 cq->entry_count);
15016 if (cq->entry_count < 256) {
15017 status = -EINVAL;
15018 goto out;
15019 }
5bd5f66c 15020 /* fall through - otherwise default to smallest */
2d7dbc4c
JS
15021 case 256:
15022 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15023 &cq_set->u.request, LPFC_CQ_CNT_256);
15024 break;
15025 case 512:
15026 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15027 &cq_set->u.request, LPFC_CQ_CNT_512);
15028 break;
15029 case 1024:
15030 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15031 &cq_set->u.request, LPFC_CQ_CNT_1024);
15032 break;
15033 }
15034 bf_set(lpfc_mbx_cq_create_set_eq_id0,
15035 &cq_set->u.request, eq->queue_id);
15036 break;
15037 case 1:
15038 bf_set(lpfc_mbx_cq_create_set_eq_id1,
15039 &cq_set->u.request, eq->queue_id);
15040 break;
15041 case 2:
15042 bf_set(lpfc_mbx_cq_create_set_eq_id2,
15043 &cq_set->u.request, eq->queue_id);
15044 break;
15045 case 3:
15046 bf_set(lpfc_mbx_cq_create_set_eq_id3,
15047 &cq_set->u.request, eq->queue_id);
15048 break;
15049 case 4:
15050 bf_set(lpfc_mbx_cq_create_set_eq_id4,
15051 &cq_set->u.request, eq->queue_id);
15052 break;
15053 case 5:
15054 bf_set(lpfc_mbx_cq_create_set_eq_id5,
15055 &cq_set->u.request, eq->queue_id);
15056 break;
15057 case 6:
15058 bf_set(lpfc_mbx_cq_create_set_eq_id6,
15059 &cq_set->u.request, eq->queue_id);
15060 break;
15061 case 7:
15062 bf_set(lpfc_mbx_cq_create_set_eq_id7,
15063 &cq_set->u.request, eq->queue_id);
15064 break;
15065 case 8:
15066 bf_set(lpfc_mbx_cq_create_set_eq_id8,
15067 &cq_set->u.request, eq->queue_id);
15068 break;
15069 case 9:
15070 bf_set(lpfc_mbx_cq_create_set_eq_id9,
15071 &cq_set->u.request, eq->queue_id);
15072 break;
15073 case 10:
15074 bf_set(lpfc_mbx_cq_create_set_eq_id10,
15075 &cq_set->u.request, eq->queue_id);
15076 break;
15077 case 11:
15078 bf_set(lpfc_mbx_cq_create_set_eq_id11,
15079 &cq_set->u.request, eq->queue_id);
15080 break;
15081 case 12:
15082 bf_set(lpfc_mbx_cq_create_set_eq_id12,
15083 &cq_set->u.request, eq->queue_id);
15084 break;
15085 case 13:
15086 bf_set(lpfc_mbx_cq_create_set_eq_id13,
15087 &cq_set->u.request, eq->queue_id);
15088 break;
15089 case 14:
15090 bf_set(lpfc_mbx_cq_create_set_eq_id14,
15091 &cq_set->u.request, eq->queue_id);
15092 break;
15093 case 15:
15094 bf_set(lpfc_mbx_cq_create_set_eq_id15,
15095 &cq_set->u.request, eq->queue_id);
15096 break;
15097 }
15098
15099 /* link the cq onto the parent eq child list */
15100 list_add_tail(&cq->list, &eq->child_list);
15101 /* Set up completion queue's type and subtype */
15102 cq->type = type;
15103 cq->subtype = subtype;
15104 cq->assoc_qid = eq->queue_id;
6a828b0f 15105 cq->assoc_qp = eq;
2d7dbc4c 15106 cq->host_index = 0;
32517fc0
JS
15107 cq->notify_interval = LPFC_CQ_NOTIFY_INTRVL;
15108 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit,
15109 cq->entry_count);
81b96eda 15110 cq->chann = idx;
2d7dbc4c
JS
15111
15112 rc = 0;
15113 list_for_each_entry(dmabuf, &cq->page_list, list) {
15114 memset(dmabuf->virt, 0, hw_page_size);
15115 cnt = page_idx + dmabuf->buffer_tag;
15116 cq_set->u.request.page[cnt].addr_lo =
15117 putPaddrLow(dmabuf->phys);
15118 cq_set->u.request.page[cnt].addr_hi =
15119 putPaddrHigh(dmabuf->phys);
15120 rc++;
15121 }
15122 page_idx += rc;
15123 }
15124
15125 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15126
15127 /* The IOCTL status is embedded in the mailbox subheader. */
15128 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15129 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15130 if (shdr_status || shdr_add_status || rc) {
15131 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15132 "3119 CQ_CREATE_SET mailbox failed with "
15133 "status x%x add_status x%x, mbx status x%x\n",
15134 shdr_status, shdr_add_status, rc);
15135 status = -ENXIO;
15136 goto out;
15137 }
15138 rc = bf_get(lpfc_mbx_cq_create_set_base_id, &cq_set->u.response);
15139 if (rc == 0xFFFF) {
15140 status = -ENXIO;
15141 goto out;
15142 }
15143
15144 for (idx = 0; idx < numcq; idx++) {
15145 cq = cqp[idx];
15146 cq->queue_id = rc + idx;
6a828b0f
JS
15147 if (cq->queue_id > phba->sli4_hba.cq_max)
15148 phba->sli4_hba.cq_max = cq->queue_id;
2d7dbc4c
JS
15149 }
15150
15151out:
15152 lpfc_sli4_mbox_cmd_free(phba, mbox);
15153 return status;
15154}
15155
b19a061a
JS
15156/**
15157 * lpfc_mq_create_fb_init - Send MCC_CREATE without async events registration
15158 * @phba: HBA structure that indicates port to create a queue on.
15159 * @mq: The queue structure to use to create the mailbox queue.
15160 * @mbox: An allocated pointer to type LPFC_MBOXQ_t
15161 * @cq: The completion queue to associate with this cq.
15162 *
15163 * This function provides failback (fb) functionality when the
15164 * mq_create_ext fails on older FW generations. It's purpose is identical
15165 * to mq_create_ext otherwise.
15166 *
15167 * This routine cannot fail as all attributes were previously accessed and
15168 * initialized in mq_create_ext.
15169 **/
15170static void
15171lpfc_mq_create_fb_init(struct lpfc_hba *phba, struct lpfc_queue *mq,
15172 LPFC_MBOXQ_t *mbox, struct lpfc_queue *cq)
15173{
15174 struct lpfc_mbx_mq_create *mq_create;
15175 struct lpfc_dmabuf *dmabuf;
15176 int length;
15177
15178 length = (sizeof(struct lpfc_mbx_mq_create) -
15179 sizeof(struct lpfc_sli4_cfg_mhdr));
15180 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15181 LPFC_MBOX_OPCODE_MQ_CREATE,
15182 length, LPFC_SLI4_MBX_EMBED);
15183 mq_create = &mbox->u.mqe.un.mq_create;
15184 bf_set(lpfc_mbx_mq_create_num_pages, &mq_create->u.request,
15185 mq->page_count);
15186 bf_set(lpfc_mq_context_cq_id, &mq_create->u.request.context,
15187 cq->queue_id);
15188 bf_set(lpfc_mq_context_valid, &mq_create->u.request.context, 1);
15189 switch (mq->entry_count) {
15190 case 16:
5a6f133e
JS
15191 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15192 LPFC_MQ_RING_SIZE_16);
b19a061a
JS
15193 break;
15194 case 32:
5a6f133e
JS
15195 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15196 LPFC_MQ_RING_SIZE_32);
b19a061a
JS
15197 break;
15198 case 64:
5a6f133e
JS
15199 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15200 LPFC_MQ_RING_SIZE_64);
b19a061a
JS
15201 break;
15202 case 128:
5a6f133e
JS
15203 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15204 LPFC_MQ_RING_SIZE_128);
b19a061a
JS
15205 break;
15206 }
15207 list_for_each_entry(dmabuf, &mq->page_list, list) {
15208 mq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15209 putPaddrLow(dmabuf->phys);
15210 mq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15211 putPaddrHigh(dmabuf->phys);
15212 }
15213}
15214
04c68496
JS
15215/**
15216 * lpfc_mq_create - Create a mailbox Queue on the HBA
15217 * @phba: HBA structure that indicates port to create a queue on.
15218 * @mq: The queue structure to use to create the mailbox queue.
b19a061a
JS
15219 * @cq: The completion queue to associate with this cq.
15220 * @subtype: The queue's subtype.
04c68496
JS
15221 *
15222 * This function creates a mailbox queue, as detailed in @mq, on a port,
15223 * described by @phba by sending a MQ_CREATE mailbox command to the HBA.
15224 *
15225 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15226 * is used to get the entry count and entry size that are necessary to
15227 * determine the number of pages to allocate and use for this queue. This
15228 * function will send the MQ_CREATE mailbox command to the HBA to setup the
15229 * mailbox queue. This function is asynchronous and will wait for the mailbox
15230 * command to finish before continuing.
15231 *
15232 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15233 * memory this function will return -ENOMEM. If the queue create mailbox command
15234 * fails this function will return -ENXIO.
04c68496 15235 **/
b19a061a 15236int32_t
04c68496
JS
15237lpfc_mq_create(struct lpfc_hba *phba, struct lpfc_queue *mq,
15238 struct lpfc_queue *cq, uint32_t subtype)
15239{
15240 struct lpfc_mbx_mq_create *mq_create;
b19a061a 15241 struct lpfc_mbx_mq_create_ext *mq_create_ext;
04c68496
JS
15242 struct lpfc_dmabuf *dmabuf;
15243 LPFC_MBOXQ_t *mbox;
15244 int rc, length, status = 0;
15245 uint32_t shdr_status, shdr_add_status;
15246 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15247 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
04c68496 15248
2e90f4b5
JS
15249 /* sanity check on queue memory */
15250 if (!mq || !cq)
15251 return -ENODEV;
49198b37
JS
15252 if (!phba->sli4_hba.pc_sli4_params.supported)
15253 hw_page_size = SLI4_PAGE_SIZE;
b19a061a 15254
04c68496
JS
15255 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15256 if (!mbox)
15257 return -ENOMEM;
b19a061a 15258 length = (sizeof(struct lpfc_mbx_mq_create_ext) -
04c68496
JS
15259 sizeof(struct lpfc_sli4_cfg_mhdr));
15260 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
b19a061a 15261 LPFC_MBOX_OPCODE_MQ_CREATE_EXT,
04c68496 15262 length, LPFC_SLI4_MBX_EMBED);
b19a061a
JS
15263
15264 mq_create_ext = &mbox->u.mqe.un.mq_create_ext;
5a6f133e 15265 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create_ext->header.cfg_shdr;
70f3c073
JS
15266 bf_set(lpfc_mbx_mq_create_ext_num_pages,
15267 &mq_create_ext->u.request, mq->page_count);
15268 bf_set(lpfc_mbx_mq_create_ext_async_evt_link,
15269 &mq_create_ext->u.request, 1);
15270 bf_set(lpfc_mbx_mq_create_ext_async_evt_fip,
b19a061a
JS
15271 &mq_create_ext->u.request, 1);
15272 bf_set(lpfc_mbx_mq_create_ext_async_evt_group5,
15273 &mq_create_ext->u.request, 1);
70f3c073
JS
15274 bf_set(lpfc_mbx_mq_create_ext_async_evt_fc,
15275 &mq_create_ext->u.request, 1);
15276 bf_set(lpfc_mbx_mq_create_ext_async_evt_sli,
15277 &mq_create_ext->u.request, 1);
b19a061a 15278 bf_set(lpfc_mq_context_valid, &mq_create_ext->u.request.context, 1);
5a6f133e
JS
15279 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15280 phba->sli4_hba.pc_sli4_params.mqv);
15281 if (phba->sli4_hba.pc_sli4_params.mqv == LPFC_Q_CREATE_VERSION_1)
15282 bf_set(lpfc_mbx_mq_create_ext_cq_id, &mq_create_ext->u.request,
15283 cq->queue_id);
15284 else
15285 bf_set(lpfc_mq_context_cq_id, &mq_create_ext->u.request.context,
15286 cq->queue_id);
04c68496
JS
15287 switch (mq->entry_count) {
15288 default:
15289 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15290 "0362 Unsupported MQ count. (%d)\n",
15291 mq->entry_count);
4f4c1863
JS
15292 if (mq->entry_count < 16) {
15293 status = -EINVAL;
15294 goto out;
15295 }
5bd5f66c 15296 /* fall through - otherwise default to smallest count */
04c68496 15297 case 16:
5a6f133e
JS
15298 bf_set(lpfc_mq_context_ring_size,
15299 &mq_create_ext->u.request.context,
15300 LPFC_MQ_RING_SIZE_16);
04c68496
JS
15301 break;
15302 case 32:
5a6f133e
JS
15303 bf_set(lpfc_mq_context_ring_size,
15304 &mq_create_ext->u.request.context,
15305 LPFC_MQ_RING_SIZE_32);
04c68496
JS
15306 break;
15307 case 64:
5a6f133e
JS
15308 bf_set(lpfc_mq_context_ring_size,
15309 &mq_create_ext->u.request.context,
15310 LPFC_MQ_RING_SIZE_64);
04c68496
JS
15311 break;
15312 case 128:
5a6f133e
JS
15313 bf_set(lpfc_mq_context_ring_size,
15314 &mq_create_ext->u.request.context,
15315 LPFC_MQ_RING_SIZE_128);
04c68496
JS
15316 break;
15317 }
15318 list_for_each_entry(dmabuf, &mq->page_list, list) {
49198b37 15319 memset(dmabuf->virt, 0, hw_page_size);
b19a061a 15320 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_lo =
04c68496 15321 putPaddrLow(dmabuf->phys);
b19a061a 15322 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_hi =
04c68496
JS
15323 putPaddrHigh(dmabuf->phys);
15324 }
15325 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
b19a061a
JS
15326 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15327 &mq_create_ext->u.response);
15328 if (rc != MBX_SUCCESS) {
15329 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15330 "2795 MQ_CREATE_EXT failed with "
15331 "status x%x. Failback to MQ_CREATE.\n",
15332 rc);
15333 lpfc_mq_create_fb_init(phba, mq, mbox, cq);
15334 mq_create = &mbox->u.mqe.un.mq_create;
15335 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15336 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create->header.cfg_shdr;
15337 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15338 &mq_create->u.response);
15339 }
15340
04c68496 15341 /* The IOCTL status is embedded in the mailbox subheader. */
04c68496
JS
15342 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15343 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15344 if (shdr_status || shdr_add_status || rc) {
15345 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15346 "2502 MQ_CREATE mailbox failed with "
15347 "status x%x add_status x%x, mbx status x%x\n",
15348 shdr_status, shdr_add_status, rc);
15349 status = -ENXIO;
15350 goto out;
15351 }
04c68496
JS
15352 if (mq->queue_id == 0xFFFF) {
15353 status = -ENXIO;
15354 goto out;
15355 }
15356 mq->type = LPFC_MQ;
2a622bfb 15357 mq->assoc_qid = cq->queue_id;
04c68496
JS
15358 mq->subtype = subtype;
15359 mq->host_index = 0;
15360 mq->hba_index = 0;
15361
15362 /* link the mq onto the parent cq child list */
15363 list_add_tail(&mq->list, &cq->child_list);
15364out:
8fa38513 15365 mempool_free(mbox, phba->mbox_mem_pool);
04c68496
JS
15366 return status;
15367}
15368
4f774513
JS
15369/**
15370 * lpfc_wq_create - Create a Work Queue on the HBA
15371 * @phba: HBA structure that indicates port to create a queue on.
15372 * @wq: The queue structure to use to create the work queue.
15373 * @cq: The completion queue to bind this work queue to.
15374 * @subtype: The subtype of the work queue indicating its functionality.
15375 *
15376 * This function creates a work queue, as detailed in @wq, on a port, described
15377 * by @phba by sending a WQ_CREATE mailbox command to the HBA.
15378 *
15379 * The @phba struct is used to send mailbox command to HBA. The @wq struct
15380 * is used to get the entry count and entry size that are necessary to
15381 * determine the number of pages to allocate and use for this queue. The @cq
15382 * is used to indicate which completion queue to bind this work queue to. This
15383 * function will send the WQ_CREATE mailbox command to the HBA to setup the
15384 * work queue. This function is asynchronous and will wait for the mailbox
15385 * command to finish before continuing.
15386 *
15387 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15388 * memory this function will return -ENOMEM. If the queue create mailbox command
15389 * fails this function will return -ENXIO.
4f774513 15390 **/
a2fc4aef 15391int
4f774513
JS
15392lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq,
15393 struct lpfc_queue *cq, uint32_t subtype)
15394{
15395 struct lpfc_mbx_wq_create *wq_create;
15396 struct lpfc_dmabuf *dmabuf;
15397 LPFC_MBOXQ_t *mbox;
15398 int rc, length, status = 0;
15399 uint32_t shdr_status, shdr_add_status;
15400 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15401 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
5a6f133e 15402 struct dma_address *page;
962bc51b
JS
15403 void __iomem *bar_memmap_p;
15404 uint32_t db_offset;
15405 uint16_t pci_barset;
1351e69f
JS
15406 uint8_t dpp_barset;
15407 uint32_t dpp_offset;
15408 unsigned long pg_addr;
81b96eda 15409 uint8_t wq_create_version;
49198b37 15410
2e90f4b5
JS
15411 /* sanity check on queue memory */
15412 if (!wq || !cq)
15413 return -ENODEV;
49198b37 15414 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 15415 hw_page_size = wq->page_size;
4f774513
JS
15416
15417 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15418 if (!mbox)
15419 return -ENOMEM;
15420 length = (sizeof(struct lpfc_mbx_wq_create) -
15421 sizeof(struct lpfc_sli4_cfg_mhdr));
15422 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15423 LPFC_MBOX_OPCODE_FCOE_WQ_CREATE,
15424 length, LPFC_SLI4_MBX_EMBED);
15425 wq_create = &mbox->u.mqe.un.wq_create;
5a6f133e 15426 shdr = (union lpfc_sli4_cfg_shdr *) &wq_create->header.cfg_shdr;
4f774513
JS
15427 bf_set(lpfc_mbx_wq_create_num_pages, &wq_create->u.request,
15428 wq->page_count);
15429 bf_set(lpfc_mbx_wq_create_cq_id, &wq_create->u.request,
15430 cq->queue_id);
0c651878
JS
15431
15432 /* wqv is the earliest version supported, NOT the latest */
5a6f133e
JS
15433 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15434 phba->sli4_hba.pc_sli4_params.wqv);
962bc51b 15435
c176ffa0
JS
15436 if ((phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT) ||
15437 (wq->page_size > SLI4_PAGE_SIZE))
81b96eda
JS
15438 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15439 else
15440 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15441
0c651878 15442
1351e69f
JS
15443 if (phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT)
15444 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15445 else
15446 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15447
15448 switch (wq_create_version) {
0c651878 15449 case LPFC_Q_CREATE_VERSION_1:
5a6f133e
JS
15450 bf_set(lpfc_mbx_wq_create_wqe_count, &wq_create->u.request_1,
15451 wq->entry_count);
3f247de7
JS
15452 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15453 LPFC_Q_CREATE_VERSION_1);
15454
5a6f133e
JS
15455 switch (wq->entry_size) {
15456 default:
15457 case 64:
15458 bf_set(lpfc_mbx_wq_create_wqe_size,
15459 &wq_create->u.request_1,
15460 LPFC_WQ_WQE_SIZE_64);
15461 break;
15462 case 128:
15463 bf_set(lpfc_mbx_wq_create_wqe_size,
15464 &wq_create->u.request_1,
15465 LPFC_WQ_WQE_SIZE_128);
15466 break;
15467 }
1351e69f
JS
15468 /* Request DPP by default */
15469 bf_set(lpfc_mbx_wq_create_dpp_req, &wq_create->u.request_1, 1);
8ea73db4
JS
15470 bf_set(lpfc_mbx_wq_create_page_size,
15471 &wq_create->u.request_1,
81b96eda 15472 (wq->page_size / SLI4_PAGE_SIZE));
5a6f133e 15473 page = wq_create->u.request_1.page;
0c651878
JS
15474 break;
15475 default:
1351e69f
JS
15476 page = wq_create->u.request.page;
15477 break;
5a6f133e 15478 }
0c651878 15479
4f774513 15480 list_for_each_entry(dmabuf, &wq->page_list, list) {
49198b37 15481 memset(dmabuf->virt, 0, hw_page_size);
5a6f133e
JS
15482 page[dmabuf->buffer_tag].addr_lo = putPaddrLow(dmabuf->phys);
15483 page[dmabuf->buffer_tag].addr_hi = putPaddrHigh(dmabuf->phys);
4f774513 15484 }
962bc51b
JS
15485
15486 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15487 bf_set(lpfc_mbx_wq_create_dua, &wq_create->u.request, 1);
15488
4f774513
JS
15489 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15490 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15491 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15492 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15493 if (shdr_status || shdr_add_status || rc) {
15494 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15495 "2503 WQ_CREATE mailbox failed with "
15496 "status x%x add_status x%x, mbx status x%x\n",
15497 shdr_status, shdr_add_status, rc);
15498 status = -ENXIO;
15499 goto out;
15500 }
1351e69f
JS
15501
15502 if (wq_create_version == LPFC_Q_CREATE_VERSION_0)
15503 wq->queue_id = bf_get(lpfc_mbx_wq_create_q_id,
15504 &wq_create->u.response);
15505 else
15506 wq->queue_id = bf_get(lpfc_mbx_wq_create_v1_q_id,
15507 &wq_create->u.response_1);
15508
4f774513
JS
15509 if (wq->queue_id == 0xFFFF) {
15510 status = -ENXIO;
15511 goto out;
15512 }
1351e69f
JS
15513
15514 wq->db_format = LPFC_DB_LIST_FORMAT;
15515 if (wq_create_version == LPFC_Q_CREATE_VERSION_0) {
15516 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15517 wq->db_format = bf_get(lpfc_mbx_wq_create_db_format,
15518 &wq_create->u.response);
15519 if ((wq->db_format != LPFC_DB_LIST_FORMAT) &&
15520 (wq->db_format != LPFC_DB_RING_FORMAT)) {
15521 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15522 "3265 WQ[%d] doorbell format "
15523 "not supported: x%x\n",
15524 wq->queue_id, wq->db_format);
15525 status = -EINVAL;
15526 goto out;
15527 }
15528 pci_barset = bf_get(lpfc_mbx_wq_create_bar_set,
15529 &wq_create->u.response);
15530 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15531 pci_barset);
15532 if (!bar_memmap_p) {
15533 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15534 "3263 WQ[%d] failed to memmap "
15535 "pci barset:x%x\n",
15536 wq->queue_id, pci_barset);
15537 status = -ENOMEM;
15538 goto out;
15539 }
15540 db_offset = wq_create->u.response.doorbell_offset;
15541 if ((db_offset != LPFC_ULP0_WQ_DOORBELL) &&
15542 (db_offset != LPFC_ULP1_WQ_DOORBELL)) {
15543 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15544 "3252 WQ[%d] doorbell offset "
15545 "not supported: x%x\n",
15546 wq->queue_id, db_offset);
15547 status = -EINVAL;
15548 goto out;
15549 }
15550 wq->db_regaddr = bar_memmap_p + db_offset;
15551 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15552 "3264 WQ[%d]: barset:x%x, offset:x%x, "
15553 "format:x%x\n", wq->queue_id,
15554 pci_barset, db_offset, wq->db_format);
15555 } else
15556 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15557 } else {
1351e69f
JS
15558 /* Check if DPP was honored by the firmware */
15559 wq->dpp_enable = bf_get(lpfc_mbx_wq_create_dpp_rsp,
15560 &wq_create->u.response_1);
15561 if (wq->dpp_enable) {
15562 pci_barset = bf_get(lpfc_mbx_wq_create_v1_bar_set,
15563 &wq_create->u.response_1);
15564 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15565 pci_barset);
15566 if (!bar_memmap_p) {
15567 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15568 "3267 WQ[%d] failed to memmap "
15569 "pci barset:x%x\n",
15570 wq->queue_id, pci_barset);
15571 status = -ENOMEM;
15572 goto out;
15573 }
15574 db_offset = wq_create->u.response_1.doorbell_offset;
15575 wq->db_regaddr = bar_memmap_p + db_offset;
15576 wq->dpp_id = bf_get(lpfc_mbx_wq_create_dpp_id,
15577 &wq_create->u.response_1);
15578 dpp_barset = bf_get(lpfc_mbx_wq_create_dpp_bar,
15579 &wq_create->u.response_1);
15580 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15581 dpp_barset);
15582 if (!bar_memmap_p) {
15583 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15584 "3268 WQ[%d] failed to memmap "
15585 "pci barset:x%x\n",
15586 wq->queue_id, dpp_barset);
15587 status = -ENOMEM;
15588 goto out;
15589 }
15590 dpp_offset = wq_create->u.response_1.dpp_offset;
15591 wq->dpp_regaddr = bar_memmap_p + dpp_offset;
15592 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15593 "3271 WQ[%d]: barset:x%x, offset:x%x, "
15594 "dpp_id:x%x dpp_barset:x%x "
15595 "dpp_offset:x%x\n",
15596 wq->queue_id, pci_barset, db_offset,
15597 wq->dpp_id, dpp_barset, dpp_offset);
15598
15599 /* Enable combined writes for DPP aperture */
15600 pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK;
15601#ifdef CONFIG_X86
15602 rc = set_memory_wc(pg_addr, 1);
15603 if (rc) {
15604 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15605 "3272 Cannot setup Combined "
15606 "Write on WQ[%d] - disable DPP\n",
15607 wq->queue_id);
15608 phba->cfg_enable_dpp = 0;
15609 }
15610#else
15611 phba->cfg_enable_dpp = 0;
15612#endif
15613 } else
15614 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15615 }
895427bd
JS
15616 wq->pring = kzalloc(sizeof(struct lpfc_sli_ring), GFP_KERNEL);
15617 if (wq->pring == NULL) {
15618 status = -ENOMEM;
15619 goto out;
15620 }
4f774513 15621 wq->type = LPFC_WQ;
2a622bfb 15622 wq->assoc_qid = cq->queue_id;
4f774513
JS
15623 wq->subtype = subtype;
15624 wq->host_index = 0;
15625 wq->hba_index = 0;
32517fc0 15626 wq->notify_interval = LPFC_WQ_NOTIFY_INTRVL;
4f774513
JS
15627
15628 /* link the wq onto the parent cq child list */
15629 list_add_tail(&wq->list, &cq->child_list);
15630out:
8fa38513 15631 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15632 return status;
15633}
15634
15635/**
15636 * lpfc_rq_create - Create a Receive Queue on the HBA
15637 * @phba: HBA structure that indicates port to create a queue on.
15638 * @hrq: The queue structure to use to create the header receive queue.
15639 * @drq: The queue structure to use to create the data receive queue.
15640 * @cq: The completion queue to bind this work queue to.
15641 *
15642 * This function creates a receive buffer queue pair , as detailed in @hrq and
15643 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15644 * to the HBA.
15645 *
15646 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15647 * struct is used to get the entry count that is necessary to determine the
15648 * number of pages to use for this queue. The @cq is used to indicate which
15649 * completion queue to bind received buffers that are posted to these queues to.
15650 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15651 * receive queue pair. This function is asynchronous and will wait for the
15652 * mailbox command to finish before continuing.
15653 *
15654 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15655 * memory this function will return -ENOMEM. If the queue create mailbox command
15656 * fails this function will return -ENXIO.
4f774513 15657 **/
a2fc4aef 15658int
4f774513
JS
15659lpfc_rq_create(struct lpfc_hba *phba, struct lpfc_queue *hrq,
15660 struct lpfc_queue *drq, struct lpfc_queue *cq, uint32_t subtype)
15661{
15662 struct lpfc_mbx_rq_create *rq_create;
15663 struct lpfc_dmabuf *dmabuf;
15664 LPFC_MBOXQ_t *mbox;
15665 int rc, length, status = 0;
15666 uint32_t shdr_status, shdr_add_status;
15667 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15668 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
962bc51b
JS
15669 void __iomem *bar_memmap_p;
15670 uint32_t db_offset;
15671 uint16_t pci_barset;
49198b37 15672
2e90f4b5
JS
15673 /* sanity check on queue memory */
15674 if (!hrq || !drq || !cq)
15675 return -ENODEV;
49198b37
JS
15676 if (!phba->sli4_hba.pc_sli4_params.supported)
15677 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
15678
15679 if (hrq->entry_count != drq->entry_count)
15680 return -EINVAL;
15681 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15682 if (!mbox)
15683 return -ENOMEM;
15684 length = (sizeof(struct lpfc_mbx_rq_create) -
15685 sizeof(struct lpfc_sli4_cfg_mhdr));
15686 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15687 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15688 length, LPFC_SLI4_MBX_EMBED);
15689 rq_create = &mbox->u.mqe.un.rq_create;
5a6f133e
JS
15690 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
15691 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15692 phba->sli4_hba.pc_sli4_params.rqv);
15693 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15694 bf_set(lpfc_rq_context_rqe_count_1,
15695 &rq_create->u.request.context,
15696 hrq->entry_count);
15697 rq_create->u.request.context.buffer_size = LPFC_HDR_BUF_SIZE;
c31098ce
JS
15698 bf_set(lpfc_rq_context_rqe_size,
15699 &rq_create->u.request.context,
15700 LPFC_RQE_SIZE_8);
15701 bf_set(lpfc_rq_context_page_size,
15702 &rq_create->u.request.context,
8ea73db4 15703 LPFC_RQ_PAGE_SIZE_4096);
5a6f133e
JS
15704 } else {
15705 switch (hrq->entry_count) {
15706 default:
15707 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15708 "2535 Unsupported RQ count. (%d)\n",
15709 hrq->entry_count);
4f4c1863
JS
15710 if (hrq->entry_count < 512) {
15711 status = -EINVAL;
15712 goto out;
15713 }
5bd5f66c 15714 /* fall through - otherwise default to smallest count */
5a6f133e
JS
15715 case 512:
15716 bf_set(lpfc_rq_context_rqe_count,
15717 &rq_create->u.request.context,
15718 LPFC_RQ_RING_SIZE_512);
15719 break;
15720 case 1024:
15721 bf_set(lpfc_rq_context_rqe_count,
15722 &rq_create->u.request.context,
15723 LPFC_RQ_RING_SIZE_1024);
15724 break;
15725 case 2048:
15726 bf_set(lpfc_rq_context_rqe_count,
15727 &rq_create->u.request.context,
15728 LPFC_RQ_RING_SIZE_2048);
15729 break;
15730 case 4096:
15731 bf_set(lpfc_rq_context_rqe_count,
15732 &rq_create->u.request.context,
15733 LPFC_RQ_RING_SIZE_4096);
15734 break;
15735 }
15736 bf_set(lpfc_rq_context_buf_size, &rq_create->u.request.context,
15737 LPFC_HDR_BUF_SIZE);
4f774513
JS
15738 }
15739 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
15740 cq->queue_id);
15741 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
15742 hrq->page_count);
4f774513 15743 list_for_each_entry(dmabuf, &hrq->page_list, list) {
49198b37 15744 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
15745 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15746 putPaddrLow(dmabuf->phys);
15747 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15748 putPaddrHigh(dmabuf->phys);
15749 }
962bc51b
JS
15750 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15751 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
15752
4f774513
JS
15753 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15754 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15755 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15756 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15757 if (shdr_status || shdr_add_status || rc) {
15758 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15759 "2504 RQ_CREATE mailbox failed with "
15760 "status x%x add_status x%x, mbx status x%x\n",
15761 shdr_status, shdr_add_status, rc);
15762 status = -ENXIO;
15763 goto out;
15764 }
15765 hrq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15766 if (hrq->queue_id == 0xFFFF) {
15767 status = -ENXIO;
15768 goto out;
15769 }
962bc51b
JS
15770
15771 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15772 hrq->db_format = bf_get(lpfc_mbx_rq_create_db_format,
15773 &rq_create->u.response);
15774 if ((hrq->db_format != LPFC_DB_LIST_FORMAT) &&
15775 (hrq->db_format != LPFC_DB_RING_FORMAT)) {
15776 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15777 "3262 RQ [%d] doorbell format not "
15778 "supported: x%x\n", hrq->queue_id,
15779 hrq->db_format);
15780 status = -EINVAL;
15781 goto out;
15782 }
15783
15784 pci_barset = bf_get(lpfc_mbx_rq_create_bar_set,
15785 &rq_create->u.response);
15786 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba, pci_barset);
15787 if (!bar_memmap_p) {
15788 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15789 "3269 RQ[%d] failed to memmap pci "
15790 "barset:x%x\n", hrq->queue_id,
15791 pci_barset);
15792 status = -ENOMEM;
15793 goto out;
15794 }
15795
15796 db_offset = rq_create->u.response.doorbell_offset;
15797 if ((db_offset != LPFC_ULP0_RQ_DOORBELL) &&
15798 (db_offset != LPFC_ULP1_RQ_DOORBELL)) {
15799 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15800 "3270 RQ[%d] doorbell offset not "
15801 "supported: x%x\n", hrq->queue_id,
15802 db_offset);
15803 status = -EINVAL;
15804 goto out;
15805 }
15806 hrq->db_regaddr = bar_memmap_p + db_offset;
15807 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a22e7db3
JS
15808 "3266 RQ[qid:%d]: barset:x%x, offset:x%x, "
15809 "format:x%x\n", hrq->queue_id, pci_barset,
15810 db_offset, hrq->db_format);
962bc51b
JS
15811 } else {
15812 hrq->db_format = LPFC_DB_RING_FORMAT;
15813 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
15814 }
4f774513 15815 hrq->type = LPFC_HRQ;
2a622bfb 15816 hrq->assoc_qid = cq->queue_id;
4f774513
JS
15817 hrq->subtype = subtype;
15818 hrq->host_index = 0;
15819 hrq->hba_index = 0;
32517fc0 15820 hrq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
4f774513
JS
15821
15822 /* now create the data queue */
15823 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15824 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15825 length, LPFC_SLI4_MBX_EMBED);
5a6f133e
JS
15826 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15827 phba->sli4_hba.pc_sli4_params.rqv);
15828 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15829 bf_set(lpfc_rq_context_rqe_count_1,
c31098ce 15830 &rq_create->u.request.context, hrq->entry_count);
3c603be9
JS
15831 if (subtype == LPFC_NVMET)
15832 rq_create->u.request.context.buffer_size =
15833 LPFC_NVMET_DATA_BUF_SIZE;
15834 else
15835 rq_create->u.request.context.buffer_size =
15836 LPFC_DATA_BUF_SIZE;
c31098ce
JS
15837 bf_set(lpfc_rq_context_rqe_size, &rq_create->u.request.context,
15838 LPFC_RQE_SIZE_8);
15839 bf_set(lpfc_rq_context_page_size, &rq_create->u.request.context,
15840 (PAGE_SIZE/SLI4_PAGE_SIZE));
5a6f133e
JS
15841 } else {
15842 switch (drq->entry_count) {
15843 default:
15844 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15845 "2536 Unsupported RQ count. (%d)\n",
15846 drq->entry_count);
4f4c1863
JS
15847 if (drq->entry_count < 512) {
15848 status = -EINVAL;
15849 goto out;
15850 }
5bd5f66c 15851 /* fall through - otherwise default to smallest count */
5a6f133e
JS
15852 case 512:
15853 bf_set(lpfc_rq_context_rqe_count,
15854 &rq_create->u.request.context,
15855 LPFC_RQ_RING_SIZE_512);
15856 break;
15857 case 1024:
15858 bf_set(lpfc_rq_context_rqe_count,
15859 &rq_create->u.request.context,
15860 LPFC_RQ_RING_SIZE_1024);
15861 break;
15862 case 2048:
15863 bf_set(lpfc_rq_context_rqe_count,
15864 &rq_create->u.request.context,
15865 LPFC_RQ_RING_SIZE_2048);
15866 break;
15867 case 4096:
15868 bf_set(lpfc_rq_context_rqe_count,
15869 &rq_create->u.request.context,
15870 LPFC_RQ_RING_SIZE_4096);
15871 break;
15872 }
3c603be9
JS
15873 if (subtype == LPFC_NVMET)
15874 bf_set(lpfc_rq_context_buf_size,
15875 &rq_create->u.request.context,
15876 LPFC_NVMET_DATA_BUF_SIZE);
15877 else
15878 bf_set(lpfc_rq_context_buf_size,
15879 &rq_create->u.request.context,
15880 LPFC_DATA_BUF_SIZE);
4f774513
JS
15881 }
15882 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
15883 cq->queue_id);
15884 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
15885 drq->page_count);
4f774513
JS
15886 list_for_each_entry(dmabuf, &drq->page_list, list) {
15887 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15888 putPaddrLow(dmabuf->phys);
15889 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15890 putPaddrHigh(dmabuf->phys);
15891 }
962bc51b
JS
15892 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15893 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
4f774513
JS
15894 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15895 /* The IOCTL status is embedded in the mailbox subheader. */
15896 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
15897 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15898 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15899 if (shdr_status || shdr_add_status || rc) {
15900 status = -ENXIO;
15901 goto out;
15902 }
15903 drq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15904 if (drq->queue_id == 0xFFFF) {
15905 status = -ENXIO;
15906 goto out;
15907 }
15908 drq->type = LPFC_DRQ;
2a622bfb 15909 drq->assoc_qid = cq->queue_id;
4f774513
JS
15910 drq->subtype = subtype;
15911 drq->host_index = 0;
15912 drq->hba_index = 0;
32517fc0 15913 drq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
4f774513
JS
15914
15915 /* link the header and data RQs onto the parent cq child list */
15916 list_add_tail(&hrq->list, &cq->child_list);
15917 list_add_tail(&drq->list, &cq->child_list);
15918
15919out:
8fa38513 15920 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15921 return status;
15922}
15923
2d7dbc4c
JS
15924/**
15925 * lpfc_mrq_create - Create MRQ Receive Queues on the HBA
15926 * @phba: HBA structure that indicates port to create a queue on.
15927 * @hrqp: The queue structure array to use to create the header receive queues.
15928 * @drqp: The queue structure array to use to create the data receive queues.
15929 * @cqp: The completion queue array to bind these receive queues to.
15930 *
15931 * This function creates a receive buffer queue pair , as detailed in @hrq and
15932 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15933 * to the HBA.
15934 *
15935 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15936 * struct is used to get the entry count that is necessary to determine the
15937 * number of pages to use for this queue. The @cq is used to indicate which
15938 * completion queue to bind received buffers that are posted to these queues to.
15939 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15940 * receive queue pair. This function is asynchronous and will wait for the
15941 * mailbox command to finish before continuing.
15942 *
15943 * On success this function will return a zero. If unable to allocate enough
15944 * memory this function will return -ENOMEM. If the queue create mailbox command
15945 * fails this function will return -ENXIO.
15946 **/
15947int
15948lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
15949 struct lpfc_queue **drqp, struct lpfc_queue **cqp,
15950 uint32_t subtype)
15951{
15952 struct lpfc_queue *hrq, *drq, *cq;
15953 struct lpfc_mbx_rq_create_v2 *rq_create;
15954 struct lpfc_dmabuf *dmabuf;
15955 LPFC_MBOXQ_t *mbox;
15956 int rc, length, alloclen, status = 0;
15957 int cnt, idx, numrq, page_idx = 0;
15958 uint32_t shdr_status, shdr_add_status;
15959 union lpfc_sli4_cfg_shdr *shdr;
15960 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
15961
15962 numrq = phba->cfg_nvmet_mrq;
15963 /* sanity check on array memory */
15964 if (!hrqp || !drqp || !cqp || !numrq)
15965 return -ENODEV;
15966 if (!phba->sli4_hba.pc_sli4_params.supported)
15967 hw_page_size = SLI4_PAGE_SIZE;
15968
15969 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15970 if (!mbox)
15971 return -ENOMEM;
15972
15973 length = sizeof(struct lpfc_mbx_rq_create_v2);
15974 length += ((2 * numrq * hrqp[0]->page_count) *
15975 sizeof(struct dma_address));
15976
15977 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15978 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE, length,
15979 LPFC_SLI4_MBX_NEMBED);
15980 if (alloclen < length) {
15981 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15982 "3099 Allocated DMA memory size (%d) is "
15983 "less than the requested DMA memory size "
15984 "(%d)\n", alloclen, length);
15985 status = -ENOMEM;
15986 goto out;
15987 }
15988
15989
15990
15991 rq_create = mbox->sge_array->addr[0];
15992 shdr = (union lpfc_sli4_cfg_shdr *)&rq_create->cfg_shdr;
15993
15994 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_Q_CREATE_VERSION_2);
15995 cnt = 0;
15996
15997 for (idx = 0; idx < numrq; idx++) {
15998 hrq = hrqp[idx];
15999 drq = drqp[idx];
16000 cq = cqp[idx];
16001
2d7dbc4c
JS
16002 /* sanity check on queue memory */
16003 if (!hrq || !drq || !cq) {
16004 status = -ENODEV;
16005 goto out;
16006 }
16007
7aabe84b
JS
16008 if (hrq->entry_count != drq->entry_count) {
16009 status = -EINVAL;
16010 goto out;
16011 }
16012
2d7dbc4c
JS
16013 if (idx == 0) {
16014 bf_set(lpfc_mbx_rq_create_num_pages,
16015 &rq_create->u.request,
16016 hrq->page_count);
16017 bf_set(lpfc_mbx_rq_create_rq_cnt,
16018 &rq_create->u.request, (numrq * 2));
16019 bf_set(lpfc_mbx_rq_create_dnb, &rq_create->u.request,
16020 1);
16021 bf_set(lpfc_rq_context_base_cq,
16022 &rq_create->u.request.context,
16023 cq->queue_id);
16024 bf_set(lpfc_rq_context_data_size,
16025 &rq_create->u.request.context,
3c603be9 16026 LPFC_NVMET_DATA_BUF_SIZE);
2d7dbc4c
JS
16027 bf_set(lpfc_rq_context_hdr_size,
16028 &rq_create->u.request.context,
16029 LPFC_HDR_BUF_SIZE);
16030 bf_set(lpfc_rq_context_rqe_count_1,
16031 &rq_create->u.request.context,
16032 hrq->entry_count);
16033 bf_set(lpfc_rq_context_rqe_size,
16034 &rq_create->u.request.context,
16035 LPFC_RQE_SIZE_8);
16036 bf_set(lpfc_rq_context_page_size,
16037 &rq_create->u.request.context,
16038 (PAGE_SIZE/SLI4_PAGE_SIZE));
16039 }
16040 rc = 0;
16041 list_for_each_entry(dmabuf, &hrq->page_list, list) {
16042 memset(dmabuf->virt, 0, hw_page_size);
16043 cnt = page_idx + dmabuf->buffer_tag;
16044 rq_create->u.request.page[cnt].addr_lo =
16045 putPaddrLow(dmabuf->phys);
16046 rq_create->u.request.page[cnt].addr_hi =
16047 putPaddrHigh(dmabuf->phys);
16048 rc++;
16049 }
16050 page_idx += rc;
16051
16052 rc = 0;
16053 list_for_each_entry(dmabuf, &drq->page_list, list) {
16054 memset(dmabuf->virt, 0, hw_page_size);
16055 cnt = page_idx + dmabuf->buffer_tag;
16056 rq_create->u.request.page[cnt].addr_lo =
16057 putPaddrLow(dmabuf->phys);
16058 rq_create->u.request.page[cnt].addr_hi =
16059 putPaddrHigh(dmabuf->phys);
16060 rc++;
16061 }
16062 page_idx += rc;
16063
16064 hrq->db_format = LPFC_DB_RING_FORMAT;
16065 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16066 hrq->type = LPFC_HRQ;
16067 hrq->assoc_qid = cq->queue_id;
16068 hrq->subtype = subtype;
16069 hrq->host_index = 0;
16070 hrq->hba_index = 0;
32517fc0 16071 hrq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
2d7dbc4c
JS
16072
16073 drq->db_format = LPFC_DB_RING_FORMAT;
16074 drq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16075 drq->type = LPFC_DRQ;
16076 drq->assoc_qid = cq->queue_id;
16077 drq->subtype = subtype;
16078 drq->host_index = 0;
16079 drq->hba_index = 0;
32517fc0 16080 drq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
2d7dbc4c
JS
16081
16082 list_add_tail(&hrq->list, &cq->child_list);
16083 list_add_tail(&drq->list, &cq->child_list);
16084 }
16085
16086 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16087 /* The IOCTL status is embedded in the mailbox subheader. */
16088 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16089 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16090 if (shdr_status || shdr_add_status || rc) {
16091 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16092 "3120 RQ_CREATE mailbox failed with "
16093 "status x%x add_status x%x, mbx status x%x\n",
16094 shdr_status, shdr_add_status, rc);
16095 status = -ENXIO;
16096 goto out;
16097 }
16098 rc = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16099 if (rc == 0xFFFF) {
16100 status = -ENXIO;
16101 goto out;
16102 }
16103
16104 /* Initialize all RQs with associated queue id */
16105 for (idx = 0; idx < numrq; idx++) {
16106 hrq = hrqp[idx];
16107 hrq->queue_id = rc + (2 * idx);
16108 drq = drqp[idx];
16109 drq->queue_id = rc + (2 * idx) + 1;
16110 }
16111
16112out:
16113 lpfc_sli4_mbox_cmd_free(phba, mbox);
16114 return status;
16115}
16116
4f774513
JS
16117/**
16118 * lpfc_eq_destroy - Destroy an event Queue on the HBA
16119 * @eq: The queue structure associated with the queue to destroy.
16120 *
16121 * This function destroys a queue, as detailed in @eq by sending an mailbox
16122 * command, specific to the type of queue, to the HBA.
16123 *
16124 * The @eq struct is used to get the queue ID of the queue to destroy.
16125 *
16126 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16127 * command fails this function will return -ENXIO.
4f774513 16128 **/
a2fc4aef 16129int
4f774513
JS
16130lpfc_eq_destroy(struct lpfc_hba *phba, struct lpfc_queue *eq)
16131{
16132 LPFC_MBOXQ_t *mbox;
16133 int rc, length, status = 0;
16134 uint32_t shdr_status, shdr_add_status;
16135 union lpfc_sli4_cfg_shdr *shdr;
16136
2e90f4b5 16137 /* sanity check on queue memory */
4f774513
JS
16138 if (!eq)
16139 return -ENODEV;
32517fc0 16140
4f774513
JS
16141 mbox = mempool_alloc(eq->phba->mbox_mem_pool, GFP_KERNEL);
16142 if (!mbox)
16143 return -ENOMEM;
16144 length = (sizeof(struct lpfc_mbx_eq_destroy) -
16145 sizeof(struct lpfc_sli4_cfg_mhdr));
16146 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16147 LPFC_MBOX_OPCODE_EQ_DESTROY,
16148 length, LPFC_SLI4_MBX_EMBED);
16149 bf_set(lpfc_mbx_eq_destroy_q_id, &mbox->u.mqe.un.eq_destroy.u.request,
16150 eq->queue_id);
16151 mbox->vport = eq->phba->pport;
16152 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16153
16154 rc = lpfc_sli_issue_mbox(eq->phba, mbox, MBX_POLL);
16155 /* The IOCTL status is embedded in the mailbox subheader. */
16156 shdr = (union lpfc_sli4_cfg_shdr *)
16157 &mbox->u.mqe.un.eq_destroy.header.cfg_shdr;
16158 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16159 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16160 if (shdr_status || shdr_add_status || rc) {
16161 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16162 "2505 EQ_DESTROY mailbox failed with "
16163 "status x%x add_status x%x, mbx status x%x\n",
16164 shdr_status, shdr_add_status, rc);
16165 status = -ENXIO;
16166 }
16167
16168 /* Remove eq from any list */
16169 list_del_init(&eq->list);
8fa38513 16170 mempool_free(mbox, eq->phba->mbox_mem_pool);
4f774513
JS
16171 return status;
16172}
16173
16174/**
16175 * lpfc_cq_destroy - Destroy a Completion Queue on the HBA
16176 * @cq: The queue structure associated with the queue to destroy.
16177 *
16178 * This function destroys a queue, as detailed in @cq by sending an mailbox
16179 * command, specific to the type of queue, to the HBA.
16180 *
16181 * The @cq struct is used to get the queue ID of the queue to destroy.
16182 *
16183 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16184 * command fails this function will return -ENXIO.
4f774513 16185 **/
a2fc4aef 16186int
4f774513
JS
16187lpfc_cq_destroy(struct lpfc_hba *phba, struct lpfc_queue *cq)
16188{
16189 LPFC_MBOXQ_t *mbox;
16190 int rc, length, status = 0;
16191 uint32_t shdr_status, shdr_add_status;
16192 union lpfc_sli4_cfg_shdr *shdr;
16193
2e90f4b5 16194 /* sanity check on queue memory */
4f774513
JS
16195 if (!cq)
16196 return -ENODEV;
16197 mbox = mempool_alloc(cq->phba->mbox_mem_pool, GFP_KERNEL);
16198 if (!mbox)
16199 return -ENOMEM;
16200 length = (sizeof(struct lpfc_mbx_cq_destroy) -
16201 sizeof(struct lpfc_sli4_cfg_mhdr));
16202 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16203 LPFC_MBOX_OPCODE_CQ_DESTROY,
16204 length, LPFC_SLI4_MBX_EMBED);
16205 bf_set(lpfc_mbx_cq_destroy_q_id, &mbox->u.mqe.un.cq_destroy.u.request,
16206 cq->queue_id);
16207 mbox->vport = cq->phba->pport;
16208 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16209 rc = lpfc_sli_issue_mbox(cq->phba, mbox, MBX_POLL);
16210 /* The IOCTL status is embedded in the mailbox subheader. */
16211 shdr = (union lpfc_sli4_cfg_shdr *)
16212 &mbox->u.mqe.un.wq_create.header.cfg_shdr;
16213 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16214 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16215 if (shdr_status || shdr_add_status || rc) {
16216 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16217 "2506 CQ_DESTROY mailbox failed with "
16218 "status x%x add_status x%x, mbx status x%x\n",
16219 shdr_status, shdr_add_status, rc);
16220 status = -ENXIO;
16221 }
16222 /* Remove cq from any list */
16223 list_del_init(&cq->list);
8fa38513 16224 mempool_free(mbox, cq->phba->mbox_mem_pool);
4f774513
JS
16225 return status;
16226}
16227
04c68496
JS
16228/**
16229 * lpfc_mq_destroy - Destroy a Mailbox Queue on the HBA
16230 * @qm: The queue structure associated with the queue to destroy.
16231 *
16232 * This function destroys a queue, as detailed in @mq by sending an mailbox
16233 * command, specific to the type of queue, to the HBA.
16234 *
16235 * The @mq struct is used to get the queue ID of the queue to destroy.
16236 *
16237 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16238 * command fails this function will return -ENXIO.
04c68496 16239 **/
a2fc4aef 16240int
04c68496
JS
16241lpfc_mq_destroy(struct lpfc_hba *phba, struct lpfc_queue *mq)
16242{
16243 LPFC_MBOXQ_t *mbox;
16244 int rc, length, status = 0;
16245 uint32_t shdr_status, shdr_add_status;
16246 union lpfc_sli4_cfg_shdr *shdr;
16247
2e90f4b5 16248 /* sanity check on queue memory */
04c68496
JS
16249 if (!mq)
16250 return -ENODEV;
16251 mbox = mempool_alloc(mq->phba->mbox_mem_pool, GFP_KERNEL);
16252 if (!mbox)
16253 return -ENOMEM;
16254 length = (sizeof(struct lpfc_mbx_mq_destroy) -
16255 sizeof(struct lpfc_sli4_cfg_mhdr));
16256 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16257 LPFC_MBOX_OPCODE_MQ_DESTROY,
16258 length, LPFC_SLI4_MBX_EMBED);
16259 bf_set(lpfc_mbx_mq_destroy_q_id, &mbox->u.mqe.un.mq_destroy.u.request,
16260 mq->queue_id);
16261 mbox->vport = mq->phba->pport;
16262 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16263 rc = lpfc_sli_issue_mbox(mq->phba, mbox, MBX_POLL);
16264 /* The IOCTL status is embedded in the mailbox subheader. */
16265 shdr = (union lpfc_sli4_cfg_shdr *)
16266 &mbox->u.mqe.un.mq_destroy.header.cfg_shdr;
16267 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16268 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16269 if (shdr_status || shdr_add_status || rc) {
16270 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16271 "2507 MQ_DESTROY mailbox failed with "
16272 "status x%x add_status x%x, mbx status x%x\n",
16273 shdr_status, shdr_add_status, rc);
16274 status = -ENXIO;
16275 }
16276 /* Remove mq from any list */
16277 list_del_init(&mq->list);
8fa38513 16278 mempool_free(mbox, mq->phba->mbox_mem_pool);
04c68496
JS
16279 return status;
16280}
16281
4f774513
JS
16282/**
16283 * lpfc_wq_destroy - Destroy a Work Queue on the HBA
16284 * @wq: The queue structure associated with the queue to destroy.
16285 *
16286 * This function destroys a queue, as detailed in @wq by sending an mailbox
16287 * command, specific to the type of queue, to the HBA.
16288 *
16289 * The @wq struct is used to get the queue ID of the queue to destroy.
16290 *
16291 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16292 * command fails this function will return -ENXIO.
4f774513 16293 **/
a2fc4aef 16294int
4f774513
JS
16295lpfc_wq_destroy(struct lpfc_hba *phba, struct lpfc_queue *wq)
16296{
16297 LPFC_MBOXQ_t *mbox;
16298 int rc, length, status = 0;
16299 uint32_t shdr_status, shdr_add_status;
16300 union lpfc_sli4_cfg_shdr *shdr;
16301
2e90f4b5 16302 /* sanity check on queue memory */
4f774513
JS
16303 if (!wq)
16304 return -ENODEV;
16305 mbox = mempool_alloc(wq->phba->mbox_mem_pool, GFP_KERNEL);
16306 if (!mbox)
16307 return -ENOMEM;
16308 length = (sizeof(struct lpfc_mbx_wq_destroy) -
16309 sizeof(struct lpfc_sli4_cfg_mhdr));
16310 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16311 LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY,
16312 length, LPFC_SLI4_MBX_EMBED);
16313 bf_set(lpfc_mbx_wq_destroy_q_id, &mbox->u.mqe.un.wq_destroy.u.request,
16314 wq->queue_id);
16315 mbox->vport = wq->phba->pport;
16316 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16317 rc = lpfc_sli_issue_mbox(wq->phba, mbox, MBX_POLL);
16318 shdr = (union lpfc_sli4_cfg_shdr *)
16319 &mbox->u.mqe.un.wq_destroy.header.cfg_shdr;
16320 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16321 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16322 if (shdr_status || shdr_add_status || rc) {
16323 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16324 "2508 WQ_DESTROY mailbox failed with "
16325 "status x%x add_status x%x, mbx status x%x\n",
16326 shdr_status, shdr_add_status, rc);
16327 status = -ENXIO;
16328 }
16329 /* Remove wq from any list */
16330 list_del_init(&wq->list);
d1f525aa
JS
16331 kfree(wq->pring);
16332 wq->pring = NULL;
8fa38513 16333 mempool_free(mbox, wq->phba->mbox_mem_pool);
4f774513
JS
16334 return status;
16335}
16336
16337/**
16338 * lpfc_rq_destroy - Destroy a Receive Queue on the HBA
16339 * @rq: The queue structure associated with the queue to destroy.
16340 *
16341 * This function destroys a queue, as detailed in @rq by sending an mailbox
16342 * command, specific to the type of queue, to the HBA.
16343 *
16344 * The @rq struct is used to get the queue ID of the queue to destroy.
16345 *
16346 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16347 * command fails this function will return -ENXIO.
4f774513 16348 **/
a2fc4aef 16349int
4f774513
JS
16350lpfc_rq_destroy(struct lpfc_hba *phba, struct lpfc_queue *hrq,
16351 struct lpfc_queue *drq)
16352{
16353 LPFC_MBOXQ_t *mbox;
16354 int rc, length, status = 0;
16355 uint32_t shdr_status, shdr_add_status;
16356 union lpfc_sli4_cfg_shdr *shdr;
16357
2e90f4b5 16358 /* sanity check on queue memory */
4f774513
JS
16359 if (!hrq || !drq)
16360 return -ENODEV;
16361 mbox = mempool_alloc(hrq->phba->mbox_mem_pool, GFP_KERNEL);
16362 if (!mbox)
16363 return -ENOMEM;
16364 length = (sizeof(struct lpfc_mbx_rq_destroy) -
fedd3b7b 16365 sizeof(struct lpfc_sli4_cfg_mhdr));
4f774513
JS
16366 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16367 LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY,
16368 length, LPFC_SLI4_MBX_EMBED);
16369 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16370 hrq->queue_id);
16371 mbox->vport = hrq->phba->pport;
16372 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16373 rc = lpfc_sli_issue_mbox(hrq->phba, mbox, MBX_POLL);
16374 /* The IOCTL status is embedded in the mailbox subheader. */
16375 shdr = (union lpfc_sli4_cfg_shdr *)
16376 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16377 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16378 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16379 if (shdr_status || shdr_add_status || rc) {
16380 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16381 "2509 RQ_DESTROY mailbox failed with "
16382 "status x%x add_status x%x, mbx status x%x\n",
16383 shdr_status, shdr_add_status, rc);
16384 if (rc != MBX_TIMEOUT)
16385 mempool_free(mbox, hrq->phba->mbox_mem_pool);
16386 return -ENXIO;
16387 }
16388 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16389 drq->queue_id);
16390 rc = lpfc_sli_issue_mbox(drq->phba, mbox, MBX_POLL);
16391 shdr = (union lpfc_sli4_cfg_shdr *)
16392 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16393 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16394 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16395 if (shdr_status || shdr_add_status || rc) {
16396 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16397 "2510 RQ_DESTROY mailbox failed with "
16398 "status x%x add_status x%x, mbx status x%x\n",
16399 shdr_status, shdr_add_status, rc);
16400 status = -ENXIO;
16401 }
16402 list_del_init(&hrq->list);
16403 list_del_init(&drq->list);
8fa38513 16404 mempool_free(mbox, hrq->phba->mbox_mem_pool);
4f774513
JS
16405 return status;
16406}
16407
16408/**
16409 * lpfc_sli4_post_sgl - Post scatter gather list for an XRI to HBA
16410 * @phba: The virtual port for which this call being executed.
16411 * @pdma_phys_addr0: Physical address of the 1st SGL page.
16412 * @pdma_phys_addr1: Physical address of the 2nd SGL page.
16413 * @xritag: the xritag that ties this io to the SGL pages.
16414 *
16415 * This routine will post the sgl pages for the IO that has the xritag
16416 * that is in the iocbq structure. The xritag is assigned during iocbq
16417 * creation and persists for as long as the driver is loaded.
16418 * if the caller has fewer than 256 scatter gather segments to map then
16419 * pdma_phys_addr1 should be 0.
16420 * If the caller needs to map more than 256 scatter gather segment then
16421 * pdma_phys_addr1 should be a valid physical address.
16422 * physical address for SGLs must be 64 byte aligned.
16423 * If you are going to map 2 SGL's then the first one must have 256 entries
16424 * the second sgl can have between 1 and 256 entries.
16425 *
16426 * Return codes:
16427 * 0 - Success
16428 * -ENXIO, -ENOMEM - Failure
16429 **/
16430int
16431lpfc_sli4_post_sgl(struct lpfc_hba *phba,
16432 dma_addr_t pdma_phys_addr0,
16433 dma_addr_t pdma_phys_addr1,
16434 uint16_t xritag)
16435{
16436 struct lpfc_mbx_post_sgl_pages *post_sgl_pages;
16437 LPFC_MBOXQ_t *mbox;
16438 int rc;
16439 uint32_t shdr_status, shdr_add_status;
6d368e53 16440 uint32_t mbox_tmo;
4f774513
JS
16441 union lpfc_sli4_cfg_shdr *shdr;
16442
16443 if (xritag == NO_XRI) {
16444 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16445 "0364 Invalid param:\n");
16446 return -EINVAL;
16447 }
16448
16449 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16450 if (!mbox)
16451 return -ENOMEM;
16452
16453 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16454 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16455 sizeof(struct lpfc_mbx_post_sgl_pages) -
fedd3b7b 16456 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
4f774513
JS
16457
16458 post_sgl_pages = (struct lpfc_mbx_post_sgl_pages *)
16459 &mbox->u.mqe.un.post_sgl_pages;
16460 bf_set(lpfc_post_sgl_pages_xri, post_sgl_pages, xritag);
16461 bf_set(lpfc_post_sgl_pages_xricnt, post_sgl_pages, 1);
16462
16463 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_lo =
16464 cpu_to_le32(putPaddrLow(pdma_phys_addr0));
16465 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_hi =
16466 cpu_to_le32(putPaddrHigh(pdma_phys_addr0));
16467
16468 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_lo =
16469 cpu_to_le32(putPaddrLow(pdma_phys_addr1));
16470 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_hi =
16471 cpu_to_le32(putPaddrHigh(pdma_phys_addr1));
16472 if (!phba->sli4_hba.intr_enable)
16473 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6d368e53 16474 else {
a183a15f 16475 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
16476 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16477 }
4f774513
JS
16478 /* The IOCTL status is embedded in the mailbox subheader. */
16479 shdr = (union lpfc_sli4_cfg_shdr *) &post_sgl_pages->header.cfg_shdr;
16480 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16481 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16482 if (rc != MBX_TIMEOUT)
16483 mempool_free(mbox, phba->mbox_mem_pool);
16484 if (shdr_status || shdr_add_status || rc) {
16485 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16486 "2511 POST_SGL mailbox failed with "
16487 "status x%x add_status x%x, mbx status x%x\n",
16488 shdr_status, shdr_add_status, rc);
4f774513
JS
16489 }
16490 return 0;
16491}
4f774513 16492
6d368e53 16493/**
88a2cfbb 16494 * lpfc_sli4_alloc_xri - Get an available rpi in the device's range
6d368e53
JS
16495 * @phba: pointer to lpfc hba data structure.
16496 *
16497 * This routine is invoked to post rpi header templates to the
88a2cfbb
JS
16498 * HBA consistent with the SLI-4 interface spec. This routine
16499 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
16500 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6d368e53 16501 *
88a2cfbb
JS
16502 * Returns
16503 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
16504 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
16505 **/
5d8b8167 16506static uint16_t
6d368e53
JS
16507lpfc_sli4_alloc_xri(struct lpfc_hba *phba)
16508{
16509 unsigned long xri;
16510
16511 /*
16512 * Fetch the next logical xri. Because this index is logical,
16513 * the driver starts at 0 each time.
16514 */
16515 spin_lock_irq(&phba->hbalock);
16516 xri = find_next_zero_bit(phba->sli4_hba.xri_bmask,
16517 phba->sli4_hba.max_cfg_param.max_xri, 0);
16518 if (xri >= phba->sli4_hba.max_cfg_param.max_xri) {
16519 spin_unlock_irq(&phba->hbalock);
16520 return NO_XRI;
16521 } else {
16522 set_bit(xri, phba->sli4_hba.xri_bmask);
16523 phba->sli4_hba.max_cfg_param.xri_used++;
6d368e53 16524 }
6d368e53
JS
16525 spin_unlock_irq(&phba->hbalock);
16526 return xri;
16527}
16528
16529/**
16530 * lpfc_sli4_free_xri - Release an xri for reuse.
16531 * @phba: pointer to lpfc hba data structure.
16532 *
16533 * This routine is invoked to release an xri to the pool of
16534 * available rpis maintained by the driver.
16535 **/
5d8b8167 16536static void
6d368e53
JS
16537__lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16538{
16539 if (test_and_clear_bit(xri, phba->sli4_hba.xri_bmask)) {
6d368e53
JS
16540 phba->sli4_hba.max_cfg_param.xri_used--;
16541 }
16542}
16543
16544/**
16545 * lpfc_sli4_free_xri - Release an xri for reuse.
16546 * @phba: pointer to lpfc hba data structure.
16547 *
16548 * This routine is invoked to release an xri to the pool of
16549 * available rpis maintained by the driver.
16550 **/
16551void
16552lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16553{
16554 spin_lock_irq(&phba->hbalock);
16555 __lpfc_sli4_free_xri(phba, xri);
16556 spin_unlock_irq(&phba->hbalock);
16557}
16558
4f774513
JS
16559/**
16560 * lpfc_sli4_next_xritag - Get an xritag for the io
16561 * @phba: Pointer to HBA context object.
16562 *
16563 * This function gets an xritag for the iocb. If there is no unused xritag
16564 * it will return 0xffff.
16565 * The function returns the allocated xritag if successful, else returns zero.
16566 * Zero is not a valid xritag.
16567 * The caller is not required to hold any lock.
16568 **/
16569uint16_t
16570lpfc_sli4_next_xritag(struct lpfc_hba *phba)
16571{
6d368e53 16572 uint16_t xri_index;
4f774513 16573
6d368e53 16574 xri_index = lpfc_sli4_alloc_xri(phba);
81378052
JS
16575 if (xri_index == NO_XRI)
16576 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
16577 "2004 Failed to allocate XRI.last XRITAG is %d"
16578 " Max XRI is %d, Used XRI is %d\n",
16579 xri_index,
16580 phba->sli4_hba.max_cfg_param.max_xri,
16581 phba->sli4_hba.max_cfg_param.xri_used);
16582 return xri_index;
4f774513
JS
16583}
16584
16585/**
895427bd 16586 * lpfc_sli4_post_sgl_list - post a block of ELS sgls to the port.
4f774513 16587 * @phba: pointer to lpfc hba data structure.
8a9d2e80
JS
16588 * @post_sgl_list: pointer to els sgl entry list.
16589 * @count: number of els sgl entries on the list.
4f774513
JS
16590 *
16591 * This routine is invoked to post a block of driver's sgl pages to the
16592 * HBA using non-embedded mailbox command. No Lock is held. This routine
16593 * is only called when the driver is loading and after all IO has been
16594 * stopped.
16595 **/
8a9d2e80 16596static int
895427bd 16597lpfc_sli4_post_sgl_list(struct lpfc_hba *phba,
8a9d2e80
JS
16598 struct list_head *post_sgl_list,
16599 int post_cnt)
4f774513 16600{
8a9d2e80 16601 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
4f774513
JS
16602 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16603 struct sgl_page_pairs *sgl_pg_pairs;
16604 void *viraddr;
16605 LPFC_MBOXQ_t *mbox;
16606 uint32_t reqlen, alloclen, pg_pairs;
16607 uint32_t mbox_tmo;
8a9d2e80
JS
16608 uint16_t xritag_start = 0;
16609 int rc = 0;
4f774513
JS
16610 uint32_t shdr_status, shdr_add_status;
16611 union lpfc_sli4_cfg_shdr *shdr;
16612
895427bd 16613 reqlen = post_cnt * sizeof(struct sgl_page_pairs) +
4f774513 16614 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16615 if (reqlen > SLI4_PAGE_SIZE) {
895427bd 16616 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4f774513
JS
16617 "2559 Block sgl registration required DMA "
16618 "size (%d) great than a page\n", reqlen);
16619 return -ENOMEM;
16620 }
895427bd 16621
4f774513 16622 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6d368e53 16623 if (!mbox)
4f774513 16624 return -ENOMEM;
4f774513
JS
16625
16626 /* Allocate DMA memory and set up the non-embedded mailbox command */
16627 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16628 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES, reqlen,
16629 LPFC_SLI4_MBX_NEMBED);
16630
16631 if (alloclen < reqlen) {
16632 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16633 "0285 Allocated DMA memory size (%d) is "
16634 "less than the requested DMA memory "
16635 "size (%d)\n", alloclen, reqlen);
16636 lpfc_sli4_mbox_cmd_free(phba, mbox);
16637 return -ENOMEM;
16638 }
4f774513 16639 /* Set up the SGL pages in the non-embedded DMA pages */
6d368e53 16640 viraddr = mbox->sge_array->addr[0];
4f774513
JS
16641 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16642 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16643
8a9d2e80
JS
16644 pg_pairs = 0;
16645 list_for_each_entry_safe(sglq_entry, sglq_next, post_sgl_list, list) {
4f774513
JS
16646 /* Set up the sge entry */
16647 sgl_pg_pairs->sgl_pg0_addr_lo =
16648 cpu_to_le32(putPaddrLow(sglq_entry->phys));
16649 sgl_pg_pairs->sgl_pg0_addr_hi =
16650 cpu_to_le32(putPaddrHigh(sglq_entry->phys));
16651 sgl_pg_pairs->sgl_pg1_addr_lo =
16652 cpu_to_le32(putPaddrLow(0));
16653 sgl_pg_pairs->sgl_pg1_addr_hi =
16654 cpu_to_le32(putPaddrHigh(0));
6d368e53 16655
4f774513
JS
16656 /* Keep the first xritag on the list */
16657 if (pg_pairs == 0)
16658 xritag_start = sglq_entry->sli4_xritag;
16659 sgl_pg_pairs++;
8a9d2e80 16660 pg_pairs++;
4f774513 16661 }
6d368e53
JS
16662
16663 /* Complete initialization and perform endian conversion. */
4f774513 16664 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
895427bd 16665 bf_set(lpfc_post_sgl_pages_xricnt, sgl, post_cnt);
4f774513 16666 sgl->word0 = cpu_to_le32(sgl->word0);
895427bd 16667
4f774513
JS
16668 if (!phba->sli4_hba.intr_enable)
16669 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16670 else {
a183a15f 16671 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16672 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16673 }
16674 shdr = (union lpfc_sli4_cfg_shdr *) &sgl->cfg_shdr;
16675 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16676 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16677 if (rc != MBX_TIMEOUT)
16678 lpfc_sli4_mbox_cmd_free(phba, mbox);
16679 if (shdr_status || shdr_add_status || rc) {
16680 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16681 "2513 POST_SGL_BLOCK mailbox command failed "
16682 "status x%x add_status x%x mbx status x%x\n",
16683 shdr_status, shdr_add_status, rc);
16684 rc = -ENXIO;
16685 }
16686 return rc;
16687}
16688
16689/**
5e5b511d 16690 * lpfc_sli4_post_io_sgl_block - post a block of nvme sgl list to firmware
4f774513 16691 * @phba: pointer to lpfc hba data structure.
0794d601 16692 * @nblist: pointer to nvme buffer list.
4f774513
JS
16693 * @count: number of scsi buffers on the list.
16694 *
16695 * This routine is invoked to post a block of @count scsi sgl pages from a
0794d601 16696 * SCSI buffer list @nblist to the HBA using non-embedded mailbox command.
4f774513
JS
16697 * No Lock is held.
16698 *
16699 **/
0794d601 16700static int
5e5b511d
JS
16701lpfc_sli4_post_io_sgl_block(struct lpfc_hba *phba, struct list_head *nblist,
16702 int count)
4f774513 16703{
c490850a 16704 struct lpfc_io_buf *lpfc_ncmd;
4f774513
JS
16705 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16706 struct sgl_page_pairs *sgl_pg_pairs;
16707 void *viraddr;
16708 LPFC_MBOXQ_t *mbox;
16709 uint32_t reqlen, alloclen, pg_pairs;
16710 uint32_t mbox_tmo;
16711 uint16_t xritag_start = 0;
16712 int rc = 0;
16713 uint32_t shdr_status, shdr_add_status;
16714 dma_addr_t pdma_phys_bpl1;
16715 union lpfc_sli4_cfg_shdr *shdr;
16716
16717 /* Calculate the requested length of the dma memory */
8a9d2e80 16718 reqlen = count * sizeof(struct sgl_page_pairs) +
4f774513 16719 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16720 if (reqlen > SLI4_PAGE_SIZE) {
4f774513 16721 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
0794d601 16722 "6118 Block sgl registration required DMA "
4f774513
JS
16723 "size (%d) great than a page\n", reqlen);
16724 return -ENOMEM;
16725 }
16726 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16727 if (!mbox) {
16728 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
0794d601 16729 "6119 Failed to allocate mbox cmd memory\n");
4f774513
JS
16730 return -ENOMEM;
16731 }
16732
16733 /* Allocate DMA memory and set up the non-embedded mailbox command */
16734 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
0794d601
JS
16735 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16736 reqlen, LPFC_SLI4_MBX_NEMBED);
4f774513
JS
16737
16738 if (alloclen < reqlen) {
16739 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
0794d601 16740 "6120 Allocated DMA memory size (%d) is "
4f774513
JS
16741 "less than the requested DMA memory "
16742 "size (%d)\n", alloclen, reqlen);
16743 lpfc_sli4_mbox_cmd_free(phba, mbox);
16744 return -ENOMEM;
16745 }
6d368e53 16746
4f774513 16747 /* Get the first SGE entry from the non-embedded DMA memory */
4f774513
JS
16748 viraddr = mbox->sge_array->addr[0];
16749
16750 /* Set up the SGL pages in the non-embedded DMA pages */
16751 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16752 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16753
16754 pg_pairs = 0;
0794d601 16755 list_for_each_entry(lpfc_ncmd, nblist, list) {
4f774513
JS
16756 /* Set up the sge entry */
16757 sgl_pg_pairs->sgl_pg0_addr_lo =
0794d601 16758 cpu_to_le32(putPaddrLow(lpfc_ncmd->dma_phys_sgl));
4f774513 16759 sgl_pg_pairs->sgl_pg0_addr_hi =
0794d601 16760 cpu_to_le32(putPaddrHigh(lpfc_ncmd->dma_phys_sgl));
4f774513 16761 if (phba->cfg_sg_dma_buf_size > SGL_PAGE_SIZE)
0794d601
JS
16762 pdma_phys_bpl1 = lpfc_ncmd->dma_phys_sgl +
16763 SGL_PAGE_SIZE;
4f774513
JS
16764 else
16765 pdma_phys_bpl1 = 0;
16766 sgl_pg_pairs->sgl_pg1_addr_lo =
16767 cpu_to_le32(putPaddrLow(pdma_phys_bpl1));
16768 sgl_pg_pairs->sgl_pg1_addr_hi =
16769 cpu_to_le32(putPaddrHigh(pdma_phys_bpl1));
16770 /* Keep the first xritag on the list */
16771 if (pg_pairs == 0)
0794d601 16772 xritag_start = lpfc_ncmd->cur_iocbq.sli4_xritag;
4f774513
JS
16773 sgl_pg_pairs++;
16774 pg_pairs++;
16775 }
16776 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
16777 bf_set(lpfc_post_sgl_pages_xricnt, sgl, pg_pairs);
16778 /* Perform endian conversion if necessary */
16779 sgl->word0 = cpu_to_le32(sgl->word0);
16780
0794d601 16781 if (!phba->sli4_hba.intr_enable) {
4f774513 16782 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
0794d601 16783 } else {
a183a15f 16784 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16785 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16786 }
0794d601 16787 shdr = (union lpfc_sli4_cfg_shdr *)&sgl->cfg_shdr;
4f774513
JS
16788 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16789 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16790 if (rc != MBX_TIMEOUT)
16791 lpfc_sli4_mbox_cmd_free(phba, mbox);
16792 if (shdr_status || shdr_add_status || rc) {
16793 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
0794d601 16794 "6125 POST_SGL_BLOCK mailbox command failed "
4f774513
JS
16795 "status x%x add_status x%x mbx status x%x\n",
16796 shdr_status, shdr_add_status, rc);
16797 rc = -ENXIO;
16798 }
16799 return rc;
16800}
16801
0794d601 16802/**
5e5b511d 16803 * lpfc_sli4_post_io_sgl_list - Post blocks of nvme buffer sgls from a list
0794d601
JS
16804 * @phba: pointer to lpfc hba data structure.
16805 * @post_nblist: pointer to the nvme buffer list.
16806 *
16807 * This routine walks a list of nvme buffers that was passed in. It attempts
16808 * to construct blocks of nvme buffer sgls which contains contiguous xris and
16809 * uses the non-embedded SGL block post mailbox commands to post to the port.
16810 * For single NVME buffer sgl with non-contiguous xri, if any, it shall use
16811 * embedded SGL post mailbox command for posting. The @post_nblist passed in
16812 * must be local list, thus no lock is needed when manipulate the list.
16813 *
16814 * Returns: 0 = failure, non-zero number of successfully posted buffers.
16815 **/
16816int
5e5b511d
JS
16817lpfc_sli4_post_io_sgl_list(struct lpfc_hba *phba,
16818 struct list_head *post_nblist, int sb_count)
0794d601 16819{
c490850a 16820 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
0794d601
JS
16821 int status, sgl_size;
16822 int post_cnt = 0, block_cnt = 0, num_posting = 0, num_posted = 0;
16823 dma_addr_t pdma_phys_sgl1;
16824 int last_xritag = NO_XRI;
16825 int cur_xritag;
0794d601
JS
16826 LIST_HEAD(prep_nblist);
16827 LIST_HEAD(blck_nblist);
16828 LIST_HEAD(nvme_nblist);
16829
16830 /* sanity check */
16831 if (sb_count <= 0)
16832 return -EINVAL;
16833
16834 sgl_size = phba->cfg_sg_dma_buf_size;
16835 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, post_nblist, list) {
16836 list_del_init(&lpfc_ncmd->list);
16837 block_cnt++;
16838 if ((last_xritag != NO_XRI) &&
16839 (lpfc_ncmd->cur_iocbq.sli4_xritag != last_xritag + 1)) {
16840 /* a hole in xri block, form a sgl posting block */
16841 list_splice_init(&prep_nblist, &blck_nblist);
16842 post_cnt = block_cnt - 1;
16843 /* prepare list for next posting block */
16844 list_add_tail(&lpfc_ncmd->list, &prep_nblist);
16845 block_cnt = 1;
16846 } else {
16847 /* prepare list for next posting block */
16848 list_add_tail(&lpfc_ncmd->list, &prep_nblist);
16849 /* enough sgls for non-embed sgl mbox command */
16850 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
16851 list_splice_init(&prep_nblist, &blck_nblist);
16852 post_cnt = block_cnt;
16853 block_cnt = 0;
16854 }
16855 }
16856 num_posting++;
16857 last_xritag = lpfc_ncmd->cur_iocbq.sli4_xritag;
16858
16859 /* end of repost sgl list condition for NVME buffers */
16860 if (num_posting == sb_count) {
16861 if (post_cnt == 0) {
16862 /* last sgl posting block */
16863 list_splice_init(&prep_nblist, &blck_nblist);
16864 post_cnt = block_cnt;
16865 } else if (block_cnt == 1) {
16866 /* last single sgl with non-contiguous xri */
16867 if (sgl_size > SGL_PAGE_SIZE)
16868 pdma_phys_sgl1 =
16869 lpfc_ncmd->dma_phys_sgl +
16870 SGL_PAGE_SIZE;
16871 else
16872 pdma_phys_sgl1 = 0;
16873 cur_xritag = lpfc_ncmd->cur_iocbq.sli4_xritag;
16874 status = lpfc_sli4_post_sgl(
16875 phba, lpfc_ncmd->dma_phys_sgl,
16876 pdma_phys_sgl1, cur_xritag);
16877 if (status) {
c490850a
JS
16878 /* Post error. Buffer unavailable. */
16879 lpfc_ncmd->flags |=
16880 LPFC_SBUF_NOT_POSTED;
0794d601 16881 } else {
c490850a
JS
16882 /* Post success. Bffer available. */
16883 lpfc_ncmd->flags &=
16884 ~LPFC_SBUF_NOT_POSTED;
0794d601
JS
16885 lpfc_ncmd->status = IOSTAT_SUCCESS;
16886 num_posted++;
16887 }
16888 /* success, put on NVME buffer sgl list */
16889 list_add_tail(&lpfc_ncmd->list, &nvme_nblist);
16890 }
16891 }
16892
16893 /* continue until a nembed page worth of sgls */
16894 if (post_cnt == 0)
16895 continue;
16896
16897 /* post block of NVME buffer list sgls */
5e5b511d
JS
16898 status = lpfc_sli4_post_io_sgl_block(phba, &blck_nblist,
16899 post_cnt);
0794d601
JS
16900
16901 /* don't reset xirtag due to hole in xri block */
16902 if (block_cnt == 0)
16903 last_xritag = NO_XRI;
4f774513 16904
0794d601
JS
16905 /* reset NVME buffer post count for next round of posting */
16906 post_cnt = 0;
4f774513 16907
0794d601
JS
16908 /* put posted NVME buffer-sgl posted on NVME buffer sgl list */
16909 while (!list_empty(&blck_nblist)) {
16910 list_remove_head(&blck_nblist, lpfc_ncmd,
c490850a 16911 struct lpfc_io_buf, list);
0794d601 16912 if (status) {
c490850a
JS
16913 /* Post error. Mark buffer unavailable. */
16914 lpfc_ncmd->flags |= LPFC_SBUF_NOT_POSTED;
0794d601 16915 } else {
c490850a
JS
16916 /* Post success, Mark buffer available. */
16917 lpfc_ncmd->flags &= ~LPFC_SBUF_NOT_POSTED;
0794d601
JS
16918 lpfc_ncmd->status = IOSTAT_SUCCESS;
16919 num_posted++;
16920 }
16921 list_add_tail(&lpfc_ncmd->list, &nvme_nblist);
16922 }
4f774513 16923 }
0794d601 16924 /* Push NVME buffers with sgl posted to the available list */
5e5b511d
JS
16925 lpfc_io_buf_replenish(phba, &nvme_nblist);
16926
0794d601 16927 return num_posted;
4f774513
JS
16928}
16929
16930/**
16931 * lpfc_fc_frame_check - Check that this frame is a valid frame to handle
16932 * @phba: pointer to lpfc_hba struct that the frame was received on
16933 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
16934 *
16935 * This function checks the fields in the @fc_hdr to see if the FC frame is a
16936 * valid type of frame that the LPFC driver will handle. This function will
16937 * return a zero if the frame is a valid frame or a non zero value when the
16938 * frame does not pass the check.
16939 **/
16940static int
16941lpfc_fc_frame_check(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr)
16942{
474ffb74 16943 /* make rctl_names static to save stack space */
4f774513 16944 struct fc_vft_header *fc_vft_hdr;
546fc854 16945 uint32_t *header = (uint32_t *) fc_hdr;
4f774513 16946
e62245d9
JS
16947#define FC_RCTL_MDS_DIAGS 0xF4
16948
4f774513
JS
16949 switch (fc_hdr->fh_r_ctl) {
16950 case FC_RCTL_DD_UNCAT: /* uncategorized information */
16951 case FC_RCTL_DD_SOL_DATA: /* solicited data */
16952 case FC_RCTL_DD_UNSOL_CTL: /* unsolicited control */
16953 case FC_RCTL_DD_SOL_CTL: /* solicited control or reply */
16954 case FC_RCTL_DD_UNSOL_DATA: /* unsolicited data */
16955 case FC_RCTL_DD_DATA_DESC: /* data descriptor */
16956 case FC_RCTL_DD_UNSOL_CMD: /* unsolicited command */
16957 case FC_RCTL_DD_CMD_STATUS: /* command status */
16958 case FC_RCTL_ELS_REQ: /* extended link services request */
16959 case FC_RCTL_ELS_REP: /* extended link services reply */
16960 case FC_RCTL_ELS4_REQ: /* FC-4 ELS request */
16961 case FC_RCTL_ELS4_REP: /* FC-4 ELS reply */
16962 case FC_RCTL_BA_NOP: /* basic link service NOP */
16963 case FC_RCTL_BA_ABTS: /* basic link service abort */
16964 case FC_RCTL_BA_RMC: /* remove connection */
16965 case FC_RCTL_BA_ACC: /* basic accept */
16966 case FC_RCTL_BA_RJT: /* basic reject */
16967 case FC_RCTL_BA_PRMT:
16968 case FC_RCTL_ACK_1: /* acknowledge_1 */
16969 case FC_RCTL_ACK_0: /* acknowledge_0 */
16970 case FC_RCTL_P_RJT: /* port reject */
16971 case FC_RCTL_F_RJT: /* fabric reject */
16972 case FC_RCTL_P_BSY: /* port busy */
16973 case FC_RCTL_F_BSY: /* fabric busy to data frame */
16974 case FC_RCTL_F_BSYL: /* fabric busy to link control frame */
16975 case FC_RCTL_LCR: /* link credit reset */
ae9e28f3 16976 case FC_RCTL_MDS_DIAGS: /* MDS Diagnostics */
4f774513
JS
16977 case FC_RCTL_END: /* end */
16978 break;
16979 case FC_RCTL_VFTH: /* Virtual Fabric tagging Header */
16980 fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
16981 fc_hdr = &((struct fc_frame_header *)fc_vft_hdr)[1];
16982 return lpfc_fc_frame_check(phba, fc_hdr);
16983 default:
16984 goto drop;
16985 }
ae9e28f3 16986
4f774513
JS
16987 switch (fc_hdr->fh_type) {
16988 case FC_TYPE_BLS:
16989 case FC_TYPE_ELS:
16990 case FC_TYPE_FCP:
16991 case FC_TYPE_CT:
895427bd 16992 case FC_TYPE_NVME:
4f774513
JS
16993 break;
16994 case FC_TYPE_IP:
16995 case FC_TYPE_ILS:
16996 default:
16997 goto drop;
16998 }
546fc854 16999
4f774513 17000 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
78e1d200 17001 "2538 Received frame rctl:x%x, type:x%x, "
88f43a08 17002 "frame Data:%08x %08x %08x %08x %08x %08x %08x\n",
78e1d200
JS
17003 fc_hdr->fh_r_ctl, fc_hdr->fh_type,
17004 be32_to_cpu(header[0]), be32_to_cpu(header[1]),
17005 be32_to_cpu(header[2]), be32_to_cpu(header[3]),
17006 be32_to_cpu(header[4]), be32_to_cpu(header[5]),
17007 be32_to_cpu(header[6]));
4f774513
JS
17008 return 0;
17009drop:
17010 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS,
78e1d200
JS
17011 "2539 Dropped frame rctl:x%x type:x%x\n",
17012 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
4f774513
JS
17013 return 1;
17014}
17015
17016/**
17017 * lpfc_fc_hdr_get_vfi - Get the VFI from an FC frame
17018 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17019 *
17020 * This function processes the FC header to retrieve the VFI from the VF
17021 * header, if one exists. This function will return the VFI if one exists
17022 * or 0 if no VSAN Header exists.
17023 **/
17024static uint32_t
17025lpfc_fc_hdr_get_vfi(struct fc_frame_header *fc_hdr)
17026{
17027 struct fc_vft_header *fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
17028
17029 if (fc_hdr->fh_r_ctl != FC_RCTL_VFTH)
17030 return 0;
17031 return bf_get(fc_vft_hdr_vf_id, fc_vft_hdr);
17032}
17033
17034/**
17035 * lpfc_fc_frame_to_vport - Finds the vport that a frame is destined to
17036 * @phba: Pointer to the HBA structure to search for the vport on
17037 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17038 * @fcfi: The FC Fabric ID that the frame came from
17039 *
17040 * This function searches the @phba for a vport that matches the content of the
17041 * @fc_hdr passed in and the @fcfi. This function uses the @fc_hdr to fetch the
17042 * VFI, if the Virtual Fabric Tagging Header exists, and the DID. This function
17043 * returns the matching vport pointer or NULL if unable to match frame to a
17044 * vport.
17045 **/
17046static struct lpfc_vport *
17047lpfc_fc_frame_to_vport(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr,
895427bd 17048 uint16_t fcfi, uint32_t did)
4f774513
JS
17049{
17050 struct lpfc_vport **vports;
17051 struct lpfc_vport *vport = NULL;
17052 int i;
939723a4 17053
bf08611b
JS
17054 if (did == Fabric_DID)
17055 return phba->pport;
939723a4
JS
17056 if ((phba->pport->fc_flag & FC_PT2PT) &&
17057 !(phba->link_state == LPFC_HBA_READY))
17058 return phba->pport;
17059
4f774513 17060 vports = lpfc_create_vport_work_array(phba);
895427bd 17061 if (vports != NULL) {
4f774513
JS
17062 for (i = 0; i <= phba->max_vpi && vports[i] != NULL; i++) {
17063 if (phba->fcf.fcfi == fcfi &&
17064 vports[i]->vfi == lpfc_fc_hdr_get_vfi(fc_hdr) &&
17065 vports[i]->fc_myDID == did) {
17066 vport = vports[i];
17067 break;
17068 }
17069 }
895427bd 17070 }
4f774513
JS
17071 lpfc_destroy_vport_work_array(phba, vports);
17072 return vport;
17073}
17074
45ed1190
JS
17075/**
17076 * lpfc_update_rcv_time_stamp - Update vport's rcv seq time stamp
17077 * @vport: The vport to work on.
17078 *
17079 * This function updates the receive sequence time stamp for this vport. The
17080 * receive sequence time stamp indicates the time that the last frame of the
17081 * the sequence that has been idle for the longest amount of time was received.
17082 * the driver uses this time stamp to indicate if any received sequences have
17083 * timed out.
17084 **/
5d8b8167 17085static void
45ed1190
JS
17086lpfc_update_rcv_time_stamp(struct lpfc_vport *vport)
17087{
17088 struct lpfc_dmabuf *h_buf;
17089 struct hbq_dmabuf *dmabuf = NULL;
17090
17091 /* get the oldest sequence on the rcv list */
17092 h_buf = list_get_first(&vport->rcv_buffer_list,
17093 struct lpfc_dmabuf, list);
17094 if (!h_buf)
17095 return;
17096 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17097 vport->rcv_buffer_time_stamp = dmabuf->time_stamp;
17098}
17099
17100/**
17101 * lpfc_cleanup_rcv_buffers - Cleans up all outstanding receive sequences.
17102 * @vport: The vport that the received sequences were sent to.
17103 *
17104 * This function cleans up all outstanding received sequences. This is called
17105 * by the driver when a link event or user action invalidates all the received
17106 * sequences.
17107 **/
17108void
17109lpfc_cleanup_rcv_buffers(struct lpfc_vport *vport)
17110{
17111 struct lpfc_dmabuf *h_buf, *hnext;
17112 struct lpfc_dmabuf *d_buf, *dnext;
17113 struct hbq_dmabuf *dmabuf = NULL;
17114
17115 /* start with the oldest sequence on the rcv list */
17116 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17117 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17118 list_del_init(&dmabuf->hbuf.list);
17119 list_for_each_entry_safe(d_buf, dnext,
17120 &dmabuf->dbuf.list, list) {
17121 list_del_init(&d_buf->list);
17122 lpfc_in_buf_free(vport->phba, d_buf);
17123 }
17124 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17125 }
17126}
17127
17128/**
17129 * lpfc_rcv_seq_check_edtov - Cleans up timed out receive sequences.
17130 * @vport: The vport that the received sequences were sent to.
17131 *
17132 * This function determines whether any received sequences have timed out by
17133 * first checking the vport's rcv_buffer_time_stamp. If this time_stamp
17134 * indicates that there is at least one timed out sequence this routine will
17135 * go through the received sequences one at a time from most inactive to most
17136 * active to determine which ones need to be cleaned up. Once it has determined
17137 * that a sequence needs to be cleaned up it will simply free up the resources
17138 * without sending an abort.
17139 **/
17140void
17141lpfc_rcv_seq_check_edtov(struct lpfc_vport *vport)
17142{
17143 struct lpfc_dmabuf *h_buf, *hnext;
17144 struct lpfc_dmabuf *d_buf, *dnext;
17145 struct hbq_dmabuf *dmabuf = NULL;
17146 unsigned long timeout;
17147 int abort_count = 0;
17148
17149 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17150 vport->rcv_buffer_time_stamp);
17151 if (list_empty(&vport->rcv_buffer_list) ||
17152 time_before(jiffies, timeout))
17153 return;
17154 /* start with the oldest sequence on the rcv list */
17155 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17156 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17157 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17158 dmabuf->time_stamp);
17159 if (time_before(jiffies, timeout))
17160 break;
17161 abort_count++;
17162 list_del_init(&dmabuf->hbuf.list);
17163 list_for_each_entry_safe(d_buf, dnext,
17164 &dmabuf->dbuf.list, list) {
17165 list_del_init(&d_buf->list);
17166 lpfc_in_buf_free(vport->phba, d_buf);
17167 }
17168 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17169 }
17170 if (abort_count)
17171 lpfc_update_rcv_time_stamp(vport);
17172}
17173
4f774513
JS
17174/**
17175 * lpfc_fc_frame_add - Adds a frame to the vport's list of received sequences
17176 * @dmabuf: pointer to a dmabuf that describes the hdr and data of the FC frame
17177 *
17178 * This function searches through the existing incomplete sequences that have
17179 * been sent to this @vport. If the frame matches one of the incomplete
17180 * sequences then the dbuf in the @dmabuf is added to the list of frames that
17181 * make up that sequence. If no sequence is found that matches this frame then
17182 * the function will add the hbuf in the @dmabuf to the @vport's rcv_buffer_list
17183 * This function returns a pointer to the first dmabuf in the sequence list that
17184 * the frame was linked to.
17185 **/
17186static struct hbq_dmabuf *
17187lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17188{
17189 struct fc_frame_header *new_hdr;
17190 struct fc_frame_header *temp_hdr;
17191 struct lpfc_dmabuf *d_buf;
17192 struct lpfc_dmabuf *h_buf;
17193 struct hbq_dmabuf *seq_dmabuf = NULL;
17194 struct hbq_dmabuf *temp_dmabuf = NULL;
4360ca9c 17195 uint8_t found = 0;
4f774513 17196
4d9ab994 17197 INIT_LIST_HEAD(&dmabuf->dbuf.list);
45ed1190 17198 dmabuf->time_stamp = jiffies;
4f774513 17199 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
4360ca9c 17200
4f774513
JS
17201 /* Use the hdr_buf to find the sequence that this frame belongs to */
17202 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17203 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17204 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17205 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17206 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17207 continue;
17208 /* found a pending sequence that matches this frame */
17209 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17210 break;
17211 }
17212 if (!seq_dmabuf) {
17213 /*
17214 * This indicates first frame received for this sequence.
17215 * Queue the buffer on the vport's rcv_buffer_list.
17216 */
17217 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
45ed1190 17218 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17219 return dmabuf;
17220 }
17221 temp_hdr = seq_dmabuf->hbuf.virt;
eeead811
JS
17222 if (be16_to_cpu(new_hdr->fh_seq_cnt) <
17223 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4d9ab994
JS
17224 list_del_init(&seq_dmabuf->hbuf.list);
17225 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
17226 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
45ed1190 17227 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17228 return dmabuf;
17229 }
45ed1190
JS
17230 /* move this sequence to the tail to indicate a young sequence */
17231 list_move_tail(&seq_dmabuf->hbuf.list, &vport->rcv_buffer_list);
17232 seq_dmabuf->time_stamp = jiffies;
17233 lpfc_update_rcv_time_stamp(vport);
eeead811
JS
17234 if (list_empty(&seq_dmabuf->dbuf.list)) {
17235 temp_hdr = dmabuf->hbuf.virt;
17236 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
17237 return seq_dmabuf;
17238 }
4f774513 17239 /* find the correct place in the sequence to insert this frame */
4360ca9c
JS
17240 d_buf = list_entry(seq_dmabuf->dbuf.list.prev, typeof(*d_buf), list);
17241 while (!found) {
4f774513
JS
17242 temp_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17243 temp_hdr = (struct fc_frame_header *)temp_dmabuf->hbuf.virt;
17244 /*
17245 * If the frame's sequence count is greater than the frame on
17246 * the list then insert the frame right after this frame
17247 */
eeead811
JS
17248 if (be16_to_cpu(new_hdr->fh_seq_cnt) >
17249 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4f774513 17250 list_add(&dmabuf->dbuf.list, &temp_dmabuf->dbuf.list);
4360ca9c
JS
17251 found = 1;
17252 break;
4f774513 17253 }
4360ca9c
JS
17254
17255 if (&d_buf->list == &seq_dmabuf->dbuf.list)
17256 break;
17257 d_buf = list_entry(d_buf->list.prev, typeof(*d_buf), list);
4f774513 17258 }
4360ca9c
JS
17259
17260 if (found)
17261 return seq_dmabuf;
4f774513
JS
17262 return NULL;
17263}
17264
6669f9bb
JS
17265/**
17266 * lpfc_sli4_abort_partial_seq - Abort partially assembled unsol sequence
17267 * @vport: pointer to a vitural port
17268 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17269 *
17270 * This function tries to abort from the partially assembed sequence, described
17271 * by the information from basic abbort @dmabuf. It checks to see whether such
17272 * partially assembled sequence held by the driver. If so, it shall free up all
17273 * the frames from the partially assembled sequence.
17274 *
17275 * Return
17276 * true -- if there is matching partially assembled sequence present and all
17277 * the frames freed with the sequence;
17278 * false -- if there is no matching partially assembled sequence present so
17279 * nothing got aborted in the lower layer driver
17280 **/
17281static bool
17282lpfc_sli4_abort_partial_seq(struct lpfc_vport *vport,
17283 struct hbq_dmabuf *dmabuf)
17284{
17285 struct fc_frame_header *new_hdr;
17286 struct fc_frame_header *temp_hdr;
17287 struct lpfc_dmabuf *d_buf, *n_buf, *h_buf;
17288 struct hbq_dmabuf *seq_dmabuf = NULL;
17289
17290 /* Use the hdr_buf to find the sequence that matches this frame */
17291 INIT_LIST_HEAD(&dmabuf->dbuf.list);
17292 INIT_LIST_HEAD(&dmabuf->hbuf.list);
17293 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17294 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17295 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17296 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17297 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17298 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17299 continue;
17300 /* found a pending sequence that matches this frame */
17301 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17302 break;
17303 }
17304
17305 /* Free up all the frames from the partially assembled sequence */
17306 if (seq_dmabuf) {
17307 list_for_each_entry_safe(d_buf, n_buf,
17308 &seq_dmabuf->dbuf.list, list) {
17309 list_del_init(&d_buf->list);
17310 lpfc_in_buf_free(vport->phba, d_buf);
17311 }
17312 return true;
17313 }
17314 return false;
17315}
17316
6dd9e31c
JS
17317/**
17318 * lpfc_sli4_abort_ulp_seq - Abort assembled unsol sequence from ulp
17319 * @vport: pointer to a vitural port
17320 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17321 *
17322 * This function tries to abort from the assembed sequence from upper level
17323 * protocol, described by the information from basic abbort @dmabuf. It
17324 * checks to see whether such pending context exists at upper level protocol.
17325 * If so, it shall clean up the pending context.
17326 *
17327 * Return
17328 * true -- if there is matching pending context of the sequence cleaned
17329 * at ulp;
17330 * false -- if there is no matching pending context of the sequence present
17331 * at ulp.
17332 **/
17333static bool
17334lpfc_sli4_abort_ulp_seq(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17335{
17336 struct lpfc_hba *phba = vport->phba;
17337 int handled;
17338
17339 /* Accepting abort at ulp with SLI4 only */
17340 if (phba->sli_rev < LPFC_SLI_REV4)
17341 return false;
17342
17343 /* Register all caring upper level protocols to attend abort */
17344 handled = lpfc_ct_handle_unsol_abort(phba, dmabuf);
17345 if (handled)
17346 return true;
17347
17348 return false;
17349}
17350
6669f9bb 17351/**
546fc854 17352 * lpfc_sli4_seq_abort_rsp_cmpl - BLS ABORT RSP seq abort iocb complete handler
6669f9bb
JS
17353 * @phba: Pointer to HBA context object.
17354 * @cmd_iocbq: pointer to the command iocbq structure.
17355 * @rsp_iocbq: pointer to the response iocbq structure.
17356 *
546fc854 17357 * This function handles the sequence abort response iocb command complete
6669f9bb
JS
17358 * event. It properly releases the memory allocated to the sequence abort
17359 * accept iocb.
17360 **/
17361static void
546fc854 17362lpfc_sli4_seq_abort_rsp_cmpl(struct lpfc_hba *phba,
6669f9bb
JS
17363 struct lpfc_iocbq *cmd_iocbq,
17364 struct lpfc_iocbq *rsp_iocbq)
17365{
6dd9e31c
JS
17366 struct lpfc_nodelist *ndlp;
17367
17368 if (cmd_iocbq) {
17369 ndlp = (struct lpfc_nodelist *)cmd_iocbq->context1;
17370 lpfc_nlp_put(ndlp);
17371 lpfc_nlp_not_used(ndlp);
6669f9bb 17372 lpfc_sli_release_iocbq(phba, cmd_iocbq);
6dd9e31c 17373 }
6b5151fd
JS
17374
17375 /* Failure means BLS ABORT RSP did not get delivered to remote node*/
17376 if (rsp_iocbq && rsp_iocbq->iocb.ulpStatus)
17377 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17378 "3154 BLS ABORT RSP failed, data: x%x/x%x\n",
17379 rsp_iocbq->iocb.ulpStatus,
17380 rsp_iocbq->iocb.un.ulpWord[4]);
6669f9bb
JS
17381}
17382
6d368e53
JS
17383/**
17384 * lpfc_sli4_xri_inrange - check xri is in range of xris owned by driver.
17385 * @phba: Pointer to HBA context object.
17386 * @xri: xri id in transaction.
17387 *
17388 * This function validates the xri maps to the known range of XRIs allocated an
17389 * used by the driver.
17390 **/
7851fe2c 17391uint16_t
6d368e53
JS
17392lpfc_sli4_xri_inrange(struct lpfc_hba *phba,
17393 uint16_t xri)
17394{
a2fc4aef 17395 uint16_t i;
6d368e53
JS
17396
17397 for (i = 0; i < phba->sli4_hba.max_cfg_param.max_xri; i++) {
17398 if (xri == phba->sli4_hba.xri_ids[i])
17399 return i;
17400 }
17401 return NO_XRI;
17402}
17403
6669f9bb 17404/**
546fc854 17405 * lpfc_sli4_seq_abort_rsp - bls rsp to sequence abort
6669f9bb
JS
17406 * @phba: Pointer to HBA context object.
17407 * @fc_hdr: pointer to a FC frame header.
17408 *
546fc854 17409 * This function sends a basic response to a previous unsol sequence abort
6669f9bb
JS
17410 * event after aborting the sequence handling.
17411 **/
86c67379 17412void
6dd9e31c
JS
17413lpfc_sli4_seq_abort_rsp(struct lpfc_vport *vport,
17414 struct fc_frame_header *fc_hdr, bool aborted)
6669f9bb 17415{
6dd9e31c 17416 struct lpfc_hba *phba = vport->phba;
6669f9bb
JS
17417 struct lpfc_iocbq *ctiocb = NULL;
17418 struct lpfc_nodelist *ndlp;
ee0f4fe1 17419 uint16_t oxid, rxid, xri, lxri;
5ffc266e 17420 uint32_t sid, fctl;
6669f9bb 17421 IOCB_t *icmd;
546fc854 17422 int rc;
6669f9bb
JS
17423
17424 if (!lpfc_is_link_up(phba))
17425 return;
17426
17427 sid = sli4_sid_from_fc_hdr(fc_hdr);
17428 oxid = be16_to_cpu(fc_hdr->fh_ox_id);
5ffc266e 17429 rxid = be16_to_cpu(fc_hdr->fh_rx_id);
6669f9bb 17430
6dd9e31c 17431 ndlp = lpfc_findnode_did(vport, sid);
6669f9bb 17432 if (!ndlp) {
9d3d340d 17433 ndlp = lpfc_nlp_init(vport, sid);
6dd9e31c
JS
17434 if (!ndlp) {
17435 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17436 "1268 Failed to allocate ndlp for "
17437 "oxid:x%x SID:x%x\n", oxid, sid);
17438 return;
17439 }
6dd9e31c
JS
17440 /* Put ndlp onto pport node list */
17441 lpfc_enqueue_node(vport, ndlp);
17442 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
17443 /* re-setup ndlp without removing from node list */
17444 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
17445 if (!ndlp) {
17446 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17447 "3275 Failed to active ndlp found "
17448 "for oxid:x%x SID:x%x\n", oxid, sid);
17449 return;
17450 }
6669f9bb
JS
17451 }
17452
546fc854 17453 /* Allocate buffer for rsp iocb */
6669f9bb
JS
17454 ctiocb = lpfc_sli_get_iocbq(phba);
17455 if (!ctiocb)
17456 return;
17457
5ffc266e
JS
17458 /* Extract the F_CTL field from FC_HDR */
17459 fctl = sli4_fctl_from_fc_hdr(fc_hdr);
17460
6669f9bb 17461 icmd = &ctiocb->iocb;
6669f9bb 17462 icmd->un.xseq64.bdl.bdeSize = 0;
5ffc266e 17463 icmd->un.xseq64.bdl.ulpIoTag32 = 0;
6669f9bb
JS
17464 icmd->un.xseq64.w5.hcsw.Dfctl = 0;
17465 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_ACC;
17466 icmd->un.xseq64.w5.hcsw.Type = FC_TYPE_BLS;
17467
17468 /* Fill in the rest of iocb fields */
17469 icmd->ulpCommand = CMD_XMIT_BLS_RSP64_CX;
17470 icmd->ulpBdeCount = 0;
17471 icmd->ulpLe = 1;
17472 icmd->ulpClass = CLASS3;
6d368e53 17473 icmd->ulpContext = phba->sli4_hba.rpi_ids[ndlp->nlp_rpi];
6dd9e31c 17474 ctiocb->context1 = lpfc_nlp_get(ndlp);
6669f9bb 17475
6669f9bb 17476 ctiocb->vport = phba->pport;
546fc854 17477 ctiocb->iocb_cmpl = lpfc_sli4_seq_abort_rsp_cmpl;
6d368e53 17478 ctiocb->sli4_lxritag = NO_XRI;
546fc854
JS
17479 ctiocb->sli4_xritag = NO_XRI;
17480
ee0f4fe1
JS
17481 if (fctl & FC_FC_EX_CTX)
17482 /* Exchange responder sent the abort so we
17483 * own the oxid.
17484 */
17485 xri = oxid;
17486 else
17487 xri = rxid;
17488 lxri = lpfc_sli4_xri_inrange(phba, xri);
17489 if (lxri != NO_XRI)
17490 lpfc_set_rrq_active(phba, ndlp, lxri,
17491 (xri == oxid) ? rxid : oxid, 0);
6dd9e31c
JS
17492 /* For BA_ABTS from exchange responder, if the logical xri with
17493 * the oxid maps to the FCP XRI range, the port no longer has
17494 * that exchange context, send a BLS_RJT. Override the IOCB for
17495 * a BA_RJT.
17496 */
17497 if ((fctl & FC_FC_EX_CTX) &&
895427bd 17498 (lxri > lpfc_sli4_get_iocb_cnt(phba))) {
6dd9e31c
JS
17499 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17500 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17501 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17502 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17503 }
17504
17505 /* If BA_ABTS failed to abort a partially assembled receive sequence,
17506 * the driver no longer has that exchange, send a BLS_RJT. Override
17507 * the IOCB for a BA_RJT.
546fc854 17508 */
6dd9e31c 17509 if (aborted == false) {
546fc854
JS
17510 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17511 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17512 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17513 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17514 }
6669f9bb 17515
5ffc266e
JS
17516 if (fctl & FC_FC_EX_CTX) {
17517 /* ABTS sent by responder to CT exchange, construction
17518 * of BA_ACC will use OX_ID from ABTS for the XRI_TAG
17519 * field and RX_ID from ABTS for RX_ID field.
17520 */
546fc854 17521 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_RSP);
5ffc266e
JS
17522 } else {
17523 /* ABTS sent by initiator to CT exchange, construction
17524 * of BA_ACC will need to allocate a new XRI as for the
f09c3acc 17525 * XRI_TAG field.
5ffc266e 17526 */
546fc854 17527 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_INT);
5ffc266e 17528 }
f09c3acc 17529 bf_set(lpfc_abts_rxid, &icmd->un.bls_rsp, rxid);
546fc854 17530 bf_set(lpfc_abts_oxid, &icmd->un.bls_rsp, oxid);
5ffc266e 17531
546fc854 17532 /* Xmit CT abts response on exchange <xid> */
6dd9e31c
JS
17533 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,
17534 "1200 Send BLS cmd x%x on oxid x%x Data: x%x\n",
17535 icmd->un.xseq64.w5.hcsw.Rctl, oxid, phba->link_state);
546fc854
JS
17536
17537 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, ctiocb, 0);
17538 if (rc == IOCB_ERROR) {
6dd9e31c
JS
17539 lpfc_printf_vlog(vport, KERN_ERR, LOG_ELS,
17540 "2925 Failed to issue CT ABTS RSP x%x on "
17541 "xri x%x, Data x%x\n",
17542 icmd->un.xseq64.w5.hcsw.Rctl, oxid,
17543 phba->link_state);
17544 lpfc_nlp_put(ndlp);
17545 ctiocb->context1 = NULL;
546fc854
JS
17546 lpfc_sli_release_iocbq(phba, ctiocb);
17547 }
6669f9bb
JS
17548}
17549
17550/**
17551 * lpfc_sli4_handle_unsol_abort - Handle sli-4 unsolicited abort event
17552 * @vport: Pointer to the vport on which this sequence was received
17553 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17554 *
17555 * This function handles an SLI-4 unsolicited abort event. If the unsolicited
17556 * receive sequence is only partially assembed by the driver, it shall abort
17557 * the partially assembled frames for the sequence. Otherwise, if the
17558 * unsolicited receive sequence has been completely assembled and passed to
17559 * the Upper Layer Protocol (UPL), it then mark the per oxid status for the
17560 * unsolicited sequence has been aborted. After that, it will issue a basic
17561 * accept to accept the abort.
17562 **/
5d8b8167 17563static void
6669f9bb
JS
17564lpfc_sli4_handle_unsol_abort(struct lpfc_vport *vport,
17565 struct hbq_dmabuf *dmabuf)
17566{
17567 struct lpfc_hba *phba = vport->phba;
17568 struct fc_frame_header fc_hdr;
5ffc266e 17569 uint32_t fctl;
6dd9e31c 17570 bool aborted;
6669f9bb 17571
6669f9bb
JS
17572 /* Make a copy of fc_hdr before the dmabuf being released */
17573 memcpy(&fc_hdr, dmabuf->hbuf.virt, sizeof(struct fc_frame_header));
5ffc266e 17574 fctl = sli4_fctl_from_fc_hdr(&fc_hdr);
6669f9bb 17575
5ffc266e 17576 if (fctl & FC_FC_EX_CTX) {
6dd9e31c
JS
17577 /* ABTS by responder to exchange, no cleanup needed */
17578 aborted = true;
5ffc266e 17579 } else {
6dd9e31c
JS
17580 /* ABTS by initiator to exchange, need to do cleanup */
17581 aborted = lpfc_sli4_abort_partial_seq(vport, dmabuf);
17582 if (aborted == false)
17583 aborted = lpfc_sli4_abort_ulp_seq(vport, dmabuf);
5ffc266e 17584 }
6dd9e31c
JS
17585 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17586
86c67379
JS
17587 if (phba->nvmet_support) {
17588 lpfc_nvmet_rcv_unsol_abort(vport, &fc_hdr);
17589 return;
17590 }
17591
6dd9e31c
JS
17592 /* Respond with BA_ACC or BA_RJT accordingly */
17593 lpfc_sli4_seq_abort_rsp(vport, &fc_hdr, aborted);
6669f9bb
JS
17594}
17595
4f774513
JS
17596/**
17597 * lpfc_seq_complete - Indicates if a sequence is complete
17598 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17599 *
17600 * This function checks the sequence, starting with the frame described by
17601 * @dmabuf, to see if all the frames associated with this sequence are present.
17602 * the frames associated with this sequence are linked to the @dmabuf using the
17603 * dbuf list. This function looks for two major things. 1) That the first frame
17604 * has a sequence count of zero. 2) There is a frame with last frame of sequence
17605 * set. 3) That there are no holes in the sequence count. The function will
17606 * return 1 when the sequence is complete, otherwise it will return 0.
17607 **/
17608static int
17609lpfc_seq_complete(struct hbq_dmabuf *dmabuf)
17610{
17611 struct fc_frame_header *hdr;
17612 struct lpfc_dmabuf *d_buf;
17613 struct hbq_dmabuf *seq_dmabuf;
17614 uint32_t fctl;
17615 int seq_count = 0;
17616
17617 hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17618 /* make sure first fame of sequence has a sequence count of zero */
17619 if (hdr->fh_seq_cnt != seq_count)
17620 return 0;
17621 fctl = (hdr->fh_f_ctl[0] << 16 |
17622 hdr->fh_f_ctl[1] << 8 |
17623 hdr->fh_f_ctl[2]);
17624 /* If last frame of sequence we can return success. */
17625 if (fctl & FC_FC_END_SEQ)
17626 return 1;
17627 list_for_each_entry(d_buf, &dmabuf->dbuf.list, list) {
17628 seq_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17629 hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17630 /* If there is a hole in the sequence count then fail. */
eeead811 17631 if (++seq_count != be16_to_cpu(hdr->fh_seq_cnt))
4f774513
JS
17632 return 0;
17633 fctl = (hdr->fh_f_ctl[0] << 16 |
17634 hdr->fh_f_ctl[1] << 8 |
17635 hdr->fh_f_ctl[2]);
17636 /* If last frame of sequence we can return success. */
17637 if (fctl & FC_FC_END_SEQ)
17638 return 1;
17639 }
17640 return 0;
17641}
17642
17643/**
17644 * lpfc_prep_seq - Prep sequence for ULP processing
17645 * @vport: Pointer to the vport on which this sequence was received
17646 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17647 *
17648 * This function takes a sequence, described by a list of frames, and creates
17649 * a list of iocbq structures to describe the sequence. This iocbq list will be
17650 * used to issue to the generic unsolicited sequence handler. This routine
17651 * returns a pointer to the first iocbq in the list. If the function is unable
17652 * to allocate an iocbq then it throw out the received frames that were not
17653 * able to be described and return a pointer to the first iocbq. If unable to
17654 * allocate any iocbqs (including the first) this function will return NULL.
17655 **/
17656static struct lpfc_iocbq *
17657lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
17658{
7851fe2c 17659 struct hbq_dmabuf *hbq_buf;
4f774513
JS
17660 struct lpfc_dmabuf *d_buf, *n_buf;
17661 struct lpfc_iocbq *first_iocbq, *iocbq;
17662 struct fc_frame_header *fc_hdr;
17663 uint32_t sid;
7851fe2c 17664 uint32_t len, tot_len;
eeead811 17665 struct ulp_bde64 *pbde;
4f774513
JS
17666
17667 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17668 /* remove from receive buffer list */
17669 list_del_init(&seq_dmabuf->hbuf.list);
45ed1190 17670 lpfc_update_rcv_time_stamp(vport);
4f774513 17671 /* get the Remote Port's SID */
6669f9bb 17672 sid = sli4_sid_from_fc_hdr(fc_hdr);
7851fe2c 17673 tot_len = 0;
4f774513
JS
17674 /* Get an iocbq struct to fill in. */
17675 first_iocbq = lpfc_sli_get_iocbq(vport->phba);
17676 if (first_iocbq) {
17677 /* Initialize the first IOCB. */
8fa38513 17678 first_iocbq->iocb.unsli3.rcvsli3.acc_len = 0;
4f774513 17679 first_iocbq->iocb.ulpStatus = IOSTAT_SUCCESS;
895427bd 17680 first_iocbq->vport = vport;
939723a4
JS
17681
17682 /* Check FC Header to see what TYPE of frame we are rcv'ing */
17683 if (sli4_type_from_fc_hdr(fc_hdr) == FC_TYPE_ELS) {
17684 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_ELS64_CX;
17685 first_iocbq->iocb.un.rcvels.parmRo =
17686 sli4_did_from_fc_hdr(fc_hdr);
17687 first_iocbq->iocb.ulpPU = PARM_NPIV_DID;
17688 } else
17689 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_SEQ64_CX;
7851fe2c
JS
17690 first_iocbq->iocb.ulpContext = NO_XRI;
17691 first_iocbq->iocb.unsli3.rcvsli3.ox_id =
17692 be16_to_cpu(fc_hdr->fh_ox_id);
17693 /* iocbq is prepped for internal consumption. Physical vpi. */
17694 first_iocbq->iocb.unsli3.rcvsli3.vpi =
17695 vport->phba->vpi_ids[vport->vpi];
4f774513 17696 /* put the first buffer into the first IOCBq */
48a5a664
JS
17697 tot_len = bf_get(lpfc_rcqe_length,
17698 &seq_dmabuf->cq_event.cqe.rcqe_cmpl);
17699
4f774513
JS
17700 first_iocbq->context2 = &seq_dmabuf->dbuf;
17701 first_iocbq->context3 = NULL;
17702 first_iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17703 if (tot_len > LPFC_DATA_BUF_SIZE)
17704 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17705 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17706 else
17707 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize = tot_len;
17708
4f774513 17709 first_iocbq->iocb.un.rcvels.remoteID = sid;
48a5a664 17710
7851fe2c 17711 first_iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
4f774513
JS
17712 }
17713 iocbq = first_iocbq;
17714 /*
17715 * Each IOCBq can have two Buffers assigned, so go through the list
17716 * of buffers for this sequence and save two buffers in each IOCBq
17717 */
17718 list_for_each_entry_safe(d_buf, n_buf, &seq_dmabuf->dbuf.list, list) {
17719 if (!iocbq) {
17720 lpfc_in_buf_free(vport->phba, d_buf);
17721 continue;
17722 }
17723 if (!iocbq->context3) {
17724 iocbq->context3 = d_buf;
17725 iocbq->iocb.ulpBdeCount++;
7851fe2c
JS
17726 /* We need to get the size out of the right CQE */
17727 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17728 len = bf_get(lpfc_rcqe_length,
17729 &hbq_buf->cq_event.cqe.rcqe_cmpl);
48a5a664
JS
17730 pbde = (struct ulp_bde64 *)
17731 &iocbq->iocb.unsli3.sli3Words[4];
17732 if (len > LPFC_DATA_BUF_SIZE)
17733 pbde->tus.f.bdeSize = LPFC_DATA_BUF_SIZE;
17734 else
17735 pbde->tus.f.bdeSize = len;
17736
7851fe2c
JS
17737 iocbq->iocb.unsli3.rcvsli3.acc_len += len;
17738 tot_len += len;
4f774513
JS
17739 } else {
17740 iocbq = lpfc_sli_get_iocbq(vport->phba);
17741 if (!iocbq) {
17742 if (first_iocbq) {
17743 first_iocbq->iocb.ulpStatus =
17744 IOSTAT_FCP_RSP_ERROR;
17745 first_iocbq->iocb.un.ulpWord[4] =
17746 IOERR_NO_RESOURCES;
17747 }
17748 lpfc_in_buf_free(vport->phba, d_buf);
17749 continue;
17750 }
48a5a664
JS
17751 /* We need to get the size out of the right CQE */
17752 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17753 len = bf_get(lpfc_rcqe_length,
17754 &hbq_buf->cq_event.cqe.rcqe_cmpl);
4f774513
JS
17755 iocbq->context2 = d_buf;
17756 iocbq->context3 = NULL;
17757 iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17758 if (len > LPFC_DATA_BUF_SIZE)
17759 iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17760 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17761 else
17762 iocbq->iocb.un.cont64[0].tus.f.bdeSize = len;
7851fe2c 17763
7851fe2c
JS
17764 tot_len += len;
17765 iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
17766
4f774513
JS
17767 iocbq->iocb.un.rcvels.remoteID = sid;
17768 list_add_tail(&iocbq->list, &first_iocbq->list);
17769 }
17770 }
17771 return first_iocbq;
17772}
17773
6669f9bb
JS
17774static void
17775lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *vport,
17776 struct hbq_dmabuf *seq_dmabuf)
17777{
17778 struct fc_frame_header *fc_hdr;
17779 struct lpfc_iocbq *iocbq, *curr_iocb, *next_iocb;
17780 struct lpfc_hba *phba = vport->phba;
17781
17782 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17783 iocbq = lpfc_prep_seq(vport, seq_dmabuf);
17784 if (!iocbq) {
17785 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17786 "2707 Ring %d handler: Failed to allocate "
17787 "iocb Rctl x%x Type x%x received\n",
17788 LPFC_ELS_RING,
17789 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17790 return;
17791 }
17792 if (!lpfc_complete_unsol_iocb(phba,
895427bd 17793 phba->sli4_hba.els_wq->pring,
6669f9bb
JS
17794 iocbq, fc_hdr->fh_r_ctl,
17795 fc_hdr->fh_type))
6d368e53 17796 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6669f9bb
JS
17797 "2540 Ring %d handler: unexpected Rctl "
17798 "x%x Type x%x received\n",
17799 LPFC_ELS_RING,
17800 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17801
17802 /* Free iocb created in lpfc_prep_seq */
17803 list_for_each_entry_safe(curr_iocb, next_iocb,
17804 &iocbq->list, list) {
17805 list_del_init(&curr_iocb->list);
17806 lpfc_sli_release_iocbq(phba, curr_iocb);
17807 }
17808 lpfc_sli_release_iocbq(phba, iocbq);
17809}
17810
ae9e28f3
JS
17811static void
17812lpfc_sli4_mds_loopback_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
17813 struct lpfc_iocbq *rspiocb)
17814{
17815 struct lpfc_dmabuf *pcmd = cmdiocb->context2;
17816
17817 if (pcmd && pcmd->virt)
771db5c0 17818 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3
JS
17819 kfree(pcmd);
17820 lpfc_sli_release_iocbq(phba, cmdiocb);
e817e5d7 17821 lpfc_drain_txq(phba);
ae9e28f3
JS
17822}
17823
17824static void
17825lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
17826 struct hbq_dmabuf *dmabuf)
17827{
17828 struct fc_frame_header *fc_hdr;
17829 struct lpfc_hba *phba = vport->phba;
17830 struct lpfc_iocbq *iocbq = NULL;
17831 union lpfc_wqe *wqe;
17832 struct lpfc_dmabuf *pcmd = NULL;
17833 uint32_t frame_len;
17834 int rc;
e817e5d7 17835 unsigned long iflags;
ae9e28f3
JS
17836
17837 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17838 frame_len = bf_get(lpfc_rcqe_length, &dmabuf->cq_event.cqe.rcqe_cmpl);
17839
17840 /* Send the received frame back */
17841 iocbq = lpfc_sli_get_iocbq(phba);
e817e5d7
JS
17842 if (!iocbq) {
17843 /* Queue cq event and wakeup worker thread to process it */
17844 spin_lock_irqsave(&phba->hbalock, iflags);
17845 list_add_tail(&dmabuf->cq_event.list,
17846 &phba->sli4_hba.sp_queue_event);
17847 phba->hba_flag |= HBA_SP_QUEUE_EVT;
17848 spin_unlock_irqrestore(&phba->hbalock, iflags);
17849 lpfc_worker_wake_up(phba);
17850 return;
17851 }
ae9e28f3
JS
17852
17853 /* Allocate buffer for command payload */
17854 pcmd = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
17855 if (pcmd)
771db5c0 17856 pcmd->virt = dma_pool_alloc(phba->lpfc_drb_pool, GFP_KERNEL,
ae9e28f3
JS
17857 &pcmd->phys);
17858 if (!pcmd || !pcmd->virt)
17859 goto exit;
17860
17861 INIT_LIST_HEAD(&pcmd->list);
17862
17863 /* copyin the payload */
17864 memcpy(pcmd->virt, dmabuf->dbuf.virt, frame_len);
17865
17866 /* fill in BDE's for command */
17867 iocbq->iocb.un.xseq64.bdl.addrHigh = putPaddrHigh(pcmd->phys);
17868 iocbq->iocb.un.xseq64.bdl.addrLow = putPaddrLow(pcmd->phys);
17869 iocbq->iocb.un.xseq64.bdl.bdeFlags = BUFF_TYPE_BDE_64;
17870 iocbq->iocb.un.xseq64.bdl.bdeSize = frame_len;
17871
17872 iocbq->context2 = pcmd;
17873 iocbq->vport = vport;
17874 iocbq->iocb_flag &= ~LPFC_FIP_ELS_ID_MASK;
17875 iocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
17876
17877 /*
17878 * Setup rest of the iocb as though it were a WQE
17879 * Build the SEND_FRAME WQE
17880 */
17881 wqe = (union lpfc_wqe *)&iocbq->iocb;
17882
17883 wqe->send_frame.frame_len = frame_len;
17884 wqe->send_frame.fc_hdr_wd0 = be32_to_cpu(*((uint32_t *)fc_hdr));
17885 wqe->send_frame.fc_hdr_wd1 = be32_to_cpu(*((uint32_t *)fc_hdr + 1));
17886 wqe->send_frame.fc_hdr_wd2 = be32_to_cpu(*((uint32_t *)fc_hdr + 2));
17887 wqe->send_frame.fc_hdr_wd3 = be32_to_cpu(*((uint32_t *)fc_hdr + 3));
17888 wqe->send_frame.fc_hdr_wd4 = be32_to_cpu(*((uint32_t *)fc_hdr + 4));
17889 wqe->send_frame.fc_hdr_wd5 = be32_to_cpu(*((uint32_t *)fc_hdr + 5));
17890
17891 iocbq->iocb.ulpCommand = CMD_SEND_FRAME;
17892 iocbq->iocb.ulpLe = 1;
17893 iocbq->iocb_cmpl = lpfc_sli4_mds_loopback_cmpl;
17894 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, iocbq, 0);
17895 if (rc == IOCB_ERROR)
17896 goto exit;
17897
17898 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17899 return;
17900
17901exit:
17902 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
17903 "2023 Unable to process MDS loopback frame\n");
17904 if (pcmd && pcmd->virt)
771db5c0 17905 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3 17906 kfree(pcmd);
401bb416
DK
17907 if (iocbq)
17908 lpfc_sli_release_iocbq(phba, iocbq);
ae9e28f3
JS
17909 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17910}
17911
4f774513
JS
17912/**
17913 * lpfc_sli4_handle_received_buffer - Handle received buffers from firmware
17914 * @phba: Pointer to HBA context object.
17915 *
17916 * This function is called with no lock held. This function processes all
17917 * the received buffers and gives it to upper layers when a received buffer
17918 * indicates that it is the final frame in the sequence. The interrupt
895427bd 17919 * service routine processes received buffers at interrupt contexts.
4f774513
JS
17920 * Worker thread calls lpfc_sli4_handle_received_buffer, which will call the
17921 * appropriate receive function when the final frame in a sequence is received.
17922 **/
4d9ab994
JS
17923void
17924lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,
17925 struct hbq_dmabuf *dmabuf)
4f774513 17926{
4d9ab994 17927 struct hbq_dmabuf *seq_dmabuf;
4f774513
JS
17928 struct fc_frame_header *fc_hdr;
17929 struct lpfc_vport *vport;
17930 uint32_t fcfi;
939723a4 17931 uint32_t did;
4f774513 17932
4f774513 17933 /* Process each received buffer */
4d9ab994 17934 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
2ea259ee 17935
e817e5d7
JS
17936 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
17937 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
17938 vport = phba->pport;
17939 /* Handle MDS Loopback frames */
17940 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
17941 return;
17942 }
17943
4d9ab994
JS
17944 /* check to see if this a valid type of frame */
17945 if (lpfc_fc_frame_check(phba, fc_hdr)) {
17946 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17947 return;
17948 }
2ea259ee 17949
7851fe2c
JS
17950 if ((bf_get(lpfc_cqe_code,
17951 &dmabuf->cq_event.cqe.rcqe_cmpl) == CQE_CODE_RECEIVE_V1))
17952 fcfi = bf_get(lpfc_rcqe_fcf_id_v1,
17953 &dmabuf->cq_event.cqe.rcqe_cmpl);
17954 else
17955 fcfi = bf_get(lpfc_rcqe_fcf_id,
17956 &dmabuf->cq_event.cqe.rcqe_cmpl);
939723a4 17957
e62245d9
JS
17958 if (fc_hdr->fh_r_ctl == 0xF4 && fc_hdr->fh_type == 0xFF) {
17959 vport = phba->pport;
17960 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
17961 "2023 MDS Loopback %d bytes\n",
17962 bf_get(lpfc_rcqe_length,
17963 &dmabuf->cq_event.cqe.rcqe_cmpl));
17964 /* Handle MDS Loopback frames */
17965 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
17966 return;
17967 }
17968
895427bd
JS
17969 /* d_id this frame is directed to */
17970 did = sli4_did_from_fc_hdr(fc_hdr);
17971
17972 vport = lpfc_fc_frame_to_vport(phba, fc_hdr, fcfi, did);
939723a4 17973 if (!vport) {
4d9ab994
JS
17974 /* throw out the frame */
17975 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17976 return;
17977 }
939723a4 17978
939723a4
JS
17979 /* vport is registered unless we rcv a FLOGI directed to Fabric_DID */
17980 if (!(vport->vpi_state & LPFC_VPI_REGISTERED) &&
17981 (did != Fabric_DID)) {
17982 /*
17983 * Throw out the frame if we are not pt2pt.
17984 * The pt2pt protocol allows for discovery frames
17985 * to be received without a registered VPI.
17986 */
17987 if (!(vport->fc_flag & FC_PT2PT) ||
17988 (phba->link_state == LPFC_HBA_READY)) {
17989 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17990 return;
17991 }
17992 }
17993
6669f9bb
JS
17994 /* Handle the basic abort sequence (BA_ABTS) event */
17995 if (fc_hdr->fh_r_ctl == FC_RCTL_BA_ABTS) {
17996 lpfc_sli4_handle_unsol_abort(vport, dmabuf);
17997 return;
17998 }
17999
4d9ab994
JS
18000 /* Link this frame */
18001 seq_dmabuf = lpfc_fc_frame_add(vport, dmabuf);
18002 if (!seq_dmabuf) {
18003 /* unable to add frame to vport - throw it out */
18004 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18005 return;
18006 }
18007 /* If not last frame in sequence continue processing frames. */
def9c7a9 18008 if (!lpfc_seq_complete(seq_dmabuf))
4d9ab994 18009 return;
def9c7a9 18010
6669f9bb
JS
18011 /* Send the complete sequence to the upper layer protocol */
18012 lpfc_sli4_send_seq_to_ulp(vport, seq_dmabuf);
4f774513 18013}
6fb120a7
JS
18014
18015/**
18016 * lpfc_sli4_post_all_rpi_hdrs - Post the rpi header memory region to the port
18017 * @phba: pointer to lpfc hba data structure.
18018 *
18019 * This routine is invoked to post rpi header templates to the
18020 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18021 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18022 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18023 *
18024 * This routine does not require any locks. It's usage is expected
18025 * to be driver load or reset recovery when the driver is
18026 * sequential.
18027 *
18028 * Return codes
af901ca1 18029 * 0 - successful
d439d286 18030 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18031 * When this error occurs, the driver is not guaranteed
18032 * to have any rpi regions posted to the device and
18033 * must either attempt to repost the regions or take a
18034 * fatal error.
18035 **/
18036int
18037lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *phba)
18038{
18039 struct lpfc_rpi_hdr *rpi_page;
18040 uint32_t rc = 0;
6d368e53
JS
18041 uint16_t lrpi = 0;
18042
18043 /* SLI4 ports that support extents do not require RPI headers. */
18044 if (!phba->sli4_hba.rpi_hdrs_in_use)
18045 goto exit;
18046 if (phba->sli4_hba.extents_in_use)
18047 return -EIO;
6fb120a7 18048
6fb120a7 18049 list_for_each_entry(rpi_page, &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6d368e53
JS
18050 /*
18051 * Assign the rpi headers a physical rpi only if the driver
18052 * has not initialized those resources. A port reset only
18053 * needs the headers posted.
18054 */
18055 if (bf_get(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags) !=
18056 LPFC_RPI_RSRC_RDY)
18057 rpi_page->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
18058
6fb120a7
JS
18059 rc = lpfc_sli4_post_rpi_hdr(phba, rpi_page);
18060 if (rc != MBX_SUCCESS) {
18061 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18062 "2008 Error %d posting all rpi "
18063 "headers\n", rc);
18064 rc = -EIO;
18065 break;
18066 }
18067 }
18068
6d368e53
JS
18069 exit:
18070 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags,
18071 LPFC_RPI_RSRC_RDY);
6fb120a7
JS
18072 return rc;
18073}
18074
18075/**
18076 * lpfc_sli4_post_rpi_hdr - Post an rpi header memory region to the port
18077 * @phba: pointer to lpfc hba data structure.
18078 * @rpi_page: pointer to the rpi memory region.
18079 *
18080 * This routine is invoked to post a single rpi header to the
18081 * HBA consistent with the SLI-4 interface spec. This memory region
18082 * maps up to 64 rpi context regions.
18083 *
18084 * Return codes
af901ca1 18085 * 0 - successful
d439d286
JS
18086 * -ENOMEM - No available memory
18087 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18088 **/
18089int
18090lpfc_sli4_post_rpi_hdr(struct lpfc_hba *phba, struct lpfc_rpi_hdr *rpi_page)
18091{
18092 LPFC_MBOXQ_t *mboxq;
18093 struct lpfc_mbx_post_hdr_tmpl *hdr_tmpl;
18094 uint32_t rc = 0;
6fb120a7
JS
18095 uint32_t shdr_status, shdr_add_status;
18096 union lpfc_sli4_cfg_shdr *shdr;
18097
6d368e53
JS
18098 /* SLI4 ports that support extents do not require RPI headers. */
18099 if (!phba->sli4_hba.rpi_hdrs_in_use)
18100 return rc;
18101 if (phba->sli4_hba.extents_in_use)
18102 return -EIO;
18103
6fb120a7
JS
18104 /* The port is notified of the header region via a mailbox command. */
18105 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18106 if (!mboxq) {
18107 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18108 "2001 Unable to allocate memory for issuing "
18109 "SLI_CONFIG_SPECIAL mailbox command\n");
18110 return -ENOMEM;
18111 }
18112
18113 /* Post all rpi memory regions to the port. */
18114 hdr_tmpl = &mboxq->u.mqe.un.hdr_tmpl;
6fb120a7
JS
18115 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18116 LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE,
18117 sizeof(struct lpfc_mbx_post_hdr_tmpl) -
fedd3b7b
JS
18118 sizeof(struct lpfc_sli4_cfg_mhdr),
18119 LPFC_SLI4_MBX_EMBED);
6d368e53
JS
18120
18121
18122 /* Post the physical rpi to the port for this rpi header. */
6fb120a7
JS
18123 bf_set(lpfc_mbx_post_hdr_tmpl_rpi_offset, hdr_tmpl,
18124 rpi_page->start_rpi);
6d368e53
JS
18125 bf_set(lpfc_mbx_post_hdr_tmpl_page_cnt,
18126 hdr_tmpl, rpi_page->page_count);
18127
6fb120a7
JS
18128 hdr_tmpl->rpi_paddr_lo = putPaddrLow(rpi_page->dmabuf->phys);
18129 hdr_tmpl->rpi_paddr_hi = putPaddrHigh(rpi_page->dmabuf->phys);
f1126688 18130 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6fb120a7
JS
18131 shdr = (union lpfc_sli4_cfg_shdr *) &hdr_tmpl->header.cfg_shdr;
18132 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18133 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18134 if (rc != MBX_TIMEOUT)
18135 mempool_free(mboxq, phba->mbox_mem_pool);
18136 if (shdr_status || shdr_add_status || rc) {
18137 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18138 "2514 POST_RPI_HDR mailbox failed with "
18139 "status x%x add_status x%x, mbx status x%x\n",
18140 shdr_status, shdr_add_status, rc);
18141 rc = -ENXIO;
845d9e8d
JS
18142 } else {
18143 /*
18144 * The next_rpi stores the next logical module-64 rpi value used
18145 * to post physical rpis in subsequent rpi postings.
18146 */
18147 spin_lock_irq(&phba->hbalock);
18148 phba->sli4_hba.next_rpi = rpi_page->next_rpi;
18149 spin_unlock_irq(&phba->hbalock);
6fb120a7
JS
18150 }
18151 return rc;
18152}
18153
18154/**
18155 * lpfc_sli4_alloc_rpi - Get an available rpi in the device's range
18156 * @phba: pointer to lpfc hba data structure.
18157 *
18158 * This routine is invoked to post rpi header templates to the
18159 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18160 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18161 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18162 *
18163 * Returns
af901ca1 18164 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
6fb120a7
JS
18165 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
18166 **/
18167int
18168lpfc_sli4_alloc_rpi(struct lpfc_hba *phba)
18169{
6d368e53
JS
18170 unsigned long rpi;
18171 uint16_t max_rpi, rpi_limit;
18172 uint16_t rpi_remaining, lrpi = 0;
6fb120a7 18173 struct lpfc_rpi_hdr *rpi_hdr;
4902b381 18174 unsigned long iflag;
6fb120a7 18175
6fb120a7 18176 /*
6d368e53
JS
18177 * Fetch the next logical rpi. Because this index is logical,
18178 * the driver starts at 0 each time.
6fb120a7 18179 */
4902b381 18180 spin_lock_irqsave(&phba->hbalock, iflag);
be6bb941
JS
18181 max_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
18182 rpi_limit = phba->sli4_hba.next_rpi;
18183
6d368e53
JS
18184 rpi = find_next_zero_bit(phba->sli4_hba.rpi_bmask, rpi_limit, 0);
18185 if (rpi >= rpi_limit)
6fb120a7
JS
18186 rpi = LPFC_RPI_ALLOC_ERROR;
18187 else {
18188 set_bit(rpi, phba->sli4_hba.rpi_bmask);
18189 phba->sli4_hba.max_cfg_param.rpi_used++;
18190 phba->sli4_hba.rpi_count++;
18191 }
0f154226
JS
18192 lpfc_printf_log(phba, KERN_INFO,
18193 LOG_NODE | LOG_DISCOVERY,
18194 "0001 Allocated rpi:x%x max:x%x lim:x%x\n",
be6bb941 18195 (int) rpi, max_rpi, rpi_limit);
6fb120a7
JS
18196
18197 /*
18198 * Don't try to allocate more rpi header regions if the device limit
6d368e53 18199 * has been exhausted.
6fb120a7
JS
18200 */
18201 if ((rpi == LPFC_RPI_ALLOC_ERROR) &&
18202 (phba->sli4_hba.rpi_count >= max_rpi)) {
4902b381 18203 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18204 return rpi;
18205 }
18206
6d368e53
JS
18207 /*
18208 * RPI header postings are not required for SLI4 ports capable of
18209 * extents.
18210 */
18211 if (!phba->sli4_hba.rpi_hdrs_in_use) {
4902b381 18212 spin_unlock_irqrestore(&phba->hbalock, iflag);
6d368e53
JS
18213 return rpi;
18214 }
18215
6fb120a7
JS
18216 /*
18217 * If the driver is running low on rpi resources, allocate another
18218 * page now. Note that the next_rpi value is used because
18219 * it represents how many are actually in use whereas max_rpi notes
18220 * how many are supported max by the device.
18221 */
6d368e53 18222 rpi_remaining = phba->sli4_hba.next_rpi - phba->sli4_hba.rpi_count;
4902b381 18223 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18224 if (rpi_remaining < LPFC_RPI_LOW_WATER_MARK) {
18225 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
18226 if (!rpi_hdr) {
18227 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18228 "2002 Error Could not grow rpi "
18229 "count\n");
18230 } else {
6d368e53
JS
18231 lrpi = rpi_hdr->start_rpi;
18232 rpi_hdr->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
6fb120a7
JS
18233 lpfc_sli4_post_rpi_hdr(phba, rpi_hdr);
18234 }
18235 }
18236
18237 return rpi;
18238}
18239
d7c47992
JS
18240/**
18241 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18242 * @phba: pointer to lpfc hba data structure.
18243 *
18244 * This routine is invoked to release an rpi to the pool of
18245 * available rpis maintained by the driver.
18246 **/
5d8b8167 18247static void
d7c47992
JS
18248__lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18249{
7cfd5639
JS
18250 /*
18251 * if the rpi value indicates a prior unreg has already
18252 * been done, skip the unreg.
18253 */
18254 if (rpi == LPFC_RPI_ALLOC_ERROR)
18255 return;
18256
d7c47992
JS
18257 if (test_and_clear_bit(rpi, phba->sli4_hba.rpi_bmask)) {
18258 phba->sli4_hba.rpi_count--;
18259 phba->sli4_hba.max_cfg_param.rpi_used--;
b95b2119 18260 } else {
0f154226
JS
18261 lpfc_printf_log(phba, KERN_INFO,
18262 LOG_NODE | LOG_DISCOVERY,
b95b2119
JS
18263 "2016 rpi %x not inuse\n",
18264 rpi);
d7c47992
JS
18265 }
18266}
18267
6fb120a7
JS
18268/**
18269 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18270 * @phba: pointer to lpfc hba data structure.
18271 *
18272 * This routine is invoked to release an rpi to the pool of
18273 * available rpis maintained by the driver.
18274 **/
18275void
18276lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18277{
18278 spin_lock_irq(&phba->hbalock);
d7c47992 18279 __lpfc_sli4_free_rpi(phba, rpi);
6fb120a7
JS
18280 spin_unlock_irq(&phba->hbalock);
18281}
18282
18283/**
18284 * lpfc_sli4_remove_rpis - Remove the rpi bitmask region
18285 * @phba: pointer to lpfc hba data structure.
18286 *
18287 * This routine is invoked to remove the memory region that
18288 * provided rpi via a bitmask.
18289 **/
18290void
18291lpfc_sli4_remove_rpis(struct lpfc_hba *phba)
18292{
18293 kfree(phba->sli4_hba.rpi_bmask);
6d368e53
JS
18294 kfree(phba->sli4_hba.rpi_ids);
18295 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6fb120a7
JS
18296}
18297
18298/**
18299 * lpfc_sli4_resume_rpi - Remove the rpi bitmask region
18300 * @phba: pointer to lpfc hba data structure.
18301 *
18302 * This routine is invoked to remove the memory region that
18303 * provided rpi via a bitmask.
18304 **/
18305int
6b5151fd
JS
18306lpfc_sli4_resume_rpi(struct lpfc_nodelist *ndlp,
18307 void (*cmpl)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *arg)
6fb120a7
JS
18308{
18309 LPFC_MBOXQ_t *mboxq;
18310 struct lpfc_hba *phba = ndlp->phba;
18311 int rc;
18312
18313 /* The port is notified of the header region via a mailbox command. */
18314 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18315 if (!mboxq)
18316 return -ENOMEM;
18317
18318 /* Post all rpi memory regions to the port. */
18319 lpfc_resume_rpi(mboxq, ndlp);
6b5151fd
JS
18320 if (cmpl) {
18321 mboxq->mbox_cmpl = cmpl;
3e1f0718
JS
18322 mboxq->ctx_buf = arg;
18323 mboxq->ctx_ndlp = ndlp;
72859909
JS
18324 } else
18325 mboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6b5151fd 18326 mboxq->vport = ndlp->vport;
6fb120a7
JS
18327 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18328 if (rc == MBX_NOT_FINISHED) {
18329 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18330 "2010 Resume RPI Mailbox failed "
18331 "status %d, mbxStatus x%x\n", rc,
18332 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
18333 mempool_free(mboxq, phba->mbox_mem_pool);
18334 return -EIO;
18335 }
18336 return 0;
18337}
18338
18339/**
18340 * lpfc_sli4_init_vpi - Initialize a vpi with the port
76a95d75 18341 * @vport: Pointer to the vport for which the vpi is being initialized
6fb120a7 18342 *
76a95d75 18343 * This routine is invoked to activate a vpi with the port.
6fb120a7
JS
18344 *
18345 * Returns:
18346 * 0 success
18347 * -Evalue otherwise
18348 **/
18349int
76a95d75 18350lpfc_sli4_init_vpi(struct lpfc_vport *vport)
6fb120a7
JS
18351{
18352 LPFC_MBOXQ_t *mboxq;
18353 int rc = 0;
6a9c52cf 18354 int retval = MBX_SUCCESS;
6fb120a7 18355 uint32_t mbox_tmo;
76a95d75 18356 struct lpfc_hba *phba = vport->phba;
6fb120a7
JS
18357 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18358 if (!mboxq)
18359 return -ENOMEM;
76a95d75 18360 lpfc_init_vpi(phba, mboxq, vport->vpi);
a183a15f 18361 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
6fb120a7 18362 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
6fb120a7 18363 if (rc != MBX_SUCCESS) {
76a95d75 18364 lpfc_printf_vlog(vport, KERN_ERR, LOG_SLI,
6fb120a7
JS
18365 "2022 INIT VPI Mailbox failed "
18366 "status %d, mbxStatus x%x\n", rc,
18367 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
6a9c52cf 18368 retval = -EIO;
6fb120a7 18369 }
6a9c52cf 18370 if (rc != MBX_TIMEOUT)
76a95d75 18371 mempool_free(mboxq, vport->phba->mbox_mem_pool);
6a9c52cf
JS
18372
18373 return retval;
6fb120a7
JS
18374}
18375
18376/**
18377 * lpfc_mbx_cmpl_add_fcf_record - add fcf mbox completion handler.
18378 * @phba: pointer to lpfc hba data structure.
18379 * @mboxq: Pointer to mailbox object.
18380 *
18381 * This routine is invoked to manually add a single FCF record. The caller
18382 * must pass a completely initialized FCF_Record. This routine takes
18383 * care of the nonembedded mailbox operations.
18384 **/
18385static void
18386lpfc_mbx_cmpl_add_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
18387{
18388 void *virt_addr;
18389 union lpfc_sli4_cfg_shdr *shdr;
18390 uint32_t shdr_status, shdr_add_status;
18391
18392 virt_addr = mboxq->sge_array->addr[0];
18393 /* The IOCTL status is embedded in the mailbox subheader. */
18394 shdr = (union lpfc_sli4_cfg_shdr *) virt_addr;
18395 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18396 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18397
18398 if ((shdr_status || shdr_add_status) &&
18399 (shdr_status != STATUS_FCF_IN_USE))
18400 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18401 "2558 ADD_FCF_RECORD mailbox failed with "
18402 "status x%x add_status x%x\n",
18403 shdr_status, shdr_add_status);
18404
18405 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18406}
18407
18408/**
18409 * lpfc_sli4_add_fcf_record - Manually add an FCF Record.
18410 * @phba: pointer to lpfc hba data structure.
18411 * @fcf_record: pointer to the initialized fcf record to add.
18412 *
18413 * This routine is invoked to manually add a single FCF record. The caller
18414 * must pass a completely initialized FCF_Record. This routine takes
18415 * care of the nonembedded mailbox operations.
18416 **/
18417int
18418lpfc_sli4_add_fcf_record(struct lpfc_hba *phba, struct fcf_record *fcf_record)
18419{
18420 int rc = 0;
18421 LPFC_MBOXQ_t *mboxq;
18422 uint8_t *bytep;
18423 void *virt_addr;
6fb120a7
JS
18424 struct lpfc_mbx_sge sge;
18425 uint32_t alloc_len, req_len;
18426 uint32_t fcfindex;
18427
18428 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18429 if (!mboxq) {
18430 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18431 "2009 Failed to allocate mbox for ADD_FCF cmd\n");
18432 return -ENOMEM;
18433 }
18434
18435 req_len = sizeof(struct fcf_record) + sizeof(union lpfc_sli4_cfg_shdr) +
18436 sizeof(uint32_t);
18437
18438 /* Allocate DMA memory and set up the non-embedded mailbox command */
18439 alloc_len = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18440 LPFC_MBOX_OPCODE_FCOE_ADD_FCF,
18441 req_len, LPFC_SLI4_MBX_NEMBED);
18442 if (alloc_len < req_len) {
18443 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18444 "2523 Allocated DMA memory size (x%x) is "
18445 "less than the requested DMA memory "
18446 "size (x%x)\n", alloc_len, req_len);
18447 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18448 return -ENOMEM;
18449 }
18450
18451 /*
18452 * Get the first SGE entry from the non-embedded DMA memory. This
18453 * routine only uses a single SGE.
18454 */
18455 lpfc_sli4_mbx_sge_get(mboxq, 0, &sge);
6fb120a7
JS
18456 virt_addr = mboxq->sge_array->addr[0];
18457 /*
18458 * Configure the FCF record for FCFI 0. This is the driver's
18459 * hardcoded default and gets used in nonFIP mode.
18460 */
18461 fcfindex = bf_get(lpfc_fcf_record_fcf_index, fcf_record);
18462 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr);
18463 lpfc_sli_pcimem_bcopy(&fcfindex, bytep, sizeof(uint32_t));
18464
18465 /*
18466 * Copy the fcf_index and the FCF Record Data. The data starts after
18467 * the FCoE header plus word10. The data copy needs to be endian
18468 * correct.
18469 */
18470 bytep += sizeof(uint32_t);
18471 lpfc_sli_pcimem_bcopy(fcf_record, bytep, sizeof(struct fcf_record));
18472 mboxq->vport = phba->pport;
18473 mboxq->mbox_cmpl = lpfc_mbx_cmpl_add_fcf_record;
18474 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18475 if (rc == MBX_NOT_FINISHED) {
18476 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18477 "2515 ADD_FCF_RECORD mailbox failed with "
18478 "status 0x%x\n", rc);
18479 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18480 rc = -EIO;
18481 } else
18482 rc = 0;
18483
18484 return rc;
18485}
18486
18487/**
18488 * lpfc_sli4_build_dflt_fcf_record - Build the driver's default FCF Record.
18489 * @phba: pointer to lpfc hba data structure.
18490 * @fcf_record: pointer to the fcf record to write the default data.
18491 * @fcf_index: FCF table entry index.
18492 *
18493 * This routine is invoked to build the driver's default FCF record. The
18494 * values used are hardcoded. This routine handles memory initialization.
18495 *
18496 **/
18497void
18498lpfc_sli4_build_dflt_fcf_record(struct lpfc_hba *phba,
18499 struct fcf_record *fcf_record,
18500 uint16_t fcf_index)
18501{
18502 memset(fcf_record, 0, sizeof(struct fcf_record));
18503 fcf_record->max_rcv_size = LPFC_FCOE_MAX_RCV_SIZE;
18504 fcf_record->fka_adv_period = LPFC_FCOE_FKA_ADV_PER;
18505 fcf_record->fip_priority = LPFC_FCOE_FIP_PRIORITY;
18506 bf_set(lpfc_fcf_record_mac_0, fcf_record, phba->fc_map[0]);
18507 bf_set(lpfc_fcf_record_mac_1, fcf_record, phba->fc_map[1]);
18508 bf_set(lpfc_fcf_record_mac_2, fcf_record, phba->fc_map[2]);
18509 bf_set(lpfc_fcf_record_mac_3, fcf_record, LPFC_FCOE_FCF_MAC3);
18510 bf_set(lpfc_fcf_record_mac_4, fcf_record, LPFC_FCOE_FCF_MAC4);
18511 bf_set(lpfc_fcf_record_mac_5, fcf_record, LPFC_FCOE_FCF_MAC5);
18512 bf_set(lpfc_fcf_record_fc_map_0, fcf_record, phba->fc_map[0]);
18513 bf_set(lpfc_fcf_record_fc_map_1, fcf_record, phba->fc_map[1]);
18514 bf_set(lpfc_fcf_record_fc_map_2, fcf_record, phba->fc_map[2]);
18515 bf_set(lpfc_fcf_record_fcf_valid, fcf_record, 1);
0c287589 18516 bf_set(lpfc_fcf_record_fcf_avail, fcf_record, 1);
6fb120a7
JS
18517 bf_set(lpfc_fcf_record_fcf_index, fcf_record, fcf_index);
18518 bf_set(lpfc_fcf_record_mac_addr_prov, fcf_record,
18519 LPFC_FCF_FPMA | LPFC_FCF_SPMA);
18520 /* Set the VLAN bit map */
18521 if (phba->valid_vlan) {
18522 fcf_record->vlan_bitmap[phba->vlan_id / 8]
18523 = 1 << (phba->vlan_id % 8);
18524 }
18525}
18526
18527/**
0c9ab6f5 18528 * lpfc_sli4_fcf_scan_read_fcf_rec - Read hba fcf record for fcf scan.
6fb120a7
JS
18529 * @phba: pointer to lpfc hba data structure.
18530 * @fcf_index: FCF table entry offset.
18531 *
0c9ab6f5
JS
18532 * This routine is invoked to scan the entire FCF table by reading FCF
18533 * record and processing it one at a time starting from the @fcf_index
18534 * for initial FCF discovery or fast FCF failover rediscovery.
18535 *
25985edc 18536 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5 18537 * otherwise.
6fb120a7
JS
18538 **/
18539int
0c9ab6f5 18540lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
6fb120a7
JS
18541{
18542 int rc = 0, error;
18543 LPFC_MBOXQ_t *mboxq;
6fb120a7 18544
32b9793f 18545 phba->fcoe_eventtag_at_fcf_scan = phba->fcoe_eventtag;
80c17849 18546 phba->fcoe_cvl_eventtag_attn = phba->fcoe_cvl_eventtag;
6fb120a7
JS
18547 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18548 if (!mboxq) {
18549 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18550 "2000 Failed to allocate mbox for "
18551 "READ_FCF cmd\n");
4d9ab994 18552 error = -ENOMEM;
0c9ab6f5 18553 goto fail_fcf_scan;
6fb120a7 18554 }
ecfd03c6 18555 /* Construct the read FCF record mailbox command */
0c9ab6f5 18556 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
ecfd03c6
JS
18557 if (rc) {
18558 error = -EINVAL;
0c9ab6f5 18559 goto fail_fcf_scan;
6fb120a7 18560 }
ecfd03c6 18561 /* Issue the mailbox command asynchronously */
6fb120a7 18562 mboxq->vport = phba->pport;
0c9ab6f5 18563 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_scan_read_fcf_rec;
a93ff37a
JS
18564
18565 spin_lock_irq(&phba->hbalock);
18566 phba->hba_flag |= FCF_TS_INPROG;
18567 spin_unlock_irq(&phba->hbalock);
18568
6fb120a7 18569 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
ecfd03c6 18570 if (rc == MBX_NOT_FINISHED)
6fb120a7 18571 error = -EIO;
ecfd03c6 18572 else {
38b92ef8
JS
18573 /* Reset eligible FCF count for new scan */
18574 if (fcf_index == LPFC_FCOE_FCF_GET_FIRST)
999d813f 18575 phba->fcf.eligible_fcf_cnt = 0;
6fb120a7 18576 error = 0;
32b9793f 18577 }
0c9ab6f5 18578fail_fcf_scan:
4d9ab994
JS
18579 if (error) {
18580 if (mboxq)
18581 lpfc_sli4_mbox_cmd_free(phba, mboxq);
a93ff37a 18582 /* FCF scan failed, clear FCF_TS_INPROG flag */
4d9ab994 18583 spin_lock_irq(&phba->hbalock);
a93ff37a 18584 phba->hba_flag &= ~FCF_TS_INPROG;
4d9ab994
JS
18585 spin_unlock_irq(&phba->hbalock);
18586 }
6fb120a7
JS
18587 return error;
18588}
a0c87cbd 18589
0c9ab6f5 18590/**
a93ff37a 18591 * lpfc_sli4_fcf_rr_read_fcf_rec - Read hba fcf record for roundrobin fcf.
0c9ab6f5
JS
18592 * @phba: pointer to lpfc hba data structure.
18593 * @fcf_index: FCF table entry offset.
18594 *
18595 * This routine is invoked to read an FCF record indicated by @fcf_index
a93ff37a 18596 * and to use it for FLOGI roundrobin FCF failover.
0c9ab6f5 18597 *
25985edc 18598 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18599 * otherwise.
18600 **/
18601int
18602lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18603{
18604 int rc = 0, error;
18605 LPFC_MBOXQ_t *mboxq;
18606
18607 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18608 if (!mboxq) {
18609 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18610 "2763 Failed to allocate mbox for "
18611 "READ_FCF cmd\n");
18612 error = -ENOMEM;
18613 goto fail_fcf_read;
18614 }
18615 /* Construct the read FCF record mailbox command */
18616 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18617 if (rc) {
18618 error = -EINVAL;
18619 goto fail_fcf_read;
18620 }
18621 /* Issue the mailbox command asynchronously */
18622 mboxq->vport = phba->pport;
18623 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_rr_read_fcf_rec;
18624 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18625 if (rc == MBX_NOT_FINISHED)
18626 error = -EIO;
18627 else
18628 error = 0;
18629
18630fail_fcf_read:
18631 if (error && mboxq)
18632 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18633 return error;
18634}
18635
18636/**
18637 * lpfc_sli4_read_fcf_rec - Read hba fcf record for update eligible fcf bmask.
18638 * @phba: pointer to lpfc hba data structure.
18639 * @fcf_index: FCF table entry offset.
18640 *
18641 * This routine is invoked to read an FCF record indicated by @fcf_index to
a93ff37a 18642 * determine whether it's eligible for FLOGI roundrobin failover list.
0c9ab6f5 18643 *
25985edc 18644 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18645 * otherwise.
18646 **/
18647int
18648lpfc_sli4_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18649{
18650 int rc = 0, error;
18651 LPFC_MBOXQ_t *mboxq;
18652
18653 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18654 if (!mboxq) {
18655 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18656 "2758 Failed to allocate mbox for "
18657 "READ_FCF cmd\n");
18658 error = -ENOMEM;
18659 goto fail_fcf_read;
18660 }
18661 /* Construct the read FCF record mailbox command */
18662 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18663 if (rc) {
18664 error = -EINVAL;
18665 goto fail_fcf_read;
18666 }
18667 /* Issue the mailbox command asynchronously */
18668 mboxq->vport = phba->pport;
18669 mboxq->mbox_cmpl = lpfc_mbx_cmpl_read_fcf_rec;
18670 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18671 if (rc == MBX_NOT_FINISHED)
18672 error = -EIO;
18673 else
18674 error = 0;
18675
18676fail_fcf_read:
18677 if (error && mboxq)
18678 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18679 return error;
18680}
18681
7d791df7 18682/**
f5cb5304 18683 * lpfc_check_next_fcf_pri_level
7d791df7
JS
18684 * phba pointer to the lpfc_hba struct for this port.
18685 * This routine is called from the lpfc_sli4_fcf_rr_next_index_get
18686 * routine when the rr_bmask is empty. The FCF indecies are put into the
18687 * rr_bmask based on their priority level. Starting from the highest priority
18688 * to the lowest. The most likely FCF candidate will be in the highest
18689 * priority group. When this routine is called it searches the fcf_pri list for
18690 * next lowest priority group and repopulates the rr_bmask with only those
18691 * fcf_indexes.
18692 * returns:
18693 * 1=success 0=failure
18694 **/
5d8b8167 18695static int
7d791df7
JS
18696lpfc_check_next_fcf_pri_level(struct lpfc_hba *phba)
18697{
18698 uint16_t next_fcf_pri;
18699 uint16_t last_index;
18700 struct lpfc_fcf_pri *fcf_pri;
18701 int rc;
18702 int ret = 0;
18703
18704 last_index = find_first_bit(phba->fcf.fcf_rr_bmask,
18705 LPFC_SLI4_FCF_TBL_INDX_MAX);
18706 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
18707 "3060 Last IDX %d\n", last_index);
2562669c
JS
18708
18709 /* Verify the priority list has 2 or more entries */
18710 spin_lock_irq(&phba->hbalock);
18711 if (list_empty(&phba->fcf.fcf_pri_list) ||
18712 list_is_singular(&phba->fcf.fcf_pri_list)) {
18713 spin_unlock_irq(&phba->hbalock);
7d791df7
JS
18714 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
18715 "3061 Last IDX %d\n", last_index);
18716 return 0; /* Empty rr list */
18717 }
2562669c
JS
18718 spin_unlock_irq(&phba->hbalock);
18719
7d791df7
JS
18720 next_fcf_pri = 0;
18721 /*
18722 * Clear the rr_bmask and set all of the bits that are at this
18723 * priority.
18724 */
18725 memset(phba->fcf.fcf_rr_bmask, 0,
18726 sizeof(*phba->fcf.fcf_rr_bmask));
18727 spin_lock_irq(&phba->hbalock);
18728 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18729 if (fcf_pri->fcf_rec.flag & LPFC_FCF_FLOGI_FAILED)
18730 continue;
18731 /*
18732 * the 1st priority that has not FLOGI failed
18733 * will be the highest.
18734 */
18735 if (!next_fcf_pri)
18736 next_fcf_pri = fcf_pri->fcf_rec.priority;
18737 spin_unlock_irq(&phba->hbalock);
18738 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18739 rc = lpfc_sli4_fcf_rr_index_set(phba,
18740 fcf_pri->fcf_rec.fcf_index);
18741 if (rc)
18742 return 0;
18743 }
18744 spin_lock_irq(&phba->hbalock);
18745 }
18746 /*
18747 * if next_fcf_pri was not set above and the list is not empty then
18748 * we have failed flogis on all of them. So reset flogi failed
4907cb7b 18749 * and start at the beginning.
7d791df7
JS
18750 */
18751 if (!next_fcf_pri && !list_empty(&phba->fcf.fcf_pri_list)) {
18752 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18753 fcf_pri->fcf_rec.flag &= ~LPFC_FCF_FLOGI_FAILED;
18754 /*
18755 * the 1st priority that has not FLOGI failed
18756 * will be the highest.
18757 */
18758 if (!next_fcf_pri)
18759 next_fcf_pri = fcf_pri->fcf_rec.priority;
18760 spin_unlock_irq(&phba->hbalock);
18761 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18762 rc = lpfc_sli4_fcf_rr_index_set(phba,
18763 fcf_pri->fcf_rec.fcf_index);
18764 if (rc)
18765 return 0;
18766 }
18767 spin_lock_irq(&phba->hbalock);
18768 }
18769 } else
18770 ret = 1;
18771 spin_unlock_irq(&phba->hbalock);
18772
18773 return ret;
18774}
0c9ab6f5
JS
18775/**
18776 * lpfc_sli4_fcf_rr_next_index_get - Get next eligible fcf record index
18777 * @phba: pointer to lpfc hba data structure.
18778 *
18779 * This routine is to get the next eligible FCF record index in a round
18780 * robin fashion. If the next eligible FCF record index equals to the
a93ff37a 18781 * initial roundrobin FCF record index, LPFC_FCOE_FCF_NEXT_NONE (0xFFFF)
0c9ab6f5
JS
18782 * shall be returned, otherwise, the next eligible FCF record's index
18783 * shall be returned.
18784 **/
18785uint16_t
18786lpfc_sli4_fcf_rr_next_index_get(struct lpfc_hba *phba)
18787{
18788 uint16_t next_fcf_index;
18789
421c6622 18790initial_priority:
3804dc84 18791 /* Search start from next bit of currently registered FCF index */
421c6622
JS
18792 next_fcf_index = phba->fcf.current_rec.fcf_indx;
18793
7d791df7 18794next_priority:
421c6622
JS
18795 /* Determine the next fcf index to check */
18796 next_fcf_index = (next_fcf_index + 1) % LPFC_SLI4_FCF_TBL_INDX_MAX;
0c9ab6f5
JS
18797 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18798 LPFC_SLI4_FCF_TBL_INDX_MAX,
3804dc84
JS
18799 next_fcf_index);
18800
0c9ab6f5 18801 /* Wrap around condition on phba->fcf.fcf_rr_bmask */
7d791df7
JS
18802 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18803 /*
18804 * If we have wrapped then we need to clear the bits that
18805 * have been tested so that we can detect when we should
18806 * change the priority level.
18807 */
0c9ab6f5
JS
18808 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18809 LPFC_SLI4_FCF_TBL_INDX_MAX, 0);
7d791df7
JS
18810 }
18811
3804dc84
JS
18812
18813 /* Check roundrobin failover list empty condition */
7d791df7
JS
18814 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX ||
18815 next_fcf_index == phba->fcf.current_rec.fcf_indx) {
18816 /*
18817 * If next fcf index is not found check if there are lower
18818 * Priority level fcf's in the fcf_priority list.
18819 * Set up the rr_bmask with all of the avaiable fcf bits
18820 * at that level and continue the selection process.
18821 */
18822 if (lpfc_check_next_fcf_pri_level(phba))
421c6622 18823 goto initial_priority;
3804dc84
JS
18824 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP,
18825 "2844 No roundrobin failover FCF available\n");
036cad1f
JS
18826
18827 return LPFC_FCOE_FCF_NEXT_NONE;
3804dc84
JS
18828 }
18829
7d791df7
JS
18830 if (next_fcf_index < LPFC_SLI4_FCF_TBL_INDX_MAX &&
18831 phba->fcf.fcf_pri[next_fcf_index].fcf_rec.flag &
f5cb5304
JS
18832 LPFC_FCF_FLOGI_FAILED) {
18833 if (list_is_singular(&phba->fcf.fcf_pri_list))
18834 return LPFC_FCOE_FCF_NEXT_NONE;
18835
7d791df7 18836 goto next_priority;
f5cb5304 18837 }
7d791df7 18838
3804dc84 18839 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a
JS
18840 "2845 Get next roundrobin failover FCF (x%x)\n",
18841 next_fcf_index);
18842
0c9ab6f5
JS
18843 return next_fcf_index;
18844}
18845
18846/**
18847 * lpfc_sli4_fcf_rr_index_set - Set bmask with eligible fcf record index
18848 * @phba: pointer to lpfc hba data structure.
18849 *
18850 * This routine sets the FCF record index in to the eligible bmask for
a93ff37a 18851 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
18852 * does not go beyond the range of the driver allocated bmask dimension
18853 * before setting the bit.
18854 *
18855 * Returns 0 if the index bit successfully set, otherwise, it returns
18856 * -EINVAL.
18857 **/
18858int
18859lpfc_sli4_fcf_rr_index_set(struct lpfc_hba *phba, uint16_t fcf_index)
18860{
18861 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18862 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
18863 "2610 FCF (x%x) reached driver's book "
18864 "keeping dimension:x%x\n",
0c9ab6f5
JS
18865 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
18866 return -EINVAL;
18867 }
18868 /* Set the eligible FCF record index bmask */
18869 set_bit(fcf_index, phba->fcf.fcf_rr_bmask);
18870
3804dc84 18871 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18872 "2790 Set FCF (x%x) to roundrobin FCF failover "
3804dc84
JS
18873 "bmask\n", fcf_index);
18874
0c9ab6f5
JS
18875 return 0;
18876}
18877
18878/**
3804dc84 18879 * lpfc_sli4_fcf_rr_index_clear - Clear bmask from eligible fcf record index
0c9ab6f5
JS
18880 * @phba: pointer to lpfc hba data structure.
18881 *
18882 * This routine clears the FCF record index from the eligible bmask for
a93ff37a 18883 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
18884 * does not go beyond the range of the driver allocated bmask dimension
18885 * before clearing the bit.
18886 **/
18887void
18888lpfc_sli4_fcf_rr_index_clear(struct lpfc_hba *phba, uint16_t fcf_index)
18889{
9a803a74 18890 struct lpfc_fcf_pri *fcf_pri, *fcf_pri_next;
0c9ab6f5
JS
18891 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18892 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
18893 "2762 FCF (x%x) reached driver's book "
18894 "keeping dimension:x%x\n",
0c9ab6f5
JS
18895 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
18896 return;
18897 }
18898 /* Clear the eligible FCF record index bmask */
7d791df7 18899 spin_lock_irq(&phba->hbalock);
9a803a74
JS
18900 list_for_each_entry_safe(fcf_pri, fcf_pri_next, &phba->fcf.fcf_pri_list,
18901 list) {
7d791df7
JS
18902 if (fcf_pri->fcf_rec.fcf_index == fcf_index) {
18903 list_del_init(&fcf_pri->list);
18904 break;
18905 }
18906 }
18907 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 18908 clear_bit(fcf_index, phba->fcf.fcf_rr_bmask);
3804dc84
JS
18909
18910 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18911 "2791 Clear FCF (x%x) from roundrobin failover "
3804dc84 18912 "bmask\n", fcf_index);
0c9ab6f5
JS
18913}
18914
ecfd03c6
JS
18915/**
18916 * lpfc_mbx_cmpl_redisc_fcf_table - completion routine for rediscover FCF table
18917 * @phba: pointer to lpfc hba data structure.
18918 *
18919 * This routine is the completion routine for the rediscover FCF table mailbox
18920 * command. If the mailbox command returned failure, it will try to stop the
18921 * FCF rediscover wait timer.
18922 **/
5d8b8167 18923static void
ecfd03c6
JS
18924lpfc_mbx_cmpl_redisc_fcf_table(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
18925{
18926 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
18927 uint32_t shdr_status, shdr_add_status;
18928
18929 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
18930
18931 shdr_status = bf_get(lpfc_mbox_hdr_status,
18932 &redisc_fcf->header.cfg_shdr.response);
18933 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
18934 &redisc_fcf->header.cfg_shdr.response);
18935 if (shdr_status || shdr_add_status) {
0c9ab6f5 18936 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
ecfd03c6
JS
18937 "2746 Requesting for FCF rediscovery failed "
18938 "status x%x add_status x%x\n",
18939 shdr_status, shdr_add_status);
0c9ab6f5 18940 if (phba->fcf.fcf_flag & FCF_ACVL_DISC) {
fc2b989b 18941 spin_lock_irq(&phba->hbalock);
0c9ab6f5 18942 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b
JS
18943 spin_unlock_irq(&phba->hbalock);
18944 /*
18945 * CVL event triggered FCF rediscover request failed,
18946 * last resort to re-try current registered FCF entry.
18947 */
18948 lpfc_retry_pport_discovery(phba);
18949 } else {
18950 spin_lock_irq(&phba->hbalock);
0c9ab6f5 18951 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
fc2b989b
JS
18952 spin_unlock_irq(&phba->hbalock);
18953 /*
18954 * DEAD FCF event triggered FCF rediscover request
18955 * failed, last resort to fail over as a link down
18956 * to FCF registration.
18957 */
18958 lpfc_sli4_fcf_dead_failthrough(phba);
18959 }
0c9ab6f5
JS
18960 } else {
18961 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18962 "2775 Start FCF rediscover quiescent timer\n");
ecfd03c6
JS
18963 /*
18964 * Start FCF rediscovery wait timer for pending FCF
18965 * before rescan FCF record table.
18966 */
18967 lpfc_fcf_redisc_wait_start_timer(phba);
0c9ab6f5 18968 }
ecfd03c6
JS
18969
18970 mempool_free(mbox, phba->mbox_mem_pool);
18971}
18972
18973/**
3804dc84 18974 * lpfc_sli4_redisc_fcf_table - Request to rediscover entire FCF table by port.
ecfd03c6
JS
18975 * @phba: pointer to lpfc hba data structure.
18976 *
18977 * This routine is invoked to request for rediscovery of the entire FCF table
18978 * by the port.
18979 **/
18980int
18981lpfc_sli4_redisc_fcf_table(struct lpfc_hba *phba)
18982{
18983 LPFC_MBOXQ_t *mbox;
18984 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
18985 int rc, length;
18986
0c9ab6f5
JS
18987 /* Cancel retry delay timers to all vports before FCF rediscover */
18988 lpfc_cancel_all_vport_retry_delay_timer(phba);
18989
ecfd03c6
JS
18990 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18991 if (!mbox) {
18992 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18993 "2745 Failed to allocate mbox for "
18994 "requesting FCF rediscover.\n");
18995 return -ENOMEM;
18996 }
18997
18998 length = (sizeof(struct lpfc_mbx_redisc_fcf_tbl) -
18999 sizeof(struct lpfc_sli4_cfg_mhdr));
19000 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
19001 LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF,
19002 length, LPFC_SLI4_MBX_EMBED);
19003
19004 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
19005 /* Set count to 0 for invalidating the entire FCF database */
19006 bf_set(lpfc_mbx_redisc_fcf_count, redisc_fcf, 0);
19007
19008 /* Issue the mailbox command asynchronously */
19009 mbox->vport = phba->pport;
19010 mbox->mbox_cmpl = lpfc_mbx_cmpl_redisc_fcf_table;
19011 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
19012
19013 if (rc == MBX_NOT_FINISHED) {
19014 mempool_free(mbox, phba->mbox_mem_pool);
19015 return -EIO;
19016 }
19017 return 0;
19018}
19019
fc2b989b
JS
19020/**
19021 * lpfc_sli4_fcf_dead_failthrough - Failthrough routine to fcf dead event
19022 * @phba: pointer to lpfc hba data structure.
19023 *
19024 * This function is the failover routine as a last resort to the FCF DEAD
19025 * event when driver failed to perform fast FCF failover.
19026 **/
19027void
19028lpfc_sli4_fcf_dead_failthrough(struct lpfc_hba *phba)
19029{
19030 uint32_t link_state;
19031
19032 /*
19033 * Last resort as FCF DEAD event failover will treat this as
19034 * a link down, but save the link state because we don't want
19035 * it to be changed to Link Down unless it is already down.
19036 */
19037 link_state = phba->link_state;
19038 lpfc_linkdown(phba);
19039 phba->link_state = link_state;
19040
19041 /* Unregister FCF if no devices connected to it */
19042 lpfc_unregister_unused_fcf(phba);
19043}
19044
a0c87cbd 19045/**
026abb87 19046 * lpfc_sli_get_config_region23 - Get sli3 port region 23 data.
a0c87cbd 19047 * @phba: pointer to lpfc hba data structure.
026abb87 19048 * @rgn23_data: pointer to configure region 23 data.
a0c87cbd 19049 *
026abb87
JS
19050 * This function gets SLI3 port configure region 23 data through memory dump
19051 * mailbox command. When it successfully retrieves data, the size of the data
19052 * will be returned, otherwise, 0 will be returned.
a0c87cbd 19053 **/
026abb87
JS
19054static uint32_t
19055lpfc_sli_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
a0c87cbd
JS
19056{
19057 LPFC_MBOXQ_t *pmb = NULL;
19058 MAILBOX_t *mb;
026abb87 19059 uint32_t offset = 0;
a0c87cbd
JS
19060 int rc;
19061
026abb87
JS
19062 if (!rgn23_data)
19063 return 0;
19064
a0c87cbd
JS
19065 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19066 if (!pmb) {
19067 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
026abb87
JS
19068 "2600 failed to allocate mailbox memory\n");
19069 return 0;
a0c87cbd
JS
19070 }
19071 mb = &pmb->u.mb;
19072
a0c87cbd
JS
19073 do {
19074 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_23);
19075 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
19076
19077 if (rc != MBX_SUCCESS) {
19078 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
026abb87
JS
19079 "2601 failed to read config "
19080 "region 23, rc 0x%x Status 0x%x\n",
19081 rc, mb->mbxStatus);
a0c87cbd
JS
19082 mb->un.varDmp.word_cnt = 0;
19083 }
19084 /*
19085 * dump mem may return a zero when finished or we got a
19086 * mailbox error, either way we are done.
19087 */
19088 if (mb->un.varDmp.word_cnt == 0)
19089 break;
19090 if (mb->un.varDmp.word_cnt > DMP_RGN23_SIZE - offset)
19091 mb->un.varDmp.word_cnt = DMP_RGN23_SIZE - offset;
19092
19093 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
026abb87
JS
19094 rgn23_data + offset,
19095 mb->un.varDmp.word_cnt);
a0c87cbd
JS
19096 offset += mb->un.varDmp.word_cnt;
19097 } while (mb->un.varDmp.word_cnt && offset < DMP_RGN23_SIZE);
19098
026abb87
JS
19099 mempool_free(pmb, phba->mbox_mem_pool);
19100 return offset;
19101}
19102
19103/**
19104 * lpfc_sli4_get_config_region23 - Get sli4 port region 23 data.
19105 * @phba: pointer to lpfc hba data structure.
19106 * @rgn23_data: pointer to configure region 23 data.
19107 *
19108 * This function gets SLI4 port configure region 23 data through memory dump
19109 * mailbox command. When it successfully retrieves data, the size of the data
19110 * will be returned, otherwise, 0 will be returned.
19111 **/
19112static uint32_t
19113lpfc_sli4_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
19114{
19115 LPFC_MBOXQ_t *mboxq = NULL;
19116 struct lpfc_dmabuf *mp = NULL;
19117 struct lpfc_mqe *mqe;
19118 uint32_t data_length = 0;
19119 int rc;
19120
19121 if (!rgn23_data)
19122 return 0;
19123
19124 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19125 if (!mboxq) {
19126 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19127 "3105 failed to allocate mailbox memory\n");
19128 return 0;
19129 }
19130
19131 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq))
19132 goto out;
19133 mqe = &mboxq->u.mqe;
3e1f0718 19134 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
026abb87
JS
19135 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
19136 if (rc)
19137 goto out;
19138 data_length = mqe->un.mb_words[5];
19139 if (data_length == 0)
19140 goto out;
19141 if (data_length > DMP_RGN23_SIZE) {
19142 data_length = 0;
19143 goto out;
19144 }
19145 lpfc_sli_pcimem_bcopy((char *)mp->virt, rgn23_data, data_length);
19146out:
19147 mempool_free(mboxq, phba->mbox_mem_pool);
19148 if (mp) {
19149 lpfc_mbuf_free(phba, mp->virt, mp->phys);
19150 kfree(mp);
19151 }
19152 return data_length;
19153}
19154
19155/**
19156 * lpfc_sli_read_link_ste - Read region 23 to decide if link is disabled.
19157 * @phba: pointer to lpfc hba data structure.
19158 *
19159 * This function read region 23 and parse TLV for port status to
19160 * decide if the user disaled the port. If the TLV indicates the
19161 * port is disabled, the hba_flag is set accordingly.
19162 **/
19163void
19164lpfc_sli_read_link_ste(struct lpfc_hba *phba)
19165{
19166 uint8_t *rgn23_data = NULL;
19167 uint32_t if_type, data_size, sub_tlv_len, tlv_offset;
19168 uint32_t offset = 0;
19169
19170 /* Get adapter Region 23 data */
19171 rgn23_data = kzalloc(DMP_RGN23_SIZE, GFP_KERNEL);
19172 if (!rgn23_data)
19173 goto out;
19174
19175 if (phba->sli_rev < LPFC_SLI_REV4)
19176 data_size = lpfc_sli_get_config_region23(phba, rgn23_data);
19177 else {
19178 if_type = bf_get(lpfc_sli_intf_if_type,
19179 &phba->sli4_hba.sli_intf);
19180 if (if_type == LPFC_SLI_INTF_IF_TYPE_0)
19181 goto out;
19182 data_size = lpfc_sli4_get_config_region23(phba, rgn23_data);
19183 }
a0c87cbd
JS
19184
19185 if (!data_size)
19186 goto out;
19187
19188 /* Check the region signature first */
19189 if (memcmp(&rgn23_data[offset], LPFC_REGION23_SIGNATURE, 4)) {
19190 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19191 "2619 Config region 23 has bad signature\n");
19192 goto out;
19193 }
19194 offset += 4;
19195
19196 /* Check the data structure version */
19197 if (rgn23_data[offset] != LPFC_REGION23_VERSION) {
19198 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19199 "2620 Config region 23 has bad version\n");
19200 goto out;
19201 }
19202 offset += 4;
19203
19204 /* Parse TLV entries in the region */
19205 while (offset < data_size) {
19206 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC)
19207 break;
19208 /*
19209 * If the TLV is not driver specific TLV or driver id is
19210 * not linux driver id, skip the record.
19211 */
19212 if ((rgn23_data[offset] != DRIVER_SPECIFIC_TYPE) ||
19213 (rgn23_data[offset + 2] != LINUX_DRIVER_ID) ||
19214 (rgn23_data[offset + 3] != 0)) {
19215 offset += rgn23_data[offset + 1] * 4 + 4;
19216 continue;
19217 }
19218
19219 /* Driver found a driver specific TLV in the config region */
19220 sub_tlv_len = rgn23_data[offset + 1] * 4;
19221 offset += 4;
19222 tlv_offset = 0;
19223
19224 /*
19225 * Search for configured port state sub-TLV.
19226 */
19227 while ((offset < data_size) &&
19228 (tlv_offset < sub_tlv_len)) {
19229 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC) {
19230 offset += 4;
19231 tlv_offset += 4;
19232 break;
19233 }
19234 if (rgn23_data[offset] != PORT_STE_TYPE) {
19235 offset += rgn23_data[offset + 1] * 4 + 4;
19236 tlv_offset += rgn23_data[offset + 1] * 4 + 4;
19237 continue;
19238 }
19239
19240 /* This HBA contains PORT_STE configured */
19241 if (!rgn23_data[offset + 2])
19242 phba->hba_flag |= LINK_DISABLED;
19243
19244 goto out;
19245 }
19246 }
026abb87 19247
a0c87cbd 19248out:
a0c87cbd
JS
19249 kfree(rgn23_data);
19250 return;
19251}
695a814e 19252
52d52440
JS
19253/**
19254 * lpfc_wr_object - write an object to the firmware
19255 * @phba: HBA structure that indicates port to create a queue on.
19256 * @dmabuf_list: list of dmabufs to write to the port.
19257 * @size: the total byte value of the objects to write to the port.
19258 * @offset: the current offset to be used to start the transfer.
19259 *
19260 * This routine will create a wr_object mailbox command to send to the port.
19261 * the mailbox command will be constructed using the dma buffers described in
19262 * @dmabuf_list to create a list of BDEs. This routine will fill in as many
19263 * BDEs that the imbedded mailbox can support. The @offset variable will be
19264 * used to indicate the starting offset of the transfer and will also return
19265 * the offset after the write object mailbox has completed. @size is used to
19266 * determine the end of the object and whether the eof bit should be set.
19267 *
19268 * Return 0 is successful and offset will contain the the new offset to use
19269 * for the next write.
19270 * Return negative value for error cases.
19271 **/
19272int
19273lpfc_wr_object(struct lpfc_hba *phba, struct list_head *dmabuf_list,
19274 uint32_t size, uint32_t *offset)
19275{
19276 struct lpfc_mbx_wr_object *wr_object;
19277 LPFC_MBOXQ_t *mbox;
19278 int rc = 0, i = 0;
5021267a 19279 uint32_t shdr_status, shdr_add_status, shdr_change_status;
52d52440 19280 uint32_t mbox_tmo;
52d52440
JS
19281 struct lpfc_dmabuf *dmabuf;
19282 uint32_t written = 0;
5021267a 19283 bool check_change_status = false;
52d52440
JS
19284
19285 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19286 if (!mbox)
19287 return -ENOMEM;
19288
19289 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
19290 LPFC_MBOX_OPCODE_WRITE_OBJECT,
19291 sizeof(struct lpfc_mbx_wr_object) -
19292 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
19293
19294 wr_object = (struct lpfc_mbx_wr_object *)&mbox->u.mqe.un.wr_object;
19295 wr_object->u.request.write_offset = *offset;
19296 sprintf((uint8_t *)wr_object->u.request.object_name, "/");
19297 wr_object->u.request.object_name[0] =
19298 cpu_to_le32(wr_object->u.request.object_name[0]);
19299 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 0);
19300 list_for_each_entry(dmabuf, dmabuf_list, list) {
19301 if (i >= LPFC_MBX_WR_CONFIG_MAX_BDE || written >= size)
19302 break;
19303 wr_object->u.request.bde[i].addrLow = putPaddrLow(dmabuf->phys);
19304 wr_object->u.request.bde[i].addrHigh =
19305 putPaddrHigh(dmabuf->phys);
19306 if (written + SLI4_PAGE_SIZE >= size) {
19307 wr_object->u.request.bde[i].tus.f.bdeSize =
19308 (size - written);
19309 written += (size - written);
19310 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 1);
5021267a
JS
19311 bf_set(lpfc_wr_object_eas, &wr_object->u.request, 1);
19312 check_change_status = true;
52d52440
JS
19313 } else {
19314 wr_object->u.request.bde[i].tus.f.bdeSize =
19315 SLI4_PAGE_SIZE;
19316 written += SLI4_PAGE_SIZE;
19317 }
19318 i++;
19319 }
19320 wr_object->u.request.bde_count = i;
19321 bf_set(lpfc_wr_object_write_length, &wr_object->u.request, written);
19322 if (!phba->sli4_hba.intr_enable)
19323 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
19324 else {
a183a15f 19325 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
52d52440
JS
19326 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
19327 }
19328 /* The IOCTL status is embedded in the mailbox subheader. */
5021267a
JS
19329 shdr_status = bf_get(lpfc_mbox_hdr_status,
19330 &wr_object->header.cfg_shdr.response);
19331 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
19332 &wr_object->header.cfg_shdr.response);
19333 if (check_change_status) {
19334 shdr_change_status = bf_get(lpfc_wr_object_change_status,
19335 &wr_object->u.response);
19336 switch (shdr_change_status) {
19337 case (LPFC_CHANGE_STATUS_PHYS_DEV_RESET):
19338 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19339 "3198 Firmware write complete: System "
19340 "reboot required to instantiate\n");
19341 break;
19342 case (LPFC_CHANGE_STATUS_FW_RESET):
19343 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19344 "3199 Firmware write complete: Firmware"
19345 " reset required to instantiate\n");
19346 break;
19347 case (LPFC_CHANGE_STATUS_PORT_MIGRATION):
19348 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19349 "3200 Firmware write complete: Port "
19350 "Migration or PCI Reset required to "
19351 "instantiate\n");
19352 break;
19353 case (LPFC_CHANGE_STATUS_PCI_RESET):
19354 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19355 "3201 Firmware write complete: PCI "
19356 "Reset required to instantiate\n");
19357 break;
19358 default:
19359 break;
19360 }
19361 }
52d52440
JS
19362 if (rc != MBX_TIMEOUT)
19363 mempool_free(mbox, phba->mbox_mem_pool);
19364 if (shdr_status || shdr_add_status || rc) {
19365 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19366 "3025 Write Object mailbox failed with "
19367 "status x%x add_status x%x, mbx status x%x\n",
19368 shdr_status, shdr_add_status, rc);
19369 rc = -ENXIO;
1feb8204 19370 *offset = shdr_add_status;
52d52440
JS
19371 } else
19372 *offset += wr_object->u.response.actual_write_length;
19373 return rc;
19374}
19375
695a814e
JS
19376/**
19377 * lpfc_cleanup_pending_mbox - Free up vport discovery mailbox commands.
19378 * @vport: pointer to vport data structure.
19379 *
19380 * This function iterate through the mailboxq and clean up all REG_LOGIN
19381 * and REG_VPI mailbox commands associated with the vport. This function
19382 * is called when driver want to restart discovery of the vport due to
19383 * a Clear Virtual Link event.
19384 **/
19385void
19386lpfc_cleanup_pending_mbox(struct lpfc_vport *vport)
19387{
19388 struct lpfc_hba *phba = vport->phba;
19389 LPFC_MBOXQ_t *mb, *nextmb;
19390 struct lpfc_dmabuf *mp;
78730cfe 19391 struct lpfc_nodelist *ndlp;
d439d286 19392 struct lpfc_nodelist *act_mbx_ndlp = NULL;
589a52d6 19393 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
d439d286 19394 LIST_HEAD(mbox_cmd_list);
63e801ce 19395 uint8_t restart_loop;
695a814e 19396
d439d286 19397 /* Clean up internally queued mailbox commands with the vport */
695a814e
JS
19398 spin_lock_irq(&phba->hbalock);
19399 list_for_each_entry_safe(mb, nextmb, &phba->sli.mboxq, list) {
19400 if (mb->vport != vport)
19401 continue;
19402
19403 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19404 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19405 continue;
19406
d439d286
JS
19407 list_del(&mb->list);
19408 list_add_tail(&mb->list, &mbox_cmd_list);
19409 }
19410 /* Clean up active mailbox command with the vport */
19411 mb = phba->sli.mbox_active;
19412 if (mb && (mb->vport == vport)) {
19413 if ((mb->u.mb.mbxCommand == MBX_REG_LOGIN64) ||
19414 (mb->u.mb.mbxCommand == MBX_REG_VPI))
19415 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19416 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19417 act_mbx_ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
d439d286
JS
19418 /* Put reference count for delayed processing */
19419 act_mbx_ndlp = lpfc_nlp_get(act_mbx_ndlp);
19420 /* Unregister the RPI when mailbox complete */
19421 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19422 }
19423 }
63e801ce
JS
19424 /* Cleanup any mailbox completions which are not yet processed */
19425 do {
19426 restart_loop = 0;
19427 list_for_each_entry(mb, &phba->sli.mboxq_cmpl, list) {
19428 /*
19429 * If this mailox is already processed or it is
19430 * for another vport ignore it.
19431 */
19432 if ((mb->vport != vport) ||
19433 (mb->mbox_flag & LPFC_MBX_IMED_UNREG))
19434 continue;
19435
19436 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19437 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19438 continue;
19439
19440 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19441 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19442 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
63e801ce
JS
19443 /* Unregister the RPI when mailbox complete */
19444 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19445 restart_loop = 1;
19446 spin_unlock_irq(&phba->hbalock);
19447 spin_lock(shost->host_lock);
19448 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19449 spin_unlock(shost->host_lock);
19450 spin_lock_irq(&phba->hbalock);
19451 break;
19452 }
19453 }
19454 } while (restart_loop);
19455
d439d286
JS
19456 spin_unlock_irq(&phba->hbalock);
19457
19458 /* Release the cleaned-up mailbox commands */
19459 while (!list_empty(&mbox_cmd_list)) {
19460 list_remove_head(&mbox_cmd_list, mb, LPFC_MBOXQ_t, list);
695a814e 19461 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19462 mp = (struct lpfc_dmabuf *)(mb->ctx_buf);
695a814e
JS
19463 if (mp) {
19464 __lpfc_mbuf_free(phba, mp->virt, mp->phys);
19465 kfree(mp);
19466 }
3e1f0718
JS
19467 mb->ctx_buf = NULL;
19468 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
19469 mb->ctx_ndlp = NULL;
78730cfe 19470 if (ndlp) {
ec21b3b0 19471 spin_lock(shost->host_lock);
589a52d6 19472 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
ec21b3b0 19473 spin_unlock(shost->host_lock);
78730cfe 19474 lpfc_nlp_put(ndlp);
78730cfe 19475 }
695a814e 19476 }
695a814e
JS
19477 mempool_free(mb, phba->mbox_mem_pool);
19478 }
d439d286
JS
19479
19480 /* Release the ndlp with the cleaned-up active mailbox command */
19481 if (act_mbx_ndlp) {
19482 spin_lock(shost->host_lock);
19483 act_mbx_ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19484 spin_unlock(shost->host_lock);
19485 lpfc_nlp_put(act_mbx_ndlp);
695a814e 19486 }
695a814e
JS
19487}
19488
2a9bf3d0
JS
19489/**
19490 * lpfc_drain_txq - Drain the txq
19491 * @phba: Pointer to HBA context object.
19492 *
19493 * This function attempt to submit IOCBs on the txq
19494 * to the adapter. For SLI4 adapters, the txq contains
19495 * ELS IOCBs that have been deferred because the there
19496 * are no SGLs. This congestion can occur with large
19497 * vport counts during node discovery.
19498 **/
19499
19500uint32_t
19501lpfc_drain_txq(struct lpfc_hba *phba)
19502{
19503 LIST_HEAD(completions);
895427bd 19504 struct lpfc_sli_ring *pring;
2e706377 19505 struct lpfc_iocbq *piocbq = NULL;
2a9bf3d0
JS
19506 unsigned long iflags = 0;
19507 char *fail_msg = NULL;
19508 struct lpfc_sglq *sglq;
205e8240 19509 union lpfc_wqe128 wqe;
a2fc4aef 19510 uint32_t txq_cnt = 0;
dc19e3b4 19511 struct lpfc_queue *wq;
2a9bf3d0 19512
dc19e3b4
JS
19513 if (phba->link_flag & LS_MDS_LOOPBACK) {
19514 /* MDS WQE are posted only to first WQ*/
c00f62e6 19515 wq = phba->sli4_hba.hdwq[0].io_wq;
dc19e3b4
JS
19516 if (unlikely(!wq))
19517 return 0;
19518 pring = wq->pring;
19519 } else {
19520 wq = phba->sli4_hba.els_wq;
19521 if (unlikely(!wq))
19522 return 0;
19523 pring = lpfc_phba_elsring(phba);
19524 }
19525
19526 if (unlikely(!pring) || list_empty(&pring->txq))
1234a6d5 19527 return 0;
895427bd 19528
398d81c9 19529 spin_lock_irqsave(&pring->ring_lock, iflags);
0e9bb8d7
JS
19530 list_for_each_entry(piocbq, &pring->txq, list) {
19531 txq_cnt++;
19532 }
19533
19534 if (txq_cnt > pring->txq_max)
19535 pring->txq_max = txq_cnt;
2a9bf3d0 19536
398d81c9 19537 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19538
0e9bb8d7 19539 while (!list_empty(&pring->txq)) {
398d81c9 19540 spin_lock_irqsave(&pring->ring_lock, iflags);
2a9bf3d0 19541
19ca7609 19542 piocbq = lpfc_sli_ringtx_get(phba, pring);
a629852a 19543 if (!piocbq) {
398d81c9 19544 spin_unlock_irqrestore(&pring->ring_lock, iflags);
a629852a
JS
19545 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19546 "2823 txq empty and txq_cnt is %d\n ",
0e9bb8d7 19547 txq_cnt);
a629852a
JS
19548 break;
19549 }
895427bd 19550 sglq = __lpfc_sli_get_els_sglq(phba, piocbq);
2a9bf3d0 19551 if (!sglq) {
19ca7609 19552 __lpfc_sli_ringtx_put(phba, pring, piocbq);
398d81c9 19553 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19554 break;
2a9bf3d0 19555 }
0e9bb8d7 19556 txq_cnt--;
2a9bf3d0
JS
19557
19558 /* The xri and iocb resources secured,
19559 * attempt to issue request
19560 */
6d368e53 19561 piocbq->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0
JS
19562 piocbq->sli4_xritag = sglq->sli4_xritag;
19563 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocbq, sglq))
19564 fail_msg = "to convert bpl to sgl";
205e8240 19565 else if (lpfc_sli4_iocb2wqe(phba, piocbq, &wqe))
2a9bf3d0 19566 fail_msg = "to convert iocb to wqe";
dc19e3b4 19567 else if (lpfc_sli4_wq_put(wq, &wqe))
2a9bf3d0
JS
19568 fail_msg = " - Wq is full";
19569 else
19570 lpfc_sli_ringtxcmpl_put(phba, pring, piocbq);
19571
19572 if (fail_msg) {
19573 /* Failed means we can't issue and need to cancel */
19574 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19575 "2822 IOCB failed %s iotag 0x%x "
19576 "xri 0x%x\n",
19577 fail_msg,
19578 piocbq->iotag, piocbq->sli4_xritag);
19579 list_add_tail(&piocbq->list, &completions);
19580 }
398d81c9 19581 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0
JS
19582 }
19583
2a9bf3d0
JS
19584 /* Cancel all the IOCBs that cannot be issued */
19585 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
19586 IOERR_SLI_ABORTED);
19587
0e9bb8d7 19588 return txq_cnt;
2a9bf3d0 19589}
895427bd
JS
19590
19591/**
19592 * lpfc_wqe_bpl2sgl - Convert the bpl/bde to a sgl.
19593 * @phba: Pointer to HBA context object.
19594 * @pwqe: Pointer to command WQE.
19595 * @sglq: Pointer to the scatter gather queue object.
19596 *
19597 * This routine converts the bpl or bde that is in the WQE
19598 * to a sgl list for the sli4 hardware. The physical address
19599 * of the bpl/bde is converted back to a virtual address.
19600 * If the WQE contains a BPL then the list of BDE's is
19601 * converted to sli4_sge's. If the WQE contains a single
19602 * BDE then it is converted to a single sli_sge.
19603 * The WQE is still in cpu endianness so the contents of
19604 * the bpl can be used without byte swapping.
19605 *
19606 * Returns valid XRI = Success, NO_XRI = Failure.
19607 */
19608static uint16_t
19609lpfc_wqe_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *pwqeq,
19610 struct lpfc_sglq *sglq)
19611{
19612 uint16_t xritag = NO_XRI;
19613 struct ulp_bde64 *bpl = NULL;
19614 struct ulp_bde64 bde;
19615 struct sli4_sge *sgl = NULL;
19616 struct lpfc_dmabuf *dmabuf;
205e8240 19617 union lpfc_wqe128 *wqe;
895427bd
JS
19618 int numBdes = 0;
19619 int i = 0;
19620 uint32_t offset = 0; /* accumulated offset in the sg request list */
19621 int inbound = 0; /* number of sg reply entries inbound from firmware */
19622 uint32_t cmd;
19623
19624 if (!pwqeq || !sglq)
19625 return xritag;
19626
19627 sgl = (struct sli4_sge *)sglq->sgl;
19628 wqe = &pwqeq->wqe;
19629 pwqeq->iocb.ulpIoTag = pwqeq->iotag;
19630
19631 cmd = bf_get(wqe_cmnd, &wqe->generic.wqe_com);
19632 if (cmd == CMD_XMIT_BLS_RSP64_WQE)
19633 return sglq->sli4_xritag;
19634 numBdes = pwqeq->rsvd2;
19635 if (numBdes) {
19636 /* The addrHigh and addrLow fields within the WQE
19637 * have not been byteswapped yet so there is no
19638 * need to swap them back.
19639 */
19640 if (pwqeq->context3)
19641 dmabuf = (struct lpfc_dmabuf *)pwqeq->context3;
19642 else
19643 return xritag;
19644
19645 bpl = (struct ulp_bde64 *)dmabuf->virt;
19646 if (!bpl)
19647 return xritag;
19648
19649 for (i = 0; i < numBdes; i++) {
19650 /* Should already be byte swapped. */
19651 sgl->addr_hi = bpl->addrHigh;
19652 sgl->addr_lo = bpl->addrLow;
19653
19654 sgl->word2 = le32_to_cpu(sgl->word2);
19655 if ((i+1) == numBdes)
19656 bf_set(lpfc_sli4_sge_last, sgl, 1);
19657 else
19658 bf_set(lpfc_sli4_sge_last, sgl, 0);
19659 /* swap the size field back to the cpu so we
19660 * can assign it to the sgl.
19661 */
19662 bde.tus.w = le32_to_cpu(bpl->tus.w);
19663 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
19664 /* The offsets in the sgl need to be accumulated
19665 * separately for the request and reply lists.
19666 * The request is always first, the reply follows.
19667 */
19668 switch (cmd) {
19669 case CMD_GEN_REQUEST64_WQE:
19670 /* add up the reply sg entries */
19671 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
19672 inbound++;
19673 /* first inbound? reset the offset */
19674 if (inbound == 1)
19675 offset = 0;
19676 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19677 bf_set(lpfc_sli4_sge_type, sgl,
19678 LPFC_SGE_TYPE_DATA);
19679 offset += bde.tus.f.bdeSize;
19680 break;
19681 case CMD_FCP_TRSP64_WQE:
19682 bf_set(lpfc_sli4_sge_offset, sgl, 0);
19683 bf_set(lpfc_sli4_sge_type, sgl,
19684 LPFC_SGE_TYPE_DATA);
19685 break;
19686 case CMD_FCP_TSEND64_WQE:
19687 case CMD_FCP_TRECEIVE64_WQE:
19688 bf_set(lpfc_sli4_sge_type, sgl,
19689 bpl->tus.f.bdeFlags);
19690 if (i < 3)
19691 offset = 0;
19692 else
19693 offset += bde.tus.f.bdeSize;
19694 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19695 break;
19696 }
19697 sgl->word2 = cpu_to_le32(sgl->word2);
19698 bpl++;
19699 sgl++;
19700 }
19701 } else if (wqe->gen_req.bde.tus.f.bdeFlags == BUFF_TYPE_BDE_64) {
19702 /* The addrHigh and addrLow fields of the BDE have not
19703 * been byteswapped yet so they need to be swapped
19704 * before putting them in the sgl.
19705 */
19706 sgl->addr_hi = cpu_to_le32(wqe->gen_req.bde.addrHigh);
19707 sgl->addr_lo = cpu_to_le32(wqe->gen_req.bde.addrLow);
19708 sgl->word2 = le32_to_cpu(sgl->word2);
19709 bf_set(lpfc_sli4_sge_last, sgl, 1);
19710 sgl->word2 = cpu_to_le32(sgl->word2);
19711 sgl->sge_len = cpu_to_le32(wqe->gen_req.bde.tus.f.bdeSize);
19712 }
19713 return sglq->sli4_xritag;
19714}
19715
19716/**
19717 * lpfc_sli4_issue_wqe - Issue an SLI4 Work Queue Entry (WQE)
19718 * @phba: Pointer to HBA context object.
19719 * @ring_number: Base sli ring number
19720 * @pwqe: Pointer to command WQE.
19721 **/
19722int
1fbf9742 19723lpfc_sli4_issue_wqe(struct lpfc_hba *phba, struct lpfc_sli4_hdw_queue *qp,
895427bd
JS
19724 struct lpfc_iocbq *pwqe)
19725{
205e8240 19726 union lpfc_wqe128 *wqe = &pwqe->wqe;
f358dd0c 19727 struct lpfc_nvmet_rcv_ctx *ctxp;
895427bd
JS
19728 struct lpfc_queue *wq;
19729 struct lpfc_sglq *sglq;
19730 struct lpfc_sli_ring *pring;
19731 unsigned long iflags;
cd22d605 19732 uint32_t ret = 0;
895427bd
JS
19733
19734 /* NVME_LS and NVME_LS ABTS requests. */
19735 if (pwqe->iocb_flag & LPFC_IO_NVME_LS) {
19736 pring = phba->sli4_hba.nvmels_wq->pring;
6a828b0f
JS
19737 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
19738 qp, wq_access);
895427bd
JS
19739 sglq = __lpfc_sli_get_els_sglq(phba, pwqe);
19740 if (!sglq) {
19741 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19742 return WQE_BUSY;
19743 }
19744 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19745 pwqe->sli4_xritag = sglq->sli4_xritag;
19746 if (lpfc_wqe_bpl2sgl(phba, pwqe, sglq) == NO_XRI) {
19747 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19748 return WQE_ERROR;
19749 }
19750 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19751 pwqe->sli4_xritag);
cd22d605
DK
19752 ret = lpfc_sli4_wq_put(phba->sli4_hba.nvmels_wq, wqe);
19753 if (ret) {
895427bd 19754 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19755 return ret;
895427bd 19756 }
cd22d605 19757
895427bd
JS
19758 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19759 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19760 return 0;
19761 }
19762
19763 /* NVME_FCREQ and NVME_ABTS requests */
19764 if (pwqe->iocb_flag & LPFC_IO_NVME) {
19765 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
c00f62e6 19766 wq = qp->io_wq;
1fbf9742 19767 pring = wq->pring;
895427bd 19768
c00f62e6 19769 bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->io_cq_map);
895427bd 19770
6a828b0f
JS
19771 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
19772 qp, wq_access);
cd22d605
DK
19773 ret = lpfc_sli4_wq_put(wq, wqe);
19774 if (ret) {
895427bd 19775 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19776 return ret;
895427bd
JS
19777 }
19778 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19779 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19780 return 0;
19781 }
19782
f358dd0c
JS
19783 /* NVMET requests */
19784 if (pwqe->iocb_flag & LPFC_IO_NVMET) {
19785 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
c00f62e6 19786 wq = qp->io_wq;
1fbf9742 19787 pring = wq->pring;
f358dd0c 19788
f358dd0c 19789 ctxp = pwqe->context2;
6c621a22 19790 sglq = ctxp->ctxbuf->sglq;
f358dd0c
JS
19791 if (pwqe->sli4_xritag == NO_XRI) {
19792 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19793 pwqe->sli4_xritag = sglq->sli4_xritag;
19794 }
19795 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19796 pwqe->sli4_xritag);
c00f62e6 19797 bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->io_cq_map);
1fbf9742 19798
6a828b0f
JS
19799 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
19800 qp, wq_access);
cd22d605
DK
19801 ret = lpfc_sli4_wq_put(wq, wqe);
19802 if (ret) {
f358dd0c 19803 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19804 return ret;
f358dd0c
JS
19805 }
19806 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19807 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19808 return 0;
19809 }
895427bd
JS
19810 return WQE_ERROR;
19811}
c490850a
JS
19812
19813#ifdef LPFC_MXP_STAT
19814/**
19815 * lpfc_snapshot_mxp - Snapshot pbl, pvt and busy count
19816 * @phba: pointer to lpfc hba data structure.
19817 * @hwqid: belong to which HWQ.
19818 *
19819 * The purpose of this routine is to take a snapshot of pbl, pvt and busy count
19820 * 15 seconds after a test case is running.
19821 *
19822 * The user should call lpfc_debugfs_multixripools_write before running a test
19823 * case to clear stat_snapshot_taken. Then the user starts a test case. During
19824 * test case is running, stat_snapshot_taken is incremented by 1 every time when
19825 * this routine is called from heartbeat timer. When stat_snapshot_taken is
19826 * equal to LPFC_MXP_SNAPSHOT_TAKEN, a snapshot is taken.
19827 **/
19828void lpfc_snapshot_mxp(struct lpfc_hba *phba, u32 hwqid)
19829{
19830 struct lpfc_sli4_hdw_queue *qp;
19831 struct lpfc_multixri_pool *multixri_pool;
19832 struct lpfc_pvt_pool *pvt_pool;
19833 struct lpfc_pbl_pool *pbl_pool;
19834 u32 txcmplq_cnt;
19835
19836 qp = &phba->sli4_hba.hdwq[hwqid];
19837 multixri_pool = qp->p_multixri_pool;
19838 if (!multixri_pool)
19839 return;
19840
19841 if (multixri_pool->stat_snapshot_taken == LPFC_MXP_SNAPSHOT_TAKEN) {
19842 pvt_pool = &qp->p_multixri_pool->pvt_pool;
19843 pbl_pool = &qp->p_multixri_pool->pbl_pool;
c00f62e6 19844 txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt;
c490850a
JS
19845
19846 multixri_pool->stat_pbl_count = pbl_pool->count;
19847 multixri_pool->stat_pvt_count = pvt_pool->count;
19848 multixri_pool->stat_busy_count = txcmplq_cnt;
19849 }
19850
19851 multixri_pool->stat_snapshot_taken++;
19852}
19853#endif
19854
19855/**
19856 * lpfc_adjust_pvt_pool_count - Adjust private pool count
19857 * @phba: pointer to lpfc hba data structure.
19858 * @hwqid: belong to which HWQ.
19859 *
19860 * This routine moves some XRIs from private to public pool when private pool
19861 * is not busy.
19862 **/
19863void lpfc_adjust_pvt_pool_count(struct lpfc_hba *phba, u32 hwqid)
19864{
19865 struct lpfc_multixri_pool *multixri_pool;
19866 u32 io_req_count;
19867 u32 prev_io_req_count;
19868
19869 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
19870 if (!multixri_pool)
19871 return;
19872 io_req_count = multixri_pool->io_req_count;
19873 prev_io_req_count = multixri_pool->prev_io_req_count;
19874
19875 if (prev_io_req_count != io_req_count) {
19876 /* Private pool is busy */
19877 multixri_pool->prev_io_req_count = io_req_count;
19878 } else {
19879 /* Private pool is not busy.
19880 * Move XRIs from private to public pool.
19881 */
19882 lpfc_move_xri_pvt_to_pbl(phba, hwqid);
19883 }
19884}
19885
19886/**
19887 * lpfc_adjust_high_watermark - Adjust high watermark
19888 * @phba: pointer to lpfc hba data structure.
19889 * @hwqid: belong to which HWQ.
19890 *
19891 * This routine sets high watermark as number of outstanding XRIs,
19892 * but make sure the new value is between xri_limit/2 and xri_limit.
19893 **/
19894void lpfc_adjust_high_watermark(struct lpfc_hba *phba, u32 hwqid)
19895{
19896 u32 new_watermark;
19897 u32 watermark_max;
19898 u32 watermark_min;
19899 u32 xri_limit;
19900 u32 txcmplq_cnt;
19901 u32 abts_io_bufs;
19902 struct lpfc_multixri_pool *multixri_pool;
19903 struct lpfc_sli4_hdw_queue *qp;
19904
19905 qp = &phba->sli4_hba.hdwq[hwqid];
19906 multixri_pool = qp->p_multixri_pool;
19907 if (!multixri_pool)
19908 return;
19909 xri_limit = multixri_pool->xri_limit;
19910
19911 watermark_max = xri_limit;
19912 watermark_min = xri_limit / 2;
19913
c00f62e6 19914 txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt;
c490850a 19915 abts_io_bufs = qp->abts_scsi_io_bufs;
c00f62e6 19916 abts_io_bufs += qp->abts_nvme_io_bufs;
c490850a
JS
19917
19918 new_watermark = txcmplq_cnt + abts_io_bufs;
19919 new_watermark = min(watermark_max, new_watermark);
19920 new_watermark = max(watermark_min, new_watermark);
19921 multixri_pool->pvt_pool.high_watermark = new_watermark;
19922
19923#ifdef LPFC_MXP_STAT
19924 multixri_pool->stat_max_hwm = max(multixri_pool->stat_max_hwm,
19925 new_watermark);
19926#endif
19927}
19928
19929/**
19930 * lpfc_move_xri_pvt_to_pbl - Move some XRIs from private to public pool
19931 * @phba: pointer to lpfc hba data structure.
19932 * @hwqid: belong to which HWQ.
19933 *
19934 * This routine is called from hearbeat timer when pvt_pool is idle.
19935 * All free XRIs are moved from private to public pool on hwqid with 2 steps.
19936 * The first step moves (all - low_watermark) amount of XRIs.
19937 * The second step moves the rest of XRIs.
19938 **/
19939void lpfc_move_xri_pvt_to_pbl(struct lpfc_hba *phba, u32 hwqid)
19940{
19941 struct lpfc_pbl_pool *pbl_pool;
19942 struct lpfc_pvt_pool *pvt_pool;
6a828b0f 19943 struct lpfc_sli4_hdw_queue *qp;
c490850a
JS
19944 struct lpfc_io_buf *lpfc_ncmd;
19945 struct lpfc_io_buf *lpfc_ncmd_next;
19946 unsigned long iflag;
19947 struct list_head tmp_list;
19948 u32 tmp_count;
19949
6a828b0f
JS
19950 qp = &phba->sli4_hba.hdwq[hwqid];
19951 pbl_pool = &qp->p_multixri_pool->pbl_pool;
19952 pvt_pool = &qp->p_multixri_pool->pvt_pool;
c490850a
JS
19953 tmp_count = 0;
19954
6a828b0f
JS
19955 lpfc_qp_spin_lock_irqsave(&pbl_pool->lock, iflag, qp, mv_to_pub_pool);
19956 lpfc_qp_spin_lock(&pvt_pool->lock, qp, mv_from_pvt_pool);
c490850a
JS
19957
19958 if (pvt_pool->count > pvt_pool->low_watermark) {
19959 /* Step 1: move (all - low_watermark) from pvt_pool
19960 * to pbl_pool
19961 */
19962
19963 /* Move low watermark of bufs from pvt_pool to tmp_list */
19964 INIT_LIST_HEAD(&tmp_list);
19965 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
19966 &pvt_pool->list, list) {
19967 list_move_tail(&lpfc_ncmd->list, &tmp_list);
19968 tmp_count++;
19969 if (tmp_count >= pvt_pool->low_watermark)
19970 break;
19971 }
19972
19973 /* Move all bufs from pvt_pool to pbl_pool */
19974 list_splice_init(&pvt_pool->list, &pbl_pool->list);
19975
19976 /* Move all bufs from tmp_list to pvt_pool */
19977 list_splice(&tmp_list, &pvt_pool->list);
19978
19979 pbl_pool->count += (pvt_pool->count - tmp_count);
19980 pvt_pool->count = tmp_count;
19981 } else {
19982 /* Step 2: move the rest from pvt_pool to pbl_pool */
19983 list_splice_init(&pvt_pool->list, &pbl_pool->list);
19984 pbl_pool->count += pvt_pool->count;
19985 pvt_pool->count = 0;
19986 }
19987
19988 spin_unlock(&pvt_pool->lock);
19989 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
19990}
19991
19992/**
19993 * _lpfc_move_xri_pbl_to_pvt - Move some XRIs from public to private pool
19994 * @phba: pointer to lpfc hba data structure
19995 * @pbl_pool: specified public free XRI pool
19996 * @pvt_pool: specified private free XRI pool
19997 * @count: number of XRIs to move
19998 *
19999 * This routine tries to move some free common bufs from the specified pbl_pool
20000 * to the specified pvt_pool. It might move less than count XRIs if there's not
20001 * enough in public pool.
20002 *
20003 * Return:
20004 * true - if XRIs are successfully moved from the specified pbl_pool to the
20005 * specified pvt_pool
20006 * false - if the specified pbl_pool is empty or locked by someone else
20007 **/
20008static bool
6a828b0f
JS
20009_lpfc_move_xri_pbl_to_pvt(struct lpfc_hba *phba, struct lpfc_sli4_hdw_queue *qp,
20010 struct lpfc_pbl_pool *pbl_pool,
c490850a
JS
20011 struct lpfc_pvt_pool *pvt_pool, u32 count)
20012{
20013 struct lpfc_io_buf *lpfc_ncmd;
20014 struct lpfc_io_buf *lpfc_ncmd_next;
20015 unsigned long iflag;
20016 int ret;
20017
20018 ret = spin_trylock_irqsave(&pbl_pool->lock, iflag);
20019 if (ret) {
20020 if (pbl_pool->count) {
20021 /* Move a batch of XRIs from public to private pool */
6a828b0f 20022 lpfc_qp_spin_lock(&pvt_pool->lock, qp, mv_to_pvt_pool);
c490850a
JS
20023 list_for_each_entry_safe(lpfc_ncmd,
20024 lpfc_ncmd_next,
20025 &pbl_pool->list,
20026 list) {
20027 list_move_tail(&lpfc_ncmd->list,
20028 &pvt_pool->list);
20029 pvt_pool->count++;
20030 pbl_pool->count--;
20031 count--;
20032 if (count == 0)
20033 break;
20034 }
20035
20036 spin_unlock(&pvt_pool->lock);
20037 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20038 return true;
20039 }
20040 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20041 }
20042
20043 return false;
20044}
20045
20046/**
20047 * lpfc_move_xri_pbl_to_pvt - Move some XRIs from public to private pool
20048 * @phba: pointer to lpfc hba data structure.
20049 * @hwqid: belong to which HWQ.
20050 * @count: number of XRIs to move
20051 *
20052 * This routine tries to find some free common bufs in one of public pools with
20053 * Round Robin method. The search always starts from local hwqid, then the next
20054 * HWQ which was found last time (rrb_next_hwqid). Once a public pool is found,
20055 * a batch of free common bufs are moved to private pool on hwqid.
20056 * It might move less than count XRIs if there's not enough in public pool.
20057 **/
20058void lpfc_move_xri_pbl_to_pvt(struct lpfc_hba *phba, u32 hwqid, u32 count)
20059{
20060 struct lpfc_multixri_pool *multixri_pool;
20061 struct lpfc_multixri_pool *next_multixri_pool;
20062 struct lpfc_pvt_pool *pvt_pool;
20063 struct lpfc_pbl_pool *pbl_pool;
6a828b0f 20064 struct lpfc_sli4_hdw_queue *qp;
c490850a
JS
20065 u32 next_hwqid;
20066 u32 hwq_count;
20067 int ret;
20068
6a828b0f
JS
20069 qp = &phba->sli4_hba.hdwq[hwqid];
20070 multixri_pool = qp->p_multixri_pool;
c490850a
JS
20071 pvt_pool = &multixri_pool->pvt_pool;
20072 pbl_pool = &multixri_pool->pbl_pool;
20073
20074 /* Check if local pbl_pool is available */
6a828b0f 20075 ret = _lpfc_move_xri_pbl_to_pvt(phba, qp, pbl_pool, pvt_pool, count);
c490850a
JS
20076 if (ret) {
20077#ifdef LPFC_MXP_STAT
20078 multixri_pool->local_pbl_hit_count++;
20079#endif
20080 return;
20081 }
20082
20083 hwq_count = phba->cfg_hdw_queue;
20084
20085 /* Get the next hwqid which was found last time */
20086 next_hwqid = multixri_pool->rrb_next_hwqid;
20087
20088 do {
20089 /* Go to next hwq */
20090 next_hwqid = (next_hwqid + 1) % hwq_count;
20091
20092 next_multixri_pool =
20093 phba->sli4_hba.hdwq[next_hwqid].p_multixri_pool;
20094 pbl_pool = &next_multixri_pool->pbl_pool;
20095
20096 /* Check if the public free xri pool is available */
20097 ret = _lpfc_move_xri_pbl_to_pvt(
6a828b0f 20098 phba, qp, pbl_pool, pvt_pool, count);
c490850a
JS
20099
20100 /* Exit while-loop if success or all hwqid are checked */
20101 } while (!ret && next_hwqid != multixri_pool->rrb_next_hwqid);
20102
20103 /* Starting point for the next time */
20104 multixri_pool->rrb_next_hwqid = next_hwqid;
20105
20106 if (!ret) {
20107 /* stats: all public pools are empty*/
20108 multixri_pool->pbl_empty_count++;
20109 }
20110
20111#ifdef LPFC_MXP_STAT
20112 if (ret) {
20113 if (next_hwqid == hwqid)
20114 multixri_pool->local_pbl_hit_count++;
20115 else
20116 multixri_pool->other_pbl_hit_count++;
20117 }
20118#endif
20119}
20120
20121/**
20122 * lpfc_keep_pvt_pool_above_lowwm - Keep pvt_pool above low watermark
20123 * @phba: pointer to lpfc hba data structure.
20124 * @qp: belong to which HWQ.
20125 *
20126 * This routine get a batch of XRIs from pbl_pool if pvt_pool is less than
20127 * low watermark.
20128 **/
20129void lpfc_keep_pvt_pool_above_lowwm(struct lpfc_hba *phba, u32 hwqid)
20130{
20131 struct lpfc_multixri_pool *multixri_pool;
20132 struct lpfc_pvt_pool *pvt_pool;
20133
20134 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
20135 pvt_pool = &multixri_pool->pvt_pool;
20136
20137 if (pvt_pool->count < pvt_pool->low_watermark)
20138 lpfc_move_xri_pbl_to_pvt(phba, hwqid, XRI_BATCH);
20139}
20140
20141/**
20142 * lpfc_release_io_buf - Return one IO buf back to free pool
20143 * @phba: pointer to lpfc hba data structure.
20144 * @lpfc_ncmd: IO buf to be returned.
20145 * @qp: belong to which HWQ.
20146 *
20147 * This routine returns one IO buf back to free pool. If this is an urgent IO,
20148 * the IO buf is returned to expedite pool. If cfg_xri_rebalancing==1,
20149 * the IO buf is returned to pbl_pool or pvt_pool based on watermark and
20150 * xri_limit. If cfg_xri_rebalancing==0, the IO buf is returned to
20151 * lpfc_io_buf_list_put.
20152 **/
20153void lpfc_release_io_buf(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_ncmd,
20154 struct lpfc_sli4_hdw_queue *qp)
20155{
20156 unsigned long iflag;
20157 struct lpfc_pbl_pool *pbl_pool;
20158 struct lpfc_pvt_pool *pvt_pool;
20159 struct lpfc_epd_pool *epd_pool;
20160 u32 txcmplq_cnt;
20161 u32 xri_owned;
20162 u32 xri_limit;
20163 u32 abts_io_bufs;
20164
20165 /* MUST zero fields if buffer is reused by another protocol */
20166 lpfc_ncmd->nvmeCmd = NULL;
20167 lpfc_ncmd->cur_iocbq.wqe_cmpl = NULL;
20168 lpfc_ncmd->cur_iocbq.iocb_cmpl = NULL;
20169
35a635af
JS
20170 if (phba->cfg_xpsgl && !phba->nvmet_support &&
20171 !list_empty(&lpfc_ncmd->dma_sgl_xtra_list))
20172 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
20173
20174 if (!list_empty(&lpfc_ncmd->dma_cmd_rsp_list))
20175 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
20176
c490850a
JS
20177 if (phba->cfg_xri_rebalancing) {
20178 if (lpfc_ncmd->expedite) {
20179 /* Return to expedite pool */
20180 epd_pool = &phba->epd_pool;
20181 spin_lock_irqsave(&epd_pool->lock, iflag);
20182 list_add_tail(&lpfc_ncmd->list, &epd_pool->list);
20183 epd_pool->count++;
20184 spin_unlock_irqrestore(&epd_pool->lock, iflag);
20185 return;
20186 }
20187
20188 /* Avoid invalid access if an IO sneaks in and is being rejected
20189 * just _after_ xri pools are destroyed in lpfc_offline.
20190 * Nothing much can be done at this point.
20191 */
20192 if (!qp->p_multixri_pool)
20193 return;
20194
20195 pbl_pool = &qp->p_multixri_pool->pbl_pool;
20196 pvt_pool = &qp->p_multixri_pool->pvt_pool;
20197
c00f62e6 20198 txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt;
c490850a 20199 abts_io_bufs = qp->abts_scsi_io_bufs;
c00f62e6 20200 abts_io_bufs += qp->abts_nvme_io_bufs;
c490850a
JS
20201
20202 xri_owned = pvt_pool->count + txcmplq_cnt + abts_io_bufs;
20203 xri_limit = qp->p_multixri_pool->xri_limit;
20204
20205#ifdef LPFC_MXP_STAT
20206 if (xri_owned <= xri_limit)
20207 qp->p_multixri_pool->below_limit_count++;
20208 else
20209 qp->p_multixri_pool->above_limit_count++;
20210#endif
20211
20212 /* XRI goes to either public or private free xri pool
20213 * based on watermark and xri_limit
20214 */
20215 if ((pvt_pool->count < pvt_pool->low_watermark) ||
20216 (xri_owned < xri_limit &&
20217 pvt_pool->count < pvt_pool->high_watermark)) {
6a828b0f
JS
20218 lpfc_qp_spin_lock_irqsave(&pvt_pool->lock, iflag,
20219 qp, free_pvt_pool);
c490850a
JS
20220 list_add_tail(&lpfc_ncmd->list,
20221 &pvt_pool->list);
20222 pvt_pool->count++;
20223 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20224 } else {
6a828b0f
JS
20225 lpfc_qp_spin_lock_irqsave(&pbl_pool->lock, iflag,
20226 qp, free_pub_pool);
c490850a
JS
20227 list_add_tail(&lpfc_ncmd->list,
20228 &pbl_pool->list);
20229 pbl_pool->count++;
20230 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20231 }
20232 } else {
6a828b0f
JS
20233 lpfc_qp_spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag,
20234 qp, free_xri);
c490850a
JS
20235 list_add_tail(&lpfc_ncmd->list,
20236 &qp->lpfc_io_buf_list_put);
20237 qp->put_io_bufs++;
20238 spin_unlock_irqrestore(&qp->io_buf_list_put_lock,
20239 iflag);
20240 }
20241}
20242
20243/**
20244 * lpfc_get_io_buf_from_private_pool - Get one free IO buf from private pool
20245 * @phba: pointer to lpfc hba data structure.
20246 * @pvt_pool: pointer to private pool data structure.
20247 * @ndlp: pointer to lpfc nodelist data structure.
20248 *
20249 * This routine tries to get one free IO buf from private pool.
20250 *
20251 * Return:
20252 * pointer to one free IO buf - if private pool is not empty
20253 * NULL - if private pool is empty
20254 **/
20255static struct lpfc_io_buf *
20256lpfc_get_io_buf_from_private_pool(struct lpfc_hba *phba,
6a828b0f 20257 struct lpfc_sli4_hdw_queue *qp,
c490850a
JS
20258 struct lpfc_pvt_pool *pvt_pool,
20259 struct lpfc_nodelist *ndlp)
20260{
20261 struct lpfc_io_buf *lpfc_ncmd;
20262 struct lpfc_io_buf *lpfc_ncmd_next;
20263 unsigned long iflag;
20264
6a828b0f 20265 lpfc_qp_spin_lock_irqsave(&pvt_pool->lock, iflag, qp, alloc_pvt_pool);
c490850a
JS
20266 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20267 &pvt_pool->list, list) {
20268 if (lpfc_test_rrq_active(
20269 phba, ndlp, lpfc_ncmd->cur_iocbq.sli4_lxritag))
20270 continue;
20271 list_del(&lpfc_ncmd->list);
20272 pvt_pool->count--;
20273 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20274 return lpfc_ncmd;
20275 }
20276 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20277
20278 return NULL;
20279}
20280
20281/**
20282 * lpfc_get_io_buf_from_expedite_pool - Get one free IO buf from expedite pool
20283 * @phba: pointer to lpfc hba data structure.
20284 *
20285 * This routine tries to get one free IO buf from expedite pool.
20286 *
20287 * Return:
20288 * pointer to one free IO buf - if expedite pool is not empty
20289 * NULL - if expedite pool is empty
20290 **/
20291static struct lpfc_io_buf *
20292lpfc_get_io_buf_from_expedite_pool(struct lpfc_hba *phba)
20293{
20294 struct lpfc_io_buf *lpfc_ncmd;
20295 struct lpfc_io_buf *lpfc_ncmd_next;
20296 unsigned long iflag;
20297 struct lpfc_epd_pool *epd_pool;
20298
20299 epd_pool = &phba->epd_pool;
20300 lpfc_ncmd = NULL;
20301
20302 spin_lock_irqsave(&epd_pool->lock, iflag);
20303 if (epd_pool->count > 0) {
20304 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20305 &epd_pool->list, list) {
20306 list_del(&lpfc_ncmd->list);
20307 epd_pool->count--;
20308 break;
20309 }
20310 }
20311 spin_unlock_irqrestore(&epd_pool->lock, iflag);
20312
20313 return lpfc_ncmd;
20314}
20315
20316/**
20317 * lpfc_get_io_buf_from_multixri_pools - Get one free IO bufs
20318 * @phba: pointer to lpfc hba data structure.
20319 * @ndlp: pointer to lpfc nodelist data structure.
20320 * @hwqid: belong to which HWQ
20321 * @expedite: 1 means this request is urgent.
20322 *
20323 * This routine will do the following actions and then return a pointer to
20324 * one free IO buf.
20325 *
20326 * 1. If private free xri count is empty, move some XRIs from public to
20327 * private pool.
20328 * 2. Get one XRI from private free xri pool.
20329 * 3. If we fail to get one from pvt_pool and this is an expedite request,
20330 * get one free xri from expedite pool.
20331 *
20332 * Note: ndlp is only used on SCSI side for RRQ testing.
20333 * The caller should pass NULL for ndlp on NVME side.
20334 *
20335 * Return:
20336 * pointer to one free IO buf - if private pool is not empty
20337 * NULL - if private pool is empty
20338 **/
20339static struct lpfc_io_buf *
20340lpfc_get_io_buf_from_multixri_pools(struct lpfc_hba *phba,
20341 struct lpfc_nodelist *ndlp,
20342 int hwqid, int expedite)
20343{
20344 struct lpfc_sli4_hdw_queue *qp;
20345 struct lpfc_multixri_pool *multixri_pool;
20346 struct lpfc_pvt_pool *pvt_pool;
20347 struct lpfc_io_buf *lpfc_ncmd;
20348
20349 qp = &phba->sli4_hba.hdwq[hwqid];
20350 lpfc_ncmd = NULL;
20351 multixri_pool = qp->p_multixri_pool;
20352 pvt_pool = &multixri_pool->pvt_pool;
20353 multixri_pool->io_req_count++;
20354
20355 /* If pvt_pool is empty, move some XRIs from public to private pool */
20356 if (pvt_pool->count == 0)
20357 lpfc_move_xri_pbl_to_pvt(phba, hwqid, XRI_BATCH);
20358
20359 /* Get one XRI from private free xri pool */
6a828b0f 20360 lpfc_ncmd = lpfc_get_io_buf_from_private_pool(phba, qp, pvt_pool, ndlp);
c490850a
JS
20361
20362 if (lpfc_ncmd) {
20363 lpfc_ncmd->hdwq = qp;
20364 lpfc_ncmd->hdwq_no = hwqid;
20365 } else if (expedite) {
20366 /* If we fail to get one from pvt_pool and this is an expedite
20367 * request, get one free xri from expedite pool.
20368 */
20369 lpfc_ncmd = lpfc_get_io_buf_from_expedite_pool(phba);
20370 }
20371
20372 return lpfc_ncmd;
20373}
20374
20375static inline struct lpfc_io_buf *
20376lpfc_io_buf(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, int idx)
20377{
20378 struct lpfc_sli4_hdw_queue *qp;
20379 struct lpfc_io_buf *lpfc_cmd, *lpfc_cmd_next;
20380
20381 qp = &phba->sli4_hba.hdwq[idx];
20382 list_for_each_entry_safe(lpfc_cmd, lpfc_cmd_next,
20383 &qp->lpfc_io_buf_list_get, list) {
20384 if (lpfc_test_rrq_active(phba, ndlp,
20385 lpfc_cmd->cur_iocbq.sli4_lxritag))
20386 continue;
20387
20388 if (lpfc_cmd->flags & LPFC_SBUF_NOT_POSTED)
20389 continue;
20390
20391 list_del_init(&lpfc_cmd->list);
20392 qp->get_io_bufs--;
20393 lpfc_cmd->hdwq = qp;
20394 lpfc_cmd->hdwq_no = idx;
20395 return lpfc_cmd;
20396 }
20397 return NULL;
20398}
20399
20400/**
20401 * lpfc_get_io_buf - Get one IO buffer from free pool
20402 * @phba: The HBA for which this call is being executed.
20403 * @ndlp: pointer to lpfc nodelist data structure.
20404 * @hwqid: belong to which HWQ
20405 * @expedite: 1 means this request is urgent.
20406 *
20407 * This routine gets one IO buffer from free pool. If cfg_xri_rebalancing==1,
20408 * removes a IO buffer from multiXRI pools. If cfg_xri_rebalancing==0, removes
20409 * a IO buffer from head of @hdwq io_buf_list and returns to caller.
20410 *
20411 * Note: ndlp is only used on SCSI side for RRQ testing.
20412 * The caller should pass NULL for ndlp on NVME side.
20413 *
20414 * Return codes:
20415 * NULL - Error
20416 * Pointer to lpfc_io_buf - Success
20417 **/
20418struct lpfc_io_buf *lpfc_get_io_buf(struct lpfc_hba *phba,
20419 struct lpfc_nodelist *ndlp,
20420 u32 hwqid, int expedite)
20421{
20422 struct lpfc_sli4_hdw_queue *qp;
20423 unsigned long iflag;
20424 struct lpfc_io_buf *lpfc_cmd;
20425
20426 qp = &phba->sli4_hba.hdwq[hwqid];
20427 lpfc_cmd = NULL;
20428
20429 if (phba->cfg_xri_rebalancing)
20430 lpfc_cmd = lpfc_get_io_buf_from_multixri_pools(
20431 phba, ndlp, hwqid, expedite);
20432 else {
6a828b0f
JS
20433 lpfc_qp_spin_lock_irqsave(&qp->io_buf_list_get_lock, iflag,
20434 qp, alloc_xri_get);
c490850a
JS
20435 if (qp->get_io_bufs > LPFC_NVME_EXPEDITE_XRICNT || expedite)
20436 lpfc_cmd = lpfc_io_buf(phba, ndlp, hwqid);
20437 if (!lpfc_cmd) {
6a828b0f
JS
20438 lpfc_qp_spin_lock(&qp->io_buf_list_put_lock,
20439 qp, alloc_xri_put);
c490850a
JS
20440 list_splice(&qp->lpfc_io_buf_list_put,
20441 &qp->lpfc_io_buf_list_get);
20442 qp->get_io_bufs += qp->put_io_bufs;
20443 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
20444 qp->put_io_bufs = 0;
20445 spin_unlock(&qp->io_buf_list_put_lock);
20446 if (qp->get_io_bufs > LPFC_NVME_EXPEDITE_XRICNT ||
20447 expedite)
20448 lpfc_cmd = lpfc_io_buf(phba, ndlp, hwqid);
20449 }
20450 spin_unlock_irqrestore(&qp->io_buf_list_get_lock, iflag);
20451 }
20452
20453 return lpfc_cmd;
20454}
d79c9e9d
JS
20455
20456/**
20457 * lpfc_get_sgl_per_hdwq - Get one SGL chunk from hdwq's pool
20458 * @phba: The HBA for which this call is being executed.
20459 * @lpfc_buf: IO buf structure to append the SGL chunk
20460 *
20461 * This routine gets one SGL chunk buffer from hdwq's SGL chunk pool,
20462 * and will allocate an SGL chunk if the pool is empty.
20463 *
20464 * Return codes:
20465 * NULL - Error
20466 * Pointer to sli4_hybrid_sgl - Success
20467 **/
20468struct sli4_hybrid_sgl *
20469lpfc_get_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_buf)
20470{
20471 struct sli4_hybrid_sgl *list_entry = NULL;
20472 struct sli4_hybrid_sgl *tmp = NULL;
20473 struct sli4_hybrid_sgl *allocated_sgl = NULL;
20474 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20475 struct list_head *buf_list = &hdwq->sgl_list;
a4c21acc 20476 unsigned long iflags;
d79c9e9d 20477
a4c21acc 20478 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20479
20480 if (likely(!list_empty(buf_list))) {
20481 /* break off 1 chunk from the sgl_list */
20482 list_for_each_entry_safe(list_entry, tmp,
20483 buf_list, list_node) {
20484 list_move_tail(&list_entry->list_node,
20485 &lpfc_buf->dma_sgl_xtra_list);
20486 break;
20487 }
20488 } else {
20489 /* allocate more */
a4c21acc 20490 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20491 tmp = kmalloc_node(sizeof(*tmp), GFP_ATOMIC,
20492 cpu_to_node(smp_processor_id()));
20493 if (!tmp) {
20494 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20495 "8353 error kmalloc memory for HDWQ "
20496 "%d %s\n",
20497 lpfc_buf->hdwq_no, __func__);
20498 return NULL;
20499 }
20500
20501 tmp->dma_sgl = dma_pool_alloc(phba->lpfc_sg_dma_buf_pool,
20502 GFP_ATOMIC, &tmp->dma_phys_sgl);
20503 if (!tmp->dma_sgl) {
20504 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20505 "8354 error pool_alloc memory for HDWQ "
20506 "%d %s\n",
20507 lpfc_buf->hdwq_no, __func__);
20508 kfree(tmp);
20509 return NULL;
20510 }
20511
a4c21acc 20512 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20513 list_add_tail(&tmp->list_node, &lpfc_buf->dma_sgl_xtra_list);
20514 }
20515
20516 allocated_sgl = list_last_entry(&lpfc_buf->dma_sgl_xtra_list,
20517 struct sli4_hybrid_sgl,
20518 list_node);
20519
a4c21acc 20520 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20521
20522 return allocated_sgl;
20523}
20524
20525/**
20526 * lpfc_put_sgl_per_hdwq - Put one SGL chunk into hdwq pool
20527 * @phba: The HBA for which this call is being executed.
20528 * @lpfc_buf: IO buf structure with the SGL chunk
20529 *
20530 * This routine puts one SGL chunk buffer into hdwq's SGL chunk pool.
20531 *
20532 * Return codes:
20533 * 0 - Success
20534 * -EINVAL - Error
20535 **/
20536int
20537lpfc_put_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_buf)
20538{
20539 int rc = 0;
20540 struct sli4_hybrid_sgl *list_entry = NULL;
20541 struct sli4_hybrid_sgl *tmp = NULL;
20542 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20543 struct list_head *buf_list = &hdwq->sgl_list;
a4c21acc 20544 unsigned long iflags;
d79c9e9d 20545
a4c21acc 20546 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20547
20548 if (likely(!list_empty(&lpfc_buf->dma_sgl_xtra_list))) {
20549 list_for_each_entry_safe(list_entry, tmp,
20550 &lpfc_buf->dma_sgl_xtra_list,
20551 list_node) {
20552 list_move_tail(&list_entry->list_node,
20553 buf_list);
20554 }
20555 } else {
20556 rc = -EINVAL;
20557 }
20558
a4c21acc 20559 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20560 return rc;
20561}
20562
20563/**
20564 * lpfc_free_sgl_per_hdwq - Free all SGL chunks of hdwq pool
20565 * @phba: phba object
20566 * @hdwq: hdwq to cleanup sgl buff resources on
20567 *
20568 * This routine frees all SGL chunks of hdwq SGL chunk pool.
20569 *
20570 * Return codes:
20571 * None
20572 **/
20573void
20574lpfc_free_sgl_per_hdwq(struct lpfc_hba *phba,
20575 struct lpfc_sli4_hdw_queue *hdwq)
20576{
20577 struct list_head *buf_list = &hdwq->sgl_list;
20578 struct sli4_hybrid_sgl *list_entry = NULL;
20579 struct sli4_hybrid_sgl *tmp = NULL;
a4c21acc 20580 unsigned long iflags;
d79c9e9d 20581
a4c21acc 20582 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20583
20584 /* Free sgl pool */
20585 list_for_each_entry_safe(list_entry, tmp,
20586 buf_list, list_node) {
20587 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
20588 list_entry->dma_sgl,
20589 list_entry->dma_phys_sgl);
20590 list_del(&list_entry->list_node);
20591 kfree(list_entry);
20592 }
20593
a4c21acc 20594 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20595}
20596
20597/**
20598 * lpfc_get_cmd_rsp_buf_per_hdwq - Get one CMD/RSP buffer from hdwq
20599 * @phba: The HBA for which this call is being executed.
20600 * @lpfc_buf: IO buf structure to attach the CMD/RSP buffer
20601 *
20602 * This routine gets one CMD/RSP buffer from hdwq's CMD/RSP pool,
20603 * and will allocate an CMD/RSP buffer if the pool is empty.
20604 *
20605 * Return codes:
20606 * NULL - Error
20607 * Pointer to fcp_cmd_rsp_buf - Success
20608 **/
20609struct fcp_cmd_rsp_buf *
20610lpfc_get_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
20611 struct lpfc_io_buf *lpfc_buf)
20612{
20613 struct fcp_cmd_rsp_buf *list_entry = NULL;
20614 struct fcp_cmd_rsp_buf *tmp = NULL;
20615 struct fcp_cmd_rsp_buf *allocated_buf = NULL;
20616 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20617 struct list_head *buf_list = &hdwq->cmd_rsp_buf_list;
a4c21acc 20618 unsigned long iflags;
d79c9e9d 20619
a4c21acc 20620 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20621
20622 if (likely(!list_empty(buf_list))) {
20623 /* break off 1 chunk from the list */
20624 list_for_each_entry_safe(list_entry, tmp,
20625 buf_list,
20626 list_node) {
20627 list_move_tail(&list_entry->list_node,
20628 &lpfc_buf->dma_cmd_rsp_list);
20629 break;
20630 }
20631 } else {
20632 /* allocate more */
a4c21acc 20633 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20634 tmp = kmalloc_node(sizeof(*tmp), GFP_ATOMIC,
20635 cpu_to_node(smp_processor_id()));
20636 if (!tmp) {
20637 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20638 "8355 error kmalloc memory for HDWQ "
20639 "%d %s\n",
20640 lpfc_buf->hdwq_no, __func__);
20641 return NULL;
20642 }
20643
20644 tmp->fcp_cmnd = dma_pool_alloc(phba->lpfc_cmd_rsp_buf_pool,
20645 GFP_ATOMIC,
20646 &tmp->fcp_cmd_rsp_dma_handle);
20647
20648 if (!tmp->fcp_cmnd) {
20649 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20650 "8356 error pool_alloc memory for HDWQ "
20651 "%d %s\n",
20652 lpfc_buf->hdwq_no, __func__);
20653 kfree(tmp);
20654 return NULL;
20655 }
20656
20657 tmp->fcp_rsp = (struct fcp_rsp *)((uint8_t *)tmp->fcp_cmnd +
20658 sizeof(struct fcp_cmnd));
20659
a4c21acc 20660 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20661 list_add_tail(&tmp->list_node, &lpfc_buf->dma_cmd_rsp_list);
20662 }
20663
20664 allocated_buf = list_last_entry(&lpfc_buf->dma_cmd_rsp_list,
20665 struct fcp_cmd_rsp_buf,
20666 list_node);
20667
a4c21acc 20668 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20669
20670 return allocated_buf;
20671}
20672
20673/**
20674 * lpfc_put_cmd_rsp_buf_per_hdwq - Put one CMD/RSP buffer into hdwq pool
20675 * @phba: The HBA for which this call is being executed.
20676 * @lpfc_buf: IO buf structure with the CMD/RSP buf
20677 *
20678 * This routine puts one CMD/RSP buffer into executing CPU's CMD/RSP pool.
20679 *
20680 * Return codes:
20681 * 0 - Success
20682 * -EINVAL - Error
20683 **/
20684int
20685lpfc_put_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
20686 struct lpfc_io_buf *lpfc_buf)
20687{
20688 int rc = 0;
20689 struct fcp_cmd_rsp_buf *list_entry = NULL;
20690 struct fcp_cmd_rsp_buf *tmp = NULL;
20691 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20692 struct list_head *buf_list = &hdwq->cmd_rsp_buf_list;
a4c21acc 20693 unsigned long iflags;
d79c9e9d 20694
a4c21acc 20695 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20696
20697 if (likely(!list_empty(&lpfc_buf->dma_cmd_rsp_list))) {
20698 list_for_each_entry_safe(list_entry, tmp,
20699 &lpfc_buf->dma_cmd_rsp_list,
20700 list_node) {
20701 list_move_tail(&list_entry->list_node,
20702 buf_list);
20703 }
20704 } else {
20705 rc = -EINVAL;
20706 }
20707
a4c21acc 20708 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20709 return rc;
20710}
20711
20712/**
20713 * lpfc_free_cmd_rsp_buf_per_hdwq - Free all CMD/RSP chunks of hdwq pool
20714 * @phba: phba object
20715 * @hdwq: hdwq to cleanup cmd rsp buff resources on
20716 *
20717 * This routine frees all CMD/RSP buffers of hdwq's CMD/RSP buf pool.
20718 *
20719 * Return codes:
20720 * None
20721 **/
20722void
20723lpfc_free_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
20724 struct lpfc_sli4_hdw_queue *hdwq)
20725{
20726 struct list_head *buf_list = &hdwq->cmd_rsp_buf_list;
20727 struct fcp_cmd_rsp_buf *list_entry = NULL;
20728 struct fcp_cmd_rsp_buf *tmp = NULL;
a4c21acc 20729 unsigned long iflags;
d79c9e9d 20730
a4c21acc 20731 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20732
20733 /* Free cmd_rsp buf pool */
20734 list_for_each_entry_safe(list_entry, tmp,
20735 buf_list,
20736 list_node) {
20737 dma_pool_free(phba->lpfc_cmd_rsp_buf_pool,
20738 list_entry->fcp_cmnd,
20739 list_entry->fcp_cmd_rsp_dma_handle);
20740 list_del(&list_entry->list_node);
20741 kfree(list_entry);
20742 }
20743
a4c21acc 20744 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d 20745}