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1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
145e5a8a 4 * Copyright (C) 2017-2020 Broadcom. All Rights Reserved. The term *
3e21d1cb 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
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10 * *
11 * This program is free software; you can redistribute it and/or *
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12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
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22 *******************************************************************/
23
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24#include <linux/blkdev.h>
25#include <linux/pci.h>
26#include <linux/interrupt.h>
27#include <linux/delay.h>
5a0e3ad6 28#include <linux/slab.h>
1c2ba475 29#include <linux/lockdep.h>
dea3101e 30
91886523 31#include <scsi/scsi.h>
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32#include <scsi/scsi_cmnd.h>
33#include <scsi/scsi_device.h>
34#include <scsi/scsi_host.h>
f888ba3c 35#include <scsi/scsi_transport_fc.h>
da0436e9 36#include <scsi/fc/fc_fs.h>
0d878419 37#include <linux/aer.h>
86ee57a9 38#include <linux/crash_dump.h>
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39#ifdef CONFIG_X86
40#include <asm/set_memory.h>
41#endif
dea3101e 42
da0436e9 43#include "lpfc_hw4.h"
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44#include "lpfc_hw.h"
45#include "lpfc_sli.h"
da0436e9 46#include "lpfc_sli4.h"
ea2151b4 47#include "lpfc_nl.h"
dea3101e 48#include "lpfc_disc.h"
dea3101e 49#include "lpfc.h"
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50#include "lpfc_scsi.h"
51#include "lpfc_nvme.h"
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52#include "lpfc_crtn.h"
53#include "lpfc_logmsg.h"
54#include "lpfc_compat.h"
858c9f6c 55#include "lpfc_debugfs.h"
04c68496 56#include "lpfc_vport.h"
61bda8f7 57#include "lpfc_version.h"
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58
59/* There are only four IOCB completion types. */
60typedef enum _lpfc_iocb_type {
61 LPFC_UNKNOWN_IOCB,
62 LPFC_UNSOL_IOCB,
63 LPFC_SOL_IOCB,
64 LPFC_ABORT_IOCB
65} lpfc_iocb_type;
66
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67
68/* Provide function prototypes local to this module. */
69static int lpfc_sli_issue_mbox_s4(struct lpfc_hba *, LPFC_MBOXQ_t *,
70 uint32_t);
71static int lpfc_sli4_read_rev(struct lpfc_hba *, LPFC_MBOXQ_t *,
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72 uint8_t *, uint32_t *);
73static struct lpfc_iocbq *lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *,
74 struct lpfc_iocbq *);
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75static void lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *,
76 struct hbq_dmabuf *);
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77static void lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
78 struct hbq_dmabuf *dmabuf);
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79static bool lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba,
80 struct lpfc_queue *cq, struct lpfc_cqe *cqe);
895427bd 81static int lpfc_sli4_post_sgl_list(struct lpfc_hba *, struct list_head *,
8a9d2e80 82 int);
f485c18d 83static void lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba,
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84 struct lpfc_queue *eq,
85 struct lpfc_eqe *eqe);
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86static bool lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba);
87static bool lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba);
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88static struct lpfc_cqe *lpfc_sli4_cq_get(struct lpfc_queue *q);
89static void __lpfc_sli4_consume_cqe(struct lpfc_hba *phba,
90 struct lpfc_queue *cq,
91 struct lpfc_cqe *cqe);
0558056c 92
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93static IOCB_t *
94lpfc_get_iocb_from_iocbq(struct lpfc_iocbq *iocbq)
95{
96 return &iocbq->iocb;
97}
98
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99#if defined(CONFIG_64BIT) && defined(__LITTLE_ENDIAN)
100/**
101 * lpfc_sli4_pcimem_bcopy - SLI4 memory copy function
102 * @srcp: Source memory pointer.
103 * @destp: Destination memory pointer.
104 * @cnt: Number of words required to be copied.
105 * Must be a multiple of sizeof(uint64_t)
106 *
107 * This function is used for copying data between driver memory
108 * and the SLI WQ. This function also changes the endianness
109 * of each word if native endianness is different from SLI
110 * endianness. This function can be called with or without
111 * lock.
112 **/
d7b761b0 113static void
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114lpfc_sli4_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
115{
116 uint64_t *src = srcp;
117 uint64_t *dest = destp;
118 int i;
119
120 for (i = 0; i < (int)cnt; i += sizeof(uint64_t))
121 *dest++ = *src++;
122}
123#else
124#define lpfc_sli4_pcimem_bcopy(a, b, c) lpfc_sli_pcimem_bcopy(a, b, c)
125#endif
126
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127/**
128 * lpfc_sli4_wq_put - Put a Work Queue Entry on an Work Queue
129 * @q: The Work Queue to operate on.
130 * @wqe: The work Queue Entry to put on the Work queue.
131 *
132 * This routine will copy the contents of @wqe to the next available entry on
133 * the @q. This function will then ring the Work Queue Doorbell to signal the
134 * HBA to start processing the Work Queue Entry. This function returns 0 if
135 * successful. If no entries are available on @q then this function will return
136 * -ENOMEM.
137 * The caller is expected to hold the hbalock when calling this routine.
138 **/
cd22d605 139static int
205e8240 140lpfc_sli4_wq_put(struct lpfc_queue *q, union lpfc_wqe128 *wqe)
4f774513 141{
2e90f4b5 142 union lpfc_wqe *temp_wqe;
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143 struct lpfc_register doorbell;
144 uint32_t host_index;
027140ea 145 uint32_t idx;
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146 uint32_t i = 0;
147 uint8_t *tmp;
5cc167dd 148 u32 if_type;
4f774513 149
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150 /* sanity check on queue memory */
151 if (unlikely(!q))
152 return -ENOMEM;
9afbee3d 153 temp_wqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 154
4f774513 155 /* If the host has not yet processed the next entry then we are done */
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156 idx = ((q->host_index + 1) % q->entry_count);
157 if (idx == q->hba_index) {
b84daac9 158 q->WQ_overflow++;
cd22d605 159 return -EBUSY;
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160 }
161 q->WQ_posted++;
4f774513 162 /* set consumption flag every once in a while */
32517fc0 163 if (!((q->host_index + 1) % q->notify_interval))
f0d9bccc 164 bf_set(wqe_wqec, &wqe->generic.wqe_com, 1);
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165 else
166 bf_set(wqe_wqec, &wqe->generic.wqe_com, 0);
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167 if (q->phba->sli3_options & LPFC_SLI4_PHWQ_ENABLED)
168 bf_set(wqe_wqid, &wqe->generic.wqe_com, q->queue_id);
48f8fdb4 169 lpfc_sli4_pcimem_bcopy(wqe, temp_wqe, q->entry_size);
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170 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
171 /* write to DPP aperture taking advatage of Combined Writes */
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172 tmp = (uint8_t *)temp_wqe;
173#ifdef __raw_writeq
1351e69f 174 for (i = 0; i < q->entry_size; i += sizeof(uint64_t))
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175 __raw_writeq(*((uint64_t *)(tmp + i)),
176 q->dpp_regaddr + i);
177#else
178 for (i = 0; i < q->entry_size; i += sizeof(uint32_t))
179 __raw_writel(*((uint32_t *)(tmp + i)),
180 q->dpp_regaddr + i);
181#endif
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182 }
183 /* ensure WQE bcopy and DPP flushed before doorbell write */
6b3b3bdb 184 wmb();
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185
186 /* Update the host index before invoking device */
187 host_index = q->host_index;
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188
189 q->host_index = idx;
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190
191 /* Ring Doorbell */
192 doorbell.word0 = 0;
962bc51b 193 if (q->db_format == LPFC_DB_LIST_FORMAT) {
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194 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
195 bf_set(lpfc_if6_wq_db_list_fm_num_posted, &doorbell, 1);
196 bf_set(lpfc_if6_wq_db_list_fm_dpp, &doorbell, 1);
197 bf_set(lpfc_if6_wq_db_list_fm_dpp_id, &doorbell,
198 q->dpp_id);
199 bf_set(lpfc_if6_wq_db_list_fm_id, &doorbell,
200 q->queue_id);
201 } else {
202 bf_set(lpfc_wq_db_list_fm_num_posted, &doorbell, 1);
1351e69f 203 bf_set(lpfc_wq_db_list_fm_id, &doorbell, q->queue_id);
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204
205 /* Leave bits <23:16> clear for if_type 6 dpp */
206 if_type = bf_get(lpfc_sli_intf_if_type,
207 &q->phba->sli4_hba.sli_intf);
208 if (if_type != LPFC_SLI_INTF_IF_TYPE_6)
209 bf_set(lpfc_wq_db_list_fm_index, &doorbell,
210 host_index);
1351e69f 211 }
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212 } else if (q->db_format == LPFC_DB_RING_FORMAT) {
213 bf_set(lpfc_wq_db_ring_fm_num_posted, &doorbell, 1);
214 bf_set(lpfc_wq_db_ring_fm_id, &doorbell, q->queue_id);
215 } else {
216 return -EINVAL;
217 }
218 writel(doorbell.word0, q->db_regaddr);
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219
220 return 0;
221}
222
223/**
224 * lpfc_sli4_wq_release - Updates internal hba index for WQ
225 * @q: The Work Queue to operate on.
226 * @index: The index to advance the hba index to.
227 *
228 * This routine will update the HBA index of a queue to reflect consumption of
229 * Work Queue Entries by the HBA. When the HBA indicates that it has consumed
230 * an entry the host calls this function to update the queue's internal
1543af38 231 * pointers.
4f774513 232 **/
1543af38 233static void
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234lpfc_sli4_wq_release(struct lpfc_queue *q, uint32_t index)
235{
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236 /* sanity check on queue memory */
237 if (unlikely(!q))
1543af38 238 return;
2e90f4b5 239
1543af38 240 q->hba_index = index;
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241}
242
243/**
244 * lpfc_sli4_mq_put - Put a Mailbox Queue Entry on an Mailbox Queue
245 * @q: The Mailbox Queue to operate on.
246 * @wqe: The Mailbox Queue Entry to put on the Work queue.
247 *
248 * This routine will copy the contents of @mqe to the next available entry on
249 * the @q. This function will then ring the Work Queue Doorbell to signal the
250 * HBA to start processing the Work Queue Entry. This function returns 0 if
251 * successful. If no entries are available on @q then this function will return
252 * -ENOMEM.
253 * The caller is expected to hold the hbalock when calling this routine.
254 **/
255static uint32_t
256lpfc_sli4_mq_put(struct lpfc_queue *q, struct lpfc_mqe *mqe)
257{
2e90f4b5 258 struct lpfc_mqe *temp_mqe;
4f774513 259 struct lpfc_register doorbell;
4f774513 260
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261 /* sanity check on queue memory */
262 if (unlikely(!q))
263 return -ENOMEM;
9afbee3d 264 temp_mqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 265
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266 /* If the host has not yet processed the next entry then we are done */
267 if (((q->host_index + 1) % q->entry_count) == q->hba_index)
268 return -ENOMEM;
48f8fdb4 269 lpfc_sli4_pcimem_bcopy(mqe, temp_mqe, q->entry_size);
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270 /* Save off the mailbox pointer for completion */
271 q->phba->mbox = (MAILBOX_t *)temp_mqe;
272
273 /* Update the host index before invoking device */
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274 q->host_index = ((q->host_index + 1) % q->entry_count);
275
276 /* Ring Doorbell */
277 doorbell.word0 = 0;
278 bf_set(lpfc_mq_doorbell_num_posted, &doorbell, 1);
279 bf_set(lpfc_mq_doorbell_id, &doorbell, q->queue_id);
280 writel(doorbell.word0, q->phba->sli4_hba.MQDBregaddr);
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281 return 0;
282}
283
284/**
285 * lpfc_sli4_mq_release - Updates internal hba index for MQ
286 * @q: The Mailbox Queue to operate on.
287 *
288 * This routine will update the HBA index of a queue to reflect consumption of
289 * a Mailbox Queue Entry by the HBA. When the HBA indicates that it has consumed
290 * an entry the host calls this function to update the queue's internal
291 * pointers. This routine returns the number of entries that were consumed by
292 * the HBA.
293 **/
294static uint32_t
295lpfc_sli4_mq_release(struct lpfc_queue *q)
296{
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297 /* sanity check on queue memory */
298 if (unlikely(!q))
299 return 0;
300
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301 /* Clear the mailbox pointer for completion */
302 q->phba->mbox = NULL;
303 q->hba_index = ((q->hba_index + 1) % q->entry_count);
304 return 1;
305}
306
307/**
308 * lpfc_sli4_eq_get - Gets the next valid EQE from a EQ
309 * @q: The Event Queue to get the first valid EQE from
310 *
311 * This routine will get the first valid Event Queue Entry from @q, update
312 * the queue's internal hba index, and return the EQE. If no valid EQEs are in
313 * the Queue (no more work to do), or the Queue is full of EQEs that have been
314 * processed, but not popped back to the HBA then this routine will return NULL.
315 **/
316static struct lpfc_eqe *
317lpfc_sli4_eq_get(struct lpfc_queue *q)
318{
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319 struct lpfc_eqe *eqe;
320
321 /* sanity check on queue memory */
322 if (unlikely(!q))
323 return NULL;
9afbee3d 324 eqe = lpfc_sli4_qe(q, q->host_index);
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325
326 /* If the next EQE is not valid then we are done */
7365f6fd 327 if (bf_get_le32(lpfc_eqe_valid, eqe) != q->qe_valid)
4f774513 328 return NULL;
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329
330 /*
331 * insert barrier for instruction interlock : data from the hardware
332 * must have the valid bit checked before it can be copied and acted
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333 * upon. Speculative instructions were allowing a bcopy at the start
334 * of lpfc_sli4_fp_handle_wcqe(), which is called immediately
335 * after our return, to copy data before the valid bit check above
336 * was done. As such, some of the copied data was stale. The barrier
337 * ensures the check is before any data is copied.
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338 */
339 mb();
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340 return eqe;
341}
342
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343/**
344 * lpfc_sli4_eq_clr_intr - Turn off interrupts from this EQ
345 * @q: The Event Queue to disable interrupts
346 *
347 **/
92f3b327 348void
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349lpfc_sli4_eq_clr_intr(struct lpfc_queue *q)
350{
351 struct lpfc_register doorbell;
352
353 doorbell.word0 = 0;
354 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
355 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
356 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
357 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
358 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 359 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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360}
361
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362/**
363 * lpfc_sli4_if6_eq_clr_intr - Turn off interrupts from this EQ
364 * @q: The Event Queue to disable interrupts
365 *
366 **/
92f3b327 367void
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368lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q)
369{
370 struct lpfc_register doorbell;
371
372 doorbell.word0 = 0;
aad59d5d 373 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
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374 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
375}
376
4f774513 377/**
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378 * lpfc_sli4_write_eq_db - write EQ DB for eqe's consumed or arm state
379 * @phba: adapter with EQ
4f774513 380 * @q: The Event Queue that the host has completed processing for.
32517fc0 381 * @count: Number of elements that have been consumed
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382 * @arm: Indicates whether the host wants to arms this CQ.
383 *
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384 * This routine will notify the HBA, by ringing the doorbell, that count
385 * number of EQEs have been processed. The @arm parameter indicates whether
386 * the queue should be rearmed when ringing the doorbell.
4f774513 387 **/
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388void
389lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
390 uint32_t count, bool arm)
4f774513 391{
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392 struct lpfc_register doorbell;
393
2e90f4b5 394 /* sanity check on queue memory */
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395 if (unlikely(!q || (count == 0 && !arm)))
396 return;
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397
398 /* ring doorbell for number popped */
399 doorbell.word0 = 0;
400 if (arm) {
401 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
402 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
403 }
32517fc0 404 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, count);
4f774513 405 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
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406 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
407 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
408 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 409 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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410 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
411 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
9dd35425 412 readl(q->phba->sli4_hba.EQDBregaddr);
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413}
414
27d6ac0a 415/**
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416 * lpfc_sli4_if6_write_eq_db - write EQ DB for eqe's consumed or arm state
417 * @phba: adapter with EQ
27d6ac0a 418 * @q: The Event Queue that the host has completed processing for.
32517fc0 419 * @count: Number of elements that have been consumed
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420 * @arm: Indicates whether the host wants to arms this CQ.
421 *
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422 * This routine will notify the HBA, by ringing the doorbell, that count
423 * number of EQEs have been processed. The @arm parameter indicates whether
424 * the queue should be rearmed when ringing the doorbell.
27d6ac0a 425 **/
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426void
427lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
428 uint32_t count, bool arm)
27d6ac0a 429{
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430 struct lpfc_register doorbell;
431
432 /* sanity check on queue memory */
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433 if (unlikely(!q || (count == 0 && !arm)))
434 return;
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435
436 /* ring doorbell for number popped */
437 doorbell.word0 = 0;
438 if (arm)
439 bf_set(lpfc_if6_eq_doorbell_arm, &doorbell, 1);
32517fc0 440 bf_set(lpfc_if6_eq_doorbell_num_released, &doorbell, count);
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441 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
442 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
443 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
444 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
445 readl(q->phba->sli4_hba.EQDBregaddr);
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446}
447
448static void
449__lpfc_sli4_consume_eqe(struct lpfc_hba *phba, struct lpfc_queue *eq,
450 struct lpfc_eqe *eqe)
451{
452 if (!phba->sli4_hba.pc_sli4_params.eqav)
453 bf_set_le32(lpfc_eqe_valid, eqe, 0);
454
455 eq->host_index = ((eq->host_index + 1) % eq->entry_count);
456
457 /* if the index wrapped around, toggle the valid bit */
458 if (phba->sli4_hba.pc_sli4_params.eqav && !eq->host_index)
459 eq->qe_valid = (eq->qe_valid) ? 0 : 1;
460}
461
462static void
24c7c0a6 463lpfc_sli4_eqcq_flush(struct lpfc_hba *phba, struct lpfc_queue *eq)
32517fc0 464{
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465 struct lpfc_eqe *eqe = NULL;
466 u32 eq_count = 0, cq_count = 0;
467 struct lpfc_cqe *cqe = NULL;
468 struct lpfc_queue *cq = NULL, *childq = NULL;
469 int cqid = 0;
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470
471 /* walk all the EQ entries and drop on the floor */
472 eqe = lpfc_sli4_eq_get(eq);
473 while (eqe) {
24c7c0a6
JS
474 /* Get the reference to the corresponding CQ */
475 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
476 cq = NULL;
477
478 list_for_each_entry(childq, &eq->child_list, list) {
479 if (childq->queue_id == cqid) {
480 cq = childq;
481 break;
482 }
483 }
484 /* If CQ is valid, iterate through it and drop all the CQEs */
485 if (cq) {
486 cqe = lpfc_sli4_cq_get(cq);
487 while (cqe) {
488 __lpfc_sli4_consume_cqe(phba, cq, cqe);
489 cq_count++;
490 cqe = lpfc_sli4_cq_get(cq);
491 }
492 /* Clear and re-arm the CQ */
493 phba->sli4_hba.sli4_write_cq_db(phba, cq, cq_count,
494 LPFC_QUEUE_REARM);
495 cq_count = 0;
496 }
32517fc0 497 __lpfc_sli4_consume_eqe(phba, eq, eqe);
24c7c0a6 498 eq_count++;
32517fc0
JS
499 eqe = lpfc_sli4_eq_get(eq);
500 }
501
502 /* Clear and re-arm the EQ */
24c7c0a6 503 phba->sli4_hba.sli4_write_eq_db(phba, eq, eq_count, LPFC_QUEUE_REARM);
32517fc0
JS
504}
505
506static int
93a4d6f4
JS
507lpfc_sli4_process_eq(struct lpfc_hba *phba, struct lpfc_queue *eq,
508 uint8_t rearm)
32517fc0
JS
509{
510 struct lpfc_eqe *eqe;
511 int count = 0, consumed = 0;
512
513 if (cmpxchg(&eq->queue_claimed, 0, 1) != 0)
514 goto rearm_and_exit;
515
516 eqe = lpfc_sli4_eq_get(eq);
517 while (eqe) {
518 lpfc_sli4_hba_handle_eqe(phba, eq, eqe);
519 __lpfc_sli4_consume_eqe(phba, eq, eqe);
520
521 consumed++;
522 if (!(++count % eq->max_proc_limit))
523 break;
524
525 if (!(count % eq->notify_interval)) {
526 phba->sli4_hba.sli4_write_eq_db(phba, eq, consumed,
527 LPFC_QUEUE_NOARM);
528 consumed = 0;
529 }
530
531 eqe = lpfc_sli4_eq_get(eq);
532 }
533 eq->EQ_processed += count;
534
535 /* Track the max number of EQEs processed in 1 intr */
536 if (count > eq->EQ_max_eqe)
537 eq->EQ_max_eqe = count;
538
164ba8d2 539 xchg(&eq->queue_claimed, 0);
32517fc0
JS
540
541rearm_and_exit:
93a4d6f4
JS
542 /* Always clear the EQ. */
543 phba->sli4_hba.sli4_write_eq_db(phba, eq, consumed, rearm);
32517fc0
JS
544
545 return count;
27d6ac0a
JS
546}
547
4f774513
JS
548/**
549 * lpfc_sli4_cq_get - Gets the next valid CQE from a CQ
550 * @q: The Completion Queue to get the first valid CQE from
551 *
552 * This routine will get the first valid Completion Queue Entry from @q, update
553 * the queue's internal hba index, and return the CQE. If no valid CQEs are in
554 * the Queue (no more work to do), or the Queue is full of CQEs that have been
555 * processed, but not popped back to the HBA then this routine will return NULL.
556 **/
557static struct lpfc_cqe *
558lpfc_sli4_cq_get(struct lpfc_queue *q)
559{
560 struct lpfc_cqe *cqe;
561
2e90f4b5
JS
562 /* sanity check on queue memory */
563 if (unlikely(!q))
564 return NULL;
9afbee3d 565 cqe = lpfc_sli4_qe(q, q->host_index);
2e90f4b5 566
4f774513 567 /* If the next CQE is not valid then we are done */
7365f6fd 568 if (bf_get_le32(lpfc_cqe_valid, cqe) != q->qe_valid)
4f774513 569 return NULL;
27f344eb
JS
570
571 /*
572 * insert barrier for instruction interlock : data from the hardware
573 * must have the valid bit checked before it can be copied and acted
2ea259ee
JS
574 * upon. Given what was seen in lpfc_sli4_cq_get() of speculative
575 * instructions allowing action on content before valid bit checked,
576 * add barrier here as well. May not be needed as "content" is a
577 * single 32-bit entity here (vs multi word structure for cq's).
27f344eb
JS
578 */
579 mb();
4f774513
JS
580 return cqe;
581}
582
32517fc0
JS
583static void
584__lpfc_sli4_consume_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
585 struct lpfc_cqe *cqe)
586{
587 if (!phba->sli4_hba.pc_sli4_params.cqav)
588 bf_set_le32(lpfc_cqe_valid, cqe, 0);
589
590 cq->host_index = ((cq->host_index + 1) % cq->entry_count);
591
592 /* if the index wrapped around, toggle the valid bit */
593 if (phba->sli4_hba.pc_sli4_params.cqav && !cq->host_index)
594 cq->qe_valid = (cq->qe_valid) ? 0 : 1;
595}
596
4f774513 597/**
32517fc0
JS
598 * lpfc_sli4_write_cq_db - write cq DB for entries consumed or arm state.
599 * @phba: the adapter with the CQ
4f774513 600 * @q: The Completion Queue that the host has completed processing for.
32517fc0 601 * @count: the number of elements that were consumed
4f774513
JS
602 * @arm: Indicates whether the host wants to arms this CQ.
603 *
32517fc0
JS
604 * This routine will notify the HBA, by ringing the doorbell, that the
605 * CQEs have been processed. The @arm parameter specifies whether the
606 * queue should be rearmed when ringing the doorbell.
4f774513 607 **/
32517fc0
JS
608void
609lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
610 uint32_t count, bool arm)
4f774513 611{
4f774513
JS
612 struct lpfc_register doorbell;
613
2e90f4b5 614 /* sanity check on queue memory */
32517fc0
JS
615 if (unlikely(!q || (count == 0 && !arm)))
616 return;
4f774513
JS
617
618 /* ring doorbell for number popped */
619 doorbell.word0 = 0;
620 if (arm)
621 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
32517fc0 622 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, count);
4f774513 623 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_COMPLETION);
6b5151fd
JS
624 bf_set(lpfc_eqcq_doorbell_cqid_hi, &doorbell,
625 (q->queue_id >> LPFC_CQID_HI_FIELD_SHIFT));
626 bf_set(lpfc_eqcq_doorbell_cqid_lo, &doorbell, q->queue_id);
9dd35425 627 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
4f774513
JS
628}
629
27d6ac0a 630/**
32517fc0
JS
631 * lpfc_sli4_if6_write_cq_db - write cq DB for entries consumed or arm state.
632 * @phba: the adapter with the CQ
27d6ac0a 633 * @q: The Completion Queue that the host has completed processing for.
32517fc0 634 * @count: the number of elements that were consumed
27d6ac0a
JS
635 * @arm: Indicates whether the host wants to arms this CQ.
636 *
32517fc0
JS
637 * This routine will notify the HBA, by ringing the doorbell, that the
638 * CQEs have been processed. The @arm parameter specifies whether the
639 * queue should be rearmed when ringing the doorbell.
27d6ac0a 640 **/
32517fc0
JS
641void
642lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
643 uint32_t count, bool arm)
27d6ac0a 644{
27d6ac0a
JS
645 struct lpfc_register doorbell;
646
647 /* sanity check on queue memory */
32517fc0
JS
648 if (unlikely(!q || (count == 0 && !arm)))
649 return;
27d6ac0a
JS
650
651 /* ring doorbell for number popped */
652 doorbell.word0 = 0;
653 if (arm)
654 bf_set(lpfc_if6_cq_doorbell_arm, &doorbell, 1);
32517fc0 655 bf_set(lpfc_if6_cq_doorbell_num_released, &doorbell, count);
27d6ac0a
JS
656 bf_set(lpfc_if6_cq_doorbell_cqid, &doorbell, q->queue_id);
657 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
27d6ac0a
JS
658}
659
4f774513
JS
660/**
661 * lpfc_sli4_rq_put - Put a Receive Buffer Queue Entry on a Receive Queue
662 * @q: The Header Receive Queue to operate on.
663 * @wqe: The Receive Queue Entry to put on the Receive queue.
664 *
665 * This routine will copy the contents of @wqe to the next available entry on
666 * the @q. This function will then ring the Receive Queue Doorbell to signal the
667 * HBA to start processing the Receive Queue Entry. This function returns the
668 * index that the rqe was copied to if successful. If no entries are available
669 * on @q then this function will return -ENOMEM.
670 * The caller is expected to hold the hbalock when calling this routine.
671 **/
895427bd 672int
4f774513
JS
673lpfc_sli4_rq_put(struct lpfc_queue *hq, struct lpfc_queue *dq,
674 struct lpfc_rqe *hrqe, struct lpfc_rqe *drqe)
675{
2e90f4b5
JS
676 struct lpfc_rqe *temp_hrqe;
677 struct lpfc_rqe *temp_drqe;
4f774513 678 struct lpfc_register doorbell;
cbc5de1b
JS
679 int hq_put_index;
680 int dq_put_index;
4f774513 681
2e90f4b5
JS
682 /* sanity check on queue memory */
683 if (unlikely(!hq) || unlikely(!dq))
684 return -ENOMEM;
cbc5de1b
JS
685 hq_put_index = hq->host_index;
686 dq_put_index = dq->host_index;
9afbee3d
JS
687 temp_hrqe = lpfc_sli4_qe(hq, hq_put_index);
688 temp_drqe = lpfc_sli4_qe(dq, dq_put_index);
2e90f4b5 689
4f774513
JS
690 if (hq->type != LPFC_HRQ || dq->type != LPFC_DRQ)
691 return -EINVAL;
cbc5de1b 692 if (hq_put_index != dq_put_index)
4f774513
JS
693 return -EINVAL;
694 /* If the host has not yet processed the next entry then we are done */
cbc5de1b 695 if (((hq_put_index + 1) % hq->entry_count) == hq->hba_index)
4f774513 696 return -EBUSY;
48f8fdb4
JS
697 lpfc_sli4_pcimem_bcopy(hrqe, temp_hrqe, hq->entry_size);
698 lpfc_sli4_pcimem_bcopy(drqe, temp_drqe, dq->entry_size);
4f774513
JS
699
700 /* Update the host index to point to the next slot */
cbc5de1b
JS
701 hq->host_index = ((hq_put_index + 1) % hq->entry_count);
702 dq->host_index = ((dq_put_index + 1) % dq->entry_count);
61f3d4bf 703 hq->RQ_buf_posted++;
4f774513
JS
704
705 /* Ring The Header Receive Queue Doorbell */
32517fc0 706 if (!(hq->host_index % hq->notify_interval)) {
4f774513 707 doorbell.word0 = 0;
962bc51b
JS
708 if (hq->db_format == LPFC_DB_RING_FORMAT) {
709 bf_set(lpfc_rq_db_ring_fm_num_posted, &doorbell,
32517fc0 710 hq->notify_interval);
962bc51b
JS
711 bf_set(lpfc_rq_db_ring_fm_id, &doorbell, hq->queue_id);
712 } else if (hq->db_format == LPFC_DB_LIST_FORMAT) {
713 bf_set(lpfc_rq_db_list_fm_num_posted, &doorbell,
32517fc0 714 hq->notify_interval);
962bc51b
JS
715 bf_set(lpfc_rq_db_list_fm_index, &doorbell,
716 hq->host_index);
717 bf_set(lpfc_rq_db_list_fm_id, &doorbell, hq->queue_id);
718 } else {
719 return -EINVAL;
720 }
721 writel(doorbell.word0, hq->db_regaddr);
4f774513 722 }
cbc5de1b 723 return hq_put_index;
4f774513
JS
724}
725
726/**
727 * lpfc_sli4_rq_release - Updates internal hba index for RQ
728 * @q: The Header Receive Queue to operate on.
729 *
730 * This routine will update the HBA index of a queue to reflect consumption of
731 * one Receive Queue Entry by the HBA. When the HBA indicates that it has
732 * consumed an entry the host calls this function to update the queue's
733 * internal pointers. This routine returns the number of entries that were
734 * consumed by the HBA.
735 **/
736static uint32_t
737lpfc_sli4_rq_release(struct lpfc_queue *hq, struct lpfc_queue *dq)
738{
2e90f4b5
JS
739 /* sanity check on queue memory */
740 if (unlikely(!hq) || unlikely(!dq))
741 return 0;
742
4f774513
JS
743 if ((hq->type != LPFC_HRQ) || (dq->type != LPFC_DRQ))
744 return 0;
745 hq->hba_index = ((hq->hba_index + 1) % hq->entry_count);
746 dq->hba_index = ((dq->hba_index + 1) % dq->entry_count);
747 return 1;
748}
749
e59058c4 750/**
3621a710 751 * lpfc_cmd_iocb - Get next command iocb entry in the ring
e59058c4
JS
752 * @phba: Pointer to HBA context object.
753 * @pring: Pointer to driver SLI ring object.
754 *
755 * This function returns pointer to next command iocb entry
756 * in the command ring. The caller must hold hbalock to prevent
757 * other threads consume the next command iocb.
758 * SLI-2/SLI-3 provide different sized iocbs.
759 **/
ed957684
JS
760static inline IOCB_t *
761lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
762{
7e56aa25
JS
763 return (IOCB_t *) (((char *) pring->sli.sli3.cmdringaddr) +
764 pring->sli.sli3.cmdidx * phba->iocb_cmd_size);
ed957684
JS
765}
766
e59058c4 767/**
3621a710 768 * lpfc_resp_iocb - Get next response iocb entry in the ring
e59058c4
JS
769 * @phba: Pointer to HBA context object.
770 * @pring: Pointer to driver SLI ring object.
771 *
772 * This function returns pointer to next response iocb entry
773 * in the response ring. The caller must hold hbalock to make sure
774 * that no other thread consume the next response iocb.
775 * SLI-2/SLI-3 provide different sized iocbs.
776 **/
ed957684
JS
777static inline IOCB_t *
778lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
779{
7e56aa25
JS
780 return (IOCB_t *) (((char *) pring->sli.sli3.rspringaddr) +
781 pring->sli.sli3.rspidx * phba->iocb_rsp_size);
ed957684
JS
782}
783
e59058c4 784/**
3621a710 785 * __lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
786 * @phba: Pointer to HBA context object.
787 *
788 * This function is called with hbalock held. This function
789 * allocates a new driver iocb object from the iocb pool. If the
790 * allocation is successful, it returns pointer to the newly
791 * allocated iocb object else it returns NULL.
792 **/
4f2e66c6 793struct lpfc_iocbq *
2e0fef85 794__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC
795{
796 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
797 struct lpfc_iocbq * iocbq = NULL;
798
1c2ba475
JT
799 lockdep_assert_held(&phba->hbalock);
800
0bd4ca25 801 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
2a9bf3d0
JS
802 if (iocbq)
803 phba->iocb_cnt++;
804 if (phba->iocb_cnt > phba->iocb_max)
805 phba->iocb_max = phba->iocb_cnt;
0bd4ca25
JSEC
806 return iocbq;
807}
808
da0436e9
JS
809/**
810 * __lpfc_clear_active_sglq - Remove the active sglq for this XRI.
811 * @phba: Pointer to HBA context object.
812 * @xritag: XRI value.
813 *
814 * This function clears the sglq pointer from the array of acive
815 * sglq's. The xritag that is passed in is used to index into the
816 * array. Before the xritag can be used it needs to be adjusted
817 * by subtracting the xribase.
818 *
819 * Returns sglq ponter = success, NULL = Failure.
820 **/
895427bd 821struct lpfc_sglq *
da0436e9
JS
822__lpfc_clear_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
823{
da0436e9 824 struct lpfc_sglq *sglq;
6d368e53
JS
825
826 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
827 phba->sli4_hba.lpfc_sglq_active_list[xritag] = NULL;
da0436e9
JS
828 return sglq;
829}
830
831/**
832 * __lpfc_get_active_sglq - Get the active sglq for this XRI.
833 * @phba: Pointer to HBA context object.
834 * @xritag: XRI value.
835 *
836 * This function returns the sglq pointer from the array of acive
837 * sglq's. The xritag that is passed in is used to index into the
838 * array. Before the xritag can be used it needs to be adjusted
839 * by subtracting the xribase.
840 *
841 * Returns sglq ponter = success, NULL = Failure.
842 **/
0f65ff68 843struct lpfc_sglq *
da0436e9
JS
844__lpfc_get_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
845{
da0436e9 846 struct lpfc_sglq *sglq;
6d368e53
JS
847
848 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
da0436e9
JS
849 return sglq;
850}
851
19ca7609 852/**
1151e3ec 853 * lpfc_clr_rrq_active - Clears RRQ active bit in xri_bitmap.
19ca7609
JS
854 * @phba: Pointer to HBA context object.
855 * @xritag: xri used in this exchange.
856 * @rrq: The RRQ to be cleared.
857 *
19ca7609 858 **/
1151e3ec
JS
859void
860lpfc_clr_rrq_active(struct lpfc_hba *phba,
861 uint16_t xritag,
862 struct lpfc_node_rrq *rrq)
19ca7609 863{
1151e3ec 864 struct lpfc_nodelist *ndlp = NULL;
19ca7609 865
1151e3ec
JS
866 if ((rrq->vport) && NLP_CHK_NODE_ACT(rrq->ndlp))
867 ndlp = lpfc_findnode_did(rrq->vport, rrq->nlp_DID);
19ca7609
JS
868
869 /* The target DID could have been swapped (cable swap)
870 * we should use the ndlp from the findnode if it is
871 * available.
872 */
1151e3ec 873 if ((!ndlp) && rrq->ndlp)
19ca7609
JS
874 ndlp = rrq->ndlp;
875
1151e3ec
JS
876 if (!ndlp)
877 goto out;
878
cff261f6 879 if (test_and_clear_bit(xritag, ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
880 rrq->send_rrq = 0;
881 rrq->xritag = 0;
882 rrq->rrq_stop_time = 0;
883 }
1151e3ec 884out:
19ca7609
JS
885 mempool_free(rrq, phba->rrq_pool);
886}
887
888/**
889 * lpfc_handle_rrq_active - Checks if RRQ has waithed RATOV.
890 * @phba: Pointer to HBA context object.
891 *
892 * This function is called with hbalock held. This function
893 * Checks if stop_time (ratov from setting rrq active) has
894 * been reached, if it has and the send_rrq flag is set then
895 * it will call lpfc_send_rrq. If the send_rrq flag is not set
896 * then it will just call the routine to clear the rrq and
897 * free the rrq resource.
898 * The timer is set to the next rrq that is going to expire before
899 * leaving the routine.
900 *
901 **/
902void
903lpfc_handle_rrq_active(struct lpfc_hba *phba)
904{
905 struct lpfc_node_rrq *rrq;
906 struct lpfc_node_rrq *nextrrq;
907 unsigned long next_time;
908 unsigned long iflags;
1151e3ec 909 LIST_HEAD(send_rrq);
19ca7609
JS
910
911 spin_lock_irqsave(&phba->hbalock, iflags);
912 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
256ec0d0 913 next_time = jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
19ca7609 914 list_for_each_entry_safe(rrq, nextrrq,
1151e3ec
JS
915 &phba->active_rrq_list, list) {
916 if (time_after(jiffies, rrq->rrq_stop_time))
917 list_move(&rrq->list, &send_rrq);
918 else if (time_before(rrq->rrq_stop_time, next_time))
19ca7609
JS
919 next_time = rrq->rrq_stop_time;
920 }
921 spin_unlock_irqrestore(&phba->hbalock, iflags);
06918ac5
JS
922 if ((!list_empty(&phba->active_rrq_list)) &&
923 (!(phba->pport->load_flag & FC_UNLOADING)))
19ca7609 924 mod_timer(&phba->rrq_tmr, next_time);
1151e3ec
JS
925 list_for_each_entry_safe(rrq, nextrrq, &send_rrq, list) {
926 list_del(&rrq->list);
ffd43814 927 if (!rrq->send_rrq) {
1151e3ec 928 /* this call will free the rrq */
ffd43814
BVA
929 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
930 } else if (lpfc_send_rrq(phba, rrq)) {
1151e3ec
JS
931 /* if we send the rrq then the completion handler
932 * will clear the bit in the xribitmap.
933 */
934 lpfc_clr_rrq_active(phba, rrq->xritag,
935 rrq);
936 }
937 }
19ca7609
JS
938}
939
940/**
941 * lpfc_get_active_rrq - Get the active RRQ for this exchange.
942 * @vport: Pointer to vport context object.
943 * @xri: The xri used in the exchange.
944 * @did: The targets DID for this exchange.
945 *
946 * returns NULL = rrq not found in the phba->active_rrq_list.
947 * rrq = rrq for this xri and target.
948 **/
949struct lpfc_node_rrq *
950lpfc_get_active_rrq(struct lpfc_vport *vport, uint16_t xri, uint32_t did)
951{
952 struct lpfc_hba *phba = vport->phba;
953 struct lpfc_node_rrq *rrq;
954 struct lpfc_node_rrq *nextrrq;
955 unsigned long iflags;
956
957 if (phba->sli_rev != LPFC_SLI_REV4)
958 return NULL;
959 spin_lock_irqsave(&phba->hbalock, iflags);
960 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list) {
961 if (rrq->vport == vport && rrq->xritag == xri &&
962 rrq->nlp_DID == did){
963 list_del(&rrq->list);
964 spin_unlock_irqrestore(&phba->hbalock, iflags);
965 return rrq;
966 }
967 }
968 spin_unlock_irqrestore(&phba->hbalock, iflags);
969 return NULL;
970}
971
972/**
973 * lpfc_cleanup_vports_rrqs - Remove and clear the active RRQ for this vport.
974 * @vport: Pointer to vport context object.
1151e3ec
JS
975 * @ndlp: Pointer to the lpfc_node_list structure.
976 * If ndlp is NULL Remove all active RRQs for this vport from the
977 * phba->active_rrq_list and clear the rrq.
978 * If ndlp is not NULL then only remove rrqs for this vport & this ndlp.
19ca7609
JS
979 **/
980void
1151e3ec 981lpfc_cleanup_vports_rrqs(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
19ca7609
JS
982
983{
984 struct lpfc_hba *phba = vport->phba;
985 struct lpfc_node_rrq *rrq;
986 struct lpfc_node_rrq *nextrrq;
987 unsigned long iflags;
1151e3ec 988 LIST_HEAD(rrq_list);
19ca7609
JS
989
990 if (phba->sli_rev != LPFC_SLI_REV4)
991 return;
1151e3ec
JS
992 if (!ndlp) {
993 lpfc_sli4_vport_delete_els_xri_aborted(vport);
994 lpfc_sli4_vport_delete_fcp_xri_aborted(vport);
19ca7609 995 }
1151e3ec
JS
996 spin_lock_irqsave(&phba->hbalock, iflags);
997 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list)
998 if ((rrq->vport == vport) && (!ndlp || rrq->ndlp == ndlp))
999 list_move(&rrq->list, &rrq_list);
19ca7609 1000 spin_unlock_irqrestore(&phba->hbalock, iflags);
1151e3ec
JS
1001
1002 list_for_each_entry_safe(rrq, nextrrq, &rrq_list, list) {
1003 list_del(&rrq->list);
1004 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
1005 }
19ca7609
JS
1006}
1007
19ca7609 1008/**
1151e3ec 1009 * lpfc_test_rrq_active - Test RRQ bit in xri_bitmap.
19ca7609
JS
1010 * @phba: Pointer to HBA context object.
1011 * @ndlp: Targets nodelist pointer for this exchange.
1012 * @xritag the xri in the bitmap to test.
1013 *
e2a8be56
JS
1014 * This function returns:
1015 * 0 = rrq not active for this xri
1016 * 1 = rrq is valid for this xri.
19ca7609 1017 **/
1151e3ec
JS
1018int
1019lpfc_test_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
19ca7609
JS
1020 uint16_t xritag)
1021{
19ca7609
JS
1022 if (!ndlp)
1023 return 0;
cff261f6
JS
1024 if (!ndlp->active_rrqs_xri_bitmap)
1025 return 0;
1026 if (test_bit(xritag, ndlp->active_rrqs_xri_bitmap))
258f84fa 1027 return 1;
19ca7609
JS
1028 else
1029 return 0;
1030}
1031
1032/**
1033 * lpfc_set_rrq_active - set RRQ active bit in xri_bitmap.
1034 * @phba: Pointer to HBA context object.
1035 * @ndlp: nodelist pointer for this target.
1036 * @xritag: xri used in this exchange.
1037 * @rxid: Remote Exchange ID.
1038 * @send_rrq: Flag used to determine if we should send rrq els cmd.
1039 *
1040 * This function takes the hbalock.
1041 * The active bit is always set in the active rrq xri_bitmap even
1042 * if there is no slot avaiable for the other rrq information.
1043 *
1044 * returns 0 rrq actived for this xri
1045 * < 0 No memory or invalid ndlp.
1046 **/
1047int
1048lpfc_set_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
b42c07c8 1049 uint16_t xritag, uint16_t rxid, uint16_t send_rrq)
19ca7609 1050{
19ca7609 1051 unsigned long iflags;
b42c07c8
JS
1052 struct lpfc_node_rrq *rrq;
1053 int empty;
1054
1055 if (!ndlp)
1056 return -EINVAL;
1057
1058 if (!phba->cfg_enable_rrq)
1059 return -EINVAL;
19ca7609
JS
1060
1061 spin_lock_irqsave(&phba->hbalock, iflags);
b42c07c8
JS
1062 if (phba->pport->load_flag & FC_UNLOADING) {
1063 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
1064 goto out;
1065 }
1066
1067 /*
1068 * set the active bit even if there is no mem available.
1069 */
1070 if (NLP_CHK_FREE_REQ(ndlp))
1071 goto out;
1072
1073 if (ndlp->vport && (ndlp->vport->load_flag & FC_UNLOADING))
1074 goto out;
1075
cff261f6
JS
1076 if (!ndlp->active_rrqs_xri_bitmap)
1077 goto out;
1078
1079 if (test_and_set_bit(xritag, ndlp->active_rrqs_xri_bitmap))
b42c07c8
JS
1080 goto out;
1081
19ca7609 1082 spin_unlock_irqrestore(&phba->hbalock, iflags);
9dace1fa 1083 rrq = mempool_alloc(phba->rrq_pool, GFP_ATOMIC);
b42c07c8
JS
1084 if (!rrq) {
1085 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1086 "3155 Unable to allocate RRQ xri:0x%x rxid:0x%x"
1087 " DID:0x%x Send:%d\n",
1088 xritag, rxid, ndlp->nlp_DID, send_rrq);
1089 return -EINVAL;
1090 }
e5771b4d
JS
1091 if (phba->cfg_enable_rrq == 1)
1092 rrq->send_rrq = send_rrq;
1093 else
1094 rrq->send_rrq = 0;
b42c07c8 1095 rrq->xritag = xritag;
256ec0d0
JS
1096 rrq->rrq_stop_time = jiffies +
1097 msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
b42c07c8
JS
1098 rrq->ndlp = ndlp;
1099 rrq->nlp_DID = ndlp->nlp_DID;
1100 rrq->vport = ndlp->vport;
1101 rrq->rxid = rxid;
b42c07c8
JS
1102 spin_lock_irqsave(&phba->hbalock, iflags);
1103 empty = list_empty(&phba->active_rrq_list);
1104 list_add_tail(&rrq->list, &phba->active_rrq_list);
1105 phba->hba_flag |= HBA_RRQ_ACTIVE;
1106 if (empty)
1107 lpfc_worker_wake_up(phba);
1108 spin_unlock_irqrestore(&phba->hbalock, iflags);
1109 return 0;
1110out:
1111 spin_unlock_irqrestore(&phba->hbalock, iflags);
1112 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1113 "2921 Can't set rrq active xri:0x%x rxid:0x%x"
1114 " DID:0x%x Send:%d\n",
1115 xritag, rxid, ndlp->nlp_DID, send_rrq);
1116 return -EINVAL;
19ca7609
JS
1117}
1118
da0436e9 1119/**
895427bd 1120 * __lpfc_sli_get_els_sglq - Allocates an iocb object from sgl pool
da0436e9 1121 * @phba: Pointer to HBA context object.
19ca7609 1122 * @piocb: Pointer to the iocbq.
da0436e9 1123 *
e2a8be56
JS
1124 * The driver calls this function with either the nvme ls ring lock
1125 * or the fc els ring lock held depending on the iocb usage. This function
1126 * gets a new driver sglq object from the sglq list. If the list is not empty
1127 * then it is successful, it returns pointer to the newly allocated sglq
1128 * object else it returns NULL.
da0436e9
JS
1129 **/
1130static struct lpfc_sglq *
895427bd 1131__lpfc_sli_get_els_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
da0436e9 1132{
895427bd 1133 struct list_head *lpfc_els_sgl_list = &phba->sli4_hba.lpfc_els_sgl_list;
da0436e9 1134 struct lpfc_sglq *sglq = NULL;
19ca7609 1135 struct lpfc_sglq *start_sglq = NULL;
c490850a 1136 struct lpfc_io_buf *lpfc_cmd;
19ca7609 1137 struct lpfc_nodelist *ndlp;
e2a8be56 1138 struct lpfc_sli_ring *pring = NULL;
19ca7609
JS
1139 int found = 0;
1140
e2a8be56
JS
1141 if (piocbq->iocb_flag & LPFC_IO_NVME_LS)
1142 pring = phba->sli4_hba.nvmels_wq->pring;
1143 else
1144 pring = lpfc_phba_elsring(phba);
1145
1146 lockdep_assert_held(&pring->ring_lock);
1c2ba475 1147
19ca7609 1148 if (piocbq->iocb_flag & LPFC_IO_FCP) {
c490850a 1149 lpfc_cmd = (struct lpfc_io_buf *) piocbq->context1;
19ca7609 1150 ndlp = lpfc_cmd->rdata->pnode;
be858b65 1151 } else if ((piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) &&
6c7cf486 1152 !(piocbq->iocb_flag & LPFC_IO_LIBDFC)) {
19ca7609 1153 ndlp = piocbq->context_un.ndlp;
6c7cf486
JS
1154 } else if (piocbq->iocb_flag & LPFC_IO_LIBDFC) {
1155 if (piocbq->iocb_flag & LPFC_IO_LOOPBACK)
1156 ndlp = NULL;
1157 else
1158 ndlp = piocbq->context_un.ndlp;
1159 } else {
19ca7609 1160 ndlp = piocbq->context1;
6c7cf486 1161 }
19ca7609 1162
895427bd
JS
1163 spin_lock(&phba->sli4_hba.sgl_list_lock);
1164 list_remove_head(lpfc_els_sgl_list, sglq, struct lpfc_sglq, list);
19ca7609
JS
1165 start_sglq = sglq;
1166 while (!found) {
1167 if (!sglq)
d11f54b7 1168 break;
895427bd
JS
1169 if (ndlp && ndlp->active_rrqs_xri_bitmap &&
1170 test_bit(sglq->sli4_lxritag,
1171 ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
1172 /* This xri has an rrq outstanding for this DID.
1173 * put it back in the list and get another xri.
1174 */
895427bd 1175 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609 1176 sglq = NULL;
895427bd 1177 list_remove_head(lpfc_els_sgl_list, sglq,
19ca7609
JS
1178 struct lpfc_sglq, list);
1179 if (sglq == start_sglq) {
14041bd1 1180 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609
JS
1181 sglq = NULL;
1182 break;
1183 } else
1184 continue;
1185 }
1186 sglq->ndlp = ndlp;
1187 found = 1;
6d368e53 1188 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
19ca7609
JS
1189 sglq->state = SGL_ALLOCATED;
1190 }
895427bd 1191 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1192 return sglq;
1193}
1194
f358dd0c
JS
1195/**
1196 * __lpfc_sli_get_nvmet_sglq - Allocates an iocb object from sgl pool
1197 * @phba: Pointer to HBA context object.
1198 * @piocb: Pointer to the iocbq.
1199 *
1200 * This function is called with the sgl_list lock held. This function
1201 * gets a new driver sglq object from the sglq list. If the
1202 * list is not empty then it is successful, it returns pointer to the newly
1203 * allocated sglq object else it returns NULL.
1204 **/
1205struct lpfc_sglq *
1206__lpfc_sli_get_nvmet_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
1207{
1208 struct list_head *lpfc_nvmet_sgl_list;
1209 struct lpfc_sglq *sglq = NULL;
1210
1211 lpfc_nvmet_sgl_list = &phba->sli4_hba.lpfc_nvmet_sgl_list;
1212
1213 lockdep_assert_held(&phba->sli4_hba.sgl_list_lock);
1214
1215 list_remove_head(lpfc_nvmet_sgl_list, sglq, struct lpfc_sglq, list);
1216 if (!sglq)
1217 return NULL;
1218 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
1219 sglq->state = SGL_ALLOCATED;
da0436e9
JS
1220 return sglq;
1221}
1222
e59058c4 1223/**
3621a710 1224 * lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
1225 * @phba: Pointer to HBA context object.
1226 *
1227 * This function is called with no lock held. This function
1228 * allocates a new driver iocb object from the iocb pool. If the
1229 * allocation is successful, it returns pointer to the newly
1230 * allocated iocb object else it returns NULL.
1231 **/
2e0fef85
JS
1232struct lpfc_iocbq *
1233lpfc_sli_get_iocbq(struct lpfc_hba *phba)
1234{
1235 struct lpfc_iocbq * iocbq = NULL;
1236 unsigned long iflags;
1237
1238 spin_lock_irqsave(&phba->hbalock, iflags);
1239 iocbq = __lpfc_sli_get_iocbq(phba);
1240 spin_unlock_irqrestore(&phba->hbalock, iflags);
1241 return iocbq;
1242}
1243
4f774513
JS
1244/**
1245 * __lpfc_sli_release_iocbq_s4 - Release iocb to the iocb pool
1246 * @phba: Pointer to HBA context object.
1247 * @iocbq: Pointer to driver iocb object.
1248 *
88acb4d9
DK
1249 * This function is called to release the driver iocb object
1250 * to the iocb pool. The iotag in the iocb object
4f774513
JS
1251 * does not change for each use of the iocb object. This function
1252 * clears all other fields of the iocb object when it is freed.
1253 * The sqlq structure that holds the xritag and phys and virtual
1254 * mappings for the scatter gather list is retrieved from the
1255 * active array of sglq. The get of the sglq pointer also clears
1256 * the entry in the array. If the status of the IO indiactes that
1257 * this IO was aborted then the sglq entry it put on the
1258 * lpfc_abts_els_sgl_list until the CQ_ABORTED_XRI is received. If the
1259 * IO has good status or fails for any other reason then the sglq
88acb4d9
DK
1260 * entry is added to the free list (lpfc_els_sgl_list). The hbalock is
1261 * asserted held in the code path calling this routine.
4f774513
JS
1262 **/
1263static void
1264__lpfc_sli_release_iocbq_s4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1265{
1266 struct lpfc_sglq *sglq;
1267 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
2a9bf3d0 1268 unsigned long iflag = 0;
895427bd 1269 struct lpfc_sli_ring *pring;
4f774513
JS
1270
1271 if (iocbq->sli4_xritag == NO_XRI)
1272 sglq = NULL;
1273 else
6d368e53
JS
1274 sglq = __lpfc_clear_active_sglq(phba, iocbq->sli4_lxritag);
1275
0e9bb8d7 1276
4f774513 1277 if (sglq) {
f358dd0c
JS
1278 if (iocbq->iocb_flag & LPFC_IO_NVMET) {
1279 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1280 iflag);
1281 sglq->state = SGL_FREED;
1282 sglq->ndlp = NULL;
1283 list_add_tail(&sglq->list,
1284 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1285 spin_unlock_irqrestore(
1286 &phba->sli4_hba.sgl_list_lock, iflag);
1287 goto out;
1288 }
1289
895427bd 1290 pring = phba->sli4_hba.els_wq->pring;
0f65ff68
JS
1291 if ((iocbq->iocb_flag & LPFC_EXCHANGE_BUSY) &&
1292 (sglq->state != SGL_XRI_ABORTED)) {
895427bd
JS
1293 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1294 iflag);
4f774513 1295 list_add(&sglq->list,
895427bd 1296 &phba->sli4_hba.lpfc_abts_els_sgl_list);
4f774513 1297 spin_unlock_irqrestore(
895427bd 1298 &phba->sli4_hba.sgl_list_lock, iflag);
0f65ff68 1299 } else {
895427bd
JS
1300 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1301 iflag);
0f65ff68 1302 sglq->state = SGL_FREED;
19ca7609 1303 sglq->ndlp = NULL;
fedd3b7b 1304 list_add_tail(&sglq->list,
895427bd
JS
1305 &phba->sli4_hba.lpfc_els_sgl_list);
1306 spin_unlock_irqrestore(
1307 &phba->sli4_hba.sgl_list_lock, iflag);
2a9bf3d0
JS
1308
1309 /* Check if TXQ queue needs to be serviced */
0e9bb8d7 1310 if (!list_empty(&pring->txq))
2a9bf3d0 1311 lpfc_worker_wake_up(phba);
0f65ff68 1312 }
4f774513
JS
1313 }
1314
f358dd0c 1315out:
4f774513
JS
1316 /*
1317 * Clean all volatile data fields, preserve iotag and node struct.
1318 */
1319 memset((char *)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
6d368e53 1320 iocbq->sli4_lxritag = NO_XRI;
4f774513 1321 iocbq->sli4_xritag = NO_XRI;
f358dd0c
JS
1322 iocbq->iocb_flag &= ~(LPFC_IO_NVME | LPFC_IO_NVMET |
1323 LPFC_IO_NVME_LS);
4f774513
JS
1324 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1325}
1326
2a9bf3d0 1327
e59058c4 1328/**
3772a991 1329 * __lpfc_sli_release_iocbq_s3 - Release iocb to the iocb pool
e59058c4
JS
1330 * @phba: Pointer to HBA context object.
1331 * @iocbq: Pointer to driver iocb object.
1332 *
88acb4d9
DK
1333 * This function is called to release the driver iocb object to the
1334 * iocb pool. The iotag in the iocb object does not change for each
1335 * use of the iocb object. This function clears all other fields of
1336 * the iocb object when it is freed. The hbalock is asserted held in
1337 * the code path calling this routine.
e59058c4 1338 **/
a6ababd2 1339static void
3772a991 1340__lpfc_sli_release_iocbq_s3(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 1341{
2e0fef85 1342 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30
JB
1343
1344 /*
1345 * Clean all volatile data fields, preserve iotag and node struct.
1346 */
1347 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
3772a991 1348 iocbq->sli4_xritag = NO_XRI;
604a3e30
JB
1349 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1350}
1351
3772a991
JS
1352/**
1353 * __lpfc_sli_release_iocbq - Release iocb to the iocb pool
1354 * @phba: Pointer to HBA context object.
1355 * @iocbq: Pointer to driver iocb object.
1356 *
1357 * This function is called with hbalock held to release driver
1358 * iocb object to the iocb pool. The iotag in the iocb object
1359 * does not change for each use of the iocb object. This function
1360 * clears all other fields of the iocb object when it is freed.
1361 **/
1362static void
1363__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1364{
1c2ba475
JT
1365 lockdep_assert_held(&phba->hbalock);
1366
3772a991 1367 phba->__lpfc_sli_release_iocbq(phba, iocbq);
2a9bf3d0 1368 phba->iocb_cnt--;
3772a991
JS
1369}
1370
e59058c4 1371/**
3621a710 1372 * lpfc_sli_release_iocbq - Release iocb to the iocb pool
e59058c4
JS
1373 * @phba: Pointer to HBA context object.
1374 * @iocbq: Pointer to driver iocb object.
1375 *
1376 * This function is called with no lock held to release the iocb to
1377 * iocb pool.
1378 **/
2e0fef85
JS
1379void
1380lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1381{
1382 unsigned long iflags;
1383
1384 /*
1385 * Clean all volatile data fields, preserve iotag and node struct.
1386 */
1387 spin_lock_irqsave(&phba->hbalock, iflags);
1388 __lpfc_sli_release_iocbq(phba, iocbq);
1389 spin_unlock_irqrestore(&phba->hbalock, iflags);
1390}
1391
a257bf90
JS
1392/**
1393 * lpfc_sli_cancel_iocbs - Cancel all iocbs from a list.
1394 * @phba: Pointer to HBA context object.
1395 * @iocblist: List of IOCBs.
1396 * @ulpstatus: ULP status in IOCB command field.
1397 * @ulpWord4: ULP word-4 in IOCB command field.
1398 *
1399 * This function is called with a list of IOCBs to cancel. It cancels the IOCB
1400 * on the list by invoking the complete callback function associated with the
1401 * IOCB with the provided @ulpstatus and @ulpword4 set to the IOCB commond
1402 * fields.
1403 **/
1404void
1405lpfc_sli_cancel_iocbs(struct lpfc_hba *phba, struct list_head *iocblist,
1406 uint32_t ulpstatus, uint32_t ulpWord4)
1407{
1408 struct lpfc_iocbq *piocb;
1409
1410 while (!list_empty(iocblist)) {
1411 list_remove_head(iocblist, piocb, struct lpfc_iocbq, list);
84f2ddf8
JS
1412 if (!piocb->iocb_cmpl) {
1413 if (piocb->iocb_flag & LPFC_IO_NVME)
1414 lpfc_nvme_cancel_iocb(phba, piocb);
1415 else
1416 lpfc_sli_release_iocbq(phba, piocb);
1417 } else {
a257bf90
JS
1418 piocb->iocb.ulpStatus = ulpstatus;
1419 piocb->iocb.un.ulpWord[4] = ulpWord4;
1420 (piocb->iocb_cmpl) (phba, piocb, piocb);
1421 }
1422 }
1423 return;
1424}
1425
e59058c4 1426/**
3621a710
JS
1427 * lpfc_sli_iocb_cmd_type - Get the iocb type
1428 * @iocb_cmnd: iocb command code.
e59058c4
JS
1429 *
1430 * This function is called by ring event handler function to get the iocb type.
1431 * This function translates the iocb command to an iocb command type used to
1432 * decide the final disposition of each completed IOCB.
1433 * The function returns
1434 * LPFC_UNKNOWN_IOCB if it is an unsupported iocb
1435 * LPFC_SOL_IOCB if it is a solicited iocb completion
1436 * LPFC_ABORT_IOCB if it is an abort iocb
1437 * LPFC_UNSOL_IOCB if it is an unsolicited iocb
1438 *
1439 * The caller is not required to hold any lock.
1440 **/
dea3101e
JB
1441static lpfc_iocb_type
1442lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
1443{
1444 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
1445
1446 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
1447 return 0;
1448
1449 switch (iocb_cmnd) {
1450 case CMD_XMIT_SEQUENCE_CR:
1451 case CMD_XMIT_SEQUENCE_CX:
1452 case CMD_XMIT_BCAST_CN:
1453 case CMD_XMIT_BCAST_CX:
1454 case CMD_ELS_REQUEST_CR:
1455 case CMD_ELS_REQUEST_CX:
1456 case CMD_CREATE_XRI_CR:
1457 case CMD_CREATE_XRI_CX:
1458 case CMD_GET_RPI_CN:
1459 case CMD_XMIT_ELS_RSP_CX:
1460 case CMD_GET_RPI_CR:
1461 case CMD_FCP_IWRITE_CR:
1462 case CMD_FCP_IWRITE_CX:
1463 case CMD_FCP_IREAD_CR:
1464 case CMD_FCP_IREAD_CX:
1465 case CMD_FCP_ICMND_CR:
1466 case CMD_FCP_ICMND_CX:
f5603511
JS
1467 case CMD_FCP_TSEND_CX:
1468 case CMD_FCP_TRSP_CX:
1469 case CMD_FCP_TRECEIVE_CX:
1470 case CMD_FCP_AUTO_TRSP_CX:
dea3101e
JB
1471 case CMD_ADAPTER_MSG:
1472 case CMD_ADAPTER_DUMP:
1473 case CMD_XMIT_SEQUENCE64_CR:
1474 case CMD_XMIT_SEQUENCE64_CX:
1475 case CMD_XMIT_BCAST64_CN:
1476 case CMD_XMIT_BCAST64_CX:
1477 case CMD_ELS_REQUEST64_CR:
1478 case CMD_ELS_REQUEST64_CX:
1479 case CMD_FCP_IWRITE64_CR:
1480 case CMD_FCP_IWRITE64_CX:
1481 case CMD_FCP_IREAD64_CR:
1482 case CMD_FCP_IREAD64_CX:
1483 case CMD_FCP_ICMND64_CR:
1484 case CMD_FCP_ICMND64_CX:
f5603511
JS
1485 case CMD_FCP_TSEND64_CX:
1486 case CMD_FCP_TRSP64_CX:
1487 case CMD_FCP_TRECEIVE64_CX:
dea3101e
JB
1488 case CMD_GEN_REQUEST64_CR:
1489 case CMD_GEN_REQUEST64_CX:
1490 case CMD_XMIT_ELS_RSP64_CX:
da0436e9
JS
1491 case DSSCMD_IWRITE64_CR:
1492 case DSSCMD_IWRITE64_CX:
1493 case DSSCMD_IREAD64_CR:
1494 case DSSCMD_IREAD64_CX:
c93764a6 1495 case CMD_SEND_FRAME:
dea3101e
JB
1496 type = LPFC_SOL_IOCB;
1497 break;
1498 case CMD_ABORT_XRI_CN:
1499 case CMD_ABORT_XRI_CX:
1500 case CMD_CLOSE_XRI_CN:
1501 case CMD_CLOSE_XRI_CX:
1502 case CMD_XRI_ABORTED_CX:
1503 case CMD_ABORT_MXRI64_CN:
6669f9bb 1504 case CMD_XMIT_BLS_RSP64_CX:
dea3101e
JB
1505 type = LPFC_ABORT_IOCB;
1506 break;
1507 case CMD_RCV_SEQUENCE_CX:
1508 case CMD_RCV_ELS_REQ_CX:
1509 case CMD_RCV_SEQUENCE64_CX:
1510 case CMD_RCV_ELS_REQ64_CX:
57127f15 1511 case CMD_ASYNC_STATUS:
ed957684
JS
1512 case CMD_IOCB_RCV_SEQ64_CX:
1513 case CMD_IOCB_RCV_ELS64_CX:
1514 case CMD_IOCB_RCV_CONT64_CX:
3163f725 1515 case CMD_IOCB_RET_XRI64_CX:
dea3101e
JB
1516 type = LPFC_UNSOL_IOCB;
1517 break;
3163f725
JS
1518 case CMD_IOCB_XMIT_MSEQ64_CR:
1519 case CMD_IOCB_XMIT_MSEQ64_CX:
1520 case CMD_IOCB_RCV_SEQ_LIST64_CX:
1521 case CMD_IOCB_RCV_ELS_LIST64_CX:
1522 case CMD_IOCB_CLOSE_EXTENDED_CN:
1523 case CMD_IOCB_ABORT_EXTENDED_CN:
1524 case CMD_IOCB_RET_HBQE64_CN:
1525 case CMD_IOCB_FCP_IBIDIR64_CR:
1526 case CMD_IOCB_FCP_IBIDIR64_CX:
1527 case CMD_IOCB_FCP_ITASKMGT64_CX:
1528 case CMD_IOCB_LOGENTRY_CN:
1529 case CMD_IOCB_LOGENTRY_ASYNC_CN:
1530 printk("%s - Unhandled SLI-3 Command x%x\n",
cadbd4a5 1531 __func__, iocb_cmnd);
3163f725
JS
1532 type = LPFC_UNKNOWN_IOCB;
1533 break;
dea3101e
JB
1534 default:
1535 type = LPFC_UNKNOWN_IOCB;
1536 break;
1537 }
1538
1539 return type;
1540}
1541
e59058c4 1542/**
3621a710 1543 * lpfc_sli_ring_map - Issue config_ring mbox for all rings
e59058c4
JS
1544 * @phba: Pointer to HBA context object.
1545 *
1546 * This function is called from SLI initialization code
1547 * to configure every ring of the HBA's SLI interface. The
1548 * caller is not required to hold any lock. This function issues
1549 * a config_ring mailbox command for each ring.
1550 * This function returns zero if successful else returns a negative
1551 * error code.
1552 **/
dea3101e 1553static int
ed957684 1554lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e
JB
1555{
1556 struct lpfc_sli *psli = &phba->sli;
ed957684
JS
1557 LPFC_MBOXQ_t *pmb;
1558 MAILBOX_t *pmbox;
1559 int i, rc, ret = 0;
dea3101e 1560
ed957684
JS
1561 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1562 if (!pmb)
1563 return -ENOMEM;
04c68496 1564 pmbox = &pmb->u.mb;
ed957684 1565 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 1566 for (i = 0; i < psli->num_rings; i++) {
dea3101e
JB
1567 lpfc_config_ring(phba, i, pmb);
1568 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1569 if (rc != MBX_SUCCESS) {
92d7f7b0 1570 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1571 "0446 Adapter failed to init (%d), "
dea3101e
JB
1572 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
1573 "ring %d\n",
e8b62011
JS
1574 rc, pmbox->mbxCommand,
1575 pmbox->mbxStatus, i);
2e0fef85 1576 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS
1577 ret = -ENXIO;
1578 break;
dea3101e
JB
1579 }
1580 }
ed957684
JS
1581 mempool_free(pmb, phba->mbox_mem_pool);
1582 return ret;
dea3101e
JB
1583}
1584
e59058c4 1585/**
3621a710 1586 * lpfc_sli_ringtxcmpl_put - Adds new iocb to the txcmplq
e59058c4
JS
1587 * @phba: Pointer to HBA context object.
1588 * @pring: Pointer to driver SLI ring object.
1589 * @piocb: Pointer to the driver iocb object.
1590 *
e2a8be56
JS
1591 * The driver calls this function with the hbalock held for SLI3 ports or
1592 * the ring lock held for SLI4 ports. The function adds the
e59058c4
JS
1593 * new iocb to txcmplq of the given ring. This function always returns
1594 * 0. If this function is called for ELS ring, this function checks if
1595 * there is a vport associated with the ELS command. This function also
1596 * starts els_tmofunc timer if this is an ELS command.
1597 **/
dea3101e 1598static int
2e0fef85
JS
1599lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1600 struct lpfc_iocbq *piocb)
dea3101e 1601{
e2a8be56
JS
1602 if (phba->sli_rev == LPFC_SLI_REV4)
1603 lockdep_assert_held(&pring->ring_lock);
1604 else
1605 lockdep_assert_held(&phba->hbalock);
1c2ba475 1606
2319f847 1607 BUG_ON(!piocb);
22466da5 1608
dea3101e 1609 list_add_tail(&piocb->list, &pring->txcmplq);
4f2e66c6 1610 piocb->iocb_flag |= LPFC_IO_ON_TXCMPLQ;
c490850a 1611 pring->txcmplq_cnt++;
2a9bf3d0 1612
92d7f7b0
JS
1613 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
1614 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2319f847
MFO
1615 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
1616 BUG_ON(!piocb->vport);
1617 if (!(piocb->vport->load_flag & FC_UNLOADING))
1618 mod_timer(&piocb->vport->els_tmofunc,
1619 jiffies +
1620 msecs_to_jiffies(1000 * (phba->fc_ratov << 1)));
1621 }
dea3101e 1622
2e0fef85 1623 return 0;
dea3101e
JB
1624}
1625
e59058c4 1626/**
3621a710 1627 * lpfc_sli_ringtx_get - Get first element of the txq
e59058c4
JS
1628 * @phba: Pointer to HBA context object.
1629 * @pring: Pointer to driver SLI ring object.
1630 *
1631 * This function is called with hbalock held to get next
1632 * iocb in txq of the given ring. If there is any iocb in
1633 * the txq, the function returns first iocb in the list after
1634 * removing the iocb from the list, else it returns NULL.
1635 **/
2a9bf3d0 1636struct lpfc_iocbq *
2e0fef85 1637lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 1638{
dea3101e
JB
1639 struct lpfc_iocbq *cmd_iocb;
1640
1c2ba475
JT
1641 lockdep_assert_held(&phba->hbalock);
1642
858c9f6c 1643 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
2e0fef85 1644 return cmd_iocb;
dea3101e
JB
1645}
1646
e59058c4 1647/**
3621a710 1648 * lpfc_sli_next_iocb_slot - Get next iocb slot in the ring
e59058c4
JS
1649 * @phba: Pointer to HBA context object.
1650 * @pring: Pointer to driver SLI ring object.
1651 *
1652 * This function is called with hbalock held and the caller must post the
1653 * iocb without releasing the lock. If the caller releases the lock,
1654 * iocb slot returned by the function is not guaranteed to be available.
1655 * The function returns pointer to the next available iocb slot if there
1656 * is available slot in the ring, else it returns NULL.
1657 * If the get index of the ring is ahead of the put index, the function
1658 * will post an error attention event to the worker thread to take the
1659 * HBA to offline state.
1660 **/
dea3101e
JB
1661static IOCB_t *
1662lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1663{
34b02dcd 1664 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
7e56aa25 1665 uint32_t max_cmd_idx = pring->sli.sli3.numCiocb;
1c2ba475
JT
1666
1667 lockdep_assert_held(&phba->hbalock);
1668
7e56aa25
JS
1669 if ((pring->sli.sli3.next_cmdidx == pring->sli.sli3.cmdidx) &&
1670 (++pring->sli.sli3.next_cmdidx >= max_cmd_idx))
1671 pring->sli.sli3.next_cmdidx = 0;
dea3101e 1672
7e56aa25
JS
1673 if (unlikely(pring->sli.sli3.local_getidx ==
1674 pring->sli.sli3.next_cmdidx)) {
dea3101e 1675
7e56aa25 1676 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e 1677
7e56aa25 1678 if (unlikely(pring->sli.sli3.local_getidx >= max_cmd_idx)) {
dea3101e 1679 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1680 "0315 Ring %d issue: portCmdGet %d "
025dfdaf 1681 "is bigger than cmd ring %d\n",
e8b62011 1682 pring->ringno,
7e56aa25
JS
1683 pring->sli.sli3.local_getidx,
1684 max_cmd_idx);
dea3101e 1685
2e0fef85 1686 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
1687 /*
1688 * All error attention handlers are posted to
1689 * worker thread
1690 */
1691 phba->work_ha |= HA_ERATT;
1692 phba->work_hs = HS_FFER3;
92d7f7b0 1693
5e9d9b82 1694 lpfc_worker_wake_up(phba);
dea3101e
JB
1695
1696 return NULL;
1697 }
1698
7e56aa25 1699 if (pring->sli.sli3.local_getidx == pring->sli.sli3.next_cmdidx)
dea3101e
JB
1700 return NULL;
1701 }
1702
ed957684 1703 return lpfc_cmd_iocb(phba, pring);
dea3101e
JB
1704}
1705
e59058c4 1706/**
3621a710 1707 * lpfc_sli_next_iotag - Get an iotag for the iocb
e59058c4
JS
1708 * @phba: Pointer to HBA context object.
1709 * @iocbq: Pointer to driver iocb object.
1710 *
1711 * This function gets an iotag for the iocb. If there is no unused iotag and
1712 * the iocbq_lookup_len < 0xffff, this function allocates a bigger iotag_lookup
1713 * array and assigns a new iotag.
1714 * The function returns the allocated iotag if successful, else returns zero.
1715 * Zero is not a valid iotag.
1716 * The caller is not required to hold any lock.
1717 **/
604a3e30 1718uint16_t
2e0fef85 1719lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 1720{
2e0fef85
JS
1721 struct lpfc_iocbq **new_arr;
1722 struct lpfc_iocbq **old_arr;
604a3e30
JB
1723 size_t new_len;
1724 struct lpfc_sli *psli = &phba->sli;
1725 uint16_t iotag;
dea3101e 1726
2e0fef85 1727 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1728 iotag = psli->last_iotag;
1729 if(++iotag < psli->iocbq_lookup_len) {
1730 psli->last_iotag = iotag;
1731 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1732 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1733 iocbq->iotag = iotag;
1734 return iotag;
2e0fef85 1735 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB
1736 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
1737 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85 1738 spin_unlock_irq(&phba->hbalock);
6396bb22 1739 new_arr = kcalloc(new_len, sizeof(struct lpfc_iocbq *),
604a3e30
JB
1740 GFP_KERNEL);
1741 if (new_arr) {
2e0fef85 1742 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1743 old_arr = psli->iocbq_lookup;
1744 if (new_len <= psli->iocbq_lookup_len) {
1745 /* highly unprobable case */
1746 kfree(new_arr);
1747 iotag = psli->last_iotag;
1748 if(++iotag < psli->iocbq_lookup_len) {
1749 psli->last_iotag = iotag;
1750 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1751 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1752 iocbq->iotag = iotag;
1753 return iotag;
1754 }
2e0fef85 1755 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1756 return 0;
1757 }
1758 if (psli->iocbq_lookup)
1759 memcpy(new_arr, old_arr,
1760 ((psli->last_iotag + 1) *
311464ec 1761 sizeof (struct lpfc_iocbq *)));
604a3e30
JB
1762 psli->iocbq_lookup = new_arr;
1763 psli->iocbq_lookup_len = new_len;
1764 psli->last_iotag = iotag;
1765 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1766 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1767 iocbq->iotag = iotag;
1768 kfree(old_arr);
1769 return iotag;
1770 }
8f6d98d2 1771 } else
2e0fef85 1772 spin_unlock_irq(&phba->hbalock);
dea3101e 1773
bc73905a 1774 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
1775 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
1776 psli->last_iotag);
dea3101e 1777
604a3e30 1778 return 0;
dea3101e
JB
1779}
1780
e59058c4 1781/**
3621a710 1782 * lpfc_sli_submit_iocb - Submit an iocb to the firmware
e59058c4
JS
1783 * @phba: Pointer to HBA context object.
1784 * @pring: Pointer to driver SLI ring object.
1785 * @iocb: Pointer to iocb slot in the ring.
1786 * @nextiocb: Pointer to driver iocb object which need to be
1787 * posted to firmware.
1788 *
88acb4d9
DK
1789 * This function is called to post a new iocb to the firmware. This
1790 * function copies the new iocb to ring iocb slot and updates the
1791 * ring pointers. It adds the new iocb to txcmplq if there is
e59058c4 1792 * a completion call back for this iocb else the function will free the
88acb4d9
DK
1793 * iocb object. The hbalock is asserted held in the code path calling
1794 * this routine.
e59058c4 1795 **/
dea3101e
JB
1796static void
1797lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1798 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
1799{
1800 /*
604a3e30 1801 * Set up an iotag
dea3101e 1802 */
604a3e30 1803 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 1804
e2a0a9d6 1805
a58cbd52
JS
1806 if (pring->ringno == LPFC_ELS_RING) {
1807 lpfc_debugfs_slow_ring_trc(phba,
1808 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1809 *(((uint32_t *) &nextiocb->iocb) + 4),
1810 *(((uint32_t *) &nextiocb->iocb) + 6),
1811 *(((uint32_t *) &nextiocb->iocb) + 7));
1812 }
1813
dea3101e
JB
1814 /*
1815 * Issue iocb command to adapter
1816 */
92d7f7b0 1817 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e
JB
1818 wmb();
1819 pring->stats.iocb_cmd++;
1820
1821 /*
1822 * If there is no completion routine to call, we can release the
1823 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
1824 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
1825 */
1826 if (nextiocb->iocb_cmpl)
1827 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 1828 else
2e0fef85 1829 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e
JB
1830
1831 /*
1832 * Let the HBA know what IOCB slot will be the next one the
1833 * driver will put a command into.
1834 */
7e56aa25
JS
1835 pring->sli.sli3.cmdidx = pring->sli.sli3.next_cmdidx;
1836 writel(pring->sli.sli3.cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e
JB
1837}
1838
e59058c4 1839/**
3621a710 1840 * lpfc_sli_update_full_ring - Update the chip attention register
e59058c4
JS
1841 * @phba: Pointer to HBA context object.
1842 * @pring: Pointer to driver SLI ring object.
1843 *
1844 * The caller is not required to hold any lock for calling this function.
1845 * This function updates the chip attention bits for the ring to inform firmware
1846 * that there are pending work to be done for this ring and requests an
1847 * interrupt when there is space available in the ring. This function is
1848 * called when the driver is unable to post more iocbs to the ring due
1849 * to unavailability of space in the ring.
1850 **/
dea3101e 1851static void
2e0fef85 1852lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1853{
1854 int ringno = pring->ringno;
1855
1856 pring->flag |= LPFC_CALL_RING_AVAILABLE;
1857
1858 wmb();
1859
1860 /*
1861 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
1862 * The HBA will tell us when an IOCB entry is available.
1863 */
1864 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
1865 readl(phba->CAregaddr); /* flush */
1866
1867 pring->stats.iocb_cmd_full++;
1868}
1869
e59058c4 1870/**
3621a710 1871 * lpfc_sli_update_ring - Update chip attention register
e59058c4
JS
1872 * @phba: Pointer to HBA context object.
1873 * @pring: Pointer to driver SLI ring object.
1874 *
1875 * This function updates the chip attention register bit for the
1876 * given ring to inform HBA that there is more work to be done
1877 * in this ring. The caller is not required to hold any lock.
1878 **/
dea3101e 1879static void
2e0fef85 1880lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1881{
1882 int ringno = pring->ringno;
1883
1884 /*
1885 * Tell the HBA that there is work to do in this ring.
1886 */
34b02dcd
JS
1887 if (!(phba->sli3_options & LPFC_SLI3_CRP_ENABLED)) {
1888 wmb();
1889 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
1890 readl(phba->CAregaddr); /* flush */
1891 }
dea3101e
JB
1892}
1893
e59058c4 1894/**
3621a710 1895 * lpfc_sli_resume_iocb - Process iocbs in the txq
e59058c4
JS
1896 * @phba: Pointer to HBA context object.
1897 * @pring: Pointer to driver SLI ring object.
1898 *
1899 * This function is called with hbalock held to post pending iocbs
1900 * in the txq to the firmware. This function is called when driver
1901 * detects space available in the ring.
1902 **/
dea3101e 1903static void
2e0fef85 1904lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e
JB
1905{
1906 IOCB_t *iocb;
1907 struct lpfc_iocbq *nextiocb;
1908
1c2ba475
JT
1909 lockdep_assert_held(&phba->hbalock);
1910
dea3101e
JB
1911 /*
1912 * Check to see if:
1913 * (a) there is anything on the txq to send
1914 * (b) link is up
1915 * (c) link attention events can be processed (fcp ring only)
1916 * (d) IOCB processing is not blocked by the outstanding mbox command.
1917 */
0e9bb8d7
JS
1918
1919 if (lpfc_is_link_up(phba) &&
1920 (!list_empty(&pring->txq)) &&
895427bd 1921 (pring->ringno != LPFC_FCP_RING ||
0b727fea 1922 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e
JB
1923
1924 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
1925 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
1926 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
1927
1928 if (iocb)
1929 lpfc_sli_update_ring(phba, pring);
1930 else
1931 lpfc_sli_update_full_ring(phba, pring);
1932 }
1933
1934 return;
1935}
1936
e59058c4 1937/**
3621a710 1938 * lpfc_sli_next_hbq_slot - Get next hbq entry for the HBQ
e59058c4
JS
1939 * @phba: Pointer to HBA context object.
1940 * @hbqno: HBQ number.
1941 *
1942 * This function is called with hbalock held to get the next
1943 * available slot for the given HBQ. If there is free slot
1944 * available for the HBQ it will return pointer to the next available
1945 * HBQ entry else it will return NULL.
1946 **/
a6ababd2 1947static struct lpfc_hbq_entry *
ed957684
JS
1948lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
1949{
1950 struct hbq_s *hbqp = &phba->hbqs[hbqno];
1951
1c2ba475
JT
1952 lockdep_assert_held(&phba->hbalock);
1953
ed957684
JS
1954 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
1955 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
1956 hbqp->next_hbqPutIdx = 0;
1957
1958 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 1959 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS
1960 uint32_t getidx = le32_to_cpu(raw_index);
1961
1962 hbqp->local_hbqGetIdx = getidx;
1963
1964 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
1965 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 1966 LOG_SLI | LOG_VPORT,
e8b62011 1967 "1802 HBQ %d: local_hbqGetIdx "
ed957684 1968 "%u is > than hbqp->entry_count %u\n",
e8b62011 1969 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS
1970 hbqp->entry_count);
1971
1972 phba->link_state = LPFC_HBA_ERROR;
1973 return NULL;
1974 }
1975
1976 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
1977 return NULL;
1978 }
1979
51ef4c26
JS
1980 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
1981 hbqp->hbqPutIdx;
ed957684
JS
1982}
1983
e59058c4 1984/**
3621a710 1985 * lpfc_sli_hbqbuf_free_all - Free all the hbq buffers
e59058c4
JS
1986 * @phba: Pointer to HBA context object.
1987 *
1988 * This function is called with no lock held to free all the
1989 * hbq buffers while uninitializing the SLI interface. It also
1990 * frees the HBQ buffers returned by the firmware but not yet
1991 * processed by the upper layers.
1992 **/
ed957684
JS
1993void
1994lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
1995{
92d7f7b0
JS
1996 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
1997 struct hbq_dmabuf *hbq_buf;
3163f725 1998 unsigned long flags;
51ef4c26 1999 int i, hbq_count;
ed957684 2000
51ef4c26 2001 hbq_count = lpfc_sli_hbq_count();
ed957684 2002 /* Return all memory used by all HBQs */
3163f725 2003 spin_lock_irqsave(&phba->hbalock, flags);
51ef4c26
JS
2004 for (i = 0; i < hbq_count; ++i) {
2005 list_for_each_entry_safe(dmabuf, next_dmabuf,
2006 &phba->hbqs[i].hbq_buffer_list, list) {
2007 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
2008 list_del(&hbq_buf->dbuf.list);
2009 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
2010 }
a8adb832 2011 phba->hbqs[i].buffer_count = 0;
ed957684 2012 }
3163f725
JS
2013
2014 /* Mark the HBQs not in use */
2015 phba->hbq_in_use = 0;
2016 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684
JS
2017}
2018
e59058c4 2019/**
3621a710 2020 * lpfc_sli_hbq_to_firmware - Post the hbq buffer to firmware
e59058c4
JS
2021 * @phba: Pointer to HBA context object.
2022 * @hbqno: HBQ number.
2023 * @hbq_buf: Pointer to HBQ buffer.
2024 *
2025 * This function is called with the hbalock held to post a
2026 * hbq buffer to the firmware. If the function finds an empty
2027 * slot in the HBQ, it will post the buffer. The function will return
2028 * pointer to the hbq entry if it successfully post the buffer
2029 * else it will return NULL.
2030 **/
3772a991 2031static int
ed957684 2032lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 2033 struct hbq_dmabuf *hbq_buf)
3772a991 2034{
1c2ba475 2035 lockdep_assert_held(&phba->hbalock);
3772a991
JS
2036 return phba->lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buf);
2037}
2038
2039/**
2040 * lpfc_sli_hbq_to_firmware_s3 - Post the hbq buffer to SLI3 firmware
2041 * @phba: Pointer to HBA context object.
2042 * @hbqno: HBQ number.
2043 * @hbq_buf: Pointer to HBQ buffer.
2044 *
2045 * This function is called with the hbalock held to post a hbq buffer to the
2046 * firmware. If the function finds an empty slot in the HBQ, it will post the
2047 * buffer and place it on the hbq_buffer_list. The function will return zero if
2048 * it successfully post the buffer else it will return an error.
2049 **/
2050static int
2051lpfc_sli_hbq_to_firmware_s3(struct lpfc_hba *phba, uint32_t hbqno,
2052 struct hbq_dmabuf *hbq_buf)
ed957684
JS
2053{
2054 struct lpfc_hbq_entry *hbqe;
92d7f7b0 2055 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684 2056
1c2ba475 2057 lockdep_assert_held(&phba->hbalock);
ed957684
JS
2058 /* Get next HBQ entry slot to use */
2059 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
2060 if (hbqe) {
2061 struct hbq_s *hbqp = &phba->hbqs[hbqno];
2062
92d7f7b0
JS
2063 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
2064 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
895427bd 2065 hbqe->bde.tus.f.bdeSize = hbq_buf->total_size;
ed957684 2066 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS
2067 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
2068 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
2069 /* Sync SLIM */
ed957684
JS
2070 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
2071 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 2072 /* flush */
ed957684 2073 readl(phba->hbq_put + hbqno);
51ef4c26 2074 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
3772a991
JS
2075 return 0;
2076 } else
2077 return -ENOMEM;
ed957684
JS
2078}
2079
4f774513
JS
2080/**
2081 * lpfc_sli_hbq_to_firmware_s4 - Post the hbq buffer to SLI4 firmware
2082 * @phba: Pointer to HBA context object.
2083 * @hbqno: HBQ number.
2084 * @hbq_buf: Pointer to HBQ buffer.
2085 *
2086 * This function is called with the hbalock held to post an RQE to the SLI4
2087 * firmware. If able to post the RQE to the RQ it will queue the hbq entry to
2088 * the hbq_buffer_list and return zero, otherwise it will return an error.
2089 **/
2090static int
2091lpfc_sli_hbq_to_firmware_s4(struct lpfc_hba *phba, uint32_t hbqno,
2092 struct hbq_dmabuf *hbq_buf)
2093{
2094 int rc;
2095 struct lpfc_rqe hrqe;
2096 struct lpfc_rqe drqe;
895427bd
JS
2097 struct lpfc_queue *hrq;
2098 struct lpfc_queue *drq;
2099
2100 if (hbqno != LPFC_ELS_HBQ)
2101 return 1;
2102 hrq = phba->sli4_hba.hdr_rq;
2103 drq = phba->sli4_hba.dat_rq;
4f774513 2104
1c2ba475 2105 lockdep_assert_held(&phba->hbalock);
4f774513
JS
2106 hrqe.address_lo = putPaddrLow(hbq_buf->hbuf.phys);
2107 hrqe.address_hi = putPaddrHigh(hbq_buf->hbuf.phys);
2108 drqe.address_lo = putPaddrLow(hbq_buf->dbuf.phys);
2109 drqe.address_hi = putPaddrHigh(hbq_buf->dbuf.phys);
895427bd 2110 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
4f774513
JS
2111 if (rc < 0)
2112 return rc;
895427bd 2113 hbq_buf->tag = (rc | (hbqno << 16));
4f774513
JS
2114 list_add_tail(&hbq_buf->dbuf.list, &phba->hbqs[hbqno].hbq_buffer_list);
2115 return 0;
2116}
2117
e59058c4 2118/* HBQ for ELS and CT traffic. */
92d7f7b0
JS
2119static struct lpfc_hbq_init lpfc_els_hbq = {
2120 .rn = 1,
def9c7a9 2121 .entry_count = 256,
92d7f7b0
JS
2122 .mask_count = 0,
2123 .profile = 0,
51ef4c26 2124 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0 2125 .buffer_count = 0,
a257bf90
JS
2126 .init_count = 40,
2127 .add_count = 40,
92d7f7b0 2128};
ed957684 2129
e59058c4 2130/* Array of HBQs */
78b2d852 2131struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0
JS
2132 &lpfc_els_hbq,
2133};
ed957684 2134
e59058c4 2135/**
3621a710 2136 * lpfc_sli_hbqbuf_fill_hbqs - Post more hbq buffers to HBQ
e59058c4
JS
2137 * @phba: Pointer to HBA context object.
2138 * @hbqno: HBQ number.
2139 * @count: Number of HBQ buffers to be posted.
2140 *
d7c255b2
JS
2141 * This function is called with no lock held to post more hbq buffers to the
2142 * given HBQ. The function returns the number of HBQ buffers successfully
2143 * posted.
e59058c4 2144 **/
311464ec 2145static int
92d7f7b0 2146lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 2147{
d7c255b2 2148 uint32_t i, posted = 0;
3163f725 2149 unsigned long flags;
92d7f7b0 2150 struct hbq_dmabuf *hbq_buffer;
d7c255b2 2151 LIST_HEAD(hbq_buf_list);
eafe1df9 2152 if (!phba->hbqs[hbqno].hbq_alloc_buffer)
51ef4c26 2153 return 0;
51ef4c26 2154
d7c255b2
JS
2155 if ((phba->hbqs[hbqno].buffer_count + count) >
2156 lpfc_hbq_defs[hbqno]->entry_count)
2157 count = lpfc_hbq_defs[hbqno]->entry_count -
2158 phba->hbqs[hbqno].buffer_count;
2159 if (!count)
2160 return 0;
2161 /* Allocate HBQ entries */
2162 for (i = 0; i < count; i++) {
2163 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
2164 if (!hbq_buffer)
2165 break;
2166 list_add_tail(&hbq_buffer->dbuf.list, &hbq_buf_list);
2167 }
3163f725
JS
2168 /* Check whether HBQ is still in use */
2169 spin_lock_irqsave(&phba->hbalock, flags);
eafe1df9 2170 if (!phba->hbq_in_use)
d7c255b2
JS
2171 goto err;
2172 while (!list_empty(&hbq_buf_list)) {
2173 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2174 dbuf.list);
2175 hbq_buffer->tag = (phba->hbqs[hbqno].buffer_count |
2176 (hbqno << 16));
3772a991 2177 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
a8adb832 2178 phba->hbqs[hbqno].buffer_count++;
d7c255b2
JS
2179 posted++;
2180 } else
51ef4c26 2181 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684 2182 }
3163f725 2183 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2184 return posted;
2185err:
eafe1df9 2186 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2187 while (!list_empty(&hbq_buf_list)) {
2188 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2189 dbuf.list);
2190 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
2191 }
2192 return 0;
ed957684
JS
2193}
2194
e59058c4 2195/**
3621a710 2196 * lpfc_sli_hbqbuf_add_hbqs - Post more HBQ buffers to firmware
e59058c4
JS
2197 * @phba: Pointer to HBA context object.
2198 * @qno: HBQ number.
2199 *
2200 * This function posts more buffers to the HBQ. This function
d7c255b2
JS
2201 * is called with no lock held. The function returns the number of HBQ entries
2202 * successfully allocated.
e59058c4 2203 **/
92d7f7b0
JS
2204int
2205lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 2206{
def9c7a9
JS
2207 if (phba->sli_rev == LPFC_SLI_REV4)
2208 return 0;
2209 else
2210 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2211 lpfc_hbq_defs[qno]->add_count);
92d7f7b0 2212}
ed957684 2213
e59058c4 2214/**
3621a710 2215 * lpfc_sli_hbqbuf_init_hbqs - Post initial buffers to the HBQ
e59058c4
JS
2216 * @phba: Pointer to HBA context object.
2217 * @qno: HBQ queue number.
2218 *
2219 * This function is called from SLI initialization code path with
2220 * no lock held to post initial HBQ buffers to firmware. The
d7c255b2 2221 * function returns the number of HBQ entries successfully allocated.
e59058c4 2222 **/
a6ababd2 2223static int
92d7f7b0
JS
2224lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
2225{
def9c7a9
JS
2226 if (phba->sli_rev == LPFC_SLI_REV4)
2227 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
73d91e50 2228 lpfc_hbq_defs[qno]->entry_count);
def9c7a9
JS
2229 else
2230 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2231 lpfc_hbq_defs[qno]->init_count);
ed957684
JS
2232}
2233
3772a991
JS
2234/**
2235 * lpfc_sli_hbqbuf_get - Remove the first hbq off of an hbq list
2236 * @phba: Pointer to HBA context object.
2237 * @hbqno: HBQ number.
2238 *
2239 * This function removes the first hbq buffer on an hbq list and returns a
2240 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2241 **/
2242static struct hbq_dmabuf *
2243lpfc_sli_hbqbuf_get(struct list_head *rb_list)
2244{
2245 struct lpfc_dmabuf *d_buf;
2246
2247 list_remove_head(rb_list, d_buf, struct lpfc_dmabuf, list);
2248 if (!d_buf)
2249 return NULL;
2250 return container_of(d_buf, struct hbq_dmabuf, dbuf);
2251}
2252
2d7dbc4c
JS
2253/**
2254 * lpfc_sli_rqbuf_get - Remove the first dma buffer off of an RQ list
2255 * @phba: Pointer to HBA context object.
2256 * @hbqno: HBQ number.
2257 *
2258 * This function removes the first RQ buffer on an RQ buffer list and returns a
2259 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2260 **/
2261static struct rqb_dmabuf *
2262lpfc_sli_rqbuf_get(struct lpfc_hba *phba, struct lpfc_queue *hrq)
2263{
2264 struct lpfc_dmabuf *h_buf;
2265 struct lpfc_rqb *rqbp;
2266
2267 rqbp = hrq->rqbp;
2268 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
2269 struct lpfc_dmabuf, list);
2270 if (!h_buf)
2271 return NULL;
2272 rqbp->buffer_count--;
2273 return container_of(h_buf, struct rqb_dmabuf, hbuf);
2274}
2275
e59058c4 2276/**
3621a710 2277 * lpfc_sli_hbqbuf_find - Find the hbq buffer associated with a tag
e59058c4
JS
2278 * @phba: Pointer to HBA context object.
2279 * @tag: Tag of the hbq buffer.
2280 *
71892418
SH
2281 * This function searches for the hbq buffer associated with the given tag in
2282 * the hbq buffer list. If it finds the hbq buffer, it returns the hbq_buffer
2283 * otherwise it returns NULL.
e59058c4 2284 **/
a6ababd2 2285static struct hbq_dmabuf *
92d7f7b0 2286lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 2287{
92d7f7b0
JS
2288 struct lpfc_dmabuf *d_buf;
2289 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS
2290 uint32_t hbqno;
2291
2292 hbqno = tag >> 16;
a0a74e45 2293 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 2294 return NULL;
ed957684 2295
3772a991 2296 spin_lock_irq(&phba->hbalock);
51ef4c26 2297 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 2298 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 2299 if (hbq_buf->tag == tag) {
3772a991 2300 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2301 return hbq_buf;
ed957684
JS
2302 }
2303 }
3772a991 2304 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2305 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 2306 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 2307 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 2308 return NULL;
ed957684
JS
2309}
2310
e59058c4 2311/**
3621a710 2312 * lpfc_sli_free_hbq - Give back the hbq buffer to firmware
e59058c4
JS
2313 * @phba: Pointer to HBA context object.
2314 * @hbq_buffer: Pointer to HBQ buffer.
2315 *
2316 * This function is called with hbalock. This function gives back
2317 * the hbq buffer to firmware. If the HBQ does not have space to
2318 * post the buffer, it will free the buffer.
2319 **/
ed957684 2320void
51ef4c26 2321lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS
2322{
2323 uint32_t hbqno;
2324
51ef4c26
JS
2325 if (hbq_buffer) {
2326 hbqno = hbq_buffer->tag >> 16;
3772a991 2327 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
51ef4c26 2328 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS
2329 }
2330}
2331
e59058c4 2332/**
3621a710 2333 * lpfc_sli_chk_mbx_command - Check if the mailbox is a legitimate mailbox
e59058c4
JS
2334 * @mbxCommand: mailbox command code.
2335 *
2336 * This function is called by the mailbox event handler function to verify
2337 * that the completed mailbox command is a legitimate mailbox command. If the
2338 * completed mailbox is not known to the function, it will return MBX_SHUTDOWN
2339 * and the mailbox event handler will take the HBA offline.
2340 **/
dea3101e
JB
2341static int
2342lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
2343{
2344 uint8_t ret;
2345
2346 switch (mbxCommand) {
2347 case MBX_LOAD_SM:
2348 case MBX_READ_NV:
2349 case MBX_WRITE_NV:
a8adb832 2350 case MBX_WRITE_VPARMS:
dea3101e
JB
2351 case MBX_RUN_BIU_DIAG:
2352 case MBX_INIT_LINK:
2353 case MBX_DOWN_LINK:
2354 case MBX_CONFIG_LINK:
2355 case MBX_CONFIG_RING:
2356 case MBX_RESET_RING:
2357 case MBX_READ_CONFIG:
2358 case MBX_READ_RCONFIG:
2359 case MBX_READ_SPARM:
2360 case MBX_READ_STATUS:
2361 case MBX_READ_RPI:
2362 case MBX_READ_XRI:
2363 case MBX_READ_REV:
2364 case MBX_READ_LNK_STAT:
2365 case MBX_REG_LOGIN:
2366 case MBX_UNREG_LOGIN:
dea3101e
JB
2367 case MBX_CLEAR_LA:
2368 case MBX_DUMP_MEMORY:
2369 case MBX_DUMP_CONTEXT:
2370 case MBX_RUN_DIAGS:
2371 case MBX_RESTART:
2372 case MBX_UPDATE_CFG:
2373 case MBX_DOWN_LOAD:
2374 case MBX_DEL_LD_ENTRY:
2375 case MBX_RUN_PROGRAM:
2376 case MBX_SET_MASK:
09372820 2377 case MBX_SET_VARIABLE:
dea3101e 2378 case MBX_UNREG_D_ID:
41415862 2379 case MBX_KILL_BOARD:
dea3101e 2380 case MBX_CONFIG_FARP:
41415862 2381 case MBX_BEACON:
dea3101e
JB
2382 case MBX_LOAD_AREA:
2383 case MBX_RUN_BIU_DIAG64:
2384 case MBX_CONFIG_PORT:
2385 case MBX_READ_SPARM64:
2386 case MBX_READ_RPI64:
2387 case MBX_REG_LOGIN64:
76a95d75 2388 case MBX_READ_TOPOLOGY:
09372820 2389 case MBX_WRITE_WWN:
dea3101e
JB
2390 case MBX_SET_DEBUG:
2391 case MBX_LOAD_EXP_ROM:
57127f15 2392 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS
2393 case MBX_REG_VPI:
2394 case MBX_UNREG_VPI:
858c9f6c 2395 case MBX_HEARTBEAT:
84774a4d
JS
2396 case MBX_PORT_CAPABILITIES:
2397 case MBX_PORT_IOV_CONTROL:
04c68496
JS
2398 case MBX_SLI4_CONFIG:
2399 case MBX_SLI4_REQ_FTRS:
2400 case MBX_REG_FCFI:
2401 case MBX_UNREG_FCFI:
2402 case MBX_REG_VFI:
2403 case MBX_UNREG_VFI:
2404 case MBX_INIT_VPI:
2405 case MBX_INIT_VFI:
2406 case MBX_RESUME_RPI:
c7495937
JS
2407 case MBX_READ_EVENT_LOG_STATUS:
2408 case MBX_READ_EVENT_LOG:
dcf2a4e0
JS
2409 case MBX_SECURITY_MGMT:
2410 case MBX_AUTH_PORT:
940eb687 2411 case MBX_ACCESS_VDATA:
dea3101e
JB
2412 ret = mbxCommand;
2413 break;
2414 default:
2415 ret = MBX_SHUTDOWN;
2416 break;
2417 }
2e0fef85 2418 return ret;
dea3101e 2419}
e59058c4
JS
2420
2421/**
3621a710 2422 * lpfc_sli_wake_mbox_wait - lpfc_sli_issue_mbox_wait mbox completion handler
e59058c4
JS
2423 * @phba: Pointer to HBA context object.
2424 * @pmboxq: Pointer to mailbox command.
2425 *
2426 * This is completion handler function for mailbox commands issued from
2427 * lpfc_sli_issue_mbox_wait function. This function is called by the
2428 * mailbox event handler function with no lock held. This function
2429 * will wake up thread waiting on the wait queue pointed by context1
2430 * of the mailbox.
2431 **/
04c68496 2432void
2e0fef85 2433lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e 2434{
858c9f6c 2435 unsigned long drvr_flag;
e29d74f8 2436 struct completion *pmbox_done;
dea3101e
JB
2437
2438 /*
e29d74f8 2439 * If pmbox_done is empty, the driver thread gave up waiting and
dea3101e
JB
2440 * continued running.
2441 */
7054a606 2442 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 2443 spin_lock_irqsave(&phba->hbalock, drvr_flag);
e29d74f8
JS
2444 pmbox_done = (struct completion *)pmboxq->context3;
2445 if (pmbox_done)
2446 complete(pmbox_done);
858c9f6c 2447 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
2448 return;
2449}
2450
b95b2119
JS
2451static void
2452__lpfc_sli_rpi_release(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
2453{
2454 unsigned long iflags;
2455
2456 if (ndlp->nlp_flag & NLP_RELEASE_RPI) {
2457 lpfc_sli4_free_rpi(vport->phba, ndlp->nlp_rpi);
2458 spin_lock_irqsave(&vport->phba->ndlp_lock, iflags);
2459 ndlp->nlp_flag &= ~NLP_RELEASE_RPI;
2460 ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR;
2461 spin_unlock_irqrestore(&vport->phba->ndlp_lock, iflags);
2462 }
2463 ndlp->nlp_flag &= ~NLP_UNREG_INP;
2464}
e59058c4
JS
2465
2466/**
3621a710 2467 * lpfc_sli_def_mbox_cmpl - Default mailbox completion handler
e59058c4
JS
2468 * @phba: Pointer to HBA context object.
2469 * @pmb: Pointer to mailbox object.
2470 *
2471 * This function is the default mailbox completion handler. It
2472 * frees the memory resources associated with the completed mailbox
2473 * command. If the completed command is a REG_LOGIN mailbox command,
2474 * this function will issue a UREG_LOGIN to re-claim the RPI.
2475 **/
dea3101e 2476void
2e0fef85 2477lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e 2478{
d439d286 2479 struct lpfc_vport *vport = pmb->vport;
dea3101e 2480 struct lpfc_dmabuf *mp;
d439d286 2481 struct lpfc_nodelist *ndlp;
5af5eee7 2482 struct Scsi_Host *shost;
04c68496 2483 uint16_t rpi, vpi;
7054a606
JS
2484 int rc;
2485
3e1f0718 2486 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
7054a606 2487
dea3101e
JB
2488 if (mp) {
2489 lpfc_mbuf_free(phba, mp->virt, mp->phys);
2490 kfree(mp);
2491 }
7054a606
JS
2492
2493 /*
2494 * If a REG_LOGIN succeeded after node is destroyed or node
2495 * is in re-discovery driver need to cleanup the RPI.
2496 */
2e0fef85 2497 if (!(phba->pport->load_flag & FC_UNLOADING) &&
04c68496
JS
2498 pmb->u.mb.mbxCommand == MBX_REG_LOGIN64 &&
2499 !pmb->u.mb.mbxStatus) {
2500 rpi = pmb->u.mb.un.varWords[0];
6d368e53 2501 vpi = pmb->u.mb.un.varRegLogin.vpi;
38503943
JS
2502 if (phba->sli_rev == LPFC_SLI_REV4)
2503 vpi -= phba->sli4_hba.max_cfg_param.vpi_base;
04c68496 2504 lpfc_unreg_login(phba, vpi, rpi, pmb);
de96e9c5 2505 pmb->vport = vport;
92d7f7b0 2506 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS
2507 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2508 if (rc != MBX_NOT_FINISHED)
2509 return;
2510 }
2511
695a814e
JS
2512 if ((pmb->u.mb.mbxCommand == MBX_REG_VPI) &&
2513 !(phba->pport->load_flag & FC_UNLOADING) &&
2514 !pmb->u.mb.mbxStatus) {
5af5eee7
JS
2515 shost = lpfc_shost_from_vport(vport);
2516 spin_lock_irq(shost->host_lock);
2517 vport->vpi_state |= LPFC_VPI_REGISTERED;
2518 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI;
2519 spin_unlock_irq(shost->host_lock);
695a814e
JS
2520 }
2521
d439d286 2522 if (pmb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 2523 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
d439d286 2524 lpfc_nlp_put(ndlp);
dea16bda
JS
2525 pmb->ctx_buf = NULL;
2526 pmb->ctx_ndlp = NULL;
2527 }
2528
2529 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2530 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
2531
2532 /* Check to see if there are any deferred events to process */
2533 if (ndlp) {
2534 lpfc_printf_vlog(
2535 vport,
2536 KERN_INFO, LOG_MBOX | LOG_DISCOVERY,
2537 "1438 UNREG cmpl deferred mbox x%x "
32350664 2538 "on NPort x%x Data: x%x x%x %px\n",
dea16bda
JS
2539 ndlp->nlp_rpi, ndlp->nlp_DID,
2540 ndlp->nlp_flag, ndlp->nlp_defer_did, ndlp);
2541
2542 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2543 (ndlp->nlp_defer_did != NLP_EVT_NOTHING_PENDING)) {
00292e03 2544 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2545 ndlp->nlp_defer_did = NLP_EVT_NOTHING_PENDING;
2546 lpfc_issue_els_plogi(vport, ndlp->nlp_DID, 0);
00292e03 2547 } else {
b95b2119 2548 __lpfc_sli_rpi_release(vport, ndlp);
dea16bda 2549 }
97acd001
JS
2550 if (vport->load_flag & FC_UNLOADING)
2551 lpfc_nlp_put(ndlp);
9b164068 2552 pmb->ctx_ndlp = NULL;
dea16bda 2553 }
d439d286
JS
2554 }
2555
dcf2a4e0
JS
2556 /* Check security permission status on INIT_LINK mailbox command */
2557 if ((pmb->u.mb.mbxCommand == MBX_INIT_LINK) &&
2558 (pmb->u.mb.mbxStatus == MBXERR_SEC_NO_PERMISSION))
2559 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
2560 "2860 SLI authentication is required "
2561 "for INIT_LINK but has not done yet\n");
2562
04c68496
JS
2563 if (bf_get(lpfc_mqe_command, &pmb->u.mqe) == MBX_SLI4_CONFIG)
2564 lpfc_sli4_mbox_cmd_free(phba, pmb);
2565 else
2566 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2567}
be6bb941
JS
2568 /**
2569 * lpfc_sli4_unreg_rpi_cmpl_clr - mailbox completion handler
2570 * @phba: Pointer to HBA context object.
2571 * @pmb: Pointer to mailbox object.
2572 *
2573 * This function is the unreg rpi mailbox completion handler. It
2574 * frees the memory resources associated with the completed mailbox
2575 * command. An additional refrenece is put on the ndlp to prevent
2576 * lpfc_nlp_release from freeing the rpi bit in the bitmask before
2577 * the unreg mailbox command completes, this routine puts the
2578 * reference back.
2579 *
2580 **/
2581void
2582lpfc_sli4_unreg_rpi_cmpl_clr(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2583{
2584 struct lpfc_vport *vport = pmb->vport;
2585 struct lpfc_nodelist *ndlp;
2586
3e1f0718 2587 ndlp = pmb->ctx_ndlp;
be6bb941
JS
2588 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2589 if (phba->sli_rev == LPFC_SLI_REV4 &&
2590 (bf_get(lpfc_sli_intf_if_type,
27d6ac0a 2591 &phba->sli4_hba.sli_intf) >=
be6bb941
JS
2592 LPFC_SLI_INTF_IF_TYPE_2)) {
2593 if (ndlp) {
dea16bda
JS
2594 lpfc_printf_vlog(
2595 vport, KERN_INFO, LOG_MBOX | LOG_SLI,
2596 "0010 UNREG_LOGIN vpi:%x "
2597 "rpi:%x DID:%x defer x%x flg x%x "
32350664 2598 "map:%x %px\n",
dea16bda
JS
2599 vport->vpi, ndlp->nlp_rpi,
2600 ndlp->nlp_DID, ndlp->nlp_defer_did,
2601 ndlp->nlp_flag,
2602 ndlp->nlp_usg_map, ndlp);
7c5e518c 2603 ndlp->nlp_flag &= ~NLP_LOGO_ACC;
be6bb941 2604 lpfc_nlp_put(ndlp);
dea16bda
JS
2605
2606 /* Check to see if there are any deferred
2607 * events to process
2608 */
2609 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2610 (ndlp->nlp_defer_did !=
2611 NLP_EVT_NOTHING_PENDING)) {
2612 lpfc_printf_vlog(
2613 vport, KERN_INFO, LOG_DISCOVERY,
2614 "4111 UNREG cmpl deferred "
2615 "clr x%x on "
32350664 2616 "NPort x%x Data: x%x x%px\n",
dea16bda
JS
2617 ndlp->nlp_rpi, ndlp->nlp_DID,
2618 ndlp->nlp_defer_did, ndlp);
00292e03 2619 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2620 ndlp->nlp_defer_did =
2621 NLP_EVT_NOTHING_PENDING;
2622 lpfc_issue_els_plogi(
2623 vport, ndlp->nlp_DID, 0);
00292e03 2624 } else {
b95b2119 2625 __lpfc_sli_rpi_release(vport, ndlp);
dea16bda 2626 }
be6bb941
JS
2627 }
2628 }
2629 }
2630
2631 mempool_free(pmb, phba->mbox_mem_pool);
2632}
dea3101e 2633
e59058c4 2634/**
3621a710 2635 * lpfc_sli_handle_mb_event - Handle mailbox completions from firmware
e59058c4
JS
2636 * @phba: Pointer to HBA context object.
2637 *
2638 * This function is called with no lock held. This function processes all
2639 * the completed mailbox commands and gives it to upper layers. The interrupt
2640 * service routine processes mailbox completion interrupt and adds completed
2641 * mailbox commands to the mboxq_cmpl queue and signals the worker thread.
2642 * Worker thread call lpfc_sli_handle_mb_event, which will return the
2643 * completed mailbox commands in mboxq_cmpl queue to the upper layers. This
2644 * function returns the mailbox commands to the upper layer by calling the
2645 * completion handler function of each mailbox.
2646 **/
dea3101e 2647int
2e0fef85 2648lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 2649{
92d7f7b0 2650 MAILBOX_t *pmbox;
dea3101e 2651 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS
2652 int rc;
2653 LIST_HEAD(cmplq);
dea3101e
JB
2654
2655 phba->sli.slistat.mbox_event++;
2656
92d7f7b0
JS
2657 /* Get all completed mailboxe buffers into the cmplq */
2658 spin_lock_irq(&phba->hbalock);
2659 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
2660 spin_unlock_irq(&phba->hbalock);
dea3101e 2661
92d7f7b0
JS
2662 /* Get a Mailbox buffer to setup mailbox commands for callback */
2663 do {
2664 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
2665 if (pmb == NULL)
2666 break;
2e0fef85 2667
04c68496 2668 pmbox = &pmb->u.mb;
dea3101e 2669
858c9f6c
JS
2670 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
2671 if (pmb->vport) {
2672 lpfc_debugfs_disc_trc(pmb->vport,
2673 LPFC_DISC_TRC_MBOX_VPORT,
2674 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
2675 (uint32_t)pmbox->mbxCommand,
2676 pmbox->un.varWords[0],
2677 pmbox->un.varWords[1]);
2678 }
2679 else {
2680 lpfc_debugfs_disc_trc(phba->pport,
2681 LPFC_DISC_TRC_MBOX,
2682 "MBOX cmpl: cmd:x%x mb:x%x x%x",
2683 (uint32_t)pmbox->mbxCommand,
2684 pmbox->un.varWords[0],
2685 pmbox->un.varWords[1]);
2686 }
2687 }
2688
dea3101e
JB
2689 /*
2690 * It is a fatal error if unknown mbox command completion.
2691 */
2692 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
2693 MBX_SHUTDOWN) {
af901ca1 2694 /* Unknown mailbox command compl */
92d7f7b0 2695 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2696 "(%d):0323 Unknown Mailbox command "
a183a15f 2697 "x%x (x%x/x%x) Cmpl\n",
43bfea1b
JS
2698 pmb->vport ? pmb->vport->vpi :
2699 LPFC_VPORT_UNKNOWN,
04c68496 2700 pmbox->mbxCommand,
a183a15f
JS
2701 lpfc_sli_config_mbox_subsys_get(phba,
2702 pmb),
2703 lpfc_sli_config_mbox_opcode_get(phba,
2704 pmb));
2e0fef85 2705 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
2706 phba->work_hs = HS_FFER3;
2707 lpfc_handle_eratt(phba);
92d7f7b0 2708 continue;
dea3101e
JB
2709 }
2710
dea3101e
JB
2711 if (pmbox->mbxStatus) {
2712 phba->sli.slistat.mbox_stat_err++;
2713 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
2714 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0 2715 lpfc_printf_log(phba, KERN_INFO,
a183a15f
JS
2716 LOG_MBOX | LOG_SLI,
2717 "(%d):0305 Mbox cmd cmpl "
2718 "error - RETRYing Data: x%x "
2719 "(x%x/x%x) x%x x%x x%x\n",
43bfea1b
JS
2720 pmb->vport ? pmb->vport->vpi :
2721 LPFC_VPORT_UNKNOWN,
a183a15f
JS
2722 pmbox->mbxCommand,
2723 lpfc_sli_config_mbox_subsys_get(phba,
2724 pmb),
2725 lpfc_sli_config_mbox_opcode_get(phba,
2726 pmb),
2727 pmbox->mbxStatus,
2728 pmbox->un.varWords[0],
43bfea1b
JS
2729 pmb->vport ? pmb->vport->port_state :
2730 LPFC_VPORT_UNKNOWN);
dea3101e
JB
2731 pmbox->mbxStatus = 0;
2732 pmbox->mbxOwner = OWN_HOST;
dea3101e 2733 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
04c68496 2734 if (rc != MBX_NOT_FINISHED)
92d7f7b0 2735 continue;
dea3101e
JB
2736 }
2737 }
2738
2739 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 2740 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
2d44d165 2741 "(%d):0307 Mailbox cmd x%x (x%x/x%x) Cmpl %ps "
e74c03c8
JS
2742 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
2743 "x%x x%x x%x\n",
92d7f7b0 2744 pmb->vport ? pmb->vport->vpi : 0,
dea3101e 2745 pmbox->mbxCommand,
a183a15f
JS
2746 lpfc_sli_config_mbox_subsys_get(phba, pmb),
2747 lpfc_sli_config_mbox_opcode_get(phba, pmb),
dea3101e
JB
2748 pmb->mbox_cmpl,
2749 *((uint32_t *) pmbox),
2750 pmbox->un.varWords[0],
2751 pmbox->un.varWords[1],
2752 pmbox->un.varWords[2],
2753 pmbox->un.varWords[3],
2754 pmbox->un.varWords[4],
2755 pmbox->un.varWords[5],
2756 pmbox->un.varWords[6],
e74c03c8
JS
2757 pmbox->un.varWords[7],
2758 pmbox->un.varWords[8],
2759 pmbox->un.varWords[9],
2760 pmbox->un.varWords[10]);
dea3101e 2761
92d7f7b0 2762 if (pmb->mbox_cmpl)
dea3101e 2763 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS
2764 } while (1);
2765 return 0;
2766}
dea3101e 2767
e59058c4 2768/**
3621a710 2769 * lpfc_sli_get_buff - Get the buffer associated with the buffer tag
e59058c4
JS
2770 * @phba: Pointer to HBA context object.
2771 * @pring: Pointer to driver SLI ring object.
2772 * @tag: buffer tag.
2773 *
2774 * This function is called with no lock held. When QUE_BUFTAG_BIT bit
2775 * is set in the tag the buffer is posted for a particular exchange,
2776 * the function will return the buffer without replacing the buffer.
2777 * If the buffer is for unsolicited ELS or CT traffic, this function
2778 * returns the buffer and also posts another buffer to the firmware.
2779 **/
76bb24ef
JS
2780static struct lpfc_dmabuf *
2781lpfc_sli_get_buff(struct lpfc_hba *phba,
9f1e1b50
JS
2782 struct lpfc_sli_ring *pring,
2783 uint32_t tag)
76bb24ef 2784{
9f1e1b50
JS
2785 struct hbq_dmabuf *hbq_entry;
2786
76bb24ef
JS
2787 if (tag & QUE_BUFTAG_BIT)
2788 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
9f1e1b50
JS
2789 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
2790 if (!hbq_entry)
2791 return NULL;
2792 return &hbq_entry->dbuf;
76bb24ef 2793}
57127f15 2794
3a8070c5
JS
2795/**
2796 * lpfc_nvme_unsol_ls_handler - Process an unsolicited event data buffer
2797 * containing a NVME LS request.
2798 * @phba: pointer to lpfc hba data structure.
2799 * @piocb: pointer to the iocbq struct representing the sequence starting
2800 * frame.
2801 *
2802 * This routine initially validates the NVME LS, validates there is a login
2803 * with the port that sent the LS, and then calls the appropriate nvme host
2804 * or target LS request handler.
2805 **/
2806static void
2807lpfc_nvme_unsol_ls_handler(struct lpfc_hba *phba, struct lpfc_iocbq *piocb)
2808{
2809 struct lpfc_nodelist *ndlp;
2810 struct lpfc_dmabuf *d_buf;
2811 struct hbq_dmabuf *nvmebuf;
2812 struct fc_frame_header *fc_hdr;
2813 struct lpfc_async_xchg_ctx *axchg = NULL;
2814 char *failwhy = NULL;
2815 uint32_t oxid, sid, did, fctl, size;
4e57e0b9 2816 int ret = 1;
3a8070c5
JS
2817
2818 d_buf = piocb->context2;
2819
2820 nvmebuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
2821 fc_hdr = nvmebuf->hbuf.virt;
2822 oxid = be16_to_cpu(fc_hdr->fh_ox_id);
2823 sid = sli4_sid_from_fc_hdr(fc_hdr);
2824 did = sli4_did_from_fc_hdr(fc_hdr);
2825 fctl = (fc_hdr->fh_f_ctl[0] << 16 |
2826 fc_hdr->fh_f_ctl[1] << 8 |
2827 fc_hdr->fh_f_ctl[2]);
2828 size = bf_get(lpfc_rcqe_length, &nvmebuf->cq_event.cqe.rcqe_cmpl);
2829
2830 lpfc_nvmeio_data(phba, "NVME LS RCV: xri x%x sz %d from %06x\n",
2831 oxid, size, sid);
2832
2833 if (phba->pport->load_flag & FC_UNLOADING) {
2834 failwhy = "Driver Unloading";
2835 } else if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
2836 failwhy = "NVME FC4 Disabled";
2837 } else if (!phba->nvmet_support && !phba->pport->localport) {
2838 failwhy = "No Localport";
2839 } else if (phba->nvmet_support && !phba->targetport) {
2840 failwhy = "No Targetport";
2841 } else if (unlikely(fc_hdr->fh_r_ctl != FC_RCTL_ELS4_REQ)) {
2842 failwhy = "Bad NVME LS R_CTL";
2843 } else if (unlikely((fctl & 0x00FF0000) !=
2844 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT))) {
2845 failwhy = "Bad NVME LS F_CTL";
2846 } else {
2847 axchg = kzalloc(sizeof(*axchg), GFP_ATOMIC);
2848 if (!axchg)
2849 failwhy = "No CTX memory";
2850 }
2851
2852 if (unlikely(failwhy)) {
2853 lpfc_printf_log(phba, KERN_ERR, LOG_NVME_DISC | LOG_NVME_IOERR,
2854 "6154 Drop NVME LS: SID %06X OXID x%X: %s\n",
2855 sid, oxid, failwhy);
2856 goto out_fail;
2857 }
2858
2859 /* validate the source of the LS is logged in */
2860 ndlp = lpfc_findnode_did(phba->pport, sid);
2861 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp) ||
2862 ((ndlp->nlp_state != NLP_STE_UNMAPPED_NODE) &&
2863 (ndlp->nlp_state != NLP_STE_MAPPED_NODE))) {
2864 lpfc_printf_log(phba, KERN_ERR, LOG_NVME_DISC,
2865 "6216 NVME Unsol rcv: No ndlp: "
2866 "NPort_ID x%x oxid x%x\n",
2867 sid, oxid);
2868 goto out_fail;
2869 }
2870
2871 axchg->phba = phba;
2872 axchg->ndlp = ndlp;
2873 axchg->size = size;
2874 axchg->oxid = oxid;
2875 axchg->sid = sid;
2876 axchg->wqeq = NULL;
2877 axchg->state = LPFC_NVME_STE_LS_RCV;
2878 axchg->entry_cnt = 1;
2879 axchg->rqb_buffer = (void *)nvmebuf;
2880 axchg->hdwq = &phba->sli4_hba.hdwq[0];
2881 axchg->payload = nvmebuf->dbuf.virt;
2882 INIT_LIST_HEAD(&axchg->list);
2883
2884 if (phba->nvmet_support)
2885 ret = lpfc_nvmet_handle_lsreq(phba, axchg);
2886 else
2887 ret = lpfc_nvme_handle_lsreq(phba, axchg);
2888
2889 /* if zero, LS was successfully handled. If non-zero, LS not handled */
2890 if (!ret)
2891 return;
2892
2893 lpfc_printf_log(phba, KERN_ERR, LOG_NVME_DISC | LOG_NVME_IOERR,
2894 "6155 Drop NVME LS from DID %06X: SID %06X OXID x%X "
2895 "NVMe%s handler failed %d\n",
2896 did, sid, oxid,
2897 (phba->nvmet_support) ? "T" : "I", ret);
2898
2899out_fail:
3a8070c5
JS
2900
2901 /* recycle receive buffer */
2902 lpfc_in_buf_free(phba, &nvmebuf->dbuf);
2903
2904 /* If start of new exchange, abort it */
4e57e0b9
JS
2905 if (axchg && (fctl & FC_FC_FIRST_SEQ && !(fctl & FC_FC_EX_CTX)))
2906 ret = lpfc_nvme_unsol_ls_issue_abort(phba, axchg, sid, oxid);
2907
2908 if (ret)
2909 kfree(axchg);
3a8070c5
JS
2910}
2911
3772a991
JS
2912/**
2913 * lpfc_complete_unsol_iocb - Complete an unsolicited sequence
2914 * @phba: Pointer to HBA context object.
2915 * @pring: Pointer to driver SLI ring object.
2916 * @saveq: Pointer to the iocbq struct representing the sequence starting frame.
2917 * @fch_r_ctl: the r_ctl for the first frame of the sequence.
2918 * @fch_type: the type for the first frame of the sequence.
2919 *
2920 * This function is called with no lock held. This function uses the r_ctl and
2921 * type of the received sequence to find the correct callback function to call
2922 * to process the sequence.
2923 **/
2924static int
2925lpfc_complete_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2926 struct lpfc_iocbq *saveq, uint32_t fch_r_ctl,
2927 uint32_t fch_type)
2928{
2929 int i;
2930
f358dd0c
JS
2931 switch (fch_type) {
2932 case FC_TYPE_NVME:
3a8070c5 2933 lpfc_nvme_unsol_ls_handler(phba, saveq);
f358dd0c
JS
2934 return 1;
2935 default:
2936 break;
2937 }
2938
3772a991
JS
2939 /* unSolicited Responses */
2940 if (pring->prt[0].profile) {
2941 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
2942 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
2943 saveq);
2944 return 1;
2945 }
2946 /* We must search, based on rctl / type
2947 for the right routine */
2948 for (i = 0; i < pring->num_mask; i++) {
2949 if ((pring->prt[i].rctl == fch_r_ctl) &&
2950 (pring->prt[i].type == fch_type)) {
2951 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
2952 (pring->prt[i].lpfc_sli_rcv_unsol_event)
2953 (phba, pring, saveq);
2954 return 1;
2955 }
2956 }
2957 return 0;
2958}
e59058c4
JS
2959
2960/**
3621a710 2961 * lpfc_sli_process_unsol_iocb - Unsolicited iocb handler
e59058c4
JS
2962 * @phba: Pointer to HBA context object.
2963 * @pring: Pointer to driver SLI ring object.
2964 * @saveq: Pointer to the unsolicited iocb.
2965 *
2966 * This function is called with no lock held by the ring event handler
2967 * when there is an unsolicited iocb posted to the response ring by the
2968 * firmware. This function gets the buffer associated with the iocbs
2969 * and calls the event handler for the ring. This function handles both
2970 * qring buffers and hbq buffers.
2971 * When the function returns 1 the caller can free the iocb object otherwise
2972 * upper layer functions will free the iocb objects.
2973 **/
dea3101e
JB
2974static int
2975lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2976 struct lpfc_iocbq *saveq)
2977{
2978 IOCB_t * irsp;
2979 WORD5 * w5p;
2980 uint32_t Rctl, Type;
76bb24ef 2981 struct lpfc_iocbq *iocbq;
3163f725 2982 struct lpfc_dmabuf *dmzbuf;
dea3101e 2983
dea3101e 2984 irsp = &(saveq->iocb);
57127f15
JS
2985
2986 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
2987 if (pring->lpfc_sli_rcv_async_status)
2988 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
2989 else
2990 lpfc_printf_log(phba,
2991 KERN_WARNING,
2992 LOG_SLI,
2993 "0316 Ring %d handler: unexpected "
2994 "ASYNC_STATUS iocb received evt_code "
2995 "0x%x\n",
2996 pring->ringno,
2997 irsp->un.asyncstat.evt_code);
2998 return 1;
2999 }
3000
3163f725
JS
3001 if ((irsp->ulpCommand == CMD_IOCB_RET_XRI64_CX) &&
3002 (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)) {
3003 if (irsp->ulpBdeCount > 0) {
3004 dmzbuf = lpfc_sli_get_buff(phba, pring,
3005 irsp->un.ulpWord[3]);
3006 lpfc_in_buf_free(phba, dmzbuf);
3007 }
3008
3009 if (irsp->ulpBdeCount > 1) {
3010 dmzbuf = lpfc_sli_get_buff(phba, pring,
3011 irsp->unsli3.sli3Words[3]);
3012 lpfc_in_buf_free(phba, dmzbuf);
3013 }
3014
3015 if (irsp->ulpBdeCount > 2) {
3016 dmzbuf = lpfc_sli_get_buff(phba, pring,
3017 irsp->unsli3.sli3Words[7]);
3018 lpfc_in_buf_free(phba, dmzbuf);
3019 }
3020
3021 return 1;
3022 }
3023
92d7f7b0 3024 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS
3025 if (irsp->ulpBdeCount != 0) {
3026 saveq->context2 = lpfc_sli_get_buff(phba, pring,
3027 irsp->un.ulpWord[3]);
3028 if (!saveq->context2)
3029 lpfc_printf_log(phba,
3030 KERN_ERR,
3031 LOG_SLI,
3032 "0341 Ring %d Cannot find buffer for "
3033 "an unsolicited iocb. tag 0x%x\n",
3034 pring->ringno,
3035 irsp->un.ulpWord[3]);
76bb24ef
JS
3036 }
3037 if (irsp->ulpBdeCount == 2) {
3038 saveq->context3 = lpfc_sli_get_buff(phba, pring,
3039 irsp->unsli3.sli3Words[7]);
3040 if (!saveq->context3)
3041 lpfc_printf_log(phba,
3042 KERN_ERR,
3043 LOG_SLI,
3044 "0342 Ring %d Cannot find buffer for an"
3045 " unsolicited iocb. tag 0x%x\n",
3046 pring->ringno,
3047 irsp->unsli3.sli3Words[7]);
3048 }
3049 list_for_each_entry(iocbq, &saveq->list, list) {
76bb24ef 3050 irsp = &(iocbq->iocb);
76bb24ef
JS
3051 if (irsp->ulpBdeCount != 0) {
3052 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
3053 irsp->un.ulpWord[3]);
9c2face6 3054 if (!iocbq->context2)
76bb24ef
JS
3055 lpfc_printf_log(phba,
3056 KERN_ERR,
3057 LOG_SLI,
3058 "0343 Ring %d Cannot find "
3059 "buffer for an unsolicited iocb"
3060 ". tag 0x%x\n", pring->ringno,
92d7f7b0 3061 irsp->un.ulpWord[3]);
76bb24ef
JS
3062 }
3063 if (irsp->ulpBdeCount == 2) {
3064 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 3065 irsp->unsli3.sli3Words[7]);
9c2face6 3066 if (!iocbq->context3)
76bb24ef
JS
3067 lpfc_printf_log(phba,
3068 KERN_ERR,
3069 LOG_SLI,
3070 "0344 Ring %d Cannot find "
3071 "buffer for an unsolicited "
3072 "iocb. tag 0x%x\n",
3073 pring->ringno,
3074 irsp->unsli3.sli3Words[7]);
3075 }
3076 }
92d7f7b0 3077 }
9c2face6
JS
3078 if (irsp->ulpBdeCount != 0 &&
3079 (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
3080 irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
3081 int found = 0;
3082
3083 /* search continue save q for same XRI */
3084 list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
7851fe2c
JS
3085 if (iocbq->iocb.unsli3.rcvsli3.ox_id ==
3086 saveq->iocb.unsli3.rcvsli3.ox_id) {
9c2face6
JS
3087 list_add_tail(&saveq->list, &iocbq->list);
3088 found = 1;
3089 break;
3090 }
3091 }
3092 if (!found)
3093 list_add_tail(&saveq->clist,
3094 &pring->iocb_continue_saveq);
3095 if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
3096 list_del_init(&iocbq->clist);
3097 saveq = iocbq;
3098 irsp = &(saveq->iocb);
3099 } else
3100 return 0;
3101 }
3102 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
3103 (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
3104 (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
6a9c52cf
JS
3105 Rctl = FC_RCTL_ELS_REQ;
3106 Type = FC_TYPE_ELS;
9c2face6
JS
3107 } else {
3108 w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
3109 Rctl = w5p->hcsw.Rctl;
3110 Type = w5p->hcsw.Type;
3111
3112 /* Firmware Workaround */
3113 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
3114 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
3115 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
6a9c52cf
JS
3116 Rctl = FC_RCTL_ELS_REQ;
3117 Type = FC_TYPE_ELS;
9c2face6
JS
3118 w5p->hcsw.Rctl = Rctl;
3119 w5p->hcsw.Type = Type;
3120 }
3121 }
92d7f7b0 3122
3772a991 3123 if (!lpfc_complete_unsol_iocb(phba, pring, saveq, Rctl, Type))
92d7f7b0 3124 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3125 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 3126 "Type x%x received\n",
e8b62011 3127 pring->ringno, Rctl, Type);
3772a991 3128
92d7f7b0 3129 return 1;
dea3101e
JB
3130}
3131
e59058c4 3132/**
3621a710 3133 * lpfc_sli_iocbq_lookup - Find command iocb for the given response iocb
e59058c4
JS
3134 * @phba: Pointer to HBA context object.
3135 * @pring: Pointer to driver SLI ring object.
3136 * @prspiocb: Pointer to response iocb object.
3137 *
3138 * This function looks up the iocb_lookup table to get the command iocb
3139 * corresponding to the given response iocb using the iotag of the
e2a8be56
JS
3140 * response iocb. The driver calls this function with the hbalock held
3141 * for SLI3 ports or the ring lock held for SLI4 ports.
e59058c4
JS
3142 * This function returns the command iocb object if it finds the command
3143 * iocb else returns NULL.
3144 **/
dea3101e 3145static struct lpfc_iocbq *
2e0fef85
JS
3146lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
3147 struct lpfc_sli_ring *pring,
3148 struct lpfc_iocbq *prspiocb)
dea3101e 3149{
dea3101e
JB
3150 struct lpfc_iocbq *cmd_iocb = NULL;
3151 uint16_t iotag;
e2a8be56
JS
3152 spinlock_t *temp_lock = NULL;
3153 unsigned long iflag = 0;
3154
3155 if (phba->sli_rev == LPFC_SLI_REV4)
3156 temp_lock = &pring->ring_lock;
3157 else
3158 temp_lock = &phba->hbalock;
dea3101e 3159
e2a8be56 3160 spin_lock_irqsave(temp_lock, iflag);
604a3e30
JB
3161 iotag = prspiocb->iocb.ulpIoTag;
3162
3163 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3164 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6 3165 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
89533e9b
JS
3166 /* remove from txcmpl queue list */
3167 list_del_init(&cmd_iocb->list);
4f2e66c6 3168 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
c490850a 3169 pring->txcmplq_cnt--;
e2a8be56 3170 spin_unlock_irqrestore(temp_lock, iflag);
89533e9b 3171 return cmd_iocb;
2a9bf3d0 3172 }
dea3101e
JB
3173 }
3174
e2a8be56 3175 spin_unlock_irqrestore(temp_lock, iflag);
dea3101e 3176 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
89533e9b 3177 "0317 iotag x%x is out of "
604a3e30 3178 "range: max iotag x%x wd0 x%x\n",
e8b62011 3179 iotag, phba->sli.last_iotag,
604a3e30 3180 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e
JB
3181 return NULL;
3182}
3183
3772a991
JS
3184/**
3185 * lpfc_sli_iocbq_lookup_by_tag - Find command iocb for the iotag
3186 * @phba: Pointer to HBA context object.
3187 * @pring: Pointer to driver SLI ring object.
3188 * @iotag: IOCB tag.
3189 *
3190 * This function looks up the iocb_lookup table to get the command iocb
e2a8be56
JS
3191 * corresponding to the given iotag. The driver calls this function with
3192 * the ring lock held because this function is an SLI4 port only helper.
3772a991
JS
3193 * This function returns the command iocb object if it finds the command
3194 * iocb else returns NULL.
3195 **/
3196static struct lpfc_iocbq *
3197lpfc_sli_iocbq_lookup_by_tag(struct lpfc_hba *phba,
3198 struct lpfc_sli_ring *pring, uint16_t iotag)
3199{
895427bd 3200 struct lpfc_iocbq *cmd_iocb = NULL;
e2a8be56
JS
3201 spinlock_t *temp_lock = NULL;
3202 unsigned long iflag = 0;
3772a991 3203
e2a8be56
JS
3204 if (phba->sli_rev == LPFC_SLI_REV4)
3205 temp_lock = &pring->ring_lock;
3206 else
3207 temp_lock = &phba->hbalock;
3208
3209 spin_lock_irqsave(temp_lock, iflag);
3772a991
JS
3210 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3211 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6
JS
3212 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
3213 /* remove from txcmpl queue list */
3214 list_del_init(&cmd_iocb->list);
3215 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
c490850a 3216 pring->txcmplq_cnt--;
e2a8be56 3217 spin_unlock_irqrestore(temp_lock, iflag);
4f2e66c6 3218 return cmd_iocb;
2a9bf3d0 3219 }
3772a991 3220 }
89533e9b 3221
e2a8be56 3222 spin_unlock_irqrestore(temp_lock, iflag);
3772a991 3223 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd
JS
3224 "0372 iotag x%x lookup error: max iotag (x%x) "
3225 "iocb_flag x%x\n",
3226 iotag, phba->sli.last_iotag,
3227 cmd_iocb ? cmd_iocb->iocb_flag : 0xffff);
3772a991
JS
3228 return NULL;
3229}
3230
e59058c4 3231/**
3621a710 3232 * lpfc_sli_process_sol_iocb - process solicited iocb completion
e59058c4
JS
3233 * @phba: Pointer to HBA context object.
3234 * @pring: Pointer to driver SLI ring object.
3235 * @saveq: Pointer to the response iocb to be processed.
3236 *
3237 * This function is called by the ring event handler for non-fcp
3238 * rings when there is a new response iocb in the response ring.
3239 * The caller is not required to hold any locks. This function
3240 * gets the command iocb associated with the response iocb and
3241 * calls the completion handler for the command iocb. If there
3242 * is no completion handler, the function will free the resources
3243 * associated with command iocb. If the response iocb is for
3244 * an already aborted command iocb, the status of the completion
3245 * is changed to IOSTAT_LOCAL_REJECT/IOERR_SLI_ABORTED.
3246 * This function always returns 1.
3247 **/
dea3101e 3248static int
2e0fef85 3249lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e
JB
3250 struct lpfc_iocbq *saveq)
3251{
2e0fef85 3252 struct lpfc_iocbq *cmdiocbp;
dea3101e
JB
3253 int rc = 1;
3254 unsigned long iflag;
3255
604a3e30 3256 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
dea3101e
JB
3257 if (cmdiocbp) {
3258 if (cmdiocbp->iocb_cmpl) {
ea2151b4
JS
3259 /*
3260 * If an ELS command failed send an event to mgmt
3261 * application.
3262 */
3263 if (saveq->iocb.ulpStatus &&
3264 (pring->ringno == LPFC_ELS_RING) &&
3265 (cmdiocbp->iocb.ulpCommand ==
3266 CMD_ELS_REQUEST64_CR))
3267 lpfc_send_els_failure_event(phba,
3268 cmdiocbp, saveq);
3269
dea3101e
JB
3270 /*
3271 * Post all ELS completions to the worker thread.
3272 * All other are passed to the completion callback.
3273 */
3274 if (pring->ringno == LPFC_ELS_RING) {
341af102
JS
3275 if ((phba->sli_rev < LPFC_SLI_REV4) &&
3276 (cmdiocbp->iocb_flag &
3277 LPFC_DRIVER_ABORTED)) {
3278 spin_lock_irqsave(&phba->hbalock,
3279 iflag);
07951076
JS
3280 cmdiocbp->iocb_flag &=
3281 ~LPFC_DRIVER_ABORTED;
341af102
JS
3282 spin_unlock_irqrestore(&phba->hbalock,
3283 iflag);
07951076
JS
3284 saveq->iocb.ulpStatus =
3285 IOSTAT_LOCAL_REJECT;
3286 saveq->iocb.un.ulpWord[4] =
3287 IOERR_SLI_ABORTED;
0ff10d46
JS
3288
3289 /* Firmware could still be in progress
3290 * of DMAing payload, so don't free data
3291 * buffer till after a hbeat.
3292 */
341af102
JS
3293 spin_lock_irqsave(&phba->hbalock,
3294 iflag);
0ff10d46 3295 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
341af102
JS
3296 spin_unlock_irqrestore(&phba->hbalock,
3297 iflag);
3298 }
0f65ff68
JS
3299 if (phba->sli_rev == LPFC_SLI_REV4) {
3300 if (saveq->iocb_flag &
3301 LPFC_EXCHANGE_BUSY) {
3302 /* Set cmdiocb flag for the
3303 * exchange busy so sgl (xri)
3304 * will not be released until
3305 * the abort xri is received
3306 * from hba.
3307 */
3308 spin_lock_irqsave(
3309 &phba->hbalock, iflag);
3310 cmdiocbp->iocb_flag |=
3311 LPFC_EXCHANGE_BUSY;
3312 spin_unlock_irqrestore(
3313 &phba->hbalock, iflag);
3314 }
3315 if (cmdiocbp->iocb_flag &
3316 LPFC_DRIVER_ABORTED) {
3317 /*
3318 * Clear LPFC_DRIVER_ABORTED
3319 * bit in case it was driver
3320 * initiated abort.
3321 */
3322 spin_lock_irqsave(
3323 &phba->hbalock, iflag);
3324 cmdiocbp->iocb_flag &=
3325 ~LPFC_DRIVER_ABORTED;
3326 spin_unlock_irqrestore(
3327 &phba->hbalock, iflag);
3328 cmdiocbp->iocb.ulpStatus =
3329 IOSTAT_LOCAL_REJECT;
3330 cmdiocbp->iocb.un.ulpWord[4] =
3331 IOERR_ABORT_REQUESTED;
3332 /*
3333 * For SLI4, irsiocb contains
3334 * NO_XRI in sli_xritag, it
3335 * shall not affect releasing
3336 * sgl (xri) process.
3337 */
3338 saveq->iocb.ulpStatus =
3339 IOSTAT_LOCAL_REJECT;
3340 saveq->iocb.un.ulpWord[4] =
3341 IOERR_SLI_ABORTED;
3342 spin_lock_irqsave(
3343 &phba->hbalock, iflag);
3344 saveq->iocb_flag |=
3345 LPFC_DELAY_MEM_FREE;
3346 spin_unlock_irqrestore(
3347 &phba->hbalock, iflag);
3348 }
07951076 3349 }
dea3101e 3350 }
2e0fef85 3351 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB
3352 } else
3353 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e
JB
3354 } else {
3355 /*
3356 * Unknown initiating command based on the response iotag.
3357 * This could be the case on the ELS ring because of
3358 * lpfc_els_abort().
3359 */
3360 if (pring->ringno != LPFC_ELS_RING) {
3361 /*
3362 * Ring <ringno> handler: unexpected completion IoTag
3363 * <IoTag>
3364 */
a257bf90 3365 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
3366 "0322 Ring %d handler: "
3367 "unexpected completion IoTag x%x "
3368 "Data: x%x x%x x%x x%x\n",
3369 pring->ringno,
3370 saveq->iocb.ulpIoTag,
3371 saveq->iocb.ulpStatus,
3372 saveq->iocb.un.ulpWord[4],
3373 saveq->iocb.ulpCommand,
3374 saveq->iocb.ulpContext);
dea3101e
JB
3375 }
3376 }
68876920 3377
dea3101e
JB
3378 return rc;
3379}
3380
e59058c4 3381/**
3621a710 3382 * lpfc_sli_rsp_pointers_error - Response ring pointer error handler
e59058c4
JS
3383 * @phba: Pointer to HBA context object.
3384 * @pring: Pointer to driver SLI ring object.
3385 *
3386 * This function is called from the iocb ring event handlers when
3387 * put pointer is ahead of the get pointer for a ring. This function signal
3388 * an error attention condition to the worker thread and the worker
3389 * thread will transition the HBA to offline state.
3390 **/
2e0fef85
JS
3391static void
3392lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 3393{
34b02dcd 3394 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
875fbdfe 3395 /*
025dfdaf 3396 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
875fbdfe
JSEC
3397 * rsp ring <portRspMax>
3398 */
3399 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3400 "0312 Ring %d handler: portRspPut %d "
025dfdaf 3401 "is bigger than rsp ring %d\n",
e8b62011 3402 pring->ringno, le32_to_cpu(pgp->rspPutInx),
7e56aa25 3403 pring->sli.sli3.numRiocb);
875fbdfe 3404
2e0fef85 3405 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC
3406
3407 /*
3408 * All error attention handlers are posted to
3409 * worker thread
3410 */
3411 phba->work_ha |= HA_ERATT;
3412 phba->work_hs = HS_FFER3;
92d7f7b0 3413
5e9d9b82 3414 lpfc_worker_wake_up(phba);
875fbdfe
JSEC
3415
3416 return;
3417}
3418
9399627f 3419/**
3621a710 3420 * lpfc_poll_eratt - Error attention polling timer timeout handler
9399627f
JS
3421 * @ptr: Pointer to address of HBA context object.
3422 *
3423 * This function is invoked by the Error Attention polling timer when the
3424 * timer times out. It will check the SLI Error Attention register for
3425 * possible attention events. If so, it will post an Error Attention event
3426 * and wake up worker thread to process it. Otherwise, it will set up the
3427 * Error Attention polling timer for the next poll.
3428 **/
f22eb4d3 3429void lpfc_poll_eratt(struct timer_list *t)
9399627f
JS
3430{
3431 struct lpfc_hba *phba;
eb016566 3432 uint32_t eratt = 0;
aa6fbb75 3433 uint64_t sli_intr, cnt;
9399627f 3434
f22eb4d3 3435 phba = from_timer(phba, t, eratt_poll);
9399627f 3436
aa6fbb75
JS
3437 /* Here we will also keep track of interrupts per sec of the hba */
3438 sli_intr = phba->sli.slistat.sli_intr;
3439
3440 if (phba->sli.slistat.sli_prev_intr > sli_intr)
3441 cnt = (((uint64_t)(-1) - phba->sli.slistat.sli_prev_intr) +
3442 sli_intr);
3443 else
3444 cnt = (sli_intr - phba->sli.slistat.sli_prev_intr);
3445
65791f1f
JS
3446 /* 64-bit integer division not supported on 32-bit x86 - use do_div */
3447 do_div(cnt, phba->eratt_poll_interval);
aa6fbb75
JS
3448 phba->sli.slistat.sli_ips = cnt;
3449
3450 phba->sli.slistat.sli_prev_intr = sli_intr;
3451
9399627f
JS
3452 /* Check chip HA register for error event */
3453 eratt = lpfc_sli_check_eratt(phba);
3454
3455 if (eratt)
3456 /* Tell the worker thread there is work to do */
3457 lpfc_worker_wake_up(phba);
3458 else
3459 /* Restart the timer for next eratt poll */
256ec0d0
JS
3460 mod_timer(&phba->eratt_poll,
3461 jiffies +
65791f1f 3462 msecs_to_jiffies(1000 * phba->eratt_poll_interval));
9399627f
JS
3463 return;
3464}
3465
875fbdfe 3466
e59058c4 3467/**
3621a710 3468 * lpfc_sli_handle_fast_ring_event - Handle ring events on FCP ring
e59058c4
JS
3469 * @phba: Pointer to HBA context object.
3470 * @pring: Pointer to driver SLI ring object.
3471 * @mask: Host attention register mask for this ring.
3472 *
3473 * This function is called from the interrupt context when there is a ring
3474 * event for the fcp ring. The caller does not hold any lock.
3475 * The function processes each response iocb in the response ring until it
25985edc 3476 * finds an iocb with LE bit set and chains all the iocbs up to the iocb with
e59058c4
JS
3477 * LE bit set. The function will call the completion handler of the command iocb
3478 * if the response iocb indicates a completion for a command iocb or it is
3479 * an abort completion. The function will call lpfc_sli_process_unsol_iocb
3480 * function if this is an unsolicited iocb.
dea3101e 3481 * This routine presumes LPFC_FCP_RING handling and doesn't bother
45ed1190
JS
3482 * to check it explicitly.
3483 */
3484int
2e0fef85
JS
3485lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
3486 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3487{
34b02dcd 3488 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
dea3101e 3489 IOCB_t *irsp = NULL;
87f6eaff 3490 IOCB_t *entry = NULL;
dea3101e
JB
3491 struct lpfc_iocbq *cmdiocbq = NULL;
3492 struct lpfc_iocbq rspiocbq;
dea3101e
JB
3493 uint32_t status;
3494 uint32_t portRspPut, portRspMax;
3495 int rc = 1;
3496 lpfc_iocb_type type;
3497 unsigned long iflag;
3498 uint32_t rsp_cmpl = 0;
dea3101e 3499
2e0fef85 3500 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3501 pring->stats.iocb_event++;
3502
dea3101e
JB
3503 /*
3504 * The next available response entry should never exceed the maximum
3505 * entries. If it does, treat it as an adapter hardware error.
3506 */
7e56aa25 3507 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3508 portRspPut = le32_to_cpu(pgp->rspPutInx);
3509 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 3510 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 3511 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3512 return 1;
3513 }
45ed1190
JS
3514 if (phba->fcp_ring_in_use) {
3515 spin_unlock_irqrestore(&phba->hbalock, iflag);
3516 return 1;
3517 } else
3518 phba->fcp_ring_in_use = 1;
dea3101e
JB
3519
3520 rmb();
7e56aa25 3521 while (pring->sli.sli3.rspidx != portRspPut) {
87f6eaff
JSEC
3522 /*
3523 * Fetch an entry off the ring and copy it into a local data
3524 * structure. The copy involves a byte-swap since the
3525 * network byte order and pci byte orders are different.
3526 */
ed957684 3527 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 3528 phba->last_completion_time = jiffies;
875fbdfe 3529
7e56aa25
JS
3530 if (++pring->sli.sli3.rspidx >= portRspMax)
3531 pring->sli.sli3.rspidx = 0;
875fbdfe 3532
87f6eaff
JSEC
3533 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
3534 (uint32_t *) &rspiocbq.iocb,
ed957684 3535 phba->iocb_rsp_size);
a4bc3379 3536 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC
3537 irsp = &rspiocbq.iocb;
3538
dea3101e
JB
3539 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
3540 pring->stats.iocb_rsp++;
3541 rsp_cmpl++;
3542
3543 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS
3544 /*
3545 * If resource errors reported from HBA, reduce
3546 * queuedepths of the SCSI device.
3547 */
3548 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3549 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3550 IOERR_NO_RESOURCES)) {
92d7f7b0 3551 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3552 phba->lpfc_rampdown_queue_depth(phba);
92d7f7b0
JS
3553 spin_lock_irqsave(&phba->hbalock, iflag);
3554 }
3555
dea3101e
JB
3556 /* Rsp ring <ringno> error: IOCB */
3557 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3558 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 3559 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 3560 pring->ringno,
92d7f7b0
JS
3561 irsp->un.ulpWord[0],
3562 irsp->un.ulpWord[1],
3563 irsp->un.ulpWord[2],
3564 irsp->un.ulpWord[3],
3565 irsp->un.ulpWord[4],
3566 irsp->un.ulpWord[5],
d7c255b2
JS
3567 *(uint32_t *)&irsp->un1,
3568 *((uint32_t *)&irsp->un1 + 1));
dea3101e
JB
3569 }
3570
3571 switch (type) {
3572 case LPFC_ABORT_IOCB:
3573 case LPFC_SOL_IOCB:
3574 /*
3575 * Idle exchange closed via ABTS from port. No iocb
3576 * resources need to be recovered.
3577 */
3578 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 3579 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3580 "0333 IOCB cmd 0x%x"
dca9479b 3581 " processed. Skipping"
92d7f7b0 3582 " completion\n",
dca9479b 3583 irsp->ulpCommand);
dea3101e
JB
3584 break;
3585 }
3586
e2a8be56 3587 spin_unlock_irqrestore(&phba->hbalock, iflag);
604a3e30
JB
3588 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
3589 &rspiocbq);
e2a8be56 3590 spin_lock_irqsave(&phba->hbalock, iflag);
0f65ff68
JS
3591 if (unlikely(!cmdiocbq))
3592 break;
3593 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED)
3594 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3595 if (cmdiocbq->iocb_cmpl) {
3596 spin_unlock_irqrestore(&phba->hbalock, iflag);
3597 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
3598 &rspiocbq);
3599 spin_lock_irqsave(&phba->hbalock, iflag);
3600 }
dea3101e 3601 break;
a4bc3379 3602 case LPFC_UNSOL_IOCB:
2e0fef85 3603 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 3604 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 3605 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 3606 break;
dea3101e
JB
3607 default:
3608 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3609 char adaptermsg[LPFC_MAX_ADPTMSG];
3610 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3611 memcpy(&adaptermsg[0], (uint8_t *) irsp,
3612 MAX_MSG_DATA);
898eb71c
JP
3613 dev_warn(&((phba->pcidev)->dev),
3614 "lpfc%d: %s\n",
dea3101e
JB
3615 phba->brd_no, adaptermsg);
3616 } else {
3617 /* Unknown IOCB command */
3618 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3619 "0334 Unknown IOCB command "
92d7f7b0 3620 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 3621 type, irsp->ulpCommand,
92d7f7b0
JS
3622 irsp->ulpStatus,
3623 irsp->ulpIoTag,
3624 irsp->ulpContext);
dea3101e
JB
3625 }
3626 break;
3627 }
3628
3629 /*
3630 * The response IOCB has been processed. Update the ring
3631 * pointer in SLIM. If the port response put pointer has not
3632 * been updated, sync the pgp->rspPutInx and fetch the new port
3633 * response put pointer.
3634 */
7e56aa25
JS
3635 writel(pring->sli.sli3.rspidx,
3636 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3637
7e56aa25 3638 if (pring->sli.sli3.rspidx == portRspPut)
dea3101e
JB
3639 portRspPut = le32_to_cpu(pgp->rspPutInx);
3640 }
3641
3642 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
3643 pring->stats.iocb_rsp_full++;
3644 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3645 writel(status, phba->CAregaddr);
3646 readl(phba->CAregaddr);
3647 }
3648 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3649 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3650 pring->stats.iocb_cmd_empty++;
3651
3652 /* Force update of the local copy of cmdGetInx */
7e56aa25 3653 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3654 lpfc_sli_resume_iocb(phba, pring);
3655
3656 if ((pring->lpfc_sli_cmd_available))
3657 (pring->lpfc_sli_cmd_available) (phba, pring);
3658
3659 }
3660
45ed1190 3661 phba->fcp_ring_in_use = 0;
2e0fef85 3662 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3663 return rc;
3664}
3665
e59058c4 3666/**
3772a991
JS
3667 * lpfc_sli_sp_handle_rspiocb - Handle slow-path response iocb
3668 * @phba: Pointer to HBA context object.
3669 * @pring: Pointer to driver SLI ring object.
3670 * @rspiocbp: Pointer to driver response IOCB object.
3671 *
3672 * This function is called from the worker thread when there is a slow-path
3673 * response IOCB to process. This function chains all the response iocbs until
3674 * seeing the iocb with the LE bit set. The function will call
3675 * lpfc_sli_process_sol_iocb function if the response iocb indicates a
3676 * completion of a command iocb. The function will call the
3677 * lpfc_sli_process_unsol_iocb function if this is an unsolicited iocb.
3678 * The function frees the resources or calls the completion handler if this
3679 * iocb is an abort completion. The function returns NULL when the response
3680 * iocb has the LE bit set and all the chained iocbs are processed, otherwise
3681 * this function shall chain the iocb on to the iocb_continueq and return the
3682 * response iocb passed in.
3683 **/
3684static struct lpfc_iocbq *
3685lpfc_sli_sp_handle_rspiocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3686 struct lpfc_iocbq *rspiocbp)
3687{
3688 struct lpfc_iocbq *saveq;
3689 struct lpfc_iocbq *cmdiocbp;
3690 struct lpfc_iocbq *next_iocb;
3691 IOCB_t *irsp = NULL;
3692 uint32_t free_saveq;
3693 uint8_t iocb_cmd_type;
3694 lpfc_iocb_type type;
3695 unsigned long iflag;
3696 int rc;
3697
3698 spin_lock_irqsave(&phba->hbalock, iflag);
3699 /* First add the response iocb to the countinueq list */
3700 list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
3701 pring->iocb_continueq_cnt++;
3702
70f23fd6 3703 /* Now, determine whether the list is completed for processing */
3772a991
JS
3704 irsp = &rspiocbp->iocb;
3705 if (irsp->ulpLe) {
3706 /*
3707 * By default, the driver expects to free all resources
3708 * associated with this iocb completion.
3709 */
3710 free_saveq = 1;
3711 saveq = list_get_first(&pring->iocb_continueq,
3712 struct lpfc_iocbq, list);
3713 irsp = &(saveq->iocb);
3714 list_del_init(&pring->iocb_continueq);
3715 pring->iocb_continueq_cnt = 0;
3716
3717 pring->stats.iocb_rsp++;
3718
3719 /*
3720 * If resource errors reported from HBA, reduce
3721 * queuedepths of the SCSI device.
3722 */
3723 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3724 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3725 IOERR_NO_RESOURCES)) {
3772a991
JS
3726 spin_unlock_irqrestore(&phba->hbalock, iflag);
3727 phba->lpfc_rampdown_queue_depth(phba);
3728 spin_lock_irqsave(&phba->hbalock, iflag);
3729 }
3730
3731 if (irsp->ulpStatus) {
3732 /* Rsp ring <ringno> error: IOCB */
3733 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
3734 "0328 Rsp Ring %d error: "
3735 "IOCB Data: "
3736 "x%x x%x x%x x%x "
3737 "x%x x%x x%x x%x "
3738 "x%x x%x x%x x%x "
3739 "x%x x%x x%x x%x\n",
3740 pring->ringno,
3741 irsp->un.ulpWord[0],
3742 irsp->un.ulpWord[1],
3743 irsp->un.ulpWord[2],
3744 irsp->un.ulpWord[3],
3745 irsp->un.ulpWord[4],
3746 irsp->un.ulpWord[5],
3747 *(((uint32_t *) irsp) + 6),
3748 *(((uint32_t *) irsp) + 7),
3749 *(((uint32_t *) irsp) + 8),
3750 *(((uint32_t *) irsp) + 9),
3751 *(((uint32_t *) irsp) + 10),
3752 *(((uint32_t *) irsp) + 11),
3753 *(((uint32_t *) irsp) + 12),
3754 *(((uint32_t *) irsp) + 13),
3755 *(((uint32_t *) irsp) + 14),
3756 *(((uint32_t *) irsp) + 15));
3757 }
3758
3759 /*
3760 * Fetch the IOCB command type and call the correct completion
3761 * routine. Solicited and Unsolicited IOCBs on the ELS ring
3762 * get freed back to the lpfc_iocb_list by the discovery
3763 * kernel thread.
3764 */
3765 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
3766 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
3767 switch (type) {
3768 case LPFC_SOL_IOCB:
3769 spin_unlock_irqrestore(&phba->hbalock, iflag);
3770 rc = lpfc_sli_process_sol_iocb(phba, pring, saveq);
3771 spin_lock_irqsave(&phba->hbalock, iflag);
3772 break;
3773
3774 case LPFC_UNSOL_IOCB:
3775 spin_unlock_irqrestore(&phba->hbalock, iflag);
3776 rc = lpfc_sli_process_unsol_iocb(phba, pring, saveq);
3777 spin_lock_irqsave(&phba->hbalock, iflag);
3778 if (!rc)
3779 free_saveq = 0;
3780 break;
3781
3782 case LPFC_ABORT_IOCB:
3783 cmdiocbp = NULL;
e2a8be56
JS
3784 if (irsp->ulpCommand != CMD_XRI_ABORTED_CX) {
3785 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991
JS
3786 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring,
3787 saveq);
e2a8be56
JS
3788 spin_lock_irqsave(&phba->hbalock, iflag);
3789 }
3772a991
JS
3790 if (cmdiocbp) {
3791 /* Call the specified completion routine */
3792 if (cmdiocbp->iocb_cmpl) {
3793 spin_unlock_irqrestore(&phba->hbalock,
3794 iflag);
3795 (cmdiocbp->iocb_cmpl)(phba, cmdiocbp,
3796 saveq);
3797 spin_lock_irqsave(&phba->hbalock,
3798 iflag);
3799 } else
3800 __lpfc_sli_release_iocbq(phba,
3801 cmdiocbp);
3802 }
3803 break;
3804
3805 case LPFC_UNKNOWN_IOCB:
3806 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3807 char adaptermsg[LPFC_MAX_ADPTMSG];
3808 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3809 memcpy(&adaptermsg[0], (uint8_t *)irsp,
3810 MAX_MSG_DATA);
3811 dev_warn(&((phba->pcidev)->dev),
3812 "lpfc%d: %s\n",
3813 phba->brd_no, adaptermsg);
3814 } else {
3815 /* Unknown IOCB command */
3816 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3817 "0335 Unknown IOCB "
3818 "command Data: x%x "
3819 "x%x x%x x%x\n",
3820 irsp->ulpCommand,
3821 irsp->ulpStatus,
3822 irsp->ulpIoTag,
3823 irsp->ulpContext);
3824 }
3825 break;
3826 }
3827
3828 if (free_saveq) {
3829 list_for_each_entry_safe(rspiocbp, next_iocb,
3830 &saveq->list, list) {
61f35bff 3831 list_del_init(&rspiocbp->list);
3772a991
JS
3832 __lpfc_sli_release_iocbq(phba, rspiocbp);
3833 }
3834 __lpfc_sli_release_iocbq(phba, saveq);
3835 }
3836 rspiocbp = NULL;
3837 }
3838 spin_unlock_irqrestore(&phba->hbalock, iflag);
3839 return rspiocbp;
3840}
3841
3842/**
3843 * lpfc_sli_handle_slow_ring_event - Wrapper func for handling slow-path iocbs
e59058c4
JS
3844 * @phba: Pointer to HBA context object.
3845 * @pring: Pointer to driver SLI ring object.
3846 * @mask: Host attention register mask for this ring.
3847 *
3772a991
JS
3848 * This routine wraps the actual slow_ring event process routine from the
3849 * API jump table function pointer from the lpfc_hba struct.
e59058c4 3850 **/
3772a991 3851void
2e0fef85
JS
3852lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
3853 struct lpfc_sli_ring *pring, uint32_t mask)
3772a991
JS
3854{
3855 phba->lpfc_sli_handle_slow_ring_event(phba, pring, mask);
3856}
3857
3858/**
3859 * lpfc_sli_handle_slow_ring_event_s3 - Handle SLI3 ring event for non-FCP rings
3860 * @phba: Pointer to HBA context object.
3861 * @pring: Pointer to driver SLI ring object.
3862 * @mask: Host attention register mask for this ring.
3863 *
3864 * This function is called from the worker thread when there is a ring event
3865 * for non-fcp rings. The caller does not hold any lock. The function will
3866 * remove each response iocb in the response ring and calls the handle
3867 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3868 **/
3869static void
3870lpfc_sli_handle_slow_ring_event_s3(struct lpfc_hba *phba,
3871 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3872{
34b02dcd 3873 struct lpfc_pgp *pgp;
dea3101e
JB
3874 IOCB_t *entry;
3875 IOCB_t *irsp = NULL;
3876 struct lpfc_iocbq *rspiocbp = NULL;
dea3101e 3877 uint32_t portRspPut, portRspMax;
dea3101e 3878 unsigned long iflag;
3772a991 3879 uint32_t status;
dea3101e 3880
34b02dcd 3881 pgp = &phba->port_gp[pring->ringno];
2e0fef85 3882 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3883 pring->stats.iocb_event++;
3884
dea3101e
JB
3885 /*
3886 * The next available response entry should never exceed the maximum
3887 * entries. If it does, treat it as an adapter hardware error.
3888 */
7e56aa25 3889 portRspMax = pring->sli.sli3.numRiocb;
dea3101e
JB
3890 portRspPut = le32_to_cpu(pgp->rspPutInx);
3891 if (portRspPut >= portRspMax) {
3892 /*
025dfdaf 3893 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
dea3101e
JB
3894 * rsp ring <portRspMax>
3895 */
ed957684 3896 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3897 "0303 Ring %d handler: portRspPut %d "
025dfdaf 3898 "is bigger than rsp ring %d\n",
e8b62011 3899 pring->ringno, portRspPut, portRspMax);
dea3101e 3900
2e0fef85
JS
3901 phba->link_state = LPFC_HBA_ERROR;
3902 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
3903
3904 phba->work_hs = HS_FFER3;
3905 lpfc_handle_eratt(phba);
3906
3772a991 3907 return;
dea3101e
JB
3908 }
3909
3910 rmb();
7e56aa25 3911 while (pring->sli.sli3.rspidx != portRspPut) {
dea3101e
JB
3912 /*
3913 * Build a completion list and call the appropriate handler.
3914 * The process is to get the next available response iocb, get
3915 * a free iocb from the list, copy the response data into the
3916 * free iocb, insert to the continuation list, and update the
3917 * next response index to slim. This process makes response
3918 * iocb's in the ring available to DMA as fast as possible but
3919 * pays a penalty for a copy operation. Since the iocb is
3920 * only 32 bytes, this penalty is considered small relative to
3921 * the PCI reads for register values and a slim write. When
3922 * the ulpLe field is set, the entire Command has been
3923 * received.
3924 */
ed957684
JS
3925 entry = lpfc_resp_iocb(phba, pring);
3926
858c9f6c 3927 phba->last_completion_time = jiffies;
2e0fef85 3928 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
3929 if (rspiocbp == NULL) {
3930 printk(KERN_ERR "%s: out of buffers! Failing "
cadbd4a5 3931 "completion.\n", __func__);
dea3101e
JB
3932 break;
3933 }
3934
ed957684
JS
3935 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
3936 phba->iocb_rsp_size);
dea3101e
JB
3937 irsp = &rspiocbp->iocb;
3938
7e56aa25
JS
3939 if (++pring->sli.sli3.rspidx >= portRspMax)
3940 pring->sli.sli3.rspidx = 0;
dea3101e 3941
a58cbd52
JS
3942 if (pring->ringno == LPFC_ELS_RING) {
3943 lpfc_debugfs_slow_ring_trc(phba,
3944 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
3945 *(((uint32_t *) irsp) + 4),
3946 *(((uint32_t *) irsp) + 6),
3947 *(((uint32_t *) irsp) + 7));
3948 }
3949
7e56aa25
JS
3950 writel(pring->sli.sli3.rspidx,
3951 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3952
3772a991
JS
3953 spin_unlock_irqrestore(&phba->hbalock, iflag);
3954 /* Handle the response IOCB */
3955 rspiocbp = lpfc_sli_sp_handle_rspiocb(phba, pring, rspiocbp);
3956 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e
JB
3957
3958 /*
3959 * If the port response put pointer has not been updated, sync
3960 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
3961 * response put pointer.
3962 */
7e56aa25 3963 if (pring->sli.sli3.rspidx == portRspPut) {
dea3101e
JB
3964 portRspPut = le32_to_cpu(pgp->rspPutInx);
3965 }
7e56aa25 3966 } /* while (pring->sli.sli3.rspidx != portRspPut) */
dea3101e 3967
92d7f7b0 3968 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e
JB
3969 /* At least one response entry has been freed */
3970 pring->stats.iocb_rsp_full++;
3971 /* SET RxRE_RSP in Chip Att register */
3972 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3973 writel(status, phba->CAregaddr);
3974 readl(phba->CAregaddr); /* flush */
3975 }
3976 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3977 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3978 pring->stats.iocb_cmd_empty++;
3979
3980 /* Force update of the local copy of cmdGetInx */
7e56aa25 3981 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e
JB
3982 lpfc_sli_resume_iocb(phba, pring);
3983
3984 if ((pring->lpfc_sli_cmd_available))
3985 (pring->lpfc_sli_cmd_available) (phba, pring);
3986
3987 }
3988
2e0fef85 3989 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3990 return;
dea3101e
JB
3991}
3992
4f774513
JS
3993/**
3994 * lpfc_sli_handle_slow_ring_event_s4 - Handle SLI4 slow-path els events
3995 * @phba: Pointer to HBA context object.
3996 * @pring: Pointer to driver SLI ring object.
3997 * @mask: Host attention register mask for this ring.
3998 *
3999 * This function is called from the worker thread when there is a pending
4000 * ELS response iocb on the driver internal slow-path response iocb worker
4001 * queue. The caller does not hold any lock. The function will remove each
4002 * response iocb from the response worker queue and calls the handle
4003 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
4004 **/
4005static void
4006lpfc_sli_handle_slow_ring_event_s4(struct lpfc_hba *phba,
4007 struct lpfc_sli_ring *pring, uint32_t mask)
4008{
4009 struct lpfc_iocbq *irspiocbq;
4d9ab994
JS
4010 struct hbq_dmabuf *dmabuf;
4011 struct lpfc_cq_event *cq_event;
4f774513 4012 unsigned long iflag;
0ef01a2d 4013 int count = 0;
4f774513 4014
45ed1190
JS
4015 spin_lock_irqsave(&phba->hbalock, iflag);
4016 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
4017 spin_unlock_irqrestore(&phba->hbalock, iflag);
4018 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
4f774513
JS
4019 /* Get the response iocb from the head of work queue */
4020 spin_lock_irqsave(&phba->hbalock, iflag);
45ed1190 4021 list_remove_head(&phba->sli4_hba.sp_queue_event,
4d9ab994 4022 cq_event, struct lpfc_cq_event, list);
4f774513 4023 spin_unlock_irqrestore(&phba->hbalock, iflag);
4d9ab994
JS
4024
4025 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
4026 case CQE_CODE_COMPL_WQE:
4027 irspiocbq = container_of(cq_event, struct lpfc_iocbq,
4028 cq_event);
45ed1190
JS
4029 /* Translate ELS WCQE to response IOCBQ */
4030 irspiocbq = lpfc_sli4_els_wcqe_to_rspiocbq(phba,
4031 irspiocbq);
4032 if (irspiocbq)
4033 lpfc_sli_sp_handle_rspiocb(phba, pring,
4034 irspiocbq);
0ef01a2d 4035 count++;
4d9ab994
JS
4036 break;
4037 case CQE_CODE_RECEIVE:
7851fe2c 4038 case CQE_CODE_RECEIVE_V1:
4d9ab994
JS
4039 dmabuf = container_of(cq_event, struct hbq_dmabuf,
4040 cq_event);
4041 lpfc_sli4_handle_received_buffer(phba, dmabuf);
0ef01a2d 4042 count++;
4d9ab994
JS
4043 break;
4044 default:
4045 break;
4046 }
0ef01a2d
JS
4047
4048 /* Limit the number of events to 64 to avoid soft lockups */
4049 if (count == 64)
4050 break;
4f774513
JS
4051 }
4052}
4053
e59058c4 4054/**
3621a710 4055 * lpfc_sli_abort_iocb_ring - Abort all iocbs in the ring
e59058c4
JS
4056 * @phba: Pointer to HBA context object.
4057 * @pring: Pointer to driver SLI ring object.
4058 *
4059 * This function aborts all iocbs in the given ring and frees all the iocb
4060 * objects in txq. This function issues an abort iocb for all the iocb commands
4061 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
4062 * the return of this function. The caller is not required to hold any locks.
4063 **/
2e0fef85 4064void
dea3101e
JB
4065lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
4066{
2534ba75 4067 LIST_HEAD(completions);
dea3101e 4068 struct lpfc_iocbq *iocb, *next_iocb;
dea3101e 4069
92d7f7b0
JS
4070 if (pring->ringno == LPFC_ELS_RING) {
4071 lpfc_fabric_abort_hba(phba);
4072 }
4073
dea3101e
JB
4074 /* Error everything on txq and txcmplq
4075 * First do the txq.
4076 */
db55fba8
JS
4077 if (phba->sli_rev >= LPFC_SLI_REV4) {
4078 spin_lock_irq(&pring->ring_lock);
4079 list_splice_init(&pring->txq, &completions);
4080 pring->txq_cnt = 0;
4081 spin_unlock_irq(&pring->ring_lock);
dea3101e 4082
db55fba8
JS
4083 spin_lock_irq(&phba->hbalock);
4084 /* Next issue ABTS for everything on the txcmplq */
4085 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
4086 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
4087 spin_unlock_irq(&phba->hbalock);
4088 } else {
4089 spin_lock_irq(&phba->hbalock);
4090 list_splice_init(&pring->txq, &completions);
4091 pring->txq_cnt = 0;
dea3101e 4092
db55fba8
JS
4093 /* Next issue ABTS for everything on the txcmplq */
4094 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
4095 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
4096 spin_unlock_irq(&phba->hbalock);
4097 }
dea3101e 4098
a257bf90
JS
4099 /* Cancel all the IOCBs from the completions list */
4100 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
4101 IOERR_SLI_ABORTED);
dea3101e
JB
4102}
4103
db55fba8
JS
4104/**
4105 * lpfc_sli_abort_fcp_rings - Abort all iocbs in all FCP rings
4106 * @phba: Pointer to HBA context object.
4107 * @pring: Pointer to driver SLI ring object.
4108 *
4109 * This function aborts all iocbs in FCP rings and frees all the iocb
4110 * objects in txq. This function issues an abort iocb for all the iocb commands
4111 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
4112 * the return of this function. The caller is not required to hold any locks.
4113 **/
4114void
4115lpfc_sli_abort_fcp_rings(struct lpfc_hba *phba)
4116{
4117 struct lpfc_sli *psli = &phba->sli;
4118 struct lpfc_sli_ring *pring;
4119 uint32_t i;
4120
4121 /* Look on all the FCP Rings for the iotag */
4122 if (phba->sli_rev >= LPFC_SLI_REV4) {
cdb42bec 4123 for (i = 0; i < phba->cfg_hdw_queue; i++) {
c00f62e6 4124 pring = phba->sli4_hba.hdwq[i].io_wq->pring;
db55fba8
JS
4125 lpfc_sli_abort_iocb_ring(phba, pring);
4126 }
4127 } else {
895427bd 4128 pring = &psli->sli3_ring[LPFC_FCP_RING];
db55fba8
JS
4129 lpfc_sli_abort_iocb_ring(phba, pring);
4130 }
4131}
4132
a8e497d5 4133/**
c00f62e6 4134 * lpfc_sli_flush_io_rings - flush all iocbs in the IO ring
a8e497d5
JS
4135 * @phba: Pointer to HBA context object.
4136 *
c00f62e6 4137 * This function flushes all iocbs in the IO ring and frees all the iocb
a8e497d5
JS
4138 * objects in txq and txcmplq. This function will not issue abort iocbs
4139 * for all the iocb commands in txcmplq, they will just be returned with
4140 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
4141 * slot has been permanently disabled.
4142 **/
4143void
c00f62e6 4144lpfc_sli_flush_io_rings(struct lpfc_hba *phba)
a8e497d5
JS
4145{
4146 LIST_HEAD(txq);
4147 LIST_HEAD(txcmplq);
a8e497d5
JS
4148 struct lpfc_sli *psli = &phba->sli;
4149 struct lpfc_sli_ring *pring;
db55fba8 4150 uint32_t i;
c1dd9111 4151 struct lpfc_iocbq *piocb, *next_iocb;
a8e497d5
JS
4152
4153 spin_lock_irq(&phba->hbalock);
4cd70891
JS
4154 if (phba->hba_flag & HBA_IOQ_FLUSH ||
4155 !phba->sli4_hba.hdwq) {
4156 spin_unlock_irq(&phba->hbalock);
4157 return;
4158 }
4f2e66c6 4159 /* Indicate the I/O queues are flushed */
c00f62e6 4160 phba->hba_flag |= HBA_IOQ_FLUSH;
a8e497d5
JS
4161 spin_unlock_irq(&phba->hbalock);
4162
db55fba8
JS
4163 /* Look on all the FCP Rings for the iotag */
4164 if (phba->sli_rev >= LPFC_SLI_REV4) {
cdb42bec 4165 for (i = 0; i < phba->cfg_hdw_queue; i++) {
c00f62e6 4166 pring = phba->sli4_hba.hdwq[i].io_wq->pring;
db55fba8
JS
4167
4168 spin_lock_irq(&pring->ring_lock);
4169 /* Retrieve everything on txq */
4170 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4171 list_for_each_entry_safe(piocb, next_iocb,
4172 &pring->txcmplq, list)
4173 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4174 /* Retrieve everything on the txcmplq */
4175 list_splice_init(&pring->txcmplq, &txcmplq);
4176 pring->txq_cnt = 0;
4177 pring->txcmplq_cnt = 0;
4178 spin_unlock_irq(&pring->ring_lock);
4179
4180 /* Flush the txq */
4181 lpfc_sli_cancel_iocbs(phba, &txq,
4182 IOSTAT_LOCAL_REJECT,
4183 IOERR_SLI_DOWN);
4184 /* Flush the txcmpq */
4185 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4186 IOSTAT_LOCAL_REJECT,
4187 IOERR_SLI_DOWN);
4188 }
4189 } else {
895427bd 4190 pring = &psli->sli3_ring[LPFC_FCP_RING];
a8e497d5 4191
db55fba8
JS
4192 spin_lock_irq(&phba->hbalock);
4193 /* Retrieve everything on txq */
4194 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4195 list_for_each_entry_safe(piocb, next_iocb,
4196 &pring->txcmplq, list)
4197 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4198 /* Retrieve everything on the txcmplq */
4199 list_splice_init(&pring->txcmplq, &txcmplq);
4200 pring->txq_cnt = 0;
4201 pring->txcmplq_cnt = 0;
4202 spin_unlock_irq(&phba->hbalock);
4203
4204 /* Flush the txq */
4205 lpfc_sli_cancel_iocbs(phba, &txq, IOSTAT_LOCAL_REJECT,
4206 IOERR_SLI_DOWN);
4207 /* Flush the txcmpq */
4208 lpfc_sli_cancel_iocbs(phba, &txcmplq, IOSTAT_LOCAL_REJECT,
4209 IOERR_SLI_DOWN);
4210 }
a8e497d5
JS
4211}
4212
e59058c4 4213/**
3772a991 4214 * lpfc_sli_brdready_s3 - Check for sli3 host ready status
e59058c4
JS
4215 * @phba: Pointer to HBA context object.
4216 * @mask: Bit mask to be checked.
4217 *
4218 * This function reads the host status register and compares
4219 * with the provided bit mask to check if HBA completed
4220 * the restart. This function will wait in a loop for the
4221 * HBA to complete restart. If the HBA does not restart within
4222 * 15 iterations, the function will reset the HBA again. The
4223 * function returns 1 when HBA fail to restart otherwise returns
4224 * zero.
4225 **/
3772a991
JS
4226static int
4227lpfc_sli_brdready_s3(struct lpfc_hba *phba, uint32_t mask)
dea3101e 4228{
41415862
JW
4229 uint32_t status;
4230 int i = 0;
4231 int retval = 0;
dea3101e 4232
41415862 4233 /* Read the HBA Host Status Register */
9940b97b
JS
4234 if (lpfc_readl(phba->HSregaddr, &status))
4235 return 1;
dea3101e 4236
41415862
JW
4237 /*
4238 * Check status register every 100ms for 5 retries, then every
4239 * 500ms for 5, then every 2.5 sec for 5, then reset board and
4240 * every 2.5 sec for 4.
4241 * Break our of the loop if errors occurred during init.
4242 */
4243 while (((status & mask) != mask) &&
4244 !(status & HS_FFERM) &&
4245 i++ < 20) {
dea3101e 4246
41415862
JW
4247 if (i <= 5)
4248 msleep(10);
4249 else if (i <= 10)
4250 msleep(500);
4251 else
4252 msleep(2500);
dea3101e 4253
41415862 4254 if (i == 15) {
2e0fef85 4255 /* Do post */
92d7f7b0 4256 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW
4257 lpfc_sli_brdrestart(phba);
4258 }
4259 /* Read the HBA Host Status Register */
9940b97b
JS
4260 if (lpfc_readl(phba->HSregaddr, &status)) {
4261 retval = 1;
4262 break;
4263 }
41415862 4264 }
dea3101e 4265
41415862
JW
4266 /* Check to see if any errors occurred during init */
4267 if ((status & HS_FFERM) || (i >= 20)) {
e40a02c1
JS
4268 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4269 "2751 Adapter failed to restart, "
4270 "status reg x%x, FW Data: A8 x%x AC x%x\n",
4271 status,
4272 readl(phba->MBslimaddr + 0xa8),
4273 readl(phba->MBslimaddr + 0xac));
2e0fef85 4274 phba->link_state = LPFC_HBA_ERROR;
41415862 4275 retval = 1;
dea3101e 4276 }
dea3101e 4277
41415862
JW
4278 return retval;
4279}
dea3101e 4280
da0436e9
JS
4281/**
4282 * lpfc_sli_brdready_s4 - Check for sli4 host ready status
4283 * @phba: Pointer to HBA context object.
4284 * @mask: Bit mask to be checked.
4285 *
4286 * This function checks the host status register to check if HBA is
4287 * ready. This function will wait in a loop for the HBA to be ready
4288 * If the HBA is not ready , the function will will reset the HBA PCI
4289 * function again. The function returns 1 when HBA fail to be ready
4290 * otherwise returns zero.
4291 **/
4292static int
4293lpfc_sli_brdready_s4(struct lpfc_hba *phba, uint32_t mask)
4294{
4295 uint32_t status;
4296 int retval = 0;
4297
4298 /* Read the HBA Host Status Register */
4299 status = lpfc_sli4_post_status_check(phba);
4300
4301 if (status) {
4302 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
4303 lpfc_sli_brdrestart(phba);
4304 status = lpfc_sli4_post_status_check(phba);
4305 }
4306
4307 /* Check to see if any errors occurred during init */
4308 if (status) {
4309 phba->link_state = LPFC_HBA_ERROR;
4310 retval = 1;
4311 } else
4312 phba->sli4_hba.intr_enable = 0;
4313
4314 return retval;
4315}
4316
4317/**
4318 * lpfc_sli_brdready - Wrapper func for checking the hba readyness
4319 * @phba: Pointer to HBA context object.
4320 * @mask: Bit mask to be checked.
4321 *
4322 * This routine wraps the actual SLI3 or SLI4 hba readyness check routine
4323 * from the API jump table function pointer from the lpfc_hba struct.
4324 **/
4325int
4326lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
4327{
4328 return phba->lpfc_sli_brdready(phba, mask);
4329}
4330
9290831f
JS
4331#define BARRIER_TEST_PATTERN (0xdeadbeef)
4332
e59058c4 4333/**
3621a710 4334 * lpfc_reset_barrier - Make HBA ready for HBA reset
e59058c4
JS
4335 * @phba: Pointer to HBA context object.
4336 *
1b51197d
JS
4337 * This function is called before resetting an HBA. This function is called
4338 * with hbalock held and requests HBA to quiesce DMAs before a reset.
e59058c4 4339 **/
2e0fef85 4340void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 4341{
65a29c16
JS
4342 uint32_t __iomem *resp_buf;
4343 uint32_t __iomem *mbox_buf;
9290831f 4344 volatile uint32_t mbox;
9940b97b 4345 uint32_t hc_copy, ha_copy, resp_data;
9290831f
JS
4346 int i;
4347 uint8_t hdrtype;
4348
1c2ba475
JT
4349 lockdep_assert_held(&phba->hbalock);
4350
9290831f
JS
4351 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
4352 if (hdrtype != 0x80 ||
4353 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
4354 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
4355 return;
4356
4357 /*
4358 * Tell the other part of the chip to suspend temporarily all
4359 * its DMA activity.
4360 */
65a29c16 4361 resp_buf = phba->MBslimaddr;
9290831f
JS
4362
4363 /* Disable the error attention */
9940b97b
JS
4364 if (lpfc_readl(phba->HCregaddr, &hc_copy))
4365 return;
9290831f
JS
4366 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
4367 readl(phba->HCregaddr); /* flush */
2e0fef85 4368 phba->link_flag |= LS_IGNORE_ERATT;
9290831f 4369
9940b97b
JS
4370 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4371 return;
4372 if (ha_copy & HA_ERATT) {
9290831f
JS
4373 /* Clear Chip error bit */
4374 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4375 phba->pport->stopped = 1;
9290831f
JS
4376 }
4377
4378 mbox = 0;
4379 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
4380 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
4381
4382 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 4383 mbox_buf = phba->MBslimaddr;
9290831f
JS
4384 writel(mbox, mbox_buf);
4385
9940b97b
JS
4386 for (i = 0; i < 50; i++) {
4387 if (lpfc_readl((resp_buf + 1), &resp_data))
4388 return;
4389 if (resp_data != ~(BARRIER_TEST_PATTERN))
4390 mdelay(1);
4391 else
4392 break;
4393 }
4394 resp_data = 0;
4395 if (lpfc_readl((resp_buf + 1), &resp_data))
4396 return;
4397 if (resp_data != ~(BARRIER_TEST_PATTERN)) {
f4b4c68f 4398 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE ||
2e0fef85 4399 phba->pport->stopped)
9290831f
JS
4400 goto restore_hc;
4401 else
4402 goto clear_errat;
4403 }
4404
4405 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
9940b97b
JS
4406 resp_data = 0;
4407 for (i = 0; i < 500; i++) {
4408 if (lpfc_readl(resp_buf, &resp_data))
4409 return;
4410 if (resp_data != mbox)
4411 mdelay(1);
4412 else
4413 break;
4414 }
9290831f
JS
4415
4416clear_errat:
4417
9940b97b
JS
4418 while (++i < 500) {
4419 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4420 return;
4421 if (!(ha_copy & HA_ERATT))
4422 mdelay(1);
4423 else
4424 break;
4425 }
9290831f
JS
4426
4427 if (readl(phba->HAregaddr) & HA_ERATT) {
4428 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4429 phba->pport->stopped = 1;
9290831f
JS
4430 }
4431
4432restore_hc:
2e0fef85 4433 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS
4434 writel(hc_copy, phba->HCregaddr);
4435 readl(phba->HCregaddr); /* flush */
4436}
4437
e59058c4 4438/**
3621a710 4439 * lpfc_sli_brdkill - Issue a kill_board mailbox command
e59058c4
JS
4440 * @phba: Pointer to HBA context object.
4441 *
4442 * This function issues a kill_board mailbox command and waits for
4443 * the error attention interrupt. This function is called for stopping
4444 * the firmware processing. The caller is not required to hold any
4445 * locks. This function calls lpfc_hba_down_post function to free
4446 * any pending commands after the kill. The function will return 1 when it
4447 * fails to kill the board else will return 0.
4448 **/
41415862 4449int
2e0fef85 4450lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW
4451{
4452 struct lpfc_sli *psli;
4453 LPFC_MBOXQ_t *pmb;
4454 uint32_t status;
4455 uint32_t ha_copy;
4456 int retval;
4457 int i = 0;
dea3101e 4458
41415862 4459 psli = &phba->sli;
dea3101e 4460
41415862 4461 /* Kill HBA */
ed957684 4462 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS
4463 "0329 Kill HBA Data: x%x x%x\n",
4464 phba->pport->port_state, psli->sli_flag);
41415862 4465
98c9ea5c
JS
4466 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4467 if (!pmb)
41415862 4468 return 1;
41415862
JW
4469
4470 /* Disable the error attention */
2e0fef85 4471 spin_lock_irq(&phba->hbalock);
9940b97b
JS
4472 if (lpfc_readl(phba->HCregaddr, &status)) {
4473 spin_unlock_irq(&phba->hbalock);
4474 mempool_free(pmb, phba->mbox_mem_pool);
4475 return 1;
4476 }
41415862
JW
4477 status &= ~HC_ERINT_ENA;
4478 writel(status, phba->HCregaddr);
4479 readl(phba->HCregaddr); /* flush */
2e0fef85
JS
4480 phba->link_flag |= LS_IGNORE_ERATT;
4481 spin_unlock_irq(&phba->hbalock);
41415862
JW
4482
4483 lpfc_kill_board(phba, pmb);
4484 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
4485 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4486
4487 if (retval != MBX_SUCCESS) {
4488 if (retval != MBX_BUSY)
4489 mempool_free(pmb, phba->mbox_mem_pool);
e40a02c1
JS
4490 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4491 "2752 KILL_BOARD command failed retval %d\n",
4492 retval);
2e0fef85
JS
4493 spin_lock_irq(&phba->hbalock);
4494 phba->link_flag &= ~LS_IGNORE_ERATT;
4495 spin_unlock_irq(&phba->hbalock);
41415862
JW
4496 return 1;
4497 }
4498
f4b4c68f
JS
4499 spin_lock_irq(&phba->hbalock);
4500 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
4501 spin_unlock_irq(&phba->hbalock);
9290831f 4502
41415862
JW
4503 mempool_free(pmb, phba->mbox_mem_pool);
4504
4505 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
4506 * attention every 100ms for 3 seconds. If we don't get ERATT after
4507 * 3 seconds we still set HBA_ERROR state because the status of the
4508 * board is now undefined.
4509 */
9940b97b
JS
4510 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4511 return 1;
41415862
JW
4512 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
4513 mdelay(100);
9940b97b
JS
4514 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4515 return 1;
41415862
JW
4516 }
4517
4518 del_timer_sync(&psli->mbox_tmo);
9290831f
JS
4519 if (ha_copy & HA_ERATT) {
4520 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4521 phba->pport->stopped = 1;
9290831f 4522 }
2e0fef85 4523 spin_lock_irq(&phba->hbalock);
41415862 4524 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
04c68496 4525 psli->mbox_active = NULL;
2e0fef85
JS
4526 phba->link_flag &= ~LS_IGNORE_ERATT;
4527 spin_unlock_irq(&phba->hbalock);
41415862 4528
41415862 4529 lpfc_hba_down_post(phba);
2e0fef85 4530 phba->link_state = LPFC_HBA_ERROR;
41415862 4531
2e0fef85 4532 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e
JB
4533}
4534
e59058c4 4535/**
3772a991 4536 * lpfc_sli_brdreset - Reset a sli-2 or sli-3 HBA
e59058c4
JS
4537 * @phba: Pointer to HBA context object.
4538 *
4539 * This function resets the HBA by writing HC_INITFF to the control
4540 * register. After the HBA resets, this function resets all the iocb ring
4541 * indices. This function disables PCI layer parity checking during
4542 * the reset.
4543 * This function returns 0 always.
4544 * The caller is not required to hold any locks.
4545 **/
41415862 4546int
2e0fef85 4547lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 4548{
41415862 4549 struct lpfc_sli *psli;
dea3101e 4550 struct lpfc_sli_ring *pring;
41415862 4551 uint16_t cfg_value;
dea3101e 4552 int i;
dea3101e 4553
41415862 4554 psli = &phba->sli;
dea3101e 4555
41415862
JW
4556 /* Reset HBA */
4557 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4558 "0325 Reset HBA Data: x%x x%x\n",
4492b739
JS
4559 (phba->pport) ? phba->pport->port_state : 0,
4560 psli->sli_flag);
dea3101e
JB
4561
4562 /* perform board reset */
4563 phba->fc_eventTag = 0;
4d9ab994 4564 phba->link_events = 0;
4492b739
JS
4565 if (phba->pport) {
4566 phba->pport->fc_myDID = 0;
4567 phba->pport->fc_prevDID = 0;
4568 }
dea3101e 4569
41415862 4570 /* Turn off parity checking and serr during the physical reset */
32a93100
JS
4571 if (pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value))
4572 return -EIO;
4573
41415862
JW
4574 pci_write_config_word(phba->pcidev, PCI_COMMAND,
4575 (cfg_value &
4576 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4577
3772a991
JS
4578 psli->sli_flag &= ~(LPFC_SLI_ACTIVE | LPFC_PROCESS_LA);
4579
41415862
JW
4580 /* Now toggle INITFF bit in the Host Control Register */
4581 writel(HC_INITFF, phba->HCregaddr);
4582 mdelay(1);
4583 readl(phba->HCregaddr); /* flush */
4584 writel(0, phba->HCregaddr);
4585 readl(phba->HCregaddr); /* flush */
4586
4587 /* Restore PCI cmd register */
4588 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e
JB
4589
4590 /* Initialize relevant SLI info */
41415862 4591 for (i = 0; i < psli->num_rings; i++) {
895427bd 4592 pring = &psli->sli3_ring[i];
dea3101e 4593 pring->flag = 0;
7e56aa25
JS
4594 pring->sli.sli3.rspidx = 0;
4595 pring->sli.sli3.next_cmdidx = 0;
4596 pring->sli.sli3.local_getidx = 0;
4597 pring->sli.sli3.cmdidx = 0;
dea3101e
JB
4598 pring->missbufcnt = 0;
4599 }
dea3101e 4600
2e0fef85 4601 phba->link_state = LPFC_WARM_START;
41415862
JW
4602 return 0;
4603}
4604
e59058c4 4605/**
da0436e9
JS
4606 * lpfc_sli4_brdreset - Reset a sli-4 HBA
4607 * @phba: Pointer to HBA context object.
4608 *
4609 * This function resets a SLI4 HBA. This function disables PCI layer parity
4610 * checking during resets the device. The caller is not required to hold
4611 * any locks.
4612 *
8c24a4f6 4613 * This function returns 0 on success else returns negative error code.
da0436e9
JS
4614 **/
4615int
4616lpfc_sli4_brdreset(struct lpfc_hba *phba)
4617{
4618 struct lpfc_sli *psli = &phba->sli;
4619 uint16_t cfg_value;
0293635e 4620 int rc = 0;
da0436e9
JS
4621
4622 /* Reset HBA */
4623 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
0293635e
JS
4624 "0295 Reset HBA Data: x%x x%x x%x\n",
4625 phba->pport->port_state, psli->sli_flag,
4626 phba->hba_flag);
da0436e9
JS
4627
4628 /* perform board reset */
4629 phba->fc_eventTag = 0;
4d9ab994 4630 phba->link_events = 0;
da0436e9
JS
4631 phba->pport->fc_myDID = 0;
4632 phba->pport->fc_prevDID = 0;
4633
da0436e9
JS
4634 spin_lock_irq(&phba->hbalock);
4635 psli->sli_flag &= ~(LPFC_PROCESS_LA);
4636 phba->fcf.fcf_flag = 0;
da0436e9
JS
4637 spin_unlock_irq(&phba->hbalock);
4638
0293635e
JS
4639 /* SLI4 INTF 2: if FW dump is being taken skip INIT_PORT */
4640 if (phba->hba_flag & HBA_FW_DUMP_OP) {
4641 phba->hba_flag &= ~HBA_FW_DUMP_OP;
4642 return rc;
4643 }
4644
da0436e9
JS
4645 /* Now physically reset the device */
4646 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4647 "0389 Performing PCI function reset!\n");
be858b65
JS
4648
4649 /* Turn off parity checking and serr during the physical reset */
32a93100
JS
4650 if (pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value)) {
4651 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4652 "3205 PCI read Config failed\n");
4653 return -EIO;
4654 }
4655
be858b65
JS
4656 pci_write_config_word(phba->pcidev, PCI_COMMAND, (cfg_value &
4657 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4658
88318816 4659 /* Perform FCoE PCI function reset before freeing queue memory */
27b01b82 4660 rc = lpfc_pci_function_reset(phba);
da0436e9 4661
be858b65
JS
4662 /* Restore PCI cmd register */
4663 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
4664
27b01b82 4665 return rc;
da0436e9
JS
4666}
4667
4668/**
4669 * lpfc_sli_brdrestart_s3 - Restart a sli-3 hba
e59058c4
JS
4670 * @phba: Pointer to HBA context object.
4671 *
4672 * This function is called in the SLI initialization code path to
4673 * restart the HBA. The caller is not required to hold any lock.
4674 * This function writes MBX_RESTART mailbox command to the SLIM and
4675 * resets the HBA. At the end of the function, it calls lpfc_hba_down_post
4676 * function to free any pending commands. The function enables
4677 * POST only during the first initialization. The function returns zero.
4678 * The function does not guarantee completion of MBX_RESTART mailbox
4679 * command before the return of this function.
4680 **/
da0436e9
JS
4681static int
4682lpfc_sli_brdrestart_s3(struct lpfc_hba *phba)
41415862
JW
4683{
4684 MAILBOX_t *mb;
4685 struct lpfc_sli *psli;
41415862
JW
4686 volatile uint32_t word0;
4687 void __iomem *to_slim;
0d878419 4688 uint32_t hba_aer_enabled;
41415862 4689
2e0fef85 4690 spin_lock_irq(&phba->hbalock);
41415862 4691
0d878419
JS
4692 /* Take PCIe device Advanced Error Reporting (AER) state */
4693 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4694
41415862
JW
4695 psli = &phba->sli;
4696
4697 /* Restart HBA */
4698 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4699 "0337 Restart HBA Data: x%x x%x\n",
4492b739
JS
4700 (phba->pport) ? phba->pport->port_state : 0,
4701 psli->sli_flag);
41415862
JW
4702
4703 word0 = 0;
4704 mb = (MAILBOX_t *) &word0;
4705 mb->mbxCommand = MBX_RESTART;
4706 mb->mbxHc = 1;
4707
9290831f
JS
4708 lpfc_reset_barrier(phba);
4709
41415862
JW
4710 to_slim = phba->MBslimaddr;
4711 writel(*(uint32_t *) mb, to_slim);
4712 readl(to_slim); /* flush */
4713
4714 /* Only skip post after fc_ffinit is completed */
4492b739 4715 if (phba->pport && phba->pport->port_state)
41415862 4716 word0 = 1; /* This is really setting up word1 */
eaf15d5b 4717 else
41415862 4718 word0 = 0; /* This is really setting up word1 */
65a29c16 4719 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW
4720 writel(*(uint32_t *) mb, to_slim);
4721 readl(to_slim); /* flush */
dea3101e 4722
41415862 4723 lpfc_sli_brdreset(phba);
4492b739
JS
4724 if (phba->pport)
4725 phba->pport->stopped = 0;
2e0fef85 4726 phba->link_state = LPFC_INIT_START;
da0436e9 4727 phba->hba_flag = 0;
2e0fef85 4728 spin_unlock_irq(&phba->hbalock);
41415862 4729
64ba8818 4730 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4731 psli->stats_start = ktime_get_seconds();
64ba8818 4732
eaf15d5b
JS
4733 /* Give the INITFF and Post time to settle. */
4734 mdelay(100);
41415862 4735
0d878419
JS
4736 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4737 if (hba_aer_enabled)
4738 pci_disable_pcie_error_reporting(phba->pcidev);
4739
41415862 4740 lpfc_hba_down_post(phba);
dea3101e
JB
4741
4742 return 0;
4743}
4744
da0436e9
JS
4745/**
4746 * lpfc_sli_brdrestart_s4 - Restart the sli-4 hba
4747 * @phba: Pointer to HBA context object.
4748 *
4749 * This function is called in the SLI initialization code path to restart
4750 * a SLI4 HBA. The caller is not required to hold any lock.
4751 * At the end of the function, it calls lpfc_hba_down_post function to
4752 * free any pending commands.
4753 **/
4754static int
4755lpfc_sli_brdrestart_s4(struct lpfc_hba *phba)
4756{
4757 struct lpfc_sli *psli = &phba->sli;
75baf696 4758 uint32_t hba_aer_enabled;
27b01b82 4759 int rc;
da0436e9
JS
4760
4761 /* Restart HBA */
4762 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4763 "0296 Restart HBA Data: x%x x%x\n",
4764 phba->pport->port_state, psli->sli_flag);
4765
75baf696
JS
4766 /* Take PCIe device Advanced Error Reporting (AER) state */
4767 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4768
27b01b82 4769 rc = lpfc_sli4_brdreset(phba);
4fb86a6b
JS
4770 if (rc) {
4771 phba->link_state = LPFC_HBA_ERROR;
4772 goto hba_down_queue;
4773 }
da0436e9
JS
4774
4775 spin_lock_irq(&phba->hbalock);
4776 phba->pport->stopped = 0;
4777 phba->link_state = LPFC_INIT_START;
4778 phba->hba_flag = 0;
4779 spin_unlock_irq(&phba->hbalock);
4780
4781 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4782 psli->stats_start = ktime_get_seconds();
da0436e9 4783
75baf696
JS
4784 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4785 if (hba_aer_enabled)
4786 pci_disable_pcie_error_reporting(phba->pcidev);
4787
4fb86a6b 4788hba_down_queue:
da0436e9 4789 lpfc_hba_down_post(phba);
569dbe84 4790 lpfc_sli4_queue_destroy(phba);
da0436e9 4791
27b01b82 4792 return rc;
da0436e9
JS
4793}
4794
4795/**
4796 * lpfc_sli_brdrestart - Wrapper func for restarting hba
4797 * @phba: Pointer to HBA context object.
4798 *
4799 * This routine wraps the actual SLI3 or SLI4 hba restart routine from the
4800 * API jump table function pointer from the lpfc_hba struct.
4801**/
4802int
4803lpfc_sli_brdrestart(struct lpfc_hba *phba)
4804{
4805 return phba->lpfc_sli_brdrestart(phba);
4806}
4807
e59058c4 4808/**
3621a710 4809 * lpfc_sli_chipset_init - Wait for the restart of the HBA after a restart
e59058c4
JS
4810 * @phba: Pointer to HBA context object.
4811 *
4812 * This function is called after a HBA restart to wait for successful
4813 * restart of the HBA. Successful restart of the HBA is indicated by
4814 * HS_FFRDY and HS_MBRDY bits. If the HBA fails to restart even after 15
4815 * iteration, the function will restart the HBA again. The function returns
4816 * zero if HBA successfully restarted else returns negative error code.
4817 **/
4492b739 4818int
dea3101e
JB
4819lpfc_sli_chipset_init(struct lpfc_hba *phba)
4820{
4821 uint32_t status, i = 0;
4822
4823 /* Read the HBA Host Status Register */
9940b97b
JS
4824 if (lpfc_readl(phba->HSregaddr, &status))
4825 return -EIO;
dea3101e
JB
4826
4827 /* Check status register to see what current state is */
4828 i = 0;
4829 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
4830
dcf2a4e0
JS
4831 /* Check every 10ms for 10 retries, then every 100ms for 90
4832 * retries, then every 1 sec for 50 retires for a total of
4833 * ~60 seconds before reset the board again and check every
4834 * 1 sec for 50 retries. The up to 60 seconds before the
4835 * board ready is required by the Falcon FIPS zeroization
4836 * complete, and any reset the board in between shall cause
4837 * restart of zeroization, further delay the board ready.
dea3101e 4838 */
dcf2a4e0 4839 if (i++ >= 200) {
dea3101e
JB
4840 /* Adapter failed to init, timeout, status reg
4841 <status> */
ed957684 4842 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4843 "0436 Adapter failed to init, "
09372820
JS
4844 "timeout, status reg x%x, "
4845 "FW Data: A8 x%x AC x%x\n", status,
4846 readl(phba->MBslimaddr + 0xa8),
4847 readl(phba->MBslimaddr + 0xac));
2e0fef85 4848 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4849 return -ETIMEDOUT;
4850 }
4851
4852 /* Check to see if any errors occurred during init */
4853 if (status & HS_FFERM) {
4854 /* ERROR: During chipset initialization */
4855 /* Adapter failed to init, chipset, status reg
4856 <status> */
ed957684 4857 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4858 "0437 Adapter failed to init, "
09372820
JS
4859 "chipset, status reg x%x, "
4860 "FW Data: A8 x%x AC x%x\n", status,
4861 readl(phba->MBslimaddr + 0xa8),
4862 readl(phba->MBslimaddr + 0xac));
2e0fef85 4863 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4864 return -EIO;
4865 }
4866
dcf2a4e0 4867 if (i <= 10)
dea3101e 4868 msleep(10);
dcf2a4e0
JS
4869 else if (i <= 100)
4870 msleep(100);
4871 else
4872 msleep(1000);
dea3101e 4873
dcf2a4e0
JS
4874 if (i == 150) {
4875 /* Do post */
92d7f7b0 4876 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4877 lpfc_sli_brdrestart(phba);
dea3101e
JB
4878 }
4879 /* Read the HBA Host Status Register */
9940b97b
JS
4880 if (lpfc_readl(phba->HSregaddr, &status))
4881 return -EIO;
dea3101e
JB
4882 }
4883
4884 /* Check to see if any errors occurred during init */
4885 if (status & HS_FFERM) {
4886 /* ERROR: During chipset initialization */
4887 /* Adapter failed to init, chipset, status reg <status> */
ed957684 4888 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4889 "0438 Adapter failed to init, chipset, "
09372820
JS
4890 "status reg x%x, "
4891 "FW Data: A8 x%x AC x%x\n", status,
4892 readl(phba->MBslimaddr + 0xa8),
4893 readl(phba->MBslimaddr + 0xac));
2e0fef85 4894 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
4895 return -EIO;
4896 }
4897
4898 /* Clear all interrupt enable conditions */
4899 writel(0, phba->HCregaddr);
4900 readl(phba->HCregaddr); /* flush */
4901
4902 /* setup host attn register */
4903 writel(0xffffffff, phba->HAregaddr);
4904 readl(phba->HAregaddr); /* flush */
4905 return 0;
4906}
4907
e59058c4 4908/**
3621a710 4909 * lpfc_sli_hbq_count - Get the number of HBQs to be configured
e59058c4
JS
4910 *
4911 * This function calculates and returns the number of HBQs required to be
4912 * configured.
4913 **/
78b2d852 4914int
ed957684
JS
4915lpfc_sli_hbq_count(void)
4916{
92d7f7b0 4917 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS
4918}
4919
e59058c4 4920/**
3621a710 4921 * lpfc_sli_hbq_entry_count - Calculate total number of hbq entries
e59058c4
JS
4922 *
4923 * This function adds the number of hbq entries in every HBQ to get
4924 * the total number of hbq entries required for the HBA and returns
4925 * the total count.
4926 **/
ed957684
JS
4927static int
4928lpfc_sli_hbq_entry_count(void)
4929{
4930 int hbq_count = lpfc_sli_hbq_count();
4931 int count = 0;
4932 int i;
4933
4934 for (i = 0; i < hbq_count; ++i)
92d7f7b0 4935 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS
4936 return count;
4937}
4938
e59058c4 4939/**
3621a710 4940 * lpfc_sli_hbq_size - Calculate memory required for all hbq entries
e59058c4
JS
4941 *
4942 * This function calculates amount of memory required for all hbq entries
4943 * to be configured and returns the total memory required.
4944 **/
dea3101e 4945int
ed957684
JS
4946lpfc_sli_hbq_size(void)
4947{
4948 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
4949}
4950
e59058c4 4951/**
3621a710 4952 * lpfc_sli_hbq_setup - configure and initialize HBQs
e59058c4
JS
4953 * @phba: Pointer to HBA context object.
4954 *
4955 * This function is called during the SLI initialization to configure
4956 * all the HBQs and post buffers to the HBQ. The caller is not
4957 * required to hold any locks. This function will return zero if successful
4958 * else it will return negative error code.
4959 **/
ed957684
JS
4960static int
4961lpfc_sli_hbq_setup(struct lpfc_hba *phba)
4962{
4963 int hbq_count = lpfc_sli_hbq_count();
4964 LPFC_MBOXQ_t *pmb;
4965 MAILBOX_t *pmbox;
4966 uint32_t hbqno;
4967 uint32_t hbq_entry_index;
ed957684 4968
92d7f7b0
JS
4969 /* Get a Mailbox buffer to setup mailbox
4970 * commands for HBA initialization
4971 */
ed957684
JS
4972 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4973
4974 if (!pmb)
4975 return -ENOMEM;
4976
04c68496 4977 pmbox = &pmb->u.mb;
ed957684
JS
4978
4979 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
4980 phba->link_state = LPFC_INIT_MBX_CMDS;
3163f725 4981 phba->hbq_in_use = 1;
ed957684
JS
4982
4983 hbq_entry_index = 0;
4984 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
4985 phba->hbqs[hbqno].next_hbqPutIdx = 0;
4986 phba->hbqs[hbqno].hbqPutIdx = 0;
4987 phba->hbqs[hbqno].local_hbqGetIdx = 0;
4988 phba->hbqs[hbqno].entry_count =
92d7f7b0 4989 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS
4990 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
4991 hbq_entry_index, pmb);
ed957684
JS
4992 hbq_entry_index += phba->hbqs[hbqno].entry_count;
4993
4994 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
4995 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
4996 mbxStatus <status>, ring <num> */
4997
4998 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 4999 LOG_SLI | LOG_VPORT,
e8b62011 5000 "1805 Adapter failed to init. "
ed957684 5001 "Data: x%x x%x x%x\n",
e8b62011 5002 pmbox->mbxCommand,
ed957684
JS
5003 pmbox->mbxStatus, hbqno);
5004
5005 phba->link_state = LPFC_HBA_ERROR;
5006 mempool_free(pmb, phba->mbox_mem_pool);
6e7288d9 5007 return -ENXIO;
ed957684
JS
5008 }
5009 }
5010 phba->hbq_count = hbq_count;
5011
ed957684
JS
5012 mempool_free(pmb, phba->mbox_mem_pool);
5013
92d7f7b0 5014 /* Initially populate or replenish the HBQs */
d7c255b2
JS
5015 for (hbqno = 0; hbqno < hbq_count; ++hbqno)
5016 lpfc_sli_hbqbuf_init_hbqs(phba, hbqno);
ed957684
JS
5017 return 0;
5018}
5019
4f774513
JS
5020/**
5021 * lpfc_sli4_rb_setup - Initialize and post RBs to HBA
5022 * @phba: Pointer to HBA context object.
5023 *
5024 * This function is called during the SLI initialization to configure
5025 * all the HBQs and post buffers to the HBQ. The caller is not
5026 * required to hold any locks. This function will return zero if successful
5027 * else it will return negative error code.
5028 **/
5029static int
5030lpfc_sli4_rb_setup(struct lpfc_hba *phba)
5031{
5032 phba->hbq_in_use = 1;
999fbbce
JS
5033 /**
5034 * Specific case when the MDS diagnostics is enabled and supported.
5035 * The receive buffer count is truncated to manage the incoming
5036 * traffic.
5037 **/
5038 if (phba->cfg_enable_mds_diags && phba->mds_diags_support)
5039 phba->hbqs[LPFC_ELS_HBQ].entry_count =
5040 lpfc_hbq_defs[LPFC_ELS_HBQ]->entry_count >> 1;
5041 else
5042 phba->hbqs[LPFC_ELS_HBQ].entry_count =
5043 lpfc_hbq_defs[LPFC_ELS_HBQ]->entry_count;
4f774513 5044 phba->hbq_count = 1;
895427bd 5045 lpfc_sli_hbqbuf_init_hbqs(phba, LPFC_ELS_HBQ);
4f774513 5046 /* Initially populate or replenish the HBQs */
4f774513
JS
5047 return 0;
5048}
5049
e59058c4 5050/**
3621a710 5051 * lpfc_sli_config_port - Issue config port mailbox command
e59058c4
JS
5052 * @phba: Pointer to HBA context object.
5053 * @sli_mode: sli mode - 2/3
5054 *
183b8021 5055 * This function is called by the sli initialization code path
e59058c4
JS
5056 * to issue config_port mailbox command. This function restarts the
5057 * HBA firmware and issues a config_port mailbox command to configure
5058 * the SLI interface in the sli mode specified by sli_mode
5059 * variable. The caller is not required to hold any locks.
5060 * The function returns 0 if successful, else returns negative error
5061 * code.
5062 **/
9399627f
JS
5063int
5064lpfc_sli_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e
JB
5065{
5066 LPFC_MBOXQ_t *pmb;
5067 uint32_t resetcount = 0, rc = 0, done = 0;
5068
5069 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5070 if (!pmb) {
2e0fef85 5071 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
5072 return -ENOMEM;
5073 }
5074
ed957684 5075 phba->sli_rev = sli_mode;
dea3101e 5076 while (resetcount < 2 && !done) {
2e0fef85 5077 spin_lock_irq(&phba->hbalock);
1c067a42 5078 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 5079 spin_unlock_irq(&phba->hbalock);
92d7f7b0 5080 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 5081 lpfc_sli_brdrestart(phba);
dea3101e
JB
5082 rc = lpfc_sli_chipset_init(phba);
5083 if (rc)
5084 break;
5085
2e0fef85 5086 spin_lock_irq(&phba->hbalock);
1c067a42 5087 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 5088 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
5089 resetcount++;
5090
ed957684
JS
5091 /* Call pre CONFIG_PORT mailbox command initialization. A
5092 * value of 0 means the call was successful. Any other
5093 * nonzero value is a failure, but if ERESTART is returned,
5094 * the driver may reset the HBA and try again.
5095 */
dea3101e
JB
5096 rc = lpfc_config_port_prep(phba);
5097 if (rc == -ERESTART) {
ed957684 5098 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e 5099 continue;
34b02dcd 5100 } else if (rc)
dea3101e 5101 break;
6d368e53 5102
2e0fef85 5103 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
5104 lpfc_config_port(phba, pmb);
5105 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
34b02dcd
JS
5106 phba->sli3_options &= ~(LPFC_SLI3_NPIV_ENABLED |
5107 LPFC_SLI3_HBQ_ENABLED |
5108 LPFC_SLI3_CRP_ENABLED |
bc73905a 5109 LPFC_SLI3_DSS_ENABLED);
ed957684 5110 if (rc != MBX_SUCCESS) {
dea3101e 5111 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 5112 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 5113 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
04c68496 5114 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus, 0);
2e0fef85 5115 spin_lock_irq(&phba->hbalock);
04c68496 5116 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
2e0fef85
JS
5117 spin_unlock_irq(&phba->hbalock);
5118 rc = -ENXIO;
04c68496
JS
5119 } else {
5120 /* Allow asynchronous mailbox command to go through */
5121 spin_lock_irq(&phba->hbalock);
5122 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
5123 spin_unlock_irq(&phba->hbalock);
ed957684 5124 done = 1;
cb69f7de
JS
5125
5126 if ((pmb->u.mb.un.varCfgPort.casabt == 1) &&
5127 (pmb->u.mb.un.varCfgPort.gasabt == 0))
5128 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5129 "3110 Port did not grant ASABT\n");
04c68496 5130 }
dea3101e 5131 }
ed957684
JS
5132 if (!done) {
5133 rc = -EINVAL;
5134 goto do_prep_failed;
5135 }
04c68496
JS
5136 if (pmb->u.mb.un.varCfgPort.sli_mode == 3) {
5137 if (!pmb->u.mb.un.varCfgPort.cMA) {
34b02dcd
JS
5138 rc = -ENXIO;
5139 goto do_prep_failed;
5140 }
04c68496 5141 if (phba->max_vpi && pmb->u.mb.un.varCfgPort.gmv) {
34b02dcd 5142 phba->sli3_options |= LPFC_SLI3_NPIV_ENABLED;
04c68496
JS
5143 phba->max_vpi = pmb->u.mb.un.varCfgPort.max_vpi;
5144 phba->max_vports = (phba->max_vpi > phba->max_vports) ?
5145 phba->max_vpi : phba->max_vports;
5146
34b02dcd
JS
5147 } else
5148 phba->max_vpi = 0;
04c68496 5149 if (pmb->u.mb.un.varCfgPort.gerbm)
34b02dcd 5150 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
04c68496 5151 if (pmb->u.mb.un.varCfgPort.gcrp)
34b02dcd 5152 phba->sli3_options |= LPFC_SLI3_CRP_ENABLED;
6e7288d9
JS
5153
5154 phba->hbq_get = phba->mbox->us.s3_pgp.hbq_get;
5155 phba->port_gp = phba->mbox->us.s3_pgp.port;
e2a0a9d6 5156
f44ac12f
JS
5157 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
5158 if (pmb->u.mb.un.varCfgPort.gbg == 0) {
5159 phba->cfg_enable_bg = 0;
5160 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
e2a0a9d6
JS
5161 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5162 "0443 Adapter did not grant "
5163 "BlockGuard\n");
f44ac12f 5164 }
e2a0a9d6 5165 }
34b02dcd 5166 } else {
8f34f4ce 5167 phba->hbq_get = NULL;
34b02dcd 5168 phba->port_gp = phba->mbox->us.s2.port;
d7c255b2 5169 phba->max_vpi = 0;
ed957684 5170 }
92d7f7b0 5171do_prep_failed:
ed957684
JS
5172 mempool_free(pmb, phba->mbox_mem_pool);
5173 return rc;
5174}
5175
e59058c4
JS
5176
5177/**
183b8021 5178 * lpfc_sli_hba_setup - SLI initialization function
e59058c4
JS
5179 * @phba: Pointer to HBA context object.
5180 *
183b8021
MY
5181 * This function is the main SLI initialization function. This function
5182 * is called by the HBA initialization code, HBA reset code and HBA
e59058c4
JS
5183 * error attention handler code. Caller is not required to hold any
5184 * locks. This function issues config_port mailbox command to configure
5185 * the SLI, setup iocb rings and HBQ rings. In the end the function
5186 * calls the config_port_post function to issue init_link mailbox
5187 * command and to start the discovery. The function will return zero
5188 * if successful, else it will return negative error code.
5189 **/
ed957684
JS
5190int
5191lpfc_sli_hba_setup(struct lpfc_hba *phba)
5192{
5193 uint32_t rc;
6d368e53
JS
5194 int mode = 3, i;
5195 int longs;
ed957684 5196
12247e81 5197 switch (phba->cfg_sli_mode) {
ed957684 5198 case 2:
78b2d852 5199 if (phba->cfg_enable_npiv) {
92d7f7b0 5200 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81 5201 "1824 NPIV enabled: Override sli_mode "
92d7f7b0 5202 "parameter (%d) to auto (0).\n",
12247e81 5203 phba->cfg_sli_mode);
92d7f7b0
JS
5204 break;
5205 }
ed957684
JS
5206 mode = 2;
5207 break;
5208 case 0:
5209 case 3:
5210 break;
5211 default:
92d7f7b0 5212 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81
JS
5213 "1819 Unrecognized sli_mode parameter: %d.\n",
5214 phba->cfg_sli_mode);
ed957684
JS
5215
5216 break;
5217 }
b5c53958 5218 phba->fcp_embed_io = 0; /* SLI4 FC support only */
ed957684 5219
9399627f
JS
5220 rc = lpfc_sli_config_port(phba, mode);
5221
12247e81 5222 if (rc && phba->cfg_sli_mode == 3)
92d7f7b0 5223 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS
5224 "1820 Unable to select SLI-3. "
5225 "Not supported by adapter.\n");
ed957684 5226 if (rc && mode != 2)
9399627f 5227 rc = lpfc_sli_config_port(phba, 2);
4597663f
JS
5228 else if (rc && mode == 2)
5229 rc = lpfc_sli_config_port(phba, 3);
ed957684 5230 if (rc)
dea3101e
JB
5231 goto lpfc_sli_hba_setup_error;
5232
0d878419
JS
5233 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
5234 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
5235 rc = pci_enable_pcie_error_reporting(phba->pcidev);
5236 if (!rc) {
5237 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5238 "2709 This device supports "
5239 "Advanced Error Reporting (AER)\n");
5240 spin_lock_irq(&phba->hbalock);
5241 phba->hba_flag |= HBA_AER_ENABLED;
5242 spin_unlock_irq(&phba->hbalock);
5243 } else {
5244 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5245 "2708 This device does not support "
b069d7eb
JS
5246 "Advanced Error Reporting (AER): %d\n",
5247 rc);
0d878419
JS
5248 phba->cfg_aer_support = 0;
5249 }
5250 }
5251
ed957684
JS
5252 if (phba->sli_rev == 3) {
5253 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
5254 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
ed957684
JS
5255 } else {
5256 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
5257 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 5258 phba->sli3_options = 0;
ed957684
JS
5259 }
5260
5261 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
5262 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
5263 phba->sli_rev, phba->max_vpi);
ed957684 5264 rc = lpfc_sli_ring_map(phba);
dea3101e
JB
5265
5266 if (rc)
5267 goto lpfc_sli_hba_setup_error;
5268
6d368e53
JS
5269 /* Initialize VPIs. */
5270 if (phba->sli_rev == LPFC_SLI_REV3) {
5271 /*
5272 * The VPI bitmask and physical ID array are allocated
5273 * and initialized once only - at driver load. A port
5274 * reset doesn't need to reinitialize this memory.
5275 */
5276 if ((phba->vpi_bmask == NULL) && (phba->vpi_ids == NULL)) {
5277 longs = (phba->max_vpi + BITS_PER_LONG) / BITS_PER_LONG;
6396bb22
KC
5278 phba->vpi_bmask = kcalloc(longs,
5279 sizeof(unsigned long),
6d368e53
JS
5280 GFP_KERNEL);
5281 if (!phba->vpi_bmask) {
5282 rc = -ENOMEM;
5283 goto lpfc_sli_hba_setup_error;
5284 }
5285
6396bb22
KC
5286 phba->vpi_ids = kcalloc(phba->max_vpi + 1,
5287 sizeof(uint16_t),
5288 GFP_KERNEL);
6d368e53
JS
5289 if (!phba->vpi_ids) {
5290 kfree(phba->vpi_bmask);
5291 rc = -ENOMEM;
5292 goto lpfc_sli_hba_setup_error;
5293 }
5294 for (i = 0; i < phba->max_vpi; i++)
5295 phba->vpi_ids[i] = i;
5296 }
5297 }
5298
9399627f 5299 /* Init HBQs */
ed957684
JS
5300 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
5301 rc = lpfc_sli_hbq_setup(phba);
5302 if (rc)
5303 goto lpfc_sli_hba_setup_error;
5304 }
04c68496 5305 spin_lock_irq(&phba->hbalock);
dea3101e 5306 phba->sli.sli_flag |= LPFC_PROCESS_LA;
04c68496 5307 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
5308
5309 rc = lpfc_config_port_post(phba);
5310 if (rc)
5311 goto lpfc_sli_hba_setup_error;
5312
ed957684
JS
5313 return rc;
5314
92d7f7b0 5315lpfc_sli_hba_setup_error:
2e0fef85 5316 phba->link_state = LPFC_HBA_ERROR;
e40a02c1 5317 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 5318 "0445 Firmware initialization failed\n");
dea3101e
JB
5319 return rc;
5320}
5321
e59058c4 5322/**
da0436e9
JS
5323 * lpfc_sli4_read_fcoe_params - Read fcoe params from conf region
5324 * @phba: Pointer to HBA context object.
5325 * @mboxq: mailbox pointer.
5326 * This function issue a dump mailbox command to read config region
5327 * 23 and parse the records in the region and populate driver
5328 * data structure.
e59058c4 5329 **/
da0436e9 5330static int
ff78d8f9 5331lpfc_sli4_read_fcoe_params(struct lpfc_hba *phba)
dea3101e 5332{
ff78d8f9 5333 LPFC_MBOXQ_t *mboxq;
da0436e9
JS
5334 struct lpfc_dmabuf *mp;
5335 struct lpfc_mqe *mqe;
5336 uint32_t data_length;
5337 int rc;
dea3101e 5338
da0436e9
JS
5339 /* Program the default value of vlan_id and fc_map */
5340 phba->valid_vlan = 0;
5341 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5342 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5343 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
2e0fef85 5344
ff78d8f9
JS
5345 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5346 if (!mboxq)
da0436e9
JS
5347 return -ENOMEM;
5348
ff78d8f9
JS
5349 mqe = &mboxq->u.mqe;
5350 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq)) {
5351 rc = -ENOMEM;
5352 goto out_free_mboxq;
5353 }
5354
3e1f0718 5355 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
5356 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5357
5358 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
5359 "(%d):2571 Mailbox cmd x%x Status x%x "
5360 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5361 "x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5362 "CQ: x%x x%x x%x x%x\n",
5363 mboxq->vport ? mboxq->vport->vpi : 0,
5364 bf_get(lpfc_mqe_command, mqe),
5365 bf_get(lpfc_mqe_status, mqe),
5366 mqe->un.mb_words[0], mqe->un.mb_words[1],
5367 mqe->un.mb_words[2], mqe->un.mb_words[3],
5368 mqe->un.mb_words[4], mqe->un.mb_words[5],
5369 mqe->un.mb_words[6], mqe->un.mb_words[7],
5370 mqe->un.mb_words[8], mqe->un.mb_words[9],
5371 mqe->un.mb_words[10], mqe->un.mb_words[11],
5372 mqe->un.mb_words[12], mqe->un.mb_words[13],
5373 mqe->un.mb_words[14], mqe->un.mb_words[15],
5374 mqe->un.mb_words[16], mqe->un.mb_words[50],
5375 mboxq->mcqe.word0,
5376 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
5377 mboxq->mcqe.trailer);
5378
5379 if (rc) {
5380 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5381 kfree(mp);
ff78d8f9
JS
5382 rc = -EIO;
5383 goto out_free_mboxq;
da0436e9
JS
5384 }
5385 data_length = mqe->un.mb_words[5];
a0c87cbd 5386 if (data_length > DMP_RGN23_SIZE) {
d11e31dd
JS
5387 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5388 kfree(mp);
ff78d8f9
JS
5389 rc = -EIO;
5390 goto out_free_mboxq;
d11e31dd 5391 }
dea3101e 5392
da0436e9
JS
5393 lpfc_parse_fcoe_conf(phba, mp->virt, data_length);
5394 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5395 kfree(mp);
ff78d8f9
JS
5396 rc = 0;
5397
5398out_free_mboxq:
5399 mempool_free(mboxq, phba->mbox_mem_pool);
5400 return rc;
da0436e9 5401}
e59058c4
JS
5402
5403/**
da0436e9
JS
5404 * lpfc_sli4_read_rev - Issue READ_REV and collect vpd data
5405 * @phba: pointer to lpfc hba data structure.
5406 * @mboxq: pointer to the LPFC_MBOXQ_t structure.
5407 * @vpd: pointer to the memory to hold resulting port vpd data.
5408 * @vpd_size: On input, the number of bytes allocated to @vpd.
5409 * On output, the number of data bytes in @vpd.
e59058c4 5410 *
da0436e9
JS
5411 * This routine executes a READ_REV SLI4 mailbox command. In
5412 * addition, this routine gets the port vpd data.
5413 *
5414 * Return codes
af901ca1 5415 * 0 - successful
d439d286 5416 * -ENOMEM - could not allocated memory.
e59058c4 5417 **/
da0436e9
JS
5418static int
5419lpfc_sli4_read_rev(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
5420 uint8_t *vpd, uint32_t *vpd_size)
dea3101e 5421{
da0436e9
JS
5422 int rc = 0;
5423 uint32_t dma_size;
5424 struct lpfc_dmabuf *dmabuf;
5425 struct lpfc_mqe *mqe;
dea3101e 5426
da0436e9
JS
5427 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
5428 if (!dmabuf)
5429 return -ENOMEM;
5430
5431 /*
5432 * Get a DMA buffer for the vpd data resulting from the READ_REV
5433 * mailbox command.
a257bf90 5434 */
da0436e9 5435 dma_size = *vpd_size;
750afb08
LC
5436 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, dma_size,
5437 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
5438 if (!dmabuf->virt) {
5439 kfree(dmabuf);
5440 return -ENOMEM;
a257bf90
JS
5441 }
5442
da0436e9
JS
5443 /*
5444 * The SLI4 implementation of READ_REV conflicts at word1,
5445 * bits 31:16 and SLI4 adds vpd functionality not present
5446 * in SLI3. This code corrects the conflicts.
1dcb58e5 5447 */
da0436e9
JS
5448 lpfc_read_rev(phba, mboxq);
5449 mqe = &mboxq->u.mqe;
5450 mqe->un.read_rev.vpd_paddr_high = putPaddrHigh(dmabuf->phys);
5451 mqe->un.read_rev.vpd_paddr_low = putPaddrLow(dmabuf->phys);
5452 mqe->un.read_rev.word1 &= 0x0000FFFF;
5453 bf_set(lpfc_mbx_rd_rev_vpd, &mqe->un.read_rev, 1);
5454 bf_set(lpfc_mbx_rd_rev_avail_len, &mqe->un.read_rev, dma_size);
5455
5456 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5457 if (rc) {
5458 dma_free_coherent(&phba->pcidev->dev, dma_size,
5459 dmabuf->virt, dmabuf->phys);
def9c7a9 5460 kfree(dmabuf);
da0436e9
JS
5461 return -EIO;
5462 }
1dcb58e5 5463
da0436e9
JS
5464 /*
5465 * The available vpd length cannot be bigger than the
5466 * DMA buffer passed to the port. Catch the less than
5467 * case and update the caller's size.
5468 */
5469 if (mqe->un.read_rev.avail_vpd_len < *vpd_size)
5470 *vpd_size = mqe->un.read_rev.avail_vpd_len;
3772a991 5471
d7c47992
JS
5472 memcpy(vpd, dmabuf->virt, *vpd_size);
5473
da0436e9
JS
5474 dma_free_coherent(&phba->pcidev->dev, dma_size,
5475 dmabuf->virt, dmabuf->phys);
5476 kfree(dmabuf);
5477 return 0;
dea3101e
JB
5478}
5479
cd1c8301 5480/**
b3b4f3e1 5481 * lpfc_sli4_get_ctl_attr - Retrieve SLI4 device controller attributes
cd1c8301
JS
5482 * @phba: pointer to lpfc hba data structure.
5483 *
5484 * This routine retrieves SLI4 device physical port name this PCI function
5485 * is attached to.
5486 *
5487 * Return codes
4907cb7b 5488 * 0 - successful
b3b4f3e1 5489 * otherwise - failed to retrieve controller attributes
cd1c8301
JS
5490 **/
5491static int
b3b4f3e1 5492lpfc_sli4_get_ctl_attr(struct lpfc_hba *phba)
cd1c8301
JS
5493{
5494 LPFC_MBOXQ_t *mboxq;
cd1c8301
JS
5495 struct lpfc_mbx_get_cntl_attributes *mbx_cntl_attr;
5496 struct lpfc_controller_attribute *cntl_attr;
cd1c8301
JS
5497 void *virtaddr = NULL;
5498 uint32_t alloclen, reqlen;
5499 uint32_t shdr_status, shdr_add_status;
5500 union lpfc_sli4_cfg_shdr *shdr;
cd1c8301
JS
5501 int rc;
5502
cd1c8301
JS
5503 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5504 if (!mboxq)
5505 return -ENOMEM;
cd1c8301 5506
b3b4f3e1 5507 /* Send COMMON_GET_CNTL_ATTRIBUTES mbox cmd */
cd1c8301
JS
5508 reqlen = sizeof(struct lpfc_mbx_get_cntl_attributes);
5509 alloclen = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5510 LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES, reqlen,
5511 LPFC_SLI4_MBX_NEMBED);
b3b4f3e1 5512
cd1c8301
JS
5513 if (alloclen < reqlen) {
5514 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5515 "3084 Allocated DMA memory size (%d) is "
5516 "less than the requested DMA memory size "
5517 "(%d)\n", alloclen, reqlen);
5518 rc = -ENOMEM;
5519 goto out_free_mboxq;
5520 }
5521 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5522 virtaddr = mboxq->sge_array->addr[0];
5523 mbx_cntl_attr = (struct lpfc_mbx_get_cntl_attributes *)virtaddr;
5524 shdr = &mbx_cntl_attr->cfg_shdr;
5525 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5526 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5527 if (shdr_status || shdr_add_status || rc) {
5528 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5529 "3085 Mailbox x%x (x%x/x%x) failed, "
5530 "rc:x%x, status:x%x, add_status:x%x\n",
5531 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5532 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5533 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5534 rc, shdr_status, shdr_add_status);
5535 rc = -ENXIO;
5536 goto out_free_mboxq;
5537 }
b3b4f3e1 5538
cd1c8301
JS
5539 cntl_attr = &mbx_cntl_attr->cntl_attr;
5540 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
5541 phba->sli4_hba.lnk_info.lnk_tp =
5542 bf_get(lpfc_cntl_attr_lnk_type, cntl_attr);
5543 phba->sli4_hba.lnk_info.lnk_no =
5544 bf_get(lpfc_cntl_attr_lnk_numb, cntl_attr);
b3b4f3e1
JS
5545
5546 memset(phba->BIOSVersion, 0, sizeof(phba->BIOSVersion));
5547 strlcat(phba->BIOSVersion, (char *)cntl_attr->bios_ver_str,
5548 sizeof(phba->BIOSVersion));
5549
cd1c8301 5550 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
b3b4f3e1 5551 "3086 lnk_type:%d, lnk_numb:%d, bios_ver:%s\n",
cd1c8301 5552 phba->sli4_hba.lnk_info.lnk_tp,
b3b4f3e1
JS
5553 phba->sli4_hba.lnk_info.lnk_no,
5554 phba->BIOSVersion);
5555out_free_mboxq:
5556 if (rc != MBX_TIMEOUT) {
5557 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5558 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5559 else
5560 mempool_free(mboxq, phba->mbox_mem_pool);
5561 }
5562 return rc;
5563}
5564
5565/**
5566 * lpfc_sli4_retrieve_pport_name - Retrieve SLI4 device physical port name
5567 * @phba: pointer to lpfc hba data structure.
5568 *
5569 * This routine retrieves SLI4 device physical port name this PCI function
5570 * is attached to.
5571 *
5572 * Return codes
5573 * 0 - successful
5574 * otherwise - failed to retrieve physical port name
5575 **/
5576static int
5577lpfc_sli4_retrieve_pport_name(struct lpfc_hba *phba)
5578{
5579 LPFC_MBOXQ_t *mboxq;
5580 struct lpfc_mbx_get_port_name *get_port_name;
5581 uint32_t shdr_status, shdr_add_status;
5582 union lpfc_sli4_cfg_shdr *shdr;
5583 char cport_name = 0;
5584 int rc;
5585
5586 /* We assume nothing at this point */
5587 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5588 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_NON;
5589
5590 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5591 if (!mboxq)
5592 return -ENOMEM;
5593 /* obtain link type and link number via READ_CONFIG */
5594 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5595 lpfc_sli4_read_config(phba);
5596 if (phba->sli4_hba.lnk_info.lnk_dv == LPFC_LNK_DAT_VAL)
5597 goto retrieve_ppname;
5598
5599 /* obtain link type and link number via COMMON_GET_CNTL_ATTRIBUTES */
5600 rc = lpfc_sli4_get_ctl_attr(phba);
5601 if (rc)
5602 goto out_free_mboxq;
cd1c8301
JS
5603
5604retrieve_ppname:
5605 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5606 LPFC_MBOX_OPCODE_GET_PORT_NAME,
5607 sizeof(struct lpfc_mbx_get_port_name) -
5608 sizeof(struct lpfc_sli4_cfg_mhdr),
5609 LPFC_SLI4_MBX_EMBED);
5610 get_port_name = &mboxq->u.mqe.un.get_port_name;
5611 shdr = (union lpfc_sli4_cfg_shdr *)&get_port_name->header.cfg_shdr;
5612 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_OPCODE_VERSION_1);
5613 bf_set(lpfc_mbx_get_port_name_lnk_type, &get_port_name->u.request,
5614 phba->sli4_hba.lnk_info.lnk_tp);
5615 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5616 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5617 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5618 if (shdr_status || shdr_add_status || rc) {
5619 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5620 "3087 Mailbox x%x (x%x/x%x) failed: "
5621 "rc:x%x, status:x%x, add_status:x%x\n",
5622 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5623 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5624 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5625 rc, shdr_status, shdr_add_status);
5626 rc = -ENXIO;
5627 goto out_free_mboxq;
5628 }
5629 switch (phba->sli4_hba.lnk_info.lnk_no) {
5630 case LPFC_LINK_NUMBER_0:
5631 cport_name = bf_get(lpfc_mbx_get_port_name_name0,
5632 &get_port_name->u.response);
5633 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5634 break;
5635 case LPFC_LINK_NUMBER_1:
5636 cport_name = bf_get(lpfc_mbx_get_port_name_name1,
5637 &get_port_name->u.response);
5638 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5639 break;
5640 case LPFC_LINK_NUMBER_2:
5641 cport_name = bf_get(lpfc_mbx_get_port_name_name2,
5642 &get_port_name->u.response);
5643 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5644 break;
5645 case LPFC_LINK_NUMBER_3:
5646 cport_name = bf_get(lpfc_mbx_get_port_name_name3,
5647 &get_port_name->u.response);
5648 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5649 break;
5650 default:
5651 break;
5652 }
5653
5654 if (phba->sli4_hba.pport_name_sta == LPFC_SLI4_PPNAME_GET) {
5655 phba->Port[0] = cport_name;
5656 phba->Port[1] = '\0';
5657 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5658 "3091 SLI get port name: %s\n", phba->Port);
5659 }
5660
5661out_free_mboxq:
5662 if (rc != MBX_TIMEOUT) {
5663 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5664 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5665 else
5666 mempool_free(mboxq, phba->mbox_mem_pool);
5667 }
5668 return rc;
5669}
5670
e59058c4 5671/**
da0436e9
JS
5672 * lpfc_sli4_arm_cqeq_intr - Arm sli-4 device completion and event queues
5673 * @phba: pointer to lpfc hba data structure.
e59058c4 5674 *
da0436e9
JS
5675 * This routine is called to explicitly arm the SLI4 device's completion and
5676 * event queues
5677 **/
5678static void
5679lpfc_sli4_arm_cqeq_intr(struct lpfc_hba *phba)
5680{
895427bd 5681 int qidx;
b71413dd 5682 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
cdb42bec 5683 struct lpfc_sli4_hdw_queue *qp;
657add4e 5684 struct lpfc_queue *eq;
da0436e9 5685
32517fc0
JS
5686 sli4_hba->sli4_write_cq_db(phba, sli4_hba->mbx_cq, 0, LPFC_QUEUE_REARM);
5687 sli4_hba->sli4_write_cq_db(phba, sli4_hba->els_cq, 0, LPFC_QUEUE_REARM);
b71413dd 5688 if (sli4_hba->nvmels_cq)
32517fc0
JS
5689 sli4_hba->sli4_write_cq_db(phba, sli4_hba->nvmels_cq, 0,
5690 LPFC_QUEUE_REARM);
1ba981fd 5691
cdb42bec 5692 if (sli4_hba->hdwq) {
657add4e 5693 /* Loop thru all Hardware Queues */
cdb42bec 5694 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
657add4e
JS
5695 qp = &sli4_hba->hdwq[qidx];
5696 /* ARM the corresponding CQ */
01f2ef6d 5697 sli4_hba->sli4_write_cq_db(phba, qp->io_cq, 0,
c00f62e6 5698 LPFC_QUEUE_REARM);
cdb42bec 5699 }
1ba981fd 5700
657add4e
JS
5701 /* Loop thru all IRQ vectors */
5702 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
5703 eq = sli4_hba->hba_eq_hdl[qidx].eq;
5704 /* ARM the corresponding EQ */
5705 sli4_hba->sli4_write_eq_db(phba, eq,
5706 0, LPFC_QUEUE_REARM);
5707 }
cdb42bec 5708 }
1ba981fd 5709
2d7dbc4c
JS
5710 if (phba->nvmet_support) {
5711 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) {
32517fc0
JS
5712 sli4_hba->sli4_write_cq_db(phba,
5713 sli4_hba->nvmet_cqset[qidx], 0,
2d7dbc4c
JS
5714 LPFC_QUEUE_REARM);
5715 }
2e90f4b5 5716 }
da0436e9
JS
5717}
5718
6d368e53
JS
5719/**
5720 * lpfc_sli4_get_avail_extnt_rsrc - Get available resource extent count.
5721 * @phba: Pointer to HBA context object.
5722 * @type: The resource extent type.
b76f2dc9
JS
5723 * @extnt_count: buffer to hold port available extent count.
5724 * @extnt_size: buffer to hold element count per extent.
6d368e53 5725 *
b76f2dc9
JS
5726 * This function calls the port and retrievs the number of available
5727 * extents and their size for a particular extent type.
5728 *
5729 * Returns: 0 if successful. Nonzero otherwise.
6d368e53 5730 **/
b76f2dc9 5731int
6d368e53
JS
5732lpfc_sli4_get_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type,
5733 uint16_t *extnt_count, uint16_t *extnt_size)
5734{
5735 int rc = 0;
5736 uint32_t length;
5737 uint32_t mbox_tmo;
5738 struct lpfc_mbx_get_rsrc_extent_info *rsrc_info;
5739 LPFC_MBOXQ_t *mbox;
5740
5741 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5742 if (!mbox)
5743 return -ENOMEM;
5744
5745 /* Find out how many extents are available for this resource type */
5746 length = (sizeof(struct lpfc_mbx_get_rsrc_extent_info) -
5747 sizeof(struct lpfc_sli4_cfg_mhdr));
5748 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5749 LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO,
5750 length, LPFC_SLI4_MBX_EMBED);
5751
5752 /* Send an extents count of 0 - the GET doesn't use it. */
5753 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
5754 LPFC_SLI4_MBX_EMBED);
5755 if (unlikely(rc)) {
5756 rc = -EIO;
5757 goto err_exit;
5758 }
5759
5760 if (!phba->sli4_hba.intr_enable)
5761 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5762 else {
a183a15f 5763 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5764 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5765 }
5766 if (unlikely(rc)) {
5767 rc = -EIO;
5768 goto err_exit;
5769 }
5770
5771 rsrc_info = &mbox->u.mqe.un.rsrc_extent_info;
5772 if (bf_get(lpfc_mbox_hdr_status,
5773 &rsrc_info->header.cfg_shdr.response)) {
5774 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5775 "2930 Failed to get resource extents "
5776 "Status 0x%x Add'l Status 0x%x\n",
5777 bf_get(lpfc_mbox_hdr_status,
5778 &rsrc_info->header.cfg_shdr.response),
5779 bf_get(lpfc_mbox_hdr_add_status,
5780 &rsrc_info->header.cfg_shdr.response));
5781 rc = -EIO;
5782 goto err_exit;
5783 }
5784
5785 *extnt_count = bf_get(lpfc_mbx_get_rsrc_extent_info_cnt,
5786 &rsrc_info->u.rsp);
5787 *extnt_size = bf_get(lpfc_mbx_get_rsrc_extent_info_size,
5788 &rsrc_info->u.rsp);
8a9d2e80
JS
5789
5790 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5791 "3162 Retrieved extents type-%d from port: count:%d, "
5792 "size:%d\n", type, *extnt_count, *extnt_size);
5793
5794err_exit:
6d368e53
JS
5795 mempool_free(mbox, phba->mbox_mem_pool);
5796 return rc;
5797}
5798
5799/**
5800 * lpfc_sli4_chk_avail_extnt_rsrc - Check for available SLI4 resource extents.
5801 * @phba: Pointer to HBA context object.
5802 * @type: The extent type to check.
5803 *
5804 * This function reads the current available extents from the port and checks
5805 * if the extent count or extent size has changed since the last access.
5806 * Callers use this routine post port reset to understand if there is a
5807 * extent reprovisioning requirement.
5808 *
5809 * Returns:
5810 * -Error: error indicates problem.
5811 * 1: Extent count or size has changed.
5812 * 0: No changes.
5813 **/
5814static int
5815lpfc_sli4_chk_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type)
5816{
5817 uint16_t curr_ext_cnt, rsrc_ext_cnt;
5818 uint16_t size_diff, rsrc_ext_size;
5819 int rc = 0;
5820 struct lpfc_rsrc_blks *rsrc_entry;
5821 struct list_head *rsrc_blk_list = NULL;
5822
5823 size_diff = 0;
5824 curr_ext_cnt = 0;
5825 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5826 &rsrc_ext_cnt,
5827 &rsrc_ext_size);
5828 if (unlikely(rc))
5829 return -EIO;
5830
5831 switch (type) {
5832 case LPFC_RSC_TYPE_FCOE_RPI:
5833 rsrc_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5834 break;
5835 case LPFC_RSC_TYPE_FCOE_VPI:
5836 rsrc_blk_list = &phba->lpfc_vpi_blk_list;
5837 break;
5838 case LPFC_RSC_TYPE_FCOE_XRI:
5839 rsrc_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5840 break;
5841 case LPFC_RSC_TYPE_FCOE_VFI:
5842 rsrc_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5843 break;
5844 default:
5845 break;
5846 }
5847
5848 list_for_each_entry(rsrc_entry, rsrc_blk_list, list) {
5849 curr_ext_cnt++;
5850 if (rsrc_entry->rsrc_size != rsrc_ext_size)
5851 size_diff++;
5852 }
5853
5854 if (curr_ext_cnt != rsrc_ext_cnt || size_diff != 0)
5855 rc = 1;
5856
5857 return rc;
5858}
5859
5860/**
5861 * lpfc_sli4_cfg_post_extnts -
5862 * @phba: Pointer to HBA context object.
5863 * @extnt_cnt - number of available extents.
5864 * @type - the extent type (rpi, xri, vfi, vpi).
5865 * @emb - buffer to hold either MBX_EMBED or MBX_NEMBED operation.
5866 * @mbox - pointer to the caller's allocated mailbox structure.
5867 *
5868 * This function executes the extents allocation request. It also
5869 * takes care of the amount of memory needed to allocate or get the
5870 * allocated extents. It is the caller's responsibility to evaluate
5871 * the response.
5872 *
5873 * Returns:
5874 * -Error: Error value describes the condition found.
5875 * 0: if successful
5876 **/
5877static int
8a9d2e80 5878lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t extnt_cnt,
6d368e53
JS
5879 uint16_t type, bool *emb, LPFC_MBOXQ_t *mbox)
5880{
5881 int rc = 0;
5882 uint32_t req_len;
5883 uint32_t emb_len;
5884 uint32_t alloc_len, mbox_tmo;
5885
5886 /* Calculate the total requested length of the dma memory */
8a9d2e80 5887 req_len = extnt_cnt * sizeof(uint16_t);
6d368e53
JS
5888
5889 /*
5890 * Calculate the size of an embedded mailbox. The uint32_t
5891 * accounts for extents-specific word.
5892 */
5893 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
5894 sizeof(uint32_t);
5895
5896 /*
5897 * Presume the allocation and response will fit into an embedded
5898 * mailbox. If not true, reconfigure to a non-embedded mailbox.
5899 */
5900 *emb = LPFC_SLI4_MBX_EMBED;
5901 if (req_len > emb_len) {
8a9d2e80 5902 req_len = extnt_cnt * sizeof(uint16_t) +
6d368e53
JS
5903 sizeof(union lpfc_sli4_cfg_shdr) +
5904 sizeof(uint32_t);
5905 *emb = LPFC_SLI4_MBX_NEMBED;
5906 }
5907
5908 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5909 LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT,
5910 req_len, *emb);
5911 if (alloc_len < req_len) {
5912 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
b76f2dc9 5913 "2982 Allocated DMA memory size (x%x) is "
6d368e53
JS
5914 "less than the requested DMA memory "
5915 "size (x%x)\n", alloc_len, req_len);
5916 return -ENOMEM;
5917 }
8a9d2e80 5918 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, extnt_cnt, type, *emb);
6d368e53
JS
5919 if (unlikely(rc))
5920 return -EIO;
5921
5922 if (!phba->sli4_hba.intr_enable)
5923 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5924 else {
a183a15f 5925 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5926 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5927 }
5928
5929 if (unlikely(rc))
5930 rc = -EIO;
5931 return rc;
5932}
5933
5934/**
5935 * lpfc_sli4_alloc_extent - Allocate an SLI4 resource extent.
5936 * @phba: Pointer to HBA context object.
5937 * @type: The resource extent type to allocate.
5938 *
5939 * This function allocates the number of elements for the specified
5940 * resource type.
5941 **/
5942static int
5943lpfc_sli4_alloc_extent(struct lpfc_hba *phba, uint16_t type)
5944{
5945 bool emb = false;
5946 uint16_t rsrc_id_cnt, rsrc_cnt, rsrc_size;
5947 uint16_t rsrc_id, rsrc_start, j, k;
5948 uint16_t *ids;
5949 int i, rc;
5950 unsigned long longs;
5951 unsigned long *bmask;
5952 struct lpfc_rsrc_blks *rsrc_blks;
5953 LPFC_MBOXQ_t *mbox;
5954 uint32_t length;
5955 struct lpfc_id_range *id_array = NULL;
5956 void *virtaddr = NULL;
5957 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
5958 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
5959 struct list_head *ext_blk_list;
5960
5961 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5962 &rsrc_cnt,
5963 &rsrc_size);
5964 if (unlikely(rc))
5965 return -EIO;
5966
5967 if ((rsrc_cnt == 0) || (rsrc_size == 0)) {
5968 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5969 "3009 No available Resource Extents "
5970 "for resource type 0x%x: Count: 0x%x, "
5971 "Size 0x%x\n", type, rsrc_cnt,
5972 rsrc_size);
5973 return -ENOMEM;
5974 }
5975
8a9d2e80
JS
5976 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_INIT | LOG_SLI,
5977 "2903 Post resource extents type-0x%x: "
5978 "count:%d, size %d\n", type, rsrc_cnt, rsrc_size);
6d368e53
JS
5979
5980 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5981 if (!mbox)
5982 return -ENOMEM;
5983
8a9d2e80 5984 rc = lpfc_sli4_cfg_post_extnts(phba, rsrc_cnt, type, &emb, mbox);
6d368e53
JS
5985 if (unlikely(rc)) {
5986 rc = -EIO;
5987 goto err_exit;
5988 }
5989
5990 /*
5991 * Figure out where the response is located. Then get local pointers
5992 * to the response data. The port does not guarantee to respond to
5993 * all extents counts request so update the local variable with the
5994 * allocated count from the port.
5995 */
5996 if (emb == LPFC_SLI4_MBX_EMBED) {
5997 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
5998 id_array = &rsrc_ext->u.rsp.id[0];
5999 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
6000 } else {
6001 virtaddr = mbox->sge_array->addr[0];
6002 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
6003 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
6004 id_array = &n_rsrc->id;
6005 }
6006
6007 longs = ((rsrc_cnt * rsrc_size) + BITS_PER_LONG - 1) / BITS_PER_LONG;
6008 rsrc_id_cnt = rsrc_cnt * rsrc_size;
6009
6010 /*
6011 * Based on the resource size and count, correct the base and max
6012 * resource values.
6013 */
6014 length = sizeof(struct lpfc_rsrc_blks);
6015 switch (type) {
6016 case LPFC_RSC_TYPE_FCOE_RPI:
6396bb22 6017 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
6018 sizeof(unsigned long),
6019 GFP_KERNEL);
6020 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
6021 rc = -ENOMEM;
6022 goto err_exit;
6023 }
6396bb22 6024 phba->sli4_hba.rpi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
6025 sizeof(uint16_t),
6026 GFP_KERNEL);
6027 if (unlikely(!phba->sli4_hba.rpi_ids)) {
6028 kfree(phba->sli4_hba.rpi_bmask);
6029 rc = -ENOMEM;
6030 goto err_exit;
6031 }
6032
6033 /*
6034 * The next_rpi was initialized with the maximum available
6035 * count but the port may allocate a smaller number. Catch
6036 * that case and update the next_rpi.
6037 */
6038 phba->sli4_hba.next_rpi = rsrc_id_cnt;
6039
6040 /* Initialize local ptrs for common extent processing later. */
6041 bmask = phba->sli4_hba.rpi_bmask;
6042 ids = phba->sli4_hba.rpi_ids;
6043 ext_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
6044 break;
6045 case LPFC_RSC_TYPE_FCOE_VPI:
6396bb22 6046 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
6047 GFP_KERNEL);
6048 if (unlikely(!phba->vpi_bmask)) {
6049 rc = -ENOMEM;
6050 goto err_exit;
6051 }
6396bb22 6052 phba->vpi_ids = kcalloc(rsrc_id_cnt, sizeof(uint16_t),
6d368e53
JS
6053 GFP_KERNEL);
6054 if (unlikely(!phba->vpi_ids)) {
6055 kfree(phba->vpi_bmask);
6056 rc = -ENOMEM;
6057 goto err_exit;
6058 }
6059
6060 /* Initialize local ptrs for common extent processing later. */
6061 bmask = phba->vpi_bmask;
6062 ids = phba->vpi_ids;
6063 ext_blk_list = &phba->lpfc_vpi_blk_list;
6064 break;
6065 case LPFC_RSC_TYPE_FCOE_XRI:
6396bb22 6066 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
6067 sizeof(unsigned long),
6068 GFP_KERNEL);
6069 if (unlikely(!phba->sli4_hba.xri_bmask)) {
6070 rc = -ENOMEM;
6071 goto err_exit;
6072 }
8a9d2e80 6073 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 6074 phba->sli4_hba.xri_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
6075 sizeof(uint16_t),
6076 GFP_KERNEL);
6077 if (unlikely(!phba->sli4_hba.xri_ids)) {
6078 kfree(phba->sli4_hba.xri_bmask);
6079 rc = -ENOMEM;
6080 goto err_exit;
6081 }
6082
6083 /* Initialize local ptrs for common extent processing later. */
6084 bmask = phba->sli4_hba.xri_bmask;
6085 ids = phba->sli4_hba.xri_ids;
6086 ext_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
6087 break;
6088 case LPFC_RSC_TYPE_FCOE_VFI:
6396bb22 6089 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
6090 sizeof(unsigned long),
6091 GFP_KERNEL);
6092 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
6093 rc = -ENOMEM;
6094 goto err_exit;
6095 }
6396bb22 6096 phba->sli4_hba.vfi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
6097 sizeof(uint16_t),
6098 GFP_KERNEL);
6099 if (unlikely(!phba->sli4_hba.vfi_ids)) {
6100 kfree(phba->sli4_hba.vfi_bmask);
6101 rc = -ENOMEM;
6102 goto err_exit;
6103 }
6104
6105 /* Initialize local ptrs for common extent processing later. */
6106 bmask = phba->sli4_hba.vfi_bmask;
6107 ids = phba->sli4_hba.vfi_ids;
6108 ext_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
6109 break;
6110 default:
6111 /* Unsupported Opcode. Fail call. */
6112 id_array = NULL;
6113 bmask = NULL;
6114 ids = NULL;
6115 ext_blk_list = NULL;
6116 goto err_exit;
6117 }
6118
6119 /*
6120 * Complete initializing the extent configuration with the
6121 * allocated ids assigned to this function. The bitmask serves
6122 * as an index into the array and manages the available ids. The
6123 * array just stores the ids communicated to the port via the wqes.
6124 */
6125 for (i = 0, j = 0, k = 0; i < rsrc_cnt; i++) {
6126 if ((i % 2) == 0)
6127 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_0,
6128 &id_array[k]);
6129 else
6130 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_1,
6131 &id_array[k]);
6132
6133 rsrc_blks = kzalloc(length, GFP_KERNEL);
6134 if (unlikely(!rsrc_blks)) {
6135 rc = -ENOMEM;
6136 kfree(bmask);
6137 kfree(ids);
6138 goto err_exit;
6139 }
6140 rsrc_blks->rsrc_start = rsrc_id;
6141 rsrc_blks->rsrc_size = rsrc_size;
6142 list_add_tail(&rsrc_blks->list, ext_blk_list);
6143 rsrc_start = rsrc_id;
895427bd 6144 if ((type == LPFC_RSC_TYPE_FCOE_XRI) && (j == 0)) {
5e5b511d 6145 phba->sli4_hba.io_xri_start = rsrc_start +
895427bd 6146 lpfc_sli4_get_iocb_cnt(phba);
895427bd 6147 }
6d368e53
JS
6148
6149 while (rsrc_id < (rsrc_start + rsrc_size)) {
6150 ids[j] = rsrc_id;
6151 rsrc_id++;
6152 j++;
6153 }
6154 /* Entire word processed. Get next word.*/
6155 if ((i % 2) == 1)
6156 k++;
6157 }
6158 err_exit:
6159 lpfc_sli4_mbox_cmd_free(phba, mbox);
6160 return rc;
6161}
6162
895427bd
JS
6163
6164
6d368e53
JS
6165/**
6166 * lpfc_sli4_dealloc_extent - Deallocate an SLI4 resource extent.
6167 * @phba: Pointer to HBA context object.
6168 * @type: the extent's type.
6169 *
6170 * This function deallocates all extents of a particular resource type.
6171 * SLI4 does not allow for deallocating a particular extent range. It
6172 * is the caller's responsibility to release all kernel memory resources.
6173 **/
6174static int
6175lpfc_sli4_dealloc_extent(struct lpfc_hba *phba, uint16_t type)
6176{
6177 int rc;
6178 uint32_t length, mbox_tmo = 0;
6179 LPFC_MBOXQ_t *mbox;
6180 struct lpfc_mbx_dealloc_rsrc_extents *dealloc_rsrc;
6181 struct lpfc_rsrc_blks *rsrc_blk, *rsrc_blk_next;
6182
6183 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6184 if (!mbox)
6185 return -ENOMEM;
6186
6187 /*
6188 * This function sends an embedded mailbox because it only sends the
6189 * the resource type. All extents of this type are released by the
6190 * port.
6191 */
6192 length = (sizeof(struct lpfc_mbx_dealloc_rsrc_extents) -
6193 sizeof(struct lpfc_sli4_cfg_mhdr));
6194 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6195 LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT,
6196 length, LPFC_SLI4_MBX_EMBED);
6197
6198 /* Send an extents count of 0 - the dealloc doesn't use it. */
6199 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
6200 LPFC_SLI4_MBX_EMBED);
6201 if (unlikely(rc)) {
6202 rc = -EIO;
6203 goto out_free_mbox;
6204 }
6205 if (!phba->sli4_hba.intr_enable)
6206 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6207 else {
a183a15f 6208 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
6209 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6210 }
6211 if (unlikely(rc)) {
6212 rc = -EIO;
6213 goto out_free_mbox;
6214 }
6215
6216 dealloc_rsrc = &mbox->u.mqe.un.dealloc_rsrc_extents;
6217 if (bf_get(lpfc_mbox_hdr_status,
6218 &dealloc_rsrc->header.cfg_shdr.response)) {
6219 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6220 "2919 Failed to release resource extents "
6221 "for type %d - Status 0x%x Add'l Status 0x%x. "
6222 "Resource memory not released.\n",
6223 type,
6224 bf_get(lpfc_mbox_hdr_status,
6225 &dealloc_rsrc->header.cfg_shdr.response),
6226 bf_get(lpfc_mbox_hdr_add_status,
6227 &dealloc_rsrc->header.cfg_shdr.response));
6228 rc = -EIO;
6229 goto out_free_mbox;
6230 }
6231
6232 /* Release kernel memory resources for the specific type. */
6233 switch (type) {
6234 case LPFC_RSC_TYPE_FCOE_VPI:
6235 kfree(phba->vpi_bmask);
6236 kfree(phba->vpi_ids);
6237 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6238 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6239 &phba->lpfc_vpi_blk_list, list) {
6240 list_del_init(&rsrc_blk->list);
6241 kfree(rsrc_blk);
6242 }
16a3a208 6243 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6244 break;
6245 case LPFC_RSC_TYPE_FCOE_XRI:
6246 kfree(phba->sli4_hba.xri_bmask);
6247 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6248 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6249 &phba->sli4_hba.lpfc_xri_blk_list, list) {
6250 list_del_init(&rsrc_blk->list);
6251 kfree(rsrc_blk);
6252 }
6253 break;
6254 case LPFC_RSC_TYPE_FCOE_VFI:
6255 kfree(phba->sli4_hba.vfi_bmask);
6256 kfree(phba->sli4_hba.vfi_ids);
6257 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6258 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6259 &phba->sli4_hba.lpfc_vfi_blk_list, list) {
6260 list_del_init(&rsrc_blk->list);
6261 kfree(rsrc_blk);
6262 }
6263 break;
6264 case LPFC_RSC_TYPE_FCOE_RPI:
6265 /* RPI bitmask and physical id array are cleaned up earlier. */
6266 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6267 &phba->sli4_hba.lpfc_rpi_blk_list, list) {
6268 list_del_init(&rsrc_blk->list);
6269 kfree(rsrc_blk);
6270 }
6271 break;
6272 default:
6273 break;
6274 }
6275
6276 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6277
6278 out_free_mbox:
6279 mempool_free(mbox, phba->mbox_mem_pool);
6280 return rc;
6281}
6282
bd4b3e5c 6283static void
7bdedb34
JS
6284lpfc_set_features(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox,
6285 uint32_t feature)
65791f1f 6286{
65791f1f 6287 uint32_t len;
65791f1f 6288
65791f1f
JS
6289 len = sizeof(struct lpfc_mbx_set_feature) -
6290 sizeof(struct lpfc_sli4_cfg_mhdr);
6291 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6292 LPFC_MBOX_OPCODE_SET_FEATURES, len,
6293 LPFC_SLI4_MBX_EMBED);
7bdedb34
JS
6294
6295 switch (feature) {
6296 case LPFC_SET_UE_RECOVERY:
6297 bf_set(lpfc_mbx_set_feature_UER,
6298 &mbox->u.mqe.un.set_feature, 1);
6299 mbox->u.mqe.un.set_feature.feature = LPFC_SET_UE_RECOVERY;
6300 mbox->u.mqe.un.set_feature.param_len = 8;
6301 break;
6302 case LPFC_SET_MDS_DIAGS:
6303 bf_set(lpfc_mbx_set_feature_mds,
6304 &mbox->u.mqe.un.set_feature, 1);
6305 bf_set(lpfc_mbx_set_feature_mds_deep_loopbk,
ae9e28f3 6306 &mbox->u.mqe.un.set_feature, 1);
7bdedb34
JS
6307 mbox->u.mqe.un.set_feature.feature = LPFC_SET_MDS_DIAGS;
6308 mbox->u.mqe.un.set_feature.param_len = 8;
6309 break;
171f6c41
JS
6310 case LPFC_SET_DUAL_DUMP:
6311 bf_set(lpfc_mbx_set_feature_dd,
6312 &mbox->u.mqe.un.set_feature, LPFC_ENABLE_DUAL_DUMP);
6313 bf_set(lpfc_mbx_set_feature_ddquery,
6314 &mbox->u.mqe.un.set_feature, 0);
6315 mbox->u.mqe.un.set_feature.feature = LPFC_SET_DUAL_DUMP;
6316 mbox->u.mqe.un.set_feature.param_len = 4;
6317 break;
65791f1f 6318 }
7bdedb34
JS
6319
6320 return;
65791f1f
JS
6321}
6322
1165a5c2
JS
6323/**
6324 * lpfc_ras_stop_fwlog: Disable FW logging by the adapter
6325 * @phba: Pointer to HBA context object.
6326 *
6327 * Disable FW logging into host memory on the adapter. To
6328 * be done before reading logs from the host memory.
6329 **/
6330void
6331lpfc_ras_stop_fwlog(struct lpfc_hba *phba)
6332{
6333 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6334
95bfc6d8
JS
6335 spin_lock_irq(&phba->hbalock);
6336 ras_fwlog->state = INACTIVE;
6337 spin_unlock_irq(&phba->hbalock);
1165a5c2
JS
6338
6339 /* Disable FW logging to host memory */
6340 writel(LPFC_CTL_PDEV_CTL_DDL_RAS,
6341 phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PDEV_CTL_OFFSET);
95bfc6d8
JS
6342
6343 /* Wait 10ms for firmware to stop using DMA buffer */
6344 usleep_range(10 * 1000, 20 * 1000);
1165a5c2
JS
6345}
6346
d2cc9bcd
JS
6347/**
6348 * lpfc_sli4_ras_dma_free - Free memory allocated for FW logging.
6349 * @phba: Pointer to HBA context object.
6350 *
6351 * This function is called to free memory allocated for RAS FW logging
6352 * support in the driver.
6353 **/
6354void
6355lpfc_sli4_ras_dma_free(struct lpfc_hba *phba)
6356{
6357 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6358 struct lpfc_dmabuf *dmabuf, *next;
6359
6360 if (!list_empty(&ras_fwlog->fwlog_buff_list)) {
6361 list_for_each_entry_safe(dmabuf, next,
6362 &ras_fwlog->fwlog_buff_list,
6363 list) {
6364 list_del(&dmabuf->list);
6365 dma_free_coherent(&phba->pcidev->dev,
6366 LPFC_RAS_MAX_ENTRY_SIZE,
6367 dmabuf->virt, dmabuf->phys);
6368 kfree(dmabuf);
6369 }
6370 }
6371
6372 if (ras_fwlog->lwpd.virt) {
6373 dma_free_coherent(&phba->pcidev->dev,
6374 sizeof(uint32_t) * 2,
6375 ras_fwlog->lwpd.virt,
6376 ras_fwlog->lwpd.phys);
6377 ras_fwlog->lwpd.virt = NULL;
6378 }
6379
95bfc6d8
JS
6380 spin_lock_irq(&phba->hbalock);
6381 ras_fwlog->state = INACTIVE;
6382 spin_unlock_irq(&phba->hbalock);
d2cc9bcd
JS
6383}
6384
6385/**
6386 * lpfc_sli4_ras_dma_alloc: Allocate memory for FW support
6387 * @phba: Pointer to HBA context object.
6388 * @fwlog_buff_count: Count of buffers to be created.
6389 *
6390 * This routine DMA memory for Log Write Position Data[LPWD] and buffer
6391 * to update FW log is posted to the adapter.
6392 * Buffer count is calculated based on module param ras_fwlog_buffsize
6393 * Size of each buffer posted to FW is 64K.
6394 **/
6395
6396static int
6397lpfc_sli4_ras_dma_alloc(struct lpfc_hba *phba,
6398 uint32_t fwlog_buff_count)
6399{
6400 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6401 struct lpfc_dmabuf *dmabuf;
6402 int rc = 0, i = 0;
6403
6404 /* Initialize List */
6405 INIT_LIST_HEAD(&ras_fwlog->fwlog_buff_list);
6406
6407 /* Allocate memory for the LWPD */
6408 ras_fwlog->lwpd.virt = dma_alloc_coherent(&phba->pcidev->dev,
6409 sizeof(uint32_t) * 2,
6410 &ras_fwlog->lwpd.phys,
6411 GFP_KERNEL);
6412 if (!ras_fwlog->lwpd.virt) {
cb34990b 6413 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d2cc9bcd
JS
6414 "6185 LWPD Memory Alloc Failed\n");
6415
6416 return -ENOMEM;
6417 }
6418
6419 ras_fwlog->fw_buffcount = fwlog_buff_count;
6420 for (i = 0; i < ras_fwlog->fw_buffcount; i++) {
6421 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
6422 GFP_KERNEL);
6423 if (!dmabuf) {
6424 rc = -ENOMEM;
6425 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6426 "6186 Memory Alloc failed FW logging");
6427 goto free_mem;
6428 }
6429
750afb08 6430 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
d2cc9bcd 6431 LPFC_RAS_MAX_ENTRY_SIZE,
750afb08 6432 &dmabuf->phys, GFP_KERNEL);
d2cc9bcd
JS
6433 if (!dmabuf->virt) {
6434 kfree(dmabuf);
6435 rc = -ENOMEM;
6436 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6437 "6187 DMA Alloc Failed FW logging");
6438 goto free_mem;
6439 }
d2cc9bcd
JS
6440 dmabuf->buffer_tag = i;
6441 list_add_tail(&dmabuf->list, &ras_fwlog->fwlog_buff_list);
6442 }
6443
6444free_mem:
6445 if (rc)
6446 lpfc_sli4_ras_dma_free(phba);
6447
6448 return rc;
6449}
6450
6451/**
6452 * lpfc_sli4_ras_mbox_cmpl: Completion handler for RAS MBX command
6453 * @phba: pointer to lpfc hba data structure.
6454 * @pmboxq: pointer to the driver internal queue element for mailbox command.
6455 *
6456 * Completion handler for driver's RAS MBX command to the device.
6457 **/
6458static void
6459lpfc_sli4_ras_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
6460{
6461 MAILBOX_t *mb;
6462 union lpfc_sli4_cfg_shdr *shdr;
6463 uint32_t shdr_status, shdr_add_status;
6464 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6465
6466 mb = &pmb->u.mb;
6467
6468 shdr = (union lpfc_sli4_cfg_shdr *)
6469 &pmb->u.mqe.un.ras_fwlog.header.cfg_shdr;
6470 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
6471 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
6472
6473 if (mb->mbxStatus != MBX_SUCCESS || shdr_status) {
cb34990b 6474 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
d2cc9bcd
JS
6475 "6188 FW LOG mailbox "
6476 "completed with status x%x add_status x%x,"
6477 " mbx status x%x\n",
6478 shdr_status, shdr_add_status, mb->mbxStatus);
cb34990b
JS
6479
6480 ras_fwlog->ras_hwsupport = false;
d2cc9bcd
JS
6481 goto disable_ras;
6482 }
6483
95bfc6d8
JS
6484 spin_lock_irq(&phba->hbalock);
6485 ras_fwlog->state = ACTIVE;
6486 spin_unlock_irq(&phba->hbalock);
d2cc9bcd
JS
6487 mempool_free(pmb, phba->mbox_mem_pool);
6488
6489 return;
6490
6491disable_ras:
6492 /* Free RAS DMA memory */
6493 lpfc_sli4_ras_dma_free(phba);
6494 mempool_free(pmb, phba->mbox_mem_pool);
6495}
6496
6497/**
6498 * lpfc_sli4_ras_fwlog_init: Initialize memory and post RAS MBX command
6499 * @phba: pointer to lpfc hba data structure.
6500 * @fwlog_level: Logging verbosity level.
6501 * @fwlog_enable: Enable/Disable logging.
6502 *
6503 * Initialize memory and post mailbox command to enable FW logging in host
6504 * memory.
6505 **/
6506int
6507lpfc_sli4_ras_fwlog_init(struct lpfc_hba *phba,
6508 uint32_t fwlog_level,
6509 uint32_t fwlog_enable)
6510{
6511 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6512 struct lpfc_mbx_set_ras_fwlog *mbx_fwlog = NULL;
6513 struct lpfc_dmabuf *dmabuf;
6514 LPFC_MBOXQ_t *mbox;
6515 uint32_t len = 0, fwlog_buffsize, fwlog_entry_count;
6516 int rc = 0;
6517
95bfc6d8
JS
6518 spin_lock_irq(&phba->hbalock);
6519 ras_fwlog->state = INACTIVE;
6520 spin_unlock_irq(&phba->hbalock);
6521
d2cc9bcd
JS
6522 fwlog_buffsize = (LPFC_RAS_MIN_BUFF_POST_SIZE *
6523 phba->cfg_ras_fwlog_buffsize);
6524 fwlog_entry_count = (fwlog_buffsize/LPFC_RAS_MAX_ENTRY_SIZE);
6525
6526 /*
6527 * If re-enabling FW logging support use earlier allocated
6528 * DMA buffers while posting MBX command.
6529 **/
6530 if (!ras_fwlog->lwpd.virt) {
6531 rc = lpfc_sli4_ras_dma_alloc(phba, fwlog_entry_count);
6532 if (rc) {
6533 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
cb34990b 6534 "6189 FW Log Memory Allocation Failed");
d2cc9bcd
JS
6535 return rc;
6536 }
6537 }
6538
6539 /* Setup Mailbox command */
6540 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6541 if (!mbox) {
cb34990b 6542 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d2cc9bcd
JS
6543 "6190 RAS MBX Alloc Failed");
6544 rc = -ENOMEM;
6545 goto mem_free;
6546 }
6547
6548 ras_fwlog->fw_loglevel = fwlog_level;
6549 len = (sizeof(struct lpfc_mbx_set_ras_fwlog) -
6550 sizeof(struct lpfc_sli4_cfg_mhdr));
6551
6552 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_LOWLEVEL,
6553 LPFC_MBOX_OPCODE_SET_DIAG_LOG_OPTION,
6554 len, LPFC_SLI4_MBX_EMBED);
6555
6556 mbx_fwlog = (struct lpfc_mbx_set_ras_fwlog *)&mbox->u.mqe.un.ras_fwlog;
6557 bf_set(lpfc_fwlog_enable, &mbx_fwlog->u.request,
6558 fwlog_enable);
6559 bf_set(lpfc_fwlog_loglvl, &mbx_fwlog->u.request,
6560 ras_fwlog->fw_loglevel);
6561 bf_set(lpfc_fwlog_buffcnt, &mbx_fwlog->u.request,
6562 ras_fwlog->fw_buffcount);
6563 bf_set(lpfc_fwlog_buffsz, &mbx_fwlog->u.request,
6564 LPFC_RAS_MAX_ENTRY_SIZE/SLI4_PAGE_SIZE);
6565
6566 /* Update DMA buffer address */
6567 list_for_each_entry(dmabuf, &ras_fwlog->fwlog_buff_list, list) {
6568 memset(dmabuf->virt, 0, LPFC_RAS_MAX_ENTRY_SIZE);
6569
6570 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_lo =
6571 putPaddrLow(dmabuf->phys);
6572
6573 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_hi =
6574 putPaddrHigh(dmabuf->phys);
6575 }
6576
6577 /* Update LPWD address */
6578 mbx_fwlog->u.request.lwpd.addr_lo = putPaddrLow(ras_fwlog->lwpd.phys);
6579 mbx_fwlog->u.request.lwpd.addr_hi = putPaddrHigh(ras_fwlog->lwpd.phys);
6580
95bfc6d8
JS
6581 spin_lock_irq(&phba->hbalock);
6582 ras_fwlog->state = REG_INPROGRESS;
6583 spin_unlock_irq(&phba->hbalock);
d2cc9bcd
JS
6584 mbox->vport = phba->pport;
6585 mbox->mbox_cmpl = lpfc_sli4_ras_mbox_cmpl;
6586
6587 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
6588
6589 if (rc == MBX_NOT_FINISHED) {
cb34990b
JS
6590 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6591 "6191 FW-Log Mailbox failed. "
d2cc9bcd
JS
6592 "status %d mbxStatus : x%x", rc,
6593 bf_get(lpfc_mqe_status, &mbox->u.mqe));
6594 mempool_free(mbox, phba->mbox_mem_pool);
6595 rc = -EIO;
6596 goto mem_free;
6597 } else
6598 rc = 0;
6599mem_free:
6600 if (rc)
6601 lpfc_sli4_ras_dma_free(phba);
6602
6603 return rc;
6604}
6605
6606/**
6607 * lpfc_sli4_ras_setup - Check if RAS supported on the adapter
6608 * @phba: Pointer to HBA context object.
6609 *
6610 * Check if RAS is supported on the adapter and initialize it.
6611 **/
6612void
6613lpfc_sli4_ras_setup(struct lpfc_hba *phba)
6614{
6615 /* Check RAS FW Log needs to be enabled or not */
6616 if (lpfc_check_fwlog_support(phba))
6617 return;
6618
6619 lpfc_sli4_ras_fwlog_init(phba, phba->cfg_ras_fwlog_level,
6620 LPFC_RAS_ENABLE_LOGGING);
6621}
6622
6d368e53
JS
6623/**
6624 * lpfc_sli4_alloc_resource_identifiers - Allocate all SLI4 resource extents.
6625 * @phba: Pointer to HBA context object.
6626 *
6627 * This function allocates all SLI4 resource identifiers.
6628 **/
6629int
6630lpfc_sli4_alloc_resource_identifiers(struct lpfc_hba *phba)
6631{
6632 int i, rc, error = 0;
6633 uint16_t count, base;
6634 unsigned long longs;
6635
ff78d8f9
JS
6636 if (!phba->sli4_hba.rpi_hdrs_in_use)
6637 phba->sli4_hba.next_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
6d368e53
JS
6638 if (phba->sli4_hba.extents_in_use) {
6639 /*
6640 * The port supports resource extents. The XRI, VPI, VFI, RPI
6641 * resource extent count must be read and allocated before
6642 * provisioning the resource id arrays.
6643 */
6644 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
6645 LPFC_IDX_RSRC_RDY) {
6646 /*
6647 * Extent-based resources are set - the driver could
6648 * be in a port reset. Figure out if any corrective
6649 * actions need to be taken.
6650 */
6651 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6652 LPFC_RSC_TYPE_FCOE_VFI);
6653 if (rc != 0)
6654 error++;
6655 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6656 LPFC_RSC_TYPE_FCOE_VPI);
6657 if (rc != 0)
6658 error++;
6659 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6660 LPFC_RSC_TYPE_FCOE_XRI);
6661 if (rc != 0)
6662 error++;
6663 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6664 LPFC_RSC_TYPE_FCOE_RPI);
6665 if (rc != 0)
6666 error++;
6667
6668 /*
6669 * It's possible that the number of resources
6670 * provided to this port instance changed between
6671 * resets. Detect this condition and reallocate
6672 * resources. Otherwise, there is no action.
6673 */
6674 if (error) {
6675 lpfc_printf_log(phba, KERN_INFO,
6676 LOG_MBOX | LOG_INIT,
6677 "2931 Detected extent resource "
6678 "change. Reallocating all "
6679 "extents.\n");
6680 rc = lpfc_sli4_dealloc_extent(phba,
6681 LPFC_RSC_TYPE_FCOE_VFI);
6682 rc = lpfc_sli4_dealloc_extent(phba,
6683 LPFC_RSC_TYPE_FCOE_VPI);
6684 rc = lpfc_sli4_dealloc_extent(phba,
6685 LPFC_RSC_TYPE_FCOE_XRI);
6686 rc = lpfc_sli4_dealloc_extent(phba,
6687 LPFC_RSC_TYPE_FCOE_RPI);
6688 } else
6689 return 0;
6690 }
6691
6692 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6693 if (unlikely(rc))
6694 goto err_exit;
6695
6696 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6697 if (unlikely(rc))
6698 goto err_exit;
6699
6700 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6701 if (unlikely(rc))
6702 goto err_exit;
6703
6704 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6705 if (unlikely(rc))
6706 goto err_exit;
6707 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6708 LPFC_IDX_RSRC_RDY);
6709 return rc;
6710 } else {
6711 /*
6712 * The port does not support resource extents. The XRI, VPI,
6713 * VFI, RPI resource ids were determined from READ_CONFIG.
6714 * Just allocate the bitmasks and provision the resource id
6715 * arrays. If a port reset is active, the resources don't
6716 * need any action - just exit.
6717 */
6718 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
ff78d8f9
JS
6719 LPFC_IDX_RSRC_RDY) {
6720 lpfc_sli4_dealloc_resource_identifiers(phba);
6721 lpfc_sli4_remove_rpis(phba);
6722 }
6d368e53
JS
6723 /* RPIs. */
6724 count = phba->sli4_hba.max_cfg_param.max_rpi;
0a630c27
JS
6725 if (count <= 0) {
6726 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6727 "3279 Invalid provisioning of "
6728 "rpi:%d\n", count);
6729 rc = -EINVAL;
6730 goto err_exit;
6731 }
6d368e53
JS
6732 base = phba->sli4_hba.max_cfg_param.rpi_base;
6733 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6734 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
6735 sizeof(unsigned long),
6736 GFP_KERNEL);
6737 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
6738 rc = -ENOMEM;
6739 goto err_exit;
6740 }
6396bb22 6741 phba->sli4_hba.rpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6742 GFP_KERNEL);
6743 if (unlikely(!phba->sli4_hba.rpi_ids)) {
6744 rc = -ENOMEM;
6745 goto free_rpi_bmask;
6746 }
6747
6748 for (i = 0; i < count; i++)
6749 phba->sli4_hba.rpi_ids[i] = base + i;
6750
6751 /* VPIs. */
6752 count = phba->sli4_hba.max_cfg_param.max_vpi;
0a630c27
JS
6753 if (count <= 0) {
6754 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6755 "3280 Invalid provisioning of "
6756 "vpi:%d\n", count);
6757 rc = -EINVAL;
6758 goto free_rpi_ids;
6759 }
6d368e53
JS
6760 base = phba->sli4_hba.max_cfg_param.vpi_base;
6761 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6762 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
6763 GFP_KERNEL);
6764 if (unlikely(!phba->vpi_bmask)) {
6765 rc = -ENOMEM;
6766 goto free_rpi_ids;
6767 }
6396bb22 6768 phba->vpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6769 GFP_KERNEL);
6770 if (unlikely(!phba->vpi_ids)) {
6771 rc = -ENOMEM;
6772 goto free_vpi_bmask;
6773 }
6774
6775 for (i = 0; i < count; i++)
6776 phba->vpi_ids[i] = base + i;
6777
6778 /* XRIs. */
6779 count = phba->sli4_hba.max_cfg_param.max_xri;
0a630c27
JS
6780 if (count <= 0) {
6781 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6782 "3281 Invalid provisioning of "
6783 "xri:%d\n", count);
6784 rc = -EINVAL;
6785 goto free_vpi_ids;
6786 }
6d368e53
JS
6787 base = phba->sli4_hba.max_cfg_param.xri_base;
6788 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6789 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
6790 sizeof(unsigned long),
6791 GFP_KERNEL);
6792 if (unlikely(!phba->sli4_hba.xri_bmask)) {
6793 rc = -ENOMEM;
6794 goto free_vpi_ids;
6795 }
41899be7 6796 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 6797 phba->sli4_hba.xri_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6798 GFP_KERNEL);
6799 if (unlikely(!phba->sli4_hba.xri_ids)) {
6800 rc = -ENOMEM;
6801 goto free_xri_bmask;
6802 }
6803
6804 for (i = 0; i < count; i++)
6805 phba->sli4_hba.xri_ids[i] = base + i;
6806
6807 /* VFIs. */
6808 count = phba->sli4_hba.max_cfg_param.max_vfi;
0a630c27
JS
6809 if (count <= 0) {
6810 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6811 "3282 Invalid provisioning of "
6812 "vfi:%d\n", count);
6813 rc = -EINVAL;
6814 goto free_xri_ids;
6815 }
6d368e53
JS
6816 base = phba->sli4_hba.max_cfg_param.vfi_base;
6817 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6818 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
6819 sizeof(unsigned long),
6820 GFP_KERNEL);
6821 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
6822 rc = -ENOMEM;
6823 goto free_xri_ids;
6824 }
6396bb22 6825 phba->sli4_hba.vfi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6826 GFP_KERNEL);
6827 if (unlikely(!phba->sli4_hba.vfi_ids)) {
6828 rc = -ENOMEM;
6829 goto free_vfi_bmask;
6830 }
6831
6832 for (i = 0; i < count; i++)
6833 phba->sli4_hba.vfi_ids[i] = base + i;
6834
6835 /*
6836 * Mark all resources ready. An HBA reset doesn't need
6837 * to reset the initialization.
6838 */
6839 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6840 LPFC_IDX_RSRC_RDY);
6841 return 0;
6842 }
6843
6844 free_vfi_bmask:
6845 kfree(phba->sli4_hba.vfi_bmask);
cd60be49 6846 phba->sli4_hba.vfi_bmask = NULL;
6d368e53
JS
6847 free_xri_ids:
6848 kfree(phba->sli4_hba.xri_ids);
cd60be49 6849 phba->sli4_hba.xri_ids = NULL;
6d368e53
JS
6850 free_xri_bmask:
6851 kfree(phba->sli4_hba.xri_bmask);
cd60be49 6852 phba->sli4_hba.xri_bmask = NULL;
6d368e53
JS
6853 free_vpi_ids:
6854 kfree(phba->vpi_ids);
cd60be49 6855 phba->vpi_ids = NULL;
6d368e53
JS
6856 free_vpi_bmask:
6857 kfree(phba->vpi_bmask);
cd60be49 6858 phba->vpi_bmask = NULL;
6d368e53
JS
6859 free_rpi_ids:
6860 kfree(phba->sli4_hba.rpi_ids);
cd60be49 6861 phba->sli4_hba.rpi_ids = NULL;
6d368e53
JS
6862 free_rpi_bmask:
6863 kfree(phba->sli4_hba.rpi_bmask);
cd60be49 6864 phba->sli4_hba.rpi_bmask = NULL;
6d368e53
JS
6865 err_exit:
6866 return rc;
6867}
6868
6869/**
6870 * lpfc_sli4_dealloc_resource_identifiers - Deallocate all SLI4 resource extents.
6871 * @phba: Pointer to HBA context object.
6872 *
6873 * This function allocates the number of elements for the specified
6874 * resource type.
6875 **/
6876int
6877lpfc_sli4_dealloc_resource_identifiers(struct lpfc_hba *phba)
6878{
6879 if (phba->sli4_hba.extents_in_use) {
6880 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6881 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6882 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6883 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6884 } else {
6885 kfree(phba->vpi_bmask);
16a3a208 6886 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6887 kfree(phba->vpi_ids);
6888 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6889 kfree(phba->sli4_hba.xri_bmask);
6890 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6891 kfree(phba->sli4_hba.vfi_bmask);
6892 kfree(phba->sli4_hba.vfi_ids);
6893 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6894 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6895 }
6896
6897 return 0;
6898}
6899
b76f2dc9
JS
6900/**
6901 * lpfc_sli4_get_allocated_extnts - Get the port's allocated extents.
6902 * @phba: Pointer to HBA context object.
6903 * @type: The resource extent type.
6904 * @extnt_count: buffer to hold port extent count response
6905 * @extnt_size: buffer to hold port extent size response.
6906 *
6907 * This function calls the port to read the host allocated extents
6908 * for a particular type.
6909 **/
6910int
6911lpfc_sli4_get_allocated_extnts(struct lpfc_hba *phba, uint16_t type,
6912 uint16_t *extnt_cnt, uint16_t *extnt_size)
6913{
6914 bool emb;
6915 int rc = 0;
6916 uint16_t curr_blks = 0;
6917 uint32_t req_len, emb_len;
6918 uint32_t alloc_len, mbox_tmo;
6919 struct list_head *blk_list_head;
6920 struct lpfc_rsrc_blks *rsrc_blk;
6921 LPFC_MBOXQ_t *mbox;
6922 void *virtaddr = NULL;
6923 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
6924 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
6925 union lpfc_sli4_cfg_shdr *shdr;
6926
6927 switch (type) {
6928 case LPFC_RSC_TYPE_FCOE_VPI:
6929 blk_list_head = &phba->lpfc_vpi_blk_list;
6930 break;
6931 case LPFC_RSC_TYPE_FCOE_XRI:
6932 blk_list_head = &phba->sli4_hba.lpfc_xri_blk_list;
6933 break;
6934 case LPFC_RSC_TYPE_FCOE_VFI:
6935 blk_list_head = &phba->sli4_hba.lpfc_vfi_blk_list;
6936 break;
6937 case LPFC_RSC_TYPE_FCOE_RPI:
6938 blk_list_head = &phba->sli4_hba.lpfc_rpi_blk_list;
6939 break;
6940 default:
6941 return -EIO;
6942 }
6943
6944 /* Count the number of extents currently allocatd for this type. */
6945 list_for_each_entry(rsrc_blk, blk_list_head, list) {
6946 if (curr_blks == 0) {
6947 /*
6948 * The GET_ALLOCATED mailbox does not return the size,
6949 * just the count. The size should be just the size
6950 * stored in the current allocated block and all sizes
6951 * for an extent type are the same so set the return
6952 * value now.
6953 */
6954 *extnt_size = rsrc_blk->rsrc_size;
6955 }
6956 curr_blks++;
6957 }
6958
b76f2dc9
JS
6959 /*
6960 * Calculate the size of an embedded mailbox. The uint32_t
6961 * accounts for extents-specific word.
6962 */
6963 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
6964 sizeof(uint32_t);
6965
6966 /*
6967 * Presume the allocation and response will fit into an embedded
6968 * mailbox. If not true, reconfigure to a non-embedded mailbox.
6969 */
6970 emb = LPFC_SLI4_MBX_EMBED;
6971 req_len = emb_len;
6972 if (req_len > emb_len) {
6973 req_len = curr_blks * sizeof(uint16_t) +
6974 sizeof(union lpfc_sli4_cfg_shdr) +
6975 sizeof(uint32_t);
6976 emb = LPFC_SLI4_MBX_NEMBED;
6977 }
6978
6979 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6980 if (!mbox)
6981 return -ENOMEM;
6982 memset(mbox, 0, sizeof(LPFC_MBOXQ_t));
6983
6984 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6985 LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT,
6986 req_len, emb);
6987 if (alloc_len < req_len) {
6988 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6989 "2983 Allocated DMA memory size (x%x) is "
6990 "less than the requested DMA memory "
6991 "size (x%x)\n", alloc_len, req_len);
6992 rc = -ENOMEM;
6993 goto err_exit;
6994 }
6995 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, curr_blks, type, emb);
6996 if (unlikely(rc)) {
6997 rc = -EIO;
6998 goto err_exit;
6999 }
7000
7001 if (!phba->sli4_hba.intr_enable)
7002 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
7003 else {
a183a15f 7004 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
b76f2dc9
JS
7005 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
7006 }
7007
7008 if (unlikely(rc)) {
7009 rc = -EIO;
7010 goto err_exit;
7011 }
7012
7013 /*
7014 * Figure out where the response is located. Then get local pointers
7015 * to the response data. The port does not guarantee to respond to
7016 * all extents counts request so update the local variable with the
7017 * allocated count from the port.
7018 */
7019 if (emb == LPFC_SLI4_MBX_EMBED) {
7020 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
7021 shdr = &rsrc_ext->header.cfg_shdr;
7022 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
7023 } else {
7024 virtaddr = mbox->sge_array->addr[0];
7025 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
7026 shdr = &n_rsrc->cfg_shdr;
7027 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
7028 }
7029
7030 if (bf_get(lpfc_mbox_hdr_status, &shdr->response)) {
7031 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
7032 "2984 Failed to read allocated resources "
7033 "for type %d - Status 0x%x Add'l Status 0x%x.\n",
7034 type,
7035 bf_get(lpfc_mbox_hdr_status, &shdr->response),
7036 bf_get(lpfc_mbox_hdr_add_status, &shdr->response));
7037 rc = -EIO;
7038 goto err_exit;
7039 }
7040 err_exit:
7041 lpfc_sli4_mbox_cmd_free(phba, mbox);
7042 return rc;
7043}
7044
8a9d2e80 7045/**
0ef69968 7046 * lpfc_sli4_repost_sgl_list - Repost the buffers sgl pages as block
8a9d2e80 7047 * @phba: pointer to lpfc hba data structure.
895427bd
JS
7048 * @pring: Pointer to driver SLI ring object.
7049 * @sgl_list: linked link of sgl buffers to post
7050 * @cnt: number of linked list buffers
8a9d2e80 7051 *
895427bd 7052 * This routine walks the list of buffers that have been allocated and
8a9d2e80
JS
7053 * repost them to the port by using SGL block post. This is needed after a
7054 * pci_function_reset/warm_start or start. It attempts to construct blocks
895427bd
JS
7055 * of buffer sgls which contains contiguous xris and uses the non-embedded
7056 * SGL block post mailbox commands to post them to the port. For single
8a9d2e80
JS
7057 * buffer sgl with non-contiguous xri, if any, it shall use embedded SGL post
7058 * mailbox command for posting.
7059 *
7060 * Returns: 0 = success, non-zero failure.
7061 **/
7062static int
895427bd
JS
7063lpfc_sli4_repost_sgl_list(struct lpfc_hba *phba,
7064 struct list_head *sgl_list, int cnt)
8a9d2e80
JS
7065{
7066 struct lpfc_sglq *sglq_entry = NULL;
7067 struct lpfc_sglq *sglq_entry_next = NULL;
7068 struct lpfc_sglq *sglq_entry_first = NULL;
895427bd
JS
7069 int status, total_cnt;
7070 int post_cnt = 0, num_posted = 0, block_cnt = 0;
8a9d2e80
JS
7071 int last_xritag = NO_XRI;
7072 LIST_HEAD(prep_sgl_list);
7073 LIST_HEAD(blck_sgl_list);
7074 LIST_HEAD(allc_sgl_list);
7075 LIST_HEAD(post_sgl_list);
7076 LIST_HEAD(free_sgl_list);
7077
38c20673 7078 spin_lock_irq(&phba->hbalock);
895427bd
JS
7079 spin_lock(&phba->sli4_hba.sgl_list_lock);
7080 list_splice_init(sgl_list, &allc_sgl_list);
7081 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 7082 spin_unlock_irq(&phba->hbalock);
8a9d2e80 7083
895427bd 7084 total_cnt = cnt;
8a9d2e80
JS
7085 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
7086 &allc_sgl_list, list) {
7087 list_del_init(&sglq_entry->list);
7088 block_cnt++;
7089 if ((last_xritag != NO_XRI) &&
7090 (sglq_entry->sli4_xritag != last_xritag + 1)) {
7091 /* a hole in xri block, form a sgl posting block */
7092 list_splice_init(&prep_sgl_list, &blck_sgl_list);
7093 post_cnt = block_cnt - 1;
7094 /* prepare list for next posting block */
7095 list_add_tail(&sglq_entry->list, &prep_sgl_list);
7096 block_cnt = 1;
7097 } else {
7098 /* prepare list for next posting block */
7099 list_add_tail(&sglq_entry->list, &prep_sgl_list);
7100 /* enough sgls for non-embed sgl mbox command */
7101 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
7102 list_splice_init(&prep_sgl_list,
7103 &blck_sgl_list);
7104 post_cnt = block_cnt;
7105 block_cnt = 0;
7106 }
7107 }
7108 num_posted++;
7109
7110 /* keep track of last sgl's xritag */
7111 last_xritag = sglq_entry->sli4_xritag;
7112
895427bd
JS
7113 /* end of repost sgl list condition for buffers */
7114 if (num_posted == total_cnt) {
8a9d2e80
JS
7115 if (post_cnt == 0) {
7116 list_splice_init(&prep_sgl_list,
7117 &blck_sgl_list);
7118 post_cnt = block_cnt;
7119 } else if (block_cnt == 1) {
7120 status = lpfc_sli4_post_sgl(phba,
7121 sglq_entry->phys, 0,
7122 sglq_entry->sli4_xritag);
7123 if (!status) {
7124 /* successful, put sgl to posted list */
7125 list_add_tail(&sglq_entry->list,
7126 &post_sgl_list);
7127 } else {
7128 /* Failure, put sgl to free list */
7129 lpfc_printf_log(phba, KERN_WARNING,
7130 LOG_SLI,
895427bd 7131 "3159 Failed to post "
8a9d2e80
JS
7132 "sgl, xritag:x%x\n",
7133 sglq_entry->sli4_xritag);
7134 list_add_tail(&sglq_entry->list,
7135 &free_sgl_list);
711ea882 7136 total_cnt--;
8a9d2e80
JS
7137 }
7138 }
7139 }
7140
7141 /* continue until a nembed page worth of sgls */
7142 if (post_cnt == 0)
7143 continue;
7144
895427bd
JS
7145 /* post the buffer list sgls as a block */
7146 status = lpfc_sli4_post_sgl_list(phba, &blck_sgl_list,
7147 post_cnt);
8a9d2e80
JS
7148
7149 if (!status) {
7150 /* success, put sgl list to posted sgl list */
7151 list_splice_init(&blck_sgl_list, &post_sgl_list);
7152 } else {
7153 /* Failure, put sgl list to free sgl list */
7154 sglq_entry_first = list_first_entry(&blck_sgl_list,
7155 struct lpfc_sglq,
7156 list);
7157 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
895427bd 7158 "3160 Failed to post sgl-list, "
8a9d2e80
JS
7159 "xritag:x%x-x%x\n",
7160 sglq_entry_first->sli4_xritag,
7161 (sglq_entry_first->sli4_xritag +
7162 post_cnt - 1));
7163 list_splice_init(&blck_sgl_list, &free_sgl_list);
711ea882 7164 total_cnt -= post_cnt;
8a9d2e80
JS
7165 }
7166
7167 /* don't reset xirtag due to hole in xri block */
7168 if (block_cnt == 0)
7169 last_xritag = NO_XRI;
7170
895427bd 7171 /* reset sgl post count for next round of posting */
8a9d2e80
JS
7172 post_cnt = 0;
7173 }
7174
895427bd 7175 /* free the sgls failed to post */
8a9d2e80
JS
7176 lpfc_free_sgl_list(phba, &free_sgl_list);
7177
895427bd 7178 /* push sgls posted to the available list */
8a9d2e80 7179 if (!list_empty(&post_sgl_list)) {
38c20673 7180 spin_lock_irq(&phba->hbalock);
895427bd
JS
7181 spin_lock(&phba->sli4_hba.sgl_list_lock);
7182 list_splice_init(&post_sgl_list, sgl_list);
7183 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 7184 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
7185 } else {
7186 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 7187 "3161 Failure to post sgl to port.\n");
8a9d2e80
JS
7188 return -EIO;
7189 }
895427bd
JS
7190
7191 /* return the number of XRIs actually posted */
7192 return total_cnt;
8a9d2e80
JS
7193}
7194
0794d601 7195/**
5e5b511d 7196 * lpfc_sli4_repost_io_sgl_list - Repost all the allocated nvme buffer sgls
0794d601
JS
7197 * @phba: pointer to lpfc hba data structure.
7198 *
7199 * This routine walks the list of nvme buffers that have been allocated and
7200 * repost them to the port by using SGL block post. This is needed after a
7201 * pci_function_reset/warm_start or start. The lpfc_hba_down_post_s4 routine
7202 * is responsible for moving all nvme buffers on the lpfc_abts_nvme_sgl_list
5e5b511d 7203 * to the lpfc_io_buf_list. If the repost fails, reject all nvme buffers.
0794d601
JS
7204 *
7205 * Returns: 0 = success, non-zero failure.
7206 **/
3999df75 7207static int
5e5b511d 7208lpfc_sli4_repost_io_sgl_list(struct lpfc_hba *phba)
0794d601
JS
7209{
7210 LIST_HEAD(post_nblist);
7211 int num_posted, rc = 0;
7212
7213 /* get all NVME buffers need to repost to a local list */
5e5b511d 7214 lpfc_io_buf_flush(phba, &post_nblist);
0794d601
JS
7215
7216 /* post the list of nvme buffer sgls to port if available */
7217 if (!list_empty(&post_nblist)) {
5e5b511d
JS
7218 num_posted = lpfc_sli4_post_io_sgl_list(
7219 phba, &post_nblist, phba->sli4_hba.io_xri_cnt);
0794d601
JS
7220 /* failed to post any nvme buffer, return error */
7221 if (num_posted == 0)
7222 rc = -EIO;
7223 }
7224 return rc;
7225}
7226
3999df75 7227static void
61bda8f7
JS
7228lpfc_set_host_data(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
7229{
7230 uint32_t len;
7231
7232 len = sizeof(struct lpfc_mbx_set_host_data) -
7233 sizeof(struct lpfc_sli4_cfg_mhdr);
7234 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
7235 LPFC_MBOX_OPCODE_SET_HOST_DATA, len,
7236 LPFC_SLI4_MBX_EMBED);
7237
7238 mbox->u.mqe.un.set_host_data.param_id = LPFC_SET_HOST_OS_DRIVER_VERSION;
b2fd103b
JS
7239 mbox->u.mqe.un.set_host_data.param_len =
7240 LPFC_HOST_OS_DRIVER_VERSION_SIZE;
61bda8f7
JS
7241 snprintf(mbox->u.mqe.un.set_host_data.data,
7242 LPFC_HOST_OS_DRIVER_VERSION_SIZE,
7243 "Linux %s v"LPFC_DRIVER_VERSION,
7244 (phba->hba_flag & HBA_FCOE_MODE) ? "FCoE" : "FC");
7245}
7246
a8cf5dfe 7247int
6c621a22 7248lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
a8cf5dfe 7249 struct lpfc_queue *drq, int count, int idx)
6c621a22
JS
7250{
7251 int rc, i;
7252 struct lpfc_rqe hrqe;
7253 struct lpfc_rqe drqe;
7254 struct lpfc_rqb *rqbp;
411de511 7255 unsigned long flags;
6c621a22
JS
7256 struct rqb_dmabuf *rqb_buffer;
7257 LIST_HEAD(rqb_buf_list);
7258
411de511 7259 spin_lock_irqsave(&phba->hbalock, flags);
6c621a22
JS
7260 rqbp = hrq->rqbp;
7261 for (i = 0; i < count; i++) {
7262 /* IF RQ is already full, don't bother */
7263 if (rqbp->buffer_count + i >= rqbp->entry_count - 1)
7264 break;
7265 rqb_buffer = rqbp->rqb_alloc_buffer(phba);
7266 if (!rqb_buffer)
7267 break;
7268 rqb_buffer->hrq = hrq;
7269 rqb_buffer->drq = drq;
a8cf5dfe 7270 rqb_buffer->idx = idx;
6c621a22
JS
7271 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
7272 }
7273 while (!list_empty(&rqb_buf_list)) {
7274 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
7275 hbuf.list);
7276
7277 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
7278 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
7279 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
7280 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
7281 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
7282 if (rc < 0) {
411de511
JS
7283 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7284 "6421 Cannot post to HRQ %d: %x %x %x "
7285 "DRQ %x %x\n",
7286 hrq->queue_id,
7287 hrq->host_index,
7288 hrq->hba_index,
7289 hrq->entry_count,
7290 drq->host_index,
7291 drq->hba_index);
6c621a22
JS
7292 rqbp->rqb_free_buffer(phba, rqb_buffer);
7293 } else {
7294 list_add_tail(&rqb_buffer->hbuf.list,
7295 &rqbp->rqb_buffer_list);
7296 rqbp->buffer_count++;
7297 }
7298 }
411de511 7299 spin_unlock_irqrestore(&phba->hbalock, flags);
6c621a22
JS
7300 return 1;
7301}
7302
f0020e42
DK
7303static void lpfc_sli4_dip(struct lpfc_hba *phba)
7304{
7305 uint32_t if_type;
7306
7307 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7308 if (if_type == LPFC_SLI_INTF_IF_TYPE_2 ||
7309 if_type == LPFC_SLI_INTF_IF_TYPE_6) {
7310 struct lpfc_register reg_data;
7311
7312 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7313 &reg_data.word0))
7314 return;
7315
7316 if (bf_get(lpfc_sliport_status_dip, &reg_data))
7317 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7318 "2904 Firmware Dump Image Present"
7319 " on Adapter");
7320 }
7321}
7322
da0436e9 7323/**
183b8021 7324 * lpfc_sli4_hba_setup - SLI4 device initialization PCI function
da0436e9
JS
7325 * @phba: Pointer to HBA context object.
7326 *
183b8021
MY
7327 * This function is the main SLI4 device initialization PCI function. This
7328 * function is called by the HBA initialization code, HBA reset code and
da0436e9
JS
7329 * HBA error attention handler code. Caller is not required to hold any
7330 * locks.
7331 **/
7332int
7333lpfc_sli4_hba_setup(struct lpfc_hba *phba)
7334{
171f6c41 7335 int rc, i, cnt, len, dd;
da0436e9
JS
7336 LPFC_MBOXQ_t *mboxq;
7337 struct lpfc_mqe *mqe;
7338 uint8_t *vpd;
7339 uint32_t vpd_size;
7340 uint32_t ftr_rsp = 0;
7341 struct Scsi_Host *shost = lpfc_shost_from_vport(phba->pport);
7342 struct lpfc_vport *vport = phba->pport;
7343 struct lpfc_dmabuf *mp;
2d7dbc4c 7344 struct lpfc_rqb *rqbp;
da0436e9
JS
7345
7346 /* Perform a PCI function reset to start from clean */
7347 rc = lpfc_pci_function_reset(phba);
7348 if (unlikely(rc))
7349 return -ENODEV;
7350
7351 /* Check the HBA Host Status Register for readyness */
7352 rc = lpfc_sli4_post_status_check(phba);
7353 if (unlikely(rc))
7354 return -ENODEV;
7355 else {
7356 spin_lock_irq(&phba->hbalock);
7357 phba->sli.sli_flag |= LPFC_SLI_ACTIVE;
7358 spin_unlock_irq(&phba->hbalock);
7359 }
7360
f0020e42
DK
7361 lpfc_sli4_dip(phba);
7362
da0436e9
JS
7363 /*
7364 * Allocate a single mailbox container for initializing the
7365 * port.
7366 */
7367 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7368 if (!mboxq)
7369 return -ENOMEM;
7370
da0436e9 7371 /* Issue READ_REV to collect vpd and FW information. */
49198b37 7372 vpd_size = SLI4_PAGE_SIZE;
da0436e9
JS
7373 vpd = kzalloc(vpd_size, GFP_KERNEL);
7374 if (!vpd) {
7375 rc = -ENOMEM;
7376 goto out_free_mbox;
7377 }
7378
7379 rc = lpfc_sli4_read_rev(phba, mboxq, vpd, &vpd_size);
76a95d75
JS
7380 if (unlikely(rc)) {
7381 kfree(vpd);
7382 goto out_free_mbox;
7383 }
572709e2 7384
da0436e9 7385 mqe = &mboxq->u.mqe;
f1126688 7386 phba->sli_rev = bf_get(lpfc_mbx_rd_rev_sli_lvl, &mqe->un.read_rev);
b5c53958 7387 if (bf_get(lpfc_mbx_rd_rev_fcoe, &mqe->un.read_rev)) {
76a95d75 7388 phba->hba_flag |= HBA_FCOE_MODE;
b5c53958
JS
7389 phba->fcp_embed_io = 0; /* SLI4 FC support only */
7390 } else {
76a95d75 7391 phba->hba_flag &= ~HBA_FCOE_MODE;
b5c53958 7392 }
45ed1190
JS
7393
7394 if (bf_get(lpfc_mbx_rd_rev_cee_ver, &mqe->un.read_rev) ==
7395 LPFC_DCBX_CEE_MODE)
7396 phba->hba_flag |= HBA_FIP_SUPPORT;
7397 else
7398 phba->hba_flag &= ~HBA_FIP_SUPPORT;
7399
c00f62e6 7400 phba->hba_flag &= ~HBA_IOQ_FLUSH;
4f2e66c6 7401
c31098ce 7402 if (phba->sli_rev != LPFC_SLI_REV4) {
da0436e9
JS
7403 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7404 "0376 READ_REV Error. SLI Level %d "
7405 "FCoE enabled %d\n",
76a95d75 7406 phba->sli_rev, phba->hba_flag & HBA_FCOE_MODE);
da0436e9 7407 rc = -EIO;
76a95d75
JS
7408 kfree(vpd);
7409 goto out_free_mbox;
da0436e9 7410 }
cd1c8301 7411
ff78d8f9
JS
7412 /*
7413 * Continue initialization with default values even if driver failed
7414 * to read FCoE param config regions, only read parameters if the
7415 * board is FCoE
7416 */
7417 if (phba->hba_flag & HBA_FCOE_MODE &&
7418 lpfc_sli4_read_fcoe_params(phba))
7419 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_INIT,
7420 "2570 Failed to read FCoE parameters\n");
7421
cd1c8301
JS
7422 /*
7423 * Retrieve sli4 device physical port name, failure of doing it
7424 * is considered as non-fatal.
7425 */
7426 rc = lpfc_sli4_retrieve_pport_name(phba);
7427 if (!rc)
7428 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7429 "3080 Successful retrieving SLI4 device "
7430 "physical port name: %s.\n", phba->Port);
7431
b3b4f3e1
JS
7432 rc = lpfc_sli4_get_ctl_attr(phba);
7433 if (!rc)
7434 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7435 "8351 Successful retrieving SLI4 device "
7436 "CTL ATTR\n");
7437
da0436e9
JS
7438 /*
7439 * Evaluate the read rev and vpd data. Populate the driver
7440 * state with the results. If this routine fails, the failure
7441 * is not fatal as the driver will use generic values.
7442 */
7443 rc = lpfc_parse_vpd(phba, vpd, vpd_size);
7444 if (unlikely(!rc)) {
7445 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7446 "0377 Error %d parsing vpd. "
7447 "Using defaults.\n", rc);
7448 rc = 0;
7449 }
76a95d75 7450 kfree(vpd);
da0436e9 7451
f1126688
JS
7452 /* Save information as VPD data */
7453 phba->vpd.rev.biuRev = mqe->un.read_rev.first_hw_rev;
7454 phba->vpd.rev.smRev = mqe->un.read_rev.second_hw_rev;
4e565cf0
JS
7455
7456 /*
7457 * This is because first G7 ASIC doesn't support the standard
7458 * 0x5a NVME cmd descriptor type/subtype
7459 */
7460 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7461 LPFC_SLI_INTF_IF_TYPE_6) &&
7462 (phba->vpd.rev.biuRev == LPFC_G7_ASIC_1) &&
7463 (phba->vpd.rev.smRev == 0) &&
7464 (phba->cfg_nvme_embed_cmd == 1))
7465 phba->cfg_nvme_embed_cmd = 0;
7466
f1126688
JS
7467 phba->vpd.rev.endecRev = mqe->un.read_rev.third_hw_rev;
7468 phba->vpd.rev.fcphHigh = bf_get(lpfc_mbx_rd_rev_fcph_high,
7469 &mqe->un.read_rev);
7470 phba->vpd.rev.fcphLow = bf_get(lpfc_mbx_rd_rev_fcph_low,
7471 &mqe->un.read_rev);
7472 phba->vpd.rev.feaLevelHigh = bf_get(lpfc_mbx_rd_rev_ftr_lvl_high,
7473 &mqe->un.read_rev);
7474 phba->vpd.rev.feaLevelLow = bf_get(lpfc_mbx_rd_rev_ftr_lvl_low,
7475 &mqe->un.read_rev);
7476 phba->vpd.rev.sli1FwRev = mqe->un.read_rev.fw_id_rev;
7477 memcpy(phba->vpd.rev.sli1FwName, mqe->un.read_rev.fw_name, 16);
7478 phba->vpd.rev.sli2FwRev = mqe->un.read_rev.ulp_fw_id_rev;
7479 memcpy(phba->vpd.rev.sli2FwName, mqe->un.read_rev.ulp_fw_name, 16);
7480 phba->vpd.rev.opFwRev = mqe->un.read_rev.fw_id_rev;
7481 memcpy(phba->vpd.rev.opFwName, mqe->un.read_rev.fw_name, 16);
7482 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7483 "(%d):0380 READ_REV Status x%x "
7484 "fw_rev:%s fcphHi:%x fcphLo:%x flHi:%x flLo:%x\n",
7485 mboxq->vport ? mboxq->vport->vpi : 0,
7486 bf_get(lpfc_mqe_status, mqe),
7487 phba->vpd.rev.opFwName,
7488 phba->vpd.rev.fcphHigh, phba->vpd.rev.fcphLow,
7489 phba->vpd.rev.feaLevelHigh, phba->vpd.rev.feaLevelLow);
da0436e9 7490
65791f1f 7491 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7bdedb34
JS
7492 LPFC_SLI_INTF_IF_TYPE_0) {
7493 lpfc_set_features(phba, mboxq, LPFC_SET_UE_RECOVERY);
7494 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7495 if (rc == MBX_SUCCESS) {
7496 phba->hba_flag |= HBA_RECOVERABLE_UE;
7497 /* Set 1Sec interval to detect UE */
7498 phba->eratt_poll_interval = 1;
7499 phba->sli4_hba.ue_to_sr = bf_get(
7500 lpfc_mbx_set_feature_UESR,
7501 &mboxq->u.mqe.un.set_feature);
7502 phba->sli4_hba.ue_to_rp = bf_get(
7503 lpfc_mbx_set_feature_UERP,
7504 &mboxq->u.mqe.un.set_feature);
7505 }
7506 }
7507
7508 if (phba->cfg_enable_mds_diags && phba->mds_diags_support) {
7509 /* Enable MDS Diagnostics only if the SLI Port supports it */
7510 lpfc_set_features(phba, mboxq, LPFC_SET_MDS_DIAGS);
7511 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7512 if (rc != MBX_SUCCESS)
7513 phba->mds_diags_support = 0;
7514 }
572709e2 7515
da0436e9
JS
7516 /*
7517 * Discover the port's supported feature set and match it against the
7518 * hosts requests.
7519 */
7520 lpfc_request_features(phba, mboxq);
7521 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7522 if (unlikely(rc)) {
7523 rc = -EIO;
76a95d75 7524 goto out_free_mbox;
da0436e9
JS
7525 }
7526
7527 /*
7528 * The port must support FCP initiator mode as this is the
7529 * only mode running in the host.
7530 */
7531 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_fcpi, &mqe->un.req_ftrs))) {
7532 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7533 "0378 No support for fcpi mode.\n");
7534 ftr_rsp++;
7535 }
0bc2b7c5
JS
7536
7537 /* Performance Hints are ONLY for FCoE */
7538 if (phba->hba_flag & HBA_FCOE_MODE) {
7539 if (bf_get(lpfc_mbx_rq_ftr_rsp_perfh, &mqe->un.req_ftrs))
7540 phba->sli3_options |= LPFC_SLI4_PERFH_ENABLED;
7541 else
7542 phba->sli3_options &= ~LPFC_SLI4_PERFH_ENABLED;
7543 }
7544
da0436e9
JS
7545 /*
7546 * If the port cannot support the host's requested features
7547 * then turn off the global config parameters to disable the
7548 * feature in the driver. This is not a fatal error.
7549 */
f44ac12f
JS
7550 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
7551 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs))) {
7552 phba->cfg_enable_bg = 0;
7553 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
bf08611b 7554 ftr_rsp++;
f44ac12f 7555 }
bf08611b 7556 }
da0436e9
JS
7557
7558 if (phba->max_vpi && phba->cfg_enable_npiv &&
7559 !(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7560 ftr_rsp++;
7561
7562 if (ftr_rsp) {
7563 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7564 "0379 Feature Mismatch Data: x%08x %08x "
7565 "x%x x%x x%x\n", mqe->un.req_ftrs.word2,
7566 mqe->un.req_ftrs.word3, phba->cfg_enable_bg,
7567 phba->cfg_enable_npiv, phba->max_vpi);
7568 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs)))
7569 phba->cfg_enable_bg = 0;
7570 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7571 phba->cfg_enable_npiv = 0;
7572 }
7573
7574 /* These SLI3 features are assumed in SLI4 */
7575 spin_lock_irq(&phba->hbalock);
7576 phba->sli3_options |= (LPFC_SLI3_NPIV_ENABLED | LPFC_SLI3_HBQ_ENABLED);
7577 spin_unlock_irq(&phba->hbalock);
7578
171f6c41
JS
7579 /* Always try to enable dual dump feature if we can */
7580 lpfc_set_features(phba, mboxq, LPFC_SET_DUAL_DUMP);
7581 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7582 dd = bf_get(lpfc_mbx_set_feature_dd, &mboxq->u.mqe.un.set_feature);
7583 if ((rc == MBX_SUCCESS) && (dd == LPFC_ENABLE_DUAL_DUMP))
7584 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_INIT,
7585 "6448 Dual Dump is enabled\n");
7586 else
7587 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_INIT,
7588 "6447 Dual Dump Mailbox x%x (x%x/x%x) failed, "
7589 "rc:x%x dd:x%x\n",
7590 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
7591 lpfc_sli_config_mbox_subsys_get(
7592 phba, mboxq),
7593 lpfc_sli_config_mbox_opcode_get(
7594 phba, mboxq),
7595 rc, dd);
6d368e53
JS
7596 /*
7597 * Allocate all resources (xri,rpi,vpi,vfi) now. Subsequent
7598 * calls depends on these resources to complete port setup.
7599 */
7600 rc = lpfc_sli4_alloc_resource_identifiers(phba);
7601 if (rc) {
7602 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7603 "2920 Failed to alloc Resource IDs "
7604 "rc = x%x\n", rc);
7605 goto out_free_mbox;
7606 }
7607
61bda8f7
JS
7608 lpfc_set_host_data(phba, mboxq);
7609
7610 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7611 if (rc) {
7612 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7613 "2134 Failed to set host os driver version %x",
7614 rc);
7615 }
7616
da0436e9 7617 /* Read the port's service parameters. */
9f1177a3
JS
7618 rc = lpfc_read_sparam(phba, mboxq, vport->vpi);
7619 if (rc) {
7620 phba->link_state = LPFC_HBA_ERROR;
7621 rc = -ENOMEM;
76a95d75 7622 goto out_free_mbox;
9f1177a3
JS
7623 }
7624
da0436e9
JS
7625 mboxq->vport = vport;
7626 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3e1f0718 7627 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
7628 if (rc == MBX_SUCCESS) {
7629 memcpy(&vport->fc_sparam, mp->virt, sizeof(struct serv_parm));
7630 rc = 0;
7631 }
7632
7633 /*
7634 * This memory was allocated by the lpfc_read_sparam routine. Release
7635 * it to the mbuf pool.
7636 */
7637 lpfc_mbuf_free(phba, mp->virt, mp->phys);
7638 kfree(mp);
3e1f0718 7639 mboxq->ctx_buf = NULL;
da0436e9
JS
7640 if (unlikely(rc)) {
7641 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7642 "0382 READ_SPARAM command failed "
7643 "status %d, mbxStatus x%x\n",
7644 rc, bf_get(lpfc_mqe_status, mqe));
7645 phba->link_state = LPFC_HBA_ERROR;
7646 rc = -EIO;
76a95d75 7647 goto out_free_mbox;
da0436e9
JS
7648 }
7649
0558056c 7650 lpfc_update_vport_wwn(vport);
da0436e9
JS
7651
7652 /* Update the fc_host data structures with new wwn. */
7653 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
7654 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
7655
895427bd
JS
7656 /* Create all the SLI4 queues */
7657 rc = lpfc_sli4_queue_create(phba);
7658 if (rc) {
7659 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7660 "3089 Failed to allocate queues\n");
7661 rc = -ENODEV;
7662 goto out_free_mbox;
7663 }
7664 /* Set up all the queues to the device */
7665 rc = lpfc_sli4_queue_setup(phba);
7666 if (unlikely(rc)) {
7667 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7668 "0381 Error %d during queue setup.\n ", rc);
7669 goto out_stop_timers;
7670 }
7671 /* Initialize the driver internal SLI layer lists. */
7672 lpfc_sli4_setup(phba);
7673 lpfc_sli4_queue_init(phba);
7674
7675 /* update host els xri-sgl sizes and mappings */
7676 rc = lpfc_sli4_els_sgl_update(phba);
8a9d2e80
JS
7677 if (unlikely(rc)) {
7678 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7679 "1400 Failed to update xri-sgl size and "
7680 "mapping: %d\n", rc);
895427bd 7681 goto out_destroy_queue;
da0436e9
JS
7682 }
7683
8a9d2e80 7684 /* register the els sgl pool to the port */
895427bd
JS
7685 rc = lpfc_sli4_repost_sgl_list(phba, &phba->sli4_hba.lpfc_els_sgl_list,
7686 phba->sli4_hba.els_xri_cnt);
7687 if (unlikely(rc < 0)) {
8a9d2e80
JS
7688 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7689 "0582 Error %d during els sgl post "
7690 "operation\n", rc);
7691 rc = -ENODEV;
895427bd 7692 goto out_destroy_queue;
8a9d2e80 7693 }
895427bd 7694 phba->sli4_hba.els_xri_cnt = rc;
8a9d2e80 7695
f358dd0c
JS
7696 if (phba->nvmet_support) {
7697 /* update host nvmet xri-sgl sizes and mappings */
7698 rc = lpfc_sli4_nvmet_sgl_update(phba);
7699 if (unlikely(rc)) {
7700 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7701 "6308 Failed to update nvmet-sgl size "
7702 "and mapping: %d\n", rc);
7703 goto out_destroy_queue;
7704 }
7705
7706 /* register the nvmet sgl pool to the port */
7707 rc = lpfc_sli4_repost_sgl_list(
7708 phba,
7709 &phba->sli4_hba.lpfc_nvmet_sgl_list,
7710 phba->sli4_hba.nvmet_xri_cnt);
7711 if (unlikely(rc < 0)) {
7712 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7713 "3117 Error %d during nvmet "
7714 "sgl post\n", rc);
7715 rc = -ENODEV;
7716 goto out_destroy_queue;
7717 }
7718 phba->sli4_hba.nvmet_xri_cnt = rc;
6c621a22 7719
a5f7337f
JS
7720 /* We allocate an iocbq for every receive context SGL.
7721 * The additional allocation is for abort and ls handling.
7722 */
7723 cnt = phba->sli4_hba.nvmet_xri_cnt +
7724 phba->sli4_hba.max_cfg_param.max_xri;
f358dd0c 7725 } else {
0794d601 7726 /* update host common xri-sgl sizes and mappings */
5e5b511d 7727 rc = lpfc_sli4_io_sgl_update(phba);
895427bd
JS
7728 if (unlikely(rc)) {
7729 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
0794d601 7730 "6082 Failed to update nvme-sgl size "
895427bd
JS
7731 "and mapping: %d\n", rc);
7732 goto out_destroy_queue;
7733 }
7734
0794d601 7735 /* register the allocated common sgl pool to the port */
5e5b511d 7736 rc = lpfc_sli4_repost_io_sgl_list(phba);
895427bd
JS
7737 if (unlikely(rc)) {
7738 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
0794d601
JS
7739 "6116 Error %d during nvme sgl post "
7740 "operation\n", rc);
7741 /* Some NVME buffers were moved to abort nvme list */
7742 /* A pci function reset will repost them */
7743 rc = -ENODEV;
895427bd
JS
7744 goto out_destroy_queue;
7745 }
a5f7337f
JS
7746 /* Each lpfc_io_buf job structure has an iocbq element.
7747 * This cnt provides for abort, els, ct and ls requests.
7748 */
7749 cnt = phba->sli4_hba.max_cfg_param.max_xri;
11e644e2
JS
7750 }
7751
7752 if (!phba->sli.iocbq_lookup) {
6c621a22
JS
7753 /* Initialize and populate the iocb list per host */
7754 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a5f7337f
JS
7755 "2821 initialize iocb list with %d entries\n",
7756 cnt);
6c621a22
JS
7757 rc = lpfc_init_iocb_list(phba, cnt);
7758 if (rc) {
7759 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11e644e2 7760 "1413 Failed to init iocb list.\n");
6c621a22
JS
7761 goto out_destroy_queue;
7762 }
895427bd
JS
7763 }
7764
11e644e2
JS
7765 if (phba->nvmet_support)
7766 lpfc_nvmet_create_targetport(phba);
7767
2d7dbc4c 7768 if (phba->nvmet_support && phba->cfg_nvmet_mrq) {
2d7dbc4c
JS
7769 /* Post initial buffers to all RQs created */
7770 for (i = 0; i < phba->cfg_nvmet_mrq; i++) {
7771 rqbp = phba->sli4_hba.nvmet_mrq_hdr[i]->rqbp;
7772 INIT_LIST_HEAD(&rqbp->rqb_buffer_list);
7773 rqbp->rqb_alloc_buffer = lpfc_sli4_nvmet_alloc;
7774 rqbp->rqb_free_buffer = lpfc_sli4_nvmet_free;
61f3d4bf 7775 rqbp->entry_count = LPFC_NVMET_RQE_DEF_COUNT;
2d7dbc4c
JS
7776 rqbp->buffer_count = 0;
7777
2d7dbc4c
JS
7778 lpfc_post_rq_buffer(
7779 phba, phba->sli4_hba.nvmet_mrq_hdr[i],
7780 phba->sli4_hba.nvmet_mrq_data[i],
2448e484 7781 phba->cfg_nvmet_mrq_post, i);
2d7dbc4c
JS
7782 }
7783 }
7784
da0436e9
JS
7785 /* Post the rpi header region to the device. */
7786 rc = lpfc_sli4_post_all_rpi_hdrs(phba);
7787 if (unlikely(rc)) {
7788 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7789 "0393 Error %d during rpi post operation\n",
7790 rc);
7791 rc = -ENODEV;
895427bd 7792 goto out_destroy_queue;
da0436e9 7793 }
97f2ecf1 7794 lpfc_sli4_node_prep(phba);
da0436e9 7795
895427bd 7796 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
2d7dbc4c 7797 if ((phba->nvmet_support == 0) || (phba->cfg_nvmet_mrq == 1)) {
895427bd
JS
7798 /*
7799 * The FC Port needs to register FCFI (index 0)
7800 */
7801 lpfc_reg_fcfi(phba, mboxq);
7802 mboxq->vport = phba->pport;
7803 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7804 if (rc != MBX_SUCCESS)
7805 goto out_unset_queue;
7806 rc = 0;
7807 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_fcfi,
7808 &mboxq->u.mqe.un.reg_fcfi);
2d7dbc4c
JS
7809 } else {
7810 /* We are a NVME Target mode with MRQ > 1 */
7811
7812 /* First register the FCFI */
7813 lpfc_reg_fcfi_mrq(phba, mboxq, 0);
7814 mboxq->vport = phba->pport;
7815 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7816 if (rc != MBX_SUCCESS)
7817 goto out_unset_queue;
7818 rc = 0;
7819 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_mrq_fcfi,
7820 &mboxq->u.mqe.un.reg_fcfi_mrq);
7821
7822 /* Next register the MRQs */
7823 lpfc_reg_fcfi_mrq(phba, mboxq, 1);
7824 mboxq->vport = phba->pport;
7825 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7826 if (rc != MBX_SUCCESS)
7827 goto out_unset_queue;
7828 rc = 0;
895427bd
JS
7829 }
7830 /* Check if the port is configured to be disabled */
7831 lpfc_sli_read_link_ste(phba);
da0436e9
JS
7832 }
7833
c490850a
JS
7834 /* Don't post more new bufs if repost already recovered
7835 * the nvme sgls.
7836 */
7837 if (phba->nvmet_support == 0) {
7838 if (phba->sli4_hba.io_xri_cnt == 0) {
7839 len = lpfc_new_io_buf(
7840 phba, phba->sli4_hba.io_xri_max);
7841 if (len == 0) {
7842 rc = -ENOMEM;
7843 goto out_unset_queue;
7844 }
7845
7846 if (phba->cfg_xri_rebalancing)
7847 lpfc_create_multixri_pools(phba);
7848 }
7849 } else {
7850 phba->cfg_xri_rebalancing = 0;
7851 }
7852
da0436e9
JS
7853 /* Allow asynchronous mailbox command to go through */
7854 spin_lock_irq(&phba->hbalock);
7855 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
7856 spin_unlock_irq(&phba->hbalock);
7857
7858 /* Post receive buffers to the device */
7859 lpfc_sli4_rb_setup(phba);
7860
fc2b989b
JS
7861 /* Reset HBA FCF states after HBA reset */
7862 phba->fcf.fcf_flag = 0;
7863 phba->fcf.current_rec.flag = 0;
7864
da0436e9 7865 /* Start the ELS watchdog timer */
8fa38513 7866 mod_timer(&vport->els_tmofunc,
256ec0d0 7867 jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov * 2)));
da0436e9
JS
7868
7869 /* Start heart beat timer */
7870 mod_timer(&phba->hb_tmofunc,
256ec0d0 7871 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
da0436e9
JS
7872 phba->hb_outstanding = 0;
7873 phba->last_completion_time = jiffies;
7874
32517fc0
JS
7875 /* start eq_delay heartbeat */
7876 if (phba->cfg_auto_imax)
7877 queue_delayed_work(phba->wq, &phba->eq_delay_work,
7878 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
7879
da0436e9 7880 /* Start error attention (ERATT) polling timer */
256ec0d0 7881 mod_timer(&phba->eratt_poll,
65791f1f 7882 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
da0436e9 7883
75baf696
JS
7884 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
7885 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
7886 rc = pci_enable_pcie_error_reporting(phba->pcidev);
7887 if (!rc) {
7888 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7889 "2829 This device supports "
7890 "Advanced Error Reporting (AER)\n");
7891 spin_lock_irq(&phba->hbalock);
7892 phba->hba_flag |= HBA_AER_ENABLED;
7893 spin_unlock_irq(&phba->hbalock);
7894 } else {
7895 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7896 "2830 This device does not support "
7897 "Advanced Error Reporting (AER)\n");
7898 phba->cfg_aer_support = 0;
7899 }
0a96e975 7900 rc = 0;
75baf696
JS
7901 }
7902
da0436e9
JS
7903 /*
7904 * The port is ready, set the host's link state to LINK_DOWN
7905 * in preparation for link interrupts.
7906 */
da0436e9
JS
7907 spin_lock_irq(&phba->hbalock);
7908 phba->link_state = LPFC_LINK_DOWN;
1dc5ec24
JS
7909
7910 /* Check if physical ports are trunked */
7911 if (bf_get(lpfc_conf_trunk_port0, &phba->sli4_hba))
7912 phba->trunk_link.link0.state = LPFC_LINK_DOWN;
7913 if (bf_get(lpfc_conf_trunk_port1, &phba->sli4_hba))
7914 phba->trunk_link.link1.state = LPFC_LINK_DOWN;
7915 if (bf_get(lpfc_conf_trunk_port2, &phba->sli4_hba))
7916 phba->trunk_link.link2.state = LPFC_LINK_DOWN;
7917 if (bf_get(lpfc_conf_trunk_port3, &phba->sli4_hba))
7918 phba->trunk_link.link3.state = LPFC_LINK_DOWN;
da0436e9 7919 spin_unlock_irq(&phba->hbalock);
1dc5ec24 7920
e8869f5b
JS
7921 /* Arm the CQs and then EQs on device */
7922 lpfc_sli4_arm_cqeq_intr(phba);
7923
7924 /* Indicate device interrupt mode */
7925 phba->sli4_hba.intr_enable = 1;
7926
026abb87
JS
7927 if (!(phba->hba_flag & HBA_FCOE_MODE) &&
7928 (phba->hba_flag & LINK_DISABLED)) {
7929 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7930 "3103 Adapter Link is disabled.\n");
7931 lpfc_down_link(phba, mboxq);
7932 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7933 if (rc != MBX_SUCCESS) {
7934 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7935 "3104 Adapter failed to issue "
7936 "DOWN_LINK mbox cmd, rc:x%x\n", rc);
c490850a 7937 goto out_io_buff_free;
026abb87
JS
7938 }
7939 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
1b51197d
JS
7940 /* don't perform init_link on SLI4 FC port loopback test */
7941 if (!(phba->link_flag & LS_LOOPBACK_MODE)) {
7942 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
7943 if (rc)
c490850a 7944 goto out_io_buff_free;
1b51197d 7945 }
5350d872
JS
7946 }
7947 mempool_free(mboxq, phba->mbox_mem_pool);
7948 return rc;
c490850a
JS
7949out_io_buff_free:
7950 /* Free allocated IO Buffers */
7951 lpfc_io_free(phba);
76a95d75 7952out_unset_queue:
da0436e9 7953 /* Unset all the queues set up in this routine when error out */
5350d872
JS
7954 lpfc_sli4_queue_unset(phba);
7955out_destroy_queue:
6c621a22 7956 lpfc_free_iocb_list(phba);
5350d872 7957 lpfc_sli4_queue_destroy(phba);
da0436e9 7958out_stop_timers:
5350d872 7959 lpfc_stop_hba_timers(phba);
da0436e9
JS
7960out_free_mbox:
7961 mempool_free(mboxq, phba->mbox_mem_pool);
7962 return rc;
7963}
7964
7965/**
7966 * lpfc_mbox_timeout - Timeout call back function for mbox timer
7967 * @ptr: context object - pointer to hba structure.
7968 *
7969 * This is the callback function for mailbox timer. The mailbox
7970 * timer is armed when a new mailbox command is issued and the timer
7971 * is deleted when the mailbox complete. The function is called by
7972 * the kernel timer code when a mailbox does not complete within
7973 * expected time. This function wakes up the worker thread to
7974 * process the mailbox timeout and returns. All the processing is
7975 * done by the worker thread function lpfc_mbox_timeout_handler.
7976 **/
7977void
f22eb4d3 7978lpfc_mbox_timeout(struct timer_list *t)
da0436e9 7979{
f22eb4d3 7980 struct lpfc_hba *phba = from_timer(phba, t, sli.mbox_tmo);
da0436e9
JS
7981 unsigned long iflag;
7982 uint32_t tmo_posted;
7983
7984 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
7985 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
7986 if (!tmo_posted)
7987 phba->pport->work_port_events |= WORKER_MBOX_TMO;
7988 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
7989
7990 if (!tmo_posted)
7991 lpfc_worker_wake_up(phba);
7992 return;
7993}
7994
e8d3c3b1
JS
7995/**
7996 * lpfc_sli4_mbox_completions_pending - check to see if any mailbox completions
7997 * are pending
7998 * @phba: Pointer to HBA context object.
7999 *
8000 * This function checks if any mailbox completions are present on the mailbox
8001 * completion queue.
8002 **/
3bb11fc5 8003static bool
e8d3c3b1
JS
8004lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba)
8005{
8006
8007 uint32_t idx;
8008 struct lpfc_queue *mcq;
8009 struct lpfc_mcqe *mcqe;
8010 bool pending_completions = false;
7365f6fd 8011 uint8_t qe_valid;
e8d3c3b1
JS
8012
8013 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
8014 return false;
8015
8016 /* Check for completions on mailbox completion queue */
8017
8018 mcq = phba->sli4_hba.mbx_cq;
8019 idx = mcq->hba_index;
7365f6fd 8020 qe_valid = mcq->qe_valid;
9afbee3d
JS
8021 while (bf_get_le32(lpfc_cqe_valid,
8022 (struct lpfc_cqe *)lpfc_sli4_qe(mcq, idx)) == qe_valid) {
8023 mcqe = (struct lpfc_mcqe *)(lpfc_sli4_qe(mcq, idx));
e8d3c3b1
JS
8024 if (bf_get_le32(lpfc_trailer_completed, mcqe) &&
8025 (!bf_get_le32(lpfc_trailer_async, mcqe))) {
8026 pending_completions = true;
8027 break;
8028 }
8029 idx = (idx + 1) % mcq->entry_count;
8030 if (mcq->hba_index == idx)
8031 break;
7365f6fd
JS
8032
8033 /* if the index wrapped around, toggle the valid bit */
8034 if (phba->sli4_hba.pc_sli4_params.cqav && !idx)
8035 qe_valid = (qe_valid) ? 0 : 1;
e8d3c3b1
JS
8036 }
8037 return pending_completions;
8038
8039}
8040
8041/**
8042 * lpfc_sli4_process_missed_mbox_completions - process mbox completions
8043 * that were missed.
8044 * @phba: Pointer to HBA context object.
8045 *
8046 * For sli4, it is possible to miss an interrupt. As such mbox completions
8047 * maybe missed causing erroneous mailbox timeouts to occur. This function
8048 * checks to see if mbox completions are on the mailbox completion queue
8049 * and will process all the completions associated with the eq for the
8050 * mailbox completion queue.
8051 **/
d7b761b0 8052static bool
e8d3c3b1
JS
8053lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba)
8054{
b71413dd 8055 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
e8d3c3b1
JS
8056 uint32_t eqidx;
8057 struct lpfc_queue *fpeq = NULL;
657add4e 8058 struct lpfc_queue *eq;
e8d3c3b1
JS
8059 bool mbox_pending;
8060
8061 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
8062 return false;
8063
657add4e
JS
8064 /* Find the EQ associated with the mbox CQ */
8065 if (sli4_hba->hdwq) {
8066 for (eqidx = 0; eqidx < phba->cfg_irq_chann; eqidx++) {
8067 eq = phba->sli4_hba.hba_eq_hdl[eqidx].eq;
535fb49e 8068 if (eq && eq->queue_id == sli4_hba->mbx_cq->assoc_qid) {
657add4e 8069 fpeq = eq;
e8d3c3b1
JS
8070 break;
8071 }
657add4e
JS
8072 }
8073 }
e8d3c3b1
JS
8074 if (!fpeq)
8075 return false;
8076
8077 /* Turn off interrupts from this EQ */
8078
b71413dd 8079 sli4_hba->sli4_eq_clr_intr(fpeq);
e8d3c3b1
JS
8080
8081 /* Check to see if a mbox completion is pending */
8082
8083 mbox_pending = lpfc_sli4_mbox_completions_pending(phba);
8084
8085 /*
8086 * If a mbox completion is pending, process all the events on EQ
8087 * associated with the mbox completion queue (this could include
8088 * mailbox commands, async events, els commands, receive queue data
8089 * and fcp commands)
8090 */
8091
8092 if (mbox_pending)
32517fc0 8093 /* process and rearm the EQ */
93a4d6f4 8094 lpfc_sli4_process_eq(phba, fpeq, LPFC_QUEUE_REARM);
32517fc0
JS
8095 else
8096 /* Always clear and re-arm the EQ */
8097 sli4_hba->sli4_write_eq_db(phba, fpeq, 0, LPFC_QUEUE_REARM);
e8d3c3b1
JS
8098
8099 return mbox_pending;
8100
8101}
da0436e9
JS
8102
8103/**
8104 * lpfc_mbox_timeout_handler - Worker thread function to handle mailbox timeout
8105 * @phba: Pointer to HBA context object.
8106 *
8107 * This function is called from worker thread when a mailbox command times out.
8108 * The caller is not required to hold any locks. This function will reset the
8109 * HBA and recover all the pending commands.
8110 **/
8111void
8112lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
8113{
8114 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
eb016566
JS
8115 MAILBOX_t *mb = NULL;
8116
da0436e9 8117 struct lpfc_sli *psli = &phba->sli;
da0436e9 8118
e8d3c3b1
JS
8119 /* If the mailbox completed, process the completion and return */
8120 if (lpfc_sli4_process_missed_mbox_completions(phba))
8121 return;
8122
eb016566
JS
8123 if (pmbox != NULL)
8124 mb = &pmbox->u.mb;
da0436e9
JS
8125 /* Check the pmbox pointer first. There is a race condition
8126 * between the mbox timeout handler getting executed in the
8127 * worklist and the mailbox actually completing. When this
8128 * race condition occurs, the mbox_active will be NULL.
8129 */
8130 spin_lock_irq(&phba->hbalock);
8131 if (pmbox == NULL) {
8132 lpfc_printf_log(phba, KERN_WARNING,
8133 LOG_MBOX | LOG_SLI,
8134 "0353 Active Mailbox cleared - mailbox timeout "
8135 "exiting\n");
8136 spin_unlock_irq(&phba->hbalock);
8137 return;
8138 }
8139
8140 /* Mbox cmd <mbxCommand> timeout */
8141 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
32350664 8142 "0310 Mailbox command x%x timeout Data: x%x x%x x%px\n",
da0436e9
JS
8143 mb->mbxCommand,
8144 phba->pport->port_state,
8145 phba->sli.sli_flag,
8146 phba->sli.mbox_active);
8147 spin_unlock_irq(&phba->hbalock);
8148
8149 /* Setting state unknown so lpfc_sli_abort_iocb_ring
8150 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
25985edc 8151 * it to fail all outstanding SCSI IO.
da0436e9
JS
8152 */
8153 spin_lock_irq(&phba->pport->work_port_lock);
8154 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
8155 spin_unlock_irq(&phba->pport->work_port_lock);
8156 spin_lock_irq(&phba->hbalock);
8157 phba->link_state = LPFC_LINK_UNKNOWN;
f4b4c68f 8158 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
da0436e9
JS
8159 spin_unlock_irq(&phba->hbalock);
8160
db55fba8 8161 lpfc_sli_abort_fcp_rings(phba);
da0436e9
JS
8162
8163 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8164 "0345 Resetting board due to mailbox timeout\n");
8165
8166 /* Reset the HBA device */
8167 lpfc_reset_hba(phba);
8168}
8169
8170/**
8171 * lpfc_sli_issue_mbox_s3 - Issue an SLI3 mailbox command to firmware
8172 * @phba: Pointer to HBA context object.
8173 * @pmbox: Pointer to mailbox object.
8174 * @flag: Flag indicating how the mailbox need to be processed.
8175 *
8176 * This function is called by discovery code and HBA management code
8177 * to submit a mailbox command to firmware with SLI-3 interface spec. This
8178 * function gets the hbalock to protect the data structures.
8179 * The mailbox command can be submitted in polling mode, in which case
8180 * this function will wait in a polling loop for the completion of the
8181 * mailbox.
8182 * If the mailbox is submitted in no_wait mode (not polling) the
8183 * function will submit the command and returns immediately without waiting
8184 * for the mailbox completion. The no_wait is supported only when HBA
8185 * is in SLI2/SLI3 mode - interrupts are enabled.
8186 * The SLI interface allows only one mailbox pending at a time. If the
8187 * mailbox is issued in polling mode and there is already a mailbox
8188 * pending, then the function will return an error. If the mailbox is issued
8189 * in NO_WAIT mode and there is a mailbox pending already, the function
8190 * will return MBX_BUSY after queuing the mailbox into mailbox queue.
8191 * The sli layer owns the mailbox object until the completion of mailbox
8192 * command if this function return MBX_BUSY or MBX_SUCCESS. For all other
8193 * return codes the caller owns the mailbox command after the return of
8194 * the function.
e59058c4 8195 **/
3772a991
JS
8196static int
8197lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
8198 uint32_t flag)
dea3101e 8199{
bf07bdea 8200 MAILBOX_t *mbx;
2e0fef85 8201 struct lpfc_sli *psli = &phba->sli;
dea3101e 8202 uint32_t status, evtctr;
9940b97b 8203 uint32_t ha_copy, hc_copy;
dea3101e 8204 int i;
09372820 8205 unsigned long timeout;
dea3101e 8206 unsigned long drvr_flag = 0;
34b02dcd 8207 uint32_t word0, ldata;
dea3101e 8208 void __iomem *to_slim;
58da1ffb
JS
8209 int processing_queue = 0;
8210
8211 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8212 if (!pmbox) {
8568a4d2 8213 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
58da1ffb 8214 /* processing mbox queue from intr_handler */
3772a991
JS
8215 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8216 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8217 return MBX_SUCCESS;
8218 }
58da1ffb 8219 processing_queue = 1;
58da1ffb
JS
8220 pmbox = lpfc_mbox_get(phba);
8221 if (!pmbox) {
8222 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8223 return MBX_SUCCESS;
8224 }
8225 }
dea3101e 8226
ed957684 8227 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 8228 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684 8229 if(!pmbox->vport) {
58da1ffb 8230 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
ed957684 8231 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 8232 LOG_MBOX | LOG_VPORT,
e8b62011 8233 "1806 Mbox x%x failed. No vport\n",
3772a991 8234 pmbox->u.mb.mbxCommand);
ed957684 8235 dump_stack();
58da1ffb 8236 goto out_not_finished;
ed957684
JS
8237 }
8238 }
8239
8d63f375 8240 /* If the PCI channel is in offline state, do not post mbox. */
58da1ffb
JS
8241 if (unlikely(pci_channel_offline(phba->pcidev))) {
8242 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8243 goto out_not_finished;
8244 }
8d63f375 8245
a257bf90
JS
8246 /* If HBA has a deferred error attention, fail the iocb. */
8247 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
8248 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8249 goto out_not_finished;
8250 }
8251
dea3101e 8252 psli = &phba->sli;
92d7f7b0 8253
bf07bdea 8254 mbx = &pmbox->u.mb;
dea3101e
JB
8255 status = MBX_SUCCESS;
8256
2e0fef85
JS
8257 if (phba->link_state == LPFC_HBA_ERROR) {
8258 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW
8259
8260 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8261 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8262 "(%d):0311 Mailbox command x%x cannot "
8263 "issue Data: x%x x%x\n",
8264 pmbox->vport ? pmbox->vport->vpi : 0,
8265 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
58da1ffb 8266 goto out_not_finished;
41415862
JW
8267 }
8268
bf07bdea 8269 if (mbx->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT) {
9940b97b
JS
8270 if (lpfc_readl(phba->HCregaddr, &hc_copy) ||
8271 !(hc_copy & HC_MBINT_ENA)) {
8272 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8273 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
3772a991
JS
8274 "(%d):2528 Mailbox command x%x cannot "
8275 "issue Data: x%x x%x\n",
8276 pmbox->vport ? pmbox->vport->vpi : 0,
8277 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
9940b97b
JS
8278 goto out_not_finished;
8279 }
9290831f
JS
8280 }
8281
dea3101e
JB
8282 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8283 /* Polling for a mbox command when another one is already active
8284 * is not allowed in SLI. Also, the driver must have established
8285 * SLI2 mode to queue and process multiple mbox commands.
8286 */
8287
8288 if (flag & MBX_POLL) {
2e0fef85 8289 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e
JB
8290
8291 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8292 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8293 "(%d):2529 Mailbox command x%x "
8294 "cannot issue Data: x%x x%x\n",
8295 pmbox->vport ? pmbox->vport->vpi : 0,
8296 pmbox->u.mb.mbxCommand,
8297 psli->sli_flag, flag);
58da1ffb 8298 goto out_not_finished;
dea3101e
JB
8299 }
8300
3772a991 8301 if (!(psli->sli_flag & LPFC_SLI_ACTIVE)) {
2e0fef85 8302 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8303 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8304 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8305 "(%d):2530 Mailbox command x%x "
8306 "cannot issue Data: x%x x%x\n",
8307 pmbox->vport ? pmbox->vport->vpi : 0,
8308 pmbox->u.mb.mbxCommand,
8309 psli->sli_flag, flag);
58da1ffb 8310 goto out_not_finished;
dea3101e
JB
8311 }
8312
dea3101e
JB
8313 /* Another mailbox command is still being processed, queue this
8314 * command to be processed later.
8315 */
8316 lpfc_mbox_put(phba, pmbox);
8317
8318 /* Mbox cmd issue - BUSY */
ed957684 8319 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8320 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 8321 "x%x x%x x%x x%x\n",
92d7f7b0 8322 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
e92974f6
JS
8323 mbx->mbxCommand,
8324 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8325 psli->sli_flag, flag);
dea3101e
JB
8326
8327 psli->slistat.mbox_busy++;
2e0fef85 8328 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8329
858c9f6c
JS
8330 if (pmbox->vport) {
8331 lpfc_debugfs_disc_trc(pmbox->vport,
8332 LPFC_DISC_TRC_MBOX_VPORT,
8333 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8334 (uint32_t)mbx->mbxCommand,
8335 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8336 }
8337 else {
8338 lpfc_debugfs_disc_trc(phba->pport,
8339 LPFC_DISC_TRC_MBOX,
8340 "MBOX Bsy: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8341 (uint32_t)mbx->mbxCommand,
8342 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8343 }
8344
2e0fef85 8345 return MBX_BUSY;
dea3101e
JB
8346 }
8347
dea3101e
JB
8348 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8349
8350 /* If we are not polling, we MUST be in SLI2 mode */
8351 if (flag != MBX_POLL) {
3772a991 8352 if (!(psli->sli_flag & LPFC_SLI_ACTIVE) &&
bf07bdea 8353 (mbx->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 8354 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8355 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8356 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8357 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8358 "(%d):2531 Mailbox command x%x "
8359 "cannot issue Data: x%x x%x\n",
8360 pmbox->vport ? pmbox->vport->vpi : 0,
8361 pmbox->u.mb.mbxCommand,
8362 psli->sli_flag, flag);
58da1ffb 8363 goto out_not_finished;
dea3101e
JB
8364 }
8365 /* timeout active mbox command */
256ec0d0
JS
8366 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8367 1000);
8368 mod_timer(&psli->mbox_tmo, jiffies + timeout);
dea3101e
JB
8369 }
8370
8371 /* Mailbox cmd <cmd> issue */
ed957684 8372 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8373 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 8374 "x%x\n",
e8b62011 8375 pmbox->vport ? pmbox->vport->vpi : 0,
e92974f6
JS
8376 mbx->mbxCommand,
8377 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8378 psli->sli_flag, flag);
dea3101e 8379
bf07bdea 8380 if (mbx->mbxCommand != MBX_HEARTBEAT) {
858c9f6c
JS
8381 if (pmbox->vport) {
8382 lpfc_debugfs_disc_trc(pmbox->vport,
8383 LPFC_DISC_TRC_MBOX_VPORT,
8384 "MBOX Send vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8385 (uint32_t)mbx->mbxCommand,
8386 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8387 }
8388 else {
8389 lpfc_debugfs_disc_trc(phba->pport,
8390 LPFC_DISC_TRC_MBOX,
8391 "MBOX Send: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8392 (uint32_t)mbx->mbxCommand,
8393 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8394 }
8395 }
8396
dea3101e
JB
8397 psli->slistat.mbox_cmd++;
8398 evtctr = psli->slistat.mbox_event;
8399
8400 /* next set own bit for the adapter and copy over command word */
bf07bdea 8401 mbx->mbxOwner = OWN_CHIP;
dea3101e 8402
3772a991 8403 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
7a470277
JS
8404 /* Populate mbox extension offset word. */
8405 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len) {
bf07bdea 8406 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8407 = (uint8_t *)phba->mbox_ext
8408 - (uint8_t *)phba->mbox;
8409 }
8410
8411 /* Copy the mailbox extension data */
3e1f0718
JS
8412 if (pmbox->in_ext_byte_len && pmbox->ctx_buf) {
8413 lpfc_sli_pcimem_bcopy(pmbox->ctx_buf,
8414 (uint8_t *)phba->mbox_ext,
8415 pmbox->in_ext_byte_len);
7a470277
JS
8416 }
8417 /* Copy command data to host SLIM area */
bf07bdea 8418 lpfc_sli_pcimem_bcopy(mbx, phba->mbox, MAILBOX_CMD_SIZE);
dea3101e 8419 } else {
7a470277
JS
8420 /* Populate mbox extension offset word. */
8421 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len)
bf07bdea 8422 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8423 = MAILBOX_HBA_EXT_OFFSET;
8424
8425 /* Copy the mailbox extension data */
3e1f0718 8426 if (pmbox->in_ext_byte_len && pmbox->ctx_buf)
7a470277
JS
8427 lpfc_memcpy_to_slim(phba->MBslimaddr +
8428 MAILBOX_HBA_EXT_OFFSET,
3e1f0718 8429 pmbox->ctx_buf, pmbox->in_ext_byte_len);
7a470277 8430
895427bd 8431 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8432 /* copy command data into host mbox for cmpl */
895427bd
JS
8433 lpfc_sli_pcimem_bcopy(mbx, phba->mbox,
8434 MAILBOX_CMD_SIZE);
dea3101e
JB
8435
8436 /* First copy mbox command data to HBA SLIM, skip past first
8437 word */
8438 to_slim = phba->MBslimaddr + sizeof (uint32_t);
bf07bdea 8439 lpfc_memcpy_to_slim(to_slim, &mbx->un.varWords[0],
dea3101e
JB
8440 MAILBOX_CMD_SIZE - sizeof (uint32_t));
8441
8442 /* Next copy over first word, with mbxOwner set */
bf07bdea 8443 ldata = *((uint32_t *)mbx);
dea3101e
JB
8444 to_slim = phba->MBslimaddr;
8445 writel(ldata, to_slim);
8446 readl(to_slim); /* flush */
8447
895427bd 8448 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8449 /* switch over to host mailbox */
3772a991 8450 psli->sli_flag |= LPFC_SLI_ACTIVE;
dea3101e
JB
8451 }
8452
8453 wmb();
dea3101e
JB
8454
8455 switch (flag) {
8456 case MBX_NOWAIT:
09372820 8457 /* Set up reference to mailbox command */
dea3101e 8458 psli->mbox_active = pmbox;
09372820
JS
8459 /* Interrupt board to do it */
8460 writel(CA_MBATT, phba->CAregaddr);
8461 readl(phba->CAregaddr); /* flush */
8462 /* Don't wait for it to finish, just return */
dea3101e
JB
8463 break;
8464
8465 case MBX_POLL:
09372820 8466 /* Set up null reference to mailbox command */
dea3101e 8467 psli->mbox_active = NULL;
09372820
JS
8468 /* Interrupt board to do it */
8469 writel(CA_MBATT, phba->CAregaddr);
8470 readl(phba->CAregaddr); /* flush */
8471
3772a991 8472 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8473 /* First read mbox status word */
34b02dcd 8474 word0 = *((uint32_t *)phba->mbox);
dea3101e
JB
8475 word0 = le32_to_cpu(word0);
8476 } else {
8477 /* First read mbox status word */
9940b97b
JS
8478 if (lpfc_readl(phba->MBslimaddr, &word0)) {
8479 spin_unlock_irqrestore(&phba->hbalock,
8480 drvr_flag);
8481 goto out_not_finished;
8482 }
dea3101e
JB
8483 }
8484
8485 /* Read the HBA Host Attention Register */
9940b97b
JS
8486 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8487 spin_unlock_irqrestore(&phba->hbalock,
8488 drvr_flag);
8489 goto out_not_finished;
8490 }
a183a15f
JS
8491 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8492 1000) + jiffies;
09372820 8493 i = 0;
dea3101e 8494 /* Wait for command to complete */
41415862
JW
8495 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
8496 (!(ha_copy & HA_MBATT) &&
2e0fef85 8497 (phba->link_state > LPFC_WARM_START))) {
09372820 8498 if (time_after(jiffies, timeout)) {
dea3101e 8499 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8500 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 8501 drvr_flag);
58da1ffb 8502 goto out_not_finished;
dea3101e
JB
8503 }
8504
8505 /* Check if we took a mbox interrupt while we were
8506 polling */
8507 if (((word0 & OWN_CHIP) != OWN_CHIP)
8508 && (evtctr != psli->slistat.mbox_event))
8509 break;
8510
09372820
JS
8511 if (i++ > 10) {
8512 spin_unlock_irqrestore(&phba->hbalock,
8513 drvr_flag);
8514 msleep(1);
8515 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8516 }
dea3101e 8517
3772a991 8518 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8519 /* First copy command data */
34b02dcd 8520 word0 = *((uint32_t *)phba->mbox);
dea3101e 8521 word0 = le32_to_cpu(word0);
bf07bdea 8522 if (mbx->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 8523 MAILBOX_t *slimmb;
34b02dcd 8524 uint32_t slimword0;
dea3101e
JB
8525 /* Check real SLIM for any errors */
8526 slimword0 = readl(phba->MBslimaddr);
8527 slimmb = (MAILBOX_t *) & slimword0;
8528 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
8529 && slimmb->mbxStatus) {
8530 psli->sli_flag &=
3772a991 8531 ~LPFC_SLI_ACTIVE;
dea3101e
JB
8532 word0 = slimword0;
8533 }
8534 }
8535 } else {
8536 /* First copy command data */
8537 word0 = readl(phba->MBslimaddr);
8538 }
8539 /* Read the HBA Host Attention Register */
9940b97b
JS
8540 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8541 spin_unlock_irqrestore(&phba->hbalock,
8542 drvr_flag);
8543 goto out_not_finished;
8544 }
dea3101e
JB
8545 }
8546
3772a991 8547 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8548 /* copy results back to user */
2ea259ee
JS
8549 lpfc_sli_pcimem_bcopy(phba->mbox, mbx,
8550 MAILBOX_CMD_SIZE);
7a470277 8551 /* Copy the mailbox extension data */
3e1f0718 8552 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
7a470277 8553 lpfc_sli_pcimem_bcopy(phba->mbox_ext,
3e1f0718 8554 pmbox->ctx_buf,
7a470277
JS
8555 pmbox->out_ext_byte_len);
8556 }
dea3101e
JB
8557 } else {
8558 /* First copy command data */
bf07bdea 8559 lpfc_memcpy_from_slim(mbx, phba->MBslimaddr,
2ea259ee 8560 MAILBOX_CMD_SIZE);
7a470277 8561 /* Copy the mailbox extension data */
3e1f0718
JS
8562 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
8563 lpfc_memcpy_from_slim(
8564 pmbox->ctx_buf,
7a470277
JS
8565 phba->MBslimaddr +
8566 MAILBOX_HBA_EXT_OFFSET,
8567 pmbox->out_ext_byte_len);
dea3101e
JB
8568 }
8569 }
8570
8571 writel(HA_MBATT, phba->HAregaddr);
8572 readl(phba->HAregaddr); /* flush */
8573
8574 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
bf07bdea 8575 status = mbx->mbxStatus;
dea3101e
JB
8576 }
8577
2e0fef85
JS
8578 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8579 return status;
58da1ffb
JS
8580
8581out_not_finished:
8582 if (processing_queue) {
da0436e9 8583 pmbox->u.mb.mbxStatus = MBX_NOT_FINISHED;
58da1ffb
JS
8584 lpfc_mbox_cmpl_put(phba, pmbox);
8585 }
8586 return MBX_NOT_FINISHED;
dea3101e
JB
8587}
8588
f1126688
JS
8589/**
8590 * lpfc_sli4_async_mbox_block - Block posting SLI4 asynchronous mailbox command
8591 * @phba: Pointer to HBA context object.
8592 *
8593 * The function blocks the posting of SLI4 asynchronous mailbox commands from
8594 * the driver internal pending mailbox queue. It will then try to wait out the
8595 * possible outstanding mailbox command before return.
8596 *
8597 * Returns:
8598 * 0 - the outstanding mailbox command completed; otherwise, the wait for
8599 * the outstanding mailbox command timed out.
8600 **/
8601static int
8602lpfc_sli4_async_mbox_block(struct lpfc_hba *phba)
8603{
8604 struct lpfc_sli *psli = &phba->sli;
f1126688 8605 int rc = 0;
a183a15f 8606 unsigned long timeout = 0;
f1126688
JS
8607
8608 /* Mark the asynchronous mailbox command posting as blocked */
8609 spin_lock_irq(&phba->hbalock);
8610 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
f1126688
JS
8611 /* Determine how long we might wait for the active mailbox
8612 * command to be gracefully completed by firmware.
8613 */
a183a15f
JS
8614 if (phba->sli.mbox_active)
8615 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
8616 phba->sli.mbox_active) *
8617 1000) + jiffies;
8618 spin_unlock_irq(&phba->hbalock);
8619
e8d3c3b1
JS
8620 /* Make sure the mailbox is really active */
8621 if (timeout)
8622 lpfc_sli4_process_missed_mbox_completions(phba);
8623
f1126688
JS
8624 /* Wait for the outstnading mailbox command to complete */
8625 while (phba->sli.mbox_active) {
8626 /* Check active mailbox complete status every 2ms */
8627 msleep(2);
8628 if (time_after(jiffies, timeout)) {
8629 /* Timeout, marked the outstanding cmd not complete */
8630 rc = 1;
8631 break;
8632 }
8633 }
8634
8635 /* Can not cleanly block async mailbox command, fails it */
8636 if (rc) {
8637 spin_lock_irq(&phba->hbalock);
8638 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8639 spin_unlock_irq(&phba->hbalock);
8640 }
8641 return rc;
8642}
8643
8644/**
8645 * lpfc_sli4_async_mbox_unblock - Block posting SLI4 async mailbox command
8646 * @phba: Pointer to HBA context object.
8647 *
8648 * The function unblocks and resume posting of SLI4 asynchronous mailbox
8649 * commands from the driver internal pending mailbox queue. It makes sure
8650 * that there is no outstanding mailbox command before resuming posting
8651 * asynchronous mailbox commands. If, for any reason, there is outstanding
8652 * mailbox command, it will try to wait it out before resuming asynchronous
8653 * mailbox command posting.
8654 **/
8655static void
8656lpfc_sli4_async_mbox_unblock(struct lpfc_hba *phba)
8657{
8658 struct lpfc_sli *psli = &phba->sli;
8659
8660 spin_lock_irq(&phba->hbalock);
8661 if (!(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8662 /* Asynchronous mailbox posting is not blocked, do nothing */
8663 spin_unlock_irq(&phba->hbalock);
8664 return;
8665 }
8666
8667 /* Outstanding synchronous mailbox command is guaranteed to be done,
8668 * successful or timeout, after timing-out the outstanding mailbox
8669 * command shall always be removed, so just unblock posting async
8670 * mailbox command and resume
8671 */
8672 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8673 spin_unlock_irq(&phba->hbalock);
8674
291c2548 8675 /* wake up worker thread to post asynchronous mailbox command */
f1126688
JS
8676 lpfc_worker_wake_up(phba);
8677}
8678
2d843edc
JS
8679/**
8680 * lpfc_sli4_wait_bmbx_ready - Wait for bootstrap mailbox register ready
8681 * @phba: Pointer to HBA context object.
8682 * @mboxq: Pointer to mailbox object.
8683 *
8684 * The function waits for the bootstrap mailbox register ready bit from
8685 * port for twice the regular mailbox command timeout value.
8686 *
8687 * 0 - no timeout on waiting for bootstrap mailbox register ready.
8688 * MBXERR_ERROR - wait for bootstrap mailbox register timed out.
8689 **/
8690static int
8691lpfc_sli4_wait_bmbx_ready(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8692{
8693 uint32_t db_ready;
8694 unsigned long timeout;
8695 struct lpfc_register bmbx_reg;
8696
8697 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, mboxq)
8698 * 1000) + jiffies;
8699
8700 do {
8701 bmbx_reg.word0 = readl(phba->sli4_hba.BMBXregaddr);
8702 db_ready = bf_get(lpfc_bmbx_rdy, &bmbx_reg);
8703 if (!db_ready)
e2ffe4d5 8704 mdelay(2);
2d843edc
JS
8705
8706 if (time_after(jiffies, timeout))
8707 return MBXERR_ERROR;
8708 } while (!db_ready);
8709
8710 return 0;
8711}
8712
da0436e9
JS
8713/**
8714 * lpfc_sli4_post_sync_mbox - Post an SLI4 mailbox to the bootstrap mailbox
8715 * @phba: Pointer to HBA context object.
8716 * @mboxq: Pointer to mailbox object.
8717 *
8718 * The function posts a mailbox to the port. The mailbox is expected
8719 * to be comletely filled in and ready for the port to operate on it.
8720 * This routine executes a synchronous completion operation on the
8721 * mailbox by polling for its completion.
8722 *
8723 * The caller must not be holding any locks when calling this routine.
8724 *
8725 * Returns:
8726 * MBX_SUCCESS - mailbox posted successfully
8727 * Any of the MBX error values.
8728 **/
8729static int
8730lpfc_sli4_post_sync_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8731{
8732 int rc = MBX_SUCCESS;
8733 unsigned long iflag;
da0436e9
JS
8734 uint32_t mcqe_status;
8735 uint32_t mbx_cmnd;
da0436e9
JS
8736 struct lpfc_sli *psli = &phba->sli;
8737 struct lpfc_mqe *mb = &mboxq->u.mqe;
8738 struct lpfc_bmbx_create *mbox_rgn;
8739 struct dma_address *dma_address;
da0436e9
JS
8740
8741 /*
8742 * Only one mailbox can be active to the bootstrap mailbox region
8743 * at a time and there is no queueing provided.
8744 */
8745 spin_lock_irqsave(&phba->hbalock, iflag);
8746 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8747 spin_unlock_irqrestore(&phba->hbalock, iflag);
8748 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8749 "(%d):2532 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8750 "cannot issue Data: x%x x%x\n",
8751 mboxq->vport ? mboxq->vport->vpi : 0,
8752 mboxq->u.mb.mbxCommand,
a183a15f
JS
8753 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8754 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8755 psli->sli_flag, MBX_POLL);
8756 return MBXERR_ERROR;
8757 }
8758 /* The server grabs the token and owns it until release */
8759 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8760 phba->sli.mbox_active = mboxq;
8761 spin_unlock_irqrestore(&phba->hbalock, iflag);
8762
2d843edc
JS
8763 /* wait for bootstrap mbox register for readyness */
8764 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8765 if (rc)
8766 goto exit;
da0436e9
JS
8767 /*
8768 * Initialize the bootstrap memory region to avoid stale data areas
8769 * in the mailbox post. Then copy the caller's mailbox contents to
8770 * the bmbx mailbox region.
8771 */
8772 mbx_cmnd = bf_get(lpfc_mqe_command, mb);
8773 memset(phba->sli4_hba.bmbx.avirt, 0, sizeof(struct lpfc_bmbx_create));
48f8fdb4
JS
8774 lpfc_sli4_pcimem_bcopy(mb, phba->sli4_hba.bmbx.avirt,
8775 sizeof(struct lpfc_mqe));
da0436e9
JS
8776
8777 /* Post the high mailbox dma address to the port and wait for ready. */
8778 dma_address = &phba->sli4_hba.bmbx.dma_address;
8779 writel(dma_address->addr_hi, phba->sli4_hba.BMBXregaddr);
8780
2d843edc
JS
8781 /* wait for bootstrap mbox register for hi-address write done */
8782 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8783 if (rc)
8784 goto exit;
da0436e9
JS
8785
8786 /* Post the low mailbox dma address to the port. */
8787 writel(dma_address->addr_lo, phba->sli4_hba.BMBXregaddr);
da0436e9 8788
2d843edc
JS
8789 /* wait for bootstrap mbox register for low address write done */
8790 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8791 if (rc)
8792 goto exit;
da0436e9
JS
8793
8794 /*
8795 * Read the CQ to ensure the mailbox has completed.
8796 * If so, update the mailbox status so that the upper layers
8797 * can complete the request normally.
8798 */
48f8fdb4
JS
8799 lpfc_sli4_pcimem_bcopy(phba->sli4_hba.bmbx.avirt, mb,
8800 sizeof(struct lpfc_mqe));
da0436e9 8801 mbox_rgn = (struct lpfc_bmbx_create *) phba->sli4_hba.bmbx.avirt;
48f8fdb4
JS
8802 lpfc_sli4_pcimem_bcopy(&mbox_rgn->mcqe, &mboxq->mcqe,
8803 sizeof(struct lpfc_mcqe));
da0436e9 8804 mcqe_status = bf_get(lpfc_mcqe_status, &mbox_rgn->mcqe);
0558056c
JS
8805 /*
8806 * When the CQE status indicates a failure and the mailbox status
8807 * indicates success then copy the CQE status into the mailbox status
8808 * (and prefix it with x4000).
8809 */
da0436e9 8810 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
0558056c
JS
8811 if (bf_get(lpfc_mqe_status, mb) == MBX_SUCCESS)
8812 bf_set(lpfc_mqe_status, mb,
8813 (LPFC_MBX_ERROR_RANGE | mcqe_status));
da0436e9 8814 rc = MBXERR_ERROR;
d7c47992
JS
8815 } else
8816 lpfc_sli4_swap_str(phba, mboxq);
da0436e9
JS
8817
8818 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8819 "(%d):0356 Mailbox cmd x%x (x%x/x%x) Status x%x "
da0436e9
JS
8820 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x"
8821 " x%x x%x CQ: x%x x%x x%x x%x\n",
a183a15f
JS
8822 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
8823 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8824 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8825 bf_get(lpfc_mqe_status, mb),
8826 mb->un.mb_words[0], mb->un.mb_words[1],
8827 mb->un.mb_words[2], mb->un.mb_words[3],
8828 mb->un.mb_words[4], mb->un.mb_words[5],
8829 mb->un.mb_words[6], mb->un.mb_words[7],
8830 mb->un.mb_words[8], mb->un.mb_words[9],
8831 mb->un.mb_words[10], mb->un.mb_words[11],
8832 mb->un.mb_words[12], mboxq->mcqe.word0,
8833 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
8834 mboxq->mcqe.trailer);
8835exit:
8836 /* We are holding the token, no needed for lock when release */
8837 spin_lock_irqsave(&phba->hbalock, iflag);
8838 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8839 phba->sli.mbox_active = NULL;
8840 spin_unlock_irqrestore(&phba->hbalock, iflag);
8841 return rc;
8842}
8843
8844/**
8845 * lpfc_sli_issue_mbox_s4 - Issue an SLI4 mailbox command to firmware
8846 * @phba: Pointer to HBA context object.
8847 * @pmbox: Pointer to mailbox object.
8848 * @flag: Flag indicating how the mailbox need to be processed.
8849 *
8850 * This function is called by discovery code and HBA management code to submit
8851 * a mailbox command to firmware with SLI-4 interface spec.
8852 *
8853 * Return codes the caller owns the mailbox command after the return of the
8854 * function.
8855 **/
8856static int
8857lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
8858 uint32_t flag)
8859{
8860 struct lpfc_sli *psli = &phba->sli;
8861 unsigned long iflags;
8862 int rc;
8863
b76f2dc9
JS
8864 /* dump from issue mailbox command if setup */
8865 lpfc_idiag_mbxacc_dump_issue_mbox(phba, &mboxq->u.mb);
8866
8fa38513
JS
8867 rc = lpfc_mbox_dev_check(phba);
8868 if (unlikely(rc)) {
8869 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8870 "(%d):2544 Mailbox command x%x (x%x/x%x) "
8fa38513
JS
8871 "cannot issue Data: x%x x%x\n",
8872 mboxq->vport ? mboxq->vport->vpi : 0,
8873 mboxq->u.mb.mbxCommand,
a183a15f
JS
8874 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8875 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
8fa38513
JS
8876 psli->sli_flag, flag);
8877 goto out_not_finished;
8878 }
8879
da0436e9
JS
8880 /* Detect polling mode and jump to a handler */
8881 if (!phba->sli4_hba.intr_enable) {
8882 if (flag == MBX_POLL)
8883 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8884 else
8885 rc = -EIO;
8886 if (rc != MBX_SUCCESS)
0558056c 8887 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
da0436e9 8888 "(%d):2541 Mailbox command x%x "
cc459f19
JS
8889 "(x%x/x%x) failure: "
8890 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8891 "Data: x%x x%x\n,",
da0436e9
JS
8892 mboxq->vport ? mboxq->vport->vpi : 0,
8893 mboxq->u.mb.mbxCommand,
a183a15f
JS
8894 lpfc_sli_config_mbox_subsys_get(phba,
8895 mboxq),
8896 lpfc_sli_config_mbox_opcode_get(phba,
8897 mboxq),
cc459f19
JS
8898 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8899 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8900 bf_get(lpfc_mcqe_ext_status,
8901 &mboxq->mcqe),
da0436e9
JS
8902 psli->sli_flag, flag);
8903 return rc;
8904 } else if (flag == MBX_POLL) {
f1126688
JS
8905 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
8906 "(%d):2542 Try to issue mailbox command "
7365f6fd 8907 "x%x (x%x/x%x) synchronously ahead of async "
f1126688 8908 "mailbox command queue: x%x x%x\n",
da0436e9
JS
8909 mboxq->vport ? mboxq->vport->vpi : 0,
8910 mboxq->u.mb.mbxCommand,
a183a15f
JS
8911 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8912 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9 8913 psli->sli_flag, flag);
f1126688
JS
8914 /* Try to block the asynchronous mailbox posting */
8915 rc = lpfc_sli4_async_mbox_block(phba);
8916 if (!rc) {
8917 /* Successfully blocked, now issue sync mbox cmd */
8918 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8919 if (rc != MBX_SUCCESS)
cc459f19 8920 lpfc_printf_log(phba, KERN_WARNING,
a183a15f 8921 LOG_MBOX | LOG_SLI,
cc459f19
JS
8922 "(%d):2597 Sync Mailbox command "
8923 "x%x (x%x/x%x) failure: "
8924 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8925 "Data: x%x x%x\n,",
8926 mboxq->vport ? mboxq->vport->vpi : 0,
a183a15f
JS
8927 mboxq->u.mb.mbxCommand,
8928 lpfc_sli_config_mbox_subsys_get(phba,
8929 mboxq),
8930 lpfc_sli_config_mbox_opcode_get(phba,
8931 mboxq),
cc459f19
JS
8932 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8933 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8934 bf_get(lpfc_mcqe_ext_status,
8935 &mboxq->mcqe),
a183a15f 8936 psli->sli_flag, flag);
f1126688
JS
8937 /* Unblock the async mailbox posting afterward */
8938 lpfc_sli4_async_mbox_unblock(phba);
8939 }
8940 return rc;
da0436e9
JS
8941 }
8942
291c2548 8943 /* Now, interrupt mode asynchronous mailbox command */
da0436e9
JS
8944 rc = lpfc_mbox_cmd_check(phba, mboxq);
8945 if (rc) {
8946 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8947 "(%d):2543 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8948 "cannot issue Data: x%x x%x\n",
8949 mboxq->vport ? mboxq->vport->vpi : 0,
8950 mboxq->u.mb.mbxCommand,
a183a15f
JS
8951 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8952 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8953 psli->sli_flag, flag);
8954 goto out_not_finished;
8955 }
da0436e9
JS
8956
8957 /* Put the mailbox command to the driver internal FIFO */
8958 psli->slistat.mbox_busy++;
8959 spin_lock_irqsave(&phba->hbalock, iflags);
8960 lpfc_mbox_put(phba, mboxq);
8961 spin_unlock_irqrestore(&phba->hbalock, iflags);
8962 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
8963 "(%d):0354 Mbox cmd issue - Enqueue Data: "
a183a15f 8964 "x%x (x%x/x%x) x%x x%x x%x\n",
da0436e9
JS
8965 mboxq->vport ? mboxq->vport->vpi : 0xffffff,
8966 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
a183a15f
JS
8967 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8968 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8969 phba->pport->port_state,
8970 psli->sli_flag, MBX_NOWAIT);
8971 /* Wake up worker thread to transport mailbox command from head */
8972 lpfc_worker_wake_up(phba);
8973
8974 return MBX_BUSY;
8975
8976out_not_finished:
8977 return MBX_NOT_FINISHED;
8978}
8979
8980/**
8981 * lpfc_sli4_post_async_mbox - Post an SLI4 mailbox command to device
8982 * @phba: Pointer to HBA context object.
8983 *
8984 * This function is called by worker thread to send a mailbox command to
8985 * SLI4 HBA firmware.
8986 *
8987 **/
8988int
8989lpfc_sli4_post_async_mbox(struct lpfc_hba *phba)
8990{
8991 struct lpfc_sli *psli = &phba->sli;
8992 LPFC_MBOXQ_t *mboxq;
8993 int rc = MBX_SUCCESS;
8994 unsigned long iflags;
8995 struct lpfc_mqe *mqe;
8996 uint32_t mbx_cmnd;
8997
8998 /* Check interrupt mode before post async mailbox command */
8999 if (unlikely(!phba->sli4_hba.intr_enable))
9000 return MBX_NOT_FINISHED;
9001
9002 /* Check for mailbox command service token */
9003 spin_lock_irqsave(&phba->hbalock, iflags);
9004 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
9005 spin_unlock_irqrestore(&phba->hbalock, iflags);
9006 return MBX_NOT_FINISHED;
9007 }
9008 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
9009 spin_unlock_irqrestore(&phba->hbalock, iflags);
9010 return MBX_NOT_FINISHED;
9011 }
9012 if (unlikely(phba->sli.mbox_active)) {
9013 spin_unlock_irqrestore(&phba->hbalock, iflags);
9014 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
9015 "0384 There is pending active mailbox cmd\n");
9016 return MBX_NOT_FINISHED;
9017 }
9018 /* Take the mailbox command service token */
9019 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
9020
9021 /* Get the next mailbox command from head of queue */
9022 mboxq = lpfc_mbox_get(phba);
9023
9024 /* If no more mailbox command waiting for post, we're done */
9025 if (!mboxq) {
9026 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
9027 spin_unlock_irqrestore(&phba->hbalock, iflags);
9028 return MBX_SUCCESS;
9029 }
9030 phba->sli.mbox_active = mboxq;
9031 spin_unlock_irqrestore(&phba->hbalock, iflags);
9032
9033 /* Check device readiness for posting mailbox command */
9034 rc = lpfc_mbox_dev_check(phba);
9035 if (unlikely(rc))
9036 /* Driver clean routine will clean up pending mailbox */
9037 goto out_not_finished;
9038
9039 /* Prepare the mbox command to be posted */
9040 mqe = &mboxq->u.mqe;
9041 mbx_cmnd = bf_get(lpfc_mqe_command, mqe);
9042
9043 /* Start timer for the mbox_tmo and log some mailbox post messages */
9044 mod_timer(&psli->mbox_tmo, (jiffies +
256ec0d0 9045 msecs_to_jiffies(1000 * lpfc_mbox_tmo_val(phba, mboxq))));
da0436e9
JS
9046
9047 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 9048 "(%d):0355 Mailbox cmd x%x (x%x/x%x) issue Data: "
da0436e9
JS
9049 "x%x x%x\n",
9050 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
a183a15f
JS
9051 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
9052 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
9053 phba->pport->port_state, psli->sli_flag);
9054
9055 if (mbx_cmnd != MBX_HEARTBEAT) {
9056 if (mboxq->vport) {
9057 lpfc_debugfs_disc_trc(mboxq->vport,
9058 LPFC_DISC_TRC_MBOX_VPORT,
9059 "MBOX Send vport: cmd:x%x mb:x%x x%x",
9060 mbx_cmnd, mqe->un.mb_words[0],
9061 mqe->un.mb_words[1]);
9062 } else {
9063 lpfc_debugfs_disc_trc(phba->pport,
9064 LPFC_DISC_TRC_MBOX,
9065 "MBOX Send: cmd:x%x mb:x%x x%x",
9066 mbx_cmnd, mqe->un.mb_words[0],
9067 mqe->un.mb_words[1]);
9068 }
9069 }
9070 psli->slistat.mbox_cmd++;
9071
9072 /* Post the mailbox command to the port */
9073 rc = lpfc_sli4_mq_put(phba->sli4_hba.mbx_wq, mqe);
9074 if (rc != MBX_SUCCESS) {
9075 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 9076 "(%d):2533 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
9077 "cannot issue Data: x%x x%x\n",
9078 mboxq->vport ? mboxq->vport->vpi : 0,
9079 mboxq->u.mb.mbxCommand,
a183a15f
JS
9080 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
9081 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
9082 psli->sli_flag, MBX_NOWAIT);
9083 goto out_not_finished;
9084 }
9085
9086 return rc;
9087
9088out_not_finished:
9089 spin_lock_irqsave(&phba->hbalock, iflags);
d7069f09
JS
9090 if (phba->sli.mbox_active) {
9091 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
9092 __lpfc_mbox_cmpl_put(phba, mboxq);
9093 /* Release the token */
9094 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
9095 phba->sli.mbox_active = NULL;
9096 }
da0436e9
JS
9097 spin_unlock_irqrestore(&phba->hbalock, iflags);
9098
9099 return MBX_NOT_FINISHED;
9100}
9101
9102/**
9103 * lpfc_sli_issue_mbox - Wrapper func for issuing mailbox command
9104 * @phba: Pointer to HBA context object.
9105 * @pmbox: Pointer to mailbox object.
9106 * @flag: Flag indicating how the mailbox need to be processed.
9107 *
9108 * This routine wraps the actual SLI3 or SLI4 mailbox issuing routine from
9109 * the API jump table function pointer from the lpfc_hba struct.
9110 *
9111 * Return codes the caller owns the mailbox command after the return of the
9112 * function.
9113 **/
9114int
9115lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
9116{
9117 return phba->lpfc_sli_issue_mbox(phba, pmbox, flag);
9118}
9119
9120/**
25985edc 9121 * lpfc_mbox_api_table_setup - Set up mbox api function jump table
da0436e9
JS
9122 * @phba: The hba struct for which this call is being executed.
9123 * @dev_grp: The HBA PCI-Device group number.
9124 *
9125 * This routine sets up the mbox interface API function jump table in @phba
9126 * struct.
9127 * Returns: 0 - success, -ENODEV - failure.
9128 **/
9129int
9130lpfc_mbox_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
9131{
9132
9133 switch (dev_grp) {
9134 case LPFC_PCI_DEV_LP:
9135 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s3;
9136 phba->lpfc_sli_handle_slow_ring_event =
9137 lpfc_sli_handle_slow_ring_event_s3;
9138 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s3;
9139 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s3;
9140 phba->lpfc_sli_brdready = lpfc_sli_brdready_s3;
9141 break;
9142 case LPFC_PCI_DEV_OC:
9143 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s4;
9144 phba->lpfc_sli_handle_slow_ring_event =
9145 lpfc_sli_handle_slow_ring_event_s4;
9146 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s4;
9147 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s4;
9148 phba->lpfc_sli_brdready = lpfc_sli_brdready_s4;
9149 break;
9150 default:
9151 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9152 "1420 Invalid HBA PCI-device group: 0x%x\n",
9153 dev_grp);
9154 return -ENODEV;
9155 break;
9156 }
9157 return 0;
9158}
9159
e59058c4 9160/**
3621a710 9161 * __lpfc_sli_ringtx_put - Add an iocb to the txq
e59058c4
JS
9162 * @phba: Pointer to HBA context object.
9163 * @pring: Pointer to driver SLI ring object.
9164 * @piocb: Pointer to address of newly added command iocb.
9165 *
27f3efd6
JS
9166 * This function is called with hbalock held for SLI3 ports or
9167 * the ring lock held for SLI4 ports to add a command
e59058c4
JS
9168 * iocb to the txq when SLI layer cannot submit the command iocb
9169 * to the ring.
9170 **/
2a9bf3d0 9171void
92d7f7b0 9172__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 9173 struct lpfc_iocbq *piocb)
dea3101e 9174{
27f3efd6
JS
9175 if (phba->sli_rev == LPFC_SLI_REV4)
9176 lockdep_assert_held(&pring->ring_lock);
9177 else
9178 lockdep_assert_held(&phba->hbalock);
dea3101e
JB
9179 /* Insert the caller's iocb in the txq tail for later processing. */
9180 list_add_tail(&piocb->list, &pring->txq);
dea3101e
JB
9181}
9182
e59058c4 9183/**
3621a710 9184 * lpfc_sli_next_iocb - Get the next iocb in the txq
e59058c4
JS
9185 * @phba: Pointer to HBA context object.
9186 * @pring: Pointer to driver SLI ring object.
9187 * @piocb: Pointer to address of newly added command iocb.
9188 *
9189 * This function is called with hbalock held before a new
9190 * iocb is submitted to the firmware. This function checks
9191 * txq to flush the iocbs in txq to Firmware before
9192 * submitting new iocbs to the Firmware.
9193 * If there are iocbs in the txq which need to be submitted
9194 * to firmware, lpfc_sli_next_iocb returns the first element
9195 * of the txq after dequeuing it from txq.
9196 * If there is no iocb in the txq then the function will return
9197 * *piocb and *piocb is set to NULL. Caller needs to check
9198 * *piocb to find if there are more commands in the txq.
9199 **/
dea3101e
JB
9200static struct lpfc_iocbq *
9201lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 9202 struct lpfc_iocbq **piocb)
dea3101e
JB
9203{
9204 struct lpfc_iocbq * nextiocb;
9205
1c2ba475
JT
9206 lockdep_assert_held(&phba->hbalock);
9207
dea3101e
JB
9208 nextiocb = lpfc_sli_ringtx_get(phba, pring);
9209 if (!nextiocb) {
9210 nextiocb = *piocb;
9211 *piocb = NULL;
9212 }
9213
9214 return nextiocb;
9215}
9216
e59058c4 9217/**
3772a991 9218 * __lpfc_sli_issue_iocb_s3 - SLI3 device lockless ver of lpfc_sli_issue_iocb
e59058c4 9219 * @phba: Pointer to HBA context object.
3772a991 9220 * @ring_number: SLI ring number to issue iocb on.
e59058c4
JS
9221 * @piocb: Pointer to command iocb.
9222 * @flag: Flag indicating if this command can be put into txq.
9223 *
3772a991
JS
9224 * __lpfc_sli_issue_iocb_s3 is used by other functions in the driver to issue
9225 * an iocb command to an HBA with SLI-3 interface spec. If the PCI slot is
9226 * recovering from error state, if HBA is resetting or if LPFC_STOP_IOCB_EVENT
9227 * flag is turned on, the function returns IOCB_ERROR. When the link is down,
9228 * this function allows only iocbs for posting buffers. This function finds
9229 * next available slot in the command ring and posts the command to the
9230 * available slot and writes the port attention register to request HBA start
9231 * processing new iocb. If there is no slot available in the ring and
9232 * flag & SLI_IOCB_RET_IOCB is set, the new iocb is added to the txq, otherwise
9233 * the function returns IOCB_BUSY.
e59058c4 9234 *
3772a991
JS
9235 * This function is called with hbalock held. The function will return success
9236 * after it successfully submit the iocb to firmware or after adding to the
9237 * txq.
e59058c4 9238 **/
98c9ea5c 9239static int
3772a991 9240__lpfc_sli_issue_iocb_s3(struct lpfc_hba *phba, uint32_t ring_number,
dea3101e
JB
9241 struct lpfc_iocbq *piocb, uint32_t flag)
9242{
9243 struct lpfc_iocbq *nextiocb;
9244 IOCB_t *iocb;
895427bd 9245 struct lpfc_sli_ring *pring = &phba->sli.sli3_ring[ring_number];
dea3101e 9246
1c2ba475
JT
9247 lockdep_assert_held(&phba->hbalock);
9248
92d7f7b0
JS
9249 if (piocb->iocb_cmpl && (!piocb->vport) &&
9250 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
9251 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
9252 lpfc_printf_log(phba, KERN_ERR,
9253 LOG_SLI | LOG_VPORT,
e8b62011 9254 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS
9255 piocb->iocb.ulpCommand);
9256 dump_stack();
9257 return IOCB_ERROR;
9258 }
9259
9260
8d63f375
LV
9261 /* If the PCI channel is in offline state, do not post iocbs. */
9262 if (unlikely(pci_channel_offline(phba->pcidev)))
9263 return IOCB_ERROR;
9264
a257bf90
JS
9265 /* If HBA has a deferred error attention, fail the iocb. */
9266 if (unlikely(phba->hba_flag & DEFER_ERATT))
9267 return IOCB_ERROR;
9268
dea3101e
JB
9269 /*
9270 * We should never get an IOCB if we are in a < LINK_DOWN state
9271 */
2e0fef85 9272 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e
JB
9273 return IOCB_ERROR;
9274
9275 /*
9276 * Check to see if we are blocking IOCB processing because of a
0b727fea 9277 * outstanding event.
dea3101e 9278 */
0b727fea 9279 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e
JB
9280 goto iocb_busy;
9281
2e0fef85 9282 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 9283 /*
2680eeaa 9284 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e
JB
9285 * can be issued if the link is not up.
9286 */
9287 switch (piocb->iocb.ulpCommand) {
84774a4d
JS
9288 case CMD_GEN_REQUEST64_CR:
9289 case CMD_GEN_REQUEST64_CX:
9290 if (!(phba->sli.sli_flag & LPFC_MENLO_MAINT) ||
9291 (piocb->iocb.un.genreq64.w5.hcsw.Rctl !=
6a9c52cf 9292 FC_RCTL_DD_UNSOL_CMD) ||
84774a4d
JS
9293 (piocb->iocb.un.genreq64.w5.hcsw.Type !=
9294 MENLO_TRANSPORT_TYPE))
9295
9296 goto iocb_busy;
9297 break;
dea3101e
JB
9298 case CMD_QUE_RING_BUF_CN:
9299 case CMD_QUE_RING_BUF64_CN:
dea3101e
JB
9300 /*
9301 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
9302 * completion, iocb_cmpl MUST be 0.
9303 */
9304 if (piocb->iocb_cmpl)
9305 piocb->iocb_cmpl = NULL;
9306 /*FALLTHROUGH*/
9307 case CMD_CREATE_XRI_CR:
2680eeaa
JS
9308 case CMD_CLOSE_XRI_CN:
9309 case CMD_CLOSE_XRI_CX:
dea3101e
JB
9310 break;
9311 default:
9312 goto iocb_busy;
9313 }
9314
9315 /*
9316 * For FCP commands, we must be in a state where we can process link
9317 * attention events.
9318 */
895427bd 9319 } else if (unlikely(pring->ringno == LPFC_FCP_RING &&
92d7f7b0 9320 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 9321 goto iocb_busy;
92d7f7b0 9322 }
dea3101e 9323
dea3101e
JB
9324 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
9325 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
9326 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
9327
9328 if (iocb)
9329 lpfc_sli_update_ring(phba, pring);
9330 else
9331 lpfc_sli_update_full_ring(phba, pring);
9332
9333 if (!piocb)
9334 return IOCB_SUCCESS;
9335
9336 goto out_busy;
9337
9338 iocb_busy:
9339 pring->stats.iocb_cmd_delay++;
9340
9341 out_busy:
9342
9343 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 9344 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e
JB
9345 return IOCB_SUCCESS;
9346 }
9347
9348 return IOCB_BUSY;
9349}
9350
3772a991 9351/**
4f774513
JS
9352 * lpfc_sli4_bpl2sgl - Convert the bpl/bde to a sgl.
9353 * @phba: Pointer to HBA context object.
9354 * @piocb: Pointer to command iocb.
9355 * @sglq: Pointer to the scatter gather queue object.
9356 *
9357 * This routine converts the bpl or bde that is in the IOCB
9358 * to a sgl list for the sli4 hardware. The physical address
9359 * of the bpl/bde is converted back to a virtual address.
9360 * If the IOCB contains a BPL then the list of BDE's is
9361 * converted to sli4_sge's. If the IOCB contains a single
9362 * BDE then it is converted to a single sli_sge.
9363 * The IOCB is still in cpu endianess so the contents of
9364 * the bpl can be used without byte swapping.
9365 *
9366 * Returns valid XRI = Success, NO_XRI = Failure.
9367**/
9368static uint16_t
9369lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
9370 struct lpfc_sglq *sglq)
3772a991 9371{
4f774513
JS
9372 uint16_t xritag = NO_XRI;
9373 struct ulp_bde64 *bpl = NULL;
9374 struct ulp_bde64 bde;
9375 struct sli4_sge *sgl = NULL;
1b51197d 9376 struct lpfc_dmabuf *dmabuf;
4f774513
JS
9377 IOCB_t *icmd;
9378 int numBdes = 0;
9379 int i = 0;
63e801ce
JS
9380 uint32_t offset = 0; /* accumulated offset in the sg request list */
9381 int inbound = 0; /* number of sg reply entries inbound from firmware */
3772a991 9382
4f774513
JS
9383 if (!piocbq || !sglq)
9384 return xritag;
9385
9386 sgl = (struct sli4_sge *)sglq->sgl;
9387 icmd = &piocbq->iocb;
6b5151fd
JS
9388 if (icmd->ulpCommand == CMD_XMIT_BLS_RSP64_CX)
9389 return sglq->sli4_xritag;
4f774513
JS
9390 if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
9391 numBdes = icmd->un.genreq64.bdl.bdeSize /
9392 sizeof(struct ulp_bde64);
9393 /* The addrHigh and addrLow fields within the IOCB
9394 * have not been byteswapped yet so there is no
9395 * need to swap them back.
9396 */
1b51197d
JS
9397 if (piocbq->context3)
9398 dmabuf = (struct lpfc_dmabuf *)piocbq->context3;
9399 else
9400 return xritag;
4f774513 9401
1b51197d 9402 bpl = (struct ulp_bde64 *)dmabuf->virt;
4f774513
JS
9403 if (!bpl)
9404 return xritag;
9405
9406 for (i = 0; i < numBdes; i++) {
9407 /* Should already be byte swapped. */
28baac74
JS
9408 sgl->addr_hi = bpl->addrHigh;
9409 sgl->addr_lo = bpl->addrLow;
9410
0558056c 9411 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9412 if ((i+1) == numBdes)
9413 bf_set(lpfc_sli4_sge_last, sgl, 1);
9414 else
9415 bf_set(lpfc_sli4_sge_last, sgl, 0);
28baac74
JS
9416 /* swap the size field back to the cpu so we
9417 * can assign it to the sgl.
9418 */
9419 bde.tus.w = le32_to_cpu(bpl->tus.w);
9420 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
63e801ce
JS
9421 /* The offsets in the sgl need to be accumulated
9422 * separately for the request and reply lists.
9423 * The request is always first, the reply follows.
9424 */
9425 if (piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) {
9426 /* add up the reply sg entries */
9427 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
9428 inbound++;
9429 /* first inbound? reset the offset */
9430 if (inbound == 1)
9431 offset = 0;
9432 bf_set(lpfc_sli4_sge_offset, sgl, offset);
f9bb2da1
JS
9433 bf_set(lpfc_sli4_sge_type, sgl,
9434 LPFC_SGE_TYPE_DATA);
63e801ce
JS
9435 offset += bde.tus.f.bdeSize;
9436 }
546fc854 9437 sgl->word2 = cpu_to_le32(sgl->word2);
4f774513
JS
9438 bpl++;
9439 sgl++;
9440 }
9441 } else if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BDE_64) {
9442 /* The addrHigh and addrLow fields of the BDE have not
9443 * been byteswapped yet so they need to be swapped
9444 * before putting them in the sgl.
9445 */
9446 sgl->addr_hi =
9447 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh);
9448 sgl->addr_lo =
9449 cpu_to_le32(icmd->un.genreq64.bdl.addrLow);
0558056c 9450 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9451 bf_set(lpfc_sli4_sge_last, sgl, 1);
9452 sgl->word2 = cpu_to_le32(sgl->word2);
28baac74
JS
9453 sgl->sge_len =
9454 cpu_to_le32(icmd->un.genreq64.bdl.bdeSize);
4f774513
JS
9455 }
9456 return sglq->sli4_xritag;
3772a991 9457}
92d7f7b0 9458
e59058c4 9459/**
4f774513 9460 * lpfc_sli_iocb2wqe - Convert the IOCB to a work queue entry.
e59058c4 9461 * @phba: Pointer to HBA context object.
4f774513
JS
9462 * @piocb: Pointer to command iocb.
9463 * @wqe: Pointer to the work queue entry.
e59058c4 9464 *
4f774513
JS
9465 * This routine converts the iocb command to its Work Queue Entry
9466 * equivalent. The wqe pointer should not have any fields set when
9467 * this routine is called because it will memcpy over them.
9468 * This routine does not set the CQ_ID or the WQEC bits in the
9469 * wqe.
e59058c4 9470 *
4f774513 9471 * Returns: 0 = Success, IOCB_ERROR = Failure.
e59058c4 9472 **/
cf5bf97e 9473static int
4f774513 9474lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
205e8240 9475 union lpfc_wqe128 *wqe)
cf5bf97e 9476{
5ffc266e 9477 uint32_t xmit_len = 0, total_len = 0;
4f774513
JS
9478 uint8_t ct = 0;
9479 uint32_t fip;
9480 uint32_t abort_tag;
9481 uint8_t command_type = ELS_COMMAND_NON_FIP;
9482 uint8_t cmnd;
9483 uint16_t xritag;
dcf2a4e0
JS
9484 uint16_t abrt_iotag;
9485 struct lpfc_iocbq *abrtiocbq;
4f774513 9486 struct ulp_bde64 *bpl = NULL;
f0d9bccc 9487 uint32_t els_id = LPFC_ELS_ID_DEFAULT;
5ffc266e
JS
9488 int numBdes, i;
9489 struct ulp_bde64 bde;
c31098ce 9490 struct lpfc_nodelist *ndlp;
ff78d8f9 9491 uint32_t *pcmd;
1b51197d 9492 uint32_t if_type;
4f774513 9493
45ed1190 9494 fip = phba->hba_flag & HBA_FIP_SUPPORT;
4f774513 9495 /* The fcp commands will set command type */
0c287589 9496 if (iocbq->iocb_flag & LPFC_IO_FCP)
4f774513 9497 command_type = FCP_COMMAND;
c868595d 9498 else if (fip && (iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK))
0c287589
JS
9499 command_type = ELS_COMMAND_FIP;
9500 else
9501 command_type = ELS_COMMAND_NON_FIP;
9502
b5c53958
JS
9503 if (phba->fcp_embed_io)
9504 memset(wqe, 0, sizeof(union lpfc_wqe128));
4f774513
JS
9505 /* Some of the fields are in the right position already */
9506 memcpy(wqe, &iocbq->iocb, sizeof(union lpfc_wqe));
e62245d9
JS
9507 /* The ct field has moved so reset */
9508 wqe->generic.wqe_com.word7 = 0;
9509 wqe->generic.wqe_com.word10 = 0;
b5c53958
JS
9510
9511 abort_tag = (uint32_t) iocbq->iotag;
9512 xritag = iocbq->sli4_xritag;
4f774513
JS
9513 /* words0-2 bpl convert bde */
9514 if (iocbq->iocb.un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
5ffc266e
JS
9515 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9516 sizeof(struct ulp_bde64);
4f774513
JS
9517 bpl = (struct ulp_bde64 *)
9518 ((struct lpfc_dmabuf *)iocbq->context3)->virt;
9519 if (!bpl)
9520 return IOCB_ERROR;
cf5bf97e 9521
4f774513
JS
9522 /* Should already be byte swapped. */
9523 wqe->generic.bde.addrHigh = le32_to_cpu(bpl->addrHigh);
9524 wqe->generic.bde.addrLow = le32_to_cpu(bpl->addrLow);
9525 /* swap the size field back to the cpu so we
9526 * can assign it to the sgl.
9527 */
9528 wqe->generic.bde.tus.w = le32_to_cpu(bpl->tus.w);
5ffc266e
JS
9529 xmit_len = wqe->generic.bde.tus.f.bdeSize;
9530 total_len = 0;
9531 for (i = 0; i < numBdes; i++) {
9532 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
9533 total_len += bde.tus.f.bdeSize;
9534 }
4f774513 9535 } else
5ffc266e 9536 xmit_len = iocbq->iocb.un.fcpi64.bdl.bdeSize;
cf5bf97e 9537
4f774513
JS
9538 iocbq->iocb.ulpIoTag = iocbq->iotag;
9539 cmnd = iocbq->iocb.ulpCommand;
a4bc3379 9540
4f774513
JS
9541 switch (iocbq->iocb.ulpCommand) {
9542 case CMD_ELS_REQUEST64_CR:
93d1379e
JS
9543 if (iocbq->iocb_flag & LPFC_IO_LIBDFC)
9544 ndlp = iocbq->context_un.ndlp;
9545 else
9546 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513
JS
9547 if (!iocbq->iocb.ulpLe) {
9548 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9549 "2007 Only Limited Edition cmd Format"
9550 " supported 0x%x\n",
9551 iocbq->iocb.ulpCommand);
9552 return IOCB_ERROR;
9553 }
ff78d8f9 9554
5ffc266e 9555 wqe->els_req.payload_len = xmit_len;
4f774513
JS
9556 /* Els_reguest64 has a TMO */
9557 bf_set(wqe_tmo, &wqe->els_req.wqe_com,
9558 iocbq->iocb.ulpTimeout);
9559 /* Need a VF for word 4 set the vf bit*/
9560 bf_set(els_req64_vf, &wqe->els_req, 0);
9561 /* And a VFID for word 12 */
9562 bf_set(els_req64_vfid, &wqe->els_req, 0);
4f774513 9563 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
f0d9bccc
JS
9564 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9565 iocbq->iocb.ulpContext);
9566 bf_set(wqe_ct, &wqe->els_req.wqe_com, ct);
9567 bf_set(wqe_pu, &wqe->els_req.wqe_com, 0);
4f774513 9568 /* CCP CCPE PV PRI in word10 were set in the memcpy */
ff78d8f9 9569 if (command_type == ELS_COMMAND_FIP)
c868595d
JS
9570 els_id = ((iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK)
9571 >> LPFC_FIP_ELS_ID_SHIFT);
ff78d8f9
JS
9572 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9573 iocbq->context2)->virt);
1b51197d
JS
9574 if_type = bf_get(lpfc_sli_intf_if_type,
9575 &phba->sli4_hba.sli_intf);
27d6ac0a 9576 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
ff78d8f9 9577 if (pcmd && (*pcmd == ELS_CMD_FLOGI ||
cb69f7de 9578 *pcmd == ELS_CMD_SCR ||
df3fe766 9579 *pcmd == ELS_CMD_RDF ||
f60cb93b 9580 *pcmd == ELS_CMD_RSCN_XMT ||
6b5151fd 9581 *pcmd == ELS_CMD_FDISC ||
bdcd2b92 9582 *pcmd == ELS_CMD_LOGO ||
ff78d8f9
JS
9583 *pcmd == ELS_CMD_PLOGI)) {
9584 bf_set(els_req64_sp, &wqe->els_req, 1);
9585 bf_set(els_req64_sid, &wqe->els_req,
9586 iocbq->vport->fc_myDID);
939723a4
JS
9587 if ((*pcmd == ELS_CMD_FLOGI) &&
9588 !(phba->fc_topology ==
9589 LPFC_TOPOLOGY_LOOP))
9590 bf_set(els_req64_sid, &wqe->els_req, 0);
ff78d8f9
JS
9591 bf_set(wqe_ct, &wqe->els_req.wqe_com, 1);
9592 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
a7dd9c0f 9593 phba->vpi_ids[iocbq->vport->vpi]);
3ef6d24c 9594 } else if (pcmd && iocbq->context1) {
ff78d8f9
JS
9595 bf_set(wqe_ct, &wqe->els_req.wqe_com, 0);
9596 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9597 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
9598 }
c868595d 9599 }
6d368e53
JS
9600 bf_set(wqe_temp_rpi, &wqe->els_req.wqe_com,
9601 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
f0d9bccc
JS
9602 bf_set(wqe_els_id, &wqe->els_req.wqe_com, els_id);
9603 bf_set(wqe_dbde, &wqe->els_req.wqe_com, 1);
9604 bf_set(wqe_iod, &wqe->els_req.wqe_com, LPFC_WQE_IOD_READ);
9605 bf_set(wqe_qosd, &wqe->els_req.wqe_com, 1);
9606 bf_set(wqe_lenloc, &wqe->els_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9607 bf_set(wqe_ebde_cnt, &wqe->els_req.wqe_com, 0);
af22741c 9608 wqe->els_req.max_response_payload_len = total_len - xmit_len;
7851fe2c 9609 break;
5ffc266e 9610 case CMD_XMIT_SEQUENCE64_CX:
f0d9bccc
JS
9611 bf_set(wqe_ctxt_tag, &wqe->xmit_sequence.wqe_com,
9612 iocbq->iocb.un.ulpWord[3]);
9613 bf_set(wqe_rcvoxid, &wqe->xmit_sequence.wqe_com,
7851fe2c 9614 iocbq->iocb.unsli3.rcvsli3.ox_id);
5ffc266e
JS
9615 /* The entire sequence is transmitted for this IOCB */
9616 xmit_len = total_len;
9617 cmnd = CMD_XMIT_SEQUENCE64_CR;
1b51197d
JS
9618 if (phba->link_flag & LS_LOOPBACK_MODE)
9619 bf_set(wqe_xo, &wqe->xmit_sequence.wge_ctl, 1);
5bd5f66c 9620 /* fall through */
4f774513 9621 case CMD_XMIT_SEQUENCE64_CR:
f0d9bccc
JS
9622 /* word3 iocb=io_tag32 wqe=reserved */
9623 wqe->xmit_sequence.rsvd3 = 0;
4f774513
JS
9624 /* word4 relative_offset memcpy */
9625 /* word5 r_ctl/df_ctl memcpy */
f0d9bccc
JS
9626 bf_set(wqe_pu, &wqe->xmit_sequence.wqe_com, 0);
9627 bf_set(wqe_dbde, &wqe->xmit_sequence.wqe_com, 1);
9628 bf_set(wqe_iod, &wqe->xmit_sequence.wqe_com,
9629 LPFC_WQE_IOD_WRITE);
9630 bf_set(wqe_lenloc, &wqe->xmit_sequence.wqe_com,
9631 LPFC_WQE_LENLOC_WORD12);
9632 bf_set(wqe_ebde_cnt, &wqe->xmit_sequence.wqe_com, 0);
5ffc266e
JS
9633 wqe->xmit_sequence.xmit_len = xmit_len;
9634 command_type = OTHER_COMMAND;
7851fe2c 9635 break;
4f774513 9636 case CMD_XMIT_BCAST64_CN:
f0d9bccc
JS
9637 /* word3 iocb=iotag32 wqe=seq_payload_len */
9638 wqe->xmit_bcast64.seq_payload_len = xmit_len;
4f774513
JS
9639 /* word4 iocb=rsvd wqe=rsvd */
9640 /* word5 iocb=rctl/type/df_ctl wqe=rctl/type/df_ctl memcpy */
9641 /* word6 iocb=ctxt_tag/io_tag wqe=ctxt_tag/xri */
f0d9bccc 9642 bf_set(wqe_ct, &wqe->xmit_bcast64.wqe_com,
4f774513 9643 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
f0d9bccc
JS
9644 bf_set(wqe_dbde, &wqe->xmit_bcast64.wqe_com, 1);
9645 bf_set(wqe_iod, &wqe->xmit_bcast64.wqe_com, LPFC_WQE_IOD_WRITE);
9646 bf_set(wqe_lenloc, &wqe->xmit_bcast64.wqe_com,
9647 LPFC_WQE_LENLOC_WORD3);
9648 bf_set(wqe_ebde_cnt, &wqe->xmit_bcast64.wqe_com, 0);
7851fe2c 9649 break;
4f774513
JS
9650 case CMD_FCP_IWRITE64_CR:
9651 command_type = FCP_COMMAND_DATA_OUT;
f0d9bccc
JS
9652 /* word3 iocb=iotag wqe=payload_offset_len */
9653 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9654 bf_set(payload_offset_len, &wqe->fcp_iwrite,
9655 xmit_len + sizeof(struct fcp_rsp));
9656 bf_set(cmd_buff_len, &wqe->fcp_iwrite,
9657 0);
f0d9bccc
JS
9658 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9659 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9660 bf_set(wqe_erp, &wqe->fcp_iwrite.wqe_com,
9661 iocbq->iocb.ulpFCP2Rcvy);
9662 bf_set(wqe_lnk, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpXS);
9663 /* Always open the exchange */
f0d9bccc
JS
9664 bf_set(wqe_iod, &wqe->fcp_iwrite.wqe_com, LPFC_WQE_IOD_WRITE);
9665 bf_set(wqe_lenloc, &wqe->fcp_iwrite.wqe_com,
9666 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9667 bf_set(wqe_pu, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9668 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 1);
1ba981fd
JS
9669 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9670 bf_set(wqe_oas, &wqe->fcp_iwrite.wqe_com, 1);
c92c841c
JS
9671 bf_set(wqe_ccpe, &wqe->fcp_iwrite.wqe_com, 1);
9672 if (iocbq->priority) {
9673 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9674 (iocbq->priority << 1));
9675 } else {
1ba981fd
JS
9676 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9677 (phba->cfg_XLanePriority << 1));
9678 }
9679 }
b5c53958
JS
9680 /* Note, word 10 is already initialized to 0 */
9681
414abe0a
JS
9682 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9683 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9684 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 1);
9685 else
9686 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 0);
9687
b5c53958 9688 if (phba->fcp_embed_io) {
c490850a 9689 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9690 struct sli4_sge *sgl;
b5c53958
JS
9691 struct fcp_cmnd *fcp_cmnd;
9692 uint32_t *ptr;
9693
9694 /* 128 byte wqe support here */
b5c53958
JS
9695
9696 lpfc_cmd = iocbq->context1;
0794d601 9697 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9698 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9699
9700 /* Word 0-2 - FCP_CMND */
205e8240 9701 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9702 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9703 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9704 wqe->generic.bde.addrHigh = 0;
9705 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9706
205e8240
JS
9707 bf_set(wqe_wqes, &wqe->fcp_iwrite.wqe_com, 1);
9708 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 0);
b5c53958
JS
9709
9710 /* Word 22-29 FCP CMND Payload */
205e8240 9711 ptr = &wqe->words[22];
b5c53958
JS
9712 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9713 }
7851fe2c 9714 break;
4f774513 9715 case CMD_FCP_IREAD64_CR:
f0d9bccc
JS
9716 /* word3 iocb=iotag wqe=payload_offset_len */
9717 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9718 bf_set(payload_offset_len, &wqe->fcp_iread,
9719 xmit_len + sizeof(struct fcp_rsp));
9720 bf_set(cmd_buff_len, &wqe->fcp_iread,
9721 0);
f0d9bccc
JS
9722 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9723 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9724 bf_set(wqe_erp, &wqe->fcp_iread.wqe_com,
9725 iocbq->iocb.ulpFCP2Rcvy);
9726 bf_set(wqe_lnk, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpXS);
f1126688 9727 /* Always open the exchange */
f0d9bccc
JS
9728 bf_set(wqe_iod, &wqe->fcp_iread.wqe_com, LPFC_WQE_IOD_READ);
9729 bf_set(wqe_lenloc, &wqe->fcp_iread.wqe_com,
9730 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9731 bf_set(wqe_pu, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9732 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 1);
1ba981fd
JS
9733 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9734 bf_set(wqe_oas, &wqe->fcp_iread.wqe_com, 1);
c92c841c
JS
9735 bf_set(wqe_ccpe, &wqe->fcp_iread.wqe_com, 1);
9736 if (iocbq->priority) {
9737 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9738 (iocbq->priority << 1));
9739 } else {
1ba981fd
JS
9740 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9741 (phba->cfg_XLanePriority << 1));
9742 }
9743 }
b5c53958
JS
9744 /* Note, word 10 is already initialized to 0 */
9745
414abe0a
JS
9746 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9747 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9748 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 1);
9749 else
9750 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 0);
9751
b5c53958 9752 if (phba->fcp_embed_io) {
c490850a 9753 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9754 struct sli4_sge *sgl;
b5c53958
JS
9755 struct fcp_cmnd *fcp_cmnd;
9756 uint32_t *ptr;
9757
9758 /* 128 byte wqe support here */
b5c53958
JS
9759
9760 lpfc_cmd = iocbq->context1;
0794d601 9761 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9762 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9763
9764 /* Word 0-2 - FCP_CMND */
205e8240 9765 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9766 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9767 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9768 wqe->generic.bde.addrHigh = 0;
9769 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9770
205e8240
JS
9771 bf_set(wqe_wqes, &wqe->fcp_iread.wqe_com, 1);
9772 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 0);
b5c53958
JS
9773
9774 /* Word 22-29 FCP CMND Payload */
205e8240 9775 ptr = &wqe->words[22];
b5c53958
JS
9776 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9777 }
7851fe2c 9778 break;
4f774513 9779 case CMD_FCP_ICMND64_CR:
0ba4b219
JS
9780 /* word3 iocb=iotag wqe=payload_offset_len */
9781 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
9782 bf_set(payload_offset_len, &wqe->fcp_icmd,
9783 xmit_len + sizeof(struct fcp_rsp));
9784 bf_set(cmd_buff_len, &wqe->fcp_icmd,
9785 0);
f0d9bccc 9786 /* word3 iocb=IO_TAG wqe=reserved */
f0d9bccc 9787 bf_set(wqe_pu, &wqe->fcp_icmd.wqe_com, 0);
4f774513 9788 /* Always open the exchange */
f0d9bccc
JS
9789 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 1);
9790 bf_set(wqe_iod, &wqe->fcp_icmd.wqe_com, LPFC_WQE_IOD_WRITE);
9791 bf_set(wqe_qosd, &wqe->fcp_icmd.wqe_com, 1);
9792 bf_set(wqe_lenloc, &wqe->fcp_icmd.wqe_com,
9793 LPFC_WQE_LENLOC_NONE);
2a94aea4
JS
9794 bf_set(wqe_erp, &wqe->fcp_icmd.wqe_com,
9795 iocbq->iocb.ulpFCP2Rcvy);
1ba981fd
JS
9796 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9797 bf_set(wqe_oas, &wqe->fcp_icmd.wqe_com, 1);
c92c841c
JS
9798 bf_set(wqe_ccpe, &wqe->fcp_icmd.wqe_com, 1);
9799 if (iocbq->priority) {
9800 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9801 (iocbq->priority << 1));
9802 } else {
1ba981fd
JS
9803 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9804 (phba->cfg_XLanePriority << 1));
9805 }
9806 }
b5c53958
JS
9807 /* Note, word 10 is already initialized to 0 */
9808
9809 if (phba->fcp_embed_io) {
c490850a 9810 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9811 struct sli4_sge *sgl;
b5c53958
JS
9812 struct fcp_cmnd *fcp_cmnd;
9813 uint32_t *ptr;
9814
9815 /* 128 byte wqe support here */
b5c53958
JS
9816
9817 lpfc_cmd = iocbq->context1;
0794d601 9818 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9819 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9820
9821 /* Word 0-2 - FCP_CMND */
205e8240 9822 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9823 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9824 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9825 wqe->generic.bde.addrHigh = 0;
9826 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9827
205e8240
JS
9828 bf_set(wqe_wqes, &wqe->fcp_icmd.wqe_com, 1);
9829 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 0);
b5c53958
JS
9830
9831 /* Word 22-29 FCP CMND Payload */
205e8240 9832 ptr = &wqe->words[22];
b5c53958
JS
9833 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9834 }
7851fe2c 9835 break;
4f774513 9836 case CMD_GEN_REQUEST64_CR:
63e801ce
JS
9837 /* For this command calculate the xmit length of the
9838 * request bde.
9839 */
9840 xmit_len = 0;
9841 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9842 sizeof(struct ulp_bde64);
9843 for (i = 0; i < numBdes; i++) {
63e801ce 9844 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
546fc854
JS
9845 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
9846 break;
63e801ce
JS
9847 xmit_len += bde.tus.f.bdeSize;
9848 }
f0d9bccc
JS
9849 /* word3 iocb=IO_TAG wqe=request_payload_len */
9850 wqe->gen_req.request_payload_len = xmit_len;
9851 /* word4 iocb=parameter wqe=relative_offset memcpy */
9852 /* word5 [rctl, type, df_ctl, la] copied in memcpy */
4f774513
JS
9853 /* word6 context tag copied in memcpy */
9854 if (iocbq->iocb.ulpCt_h || iocbq->iocb.ulpCt_l) {
9855 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
9856 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9857 "2015 Invalid CT %x command 0x%x\n",
9858 ct, iocbq->iocb.ulpCommand);
9859 return IOCB_ERROR;
9860 }
f0d9bccc
JS
9861 bf_set(wqe_ct, &wqe->gen_req.wqe_com, 0);
9862 bf_set(wqe_tmo, &wqe->gen_req.wqe_com, iocbq->iocb.ulpTimeout);
9863 bf_set(wqe_pu, &wqe->gen_req.wqe_com, iocbq->iocb.ulpPU);
9864 bf_set(wqe_dbde, &wqe->gen_req.wqe_com, 1);
9865 bf_set(wqe_iod, &wqe->gen_req.wqe_com, LPFC_WQE_IOD_READ);
9866 bf_set(wqe_qosd, &wqe->gen_req.wqe_com, 1);
9867 bf_set(wqe_lenloc, &wqe->gen_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9868 bf_set(wqe_ebde_cnt, &wqe->gen_req.wqe_com, 0);
af22741c 9869 wqe->gen_req.max_response_payload_len = total_len - xmit_len;
4f774513 9870 command_type = OTHER_COMMAND;
7851fe2c 9871 break;
4f774513 9872 case CMD_XMIT_ELS_RSP64_CX:
c31098ce 9873 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513 9874 /* words0-2 BDE memcpy */
f0d9bccc
JS
9875 /* word3 iocb=iotag32 wqe=response_payload_len */
9876 wqe->xmit_els_rsp.response_payload_len = xmit_len;
939723a4
JS
9877 /* word4 */
9878 wqe->xmit_els_rsp.word4 = 0;
4f774513
JS
9879 /* word5 iocb=rsvd wge=did */
9880 bf_set(wqe_els_did, &wqe->xmit_els_rsp.wqe_dest,
939723a4
JS
9881 iocbq->iocb.un.xseq64.xmit_els_remoteID);
9882
9883 if_type = bf_get(lpfc_sli_intf_if_type,
9884 &phba->sli4_hba.sli_intf);
27d6ac0a 9885 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
939723a4
JS
9886 if (iocbq->vport->fc_flag & FC_PT2PT) {
9887 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9888 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
9889 iocbq->vport->fc_myDID);
9890 if (iocbq->vport->fc_myDID == Fabric_DID) {
9891 bf_set(wqe_els_did,
9892 &wqe->xmit_els_rsp.wqe_dest, 0);
9893 }
9894 }
9895 }
f0d9bccc
JS
9896 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com,
9897 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9898 bf_set(wqe_pu, &wqe->xmit_els_rsp.wqe_com, iocbq->iocb.ulpPU);
9899 bf_set(wqe_rcvoxid, &wqe->xmit_els_rsp.wqe_com,
7851fe2c 9900 iocbq->iocb.unsli3.rcvsli3.ox_id);
4f774513 9901 if (!iocbq->iocb.ulpCt_h && iocbq->iocb.ulpCt_l)
f0d9bccc 9902 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
6d368e53 9903 phba->vpi_ids[iocbq->vport->vpi]);
f0d9bccc
JS
9904 bf_set(wqe_dbde, &wqe->xmit_els_rsp.wqe_com, 1);
9905 bf_set(wqe_iod, &wqe->xmit_els_rsp.wqe_com, LPFC_WQE_IOD_WRITE);
9906 bf_set(wqe_qosd, &wqe->xmit_els_rsp.wqe_com, 1);
9907 bf_set(wqe_lenloc, &wqe->xmit_els_rsp.wqe_com,
9908 LPFC_WQE_LENLOC_WORD3);
9909 bf_set(wqe_ebde_cnt, &wqe->xmit_els_rsp.wqe_com, 0);
6d368e53
JS
9910 bf_set(wqe_rsp_temp_rpi, &wqe->xmit_els_rsp,
9911 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
ff78d8f9
JS
9912 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9913 iocbq->context2)->virt);
9914 if (phba->fc_topology == LPFC_TOPOLOGY_LOOP) {
939723a4
JS
9915 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9916 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
ff78d8f9 9917 iocbq->vport->fc_myDID);
939723a4
JS
9918 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com, 1);
9919 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
ff78d8f9
JS
9920 phba->vpi_ids[phba->pport->vpi]);
9921 }
4f774513 9922 command_type = OTHER_COMMAND;
7851fe2c 9923 break;
4f774513
JS
9924 case CMD_CLOSE_XRI_CN:
9925 case CMD_ABORT_XRI_CN:
9926 case CMD_ABORT_XRI_CX:
9927 /* words 0-2 memcpy should be 0 rserved */
9928 /* port will send abts */
dcf2a4e0
JS
9929 abrt_iotag = iocbq->iocb.un.acxri.abortContextTag;
9930 if (abrt_iotag != 0 && abrt_iotag <= phba->sli.last_iotag) {
9931 abrtiocbq = phba->sli.iocbq_lookup[abrt_iotag];
9932 fip = abrtiocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK;
9933 } else
9934 fip = 0;
9935
9936 if ((iocbq->iocb.ulpCommand == CMD_CLOSE_XRI_CN) || fip)
4f774513 9937 /*
dcf2a4e0
JS
9938 * The link is down, or the command was ELS_FIP
9939 * so the fw does not need to send abts
4f774513
JS
9940 * on the wire.
9941 */
9942 bf_set(abort_cmd_ia, &wqe->abort_cmd, 1);
9943 else
9944 bf_set(abort_cmd_ia, &wqe->abort_cmd, 0);
9945 bf_set(abort_cmd_criteria, &wqe->abort_cmd, T_XRI_TAG);
f0d9bccc
JS
9946 /* word5 iocb=CONTEXT_TAG|IO_TAG wqe=reserved */
9947 wqe->abort_cmd.rsrvd5 = 0;
9948 bf_set(wqe_ct, &wqe->abort_cmd.wqe_com,
4f774513
JS
9949 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9950 abort_tag = iocbq->iocb.un.acxri.abortIoTag;
4f774513
JS
9951 /*
9952 * The abort handler will send us CMD_ABORT_XRI_CN or
9953 * CMD_CLOSE_XRI_CN and the fw only accepts CMD_ABORT_XRI_CX
9954 */
f0d9bccc
JS
9955 bf_set(wqe_cmnd, &wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
9956 bf_set(wqe_qosd, &wqe->abort_cmd.wqe_com, 1);
9957 bf_set(wqe_lenloc, &wqe->abort_cmd.wqe_com,
9958 LPFC_WQE_LENLOC_NONE);
4f774513
JS
9959 cmnd = CMD_ABORT_XRI_CX;
9960 command_type = OTHER_COMMAND;
9961 xritag = 0;
7851fe2c 9962 break;
6669f9bb 9963 case CMD_XMIT_BLS_RSP64_CX:
6b5151fd 9964 ndlp = (struct lpfc_nodelist *)iocbq->context1;
546fc854 9965 /* As BLS ABTS RSP WQE is very different from other WQEs,
6669f9bb
JS
9966 * we re-construct this WQE here based on information in
9967 * iocbq from scratch.
9968 */
d9f492a1 9969 memset(wqe, 0, sizeof(*wqe));
5ffc266e 9970 /* OX_ID is invariable to who sent ABTS to CT exchange */
6669f9bb 9971 bf_set(xmit_bls_rsp64_oxid, &wqe->xmit_bls_rsp,
546fc854
JS
9972 bf_get(lpfc_abts_oxid, &iocbq->iocb.un.bls_rsp));
9973 if (bf_get(lpfc_abts_orig, &iocbq->iocb.un.bls_rsp) ==
5ffc266e
JS
9974 LPFC_ABTS_UNSOL_INT) {
9975 /* ABTS sent by initiator to CT exchange, the
9976 * RX_ID field will be filled with the newly
9977 * allocated responder XRI.
9978 */
9979 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
9980 iocbq->sli4_xritag);
9981 } else {
9982 /* ABTS sent by responder to CT exchange, the
9983 * RX_ID field will be filled with the responder
9984 * RX_ID from ABTS.
9985 */
9986 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
546fc854 9987 bf_get(lpfc_abts_rxid, &iocbq->iocb.un.bls_rsp));
5ffc266e 9988 }
6669f9bb
JS
9989 bf_set(xmit_bls_rsp64_seqcnthi, &wqe->xmit_bls_rsp, 0xffff);
9990 bf_set(wqe_xmit_bls_pt, &wqe->xmit_bls_rsp.wqe_dest, 0x1);
6b5151fd
JS
9991
9992 /* Use CT=VPI */
9993 bf_set(wqe_els_did, &wqe->xmit_bls_rsp.wqe_dest,
9994 ndlp->nlp_DID);
9995 bf_set(xmit_bls_rsp64_temprpi, &wqe->xmit_bls_rsp,
9996 iocbq->iocb.ulpContext);
9997 bf_set(wqe_ct, &wqe->xmit_bls_rsp.wqe_com, 1);
6669f9bb 9998 bf_set(wqe_ctxt_tag, &wqe->xmit_bls_rsp.wqe_com,
6b5151fd 9999 phba->vpi_ids[phba->pport->vpi]);
f0d9bccc
JS
10000 bf_set(wqe_qosd, &wqe->xmit_bls_rsp.wqe_com, 1);
10001 bf_set(wqe_lenloc, &wqe->xmit_bls_rsp.wqe_com,
10002 LPFC_WQE_LENLOC_NONE);
6669f9bb
JS
10003 /* Overwrite the pre-set comnd type with OTHER_COMMAND */
10004 command_type = OTHER_COMMAND;
546fc854
JS
10005 if (iocbq->iocb.un.xseq64.w5.hcsw.Rctl == FC_RCTL_BA_RJT) {
10006 bf_set(xmit_bls_rsp64_rjt_vspec, &wqe->xmit_bls_rsp,
10007 bf_get(lpfc_vndr_code, &iocbq->iocb.un.bls_rsp));
10008 bf_set(xmit_bls_rsp64_rjt_expc, &wqe->xmit_bls_rsp,
10009 bf_get(lpfc_rsn_expln, &iocbq->iocb.un.bls_rsp));
10010 bf_set(xmit_bls_rsp64_rjt_rsnc, &wqe->xmit_bls_rsp,
10011 bf_get(lpfc_rsn_code, &iocbq->iocb.un.bls_rsp));
10012 }
10013
7851fe2c 10014 break;
ae9e28f3 10015 case CMD_SEND_FRAME:
e62245d9
JS
10016 bf_set(wqe_cmnd, &wqe->generic.wqe_com, CMD_SEND_FRAME);
10017 bf_set(wqe_sof, &wqe->generic.wqe_com, 0x2E); /* SOF byte */
10018 bf_set(wqe_eof, &wqe->generic.wqe_com, 0x41); /* EOF byte */
10019 bf_set(wqe_lenloc, &wqe->generic.wqe_com, 1);
10020 bf_set(wqe_xbl, &wqe->generic.wqe_com, 1);
10021 bf_set(wqe_dbde, &wqe->generic.wqe_com, 1);
10022 bf_set(wqe_xc, &wqe->generic.wqe_com, 1);
10023 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, 0xA);
10024 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
ae9e28f3
JS
10025 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
10026 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
10027 return 0;
4f774513
JS
10028 case CMD_XRI_ABORTED_CX:
10029 case CMD_CREATE_XRI_CR: /* Do we expect to use this? */
4f774513
JS
10030 case CMD_IOCB_FCP_IBIDIR64_CR: /* bidirectional xfer */
10031 case CMD_FCP_TSEND64_CX: /* Target mode send xfer-ready */
10032 case CMD_FCP_TRSP64_CX: /* Target mode rcv */
10033 case CMD_FCP_AUTO_TRSP_CX: /* Auto target rsp */
10034 default:
10035 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
10036 "2014 Invalid command 0x%x\n",
10037 iocbq->iocb.ulpCommand);
10038 return IOCB_ERROR;
7851fe2c 10039 break;
4f774513 10040 }
6d368e53 10041
8012cc38
JS
10042 if (iocbq->iocb_flag & LPFC_IO_DIF_PASS)
10043 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_PASSTHRU);
10044 else if (iocbq->iocb_flag & LPFC_IO_DIF_STRIP)
10045 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_STRIP);
10046 else if (iocbq->iocb_flag & LPFC_IO_DIF_INSERT)
10047 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_INSERT);
10048 iocbq->iocb_flag &= ~(LPFC_IO_DIF_PASS | LPFC_IO_DIF_STRIP |
10049 LPFC_IO_DIF_INSERT);
f0d9bccc
JS
10050 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
10051 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
10052 wqe->generic.wqe_com.abort_tag = abort_tag;
10053 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, command_type);
10054 bf_set(wqe_cmnd, &wqe->generic.wqe_com, cmnd);
10055 bf_set(wqe_class, &wqe->generic.wqe_com, iocbq->iocb.ulpClass);
10056 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
4f774513
JS
10057 return 0;
10058}
10059
10060/**
10061 * __lpfc_sli_issue_iocb_s4 - SLI4 device lockless ver of lpfc_sli_issue_iocb
10062 * @phba: Pointer to HBA context object.
10063 * @ring_number: SLI ring number to issue iocb on.
10064 * @piocb: Pointer to command iocb.
10065 * @flag: Flag indicating if this command can be put into txq.
10066 *
10067 * __lpfc_sli_issue_iocb_s4 is used by other functions in the driver to issue
10068 * an iocb command to an HBA with SLI-4 interface spec.
10069 *
27f3efd6 10070 * This function is called with ringlock held. The function will return success
4f774513
JS
10071 * after it successfully submit the iocb to firmware or after adding to the
10072 * txq.
10073 **/
10074static int
10075__lpfc_sli_issue_iocb_s4(struct lpfc_hba *phba, uint32_t ring_number,
10076 struct lpfc_iocbq *piocb, uint32_t flag)
10077{
10078 struct lpfc_sglq *sglq;
205e8240 10079 union lpfc_wqe128 wqe;
1ba981fd 10080 struct lpfc_queue *wq;
895427bd 10081 struct lpfc_sli_ring *pring;
4f774513 10082
895427bd
JS
10083 /* Get the WQ */
10084 if ((piocb->iocb_flag & LPFC_IO_FCP) ||
10085 (piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
c00f62e6 10086 wq = phba->sli4_hba.hdwq[piocb->hba_wqidx].io_wq;
895427bd
JS
10087 } else {
10088 wq = phba->sli4_hba.els_wq;
10089 }
10090
10091 /* Get corresponding ring */
10092 pring = wq->pring;
1c2ba475 10093
b5c53958
JS
10094 /*
10095 * The WQE can be either 64 or 128 bytes,
b5c53958 10096 */
b5c53958 10097
cda7fa18 10098 lockdep_assert_held(&pring->ring_lock);
895427bd 10099
4f774513
JS
10100 if (piocb->sli4_xritag == NO_XRI) {
10101 if (piocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
6b5151fd 10102 piocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN)
4f774513
JS
10103 sglq = NULL;
10104 else {
0e9bb8d7 10105 if (!list_empty(&pring->txq)) {
2a9bf3d0
JS
10106 if (!(flag & SLI_IOCB_RET_IOCB)) {
10107 __lpfc_sli_ringtx_put(phba,
10108 pring, piocb);
10109 return IOCB_SUCCESS;
10110 } else {
10111 return IOCB_BUSY;
10112 }
10113 } else {
895427bd 10114 sglq = __lpfc_sli_get_els_sglq(phba, piocb);
2a9bf3d0
JS
10115 if (!sglq) {
10116 if (!(flag & SLI_IOCB_RET_IOCB)) {
10117 __lpfc_sli_ringtx_put(phba,
10118 pring,
10119 piocb);
10120 return IOCB_SUCCESS;
10121 } else
10122 return IOCB_BUSY;
10123 }
10124 }
4f774513 10125 }
2ea259ee 10126 } else if (piocb->iocb_flag & LPFC_IO_FCP)
6d368e53
JS
10127 /* These IO's already have an XRI and a mapped sgl. */
10128 sglq = NULL;
2ea259ee 10129 else {
6d368e53
JS
10130 /*
10131 * This is a continuation of a commandi,(CX) so this
4f774513
JS
10132 * sglq is on the active list
10133 */
edccdc17 10134 sglq = __lpfc_get_active_sglq(phba, piocb->sli4_lxritag);
4f774513
JS
10135 if (!sglq)
10136 return IOCB_ERROR;
10137 }
10138
10139 if (sglq) {
6d368e53 10140 piocb->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0 10141 piocb->sli4_xritag = sglq->sli4_xritag;
2a9bf3d0 10142 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocb, sglq))
4f774513
JS
10143 return IOCB_ERROR;
10144 }
10145
205e8240 10146 if (lpfc_sli4_iocb2wqe(phba, piocb, &wqe))
4f774513
JS
10147 return IOCB_ERROR;
10148
205e8240 10149 if (lpfc_sli4_wq_put(wq, &wqe))
895427bd 10150 return IOCB_ERROR;
4f774513
JS
10151 lpfc_sli_ringtxcmpl_put(phba, pring, piocb);
10152
10153 return 0;
10154}
10155
10156/**
10157 * __lpfc_sli_issue_iocb - Wrapper func of lockless version for issuing iocb
10158 *
10159 * This routine wraps the actual lockless version for issusing IOCB function
10160 * pointer from the lpfc_hba struct.
10161 *
10162 * Return codes:
b5c53958
JS
10163 * IOCB_ERROR - Error
10164 * IOCB_SUCCESS - Success
10165 * IOCB_BUSY - Busy
4f774513 10166 **/
2a9bf3d0 10167int
4f774513
JS
10168__lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
10169 struct lpfc_iocbq *piocb, uint32_t flag)
10170{
10171 return phba->__lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10172}
10173
10174/**
25985edc 10175 * lpfc_sli_api_table_setup - Set up sli api function jump table
4f774513
JS
10176 * @phba: The hba struct for which this call is being executed.
10177 * @dev_grp: The HBA PCI-Device group number.
10178 *
10179 * This routine sets up the SLI interface API function jump table in @phba
10180 * struct.
10181 * Returns: 0 - success, -ENODEV - failure.
10182 **/
10183int
10184lpfc_sli_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
10185{
10186
10187 switch (dev_grp) {
10188 case LPFC_PCI_DEV_LP:
10189 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s3;
10190 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s3;
10191 break;
10192 case LPFC_PCI_DEV_OC:
10193 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s4;
10194 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s4;
10195 break;
10196 default:
10197 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10198 "1419 Invalid HBA PCI-device group: 0x%x\n",
10199 dev_grp);
10200 return -ENODEV;
10201 break;
10202 }
10203 phba->lpfc_get_iocb_from_iocbq = lpfc_get_iocb_from_iocbq;
10204 return 0;
10205}
10206
a1efe163 10207/**
895427bd 10208 * lpfc_sli4_calc_ring - Calculates which ring to use
a1efe163 10209 * @phba: Pointer to HBA context object.
a1efe163
JS
10210 * @piocb: Pointer to command iocb.
10211 *
895427bd
JS
10212 * For SLI4 only, FCP IO can deferred to one fo many WQs, based on
10213 * hba_wqidx, thus we need to calculate the corresponding ring.
a1efe163 10214 * Since ABORTS must go on the same WQ of the command they are
895427bd 10215 * aborting, we use command's hba_wqidx.
a1efe163 10216 */
895427bd
JS
10217struct lpfc_sli_ring *
10218lpfc_sli4_calc_ring(struct lpfc_hba *phba, struct lpfc_iocbq *piocb)
9bd2bff5 10219{
c490850a 10220 struct lpfc_io_buf *lpfc_cmd;
5e5b511d 10221
895427bd 10222 if (piocb->iocb_flag & (LPFC_IO_FCP | LPFC_USE_FCPWQIDX)) {
cdb42bec 10223 if (unlikely(!phba->sli4_hba.hdwq))
7370d10a
JS
10224 return NULL;
10225 /*
10226 * for abort iocb hba_wqidx should already
10227 * be setup based on what work queue we used.
10228 */
10229 if (!(piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
c490850a 10230 lpfc_cmd = (struct lpfc_io_buf *)piocb->context1;
1fbf9742 10231 piocb->hba_wqidx = lpfc_cmd->hdwq_no;
9bd2bff5 10232 }
c00f62e6 10233 return phba->sli4_hba.hdwq[piocb->hba_wqidx].io_wq->pring;
895427bd
JS
10234 } else {
10235 if (unlikely(!phba->sli4_hba.els_wq))
10236 return NULL;
10237 piocb->hba_wqidx = 0;
10238 return phba->sli4_hba.els_wq->pring;
9bd2bff5 10239 }
9bd2bff5
JS
10240}
10241
4f774513
JS
10242/**
10243 * lpfc_sli_issue_iocb - Wrapper function for __lpfc_sli_issue_iocb
10244 * @phba: Pointer to HBA context object.
10245 * @pring: Pointer to driver SLI ring object.
10246 * @piocb: Pointer to command iocb.
10247 * @flag: Flag indicating if this command can be put into txq.
10248 *
10249 * lpfc_sli_issue_iocb is a wrapper around __lpfc_sli_issue_iocb
10250 * function. This function gets the hbalock and calls
10251 * __lpfc_sli_issue_iocb function and will return the error returned
10252 * by __lpfc_sli_issue_iocb function. This wrapper is used by
10253 * functions which do not hold hbalock.
10254 **/
10255int
10256lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
10257 struct lpfc_iocbq *piocb, uint32_t flag)
10258{
2a76a283 10259 struct lpfc_sli_ring *pring;
93a4d6f4 10260 struct lpfc_queue *eq;
4f774513 10261 unsigned long iflags;
6a828b0f 10262 int rc;
4f774513 10263
7e56aa25 10264 if (phba->sli_rev == LPFC_SLI_REV4) {
93a4d6f4
JS
10265 eq = phba->sli4_hba.hdwq[piocb->hba_wqidx].hba_eq;
10266
895427bd
JS
10267 pring = lpfc_sli4_calc_ring(phba, piocb);
10268 if (unlikely(pring == NULL))
9bd2bff5 10269 return IOCB_ERROR;
ba20c853 10270
9bd2bff5
JS
10271 spin_lock_irqsave(&pring->ring_lock, iflags);
10272 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10273 spin_unlock_irqrestore(&pring->ring_lock, iflags);
93a4d6f4
JS
10274
10275 lpfc_sli4_poll_eq(eq, LPFC_POLL_FASTPATH);
7e56aa25
JS
10276 } else {
10277 /* For now, SLI2/3 will still use hbalock */
10278 spin_lock_irqsave(&phba->hbalock, iflags);
10279 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10280 spin_unlock_irqrestore(&phba->hbalock, iflags);
10281 }
4f774513
JS
10282 return rc;
10283}
10284
10285/**
10286 * lpfc_extra_ring_setup - Extra ring setup function
10287 * @phba: Pointer to HBA context object.
10288 *
10289 * This function is called while driver attaches with the
10290 * HBA to setup the extra ring. The extra ring is used
10291 * only when driver needs to support target mode functionality
10292 * or IP over FC functionalities.
10293 *
895427bd 10294 * This function is called with no lock held. SLI3 only.
4f774513
JS
10295 **/
10296static int
10297lpfc_extra_ring_setup( struct lpfc_hba *phba)
10298{
10299 struct lpfc_sli *psli;
10300 struct lpfc_sli_ring *pring;
10301
10302 psli = &phba->sli;
10303
10304 /* Adjust cmd/rsp ring iocb entries more evenly */
10305
10306 /* Take some away from the FCP ring */
895427bd 10307 pring = &psli->sli3_ring[LPFC_FCP_RING];
7e56aa25
JS
10308 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10309 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10310 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10311 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e 10312
a4bc3379 10313 /* and give them to the extra ring */
895427bd 10314 pring = &psli->sli3_ring[LPFC_EXTRA_RING];
a4bc3379 10315
7e56aa25
JS
10316 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10317 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10318 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10319 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e
JW
10320
10321 /* Setup default profile for this ring */
10322 pring->iotag_max = 4096;
10323 pring->num_mask = 1;
10324 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS
10325 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
10326 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW
10327 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
10328 return 0;
10329}
10330
cb69f7de
JS
10331/* lpfc_sli_abts_err_handler - handle a failed ABTS request from an SLI3 port.
10332 * @phba: Pointer to HBA context object.
10333 * @iocbq: Pointer to iocb object.
10334 *
10335 * The async_event handler calls this routine when it receives
10336 * an ASYNC_STATUS_CN event from the port. The port generates
10337 * this event when an Abort Sequence request to an rport fails
10338 * twice in succession. The abort could be originated by the
10339 * driver or by the port. The ABTS could have been for an ELS
10340 * or FCP IO. The port only generates this event when an ABTS
10341 * fails to complete after one retry.
10342 */
10343static void
10344lpfc_sli_abts_err_handler(struct lpfc_hba *phba,
10345 struct lpfc_iocbq *iocbq)
10346{
10347 struct lpfc_nodelist *ndlp = NULL;
10348 uint16_t rpi = 0, vpi = 0;
10349 struct lpfc_vport *vport = NULL;
10350
10351 /* The rpi in the ulpContext is vport-sensitive. */
10352 vpi = iocbq->iocb.un.asyncstat.sub_ctxt_tag;
10353 rpi = iocbq->iocb.ulpContext;
10354
10355 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10356 "3092 Port generated ABTS async event "
10357 "on vpi %d rpi %d status 0x%x\n",
10358 vpi, rpi, iocbq->iocb.ulpStatus);
10359
10360 vport = lpfc_find_vport_by_vpid(phba, vpi);
10361 if (!vport)
10362 goto err_exit;
10363 ndlp = lpfc_findnode_rpi(vport, rpi);
10364 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp))
10365 goto err_exit;
10366
10367 if (iocbq->iocb.ulpStatus == IOSTAT_LOCAL_REJECT)
10368 lpfc_sli_abts_recover_port(vport, ndlp);
10369 return;
10370
10371 err_exit:
10372 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10373 "3095 Event Context not found, no "
10374 "action on vpi %d rpi %d status 0x%x, reason 0x%x\n",
10375 iocbq->iocb.ulpContext, iocbq->iocb.ulpStatus,
10376 vpi, rpi);
10377}
10378
10379/* lpfc_sli4_abts_err_handler - handle a failed ABTS request from an SLI4 port.
10380 * @phba: pointer to HBA context object.
10381 * @ndlp: nodelist pointer for the impacted rport.
10382 * @axri: pointer to the wcqe containing the failed exchange.
10383 *
10384 * The driver calls this routine when it receives an ABORT_XRI_FCP CQE from the
10385 * port. The port generates this event when an abort exchange request to an
10386 * rport fails twice in succession with no reply. The abort could be originated
10387 * by the driver or by the port. The ABTS could have been for an ELS or FCP IO.
10388 */
10389void
10390lpfc_sli4_abts_err_handler(struct lpfc_hba *phba,
10391 struct lpfc_nodelist *ndlp,
10392 struct sli4_wcqe_xri_aborted *axri)
10393{
10394 struct lpfc_vport *vport;
5c1db2ac 10395 uint32_t ext_status = 0;
cb69f7de 10396
6b5151fd 10397 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) {
cb69f7de
JS
10398 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10399 "3115 Node Context not found, driver "
10400 "ignoring abts err event\n");
6b5151fd
JS
10401 return;
10402 }
10403
cb69f7de
JS
10404 vport = ndlp->vport;
10405 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10406 "3116 Port generated FCP XRI ABORT event on "
5c1db2ac 10407 "vpi %d rpi %d xri x%x status 0x%x parameter x%x\n",
8e668af5 10408 ndlp->vport->vpi, phba->sli4_hba.rpi_ids[ndlp->nlp_rpi],
cb69f7de 10409 bf_get(lpfc_wcqe_xa_xri, axri),
5c1db2ac
JS
10410 bf_get(lpfc_wcqe_xa_status, axri),
10411 axri->parameter);
cb69f7de 10412
5c1db2ac
JS
10413 /*
10414 * Catch the ABTS protocol failure case. Older OCe FW releases returned
10415 * LOCAL_REJECT and 0 for a failed ABTS exchange and later OCe and
10416 * LPe FW releases returned LOCAL_REJECT and SEQUENCE_TIMEOUT.
10417 */
e3d2b802 10418 ext_status = axri->parameter & IOERR_PARAM_MASK;
5c1db2ac
JS
10419 if ((bf_get(lpfc_wcqe_xa_status, axri) == IOSTAT_LOCAL_REJECT) &&
10420 ((ext_status == IOERR_SEQUENCE_TIMEOUT) || (ext_status == 0)))
cb69f7de
JS
10421 lpfc_sli_abts_recover_port(vport, ndlp);
10422}
10423
e59058c4 10424/**
3621a710 10425 * lpfc_sli_async_event_handler - ASYNC iocb handler function
e59058c4
JS
10426 * @phba: Pointer to HBA context object.
10427 * @pring: Pointer to driver SLI ring object.
10428 * @iocbq: Pointer to iocb object.
10429 *
10430 * This function is called by the slow ring event handler
10431 * function when there is an ASYNC event iocb in the ring.
10432 * This function is called with no lock held.
10433 * Currently this function handles only temperature related
10434 * ASYNC events. The function decodes the temperature sensor
10435 * event message and posts events for the management applications.
10436 **/
98c9ea5c 10437static void
57127f15
JS
10438lpfc_sli_async_event_handler(struct lpfc_hba * phba,
10439 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
10440{
10441 IOCB_t *icmd;
10442 uint16_t evt_code;
57127f15
JS
10443 struct temp_event temp_event_data;
10444 struct Scsi_Host *shost;
a257bf90 10445 uint32_t *iocb_w;
57127f15
JS
10446
10447 icmd = &iocbq->iocb;
10448 evt_code = icmd->un.asyncstat.evt_code;
57127f15 10449
cb69f7de
JS
10450 switch (evt_code) {
10451 case ASYNC_TEMP_WARN:
10452 case ASYNC_TEMP_SAFE:
10453 temp_event_data.data = (uint32_t) icmd->ulpContext;
10454 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
10455 if (evt_code == ASYNC_TEMP_WARN) {
10456 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
10457 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10458 "0347 Adapter is very hot, please take "
10459 "corrective action. temperature : %d Celsius\n",
10460 (uint32_t) icmd->ulpContext);
10461 } else {
10462 temp_event_data.event_code = LPFC_NORMAL_TEMP;
10463 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10464 "0340 Adapter temperature is OK now. "
10465 "temperature : %d Celsius\n",
10466 (uint32_t) icmd->ulpContext);
10467 }
10468
10469 /* Send temperature change event to applications */
10470 shost = lpfc_shost_from_vport(phba->pport);
10471 fc_host_post_vendor_event(shost, fc_get_event_number(),
10472 sizeof(temp_event_data), (char *) &temp_event_data,
10473 LPFC_NL_VENDOR_ID);
10474 break;
10475 case ASYNC_STATUS_CN:
10476 lpfc_sli_abts_err_handler(phba, iocbq);
10477 break;
10478 default:
a257bf90 10479 iocb_w = (uint32_t *) icmd;
cb69f7de 10480 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
76bb24ef 10481 "0346 Ring %d handler: unexpected ASYNC_STATUS"
e4e74273 10482 " evt_code 0x%x\n"
a257bf90
JS
10483 "W0 0x%08x W1 0x%08x W2 0x%08x W3 0x%08x\n"
10484 "W4 0x%08x W5 0x%08x W6 0x%08x W7 0x%08x\n"
10485 "W8 0x%08x W9 0x%08x W10 0x%08x W11 0x%08x\n"
10486 "W12 0x%08x W13 0x%08x W14 0x%08x W15 0x%08x\n",
cb69f7de 10487 pring->ringno, icmd->un.asyncstat.evt_code,
a257bf90
JS
10488 iocb_w[0], iocb_w[1], iocb_w[2], iocb_w[3],
10489 iocb_w[4], iocb_w[5], iocb_w[6], iocb_w[7],
10490 iocb_w[8], iocb_w[9], iocb_w[10], iocb_w[11],
10491 iocb_w[12], iocb_w[13], iocb_w[14], iocb_w[15]);
10492
cb69f7de 10493 break;
57127f15 10494 }
57127f15
JS
10495}
10496
10497
e59058c4 10498/**
895427bd 10499 * lpfc_sli4_setup - SLI ring setup function
e59058c4
JS
10500 * @phba: Pointer to HBA context object.
10501 *
10502 * lpfc_sli_setup sets up rings of the SLI interface with
10503 * number of iocbs per ring and iotags. This function is
10504 * called while driver attach to the HBA and before the
10505 * interrupts are enabled. So there is no need for locking.
10506 *
10507 * This function always returns 0.
10508 **/
dea3101e 10509int
895427bd
JS
10510lpfc_sli4_setup(struct lpfc_hba *phba)
10511{
10512 struct lpfc_sli_ring *pring;
10513
10514 pring = phba->sli4_hba.els_wq->pring;
10515 pring->num_mask = LPFC_MAX_RING_MASK;
10516 pring->prt[0].profile = 0; /* Mask 0 */
10517 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10518 pring->prt[0].type = FC_TYPE_ELS;
10519 pring->prt[0].lpfc_sli_rcv_unsol_event =
10520 lpfc_els_unsol_event;
10521 pring->prt[1].profile = 0; /* Mask 1 */
10522 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10523 pring->prt[1].type = FC_TYPE_ELS;
10524 pring->prt[1].lpfc_sli_rcv_unsol_event =
10525 lpfc_els_unsol_event;
10526 pring->prt[2].profile = 0; /* Mask 2 */
10527 /* NameServer Inquiry */
10528 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
10529 /* NameServer */
10530 pring->prt[2].type = FC_TYPE_CT;
10531 pring->prt[2].lpfc_sli_rcv_unsol_event =
10532 lpfc_ct_unsol_event;
10533 pring->prt[3].profile = 0; /* Mask 3 */
10534 /* NameServer response */
10535 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
10536 /* NameServer */
10537 pring->prt[3].type = FC_TYPE_CT;
10538 pring->prt[3].lpfc_sli_rcv_unsol_event =
10539 lpfc_ct_unsol_event;
10540 return 0;
10541}
10542
10543/**
10544 * lpfc_sli_setup - SLI ring setup function
10545 * @phba: Pointer to HBA context object.
10546 *
10547 * lpfc_sli_setup sets up rings of the SLI interface with
10548 * number of iocbs per ring and iotags. This function is
10549 * called while driver attach to the HBA and before the
10550 * interrupts are enabled. So there is no need for locking.
10551 *
10552 * This function always returns 0. SLI3 only.
10553 **/
10554int
dea3101e
JB
10555lpfc_sli_setup(struct lpfc_hba *phba)
10556{
ed957684 10557 int i, totiocbsize = 0;
dea3101e
JB
10558 struct lpfc_sli *psli = &phba->sli;
10559 struct lpfc_sli_ring *pring;
10560
2a76a283 10561 psli->num_rings = MAX_SLI3_CONFIGURED_RINGS;
dea3101e 10562 psli->sli_flag = 0;
dea3101e 10563
604a3e30
JB
10564 psli->iocbq_lookup = NULL;
10565 psli->iocbq_lookup_len = 0;
10566 psli->last_iotag = 0;
10567
dea3101e 10568 for (i = 0; i < psli->num_rings; i++) {
895427bd 10569 pring = &psli->sli3_ring[i];
dea3101e
JB
10570 switch (i) {
10571 case LPFC_FCP_RING: /* ring 0 - FCP */
10572 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10573 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
10574 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
10575 pring->sli.sli3.numCiocb +=
10576 SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10577 pring->sli.sli3.numRiocb +=
10578 SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10579 pring->sli.sli3.numCiocb +=
10580 SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10581 pring->sli.sli3.numRiocb +=
10582 SLI2_IOCB_RSP_R3XTRA_ENTRIES;
10583 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10584 SLI3_IOCB_CMD_SIZE :
10585 SLI2_IOCB_CMD_SIZE;
7e56aa25 10586 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10587 SLI3_IOCB_RSP_SIZE :
10588 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10589 pring->iotag_ctr = 0;
10590 pring->iotag_max =
92d7f7b0 10591 (phba->cfg_hba_queue_depth * 2);
dea3101e
JB
10592 pring->fast_iotag = pring->iotag_max;
10593 pring->num_mask = 0;
10594 break;
a4bc3379 10595 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e 10596 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10597 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
10598 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
10599 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10600 SLI3_IOCB_CMD_SIZE :
10601 SLI2_IOCB_CMD_SIZE;
7e56aa25 10602 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10603 SLI3_IOCB_RSP_SIZE :
10604 SLI2_IOCB_RSP_SIZE;
2e0fef85 10605 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e
JB
10606 pring->num_mask = 0;
10607 break;
10608 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
10609 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10610 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
10611 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
10612 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10613 SLI3_IOCB_CMD_SIZE :
10614 SLI2_IOCB_CMD_SIZE;
7e56aa25 10615 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10616 SLI3_IOCB_RSP_SIZE :
10617 SLI2_IOCB_RSP_SIZE;
dea3101e
JB
10618 pring->fast_iotag = 0;
10619 pring->iotag_ctr = 0;
10620 pring->iotag_max = 4096;
57127f15
JS
10621 pring->lpfc_sli_rcv_async_status =
10622 lpfc_sli_async_event_handler;
6669f9bb 10623 pring->num_mask = LPFC_MAX_RING_MASK;
dea3101e 10624 pring->prt[0].profile = 0; /* Mask 0 */
6a9c52cf
JS
10625 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10626 pring->prt[0].type = FC_TYPE_ELS;
dea3101e 10627 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 10628 lpfc_els_unsol_event;
dea3101e 10629 pring->prt[1].profile = 0; /* Mask 1 */
6a9c52cf
JS
10630 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10631 pring->prt[1].type = FC_TYPE_ELS;
dea3101e 10632 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 10633 lpfc_els_unsol_event;
dea3101e
JB
10634 pring->prt[2].profile = 0; /* Mask 2 */
10635 /* NameServer Inquiry */
6a9c52cf 10636 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
dea3101e 10637 /* NameServer */
6a9c52cf 10638 pring->prt[2].type = FC_TYPE_CT;
dea3101e 10639 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 10640 lpfc_ct_unsol_event;
dea3101e
JB
10641 pring->prt[3].profile = 0; /* Mask 3 */
10642 /* NameServer response */
6a9c52cf 10643 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
dea3101e 10644 /* NameServer */
6a9c52cf 10645 pring->prt[3].type = FC_TYPE_CT;
dea3101e 10646 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 10647 lpfc_ct_unsol_event;
dea3101e
JB
10648 break;
10649 }
7e56aa25
JS
10650 totiocbsize += (pring->sli.sli3.numCiocb *
10651 pring->sli.sli3.sizeCiocb) +
10652 (pring->sli.sli3.numRiocb * pring->sli.sli3.sizeRiocb);
dea3101e 10653 }
ed957684 10654 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 10655 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS
10656 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
10657 "SLI2 SLIM Data: x%x x%lx\n",
10658 phba->brd_no, totiocbsize,
10659 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 10660 }
cf5bf97e
JW
10661 if (phba->cfg_multi_ring_support == 2)
10662 lpfc_extra_ring_setup(phba);
dea3101e
JB
10663
10664 return 0;
10665}
10666
e59058c4 10667/**
895427bd 10668 * lpfc_sli4_queue_init - Queue initialization function
e59058c4
JS
10669 * @phba: Pointer to HBA context object.
10670 *
895427bd 10671 * lpfc_sli4_queue_init sets up mailbox queues and iocb queues for each
e59058c4
JS
10672 * ring. This function also initializes ring indices of each ring.
10673 * This function is called during the initialization of the SLI
10674 * interface of an HBA.
10675 * This function is called with no lock held and always returns
10676 * 1.
10677 **/
895427bd
JS
10678void
10679lpfc_sli4_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10680{
10681 struct lpfc_sli *psli;
10682 struct lpfc_sli_ring *pring;
604a3e30 10683 int i;
dea3101e
JB
10684
10685 psli = &phba->sli;
2e0fef85 10686 spin_lock_irq(&phba->hbalock);
dea3101e 10687 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10688 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e 10689 /* Initialize list headers for txq and txcmplq as double linked lists */
cdb42bec 10690 for (i = 0; i < phba->cfg_hdw_queue; i++) {
c00f62e6 10691 pring = phba->sli4_hba.hdwq[i].io_wq->pring;
895427bd
JS
10692 pring->flag = 0;
10693 pring->ringno = LPFC_FCP_RING;
c490850a 10694 pring->txcmplq_cnt = 0;
895427bd
JS
10695 INIT_LIST_HEAD(&pring->txq);
10696 INIT_LIST_HEAD(&pring->txcmplq);
10697 INIT_LIST_HEAD(&pring->iocb_continueq);
10698 spin_lock_init(&pring->ring_lock);
10699 }
10700 pring = phba->sli4_hba.els_wq->pring;
10701 pring->flag = 0;
10702 pring->ringno = LPFC_ELS_RING;
c490850a 10703 pring->txcmplq_cnt = 0;
895427bd
JS
10704 INIT_LIST_HEAD(&pring->txq);
10705 INIT_LIST_HEAD(&pring->txcmplq);
10706 INIT_LIST_HEAD(&pring->iocb_continueq);
10707 spin_lock_init(&pring->ring_lock);
dea3101e 10708
cdb42bec 10709 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
10710 pring = phba->sli4_hba.nvmels_wq->pring;
10711 pring->flag = 0;
10712 pring->ringno = LPFC_ELS_RING;
c490850a 10713 pring->txcmplq_cnt = 0;
895427bd
JS
10714 INIT_LIST_HEAD(&pring->txq);
10715 INIT_LIST_HEAD(&pring->txcmplq);
10716 INIT_LIST_HEAD(&pring->iocb_continueq);
10717 spin_lock_init(&pring->ring_lock);
10718 }
10719
10720 spin_unlock_irq(&phba->hbalock);
10721}
10722
10723/**
10724 * lpfc_sli_queue_init - Queue initialization function
10725 * @phba: Pointer to HBA context object.
10726 *
10727 * lpfc_sli_queue_init sets up mailbox queues and iocb queues for each
10728 * ring. This function also initializes ring indices of each ring.
10729 * This function is called during the initialization of the SLI
10730 * interface of an HBA.
10731 * This function is called with no lock held and always returns
10732 * 1.
10733 **/
10734void
10735lpfc_sli_queue_init(struct lpfc_hba *phba)
dea3101e
JB
10736{
10737 struct lpfc_sli *psli;
10738 struct lpfc_sli_ring *pring;
604a3e30 10739 int i;
dea3101e
JB
10740
10741 psli = &phba->sli;
2e0fef85 10742 spin_lock_irq(&phba->hbalock);
dea3101e 10743 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10744 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e
JB
10745 /* Initialize list headers for txq and txcmplq as double linked lists */
10746 for (i = 0; i < psli->num_rings; i++) {
895427bd 10747 pring = &psli->sli3_ring[i];
dea3101e 10748 pring->ringno = i;
7e56aa25
JS
10749 pring->sli.sli3.next_cmdidx = 0;
10750 pring->sli.sli3.local_getidx = 0;
10751 pring->sli.sli3.cmdidx = 0;
dea3101e 10752 INIT_LIST_HEAD(&pring->iocb_continueq);
9c2face6 10753 INIT_LIST_HEAD(&pring->iocb_continue_saveq);
dea3101e 10754 INIT_LIST_HEAD(&pring->postbufq);
895427bd
JS
10755 pring->flag = 0;
10756 INIT_LIST_HEAD(&pring->txq);
10757 INIT_LIST_HEAD(&pring->txcmplq);
7e56aa25 10758 spin_lock_init(&pring->ring_lock);
dea3101e 10759 }
2e0fef85 10760 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
10761}
10762
04c68496
JS
10763/**
10764 * lpfc_sli_mbox_sys_flush - Flush mailbox command sub-system
10765 * @phba: Pointer to HBA context object.
10766 *
10767 * This routine flushes the mailbox command subsystem. It will unconditionally
10768 * flush all the mailbox commands in the three possible stages in the mailbox
10769 * command sub-system: pending mailbox command queue; the outstanding mailbox
10770 * command; and completed mailbox command queue. It is caller's responsibility
10771 * to make sure that the driver is in the proper state to flush the mailbox
10772 * command sub-system. Namely, the posting of mailbox commands into the
10773 * pending mailbox command queue from the various clients must be stopped;
10774 * either the HBA is in a state that it will never works on the outstanding
10775 * mailbox command (such as in EEH or ERATT conditions) or the outstanding
10776 * mailbox command has been completed.
10777 **/
10778static void
10779lpfc_sli_mbox_sys_flush(struct lpfc_hba *phba)
10780{
10781 LIST_HEAD(completions);
10782 struct lpfc_sli *psli = &phba->sli;
10783 LPFC_MBOXQ_t *pmb;
10784 unsigned long iflag;
10785
523128e5
JS
10786 /* Disable softirqs, including timers from obtaining phba->hbalock */
10787 local_bh_disable();
10788
04c68496
JS
10789 /* Flush all the mailbox commands in the mbox system */
10790 spin_lock_irqsave(&phba->hbalock, iflag);
523128e5 10791
04c68496
JS
10792 /* The pending mailbox command queue */
10793 list_splice_init(&phba->sli.mboxq, &completions);
10794 /* The outstanding active mailbox command */
10795 if (psli->mbox_active) {
10796 list_add_tail(&psli->mbox_active->list, &completions);
10797 psli->mbox_active = NULL;
10798 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10799 }
10800 /* The completed mailbox command queue */
10801 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
10802 spin_unlock_irqrestore(&phba->hbalock, iflag);
10803
523128e5
JS
10804 /* Enable softirqs again, done with phba->hbalock */
10805 local_bh_enable();
10806
04c68496
JS
10807 /* Return all flushed mailbox commands with MBX_NOT_FINISHED status */
10808 while (!list_empty(&completions)) {
10809 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
10810 pmb->u.mb.mbxStatus = MBX_NOT_FINISHED;
10811 if (pmb->mbox_cmpl)
10812 pmb->mbox_cmpl(phba, pmb);
10813 }
10814}
10815
e59058c4 10816/**
3621a710 10817 * lpfc_sli_host_down - Vport cleanup function
e59058c4
JS
10818 * @vport: Pointer to virtual port object.
10819 *
10820 * lpfc_sli_host_down is called to clean up the resources
10821 * associated with a vport before destroying virtual
10822 * port data structures.
10823 * This function does following operations:
10824 * - Free discovery resources associated with this virtual
10825 * port.
10826 * - Free iocbs associated with this virtual port in
10827 * the txq.
10828 * - Send abort for all iocb commands associated with this
10829 * vport in txcmplq.
10830 *
10831 * This function is called with no lock held and always returns 1.
10832 **/
92d7f7b0
JS
10833int
10834lpfc_sli_host_down(struct lpfc_vport *vport)
10835{
858c9f6c 10836 LIST_HEAD(completions);
92d7f7b0
JS
10837 struct lpfc_hba *phba = vport->phba;
10838 struct lpfc_sli *psli = &phba->sli;
895427bd 10839 struct lpfc_queue *qp = NULL;
92d7f7b0
JS
10840 struct lpfc_sli_ring *pring;
10841 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS
10842 int i;
10843 unsigned long flags = 0;
10844 uint16_t prev_pring_flag;
10845
10846 lpfc_cleanup_discovery_resources(vport);
10847
10848 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0 10849
895427bd
JS
10850 /*
10851 * Error everything on the txq since these iocbs
10852 * have not been given to the FW yet.
10853 * Also issue ABTS for everything on the txcmplq
10854 */
10855 if (phba->sli_rev != LPFC_SLI_REV4) {
10856 for (i = 0; i < psli->num_rings; i++) {
10857 pring = &psli->sli3_ring[i];
10858 prev_pring_flag = pring->flag;
10859 /* Only slow rings */
10860 if (pring->ringno == LPFC_ELS_RING) {
10861 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10862 /* Set the lpfc data pending flag */
10863 set_bit(LPFC_DATA_READY, &phba->data_flags);
10864 }
10865 list_for_each_entry_safe(iocb, next_iocb,
10866 &pring->txq, list) {
10867 if (iocb->vport != vport)
10868 continue;
10869 list_move_tail(&iocb->list, &completions);
10870 }
10871 list_for_each_entry_safe(iocb, next_iocb,
10872 &pring->txcmplq, list) {
10873 if (iocb->vport != vport)
10874 continue;
10875 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10876 }
10877 pring->flag = prev_pring_flag;
10878 }
10879 } else {
10880 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10881 pring = qp->pring;
10882 if (!pring)
92d7f7b0 10883 continue;
895427bd
JS
10884 if (pring == phba->sli4_hba.els_wq->pring) {
10885 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10886 /* Set the lpfc data pending flag */
10887 set_bit(LPFC_DATA_READY, &phba->data_flags);
10888 }
10889 prev_pring_flag = pring->flag;
65a3df63 10890 spin_lock(&pring->ring_lock);
895427bd
JS
10891 list_for_each_entry_safe(iocb, next_iocb,
10892 &pring->txq, list) {
10893 if (iocb->vport != vport)
10894 continue;
10895 list_move_tail(&iocb->list, &completions);
10896 }
65a3df63 10897 spin_unlock(&pring->ring_lock);
895427bd
JS
10898 list_for_each_entry_safe(iocb, next_iocb,
10899 &pring->txcmplq, list) {
10900 if (iocb->vport != vport)
10901 continue;
10902 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10903 }
10904 pring->flag = prev_pring_flag;
92d7f7b0 10905 }
92d7f7b0 10906 }
92d7f7b0
JS
10907 spin_unlock_irqrestore(&phba->hbalock, flags);
10908
a257bf90
JS
10909 /* Cancel all the IOCBs from the completions list */
10910 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10911 IOERR_SLI_DOWN);
92d7f7b0
JS
10912 return 1;
10913}
10914
e59058c4 10915/**
3621a710 10916 * lpfc_sli_hba_down - Resource cleanup function for the HBA
e59058c4
JS
10917 * @phba: Pointer to HBA context object.
10918 *
10919 * This function cleans up all iocb, buffers, mailbox commands
10920 * while shutting down the HBA. This function is called with no
10921 * lock held and always returns 1.
10922 * This function does the following to cleanup driver resources:
10923 * - Free discovery resources for each virtual port
10924 * - Cleanup any pending fabric iocbs
10925 * - Iterate through the iocb txq and free each entry
10926 * in the list.
10927 * - Free up any buffer posted to the HBA
10928 * - Free mailbox commands in the mailbox queue.
10929 **/
dea3101e 10930int
2e0fef85 10931lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 10932{
2534ba75 10933 LIST_HEAD(completions);
2e0fef85 10934 struct lpfc_sli *psli = &phba->sli;
895427bd 10935 struct lpfc_queue *qp = NULL;
dea3101e 10936 struct lpfc_sli_ring *pring;
0ff10d46 10937 struct lpfc_dmabuf *buf_ptr;
dea3101e 10938 unsigned long flags = 0;
04c68496
JS
10939 int i;
10940
10941 /* Shutdown the mailbox command sub-system */
618a5230 10942 lpfc_sli_mbox_sys_shutdown(phba, LPFC_MBX_WAIT);
dea3101e 10943
dea3101e
JB
10944 lpfc_hba_down_prep(phba);
10945
523128e5
JS
10946 /* Disable softirqs, including timers from obtaining phba->hbalock */
10947 local_bh_disable();
10948
92d7f7b0
JS
10949 lpfc_fabric_abort_hba(phba);
10950
2e0fef85 10951 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e 10952
895427bd
JS
10953 /*
10954 * Error everything on the txq since these iocbs
10955 * have not been given to the FW yet.
10956 */
10957 if (phba->sli_rev != LPFC_SLI_REV4) {
10958 for (i = 0; i < psli->num_rings; i++) {
10959 pring = &psli->sli3_ring[i];
10960 /* Only slow rings */
10961 if (pring->ringno == LPFC_ELS_RING) {
10962 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10963 /* Set the lpfc data pending flag */
10964 set_bit(LPFC_DATA_READY, &phba->data_flags);
10965 }
10966 list_splice_init(&pring->txq, &completions);
10967 }
10968 } else {
10969 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10970 pring = qp->pring;
10971 if (!pring)
10972 continue;
4b0a42be 10973 spin_lock(&pring->ring_lock);
895427bd 10974 list_splice_init(&pring->txq, &completions);
4b0a42be 10975 spin_unlock(&pring->ring_lock);
895427bd
JS
10976 if (pring == phba->sli4_hba.els_wq->pring) {
10977 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10978 /* Set the lpfc data pending flag */
10979 set_bit(LPFC_DATA_READY, &phba->data_flags);
10980 }
10981 }
2534ba75 10982 }
2e0fef85 10983 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 10984
a257bf90
JS
10985 /* Cancel all the IOCBs from the completions list */
10986 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10987 IOERR_SLI_DOWN);
dea3101e 10988
0ff10d46
JS
10989 spin_lock_irqsave(&phba->hbalock, flags);
10990 list_splice_init(&phba->elsbuf, &completions);
10991 phba->elsbuf_cnt = 0;
10992 phba->elsbuf_prev_cnt = 0;
10993 spin_unlock_irqrestore(&phba->hbalock, flags);
10994
10995 while (!list_empty(&completions)) {
10996 list_remove_head(&completions, buf_ptr,
10997 struct lpfc_dmabuf, list);
10998 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
10999 kfree(buf_ptr);
11000 }
11001
523128e5
JS
11002 /* Enable softirqs again, done with phba->hbalock */
11003 local_bh_enable();
11004
dea3101e
JB
11005 /* Return any active mbox cmds */
11006 del_timer_sync(&psli->mbox_tmo);
2e0fef85 11007
da0436e9 11008 spin_lock_irqsave(&phba->pport->work_port_lock, flags);
2e0fef85 11009 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
da0436e9 11010 spin_unlock_irqrestore(&phba->pport->work_port_lock, flags);
2e0fef85 11011
da0436e9
JS
11012 return 1;
11013}
11014
e59058c4 11015/**
3621a710 11016 * lpfc_sli_pcimem_bcopy - SLI memory copy function
e59058c4
JS
11017 * @srcp: Source memory pointer.
11018 * @destp: Destination memory pointer.
11019 * @cnt: Number of words required to be copied.
11020 *
11021 * This function is used for copying data between driver memory
11022 * and the SLI memory. This function also changes the endianness
11023 * of each word if native endianness is different from SLI
11024 * endianness. This function can be called with or without
11025 * lock.
11026 **/
dea3101e
JB
11027void
11028lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
11029{
11030 uint32_t *src = srcp;
11031 uint32_t *dest = destp;
11032 uint32_t ldata;
11033 int i;
11034
11035 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
11036 ldata = *src;
11037 ldata = le32_to_cpu(ldata);
11038 *dest = ldata;
11039 src++;
11040 dest++;
11041 }
11042}
11043
e59058c4 11044
a0c87cbd
JS
11045/**
11046 * lpfc_sli_bemem_bcopy - SLI memory copy function
11047 * @srcp: Source memory pointer.
11048 * @destp: Destination memory pointer.
11049 * @cnt: Number of words required to be copied.
11050 *
11051 * This function is used for copying data between a data structure
11052 * with big endian representation to local endianness.
11053 * This function can be called with or without lock.
11054 **/
11055void
11056lpfc_sli_bemem_bcopy(void *srcp, void *destp, uint32_t cnt)
11057{
11058 uint32_t *src = srcp;
11059 uint32_t *dest = destp;
11060 uint32_t ldata;
11061 int i;
11062
11063 for (i = 0; i < (int)cnt; i += sizeof(uint32_t)) {
11064 ldata = *src;
11065 ldata = be32_to_cpu(ldata);
11066 *dest = ldata;
11067 src++;
11068 dest++;
11069 }
11070}
11071
e59058c4 11072/**
3621a710 11073 * lpfc_sli_ringpostbuf_put - Function to add a buffer to postbufq
e59058c4
JS
11074 * @phba: Pointer to HBA context object.
11075 * @pring: Pointer to driver SLI ring object.
11076 * @mp: Pointer to driver buffer object.
11077 *
11078 * This function is called with no lock held.
11079 * It always return zero after adding the buffer to the postbufq
11080 * buffer list.
11081 **/
dea3101e 11082int
2e0fef85
JS
11083lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11084 struct lpfc_dmabuf *mp)
dea3101e
JB
11085{
11086 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
11087 later */
2e0fef85 11088 spin_lock_irq(&phba->hbalock);
dea3101e 11089 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 11090 pring->postbufq_cnt++;
2e0fef85 11091 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
11092 return 0;
11093}
11094
e59058c4 11095/**
3621a710 11096 * lpfc_sli_get_buffer_tag - allocates a tag for a CMD_QUE_XRI64_CX buffer
e59058c4
JS
11097 * @phba: Pointer to HBA context object.
11098 *
11099 * When HBQ is enabled, buffers are searched based on tags. This function
11100 * allocates a tag for buffer posted using CMD_QUE_XRI64_CX iocb. The
11101 * tag is bit wise or-ed with QUE_BUFTAG_BIT to make sure that the tag
11102 * does not conflict with tags of buffer posted for unsolicited events.
11103 * The function returns the allocated tag. The function is called with
11104 * no locks held.
11105 **/
76bb24ef
JS
11106uint32_t
11107lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
11108{
11109 spin_lock_irq(&phba->hbalock);
11110 phba->buffer_tag_count++;
11111 /*
11112 * Always set the QUE_BUFTAG_BIT to distiguish between
11113 * a tag assigned by HBQ.
11114 */
11115 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
11116 spin_unlock_irq(&phba->hbalock);
11117 return phba->buffer_tag_count;
11118}
11119
e59058c4 11120/**
3621a710 11121 * lpfc_sli_ring_taggedbuf_get - find HBQ buffer associated with given tag
e59058c4
JS
11122 * @phba: Pointer to HBA context object.
11123 * @pring: Pointer to driver SLI ring object.
11124 * @tag: Buffer tag.
11125 *
11126 * Buffers posted using CMD_QUE_XRI64_CX iocb are in pring->postbufq
11127 * list. After HBA DMA data to these buffers, CMD_IOCB_RET_XRI64_CX
11128 * iocb is posted to the response ring with the tag of the buffer.
11129 * This function searches the pring->postbufq list using the tag
11130 * to find buffer associated with CMD_IOCB_RET_XRI64_CX
11131 * iocb. If the buffer is found then lpfc_dmabuf object of the
11132 * buffer is returned to the caller else NULL is returned.
11133 * This function is called with no lock held.
11134 **/
76bb24ef
JS
11135struct lpfc_dmabuf *
11136lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11137 uint32_t tag)
11138{
11139 struct lpfc_dmabuf *mp, *next_mp;
11140 struct list_head *slp = &pring->postbufq;
11141
25985edc 11142 /* Search postbufq, from the beginning, looking for a match on tag */
76bb24ef
JS
11143 spin_lock_irq(&phba->hbalock);
11144 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
11145 if (mp->buffer_tag == tag) {
11146 list_del_init(&mp->list);
11147 pring->postbufq_cnt--;
11148 spin_unlock_irq(&phba->hbalock);
11149 return mp;
11150 }
11151 }
11152
11153 spin_unlock_irq(&phba->hbalock);
11154 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 11155 "0402 Cannot find virtual addr for buffer tag on "
32350664 11156 "ring %d Data x%lx x%px x%px x%x\n",
76bb24ef
JS
11157 pring->ringno, (unsigned long) tag,
11158 slp->next, slp->prev, pring->postbufq_cnt);
11159
11160 return NULL;
11161}
dea3101e 11162
e59058c4 11163/**
3621a710 11164 * lpfc_sli_ringpostbuf_get - search buffers for unsolicited CT and ELS events
e59058c4
JS
11165 * @phba: Pointer to HBA context object.
11166 * @pring: Pointer to driver SLI ring object.
11167 * @phys: DMA address of the buffer.
11168 *
11169 * This function searches the buffer list using the dma_address
11170 * of unsolicited event to find the driver's lpfc_dmabuf object
11171 * corresponding to the dma_address. The function returns the
11172 * lpfc_dmabuf object if a buffer is found else it returns NULL.
11173 * This function is called by the ct and els unsolicited event
11174 * handlers to get the buffer associated with the unsolicited
11175 * event.
11176 *
11177 * This function is called with no lock held.
11178 **/
dea3101e
JB
11179struct lpfc_dmabuf *
11180lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11181 dma_addr_t phys)
11182{
11183 struct lpfc_dmabuf *mp, *next_mp;
11184 struct list_head *slp = &pring->postbufq;
11185
25985edc 11186 /* Search postbufq, from the beginning, looking for a match on phys */
2e0fef85 11187 spin_lock_irq(&phba->hbalock);
dea3101e
JB
11188 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
11189 if (mp->phys == phys) {
11190 list_del_init(&mp->list);
11191 pring->postbufq_cnt--;
2e0fef85 11192 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
11193 return mp;
11194 }
11195 }
11196
2e0fef85 11197 spin_unlock_irq(&phba->hbalock);
dea3101e 11198 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 11199 "0410 Cannot find virtual addr for mapped buf on "
32350664 11200 "ring %d Data x%llx x%px x%px x%x\n",
e8b62011 11201 pring->ringno, (unsigned long long)phys,
dea3101e
JB
11202 slp->next, slp->prev, pring->postbufq_cnt);
11203 return NULL;
11204}
11205
e59058c4 11206/**
3621a710 11207 * lpfc_sli_abort_els_cmpl - Completion handler for the els abort iocbs
e59058c4
JS
11208 * @phba: Pointer to HBA context object.
11209 * @cmdiocb: Pointer to driver command iocb object.
11210 * @rspiocb: Pointer to driver response iocb object.
11211 *
11212 * This function is the completion handler for the abort iocbs for
11213 * ELS commands. This function is called from the ELS ring event
11214 * handler with no lock held. This function frees memory resources
11215 * associated with the abort iocb.
11216 **/
dea3101e 11217static void
2e0fef85
JS
11218lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11219 struct lpfc_iocbq *rspiocb)
dea3101e 11220{
2e0fef85 11221 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 11222 uint16_t abort_iotag, abort_context;
ff78d8f9 11223 struct lpfc_iocbq *abort_iocb = NULL;
2680eeaa
JS
11224
11225 if (irsp->ulpStatus) {
ff78d8f9
JS
11226
11227 /*
11228 * Assume that the port already completed and returned, or
11229 * will return the iocb. Just Log the message.
11230 */
2680eeaa
JS
11231 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
11232 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
11233
2e0fef85 11234 spin_lock_irq(&phba->hbalock);
45ed1190 11235 if (phba->sli_rev < LPFC_SLI_REV4) {
faa832e9
JS
11236 if (irsp->ulpCommand == CMD_ABORT_XRI_CX &&
11237 irsp->ulpStatus == IOSTAT_LOCAL_REJECT &&
11238 irsp->un.ulpWord[4] == IOERR_ABORT_REQUESTED) {
11239 spin_unlock_irq(&phba->hbalock);
11240 goto release_iocb;
11241 }
45ed1190
JS
11242 if (abort_iotag != 0 &&
11243 abort_iotag <= phba->sli.last_iotag)
11244 abort_iocb =
11245 phba->sli.iocbq_lookup[abort_iotag];
11246 } else
11247 /* For sli4 the abort_tag is the XRI,
11248 * so the abort routine puts the iotag of the iocb
11249 * being aborted in the context field of the abort
11250 * IOCB.
11251 */
11252 abort_iocb = phba->sli.iocbq_lookup[abort_context];
2680eeaa 11253
2a9bf3d0 11254 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS | LOG_SLI,
32350664 11255 "0327 Cannot abort els iocb x%px "
2a9bf3d0
JS
11256 "with tag %x context %x, abort status %x, "
11257 "abort code %x\n",
11258 abort_iocb, abort_iotag, abort_context,
11259 irsp->ulpStatus, irsp->un.ulpWord[4]);
341af102 11260
ff78d8f9 11261 spin_unlock_irq(&phba->hbalock);
2680eeaa 11262 }
faa832e9 11263release_iocb:
604a3e30 11264 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e
JB
11265 return;
11266}
11267
e59058c4 11268/**
3621a710 11269 * lpfc_ignore_els_cmpl - Completion handler for aborted ELS command
e59058c4
JS
11270 * @phba: Pointer to HBA context object.
11271 * @cmdiocb: Pointer to driver command iocb object.
11272 * @rspiocb: Pointer to driver response iocb object.
11273 *
11274 * The function is called from SLI ring event handler with no
11275 * lock held. This function is the completion handler for ELS commands
11276 * which are aborted. The function frees memory resources used for
11277 * the aborted ELS commands.
11278 **/
92d7f7b0
JS
11279static void
11280lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11281 struct lpfc_iocbq *rspiocb)
11282{
11283 IOCB_t *irsp = &rspiocb->iocb;
11284
11285 /* ELS cmd tag <ulpIoTag> completes */
11286 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
d7c255b2 11287 "0139 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 11288 "x%x x%x x%x\n",
e8b62011 11289 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 11290 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS
11291 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
11292 lpfc_ct_free_iocb(phba, cmdiocb);
11293 else
11294 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS
11295 return;
11296}
11297
e59058c4 11298/**
5af5eee7 11299 * lpfc_sli_abort_iotag_issue - Issue abort for a command iocb
e59058c4
JS
11300 * @phba: Pointer to HBA context object.
11301 * @pring: Pointer to driver SLI ring object.
11302 * @cmdiocb: Pointer to driver command iocb object.
11303 *
5af5eee7
JS
11304 * This function issues an abort iocb for the provided command iocb down to
11305 * the port. Other than the case the outstanding command iocb is an abort
11306 * request, this function issues abort out unconditionally. This function is
11307 * called with hbalock held. The function returns 0 when it fails due to
11308 * memory allocation failure or when the command iocb is an abort request.
88acb4d9 11309 * The hbalock is asserted held in the code path calling this routine.
e59058c4 11310 **/
5af5eee7
JS
11311static int
11312lpfc_sli_abort_iotag_issue(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 11313 struct lpfc_iocbq *cmdiocb)
dea3101e 11314{
2e0fef85 11315 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 11316 struct lpfc_iocbq *abtsiocbp;
dea3101e
JB
11317 IOCB_t *icmd = NULL;
11318 IOCB_t *iabt = NULL;
5af5eee7 11319 int retval;
7e56aa25 11320 unsigned long iflags;
faa832e9 11321 struct lpfc_nodelist *ndlp;
07951076 11322
92d7f7b0
JS
11323 /*
11324 * There are certain command types we don't want to abort. And we
11325 * don't want to abort commands that are already in the process of
11326 * being aborted.
07951076
JS
11327 */
11328 icmd = &cmdiocb->iocb;
2e0fef85 11329 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS
11330 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11331 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS
11332 return 0;
11333
dea3101e 11334 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 11335 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e
JB
11336 if (abtsiocbp == NULL)
11337 return 0;
dea3101e 11338
07951076 11339 /* This signals the response to set the correct status
341af102 11340 * before calling the completion handler
07951076
JS
11341 */
11342 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
11343
dea3101e 11344 iabt = &abtsiocbp->iocb;
07951076
JS
11345 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
11346 iabt->un.acxri.abortContextTag = icmd->ulpContext;
45ed1190 11347 if (phba->sli_rev == LPFC_SLI_REV4) {
da0436e9 11348 iabt->un.acxri.abortIoTag = cmdiocb->sli4_xritag;
45ed1190 11349 iabt->un.acxri.abortContextTag = cmdiocb->iotag;
faa832e9 11350 } else {
da0436e9 11351 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
faa832e9
JS
11352 if (pring->ringno == LPFC_ELS_RING) {
11353 ndlp = (struct lpfc_nodelist *)(cmdiocb->context1);
11354 iabt->un.acxri.abortContextTag = ndlp->nlp_rpi;
11355 }
11356 }
07951076
JS
11357 iabt->ulpLe = 1;
11358 iabt->ulpClass = icmd->ulpClass;
dea3101e 11359
5ffc266e 11360 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11361 abtsiocbp->hba_wqidx = cmdiocb->hba_wqidx;
341af102
JS
11362 if (cmdiocb->iocb_flag & LPFC_IO_FCP)
11363 abtsiocbp->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11364 if (cmdiocb->iocb_flag & LPFC_IO_FOF)
11365 abtsiocbp->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11366
2e0fef85 11367 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS
11368 iabt->ulpCommand = CMD_ABORT_XRI_CN;
11369 else
11370 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 11371
07951076 11372 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
e6c6acc0 11373 abtsiocbp->vport = vport;
5b8bd0c9 11374
e8b62011
JS
11375 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
11376 "0339 Abort xri x%x, original iotag x%x, "
11377 "abort cmd iotag x%x\n",
2a9bf3d0 11378 iabt->un.acxri.abortIoTag,
e8b62011 11379 iabt->un.acxri.abortContextTag,
2a9bf3d0 11380 abtsiocbp->iotag);
7e56aa25
JS
11381
11382 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
11383 pring = lpfc_sli4_calc_ring(phba, abtsiocbp);
11384 if (unlikely(pring == NULL))
9bd2bff5 11385 return 0;
7e56aa25
JS
11386 /* Note: both hbalock and ring_lock need to be set here */
11387 spin_lock_irqsave(&pring->ring_lock, iflags);
11388 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11389 abtsiocbp, 0);
11390 spin_unlock_irqrestore(&pring->ring_lock, iflags);
11391 } else {
11392 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11393 abtsiocbp, 0);
11394 }
dea3101e 11395
d7c255b2
JS
11396 if (retval)
11397 __lpfc_sli_release_iocbq(phba, abtsiocbp);
5af5eee7
JS
11398
11399 /*
11400 * Caller to this routine should check for IOCB_ERROR
11401 * and handle it properly. This routine no longer removes
11402 * iocb off txcmplq and call compl in case of IOCB_ERROR.
11403 */
11404 return retval;
11405}
11406
11407/**
11408 * lpfc_sli_issue_abort_iotag - Abort function for a command iocb
11409 * @phba: Pointer to HBA context object.
11410 * @pring: Pointer to driver SLI ring object.
11411 * @cmdiocb: Pointer to driver command iocb object.
11412 *
11413 * This function issues an abort iocb for the provided command iocb. In case
11414 * of unloading, the abort iocb will not be issued to commands on the ELS
11415 * ring. Instead, the callback function shall be changed to those commands
11416 * so that nothing happens when them finishes. This function is called with
11417 * hbalock held. The function returns 0 when the command iocb is an abort
11418 * request.
11419 **/
11420int
11421lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11422 struct lpfc_iocbq *cmdiocb)
11423{
11424 struct lpfc_vport *vport = cmdiocb->vport;
11425 int retval = IOCB_ERROR;
11426 IOCB_t *icmd = NULL;
11427
1c2ba475
JT
11428 lockdep_assert_held(&phba->hbalock);
11429
5af5eee7
JS
11430 /*
11431 * There are certain command types we don't want to abort. And we
11432 * don't want to abort commands that are already in the process of
11433 * being aborted.
11434 */
11435 icmd = &cmdiocb->iocb;
11436 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
11437 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11438 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
11439 return 0;
11440
1234a6d5
DK
11441 if (!pring) {
11442 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11443 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11444 else
11445 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11446 goto abort_iotag_exit;
11447 }
11448
5af5eee7
JS
11449 /*
11450 * If we're unloading, don't abort iocb on the ELS ring, but change
11451 * the callback so that nothing happens when it finishes.
11452 */
11453 if ((vport->load_flag & FC_UNLOADING) &&
11454 (pring->ringno == LPFC_ELS_RING)) {
11455 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11456 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11457 else
11458 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11459 goto abort_iotag_exit;
11460 }
11461
11462 /* Now, we try to issue the abort to the cmdiocb out */
11463 retval = lpfc_sli_abort_iotag_issue(phba, pring, cmdiocb);
11464
07951076 11465abort_iotag_exit:
2e0fef85
JS
11466 /*
11467 * Caller to this routine should check for IOCB_ERROR
11468 * and handle it properly. This routine no longer removes
11469 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 11470 */
2e0fef85 11471 return retval;
dea3101e
JB
11472}
11473
5af5eee7
JS
11474/**
11475 * lpfc_sli_hba_iocb_abort - Abort all iocbs to an hba.
11476 * @phba: pointer to lpfc HBA data structure.
11477 *
11478 * This routine will abort all pending and outstanding iocbs to an HBA.
11479 **/
11480void
11481lpfc_sli_hba_iocb_abort(struct lpfc_hba *phba)
11482{
11483 struct lpfc_sli *psli = &phba->sli;
11484 struct lpfc_sli_ring *pring;
895427bd 11485 struct lpfc_queue *qp = NULL;
5af5eee7
JS
11486 int i;
11487
895427bd
JS
11488 if (phba->sli_rev != LPFC_SLI_REV4) {
11489 for (i = 0; i < psli->num_rings; i++) {
11490 pring = &psli->sli3_ring[i];
11491 lpfc_sli_abort_iocb_ring(phba, pring);
11492 }
11493 return;
11494 }
11495 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
11496 pring = qp->pring;
11497 if (!pring)
11498 continue;
db55fba8 11499 lpfc_sli_abort_iocb_ring(phba, pring);
5af5eee7
JS
11500 }
11501}
11502
e59058c4 11503/**
3621a710 11504 * lpfc_sli_validate_fcp_iocb - find commands associated with a vport or LUN
e59058c4
JS
11505 * @iocbq: Pointer to driver iocb object.
11506 * @vport: Pointer to driver virtual port object.
11507 * @tgt_id: SCSI ID of the target.
11508 * @lun_id: LUN ID of the scsi device.
11509 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST
11510 *
3621a710 11511 * This function acts as an iocb filter for functions which abort or count
e59058c4
JS
11512 * all FCP iocbs pending on a lun/SCSI target/SCSI host. It will return
11513 * 0 if the filtering criteria is met for the given iocb and will return
11514 * 1 if the filtering criteria is not met.
11515 * If ctx_cmd == LPFC_CTX_LUN, the function returns 0 only if the
11516 * given iocb is for the SCSI device specified by vport, tgt_id and
11517 * lun_id parameter.
11518 * If ctx_cmd == LPFC_CTX_TGT, the function returns 0 only if the
11519 * given iocb is for the SCSI target specified by vport and tgt_id
11520 * parameters.
11521 * If ctx_cmd == LPFC_CTX_HOST, the function returns 0 only if the
11522 * given iocb is for the SCSI host associated with the given vport.
11523 * This function is called with no locks held.
11524 **/
dea3101e 11525static int
51ef4c26
JS
11526lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
11527 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 11528 lpfc_ctx_cmd ctx_cmd)
dea3101e 11529{
c490850a 11530 struct lpfc_io_buf *lpfc_cmd;
dea3101e
JB
11531 int rc = 1;
11532
b0e83012 11533 if (iocbq->vport != vport)
0bd4ca25
JSEC
11534 return rc;
11535
b0e83012
JS
11536 if (!(iocbq->iocb_flag & LPFC_IO_FCP) ||
11537 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ))
51ef4c26
JS
11538 return rc;
11539
c490850a 11540 lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq);
0bd4ca25 11541
495a714c 11542 if (lpfc_cmd->pCmd == NULL)
dea3101e
JB
11543 return rc;
11544
11545 switch (ctx_cmd) {
11546 case LPFC_CTX_LUN:
b0e83012 11547 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c
JS
11548 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id) &&
11549 (scsilun_to_int(&lpfc_cmd->fcp_cmnd->fcp_lun) == lun_id))
dea3101e
JB
11550 rc = 0;
11551 break;
11552 case LPFC_CTX_TGT:
b0e83012 11553 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c 11554 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id))
dea3101e
JB
11555 rc = 0;
11556 break;
dea3101e
JB
11557 case LPFC_CTX_HOST:
11558 rc = 0;
11559 break;
11560 default:
11561 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
cadbd4a5 11562 __func__, ctx_cmd);
dea3101e
JB
11563 break;
11564 }
11565
11566 return rc;
11567}
11568
e59058c4 11569/**
3621a710 11570 * lpfc_sli_sum_iocb - Function to count the number of FCP iocbs pending
e59058c4
JS
11571 * @vport: Pointer to virtual port.
11572 * @tgt_id: SCSI ID of the target.
11573 * @lun_id: LUN ID of the scsi device.
11574 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11575 *
11576 * This function returns number of FCP commands pending for the vport.
11577 * When ctx_cmd == LPFC_CTX_LUN, the function returns number of FCP
11578 * commands pending on the vport associated with SCSI device specified
11579 * by tgt_id and lun_id parameters.
11580 * When ctx_cmd == LPFC_CTX_TGT, the function returns number of FCP
11581 * commands pending on the vport associated with SCSI target specified
11582 * by tgt_id parameter.
11583 * When ctx_cmd == LPFC_CTX_HOST, the function returns number of FCP
11584 * commands pending on the vport.
11585 * This function returns the number of iocbs which satisfy the filter.
11586 * This function is called without any lock held.
11587 **/
dea3101e 11588int
51ef4c26
JS
11589lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
11590 lpfc_ctx_cmd ctx_cmd)
dea3101e 11591{
51ef4c26 11592 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11593 struct lpfc_iocbq *iocbq;
11594 int sum, i;
dea3101e 11595
31979008 11596 spin_lock_irq(&phba->hbalock);
0bd4ca25
JSEC
11597 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
11598 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11599
51ef4c26
JS
11600 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
11601 ctx_cmd) == 0)
0bd4ca25 11602 sum++;
dea3101e 11603 }
31979008 11604 spin_unlock_irq(&phba->hbalock);
0bd4ca25 11605
dea3101e
JB
11606 return sum;
11607}
11608
e59058c4 11609/**
3621a710 11610 * lpfc_sli_abort_fcp_cmpl - Completion handler function for aborted FCP IOCBs
e59058c4
JS
11611 * @phba: Pointer to HBA context object
11612 * @cmdiocb: Pointer to command iocb object.
11613 * @rspiocb: Pointer to response iocb object.
11614 *
11615 * This function is called when an aborted FCP iocb completes. This
11616 * function is called by the ring event handler with no lock held.
11617 * This function frees the iocb.
11618 **/
5eb95af0 11619void
2e0fef85
JS
11620lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11621 struct lpfc_iocbq *rspiocb)
5eb95af0 11622{
cb69f7de 11623 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8e668af5 11624 "3096 ABORT_XRI_CN completing on rpi x%x "
cb69f7de
JS
11625 "original iotag x%x, abort cmd iotag x%x "
11626 "status 0x%x, reason 0x%x\n",
11627 cmdiocb->iocb.un.acxri.abortContextTag,
11628 cmdiocb->iocb.un.acxri.abortIoTag,
11629 cmdiocb->iotag, rspiocb->iocb.ulpStatus,
11630 rspiocb->iocb.un.ulpWord[4]);
604a3e30 11631 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC
11632 return;
11633}
11634
e59058c4 11635/**
3621a710 11636 * lpfc_sli_abort_iocb - issue abort for all commands on a host/target/LUN
e59058c4
JS
11637 * @vport: Pointer to virtual port.
11638 * @pring: Pointer to driver SLI ring object.
11639 * @tgt_id: SCSI ID of the target.
11640 * @lun_id: LUN ID of the scsi device.
11641 * @abort_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11642 *
11643 * This function sends an abort command for every SCSI command
11644 * associated with the given virtual port pending on the ring
11645 * filtered by lpfc_sli_validate_fcp_iocb function.
11646 * When abort_cmd == LPFC_CTX_LUN, the function sends abort only to the
11647 * FCP iocbs associated with lun specified by tgt_id and lun_id
11648 * parameters
11649 * When abort_cmd == LPFC_CTX_TGT, the function sends abort only to the
11650 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11651 * When abort_cmd == LPFC_CTX_HOST, the function sends abort to all
11652 * FCP iocbs associated with virtual port.
11653 * This function returns number of iocbs it failed to abort.
11654 * This function is called with no locks held.
11655 **/
dea3101e 11656int
51ef4c26
JS
11657lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11658 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 11659{
51ef4c26 11660 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11661 struct lpfc_iocbq *iocbq;
11662 struct lpfc_iocbq *abtsiocb;
ecbb227e 11663 struct lpfc_sli_ring *pring_s4;
dea3101e 11664 IOCB_t *cmd = NULL;
dea3101e 11665 int errcnt = 0, ret_val = 0;
0bd4ca25 11666 int i;
dea3101e 11667
b0e83012 11668 /* all I/Os are in process of being flushed */
c00f62e6 11669 if (phba->hba_flag & HBA_IOQ_FLUSH)
b0e83012
JS
11670 return errcnt;
11671
0bd4ca25
JSEC
11672 for (i = 1; i <= phba->sli.last_iotag; i++) {
11673 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11674
51ef4c26 11675 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 11676 abort_cmd) != 0)
dea3101e
JB
11677 continue;
11678
afbd8d88
JS
11679 /*
11680 * If the iocbq is already being aborted, don't take a second
11681 * action, but do count it.
11682 */
11683 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11684 continue;
11685
dea3101e 11686 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 11687 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
11688 if (abtsiocb == NULL) {
11689 errcnt++;
11690 continue;
11691 }
dea3101e 11692
afbd8d88
JS
11693 /* indicate the IO is being aborted by the driver. */
11694 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11695
0bd4ca25 11696 cmd = &iocbq->iocb;
dea3101e
JB
11697 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11698 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
da0436e9
JS
11699 if (phba->sli_rev == LPFC_SLI_REV4)
11700 abtsiocb->iocb.un.acxri.abortIoTag = iocbq->sli4_xritag;
11701 else
11702 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
dea3101e
JB
11703 abtsiocb->iocb.ulpLe = 1;
11704 abtsiocb->iocb.ulpClass = cmd->ulpClass;
afbd8d88 11705 abtsiocb->vport = vport;
dea3101e 11706
5ffc266e 11707 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11708 abtsiocb->hba_wqidx = iocbq->hba_wqidx;
341af102
JS
11709 if (iocbq->iocb_flag & LPFC_IO_FCP)
11710 abtsiocb->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11711 if (iocbq->iocb_flag & LPFC_IO_FOF)
11712 abtsiocb->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11713
2e0fef85 11714 if (lpfc_is_link_up(phba))
dea3101e
JB
11715 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11716 else
11717 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11718
5eb95af0
JSEC
11719 /* Setup callback routine and issue the command. */
11720 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
ecbb227e
JS
11721 if (phba->sli_rev == LPFC_SLI_REV4) {
11722 pring_s4 = lpfc_sli4_calc_ring(phba, iocbq);
11723 if (!pring_s4)
11724 continue;
11725 ret_val = lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11726 abtsiocb, 0);
11727 } else
11728 ret_val = lpfc_sli_issue_iocb(phba, pring->ringno,
11729 abtsiocb, 0);
dea3101e 11730 if (ret_val == IOCB_ERROR) {
604a3e30 11731 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e
JB
11732 errcnt++;
11733 continue;
11734 }
11735 }
11736
11737 return errcnt;
11738}
11739
98912dda
JS
11740/**
11741 * lpfc_sli_abort_taskmgmt - issue abort for all commands on a host/target/LUN
11742 * @vport: Pointer to virtual port.
11743 * @pring: Pointer to driver SLI ring object.
11744 * @tgt_id: SCSI ID of the target.
11745 * @lun_id: LUN ID of the scsi device.
11746 * @taskmgmt_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11747 *
11748 * This function sends an abort command for every SCSI command
11749 * associated with the given virtual port pending on the ring
11750 * filtered by lpfc_sli_validate_fcp_iocb function.
11751 * When taskmgmt_cmd == LPFC_CTX_LUN, the function sends abort only to the
11752 * FCP iocbs associated with lun specified by tgt_id and lun_id
11753 * parameters
11754 * When taskmgmt_cmd == LPFC_CTX_TGT, the function sends abort only to the
11755 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11756 * When taskmgmt_cmd == LPFC_CTX_HOST, the function sends abort to all
11757 * FCP iocbs associated with virtual port.
11758 * This function returns number of iocbs it aborted .
11759 * This function is called with no locks held right after a taskmgmt
11760 * command is sent.
11761 **/
11762int
11763lpfc_sli_abort_taskmgmt(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11764 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd cmd)
11765{
11766 struct lpfc_hba *phba = vport->phba;
c490850a 11767 struct lpfc_io_buf *lpfc_cmd;
98912dda 11768 struct lpfc_iocbq *abtsiocbq;
8c50d25c 11769 struct lpfc_nodelist *ndlp;
98912dda
JS
11770 struct lpfc_iocbq *iocbq;
11771 IOCB_t *icmd;
11772 int sum, i, ret_val;
11773 unsigned long iflags;
c2017260 11774 struct lpfc_sli_ring *pring_s4 = NULL;
98912dda 11775
59c68eaa 11776 spin_lock_irqsave(&phba->hbalock, iflags);
98912dda
JS
11777
11778 /* all I/Os are in process of being flushed */
c00f62e6 11779 if (phba->hba_flag & HBA_IOQ_FLUSH) {
59c68eaa 11780 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11781 return 0;
11782 }
11783 sum = 0;
11784
11785 for (i = 1; i <= phba->sli.last_iotag; i++) {
11786 iocbq = phba->sli.iocbq_lookup[i];
11787
11788 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
11789 cmd) != 0)
11790 continue;
11791
c2017260
JS
11792 /* Guard against IO completion being called at same time */
11793 lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq);
11794 spin_lock(&lpfc_cmd->buf_lock);
11795
11796 if (!lpfc_cmd->pCmd) {
11797 spin_unlock(&lpfc_cmd->buf_lock);
11798 continue;
11799 }
11800
11801 if (phba->sli_rev == LPFC_SLI_REV4) {
11802 pring_s4 =
c00f62e6 11803 phba->sli4_hba.hdwq[iocbq->hba_wqidx].io_wq->pring;
c2017260
JS
11804 if (!pring_s4) {
11805 spin_unlock(&lpfc_cmd->buf_lock);
11806 continue;
11807 }
11808 /* Note: both hbalock and ring_lock must be set here */
11809 spin_lock(&pring_s4->ring_lock);
11810 }
11811
98912dda
JS
11812 /*
11813 * If the iocbq is already being aborted, don't take a second
11814 * action, but do count it.
11815 */
c2017260
JS
11816 if ((iocbq->iocb_flag & LPFC_DRIVER_ABORTED) ||
11817 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ)) {
11818 if (phba->sli_rev == LPFC_SLI_REV4)
11819 spin_unlock(&pring_s4->ring_lock);
11820 spin_unlock(&lpfc_cmd->buf_lock);
98912dda 11821 continue;
c2017260 11822 }
98912dda
JS
11823
11824 /* issue ABTS for this IOCB based on iotag */
11825 abtsiocbq = __lpfc_sli_get_iocbq(phba);
c2017260
JS
11826 if (!abtsiocbq) {
11827 if (phba->sli_rev == LPFC_SLI_REV4)
11828 spin_unlock(&pring_s4->ring_lock);
11829 spin_unlock(&lpfc_cmd->buf_lock);
98912dda 11830 continue;
c2017260 11831 }
98912dda
JS
11832
11833 icmd = &iocbq->iocb;
11834 abtsiocbq->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11835 abtsiocbq->iocb.un.acxri.abortContextTag = icmd->ulpContext;
11836 if (phba->sli_rev == LPFC_SLI_REV4)
11837 abtsiocbq->iocb.un.acxri.abortIoTag =
11838 iocbq->sli4_xritag;
11839 else
11840 abtsiocbq->iocb.un.acxri.abortIoTag = icmd->ulpIoTag;
11841 abtsiocbq->iocb.ulpLe = 1;
11842 abtsiocbq->iocb.ulpClass = icmd->ulpClass;
11843 abtsiocbq->vport = vport;
11844
11845 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11846 abtsiocbq->hba_wqidx = iocbq->hba_wqidx;
98912dda
JS
11847 if (iocbq->iocb_flag & LPFC_IO_FCP)
11848 abtsiocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11849 if (iocbq->iocb_flag & LPFC_IO_FOF)
11850 abtsiocbq->iocb_flag |= LPFC_IO_FOF;
98912dda 11851
8c50d25c
JS
11852 ndlp = lpfc_cmd->rdata->pnode;
11853
11854 if (lpfc_is_link_up(phba) &&
11855 (ndlp && ndlp->nlp_state == NLP_STE_MAPPED_NODE))
98912dda
JS
11856 abtsiocbq->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11857 else
11858 abtsiocbq->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11859
11860 /* Setup callback routine and issue the command. */
11861 abtsiocbq->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
11862
11863 /*
11864 * Indicate the IO is being aborted by the driver and set
11865 * the caller's flag into the aborted IO.
11866 */
11867 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11868
11869 if (phba->sli_rev == LPFC_SLI_REV4) {
98912dda
JS
11870 ret_val = __lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11871 abtsiocbq, 0);
59c68eaa 11872 spin_unlock(&pring_s4->ring_lock);
98912dda
JS
11873 } else {
11874 ret_val = __lpfc_sli_issue_iocb(phba, pring->ringno,
11875 abtsiocbq, 0);
11876 }
11877
c2017260 11878 spin_unlock(&lpfc_cmd->buf_lock);
98912dda
JS
11879
11880 if (ret_val == IOCB_ERROR)
11881 __lpfc_sli_release_iocbq(phba, abtsiocbq);
11882 else
11883 sum++;
11884 }
59c68eaa 11885 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11886 return sum;
11887}
11888
e59058c4 11889/**
3621a710 11890 * lpfc_sli_wake_iocb_wait - lpfc_sli_issue_iocb_wait's completion handler
e59058c4
JS
11891 * @phba: Pointer to HBA context object.
11892 * @cmdiocbq: Pointer to command iocb.
11893 * @rspiocbq: Pointer to response iocb.
11894 *
11895 * This function is the completion handler for iocbs issued using
11896 * lpfc_sli_issue_iocb_wait function. This function is called by the
11897 * ring event handler function without any lock held. This function
11898 * can be called from both worker thread context and interrupt
11899 * context. This function also can be called from other thread which
11900 * cleans up the SLI layer objects.
11901 * This function copy the contents of the response iocb to the
11902 * response iocb memory object provided by the caller of
11903 * lpfc_sli_issue_iocb_wait and then wakes up the thread which
11904 * sleeps for the iocb completion.
11905 **/
68876920
JSEC
11906static void
11907lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
11908 struct lpfc_iocbq *cmdiocbq,
11909 struct lpfc_iocbq *rspiocbq)
dea3101e 11910{
68876920
JSEC
11911 wait_queue_head_t *pdone_q;
11912 unsigned long iflags;
c490850a 11913 struct lpfc_io_buf *lpfc_cmd;
dea3101e 11914
2e0fef85 11915 spin_lock_irqsave(&phba->hbalock, iflags);
5a0916b4
JS
11916 if (cmdiocbq->iocb_flag & LPFC_IO_WAKE_TMO) {
11917
11918 /*
11919 * A time out has occurred for the iocb. If a time out
11920 * completion handler has been supplied, call it. Otherwise,
11921 * just free the iocbq.
11922 */
11923
11924 spin_unlock_irqrestore(&phba->hbalock, iflags);
11925 cmdiocbq->iocb_cmpl = cmdiocbq->wait_iocb_cmpl;
11926 cmdiocbq->wait_iocb_cmpl = NULL;
11927 if (cmdiocbq->iocb_cmpl)
11928 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, NULL);
11929 else
11930 lpfc_sli_release_iocbq(phba, cmdiocbq);
11931 return;
11932 }
11933
68876920
JSEC
11934 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
11935 if (cmdiocbq->context2 && rspiocbq)
11936 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
11937 &rspiocbq->iocb, sizeof(IOCB_t));
11938
0f65ff68
JS
11939 /* Set the exchange busy flag for task management commands */
11940 if ((cmdiocbq->iocb_flag & LPFC_IO_FCP) &&
11941 !(cmdiocbq->iocb_flag & LPFC_IO_LIBDFC)) {
c490850a 11942 lpfc_cmd = container_of(cmdiocbq, struct lpfc_io_buf,
0f65ff68 11943 cur_iocbq);
324e1c40
JS
11944 if (rspiocbq && (rspiocbq->iocb_flag & LPFC_EXCHANGE_BUSY))
11945 lpfc_cmd->flags |= LPFC_SBUF_XBUSY;
11946 else
11947 lpfc_cmd->flags &= ~LPFC_SBUF_XBUSY;
0f65ff68
JS
11948 }
11949
68876920 11950 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC
11951 if (pdone_q)
11952 wake_up(pdone_q);
858c9f6c 11953 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e
JB
11954 return;
11955}
11956
d11e31dd
JS
11957/**
11958 * lpfc_chk_iocb_flg - Test IOCB flag with lock held.
11959 * @phba: Pointer to HBA context object..
11960 * @piocbq: Pointer to command iocb.
11961 * @flag: Flag to test.
11962 *
11963 * This routine grabs the hbalock and then test the iocb_flag to
11964 * see if the passed in flag is set.
11965 * Returns:
11966 * 1 if flag is set.
11967 * 0 if flag is not set.
11968 **/
11969static int
11970lpfc_chk_iocb_flg(struct lpfc_hba *phba,
11971 struct lpfc_iocbq *piocbq, uint32_t flag)
11972{
11973 unsigned long iflags;
11974 int ret;
11975
11976 spin_lock_irqsave(&phba->hbalock, iflags);
11977 ret = piocbq->iocb_flag & flag;
11978 spin_unlock_irqrestore(&phba->hbalock, iflags);
11979 return ret;
11980
11981}
11982
e59058c4 11983/**
3621a710 11984 * lpfc_sli_issue_iocb_wait - Synchronous function to issue iocb commands
e59058c4
JS
11985 * @phba: Pointer to HBA context object..
11986 * @pring: Pointer to sli ring.
11987 * @piocb: Pointer to command iocb.
11988 * @prspiocbq: Pointer to response iocb.
11989 * @timeout: Timeout in number of seconds.
11990 *
11991 * This function issues the iocb to firmware and waits for the
5a0916b4
JS
11992 * iocb to complete. The iocb_cmpl field of the shall be used
11993 * to handle iocbs which time out. If the field is NULL, the
11994 * function shall free the iocbq structure. If more clean up is
11995 * needed, the caller is expected to provide a completion function
11996 * that will provide the needed clean up. If the iocb command is
11997 * not completed within timeout seconds, the function will either
11998 * free the iocbq structure (if iocb_cmpl == NULL) or execute the
11999 * completion function set in the iocb_cmpl field and then return
12000 * a status of IOCB_TIMEDOUT. The caller should not free the iocb
12001 * resources if this function returns IOCB_TIMEDOUT.
e59058c4
JS
12002 * The function waits for the iocb completion using an
12003 * non-interruptible wait.
12004 * This function will sleep while waiting for iocb completion.
12005 * So, this function should not be called from any context which
12006 * does not allow sleeping. Due to the same reason, this function
12007 * cannot be called with interrupt disabled.
12008 * This function assumes that the iocb completions occur while
12009 * this function sleep. So, this function cannot be called from
12010 * the thread which process iocb completion for this ring.
12011 * This function clears the iocb_flag of the iocb object before
12012 * issuing the iocb and the iocb completion handler sets this
12013 * flag and wakes this thread when the iocb completes.
12014 * The contents of the response iocb will be copied to prspiocbq
12015 * by the completion handler when the command completes.
12016 * This function returns IOCB_SUCCESS when success.
12017 * This function is called with no lock held.
12018 **/
dea3101e 12019int
2e0fef85 12020lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
da0436e9 12021 uint32_t ring_number,
2e0fef85
JS
12022 struct lpfc_iocbq *piocb,
12023 struct lpfc_iocbq *prspiocbq,
68876920 12024 uint32_t timeout)
dea3101e 12025{
7259f0d0 12026 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC
12027 long timeleft, timeout_req = 0;
12028 int retval = IOCB_SUCCESS;
875fbdfe 12029 uint32_t creg_val;
0e9bb8d7
JS
12030 struct lpfc_iocbq *iocb;
12031 int txq_cnt = 0;
12032 int txcmplq_cnt = 0;
895427bd 12033 struct lpfc_sli_ring *pring;
5a0916b4
JS
12034 unsigned long iflags;
12035 bool iocb_completed = true;
12036
895427bd
JS
12037 if (phba->sli_rev >= LPFC_SLI_REV4)
12038 pring = lpfc_sli4_calc_ring(phba, piocb);
12039 else
12040 pring = &phba->sli.sli3_ring[ring_number];
dea3101e 12041 /*
68876920
JSEC
12042 * If the caller has provided a response iocbq buffer, then context2
12043 * is NULL or its an error.
dea3101e 12044 */
68876920
JSEC
12045 if (prspiocbq) {
12046 if (piocb->context2)
12047 return IOCB_ERROR;
12048 piocb->context2 = prspiocbq;
dea3101e
JB
12049 }
12050
5a0916b4 12051 piocb->wait_iocb_cmpl = piocb->iocb_cmpl;
68876920
JSEC
12052 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
12053 piocb->context_un.wait_queue = &done_q;
5a0916b4 12054 piocb->iocb_flag &= ~(LPFC_IO_WAKE | LPFC_IO_WAKE_TMO);
dea3101e 12055
875fbdfe 12056 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
12057 if (lpfc_readl(phba->HCregaddr, &creg_val))
12058 return IOCB_ERROR;
875fbdfe
JSEC
12059 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
12060 writel(creg_val, phba->HCregaddr);
12061 readl(phba->HCregaddr); /* flush */
12062 }
12063
2a9bf3d0
JS
12064 retval = lpfc_sli_issue_iocb(phba, ring_number, piocb,
12065 SLI_IOCB_RET_IOCB);
68876920 12066 if (retval == IOCB_SUCCESS) {
256ec0d0 12067 timeout_req = msecs_to_jiffies(timeout * 1000);
68876920 12068 timeleft = wait_event_timeout(done_q,
d11e31dd 12069 lpfc_chk_iocb_flg(phba, piocb, LPFC_IO_WAKE),
68876920 12070 timeout_req);
5a0916b4
JS
12071 spin_lock_irqsave(&phba->hbalock, iflags);
12072 if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
12073
12074 /*
12075 * IOCB timed out. Inform the wake iocb wait
12076 * completion function and set local status
12077 */
dea3101e 12078
5a0916b4
JS
12079 iocb_completed = false;
12080 piocb->iocb_flag |= LPFC_IO_WAKE_TMO;
12081 }
12082 spin_unlock_irqrestore(&phba->hbalock, iflags);
12083 if (iocb_completed) {
7054a606 12084 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 12085 "0331 IOCB wake signaled\n");
53151bbb
JS
12086 /* Note: we are not indicating if the IOCB has a success
12087 * status or not - that's for the caller to check.
12088 * IOCB_SUCCESS means just that the command was sent and
12089 * completed. Not that it completed successfully.
12090 * */
7054a606 12091 } else if (timeleft == 0) {
68876920 12092 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
12093 "0338 IOCB wait timeout error - no "
12094 "wake response Data x%x\n", timeout);
68876920 12095 retval = IOCB_TIMEDOUT;
7054a606 12096 } else {
68876920 12097 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
12098 "0330 IOCB wake NOT set, "
12099 "Data x%x x%lx\n",
68876920
JSEC
12100 timeout, (timeleft / jiffies));
12101 retval = IOCB_TIMEDOUT;
dea3101e 12102 }
2a9bf3d0 12103 } else if (retval == IOCB_BUSY) {
0e9bb8d7
JS
12104 if (phba->cfg_log_verbose & LOG_SLI) {
12105 list_for_each_entry(iocb, &pring->txq, list) {
12106 txq_cnt++;
12107 }
12108 list_for_each_entry(iocb, &pring->txcmplq, list) {
12109 txcmplq_cnt++;
12110 }
12111 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
12112 "2818 Max IOCBs %d txq cnt %d txcmplq cnt %d\n",
12113 phba->iocb_cnt, txq_cnt, txcmplq_cnt);
12114 }
2a9bf3d0 12115 return retval;
68876920
JSEC
12116 } else {
12117 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
d7c255b2 12118 "0332 IOCB wait issue failed, Data x%x\n",
e8b62011 12119 retval);
68876920 12120 retval = IOCB_ERROR;
dea3101e
JB
12121 }
12122
875fbdfe 12123 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
12124 if (lpfc_readl(phba->HCregaddr, &creg_val))
12125 return IOCB_ERROR;
875fbdfe
JSEC
12126 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
12127 writel(creg_val, phba->HCregaddr);
12128 readl(phba->HCregaddr); /* flush */
12129 }
12130
68876920
JSEC
12131 if (prspiocbq)
12132 piocb->context2 = NULL;
12133
12134 piocb->context_un.wait_queue = NULL;
12135 piocb->iocb_cmpl = NULL;
dea3101e
JB
12136 return retval;
12137}
68876920 12138
e59058c4 12139/**
3621a710 12140 * lpfc_sli_issue_mbox_wait - Synchronous function to issue mailbox
e59058c4
JS
12141 * @phba: Pointer to HBA context object.
12142 * @pmboxq: Pointer to driver mailbox object.
12143 * @timeout: Timeout in number of seconds.
12144 *
12145 * This function issues the mailbox to firmware and waits for the
12146 * mailbox command to complete. If the mailbox command is not
12147 * completed within timeout seconds, it returns MBX_TIMEOUT.
12148 * The function waits for the mailbox completion using an
12149 * interruptible wait. If the thread is woken up due to a
12150 * signal, MBX_TIMEOUT error is returned to the caller. Caller
12151 * should not free the mailbox resources, if this function returns
12152 * MBX_TIMEOUT.
12153 * This function will sleep while waiting for mailbox completion.
12154 * So, this function should not be called from any context which
12155 * does not allow sleeping. Due to the same reason, this function
12156 * cannot be called with interrupt disabled.
12157 * This function assumes that the mailbox completion occurs while
12158 * this function sleep. So, this function cannot be called from
12159 * the worker thread which processes mailbox completion.
12160 * This function is called in the context of HBA management
12161 * applications.
12162 * This function returns MBX_SUCCESS when successful.
12163 * This function is called with no lock held.
12164 **/
dea3101e 12165int
2e0fef85 12166lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e
JB
12167 uint32_t timeout)
12168{
e29d74f8 12169 struct completion mbox_done;
dea3101e 12170 int retval;
858c9f6c 12171 unsigned long flag;
dea3101e 12172
495a714c 12173 pmboxq->mbox_flag &= ~LPFC_MBX_WAKE;
dea3101e
JB
12174 /* setup wake call as IOCB callback */
12175 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
dea3101e 12176
e29d74f8
JS
12177 /* setup context3 field to pass wait_queue pointer to wake function */
12178 init_completion(&mbox_done);
12179 pmboxq->context3 = &mbox_done;
dea3101e
JB
12180 /* now issue the command */
12181 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
dea3101e 12182 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
e29d74f8
JS
12183 wait_for_completion_timeout(&mbox_done,
12184 msecs_to_jiffies(timeout * 1000));
7054a606 12185
858c9f6c 12186 spin_lock_irqsave(&phba->hbalock, flag);
e29d74f8 12187 pmboxq->context3 = NULL;
7054a606
JS
12188 /*
12189 * if LPFC_MBX_WAKE flag is set the mailbox is completed
12190 * else do not free the resources.
12191 */
d7c47992 12192 if (pmboxq->mbox_flag & LPFC_MBX_WAKE) {
dea3101e 12193 retval = MBX_SUCCESS;
d7c47992 12194 } else {
7054a606 12195 retval = MBX_TIMEOUT;
858c9f6c
JS
12196 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
12197 }
12198 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e 12199 }
dea3101e
JB
12200 return retval;
12201}
12202
e59058c4 12203/**
3772a991 12204 * lpfc_sli_mbox_sys_shutdown - shutdown mailbox command sub-system
e59058c4
JS
12205 * @phba: Pointer to HBA context.
12206 *
3772a991
JS
12207 * This function is called to shutdown the driver's mailbox sub-system.
12208 * It first marks the mailbox sub-system is in a block state to prevent
12209 * the asynchronous mailbox command from issued off the pending mailbox
12210 * command queue. If the mailbox command sub-system shutdown is due to
12211 * HBA error conditions such as EEH or ERATT, this routine shall invoke
12212 * the mailbox sub-system flush routine to forcefully bring down the
12213 * mailbox sub-system. Otherwise, if it is due to normal condition (such
12214 * as with offline or HBA function reset), this routine will wait for the
12215 * outstanding mailbox command to complete before invoking the mailbox
12216 * sub-system flush routine to gracefully bring down mailbox sub-system.
e59058c4 12217 **/
3772a991 12218void
618a5230 12219lpfc_sli_mbox_sys_shutdown(struct lpfc_hba *phba, int mbx_action)
b4c02652 12220{
3772a991 12221 struct lpfc_sli *psli = &phba->sli;
3772a991 12222 unsigned long timeout;
b4c02652 12223
618a5230
JS
12224 if (mbx_action == LPFC_MBX_NO_WAIT) {
12225 /* delay 100ms for port state */
12226 msleep(100);
12227 lpfc_sli_mbox_sys_flush(phba);
12228 return;
12229 }
a183a15f 12230 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
d7069f09 12231
523128e5
JS
12232 /* Disable softirqs, including timers from obtaining phba->hbalock */
12233 local_bh_disable();
12234
3772a991
JS
12235 spin_lock_irq(&phba->hbalock);
12236 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
b4c02652 12237
3772a991 12238 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
3772a991
JS
12239 /* Determine how long we might wait for the active mailbox
12240 * command to be gracefully completed by firmware.
12241 */
a183a15f
JS
12242 if (phba->sli.mbox_active)
12243 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
12244 phba->sli.mbox_active) *
12245 1000) + jiffies;
12246 spin_unlock_irq(&phba->hbalock);
12247
523128e5
JS
12248 /* Enable softirqs again, done with phba->hbalock */
12249 local_bh_enable();
12250
3772a991
JS
12251 while (phba->sli.mbox_active) {
12252 /* Check active mailbox complete status every 2ms */
12253 msleep(2);
12254 if (time_after(jiffies, timeout))
12255 /* Timeout, let the mailbox flush routine to
12256 * forcefully release active mailbox command
12257 */
12258 break;
12259 }
523128e5 12260 } else {
d7069f09
JS
12261 spin_unlock_irq(&phba->hbalock);
12262
523128e5
JS
12263 /* Enable softirqs again, done with phba->hbalock */
12264 local_bh_enable();
12265 }
12266
3772a991
JS
12267 lpfc_sli_mbox_sys_flush(phba);
12268}
ed957684 12269
3772a991
JS
12270/**
12271 * lpfc_sli_eratt_read - read sli-3 error attention events
12272 * @phba: Pointer to HBA context.
12273 *
12274 * This function is called to read the SLI3 device error attention registers
12275 * for possible error attention events. The caller must hold the hostlock
12276 * with spin_lock_irq().
12277 *
25985edc 12278 * This function returns 1 when there is Error Attention in the Host Attention
3772a991
JS
12279 * Register and returns 0 otherwise.
12280 **/
12281static int
12282lpfc_sli_eratt_read(struct lpfc_hba *phba)
12283{
12284 uint32_t ha_copy;
b4c02652 12285
3772a991 12286 /* Read chip Host Attention (HA) register */
9940b97b
JS
12287 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12288 goto unplug_err;
12289
3772a991
JS
12290 if (ha_copy & HA_ERATT) {
12291 /* Read host status register to retrieve error event */
9940b97b
JS
12292 if (lpfc_sli_read_hs(phba))
12293 goto unplug_err;
b4c02652 12294
3772a991
JS
12295 /* Check if there is a deferred error condition is active */
12296 if ((HS_FFER1 & phba->work_hs) &&
12297 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0 12298 HS_FFER6 | HS_FFER7 | HS_FFER8) & phba->work_hs)) {
3772a991 12299 phba->hba_flag |= DEFER_ERATT;
3772a991
JS
12300 /* Clear all interrupt enable conditions */
12301 writel(0, phba->HCregaddr);
12302 readl(phba->HCregaddr);
12303 }
12304
12305 /* Set the driver HA work bitmap */
3772a991
JS
12306 phba->work_ha |= HA_ERATT;
12307 /* Indicate polling handles this ERATT */
12308 phba->hba_flag |= HBA_ERATT_HANDLED;
3772a991
JS
12309 return 1;
12310 }
12311 return 0;
9940b97b
JS
12312
12313unplug_err:
12314 /* Set the driver HS work bitmap */
12315 phba->work_hs |= UNPLUG_ERR;
12316 /* Set the driver HA work bitmap */
12317 phba->work_ha |= HA_ERATT;
12318 /* Indicate polling handles this ERATT */
12319 phba->hba_flag |= HBA_ERATT_HANDLED;
12320 return 1;
b4c02652
JS
12321}
12322
da0436e9
JS
12323/**
12324 * lpfc_sli4_eratt_read - read sli-4 error attention events
12325 * @phba: Pointer to HBA context.
12326 *
12327 * This function is called to read the SLI4 device error attention registers
12328 * for possible error attention events. The caller must hold the hostlock
12329 * with spin_lock_irq().
12330 *
25985edc 12331 * This function returns 1 when there is Error Attention in the Host Attention
da0436e9
JS
12332 * Register and returns 0 otherwise.
12333 **/
12334static int
12335lpfc_sli4_eratt_read(struct lpfc_hba *phba)
12336{
12337 uint32_t uerr_sta_hi, uerr_sta_lo;
2fcee4bf
JS
12338 uint32_t if_type, portsmphr;
12339 struct lpfc_register portstat_reg;
da0436e9 12340
2fcee4bf
JS
12341 /*
12342 * For now, use the SLI4 device internal unrecoverable error
da0436e9
JS
12343 * registers for error attention. This can be changed later.
12344 */
2fcee4bf
JS
12345 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12346 switch (if_type) {
12347 case LPFC_SLI_INTF_IF_TYPE_0:
9940b97b
JS
12348 if (lpfc_readl(phba->sli4_hba.u.if_type0.UERRLOregaddr,
12349 &uerr_sta_lo) ||
12350 lpfc_readl(phba->sli4_hba.u.if_type0.UERRHIregaddr,
12351 &uerr_sta_hi)) {
12352 phba->work_hs |= UNPLUG_ERR;
12353 phba->work_ha |= HA_ERATT;
12354 phba->hba_flag |= HBA_ERATT_HANDLED;
12355 return 1;
12356 }
2fcee4bf
JS
12357 if ((~phba->sli4_hba.ue_mask_lo & uerr_sta_lo) ||
12358 (~phba->sli4_hba.ue_mask_hi & uerr_sta_hi)) {
12359 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12360 "1423 HBA Unrecoverable error: "
12361 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, "
12362 "ue_mask_lo_reg=0x%x, "
12363 "ue_mask_hi_reg=0x%x\n",
12364 uerr_sta_lo, uerr_sta_hi,
12365 phba->sli4_hba.ue_mask_lo,
12366 phba->sli4_hba.ue_mask_hi);
12367 phba->work_status[0] = uerr_sta_lo;
12368 phba->work_status[1] = uerr_sta_hi;
12369 phba->work_ha |= HA_ERATT;
12370 phba->hba_flag |= HBA_ERATT_HANDLED;
12371 return 1;
12372 }
12373 break;
12374 case LPFC_SLI_INTF_IF_TYPE_2:
27d6ac0a 12375 case LPFC_SLI_INTF_IF_TYPE_6:
9940b97b
JS
12376 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
12377 &portstat_reg.word0) ||
12378 lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
12379 &portsmphr)){
12380 phba->work_hs |= UNPLUG_ERR;
12381 phba->work_ha |= HA_ERATT;
12382 phba->hba_flag |= HBA_ERATT_HANDLED;
12383 return 1;
12384 }
2fcee4bf
JS
12385 if (bf_get(lpfc_sliport_status_err, &portstat_reg)) {
12386 phba->work_status[0] =
12387 readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
12388 phba->work_status[1] =
12389 readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
12390 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2e90f4b5 12391 "2885 Port Status Event: "
2fcee4bf
JS
12392 "port status reg 0x%x, "
12393 "port smphr reg 0x%x, "
12394 "error 1=0x%x, error 2=0x%x\n",
12395 portstat_reg.word0,
12396 portsmphr,
12397 phba->work_status[0],
12398 phba->work_status[1]);
12399 phba->work_ha |= HA_ERATT;
12400 phba->hba_flag |= HBA_ERATT_HANDLED;
12401 return 1;
12402 }
12403 break;
12404 case LPFC_SLI_INTF_IF_TYPE_1:
12405 default:
a747c9ce 12406 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
12407 "2886 HBA Error Attention on unsupported "
12408 "if type %d.", if_type);
a747c9ce 12409 return 1;
da0436e9 12410 }
2fcee4bf 12411
da0436e9
JS
12412 return 0;
12413}
12414
e59058c4 12415/**
3621a710 12416 * lpfc_sli_check_eratt - check error attention events
9399627f
JS
12417 * @phba: Pointer to HBA context.
12418 *
3772a991 12419 * This function is called from timer soft interrupt context to check HBA's
9399627f
JS
12420 * error attention register bit for error attention events.
12421 *
25985edc 12422 * This function returns 1 when there is Error Attention in the Host Attention
9399627f
JS
12423 * Register and returns 0 otherwise.
12424 **/
12425int
12426lpfc_sli_check_eratt(struct lpfc_hba *phba)
12427{
12428 uint32_t ha_copy;
12429
12430 /* If somebody is waiting to handle an eratt, don't process it
12431 * here. The brdkill function will do this.
12432 */
12433 if (phba->link_flag & LS_IGNORE_ERATT)
12434 return 0;
12435
12436 /* Check if interrupt handler handles this ERATT */
12437 spin_lock_irq(&phba->hbalock);
12438 if (phba->hba_flag & HBA_ERATT_HANDLED) {
12439 /* Interrupt handler has handled ERATT */
12440 spin_unlock_irq(&phba->hbalock);
12441 return 0;
12442 }
12443
a257bf90
JS
12444 /*
12445 * If there is deferred error attention, do not check for error
12446 * attention
12447 */
12448 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
12449 spin_unlock_irq(&phba->hbalock);
12450 return 0;
12451 }
12452
3772a991
JS
12453 /* If PCI channel is offline, don't process it */
12454 if (unlikely(pci_channel_offline(phba->pcidev))) {
9399627f 12455 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12456 return 0;
12457 }
12458
12459 switch (phba->sli_rev) {
12460 case LPFC_SLI_REV2:
12461 case LPFC_SLI_REV3:
12462 /* Read chip Host Attention (HA) register */
12463 ha_copy = lpfc_sli_eratt_read(phba);
12464 break;
da0436e9 12465 case LPFC_SLI_REV4:
2fcee4bf 12466 /* Read device Uncoverable Error (UERR) registers */
da0436e9
JS
12467 ha_copy = lpfc_sli4_eratt_read(phba);
12468 break;
3772a991
JS
12469 default:
12470 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12471 "0299 Invalid SLI revision (%d)\n",
12472 phba->sli_rev);
12473 ha_copy = 0;
12474 break;
9399627f
JS
12475 }
12476 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12477
12478 return ha_copy;
12479}
12480
12481/**
12482 * lpfc_intr_state_check - Check device state for interrupt handling
12483 * @phba: Pointer to HBA context.
12484 *
12485 * This inline routine checks whether a device or its PCI slot is in a state
12486 * that the interrupt should be handled.
12487 *
12488 * This function returns 0 if the device or the PCI slot is in a state that
12489 * interrupt should be handled, otherwise -EIO.
12490 */
12491static inline int
12492lpfc_intr_state_check(struct lpfc_hba *phba)
12493{
12494 /* If the pci channel is offline, ignore all the interrupts */
12495 if (unlikely(pci_channel_offline(phba->pcidev)))
12496 return -EIO;
12497
12498 /* Update device level interrupt statistics */
12499 phba->sli.slistat.sli_intr++;
12500
12501 /* Ignore all interrupts during initialization. */
12502 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
12503 return -EIO;
12504
9399627f
JS
12505 return 0;
12506}
12507
12508/**
3772a991 12509 * lpfc_sli_sp_intr_handler - Slow-path interrupt handler to SLI-3 device
e59058c4
JS
12510 * @irq: Interrupt number.
12511 * @dev_id: The device context pointer.
12512 *
9399627f 12513 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12514 * service routine when device with SLI-3 interface spec is enabled with
12515 * MSI-X multi-message interrupt mode and there are slow-path events in
12516 * the HBA. However, when the device is enabled with either MSI or Pin-IRQ
12517 * interrupt mode, this function is called as part of the device-level
12518 * interrupt handler. When the PCI slot is in error recovery or the HBA
12519 * is undergoing initialization, the interrupt handler will not process
12520 * the interrupt. The link attention and ELS ring attention events are
12521 * handled by the worker thread. The interrupt handler signals the worker
12522 * thread and returns for these events. This function is called without
12523 * any lock held. It gets the hbalock to access and update SLI data
9399627f
JS
12524 * structures.
12525 *
12526 * This function returns IRQ_HANDLED when interrupt is handled else it
12527 * returns IRQ_NONE.
e59058c4 12528 **/
dea3101e 12529irqreturn_t
3772a991 12530lpfc_sli_sp_intr_handler(int irq, void *dev_id)
dea3101e 12531{
2e0fef85 12532 struct lpfc_hba *phba;
a747c9ce 12533 uint32_t ha_copy, hc_copy;
dea3101e
JB
12534 uint32_t work_ha_copy;
12535 unsigned long status;
5b75da2f 12536 unsigned long iflag;
dea3101e
JB
12537 uint32_t control;
12538
92d7f7b0 12539 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS
12540 struct lpfc_vport *vport;
12541 struct lpfc_nodelist *ndlp;
12542 struct lpfc_dmabuf *mp;
92d7f7b0
JS
12543 LPFC_MBOXQ_t *pmb;
12544 int rc;
12545
dea3101e
JB
12546 /*
12547 * Get the driver's phba structure from the dev_id and
12548 * assume the HBA is not interrupting.
12549 */
9399627f 12550 phba = (struct lpfc_hba *)dev_id;
dea3101e
JB
12551
12552 if (unlikely(!phba))
12553 return IRQ_NONE;
12554
dea3101e 12555 /*
9399627f
JS
12556 * Stuff needs to be attented to when this function is invoked as an
12557 * individual interrupt handler in MSI-X multi-message interrupt mode
dea3101e 12558 */
9399627f 12559 if (phba->intr_type == MSIX) {
3772a991
JS
12560 /* Check device state for handling interrupt */
12561 if (lpfc_intr_state_check(phba))
9399627f
JS
12562 return IRQ_NONE;
12563 /* Need to read HA REG for slow-path events */
5b75da2f 12564 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12565 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12566 goto unplug_error;
9399627f
JS
12567 /* If somebody is waiting to handle an eratt don't process it
12568 * here. The brdkill function will do this.
12569 */
12570 if (phba->link_flag & LS_IGNORE_ERATT)
12571 ha_copy &= ~HA_ERATT;
12572 /* Check the need for handling ERATT in interrupt handler */
12573 if (ha_copy & HA_ERATT) {
12574 if (phba->hba_flag & HBA_ERATT_HANDLED)
12575 /* ERATT polling has handled ERATT */
12576 ha_copy &= ~HA_ERATT;
12577 else
12578 /* Indicate interrupt handler handles ERATT */
12579 phba->hba_flag |= HBA_ERATT_HANDLED;
12580 }
a257bf90
JS
12581
12582 /*
12583 * If there is deferred error attention, do not check for any
12584 * interrupt.
12585 */
12586 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12587 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12588 return IRQ_NONE;
12589 }
12590
9399627f 12591 /* Clear up only attention source related to slow-path */
9940b97b
JS
12592 if (lpfc_readl(phba->HCregaddr, &hc_copy))
12593 goto unplug_error;
12594
a747c9ce
JS
12595 writel(hc_copy & ~(HC_MBINT_ENA | HC_R2INT_ENA |
12596 HC_LAINT_ENA | HC_ERINT_ENA),
12597 phba->HCregaddr);
9399627f
JS
12598 writel((ha_copy & (HA_MBATT | HA_R2_CLR_MSK)),
12599 phba->HAregaddr);
a747c9ce 12600 writel(hc_copy, phba->HCregaddr);
9399627f 12601 readl(phba->HAregaddr); /* flush */
5b75da2f 12602 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12603 } else
12604 ha_copy = phba->ha_copy;
dea3101e 12605
dea3101e
JB
12606 work_ha_copy = ha_copy & phba->work_ha_mask;
12607
9399627f 12608 if (work_ha_copy) {
dea3101e
JB
12609 if (work_ha_copy & HA_LATT) {
12610 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
12611 /*
12612 * Turn off Link Attention interrupts
12613 * until CLEAR_LA done
12614 */
5b75da2f 12615 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12616 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
9940b97b
JS
12617 if (lpfc_readl(phba->HCregaddr, &control))
12618 goto unplug_error;
dea3101e
JB
12619 control &= ~HC_LAINT_ENA;
12620 writel(control, phba->HCregaddr);
12621 readl(phba->HCregaddr); /* flush */
5b75da2f 12622 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12623 }
12624 else
12625 work_ha_copy &= ~HA_LATT;
12626 }
12627
9399627f 12628 if (work_ha_copy & ~(HA_ERATT | HA_MBATT | HA_LATT)) {
858c9f6c
JS
12629 /*
12630 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
12631 * the only slow ring.
12632 */
12633 status = (work_ha_copy &
12634 (HA_RXMASK << (4*LPFC_ELS_RING)));
12635 status >>= (4*LPFC_ELS_RING);
12636 if (status & HA_RXMASK) {
5b75da2f 12637 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12638 if (lpfc_readl(phba->HCregaddr, &control))
12639 goto unplug_error;
a58cbd52
JS
12640
12641 lpfc_debugfs_slow_ring_trc(phba,
12642 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
12643 control, status,
12644 (uint32_t)phba->sli.slistat.sli_intr);
12645
858c9f6c 12646 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS
12647 lpfc_debugfs_slow_ring_trc(phba,
12648 "ISR Disable ring:"
12649 "pwork:x%x hawork:x%x wait:x%x",
12650 phba->work_ha, work_ha_copy,
12651 (uint32_t)((unsigned long)
5e9d9b82 12652 &phba->work_waitq));
a58cbd52 12653
858c9f6c
JS
12654 control &=
12655 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e
JB
12656 writel(control, phba->HCregaddr);
12657 readl(phba->HCregaddr); /* flush */
dea3101e 12658 }
a58cbd52
JS
12659 else {
12660 lpfc_debugfs_slow_ring_trc(phba,
12661 "ISR slow ring: pwork:"
12662 "x%x hawork:x%x wait:x%x",
12663 phba->work_ha, work_ha_copy,
12664 (uint32_t)((unsigned long)
5e9d9b82 12665 &phba->work_waitq));
a58cbd52 12666 }
5b75da2f 12667 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e
JB
12668 }
12669 }
5b75da2f 12670 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90 12671 if (work_ha_copy & HA_ERATT) {
9940b97b
JS
12672 if (lpfc_sli_read_hs(phba))
12673 goto unplug_error;
a257bf90
JS
12674 /*
12675 * Check if there is a deferred error condition
12676 * is active
12677 */
12678 if ((HS_FFER1 & phba->work_hs) &&
12679 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0
JS
12680 HS_FFER6 | HS_FFER7 | HS_FFER8) &
12681 phba->work_hs)) {
a257bf90
JS
12682 phba->hba_flag |= DEFER_ERATT;
12683 /* Clear all interrupt enable conditions */
12684 writel(0, phba->HCregaddr);
12685 readl(phba->HCregaddr);
12686 }
12687 }
12688
9399627f 12689 if ((work_ha_copy & HA_MBATT) && (phba->sli.mbox_active)) {
92d7f7b0 12690 pmb = phba->sli.mbox_active;
04c68496 12691 pmbox = &pmb->u.mb;
34b02dcd 12692 mbox = phba->mbox;
858c9f6c 12693 vport = pmb->vport;
92d7f7b0
JS
12694
12695 /* First check out the status word */
12696 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
12697 if (pmbox->mbxOwner != OWN_HOST) {
5b75da2f 12698 spin_unlock_irqrestore(&phba->hbalock, iflag);
92d7f7b0
JS
12699 /*
12700 * Stray Mailbox Interrupt, mbxCommand <cmd>
12701 * mbxStatus <status>
12702 */
09372820 12703 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
92d7f7b0 12704 LOG_SLI,
e8b62011 12705 "(%d):0304 Stray Mailbox "
92d7f7b0
JS
12706 "Interrupt mbxCommand x%x "
12707 "mbxStatus x%x\n",
e8b62011 12708 (vport ? vport->vpi : 0),
92d7f7b0
JS
12709 pmbox->mbxCommand,
12710 pmbox->mbxStatus);
09372820
JS
12711 /* clear mailbox attention bit */
12712 work_ha_copy &= ~HA_MBATT;
12713 } else {
97eab634 12714 phba->sli.mbox_active = NULL;
5b75da2f 12715 spin_unlock_irqrestore(&phba->hbalock, iflag);
09372820
JS
12716 phba->last_completion_time = jiffies;
12717 del_timer(&phba->sli.mbox_tmo);
09372820
JS
12718 if (pmb->mbox_cmpl) {
12719 lpfc_sli_pcimem_bcopy(mbox, pmbox,
12720 MAILBOX_CMD_SIZE);
7a470277 12721 if (pmb->out_ext_byte_len &&
3e1f0718 12722 pmb->ctx_buf)
7a470277
JS
12723 lpfc_sli_pcimem_bcopy(
12724 phba->mbox_ext,
3e1f0718 12725 pmb->ctx_buf,
7a470277 12726 pmb->out_ext_byte_len);
09372820
JS
12727 }
12728 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
12729 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
12730
12731 lpfc_debugfs_disc_trc(vport,
12732 LPFC_DISC_TRC_MBOX_VPORT,
12733 "MBOX dflt rpi: : "
12734 "status:x%x rpi:x%x",
12735 (uint32_t)pmbox->mbxStatus,
12736 pmbox->un.varWords[0], 0);
12737
12738 if (!pmbox->mbxStatus) {
12739 mp = (struct lpfc_dmabuf *)
3e1f0718 12740 (pmb->ctx_buf);
09372820 12741 ndlp = (struct lpfc_nodelist *)
3e1f0718 12742 pmb->ctx_ndlp;
09372820
JS
12743
12744 /* Reg_LOGIN of dflt RPI was
12745 * successful. new lets get
12746 * rid of the RPI using the
12747 * same mbox buffer.
12748 */
12749 lpfc_unreg_login(phba,
12750 vport->vpi,
12751 pmbox->un.varWords[0],
12752 pmb);
12753 pmb->mbox_cmpl =
12754 lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
12755 pmb->ctx_buf = mp;
12756 pmb->ctx_ndlp = ndlp;
09372820 12757 pmb->vport = vport;
58da1ffb
JS
12758 rc = lpfc_sli_issue_mbox(phba,
12759 pmb,
12760 MBX_NOWAIT);
12761 if (rc != MBX_BUSY)
12762 lpfc_printf_log(phba,
12763 KERN_ERR,
12764 LOG_MBOX | LOG_SLI,
d7c255b2 12765 "0350 rc should have"
6a9c52cf 12766 "been MBX_BUSY\n");
3772a991
JS
12767 if (rc != MBX_NOT_FINISHED)
12768 goto send_current_mbox;
09372820 12769 }
858c9f6c 12770 }
5b75da2f
JS
12771 spin_lock_irqsave(
12772 &phba->pport->work_port_lock,
12773 iflag);
09372820
JS
12774 phba->pport->work_port_events &=
12775 ~WORKER_MBOX_TMO;
5b75da2f
JS
12776 spin_unlock_irqrestore(
12777 &phba->pport->work_port_lock,
12778 iflag);
09372820 12779 lpfc_mbox_cmpl_put(phba, pmb);
858c9f6c 12780 }
97eab634 12781 } else
5b75da2f 12782 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f 12783
92d7f7b0
JS
12784 if ((work_ha_copy & HA_MBATT) &&
12785 (phba->sli.mbox_active == NULL)) {
858c9f6c 12786send_current_mbox:
92d7f7b0 12787 /* Process next mailbox command if there is one */
58da1ffb
JS
12788 do {
12789 rc = lpfc_sli_issue_mbox(phba, NULL,
12790 MBX_NOWAIT);
12791 } while (rc == MBX_NOT_FINISHED);
12792 if (rc != MBX_SUCCESS)
12793 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
12794 LOG_SLI, "0349 rc should be "
6a9c52cf 12795 "MBX_SUCCESS\n");
92d7f7b0
JS
12796 }
12797
5b75da2f 12798 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12799 phba->work_ha |= work_ha_copy;
5b75da2f 12800 spin_unlock_irqrestore(&phba->hbalock, iflag);
5e9d9b82 12801 lpfc_worker_wake_up(phba);
dea3101e 12802 }
9399627f 12803 return IRQ_HANDLED;
9940b97b
JS
12804unplug_error:
12805 spin_unlock_irqrestore(&phba->hbalock, iflag);
12806 return IRQ_HANDLED;
dea3101e 12807
3772a991 12808} /* lpfc_sli_sp_intr_handler */
9399627f
JS
12809
12810/**
3772a991 12811 * lpfc_sli_fp_intr_handler - Fast-path interrupt handler to SLI-3 device.
9399627f
JS
12812 * @irq: Interrupt number.
12813 * @dev_id: The device context pointer.
12814 *
12815 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12816 * service routine when device with SLI-3 interface spec is enabled with
12817 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
12818 * ring event in the HBA. However, when the device is enabled with either
12819 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
12820 * device-level interrupt handler. When the PCI slot is in error recovery
12821 * or the HBA is undergoing initialization, the interrupt handler will not
12822 * process the interrupt. The SCSI FCP fast-path ring event are handled in
12823 * the intrrupt context. This function is called without any lock held.
12824 * It gets the hbalock to access and update SLI data structures.
9399627f
JS
12825 *
12826 * This function returns IRQ_HANDLED when interrupt is handled else it
12827 * returns IRQ_NONE.
12828 **/
12829irqreturn_t
3772a991 12830lpfc_sli_fp_intr_handler(int irq, void *dev_id)
9399627f
JS
12831{
12832 struct lpfc_hba *phba;
12833 uint32_t ha_copy;
12834 unsigned long status;
5b75da2f 12835 unsigned long iflag;
895427bd 12836 struct lpfc_sli_ring *pring;
9399627f
JS
12837
12838 /* Get the driver's phba structure from the dev_id and
12839 * assume the HBA is not interrupting.
12840 */
12841 phba = (struct lpfc_hba *) dev_id;
12842
12843 if (unlikely(!phba))
12844 return IRQ_NONE;
12845
12846 /*
12847 * Stuff needs to be attented to when this function is invoked as an
12848 * individual interrupt handler in MSI-X multi-message interrupt mode
12849 */
12850 if (phba->intr_type == MSIX) {
3772a991
JS
12851 /* Check device state for handling interrupt */
12852 if (lpfc_intr_state_check(phba))
9399627f
JS
12853 return IRQ_NONE;
12854 /* Need to read HA REG for FCP ring and other ring events */
9940b97b
JS
12855 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12856 return IRQ_HANDLED;
9399627f 12857 /* Clear up only attention source related to fast-path */
5b75da2f 12858 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90
JS
12859 /*
12860 * If there is deferred error attention, do not check for
12861 * any interrupt.
12862 */
12863 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12864 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12865 return IRQ_NONE;
12866 }
9399627f
JS
12867 writel((ha_copy & (HA_R0_CLR_MSK | HA_R1_CLR_MSK)),
12868 phba->HAregaddr);
12869 readl(phba->HAregaddr); /* flush */
5b75da2f 12870 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12871 } else
12872 ha_copy = phba->ha_copy;
dea3101e
JB
12873
12874 /*
9399627f 12875 * Process all events on FCP ring. Take the optimized path for FCP IO.
dea3101e 12876 */
9399627f
JS
12877 ha_copy &= ~(phba->work_ha_mask);
12878
12879 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
dea3101e 12880 status >>= (4*LPFC_FCP_RING);
895427bd 12881 pring = &phba->sli.sli3_ring[LPFC_FCP_RING];
858c9f6c 12882 if (status & HA_RXMASK)
895427bd 12883 lpfc_sli_handle_fast_ring_event(phba, pring, status);
a4bc3379
JS
12884
12885 if (phba->cfg_multi_ring_support == 2) {
12886 /*
9399627f
JS
12887 * Process all events on extra ring. Take the optimized path
12888 * for extra ring IO.
a4bc3379 12889 */
9399627f 12890 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
a4bc3379 12891 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 12892 if (status & HA_RXMASK) {
a4bc3379 12893 lpfc_sli_handle_fast_ring_event(phba,
895427bd 12894 &phba->sli.sli3_ring[LPFC_EXTRA_RING],
a4bc3379
JS
12895 status);
12896 }
12897 }
dea3101e 12898 return IRQ_HANDLED;
3772a991 12899} /* lpfc_sli_fp_intr_handler */
9399627f
JS
12900
12901/**
3772a991 12902 * lpfc_sli_intr_handler - Device-level interrupt handler to SLI-3 device
9399627f
JS
12903 * @irq: Interrupt number.
12904 * @dev_id: The device context pointer.
12905 *
3772a991
JS
12906 * This function is the HBA device-level interrupt handler to device with
12907 * SLI-3 interface spec, called from the PCI layer when either MSI or
12908 * Pin-IRQ interrupt mode is enabled and there is an event in the HBA which
12909 * requires driver attention. This function invokes the slow-path interrupt
12910 * attention handling function and fast-path interrupt attention handling
12911 * function in turn to process the relevant HBA attention events. This
12912 * function is called without any lock held. It gets the hbalock to access
12913 * and update SLI data structures.
9399627f
JS
12914 *
12915 * This function returns IRQ_HANDLED when interrupt is handled, else it
12916 * returns IRQ_NONE.
12917 **/
12918irqreturn_t
3772a991 12919lpfc_sli_intr_handler(int irq, void *dev_id)
9399627f
JS
12920{
12921 struct lpfc_hba *phba;
12922 irqreturn_t sp_irq_rc, fp_irq_rc;
12923 unsigned long status1, status2;
a747c9ce 12924 uint32_t hc_copy;
9399627f
JS
12925
12926 /*
12927 * Get the driver's phba structure from the dev_id and
12928 * assume the HBA is not interrupting.
12929 */
12930 phba = (struct lpfc_hba *) dev_id;
12931
12932 if (unlikely(!phba))
12933 return IRQ_NONE;
12934
3772a991
JS
12935 /* Check device state for handling interrupt */
12936 if (lpfc_intr_state_check(phba))
9399627f
JS
12937 return IRQ_NONE;
12938
12939 spin_lock(&phba->hbalock);
9940b97b
JS
12940 if (lpfc_readl(phba->HAregaddr, &phba->ha_copy)) {
12941 spin_unlock(&phba->hbalock);
12942 return IRQ_HANDLED;
12943 }
12944
9399627f
JS
12945 if (unlikely(!phba->ha_copy)) {
12946 spin_unlock(&phba->hbalock);
12947 return IRQ_NONE;
12948 } else if (phba->ha_copy & HA_ERATT) {
12949 if (phba->hba_flag & HBA_ERATT_HANDLED)
12950 /* ERATT polling has handled ERATT */
12951 phba->ha_copy &= ~HA_ERATT;
12952 else
12953 /* Indicate interrupt handler handles ERATT */
12954 phba->hba_flag |= HBA_ERATT_HANDLED;
12955 }
12956
a257bf90
JS
12957 /*
12958 * If there is deferred error attention, do not check for any interrupt.
12959 */
12960 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
ec21b3b0 12961 spin_unlock(&phba->hbalock);
a257bf90
JS
12962 return IRQ_NONE;
12963 }
12964
9399627f 12965 /* Clear attention sources except link and error attentions */
9940b97b
JS
12966 if (lpfc_readl(phba->HCregaddr, &hc_copy)) {
12967 spin_unlock(&phba->hbalock);
12968 return IRQ_HANDLED;
12969 }
a747c9ce
JS
12970 writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA
12971 | HC_R2INT_ENA | HC_LAINT_ENA | HC_ERINT_ENA),
12972 phba->HCregaddr);
9399627f 12973 writel((phba->ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
a747c9ce 12974 writel(hc_copy, phba->HCregaddr);
9399627f
JS
12975 readl(phba->HAregaddr); /* flush */
12976 spin_unlock(&phba->hbalock);
12977
12978 /*
12979 * Invokes slow-path host attention interrupt handling as appropriate.
12980 */
12981
12982 /* status of events with mailbox and link attention */
12983 status1 = phba->ha_copy & (HA_MBATT | HA_LATT | HA_ERATT);
12984
12985 /* status of events with ELS ring */
12986 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_ELS_RING)));
12987 status2 >>= (4*LPFC_ELS_RING);
12988
12989 if (status1 || (status2 & HA_RXMASK))
3772a991 12990 sp_irq_rc = lpfc_sli_sp_intr_handler(irq, dev_id);
9399627f
JS
12991 else
12992 sp_irq_rc = IRQ_NONE;
12993
12994 /*
12995 * Invoke fast-path host attention interrupt handling as appropriate.
12996 */
12997
12998 /* status of events with FCP ring */
12999 status1 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
13000 status1 >>= (4*LPFC_FCP_RING);
13001
13002 /* status of events with extra ring */
13003 if (phba->cfg_multi_ring_support == 2) {
13004 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
13005 status2 >>= (4*LPFC_EXTRA_RING);
13006 } else
13007 status2 = 0;
13008
13009 if ((status1 & HA_RXMASK) || (status2 & HA_RXMASK))
3772a991 13010 fp_irq_rc = lpfc_sli_fp_intr_handler(irq, dev_id);
9399627f
JS
13011 else
13012 fp_irq_rc = IRQ_NONE;
dea3101e 13013
9399627f
JS
13014 /* Return device-level interrupt handling status */
13015 return (sp_irq_rc == IRQ_HANDLED) ? sp_irq_rc : fp_irq_rc;
3772a991 13016} /* lpfc_sli_intr_handler */
4f774513
JS
13017
13018/**
4f774513 13019 * lpfc_sli4_els_xri_abort_event_proc - Process els xri abort event
4f774513
JS
13020 * @phba: pointer to lpfc hba data structure.
13021 *
13022 * This routine is invoked by the worker thread to process all the pending
4f774513 13023 * SLI4 els abort xri events.
4f774513 13024 **/
4f774513 13025void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *phba)
4f774513
JS
13026{
13027 struct lpfc_cq_event *cq_event;
13028
4f774513 13029 /* First, declare the els xri abort event has been handled */
4f774513 13030 spin_lock_irq(&phba->hbalock);
4f774513 13031 phba->hba_flag &= ~ELS_XRI_ABORT_EVENT;
4f774513 13032 spin_unlock_irq(&phba->hbalock);
4f774513
JS
13033 /* Now, handle all the els xri abort events */
13034 while (!list_empty(&phba->sli4_hba.sp_els_xri_aborted_work_queue)) {
13035 /* Get the first event from the head of the event queue */
13036 spin_lock_irq(&phba->hbalock);
13037 list_remove_head(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
13038 cq_event, struct lpfc_cq_event, list);
13039 spin_unlock_irq(&phba->hbalock);
13040 /* Notify aborted XRI for ELS work queue */
13041 lpfc_sli4_els_xri_aborted(phba, &cq_event->cqe.wcqe_axri);
13042 /* Free the event processed back to the free pool */
13043 lpfc_sli4_cq_event_release(phba, cq_event);
13044 }
13045}
13046
341af102
JS
13047/**
13048 * lpfc_sli4_iocb_param_transfer - Transfer pIocbOut and cmpl status to pIocbIn
13049 * @phba: pointer to lpfc hba data structure
13050 * @pIocbIn: pointer to the rspiocbq
13051 * @pIocbOut: pointer to the cmdiocbq
13052 * @wcqe: pointer to the complete wcqe
13053 *
13054 * This routine transfers the fields of a command iocbq to a response iocbq
13055 * by copying all the IOCB fields from command iocbq and transferring the
13056 * completion status information from the complete wcqe.
13057 **/
4f774513 13058static void
341af102
JS
13059lpfc_sli4_iocb_param_transfer(struct lpfc_hba *phba,
13060 struct lpfc_iocbq *pIocbIn,
4f774513
JS
13061 struct lpfc_iocbq *pIocbOut,
13062 struct lpfc_wcqe_complete *wcqe)
13063{
af22741c 13064 int numBdes, i;
341af102 13065 unsigned long iflags;
af22741c
JS
13066 uint32_t status, max_response;
13067 struct lpfc_dmabuf *dmabuf;
13068 struct ulp_bde64 *bpl, bde;
4f774513
JS
13069 size_t offset = offsetof(struct lpfc_iocbq, iocb);
13070
13071 memcpy((char *)pIocbIn + offset, (char *)pIocbOut + offset,
13072 sizeof(struct lpfc_iocbq) - offset);
4f774513 13073 /* Map WCQE parameters into irspiocb parameters */
acd6859b
JS
13074 status = bf_get(lpfc_wcqe_c_status, wcqe);
13075 pIocbIn->iocb.ulpStatus = (status & LPFC_IOCB_STATUS_MASK);
4f774513
JS
13076 if (pIocbOut->iocb_flag & LPFC_IO_FCP)
13077 if (pIocbIn->iocb.ulpStatus == IOSTAT_FCP_RSP_ERROR)
13078 pIocbIn->iocb.un.fcpi.fcpi_parm =
13079 pIocbOut->iocb.un.fcpi.fcpi_parm -
13080 wcqe->total_data_placed;
13081 else
13082 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
695a814e 13083 else {
4f774513 13084 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
af22741c
JS
13085 switch (pIocbOut->iocb.ulpCommand) {
13086 case CMD_ELS_REQUEST64_CR:
13087 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
13088 bpl = (struct ulp_bde64 *)dmabuf->virt;
13089 bde.tus.w = le32_to_cpu(bpl[1].tus.w);
13090 max_response = bde.tus.f.bdeSize;
13091 break;
13092 case CMD_GEN_REQUEST64_CR:
13093 max_response = 0;
13094 if (!pIocbOut->context3)
13095 break;
13096 numBdes = pIocbOut->iocb.un.genreq64.bdl.bdeSize/
13097 sizeof(struct ulp_bde64);
13098 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
13099 bpl = (struct ulp_bde64 *)dmabuf->virt;
13100 for (i = 0; i < numBdes; i++) {
13101 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
13102 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
13103 max_response += bde.tus.f.bdeSize;
13104 }
13105 break;
13106 default:
13107 max_response = wcqe->total_data_placed;
13108 break;
13109 }
13110 if (max_response < wcqe->total_data_placed)
13111 pIocbIn->iocb.un.genreq64.bdl.bdeSize = max_response;
13112 else
13113 pIocbIn->iocb.un.genreq64.bdl.bdeSize =
13114 wcqe->total_data_placed;
695a814e 13115 }
341af102 13116
acd6859b
JS
13117 /* Convert BG errors for completion status */
13118 if (status == CQE_STATUS_DI_ERROR) {
13119 pIocbIn->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
13120
13121 if (bf_get(lpfc_wcqe_c_bg_edir, wcqe))
13122 pIocbIn->iocb.un.ulpWord[4] = IOERR_RX_DMA_FAILED;
13123 else
13124 pIocbIn->iocb.un.ulpWord[4] = IOERR_TX_DMA_FAILED;
13125
13126 pIocbIn->iocb.unsli3.sli3_bg.bgstat = 0;
13127 if (bf_get(lpfc_wcqe_c_bg_ge, wcqe)) /* Guard Check failed */
13128 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13129 BGS_GUARD_ERR_MASK;
13130 if (bf_get(lpfc_wcqe_c_bg_ae, wcqe)) /* App Tag Check failed */
13131 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13132 BGS_APPTAG_ERR_MASK;
13133 if (bf_get(lpfc_wcqe_c_bg_re, wcqe)) /* Ref Tag Check failed */
13134 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13135 BGS_REFTAG_ERR_MASK;
13136
13137 /* Check to see if there was any good data before the error */
13138 if (bf_get(lpfc_wcqe_c_bg_tdpv, wcqe)) {
13139 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13140 BGS_HI_WATER_MARK_PRESENT_MASK;
13141 pIocbIn->iocb.unsli3.sli3_bg.bghm =
13142 wcqe->total_data_placed;
13143 }
13144
13145 /*
13146 * Set ALL the error bits to indicate we don't know what
13147 * type of error it is.
13148 */
13149 if (!pIocbIn->iocb.unsli3.sli3_bg.bgstat)
13150 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13151 (BGS_REFTAG_ERR_MASK | BGS_APPTAG_ERR_MASK |
13152 BGS_GUARD_ERR_MASK);
13153 }
13154
341af102
JS
13155 /* Pick up HBA exchange busy condition */
13156 if (bf_get(lpfc_wcqe_c_xb, wcqe)) {
13157 spin_lock_irqsave(&phba->hbalock, iflags);
13158 pIocbIn->iocb_flag |= LPFC_EXCHANGE_BUSY;
13159 spin_unlock_irqrestore(&phba->hbalock, iflags);
13160 }
4f774513
JS
13161}
13162
45ed1190
JS
13163/**
13164 * lpfc_sli4_els_wcqe_to_rspiocbq - Get response iocbq from els wcqe
13165 * @phba: Pointer to HBA context object.
13166 * @wcqe: Pointer to work-queue completion queue entry.
13167 *
13168 * This routine handles an ELS work-queue completion event and construct
13169 * a pseudo response ELS IODBQ from the SLI4 ELS WCQE for the common
13170 * discovery engine to handle.
13171 *
13172 * Return: Pointer to the receive IOCBQ, NULL otherwise.
13173 **/
13174static struct lpfc_iocbq *
13175lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *phba,
13176 struct lpfc_iocbq *irspiocbq)
13177{
895427bd 13178 struct lpfc_sli_ring *pring;
45ed1190
JS
13179 struct lpfc_iocbq *cmdiocbq;
13180 struct lpfc_wcqe_complete *wcqe;
13181 unsigned long iflags;
13182
895427bd 13183 pring = lpfc_phba_elsring(phba);
1234a6d5
DK
13184 if (unlikely(!pring))
13185 return NULL;
895427bd 13186
45ed1190 13187 wcqe = &irspiocbq->cq_event.cqe.wcqe_cmpl;
45ed1190
JS
13188 pring->stats.iocb_event++;
13189 /* Look up the ELS command IOCB and create pseudo response IOCB */
13190 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13191 bf_get(lpfc_wcqe_c_request_tag, wcqe));
45ed1190
JS
13192 if (unlikely(!cmdiocbq)) {
13193 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13194 "0386 ELS complete with no corresponding "
401bb416
DK
13195 "cmdiocb: 0x%x 0x%x 0x%x 0x%x\n",
13196 wcqe->word0, wcqe->total_data_placed,
13197 wcqe->parameter, wcqe->word3);
45ed1190
JS
13198 lpfc_sli_release_iocbq(phba, irspiocbq);
13199 return NULL;
13200 }
13201
e2a8be56 13202 spin_lock_irqsave(&pring->ring_lock, iflags);
401bb416
DK
13203 /* Put the iocb back on the txcmplq */
13204 lpfc_sli_ringtxcmpl_put(phba, pring, cmdiocbq);
13205 spin_unlock_irqrestore(&pring->ring_lock, iflags);
13206
45ed1190 13207 /* Fake the irspiocbq and copy necessary response information */
341af102 13208 lpfc_sli4_iocb_param_transfer(phba, irspiocbq, cmdiocbq, wcqe);
45ed1190
JS
13209
13210 return irspiocbq;
13211}
13212
8a5ca109
JS
13213inline struct lpfc_cq_event *
13214lpfc_cq_event_setup(struct lpfc_hba *phba, void *entry, int size)
13215{
13216 struct lpfc_cq_event *cq_event;
13217
13218 /* Allocate a new internal CQ_EVENT entry */
13219 cq_event = lpfc_sli4_cq_event_alloc(phba);
13220 if (!cq_event) {
13221 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13222 "0602 Failed to alloc CQ_EVENT entry\n");
13223 return NULL;
13224 }
13225
13226 /* Move the CQE into the event */
13227 memcpy(&cq_event->cqe, entry, size);
13228 return cq_event;
13229}
13230
04c68496 13231/**
291c2548 13232 * lpfc_sli4_sp_handle_async_event - Handle an asynchronous event
04c68496
JS
13233 * @phba: Pointer to HBA context object.
13234 * @cqe: Pointer to mailbox completion queue entry.
13235 *
291c2548 13236 * This routine process a mailbox completion queue entry with asynchronous
04c68496
JS
13237 * event.
13238 *
13239 * Return: true if work posted to worker thread, otherwise false.
13240 **/
13241static bool
13242lpfc_sli4_sp_handle_async_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13243{
13244 struct lpfc_cq_event *cq_event;
13245 unsigned long iflags;
13246
13247 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13248 "0392 Async Event: word0:x%x, word1:x%x, "
13249 "word2:x%x, word3:x%x\n", mcqe->word0,
13250 mcqe->mcqe_tag0, mcqe->mcqe_tag1, mcqe->trailer);
13251
8a5ca109
JS
13252 cq_event = lpfc_cq_event_setup(phba, mcqe, sizeof(struct lpfc_mcqe));
13253 if (!cq_event)
04c68496 13254 return false;
04c68496
JS
13255 spin_lock_irqsave(&phba->hbalock, iflags);
13256 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_asynce_work_queue);
13257 /* Set the async event flag */
13258 phba->hba_flag |= ASYNC_EVENT;
13259 spin_unlock_irqrestore(&phba->hbalock, iflags);
13260
13261 return true;
13262}
13263
13264/**
13265 * lpfc_sli4_sp_handle_mbox_event - Handle a mailbox completion event
13266 * @phba: Pointer to HBA context object.
13267 * @cqe: Pointer to mailbox completion queue entry.
13268 *
13269 * This routine process a mailbox completion queue entry with mailbox
13270 * completion event.
13271 *
13272 * Return: true if work posted to worker thread, otherwise false.
13273 **/
13274static bool
13275lpfc_sli4_sp_handle_mbox_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13276{
13277 uint32_t mcqe_status;
13278 MAILBOX_t *mbox, *pmbox;
13279 struct lpfc_mqe *mqe;
13280 struct lpfc_vport *vport;
13281 struct lpfc_nodelist *ndlp;
13282 struct lpfc_dmabuf *mp;
13283 unsigned long iflags;
13284 LPFC_MBOXQ_t *pmb;
13285 bool workposted = false;
13286 int rc;
13287
13288 /* If not a mailbox complete MCQE, out by checking mailbox consume */
13289 if (!bf_get(lpfc_trailer_completed, mcqe))
13290 goto out_no_mqe_complete;
13291
13292 /* Get the reference to the active mbox command */
13293 spin_lock_irqsave(&phba->hbalock, iflags);
13294 pmb = phba->sli.mbox_active;
13295 if (unlikely(!pmb)) {
13296 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13297 "1832 No pending MBOX command to handle\n");
13298 spin_unlock_irqrestore(&phba->hbalock, iflags);
13299 goto out_no_mqe_complete;
13300 }
13301 spin_unlock_irqrestore(&phba->hbalock, iflags);
13302 mqe = &pmb->u.mqe;
13303 pmbox = (MAILBOX_t *)&pmb->u.mqe;
13304 mbox = phba->mbox;
13305 vport = pmb->vport;
13306
13307 /* Reset heartbeat timer */
13308 phba->last_completion_time = jiffies;
13309 del_timer(&phba->sli.mbox_tmo);
13310
13311 /* Move mbox data to caller's mailbox region, do endian swapping */
13312 if (pmb->mbox_cmpl && mbox)
48f8fdb4 13313 lpfc_sli4_pcimem_bcopy(mbox, mqe, sizeof(struct lpfc_mqe));
04c68496 13314
73d91e50
JS
13315 /*
13316 * For mcqe errors, conditionally move a modified error code to
13317 * the mbox so that the error will not be missed.
13318 */
13319 mcqe_status = bf_get(lpfc_mcqe_status, mcqe);
13320 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
13321 if (bf_get(lpfc_mqe_status, mqe) == MBX_SUCCESS)
13322 bf_set(lpfc_mqe_status, mqe,
13323 (LPFC_MBX_ERROR_RANGE | mcqe_status));
13324 }
04c68496
JS
13325 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
13326 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
13327 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_MBOX_VPORT,
13328 "MBOX dflt rpi: status:x%x rpi:x%x",
13329 mcqe_status,
13330 pmbox->un.varWords[0], 0);
13331 if (mcqe_status == MB_CQE_STATUS_SUCCESS) {
3e1f0718
JS
13332 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
13333 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
04c68496
JS
13334 /* Reg_LOGIN of dflt RPI was successful. Now lets get
13335 * RID of the PPI using the same mbox buffer.
13336 */
13337 lpfc_unreg_login(phba, vport->vpi,
13338 pmbox->un.varWords[0], pmb);
13339 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
13340 pmb->ctx_buf = mp;
13341 pmb->ctx_ndlp = ndlp;
04c68496
JS
13342 pmb->vport = vport;
13343 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
13344 if (rc != MBX_BUSY)
13345 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
13346 LOG_SLI, "0385 rc should "
13347 "have been MBX_BUSY\n");
13348 if (rc != MBX_NOT_FINISHED)
13349 goto send_current_mbox;
13350 }
13351 }
13352 spin_lock_irqsave(&phba->pport->work_port_lock, iflags);
13353 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
13354 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflags);
13355
13356 /* There is mailbox completion work to do */
13357 spin_lock_irqsave(&phba->hbalock, iflags);
13358 __lpfc_mbox_cmpl_put(phba, pmb);
13359 phba->work_ha |= HA_MBATT;
13360 spin_unlock_irqrestore(&phba->hbalock, iflags);
13361 workposted = true;
13362
13363send_current_mbox:
13364 spin_lock_irqsave(&phba->hbalock, iflags);
13365 /* Release the mailbox command posting token */
13366 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13367 /* Setting active mailbox pointer need to be in sync to flag clear */
13368 phba->sli.mbox_active = NULL;
07b85824
JS
13369 if (bf_get(lpfc_trailer_consumed, mcqe))
13370 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
04c68496
JS
13371 spin_unlock_irqrestore(&phba->hbalock, iflags);
13372 /* Wake up worker thread to post the next pending mailbox command */
13373 lpfc_worker_wake_up(phba);
07b85824
JS
13374 return workposted;
13375
04c68496 13376out_no_mqe_complete:
07b85824 13377 spin_lock_irqsave(&phba->hbalock, iflags);
04c68496
JS
13378 if (bf_get(lpfc_trailer_consumed, mcqe))
13379 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
07b85824
JS
13380 spin_unlock_irqrestore(&phba->hbalock, iflags);
13381 return false;
04c68496
JS
13382}
13383
13384/**
13385 * lpfc_sli4_sp_handle_mcqe - Process a mailbox completion queue entry
13386 * @phba: Pointer to HBA context object.
13387 * @cqe: Pointer to mailbox completion queue entry.
13388 *
13389 * This routine process a mailbox completion queue entry, it invokes the
291c2548 13390 * proper mailbox complete handling or asynchronous event handling routine
04c68496
JS
13391 * according to the MCQE's async bit.
13392 *
13393 * Return: true if work posted to worker thread, otherwise false.
13394 **/
13395static bool
32517fc0
JS
13396lpfc_sli4_sp_handle_mcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13397 struct lpfc_cqe *cqe)
04c68496
JS
13398{
13399 struct lpfc_mcqe mcqe;
13400 bool workposted;
13401
32517fc0
JS
13402 cq->CQ_mbox++;
13403
04c68496 13404 /* Copy the mailbox MCQE and convert endian order as needed */
48f8fdb4 13405 lpfc_sli4_pcimem_bcopy(cqe, &mcqe, sizeof(struct lpfc_mcqe));
04c68496
JS
13406
13407 /* Invoke the proper event handling routine */
13408 if (!bf_get(lpfc_trailer_async, &mcqe))
13409 workposted = lpfc_sli4_sp_handle_mbox_event(phba, &mcqe);
13410 else
13411 workposted = lpfc_sli4_sp_handle_async_event(phba, &mcqe);
13412 return workposted;
13413}
13414
4f774513
JS
13415/**
13416 * lpfc_sli4_sp_handle_els_wcqe - Handle els work-queue completion event
13417 * @phba: Pointer to HBA context object.
2a76a283 13418 * @cq: Pointer to associated CQ
4f774513
JS
13419 * @wcqe: Pointer to work-queue completion queue entry.
13420 *
13421 * This routine handles an ELS work-queue completion event.
13422 *
13423 * Return: true if work posted to worker thread, otherwise false.
13424 **/
13425static bool
2a76a283 13426lpfc_sli4_sp_handle_els_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13427 struct lpfc_wcqe_complete *wcqe)
13428{
4f774513
JS
13429 struct lpfc_iocbq *irspiocbq;
13430 unsigned long iflags;
2a76a283 13431 struct lpfc_sli_ring *pring = cq->pring;
0e9bb8d7
JS
13432 int txq_cnt = 0;
13433 int txcmplq_cnt = 0;
4f774513 13434
11f0e34f
JS
13435 /* Check for response status */
13436 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13437 /* Log the error status */
13438 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13439 "0357 ELS CQE error: status=x%x: "
13440 "CQE: %08x %08x %08x %08x\n",
13441 bf_get(lpfc_wcqe_c_status, wcqe),
13442 wcqe->word0, wcqe->total_data_placed,
13443 wcqe->parameter, wcqe->word3);
13444 }
13445
45ed1190 13446 /* Get an irspiocbq for later ELS response processing use */
4f774513
JS
13447 irspiocbq = lpfc_sli_get_iocbq(phba);
13448 if (!irspiocbq) {
0e9bb8d7
JS
13449 if (!list_empty(&pring->txq))
13450 txq_cnt++;
13451 if (!list_empty(&pring->txcmplq))
13452 txcmplq_cnt++;
4f774513 13453 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2a9bf3d0 13454 "0387 NO IOCBQ data: txq_cnt=%d iocb_cnt=%d "
ff349bca 13455 "els_txcmplq_cnt=%d\n",
0e9bb8d7 13456 txq_cnt, phba->iocb_cnt,
0e9bb8d7 13457 txcmplq_cnt);
45ed1190 13458 return false;
4f774513 13459 }
4f774513 13460
45ed1190
JS
13461 /* Save off the slow-path queue event for work thread to process */
13462 memcpy(&irspiocbq->cq_event.cqe.wcqe_cmpl, wcqe, sizeof(*wcqe));
4f774513 13463 spin_lock_irqsave(&phba->hbalock, iflags);
4d9ab994 13464 list_add_tail(&irspiocbq->cq_event.list,
45ed1190
JS
13465 &phba->sli4_hba.sp_queue_event);
13466 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513 13467 spin_unlock_irqrestore(&phba->hbalock, iflags);
4f774513 13468
45ed1190 13469 return true;
4f774513
JS
13470}
13471
13472/**
13473 * lpfc_sli4_sp_handle_rel_wcqe - Handle slow-path WQ entry consumed event
13474 * @phba: Pointer to HBA context object.
13475 * @wcqe: Pointer to work-queue completion queue entry.
13476 *
3f8b6fb7 13477 * This routine handles slow-path WQ entry consumed event by invoking the
4f774513
JS
13478 * proper WQ release routine to the slow-path WQ.
13479 **/
13480static void
13481lpfc_sli4_sp_handle_rel_wcqe(struct lpfc_hba *phba,
13482 struct lpfc_wcqe_release *wcqe)
13483{
2e90f4b5
JS
13484 /* sanity check on queue memory */
13485 if (unlikely(!phba->sli4_hba.els_wq))
13486 return;
4f774513
JS
13487 /* Check for the slow-path ELS work queue */
13488 if (bf_get(lpfc_wcqe_r_wq_id, wcqe) == phba->sli4_hba.els_wq->queue_id)
13489 lpfc_sli4_wq_release(phba->sli4_hba.els_wq,
13490 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
13491 else
13492 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13493 "2579 Slow-path wqe consume event carries "
13494 "miss-matched qid: wcqe-qid=x%x, sp-qid=x%x\n",
13495 bf_get(lpfc_wcqe_r_wqe_index, wcqe),
13496 phba->sli4_hba.els_wq->queue_id);
13497}
13498
13499/**
13500 * lpfc_sli4_sp_handle_abort_xri_wcqe - Handle a xri abort event
13501 * @phba: Pointer to HBA context object.
13502 * @cq: Pointer to a WQ completion queue.
13503 * @wcqe: Pointer to work-queue completion queue entry.
13504 *
13505 * This routine handles an XRI abort event.
13506 *
13507 * Return: true if work posted to worker thread, otherwise false.
13508 **/
13509static bool
13510lpfc_sli4_sp_handle_abort_xri_wcqe(struct lpfc_hba *phba,
13511 struct lpfc_queue *cq,
13512 struct sli4_wcqe_xri_aborted *wcqe)
13513{
13514 bool workposted = false;
13515 struct lpfc_cq_event *cq_event;
13516 unsigned long iflags;
13517
4f774513 13518 switch (cq->subtype) {
c00f62e6
JS
13519 case LPFC_IO:
13520 lpfc_sli4_io_xri_aborted(phba, wcqe, cq->hdwq);
13521 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13522 /* Notify aborted XRI for NVME work queue */
13523 if (phba->nvmet_support)
13524 lpfc_sli4_nvmet_xri_aborted(phba, wcqe);
13525 }
5e5b511d 13526 workposted = false;
4f774513 13527 break;
422c4cb7 13528 case LPFC_NVME_LS: /* NVME LS uses ELS resources */
4f774513 13529 case LPFC_ELS:
8a5ca109
JS
13530 cq_event = lpfc_cq_event_setup(
13531 phba, wcqe, sizeof(struct sli4_wcqe_xri_aborted));
13532 if (!cq_event)
13533 return false;
5e5b511d 13534 cq_event->hdwq = cq->hdwq;
4f774513
JS
13535 spin_lock_irqsave(&phba->hbalock, iflags);
13536 list_add_tail(&cq_event->list,
13537 &phba->sli4_hba.sp_els_xri_aborted_work_queue);
13538 /* Set the els xri abort event flag */
13539 phba->hba_flag |= ELS_XRI_ABORT_EVENT;
13540 spin_unlock_irqrestore(&phba->hbalock, iflags);
13541 workposted = true;
13542 break;
13543 default:
13544 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
318083ad
JS
13545 "0603 Invalid CQ subtype %d: "
13546 "%08x %08x %08x %08x\n",
13547 cq->subtype, wcqe->word0, wcqe->parameter,
13548 wcqe->word2, wcqe->word3);
4f774513
JS
13549 workposted = false;
13550 break;
13551 }
13552 return workposted;
13553}
13554
e817e5d7
JS
13555#define FC_RCTL_MDS_DIAGS 0xF4
13556
4f774513
JS
13557/**
13558 * lpfc_sli4_sp_handle_rcqe - Process a receive-queue completion queue entry
13559 * @phba: Pointer to HBA context object.
13560 * @rcqe: Pointer to receive-queue completion queue entry.
13561 *
13562 * This routine process a receive-queue completion queue entry.
13563 *
13564 * Return: true if work posted to worker thread, otherwise false.
13565 **/
13566static bool
4d9ab994 13567lpfc_sli4_sp_handle_rcqe(struct lpfc_hba *phba, struct lpfc_rcqe *rcqe)
4f774513 13568{
4f774513 13569 bool workposted = false;
e817e5d7 13570 struct fc_frame_header *fc_hdr;
4f774513
JS
13571 struct lpfc_queue *hrq = phba->sli4_hba.hdr_rq;
13572 struct lpfc_queue *drq = phba->sli4_hba.dat_rq;
547077a4 13573 struct lpfc_nvmet_tgtport *tgtp;
4f774513 13574 struct hbq_dmabuf *dma_buf;
7851fe2c 13575 uint32_t status, rq_id;
4f774513
JS
13576 unsigned long iflags;
13577
2e90f4b5
JS
13578 /* sanity check on queue memory */
13579 if (unlikely(!hrq) || unlikely(!drq))
13580 return workposted;
13581
7851fe2c
JS
13582 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13583 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13584 else
13585 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13586 if (rq_id != hrq->queue_id)
4f774513
JS
13587 goto out;
13588
4d9ab994 13589 status = bf_get(lpfc_rcqe_status, rcqe);
4f774513
JS
13590 switch (status) {
13591 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13592 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13593 "2537 Receive Frame Truncated!!\n");
5bd5f66c 13594 /* fall through */
4f774513
JS
13595 case FC_STATUS_RQ_SUCCESS:
13596 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13597 lpfc_sli4_rq_release(hrq, drq);
4f774513
JS
13598 dma_buf = lpfc_sli_hbqbuf_get(&phba->hbqs[0].hbq_buffer_list);
13599 if (!dma_buf) {
b84daac9 13600 hrq->RQ_no_buf_found++;
4f774513
JS
13601 spin_unlock_irqrestore(&phba->hbalock, iflags);
13602 goto out;
13603 }
b84daac9 13604 hrq->RQ_rcv_buf++;
547077a4 13605 hrq->RQ_buf_posted--;
4d9ab994 13606 memcpy(&dma_buf->cq_event.cqe.rcqe_cmpl, rcqe, sizeof(*rcqe));
895427bd 13607
e817e5d7
JS
13608 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13609
13610 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
13611 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
13612 spin_unlock_irqrestore(&phba->hbalock, iflags);
13613 /* Handle MDS Loopback frames */
13614 lpfc_sli4_handle_mds_loopback(phba->pport, dma_buf);
13615 break;
13616 }
13617
13618 /* save off the frame for the work thread to process */
4d9ab994 13619 list_add_tail(&dma_buf->cq_event.list,
45ed1190 13620 &phba->sli4_hba.sp_queue_event);
4f774513 13621 /* Frame received */
45ed1190 13622 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513
JS
13623 spin_unlock_irqrestore(&phba->hbalock, iflags);
13624 workposted = true;
13625 break;
4f774513 13626 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13627 if (phba->nvmet_support) {
13628 tgtp = phba->targetport->private;
13629 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13630 "6402 RQE Error x%x, posted %d err_cnt "
13631 "%d: %x %x %x\n",
13632 status, hrq->RQ_buf_posted,
13633 hrq->RQ_no_posted_buf,
13634 atomic_read(&tgtp->rcv_fcp_cmd_in),
13635 atomic_read(&tgtp->rcv_fcp_cmd_out),
13636 atomic_read(&tgtp->xmt_fcp_release));
13637 }
13638 /* fallthrough */
13639
13640 case FC_STATUS_INSUFF_BUF_NEED_BUF:
b84daac9 13641 hrq->RQ_no_posted_buf++;
4f774513
JS
13642 /* Post more buffers if possible */
13643 spin_lock_irqsave(&phba->hbalock, iflags);
13644 phba->hba_flag |= HBA_POST_RECEIVE_BUFFER;
13645 spin_unlock_irqrestore(&phba->hbalock, iflags);
13646 workposted = true;
13647 break;
13648 }
13649out:
13650 return workposted;
4f774513
JS
13651}
13652
4d9ab994
JS
13653/**
13654 * lpfc_sli4_sp_handle_cqe - Process a slow path completion queue entry
13655 * @phba: Pointer to HBA context object.
13656 * @cq: Pointer to the completion queue.
32517fc0 13657 * @cqe: Pointer to a completion queue entry.
4d9ab994 13658 *
25985edc 13659 * This routine process a slow-path work-queue or receive queue completion queue
4d9ab994
JS
13660 * entry.
13661 *
13662 * Return: true if work posted to worker thread, otherwise false.
13663 **/
13664static bool
13665lpfc_sli4_sp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13666 struct lpfc_cqe *cqe)
13667{
45ed1190 13668 struct lpfc_cqe cqevt;
4d9ab994
JS
13669 bool workposted = false;
13670
13671 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 13672 lpfc_sli4_pcimem_bcopy(cqe, &cqevt, sizeof(struct lpfc_cqe));
4d9ab994
JS
13673
13674 /* Check and process for different type of WCQE and dispatch */
45ed1190 13675 switch (bf_get(lpfc_cqe_code, &cqevt)) {
4d9ab994 13676 case CQE_CODE_COMPL_WQE:
45ed1190 13677 /* Process the WQ/RQ complete event */
bc73905a 13678 phba->last_completion_time = jiffies;
2a76a283 13679 workposted = lpfc_sli4_sp_handle_els_wcqe(phba, cq,
45ed1190 13680 (struct lpfc_wcqe_complete *)&cqevt);
4d9ab994
JS
13681 break;
13682 case CQE_CODE_RELEASE_WQE:
13683 /* Process the WQ release event */
13684 lpfc_sli4_sp_handle_rel_wcqe(phba,
45ed1190 13685 (struct lpfc_wcqe_release *)&cqevt);
4d9ab994
JS
13686 break;
13687 case CQE_CODE_XRI_ABORTED:
13688 /* Process the WQ XRI abort event */
bc73905a 13689 phba->last_completion_time = jiffies;
4d9ab994 13690 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
45ed1190 13691 (struct sli4_wcqe_xri_aborted *)&cqevt);
4d9ab994
JS
13692 break;
13693 case CQE_CODE_RECEIVE:
7851fe2c 13694 case CQE_CODE_RECEIVE_V1:
4d9ab994 13695 /* Process the RQ event */
bc73905a 13696 phba->last_completion_time = jiffies;
4d9ab994 13697 workposted = lpfc_sli4_sp_handle_rcqe(phba,
45ed1190 13698 (struct lpfc_rcqe *)&cqevt);
4d9ab994
JS
13699 break;
13700 default:
13701 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13702 "0388 Not a valid WCQE code: x%x\n",
45ed1190 13703 bf_get(lpfc_cqe_code, &cqevt));
4d9ab994
JS
13704 break;
13705 }
13706 return workposted;
13707}
13708
4f774513
JS
13709/**
13710 * lpfc_sli4_sp_handle_eqe - Process a slow-path event queue entry
13711 * @phba: Pointer to HBA context object.
13712 * @eqe: Pointer to fast-path event queue entry.
13713 *
13714 * This routine process a event queue entry from the slow-path event queue.
13715 * It will check the MajorCode and MinorCode to determine this is for a
13716 * completion event on a completion queue, if not, an error shall be logged
13717 * and just return. Otherwise, it will get to the corresponding completion
13718 * queue and process all the entries on that completion queue, rearm the
13719 * completion queue, and then return.
13720 *
13721 **/
f485c18d 13722static void
67d12733
JS
13723lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
13724 struct lpfc_queue *speq)
4f774513 13725{
67d12733 13726 struct lpfc_queue *cq = NULL, *childq;
4f774513 13727 uint16_t cqid;
86ee57a9 13728 int ret = 0;
4f774513 13729
4f774513 13730 /* Get the reference to the corresponding CQ */
cb5172ea 13731 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
4f774513 13732
4f774513
JS
13733 list_for_each_entry(childq, &speq->child_list, list) {
13734 if (childq->queue_id == cqid) {
13735 cq = childq;
13736 break;
13737 }
13738 }
13739 if (unlikely(!cq)) {
75baf696
JS
13740 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
13741 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13742 "0365 Slow-path CQ identifier "
13743 "(%d) does not exist\n", cqid);
f485c18d 13744 return;
4f774513
JS
13745 }
13746
895427bd
JS
13747 /* Save EQ associated with this CQ */
13748 cq->assoc_qp = speq;
13749
86ee57a9
DK
13750 if (is_kdump_kernel())
13751 ret = queue_work(phba->wq, &cq->spwork);
13752 else
13753 ret = queue_work_on(cq->chann, phba->wq, &cq->spwork);
13754
13755 if (!ret)
f485c18d
DK
13756 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13757 "0390 Cannot schedule soft IRQ "
13758 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
d6d189ce 13759 cqid, cq->queue_id, raw_smp_processor_id());
f485c18d
DK
13760}
13761
13762/**
32517fc0 13763 * __lpfc_sli4_process_cq - Process elements of a CQ
f485c18d 13764 * @phba: Pointer to HBA context object.
32517fc0
JS
13765 * @cq: Pointer to CQ to be processed
13766 * @handler: Routine to process each cqe
13767 * @delay: Pointer to usdelay to set in case of rescheduling of the handler
f485c18d 13768 *
32517fc0
JS
13769 * This routine processes completion queue entries in a CQ. While a valid
13770 * queue element is found, the handler is called. During processing checks
13771 * are made for periodic doorbell writes to let the hardware know of
13772 * element consumption.
13773 *
13774 * If the max limit on cqes to process is hit, or there are no more valid
13775 * entries, the loop stops. If we processed a sufficient number of elements,
13776 * meaning there is sufficient load, rather than rearming and generating
13777 * another interrupt, a cq rescheduling delay will be set. A delay of 0
13778 * indicates no rescheduling.
f485c18d 13779 *
32517fc0 13780 * Returns True if work scheduled, False otherwise.
f485c18d 13781 **/
32517fc0
JS
13782static bool
13783__lpfc_sli4_process_cq(struct lpfc_hba *phba, struct lpfc_queue *cq,
13784 bool (*handler)(struct lpfc_hba *, struct lpfc_queue *,
13785 struct lpfc_cqe *), unsigned long *delay)
f485c18d 13786{
f485c18d
DK
13787 struct lpfc_cqe *cqe;
13788 bool workposted = false;
32517fc0
JS
13789 int count = 0, consumed = 0;
13790 bool arm = true;
13791
13792 /* default - no reschedule */
13793 *delay = 0;
13794
13795 if (cmpxchg(&cq->queue_claimed, 0, 1) != 0)
13796 goto rearm_and_exit;
f485c18d 13797
4f774513 13798 /* Process all the entries to the CQ */
d74a89aa 13799 cq->q_flag = 0;
32517fc0
JS
13800 cqe = lpfc_sli4_cq_get(cq);
13801 while (cqe) {
32517fc0
JS
13802 workposted |= handler(phba, cq, cqe);
13803 __lpfc_sli4_consume_cqe(phba, cq, cqe);
13804
13805 consumed++;
13806 if (!(++count % cq->max_proc_limit))
13807 break;
13808
13809 if (!(count % cq->notify_interval)) {
13810 phba->sli4_hba.sli4_write_cq_db(phba, cq, consumed,
13811 LPFC_QUEUE_NOARM);
13812 consumed = 0;
8156d378 13813 cq->assoc_qp->q_flag |= HBA_EQ_DELAY_CHK;
32517fc0
JS
13814 }
13815
d74a89aa
JS
13816 if (count == LPFC_NVMET_CQ_NOTIFY)
13817 cq->q_flag |= HBA_NVMET_CQ_NOTIFY;
13818
32517fc0
JS
13819 cqe = lpfc_sli4_cq_get(cq);
13820 }
13821 if (count >= phba->cfg_cq_poll_threshold) {
13822 *delay = 1;
13823 arm = false;
13824 }
13825
13826 /* Track the max number of CQEs processed in 1 EQ */
13827 if (count > cq->CQ_max_cqe)
13828 cq->CQ_max_cqe = count;
13829
13830 cq->assoc_qp->EQ_cqe_cnt += count;
13831
13832 /* Catch the no cq entry condition */
13833 if (unlikely(count == 0))
13834 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13835 "0369 No entry from completion queue "
13836 "qid=%d\n", cq->queue_id);
13837
164ba8d2 13838 xchg(&cq->queue_claimed, 0);
32517fc0
JS
13839
13840rearm_and_exit:
13841 phba->sli4_hba.sli4_write_cq_db(phba, cq, consumed,
13842 arm ? LPFC_QUEUE_REARM : LPFC_QUEUE_NOARM);
13843
13844 return workposted;
13845}
13846
13847/**
13848 * lpfc_sli4_sp_process_cq - Process a slow-path event queue entry
13849 * @cq: pointer to CQ to process
13850 *
13851 * This routine calls the cq processing routine with a handler specific
13852 * to the type of queue bound to it.
13853 *
13854 * The CQ routine returns two values: the first is the calling status,
13855 * which indicates whether work was queued to the background discovery
13856 * thread. If true, the routine should wakeup the discovery thread;
13857 * the second is the delay parameter. If non-zero, rather than rearming
13858 * the CQ and yet another interrupt, the CQ handler should be queued so
13859 * that it is processed in a subsequent polling action. The value of
13860 * the delay indicates when to reschedule it.
13861 **/
13862static void
13863__lpfc_sli4_sp_process_cq(struct lpfc_queue *cq)
13864{
13865 struct lpfc_hba *phba = cq->phba;
13866 unsigned long delay;
13867 bool workposted = false;
86ee57a9 13868 int ret = 0;
32517fc0
JS
13869
13870 /* Process and rearm the CQ */
4f774513
JS
13871 switch (cq->type) {
13872 case LPFC_MCQ:
32517fc0
JS
13873 workposted |= __lpfc_sli4_process_cq(phba, cq,
13874 lpfc_sli4_sp_handle_mcqe,
13875 &delay);
4f774513
JS
13876 break;
13877 case LPFC_WCQ:
c00f62e6 13878 if (cq->subtype == LPFC_IO)
32517fc0
JS
13879 workposted |= __lpfc_sli4_process_cq(phba, cq,
13880 lpfc_sli4_fp_handle_cqe,
13881 &delay);
13882 else
13883 workposted |= __lpfc_sli4_process_cq(phba, cq,
13884 lpfc_sli4_sp_handle_cqe,
13885 &delay);
4f774513
JS
13886 break;
13887 default:
13888 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13889 "0370 Invalid completion queue type (%d)\n",
13890 cq->type);
f485c18d 13891 return;
4f774513
JS
13892 }
13893
32517fc0 13894 if (delay) {
86ee57a9
DK
13895 if (is_kdump_kernel())
13896 ret = queue_delayed_work(phba->wq, &cq->sched_spwork,
13897 delay);
13898 else
13899 ret = queue_delayed_work_on(cq->chann, phba->wq,
13900 &cq->sched_spwork, delay);
13901 if (!ret)
32517fc0
JS
13902 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13903 "0394 Cannot schedule soft IRQ "
13904 "for cqid=%d on CPU %d\n",
13905 cq->queue_id, cq->chann);
13906 }
4f774513
JS
13907
13908 /* wake up worker thread if there are works to be done */
13909 if (workposted)
13910 lpfc_worker_wake_up(phba);
13911}
13912
32517fc0
JS
13913/**
13914 * lpfc_sli4_sp_process_cq - slow-path work handler when started by
13915 * interrupt
13916 * @work: pointer to work element
13917 *
13918 * translates from the work handler and calls the slow-path handler.
13919 **/
13920static void
13921lpfc_sli4_sp_process_cq(struct work_struct *work)
13922{
13923 struct lpfc_queue *cq = container_of(work, struct lpfc_queue, spwork);
13924
13925 __lpfc_sli4_sp_process_cq(cq);
13926}
13927
13928/**
13929 * lpfc_sli4_dly_sp_process_cq - slow-path work handler when started by timer
13930 * @work: pointer to work element
13931 *
13932 * translates from the work handler and calls the slow-path handler.
13933 **/
13934static void
13935lpfc_sli4_dly_sp_process_cq(struct work_struct *work)
13936{
13937 struct lpfc_queue *cq = container_of(to_delayed_work(work),
13938 struct lpfc_queue, sched_spwork);
13939
13940 __lpfc_sli4_sp_process_cq(cq);
13941}
13942
4f774513
JS
13943/**
13944 * lpfc_sli4_fp_handle_fcp_wcqe - Process fast-path work queue completion entry
2a76a283
JS
13945 * @phba: Pointer to HBA context object.
13946 * @cq: Pointer to associated CQ
13947 * @wcqe: Pointer to work-queue completion queue entry.
4f774513
JS
13948 *
13949 * This routine process a fast-path work queue completion entry from fast-path
13950 * event queue for FCP command response completion.
13951 **/
13952static void
2a76a283 13953lpfc_sli4_fp_handle_fcp_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13954 struct lpfc_wcqe_complete *wcqe)
13955{
2a76a283 13956 struct lpfc_sli_ring *pring = cq->pring;
4f774513
JS
13957 struct lpfc_iocbq *cmdiocbq;
13958 struct lpfc_iocbq irspiocbq;
13959 unsigned long iflags;
13960
4f774513
JS
13961 /* Check for response status */
13962 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13963 /* If resource errors reported from HBA, reduce queue
13964 * depth of the SCSI device.
13965 */
e3d2b802
JS
13966 if (((bf_get(lpfc_wcqe_c_status, wcqe) ==
13967 IOSTAT_LOCAL_REJECT)) &&
13968 ((wcqe->parameter & IOERR_PARAM_MASK) ==
13969 IOERR_NO_RESOURCES))
4f774513 13970 phba->lpfc_rampdown_queue_depth(phba);
e3d2b802 13971
28ed7374 13972 /* Log the cmpl status */
11f0e34f 13973 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
28ed7374 13974 "0373 FCP CQE cmpl: status=x%x: "
11f0e34f 13975 "CQE: %08x %08x %08x %08x\n",
4f774513 13976 bf_get(lpfc_wcqe_c_status, wcqe),
11f0e34f
JS
13977 wcqe->word0, wcqe->total_data_placed,
13978 wcqe->parameter, wcqe->word3);
4f774513
JS
13979 }
13980
13981 /* Look up the FCP command IOCB and create pseudo response IOCB */
7e56aa25
JS
13982 spin_lock_irqsave(&pring->ring_lock, iflags);
13983 pring->stats.iocb_event++;
e2a8be56 13984 spin_unlock_irqrestore(&pring->ring_lock, iflags);
4f774513
JS
13985 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13986 bf_get(lpfc_wcqe_c_request_tag, wcqe));
4f774513
JS
13987 if (unlikely(!cmdiocbq)) {
13988 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13989 "0374 FCP complete with no corresponding "
13990 "cmdiocb: iotag (%d)\n",
13991 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13992 return;
13993 }
c8a4ce0b
DK
13994#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13995 cmdiocbq->isr_timestamp = cq->isr_timestamp;
13996#endif
895427bd
JS
13997 if (cmdiocbq->iocb_cmpl == NULL) {
13998 if (cmdiocbq->wqe_cmpl) {
13999 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
14000 spin_lock_irqsave(&phba->hbalock, iflags);
14001 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
14002 spin_unlock_irqrestore(&phba->hbalock, iflags);
14003 }
14004
14005 /* Pass the cmd_iocb and the wcqe to the upper layer */
14006 (cmdiocbq->wqe_cmpl)(phba, cmdiocbq, wcqe);
14007 return;
14008 }
4f774513
JS
14009 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14010 "0375 FCP cmdiocb not callback function "
14011 "iotag: (%d)\n",
14012 bf_get(lpfc_wcqe_c_request_tag, wcqe));
14013 return;
14014 }
14015
14016 /* Fake the irspiocb and copy necessary response information */
341af102 14017 lpfc_sli4_iocb_param_transfer(phba, &irspiocbq, cmdiocbq, wcqe);
4f774513 14018
0f65ff68
JS
14019 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
14020 spin_lock_irqsave(&phba->hbalock, iflags);
14021 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
14022 spin_unlock_irqrestore(&phba->hbalock, iflags);
14023 }
14024
4f774513
JS
14025 /* Pass the cmd_iocb and the rsp state to the upper layer */
14026 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, &irspiocbq);
14027}
14028
14029/**
14030 * lpfc_sli4_fp_handle_rel_wcqe - Handle fast-path WQ entry consumed event
14031 * @phba: Pointer to HBA context object.
14032 * @cq: Pointer to completion queue.
14033 * @wcqe: Pointer to work-queue completion queue entry.
14034 *
3f8b6fb7 14035 * This routine handles an fast-path WQ entry consumed event by invoking the
4f774513
JS
14036 * proper WQ release routine to the slow-path WQ.
14037 **/
14038static void
14039lpfc_sli4_fp_handle_rel_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
14040 struct lpfc_wcqe_release *wcqe)
14041{
14042 struct lpfc_queue *childwq;
14043 bool wqid_matched = false;
895427bd 14044 uint16_t hba_wqid;
4f774513
JS
14045
14046 /* Check for fast-path FCP work queue release */
895427bd 14047 hba_wqid = bf_get(lpfc_wcqe_r_wq_id, wcqe);
4f774513 14048 list_for_each_entry(childwq, &cq->child_list, list) {
895427bd 14049 if (childwq->queue_id == hba_wqid) {
4f774513
JS
14050 lpfc_sli4_wq_release(childwq,
14051 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
6e8e1c14
JS
14052 if (childwq->q_flag & HBA_NVMET_WQFULL)
14053 lpfc_nvmet_wqfull_process(phba, childwq);
4f774513
JS
14054 wqid_matched = true;
14055 break;
14056 }
14057 }
14058 /* Report warning log message if no match found */
14059 if (wqid_matched != true)
14060 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14061 "2580 Fast-path wqe consume event carries "
895427bd 14062 "miss-matched qid: wcqe-qid=x%x\n", hba_wqid);
4f774513
JS
14063}
14064
14065/**
2d7dbc4c
JS
14066 * lpfc_sli4_nvmet_handle_rcqe - Process a receive-queue completion queue entry
14067 * @phba: Pointer to HBA context object.
14068 * @rcqe: Pointer to receive-queue completion queue entry.
4f774513 14069 *
2d7dbc4c
JS
14070 * This routine process a receive-queue completion queue entry.
14071 *
14072 * Return: true if work posted to worker thread, otherwise false.
14073 **/
14074static bool
14075lpfc_sli4_nvmet_handle_rcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
14076 struct lpfc_rcqe *rcqe)
14077{
14078 bool workposted = false;
14079 struct lpfc_queue *hrq;
14080 struct lpfc_queue *drq;
14081 struct rqb_dmabuf *dma_buf;
14082 struct fc_frame_header *fc_hdr;
547077a4 14083 struct lpfc_nvmet_tgtport *tgtp;
2d7dbc4c
JS
14084 uint32_t status, rq_id;
14085 unsigned long iflags;
14086 uint32_t fctl, idx;
14087
14088 if ((phba->nvmet_support == 0) ||
14089 (phba->sli4_hba.nvmet_cqset == NULL))
14090 return workposted;
14091
14092 idx = cq->queue_id - phba->sli4_hba.nvmet_cqset[0]->queue_id;
14093 hrq = phba->sli4_hba.nvmet_mrq_hdr[idx];
14094 drq = phba->sli4_hba.nvmet_mrq_data[idx];
14095
14096 /* sanity check on queue memory */
14097 if (unlikely(!hrq) || unlikely(!drq))
14098 return workposted;
14099
14100 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
14101 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
14102 else
14103 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
14104
14105 if ((phba->nvmet_support == 0) ||
14106 (rq_id != hrq->queue_id))
14107 return workposted;
14108
14109 status = bf_get(lpfc_rcqe_status, rcqe);
14110 switch (status) {
14111 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
14112 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14113 "6126 Receive Frame Truncated!!\n");
5bd5f66c 14114 /* fall through */
2d7dbc4c 14115 case FC_STATUS_RQ_SUCCESS:
2d7dbc4c 14116 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 14117 lpfc_sli4_rq_release(hrq, drq);
2d7dbc4c
JS
14118 dma_buf = lpfc_sli_rqbuf_get(phba, hrq);
14119 if (!dma_buf) {
14120 hrq->RQ_no_buf_found++;
14121 spin_unlock_irqrestore(&phba->hbalock, iflags);
14122 goto out;
14123 }
14124 spin_unlock_irqrestore(&phba->hbalock, iflags);
14125 hrq->RQ_rcv_buf++;
547077a4 14126 hrq->RQ_buf_posted--;
2d7dbc4c
JS
14127 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
14128
14129 /* Just some basic sanity checks on FCP Command frame */
14130 fctl = (fc_hdr->fh_f_ctl[0] << 16 |
3a8070c5
JS
14131 fc_hdr->fh_f_ctl[1] << 8 |
14132 fc_hdr->fh_f_ctl[2]);
2d7dbc4c
JS
14133 if (((fctl &
14134 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) !=
14135 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) ||
14136 (fc_hdr->fh_seq_cnt != 0)) /* 0 byte swapped is still 0 */
14137 goto drop;
14138
14139 if (fc_hdr->fh_type == FC_TYPE_FCP) {
d74a89aa 14140 dma_buf->bytes_recv = bf_get(lpfc_rcqe_length, rcqe);
d613b6a7 14141 lpfc_nvmet_unsol_fcp_event(
d74a89aa
JS
14142 phba, idx, dma_buf, cq->isr_timestamp,
14143 cq->q_flag & HBA_NVMET_CQ_NOTIFY);
2d7dbc4c
JS
14144 return false;
14145 }
14146drop:
22b738ac 14147 lpfc_rq_buf_free(phba, &dma_buf->hbuf);
2d7dbc4c 14148 break;
2d7dbc4c 14149 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
14150 if (phba->nvmet_support) {
14151 tgtp = phba->targetport->private;
14152 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
14153 "6401 RQE Error x%x, posted %d err_cnt "
14154 "%d: %x %x %x\n",
14155 status, hrq->RQ_buf_posted,
14156 hrq->RQ_no_posted_buf,
14157 atomic_read(&tgtp->rcv_fcp_cmd_in),
14158 atomic_read(&tgtp->rcv_fcp_cmd_out),
14159 atomic_read(&tgtp->xmt_fcp_release));
14160 }
14161 /* fallthrough */
14162
14163 case FC_STATUS_INSUFF_BUF_NEED_BUF:
2d7dbc4c
JS
14164 hrq->RQ_no_posted_buf++;
14165 /* Post more buffers if possible */
2d7dbc4c
JS
14166 break;
14167 }
14168out:
14169 return workposted;
14170}
14171
4f774513 14172/**
895427bd 14173 * lpfc_sli4_fp_handle_cqe - Process fast-path work queue completion entry
32517fc0 14174 * @phba: adapter with cq
4f774513
JS
14175 * @cq: Pointer to the completion queue.
14176 * @eqe: Pointer to fast-path completion queue entry.
14177 *
14178 * This routine process a fast-path work queue completion entry from fast-path
14179 * event queue for FCP command response completion.
32517fc0
JS
14180 *
14181 * Return: true if work posted to worker thread, otherwise false.
4f774513 14182 **/
32517fc0 14183static bool
895427bd 14184lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
14185 struct lpfc_cqe *cqe)
14186{
14187 struct lpfc_wcqe_release wcqe;
14188 bool workposted = false;
14189
14190 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 14191 lpfc_sli4_pcimem_bcopy(cqe, &wcqe, sizeof(struct lpfc_cqe));
4f774513
JS
14192
14193 /* Check and process for different type of WCQE and dispatch */
14194 switch (bf_get(lpfc_wcqe_c_code, &wcqe)) {
14195 case CQE_CODE_COMPL_WQE:
895427bd 14196 case CQE_CODE_NVME_ERSP:
b84daac9 14197 cq->CQ_wq++;
4f774513 14198 /* Process the WQ complete event */
98fc5dd9 14199 phba->last_completion_time = jiffies;
c00f62e6 14200 if (cq->subtype == LPFC_IO || cq->subtype == LPFC_NVME_LS)
895427bd 14201 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
4f774513
JS
14202 (struct lpfc_wcqe_complete *)&wcqe);
14203 break;
14204 case CQE_CODE_RELEASE_WQE:
b84daac9 14205 cq->CQ_release_wqe++;
4f774513
JS
14206 /* Process the WQ release event */
14207 lpfc_sli4_fp_handle_rel_wcqe(phba, cq,
14208 (struct lpfc_wcqe_release *)&wcqe);
14209 break;
14210 case CQE_CODE_XRI_ABORTED:
b84daac9 14211 cq->CQ_xri_aborted++;
4f774513 14212 /* Process the WQ XRI abort event */
bc73905a 14213 phba->last_completion_time = jiffies;
4f774513
JS
14214 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
14215 (struct sli4_wcqe_xri_aborted *)&wcqe);
14216 break;
895427bd
JS
14217 case CQE_CODE_RECEIVE_V1:
14218 case CQE_CODE_RECEIVE:
14219 phba->last_completion_time = jiffies;
2d7dbc4c
JS
14220 if (cq->subtype == LPFC_NVMET) {
14221 workposted = lpfc_sli4_nvmet_handle_rcqe(
14222 phba, cq, (struct lpfc_rcqe *)&wcqe);
14223 }
895427bd 14224 break;
4f774513
JS
14225 default:
14226 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 14227 "0144 Not a valid CQE code: x%x\n",
4f774513
JS
14228 bf_get(lpfc_wcqe_c_code, &wcqe));
14229 break;
14230 }
14231 return workposted;
14232}
14233
14234/**
67d12733 14235 * lpfc_sli4_hba_handle_eqe - Process a fast-path event queue entry
4f774513
JS
14236 * @phba: Pointer to HBA context object.
14237 * @eqe: Pointer to fast-path event queue entry.
14238 *
14239 * This routine process a event queue entry from the fast-path event queue.
14240 * It will check the MajorCode and MinorCode to determine this is for a
14241 * completion event on a completion queue, if not, an error shall be logged
14242 * and just return. Otherwise, it will get to the corresponding completion
14243 * queue and process all the entries on the completion queue, rearm the
14244 * completion queue, and then return.
14245 **/
f485c18d 14246static void
32517fc0
JS
14247lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba, struct lpfc_queue *eq,
14248 struct lpfc_eqe *eqe)
4f774513 14249{
895427bd 14250 struct lpfc_queue *cq = NULL;
32517fc0 14251 uint32_t qidx = eq->hdwq;
2d7dbc4c 14252 uint16_t cqid, id;
86ee57a9 14253 int ret = 0;
4f774513 14254
cb5172ea 14255 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
4f774513 14256 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
67d12733 14257 "0366 Not a valid completion "
4f774513 14258 "event: majorcode=x%x, minorcode=x%x\n",
cb5172ea
JS
14259 bf_get_le32(lpfc_eqe_major_code, eqe),
14260 bf_get_le32(lpfc_eqe_minor_code, eqe));
f485c18d 14261 return;
4f774513
JS
14262 }
14263
67d12733
JS
14264 /* Get the reference to the corresponding CQ */
14265 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
14266
6a828b0f
JS
14267 /* Use the fast lookup method first */
14268 if (cqid <= phba->sli4_hba.cq_max) {
14269 cq = phba->sli4_hba.cq_lookup[cqid];
14270 if (cq)
14271 goto work_cq;
cdb42bec
JS
14272 }
14273
14274 /* Next check for NVMET completion */
2d7dbc4c
JS
14275 if (phba->cfg_nvmet_mrq && phba->sli4_hba.nvmet_cqset) {
14276 id = phba->sli4_hba.nvmet_cqset[0]->queue_id;
14277 if ((cqid >= id) && (cqid < (id + phba->cfg_nvmet_mrq))) {
14278 /* Process NVMET unsol rcv */
14279 cq = phba->sli4_hba.nvmet_cqset[cqid - id];
14280 goto process_cq;
14281 }
67d12733
JS
14282 }
14283
895427bd
JS
14284 if (phba->sli4_hba.nvmels_cq &&
14285 (cqid == phba->sli4_hba.nvmels_cq->queue_id)) {
14286 /* Process NVME unsol rcv */
14287 cq = phba->sli4_hba.nvmels_cq;
14288 }
14289
14290 /* Otherwise this is a Slow path event */
14291 if (cq == NULL) {
cdb42bec
JS
14292 lpfc_sli4_sp_handle_eqe(phba, eqe,
14293 phba->sli4_hba.hdwq[qidx].hba_eq);
f485c18d 14294 return;
4f774513
JS
14295 }
14296
895427bd 14297process_cq:
4f774513
JS
14298 if (unlikely(cqid != cq->queue_id)) {
14299 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14300 "0368 Miss-matched fast-path completion "
14301 "queue identifier: eqcqid=%d, fcpcqid=%d\n",
14302 cqid, cq->queue_id);
f485c18d 14303 return;
4f774513
JS
14304 }
14305
6a828b0f 14306work_cq:
d74a89aa
JS
14307#if defined(CONFIG_SCSI_LPFC_DEBUG_FS)
14308 if (phba->ktime_on)
14309 cq->isr_timestamp = ktime_get_ns();
14310 else
14311 cq->isr_timestamp = 0;
14312#endif
86ee57a9
DK
14313 if (is_kdump_kernel())
14314 ret = queue_work(phba->wq, &cq->irqwork);
14315 else
14316 ret = queue_work_on(cq->chann, phba->wq, &cq->irqwork);
14317 if (!ret)
f485c18d
DK
14318 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14319 "0363 Cannot schedule soft IRQ "
14320 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
d6d189ce 14321 cqid, cq->queue_id, raw_smp_processor_id());
f485c18d
DK
14322}
14323
14324/**
32517fc0
JS
14325 * __lpfc_sli4_hba_process_cq - Process a fast-path event queue entry
14326 * @cq: Pointer to CQ to be processed
f485c18d 14327 *
32517fc0
JS
14328 * This routine calls the cq processing routine with the handler for
14329 * fast path CQEs.
14330 *
14331 * The CQ routine returns two values: the first is the calling status,
14332 * which indicates whether work was queued to the background discovery
14333 * thread. If true, the routine should wakeup the discovery thread;
14334 * the second is the delay parameter. If non-zero, rather than rearming
14335 * the CQ and yet another interrupt, the CQ handler should be queued so
14336 * that it is processed in a subsequent polling action. The value of
14337 * the delay indicates when to reschedule it.
f485c18d
DK
14338 **/
14339static void
32517fc0 14340__lpfc_sli4_hba_process_cq(struct lpfc_queue *cq)
f485c18d 14341{
f485c18d 14342 struct lpfc_hba *phba = cq->phba;
32517fc0 14343 unsigned long delay;
f485c18d 14344 bool workposted = false;
86ee57a9 14345 int ret = 0;
f485c18d 14346
32517fc0
JS
14347 /* process and rearm the CQ */
14348 workposted |= __lpfc_sli4_process_cq(phba, cq, lpfc_sli4_fp_handle_cqe,
14349 &delay);
4f774513 14350
32517fc0 14351 if (delay) {
86ee57a9
DK
14352 if (is_kdump_kernel())
14353 ret = queue_delayed_work(phba->wq, &cq->sched_irqwork,
14354 delay);
14355 else
14356 ret = queue_delayed_work_on(cq->chann, phba->wq,
14357 &cq->sched_irqwork, delay);
14358 if (!ret)
32517fc0
JS
14359 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14360 "0367 Cannot schedule soft IRQ "
14361 "for cqid=%d on CPU %d\n",
14362 cq->queue_id, cq->chann);
14363 }
4f774513
JS
14364
14365 /* wake up worker thread if there are works to be done */
14366 if (workposted)
14367 lpfc_worker_wake_up(phba);
14368}
14369
1ba981fd 14370/**
32517fc0
JS
14371 * lpfc_sli4_hba_process_cq - fast-path work handler when started by
14372 * interrupt
14373 * @work: pointer to work element
1ba981fd 14374 *
32517fc0 14375 * translates from the work handler and calls the fast-path handler.
1ba981fd
JS
14376 **/
14377static void
32517fc0 14378lpfc_sli4_hba_process_cq(struct work_struct *work)
1ba981fd 14379{
32517fc0 14380 struct lpfc_queue *cq = container_of(work, struct lpfc_queue, irqwork);
1ba981fd 14381
32517fc0 14382 __lpfc_sli4_hba_process_cq(cq);
1ba981fd
JS
14383}
14384
14385/**
32517fc0
JS
14386 * lpfc_sli4_hba_process_cq - fast-path work handler when started by timer
14387 * @work: pointer to work element
1ba981fd 14388 *
32517fc0 14389 * translates from the work handler and calls the fast-path handler.
1ba981fd 14390 **/
32517fc0
JS
14391static void
14392lpfc_sli4_dly_hba_process_cq(struct work_struct *work)
1ba981fd 14393{
32517fc0
JS
14394 struct lpfc_queue *cq = container_of(to_delayed_work(work),
14395 struct lpfc_queue, sched_irqwork);
1ba981fd 14396
32517fc0 14397 __lpfc_sli4_hba_process_cq(cq);
1ba981fd
JS
14398}
14399
4f774513 14400/**
67d12733 14401 * lpfc_sli4_hba_intr_handler - HBA interrupt handler to SLI-4 device
4f774513
JS
14402 * @irq: Interrupt number.
14403 * @dev_id: The device context pointer.
14404 *
14405 * This function is directly called from the PCI layer as an interrupt
14406 * service routine when device with SLI-4 interface spec is enabled with
14407 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
14408 * ring event in the HBA. However, when the device is enabled with either
14409 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
14410 * device-level interrupt handler. When the PCI slot is in error recovery
14411 * or the HBA is undergoing initialization, the interrupt handler will not
14412 * process the interrupt. The SCSI FCP fast-path ring event are handled in
14413 * the intrrupt context. This function is called without any lock held.
14414 * It gets the hbalock to access and update SLI data structures. Note that,
14415 * the FCP EQ to FCP CQ are one-to-one map such that the FCP EQ index is
14416 * equal to that of FCP CQ index.
14417 *
67d12733
JS
14418 * The link attention and ELS ring attention events are handled
14419 * by the worker thread. The interrupt handler signals the worker thread
14420 * and returns for these events. This function is called without any lock
14421 * held. It gets the hbalock to access and update SLI data structures.
14422 *
4f774513
JS
14423 * This function returns IRQ_HANDLED when interrupt is handled else it
14424 * returns IRQ_NONE.
14425 **/
14426irqreturn_t
67d12733 14427lpfc_sli4_hba_intr_handler(int irq, void *dev_id)
4f774513
JS
14428{
14429 struct lpfc_hba *phba;
895427bd 14430 struct lpfc_hba_eq_hdl *hba_eq_hdl;
4f774513 14431 struct lpfc_queue *fpeq;
4f774513
JS
14432 unsigned long iflag;
14433 int ecount = 0;
895427bd 14434 int hba_eqidx;
32517fc0 14435 struct lpfc_eq_intr_info *eqi;
4f774513
JS
14436
14437 /* Get the driver's phba structure from the dev_id */
895427bd
JS
14438 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
14439 phba = hba_eq_hdl->phba;
14440 hba_eqidx = hba_eq_hdl->idx;
4f774513
JS
14441
14442 if (unlikely(!phba))
14443 return IRQ_NONE;
cdb42bec 14444 if (unlikely(!phba->sli4_hba.hdwq))
5350d872 14445 return IRQ_NONE;
4f774513
JS
14446
14447 /* Get to the EQ struct associated with this vector */
657add4e 14448 fpeq = phba->sli4_hba.hba_eq_hdl[hba_eqidx].eq;
2e90f4b5
JS
14449 if (unlikely(!fpeq))
14450 return IRQ_NONE;
4f774513
JS
14451
14452 /* Check device state for handling interrupt */
14453 if (unlikely(lpfc_intr_state_check(phba))) {
14454 /* Check again for link_state with lock held */
14455 spin_lock_irqsave(&phba->hbalock, iflag);
14456 if (phba->link_state < LPFC_LINK_DOWN)
14457 /* Flush, clear interrupt, and rearm the EQ */
24c7c0a6 14458 lpfc_sli4_eqcq_flush(phba, fpeq);
4f774513
JS
14459 spin_unlock_irqrestore(&phba->hbalock, iflag);
14460 return IRQ_NONE;
14461 }
14462
a7fc071a
DK
14463 eqi = this_cpu_ptr(phba->sli4_hba.eq_info);
14464 eqi->icnt++;
14465
d6d189ce 14466 fpeq->last_cpu = raw_smp_processor_id();
4f774513 14467
a7fc071a 14468 if (eqi->icnt > LPFC_EQD_ISR_TRIGGER &&
8156d378 14469 fpeq->q_flag & HBA_EQ_DELAY_CHK &&
32517fc0
JS
14470 phba->cfg_auto_imax &&
14471 fpeq->q_mode != LPFC_MAX_AUTO_EQ_DELAY &&
14472 phba->sli.sli_flag & LPFC_SLI_USE_EQDR)
14473 lpfc_sli4_mod_hba_eq_delay(phba, fpeq, LPFC_MAX_AUTO_EQ_DELAY);
b84daac9 14474
32517fc0 14475 /* process and rearm the EQ */
93a4d6f4 14476 ecount = lpfc_sli4_process_eq(phba, fpeq, LPFC_QUEUE_REARM);
4f774513
JS
14477
14478 if (unlikely(ecount == 0)) {
b84daac9 14479 fpeq->EQ_no_entry++;
4f774513
JS
14480 if (phba->intr_type == MSIX)
14481 /* MSI-X treated interrupt served as no EQ share INT */
14482 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14483 "0358 MSI-X interrupt with no EQE\n");
14484 else
14485 /* Non MSI-X treated on interrupt as EQ share INT */
14486 return IRQ_NONE;
14487 }
14488
14489 return IRQ_HANDLED;
14490} /* lpfc_sli4_fp_intr_handler */
14491
14492/**
14493 * lpfc_sli4_intr_handler - Device-level interrupt handler for SLI-4 device
14494 * @irq: Interrupt number.
14495 * @dev_id: The device context pointer.
14496 *
14497 * This function is the device-level interrupt handler to device with SLI-4
14498 * interface spec, called from the PCI layer when either MSI or Pin-IRQ
14499 * interrupt mode is enabled and there is an event in the HBA which requires
14500 * driver attention. This function invokes the slow-path interrupt attention
14501 * handling function and fast-path interrupt attention handling function in
14502 * turn to process the relevant HBA attention events. This function is called
14503 * without any lock held. It gets the hbalock to access and update SLI data
14504 * structures.
14505 *
14506 * This function returns IRQ_HANDLED when interrupt is handled, else it
14507 * returns IRQ_NONE.
14508 **/
14509irqreturn_t
14510lpfc_sli4_intr_handler(int irq, void *dev_id)
14511{
14512 struct lpfc_hba *phba;
67d12733
JS
14513 irqreturn_t hba_irq_rc;
14514 bool hba_handled = false;
895427bd 14515 int qidx;
4f774513
JS
14516
14517 /* Get the driver's phba structure from the dev_id */
14518 phba = (struct lpfc_hba *)dev_id;
14519
14520 if (unlikely(!phba))
14521 return IRQ_NONE;
14522
4f774513
JS
14523 /*
14524 * Invoke fast-path host attention interrupt handling as appropriate.
14525 */
6a828b0f 14526 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
67d12733 14527 hba_irq_rc = lpfc_sli4_hba_intr_handler(irq,
895427bd 14528 &phba->sli4_hba.hba_eq_hdl[qidx]);
67d12733
JS
14529 if (hba_irq_rc == IRQ_HANDLED)
14530 hba_handled |= true;
4f774513
JS
14531 }
14532
67d12733 14533 return (hba_handled == true) ? IRQ_HANDLED : IRQ_NONE;
4f774513
JS
14534} /* lpfc_sli4_intr_handler */
14535
93a4d6f4
JS
14536void lpfc_sli4_poll_hbtimer(struct timer_list *t)
14537{
14538 struct lpfc_hba *phba = from_timer(phba, t, cpuhp_poll_timer);
14539 struct lpfc_queue *eq;
14540 int i = 0;
14541
14542 rcu_read_lock();
14543
14544 list_for_each_entry_rcu(eq, &phba->poll_list, _poll_list)
14545 i += lpfc_sli4_poll_eq(eq, LPFC_POLL_SLOWPATH);
14546 if (!list_empty(&phba->poll_list))
14547 mod_timer(&phba->cpuhp_poll_timer,
14548 jiffies + msecs_to_jiffies(LPFC_POLL_HB));
14549
14550 rcu_read_unlock();
14551}
14552
14553inline int lpfc_sli4_poll_eq(struct lpfc_queue *eq, uint8_t path)
14554{
14555 struct lpfc_hba *phba = eq->phba;
14556 int i = 0;
14557
14558 /*
14559 * Unlocking an irq is one of the entry point to check
14560 * for re-schedule, but we are good for io submission
14561 * path as midlayer does a get_cpu to glue us in. Flush
14562 * out the invalidate queue so we can see the updated
14563 * value for flag.
14564 */
14565 smp_rmb();
14566
14567 if (READ_ONCE(eq->mode) == LPFC_EQ_POLL)
14568 /* We will not likely get the completion for the caller
14569 * during this iteration but i guess that's fine.
14570 * Future io's coming on this eq should be able to
14571 * pick it up. As for the case of single io's, they
14572 * will be handled through a sched from polling timer
14573 * function which is currently triggered every 1msec.
14574 */
14575 i = lpfc_sli4_process_eq(phba, eq, LPFC_QUEUE_NOARM);
14576
14577 return i;
14578}
14579
14580static inline void lpfc_sli4_add_to_poll_list(struct lpfc_queue *eq)
14581{
14582 struct lpfc_hba *phba = eq->phba;
14583
f861f596
JS
14584 /* kickstart slowpath processing if needed */
14585 if (list_empty(&phba->poll_list))
93a4d6f4
JS
14586 mod_timer(&phba->cpuhp_poll_timer,
14587 jiffies + msecs_to_jiffies(LPFC_POLL_HB));
93a4d6f4
JS
14588
14589 list_add_rcu(&eq->_poll_list, &phba->poll_list);
14590 synchronize_rcu();
14591}
14592
14593static inline void lpfc_sli4_remove_from_poll_list(struct lpfc_queue *eq)
14594{
14595 struct lpfc_hba *phba = eq->phba;
14596
14597 /* Disable slowpath processing for this eq. Kick start the eq
14598 * by RE-ARMING the eq's ASAP
14599 */
14600 list_del_rcu(&eq->_poll_list);
14601 synchronize_rcu();
14602
14603 if (list_empty(&phba->poll_list))
14604 del_timer_sync(&phba->cpuhp_poll_timer);
14605}
14606
d480e578 14607void lpfc_sli4_cleanup_poll_list(struct lpfc_hba *phba)
93a4d6f4
JS
14608{
14609 struct lpfc_queue *eq, *next;
14610
14611 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list)
14612 list_del(&eq->_poll_list);
14613
14614 INIT_LIST_HEAD(&phba->poll_list);
14615 synchronize_rcu();
14616}
14617
14618static inline void
14619__lpfc_sli4_switch_eqmode(struct lpfc_queue *eq, uint8_t mode)
14620{
14621 if (mode == eq->mode)
14622 return;
14623 /*
14624 * currently this function is only called during a hotplug
14625 * event and the cpu on which this function is executing
14626 * is going offline. By now the hotplug has instructed
14627 * the scheduler to remove this cpu from cpu active mask.
14628 * So we don't need to work about being put aside by the
14629 * scheduler for a high priority process. Yes, the inte-
14630 * rrupts could come but they are known to retire ASAP.
14631 */
14632
14633 /* Disable polling in the fastpath */
14634 WRITE_ONCE(eq->mode, mode);
14635 /* flush out the store buffer */
14636 smp_wmb();
14637
14638 /*
14639 * Add this eq to the polling list and start polling. For
14640 * a grace period both interrupt handler and poller will
14641 * try to process the eq _but_ that's fine. We have a
14642 * synchronization mechanism in place (queue_claimed) to
14643 * deal with it. This is just a draining phase for int-
14644 * errupt handler (not eq's) as we have guranteed through
14645 * barrier that all the CPUs have seen the new CQ_POLLED
14646 * state. which will effectively disable the REARMING of
14647 * the EQ. The whole idea is eq's die off eventually as
14648 * we are not rearming EQ's anymore.
14649 */
14650 mode ? lpfc_sli4_add_to_poll_list(eq) :
14651 lpfc_sli4_remove_from_poll_list(eq);
14652}
14653
14654void lpfc_sli4_start_polling(struct lpfc_queue *eq)
14655{
14656 __lpfc_sli4_switch_eqmode(eq, LPFC_EQ_POLL);
14657}
14658
14659void lpfc_sli4_stop_polling(struct lpfc_queue *eq)
14660{
14661 struct lpfc_hba *phba = eq->phba;
14662
14663 __lpfc_sli4_switch_eqmode(eq, LPFC_EQ_INTERRUPT);
14664
14665 /* Kick start for the pending io's in h/w.
14666 * Once we switch back to interrupt processing on a eq
14667 * the io path completion will only arm eq's when it
14668 * receives a completion. But since eq's are in disa-
14669 * rmed state it doesn't receive a completion. This
14670 * creates a deadlock scenaro.
14671 */
14672 phba->sli4_hba.sli4_write_eq_db(phba, eq, 0, LPFC_QUEUE_REARM);
14673}
14674
4f774513
JS
14675/**
14676 * lpfc_sli4_queue_free - free a queue structure and associated memory
14677 * @queue: The queue structure to free.
14678 *
b595076a 14679 * This function frees a queue structure and the DMAable memory used for
4f774513
JS
14680 * the host resident queue. This function must be called after destroying the
14681 * queue on the HBA.
14682 **/
14683void
14684lpfc_sli4_queue_free(struct lpfc_queue *queue)
14685{
14686 struct lpfc_dmabuf *dmabuf;
14687
14688 if (!queue)
14689 return;
14690
4645f7b5
JS
14691 if (!list_empty(&queue->wq_list))
14692 list_del(&queue->wq_list);
14693
4f774513
JS
14694 while (!list_empty(&queue->page_list)) {
14695 list_remove_head(&queue->page_list, dmabuf, struct lpfc_dmabuf,
14696 list);
81b96eda 14697 dma_free_coherent(&queue->phba->pcidev->dev, queue->page_size,
4f774513
JS
14698 dmabuf->virt, dmabuf->phys);
14699 kfree(dmabuf);
14700 }
895427bd
JS
14701 if (queue->rqbp) {
14702 lpfc_free_rq_buffer(queue->phba, queue);
14703 kfree(queue->rqbp);
14704 }
d1f525aa 14705
32517fc0
JS
14706 if (!list_empty(&queue->cpu_list))
14707 list_del(&queue->cpu_list);
14708
4f774513
JS
14709 kfree(queue);
14710 return;
14711}
14712
14713/**
14714 * lpfc_sli4_queue_alloc - Allocate and initialize a queue structure
14715 * @phba: The HBA that this queue is being created on.
81b96eda 14716 * @page_size: The size of a queue page
4f774513
JS
14717 * @entry_size: The size of each queue entry for this queue.
14718 * @entry count: The number of entries that this queue will handle.
c1a21ebc 14719 * @cpu: The cpu that will primarily utilize this queue.
4f774513
JS
14720 *
14721 * This function allocates a queue structure and the DMAable memory used for
14722 * the host resident queue. This function must be called before creating the
14723 * queue on the HBA.
14724 **/
14725struct lpfc_queue *
81b96eda 14726lpfc_sli4_queue_alloc(struct lpfc_hba *phba, uint32_t page_size,
c1a21ebc 14727 uint32_t entry_size, uint32_t entry_count, int cpu)
4f774513
JS
14728{
14729 struct lpfc_queue *queue;
14730 struct lpfc_dmabuf *dmabuf;
cb5172ea 14731 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
9afbee3d 14732 uint16_t x, pgcnt;
4f774513 14733
cb5172ea 14734 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 14735 hw_page_size = page_size;
cb5172ea 14736
9afbee3d
JS
14737 pgcnt = ALIGN(entry_size * entry_count, hw_page_size) / hw_page_size;
14738
14739 /* If needed, Adjust page count to match the max the adapter supports */
14740 if (pgcnt > phba->sli4_hba.pc_sli4_params.wqpcnt)
14741 pgcnt = phba->sli4_hba.pc_sli4_params.wqpcnt;
14742
c1a21ebc
JS
14743 queue = kzalloc_node(sizeof(*queue) + (sizeof(void *) * pgcnt),
14744 GFP_KERNEL, cpu_to_node(cpu));
4f774513
JS
14745 if (!queue)
14746 return NULL;
895427bd 14747
4f774513 14748 INIT_LIST_HEAD(&queue->list);
93a4d6f4 14749 INIT_LIST_HEAD(&queue->_poll_list);
895427bd 14750 INIT_LIST_HEAD(&queue->wq_list);
6e8e1c14 14751 INIT_LIST_HEAD(&queue->wqfull_list);
4f774513
JS
14752 INIT_LIST_HEAD(&queue->page_list);
14753 INIT_LIST_HEAD(&queue->child_list);
32517fc0 14754 INIT_LIST_HEAD(&queue->cpu_list);
81b96eda
JS
14755
14756 /* Set queue parameters now. If the system cannot provide memory
14757 * resources, the free routine needs to know what was allocated.
14758 */
9afbee3d
JS
14759 queue->page_count = pgcnt;
14760 queue->q_pgs = (void **)&queue[1];
14761 queue->entry_cnt_per_pg = hw_page_size / entry_size;
81b96eda
JS
14762 queue->entry_size = entry_size;
14763 queue->entry_count = entry_count;
14764 queue->page_size = hw_page_size;
14765 queue->phba = phba;
14766
9afbee3d 14767 for (x = 0; x < queue->page_count; x++) {
c1a21ebc
JS
14768 dmabuf = kzalloc_node(sizeof(*dmabuf), GFP_KERNEL,
14769 dev_to_node(&phba->pcidev->dev));
4f774513
JS
14770 if (!dmabuf)
14771 goto out_fail;
750afb08
LC
14772 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
14773 hw_page_size, &dmabuf->phys,
14774 GFP_KERNEL);
4f774513
JS
14775 if (!dmabuf->virt) {
14776 kfree(dmabuf);
14777 goto out_fail;
14778 }
14779 dmabuf->buffer_tag = x;
14780 list_add_tail(&dmabuf->list, &queue->page_list);
9afbee3d
JS
14781 /* use lpfc_sli4_qe to index a paritcular entry in this page */
14782 queue->q_pgs[x] = dmabuf->virt;
4f774513 14783 }
f485c18d
DK
14784 INIT_WORK(&queue->irqwork, lpfc_sli4_hba_process_cq);
14785 INIT_WORK(&queue->spwork, lpfc_sli4_sp_process_cq);
32517fc0
JS
14786 INIT_DELAYED_WORK(&queue->sched_irqwork, lpfc_sli4_dly_hba_process_cq);
14787 INIT_DELAYED_WORK(&queue->sched_spwork, lpfc_sli4_dly_sp_process_cq);
4f774513 14788
32517fc0 14789 /* notify_interval will be set during q creation */
64eb4dcb 14790
4f774513
JS
14791 return queue;
14792out_fail:
14793 lpfc_sli4_queue_free(queue);
14794 return NULL;
14795}
14796
962bc51b
JS
14797/**
14798 * lpfc_dual_chute_pci_bar_map - Map pci base address register to host memory
14799 * @phba: HBA structure that indicates port to create a queue on.
14800 * @pci_barset: PCI BAR set flag.
14801 *
14802 * This function shall perform iomap of the specified PCI BAR address to host
14803 * memory address if not already done so and return it. The returned host
14804 * memory address can be NULL.
14805 */
14806static void __iomem *
14807lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset)
14808{
962bc51b
JS
14809 if (!phba->pcidev)
14810 return NULL;
962bc51b
JS
14811
14812 switch (pci_barset) {
14813 case WQ_PCI_BAR_0_AND_1:
962bc51b
JS
14814 return phba->pci_bar0_memmap_p;
14815 case WQ_PCI_BAR_2_AND_3:
962bc51b
JS
14816 return phba->pci_bar2_memmap_p;
14817 case WQ_PCI_BAR_4_AND_5:
962bc51b
JS
14818 return phba->pci_bar4_memmap_p;
14819 default:
14820 break;
14821 }
14822 return NULL;
14823}
14824
173edbb2 14825/**
cb733e35
JS
14826 * lpfc_modify_hba_eq_delay - Modify Delay Multiplier on EQs
14827 * @phba: HBA structure that EQs are on.
14828 * @startq: The starting EQ index to modify
14829 * @numq: The number of EQs (consecutive indexes) to modify
14830 * @usdelay: amount of delay
173edbb2 14831 *
cb733e35
JS
14832 * This function revises the EQ delay on 1 or more EQs. The EQ delay
14833 * is set either by writing to a register (if supported by the SLI Port)
14834 * or by mailbox command. The mailbox command allows several EQs to be
14835 * updated at once.
173edbb2 14836 *
cb733e35
JS
14837 * The @phba struct is used to send a mailbox command to HBA. The @startq
14838 * is used to get the starting EQ index to change. The @numq value is
14839 * used to specify how many consecutive EQ indexes, starting at EQ index,
14840 * are to be changed. This function is asynchronous and will wait for any
14841 * mailbox commands to finish before returning.
173edbb2 14842 *
cb733e35
JS
14843 * On success this function will return a zero. If unable to allocate
14844 * enough memory this function will return -ENOMEM. If a mailbox command
14845 * fails this function will return -ENXIO. Note: on ENXIO, some EQs may
14846 * have had their delay multipler changed.
173edbb2 14847 **/
cb733e35 14848void
0cf07f84 14849lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
cb733e35 14850 uint32_t numq, uint32_t usdelay)
173edbb2
JS
14851{
14852 struct lpfc_mbx_modify_eq_delay *eq_delay;
14853 LPFC_MBOXQ_t *mbox;
14854 struct lpfc_queue *eq;
cb733e35 14855 int cnt = 0, rc, length;
173edbb2 14856 uint32_t shdr_status, shdr_add_status;
cb733e35 14857 uint32_t dmult;
895427bd 14858 int qidx;
173edbb2 14859 union lpfc_sli4_cfg_shdr *shdr;
173edbb2 14860
6a828b0f 14861 if (startq >= phba->cfg_irq_chann)
cb733e35
JS
14862 return;
14863
14864 if (usdelay > 0xFFFF) {
14865 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP | LOG_NVME,
14866 "6429 usdelay %d too large. Scaled down to "
14867 "0xFFFF.\n", usdelay);
14868 usdelay = 0xFFFF;
14869 }
14870
14871 /* set values by EQ_DELAY register if supported */
14872 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
14873 for (qidx = startq; qidx < phba->cfg_irq_chann; qidx++) {
657add4e 14874 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
cb733e35
JS
14875 if (!eq)
14876 continue;
14877
32517fc0 14878 lpfc_sli4_mod_hba_eq_delay(phba, eq, usdelay);
cb733e35
JS
14879
14880 if (++cnt >= numq)
14881 break;
14882 }
cb733e35
JS
14883 return;
14884 }
14885
14886 /* Otherwise, set values by mailbox cmd */
173edbb2
JS
14887
14888 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
cb733e35
JS
14889 if (!mbox) {
14890 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_FCP | LOG_NVME,
14891 "6428 Failed allocating mailbox cmd buffer."
14892 " EQ delay was not set.\n");
14893 return;
14894 }
173edbb2
JS
14895 length = (sizeof(struct lpfc_mbx_modify_eq_delay) -
14896 sizeof(struct lpfc_sli4_cfg_mhdr));
14897 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14898 LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY,
14899 length, LPFC_SLI4_MBX_EMBED);
14900 eq_delay = &mbox->u.mqe.un.eq_delay;
14901
14902 /* Calculate delay multiper from maximum interrupt per second */
cb733e35
JS
14903 dmult = (usdelay * LPFC_DMULT_CONST) / LPFC_SEC_TO_USEC;
14904 if (dmult)
14905 dmult--;
0cf07f84
JS
14906 if (dmult > LPFC_DMULT_MAX)
14907 dmult = LPFC_DMULT_MAX;
173edbb2 14908
6a828b0f 14909 for (qidx = startq; qidx < phba->cfg_irq_chann; qidx++) {
657add4e 14910 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
173edbb2
JS
14911 if (!eq)
14912 continue;
cb733e35 14913 eq->q_mode = usdelay;
173edbb2
JS
14914 eq_delay->u.request.eq[cnt].eq_id = eq->queue_id;
14915 eq_delay->u.request.eq[cnt].phase = 0;
14916 eq_delay->u.request.eq[cnt].delay_multi = dmult;
0cf07f84 14917
cb733e35 14918 if (++cnt >= numq)
173edbb2
JS
14919 break;
14920 }
14921 eq_delay->u.request.num_eq = cnt;
14922
14923 mbox->vport = phba->pport;
14924 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
14925 mbox->ctx_buf = NULL;
14926 mbox->ctx_ndlp = NULL;
173edbb2
JS
14927 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14928 shdr = (union lpfc_sli4_cfg_shdr *) &eq_delay->header.cfg_shdr;
14929 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14930 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14931 if (shdr_status || shdr_add_status || rc) {
14932 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14933 "2512 MODIFY_EQ_DELAY mailbox failed with "
14934 "status x%x add_status x%x, mbx status x%x\n",
14935 shdr_status, shdr_add_status, rc);
173edbb2
JS
14936 }
14937 mempool_free(mbox, phba->mbox_mem_pool);
cb733e35 14938 return;
173edbb2
JS
14939}
14940
4f774513
JS
14941/**
14942 * lpfc_eq_create - Create an Event Queue on the HBA
14943 * @phba: HBA structure that indicates port to create a queue on.
14944 * @eq: The queue structure to use to create the event queue.
14945 * @imax: The maximum interrupt per second limit.
14946 *
14947 * This function creates an event queue, as detailed in @eq, on a port,
14948 * described by @phba by sending an EQ_CREATE mailbox command to the HBA.
14949 *
14950 * The @phba struct is used to send mailbox command to HBA. The @eq struct
14951 * is used to get the entry count and entry size that are necessary to
14952 * determine the number of pages to allocate and use for this queue. This
14953 * function will send the EQ_CREATE mailbox command to the HBA to setup the
14954 * event queue. This function is asynchronous and will wait for the mailbox
14955 * command to finish before continuing.
14956 *
14957 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14958 * memory this function will return -ENOMEM. If the queue create mailbox command
14959 * fails this function will return -ENXIO.
4f774513 14960 **/
a2fc4aef 14961int
ee02006b 14962lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
4f774513
JS
14963{
14964 struct lpfc_mbx_eq_create *eq_create;
14965 LPFC_MBOXQ_t *mbox;
14966 int rc, length, status = 0;
14967 struct lpfc_dmabuf *dmabuf;
14968 uint32_t shdr_status, shdr_add_status;
14969 union lpfc_sli4_cfg_shdr *shdr;
14970 uint16_t dmult;
49198b37
JS
14971 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14972
2e90f4b5
JS
14973 /* sanity check on queue memory */
14974 if (!eq)
14975 return -ENODEV;
49198b37
JS
14976 if (!phba->sli4_hba.pc_sli4_params.supported)
14977 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
14978
14979 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14980 if (!mbox)
14981 return -ENOMEM;
14982 length = (sizeof(struct lpfc_mbx_eq_create) -
14983 sizeof(struct lpfc_sli4_cfg_mhdr));
14984 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14985 LPFC_MBOX_OPCODE_EQ_CREATE,
14986 length, LPFC_SLI4_MBX_EMBED);
14987 eq_create = &mbox->u.mqe.un.eq_create;
7365f6fd 14988 shdr = (union lpfc_sli4_cfg_shdr *) &eq_create->header.cfg_shdr;
4f774513
JS
14989 bf_set(lpfc_mbx_eq_create_num_pages, &eq_create->u.request,
14990 eq->page_count);
14991 bf_set(lpfc_eq_context_size, &eq_create->u.request.context,
14992 LPFC_EQE_SIZE);
14993 bf_set(lpfc_eq_context_valid, &eq_create->u.request.context, 1);
7365f6fd
JS
14994
14995 /* Use version 2 of CREATE_EQ if eqav is set */
14996 if (phba->sli4_hba.pc_sli4_params.eqav) {
14997 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14998 LPFC_Q_CREATE_VERSION_2);
14999 bf_set(lpfc_eq_context_autovalid, &eq_create->u.request.context,
15000 phba->sli4_hba.pc_sli4_params.eqav);
15001 }
15002
2c9c5a00
JS
15003 /* don't setup delay multiplier using EQ_CREATE */
15004 dmult = 0;
4f774513
JS
15005 bf_set(lpfc_eq_context_delay_multi, &eq_create->u.request.context,
15006 dmult);
15007 switch (eq->entry_count) {
15008 default:
15009 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15010 "0360 Unsupported EQ count. (%d)\n",
15011 eq->entry_count);
04d210c9
JS
15012 if (eq->entry_count < 256) {
15013 status = -EINVAL;
15014 goto out;
15015 }
5bd5f66c 15016 /* fall through - otherwise default to smallest count */
4f774513
JS
15017 case 256:
15018 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
15019 LPFC_EQ_CNT_256);
15020 break;
15021 case 512:
15022 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
15023 LPFC_EQ_CNT_512);
15024 break;
15025 case 1024:
15026 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
15027 LPFC_EQ_CNT_1024);
15028 break;
15029 case 2048:
15030 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
15031 LPFC_EQ_CNT_2048);
15032 break;
15033 case 4096:
15034 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
15035 LPFC_EQ_CNT_4096);
15036 break;
15037 }
15038 list_for_each_entry(dmabuf, &eq->page_list, list) {
49198b37 15039 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
15040 eq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15041 putPaddrLow(dmabuf->phys);
15042 eq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15043 putPaddrHigh(dmabuf->phys);
15044 }
15045 mbox->vport = phba->pport;
15046 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
15047 mbox->ctx_buf = NULL;
15048 mbox->ctx_ndlp = NULL;
4f774513 15049 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
4f774513
JS
15050 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15051 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15052 if (shdr_status || shdr_add_status || rc) {
15053 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15054 "2500 EQ_CREATE mailbox failed with "
15055 "status x%x add_status x%x, mbx status x%x\n",
15056 shdr_status, shdr_add_status, rc);
15057 status = -ENXIO;
15058 }
15059 eq->type = LPFC_EQ;
15060 eq->subtype = LPFC_NONE;
15061 eq->queue_id = bf_get(lpfc_mbx_eq_create_q_id, &eq_create->u.response);
15062 if (eq->queue_id == 0xFFFF)
15063 status = -ENXIO;
15064 eq->host_index = 0;
32517fc0
JS
15065 eq->notify_interval = LPFC_EQ_NOTIFY_INTRVL;
15066 eq->max_proc_limit = LPFC_EQ_MAX_PROC_LIMIT;
04d210c9 15067out:
8fa38513 15068 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15069 return status;
15070}
15071
15072/**
15073 * lpfc_cq_create - Create a Completion Queue on the HBA
15074 * @phba: HBA structure that indicates port to create a queue on.
15075 * @cq: The queue structure to use to create the completion queue.
15076 * @eq: The event queue to bind this completion queue to.
15077 *
15078 * This function creates a completion queue, as detailed in @wq, on a port,
15079 * described by @phba by sending a CQ_CREATE mailbox command to the HBA.
15080 *
15081 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15082 * is used to get the entry count and entry size that are necessary to
15083 * determine the number of pages to allocate and use for this queue. The @eq
15084 * is used to indicate which event queue to bind this completion queue to. This
15085 * function will send the CQ_CREATE mailbox command to the HBA to setup the
15086 * completion queue. This function is asynchronous and will wait for the mailbox
15087 * command to finish before continuing.
15088 *
15089 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15090 * memory this function will return -ENOMEM. If the queue create mailbox command
15091 * fails this function will return -ENXIO.
4f774513 15092 **/
a2fc4aef 15093int
4f774513
JS
15094lpfc_cq_create(struct lpfc_hba *phba, struct lpfc_queue *cq,
15095 struct lpfc_queue *eq, uint32_t type, uint32_t subtype)
15096{
15097 struct lpfc_mbx_cq_create *cq_create;
15098 struct lpfc_dmabuf *dmabuf;
15099 LPFC_MBOXQ_t *mbox;
15100 int rc, length, status = 0;
15101 uint32_t shdr_status, shdr_add_status;
15102 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15103
2e90f4b5
JS
15104 /* sanity check on queue memory */
15105 if (!cq || !eq)
15106 return -ENODEV;
49198b37 15107
4f774513
JS
15108 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15109 if (!mbox)
15110 return -ENOMEM;
15111 length = (sizeof(struct lpfc_mbx_cq_create) -
15112 sizeof(struct lpfc_sli4_cfg_mhdr));
15113 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15114 LPFC_MBOX_OPCODE_CQ_CREATE,
15115 length, LPFC_SLI4_MBX_EMBED);
15116 cq_create = &mbox->u.mqe.un.cq_create;
5a6f133e 15117 shdr = (union lpfc_sli4_cfg_shdr *) &cq_create->header.cfg_shdr;
4f774513
JS
15118 bf_set(lpfc_mbx_cq_create_num_pages, &cq_create->u.request,
15119 cq->page_count);
15120 bf_set(lpfc_cq_context_event, &cq_create->u.request.context, 1);
15121 bf_set(lpfc_cq_context_valid, &cq_create->u.request.context, 1);
5a6f133e
JS
15122 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15123 phba->sli4_hba.pc_sli4_params.cqv);
15124 if (phba->sli4_hba.pc_sli4_params.cqv == LPFC_Q_CREATE_VERSION_2) {
81b96eda
JS
15125 bf_set(lpfc_mbx_cq_create_page_size, &cq_create->u.request,
15126 (cq->page_size / SLI4_PAGE_SIZE));
5a6f133e
JS
15127 bf_set(lpfc_cq_eq_id_2, &cq_create->u.request.context,
15128 eq->queue_id);
7365f6fd
JS
15129 bf_set(lpfc_cq_context_autovalid, &cq_create->u.request.context,
15130 phba->sli4_hba.pc_sli4_params.cqav);
5a6f133e
JS
15131 } else {
15132 bf_set(lpfc_cq_eq_id, &cq_create->u.request.context,
15133 eq->queue_id);
15134 }
4f774513 15135 switch (cq->entry_count) {
81b96eda
JS
15136 case 2048:
15137 case 4096:
15138 if (phba->sli4_hba.pc_sli4_params.cqv ==
15139 LPFC_Q_CREATE_VERSION_2) {
15140 cq_create->u.request.context.lpfc_cq_context_count =
15141 cq->entry_count;
15142 bf_set(lpfc_cq_context_count,
15143 &cq_create->u.request.context,
15144 LPFC_CQ_CNT_WORD7);
15145 break;
15146 }
5bd5f66c 15147 /* fall through */
4f774513
JS
15148 default:
15149 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2ea259ee 15150 "0361 Unsupported CQ count: "
64eb4dcb 15151 "entry cnt %d sz %d pg cnt %d\n",
2ea259ee 15152 cq->entry_count, cq->entry_size,
64eb4dcb 15153 cq->page_count);
4f4c1863
JS
15154 if (cq->entry_count < 256) {
15155 status = -EINVAL;
15156 goto out;
15157 }
5bd5f66c 15158 /* fall through - otherwise default to smallest count */
4f774513
JS
15159 case 256:
15160 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
15161 LPFC_CQ_CNT_256);
15162 break;
15163 case 512:
15164 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
15165 LPFC_CQ_CNT_512);
15166 break;
15167 case 1024:
15168 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
15169 LPFC_CQ_CNT_1024);
15170 break;
15171 }
15172 list_for_each_entry(dmabuf, &cq->page_list, list) {
81b96eda 15173 memset(dmabuf->virt, 0, cq->page_size);
4f774513
JS
15174 cq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15175 putPaddrLow(dmabuf->phys);
15176 cq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15177 putPaddrHigh(dmabuf->phys);
15178 }
15179 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15180
15181 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15182 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15183 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15184 if (shdr_status || shdr_add_status || rc) {
15185 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15186 "2501 CQ_CREATE mailbox failed with "
15187 "status x%x add_status x%x, mbx status x%x\n",
15188 shdr_status, shdr_add_status, rc);
15189 status = -ENXIO;
15190 goto out;
15191 }
15192 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
15193 if (cq->queue_id == 0xFFFF) {
15194 status = -ENXIO;
15195 goto out;
15196 }
15197 /* link the cq onto the parent eq child list */
15198 list_add_tail(&cq->list, &eq->child_list);
15199 /* Set up completion queue's type and subtype */
15200 cq->type = type;
15201 cq->subtype = subtype;
15202 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
2a622bfb 15203 cq->assoc_qid = eq->queue_id;
6a828b0f 15204 cq->assoc_qp = eq;
4f774513 15205 cq->host_index = 0;
32517fc0
JS
15206 cq->notify_interval = LPFC_CQ_NOTIFY_INTRVL;
15207 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit, cq->entry_count);
4f774513 15208
6a828b0f
JS
15209 if (cq->queue_id > phba->sli4_hba.cq_max)
15210 phba->sli4_hba.cq_max = cq->queue_id;
8fa38513
JS
15211out:
15212 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15213 return status;
15214}
15215
2d7dbc4c
JS
15216/**
15217 * lpfc_cq_create_set - Create a set of Completion Queues on the HBA for MRQ
15218 * @phba: HBA structure that indicates port to create a queue on.
15219 * @cqp: The queue structure array to use to create the completion queues.
cdb42bec 15220 * @hdwq: The hardware queue array with the EQ to bind completion queues to.
2d7dbc4c
JS
15221 *
15222 * This function creates a set of completion queue, s to support MRQ
15223 * as detailed in @cqp, on a port,
15224 * described by @phba by sending a CREATE_CQ_SET mailbox command to the HBA.
15225 *
15226 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15227 * is used to get the entry count and entry size that are necessary to
15228 * determine the number of pages to allocate and use for this queue. The @eq
15229 * is used to indicate which event queue to bind this completion queue to. This
15230 * function will send the CREATE_CQ_SET mailbox command to the HBA to setup the
15231 * completion queue. This function is asynchronous and will wait for the mailbox
15232 * command to finish before continuing.
15233 *
15234 * On success this function will return a zero. If unable to allocate enough
15235 * memory this function will return -ENOMEM. If the queue create mailbox command
15236 * fails this function will return -ENXIO.
15237 **/
15238int
15239lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
cdb42bec
JS
15240 struct lpfc_sli4_hdw_queue *hdwq, uint32_t type,
15241 uint32_t subtype)
2d7dbc4c
JS
15242{
15243 struct lpfc_queue *cq;
15244 struct lpfc_queue *eq;
15245 struct lpfc_mbx_cq_create_set *cq_set;
15246 struct lpfc_dmabuf *dmabuf;
15247 LPFC_MBOXQ_t *mbox;
15248 int rc, length, alloclen, status = 0;
15249 int cnt, idx, numcq, page_idx = 0;
15250 uint32_t shdr_status, shdr_add_status;
15251 union lpfc_sli4_cfg_shdr *shdr;
15252 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
15253
15254 /* sanity check on queue memory */
15255 numcq = phba->cfg_nvmet_mrq;
cdb42bec 15256 if (!cqp || !hdwq || !numcq)
2d7dbc4c 15257 return -ENODEV;
2d7dbc4c
JS
15258
15259 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15260 if (!mbox)
15261 return -ENOMEM;
15262
15263 length = sizeof(struct lpfc_mbx_cq_create_set);
15264 length += ((numcq * cqp[0]->page_count) *
15265 sizeof(struct dma_address));
15266 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15267 LPFC_MBOX_OPCODE_FCOE_CQ_CREATE_SET, length,
15268 LPFC_SLI4_MBX_NEMBED);
15269 if (alloclen < length) {
15270 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15271 "3098 Allocated DMA memory size (%d) is "
15272 "less than the requested DMA memory size "
15273 "(%d)\n", alloclen, length);
15274 status = -ENOMEM;
15275 goto out;
15276 }
15277 cq_set = mbox->sge_array->addr[0];
15278 shdr = (union lpfc_sli4_cfg_shdr *)&cq_set->cfg_shdr;
15279 bf_set(lpfc_mbox_hdr_version, &shdr->request, 0);
15280
15281 for (idx = 0; idx < numcq; idx++) {
15282 cq = cqp[idx];
cdb42bec 15283 eq = hdwq[idx].hba_eq;
2d7dbc4c
JS
15284 if (!cq || !eq) {
15285 status = -ENOMEM;
15286 goto out;
15287 }
81b96eda
JS
15288 if (!phba->sli4_hba.pc_sli4_params.supported)
15289 hw_page_size = cq->page_size;
2d7dbc4c
JS
15290
15291 switch (idx) {
15292 case 0:
15293 bf_set(lpfc_mbx_cq_create_set_page_size,
15294 &cq_set->u.request,
15295 (hw_page_size / SLI4_PAGE_SIZE));
15296 bf_set(lpfc_mbx_cq_create_set_num_pages,
15297 &cq_set->u.request, cq->page_count);
15298 bf_set(lpfc_mbx_cq_create_set_evt,
15299 &cq_set->u.request, 1);
15300 bf_set(lpfc_mbx_cq_create_set_valid,
15301 &cq_set->u.request, 1);
15302 bf_set(lpfc_mbx_cq_create_set_cqe_size,
15303 &cq_set->u.request, 0);
15304 bf_set(lpfc_mbx_cq_create_set_num_cq,
15305 &cq_set->u.request, numcq);
7365f6fd
JS
15306 bf_set(lpfc_mbx_cq_create_set_autovalid,
15307 &cq_set->u.request,
15308 phba->sli4_hba.pc_sli4_params.cqav);
2d7dbc4c 15309 switch (cq->entry_count) {
81b96eda
JS
15310 case 2048:
15311 case 4096:
15312 if (phba->sli4_hba.pc_sli4_params.cqv ==
15313 LPFC_Q_CREATE_VERSION_2) {
15314 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15315 &cq_set->u.request,
15316 cq->entry_count);
15317 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15318 &cq_set->u.request,
15319 LPFC_CQ_CNT_WORD7);
15320 break;
15321 }
5bd5f66c 15322 /* fall through */
2d7dbc4c
JS
15323 default:
15324 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15325 "3118 Bad CQ count. (%d)\n",
15326 cq->entry_count);
15327 if (cq->entry_count < 256) {
15328 status = -EINVAL;
15329 goto out;
15330 }
5bd5f66c 15331 /* fall through - otherwise default to smallest */
2d7dbc4c
JS
15332 case 256:
15333 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15334 &cq_set->u.request, LPFC_CQ_CNT_256);
15335 break;
15336 case 512:
15337 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15338 &cq_set->u.request, LPFC_CQ_CNT_512);
15339 break;
15340 case 1024:
15341 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
15342 &cq_set->u.request, LPFC_CQ_CNT_1024);
15343 break;
15344 }
15345 bf_set(lpfc_mbx_cq_create_set_eq_id0,
15346 &cq_set->u.request, eq->queue_id);
15347 break;
15348 case 1:
15349 bf_set(lpfc_mbx_cq_create_set_eq_id1,
15350 &cq_set->u.request, eq->queue_id);
15351 break;
15352 case 2:
15353 bf_set(lpfc_mbx_cq_create_set_eq_id2,
15354 &cq_set->u.request, eq->queue_id);
15355 break;
15356 case 3:
15357 bf_set(lpfc_mbx_cq_create_set_eq_id3,
15358 &cq_set->u.request, eq->queue_id);
15359 break;
15360 case 4:
15361 bf_set(lpfc_mbx_cq_create_set_eq_id4,
15362 &cq_set->u.request, eq->queue_id);
15363 break;
15364 case 5:
15365 bf_set(lpfc_mbx_cq_create_set_eq_id5,
15366 &cq_set->u.request, eq->queue_id);
15367 break;
15368 case 6:
15369 bf_set(lpfc_mbx_cq_create_set_eq_id6,
15370 &cq_set->u.request, eq->queue_id);
15371 break;
15372 case 7:
15373 bf_set(lpfc_mbx_cq_create_set_eq_id7,
15374 &cq_set->u.request, eq->queue_id);
15375 break;
15376 case 8:
15377 bf_set(lpfc_mbx_cq_create_set_eq_id8,
15378 &cq_set->u.request, eq->queue_id);
15379 break;
15380 case 9:
15381 bf_set(lpfc_mbx_cq_create_set_eq_id9,
15382 &cq_set->u.request, eq->queue_id);
15383 break;
15384 case 10:
15385 bf_set(lpfc_mbx_cq_create_set_eq_id10,
15386 &cq_set->u.request, eq->queue_id);
15387 break;
15388 case 11:
15389 bf_set(lpfc_mbx_cq_create_set_eq_id11,
15390 &cq_set->u.request, eq->queue_id);
15391 break;
15392 case 12:
15393 bf_set(lpfc_mbx_cq_create_set_eq_id12,
15394 &cq_set->u.request, eq->queue_id);
15395 break;
15396 case 13:
15397 bf_set(lpfc_mbx_cq_create_set_eq_id13,
15398 &cq_set->u.request, eq->queue_id);
15399 break;
15400 case 14:
15401 bf_set(lpfc_mbx_cq_create_set_eq_id14,
15402 &cq_set->u.request, eq->queue_id);
15403 break;
15404 case 15:
15405 bf_set(lpfc_mbx_cq_create_set_eq_id15,
15406 &cq_set->u.request, eq->queue_id);
15407 break;
15408 }
15409
15410 /* link the cq onto the parent eq child list */
15411 list_add_tail(&cq->list, &eq->child_list);
15412 /* Set up completion queue's type and subtype */
15413 cq->type = type;
15414 cq->subtype = subtype;
15415 cq->assoc_qid = eq->queue_id;
6a828b0f 15416 cq->assoc_qp = eq;
2d7dbc4c 15417 cq->host_index = 0;
32517fc0
JS
15418 cq->notify_interval = LPFC_CQ_NOTIFY_INTRVL;
15419 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit,
15420 cq->entry_count);
81b96eda 15421 cq->chann = idx;
2d7dbc4c
JS
15422
15423 rc = 0;
15424 list_for_each_entry(dmabuf, &cq->page_list, list) {
15425 memset(dmabuf->virt, 0, hw_page_size);
15426 cnt = page_idx + dmabuf->buffer_tag;
15427 cq_set->u.request.page[cnt].addr_lo =
15428 putPaddrLow(dmabuf->phys);
15429 cq_set->u.request.page[cnt].addr_hi =
15430 putPaddrHigh(dmabuf->phys);
15431 rc++;
15432 }
15433 page_idx += rc;
15434 }
15435
15436 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15437
15438 /* The IOCTL status is embedded in the mailbox subheader. */
15439 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15440 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15441 if (shdr_status || shdr_add_status || rc) {
15442 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15443 "3119 CQ_CREATE_SET mailbox failed with "
15444 "status x%x add_status x%x, mbx status x%x\n",
15445 shdr_status, shdr_add_status, rc);
15446 status = -ENXIO;
15447 goto out;
15448 }
15449 rc = bf_get(lpfc_mbx_cq_create_set_base_id, &cq_set->u.response);
15450 if (rc == 0xFFFF) {
15451 status = -ENXIO;
15452 goto out;
15453 }
15454
15455 for (idx = 0; idx < numcq; idx++) {
15456 cq = cqp[idx];
15457 cq->queue_id = rc + idx;
6a828b0f
JS
15458 if (cq->queue_id > phba->sli4_hba.cq_max)
15459 phba->sli4_hba.cq_max = cq->queue_id;
2d7dbc4c
JS
15460 }
15461
15462out:
15463 lpfc_sli4_mbox_cmd_free(phba, mbox);
15464 return status;
15465}
15466
b19a061a
JS
15467/**
15468 * lpfc_mq_create_fb_init - Send MCC_CREATE without async events registration
15469 * @phba: HBA structure that indicates port to create a queue on.
15470 * @mq: The queue structure to use to create the mailbox queue.
15471 * @mbox: An allocated pointer to type LPFC_MBOXQ_t
15472 * @cq: The completion queue to associate with this cq.
15473 *
15474 * This function provides failback (fb) functionality when the
15475 * mq_create_ext fails on older FW generations. It's purpose is identical
15476 * to mq_create_ext otherwise.
15477 *
15478 * This routine cannot fail as all attributes were previously accessed and
15479 * initialized in mq_create_ext.
15480 **/
15481static void
15482lpfc_mq_create_fb_init(struct lpfc_hba *phba, struct lpfc_queue *mq,
15483 LPFC_MBOXQ_t *mbox, struct lpfc_queue *cq)
15484{
15485 struct lpfc_mbx_mq_create *mq_create;
15486 struct lpfc_dmabuf *dmabuf;
15487 int length;
15488
15489 length = (sizeof(struct lpfc_mbx_mq_create) -
15490 sizeof(struct lpfc_sli4_cfg_mhdr));
15491 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15492 LPFC_MBOX_OPCODE_MQ_CREATE,
15493 length, LPFC_SLI4_MBX_EMBED);
15494 mq_create = &mbox->u.mqe.un.mq_create;
15495 bf_set(lpfc_mbx_mq_create_num_pages, &mq_create->u.request,
15496 mq->page_count);
15497 bf_set(lpfc_mq_context_cq_id, &mq_create->u.request.context,
15498 cq->queue_id);
15499 bf_set(lpfc_mq_context_valid, &mq_create->u.request.context, 1);
15500 switch (mq->entry_count) {
15501 case 16:
5a6f133e
JS
15502 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15503 LPFC_MQ_RING_SIZE_16);
b19a061a
JS
15504 break;
15505 case 32:
5a6f133e
JS
15506 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15507 LPFC_MQ_RING_SIZE_32);
b19a061a
JS
15508 break;
15509 case 64:
5a6f133e
JS
15510 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15511 LPFC_MQ_RING_SIZE_64);
b19a061a
JS
15512 break;
15513 case 128:
5a6f133e
JS
15514 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15515 LPFC_MQ_RING_SIZE_128);
b19a061a
JS
15516 break;
15517 }
15518 list_for_each_entry(dmabuf, &mq->page_list, list) {
15519 mq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15520 putPaddrLow(dmabuf->phys);
15521 mq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15522 putPaddrHigh(dmabuf->phys);
15523 }
15524}
15525
04c68496
JS
15526/**
15527 * lpfc_mq_create - Create a mailbox Queue on the HBA
15528 * @phba: HBA structure that indicates port to create a queue on.
15529 * @mq: The queue structure to use to create the mailbox queue.
b19a061a
JS
15530 * @cq: The completion queue to associate with this cq.
15531 * @subtype: The queue's subtype.
04c68496
JS
15532 *
15533 * This function creates a mailbox queue, as detailed in @mq, on a port,
15534 * described by @phba by sending a MQ_CREATE mailbox command to the HBA.
15535 *
15536 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15537 * is used to get the entry count and entry size that are necessary to
15538 * determine the number of pages to allocate and use for this queue. This
15539 * function will send the MQ_CREATE mailbox command to the HBA to setup the
15540 * mailbox queue. This function is asynchronous and will wait for the mailbox
15541 * command to finish before continuing.
15542 *
15543 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15544 * memory this function will return -ENOMEM. If the queue create mailbox command
15545 * fails this function will return -ENXIO.
04c68496 15546 **/
b19a061a 15547int32_t
04c68496
JS
15548lpfc_mq_create(struct lpfc_hba *phba, struct lpfc_queue *mq,
15549 struct lpfc_queue *cq, uint32_t subtype)
15550{
15551 struct lpfc_mbx_mq_create *mq_create;
b19a061a 15552 struct lpfc_mbx_mq_create_ext *mq_create_ext;
04c68496
JS
15553 struct lpfc_dmabuf *dmabuf;
15554 LPFC_MBOXQ_t *mbox;
15555 int rc, length, status = 0;
15556 uint32_t shdr_status, shdr_add_status;
15557 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15558 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
04c68496 15559
2e90f4b5
JS
15560 /* sanity check on queue memory */
15561 if (!mq || !cq)
15562 return -ENODEV;
49198b37
JS
15563 if (!phba->sli4_hba.pc_sli4_params.supported)
15564 hw_page_size = SLI4_PAGE_SIZE;
b19a061a 15565
04c68496
JS
15566 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15567 if (!mbox)
15568 return -ENOMEM;
b19a061a 15569 length = (sizeof(struct lpfc_mbx_mq_create_ext) -
04c68496
JS
15570 sizeof(struct lpfc_sli4_cfg_mhdr));
15571 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
b19a061a 15572 LPFC_MBOX_OPCODE_MQ_CREATE_EXT,
04c68496 15573 length, LPFC_SLI4_MBX_EMBED);
b19a061a
JS
15574
15575 mq_create_ext = &mbox->u.mqe.un.mq_create_ext;
5a6f133e 15576 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create_ext->header.cfg_shdr;
70f3c073
JS
15577 bf_set(lpfc_mbx_mq_create_ext_num_pages,
15578 &mq_create_ext->u.request, mq->page_count);
15579 bf_set(lpfc_mbx_mq_create_ext_async_evt_link,
15580 &mq_create_ext->u.request, 1);
15581 bf_set(lpfc_mbx_mq_create_ext_async_evt_fip,
b19a061a
JS
15582 &mq_create_ext->u.request, 1);
15583 bf_set(lpfc_mbx_mq_create_ext_async_evt_group5,
15584 &mq_create_ext->u.request, 1);
70f3c073
JS
15585 bf_set(lpfc_mbx_mq_create_ext_async_evt_fc,
15586 &mq_create_ext->u.request, 1);
15587 bf_set(lpfc_mbx_mq_create_ext_async_evt_sli,
15588 &mq_create_ext->u.request, 1);
b19a061a 15589 bf_set(lpfc_mq_context_valid, &mq_create_ext->u.request.context, 1);
5a6f133e
JS
15590 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15591 phba->sli4_hba.pc_sli4_params.mqv);
15592 if (phba->sli4_hba.pc_sli4_params.mqv == LPFC_Q_CREATE_VERSION_1)
15593 bf_set(lpfc_mbx_mq_create_ext_cq_id, &mq_create_ext->u.request,
15594 cq->queue_id);
15595 else
15596 bf_set(lpfc_mq_context_cq_id, &mq_create_ext->u.request.context,
15597 cq->queue_id);
04c68496
JS
15598 switch (mq->entry_count) {
15599 default:
15600 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15601 "0362 Unsupported MQ count. (%d)\n",
15602 mq->entry_count);
4f4c1863
JS
15603 if (mq->entry_count < 16) {
15604 status = -EINVAL;
15605 goto out;
15606 }
5bd5f66c 15607 /* fall through - otherwise default to smallest count */
04c68496 15608 case 16:
5a6f133e
JS
15609 bf_set(lpfc_mq_context_ring_size,
15610 &mq_create_ext->u.request.context,
15611 LPFC_MQ_RING_SIZE_16);
04c68496
JS
15612 break;
15613 case 32:
5a6f133e
JS
15614 bf_set(lpfc_mq_context_ring_size,
15615 &mq_create_ext->u.request.context,
15616 LPFC_MQ_RING_SIZE_32);
04c68496
JS
15617 break;
15618 case 64:
5a6f133e
JS
15619 bf_set(lpfc_mq_context_ring_size,
15620 &mq_create_ext->u.request.context,
15621 LPFC_MQ_RING_SIZE_64);
04c68496
JS
15622 break;
15623 case 128:
5a6f133e
JS
15624 bf_set(lpfc_mq_context_ring_size,
15625 &mq_create_ext->u.request.context,
15626 LPFC_MQ_RING_SIZE_128);
04c68496
JS
15627 break;
15628 }
15629 list_for_each_entry(dmabuf, &mq->page_list, list) {
49198b37 15630 memset(dmabuf->virt, 0, hw_page_size);
b19a061a 15631 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_lo =
04c68496 15632 putPaddrLow(dmabuf->phys);
b19a061a 15633 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_hi =
04c68496
JS
15634 putPaddrHigh(dmabuf->phys);
15635 }
15636 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
b19a061a
JS
15637 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15638 &mq_create_ext->u.response);
15639 if (rc != MBX_SUCCESS) {
15640 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15641 "2795 MQ_CREATE_EXT failed with "
15642 "status x%x. Failback to MQ_CREATE.\n",
15643 rc);
15644 lpfc_mq_create_fb_init(phba, mq, mbox, cq);
15645 mq_create = &mbox->u.mqe.un.mq_create;
15646 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15647 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create->header.cfg_shdr;
15648 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15649 &mq_create->u.response);
15650 }
15651
04c68496 15652 /* The IOCTL status is embedded in the mailbox subheader. */
04c68496
JS
15653 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15654 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15655 if (shdr_status || shdr_add_status || rc) {
15656 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15657 "2502 MQ_CREATE mailbox failed with "
15658 "status x%x add_status x%x, mbx status x%x\n",
15659 shdr_status, shdr_add_status, rc);
15660 status = -ENXIO;
15661 goto out;
15662 }
04c68496
JS
15663 if (mq->queue_id == 0xFFFF) {
15664 status = -ENXIO;
15665 goto out;
15666 }
15667 mq->type = LPFC_MQ;
2a622bfb 15668 mq->assoc_qid = cq->queue_id;
04c68496
JS
15669 mq->subtype = subtype;
15670 mq->host_index = 0;
15671 mq->hba_index = 0;
15672
15673 /* link the mq onto the parent cq child list */
15674 list_add_tail(&mq->list, &cq->child_list);
15675out:
8fa38513 15676 mempool_free(mbox, phba->mbox_mem_pool);
04c68496
JS
15677 return status;
15678}
15679
4f774513
JS
15680/**
15681 * lpfc_wq_create - Create a Work Queue on the HBA
15682 * @phba: HBA structure that indicates port to create a queue on.
15683 * @wq: The queue structure to use to create the work queue.
15684 * @cq: The completion queue to bind this work queue to.
15685 * @subtype: The subtype of the work queue indicating its functionality.
15686 *
15687 * This function creates a work queue, as detailed in @wq, on a port, described
15688 * by @phba by sending a WQ_CREATE mailbox command to the HBA.
15689 *
15690 * The @phba struct is used to send mailbox command to HBA. The @wq struct
15691 * is used to get the entry count and entry size that are necessary to
15692 * determine the number of pages to allocate and use for this queue. The @cq
15693 * is used to indicate which completion queue to bind this work queue to. This
15694 * function will send the WQ_CREATE mailbox command to the HBA to setup the
15695 * work queue. This function is asynchronous and will wait for the mailbox
15696 * command to finish before continuing.
15697 *
15698 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15699 * memory this function will return -ENOMEM. If the queue create mailbox command
15700 * fails this function will return -ENXIO.
4f774513 15701 **/
a2fc4aef 15702int
4f774513
JS
15703lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq,
15704 struct lpfc_queue *cq, uint32_t subtype)
15705{
15706 struct lpfc_mbx_wq_create *wq_create;
15707 struct lpfc_dmabuf *dmabuf;
15708 LPFC_MBOXQ_t *mbox;
15709 int rc, length, status = 0;
15710 uint32_t shdr_status, shdr_add_status;
15711 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15712 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
5a6f133e 15713 struct dma_address *page;
962bc51b
JS
15714 void __iomem *bar_memmap_p;
15715 uint32_t db_offset;
15716 uint16_t pci_barset;
1351e69f
JS
15717 uint8_t dpp_barset;
15718 uint32_t dpp_offset;
15719 unsigned long pg_addr;
81b96eda 15720 uint8_t wq_create_version;
49198b37 15721
2e90f4b5
JS
15722 /* sanity check on queue memory */
15723 if (!wq || !cq)
15724 return -ENODEV;
49198b37 15725 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 15726 hw_page_size = wq->page_size;
4f774513
JS
15727
15728 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15729 if (!mbox)
15730 return -ENOMEM;
15731 length = (sizeof(struct lpfc_mbx_wq_create) -
15732 sizeof(struct lpfc_sli4_cfg_mhdr));
15733 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15734 LPFC_MBOX_OPCODE_FCOE_WQ_CREATE,
15735 length, LPFC_SLI4_MBX_EMBED);
15736 wq_create = &mbox->u.mqe.un.wq_create;
5a6f133e 15737 shdr = (union lpfc_sli4_cfg_shdr *) &wq_create->header.cfg_shdr;
4f774513
JS
15738 bf_set(lpfc_mbx_wq_create_num_pages, &wq_create->u.request,
15739 wq->page_count);
15740 bf_set(lpfc_mbx_wq_create_cq_id, &wq_create->u.request,
15741 cq->queue_id);
0c651878
JS
15742
15743 /* wqv is the earliest version supported, NOT the latest */
5a6f133e
JS
15744 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15745 phba->sli4_hba.pc_sli4_params.wqv);
962bc51b 15746
c176ffa0
JS
15747 if ((phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT) ||
15748 (wq->page_size > SLI4_PAGE_SIZE))
81b96eda
JS
15749 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15750 else
15751 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15752
0c651878 15753
1351e69f
JS
15754 if (phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT)
15755 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15756 else
15757 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15758
15759 switch (wq_create_version) {
0c651878 15760 case LPFC_Q_CREATE_VERSION_1:
5a6f133e
JS
15761 bf_set(lpfc_mbx_wq_create_wqe_count, &wq_create->u.request_1,
15762 wq->entry_count);
3f247de7
JS
15763 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15764 LPFC_Q_CREATE_VERSION_1);
15765
5a6f133e
JS
15766 switch (wq->entry_size) {
15767 default:
15768 case 64:
15769 bf_set(lpfc_mbx_wq_create_wqe_size,
15770 &wq_create->u.request_1,
15771 LPFC_WQ_WQE_SIZE_64);
15772 break;
15773 case 128:
15774 bf_set(lpfc_mbx_wq_create_wqe_size,
15775 &wq_create->u.request_1,
15776 LPFC_WQ_WQE_SIZE_128);
15777 break;
15778 }
1351e69f
JS
15779 /* Request DPP by default */
15780 bf_set(lpfc_mbx_wq_create_dpp_req, &wq_create->u.request_1, 1);
8ea73db4
JS
15781 bf_set(lpfc_mbx_wq_create_page_size,
15782 &wq_create->u.request_1,
81b96eda 15783 (wq->page_size / SLI4_PAGE_SIZE));
5a6f133e 15784 page = wq_create->u.request_1.page;
0c651878
JS
15785 break;
15786 default:
1351e69f
JS
15787 page = wq_create->u.request.page;
15788 break;
5a6f133e 15789 }
0c651878 15790
4f774513 15791 list_for_each_entry(dmabuf, &wq->page_list, list) {
49198b37 15792 memset(dmabuf->virt, 0, hw_page_size);
5a6f133e
JS
15793 page[dmabuf->buffer_tag].addr_lo = putPaddrLow(dmabuf->phys);
15794 page[dmabuf->buffer_tag].addr_hi = putPaddrHigh(dmabuf->phys);
4f774513 15795 }
962bc51b
JS
15796
15797 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15798 bf_set(lpfc_mbx_wq_create_dua, &wq_create->u.request, 1);
15799
4f774513
JS
15800 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15801 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15802 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15803 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15804 if (shdr_status || shdr_add_status || rc) {
15805 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15806 "2503 WQ_CREATE mailbox failed with "
15807 "status x%x add_status x%x, mbx status x%x\n",
15808 shdr_status, shdr_add_status, rc);
15809 status = -ENXIO;
15810 goto out;
15811 }
1351e69f
JS
15812
15813 if (wq_create_version == LPFC_Q_CREATE_VERSION_0)
15814 wq->queue_id = bf_get(lpfc_mbx_wq_create_q_id,
15815 &wq_create->u.response);
15816 else
15817 wq->queue_id = bf_get(lpfc_mbx_wq_create_v1_q_id,
15818 &wq_create->u.response_1);
15819
4f774513
JS
15820 if (wq->queue_id == 0xFFFF) {
15821 status = -ENXIO;
15822 goto out;
15823 }
1351e69f
JS
15824
15825 wq->db_format = LPFC_DB_LIST_FORMAT;
15826 if (wq_create_version == LPFC_Q_CREATE_VERSION_0) {
15827 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15828 wq->db_format = bf_get(lpfc_mbx_wq_create_db_format,
15829 &wq_create->u.response);
15830 if ((wq->db_format != LPFC_DB_LIST_FORMAT) &&
15831 (wq->db_format != LPFC_DB_RING_FORMAT)) {
15832 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15833 "3265 WQ[%d] doorbell format "
15834 "not supported: x%x\n",
15835 wq->queue_id, wq->db_format);
15836 status = -EINVAL;
15837 goto out;
15838 }
15839 pci_barset = bf_get(lpfc_mbx_wq_create_bar_set,
15840 &wq_create->u.response);
15841 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15842 pci_barset);
15843 if (!bar_memmap_p) {
15844 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15845 "3263 WQ[%d] failed to memmap "
15846 "pci barset:x%x\n",
15847 wq->queue_id, pci_barset);
15848 status = -ENOMEM;
15849 goto out;
15850 }
15851 db_offset = wq_create->u.response.doorbell_offset;
15852 if ((db_offset != LPFC_ULP0_WQ_DOORBELL) &&
15853 (db_offset != LPFC_ULP1_WQ_DOORBELL)) {
15854 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15855 "3252 WQ[%d] doorbell offset "
15856 "not supported: x%x\n",
15857 wq->queue_id, db_offset);
15858 status = -EINVAL;
15859 goto out;
15860 }
15861 wq->db_regaddr = bar_memmap_p + db_offset;
15862 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15863 "3264 WQ[%d]: barset:x%x, offset:x%x, "
15864 "format:x%x\n", wq->queue_id,
15865 pci_barset, db_offset, wq->db_format);
15866 } else
15867 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15868 } else {
1351e69f
JS
15869 /* Check if DPP was honored by the firmware */
15870 wq->dpp_enable = bf_get(lpfc_mbx_wq_create_dpp_rsp,
15871 &wq_create->u.response_1);
15872 if (wq->dpp_enable) {
15873 pci_barset = bf_get(lpfc_mbx_wq_create_v1_bar_set,
15874 &wq_create->u.response_1);
15875 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15876 pci_barset);
15877 if (!bar_memmap_p) {
15878 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15879 "3267 WQ[%d] failed to memmap "
15880 "pci barset:x%x\n",
15881 wq->queue_id, pci_barset);
15882 status = -ENOMEM;
15883 goto out;
15884 }
15885 db_offset = wq_create->u.response_1.doorbell_offset;
15886 wq->db_regaddr = bar_memmap_p + db_offset;
15887 wq->dpp_id = bf_get(lpfc_mbx_wq_create_dpp_id,
15888 &wq_create->u.response_1);
15889 dpp_barset = bf_get(lpfc_mbx_wq_create_dpp_bar,
15890 &wq_create->u.response_1);
15891 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15892 dpp_barset);
15893 if (!bar_memmap_p) {
15894 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15895 "3268 WQ[%d] failed to memmap "
15896 "pci barset:x%x\n",
15897 wq->queue_id, dpp_barset);
15898 status = -ENOMEM;
15899 goto out;
15900 }
15901 dpp_offset = wq_create->u.response_1.dpp_offset;
15902 wq->dpp_regaddr = bar_memmap_p + dpp_offset;
15903 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15904 "3271 WQ[%d]: barset:x%x, offset:x%x, "
15905 "dpp_id:x%x dpp_barset:x%x "
15906 "dpp_offset:x%x\n",
15907 wq->queue_id, pci_barset, db_offset,
15908 wq->dpp_id, dpp_barset, dpp_offset);
15909
15910 /* Enable combined writes for DPP aperture */
15911 pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK;
15912#ifdef CONFIG_X86
15913 rc = set_memory_wc(pg_addr, 1);
15914 if (rc) {
15915 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15916 "3272 Cannot setup Combined "
15917 "Write on WQ[%d] - disable DPP\n",
15918 wq->queue_id);
15919 phba->cfg_enable_dpp = 0;
15920 }
15921#else
15922 phba->cfg_enable_dpp = 0;
15923#endif
15924 } else
15925 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15926 }
895427bd
JS
15927 wq->pring = kzalloc(sizeof(struct lpfc_sli_ring), GFP_KERNEL);
15928 if (wq->pring == NULL) {
15929 status = -ENOMEM;
15930 goto out;
15931 }
4f774513 15932 wq->type = LPFC_WQ;
2a622bfb 15933 wq->assoc_qid = cq->queue_id;
4f774513
JS
15934 wq->subtype = subtype;
15935 wq->host_index = 0;
15936 wq->hba_index = 0;
32517fc0 15937 wq->notify_interval = LPFC_WQ_NOTIFY_INTRVL;
4f774513
JS
15938
15939 /* link the wq onto the parent cq child list */
15940 list_add_tail(&wq->list, &cq->child_list);
15941out:
8fa38513 15942 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15943 return status;
15944}
15945
15946/**
15947 * lpfc_rq_create - Create a Receive Queue on the HBA
15948 * @phba: HBA structure that indicates port to create a queue on.
15949 * @hrq: The queue structure to use to create the header receive queue.
15950 * @drq: The queue structure to use to create the data receive queue.
15951 * @cq: The completion queue to bind this work queue to.
15952 *
15953 * This function creates a receive buffer queue pair , as detailed in @hrq and
15954 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15955 * to the HBA.
15956 *
15957 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15958 * struct is used to get the entry count that is necessary to determine the
15959 * number of pages to use for this queue. The @cq is used to indicate which
15960 * completion queue to bind received buffers that are posted to these queues to.
15961 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15962 * receive queue pair. This function is asynchronous and will wait for the
15963 * mailbox command to finish before continuing.
15964 *
15965 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15966 * memory this function will return -ENOMEM. If the queue create mailbox command
15967 * fails this function will return -ENXIO.
4f774513 15968 **/
a2fc4aef 15969int
4f774513
JS
15970lpfc_rq_create(struct lpfc_hba *phba, struct lpfc_queue *hrq,
15971 struct lpfc_queue *drq, struct lpfc_queue *cq, uint32_t subtype)
15972{
15973 struct lpfc_mbx_rq_create *rq_create;
15974 struct lpfc_dmabuf *dmabuf;
15975 LPFC_MBOXQ_t *mbox;
15976 int rc, length, status = 0;
15977 uint32_t shdr_status, shdr_add_status;
15978 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15979 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
962bc51b
JS
15980 void __iomem *bar_memmap_p;
15981 uint32_t db_offset;
15982 uint16_t pci_barset;
49198b37 15983
2e90f4b5
JS
15984 /* sanity check on queue memory */
15985 if (!hrq || !drq || !cq)
15986 return -ENODEV;
49198b37
JS
15987 if (!phba->sli4_hba.pc_sli4_params.supported)
15988 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
15989
15990 if (hrq->entry_count != drq->entry_count)
15991 return -EINVAL;
15992 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15993 if (!mbox)
15994 return -ENOMEM;
15995 length = (sizeof(struct lpfc_mbx_rq_create) -
15996 sizeof(struct lpfc_sli4_cfg_mhdr));
15997 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15998 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15999 length, LPFC_SLI4_MBX_EMBED);
16000 rq_create = &mbox->u.mqe.un.rq_create;
5a6f133e
JS
16001 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
16002 bf_set(lpfc_mbox_hdr_version, &shdr->request,
16003 phba->sli4_hba.pc_sli4_params.rqv);
16004 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
16005 bf_set(lpfc_rq_context_rqe_count_1,
16006 &rq_create->u.request.context,
16007 hrq->entry_count);
16008 rq_create->u.request.context.buffer_size = LPFC_HDR_BUF_SIZE;
c31098ce
JS
16009 bf_set(lpfc_rq_context_rqe_size,
16010 &rq_create->u.request.context,
16011 LPFC_RQE_SIZE_8);
16012 bf_set(lpfc_rq_context_page_size,
16013 &rq_create->u.request.context,
8ea73db4 16014 LPFC_RQ_PAGE_SIZE_4096);
5a6f133e
JS
16015 } else {
16016 switch (hrq->entry_count) {
16017 default:
16018 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16019 "2535 Unsupported RQ count. (%d)\n",
16020 hrq->entry_count);
4f4c1863
JS
16021 if (hrq->entry_count < 512) {
16022 status = -EINVAL;
16023 goto out;
16024 }
5bd5f66c 16025 /* fall through - otherwise default to smallest count */
5a6f133e
JS
16026 case 512:
16027 bf_set(lpfc_rq_context_rqe_count,
16028 &rq_create->u.request.context,
16029 LPFC_RQ_RING_SIZE_512);
16030 break;
16031 case 1024:
16032 bf_set(lpfc_rq_context_rqe_count,
16033 &rq_create->u.request.context,
16034 LPFC_RQ_RING_SIZE_1024);
16035 break;
16036 case 2048:
16037 bf_set(lpfc_rq_context_rqe_count,
16038 &rq_create->u.request.context,
16039 LPFC_RQ_RING_SIZE_2048);
16040 break;
16041 case 4096:
16042 bf_set(lpfc_rq_context_rqe_count,
16043 &rq_create->u.request.context,
16044 LPFC_RQ_RING_SIZE_4096);
16045 break;
16046 }
16047 bf_set(lpfc_rq_context_buf_size, &rq_create->u.request.context,
16048 LPFC_HDR_BUF_SIZE);
4f774513
JS
16049 }
16050 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
16051 cq->queue_id);
16052 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
16053 hrq->page_count);
4f774513 16054 list_for_each_entry(dmabuf, &hrq->page_list, list) {
49198b37 16055 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
16056 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
16057 putPaddrLow(dmabuf->phys);
16058 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
16059 putPaddrHigh(dmabuf->phys);
16060 }
962bc51b
JS
16061 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
16062 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
16063
4f774513
JS
16064 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16065 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
16066 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16067 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16068 if (shdr_status || shdr_add_status || rc) {
16069 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16070 "2504 RQ_CREATE mailbox failed with "
16071 "status x%x add_status x%x, mbx status x%x\n",
16072 shdr_status, shdr_add_status, rc);
16073 status = -ENXIO;
16074 goto out;
16075 }
16076 hrq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16077 if (hrq->queue_id == 0xFFFF) {
16078 status = -ENXIO;
16079 goto out;
16080 }
962bc51b
JS
16081
16082 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
16083 hrq->db_format = bf_get(lpfc_mbx_rq_create_db_format,
16084 &rq_create->u.response);
16085 if ((hrq->db_format != LPFC_DB_LIST_FORMAT) &&
16086 (hrq->db_format != LPFC_DB_RING_FORMAT)) {
16087 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16088 "3262 RQ [%d] doorbell format not "
16089 "supported: x%x\n", hrq->queue_id,
16090 hrq->db_format);
16091 status = -EINVAL;
16092 goto out;
16093 }
16094
16095 pci_barset = bf_get(lpfc_mbx_rq_create_bar_set,
16096 &rq_create->u.response);
16097 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba, pci_barset);
16098 if (!bar_memmap_p) {
16099 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16100 "3269 RQ[%d] failed to memmap pci "
16101 "barset:x%x\n", hrq->queue_id,
16102 pci_barset);
16103 status = -ENOMEM;
16104 goto out;
16105 }
16106
16107 db_offset = rq_create->u.response.doorbell_offset;
16108 if ((db_offset != LPFC_ULP0_RQ_DOORBELL) &&
16109 (db_offset != LPFC_ULP1_RQ_DOORBELL)) {
16110 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16111 "3270 RQ[%d] doorbell offset not "
16112 "supported: x%x\n", hrq->queue_id,
16113 db_offset);
16114 status = -EINVAL;
16115 goto out;
16116 }
16117 hrq->db_regaddr = bar_memmap_p + db_offset;
16118 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a22e7db3
JS
16119 "3266 RQ[qid:%d]: barset:x%x, offset:x%x, "
16120 "format:x%x\n", hrq->queue_id, pci_barset,
16121 db_offset, hrq->db_format);
962bc51b
JS
16122 } else {
16123 hrq->db_format = LPFC_DB_RING_FORMAT;
16124 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16125 }
4f774513 16126 hrq->type = LPFC_HRQ;
2a622bfb 16127 hrq->assoc_qid = cq->queue_id;
4f774513
JS
16128 hrq->subtype = subtype;
16129 hrq->host_index = 0;
16130 hrq->hba_index = 0;
32517fc0 16131 hrq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
4f774513
JS
16132
16133 /* now create the data queue */
16134 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16135 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
16136 length, LPFC_SLI4_MBX_EMBED);
5a6f133e
JS
16137 bf_set(lpfc_mbox_hdr_version, &shdr->request,
16138 phba->sli4_hba.pc_sli4_params.rqv);
16139 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
16140 bf_set(lpfc_rq_context_rqe_count_1,
c31098ce 16141 &rq_create->u.request.context, hrq->entry_count);
3c603be9
JS
16142 if (subtype == LPFC_NVMET)
16143 rq_create->u.request.context.buffer_size =
16144 LPFC_NVMET_DATA_BUF_SIZE;
16145 else
16146 rq_create->u.request.context.buffer_size =
16147 LPFC_DATA_BUF_SIZE;
c31098ce
JS
16148 bf_set(lpfc_rq_context_rqe_size, &rq_create->u.request.context,
16149 LPFC_RQE_SIZE_8);
16150 bf_set(lpfc_rq_context_page_size, &rq_create->u.request.context,
16151 (PAGE_SIZE/SLI4_PAGE_SIZE));
5a6f133e
JS
16152 } else {
16153 switch (drq->entry_count) {
16154 default:
16155 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16156 "2536 Unsupported RQ count. (%d)\n",
16157 drq->entry_count);
4f4c1863
JS
16158 if (drq->entry_count < 512) {
16159 status = -EINVAL;
16160 goto out;
16161 }
5bd5f66c 16162 /* fall through - otherwise default to smallest count */
5a6f133e
JS
16163 case 512:
16164 bf_set(lpfc_rq_context_rqe_count,
16165 &rq_create->u.request.context,
16166 LPFC_RQ_RING_SIZE_512);
16167 break;
16168 case 1024:
16169 bf_set(lpfc_rq_context_rqe_count,
16170 &rq_create->u.request.context,
16171 LPFC_RQ_RING_SIZE_1024);
16172 break;
16173 case 2048:
16174 bf_set(lpfc_rq_context_rqe_count,
16175 &rq_create->u.request.context,
16176 LPFC_RQ_RING_SIZE_2048);
16177 break;
16178 case 4096:
16179 bf_set(lpfc_rq_context_rqe_count,
16180 &rq_create->u.request.context,
16181 LPFC_RQ_RING_SIZE_4096);
16182 break;
16183 }
3c603be9
JS
16184 if (subtype == LPFC_NVMET)
16185 bf_set(lpfc_rq_context_buf_size,
16186 &rq_create->u.request.context,
16187 LPFC_NVMET_DATA_BUF_SIZE);
16188 else
16189 bf_set(lpfc_rq_context_buf_size,
16190 &rq_create->u.request.context,
16191 LPFC_DATA_BUF_SIZE);
4f774513
JS
16192 }
16193 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
16194 cq->queue_id);
16195 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
16196 drq->page_count);
4f774513
JS
16197 list_for_each_entry(dmabuf, &drq->page_list, list) {
16198 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
16199 putPaddrLow(dmabuf->phys);
16200 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
16201 putPaddrHigh(dmabuf->phys);
16202 }
962bc51b
JS
16203 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
16204 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
4f774513
JS
16205 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16206 /* The IOCTL status is embedded in the mailbox subheader. */
16207 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
16208 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16209 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16210 if (shdr_status || shdr_add_status || rc) {
16211 status = -ENXIO;
16212 goto out;
16213 }
16214 drq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16215 if (drq->queue_id == 0xFFFF) {
16216 status = -ENXIO;
16217 goto out;
16218 }
16219 drq->type = LPFC_DRQ;
2a622bfb 16220 drq->assoc_qid = cq->queue_id;
4f774513
JS
16221 drq->subtype = subtype;
16222 drq->host_index = 0;
16223 drq->hba_index = 0;
32517fc0 16224 drq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
4f774513
JS
16225
16226 /* link the header and data RQs onto the parent cq child list */
16227 list_add_tail(&hrq->list, &cq->child_list);
16228 list_add_tail(&drq->list, &cq->child_list);
16229
16230out:
8fa38513 16231 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
16232 return status;
16233}
16234
2d7dbc4c
JS
16235/**
16236 * lpfc_mrq_create - Create MRQ Receive Queues on the HBA
16237 * @phba: HBA structure that indicates port to create a queue on.
16238 * @hrqp: The queue structure array to use to create the header receive queues.
16239 * @drqp: The queue structure array to use to create the data receive queues.
16240 * @cqp: The completion queue array to bind these receive queues to.
16241 *
16242 * This function creates a receive buffer queue pair , as detailed in @hrq and
16243 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
16244 * to the HBA.
16245 *
16246 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
16247 * struct is used to get the entry count that is necessary to determine the
16248 * number of pages to use for this queue. The @cq is used to indicate which
16249 * completion queue to bind received buffers that are posted to these queues to.
16250 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
16251 * receive queue pair. This function is asynchronous and will wait for the
16252 * mailbox command to finish before continuing.
16253 *
16254 * On success this function will return a zero. If unable to allocate enough
16255 * memory this function will return -ENOMEM. If the queue create mailbox command
16256 * fails this function will return -ENXIO.
16257 **/
16258int
16259lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
16260 struct lpfc_queue **drqp, struct lpfc_queue **cqp,
16261 uint32_t subtype)
16262{
16263 struct lpfc_queue *hrq, *drq, *cq;
16264 struct lpfc_mbx_rq_create_v2 *rq_create;
16265 struct lpfc_dmabuf *dmabuf;
16266 LPFC_MBOXQ_t *mbox;
16267 int rc, length, alloclen, status = 0;
16268 int cnt, idx, numrq, page_idx = 0;
16269 uint32_t shdr_status, shdr_add_status;
16270 union lpfc_sli4_cfg_shdr *shdr;
16271 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
16272
16273 numrq = phba->cfg_nvmet_mrq;
16274 /* sanity check on array memory */
16275 if (!hrqp || !drqp || !cqp || !numrq)
16276 return -ENODEV;
16277 if (!phba->sli4_hba.pc_sli4_params.supported)
16278 hw_page_size = SLI4_PAGE_SIZE;
16279
16280 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16281 if (!mbox)
16282 return -ENOMEM;
16283
16284 length = sizeof(struct lpfc_mbx_rq_create_v2);
16285 length += ((2 * numrq * hrqp[0]->page_count) *
16286 sizeof(struct dma_address));
16287
16288 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16289 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE, length,
16290 LPFC_SLI4_MBX_NEMBED);
16291 if (alloclen < length) {
16292 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16293 "3099 Allocated DMA memory size (%d) is "
16294 "less than the requested DMA memory size "
16295 "(%d)\n", alloclen, length);
16296 status = -ENOMEM;
16297 goto out;
16298 }
16299
16300
16301
16302 rq_create = mbox->sge_array->addr[0];
16303 shdr = (union lpfc_sli4_cfg_shdr *)&rq_create->cfg_shdr;
16304
16305 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_Q_CREATE_VERSION_2);
16306 cnt = 0;
16307
16308 for (idx = 0; idx < numrq; idx++) {
16309 hrq = hrqp[idx];
16310 drq = drqp[idx];
16311 cq = cqp[idx];
16312
2d7dbc4c
JS
16313 /* sanity check on queue memory */
16314 if (!hrq || !drq || !cq) {
16315 status = -ENODEV;
16316 goto out;
16317 }
16318
7aabe84b
JS
16319 if (hrq->entry_count != drq->entry_count) {
16320 status = -EINVAL;
16321 goto out;
16322 }
16323
2d7dbc4c
JS
16324 if (idx == 0) {
16325 bf_set(lpfc_mbx_rq_create_num_pages,
16326 &rq_create->u.request,
16327 hrq->page_count);
16328 bf_set(lpfc_mbx_rq_create_rq_cnt,
16329 &rq_create->u.request, (numrq * 2));
16330 bf_set(lpfc_mbx_rq_create_dnb, &rq_create->u.request,
16331 1);
16332 bf_set(lpfc_rq_context_base_cq,
16333 &rq_create->u.request.context,
16334 cq->queue_id);
16335 bf_set(lpfc_rq_context_data_size,
16336 &rq_create->u.request.context,
3c603be9 16337 LPFC_NVMET_DATA_BUF_SIZE);
2d7dbc4c
JS
16338 bf_set(lpfc_rq_context_hdr_size,
16339 &rq_create->u.request.context,
16340 LPFC_HDR_BUF_SIZE);
16341 bf_set(lpfc_rq_context_rqe_count_1,
16342 &rq_create->u.request.context,
16343 hrq->entry_count);
16344 bf_set(lpfc_rq_context_rqe_size,
16345 &rq_create->u.request.context,
16346 LPFC_RQE_SIZE_8);
16347 bf_set(lpfc_rq_context_page_size,
16348 &rq_create->u.request.context,
16349 (PAGE_SIZE/SLI4_PAGE_SIZE));
16350 }
16351 rc = 0;
16352 list_for_each_entry(dmabuf, &hrq->page_list, list) {
16353 memset(dmabuf->virt, 0, hw_page_size);
16354 cnt = page_idx + dmabuf->buffer_tag;
16355 rq_create->u.request.page[cnt].addr_lo =
16356 putPaddrLow(dmabuf->phys);
16357 rq_create->u.request.page[cnt].addr_hi =
16358 putPaddrHigh(dmabuf->phys);
16359 rc++;
16360 }
16361 page_idx += rc;
16362
16363 rc = 0;
16364 list_for_each_entry(dmabuf, &drq->page_list, list) {
16365 memset(dmabuf->virt, 0, hw_page_size);
16366 cnt = page_idx + dmabuf->buffer_tag;
16367 rq_create->u.request.page[cnt].addr_lo =
16368 putPaddrLow(dmabuf->phys);
16369 rq_create->u.request.page[cnt].addr_hi =
16370 putPaddrHigh(dmabuf->phys);
16371 rc++;
16372 }
16373 page_idx += rc;
16374
16375 hrq->db_format = LPFC_DB_RING_FORMAT;
16376 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16377 hrq->type = LPFC_HRQ;
16378 hrq->assoc_qid = cq->queue_id;
16379 hrq->subtype = subtype;
16380 hrq->host_index = 0;
16381 hrq->hba_index = 0;
32517fc0 16382 hrq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
2d7dbc4c
JS
16383
16384 drq->db_format = LPFC_DB_RING_FORMAT;
16385 drq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16386 drq->type = LPFC_DRQ;
16387 drq->assoc_qid = cq->queue_id;
16388 drq->subtype = subtype;
16389 drq->host_index = 0;
16390 drq->hba_index = 0;
32517fc0 16391 drq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
2d7dbc4c
JS
16392
16393 list_add_tail(&hrq->list, &cq->child_list);
16394 list_add_tail(&drq->list, &cq->child_list);
16395 }
16396
16397 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16398 /* The IOCTL status is embedded in the mailbox subheader. */
16399 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16400 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16401 if (shdr_status || shdr_add_status || rc) {
16402 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16403 "3120 RQ_CREATE mailbox failed with "
16404 "status x%x add_status x%x, mbx status x%x\n",
16405 shdr_status, shdr_add_status, rc);
16406 status = -ENXIO;
16407 goto out;
16408 }
16409 rc = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16410 if (rc == 0xFFFF) {
16411 status = -ENXIO;
16412 goto out;
16413 }
16414
16415 /* Initialize all RQs with associated queue id */
16416 for (idx = 0; idx < numrq; idx++) {
16417 hrq = hrqp[idx];
16418 hrq->queue_id = rc + (2 * idx);
16419 drq = drqp[idx];
16420 drq->queue_id = rc + (2 * idx) + 1;
16421 }
16422
16423out:
16424 lpfc_sli4_mbox_cmd_free(phba, mbox);
16425 return status;
16426}
16427
4f774513
JS
16428/**
16429 * lpfc_eq_destroy - Destroy an event Queue on the HBA
16430 * @eq: The queue structure associated with the queue to destroy.
16431 *
16432 * This function destroys a queue, as detailed in @eq by sending an mailbox
16433 * command, specific to the type of queue, to the HBA.
16434 *
16435 * The @eq struct is used to get the queue ID of the queue to destroy.
16436 *
16437 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16438 * command fails this function will return -ENXIO.
4f774513 16439 **/
a2fc4aef 16440int
4f774513
JS
16441lpfc_eq_destroy(struct lpfc_hba *phba, struct lpfc_queue *eq)
16442{
16443 LPFC_MBOXQ_t *mbox;
16444 int rc, length, status = 0;
16445 uint32_t shdr_status, shdr_add_status;
16446 union lpfc_sli4_cfg_shdr *shdr;
16447
2e90f4b5 16448 /* sanity check on queue memory */
4f774513
JS
16449 if (!eq)
16450 return -ENODEV;
32517fc0 16451
4f774513
JS
16452 mbox = mempool_alloc(eq->phba->mbox_mem_pool, GFP_KERNEL);
16453 if (!mbox)
16454 return -ENOMEM;
16455 length = (sizeof(struct lpfc_mbx_eq_destroy) -
16456 sizeof(struct lpfc_sli4_cfg_mhdr));
16457 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16458 LPFC_MBOX_OPCODE_EQ_DESTROY,
16459 length, LPFC_SLI4_MBX_EMBED);
16460 bf_set(lpfc_mbx_eq_destroy_q_id, &mbox->u.mqe.un.eq_destroy.u.request,
16461 eq->queue_id);
16462 mbox->vport = eq->phba->pport;
16463 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16464
16465 rc = lpfc_sli_issue_mbox(eq->phba, mbox, MBX_POLL);
16466 /* The IOCTL status is embedded in the mailbox subheader. */
16467 shdr = (union lpfc_sli4_cfg_shdr *)
16468 &mbox->u.mqe.un.eq_destroy.header.cfg_shdr;
16469 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16470 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16471 if (shdr_status || shdr_add_status || rc) {
16472 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16473 "2505 EQ_DESTROY mailbox failed with "
16474 "status x%x add_status x%x, mbx status x%x\n",
16475 shdr_status, shdr_add_status, rc);
16476 status = -ENXIO;
16477 }
16478
16479 /* Remove eq from any list */
16480 list_del_init(&eq->list);
8fa38513 16481 mempool_free(mbox, eq->phba->mbox_mem_pool);
4f774513
JS
16482 return status;
16483}
16484
16485/**
16486 * lpfc_cq_destroy - Destroy a Completion Queue on the HBA
16487 * @cq: The queue structure associated with the queue to destroy.
16488 *
16489 * This function destroys a queue, as detailed in @cq by sending an mailbox
16490 * command, specific to the type of queue, to the HBA.
16491 *
16492 * The @cq struct is used to get the queue ID of the queue to destroy.
16493 *
16494 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16495 * command fails this function will return -ENXIO.
4f774513 16496 **/
a2fc4aef 16497int
4f774513
JS
16498lpfc_cq_destroy(struct lpfc_hba *phba, struct lpfc_queue *cq)
16499{
16500 LPFC_MBOXQ_t *mbox;
16501 int rc, length, status = 0;
16502 uint32_t shdr_status, shdr_add_status;
16503 union lpfc_sli4_cfg_shdr *shdr;
16504
2e90f4b5 16505 /* sanity check on queue memory */
4f774513
JS
16506 if (!cq)
16507 return -ENODEV;
16508 mbox = mempool_alloc(cq->phba->mbox_mem_pool, GFP_KERNEL);
16509 if (!mbox)
16510 return -ENOMEM;
16511 length = (sizeof(struct lpfc_mbx_cq_destroy) -
16512 sizeof(struct lpfc_sli4_cfg_mhdr));
16513 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16514 LPFC_MBOX_OPCODE_CQ_DESTROY,
16515 length, LPFC_SLI4_MBX_EMBED);
16516 bf_set(lpfc_mbx_cq_destroy_q_id, &mbox->u.mqe.un.cq_destroy.u.request,
16517 cq->queue_id);
16518 mbox->vport = cq->phba->pport;
16519 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16520 rc = lpfc_sli_issue_mbox(cq->phba, mbox, MBX_POLL);
16521 /* The IOCTL status is embedded in the mailbox subheader. */
16522 shdr = (union lpfc_sli4_cfg_shdr *)
16523 &mbox->u.mqe.un.wq_create.header.cfg_shdr;
16524 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16525 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16526 if (shdr_status || shdr_add_status || rc) {
16527 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16528 "2506 CQ_DESTROY mailbox failed with "
16529 "status x%x add_status x%x, mbx status x%x\n",
16530 shdr_status, shdr_add_status, rc);
16531 status = -ENXIO;
16532 }
16533 /* Remove cq from any list */
16534 list_del_init(&cq->list);
8fa38513 16535 mempool_free(mbox, cq->phba->mbox_mem_pool);
4f774513
JS
16536 return status;
16537}
16538
04c68496
JS
16539/**
16540 * lpfc_mq_destroy - Destroy a Mailbox Queue on the HBA
16541 * @qm: The queue structure associated with the queue to destroy.
16542 *
16543 * This function destroys a queue, as detailed in @mq by sending an mailbox
16544 * command, specific to the type of queue, to the HBA.
16545 *
16546 * The @mq struct is used to get the queue ID of the queue to destroy.
16547 *
16548 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16549 * command fails this function will return -ENXIO.
04c68496 16550 **/
a2fc4aef 16551int
04c68496
JS
16552lpfc_mq_destroy(struct lpfc_hba *phba, struct lpfc_queue *mq)
16553{
16554 LPFC_MBOXQ_t *mbox;
16555 int rc, length, status = 0;
16556 uint32_t shdr_status, shdr_add_status;
16557 union lpfc_sli4_cfg_shdr *shdr;
16558
2e90f4b5 16559 /* sanity check on queue memory */
04c68496
JS
16560 if (!mq)
16561 return -ENODEV;
16562 mbox = mempool_alloc(mq->phba->mbox_mem_pool, GFP_KERNEL);
16563 if (!mbox)
16564 return -ENOMEM;
16565 length = (sizeof(struct lpfc_mbx_mq_destroy) -
16566 sizeof(struct lpfc_sli4_cfg_mhdr));
16567 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16568 LPFC_MBOX_OPCODE_MQ_DESTROY,
16569 length, LPFC_SLI4_MBX_EMBED);
16570 bf_set(lpfc_mbx_mq_destroy_q_id, &mbox->u.mqe.un.mq_destroy.u.request,
16571 mq->queue_id);
16572 mbox->vport = mq->phba->pport;
16573 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16574 rc = lpfc_sli_issue_mbox(mq->phba, mbox, MBX_POLL);
16575 /* The IOCTL status is embedded in the mailbox subheader. */
16576 shdr = (union lpfc_sli4_cfg_shdr *)
16577 &mbox->u.mqe.un.mq_destroy.header.cfg_shdr;
16578 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16579 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16580 if (shdr_status || shdr_add_status || rc) {
16581 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16582 "2507 MQ_DESTROY mailbox failed with "
16583 "status x%x add_status x%x, mbx status x%x\n",
16584 shdr_status, shdr_add_status, rc);
16585 status = -ENXIO;
16586 }
16587 /* Remove mq from any list */
16588 list_del_init(&mq->list);
8fa38513 16589 mempool_free(mbox, mq->phba->mbox_mem_pool);
04c68496
JS
16590 return status;
16591}
16592
4f774513
JS
16593/**
16594 * lpfc_wq_destroy - Destroy a Work Queue on the HBA
16595 * @wq: The queue structure associated with the queue to destroy.
16596 *
16597 * This function destroys a queue, as detailed in @wq by sending an mailbox
16598 * command, specific to the type of queue, to the HBA.
16599 *
16600 * The @wq struct is used to get the queue ID of the queue to destroy.
16601 *
16602 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16603 * command fails this function will return -ENXIO.
4f774513 16604 **/
a2fc4aef 16605int
4f774513
JS
16606lpfc_wq_destroy(struct lpfc_hba *phba, struct lpfc_queue *wq)
16607{
16608 LPFC_MBOXQ_t *mbox;
16609 int rc, length, status = 0;
16610 uint32_t shdr_status, shdr_add_status;
16611 union lpfc_sli4_cfg_shdr *shdr;
16612
2e90f4b5 16613 /* sanity check on queue memory */
4f774513
JS
16614 if (!wq)
16615 return -ENODEV;
16616 mbox = mempool_alloc(wq->phba->mbox_mem_pool, GFP_KERNEL);
16617 if (!mbox)
16618 return -ENOMEM;
16619 length = (sizeof(struct lpfc_mbx_wq_destroy) -
16620 sizeof(struct lpfc_sli4_cfg_mhdr));
16621 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16622 LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY,
16623 length, LPFC_SLI4_MBX_EMBED);
16624 bf_set(lpfc_mbx_wq_destroy_q_id, &mbox->u.mqe.un.wq_destroy.u.request,
16625 wq->queue_id);
16626 mbox->vport = wq->phba->pport;
16627 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16628 rc = lpfc_sli_issue_mbox(wq->phba, mbox, MBX_POLL);
16629 shdr = (union lpfc_sli4_cfg_shdr *)
16630 &mbox->u.mqe.un.wq_destroy.header.cfg_shdr;
16631 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16632 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16633 if (shdr_status || shdr_add_status || rc) {
16634 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16635 "2508 WQ_DESTROY mailbox failed with "
16636 "status x%x add_status x%x, mbx status x%x\n",
16637 shdr_status, shdr_add_status, rc);
16638 status = -ENXIO;
16639 }
16640 /* Remove wq from any list */
16641 list_del_init(&wq->list);
d1f525aa
JS
16642 kfree(wq->pring);
16643 wq->pring = NULL;
8fa38513 16644 mempool_free(mbox, wq->phba->mbox_mem_pool);
4f774513
JS
16645 return status;
16646}
16647
16648/**
16649 * lpfc_rq_destroy - Destroy a Receive Queue on the HBA
16650 * @rq: The queue structure associated with the queue to destroy.
16651 *
16652 * This function destroys a queue, as detailed in @rq by sending an mailbox
16653 * command, specific to the type of queue, to the HBA.
16654 *
16655 * The @rq struct is used to get the queue ID of the queue to destroy.
16656 *
16657 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16658 * command fails this function will return -ENXIO.
4f774513 16659 **/
a2fc4aef 16660int
4f774513
JS
16661lpfc_rq_destroy(struct lpfc_hba *phba, struct lpfc_queue *hrq,
16662 struct lpfc_queue *drq)
16663{
16664 LPFC_MBOXQ_t *mbox;
16665 int rc, length, status = 0;
16666 uint32_t shdr_status, shdr_add_status;
16667 union lpfc_sli4_cfg_shdr *shdr;
16668
2e90f4b5 16669 /* sanity check on queue memory */
4f774513
JS
16670 if (!hrq || !drq)
16671 return -ENODEV;
16672 mbox = mempool_alloc(hrq->phba->mbox_mem_pool, GFP_KERNEL);
16673 if (!mbox)
16674 return -ENOMEM;
16675 length = (sizeof(struct lpfc_mbx_rq_destroy) -
fedd3b7b 16676 sizeof(struct lpfc_sli4_cfg_mhdr));
4f774513
JS
16677 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16678 LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY,
16679 length, LPFC_SLI4_MBX_EMBED);
16680 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16681 hrq->queue_id);
16682 mbox->vport = hrq->phba->pport;
16683 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16684 rc = lpfc_sli_issue_mbox(hrq->phba, mbox, MBX_POLL);
16685 /* The IOCTL status is embedded in the mailbox subheader. */
16686 shdr = (union lpfc_sli4_cfg_shdr *)
16687 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16688 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16689 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16690 if (shdr_status || shdr_add_status || rc) {
16691 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16692 "2509 RQ_DESTROY mailbox failed with "
16693 "status x%x add_status x%x, mbx status x%x\n",
16694 shdr_status, shdr_add_status, rc);
16695 if (rc != MBX_TIMEOUT)
16696 mempool_free(mbox, hrq->phba->mbox_mem_pool);
16697 return -ENXIO;
16698 }
16699 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16700 drq->queue_id);
16701 rc = lpfc_sli_issue_mbox(drq->phba, mbox, MBX_POLL);
16702 shdr = (union lpfc_sli4_cfg_shdr *)
16703 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16704 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16705 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16706 if (shdr_status || shdr_add_status || rc) {
16707 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16708 "2510 RQ_DESTROY mailbox failed with "
16709 "status x%x add_status x%x, mbx status x%x\n",
16710 shdr_status, shdr_add_status, rc);
16711 status = -ENXIO;
16712 }
16713 list_del_init(&hrq->list);
16714 list_del_init(&drq->list);
8fa38513 16715 mempool_free(mbox, hrq->phba->mbox_mem_pool);
4f774513
JS
16716 return status;
16717}
16718
16719/**
16720 * lpfc_sli4_post_sgl - Post scatter gather list for an XRI to HBA
16721 * @phba: The virtual port for which this call being executed.
16722 * @pdma_phys_addr0: Physical address of the 1st SGL page.
16723 * @pdma_phys_addr1: Physical address of the 2nd SGL page.
16724 * @xritag: the xritag that ties this io to the SGL pages.
16725 *
16726 * This routine will post the sgl pages for the IO that has the xritag
16727 * that is in the iocbq structure. The xritag is assigned during iocbq
16728 * creation and persists for as long as the driver is loaded.
16729 * if the caller has fewer than 256 scatter gather segments to map then
16730 * pdma_phys_addr1 should be 0.
16731 * If the caller needs to map more than 256 scatter gather segment then
16732 * pdma_phys_addr1 should be a valid physical address.
16733 * physical address for SGLs must be 64 byte aligned.
16734 * If you are going to map 2 SGL's then the first one must have 256 entries
16735 * the second sgl can have between 1 and 256 entries.
16736 *
16737 * Return codes:
16738 * 0 - Success
16739 * -ENXIO, -ENOMEM - Failure
16740 **/
16741int
16742lpfc_sli4_post_sgl(struct lpfc_hba *phba,
16743 dma_addr_t pdma_phys_addr0,
16744 dma_addr_t pdma_phys_addr1,
16745 uint16_t xritag)
16746{
16747 struct lpfc_mbx_post_sgl_pages *post_sgl_pages;
16748 LPFC_MBOXQ_t *mbox;
16749 int rc;
16750 uint32_t shdr_status, shdr_add_status;
6d368e53 16751 uint32_t mbox_tmo;
4f774513
JS
16752 union lpfc_sli4_cfg_shdr *shdr;
16753
16754 if (xritag == NO_XRI) {
16755 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16756 "0364 Invalid param:\n");
16757 return -EINVAL;
16758 }
16759
16760 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16761 if (!mbox)
16762 return -ENOMEM;
16763
16764 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16765 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16766 sizeof(struct lpfc_mbx_post_sgl_pages) -
fedd3b7b 16767 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
4f774513
JS
16768
16769 post_sgl_pages = (struct lpfc_mbx_post_sgl_pages *)
16770 &mbox->u.mqe.un.post_sgl_pages;
16771 bf_set(lpfc_post_sgl_pages_xri, post_sgl_pages, xritag);
16772 bf_set(lpfc_post_sgl_pages_xricnt, post_sgl_pages, 1);
16773
16774 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_lo =
16775 cpu_to_le32(putPaddrLow(pdma_phys_addr0));
16776 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_hi =
16777 cpu_to_le32(putPaddrHigh(pdma_phys_addr0));
16778
16779 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_lo =
16780 cpu_to_le32(putPaddrLow(pdma_phys_addr1));
16781 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_hi =
16782 cpu_to_le32(putPaddrHigh(pdma_phys_addr1));
16783 if (!phba->sli4_hba.intr_enable)
16784 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6d368e53 16785 else {
a183a15f 16786 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
16787 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16788 }
4f774513
JS
16789 /* The IOCTL status is embedded in the mailbox subheader. */
16790 shdr = (union lpfc_sli4_cfg_shdr *) &post_sgl_pages->header.cfg_shdr;
16791 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16792 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16793 if (rc != MBX_TIMEOUT)
16794 mempool_free(mbox, phba->mbox_mem_pool);
16795 if (shdr_status || shdr_add_status || rc) {
16796 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16797 "2511 POST_SGL mailbox failed with "
16798 "status x%x add_status x%x, mbx status x%x\n",
16799 shdr_status, shdr_add_status, rc);
4f774513
JS
16800 }
16801 return 0;
16802}
4f774513 16803
6d368e53 16804/**
88a2cfbb 16805 * lpfc_sli4_alloc_xri - Get an available rpi in the device's range
6d368e53
JS
16806 * @phba: pointer to lpfc hba data structure.
16807 *
16808 * This routine is invoked to post rpi header templates to the
88a2cfbb
JS
16809 * HBA consistent with the SLI-4 interface spec. This routine
16810 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
16811 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6d368e53 16812 *
88a2cfbb
JS
16813 * Returns
16814 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
16815 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
16816 **/
5d8b8167 16817static uint16_t
6d368e53
JS
16818lpfc_sli4_alloc_xri(struct lpfc_hba *phba)
16819{
16820 unsigned long xri;
16821
16822 /*
16823 * Fetch the next logical xri. Because this index is logical,
16824 * the driver starts at 0 each time.
16825 */
16826 spin_lock_irq(&phba->hbalock);
16827 xri = find_next_zero_bit(phba->sli4_hba.xri_bmask,
16828 phba->sli4_hba.max_cfg_param.max_xri, 0);
16829 if (xri >= phba->sli4_hba.max_cfg_param.max_xri) {
16830 spin_unlock_irq(&phba->hbalock);
16831 return NO_XRI;
16832 } else {
16833 set_bit(xri, phba->sli4_hba.xri_bmask);
16834 phba->sli4_hba.max_cfg_param.xri_used++;
6d368e53 16835 }
6d368e53
JS
16836 spin_unlock_irq(&phba->hbalock);
16837 return xri;
16838}
16839
16840/**
16841 * lpfc_sli4_free_xri - Release an xri for reuse.
16842 * @phba: pointer to lpfc hba data structure.
16843 *
16844 * This routine is invoked to release an xri to the pool of
16845 * available rpis maintained by the driver.
16846 **/
5d8b8167 16847static void
6d368e53
JS
16848__lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16849{
16850 if (test_and_clear_bit(xri, phba->sli4_hba.xri_bmask)) {
6d368e53
JS
16851 phba->sli4_hba.max_cfg_param.xri_used--;
16852 }
16853}
16854
16855/**
16856 * lpfc_sli4_free_xri - Release an xri for reuse.
16857 * @phba: pointer to lpfc hba data structure.
16858 *
16859 * This routine is invoked to release an xri to the pool of
16860 * available rpis maintained by the driver.
16861 **/
16862void
16863lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16864{
16865 spin_lock_irq(&phba->hbalock);
16866 __lpfc_sli4_free_xri(phba, xri);
16867 spin_unlock_irq(&phba->hbalock);
16868}
16869
4f774513
JS
16870/**
16871 * lpfc_sli4_next_xritag - Get an xritag for the io
16872 * @phba: Pointer to HBA context object.
16873 *
16874 * This function gets an xritag for the iocb. If there is no unused xritag
16875 * it will return 0xffff.
16876 * The function returns the allocated xritag if successful, else returns zero.
16877 * Zero is not a valid xritag.
16878 * The caller is not required to hold any lock.
16879 **/
16880uint16_t
16881lpfc_sli4_next_xritag(struct lpfc_hba *phba)
16882{
6d368e53 16883 uint16_t xri_index;
4f774513 16884
6d368e53 16885 xri_index = lpfc_sli4_alloc_xri(phba);
81378052
JS
16886 if (xri_index == NO_XRI)
16887 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
16888 "2004 Failed to allocate XRI.last XRITAG is %d"
16889 " Max XRI is %d, Used XRI is %d\n",
16890 xri_index,
16891 phba->sli4_hba.max_cfg_param.max_xri,
16892 phba->sli4_hba.max_cfg_param.xri_used);
16893 return xri_index;
4f774513
JS
16894}
16895
16896/**
895427bd 16897 * lpfc_sli4_post_sgl_list - post a block of ELS sgls to the port.
4f774513 16898 * @phba: pointer to lpfc hba data structure.
8a9d2e80
JS
16899 * @post_sgl_list: pointer to els sgl entry list.
16900 * @count: number of els sgl entries on the list.
4f774513
JS
16901 *
16902 * This routine is invoked to post a block of driver's sgl pages to the
16903 * HBA using non-embedded mailbox command. No Lock is held. This routine
16904 * is only called when the driver is loading and after all IO has been
16905 * stopped.
16906 **/
8a9d2e80 16907static int
895427bd 16908lpfc_sli4_post_sgl_list(struct lpfc_hba *phba,
8a9d2e80
JS
16909 struct list_head *post_sgl_list,
16910 int post_cnt)
4f774513 16911{
8a9d2e80 16912 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
4f774513
JS
16913 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16914 struct sgl_page_pairs *sgl_pg_pairs;
16915 void *viraddr;
16916 LPFC_MBOXQ_t *mbox;
16917 uint32_t reqlen, alloclen, pg_pairs;
16918 uint32_t mbox_tmo;
8a9d2e80
JS
16919 uint16_t xritag_start = 0;
16920 int rc = 0;
4f774513
JS
16921 uint32_t shdr_status, shdr_add_status;
16922 union lpfc_sli4_cfg_shdr *shdr;
16923
895427bd 16924 reqlen = post_cnt * sizeof(struct sgl_page_pairs) +
4f774513 16925 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16926 if (reqlen > SLI4_PAGE_SIZE) {
895427bd 16927 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4f774513
JS
16928 "2559 Block sgl registration required DMA "
16929 "size (%d) great than a page\n", reqlen);
16930 return -ENOMEM;
16931 }
895427bd 16932
4f774513 16933 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6d368e53 16934 if (!mbox)
4f774513 16935 return -ENOMEM;
4f774513
JS
16936
16937 /* Allocate DMA memory and set up the non-embedded mailbox command */
16938 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16939 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES, reqlen,
16940 LPFC_SLI4_MBX_NEMBED);
16941
16942 if (alloclen < reqlen) {
16943 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16944 "0285 Allocated DMA memory size (%d) is "
16945 "less than the requested DMA memory "
16946 "size (%d)\n", alloclen, reqlen);
16947 lpfc_sli4_mbox_cmd_free(phba, mbox);
16948 return -ENOMEM;
16949 }
4f774513 16950 /* Set up the SGL pages in the non-embedded DMA pages */
6d368e53 16951 viraddr = mbox->sge_array->addr[0];
4f774513
JS
16952 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16953 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16954
8a9d2e80
JS
16955 pg_pairs = 0;
16956 list_for_each_entry_safe(sglq_entry, sglq_next, post_sgl_list, list) {
4f774513
JS
16957 /* Set up the sge entry */
16958 sgl_pg_pairs->sgl_pg0_addr_lo =
16959 cpu_to_le32(putPaddrLow(sglq_entry->phys));
16960 sgl_pg_pairs->sgl_pg0_addr_hi =
16961 cpu_to_le32(putPaddrHigh(sglq_entry->phys));
16962 sgl_pg_pairs->sgl_pg1_addr_lo =
16963 cpu_to_le32(putPaddrLow(0));
16964 sgl_pg_pairs->sgl_pg1_addr_hi =
16965 cpu_to_le32(putPaddrHigh(0));
6d368e53 16966
4f774513
JS
16967 /* Keep the first xritag on the list */
16968 if (pg_pairs == 0)
16969 xritag_start = sglq_entry->sli4_xritag;
16970 sgl_pg_pairs++;
8a9d2e80 16971 pg_pairs++;
4f774513 16972 }
6d368e53
JS
16973
16974 /* Complete initialization and perform endian conversion. */
4f774513 16975 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
895427bd 16976 bf_set(lpfc_post_sgl_pages_xricnt, sgl, post_cnt);
4f774513 16977 sgl->word0 = cpu_to_le32(sgl->word0);
895427bd 16978
4f774513
JS
16979 if (!phba->sli4_hba.intr_enable)
16980 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16981 else {
a183a15f 16982 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16983 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16984 }
16985 shdr = (union lpfc_sli4_cfg_shdr *) &sgl->cfg_shdr;
16986 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16987 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16988 if (rc != MBX_TIMEOUT)
16989 lpfc_sli4_mbox_cmd_free(phba, mbox);
16990 if (shdr_status || shdr_add_status || rc) {
16991 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16992 "2513 POST_SGL_BLOCK mailbox command failed "
16993 "status x%x add_status x%x mbx status x%x\n",
16994 shdr_status, shdr_add_status, rc);
16995 rc = -ENXIO;
16996 }
16997 return rc;
16998}
16999
17000/**
5e5b511d 17001 * lpfc_sli4_post_io_sgl_block - post a block of nvme sgl list to firmware
4f774513 17002 * @phba: pointer to lpfc hba data structure.
0794d601 17003 * @nblist: pointer to nvme buffer list.
4f774513
JS
17004 * @count: number of scsi buffers on the list.
17005 *
17006 * This routine is invoked to post a block of @count scsi sgl pages from a
0794d601 17007 * SCSI buffer list @nblist to the HBA using non-embedded mailbox command.
4f774513
JS
17008 * No Lock is held.
17009 *
17010 **/
0794d601 17011static int
5e5b511d
JS
17012lpfc_sli4_post_io_sgl_block(struct lpfc_hba *phba, struct list_head *nblist,
17013 int count)
4f774513 17014{
c490850a 17015 struct lpfc_io_buf *lpfc_ncmd;
4f774513
JS
17016 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
17017 struct sgl_page_pairs *sgl_pg_pairs;
17018 void *viraddr;
17019 LPFC_MBOXQ_t *mbox;
17020 uint32_t reqlen, alloclen, pg_pairs;
17021 uint32_t mbox_tmo;
17022 uint16_t xritag_start = 0;
17023 int rc = 0;
17024 uint32_t shdr_status, shdr_add_status;
17025 dma_addr_t pdma_phys_bpl1;
17026 union lpfc_sli4_cfg_shdr *shdr;
17027
17028 /* Calculate the requested length of the dma memory */
8a9d2e80 17029 reqlen = count * sizeof(struct sgl_page_pairs) +
4f774513 17030 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 17031 if (reqlen > SLI4_PAGE_SIZE) {
4f774513 17032 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
0794d601 17033 "6118 Block sgl registration required DMA "
4f774513
JS
17034 "size (%d) great than a page\n", reqlen);
17035 return -ENOMEM;
17036 }
17037 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
17038 if (!mbox) {
17039 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
0794d601 17040 "6119 Failed to allocate mbox cmd memory\n");
4f774513
JS
17041 return -ENOMEM;
17042 }
17043
17044 /* Allocate DMA memory and set up the non-embedded mailbox command */
17045 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
0794d601
JS
17046 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
17047 reqlen, LPFC_SLI4_MBX_NEMBED);
4f774513
JS
17048
17049 if (alloclen < reqlen) {
17050 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
0794d601 17051 "6120 Allocated DMA memory size (%d) is "
4f774513
JS
17052 "less than the requested DMA memory "
17053 "size (%d)\n", alloclen, reqlen);
17054 lpfc_sli4_mbox_cmd_free(phba, mbox);
17055 return -ENOMEM;
17056 }
6d368e53 17057
4f774513 17058 /* Get the first SGE entry from the non-embedded DMA memory */
4f774513
JS
17059 viraddr = mbox->sge_array->addr[0];
17060
17061 /* Set up the SGL pages in the non-embedded DMA pages */
17062 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
17063 sgl_pg_pairs = &sgl->sgl_pg_pairs;
17064
17065 pg_pairs = 0;
0794d601 17066 list_for_each_entry(lpfc_ncmd, nblist, list) {
4f774513
JS
17067 /* Set up the sge entry */
17068 sgl_pg_pairs->sgl_pg0_addr_lo =
0794d601 17069 cpu_to_le32(putPaddrLow(lpfc_ncmd->dma_phys_sgl));
4f774513 17070 sgl_pg_pairs->sgl_pg0_addr_hi =
0794d601 17071 cpu_to_le32(putPaddrHigh(lpfc_ncmd->dma_phys_sgl));
4f774513 17072 if (phba->cfg_sg_dma_buf_size > SGL_PAGE_SIZE)
0794d601
JS
17073 pdma_phys_bpl1 = lpfc_ncmd->dma_phys_sgl +
17074 SGL_PAGE_SIZE;
4f774513
JS
17075 else
17076 pdma_phys_bpl1 = 0;
17077 sgl_pg_pairs->sgl_pg1_addr_lo =
17078 cpu_to_le32(putPaddrLow(pdma_phys_bpl1));
17079 sgl_pg_pairs->sgl_pg1_addr_hi =
17080 cpu_to_le32(putPaddrHigh(pdma_phys_bpl1));
17081 /* Keep the first xritag on the list */
17082 if (pg_pairs == 0)
0794d601 17083 xritag_start = lpfc_ncmd->cur_iocbq.sli4_xritag;
4f774513
JS
17084 sgl_pg_pairs++;
17085 pg_pairs++;
17086 }
17087 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
17088 bf_set(lpfc_post_sgl_pages_xricnt, sgl, pg_pairs);
17089 /* Perform endian conversion if necessary */
17090 sgl->word0 = cpu_to_le32(sgl->word0);
17091
0794d601 17092 if (!phba->sli4_hba.intr_enable) {
4f774513 17093 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
0794d601 17094 } else {
a183a15f 17095 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
17096 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
17097 }
0794d601 17098 shdr = (union lpfc_sli4_cfg_shdr *)&sgl->cfg_shdr;
4f774513
JS
17099 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
17100 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
17101 if (rc != MBX_TIMEOUT)
17102 lpfc_sli4_mbox_cmd_free(phba, mbox);
17103 if (shdr_status || shdr_add_status || rc) {
17104 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
0794d601 17105 "6125 POST_SGL_BLOCK mailbox command failed "
4f774513
JS
17106 "status x%x add_status x%x mbx status x%x\n",
17107 shdr_status, shdr_add_status, rc);
17108 rc = -ENXIO;
17109 }
17110 return rc;
17111}
17112
0794d601 17113/**
5e5b511d 17114 * lpfc_sli4_post_io_sgl_list - Post blocks of nvme buffer sgls from a list
0794d601
JS
17115 * @phba: pointer to lpfc hba data structure.
17116 * @post_nblist: pointer to the nvme buffer list.
17117 *
17118 * This routine walks a list of nvme buffers that was passed in. It attempts
17119 * to construct blocks of nvme buffer sgls which contains contiguous xris and
17120 * uses the non-embedded SGL block post mailbox commands to post to the port.
17121 * For single NVME buffer sgl with non-contiguous xri, if any, it shall use
17122 * embedded SGL post mailbox command for posting. The @post_nblist passed in
17123 * must be local list, thus no lock is needed when manipulate the list.
17124 *
17125 * Returns: 0 = failure, non-zero number of successfully posted buffers.
17126 **/
17127int
5e5b511d
JS
17128lpfc_sli4_post_io_sgl_list(struct lpfc_hba *phba,
17129 struct list_head *post_nblist, int sb_count)
0794d601 17130{
c490850a 17131 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
0794d601
JS
17132 int status, sgl_size;
17133 int post_cnt = 0, block_cnt = 0, num_posting = 0, num_posted = 0;
17134 dma_addr_t pdma_phys_sgl1;
17135 int last_xritag = NO_XRI;
17136 int cur_xritag;
0794d601
JS
17137 LIST_HEAD(prep_nblist);
17138 LIST_HEAD(blck_nblist);
17139 LIST_HEAD(nvme_nblist);
17140
17141 /* sanity check */
17142 if (sb_count <= 0)
17143 return -EINVAL;
17144
17145 sgl_size = phba->cfg_sg_dma_buf_size;
17146 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, post_nblist, list) {
17147 list_del_init(&lpfc_ncmd->list);
17148 block_cnt++;
17149 if ((last_xritag != NO_XRI) &&
17150 (lpfc_ncmd->cur_iocbq.sli4_xritag != last_xritag + 1)) {
17151 /* a hole in xri block, form a sgl posting block */
17152 list_splice_init(&prep_nblist, &blck_nblist);
17153 post_cnt = block_cnt - 1;
17154 /* prepare list for next posting block */
17155 list_add_tail(&lpfc_ncmd->list, &prep_nblist);
17156 block_cnt = 1;
17157 } else {
17158 /* prepare list for next posting block */
17159 list_add_tail(&lpfc_ncmd->list, &prep_nblist);
17160 /* enough sgls for non-embed sgl mbox command */
17161 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
17162 list_splice_init(&prep_nblist, &blck_nblist);
17163 post_cnt = block_cnt;
17164 block_cnt = 0;
17165 }
17166 }
17167 num_posting++;
17168 last_xritag = lpfc_ncmd->cur_iocbq.sli4_xritag;
17169
17170 /* end of repost sgl list condition for NVME buffers */
17171 if (num_posting == sb_count) {
17172 if (post_cnt == 0) {
17173 /* last sgl posting block */
17174 list_splice_init(&prep_nblist, &blck_nblist);
17175 post_cnt = block_cnt;
17176 } else if (block_cnt == 1) {
17177 /* last single sgl with non-contiguous xri */
17178 if (sgl_size > SGL_PAGE_SIZE)
17179 pdma_phys_sgl1 =
17180 lpfc_ncmd->dma_phys_sgl +
17181 SGL_PAGE_SIZE;
17182 else
17183 pdma_phys_sgl1 = 0;
17184 cur_xritag = lpfc_ncmd->cur_iocbq.sli4_xritag;
17185 status = lpfc_sli4_post_sgl(
17186 phba, lpfc_ncmd->dma_phys_sgl,
17187 pdma_phys_sgl1, cur_xritag);
17188 if (status) {
c490850a
JS
17189 /* Post error. Buffer unavailable. */
17190 lpfc_ncmd->flags |=
17191 LPFC_SBUF_NOT_POSTED;
0794d601 17192 } else {
c490850a
JS
17193 /* Post success. Bffer available. */
17194 lpfc_ncmd->flags &=
17195 ~LPFC_SBUF_NOT_POSTED;
0794d601
JS
17196 lpfc_ncmd->status = IOSTAT_SUCCESS;
17197 num_posted++;
17198 }
17199 /* success, put on NVME buffer sgl list */
17200 list_add_tail(&lpfc_ncmd->list, &nvme_nblist);
17201 }
17202 }
17203
17204 /* continue until a nembed page worth of sgls */
17205 if (post_cnt == 0)
17206 continue;
17207
17208 /* post block of NVME buffer list sgls */
5e5b511d
JS
17209 status = lpfc_sli4_post_io_sgl_block(phba, &blck_nblist,
17210 post_cnt);
0794d601
JS
17211
17212 /* don't reset xirtag due to hole in xri block */
17213 if (block_cnt == 0)
17214 last_xritag = NO_XRI;
4f774513 17215
0794d601
JS
17216 /* reset NVME buffer post count for next round of posting */
17217 post_cnt = 0;
4f774513 17218
0794d601
JS
17219 /* put posted NVME buffer-sgl posted on NVME buffer sgl list */
17220 while (!list_empty(&blck_nblist)) {
17221 list_remove_head(&blck_nblist, lpfc_ncmd,
c490850a 17222 struct lpfc_io_buf, list);
0794d601 17223 if (status) {
c490850a
JS
17224 /* Post error. Mark buffer unavailable. */
17225 lpfc_ncmd->flags |= LPFC_SBUF_NOT_POSTED;
0794d601 17226 } else {
c490850a
JS
17227 /* Post success, Mark buffer available. */
17228 lpfc_ncmd->flags &= ~LPFC_SBUF_NOT_POSTED;
0794d601
JS
17229 lpfc_ncmd->status = IOSTAT_SUCCESS;
17230 num_posted++;
17231 }
17232 list_add_tail(&lpfc_ncmd->list, &nvme_nblist);
17233 }
4f774513 17234 }
0794d601 17235 /* Push NVME buffers with sgl posted to the available list */
5e5b511d
JS
17236 lpfc_io_buf_replenish(phba, &nvme_nblist);
17237
0794d601 17238 return num_posted;
4f774513
JS
17239}
17240
17241/**
17242 * lpfc_fc_frame_check - Check that this frame is a valid frame to handle
17243 * @phba: pointer to lpfc_hba struct that the frame was received on
17244 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17245 *
17246 * This function checks the fields in the @fc_hdr to see if the FC frame is a
17247 * valid type of frame that the LPFC driver will handle. This function will
17248 * return a zero if the frame is a valid frame or a non zero value when the
17249 * frame does not pass the check.
17250 **/
17251static int
17252lpfc_fc_frame_check(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr)
17253{
474ffb74 17254 /* make rctl_names static to save stack space */
4f774513 17255 struct fc_vft_header *fc_vft_hdr;
546fc854 17256 uint32_t *header = (uint32_t *) fc_hdr;
4f774513 17257
e62245d9
JS
17258#define FC_RCTL_MDS_DIAGS 0xF4
17259
4f774513
JS
17260 switch (fc_hdr->fh_r_ctl) {
17261 case FC_RCTL_DD_UNCAT: /* uncategorized information */
17262 case FC_RCTL_DD_SOL_DATA: /* solicited data */
17263 case FC_RCTL_DD_UNSOL_CTL: /* unsolicited control */
17264 case FC_RCTL_DD_SOL_CTL: /* solicited control or reply */
17265 case FC_RCTL_DD_UNSOL_DATA: /* unsolicited data */
17266 case FC_RCTL_DD_DATA_DESC: /* data descriptor */
17267 case FC_RCTL_DD_UNSOL_CMD: /* unsolicited command */
17268 case FC_RCTL_DD_CMD_STATUS: /* command status */
17269 case FC_RCTL_ELS_REQ: /* extended link services request */
17270 case FC_RCTL_ELS_REP: /* extended link services reply */
17271 case FC_RCTL_ELS4_REQ: /* FC-4 ELS request */
17272 case FC_RCTL_ELS4_REP: /* FC-4 ELS reply */
17273 case FC_RCTL_BA_NOP: /* basic link service NOP */
17274 case FC_RCTL_BA_ABTS: /* basic link service abort */
17275 case FC_RCTL_BA_RMC: /* remove connection */
17276 case FC_RCTL_BA_ACC: /* basic accept */
17277 case FC_RCTL_BA_RJT: /* basic reject */
17278 case FC_RCTL_BA_PRMT:
17279 case FC_RCTL_ACK_1: /* acknowledge_1 */
17280 case FC_RCTL_ACK_0: /* acknowledge_0 */
17281 case FC_RCTL_P_RJT: /* port reject */
17282 case FC_RCTL_F_RJT: /* fabric reject */
17283 case FC_RCTL_P_BSY: /* port busy */
17284 case FC_RCTL_F_BSY: /* fabric busy to data frame */
17285 case FC_RCTL_F_BSYL: /* fabric busy to link control frame */
17286 case FC_RCTL_LCR: /* link credit reset */
ae9e28f3 17287 case FC_RCTL_MDS_DIAGS: /* MDS Diagnostics */
4f774513
JS
17288 case FC_RCTL_END: /* end */
17289 break;
17290 case FC_RCTL_VFTH: /* Virtual Fabric tagging Header */
17291 fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
17292 fc_hdr = &((struct fc_frame_header *)fc_vft_hdr)[1];
17293 return lpfc_fc_frame_check(phba, fc_hdr);
17294 default:
17295 goto drop;
17296 }
ae9e28f3 17297
4f774513
JS
17298 switch (fc_hdr->fh_type) {
17299 case FC_TYPE_BLS:
17300 case FC_TYPE_ELS:
17301 case FC_TYPE_FCP:
17302 case FC_TYPE_CT:
895427bd 17303 case FC_TYPE_NVME:
4f774513
JS
17304 break;
17305 case FC_TYPE_IP:
17306 case FC_TYPE_ILS:
17307 default:
17308 goto drop;
17309 }
546fc854 17310
4f774513 17311 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
78e1d200 17312 "2538 Received frame rctl:x%x, type:x%x, "
88f43a08 17313 "frame Data:%08x %08x %08x %08x %08x %08x %08x\n",
78e1d200
JS
17314 fc_hdr->fh_r_ctl, fc_hdr->fh_type,
17315 be32_to_cpu(header[0]), be32_to_cpu(header[1]),
17316 be32_to_cpu(header[2]), be32_to_cpu(header[3]),
17317 be32_to_cpu(header[4]), be32_to_cpu(header[5]),
17318 be32_to_cpu(header[6]));
4f774513
JS
17319 return 0;
17320drop:
17321 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS,
78e1d200
JS
17322 "2539 Dropped frame rctl:x%x type:x%x\n",
17323 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
4f774513
JS
17324 return 1;
17325}
17326
17327/**
17328 * lpfc_fc_hdr_get_vfi - Get the VFI from an FC frame
17329 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17330 *
17331 * This function processes the FC header to retrieve the VFI from the VF
17332 * header, if one exists. This function will return the VFI if one exists
17333 * or 0 if no VSAN Header exists.
17334 **/
17335static uint32_t
17336lpfc_fc_hdr_get_vfi(struct fc_frame_header *fc_hdr)
17337{
17338 struct fc_vft_header *fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
17339
17340 if (fc_hdr->fh_r_ctl != FC_RCTL_VFTH)
17341 return 0;
17342 return bf_get(fc_vft_hdr_vf_id, fc_vft_hdr);
17343}
17344
17345/**
17346 * lpfc_fc_frame_to_vport - Finds the vport that a frame is destined to
17347 * @phba: Pointer to the HBA structure to search for the vport on
17348 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
17349 * @fcfi: The FC Fabric ID that the frame came from
17350 *
17351 * This function searches the @phba for a vport that matches the content of the
17352 * @fc_hdr passed in and the @fcfi. This function uses the @fc_hdr to fetch the
17353 * VFI, if the Virtual Fabric Tagging Header exists, and the DID. This function
17354 * returns the matching vport pointer or NULL if unable to match frame to a
17355 * vport.
17356 **/
17357static struct lpfc_vport *
17358lpfc_fc_frame_to_vport(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr,
895427bd 17359 uint16_t fcfi, uint32_t did)
4f774513
JS
17360{
17361 struct lpfc_vport **vports;
17362 struct lpfc_vport *vport = NULL;
17363 int i;
939723a4 17364
bf08611b
JS
17365 if (did == Fabric_DID)
17366 return phba->pport;
939723a4
JS
17367 if ((phba->pport->fc_flag & FC_PT2PT) &&
17368 !(phba->link_state == LPFC_HBA_READY))
17369 return phba->pport;
17370
4f774513 17371 vports = lpfc_create_vport_work_array(phba);
895427bd 17372 if (vports != NULL) {
4f774513
JS
17373 for (i = 0; i <= phba->max_vpi && vports[i] != NULL; i++) {
17374 if (phba->fcf.fcfi == fcfi &&
17375 vports[i]->vfi == lpfc_fc_hdr_get_vfi(fc_hdr) &&
17376 vports[i]->fc_myDID == did) {
17377 vport = vports[i];
17378 break;
17379 }
17380 }
895427bd 17381 }
4f774513
JS
17382 lpfc_destroy_vport_work_array(phba, vports);
17383 return vport;
17384}
17385
45ed1190
JS
17386/**
17387 * lpfc_update_rcv_time_stamp - Update vport's rcv seq time stamp
17388 * @vport: The vport to work on.
17389 *
17390 * This function updates the receive sequence time stamp for this vport. The
17391 * receive sequence time stamp indicates the time that the last frame of the
17392 * the sequence that has been idle for the longest amount of time was received.
17393 * the driver uses this time stamp to indicate if any received sequences have
17394 * timed out.
17395 **/
5d8b8167 17396static void
45ed1190
JS
17397lpfc_update_rcv_time_stamp(struct lpfc_vport *vport)
17398{
17399 struct lpfc_dmabuf *h_buf;
17400 struct hbq_dmabuf *dmabuf = NULL;
17401
17402 /* get the oldest sequence on the rcv list */
17403 h_buf = list_get_first(&vport->rcv_buffer_list,
17404 struct lpfc_dmabuf, list);
17405 if (!h_buf)
17406 return;
17407 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17408 vport->rcv_buffer_time_stamp = dmabuf->time_stamp;
17409}
17410
17411/**
17412 * lpfc_cleanup_rcv_buffers - Cleans up all outstanding receive sequences.
17413 * @vport: The vport that the received sequences were sent to.
17414 *
17415 * This function cleans up all outstanding received sequences. This is called
17416 * by the driver when a link event or user action invalidates all the received
17417 * sequences.
17418 **/
17419void
17420lpfc_cleanup_rcv_buffers(struct lpfc_vport *vport)
17421{
17422 struct lpfc_dmabuf *h_buf, *hnext;
17423 struct lpfc_dmabuf *d_buf, *dnext;
17424 struct hbq_dmabuf *dmabuf = NULL;
17425
17426 /* start with the oldest sequence on the rcv list */
17427 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17428 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17429 list_del_init(&dmabuf->hbuf.list);
17430 list_for_each_entry_safe(d_buf, dnext,
17431 &dmabuf->dbuf.list, list) {
17432 list_del_init(&d_buf->list);
17433 lpfc_in_buf_free(vport->phba, d_buf);
17434 }
17435 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17436 }
17437}
17438
17439/**
17440 * lpfc_rcv_seq_check_edtov - Cleans up timed out receive sequences.
17441 * @vport: The vport that the received sequences were sent to.
17442 *
17443 * This function determines whether any received sequences have timed out by
17444 * first checking the vport's rcv_buffer_time_stamp. If this time_stamp
17445 * indicates that there is at least one timed out sequence this routine will
17446 * go through the received sequences one at a time from most inactive to most
17447 * active to determine which ones need to be cleaned up. Once it has determined
17448 * that a sequence needs to be cleaned up it will simply free up the resources
17449 * without sending an abort.
17450 **/
17451void
17452lpfc_rcv_seq_check_edtov(struct lpfc_vport *vport)
17453{
17454 struct lpfc_dmabuf *h_buf, *hnext;
17455 struct lpfc_dmabuf *d_buf, *dnext;
17456 struct hbq_dmabuf *dmabuf = NULL;
17457 unsigned long timeout;
17458 int abort_count = 0;
17459
17460 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17461 vport->rcv_buffer_time_stamp);
17462 if (list_empty(&vport->rcv_buffer_list) ||
17463 time_before(jiffies, timeout))
17464 return;
17465 /* start with the oldest sequence on the rcv list */
17466 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17467 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17468 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17469 dmabuf->time_stamp);
17470 if (time_before(jiffies, timeout))
17471 break;
17472 abort_count++;
17473 list_del_init(&dmabuf->hbuf.list);
17474 list_for_each_entry_safe(d_buf, dnext,
17475 &dmabuf->dbuf.list, list) {
17476 list_del_init(&d_buf->list);
17477 lpfc_in_buf_free(vport->phba, d_buf);
17478 }
17479 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17480 }
17481 if (abort_count)
17482 lpfc_update_rcv_time_stamp(vport);
17483}
17484
4f774513
JS
17485/**
17486 * lpfc_fc_frame_add - Adds a frame to the vport's list of received sequences
17487 * @dmabuf: pointer to a dmabuf that describes the hdr and data of the FC frame
17488 *
17489 * This function searches through the existing incomplete sequences that have
17490 * been sent to this @vport. If the frame matches one of the incomplete
17491 * sequences then the dbuf in the @dmabuf is added to the list of frames that
17492 * make up that sequence. If no sequence is found that matches this frame then
17493 * the function will add the hbuf in the @dmabuf to the @vport's rcv_buffer_list
17494 * This function returns a pointer to the first dmabuf in the sequence list that
17495 * the frame was linked to.
17496 **/
17497static struct hbq_dmabuf *
17498lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17499{
17500 struct fc_frame_header *new_hdr;
17501 struct fc_frame_header *temp_hdr;
17502 struct lpfc_dmabuf *d_buf;
17503 struct lpfc_dmabuf *h_buf;
17504 struct hbq_dmabuf *seq_dmabuf = NULL;
17505 struct hbq_dmabuf *temp_dmabuf = NULL;
4360ca9c 17506 uint8_t found = 0;
4f774513 17507
4d9ab994 17508 INIT_LIST_HEAD(&dmabuf->dbuf.list);
45ed1190 17509 dmabuf->time_stamp = jiffies;
4f774513 17510 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
4360ca9c 17511
4f774513
JS
17512 /* Use the hdr_buf to find the sequence that this frame belongs to */
17513 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17514 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17515 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17516 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17517 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17518 continue;
17519 /* found a pending sequence that matches this frame */
17520 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17521 break;
17522 }
17523 if (!seq_dmabuf) {
17524 /*
17525 * This indicates first frame received for this sequence.
17526 * Queue the buffer on the vport's rcv_buffer_list.
17527 */
17528 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
45ed1190 17529 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17530 return dmabuf;
17531 }
17532 temp_hdr = seq_dmabuf->hbuf.virt;
eeead811
JS
17533 if (be16_to_cpu(new_hdr->fh_seq_cnt) <
17534 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4d9ab994
JS
17535 list_del_init(&seq_dmabuf->hbuf.list);
17536 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
17537 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
45ed1190 17538 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17539 return dmabuf;
17540 }
45ed1190
JS
17541 /* move this sequence to the tail to indicate a young sequence */
17542 list_move_tail(&seq_dmabuf->hbuf.list, &vport->rcv_buffer_list);
17543 seq_dmabuf->time_stamp = jiffies;
17544 lpfc_update_rcv_time_stamp(vport);
eeead811
JS
17545 if (list_empty(&seq_dmabuf->dbuf.list)) {
17546 temp_hdr = dmabuf->hbuf.virt;
17547 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
17548 return seq_dmabuf;
17549 }
4f774513 17550 /* find the correct place in the sequence to insert this frame */
4360ca9c
JS
17551 d_buf = list_entry(seq_dmabuf->dbuf.list.prev, typeof(*d_buf), list);
17552 while (!found) {
4f774513
JS
17553 temp_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17554 temp_hdr = (struct fc_frame_header *)temp_dmabuf->hbuf.virt;
17555 /*
17556 * If the frame's sequence count is greater than the frame on
17557 * the list then insert the frame right after this frame
17558 */
eeead811
JS
17559 if (be16_to_cpu(new_hdr->fh_seq_cnt) >
17560 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4f774513 17561 list_add(&dmabuf->dbuf.list, &temp_dmabuf->dbuf.list);
4360ca9c
JS
17562 found = 1;
17563 break;
4f774513 17564 }
4360ca9c
JS
17565
17566 if (&d_buf->list == &seq_dmabuf->dbuf.list)
17567 break;
17568 d_buf = list_entry(d_buf->list.prev, typeof(*d_buf), list);
4f774513 17569 }
4360ca9c
JS
17570
17571 if (found)
17572 return seq_dmabuf;
4f774513
JS
17573 return NULL;
17574}
17575
6669f9bb
JS
17576/**
17577 * lpfc_sli4_abort_partial_seq - Abort partially assembled unsol sequence
17578 * @vport: pointer to a vitural port
17579 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17580 *
17581 * This function tries to abort from the partially assembed sequence, described
17582 * by the information from basic abbort @dmabuf. It checks to see whether such
17583 * partially assembled sequence held by the driver. If so, it shall free up all
17584 * the frames from the partially assembled sequence.
17585 *
17586 * Return
17587 * true -- if there is matching partially assembled sequence present and all
17588 * the frames freed with the sequence;
17589 * false -- if there is no matching partially assembled sequence present so
17590 * nothing got aborted in the lower layer driver
17591 **/
17592static bool
17593lpfc_sli4_abort_partial_seq(struct lpfc_vport *vport,
17594 struct hbq_dmabuf *dmabuf)
17595{
17596 struct fc_frame_header *new_hdr;
17597 struct fc_frame_header *temp_hdr;
17598 struct lpfc_dmabuf *d_buf, *n_buf, *h_buf;
17599 struct hbq_dmabuf *seq_dmabuf = NULL;
17600
17601 /* Use the hdr_buf to find the sequence that matches this frame */
17602 INIT_LIST_HEAD(&dmabuf->dbuf.list);
17603 INIT_LIST_HEAD(&dmabuf->hbuf.list);
17604 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17605 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17606 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17607 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17608 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17609 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17610 continue;
17611 /* found a pending sequence that matches this frame */
17612 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17613 break;
17614 }
17615
17616 /* Free up all the frames from the partially assembled sequence */
17617 if (seq_dmabuf) {
17618 list_for_each_entry_safe(d_buf, n_buf,
17619 &seq_dmabuf->dbuf.list, list) {
17620 list_del_init(&d_buf->list);
17621 lpfc_in_buf_free(vport->phba, d_buf);
17622 }
17623 return true;
17624 }
17625 return false;
17626}
17627
6dd9e31c
JS
17628/**
17629 * lpfc_sli4_abort_ulp_seq - Abort assembled unsol sequence from ulp
17630 * @vport: pointer to a vitural port
17631 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17632 *
17633 * This function tries to abort from the assembed sequence from upper level
17634 * protocol, described by the information from basic abbort @dmabuf. It
17635 * checks to see whether such pending context exists at upper level protocol.
17636 * If so, it shall clean up the pending context.
17637 *
17638 * Return
17639 * true -- if there is matching pending context of the sequence cleaned
17640 * at ulp;
17641 * false -- if there is no matching pending context of the sequence present
17642 * at ulp.
17643 **/
17644static bool
17645lpfc_sli4_abort_ulp_seq(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17646{
17647 struct lpfc_hba *phba = vport->phba;
17648 int handled;
17649
17650 /* Accepting abort at ulp with SLI4 only */
17651 if (phba->sli_rev < LPFC_SLI_REV4)
17652 return false;
17653
17654 /* Register all caring upper level protocols to attend abort */
17655 handled = lpfc_ct_handle_unsol_abort(phba, dmabuf);
17656 if (handled)
17657 return true;
17658
17659 return false;
17660}
17661
6669f9bb 17662/**
546fc854 17663 * lpfc_sli4_seq_abort_rsp_cmpl - BLS ABORT RSP seq abort iocb complete handler
6669f9bb
JS
17664 * @phba: Pointer to HBA context object.
17665 * @cmd_iocbq: pointer to the command iocbq structure.
17666 * @rsp_iocbq: pointer to the response iocbq structure.
17667 *
546fc854 17668 * This function handles the sequence abort response iocb command complete
6669f9bb
JS
17669 * event. It properly releases the memory allocated to the sequence abort
17670 * accept iocb.
17671 **/
17672static void
546fc854 17673lpfc_sli4_seq_abort_rsp_cmpl(struct lpfc_hba *phba,
6669f9bb
JS
17674 struct lpfc_iocbq *cmd_iocbq,
17675 struct lpfc_iocbq *rsp_iocbq)
17676{
6dd9e31c
JS
17677 struct lpfc_nodelist *ndlp;
17678
17679 if (cmd_iocbq) {
17680 ndlp = (struct lpfc_nodelist *)cmd_iocbq->context1;
17681 lpfc_nlp_put(ndlp);
17682 lpfc_nlp_not_used(ndlp);
6669f9bb 17683 lpfc_sli_release_iocbq(phba, cmd_iocbq);
6dd9e31c 17684 }
6b5151fd
JS
17685
17686 /* Failure means BLS ABORT RSP did not get delivered to remote node*/
17687 if (rsp_iocbq && rsp_iocbq->iocb.ulpStatus)
17688 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17689 "3154 BLS ABORT RSP failed, data: x%x/x%x\n",
17690 rsp_iocbq->iocb.ulpStatus,
17691 rsp_iocbq->iocb.un.ulpWord[4]);
6669f9bb
JS
17692}
17693
6d368e53
JS
17694/**
17695 * lpfc_sli4_xri_inrange - check xri is in range of xris owned by driver.
17696 * @phba: Pointer to HBA context object.
17697 * @xri: xri id in transaction.
17698 *
17699 * This function validates the xri maps to the known range of XRIs allocated an
17700 * used by the driver.
17701 **/
7851fe2c 17702uint16_t
6d368e53
JS
17703lpfc_sli4_xri_inrange(struct lpfc_hba *phba,
17704 uint16_t xri)
17705{
a2fc4aef 17706 uint16_t i;
6d368e53
JS
17707
17708 for (i = 0; i < phba->sli4_hba.max_cfg_param.max_xri; i++) {
17709 if (xri == phba->sli4_hba.xri_ids[i])
17710 return i;
17711 }
17712 return NO_XRI;
17713}
17714
6669f9bb 17715/**
546fc854 17716 * lpfc_sli4_seq_abort_rsp - bls rsp to sequence abort
6669f9bb
JS
17717 * @phba: Pointer to HBA context object.
17718 * @fc_hdr: pointer to a FC frame header.
17719 *
546fc854 17720 * This function sends a basic response to a previous unsol sequence abort
6669f9bb
JS
17721 * event after aborting the sequence handling.
17722 **/
86c67379 17723void
6dd9e31c
JS
17724lpfc_sli4_seq_abort_rsp(struct lpfc_vport *vport,
17725 struct fc_frame_header *fc_hdr, bool aborted)
6669f9bb 17726{
6dd9e31c 17727 struct lpfc_hba *phba = vport->phba;
6669f9bb
JS
17728 struct lpfc_iocbq *ctiocb = NULL;
17729 struct lpfc_nodelist *ndlp;
ee0f4fe1 17730 uint16_t oxid, rxid, xri, lxri;
5ffc266e 17731 uint32_t sid, fctl;
6669f9bb 17732 IOCB_t *icmd;
546fc854 17733 int rc;
6669f9bb
JS
17734
17735 if (!lpfc_is_link_up(phba))
17736 return;
17737
17738 sid = sli4_sid_from_fc_hdr(fc_hdr);
17739 oxid = be16_to_cpu(fc_hdr->fh_ox_id);
5ffc266e 17740 rxid = be16_to_cpu(fc_hdr->fh_rx_id);
6669f9bb 17741
6dd9e31c 17742 ndlp = lpfc_findnode_did(vport, sid);
6669f9bb 17743 if (!ndlp) {
9d3d340d 17744 ndlp = lpfc_nlp_init(vport, sid);
6dd9e31c
JS
17745 if (!ndlp) {
17746 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17747 "1268 Failed to allocate ndlp for "
17748 "oxid:x%x SID:x%x\n", oxid, sid);
17749 return;
17750 }
6dd9e31c
JS
17751 /* Put ndlp onto pport node list */
17752 lpfc_enqueue_node(vport, ndlp);
17753 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
17754 /* re-setup ndlp without removing from node list */
17755 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
17756 if (!ndlp) {
17757 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17758 "3275 Failed to active ndlp found "
17759 "for oxid:x%x SID:x%x\n", oxid, sid);
17760 return;
17761 }
6669f9bb
JS
17762 }
17763
546fc854 17764 /* Allocate buffer for rsp iocb */
6669f9bb
JS
17765 ctiocb = lpfc_sli_get_iocbq(phba);
17766 if (!ctiocb)
17767 return;
17768
5ffc266e
JS
17769 /* Extract the F_CTL field from FC_HDR */
17770 fctl = sli4_fctl_from_fc_hdr(fc_hdr);
17771
6669f9bb 17772 icmd = &ctiocb->iocb;
6669f9bb 17773 icmd->un.xseq64.bdl.bdeSize = 0;
5ffc266e 17774 icmd->un.xseq64.bdl.ulpIoTag32 = 0;
6669f9bb
JS
17775 icmd->un.xseq64.w5.hcsw.Dfctl = 0;
17776 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_ACC;
17777 icmd->un.xseq64.w5.hcsw.Type = FC_TYPE_BLS;
17778
17779 /* Fill in the rest of iocb fields */
17780 icmd->ulpCommand = CMD_XMIT_BLS_RSP64_CX;
17781 icmd->ulpBdeCount = 0;
17782 icmd->ulpLe = 1;
17783 icmd->ulpClass = CLASS3;
6d368e53 17784 icmd->ulpContext = phba->sli4_hba.rpi_ids[ndlp->nlp_rpi];
6dd9e31c 17785 ctiocb->context1 = lpfc_nlp_get(ndlp);
6669f9bb 17786
6669f9bb 17787 ctiocb->vport = phba->pport;
546fc854 17788 ctiocb->iocb_cmpl = lpfc_sli4_seq_abort_rsp_cmpl;
6d368e53 17789 ctiocb->sli4_lxritag = NO_XRI;
546fc854
JS
17790 ctiocb->sli4_xritag = NO_XRI;
17791
ee0f4fe1
JS
17792 if (fctl & FC_FC_EX_CTX)
17793 /* Exchange responder sent the abort so we
17794 * own the oxid.
17795 */
17796 xri = oxid;
17797 else
17798 xri = rxid;
17799 lxri = lpfc_sli4_xri_inrange(phba, xri);
17800 if (lxri != NO_XRI)
17801 lpfc_set_rrq_active(phba, ndlp, lxri,
17802 (xri == oxid) ? rxid : oxid, 0);
6dd9e31c
JS
17803 /* For BA_ABTS from exchange responder, if the logical xri with
17804 * the oxid maps to the FCP XRI range, the port no longer has
17805 * that exchange context, send a BLS_RJT. Override the IOCB for
17806 * a BA_RJT.
17807 */
17808 if ((fctl & FC_FC_EX_CTX) &&
895427bd 17809 (lxri > lpfc_sli4_get_iocb_cnt(phba))) {
6dd9e31c
JS
17810 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17811 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17812 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17813 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17814 }
17815
17816 /* If BA_ABTS failed to abort a partially assembled receive sequence,
17817 * the driver no longer has that exchange, send a BLS_RJT. Override
17818 * the IOCB for a BA_RJT.
546fc854 17819 */
6dd9e31c 17820 if (aborted == false) {
546fc854
JS
17821 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17822 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17823 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17824 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17825 }
6669f9bb 17826
5ffc266e
JS
17827 if (fctl & FC_FC_EX_CTX) {
17828 /* ABTS sent by responder to CT exchange, construction
17829 * of BA_ACC will use OX_ID from ABTS for the XRI_TAG
17830 * field and RX_ID from ABTS for RX_ID field.
17831 */
546fc854 17832 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_RSP);
5ffc266e
JS
17833 } else {
17834 /* ABTS sent by initiator to CT exchange, construction
17835 * of BA_ACC will need to allocate a new XRI as for the
f09c3acc 17836 * XRI_TAG field.
5ffc266e 17837 */
546fc854 17838 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_INT);
5ffc266e 17839 }
f09c3acc 17840 bf_set(lpfc_abts_rxid, &icmd->un.bls_rsp, rxid);
546fc854 17841 bf_set(lpfc_abts_oxid, &icmd->un.bls_rsp, oxid);
5ffc266e 17842
546fc854 17843 /* Xmit CT abts response on exchange <xid> */
6dd9e31c
JS
17844 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,
17845 "1200 Send BLS cmd x%x on oxid x%x Data: x%x\n",
17846 icmd->un.xseq64.w5.hcsw.Rctl, oxid, phba->link_state);
546fc854
JS
17847
17848 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, ctiocb, 0);
17849 if (rc == IOCB_ERROR) {
6dd9e31c
JS
17850 lpfc_printf_vlog(vport, KERN_ERR, LOG_ELS,
17851 "2925 Failed to issue CT ABTS RSP x%x on "
17852 "xri x%x, Data x%x\n",
17853 icmd->un.xseq64.w5.hcsw.Rctl, oxid,
17854 phba->link_state);
17855 lpfc_nlp_put(ndlp);
17856 ctiocb->context1 = NULL;
546fc854
JS
17857 lpfc_sli_release_iocbq(phba, ctiocb);
17858 }
6669f9bb
JS
17859}
17860
17861/**
17862 * lpfc_sli4_handle_unsol_abort - Handle sli-4 unsolicited abort event
17863 * @vport: Pointer to the vport on which this sequence was received
17864 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17865 *
17866 * This function handles an SLI-4 unsolicited abort event. If the unsolicited
17867 * receive sequence is only partially assembed by the driver, it shall abort
17868 * the partially assembled frames for the sequence. Otherwise, if the
17869 * unsolicited receive sequence has been completely assembled and passed to
17870 * the Upper Layer Protocol (UPL), it then mark the per oxid status for the
17871 * unsolicited sequence has been aborted. After that, it will issue a basic
17872 * accept to accept the abort.
17873 **/
5d8b8167 17874static void
6669f9bb
JS
17875lpfc_sli4_handle_unsol_abort(struct lpfc_vport *vport,
17876 struct hbq_dmabuf *dmabuf)
17877{
17878 struct lpfc_hba *phba = vport->phba;
17879 struct fc_frame_header fc_hdr;
5ffc266e 17880 uint32_t fctl;
6dd9e31c 17881 bool aborted;
6669f9bb 17882
6669f9bb
JS
17883 /* Make a copy of fc_hdr before the dmabuf being released */
17884 memcpy(&fc_hdr, dmabuf->hbuf.virt, sizeof(struct fc_frame_header));
5ffc266e 17885 fctl = sli4_fctl_from_fc_hdr(&fc_hdr);
6669f9bb 17886
5ffc266e 17887 if (fctl & FC_FC_EX_CTX) {
6dd9e31c
JS
17888 /* ABTS by responder to exchange, no cleanup needed */
17889 aborted = true;
5ffc266e 17890 } else {
6dd9e31c
JS
17891 /* ABTS by initiator to exchange, need to do cleanup */
17892 aborted = lpfc_sli4_abort_partial_seq(vport, dmabuf);
17893 if (aborted == false)
17894 aborted = lpfc_sli4_abort_ulp_seq(vport, dmabuf);
5ffc266e 17895 }
6dd9e31c
JS
17896 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17897
86c67379
JS
17898 if (phba->nvmet_support) {
17899 lpfc_nvmet_rcv_unsol_abort(vport, &fc_hdr);
17900 return;
17901 }
17902
6dd9e31c
JS
17903 /* Respond with BA_ACC or BA_RJT accordingly */
17904 lpfc_sli4_seq_abort_rsp(vport, &fc_hdr, aborted);
6669f9bb
JS
17905}
17906
4f774513
JS
17907/**
17908 * lpfc_seq_complete - Indicates if a sequence is complete
17909 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17910 *
17911 * This function checks the sequence, starting with the frame described by
17912 * @dmabuf, to see if all the frames associated with this sequence are present.
17913 * the frames associated with this sequence are linked to the @dmabuf using the
17914 * dbuf list. This function looks for two major things. 1) That the first frame
17915 * has a sequence count of zero. 2) There is a frame with last frame of sequence
17916 * set. 3) That there are no holes in the sequence count. The function will
17917 * return 1 when the sequence is complete, otherwise it will return 0.
17918 **/
17919static int
17920lpfc_seq_complete(struct hbq_dmabuf *dmabuf)
17921{
17922 struct fc_frame_header *hdr;
17923 struct lpfc_dmabuf *d_buf;
17924 struct hbq_dmabuf *seq_dmabuf;
17925 uint32_t fctl;
17926 int seq_count = 0;
17927
17928 hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17929 /* make sure first fame of sequence has a sequence count of zero */
17930 if (hdr->fh_seq_cnt != seq_count)
17931 return 0;
17932 fctl = (hdr->fh_f_ctl[0] << 16 |
17933 hdr->fh_f_ctl[1] << 8 |
17934 hdr->fh_f_ctl[2]);
17935 /* If last frame of sequence we can return success. */
17936 if (fctl & FC_FC_END_SEQ)
17937 return 1;
17938 list_for_each_entry(d_buf, &dmabuf->dbuf.list, list) {
17939 seq_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17940 hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17941 /* If there is a hole in the sequence count then fail. */
eeead811 17942 if (++seq_count != be16_to_cpu(hdr->fh_seq_cnt))
4f774513
JS
17943 return 0;
17944 fctl = (hdr->fh_f_ctl[0] << 16 |
17945 hdr->fh_f_ctl[1] << 8 |
17946 hdr->fh_f_ctl[2]);
17947 /* If last frame of sequence we can return success. */
17948 if (fctl & FC_FC_END_SEQ)
17949 return 1;
17950 }
17951 return 0;
17952}
17953
17954/**
17955 * lpfc_prep_seq - Prep sequence for ULP processing
17956 * @vport: Pointer to the vport on which this sequence was received
17957 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17958 *
17959 * This function takes a sequence, described by a list of frames, and creates
17960 * a list of iocbq structures to describe the sequence. This iocbq list will be
17961 * used to issue to the generic unsolicited sequence handler. This routine
17962 * returns a pointer to the first iocbq in the list. If the function is unable
17963 * to allocate an iocbq then it throw out the received frames that were not
17964 * able to be described and return a pointer to the first iocbq. If unable to
17965 * allocate any iocbqs (including the first) this function will return NULL.
17966 **/
17967static struct lpfc_iocbq *
17968lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
17969{
7851fe2c 17970 struct hbq_dmabuf *hbq_buf;
4f774513
JS
17971 struct lpfc_dmabuf *d_buf, *n_buf;
17972 struct lpfc_iocbq *first_iocbq, *iocbq;
17973 struct fc_frame_header *fc_hdr;
17974 uint32_t sid;
7851fe2c 17975 uint32_t len, tot_len;
eeead811 17976 struct ulp_bde64 *pbde;
4f774513
JS
17977
17978 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17979 /* remove from receive buffer list */
17980 list_del_init(&seq_dmabuf->hbuf.list);
45ed1190 17981 lpfc_update_rcv_time_stamp(vport);
4f774513 17982 /* get the Remote Port's SID */
6669f9bb 17983 sid = sli4_sid_from_fc_hdr(fc_hdr);
7851fe2c 17984 tot_len = 0;
4f774513
JS
17985 /* Get an iocbq struct to fill in. */
17986 first_iocbq = lpfc_sli_get_iocbq(vport->phba);
17987 if (first_iocbq) {
17988 /* Initialize the first IOCB. */
8fa38513 17989 first_iocbq->iocb.unsli3.rcvsli3.acc_len = 0;
4f774513 17990 first_iocbq->iocb.ulpStatus = IOSTAT_SUCCESS;
895427bd 17991 first_iocbq->vport = vport;
939723a4
JS
17992
17993 /* Check FC Header to see what TYPE of frame we are rcv'ing */
17994 if (sli4_type_from_fc_hdr(fc_hdr) == FC_TYPE_ELS) {
17995 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_ELS64_CX;
17996 first_iocbq->iocb.un.rcvels.parmRo =
17997 sli4_did_from_fc_hdr(fc_hdr);
17998 first_iocbq->iocb.ulpPU = PARM_NPIV_DID;
17999 } else
18000 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_SEQ64_CX;
7851fe2c
JS
18001 first_iocbq->iocb.ulpContext = NO_XRI;
18002 first_iocbq->iocb.unsli3.rcvsli3.ox_id =
18003 be16_to_cpu(fc_hdr->fh_ox_id);
18004 /* iocbq is prepped for internal consumption. Physical vpi. */
18005 first_iocbq->iocb.unsli3.rcvsli3.vpi =
18006 vport->phba->vpi_ids[vport->vpi];
4f774513 18007 /* put the first buffer into the first IOCBq */
48a5a664
JS
18008 tot_len = bf_get(lpfc_rcqe_length,
18009 &seq_dmabuf->cq_event.cqe.rcqe_cmpl);
18010
4f774513
JS
18011 first_iocbq->context2 = &seq_dmabuf->dbuf;
18012 first_iocbq->context3 = NULL;
18013 first_iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
18014 if (tot_len > LPFC_DATA_BUF_SIZE)
18015 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 18016 LPFC_DATA_BUF_SIZE;
48a5a664
JS
18017 else
18018 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize = tot_len;
18019
4f774513 18020 first_iocbq->iocb.un.rcvels.remoteID = sid;
48a5a664 18021
7851fe2c 18022 first_iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
4f774513
JS
18023 }
18024 iocbq = first_iocbq;
18025 /*
18026 * Each IOCBq can have two Buffers assigned, so go through the list
18027 * of buffers for this sequence and save two buffers in each IOCBq
18028 */
18029 list_for_each_entry_safe(d_buf, n_buf, &seq_dmabuf->dbuf.list, list) {
18030 if (!iocbq) {
18031 lpfc_in_buf_free(vport->phba, d_buf);
18032 continue;
18033 }
18034 if (!iocbq->context3) {
18035 iocbq->context3 = d_buf;
18036 iocbq->iocb.ulpBdeCount++;
7851fe2c
JS
18037 /* We need to get the size out of the right CQE */
18038 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
18039 len = bf_get(lpfc_rcqe_length,
18040 &hbq_buf->cq_event.cqe.rcqe_cmpl);
48a5a664
JS
18041 pbde = (struct ulp_bde64 *)
18042 &iocbq->iocb.unsli3.sli3Words[4];
18043 if (len > LPFC_DATA_BUF_SIZE)
18044 pbde->tus.f.bdeSize = LPFC_DATA_BUF_SIZE;
18045 else
18046 pbde->tus.f.bdeSize = len;
18047
7851fe2c
JS
18048 iocbq->iocb.unsli3.rcvsli3.acc_len += len;
18049 tot_len += len;
4f774513
JS
18050 } else {
18051 iocbq = lpfc_sli_get_iocbq(vport->phba);
18052 if (!iocbq) {
18053 if (first_iocbq) {
18054 first_iocbq->iocb.ulpStatus =
18055 IOSTAT_FCP_RSP_ERROR;
18056 first_iocbq->iocb.un.ulpWord[4] =
18057 IOERR_NO_RESOURCES;
18058 }
18059 lpfc_in_buf_free(vport->phba, d_buf);
18060 continue;
18061 }
48a5a664
JS
18062 /* We need to get the size out of the right CQE */
18063 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
18064 len = bf_get(lpfc_rcqe_length,
18065 &hbq_buf->cq_event.cqe.rcqe_cmpl);
4f774513
JS
18066 iocbq->context2 = d_buf;
18067 iocbq->context3 = NULL;
18068 iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
18069 if (len > LPFC_DATA_BUF_SIZE)
18070 iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 18071 LPFC_DATA_BUF_SIZE;
48a5a664
JS
18072 else
18073 iocbq->iocb.un.cont64[0].tus.f.bdeSize = len;
7851fe2c 18074
7851fe2c
JS
18075 tot_len += len;
18076 iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
18077
4f774513
JS
18078 iocbq->iocb.un.rcvels.remoteID = sid;
18079 list_add_tail(&iocbq->list, &first_iocbq->list);
18080 }
18081 }
39c4f1a9
JS
18082 /* Free the sequence's header buffer */
18083 if (!first_iocbq)
18084 lpfc_in_buf_free(vport->phba, &seq_dmabuf->dbuf);
18085
4f774513
JS
18086 return first_iocbq;
18087}
18088
6669f9bb
JS
18089static void
18090lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *vport,
18091 struct hbq_dmabuf *seq_dmabuf)
18092{
18093 struct fc_frame_header *fc_hdr;
18094 struct lpfc_iocbq *iocbq, *curr_iocb, *next_iocb;
18095 struct lpfc_hba *phba = vport->phba;
18096
18097 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
18098 iocbq = lpfc_prep_seq(vport, seq_dmabuf);
18099 if (!iocbq) {
18100 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18101 "2707 Ring %d handler: Failed to allocate "
18102 "iocb Rctl x%x Type x%x received\n",
18103 LPFC_ELS_RING,
18104 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
18105 return;
18106 }
18107 if (!lpfc_complete_unsol_iocb(phba,
895427bd 18108 phba->sli4_hba.els_wq->pring,
6669f9bb
JS
18109 iocbq, fc_hdr->fh_r_ctl,
18110 fc_hdr->fh_type))
6d368e53 18111 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6669f9bb
JS
18112 "2540 Ring %d handler: unexpected Rctl "
18113 "x%x Type x%x received\n",
18114 LPFC_ELS_RING,
18115 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
18116
18117 /* Free iocb created in lpfc_prep_seq */
18118 list_for_each_entry_safe(curr_iocb, next_iocb,
18119 &iocbq->list, list) {
18120 list_del_init(&curr_iocb->list);
18121 lpfc_sli_release_iocbq(phba, curr_iocb);
18122 }
18123 lpfc_sli_release_iocbq(phba, iocbq);
18124}
18125
ae9e28f3
JS
18126static void
18127lpfc_sli4_mds_loopback_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
18128 struct lpfc_iocbq *rspiocb)
18129{
18130 struct lpfc_dmabuf *pcmd = cmdiocb->context2;
18131
18132 if (pcmd && pcmd->virt)
771db5c0 18133 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3
JS
18134 kfree(pcmd);
18135 lpfc_sli_release_iocbq(phba, cmdiocb);
e817e5d7 18136 lpfc_drain_txq(phba);
ae9e28f3
JS
18137}
18138
18139static void
18140lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
18141 struct hbq_dmabuf *dmabuf)
18142{
18143 struct fc_frame_header *fc_hdr;
18144 struct lpfc_hba *phba = vport->phba;
18145 struct lpfc_iocbq *iocbq = NULL;
18146 union lpfc_wqe *wqe;
18147 struct lpfc_dmabuf *pcmd = NULL;
18148 uint32_t frame_len;
18149 int rc;
e817e5d7 18150 unsigned long iflags;
ae9e28f3
JS
18151
18152 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
18153 frame_len = bf_get(lpfc_rcqe_length, &dmabuf->cq_event.cqe.rcqe_cmpl);
18154
18155 /* Send the received frame back */
18156 iocbq = lpfc_sli_get_iocbq(phba);
e817e5d7
JS
18157 if (!iocbq) {
18158 /* Queue cq event and wakeup worker thread to process it */
18159 spin_lock_irqsave(&phba->hbalock, iflags);
18160 list_add_tail(&dmabuf->cq_event.list,
18161 &phba->sli4_hba.sp_queue_event);
18162 phba->hba_flag |= HBA_SP_QUEUE_EVT;
18163 spin_unlock_irqrestore(&phba->hbalock, iflags);
18164 lpfc_worker_wake_up(phba);
18165 return;
18166 }
ae9e28f3
JS
18167
18168 /* Allocate buffer for command payload */
18169 pcmd = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
18170 if (pcmd)
771db5c0 18171 pcmd->virt = dma_pool_alloc(phba->lpfc_drb_pool, GFP_KERNEL,
ae9e28f3
JS
18172 &pcmd->phys);
18173 if (!pcmd || !pcmd->virt)
18174 goto exit;
18175
18176 INIT_LIST_HEAD(&pcmd->list);
18177
18178 /* copyin the payload */
18179 memcpy(pcmd->virt, dmabuf->dbuf.virt, frame_len);
18180
18181 /* fill in BDE's for command */
18182 iocbq->iocb.un.xseq64.bdl.addrHigh = putPaddrHigh(pcmd->phys);
18183 iocbq->iocb.un.xseq64.bdl.addrLow = putPaddrLow(pcmd->phys);
18184 iocbq->iocb.un.xseq64.bdl.bdeFlags = BUFF_TYPE_BDE_64;
18185 iocbq->iocb.un.xseq64.bdl.bdeSize = frame_len;
18186
18187 iocbq->context2 = pcmd;
18188 iocbq->vport = vport;
18189 iocbq->iocb_flag &= ~LPFC_FIP_ELS_ID_MASK;
18190 iocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
18191
18192 /*
18193 * Setup rest of the iocb as though it were a WQE
18194 * Build the SEND_FRAME WQE
18195 */
18196 wqe = (union lpfc_wqe *)&iocbq->iocb;
18197
18198 wqe->send_frame.frame_len = frame_len;
18199 wqe->send_frame.fc_hdr_wd0 = be32_to_cpu(*((uint32_t *)fc_hdr));
18200 wqe->send_frame.fc_hdr_wd1 = be32_to_cpu(*((uint32_t *)fc_hdr + 1));
18201 wqe->send_frame.fc_hdr_wd2 = be32_to_cpu(*((uint32_t *)fc_hdr + 2));
18202 wqe->send_frame.fc_hdr_wd3 = be32_to_cpu(*((uint32_t *)fc_hdr + 3));
18203 wqe->send_frame.fc_hdr_wd4 = be32_to_cpu(*((uint32_t *)fc_hdr + 4));
18204 wqe->send_frame.fc_hdr_wd5 = be32_to_cpu(*((uint32_t *)fc_hdr + 5));
18205
18206 iocbq->iocb.ulpCommand = CMD_SEND_FRAME;
18207 iocbq->iocb.ulpLe = 1;
18208 iocbq->iocb_cmpl = lpfc_sli4_mds_loopback_cmpl;
18209 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, iocbq, 0);
18210 if (rc == IOCB_ERROR)
18211 goto exit;
18212
18213 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18214 return;
18215
18216exit:
18217 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
18218 "2023 Unable to process MDS loopback frame\n");
18219 if (pcmd && pcmd->virt)
771db5c0 18220 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3 18221 kfree(pcmd);
401bb416
DK
18222 if (iocbq)
18223 lpfc_sli_release_iocbq(phba, iocbq);
ae9e28f3
JS
18224 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18225}
18226
4f774513
JS
18227/**
18228 * lpfc_sli4_handle_received_buffer - Handle received buffers from firmware
18229 * @phba: Pointer to HBA context object.
18230 *
18231 * This function is called with no lock held. This function processes all
18232 * the received buffers and gives it to upper layers when a received buffer
18233 * indicates that it is the final frame in the sequence. The interrupt
895427bd 18234 * service routine processes received buffers at interrupt contexts.
4f774513
JS
18235 * Worker thread calls lpfc_sli4_handle_received_buffer, which will call the
18236 * appropriate receive function when the final frame in a sequence is received.
18237 **/
4d9ab994
JS
18238void
18239lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,
18240 struct hbq_dmabuf *dmabuf)
4f774513 18241{
4d9ab994 18242 struct hbq_dmabuf *seq_dmabuf;
4f774513
JS
18243 struct fc_frame_header *fc_hdr;
18244 struct lpfc_vport *vport;
18245 uint32_t fcfi;
939723a4 18246 uint32_t did;
4f774513 18247
4f774513 18248 /* Process each received buffer */
4d9ab994 18249 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
2ea259ee 18250
e817e5d7
JS
18251 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
18252 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
18253 vport = phba->pport;
18254 /* Handle MDS Loopback frames */
18255 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
18256 return;
18257 }
18258
4d9ab994
JS
18259 /* check to see if this a valid type of frame */
18260 if (lpfc_fc_frame_check(phba, fc_hdr)) {
18261 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18262 return;
18263 }
2ea259ee 18264
7851fe2c
JS
18265 if ((bf_get(lpfc_cqe_code,
18266 &dmabuf->cq_event.cqe.rcqe_cmpl) == CQE_CODE_RECEIVE_V1))
18267 fcfi = bf_get(lpfc_rcqe_fcf_id_v1,
18268 &dmabuf->cq_event.cqe.rcqe_cmpl);
18269 else
18270 fcfi = bf_get(lpfc_rcqe_fcf_id,
18271 &dmabuf->cq_event.cqe.rcqe_cmpl);
939723a4 18272
e62245d9
JS
18273 if (fc_hdr->fh_r_ctl == 0xF4 && fc_hdr->fh_type == 0xFF) {
18274 vport = phba->pport;
18275 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
18276 "2023 MDS Loopback %d bytes\n",
18277 bf_get(lpfc_rcqe_length,
18278 &dmabuf->cq_event.cqe.rcqe_cmpl));
18279 /* Handle MDS Loopback frames */
18280 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
18281 return;
18282 }
18283
895427bd
JS
18284 /* d_id this frame is directed to */
18285 did = sli4_did_from_fc_hdr(fc_hdr);
18286
18287 vport = lpfc_fc_frame_to_vport(phba, fc_hdr, fcfi, did);
939723a4 18288 if (!vport) {
4d9ab994
JS
18289 /* throw out the frame */
18290 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18291 return;
18292 }
939723a4 18293
939723a4
JS
18294 /* vport is registered unless we rcv a FLOGI directed to Fabric_DID */
18295 if (!(vport->vpi_state & LPFC_VPI_REGISTERED) &&
18296 (did != Fabric_DID)) {
18297 /*
18298 * Throw out the frame if we are not pt2pt.
18299 * The pt2pt protocol allows for discovery frames
18300 * to be received without a registered VPI.
18301 */
18302 if (!(vport->fc_flag & FC_PT2PT) ||
18303 (phba->link_state == LPFC_HBA_READY)) {
18304 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18305 return;
18306 }
18307 }
18308
6669f9bb
JS
18309 /* Handle the basic abort sequence (BA_ABTS) event */
18310 if (fc_hdr->fh_r_ctl == FC_RCTL_BA_ABTS) {
18311 lpfc_sli4_handle_unsol_abort(vport, dmabuf);
18312 return;
18313 }
18314
4d9ab994
JS
18315 /* Link this frame */
18316 seq_dmabuf = lpfc_fc_frame_add(vport, dmabuf);
18317 if (!seq_dmabuf) {
18318 /* unable to add frame to vport - throw it out */
18319 lpfc_in_buf_free(phba, &dmabuf->dbuf);
18320 return;
18321 }
18322 /* If not last frame in sequence continue processing frames. */
def9c7a9 18323 if (!lpfc_seq_complete(seq_dmabuf))
4d9ab994 18324 return;
def9c7a9 18325
6669f9bb
JS
18326 /* Send the complete sequence to the upper layer protocol */
18327 lpfc_sli4_send_seq_to_ulp(vport, seq_dmabuf);
4f774513 18328}
6fb120a7
JS
18329
18330/**
18331 * lpfc_sli4_post_all_rpi_hdrs - Post the rpi header memory region to the port
18332 * @phba: pointer to lpfc hba data structure.
18333 *
18334 * This routine is invoked to post rpi header templates to the
18335 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18336 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18337 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18338 *
18339 * This routine does not require any locks. It's usage is expected
18340 * to be driver load or reset recovery when the driver is
18341 * sequential.
18342 *
18343 * Return codes
af901ca1 18344 * 0 - successful
d439d286 18345 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18346 * When this error occurs, the driver is not guaranteed
18347 * to have any rpi regions posted to the device and
18348 * must either attempt to repost the regions or take a
18349 * fatal error.
18350 **/
18351int
18352lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *phba)
18353{
18354 struct lpfc_rpi_hdr *rpi_page;
18355 uint32_t rc = 0;
6d368e53
JS
18356 uint16_t lrpi = 0;
18357
18358 /* SLI4 ports that support extents do not require RPI headers. */
18359 if (!phba->sli4_hba.rpi_hdrs_in_use)
18360 goto exit;
18361 if (phba->sli4_hba.extents_in_use)
18362 return -EIO;
6fb120a7 18363
6fb120a7 18364 list_for_each_entry(rpi_page, &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6d368e53
JS
18365 /*
18366 * Assign the rpi headers a physical rpi only if the driver
18367 * has not initialized those resources. A port reset only
18368 * needs the headers posted.
18369 */
18370 if (bf_get(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags) !=
18371 LPFC_RPI_RSRC_RDY)
18372 rpi_page->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
18373
6fb120a7
JS
18374 rc = lpfc_sli4_post_rpi_hdr(phba, rpi_page);
18375 if (rc != MBX_SUCCESS) {
18376 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18377 "2008 Error %d posting all rpi "
18378 "headers\n", rc);
18379 rc = -EIO;
18380 break;
18381 }
18382 }
18383
6d368e53
JS
18384 exit:
18385 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags,
18386 LPFC_RPI_RSRC_RDY);
6fb120a7
JS
18387 return rc;
18388}
18389
18390/**
18391 * lpfc_sli4_post_rpi_hdr - Post an rpi header memory region to the port
18392 * @phba: pointer to lpfc hba data structure.
18393 * @rpi_page: pointer to the rpi memory region.
18394 *
18395 * This routine is invoked to post a single rpi header to the
18396 * HBA consistent with the SLI-4 interface spec. This memory region
18397 * maps up to 64 rpi context regions.
18398 *
18399 * Return codes
af901ca1 18400 * 0 - successful
d439d286
JS
18401 * -ENOMEM - No available memory
18402 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18403 **/
18404int
18405lpfc_sli4_post_rpi_hdr(struct lpfc_hba *phba, struct lpfc_rpi_hdr *rpi_page)
18406{
18407 LPFC_MBOXQ_t *mboxq;
18408 struct lpfc_mbx_post_hdr_tmpl *hdr_tmpl;
18409 uint32_t rc = 0;
6fb120a7
JS
18410 uint32_t shdr_status, shdr_add_status;
18411 union lpfc_sli4_cfg_shdr *shdr;
18412
6d368e53
JS
18413 /* SLI4 ports that support extents do not require RPI headers. */
18414 if (!phba->sli4_hba.rpi_hdrs_in_use)
18415 return rc;
18416 if (phba->sli4_hba.extents_in_use)
18417 return -EIO;
18418
6fb120a7
JS
18419 /* The port is notified of the header region via a mailbox command. */
18420 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18421 if (!mboxq) {
18422 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18423 "2001 Unable to allocate memory for issuing "
18424 "SLI_CONFIG_SPECIAL mailbox command\n");
18425 return -ENOMEM;
18426 }
18427
18428 /* Post all rpi memory regions to the port. */
18429 hdr_tmpl = &mboxq->u.mqe.un.hdr_tmpl;
6fb120a7
JS
18430 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18431 LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE,
18432 sizeof(struct lpfc_mbx_post_hdr_tmpl) -
fedd3b7b
JS
18433 sizeof(struct lpfc_sli4_cfg_mhdr),
18434 LPFC_SLI4_MBX_EMBED);
6d368e53
JS
18435
18436
18437 /* Post the physical rpi to the port for this rpi header. */
6fb120a7
JS
18438 bf_set(lpfc_mbx_post_hdr_tmpl_rpi_offset, hdr_tmpl,
18439 rpi_page->start_rpi);
6d368e53
JS
18440 bf_set(lpfc_mbx_post_hdr_tmpl_page_cnt,
18441 hdr_tmpl, rpi_page->page_count);
18442
6fb120a7
JS
18443 hdr_tmpl->rpi_paddr_lo = putPaddrLow(rpi_page->dmabuf->phys);
18444 hdr_tmpl->rpi_paddr_hi = putPaddrHigh(rpi_page->dmabuf->phys);
f1126688 18445 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6fb120a7
JS
18446 shdr = (union lpfc_sli4_cfg_shdr *) &hdr_tmpl->header.cfg_shdr;
18447 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18448 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18449 if (rc != MBX_TIMEOUT)
18450 mempool_free(mboxq, phba->mbox_mem_pool);
18451 if (shdr_status || shdr_add_status || rc) {
18452 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18453 "2514 POST_RPI_HDR mailbox failed with "
18454 "status x%x add_status x%x, mbx status x%x\n",
18455 shdr_status, shdr_add_status, rc);
18456 rc = -ENXIO;
845d9e8d
JS
18457 } else {
18458 /*
18459 * The next_rpi stores the next logical module-64 rpi value used
18460 * to post physical rpis in subsequent rpi postings.
18461 */
18462 spin_lock_irq(&phba->hbalock);
18463 phba->sli4_hba.next_rpi = rpi_page->next_rpi;
18464 spin_unlock_irq(&phba->hbalock);
6fb120a7
JS
18465 }
18466 return rc;
18467}
18468
18469/**
18470 * lpfc_sli4_alloc_rpi - Get an available rpi in the device's range
18471 * @phba: pointer to lpfc hba data structure.
18472 *
18473 * This routine is invoked to post rpi header templates to the
18474 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18475 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18476 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18477 *
18478 * Returns
af901ca1 18479 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
6fb120a7
JS
18480 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
18481 **/
18482int
18483lpfc_sli4_alloc_rpi(struct lpfc_hba *phba)
18484{
6d368e53
JS
18485 unsigned long rpi;
18486 uint16_t max_rpi, rpi_limit;
18487 uint16_t rpi_remaining, lrpi = 0;
6fb120a7 18488 struct lpfc_rpi_hdr *rpi_hdr;
4902b381 18489 unsigned long iflag;
6fb120a7 18490
6fb120a7 18491 /*
6d368e53
JS
18492 * Fetch the next logical rpi. Because this index is logical,
18493 * the driver starts at 0 each time.
6fb120a7 18494 */
4902b381 18495 spin_lock_irqsave(&phba->hbalock, iflag);
be6bb941
JS
18496 max_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
18497 rpi_limit = phba->sli4_hba.next_rpi;
18498
6d368e53
JS
18499 rpi = find_next_zero_bit(phba->sli4_hba.rpi_bmask, rpi_limit, 0);
18500 if (rpi >= rpi_limit)
6fb120a7
JS
18501 rpi = LPFC_RPI_ALLOC_ERROR;
18502 else {
18503 set_bit(rpi, phba->sli4_hba.rpi_bmask);
18504 phba->sli4_hba.max_cfg_param.rpi_used++;
18505 phba->sli4_hba.rpi_count++;
18506 }
0f154226
JS
18507 lpfc_printf_log(phba, KERN_INFO,
18508 LOG_NODE | LOG_DISCOVERY,
18509 "0001 Allocated rpi:x%x max:x%x lim:x%x\n",
be6bb941 18510 (int) rpi, max_rpi, rpi_limit);
6fb120a7
JS
18511
18512 /*
18513 * Don't try to allocate more rpi header regions if the device limit
6d368e53 18514 * has been exhausted.
6fb120a7
JS
18515 */
18516 if ((rpi == LPFC_RPI_ALLOC_ERROR) &&
18517 (phba->sli4_hba.rpi_count >= max_rpi)) {
4902b381 18518 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18519 return rpi;
18520 }
18521
6d368e53
JS
18522 /*
18523 * RPI header postings are not required for SLI4 ports capable of
18524 * extents.
18525 */
18526 if (!phba->sli4_hba.rpi_hdrs_in_use) {
4902b381 18527 spin_unlock_irqrestore(&phba->hbalock, iflag);
6d368e53
JS
18528 return rpi;
18529 }
18530
6fb120a7
JS
18531 /*
18532 * If the driver is running low on rpi resources, allocate another
18533 * page now. Note that the next_rpi value is used because
18534 * it represents how many are actually in use whereas max_rpi notes
18535 * how many are supported max by the device.
18536 */
6d368e53 18537 rpi_remaining = phba->sli4_hba.next_rpi - phba->sli4_hba.rpi_count;
4902b381 18538 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18539 if (rpi_remaining < LPFC_RPI_LOW_WATER_MARK) {
18540 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
18541 if (!rpi_hdr) {
18542 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18543 "2002 Error Could not grow rpi "
18544 "count\n");
18545 } else {
6d368e53
JS
18546 lrpi = rpi_hdr->start_rpi;
18547 rpi_hdr->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
6fb120a7
JS
18548 lpfc_sli4_post_rpi_hdr(phba, rpi_hdr);
18549 }
18550 }
18551
18552 return rpi;
18553}
18554
d7c47992
JS
18555/**
18556 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18557 * @phba: pointer to lpfc hba data structure.
18558 *
18559 * This routine is invoked to release an rpi to the pool of
18560 * available rpis maintained by the driver.
18561 **/
5d8b8167 18562static void
d7c47992
JS
18563__lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18564{
7cfd5639
JS
18565 /*
18566 * if the rpi value indicates a prior unreg has already
18567 * been done, skip the unreg.
18568 */
18569 if (rpi == LPFC_RPI_ALLOC_ERROR)
18570 return;
18571
d7c47992
JS
18572 if (test_and_clear_bit(rpi, phba->sli4_hba.rpi_bmask)) {
18573 phba->sli4_hba.rpi_count--;
18574 phba->sli4_hba.max_cfg_param.rpi_used--;
b95b2119 18575 } else {
0f154226
JS
18576 lpfc_printf_log(phba, KERN_INFO,
18577 LOG_NODE | LOG_DISCOVERY,
b95b2119
JS
18578 "2016 rpi %x not inuse\n",
18579 rpi);
d7c47992
JS
18580 }
18581}
18582
6fb120a7
JS
18583/**
18584 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18585 * @phba: pointer to lpfc hba data structure.
18586 *
18587 * This routine is invoked to release an rpi to the pool of
18588 * available rpis maintained by the driver.
18589 **/
18590void
18591lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18592{
18593 spin_lock_irq(&phba->hbalock);
d7c47992 18594 __lpfc_sli4_free_rpi(phba, rpi);
6fb120a7
JS
18595 spin_unlock_irq(&phba->hbalock);
18596}
18597
18598/**
18599 * lpfc_sli4_remove_rpis - Remove the rpi bitmask region
18600 * @phba: pointer to lpfc hba data structure.
18601 *
18602 * This routine is invoked to remove the memory region that
18603 * provided rpi via a bitmask.
18604 **/
18605void
18606lpfc_sli4_remove_rpis(struct lpfc_hba *phba)
18607{
18608 kfree(phba->sli4_hba.rpi_bmask);
6d368e53
JS
18609 kfree(phba->sli4_hba.rpi_ids);
18610 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6fb120a7
JS
18611}
18612
18613/**
18614 * lpfc_sli4_resume_rpi - Remove the rpi bitmask region
18615 * @phba: pointer to lpfc hba data structure.
18616 *
18617 * This routine is invoked to remove the memory region that
18618 * provided rpi via a bitmask.
18619 **/
18620int
6b5151fd
JS
18621lpfc_sli4_resume_rpi(struct lpfc_nodelist *ndlp,
18622 void (*cmpl)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *arg)
6fb120a7
JS
18623{
18624 LPFC_MBOXQ_t *mboxq;
18625 struct lpfc_hba *phba = ndlp->phba;
18626 int rc;
18627
18628 /* The port is notified of the header region via a mailbox command. */
18629 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18630 if (!mboxq)
18631 return -ENOMEM;
18632
18633 /* Post all rpi memory regions to the port. */
18634 lpfc_resume_rpi(mboxq, ndlp);
6b5151fd
JS
18635 if (cmpl) {
18636 mboxq->mbox_cmpl = cmpl;
3e1f0718
JS
18637 mboxq->ctx_buf = arg;
18638 mboxq->ctx_ndlp = ndlp;
72859909
JS
18639 } else
18640 mboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6b5151fd 18641 mboxq->vport = ndlp->vport;
6fb120a7
JS
18642 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18643 if (rc == MBX_NOT_FINISHED) {
18644 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18645 "2010 Resume RPI Mailbox failed "
18646 "status %d, mbxStatus x%x\n", rc,
18647 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
18648 mempool_free(mboxq, phba->mbox_mem_pool);
18649 return -EIO;
18650 }
18651 return 0;
18652}
18653
18654/**
18655 * lpfc_sli4_init_vpi - Initialize a vpi with the port
76a95d75 18656 * @vport: Pointer to the vport for which the vpi is being initialized
6fb120a7 18657 *
76a95d75 18658 * This routine is invoked to activate a vpi with the port.
6fb120a7
JS
18659 *
18660 * Returns:
18661 * 0 success
18662 * -Evalue otherwise
18663 **/
18664int
76a95d75 18665lpfc_sli4_init_vpi(struct lpfc_vport *vport)
6fb120a7
JS
18666{
18667 LPFC_MBOXQ_t *mboxq;
18668 int rc = 0;
6a9c52cf 18669 int retval = MBX_SUCCESS;
6fb120a7 18670 uint32_t mbox_tmo;
76a95d75 18671 struct lpfc_hba *phba = vport->phba;
6fb120a7
JS
18672 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18673 if (!mboxq)
18674 return -ENOMEM;
76a95d75 18675 lpfc_init_vpi(phba, mboxq, vport->vpi);
a183a15f 18676 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
6fb120a7 18677 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
6fb120a7 18678 if (rc != MBX_SUCCESS) {
76a95d75 18679 lpfc_printf_vlog(vport, KERN_ERR, LOG_SLI,
6fb120a7
JS
18680 "2022 INIT VPI Mailbox failed "
18681 "status %d, mbxStatus x%x\n", rc,
18682 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
6a9c52cf 18683 retval = -EIO;
6fb120a7 18684 }
6a9c52cf 18685 if (rc != MBX_TIMEOUT)
76a95d75 18686 mempool_free(mboxq, vport->phba->mbox_mem_pool);
6a9c52cf
JS
18687
18688 return retval;
6fb120a7
JS
18689}
18690
18691/**
18692 * lpfc_mbx_cmpl_add_fcf_record - add fcf mbox completion handler.
18693 * @phba: pointer to lpfc hba data structure.
18694 * @mboxq: Pointer to mailbox object.
18695 *
18696 * This routine is invoked to manually add a single FCF record. The caller
18697 * must pass a completely initialized FCF_Record. This routine takes
18698 * care of the nonembedded mailbox operations.
18699 **/
18700static void
18701lpfc_mbx_cmpl_add_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
18702{
18703 void *virt_addr;
18704 union lpfc_sli4_cfg_shdr *shdr;
18705 uint32_t shdr_status, shdr_add_status;
18706
18707 virt_addr = mboxq->sge_array->addr[0];
18708 /* The IOCTL status is embedded in the mailbox subheader. */
18709 shdr = (union lpfc_sli4_cfg_shdr *) virt_addr;
18710 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18711 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18712
18713 if ((shdr_status || shdr_add_status) &&
18714 (shdr_status != STATUS_FCF_IN_USE))
18715 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18716 "2558 ADD_FCF_RECORD mailbox failed with "
18717 "status x%x add_status x%x\n",
18718 shdr_status, shdr_add_status);
18719
18720 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18721}
18722
18723/**
18724 * lpfc_sli4_add_fcf_record - Manually add an FCF Record.
18725 * @phba: pointer to lpfc hba data structure.
18726 * @fcf_record: pointer to the initialized fcf record to add.
18727 *
18728 * This routine is invoked to manually add a single FCF record. The caller
18729 * must pass a completely initialized FCF_Record. This routine takes
18730 * care of the nonembedded mailbox operations.
18731 **/
18732int
18733lpfc_sli4_add_fcf_record(struct lpfc_hba *phba, struct fcf_record *fcf_record)
18734{
18735 int rc = 0;
18736 LPFC_MBOXQ_t *mboxq;
18737 uint8_t *bytep;
18738 void *virt_addr;
6fb120a7
JS
18739 struct lpfc_mbx_sge sge;
18740 uint32_t alloc_len, req_len;
18741 uint32_t fcfindex;
18742
18743 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18744 if (!mboxq) {
18745 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18746 "2009 Failed to allocate mbox for ADD_FCF cmd\n");
18747 return -ENOMEM;
18748 }
18749
18750 req_len = sizeof(struct fcf_record) + sizeof(union lpfc_sli4_cfg_shdr) +
18751 sizeof(uint32_t);
18752
18753 /* Allocate DMA memory and set up the non-embedded mailbox command */
18754 alloc_len = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18755 LPFC_MBOX_OPCODE_FCOE_ADD_FCF,
18756 req_len, LPFC_SLI4_MBX_NEMBED);
18757 if (alloc_len < req_len) {
18758 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18759 "2523 Allocated DMA memory size (x%x) is "
18760 "less than the requested DMA memory "
18761 "size (x%x)\n", alloc_len, req_len);
18762 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18763 return -ENOMEM;
18764 }
18765
18766 /*
18767 * Get the first SGE entry from the non-embedded DMA memory. This
18768 * routine only uses a single SGE.
18769 */
18770 lpfc_sli4_mbx_sge_get(mboxq, 0, &sge);
6fb120a7
JS
18771 virt_addr = mboxq->sge_array->addr[0];
18772 /*
18773 * Configure the FCF record for FCFI 0. This is the driver's
18774 * hardcoded default and gets used in nonFIP mode.
18775 */
18776 fcfindex = bf_get(lpfc_fcf_record_fcf_index, fcf_record);
18777 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr);
18778 lpfc_sli_pcimem_bcopy(&fcfindex, bytep, sizeof(uint32_t));
18779
18780 /*
18781 * Copy the fcf_index and the FCF Record Data. The data starts after
18782 * the FCoE header plus word10. The data copy needs to be endian
18783 * correct.
18784 */
18785 bytep += sizeof(uint32_t);
18786 lpfc_sli_pcimem_bcopy(fcf_record, bytep, sizeof(struct fcf_record));
18787 mboxq->vport = phba->pport;
18788 mboxq->mbox_cmpl = lpfc_mbx_cmpl_add_fcf_record;
18789 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18790 if (rc == MBX_NOT_FINISHED) {
18791 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18792 "2515 ADD_FCF_RECORD mailbox failed with "
18793 "status 0x%x\n", rc);
18794 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18795 rc = -EIO;
18796 } else
18797 rc = 0;
18798
18799 return rc;
18800}
18801
18802/**
18803 * lpfc_sli4_build_dflt_fcf_record - Build the driver's default FCF Record.
18804 * @phba: pointer to lpfc hba data structure.
18805 * @fcf_record: pointer to the fcf record to write the default data.
18806 * @fcf_index: FCF table entry index.
18807 *
18808 * This routine is invoked to build the driver's default FCF record. The
18809 * values used are hardcoded. This routine handles memory initialization.
18810 *
18811 **/
18812void
18813lpfc_sli4_build_dflt_fcf_record(struct lpfc_hba *phba,
18814 struct fcf_record *fcf_record,
18815 uint16_t fcf_index)
18816{
18817 memset(fcf_record, 0, sizeof(struct fcf_record));
18818 fcf_record->max_rcv_size = LPFC_FCOE_MAX_RCV_SIZE;
18819 fcf_record->fka_adv_period = LPFC_FCOE_FKA_ADV_PER;
18820 fcf_record->fip_priority = LPFC_FCOE_FIP_PRIORITY;
18821 bf_set(lpfc_fcf_record_mac_0, fcf_record, phba->fc_map[0]);
18822 bf_set(lpfc_fcf_record_mac_1, fcf_record, phba->fc_map[1]);
18823 bf_set(lpfc_fcf_record_mac_2, fcf_record, phba->fc_map[2]);
18824 bf_set(lpfc_fcf_record_mac_3, fcf_record, LPFC_FCOE_FCF_MAC3);
18825 bf_set(lpfc_fcf_record_mac_4, fcf_record, LPFC_FCOE_FCF_MAC4);
18826 bf_set(lpfc_fcf_record_mac_5, fcf_record, LPFC_FCOE_FCF_MAC5);
18827 bf_set(lpfc_fcf_record_fc_map_0, fcf_record, phba->fc_map[0]);
18828 bf_set(lpfc_fcf_record_fc_map_1, fcf_record, phba->fc_map[1]);
18829 bf_set(lpfc_fcf_record_fc_map_2, fcf_record, phba->fc_map[2]);
18830 bf_set(lpfc_fcf_record_fcf_valid, fcf_record, 1);
0c287589 18831 bf_set(lpfc_fcf_record_fcf_avail, fcf_record, 1);
6fb120a7
JS
18832 bf_set(lpfc_fcf_record_fcf_index, fcf_record, fcf_index);
18833 bf_set(lpfc_fcf_record_mac_addr_prov, fcf_record,
18834 LPFC_FCF_FPMA | LPFC_FCF_SPMA);
18835 /* Set the VLAN bit map */
18836 if (phba->valid_vlan) {
18837 fcf_record->vlan_bitmap[phba->vlan_id / 8]
18838 = 1 << (phba->vlan_id % 8);
18839 }
18840}
18841
18842/**
0c9ab6f5 18843 * lpfc_sli4_fcf_scan_read_fcf_rec - Read hba fcf record for fcf scan.
6fb120a7
JS
18844 * @phba: pointer to lpfc hba data structure.
18845 * @fcf_index: FCF table entry offset.
18846 *
0c9ab6f5
JS
18847 * This routine is invoked to scan the entire FCF table by reading FCF
18848 * record and processing it one at a time starting from the @fcf_index
18849 * for initial FCF discovery or fast FCF failover rediscovery.
18850 *
25985edc 18851 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5 18852 * otherwise.
6fb120a7
JS
18853 **/
18854int
0c9ab6f5 18855lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
6fb120a7
JS
18856{
18857 int rc = 0, error;
18858 LPFC_MBOXQ_t *mboxq;
6fb120a7 18859
32b9793f 18860 phba->fcoe_eventtag_at_fcf_scan = phba->fcoe_eventtag;
80c17849 18861 phba->fcoe_cvl_eventtag_attn = phba->fcoe_cvl_eventtag;
6fb120a7
JS
18862 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18863 if (!mboxq) {
18864 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18865 "2000 Failed to allocate mbox for "
18866 "READ_FCF cmd\n");
4d9ab994 18867 error = -ENOMEM;
0c9ab6f5 18868 goto fail_fcf_scan;
6fb120a7 18869 }
ecfd03c6 18870 /* Construct the read FCF record mailbox command */
0c9ab6f5 18871 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
ecfd03c6
JS
18872 if (rc) {
18873 error = -EINVAL;
0c9ab6f5 18874 goto fail_fcf_scan;
6fb120a7 18875 }
ecfd03c6 18876 /* Issue the mailbox command asynchronously */
6fb120a7 18877 mboxq->vport = phba->pport;
0c9ab6f5 18878 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_scan_read_fcf_rec;
a93ff37a
JS
18879
18880 spin_lock_irq(&phba->hbalock);
18881 phba->hba_flag |= FCF_TS_INPROG;
18882 spin_unlock_irq(&phba->hbalock);
18883
6fb120a7 18884 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
ecfd03c6 18885 if (rc == MBX_NOT_FINISHED)
6fb120a7 18886 error = -EIO;
ecfd03c6 18887 else {
38b92ef8
JS
18888 /* Reset eligible FCF count for new scan */
18889 if (fcf_index == LPFC_FCOE_FCF_GET_FIRST)
999d813f 18890 phba->fcf.eligible_fcf_cnt = 0;
6fb120a7 18891 error = 0;
32b9793f 18892 }
0c9ab6f5 18893fail_fcf_scan:
4d9ab994
JS
18894 if (error) {
18895 if (mboxq)
18896 lpfc_sli4_mbox_cmd_free(phba, mboxq);
a93ff37a 18897 /* FCF scan failed, clear FCF_TS_INPROG flag */
4d9ab994 18898 spin_lock_irq(&phba->hbalock);
a93ff37a 18899 phba->hba_flag &= ~FCF_TS_INPROG;
4d9ab994
JS
18900 spin_unlock_irq(&phba->hbalock);
18901 }
6fb120a7
JS
18902 return error;
18903}
a0c87cbd 18904
0c9ab6f5 18905/**
a93ff37a 18906 * lpfc_sli4_fcf_rr_read_fcf_rec - Read hba fcf record for roundrobin fcf.
0c9ab6f5
JS
18907 * @phba: pointer to lpfc hba data structure.
18908 * @fcf_index: FCF table entry offset.
18909 *
18910 * This routine is invoked to read an FCF record indicated by @fcf_index
a93ff37a 18911 * and to use it for FLOGI roundrobin FCF failover.
0c9ab6f5 18912 *
25985edc 18913 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18914 * otherwise.
18915 **/
18916int
18917lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18918{
18919 int rc = 0, error;
18920 LPFC_MBOXQ_t *mboxq;
18921
18922 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18923 if (!mboxq) {
18924 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18925 "2763 Failed to allocate mbox for "
18926 "READ_FCF cmd\n");
18927 error = -ENOMEM;
18928 goto fail_fcf_read;
18929 }
18930 /* Construct the read FCF record mailbox command */
18931 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18932 if (rc) {
18933 error = -EINVAL;
18934 goto fail_fcf_read;
18935 }
18936 /* Issue the mailbox command asynchronously */
18937 mboxq->vport = phba->pport;
18938 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_rr_read_fcf_rec;
18939 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18940 if (rc == MBX_NOT_FINISHED)
18941 error = -EIO;
18942 else
18943 error = 0;
18944
18945fail_fcf_read:
18946 if (error && mboxq)
18947 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18948 return error;
18949}
18950
18951/**
18952 * lpfc_sli4_read_fcf_rec - Read hba fcf record for update eligible fcf bmask.
18953 * @phba: pointer to lpfc hba data structure.
18954 * @fcf_index: FCF table entry offset.
18955 *
18956 * This routine is invoked to read an FCF record indicated by @fcf_index to
a93ff37a 18957 * determine whether it's eligible for FLOGI roundrobin failover list.
0c9ab6f5 18958 *
25985edc 18959 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18960 * otherwise.
18961 **/
18962int
18963lpfc_sli4_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18964{
18965 int rc = 0, error;
18966 LPFC_MBOXQ_t *mboxq;
18967
18968 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18969 if (!mboxq) {
18970 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18971 "2758 Failed to allocate mbox for "
18972 "READ_FCF cmd\n");
18973 error = -ENOMEM;
18974 goto fail_fcf_read;
18975 }
18976 /* Construct the read FCF record mailbox command */
18977 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18978 if (rc) {
18979 error = -EINVAL;
18980 goto fail_fcf_read;
18981 }
18982 /* Issue the mailbox command asynchronously */
18983 mboxq->vport = phba->pport;
18984 mboxq->mbox_cmpl = lpfc_mbx_cmpl_read_fcf_rec;
18985 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18986 if (rc == MBX_NOT_FINISHED)
18987 error = -EIO;
18988 else
18989 error = 0;
18990
18991fail_fcf_read:
18992 if (error && mboxq)
18993 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18994 return error;
18995}
18996
7d791df7 18997/**
f5cb5304 18998 * lpfc_check_next_fcf_pri_level
7d791df7
JS
18999 * phba pointer to the lpfc_hba struct for this port.
19000 * This routine is called from the lpfc_sli4_fcf_rr_next_index_get
19001 * routine when the rr_bmask is empty. The FCF indecies are put into the
19002 * rr_bmask based on their priority level. Starting from the highest priority
19003 * to the lowest. The most likely FCF candidate will be in the highest
19004 * priority group. When this routine is called it searches the fcf_pri list for
19005 * next lowest priority group and repopulates the rr_bmask with only those
19006 * fcf_indexes.
19007 * returns:
19008 * 1=success 0=failure
19009 **/
5d8b8167 19010static int
7d791df7
JS
19011lpfc_check_next_fcf_pri_level(struct lpfc_hba *phba)
19012{
19013 uint16_t next_fcf_pri;
19014 uint16_t last_index;
19015 struct lpfc_fcf_pri *fcf_pri;
19016 int rc;
19017 int ret = 0;
19018
19019 last_index = find_first_bit(phba->fcf.fcf_rr_bmask,
19020 LPFC_SLI4_FCF_TBL_INDX_MAX);
19021 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
19022 "3060 Last IDX %d\n", last_index);
2562669c
JS
19023
19024 /* Verify the priority list has 2 or more entries */
19025 spin_lock_irq(&phba->hbalock);
19026 if (list_empty(&phba->fcf.fcf_pri_list) ||
19027 list_is_singular(&phba->fcf.fcf_pri_list)) {
19028 spin_unlock_irq(&phba->hbalock);
7d791df7
JS
19029 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
19030 "3061 Last IDX %d\n", last_index);
19031 return 0; /* Empty rr list */
19032 }
2562669c
JS
19033 spin_unlock_irq(&phba->hbalock);
19034
7d791df7
JS
19035 next_fcf_pri = 0;
19036 /*
19037 * Clear the rr_bmask and set all of the bits that are at this
19038 * priority.
19039 */
19040 memset(phba->fcf.fcf_rr_bmask, 0,
19041 sizeof(*phba->fcf.fcf_rr_bmask));
19042 spin_lock_irq(&phba->hbalock);
19043 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
19044 if (fcf_pri->fcf_rec.flag & LPFC_FCF_FLOGI_FAILED)
19045 continue;
19046 /*
19047 * the 1st priority that has not FLOGI failed
19048 * will be the highest.
19049 */
19050 if (!next_fcf_pri)
19051 next_fcf_pri = fcf_pri->fcf_rec.priority;
19052 spin_unlock_irq(&phba->hbalock);
19053 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
19054 rc = lpfc_sli4_fcf_rr_index_set(phba,
19055 fcf_pri->fcf_rec.fcf_index);
19056 if (rc)
19057 return 0;
19058 }
19059 spin_lock_irq(&phba->hbalock);
19060 }
19061 /*
19062 * if next_fcf_pri was not set above and the list is not empty then
19063 * we have failed flogis on all of them. So reset flogi failed
4907cb7b 19064 * and start at the beginning.
7d791df7
JS
19065 */
19066 if (!next_fcf_pri && !list_empty(&phba->fcf.fcf_pri_list)) {
19067 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
19068 fcf_pri->fcf_rec.flag &= ~LPFC_FCF_FLOGI_FAILED;
19069 /*
19070 * the 1st priority that has not FLOGI failed
19071 * will be the highest.
19072 */
19073 if (!next_fcf_pri)
19074 next_fcf_pri = fcf_pri->fcf_rec.priority;
19075 spin_unlock_irq(&phba->hbalock);
19076 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
19077 rc = lpfc_sli4_fcf_rr_index_set(phba,
19078 fcf_pri->fcf_rec.fcf_index);
19079 if (rc)
19080 return 0;
19081 }
19082 spin_lock_irq(&phba->hbalock);
19083 }
19084 } else
19085 ret = 1;
19086 spin_unlock_irq(&phba->hbalock);
19087
19088 return ret;
19089}
0c9ab6f5
JS
19090/**
19091 * lpfc_sli4_fcf_rr_next_index_get - Get next eligible fcf record index
19092 * @phba: pointer to lpfc hba data structure.
19093 *
19094 * This routine is to get the next eligible FCF record index in a round
19095 * robin fashion. If the next eligible FCF record index equals to the
a93ff37a 19096 * initial roundrobin FCF record index, LPFC_FCOE_FCF_NEXT_NONE (0xFFFF)
0c9ab6f5
JS
19097 * shall be returned, otherwise, the next eligible FCF record's index
19098 * shall be returned.
19099 **/
19100uint16_t
19101lpfc_sli4_fcf_rr_next_index_get(struct lpfc_hba *phba)
19102{
19103 uint16_t next_fcf_index;
19104
421c6622 19105initial_priority:
3804dc84 19106 /* Search start from next bit of currently registered FCF index */
421c6622
JS
19107 next_fcf_index = phba->fcf.current_rec.fcf_indx;
19108
7d791df7 19109next_priority:
421c6622
JS
19110 /* Determine the next fcf index to check */
19111 next_fcf_index = (next_fcf_index + 1) % LPFC_SLI4_FCF_TBL_INDX_MAX;
0c9ab6f5
JS
19112 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
19113 LPFC_SLI4_FCF_TBL_INDX_MAX,
3804dc84
JS
19114 next_fcf_index);
19115
0c9ab6f5 19116 /* Wrap around condition on phba->fcf.fcf_rr_bmask */
7d791df7
JS
19117 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
19118 /*
19119 * If we have wrapped then we need to clear the bits that
19120 * have been tested so that we can detect when we should
19121 * change the priority level.
19122 */
0c9ab6f5
JS
19123 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
19124 LPFC_SLI4_FCF_TBL_INDX_MAX, 0);
7d791df7
JS
19125 }
19126
3804dc84
JS
19127
19128 /* Check roundrobin failover list empty condition */
7d791df7
JS
19129 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX ||
19130 next_fcf_index == phba->fcf.current_rec.fcf_indx) {
19131 /*
19132 * If next fcf index is not found check if there are lower
19133 * Priority level fcf's in the fcf_priority list.
19134 * Set up the rr_bmask with all of the avaiable fcf bits
19135 * at that level and continue the selection process.
19136 */
19137 if (lpfc_check_next_fcf_pri_level(phba))
421c6622 19138 goto initial_priority;
3804dc84
JS
19139 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP,
19140 "2844 No roundrobin failover FCF available\n");
036cad1f
JS
19141
19142 return LPFC_FCOE_FCF_NEXT_NONE;
3804dc84
JS
19143 }
19144
7d791df7
JS
19145 if (next_fcf_index < LPFC_SLI4_FCF_TBL_INDX_MAX &&
19146 phba->fcf.fcf_pri[next_fcf_index].fcf_rec.flag &
f5cb5304
JS
19147 LPFC_FCF_FLOGI_FAILED) {
19148 if (list_is_singular(&phba->fcf.fcf_pri_list))
19149 return LPFC_FCOE_FCF_NEXT_NONE;
19150
7d791df7 19151 goto next_priority;
f5cb5304 19152 }
7d791df7 19153
3804dc84 19154 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a
JS
19155 "2845 Get next roundrobin failover FCF (x%x)\n",
19156 next_fcf_index);
19157
0c9ab6f5
JS
19158 return next_fcf_index;
19159}
19160
19161/**
19162 * lpfc_sli4_fcf_rr_index_set - Set bmask with eligible fcf record index
19163 * @phba: pointer to lpfc hba data structure.
19164 *
19165 * This routine sets the FCF record index in to the eligible bmask for
a93ff37a 19166 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
19167 * does not go beyond the range of the driver allocated bmask dimension
19168 * before setting the bit.
19169 *
19170 * Returns 0 if the index bit successfully set, otherwise, it returns
19171 * -EINVAL.
19172 **/
19173int
19174lpfc_sli4_fcf_rr_index_set(struct lpfc_hba *phba, uint16_t fcf_index)
19175{
19176 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
19177 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
19178 "2610 FCF (x%x) reached driver's book "
19179 "keeping dimension:x%x\n",
0c9ab6f5
JS
19180 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
19181 return -EINVAL;
19182 }
19183 /* Set the eligible FCF record index bmask */
19184 set_bit(fcf_index, phba->fcf.fcf_rr_bmask);
19185
3804dc84 19186 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 19187 "2790 Set FCF (x%x) to roundrobin FCF failover "
3804dc84
JS
19188 "bmask\n", fcf_index);
19189
0c9ab6f5
JS
19190 return 0;
19191}
19192
19193/**
3804dc84 19194 * lpfc_sli4_fcf_rr_index_clear - Clear bmask from eligible fcf record index
0c9ab6f5
JS
19195 * @phba: pointer to lpfc hba data structure.
19196 *
19197 * This routine clears the FCF record index from the eligible bmask for
a93ff37a 19198 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
19199 * does not go beyond the range of the driver allocated bmask dimension
19200 * before clearing the bit.
19201 **/
19202void
19203lpfc_sli4_fcf_rr_index_clear(struct lpfc_hba *phba, uint16_t fcf_index)
19204{
9a803a74 19205 struct lpfc_fcf_pri *fcf_pri, *fcf_pri_next;
0c9ab6f5
JS
19206 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
19207 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
19208 "2762 FCF (x%x) reached driver's book "
19209 "keeping dimension:x%x\n",
0c9ab6f5
JS
19210 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
19211 return;
19212 }
19213 /* Clear the eligible FCF record index bmask */
7d791df7 19214 spin_lock_irq(&phba->hbalock);
9a803a74
JS
19215 list_for_each_entry_safe(fcf_pri, fcf_pri_next, &phba->fcf.fcf_pri_list,
19216 list) {
7d791df7
JS
19217 if (fcf_pri->fcf_rec.fcf_index == fcf_index) {
19218 list_del_init(&fcf_pri->list);
19219 break;
19220 }
19221 }
19222 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 19223 clear_bit(fcf_index, phba->fcf.fcf_rr_bmask);
3804dc84
JS
19224
19225 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 19226 "2791 Clear FCF (x%x) from roundrobin failover "
3804dc84 19227 "bmask\n", fcf_index);
0c9ab6f5
JS
19228}
19229
ecfd03c6
JS
19230/**
19231 * lpfc_mbx_cmpl_redisc_fcf_table - completion routine for rediscover FCF table
19232 * @phba: pointer to lpfc hba data structure.
19233 *
19234 * This routine is the completion routine for the rediscover FCF table mailbox
19235 * command. If the mailbox command returned failure, it will try to stop the
19236 * FCF rediscover wait timer.
19237 **/
5d8b8167 19238static void
ecfd03c6
JS
19239lpfc_mbx_cmpl_redisc_fcf_table(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
19240{
19241 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
19242 uint32_t shdr_status, shdr_add_status;
19243
19244 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
19245
19246 shdr_status = bf_get(lpfc_mbox_hdr_status,
19247 &redisc_fcf->header.cfg_shdr.response);
19248 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
19249 &redisc_fcf->header.cfg_shdr.response);
19250 if (shdr_status || shdr_add_status) {
0c9ab6f5 19251 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
ecfd03c6
JS
19252 "2746 Requesting for FCF rediscovery failed "
19253 "status x%x add_status x%x\n",
19254 shdr_status, shdr_add_status);
0c9ab6f5 19255 if (phba->fcf.fcf_flag & FCF_ACVL_DISC) {
fc2b989b 19256 spin_lock_irq(&phba->hbalock);
0c9ab6f5 19257 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b
JS
19258 spin_unlock_irq(&phba->hbalock);
19259 /*
19260 * CVL event triggered FCF rediscover request failed,
19261 * last resort to re-try current registered FCF entry.
19262 */
19263 lpfc_retry_pport_discovery(phba);
19264 } else {
19265 spin_lock_irq(&phba->hbalock);
0c9ab6f5 19266 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
fc2b989b
JS
19267 spin_unlock_irq(&phba->hbalock);
19268 /*
19269 * DEAD FCF event triggered FCF rediscover request
19270 * failed, last resort to fail over as a link down
19271 * to FCF registration.
19272 */
19273 lpfc_sli4_fcf_dead_failthrough(phba);
19274 }
0c9ab6f5
JS
19275 } else {
19276 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 19277 "2775 Start FCF rediscover quiescent timer\n");
ecfd03c6
JS
19278 /*
19279 * Start FCF rediscovery wait timer for pending FCF
19280 * before rescan FCF record table.
19281 */
19282 lpfc_fcf_redisc_wait_start_timer(phba);
0c9ab6f5 19283 }
ecfd03c6
JS
19284
19285 mempool_free(mbox, phba->mbox_mem_pool);
19286}
19287
19288/**
3804dc84 19289 * lpfc_sli4_redisc_fcf_table - Request to rediscover entire FCF table by port.
ecfd03c6
JS
19290 * @phba: pointer to lpfc hba data structure.
19291 *
19292 * This routine is invoked to request for rediscovery of the entire FCF table
19293 * by the port.
19294 **/
19295int
19296lpfc_sli4_redisc_fcf_table(struct lpfc_hba *phba)
19297{
19298 LPFC_MBOXQ_t *mbox;
19299 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
19300 int rc, length;
19301
0c9ab6f5
JS
19302 /* Cancel retry delay timers to all vports before FCF rediscover */
19303 lpfc_cancel_all_vport_retry_delay_timer(phba);
19304
ecfd03c6
JS
19305 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19306 if (!mbox) {
19307 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19308 "2745 Failed to allocate mbox for "
19309 "requesting FCF rediscover.\n");
19310 return -ENOMEM;
19311 }
19312
19313 length = (sizeof(struct lpfc_mbx_redisc_fcf_tbl) -
19314 sizeof(struct lpfc_sli4_cfg_mhdr));
19315 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
19316 LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF,
19317 length, LPFC_SLI4_MBX_EMBED);
19318
19319 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
19320 /* Set count to 0 for invalidating the entire FCF database */
19321 bf_set(lpfc_mbx_redisc_fcf_count, redisc_fcf, 0);
19322
19323 /* Issue the mailbox command asynchronously */
19324 mbox->vport = phba->pport;
19325 mbox->mbox_cmpl = lpfc_mbx_cmpl_redisc_fcf_table;
19326 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
19327
19328 if (rc == MBX_NOT_FINISHED) {
19329 mempool_free(mbox, phba->mbox_mem_pool);
19330 return -EIO;
19331 }
19332 return 0;
19333}
19334
fc2b989b
JS
19335/**
19336 * lpfc_sli4_fcf_dead_failthrough - Failthrough routine to fcf dead event
19337 * @phba: pointer to lpfc hba data structure.
19338 *
19339 * This function is the failover routine as a last resort to the FCF DEAD
19340 * event when driver failed to perform fast FCF failover.
19341 **/
19342void
19343lpfc_sli4_fcf_dead_failthrough(struct lpfc_hba *phba)
19344{
19345 uint32_t link_state;
19346
19347 /*
19348 * Last resort as FCF DEAD event failover will treat this as
19349 * a link down, but save the link state because we don't want
19350 * it to be changed to Link Down unless it is already down.
19351 */
19352 link_state = phba->link_state;
19353 lpfc_linkdown(phba);
19354 phba->link_state = link_state;
19355
19356 /* Unregister FCF if no devices connected to it */
19357 lpfc_unregister_unused_fcf(phba);
19358}
19359
a0c87cbd 19360/**
026abb87 19361 * lpfc_sli_get_config_region23 - Get sli3 port region 23 data.
a0c87cbd 19362 * @phba: pointer to lpfc hba data structure.
026abb87 19363 * @rgn23_data: pointer to configure region 23 data.
a0c87cbd 19364 *
026abb87
JS
19365 * This function gets SLI3 port configure region 23 data through memory dump
19366 * mailbox command. When it successfully retrieves data, the size of the data
19367 * will be returned, otherwise, 0 will be returned.
a0c87cbd 19368 **/
026abb87
JS
19369static uint32_t
19370lpfc_sli_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
a0c87cbd
JS
19371{
19372 LPFC_MBOXQ_t *pmb = NULL;
19373 MAILBOX_t *mb;
026abb87 19374 uint32_t offset = 0;
d91e3abb 19375 int i, rc;
a0c87cbd 19376
026abb87
JS
19377 if (!rgn23_data)
19378 return 0;
19379
a0c87cbd
JS
19380 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19381 if (!pmb) {
19382 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
026abb87
JS
19383 "2600 failed to allocate mailbox memory\n");
19384 return 0;
a0c87cbd
JS
19385 }
19386 mb = &pmb->u.mb;
19387
a0c87cbd
JS
19388 do {
19389 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_23);
19390 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
19391
19392 if (rc != MBX_SUCCESS) {
19393 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
026abb87
JS
19394 "2601 failed to read config "
19395 "region 23, rc 0x%x Status 0x%x\n",
19396 rc, mb->mbxStatus);
a0c87cbd
JS
19397 mb->un.varDmp.word_cnt = 0;
19398 }
19399 /*
19400 * dump mem may return a zero when finished or we got a
19401 * mailbox error, either way we are done.
19402 */
19403 if (mb->un.varDmp.word_cnt == 0)
19404 break;
a0c87cbd 19405
d91e3abb
DK
19406 i = mb->un.varDmp.word_cnt * sizeof(uint32_t);
19407 if (offset + i > DMP_RGN23_SIZE)
19408 i = DMP_RGN23_SIZE - offset;
a0c87cbd 19409 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
d91e3abb
DK
19410 rgn23_data + offset, i);
19411 offset += i;
19412 } while (offset < DMP_RGN23_SIZE);
a0c87cbd 19413
026abb87
JS
19414 mempool_free(pmb, phba->mbox_mem_pool);
19415 return offset;
19416}
19417
19418/**
19419 * lpfc_sli4_get_config_region23 - Get sli4 port region 23 data.
19420 * @phba: pointer to lpfc hba data structure.
19421 * @rgn23_data: pointer to configure region 23 data.
19422 *
19423 * This function gets SLI4 port configure region 23 data through memory dump
19424 * mailbox command. When it successfully retrieves data, the size of the data
19425 * will be returned, otherwise, 0 will be returned.
19426 **/
19427static uint32_t
19428lpfc_sli4_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
19429{
19430 LPFC_MBOXQ_t *mboxq = NULL;
19431 struct lpfc_dmabuf *mp = NULL;
19432 struct lpfc_mqe *mqe;
19433 uint32_t data_length = 0;
19434 int rc;
19435
19436 if (!rgn23_data)
19437 return 0;
19438
19439 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19440 if (!mboxq) {
19441 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19442 "3105 failed to allocate mailbox memory\n");
19443 return 0;
19444 }
19445
19446 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq))
19447 goto out;
19448 mqe = &mboxq->u.mqe;
3e1f0718 19449 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
026abb87
JS
19450 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
19451 if (rc)
19452 goto out;
19453 data_length = mqe->un.mb_words[5];
19454 if (data_length == 0)
19455 goto out;
19456 if (data_length > DMP_RGN23_SIZE) {
19457 data_length = 0;
19458 goto out;
19459 }
19460 lpfc_sli_pcimem_bcopy((char *)mp->virt, rgn23_data, data_length);
19461out:
19462 mempool_free(mboxq, phba->mbox_mem_pool);
19463 if (mp) {
19464 lpfc_mbuf_free(phba, mp->virt, mp->phys);
19465 kfree(mp);
19466 }
19467 return data_length;
19468}
19469
19470/**
19471 * lpfc_sli_read_link_ste - Read region 23 to decide if link is disabled.
19472 * @phba: pointer to lpfc hba data structure.
19473 *
19474 * This function read region 23 and parse TLV for port status to
19475 * decide if the user disaled the port. If the TLV indicates the
19476 * port is disabled, the hba_flag is set accordingly.
19477 **/
19478void
19479lpfc_sli_read_link_ste(struct lpfc_hba *phba)
19480{
19481 uint8_t *rgn23_data = NULL;
19482 uint32_t if_type, data_size, sub_tlv_len, tlv_offset;
19483 uint32_t offset = 0;
19484
19485 /* Get adapter Region 23 data */
19486 rgn23_data = kzalloc(DMP_RGN23_SIZE, GFP_KERNEL);
19487 if (!rgn23_data)
19488 goto out;
19489
19490 if (phba->sli_rev < LPFC_SLI_REV4)
19491 data_size = lpfc_sli_get_config_region23(phba, rgn23_data);
19492 else {
19493 if_type = bf_get(lpfc_sli_intf_if_type,
19494 &phba->sli4_hba.sli_intf);
19495 if (if_type == LPFC_SLI_INTF_IF_TYPE_0)
19496 goto out;
19497 data_size = lpfc_sli4_get_config_region23(phba, rgn23_data);
19498 }
a0c87cbd
JS
19499
19500 if (!data_size)
19501 goto out;
19502
19503 /* Check the region signature first */
19504 if (memcmp(&rgn23_data[offset], LPFC_REGION23_SIGNATURE, 4)) {
19505 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19506 "2619 Config region 23 has bad signature\n");
19507 goto out;
19508 }
19509 offset += 4;
19510
19511 /* Check the data structure version */
19512 if (rgn23_data[offset] != LPFC_REGION23_VERSION) {
19513 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19514 "2620 Config region 23 has bad version\n");
19515 goto out;
19516 }
19517 offset += 4;
19518
19519 /* Parse TLV entries in the region */
19520 while (offset < data_size) {
19521 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC)
19522 break;
19523 /*
19524 * If the TLV is not driver specific TLV or driver id is
19525 * not linux driver id, skip the record.
19526 */
19527 if ((rgn23_data[offset] != DRIVER_SPECIFIC_TYPE) ||
19528 (rgn23_data[offset + 2] != LINUX_DRIVER_ID) ||
19529 (rgn23_data[offset + 3] != 0)) {
19530 offset += rgn23_data[offset + 1] * 4 + 4;
19531 continue;
19532 }
19533
19534 /* Driver found a driver specific TLV in the config region */
19535 sub_tlv_len = rgn23_data[offset + 1] * 4;
19536 offset += 4;
19537 tlv_offset = 0;
19538
19539 /*
19540 * Search for configured port state sub-TLV.
19541 */
19542 while ((offset < data_size) &&
19543 (tlv_offset < sub_tlv_len)) {
19544 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC) {
19545 offset += 4;
19546 tlv_offset += 4;
19547 break;
19548 }
19549 if (rgn23_data[offset] != PORT_STE_TYPE) {
19550 offset += rgn23_data[offset + 1] * 4 + 4;
19551 tlv_offset += rgn23_data[offset + 1] * 4 + 4;
19552 continue;
19553 }
19554
19555 /* This HBA contains PORT_STE configured */
19556 if (!rgn23_data[offset + 2])
19557 phba->hba_flag |= LINK_DISABLED;
19558
19559 goto out;
19560 }
19561 }
026abb87 19562
a0c87cbd 19563out:
a0c87cbd
JS
19564 kfree(rgn23_data);
19565 return;
19566}
695a814e 19567
52d52440
JS
19568/**
19569 * lpfc_wr_object - write an object to the firmware
19570 * @phba: HBA structure that indicates port to create a queue on.
19571 * @dmabuf_list: list of dmabufs to write to the port.
19572 * @size: the total byte value of the objects to write to the port.
19573 * @offset: the current offset to be used to start the transfer.
19574 *
19575 * This routine will create a wr_object mailbox command to send to the port.
19576 * the mailbox command will be constructed using the dma buffers described in
19577 * @dmabuf_list to create a list of BDEs. This routine will fill in as many
19578 * BDEs that the imbedded mailbox can support. The @offset variable will be
19579 * used to indicate the starting offset of the transfer and will also return
19580 * the offset after the write object mailbox has completed. @size is used to
19581 * determine the end of the object and whether the eof bit should be set.
19582 *
19583 * Return 0 is successful and offset will contain the the new offset to use
19584 * for the next write.
19585 * Return negative value for error cases.
19586 **/
19587int
19588lpfc_wr_object(struct lpfc_hba *phba, struct list_head *dmabuf_list,
19589 uint32_t size, uint32_t *offset)
19590{
19591 struct lpfc_mbx_wr_object *wr_object;
19592 LPFC_MBOXQ_t *mbox;
19593 int rc = 0, i = 0;
f3d0a8ac 19594 uint32_t shdr_status, shdr_add_status, shdr_change_status, shdr_csf;
52d52440 19595 uint32_t mbox_tmo;
52d52440
JS
19596 struct lpfc_dmabuf *dmabuf;
19597 uint32_t written = 0;
5021267a 19598 bool check_change_status = false;
52d52440
JS
19599
19600 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19601 if (!mbox)
19602 return -ENOMEM;
19603
19604 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
19605 LPFC_MBOX_OPCODE_WRITE_OBJECT,
19606 sizeof(struct lpfc_mbx_wr_object) -
19607 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
19608
19609 wr_object = (struct lpfc_mbx_wr_object *)&mbox->u.mqe.un.wr_object;
19610 wr_object->u.request.write_offset = *offset;
19611 sprintf((uint8_t *)wr_object->u.request.object_name, "/");
19612 wr_object->u.request.object_name[0] =
19613 cpu_to_le32(wr_object->u.request.object_name[0]);
19614 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 0);
19615 list_for_each_entry(dmabuf, dmabuf_list, list) {
19616 if (i >= LPFC_MBX_WR_CONFIG_MAX_BDE || written >= size)
19617 break;
19618 wr_object->u.request.bde[i].addrLow = putPaddrLow(dmabuf->phys);
19619 wr_object->u.request.bde[i].addrHigh =
19620 putPaddrHigh(dmabuf->phys);
19621 if (written + SLI4_PAGE_SIZE >= size) {
19622 wr_object->u.request.bde[i].tus.f.bdeSize =
19623 (size - written);
19624 written += (size - written);
19625 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 1);
5021267a
JS
19626 bf_set(lpfc_wr_object_eas, &wr_object->u.request, 1);
19627 check_change_status = true;
52d52440
JS
19628 } else {
19629 wr_object->u.request.bde[i].tus.f.bdeSize =
19630 SLI4_PAGE_SIZE;
19631 written += SLI4_PAGE_SIZE;
19632 }
19633 i++;
19634 }
19635 wr_object->u.request.bde_count = i;
19636 bf_set(lpfc_wr_object_write_length, &wr_object->u.request, written);
19637 if (!phba->sli4_hba.intr_enable)
19638 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
19639 else {
a183a15f 19640 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
52d52440
JS
19641 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
19642 }
19643 /* The IOCTL status is embedded in the mailbox subheader. */
5021267a
JS
19644 shdr_status = bf_get(lpfc_mbox_hdr_status,
19645 &wr_object->header.cfg_shdr.response);
19646 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
19647 &wr_object->header.cfg_shdr.response);
19648 if (check_change_status) {
19649 shdr_change_status = bf_get(lpfc_wr_object_change_status,
19650 &wr_object->u.response);
f3d0a8ac
JS
19651
19652 if (shdr_change_status == LPFC_CHANGE_STATUS_FW_RESET ||
19653 shdr_change_status == LPFC_CHANGE_STATUS_PORT_MIGRATION) {
19654 shdr_csf = bf_get(lpfc_wr_object_csf,
19655 &wr_object->u.response);
19656 if (shdr_csf)
19657 shdr_change_status =
19658 LPFC_CHANGE_STATUS_PCI_RESET;
19659 }
19660
5021267a
JS
19661 switch (shdr_change_status) {
19662 case (LPFC_CHANGE_STATUS_PHYS_DEV_RESET):
19663 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19664 "3198 Firmware write complete: System "
19665 "reboot required to instantiate\n");
19666 break;
19667 case (LPFC_CHANGE_STATUS_FW_RESET):
19668 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19669 "3199 Firmware write complete: Firmware"
19670 " reset required to instantiate\n");
19671 break;
19672 case (LPFC_CHANGE_STATUS_PORT_MIGRATION):
19673 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19674 "3200 Firmware write complete: Port "
19675 "Migration or PCI Reset required to "
19676 "instantiate\n");
19677 break;
19678 case (LPFC_CHANGE_STATUS_PCI_RESET):
19679 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19680 "3201 Firmware write complete: PCI "
19681 "Reset required to instantiate\n");
19682 break;
19683 default:
19684 break;
19685 }
19686 }
52d52440
JS
19687 if (rc != MBX_TIMEOUT)
19688 mempool_free(mbox, phba->mbox_mem_pool);
19689 if (shdr_status || shdr_add_status || rc) {
19690 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19691 "3025 Write Object mailbox failed with "
19692 "status x%x add_status x%x, mbx status x%x\n",
19693 shdr_status, shdr_add_status, rc);
19694 rc = -ENXIO;
1feb8204 19695 *offset = shdr_add_status;
52d52440
JS
19696 } else
19697 *offset += wr_object->u.response.actual_write_length;
19698 return rc;
19699}
19700
695a814e
JS
19701/**
19702 * lpfc_cleanup_pending_mbox - Free up vport discovery mailbox commands.
19703 * @vport: pointer to vport data structure.
19704 *
19705 * This function iterate through the mailboxq and clean up all REG_LOGIN
19706 * and REG_VPI mailbox commands associated with the vport. This function
19707 * is called when driver want to restart discovery of the vport due to
19708 * a Clear Virtual Link event.
19709 **/
19710void
19711lpfc_cleanup_pending_mbox(struct lpfc_vport *vport)
19712{
19713 struct lpfc_hba *phba = vport->phba;
19714 LPFC_MBOXQ_t *mb, *nextmb;
19715 struct lpfc_dmabuf *mp;
78730cfe 19716 struct lpfc_nodelist *ndlp;
d439d286 19717 struct lpfc_nodelist *act_mbx_ndlp = NULL;
589a52d6 19718 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
d439d286 19719 LIST_HEAD(mbox_cmd_list);
63e801ce 19720 uint8_t restart_loop;
695a814e 19721
d439d286 19722 /* Clean up internally queued mailbox commands with the vport */
695a814e
JS
19723 spin_lock_irq(&phba->hbalock);
19724 list_for_each_entry_safe(mb, nextmb, &phba->sli.mboxq, list) {
19725 if (mb->vport != vport)
19726 continue;
19727
19728 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19729 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19730 continue;
19731
d439d286
JS
19732 list_del(&mb->list);
19733 list_add_tail(&mb->list, &mbox_cmd_list);
19734 }
19735 /* Clean up active mailbox command with the vport */
19736 mb = phba->sli.mbox_active;
19737 if (mb && (mb->vport == vport)) {
19738 if ((mb->u.mb.mbxCommand == MBX_REG_LOGIN64) ||
19739 (mb->u.mb.mbxCommand == MBX_REG_VPI))
19740 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19741 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19742 act_mbx_ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
d439d286
JS
19743 /* Put reference count for delayed processing */
19744 act_mbx_ndlp = lpfc_nlp_get(act_mbx_ndlp);
19745 /* Unregister the RPI when mailbox complete */
19746 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19747 }
19748 }
63e801ce
JS
19749 /* Cleanup any mailbox completions which are not yet processed */
19750 do {
19751 restart_loop = 0;
19752 list_for_each_entry(mb, &phba->sli.mboxq_cmpl, list) {
19753 /*
19754 * If this mailox is already processed or it is
19755 * for another vport ignore it.
19756 */
19757 if ((mb->vport != vport) ||
19758 (mb->mbox_flag & LPFC_MBX_IMED_UNREG))
19759 continue;
19760
19761 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19762 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19763 continue;
19764
19765 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19766 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19767 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
63e801ce
JS
19768 /* Unregister the RPI when mailbox complete */
19769 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19770 restart_loop = 1;
19771 spin_unlock_irq(&phba->hbalock);
19772 spin_lock(shost->host_lock);
19773 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19774 spin_unlock(shost->host_lock);
19775 spin_lock_irq(&phba->hbalock);
19776 break;
19777 }
19778 }
19779 } while (restart_loop);
19780
d439d286
JS
19781 spin_unlock_irq(&phba->hbalock);
19782
19783 /* Release the cleaned-up mailbox commands */
19784 while (!list_empty(&mbox_cmd_list)) {
19785 list_remove_head(&mbox_cmd_list, mb, LPFC_MBOXQ_t, list);
695a814e 19786 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19787 mp = (struct lpfc_dmabuf *)(mb->ctx_buf);
695a814e
JS
19788 if (mp) {
19789 __lpfc_mbuf_free(phba, mp->virt, mp->phys);
19790 kfree(mp);
19791 }
3e1f0718
JS
19792 mb->ctx_buf = NULL;
19793 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
19794 mb->ctx_ndlp = NULL;
78730cfe 19795 if (ndlp) {
ec21b3b0 19796 spin_lock(shost->host_lock);
589a52d6 19797 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
ec21b3b0 19798 spin_unlock(shost->host_lock);
78730cfe 19799 lpfc_nlp_put(ndlp);
78730cfe 19800 }
695a814e 19801 }
695a814e
JS
19802 mempool_free(mb, phba->mbox_mem_pool);
19803 }
d439d286
JS
19804
19805 /* Release the ndlp with the cleaned-up active mailbox command */
19806 if (act_mbx_ndlp) {
19807 spin_lock(shost->host_lock);
19808 act_mbx_ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19809 spin_unlock(shost->host_lock);
19810 lpfc_nlp_put(act_mbx_ndlp);
695a814e 19811 }
695a814e
JS
19812}
19813
2a9bf3d0
JS
19814/**
19815 * lpfc_drain_txq - Drain the txq
19816 * @phba: Pointer to HBA context object.
19817 *
19818 * This function attempt to submit IOCBs on the txq
19819 * to the adapter. For SLI4 adapters, the txq contains
19820 * ELS IOCBs that have been deferred because the there
19821 * are no SGLs. This congestion can occur with large
19822 * vport counts during node discovery.
19823 **/
19824
19825uint32_t
19826lpfc_drain_txq(struct lpfc_hba *phba)
19827{
19828 LIST_HEAD(completions);
895427bd 19829 struct lpfc_sli_ring *pring;
2e706377 19830 struct lpfc_iocbq *piocbq = NULL;
2a9bf3d0
JS
19831 unsigned long iflags = 0;
19832 char *fail_msg = NULL;
19833 struct lpfc_sglq *sglq;
205e8240 19834 union lpfc_wqe128 wqe;
a2fc4aef 19835 uint32_t txq_cnt = 0;
dc19e3b4 19836 struct lpfc_queue *wq;
2a9bf3d0 19837
dc19e3b4
JS
19838 if (phba->link_flag & LS_MDS_LOOPBACK) {
19839 /* MDS WQE are posted only to first WQ*/
c00f62e6 19840 wq = phba->sli4_hba.hdwq[0].io_wq;
dc19e3b4
JS
19841 if (unlikely(!wq))
19842 return 0;
19843 pring = wq->pring;
19844 } else {
19845 wq = phba->sli4_hba.els_wq;
19846 if (unlikely(!wq))
19847 return 0;
19848 pring = lpfc_phba_elsring(phba);
19849 }
19850
19851 if (unlikely(!pring) || list_empty(&pring->txq))
1234a6d5 19852 return 0;
895427bd 19853
398d81c9 19854 spin_lock_irqsave(&pring->ring_lock, iflags);
0e9bb8d7
JS
19855 list_for_each_entry(piocbq, &pring->txq, list) {
19856 txq_cnt++;
19857 }
19858
19859 if (txq_cnt > pring->txq_max)
19860 pring->txq_max = txq_cnt;
2a9bf3d0 19861
398d81c9 19862 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19863
0e9bb8d7 19864 while (!list_empty(&pring->txq)) {
398d81c9 19865 spin_lock_irqsave(&pring->ring_lock, iflags);
2a9bf3d0 19866
19ca7609 19867 piocbq = lpfc_sli_ringtx_get(phba, pring);
a629852a 19868 if (!piocbq) {
398d81c9 19869 spin_unlock_irqrestore(&pring->ring_lock, iflags);
a629852a
JS
19870 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19871 "2823 txq empty and txq_cnt is %d\n ",
0e9bb8d7 19872 txq_cnt);
a629852a
JS
19873 break;
19874 }
895427bd 19875 sglq = __lpfc_sli_get_els_sglq(phba, piocbq);
2a9bf3d0 19876 if (!sglq) {
19ca7609 19877 __lpfc_sli_ringtx_put(phba, pring, piocbq);
398d81c9 19878 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19879 break;
2a9bf3d0 19880 }
0e9bb8d7 19881 txq_cnt--;
2a9bf3d0
JS
19882
19883 /* The xri and iocb resources secured,
19884 * attempt to issue request
19885 */
6d368e53 19886 piocbq->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0
JS
19887 piocbq->sli4_xritag = sglq->sli4_xritag;
19888 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocbq, sglq))
19889 fail_msg = "to convert bpl to sgl";
205e8240 19890 else if (lpfc_sli4_iocb2wqe(phba, piocbq, &wqe))
2a9bf3d0 19891 fail_msg = "to convert iocb to wqe";
dc19e3b4 19892 else if (lpfc_sli4_wq_put(wq, &wqe))
2a9bf3d0
JS
19893 fail_msg = " - Wq is full";
19894 else
19895 lpfc_sli_ringtxcmpl_put(phba, pring, piocbq);
19896
19897 if (fail_msg) {
19898 /* Failed means we can't issue and need to cancel */
19899 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19900 "2822 IOCB failed %s iotag 0x%x "
19901 "xri 0x%x\n",
19902 fail_msg,
19903 piocbq->iotag, piocbq->sli4_xritag);
19904 list_add_tail(&piocbq->list, &completions);
19905 }
398d81c9 19906 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0
JS
19907 }
19908
2a9bf3d0
JS
19909 /* Cancel all the IOCBs that cannot be issued */
19910 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
19911 IOERR_SLI_ABORTED);
19912
0e9bb8d7 19913 return txq_cnt;
2a9bf3d0 19914}
895427bd
JS
19915
19916/**
19917 * lpfc_wqe_bpl2sgl - Convert the bpl/bde to a sgl.
19918 * @phba: Pointer to HBA context object.
19919 * @pwqe: Pointer to command WQE.
19920 * @sglq: Pointer to the scatter gather queue object.
19921 *
19922 * This routine converts the bpl or bde that is in the WQE
19923 * to a sgl list for the sli4 hardware. The physical address
19924 * of the bpl/bde is converted back to a virtual address.
19925 * If the WQE contains a BPL then the list of BDE's is
19926 * converted to sli4_sge's. If the WQE contains a single
19927 * BDE then it is converted to a single sli_sge.
19928 * The WQE is still in cpu endianness so the contents of
19929 * the bpl can be used without byte swapping.
19930 *
19931 * Returns valid XRI = Success, NO_XRI = Failure.
19932 */
19933static uint16_t
19934lpfc_wqe_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *pwqeq,
19935 struct lpfc_sglq *sglq)
19936{
19937 uint16_t xritag = NO_XRI;
19938 struct ulp_bde64 *bpl = NULL;
19939 struct ulp_bde64 bde;
19940 struct sli4_sge *sgl = NULL;
19941 struct lpfc_dmabuf *dmabuf;
205e8240 19942 union lpfc_wqe128 *wqe;
895427bd
JS
19943 int numBdes = 0;
19944 int i = 0;
19945 uint32_t offset = 0; /* accumulated offset in the sg request list */
19946 int inbound = 0; /* number of sg reply entries inbound from firmware */
19947 uint32_t cmd;
19948
19949 if (!pwqeq || !sglq)
19950 return xritag;
19951
19952 sgl = (struct sli4_sge *)sglq->sgl;
19953 wqe = &pwqeq->wqe;
19954 pwqeq->iocb.ulpIoTag = pwqeq->iotag;
19955
19956 cmd = bf_get(wqe_cmnd, &wqe->generic.wqe_com);
19957 if (cmd == CMD_XMIT_BLS_RSP64_WQE)
19958 return sglq->sli4_xritag;
19959 numBdes = pwqeq->rsvd2;
19960 if (numBdes) {
19961 /* The addrHigh and addrLow fields within the WQE
19962 * have not been byteswapped yet so there is no
19963 * need to swap them back.
19964 */
19965 if (pwqeq->context3)
19966 dmabuf = (struct lpfc_dmabuf *)pwqeq->context3;
19967 else
19968 return xritag;
19969
19970 bpl = (struct ulp_bde64 *)dmabuf->virt;
19971 if (!bpl)
19972 return xritag;
19973
19974 for (i = 0; i < numBdes; i++) {
19975 /* Should already be byte swapped. */
19976 sgl->addr_hi = bpl->addrHigh;
19977 sgl->addr_lo = bpl->addrLow;
19978
19979 sgl->word2 = le32_to_cpu(sgl->word2);
19980 if ((i+1) == numBdes)
19981 bf_set(lpfc_sli4_sge_last, sgl, 1);
19982 else
19983 bf_set(lpfc_sli4_sge_last, sgl, 0);
19984 /* swap the size field back to the cpu so we
19985 * can assign it to the sgl.
19986 */
19987 bde.tus.w = le32_to_cpu(bpl->tus.w);
19988 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
19989 /* The offsets in the sgl need to be accumulated
19990 * separately for the request and reply lists.
19991 * The request is always first, the reply follows.
19992 */
19993 switch (cmd) {
19994 case CMD_GEN_REQUEST64_WQE:
19995 /* add up the reply sg entries */
19996 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
19997 inbound++;
19998 /* first inbound? reset the offset */
19999 if (inbound == 1)
20000 offset = 0;
20001 bf_set(lpfc_sli4_sge_offset, sgl, offset);
20002 bf_set(lpfc_sli4_sge_type, sgl,
20003 LPFC_SGE_TYPE_DATA);
20004 offset += bde.tus.f.bdeSize;
20005 break;
20006 case CMD_FCP_TRSP64_WQE:
20007 bf_set(lpfc_sli4_sge_offset, sgl, 0);
20008 bf_set(lpfc_sli4_sge_type, sgl,
20009 LPFC_SGE_TYPE_DATA);
20010 break;
20011 case CMD_FCP_TSEND64_WQE:
20012 case CMD_FCP_TRECEIVE64_WQE:
20013 bf_set(lpfc_sli4_sge_type, sgl,
20014 bpl->tus.f.bdeFlags);
20015 if (i < 3)
20016 offset = 0;
20017 else
20018 offset += bde.tus.f.bdeSize;
20019 bf_set(lpfc_sli4_sge_offset, sgl, offset);
20020 break;
20021 }
20022 sgl->word2 = cpu_to_le32(sgl->word2);
20023 bpl++;
20024 sgl++;
20025 }
20026 } else if (wqe->gen_req.bde.tus.f.bdeFlags == BUFF_TYPE_BDE_64) {
20027 /* The addrHigh and addrLow fields of the BDE have not
20028 * been byteswapped yet so they need to be swapped
20029 * before putting them in the sgl.
20030 */
20031 sgl->addr_hi = cpu_to_le32(wqe->gen_req.bde.addrHigh);
20032 sgl->addr_lo = cpu_to_le32(wqe->gen_req.bde.addrLow);
20033 sgl->word2 = le32_to_cpu(sgl->word2);
20034 bf_set(lpfc_sli4_sge_last, sgl, 1);
20035 sgl->word2 = cpu_to_le32(sgl->word2);
20036 sgl->sge_len = cpu_to_le32(wqe->gen_req.bde.tus.f.bdeSize);
20037 }
20038 return sglq->sli4_xritag;
20039}
20040
20041/**
20042 * lpfc_sli4_issue_wqe - Issue an SLI4 Work Queue Entry (WQE)
20043 * @phba: Pointer to HBA context object.
20044 * @ring_number: Base sli ring number
20045 * @pwqe: Pointer to command WQE.
20046 **/
20047int
1fbf9742 20048lpfc_sli4_issue_wqe(struct lpfc_hba *phba, struct lpfc_sli4_hdw_queue *qp,
895427bd
JS
20049 struct lpfc_iocbq *pwqe)
20050{
205e8240 20051 union lpfc_wqe128 *wqe = &pwqe->wqe;
7cacae2a 20052 struct lpfc_async_xchg_ctx *ctxp;
895427bd
JS
20053 struct lpfc_queue *wq;
20054 struct lpfc_sglq *sglq;
20055 struct lpfc_sli_ring *pring;
20056 unsigned long iflags;
cd22d605 20057 uint32_t ret = 0;
895427bd
JS
20058
20059 /* NVME_LS and NVME_LS ABTS requests. */
20060 if (pwqe->iocb_flag & LPFC_IO_NVME_LS) {
20061 pring = phba->sli4_hba.nvmels_wq->pring;
6a828b0f
JS
20062 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
20063 qp, wq_access);
895427bd
JS
20064 sglq = __lpfc_sli_get_els_sglq(phba, pwqe);
20065 if (!sglq) {
20066 spin_unlock_irqrestore(&pring->ring_lock, iflags);
20067 return WQE_BUSY;
20068 }
20069 pwqe->sli4_lxritag = sglq->sli4_lxritag;
20070 pwqe->sli4_xritag = sglq->sli4_xritag;
20071 if (lpfc_wqe_bpl2sgl(phba, pwqe, sglq) == NO_XRI) {
20072 spin_unlock_irqrestore(&pring->ring_lock, iflags);
20073 return WQE_ERROR;
20074 }
20075 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
20076 pwqe->sli4_xritag);
cd22d605
DK
20077 ret = lpfc_sli4_wq_put(phba->sli4_hba.nvmels_wq, wqe);
20078 if (ret) {
895427bd 20079 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 20080 return ret;
895427bd 20081 }
cd22d605 20082
895427bd
JS
20083 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
20084 spin_unlock_irqrestore(&pring->ring_lock, iflags);
93a4d6f4
JS
20085
20086 lpfc_sli4_poll_eq(qp->hba_eq, LPFC_POLL_FASTPATH);
895427bd
JS
20087 return 0;
20088 }
20089
20090 /* NVME_FCREQ and NVME_ABTS requests */
20091 if (pwqe->iocb_flag & LPFC_IO_NVME) {
20092 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
c00f62e6 20093 wq = qp->io_wq;
1fbf9742 20094 pring = wq->pring;
895427bd 20095
c00f62e6 20096 bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->io_cq_map);
895427bd 20097
6a828b0f
JS
20098 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
20099 qp, wq_access);
cd22d605
DK
20100 ret = lpfc_sli4_wq_put(wq, wqe);
20101 if (ret) {
895427bd 20102 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 20103 return ret;
895427bd
JS
20104 }
20105 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
20106 spin_unlock_irqrestore(&pring->ring_lock, iflags);
93a4d6f4
JS
20107
20108 lpfc_sli4_poll_eq(qp->hba_eq, LPFC_POLL_FASTPATH);
895427bd
JS
20109 return 0;
20110 }
20111
f358dd0c
JS
20112 /* NVMET requests */
20113 if (pwqe->iocb_flag & LPFC_IO_NVMET) {
20114 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
c00f62e6 20115 wq = qp->io_wq;
1fbf9742 20116 pring = wq->pring;
f358dd0c 20117
f358dd0c 20118 ctxp = pwqe->context2;
6c621a22 20119 sglq = ctxp->ctxbuf->sglq;
f358dd0c
JS
20120 if (pwqe->sli4_xritag == NO_XRI) {
20121 pwqe->sli4_lxritag = sglq->sli4_lxritag;
20122 pwqe->sli4_xritag = sglq->sli4_xritag;
20123 }
20124 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
20125 pwqe->sli4_xritag);
c00f62e6 20126 bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->io_cq_map);
1fbf9742 20127
6a828b0f
JS
20128 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags,
20129 qp, wq_access);
cd22d605
DK
20130 ret = lpfc_sli4_wq_put(wq, wqe);
20131 if (ret) {
f358dd0c 20132 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 20133 return ret;
f358dd0c
JS
20134 }
20135 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
20136 spin_unlock_irqrestore(&pring->ring_lock, iflags);
93a4d6f4
JS
20137
20138 lpfc_sli4_poll_eq(qp->hba_eq, LPFC_POLL_FASTPATH);
f358dd0c
JS
20139 return 0;
20140 }
895427bd
JS
20141 return WQE_ERROR;
20142}
c490850a
JS
20143
20144#ifdef LPFC_MXP_STAT
20145/**
20146 * lpfc_snapshot_mxp - Snapshot pbl, pvt and busy count
20147 * @phba: pointer to lpfc hba data structure.
20148 * @hwqid: belong to which HWQ.
20149 *
20150 * The purpose of this routine is to take a snapshot of pbl, pvt and busy count
20151 * 15 seconds after a test case is running.
20152 *
20153 * The user should call lpfc_debugfs_multixripools_write before running a test
20154 * case to clear stat_snapshot_taken. Then the user starts a test case. During
20155 * test case is running, stat_snapshot_taken is incremented by 1 every time when
20156 * this routine is called from heartbeat timer. When stat_snapshot_taken is
20157 * equal to LPFC_MXP_SNAPSHOT_TAKEN, a snapshot is taken.
20158 **/
20159void lpfc_snapshot_mxp(struct lpfc_hba *phba, u32 hwqid)
20160{
20161 struct lpfc_sli4_hdw_queue *qp;
20162 struct lpfc_multixri_pool *multixri_pool;
20163 struct lpfc_pvt_pool *pvt_pool;
20164 struct lpfc_pbl_pool *pbl_pool;
20165 u32 txcmplq_cnt;
20166
20167 qp = &phba->sli4_hba.hdwq[hwqid];
20168 multixri_pool = qp->p_multixri_pool;
20169 if (!multixri_pool)
20170 return;
20171
20172 if (multixri_pool->stat_snapshot_taken == LPFC_MXP_SNAPSHOT_TAKEN) {
20173 pvt_pool = &qp->p_multixri_pool->pvt_pool;
20174 pbl_pool = &qp->p_multixri_pool->pbl_pool;
c00f62e6 20175 txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt;
c490850a
JS
20176
20177 multixri_pool->stat_pbl_count = pbl_pool->count;
20178 multixri_pool->stat_pvt_count = pvt_pool->count;
20179 multixri_pool->stat_busy_count = txcmplq_cnt;
20180 }
20181
20182 multixri_pool->stat_snapshot_taken++;
20183}
20184#endif
20185
20186/**
20187 * lpfc_adjust_pvt_pool_count - Adjust private pool count
20188 * @phba: pointer to lpfc hba data structure.
20189 * @hwqid: belong to which HWQ.
20190 *
20191 * This routine moves some XRIs from private to public pool when private pool
20192 * is not busy.
20193 **/
20194void lpfc_adjust_pvt_pool_count(struct lpfc_hba *phba, u32 hwqid)
20195{
20196 struct lpfc_multixri_pool *multixri_pool;
20197 u32 io_req_count;
20198 u32 prev_io_req_count;
20199
20200 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
20201 if (!multixri_pool)
20202 return;
20203 io_req_count = multixri_pool->io_req_count;
20204 prev_io_req_count = multixri_pool->prev_io_req_count;
20205
20206 if (prev_io_req_count != io_req_count) {
20207 /* Private pool is busy */
20208 multixri_pool->prev_io_req_count = io_req_count;
20209 } else {
20210 /* Private pool is not busy.
20211 * Move XRIs from private to public pool.
20212 */
20213 lpfc_move_xri_pvt_to_pbl(phba, hwqid);
20214 }
20215}
20216
20217/**
20218 * lpfc_adjust_high_watermark - Adjust high watermark
20219 * @phba: pointer to lpfc hba data structure.
20220 * @hwqid: belong to which HWQ.
20221 *
20222 * This routine sets high watermark as number of outstanding XRIs,
20223 * but make sure the new value is between xri_limit/2 and xri_limit.
20224 **/
20225void lpfc_adjust_high_watermark(struct lpfc_hba *phba, u32 hwqid)
20226{
20227 u32 new_watermark;
20228 u32 watermark_max;
20229 u32 watermark_min;
20230 u32 xri_limit;
20231 u32 txcmplq_cnt;
20232 u32 abts_io_bufs;
20233 struct lpfc_multixri_pool *multixri_pool;
20234 struct lpfc_sli4_hdw_queue *qp;
20235
20236 qp = &phba->sli4_hba.hdwq[hwqid];
20237 multixri_pool = qp->p_multixri_pool;
20238 if (!multixri_pool)
20239 return;
20240 xri_limit = multixri_pool->xri_limit;
20241
20242 watermark_max = xri_limit;
20243 watermark_min = xri_limit / 2;
20244
c00f62e6 20245 txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt;
c490850a 20246 abts_io_bufs = qp->abts_scsi_io_bufs;
c00f62e6 20247 abts_io_bufs += qp->abts_nvme_io_bufs;
c490850a
JS
20248
20249 new_watermark = txcmplq_cnt + abts_io_bufs;
20250 new_watermark = min(watermark_max, new_watermark);
20251 new_watermark = max(watermark_min, new_watermark);
20252 multixri_pool->pvt_pool.high_watermark = new_watermark;
20253
20254#ifdef LPFC_MXP_STAT
20255 multixri_pool->stat_max_hwm = max(multixri_pool->stat_max_hwm,
20256 new_watermark);
20257#endif
20258}
20259
20260/**
20261 * lpfc_move_xri_pvt_to_pbl - Move some XRIs from private to public pool
20262 * @phba: pointer to lpfc hba data structure.
20263 * @hwqid: belong to which HWQ.
20264 *
20265 * This routine is called from hearbeat timer when pvt_pool is idle.
20266 * All free XRIs are moved from private to public pool on hwqid with 2 steps.
20267 * The first step moves (all - low_watermark) amount of XRIs.
20268 * The second step moves the rest of XRIs.
20269 **/
20270void lpfc_move_xri_pvt_to_pbl(struct lpfc_hba *phba, u32 hwqid)
20271{
20272 struct lpfc_pbl_pool *pbl_pool;
20273 struct lpfc_pvt_pool *pvt_pool;
6a828b0f 20274 struct lpfc_sli4_hdw_queue *qp;
c490850a
JS
20275 struct lpfc_io_buf *lpfc_ncmd;
20276 struct lpfc_io_buf *lpfc_ncmd_next;
20277 unsigned long iflag;
20278 struct list_head tmp_list;
20279 u32 tmp_count;
20280
6a828b0f
JS
20281 qp = &phba->sli4_hba.hdwq[hwqid];
20282 pbl_pool = &qp->p_multixri_pool->pbl_pool;
20283 pvt_pool = &qp->p_multixri_pool->pvt_pool;
c490850a
JS
20284 tmp_count = 0;
20285
6a828b0f
JS
20286 lpfc_qp_spin_lock_irqsave(&pbl_pool->lock, iflag, qp, mv_to_pub_pool);
20287 lpfc_qp_spin_lock(&pvt_pool->lock, qp, mv_from_pvt_pool);
c490850a
JS
20288
20289 if (pvt_pool->count > pvt_pool->low_watermark) {
20290 /* Step 1: move (all - low_watermark) from pvt_pool
20291 * to pbl_pool
20292 */
20293
20294 /* Move low watermark of bufs from pvt_pool to tmp_list */
20295 INIT_LIST_HEAD(&tmp_list);
20296 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20297 &pvt_pool->list, list) {
20298 list_move_tail(&lpfc_ncmd->list, &tmp_list);
20299 tmp_count++;
20300 if (tmp_count >= pvt_pool->low_watermark)
20301 break;
20302 }
20303
20304 /* Move all bufs from pvt_pool to pbl_pool */
20305 list_splice_init(&pvt_pool->list, &pbl_pool->list);
20306
20307 /* Move all bufs from tmp_list to pvt_pool */
20308 list_splice(&tmp_list, &pvt_pool->list);
20309
20310 pbl_pool->count += (pvt_pool->count - tmp_count);
20311 pvt_pool->count = tmp_count;
20312 } else {
20313 /* Step 2: move the rest from pvt_pool to pbl_pool */
20314 list_splice_init(&pvt_pool->list, &pbl_pool->list);
20315 pbl_pool->count += pvt_pool->count;
20316 pvt_pool->count = 0;
20317 }
20318
20319 spin_unlock(&pvt_pool->lock);
20320 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20321}
20322
20323/**
20324 * _lpfc_move_xri_pbl_to_pvt - Move some XRIs from public to private pool
20325 * @phba: pointer to lpfc hba data structure
20326 * @pbl_pool: specified public free XRI pool
20327 * @pvt_pool: specified private free XRI pool
20328 * @count: number of XRIs to move
20329 *
20330 * This routine tries to move some free common bufs from the specified pbl_pool
20331 * to the specified pvt_pool. It might move less than count XRIs if there's not
20332 * enough in public pool.
20333 *
20334 * Return:
20335 * true - if XRIs are successfully moved from the specified pbl_pool to the
20336 * specified pvt_pool
20337 * false - if the specified pbl_pool is empty or locked by someone else
20338 **/
20339static bool
6a828b0f
JS
20340_lpfc_move_xri_pbl_to_pvt(struct lpfc_hba *phba, struct lpfc_sli4_hdw_queue *qp,
20341 struct lpfc_pbl_pool *pbl_pool,
c490850a
JS
20342 struct lpfc_pvt_pool *pvt_pool, u32 count)
20343{
20344 struct lpfc_io_buf *lpfc_ncmd;
20345 struct lpfc_io_buf *lpfc_ncmd_next;
20346 unsigned long iflag;
20347 int ret;
20348
20349 ret = spin_trylock_irqsave(&pbl_pool->lock, iflag);
20350 if (ret) {
20351 if (pbl_pool->count) {
20352 /* Move a batch of XRIs from public to private pool */
6a828b0f 20353 lpfc_qp_spin_lock(&pvt_pool->lock, qp, mv_to_pvt_pool);
c490850a
JS
20354 list_for_each_entry_safe(lpfc_ncmd,
20355 lpfc_ncmd_next,
20356 &pbl_pool->list,
20357 list) {
20358 list_move_tail(&lpfc_ncmd->list,
20359 &pvt_pool->list);
20360 pvt_pool->count++;
20361 pbl_pool->count--;
20362 count--;
20363 if (count == 0)
20364 break;
20365 }
20366
20367 spin_unlock(&pvt_pool->lock);
20368 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20369 return true;
20370 }
20371 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20372 }
20373
20374 return false;
20375}
20376
20377/**
20378 * lpfc_move_xri_pbl_to_pvt - Move some XRIs from public to private pool
20379 * @phba: pointer to lpfc hba data structure.
20380 * @hwqid: belong to which HWQ.
20381 * @count: number of XRIs to move
20382 *
20383 * This routine tries to find some free common bufs in one of public pools with
20384 * Round Robin method. The search always starts from local hwqid, then the next
20385 * HWQ which was found last time (rrb_next_hwqid). Once a public pool is found,
20386 * a batch of free common bufs are moved to private pool on hwqid.
20387 * It might move less than count XRIs if there's not enough in public pool.
20388 **/
20389void lpfc_move_xri_pbl_to_pvt(struct lpfc_hba *phba, u32 hwqid, u32 count)
20390{
20391 struct lpfc_multixri_pool *multixri_pool;
20392 struct lpfc_multixri_pool *next_multixri_pool;
20393 struct lpfc_pvt_pool *pvt_pool;
20394 struct lpfc_pbl_pool *pbl_pool;
6a828b0f 20395 struct lpfc_sli4_hdw_queue *qp;
c490850a
JS
20396 u32 next_hwqid;
20397 u32 hwq_count;
20398 int ret;
20399
6a828b0f
JS
20400 qp = &phba->sli4_hba.hdwq[hwqid];
20401 multixri_pool = qp->p_multixri_pool;
c490850a
JS
20402 pvt_pool = &multixri_pool->pvt_pool;
20403 pbl_pool = &multixri_pool->pbl_pool;
20404
20405 /* Check if local pbl_pool is available */
6a828b0f 20406 ret = _lpfc_move_xri_pbl_to_pvt(phba, qp, pbl_pool, pvt_pool, count);
c490850a
JS
20407 if (ret) {
20408#ifdef LPFC_MXP_STAT
20409 multixri_pool->local_pbl_hit_count++;
20410#endif
20411 return;
20412 }
20413
20414 hwq_count = phba->cfg_hdw_queue;
20415
20416 /* Get the next hwqid which was found last time */
20417 next_hwqid = multixri_pool->rrb_next_hwqid;
20418
20419 do {
20420 /* Go to next hwq */
20421 next_hwqid = (next_hwqid + 1) % hwq_count;
20422
20423 next_multixri_pool =
20424 phba->sli4_hba.hdwq[next_hwqid].p_multixri_pool;
20425 pbl_pool = &next_multixri_pool->pbl_pool;
20426
20427 /* Check if the public free xri pool is available */
20428 ret = _lpfc_move_xri_pbl_to_pvt(
6a828b0f 20429 phba, qp, pbl_pool, pvt_pool, count);
c490850a
JS
20430
20431 /* Exit while-loop if success or all hwqid are checked */
20432 } while (!ret && next_hwqid != multixri_pool->rrb_next_hwqid);
20433
20434 /* Starting point for the next time */
20435 multixri_pool->rrb_next_hwqid = next_hwqid;
20436
20437 if (!ret) {
20438 /* stats: all public pools are empty*/
20439 multixri_pool->pbl_empty_count++;
20440 }
20441
20442#ifdef LPFC_MXP_STAT
20443 if (ret) {
20444 if (next_hwqid == hwqid)
20445 multixri_pool->local_pbl_hit_count++;
20446 else
20447 multixri_pool->other_pbl_hit_count++;
20448 }
20449#endif
20450}
20451
20452/**
20453 * lpfc_keep_pvt_pool_above_lowwm - Keep pvt_pool above low watermark
20454 * @phba: pointer to lpfc hba data structure.
20455 * @qp: belong to which HWQ.
20456 *
20457 * This routine get a batch of XRIs from pbl_pool if pvt_pool is less than
20458 * low watermark.
20459 **/
20460void lpfc_keep_pvt_pool_above_lowwm(struct lpfc_hba *phba, u32 hwqid)
20461{
20462 struct lpfc_multixri_pool *multixri_pool;
20463 struct lpfc_pvt_pool *pvt_pool;
20464
20465 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
20466 pvt_pool = &multixri_pool->pvt_pool;
20467
20468 if (pvt_pool->count < pvt_pool->low_watermark)
20469 lpfc_move_xri_pbl_to_pvt(phba, hwqid, XRI_BATCH);
20470}
20471
20472/**
20473 * lpfc_release_io_buf - Return one IO buf back to free pool
20474 * @phba: pointer to lpfc hba data structure.
20475 * @lpfc_ncmd: IO buf to be returned.
20476 * @qp: belong to which HWQ.
20477 *
20478 * This routine returns one IO buf back to free pool. If this is an urgent IO,
20479 * the IO buf is returned to expedite pool. If cfg_xri_rebalancing==1,
20480 * the IO buf is returned to pbl_pool or pvt_pool based on watermark and
20481 * xri_limit. If cfg_xri_rebalancing==0, the IO buf is returned to
20482 * lpfc_io_buf_list_put.
20483 **/
20484void lpfc_release_io_buf(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_ncmd,
20485 struct lpfc_sli4_hdw_queue *qp)
20486{
20487 unsigned long iflag;
20488 struct lpfc_pbl_pool *pbl_pool;
20489 struct lpfc_pvt_pool *pvt_pool;
20490 struct lpfc_epd_pool *epd_pool;
20491 u32 txcmplq_cnt;
20492 u32 xri_owned;
20493 u32 xri_limit;
20494 u32 abts_io_bufs;
20495
20496 /* MUST zero fields if buffer is reused by another protocol */
20497 lpfc_ncmd->nvmeCmd = NULL;
20498 lpfc_ncmd->cur_iocbq.wqe_cmpl = NULL;
20499 lpfc_ncmd->cur_iocbq.iocb_cmpl = NULL;
20500
35a635af
JS
20501 if (phba->cfg_xpsgl && !phba->nvmet_support &&
20502 !list_empty(&lpfc_ncmd->dma_sgl_xtra_list))
20503 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
20504
20505 if (!list_empty(&lpfc_ncmd->dma_cmd_rsp_list))
20506 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
20507
c490850a
JS
20508 if (phba->cfg_xri_rebalancing) {
20509 if (lpfc_ncmd->expedite) {
20510 /* Return to expedite pool */
20511 epd_pool = &phba->epd_pool;
20512 spin_lock_irqsave(&epd_pool->lock, iflag);
20513 list_add_tail(&lpfc_ncmd->list, &epd_pool->list);
20514 epd_pool->count++;
20515 spin_unlock_irqrestore(&epd_pool->lock, iflag);
20516 return;
20517 }
20518
20519 /* Avoid invalid access if an IO sneaks in and is being rejected
20520 * just _after_ xri pools are destroyed in lpfc_offline.
20521 * Nothing much can be done at this point.
20522 */
20523 if (!qp->p_multixri_pool)
20524 return;
20525
20526 pbl_pool = &qp->p_multixri_pool->pbl_pool;
20527 pvt_pool = &qp->p_multixri_pool->pvt_pool;
20528
c00f62e6 20529 txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt;
c490850a 20530 abts_io_bufs = qp->abts_scsi_io_bufs;
c00f62e6 20531 abts_io_bufs += qp->abts_nvme_io_bufs;
c490850a
JS
20532
20533 xri_owned = pvt_pool->count + txcmplq_cnt + abts_io_bufs;
20534 xri_limit = qp->p_multixri_pool->xri_limit;
20535
20536#ifdef LPFC_MXP_STAT
20537 if (xri_owned <= xri_limit)
20538 qp->p_multixri_pool->below_limit_count++;
20539 else
20540 qp->p_multixri_pool->above_limit_count++;
20541#endif
20542
20543 /* XRI goes to either public or private free xri pool
20544 * based on watermark and xri_limit
20545 */
20546 if ((pvt_pool->count < pvt_pool->low_watermark) ||
20547 (xri_owned < xri_limit &&
20548 pvt_pool->count < pvt_pool->high_watermark)) {
6a828b0f
JS
20549 lpfc_qp_spin_lock_irqsave(&pvt_pool->lock, iflag,
20550 qp, free_pvt_pool);
c490850a
JS
20551 list_add_tail(&lpfc_ncmd->list,
20552 &pvt_pool->list);
20553 pvt_pool->count++;
20554 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20555 } else {
6a828b0f
JS
20556 lpfc_qp_spin_lock_irqsave(&pbl_pool->lock, iflag,
20557 qp, free_pub_pool);
c490850a
JS
20558 list_add_tail(&lpfc_ncmd->list,
20559 &pbl_pool->list);
20560 pbl_pool->count++;
20561 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20562 }
20563 } else {
6a828b0f
JS
20564 lpfc_qp_spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag,
20565 qp, free_xri);
c490850a
JS
20566 list_add_tail(&lpfc_ncmd->list,
20567 &qp->lpfc_io_buf_list_put);
20568 qp->put_io_bufs++;
20569 spin_unlock_irqrestore(&qp->io_buf_list_put_lock,
20570 iflag);
20571 }
20572}
20573
20574/**
20575 * lpfc_get_io_buf_from_private_pool - Get one free IO buf from private pool
20576 * @phba: pointer to lpfc hba data structure.
20577 * @pvt_pool: pointer to private pool data structure.
20578 * @ndlp: pointer to lpfc nodelist data structure.
20579 *
20580 * This routine tries to get one free IO buf from private pool.
20581 *
20582 * Return:
20583 * pointer to one free IO buf - if private pool is not empty
20584 * NULL - if private pool is empty
20585 **/
20586static struct lpfc_io_buf *
20587lpfc_get_io_buf_from_private_pool(struct lpfc_hba *phba,
6a828b0f 20588 struct lpfc_sli4_hdw_queue *qp,
c490850a
JS
20589 struct lpfc_pvt_pool *pvt_pool,
20590 struct lpfc_nodelist *ndlp)
20591{
20592 struct lpfc_io_buf *lpfc_ncmd;
20593 struct lpfc_io_buf *lpfc_ncmd_next;
20594 unsigned long iflag;
20595
6a828b0f 20596 lpfc_qp_spin_lock_irqsave(&pvt_pool->lock, iflag, qp, alloc_pvt_pool);
c490850a
JS
20597 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20598 &pvt_pool->list, list) {
20599 if (lpfc_test_rrq_active(
20600 phba, ndlp, lpfc_ncmd->cur_iocbq.sli4_lxritag))
20601 continue;
20602 list_del(&lpfc_ncmd->list);
20603 pvt_pool->count--;
20604 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20605 return lpfc_ncmd;
20606 }
20607 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20608
20609 return NULL;
20610}
20611
20612/**
20613 * lpfc_get_io_buf_from_expedite_pool - Get one free IO buf from expedite pool
20614 * @phba: pointer to lpfc hba data structure.
20615 *
20616 * This routine tries to get one free IO buf from expedite pool.
20617 *
20618 * Return:
20619 * pointer to one free IO buf - if expedite pool is not empty
20620 * NULL - if expedite pool is empty
20621 **/
20622static struct lpfc_io_buf *
20623lpfc_get_io_buf_from_expedite_pool(struct lpfc_hba *phba)
20624{
20625 struct lpfc_io_buf *lpfc_ncmd;
20626 struct lpfc_io_buf *lpfc_ncmd_next;
20627 unsigned long iflag;
20628 struct lpfc_epd_pool *epd_pool;
20629
20630 epd_pool = &phba->epd_pool;
20631 lpfc_ncmd = NULL;
20632
20633 spin_lock_irqsave(&epd_pool->lock, iflag);
20634 if (epd_pool->count > 0) {
20635 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20636 &epd_pool->list, list) {
20637 list_del(&lpfc_ncmd->list);
20638 epd_pool->count--;
20639 break;
20640 }
20641 }
20642 spin_unlock_irqrestore(&epd_pool->lock, iflag);
20643
20644 return lpfc_ncmd;
20645}
20646
20647/**
20648 * lpfc_get_io_buf_from_multixri_pools - Get one free IO bufs
20649 * @phba: pointer to lpfc hba data structure.
20650 * @ndlp: pointer to lpfc nodelist data structure.
20651 * @hwqid: belong to which HWQ
20652 * @expedite: 1 means this request is urgent.
20653 *
20654 * This routine will do the following actions and then return a pointer to
20655 * one free IO buf.
20656 *
20657 * 1. If private free xri count is empty, move some XRIs from public to
20658 * private pool.
20659 * 2. Get one XRI from private free xri pool.
20660 * 3. If we fail to get one from pvt_pool and this is an expedite request,
20661 * get one free xri from expedite pool.
20662 *
20663 * Note: ndlp is only used on SCSI side for RRQ testing.
20664 * The caller should pass NULL for ndlp on NVME side.
20665 *
20666 * Return:
20667 * pointer to one free IO buf - if private pool is not empty
20668 * NULL - if private pool is empty
20669 **/
20670static struct lpfc_io_buf *
20671lpfc_get_io_buf_from_multixri_pools(struct lpfc_hba *phba,
20672 struct lpfc_nodelist *ndlp,
20673 int hwqid, int expedite)
20674{
20675 struct lpfc_sli4_hdw_queue *qp;
20676 struct lpfc_multixri_pool *multixri_pool;
20677 struct lpfc_pvt_pool *pvt_pool;
20678 struct lpfc_io_buf *lpfc_ncmd;
20679
20680 qp = &phba->sli4_hba.hdwq[hwqid];
20681 lpfc_ncmd = NULL;
20682 multixri_pool = qp->p_multixri_pool;
20683 pvt_pool = &multixri_pool->pvt_pool;
20684 multixri_pool->io_req_count++;
20685
20686 /* If pvt_pool is empty, move some XRIs from public to private pool */
20687 if (pvt_pool->count == 0)
20688 lpfc_move_xri_pbl_to_pvt(phba, hwqid, XRI_BATCH);
20689
20690 /* Get one XRI from private free xri pool */
6a828b0f 20691 lpfc_ncmd = lpfc_get_io_buf_from_private_pool(phba, qp, pvt_pool, ndlp);
c490850a
JS
20692
20693 if (lpfc_ncmd) {
20694 lpfc_ncmd->hdwq = qp;
20695 lpfc_ncmd->hdwq_no = hwqid;
20696 } else if (expedite) {
20697 /* If we fail to get one from pvt_pool and this is an expedite
20698 * request, get one free xri from expedite pool.
20699 */
20700 lpfc_ncmd = lpfc_get_io_buf_from_expedite_pool(phba);
20701 }
20702
20703 return lpfc_ncmd;
20704}
20705
20706static inline struct lpfc_io_buf *
20707lpfc_io_buf(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, int idx)
20708{
20709 struct lpfc_sli4_hdw_queue *qp;
20710 struct lpfc_io_buf *lpfc_cmd, *lpfc_cmd_next;
20711
20712 qp = &phba->sli4_hba.hdwq[idx];
20713 list_for_each_entry_safe(lpfc_cmd, lpfc_cmd_next,
20714 &qp->lpfc_io_buf_list_get, list) {
20715 if (lpfc_test_rrq_active(phba, ndlp,
20716 lpfc_cmd->cur_iocbq.sli4_lxritag))
20717 continue;
20718
20719 if (lpfc_cmd->flags & LPFC_SBUF_NOT_POSTED)
20720 continue;
20721
20722 list_del_init(&lpfc_cmd->list);
20723 qp->get_io_bufs--;
20724 lpfc_cmd->hdwq = qp;
20725 lpfc_cmd->hdwq_no = idx;
20726 return lpfc_cmd;
20727 }
20728 return NULL;
20729}
20730
20731/**
20732 * lpfc_get_io_buf - Get one IO buffer from free pool
20733 * @phba: The HBA for which this call is being executed.
20734 * @ndlp: pointer to lpfc nodelist data structure.
20735 * @hwqid: belong to which HWQ
20736 * @expedite: 1 means this request is urgent.
20737 *
20738 * This routine gets one IO buffer from free pool. If cfg_xri_rebalancing==1,
20739 * removes a IO buffer from multiXRI pools. If cfg_xri_rebalancing==0, removes
20740 * a IO buffer from head of @hdwq io_buf_list and returns to caller.
20741 *
20742 * Note: ndlp is only used on SCSI side for RRQ testing.
20743 * The caller should pass NULL for ndlp on NVME side.
20744 *
20745 * Return codes:
20746 * NULL - Error
20747 * Pointer to lpfc_io_buf - Success
20748 **/
20749struct lpfc_io_buf *lpfc_get_io_buf(struct lpfc_hba *phba,
20750 struct lpfc_nodelist *ndlp,
20751 u32 hwqid, int expedite)
20752{
20753 struct lpfc_sli4_hdw_queue *qp;
20754 unsigned long iflag;
20755 struct lpfc_io_buf *lpfc_cmd;
20756
20757 qp = &phba->sli4_hba.hdwq[hwqid];
20758 lpfc_cmd = NULL;
20759
20760 if (phba->cfg_xri_rebalancing)
20761 lpfc_cmd = lpfc_get_io_buf_from_multixri_pools(
20762 phba, ndlp, hwqid, expedite);
20763 else {
6a828b0f
JS
20764 lpfc_qp_spin_lock_irqsave(&qp->io_buf_list_get_lock, iflag,
20765 qp, alloc_xri_get);
c490850a
JS
20766 if (qp->get_io_bufs > LPFC_NVME_EXPEDITE_XRICNT || expedite)
20767 lpfc_cmd = lpfc_io_buf(phba, ndlp, hwqid);
20768 if (!lpfc_cmd) {
6a828b0f
JS
20769 lpfc_qp_spin_lock(&qp->io_buf_list_put_lock,
20770 qp, alloc_xri_put);
c490850a
JS
20771 list_splice(&qp->lpfc_io_buf_list_put,
20772 &qp->lpfc_io_buf_list_get);
20773 qp->get_io_bufs += qp->put_io_bufs;
20774 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
20775 qp->put_io_bufs = 0;
20776 spin_unlock(&qp->io_buf_list_put_lock);
20777 if (qp->get_io_bufs > LPFC_NVME_EXPEDITE_XRICNT ||
20778 expedite)
20779 lpfc_cmd = lpfc_io_buf(phba, ndlp, hwqid);
20780 }
20781 spin_unlock_irqrestore(&qp->io_buf_list_get_lock, iflag);
20782 }
20783
20784 return lpfc_cmd;
20785}
d79c9e9d
JS
20786
20787/**
20788 * lpfc_get_sgl_per_hdwq - Get one SGL chunk from hdwq's pool
20789 * @phba: The HBA for which this call is being executed.
20790 * @lpfc_buf: IO buf structure to append the SGL chunk
20791 *
20792 * This routine gets one SGL chunk buffer from hdwq's SGL chunk pool,
20793 * and will allocate an SGL chunk if the pool is empty.
20794 *
20795 * Return codes:
20796 * NULL - Error
20797 * Pointer to sli4_hybrid_sgl - Success
20798 **/
20799struct sli4_hybrid_sgl *
20800lpfc_get_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_buf)
20801{
20802 struct sli4_hybrid_sgl *list_entry = NULL;
20803 struct sli4_hybrid_sgl *tmp = NULL;
20804 struct sli4_hybrid_sgl *allocated_sgl = NULL;
20805 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20806 struct list_head *buf_list = &hdwq->sgl_list;
a4c21acc 20807 unsigned long iflags;
d79c9e9d 20808
a4c21acc 20809 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20810
20811 if (likely(!list_empty(buf_list))) {
20812 /* break off 1 chunk from the sgl_list */
20813 list_for_each_entry_safe(list_entry, tmp,
20814 buf_list, list_node) {
20815 list_move_tail(&list_entry->list_node,
20816 &lpfc_buf->dma_sgl_xtra_list);
20817 break;
20818 }
20819 } else {
20820 /* allocate more */
a4c21acc 20821 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d 20822 tmp = kmalloc_node(sizeof(*tmp), GFP_ATOMIC,
4583a4f6 20823 cpu_to_node(hdwq->io_wq->chann));
d79c9e9d
JS
20824 if (!tmp) {
20825 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20826 "8353 error kmalloc memory for HDWQ "
20827 "%d %s\n",
20828 lpfc_buf->hdwq_no, __func__);
20829 return NULL;
20830 }
20831
20832 tmp->dma_sgl = dma_pool_alloc(phba->lpfc_sg_dma_buf_pool,
20833 GFP_ATOMIC, &tmp->dma_phys_sgl);
20834 if (!tmp->dma_sgl) {
20835 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20836 "8354 error pool_alloc memory for HDWQ "
20837 "%d %s\n",
20838 lpfc_buf->hdwq_no, __func__);
20839 kfree(tmp);
20840 return NULL;
20841 }
20842
a4c21acc 20843 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20844 list_add_tail(&tmp->list_node, &lpfc_buf->dma_sgl_xtra_list);
20845 }
20846
20847 allocated_sgl = list_last_entry(&lpfc_buf->dma_sgl_xtra_list,
20848 struct sli4_hybrid_sgl,
20849 list_node);
20850
a4c21acc 20851 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20852
20853 return allocated_sgl;
20854}
20855
20856/**
20857 * lpfc_put_sgl_per_hdwq - Put one SGL chunk into hdwq pool
20858 * @phba: The HBA for which this call is being executed.
20859 * @lpfc_buf: IO buf structure with the SGL chunk
20860 *
20861 * This routine puts one SGL chunk buffer into hdwq's SGL chunk pool.
20862 *
20863 * Return codes:
20864 * 0 - Success
20865 * -EINVAL - Error
20866 **/
20867int
20868lpfc_put_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_buf)
20869{
20870 int rc = 0;
20871 struct sli4_hybrid_sgl *list_entry = NULL;
20872 struct sli4_hybrid_sgl *tmp = NULL;
20873 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20874 struct list_head *buf_list = &hdwq->sgl_list;
a4c21acc 20875 unsigned long iflags;
d79c9e9d 20876
a4c21acc 20877 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20878
20879 if (likely(!list_empty(&lpfc_buf->dma_sgl_xtra_list))) {
20880 list_for_each_entry_safe(list_entry, tmp,
20881 &lpfc_buf->dma_sgl_xtra_list,
20882 list_node) {
20883 list_move_tail(&list_entry->list_node,
20884 buf_list);
20885 }
20886 } else {
20887 rc = -EINVAL;
20888 }
20889
a4c21acc 20890 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20891 return rc;
20892}
20893
20894/**
20895 * lpfc_free_sgl_per_hdwq - Free all SGL chunks of hdwq pool
20896 * @phba: phba object
20897 * @hdwq: hdwq to cleanup sgl buff resources on
20898 *
20899 * This routine frees all SGL chunks of hdwq SGL chunk pool.
20900 *
20901 * Return codes:
20902 * None
20903 **/
20904void
20905lpfc_free_sgl_per_hdwq(struct lpfc_hba *phba,
20906 struct lpfc_sli4_hdw_queue *hdwq)
20907{
20908 struct list_head *buf_list = &hdwq->sgl_list;
20909 struct sli4_hybrid_sgl *list_entry = NULL;
20910 struct sli4_hybrid_sgl *tmp = NULL;
a4c21acc 20911 unsigned long iflags;
d79c9e9d 20912
a4c21acc 20913 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20914
20915 /* Free sgl pool */
20916 list_for_each_entry_safe(list_entry, tmp,
20917 buf_list, list_node) {
20918 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
20919 list_entry->dma_sgl,
20920 list_entry->dma_phys_sgl);
20921 list_del(&list_entry->list_node);
20922 kfree(list_entry);
20923 }
20924
a4c21acc 20925 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20926}
20927
20928/**
20929 * lpfc_get_cmd_rsp_buf_per_hdwq - Get one CMD/RSP buffer from hdwq
20930 * @phba: The HBA for which this call is being executed.
20931 * @lpfc_buf: IO buf structure to attach the CMD/RSP buffer
20932 *
20933 * This routine gets one CMD/RSP buffer from hdwq's CMD/RSP pool,
20934 * and will allocate an CMD/RSP buffer if the pool is empty.
20935 *
20936 * Return codes:
20937 * NULL - Error
20938 * Pointer to fcp_cmd_rsp_buf - Success
20939 **/
20940struct fcp_cmd_rsp_buf *
20941lpfc_get_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
20942 struct lpfc_io_buf *lpfc_buf)
20943{
20944 struct fcp_cmd_rsp_buf *list_entry = NULL;
20945 struct fcp_cmd_rsp_buf *tmp = NULL;
20946 struct fcp_cmd_rsp_buf *allocated_buf = NULL;
20947 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
20948 struct list_head *buf_list = &hdwq->cmd_rsp_buf_list;
a4c21acc 20949 unsigned long iflags;
d79c9e9d 20950
a4c21acc 20951 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20952
20953 if (likely(!list_empty(buf_list))) {
20954 /* break off 1 chunk from the list */
20955 list_for_each_entry_safe(list_entry, tmp,
20956 buf_list,
20957 list_node) {
20958 list_move_tail(&list_entry->list_node,
20959 &lpfc_buf->dma_cmd_rsp_list);
20960 break;
20961 }
20962 } else {
20963 /* allocate more */
a4c21acc 20964 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d 20965 tmp = kmalloc_node(sizeof(*tmp), GFP_ATOMIC,
4583a4f6 20966 cpu_to_node(hdwq->io_wq->chann));
d79c9e9d
JS
20967 if (!tmp) {
20968 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20969 "8355 error kmalloc memory for HDWQ "
20970 "%d %s\n",
20971 lpfc_buf->hdwq_no, __func__);
20972 return NULL;
20973 }
20974
20975 tmp->fcp_cmnd = dma_pool_alloc(phba->lpfc_cmd_rsp_buf_pool,
20976 GFP_ATOMIC,
20977 &tmp->fcp_cmd_rsp_dma_handle);
20978
20979 if (!tmp->fcp_cmnd) {
20980 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
20981 "8356 error pool_alloc memory for HDWQ "
20982 "%d %s\n",
20983 lpfc_buf->hdwq_no, __func__);
20984 kfree(tmp);
20985 return NULL;
20986 }
20987
20988 tmp->fcp_rsp = (struct fcp_rsp *)((uint8_t *)tmp->fcp_cmnd +
20989 sizeof(struct fcp_cmnd));
20990
a4c21acc 20991 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
20992 list_add_tail(&tmp->list_node, &lpfc_buf->dma_cmd_rsp_list);
20993 }
20994
20995 allocated_buf = list_last_entry(&lpfc_buf->dma_cmd_rsp_list,
20996 struct fcp_cmd_rsp_buf,
20997 list_node);
20998
a4c21acc 20999 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
21000
21001 return allocated_buf;
21002}
21003
21004/**
21005 * lpfc_put_cmd_rsp_buf_per_hdwq - Put one CMD/RSP buffer into hdwq pool
21006 * @phba: The HBA for which this call is being executed.
21007 * @lpfc_buf: IO buf structure with the CMD/RSP buf
21008 *
21009 * This routine puts one CMD/RSP buffer into executing CPU's CMD/RSP pool.
21010 *
21011 * Return codes:
21012 * 0 - Success
21013 * -EINVAL - Error
21014 **/
21015int
21016lpfc_put_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
21017 struct lpfc_io_buf *lpfc_buf)
21018{
21019 int rc = 0;
21020 struct fcp_cmd_rsp_buf *list_entry = NULL;
21021 struct fcp_cmd_rsp_buf *tmp = NULL;
21022 struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq;
21023 struct list_head *buf_list = &hdwq->cmd_rsp_buf_list;
a4c21acc 21024 unsigned long iflags;
d79c9e9d 21025
a4c21acc 21026 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
21027
21028 if (likely(!list_empty(&lpfc_buf->dma_cmd_rsp_list))) {
21029 list_for_each_entry_safe(list_entry, tmp,
21030 &lpfc_buf->dma_cmd_rsp_list,
21031 list_node) {
21032 list_move_tail(&list_entry->list_node,
21033 buf_list);
21034 }
21035 } else {
21036 rc = -EINVAL;
21037 }
21038
a4c21acc 21039 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
21040 return rc;
21041}
21042
21043/**
21044 * lpfc_free_cmd_rsp_buf_per_hdwq - Free all CMD/RSP chunks of hdwq pool
21045 * @phba: phba object
21046 * @hdwq: hdwq to cleanup cmd rsp buff resources on
21047 *
21048 * This routine frees all CMD/RSP buffers of hdwq's CMD/RSP buf pool.
21049 *
21050 * Return codes:
21051 * None
21052 **/
21053void
21054lpfc_free_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
21055 struct lpfc_sli4_hdw_queue *hdwq)
21056{
21057 struct list_head *buf_list = &hdwq->cmd_rsp_buf_list;
21058 struct fcp_cmd_rsp_buf *list_entry = NULL;
21059 struct fcp_cmd_rsp_buf *tmp = NULL;
a4c21acc 21060 unsigned long iflags;
d79c9e9d 21061
a4c21acc 21062 spin_lock_irqsave(&hdwq->hdwq_lock, iflags);
d79c9e9d
JS
21063
21064 /* Free cmd_rsp buf pool */
21065 list_for_each_entry_safe(list_entry, tmp,
21066 buf_list,
21067 list_node) {
21068 dma_pool_free(phba->lpfc_cmd_rsp_buf_pool,
21069 list_entry->fcp_cmnd,
21070 list_entry->fcp_cmd_rsp_dma_handle);
21071 list_del(&list_entry->list_node);
21072 kfree(list_entry);
21073 }
21074
a4c21acc 21075 spin_unlock_irqrestore(&hdwq->hdwq_lock, iflags);
d79c9e9d 21076}