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f92363d1 SR |
1 | /* |
2 | * This is the Fusion MPT base driver providing common API layer interface | |
3 | * for access to MPT (Message Passing Technology) firmware. | |
4 | * | |
5 | * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h | |
a4ffce0d | 6 | * Copyright (C) 2012-2014 LSI Corporation |
a03bd153 SR |
7 | * Copyright (C) 2013-2014 Avago Technologies |
8 | * (mailto: MPT-FusionLinux.pdl@avagotech.com) | |
f92363d1 SR |
9 | * |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License | |
12 | * as published by the Free Software Foundation; either version 2 | |
13 | * of the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * NO WARRANTY | |
21 | * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR | |
22 | * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT | |
23 | * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, | |
24 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is | |
25 | * solely responsible for determining the appropriateness of using and | |
26 | * distributing the Program and assumes all risks associated with its | |
27 | * exercise of rights under this Agreement, including but not limited to | |
28 | * the risks and costs of program errors, damage to or loss of data, | |
29 | * programs or equipment, and unavailability or interruption of operations. | |
30 | ||
31 | * DISCLAIMER OF LIABILITY | |
32 | * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY | |
33 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
34 | * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND | |
35 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR | |
36 | * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE | |
37 | * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED | |
38 | * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES | |
39 | ||
40 | * You should have received a copy of the GNU General Public License | |
41 | * along with this program; if not, write to the Free Software | |
42 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, | |
43 | * USA. | |
44 | */ | |
45 | ||
46 | #ifndef MPT3SAS_BASE_H_INCLUDED | |
47 | #define MPT3SAS_BASE_H_INCLUDED | |
48 | ||
49 | #include "mpi/mpi2_type.h" | |
50 | #include "mpi/mpi2.h" | |
51 | #include "mpi/mpi2_ioc.h" | |
52 | #include "mpi/mpi2_cnfg.h" | |
53 | #include "mpi/mpi2_init.h" | |
54 | #include "mpi/mpi2_raid.h" | |
55 | #include "mpi/mpi2_tool.h" | |
56 | #include "mpi/mpi2_sas.h" | |
016d5c35 | 57 | #include "mpi/mpi2_pci.h" |
f92363d1 SR |
58 | |
59 | #include <scsi/scsi.h> | |
60 | #include <scsi/scsi_cmnd.h> | |
61 | #include <scsi/scsi_device.h> | |
62 | #include <scsi/scsi_host.h> | |
63 | #include <scsi/scsi_tcq.h> | |
64 | #include <scsi/scsi_transport_sas.h> | |
65 | #include <scsi/scsi_dbg.h> | |
66 | #include <scsi/scsi_eh.h> | |
8a7e4c24 SR |
67 | #include <linux/pci.h> |
68 | #include <linux/poll.h> | |
f92363d1 SR |
69 | |
70 | #include "mpt3sas_debug.h" | |
71 | #include "mpt3sas_trigger_diag.h" | |
72 | ||
73 | /* driver versioning info */ | |
74 | #define MPT3SAS_DRIVER_NAME "mpt3sas" | |
a03bd153 | 75 | #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>" |
f92363d1 | 76 | #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver" |
62d2f774 SPS |
77 | #define MPT3SAS_DRIVER_VERSION "17.100.00.00" |
78 | #define MPT3SAS_MAJOR_VERSION 17 | |
7cfa7696 | 79 | #define MPT3SAS_MINOR_VERSION 100 |
e9ce9c86 | 80 | #define MPT3SAS_BUILD_VERSION 0 |
f92363d1 SR |
81 | #define MPT3SAS_RELEASE_VERSION 00 |
82 | ||
d0c627af SR |
83 | #define MPT2SAS_DRIVER_NAME "mpt2sas" |
84 | #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver" | |
85 | #define MPT2SAS_DRIVER_VERSION "20.102.00.00" | |
86 | #define MPT2SAS_MAJOR_VERSION 20 | |
87 | #define MPT2SAS_MINOR_VERSION 102 | |
88 | #define MPT2SAS_BUILD_VERSION 0 | |
89 | #define MPT2SAS_RELEASE_VERSION 00 | |
90 | ||
f92363d1 SR |
91 | /* |
92 | * Set MPT3SAS_SG_DEPTH value based on user input. | |
93 | */ | |
65e8617f | 94 | #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE |
8a7e4c24 | 95 | #define MPT_MIN_PHYS_SEGMENTS 16 |
06f5f976 | 96 | #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32 |
8a7e4c24 | 97 | |
f92363d1 SR |
98 | #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE |
99 | #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE | |
100 | #else | |
8a7e4c24 | 101 | #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS |
f92363d1 SR |
102 | #endif |
103 | ||
8a7e4c24 SR |
104 | #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE |
105 | #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE | |
106 | #else | |
107 | #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS | |
108 | #endif | |
f92363d1 SR |
109 | |
110 | /* | |
111 | * Generic Defines | |
112 | */ | |
113 | #define MPT3SAS_SATA_QUEUE_DEPTH 32 | |
114 | #define MPT3SAS_SAS_QUEUE_DEPTH 254 | |
115 | #define MPT3SAS_RAID_QUEUE_DEPTH 128 | |
06f5f976 | 116 | #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200 |
f92363d1 | 117 | |
6c197093 | 118 | #define MPT3SAS_RAID_MAX_SECTORS 8192 |
016d5c35 | 119 | #define MPT3SAS_HOST_PAGE_SIZE_4K 12 |
d1b01d14 | 120 | #define MPT3SAS_NVME_QUEUE_DEPTH 128 |
f92363d1 SR |
121 | #define MPT_NAME_LENGTH 32 /* generic length of strings */ |
122 | #define MPT_STRING_LENGTH 64 | |
123 | ||
124 | #define MPT_MAX_CALLBACKS 32 | |
125 | ||
f92363d1 | 126 | #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */ |
fd0331b3 SS |
127 | /* reserved for issuing internally framed scsi io cmds */ |
128 | #define INTERNAL_SCSIIO_CMDS_COUNT 3 | |
f92363d1 SR |
129 | |
130 | #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/ | |
131 | ||
132 | #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF | |
133 | ||
ebb3024e SS |
134 | #define MAX_CHAIN_ELEMT_SZ 16 |
135 | #define DEFAULT_NUM_FWCHAIN_ELEMTS 8 | |
136 | ||
016d5c35 SPS |
137 | /* |
138 | * NVMe defines | |
139 | */ | |
140 | #define NVME_PRP_SIZE 8 /* PRP size */ | |
141 | #define NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */ | |
142 | #define NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */ | |
143 | #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */ | |
144 | #define NVME_PRP_PAGE_SIZE 4096 /* Page size */ | |
145 | ||
f92363d1 SR |
146 | /* |
147 | * reset phases | |
148 | */ | |
149 | #define MPT3_IOC_PRE_RESET 1 /* prior to host reset */ | |
150 | #define MPT3_IOC_AFTER_RESET 2 /* just after host reset */ | |
151 | #define MPT3_IOC_DONE_RESET 3 /* links re-initialized */ | |
152 | ||
153 | /* | |
154 | * logging format | |
155 | */ | |
156 | #define MPT3SAS_FMT "%s: " | |
157 | ||
7786ab6a SR |
158 | /* |
159 | * WarpDrive Specific Log codes | |
160 | */ | |
161 | ||
162 | #define MPT2_WARPDRIVE_LOGENTRY (0x8002) | |
163 | #define MPT2_WARPDRIVE_LC_SSDT (0x41) | |
164 | #define MPT2_WARPDRIVE_LC_SSDLW (0x43) | |
165 | #define MPT2_WARPDRIVE_LC_SSDLF (0x44) | |
166 | #define MPT2_WARPDRIVE_LC_BRMF (0x4D) | |
167 | ||
f92363d1 SR |
168 | /* |
169 | * per target private data | |
170 | */ | |
171 | #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01 | |
172 | #define MPT_TARGET_FLAGS_VOLUME 0x02 | |
173 | #define MPT_TARGET_FLAGS_DELETED 0x04 | |
174 | #define MPT_TARGET_FASTPATH_IO 0x08 | |
d88e1eab | 175 | #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10 |
f92363d1 | 176 | |
42081173 SR |
177 | #define SAS2_PCI_DEVICE_B0_REVISION (0x01) |
178 | #define SAS3_PCI_DEVICE_C0_REVISION (0x02) | |
179 | ||
1117b31a SR |
180 | /* |
181 | * Intel HBA branding | |
182 | */ | |
989e43c7 SR |
183 | #define MPT2SAS_INTEL_RMS25JB080_BRANDING \ |
184 | "Intel(R) Integrated RAID Module RMS25JB080" | |
185 | #define MPT2SAS_INTEL_RMS25JB040_BRANDING \ | |
186 | "Intel(R) Integrated RAID Module RMS25JB040" | |
187 | #define MPT2SAS_INTEL_RMS25KB080_BRANDING \ | |
188 | "Intel(R) Integrated RAID Module RMS25KB080" | |
189 | #define MPT2SAS_INTEL_RMS25KB040_BRANDING \ | |
190 | "Intel(R) Integrated RAID Module RMS25KB040" | |
191 | #define MPT2SAS_INTEL_RMS25LB040_BRANDING \ | |
192 | "Intel(R) Integrated RAID Module RMS25LB040" | |
193 | #define MPT2SAS_INTEL_RMS25LB080_BRANDING \ | |
194 | "Intel(R) Integrated RAID Module RMS25LB080" | |
195 | #define MPT2SAS_INTEL_RMS2LL080_BRANDING \ | |
196 | "Intel Integrated RAID Module RMS2LL080" | |
197 | #define MPT2SAS_INTEL_RMS2LL040_BRANDING \ | |
198 | "Intel Integrated RAID Module RMS2LL040" | |
199 | #define MPT2SAS_INTEL_RS25GB008_BRANDING \ | |
200 | "Intel(R) RAID Controller RS25GB008" | |
201 | #define MPT2SAS_INTEL_SSD910_BRANDING \ | |
202 | "Intel(R) SSD 910 Series" | |
203 | ||
1117b31a SR |
204 | #define MPT3SAS_INTEL_RMS3JC080_BRANDING \ |
205 | "Intel(R) Integrated RAID Module RMS3JC080" | |
206 | #define MPT3SAS_INTEL_RS3GC008_BRANDING \ | |
207 | "Intel(R) RAID Controller RS3GC008" | |
208 | #define MPT3SAS_INTEL_RS3FC044_BRANDING \ | |
209 | "Intel(R) RAID Controller RS3FC044" | |
210 | #define MPT3SAS_INTEL_RS3UC080_BRANDING \ | |
211 | "Intel(R) RAID Controller RS3UC080" | |
f92363d1 | 212 | |
1117b31a SR |
213 | /* |
214 | * Intel HBA SSDIDs | |
215 | */ | |
989e43c7 SR |
216 | #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516 |
217 | #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517 | |
218 | #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518 | |
219 | #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519 | |
220 | #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A | |
221 | #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B | |
222 | #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E | |
223 | #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F | |
224 | #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000 | |
225 | #define MPT2SAS_INTEL_SSD910_SSDID 0x3700 | |
226 | ||
227 | #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521 | |
228 | #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522 | |
229 | #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523 | |
230 | #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524 | |
f92363d1 | 231 | |
fb84dfc4 SR |
232 | /* |
233 | * Dell HBA branding | |
234 | */ | |
989e43c7 SR |
235 | #define MPT2SAS_DELL_BRANDING_SIZE 32 |
236 | ||
237 | #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA" | |
238 | #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter" | |
239 | #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated" | |
240 | #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular" | |
241 | #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded" | |
242 | #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200" | |
243 | #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS" | |
244 | ||
fb84dfc4 SR |
245 | #define MPT3SAS_DELL_12G_HBA_BRANDING \ |
246 | "Dell 12Gbps HBA" | |
247 | ||
248 | /* | |
249 | * Dell HBA SSDIDs | |
250 | */ | |
989e43c7 SR |
251 | #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C |
252 | #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D | |
253 | #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E | |
254 | #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F | |
255 | #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20 | |
256 | #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21 | |
257 | #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22 | |
258 | ||
259 | #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46 | |
fb84dfc4 | 260 | |
38e4141e SR |
261 | /* |
262 | * Cisco HBA branding | |
263 | */ | |
d8eb4a47 | 264 | #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \ |
989e43c7 | 265 | "Cisco 9300-8E 12G SAS HBA" |
d8eb4a47 | 266 | #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \ |
989e43c7 | 267 | "Cisco 9300-8i 12G SAS HBA" |
d8eb4a47 | 268 | #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \ |
989e43c7 | 269 | "Cisco 12G Modular SAS Pass through Controller" |
d8eb4a47 | 270 | #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \ |
989e43c7 | 271 | "UCS C3X60 12G SAS Pass through Controller" |
38e4141e SR |
272 | /* |
273 | * Cisco HBA SSSDIDs | |
274 | */ | |
d8eb4a47 SR |
275 | #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C |
276 | #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154 | |
277 | #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155 | |
278 | #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156 | |
38e4141e | 279 | |
f92363d1 SR |
280 | /* |
281 | * status bits for ioc->diag_buffer_status | |
282 | */ | |
283 | #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01) | |
284 | #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02) | |
285 | #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04) | |
286 | ||
989e43c7 SR |
287 | /* |
288 | * HP HBA branding | |
289 | */ | |
290 | #define MPT2SAS_HP_3PAR_SSVID 0x1590 | |
291 | ||
292 | #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \ | |
293 | "HP H220 Host Bus Adapter" | |
294 | #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \ | |
295 | "HP H221 Host Bus Adapter" | |
296 | #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \ | |
297 | "HP H222 Host Bus Adapter" | |
298 | #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \ | |
299 | "HP H220i Host Bus Adapter" | |
300 | #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \ | |
301 | "HP H210i Host Bus Adapter" | |
302 | ||
303 | /* | |
304 | * HO HBA SSDIDs | |
305 | */ | |
306 | #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041 | |
307 | #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042 | |
308 | #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043 | |
309 | #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044 | |
310 | #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046 | |
311 | ||
fb77bb53 SR |
312 | /* |
313 | * Combined Reply Queue constants, | |
314 | * There are twelve Supplemental Reply Post Host Index Registers | |
315 | * and each register is at offset 0x10 bytes from the previous one. | |
316 | */ | |
820aa4f7 | 317 | #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8) |
0bb337c9 SPS |
318 | #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12 |
319 | #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16 | |
320 | #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10) | |
f92363d1 SR |
321 | |
322 | /* OEM Identifiers */ | |
323 | #define MFG10_OEM_ID_INVALID (0x00000000) | |
324 | #define MFG10_OEM_ID_DELL (0x00000001) | |
325 | #define MFG10_OEM_ID_FSC (0x00000002) | |
326 | #define MFG10_OEM_ID_SUN (0x00000003) | |
327 | #define MFG10_OEM_ID_IBM (0x00000004) | |
328 | ||
329 | /* GENERIC Flags 0*/ | |
330 | #define MFG10_GF0_OCE_DISABLED (0x00000001) | |
331 | #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002) | |
332 | #define MFG10_GF0_R10_DISPLAY (0x00000004) | |
333 | #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008) | |
334 | #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010) | |
335 | ||
3898f08e SR |
336 | #define VIRTUAL_IO_FAILED_RETRY (0x32010081) |
337 | ||
f92363d1 SR |
338 | /* OEM Specific Flags will come from OEM specific header files */ |
339 | struct Mpi2ManufacturingPage10_t { | |
340 | MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ | |
341 | U8 OEMIdentifier; /* 04h */ | |
342 | U8 Reserved1; /* 05h */ | |
343 | U16 Reserved2; /* 08h */ | |
344 | U32 Reserved3; /* 0Ch */ | |
345 | U32 GenericFlags0; /* 10h */ | |
346 | U32 GenericFlags1; /* 14h */ | |
347 | U32 Reserved4; /* 18h */ | |
348 | U32 OEMSpecificFlags0; /* 1Ch */ | |
349 | U32 OEMSpecificFlags1; /* 20h */ | |
350 | U32 Reserved5[18]; /* 24h - 60h*/ | |
351 | }; | |
352 | ||
353 | ||
354 | /* Miscellaneous options */ | |
355 | struct Mpi2ManufacturingPage11_t { | |
356 | MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ | |
357 | __le32 Reserved1; /* 04h */ | |
358 | u8 Reserved2; /* 08h */ | |
359 | u8 EEDPTagMode; /* 09h */ | |
360 | u8 Reserved3; /* 0Ah */ | |
361 | u8 Reserved4; /* 0Bh */ | |
362 | __le32 Reserved5[23]; /* 0Ch-60h*/ | |
363 | }; | |
364 | ||
365 | /** | |
366 | * struct MPT3SAS_TARGET - starget private hostdata | |
367 | * @starget: starget object | |
368 | * @sas_address: target sas address | |
7786ab6a | 369 | * @raid_device: raid_device pointer to access volume data |
f92363d1 SR |
370 | * @handle: device handle |
371 | * @num_luns: number luns | |
372 | * @flags: MPT_TARGET_FLAGS_XXX flags | |
373 | * @deleted: target flaged for deletion | |
374 | * @tm_busy: target is busy with TM request. | |
d88e1eab SPS |
375 | * @sas_dev: The sas_device associated with this target |
376 | * @pcie_dev: The pcie device associated with this target | |
f92363d1 SR |
377 | */ |
378 | struct MPT3SAS_TARGET { | |
379 | struct scsi_target *starget; | |
380 | u64 sas_address; | |
7786ab6a | 381 | struct _raid_device *raid_device; |
f92363d1 SR |
382 | u16 handle; |
383 | int num_luns; | |
384 | u32 flags; | |
385 | u8 deleted; | |
386 | u8 tm_busy; | |
d88e1eab SPS |
387 | struct _sas_device *sas_dev; |
388 | struct _pcie_device *pcie_dev; | |
f92363d1 SR |
389 | }; |
390 | ||
391 | ||
392 | /* | |
393 | * per device private data | |
394 | */ | |
395 | #define MPT_DEVICE_FLAGS_INIT 0x01 | |
f92363d1 | 396 | |
7786ab6a SR |
397 | #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003) |
398 | #define MFG_PAGE10_HIDE_ALL_DISKS (0x00) | |
399 | #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01) | |
400 | #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02) | |
401 | ||
f92363d1 SR |
402 | /** |
403 | * struct MPT3SAS_DEVICE - sdev private hostdata | |
404 | * @sas_target: starget private hostdata | |
405 | * @lun: lun number | |
406 | * @flags: MPT_DEVICE_XXX flags | |
407 | * @configured_lun: lun is configured | |
408 | * @block: device is in SDEV_BLOCK state | |
409 | * @tlr_snoop_check: flag used in determining whether to disable TLR | |
410 | * @eedp_enable: eedp support enable bit | |
411 | * @eedp_type: 0(type_1), 1(type_2), 2(type_3) | |
412 | * @eedp_block_length: block size | |
ffb58456 | 413 | * @ata_command_pending: SATL passthrough outstanding for device |
f92363d1 SR |
414 | */ |
415 | struct MPT3SAS_DEVICE { | |
416 | struct MPT3SAS_TARGET *sas_target; | |
417 | unsigned int lun; | |
418 | u32 flags; | |
419 | u8 configured_lun; | |
420 | u8 block; | |
421 | u8 tlr_snoop_check; | |
30158dc9 | 422 | u8 ignore_delay_remove; |
307d9075 AM |
423 | /* Iopriority Command Handling */ |
424 | u8 ncq_prio_enable; | |
ffb58456 JB |
425 | /* |
426 | * Bug workaround for SATL handling: the mpt2/3sas firmware | |
427 | * doesn't return BUSY or TASK_SET_FULL for subsequent | |
428 | * commands while a SATL pass through is in operation as the | |
429 | * spec requires, it simply does nothing with them until the | |
430 | * pass through completes, causing them possibly to timeout if | |
431 | * the passthrough is a long executing command (like format or | |
432 | * secure erase). This variable allows us to do the right | |
433 | * thing while a SATL command is pending. | |
434 | */ | |
435 | unsigned long ata_command_pending; | |
307d9075 | 436 | |
f92363d1 SR |
437 | }; |
438 | ||
439 | #define MPT3_CMD_NOT_USED 0x8000 /* free */ | |
440 | #define MPT3_CMD_COMPLETE 0x0001 /* completed */ | |
441 | #define MPT3_CMD_PENDING 0x0002 /* pending */ | |
442 | #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */ | |
443 | #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */ | |
444 | ||
445 | /** | |
446 | * struct _internal_cmd - internal commands struct | |
447 | * @mutex: mutex | |
448 | * @done: completion | |
449 | * @reply: reply message pointer | |
450 | * @sense: sense data | |
451 | * @status: MPT3_CMD_XXX status | |
452 | * @smid: system message id | |
453 | */ | |
454 | struct _internal_cmd { | |
455 | struct mutex mutex; | |
456 | struct completion done; | |
457 | void *reply; | |
458 | void *sense; | |
459 | u16 status; | |
460 | u16 smid; | |
461 | }; | |
462 | ||
463 | ||
464 | ||
465 | /** | |
466 | * struct _sas_device - attached device information | |
467 | * @list: sas device list | |
468 | * @starget: starget object | |
469 | * @sas_address: device sas address | |
470 | * @device_name: retrieved from the SAS IDENTIFY frame. | |
471 | * @handle: device handle | |
472 | * @sas_address_parent: sas address of parent expander or sas host | |
473 | * @enclosure_handle: enclosure handle | |
474 | * @enclosure_logical_id: enclosure logical identifier | |
475 | * @volume_handle: volume handle (valid when hidden raid member) | |
476 | * @volume_wwid: volume unique identifier | |
477 | * @device_info: bitfield provides detailed info about the device | |
478 | * @id: target id | |
479 | * @channel: target channel | |
480 | * @slot: number number | |
481 | * @phy: phy identifier provided in sas device page 0 | |
f92363d1 | 482 | * @responding: used in _scsih_sas_device_mark_responding |
0f624c39 SR |
483 | * @fast_path: fast path feature enable bit |
484 | * @pfa_led_on: flag for PFA LED status | |
e4bc7f5c SR |
485 | * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add() |
486 | * addition routine. | |
75888956 SR |
487 | * @chassis_slot: chassis slot |
488 | * @is_chassis_slot_valid: chassis slot valid or not | |
f92363d1 SR |
489 | */ |
490 | struct _sas_device { | |
491 | struct list_head list; | |
492 | struct scsi_target *starget; | |
493 | u64 sas_address; | |
494 | u64 device_name; | |
495 | u16 handle; | |
496 | u64 sas_address_parent; | |
497 | u16 enclosure_handle; | |
498 | u64 enclosure_logical_id; | |
499 | u16 volume_handle; | |
500 | u64 volume_wwid; | |
501 | u32 device_info; | |
502 | int id; | |
503 | int channel; | |
504 | u16 slot; | |
505 | u8 phy; | |
506 | u8 responding; | |
507 | u8 fast_path; | |
0f624c39 | 508 | u8 pfa_led_on; |
e4bc7f5c | 509 | u8 pend_sas_rphy_add; |
e6d45e3e | 510 | u8 enclosure_level; |
75888956 SR |
511 | u8 chassis_slot; |
512 | u8 is_chassis_slot_valid; | |
310c8e40 | 513 | u8 connector_name[5]; |
d1cb5e49 | 514 | struct kref refcount; |
f92363d1 SR |
515 | }; |
516 | ||
d1cb5e49 SR |
517 | static inline void sas_device_get(struct _sas_device *s) |
518 | { | |
519 | kref_get(&s->refcount); | |
520 | } | |
521 | ||
522 | static inline void sas_device_free(struct kref *r) | |
523 | { | |
524 | kfree(container_of(r, struct _sas_device, refcount)); | |
525 | } | |
526 | ||
527 | static inline void sas_device_put(struct _sas_device *s) | |
528 | { | |
529 | kref_put(&s->refcount, sas_device_free); | |
530 | } | |
531 | ||
d88e1eab SPS |
532 | /* |
533 | * struct _pcie_device - attached PCIe device information | |
534 | * @list: pcie device list | |
535 | * @starget: starget object | |
536 | * @wwid: device WWID | |
537 | * @handle: device handle | |
538 | * @device_info: bitfield provides detailed info about the device | |
539 | * @id: target id | |
540 | * @channel: target channel | |
541 | * @slot: slot number | |
542 | * @port_num: port number | |
543 | * @responding: used in _scsih_pcie_device_mark_responding | |
544 | * @fast_path: fast path feature enable bit | |
545 | * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for | |
546 | * NVMe device only | |
547 | * @enclosure_handle: enclosure handle | |
548 | * @enclosure_logical_id: enclosure logical identifier | |
549 | * @enclosure_level: The level of device's enclosure from the controller | |
550 | * @connector_name: ASCII value of the Connector's name | |
551 | * @serial_number: pointer of serial number string allocated runtime | |
552 | * @refcount: reference count for deletion | |
553 | */ | |
554 | struct _pcie_device { | |
555 | struct list_head list; | |
556 | struct scsi_target *starget; | |
557 | u64 wwid; | |
558 | u16 handle; | |
559 | u32 device_info; | |
560 | int id; | |
561 | int channel; | |
562 | u16 slot; | |
563 | u8 port_num; | |
564 | u8 responding; | |
565 | u8 fast_path; | |
566 | u32 nvme_mdts; | |
567 | u16 enclosure_handle; | |
568 | u64 enclosure_logical_id; | |
569 | u8 enclosure_level; | |
570 | u8 connector_name[4]; | |
571 | u8 *serial_number; | |
572 | struct kref refcount; | |
573 | }; | |
574 | /** | |
575 | * pcie_device_get - Increment the pcie device reference count | |
576 | * | |
577 | * @p: pcie_device object | |
578 | * | |
579 | * When ever this function called it will increment the | |
580 | * reference count of the pcie device for which this function called. | |
581 | * | |
582 | */ | |
583 | static inline void pcie_device_get(struct _pcie_device *p) | |
584 | { | |
585 | kref_get(&p->refcount); | |
586 | } | |
587 | ||
588 | /** | |
589 | * pcie_device_free - Release the pcie device object | |
590 | * @r - kref object | |
591 | * | |
592 | * Free's the pcie device object. It will be called when reference count | |
593 | * reaches to zero. | |
594 | */ | |
595 | static inline void pcie_device_free(struct kref *r) | |
596 | { | |
597 | kfree(container_of(r, struct _pcie_device, refcount)); | |
598 | } | |
599 | ||
600 | /** | |
601 | * pcie_device_put - Decrement the pcie device reference count | |
602 | * | |
603 | * @p: pcie_device object | |
604 | * | |
605 | * When ever this function called it will decrement the | |
606 | * reference count of the pcie device for which this function called. | |
607 | * | |
608 | * When refernce count reaches to Zero, this will call pcie_device_free to the | |
609 | * pcie_device object. | |
610 | */ | |
611 | static inline void pcie_device_put(struct _pcie_device *p) | |
612 | { | |
613 | kref_put(&p->refcount, pcie_device_free); | |
614 | } | |
f92363d1 SR |
615 | /** |
616 | * struct _raid_device - raid volume link list | |
617 | * @list: sas device list | |
618 | * @starget: starget object | |
619 | * @sdev: scsi device struct (volumes are single lun) | |
620 | * @wwid: unique identifier for the volume | |
621 | * @handle: device handle | |
7786ab6a | 622 | * @block_size: Block size of the volume |
f92363d1 SR |
623 | * @id: target id |
624 | * @channel: target channel | |
625 | * @volume_type: the raid level | |
626 | * @device_info: bitfield provides detailed info about the hidden components | |
627 | * @num_pds: number of hidden raid components | |
628 | * @responding: used in _scsih_raid_device_mark_responding | |
629 | * @percent_complete: resync percent complete | |
7786ab6a SR |
630 | * @direct_io_enabled: Whether direct io to PDs are allowed or not |
631 | * @stripe_exponent: X where 2powX is the stripe sz in blocks | |
632 | * @block_exponent: X where 2powX is the block sz in bytes | |
633 | * @max_lba: Maximum number of LBA in the volume | |
634 | * @stripe_sz: Stripe Size of the volume | |
635 | * @device_info: Device info of the volume member disk | |
636 | * @pd_handle: Array of handles of the physical drives for direct I/O in le16 | |
f92363d1 SR |
637 | */ |
638 | #define MPT_MAX_WARPDRIVE_PDS 8 | |
639 | struct _raid_device { | |
640 | struct list_head list; | |
641 | struct scsi_target *starget; | |
642 | struct scsi_device *sdev; | |
643 | u64 wwid; | |
644 | u16 handle; | |
7786ab6a | 645 | u16 block_sz; |
f92363d1 SR |
646 | int id; |
647 | int channel; | |
648 | u8 volume_type; | |
649 | u8 num_pds; | |
650 | u8 responding; | |
651 | u8 percent_complete; | |
7786ab6a SR |
652 | u8 direct_io_enabled; |
653 | u8 stripe_exponent; | |
654 | u8 block_exponent; | |
655 | u64 max_lba; | |
656 | u32 stripe_sz; | |
f92363d1 | 657 | u32 device_info; |
7786ab6a | 658 | u16 pd_handle[MPT_MAX_WARPDRIVE_PDS]; |
f92363d1 SR |
659 | }; |
660 | ||
661 | /** | |
662 | * struct _boot_device - boot device info | |
d88e1eab SPS |
663 | * |
664 | * @channel: sas, raid, or pcie channel | |
665 | * @device: holds pointer for struct _sas_device, struct _raid_device or | |
666 | * struct _pcie_device | |
f92363d1 SR |
667 | */ |
668 | struct _boot_device { | |
d88e1eab | 669 | int channel; |
f92363d1 SR |
670 | void *device; |
671 | }; | |
672 | ||
673 | /** | |
674 | * struct _sas_port - wide/narrow sas port information | |
675 | * @port_list: list of ports belonging to expander | |
676 | * @num_phys: number of phys belonging to this port | |
677 | * @remote_identify: attached device identification | |
678 | * @rphy: sas transport rphy object | |
679 | * @port: sas transport wide/narrow port object | |
680 | * @phy_list: _sas_phy list objects belonging to this port | |
681 | */ | |
682 | struct _sas_port { | |
683 | struct list_head port_list; | |
684 | u8 num_phys; | |
685 | struct sas_identify remote_identify; | |
686 | struct sas_rphy *rphy; | |
687 | struct sas_port *port; | |
688 | struct list_head phy_list; | |
689 | }; | |
690 | ||
691 | /** | |
692 | * struct _sas_phy - phy information | |
693 | * @port_siblings: list of phys belonging to a port | |
694 | * @identify: phy identification | |
695 | * @remote_identify: attached device identification | |
696 | * @phy: sas transport phy object | |
697 | * @phy_id: unique phy id | |
698 | * @handle: device handle for this phy | |
699 | * @attached_handle: device handle for attached device | |
700 | * @phy_belongs_to_port: port has been created for this phy | |
701 | */ | |
702 | struct _sas_phy { | |
703 | struct list_head port_siblings; | |
704 | struct sas_identify identify; | |
705 | struct sas_identify remote_identify; | |
706 | struct sas_phy *phy; | |
707 | u8 phy_id; | |
708 | u16 handle; | |
709 | u16 attached_handle; | |
710 | u8 phy_belongs_to_port; | |
711 | }; | |
712 | ||
713 | /** | |
714 | * struct _sas_node - sas_host/expander information | |
715 | * @list: list of expanders | |
716 | * @parent_dev: parent device class | |
717 | * @num_phys: number phys belonging to this sas_host/expander | |
718 | * @sas_address: sas address of this sas_host/expander | |
719 | * @handle: handle for this sas_host/expander | |
720 | * @sas_address_parent: sas address of parent expander or sas host | |
721 | * @enclosure_handle: handle for this a member of an enclosure | |
722 | * @device_info: bitwise defining capabilities of this sas_host/expander | |
723 | * @responding: used in _scsih_expander_device_mark_responding | |
724 | * @phy: a list of phys that make up this sas_host/expander | |
725 | * @sas_port_list: list of ports attached to this sas_host/expander | |
726 | */ | |
727 | struct _sas_node { | |
728 | struct list_head list; | |
729 | struct device *parent_dev; | |
730 | u8 num_phys; | |
731 | u64 sas_address; | |
732 | u16 handle; | |
733 | u64 sas_address_parent; | |
734 | u16 enclosure_handle; | |
735 | u64 enclosure_logical_id; | |
736 | u8 responding; | |
737 | struct _sas_phy *phy; | |
738 | struct list_head sas_port_list; | |
739 | }; | |
740 | ||
741 | /** | |
742 | * enum reset_type - reset state | |
743 | * @FORCE_BIG_HAMMER: issue diagnostic reset | |
744 | * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer | |
745 | */ | |
746 | enum reset_type { | |
747 | FORCE_BIG_HAMMER, | |
748 | SOFT_RESET, | |
749 | }; | |
750 | ||
016d5c35 SPS |
751 | /** |
752 | * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O) | |
753 | * @pcie_sgl: PCIe native SGL for NVMe devices | |
754 | * @pcie_sgl_dma: physical address | |
755 | */ | |
756 | struct pcie_sg_list { | |
757 | void *pcie_sgl; | |
758 | dma_addr_t pcie_sgl_dma; | |
759 | }; | |
760 | ||
f92363d1 SR |
761 | /** |
762 | * struct chain_tracker - firmware chain tracker | |
763 | * @chain_buffer: chain buffer | |
764 | * @chain_buffer_dma: physical address | |
765 | * @tracker_list: list of free request (ioc->free_chain_list) | |
766 | */ | |
767 | struct chain_tracker { | |
768 | void *chain_buffer; | |
769 | dma_addr_t chain_buffer_dma; | |
770 | struct list_head tracker_list; | |
771 | }; | |
772 | ||
773 | /** | |
774 | * struct scsiio_tracker - scsi mf request tracker | |
775 | * @smid: system message id | |
776 | * @scmd: scsi request pointer | |
777 | * @cb_idx: callback index | |
7786ab6a | 778 | * @direct_io: To indicate whether I/O is direct (WARPDRIVE) |
f92363d1 | 779 | * @tracker_list: list of free request (ioc->free_list) |
03d1fb3a | 780 | * @msix_io: IO's msix |
f92363d1 SR |
781 | */ |
782 | struct scsiio_tracker { | |
783 | u16 smid; | |
784 | struct scsi_cmnd *scmd; | |
785 | u8 cb_idx; | |
7786ab6a | 786 | u8 direct_io; |
016d5c35 | 787 | struct pcie_sg_list pcie_sg_list; |
f92363d1 SR |
788 | struct list_head chain_list; |
789 | struct list_head tracker_list; | |
03d1fb3a | 790 | u16 msix_io; |
f92363d1 SR |
791 | }; |
792 | ||
793 | /** | |
794 | * struct request_tracker - firmware request tracker | |
795 | * @smid: system message id | |
796 | * @cb_idx: callback index | |
797 | * @tracker_list: list of free request (ioc->free_list) | |
798 | */ | |
799 | struct request_tracker { | |
800 | u16 smid; | |
801 | u8 cb_idx; | |
802 | struct list_head tracker_list; | |
803 | }; | |
804 | ||
805 | /** | |
806 | * struct _tr_list - target reset list | |
807 | * @handle: device handle | |
808 | * @state: state machine | |
809 | */ | |
810 | struct _tr_list { | |
811 | struct list_head list; | |
812 | u16 handle; | |
813 | u16 state; | |
814 | }; | |
815 | ||
fd0331b3 SS |
816 | /** |
817 | * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list | |
818 | * @handle: device handle | |
819 | */ | |
820 | struct _sc_list { | |
821 | struct list_head list; | |
822 | u16 handle; | |
823 | }; | |
824 | ||
825 | /** | |
826 | * struct _event_ack_list - delayed event acknowledgment list | |
827 | * @Event: Event ID | |
828 | * @EventContext: used to track the event uniquely | |
829 | */ | |
830 | struct _event_ack_list { | |
831 | struct list_head list; | |
832 | u16 Event; | |
833 | u32 EventContext; | |
834 | }; | |
f92363d1 SR |
835 | |
836 | /** | |
837 | * struct adapter_reply_queue - the reply queue struct | |
838 | * @ioc: per adapter object | |
839 | * @msix_index: msix index into vector table | |
840 | * @vector: irq vector | |
841 | * @reply_post_host_index: head index in the pool where FW completes IO | |
842 | * @reply_post_free: reply post base virt address | |
843 | * @name: the name registered to request_irq() | |
844 | * @busy: isr is actively processing replies on another cpu | |
845 | * @list: this list | |
846 | */ | |
847 | struct adapter_reply_queue { | |
848 | struct MPT3SAS_ADAPTER *ioc; | |
849 | u8 msix_index; | |
f92363d1 SR |
850 | u32 reply_post_host_index; |
851 | Mpi2ReplyDescriptorsUnion_t *reply_post_free; | |
852 | char name[MPT_NAME_LENGTH]; | |
853 | atomic_t busy; | |
854 | struct list_head list; | |
855 | }; | |
856 | ||
857 | typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr); | |
858 | ||
859 | /* SAS3.0 support */ | |
860 | typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc, | |
016d5c35 | 861 | struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device); |
f92363d1 SR |
862 | typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge, |
863 | dma_addr_t data_out_dma, size_t data_out_sz, | |
864 | dma_addr_t data_in_dma, size_t data_in_sz); | |
865 | typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc, | |
866 | void *paddr); | |
867 | ||
016d5c35 SPS |
868 | /* SAS3.5 support */ |
869 | typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid, | |
870 | Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, | |
871 | dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma, | |
872 | size_t data_in_sz); | |
873 | ||
81c16f83 SPS |
874 | /* To support atomic and non atomic descriptors*/ |
875 | typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid, | |
876 | u16 funcdep); | |
877 | typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid); | |
f92363d1 SR |
878 | |
879 | /* IOC Facts and Port Facts converted from little endian to cpu */ | |
880 | union mpi3_version_union { | |
881 | MPI2_VERSION_STRUCT Struct; | |
882 | u32 Word; | |
883 | }; | |
884 | ||
885 | struct mpt3sas_facts { | |
886 | u16 MsgVersion; | |
887 | u16 HeaderVersion; | |
888 | u8 IOCNumber; | |
889 | u8 VP_ID; | |
890 | u8 VF_ID; | |
891 | u16 IOCExceptions; | |
892 | u16 IOCStatus; | |
893 | u32 IOCLogInfo; | |
894 | u8 MaxChainDepth; | |
895 | u8 WhoInit; | |
896 | u8 NumberOfPorts; | |
897 | u8 MaxMSIxVectors; | |
898 | u16 RequestCredit; | |
899 | u16 ProductID; | |
900 | u32 IOCCapabilities; | |
901 | union mpi3_version_union FWVersion; | |
902 | u16 IOCRequestFrameSize; | |
ebb3024e | 903 | u16 IOCMaxChainSegmentSize; |
f92363d1 SR |
904 | u16 MaxInitiators; |
905 | u16 MaxTargets; | |
906 | u16 MaxSasExpanders; | |
907 | u16 MaxEnclosures; | |
908 | u16 ProtocolFlags; | |
909 | u16 HighPriorityCredit; | |
910 | u16 MaxReplyDescriptorPostQueueDepth; | |
911 | u8 ReplyFrameSize; | |
912 | u8 MaxVolumes; | |
913 | u16 MaxDevHandle; | |
914 | u16 MaxPersistentEntries; | |
915 | u16 MinDevHandle; | |
016d5c35 | 916 | u8 CurrentHostPageSize; |
f92363d1 SR |
917 | }; |
918 | ||
919 | struct mpt3sas_port_facts { | |
920 | u8 PortNumber; | |
921 | u8 VP_ID; | |
922 | u8 VF_ID; | |
923 | u8 PortType; | |
924 | u16 MaxPostedCmdBuffers; | |
925 | }; | |
926 | ||
9b05c91a SR |
927 | struct reply_post_struct { |
928 | Mpi2ReplyDescriptorsUnion_t *reply_post_free; | |
929 | dma_addr_t reply_post_free_dma; | |
930 | }; | |
931 | ||
f92363d1 SR |
932 | typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc); |
933 | /** | |
934 | * struct MPT3SAS_ADAPTER - per adapter struct | |
935 | * @list: ioc_list | |
936 | * @shost: shost object | |
937 | * @id: unique adapter id | |
938 | * @cpu_count: number online cpus | |
939 | * @name: generic ioc string | |
940 | * @tmp_string: tmp string used for logging | |
941 | * @pdev: pci pdev object | |
942 | * @pio_chip: physical io register space | |
943 | * @chip: memory mapped register space | |
944 | * @chip_phys: physical addrss prior to mapping | |
945 | * @logging_level: see mpt3sas_debug.h | |
946 | * @fwfault_debug: debuging FW timeouts | |
947 | * @ir_firmware: IR firmware present | |
948 | * @bars: bitmask of BAR's that must be configured | |
949 | * @mask_interrupts: ignore interrupt | |
9b05c91a | 950 | * @dma_mask: used to set the consistent dma mask |
d88e1eab SPS |
951 | * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and |
952 | * pci resource handling | |
f92363d1 SR |
953 | * @fault_reset_work_q_name: fw fault work queue |
954 | * @fault_reset_work_q: "" | |
955 | * @fault_reset_work: "" | |
956 | * @firmware_event_name: fw event work queue | |
957 | * @firmware_event_thread: "" | |
958 | * @fw_event_lock: | |
959 | * @fw_event_list: list of fw events | |
960 | * @aen_event_read_flag: event log was read | |
961 | * @broadcast_aen_busy: broadcast aen waiting to be serviced | |
962 | * @shost_recovery: host reset in progress | |
963 | * @ioc_reset_in_progress_lock: | |
964 | * @ioc_link_reset_in_progress: phy/hard reset in progress | |
965 | * @ignore_loginfos: ignore loginfos during task management | |
966 | * @remove_host: flag for when driver unloads, to avoid sending dev resets | |
967 | * @pci_error_recovery: flag to prevent ioc access until slot reset completes | |
968 | * @wait_for_discovery_to_complete: flag set at driver load time when | |
969 | * waiting on reporting devices | |
970 | * @is_driver_loading: flag set at driver load time | |
971 | * @port_enable_failed: flag set when port enable has failed | |
972 | * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work | |
973 | * @start_scan_failed: means port enable failed, return's the ioc_status | |
974 | * @msix_enable: flag indicating msix is enabled | |
975 | * @msix_vector_count: number msix vectors | |
976 | * @cpu_msix_table: table for mapping cpus to msix index | |
977 | * @cpu_msix_table_sz: table size | |
978 | * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands | |
979 | * @scsi_io_cb_idx: shost generated commands | |
980 | * @tm_cb_idx: task management commands | |
981 | * @scsih_cb_idx: scsih internal commands | |
982 | * @transport_cb_idx: transport internal commands | |
983 | * @ctl_cb_idx: clt internal commands | |
984 | * @base_cb_idx: base internal commands | |
985 | * @config_cb_idx: base internal commands | |
986 | * @tm_tr_cb_idx : device removal target reset handshake | |
987 | * @tm_tr_volume_cb_idx : volume removal target reset | |
988 | * @base_cmds: | |
989 | * @transport_cmds: | |
990 | * @scsih_cmds: | |
991 | * @tm_cmds: | |
992 | * @ctl_cmds: | |
993 | * @config_cmds: | |
994 | * @base_add_sg_single: handler for either 32/64 bit sgl's | |
995 | * @event_type: bits indicating which events to log | |
996 | * @event_context: unique id for each logged event | |
997 | * @event_log: event log pointer | |
998 | * @event_masks: events that are masked | |
999 | * @facts: static facts data | |
1000 | * @pfacts: static port facts data | |
1001 | * @manu_pg0: static manufacturing page 0 | |
1002 | * @manu_pg10: static manufacturing page 10 | |
1003 | * @manu_pg11: static manufacturing page 11 | |
1004 | * @bios_pg2: static bios page 2 | |
1005 | * @bios_pg3: static bios page 3 | |
1006 | * @ioc_pg8: static ioc page 8 | |
1007 | * @iounit_pg0: static iounit page 0 | |
1008 | * @iounit_pg1: static iounit page 1 | |
2d8ce8c9 | 1009 | * @iounit_pg8: static iounit page 8 |
f92363d1 SR |
1010 | * @sas_hba: sas host object |
1011 | * @sas_expander_list: expander object list | |
1012 | * @sas_node_lock: | |
1013 | * @sas_device_list: sas device object list | |
1014 | * @sas_device_init_list: sas device object list (used only at init time) | |
1015 | * @sas_device_lock: | |
d88e1eab SPS |
1016 | * @pcie_device_list: pcie device object list |
1017 | * @pcie_device_init_list: pcie device object list (used only at init time) | |
1018 | * @pcie_device_lock: | |
f92363d1 SR |
1019 | * @io_missing_delay: time for IO completed by fw when PDR enabled |
1020 | * @device_missing_delay: time for device missing by fw when PDR enabled | |
1021 | * @sas_id : used for setting volume target IDs | |
d88e1eab | 1022 | * @pcie_target_id: used for setting pcie target IDs |
f92363d1 SR |
1023 | * @blocking_handles: bitmask used to identify which devices need blocking |
1024 | * @pd_handles : bitmask for PD handles | |
1025 | * @pd_handles_sz : size of pd_handle bitmask | |
1026 | * @config_page_sz: config page size | |
1027 | * @config_page: reserve memory for config page payload | |
1028 | * @config_page_dma: | |
1029 | * @hba_queue_depth: hba request queue depth | |
1030 | * @sge_size: sg element size for either 32/64 bit | |
1031 | * @scsiio_depth: SCSI_IO queue depth | |
1032 | * @request_sz: per request frame size | |
1033 | * @request: pool of request frames | |
1034 | * @request_dma: | |
1035 | * @request_dma_sz: | |
1036 | * @scsi_lookup: firmware request tracker list | |
1037 | * @scsi_lookup_lock: | |
1038 | * @free_list: free list of request | |
1039 | * @pending_io_count: | |
1040 | * @reset_wq: | |
1041 | * @chain: pool of chains | |
1042 | * @chain_dma: | |
1043 | * @max_sges_in_main_message: number sg elements in main message | |
1044 | * @max_sges_in_chain_message: number sg elements per chain | |
1045 | * @chains_needed_per_io: max chains per io | |
1046 | * @chain_depth: total chains allocated | |
ebb3024e SS |
1047 | * @chain_segment_sz: gives the max number of |
1048 | * SGEs accommodate on single chain buffer | |
f92363d1 SR |
1049 | * @hi_priority_smid: |
1050 | * @hi_priority: | |
1051 | * @hi_priority_dma: | |
1052 | * @hi_priority_depth: | |
1053 | * @hpr_lookup: | |
1054 | * @hpr_free_list: | |
1055 | * @internal_smid: | |
1056 | * @internal: | |
1057 | * @internal_dma: | |
1058 | * @internal_depth: | |
1059 | * @internal_lookup: | |
1060 | * @internal_free_list: | |
1061 | * @sense: pool of sense | |
1062 | * @sense_dma: | |
1063 | * @sense_dma_pool: | |
1064 | * @reply_depth: hba reply queue depth: | |
1065 | * @reply_sz: per reply frame size: | |
1066 | * @reply: pool of replys: | |
1067 | * @reply_dma: | |
1068 | * @reply_dma_pool: | |
1069 | * @reply_free_queue_depth: reply free depth | |
1070 | * @reply_free: pool for reply free queue (32 bit addr) | |
1071 | * @reply_free_dma: | |
1072 | * @reply_free_dma_pool: | |
1073 | * @reply_free_host_index: tail index in pool to insert free replys | |
1074 | * @reply_post_queue_depth: reply post queue depth | |
9b05c91a SR |
1075 | * @reply_post_struct: struct for reply_post_free physical & virt address |
1076 | * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init | |
1077 | * @rdpq_array_enable: rdpq_array support is enabled in the driver | |
1078 | * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag | |
1079 | * is assigned only ones | |
f92363d1 SR |
1080 | * @reply_queue_count: number of reply queue's |
1081 | * @reply_queue_list: link list contaning the reply queue info | |
fb77bb53 SR |
1082 | * @msix96_vector: 96 MSI-X vector support |
1083 | * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue | |
f92363d1 SR |
1084 | * @delayed_tr_list: target reset link list |
1085 | * @delayed_tr_volume_list: volume target reset link list | |
fd0331b3 SS |
1086 | * @delayed_sc_list: |
1087 | * @delayed_event_ack_list: | |
08c4d550 SR |
1088 | * @temp_sensors_count: flag to carry the number of temperature sensors |
1089 | * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and | |
1090 | * pci resource handling. PCI resource freeing will lead to free | |
1091 | * vital hardware/memory resource, which might be in use by cli/sysfs | |
1092 | * path functions resulting in Null pointer reference followed by kernel | |
1093 | * crash. To avoid the above race condition we use mutex syncrhonization | |
1094 | * which ensures the syncrhonization between cli/sysfs_show path. | |
f92363d1 SR |
1095 | */ |
1096 | struct MPT3SAS_ADAPTER { | |
1097 | struct list_head list; | |
1098 | struct Scsi_Host *shost; | |
1099 | u8 id; | |
1100 | int cpu_count; | |
1101 | char name[MPT_NAME_LENGTH]; | |
bbfd8e8b | 1102 | char driver_name[MPT_NAME_LENGTH - 8]; |
f92363d1 SR |
1103 | char tmp_string[MPT_STRING_LENGTH]; |
1104 | struct pci_dev *pdev; | |
1105 | Mpi2SystemInterfaceRegs_t __iomem *chip; | |
1106 | resource_size_t chip_phys; | |
1107 | int logging_level; | |
1108 | int fwfault_debug; | |
1109 | u8 ir_firmware; | |
1110 | int bars; | |
1111 | u8 mask_interrupts; | |
9b05c91a | 1112 | int dma_mask; |
f92363d1 SR |
1113 | |
1114 | /* fw fault handler */ | |
1115 | char fault_reset_work_q_name[20]; | |
1116 | struct workqueue_struct *fault_reset_work_q; | |
1117 | struct delayed_work fault_reset_work; | |
1118 | ||
1119 | /* fw event handler */ | |
1120 | char firmware_event_name[20]; | |
1121 | struct workqueue_struct *firmware_event_thread; | |
1122 | spinlock_t fw_event_lock; | |
1123 | struct list_head fw_event_list; | |
1124 | ||
1125 | /* misc flags */ | |
1126 | int aen_event_read_flag; | |
1127 | u8 broadcast_aen_busy; | |
1128 | u16 broadcast_aen_pending; | |
1129 | u8 shost_recovery; | |
459325c4 | 1130 | u8 got_task_abort_from_ioctl; |
f92363d1 SR |
1131 | |
1132 | struct mutex reset_in_progress_mutex; | |
1133 | spinlock_t ioc_reset_in_progress_lock; | |
1134 | u8 ioc_link_reset_in_progress; | |
1135 | u8 ioc_reset_in_progress_status; | |
1136 | ||
1137 | u8 ignore_loginfos; | |
1138 | u8 remove_host; | |
1139 | u8 pci_error_recovery; | |
1140 | u8 wait_for_discovery_to_complete; | |
1141 | u8 is_driver_loading; | |
1142 | u8 port_enable_failed; | |
1143 | u8 start_scan; | |
1144 | u16 start_scan_failed; | |
1145 | ||
1146 | u8 msix_enable; | |
1147 | u16 msix_vector_count; | |
1148 | u8 *cpu_msix_table; | |
1149 | u16 cpu_msix_table_sz; | |
7786ab6a | 1150 | resource_size_t __iomem **reply_post_host_index; |
f92363d1 SR |
1151 | u32 ioc_reset_count; |
1152 | MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds; | |
16e179bd | 1153 | u32 non_operational_loop; |
f92363d1 SR |
1154 | |
1155 | /* internal commands, callback index */ | |
1156 | u8 scsi_io_cb_idx; | |
1157 | u8 tm_cb_idx; | |
1158 | u8 transport_cb_idx; | |
1159 | u8 scsih_cb_idx; | |
1160 | u8 ctl_cb_idx; | |
1161 | u8 base_cb_idx; | |
1162 | u8 port_enable_cb_idx; | |
1163 | u8 config_cb_idx; | |
1164 | u8 tm_tr_cb_idx; | |
1165 | u8 tm_tr_volume_cb_idx; | |
1166 | u8 tm_sas_control_cb_idx; | |
1167 | struct _internal_cmd base_cmds; | |
1168 | struct _internal_cmd port_enable_cmds; | |
1169 | struct _internal_cmd transport_cmds; | |
1170 | struct _internal_cmd scsih_cmds; | |
1171 | struct _internal_cmd tm_cmds; | |
1172 | struct _internal_cmd ctl_cmds; | |
1173 | struct _internal_cmd config_cmds; | |
1174 | ||
1175 | MPT_ADD_SGE base_add_sg_single; | |
1176 | ||
1177 | /* function ptr for either IEEE or MPI sg elements */ | |
1178 | MPT_BUILD_SG_SCMD build_sg_scmd; | |
1179 | MPT_BUILD_SG build_sg; | |
1180 | MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge; | |
f92363d1 | 1181 | u16 sge_size_ieee; |
d357e84d | 1182 | u16 hba_mpi_version_belonged; |
f92363d1 SR |
1183 | |
1184 | /* function ptr for MPI sg elements only */ | |
1185 | MPT_BUILD_SG build_sg_mpi; | |
1186 | MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi; | |
1187 | ||
aff39e61 SPS |
1188 | /* function ptr for NVMe PRP elements only */ |
1189 | NVME_BUILD_PRP build_nvme_prp; | |
1190 | ||
f92363d1 SR |
1191 | /* event log */ |
1192 | u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; | |
1193 | u32 event_context; | |
1194 | void *event_log; | |
1195 | u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; | |
1196 | ||
1197 | /* static config pages */ | |
1198 | struct mpt3sas_facts facts; | |
1199 | struct mpt3sas_port_facts *pfacts; | |
1200 | Mpi2ManufacturingPage0_t manu_pg0; | |
1201 | struct Mpi2ManufacturingPage10_t manu_pg10; | |
1202 | struct Mpi2ManufacturingPage11_t manu_pg11; | |
1203 | Mpi2BiosPage2_t bios_pg2; | |
1204 | Mpi2BiosPage3_t bios_pg3; | |
1205 | Mpi2IOCPage8_t ioc_pg8; | |
1206 | Mpi2IOUnitPage0_t iounit_pg0; | |
1207 | Mpi2IOUnitPage1_t iounit_pg1; | |
2d8ce8c9 | 1208 | Mpi2IOUnitPage8_t iounit_pg8; |
f92363d1 SR |
1209 | |
1210 | struct _boot_device req_boot_device; | |
1211 | struct _boot_device req_alt_boot_device; | |
1212 | struct _boot_device current_boot_device; | |
1213 | ||
1214 | /* sas hba, expander, and device list */ | |
1215 | struct _sas_node sas_hba; | |
1216 | struct list_head sas_expander_list; | |
1217 | spinlock_t sas_node_lock; | |
1218 | struct list_head sas_device_list; | |
1219 | struct list_head sas_device_init_list; | |
1220 | spinlock_t sas_device_lock; | |
d88e1eab SPS |
1221 | struct list_head pcie_device_list; |
1222 | struct list_head pcie_device_init_list; | |
1223 | spinlock_t pcie_device_lock; | |
1224 | ||
f92363d1 SR |
1225 | struct list_head raid_device_list; |
1226 | spinlock_t raid_device_lock; | |
1227 | u8 io_missing_delay; | |
1228 | u16 device_missing_delay; | |
1229 | int sas_id; | |
d88e1eab | 1230 | int pcie_target_id; |
f92363d1 SR |
1231 | |
1232 | void *blocking_handles; | |
1233 | void *pd_handles; | |
1234 | u16 pd_handles_sz; | |
1235 | ||
c696f7b8 SPS |
1236 | void *pend_os_device_add; |
1237 | u16 pend_os_device_add_sz; | |
1238 | ||
f92363d1 SR |
1239 | /* config page */ |
1240 | u16 config_page_sz; | |
1241 | void *config_page; | |
1242 | dma_addr_t config_page_dma; | |
1243 | ||
1244 | /* scsiio request */ | |
1245 | u16 hba_queue_depth; | |
1246 | u16 sge_size; | |
1247 | u16 scsiio_depth; | |
1248 | u16 request_sz; | |
1249 | u8 *request; | |
1250 | dma_addr_t request_dma; | |
1251 | u32 request_dma_sz; | |
1252 | struct scsiio_tracker *scsi_lookup; | |
1253 | ulong scsi_lookup_pages; | |
1254 | spinlock_t scsi_lookup_lock; | |
1255 | struct list_head free_list; | |
1256 | int pending_io_count; | |
1257 | wait_queue_head_t reset_wq; | |
1258 | ||
016d5c35 SPS |
1259 | /* PCIe SGL */ |
1260 | struct dma_pool *pcie_sgl_dma_pool; | |
1261 | /* Host Page Size */ | |
1262 | u32 page_size; | |
1263 | ||
f92363d1 SR |
1264 | /* chain */ |
1265 | struct chain_tracker *chain_lookup; | |
1266 | struct list_head free_chain_list; | |
1267 | struct dma_pool *chain_dma_pool; | |
1268 | ulong chain_pages; | |
1269 | u16 max_sges_in_main_message; | |
1270 | u16 max_sges_in_chain_message; | |
1271 | u16 chains_needed_per_io; | |
1272 | u32 chain_depth; | |
ebb3024e | 1273 | u16 chain_segment_sz; |
f92363d1 SR |
1274 | |
1275 | /* hi-priority queue */ | |
1276 | u16 hi_priority_smid; | |
1277 | u8 *hi_priority; | |
1278 | dma_addr_t hi_priority_dma; | |
1279 | u16 hi_priority_depth; | |
1280 | struct request_tracker *hpr_lookup; | |
1281 | struct list_head hpr_free_list; | |
1282 | ||
1283 | /* internal queue */ | |
1284 | u16 internal_smid; | |
1285 | u8 *internal; | |
1286 | dma_addr_t internal_dma; | |
1287 | u16 internal_depth; | |
1288 | struct request_tracker *internal_lookup; | |
1289 | struct list_head internal_free_list; | |
1290 | ||
1291 | /* sense */ | |
1292 | u8 *sense; | |
1293 | dma_addr_t sense_dma; | |
1294 | struct dma_pool *sense_dma_pool; | |
1295 | ||
1296 | /* reply */ | |
1297 | u16 reply_sz; | |
1298 | u8 *reply; | |
1299 | dma_addr_t reply_dma; | |
1300 | u32 reply_dma_max_address; | |
1301 | u32 reply_dma_min_address; | |
1302 | struct dma_pool *reply_dma_pool; | |
1303 | ||
1304 | /* reply free queue */ | |
1305 | u16 reply_free_queue_depth; | |
1306 | __le32 *reply_free; | |
1307 | dma_addr_t reply_free_dma; | |
1308 | struct dma_pool *reply_free_dma_pool; | |
1309 | u32 reply_free_host_index; | |
1310 | ||
1311 | /* reply post queue */ | |
1312 | u16 reply_post_queue_depth; | |
9b05c91a SR |
1313 | struct reply_post_struct *reply_post; |
1314 | u8 rdpq_array_capable; | |
1315 | u8 rdpq_array_enable; | |
1316 | u8 rdpq_array_enable_assigned; | |
f92363d1 SR |
1317 | struct dma_pool *reply_post_free_dma_pool; |
1318 | u8 reply_queue_count; | |
1319 | struct list_head reply_queue_list; | |
1320 | ||
0bb337c9 SPS |
1321 | u8 combined_reply_queue; |
1322 | u8 combined_reply_index_count; | |
fb77bb53 SR |
1323 | /* reply post register index */ |
1324 | resource_size_t **replyPostRegisterIndex; | |
1325 | ||
f92363d1 SR |
1326 | struct list_head delayed_tr_list; |
1327 | struct list_head delayed_tr_volume_list; | |
fd0331b3 SS |
1328 | struct list_head delayed_sc_list; |
1329 | struct list_head delayed_event_ack_list; | |
2d8ce8c9 | 1330 | u8 temp_sensors_count; |
08c4d550 | 1331 | struct mutex pci_access_mutex; |
f92363d1 SR |
1332 | |
1333 | /* diag buffer support */ | |
1334 | u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT]; | |
1335 | u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT]; | |
1336 | dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT]; | |
1337 | u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT]; | |
1338 | u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT]; | |
1339 | u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23]; | |
1340 | u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT]; | |
1341 | u32 ring_buffer_offset; | |
1342 | u32 ring_buffer_sz; | |
7786ab6a SR |
1343 | u8 is_warpdrive; |
1344 | u8 hide_ir_msg; | |
1345 | u8 mfg_pg10_hide_flag; | |
1346 | u8 hide_drives; | |
f92363d1 SR |
1347 | spinlock_t diag_trigger_lock; |
1348 | u8 diag_trigger_active; | |
1349 | struct SL_WH_MASTER_TRIGGER_T diag_trigger_master; | |
1350 | struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event; | |
1351 | struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi; | |
1352 | struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi; | |
c696f7b8 SPS |
1353 | void *device_remove_in_progress; |
1354 | u16 device_remove_in_progress_sz; | |
998f26ae | 1355 | u8 is_gen35_ioc; |
81c16f83 SPS |
1356 | u8 atomic_desc_capable; |
1357 | PUT_SMID_IO_FP_HIP put_smid_scsi_io; | |
1358 | PUT_SMID_IO_FP_HIP put_smid_fast_path; | |
1359 | PUT_SMID_IO_FP_HIP put_smid_hi_priority; | |
1360 | PUT_SMID_DEFAULT put_smid_default; | |
aff39e61 | 1361 | PUT_SMID_DEFAULT put_smid_nvme_encap; |
81c16f83 | 1362 | |
f92363d1 SR |
1363 | }; |
1364 | ||
1365 | typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, | |
1366 | u32 reply); | |
1367 | ||
1368 | ||
1369 | /* base shared API */ | |
1370 | extern struct list_head mpt3sas_ioc_list; | |
d357e84d | 1371 | extern char driver_name[MPT_NAME_LENGTH]; |
08c4d550 SR |
1372 | /* spinlock on list operations over IOCs |
1373 | * Case: when multiple warpdrive cards(IOCs) are in use | |
1374 | * Each IOC will added to the ioc list structure on initialization. | |
1375 | * Watchdog threads run at regular intervals to check IOC for any | |
1376 | * fault conditions which will trigger the dead_ioc thread to | |
1377 | * deallocate pci resource, resulting deleting the IOC netry from list, | |
1378 | * this deletion need to protected by spinlock to enusre that | |
1379 | * ioc removal is syncrhonized, if not synchronized it might lead to | |
1380 | * list_del corruption as the ioc list is traversed in cli path. | |
1381 | */ | |
1382 | extern spinlock_t gioc_lock; | |
d357e84d | 1383 | |
f92363d1 SR |
1384 | void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc); |
1385 | void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc); | |
1386 | ||
1387 | int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc); | |
1388 | void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc); | |
1389 | int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc); | |
1390 | void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc); | |
98c56ad3 | 1391 | int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, |
f92363d1 SR |
1392 | enum reset_type type); |
1393 | ||
1394 | void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid); | |
1395 | void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid); | |
1396 | __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, | |
1397 | u16 smid); | |
016d5c35 | 1398 | void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid); |
d8335ae2 | 1399 | dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid); |
5f0dfb7a | 1400 | void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc); |
f92363d1 SR |
1401 | |
1402 | /* hi-priority queue */ | |
1403 | u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); | |
1404 | u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx, | |
1405 | struct scsi_cmnd *scmd); | |
1406 | ||
1407 | u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); | |
1408 | void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid); | |
f92363d1 SR |
1409 | void mpt3sas_base_initialize_callback_handler(void); |
1410 | u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func); | |
1411 | void mpt3sas_base_release_callback_handler(u8 cb_idx); | |
1412 | ||
1413 | u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, | |
1414 | u32 reply); | |
1415 | u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, | |
1416 | u8 msix_index, u32 reply); | |
1417 | void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, | |
1418 | u32 phys_addr); | |
1419 | ||
1420 | u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked); | |
1421 | ||
1422 | void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code); | |
1423 | int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc, | |
1424 | Mpi2SasIoUnitControlReply_t *mpi_reply, | |
1425 | Mpi2SasIoUnitControlRequest_t *mpi_request); | |
1426 | int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc, | |
1427 | Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request); | |
1428 | ||
1429 | void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, | |
1430 | u32 *event_type); | |
1431 | ||
1432 | void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc); | |
1433 | ||
1434 | void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc, | |
1435 | u16 device_missing_delay, u8 io_missing_delay); | |
1436 | ||
1437 | int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc); | |
1438 | ||
86a5aa62 SR |
1439 | void |
1440 | mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc); | |
1441 | ||
f92363d1 SR |
1442 | |
1443 | /* scsih shared API */ | |
1444 | u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, | |
1445 | u32 reply); | |
1446 | void mpt3sas_scsih_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase); | |
1447 | ||
1448 | int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, | |
1449 | uint channel, uint id, uint lun, u8 type, u16 smid_task, | |
96902835 CO |
1450 | ulong timeout); |
1451 | int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, | |
1452 | uint channel, uint id, uint lun, u8 type, u16 smid_task, | |
1453 | ulong timeout); | |
1454 | ||
f92363d1 SR |
1455 | void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); |
1456 | void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); | |
1457 | void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address); | |
1458 | void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc, | |
1459 | u64 sas_address); | |
fd0331b3 SS |
1460 | u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc, |
1461 | u16 smid); | |
f92363d1 SR |
1462 | |
1463 | struct _sas_node *mpt3sas_scsih_expander_find_by_handle( | |
1464 | struct MPT3SAS_ADAPTER *ioc, u16 handle); | |
1465 | struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address( | |
1466 | struct MPT3SAS_ADAPTER *ioc, u64 sas_address); | |
d1cb5e49 SR |
1467 | struct _sas_device *mpt3sas_get_sdev_by_addr( |
1468 | struct MPT3SAS_ADAPTER *ioc, u64 sas_address); | |
1469 | struct _sas_device *__mpt3sas_get_sdev_by_addr( | |
1470 | struct MPT3SAS_ADAPTER *ioc, u64 sas_address); | |
c102e00c SPS |
1471 | struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc, |
1472 | u16 handle); | |
1473 | struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc, | |
1474 | u16 handle); | |
f92363d1 SR |
1475 | |
1476 | void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc); | |
c84b06a4 SR |
1477 | struct _raid_device * |
1478 | mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle); | |
8a7e4c24 | 1479 | |
f92363d1 SR |
1480 | /* config shared API */ |
1481 | u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, | |
1482 | u32 reply); | |
1483 | int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc, | |
1484 | u8 *num_phys); | |
1485 | int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc, | |
1486 | Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page); | |
1487 | int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc, | |
1488 | Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page, | |
1489 | u16 sz); | |
1490 | int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc, | |
1491 | Mpi2ConfigReply_t *mpi_reply, | |
1492 | struct Mpi2ManufacturingPage10_t *config_page); | |
1493 | ||
1494 | int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, | |
1495 | Mpi2ConfigReply_t *mpi_reply, | |
1496 | struct Mpi2ManufacturingPage11_t *config_page); | |
1497 | int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, | |
1498 | Mpi2ConfigReply_t *mpi_reply, | |
1499 | struct Mpi2ManufacturingPage11_t *config_page); | |
1500 | ||
1501 | int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t | |
1502 | *mpi_reply, Mpi2BiosPage2_t *config_page); | |
1503 | int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t | |
1504 | *mpi_reply, Mpi2BiosPage3_t *config_page); | |
1505 | int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t | |
1506 | *mpi_reply, Mpi2IOUnitPage0_t *config_page); | |
1507 | int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc, | |
1508 | Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page, | |
1509 | u32 form, u32 handle); | |
1510 | int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc, | |
1511 | Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page, | |
1512 | u32 form, u32 handle); | |
c102e00c SPS |
1513 | int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc, |
1514 | Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, | |
1515 | u32 form, u32 handle); | |
1516 | int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc, | |
1517 | Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, | |
1518 | u32 form, u32 handle); | |
f92363d1 SR |
1519 | int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, |
1520 | Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page, | |
1521 | u16 sz); | |
1522 | int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t | |
1523 | *mpi_reply, Mpi2IOUnitPage1_t *config_page); | |
42263095 SR |
1524 | int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc, |
1525 | Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz); | |
f92363d1 SR |
1526 | int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t |
1527 | *mpi_reply, Mpi2IOUnitPage1_t *config_page); | |
2d8ce8c9 SR |
1528 | int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t |
1529 | *mpi_reply, Mpi2IOUnitPage8_t *config_page); | |
f92363d1 SR |
1530 | int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, |
1531 | Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, | |
1532 | u16 sz); | |
1533 | int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, | |
1534 | Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, | |
1535 | u16 sz); | |
1536 | int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t | |
1537 | *mpi_reply, Mpi2IOCPage8_t *config_page); | |
1538 | int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc, | |
1539 | Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page, | |
1540 | u32 form, u32 handle); | |
1541 | int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc, | |
1542 | Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page, | |
1543 | u32 phy_number, u16 handle); | |
1544 | int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc, | |
1545 | Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page, | |
1546 | u32 form, u32 handle); | |
1547 | int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t | |
1548 | *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number); | |
1549 | int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t | |
1550 | *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number); | |
1551 | int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc, | |
1552 | Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, | |
1553 | u32 handle); | |
1554 | int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle, | |
1555 | u8 *num_pds); | |
1556 | int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc, | |
1557 | Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form, | |
1558 | u32 handle, u16 sz); | |
1559 | int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc, | |
1560 | Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, | |
1561 | u32 form, u32 form_specific); | |
1562 | int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle, | |
1563 | u16 *volume_handle); | |
1564 | int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc, | |
1565 | u16 volume_handle, u64 *wwid); | |
1566 | ||
1567 | /* ctl shared API */ | |
1568 | extern struct device_attribute *mpt3sas_host_attrs[]; | |
1569 | extern struct device_attribute *mpt3sas_dev_attrs[]; | |
c84b06a4 SR |
1570 | void mpt3sas_ctl_init(ushort hbas_to_enumerate); |
1571 | void mpt3sas_ctl_exit(ushort hbas_to_enumerate); | |
f92363d1 SR |
1572 | u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, |
1573 | u32 reply); | |
1574 | void mpt3sas_ctl_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase); | |
1575 | u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc, | |
1576 | u8 msix_index, u32 reply); | |
1577 | void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc, | |
1578 | Mpi2EventNotificationReply_t *mpi_reply); | |
1579 | ||
1580 | void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc, | |
ad61dd30 | 1581 | u8 bits_to_register); |
f92363d1 SR |
1582 | int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type, |
1583 | u8 *issue_reset); | |
1584 | ||
1585 | /* transport shared API */ | |
7497392a | 1586 | extern struct scsi_transport_template *mpt3sas_transport_template; |
f92363d1 SR |
1587 | u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, |
1588 | u32 reply); | |
1589 | struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc, | |
1590 | u16 handle, u64 sas_address); | |
1591 | void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address, | |
1592 | u64 sas_address_parent); | |
1593 | int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy | |
1594 | *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev); | |
1595 | int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc, | |
1596 | struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1, | |
1597 | struct device *parent_dev); | |
1598 | void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc, | |
1599 | u64 sas_address, u16 handle, u8 phy_number, u8 link_rate); | |
1600 | extern struct sas_function_template mpt3sas_transport_functions; | |
1601 | extern struct scsi_transport_template *mpt3sas_transport_template; | |
f92363d1 SR |
1602 | /* trigger data externs */ |
1603 | void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc, | |
1604 | struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); | |
1605 | void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc, | |
1606 | struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); | |
1607 | void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc, | |
1608 | u32 tigger_bitmask); | |
1609 | void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event, | |
1610 | u16 log_entry_qualifier); | |
1611 | void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key, | |
1612 | u8 asc, u8 ascq); | |
1613 | void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status, | |
1614 | u32 loginfo); | |
c84b06a4 SR |
1615 | |
1616 | /* warpdrive APIs */ | |
1617 | u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc); | |
1618 | void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc, | |
1619 | struct _raid_device *raid_device); | |
0a5149ba | 1620 | u8 |
c84b06a4 | 1621 | mpt3sas_scsi_direct_io_get(struct MPT3SAS_ADAPTER *ioc, u16 smid); |
0a5149ba | 1622 | void |
c84b06a4 SR |
1623 | mpt3sas_scsi_direct_io_set(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 direct_io); |
1624 | void | |
1625 | mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd, | |
016d5c35 | 1626 | struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request, |
c84b06a4 SR |
1627 | u16 smid); |
1628 | ||
307d9075 AM |
1629 | /* NCQ Prio Handling Check */ |
1630 | bool scsih_ncq_prio_supp(struct scsi_device *sdev); | |
1631 | ||
f92363d1 | 1632 | #endif /* MPT3SAS_BASE_H_INCLUDED */ |