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Commit | Line | Data |
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b5762948 | 1 | /* |
20b09c29 AY |
2 | * Marvell 88SE64xx/88SE94xx main function |
3 | * | |
4 | * Copyright 2007 Red Hat, Inc. | |
5 | * Copyright 2008 Marvell. <kewei@marvell.com> | |
0b15fb1f | 6 | * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com> |
20b09c29 AY |
7 | * |
8 | * This file is licensed under GPLv2. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; version 2 of the | |
13 | * License. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | |
23 | * USA | |
24 | */ | |
b5762948 | 25 | |
dd4969a8 | 26 | #include "mv_sas.h" |
b5762948 | 27 | |
dd4969a8 JG |
28 | static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag) |
29 | { | |
30 | if (task->lldd_task) { | |
31 | struct mvs_slot_info *slot; | |
f9da3be5 | 32 | slot = task->lldd_task; |
20b09c29 | 33 | *tag = slot->slot_tag; |
dd4969a8 JG |
34 | return 1; |
35 | } | |
36 | return 0; | |
37 | } | |
8f261aaf | 38 | |
20b09c29 | 39 | void mvs_tag_clear(struct mvs_info *mvi, u32 tag) |
dd4969a8 | 40 | { |
b89e8f53 | 41 | void *bitmap = mvi->tags; |
dd4969a8 JG |
42 | clear_bit(tag, bitmap); |
43 | } | |
8f261aaf | 44 | |
20b09c29 | 45 | void mvs_tag_free(struct mvs_info *mvi, u32 tag) |
dd4969a8 JG |
46 | { |
47 | mvs_tag_clear(mvi, tag); | |
48 | } | |
8f261aaf | 49 | |
20b09c29 | 50 | void mvs_tag_set(struct mvs_info *mvi, unsigned int tag) |
dd4969a8 | 51 | { |
b89e8f53 | 52 | void *bitmap = mvi->tags; |
dd4969a8 JG |
53 | set_bit(tag, bitmap); |
54 | } | |
8f261aaf | 55 | |
20b09c29 | 56 | inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out) |
dd4969a8 JG |
57 | { |
58 | unsigned int index, tag; | |
b89e8f53 | 59 | void *bitmap = mvi->tags; |
b5762948 | 60 | |
20b09c29 | 61 | index = find_first_zero_bit(bitmap, mvi->tags_num); |
dd4969a8 | 62 | tag = index; |
20b09c29 | 63 | if (tag >= mvi->tags_num) |
dd4969a8 JG |
64 | return -SAS_QUEUE_FULL; |
65 | mvs_tag_set(mvi, tag); | |
66 | *tag_out = tag; | |
67 | return 0; | |
68 | } | |
b5762948 | 69 | |
dd4969a8 JG |
70 | void mvs_tag_init(struct mvs_info *mvi) |
71 | { | |
72 | int i; | |
20b09c29 | 73 | for (i = 0; i < mvi->tags_num; ++i) |
dd4969a8 JG |
74 | mvs_tag_clear(mvi, i); |
75 | } | |
b5762948 | 76 | |
20b09c29 AY |
77 | struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev) |
78 | { | |
79 | unsigned long i = 0, j = 0, hi = 0; | |
80 | struct sas_ha_struct *sha = dev->port->ha; | |
81 | struct mvs_info *mvi = NULL; | |
82 | struct asd_sas_phy *phy; | |
83 | ||
84 | while (sha->sas_port[i]) { | |
85 | if (sha->sas_port[i] == dev->port) { | |
86 | phy = container_of(sha->sas_port[i]->phy_list.next, | |
87 | struct asd_sas_phy, port_phy_el); | |
88 | j = 0; | |
89 | while (sha->sas_phy[j]) { | |
90 | if (sha->sas_phy[j] == phy) | |
91 | break; | |
92 | j++; | |
93 | } | |
94 | break; | |
95 | } | |
96 | i++; | |
97 | } | |
98 | hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; | |
99 | mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi]; | |
8f261aaf | 100 | |
20b09c29 | 101 | return mvi; |
8f261aaf | 102 | |
20b09c29 | 103 | } |
8f261aaf | 104 | |
20b09c29 AY |
105 | int mvs_find_dev_phyno(struct domain_device *dev, int *phyno) |
106 | { | |
107 | unsigned long i = 0, j = 0, n = 0, num = 0; | |
9870d9a2 AY |
108 | struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; |
109 | struct mvs_info *mvi = mvi_dev->mvi_info; | |
20b09c29 AY |
110 | struct sas_ha_struct *sha = dev->port->ha; |
111 | ||
112 | while (sha->sas_port[i]) { | |
113 | if (sha->sas_port[i] == dev->port) { | |
114 | struct asd_sas_phy *phy; | |
115 | list_for_each_entry(phy, | |
116 | &sha->sas_port[i]->phy_list, port_phy_el) { | |
117 | j = 0; | |
118 | while (sha->sas_phy[j]) { | |
119 | if (sha->sas_phy[j] == phy) | |
120 | break; | |
121 | j++; | |
122 | } | |
123 | phyno[n] = (j >= mvi->chip->n_phy) ? | |
124 | (j - mvi->chip->n_phy) : j; | |
125 | num++; | |
126 | n++; | |
dd4969a8 | 127 | } |
dd4969a8 JG |
128 | break; |
129 | } | |
20b09c29 AY |
130 | i++; |
131 | } | |
132 | return num; | |
133 | } | |
134 | ||
534ff101 XY |
135 | struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi, |
136 | u8 reg_set) | |
137 | { | |
138 | u32 dev_no; | |
139 | for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) { | |
140 | if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED) | |
141 | continue; | |
142 | ||
143 | if (mvi->devices[dev_no].taskfileset == reg_set) | |
144 | return &mvi->devices[dev_no]; | |
145 | } | |
146 | return NULL; | |
147 | } | |
148 | ||
20b09c29 AY |
149 | static inline void mvs_free_reg_set(struct mvs_info *mvi, |
150 | struct mvs_device *dev) | |
151 | { | |
152 | if (!dev) { | |
153 | mv_printk("device has been free.\n"); | |
154 | return; | |
155 | } | |
20b09c29 AY |
156 | if (dev->taskfileset == MVS_ID_NOT_MAPPED) |
157 | return; | |
158 | MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset); | |
159 | } | |
160 | ||
161 | static inline u8 mvs_assign_reg_set(struct mvs_info *mvi, | |
162 | struct mvs_device *dev) | |
163 | { | |
164 | if (dev->taskfileset != MVS_ID_NOT_MAPPED) | |
165 | return 0; | |
166 | return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset); | |
167 | } | |
168 | ||
169 | void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard) | |
170 | { | |
171 | u32 no; | |
172 | for_each_phy(phy_mask, phy_mask, no) { | |
173 | if (!(phy_mask & 1)) | |
174 | continue; | |
175 | MVS_CHIP_DISP->phy_reset(mvi, no, hard); | |
176 | } | |
177 | } | |
178 | ||
20b09c29 AY |
179 | int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func, |
180 | void *funcdata) | |
181 | { | |
182 | int rc = 0, phy_id = sas_phy->id; | |
183 | u32 tmp, i = 0, hi; | |
184 | struct sas_ha_struct *sha = sas_phy->ha; | |
185 | struct mvs_info *mvi = NULL; | |
186 | ||
187 | while (sha->sas_phy[i]) { | |
188 | if (sha->sas_phy[i] == sas_phy) | |
189 | break; | |
190 | i++; | |
191 | } | |
192 | hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; | |
193 | mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi]; | |
194 | ||
195 | switch (func) { | |
196 | case PHY_FUNC_SET_LINK_RATE: | |
197 | MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata); | |
198 | break; | |
8f261aaf | 199 | |
dd4969a8 | 200 | case PHY_FUNC_HARD_RESET: |
20b09c29 | 201 | tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id); |
dd4969a8 JG |
202 | if (tmp & PHY_RST_HARD) |
203 | break; | |
a4632aae | 204 | MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET); |
dd4969a8 | 205 | break; |
b5762948 | 206 | |
dd4969a8 | 207 | case PHY_FUNC_LINK_RESET: |
20b09c29 | 208 | MVS_CHIP_DISP->phy_enable(mvi, phy_id); |
a4632aae | 209 | MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET); |
dd4969a8 | 210 | break; |
b5762948 | 211 | |
dd4969a8 | 212 | case PHY_FUNC_DISABLE: |
20b09c29 AY |
213 | MVS_CHIP_DISP->phy_disable(mvi, phy_id); |
214 | break; | |
dd4969a8 JG |
215 | case PHY_FUNC_RELEASE_SPINUP_HOLD: |
216 | default: | |
ac013ed1 | 217 | rc = -ENOSYS; |
b5762948 | 218 | } |
20b09c29 | 219 | msleep(200); |
b5762948 JG |
220 | return rc; |
221 | } | |
222 | ||
20b09c29 AY |
223 | void __devinit mvs_set_sas_addr(struct mvs_info *mvi, int port_id, |
224 | u32 off_lo, u32 off_hi, u64 sas_addr) | |
225 | { | |
226 | u32 lo = (u32)sas_addr; | |
227 | u32 hi = (u32)(sas_addr>>32); | |
228 | ||
229 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo); | |
230 | MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo); | |
231 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi); | |
232 | MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi); | |
233 | } | |
234 | ||
dd4969a8 | 235 | static void mvs_bytes_dmaed(struct mvs_info *mvi, int i) |
ee1f1c2e | 236 | { |
dd4969a8 | 237 | struct mvs_phy *phy = &mvi->phy[i]; |
20b09c29 AY |
238 | struct asd_sas_phy *sas_phy = &phy->sas_phy; |
239 | struct sas_ha_struct *sas_ha; | |
dd4969a8 JG |
240 | if (!phy->phy_attached) |
241 | return; | |
242 | ||
20b09c29 AY |
243 | if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK) |
244 | && phy->phy_type & PORT_TYPE_SAS) { | |
245 | return; | |
246 | } | |
247 | ||
248 | sas_ha = mvi->sas; | |
249 | sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE); | |
250 | ||
dd4969a8 JG |
251 | if (sas_phy->phy) { |
252 | struct sas_phy *sphy = sas_phy->phy; | |
253 | ||
254 | sphy->negotiated_linkrate = sas_phy->linkrate; | |
255 | sphy->minimum_linkrate = phy->minimum_linkrate; | |
256 | sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS; | |
257 | sphy->maximum_linkrate = phy->maximum_linkrate; | |
20b09c29 | 258 | sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate(); |
ee1f1c2e | 259 | } |
ee1f1c2e | 260 | |
dd4969a8 JG |
261 | if (phy->phy_type & PORT_TYPE_SAS) { |
262 | struct sas_identify_frame *id; | |
b5762948 | 263 | |
dd4969a8 JG |
264 | id = (struct sas_identify_frame *)phy->frame_rcvd; |
265 | id->dev_type = phy->identify.device_type; | |
266 | id->initiator_bits = SAS_PROTOCOL_ALL; | |
267 | id->target_bits = phy->identify.target_port_protocols; | |
477f6d19 XY |
268 | |
269 | /* direct attached SAS device */ | |
270 | if (phy->att_dev_info & PORT_SSP_TRGT_MASK) { | |
271 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT); | |
272 | MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00); | |
273 | } | |
dd4969a8 | 274 | } else if (phy->phy_type & PORT_TYPE_SATA) { |
20b09c29 | 275 | /*Nothing*/ |
dd4969a8 | 276 | } |
20b09c29 AY |
277 | mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy); |
278 | ||
279 | sas_phy->frame_rcvd_size = phy->frame_rcvd_size; | |
280 | ||
281 | mvi->sas->notify_port_event(sas_phy, | |
dd4969a8 | 282 | PORTE_BYTES_DMAED); |
ee1f1c2e KW |
283 | } |
284 | ||
dd4969a8 | 285 | void mvs_scan_start(struct Scsi_Host *shost) |
b5762948 | 286 | { |
20b09c29 AY |
287 | int i, j; |
288 | unsigned short core_nr; | |
289 | struct mvs_info *mvi; | |
290 | struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); | |
84fbd0ce | 291 | struct mvs_prv_info *mvs_prv = sha->lldd_ha; |
20b09c29 AY |
292 | |
293 | core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; | |
dd4969a8 | 294 | |
20b09c29 AY |
295 | for (j = 0; j < core_nr; j++) { |
296 | mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j]; | |
297 | for (i = 0; i < mvi->chip->n_phy; ++i) | |
298 | mvs_bytes_dmaed(mvi, i); | |
dd4969a8 | 299 | } |
84fbd0ce | 300 | mvs_prv->scan_finished = 1; |
b5762948 JG |
301 | } |
302 | ||
dd4969a8 | 303 | int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time) |
b5762948 | 304 | { |
84fbd0ce XY |
305 | struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); |
306 | struct mvs_prv_info *mvs_prv = sha->lldd_ha; | |
307 | ||
308 | if (mvs_prv->scan_finished == 0) | |
dd4969a8 | 309 | return 0; |
84fbd0ce | 310 | |
dd4969a8 JG |
311 | scsi_flush_work(shost); |
312 | return 1; | |
b5762948 JG |
313 | } |
314 | ||
dd4969a8 JG |
315 | static int mvs_task_prep_smp(struct mvs_info *mvi, |
316 | struct mvs_task_exec_info *tei) | |
b5762948 | 317 | { |
dd4969a8 JG |
318 | int elem, rc, i; |
319 | struct sas_task *task = tei->task; | |
320 | struct mvs_cmd_hdr *hdr = tei->hdr; | |
20b09c29 AY |
321 | struct domain_device *dev = task->dev; |
322 | struct asd_sas_port *sas_port = dev->port; | |
dd4969a8 JG |
323 | struct scatterlist *sg_req, *sg_resp; |
324 | u32 req_len, resp_len, tag = tei->tag; | |
325 | void *buf_tmp; | |
326 | u8 *buf_oaf; | |
327 | dma_addr_t buf_tmp_dma; | |
20b09c29 | 328 | void *buf_prd; |
dd4969a8 | 329 | struct mvs_slot_info *slot = &mvi->slot_info[tag]; |
dd4969a8 | 330 | u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); |
b89e8f53 | 331 | |
dd4969a8 JG |
332 | /* |
333 | * DMA-map SMP request, response buffers | |
334 | */ | |
335 | sg_req = &task->smp_task.smp_req; | |
20b09c29 | 336 | elem = dma_map_sg(mvi->dev, sg_req, 1, PCI_DMA_TODEVICE); |
dd4969a8 JG |
337 | if (!elem) |
338 | return -ENOMEM; | |
339 | req_len = sg_dma_len(sg_req); | |
b5762948 | 340 | |
dd4969a8 | 341 | sg_resp = &task->smp_task.smp_resp; |
20b09c29 | 342 | elem = dma_map_sg(mvi->dev, sg_resp, 1, PCI_DMA_FROMDEVICE); |
dd4969a8 JG |
343 | if (!elem) { |
344 | rc = -ENOMEM; | |
345 | goto err_out; | |
346 | } | |
20b09c29 | 347 | resp_len = SB_RFB_MAX; |
b5762948 | 348 | |
dd4969a8 JG |
349 | /* must be in dwords */ |
350 | if ((req_len & 0x3) || (resp_len & 0x3)) { | |
351 | rc = -EINVAL; | |
352 | goto err_out_2; | |
b5762948 JG |
353 | } |
354 | ||
dd4969a8 JG |
355 | /* |
356 | * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs | |
357 | */ | |
b5762948 | 358 | |
20b09c29 | 359 | /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */ |
dd4969a8 JG |
360 | buf_tmp = slot->buf; |
361 | buf_tmp_dma = slot->buf_dma; | |
b5762948 | 362 | |
dd4969a8 | 363 | hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req)); |
b5762948 | 364 | |
dd4969a8 JG |
365 | /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ |
366 | buf_oaf = buf_tmp; | |
367 | hdr->open_frame = cpu_to_le64(buf_tmp_dma); | |
b5762948 | 368 | |
dd4969a8 JG |
369 | buf_tmp += MVS_OAF_SZ; |
370 | buf_tmp_dma += MVS_OAF_SZ; | |
b5762948 | 371 | |
20b09c29 | 372 | /* region 3: PRD table *********************************** */ |
dd4969a8 JG |
373 | buf_prd = buf_tmp; |
374 | if (tei->n_elem) | |
375 | hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); | |
376 | else | |
377 | hdr->prd_tbl = 0; | |
b5762948 | 378 | |
20b09c29 | 379 | i = MVS_CHIP_DISP->prd_size() * tei->n_elem; |
dd4969a8 JG |
380 | buf_tmp += i; |
381 | buf_tmp_dma += i; | |
b5762948 | 382 | |
dd4969a8 JG |
383 | /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ |
384 | slot->response = buf_tmp; | |
385 | hdr->status_buf = cpu_to_le64(buf_tmp_dma); | |
20b09c29 AY |
386 | if (mvi->flags & MVF_FLAG_SOC) |
387 | hdr->reserved[0] = 0; | |
b5762948 | 388 | |
dd4969a8 JG |
389 | /* |
390 | * Fill in TX ring and command slot header | |
391 | */ | |
392 | slot->tx = mvi->tx_prod; | |
393 | mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) | | |
394 | TXQ_MODE_I | tag | | |
395 | (sas_port->phy_mask << TXQ_PHY_SHIFT)); | |
b5762948 | 396 | |
dd4969a8 JG |
397 | hdr->flags |= flags; |
398 | hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4)); | |
399 | hdr->tags = cpu_to_le32(tag); | |
400 | hdr->data_len = 0; | |
b5762948 | 401 | |
dd4969a8 | 402 | /* generate open address frame hdr (first 12 bytes) */ |
20b09c29 AY |
403 | /* initiator, SMP, ftype 1h */ |
404 | buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01; | |
6ceae7c6 | 405 | buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; |
dd4969a8 | 406 | *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */ |
20b09c29 | 407 | memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); |
dd4969a8 JG |
408 | |
409 | /* fill in PRD (scatter/gather) table, if any */ | |
20b09c29 | 410 | MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); |
b5762948 JG |
411 | |
412 | return 0; | |
413 | ||
dd4969a8 | 414 | err_out_2: |
20b09c29 | 415 | dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1, |
dd4969a8 | 416 | PCI_DMA_FROMDEVICE); |
b5762948 | 417 | err_out: |
20b09c29 | 418 | dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1, |
dd4969a8 | 419 | PCI_DMA_TODEVICE); |
8f261aaf | 420 | return rc; |
8f261aaf KW |
421 | } |
422 | ||
dd4969a8 | 423 | static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag) |
8f261aaf | 424 | { |
dd4969a8 | 425 | struct ata_queued_cmd *qc = task->uldd_task; |
8f261aaf | 426 | |
dd4969a8 JG |
427 | if (qc) { |
428 | if (qc->tf.command == ATA_CMD_FPDMA_WRITE || | |
429 | qc->tf.command == ATA_CMD_FPDMA_READ) { | |
430 | *tag = qc->tag; | |
431 | return 1; | |
432 | } | |
8f261aaf | 433 | } |
8f261aaf | 434 | |
dd4969a8 | 435 | return 0; |
8f261aaf KW |
436 | } |
437 | ||
dd4969a8 JG |
438 | static int mvs_task_prep_ata(struct mvs_info *mvi, |
439 | struct mvs_task_exec_info *tei) | |
b5762948 JG |
440 | { |
441 | struct sas_task *task = tei->task; | |
442 | struct domain_device *dev = task->dev; | |
f9da3be5 | 443 | struct mvs_device *mvi_dev = dev->lldd_dev; |
b5762948 JG |
444 | struct mvs_cmd_hdr *hdr = tei->hdr; |
445 | struct asd_sas_port *sas_port = dev->port; | |
8f261aaf | 446 | struct mvs_slot_info *slot; |
20b09c29 AY |
447 | void *buf_prd; |
448 | u32 tag = tei->tag, hdr_tag; | |
449 | u32 flags, del_q; | |
b5762948 JG |
450 | void *buf_tmp; |
451 | u8 *buf_cmd, *buf_oaf; | |
452 | dma_addr_t buf_tmp_dma; | |
8f261aaf KW |
453 | u32 i, req_len, resp_len; |
454 | const u32 max_resp_len = SB_RFB_MAX; | |
455 | ||
20b09c29 AY |
456 | if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) { |
457 | mv_dprintk("Have not enough regiset for dev %d.\n", | |
458 | mvi_dev->device_id); | |
8f261aaf | 459 | return -EBUSY; |
20b09c29 | 460 | } |
8f261aaf KW |
461 | slot = &mvi->slot_info[tag]; |
462 | slot->tx = mvi->tx_prod; | |
20b09c29 AY |
463 | del_q = TXQ_MODE_I | tag | |
464 | (TXQ_CMD_STP << TXQ_CMD_SHIFT) | | |
465 | (sas_port->phy_mask << TXQ_PHY_SHIFT) | | |
466 | (mvi_dev->taskfileset << TXQ_SRS_SHIFT); | |
467 | mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q); | |
468 | ||
20b09c29 AY |
469 | if (task->data_dir == DMA_FROM_DEVICE) |
470 | flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT); | |
471 | else | |
472 | flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); | |
8882f081 | 473 | |
b5762948 JG |
474 | if (task->ata_task.use_ncq) |
475 | flags |= MCH_FPDMA; | |
8f261aaf KW |
476 | if (dev->sata_dev.command_set == ATAPI_COMMAND_SET) { |
477 | if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI) | |
478 | flags |= MCH_ATAPI; | |
479 | } | |
480 | ||
b5762948 | 481 | hdr->flags = cpu_to_le32(flags); |
8f261aaf | 482 | |
20b09c29 AY |
483 | if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag)) |
484 | task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); | |
4e52fc0a | 485 | else |
20b09c29 AY |
486 | hdr_tag = tag; |
487 | ||
488 | hdr->tags = cpu_to_le32(hdr_tag); | |
489 | ||
b5762948 JG |
490 | hdr->data_len = cpu_to_le32(task->total_xfer_len); |
491 | ||
492 | /* | |
493 | * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs | |
494 | */ | |
b5762948 | 495 | |
8f261aaf KW |
496 | /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */ |
497 | buf_cmd = buf_tmp = slot->buf; | |
b5762948 JG |
498 | buf_tmp_dma = slot->buf_dma; |
499 | ||
500 | hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); | |
501 | ||
502 | buf_tmp += MVS_ATA_CMD_SZ; | |
503 | buf_tmp_dma += MVS_ATA_CMD_SZ; | |
504 | ||
8f261aaf | 505 | /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ |
b5762948 JG |
506 | /* used for STP. unused for SATA? */ |
507 | buf_oaf = buf_tmp; | |
508 | hdr->open_frame = cpu_to_le64(buf_tmp_dma); | |
509 | ||
510 | buf_tmp += MVS_OAF_SZ; | |
511 | buf_tmp_dma += MVS_OAF_SZ; | |
512 | ||
8f261aaf | 513 | /* region 3: PRD table ********************************************* */ |
b5762948 | 514 | buf_prd = buf_tmp; |
20b09c29 | 515 | |
8f261aaf KW |
516 | if (tei->n_elem) |
517 | hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); | |
518 | else | |
519 | hdr->prd_tbl = 0; | |
20b09c29 | 520 | i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count(); |
b5762948 | 521 | |
b5762948 JG |
522 | buf_tmp += i; |
523 | buf_tmp_dma += i; | |
524 | ||
8f261aaf | 525 | /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ |
b5762948 JG |
526 | slot->response = buf_tmp; |
527 | hdr->status_buf = cpu_to_le64(buf_tmp_dma); | |
20b09c29 AY |
528 | if (mvi->flags & MVF_FLAG_SOC) |
529 | hdr->reserved[0] = 0; | |
b5762948 | 530 | |
8f261aaf | 531 | req_len = sizeof(struct host_to_dev_fis); |
b5762948 | 532 | resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ - |
8f261aaf | 533 | sizeof(struct mvs_err_info) - i; |
b5762948 JG |
534 | |
535 | /* request, response lengths */ | |
8f261aaf | 536 | resp_len = min(resp_len, max_resp_len); |
b5762948 JG |
537 | hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4)); |
538 | ||
20b09c29 AY |
539 | if (likely(!task->ata_task.device_control_reg_update)) |
540 | task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */ | |
b5762948 | 541 | /* fill in command FIS and ATAPI CDB */ |
8f261aaf KW |
542 | memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis)); |
543 | if (dev->sata_dev.command_set == ATAPI_COMMAND_SET) | |
544 | memcpy(buf_cmd + STP_ATAPI_CMD, | |
545 | task->ata_task.atapi_packet, 16); | |
546 | ||
547 | /* generate open address frame hdr (first 12 bytes) */ | |
20b09c29 AY |
548 | /* initiator, STP, ftype 1h */ |
549 | buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1; | |
6ceae7c6 | 550 | buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; |
20b09c29 AY |
551 | *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1); |
552 | memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); | |
b5762948 JG |
553 | |
554 | /* fill in PRD (scatter/gather) table, if any */ | |
20b09c29 | 555 | MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); |
8882f081 | 556 | |
20b09c29 | 557 | if (task->data_dir == DMA_FROM_DEVICE) |
8882f081 | 558 | MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask, |
20b09c29 | 559 | TRASH_BUCKET_SIZE, tei->n_elem, buf_prd); |
8882f081 | 560 | |
b5762948 JG |
561 | return 0; |
562 | } | |
563 | ||
564 | static int mvs_task_prep_ssp(struct mvs_info *mvi, | |
20b09c29 AY |
565 | struct mvs_task_exec_info *tei, int is_tmf, |
566 | struct mvs_tmf_task *tmf) | |
b5762948 JG |
567 | { |
568 | struct sas_task *task = tei->task; | |
b5762948 | 569 | struct mvs_cmd_hdr *hdr = tei->hdr; |
8f261aaf | 570 | struct mvs_port *port = tei->port; |
20b09c29 | 571 | struct domain_device *dev = task->dev; |
f9da3be5 | 572 | struct mvs_device *mvi_dev = dev->lldd_dev; |
20b09c29 | 573 | struct asd_sas_port *sas_port = dev->port; |
b5762948 | 574 | struct mvs_slot_info *slot; |
20b09c29 | 575 | void *buf_prd; |
b5762948 JG |
576 | struct ssp_frame_hdr *ssp_hdr; |
577 | void *buf_tmp; | |
578 | u8 *buf_cmd, *buf_oaf, fburst = 0; | |
579 | dma_addr_t buf_tmp_dma; | |
580 | u32 flags; | |
8f261aaf KW |
581 | u32 resp_len, req_len, i, tag = tei->tag; |
582 | const u32 max_resp_len = SB_RFB_MAX; | |
20b09c29 | 583 | u32 phy_mask; |
b5762948 JG |
584 | |
585 | slot = &mvi->slot_info[tag]; | |
586 | ||
20b09c29 AY |
587 | phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap : |
588 | sas_port->phy_mask) & TXQ_PHY_MASK; | |
589 | ||
8f261aaf KW |
590 | slot->tx = mvi->tx_prod; |
591 | mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag | | |
592 | (TXQ_CMD_SSP << TXQ_CMD_SHIFT) | | |
4e52fc0a | 593 | (phy_mask << TXQ_PHY_SHIFT)); |
b5762948 JG |
594 | |
595 | flags = MCH_RETRY; | |
596 | if (task->ssp_task.enable_first_burst) { | |
597 | flags |= MCH_FBURST; | |
598 | fburst = (1 << 7); | |
599 | } | |
2b288133 AY |
600 | if (is_tmf) |
601 | flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT); | |
84fbd0ce XY |
602 | else |
603 | flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT); | |
604 | ||
2b288133 | 605 | hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT)); |
b5762948 JG |
606 | hdr->tags = cpu_to_le32(tag); |
607 | hdr->data_len = cpu_to_le32(task->total_xfer_len); | |
608 | ||
609 | /* | |
610 | * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs | |
611 | */ | |
b5762948 | 612 | |
8f261aaf KW |
613 | /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */ |
614 | buf_cmd = buf_tmp = slot->buf; | |
b5762948 JG |
615 | buf_tmp_dma = slot->buf_dma; |
616 | ||
617 | hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); | |
618 | ||
619 | buf_tmp += MVS_SSP_CMD_SZ; | |
620 | buf_tmp_dma += MVS_SSP_CMD_SZ; | |
621 | ||
8f261aaf | 622 | /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ |
b5762948 JG |
623 | buf_oaf = buf_tmp; |
624 | hdr->open_frame = cpu_to_le64(buf_tmp_dma); | |
625 | ||
626 | buf_tmp += MVS_OAF_SZ; | |
627 | buf_tmp_dma += MVS_OAF_SZ; | |
628 | ||
8f261aaf | 629 | /* region 3: PRD table ********************************************* */ |
b5762948 | 630 | buf_prd = buf_tmp; |
8f261aaf KW |
631 | if (tei->n_elem) |
632 | hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); | |
633 | else | |
634 | hdr->prd_tbl = 0; | |
b5762948 | 635 | |
20b09c29 | 636 | i = MVS_CHIP_DISP->prd_size() * tei->n_elem; |
b5762948 JG |
637 | buf_tmp += i; |
638 | buf_tmp_dma += i; | |
639 | ||
8f261aaf | 640 | /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ |
b5762948 JG |
641 | slot->response = buf_tmp; |
642 | hdr->status_buf = cpu_to_le64(buf_tmp_dma); | |
20b09c29 AY |
643 | if (mvi->flags & MVF_FLAG_SOC) |
644 | hdr->reserved[0] = 0; | |
b5762948 | 645 | |
b5762948 | 646 | resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ - |
8f261aaf KW |
647 | sizeof(struct mvs_err_info) - i; |
648 | resp_len = min(resp_len, max_resp_len); | |
649 | ||
650 | req_len = sizeof(struct ssp_frame_hdr) + 28; | |
b5762948 JG |
651 | |
652 | /* request, response lengths */ | |
653 | hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4)); | |
654 | ||
655 | /* generate open address frame hdr (first 12 bytes) */ | |
20b09c29 AY |
656 | /* initiator, SSP, ftype 1h */ |
657 | buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1; | |
6ceae7c6 | 658 | buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; |
20b09c29 AY |
659 | *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1); |
660 | memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); | |
b5762948 | 661 | |
8f261aaf KW |
662 | /* fill in SSP frame header (Command Table.SSP frame header) */ |
663 | ssp_hdr = (struct ssp_frame_hdr *)buf_cmd; | |
20b09c29 AY |
664 | |
665 | if (is_tmf) | |
666 | ssp_hdr->frame_type = SSP_TASK; | |
667 | else | |
668 | ssp_hdr->frame_type = SSP_COMMAND; | |
669 | ||
670 | memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr, | |
b5762948 JG |
671 | HASHED_SAS_ADDR_SIZE); |
672 | memcpy(ssp_hdr->hashed_src_addr, | |
20b09c29 | 673 | dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE); |
b5762948 JG |
674 | ssp_hdr->tag = cpu_to_be16(tag); |
675 | ||
20b09c29 | 676 | /* fill in IU for TASK and Command Frame */ |
b5762948 JG |
677 | buf_cmd += sizeof(*ssp_hdr); |
678 | memcpy(buf_cmd, &task->ssp_task.LUN, 8); | |
b5762948 | 679 | |
20b09c29 AY |
680 | if (ssp_hdr->frame_type != SSP_TASK) { |
681 | buf_cmd[9] = fburst | task->ssp_task.task_attr | | |
682 | (task->ssp_task.task_prio << 3); | |
683 | memcpy(buf_cmd + 12, &task->ssp_task.cdb, 16); | |
684 | } else{ | |
685 | buf_cmd[10] = tmf->tmf; | |
686 | switch (tmf->tmf) { | |
687 | case TMF_ABORT_TASK: | |
688 | case TMF_QUERY_TASK: | |
689 | buf_cmd[12] = | |
690 | (tmf->tag_of_task_to_be_managed >> 8) & 0xff; | |
691 | buf_cmd[13] = | |
692 | tmf->tag_of_task_to_be_managed & 0xff; | |
693 | break; | |
694 | default: | |
695 | break; | |
696 | } | |
b5762948 | 697 | } |
20b09c29 AY |
698 | /* fill in PRD (scatter/gather) table, if any */ |
699 | MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); | |
b5762948 JG |
700 | return 0; |
701 | } | |
702 | ||
20b09c29 | 703 | #define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == NO_DEVICE))) |
0b15fb1f XY |
704 | static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf, |
705 | struct mvs_tmf_task *tmf, int *pass) | |
b5762948 | 706 | { |
8f261aaf | 707 | struct domain_device *dev = task->dev; |
0b15fb1f | 708 | struct mvs_device *mvi_dev = dev->lldd_dev; |
b5762948 | 709 | struct mvs_task_exec_info tei; |
4e52fc0a | 710 | struct mvs_slot_info *slot; |
0b15fb1f XY |
711 | u32 tag = 0xdeadbeef, n_elem = 0; |
712 | int rc = 0; | |
b5762948 | 713 | |
20b09c29 | 714 | if (!dev->port) { |
0b15fb1f | 715 | struct task_status_struct *tsm = &task->task_status; |
20b09c29 AY |
716 | |
717 | tsm->resp = SAS_TASK_UNDELIVERED; | |
718 | tsm->stat = SAS_PHY_DOWN; | |
0b15fb1f XY |
719 | /* |
720 | * libsas will use dev->port, should | |
721 | * not call task_done for sata | |
722 | */ | |
9dc9fd94 | 723 | if (dev->dev_type != SATA_DEV) |
0b15fb1f XY |
724 | task->task_done(task); |
725 | return rc; | |
20b09c29 AY |
726 | } |
727 | ||
0b15fb1f XY |
728 | if (DEV_IS_GONE(mvi_dev)) { |
729 | if (mvi_dev) | |
730 | mv_dprintk("device %d not ready.\n", | |
731 | mvi_dev->device_id); | |
732 | else | |
733 | mv_dprintk("device %016llx not ready.\n", | |
734 | SAS_ADDR(dev->sas_addr)); | |
20b09c29 AY |
735 | |
736 | rc = SAS_PHY_DOWN; | |
0b15fb1f XY |
737 | return rc; |
738 | } | |
739 | tei.port = dev->port->lldd_port; | |
740 | if (tei.port && !tei.port->port_attached && !tmf) { | |
741 | if (sas_protocol_ata(task->task_proto)) { | |
742 | struct task_status_struct *ts = &task->task_status; | |
743 | mv_dprintk("SATA/STP port %d does not attach" | |
744 | "device.\n", dev->port->id); | |
745 | ts->resp = SAS_TASK_COMPLETE; | |
746 | ts->stat = SAS_PHY_DOWN; | |
20b09c29 | 747 | |
0b15fb1f | 748 | task->task_done(task); |
dd4969a8 | 749 | |
dd4969a8 | 750 | } else { |
0b15fb1f XY |
751 | struct task_status_struct *ts = &task->task_status; |
752 | mv_dprintk("SAS port %d does not attach" | |
753 | "device.\n", dev->port->id); | |
754 | ts->resp = SAS_TASK_UNDELIVERED; | |
755 | ts->stat = SAS_PHY_DOWN; | |
756 | task->task_done(task); | |
dd4969a8 | 757 | } |
0b15fb1f XY |
758 | return rc; |
759 | } | |
dd4969a8 | 760 | |
0b15fb1f XY |
761 | if (!sas_protocol_ata(task->task_proto)) { |
762 | if (task->num_scatter) { | |
763 | n_elem = dma_map_sg(mvi->dev, | |
764 | task->scatter, | |
765 | task->num_scatter, | |
766 | task->data_dir); | |
767 | if (!n_elem) { | |
768 | rc = -ENOMEM; | |
769 | goto prep_out; | |
770 | } | |
771 | } | |
772 | } else { | |
773 | n_elem = task->num_scatter; | |
774 | } | |
20b09c29 | 775 | |
0b15fb1f XY |
776 | rc = mvs_tag_alloc(mvi, &tag); |
777 | if (rc) | |
778 | goto err_out; | |
20b09c29 | 779 | |
0b15fb1f | 780 | slot = &mvi->slot_info[tag]; |
20b09c29 | 781 | |
0b15fb1f XY |
782 | task->lldd_task = NULL; |
783 | slot->n_elem = n_elem; | |
784 | slot->slot_tag = tag; | |
785 | ||
786 | slot->buf = pci_pool_alloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma); | |
787 | if (!slot->buf) | |
788 | goto err_out_tag; | |
789 | memset(slot->buf, 0, MVS_SLOT_BUF_SZ); | |
790 | ||
791 | tei.task = task; | |
792 | tei.hdr = &mvi->slot[tag]; | |
793 | tei.tag = tag; | |
794 | tei.n_elem = n_elem; | |
795 | switch (task->task_proto) { | |
796 | case SAS_PROTOCOL_SMP: | |
797 | rc = mvs_task_prep_smp(mvi, &tei); | |
798 | break; | |
799 | case SAS_PROTOCOL_SSP: | |
800 | rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf); | |
801 | break; | |
802 | case SAS_PROTOCOL_SATA: | |
803 | case SAS_PROTOCOL_STP: | |
804 | case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: | |
805 | rc = mvs_task_prep_ata(mvi, &tei); | |
806 | break; | |
807 | default: | |
808 | dev_printk(KERN_ERR, mvi->dev, | |
809 | "unknown sas_task proto: 0x%x\n", | |
810 | task->task_proto); | |
811 | rc = -EINVAL; | |
812 | break; | |
813 | } | |
dd4969a8 | 814 | |
0b15fb1f XY |
815 | if (rc) { |
816 | mv_dprintk("rc is %x\n", rc); | |
817 | goto err_out_slot_buf; | |
818 | } | |
819 | slot->task = task; | |
820 | slot->port = tei.port; | |
821 | task->lldd_task = slot; | |
822 | list_add_tail(&slot->entry, &tei.port->list); | |
823 | spin_lock(&task->task_state_lock); | |
824 | task->task_state_flags |= SAS_TASK_AT_INITIATOR; | |
825 | spin_unlock(&task->task_state_lock); | |
826 | ||
0b15fb1f XY |
827 | mvi_dev->running_req++; |
828 | ++(*pass); | |
829 | mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1); | |
9dc9fd94 | 830 | |
0b15fb1f | 831 | return rc; |
dd4969a8 | 832 | |
0b15fb1f XY |
833 | err_out_slot_buf: |
834 | pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma); | |
dd4969a8 JG |
835 | err_out_tag: |
836 | mvs_tag_free(mvi, tag); | |
837 | err_out: | |
20b09c29 | 838 | |
0b15fb1f XY |
839 | dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc); |
840 | if (!sas_protocol_ata(task->task_proto)) | |
dd4969a8 | 841 | if (n_elem) |
0b15fb1f XY |
842 | dma_unmap_sg(mvi->dev, task->scatter, n_elem, |
843 | task->data_dir); | |
844 | prep_out: | |
845 | return rc; | |
846 | } | |
847 | ||
848 | static struct mvs_task_list *mvs_task_alloc_list(int *num, gfp_t gfp_flags) | |
849 | { | |
850 | struct mvs_task_list *first = NULL; | |
851 | ||
852 | for (; *num > 0; --*num) { | |
853 | struct mvs_task_list *mvs_list = kmem_cache_zalloc(mvs_task_list_cache, gfp_flags); | |
854 | ||
855 | if (!mvs_list) | |
856 | break; | |
857 | ||
858 | INIT_LIST_HEAD(&mvs_list->list); | |
859 | if (!first) | |
860 | first = mvs_list; | |
861 | else | |
862 | list_add_tail(&mvs_list->list, &first->list); | |
863 | ||
864 | } | |
865 | ||
866 | return first; | |
867 | } | |
868 | ||
869 | static inline void mvs_task_free_list(struct mvs_task_list *mvs_list) | |
870 | { | |
871 | LIST_HEAD(list); | |
872 | struct list_head *pos, *a; | |
873 | struct mvs_task_list *mlist = NULL; | |
874 | ||
875 | __list_add(&list, mvs_list->list.prev, &mvs_list->list); | |
876 | ||
877 | list_for_each_safe(pos, a, &list) { | |
878 | list_del_init(pos); | |
879 | mlist = list_entry(pos, struct mvs_task_list, list); | |
880 | kmem_cache_free(mvs_task_list_cache, mlist); | |
881 | } | |
882 | } | |
883 | ||
884 | static int mvs_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags, | |
885 | struct completion *completion, int is_tmf, | |
886 | struct mvs_tmf_task *tmf) | |
887 | { | |
888 | struct domain_device *dev = task->dev; | |
889 | struct mvs_info *mvi = NULL; | |
890 | u32 rc = 0; | |
891 | u32 pass = 0; | |
892 | unsigned long flags = 0; | |
893 | ||
894 | mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info; | |
895 | ||
896 | if ((dev->dev_type == SATA_DEV) && (dev->sata_dev.ap != NULL)) | |
897 | spin_unlock_irq(dev->sata_dev.ap->lock); | |
898 | ||
899 | spin_lock_irqsave(&mvi->lock, flags); | |
900 | rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass); | |
901 | if (rc) | |
902 | dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc); | |
903 | ||
904 | if (likely(pass)) | |
905 | MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) & | |
906 | (MVS_CHIP_SLOT_SZ - 1)); | |
0b84b709 | 907 | spin_unlock_irqrestore(&mvi->lock, flags); |
0b15fb1f XY |
908 | |
909 | if ((dev->dev_type == SATA_DEV) && (dev->sata_dev.ap != NULL)) | |
910 | spin_lock_irq(dev->sata_dev.ap->lock); | |
911 | ||
912 | return rc; | |
913 | } | |
914 | ||
915 | static int mvs_collector_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags, | |
916 | struct completion *completion, int is_tmf, | |
917 | struct mvs_tmf_task *tmf) | |
918 | { | |
919 | struct domain_device *dev = task->dev; | |
920 | struct mvs_prv_info *mpi = dev->port->ha->lldd_ha; | |
921 | struct mvs_info *mvi = NULL; | |
922 | struct sas_task *t = task; | |
923 | struct mvs_task_list *mvs_list = NULL, *a; | |
924 | LIST_HEAD(q); | |
925 | int pass[2] = {0}; | |
926 | u32 rc = 0; | |
927 | u32 n = num; | |
928 | unsigned long flags = 0; | |
929 | ||
930 | mvs_list = mvs_task_alloc_list(&n, gfp_flags); | |
931 | if (n) { | |
932 | printk(KERN_ERR "%s: mvs alloc list failed.\n", __func__); | |
933 | rc = -ENOMEM; | |
934 | goto free_list; | |
935 | } | |
936 | ||
937 | __list_add(&q, mvs_list->list.prev, &mvs_list->list); | |
938 | ||
939 | list_for_each_entry(a, &q, list) { | |
940 | a->task = t; | |
941 | t = list_entry(t->list.next, struct sas_task, list); | |
942 | } | |
943 | ||
944 | list_for_each_entry(a, &q , list) { | |
945 | ||
946 | t = a->task; | |
947 | mvi = ((struct mvs_device *)t->dev->lldd_dev)->mvi_info; | |
948 | ||
949 | spin_lock_irqsave(&mvi->lock, flags); | |
950 | rc = mvs_task_prep(t, mvi, is_tmf, tmf, &pass[mvi->id]); | |
951 | if (rc) | |
952 | dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc); | |
953 | spin_unlock_irqrestore(&mvi->lock, flags); | |
954 | } | |
955 | ||
956 | if (likely(pass[0])) | |
957 | MVS_CHIP_DISP->start_delivery(mpi->mvi[0], | |
958 | (mpi->mvi[0]->tx_prod - 1) & (MVS_CHIP_SLOT_SZ - 1)); | |
959 | ||
960 | if (likely(pass[1])) | |
961 | MVS_CHIP_DISP->start_delivery(mpi->mvi[1], | |
962 | (mpi->mvi[1]->tx_prod - 1) & (MVS_CHIP_SLOT_SZ - 1)); | |
963 | ||
964 | list_del_init(&q); | |
965 | ||
966 | free_list: | |
967 | if (mvs_list) | |
968 | mvs_task_free_list(mvs_list); | |
969 | ||
dd4969a8 JG |
970 | return rc; |
971 | } | |
972 | ||
20b09c29 AY |
973 | int mvs_queue_command(struct sas_task *task, const int num, |
974 | gfp_t gfp_flags) | |
975 | { | |
0b15fb1f XY |
976 | struct mvs_device *mvi_dev = task->dev->lldd_dev; |
977 | struct sas_ha_struct *sas = mvi_dev->mvi_info->sas; | |
978 | ||
979 | if (sas->lldd_max_execute_num < 2) | |
980 | return mvs_task_exec(task, num, gfp_flags, NULL, 0, NULL); | |
981 | else | |
982 | return mvs_collector_task_exec(task, num, gfp_flags, NULL, 0, NULL); | |
20b09c29 AY |
983 | } |
984 | ||
dd4969a8 JG |
985 | static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc) |
986 | { | |
987 | u32 slot_idx = rx_desc & RXQ_SLOT_MASK; | |
988 | mvs_tag_clear(mvi, slot_idx); | |
989 | } | |
990 | ||
991 | static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task, | |
992 | struct mvs_slot_info *slot, u32 slot_idx) | |
993 | { | |
20b09c29 AY |
994 | if (!slot->task) |
995 | return; | |
dd4969a8 JG |
996 | if (!sas_protocol_ata(task->task_proto)) |
997 | if (slot->n_elem) | |
20b09c29 | 998 | dma_unmap_sg(mvi->dev, task->scatter, |
dd4969a8 JG |
999 | slot->n_elem, task->data_dir); |
1000 | ||
1001 | switch (task->task_proto) { | |
1002 | case SAS_PROTOCOL_SMP: | |
20b09c29 | 1003 | dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1, |
dd4969a8 | 1004 | PCI_DMA_FROMDEVICE); |
20b09c29 | 1005 | dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1, |
dd4969a8 JG |
1006 | PCI_DMA_TODEVICE); |
1007 | break; | |
1008 | ||
1009 | case SAS_PROTOCOL_SATA: | |
1010 | case SAS_PROTOCOL_STP: | |
1011 | case SAS_PROTOCOL_SSP: | |
1012 | default: | |
1013 | /* do nothing */ | |
1014 | break; | |
1015 | } | |
0b15fb1f XY |
1016 | |
1017 | if (slot->buf) { | |
1018 | pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma); | |
1019 | slot->buf = NULL; | |
1020 | } | |
20b09c29 | 1021 | list_del_init(&slot->entry); |
dd4969a8 JG |
1022 | task->lldd_task = NULL; |
1023 | slot->task = NULL; | |
1024 | slot->port = NULL; | |
20b09c29 AY |
1025 | slot->slot_tag = 0xFFFFFFFF; |
1026 | mvs_slot_free(mvi, slot_idx); | |
dd4969a8 JG |
1027 | } |
1028 | ||
84fbd0ce | 1029 | static void mvs_update_wideport(struct mvs_info *mvi, int phy_no) |
dd4969a8 | 1030 | { |
84fbd0ce | 1031 | struct mvs_phy *phy = &mvi->phy[phy_no]; |
dd4969a8 JG |
1032 | struct mvs_port *port = phy->port; |
1033 | int j, no; | |
1034 | ||
20b09c29 AY |
1035 | for_each_phy(port->wide_port_phymap, j, no) { |
1036 | if (j & 1) { | |
1037 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, no, | |
1038 | PHYR_WIDE_PORT); | |
1039 | MVS_CHIP_DISP->write_port_cfg_data(mvi, no, | |
dd4969a8 JG |
1040 | port->wide_port_phymap); |
1041 | } else { | |
20b09c29 AY |
1042 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, no, |
1043 | PHYR_WIDE_PORT); | |
1044 | MVS_CHIP_DISP->write_port_cfg_data(mvi, no, | |
1045 | 0); | |
dd4969a8 | 1046 | } |
20b09c29 | 1047 | } |
dd4969a8 JG |
1048 | } |
1049 | ||
1050 | static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i) | |
1051 | { | |
1052 | u32 tmp; | |
1053 | struct mvs_phy *phy = &mvi->phy[i]; | |
20b09c29 | 1054 | struct mvs_port *port = phy->port; |
dd4969a8 | 1055 | |
20b09c29 | 1056 | tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i); |
dd4969a8 JG |
1057 | if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) { |
1058 | if (!port) | |
1059 | phy->phy_attached = 1; | |
1060 | return tmp; | |
1061 | } | |
1062 | ||
1063 | if (port) { | |
1064 | if (phy->phy_type & PORT_TYPE_SAS) { | |
1065 | port->wide_port_phymap &= ~(1U << i); | |
1066 | if (!port->wide_port_phymap) | |
1067 | port->port_attached = 0; | |
1068 | mvs_update_wideport(mvi, i); | |
1069 | } else if (phy->phy_type & PORT_TYPE_SATA) | |
1070 | port->port_attached = 0; | |
dd4969a8 JG |
1071 | phy->port = NULL; |
1072 | phy->phy_attached = 0; | |
1073 | phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA); | |
1074 | } | |
1075 | return 0; | |
1076 | } | |
1077 | ||
1078 | static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf) | |
1079 | { | |
1080 | u32 *s = (u32 *) buf; | |
1081 | ||
1082 | if (!s) | |
1083 | return NULL; | |
1084 | ||
20b09c29 | 1085 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3); |
84fbd0ce | 1086 | s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); |
dd4969a8 | 1087 | |
20b09c29 | 1088 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2); |
84fbd0ce | 1089 | s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); |
dd4969a8 | 1090 | |
20b09c29 | 1091 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1); |
84fbd0ce | 1092 | s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); |
dd4969a8 | 1093 | |
20b09c29 | 1094 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0); |
84fbd0ce | 1095 | s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); |
20b09c29 | 1096 | |
20b09c29 AY |
1097 | if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01)) |
1098 | s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10); | |
dd4969a8 | 1099 | |
f9da3be5 | 1100 | return s; |
dd4969a8 JG |
1101 | } |
1102 | ||
1103 | static u32 mvs_is_sig_fis_received(u32 irq_status) | |
1104 | { | |
1105 | return irq_status & PHYEV_SIG_FIS; | |
1106 | } | |
1107 | ||
8882f081 XY |
1108 | static void mvs_sig_remove_timer(struct mvs_phy *phy) |
1109 | { | |
1110 | if (phy->timer.function) | |
1111 | del_timer(&phy->timer); | |
1112 | phy->timer.function = NULL; | |
1113 | } | |
1114 | ||
20b09c29 | 1115 | void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st) |
dd4969a8 JG |
1116 | { |
1117 | struct mvs_phy *phy = &mvi->phy[i]; | |
20b09c29 | 1118 | struct sas_identify_frame *id; |
b5762948 | 1119 | |
20b09c29 | 1120 | id = (struct sas_identify_frame *)phy->frame_rcvd; |
b5762948 | 1121 | |
dd4969a8 | 1122 | if (get_st) { |
20b09c29 | 1123 | phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i); |
dd4969a8 JG |
1124 | phy->phy_status = mvs_is_phy_ready(mvi, i); |
1125 | } | |
8f261aaf | 1126 | |
dd4969a8 | 1127 | if (phy->phy_status) { |
20b09c29 AY |
1128 | int oob_done = 0; |
1129 | struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy; | |
b5762948 | 1130 | |
20b09c29 AY |
1131 | oob_done = MVS_CHIP_DISP->oob_done(mvi, i); |
1132 | ||
1133 | MVS_CHIP_DISP->fix_phy_info(mvi, i, id); | |
1134 | if (phy->phy_type & PORT_TYPE_SATA) { | |
1135 | phy->identify.target_port_protocols = SAS_PROTOCOL_STP; | |
1136 | if (mvs_is_sig_fis_received(phy->irq_status)) { | |
8882f081 | 1137 | mvs_sig_remove_timer(phy); |
20b09c29 AY |
1138 | phy->phy_attached = 1; |
1139 | phy->att_dev_sas_addr = | |
1140 | i + mvi->id * mvi->chip->n_phy; | |
1141 | if (oob_done) | |
1142 | sas_phy->oob_mode = SATA_OOB_MODE; | |
1143 | phy->frame_rcvd_size = | |
1144 | sizeof(struct dev_to_host_fis); | |
f9da3be5 | 1145 | mvs_get_d2h_reg(mvi, i, id); |
20b09c29 AY |
1146 | } else { |
1147 | u32 tmp; | |
1148 | dev_printk(KERN_DEBUG, mvi->dev, | |
1149 | "Phy%d : No sig fis\n", i); | |
1150 | tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i); | |
1151 | MVS_CHIP_DISP->write_port_irq_mask(mvi, i, | |
1152 | tmp | PHYEV_SIG_FIS); | |
1153 | phy->phy_attached = 0; | |
1154 | phy->phy_type &= ~PORT_TYPE_SATA; | |
20b09c29 AY |
1155 | goto out_done; |
1156 | } | |
9dc9fd94 | 1157 | } else if (phy->phy_type & PORT_TYPE_SAS |
20b09c29 AY |
1158 | || phy->att_dev_info & PORT_SSP_INIT_MASK) { |
1159 | phy->phy_attached = 1; | |
dd4969a8 | 1160 | phy->identify.device_type = |
20b09c29 | 1161 | phy->att_dev_info & PORT_DEV_TYPE_MASK; |
b5762948 | 1162 | |
dd4969a8 JG |
1163 | if (phy->identify.device_type == SAS_END_DEV) |
1164 | phy->identify.target_port_protocols = | |
1165 | SAS_PROTOCOL_SSP; | |
1166 | else if (phy->identify.device_type != NO_DEVICE) | |
1167 | phy->identify.target_port_protocols = | |
1168 | SAS_PROTOCOL_SMP; | |
20b09c29 | 1169 | if (oob_done) |
dd4969a8 JG |
1170 | sas_phy->oob_mode = SAS_OOB_MODE; |
1171 | phy->frame_rcvd_size = | |
1172 | sizeof(struct sas_identify_frame); | |
dd4969a8 | 1173 | } |
20b09c29 AY |
1174 | memcpy(sas_phy->attached_sas_addr, |
1175 | &phy->att_dev_sas_addr, SAS_ADDR_SIZE); | |
b5762948 | 1176 | |
20b09c29 AY |
1177 | if (MVS_CHIP_DISP->phy_work_around) |
1178 | MVS_CHIP_DISP->phy_work_around(mvi, i); | |
dd4969a8 | 1179 | } |
84fbd0ce | 1180 | mv_dprintk("phy %d attach dev info is %x\n", |
20b09c29 | 1181 | i + mvi->id * mvi->chip->n_phy, phy->att_dev_info); |
84fbd0ce | 1182 | mv_dprintk("phy %d attach sas addr is %llx\n", |
20b09c29 | 1183 | i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr); |
4e52fc0a | 1184 | out_done: |
dd4969a8 | 1185 | if (get_st) |
20b09c29 | 1186 | MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status); |
b5762948 JG |
1187 | } |
1188 | ||
20b09c29 | 1189 | static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock) |
8f261aaf | 1190 | { |
dd4969a8 | 1191 | struct sas_ha_struct *sas_ha = sas_phy->ha; |
20b09c29 | 1192 | struct mvs_info *mvi = NULL; int i = 0, hi; |
dd4969a8 | 1193 | struct mvs_phy *phy = sas_phy->lldd_phy; |
20b09c29 AY |
1194 | struct asd_sas_port *sas_port = sas_phy->port; |
1195 | struct mvs_port *port; | |
1196 | unsigned long flags = 0; | |
1197 | if (!sas_port) | |
1198 | return; | |
8f261aaf | 1199 | |
20b09c29 AY |
1200 | while (sas_ha->sas_phy[i]) { |
1201 | if (sas_ha->sas_phy[i] == sas_phy) | |
1202 | break; | |
1203 | i++; | |
1204 | } | |
1205 | hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy; | |
1206 | mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi]; | |
84fbd0ce XY |
1207 | if (i >= mvi->chip->n_phy) |
1208 | port = &mvi->port[i - mvi->chip->n_phy]; | |
20b09c29 | 1209 | else |
84fbd0ce | 1210 | port = &mvi->port[i]; |
20b09c29 AY |
1211 | if (lock) |
1212 | spin_lock_irqsave(&mvi->lock, flags); | |
dd4969a8 JG |
1213 | port->port_attached = 1; |
1214 | phy->port = port; | |
0b15fb1f | 1215 | sas_port->lldd_port = port; |
dd4969a8 JG |
1216 | if (phy->phy_type & PORT_TYPE_SAS) { |
1217 | port->wide_port_phymap = sas_port->phy_mask; | |
20b09c29 | 1218 | mv_printk("set wide port phy map %x\n", sas_port->phy_mask); |
dd4969a8 | 1219 | mvs_update_wideport(mvi, sas_phy->id); |
477f6d19 XY |
1220 | |
1221 | /* direct attached SAS device */ | |
1222 | if (phy->att_dev_info & PORT_SSP_TRGT_MASK) { | |
1223 | MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT); | |
1224 | MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04); | |
1225 | } | |
8f261aaf | 1226 | } |
20b09c29 AY |
1227 | if (lock) |
1228 | spin_unlock_irqrestore(&mvi->lock, flags); | |
dd4969a8 JG |
1229 | } |
1230 | ||
20b09c29 | 1231 | static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock) |
dd4969a8 | 1232 | { |
9dc9fd94 S |
1233 | struct domain_device *dev; |
1234 | struct mvs_phy *phy = sas_phy->lldd_phy; | |
1235 | struct mvs_info *mvi = phy->mvi; | |
1236 | struct asd_sas_port *port = sas_phy->port; | |
1237 | int phy_no = 0; | |
1238 | ||
1239 | while (phy != &mvi->phy[phy_no]) { | |
1240 | phy_no++; | |
1241 | if (phy_no >= MVS_MAX_PHYS) | |
1242 | return; | |
1243 | } | |
1244 | list_for_each_entry(dev, &port->dev_list, dev_list_node) | |
84fbd0ce | 1245 | mvs_do_release_task(phy->mvi, phy_no, dev); |
9dc9fd94 | 1246 | |
dd4969a8 JG |
1247 | } |
1248 | ||
dd4969a8 | 1249 | |
20b09c29 AY |
1250 | void mvs_port_formed(struct asd_sas_phy *sas_phy) |
1251 | { | |
1252 | mvs_port_notify_formed(sas_phy, 1); | |
dd4969a8 JG |
1253 | } |
1254 | ||
20b09c29 | 1255 | void mvs_port_deformed(struct asd_sas_phy *sas_phy) |
dd4969a8 | 1256 | { |
20b09c29 AY |
1257 | mvs_port_notify_deformed(sas_phy, 1); |
1258 | } | |
8f261aaf | 1259 | |
20b09c29 AY |
1260 | struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi) |
1261 | { | |
1262 | u32 dev; | |
1263 | for (dev = 0; dev < MVS_MAX_DEVICES; dev++) { | |
1264 | if (mvi->devices[dev].dev_type == NO_DEVICE) { | |
1265 | mvi->devices[dev].device_id = dev; | |
1266 | return &mvi->devices[dev]; | |
1267 | } | |
8f261aaf | 1268 | } |
8121ed42 | 1269 | |
20b09c29 AY |
1270 | if (dev == MVS_MAX_DEVICES) |
1271 | mv_printk("max support %d devices, ignore ..\n", | |
1272 | MVS_MAX_DEVICES); | |
1273 | ||
1274 | return NULL; | |
8f261aaf KW |
1275 | } |
1276 | ||
20b09c29 | 1277 | void mvs_free_dev(struct mvs_device *mvi_dev) |
b5762948 | 1278 | { |
20b09c29 AY |
1279 | u32 id = mvi_dev->device_id; |
1280 | memset(mvi_dev, 0, sizeof(*mvi_dev)); | |
1281 | mvi_dev->device_id = id; | |
1282 | mvi_dev->dev_type = NO_DEVICE; | |
1283 | mvi_dev->dev_status = MVS_DEV_NORMAL; | |
1284 | mvi_dev->taskfileset = MVS_ID_NOT_MAPPED; | |
1285 | } | |
b5762948 | 1286 | |
20b09c29 AY |
1287 | int mvs_dev_found_notify(struct domain_device *dev, int lock) |
1288 | { | |
1289 | unsigned long flags = 0; | |
1290 | int res = 0; | |
1291 | struct mvs_info *mvi = NULL; | |
1292 | struct domain_device *parent_dev = dev->parent; | |
1293 | struct mvs_device *mvi_device; | |
b5762948 | 1294 | |
20b09c29 | 1295 | mvi = mvs_find_dev_mvi(dev); |
b5762948 | 1296 | |
20b09c29 AY |
1297 | if (lock) |
1298 | spin_lock_irqsave(&mvi->lock, flags); | |
1299 | ||
1300 | mvi_device = mvs_alloc_dev(mvi); | |
1301 | if (!mvi_device) { | |
1302 | res = -1; | |
1303 | goto found_out; | |
b5762948 | 1304 | } |
f9da3be5 | 1305 | dev->lldd_dev = mvi_device; |
9dc9fd94 | 1306 | mvi_device->dev_status = MVS_DEV_NORMAL; |
20b09c29 | 1307 | mvi_device->dev_type = dev->dev_type; |
9870d9a2 | 1308 | mvi_device->mvi_info = mvi; |
84fbd0ce | 1309 | mvi_device->sas_device = dev; |
20b09c29 AY |
1310 | if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) { |
1311 | int phy_id; | |
1312 | u8 phy_num = parent_dev->ex_dev.num_phys; | |
1313 | struct ex_phy *phy; | |
1314 | for (phy_id = 0; phy_id < phy_num; phy_id++) { | |
1315 | phy = &parent_dev->ex_dev.ex_phy[phy_id]; | |
1316 | if (SAS_ADDR(phy->attached_sas_addr) == | |
1317 | SAS_ADDR(dev->sas_addr)) { | |
1318 | mvi_device->attached_phy = phy_id; | |
1319 | break; | |
1320 | } | |
1321 | } | |
b5762948 | 1322 | |
20b09c29 AY |
1323 | if (phy_id == phy_num) { |
1324 | mv_printk("Error: no attached dev:%016llx" | |
1325 | "at ex:%016llx.\n", | |
1326 | SAS_ADDR(dev->sas_addr), | |
1327 | SAS_ADDR(parent_dev->sas_addr)); | |
1328 | res = -1; | |
1329 | } | |
dd4969a8 | 1330 | } |
b5762948 | 1331 | |
20b09c29 AY |
1332 | found_out: |
1333 | if (lock) | |
1334 | spin_unlock_irqrestore(&mvi->lock, flags); | |
1335 | return res; | |
1336 | } | |
b5762948 | 1337 | |
20b09c29 AY |
1338 | int mvs_dev_found(struct domain_device *dev) |
1339 | { | |
1340 | return mvs_dev_found_notify(dev, 1); | |
1341 | } | |
b5762948 | 1342 | |
9dc9fd94 | 1343 | void mvs_dev_gone_notify(struct domain_device *dev) |
20b09c29 AY |
1344 | { |
1345 | unsigned long flags = 0; | |
f9da3be5 | 1346 | struct mvs_device *mvi_dev = dev->lldd_dev; |
9870d9a2 | 1347 | struct mvs_info *mvi = mvi_dev->mvi_info; |
b5762948 | 1348 | |
9dc9fd94 | 1349 | spin_lock_irqsave(&mvi->lock, flags); |
b5762948 | 1350 | |
20b09c29 AY |
1351 | if (mvi_dev) { |
1352 | mv_dprintk("found dev[%d:%x] is gone.\n", | |
1353 | mvi_dev->device_id, mvi_dev->dev_type); | |
9dc9fd94 | 1354 | mvs_release_task(mvi, dev); |
20b09c29 AY |
1355 | mvs_free_reg_set(mvi, mvi_dev); |
1356 | mvs_free_dev(mvi_dev); | |
1357 | } else { | |
1358 | mv_dprintk("found dev has gone.\n"); | |
b5762948 | 1359 | } |
20b09c29 | 1360 | dev->lldd_dev = NULL; |
84fbd0ce | 1361 | mvi_dev->sas_device = NULL; |
b5762948 | 1362 | |
9dc9fd94 | 1363 | spin_unlock_irqrestore(&mvi->lock, flags); |
b5762948 JG |
1364 | } |
1365 | ||
b5762948 | 1366 | |
20b09c29 AY |
1367 | void mvs_dev_gone(struct domain_device *dev) |
1368 | { | |
9dc9fd94 | 1369 | mvs_dev_gone_notify(dev); |
20b09c29 | 1370 | } |
b5762948 | 1371 | |
20b09c29 AY |
1372 | static void mvs_task_done(struct sas_task *task) |
1373 | { | |
1374 | if (!del_timer(&task->timer)) | |
1375 | return; | |
1376 | complete(&task->completion); | |
b5762948 | 1377 | } |
b5762948 | 1378 | |
20b09c29 | 1379 | static void mvs_tmf_timedout(unsigned long data) |
b5762948 | 1380 | { |
20b09c29 | 1381 | struct sas_task *task = (struct sas_task *)data; |
8f261aaf | 1382 | |
20b09c29 AY |
1383 | task->task_state_flags |= SAS_TASK_STATE_ABORTED; |
1384 | complete(&task->completion); | |
1385 | } | |
8f261aaf | 1386 | |
20b09c29 AY |
1387 | #define MVS_TASK_TIMEOUT 20 |
1388 | static int mvs_exec_internal_tmf_task(struct domain_device *dev, | |
1389 | void *parameter, u32 para_len, struct mvs_tmf_task *tmf) | |
1390 | { | |
1391 | int res, retry; | |
1392 | struct sas_task *task = NULL; | |
8f261aaf | 1393 | |
20b09c29 | 1394 | for (retry = 0; retry < 3; retry++) { |
4fcf812c | 1395 | task = sas_alloc_task(GFP_KERNEL); |
20b09c29 AY |
1396 | if (!task) |
1397 | return -ENOMEM; | |
8f261aaf | 1398 | |
20b09c29 AY |
1399 | task->dev = dev; |
1400 | task->task_proto = dev->tproto; | |
8f261aaf | 1401 | |
20b09c29 AY |
1402 | memcpy(&task->ssp_task, parameter, para_len); |
1403 | task->task_done = mvs_task_done; | |
8f261aaf | 1404 | |
20b09c29 AY |
1405 | task->timer.data = (unsigned long) task; |
1406 | task->timer.function = mvs_tmf_timedout; | |
1407 | task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ; | |
1408 | add_timer(&task->timer); | |
8f261aaf | 1409 | |
0b84b709 | 1410 | res = mvs_task_exec(task, 1, GFP_KERNEL, NULL, 1, tmf); |
8f261aaf | 1411 | |
20b09c29 AY |
1412 | if (res) { |
1413 | del_timer(&task->timer); | |
1414 | mv_printk("executing internel task failed:%d\n", res); | |
1415 | goto ex_err; | |
1416 | } | |
8f261aaf | 1417 | |
20b09c29 | 1418 | wait_for_completion(&task->completion); |
84fbd0ce | 1419 | res = TMF_RESP_FUNC_FAILED; |
20b09c29 AY |
1420 | /* Even TMF timed out, return direct. */ |
1421 | if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) { | |
1422 | if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) { | |
1423 | mv_printk("TMF task[%x] timeout.\n", tmf->tmf); | |
1424 | goto ex_err; | |
1425 | } | |
1426 | } | |
8f261aaf | 1427 | |
20b09c29 | 1428 | if (task->task_status.resp == SAS_TASK_COMPLETE && |
df64d3ca | 1429 | task->task_status.stat == SAM_STAT_GOOD) { |
20b09c29 AY |
1430 | res = TMF_RESP_FUNC_COMPLETE; |
1431 | break; | |
1432 | } | |
b5762948 | 1433 | |
20b09c29 AY |
1434 | if (task->task_status.resp == SAS_TASK_COMPLETE && |
1435 | task->task_status.stat == SAS_DATA_UNDERRUN) { | |
1436 | /* no error, but return the number of bytes of | |
1437 | * underrun */ | |
1438 | res = task->task_status.residual; | |
1439 | break; | |
1440 | } | |
b5762948 | 1441 | |
20b09c29 AY |
1442 | if (task->task_status.resp == SAS_TASK_COMPLETE && |
1443 | task->task_status.stat == SAS_DATA_OVERRUN) { | |
1444 | mv_dprintk("blocked task error.\n"); | |
1445 | res = -EMSGSIZE; | |
1446 | break; | |
1447 | } else { | |
1448 | mv_dprintk(" task to dev %016llx response: 0x%x " | |
1449 | "status 0x%x\n", | |
1450 | SAS_ADDR(dev->sas_addr), | |
1451 | task->task_status.resp, | |
1452 | task->task_status.stat); | |
4fcf812c | 1453 | sas_free_task(task); |
20b09c29 | 1454 | task = NULL; |
b5762948 | 1455 | |
dd4969a8 | 1456 | } |
dd4969a8 | 1457 | } |
20b09c29 AY |
1458 | ex_err: |
1459 | BUG_ON(retry == 3 && task != NULL); | |
4fcf812c | 1460 | sas_free_task(task); |
20b09c29 | 1461 | return res; |
dd4969a8 | 1462 | } |
b5762948 | 1463 | |
20b09c29 AY |
1464 | static int mvs_debug_issue_ssp_tmf(struct domain_device *dev, |
1465 | u8 *lun, struct mvs_tmf_task *tmf) | |
dd4969a8 | 1466 | { |
20b09c29 | 1467 | struct sas_ssp_task ssp_task; |
20b09c29 AY |
1468 | if (!(dev->tproto & SAS_PROTOCOL_SSP)) |
1469 | return TMF_RESP_FUNC_ESUPP; | |
b5762948 | 1470 | |
84fbd0ce | 1471 | memcpy(ssp_task.LUN, lun, 8); |
b5762948 | 1472 | |
20b09c29 AY |
1473 | return mvs_exec_internal_tmf_task(dev, &ssp_task, |
1474 | sizeof(ssp_task), tmf); | |
1475 | } | |
8f261aaf | 1476 | |
8f261aaf | 1477 | |
20b09c29 AY |
1478 | /* Standard mandates link reset for ATA (type 0) |
1479 | and hard reset for SSP (type 1) , only for RECOVERY */ | |
1480 | static int mvs_debug_I_T_nexus_reset(struct domain_device *dev) | |
1481 | { | |
1482 | int rc; | |
1483 | struct sas_phy *phy = sas_find_local_phy(dev); | |
1484 | int reset_type = (dev->dev_type == SATA_DEV || | |
1485 | (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1; | |
1486 | rc = sas_phy_reset(phy, reset_type); | |
1487 | msleep(2000); | |
1488 | return rc; | |
1489 | } | |
8f261aaf | 1490 | |
20b09c29 AY |
1491 | /* mandatory SAM-3 */ |
1492 | int mvs_lu_reset(struct domain_device *dev, u8 *lun) | |
1493 | { | |
1494 | unsigned long flags; | |
84fbd0ce | 1495 | int rc = TMF_RESP_FUNC_FAILED; |
20b09c29 | 1496 | struct mvs_tmf_task tmf_task; |
f9da3be5 | 1497 | struct mvs_device * mvi_dev = dev->lldd_dev; |
9870d9a2 | 1498 | struct mvs_info *mvi = mvi_dev->mvi_info; |
20b09c29 AY |
1499 | |
1500 | tmf_task.tmf = TMF_LU_RESET; | |
1501 | mvi_dev->dev_status = MVS_DEV_EH; | |
1502 | rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); | |
1503 | if (rc == TMF_RESP_FUNC_COMPLETE) { | |
20b09c29 | 1504 | spin_lock_irqsave(&mvi->lock, flags); |
84fbd0ce | 1505 | mvs_release_task(mvi, dev); |
20b09c29 | 1506 | spin_unlock_irqrestore(&mvi->lock, flags); |
dd4969a8 | 1507 | } |
20b09c29 AY |
1508 | /* If failed, fall-through I_T_Nexus reset */ |
1509 | mv_printk("%s for device[%x]:rc= %d\n", __func__, | |
1510 | mvi_dev->device_id, rc); | |
1511 | return rc; | |
1512 | } | |
8f261aaf | 1513 | |
20b09c29 AY |
1514 | int mvs_I_T_nexus_reset(struct domain_device *dev) |
1515 | { | |
1516 | unsigned long flags; | |
9dc9fd94 S |
1517 | int rc = TMF_RESP_FUNC_FAILED; |
1518 | struct mvs_device * mvi_dev = (struct mvs_device *)dev->lldd_dev; | |
9870d9a2 | 1519 | struct mvs_info *mvi = mvi_dev->mvi_info; |
20b09c29 AY |
1520 | |
1521 | if (mvi_dev->dev_status != MVS_DEV_EH) | |
1522 | return TMF_RESP_FUNC_COMPLETE; | |
84fbd0ce XY |
1523 | else |
1524 | mvi_dev->dev_status = MVS_DEV_NORMAL; | |
20b09c29 AY |
1525 | rc = mvs_debug_I_T_nexus_reset(dev); |
1526 | mv_printk("%s for device[%x]:rc= %d\n", | |
1527 | __func__, mvi_dev->device_id, rc); | |
1528 | ||
20b09c29 | 1529 | spin_lock_irqsave(&mvi->lock, flags); |
9dc9fd94 | 1530 | mvs_release_task(mvi, dev); |
20b09c29 AY |
1531 | spin_unlock_irqrestore(&mvi->lock, flags); |
1532 | ||
1533 | return rc; | |
1534 | } | |
1535 | /* optional SAM-3 */ | |
1536 | int mvs_query_task(struct sas_task *task) | |
1537 | { | |
1538 | u32 tag; | |
1539 | struct scsi_lun lun; | |
1540 | struct mvs_tmf_task tmf_task; | |
1541 | int rc = TMF_RESP_FUNC_FAILED; | |
1542 | ||
1543 | if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { | |
1544 | struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task; | |
1545 | struct domain_device *dev = task->dev; | |
9870d9a2 AY |
1546 | struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; |
1547 | struct mvs_info *mvi = mvi_dev->mvi_info; | |
20b09c29 AY |
1548 | |
1549 | int_to_scsilun(cmnd->device->lun, &lun); | |
1550 | rc = mvs_find_tag(mvi, task, &tag); | |
1551 | if (rc == 0) { | |
1552 | rc = TMF_RESP_FUNC_FAILED; | |
dd4969a8 | 1553 | return rc; |
20b09c29 | 1554 | } |
8f261aaf | 1555 | |
20b09c29 AY |
1556 | tmf_task.tmf = TMF_QUERY_TASK; |
1557 | tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag); | |
8f261aaf | 1558 | |
20b09c29 AY |
1559 | rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task); |
1560 | switch (rc) { | |
1561 | /* The task is still in Lun, release it then */ | |
1562 | case TMF_RESP_FUNC_SUCC: | |
1563 | /* The task is not in Lun or failed, reset the phy */ | |
1564 | case TMF_RESP_FUNC_FAILED: | |
1565 | case TMF_RESP_FUNC_COMPLETE: | |
1566 | break; | |
1567 | } | |
dd4969a8 | 1568 | } |
20b09c29 AY |
1569 | mv_printk("%s:rc= %d\n", __func__, rc); |
1570 | return rc; | |
8f261aaf KW |
1571 | } |
1572 | ||
20b09c29 AY |
1573 | /* mandatory SAM-3, still need free task/slot info */ |
1574 | int mvs_abort_task(struct sas_task *task) | |
8f261aaf | 1575 | { |
20b09c29 AY |
1576 | struct scsi_lun lun; |
1577 | struct mvs_tmf_task tmf_task; | |
1578 | struct domain_device *dev = task->dev; | |
9870d9a2 | 1579 | struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; |
24ae163e | 1580 | struct mvs_info *mvi; |
20b09c29 AY |
1581 | int rc = TMF_RESP_FUNC_FAILED; |
1582 | unsigned long flags; | |
1583 | u32 tag; | |
9870d9a2 | 1584 | |
9dc9fd94 | 1585 | if (!mvi_dev) { |
84fbd0ce XY |
1586 | mv_printk("Device has removed\n"); |
1587 | return TMF_RESP_FUNC_FAILED; | |
9dc9fd94 S |
1588 | } |
1589 | ||
24ae163e JS |
1590 | mvi = mvi_dev->mvi_info; |
1591 | ||
20b09c29 AY |
1592 | spin_lock_irqsave(&task->task_state_lock, flags); |
1593 | if (task->task_state_flags & SAS_TASK_STATE_DONE) { | |
1594 | spin_unlock_irqrestore(&task->task_state_lock, flags); | |
1595 | rc = TMF_RESP_FUNC_COMPLETE; | |
1596 | goto out; | |
dd4969a8 | 1597 | } |
20b09c29 | 1598 | spin_unlock_irqrestore(&task->task_state_lock, flags); |
9dc9fd94 | 1599 | mvi_dev->dev_status = MVS_DEV_EH; |
20b09c29 AY |
1600 | if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { |
1601 | struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task; | |
1602 | ||
1603 | int_to_scsilun(cmnd->device->lun, &lun); | |
1604 | rc = mvs_find_tag(mvi, task, &tag); | |
1605 | if (rc == 0) { | |
1606 | mv_printk("No such tag in %s\n", __func__); | |
1607 | rc = TMF_RESP_FUNC_FAILED; | |
1608 | return rc; | |
1609 | } | |
8f261aaf | 1610 | |
20b09c29 AY |
1611 | tmf_task.tmf = TMF_ABORT_TASK; |
1612 | tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag); | |
8f261aaf | 1613 | |
20b09c29 | 1614 | rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task); |
8f261aaf | 1615 | |
20b09c29 AY |
1616 | /* if successful, clear the task and callback forwards.*/ |
1617 | if (rc == TMF_RESP_FUNC_COMPLETE) { | |
1618 | u32 slot_no; | |
1619 | struct mvs_slot_info *slot; | |
8f261aaf | 1620 | |
20b09c29 | 1621 | if (task->lldd_task) { |
f9da3be5 | 1622 | slot = task->lldd_task; |
20b09c29 | 1623 | slot_no = (u32) (slot - mvi->slot_info); |
9dc9fd94 | 1624 | spin_lock_irqsave(&mvi->lock, flags); |
20b09c29 | 1625 | mvs_slot_complete(mvi, slot_no, 1); |
9dc9fd94 | 1626 | spin_unlock_irqrestore(&mvi->lock, flags); |
20b09c29 AY |
1627 | } |
1628 | } | |
9dc9fd94 | 1629 | |
20b09c29 AY |
1630 | } else if (task->task_proto & SAS_PROTOCOL_SATA || |
1631 | task->task_proto & SAS_PROTOCOL_STP) { | |
9dc9fd94 S |
1632 | if (SATA_DEV == dev->dev_type) { |
1633 | struct mvs_slot_info *slot = task->lldd_task; | |
9dc9fd94 | 1634 | u32 slot_idx = (u32)(slot - mvi->slot_info); |
84fbd0ce | 1635 | mv_dprintk("mvs_abort_task() mvi=%p task=%p " |
9dc9fd94 S |
1636 | "slot=%p slot_idx=x%x\n", |
1637 | mvi, task, slot, slot_idx); | |
84fbd0ce | 1638 | mvs_tmf_timedout((unsigned long)task); |
9dc9fd94 | 1639 | mvs_slot_task_free(mvi, task, slot, slot_idx); |
84fbd0ce XY |
1640 | rc = TMF_RESP_FUNC_COMPLETE; |
1641 | goto out; | |
9dc9fd94 | 1642 | } |
8f261aaf | 1643 | |
20b09c29 AY |
1644 | } |
1645 | out: | |
1646 | if (rc != TMF_RESP_FUNC_COMPLETE) | |
1647 | mv_printk("%s:rc= %d\n", __func__, rc); | |
dd4969a8 | 1648 | return rc; |
8f261aaf KW |
1649 | } |
1650 | ||
20b09c29 | 1651 | int mvs_abort_task_set(struct domain_device *dev, u8 *lun) |
8f261aaf | 1652 | { |
20b09c29 AY |
1653 | int rc = TMF_RESP_FUNC_FAILED; |
1654 | struct mvs_tmf_task tmf_task; | |
8f261aaf | 1655 | |
20b09c29 AY |
1656 | tmf_task.tmf = TMF_ABORT_TASK_SET; |
1657 | rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); | |
dd4969a8 | 1658 | |
20b09c29 | 1659 | return rc; |
8f261aaf KW |
1660 | } |
1661 | ||
20b09c29 | 1662 | int mvs_clear_aca(struct domain_device *dev, u8 *lun) |
8f261aaf | 1663 | { |
20b09c29 AY |
1664 | int rc = TMF_RESP_FUNC_FAILED; |
1665 | struct mvs_tmf_task tmf_task; | |
8f261aaf | 1666 | |
20b09c29 AY |
1667 | tmf_task.tmf = TMF_CLEAR_ACA; |
1668 | rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); | |
8f261aaf | 1669 | |
20b09c29 AY |
1670 | return rc; |
1671 | } | |
8f261aaf | 1672 | |
20b09c29 AY |
1673 | int mvs_clear_task_set(struct domain_device *dev, u8 *lun) |
1674 | { | |
1675 | int rc = TMF_RESP_FUNC_FAILED; | |
1676 | struct mvs_tmf_task tmf_task; | |
8f261aaf | 1677 | |
20b09c29 AY |
1678 | tmf_task.tmf = TMF_CLEAR_TASK_SET; |
1679 | rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); | |
8f261aaf | 1680 | |
20b09c29 | 1681 | return rc; |
dd4969a8 | 1682 | } |
8f261aaf | 1683 | |
20b09c29 AY |
1684 | static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task, |
1685 | u32 slot_idx, int err) | |
dd4969a8 | 1686 | { |
f9da3be5 | 1687 | struct mvs_device *mvi_dev = task->dev->lldd_dev; |
20b09c29 AY |
1688 | struct task_status_struct *tstat = &task->task_status; |
1689 | struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf; | |
df64d3ca | 1690 | int stat = SAM_STAT_GOOD; |
e9ff91b6 | 1691 | |
8f261aaf | 1692 | |
20b09c29 AY |
1693 | resp->frame_len = sizeof(struct dev_to_host_fis); |
1694 | memcpy(&resp->ending_fis[0], | |
1695 | SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset), | |
1696 | sizeof(struct dev_to_host_fis)); | |
1697 | tstat->buf_valid_size = sizeof(*resp); | |
9dc9fd94 S |
1698 | if (unlikely(err)) { |
1699 | if (unlikely(err & CMD_ISS_STPD)) | |
1700 | stat = SAS_OPEN_REJECT; | |
1701 | else | |
1702 | stat = SAS_PROTO_RESPONSE; | |
1703 | } | |
1704 | ||
20b09c29 | 1705 | return stat; |
8f261aaf KW |
1706 | } |
1707 | ||
a4632aae XY |
1708 | void mvs_set_sense(u8 *buffer, int len, int d_sense, |
1709 | int key, int asc, int ascq) | |
1710 | { | |
1711 | memset(buffer, 0, len); | |
1712 | ||
1713 | if (d_sense) { | |
1714 | /* Descriptor format */ | |
1715 | if (len < 4) { | |
1716 | mv_printk("Length %d of sense buffer too small to " | |
1717 | "fit sense %x:%x:%x", len, key, asc, ascq); | |
1718 | } | |
1719 | ||
1720 | buffer[0] = 0x72; /* Response Code */ | |
1721 | if (len > 1) | |
1722 | buffer[1] = key; /* Sense Key */ | |
1723 | if (len > 2) | |
1724 | buffer[2] = asc; /* ASC */ | |
1725 | if (len > 3) | |
1726 | buffer[3] = ascq; /* ASCQ */ | |
1727 | } else { | |
1728 | if (len < 14) { | |
1729 | mv_printk("Length %d of sense buffer too small to " | |
1730 | "fit sense %x:%x:%x", len, key, asc, ascq); | |
1731 | } | |
1732 | ||
1733 | buffer[0] = 0x70; /* Response Code */ | |
1734 | if (len > 2) | |
1735 | buffer[2] = key; /* Sense Key */ | |
1736 | if (len > 7) | |
1737 | buffer[7] = 0x0a; /* Additional Sense Length */ | |
1738 | if (len > 12) | |
1739 | buffer[12] = asc; /* ASC */ | |
1740 | if (len > 13) | |
1741 | buffer[13] = ascq; /* ASCQ */ | |
1742 | } | |
1743 | ||
1744 | return; | |
1745 | } | |
1746 | ||
1747 | void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu, | |
1748 | u8 key, u8 asc, u8 asc_q) | |
1749 | { | |
1750 | iu->datapres = 2; | |
1751 | iu->response_data_len = 0; | |
1752 | iu->sense_data_len = 17; | |
1753 | iu->status = 02; | |
1754 | mvs_set_sense(iu->sense_data, 17, 0, | |
1755 | key, asc, asc_q); | |
1756 | } | |
1757 | ||
20b09c29 AY |
1758 | static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task, |
1759 | u32 slot_idx) | |
8f261aaf | 1760 | { |
20b09c29 AY |
1761 | struct mvs_slot_info *slot = &mvi->slot_info[slot_idx]; |
1762 | int stat; | |
84fbd0ce | 1763 | u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response); |
a4632aae | 1764 | u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1)); |
20b09c29 AY |
1765 | u32 tfs = 0; |
1766 | enum mvs_port_type type = PORT_TYPE_SAS; | |
8f261aaf | 1767 | |
20b09c29 AY |
1768 | if (err_dw0 & CMD_ISS_STPD) |
1769 | MVS_CHIP_DISP->issue_stop(mvi, type, tfs); | |
1770 | ||
1771 | MVS_CHIP_DISP->command_active(mvi, slot_idx); | |
b5762948 | 1772 | |
df64d3ca | 1773 | stat = SAM_STAT_CHECK_CONDITION; |
dd4969a8 | 1774 | switch (task->task_proto) { |
dd4969a8 | 1775 | case SAS_PROTOCOL_SSP: |
a4632aae | 1776 | { |
20b09c29 | 1777 | stat = SAS_ABORTED_TASK; |
a4632aae XY |
1778 | if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) { |
1779 | struct ssp_response_iu *iu = slot->response + | |
1780 | sizeof(struct mvs_err_info); | |
1781 | mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01); | |
1782 | sas_ssp_task_response(mvi->dev, task, iu); | |
1783 | stat = SAM_STAT_CHECK_CONDITION; | |
1784 | } | |
1785 | if (err_dw1 & bit(31)) | |
1786 | mv_printk("reuse same slot, retry command.\n"); | |
20b09c29 | 1787 | break; |
a4632aae | 1788 | } |
20b09c29 | 1789 | case SAS_PROTOCOL_SMP: |
df64d3ca | 1790 | stat = SAM_STAT_CHECK_CONDITION; |
dd4969a8 | 1791 | break; |
20b09c29 | 1792 | |
dd4969a8 JG |
1793 | case SAS_PROTOCOL_SATA: |
1794 | case SAS_PROTOCOL_STP: | |
20b09c29 AY |
1795 | case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: |
1796 | { | |
20b09c29 | 1797 | task->ata_task.use_ncq = 0; |
84fbd0ce | 1798 | stat = SAS_PROTO_RESPONSE; |
9dc9fd94 | 1799 | mvs_sata_done(mvi, task, slot_idx, err_dw0); |
dd4969a8 | 1800 | } |
20b09c29 | 1801 | break; |
dd4969a8 JG |
1802 | default: |
1803 | break; | |
1804 | } | |
1805 | ||
20b09c29 | 1806 | return stat; |
e9ff91b6 KW |
1807 | } |
1808 | ||
20b09c29 | 1809 | int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags) |
b5762948 | 1810 | { |
20b09c29 AY |
1811 | u32 slot_idx = rx_desc & RXQ_SLOT_MASK; |
1812 | struct mvs_slot_info *slot = &mvi->slot_info[slot_idx]; | |
1813 | struct sas_task *task = slot->task; | |
1814 | struct mvs_device *mvi_dev = NULL; | |
1815 | struct task_status_struct *tstat; | |
9dc9fd94 S |
1816 | struct domain_device *dev; |
1817 | u32 aborted; | |
20b09c29 | 1818 | |
20b09c29 AY |
1819 | void *to; |
1820 | enum exec_status sts; | |
1821 | ||
9dc9fd94 | 1822 | if (unlikely(!task || !task->lldd_task || !task->dev)) |
20b09c29 AY |
1823 | return -1; |
1824 | ||
1825 | tstat = &task->task_status; | |
9dc9fd94 S |
1826 | dev = task->dev; |
1827 | mvi_dev = dev->lldd_dev; | |
b5762948 | 1828 | |
20b09c29 AY |
1829 | spin_lock(&task->task_state_lock); |
1830 | task->task_state_flags &= | |
1831 | ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR); | |
1832 | task->task_state_flags |= SAS_TASK_STATE_DONE; | |
1833 | /* race condition*/ | |
1834 | aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED; | |
1835 | spin_unlock(&task->task_state_lock); | |
1836 | ||
1837 | memset(tstat, 0, sizeof(*tstat)); | |
1838 | tstat->resp = SAS_TASK_COMPLETE; | |
1839 | ||
1840 | if (unlikely(aborted)) { | |
1841 | tstat->stat = SAS_ABORTED_TASK; | |
9dc9fd94 S |
1842 | if (mvi_dev && mvi_dev->running_req) |
1843 | mvi_dev->running_req--; | |
20b09c29 AY |
1844 | if (sas_protocol_ata(task->task_proto)) |
1845 | mvs_free_reg_set(mvi, mvi_dev); | |
1846 | ||
1847 | mvs_slot_task_free(mvi, task, slot, slot_idx); | |
1848 | return -1; | |
b5762948 JG |
1849 | } |
1850 | ||
e144f7ef | 1851 | /* when no device attaching, go ahead and complete by error handling*/ |
9dc9fd94 S |
1852 | if (unlikely(!mvi_dev || flags)) { |
1853 | if (!mvi_dev) | |
1854 | mv_dprintk("port has not device.\n"); | |
20b09c29 AY |
1855 | tstat->stat = SAS_PHY_DOWN; |
1856 | goto out; | |
1857 | } | |
b5762948 | 1858 | |
20b09c29 AY |
1859 | /* error info record present */ |
1860 | if (unlikely((rx_desc & RXQ_ERR) && (*(u64 *) slot->response))) { | |
84fbd0ce XY |
1861 | mv_dprintk("port %d slot %d rx_desc %X has error info" |
1862 | "%016llX.\n", slot->port->sas_port.id, slot_idx, | |
1863 | rx_desc, (u64)(*(u64 *)slot->response)); | |
20b09c29 | 1864 | tstat->stat = mvs_slot_err(mvi, task, slot_idx); |
9dc9fd94 | 1865 | tstat->resp = SAS_TASK_COMPLETE; |
20b09c29 | 1866 | goto out; |
b5762948 JG |
1867 | } |
1868 | ||
20b09c29 AY |
1869 | switch (task->task_proto) { |
1870 | case SAS_PROTOCOL_SSP: | |
1871 | /* hw says status == 0, datapres == 0 */ | |
1872 | if (rx_desc & RXQ_GOOD) { | |
df64d3ca | 1873 | tstat->stat = SAM_STAT_GOOD; |
20b09c29 AY |
1874 | tstat->resp = SAS_TASK_COMPLETE; |
1875 | } | |
1876 | /* response frame present */ | |
1877 | else if (rx_desc & RXQ_RSP) { | |
1878 | struct ssp_response_iu *iu = slot->response + | |
1879 | sizeof(struct mvs_err_info); | |
1880 | sas_ssp_task_response(mvi->dev, task, iu); | |
1881 | } else | |
df64d3ca | 1882 | tstat->stat = SAM_STAT_CHECK_CONDITION; |
20b09c29 | 1883 | break; |
b5762948 | 1884 | |
20b09c29 AY |
1885 | case SAS_PROTOCOL_SMP: { |
1886 | struct scatterlist *sg_resp = &task->smp_task.smp_resp; | |
df64d3ca | 1887 | tstat->stat = SAM_STAT_GOOD; |
20b09c29 AY |
1888 | to = kmap_atomic(sg_page(sg_resp), KM_IRQ0); |
1889 | memcpy(to + sg_resp->offset, | |
1890 | slot->response + sizeof(struct mvs_err_info), | |
1891 | sg_dma_len(sg_resp)); | |
1892 | kunmap_atomic(to, KM_IRQ0); | |
1893 | break; | |
1894 | } | |
8f261aaf | 1895 | |
20b09c29 AY |
1896 | case SAS_PROTOCOL_SATA: |
1897 | case SAS_PROTOCOL_STP: | |
1898 | case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: { | |
1899 | tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0); | |
1900 | break; | |
1901 | } | |
b5762948 | 1902 | |
20b09c29 | 1903 | default: |
df64d3ca | 1904 | tstat->stat = SAM_STAT_CHECK_CONDITION; |
20b09c29 AY |
1905 | break; |
1906 | } | |
9dc9fd94 S |
1907 | if (!slot->port->port_attached) { |
1908 | mv_dprintk("port %d has removed.\n", slot->port->sas_port.id); | |
1909 | tstat->stat = SAS_PHY_DOWN; | |
1910 | } | |
1911 | ||
b5762948 | 1912 | |
20b09c29 | 1913 | out: |
9dc9fd94 S |
1914 | if (mvi_dev && mvi_dev->running_req) { |
1915 | mvi_dev->running_req--; | |
1916 | if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req) | |
0f980a87 AY |
1917 | mvs_free_reg_set(mvi, mvi_dev); |
1918 | } | |
20b09c29 AY |
1919 | mvs_slot_task_free(mvi, task, slot, slot_idx); |
1920 | sts = tstat->stat; | |
8f261aaf | 1921 | |
20b09c29 AY |
1922 | spin_unlock(&mvi->lock); |
1923 | if (task->task_done) | |
1924 | task->task_done(task); | |
84fbd0ce | 1925 | |
20b09c29 | 1926 | spin_lock(&mvi->lock); |
b5762948 | 1927 | |
20b09c29 AY |
1928 | return sts; |
1929 | } | |
b5762948 | 1930 | |
9dc9fd94 | 1931 | void mvs_do_release_task(struct mvs_info *mvi, |
20b09c29 AY |
1932 | int phy_no, struct domain_device *dev) |
1933 | { | |
9dc9fd94 | 1934 | u32 slot_idx; |
20b09c29 AY |
1935 | struct mvs_phy *phy; |
1936 | struct mvs_port *port; | |
1937 | struct mvs_slot_info *slot, *slot2; | |
b5762948 | 1938 | |
20b09c29 AY |
1939 | phy = &mvi->phy[phy_no]; |
1940 | port = phy->port; | |
1941 | if (!port) | |
1942 | return; | |
9dc9fd94 S |
1943 | /* clean cmpl queue in case request is already finished */ |
1944 | mvs_int_rx(mvi, false); | |
1945 | ||
1946 | ||
b5762948 | 1947 | |
20b09c29 AY |
1948 | list_for_each_entry_safe(slot, slot2, &port->list, entry) { |
1949 | struct sas_task *task; | |
1950 | slot_idx = (u32) (slot - mvi->slot_info); | |
1951 | task = slot->task; | |
b5762948 | 1952 | |
20b09c29 AY |
1953 | if (dev && task->dev != dev) |
1954 | continue; | |
8f261aaf | 1955 | |
20b09c29 AY |
1956 | mv_printk("Release slot [%x] tag[%x], task [%p]:\n", |
1957 | slot_idx, slot->slot_tag, task); | |
9dc9fd94 | 1958 | MVS_CHIP_DISP->command_active(mvi, slot_idx); |
b5762948 | 1959 | |
20b09c29 | 1960 | mvs_slot_complete(mvi, slot_idx, 1); |
b5762948 | 1961 | } |
20b09c29 | 1962 | } |
b5762948 | 1963 | |
9dc9fd94 S |
1964 | void mvs_release_task(struct mvs_info *mvi, |
1965 | struct domain_device *dev) | |
1966 | { | |
1967 | int i, phyno[WIDE_PORT_MAX_PHY], num; | |
9dc9fd94 S |
1968 | num = mvs_find_dev_phyno(dev, phyno); |
1969 | for (i = 0; i < num; i++) | |
1970 | mvs_do_release_task(mvi, phyno[i], dev); | |
1971 | } | |
1972 | ||
20b09c29 AY |
1973 | static void mvs_phy_disconnected(struct mvs_phy *phy) |
1974 | { | |
1975 | phy->phy_attached = 0; | |
1976 | phy->att_dev_info = 0; | |
1977 | phy->att_dev_sas_addr = 0; | |
1978 | } | |
1979 | ||
1980 | static void mvs_work_queue(struct work_struct *work) | |
1981 | { | |
1982 | struct delayed_work *dw = container_of(work, struct delayed_work, work); | |
1983 | struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q); | |
1984 | struct mvs_info *mvi = mwq->mvi; | |
1985 | unsigned long flags; | |
a4632aae XY |
1986 | u32 phy_no = (unsigned long) mwq->data; |
1987 | struct sas_ha_struct *sas_ha = mvi->sas; | |
1988 | struct mvs_phy *phy = &mvi->phy[phy_no]; | |
1989 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
b5762948 | 1990 | |
20b09c29 AY |
1991 | spin_lock_irqsave(&mvi->lock, flags); |
1992 | if (mwq->handler & PHY_PLUG_EVENT) { | |
20b09c29 AY |
1993 | |
1994 | if (phy->phy_event & PHY_PLUG_OUT) { | |
1995 | u32 tmp; | |
1996 | struct sas_identify_frame *id; | |
1997 | id = (struct sas_identify_frame *)phy->frame_rcvd; | |
1998 | tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no); | |
1999 | phy->phy_event &= ~PHY_PLUG_OUT; | |
2000 | if (!(tmp & PHY_READY_MASK)) { | |
2001 | sas_phy_disconnected(sas_phy); | |
2002 | mvs_phy_disconnected(phy); | |
2003 | sas_ha->notify_phy_event(sas_phy, | |
2004 | PHYE_LOSS_OF_SIGNAL); | |
2005 | mv_dprintk("phy%d Removed Device\n", phy_no); | |
2006 | } else { | |
2007 | MVS_CHIP_DISP->detect_porttype(mvi, phy_no); | |
2008 | mvs_update_phyinfo(mvi, phy_no, 1); | |
2009 | mvs_bytes_dmaed(mvi, phy_no); | |
2010 | mvs_port_notify_formed(sas_phy, 0); | |
2011 | mv_dprintk("phy%d Attached Device\n", phy_no); | |
2012 | } | |
2013 | } | |
a4632aae XY |
2014 | } else if (mwq->handler & EXP_BRCT_CHG) { |
2015 | phy->phy_event &= ~EXP_BRCT_CHG; | |
2016 | sas_ha->notify_port_event(sas_phy, | |
2017 | PORTE_BROADCAST_RCVD); | |
2018 | mv_dprintk("phy%d Got Broadcast Change\n", phy_no); | |
20b09c29 AY |
2019 | } |
2020 | list_del(&mwq->entry); | |
2021 | spin_unlock_irqrestore(&mvi->lock, flags); | |
2022 | kfree(mwq); | |
2023 | } | |
8f261aaf | 2024 | |
20b09c29 AY |
2025 | static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler) |
2026 | { | |
2027 | struct mvs_wq *mwq; | |
2028 | int ret = 0; | |
2029 | ||
2030 | mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC); | |
2031 | if (mwq) { | |
2032 | mwq->mvi = mvi; | |
2033 | mwq->data = data; | |
2034 | mwq->handler = handler; | |
2035 | MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq); | |
2036 | list_add_tail(&mwq->entry, &mvi->wq_list); | |
2037 | schedule_delayed_work(&mwq->work_q, HZ * 2); | |
2038 | } else | |
2039 | ret = -ENOMEM; | |
2040 | ||
2041 | return ret; | |
2042 | } | |
b5762948 | 2043 | |
20b09c29 AY |
2044 | static void mvs_sig_time_out(unsigned long tphy) |
2045 | { | |
2046 | struct mvs_phy *phy = (struct mvs_phy *)tphy; | |
2047 | struct mvs_info *mvi = phy->mvi; | |
2048 | u8 phy_no; | |
2049 | ||
2050 | for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) { | |
2051 | if (&mvi->phy[phy_no] == phy) { | |
2052 | mv_dprintk("Get signature time out, reset phy %d\n", | |
2053 | phy_no+mvi->id*mvi->chip->n_phy); | |
a4632aae | 2054 | MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET); |
20b09c29 | 2055 | } |
b5762948 | 2056 | } |
20b09c29 | 2057 | } |
b5762948 | 2058 | |
20b09c29 AY |
2059 | void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events) |
2060 | { | |
2061 | u32 tmp; | |
20b09c29 | 2062 | struct mvs_phy *phy = &mvi->phy[phy_no]; |
8f261aaf | 2063 | |
20b09c29 | 2064 | phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no); |
84fbd0ce XY |
2065 | MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status); |
2066 | mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy, | |
20b09c29 | 2067 | MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no)); |
84fbd0ce | 2068 | mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy, |
20b09c29 | 2069 | phy->irq_status); |
8f261aaf | 2070 | |
20b09c29 AY |
2071 | /* |
2072 | * events is port event now , | |
2073 | * we need check the interrupt status which belongs to per port. | |
2074 | */ | |
b5762948 | 2075 | |
9dc9fd94 | 2076 | if (phy->irq_status & PHYEV_DCDR_ERR) { |
84fbd0ce | 2077 | mv_dprintk("phy %d STP decoding error.\n", |
9dc9fd94 S |
2078 | phy_no + mvi->id*mvi->chip->n_phy); |
2079 | } | |
20b09c29 AY |
2080 | |
2081 | if (phy->irq_status & PHYEV_POOF) { | |
84fbd0ce | 2082 | mdelay(500); |
20b09c29 AY |
2083 | if (!(phy->phy_event & PHY_PLUG_OUT)) { |
2084 | int dev_sata = phy->phy_type & PORT_TYPE_SATA; | |
2085 | int ready; | |
9dc9fd94 | 2086 | mvs_do_release_task(mvi, phy_no, NULL); |
20b09c29 | 2087 | phy->phy_event |= PHY_PLUG_OUT; |
9dc9fd94 | 2088 | MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1); |
20b09c29 AY |
2089 | mvs_handle_event(mvi, |
2090 | (void *)(unsigned long)phy_no, | |
2091 | PHY_PLUG_EVENT); | |
2092 | ready = mvs_is_phy_ready(mvi, phy_no); | |
20b09c29 AY |
2093 | if (ready || dev_sata) { |
2094 | if (MVS_CHIP_DISP->stp_reset) | |
2095 | MVS_CHIP_DISP->stp_reset(mvi, | |
2096 | phy_no); | |
2097 | else | |
2098 | MVS_CHIP_DISP->phy_reset(mvi, | |
a4632aae | 2099 | phy_no, MVS_SOFT_RESET); |
20b09c29 AY |
2100 | return; |
2101 | } | |
2102 | } | |
2103 | } | |
b5762948 | 2104 | |
20b09c29 AY |
2105 | if (phy->irq_status & PHYEV_COMWAKE) { |
2106 | tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no); | |
2107 | MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no, | |
2108 | tmp | PHYEV_SIG_FIS); | |
2109 | if (phy->timer.function == NULL) { | |
2110 | phy->timer.data = (unsigned long)phy; | |
2111 | phy->timer.function = mvs_sig_time_out; | |
84fbd0ce | 2112 | phy->timer.expires = jiffies + 5*HZ; |
20b09c29 AY |
2113 | add_timer(&phy->timer); |
2114 | } | |
2115 | } | |
2116 | if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) { | |
2117 | phy->phy_status = mvs_is_phy_ready(mvi, phy_no); | |
20b09c29 AY |
2118 | mv_dprintk("notify plug in on phy[%d]\n", phy_no); |
2119 | if (phy->phy_status) { | |
2120 | mdelay(10); | |
2121 | MVS_CHIP_DISP->detect_porttype(mvi, phy_no); | |
2122 | if (phy->phy_type & PORT_TYPE_SATA) { | |
2123 | tmp = MVS_CHIP_DISP->read_port_irq_mask( | |
2124 | mvi, phy_no); | |
2125 | tmp &= ~PHYEV_SIG_FIS; | |
2126 | MVS_CHIP_DISP->write_port_irq_mask(mvi, | |
2127 | phy_no, tmp); | |
2128 | } | |
2129 | mvs_update_phyinfo(mvi, phy_no, 0); | |
9dc9fd94 | 2130 | if (phy->phy_type & PORT_TYPE_SAS) { |
a4632aae | 2131 | MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE); |
9dc9fd94 S |
2132 | mdelay(10); |
2133 | } | |
2134 | ||
20b09c29 AY |
2135 | mvs_bytes_dmaed(mvi, phy_no); |
2136 | /* whether driver is going to handle hot plug */ | |
2137 | if (phy->phy_event & PHY_PLUG_OUT) { | |
a4632aae | 2138 | mvs_port_notify_formed(&phy->sas_phy, 0); |
20b09c29 AY |
2139 | phy->phy_event &= ~PHY_PLUG_OUT; |
2140 | } | |
2141 | } else { | |
2142 | mv_dprintk("plugin interrupt but phy%d is gone\n", | |
2143 | phy_no + mvi->id*mvi->chip->n_phy); | |
2144 | } | |
2145 | } else if (phy->irq_status & PHYEV_BROAD_CH) { | |
84fbd0ce | 2146 | mv_dprintk("phy %d broadcast change.\n", |
20b09c29 | 2147 | phy_no + mvi->id*mvi->chip->n_phy); |
a4632aae XY |
2148 | mvs_handle_event(mvi, (void *)(unsigned long)phy_no, |
2149 | EXP_BRCT_CHG); | |
20b09c29 | 2150 | } |
b5762948 JG |
2151 | } |
2152 | ||
20b09c29 | 2153 | int mvs_int_rx(struct mvs_info *mvi, bool self_clear) |
b5762948 | 2154 | { |
20b09c29 AY |
2155 | u32 rx_prod_idx, rx_desc; |
2156 | bool attn = false; | |
b5762948 | 2157 | |
20b09c29 AY |
2158 | /* the first dword in the RX ring is special: it contains |
2159 | * a mirror of the hardware's RX producer index, so that | |
2160 | * we don't have to stall the CPU reading that register. | |
2161 | * The actual RX ring is offset by one dword, due to this. | |
2162 | */ | |
2163 | rx_prod_idx = mvi->rx_cons; | |
2164 | mvi->rx_cons = le32_to_cpu(mvi->rx[0]); | |
2165 | if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */ | |
2166 | return 0; | |
b5762948 | 2167 | |
20b09c29 AY |
2168 | /* The CMPL_Q may come late, read from register and try again |
2169 | * note: if coalescing is enabled, | |
2170 | * it will need to read from register every time for sure | |
2171 | */ | |
2172 | if (unlikely(mvi->rx_cons == rx_prod_idx)) | |
2173 | mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK; | |
2174 | ||
2175 | if (mvi->rx_cons == rx_prod_idx) | |
2176 | return 0; | |
2177 | ||
2178 | while (mvi->rx_cons != rx_prod_idx) { | |
2179 | /* increment our internal RX consumer pointer */ | |
2180 | rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1); | |
2181 | rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]); | |
2182 | ||
2183 | if (likely(rx_desc & RXQ_DONE)) | |
2184 | mvs_slot_complete(mvi, rx_desc, 0); | |
2185 | if (rx_desc & RXQ_ATTN) { | |
2186 | attn = true; | |
2187 | } else if (rx_desc & RXQ_ERR) { | |
2188 | if (!(rx_desc & RXQ_DONE)) | |
2189 | mvs_slot_complete(mvi, rx_desc, 0); | |
2190 | } else if (rx_desc & RXQ_SLOT_RESET) { | |
2191 | mvs_slot_free(mvi, rx_desc); | |
2192 | } | |
2193 | } | |
2194 | ||
2195 | if (attn && self_clear) | |
2196 | MVS_CHIP_DISP->int_full(mvi); | |
2197 | return 0; | |
b5762948 JG |
2198 | } |
2199 |