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[SCSI] sym53c8xx: convert to use the data buffer accessors
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / ncr53c8xx.c
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1da177e4
LT		 1/******************************************************************************
2** Device driver for the PCI-SCSI NCR538XX controller family.
3**
4** Copyright (C) 1994 Wolfgang Stanglmeier
5**
6** This program is free software; you can redistribute it and/or modify
7** it under the terms of the GNU General Public License as published by
8** the Free Software Foundation; either version 2 of the License, or
9** (at your option) any later version.
10**
11** This program is distributed in the hope that it will be useful,
12** but WITHOUT ANY WARRANTY; without even the implied warranty of
13** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14** GNU General Public License for more details.
15**
16** You should have received a copy of the GNU General Public License
17** along with this program; if not, write to the Free Software
18** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19**
20**-----------------------------------------------------------------------------
21**
22** This driver has been ported to Linux from the FreeBSD NCR53C8XX driver
23** and is currently maintained by
24**
25** Gerard Roudier <groudier@free.fr>
26**
27** Being given that this driver originates from the FreeBSD version, and
28** in order to keep synergy on both, any suggested enhancements and corrections
29** received on Linux are automatically a potential candidate for the FreeBSD
30** version.
31**
32** The original driver has been written for 386bsd and FreeBSD by
33** Wolfgang Stanglmeier <wolf@cologne.de>
34** Stefan Esser <se@mi.Uni-Koeln.de>
35**
36** And has been ported to NetBSD by
37** Charles M. Hannum <mycroft@gnu.ai.mit.edu>
38**
39**-----------------------------------------------------------------------------
40**
41** Brief history
42**
43** December 10 1995 by Gerard Roudier:
44** Initial port to Linux.
45**
46** June 23 1996 by Gerard Roudier:
47** Support for 64 bits architectures (Alpha).
48**
49** November 30 1996 by Gerard Roudier:
50** Support for Fast-20 scsi.
51** Support for large DMA fifo and 128 dwords bursting.
52**
53** February 27 1997 by Gerard Roudier:
54** Support for Fast-40 scsi.
55** Support for on-Board RAM.
56**
57** May 3 1997 by Gerard Roudier:
58** Full support for scsi scripts instructions pre-fetching.
59**
60** May 19 1997 by Richard Waltham <dormouse@farsrobt.demon.co.uk>:
61** Support for NvRAM detection and reading.
62**
63** August 18 1997 by Cort <cort@cs.nmt.edu>:
64** Support for Power/PC (Big Endian).
65**
66** June 20 1998 by Gerard Roudier
67** Support for up to 64 tags per lun.
68** O(1) everywhere (C and SCRIPTS) for normal cases.
69** Low PCI traffic for command handling when on-chip RAM is present.
70** Aggressive SCSI SCRIPTS optimizations.
71**
b0dc1db1
MW		 72** 2005 by Matthew Wilcox and James Bottomley
73** PCI-ectomy. This driver now supports only the 720 chip (see the
74** NCR_Q720 and zalon drivers for the bus probe logic).
75**
1da177e4
LT		 76*******************************************************************************
77*/
78
79/*
80** Supported SCSI-II features:
81** Synchronous negotiation
82** Wide negotiation (depends on the NCR Chip)
83** Enable disconnection
84** Tagged command queuing
85** Parity checking
86** Etc...
87**
88** Supported NCR/SYMBIOS chips:
89** 53C720 (Wide, Fast SCSI-2, intfly problems)
90*/
91
92/* Name and version of the driver */
93#define SCSI_NCR_DRIVER_NAME "ncr53c8xx-3.4.3g"
94
95#define SCSI_NCR_DEBUG_FLAGS (0)
96
1da177e4
LT		 97#include <linux/blkdev.h>
98#include <linux/delay.h>
99#include <linux/dma-mapping.h>
100#include <linux/errno.h>
101#include <linux/init.h>
102#include <linux/interrupt.h>
103#include <linux/ioport.h>
104#include <linux/mm.h>
105#include <linux/module.h>
106#include <linux/sched.h>
107#include <linux/signal.h>
108#include <linux/spinlock.h>
109#include <linux/stat.h>
110#include <linux/string.h>
111#include <linux/time.h>
112#include <linux/timer.h>
113#include <linux/types.h>
114
115#include <asm/dma.h>
116#include <asm/io.h>
117#include <asm/system.h>
118
119#include <scsi/scsi.h>
120#include <scsi/scsi_cmnd.h>
b0dc1db1 121#include <scsi/scsi_dbg.h>
1da177e4
LT		 122#include <scsi/scsi_device.h>
123#include <scsi/scsi_tcq.h>
124#include <scsi/scsi_transport.h>
125#include <scsi/scsi_transport_spi.h>
126
127#include "ncr53c8xx.h"
128
1da177e4
LT		 129#define NAME53C8XX "ncr53c8xx"
130
19c65091
MW		 131/*==========================================================
132**
133** Debugging tags
134**
135**==========================================================
136*/
137
138#define DEBUG_ALLOC (0x0001)
139#define DEBUG_PHASE (0x0002)
140#define DEBUG_QUEUE (0x0008)
141#define DEBUG_RESULT (0x0010)
142#define DEBUG_POINTER (0x0020)
143#define DEBUG_SCRIPT (0x0040)
144#define DEBUG_TINY (0x0080)
145#define DEBUG_TIMING (0x0100)
146#define DEBUG_NEGO (0x0200)
147#define DEBUG_TAGS (0x0400)
148#define DEBUG_SCATTER (0x0800)
149#define DEBUG_IC (0x1000)
150
151/*
152** Enable/Disable debug messages.
153** Can be changed at runtime too.
154*/
155
156#ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
157static int ncr_debug = SCSI_NCR_DEBUG_FLAGS;
158 #define DEBUG_FLAGS ncr_debug
159#else
160 #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS
161#endif
162
163static inline struct list_head *ncr_list_pop(struct list_head *head)
164{
165 if (!list_empty(head)) {
166 struct list_head *elem = head->next;
167
168 list_del(elem);
169 return elem;
170 }
171
172 return NULL;
173}
174
175/*==========================================================
176**
177** Simple power of two buddy-like allocator.
178**
179** This simple code is not intended to be fast, but to
180** provide power of 2 aligned memory allocations.
181** Since the SCRIPTS processor only supplies 8 bit
182** arithmetic, this allocator allows simple and fast
183** address calculations from the SCRIPTS code.
184** In addition, cache line alignment is guaranteed for
185** power of 2 cache line size.
186** Enhanced in linux-2.3.44 to provide a memory pool
187** per pcidev to support dynamic dma mapping. (I would
0779bf2d 188** have preferred a real bus abstraction, btw).
19c65091
MW		 189**
190**==========================================================
191*/
192
193#define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
194#if PAGE_SIZE >= 8192
195#define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
196#else
197#define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */
198#endif
199#define MEMO_FREE_UNUSED /* Free unused pages immediately */
200#define MEMO_WARN 1
201#define MEMO_GFP_FLAGS GFP_ATOMIC
202#define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
203#define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
204#define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
205
206typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
207typedef struct device *m_bush_t; /* Something that addresses DMAable */
208
209typedef struct m_link { /* Link between free memory chunks */
210 struct m_link *next;
211} m_link_s;
212
213typedef struct m_vtob { /* Virtual to Bus address translation */
214 struct m_vtob *next;
215 m_addr_t vaddr;
216 m_addr_t baddr;
217} m_vtob_s;
218#define VTOB_HASH_SHIFT 5
219#define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
220#define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
221#define VTOB_HASH_CODE(m) \
222 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
223
224typedef struct m_pool { /* Memory pool of a given kind */
225 m_bush_t bush;
226 m_addr_t (*getp)(struct m_pool *);
227 void (*freep)(struct m_pool *, m_addr_t);
228 int nump;
229 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
230 struct m_pool *next;
231 struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1];
232} m_pool_s;
233
234static void *___m_alloc(m_pool_s *mp, int size)
235{
236 int i = 0;
237 int s = (1 << MEMO_SHIFT);
238 int j;
239 m_addr_t a;
240 m_link_s *h = mp->h;
241
242 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
243 return NULL;
244
245 while (size > s) {
246 s <<= 1;
247 ++i;
248 }
249
250 j = i;
251 while (!h[j].next) {
252 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
253 h[j].next = (m_link_s *)mp->getp(mp);
254 if (h[j].next)
255 h[j].next->next = NULL;
256 break;
257 }
258 ++j;
259 s <<= 1;
260 }
261 a = (m_addr_t) h[j].next;
262 if (a) {
263 h[j].next = h[j].next->next;
264 while (j > i) {
265 j -= 1;
266 s >>= 1;
267 h[j].next = (m_link_s *) (a+s);
268 h[j].next->next = NULL;
269 }
270 }
271#ifdef DEBUG
272 printk("___m_alloc(%d) = %p\n", size, (void *) a);
273#endif
274 return (void *) a;
275}
276
277static void ___m_free(m_pool_s *mp, void *ptr, int size)
278{
279 int i = 0;
280 int s = (1 << MEMO_SHIFT);
281 m_link_s *q;
282 m_addr_t a, b;
283 m_link_s *h = mp->h;
284
285#ifdef DEBUG
286 printk("___m_free(%p, %d)\n", ptr, size);
287#endif
288
289 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
290 return;
291
292 while (size > s) {
293 s <<= 1;
294 ++i;
295 }
296
297 a = (m_addr_t) ptr;
298
299 while (1) {
300#ifdef MEMO_FREE_UNUSED
301 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
302 mp->freep(mp, a);
303 break;
304 }
305#endif
306 b = a ^ s;
307 q = &h[i];
308 while (q->next && q->next != (m_link_s *) b) {
309 q = q->next;
310 }
311 if (!q->next) {
312 ((m_link_s *) a)->next = h[i].next;
313 h[i].next = (m_link_s *) a;
314 break;
315 }
316 q->next = q->next->next;
317 a = a & b;
318 s <<= 1;
319 ++i;
320 }
321}
322
323static DEFINE_SPINLOCK(ncr53c8xx_lock);
324
325static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags)
326{
327 void *p;
328
329 p = ___m_alloc(mp, size);
330
331 if (DEBUG_FLAGS & DEBUG_ALLOC)
332 printk ("new %-10s[%4d] @%p.\n", name, size, p);
333
334 if (p)
335 memset(p, 0, size);
336 else if (uflags & MEMO_WARN)
337 printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size);
338
339 return p;
340}
341
342#define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN)
343
344static void __m_free(m_pool_s *mp, void *ptr, int size, char *name)
345{
346 if (DEBUG_FLAGS & DEBUG_ALLOC)
347 printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
348
349 ___m_free(mp, ptr, size);
350
351}
352
353/*
354 * With pci bus iommu support, we use a default pool of unmapped memory
355 * for memory we donnot need to DMA from/to and one pool per pcidev for
356 * memory accessed by the PCI chip. `mp0' is the default not DMAable pool.
357 */
358
359static m_addr_t ___mp0_getp(m_pool_s *mp)
360{
361 m_addr_t m = __get_free_pages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER);
362 if (m)
363 ++mp->nump;
364 return m;
365}
366
367static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
368{
369 free_pages(m, MEMO_PAGE_ORDER);
370 --mp->nump;
371}
372
373static m_pool_s mp0 = {NULL, ___mp0_getp, ___mp0_freep};
374
375/*
376 * DMAable pools.
377 */
378
379/*
380 * With pci bus iommu support, we maintain one pool per pcidev and a
381 * hashed reverse table for virtual to bus physical address translations.
382 */
383static m_addr_t ___dma_getp(m_pool_s *mp)
384{
385 m_addr_t vp;
386 m_vtob_s *vbp;
387
388 vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB");
389 if (vbp) {
390 dma_addr_t daddr;
391 vp = (m_addr_t) dma_alloc_coherent(mp->bush,
392 PAGE_SIZE<<MEMO_PAGE_ORDER,
393 &daddr, GFP_ATOMIC);
394 if (vp) {
395 int hc = VTOB_HASH_CODE(vp);
396 vbp->vaddr = vp;
397 vbp->baddr = daddr;
398 vbp->next = mp->vtob[hc];
399 mp->vtob[hc] = vbp;
400 ++mp->nump;
401 return vp;
402 }
403 }
404 if (vbp)
405 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
406 return 0;
407}
408
409static void ___dma_freep(m_pool_s *mp, m_addr_t m)
410{
411 m_vtob_s **vbpp, *vbp;
412 int hc = VTOB_HASH_CODE(m);
413
414 vbpp = &mp->vtob[hc];
415 while (*vbpp && (*vbpp)->vaddr != m)
416 vbpp = &(*vbpp)->next;
417 if (*vbpp) {
418 vbp = *vbpp;
419 *vbpp = (*vbpp)->next;
420 dma_free_coherent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER,
421 (void *)vbp->vaddr, (dma_addr_t)vbp->baddr);
422 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
423 --mp->nump;
424 }
425}
426
427static inline m_pool_s *___get_dma_pool(m_bush_t bush)
428{
429 m_pool_s *mp;
430 for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next);
431 return mp;
432}
433
434static m_pool_s *___cre_dma_pool(m_bush_t bush)
435{
436 m_pool_s *mp;
437 mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL");
438 if (mp) {
439 memset(mp, 0, sizeof(*mp));
440 mp->bush = bush;
441 mp->getp = ___dma_getp;
442 mp->freep = ___dma_freep;
443 mp->next = mp0.next;
444 mp0.next = mp;
445 }
446 return mp;
447}
448
449static void ___del_dma_pool(m_pool_s *p)
450{
451 struct m_pool **pp = &mp0.next;
452
453 while (*pp && *pp != p)
454 pp = &(*pp)->next;
455 if (*pp) {
456 *pp = (*pp)->next;
457 __m_free(&mp0, p, sizeof(*p), "MPOOL");
458 }
459}
460
461static void *__m_calloc_dma(m_bush_t bush, int size, char *name)
462{
463 u_long flags;
464 struct m_pool *mp;
465 void *m = NULL;
466
467 spin_lock_irqsave(&ncr53c8xx_lock, flags);
468 mp = ___get_dma_pool(bush);
469 if (!mp)
470 mp = ___cre_dma_pool(bush);
471 if (mp)
472 m = __m_calloc(mp, size, name);
473 if (mp && !mp->nump)
474 ___del_dma_pool(mp);
475 spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
476
477 return m;
478}
479
480static void __m_free_dma(m_bush_t bush, void *m, int size, char *name)
481{
482 u_long flags;
483 struct m_pool *mp;
484
485 spin_lock_irqsave(&ncr53c8xx_lock, flags);
486 mp = ___get_dma_pool(bush);
487 if (mp)
488 __m_free(mp, m, size, name);
489 if (mp && !mp->nump)
490 ___del_dma_pool(mp);
491 spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
492}
493
494static m_addr_t __vtobus(m_bush_t bush, void *m)
495{
496 u_long flags;
497 m_pool_s *mp;
498 int hc = VTOB_HASH_CODE(m);
499 m_vtob_s *vp = NULL;
500 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
501
502 spin_lock_irqsave(&ncr53c8xx_lock, flags);
503 mp = ___get_dma_pool(bush);
504 if (mp) {
505 vp = mp->vtob[hc];
506 while (vp && (m_addr_t) vp->vaddr != a)
507 vp = vp->next;
508 }
509 spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
510 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
511}
512
513#define _m_calloc_dma(np, s, n) __m_calloc_dma(np->dev, s, n)
514#define _m_free_dma(np, p, s, n) __m_free_dma(np->dev, p, s, n)
515#define m_calloc_dma(s, n) _m_calloc_dma(np, s, n)
516#define m_free_dma(p, s, n) _m_free_dma(np, p, s, n)
517#define _vtobus(np, p) __vtobus(np->dev, p)
518#define vtobus(p) _vtobus(np, p)
519
520/*
521 * Deal with DMA mapping/unmapping.
522 */
523
524/* To keep track of the dma mapping (sg/single) that has been set */
525#define __data_mapped SCp.phase
526#define __data_mapping SCp.have_data_in
527
528static void __unmap_scsi_data(struct device *dev, struct scsi_cmnd *cmd)
529{
530 switch(cmd->__data_mapped) {
531 case 2:
5d5ff44f 532 dma_unmap_sg(dev, cmd->request_buffer, cmd->use_sg,
19c65091
MW		 533 cmd->sc_data_direction);
534 break;
535 case 1:
536 dma_unmap_single(dev, cmd->__data_mapping,
537 cmd->request_bufflen,
538 cmd->sc_data_direction);
539 break;
540 }
541 cmd->__data_mapped = 0;
542}
543
544static u_long __map_scsi_single_data(struct device *dev, struct scsi_cmnd *cmd)
545{
546 dma_addr_t mapping;
547
548 if (cmd->request_bufflen == 0)
549 return 0;
550
551 mapping = dma_map_single(dev, cmd->request_buffer,
552 cmd->request_bufflen,
553 cmd->sc_data_direction);
554 cmd->__data_mapped = 1;
555 cmd->__data_mapping = mapping;
556
557 return mapping;
558}
559
560static int __map_scsi_sg_data(struct device *dev, struct scsi_cmnd *cmd)
561{
562 int use_sg;
563
564 if (cmd->use_sg == 0)
565 return 0;
566
5d5ff44f 567 use_sg = dma_map_sg(dev, cmd->request_buffer, cmd->use_sg,
19c65091
MW		 568 cmd->sc_data_direction);
569 cmd->__data_mapped = 2;
570 cmd->__data_mapping = use_sg;
571
572 return use_sg;
573}
574
575#define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->dev, cmd)
576#define map_scsi_single_data(np, cmd) __map_scsi_single_data(np->dev, cmd)
577#define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->dev, cmd)
578
579/*==========================================================
580**
581** Driver setup.
582**
583** This structure is initialized from linux config
584** options. It can be overridden at boot-up by the boot
585** command line.
586**
587**==========================================================
588*/
589static struct ncr_driver_setup
590 driver_setup = SCSI_NCR_DRIVER_SETUP;
591
db3a8815 592#ifndef MODULE
19c65091
MW		 593#ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
594static struct ncr_driver_setup
595 driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP;
596#endif
db3a8815 597#endif /* !MODULE */
19c65091
MW		 598
599#define initverbose (driver_setup.verbose)
600#define bootverbose (np->verbose)
601
602
603/*===================================================================
604**
605** Driver setup from the boot command line
606**
607**===================================================================
608*/
609
610#ifdef MODULE
611#define ARG_SEP ' '
612#else
613#define ARG_SEP ','
614#endif
615
616#define OPT_TAGS 1
617#define OPT_MASTER_PARITY 2
618#define OPT_SCSI_PARITY 3
619#define OPT_DISCONNECTION 4
620#define OPT_SPECIAL_FEATURES 5
621#define OPT_UNUSED_1 6
622#define OPT_FORCE_SYNC_NEGO 7
623#define OPT_REVERSE_PROBE 8
624#define OPT_DEFAULT_SYNC 9
625#define OPT_VERBOSE 10
626#define OPT_DEBUG 11
627#define OPT_BURST_MAX 12
628#define OPT_LED_PIN 13
629#define OPT_MAX_WIDE 14
630#define OPT_SETTLE_DELAY 15
631#define OPT_DIFF_SUPPORT 16
632#define OPT_IRQM 17
633#define OPT_PCI_FIX_UP 18
634#define OPT_BUS_CHECK 19
635#define OPT_OPTIMIZE 20
636#define OPT_RECOVERY 21
637#define OPT_SAFE_SETUP 22
638#define OPT_USE_NVRAM 23
639#define OPT_EXCLUDE 24
640#define OPT_HOST_ID 25
641
642#ifdef SCSI_NCR_IARB_SUPPORT
643#define OPT_IARB 26
644#endif
645
db3a8815
JG		 646#ifdef MODULE
647#define ARG_SEP ' '
648#else
649#define ARG_SEP ','
650#endif
651
652#ifndef MODULE
19c65091
MW		 653static char setup_token[] __initdata =
654 "tags:" "mpar:"
655 "spar:" "disc:"
656 "specf:" "ultra:"
657 "fsn:" "revprob:"
658 "sync:" "verb:"
659 "debug:" "burst:"
660 "led:" "wide:"
661 "settle:" "diff:"
662 "irqm:" "pcifix:"
663 "buschk:" "optim:"
664 "recovery:"
665 "safe:" "nvram:"
666 "excl:" "hostid:"
667#ifdef SCSI_NCR_IARB_SUPPORT
668 "iarb:"
669#endif
670 ; /* DONNOT REMOVE THIS ';' */
671
19c65091
MW		 672static int __init get_setup_token(char *p)
673{
674 char *cur = setup_token;
675 char *pc;
676 int i = 0;
677
678 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
679 ++pc;
680 ++i;
681 if (!strncmp(p, cur, pc - cur))
682 return i;
683 cur = pc;
684 }
685 return 0;
686}
687
19c65091
MW		 688static int __init sym53c8xx__setup(char *str)
689{
690#ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
691 char *cur = str;
692 char *pc, *pv;
693 int i, val, c;
694 int xi = 0;
695
696 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
697 char *pe;
698
699 val = 0;
700 pv = pc;
701 c = *++pv;
702
703 if (c == 'n')
704 val = 0;
705 else if (c == 'y')
706 val = 1;
707 else
708 val = (int) simple_strtoul(pv, &pe, 0);
709
710 switch (get_setup_token(cur)) {
711 case OPT_TAGS:
712 driver_setup.default_tags = val;
713 if (pe && *pe == '/') {
714 i = 0;
715 while (*pe && *pe != ARG_SEP &&
716 i < sizeof(driver_setup.tag_ctrl)-1) {
717 driver_setup.tag_ctrl[i++] = *pe++;
718 }
719 driver_setup.tag_ctrl[i] = '\0';
720 }
721 break;
722 case OPT_MASTER_PARITY:
723 driver_setup.master_parity = val;
724 break;
725 case OPT_SCSI_PARITY:
726 driver_setup.scsi_parity = val;
727 break;
728 case OPT_DISCONNECTION:
729 driver_setup.disconnection = val;
730 break;
731 case OPT_SPECIAL_FEATURES:
732 driver_setup.special_features = val;
733 break;
734 case OPT_FORCE_SYNC_NEGO:
735 driver_setup.force_sync_nego = val;
736 break;
737 case OPT_REVERSE_PROBE:
738 driver_setup.reverse_probe = val;
739 break;
740 case OPT_DEFAULT_SYNC:
741 driver_setup.default_sync = val;
742 break;
743 case OPT_VERBOSE:
744 driver_setup.verbose = val;
745 break;
746 case OPT_DEBUG:
747 driver_setup.debug = val;
748 break;
749 case OPT_BURST_MAX:
750 driver_setup.burst_max = val;
751 break;
752 case OPT_LED_PIN:
753 driver_setup.led_pin = val;
754 break;
755 case OPT_MAX_WIDE:
756 driver_setup.max_wide = val? 1:0;
757 break;
758 case OPT_SETTLE_DELAY:
759 driver_setup.settle_delay = val;
760 break;
761 case OPT_DIFF_SUPPORT:
762 driver_setup.diff_support = val;
763 break;
764 case OPT_IRQM:
765 driver_setup.irqm = val;
766 break;
767 case OPT_PCI_FIX_UP:
768 driver_setup.pci_fix_up = val;
769 break;
770 case OPT_BUS_CHECK:
771 driver_setup.bus_check = val;
772 break;
773 case OPT_OPTIMIZE:
774 driver_setup.optimize = val;
775 break;
776 case OPT_RECOVERY:
777 driver_setup.recovery = val;
778 break;
779 case OPT_USE_NVRAM:
780 driver_setup.use_nvram = val;
781 break;
782 case OPT_SAFE_SETUP:
783 memcpy(&driver_setup, &driver_safe_setup,
784 sizeof(driver_setup));
785 break;
786 case OPT_EXCLUDE:
787 if (xi < SCSI_NCR_MAX_EXCLUDES)
788 driver_setup.excludes[xi++] = val;
789 break;
790 case OPT_HOST_ID:
791 driver_setup.host_id = val;
792 break;
793#ifdef SCSI_NCR_IARB_SUPPORT
794 case OPT_IARB:
795 driver_setup.iarb = val;
796 break;
797#endif
798 default:
799 printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur);
800 break;
801 }
802
803 if ((cur = strchr(cur, ARG_SEP)) != NULL)
804 ++cur;
805 }
806#endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */
807 return 1;
808}
db3a8815 809#endif /* !MODULE */
19c65091
MW		 810
811/*===================================================================
812**
813** Get device queue depth from boot command line.
814**
815**===================================================================
816*/
817#define DEF_DEPTH (driver_setup.default_tags)
818#define ALL_TARGETS -2
819#define NO_TARGET -1
820#define ALL_LUNS -2
821#define NO_LUN -1
822
823static int device_queue_depth(int unit, int target, int lun)
824{
825 int c, h, t, u, v;
826 char *p = driver_setup.tag_ctrl;
827 char *ep;
828
829 h = -1;
830 t = NO_TARGET;
831 u = NO_LUN;
832 while ((c = *p++) != 0) {
833 v = simple_strtoul(p, &ep, 0);
834 switch(c) {
835 case '/':
836 ++h;
837 t = ALL_TARGETS;
838 u = ALL_LUNS;
839 break;
840 case 't':
841 if (t != target)
842 t = (target == v) ? v : NO_TARGET;
843 u = ALL_LUNS;
844 break;
845 case 'u':
846 if (u != lun)
847 u = (lun == v) ? v : NO_LUN;
848 break;
849 case 'q':
850 if (h == unit &&
851 (t == ALL_TARGETS || t == target) &&
852 (u == ALL_LUNS || u == lun))
853 return v;
854 break;
855 case '-':
856 t = ALL_TARGETS;
857 u = ALL_LUNS;
858 break;
859 default:
860 break;
861 }
862 p = ep;
863 }
864 return DEF_DEPTH;
865}
1da177e4
LT		 866
867
868/*==========================================================
869**
870** The CCB done queue uses an array of CCB virtual
871** addresses. Empty entries are flagged using the bogus
872** virtual address 0xffffffff.
873**
874** Since PCI ensures that only aligned DWORDs are accessed
875** atomically, 64 bit little-endian architecture requires
876** to test the high order DWORD of the entry to determine
877** if it is empty or valid.
878**
879** BTW, I will make things differently as soon as I will
880** have a better idea, but this is simple and should work.
881**
882**==========================================================
883*/
884
885#define SCSI_NCR_CCB_DONE_SUPPORT
886#ifdef SCSI_NCR_CCB_DONE_SUPPORT
887
888#define MAX_DONE 24
889#define CCB_DONE_EMPTY 0xffffffffUL
890
891/* All 32 bit architectures */
892#if BITS_PER_LONG == 32
893#define CCB_DONE_VALID(cp) (((u_long) cp) != CCB_DONE_EMPTY)
894
895/* All > 32 bit (64 bit) architectures regardless endian-ness */
896#else
897#define CCB_DONE_VALID(cp) \
898 ((((u_long) cp) & 0xffffffff00000000ul) && \
899 (((u_long) cp) & 0xfffffffful) != CCB_DONE_EMPTY)
900#endif
901
902#endif /* SCSI_NCR_CCB_DONE_SUPPORT */
903
904/*==========================================================
905**
906** Configuration and Debugging
907**
908**==========================================================
909*/
910
911/*
912** SCSI address of this device.
913** The boot routines should have set it.
914** If not, use this.
915*/
916
917#ifndef SCSI_NCR_MYADDR
918#define SCSI_NCR_MYADDR (7)
919#endif
920
921/*
922** The maximum number of tags per logic unit.
923** Used only for disk devices that support tags.
924*/
925
926#ifndef SCSI_NCR_MAX_TAGS
927#define SCSI_NCR_MAX_TAGS (8)
928#endif
929
930/*
931** TAGS are actually limited to 64 tags/lun.
932** We need to deal with power of 2, for alignment constraints.
933*/
934#if SCSI_NCR_MAX_TAGS > 64
935#define MAX_TAGS (64)
936#else
937#define MAX_TAGS SCSI_NCR_MAX_TAGS
938#endif
939
940#define NO_TAG (255)
941
942/*
943** Choose appropriate type for tag bitmap.
944*/
945#if MAX_TAGS > 32
946typedef u64 tagmap_t;
947#else
948typedef u32 tagmap_t;
949#endif
950
951/*
952** Number of targets supported by the driver.
953** n permits target numbers 0..n-1.
954** Default is 16, meaning targets #0..#15.
955** #7 .. is myself.
956*/
957
958#ifdef SCSI_NCR_MAX_TARGET
959#define MAX_TARGET (SCSI_NCR_MAX_TARGET)
960#else
961#define MAX_TARGET (16)
962#endif
963
964/*
965** Number of logic units supported by the driver.
966** n enables logic unit numbers 0..n-1.
967** The common SCSI devices require only
968** one lun, so take 1 as the default.
969*/
970
971#ifdef SCSI_NCR_MAX_LUN
972#define MAX_LUN SCSI_NCR_MAX_LUN
973#else
974#define MAX_LUN (1)
975#endif
976
977/*
978** Asynchronous pre-scaler (ns). Shall be 40
979*/
980
981#ifndef SCSI_NCR_MIN_ASYNC
982#define SCSI_NCR_MIN_ASYNC (40)
983#endif
984
985/*
986** The maximum number of jobs scheduled for starting.
987** There should be one slot per target, and one slot
988** for each tag of each target in use.
989** The calculation below is actually quite silly ...
990*/
991
992#ifdef SCSI_NCR_CAN_QUEUE
993#define MAX_START (SCSI_NCR_CAN_QUEUE + 4)
994#else
995#define MAX_START (MAX_TARGET + 7 * MAX_TAGS)
996#endif
997
998/*
999** We limit the max number of pending IO to 250.
1000** since we donnot want to allocate more than 1
1001** PAGE for 'scripth'.
1002*/
1003#if MAX_START > 250
1004#undef MAX_START
1005#define MAX_START 250
1006#endif
1007
1008/*
1009** The maximum number of segments a transfer is split into.
1010** We support up to 127 segments for both read and write.
1011** The data scripts are broken into 2 sub-scripts.
1012** 80 (MAX_SCATTERL) segments are moved from a sub-script
1013** in on-chip RAM. This makes data transfers shorter than
1014** 80k (assuming 1k fs) as fast as possible.
1015*/
1016
1017#define MAX_SCATTER (SCSI_NCR_MAX_SCATTER)
1018
1019#if (MAX_SCATTER > 80)
1020#define MAX_SCATTERL 80
1021#define MAX_SCATTERH (MAX_SCATTER - MAX_SCATTERL)
1022#else
1023#define MAX_SCATTERL (MAX_SCATTER-1)
1024#define MAX_SCATTERH 1
1025#endif
1026
1027/*
1028** other
1029*/
1030
1031#define NCR_SNOOP_TIMEOUT (1000000)
1032
1033/*
1034** Other definitions
1035*/
1036
1037#define ScsiResult(host_code, scsi_code) (((host_code) << 16) + ((scsi_code) & 0x7f))
1038
1039#define initverbose (driver_setup.verbose)
1040#define bootverbose (np->verbose)
1041
1042/*==========================================================
1043**
1044** Command control block states.
1045**
1046**==========================================================
1047*/
1048
1049#define HS_IDLE (0)
1050#define HS_BUSY (1)
1051#define HS_NEGOTIATE (2) /* sync/wide data transfer*/
1052#define HS_DISCONNECT (3) /* Disconnected by target */
1053
1054#define HS_DONEMASK (0x80)
1055#define HS_COMPLETE (4|HS_DONEMASK)
1056#define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
1057#define HS_RESET (6|HS_DONEMASK) /* SCSI reset */
1058#define HS_ABORTED (7|HS_DONEMASK) /* Transfer aborted */
1059#define HS_TIMEOUT (8|HS_DONEMASK) /* Software timeout */
1060#define HS_FAIL (9|HS_DONEMASK) /* SCSI or PCI bus errors */
1061#define HS_UNEXPECTED (10|HS_DONEMASK)/* Unexpected disconnect */
1062
1063/*
1064** Invalid host status values used by the SCRIPTS processor
1065** when the nexus is not fully identified.
1066** Shall never appear in a CCB.
1067*/
1068
1069#define HS_INVALMASK (0x40)
1070#define HS_SELECTING (0|HS_INVALMASK)
1071#define HS_IN_RESELECT (1|HS_INVALMASK)
1072#define HS_STARTING (2|HS_INVALMASK)
1073
1074/*
1075** Flags set by the SCRIPT processor for commands
1076** that have been skipped.
1077*/
1078#define HS_SKIPMASK (0x20)
1079
1080/*==========================================================
1081**
1082** Software Interrupt Codes
1083**
1084**==========================================================
1085*/
1086
1087#define SIR_BAD_STATUS (1)
1088#define SIR_XXXXXXXXXX (2)
1089#define SIR_NEGO_SYNC (3)
1090#define SIR_NEGO_WIDE (4)
1091#define SIR_NEGO_FAILED (5)
1092#define SIR_NEGO_PROTO (6)
1093#define SIR_REJECT_RECEIVED (7)
1094#define SIR_REJECT_SENT (8)
1095#define SIR_IGN_RESIDUE (9)
1096#define SIR_MISSING_SAVE (10)
1097#define SIR_RESEL_NO_MSG_IN (11)
1098#define SIR_RESEL_NO_IDENTIFY (12)
1099#define SIR_RESEL_BAD_LUN (13)
1100#define SIR_RESEL_BAD_TARGET (14)
1101#define SIR_RESEL_BAD_I_T_L (15)
1102#define SIR_RESEL_BAD_I_T_L_Q (16)
1103#define SIR_DONE_OVERFLOW (17)
1104#define SIR_INTFLY (18)
1105#define SIR_MAX (18)
1106
1107/*==========================================================
1108**
1109** Extended error codes.
1110** xerr_status field of struct ccb.
1111**
1112**==========================================================
1113*/
1114
1115#define XE_OK (0)
1116#define XE_EXTRA_DATA (1) /* unexpected data phase */
1117#define XE_BAD_PHASE (2) /* illegal phase (4/5) */
1118
1119/*==========================================================
1120**
1121** Negotiation status.
1122** nego_status field of struct ccb.
1123**
1124**==========================================================
1125*/
1126
1127#define NS_NOCHANGE (0)
1128#define NS_SYNC (1)
1129#define NS_WIDE (2)
1130#define NS_PPR (4)
1131
1132/*==========================================================
1133**
1134** Misc.
1135**
1136**==========================================================
1137*/
1138
1139#define CCB_MAGIC (0xf2691ad2)
1140
1141/*==========================================================
1142**
1143** Declaration of structs.
1144**
1145**==========================================================
1146*/
1147
1148static struct scsi_transport_template *ncr53c8xx_transport_template = NULL;
1149
1150struct tcb;
1151struct lcb;
1152struct ccb;
1153struct ncb;
1154struct script;
1155
1156struct link {
1157 ncrcmd l_cmd;
1158 ncrcmd l_paddr;
1159};
1160
1161struct usrcmd {
1162 u_long target;
1163 u_long lun;
1164 u_long data;
1165 u_long cmd;
1166};
1167
1168#define UC_SETSYNC 10
1169#define UC_SETTAGS 11
1170#define UC_SETDEBUG 12
1171#define UC_SETORDER 13
1172#define UC_SETWIDE 14
1173#define UC_SETFLAG 15
1174#define UC_SETVERBOSE 17
1175
1176#define UF_TRACE (0x01)
1177#define UF_NODISC (0x02)
1178#define UF_NOSCAN (0x04)
1179
1180/*========================================================================
1181**
1182** Declaration of structs: target control block
1183**
1184**========================================================================
1185*/
1186struct tcb {
1187 /*----------------------------------------------------------------
1188 ** During reselection the ncr jumps to this point with SFBR
1189 ** set to the encoded target number with bit 7 set.
1190 ** if it's not this target, jump to the next.
1191 **
1192 ** JUMP IF (SFBR != #target#), @(next tcb)
1193 **----------------------------------------------------------------
1194 */
1195 struct link jump_tcb;
1196
1197 /*----------------------------------------------------------------
1198 ** Load the actual values for the sxfer and the scntl3
1199 ** register (sync/wide mode).
1200 **
1201 ** SCR_COPY (1), @(sval field of this tcb), @(sxfer register)
1202 ** SCR_COPY (1), @(wval field of this tcb), @(scntl3 register)
1203 **----------------------------------------------------------------
1204 */
1205 ncrcmd getscr[6];
1206
1207 /*----------------------------------------------------------------
1208 ** Get the IDENTIFY message and load the LUN to SFBR.
1209 **
1210 ** CALL, <RESEL_LUN>
1211 **----------------------------------------------------------------
1212 */
1213 struct link call_lun;
1214
1215 /*----------------------------------------------------------------
1216 ** Now look for the right lun.
1217 **
1218 ** For i = 0 to 3
1219 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(first lcb mod. i)
1220 **
1221 ** Recent chips will prefetch the 4 JUMPS using only 1 burst.
1222 ** It is kind of hashcoding.
1223 **----------------------------------------------------------------
1224 */
1225 struct link jump_lcb[4]; /* JUMPs for reselection */
1226 struct lcb * lp[MAX_LUN]; /* The lcb's of this tcb */
1227
1228 /*----------------------------------------------------------------
1229 ** Pointer to the ccb used for negotiation.
1230 ** Prevent from starting a negotiation for all queued commands
1231 ** when tagged command queuing is enabled.
1232 **----------------------------------------------------------------
1233 */
1234 struct ccb * nego_cp;
1235
1236 /*----------------------------------------------------------------
1237 ** statistical data
1238 **----------------------------------------------------------------
1239 */
1240 u_long transfers;
1241 u_long bytes;
1242
1243 /*----------------------------------------------------------------
1244 ** negotiation of wide and synch transfer and device quirks.
1245 **----------------------------------------------------------------
1246 */
1247#ifdef SCSI_NCR_BIG_ENDIAN
1248/*0*/ u16 period;
1249/*2*/ u_char sval;
1250/*3*/ u_char minsync;
1251/*0*/ u_char wval;
1252/*1*/ u_char widedone;
1253/*2*/ u_char quirks;
1254/*3*/ u_char maxoffs;
1255#else
1256/*0*/ u_char minsync;
1257/*1*/ u_char sval;
1258/*2*/ u16 period;
1259/*0*/ u_char maxoffs;
1260/*1*/ u_char quirks;
1261/*2*/ u_char widedone;
1262/*3*/ u_char wval;
1263#endif
1264
1265 /* User settable limits and options. */
1266 u_char usrsync;
1267 u_char usrwide;
1268 u_char usrtags;
1269 u_char usrflag;
1270 struct scsi_target *starget;
1271};
1272
1273/*========================================================================
1274**
1275** Declaration of structs: lun control block
1276**
1277**========================================================================
1278*/
1279struct lcb {
1280 /*----------------------------------------------------------------
1281 ** During reselection the ncr jumps to this point
1282 ** with SFBR set to the "Identify" message.
1283 ** if it's not this lun, jump to the next.
1284 **
1285 ** JUMP IF (SFBR != #lun#), @(next lcb of this target)
1286 **
1287 ** It is this lun. Load TEMP with the nexus jumps table
1288 ** address and jump to RESEL_TAG (or RESEL_NOTAG).
1289 **
1290 ** SCR_COPY (4), p_jump_ccb, TEMP,
1291 ** SCR_JUMP, <RESEL_TAG>
1292 **----------------------------------------------------------------
1293 */
1294 struct link jump_lcb;
1295 ncrcmd load_jump_ccb[3];
1296 struct link jump_tag;
1297 ncrcmd p_jump_ccb; /* Jump table bus address */
1298
1299 /*----------------------------------------------------------------
1300 ** Jump table used by the script processor to directly jump
1301 ** to the CCB corresponding to the reselected nexus.
1302 ** Address is allocated on 256 bytes boundary in order to
1303 ** allow 8 bit calculation of the tag jump entry for up to
1304 ** 64 possible tags.
1305 **----------------------------------------------------------------
1306 */
1307 u32 jump_ccb_0; /* Default table if no tags */
1308 u32 *jump_ccb; /* Virtual address */
1309
1310 /*----------------------------------------------------------------
1311 ** CCB queue management.
1312 **----------------------------------------------------------------
1313 */
1314 struct list_head free_ccbq; /* Queue of available CCBs */
1315 struct list_head busy_ccbq; /* Queue of busy CCBs */
1316 struct list_head wait_ccbq; /* Queue of waiting for IO CCBs */
1317 struct list_head skip_ccbq; /* Queue of skipped CCBs */
1318 u_char actccbs; /* Number of allocated CCBs */
1319 u_char busyccbs; /* CCBs busy for this lun */
1320 u_char queuedccbs; /* CCBs queued to the controller*/
1321 u_char queuedepth; /* Queue depth for this lun */
1322 u_char scdev_depth; /* SCSI device queue depth */
1323 u_char maxnxs; /* Max possible nexuses */
1324
1325 /*----------------------------------------------------------------
1326 ** Control of tagged command queuing.
1327 ** Tags allocation is performed using a circular buffer.
1328 ** This avoids using a loop for tag allocation.
1329 **----------------------------------------------------------------
1330 */
1331 u_char ia_tag; /* Allocation index */
1332 u_char if_tag; /* Freeing index */
1333 u_char cb_tags[MAX_TAGS]; /* Circular tags buffer */
1334 u_char usetags; /* Command queuing is active */
1335 u_char maxtags; /* Max nr of tags asked by user */
1336 u_char numtags; /* Current number of tags */
1337
1338 /*----------------------------------------------------------------
1339 ** QUEUE FULL control and ORDERED tag control.
1340 **----------------------------------------------------------------
1341 */
1342 /*----------------------------------------------------------------
1343 ** QUEUE FULL and ORDERED tag control.
1344 **----------------------------------------------------------------
1345 */
1346 u16 num_good; /* Nr of GOOD since QUEUE FULL */
1347 tagmap_t tags_umap; /* Used tags bitmap */
1348 tagmap_t tags_smap; /* Tags in use at 'tag_stime' */
1349 u_long tags_stime; /* Last time we set smap=umap */
1350 struct ccb * held_ccb; /* CCB held for QUEUE FULL */
1351};
1352
1353/*========================================================================
1354**
1355** Declaration of structs: the launch script.
1356**
1357**========================================================================
1358**
1359** It is part of the CCB and is called by the scripts processor to
1360** start or restart the data structure (nexus).
1361** This 6 DWORDs mini script makes use of prefetching.
1362**
1363**------------------------------------------------------------------------
1364*/
1365struct launch {
1366 /*----------------------------------------------------------------
1367 ** SCR_COPY(4), @(p_phys), @(dsa register)
1368 ** SCR_JUMP, @(scheduler_point)
1369 **----------------------------------------------------------------
1370 */
1371 ncrcmd setup_dsa[3]; /* Copy 'phys' address to dsa */
1372 struct link schedule; /* Jump to scheduler point */
1373 ncrcmd p_phys; /* 'phys' header bus address */
1374};
1375
1376/*========================================================================
1377**
1378** Declaration of structs: global HEADER.
1379**
1380**========================================================================
1381**
1382** This substructure is copied from the ccb to a global address after
1383** selection (or reselection) and copied back before disconnect.
1384**
1385** These fields are accessible to the script processor.
1386**
1387**------------------------------------------------------------------------
1388*/
1389
1390struct head {
1391 /*----------------------------------------------------------------
1392 ** Saved data pointer.
1393 ** Points to the position in the script responsible for the
1394 ** actual transfer transfer of data.
1395 ** It's written after reception of a SAVE_DATA_POINTER message.
1396 ** The goalpointer points after the last transfer command.
1397 **----------------------------------------------------------------
1398 */
1399 u32 savep;
1400 u32 lastp;
1401 u32 goalp;
1402
1403 /*----------------------------------------------------------------
1404 ** Alternate data pointer.
1405 ** They are copied back to savep/lastp/goalp by the SCRIPTS
1406 ** when the direction is unknown and the device claims data out.
1407 **----------------------------------------------------------------
1408 */
1409 u32 wlastp;
1410 u32 wgoalp;
1411
1412 /*----------------------------------------------------------------
1413 ** The virtual address of the ccb containing this header.
1414 **----------------------------------------------------------------
1415 */
1416 struct ccb * cp;
1417
1418 /*----------------------------------------------------------------
1419 ** Status fields.
1420 **----------------------------------------------------------------
1421 */
1422 u_char scr_st[4]; /* script status */
1423 u_char status[4]; /* host status. must be the */
1424 /* last DWORD of the header. */
1425};
1426
1427/*
1428** The status bytes are used by the host and the script processor.
1429**
1430** The byte corresponding to the host_status must be stored in the
1431** last DWORD of the CCB header since it is used for command
1432** completion (ncr_wakeup()). Doing so, we are sure that the header
1433** has been entirely copied back to the CCB when the host_status is
1434** seen complete by the CPU.
1435**
1436** The last four bytes (status[4]) are copied to the scratchb register
1437** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
1438** and copied back just after disconnecting.
1439** Inside the script the XX_REG are used.
1440**
1441** The first four bytes (scr_st[4]) are used inside the script by
1442** "COPY" commands.
1443** Because source and destination must have the same alignment
0779bf2d 1444** in a DWORD, the fields HAVE to be at the chosen offsets.
1da177e4
LT		 1445** xerr_st 0 (0x34) scratcha
1446** sync_st 1 (0x05) sxfer
1447** wide_st 3 (0x03) scntl3
1448*/
1449
1450/*
1451** Last four bytes (script)
1452*/
1453#define QU_REG scr0
1454#define HS_REG scr1
1455#define HS_PRT nc_scr1
1456#define SS_REG scr2
1457#define SS_PRT nc_scr2
1458#define PS_REG scr3
1459
1460/*
1461** Last four bytes (host)
1462*/
1463#ifdef SCSI_NCR_BIG_ENDIAN
1464#define actualquirks phys.header.status[3]
1465#define host_status phys.header.status[2]
1466#define scsi_status phys.header.status[1]
1467#define parity_status phys.header.status[0]
1468#else
1469#define actualquirks phys.header.status[0]
1470#define host_status phys.header.status[1]
1471#define scsi_status phys.header.status[2]
1472#define parity_status phys.header.status[3]
1473#endif
1474
1475/*
1476** First four bytes (script)
1477*/
1478#define xerr_st header.scr_st[0]
1479#define sync_st header.scr_st[1]
1480#define nego_st header.scr_st[2]
1481#define wide_st header.scr_st[3]
1482
1483/*
1484** First four bytes (host)
1485*/
1486#define xerr_status phys.xerr_st
1487#define nego_status phys.nego_st
1488
1489#if 0
1490#define sync_status phys.sync_st
1491#define wide_status phys.wide_st
1492#endif
1493
1494/*==========================================================
1495**
1496** Declaration of structs: Data structure block
1497**
1498**==========================================================
1499**
1500** During execution of a ccb by the script processor,
1501** the DSA (data structure address) register points
1502** to this substructure of the ccb.
1503** This substructure contains the header with
0779bf2d 1504** the script-processor-changeable data and
1da177e4
LT		 1505** data blocks for the indirect move commands.
1506**
1507**----------------------------------------------------------
1508*/
1509
1510struct dsb {
1511
1512 /*
1513 ** Header.
1514 */
1515
1516 struct head header;
1517
1518 /*
1519 ** Table data for Script
1520 */
1521
1522 struct scr_tblsel select;
1523 struct scr_tblmove smsg ;
1524 struct scr_tblmove cmd ;
1525 struct scr_tblmove sense ;
1526 struct scr_tblmove data[MAX_SCATTER];
1527};
1528
1529
1530/*========================================================================
1531**
1532** Declaration of structs: Command control block.
1533**
1534**========================================================================
1535*/
1536struct ccb {
1537 /*----------------------------------------------------------------
1538 ** This is the data structure which is pointed by the DSA
1539 ** register when it is executed by the script processor.
1540 ** It must be the first entry because it contains the header
1541 ** as first entry that must be cache line aligned.
1542 **----------------------------------------------------------------
1543 */
1544 struct dsb phys;
1545
1546 /*----------------------------------------------------------------
1547 ** Mini-script used at CCB execution start-up.
1548 ** Load the DSA with the data structure address (phys) and
1549 ** jump to SELECT. Jump to CANCEL if CCB is to be canceled.
1550 **----------------------------------------------------------------
1551 */
1552 struct launch start;
1553
1554 /*----------------------------------------------------------------
1555 ** Mini-script used at CCB relection to restart the nexus.
1556 ** Load the DSA with the data structure address (phys) and
1557 ** jump to RESEL_DSA. Jump to ABORT if CCB is to be aborted.
1558 **----------------------------------------------------------------
1559 */
1560 struct launch restart;
1561
1562 /*----------------------------------------------------------------
1563 ** If a data transfer phase is terminated too early
1564 ** (after reception of a message (i.e. DISCONNECT)),
1565 ** we have to prepare a mini script to transfer
1566 ** the rest of the data.
1567 **----------------------------------------------------------------
1568 */
1569 ncrcmd patch[8];
1570
1571 /*----------------------------------------------------------------
1572 ** The general SCSI driver provides a
1573 ** pointer to a control block.
1574 **----------------------------------------------------------------
1575 */
1576 struct scsi_cmnd *cmd; /* SCSI command */
1577 u_char cdb_buf[16]; /* Copy of CDB */
1578 u_char sense_buf[64];
1579 int data_len; /* Total data length */
1580
1581 /*----------------------------------------------------------------
1582 ** Message areas.
1583 ** We prepare a message to be sent after selection.
1584 ** We may use a second one if the command is rescheduled
1585 ** due to GETCC or QFULL.
1586 ** Contents are IDENTIFY and SIMPLE_TAG.
1587 ** While negotiating sync or wide transfer,
1588 ** a SDTR or WDTR message is appended.
1589 **----------------------------------------------------------------
1590 */
1591 u_char scsi_smsg [8];
1592 u_char scsi_smsg2[8];
1593
1594 /*----------------------------------------------------------------
1595 ** Other fields.
1596 **----------------------------------------------------------------
1597 */
1598 u_long p_ccb; /* BUS address of this CCB */
1599 u_char sensecmd[6]; /* Sense command */
1600 u_char tag; /* Tag for this transfer */
1601 /* 255 means no tag */
1602 u_char target;
1603 u_char lun;
1604 u_char queued;
1605 u_char auto_sense;
1606 struct ccb * link_ccb; /* Host adapter CCB chain */
1607 struct list_head link_ccbq; /* Link to unit CCB queue */
1608 u32 startp; /* Initial data pointer */
1609 u_long magic; /* Free / busy CCB flag */
1610};
1611
1612#define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl))
1613
1614
1615/*========================================================================
1616**
1617** Declaration of structs: NCR device descriptor
1618**
1619**========================================================================
1620*/
1621struct ncb {
1622 /*----------------------------------------------------------------
1623 ** The global header.
1624 ** It is accessible to both the host and the script processor.
1625 ** Must be cache line size aligned (32 for x86) in order to
1626 ** allow cache line bursting when it is copied to/from CCB.
1627 **----------------------------------------------------------------
1628 */
1629 struct head header;
1630
1631 /*----------------------------------------------------------------
1632 ** CCBs management queues.
1633 **----------------------------------------------------------------
1634 */
1635 struct scsi_cmnd *waiting_list; /* Commands waiting for a CCB */
1636 /* when lcb is not allocated. */
1637 struct scsi_cmnd *done_list; /* Commands waiting for done() */
1638 /* callback to be invoked. */
1639 spinlock_t smp_lock; /* Lock for SMP threading */
1640
1641 /*----------------------------------------------------------------
1642 ** Chip and controller indentification.
1643 **----------------------------------------------------------------
1644 */
1645 int unit; /* Unit number */
1646 char inst_name[16]; /* ncb instance name */
1647
1648 /*----------------------------------------------------------------
1649 ** Initial value of some IO register bits.
1650 ** These values are assumed to have been set by BIOS, and may
1651 ** be used for probing adapter implementation differences.
1652 **----------------------------------------------------------------
1653 */
1654 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest0, sv_ctest3,
1655 sv_ctest4, sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4;
1656
1657 /*----------------------------------------------------------------
1658 ** Actual initial value of IO register bits used by the
1659 ** driver. They are loaded at initialisation according to
1660 ** features that are to be enabled.
1661 **----------------------------------------------------------------
1662 */
1663 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest0, rv_ctest3,
1664 rv_ctest4, rv_ctest5, rv_stest2;
1665
1666 /*----------------------------------------------------------------
1667 ** Targets management.
1668 ** During reselection the ncr jumps to jump_tcb.
1669 ** The SFBR register is loaded with the encoded target id.
1670 ** For i = 0 to 3
1671 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(next tcb mod. i)
1672 **
1673 ** Recent chips will prefetch the 4 JUMPS using only 1 burst.
1674 ** It is kind of hashcoding.
1675 **----------------------------------------------------------------
1676 */
1677 struct link jump_tcb[4]; /* JUMPs for reselection */
1678 struct tcb target[MAX_TARGET]; /* Target data */
1679
1680 /*----------------------------------------------------------------
1681 ** Virtual and physical bus addresses of the chip.
1682 **----------------------------------------------------------------
1683 */
1684 void __iomem *vaddr; /* Virtual and bus address of */
1685 unsigned long paddr; /* chip's IO registers. */
1686 unsigned long paddr2; /* On-chip RAM bus address. */
1687 volatile /* Pointer to volatile for */
1688 struct ncr_reg __iomem *reg; /* memory mapped IO. */
1689
1690 /*----------------------------------------------------------------
1691 ** SCRIPTS virtual and physical bus addresses.
1692 ** 'script' is loaded in the on-chip RAM if present.
1693 ** 'scripth' stays in main memory.
1694 **----------------------------------------------------------------
1695 */
1696 struct script *script0; /* Copies of script and scripth */
1697 struct scripth *scripth0; /* relocated for this ncb. */
1698 struct scripth *scripth; /* Actual scripth virt. address */
1699 u_long p_script; /* Actual script and scripth */
1700 u_long p_scripth; /* bus addresses. */
1701
1702 /*----------------------------------------------------------------
1703 ** General controller parameters and configuration.
1704 **----------------------------------------------------------------
1705 */
1706 struct device *dev;
1707 u_char revision_id; /* PCI device revision id */
1708 u32 irq; /* IRQ level */
1709 u32 features; /* Chip features map */
1710 u_char myaddr; /* SCSI id of the adapter */
1711 u_char maxburst; /* log base 2 of dwords burst */
1712 u_char maxwide; /* Maximum transfer width */
1713 u_char minsync; /* Minimum sync period factor */
1714 u_char maxsync; /* Maximum sync period factor */
1715 u_char maxoffs; /* Max scsi offset */
1716 u_char multiplier; /* Clock multiplier (1,2,4) */
1717 u_char clock_divn; /* Number of clock divisors */
1718 u_long clock_khz; /* SCSI clock frequency in KHz */
1719
1720 /*----------------------------------------------------------------
1721 ** Start queue management.
1722 ** It is filled up by the host processor and accessed by the
1723 ** SCRIPTS processor in order to start SCSI commands.
1724 **----------------------------------------------------------------
1725 */
1726 u16 squeueput; /* Next free slot of the queue */
1727 u16 actccbs; /* Number of allocated CCBs */
1728 u16 queuedccbs; /* Number of CCBs in start queue*/
1729 u16 queuedepth; /* Start queue depth */
1730
1731 /*----------------------------------------------------------------
1732 ** Timeout handler.
1733 **----------------------------------------------------------------
1734 */
1735 struct timer_list timer; /* Timer handler link header */
1736 u_long lasttime;
1737 u_long settle_time; /* Resetting the SCSI BUS */
1738
1739 /*----------------------------------------------------------------
1740 ** Debugging and profiling.
1741 **----------------------------------------------------------------
1742 */
1743 struct ncr_reg regdump; /* Register dump */
1744 u_long regtime; /* Time it has been done */
1745
1746 /*----------------------------------------------------------------
1747 ** Miscellaneous buffers accessed by the scripts-processor.
1748 ** They shall be DWORD aligned, because they may be read or
1749 ** written with a SCR_COPY script command.
1750 **----------------------------------------------------------------
1751 */
1752 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1753 u_char msgin [8]; /* Buffer for MESSAGE IN */
1754 u32 lastmsg; /* Last SCSI message sent */
1755 u_char scratch; /* Scratch for SCSI receive */
1756
1757 /*----------------------------------------------------------------
1758 ** Miscellaneous configuration and status parameters.
1759 **----------------------------------------------------------------
1760 */
1761 u_char disc; /* Diconnection allowed */
1762 u_char scsi_mode; /* Current SCSI BUS mode */
1763 u_char order; /* Tag order to use */
1764 u_char verbose; /* Verbosity for this controller*/
1765 int ncr_cache; /* Used for cache test at init. */
1766 u_long p_ncb; /* BUS address of this NCB */
1767
1768 /*----------------------------------------------------------------
1769 ** Command completion handling.
1770 **----------------------------------------------------------------
1771 */
1772#ifdef SCSI_NCR_CCB_DONE_SUPPORT
1773 struct ccb *(ccb_done[MAX_DONE]);
1774 int ccb_done_ic;
1775#endif
1776 /*----------------------------------------------------------------
1777 ** Fields that should be removed or changed.
1778 **----------------------------------------------------------------
1779 */
1780 struct ccb *ccb; /* Global CCB */
1781 struct usrcmd user; /* Command from user */
1782 volatile u_char release_stage; /* Synchronisation stage on release */
1783};
1784
1785#define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1786#define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1787
1788/*==========================================================
1789**
1790**
1791** Script for NCR-Processor.
1792**
1793** Use ncr_script_fill() to create the variable parts.
1794** Use ncr_script_copy_and_bind() to make a copy and
1795** bind to physical addresses.
1796**
1797**
1798**==========================================================
1799**
1800** We have to know the offsets of all labels before
1801** we reach them (for forward jumps).
1802** Therefore we declare a struct here.
1803** If you make changes inside the script,
1804** DONT FORGET TO CHANGE THE LENGTHS HERE!
1805**
1806**----------------------------------------------------------
1807*/
1808
1809/*
1810** For HP Zalon/53c720 systems, the Zalon interface
1811** between CPU and 53c720 does prefetches, which causes
1812** problems with self modifying scripts. The problem
1813** is overcome by calling a dummy subroutine after each
1814** modification, to force a refetch of the script on
1815** return from the subroutine.
1816*/
1817
1818#ifdef CONFIG_NCR53C8XX_PREFETCH
1819#define PREFETCH_FLUSH_CNT 2
1820#define PREFETCH_FLUSH SCR_CALL, PADDRH (wait_dma),
1821#else
1822#define PREFETCH_FLUSH_CNT 0
1823#define PREFETCH_FLUSH
1824#endif
1825
1826/*
1827** Script fragments which are loaded into the on-chip RAM
1828** of 825A, 875 and 895 chips.
1829*/
1830struct script {
1831 ncrcmd start [ 5];
1832 ncrcmd startpos [ 1];
1833 ncrcmd select [ 6];
1834 ncrcmd select2 [ 9 + PREFETCH_FLUSH_CNT];
1835 ncrcmd loadpos [ 4];
1836 ncrcmd send_ident [ 9];
1837 ncrcmd prepare [ 6];
1838 ncrcmd prepare2 [ 7];
1839 ncrcmd command [ 6];
1840 ncrcmd dispatch [ 32];
1841 ncrcmd clrack [ 4];
1842 ncrcmd no_data [ 17];
1843 ncrcmd status [ 8];
1844 ncrcmd msg_in [ 2];
1845 ncrcmd msg_in2 [ 16];
1846 ncrcmd msg_bad [ 4];
1847 ncrcmd setmsg [ 7];
1848 ncrcmd cleanup [ 6];
1849 ncrcmd complete [ 9];
1850 ncrcmd cleanup_ok [ 8 + PREFETCH_FLUSH_CNT];
1851 ncrcmd cleanup0 [ 1];
1852#ifndef SCSI_NCR_CCB_DONE_SUPPORT
1853 ncrcmd signal [ 12];
1854#else
1855 ncrcmd signal [ 9];
1856 ncrcmd done_pos [ 1];
1857 ncrcmd done_plug [ 2];
1858 ncrcmd done_end [ 7];
1859#endif
1860 ncrcmd save_dp [ 7];
1861 ncrcmd restore_dp [ 5];
1862 ncrcmd disconnect [ 10];
1863 ncrcmd msg_out [ 9];
1864 ncrcmd msg_out_done [ 7];
1865 ncrcmd idle [ 2];
1866 ncrcmd reselect [ 8];
1867 ncrcmd reselected [ 8];
1868 ncrcmd resel_dsa [ 6 + PREFETCH_FLUSH_CNT];
1869 ncrcmd loadpos1 [ 4];
1870 ncrcmd resel_lun [ 6];
1871 ncrcmd resel_tag [ 6];
1872 ncrcmd jump_to_nexus [ 4 + PREFETCH_FLUSH_CNT];
1873 ncrcmd nexus_indirect [ 4];
1874 ncrcmd resel_notag [ 4];
1875 ncrcmd data_in [MAX_SCATTERL * 4];
1876 ncrcmd data_in2 [ 4];
1877 ncrcmd data_out [MAX_SCATTERL * 4];
1878 ncrcmd data_out2 [ 4];
1879};
1880
1881/*
1882** Script fragments which stay in main memory for all chips.
1883*/
1884struct scripth {
1885 ncrcmd tryloop [MAX_START*2];
1886 ncrcmd tryloop2 [ 2];
1887#ifdef SCSI_NCR_CCB_DONE_SUPPORT
1888 ncrcmd done_queue [MAX_DONE*5];
1889 ncrcmd done_queue2 [ 2];
1890#endif
1891 ncrcmd select_no_atn [ 8];
1892 ncrcmd cancel [ 4];
1893 ncrcmd skip [ 9 + PREFETCH_FLUSH_CNT];
1894 ncrcmd skip2 [ 19];
1895 ncrcmd par_err_data_in [ 6];
1896 ncrcmd par_err_other [ 4];
1897 ncrcmd msg_reject [ 8];
1898 ncrcmd msg_ign_residue [ 24];
1899 ncrcmd msg_extended [ 10];
1900 ncrcmd msg_ext_2 [ 10];
1901 ncrcmd msg_wdtr [ 14];
1902 ncrcmd send_wdtr [ 7];
1903 ncrcmd msg_ext_3 [ 10];
1904 ncrcmd msg_sdtr [ 14];
1905 ncrcmd send_sdtr [ 7];
1906 ncrcmd nego_bad_phase [ 4];
1907 ncrcmd msg_out_abort [ 10];
1908 ncrcmd hdata_in [MAX_SCATTERH * 4];
1909 ncrcmd hdata_in2 [ 2];
1910 ncrcmd hdata_out [MAX_SCATTERH * 4];
1911 ncrcmd hdata_out2 [ 2];
1912 ncrcmd reset [ 4];
1913 ncrcmd aborttag [ 4];
1914 ncrcmd abort [ 2];
1915 ncrcmd abort_resel [ 20];
1916 ncrcmd resend_ident [ 4];
1917 ncrcmd clratn_go_on [ 3];
1918 ncrcmd nxtdsp_go_on [ 1];
1919 ncrcmd sdata_in [ 8];
1920 ncrcmd data_io [ 18];
1921 ncrcmd bad_identify [ 12];
1922 ncrcmd bad_i_t_l [ 4];
1923 ncrcmd bad_i_t_l_q [ 4];
1924 ncrcmd bad_target [ 8];
1925 ncrcmd bad_status [ 8];
1926 ncrcmd start_ram [ 4 + PREFETCH_FLUSH_CNT];
1927 ncrcmd start_ram0 [ 4];
1928 ncrcmd sto_restart [ 5];
1929 ncrcmd wait_dma [ 2];
1930 ncrcmd snooptest [ 9];
1931 ncrcmd snoopend [ 2];
1932};
1933
1934/*==========================================================
1935**
1936**
1937** Function headers.
1938**
1939**
1940**==========================================================
1941*/
1942
1943static void ncr_alloc_ccb (struct ncb *np, u_char tn, u_char ln);
1944static void ncr_complete (struct ncb *np, struct ccb *cp);
1945static void ncr_exception (struct ncb *np);
1946static void ncr_free_ccb (struct ncb *np, struct ccb *cp);
1947static void ncr_init_ccb (struct ncb *np, struct ccb *cp);
1948static void ncr_init_tcb (struct ncb *np, u_char tn);
1949static struct lcb * ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln);
1950static struct lcb * ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev);
1951static void ncr_getclock (struct ncb *np, int mult);
1952static void ncr_selectclock (struct ncb *np, u_char scntl3);
1953static struct ccb *ncr_get_ccb (struct ncb *np, struct scsi_cmnd *cmd);
1954static void ncr_chip_reset (struct ncb *np, int delay);
1955static void ncr_init (struct ncb *np, int reset, char * msg, u_long code);
1956static int ncr_int_sbmc (struct ncb *np);
1957static int ncr_int_par (struct ncb *np);
1958static void ncr_int_ma (struct ncb *np);
1959static void ncr_int_sir (struct ncb *np);
1960static void ncr_int_sto (struct ncb *np);
1961static void ncr_negotiate (struct ncb* np, struct tcb* tp);
1962static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr);
1963
1964static void ncr_script_copy_and_bind
1965 (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len);
1966static void ncr_script_fill (struct script * scr, struct scripth * scripth);
1967static int ncr_scatter (struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd);
1968static void ncr_getsync (struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p);
1969static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer);
1970static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev);
1971static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack);
1972static int ncr_snooptest (struct ncb *np);
1973static void ncr_timeout (struct ncb *np);
1974static void ncr_wakeup (struct ncb *np, u_long code);
1975static void ncr_wakeup_done (struct ncb *np);
1976static void ncr_start_next_ccb (struct ncb *np, struct lcb * lp, int maxn);
1977static void ncr_put_start_queue(struct ncb *np, struct ccb *cp);
1978
1979static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd);
1980static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd);
1981static void process_waiting_list(struct ncb *np, int sts);
1982
1983#define remove_from_waiting_list(np, cmd) \
1984 retrieve_from_waiting_list(1, (np), (cmd))
1985#define requeue_waiting_list(np) process_waiting_list((np), DID_OK)
1986#define reset_waiting_list(np) process_waiting_list((np), DID_RESET)
1987
1988static inline char *ncr_name (struct ncb *np)
1989{
1990 return np->inst_name;
1991}
1992
1993
1994/*==========================================================
1995**
1996**
1997** Scripts for NCR-Processor.
1998**
1999** Use ncr_script_bind for binding to physical addresses.
2000**
2001**
2002**==========================================================
2003**
2004** NADDR generates a reference to a field of the controller data.
2005** PADDR generates a reference to another part of the script.
2006** RADDR generates a reference to a script processor register.
2007** FADDR generates a reference to a script processor register
2008** with offset.
2009**
2010**----------------------------------------------------------
2011*/
2012
2013#define RELOC_SOFTC 0x40000000
2014#define RELOC_LABEL 0x50000000
2015#define RELOC_REGISTER 0x60000000
2016#if 0
2017#define RELOC_KVAR 0x70000000
2018#endif
2019#define RELOC_LABELH 0x80000000
2020#define RELOC_MASK 0xf0000000
2021
2022#define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
2023#define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
2024#define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
2025#define RADDR(label) (RELOC_REGISTER | REG(label))
2026#define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
2027#if 0
2028#define KVAR(which) (RELOC_KVAR | (which))
2029#endif
2030
2031#if 0
2032#define SCRIPT_KVAR_JIFFIES (0)
2033#define SCRIPT_KVAR_FIRST SCRIPT_KVAR_JIFFIES
2034#define SCRIPT_KVAR_LAST SCRIPT_KVAR_JIFFIES
2035/*
2036 * Kernel variables referenced in the scripts.
2037 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
2038 */
2039static void *script_kvars[] __initdata =
2040 { (void *)&jiffies };
2041#endif
2042
2043static struct script script0 __initdata = {
2044/*--------------------------< START >-----------------------*/ {
2045 /*
2046 ** This NOP will be patched with LED ON
2047 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2048 */
2049 SCR_NO_OP,
2050 0,
2051 /*
2052 ** Clear SIGP.
2053 */
2054 SCR_FROM_REG (ctest2),
2055 0,
2056 /*
2057 ** Then jump to a certain point in tryloop.
2058 ** Due to the lack of indirect addressing the code
2059 ** is self modifying here.
2060 */
2061 SCR_JUMP,
2062}/*-------------------------< STARTPOS >--------------------*/,{
2063 PADDRH(tryloop),
2064
2065}/*-------------------------< SELECT >----------------------*/,{
2066 /*
2067 ** DSA contains the address of a scheduled
2068 ** data structure.
2069 **
2070 ** SCRATCHA contains the address of the script,
2071 ** which starts the next entry.
2072 **
2073 ** Set Initiator mode.
2074 **
2075 ** (Target mode is left as an exercise for the reader)
2076 */
2077
2078 SCR_CLR (SCR_TRG),
2079 0,
2080 SCR_LOAD_REG (HS_REG, HS_SELECTING),
2081 0,
2082
2083 /*
2084 ** And try to select this target.
2085 */
2086 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2087 PADDR (reselect),
2088
2089}/*-------------------------< SELECT2 >----------------------*/,{
2090 /*
2091 ** Now there are 4 possibilities:
2092 **
2093 ** (1) The ncr loses arbitration.
2094 ** This is ok, because it will try again,
2095 ** when the bus becomes idle.
2096 ** (But beware of the timeout function!)
2097 **
2098 ** (2) The ncr is reselected.
2099 ** Then the script processor takes the jump
2100 ** to the RESELECT label.
2101 **
2102 ** (3) The ncr wins arbitration.
2103 ** Then it will execute SCRIPTS instruction until
2104 ** the next instruction that checks SCSI phase.
2105 ** Then will stop and wait for selection to be
2106 ** complete or selection time-out to occur.
2107 ** As a result the SCRIPTS instructions until
2108 ** LOADPOS + 2 should be executed in parallel with
2109 ** the SCSI core performing selection.
2110 */
2111
2112 /*
b0dc1db1 2113 ** The MESSAGE_REJECT problem seems to be due to a selection
1da177e4
LT		 2114 ** timing problem.
2115 ** Wait immediately for the selection to complete.
2116 ** (2.5x behaves so)
2117 */
2118 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2119 0,
2120
2121 /*
2122 ** Next time use the next slot.
2123 */
2124 SCR_COPY (4),
2125 RADDR (temp),
2126 PADDR (startpos),
2127 /*
2128 ** The ncr doesn't have an indirect load
2129 ** or store command. So we have to
2130 ** copy part of the control block to a
2131 ** fixed place, where we can access it.
2132 **
2133 ** We patch the address part of a
2134 ** COPY command with the DSA-register.
2135 */
2136 SCR_COPY_F (4),
2137 RADDR (dsa),
2138 PADDR (loadpos),
2139 /*
2140 ** Flush script prefetch if required
2141 */
2142 PREFETCH_FLUSH
2143 /*
2144 ** then we do the actual copy.
2145 */
2146 SCR_COPY (sizeof (struct head)),
2147 /*
2148 ** continued after the next label ...
2149 */
2150}/*-------------------------< LOADPOS >---------------------*/,{
2151 0,
2152 NADDR (header),
2153 /*
2154 ** Wait for the next phase or the selection
2155 ** to complete or time-out.
2156 */
2157 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2158 PADDR (prepare),
2159
2160}/*-------------------------< SEND_IDENT >----------------------*/,{
2161 /*
2162 ** Selection complete.
2163 ** Send the IDENTIFY and SIMPLE_TAG messages
b0dc1db1 2164 ** (and the EXTENDED_SDTR message)
1da177e4
LT		 2165 */
2166 SCR_MOVE_TBL ^ SCR_MSG_OUT,
2167 offsetof (struct dsb, smsg),
2168 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2169 PADDRH (resend_ident),
2170 SCR_LOAD_REG (scratcha, 0x80),
2171 0,
2172 SCR_COPY (1),
2173 RADDR (scratcha),
2174 NADDR (lastmsg),
2175}/*-------------------------< PREPARE >----------------------*/,{
2176 /*
2177 ** load the savep (saved pointer) into
2178 ** the TEMP register (actual pointer)
2179 */
2180 SCR_COPY (4),
2181 NADDR (header.savep),
2182 RADDR (temp),
2183 /*
2184 ** Initialize the status registers
2185 */
2186 SCR_COPY (4),
2187 NADDR (header.status),
2188 RADDR (scr0),
2189}/*-------------------------< PREPARE2 >---------------------*/,{
2190 /*
2191 ** Initialize the msgout buffer with a NOOP message.
2192 */
b0dc1db1 2193 SCR_LOAD_REG (scratcha, NOP),
1da177e4
LT		 2194 0,
2195 SCR_COPY (1),
2196 RADDR (scratcha),
2197 NADDR (msgout),
2198#if 0
2199 SCR_COPY (1),
2200 RADDR (scratcha),
2201 NADDR (msgin),
2202#endif
2203 /*
2204 ** Anticipate the COMMAND phase.
2205 ** This is the normal case for initial selection.
2206 */
2207 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
2208 PADDR (dispatch),
2209
2210}/*-------------------------< COMMAND >--------------------*/,{
2211 /*
2212 ** ... and send the command
2213 */
2214 SCR_MOVE_TBL ^ SCR_COMMAND,
2215 offsetof (struct dsb, cmd),
2216 /*
2217 ** If status is still HS_NEGOTIATE, negotiation failed.
2218 ** We check this here, since we want to do that
2219 ** only once.
2220 */
2221 SCR_FROM_REG (HS_REG),
2222 0,
2223 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2224 SIR_NEGO_FAILED,
2225
2226}/*-----------------------< DISPATCH >----------------------*/,{
2227 /*
2228 ** MSG_IN is the only phase that shall be
2229 ** entered at least once for each (re)selection.
2230 ** So we test it first.
2231 */
2232 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
2233 PADDR (msg_in),
2234
2235 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_OUT)),
2236 0,
2237 /*
2238 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 4.
2239 ** Possible data corruption during Memory Write and Invalidate.
2240 ** This work-around resets the addressing logic prior to the
2241 ** start of the first MOVE of a DATA IN phase.
2242 ** (See Documentation/scsi/ncr53c8xx.txt for more information)
2243 */
2244 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
2245 20,
2246 SCR_COPY (4),
2247 RADDR (scratcha),
2248 RADDR (scratcha),
2249 SCR_RETURN,
2250 0,
2251 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
2252 PADDR (status),
2253 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
2254 PADDR (command),
2255 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
2256 PADDR (msg_out),
2257 /*
2258 ** Discard one illegal phase byte, if required.
2259 */
2260 SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
2261 0,
2262 SCR_COPY (1),
2263 RADDR (scratcha),
2264 NADDR (xerr_st),
2265 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
2266 8,
2267 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
2268 NADDR (scratch),
2269 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
2270 8,
2271 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
2272 NADDR (scratch),
2273 SCR_JUMP,
2274 PADDR (dispatch),
2275
2276}/*-------------------------< CLRACK >----------------------*/,{
2277 /*
2278 ** Terminate possible pending message phase.
2279 */
2280 SCR_CLR (SCR_ACK),
2281 0,
2282 SCR_JUMP,
2283 PADDR (dispatch),
2284
2285}/*-------------------------< NO_DATA >--------------------*/,{
2286 /*
2287 ** The target wants to tranfer too much data
2288 ** or in the wrong direction.
2289 ** Remember that in extended error.
2290 */
2291 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
2292 0,
2293 SCR_COPY (1),
2294 RADDR (scratcha),
2295 NADDR (xerr_st),
2296 /*
2297 ** Discard one data byte, if required.
2298 */
2299 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2300 8,
2301 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
2302 NADDR (scratch),
2303 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
2304 8,
2305 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
2306 NADDR (scratch),
2307 /*
2308 ** .. and repeat as required.
2309 */
2310 SCR_CALL,
2311 PADDR (dispatch),
2312 SCR_JUMP,
2313 PADDR (no_data),
2314
2315}/*-------------------------< STATUS >--------------------*/,{
2316 /*
2317 ** get the status
2318 */
2319 SCR_MOVE_ABS (1) ^ SCR_STATUS,
2320 NADDR (scratch),
2321 /*
2322 ** save status to scsi_status.
2323 ** mark as complete.
2324 */
2325 SCR_TO_REG (SS_REG),
2326 0,
2327 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
2328 0,
2329 SCR_JUMP,
2330 PADDR (dispatch),
2331}/*-------------------------< MSG_IN >--------------------*/,{
2332 /*
2333 ** Get the first byte of the message
2334 ** and save it to SCRATCHA.
2335 **
2336 ** The script processor doesn't negate the
2337 ** ACK signal after this transfer.
2338 */
2339 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2340 NADDR (msgin[0]),
2341}/*-------------------------< MSG_IN2 >--------------------*/,{
2342 /*
2343 ** Handle this message.
2344 */
b0dc1db1 2345 SCR_JUMP ^ IFTRUE (DATA (COMMAND_COMPLETE)),
1da177e4 2346 PADDR (complete),
b0dc1db1 2347 SCR_JUMP ^ IFTRUE (DATA (DISCONNECT)),
1da177e4 2348 PADDR (disconnect),
b0dc1db1 2349 SCR_JUMP ^ IFTRUE (DATA (SAVE_POINTERS)),
1da177e4 2350 PADDR (save_dp),
b0dc1db1 2351 SCR_JUMP ^ IFTRUE (DATA (RESTORE_POINTERS)),
1da177e4 2352 PADDR (restore_dp),
b0dc1db1 2353 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_MESSAGE)),
1da177e4 2354 PADDRH (msg_extended),
b0dc1db1 2355 SCR_JUMP ^ IFTRUE (DATA (NOP)),
1da177e4 2356 PADDR (clrack),
b0dc1db1 2357 SCR_JUMP ^ IFTRUE (DATA (MESSAGE_REJECT)),
1da177e4 2358 PADDRH (msg_reject),
b0dc1db1 2359 SCR_JUMP ^ IFTRUE (DATA (IGNORE_WIDE_RESIDUE)),
1da177e4
LT		 2360 PADDRH (msg_ign_residue),
2361 /*
2362 ** Rest of the messages left as
2363 ** an exercise ...
2364 **
2365 ** Unimplemented messages:
2366 ** fall through to MSG_BAD.
2367 */
2368}/*-------------------------< MSG_BAD >------------------*/,{
2369 /*
2370 ** unimplemented message - reject it.
2371 */
2372 SCR_INT,
2373 SIR_REJECT_SENT,
b0dc1db1 2374 SCR_LOAD_REG (scratcha, MESSAGE_REJECT),
1da177e4
LT		 2375 0,
2376}/*-------------------------< SETMSG >----------------------*/,{
2377 SCR_COPY (1),
2378 RADDR (scratcha),
2379 NADDR (msgout),
2380 SCR_SET (SCR_ATN),
2381 0,
2382 SCR_JUMP,
2383 PADDR (clrack),
2384}/*-------------------------< CLEANUP >-------------------*/,{
2385 /*
2386 ** dsa: Pointer to ccb
2387 ** or xxxxxxFF (no ccb)
2388 **
2389 ** HS_REG: Host-Status (<>0!)
2390 */
2391 SCR_FROM_REG (dsa),
2392 0,
2393 SCR_JUMP ^ IFTRUE (DATA (0xff)),
2394 PADDR (start),
2395 /*
2396 ** dsa is valid.
2397 ** complete the cleanup.
2398 */
2399 SCR_JUMP,
2400 PADDR (cleanup_ok),
2401
2402}/*-------------------------< COMPLETE >-----------------*/,{
2403 /*
2404 ** Complete message.
2405 **
2406 ** Copy TEMP register to LASTP in header.
2407 */
2408 SCR_COPY (4),
2409 RADDR (temp),
2410 NADDR (header.lastp),
2411 /*
2412 ** When we terminate the cycle by clearing ACK,
2413 ** the target may disconnect immediately.
2414 **
2415 ** We don't want to be told of an
2416 ** "unexpected disconnect",
2417 ** so we disable this feature.
2418 */
2419 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2420 0,
2421 /*
2422 ** Terminate cycle ...
2423 */
2424 SCR_CLR (SCR_ACK|SCR_ATN),
2425 0,
2426 /*
2427 ** ... and wait for the disconnect.
2428 */
2429 SCR_WAIT_DISC,
2430 0,
2431}/*-------------------------< CLEANUP_OK >----------------*/,{
2432 /*
2433 ** Save host status to header.
2434 */
2435 SCR_COPY (4),
2436 RADDR (scr0),
2437 NADDR (header.status),
2438 /*
2439 ** and copy back the header to the ccb.
2440 */
2441 SCR_COPY_F (4),
2442 RADDR (dsa),
2443 PADDR (cleanup0),
2444 /*
2445 ** Flush script prefetch if required
2446 */
2447 PREFETCH_FLUSH
2448 SCR_COPY (sizeof (struct head)),
2449 NADDR (header),
2450}/*-------------------------< CLEANUP0 >--------------------*/,{
2451 0,
2452}/*-------------------------< SIGNAL >----------------------*/,{
2453 /*
2454 ** if job not completed ...
2455 */
2456 SCR_FROM_REG (HS_REG),
2457 0,
2458 /*
2459 ** ... start the next command.
2460 */
2461 SCR_JUMP ^ IFTRUE (MASK (0, (HS_DONEMASK|HS_SKIPMASK))),
2462 PADDR(start),
2463 /*
2464 ** If command resulted in not GOOD status,
2465 ** call the C code if needed.
2466 */
2467 SCR_FROM_REG (SS_REG),
2468 0,
2469 SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
2470 PADDRH (bad_status),
2471
2472#ifndef SCSI_NCR_CCB_DONE_SUPPORT
2473
2474 /*
2475 ** ... signal completion to the host
2476 */
2477 SCR_INT,
2478 SIR_INTFLY,
2479 /*
2480 ** Auf zu neuen Schandtaten!
2481 */
2482 SCR_JUMP,
2483 PADDR(start),
2484
2485#else /* defined SCSI_NCR_CCB_DONE_SUPPORT */
2486
2487 /*
2488 ** ... signal completion to the host
2489 */
2490 SCR_JUMP,
2491}/*------------------------< DONE_POS >---------------------*/,{
2492 PADDRH (done_queue),
2493}/*------------------------< DONE_PLUG >--------------------*/,{
2494 SCR_INT,
2495 SIR_DONE_OVERFLOW,
2496}/*------------------------< DONE_END >---------------------*/,{
2497 SCR_INT,
2498 SIR_INTFLY,
2499 SCR_COPY (4),
2500 RADDR (temp),
2501 PADDR (done_pos),
2502 SCR_JUMP,
2503 PADDR (start),
2504
2505#endif /* SCSI_NCR_CCB_DONE_SUPPORT */
2506
2507}/*-------------------------< SAVE_DP >------------------*/,{
2508 /*
2509 ** SAVE_DP message:
2510 ** Copy TEMP register to SAVEP in header.
2511 */
2512 SCR_COPY (4),
2513 RADDR (temp),
2514 NADDR (header.savep),
2515 SCR_CLR (SCR_ACK),
2516 0,
2517 SCR_JUMP,
2518 PADDR (dispatch),
2519}/*-------------------------< RESTORE_DP >---------------*/,{
2520 /*
2521 ** RESTORE_DP message:
2522 ** Copy SAVEP in header to TEMP register.
2523 */
2524 SCR_COPY (4),
2525 NADDR (header.savep),
2526 RADDR (temp),
2527 SCR_JUMP,
2528 PADDR (clrack),
2529
2530}/*-------------------------< DISCONNECT >---------------*/,{
2531 /*
2532 ** DISCONNECTing ...
2533 **
2534 ** disable the "unexpected disconnect" feature,
2535 ** and remove the ACK signal.
2536 */
2537 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2538 0,
2539 SCR_CLR (SCR_ACK|SCR_ATN),
2540 0,
2541 /*
2542 ** Wait for the disconnect.
2543 */
2544 SCR_WAIT_DISC,
2545 0,
2546 /*
2547 ** Status is: DISCONNECTED.
2548 */
2549 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
2550 0,
2551 SCR_JUMP,
2552 PADDR (cleanup_ok),
2553
2554}/*-------------------------< MSG_OUT >-------------------*/,{
2555 /*
2556 ** The target requests a message.
2557 */
2558 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2559 NADDR (msgout),
2560 SCR_COPY (1),
2561 NADDR (msgout),
2562 NADDR (lastmsg),
2563 /*
2564 ** If it was no ABORT message ...
2565 */
b0dc1db1 2566 SCR_JUMP ^ IFTRUE (DATA (ABORT_TASK_SET)),
1da177e4
LT		 2567 PADDRH (msg_out_abort),
2568 /*
2569 ** ... wait for the next phase
2570 ** if it's a message out, send it again, ...
2571 */
2572 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2573 PADDR (msg_out),
2574}/*-------------------------< MSG_OUT_DONE >--------------*/,{
2575 /*
2576 ** ... else clear the message ...
2577 */
b0dc1db1 2578 SCR_LOAD_REG (scratcha, NOP),
1da177e4
LT		 2579 0,
2580 SCR_COPY (4),
2581 RADDR (scratcha),
2582 NADDR (msgout),
2583 /*
2584 ** ... and process the next phase
2585 */
2586 SCR_JUMP,
2587 PADDR (dispatch),
2588}/*-------------------------< IDLE >------------------------*/,{
2589 /*
2590 ** Nothing to do?
2591 ** Wait for reselect.
2592 ** This NOP will be patched with LED OFF
2593 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
2594 */
2595 SCR_NO_OP,
2596 0,
2597}/*-------------------------< RESELECT >--------------------*/,{
2598 /*
2599 ** make the DSA invalid.
2600 */
2601 SCR_LOAD_REG (dsa, 0xff),
2602 0,
2603 SCR_CLR (SCR_TRG),
2604 0,
2605 SCR_LOAD_REG (HS_REG, HS_IN_RESELECT),
2606 0,
2607 /*
2608 ** Sleep waiting for a reselection.
2609 ** If SIGP is set, special treatment.
2610 **
2611 ** Zu allem bereit ..
2612 */
2613 SCR_WAIT_RESEL,
2614 PADDR(start),
2615}/*-------------------------< RESELECTED >------------------*/,{
2616 /*
2617 ** This NOP will be patched with LED ON
2618 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2619 */
2620 SCR_NO_OP,
2621 0,
2622 /*
2623 ** ... zu nichts zu gebrauchen ?
2624 **
2625 ** load the target id into the SFBR
2626 ** and jump to the control block.
2627 **
2628 ** Look at the declarations of
2629 ** - struct ncb
2630 ** - struct tcb
2631 ** - struct lcb
2632 ** - struct ccb
2633 ** to understand what's going on.
2634 */
2635 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
2636 0,
2637 SCR_TO_REG (sdid),
2638 0,
2639 SCR_JUMP,
2640 NADDR (jump_tcb),
2641
2642}/*-------------------------< RESEL_DSA >-------------------*/,{
2643 /*
2644 ** Ack the IDENTIFY or TAG previously received.
2645 */
2646 SCR_CLR (SCR_ACK),
2647 0,
2648 /*
2649 ** The ncr doesn't have an indirect load
2650 ** or store command. So we have to
2651 ** copy part of the control block to a
2652 ** fixed place, where we can access it.
2653 **
2654 ** We patch the address part of a
2655 ** COPY command with the DSA-register.
2656 */
2657 SCR_COPY_F (4),
2658 RADDR (dsa),
2659 PADDR (loadpos1),
2660 /*
2661 ** Flush script prefetch if required
2662 */
2663 PREFETCH_FLUSH
2664 /*
2665 ** then we do the actual copy.
2666 */
2667 SCR_COPY (sizeof (struct head)),
2668 /*
2669 ** continued after the next label ...
2670 */
2671
2672}/*-------------------------< LOADPOS1 >-------------------*/,{
2673 0,
2674 NADDR (header),
2675 /*
2676 ** The DSA contains the data structure address.
2677 */
2678 SCR_JUMP,
2679 PADDR (prepare),
2680
2681}/*-------------------------< RESEL_LUN >-------------------*/,{
2682 /*
2683 ** come back to this point
2684 ** to get an IDENTIFY message
2685 ** Wait for a msg_in phase.
2686 */
2687 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
2688 SIR_RESEL_NO_MSG_IN,
2689 /*
2690 ** message phase.
2691 ** Read the data directly from the BUS DATA lines.
2692 ** This helps to support very old SCSI devices that
2693 ** may reselect without sending an IDENTIFY.
2694 */
2695 SCR_FROM_REG (sbdl),
2696 0,
2697 /*
2698 ** It should be an Identify message.
2699 */
2700 SCR_RETURN,
2701 0,
2702}/*-------------------------< RESEL_TAG >-------------------*/,{
2703 /*
2704 ** Read IDENTIFY + SIMPLE + TAG using a single MOVE.
2705 ** Agressive optimization, is'nt it?
2706 ** No need to test the SIMPLE TAG message, since the
2707 ** driver only supports conformant devices for tags. ;-)
2708 */
2709 SCR_MOVE_ABS (3) ^ SCR_MSG_IN,
2710 NADDR (msgin),
2711 /*
2712 ** Read the TAG from the SIDL.
2713 ** Still an aggressive optimization. ;-)
2714 ** Compute the CCB indirect jump address which
2715 ** is (#TAG*2 & 0xfc) due to tag numbering using
2716 ** 1,3,5..MAXTAGS*2+1 actual values.
2717 */
2718 SCR_REG_SFBR (sidl, SCR_SHL, 0),
2719 0,
2720 SCR_SFBR_REG (temp, SCR_AND, 0xfc),
2721 0,
2722}/*-------------------------< JUMP_TO_NEXUS >-------------------*/,{
2723 SCR_COPY_F (4),
2724 RADDR (temp),
2725 PADDR (nexus_indirect),
2726 /*
2727 ** Flush script prefetch if required
2728 */
2729 PREFETCH_FLUSH
2730 SCR_COPY (4),
2731}/*-------------------------< NEXUS_INDIRECT >-------------------*/,{
2732 0,
2733 RADDR (temp),
2734 SCR_RETURN,
2735 0,
2736}/*-------------------------< RESEL_NOTAG >-------------------*/,{
2737 /*
2738 ** No tag expected.
2739 ** Read an throw away the IDENTIFY.
2740 */
2741 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2742 NADDR (msgin),
2743 SCR_JUMP,
2744 PADDR (jump_to_nexus),
2745}/*-------------------------< DATA_IN >--------------------*/,{
2746/*
2747** Because the size depends on the
2748** #define MAX_SCATTERL parameter,
2749** it is filled in at runtime.
2750**
2751** ##===========< i=0; i<MAX_SCATTERL >=========
2752** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2753** || PADDR (dispatch),
2754** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2755** || offsetof (struct dsb, data[ i]),
2756** ##==========================================
2757**
2758**---------------------------------------------------------
2759*/
27600
2761}/*-------------------------< DATA_IN2 >-------------------*/,{
2762 SCR_CALL,
2763 PADDR (dispatch),
2764 SCR_JUMP,
2765 PADDR (no_data),
2766}/*-------------------------< DATA_OUT >--------------------*/,{
2767/*
2768** Because the size depends on the
2769** #define MAX_SCATTERL parameter,
2770** it is filled in at runtime.
2771**
2772** ##===========< i=0; i<MAX_SCATTERL >=========
2773** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2774** || PADDR (dispatch),
2775** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2776** || offsetof (struct dsb, data[ i]),
2777** ##==========================================
2778**
2779**---------------------------------------------------------
2780*/
27810
2782}/*-------------------------< DATA_OUT2 >-------------------*/,{
2783 SCR_CALL,
2784 PADDR (dispatch),
2785 SCR_JUMP,
2786 PADDR (no_data),
2787}/*--------------------------------------------------------*/
2788};
2789
2790static struct scripth scripth0 __initdata = {
2791/*-------------------------< TRYLOOP >---------------------*/{
2792/*
2793** Start the next entry.
2794** Called addresses point to the launch script in the CCB.
2795** They are patched by the main processor.
2796**
2797** Because the size depends on the
2798** #define MAX_START parameter, it is filled
2799** in at runtime.
2800**
2801**-----------------------------------------------------------
2802**
2803** ##===========< I=0; i<MAX_START >===========
2804** || SCR_CALL,
2805** || PADDR (idle),
2806** ##==========================================
2807**
2808**-----------------------------------------------------------
2809*/
28100
2811}/*------------------------< TRYLOOP2 >---------------------*/,{
2812 SCR_JUMP,
2813 PADDRH(tryloop),
2814
2815#ifdef SCSI_NCR_CCB_DONE_SUPPORT
2816
2817}/*------------------------< DONE_QUEUE >-------------------*/,{
2818/*
2819** Copy the CCB address to the next done entry.
2820** Because the size depends on the
2821** #define MAX_DONE parameter, it is filled
2822** in at runtime.
2823**
2824**-----------------------------------------------------------
2825**
2826** ##===========< I=0; i<MAX_DONE >===========
2827** || SCR_COPY (sizeof(struct ccb *),
2828** || NADDR (header.cp),
2829** || NADDR (ccb_done[i]),
2830** || SCR_CALL,
2831** || PADDR (done_end),
2832** ##==========================================
2833**
2834**-----------------------------------------------------------
2835*/
28360
2837}/*------------------------< DONE_QUEUE2 >------------------*/,{
2838 SCR_JUMP,
2839 PADDRH (done_queue),
2840
2841#endif /* SCSI_NCR_CCB_DONE_SUPPORT */
2842}/*------------------------< SELECT_NO_ATN >-----------------*/,{
2843 /*
2844 ** Set Initiator mode.
2845 ** And try to select this target without ATN.
2846 */
2847
2848 SCR_CLR (SCR_TRG),
2849 0,
2850 SCR_LOAD_REG (HS_REG, HS_SELECTING),
2851 0,
2852 SCR_SEL_TBL ^ offsetof (struct dsb, select),
2853 PADDR (reselect),
2854 SCR_JUMP,
2855 PADDR (select2),
2856
2857}/*-------------------------< CANCEL >------------------------*/,{
2858
2859 SCR_LOAD_REG (scratcha, HS_ABORTED),
2860 0,
2861 SCR_JUMPR,
2862 8,
2863}/*-------------------------< SKIP >------------------------*/,{
2864 SCR_LOAD_REG (scratcha, 0),
2865 0,
2866 /*
2867 ** This entry has been canceled.
2868 ** Next time use the next slot.
2869 */
2870 SCR_COPY (4),
2871 RADDR (temp),
2872 PADDR (startpos),
2873 /*
2874 ** The ncr doesn't have an indirect load
2875 ** or store command. So we have to
2876 ** copy part of the control block to a
2877 ** fixed place, where we can access it.
2878 **
2879 ** We patch the address part of a
2880 ** COPY command with the DSA-register.
2881 */
2882 SCR_COPY_F (4),
2883 RADDR (dsa),
2884 PADDRH (skip2),
2885 /*
2886 ** Flush script prefetch if required
2887 */
2888 PREFETCH_FLUSH
2889 /*
2890 ** then we do the actual copy.
2891 */
2892 SCR_COPY (sizeof (struct head)),
2893 /*
2894 ** continued after the next label ...
2895 */
2896}/*-------------------------< SKIP2 >---------------------*/,{
2897 0,
2898 NADDR (header),
2899 /*
2900 ** Initialize the status registers
2901 */
2902 SCR_COPY (4),
2903 NADDR (header.status),
2904 RADDR (scr0),
2905 /*
2906 ** Force host status.
2907 */
2908 SCR_FROM_REG (scratcha),
2909 0,
2910 SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
2911 16,
2912 SCR_REG_REG (HS_REG, SCR_OR, HS_SKIPMASK),
2913 0,
2914 SCR_JUMPR,
2915 8,
2916 SCR_TO_REG (HS_REG),
2917 0,
2918 SCR_LOAD_REG (SS_REG, S_GOOD),
2919 0,
2920 SCR_JUMP,
2921 PADDR (cleanup_ok),
2922
2923},/*-------------------------< PAR_ERR_DATA_IN >---------------*/{
2924 /*
2925 ** Ignore all data in byte, until next phase
2926 */
2927 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2928 PADDRH (par_err_other),
2929 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
2930 NADDR (scratch),
2931 SCR_JUMPR,
2932 -24,
2933},/*-------------------------< PAR_ERR_OTHER >------------------*/{
2934 /*
2935 ** count it.
2936 */
2937 SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2938 0,
2939 /*
2940 ** jump to dispatcher.
2941 */
2942 SCR_JUMP,
2943 PADDR (dispatch),
2944}/*-------------------------< MSG_REJECT >---------------*/,{
2945 /*
2946 ** If a negotiation was in progress,
2947 ** negotiation failed.
2948 ** Otherwise, let the C code print
2949 ** some message.
2950 */
2951 SCR_FROM_REG (HS_REG),
2952 0,
2953 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2954 SIR_REJECT_RECEIVED,
2955 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2956 SIR_NEGO_FAILED,
2957 SCR_JUMP,
2958 PADDR (clrack),
2959
2960}/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2961 /*
2962 ** Terminate cycle
2963 */
2964 SCR_CLR (SCR_ACK),
2965 0,
2966 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2967 PADDR (dispatch),
2968 /*
2969 ** get residue size.
2970 */
2971 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2972 NADDR (msgin[1]),
2973 /*
2974 ** Size is 0 .. ignore message.
2975 */
2976 SCR_JUMP ^ IFTRUE (DATA (0)),
2977 PADDR (clrack),
2978 /*
2979 ** Size is not 1 .. have to interrupt.
2980 */
2981 SCR_JUMPR ^ IFFALSE (DATA (1)),
2982 40,
2983 /*
2984 ** Check for residue byte in swide register
2985 */
2986 SCR_FROM_REG (scntl2),
2987 0,
2988 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2989 16,
2990 /*
2991 ** There IS data in the swide register.
2992 ** Discard it.
2993 */
2994 SCR_REG_REG (scntl2, SCR_OR, WSR),
2995 0,
2996 SCR_JUMP,
2997 PADDR (clrack),
2998 /*
2999 ** Load again the size to the sfbr register.
3000 */
3001 SCR_FROM_REG (scratcha),
3002 0,
3003 SCR_INT,
3004 SIR_IGN_RESIDUE,
3005 SCR_JUMP,
3006 PADDR (clrack),
3007
3008}/*-------------------------< MSG_EXTENDED >-------------*/,{
3009 /*
3010 ** Terminate cycle
3011 */
3012 SCR_CLR (SCR_ACK),
3013 0,
3014 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3015 PADDR (dispatch),
3016 /*
3017 ** get length.
3018 */
3019 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3020 NADDR (msgin[1]),
3021 /*
3022 */
3023 SCR_JUMP ^ IFTRUE (DATA (3)),
3024 PADDRH (msg_ext_3),
3025 SCR_JUMP ^ IFFALSE (DATA (2)),
3026 PADDR (msg_bad),
3027}/*-------------------------< MSG_EXT_2 >----------------*/,{
3028 SCR_CLR (SCR_ACK),
3029 0,
3030 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3031 PADDR (dispatch),
3032 /*
3033 ** get extended message code.
3034 */
3035 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3036 NADDR (msgin[2]),
b0dc1db1 3037 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_WDTR)),
1da177e4
LT		 3038 PADDRH (msg_wdtr),
3039 /*
3040 ** unknown extended message
3041 */
3042 SCR_JUMP,
3043 PADDR (msg_bad)
3044}/*-------------------------< MSG_WDTR >-----------------*/,{
3045 SCR_CLR (SCR_ACK),
3046 0,
3047 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3048 PADDR (dispatch),
3049 /*
3050 ** get data bus width
3051 */
3052 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3053 NADDR (msgin[3]),
3054 /*
3055 ** let the host do the real work.
3056 */
3057 SCR_INT,
3058 SIR_NEGO_WIDE,
3059 /*
3060 ** let the target fetch our answer.
3061 */
3062 SCR_SET (SCR_ATN),
3063 0,
3064 SCR_CLR (SCR_ACK),
3065 0,
3066 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3067 PADDRH (nego_bad_phase),
3068
3069}/*-------------------------< SEND_WDTR >----------------*/,{
3070 /*
b0dc1db1 3071 ** Send the EXTENDED_WDTR
1da177e4
LT		 3072 */
3073 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
3074 NADDR (msgout),
3075 SCR_COPY (1),
3076 NADDR (msgout),
3077 NADDR (lastmsg),
3078 SCR_JUMP,
3079 PADDR (msg_out_done),
3080
3081}/*-------------------------< MSG_EXT_3 >----------------*/,{
3082 SCR_CLR (SCR_ACK),
3083 0,
3084 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3085 PADDR (dispatch),
3086 /*
3087 ** get extended message code.
3088 */
3089 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3090 NADDR (msgin[2]),
b0dc1db1 3091 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_SDTR)),
1da177e4
LT		 3092 PADDRH (msg_sdtr),
3093 /*
3094 ** unknown extended message
3095 */
3096 SCR_JUMP,
3097 PADDR (msg_bad)
3098
3099}/*-------------------------< MSG_SDTR >-----------------*/,{
3100 SCR_CLR (SCR_ACK),
3101 0,
3102 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3103 PADDR (dispatch),
3104 /*
3105 ** get period and offset
3106 */
3107 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
3108 NADDR (msgin[3]),
3109 /*
3110 ** let the host do the real work.
3111 */
3112 SCR_INT,
3113 SIR_NEGO_SYNC,
3114 /*
3115 ** let the target fetch our answer.
3116 */
3117 SCR_SET (SCR_ATN),
3118 0,
3119 SCR_CLR (SCR_ACK),
3120 0,
3121 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3122 PADDRH (nego_bad_phase),
3123
3124}/*-------------------------< SEND_SDTR >-------------*/,{
3125 /*
b0dc1db1 3126 ** Send the EXTENDED_SDTR
1da177e4
LT		 3127 */
3128 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
3129 NADDR (msgout),
3130 SCR_COPY (1),
3131 NADDR (msgout),
3132 NADDR (lastmsg),
3133 SCR_JUMP,
3134 PADDR (msg_out_done),
3135
3136}/*-------------------------< NEGO_BAD_PHASE >------------*/,{
3137 SCR_INT,
3138 SIR_NEGO_PROTO,
3139 SCR_JUMP,
3140 PADDR (dispatch),
3141
3142}/*-------------------------< MSG_OUT_ABORT >-------------*/,{
3143 /*
3144 ** After ABORT message,
3145 **
3146 ** expect an immediate disconnect, ...
3147 */
3148 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3149 0,
3150 SCR_CLR (SCR_ACK|SCR_ATN),
3151 0,
3152 SCR_WAIT_DISC,
3153 0,
3154 /*
3155 ** ... and set the status to "ABORTED"
3156 */
3157 SCR_LOAD_REG (HS_REG, HS_ABORTED),
3158 0,
3159 SCR_JUMP,
3160 PADDR (cleanup),
3161
3162}/*-------------------------< HDATA_IN >-------------------*/,{
3163/*
3164** Because the size depends on the
3165** #define MAX_SCATTERH parameter,
3166** it is filled in at runtime.
3167**
3168** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >==
3169** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
3170** || PADDR (dispatch),
3171** || SCR_MOVE_TBL ^ SCR_DATA_IN,
3172** || offsetof (struct dsb, data[ i]),
3173** ##===================================================
3174**
3175**---------------------------------------------------------
3176*/
31770
3178}/*-------------------------< HDATA_IN2 >------------------*/,{
3179 SCR_JUMP,
3180 PADDR (data_in),
3181
3182}/*-------------------------< HDATA_OUT >-------------------*/,{
3183/*
3184** Because the size depends on the
3185** #define MAX_SCATTERH parameter,
3186** it is filled in at runtime.
3187**
3188** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >==
3189** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
3190** || PADDR (dispatch),
3191** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
3192** || offsetof (struct dsb, data[ i]),
3193** ##===================================================
3194**
3195**---------------------------------------------------------
3196*/
31970
3198}/*-------------------------< HDATA_OUT2 >------------------*/,{
3199 SCR_JUMP,
3200 PADDR (data_out),
3201
3202}/*-------------------------< RESET >----------------------*/,{
3203 /*
b0dc1db1 3204 ** Send a TARGET_RESET message if bad IDENTIFY
1da177e4
LT		 3205 ** received on reselection.
3206 */
b0dc1db1 3207 SCR_LOAD_REG (scratcha, ABORT_TASK),
1da177e4
LT		 3208 0,
3209 SCR_JUMP,
3210 PADDRH (abort_resel),
3211}/*-------------------------< ABORTTAG >-------------------*/,{
3212 /*
3213 ** Abort a wrong tag received on reselection.
3214 */
b0dc1db1 3215 SCR_LOAD_REG (scratcha, ABORT_TASK),
1da177e4
LT		 3216 0,
3217 SCR_JUMP,
3218 PADDRH (abort_resel),
3219}/*-------------------------< ABORT >----------------------*/,{
3220 /*
3221 ** Abort a reselection when no active CCB.
3222 */
b0dc1db1 3223 SCR_LOAD_REG (scratcha, ABORT_TASK_SET),
1da177e4
LT		 3224 0,
3225}/*-------------------------< ABORT_RESEL >----------------*/,{
3226 SCR_COPY (1),
3227 RADDR (scratcha),
3228 NADDR (msgout),
3229 SCR_SET (SCR_ATN),
3230 0,
3231 SCR_CLR (SCR_ACK),
3232 0,
3233 /*
3234 ** and send it.
3235 ** we expect an immediate disconnect
3236 */
3237 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3238 0,
3239 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
3240 NADDR (msgout),
3241 SCR_COPY (1),
3242 NADDR (msgout),
3243 NADDR (lastmsg),
3244 SCR_CLR (SCR_ACK|SCR_ATN),
3245 0,
3246 SCR_WAIT_DISC,
3247 0,
3248 SCR_JUMP,
3249 PADDR (start),
3250}/*-------------------------< RESEND_IDENT >-------------------*/,{
3251 /*
3252 ** The target stays in MSG OUT phase after having acked
3253 ** Identify [+ Tag [+ Extended message ]]. Targets shall
3254 ** behave this way on parity error.
3255 ** We must send it again all the messages.
3256 */
3257 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */
3258 0, /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */
3259 SCR_JUMP,
3260 PADDR (send_ident),
3261}/*-------------------------< CLRATN_GO_ON >-------------------*/,{
3262 SCR_CLR (SCR_ATN),
3263 0,
3264 SCR_JUMP,
3265}/*-------------------------< NXTDSP_GO_ON >-------------------*/,{
3266 0,
3267}/*-------------------------< SDATA_IN >-------------------*/,{
3268 SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
3269 PADDR (dispatch),
3270 SCR_MOVE_TBL ^ SCR_DATA_IN,
3271 offsetof (struct dsb, sense),
3272 SCR_CALL,
3273 PADDR (dispatch),
3274 SCR_JUMP,
3275 PADDR (no_data),
3276}/*-------------------------< DATA_IO >--------------------*/,{
3277 /*
3278 ** We jump here if the data direction was unknown at the
3279 ** time we had to queue the command to the scripts processor.
3280 ** Pointers had been set as follow in this situation:
3281 ** savep --> DATA_IO
3282 ** lastp --> start pointer when DATA_IN
3283 ** goalp --> goal pointer when DATA_IN
3284 ** wlastp --> start pointer when DATA_OUT
3285 ** wgoalp --> goal pointer when DATA_OUT
3286 ** This script sets savep/lastp/goalp according to the
3287 ** direction chosen by the target.
3288 */
3289 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_OUT)),
3290 32,
3291 /*
3292 ** Direction is DATA IN.
3293 ** Warning: we jump here, even when phase is DATA OUT.
3294 */
3295 SCR_COPY (4),
3296 NADDR (header.lastp),
3297 NADDR (header.savep),
3298
3299 /*
3300 ** Jump to the SCRIPTS according to actual direction.
3301 */
3302 SCR_COPY (4),
3303 NADDR (header.savep),
3304 RADDR (temp),
3305 SCR_RETURN,
3306 0,
3307 /*
3308 ** Direction is DATA OUT.
3309 */
3310 SCR_COPY (4),
3311 NADDR (header.wlastp),
3312 NADDR (header.lastp),
3313 SCR_COPY (4),
3314 NADDR (header.wgoalp),
3315 NADDR (header.goalp),
3316 SCR_JUMPR,
3317 -64,
3318}/*-------------------------< BAD_IDENTIFY >---------------*/,{
3319 /*
3320 ** If message phase but not an IDENTIFY,
3321 ** get some help from the C code.
3322 ** Old SCSI device may behave so.
3323 */
3324 SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)),
3325 16,
3326 SCR_INT,
3327 SIR_RESEL_NO_IDENTIFY,
3328 SCR_JUMP,
3329 PADDRH (reset),
3330 /*
3331 ** Message is an IDENTIFY, but lun is unknown.
3332 ** Read the message, since we got it directly
3333 ** from the SCSI BUS data lines.
3334 ** Signal problem to C code for logging the event.
b0dc1db1 3335 ** Send an ABORT_TASK_SET to clear all pending tasks.
1da177e4
LT		 3336 */
3337 SCR_INT,
3338 SIR_RESEL_BAD_LUN,
3339 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3340 NADDR (msgin),
3341 SCR_JUMP,
3342 PADDRH (abort),
3343}/*-------------------------< BAD_I_T_L >------------------*/,{
3344 /*
3345 ** We donnot have a task for that I_T_L.
3346 ** Signal problem to C code for logging the event.
b0dc1db1 3347 ** Send an ABORT_TASK_SET message.
1da177e4
LT		 3348 */
3349 SCR_INT,
3350 SIR_RESEL_BAD_I_T_L,
3351 SCR_JUMP,
3352 PADDRH (abort),
3353}/*-------------------------< BAD_I_T_L_Q >----------------*/,{
3354 /*
3355 ** We donnot have a task that matches the tag.
3356 ** Signal problem to C code for logging the event.
b0dc1db1 3357 ** Send an ABORT_TASK message.
1da177e4
LT		 3358 */
3359 SCR_INT,
3360 SIR_RESEL_BAD_I_T_L_Q,
3361 SCR_JUMP,
3362 PADDRH (aborttag),
3363}/*-------------------------< BAD_TARGET >-----------------*/,{
3364 /*
3365 ** We donnot know the target that reselected us.
3366 ** Grab the first message if any (IDENTIFY).
3367 ** Signal problem to C code for logging the event.
b0dc1db1 3368 ** TARGET_RESET message.
1da177e4
LT		 3369 */
3370 SCR_INT,
3371 SIR_RESEL_BAD_TARGET,
3372 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
3373 8,
3374 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3375 NADDR (msgin),
3376 SCR_JUMP,
3377 PADDRH (reset),
3378}/*-------------------------< BAD_STATUS >-----------------*/,{
3379 /*
3380 ** If command resulted in either QUEUE FULL,
3381 ** CHECK CONDITION or COMMAND TERMINATED,
3382 ** call the C code.
3383 */
3384 SCR_INT ^ IFTRUE (DATA (S_QUEUE_FULL)),
3385 SIR_BAD_STATUS,
3386 SCR_INT ^ IFTRUE (DATA (S_CHECK_COND)),
3387 SIR_BAD_STATUS,
3388 SCR_INT ^ IFTRUE (DATA (S_TERMINATED)),
3389 SIR_BAD_STATUS,
3390 SCR_RETURN,
3391 0,
3392}/*-------------------------< START_RAM >-------------------*/,{
3393 /*
3394 ** Load the script into on-chip RAM,
3395 ** and jump to start point.
3396 */
3397 SCR_COPY_F (4),
3398 RADDR (scratcha),
3399 PADDRH (start_ram0),
3400 /*
3401 ** Flush script prefetch if required
3402 */
3403 PREFETCH_FLUSH
3404 SCR_COPY (sizeof (struct script)),
3405}/*-------------------------< START_RAM0 >--------------------*/,{
3406 0,
3407 PADDR (start),
3408 SCR_JUMP,
3409 PADDR (start),
3410}/*-------------------------< STO_RESTART >-------------------*/,{
3411 /*
3412 **
3413 ** Repair start queue (e.g. next time use the next slot)
3414 ** and jump to start point.
3415 */
3416 SCR_COPY (4),
3417 RADDR (temp),
3418 PADDR (startpos),
3419 SCR_JUMP,
3420 PADDR (start),
3421}/*-------------------------< WAIT_DMA >-------------------*/,{
3422 /*
3423 ** For HP Zalon/53c720 systems, the Zalon interface
3424 ** between CPU and 53c720 does prefetches, which causes
3425 ** problems with self modifying scripts. The problem
3426 ** is overcome by calling a dummy subroutine after each
3427 ** modification, to force a refetch of the script on
3428 ** return from the subroutine.
3429 */
3430 SCR_RETURN,
3431 0,
3432}/*-------------------------< SNOOPTEST >-------------------*/,{
3433 /*
3434 ** Read the variable.
3435 */
3436 SCR_COPY (4),
3437 NADDR(ncr_cache),
3438 RADDR (scratcha),
3439 /*
3440 ** Write the variable.
3441 */
3442 SCR_COPY (4),
3443 RADDR (temp),
3444 NADDR(ncr_cache),
3445 /*
3446 ** Read back the variable.
3447 */
3448 SCR_COPY (4),
3449 NADDR(ncr_cache),
3450 RADDR (temp),
3451}/*-------------------------< SNOOPEND >-------------------*/,{
3452 /*
3453 ** And stop.
3454 */
3455 SCR_INT,
3456 99,
3457}/*--------------------------------------------------------*/
3458};
3459
3460/*==========================================================
3461**
3462**
3463** Fill in #define dependent parts of the script
3464**
3465**
3466**==========================================================
3467*/
3468
3469void __init ncr_script_fill (struct script * scr, struct scripth * scrh)
3470{
3471 int i;
3472 ncrcmd *p;
3473
3474 p = scrh->tryloop;
3475 for (i=0; i<MAX_START; i++) {
3476 *p++ =SCR_CALL;
3477 *p++ =PADDR (idle);
3478 }
3479
3480 BUG_ON((u_long)p != (u_long)&scrh->tryloop + sizeof (scrh->tryloop));
3481
3482#ifdef SCSI_NCR_CCB_DONE_SUPPORT
3483
3484 p = scrh->done_queue;
3485 for (i = 0; i<MAX_DONE; i++) {
3486 *p++ =SCR_COPY (sizeof(struct ccb *));
3487 *p++ =NADDR (header.cp);
3488 *p++ =NADDR (ccb_done[i]);
3489 *p++ =SCR_CALL;
3490 *p++ =PADDR (done_end);
3491 }
3492
3493 BUG_ON((u_long)p != (u_long)&scrh->done_queue+sizeof(scrh->done_queue));
3494
3495#endif /* SCSI_NCR_CCB_DONE_SUPPORT */
3496
3497 p = scrh->hdata_in;
3498 for (i=0; i<MAX_SCATTERH; i++) {
3499 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
3500 *p++ =PADDR (dispatch);
3501 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
3502 *p++ =offsetof (struct dsb, data[i]);
3503 }
3504
3505 BUG_ON((u_long)p != (u_long)&scrh->hdata_in + sizeof (scrh->hdata_in));
3506
3507 p = scr->data_in;
3508 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) {
3509 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
3510 *p++ =PADDR (dispatch);
3511 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
3512 *p++ =offsetof (struct dsb, data[i]);
3513 }
3514
3515 BUG_ON((u_long)p != (u_long)&scr->data_in + sizeof (scr->data_in));
3516
3517 p = scrh->hdata_out;
3518 for (i=0; i<MAX_SCATTERH; i++) {
3519 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
3520 *p++ =PADDR (dispatch);
3521 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
3522 *p++ =offsetof (struct dsb, data[i]);
3523 }
3524
3525 BUG_ON((u_long)p != (u_long)&scrh->hdata_out + sizeof (scrh->hdata_out));
3526
3527 p = scr->data_out;
3528 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) {
3529 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
3530 *p++ =PADDR (dispatch);
3531 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
3532 *p++ =offsetof (struct dsb, data[i]);
3533 }
3534
3535 BUG_ON((u_long) p != (u_long)&scr->data_out + sizeof (scr->data_out));
3536}
3537
3538/*==========================================================
3539**
3540**
3541** Copy and rebind a script.
3542**
3543**
3544**==========================================================
3545*/
3546
3547static void __init
3548ncr_script_copy_and_bind (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len)
3549{
3550 ncrcmd opcode, new, old, tmp1, tmp2;
3551 ncrcmd *start, *end;
3552 int relocs;
3553 int opchanged = 0;
3554
3555 start = src;
3556 end = src + len/4;
3557
3558 while (src < end) {
3559
3560 opcode = *src++;
3561 *dst++ = cpu_to_scr(opcode);
3562
3563 /*
3564 ** If we forget to change the length
3565 ** in struct script, a field will be
3566 ** padded with 0. This is an illegal
3567 ** command.
3568 */
3569
3570 if (opcode == 0) {
3571 printk (KERN_ERR "%s: ERROR0 IN SCRIPT at %d.\n",
3572 ncr_name(np), (int) (src-start-1));
3573 mdelay(1000);
3574 }
3575
3576 if (DEBUG_FLAGS & DEBUG_SCRIPT)
3577 printk (KERN_DEBUG "%p: <%x>\n",
3578 (src-1), (unsigned)opcode);
3579
3580 /*
3581 ** We don't have to decode ALL commands
3582 */
3583 switch (opcode >> 28) {
3584
3585 case 0xc:
3586 /*
3587 ** COPY has TWO arguments.
3588 */
3589 relocs = 2;
3590 tmp1 = src[0];
3591#ifdef RELOC_KVAR
3592 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
3593 tmp1 = 0;
3594#endif
3595 tmp2 = src[1];
3596#ifdef RELOC_KVAR
3597 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
3598 tmp2 = 0;
3599#endif
3600 if ((tmp1 ^ tmp2) & 3) {
3601 printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n",
3602 ncr_name(np), (int) (src-start-1));
3603 mdelay(1000);
3604 }
3605 /*
3606 ** If PREFETCH feature not enabled, remove
3607 ** the NO FLUSH bit if present.
3608 */
3609 if ((opcode & SCR_NO_FLUSH) && !(np->features & FE_PFEN)) {
3610 dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH);
3611 ++opchanged;
3612 }
3613 break;
3614
3615 case 0x0:
3616 /*
3617 ** MOVE (absolute address)
3618 */
3619 relocs = 1;
3620 break;
3621
3622 case 0x8:
3623 /*
3624 ** JUMP / CALL
3625 ** don't relocate if relative :-)
3626 */
3627 if (opcode & 0x00800000)
3628 relocs = 0;
3629 else
3630 relocs = 1;
3631 break;
3632
3633 case 0x4:
3634 case 0x5:
3635 case 0x6:
3636 case 0x7:
3637 relocs = 1;
3638 break;
3639
3640 default:
3641 relocs = 0;
3642 break;
3643 }
3644
3645 if (relocs) {
3646 while (relocs--) {
3647 old = *src++;
3648
3649 switch (old & RELOC_MASK) {
3650 case RELOC_REGISTER:
3651 new = (old & ~RELOC_MASK) + np->paddr;
3652 break;
3653 case RELOC_LABEL:
3654 new = (old & ~RELOC_MASK) + np->p_script;
3655 break;
3656 case RELOC_LABELH:
3657 new = (old & ~RELOC_MASK) + np->p_scripth;
3658 break;
3659 case RELOC_SOFTC:
3660 new = (old & ~RELOC_MASK) + np->p_ncb;
3661 break;
3662#ifdef RELOC_KVAR
3663 case RELOC_KVAR:
3664 if (((old & ~RELOC_MASK) <
3665 SCRIPT_KVAR_FIRST) ||
3666 ((old & ~RELOC_MASK) >
3667 SCRIPT_KVAR_LAST))
3668 panic("ncr KVAR out of range");
3669 new = vtophys(script_kvars[old &
3670 ~RELOC_MASK]);
3671 break;
3672#endif
3673 case 0:
3674 /* Don't relocate a 0 address. */
3675 if (old == 0) {
3676 new = old;
3677 break;
3678 }
3679 /* fall through */
3680 default:
3681 panic("ncr_script_copy_and_bind: weird relocation %x\n", old);
3682 break;
3683 }
3684
3685 *dst++ = cpu_to_scr(new);
3686 }
3687 } else
3688 *dst++ = cpu_to_scr(*src++);
3689
3690 }
3691}
3692
3693/*
3694** Linux host data structure
3695*/
3696
3697struct host_data {
3698 struct ncb *ncb;
3699};
3700
3701#define PRINT_ADDR(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg)
3702
3703static void ncr_print_msg(struct ccb *cp, char *label, u_char *msg)
3704{
1da177e4
LT		 3705 PRINT_ADDR(cp->cmd, "%s: ", label);
3706
cd453c63
MW		 3707 spi_print_msg(msg);
3708 printk("\n");
1da177e4
LT		 3709}
3710
3711/*==========================================================
3712**
3713** NCR chip clock divisor table.
3714** Divisors are multiplied by 10,000,000 in order to make
3715** calculations more simple.
3716**
3717**==========================================================
3718*/
3719
3720#define _5M 5000000
3721static u_long div_10M[] =
3722 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3723
3724
3725/*===============================================================
3726**
3727** Prepare io register values used by ncr_init() according
3728** to selected and supported features.
3729**
3730** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3731** transfers. 32,64,128 are only supported by 875 and 895 chips.
3732** We use log base 2 (burst length) as internal code, with
3733** value 0 meaning "burst disabled".
3734**
3735**===============================================================
3736*/
3737
3738/*
3739 * Burst length from burst code.
3740 */
3741#define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3742
3743/*
3744 * Burst code from io register bits. Burst enable is ctest0 for c720
3745 */
3746#define burst_code(dmode, ctest0) \
3747 (ctest0) & 0x80 ? 0 : (((dmode) & 0xc0) >> 6) + 1
3748
3749/*
3750 * Set initial io register bits from burst code.
3751 */
3752static inline void ncr_init_burst(struct ncb *np, u_char bc)
3753{
3754 u_char *be = &np->rv_ctest0;
3755 *be &= ~0x80;
3756 np->rv_dmode &= ~(0x3 << 6);
3757 np->rv_ctest5 &= ~0x4;
3758
3759 if (!bc) {
3760 *be |= 0x80;
3761 } else {
3762 --bc;
3763 np->rv_dmode |= ((bc & 0x3) << 6);
3764 np->rv_ctest5 |= (bc & 0x4);
3765 }
3766}
3767
3768static void __init ncr_prepare_setting(struct ncb *np)
3769{
3770 u_char burst_max;
3771 u_long period;
3772 int i;
3773
3774 /*
3775 ** Save assumed BIOS setting
3776 */
3777
3778 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
3779 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
3780 np->sv_dmode = INB(nc_dmode) & 0xce;
3781 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
3782 np->sv_ctest0 = INB(nc_ctest0) & 0x84;
3783 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
3784 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
3785 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
3786 np->sv_gpcntl = INB(nc_gpcntl);
3787 np->sv_stest2 = INB(nc_stest2) & 0x20;
3788 np->sv_stest4 = INB(nc_stest4);
3789
3790 /*
3791 ** Wide ?
3792 */
3793
3794 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
3795
3796 /*
3797 * Guess the frequency of the chip's clock.
3798 */
3799 if (np->features & FE_ULTRA)
3800 np->clock_khz = 80000;
3801 else
3802 np->clock_khz = 40000;
3803
3804 /*
3805 * Get the clock multiplier factor.
3806 */
3807 if (np->features & FE_QUAD)
3808 np->multiplier = 4;
3809 else if (np->features & FE_DBLR)
3810 np->multiplier = 2;
3811 else
3812 np->multiplier = 1;
3813
3814 /*
3815 * Measure SCSI clock frequency for chips
3816 * it may vary from assumed one.
3817 */
3818 if (np->features & FE_VARCLK)
3819 ncr_getclock(np, np->multiplier);
3820
3821 /*
3822 * Divisor to be used for async (timer pre-scaler).
3823 */
3824 i = np->clock_divn - 1;
3825 while (--i >= 0) {
3826 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3827 ++i;
3828 break;
3829 }
3830 }
3831 np->rv_scntl3 = i+1;
3832
3833 /*
3834 * Minimum synchronous period factor supported by the chip.
3835 * Btw, 'period' is in tenths of nanoseconds.
3836 */
3837
3838 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3839 if (period <= 250) np->minsync = 10;
3840 else if (period <= 303) np->minsync = 11;
3841 else if (period <= 500) np->minsync = 12;
3842 else np->minsync = (period + 40 - 1) / 40;
3843
3844 /*
3845 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3846 */
3847
3848 if (np->minsync < 25 && !(np->features & FE_ULTRA))
3849 np->minsync = 25;
3850
3851 /*
3852 * Maximum synchronous period factor supported by the chip.
3853 */
3854
3855 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3856 np->maxsync = period > 2540 ? 254 : period / 10;
3857
3858 /*
3859 ** Prepare initial value of other IO registers
3860 */
3861#if defined SCSI_NCR_TRUST_BIOS_SETTING
3862 np->rv_scntl0 = np->sv_scntl0;
3863 np->rv_dmode = np->sv_dmode;
3864 np->rv_dcntl = np->sv_dcntl;
3865 np->rv_ctest0 = np->sv_ctest0;
3866 np->rv_ctest3 = np->sv_ctest3;
3867 np->rv_ctest4 = np->sv_ctest4;
3868 np->rv_ctest5 = np->sv_ctest5;
3869 burst_max = burst_code(np->sv_dmode, np->sv_ctest0);
3870#else
3871
3872 /*
3873 ** Select burst length (dwords)
3874 */
3875 burst_max = driver_setup.burst_max;
3876 if (burst_max == 255)
3877 burst_max = burst_code(np->sv_dmode, np->sv_ctest0);
3878 if (burst_max > 7)
3879 burst_max = 7;
3880 if (burst_max > np->maxburst)
3881 burst_max = np->maxburst;
3882
3883 /*
3884 ** Select all supported special features
3885 */
3886 if (np->features & FE_ERL)
3887 np->rv_dmode |= ERL; /* Enable Read Line */
3888 if (np->features & FE_BOF)
3889 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3890 if (np->features & FE_ERMP)
3891 np->rv_dmode |= ERMP; /* Enable Read Multiple */
3892 if (np->features & FE_PFEN)
3893 np->rv_dcntl |= PFEN; /* Prefetch Enable */
3894 if (np->features & FE_CLSE)
3895 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3896 if (np->features & FE_WRIE)
3897 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3898 if (np->features & FE_DFS)
3899 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3900 if (np->features & FE_MUX)
3901 np->rv_ctest4 |= MUX; /* Host bus multiplex mode */
3902 if (np->features & FE_EA)
3903 np->rv_dcntl |= EA; /* Enable ACK */
3904 if (np->features & FE_EHP)
3905 np->rv_ctest0 |= EHP; /* Even host parity */
3906
3907 /*
3908 ** Select some other
3909 */
3910 if (driver_setup.master_parity)
3911 np->rv_ctest4 |= MPEE; /* Master parity checking */
3912 if (driver_setup.scsi_parity)
3913 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
3914
3915 /*
3916 ** Get SCSI addr of host adapter (set by bios?).
3917 */
3918 if (np->myaddr == 255) {
3919 np->myaddr = INB(nc_scid) & 0x07;
3920 if (!np->myaddr)
3921 np->myaddr = SCSI_NCR_MYADDR;
3922 }
3923
3924#endif /* SCSI_NCR_TRUST_BIOS_SETTING */
3925
3926 /*
3927 * Prepare initial io register bits for burst length
3928 */
3929 ncr_init_burst(np, burst_max);
3930
3931 /*
3932 ** Set SCSI BUS mode.
3933 **
3934 ** - ULTRA2 chips (895/895A/896) report the current
3935 ** BUS mode through the STEST4 IO register.
3936 ** - For previous generation chips (825/825A/875),
3937 ** user has to tell us how to check against HVD,
3938 ** since a 100% safe algorithm is not possible.
3939 */
3940 np->scsi_mode = SMODE_SE;
3941 if (np->features & FE_DIFF) {
3942 switch(driver_setup.diff_support) {
3943 case 4: /* Trust previous settings if present, then GPIO3 */
3944 if (np->sv_scntl3) {
3945 if (np->sv_stest2 & 0x20)
3946 np->scsi_mode = SMODE_HVD;
3947 break;
3948 }
3949 case 3: /* SYMBIOS controllers report HVD through GPIO3 */
3950 if (INB(nc_gpreg) & 0x08)
3951 break;
3952 case 2: /* Set HVD unconditionally */
3953 np->scsi_mode = SMODE_HVD;
3954 case 1: /* Trust previous settings for HVD */
3955 if (np->sv_stest2 & 0x20)
3956 np->scsi_mode = SMODE_HVD;
3957 break;
3958 default:/* Don't care about HVD */
3959 break;
3960 }
3961 }
3962 if (np->scsi_mode == SMODE_HVD)
3963 np->rv_stest2 |= 0x20;
3964
3965 /*
3966 ** Set LED support from SCRIPTS.
3967 ** Ignore this feature for boards known to use a
3968 ** specific GPIO wiring and for the 895A or 896
3969 ** that drive the LED directly.
3970 ** Also probe initial setting of GPIO0 as output.
3971 */
3972 if ((driver_setup.led_pin) &&
3973 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
3974 np->features |= FE_LED0;
3975
3976 /*
3977 ** Set irq mode.
3978 */
3979 switch(driver_setup.irqm & 3) {
3980 case 2:
3981 np->rv_dcntl |= IRQM;
3982 break;
3983 case 1:
3984 np->rv_dcntl |= (np->sv_dcntl & IRQM);
3985 break;
3986 default:
3987 break;
3988 }
3989
3990 /*
3991 ** Configure targets according to driver setup.
3992 ** Allow to override sync, wide and NOSCAN from
3993 ** boot command line.
3994 */
3995 for (i = 0 ; i < MAX_TARGET ; i++) {
3996 struct tcb *tp = &np->target[i];
3997
3998 tp->usrsync = driver_setup.default_sync;
3999 tp->usrwide = driver_setup.max_wide;
4000 tp->usrtags = MAX_TAGS;
4001 tp->period = 0xffff;
4002 if (!driver_setup.disconnection)
4003 np->target[i].usrflag = UF_NODISC;
4004 }
4005
4006 /*
4007 ** Announce all that stuff to user.
4008 */
4009
4010 printk(KERN_INFO "%s: ID %d, Fast-%d%s%s\n", ncr_name(np),
4011 np->myaddr,
4012 np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10),
4013 (np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity",
4014 (np->rv_stest2 & 0x20) ? ", Differential" : "");
4015
4016 if (bootverbose > 1) {
4017 printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
4018 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
4019 ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
4020 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
4021
4022 printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
4023 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
4024 ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
4025 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
4026 }
4027
4028 if (bootverbose && np->paddr2)
4029 printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n",
4030 ncr_name(np), np->paddr2);
4031}
4032
4033/*==========================================================
4034**
4035**
4036** Done SCSI commands list management.
4037**
4038** We donnot enter the scsi_done() callback immediately
4039** after a command has been seen as completed but we
4040** insert it into a list which is flushed outside any kind
4041** of driver critical section.
4042** This allows to do minimal stuff under interrupt and
4043** inside critical sections and to also avoid locking up
4044** on recursive calls to driver entry points under SMP.
4045** In fact, the only kernel point which is entered by the
4046** driver with a driver lock set is kmalloc(GFP_ATOMIC)
4047** that shall not reenter the driver under any circumstances,
4048** AFAIK.
4049**
4050**==========================================================
4051*/
4052static inline void ncr_queue_done_cmd(struct ncb *np, struct scsi_cmnd *cmd)
4053{
4054 unmap_scsi_data(np, cmd);
4055 cmd->host_scribble = (char *) np->done_list;
4056 np->done_list = cmd;
4057}
4058
4059static inline void ncr_flush_done_cmds(struct scsi_cmnd *lcmd)
4060{
4061 struct scsi_cmnd *cmd;
4062
4063 while (lcmd) {
4064 cmd = lcmd;
4065 lcmd = (struct scsi_cmnd *) cmd->host_scribble;
4066 cmd->scsi_done(cmd);
4067 }
4068}
4069
4070/*==========================================================
4071**
4072**
4073** Prepare the next negotiation message if needed.
4074**
4075** Fill in the part of message buffer that contains the
4076** negotiation and the nego_status field of the CCB.
4077** Returns the size of the message in bytes.
4078**
4079**
4080**==========================================================
4081*/
4082
4083
4084static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr)
4085{
4086 struct tcb *tp = &np->target[cp->target];
4087 int msglen = 0;
4088 int nego = 0;
4089 struct scsi_target *starget = tp->starget;
4090
4091 /* negotiate wide transfers ? */
4092 if (!tp->widedone) {
4093 if (spi_support_wide(starget)) {
4094 nego = NS_WIDE;
4095 } else
4096 tp->widedone=1;
4097 }
4098
4099 /* negotiate synchronous transfers? */
4100 if (!nego && !tp->period) {
4101 if (spi_support_sync(starget)) {
4102 nego = NS_SYNC;
4103 } else {
4104 tp->period =0xffff;
4105 dev_info(&starget->dev, "target did not report SYNC.\n");
4106 }
4107 }
4108
4109 switch (nego) {
4110 case NS_SYNC:
6ea3c0b2
MW		 4111 msglen += spi_populate_sync_msg(msgptr + msglen,
4112 tp->maxoffs ? tp->minsync : 0, tp->maxoffs);
1da177e4
LT		 4113 break;
4114 case NS_WIDE:
6ea3c0b2 4115 msglen += spi_populate_width_msg(msgptr + msglen, tp->usrwide);
1da177e4
LT		 4116 break;
4117 }
4118
4119 cp->nego_status = nego;
4120
4121 if (nego) {
4122 tp->nego_cp = cp;
4123 if (DEBUG_FLAGS & DEBUG_NEGO) {
4124 ncr_print_msg(cp, nego == NS_WIDE ?
4125 "wide msgout":"sync_msgout", msgptr);
4126 }
4127 }
4128
4129 return msglen;
4130}
4131
4132
4133
4134/*==========================================================
4135**
4136**
4137** Start execution of a SCSI command.
4138** This is called from the generic SCSI driver.
4139**
4140**
4141**==========================================================
4142*/
4143static int ncr_queue_command (struct ncb *np, struct scsi_cmnd *cmd)
4144{
4145 struct scsi_device *sdev = cmd->device;
4146 struct tcb *tp = &np->target[sdev->id];
4147 struct lcb *lp = tp->lp[sdev->lun];
4148 struct ccb *cp;
4149
4150 int segments;
4151 u_char idmsg, *msgptr;
4152 u32 msglen;
4153 int direction;
4154 u32 lastp, goalp;
4155
4156 /*---------------------------------------------
4157 **
4158 ** Some shortcuts ...
4159 **
4160 **---------------------------------------------
4161 */
4162 if ((sdev->id == np->myaddr ) ||
4163 (sdev->id >= MAX_TARGET) ||
4164 (sdev->lun >= MAX_LUN )) {
4165 return(DID_BAD_TARGET);
4166 }
4167
4168 /*---------------------------------------------
4169 **
4170 ** Complete the 1st TEST UNIT READY command
4171 ** with error condition if the device is
4172 ** flagged NOSCAN, in order to speed up
4173 ** the boot.
4174 **
4175 **---------------------------------------------
4176 */
4177 if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) &&
4178 (tp->usrflag & UF_NOSCAN)) {
4179 tp->usrflag &= ~UF_NOSCAN;
4180 return DID_BAD_TARGET;
4181 }
4182
4183 if (DEBUG_FLAGS & DEBUG_TINY) {
4184 PRINT_ADDR(cmd, "CMD=%x ", cmd->cmnd[0]);
4185 }
4186
4187 /*---------------------------------------------------
4188 **
4189 ** Assign a ccb / bind cmd.
4190 ** If resetting, shorten settle_time if necessary
4191 ** in order to avoid spurious timeouts.
4192 ** If resetting or no free ccb,
4193 ** insert cmd into the waiting list.
4194 **
4195 **----------------------------------------------------
4196 */
4197 if (np->settle_time && cmd->timeout_per_command >= HZ) {
f2be34a3
MW		 4198 u_long tlimit = jiffies + cmd->timeout_per_command - HZ;
4199 if (time_after(np->settle_time, tlimit))
1da177e4
LT		 4200 np->settle_time = tlimit;
4201 }
4202
4203 if (np->settle_time || !(cp=ncr_get_ccb (np, cmd))) {
4204 insert_into_waiting_list(np, cmd);
4205 return(DID_OK);
4206 }
4207 cp->cmd = cmd;
4208
4209 /*----------------------------------------------------
4210 **
4211 ** Build the identify / tag / sdtr message
4212 **
4213 **----------------------------------------------------
4214 */
4215
b0dc1db1 4216 idmsg = IDENTIFY(0, sdev->lun);
1da177e4
LT		 4217
4218 if (cp ->tag != NO_TAG ||
4219 (cp != np->ccb && np->disc && !(tp->usrflag & UF_NODISC)))
4220 idmsg |= 0x40;
4221
4222 msgptr = cp->scsi_smsg;
4223 msglen = 0;
4224 msgptr[msglen++] = idmsg;
4225
4226 if (cp->tag != NO_TAG) {
4227 char order = np->order;
4228
4229 /*
4230 ** Force ordered tag if necessary to avoid timeouts
4231 ** and to preserve interactivity.
4232 */
f2be34a3 4233 if (lp && time_after(jiffies, lp->tags_stime)) {
1da177e4 4234 if (lp->tags_smap) {
b0dc1db1 4235 order = ORDERED_QUEUE_TAG;
1da177e4
LT		 4236 if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>2){
4237 PRINT_ADDR(cmd,
4238 "ordered tag forced.\n");
4239 }
4240 }
f2be34a3 4241 lp->tags_stime = jiffies + 3*HZ;
1da177e4
LT		 4242 lp->tags_smap = lp->tags_umap;
4243 }
4244
4245 if (order == 0) {
4246 /*
4247 ** Ordered write ops, unordered read ops.
4248 */
4249 switch (cmd->cmnd[0]) {
4250 case 0x08: /* READ_SMALL (6) */
4251 case 0x28: /* READ_BIG (10) */
4252 case 0xa8: /* READ_HUGE (12) */
b0dc1db1 4253 order = SIMPLE_QUEUE_TAG;
1da177e4
LT		 4254 break;
4255 default:
b0dc1db1 4256 order = ORDERED_QUEUE_TAG;
1da177e4
LT		 4257 }
4258 }
4259 msgptr[msglen++] = order;
4260 /*
4261 ** Actual tags are numbered 1,3,5,..2*MAXTAGS+1,
4262 ** since we may have to deal with devices that have
4263 ** problems with #TAG 0 or too great #TAG numbers.
4264 */
4265 msgptr[msglen++] = (cp->tag << 1) + 1;
4266 }
4267
4268 /*----------------------------------------------------
4269 **
4270 ** Build the data descriptors
4271 **
4272 **----------------------------------------------------
4273 */
4274
4275 direction = cmd->sc_data_direction;
4276 if (direction != DMA_NONE) {
4277 segments = ncr_scatter(np, cp, cp->cmd);
4278 if (segments < 0) {
4279 ncr_free_ccb(np, cp);
4280 return(DID_ERROR);
4281 }
4282 }
4283 else {
4284 cp->data_len = 0;
4285 segments = 0;
4286 }
4287
4288 /*---------------------------------------------------
4289 **
4290 ** negotiation required?
4291 **
4292 ** (nego_status is filled by ncr_prepare_nego())
4293 **
4294 **---------------------------------------------------
4295 */
4296
4297 cp->nego_status = 0;
4298
4299 if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) {
4300 msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
4301 }
4302
4303 /*----------------------------------------------------
4304 **
4305 ** Determine xfer direction.
4306 **
4307 **----------------------------------------------------
4308 */
4309 if (!cp->data_len)
4310 direction = DMA_NONE;
4311
4312 /*
4313 ** If data direction is BIDIRECTIONAL, speculate FROM_DEVICE
4314 ** but prepare alternate pointers for TO_DEVICE in case
4315 ** of our speculation will be just wrong.
4316 ** SCRIPTS will swap values if needed.
4317 */
4318 switch(direction) {
4319 case DMA_BIDIRECTIONAL:
4320 case DMA_TO_DEVICE:
4321 goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8;
4322 if (segments <= MAX_SCATTERL)
4323 lastp = goalp - 8 - (segments * 16);
4324 else {
4325 lastp = NCB_SCRIPTH_PHYS (np, hdata_out2);
4326 lastp -= (segments - MAX_SCATTERL) * 16;
4327 }
4328 if (direction != DMA_BIDIRECTIONAL)
4329 break;
4330 cp->phys.header.wgoalp = cpu_to_scr(goalp);
4331 cp->phys.header.wlastp = cpu_to_scr(lastp);
4332 /* fall through */
4333 case DMA_FROM_DEVICE:
4334 goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8;
4335 if (segments <= MAX_SCATTERL)
4336 lastp = goalp - 8 - (segments * 16);
4337 else {
4338 lastp = NCB_SCRIPTH_PHYS (np, hdata_in2);
4339 lastp -= (segments - MAX_SCATTERL) * 16;
4340 }
4341 break;
4342 default:
4343 case DMA_NONE:
4344 lastp = goalp = NCB_SCRIPT_PHYS (np, no_data);
4345 break;
4346 }
4347
4348 /*
4349 ** Set all pointers values needed by SCRIPTS.
4350 ** If direction is unknown, start at data_io.
4351 */
4352 cp->phys.header.lastp = cpu_to_scr(lastp);
4353 cp->phys.header.goalp = cpu_to_scr(goalp);
4354
4355 if (direction == DMA_BIDIRECTIONAL)
4356 cp->phys.header.savep =
4357 cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io));
4358 else
4359 cp->phys.header.savep= cpu_to_scr(lastp);
4360
4361 /*
4362 ** Save the initial data pointer in order to be able
4363 ** to redo the command.
4364 */
4365 cp->startp = cp->phys.header.savep;
4366
4367 /*----------------------------------------------------
4368 **
4369 ** fill in ccb
4370 **
4371 **----------------------------------------------------
4372 **
4373 **
4374 ** physical -> virtual backlink
4375 ** Generic SCSI command
4376 */
4377
4378 /*
4379 ** Startqueue
4380 */
4381 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
4382 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_dsa));
4383 /*
4384 ** select
4385 */
422c0d61 4386 cp->phys.select.sel_id = sdev_id(sdev);
1da177e4
LT		 4387 cp->phys.select.sel_scntl3 = tp->wval;
4388 cp->phys.select.sel_sxfer = tp->sval;
4389 /*
4390 ** message
4391 */
4392 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg));
4393 cp->phys.smsg.size = cpu_to_scr(msglen);
4394
4395 /*
4396 ** command
4397 */
4398 memcpy(cp->cdb_buf, cmd->cmnd, min_t(int, cmd->cmd_len, sizeof(cp->cdb_buf)));
4399 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0]));
4400 cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len);
4401
4402 /*
4403 ** status
4404 */
4405 cp->actualquirks = 0;
4406 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
4407 cp->scsi_status = S_ILLEGAL;
4408 cp->parity_status = 0;
4409
4410 cp->xerr_status = XE_OK;
4411#if 0
4412 cp->sync_status = tp->sval;
4413 cp->wide_status = tp->wval;
4414#endif
4415
4416 /*----------------------------------------------------
4417 **
4418 ** Critical region: start this job.
4419 **
4420 **----------------------------------------------------
4421 */
4422
4423 /* activate this job. */
4424 cp->magic = CCB_MAGIC;
4425
4426 /*
4427 ** insert next CCBs into start queue.
4428 ** 2 max at a time is enough to flush the CCB wait queue.
4429 */
4430 cp->auto_sense = 0;
4431 if (lp)
4432 ncr_start_next_ccb(np, lp, 2);
4433 else
4434 ncr_put_start_queue(np, cp);
4435
4436 /* Command is successfully queued. */
4437
4438 return DID_OK;
4439}
4440
4441
4442/*==========================================================
4443**
4444**
4445** Insert a CCB into the start queue and wake up the
4446** SCRIPTS processor.
4447**
4448**
4449**==========================================================
4450*/
4451
4452static void ncr_start_next_ccb(struct ncb *np, struct lcb *lp, int maxn)
4453{
4454 struct list_head *qp;
4455 struct ccb *cp;
4456
4457 if (lp->held_ccb)
4458 return;
4459
4460 while (maxn-- && lp->queuedccbs < lp->queuedepth) {
4461 qp = ncr_list_pop(&lp->wait_ccbq);
4462 if (!qp)
4463 break;
4464 ++lp->queuedccbs;
4465 cp = list_entry(qp, struct ccb, link_ccbq);
4466 list_add_tail(qp, &lp->busy_ccbq);
4467 lp->jump_ccb[cp->tag == NO_TAG ? 0 : cp->tag] =
4468 cpu_to_scr(CCB_PHYS (cp, restart));
4469 ncr_put_start_queue(np, cp);
4470 }
4471}
4472
4473static void ncr_put_start_queue(struct ncb *np, struct ccb *cp)
4474{
4475 u16 qidx;
4476
4477 /*
4478 ** insert into start queue.
4479 */
4480 if (!np->squeueput) np->squeueput = 1;
4481 qidx = np->squeueput + 2;
4482 if (qidx >= MAX_START + MAX_START) qidx = 1;
4483
4484 np->scripth->tryloop [qidx] = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
4485 MEMORY_BARRIER();
4486 np->scripth->tryloop [np->squeueput] = cpu_to_scr(CCB_PHYS (cp, start));
4487
4488 np->squeueput = qidx;
4489 ++np->queuedccbs;
4490 cp->queued = 1;
4491
4492 if (DEBUG_FLAGS & DEBUG_QUEUE)
4493 printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput);
4494
4495 /*
4496 ** Script processor may be waiting for reselect.
4497 ** Wake it up.
4498 */
4499 MEMORY_BARRIER();
4500 OUTB (nc_istat, SIGP);
4501}
4502
4503
4504static int ncr_reset_scsi_bus(struct ncb *np, int enab_int, int settle_delay)
4505{
4506 u32 term;
4507 int retv = 0;
4508
f2be34a3 4509 np->settle_time = jiffies + settle_delay * HZ;
1da177e4
LT		 4510
4511 if (bootverbose > 1)
4512 printk("%s: resetting, "
4513 "command processing suspended for %d seconds\n",
4514 ncr_name(np), settle_delay);
4515
4516 ncr_chip_reset(np, 100);
4517 udelay(2000); /* The 895 needs time for the bus mode to settle */
4518 if (enab_int)
4519 OUTW (nc_sien, RST);
4520 /*
4521 ** Enable Tolerant, reset IRQD if present and
4522 ** properly set IRQ mode, prior to resetting the bus.
4523 */
4524 OUTB (nc_stest3, TE);
4525 OUTB (nc_scntl1, CRST);
4526 udelay(200);
4527
4528 if (!driver_setup.bus_check)
4529 goto out;
4530 /*
4531 ** Check for no terminators or SCSI bus shorts to ground.
4532 ** Read SCSI data bus, data parity bits and control signals.
4533 ** We are expecting RESET to be TRUE and other signals to be
4534 ** FALSE.
4535 */
4536
4537 term = INB(nc_sstat0);
4538 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
4539 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
4540 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
4541 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
4542 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
4543
4544 if (!(np->features & FE_WIDE))
4545 term &= 0x3ffff;
4546
4547 if (term != (2<<7)) {
4548 printk("%s: suspicious SCSI data while resetting the BUS.\n",
4549 ncr_name(np));
4550 printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
4551 "0x%lx, expecting 0x%lx\n",
4552 ncr_name(np),
4553 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
4554 (u_long)term, (u_long)(2<<7));
4555 if (driver_setup.bus_check == 1)
4556 retv = 1;
4557 }
4558out:
4559 OUTB (nc_scntl1, 0);
4560 return retv;
4561}
4562
4563/*
4564 * Start reset process.
4565 * If reset in progress do nothing.
4566 * The interrupt handler will reinitialize the chip.
4567 * The timeout handler will wait for settle_time before
4568 * clearing it and so resuming command processing.
4569 */
4570static void ncr_start_reset(struct ncb *np)
4571{
4572 if (!np->settle_time) {
4573 ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay);
4574 }
4575}
4576
4577/*==========================================================
4578**
4579**
4580** Reset the SCSI BUS.
4581** This is called from the generic SCSI driver.
4582**
4583**
4584**==========================================================
4585*/
4586static int ncr_reset_bus (struct ncb *np, struct scsi_cmnd *cmd, int sync_reset)
4587{
4588/* struct scsi_device *device = cmd->device; */
4589 struct ccb *cp;
4590 int found;
4591
4592/*
4593 * Return immediately if reset is in progress.
4594 */
4595 if (np->settle_time) {
4596 return FAILED;
4597 }
4598/*
4599 * Start the reset process.
4600 * The script processor is then assumed to be stopped.
4601 * Commands will now be queued in the waiting list until a settle
4602 * delay of 2 seconds will be completed.
4603 */
4604 ncr_start_reset(np);
4605/*
4606 * First, look in the wakeup list
4607 */
4608 for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) {
4609 /*
4610 ** look for the ccb of this command.
4611 */
4612 if (cp->host_status == HS_IDLE) continue;
4613 if (cp->cmd == cmd) {
4614 found = 1;
4615 break;
4616 }
4617 }
4618/*
4619 * Then, look in the waiting list
4620 */
4621 if (!found && retrieve_from_waiting_list(0, np, cmd))
4622 found = 1;
4623/*
4624 * Wake-up all awaiting commands with DID_RESET.
4625 */
4626 reset_waiting_list(np);
4627/*
4628 * Wake-up all pending commands with HS_RESET -> DID_RESET.
4629 */
4630 ncr_wakeup(np, HS_RESET);
4631/*
4632 * If the involved command was not in a driver queue, and the
4633 * scsi driver told us reset is synchronous, and the command is not
4634 * currently in the waiting list, complete it with DID_RESET status,
4635 * in order to keep it alive.
4636 */
4637 if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) {
4638 cmd->result = ScsiResult(DID_RESET, 0);
4639 ncr_queue_done_cmd(np, cmd);
4640 }
4641
4642 return SUCCESS;
4643}
4644
4645#if 0 /* unused and broken.. */
4646/*==========================================================
4647**
4648**
4649** Abort an SCSI command.
4650** This is called from the generic SCSI driver.
4651**
4652**
4653**==========================================================
4654*/
4655static int ncr_abort_command (struct ncb *np, struct scsi_cmnd *cmd)
4656{
4657/* struct scsi_device *device = cmd->device; */
4658 struct ccb *cp;
4659 int found;
4660 int retv;
4661
4662/*
4663 * First, look for the scsi command in the waiting list
4664 */
4665 if (remove_from_waiting_list(np, cmd)) {
4666 cmd->result = ScsiResult(DID_ABORT, 0);
4667 ncr_queue_done_cmd(np, cmd);
4668 return SCSI_ABORT_SUCCESS;
4669 }
4670
4671/*
4672 * Then, look in the wakeup list
4673 */
4674 for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) {
4675 /*
4676 ** look for the ccb of this command.
4677 */
4678 if (cp->host_status == HS_IDLE) continue;
4679 if (cp->cmd == cmd) {
4680 found = 1;
4681 break;
4682 }
4683 }
4684
4685 if (!found) {
4686 return SCSI_ABORT_NOT_RUNNING;
4687 }
4688
4689 if (np->settle_time) {
4690 return SCSI_ABORT_SNOOZE;
4691 }
4692
4693 /*
4694 ** If the CCB is active, patch schedule jumps for the
4695 ** script to abort the command.
4696 */
4697
4698 switch(cp->host_status) {
4699 case HS_BUSY:
4700 case HS_NEGOTIATE:
4701 printk ("%s: abort ccb=%p (cancel)\n", ncr_name (np), cp);
4702 cp->start.schedule.l_paddr =
4703 cpu_to_scr(NCB_SCRIPTH_PHYS (np, cancel));
4704 retv = SCSI_ABORT_PENDING;
4705 break;
4706 case HS_DISCONNECT:
4707 cp->restart.schedule.l_paddr =
4708 cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort));
4709 retv = SCSI_ABORT_PENDING;
4710 break;
4711 default:
4712 retv = SCSI_ABORT_NOT_RUNNING;
4713 break;
4714
4715 }
4716
4717 /*
4718 ** If there are no requests, the script
4719 ** processor will sleep on SEL_WAIT_RESEL.
4720 ** Let's wake it up, since it may have to work.
4721 */
4722 OUTB (nc_istat, SIGP);
4723
4724 return retv;
4725}
4726#endif
4727
4728static void ncr_detach(struct ncb *np)
4729{
4730 struct ccb *cp;
4731 struct tcb *tp;
4732 struct lcb *lp;
4733 int target, lun;
4734 int i;
4735 char inst_name[16];
4736
4737 /* Local copy so we don't access np after freeing it! */
4738 strlcpy(inst_name, ncr_name(np), sizeof(inst_name));
4739
4740 printk("%s: releasing host resources\n", ncr_name(np));
4741
4742/*
4743** Stop the ncr_timeout process
4744** Set release_stage to 1 and wait that ncr_timeout() set it to 2.
4745*/
4746
4747#ifdef DEBUG_NCR53C8XX
4748 printk("%s: stopping the timer\n", ncr_name(np));
4749#endif
4750 np->release_stage = 1;
4751 for (i = 50 ; i && np->release_stage != 2 ; i--)
4752 mdelay(100);
4753 if (np->release_stage != 2)
4754 printk("%s: the timer seems to be already stopped\n", ncr_name(np));
4755 else np->release_stage = 2;
4756
4757/*
4758** Disable chip interrupts
4759*/
4760
4761#ifdef DEBUG_NCR53C8XX
4762 printk("%s: disabling chip interrupts\n", ncr_name(np));
4763#endif
4764 OUTW (nc_sien , 0);
4765 OUTB (nc_dien , 0);
4766
4767 /*
4768 ** Reset NCR chip
4769 ** Restore bios setting for automatic clock detection.
4770 */
4771
4772 printk("%s: resetting chip\n", ncr_name(np));
4773 ncr_chip_reset(np, 100);
4774
4775 OUTB(nc_dmode, np->sv_dmode);
4776 OUTB(nc_dcntl, np->sv_dcntl);
4777 OUTB(nc_ctest0, np->sv_ctest0);
4778 OUTB(nc_ctest3, np->sv_ctest3);
4779 OUTB(nc_ctest4, np->sv_ctest4);
4780 OUTB(nc_ctest5, np->sv_ctest5);
4781 OUTB(nc_gpcntl, np->sv_gpcntl);
4782 OUTB(nc_stest2, np->sv_stest2);
4783
4784 ncr_selectclock(np, np->sv_scntl3);
4785
4786 /*
4787 ** Free allocated ccb(s)
4788 */
4789
4790 while ((cp=np->ccb->link_ccb) != NULL) {
4791 np->ccb->link_ccb = cp->link_ccb;
4792 if (cp->host_status) {
4793 printk("%s: shall free an active ccb (host_status=%d)\n",
4794 ncr_name(np), cp->host_status);
4795 }
4796#ifdef DEBUG_NCR53C8XX
4797 printk("%s: freeing ccb (%lx)\n", ncr_name(np), (u_long) cp);
4798#endif
4799 m_free_dma(cp, sizeof(*cp), "CCB");
4800 }
4801
4802 /* Free allocated tp(s) */
4803
4804 for (target = 0; target < MAX_TARGET ; target++) {
4805 tp=&np->target[target];
4806 for (lun = 0 ; lun < MAX_LUN ; lun++) {
4807 lp = tp->lp[lun];
4808 if (lp) {
4809#ifdef DEBUG_NCR53C8XX
4810 printk("%s: freeing lp (%lx)\n", ncr_name(np), (u_long) lp);
4811#endif
4812 if (lp->jump_ccb != &lp->jump_ccb_0)
4813 m_free_dma(lp->jump_ccb,256,"JUMP_CCB");
4814 m_free_dma(lp, sizeof(*lp), "LCB");
4815 }
4816 }
4817 }
4818
4819 if (np->scripth0)
4820 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
4821 if (np->script0)
4822 m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
4823 if (np->ccb)
4824 m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
4825 m_free_dma(np, sizeof(struct ncb), "NCB");
4826
4827 printk("%s: host resources successfully released\n", inst_name);
4828}
4829
4830/*==========================================================
4831**
4832**
4833** Complete execution of a SCSI command.
4834** Signal completion to the generic SCSI driver.
4835**
4836**
4837**==========================================================
4838*/
4839
4840void ncr_complete (struct ncb *np, struct ccb *cp)
4841{
4842 struct scsi_cmnd *cmd;
4843 struct tcb *tp;
4844 struct lcb *lp;
4845
4846 /*
4847 ** Sanity check
4848 */
4849
4850 if (!cp || cp->magic != CCB_MAGIC || !cp->cmd)
4851 return;
4852
4853 /*
4854 ** Print minimal debug information.
4855 */
4856
4857 if (DEBUG_FLAGS & DEBUG_TINY)
4858 printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp,
4859 cp->host_status,cp->scsi_status);
4860
4861 /*
4862 ** Get command, target and lun pointers.
4863 */
4864
4865 cmd = cp->cmd;
4866 cp->cmd = NULL;
4867 tp = &np->target[cmd->device->id];
4868 lp = tp->lp[cmd->device->lun];
4869
4870 /*
4871 ** We donnot queue more than 1 ccb per target
4872 ** with negotiation at any time. If this ccb was
4873 ** used for negotiation, clear this info in the tcb.
4874 */
4875
4876 if (cp == tp->nego_cp)
4877 tp->nego_cp = NULL;
4878
4879 /*
4880 ** If auto-sense performed, change scsi status.
4881 */
4882 if (cp->auto_sense) {
4883 cp->scsi_status = cp->auto_sense;
4884 }
4885
4886 /*
4887 ** If we were recovering from queue full or performing
4888 ** auto-sense, requeue skipped CCBs to the wait queue.
4889 */
4890
4891 if (lp && lp->held_ccb) {
4892 if (cp == lp->held_ccb) {
4893 list_splice_init(&lp->skip_ccbq, &lp->wait_ccbq);
4894 lp->held_ccb = NULL;
4895 }
4896 }
4897
4898 /*
4899 ** Check for parity errors.
4900 */
4901
4902 if (cp->parity_status > 1) {
4903 PRINT_ADDR(cmd, "%d parity error(s).\n",cp->parity_status);
4904 }
4905
4906 /*
4907 ** Check for extended errors.
4908 */
4909
4910 if (cp->xerr_status != XE_OK) {
4911 switch (cp->xerr_status) {
4912 case XE_EXTRA_DATA:
4913 PRINT_ADDR(cmd, "extraneous data discarded.\n");
4914 break;
4915 case XE_BAD_PHASE:
4916 PRINT_ADDR(cmd, "invalid scsi phase (4/5).\n");
4917 break;
4918 default:
4919 PRINT_ADDR(cmd, "extended error %d.\n",
4920 cp->xerr_status);
4921 break;
4922 }
4923 if (cp->host_status==HS_COMPLETE)
4924 cp->host_status = HS_FAIL;
4925 }
4926
4927 /*
4928 ** Print out any error for debugging purpose.
4929 */
4930 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
4931 if (cp->host_status!=HS_COMPLETE || cp->scsi_status!=S_GOOD) {
4932 PRINT_ADDR(cmd, "ERROR: cmd=%x host_status=%x "
4933 "scsi_status=%x\n", cmd->cmnd[0],
4934 cp->host_status, cp->scsi_status);
4935 }
4936 }
4937
4938 /*
4939 ** Check the status.
4940 */
4941 if ( (cp->host_status == HS_COMPLETE)
4942 && (cp->scsi_status == S_GOOD ||
4943 cp->scsi_status == S_COND_MET)) {
4944 /*
4945 * All went well (GOOD status).
4946 * CONDITION MET status is returned on
4947 * `Pre-Fetch' or `Search data' success.
4948 */
4949 cmd->result = ScsiResult(DID_OK, cp->scsi_status);
4950
4951 /*
4952 ** @RESID@
4953 ** Could dig out the correct value for resid,
4954 ** but it would be quite complicated.
4955 */
4956 /* if (cp->phys.header.lastp != cp->phys.header.goalp) */
4957
4958 /*
4959 ** Allocate the lcb if not yet.
4960 */
4961 if (!lp)
4962 ncr_alloc_lcb (np, cmd->device->id, cmd->device->lun);
4963
4964 tp->bytes += cp->data_len;
4965 tp->transfers ++;
4966
4967 /*
4968 ** If tags was reduced due to queue full,
4969 ** increase tags if 1000 good status received.
4970 */
4971 if (lp && lp->usetags && lp->numtags < lp->maxtags) {
4972 ++lp->num_good;
4973 if (lp->num_good >= 1000) {
4974 lp->num_good = 0;
4975 ++lp->numtags;
4976 ncr_setup_tags (np, cmd->device);
4977 }
4978 }
4979 } else if ((cp->host_status == HS_COMPLETE)
4980 && (cp->scsi_status == S_CHECK_COND)) {
4981 /*
4982 ** Check condition code
4983 */
4984 cmd->result = ScsiResult(DID_OK, S_CHECK_COND);
4985
4986 /*
4987 ** Copy back sense data to caller's buffer.
4988 */
4989 memcpy(cmd->sense_buffer, cp->sense_buf,
4990 min(sizeof(cmd->sense_buffer), sizeof(cp->sense_buf)));
4991
4992 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
4993 u_char * p = (u_char*) & cmd->sense_buffer;
4994 int i;
4995 PRINT_ADDR(cmd, "sense data:");
4996 for (i=0; i<14; i++) printk (" %x", *p++);
4997 printk (".\n");
4998 }
4999 } else if ((cp->host_status == HS_COMPLETE)
5000 && (cp->scsi_status == S_CONFLICT)) {
5001 /*
5002 ** Reservation Conflict condition code
5003 */
5004 cmd->result = ScsiResult(DID_OK, S_CONFLICT);
5005
5006 } else if ((cp->host_status == HS_COMPLETE)
5007 && (cp->scsi_status == S_BUSY ||
5008 cp->scsi_status == S_QUEUE_FULL)) {
5009
5010 /*
5011 ** Target is busy.
5012 */
5013 cmd->result = ScsiResult(DID_OK, cp->scsi_status);
5014
5015 } else if ((cp->host_status == HS_SEL_TIMEOUT)
5016 || (cp->host_status == HS_TIMEOUT)) {
5017
5018 /*
5019 ** No response
5020 */
5021 cmd->result = ScsiResult(DID_TIME_OUT, cp->scsi_status);
5022
5023 } else if (cp->host_status == HS_RESET) {
5024
5025 /*
5026 ** SCSI bus reset
5027 */
5028 cmd->result = ScsiResult(DID_RESET, cp->scsi_status);
5029
5030 } else if (cp->host_status == HS_ABORTED) {
5031
5032 /*
5033 ** Transfer aborted
5034 */
5035 cmd->result = ScsiResult(DID_ABORT, cp->scsi_status);
5036
5037 } else {
5038
5039 /*
5040 ** Other protocol messes
5041 */
5042 PRINT_ADDR(cmd, "COMMAND FAILED (%x %x) @%p.\n",
5043 cp->host_status, cp->scsi_status, cp);
5044
5045 cmd->result = ScsiResult(DID_ERROR, cp->scsi_status);
5046 }
5047
5048 /*
5049 ** trace output
5050 */
5051
5052 if (tp->usrflag & UF_TRACE) {
5053 u_char * p;
5054 int i;
5055 PRINT_ADDR(cmd, " CMD:");
5056 p = (u_char*) &cmd->cmnd[0];
5057 for (i=0; i<cmd->cmd_len; i++) printk (" %x", *p++);
5058
5059 if (cp->host_status==HS_COMPLETE) {
5060 switch (cp->scsi_status) {
5061 case S_GOOD:
5062 printk (" GOOD");
5063 break;
5064 case S_CHECK_COND:
5065 printk (" SENSE:");
5066 p = (u_char*) &cmd->sense_buffer;
5067 for (i=0; i<14; i++)
5068 printk (" %x", *p++);
5069 break;
5070 default:
5071 printk (" STAT: %x\n", cp->scsi_status);
5072 break;
5073 }
5074 } else printk (" HOSTERROR: %x", cp->host_status);
5075 printk ("\n");
5076 }
5077
5078 /*
5079 ** Free this ccb
5080 */
5081 ncr_free_ccb (np, cp);
5082
5083 /*
5084 ** requeue awaiting scsi commands for this lun.
5085 */
5086 if (lp && lp->queuedccbs < lp->queuedepth &&
5087 !list_empty(&lp->wait_ccbq))
5088 ncr_start_next_ccb(np, lp, 2);
5089
5090 /*
5091 ** requeue awaiting scsi commands for this controller.
5092 */
5093 if (np->waiting_list)
5094 requeue_waiting_list(np);
5095
5096 /*
5097 ** signal completion to generic driver.
5098 */
5099 ncr_queue_done_cmd(np, cmd);
5100}
5101
5102/*==========================================================
5103**
5104**
5105** Signal all (or one) control block done.
5106**
5107**
5108**==========================================================
5109*/
5110
5111/*
5112** This CCB has been skipped by the NCR.
0779bf2d 5113** Queue it in the corresponding unit queue.
1da177e4
LT		 5114*/
5115static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp)
5116{
5117 struct tcb *tp = &np->target[cp->target];
5118 struct lcb *lp = tp->lp[cp->lun];
5119
5120 if (lp && cp != np->ccb) {
5121 cp->host_status &= ~HS_SKIPMASK;
5122 cp->start.schedule.l_paddr =
5123 cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
179e0917 5124 list_move_tail(&cp->link_ccbq, &lp->skip_ccbq);
1da177e4
LT		 5125 if (cp->queued) {
5126 --lp->queuedccbs;
5127 }
5128 }
5129 if (cp->queued) {
5130 --np->queuedccbs;
5131 cp->queued = 0;
5132 }
5133}
5134
5135/*
5136** The NCR has completed CCBs.
5137** Look at the DONE QUEUE if enabled, otherwise scan all CCBs
5138*/
5139void ncr_wakeup_done (struct ncb *np)
5140{
5141 struct ccb *cp;
5142#ifdef SCSI_NCR_CCB_DONE_SUPPORT
5143 int i, j;
5144
5145 i = np->ccb_done_ic;
5146 while (1) {
5147 j = i+1;
5148 if (j >= MAX_DONE)
5149 j = 0;
5150
5151 cp = np->ccb_done[j];
5152 if (!CCB_DONE_VALID(cp))
5153 break;
5154
5155 np->ccb_done[j] = (struct ccb *)CCB_DONE_EMPTY;
5156 np->scripth->done_queue[5*j + 4] =
5157 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug));
5158 MEMORY_BARRIER();
5159 np->scripth->done_queue[5*i + 4] =
5160 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end));
5161
5162 if (cp->host_status & HS_DONEMASK)
5163 ncr_complete (np, cp);
5164 else if (cp->host_status & HS_SKIPMASK)
5165 ncr_ccb_skipped (np, cp);
5166
5167 i = j;
5168 }
5169 np->ccb_done_ic = i;
5170#else
5171 cp = np->ccb;
5172 while (cp) {
5173 if (cp->host_status & HS_DONEMASK)
5174 ncr_complete (np, cp);
5175 else if (cp->host_status & HS_SKIPMASK)
5176 ncr_ccb_skipped (np, cp);
5177 cp = cp->link_ccb;
5178 }
5179#endif
5180}
5181
5182/*
5183** Complete all active CCBs.
5184*/
5185void ncr_wakeup (struct ncb *np, u_long code)
5186{
5187 struct ccb *cp = np->ccb;
5188
5189 while (cp) {
5190 if (cp->host_status != HS_IDLE) {
5191 cp->host_status = code;
5192 ncr_complete (np, cp);
5193 }
5194 cp = cp->link_ccb;
5195 }
5196}
5197
5198/*
5199** Reset ncr chip.
5200*/
5201
5202/* Some initialisation must be done immediately following reset, for 53c720,
5203 * at least. EA (dcntl bit 5) isn't set here as it is set once only in
5204 * the _detect function.
5205 */
5206static void ncr_chip_reset(struct ncb *np, int delay)
5207{
5208 OUTB (nc_istat, SRST);
5209 udelay(delay);
5210 OUTB (nc_istat, 0 );
5211
5212 if (np->features & FE_EHP)
5213 OUTB (nc_ctest0, EHP);
5214 if (np->features & FE_MUX)
5215 OUTB (nc_ctest4, MUX);
5216}
5217
5218
5219/*==========================================================
5220**
5221**
5222** Start NCR chip.
5223**
5224**
5225**==========================================================
5226*/
5227
5228void ncr_init (struct ncb *np, int reset, char * msg, u_long code)
5229{
5230 int i;
5231
5232 /*
5233 ** Reset chip if asked, otherwise just clear fifos.
5234 */
5235
5236 if (reset) {
5237 OUTB (nc_istat, SRST);
5238 udelay(100);
5239 }
5240 else {
5241 OUTB (nc_stest3, TE|CSF);
5242 OUTONB (nc_ctest3, CLF);
5243 }
5244
5245 /*
5246 ** Message.
5247 */
5248
5249 if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg);
5250
5251 /*
5252 ** Clear Start Queue
5253 */
5254 np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */
5255 for (i = 1; i < MAX_START + MAX_START; i += 2)
5256 np->scripth0->tryloop[i] =
5257 cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5258
5259 /*
5260 ** Start at first entry.
5261 */
5262 np->squeueput = 0;
5263 np->script0->startpos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np, tryloop));
5264
5265#ifdef SCSI_NCR_CCB_DONE_SUPPORT
5266 /*
5267 ** Clear Done Queue
5268 */
5269 for (i = 0; i < MAX_DONE; i++) {
5270 np->ccb_done[i] = (struct ccb *)CCB_DONE_EMPTY;
5271 np->scripth0->done_queue[5*i + 4] =
5272 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end));
5273 }
5274#endif
5275
5276 /*
5277 ** Start at first entry.
5278 */
5279 np->script0->done_pos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np,done_queue));
5280 np->ccb_done_ic = MAX_DONE-1;
5281 np->scripth0->done_queue[5*(MAX_DONE-1) + 4] =
5282 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug));
5283
5284 /*
5285 ** Wakeup all pending jobs.
5286 */
5287 ncr_wakeup (np, code);
5288
5289 /*
5290 ** Init chip.
5291 */
5292
5293 /*
5294 ** Remove reset; big delay because the 895 needs time for the
5295 ** bus mode to settle
5296 */
5297 ncr_chip_reset(np, 2000);
5298
5299 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
5300 /* full arb., ena parity, par->ATN */
5301 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
5302
5303 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
5304
5305 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
5306 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
5307 OUTB (nc_istat , SIGP ); /* Signal Process */
5308 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
5309 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
5310
5311 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
5312 OUTB (nc_ctest0, np->rv_ctest0); /* 720: CDIS and EHP */
5313 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
5314 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
5315
5316 OUTB (nc_stest2, EXT|np->rv_stest2); /* Extended Sreq/Sack filtering */
5317 OUTB (nc_stest3, TE); /* TolerANT enable */
5318 OUTB (nc_stime0, 0x0c ); /* HTH disabled STO 0.25 sec */
5319
5320 /*
5321 ** Disable disconnects.
5322 */
5323
5324 np->disc = 0;
5325
5326 /*
5327 ** Enable GPIO0 pin for writing if LED support.
5328 */
5329
5330 if (np->features & FE_LED0) {
5331 OUTOFFB (nc_gpcntl, 0x01);
5332 }
5333
5334 /*
5335 ** enable ints
5336 */
5337
5338 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
5339 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
5340
5341 /*
5342 ** Fill in target structure.
5343 ** Reinitialize usrsync.
5344 ** Reinitialize usrwide.
5345 ** Prepare sync negotiation according to actual SCSI bus mode.
5346 */
5347
5348 for (i=0;i<MAX_TARGET;i++) {
5349 struct tcb *tp = &np->target[i];
5350
5351 tp->sval = 0;
5352 tp->wval = np->rv_scntl3;
5353
5354 if (tp->usrsync != 255) {
5355 if (tp->usrsync <= np->maxsync) {
5356 if (tp->usrsync < np->minsync) {
5357 tp->usrsync = np->minsync;
5358 }
5359 }
5360 else
5361 tp->usrsync = 255;
5362 }
5363
5364 if (tp->usrwide > np->maxwide)
5365 tp->usrwide = np->maxwide;
5366
5367 }
5368
5369 /*
5370 ** Start script processor.
5371 */
5372 if (np->paddr2) {
5373 if (bootverbose)
5374 printk ("%s: Downloading SCSI SCRIPTS.\n",
5375 ncr_name(np));
5376 OUTL (nc_scratcha, vtobus(np->script0));
5377 OUTL_DSP (NCB_SCRIPTH_PHYS (np, start_ram));
5378 }
5379 else
5380 OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
5381}
5382
5383/*==========================================================
5384**
5385** Prepare the negotiation values for wide and
5386** synchronous transfers.
5387**
5388**==========================================================
5389*/
5390
5391static void ncr_negotiate (struct ncb* np, struct tcb* tp)
5392{
5393 /*
5394 ** minsync unit is 4ns !
5395 */
5396
5397 u_long minsync = tp->usrsync;
5398
5399 /*
5400 ** SCSI bus mode limit
5401 */
5402
5403 if (np->scsi_mode && np->scsi_mode == SMODE_SE) {
5404 if (minsync < 12) minsync = 12;
5405 }
5406
5407 /*
5408 ** our limit ..
5409 */
5410
5411 if (minsync < np->minsync)
5412 minsync = np->minsync;
5413
5414 /*
5415 ** divider limit
5416 */
5417
5418 if (minsync > np->maxsync)
5419 minsync = 255;
5420
5421 if (tp->maxoffs > np->maxoffs)
5422 tp->maxoffs = np->maxoffs;
5423
5424 tp->minsync = minsync;
5425 tp->maxoffs = (minsync<255 ? tp->maxoffs : 0);
5426
5427 /*
5428 ** period=0: has to negotiate sync transfer
5429 */
5430
5431 tp->period=0;
5432
5433 /*
5434 ** widedone=0: has to negotiate wide transfer
5435 */
5436 tp->widedone=0;
5437}
5438
5439/*==========================================================
5440**
5441** Get clock factor and sync divisor for a given
5442** synchronous factor period.
5443** Returns the clock factor (in sxfer) and scntl3
5444** synchronous divisor field.
5445**
5446**==========================================================
5447*/
5448
5449static void ncr_getsync(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p)
5450{
5451 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
5452 int div = np->clock_divn; /* Number of divisors supported */
5453 u_long fak; /* Sync factor in sxfer */
5454 u_long per; /* Period in tenths of ns */
5455 u_long kpc; /* (per * clk) */
5456
5457 /*
5458 ** Compute the synchronous period in tenths of nano-seconds
5459 */
5460 if (sfac <= 10) per = 250;
5461 else if (sfac == 11) per = 303;
5462 else if (sfac == 12) per = 500;
5463 else per = 40 * sfac;
5464
5465 /*
5466 ** Look for the greatest clock divisor that allows an
5467 ** input speed faster than the period.
5468 */
5469 kpc = per * clk;
5470 while (--div >= 0)
5471 if (kpc >= (div_10M[div] << 2)) break;
5472
5473 /*
5474 ** Calculate the lowest clock factor that allows an output
5475 ** speed not faster than the period.
5476 */
5477 fak = (kpc - 1) / div_10M[div] + 1;
5478
5479#if 0 /* This optimization does not seem very useful */
5480
5481 per = (fak * div_10M[div]) / clk;
5482
5483 /*
5484 ** Why not to try the immediate lower divisor and to choose
5485 ** the one that allows the fastest output speed ?
5486 ** We don't want input speed too much greater than output speed.
5487 */
5488 if (div >= 1 && fak < 8) {
5489 u_long fak2, per2;
5490 fak2 = (kpc - 1) / div_10M[div-1] + 1;
5491 per2 = (fak2 * div_10M[div-1]) / clk;
5492 if (per2 < per && fak2 <= 8) {
5493 fak = fak2;
5494 per = per2;
5495 --div;
5496 }
5497 }
5498#endif
5499
5500 if (fak < 4) fak = 4; /* Should never happen, too bad ... */
5501
5502 /*
5503 ** Compute and return sync parameters for the ncr
5504 */
5505 *fakp = fak - 4;
5506 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
5507}
5508
5509
5510/*==========================================================
5511**
5512** Set actual values, sync status and patch all ccbs of
5513** a target according to new sync/wide agreement.
5514**
5515**==========================================================
5516*/
5517
5518static void ncr_set_sync_wide_status (struct ncb *np, u_char target)
5519{
5520 struct ccb *cp;
5521 struct tcb *tp = &np->target[target];
5522
5523 /*
5524 ** set actual value and sync_status
5525 */
5526 OUTB (nc_sxfer, tp->sval);
5527 np->sync_st = tp->sval;
5528 OUTB (nc_scntl3, tp->wval);
5529 np->wide_st = tp->wval;
5530
5531 /*
5532 ** patch ALL ccbs of this target.
5533 */
5534 for (cp = np->ccb; cp; cp = cp->link_ccb) {
5535 if (!cp->cmd) continue;
422c0d61 5536 if (scmd_id(cp->cmd) != target) continue;
1da177e4
LT		 5537#if 0
5538 cp->sync_status = tp->sval;
5539 cp->wide_status = tp->wval;
5540#endif
5541 cp->phys.select.sel_scntl3 = tp->wval;
5542 cp->phys.select.sel_sxfer = tp->sval;
5543 }
5544}
5545
5546/*==========================================================
5547**
5548** Switch sync mode for current job and it's target
5549**
5550**==========================================================
5551*/
5552
5553static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer)
5554{
5555 struct scsi_cmnd *cmd = cp->cmd;
5556 struct tcb *tp;
5557 u_char target = INB (nc_sdid) & 0x0f;
5558 u_char idiv;
5559
422c0d61 5560 BUG_ON(target != (scmd_id(cmd) & 0xf));
1da177e4
LT		 5561
5562 tp = &np->target[target];
5563
5564 if (!scntl3 || !(sxfer & 0x1f))
5565 scntl3 = np->rv_scntl3;
5566 scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07);
5567
5568 /*
5569 ** Deduce the value of controller sync period from scntl3.
5570 ** period is in tenths of nano-seconds.
5571 */
5572
5573 idiv = ((scntl3 >> 4) & 0x7);
5574 if ((sxfer & 0x1f) && idiv)
5575 tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
5576 else
5577 tp->period = 0xffff;
5578
5579 /* Stop there if sync parameters are unchanged */
5580 if (tp->sval == sxfer && tp->wval == scntl3)
5581 return;
5582 tp->sval = sxfer;
5583 tp->wval = scntl3;
5584
5585 if (sxfer & 0x01f) {
5586 /* Disable extended Sreq/Sack filtering */
5587 if (tp->period <= 2000)
5588 OUTOFFB(nc_stest2, EXT);
5589 }
5590
5591 spi_display_xfer_agreement(tp->starget);
5592
5593 /*
5594 ** set actual value and sync_status
5595 ** patch ALL ccbs of this target.
5596 */
5597 ncr_set_sync_wide_status(np, target);
5598}
5599
5600/*==========================================================
5601**
5602** Switch wide mode for current job and it's target
5603** SCSI specs say: a SCSI device that accepts a WDTR
5604** message shall reset the synchronous agreement to
5605** asynchronous mode.
5606**
5607**==========================================================
5608*/
5609
5610static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack)
5611{
5612 struct scsi_cmnd *cmd = cp->cmd;
5613 u16 target = INB (nc_sdid) & 0x0f;
5614 struct tcb *tp;
5615 u_char scntl3;
5616 u_char sxfer;
5617
422c0d61 5618 BUG_ON(target != (scmd_id(cmd) & 0xf));
1da177e4
LT		 5619
5620 tp = &np->target[target];
5621 tp->widedone = wide+1;
5622 scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0);
5623
5624 sxfer = ack ? 0 : tp->sval;
5625
5626 /*
5627 ** Stop there if sync/wide parameters are unchanged
5628 */
5629 if (tp->sval == sxfer && tp->wval == scntl3) return;
5630 tp->sval = sxfer;
5631 tp->wval = scntl3;
5632
5633 /*
5634 ** Bells and whistles ;-)
5635 */
5636 if (bootverbose >= 2) {
5637 dev_info(&cmd->device->sdev_target->dev, "WIDE SCSI %sabled.\n",
5638 (scntl3 & EWS) ? "en" : "dis");
5639 }
5640
5641 /*
5642 ** set actual value and sync_status
5643 ** patch ALL ccbs of this target.
5644 */
5645 ncr_set_sync_wide_status(np, target);
5646}
5647
5648/*==========================================================
5649**
5650** Switch tagged mode for a target.
5651**
5652**==========================================================
5653*/
5654
5655static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev)
5656{
5657 unsigned char tn = sdev->id, ln = sdev->lun;
5658 struct tcb *tp = &np->target[tn];
5659 struct lcb *lp = tp->lp[ln];
5660 u_char reqtags, maxdepth;
5661
5662 /*
5663 ** Just in case ...
5664 */
5665 if ((!tp) || (!lp) || !sdev)
5666 return;
5667
5668 /*
5669 ** If SCSI device queue depth is not yet set, leave here.
5670 */
5671 if (!lp->scdev_depth)
5672 return;
5673
5674 /*
5675 ** Donnot allow more tags than the SCSI driver can queue
5676 ** for this device.
5677 ** Donnot allow more tags than we can handle.
5678 */
5679 maxdepth = lp->scdev_depth;
5680 if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs;
5681 if (lp->maxtags > maxdepth) lp->maxtags = maxdepth;
5682 if (lp->numtags > maxdepth) lp->numtags = maxdepth;
5683
5684 /*
5685 ** only devices conformant to ANSI Version >= 2
5686 ** only devices capable of tagged commands
5687 ** only if enabled by user ..
5688 */
5689 if (sdev->tagged_supported && lp->numtags > 1) {
5690 reqtags = lp->numtags;
5691 } else {
5692 reqtags = 1;
5693 }
5694
5695 /*
5696 ** Update max number of tags
5697 */
5698 lp->numtags = reqtags;
5699 if (lp->numtags > lp->maxtags)
5700 lp->maxtags = lp->numtags;
5701
5702 /*
5703 ** If we want to switch tag mode, we must wait
5704 ** for no CCB to be active.
5705 */
5706 if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */
5707 if (lp->queuedepth == reqtags) /* Already announced */
5708 return;
5709 lp->queuedepth = reqtags;
5710 }
5711 else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */
5712 lp->queuedepth = reqtags;
5713 return;
5714 }
5715 else { /* Want to switch tag mode */
5716 if (lp->busyccbs) /* If not yet safe, return */
5717 return;
5718 lp->queuedepth = reqtags;
5719 lp->usetags = reqtags > 1 ? 1 : 0;
5720 }
5721
5722 /*
5723 ** Patch the lun mini-script, according to tag mode.
5724 */
5725 lp->jump_tag.l_paddr = lp->usetags?
5726 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) :
5727 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
5728
5729 /*
5730 ** Announce change to user.
5731 */
5732 if (bootverbose) {
5733 if (lp->usetags) {
5734 dev_info(&sdev->sdev_gendev,
5735 "tagged command queue depth set to %d\n",
5736 reqtags);
5737 } else {
5738 dev_info(&sdev->sdev_gendev,
5739 "tagged command queueing disabled\n");
5740 }
5741 }
5742}
5743
5744/*==========================================================
5745**
5746**
5747** ncr timeout handler.
5748**
5749**
5750**==========================================================
5751**
5752** Misused to keep the driver running when
5753** interrupts are not configured correctly.
5754**
5755**----------------------------------------------------------
5756*/
5757
5758static void ncr_timeout (struct ncb *np)
5759{
f2be34a3 5760 u_long thistime = jiffies;
1da177e4
LT		 5761
5762 /*
5763 ** If release process in progress, let's go
5764 ** Set the release stage from 1 to 2 to synchronize
5765 ** with the release process.
5766 */
5767
5768 if (np->release_stage) {
5769 if (np->release_stage == 1) np->release_stage = 2;
5770 return;
5771 }
5772
f2be34a3 5773 np->timer.expires = jiffies + SCSI_NCR_TIMER_INTERVAL;
1da177e4
LT		 5774 add_timer(&np->timer);
5775
5776 /*
5777 ** If we are resetting the ncr, wait for settle_time before
5778 ** clearing it. Then command processing will be resumed.
5779 */
5780 if (np->settle_time) {
5781 if (np->settle_time <= thistime) {
5782 if (bootverbose > 1)
5783 printk("%s: command processing resumed\n", ncr_name(np));
5784 np->settle_time = 0;
5785 np->disc = 1;
5786 requeue_waiting_list(np);
5787 }
5788 return;
5789 }
5790
5791 /*
5792 ** Since the generic scsi driver only allows us 0.5 second
5793 ** to perform abort of a command, we must look at ccbs about
5794 ** every 0.25 second.
5795 */
5796 if (np->lasttime + 4*HZ < thistime) {
5797 /*
5798 ** block ncr interrupts
5799 */
5800 np->lasttime = thistime;
5801 }
5802
5803#ifdef SCSI_NCR_BROKEN_INTR
5804 if (INB(nc_istat) & (INTF|SIP|DIP)) {
5805
5806 /*
5807 ** Process pending interrupts.
5808 */
5809 if (DEBUG_FLAGS & DEBUG_TINY) printk ("{");
5810 ncr_exception (np);
5811 if (DEBUG_FLAGS & DEBUG_TINY) printk ("}");
5812 }
5813#endif /* SCSI_NCR_BROKEN_INTR */
5814}
5815
5816/*==========================================================
5817**
5818** log message for real hard errors
5819**
5820** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
5821** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
5822**
5823** exception register:
5824** ds: dstat
5825** si: sist
5826**
5827** SCSI bus lines:
5828** so: control lines as driver by NCR.
5829** si: control lines as seen by NCR.
5830** sd: scsi data lines as seen by NCR.
5831**
5832** wide/fastmode:
5833** sxfer: (see the manual)
5834** scntl3: (see the manual)
5835**
5836** current script command:
5837** dsp: script address (relative to start of script).
5838** dbc: first word of script command.
5839**
5840** First 16 register of the chip:
5841** r0..rf
5842**
5843**==========================================================
5844*/
5845
5846static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat)
5847{
5848 u32 dsp;
5849 int script_ofs;
5850 int script_size;
5851 char *script_name;
5852 u_char *script_base;
5853 int i;
5854
5855 dsp = INL (nc_dsp);
5856
5857 if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) {
5858 script_ofs = dsp - np->p_script;
5859 script_size = sizeof(struct script);
5860 script_base = (u_char *) np->script0;
5861 script_name = "script";
5862 }
5863 else if (np->p_scripth < dsp &&
5864 dsp <= np->p_scripth + sizeof(struct scripth)) {
5865 script_ofs = dsp - np->p_scripth;
5866 script_size = sizeof(struct scripth);
5867 script_base = (u_char *) np->scripth0;
5868 script_name = "scripth";
5869 } else {
5870 script_ofs = dsp;
5871 script_size = 0;
5872 script_base = NULL;
5873 script_name = "mem";
5874 }
5875
5876 printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
5877 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
5878 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
5879 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
5880 (unsigned)INL (nc_dbc));
5881
5882 if (((script_ofs & 3) == 0) &&
5883 (unsigned)script_ofs < script_size) {
5884 printk ("%s: script cmd = %08x\n", ncr_name(np),
5885 scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs)));
5886 }
5887
5888 printk ("%s: regdump:", ncr_name(np));
5889 for (i=0; i<16;i++)
5890 printk (" %02x", (unsigned)INB_OFF(i));
5891 printk (".\n");
5892}
5893
5894/*============================================================
5895**
5896** ncr chip exception handler.
5897**
5898**============================================================
5899**
5900** In normal cases, interrupt conditions occur one at a
5901** time. The ncr is able to stack in some extra registers
0779bf2d
ML		 5902** other interrupts that will occur after the first one.
5903** But, several interrupts may occur at the same time.
1da177e4
LT		 5904**
5905** We probably should only try to deal with the normal
5906** case, but it seems that multiple interrupts occur in
5907** some cases that are not abnormal at all.
5908**
5909** The most frequent interrupt condition is Phase Mismatch.
5910** We should want to service this interrupt quickly.
5911** A SCSI parity error may be delivered at the same time.
5912** The SIR interrupt is not very frequent in this driver,
5913** since the INTFLY is likely used for command completion
5914** signaling.
5915** The Selection Timeout interrupt may be triggered with
5916** IID and/or UDC.
5917** The SBMC interrupt (SCSI Bus Mode Change) may probably
5918** occur at any time.
5919**
5920** This handler try to deal as cleverly as possible with all
5921** the above.
5922**
5923**============================================================
5924*/
5925
5926void ncr_exception (struct ncb *np)
5927{
5928 u_char istat, dstat;
5929 u16 sist;
5930 int i;
5931
5932 /*
5933 ** interrupt on the fly ?
5934 ** Since the global header may be copied back to a CCB
5935 ** using a posted PCI memory write, the last operation on
5936 ** the istat register is a READ in order to flush posted
5937 ** PCI write commands.
5938 */
5939 istat = INB (nc_istat);
5940 if (istat & INTF) {
5941 OUTB (nc_istat, (istat & SIGP) | INTF);
5942 istat = INB (nc_istat);
5943 if (DEBUG_FLAGS & DEBUG_TINY) printk ("F ");
5944 ncr_wakeup_done (np);
5945 }
5946
5947 if (!(istat & (SIP|DIP)))
5948 return;
5949
5950 if (istat & CABRT)
5951 OUTB (nc_istat, CABRT);
5952
5953 /*
5954 ** Steinbach's Guideline for Systems Programming:
5955 ** Never test for an error condition you don't know how to handle.
5956 */
5957
5958 sist = (istat & SIP) ? INW (nc_sist) : 0;
5959 dstat = (istat & DIP) ? INB (nc_dstat) : 0;
5960
5961 if (DEBUG_FLAGS & DEBUG_TINY)
5962 printk ("<%d|%x:%x|%x:%x>",
5963 (int)INB(nc_scr0),
5964 dstat,sist,
5965 (unsigned)INL(nc_dsp),
5966 (unsigned)INL(nc_dbc));
5967
5968 /*========================================================
5969 ** First, interrupts we want to service cleanly.
5970 **
5971 ** Phase mismatch is the most frequent interrupt, and
5972 ** so we have to service it as quickly and as cleanly
5973 ** as possible.
5974 ** Programmed interrupts are rarely used in this driver,
5975 ** but we must handle them cleanly anyway.
5976 ** We try to deal with PAR and SBMC combined with
5977 ** some other interrupt(s).
5978 **=========================================================
5979 */
5980
5981 if (!(sist & (STO|GEN|HTH|SGE|UDC|RST)) &&
5982 !(dstat & (MDPE|BF|ABRT|IID))) {
5983 if ((sist & SBMC) && ncr_int_sbmc (np))
5984 return;
5985 if ((sist & PAR) && ncr_int_par (np))
5986 return;
5987 if (sist & MA) {
5988 ncr_int_ma (np);
5989 return;
5990 }
5991 if (dstat & SIR) {
5992 ncr_int_sir (np);
5993 return;
5994 }
5995 /*
5996 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 2.
5997 */
5998 if (!(sist & (SBMC|PAR)) && !(dstat & SSI)) {
5999 printk( "%s: unknown interrupt(s) ignored, "
6000 "ISTAT=%x DSTAT=%x SIST=%x\n",
6001 ncr_name(np), istat, dstat, sist);
6002 return;
6003 }
6004 OUTONB_STD ();
6005 return;
6006 }
6007
6008 /*========================================================
6009 ** Now, interrupts that need some fixing up.
6010 ** Order and multiple interrupts is so less important.
6011 **
6012 ** If SRST has been asserted, we just reset the chip.
6013 **
6014 ** Selection is intirely handled by the chip. If the
6015 ** chip says STO, we trust it. Seems some other
6016 ** interrupts may occur at the same time (UDC, IID), so
6017 ** we ignore them. In any case we do enough fix-up
6018 ** in the service routine.
6019 ** We just exclude some fatal dma errors.
6020 **=========================================================
6021 */
6022
6023 if (sist & RST) {
6024 ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET);
6025 return;
6026 }
6027
6028 if ((sist & STO) &&
6029 !(dstat & (MDPE|BF|ABRT))) {
6030 /*
6031 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 1.
6032 */
6033 OUTONB (nc_ctest3, CLF);
6034
6035 ncr_int_sto (np);
6036 return;
6037 }
6038
6039 /*=========================================================
6040 ** Now, interrupts we are not able to recover cleanly.
6041 ** (At least for the moment).
6042 **
6043 ** Do the register dump.
6044 ** Log message for real hard errors.
6045 ** Clear all fifos.
6046 ** For MDPE, BF, ABORT, IID, SGE and HTH we reset the
6047 ** BUS and the chip.
6048 ** We are more soft for UDC.
6049 **=========================================================
6050 */
6051
f2be34a3
MW		 6052 if (time_after(jiffies, np->regtime)) {
6053 np->regtime = jiffies + 10*HZ;
1da177e4
LT		 6054 for (i = 0; i<sizeof(np->regdump); i++)
6055 ((char*)&np->regdump)[i] = INB_OFF(i);
6056 np->regdump.nc_dstat = dstat;
6057 np->regdump.nc_sist = sist;
6058 }
6059
6060 ncr_log_hard_error(np, sist, dstat);
6061
6062 printk ("%s: have to clear fifos.\n", ncr_name (np));
6063 OUTB (nc_stest3, TE|CSF);
6064 OUTONB (nc_ctest3, CLF);
6065
6066 if ((sist & (SGE)) ||
6067 (dstat & (MDPE|BF|ABRT|IID))) {
6068 ncr_start_reset(np);
6069 return;
6070 }
6071
6072 if (sist & HTH) {
6073 printk ("%s: handshake timeout\n", ncr_name(np));
6074 ncr_start_reset(np);
6075 return;
6076 }
6077
6078 if (sist & UDC) {
6079 printk ("%s: unexpected disconnect\n", ncr_name(np));
6080 OUTB (HS_PRT, HS_UNEXPECTED);
6081 OUTL_DSP (NCB_SCRIPT_PHYS (np, cleanup));
6082 return;
6083 }
6084
6085 /*=========================================================
6086 ** We just miss the cause of the interrupt. :(
6087 ** Print a message. The timeout will do the real work.
6088 **=========================================================
6089 */
6090 printk ("%s: unknown interrupt\n", ncr_name(np));
6091}
6092
6093/*==========================================================
6094**
6095** ncr chip exception handler for selection timeout
6096**
6097**==========================================================
6098**
6099** There seems to be a bug in the 53c810.
6100** Although a STO-Interrupt is pending,
6101** it continues executing script commands.
6102** But it will fail and interrupt (IID) on
6103** the next instruction where it's looking
6104** for a valid phase.
6105**
6106**----------------------------------------------------------
6107*/
6108
6109void ncr_int_sto (struct ncb *np)
6110{
6111 u_long dsa;
6112 struct ccb *cp;
6113 if (DEBUG_FLAGS & DEBUG_TINY) printk ("T");
6114
6115 /*
6116 ** look for ccb and set the status.
6117 */
6118
6119 dsa = INL (nc_dsa);
6120 cp = np->ccb;
6121 while (cp && (CCB_PHYS (cp, phys) != dsa))
6122 cp = cp->link_ccb;
6123
6124 if (cp) {
6125 cp-> host_status = HS_SEL_TIMEOUT;
6126 ncr_complete (np, cp);
6127 }
6128
6129 /*
6130 ** repair start queue and jump to start point.
6131 */
6132
6133 OUTL_DSP (NCB_SCRIPTH_PHYS (np, sto_restart));
6134 return;
6135}
6136
6137/*==========================================================
6138**
6139** ncr chip exception handler for SCSI bus mode change
6140**
6141**==========================================================
6142**
6143** spi2-r12 11.2.3 says a transceiver mode change must
6144** generate a reset event and a device that detects a reset
6145** event shall initiate a hard reset. It says also that a
6146** device that detects a mode change shall set data transfer
6147** mode to eight bit asynchronous, etc...
6148** So, just resetting should be enough.
6149**
6150**
6151**----------------------------------------------------------
6152*/
6153
6154static int ncr_int_sbmc (struct ncb *np)
6155{
6156 u_char scsi_mode = INB (nc_stest4) & SMODE;
6157
6158 if (scsi_mode != np->scsi_mode) {
6159 printk("%s: SCSI bus mode change from %x to %x.\n",
6160 ncr_name(np), np->scsi_mode, scsi_mode);
6161
6162 np->scsi_mode = scsi_mode;
6163
6164
6165 /*
6166 ** Suspend command processing for 1 second and
6167 ** reinitialize all except the chip.
6168 */
f2be34a3 6169 np->settle_time = jiffies + HZ;
1da177e4
LT		 6170 ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET);
6171 return 1;
6172 }
6173 return 0;
6174}
6175
6176/*==========================================================
6177**
6178** ncr chip exception handler for SCSI parity error.
6179**
6180**==========================================================
6181**
6182**
6183**----------------------------------------------------------
6184*/
6185
6186static int ncr_int_par (struct ncb *np)
6187{
6188 u_char hsts = INB (HS_PRT);
6189 u32 dbc = INL (nc_dbc);
6190 u_char sstat1 = INB (nc_sstat1);
6191 int phase = -1;
6192 int msg = -1;
6193 u32 jmp;
6194
6195 printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n",
6196 ncr_name(np), hsts, dbc, sstat1);
6197
6198 /*
6199 * Ignore the interrupt if the NCR is not connected
6200 * to the SCSI bus, since the right work should have
6201 * been done on unexpected disconnection handling.
6202 */
6203 if (!(INB (nc_scntl1) & ISCON))
6204 return 0;
6205
6206 /*
6207 * If the nexus is not clearly identified, reset the bus.
6208 * We will try to do better later.
6209 */
6210 if (hsts & HS_INVALMASK)
6211 goto reset_all;
6212
6213 /*
6214 * If the SCSI parity error occurs in MSG IN phase, prepare a
6215 * MSG PARITY message. Otherwise, prepare a INITIATOR DETECTED
6216 * ERROR message and let the device decide to retry the command
6217 * or to terminate with check condition. If we were in MSG IN
6218 * phase waiting for the response of a negotiation, we will
6219 * get SIR_NEGO_FAILED at dispatch.
6220 */
6221 if (!(dbc & 0xc0000000))
6222 phase = (dbc >> 24) & 7;
6223 if (phase == 7)
b0dc1db1 6224 msg = MSG_PARITY_ERROR;
1da177e4 6225 else
b0dc1db1 6226 msg = INITIATOR_ERROR;
1da177e4
LT		 6227
6228
6229 /*
6230 * If the NCR stopped on a MOVE ^ DATA_IN, we jump to a
6231 * script that will ignore all data in bytes until phase
6232 * change, since we are not sure the chip will wait the phase
6233 * change prior to delivering the interrupt.
6234 */
6235 if (phase == 1)
6236 jmp = NCB_SCRIPTH_PHYS (np, par_err_data_in);
6237 else
6238 jmp = NCB_SCRIPTH_PHYS (np, par_err_other);
6239
6240 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */
6241 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
6242
6243 np->msgout[0] = msg;
6244 OUTL_DSP (jmp);
6245 return 1;
6246
6247reset_all:
6248 ncr_start_reset(np);
6249 return 1;
6250}
6251
6252/*==========================================================
6253**
6254**
6255** ncr chip exception handler for phase errors.
6256**
6257**
6258**==========================================================
6259**
6260** We have to construct a new transfer descriptor,
6261** to transfer the rest of the current block.
6262**
6263**----------------------------------------------------------
6264*/
6265
6266static void ncr_int_ma (struct ncb *np)
6267{
6268 u32 dbc;
6269 u32 rest;
6270 u32 dsp;
6271 u32 dsa;
6272 u32 nxtdsp;
6273 u32 newtmp;
6274 u32 *vdsp;
6275 u32 oadr, olen;
6276 u32 *tblp;
6277 ncrcmd *newcmd;
6278 u_char cmd, sbcl;
6279 struct ccb *cp;
6280
6281 dsp = INL (nc_dsp);
6282 dbc = INL (nc_dbc);
6283 sbcl = INB (nc_sbcl);
6284
6285 cmd = dbc >> 24;
6286 rest = dbc & 0xffffff;
6287
6288 /*
6289 ** Take into account dma fifo and various buffers and latches,
6290 ** only if the interrupted phase is an OUTPUT phase.
6291 */
6292
6293 if ((cmd & 1) == 0) {
6294 u_char ctest5, ss0, ss2;
6295 u16 delta;
6296
6297 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
6298 if (ctest5 & DFS)
6299 delta=(((ctest5 << 8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff;
6300 else
6301 delta=(INB (nc_dfifo) - rest) & 0x7f;
6302
6303 /*
6304 ** The data in the dma fifo has not been transferred to
6305 ** the target -> add the amount to the rest
6306 ** and clear the data.
6307 ** Check the sstat2 register in case of wide transfer.
6308 */
6309
6310 rest += delta;
6311 ss0 = INB (nc_sstat0);
6312 if (ss0 & OLF) rest++;
6313 if (ss0 & ORF) rest++;
6314 if (INB(nc_scntl3) & EWS) {
6315 ss2 = INB (nc_sstat2);
6316 if (ss2 & OLF1) rest++;
6317 if (ss2 & ORF1) rest++;
6318 }
6319
6320 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
6321 printk ("P%x%x RL=%d D=%d SS0=%x ", cmd&7, sbcl&7,
6322 (unsigned) rest, (unsigned) delta, ss0);
6323
6324 } else {
6325 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
6326 printk ("P%x%x RL=%d ", cmd&7, sbcl&7, rest);
6327 }
6328
6329 /*
6330 ** Clear fifos.
6331 */
6332 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */
6333 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
6334
6335 /*
6336 ** locate matching cp.
6337 ** if the interrupted phase is DATA IN or DATA OUT,
6338 ** trust the global header.
6339 */
6340 dsa = INL (nc_dsa);
6341 if (!(cmd & 6)) {
6342 cp = np->header.cp;
6343 if (CCB_PHYS(cp, phys) != dsa)
6344 cp = NULL;
6345 } else {
6346 cp = np->ccb;
6347 while (cp && (CCB_PHYS (cp, phys) != dsa))
6348 cp = cp->link_ccb;
6349 }
6350
6351 /*
6352 ** try to find the interrupted script command,
6353 ** and the address at which to continue.
6354 */
6355 vdsp = NULL;
6356 nxtdsp = 0;
6357 if (dsp > np->p_script &&
6358 dsp <= np->p_script + sizeof(struct script)) {
6359 vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8));
6360 nxtdsp = dsp;
6361 }
6362 else if (dsp > np->p_scripth &&
6363 dsp <= np->p_scripth + sizeof(struct scripth)) {
6364 vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8));
6365 nxtdsp = dsp;
6366 }
6367 else if (cp) {
6368 if (dsp == CCB_PHYS (cp, patch[2])) {
6369 vdsp = &cp->patch[0];
6370 nxtdsp = scr_to_cpu(vdsp[3]);
6371 }
6372 else if (dsp == CCB_PHYS (cp, patch[6])) {
6373 vdsp = &cp->patch[4];
6374 nxtdsp = scr_to_cpu(vdsp[3]);
6375 }
6376 }
6377
6378 /*
6379 ** log the information
6380 */
6381
6382 if (DEBUG_FLAGS & DEBUG_PHASE) {
6383 printk ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
6384 cp, np->header.cp,
6385 (unsigned)dsp,
6386 (unsigned)nxtdsp, vdsp, cmd);
6387 }
6388
6389 /*
6390 ** cp=0 means that the DSA does not point to a valid control
6391 ** block. This should not happen since we donnot use multi-byte
6392 ** move while we are being reselected ot after command complete.
6393 ** We are not able to recover from such a phase error.
6394 */
6395 if (!cp) {
6396 printk ("%s: SCSI phase error fixup: "
6397 "CCB already dequeued (0x%08lx)\n",
6398 ncr_name (np), (u_long) np->header.cp);
6399 goto reset_all;
6400 }
6401
6402 /*
6403 ** get old startaddress and old length.
6404 */
6405
6406 oadr = scr_to_cpu(vdsp[1]);
6407
6408 if (cmd & 0x10) { /* Table indirect */
6409 tblp = (u32 *) ((char*) &cp->phys + oadr);
6410 olen = scr_to_cpu(tblp[0]);
6411 oadr = scr_to_cpu(tblp[1]);
6412 } else {
6413 tblp = (u32 *) 0;
6414 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
6415 }
6416
6417 if (DEBUG_FLAGS & DEBUG_PHASE) {
6418 printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
6419 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
6420 tblp,
6421 (unsigned) olen,
6422 (unsigned) oadr);
6423 }
6424
6425 /*
6426 ** check cmd against assumed interrupted script command.
6427 */
6428
6429 if (cmd != (scr_to_cpu(vdsp[0]) >> 24)) {
6430 PRINT_ADDR(cp->cmd, "internal error: cmd=%02x != %02x=(vdsp[0] "
6431 ">> 24)\n", cmd, scr_to_cpu(vdsp[0]) >> 24);
6432
6433 goto reset_all;
6434 }
6435
6436 /*
6437 ** cp != np->header.cp means that the header of the CCB
6438 ** currently being processed has not yet been copied to
6439 ** the global header area. That may happen if the device did
6440 ** not accept all our messages after having been selected.
6441 */
6442 if (cp != np->header.cp) {
6443 printk ("%s: SCSI phase error fixup: "
6444 "CCB address mismatch (0x%08lx != 0x%08lx)\n",
6445 ncr_name (np), (u_long) cp, (u_long) np->header.cp);
6446 }
6447
6448 /*
6449 ** if old phase not dataphase, leave here.
6450 */
6451
6452 if (cmd & 0x06) {
6453 PRINT_ADDR(cp->cmd, "phase change %x-%x %d@%08x resid=%d.\n",
6454 cmd&7, sbcl&7, (unsigned)olen,
6455 (unsigned)oadr, (unsigned)rest);
6456 goto unexpected_phase;
6457 }
6458
6459 /*
6460 ** choose the correct patch area.
6461 ** if savep points to one, choose the other.
6462 */
6463
6464 newcmd = cp->patch;
6465 newtmp = CCB_PHYS (cp, patch);
6466 if (newtmp == scr_to_cpu(cp->phys.header.savep)) {
6467 newcmd = &cp->patch[4];
6468 newtmp = CCB_PHYS (cp, patch[4]);
6469 }
6470
6471 /*
6472 ** fillin the commands
6473 */
6474
6475 newcmd[0] = cpu_to_scr(((cmd & 0x0f) << 24) | rest);
6476 newcmd[1] = cpu_to_scr(oadr + olen - rest);
6477 newcmd[2] = cpu_to_scr(SCR_JUMP);
6478 newcmd[3] = cpu_to_scr(nxtdsp);
6479
6480 if (DEBUG_FLAGS & DEBUG_PHASE) {
6481 PRINT_ADDR(cp->cmd, "newcmd[%d] %x %x %x %x.\n",
6482 (int) (newcmd - cp->patch),
6483 (unsigned)scr_to_cpu(newcmd[0]),
6484 (unsigned)scr_to_cpu(newcmd[1]),
6485 (unsigned)scr_to_cpu(newcmd[2]),
6486 (unsigned)scr_to_cpu(newcmd[3]));
6487 }
6488 /*
6489 ** fake the return address (to the patch).
6490 ** and restart script processor at dispatcher.
6491 */
6492 OUTL (nc_temp, newtmp);
6493 OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch));
6494 return;
6495
6496 /*
6497 ** Unexpected phase changes that occurs when the current phase
6498 ** is not a DATA IN or DATA OUT phase are due to error conditions.
6499 ** Such event may only happen when the SCRIPTS is using a
6500 ** multibyte SCSI MOVE.
6501 **
6502 ** Phase change Some possible cause
6503 **
6504 ** COMMAND --> MSG IN SCSI parity error detected by target.
6505 ** COMMAND --> STATUS Bad command or refused by target.
6506 ** MSG OUT --> MSG IN Message rejected by target.
6507 ** MSG OUT --> COMMAND Bogus target that discards extended
6508 ** negotiation messages.
6509 **
6510 ** The code below does not care of the new phase and so
6511 ** trusts the target. Why to annoy it ?
6512 ** If the interrupted phase is COMMAND phase, we restart at
6513 ** dispatcher.
6514 ** If a target does not get all the messages after selection,
6515 ** the code assumes blindly that the target discards extended
6516 ** messages and clears the negotiation status.
6517 ** If the target does not want all our response to negotiation,
6518 ** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
6519 ** bloat for such a should_not_happen situation).
6520 ** In all other situation, we reset the BUS.
6521 ** Are these assumptions reasonnable ? (Wait and see ...)
6522 */
6523unexpected_phase:
6524 dsp -= 8;
6525 nxtdsp = 0;
6526
6527 switch (cmd & 7) {
6528 case 2: /* COMMAND phase */
6529 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
6530 break;
6531#if 0
6532 case 3: /* STATUS phase */
6533 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
6534 break;
6535#endif
6536 case 6: /* MSG OUT phase */
6537 np->scripth->nxtdsp_go_on[0] = cpu_to_scr(dsp + 8);
6538 if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) {
6539 cp->host_status = HS_BUSY;
6540 nxtdsp = NCB_SCRIPTH_PHYS (np, clratn_go_on);
6541 }
6542 else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) ||
6543 dsp == NCB_SCRIPTH_PHYS (np, send_sdtr)) {
6544 nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase);
6545 }
6546 break;
6547#if 0
6548 case 7: /* MSG IN phase */
6549 nxtdsp = NCB_SCRIPT_PHYS (np, clrack);
6550 break;
6551#endif
6552 }
6553
6554 if (nxtdsp) {
6555 OUTL_DSP (nxtdsp);
6556 return;
6557 }
6558
6559reset_all:
6560 ncr_start_reset(np);
6561}
6562
6563
6564static void ncr_sir_to_redo(struct ncb *np, int num, struct ccb *cp)
6565{
6566 struct scsi_cmnd *cmd = cp->cmd;
6567 struct tcb *tp = &np->target[cmd->device->id];
6568 struct lcb *lp = tp->lp[cmd->device->lun];
6569 struct list_head *qp;
6570 struct ccb * cp2;
6571 int disc_cnt = 0;
6572 int busy_cnt = 0;
6573 u32 startp;
6574 u_char s_status = INB (SS_PRT);
6575
6576 /*
6577 ** Let the SCRIPTS processor skip all not yet started CCBs,
6578 ** and count disconnected CCBs. Since the busy queue is in
6579 ** the same order as the chip start queue, disconnected CCBs
6580 ** are before cp and busy ones after.
6581 */
6582 if (lp) {
6583 qp = lp->busy_ccbq.prev;
6584 while (qp != &lp->busy_ccbq) {
6585 cp2 = list_entry(qp, struct ccb, link_ccbq);
6586 qp = qp->prev;
6587 ++busy_cnt;
6588 if (cp2 == cp)
6589 break;
6590 cp2->start.schedule.l_paddr =
6591 cpu_to_scr(NCB_SCRIPTH_PHYS (np, skip));
6592 }
6593 lp->held_ccb = cp; /* Requeue when this one completes */
6594 disc_cnt = lp->queuedccbs - busy_cnt;
6595 }
6596
6597 switch(s_status) {
6598 default: /* Just for safety, should never happen */
6599 case S_QUEUE_FULL:
6600 /*
6601 ** Decrease number of tags to the number of
6602 ** disconnected commands.
6603 */
6604 if (!lp)
6605 goto out;
6606 if (bootverbose >= 1) {
6607 PRINT_ADDR(cmd, "QUEUE FULL! %d busy, %d disconnected "
6608 "CCBs\n", busy_cnt, disc_cnt);
6609 }
6610 if (disc_cnt < lp->numtags) {
6611 lp->numtags = disc_cnt > 2 ? disc_cnt : 2;
6612 lp->num_good = 0;
6613 ncr_setup_tags (np, cmd->device);
6614 }
6615 /*
6616 ** Requeue the command to the start queue.
6617 ** If any disconnected commands,
6618 ** Clear SIGP.
6619 ** Jump to reselect.
6620 */
6621 cp->phys.header.savep = cp->startp;
6622 cp->host_status = HS_BUSY;
6623 cp->scsi_status = S_ILLEGAL;
6624
6625 ncr_put_start_queue(np, cp);
6626 if (disc_cnt)
6627 INB (nc_ctest2); /* Clear SIGP */
6628 OUTL_DSP (NCB_SCRIPT_PHYS (np, reselect));
6629 return;
6630 case S_TERMINATED:
6631 case S_CHECK_COND:
6632 /*
6633 ** If we were requesting sense, give up.
6634 */
6635 if (cp->auto_sense)
6636 goto out;
6637
6638 /*
6639 ** Device returned CHECK CONDITION status.
6640 ** Prepare all needed data strutures for getting
6641 ** sense data.
6642 **
6643 ** identify message
6644 */
6645 cp->scsi_smsg2[0] = IDENTIFY(0, cmd->device->lun);
6646 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2));
6647 cp->phys.smsg.size = cpu_to_scr(1);
6648
6649 /*
6650 ** sense command
6651 */
6652 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd));
6653 cp->phys.cmd.size = cpu_to_scr(6);
6654
6655 /*
6656 ** patch requested size into sense command
6657 */
6658 cp->sensecmd[0] = 0x03;
6659 cp->sensecmd[1] = cmd->device->lun << 5;
6660 cp->sensecmd[4] = sizeof(cp->sense_buf);
6661
6662 /*
6663 ** sense data
6664 */
6665 memset(cp->sense_buf, 0, sizeof(cp->sense_buf));
6666 cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0]));
6667 cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf));
6668
6669 /*
6670 ** requeue the command.
6671 */
6672 startp = cpu_to_scr(NCB_SCRIPTH_PHYS (np, sdata_in));
6673
6674 cp->phys.header.savep = startp;
6675 cp->phys.header.goalp = startp + 24;
6676 cp->phys.header.lastp = startp;
6677 cp->phys.header.wgoalp = startp + 24;
6678 cp->phys.header.wlastp = startp;
6679
6680 cp->host_status = HS_BUSY;
6681 cp->scsi_status = S_ILLEGAL;
6682 cp->auto_sense = s_status;
6683
6684 cp->start.schedule.l_paddr =
6685 cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
6686
6687 /*
6688 ** Select without ATN for quirky devices.
6689 */
6690 if (cmd->device->select_no_atn)
6691 cp->start.schedule.l_paddr =
6692 cpu_to_scr(NCB_SCRIPTH_PHYS (np, select_no_atn));
6693
6694 ncr_put_start_queue(np, cp);
6695
6696 OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
6697 return;
6698 }
6699
6700out:
6701 OUTONB_STD ();
6702 return;
6703}
6704
6705
6706/*==========================================================
6707**
6708**
6709** ncr chip exception handler for programmed interrupts.
6710**
6711**
6712**==========================================================
6713*/
6714
6715void ncr_int_sir (struct ncb *np)
6716{
6717 u_char scntl3;
6718 u_char chg, ofs, per, fak, wide;
6719 u_char num = INB (nc_dsps);
6720 struct ccb *cp=NULL;
6721 u_long dsa = INL (nc_dsa);
6722 u_char target = INB (nc_sdid) & 0x0f;
6723 struct tcb *tp = &np->target[target];
6724 struct scsi_target *starget = tp->starget;
6725
6726 if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num);
6727
6728 switch (num) {
6729 case SIR_INTFLY:
6730 /*
6731 ** This is used for HP Zalon/53c720 where INTFLY
6732 ** operation is currently broken.
6733 */
6734 ncr_wakeup_done(np);
6735#ifdef SCSI_NCR_CCB_DONE_SUPPORT
6736 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, done_end) + 8);
6737#else
6738 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, start));
6739#endif
6740 return;
6741 case SIR_RESEL_NO_MSG_IN:
6742 case SIR_RESEL_NO_IDENTIFY:
6743 /*
6744 ** If devices reselecting without sending an IDENTIFY
6745 ** message still exist, this should help.
6746 ** We just assume lun=0, 1 CCB, no tag.
6747 */
6748 if (tp->lp[0]) {
6749 OUTL_DSP (scr_to_cpu(tp->lp[0]->jump_ccb[0]));
6750 return;
6751 }
6752 case SIR_RESEL_BAD_TARGET: /* Will send a TARGET RESET message */
6753 case SIR_RESEL_BAD_LUN: /* Will send a TARGET RESET message */
6754 case SIR_RESEL_BAD_I_T_L_Q: /* Will send an ABORT TAG message */
6755 case SIR_RESEL_BAD_I_T_L: /* Will send an ABORT message */
6756 printk ("%s:%d: SIR %d, "
6757 "incorrect nexus identification on reselection\n",
6758 ncr_name (np), target, num);
6759 goto out;
6760 case SIR_DONE_OVERFLOW:
6761 printk ("%s:%d: SIR %d, "
6762 "CCB done queue overflow\n",
6763 ncr_name (np), target, num);
6764 goto out;
6765 case SIR_BAD_STATUS:
6766 cp = np->header.cp;
6767 if (!cp || CCB_PHYS (cp, phys) != dsa)
6768 goto out;
6769 ncr_sir_to_redo(np, num, cp);
6770 return;
6771 default:
6772 /*
6773 ** lookup the ccb
6774 */
6775 cp = np->ccb;
6776 while (cp && (CCB_PHYS (cp, phys) != dsa))
6777 cp = cp->link_ccb;
6778
6779 BUG_ON(!cp);
6780 BUG_ON(cp != np->header.cp);
6781
6782 if (!cp || cp != np->header.cp)
6783 goto out;
6784 }
6785
6786 switch (num) {
6787/*-----------------------------------------------------------------------------
6788**
6789** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
b0dc1db1
MW		 6790** ("Everything you've always wanted to know about transfer mode
6791** negotiation")
1da177e4
LT		 6792**
6793** We try to negotiate sync and wide transfer only after
6794** a successful inquire command. We look at byte 7 of the
6795** inquire data to determine the capabilities of the target.
6796**
6797** When we try to negotiate, we append the negotiation message
6798** to the identify and (maybe) simple tag message.
6799** The host status field is set to HS_NEGOTIATE to mark this
6800** situation.
6801**
0779bf2d 6802** If the target doesn't answer this message immediately
1da177e4
LT		 6803** (as required by the standard), the SIR_NEGO_FAIL interrupt
6804** will be raised eventually.
6805** The handler removes the HS_NEGOTIATE status, and sets the
6806** negotiated value to the default (async / nowide).
6807**
6808** If we receive a matching answer immediately, we check it
6809** for validity, and set the values.
6810**
6811** If we receive a Reject message immediately, we assume the
6812** negotiation has failed, and fall back to standard values.
6813**
6814** If we receive a negotiation message while not in HS_NEGOTIATE
6815** state, it's a target initiated negotiation. We prepare a
6816** (hopefully) valid answer, set our parameters, and send back
6817** this answer to the target.
6818**
6819** If the target doesn't fetch the answer (no message out phase),
6820** we assume the negotiation has failed, and fall back to default
6821** settings.
6822**
6823** When we set the values, we adjust them in all ccbs belonging
6824** to this target, in the controller's register, and in the "phys"
6825** field of the controller's struct ncb.
6826**
6827** Possible cases: hs sir msg_in value send goto
6828** We try to negotiate:
6829** -> target doesn't msgin NEG FAIL noop defa. - dispatch
6830** -> target rejected our msg NEG FAIL reject defa. - dispatch
6831** -> target answered (ok) NEG SYNC sdtr set - clrack
6832** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad
6833** -> target answered (ok) NEG WIDE wdtr set - clrack
6834** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad
6835** -> any other msgin NEG FAIL noop defa. - dispatch
6836**
6837** Target tries to negotiate:
6838** -> incoming message --- SYNC sdtr set SDTR -
6839** -> incoming message --- WIDE wdtr set WDTR -
6840** We sent our answer:
6841** -> target doesn't msgout --- PROTO ? defa. - dispatch
6842**
6843**-----------------------------------------------------------------------------
6844*/
6845
6846 case SIR_NEGO_FAILED:
6847 /*-------------------------------------------------------
6848 **
6849 ** Negotiation failed.
6850 ** Target doesn't send an answer message,
6851 ** or target rejected our message.
6852 **
6853 ** Remove negotiation request.
6854 **
6855 **-------------------------------------------------------
6856 */
6857 OUTB (HS_PRT, HS_BUSY);
6858
6859 /* fall through */
6860
6861 case SIR_NEGO_PROTO:
6862 /*-------------------------------------------------------
6863 **
6864 ** Negotiation failed.
6865 ** Target doesn't fetch the answer message.
6866 **
6867 **-------------------------------------------------------
6868 */
6869
6870 if (DEBUG_FLAGS & DEBUG_NEGO) {
6871 PRINT_ADDR(cp->cmd, "negotiation failed sir=%x "
6872 "status=%x.\n", num, cp->nego_status);
6873 }
6874
6875 /*
6876 ** any error in negotiation:
6877 ** fall back to default mode.
6878 */
6879 switch (cp->nego_status) {
6880
6881 case NS_SYNC:
6882 spi_period(starget) = 0;
6883 spi_offset(starget) = 0;
6884 ncr_setsync (np, cp, 0, 0xe0);
6885 break;
6886
6887 case NS_WIDE:
6888 spi_width(starget) = 0;
6889 ncr_setwide (np, cp, 0, 0);
6890 break;
6891
6892 }
b0dc1db1
MW		 6893 np->msgin [0] = NOP;
6894 np->msgout[0] = NOP;
1da177e4
LT		 6895 cp->nego_status = 0;
6896 break;
6897
6898 case SIR_NEGO_SYNC:
6899 if (DEBUG_FLAGS & DEBUG_NEGO) {
6900 ncr_print_msg(cp, "sync msgin", np->msgin);
6901 }
6902
6903 chg = 0;
6904 per = np->msgin[3];
6905 ofs = np->msgin[4];
6906 if (ofs==0) per=255;
6907
6908 /*
6909 ** if target sends SDTR message,
6910 ** it CAN transfer synch.
6911 */
6912
6913 if (ofs && starget)
6914 spi_support_sync(starget) = 1;
6915
6916 /*
6917 ** check values against driver limits.
6918 */
6919
6920 if (per < np->minsync)
6921 {chg = 1; per = np->minsync;}
6922 if (per < tp->minsync)
6923 {chg = 1; per = tp->minsync;}
6924 if (ofs > tp->maxoffs)
6925 {chg = 1; ofs = tp->maxoffs;}
6926
6927 /*
6928 ** Check against controller limits.
6929 */
6930 fak = 7;
6931 scntl3 = 0;
6932 if (ofs != 0) {
6933 ncr_getsync(np, per, &fak, &scntl3);
6934 if (fak > 7) {
6935 chg = 1;
6936 ofs = 0;
6937 }
6938 }
6939 if (ofs == 0) {
6940 fak = 7;
6941 per = 0;
6942 scntl3 = 0;
6943 tp->minsync = 0;
6944 }
6945
6946 if (DEBUG_FLAGS & DEBUG_NEGO) {
6947 PRINT_ADDR(cp->cmd, "sync: per=%d scntl3=0x%x ofs=%d "
6948 "fak=%d chg=%d.\n", per, scntl3, ofs, fak, chg);
6949 }
6950
6951 if (INB (HS_PRT) == HS_NEGOTIATE) {
6952 OUTB (HS_PRT, HS_BUSY);
6953 switch (cp->nego_status) {
6954
6955 case NS_SYNC:
6956 /* This was an answer message */
6957 if (chg) {
6958 /* Answer wasn't acceptable. */
6959 spi_period(starget) = 0;
6960 spi_offset(starget) = 0;
6961 ncr_setsync(np, cp, 0, 0xe0);
6962 OUTL_DSP(NCB_SCRIPT_PHYS (np, msg_bad));
6963 } else {
6964 /* Answer is ok. */
6965 spi_period(starget) = per;
6966 spi_offset(starget) = ofs;
6967 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs);
6968 OUTL_DSP(NCB_SCRIPT_PHYS (np, clrack));
6969 }
6970 return;
6971
6972 case NS_WIDE:
6973 spi_width(starget) = 0;
6974 ncr_setwide(np, cp, 0, 0);
6975 break;
6976 }
6977 }
6978
6979 /*
6980 ** It was a request. Set value and
6981 ** prepare an answer message
6982 */
6983
6984 spi_period(starget) = per;
6985 spi_offset(starget) = ofs;
6986 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs);
6987
6ea3c0b2 6988 spi_populate_sync_msg(np->msgout, per, ofs);
1da177e4
LT		 6989 cp->nego_status = NS_SYNC;
6990
6991 if (DEBUG_FLAGS & DEBUG_NEGO) {
6992 ncr_print_msg(cp, "sync msgout", np->msgout);
6993 }
6994
6995 if (!ofs) {
6996 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad));
6997 return;
6998 }
b0dc1db1 6999 np->msgin [0] = NOP;
1da177e4
LT		 7000
7001 break;
7002
7003 case SIR_NEGO_WIDE:
7004 /*
7005 ** Wide request message received.
7006 */
7007 if (DEBUG_FLAGS & DEBUG_NEGO) {
7008 ncr_print_msg(cp, "wide msgin", np->msgin);
7009 }
7010
7011 /*
7012 ** get requested values.
7013 */
7014
7015 chg = 0;
7016 wide = np->msgin[3];
7017
7018 /*
7019 ** if target sends WDTR message,
7020 ** it CAN transfer wide.
7021 */
7022
7023 if (wide && starget)
7024 spi_support_wide(starget) = 1;
7025
7026 /*
7027 ** check values against driver limits.
7028 */
7029
7030 if (wide > tp->usrwide)
7031 {chg = 1; wide = tp->usrwide;}
7032
7033 if (DEBUG_FLAGS & DEBUG_NEGO) {
7034 PRINT_ADDR(cp->cmd, "wide: wide=%d chg=%d.\n", wide,
7035 chg);
7036 }
7037
7038 if (INB (HS_PRT) == HS_NEGOTIATE) {
7039 OUTB (HS_PRT, HS_BUSY);
7040 switch (cp->nego_status) {
7041
7042 case NS_WIDE:
7043 /*
7044 ** This was an answer message
7045 */
7046 if (chg) {
7047 /* Answer wasn't acceptable. */
7048 spi_width(starget) = 0;
7049 ncr_setwide(np, cp, 0, 1);
7050 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad));
7051 } else {
7052 /* Answer is ok. */
7053 spi_width(starget) = wide;
7054 ncr_setwide(np, cp, wide, 1);
7055 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
7056 }
7057 return;
7058
7059 case NS_SYNC:
7060 spi_period(starget) = 0;
7061 spi_offset(starget) = 0;
7062 ncr_setsync(np, cp, 0, 0xe0);
7063 break;
7064 }
7065 }
7066
7067 /*
7068 ** It was a request, set value and
7069 ** prepare an answer message
7070 */
7071
7072 spi_width(starget) = wide;
7073 ncr_setwide(np, cp, wide, 1);
6ea3c0b2 7074 spi_populate_width_msg(np->msgout, wide);
1da177e4 7075
b0dc1db1 7076 np->msgin [0] = NOP;
1da177e4
LT		 7077
7078 cp->nego_status = NS_WIDE;
7079
7080 if (DEBUG_FLAGS & DEBUG_NEGO) {
7081 ncr_print_msg(cp, "wide msgout", np->msgin);
7082 }
7083 break;
7084
7085/*--------------------------------------------------------------------
7086**
7087** Processing of special messages
7088**
7089**--------------------------------------------------------------------
7090*/
7091
7092 case SIR_REJECT_RECEIVED:
7093 /*-----------------------------------------------
7094 **
b0dc1db1 7095 ** We received a MESSAGE_REJECT.
1da177e4
LT		 7096 **
7097 **-----------------------------------------------
7098 */
7099
b0dc1db1 7100 PRINT_ADDR(cp->cmd, "MESSAGE_REJECT received (%x:%x).\n",
1da177e4
LT		 7101 (unsigned)scr_to_cpu(np->lastmsg), np->msgout[0]);
7102 break;
7103
7104 case SIR_REJECT_SENT:
7105 /*-----------------------------------------------
7106 **
7107 ** We received an unknown message
7108 **
7109 **-----------------------------------------------
7110 */
7111
b0dc1db1 7112 ncr_print_msg(cp, "MESSAGE_REJECT sent for", np->msgin);
1da177e4
LT		 7113 break;
7114
7115/*--------------------------------------------------------------------
7116**
7117** Processing of special messages
7118**
7119**--------------------------------------------------------------------
7120*/
7121
7122 case SIR_IGN_RESIDUE:
7123 /*-----------------------------------------------
7124 **
7125 ** We received an IGNORE RESIDUE message,
7126 ** which couldn't be handled by the script.
7127 **
7128 **-----------------------------------------------
7129 */
7130
b0dc1db1 7131 PRINT_ADDR(cp->cmd, "IGNORE_WIDE_RESIDUE received, but not yet "
1da177e4
LT		 7132 "implemented.\n");
7133 break;
7134#if 0
7135 case SIR_MISSING_SAVE:
7136 /*-----------------------------------------------
7137 **
7138 ** We received an DISCONNECT message,
7139 ** but the datapointer wasn't saved before.
7140 **
7141 **-----------------------------------------------
7142 */
7143
b0dc1db1 7144 PRINT_ADDR(cp->cmd, "DISCONNECT received, but datapointer "
1da177e4
LT		 7145 "not saved: data=%x save=%x goal=%x.\n",
7146 (unsigned) INL (nc_temp),
7147 (unsigned) scr_to_cpu(np->header.savep),
7148 (unsigned) scr_to_cpu(np->header.goalp));
7149 break;
7150#endif
7151 }
7152
7153out:
7154 OUTONB_STD ();
7155}
7156
7157/*==========================================================
7158**
7159**
7160** Acquire a control block
7161**
7162**
7163**==========================================================
7164*/
7165
7166static struct ccb *ncr_get_ccb(struct ncb *np, struct scsi_cmnd *cmd)
7167{
7168 u_char tn = cmd->device->id;
7169 u_char ln = cmd->device->lun;
7170 struct tcb *tp = &np->target[tn];
7171 struct lcb *lp = tp->lp[ln];
7172 u_char tag = NO_TAG;
7173 struct ccb *cp = NULL;
7174
7175 /*
7176 ** Lun structure available ?
7177 */
7178 if (lp) {
7179 struct list_head *qp;
7180 /*
7181 ** Keep from using more tags than we can handle.
7182 */
7183 if (lp->usetags && lp->busyccbs >= lp->maxnxs)
7184 return NULL;
7185
7186 /*
7187 ** Allocate a new CCB if needed.
7188 */
7189 if (list_empty(&lp->free_ccbq))
7190 ncr_alloc_ccb(np, tn, ln);
7191
7192 /*
7193 ** Look for free CCB
7194 */
7195 qp = ncr_list_pop(&lp->free_ccbq);
7196 if (qp) {
7197 cp = list_entry(qp, struct ccb, link_ccbq);
7198 if (cp->magic) {
7199 PRINT_ADDR(cmd, "ccb free list corrupted "
7200 "(@%p)\n", cp);
7201 cp = NULL;
7202 } else {
7203 list_add_tail(qp, &lp->wait_ccbq);
7204 ++lp->busyccbs;
7205 }
7206 }
7207
7208 /*
7209 ** If a CCB is available,
7210 ** Get a tag for this nexus if required.
7211 */
7212 if (cp) {
7213 if (lp->usetags)
7214 tag = lp->cb_tags[lp->ia_tag];
7215 }
7216 else if (lp->actccbs > 0)
7217 return NULL;
7218 }
7219
7220 /*
7221 ** if nothing available, take the default.
7222 */
7223 if (!cp)
7224 cp = np->ccb;
7225
7226 /*
7227 ** Wait until available.
7228 */
7229#if 0
7230 while (cp->magic) {
7231 if (flags & SCSI_NOSLEEP) break;
7232 if (tsleep ((caddr_t)cp, PRIBIO|PCATCH, "ncr", 0))
7233 break;
7234 }
7235#endif
7236
7237 if (cp->magic)
7238 return NULL;
7239
7240 cp->magic = 1;
7241
7242 /*
7243 ** Move to next available tag if tag used.
7244 */
7245 if (lp) {
7246 if (tag != NO_TAG) {
7247 ++lp->ia_tag;
7248 if (lp->ia_tag == MAX_TAGS)
7249 lp->ia_tag = 0;
7250 lp->tags_umap |= (((tagmap_t) 1) << tag);
7251 }
7252 }
7253
7254 /*
7255 ** Remember all informations needed to free this CCB.
7256 */
7257 cp->tag = tag;
7258 cp->target = tn;
7259 cp->lun = ln;
7260
7261 if (DEBUG_FLAGS & DEBUG_TAGS) {
7262 PRINT_ADDR(cmd, "ccb @%p using tag %d.\n", cp, tag);
7263 }
7264
7265 return cp;
7266}
7267
7268/*==========================================================
7269**
7270**
7271** Release one control block
7272**
7273**
7274**==========================================================
7275*/
7276
7277static void ncr_free_ccb (struct ncb *np, struct ccb *cp)
7278{
7279 struct tcb *tp = &np->target[cp->target];
7280 struct lcb *lp = tp->lp[cp->lun];
7281
7282 if (DEBUG_FLAGS & DEBUG_TAGS) {
7283 PRINT_ADDR(cp->cmd, "ccb @%p freeing tag %d.\n", cp, cp->tag);
7284 }
7285
7286 /*
7287 ** If lun control block available,
7288 ** decrement active commands and increment credit,
7289 ** free the tag if any and remove the JUMP for reselect.
7290 */
7291 if (lp) {
7292 if (cp->tag != NO_TAG) {
7293 lp->cb_tags[lp->if_tag++] = cp->tag;
7294 if (lp->if_tag == MAX_TAGS)
7295 lp->if_tag = 0;
7296 lp->tags_umap &= ~(((tagmap_t) 1) << cp->tag);
7297 lp->tags_smap &= lp->tags_umap;
7298 lp->jump_ccb[cp->tag] =
7299 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l_q));
7300 } else {
7301 lp->jump_ccb[0] =
7302 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l));
7303 }
7304 }
7305
7306 /*
7307 ** Make this CCB available.
7308 */
7309
7310 if (lp) {
7311 if (cp != np->ccb)
7312 list_move(&cp->link_ccbq, &lp->free_ccbq);
7313 --lp->busyccbs;
7314 if (cp->queued) {
7315 --lp->queuedccbs;
7316 }
7317 }
7318 cp -> host_status = HS_IDLE;
7319 cp -> magic = 0;
7320 if (cp->queued) {
7321 --np->queuedccbs;
7322 cp->queued = 0;
7323 }
7324
7325#if 0
7326 if (cp == np->ccb)
7327 wakeup ((caddr_t) cp);
7328#endif
7329}
7330
7331
7332#define ncr_reg_bus_addr(r) (np->paddr + offsetof (struct ncr_reg, r))
7333
7334/*------------------------------------------------------------------------
7335** Initialize the fixed part of a CCB structure.
7336**------------------------------------------------------------------------
7337**------------------------------------------------------------------------
7338*/
7339static void ncr_init_ccb(struct ncb *np, struct ccb *cp)
7340{
7341 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4);
7342
7343 /*
7344 ** Remember virtual and bus address of this ccb.
7345 */
7346 cp->p_ccb = vtobus(cp);
7347 cp->phys.header.cp = cp;
7348
7349 /*
7350 ** This allows list_del to work for the default ccb.
7351 */
7352 INIT_LIST_HEAD(&cp->link_ccbq);
7353
7354 /*
7355 ** Initialyze the start and restart launch script.
7356 **
7357 ** COPY(4) @(...p_phys), @(dsa)
7358 ** JUMP @(sched_point)
7359 */
7360 cp->start.setup_dsa[0] = cpu_to_scr(copy_4);
7361 cp->start.setup_dsa[1] = cpu_to_scr(CCB_PHYS(cp, start.p_phys));
7362 cp->start.setup_dsa[2] = cpu_to_scr(ncr_reg_bus_addr(nc_dsa));
7363 cp->start.schedule.l_cmd = cpu_to_scr(SCR_JUMP);
7364 cp->start.p_phys = cpu_to_scr(CCB_PHYS(cp, phys));
7365
7366 memcpy(&cp->restart, &cp->start, sizeof(cp->restart));
7367
7368 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
7369 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort));
7370}
7371
7372
7373/*------------------------------------------------------------------------
7374** Allocate a CCB and initialize its fixed part.
7375**------------------------------------------------------------------------
7376**------------------------------------------------------------------------
7377*/
7378static void ncr_alloc_ccb(struct ncb *np, u_char tn, u_char ln)
7379{
7380 struct tcb *tp = &np->target[tn];
7381 struct lcb *lp = tp->lp[ln];
7382 struct ccb *cp = NULL;
7383
7384 /*
7385 ** Allocate memory for this CCB.
7386 */
7387 cp = m_calloc_dma(sizeof(struct ccb), "CCB");
7388 if (!cp)
7389 return;
7390
7391 /*
7392 ** Count it and initialyze it.
7393 */
7394 lp->actccbs++;
7395 np->actccbs++;
7396 memset(cp, 0, sizeof (*cp));
7397 ncr_init_ccb(np, cp);
7398
7399 /*
7400 ** Chain into wakeup list and free ccb queue and take it
7401 ** into account for tagged commands.
7402 */
7403 cp->link_ccb = np->ccb->link_ccb;
7404 np->ccb->link_ccb = cp;
7405
7406 list_add(&cp->link_ccbq, &lp->free_ccbq);
7407}
7408
7409/*==========================================================
7410**
7411**
7412** Allocation of resources for Targets/Luns/Tags.
7413**
7414**
7415**==========================================================
7416*/
7417
7418
7419/*------------------------------------------------------------------------
7420** Target control block initialisation.
7421**------------------------------------------------------------------------
7422** This data structure is fully initialized after a SCSI command
7423** has been successfully completed for this target.
7424** It contains a SCRIPT that is called on target reselection.
7425**------------------------------------------------------------------------
7426*/
7427static void ncr_init_tcb (struct ncb *np, u_char tn)
7428{
7429 struct tcb *tp = &np->target[tn];
7430 ncrcmd copy_1 = np->features & FE_PFEN ? SCR_COPY(1) : SCR_COPY_F(1);
7431 int th = tn & 3;
7432 int i;
7433
7434 /*
7435 ** Jump to next tcb if SFBR does not match this target.
7436 ** JUMP IF (SFBR != #target#), @(next tcb)
7437 */
7438 tp->jump_tcb.l_cmd =
7439 cpu_to_scr((SCR_JUMP ^ IFFALSE (DATA (0x80 + tn))));
7440 tp->jump_tcb.l_paddr = np->jump_tcb[th].l_paddr;
7441
7442 /*
7443 ** Load the synchronous transfer register.
7444 ** COPY @(tp->sval), @(sxfer)
7445 */
7446 tp->getscr[0] = cpu_to_scr(copy_1);
7447 tp->getscr[1] = cpu_to_scr(vtobus (&tp->sval));
7448#ifdef SCSI_NCR_BIG_ENDIAN
7449 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer) ^ 3);
7450#else
7451 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer));
7452#endif
7453
7454 /*
7455 ** Load the timing register.
7456 ** COPY @(tp->wval), @(scntl3)
7457 */
7458 tp->getscr[3] = cpu_to_scr(copy_1);
7459 tp->getscr[4] = cpu_to_scr(vtobus (&tp->wval));
7460#ifdef SCSI_NCR_BIG_ENDIAN
7461 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3) ^ 3);
7462#else
7463 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3));
7464#endif
7465
7466 /*
7467 ** Get the IDENTIFY message and the lun.
7468 ** CALL @script(resel_lun)
7469 */
7470 tp->call_lun.l_cmd = cpu_to_scr(SCR_CALL);
7471 tp->call_lun.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_lun));
7472
7473 /*
7474 ** Look for the lun control block of this nexus.
7475 ** For i = 0 to 3
7476 ** JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb)
7477 */
7478 for (i = 0 ; i < 4 ; i++) {
7479 tp->jump_lcb[i].l_cmd =
7480 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));
7481 tp->jump_lcb[i].l_paddr =
7482 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_identify));
7483 }
7484
7485 /*
7486 ** Link this target control block to the JUMP chain.
7487 */
7488 np->jump_tcb[th].l_paddr = cpu_to_scr(vtobus (&tp->jump_tcb));
7489
7490 /*
7491 ** These assert's should be moved at driver initialisations.
7492 */
7493#ifdef SCSI_NCR_BIG_ENDIAN
7494 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^
7495 offsetof(struct tcb , sval )) &3) != 3);
7496 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^
7497 offsetof(struct tcb , wval )) &3) != 3);
7498#else
7499 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^
7500 offsetof(struct tcb , sval )) &3) != 0);
7501 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^
7502 offsetof(struct tcb , wval )) &3) != 0);
7503#endif
7504}
7505
7506
7507/*------------------------------------------------------------------------
7508** Lun control block allocation and initialization.
7509**------------------------------------------------------------------------
7510** This data structure is allocated and initialized after a SCSI
7511** command has been successfully completed for this target/lun.
7512**------------------------------------------------------------------------
7513*/
7514static struct lcb *ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln)
7515{
7516 struct tcb *tp = &np->target[tn];
7517 struct lcb *lp = tp->lp[ln];
7518 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4);
7519 int lh = ln & 3;
7520
7521 /*
7522 ** Already done, return.
7523 */
7524 if (lp)
7525 return lp;
7526
7527 /*
7528 ** Allocate the lcb.
7529 */
7530 lp = m_calloc_dma(sizeof(struct lcb), "LCB");
7531 if (!lp)
7532 goto fail;
7533 memset(lp, 0, sizeof(*lp));
7534 tp->lp[ln] = lp;
7535
7536 /*
7537 ** Initialize the target control block if not yet.
7538 */
7539 if (!tp->jump_tcb.l_cmd)
7540 ncr_init_tcb(np, tn);
7541
7542 /*
7543 ** Initialize the CCB queue headers.
7544 */
7545 INIT_LIST_HEAD(&lp->free_ccbq);
7546 INIT_LIST_HEAD(&lp->busy_ccbq);
7547 INIT_LIST_HEAD(&lp->wait_ccbq);
7548 INIT_LIST_HEAD(&lp->skip_ccbq);
7549
7550 /*
7551 ** Set max CCBs to 1 and use the default 1 entry
7552 ** jump table by default.
7553 */
7554 lp->maxnxs = 1;
7555 lp->jump_ccb = &lp->jump_ccb_0;
7556 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb));
7557
7558 /*
7559 ** Initilialyze the reselect script:
7560 **
7561 ** Jump to next lcb if SFBR does not match this lun.
7562 ** Load TEMP with the CCB direct jump table bus address.
7563 ** Get the SIMPLE TAG message and the tag.
7564 **
7565 ** JUMP IF (SFBR != #lun#), @(next lcb)
7566 ** COPY @(lp->p_jump_ccb), @(temp)
7567 ** JUMP @script(resel_notag)
7568 */
7569 lp->jump_lcb.l_cmd =
7570 cpu_to_scr((SCR_JUMP ^ IFFALSE (MASK (0x80+ln, 0xff))));
7571 lp->jump_lcb.l_paddr = tp->jump_lcb[lh].l_paddr;
7572
7573 lp->load_jump_ccb[0] = cpu_to_scr(copy_4);
7574 lp->load_jump_ccb[1] = cpu_to_scr(vtobus (&lp->p_jump_ccb));
7575 lp->load_jump_ccb[2] = cpu_to_scr(ncr_reg_bus_addr(nc_temp));
7576
7577 lp->jump_tag.l_cmd = cpu_to_scr(SCR_JUMP);
7578 lp->jump_tag.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_notag));
7579
7580 /*
7581 ** Link this lun control block to the JUMP chain.
7582 */
7583 tp->jump_lcb[lh].l_paddr = cpu_to_scr(vtobus (&lp->jump_lcb));
7584
7585 /*
7586 ** Initialize command queuing control.
7587 */
7588 lp->busyccbs = 1;
7589 lp->queuedccbs = 1;
7590 lp->queuedepth = 1;
7591fail:
7592 return lp;
7593}
7594
7595
7596/*------------------------------------------------------------------------
7597** Lun control block setup on INQUIRY data received.
7598**------------------------------------------------------------------------
7599** We only support WIDE, SYNC for targets and CMDQ for logical units.
7600** This setup is done on each INQUIRY since we are expecting user
7601** will play with CHANGE DEFINITION commands. :-)
7602**------------------------------------------------------------------------
7603*/
7604static struct lcb *ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev)
7605{
7606 unsigned char tn = sdev->id, ln = sdev->lun;
7607 struct tcb *tp = &np->target[tn];
7608 struct lcb *lp = tp->lp[ln];
7609
7610 /* If no lcb, try to allocate it. */
7611 if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln)))
7612 goto fail;
7613
7614 /*
7615 ** If unit supports tagged commands, allocate the
7616 ** CCB JUMP table if not yet.
7617 */
7618 if (sdev->tagged_supported && lp->jump_ccb == &lp->jump_ccb_0) {
7619 int i;
7620 lp->jump_ccb = m_calloc_dma(256, "JUMP_CCB");
7621 if (!lp->jump_ccb) {
7622 lp->jump_ccb = &lp->jump_ccb_0;
7623 goto fail;
7624 }
7625 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb));
7626 for (i = 0 ; i < 64 ; i++)
7627 lp->jump_ccb[i] =
7628 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l_q));
7629 for (i = 0 ; i < MAX_TAGS ; i++)
7630 lp->cb_tags[i] = i;
7631 lp->maxnxs = MAX_TAGS;
f2be34a3 7632 lp->tags_stime = jiffies + 3*HZ;
1da177e4
LT		 7633 ncr_setup_tags (np, sdev);
7634 }
7635
7636
7637fail:
7638 return lp;
7639}
7640
7641/*==========================================================
7642**
7643**
7644** Build Scatter Gather Block
7645**
7646**
7647**==========================================================
7648**
7649** The transfer area may be scattered among
7650** several non adjacent physical pages.
7651**
7652** We may use MAX_SCATTER blocks.
7653**
7654**----------------------------------------------------------
7655*/
7656
7657/*
7658** We try to reduce the number of interrupts caused
7659** by unexpected phase changes due to disconnects.
7660** A typical harddisk may disconnect before ANY block.
7661** If we wanted to avoid unexpected phase changes at all
7662** we had to use a break point every 512 bytes.
7663** Of course the number of scatter/gather blocks is
7664** limited.
7665** Under Linux, the scatter/gatter blocks are provided by
7666** the generic driver. We just have to copy addresses and
7667** sizes to the data segment array.
7668*/
7669
7670static int ncr_scatter_no_sglist(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd)
7671{
7672 struct scr_tblmove *data = &cp->phys.data[MAX_SCATTER - 1];
7673 int segment;
7674
7675 cp->data_len = cmd->request_bufflen;
7676
7677 if (cmd->request_bufflen) {
7678 dma_addr_t baddr = map_scsi_single_data(np, cmd);
7679 if (baddr) {
7680 ncr_build_sge(np, data, baddr, cmd->request_bufflen);
7681 segment = 1;
7682 } else {
7683 segment = -2;
7684 }
7685 } else {
7686 segment = 0;
7687 }
7688
7689 return segment;
7690}
7691
7692static int ncr_scatter(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd)
7693{
7694 int segment = 0;
7695 int use_sg = (int) cmd->use_sg;
7696
7697 cp->data_len = 0;
7698
7699 if (!use_sg)
7700 segment = ncr_scatter_no_sglist(np, cp, cmd);
7701 else if ((use_sg = map_scsi_sg_data(np, cmd)) > 0) {
5d5ff44f 7702 struct scatterlist *scatter = (struct scatterlist *)cmd->request_buffer;
1da177e4
LT		 7703 struct scr_tblmove *data;
7704
7705 if (use_sg > MAX_SCATTER) {
7706 unmap_scsi_data(np, cmd);
7707 return -1;
7708 }
7709
7710 data = &cp->phys.data[MAX_SCATTER - use_sg];
7711
7712 for (segment = 0; segment < use_sg; segment++) {
7713 dma_addr_t baddr = sg_dma_address(&scatter[segment]);
7714 unsigned int len = sg_dma_len(&scatter[segment]);
7715
7716 ncr_build_sge(np, &data[segment], baddr, len);
7717 cp->data_len += len;
7718 }
7719 } else {
7720 segment = -2;
7721 }
7722
7723 return segment;
7724}
7725
7726/*==========================================================
7727**
7728**
7729** Test the bus snoop logic :-(
7730**
7731** Has to be called with interrupts disabled.
7732**
7733**
7734**==========================================================
7735*/
7736
7737static int __init ncr_regtest (struct ncb* np)
7738{
7739 register volatile u32 data;
7740 /*
7741 ** ncr registers may NOT be cached.
7742 ** write 0xffffffff to a read only register area,
7743 ** and try to read it back.
7744 */
7745 data = 0xffffffff;
7746 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
7747 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
7748#if 1
7749 if (data == 0xffffffff) {
7750#else
7751 if ((data & 0xe2f0fffd) != 0x02000080) {
7752#endif
7753 printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
7754 (unsigned) data);
7755 return (0x10);
7756 }
7757 return (0);
7758}
7759
7760static int __init ncr_snooptest (struct ncb* np)
7761{
7762 u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
7763 int i, err=0;
7764 if (np->reg) {
7765 err |= ncr_regtest (np);
7766 if (err)
7767 return (err);
7768 }
7769
7770 /* init */
7771 pc = NCB_SCRIPTH_PHYS (np, snooptest);
7772 host_wr = 1;
7773 ncr_wr = 2;
7774 /*
7775 ** Set memory and register.
7776 */
7777 np->ncr_cache = cpu_to_scr(host_wr);
7778 OUTL (nc_temp, ncr_wr);
7779 /*
7780 ** Start script (exchange values)
7781 */
7782 OUTL_DSP (pc);
7783 /*
7784 ** Wait 'til done (with timeout)
7785 */
7786 for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
7787 if (INB(nc_istat) & (INTF|SIP|DIP))
7788 break;
7789 /*
7790 ** Save termination position.
7791 */
7792 pc = INL (nc_dsp);
7793 /*
7794 ** Read memory and register.
7795 */
7796 host_rd = scr_to_cpu(np->ncr_cache);
7797 ncr_rd = INL (nc_scratcha);
7798 ncr_bk = INL (nc_temp);
7799 /*
7800 ** Reset ncr chip
7801 */
7802 ncr_chip_reset(np, 100);
7803 /*
7804 ** check for timeout
7805 */
7806 if (i>=NCR_SNOOP_TIMEOUT) {
7807 printk ("CACHE TEST FAILED: timeout.\n");
7808 return (0x20);
7809 }
7810 /*
7811 ** Check termination position.
7812 */
7813 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
7814 printk ("CACHE TEST FAILED: script execution failed.\n");
7815 printk ("start=%08lx, pc=%08lx, end=%08lx\n",
7816 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
7817 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
7818 return (0x40);
7819 }
7820 /*
7821 ** Show results.
7822 */
7823 if (host_wr != ncr_rd) {
7824 printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
7825 (int) host_wr, (int) ncr_rd);
7826 err |= 1;
7827 }
7828 if (host_rd != ncr_wr) {
7829 printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
7830 (int) ncr_wr, (int) host_rd);
7831 err |= 2;
7832 }
7833 if (ncr_bk != ncr_wr) {
7834 printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
7835 (int) ncr_wr, (int) ncr_bk);
7836 err |= 4;
7837 }
7838 return (err);
7839}
7840
7841/*==========================================================
7842**
7843** Determine the ncr's clock frequency.
7844** This is essential for the negotiation
7845** of the synchronous transfer rate.
7846**
7847**==========================================================
7848**
7849** Note: we have to return the correct value.
b0dc1db1 7850** THERE IS NO SAFE DEFAULT VALUE.
1da177e4
LT		 7851**
7852** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
7853** 53C860 and 53C875 rev. 1 support fast20 transfers but
7854** do not have a clock doubler and so are provided with a
7855** 80 MHz clock. All other fast20 boards incorporate a doubler
7856** and so should be delivered with a 40 MHz clock.
7857** The future fast40 chips (895/895) use a 40 Mhz base clock
7858** and provide a clock quadrupler (160 Mhz). The code below
7859** tries to deal as cleverly as possible with all this stuff.
7860**
7861**----------------------------------------------------------
7862*/
7863
7864/*
7865 * Select NCR SCSI clock frequency
7866 */
7867static void ncr_selectclock(struct ncb *np, u_char scntl3)
7868{
7869 if (np->multiplier < 2) {
7870 OUTB(nc_scntl3, scntl3);
7871 return;
7872 }
7873
7874 if (bootverbose >= 2)
7875 printk ("%s: enabling clock multiplier\n", ncr_name(np));
7876
7877 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
7878 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
7879 int i = 20;
7880 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
7881 udelay(20);
7882 if (!i)
7883 printk("%s: the chip cannot lock the frequency\n", ncr_name(np));
7884 } else /* Wait 20 micro-seconds for doubler */
7885 udelay(20);
7886 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
7887 OUTB(nc_scntl3, scntl3);
7888 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
7889 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
7890}
7891
7892
7893/*
7894 * calculate NCR SCSI clock frequency (in KHz)
7895 */
7896static unsigned __init ncrgetfreq (struct ncb *np, int gen)
7897{
7898 unsigned ms = 0;
7899 char count = 0;
7900
7901 /*
7902 * Measure GEN timer delay in order
7903 * to calculate SCSI clock frequency
7904 *
7905 * This code will never execute too
7906 * many loop iterations (if DELAY is
7907 * reasonably correct). It could get
7908 * too low a delay (too high a freq.)
7909 * if the CPU is slow executing the
7910 * loop for some reason (an NMI, for
7911 * example). For this reason we will
7912 * if multiple measurements are to be
7913 * performed trust the higher delay
7914 * (lower frequency returned).
7915 */
7916 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */
7917 OUTW (nc_sien , 0); /* mask all scsi interrupts */
7918 (void) INW (nc_sist); /* clear pending scsi interrupt */
7919 OUTB (nc_dien , 0); /* mask all dma interrupts */
7920 (void) INW (nc_sist); /* another one, just to be sure :) */
7921 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
7922 OUTB (nc_stime1, 0); /* disable general purpose timer */
7923 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
7924 while (!(INW(nc_sist) & GEN) && ms++ < 100000) {
7925 for (count = 0; count < 10; count ++)
7926 udelay(100); /* count ms */
7927 }
7928 OUTB (nc_stime1, 0); /* disable general purpose timer */
7929 /*
7930 * set prescaler to divide by whatever 0 means
7931 * 0 ought to choose divide by 2, but appears
7932 * to set divide by 3.5 mode in my 53c810 ...
7933 */
7934 OUTB (nc_scntl3, 0);
7935
7936 if (bootverbose >= 2)
7937 printk ("%s: Delay (GEN=%d): %u msec\n", ncr_name(np), gen, ms);
7938 /*
7939 * adjust for prescaler, and convert into KHz
7940 */
7941 return ms ? ((1 << gen) * 4340) / ms : 0;
7942}
7943
7944/*
7945 * Get/probe NCR SCSI clock frequency
7946 */
7947static void __init ncr_getclock (struct ncb *np, int mult)
7948{
7949 unsigned char scntl3 = INB(nc_scntl3);
7950 unsigned char stest1 = INB(nc_stest1);
7951 unsigned f1;
7952
7953 np->multiplier = 1;
7954 f1 = 40000;
7955
7956 /*
7957 ** True with 875 or 895 with clock multiplier selected
7958 */
7959 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
7960 if (bootverbose >= 2)
7961 printk ("%s: clock multiplier found\n", ncr_name(np));
7962 np->multiplier = mult;
7963 }
7964
7965 /*
7966 ** If multiplier not found or scntl3 not 7,5,3,
7967 ** reset chip and get frequency from general purpose timer.
7968 ** Otherwise trust scntl3 BIOS setting.
7969 */
7970 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7971 unsigned f2;
7972
7973 ncr_chip_reset(np, 5);
7974
7975 (void) ncrgetfreq (np, 11); /* throw away first result */
7976 f1 = ncrgetfreq (np, 11);
7977 f2 = ncrgetfreq (np, 11);
7978
7979 if(bootverbose)
7980 printk ("%s: NCR clock is %uKHz, %uKHz\n", ncr_name(np), f1, f2);
7981
7982 if (f1 > f2) f1 = f2; /* trust lower result */
7983
7984 if (f1 < 45000) f1 = 40000;
7985 else if (f1 < 55000) f1 = 50000;
7986 else f1 = 80000;
7987
7988 if (f1 < 80000 && mult > 1) {
7989 if (bootverbose >= 2)
7990 printk ("%s: clock multiplier assumed\n", ncr_name(np));
7991 np->multiplier = mult;
7992 }
7993 } else {
7994 if ((scntl3 & 7) == 3) f1 = 40000;
7995 else if ((scntl3 & 7) == 5) f1 = 80000;
7996 else f1 = 160000;
7997
7998 f1 /= np->multiplier;
7999 }
8000
8001 /*
8002 ** Compute controller synchronous parameters.
8003 */
8004 f1 *= np->multiplier;
8005 np->clock_khz = f1;
8006}
8007
8008/*===================== LINUX ENTRY POINTS SECTION ==========================*/
8009
8010static int ncr53c8xx_slave_alloc(struct scsi_device *device)
8011{
8012 struct Scsi_Host *host = device->host;
8013 struct ncb *np = ((struct host_data *) host->hostdata)->ncb;
8014 struct tcb *tp = &np->target[device->id];
8015 tp->starget = device->sdev_target;
8016
8017 return 0;
8018}
8019
8020static int ncr53c8xx_slave_configure(struct scsi_device *device)
8021{
8022 struct Scsi_Host *host = device->host;
8023 struct ncb *np = ((struct host_data *) host->hostdata)->ncb;
8024 struct tcb *tp = &np->target[device->id];
8025 struct lcb *lp = tp->lp[device->lun];
8026 int numtags, depth_to_use;
8027
8028 ncr_setup_lcb(np, device);
8029
8030 /*
8031 ** Select queue depth from driver setup.
8032 ** Donnot use more than configured by user.
8033 ** Use at least 2.
8034 ** Donnot use more than our maximum.
8035 */
8036 numtags = device_queue_depth(np->unit, device->id, device->lun);
8037 if (numtags > tp->usrtags)
8038 numtags = tp->usrtags;
8039 if (!device->tagged_supported)
8040 numtags = 1;
8041 depth_to_use = numtags;
8042 if (depth_to_use < 2)
8043 depth_to_use = 2;
8044 if (depth_to_use > MAX_TAGS)
8045 depth_to_use = MAX_TAGS;
8046
8047 scsi_adjust_queue_depth(device,
8048 (device->tagged_supported ?
8049 MSG_SIMPLE_TAG : 0),
8050 depth_to_use);
8051
8052 /*
8053 ** Since the queue depth is not tunable under Linux,
8054 ** we need to know this value in order not to
8055 ** announce stupid things to user.
8056 **
8057 ** XXX(hch): As of Linux 2.6 it certainly _is_ tunable..
8058 ** In fact we just tuned it, or did I miss
8059 ** something important? :)
8060 */
8061 if (lp) {
8062 lp->numtags = lp->maxtags = numtags;
8063 lp->scdev_depth = depth_to_use;
8064 }
8065 ncr_setup_tags (np, device);
8066
8067#ifdef DEBUG_NCR53C8XX
8068 printk("ncr53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n",
8069 np->unit, device->id, device->lun, depth_to_use);
8070#endif
8071
8072 if (spi_support_sync(device->sdev_target) &&
8073 !spi_initial_dv(device->sdev_target))
8074 spi_dv_device(device);
8075 return 0;
8076}
8077
8078static int ncr53c8xx_queue_command (struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
8079{
8080 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
8081 unsigned long flags;
8082 int sts;
8083
8084#ifdef DEBUG_NCR53C8XX
8085printk("ncr53c8xx_queue_command\n");
8086#endif
8087
8088 cmd->scsi_done = done;
8089 cmd->host_scribble = NULL;
8090 cmd->__data_mapped = 0;
8091 cmd->__data_mapping = 0;
8092
8093 spin_lock_irqsave(&np->smp_lock, flags);
8094
8095 if ((sts = ncr_queue_command(np, cmd)) != DID_OK) {
8096 cmd->result = ScsiResult(sts, 0);
8097#ifdef DEBUG_NCR53C8XX
8098printk("ncr53c8xx : command not queued - result=%d\n", sts);
8099#endif
8100 }
8101#ifdef DEBUG_NCR53C8XX
8102 else
8103printk("ncr53c8xx : command successfully queued\n");
8104#endif
8105
8106 spin_unlock_irqrestore(&np->smp_lock, flags);
8107
8108 if (sts != DID_OK) {
8109 unmap_scsi_data(np, cmd);
8110 done(cmd);
8111 sts = 0;
8112 }
8113
8114 return sts;
8115}
8116
7d12e780 8117irqreturn_t ncr53c8xx_intr(int irq, void *dev_id)
1da177e4
LT		 8118{
8119 unsigned long flags;
8120 struct Scsi_Host *shost = (struct Scsi_Host *)dev_id;
8121 struct host_data *host_data = (struct host_data *)shost->hostdata;
8122 struct ncb *np = host_data->ncb;
8123 struct scsi_cmnd *done_list;
8124
8125#ifdef DEBUG_NCR53C8XX
8126 printk("ncr53c8xx : interrupt received\n");
8127#endif
8128
8129 if (DEBUG_FLAGS & DEBUG_TINY) printk ("[");
8130
8131 spin_lock_irqsave(&np->smp_lock, flags);
8132 ncr_exception(np);
8133 done_list = np->done_list;
8134 np->done_list = NULL;
8135 spin_unlock_irqrestore(&np->smp_lock, flags);
8136
8137 if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n");
8138
8139 if (done_list)
8140 ncr_flush_done_cmds(done_list);
8141 return IRQ_HANDLED;
8142}
8143
8144static void ncr53c8xx_timeout(unsigned long npref)
8145{
8146 struct ncb *np = (struct ncb *) npref;
8147 unsigned long flags;
8148 struct scsi_cmnd *done_list;
8149
8150 spin_lock_irqsave(&np->smp_lock, flags);
8151 ncr_timeout(np);
8152 done_list = np->done_list;
8153 np->done_list = NULL;
8154 spin_unlock_irqrestore(&np->smp_lock, flags);
8155
8156 if (done_list)
8157 ncr_flush_done_cmds(done_list);
8158}
8159
8160static int ncr53c8xx_bus_reset(struct scsi_cmnd *cmd)
8161{
8162 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
8163 int sts;
8164 unsigned long flags;
8165 struct scsi_cmnd *done_list;
8166
8167 /*
8168 * If the mid-level driver told us reset is synchronous, it seems
8169 * that we must call the done() callback for the involved command,
8170 * even if this command was not queued to the low-level driver,
8171 * before returning SUCCESS.
8172 */
8173
8174 spin_lock_irqsave(&np->smp_lock, flags);
8175 sts = ncr_reset_bus(np, cmd, 1);
8176
8177 done_list = np->done_list;
8178 np->done_list = NULL;
8179 spin_unlock_irqrestore(&np->smp_lock, flags);
8180
8181 ncr_flush_done_cmds(done_list);
8182
8183 return sts;
8184}
8185
8186#if 0 /* unused and broken */
8187static int ncr53c8xx_abort(struct scsi_cmnd *cmd)
8188{
8189 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
8190 int sts;
8191 unsigned long flags;
8192 struct scsi_cmnd *done_list;
8193
8194#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
c6295cdf
TH		 8195 printk("ncr53c8xx_abort: pid=%lu serial_number=%ld\n",
8196 cmd->pid, cmd->serial_number);
1da177e4
LT		 8197#else
8198 printk("ncr53c8xx_abort: command pid %lu\n", cmd->pid);
8199#endif
8200
8201 NCR_LOCK_NCB(np, flags);
8202
1da177e4
LT		 8203 sts = ncr_abort_command(np, cmd);
8204out:
8205 done_list = np->done_list;
8206 np->done_list = NULL;
8207 NCR_UNLOCK_NCB(np, flags);
8208
8209 ncr_flush_done_cmds(done_list);
8210
8211 return sts;
8212}
8213#endif
8214
8215
8216/*
8217** Scsi command waiting list management.
8218**
8219** It may happen that we cannot insert a scsi command into the start queue,
8220** in the following circumstances.
8221** Too few preallocated ccb(s),
8222** maxtags < cmd_per_lun of the Linux host control block,
8223** etc...
8224** Such scsi commands are inserted into a waiting list.
8225** When a scsi command complete, we try to requeue the commands of the
8226** waiting list.
8227*/
8228
8229#define next_wcmd host_scribble
8230
8231static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd)
8232{
8233 struct scsi_cmnd *wcmd;
8234
8235#ifdef DEBUG_WAITING_LIST
8236 printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd);
8237#endif
8238 cmd->next_wcmd = NULL;
8239 if (!(wcmd = np->waiting_list)) np->waiting_list = cmd;
8240 else {
8241 while ((wcmd->next_wcmd) != 0)
8242 wcmd = (struct scsi_cmnd *) wcmd->next_wcmd;
8243 wcmd->next_wcmd = (char *) cmd;
8244 }
8245}
8246
8247static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd)
8248{
8249 struct scsi_cmnd **pcmd = &np->waiting_list;
8250
8251 while (*pcmd) {
8252 if (cmd == *pcmd) {
8253 if (to_remove) {
8254 *pcmd = (struct scsi_cmnd *) cmd->next_wcmd;
8255 cmd->next_wcmd = NULL;
8256 }
8257#ifdef DEBUG_WAITING_LIST
8258 printk("%s: cmd %lx retrieved from waiting list\n", ncr_name(np), (u_long) cmd);
8259#endif
8260 return cmd;
8261 }
8262 pcmd = (struct scsi_cmnd **) &(*pcmd)->next_wcmd;
8263 }
8264 return NULL;
8265}
8266
8267static void process_waiting_list(struct ncb *np, int sts)
8268{
8269 struct scsi_cmnd *waiting_list, *wcmd;
8270
8271 waiting_list = np->waiting_list;
8272 np->waiting_list = NULL;
8273
8274#ifdef DEBUG_WAITING_LIST
8275 if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts);
8276#endif
8277 while ((wcmd = waiting_list) != 0) {
8278 waiting_list = (struct scsi_cmnd *) wcmd->next_wcmd;
8279 wcmd->next_wcmd = NULL;
8280 if (sts == DID_OK) {
8281#ifdef DEBUG_WAITING_LIST
8282 printk("%s: cmd %lx trying to requeue\n", ncr_name(np), (u_long) wcmd);
8283#endif
8284 sts = ncr_queue_command(np, wcmd);
8285 }
8286 if (sts != DID_OK) {
8287#ifdef DEBUG_WAITING_LIST
8288 printk("%s: cmd %lx done forced sts=%d\n", ncr_name(np), (u_long) wcmd, sts);
8289#endif
8290 wcmd->result = ScsiResult(sts, 0);
8291 ncr_queue_done_cmd(np, wcmd);
8292 }
8293 }
8294}
8295
8296#undef next_wcmd
8297
8298static ssize_t show_ncr53c8xx_revision(struct class_device *dev, char *buf)
8299{
8300 struct Scsi_Host *host = class_to_shost(dev);
8301 struct host_data *host_data = (struct host_data *)host->hostdata;
8302
8303 return snprintf(buf, 20, "0x%x\n", host_data->ncb->revision_id);
8304}
8305
8306static struct class_device_attribute ncr53c8xx_revision_attr = {
8307 .attr = { .name = "revision", .mode = S_IRUGO, },
8308 .show = show_ncr53c8xx_revision,
8309};
8310
8311static struct class_device_attribute *ncr53c8xx_host_attrs[] = {
8312 &ncr53c8xx_revision_attr,
8313 NULL
8314};
8315
8316/*==========================================================
8317**
8318** Boot command line.
8319**
8320**==========================================================
8321*/
8322#ifdef MODULE
8323char *ncr53c8xx; /* command line passed by insmod */
8324module_param(ncr53c8xx, charp, 0);
8325#endif
8326
db3a8815 8327#ifndef MODULE
1da177e4
LT		 8328static int __init ncr53c8xx_setup(char *str)
8329{
8330 return sym53c8xx__setup(str);
8331}
8332
1da177e4
LT		 8333__setup("ncr53c8xx=", ncr53c8xx_setup);
8334#endif
8335
8336
8337/*
8338 * Host attach and initialisations.
8339 *
8340 * Allocate host data and ncb structure.
8341 * Request IO region and remap MMIO region.
8342 * Do chip initialization.
8343 * If all is OK, install interrupt handling and
8344 * start the timer daemon.
8345 */
8346struct Scsi_Host * __init ncr_attach(struct scsi_host_template *tpnt,
8347 int unit, struct ncr_device *device)
8348{
8349 struct host_data *host_data;
8350 struct ncb *np = NULL;
8351 struct Scsi_Host *instance = NULL;
8352 u_long flags = 0;
8353 int i;
8354
8355 if (!tpnt->name)
8356 tpnt->name = SCSI_NCR_DRIVER_NAME;
8357 if (!tpnt->shost_attrs)
8358 tpnt->shost_attrs = ncr53c8xx_host_attrs;
8359
8360 tpnt->queuecommand = ncr53c8xx_queue_command;
8361 tpnt->slave_configure = ncr53c8xx_slave_configure;
8362 tpnt->slave_alloc = ncr53c8xx_slave_alloc;
8363 tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset;
8364 tpnt->can_queue = SCSI_NCR_CAN_QUEUE;
8365 tpnt->this_id = 7;
8366 tpnt->sg_tablesize = SCSI_NCR_SG_TABLESIZE;
8367 tpnt->cmd_per_lun = SCSI_NCR_CMD_PER_LUN;
8368 tpnt->use_clustering = ENABLE_CLUSTERING;
8369
8370 if (device->differential)
8371 driver_setup.diff_support = device->differential;
8372
8373 printk(KERN_INFO "ncr53c720-%d: rev 0x%x irq %d\n",
8374 unit, device->chip.revision_id, device->slot.irq);
8375
8376 instance = scsi_host_alloc(tpnt, sizeof(*host_data));
8377 if (!instance)
8378 goto attach_error;
8379 host_data = (struct host_data *) instance->hostdata;
8380
8381 np = __m_calloc_dma(device->dev, sizeof(struct ncb), "NCB");
8382 if (!np)
8383 goto attach_error;
8384 spin_lock_init(&np->smp_lock);
8385 np->dev = device->dev;
8386 np->p_ncb = vtobus(np);
8387 host_data->ncb = np;
8388
8389 np->ccb = m_calloc_dma(sizeof(struct ccb), "CCB");
8390 if (!np->ccb)
8391 goto attach_error;
8392
8393 /* Store input information in the host data structure. */
8394 np->unit = unit;
8395 np->verbose = driver_setup.verbose;
8396 sprintf(np->inst_name, "ncr53c720-%d", np->unit);
8397 np->revision_id = device->chip.revision_id;
8398 np->features = device->chip.features;
8399 np->clock_divn = device->chip.nr_divisor;
8400 np->maxoffs = device->chip.offset_max;
8401 np->maxburst = device->chip.burst_max;
8402 np->myaddr = device->host_id;
8403
8404 /* Allocate SCRIPTS areas. */
8405 np->script0 = m_calloc_dma(sizeof(struct script), "SCRIPT");
8406 if (!np->script0)
8407 goto attach_error;
8408 np->scripth0 = m_calloc_dma(sizeof(struct scripth), "SCRIPTH");
8409 if (!np->scripth0)
8410 goto attach_error;
8411
8412 init_timer(&np->timer);
8413 np->timer.data = (unsigned long) np;
8414 np->timer.function = ncr53c8xx_timeout;
8415
8416 /* Try to map the controller chip to virtual and physical memory. */
8417
8418 np->paddr = device->slot.base;
8419 np->paddr2 = (np->features & FE_RAM) ? device->slot.base_2 : 0;
8420
8421 if (device->slot.base_v)
8422 np->vaddr = device->slot.base_v;
8423 else
8424 np->vaddr = ioremap(device->slot.base_c, 128);
8425
8426 if (!np->vaddr) {
8427 printk(KERN_ERR
8428 "%s: can't map memory mapped IO region\n",ncr_name(np));
8429 goto attach_error;
8430 } else {
8431 if (bootverbose > 1)
8432 printk(KERN_INFO
8433 "%s: using memory mapped IO at virtual address 0x%lx\n", ncr_name(np), (u_long) np->vaddr);
8434 }
8435
8436 /* Make the controller's registers available. Now the INB INW INL
8437 * OUTB OUTW OUTL macros can be used safely.
8438 */
8439
8440 np->reg = (struct ncr_reg __iomem *)np->vaddr;
8441
8442 /* Do chip dependent initialization. */
8443 ncr_prepare_setting(np);
8444
8445 if (np->paddr2 && sizeof(struct script) > 4096) {
8446 np->paddr2 = 0;
8447 printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n",
8448 ncr_name(np));
8449 }
8450
8451 instance->max_channel = 0;
8452 instance->this_id = np->myaddr;
8453 instance->max_id = np->maxwide ? 16 : 8;
8454 instance->max_lun = SCSI_NCR_MAX_LUN;
8455 instance->base = (unsigned long) np->reg;
8456 instance->irq = device->slot.irq;
8457 instance->unique_id = device->slot.base;
8458 instance->dma_channel = 0;
8459 instance->cmd_per_lun = MAX_TAGS;
8460 instance->can_queue = (MAX_START-4);
8461 /* This can happen if you forget to call ncr53c8xx_init from
8462 * your module_init */
8463 BUG_ON(!ncr53c8xx_transport_template);
8464 instance->transportt = ncr53c8xx_transport_template;
1da177e4
LT		 8465
8466 /* Patch script to physical addresses */
8467 ncr_script_fill(&script0, &scripth0);
8468
8469 np->scripth = np->scripth0;
8470 np->p_scripth = vtobus(np->scripth);
8471 np->p_script = (np->paddr2) ? np->paddr2 : vtobus(np->script0);
8472
8473 ncr_script_copy_and_bind(np, (ncrcmd *) &script0,
8474 (ncrcmd *) np->script0, sizeof(struct script));
8475 ncr_script_copy_and_bind(np, (ncrcmd *) &scripth0,
8476 (ncrcmd *) np->scripth0, sizeof(struct scripth));
8477 np->ccb->p_ccb = vtobus (np->ccb);
8478
8479 /* Patch the script for LED support. */
8480
8481 if (np->features & FE_LED0) {
8482 np->script0->idle[0] =
8483 cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01));
8484 np->script0->reselected[0] =
8485 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
8486 np->script0->start[0] =
8487 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
8488 }
8489
8490 /*
8491 * Look for the target control block of this nexus.
8492 * For i = 0 to 3
8493 * JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb)
8494 */
8495 for (i = 0 ; i < 4 ; i++) {
8496 np->jump_tcb[i].l_cmd =
8497 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));
8498 np->jump_tcb[i].l_paddr =
8499 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target));
8500 }
8501
8502 ncr_chip_reset(np, 100);
8503
8504 /* Now check the cache handling of the chipset. */
8505
8506 if (ncr_snooptest(np)) {
8507 printk(KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n");
8508 goto attach_error;
8509 }
8510
8511 /* Install the interrupt handler. */
8512 np->irq = device->slot.irq;
8513
8514 /* Initialize the fixed part of the default ccb. */
8515 ncr_init_ccb(np, np->ccb);
8516
8517 /*
8518 * After SCSI devices have been opened, we cannot reset the bus
8519 * safely, so we do it here. Interrupt handler does the real work.
8520 * Process the reset exception if interrupts are not enabled yet.
8521 * Then enable disconnects.
8522 */
8523 spin_lock_irqsave(&np->smp_lock, flags);
8524 if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) {
8525 printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np));
8526
8527 spin_unlock_irqrestore(&np->smp_lock, flags);
8528 goto attach_error;
8529 }
8530 ncr_exception(np);
8531
8532 np->disc = 1;
8533
8534 /*
8535 * The middle-level SCSI driver does not wait for devices to settle.
8536 * Wait synchronously if more than 2 seconds.
8537 */
8538 if (driver_setup.settle_delay > 2) {
8539 printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n",
8540 ncr_name(np), driver_setup.settle_delay);
8541 mdelay(1000 * driver_setup.settle_delay);
8542 }
8543
8544 /* start the timeout daemon */
8545 np->lasttime=0;
8546 ncr_timeout (np);
8547
8548 /* use SIMPLE TAG messages by default */
8549#ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG
b0dc1db1 8550 np->order = SIMPLE_QUEUE_TAG;
1da177e4
LT		 8551#endif
8552
8553 spin_unlock_irqrestore(&np->smp_lock, flags);
8554
8555 return instance;
8556
8557 attach_error:
8558 if (!instance)
8559 return NULL;
8560 printk(KERN_INFO "%s: detaching...\n", ncr_name(np));
8561 if (!np)
8562 goto unregister;
8563 if (np->scripth0)
8564 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
8565 if (np->script0)
8566 m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
8567 if (np->ccb)
8568 m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
8569 m_free_dma(np, sizeof(struct ncb), "NCB");
8570 host_data->ncb = NULL;
8571
8572 unregister:
8573 scsi_host_put(instance);
8574
8575 return NULL;
8576}
8577
8578
8579int ncr53c8xx_release(struct Scsi_Host *host)
8580{
8581 struct host_data *host_data;
8582#ifdef DEBUG_NCR53C8XX
8583 printk("ncr53c8xx: release\n");
8584#endif
8585 if (!host)
8586 return 1;
8587 host_data = (struct host_data *)host->hostdata;
8588 if (host_data && host_data->ncb)
8589 ncr_detach(host_data->ncb);
8590 return 1;
8591}
8592
8593static void ncr53c8xx_set_period(struct scsi_target *starget, int period)
8594{
8595 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
8596 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8597 struct tcb *tp = &np->target[starget->id];
8598
8599 if (period > np->maxsync)
8600 period = np->maxsync;
8601 else if (period < np->minsync)
8602 period = np->minsync;
8603
8604 tp->usrsync = period;
8605
8606 ncr_negotiate(np, tp);
8607}
8608
8609static void ncr53c8xx_set_offset(struct scsi_target *starget, int offset)
8610{
8611 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
8612 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8613 struct tcb *tp = &np->target[starget->id];
8614
8615 if (offset > np->maxoffs)
8616 offset = np->maxoffs;
8617 else if (offset < 0)
8618 offset = 0;
8619
8620 tp->maxoffs = offset;
8621
8622 ncr_negotiate(np, tp);
8623}
8624
8625static void ncr53c8xx_set_width(struct scsi_target *starget, int width)
8626{
8627 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
8628 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8629 struct tcb *tp = &np->target[starget->id];
8630
8631 if (width > np->maxwide)
8632 width = np->maxwide;
8633 else if (width < 0)
8634 width = 0;
8635
8636 tp->usrwide = width;
8637
8638 ncr_negotiate(np, tp);
8639}
8640
8641static void ncr53c8xx_get_signalling(struct Scsi_Host *shost)
8642{
8643 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8644 enum spi_signal_type type;
8645
8646 switch (np->scsi_mode) {
8647 case SMODE_SE:
8648 type = SPI_SIGNAL_SE;
8649 break;
8650 case SMODE_HVD:
8651 type = SPI_SIGNAL_HVD;
8652 break;
8653 default:
8654 type = SPI_SIGNAL_UNKNOWN;
8655 break;
8656 }
8657 spi_signalling(shost) = type;
8658}
8659
8660static struct spi_function_template ncr53c8xx_transport_functions = {
8661 .set_period = ncr53c8xx_set_period,
8662 .show_period = 1,
8663 .set_offset = ncr53c8xx_set_offset,
8664 .show_offset = 1,
8665 .set_width = ncr53c8xx_set_width,
8666 .show_width = 1,
8667 .get_signalling = ncr53c8xx_get_signalling,
8668};
8669
8670int __init ncr53c8xx_init(void)
8671{
8672 ncr53c8xx_transport_template = spi_attach_transport(&ncr53c8xx_transport_functions);
8673 if (!ncr53c8xx_transport_template)
8674 return -ENODEV;
8675 return 0;
8676}
8677
8678void ncr53c8xx_exit(void)
8679{
8680 spi_release_transport(ncr53c8xx_transport_template);
8681}
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