]>
Commit | Line | Data |
---|---|---|
dbf9bfe6 | 1 | /* |
2 | * PMC-Sierra SPC 8001 SAS/SATA based host adapters driver | |
3 | * | |
4 | * Copyright (c) 2008-2009 USI Co., Ltd. | |
5 | * All rights reserved. | |
6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | |
10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions, and the following disclaimer, | |
12 | * without modification. | |
13 | * 2. Redistributions in binary form must reproduce at minimum a disclaimer | |
14 | * substantially similar to the "NO WARRANTY" disclaimer below | |
15 | * ("Disclaimer") and any redistribution must be conditioned upon | |
16 | * including a substantially similar Disclaimer requirement for further | |
17 | * binary redistribution. | |
18 | * 3. Neither the names of the above-listed copyright holders nor the names | |
19 | * of any contributors may be used to endorse or promote products derived | |
20 | * from this software without specific prior written permission. | |
21 | * | |
22 | * Alternatively, this software may be distributed under the terms of the | |
23 | * GNU General Public License ("GPL") version 2 as published by the Free | |
24 | * Software Foundation. | |
25 | * | |
26 | * NO WARRANTY | |
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR | |
30 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
31 | * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
32 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
33 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
34 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | |
35 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING | |
36 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
37 | * POSSIBILITY OF SUCH DAMAGES. | |
38 | * | |
39 | */ | |
40 | ||
41 | #ifndef _PM8001_SAS_H_ | |
42 | #define _PM8001_SAS_H_ | |
43 | ||
44 | #include <linux/kernel.h> | |
45 | #include <linux/module.h> | |
46 | #include <linux/spinlock.h> | |
47 | #include <linux/delay.h> | |
48 | #include <linux/types.h> | |
49 | #include <linux/ctype.h> | |
50 | #include <linux/dma-mapping.h> | |
51 | #include <linux/pci.h> | |
52 | #include <linux/interrupt.h> | |
53 | #include <linux/smp_lock.h> | |
54 | #include <scsi/libsas.h> | |
55 | #include <scsi/scsi_tcq.h> | |
56 | #include <scsi/sas_ata.h> | |
57 | #include <asm/atomic.h> | |
58 | #include "pm8001_defs.h" | |
59 | ||
60 | #define DRV_NAME "pm8001" | |
61 | #define DRV_VERSION "0.1.36" | |
62 | #define PM8001_FAIL_LOGGING 0x01 /* libsas EH function logging */ | |
63 | #define PM8001_INIT_LOGGING 0x02 /* driver init logging */ | |
64 | #define PM8001_DISC_LOGGING 0x04 /* discovery layer logging */ | |
65 | #define PM8001_IO_LOGGING 0x08 /* I/O path logging */ | |
66 | #define PM8001_EH_LOGGING 0x10 /* Error message logging */ | |
67 | #define PM8001_IOCTL_LOGGING 0x20 /* IOCTL message logging */ | |
68 | #define PM8001_MSG_LOGGING 0x40 /* misc message logging */ | |
69 | #define pm8001_printk(format, arg...) printk(KERN_INFO "%s %d:" format,\ | |
70 | __func__, __LINE__, ## arg) | |
71 | #define PM8001_CHECK_LOGGING(HBA, LEVEL, CMD) \ | |
72 | do { \ | |
73 | if (unlikely(HBA->logging_level & LEVEL)) \ | |
74 | do { \ | |
75 | CMD; \ | |
76 | } while (0); \ | |
77 | } while (0); | |
78 | ||
79 | #define PM8001_EH_DBG(HBA, CMD) \ | |
80 | PM8001_CHECK_LOGGING(HBA, PM8001_EH_LOGGING, CMD) | |
81 | ||
82 | #define PM8001_INIT_DBG(HBA, CMD) \ | |
83 | PM8001_CHECK_LOGGING(HBA, PM8001_INIT_LOGGING, CMD) | |
84 | ||
85 | #define PM8001_DISC_DBG(HBA, CMD) \ | |
86 | PM8001_CHECK_LOGGING(HBA, PM8001_DISC_LOGGING, CMD) | |
87 | ||
88 | #define PM8001_IO_DBG(HBA, CMD) \ | |
89 | PM8001_CHECK_LOGGING(HBA, PM8001_IO_LOGGING, CMD) | |
90 | ||
91 | #define PM8001_FAIL_DBG(HBA, CMD) \ | |
92 | PM8001_CHECK_LOGGING(HBA, PM8001_FAIL_LOGGING, CMD) | |
93 | ||
94 | #define PM8001_IOCTL_DBG(HBA, CMD) \ | |
95 | PM8001_CHECK_LOGGING(HBA, PM8001_IOCTL_LOGGING, CMD) | |
96 | ||
97 | #define PM8001_MSG_DBG(HBA, CMD) \ | |
98 | PM8001_CHECK_LOGGING(HBA, PM8001_MSG_LOGGING, CMD) | |
99 | ||
100 | ||
101 | #define PM8001_USE_TASKLET | |
102 | #define PM8001_USE_MSIX | |
7c8356d9 | 103 | #define PM8001_READ_VPD |
dbf9bfe6 | 104 | |
105 | ||
106 | #define DEV_IS_EXPANDER(type) ((type == EDGE_DEV) || (type == FANOUT_DEV)) | |
107 | ||
108 | #define PM8001_NAME_LENGTH 32/* generic length of strings */ | |
109 | extern struct list_head hba_list; | |
110 | extern const struct pm8001_dispatch pm8001_8001_dispatch; | |
111 | ||
112 | struct pm8001_hba_info; | |
113 | struct pm8001_ccb_info; | |
114 | struct pm8001_device; | |
7c8356d9 | 115 | /* define task management IU */ |
116 | struct pm8001_tmf_task { | |
117 | u8 tmf; | |
118 | u32 tag_of_task_to_be_managed; | |
119 | }; | |
120 | struct pm8001_ioctl_payload { | |
121 | u32 signature; | |
122 | u16 major_function; | |
123 | u16 minor_function; | |
124 | u16 length; | |
125 | u16 status; | |
126 | u16 offset; | |
127 | u16 id; | |
128 | u8 *func_specific; | |
129 | }; | |
130 | ||
dbf9bfe6 | 131 | struct pm8001_dispatch { |
132 | char *name; | |
133 | int (*chip_init)(struct pm8001_hba_info *pm8001_ha); | |
134 | int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha, u32 signature); | |
135 | void (*chip_rst)(struct pm8001_hba_info *pm8001_ha); | |
136 | int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha); | |
137 | void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha); | |
72d0baa0 | 138 | irqreturn_t (*isr)(struct pm8001_hba_info *pm8001_ha); |
dbf9bfe6 | 139 | u32 (*is_our_interupt)(struct pm8001_hba_info *pm8001_ha); |
140 | int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha); | |
141 | void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha); | |
142 | void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha); | |
143 | void (*make_prd)(struct scatterlist *scatter, int nr, void *prd); | |
144 | int (*smp_req)(struct pm8001_hba_info *pm8001_ha, | |
145 | struct pm8001_ccb_info *ccb); | |
146 | int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha, | |
147 | struct pm8001_ccb_info *ccb); | |
148 | int (*sata_req)(struct pm8001_hba_info *pm8001_ha, | |
149 | struct pm8001_ccb_info *ccb); | |
150 | int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id); | |
151 | int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id); | |
152 | int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha, | |
153 | struct pm8001_device *pm8001_dev, u32 flag); | |
154 | int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id); | |
155 | int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha, | |
156 | u32 phy_id, u32 phy_op); | |
157 | int (*task_abort)(struct pm8001_hba_info *pm8001_ha, | |
158 | struct pm8001_device *pm8001_dev, u8 flag, u32 task_tag, | |
159 | u32 cmd_tag); | |
160 | int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha, | |
161 | struct pm8001_ccb_info *ccb, struct pm8001_tmf_task *tmf); | |
162 | int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload); | |
163 | int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload); | |
164 | int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha, | |
165 | void *payload); | |
166 | int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha, | |
167 | struct pm8001_device *pm8001_dev, u32 state); | |
168 | int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha, | |
169 | u32 state); | |
170 | int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha, | |
171 | u32 state); | |
d0b68041 | 172 | int (*sas_re_init_req)(struct pm8001_hba_info *pm8001_ha); |
dbf9bfe6 | 173 | }; |
174 | ||
175 | struct pm8001_chip_info { | |
176 | u32 n_phy; | |
177 | const struct pm8001_dispatch *dispatch; | |
178 | }; | |
179 | #define PM8001_CHIP_DISP (pm8001_ha->chip->dispatch) | |
180 | ||
181 | struct pm8001_port { | |
182 | struct asd_sas_port sas_port; | |
1cc943ae | 183 | u8 port_attached; |
184 | u8 wide_port_phymap; | |
185 | u8 port_state; | |
186 | struct list_head list; | |
dbf9bfe6 | 187 | }; |
188 | ||
189 | struct pm8001_phy { | |
190 | struct pm8001_hba_info *pm8001_ha; | |
191 | struct pm8001_port *port; | |
192 | struct asd_sas_phy sas_phy; | |
193 | struct sas_identify identify; | |
194 | struct scsi_device *sdev; | |
195 | u64 dev_sas_addr; | |
196 | u32 phy_type; | |
197 | struct completion *enable_completion; | |
198 | u32 frame_rcvd_size; | |
199 | u8 frame_rcvd[32]; | |
200 | u8 phy_attached; | |
201 | u8 phy_state; | |
202 | enum sas_linkrate minimum_linkrate; | |
203 | enum sas_linkrate maximum_linkrate; | |
204 | }; | |
205 | ||
206 | struct pm8001_device { | |
207 | enum sas_dev_type dev_type; | |
208 | struct domain_device *sas_device; | |
209 | u32 attached_phy; | |
210 | u32 id; | |
211 | struct completion *dcompletion; | |
212 | struct completion *setds_completion; | |
213 | u32 device_id; | |
214 | u32 running_req; | |
215 | }; | |
216 | ||
217 | struct pm8001_prd_imt { | |
218 | __le32 len; | |
219 | __le32 e; | |
220 | }; | |
221 | ||
222 | struct pm8001_prd { | |
223 | __le64 addr; /* 64-bit buffer address */ | |
224 | struct pm8001_prd_imt im_len; /* 64-bit length */ | |
225 | } __attribute__ ((packed)); | |
226 | /* | |
227 | * CCB(Command Control Block) | |
228 | */ | |
229 | struct pm8001_ccb_info { | |
230 | struct list_head entry; | |
231 | struct sas_task *task; | |
232 | u32 n_elem; | |
233 | u32 ccb_tag; | |
234 | dma_addr_t ccb_dma_handle; | |
235 | struct pm8001_device *device; | |
236 | struct pm8001_prd buf_prd[PM8001_MAX_DMA_SG]; | |
237 | struct fw_control_ex *fw_control_context; | |
238 | }; | |
239 | ||
240 | struct mpi_mem { | |
241 | void *virt_ptr; | |
242 | dma_addr_t phys_addr; | |
243 | u32 phys_addr_hi; | |
244 | u32 phys_addr_lo; | |
245 | u32 total_len; | |
246 | u32 num_elements; | |
247 | u32 element_size; | |
248 | u32 alignment; | |
249 | }; | |
250 | ||
251 | struct mpi_mem_req { | |
252 | /* The number of element in the mpiMemory array */ | |
253 | u32 count; | |
254 | /* The array of structures that define memroy regions*/ | |
255 | struct mpi_mem region[USI_MAX_MEMCNT]; | |
256 | }; | |
257 | ||
258 | struct main_cfg_table { | |
259 | u32 signature; | |
260 | u32 interface_rev; | |
261 | u32 firmware_rev; | |
262 | u32 max_out_io; | |
263 | u32 max_sgl; | |
264 | u32 ctrl_cap_flag; | |
265 | u32 gst_offset; | |
266 | u32 inbound_queue_offset; | |
267 | u32 outbound_queue_offset; | |
268 | u32 inbound_q_nppd_hppd; | |
269 | u32 outbound_hw_event_pid0_3; | |
270 | u32 outbound_hw_event_pid4_7; | |
271 | u32 outbound_ncq_event_pid0_3; | |
272 | u32 outbound_ncq_event_pid4_7; | |
273 | u32 outbound_tgt_ITNexus_event_pid0_3; | |
274 | u32 outbound_tgt_ITNexus_event_pid4_7; | |
275 | u32 outbound_tgt_ssp_event_pid0_3; | |
276 | u32 outbound_tgt_ssp_event_pid4_7; | |
277 | u32 outbound_tgt_smp_event_pid0_3; | |
278 | u32 outbound_tgt_smp_event_pid4_7; | |
279 | u32 upper_event_log_addr; | |
280 | u32 lower_event_log_addr; | |
281 | u32 event_log_size; | |
282 | u32 event_log_option; | |
283 | u32 upper_iop_event_log_addr; | |
284 | u32 lower_iop_event_log_addr; | |
285 | u32 iop_event_log_size; | |
286 | u32 iop_event_log_option; | |
287 | u32 fatal_err_interrupt; | |
288 | u32 fatal_err_dump_offset0; | |
289 | u32 fatal_err_dump_length0; | |
290 | u32 fatal_err_dump_offset1; | |
291 | u32 fatal_err_dump_length1; | |
292 | u32 hda_mode_flag; | |
293 | u32 anolog_setup_table_offset; | |
294 | }; | |
295 | struct general_status_table { | |
296 | u32 gst_len_mpistate; | |
297 | u32 iq_freeze_state0; | |
298 | u32 iq_freeze_state1; | |
299 | u32 msgu_tcnt; | |
300 | u32 iop_tcnt; | |
301 | u32 reserved; | |
302 | u32 phy_state[8]; | |
303 | u32 reserved1; | |
304 | u32 reserved2; | |
305 | u32 reserved3; | |
306 | u32 recover_err_info[8]; | |
307 | }; | |
308 | struct inbound_queue_table { | |
309 | u32 element_pri_size_cnt; | |
310 | u32 upper_base_addr; | |
311 | u32 lower_base_addr; | |
312 | u32 ci_upper_base_addr; | |
313 | u32 ci_lower_base_addr; | |
314 | u32 pi_pci_bar; | |
315 | u32 pi_offset; | |
316 | u32 total_length; | |
317 | void *base_virt; | |
318 | void *ci_virt; | |
319 | u32 reserved; | |
320 | __le32 consumer_index; | |
321 | u32 producer_idx; | |
322 | }; | |
323 | struct outbound_queue_table { | |
324 | u32 element_size_cnt; | |
325 | u32 upper_base_addr; | |
326 | u32 lower_base_addr; | |
327 | void *base_virt; | |
328 | u32 pi_upper_base_addr; | |
329 | u32 pi_lower_base_addr; | |
330 | u32 ci_pci_bar; | |
331 | u32 ci_offset; | |
332 | u32 total_length; | |
333 | void *pi_virt; | |
334 | u32 interrup_vec_cnt_delay; | |
335 | u32 dinterrup_to_pci_offset; | |
336 | __le32 producer_index; | |
337 | u32 consumer_idx; | |
338 | }; | |
339 | struct pm8001_hba_memspace { | |
340 | void __iomem *memvirtaddr; | |
341 | u64 membase; | |
342 | u32 memsize; | |
343 | }; | |
344 | struct pm8001_hba_info { | |
345 | char name[PM8001_NAME_LENGTH]; | |
346 | struct list_head list; | |
347 | unsigned long flags; | |
348 | spinlock_t lock;/* host-wide lock */ | |
349 | struct pci_dev *pdev;/* our device */ | |
350 | struct device *dev; | |
351 | struct pm8001_hba_memspace io_mem[6]; | |
352 | struct mpi_mem_req memoryMap; | |
353 | void __iomem *msg_unit_tbl_addr;/*Message Unit Table Addr*/ | |
354 | void __iomem *main_cfg_tbl_addr;/*Main Config Table Addr*/ | |
355 | void __iomem *general_stat_tbl_addr;/*General Status Table Addr*/ | |
356 | void __iomem *inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/ | |
357 | void __iomem *outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/ | |
358 | struct main_cfg_table main_cfg_tbl; | |
359 | struct general_status_table gs_tbl; | |
360 | struct inbound_queue_table inbnd_q_tbl[PM8001_MAX_INB_NUM]; | |
361 | struct outbound_queue_table outbnd_q_tbl[PM8001_MAX_OUTB_NUM]; | |
362 | u8 sas_addr[SAS_ADDR_SIZE]; | |
363 | struct sas_ha_struct *sas;/* SCSI/SAS glue */ | |
364 | struct Scsi_Host *shost; | |
365 | u32 chip_id; | |
366 | const struct pm8001_chip_info *chip; | |
367 | struct completion *nvmd_completion; | |
368 | int tags_num; | |
369 | unsigned long *tags; | |
370 | struct pm8001_phy phy[PM8001_MAX_PHYS]; | |
371 | struct pm8001_port port[PM8001_MAX_PHYS]; | |
372 | u32 id; | |
373 | u32 irq; | |
374 | struct pm8001_device *devices; | |
375 | struct pm8001_ccb_info *ccb_info; | |
376 | #ifdef PM8001_USE_MSIX | |
377 | struct msix_entry msix_entries[16];/*for msi-x interrupt*/ | |
378 | int number_of_intr;/*will be used in remove()*/ | |
379 | #endif | |
380 | #ifdef PM8001_USE_TASKLET | |
381 | struct tasklet_struct tasklet; | |
382 | #endif | |
383 | struct list_head wq_list; | |
384 | u32 logging_level; | |
385 | u32 fw_status; | |
386 | const struct firmware *fw_image; | |
387 | }; | |
388 | ||
389 | struct pm8001_wq { | |
390 | struct delayed_work work_q; | |
391 | struct pm8001_hba_info *pm8001_ha; | |
392 | void *data; | |
393 | int handler; | |
394 | struct list_head entry; | |
395 | }; | |
396 | ||
397 | struct pm8001_fw_image_header { | |
398 | u8 vender_id[8]; | |
399 | u8 product_id; | |
400 | u8 hardware_rev; | |
401 | u8 dest_partition; | |
402 | u8 reserved; | |
403 | u8 fw_rev[4]; | |
404 | __be32 image_length; | |
405 | __be32 image_crc; | |
406 | __be32 startup_entry; | |
407 | } __attribute__((packed, aligned(4))); | |
408 | ||
7c8356d9 | 409 | |
dbf9bfe6 | 410 | /** |
411 | * FW Flash Update status values | |
412 | */ | |
413 | #define FLASH_UPDATE_COMPLETE_PENDING_REBOOT 0x00 | |
414 | #define FLASH_UPDATE_IN_PROGRESS 0x01 | |
415 | #define FLASH_UPDATE_HDR_ERR 0x02 | |
416 | #define FLASH_UPDATE_OFFSET_ERR 0x03 | |
417 | #define FLASH_UPDATE_CRC_ERR 0x04 | |
418 | #define FLASH_UPDATE_LENGTH_ERR 0x05 | |
419 | #define FLASH_UPDATE_HW_ERR 0x06 | |
420 | #define FLASH_UPDATE_DNLD_NOT_SUPPORTED 0x10 | |
421 | #define FLASH_UPDATE_DISABLED 0x11 | |
422 | ||
423 | /** | |
424 | * brief param structure for firmware flash update. | |
425 | */ | |
426 | struct fw_flash_updata_info { | |
427 | u32 cur_image_offset; | |
428 | u32 cur_image_len; | |
429 | u32 total_image_len; | |
430 | struct pm8001_prd sgl; | |
431 | }; | |
432 | ||
433 | struct fw_control_info { | |
434 | u32 retcode;/*ret code (status)*/ | |
435 | u32 phase;/*ret code phase*/ | |
436 | u32 phaseCmplt;/*percent complete for the current | |
437 | update phase */ | |
438 | u32 version;/*Hex encoded firmware version number*/ | |
439 | u32 offset;/*Used for downloading firmware */ | |
440 | u32 len; /*len of buffer*/ | |
441 | u32 size;/* Used in OS VPD and Trace get size | |
442 | operations.*/ | |
443 | u32 reserved;/* padding required for 64 bit | |
444 | alignment */ | |
445 | u8 buffer[1];/* Start of buffer */ | |
446 | }; | |
447 | struct fw_control_ex { | |
448 | struct fw_control_info *fw_control; | |
449 | void *buffer;/* keep buffer pointer to be | |
450 | freed when the responce comes*/ | |
451 | void *virtAddr;/* keep virtual address of the data */ | |
452 | void *usrAddr;/* keep virtual address of the | |
453 | user data */ | |
454 | dma_addr_t phys_addr; | |
455 | u32 len; /* len of buffer */ | |
456 | void *payload; /* pointer to IOCTL Payload */ | |
457 | u8 inProgress;/*if 1 - the IOCTL request is in | |
458 | progress */ | |
459 | void *param1; | |
460 | void *param2; | |
461 | void *param3; | |
462 | }; | |
463 | ||
464 | /******************** function prototype *********************/ | |
465 | int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out); | |
466 | void pm8001_tag_init(struct pm8001_hba_info *pm8001_ha); | |
467 | u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag); | |
468 | void pm8001_ccb_free(struct pm8001_hba_info *pm8001_ha, u32 ccb_idx); | |
469 | void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha, | |
470 | struct sas_task *task, struct pm8001_ccb_info *ccb, u32 ccb_idx); | |
471 | int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func, | |
472 | void *funcdata); | |
473 | int pm8001_slave_alloc(struct scsi_device *scsi_dev); | |
474 | int pm8001_slave_configure(struct scsi_device *sdev); | |
475 | void pm8001_scan_start(struct Scsi_Host *shost); | |
476 | int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time); | |
477 | int pm8001_queue_command(struct sas_task *task, const int num, | |
478 | gfp_t gfp_flags); | |
479 | int pm8001_abort_task(struct sas_task *task); | |
480 | int pm8001_abort_task_set(struct domain_device *dev, u8 *lun); | |
481 | int pm8001_clear_aca(struct domain_device *dev, u8 *lun); | |
482 | int pm8001_clear_task_set(struct domain_device *dev, u8 *lun); | |
483 | int pm8001_dev_found(struct domain_device *dev); | |
484 | void pm8001_dev_gone(struct domain_device *dev); | |
485 | int pm8001_lu_reset(struct domain_device *dev, u8 *lun); | |
486 | int pm8001_I_T_nexus_reset(struct domain_device *dev); | |
487 | int pm8001_query_task(struct sas_task *task); | |
488 | int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr, | |
489 | dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo, | |
490 | u32 mem_size, u32 align); | |
491 | ||
492 | ||
493 | /* ctl shared API */ | |
494 | extern struct device_attribute *pm8001_host_attrs[]; | |
495 | ||
496 | #endif | |
497 |